1: //======================================================================================== 2: // MC68060.java 3: // en:MC68060 core 4: // ja:MC68060コア 5: // Copyright (C) 2003-2025 Makoto Kamada 6: // 7: // This file is part of the XEiJ (X68000 Emulator in Java). 8: // You can use, modify and redistribute the XEiJ if the conditions are met. 9: // Read the XEiJ License for more details. 10: // https://stdkmd.net/xeij/ 11: //======================================================================================== 12: 13: package xeij; 14: 15: import java.lang.*; //Boolean,Character,Class,Comparable,Double,Exception,Float,IllegalArgumentException,Integer,Long,Math,Number,Object,Runnable,SecurityException,String,StringBuilder,System 16: import java.util.*; //ArrayList,Arrays,Calendar,GregorianCalendar,HashMap,Map,Map.Entry,Timer,TimerTask,TreeMap 17: 18: public class MC68060 { 19: 20: public static void mpuCore () { 21: 22: //例外ループ 23: // 別のメソッドで検出された例外を命令ループの外側でcatchすることで命令ループを高速化する 24: errorLoop: 25: while (XEiJ.mpuClockTime < XEiJ.mpuClockLimit) { 26: try { 27: //命令ループ 28: while (XEiJ.mpuClockTime < XEiJ.mpuClockLimit) { 29: int t; 30: //命令を実行する 31: m60Incremented = 0L; //アドレスレジスタの増分 32: XEiJ.mpuTraceFlag = XEiJ.regSRT1; //命令実行前のsrT1 33: XEiJ.mpuCycleCount = 0; //第1オペコードからROMのアクセスウエイトを有効にする。命令のサイクル数はすべてXEiJ.mpuCycleCount+=～で加えること 34: XEiJ.regPC0 = t = m60Address = XEiJ.regPC; //命令の先頭アドレス 35: XEiJ.regPC = t + 2; 36: //XEiJ.regOC = mmuReadWordZeroOpword (t, XEiJ.regSRS); //第1オペコード。必ずゼロ拡張すること。pcに奇数が入っていることはないのでアドレスエラーのチェックを省略する 37: if (XEiJ.regSRS != 0) { //スーパーバイザモード 38: m60FSLW = M60_FSLW_IOMA_OPWORD | M60_FSLW_RW_READ | M60_FSLW_SIZE_WORD | M60_FSLW_TM_SUPER_CODE; 39: t = mmuTranslateReadSuperCode (t); 40: XEiJ.regOC = (InstructionBreakPoint.IBP_ON ? InstructionBreakPoint.ibpOp1SuperMap : DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdRwz (t); 41: } else { //ユーザモード 42: m60FSLW = M60_FSLW_IOMA_OPWORD | M60_FSLW_RW_READ | M60_FSLW_SIZE_WORD | M60_FSLW_TM_USER_CODE; 43: t = mmuTranslateReadUserCode (t); 44: XEiJ.regOC = (InstructionBreakPoint.IBP_ON ? InstructionBreakPoint.ibpOp1UserMap : DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdRwz (t); 45: } 46: 47: //命令の処理 48: // 第1オペコードの上位10ビットで分岐する 49: irpSwitch: 50: switch (XEiJ.regOC >>> 6) { //第1オペコードの上位10ビット。XEiJ.regOCはゼロ拡張されているので0b1111_111_111&を省略 51: 52: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 53: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 54: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 55: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 56: //ORI.B #<data>,<ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |0000_000_000_mmm_rrr-{data} 57: //OR.B #<data>,<ea> |A|012346|-|-UUUU|-**00| M+-WXZ |0000_000_000_mmm_rrr-{data} [ORI.B #<data>,<ea>] 58: //ORI.B #<data>,CCR |-|012346|-|*****|*****| |0000_000_000_111_100-{data} 59: case 0b0000_000_000: 60: irpOriByte (); 61: break irpSwitch; 62: 63: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 64: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 65: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 66: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 67: //ORI.W #<data>,<ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |0000_000_001_mmm_rrr-{data} 68: //OR.W #<data>,<ea> |A|012346|-|-UUUU|-**00| M+-WXZ |0000_000_001_mmm_rrr-{data} [ORI.W #<data>,<ea>] 69: //ORI.W #<data>,SR |-|012346|P|*****|*****| |0000_000_001_111_100-{data} 70: case 0b0000_000_001: 71: irpOriWord (); 72: break irpSwitch; 73: 74: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 75: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 76: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 77: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 78: //ORI.L #<data>,<ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |0000_000_010_mmm_rrr-{data} 79: //OR.L #<data>,<ea> |A|012346|-|-UUUU|-**00| M+-WXZ |0000_000_010_mmm_rrr-{data} [ORI.L #<data>,<ea>] 80: case 0b0000_000_010: 81: irpOriLong (); 82: break irpSwitch; 83: 84: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 85: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 86: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 87: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 88: //BITREV.L Dr |-|------|-|-----|-----|D |0000_000_011_000_rrr (ISA_C) 89: //CMP2.B <ea>,Rn |-|--234S|-|-UUUU|-U*U*| M WXZP |0000_000_011_mmm_rrr-rnnn000000000000 90: //CHK2.B <ea>,Rn |-|--234S|-|-UUUU|-U*U*| M WXZP |0000_000_011_mmm_rrr-rnnn100000000000 91: case 0b0000_000_011: 92: irpCmp2Chk2Byte (); 93: break irpSwitch; 94: 95: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 96: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 97: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 98: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 99: //BTST.L Dq,Dr |-|012346|-|--U--|--*--|D |0000_qqq_100_000_rrr 100: //MOVEP.W (d16,Ar),Dq |-|01234S|-|-----|-----| |0000_qqq_100_001_rrr-{data} 101: //BTST.B Dq,<ea> |-|012346|-|--U--|--*--| M+-WXZPI|0000_qqq_100_mmm_rrr 102: case 0b0000_000_100: 103: case 0b0000_001_100: 104: case 0b0000_010_100: 105: case 0b0000_011_100: 106: case 0b0000_100_100: 107: case 0b0000_101_100: 108: case 0b0000_110_100: 109: case 0b0000_111_100: 110: irpBtstReg (); 111: break irpSwitch; 112: 113: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 114: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 115: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 116: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 117: //BCHG.L Dq,Dr |-|012346|-|--U--|--*--|D |0000_qqq_101_000_rrr 118: //MOVEP.L (d16,Ar),Dq |-|01234S|-|-----|-----| |0000_qqq_101_001_rrr-{data} 119: //BCHG.B Dq,<ea> |-|012346|-|--U--|--*--| M+-WXZ |0000_qqq_101_mmm_rrr 120: case 0b0000_000_101: 121: case 0b0000_001_101: 122: case 0b0000_010_101: 123: case 0b0000_011_101: 124: case 0b0000_100_101: 125: case 0b0000_101_101: 126: case 0b0000_110_101: 127: case 0b0000_111_101: 128: irpBchgReg (); 129: break irpSwitch; 130: 131: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 132: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 133: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 134: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 135: //BCLR.L Dq,Dr |-|012346|-|--U--|--*--|D |0000_qqq_110_000_rrr 136: //MOVEP.W Dq,(d16,Ar) |-|01234S|-|-----|-----| |0000_qqq_110_001_rrr-{data} 137: //BCLR.B Dq,<ea> |-|012346|-|--U--|--*--| M+-WXZ |0000_qqq_110_mmm_rrr 138: case 0b0000_000_110: 139: case 0b0000_001_110: 140: case 0b0000_010_110: 141: case 0b0000_011_110: 142: case 0b0000_100_110: 143: case 0b0000_101_110: 144: case 0b0000_110_110: 145: case 0b0000_111_110: 146: irpBclrReg (); 147: break irpSwitch; 148: 149: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 150: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 151: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 152: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 153: //BSET.L Dq,Dr |-|012346|-|--U--|--*--|D |0000_qqq_111_000_rrr 154: //MOVEP.L Dq,(d16,Ar) |-|01234S|-|-----|-----| |0000_qqq_111_001_rrr-{data} 155: //BSET.B Dq,<ea> |-|012346|-|--U--|--*--| M+-WXZ |0000_qqq_111_mmm_rrr 156: case 0b0000_000_111: 157: case 0b0000_001_111: 158: case 0b0000_010_111: 159: case 0b0000_011_111: 160: case 0b0000_100_111: 161: case 0b0000_101_111: 162: case 0b0000_110_111: 163: case 0b0000_111_111: 164: irpBsetReg (); 165: break irpSwitch; 166: 167: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 168: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 169: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 170: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 171: //ANDI.B #<data>,<ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |0000_001_000_mmm_rrr-{data} 172: //AND.B #<data>,<ea> |A|012346|-|-UUUU|-**00| M+-WXZ |0000_001_000_mmm_rrr-{data} [ANDI.B #<data>,<ea>] 173: //ANDI.B #<data>,CCR |-|012346|-|*****|*****| |0000_001_000_111_100-{data} 174: case 0b0000_001_000: 175: irpAndiByte (); 176: break irpSwitch; 177: 178: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 179: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 180: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 181: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 182: //ANDI.W #<data>,<ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |0000_001_001_mmm_rrr-{data} 183: //AND.W #<data>,<ea> |A|012346|-|-UUUU|-**00| M+-WXZ |0000_001_001_mmm_rrr-{data} [ANDI.W #<data>,<ea>] 184: //ANDI.W #<data>,SR |-|012346|P|*****|*****| |0000_001_001_111_100-{data} 185: case 0b0000_001_001: 186: irpAndiWord (); 187: break irpSwitch; 188: 189: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 190: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 191: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 192: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 193: //ANDI.L #<data>,<ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |0000_001_010_mmm_rrr-{data} 194: //AND.L #<data>,<ea> |A|012346|-|-UUUU|-**00| M+-WXZ |0000_001_010_mmm_rrr-{data} [ANDI.L #<data>,<ea>] 195: case 0b0000_001_010: 196: irpAndiLong (); 197: break irpSwitch; 198: 199: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 200: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 201: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 202: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 203: //BYTEREV.L Dr |-|------|-|-----|-----|D |0000_001_011_000_rrr (ISA_C) 204: //CMP2.W <ea>,Rn |-|--234S|-|-UUUU|-U*U*| M WXZP |0000_001_011_mmm_rrr-rnnn000000000000 205: //CHK2.W <ea>,Rn |-|--234S|-|-UUUU|-U*U*| M WXZP |0000_001_011_mmm_rrr-rnnn100000000000 206: case 0b0000_001_011: 207: irpCmp2Chk2Word (); 208: break irpSwitch; 209: 210: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 211: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 212: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 213: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 214: //SUBI.B #<data>,<ea> |-|012346|-|UUUUU|*****|D M+-WXZ |0000_010_000_mmm_rrr-{data} 215: //SUB.B #<data>,<ea> |A|012346|-|UUUUU|*****| M+-WXZ |0000_010_000_mmm_rrr-{data} [SUBI.B #<data>,<ea>] 216: case 0b0000_010_000: 217: irpSubiByte (); 218: break irpSwitch; 219: 220: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 221: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 222: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 223: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 224: //SUBI.W #<data>,<ea> |-|012346|-|UUUUU|*****|D M+-WXZ |0000_010_001_mmm_rrr-{data} 225: //SUB.W #<data>,<ea> |A|012346|-|UUUUU|*****| M+-WXZ |0000_010_001_mmm_rrr-{data} [SUBI.W #<data>,<ea>] 226: case 0b0000_010_001: 227: irpSubiWord (); 228: break irpSwitch; 229: 230: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 231: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 232: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 233: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 234: //SUBI.L #<data>,<ea> |-|012346|-|UUUUU|*****|D M+-WXZ |0000_010_010_mmm_rrr-{data} 235: //SUB.L #<data>,<ea> |A|012346|-|UUUUU|*****| M+-WXZ |0000_010_010_mmm_rrr-{data} [SUBI.L #<data>,<ea>] 236: case 0b0000_010_010: 237: irpSubiLong (); 238: break irpSwitch; 239: 240: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 241: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 242: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 243: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 244: //FF1.L Dr |-|------|-|-UUUU|-**00|D |0000_010_011_000_rrr (ISA_C) 245: //CMP2.L <ea>,Rn |-|--234S|-|-UUUU|-U*U*| M WXZP |0000_010_011_mmm_rrr-rnnn000000000000 246: //CHK2.L <ea>,Rn |-|--234S|-|-UUUU|-U*U*| M WXZP |0000_010_011_mmm_rrr-rnnn100000000000 247: case 0b0000_010_011: 248: irpCmp2Chk2Long (); 249: break irpSwitch; 250: 251: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 252: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 253: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 254: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 255: //ADDI.B #<data>,<ea> |-|012346|-|UUUUU|*****|D M+-WXZ |0000_011_000_mmm_rrr-{data} 256: case 0b0000_011_000: 257: irpAddiByte (); 258: break irpSwitch; 259: 260: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 261: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 262: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 263: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 264: //ADDI.W #<data>,<ea> |-|012346|-|UUUUU|*****|D M+-WXZ |0000_011_001_mmm_rrr-{data} 265: case 0b0000_011_001: 266: irpAddiWord (); 267: break irpSwitch; 268: 269: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 270: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 271: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 272: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 273: //ADDI.L #<data>,<ea> |-|012346|-|UUUUU|*****|D M+-WXZ |0000_011_010_mmm_rrr-{data} 274: case 0b0000_011_010: 275: irpAddiLong (); 276: break irpSwitch; 277: 278: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 279: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 280: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 281: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 282: //BTST.L #<data>,Dr |-|012346|-|--U--|--*--|D |0000_100_000_000_rrr-{data} 283: //BTST.B #<data>,<ea> |-|012346|-|--U--|--*--| M+-WXZP |0000_100_000_mmm_rrr-{data} 284: case 0b0000_100_000: 285: irpBtstImm (); 286: break irpSwitch; 287: 288: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 289: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 290: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 291: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 292: //BCHG.L #<data>,Dr |-|012346|-|--U--|--*--|D |0000_100_001_000_rrr-{data} 293: //BCHG.B #<data>,<ea> |-|012346|-|--U--|--*--| M+-WXZ |0000_100_001_mmm_rrr-{data} 294: case 0b0000_100_001: 295: irpBchgImm (); 296: break irpSwitch; 297: 298: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 299: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 300: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 301: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 302: //BCLR.L #<data>,Dr |-|012346|-|--U--|--*--|D |0000_100_010_000_rrr-{data} 303: //BCLR.B #<data>,<ea> |-|012346|-|--U--|--*--| M+-WXZ |0000_100_010_mmm_rrr-{data} 304: case 0b0000_100_010: 305: irpBclrImm (); 306: break irpSwitch; 307: 308: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 309: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 310: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 311: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 312: //BSET.L #<data>,Dr |-|012346|-|--U--|--*--|D |0000_100_011_000_rrr-{data} 313: //BSET.B #<data>,<ea> |-|012346|-|--U--|--*--| M+-WXZ |0000_100_011_mmm_rrr-{data} 314: case 0b0000_100_011: 315: irpBsetImm (); 316: break irpSwitch; 317: 318: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 319: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 320: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 321: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 322: //EORI.B #<data>,<ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |0000_101_000_mmm_rrr-{data} 323: //EOR.B #<data>,<ea> |A|012346|-|-UUUU|-**00|D M+-WXZ |0000_101_000_mmm_rrr-{data} [EORI.B #<data>,<ea>] 324: //EORI.B #<data>,CCR |-|012346|-|*****|*****| |0000_101_000_111_100-{data} 325: case 0b0000_101_000: 326: irpEoriByte (); 327: break irpSwitch; 328: 329: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 330: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 331: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 332: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 333: //EORI.W #<data>,<ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |0000_101_001_mmm_rrr-{data} 334: //EOR.W #<data>,<ea> |A|012346|-|-UUUU|-**00|D M+-WXZ |0000_101_001_mmm_rrr-{data} [EORI.W #<data>,<ea>] 335: //EORI.W #<data>,SR |-|012346|P|*****|*****| |0000_101_001_111_100-{data} 336: case 0b0000_101_001: 337: irpEoriWord (); 338: break irpSwitch; 339: 340: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 341: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 342: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 343: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 344: //EORI.L #<data>,<ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |0000_101_010_mmm_rrr-{data} 345: //EOR.L #<data>,<ea> |A|012346|-|-UUUU|-**00|D M+-WXZ |0000_101_010_mmm_rrr-{data} [EORI.L #<data>,<ea>] 346: case 0b0000_101_010: 347: irpEoriLong (); 348: break irpSwitch; 349: 350: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 351: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 352: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 353: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 354: //CAS.B Dc,Du,<ea> |-|--2346|-|-UUUU|-****| M+-WXZ |0000_101_011_mmm_rrr-0000000uuu000ccc 355: case 0b0000_101_011: 356: irpCasByte (); 357: break irpSwitch; 358: 359: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 360: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 361: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 362: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 363: //CMPI.B #<data>,<ea> |-|--2346|-|-UUUU|-****|D M+-WXZP |0000_110_000_mmm_rrr-{data} 364: //CMP.B #<data>,<ea> |A|--2346|-|-UUUU|-****| M+-WXZP |0000_110_000_mmm_rrr-{data} [CMPI.B #<data>,<ea>] 365: case 0b0000_110_000: 366: irpCmpiByte (); 367: break irpSwitch; 368: 369: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 370: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 371: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 372: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 373: //CMPI.W #<data>,<ea> |-|--2346|-|-UUUU|-****|D M+-WXZP |0000_110_001_mmm_rrr-{data} 374: //CMP.W #<data>,<ea> |A|--2346|-|-UUUU|-****| M+-WXZP |0000_110_001_mmm_rrr-{data} [CMPI.W #<data>,<ea>] 375: case 0b0000_110_001: 376: irpCmpiWord (); 377: break irpSwitch; 378: 379: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 380: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 381: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 382: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 383: //CMPI.L #<data>,<ea> |-|--2346|-|-UUUU|-****|D M+-WXZP |0000_110_010_mmm_rrr-{data} 384: //CMP.L #<data>,<ea> |A|--2346|-|-UUUU|-****| M+-WXZP |0000_110_010_mmm_rrr-{data} [CMPI.L #<data>,<ea>] 385: case 0b0000_110_010: 386: irpCmpiLong (); 387: break irpSwitch; 388: 389: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 390: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 391: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 392: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 393: //CAS.W Dc,Du,<ea> |-|--2346|-|-UUUU|-****| M+-WXZ |0000_110_011_mmm_rrr-0000000uuu000ccc (68060 software emulate misaligned <ea>) 394: //CAS2.W Dc1:Dc2,Du1:Du2,(Rn1):(Rn2) |-|--234S|-|-UUUU|-****| |0000_110_011_111_100-rnnn000uuu000ccc(1)-rnnn_000_uuu_000_ccc(2) 395: case 0b0000_110_011: 396: irpCasWord (); 397: break irpSwitch; 398: 399: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 400: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 401: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 402: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 403: //MOVES.B <ea>,Rn |-|-12346|P|-----|-----| M+-WXZ |0000_111_000_mmm_rrr-rnnn000000000000 404: //MOVES.B Rn,<ea> |-|-12346|P|-----|-----| M+-WXZ |0000_111_000_mmm_rrr-rnnn100000000000 405: case 0b0000_111_000: 406: irpMovesByte (); 407: break irpSwitch; 408: 409: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 410: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 411: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 412: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 413: //MOVES.W <ea>,Rn |-|-12346|P|-----|-----| M+-WXZ |0000_111_001_mmm_rrr-rnnn000000000000 414: //MOVES.W Rn,<ea> |-|-12346|P|-----|-----| M+-WXZ |0000_111_001_mmm_rrr-rnnn100000000000 415: case 0b0000_111_001: 416: irpMovesWord (); 417: break irpSwitch; 418: 419: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 420: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 421: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 422: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 423: //MOVES.L <ea>,Rn |-|-12346|P|-----|-----| M+-WXZ |0000_111_010_mmm_rrr-rnnn000000000000 424: //MOVES.L Rn,<ea> |-|-12346|P|-----|-----| M+-WXZ |0000_111_010_mmm_rrr-rnnn100000000000 425: case 0b0000_111_010: 426: irpMovesLong (); 427: break irpSwitch; 428: 429: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 430: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 431: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 432: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 433: //CAS.L Dc,Du,<ea> |-|--2346|-|-UUUU|-****| M+-WXZ |0000_111_011_mmm_rrr-0000000uuu000ccc (68060 software emulate misaligned <ea>) 434: //CAS2.L Dc1:Dc2,Du1:Du2,(Rn1):(Rn2) |-|--234S|-|-UUUU|-****| |0000_111_011_111_100-rnnn000uuu000ccc(1)-rnnn_000_uuu_000_ccc(2) 435: case 0b0000_111_011: 436: irpCasLong (); 437: break irpSwitch; 438: 439: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 440: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 441: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 442: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 443: //MOVE.B <ea>,Dq |-|012346|-|-UUUU|-**00|D M+-WXZPI|0001_qqq_000_mmm_rrr 444: case 0b0001_000_000: 445: case 0b0001_001_000: 446: case 0b0001_010_000: 447: case 0b0001_011_000: 448: case 0b0001_100_000: 449: case 0b0001_101_000: 450: case 0b0001_110_000: 451: case 0b0001_111_000: 452: irpMoveToDRByte (); 453: break irpSwitch; 454: 455: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 456: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 457: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 458: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 459: //MOVE.B <ea>,(Aq) |-|012346|-|-UUUU|-**00|D M+-WXZPI|0001_qqq_010_mmm_rrr 460: case 0b0001_000_010: 461: case 0b0001_001_010: 462: case 0b0001_010_010: 463: case 0b0001_011_010: 464: case 0b0001_100_010: 465: case 0b0001_101_010: 466: case 0b0001_110_010: 467: case 0b0001_111_010: 468: irpMoveToMMByte (); 469: break irpSwitch; 470: 471: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 472: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 473: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 474: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 475: //MOVE.B <ea>,(Aq)+ |-|012346|-|-UUUU|-**00|D M+-WXZPI|0001_qqq_011_mmm_rrr 476: case 0b0001_000_011: 477: case 0b0001_001_011: 478: case 0b0001_010_011: 479: case 0b0001_011_011: 480: case 0b0001_100_011: 481: case 0b0001_101_011: 482: case 0b0001_110_011: 483: case 0b0001_111_011: 484: irpMoveToMPByte (); 485: break irpSwitch; 486: 487: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 488: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 489: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 490: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 491: //MOVE.B <ea>,-(Aq) |-|012346|-|-UUUU|-**00|D M+-WXZPI|0001_qqq_100_mmm_rrr 492: case 0b0001_000_100: 493: case 0b0001_001_100: 494: case 0b0001_010_100: 495: case 0b0001_011_100: 496: case 0b0001_100_100: 497: case 0b0001_101_100: 498: case 0b0001_110_100: 499: case 0b0001_111_100: 500: irpMoveToMNByte (); 501: break irpSwitch; 502: 503: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 504: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 505: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 506: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 507: //MOVE.B <ea>,(d16,Aq) |-|012346|-|-UUUU|-**00|D M+-WXZPI|0001_qqq_101_mmm_rrr 508: case 0b0001_000_101: 509: case 0b0001_001_101: 510: case 0b0001_010_101: 511: case 0b0001_011_101: 512: case 0b0001_100_101: 513: case 0b0001_101_101: 514: case 0b0001_110_101: 515: case 0b0001_111_101: 516: irpMoveToMWByte (); 517: break irpSwitch; 518: 519: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 520: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 521: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 522: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 523: //MOVE.B <ea>,(d8,Aq,Rn.wl) |-|012346|-|-UUUU|-**00|D M+-WXZPI|0001_qqq_110_mmm_rrr 524: case 0b0001_000_110: 525: case 0b0001_001_110: 526: case 0b0001_010_110: 527: case 0b0001_011_110: 528: case 0b0001_100_110: 529: case 0b0001_101_110: 530: case 0b0001_110_110: 531: case 0b0001_111_110: 532: irpMoveToMXByte (); 533: break irpSwitch; 534: 535: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 536: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 537: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 538: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 539: //MOVE.B <ea>,(xxx).W |-|012346|-|-UUUU|-**00|D M+-WXZPI|0001_000_111_mmm_rrr 540: case 0b0001_000_111: 541: irpMoveToZWByte (); 542: break irpSwitch; 543: 544: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 545: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 546: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 547: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 548: //MOVE.B <ea>,(xxx).L |-|012346|-|-UUUU|-**00|D M+-WXZPI|0001_001_111_mmm_rrr 549: case 0b0001_001_111: 550: irpMoveToZLByte (); 551: break irpSwitch; 552: 553: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 554: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 555: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 556: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 557: //MOVE.L <ea>,Dq |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0010_qqq_000_mmm_rrr 558: case 0b0010_000_000: 559: case 0b0010_001_000: 560: case 0b0010_010_000: 561: case 0b0010_011_000: 562: case 0b0010_100_000: 563: case 0b0010_101_000: 564: case 0b0010_110_000: 565: case 0b0010_111_000: 566: irpMoveToDRLong (); 567: break irpSwitch; 568: 569: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 570: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 571: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 572: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 573: //MOVEA.L <ea>,Aq |-|012346|-|-----|-----|DAM+-WXZPI|0010_qqq_001_mmm_rrr 574: //MOVE.L <ea>,Aq |A|012346|-|-----|-----|DAM+-WXZPI|0010_qqq_001_mmm_rrr [MOVEA.L <ea>,Aq] 575: case 0b0010_000_001: 576: case 0b0010_001_001: 577: case 0b0010_010_001: 578: case 0b0010_011_001: 579: case 0b0010_100_001: 580: case 0b0010_101_001: 581: case 0b0010_110_001: 582: case 0b0010_111_001: 583: irpMoveaLong (); 584: break irpSwitch; 585: 586: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 587: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 588: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 589: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 590: //MOVE.L <ea>,(Aq) |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0010_qqq_010_mmm_rrr 591: case 0b0010_000_010: 592: case 0b0010_001_010: 593: case 0b0010_010_010: 594: case 0b0010_011_010: 595: case 0b0010_100_010: 596: case 0b0010_101_010: 597: case 0b0010_110_010: 598: case 0b0010_111_010: 599: irpMoveToMMLong (); 600: break irpSwitch; 601: 602: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 603: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 604: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 605: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 606: //MOVE.L <ea>,(Aq)+ |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0010_qqq_011_mmm_rrr 607: case 0b0010_000_011: 608: case 0b0010_001_011: 609: case 0b0010_010_011: 610: case 0b0010_011_011: 611: case 0b0010_100_011: 612: case 0b0010_101_011: 613: case 0b0010_110_011: 614: case 0b0010_111_011: 615: irpMoveToMPLong (); 616: break irpSwitch; 617: 618: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 619: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 620: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 621: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 622: //MOVE.L <ea>,-(Aq) |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0010_qqq_100_mmm_rrr 623: case 0b0010_000_100: 624: case 0b0010_001_100: 625: case 0b0010_010_100: 626: case 0b0010_011_100: 627: case 0b0010_100_100: 628: case 0b0010_101_100: 629: case 0b0010_110_100: 630: case 0b0010_111_100: 631: irpMoveToMNLong (); 632: break irpSwitch; 633: 634: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 635: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 636: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 637: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 638: //MOVE.L <ea>,(d16,Aq) |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0010_qqq_101_mmm_rrr 639: case 0b0010_000_101: 640: case 0b0010_001_101: 641: case 0b0010_010_101: 642: case 0b0010_011_101: 643: case 0b0010_100_101: 644: case 0b0010_101_101: 645: case 0b0010_110_101: 646: case 0b0010_111_101: 647: irpMoveToMWLong (); 648: break irpSwitch; 649: 650: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 651: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 652: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 653: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 654: //MOVE.L <ea>,(d8,Aq,Rn.wl) |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0010_qqq_110_mmm_rrr 655: case 0b0010_000_110: 656: case 0b0010_001_110: 657: case 0b0010_010_110: 658: case 0b0010_011_110: 659: case 0b0010_100_110: 660: case 0b0010_101_110: 661: case 0b0010_110_110: 662: case 0b0010_111_110: 663: irpMoveToMXLong (); 664: break irpSwitch; 665: 666: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 667: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 668: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 669: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 670: //MOVE.L <ea>,(xxx).W |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0010_000_111_mmm_rrr 671: case 0b0010_000_111: 672: irpMoveToZWLong (); 673: break irpSwitch; 674: 675: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 676: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 677: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 678: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 679: //MOVE.L <ea>,(xxx).L |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0010_001_111_mmm_rrr 680: case 0b0010_001_111: 681: irpMoveToZLLong (); 682: break irpSwitch; 683: 684: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 685: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 686: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 687: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 688: //MOVE.W <ea>,Dq |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0011_qqq_000_mmm_rrr 689: case 0b0011_000_000: 690: case 0b0011_001_000: 691: case 0b0011_010_000: 692: case 0b0011_011_000: 693: case 0b0011_100_000: 694: case 0b0011_101_000: 695: case 0b0011_110_000: 696: case 0b0011_111_000: 697: irpMoveToDRWord (); 698: break irpSwitch; 699: 700: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 701: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 702: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 703: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 704: //MOVEA.W <ea>,Aq |-|012346|-|-----|-----|DAM+-WXZPI|0011_qqq_001_mmm_rrr 705: //MOVE.W <ea>,Aq |A|012346|-|-----|-----|DAM+-WXZPI|0011_qqq_001_mmm_rrr [MOVEA.W <ea>,Aq] 706: case 0b0011_000_001: 707: case 0b0011_001_001: 708: case 0b0011_010_001: 709: case 0b0011_011_001: 710: case 0b0011_100_001: 711: case 0b0011_101_001: 712: case 0b0011_110_001: 713: case 0b0011_111_001: 714: irpMoveaWord (); 715: break irpSwitch; 716: 717: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 718: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 719: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 720: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 721: //MOVE.W <ea>,(Aq) |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0011_qqq_010_mmm_rrr 722: case 0b0011_000_010: 723: case 0b0011_001_010: 724: case 0b0011_010_010: 725: case 0b0011_011_010: 726: case 0b0011_100_010: 727: case 0b0011_101_010: 728: case 0b0011_110_010: 729: case 0b0011_111_010: 730: irpMoveToMMWord (); 731: break irpSwitch; 732: 733: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 734: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 735: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 736: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 737: //MOVE.W <ea>,(Aq)+ |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0011_qqq_011_mmm_rrr 738: case 0b0011_000_011: 739: case 0b0011_001_011: 740: case 0b0011_010_011: 741: case 0b0011_011_011: 742: case 0b0011_100_011: 743: case 0b0011_101_011: 744: case 0b0011_110_011: 745: case 0b0011_111_011: 746: irpMoveToMPWord (); 747: break irpSwitch; 748: 749: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 750: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 751: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 752: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 753: //MOVE.W <ea>,-(Aq) |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0011_qqq_100_mmm_rrr 754: case 0b0011_000_100: 755: case 0b0011_001_100: 756: case 0b0011_010_100: 757: case 0b0011_011_100: 758: case 0b0011_100_100: 759: case 0b0011_101_100: 760: case 0b0011_110_100: 761: case 0b0011_111_100: 762: irpMoveToMNWord (); 763: break irpSwitch; 764: 765: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 766: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 767: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 768: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 769: //MOVE.W <ea>,(d16,Aq) |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0011_qqq_101_mmm_rrr 770: case 0b0011_000_101: 771: case 0b0011_001_101: 772: case 0b0011_010_101: 773: case 0b0011_011_101: 774: case 0b0011_100_101: 775: case 0b0011_101_101: 776: case 0b0011_110_101: 777: case 0b0011_111_101: 778: irpMoveToMWWord (); 779: break irpSwitch; 780: 781: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 782: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 783: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 784: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 785: //MOVE.W <ea>,(d8,Aq,Rn.wl) |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0011_qqq_110_mmm_rrr 786: case 0b0011_000_110: 787: case 0b0011_001_110: 788: case 0b0011_010_110: 789: case 0b0011_011_110: 790: case 0b0011_100_110: 791: case 0b0011_101_110: 792: case 0b0011_110_110: 793: case 0b0011_111_110: 794: irpMoveToMXWord (); 795: break irpSwitch; 796: 797: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 798: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 799: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 800: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 801: //MOVE.W <ea>,(xxx).W |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0011_000_111_mmm_rrr 802: case 0b0011_000_111: 803: irpMoveToZWWord (); 804: break irpSwitch; 805: 806: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 807: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 808: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 809: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 810: //MOVE.W <ea>,(xxx).L |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0011_001_111_mmm_rrr 811: case 0b0011_001_111: 812: irpMoveToZLWord (); 813: break irpSwitch; 814: 815: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 816: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 817: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 818: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 819: //NEGX.B <ea> |-|012346|-|*UUUU|*****|D M+-WXZ |0100_000_000_mmm_rrr 820: case 0b0100_000_000: 821: irpNegxByte (); 822: break irpSwitch; 823: 824: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 825: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 826: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 827: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 828: //NEGX.W <ea> |-|012346|-|*UUUU|*****|D M+-WXZ |0100_000_001_mmm_rrr 829: case 0b0100_000_001: 830: irpNegxWord (); 831: break irpSwitch; 832: 833: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 834: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 835: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 836: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 837: //NEGX.L <ea> |-|012346|-|*UUUU|*****|D M+-WXZ |0100_000_010_mmm_rrr 838: case 0b0100_000_010: 839: irpNegxLong (); 840: break irpSwitch; 841: 842: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 843: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 844: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 845: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 846: //MOVE.W SR,<ea> |-|-12346|P|*****|-----|D M+-WXZ |0100_000_011_mmm_rrr 847: case 0b0100_000_011: 848: irpMoveFromSR (); 849: break irpSwitch; 850: 851: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 852: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 853: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 854: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 855: //CHK.L <ea>,Dq |-|--2346|-|-UUUU|-*UUU|D M+-WXZPI|0100_qqq_100_mmm_rrr 856: case 0b0100_000_100: 857: case 0b0100_001_100: 858: case 0b0100_010_100: 859: case 0b0100_011_100: 860: case 0b0100_100_100: 861: case 0b0100_101_100: 862: case 0b0100_110_100: 863: case 0b0100_111_100: 864: irpChkLong (); 865: break irpSwitch; 866: 867: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 868: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 869: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 870: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 871: //CHK.W <ea>,Dq |-|012346|-|-UUUU|-*UUU|D M+-WXZPI|0100_qqq_110_mmm_rrr 872: case 0b0100_000_110: 873: case 0b0100_001_110: 874: case 0b0100_010_110: 875: case 0b0100_011_110: 876: case 0b0100_100_110: 877: case 0b0100_101_110: 878: case 0b0100_110_110: 879: case 0b0100_111_110: 880: irpChkWord (); 881: break irpSwitch; 882: 883: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 884: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 885: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 886: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 887: //LEA.L <ea>,Aq |-|012346|-|-----|-----| M WXZP |0100_qqq_111_mmm_rrr 888: //EXTB.L Dr |-|--2346|-|-UUUU|-**00|D |0100_100_111_000_rrr 889: case 0b0100_000_111: 890: case 0b0100_001_111: 891: case 0b0100_010_111: 892: case 0b0100_011_111: 893: case 0b0100_100_111: 894: case 0b0100_101_111: 895: case 0b0100_110_111: 896: case 0b0100_111_111: 897: irpLea (); 898: break irpSwitch; 899: 900: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 901: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 902: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 903: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 904: //CLR.B <ea> |-|012346|-|-UUUU|-0100|D M+-WXZ |0100_001_000_mmm_rrr (68000 and 68008 read before clear) 905: case 0b0100_001_000: 906: irpClrByte (); 907: break irpSwitch; 908: 909: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 910: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 911: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 912: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 913: //CLR.W <ea> |-|012346|-|-UUUU|-0100|D M+-WXZ |0100_001_001_mmm_rrr (68000 and 68008 read before clear) 914: case 0b0100_001_001: 915: irpClrWord (); 916: break irpSwitch; 917: 918: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 919: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 920: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 921: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 922: //CLR.L <ea> |-|012346|-|-UUUU|-0100|D M+-WXZ |0100_001_010_mmm_rrr (68000 and 68008 read before clear) 923: case 0b0100_001_010: 924: irpClrLong (); 925: break irpSwitch; 926: 927: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 928: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 929: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 930: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 931: //MOVE.W CCR,<ea> |-|-12346|-|*****|-----|D M+-WXZ |0100_001_011_mmm_rrr 932: case 0b0100_001_011: 933: irpMoveFromCCR (); 934: break irpSwitch; 935: 936: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 937: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 938: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 939: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 940: //NEG.B <ea> |-|012346|-|UUUUU|*****|D M+-WXZ |0100_010_000_mmm_rrr 941: case 0b0100_010_000: 942: irpNegByte (); 943: break irpSwitch; 944: 945: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 946: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 947: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 948: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 949: //NEG.W <ea> |-|012346|-|UUUUU|*****|D M+-WXZ |0100_010_001_mmm_rrr 950: case 0b0100_010_001: 951: irpNegWord (); 952: break irpSwitch; 953: 954: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 955: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 956: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 957: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 958: //NEG.L <ea> |-|012346|-|UUUUU|*****|D M+-WXZ |0100_010_010_mmm_rrr 959: case 0b0100_010_010: 960: irpNegLong (); 961: break irpSwitch; 962: 963: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 964: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 965: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 966: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 967: //MOVE.W <ea>,CCR |-|012346|-|UUUUU|*****|D M+-WXZPI|0100_010_011_mmm_rrr 968: case 0b0100_010_011: 969: irpMoveToCCR (); 970: break irpSwitch; 971: 972: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 973: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 974: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 975: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 976: //NOT.B <ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |0100_011_000_mmm_rrr 977: case 0b0100_011_000: 978: irpNotByte (); 979: break irpSwitch; 980: 981: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 982: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 983: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 984: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 985: //NOT.W <ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |0100_011_001_mmm_rrr 986: case 0b0100_011_001: 987: irpNotWord (); 988: break irpSwitch; 989: 990: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 991: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 992: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 993: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 994: //NOT.L <ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |0100_011_010_mmm_rrr 995: case 0b0100_011_010: 996: irpNotLong (); 997: break irpSwitch; 998: 999: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1000: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1001: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1002: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1003: //MOVE.W <ea>,SR |-|012346|P|UUUUU|*****|D M+-WXZPI|0100_011_011_mmm_rrr 1004: case 0b0100_011_011: 1005: irpMoveToSR (); 1006: break irpSwitch; 1007: 1008: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1009: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1010: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1011: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1012: //NBCD.B <ea> |-|012346|-|UUUUU|*U*U*|D M+-WXZ |0100_100_000_mmm_rrr 1013: //LINK.L Ar,#<data> |-|--2346|-|-----|-----| |0100_100_000_001_rrr-{data} 1014: case 0b0100_100_000: 1015: irpNbcd (); 1016: break irpSwitch; 1017: 1018: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1019: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1020: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1021: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1022: //SWAP.W Dr |-|012346|-|-UUUU|-**00|D |0100_100_001_000_rrr 1023: //BKPT #<data> |-|-12346|-|-----|-----| |0100_100_001_001_ddd 1024: //PEA.L <ea> |-|012346|-|-----|-----| M WXZP |0100_100_001_mmm_rrr 1025: case 0b0100_100_001: 1026: irpPea (); 1027: break irpSwitch; 1028: 1029: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1030: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1031: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1032: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1033: //EXT.W Dr |-|012346|-|-UUUU|-**00|D |0100_100_010_000_rrr 1034: //MOVEM.W <list>,<ea> |-|012346|-|-----|-----| M -WXZ |0100_100_010_mmm_rrr-llllllllllllllll 1035: case 0b0100_100_010: 1036: irpMovemToMemWord (); 1037: break irpSwitch; 1038: 1039: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1040: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1041: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1042: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1043: //EXT.L Dr |-|012346|-|-UUUU|-**00|D |0100_100_011_000_rrr 1044: //MOVEM.L <list>,<ea> |-|012346|-|-----|-----| M -WXZ |0100_100_011_mmm_rrr-llllllllllllllll 1045: case 0b0100_100_011: 1046: irpMovemToMemLong (); 1047: break irpSwitch; 1048: 1049: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1050: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1051: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1052: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1053: //TST.B <ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |0100_101_000_mmm_rrr 1054: //TST.B <ea> |-|--2346|-|-UUUU|-**00| PI|0100_101_000_mmm_rrr 1055: case 0b0100_101_000: 1056: irpTstByte (); 1057: break irpSwitch; 1058: 1059: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1060: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1061: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1062: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1063: //TST.W <ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |0100_101_001_mmm_rrr 1064: //TST.W <ea> |-|--2346|-|-UUUU|-**00| A PI|0100_101_001_mmm_rrr 1065: case 0b0100_101_001: 1066: irpTstWord (); 1067: break irpSwitch; 1068: 1069: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1070: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1071: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1072: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1073: //TST.L <ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |0100_101_010_mmm_rrr 1074: //TST.L <ea> |-|--2346|-|-UUUU|-**00| A PI|0100_101_010_mmm_rrr 1075: case 0b0100_101_010: 1076: irpTstLong (); 1077: break irpSwitch; 1078: 1079: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1080: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1081: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1082: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1083: //TAS.B <ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |0100_101_011_mmm_rrr 1084: //ILLEGAL |-|012346|-|-----|-----| |0100_101_011_111_100 1085: case 0b0100_101_011: 1086: irpTas (); 1087: break irpSwitch; 1088: 1089: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1090: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1091: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1092: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1093: //MULU.L <ea>,Dl |-|--2346|-|-UUUU|-***0|D M+-WXZPI|0100_110_000_mmm_rrr-0lll000000000hhh (h is not used) 1094: //MULU.L <ea>,Dh:Dl |-|--234S|-|-UUUU|-***0|D M+-WXZPI|0100_110_000_mmm_rrr-0lll010000000hhh (if h=l then result is not defined) 1095: //MULS.L <ea>,Dl |-|--2346|-|-UUUU|-***0|D M+-WXZPI|0100_110_000_mmm_rrr-0lll100000000hhh (h is not used) 1096: //MULS.L <ea>,Dh:Dl |-|--234S|-|-UUUU|-***0|D M+-WXZPI|0100_110_000_mmm_rrr-0lll110000000hhh (if h=l then result is not defined) 1097: case 0b0100_110_000: 1098: irpMuluMulsLong (); 1099: break irpSwitch; 1100: 1101: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1102: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1103: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1104: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1105: //DIVU.L <ea>,Dq |-|--2346|-|-UUUU|-***0|D M+-WXZPI|0100_110_001_mmm_rrr-0qqq000000000qqq 1106: //DIVUL.L <ea>,Dr:Dq |-|--2346|-|-UUUU|-***0|D M+-WXZPI|0100_110_001_mmm_rrr-0qqq000000000rrr (q is not equal to r) 1107: //DIVU.L <ea>,Dr:Dq |-|--234S|-|-UUUU|-***0|D M+-WXZPI|0100_110_001_mmm_rrr-0qqq010000000rrr (q is not equal to r) 1108: //DIVS.L <ea>,Dq |-|--2346|-|-UUUU|-***0|D M+-WXZPI|0100_110_001_mmm_rrr-0qqq100000000qqq 1109: //DIVSL.L <ea>,Dr:Dq |-|--2346|-|-UUUU|-***0|D M+-WXZPI|0100_110_001_mmm_rrr-0qqq100000000rrr (q is not equal to r) 1110: //DIVS.L <ea>,Dr:Dq |-|--234S|-|-UUUU|-***0|D M+-WXZPI|0100_110_001_mmm_rrr-0qqq110000000rrr (q is not equal to r) 1111: case 0b0100_110_001: 1112: irpDivuDivsLong (); 1113: break irpSwitch; 1114: 1115: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1116: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1117: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1118: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1119: //SATS.L Dr |-|------|-|-UUUU|-**00|D |0100_110_010_000_rrr (ISA_B) 1120: //MOVEM.W <ea>,<list> |-|012346|-|-----|-----| M+ WXZP |0100_110_010_mmm_rrr-llllllllllllllll 1121: case 0b0100_110_010: 1122: irpMovemToRegWord (); 1123: break irpSwitch; 1124: 1125: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1126: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1127: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1128: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1129: //MOVEM.L <ea>,<list> |-|012346|-|-----|-----| M+ WXZP |0100_110_011_mmm_rrr-llllllllllllllll 1130: case 0b0100_110_011: 1131: irpMovemToRegLong (); 1132: break irpSwitch; 1133: 1134: case 0b0100_111_001: 1135: switch (XEiJ.regOC & 0b111_111) { 1136: 1137: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1138: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1139: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1140: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1141: //TRAP #<vector> |-|012346|-|-----|-----| |0100_111_001_00v_vvv 1142: case 0b000_000: 1143: case 0b000_001: 1144: case 0b000_010: 1145: case 0b000_011: 1146: case 0b000_100: 1147: case 0b000_101: 1148: case 0b000_110: 1149: case 0b000_111: 1150: case 0b001_000: 1151: case 0b001_001: 1152: case 0b001_010: 1153: case 0b001_011: 1154: case 0b001_100: 1155: case 0b001_101: 1156: case 0b001_110: 1157: irpTrap (); 1158: break irpSwitch; 1159: case 0b001_111: 1160: irpTrap15 (); 1161: break irpSwitch; 1162: 1163: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1164: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1165: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1166: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1167: //LINK.W Ar,#<data> |-|012346|-|-----|-----| |0100_111_001_010_rrr-{data} 1168: case 0b010_000: 1169: case 0b010_001: 1170: case 0b010_010: 1171: case 0b010_011: 1172: case 0b010_100: 1173: case 0b010_101: 1174: case 0b010_110: 1175: case 0b010_111: 1176: irpLinkWord (); 1177: break irpSwitch; 1178: 1179: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1180: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1181: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1182: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1183: //UNLK Ar |-|012346|-|-----|-----| |0100_111_001_011_rrr 1184: case 0b011_000: 1185: case 0b011_001: 1186: case 0b011_010: 1187: case 0b011_011: 1188: case 0b011_100: 1189: case 0b011_101: 1190: case 0b011_110: 1191: case 0b011_111: 1192: irpUnlk (); 1193: break irpSwitch; 1194: 1195: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1196: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1197: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1198: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1199: //MOVE.L Ar,USP |-|012346|P|-----|-----| |0100_111_001_100_rrr 1200: case 0b100_000: 1201: case 0b100_001: 1202: case 0b100_010: 1203: case 0b100_011: 1204: case 0b100_100: 1205: case 0b100_101: 1206: case 0b100_110: 1207: case 0b100_111: 1208: irpMoveToUsp (); 1209: break irpSwitch; 1210: 1211: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1212: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1213: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1214: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1215: //MOVE.L USP,Ar |-|012346|P|-----|-----| |0100_111_001_101_rrr 1216: case 0b101_000: 1217: case 0b101_001: 1218: case 0b101_010: 1219: case 0b101_011: 1220: case 0b101_100: 1221: case 0b101_101: 1222: case 0b101_110: 1223: case 0b101_111: 1224: irpMoveFromUsp (); 1225: break irpSwitch; 1226: 1227: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1228: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1229: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1230: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1231: //RESET |-|012346|P|-----|-----| |0100_111_001_110_000 1232: case 0b110_000: 1233: irpReset (); 1234: break irpSwitch; 1235: 1236: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1237: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1238: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1239: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1240: //NOP |-|012346|-|-----|-----| |0100_111_001_110_001 1241: case 0b110_001: 1242: irpNop (); 1243: break irpSwitch; 1244: 1245: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1246: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1247: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1248: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1249: //STOP #<data> |-|012346|P|UUUUU|*****| |0100_111_001_110_010-{data} 1250: case 0b110_010: 1251: irpStop (); 1252: break irpSwitch; 1253: 1254: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1255: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1256: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1257: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1258: //RTE |-|012346|P|UUUUU|*****| |0100_111_001_110_011 1259: case 0b110_011: 1260: irpRte (); 1261: break irpSwitch; 1262: 1263: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1264: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1265: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1266: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1267: //RTD #<data> |-|-12346|-|-----|-----| |0100_111_001_110_100-{data} 1268: case 0b110_100: 1269: irpRtd (); 1270: break irpSwitch; 1271: 1272: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1273: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1274: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1275: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1276: //RTS |-|012346|-|-----|-----| |0100_111_001_110_101 1277: case 0b110_101: 1278: irpRts (); 1279: break irpSwitch; 1280: 1281: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1282: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1283: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1284: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1285: //TRAPV |-|012346|-|---*-|-----| |0100_111_001_110_110 1286: case 0b110_110: 1287: irpTrapv (); 1288: break irpSwitch; 1289: 1290: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1291: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1292: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1293: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1294: //RTR |-|012346|-|UUUUU|*****| |0100_111_001_110_111 1295: case 0b110_111: 1296: irpRtr (); 1297: break irpSwitch; 1298: 1299: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1300: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1301: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1302: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1303: //MOVEC.L Rc,Rn |-|-12346|P|-----|-----| |0100_111_001_111_010-rnnncccccccccccc 1304: case 0b111_010: 1305: irpMovecFromControl (); 1306: break irpSwitch; 1307: 1308: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1309: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1310: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1311: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1312: //MOVEC.L Rn,Rc |-|-12346|P|-----|-----| |0100_111_001_111_011-rnnncccccccccccc 1313: case 0b111_011: 1314: irpMovecToControl (); 1315: break irpSwitch; 1316: 1317: default: 1318: irpIllegal (); 1319: 1320: } //switch XEiJ.regOC & 0b111_111 1321: break irpSwitch; 1322: 1323: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1324: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1325: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1326: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1327: //JSR <ea> |-|012346|-|-----|-----| M WXZP |0100_111_010_mmm_rrr 1328: //JBSR.L <label> |A|012346|-|-----|-----| |0100_111_010_111_001-{address} [JSR <label>] 1329: case 0b0100_111_010: 1330: irpJsr (); 1331: break irpSwitch; 1332: 1333: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1334: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1335: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1336: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1337: //JMP <ea> |-|012346|-|-----|-----| M WXZP |0100_111_011_mmm_rrr 1338: //JBRA.L <label> |A|012346|-|-----|-----| |0100_111_011_111_001-{address} [JMP <label>] 1339: case 0b0100_111_011: 1340: irpJmp (); 1341: break irpSwitch; 1342: 1343: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1344: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1345: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1346: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1347: //ADDQ.B #<data>,<ea> |-|012346|-|UUUUU|*****|D M+-WXZ |0101_qqq_000_mmm_rrr 1348: //INC.B <ea> |A|012346|-|UUUUU|*****|D M+-WXZ |0101_001_000_mmm_rrr [ADDQ.B #1,<ea>] 1349: case 0b0101_000_000: 1350: case 0b0101_001_000: 1351: case 0b0101_010_000: 1352: case 0b0101_011_000: 1353: case 0b0101_100_000: 1354: case 0b0101_101_000: 1355: case 0b0101_110_000: 1356: case 0b0101_111_000: 1357: irpAddqByte (); 1358: break irpSwitch; 1359: 1360: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1361: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1362: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1363: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1364: //ADDQ.W #<data>,<ea> |-|012346|-|UUUUU|*****|D M+-WXZ |0101_qqq_001_mmm_rrr 1365: //ADDQ.W #<data>,Ar |-|012346|-|-----|-----| A |0101_qqq_001_001_rrr 1366: //INC.W <ea> |A|012346|-|UUUUU|*****|D M+-WXZ |0101_001_001_mmm_rrr [ADDQ.W #1,<ea>] 1367: //INC.W Ar |A|012346|-|-----|-----| A |0101_001_001_001_rrr [ADDQ.W #1,Ar] 1368: case 0b0101_000_001: 1369: case 0b0101_001_001: 1370: case 0b0101_010_001: 1371: case 0b0101_011_001: 1372: case 0b0101_100_001: 1373: case 0b0101_101_001: 1374: case 0b0101_110_001: 1375: case 0b0101_111_001: 1376: irpAddqWord (); 1377: break irpSwitch; 1378: 1379: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1380: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1381: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1382: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1383: //ADDQ.L #<data>,<ea> |-|012346|-|UUUUU|*****|D M+-WXZ |0101_qqq_010_mmm_rrr 1384: //ADDQ.L #<data>,Ar |-|012346|-|-----|-----| A |0101_qqq_010_001_rrr 1385: //INC.L <ea> |A|012346|-|UUUUU|*****|D M+-WXZ |0101_001_010_mmm_rrr [ADDQ.L #1,<ea>] 1386: //INC.L Ar |A|012346|-|-----|-----| A |0101_001_010_001_rrr [ADDQ.L #1,Ar] 1387: case 0b0101_000_010: 1388: case 0b0101_001_010: 1389: case 0b0101_010_010: 1390: case 0b0101_011_010: 1391: case 0b0101_100_010: 1392: case 0b0101_101_010: 1393: case 0b0101_110_010: 1394: case 0b0101_111_010: 1395: irpAddqLong (); 1396: break irpSwitch; 1397: 1398: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1399: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1400: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1401: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1402: //ST.B <ea> |-|012346|-|-----|-----|D M+-WXZ |0101_000_011_mmm_rrr 1403: //SNF.B <ea> |A|012346|-|-----|-----|D M+-WXZ |0101_000_011_mmm_rrr [ST.B <ea>] 1404: //DBT.W Dr,<label> |-|012346|-|-----|-----| |0101_000_011_001_rrr-{offset} 1405: //DBNF.W Dr,<label> |A|012346|-|-----|-----| |0101_000_011_001_rrr-{offset} [DBT.W Dr,<label>] 1406: //TRAPT.W #<data> |-|--2346|-|-----|-----| |0101_000_011_111_010-{data} 1407: //TPNF.W #<data> |A|--2346|-|-----|-----| |0101_000_011_111_010-{data} [TRAPT.W #<data>] 1408: //TPT.W #<data> |A|--2346|-|-----|-----| |0101_000_011_111_010-{data} [TRAPT.W #<data>] 1409: //TRAPNF.W #<data> |A|--2346|-|-----|-----| |0101_000_011_111_010-{data} [TRAPT.W #<data>] 1410: //TRAPT.L #<data> |-|--2346|-|-----|-----| |0101_000_011_111_011-{data} 1411: //TPNF.L #<data> |A|--2346|-|-----|-----| |0101_000_011_111_011-{data} [TRAPT.L #<data>] 1412: //TPT.L #<data> |A|--2346|-|-----|-----| |0101_000_011_111_011-{data} [TRAPT.L #<data>] 1413: //TRAPNF.L #<data> |A|--2346|-|-----|-----| |0101_000_011_111_011-{data} [TRAPT.L #<data>] 1414: //TRAPT |-|--2346|-|-----|-----| |0101_000_011_111_100 1415: //TPNF |A|--2346|-|-----|-----| |0101_000_011_111_100 [TRAPT] 1416: //TPT |A|--2346|-|-----|-----| |0101_000_011_111_100 [TRAPT] 1417: //TRAPNF |A|--2346|-|-----|-----| |0101_000_011_111_100 [TRAPT] 1418: case 0b0101_000_011: 1419: irpSt (); 1420: break irpSwitch; 1421: 1422: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1423: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1424: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1425: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1426: //SUBQ.B #<data>,<ea> |-|012346|-|UUUUU|*****|D M+-WXZ |0101_qqq_100_mmm_rrr 1427: //DEC.B <ea> |A|012346|-|UUUUU|*****|D M+-WXZ |0101_001_100_mmm_rrr [SUBQ.B #1,<ea>] 1428: case 0b0101_000_100: 1429: case 0b0101_001_100: 1430: case 0b0101_010_100: 1431: case 0b0101_011_100: 1432: case 0b0101_100_100: 1433: case 0b0101_101_100: 1434: case 0b0101_110_100: 1435: case 0b0101_111_100: 1436: irpSubqByte (); 1437: break irpSwitch; 1438: 1439: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1440: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1441: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1442: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1443: //SUBQ.W #<data>,<ea> |-|012346|-|UUUUU|*****|D M+-WXZ |0101_qqq_101_mmm_rrr 1444: //SUBQ.W #<data>,Ar |-|012346|-|-----|-----| A |0101_qqq_101_001_rrr 1445: //DEC.W <ea> |A|012346|-|UUUUU|*****|D M+-WXZ |0101_001_101_mmm_rrr [SUBQ.W #1,<ea>] 1446: //DEC.W Ar |A|012346|-|-----|-----| A |0101_001_101_001_rrr [SUBQ.W #1,Ar] 1447: case 0b0101_000_101: 1448: case 0b0101_001_101: 1449: case 0b0101_010_101: 1450: case 0b0101_011_101: 1451: case 0b0101_100_101: 1452: case 0b0101_101_101: 1453: case 0b0101_110_101: 1454: case 0b0101_111_101: 1455: irpSubqWord (); 1456: break irpSwitch; 1457: 1458: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1459: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1460: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1461: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1462: //SUBQ.L #<data>,<ea> |-|012346|-|UUUUU|*****|D M+-WXZ |0101_qqq_110_mmm_rrr 1463: //SUBQ.L #<data>,Ar |-|012346|-|-----|-----| A |0101_qqq_110_001_rrr 1464: //DEC.L <ea> |A|012346|-|UUUUU|*****|D M+-WXZ |0101_001_110_mmm_rrr [SUBQ.L #1,<ea>] 1465: //DEC.L Ar |A|012346|-|-----|-----| A |0101_001_110_001_rrr [SUBQ.L #1,Ar] 1466: case 0b0101_000_110: 1467: case 0b0101_001_110: 1468: case 0b0101_010_110: 1469: case 0b0101_011_110: 1470: case 0b0101_100_110: 1471: case 0b0101_101_110: 1472: case 0b0101_110_110: 1473: case 0b0101_111_110: 1474: irpSubqLong (); 1475: break irpSwitch; 1476: 1477: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1478: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1479: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1480: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1481: //SF.B <ea> |-|012346|-|-----|-----|D M+-WXZ |0101_000_111_mmm_rrr 1482: //SNT.B <ea> |A|012346|-|-----|-----|D M+-WXZ |0101_000_111_mmm_rrr [SF.B <ea>] 1483: //DBF.W Dr,<label> |-|012346|-|-----|-----| |0101_000_111_001_rrr-{offset} 1484: //DBNT.W Dr,<label> |A|012346|-|-----|-----| |0101_000_111_001_rrr-{offset} [DBF.W Dr,<label>] 1485: //DBRA.W Dr,<label> |A|012346|-|-----|-----| |0101_000_111_001_rrr-{offset} [DBF.W Dr,<label>] 1486: //TRAPF.W #<data> |-|--2346|-|-----|-----| |0101_000_111_111_010-{data} 1487: //TPF.W #<data> |A|--2346|-|-----|-----| |0101_000_111_111_010-{data} [TRAPF.W #<data>] 1488: //TPNT.W #<data> |A|--2346|-|-----|-----| |0101_000_111_111_010-{data} [TRAPF.W #<data>] 1489: //TRAPNT.W #<data> |A|--2346|-|-----|-----| |0101_000_111_111_010-{data} [TRAPF.W #<data>] 1490: //TRAPF.L #<data> |-|--2346|-|-----|-----| |0101_000_111_111_011-{data} 1491: //TPF.L #<data> |A|--2346|-|-----|-----| |0101_000_111_111_011-{data} [TRAPF.L #<data>] 1492: //TPNT.L #<data> |A|--2346|-|-----|-----| |0101_000_111_111_011-{data} [TRAPF.L #<data>] 1493: //TRAPNT.L #<data> |A|--2346|-|-----|-----| |0101_000_111_111_011-{data} [TRAPF.L #<data>] 1494: //TRAPF |-|--2346|-|-----|-----| |0101_000_111_111_100 1495: //TPF |A|--2346|-|-----|-----| |0101_000_111_111_100 [TRAPF] 1496: //TPNT |A|--2346|-|-----|-----| |0101_000_111_111_100 [TRAPF] 1497: //TRAPNT |A|--2346|-|-----|-----| |0101_000_111_111_100 [TRAPF] 1498: case 0b0101_000_111: 1499: irpSf (); 1500: break irpSwitch; 1501: 1502: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1503: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1504: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1505: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1506: //SHI.B <ea> |-|012346|-|--*-*|-----|D M+-WXZ |0101_001_011_mmm_rrr 1507: //SNLS.B <ea> |A|012346|-|--*-*|-----|D M+-WXZ |0101_001_011_mmm_rrr [SHI.B <ea>] 1508: //DBHI.W Dr,<label> |-|012346|-|--*-*|-----| |0101_001_011_001_rrr-{offset} 1509: //DBNLS.W Dr,<label> |A|012346|-|--*-*|-----| |0101_001_011_001_rrr-{offset} [DBHI.W Dr,<label>] 1510: //TRAPHI.W #<data> |-|--2346|-|--*-*|-----| |0101_001_011_111_010-{data} 1511: //TPHI.W #<data> |A|--2346|-|--*-*|-----| |0101_001_011_111_010-{data} [TRAPHI.W #<data>] 1512: //TPNLS.W #<data> |A|--2346|-|--*-*|-----| |0101_001_011_111_010-{data} [TRAPHI.W #<data>] 1513: //TRAPNLS.W #<data> |A|--2346|-|--*-*|-----| |0101_001_011_111_010-{data} [TRAPHI.W #<data>] 1514: //TRAPHI.L #<data> |-|--2346|-|--*-*|-----| |0101_001_011_111_011-{data} 1515: //TPHI.L #<data> |A|--2346|-|--*-*|-----| |0101_001_011_111_011-{data} [TRAPHI.L #<data>] 1516: //TPNLS.L #<data> |A|--2346|-|--*-*|-----| |0101_001_011_111_011-{data} [TRAPHI.L #<data>] 1517: //TRAPNLS.L #<data> |A|--2346|-|--*-*|-----| |0101_001_011_111_011-{data} [TRAPHI.L #<data>] 1518: //TRAPHI |-|--2346|-|--*-*|-----| |0101_001_011_111_100 1519: //TPHI |A|--2346|-|--*-*|-----| |0101_001_011_111_100 [TRAPHI] 1520: //TPNLS |A|--2346|-|--*-*|-----| |0101_001_011_111_100 [TRAPHI] 1521: //TRAPNLS |A|--2346|-|--*-*|-----| |0101_001_011_111_100 [TRAPHI] 1522: case 0b0101_001_011: 1523: irpShi (); 1524: break irpSwitch; 1525: 1526: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1527: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1528: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1529: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1530: //SLS.B <ea> |-|012346|-|--*-*|-----|D M+-WXZ |0101_001_111_mmm_rrr 1531: //SNHI.B <ea> |A|012346|-|--*-*|-----|D M+-WXZ |0101_001_111_mmm_rrr [SLS.B <ea>] 1532: //DBLS.W Dr,<label> |-|012346|-|--*-*|-----| |0101_001_111_001_rrr-{offset} 1533: //DBNHI.W Dr,<label> |A|012346|-|--*-*|-----| |0101_001_111_001_rrr-{offset} [DBLS.W Dr,<label>] 1534: //TRAPLS.W #<data> |-|--2346|-|--*-*|-----| |0101_001_111_111_010-{data} 1535: //TPLS.W #<data> |A|--2346|-|--*-*|-----| |0101_001_111_111_010-{data} 1536: //TPNHI.W #<data> |A|--2346|-|--*-*|-----| |0101_001_111_111_010-{data} [TRAPLS.W #<data>] 1537: //TRAPNHI.W #<data> |A|--2346|-|--*-*|-----| |0101_001_111_111_010-{data} [TRAPLS.W #<data>] 1538: //TRAPLS.L #<data> |-|--2346|-|--*-*|-----| |0101_001_111_111_011-{data} 1539: //TPLS.L #<data> |A|--2346|-|--*-*|-----| |0101_001_111_111_011-{data} 1540: //TPNHI.L #<data> |A|--2346|-|--*-*|-----| |0101_001_111_111_011-{data} [TRAPLS.L #<data>] 1541: //TRAPNHI.L #<data> |A|--2346|-|--*-*|-----| |0101_001_111_111_011-{data} [TRAPLS.L #<data>] 1542: //TRAPLS |-|--2346|-|--*-*|-----| |0101_001_111_111_100 1543: //TPLS |A|--2346|-|--*-*|-----| |0101_001_111_111_100 [TRAPLS] 1544: //TPNHI |A|--2346|-|--*-*|-----| |0101_001_111_111_100 [TRAPLS] 1545: //TRAPNHI |A|--2346|-|--*-*|-----| |0101_001_111_111_100 [TRAPLS] 1546: case 0b0101_001_111: 1547: irpSls (); 1548: break irpSwitch; 1549: 1550: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1551: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1552: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1553: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1554: //SCC.B <ea> |-|012346|-|----*|-----|D M+-WXZ |0101_010_011_mmm_rrr 1555: //SHS.B <ea> |A|012346|-|----*|-----|D M+-WXZ |0101_010_011_mmm_rrr [SCC.B <ea>] 1556: //SNCS.B <ea> |A|012346|-|----*|-----|D M+-WXZ |0101_010_011_mmm_rrr [SCC.B <ea>] 1557: //SNLO.B <ea> |A|012346|-|----*|-----|D M+-WXZ |0101_010_011_mmm_rrr [SCC.B <ea>] 1558: //DBCC.W Dr,<label> |-|012346|-|----*|-----| |0101_010_011_001_rrr-{offset} 1559: //DBHS.W Dr,<label> |A|012346|-|----*|-----| |0101_010_011_001_rrr-{offset} [DBCC.W Dr,<label>] 1560: //DBNCS.W Dr,<label> |A|012346|-|----*|-----| |0101_010_011_001_rrr-{offset} [DBCC.W Dr,<label>] 1561: //DBNLO.W Dr,<label> |A|012346|-|----*|-----| |0101_010_011_001_rrr-{offset} [DBCC.W Dr,<label>] 1562: //TRAPCC.W #<data> |-|--2346|-|----*|-----| |0101_010_011_111_010-{data} 1563: //TPCC.W #<data> |A|--2346|-|----*|-----| |0101_010_011_111_010-{data} [TRAPCC.W #<data>] 1564: //TPHS.W #<data> |A|--2346|-|----*|-----| |0101_010_011_111_010-{data} [TRAPCC.W #<data>] 1565: //TPNCS.W #<data> |A|--2346|-|----*|-----| |0101_010_011_111_010-{data} [TRAPCC.W #<data>] 1566: //TPNLO.W #<data> |A|--2346|-|----*|-----| |0101_010_011_111_010-{data} [TRAPCC.W #<data>] 1567: //TRAPHS.W #<data> |A|--2346|-|----*|-----| |0101_010_011_111_010-{data} [TRAPCC.W #<data>] 1568: //TRAPNCS.W #<data> |A|--2346|-|----*|-----| |0101_010_011_111_010-{data} [TRAPCC.W #<data>] 1569: //TRAPNLO.W #<data> |A|--2346|-|----*|-----| |0101_010_011_111_010-{data} [TRAPCC.W #<data>] 1570: //TRAPCC.L #<data> |-|--2346|-|----*|-----| |0101_010_011_111_011-{data} 1571: //TPCC.L #<data> |A|--2346|-|----*|-----| |0101_010_011_111_011-{data} [TRAPCC.L #<data>] 1572: //TPHS.L #<data> |A|--2346|-|----*|-----| |0101_010_011_111_011-{data} [TRAPCC.L #<data>] 1573: //TPNCS.L #<data> |A|--2346|-|----*|-----| |0101_010_011_111_011-{data} [TRAPCC.L #<data>] 1574: //TPNLO.L #<data> |A|--2346|-|----*|-----| |0101_010_011_111_011-{data} [TRAPCC.L #<data>] 1575: //TRAPHS.L #<data> |A|--2346|-|----*|-----| |0101_010_011_111_011-{data} [TRAPCC.L #<data>] 1576: //TRAPNCS.L #<data> |A|--2346|-|----*|-----| |0101_010_011_111_011-{data} [TRAPCC.L #<data>] 1577: //TRAPNLO.L #<data> |A|--2346|-|----*|-----| |0101_010_011_111_011-{data} [TRAPCC.L #<data>] 1578: //TRAPCC |-|--2346|-|----*|-----| |0101_010_011_111_100 1579: //TPCC |A|--2346|-|----*|-----| |0101_010_011_111_100 [TRAPCC] 1580: //TPHS |A|--2346|-|----*|-----| |0101_010_011_111_100 [TRAPCC] 1581: //TPNCS |A|--2346|-|----*|-----| |0101_010_011_111_100 [TRAPCC] 1582: //TPNLO |A|--2346|-|----*|-----| |0101_010_011_111_100 [TRAPCC] 1583: //TRAPHS |A|--2346|-|----*|-----| |0101_010_011_111_100 [TRAPCC] 1584: //TRAPNCS |A|--2346|-|----*|-----| |0101_010_011_111_100 [TRAPCC] 1585: //TRAPNLO |A|--2346|-|----*|-----| |0101_010_011_111_100 [TRAPCC] 1586: case 0b0101_010_011: 1587: irpShs (); 1588: break irpSwitch; 1589: 1590: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1591: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1592: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1593: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1594: //SCS.B <ea> |-|012346|-|----*|-----|D M+-WXZ |0101_010_111_mmm_rrr 1595: //SLO.B <ea> |A|012346|-|----*|-----|D M+-WXZ |0101_010_111_mmm_rrr [SCS.B <ea>] 1596: //SNCC.B <ea> |A|012346|-|----*|-----|D M+-WXZ |0101_010_111_mmm_rrr [SCS.B <ea>] 1597: //SNHS.B <ea> |A|012346|-|----*|-----|D M+-WXZ |0101_010_111_mmm_rrr [SCS.B <ea>] 1598: //DBCS.W Dr,<label> |-|012346|-|----*|-----| |0101_010_111_001_rrr-{offset} 1599: //DBLO.W Dr,<label> |A|012346|-|----*|-----| |0101_010_111_001_rrr-{offset} [DBCS.W Dr,<label>] 1600: //DBNCC.W Dr,<label> |A|012346|-|----*|-----| |0101_010_111_001_rrr-{offset} [DBCS.W Dr,<label>] 1601: //DBNHS.W Dr,<label> |A|012346|-|----*|-----| |0101_010_111_001_rrr-{offset} [DBCS.W Dr,<label>] 1602: //TRAPCS.W #<data> |-|--2346|-|----*|-----| |0101_010_111_111_010-{data} 1603: //TPCS.W #<data> |A|--2346|-|----*|-----| |0101_010_111_111_010-{data} [TRAPCS.W #<data>] 1604: //TPLO.W #<data> |A|--2346|-|----*|-----| |0101_010_111_111_010-{data} [TRAPCS.W #<data>] 1605: //TPNCC.W #<data> |A|--2346|-|----*|-----| |0101_010_111_111_010-{data} [TRAPCS.W #<data>] 1606: //TPNHS.W #<data> |A|--2346|-|----*|-----| |0101_010_111_111_010-{data} [TRAPCS.W #<data>] 1607: //TRAPLO.W #<data> |A|--2346|-|----*|-----| |0101_010_111_111_010-{data} [TRAPCS.W #<data>] 1608: //TRAPNCC.W #<data> |A|--2346|-|----*|-----| |0101_010_111_111_010-{data} [TRAPCS.W #<data>] 1609: //TRAPNHS.W #<data> |A|--2346|-|----*|-----| |0101_010_111_111_010-{data} [TRAPCS.W #<data>] 1610: //TRAPCS.L #<data> |-|--2346|-|----*|-----| |0101_010_111_111_011-{data} 1611: //TPCS.L #<data> |A|--2346|-|----*|-----| |0101_010_111_111_011-{data} [TRAPCS.L #<data>] 1612: //TPLO.L #<data> |A|--2346|-|----*|-----| |0101_010_111_111_011-{data} [TRAPCS.L #<data>] 1613: //TPNCC.L #<data> |A|--2346|-|----*|-----| |0101_010_111_111_011-{data} [TRAPCS.L #<data>] 1614: //TPNHS.L #<data> |A|--2346|-|----*|-----| |0101_010_111_111_011-{data} [TRAPCS.L #<data>] 1615: //TRAPLO.L #<data> |A|--2346|-|----*|-----| |0101_010_111_111_011-{data} [TRAPCS.L #<data>] 1616: //TRAPNCC.L #<data> |A|--2346|-|----*|-----| |0101_010_111_111_011-{data} [TRAPCS.L #<data>] 1617: //TRAPNHS.L #<data> |A|--2346|-|----*|-----| |0101_010_111_111_011-{data} [TRAPCS.L #<data>] 1618: //TRAPCS |-|--2346|-|----*|-----| |0101_010_111_111_100 1619: //TPCS |A|--2346|-|----*|-----| |0101_010_111_111_100 [TRAPCS] 1620: //TPLO |A|--2346|-|----*|-----| |0101_010_111_111_100 [TRAPCS] 1621: //TPNCC |A|--2346|-|----*|-----| |0101_010_111_111_100 [TRAPCS] 1622: //TPNHS |A|--2346|-|----*|-----| |0101_010_111_111_100 [TRAPCS] 1623: //TRAPLO |A|--2346|-|----*|-----| |0101_010_111_111_100 [TRAPCS] 1624: //TRAPNCC |A|--2346|-|----*|-----| |0101_010_111_111_100 [TRAPCS] 1625: //TRAPNHS |A|--2346|-|----*|-----| |0101_010_111_111_100 [TRAPCS] 1626: case 0b0101_010_111: 1627: irpSlo (); 1628: break irpSwitch; 1629: 1630: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1631: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1632: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1633: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1634: //SNE.B <ea> |-|012346|-|--*--|-----|D M+-WXZ |0101_011_011_mmm_rrr 1635: //SNEQ.B <ea> |A|012346|-|--*--|-----|D M+-WXZ |0101_011_011_mmm_rrr [SNE.B <ea>] 1636: //SNZ.B <ea> |A|012346|-|--*--|-----|D M+-WXZ |0101_011_011_mmm_rrr [SNE.B <ea>] 1637: //SNZE.B <ea> |A|012346|-|--*--|-----|D M+-WXZ |0101_011_011_mmm_rrr [SNE.B <ea>] 1638: //DBNE.W Dr,<label> |-|012346|-|--*--|-----| |0101_011_011_001_rrr-{offset} 1639: //DBNEQ.W Dr,<label> |A|012346|-|--*--|-----| |0101_011_011_001_rrr-{offset} [DBNE.W Dr,<label>] 1640: //DBNZ.W Dr,<label> |A|012346|-|--*--|-----| |0101_011_011_001_rrr-{offset} [DBNE.W Dr,<label>] 1641: //DBNZE.W Dr,<label> |A|012346|-|--*--|-----| |0101_011_011_001_rrr-{offset} [DBNE.W Dr,<label>] 1642: //TRAPNE.W #<data> |-|--2346|-|--*--|-----| |0101_011_011_111_010-{data} 1643: //TPNE.W #<data> |A|--2346|-|--*--|-----| |0101_011_011_111_010-{data} [TRAPNE.W #<data>] 1644: //TPNEQ.W #<data> |A|--2346|-|--*--|-----| |0101_011_011_111_010-{data} [TRAPNE.W #<data>] 1645: //TPNZ.W #<data> |A|--2346|-|--*--|-----| |0101_011_011_111_010-{data} [TRAPNE.W #<data>] 1646: //TPNZE.W #<data> |A|--2346|-|--*--|-----| |0101_011_011_111_010-{data} [TRAPNE.W #<data>] 1647: //TRAPNEQ.W #<data> |A|--2346|-|--*--|-----| |0101_011_011_111_010-{data} [TRAPNE.W #<data>] 1648: //TRAPNZ.W #<data> |A|--2346|-|--*--|-----| |0101_011_011_111_010-{data} [TRAPNE.W #<data>] 1649: //TRAPNZE.W #<data> |A|--2346|-|--*--|-----| |0101_011_011_111_010-{data} [TRAPNE.W #<data>] 1650: //TRAPNE.L #<data> |-|--2346|-|--*--|-----| |0101_011_011_111_011-{data} 1651: //TPNE.L #<data> |A|--2346|-|--*--|-----| |0101_011_011_111_011-{data} [TRAPNE.L #<data>] 1652: //TPNEQ.L #<data> |A|--2346|-|--*--|-----| |0101_011_011_111_011-{data} [TRAPNE.L #<data>] 1653: //TPNZ.L #<data> |A|--2346|-|--*--|-----| |0101_011_011_111_011-{data} [TRAPNE.L #<data>] 1654: //TPNZE.L #<data> |A|--2346|-|--*--|-----| |0101_011_011_111_011-{data} [TRAPNE.L #<data>] 1655: //TRAPNEQ.L #<data> |A|--2346|-|--*--|-----| |0101_011_011_111_011-{data} [TRAPNE.L #<data>] 1656: //TRAPNZ.L #<data> |A|--2346|-|--*--|-----| |0101_011_011_111_011-{data} [TRAPNE.L #<data>] 1657: //TRAPNZE.L #<data> |A|--2346|-|--*--|-----| |0101_011_011_111_011-{data} [TRAPNE.L #<data>] 1658: //TRAPNE |-|--2346|-|--*--|-----| |0101_011_011_111_100 1659: //TPNE |A|--2346|-|--*--|-----| |0101_011_011_111_100 [TRAPNE] 1660: //TPNEQ |A|--2346|-|--*--|-----| |0101_011_011_111_100 [TRAPNE] 1661: //TPNZ |A|--2346|-|--*--|-----| |0101_011_011_111_100 [TRAPNE] 1662: //TPNZE |A|--2346|-|--*--|-----| |0101_011_011_111_100 [TRAPNE] 1663: //TRAPNEQ |A|--2346|-|--*--|-----| |0101_011_011_111_100 [TRAPNE] 1664: //TRAPNZ |A|--2346|-|--*--|-----| |0101_011_011_111_100 [TRAPNE] 1665: //TRAPNZE |A|--2346|-|--*--|-----| |0101_011_011_111_100 [TRAPNE] 1666: case 0b0101_011_011: 1667: irpSne (); 1668: break irpSwitch; 1669: 1670: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1671: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1672: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1673: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1674: //SEQ.B <ea> |-|012346|-|--*--|-----|D M+-WXZ |0101_011_111_mmm_rrr 1675: //SNNE.B <ea> |A|012346|-|--*--|-----|D M+-WXZ |0101_011_111_mmm_rrr [SEQ.B <ea>] 1676: //SNNZ.B <ea> |A|012346|-|--*--|-----|D M+-WXZ |0101_011_111_mmm_rrr [SEQ.B <ea>] 1677: //SZE.B <ea> |A|012346|-|--*--|-----|D M+-WXZ |0101_011_111_mmm_rrr [SEQ.B <ea>] 1678: //DBEQ.W Dr,<label> |-|012346|-|--*--|-----| |0101_011_111_001_rrr-{offset} 1679: //DBNNE.W Dr,<label> |A|012346|-|--*--|-----| |0101_011_111_001_rrr-{offset} [DBEQ.W Dr,<label>] 1680: //DBNNZ.W Dr,<label> |A|012346|-|--*--|-----| |0101_011_111_001_rrr-{offset} [DBEQ.W Dr,<label>] 1681: //DBZE.W Dr,<label> |A|012346|-|--*--|-----| |0101_011_111_001_rrr-{offset} [DBEQ.W Dr,<label>] 1682: //TRAPEQ.W #<data> |-|--2346|-|--*--|-----| |0101_011_111_111_010-{data} 1683: //TPEQ.W #<data> |A|--2346|-|--*--|-----| |0101_011_111_111_010-{data} [TRAPEQ.W #<data>] 1684: //TPNNE.W #<data> |A|--2346|-|--*--|-----| |0101_011_111_111_010-{data} [TRAPEQ.W #<data>] 1685: //TPNNZ.W #<data> |A|--2346|-|--*--|-----| |0101_011_111_111_010-{data} [TRAPEQ.W #<data>] 1686: //TPZE.W #<data> |A|--2346|-|--*--|-----| |0101_011_111_111_010-{data} [TRAPEQ.W #<data>] 1687: //TRAPNNE.W #<data> |A|--2346|-|--*--|-----| |0101_011_111_111_010-{data} [TRAPEQ.W #<data>] 1688: //TRAPNNZ.W #<data> |A|--2346|-|--*--|-----| |0101_011_111_111_010-{data} [TRAPEQ.W #<data>] 1689: //TRAPZE.W #<data> |A|--2346|-|--*--|-----| |0101_011_111_111_010-{data} [TRAPEQ.W #<data>] 1690: //TRAPEQ.L #<data> |-|--2346|-|--*--|-----| |0101_011_111_111_011-{data} 1691: //TPEQ.L #<data> |A|--2346|-|--*--|-----| |0101_011_111_111_011-{data} [TRAPEQ.L #<data>] 1692: //TPNNE.L #<data> |A|--2346|-|--*--|-----| |0101_011_111_111_011-{data} [TRAPEQ.L #<data>] 1693: //TPNNZ.L #<data> |A|--2346|-|--*--|-----| |0101_011_111_111_011-{data} [TRAPEQ.L #<data>] 1694: //TPZE.L #<data> |A|--2346|-|--*--|-----| |0101_011_111_111_011-{data} [TRAPEQ.L #<data>] 1695: //TRAPNNE.L #<data> |A|--2346|-|--*--|-----| |0101_011_111_111_011-{data} [TRAPEQ.L #<data>] 1696: //TRAPNNZ.L #<data> |A|--2346|-|--*--|-----| |0101_011_111_111_011-{data} [TRAPEQ.L #<data>] 1697: //TRAPZE.L #<data> |A|--2346|-|--*--|-----| |0101_011_111_111_011-{data} [TRAPEQ.L #<data>] 1698: //TRAPEQ |-|--2346|-|--*--|-----| |0101_011_111_111_100 1699: //TPEQ |A|--2346|-|--*--|-----| |0101_011_111_111_100 [TRAPEQ] 1700: //TPNNE |A|--2346|-|--*--|-----| |0101_011_111_111_100 [TRAPEQ] 1701: //TPNNZ |A|--2346|-|--*--|-----| |0101_011_111_111_100 [TRAPEQ] 1702: //TPZE |A|--2346|-|--*--|-----| |0101_011_111_111_100 [TRAPEQ] 1703: //TRAPNNE |A|--2346|-|--*--|-----| |0101_011_111_111_100 [TRAPEQ] 1704: //TRAPNNZ |A|--2346|-|--*--|-----| |0101_011_111_111_100 [TRAPEQ] 1705: //TRAPZE |A|--2346|-|--*--|-----| |0101_011_111_111_100 [TRAPEQ] 1706: case 0b0101_011_111: 1707: irpSeq (); 1708: break irpSwitch; 1709: 1710: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1711: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1712: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1713: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1714: //SVC.B <ea> |-|012346|-|---*-|-----|D M+-WXZ |0101_100_011_mmm_rrr 1715: //SNVS.B <ea> |A|012346|-|---*-|-----|D M+-WXZ |0101_100_011_mmm_rrr [SVC.B <ea>] 1716: //DBVC.W Dr,<label> |-|012346|-|---*-|-----| |0101_100_011_001_rrr-{offset} 1717: //DBNVS.W Dr,<label> |A|012346|-|---*-|-----| |0101_100_011_001_rrr-{offset} [DBVC.W Dr,<label>] 1718: //TRAPVC.W #<data> |-|--2346|-|---*-|-----| |0101_100_011_111_010-{data} 1719: //TPNVS.W #<data> |A|--2346|-|---*-|-----| |0101_100_011_111_010-{data} [TRAPVC.W #<data>] 1720: //TPVC.W #<data> |A|--2346|-|---*-|-----| |0101_100_011_111_010-{data} [TRAPVC.W #<data>] 1721: //TRAPNVS.W #<data> |A|--2346|-|---*-|-----| |0101_100_011_111_010-{data} [TRAPVC.W #<data>] 1722: //TRAPVC.L #<data> |-|--2346|-|---*-|-----| |0101_100_011_111_011-{data} 1723: //TPNVS.L #<data> |A|--2346|-|---*-|-----| |0101_100_011_111_011-{data} [TRAPVC.L #<data>] 1724: //TPVC.L #<data> |A|--2346|-|---*-|-----| |0101_100_011_111_011-{data} [TRAPVC.L #<data>] 1725: //TRAPNVS.L #<data> |A|--2346|-|---*-|-----| |0101_100_011_111_011-{data} [TRAPVC.L #<data>] 1726: //TRAPVC |-|--2346|-|---*-|-----| |0101_100_011_111_100 1727: //TPNVS |A|--2346|-|---*-|-----| |0101_100_011_111_100 [TRAPVC] 1728: //TPVC |A|--2346|-|---*-|-----| |0101_100_011_111_100 [TRAPVC] 1729: //TRAPNVS |A|--2346|-|---*-|-----| |0101_100_011_111_100 [TRAPVC] 1730: case 0b0101_100_011: 1731: irpSvc (); 1732: break irpSwitch; 1733: 1734: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1735: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1736: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1737: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1738: //SVS.B <ea> |-|012346|-|---*-|-----|D M+-WXZ |0101_100_111_mmm_rrr 1739: //SNVC.B <ea> |A|012346|-|---*-|-----|D M+-WXZ |0101_100_111_mmm_rrr [SVS.B <ea>] 1740: //DBVS.W Dr,<label> |-|012346|-|---*-|-----| |0101_100_111_001_rrr-{offset} 1741: //DBNVC.W Dr,<label> |A|012346|-|---*-|-----| |0101_100_111_001_rrr-{offset} [DBVS.W Dr,<label>] 1742: //TRAPVS.W #<data> |-|--2346|-|---*-|-----| |0101_100_111_111_010-{data} 1743: //TPNVC.W #<data> |A|--2346|-|---*-|-----| |0101_100_111_111_010-{data} [TRAPVS.W #<data>] 1744: //TPVS.W #<data> |A|--2346|-|---*-|-----| |0101_100_111_111_010-{data} [TRAPVS.W #<data>] 1745: //TRAPNVC.W #<data> |A|--2346|-|---*-|-----| |0101_100_111_111_010-{data} [TRAPVS.W #<data>] 1746: //TRAPVS.L #<data> |-|--2346|-|---*-|-----| |0101_100_111_111_011-{data} 1747: //TPNVC.L #<data> |A|--2346|-|---*-|-----| |0101_100_111_111_011-{data} [TRAPVS.L #<data>] 1748: //TPVS.L #<data> |A|--2346|-|---*-|-----| |0101_100_111_111_011-{data} [TRAPVS.L #<data>] 1749: //TRAPNVC.L #<data> |A|--2346|-|---*-|-----| |0101_100_111_111_011-{data} [TRAPVS.L #<data>] 1750: //TRAPVS |-|--2346|-|---*-|-----| |0101_100_111_111_100 1751: //TPNVC |A|--2346|-|---*-|-----| |0101_100_111_111_100 [TRAPVS] 1752: //TPVS |A|--2346|-|---*-|-----| |0101_100_111_111_100 [TRAPVS] 1753: //TRAPNVC |A|--2346|-|---*-|-----| |0101_100_111_111_100 [TRAPVS] 1754: case 0b0101_100_111: 1755: irpSvs (); 1756: break irpSwitch; 1757: 1758: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1759: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1760: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1761: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1762: //SPL.B <ea> |-|012346|-|-*---|-----|D M+-WXZ |0101_101_011_mmm_rrr 1763: //SNMI.B <ea> |A|012346|-|-*---|-----|D M+-WXZ |0101_101_011_mmm_rrr [SPL.B <ea>] 1764: //DBPL.W Dr,<label> |-|012346|-|-*---|-----| |0101_101_011_001_rrr-{offset} 1765: //DBNMI.W Dr,<label> |A|012346|-|-*---|-----| |0101_101_011_001_rrr-{offset} [DBPL.W Dr,<label>] 1766: //TRAPPL.W #<data> |-|--2346|-|-*---|-----| |0101_101_011_111_010-{data} 1767: //TPNMI.W #<data> |A|--2346|-|-*---|-----| |0101_101_011_111_010-{data} [TRAPPL.W #<data>] 1768: //TPPL.W #<data> |A|--2346|-|-*---|-----| |0101_101_011_111_010-{data} [TRAPPL.W #<data>] 1769: //TRAPNMI.W #<data> |A|--2346|-|-*---|-----| |0101_101_011_111_010-{data} [TRAPPL.W #<data>] 1770: //TRAPPL.L #<data> |-|--2346|-|-*---|-----| |0101_101_011_111_011-{data} 1771: //TPNMI.L #<data> |A|--2346|-|-*---|-----| |0101_101_011_111_011-{data} [TRAPPL.L #<data>] 1772: //TPPL.L #<data> |A|--2346|-|-*---|-----| |0101_101_011_111_011-{data} [TRAPPL.L #<data>] 1773: //TRAPNMI.L #<data> |A|--2346|-|-*---|-----| |0101_101_011_111_011-{data} [TRAPPL.L #<data>] 1774: //TRAPPL |-|--2346|-|-*---|-----| |0101_101_011_111_100 1775: //TPNMI |A|--2346|-|-*---|-----| |0101_101_011_111_100 [TRAPPL] 1776: //TPPL |A|--2346|-|-*---|-----| |0101_101_011_111_100 [TRAPPL] 1777: //TRAPNMI |A|--2346|-|-*---|-----| |0101_101_011_111_100 [TRAPPL] 1778: case 0b0101_101_011: 1779: irpSpl (); 1780: break irpSwitch; 1781: 1782: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1783: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1784: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1785: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1786: //SMI.B <ea> |-|012346|-|-*---|-----|D M+-WXZ |0101_101_111_mmm_rrr 1787: //SNPL.B <ea> |A|012346|-|-*---|-----|D M+-WXZ |0101_101_111_mmm_rrr [SMI.B <ea>] 1788: //DBMI.W Dr,<label> |-|012346|-|-*---|-----| |0101_101_111_001_rrr-{offset} 1789: //DBNPL.W Dr,<label> |A|012346|-|-*---|-----| |0101_101_111_001_rrr-{offset} [DBMI.W Dr,<label>] 1790: //TRAPMI.W #<data> |-|--2346|-|-*---|-----| |0101_101_111_111_010-{data} 1791: //TPMI.W #<data> |A|--2346|-|-*---|-----| |0101_101_111_111_010-{data} [TRAPMI.W #<data>] 1792: //TPNPL.W #<data> |A|--2346|-|-*---|-----| |0101_101_111_111_010-{data} [TRAPMI.W #<data>] 1793: //TRAPNPL.W #<data> |A|--2346|-|-*---|-----| |0101_101_111_111_010-{data} [TRAPMI.W #<data>] 1794: //TRAPMI.L #<data> |-|--2346|-|-*---|-----| |0101_101_111_111_011-{data} 1795: //TPMI.L #<data> |A|--2346|-|-*---|-----| |0101_101_111_111_011-{data} [TRAPMI.L #<data>] 1796: //TPNPL.L #<data> |A|--2346|-|-*---|-----| |0101_101_111_111_011-{data} [TRAPMI.L #<data>] 1797: //TRAPNPL.L #<data> |A|--2346|-|-*---|-----| |0101_101_111_111_011-{data} [TRAPMI.L #<data>] 1798: //TRAPMI |-|--2346|-|-*---|-----| |0101_101_111_111_100 1799: //TPMI |A|--2346|-|-*---|-----| |0101_101_111_111_100 [TRAPMI] 1800: //TPNPL |A|--2346|-|-*---|-----| |0101_101_111_111_100 [TRAPMI] 1801: //TRAPNPL |A|--2346|-|-*---|-----| |0101_101_111_111_100 [TRAPMI] 1802: case 0b0101_101_111: 1803: irpSmi (); 1804: break irpSwitch; 1805: 1806: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1807: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1808: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1809: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1810: //SGE.B <ea> |-|012346|-|-*-*-|-----|D M+-WXZ |0101_110_011_mmm_rrr 1811: //SNLT.B <ea> |A|012346|-|-*-*-|-----|D M+-WXZ |0101_110_011_mmm_rrr [SGE.B <ea>] 1812: //DBGE.W Dr,<label> |-|012346|-|-*-*-|-----| |0101_110_011_001_rrr-{offset} 1813: //DBNLT.W Dr,<label> |A|012346|-|-*-*-|-----| |0101_110_011_001_rrr-{offset} [DBGE.W Dr,<label>] 1814: //TRAPGE.W #<data> |-|--2346|-|-*-*-|-----| |0101_110_011_111_010-{data} 1815: //TPGE.W #<data> |A|--2346|-|-*-*-|-----| |0101_110_011_111_010-{data} [TRAPGE.W #<data>] 1816: //TPNLT.W #<data> |A|--2346|-|-*-*-|-----| |0101_110_011_111_010-{data} [TRAPGE.W #<data>] 1817: //TRAPNLT.W #<data> |A|--2346|-|-*-*-|-----| |0101_110_011_111_010-{data} [TRAPGE.W #<data>] 1818: //TRAPGE.L #<data> |-|--2346|-|-*-*-|-----| |0101_110_011_111_011-{data} 1819: //TPGE.L #<data> |A|--2346|-|-*-*-|-----| |0101_110_011_111_011-{data} [TRAPGE.L #<data>] 1820: //TPNLT.L #<data> |A|--2346|-|-*-*-|-----| |0101_110_011_111_011-{data} [TRAPGE.L #<data>] 1821: //TRAPNLT.L #<data> |A|--2346|-|-*-*-|-----| |0101_110_011_111_011-{data} [TRAPGE.L #<data>] 1822: //TRAPGE |-|--2346|-|-*-*-|-----| |0101_110_011_111_100 1823: //TPGE |A|--2346|-|-*-*-|-----| |0101_110_011_111_100 [TRAPGE] 1824: //TPNLT |A|--2346|-|-*-*-|-----| |0101_110_011_111_100 [TRAPGE] 1825: //TRAPNLT |A|--2346|-|-*-*-|-----| |0101_110_011_111_100 [TRAPGE] 1826: case 0b0101_110_011: 1827: irpSge (); 1828: break irpSwitch; 1829: 1830: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1831: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1832: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1833: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1834: //SLT.B <ea> |-|012346|-|-*-*-|-----|D M+-WXZ |0101_110_111_mmm_rrr 1835: //SNGE.B <ea> |A|012346|-|-*-*-|-----|D M+-WXZ |0101_110_111_mmm_rrr [SLT.B <ea>] 1836: //DBLT.W Dr,<label> |-|012346|-|-*-*-|-----| |0101_110_111_001_rrr-{offset} 1837: //DBNGE.W Dr,<label> |A|012346|-|-*-*-|-----| |0101_110_111_001_rrr-{offset} [DBLT.W Dr,<label>] 1838: //TRAPLT.W #<data> |-|--2346|-|-*-*-|-----| |0101_110_111_111_010-{data} 1839: //TPLT.W #<data> |A|--2346|-|-*-*-|-----| |0101_110_111_111_010-{data} [TRAPLT.W #<data>] 1840: //TPNGE.W #<data> |A|--2346|-|-*-*-|-----| |0101_110_111_111_010-{data} [TRAPLT.W #<data>] 1841: //TRAPNGE.W #<data> |A|--2346|-|-*-*-|-----| |0101_110_111_111_010-{data} [TRAPLT.W #<data>] 1842: //TRAPLT.L #<data> |-|--2346|-|-*-*-|-----| |0101_110_111_111_011-{data} 1843: //TPLT.L #<data> |A|--2346|-|-*-*-|-----| |0101_110_111_111_011-{data} [TRAPLT.L #<data>] 1844: //TPNGE.L #<data> |A|--2346|-|-*-*-|-----| |0101_110_111_111_011-{data} [TRAPLT.L #<data>] 1845: //TRAPNGE.L #<data> |A|--2346|-|-*-*-|-----| |0101_110_111_111_011-{data} [TRAPLT.L #<data>] 1846: //TRAPLT |-|--2346|-|-*-*-|-----| |0101_110_111_111_100 1847: //TPLT |A|--2346|-|-*-*-|-----| |0101_110_111_111_100 [TRAPLT] 1848: //TPNGE |A|--2346|-|-*-*-|-----| |0101_110_111_111_100 [TRAPLT] 1849: //TRAPNGE |A|--2346|-|-*-*-|-----| |0101_110_111_111_100 [TRAPLT] 1850: case 0b0101_110_111: 1851: irpSlt (); 1852: break irpSwitch; 1853: 1854: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1855: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1856: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1857: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1858: //SGT.B <ea> |-|012346|-|-***-|-----|D M+-WXZ |0101_111_011_mmm_rrr 1859: //SNLE.B <ea> |A|012346|-|-***-|-----|D M+-WXZ |0101_111_011_mmm_rrr [SGT.B <ea>] 1860: //DBGT.W Dr,<label> |-|012346|-|-***-|-----| |0101_111_011_001_rrr-{offset} 1861: //DBNLE.W Dr,<label> |A|012346|-|-***-|-----| |0101_111_011_001_rrr-{offset} [DBGT.W Dr,<label>] 1862: //TRAPGT.W #<data> |-|--2346|-|-***-|-----| |0101_111_011_111_010-{data} 1863: //TPGT.W #<data> |A|--2346|-|-***-|-----| |0101_111_011_111_010-{data} [TRAPGT.W #<data>] 1864: //TPNLE.W #<data> |A|--2346|-|-***-|-----| |0101_111_011_111_010-{data} [TRAPGT.W #<data>] 1865: //TRAPNLE.W #<data> |A|--2346|-|-***-|-----| |0101_111_011_111_010-{data} [TRAPGT.W #<data>] 1866: //TRAPGT.L #<data> |-|--2346|-|-***-|-----| |0101_111_011_111_011-{data} 1867: //TPGT.L #<data> |A|--2346|-|-***-|-----| |0101_111_011_111_011-{data} [TRAPGT.L #<data>] 1868: //TPNLE.L #<data> |A|--2346|-|-***-|-----| |0101_111_011_111_011-{data} [TRAPGT.L #<data>] 1869: //TRAPNLE.L #<data> |A|--2346|-|-***-|-----| |0101_111_011_111_011-{data} [TRAPGT.L #<data>] 1870: //TRAPGT |-|--2346|-|-***-|-----| |0101_111_011_111_100 1871: //TPGT |A|--2346|-|-***-|-----| |0101_111_011_111_100 [TRAPGT] 1872: //TPNLE |A|--2346|-|-***-|-----| |0101_111_011_111_100 [TRAPGT] 1873: //TRAPNLE |A|--2346|-|-***-|-----| |0101_111_011_111_100 [TRAPGT] 1874: case 0b0101_111_011: 1875: irpSgt (); 1876: break irpSwitch; 1877: 1878: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1879: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1880: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1881: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1882: //SLE.B <ea> |-|012346|-|-***-|-----|D M+-WXZ |0101_111_111_mmm_rrr 1883: //SNGT.B <ea> |A|012346|-|-***-|-----|D M+-WXZ |0101_111_111_mmm_rrr [SLE.B <ea>] 1884: //DBLE.W Dr,<label> |-|012346|-|-***-|-----| |0101_111_111_001_rrr-{offset} 1885: //DBNGT.W Dr,<label> |A|012346|-|-***-|-----| |0101_111_111_001_rrr-{offset} [DBLE.W Dr,<label>] 1886: //TRAPLE.W #<data> |-|--2346|-|-***-|-----| |0101_111_111_111_010-{data} 1887: //TPLE.W #<data> |A|--2346|-|-***-|-----| |0101_111_111_111_010-{data} [TRAPLE.W #<data>] 1888: //TPNGT.W #<data> |A|--2346|-|-***-|-----| |0101_111_111_111_010-{data} [TRAPLE.W #<data>] 1889: //TRAPNGT.W #<data> |A|--2346|-|-***-|-----| |0101_111_111_111_010-{data} [TRAPLE.W #<data>] 1890: //TRAPLE.L #<data> |-|--2346|-|-***-|-----| |0101_111_111_111_011-{data} 1891: //TPLE.L #<data> |A|--2346|-|-***-|-----| |0101_111_111_111_011-{data} [TRAPLE.L #<data>] 1892: //TPNGT.L #<data> |A|--2346|-|-***-|-----| |0101_111_111_111_011-{data} [TRAPLE.L #<data>] 1893: //TRAPNGT.L #<data> |A|--2346|-|-***-|-----| |0101_111_111_111_011-{data} [TRAPLE.L #<data>] 1894: //TRAPLE |-|--2346|-|-***-|-----| |0101_111_111_111_100 1895: //TPLE |A|--2346|-|-***-|-----| |0101_111_111_111_100 [TRAPLE] 1896: //TPNGT |A|--2346|-|-***-|-----| |0101_111_111_111_100 [TRAPLE] 1897: //TRAPNGT |A|--2346|-|-***-|-----| |0101_111_111_111_100 [TRAPLE] 1898: case 0b0101_111_111: 1899: irpSle (); 1900: break irpSwitch; 1901: 1902: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1903: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1904: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1905: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1906: //BRA.W <label> |-|012346|-|-----|-----| |0110_000_000_000_000-{offset} 1907: //JBRA.W <label> |A|012346|-|-----|-----| |0110_000_000_000_000-{offset} [BRA.W <label>] 1908: //BRA.S <label> |-|012346|-|-----|-----| |0110_000_000_sss_sss (s is not equal to 0) 1909: //JBRA.S <label> |A|012346|-|-----|-----| |0110_000_000_sss_sss (s is not equal to 0) [BRA.S <label>] 1910: case 0b0110_000_000: 1911: irpBrasw (); 1912: break irpSwitch; 1913: 1914: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1915: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1916: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1917: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1918: //BRA.S <label> |-|012346|-|-----|-----| |0110_000_001_sss_sss 1919: //JBRA.S <label> |A|012346|-|-----|-----| |0110_000_001_sss_sss [BRA.S <label>] 1920: case 0b0110_000_001: 1921: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1922: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1923: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1924: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1925: //BRA.S <label> |-|012346|-|-----|-----| |0110_000_010_sss_sss 1926: //JBRA.S <label> |A|012346|-|-----|-----| |0110_000_010_sss_sss [BRA.S <label>] 1927: case 0b0110_000_010: 1928: irpBras (); 1929: break irpSwitch; 1930: 1931: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1932: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1933: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1934: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1935: //BRA.S <label> |-|--2346|-|-----|-----| |0110_000_011_sss_sss (s is not equal to 63) 1936: //JBRA.S <label> |A|--2346|-|-----|-----| |0110_000_011_sss_sss (s is not equal to 63) [BRA.S <label>] 1937: //BRA.L <label> |-|--2346|-|-----|-----| |0110_000_011_111_111-{offset} 1938: case 0b0110_000_011: 1939: irpBrasl (); 1940: break irpSwitch; 1941: 1942: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1943: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1944: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1945: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1946: //BSR.W <label> |-|012346|-|-----|-----| |0110_000_100_000_000-{offset} 1947: //JBSR.W <label> |A|012346|-|-----|-----| |0110_000_100_000_000-{offset} [BSR.W <label>] 1948: //BSR.S <label> |-|012346|-|-----|-----| |0110_000_100_sss_sss (s is not equal to 0) 1949: //JBSR.S <label> |A|012346|-|-----|-----| |0110_000_100_sss_sss (s is not equal to 0) [BSR.S <label>] 1950: case 0b0110_000_100: 1951: irpBsrsw (); 1952: break irpSwitch; 1953: 1954: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1955: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1956: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1957: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1958: //BSR.S <label> |-|012346|-|-----|-----| |0110_000_101_sss_sss 1959: //JBSR.S <label> |A|012346|-|-----|-----| |0110_000_101_sss_sss [BSR.S <label>] 1960: case 0b0110_000_101: 1961: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1962: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1963: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1964: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1965: //BSR.S <label> |-|012346|-|-----|-----| |0110_000_110_sss_sss 1966: //JBSR.S <label> |A|012346|-|-----|-----| |0110_000_110_sss_sss [BSR.S <label>] 1967: case 0b0110_000_110: 1968: irpBsrs (); 1969: break irpSwitch; 1970: 1971: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1972: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1973: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1974: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1975: //BSR.S <label> |-|--2346|-|-----|-----| |0110_000_111_sss_sss (s is not equal to 63) 1976: //JBSR.S <label> |A|--2346|-|-----|-----| |0110_000_111_sss_sss (s is not equal to 63) [BSR.S <label>] 1977: //BSR.L <label> |-|--2346|-|-----|-----| |0110_000_111_111_111-{offset} 1978: case 0b0110_000_111: 1979: irpBsrsl (); 1980: break irpSwitch; 1981: 1982: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1983: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1984: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1985: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1986: //BHI.W <label> |-|012346|-|--*-*|-----| |0110_001_000_000_000-{offset} 1987: //BNLS.W <label> |A|012346|-|--*-*|-----| |0110_001_000_000_000-{offset} [BHI.W <label>] 1988: //JBHI.W <label> |A|012346|-|--*-*|-----| |0110_001_000_000_000-{offset} [BHI.W <label>] 1989: //JBNLS.W <label> |A|012346|-|--*-*|-----| |0110_001_000_000_000-{offset} [BHI.W <label>] 1990: //BHI.S <label> |-|012346|-|--*-*|-----| |0110_001_000_sss_sss (s is not equal to 0) 1991: //BNLS.S <label> |A|012346|-|--*-*|-----| |0110_001_000_sss_sss (s is not equal to 0) [BHI.S <label>] 1992: //JBHI.S <label> |A|012346|-|--*-*|-----| |0110_001_000_sss_sss (s is not equal to 0) [BHI.S <label>] 1993: //JBNLS.S <label> |A|012346|-|--*-*|-----| |0110_001_000_sss_sss (s is not equal to 0) [BHI.S <label>] 1994: //JBLS.L <label> |A|012346|-|--*-*|-----| |0110_001_000_000_110-0100111011111001-{address} [BHI.S (*)+8;JMP <label>] 1995: //JBNHI.L <label> |A|012346|-|--*-*|-----| |0110_001_000_000_110-0100111011111001-{address} [BHI.S (*)+8;JMP <label>] 1996: case 0b0110_001_000: 1997: irpBhisw (); 1998: break irpSwitch; 1999: 2000: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2001: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2002: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2003: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2004: //BHI.S <label> |-|012346|-|--*-*|-----| |0110_001_001_sss_sss 2005: //BNLS.S <label> |A|012346|-|--*-*|-----| |0110_001_001_sss_sss [BHI.S <label>] 2006: //JBHI.S <label> |A|012346|-|--*-*|-----| |0110_001_001_sss_sss [BHI.S <label>] 2007: //JBNLS.S <label> |A|012346|-|--*-*|-----| |0110_001_001_sss_sss [BHI.S <label>] 2008: case 0b0110_001_001: 2009: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2010: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2011: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2012: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2013: //BHI.S <label> |-|012346|-|--*-*|-----| |0110_001_010_sss_sss 2014: //BNLS.S <label> |A|012346|-|--*-*|-----| |0110_001_010_sss_sss [BHI.S <label>] 2015: //JBHI.S <label> |A|012346|-|--*-*|-----| |0110_001_010_sss_sss [BHI.S <label>] 2016: //JBNLS.S <label> |A|012346|-|--*-*|-----| |0110_001_010_sss_sss [BHI.S <label>] 2017: case 0b0110_001_010: 2018: irpBhis (); 2019: break irpSwitch; 2020: 2021: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2022: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2023: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2024: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2025: //BHI.S <label> |-|--2346|-|--*-*|-----| |0110_001_011_sss_sss (s is not equal to 63) 2026: //BNLS.S <label> |A|--2346|-|--*-*|-----| |0110_001_011_sss_sss (s is not equal to 63) [BHI.S <label>] 2027: //JBHI.S <label> |A|--2346|-|--*-*|-----| |0110_001_011_sss_sss (s is not equal to 63) [BHI.S <label>] 2028: //JBNLS.S <label> |A|--2346|-|--*-*|-----| |0110_001_011_sss_sss (s is not equal to 63) [BHI.S <label>] 2029: //BHI.L <label> |-|--2346|-|--*-*|-----| |0110_001_011_111_111-{offset} 2030: //BNLS.L <label> |A|--2346|-|--*-*|-----| |0110_001_011_111_111-{offset} [BHI.L <label>] 2031: case 0b0110_001_011: 2032: irpBhisl (); 2033: break irpSwitch; 2034: 2035: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2036: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2037: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2038: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2039: //BLS.W <label> |-|012346|-|--*-*|-----| |0110_001_100_000_000-{offset} 2040: //BNHI.W <label> |A|012346|-|--*-*|-----| |0110_001_100_000_000-{offset} [BLS.W <label>] 2041: //JBLS.W <label> |A|012346|-|--*-*|-----| |0110_001_100_000_000-{offset} [BLS.W <label>] 2042: //JBNHI.W <label> |A|012346|-|--*-*|-----| |0110_001_100_000_000-{offset} [BLS.W <label>] 2043: //BLS.S <label> |-|012346|-|--*-*|-----| |0110_001_100_sss_sss (s is not equal to 0) 2044: //BNHI.S <label> |A|012346|-|--*-*|-----| |0110_001_100_sss_sss (s is not equal to 0) [BLS.S <label>] 2045: //JBLS.S <label> |A|012346|-|--*-*|-----| |0110_001_100_sss_sss (s is not equal to 0) [BLS.S <label>] 2046: //JBNHI.S <label> |A|012346|-|--*-*|-----| |0110_001_100_sss_sss (s is not equal to 0) [BLS.S <label>] 2047: //JBHI.L <label> |A|012346|-|--*-*|-----| |0110_001_100_000_110-0100111011111001-{address} [BLS.S (*)+8;JMP <label>] 2048: //JBNLS.L <label> |A|012346|-|--*-*|-----| |0110_001_100_000_110-0100111011111001-{address} [BLS.S (*)+8;JMP <label>] 2049: case 0b0110_001_100: 2050: irpBlssw (); 2051: break irpSwitch; 2052: 2053: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2054: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2055: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2056: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2057: //BLS.S <label> |-|012346|-|--*-*|-----| |0110_001_101_sss_sss 2058: //BNHI.S <label> |A|012346|-|--*-*|-----| |0110_001_101_sss_sss [BLS.S <label>] 2059: //JBLS.S <label> |A|012346|-|--*-*|-----| |0110_001_101_sss_sss [BLS.S <label>] 2060: //JBNHI.S <label> |A|012346|-|--*-*|-----| |0110_001_101_sss_sss [BLS.S <label>] 2061: case 0b0110_001_101: 2062: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2063: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2064: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2065: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2066: //BLS.S <label> |-|012346|-|--*-*|-----| |0110_001_110_sss_sss 2067: //BNHI.S <label> |A|012346|-|--*-*|-----| |0110_001_110_sss_sss [BLS.S <label>] 2068: //JBLS.S <label> |A|012346|-|--*-*|-----| |0110_001_110_sss_sss [BLS.S <label>] 2069: //JBNHI.S <label> |A|012346|-|--*-*|-----| |0110_001_110_sss_sss [BLS.S <label>] 2070: case 0b0110_001_110: 2071: irpBlss (); 2072: break irpSwitch; 2073: 2074: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2075: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2076: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2077: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2078: //BLS.S <label> |-|--2346|-|--*-*|-----| |0110_001_111_sss_sss (s is not equal to 63) 2079: //BNHI.S <label> |A|--2346|-|--*-*|-----| |0110_001_111_sss_sss (s is not equal to 63) [BLS.S <label>] 2080: //JBLS.S <label> |A|--2346|-|--*-*|-----| |0110_001_111_sss_sss (s is not equal to 63) [BLS.S <label>] 2081: //JBNHI.S <label> |A|--2346|-|--*-*|-----| |0110_001_111_sss_sss (s is not equal to 63) [BLS.S <label>] 2082: //BLS.L <label> |-|--2346|-|--*-*|-----| |0110_001_111_111_111-{offset} 2083: //BNHI.L <label> |A|--2346|-|--*-*|-----| |0110_001_111_111_111-{offset} [BLS.L <label>] 2084: case 0b0110_001_111: 2085: irpBlssl (); 2086: break irpSwitch; 2087: 2088: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2089: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2090: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2091: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2092: //BCC.W <label> |-|012346|-|----*|-----| |0110_010_000_000_000-{offset} 2093: //BHS.W <label> |A|012346|-|----*|-----| |0110_010_000_000_000-{offset} [BCC.W <label>] 2094: //BNCS.W <label> |A|012346|-|----*|-----| |0110_010_000_000_000-{offset} [BCC.W <label>] 2095: //BNLO.W <label> |A|012346|-|----*|-----| |0110_010_000_000_000-{offset} [BCC.W <label>] 2096: //JBCC.W <label> |A|012346|-|----*|-----| |0110_010_000_000_000-{offset} [BCC.W <label>] 2097: //JBHS.W <label> |A|012346|-|----*|-----| |0110_010_000_000_000-{offset} [BCC.W <label>] 2098: //JBNCS.W <label> |A|012346|-|----*|-----| |0110_010_000_000_000-{offset} [BCC.W <label>] 2099: //JBNLO.W <label> |A|012346|-|----*|-----| |0110_010_000_000_000-{offset} [BCC.W <label>] 2100: //BCC.S <label> |-|012346|-|----*|-----| |0110_010_000_sss_sss (s is not equal to 0) 2101: //BHS.S <label> |A|012346|-|----*|-----| |0110_010_000_sss_sss (s is not equal to 0) [BCC.S <label>] 2102: //BNCS.S <label> |A|012346|-|----*|-----| |0110_010_000_sss_sss (s is not equal to 0) [BCC.S <label>] 2103: //BNLO.S <label> |A|012346|-|----*|-----| |0110_010_000_sss_sss (s is not equal to 0) [BCC.S <label>] 2104: //JBCC.S <label> |A|012346|-|----*|-----| |0110_010_000_sss_sss (s is not equal to 0) [BCC.S <label>] 2105: //JBHS.S <label> |A|012346|-|----*|-----| |0110_010_000_sss_sss (s is not equal to 0) [BCC.S <label>] 2106: //JBNCS.S <label> |A|012346|-|----*|-----| |0110_010_000_sss_sss (s is not equal to 0) [BCC.S <label>] 2107: //JBNLO.S <label> |A|012346|-|----*|-----| |0110_010_000_sss_sss (s is not equal to 0) [BCC.S <label>] 2108: //JBCS.L <label> |A|012346|-|----*|-----| |0110_010_000_000_110-0100111011111001-{address} [BCC.S (*)+8;JMP <label>] 2109: //JBLO.L <label> |A|012346|-|----*|-----| |0110_010_000_000_110-0100111011111001-{address} [BCC.S (*)+8;JMP <label>] 2110: //JBNCC.L <label> |A|012346|-|----*|-----| |0110_010_000_000_110-0100111011111001-{address} [BCC.S (*)+8;JMP <label>] 2111: //JBNHS.L <label> |A|012346|-|----*|-----| |0110_010_000_000_110-0100111011111001-{address} [BCC.S (*)+8;JMP <label>] 2112: case 0b0110_010_000: 2113: irpBhssw (); 2114: break irpSwitch; 2115: 2116: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2117: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2118: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2119: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2120: //BCC.S <label> |-|012346|-|----*|-----| |0110_010_001_sss_sss 2121: //BHS.S <label> |A|012346|-|----*|-----| |0110_010_001_sss_sss [BCC.S <label>] 2122: //BNCS.S <label> |A|012346|-|----*|-----| |0110_010_001_sss_sss [BCC.S <label>] 2123: //BNLO.S <label> |A|012346|-|----*|-----| |0110_010_001_sss_sss [BCC.S <label>] 2124: //JBCC.S <label> |A|012346|-|----*|-----| |0110_010_001_sss_sss [BCC.S <label>] 2125: //JBHS.S <label> |A|012346|-|----*|-----| |0110_010_001_sss_sss [BCC.S <label>] 2126: //JBNCS.S <label> |A|012346|-|----*|-----| |0110_010_001_sss_sss [BCC.S <label>] 2127: //JBNLO.S <label> |A|012346|-|----*|-----| |0110_010_001_sss_sss [BCC.S <label>] 2128: case 0b0110_010_001: 2129: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2130: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2131: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2132: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2133: //BCC.S <label> |-|012346|-|----*|-----| |0110_010_010_sss_sss 2134: //BHS.S <label> |A|012346|-|----*|-----| |0110_010_010_sss_sss [BCC.S <label>] 2135: //BNCS.S <label> |A|012346|-|----*|-----| |0110_010_010_sss_sss [BCC.S <label>] 2136: //BNLO.S <label> |A|012346|-|----*|-----| |0110_010_010_sss_sss [BCC.S <label>] 2137: //JBCC.S <label> |A|012346|-|----*|-----| |0110_010_010_sss_sss [BCC.S <label>] 2138: //JBHS.S <label> |A|012346|-|----*|-----| |0110_010_010_sss_sss [BCC.S <label>] 2139: //JBNCS.S <label> |A|012346|-|----*|-----| |0110_010_010_sss_sss [BCC.S <label>] 2140: //JBNLO.S <label> |A|012346|-|----*|-----| |0110_010_010_sss_sss [BCC.S <label>] 2141: case 0b0110_010_010: 2142: irpBhss (); 2143: break irpSwitch; 2144: 2145: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2146: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2147: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2148: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2149: //BCC.S <label> |-|--2346|-|----*|-----| |0110_010_011_sss_sss (s is not equal to 63) 2150: //BHS.S <label> |A|--2346|-|----*|-----| |0110_010_011_sss_sss (s is not equal to 63) [BCC.S <label>] 2151: //BNCS.S <label> |A|--2346|-|----*|-----| |0110_010_011_sss_sss (s is not equal to 63) [BCC.S <label>] 2152: //BNLO.S <label> |A|--2346|-|----*|-----| |0110_010_011_sss_sss (s is not equal to 63) [BCC.S <label>] 2153: //JBCC.S <label> |A|--2346|-|----*|-----| |0110_010_011_sss_sss (s is not equal to 63) [BCC.S <label>] 2154: //JBHS.S <label> |A|--2346|-|----*|-----| |0110_010_011_sss_sss (s is not equal to 63) [BCC.S <label>] 2155: //JBNCS.S <label> |A|--2346|-|----*|-----| |0110_010_011_sss_sss (s is not equal to 63) [BCC.S <label>] 2156: //JBNLO.S <label> |A|--2346|-|----*|-----| |0110_010_011_sss_sss (s is not equal to 63) [BCC.S <label>] 2157: //BCC.L <label> |-|--2346|-|----*|-----| |0110_010_011_111_111-{offset} 2158: //BHS.L <label> |A|--2346|-|----*|-----| |0110_010_011_111_111-{offset} [BCC.L <label>] 2159: //BNCS.L <label> |A|--2346|-|----*|-----| |0110_010_011_111_111-{offset} [BCC.L <label>] 2160: //BNLO.L <label> |A|--2346|-|----*|-----| |0110_010_011_111_111-{offset} [BCC.L <label>] 2161: case 0b0110_010_011: 2162: irpBhssl (); 2163: break irpSwitch; 2164: 2165: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2166: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2167: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2168: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2169: //BCS.W <label> |-|012346|-|----*|-----| |0110_010_100_000_000-{offset} 2170: //BLO.W <label> |A|012346|-|----*|-----| |0110_010_100_000_000-{offset} [BCS.W <label>] 2171: //BNCC.W <label> |A|012346|-|----*|-----| |0110_010_100_000_000-{offset} [BCS.W <label>] 2172: //BNHS.W <label> |A|012346|-|----*|-----| |0110_010_100_000_000-{offset} [BCS.W <label>] 2173: //JBCS.W <label> |A|012346|-|----*|-----| |0110_010_100_000_000-{offset} [BCS.W <label>] 2174: //JBLO.W <label> |A|012346|-|----*|-----| |0110_010_100_000_000-{offset} [BCS.W <label>] 2175: //JBNCC.W <label> |A|012346|-|----*|-----| |0110_010_100_000_000-{offset} [BCS.W <label>] 2176: //JBNHS.W <label> |A|012346|-|----*|-----| |0110_010_100_000_000-{offset} [BCS.W <label>] 2177: //BCS.S <label> |-|012346|-|----*|-----| |0110_010_100_sss_sss (s is not equal to 0) 2178: //BLO.S <label> |A|012346|-|----*|-----| |0110_010_100_sss_sss (s is not equal to 0) [BCS.S <label>] 2179: //BNCC.S <label> |A|012346|-|----*|-----| |0110_010_100_sss_sss (s is not equal to 0) [BCS.S <label>] 2180: //BNHS.S <label> |A|012346|-|----*|-----| |0110_010_100_sss_sss (s is not equal to 0) [BCS.S <label>] 2181: //JBCS.S <label> |A|012346|-|----*|-----| |0110_010_100_sss_sss (s is not equal to 0) [BCS.S <label>] 2182: //JBLO.S <label> |A|012346|-|----*|-----| |0110_010_100_sss_sss (s is not equal to 0) [BCS.S <label>] 2183: //JBNCC.S <label> |A|012346|-|----*|-----| |0110_010_100_sss_sss (s is not equal to 0) [BCS.S <label>] 2184: //JBNHS.S <label> |A|012346|-|----*|-----| |0110_010_100_sss_sss (s is not equal to 0) [BCS.S <label>] 2185: //JBCC.L <label> |A|012346|-|----*|-----| |0110_010_100_000_110-0100111011111001-{address} [BCS.S (*)+8;JMP <label>] 2186: //JBHS.L <label> |A|012346|-|----*|-----| |0110_010_100_000_110-0100111011111001-{address} [BCS.S (*)+8;JMP <label>] 2187: //JBNCS.L <label> |A|012346|-|----*|-----| |0110_010_100_000_110-0100111011111001-{address} [BCS.S (*)+8;JMP <label>] 2188: //JBNLO.L <label> |A|012346|-|----*|-----| |0110_010_100_000_110-0100111011111001-{address} [BCS.S (*)+8;JMP <label>] 2189: case 0b0110_010_100: 2190: irpBlosw (); 2191: break irpSwitch; 2192: 2193: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2194: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2195: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2196: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2197: //BCS.S <label> |-|012346|-|----*|-----| |0110_010_101_sss_sss 2198: //BLO.S <label> |A|012346|-|----*|-----| |0110_010_101_sss_sss [BCS.S <label>] 2199: //BNCC.S <label> |A|012346|-|----*|-----| |0110_010_101_sss_sss [BCS.S <label>] 2200: //BNHS.S <label> |A|012346|-|----*|-----| |0110_010_101_sss_sss [BCS.S <label>] 2201: //JBCS.S <label> |A|012346|-|----*|-----| |0110_010_101_sss_sss [BCS.S <label>] 2202: //JBLO.S <label> |A|012346|-|----*|-----| |0110_010_101_sss_sss [BCS.S <label>] 2203: //JBNCC.S <label> |A|012346|-|----*|-----| |0110_010_101_sss_sss [BCS.S <label>] 2204: //JBNHS.S <label> |A|012346|-|----*|-----| |0110_010_101_sss_sss [BCS.S <label>] 2205: case 0b0110_010_101: 2206: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2207: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2208: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2209: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2210: //BCS.S <label> |-|012346|-|----*|-----| |0110_010_110_sss_sss 2211: //BLO.S <label> |A|012346|-|----*|-----| |0110_010_110_sss_sss [BCS.S <label>] 2212: //BNCC.S <label> |A|012346|-|----*|-----| |0110_010_110_sss_sss [BCS.S <label>] 2213: //BNHS.S <label> |A|012346|-|----*|-----| |0110_010_110_sss_sss [BCS.S <label>] 2214: //JBCS.S <label> |A|012346|-|----*|-----| |0110_010_110_sss_sss [BCS.S <label>] 2215: //JBLO.S <label> |A|012346|-|----*|-----| |0110_010_110_sss_sss [BCS.S <label>] 2216: //JBNCC.S <label> |A|012346|-|----*|-----| |0110_010_110_sss_sss [BCS.S <label>] 2217: //JBNHS.S <label> |A|012346|-|----*|-----| |0110_010_110_sss_sss [BCS.S <label>] 2218: case 0b0110_010_110: 2219: irpBlos (); 2220: break irpSwitch; 2221: 2222: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2223: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2224: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2225: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2226: //BCS.S <label> |-|--2346|-|----*|-----| |0110_010_111_sss_sss (s is not equal to 63) 2227: //BLO.S <label> |A|--2346|-|----*|-----| |0110_010_111_sss_sss (s is not equal to 63) [BCS.S <label>] 2228: //BNCC.S <label> |A|--2346|-|----*|-----| |0110_010_111_sss_sss (s is not equal to 63) [BCS.S <label>] 2229: //BNHS.S <label> |A|--2346|-|----*|-----| |0110_010_111_sss_sss (s is not equal to 63) [BCS.S <label>] 2230: //JBCS.S <label> |A|--2346|-|----*|-----| |0110_010_111_sss_sss (s is not equal to 63) [BCS.S <label>] 2231: //JBLO.S <label> |A|--2346|-|----*|-----| |0110_010_111_sss_sss (s is not equal to 63) [BCS.S <label>] 2232: //JBNCC.S <label> |A|--2346|-|----*|-----| |0110_010_111_sss_sss (s is not equal to 63) [BCS.S <label>] 2233: //JBNHS.S <label> |A|--2346|-|----*|-----| |0110_010_111_sss_sss (s is not equal to 63) [BCS.S <label>] 2234: //BCS.L <label> |-|--2346|-|----*|-----| |0110_010_111_111_111-{offset} 2235: //BLO.L <label> |A|--2346|-|----*|-----| |0110_010_111_111_111-{offset} [BCS.L <label>] 2236: //BNCC.L <label> |A|--2346|-|----*|-----| |0110_010_111_111_111-{offset} [BCS.L <label>] 2237: //BNHS.L <label> |A|--2346|-|----*|-----| |0110_010_111_111_111-{offset} [BCS.L <label>] 2238: case 0b0110_010_111: 2239: irpBlosl (); 2240: break irpSwitch; 2241: 2242: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2243: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2244: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2245: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2246: //BNE.W <label> |-|012346|-|--*--|-----| |0110_011_000_000_000-{offset} 2247: //BNEQ.W <label> |A|012346|-|--*--|-----| |0110_011_000_000_000-{offset} [BNE.W <label>] 2248: //BNZ.W <label> |A|012346|-|--*--|-----| |0110_011_000_000_000-{offset} [BNE.W <label>] 2249: //BNZE.W <label> |A|012346|-|--*--|-----| |0110_011_000_000_000-{offset} [BNE.W <label>] 2250: //JBNE.W <label> |A|012346|-|--*--|-----| |0110_011_000_000_000-{offset} [BNE.W <label>] 2251: //JBNEQ.W <label> |A|012346|-|--*--|-----| |0110_011_000_000_000-{offset} [BNE.W <label>] 2252: //JBNZ.W <label> |A|012346|-|--*--|-----| |0110_011_000_000_000-{offset} [BNE.W <label>] 2253: //JBNZE.W <label> |A|012346|-|--*--|-----| |0110_011_000_000_000-{offset} [BNE.W <label>] 2254: //BNE.S <label> |-|012346|-|--*--|-----| |0110_011_000_sss_sss (s is not equal to 0) 2255: //BNEQ.S <label> |A|012346|-|--*--|-----| |0110_011_000_sss_sss (s is not equal to 0) [BNE.S <label>] 2256: //BNZ.S <label> |A|012346|-|--*--|-----| |0110_011_000_sss_sss (s is not equal to 0) [BNE.S <label>] 2257: //BNZE.S <label> |A|012346|-|--*--|-----| |0110_011_000_sss_sss (s is not equal to 0) [BNE.S <label>] 2258: //JBNE.S <label> |A|012346|-|--*--|-----| |0110_011_000_sss_sss (s is not equal to 0) [BNE.S <label>] 2259: //JBNEQ.S <label> |A|012346|-|--*--|-----| |0110_011_000_sss_sss (s is not equal to 0) [BNE.S <label>] 2260: //JBNZ.S <label> |A|012346|-|--*--|-----| |0110_011_000_sss_sss (s is not equal to 0) [BNE.S <label>] 2261: //JBNZE.S <label> |A|012346|-|--*--|-----| |0110_011_000_sss_sss (s is not equal to 0) [BNE.S <label>] 2262: //JBEQ.L <label> |A|012346|-|--*--|-----| |0110_011_000_000_110-0100111011111001-{address} [BNE.S (*)+8;JMP <label>] 2263: //JBNEQ.L <label> |A|012346|-|--*--|-----| |0110_011_000_000_110-0100111011111001-{address} [BNE.S (*)+8;JMP <label>] 2264: //JBNNE.L <label> |A|012346|-|--*--|-----| |0110_011_000_000_110-0100111011111001-{address} [BNE.S (*)+8;JMP <label>] 2265: //JBNNZ.L <label> |A|012346|-|--*--|-----| |0110_011_000_000_110-0100111011111001-{address} [BNE.S (*)+8;JMP <label>] 2266: //JBNZ.L <label> |A|012346|-|--*--|-----| |0110_011_000_000_110-0100111011111001-{address} [BNE.S (*)+8;JMP <label>] 2267: //JBNZE.L <label> |A|012346|-|--*--|-----| |0110_011_000_000_110-0100111011111001-{address} [BNE.S (*)+8;JMP <label>] 2268: //JBZE.L <label> |A|012346|-|--*--|-----| |0110_011_000_000_110-0100111011111001-{address} [BNE.S (*)+8;JMP <label>] 2269: case 0b0110_011_000: 2270: irpBnesw (); 2271: break irpSwitch; 2272: 2273: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2274: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2275: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2276: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2277: //BNE.S <label> |-|012346|-|--*--|-----| |0110_011_001_sss_sss 2278: //BNEQ.S <label> |A|012346|-|--*--|-----| |0110_011_001_sss_sss [BNE.S <label>] 2279: //BNZ.S <label> |A|012346|-|--*--|-----| |0110_011_001_sss_sss [BNE.S <label>] 2280: //BNZE.S <label> |A|012346|-|--*--|-----| |0110_011_001_sss_sss [BNE.S <label>] 2281: //JBNE.S <label> |A|012346|-|--*--|-----| |0110_011_001_sss_sss [BNE.S <label>] 2282: //JBNEQ.S <label> |A|012346|-|--*--|-----| |0110_011_001_sss_sss [BNE.S <label>] 2283: //JBNZ.S <label> |A|012346|-|--*--|-----| |0110_011_001_sss_sss [BNE.S <label>] 2284: //JBNZE.S <label> |A|012346|-|--*--|-----| |0110_011_001_sss_sss [BNE.S <label>] 2285: case 0b0110_011_001: 2286: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2287: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2288: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2289: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2290: //BNE.S <label> |-|012346|-|--*--|-----| |0110_011_010_sss_sss 2291: //BNEQ.S <label> |A|012346|-|--*--|-----| |0110_011_010_sss_sss [BNE.S <label>] 2292: //BNZ.S <label> |A|012346|-|--*--|-----| |0110_011_010_sss_sss [BNE.S <label>] 2293: //BNZE.S <label> |A|012346|-|--*--|-----| |0110_011_010_sss_sss [BNE.S <label>] 2294: //JBNE.S <label> |A|012346|-|--*--|-----| |0110_011_010_sss_sss [BNE.S <label>] 2295: //JBNEQ.S <label> |A|012346|-|--*--|-----| |0110_011_010_sss_sss [BNE.S <label>] 2296: //JBNZ.S <label> |A|012346|-|--*--|-----| |0110_011_010_sss_sss [BNE.S <label>] 2297: //JBNZE.S <label> |A|012346|-|--*--|-----| |0110_011_010_sss_sss [BNE.S <label>] 2298: case 0b0110_011_010: 2299: irpBnes (); 2300: break irpSwitch; 2301: 2302: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2303: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2304: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2305: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2306: //BNE.S <label> |-|--2346|-|--*--|-----| |0110_011_011_sss_sss (s is not equal to 63) 2307: //BNEQ.S <label> |A|--2346|-|--*--|-----| |0110_011_011_sss_sss (s is not equal to 63) [BNE.S <label>] 2308: //BNZ.S <label> |A|--2346|-|--*--|-----| |0110_011_011_sss_sss (s is not equal to 63) [BNE.S <label>] 2309: //BNZE.S <label> |A|--2346|-|--*--|-----| |0110_011_011_sss_sss (s is not equal to 63) [BNE.S <label>] 2310: //JBNE.S <label> |A|--2346|-|--*--|-----| |0110_011_011_sss_sss (s is not equal to 63) [BNE.S <label>] 2311: //JBNEQ.S <label> |A|--2346|-|--*--|-----| |0110_011_011_sss_sss (s is not equal to 63) [BNE.S <label>] 2312: //JBNZ.S <label> |A|--2346|-|--*--|-----| |0110_011_011_sss_sss (s is not equal to 63) [BNE.S <label>] 2313: //JBNZE.S <label> |A|--2346|-|--*--|-----| |0110_011_011_sss_sss (s is not equal to 63) [BNE.S <label>] 2314: //BNE.L <label> |-|--2346|-|--*--|-----| |0110_011_011_111_111-{offset} 2315: //BNEQ.L <label> |A|--2346|-|--*--|-----| |0110_011_011_111_111-{offset} [BNE.L <label>] 2316: //BNZ.L <label> |A|--2346|-|--*--|-----| |0110_011_011_111_111-{offset} [BNE.L <label>] 2317: //BNZE.L <label> |A|--2346|-|--*--|-----| |0110_011_011_111_111-{offset} [BNE.L <label>] 2318: case 0b0110_011_011: 2319: irpBnesl (); 2320: break irpSwitch; 2321: 2322: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2323: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2324: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2325: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2326: //BEQ.W <label> |-|012346|-|--*--|-----| |0110_011_100_000_000-{offset} 2327: //BNNE.W <label> |A|012346|-|--*--|-----| |0110_011_100_000_000-{offset} [BEQ.W <label>] 2328: //BNNZ.W <label> |A|012346|-|--*--|-----| |0110_011_100_000_000-{offset} [BEQ.W <label>] 2329: //BZE.W <label> |A|012346|-|--*--|-----| |0110_011_100_000_000-{offset} [BEQ.W <label>] 2330: //JBEQ.W <label> |A|012346|-|--*--|-----| |0110_011_100_000_000-{offset} [BEQ.W <label>] 2331: //JBNNE.W <label> |A|012346|-|--*--|-----| |0110_011_100_000_000-{offset} [BEQ.W <label>] 2332: //JBNNZ.W <label> |A|012346|-|--*--|-----| |0110_011_100_000_000-{offset} [BEQ.W <label>] 2333: //JBZE.W <label> |A|012346|-|--*--|-----| |0110_011_100_000_000-{offset} [BEQ.W <label>] 2334: //BEQ.S <label> |-|012346|-|--*--|-----| |0110_011_100_sss_sss (s is not equal to 0) 2335: //BNNE.S <label> |A|012346|-|--*--|-----| |0110_011_100_sss_sss (s is not equal to 0) [BEQ.S <label>] 2336: //BNNZ.S <label> |A|012346|-|--*--|-----| |0110_011_100_sss_sss (s is not equal to 0) [BEQ.S <label>] 2337: //BZE.S <label> |A|012346|-|--*--|-----| |0110_011_100_sss_sss (s is not equal to 0) [BEQ.S <label>] 2338: //JBEQ.S <label> |A|012346|-|--*--|-----| |0110_011_100_sss_sss (s is not equal to 0) [BEQ.S <label>] 2339: //JBNNE.S <label> |A|012346|-|--*--|-----| |0110_011_100_sss_sss (s is not equal to 0) [BEQ.S <label>] 2340: //JBNNZ.S <label> |A|012346|-|--*--|-----| |0110_011_100_sss_sss (s is not equal to 0) [BEQ.S <label>] 2341: //JBZE.S <label> |A|012346|-|--*--|-----| |0110_011_100_sss_sss (s is not equal to 0) [BEQ.S <label>] 2342: //JBNE.L <label> |A|012346|-|--*--|-----| |0110_011_100_000_110-0100111011111001-{address} [BEQ.S (*)+8;JMP <label>] 2343: case 0b0110_011_100: 2344: irpBeqsw (); 2345: break irpSwitch; 2346: 2347: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2348: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2349: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2350: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2351: //BEQ.S <label> |-|012346|-|--*--|-----| |0110_011_101_sss_sss 2352: //BNNE.S <label> |A|012346|-|--*--|-----| |0110_011_101_sss_sss [BEQ.S <label>] 2353: //BNNZ.S <label> |A|012346|-|--*--|-----| |0110_011_101_sss_sss [BEQ.S <label>] 2354: //BZE.S <label> |A|012346|-|--*--|-----| |0110_011_101_sss_sss [BEQ.S <label>] 2355: //JBEQ.S <label> |A|012346|-|--*--|-----| |0110_011_101_sss_sss [BEQ.S <label>] 2356: //JBNNE.S <label> |A|012346|-|--*--|-----| |0110_011_101_sss_sss [BEQ.S <label>] 2357: //JBNNZ.S <label> |A|012346|-|--*--|-----| |0110_011_101_sss_sss [BEQ.S <label>] 2358: //JBZE.S <label> |A|012346|-|--*--|-----| |0110_011_101_sss_sss [BEQ.S <label>] 2359: case 0b0110_011_101: 2360: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2361: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2362: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2363: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2364: //BEQ.S <label> |-|012346|-|--*--|-----| |0110_011_110_sss_sss 2365: //BNNE.S <label> |A|012346|-|--*--|-----| |0110_011_110_sss_sss [BEQ.S <label>] 2366: //BNNZ.S <label> |A|012346|-|--*--|-----| |0110_011_110_sss_sss [BEQ.S <label>] 2367: //BZE.S <label> |A|012346|-|--*--|-----| |0110_011_110_sss_sss [BEQ.S <label>] 2368: //JBEQ.S <label> |A|012346|-|--*--|-----| |0110_011_110_sss_sss [BEQ.S <label>] 2369: //JBNNE.S <label> |A|012346|-|--*--|-----| |0110_011_110_sss_sss [BEQ.S <label>] 2370: //JBNNZ.S <label> |A|012346|-|--*--|-----| |0110_011_110_sss_sss [BEQ.S <label>] 2371: //JBZE.S <label> |A|012346|-|--*--|-----| |0110_011_110_sss_sss [BEQ.S <label>] 2372: case 0b0110_011_110: 2373: irpBeqs (); 2374: break irpSwitch; 2375: 2376: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2377: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2378: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2379: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2380: //BEQ.S <label> |-|--2346|-|--*--|-----| |0110_011_111_sss_sss (s is not equal to 63) 2381: //BNNE.S <label> |A|--2346|-|--*--|-----| |0110_011_111_sss_sss (s is not equal to 63) [BEQ.S <label>] 2382: //BNNZ.S <label> |A|--2346|-|--*--|-----| |0110_011_111_sss_sss (s is not equal to 63) [BEQ.S <label>] 2383: //BZE.S <label> |A|--2346|-|--*--|-----| |0110_011_111_sss_sss (s is not equal to 63) [BEQ.S <label>] 2384: //JBEQ.S <label> |A|--2346|-|--*--|-----| |0110_011_111_sss_sss (s is not equal to 63) [BEQ.S <label>] 2385: //JBNNE.S <label> |A|--2346|-|--*--|-----| |0110_011_111_sss_sss (s is not equal to 63) [BEQ.S <label>] 2386: //JBNNZ.S <label> |A|--2346|-|--*--|-----| |0110_011_111_sss_sss (s is not equal to 63) [BEQ.S <label>] 2387: //JBZE.S <label> |A|--2346|-|--*--|-----| |0110_011_111_sss_sss (s is not equal to 63) [BEQ.S <label>] 2388: //BEQ.L <label> |-|--2346|-|--*--|-----| |0110_011_111_111_111-{offset} 2389: //BNNE.L <label> |A|--2346|-|--*--|-----| |0110_011_111_111_111-{offset} [BEQ.L <label>] 2390: //BNNZ.L <label> |A|--2346|-|--*--|-----| |0110_011_111_111_111-{offset} [BEQ.L <label>] 2391: //BZE.L <label> |A|--2346|-|--*--|-----| |0110_011_111_111_111-{offset} [BEQ.L <label>] 2392: case 0b0110_011_111: 2393: irpBeqsl (); 2394: break irpSwitch; 2395: 2396: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2397: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2398: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2399: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2400: //BVC.W <label> |-|012346|-|---*-|-----| |0110_100_000_000_000-{offset} 2401: //BNVS.W <label> |A|012346|-|---*-|-----| |0110_100_000_000_000-{offset} [BVC.W <label>] 2402: //JBNVS.W <label> |A|012346|-|---*-|-----| |0110_100_000_000_000-{offset} [BVC.W <label>] 2403: //JBVC.W <label> |A|012346|-|---*-|-----| |0110_100_000_000_000-{offset} [BVC.W <label>] 2404: //BVC.S <label> |-|012346|-|---*-|-----| |0110_100_000_sss_sss (s is not equal to 0) 2405: //BNVS.S <label> |A|012346|-|---*-|-----| |0110_100_000_sss_sss (s is not equal to 0) [BVC.S <label>] 2406: //JBNVS.S <label> |A|012346|-|---*-|-----| |0110_100_000_sss_sss (s is not equal to 0) [BVC.S <label>] 2407: //JBVC.S <label> |A|012346|-|---*-|-----| |0110_100_000_sss_sss (s is not equal to 0) [BVC.S <label>] 2408: //JBNVC.L <label> |A|012346|-|---*-|-----| |0110_100_000_000_110-0100111011111001-{address} [BVC.S (*)+8;JMP <label>] 2409: //JBVS.L <label> |A|012346|-|---*-|-----| |0110_100_000_000_110-0100111011111001-{address} [BVC.S (*)+8;JMP <label>] 2410: case 0b0110_100_000: 2411: irpBvcsw (); 2412: break irpSwitch; 2413: 2414: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2415: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2416: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2417: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2418: //BVC.S <label> |-|012346|-|---*-|-----| |0110_100_001_sss_sss 2419: //BNVS.S <label> |A|012346|-|---*-|-----| |0110_100_001_sss_sss [BVC.S <label>] 2420: //JBNVS.S <label> |A|012346|-|---*-|-----| |0110_100_001_sss_sss [BVC.S <label>] 2421: //JBVC.S <label> |A|012346|-|---*-|-----| |0110_100_001_sss_sss [BVC.S <label>] 2422: case 0b0110_100_001: 2423: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2424: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2425: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2426: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2427: //BVC.S <label> |-|012346|-|---*-|-----| |0110_100_010_sss_sss 2428: //BNVS.S <label> |A|012346|-|---*-|-----| |0110_100_010_sss_sss [BVC.S <label>] 2429: //JBNVS.S <label> |A|012346|-|---*-|-----| |0110_100_010_sss_sss [BVC.S <label>] 2430: //JBVC.S <label> |A|012346|-|---*-|-----| |0110_100_010_sss_sss [BVC.S <label>] 2431: case 0b0110_100_010: 2432: irpBvcs (); 2433: break irpSwitch; 2434: 2435: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2436: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2437: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2438: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2439: //BVC.S <label> |-|--2346|-|---*-|-----| |0110_100_011_sss_sss (s is not equal to 63) 2440: //BNVS.S <label> |A|--2346|-|---*-|-----| |0110_100_011_sss_sss (s is not equal to 63) [BVC.S <label>] 2441: //JBNVS.S <label> |A|--2346|-|---*-|-----| |0110_100_011_sss_sss (s is not equal to 63) [BVC.S <label>] 2442: //JBVC.S <label> |A|--2346|-|---*-|-----| |0110_100_011_sss_sss (s is not equal to 63) [BVC.S <label>] 2443: //BVC.L <label> |-|--2346|-|---*-|-----| |0110_100_011_111_111-{offset} 2444: //BNVS.L <label> |A|--2346|-|---*-|-----| |0110_100_011_111_111-{offset} [BVC.L <label>] 2445: case 0b0110_100_011: 2446: irpBvcsl (); 2447: break irpSwitch; 2448: 2449: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2450: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2451: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2452: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2453: //BVS.W <label> |-|012346|-|---*-|-----| |0110_100_100_000_000-{offset} 2454: //BNVC.W <label> |A|012346|-|---*-|-----| |0110_100_100_000_000-{offset} [BVS.W <label>] 2455: //JBNVC.W <label> |A|012346|-|---*-|-----| |0110_100_100_000_000-{offset} [BVS.W <label>] 2456: //JBVS.W <label> |A|012346|-|---*-|-----| |0110_100_100_000_000-{offset} [BVS.W <label>] 2457: //BVS.S <label> |-|012346|-|---*-|-----| |0110_100_100_sss_sss (s is not equal to 0) 2458: //BNVC.S <label> |A|012346|-|---*-|-----| |0110_100_100_sss_sss (s is not equal to 0) [BVS.S <label>] 2459: //JBNVC.S <label> |A|012346|-|---*-|-----| |0110_100_100_sss_sss (s is not equal to 0) [BVS.S <label>] 2460: //JBVS.S <label> |A|012346|-|---*-|-----| |0110_100_100_sss_sss (s is not equal to 0) [BVS.S <label>] 2461: //JBNVS.L <label> |A|012346|-|---*-|-----| |0110_100_100_000_110-0100111011111001-{address} [BVS.S (*)+8;JMP <label>] 2462: //JBVC.L <label> |A|012346|-|---*-|-----| |0110_100_100_000_110-0100111011111001-{address} [BVS.S (*)+8;JMP <label>] 2463: case 0b0110_100_100: 2464: irpBvssw (); 2465: break irpSwitch; 2466: 2467: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2468: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2469: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2470: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2471: //BVS.S <label> |-|012346|-|---*-|-----| |0110_100_101_sss_sss 2472: //BNVC.S <label> |A|012346|-|---*-|-----| |0110_100_101_sss_sss [BVS.S <label>] 2473: //JBNVC.S <label> |A|012346|-|---*-|-----| |0110_100_101_sss_sss [BVS.S <label>] 2474: //JBVS.S <label> |A|012346|-|---*-|-----| |0110_100_101_sss_sss [BVS.S <label>] 2475: case 0b0110_100_101: 2476: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2477: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2478: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2479: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2480: //BVS.S <label> |-|012346|-|---*-|-----| |0110_100_110_sss_sss 2481: //BNVC.S <label> |A|012346|-|---*-|-----| |0110_100_110_sss_sss [BVS.S <label>] 2482: //JBNVC.S <label> |A|012346|-|---*-|-----| |0110_100_110_sss_sss [BVS.S <label>] 2483: //JBVS.S <label> |A|012346|-|---*-|-----| |0110_100_110_sss_sss [BVS.S <label>] 2484: case 0b0110_100_110: 2485: irpBvss (); 2486: break irpSwitch; 2487: 2488: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2489: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2490: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2491: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2492: //BVS.S <label> |-|--2346|-|---*-|-----| |0110_100_111_sss_sss (s is not equal to 63) 2493: //BNVC.S <label> |A|--2346|-|---*-|-----| |0110_100_111_sss_sss (s is not equal to 63) [BVS.S <label>] 2494: //JBNVC.S <label> |A|--2346|-|---*-|-----| |0110_100_111_sss_sss (s is not equal to 63) [BVS.S <label>] 2495: //JBVS.S <label> |A|--2346|-|---*-|-----| |0110_100_111_sss_sss (s is not equal to 63) [BVS.S <label>] 2496: //BVS.L <label> |-|--2346|-|---*-|-----| |0110_100_111_111_111-{offset} 2497: //BNVC.L <label> |A|--2346|-|---*-|-----| |0110_100_111_111_111-{offset} [BVS.L <label>] 2498: case 0b0110_100_111: 2499: irpBvssl (); 2500: break irpSwitch; 2501: 2502: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2503: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2504: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2505: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2506: //BPL.W <label> |-|012346|-|-*---|-----| |0110_101_000_000_000-{offset} 2507: //BNMI.W <label> |A|012346|-|-*---|-----| |0110_101_000_000_000-{offset} [BPL.W <label>] 2508: //JBNMI.W <label> |A|012346|-|-*---|-----| |0110_101_000_000_000-{offset} [BPL.W <label>] 2509: //JBPL.W <label> |A|012346|-|-*---|-----| |0110_101_000_000_000-{offset} [BPL.W <label>] 2510: //BPL.S <label> |-|012346|-|-*---|-----| |0110_101_000_sss_sss (s is not equal to 0) 2511: //BNMI.S <label> |A|012346|-|-*---|-----| |0110_101_000_sss_sss (s is not equal to 0) [BPL.S <label>] 2512: //JBNMI.S <label> |A|012346|-|-*---|-----| |0110_101_000_sss_sss (s is not equal to 0) [BPL.S <label>] 2513: //JBPL.S <label> |A|012346|-|-*---|-----| |0110_101_000_sss_sss (s is not equal to 0) [BPL.S <label>] 2514: //JBMI.L <label> |A|012346|-|-*---|-----| |0110_101_000_000_110-0100111011111001-{address} [BPL.S (*)+8;JMP <label>] 2515: //JBNPL.L <label> |A|012346|-|-*---|-----| |0110_101_000_000_110-0100111011111001-{address} [BPL.S (*)+8;JMP <label>] 2516: case 0b0110_101_000: 2517: irpBplsw (); 2518: break irpSwitch; 2519: 2520: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2521: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2522: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2523: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2524: //BPL.S <label> |-|012346|-|-*---|-----| |0110_101_001_sss_sss 2525: //BNMI.S <label> |A|012346|-|-*---|-----| |0110_101_001_sss_sss [BPL.S <label>] 2526: //JBNMI.S <label> |A|012346|-|-*---|-----| |0110_101_001_sss_sss [BPL.S <label>] 2527: //JBPL.S <label> |A|012346|-|-*---|-----| |0110_101_001_sss_sss [BPL.S <label>] 2528: case 0b0110_101_001: 2529: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2530: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2531: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2532: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2533: //BPL.S <label> |-|012346|-|-*---|-----| |0110_101_010_sss_sss 2534: //BNMI.S <label> |A|012346|-|-*---|-----| |0110_101_010_sss_sss [BPL.S <label>] 2535: //JBNMI.S <label> |A|012346|-|-*---|-----| |0110_101_010_sss_sss [BPL.S <label>] 2536: //JBPL.S <label> |A|012346|-|-*---|-----| |0110_101_010_sss_sss [BPL.S <label>] 2537: case 0b0110_101_010: 2538: irpBpls (); 2539: break irpSwitch; 2540: 2541: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2542: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2543: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2544: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2545: //BPL.S <label> |-|--2346|-|-*---|-----| |0110_101_011_sss_sss (s is not equal to 63) 2546: //BNMI.S <label> |A|--2346|-|-*---|-----| |0110_101_011_sss_sss (s is not equal to 63) [BPL.S <label>] 2547: //JBNMI.S <label> |A|--2346|-|-*---|-----| |0110_101_011_sss_sss (s is not equal to 63) [BPL.S <label>] 2548: //JBPL.S <label> |A|--2346|-|-*---|-----| |0110_101_011_sss_sss (s is not equal to 63) [BPL.S <label>] 2549: //BPL.L <label> |-|--2346|-|-*---|-----| |0110_101_011_111_111-{offset} 2550: //BNMI.L <label> |A|--2346|-|-*---|-----| |0110_101_011_111_111-{offset} [BPL.L <label>] 2551: case 0b0110_101_011: 2552: irpBplsl (); 2553: break irpSwitch; 2554: 2555: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2556: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2557: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2558: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2559: //BMI.W <label> |-|012346|-|-*---|-----| |0110_101_100_000_000-{offset} 2560: //BNPL.W <label> |A|012346|-|-*---|-----| |0110_101_100_000_000-{offset} [BMI.W <label>] 2561: //JBMI.W <label> |A|012346|-|-*---|-----| |0110_101_100_000_000-{offset} [BMI.W <label>] 2562: //JBNPL.W <label> |A|012346|-|-*---|-----| |0110_101_100_000_000-{offset} [BMI.W <label>] 2563: //BMI.S <label> |-|012346|-|-*---|-----| |0110_101_100_sss_sss (s is not equal to 0) 2564: //BNPL.S <label> |A|012346|-|-*---|-----| |0110_101_100_sss_sss (s is not equal to 0) [BMI.S <label>] 2565: //JBMI.S <label> |A|012346|-|-*---|-----| |0110_101_100_sss_sss (s is not equal to 0) [BMI.S <label>] 2566: //JBNPL.S <label> |A|012346|-|-*---|-----| |0110_101_100_sss_sss (s is not equal to 0) [BMI.S <label>] 2567: //JBNMI.L <label> |A|012346|-|-*---|-----| |0110_101_100_000_110-0100111011111001-{address} [BMI.S (*)+8;JMP <label>] 2568: //JBPL.L <label> |A|012346|-|-*---|-----| |0110_101_100_000_110-0100111011111001-{address} [BMI.S (*)+8;JMP <label>] 2569: case 0b0110_101_100: 2570: irpBmisw (); 2571: break irpSwitch; 2572: 2573: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2574: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2575: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2576: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2577: //BMI.S <label> |-|012346|-|-*---|-----| |0110_101_101_sss_sss 2578: //BNPL.S <label> |A|012346|-|-*---|-----| |0110_101_101_sss_sss [BMI.S <label>] 2579: //JBMI.S <label> |A|012346|-|-*---|-----| |0110_101_101_sss_sss [BMI.S <label>] 2580: //JBNPL.S <label> |A|012346|-|-*---|-----| |0110_101_101_sss_sss [BMI.S <label>] 2581: case 0b0110_101_101: 2582: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2583: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2584: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2585: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2586: //BMI.S <label> |-|012346|-|-*---|-----| |0110_101_110_sss_sss 2587: //BNPL.S <label> |A|012346|-|-*---|-----| |0110_101_110_sss_sss [BMI.S <label>] 2588: //JBMI.S <label> |A|012346|-|-*---|-----| |0110_101_110_sss_sss [BMI.S <label>] 2589: //JBNPL.S <label> |A|012346|-|-*---|-----| |0110_101_110_sss_sss [BMI.S <label>] 2590: case 0b0110_101_110: 2591: irpBmis (); 2592: break irpSwitch; 2593: 2594: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2595: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2596: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2597: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2598: //BMI.S <label> |-|--2346|-|-*---|-----| |0110_101_111_sss_sss (s is not equal to 63) 2599: //BNPL.S <label> |A|--2346|-|-*---|-----| |0110_101_111_sss_sss (s is not equal to 63) [BMI.S <label>] 2600: //JBMI.S <label> |A|--2346|-|-*---|-----| |0110_101_111_sss_sss (s is not equal to 63) [BMI.S <label>] 2601: //JBNPL.S <label> |A|--2346|-|-*---|-----| |0110_101_111_sss_sss (s is not equal to 63) [BMI.S <label>] 2602: //BMI.L <label> |-|--2346|-|-*---|-----| |0110_101_111_111_111-{offset} 2603: //BNPL.L <label> |A|--2346|-|-*---|-----| |0110_101_111_111_111-{offset} [BMI.L <label>] 2604: case 0b0110_101_111: 2605: irpBmisl (); 2606: break irpSwitch; 2607: 2608: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2609: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2610: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2611: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2612: //BGE.W <label> |-|012346|-|-*-*-|-----| |0110_110_000_000_000-{offset} 2613: //BNLT.W <label> |A|012346|-|-*-*-|-----| |0110_110_000_000_000-{offset} [BGE.W <label>] 2614: //JBGE.W <label> |A|012346|-|-*-*-|-----| |0110_110_000_000_000-{offset} [BGE.W <label>] 2615: //JBNLT.W <label> |A|012346|-|-*-*-|-----| |0110_110_000_000_000-{offset} [BGE.W <label>] 2616: //BGE.S <label> |-|012346|-|-*-*-|-----| |0110_110_000_sss_sss (s is not equal to 0) 2617: //BNLT.S <label> |A|012346|-|-*-*-|-----| |0110_110_000_sss_sss (s is not equal to 0) [BGE.S <label>] 2618: //JBGE.S <label> |A|012346|-|-*-*-|-----| |0110_110_000_sss_sss (s is not equal to 0) [BGE.S <label>] 2619: //JBNLT.S <label> |A|012346|-|-*-*-|-----| |0110_110_000_sss_sss (s is not equal to 0) [BGE.S <label>] 2620: //JBLT.L <label> |A|012346|-|-*-*-|-----| |0110_110_000_000_110-0100111011111001-{address} [BGE.S (*)+8;JMP <label>] 2621: //JBNGE.L <label> |A|012346|-|-*-*-|-----| |0110_110_000_000_110-0100111011111001-{address} [BGE.S (*)+8;JMP <label>] 2622: case 0b0110_110_000: 2623: irpBgesw (); 2624: break irpSwitch; 2625: 2626: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2627: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2628: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2629: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2630: //BGE.S <label> |-|012346|-|-*-*-|-----| |0110_110_001_sss_sss 2631: //BNLT.S <label> |A|012346|-|-*-*-|-----| |0110_110_001_sss_sss [BGE.S <label>] 2632: //JBGE.S <label> |A|012346|-|-*-*-|-----| |0110_110_001_sss_sss [BGE.S <label>] 2633: //JBNLT.S <label> |A|012346|-|-*-*-|-----| |0110_110_001_sss_sss [BGE.S <label>] 2634: case 0b0110_110_001: 2635: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2636: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2637: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2638: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2639: //BGE.S <label> |-|012346|-|-*-*-|-----| |0110_110_010_sss_sss 2640: //BNLT.S <label> |A|012346|-|-*-*-|-----| |0110_110_010_sss_sss [BGE.S <label>] 2641: //JBGE.S <label> |A|012346|-|-*-*-|-----| |0110_110_010_sss_sss [BGE.S <label>] 2642: //JBNLT.S <label> |A|012346|-|-*-*-|-----| |0110_110_010_sss_sss [BGE.S <label>] 2643: case 0b0110_110_010: 2644: irpBges (); 2645: break irpSwitch; 2646: 2647: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2648: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2649: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2650: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2651: //BGE.S <label> |-|--2346|-|-*-*-|-----| |0110_110_011_sss_sss (s is not equal to 63) 2652: //BNLT.S <label> |A|--2346|-|-*-*-|-----| |0110_110_011_sss_sss (s is not equal to 63) [BGE.S <label>] 2653: //JBGE.S <label> |A|--2346|-|-*-*-|-----| |0110_110_011_sss_sss (s is not equal to 63) [BGE.S <label>] 2654: //JBNLT.S <label> |A|--2346|-|-*-*-|-----| |0110_110_011_sss_sss (s is not equal to 63) [BGE.S <label>] 2655: //BGE.L <label> |-|--2346|-|-*-*-|-----| |0110_110_011_111_111-{offset} 2656: //BNLT.L <label> |A|--2346|-|-*-*-|-----| |0110_110_011_111_111-{offset} [BGE.L <label>] 2657: case 0b0110_110_011: 2658: irpBgesl (); 2659: break irpSwitch; 2660: 2661: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2662: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2663: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2664: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2665: //BLT.W <label> |-|012346|-|-*-*-|-----| |0110_110_100_000_000-{offset} 2666: //BNGE.W <label> |A|012346|-|-*-*-|-----| |0110_110_100_000_000-{offset} [BLT.W <label>] 2667: //JBLT.W <label> |A|012346|-|-*-*-|-----| |0110_110_100_000_000-{offset} [BLT.W <label>] 2668: //JBNGE.W <label> |A|012346|-|-*-*-|-----| |0110_110_100_000_000-{offset} [BLT.W <label>] 2669: //BLT.S <label> |-|012346|-|-*-*-|-----| |0110_110_100_sss_sss (s is not equal to 0) 2670: //BNGE.S <label> |A|012346|-|-*-*-|-----| |0110_110_100_sss_sss (s is not equal to 0) [BLT.S <label>] 2671: //JBLT.S <label> |A|012346|-|-*-*-|-----| |0110_110_100_sss_sss (s is not equal to 0) [BLT.S <label>] 2672: //JBNGE.S <label> |A|012346|-|-*-*-|-----| |0110_110_100_sss_sss (s is not equal to 0) [BLT.S <label>] 2673: //JBGE.L <label> |A|012346|-|-*-*-|-----| |0110_110_100_000_110-0100111011111001-{address} [BLT.S (*)+8;JMP <label>] 2674: //JBNLT.L <label> |A|012346|-|-*-*-|-----| |0110_110_100_000_110-0100111011111001-{address} [BLT.S (*)+8;JMP <label>] 2675: case 0b0110_110_100: 2676: irpBltsw (); 2677: break irpSwitch; 2678: 2679: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2680: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2681: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2682: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2683: //BLT.S <label> |-|012346|-|-*-*-|-----| |0110_110_101_sss_sss 2684: //BNGE.S <label> |A|012346|-|-*-*-|-----| |0110_110_101_sss_sss [BLT.S <label>] 2685: //JBLT.S <label> |A|012346|-|-*-*-|-----| |0110_110_101_sss_sss [BLT.S <label>] 2686: //JBNGE.S <label> |A|012346|-|-*-*-|-----| |0110_110_101_sss_sss [BLT.S <label>] 2687: case 0b0110_110_101: 2688: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2689: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2690: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2691: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2692: //BLT.S <label> |-|012346|-|-*-*-|-----| |0110_110_110_sss_sss 2693: //BNGE.S <label> |A|012346|-|-*-*-|-----| |0110_110_110_sss_sss [BLT.S <label>] 2694: //JBLT.S <label> |A|012346|-|-*-*-|-----| |0110_110_110_sss_sss [BLT.S <label>] 2695: //JBNGE.S <label> |A|012346|-|-*-*-|-----| |0110_110_110_sss_sss [BLT.S <label>] 2696: case 0b0110_110_110: 2697: irpBlts (); 2698: break irpSwitch; 2699: 2700: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2701: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2702: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2703: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2704: //BLT.S <label> |-|--2346|-|-*-*-|-----| |0110_110_111_sss_sss (s is not equal to 63) 2705: //BNGE.S <label> |A|--2346|-|-*-*-|-----| |0110_110_111_sss_sss (s is not equal to 63) [BLT.S <label>] 2706: //JBLT.S <label> |A|--2346|-|-*-*-|-----| |0110_110_111_sss_sss (s is not equal to 63) [BLT.S <label>] 2707: //JBNGE.S <label> |A|--2346|-|-*-*-|-----| |0110_110_111_sss_sss (s is not equal to 63) [BLT.S <label>] 2708: //BLT.L <label> |-|--2346|-|-*-*-|-----| |0110_110_111_111_111-{offset} 2709: //BNGE.L <label> |A|--2346|-|-*-*-|-----| |0110_110_111_111_111-{offset} [BLT.L <label>] 2710: case 0b0110_110_111: 2711: irpBltsl (); 2712: break irpSwitch; 2713: 2714: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2715: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2716: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2717: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2718: //BGT.W <label> |-|012346|-|-***-|-----| |0110_111_000_000_000-{offset} 2719: //BNLE.W <label> |A|012346|-|-***-|-----| |0110_111_000_000_000-{offset} [BGT.W <label>] 2720: //JBGT.W <label> |A|012346|-|-***-|-----| |0110_111_000_000_000-{offset} [BGT.W <label>] 2721: //JBNLE.W <label> |A|012346|-|-***-|-----| |0110_111_000_000_000-{offset} [BGT.W <label>] 2722: //BGT.S <label> |-|012346|-|-***-|-----| |0110_111_000_sss_sss (s is not equal to 0) 2723: //BNLE.S <label> |A|012346|-|-***-|-----| |0110_111_000_sss_sss (s is not equal to 0) [BGT.S <label>] 2724: //JBGT.S <label> |A|012346|-|-***-|-----| |0110_111_000_sss_sss (s is not equal to 0) [BGT.S <label>] 2725: //JBNLE.S <label> |A|012346|-|-***-|-----| |0110_111_000_sss_sss (s is not equal to 0) [BGT.S <label>] 2726: //JBLE.L <label> |A|012346|-|-***-|-----| |0110_111_000_000_110-0100111011111001-{address} [BGT.S (*)+8;JMP <label>] 2727: //JBNGT.L <label> |A|012346|-|-***-|-----| |0110_111_000_000_110-0100111011111001-{address} [BGT.S (*)+8;JMP <label>] 2728: case 0b0110_111_000: 2729: irpBgtsw (); 2730: break irpSwitch; 2731: 2732: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2733: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2734: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2735: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2736: //BGT.S <label> |-|012346|-|-***-|-----| |0110_111_001_sss_sss 2737: //BNLE.S <label> |A|012346|-|-***-|-----| |0110_111_001_sss_sss [BGT.S <label>] 2738: //JBGT.S <label> |A|012346|-|-***-|-----| |0110_111_001_sss_sss [BGT.S <label>] 2739: //JBNLE.S <label> |A|012346|-|-***-|-----| |0110_111_001_sss_sss [BGT.S <label>] 2740: case 0b0110_111_001: 2741: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2742: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2743: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2744: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2745: //BGT.S <label> |-|012346|-|-***-|-----| |0110_111_010_sss_sss 2746: //BNLE.S <label> |A|012346|-|-***-|-----| |0110_111_010_sss_sss [BGT.S <label>] 2747: //JBGT.S <label> |A|012346|-|-***-|-----| |0110_111_010_sss_sss [BGT.S <label>] 2748: //JBNLE.S <label> |A|012346|-|-***-|-----| |0110_111_010_sss_sss [BGT.S <label>] 2749: case 0b0110_111_010: 2750: irpBgts (); 2751: break irpSwitch; 2752: 2753: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2754: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2755: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2756: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2757: //BGT.S <label> |-|--2346|-|-***-|-----| |0110_111_011_sss_sss (s is not equal to 63) 2758: //BNLE.S <label> |A|--2346|-|-***-|-----| |0110_111_011_sss_sss (s is not equal to 63) [BGT.S <label>] 2759: //JBGT.S <label> |A|--2346|-|-***-|-----| |0110_111_011_sss_sss (s is not equal to 63) [BGT.S <label>] 2760: //JBNLE.S <label> |A|--2346|-|-***-|-----| |0110_111_011_sss_sss (s is not equal to 63) [BGT.S <label>] 2761: //BGT.L <label> |-|--2346|-|-***-|-----| |0110_111_011_111_111-{offset} 2762: //BNLE.L <label> |A|--2346|-|-***-|-----| |0110_111_011_111_111-{offset} [BGT.L <label>] 2763: case 0b0110_111_011: 2764: irpBgtsl (); 2765: break irpSwitch; 2766: 2767: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2768: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2769: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2770: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2771: //BLE.W <label> |-|012346|-|-***-|-----| |0110_111_100_000_000-{offset} 2772: //BNGT.W <label> |A|012346|-|-***-|-----| |0110_111_100_000_000-{offset} [BLE.W <label>] 2773: //JBLE.W <label> |A|012346|-|-***-|-----| |0110_111_100_000_000-{offset} [BLE.W <label>] 2774: //JBNGT.W <label> |A|012346|-|-***-|-----| |0110_111_100_000_000-{offset} [BLE.W <label>] 2775: //BLE.S <label> |-|012346|-|-***-|-----| |0110_111_100_sss_sss (s is not equal to 0) 2776: //BNGT.S <label> |A|012346|-|-***-|-----| |0110_111_100_sss_sss (s is not equal to 0) [BLE.S <label>] 2777: //JBLE.S <label> |A|012346|-|-***-|-----| |0110_111_100_sss_sss (s is not equal to 0) [BLE.S <label>] 2778: //JBNGT.S <label> |A|012346|-|-***-|-----| |0110_111_100_sss_sss (s is not equal to 0) [BLE.S <label>] 2779: //JBGT.L <label> |A|012346|-|-***-|-----| |0110_111_100_000_110-0100111011111001-{address} [BLE.S (*)+8;JMP <label>] 2780: //JBNLE.L <label> |A|012346|-|-***-|-----| |0110_111_100_000_110-0100111011111001-{address} [BLE.S (*)+8;JMP <label>] 2781: case 0b0110_111_100: 2782: irpBlesw (); 2783: break irpSwitch; 2784: 2785: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2786: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2787: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2788: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2789: //BLE.S <label> |-|012346|-|-***-|-----| |0110_111_101_sss_sss 2790: //BNGT.S <label> |A|012346|-|-***-|-----| |0110_111_101_sss_sss [BLE.S <label>] 2791: //JBLE.S <label> |A|012346|-|-***-|-----| |0110_111_101_sss_sss [BLE.S <label>] 2792: //JBNGT.S <label> |A|012346|-|-***-|-----| |0110_111_101_sss_sss [BLE.S <label>] 2793: case 0b0110_111_101: 2794: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2795: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2796: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2797: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2798: //BLE.S <label> |-|012346|-|-***-|-----| |0110_111_110_sss_sss 2799: //BNGT.S <label> |A|012346|-|-***-|-----| |0110_111_110_sss_sss [BLE.S <label>] 2800: //JBLE.S <label> |A|012346|-|-***-|-----| |0110_111_110_sss_sss [BLE.S <label>] 2801: //JBNGT.S <label> |A|012346|-|-***-|-----| |0110_111_110_sss_sss [BLE.S <label>] 2802: case 0b0110_111_110: 2803: irpBles (); 2804: break irpSwitch; 2805: 2806: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2807: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2808: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2809: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2810: //BLE.S <label> |-|--2346|-|-***-|-----| |0110_111_111_sss_sss (s is not equal to 63) 2811: //BNGT.S <label> |A|--2346|-|-***-|-----| |0110_111_111_sss_sss (s is not equal to 63) [BLE.S <label>] 2812: //JBLE.S <label> |A|--2346|-|-***-|-----| |0110_111_111_sss_sss (s is not equal to 63) [BLE.S <label>] 2813: //JBNGT.S <label> |A|--2346|-|-***-|-----| |0110_111_111_sss_sss (s is not equal to 63) [BLE.S <label>] 2814: //BLE.L <label> |-|--2346|-|-***-|-----| |0110_111_111_111_111-{offset} 2815: //BNGT.L <label> |A|--2346|-|-***-|-----| |0110_111_111_111_111-{offset} [BLE.L <label>] 2816: case 0b0110_111_111: 2817: irpBlesl (); 2818: break irpSwitch; 2819: 2820: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2821: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2822: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2823: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2824: //IOCS <name> |A|012346|-|UUUUU|UUUUU| |0111_000_0dd_ddd_ddd-0100111001001111 [MOVEQ.L #<data>,D0;TRAP #15] 2825: //MOVEQ.L #<data>,Dq |-|012346|-|-UUUU|-**00| |0111_qqq_0dd_ddd_ddd 2826: case 0b0111_000_000: 2827: case 0b0111_000_001: 2828: case 0b0111_000_010: 2829: case 0b0111_000_011: 2830: case 0b0111_001_000: 2831: case 0b0111_001_001: 2832: case 0b0111_001_010: 2833: case 0b0111_001_011: 2834: case 0b0111_010_000: 2835: case 0b0111_010_001: 2836: case 0b0111_010_010: 2837: case 0b0111_010_011: 2838: case 0b0111_011_000: 2839: case 0b0111_011_001: 2840: case 0b0111_011_010: 2841: case 0b0111_011_011: 2842: case 0b0111_100_000: 2843: case 0b0111_100_001: 2844: case 0b0111_100_010: 2845: case 0b0111_100_011: 2846: case 0b0111_101_000: 2847: case 0b0111_101_001: 2848: case 0b0111_101_010: 2849: case 0b0111_101_011: 2850: case 0b0111_110_000: 2851: case 0b0111_110_001: 2852: case 0b0111_110_010: 2853: case 0b0111_110_011: 2854: case 0b0111_111_000: 2855: case 0b0111_111_001: 2856: case 0b0111_111_010: 2857: case 0b0111_111_011: 2858: irpMoveq (); 2859: break irpSwitch; 2860: 2861: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2862: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2863: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2864: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2865: //MVS.B <ea>,Dq |-|------|-|-UUUU|-**00|D M+-WXZPI|0111_qqq_100_mmm_rrr (ISA_B) 2866: case 0b0111_000_100: 2867: case 0b0111_001_100: 2868: case 0b0111_010_100: 2869: case 0b0111_011_100: 2870: case 0b0111_100_100: 2871: case 0b0111_101_100: 2872: case 0b0111_110_100: 2873: case 0b0111_111_100: 2874: irpMvsByte (); 2875: break irpSwitch; 2876: 2877: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2878: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2879: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2880: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2881: //MVS.W <ea>,Dq |-|------|-|-UUUU|-**00|D M+-WXZPI|0111_qqq_101_mmm_rrr (ISA_B) 2882: case 0b0111_000_101: 2883: case 0b0111_001_101: 2884: case 0b0111_010_101: 2885: case 0b0111_011_101: 2886: case 0b0111_100_101: 2887: case 0b0111_101_101: 2888: case 0b0111_110_101: 2889: case 0b0111_111_101: 2890: irpMvsWord (); 2891: break irpSwitch; 2892: 2893: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2894: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2895: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2896: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2897: //MVZ.B <ea>,Dq |-|------|-|-UUUU|-0*00|D M+-WXZPI|0111_qqq_110_mmm_rrr (ISA_B) 2898: case 0b0111_000_110: 2899: case 0b0111_001_110: 2900: case 0b0111_010_110: 2901: case 0b0111_011_110: 2902: case 0b0111_100_110: 2903: case 0b0111_101_110: 2904: case 0b0111_110_110: 2905: case 0b0111_111_110: 2906: irpMvzByte (); 2907: break irpSwitch; 2908: 2909: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2910: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2911: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2912: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2913: //MVZ.W <ea>,Dq |-|------|-|-UUUU|-0*00|D M+-WXZPI|0111_qqq_111_mmm_rrr (ISA_B) 2914: case 0b0111_000_111: 2915: case 0b0111_001_111: 2916: case 0b0111_010_111: 2917: case 0b0111_011_111: 2918: case 0b0111_100_111: 2919: case 0b0111_101_111: 2920: case 0b0111_110_111: 2921: case 0b0111_111_111: 2922: irpMvzWord (); 2923: break irpSwitch; 2924: 2925: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2926: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2927: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2928: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2929: //OR.B <ea>,Dq |-|012346|-|-UUUU|-**00|D M+-WXZPI|1000_qqq_000_mmm_rrr 2930: case 0b1000_000_000: 2931: case 0b1000_001_000: 2932: case 0b1000_010_000: 2933: case 0b1000_011_000: 2934: case 0b1000_100_000: 2935: case 0b1000_101_000: 2936: case 0b1000_110_000: 2937: case 0b1000_111_000: 2938: irpOrToRegByte (); 2939: break irpSwitch; 2940: 2941: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2942: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2943: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2944: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2945: //OR.W <ea>,Dq |-|012346|-|-UUUU|-**00|D M+-WXZPI|1000_qqq_001_mmm_rrr 2946: case 0b1000_000_001: 2947: case 0b1000_001_001: 2948: case 0b1000_010_001: 2949: case 0b1000_011_001: 2950: case 0b1000_100_001: 2951: case 0b1000_101_001: 2952: case 0b1000_110_001: 2953: case 0b1000_111_001: 2954: irpOrToRegWord (); 2955: break irpSwitch; 2956: 2957: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2958: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2959: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2960: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2961: //OR.L <ea>,Dq |-|012346|-|-UUUU|-**00|D M+-WXZPI|1000_qqq_010_mmm_rrr 2962: case 0b1000_000_010: 2963: case 0b1000_001_010: 2964: case 0b1000_010_010: 2965: case 0b1000_011_010: 2966: case 0b1000_100_010: 2967: case 0b1000_101_010: 2968: case 0b1000_110_010: 2969: case 0b1000_111_010: 2970: irpOrToRegLong (); 2971: break irpSwitch; 2972: 2973: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2974: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2975: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2976: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2977: //DIVU.W <ea>,Dq |-|012346|-|-UUUU|-***0|D M+-WXZPI|1000_qqq_011_mmm_rrr 2978: case 0b1000_000_011: 2979: case 0b1000_001_011: 2980: case 0b1000_010_011: 2981: case 0b1000_011_011: 2982: case 0b1000_100_011: 2983: case 0b1000_101_011: 2984: case 0b1000_110_011: 2985: case 0b1000_111_011: 2986: irpDivuWord (); 2987: break irpSwitch; 2988: 2989: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2990: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2991: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2992: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2993: //SBCD.B Dr,Dq |-|012346|-|UUUUU|*U*U*| |1000_qqq_100_000_rrr 2994: //SBCD.B -(Ar),-(Aq) |-|012346|-|UUUUU|*U*U*| |1000_qqq_100_001_rrr 2995: //OR.B Dq,<ea> |-|012346|-|-UUUU|-**00| M+-WXZ |1000_qqq_100_mmm_rrr 2996: case 0b1000_000_100: 2997: case 0b1000_001_100: 2998: case 0b1000_010_100: 2999: case 0b1000_011_100: 3000: case 0b1000_100_100: 3001: case 0b1000_101_100: 3002: case 0b1000_110_100: 3003: case 0b1000_111_100: 3004: irpOrToMemByte (); 3005: break irpSwitch; 3006: 3007: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3008: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3009: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3010: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3011: //PACK Dr,Dq,#<data> |-|--2346|-|-----|-----| |1000_qqq_101_000_rrr-{data} 3012: //PACK -(Ar),-(Aq),#<data> |-|--2346|-|-----|-----| |1000_qqq_101_001_rrr-{data} 3013: //OR.W Dq,<ea> |-|012346|-|-UUUU|-**00| M+-WXZ |1000_qqq_101_mmm_rrr 3014: case 0b1000_000_101: 3015: case 0b1000_001_101: 3016: case 0b1000_010_101: 3017: case 0b1000_011_101: 3018: case 0b1000_100_101: 3019: case 0b1000_101_101: 3020: case 0b1000_110_101: 3021: case 0b1000_111_101: 3022: irpOrToMemWord (); 3023: break irpSwitch; 3024: 3025: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3026: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3027: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3028: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3029: //UNPK Dr,Dq,#<data> |-|--2346|-|-----|-----| |1000_qqq_110_000_rrr-{data} 3030: //UNPK -(Ar),-(Aq),#<data> |-|--2346|-|-----|-----| |1000_qqq_110_001_rrr-{data} 3031: //OR.L Dq,<ea> |-|012346|-|-UUUU|-**00| M+-WXZ |1000_qqq_110_mmm_rrr 3032: case 0b1000_000_110: 3033: case 0b1000_001_110: 3034: case 0b1000_010_110: 3035: case 0b1000_011_110: 3036: case 0b1000_100_110: 3037: case 0b1000_101_110: 3038: case 0b1000_110_110: 3039: case 0b1000_111_110: 3040: irpOrToMemLong (); 3041: break irpSwitch; 3042: 3043: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3044: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3045: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3046: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3047: //DIVS.W <ea>,Dq |-|012346|-|-UUUU|-***0|D M+-WXZPI|1000_qqq_111_mmm_rrr 3048: case 0b1000_000_111: 3049: case 0b1000_001_111: 3050: case 0b1000_010_111: 3051: case 0b1000_011_111: 3052: case 0b1000_100_111: 3053: case 0b1000_101_111: 3054: case 0b1000_110_111: 3055: case 0b1000_111_111: 3056: irpDivsWord (); 3057: break irpSwitch; 3058: 3059: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3060: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3061: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3062: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3063: //SUB.B <ea>,Dq |-|012346|-|UUUUU|*****|D M+-WXZPI|1001_qqq_000_mmm_rrr 3064: case 0b1001_000_000: 3065: case 0b1001_001_000: 3066: case 0b1001_010_000: 3067: case 0b1001_011_000: 3068: case 0b1001_100_000: 3069: case 0b1001_101_000: 3070: case 0b1001_110_000: 3071: case 0b1001_111_000: 3072: irpSubToRegByte (); 3073: break irpSwitch; 3074: 3075: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3076: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3077: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3078: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3079: //SUB.W <ea>,Dq |-|012346|-|UUUUU|*****|DAM+-WXZPI|1001_qqq_001_mmm_rrr 3080: case 0b1001_000_001: 3081: case 0b1001_001_001: 3082: case 0b1001_010_001: 3083: case 0b1001_011_001: 3084: case 0b1001_100_001: 3085: case 0b1001_101_001: 3086: case 0b1001_110_001: 3087: case 0b1001_111_001: 3088: irpSubToRegWord (); 3089: break irpSwitch; 3090: 3091: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3092: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3093: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3094: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3095: //SUB.L <ea>,Dq |-|012346|-|UUUUU|*****|DAM+-WXZPI|1001_qqq_010_mmm_rrr 3096: case 0b1001_000_010: 3097: case 0b1001_001_010: 3098: case 0b1001_010_010: 3099: case 0b1001_011_010: 3100: case 0b1001_100_010: 3101: case 0b1001_101_010: 3102: case 0b1001_110_010: 3103: case 0b1001_111_010: 3104: irpSubToRegLong (); 3105: break irpSwitch; 3106: 3107: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3108: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3109: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3110: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3111: //SUBA.W <ea>,Aq |-|012346|-|-----|-----|DAM+-WXZPI|1001_qqq_011_mmm_rrr 3112: //SUB.W <ea>,Aq |A|012346|-|-----|-----|DAM+-WXZPI|1001_qqq_011_mmm_rrr [SUBA.W <ea>,Aq] 3113: //CLR.W Ar |A|012346|-|-----|-----| A |1001_rrr_011_001_rrr [SUBA.W Ar,Ar] 3114: case 0b1001_000_011: 3115: case 0b1001_001_011: 3116: case 0b1001_010_011: 3117: case 0b1001_011_011: 3118: case 0b1001_100_011: 3119: case 0b1001_101_011: 3120: case 0b1001_110_011: 3121: case 0b1001_111_011: 3122: irpSubaWord (); 3123: break irpSwitch; 3124: 3125: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3126: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3127: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3128: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3129: //SUBX.B Dr,Dq |-|012346|-|*UUUU|*****| |1001_qqq_100_000_rrr 3130: //SUBX.B -(Ar),-(Aq) |-|012346|-|*UUUU|*****| |1001_qqq_100_001_rrr 3131: //SUB.B Dq,<ea> |-|012346|-|UUUUU|*****| M+-WXZ |1001_qqq_100_mmm_rrr 3132: case 0b1001_000_100: 3133: case 0b1001_001_100: 3134: case 0b1001_010_100: 3135: case 0b1001_011_100: 3136: case 0b1001_100_100: 3137: case 0b1001_101_100: 3138: case 0b1001_110_100: 3139: case 0b1001_111_100: 3140: irpSubToMemByte (); 3141: break irpSwitch; 3142: 3143: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3144: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3145: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3146: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3147: //SUBX.W Dr,Dq |-|012346|-|*UUUU|*****| |1001_qqq_101_000_rrr 3148: //SUBX.W -(Ar),-(Aq) |-|012346|-|*UUUU|*****| |1001_qqq_101_001_rrr 3149: //SUB.W Dq,<ea> |-|012346|-|UUUUU|*****| M+-WXZ |1001_qqq_101_mmm_rrr 3150: case 0b1001_000_101: 3151: case 0b1001_001_101: 3152: case 0b1001_010_101: 3153: case 0b1001_011_101: 3154: case 0b1001_100_101: 3155: case 0b1001_101_101: 3156: case 0b1001_110_101: 3157: case 0b1001_111_101: 3158: irpSubToMemWord (); 3159: break irpSwitch; 3160: 3161: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3162: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3163: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3164: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3165: //SUBX.L Dr,Dq |-|012346|-|*UUUU|*****| |1001_qqq_110_000_rrr 3166: //SUBX.L -(Ar),-(Aq) |-|012346|-|*UUUU|*****| |1001_qqq_110_001_rrr 3167: //SUB.L Dq,<ea> |-|012346|-|UUUUU|*****| M+-WXZ |1001_qqq_110_mmm_rrr 3168: case 0b1001_000_110: 3169: case 0b1001_001_110: 3170: case 0b1001_010_110: 3171: case 0b1001_011_110: 3172: case 0b1001_100_110: 3173: case 0b1001_101_110: 3174: case 0b1001_110_110: 3175: case 0b1001_111_110: 3176: irpSubToMemLong (); 3177: break irpSwitch; 3178: 3179: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3180: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3181: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3182: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3183: //SUBA.L <ea>,Aq |-|012346|-|-----|-----|DAM+-WXZPI|1001_qqq_111_mmm_rrr 3184: //SUB.L <ea>,Aq |A|012346|-|-----|-----|DAM+-WXZPI|1001_qqq_111_mmm_rrr [SUBA.L <ea>,Aq] 3185: //CLR.L Ar |A|012346|-|-----|-----| A |1001_rrr_111_001_rrr [SUBA.L Ar,Ar] 3186: case 0b1001_000_111: 3187: case 0b1001_001_111: 3188: case 0b1001_010_111: 3189: case 0b1001_011_111: 3190: case 0b1001_100_111: 3191: case 0b1001_101_111: 3192: case 0b1001_110_111: 3193: case 0b1001_111_111: 3194: irpSubaLong (); 3195: break irpSwitch; 3196: 3197: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3198: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3199: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3200: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3201: //SXCALL <name> |A|012346|-|UUUUU|*****| |1010_0dd_ddd_ddd_ddd [ALINE #<data>] 3202: case 0b1010_000_000: 3203: case 0b1010_000_001: 3204: case 0b1010_000_010: 3205: case 0b1010_000_011: 3206: case 0b1010_000_100: 3207: case 0b1010_000_101: 3208: case 0b1010_000_110: 3209: case 0b1010_000_111: 3210: case 0b1010_001_000: 3211: case 0b1010_001_001: 3212: case 0b1010_001_010: 3213: case 0b1010_001_011: 3214: case 0b1010_001_100: 3215: case 0b1010_001_101: 3216: case 0b1010_001_110: 3217: case 0b1010_001_111: 3218: case 0b1010_010_000: 3219: case 0b1010_010_001: 3220: case 0b1010_010_010: 3221: case 0b1010_010_011: 3222: case 0b1010_010_100: 3223: case 0b1010_010_101: 3224: case 0b1010_010_110: 3225: case 0b1010_010_111: 3226: case 0b1010_011_000: 3227: case 0b1010_011_001: 3228: case 0b1010_011_010: 3229: case 0b1010_011_011: 3230: case 0b1010_011_100: 3231: case 0b1010_011_101: 3232: case 0b1010_011_110: 3233: case 0b1010_011_111: 3234: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3235: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3236: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3237: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3238: //ALINE #<data> |-|012346|-|UUUUU|*****| |1010_ddd_ddd_ddd_ddd (line 1010 emulator) 3239: case 0b1010_100_000: 3240: case 0b1010_100_001: 3241: case 0b1010_100_010: 3242: case 0b1010_100_011: 3243: case 0b1010_100_100: 3244: case 0b1010_100_101: 3245: case 0b1010_100_110: 3246: case 0b1010_100_111: 3247: case 0b1010_101_000: 3248: case 0b1010_101_001: 3249: case 0b1010_101_010: 3250: case 0b1010_101_011: 3251: case 0b1010_101_100: 3252: case 0b1010_101_101: 3253: case 0b1010_101_110: 3254: case 0b1010_101_111: 3255: case 0b1010_110_000: 3256: case 0b1010_110_001: 3257: case 0b1010_110_010: 3258: case 0b1010_110_011: 3259: case 0b1010_110_100: 3260: case 0b1010_110_101: 3261: case 0b1010_110_110: 3262: case 0b1010_110_111: 3263: case 0b1010_111_000: 3264: case 0b1010_111_001: 3265: case 0b1010_111_010: 3266: case 0b1010_111_011: 3267: case 0b1010_111_100: 3268: case 0b1010_111_101: 3269: case 0b1010_111_110: 3270: case 0b1010_111_111: 3271: irpAline (); 3272: break irpSwitch; 3273: 3274: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3275: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3276: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3277: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3278: //CMP.B <ea>,Dq |-|012346|-|-UUUU|-****|D M+-WXZPI|1011_qqq_000_mmm_rrr 3279: case 0b1011_000_000: 3280: case 0b1011_001_000: 3281: case 0b1011_010_000: 3282: case 0b1011_011_000: 3283: case 0b1011_100_000: 3284: case 0b1011_101_000: 3285: case 0b1011_110_000: 3286: case 0b1011_111_000: 3287: irpCmpByte (); 3288: break irpSwitch; 3289: 3290: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3291: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3292: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3293: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3294: //CMP.W <ea>,Dq |-|012346|-|-UUUU|-****|DAM+-WXZPI|1011_qqq_001_mmm_rrr 3295: case 0b1011_000_001: 3296: case 0b1011_001_001: 3297: case 0b1011_010_001: 3298: case 0b1011_011_001: 3299: case 0b1011_100_001: 3300: case 0b1011_101_001: 3301: case 0b1011_110_001: 3302: case 0b1011_111_001: 3303: irpCmpWord (); 3304: break irpSwitch; 3305: 3306: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3307: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3308: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3309: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3310: //CMP.L <ea>,Dq |-|012346|-|-UUUU|-****|DAM+-WXZPI|1011_qqq_010_mmm_rrr 3311: case 0b1011_000_010: 3312: case 0b1011_001_010: 3313: case 0b1011_010_010: 3314: case 0b1011_011_010: 3315: case 0b1011_100_010: 3316: case 0b1011_101_010: 3317: case 0b1011_110_010: 3318: case 0b1011_111_010: 3319: irpCmpLong (); 3320: break irpSwitch; 3321: 3322: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3323: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3324: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3325: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3326: //CMPA.W <ea>,Aq |-|012346|-|-UUUU|-****|DAM+-WXZPI|1011_qqq_011_mmm_rrr 3327: //CMP.W <ea>,Aq |A|012346|-|-UUUU|-****|DAM+-WXZPI|1011_qqq_011_mmm_rrr [CMPA.W <ea>,Aq] 3328: case 0b1011_000_011: 3329: case 0b1011_001_011: 3330: case 0b1011_010_011: 3331: case 0b1011_011_011: 3332: case 0b1011_100_011: 3333: case 0b1011_101_011: 3334: case 0b1011_110_011: 3335: case 0b1011_111_011: 3336: irpCmpaWord (); 3337: break irpSwitch; 3338: 3339: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3340: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3341: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3342: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3343: //EOR.B Dq,<ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |1011_qqq_100_mmm_rrr 3344: //CMPM.B (Ar)+,(Aq)+ |-|012346|-|-UUUU|-****| |1011_qqq_100_001_rrr 3345: case 0b1011_000_100: 3346: case 0b1011_001_100: 3347: case 0b1011_010_100: 3348: case 0b1011_011_100: 3349: case 0b1011_100_100: 3350: case 0b1011_101_100: 3351: case 0b1011_110_100: 3352: case 0b1011_111_100: 3353: irpEorByte (); 3354: break irpSwitch; 3355: 3356: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3357: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3358: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3359: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3360: //EOR.W Dq,<ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |1011_qqq_101_mmm_rrr 3361: //CMPM.W (Ar)+,(Aq)+ |-|012346|-|-UUUU|-****| |1011_qqq_101_001_rrr 3362: case 0b1011_000_101: 3363: case 0b1011_001_101: 3364: case 0b1011_010_101: 3365: case 0b1011_011_101: 3366: case 0b1011_100_101: 3367: case 0b1011_101_101: 3368: case 0b1011_110_101: 3369: case 0b1011_111_101: 3370: irpEorWord (); 3371: break irpSwitch; 3372: 3373: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3374: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3375: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3376: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3377: //EOR.L Dq,<ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |1011_qqq_110_mmm_rrr 3378: //CMPM.L (Ar)+,(Aq)+ |-|012346|-|-UUUU|-****| |1011_qqq_110_001_rrr 3379: case 0b1011_000_110: 3380: case 0b1011_001_110: 3381: case 0b1011_010_110: 3382: case 0b1011_011_110: 3383: case 0b1011_100_110: 3384: case 0b1011_101_110: 3385: case 0b1011_110_110: 3386: case 0b1011_111_110: 3387: irpEorLong (); 3388: break irpSwitch; 3389: 3390: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3391: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3392: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3393: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3394: //CMPA.L <ea>,Aq |-|012346|-|-UUUU|-****|DAM+-WXZPI|1011_qqq_111_mmm_rrr 3395: //CMP.L <ea>,Aq |A|012346|-|-UUUU|-****|DAM+-WXZPI|1011_qqq_111_mmm_rrr [CMPA.L <ea>,Aq] 3396: case 0b1011_000_111: 3397: case 0b1011_001_111: 3398: case 0b1011_010_111: 3399: case 0b1011_011_111: 3400: case 0b1011_100_111: 3401: case 0b1011_101_111: 3402: case 0b1011_110_111: 3403: case 0b1011_111_111: 3404: irpCmpaLong (); 3405: break irpSwitch; 3406: 3407: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3408: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3409: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3410: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3411: //AND.B <ea>,Dq |-|012346|-|-UUUU|-**00|D M+-WXZPI|1100_qqq_000_mmm_rrr 3412: case 0b1100_000_000: 3413: case 0b1100_001_000: 3414: case 0b1100_010_000: 3415: case 0b1100_011_000: 3416: case 0b1100_100_000: 3417: case 0b1100_101_000: 3418: case 0b1100_110_000: 3419: case 0b1100_111_000: 3420: irpAndToRegByte (); 3421: break irpSwitch; 3422: 3423: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3424: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3425: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3426: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3427: //AND.W <ea>,Dq |-|012346|-|-UUUU|-**00|D M+-WXZPI|1100_qqq_001_mmm_rrr 3428: case 0b1100_000_001: 3429: case 0b1100_001_001: 3430: case 0b1100_010_001: 3431: case 0b1100_011_001: 3432: case 0b1100_100_001: 3433: case 0b1100_101_001: 3434: case 0b1100_110_001: 3435: case 0b1100_111_001: 3436: irpAndToRegWord (); 3437: break irpSwitch; 3438: 3439: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3440: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3441: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3442: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3443: //AND.L <ea>,Dq |-|012346|-|-UUUU|-**00|D M+-WXZPI|1100_qqq_010_mmm_rrr 3444: case 0b1100_000_010: 3445: case 0b1100_001_010: 3446: case 0b1100_010_010: 3447: case 0b1100_011_010: 3448: case 0b1100_100_010: 3449: case 0b1100_101_010: 3450: case 0b1100_110_010: 3451: case 0b1100_111_010: 3452: irpAndToRegLong (); 3453: break irpSwitch; 3454: 3455: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3456: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3457: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3458: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3459: //MULU.W <ea>,Dq |-|012346|-|-UUUU|-***0|D M+-WXZPI|1100_qqq_011_mmm_rrr 3460: case 0b1100_000_011: 3461: case 0b1100_001_011: 3462: case 0b1100_010_011: 3463: case 0b1100_011_011: 3464: case 0b1100_100_011: 3465: case 0b1100_101_011: 3466: case 0b1100_110_011: 3467: case 0b1100_111_011: 3468: irpMuluWord (); 3469: break irpSwitch; 3470: 3471: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3472: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3473: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3474: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3475: //ABCD.B Dr,Dq |-|012346|-|UUUUU|*U*U*| |1100_qqq_100_000_rrr 3476: //ABCD.B -(Ar),-(Aq) |-|012346|-|UUUUU|*U*U*| |1100_qqq_100_001_rrr 3477: //AND.B Dq,<ea> |-|012346|-|-UUUU|-**00| M+-WXZ |1100_qqq_100_mmm_rrr 3478: case 0b1100_000_100: 3479: case 0b1100_001_100: 3480: case 0b1100_010_100: 3481: case 0b1100_011_100: 3482: case 0b1100_100_100: 3483: case 0b1100_101_100: 3484: case 0b1100_110_100: 3485: case 0b1100_111_100: 3486: irpAndToMemByte (); 3487: break irpSwitch; 3488: 3489: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3490: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3491: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3492: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3493: //EXG.L Dq,Dr |-|012346|-|-----|-----| |1100_qqq_101_000_rrr 3494: //EXG.L Aq,Ar |-|012346|-|-----|-----| |1100_qqq_101_001_rrr 3495: //AND.W Dq,<ea> |-|012346|-|-UUUU|-**00| M+-WXZ |1100_qqq_101_mmm_rrr 3496: case 0b1100_000_101: 3497: case 0b1100_001_101: 3498: case 0b1100_010_101: 3499: case 0b1100_011_101: 3500: case 0b1100_100_101: 3501: case 0b1100_101_101: 3502: case 0b1100_110_101: 3503: case 0b1100_111_101: 3504: irpAndToMemWord (); 3505: break irpSwitch; 3506: 3507: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3508: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3509: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3510: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3511: //EXG.L Dq,Ar |-|012346|-|-----|-----| |1100_qqq_110_001_rrr 3512: //AND.L Dq,<ea> |-|012346|-|-UUUU|-**00| M+-WXZ |1100_qqq_110_mmm_rrr 3513: case 0b1100_000_110: 3514: case 0b1100_001_110: 3515: case 0b1100_010_110: 3516: case 0b1100_011_110: 3517: case 0b1100_100_110: 3518: case 0b1100_101_110: 3519: case 0b1100_110_110: 3520: case 0b1100_111_110: 3521: irpAndToMemLong (); 3522: break irpSwitch; 3523: 3524: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3525: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3526: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3527: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3528: //MULS.W <ea>,Dq |-|012346|-|-UUUU|-***0|D M+-WXZPI|1100_qqq_111_mmm_rrr 3529: case 0b1100_000_111: 3530: case 0b1100_001_111: 3531: case 0b1100_010_111: 3532: case 0b1100_011_111: 3533: case 0b1100_100_111: 3534: case 0b1100_101_111: 3535: case 0b1100_110_111: 3536: case 0b1100_111_111: 3537: irpMulsWord (); 3538: break irpSwitch; 3539: 3540: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3541: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3542: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3543: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3544: //ADD.B <ea>,Dq |-|012346|-|UUUUU|*****|D M+-WXZPI|1101_qqq_000_mmm_rrr 3545: case 0b1101_000_000: 3546: case 0b1101_001_000: 3547: case 0b1101_010_000: 3548: case 0b1101_011_000: 3549: case 0b1101_100_000: 3550: case 0b1101_101_000: 3551: case 0b1101_110_000: 3552: case 0b1101_111_000: 3553: irpAddToRegByte (); 3554: break irpSwitch; 3555: 3556: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3557: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3558: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3559: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3560: //ADD.W <ea>,Dq |-|012346|-|UUUUU|*****|DAM+-WXZPI|1101_qqq_001_mmm_rrr 3561: case 0b1101_000_001: 3562: case 0b1101_001_001: 3563: case 0b1101_010_001: 3564: case 0b1101_011_001: 3565: case 0b1101_100_001: 3566: case 0b1101_101_001: 3567: case 0b1101_110_001: 3568: case 0b1101_111_001: 3569: irpAddToRegWord (); 3570: break irpSwitch; 3571: 3572: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3573: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3574: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3575: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3576: //ADD.L <ea>,Dq |-|012346|-|UUUUU|*****|DAM+-WXZPI|1101_qqq_010_mmm_rrr 3577: case 0b1101_000_010: 3578: case 0b1101_001_010: 3579: case 0b1101_010_010: 3580: case 0b1101_011_010: 3581: case 0b1101_100_010: 3582: case 0b1101_101_010: 3583: case 0b1101_110_010: 3584: case 0b1101_111_010: 3585: irpAddToRegLong (); 3586: break irpSwitch; 3587: 3588: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3589: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3590: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3591: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3592: //ADDA.W <ea>,Aq |-|012346|-|-----|-----|DAM+-WXZPI|1101_qqq_011_mmm_rrr 3593: //ADD.W <ea>,Aq |A|012346|-|-----|-----|DAM+-WXZPI|1101_qqq_011_mmm_rrr [ADDA.W <ea>,Aq] 3594: case 0b1101_000_011: 3595: case 0b1101_001_011: 3596: case 0b1101_010_011: 3597: case 0b1101_011_011: 3598: case 0b1101_100_011: 3599: case 0b1101_101_011: 3600: case 0b1101_110_011: 3601: case 0b1101_111_011: 3602: irpAddaWord (); 3603: break irpSwitch; 3604: 3605: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3606: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3607: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3608: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3609: //ADDX.B Dr,Dq |-|012346|-|*UUUU|*****| |1101_qqq_100_000_rrr 3610: //ADDX.B -(Ar),-(Aq) |-|012346|-|*UUUU|*****| |1101_qqq_100_001_rrr 3611: //ADD.B Dq,<ea> |-|012346|-|UUUUU|*****| M+-WXZ |1101_qqq_100_mmm_rrr 3612: case 0b1101_000_100: 3613: case 0b1101_001_100: 3614: case 0b1101_010_100: 3615: case 0b1101_011_100: 3616: case 0b1101_100_100: 3617: case 0b1101_101_100: 3618: case 0b1101_110_100: 3619: case 0b1101_111_100: 3620: irpAddToMemByte (); 3621: break irpSwitch; 3622: 3623: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3624: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3625: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3626: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3627: //ADDX.W Dr,Dq |-|012346|-|*UUUU|*****| |1101_qqq_101_000_rrr 3628: //ADDX.W -(Ar),-(Aq) |-|012346|-|*UUUU|*****| |1101_qqq_101_001_rrr 3629: //ADD.W Dq,<ea> |-|012346|-|UUUUU|*****| M+-WXZ |1101_qqq_101_mmm_rrr 3630: case 0b1101_000_101: 3631: case 0b1101_001_101: 3632: case 0b1101_010_101: 3633: case 0b1101_011_101: 3634: case 0b1101_100_101: 3635: case 0b1101_101_101: 3636: case 0b1101_110_101: 3637: case 0b1101_111_101: 3638: irpAddToMemWord (); 3639: break irpSwitch; 3640: 3641: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3642: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3643: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3644: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3645: //ADDX.L Dr,Dq |-|012346|-|*UUUU|*****| |1101_qqq_110_000_rrr 3646: //ADDX.L -(Ar),-(Aq) |-|012346|-|*UUUU|*****| |1101_qqq_110_001_rrr 3647: //ADD.L Dq,<ea> |-|012346|-|UUUUU|*****| M+-WXZ |1101_qqq_110_mmm_rrr 3648: case 0b1101_000_110: 3649: case 0b1101_001_110: 3650: case 0b1101_010_110: 3651: case 0b1101_011_110: 3652: case 0b1101_100_110: 3653: case 0b1101_101_110: 3654: case 0b1101_110_110: 3655: case 0b1101_111_110: 3656: irpAddToMemLong (); 3657: break irpSwitch; 3658: 3659: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3660: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3661: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3662: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3663: //ADDA.L <ea>,Aq |-|012346|-|-----|-----|DAM+-WXZPI|1101_qqq_111_mmm_rrr 3664: //ADD.L <ea>,Aq |A|012346|-|-----|-----|DAM+-WXZPI|1101_qqq_111_mmm_rrr [ADDA.L <ea>,Aq] 3665: case 0b1101_000_111: 3666: case 0b1101_001_111: 3667: case 0b1101_010_111: 3668: case 0b1101_011_111: 3669: case 0b1101_100_111: 3670: case 0b1101_101_111: 3671: case 0b1101_110_111: 3672: case 0b1101_111_111: 3673: irpAddaLong (); 3674: break irpSwitch; 3675: 3676: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3677: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3678: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3679: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3680: //ASR.B #<data>,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_000_000_rrr 3681: //LSR.B #<data>,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_000_001_rrr 3682: //ROXR.B #<data>,Dr |-|012346|-|*UUUU|***0*| |1110_qqq_000_010_rrr 3683: //ROR.B #<data>,Dr |-|012346|-|-UUUU|-**0*| |1110_qqq_000_011_rrr 3684: //ASR.B Dq,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_000_100_rrr 3685: //LSR.B Dq,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_000_101_rrr 3686: //ROXR.B Dq,Dr |-|012346|-|*UUUU|***0*| |1110_qqq_000_110_rrr 3687: //ROR.B Dq,Dr |-|012346|-|-UUUU|-**0*| |1110_qqq_000_111_rrr 3688: //ASR.B Dr |A|012346|-|UUUUU|***0*| |1110_001_000_000_rrr [ASR.B #1,Dr] 3689: //LSR.B Dr |A|012346|-|UUUUU|***0*| |1110_001_000_001_rrr [LSR.B #1,Dr] 3690: //ROXR.B Dr |A|012346|-|*UUUU|***0*| |1110_001_000_010_rrr [ROXR.B #1,Dr] 3691: //ROR.B Dr |A|012346|-|-UUUU|-**0*| |1110_001_000_011_rrr [ROR.B #1,Dr] 3692: case 0b1110_000_000: 3693: case 0b1110_001_000: 3694: case 0b1110_010_000: 3695: case 0b1110_011_000: 3696: case 0b1110_100_000: 3697: case 0b1110_101_000: 3698: case 0b1110_110_000: 3699: case 0b1110_111_000: 3700: irpXxrToRegByte (); 3701: break irpSwitch; 3702: 3703: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3704: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3705: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3706: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3707: //ASR.W #<data>,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_001_000_rrr 3708: //LSR.W #<data>,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_001_001_rrr 3709: //ROXR.W #<data>,Dr |-|012346|-|*UUUU|***0*| |1110_qqq_001_010_rrr 3710: //ROR.W #<data>,Dr |-|012346|-|-UUUU|-**0*| |1110_qqq_001_011_rrr 3711: //ASR.W Dq,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_001_100_rrr 3712: //LSR.W Dq,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_001_101_rrr 3713: //ROXR.W Dq,Dr |-|012346|-|*UUUU|***0*| |1110_qqq_001_110_rrr 3714: //ROR.W Dq,Dr |-|012346|-|-UUUU|-**0*| |1110_qqq_001_111_rrr 3715: //ASR.W Dr |A|012346|-|UUUUU|***0*| |1110_001_001_000_rrr [ASR.W #1,Dr] 3716: //LSR.W Dr |A|012346|-|UUUUU|***0*| |1110_001_001_001_rrr [LSR.W #1,Dr] 3717: //ROXR.W Dr |A|012346|-|*UUUU|***0*| |1110_001_001_010_rrr [ROXR.W #1,Dr] 3718: //ROR.W Dr |A|012346|-|-UUUU|-**0*| |1110_001_001_011_rrr [ROR.W #1,Dr] 3719: case 0b1110_000_001: 3720: case 0b1110_001_001: 3721: case 0b1110_010_001: 3722: case 0b1110_011_001: 3723: case 0b1110_100_001: 3724: case 0b1110_101_001: 3725: case 0b1110_110_001: 3726: case 0b1110_111_001: 3727: irpXxrToRegWord (); 3728: break irpSwitch; 3729: 3730: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3731: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3732: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3733: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3734: //ASR.L #<data>,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_010_000_rrr 3735: //LSR.L #<data>,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_010_001_rrr 3736: //ROXR.L #<data>,Dr |-|012346|-|*UUUU|***0*| |1110_qqq_010_010_rrr 3737: //ROR.L #<data>,Dr |-|012346|-|-UUUU|-**0*| |1110_qqq_010_011_rrr 3738: //ASR.L Dq,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_010_100_rrr 3739: //LSR.L Dq,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_010_101_rrr 3740: //ROXR.L Dq,Dr |-|012346|-|*UUUU|***0*| |1110_qqq_010_110_rrr 3741: //ROR.L Dq,Dr |-|012346|-|-UUUU|-**0*| |1110_qqq_010_111_rrr 3742: //ASR.L Dr |A|012346|-|UUUUU|***0*| |1110_001_010_000_rrr [ASR.L #1,Dr] 3743: //LSR.L Dr |A|012346|-|UUUUU|***0*| |1110_001_010_001_rrr [LSR.L #1,Dr] 3744: //ROXR.L Dr |A|012346|-|*UUUU|***0*| |1110_001_010_010_rrr [ROXR.L #1,Dr] 3745: //ROR.L Dr |A|012346|-|-UUUU|-**0*| |1110_001_010_011_rrr [ROR.L #1,Dr] 3746: case 0b1110_000_010: 3747: case 0b1110_001_010: 3748: case 0b1110_010_010: 3749: case 0b1110_011_010: 3750: case 0b1110_100_010: 3751: case 0b1110_101_010: 3752: case 0b1110_110_010: 3753: case 0b1110_111_010: 3754: irpXxrToRegLong (); 3755: break irpSwitch; 3756: 3757: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3758: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3759: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3760: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3761: //ASR.W <ea> |-|012346|-|UUUUU|***0*| M+-WXZ |1110_000_011_mmm_rrr 3762: case 0b1110_000_011: 3763: irpAsrToMem (); 3764: break irpSwitch; 3765: 3766: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3767: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3768: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3769: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3770: //ASL.B #<data>,Dr |-|012346|-|UUUUU|*****| |1110_qqq_100_000_rrr 3771: //LSL.B #<data>,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_100_001_rrr 3772: //ROXL.B #<data>,Dr |-|012346|-|*UUUU|***0*| |1110_qqq_100_010_rrr 3773: //ROL.B #<data>,Dr |-|012346|-|-UUUU|-**0*| |1110_qqq_100_011_rrr 3774: //ASL.B Dq,Dr |-|012346|-|UUUUU|*****| |1110_qqq_100_100_rrr 3775: //LSL.B Dq,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_100_101_rrr 3776: //ROXL.B Dq,Dr |-|012346|-|*UUUU|***0*| |1110_qqq_100_110_rrr 3777: //ROL.B Dq,Dr |-|012346|-|-UUUU|-**0*| |1110_qqq_100_111_rrr 3778: //ASL.B Dr |A|012346|-|UUUUU|*****| |1110_001_100_000_rrr [ASL.B #1,Dr] 3779: //LSL.B Dr |A|012346|-|UUUUU|***0*| |1110_001_100_001_rrr [LSL.B #1,Dr] 3780: //ROXL.B Dr |A|012346|-|*UUUU|***0*| |1110_001_100_010_rrr [ROXL.B #1,Dr] 3781: //ROL.B Dr |A|012346|-|-UUUU|-**0*| |1110_001_100_011_rrr [ROL.B #1,Dr] 3782: case 0b1110_000_100: 3783: case 0b1110_001_100: 3784: case 0b1110_010_100: 3785: case 0b1110_011_100: 3786: case 0b1110_100_100: 3787: case 0b1110_101_100: 3788: case 0b1110_110_100: 3789: case 0b1110_111_100: 3790: irpXxlToRegByte (); 3791: break irpSwitch; 3792: 3793: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3794: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3795: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3796: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3797: //ASL.W #<data>,Dr |-|012346|-|UUUUU|*****| |1110_qqq_101_000_rrr 3798: //LSL.W #<data>,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_101_001_rrr 3799: //ROXL.W #<data>,Dr |-|012346|-|*UUUU|***0*| |1110_qqq_101_010_rrr 3800: //ROL.W #<data>,Dr |-|012346|-|-UUUU|-**0*| |1110_qqq_101_011_rrr 3801: //ASL.W Dq,Dr |-|012346|-|UUUUU|*****| |1110_qqq_101_100_rrr 3802: //LSL.W Dq,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_101_101_rrr 3803: //ROXL.W Dq,Dr |-|012346|-|*UUUU|***0*| |1110_qqq_101_110_rrr 3804: //ROL.W Dq,Dr |-|012346|-|-UUUU|-**0*| |1110_qqq_101_111_rrr 3805: //ASL.W Dr |A|012346|-|UUUUU|*****| |1110_001_101_000_rrr [ASL.W #1,Dr] 3806: //LSL.W Dr |A|012346|-|UUUUU|***0*| |1110_001_101_001_rrr [LSL.W #1,Dr] 3807: //ROXL.W Dr |A|012346|-|*UUUU|***0*| |1110_001_101_010_rrr [ROXL.W #1,Dr] 3808: //ROL.W Dr |A|012346|-|-UUUU|-**0*| |1110_001_101_011_rrr [ROL.W #1,Dr] 3809: case 0b1110_000_101: 3810: case 0b1110_001_101: 3811: case 0b1110_010_101: 3812: case 0b1110_011_101: 3813: case 0b1110_100_101: 3814: case 0b1110_101_101: 3815: case 0b1110_110_101: 3816: case 0b1110_111_101: 3817: irpXxlToRegWord (); 3818: break irpSwitch; 3819: 3820: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3821: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3822: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3823: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3824: //ASL.L #<data>,Dr |-|012346|-|UUUUU|*****| |1110_qqq_110_000_rrr 3825: //LSL.L #<data>,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_110_001_rrr 3826: //ROXL.L #<data>,Dr |-|012346|-|*UUUU|***0*| |1110_qqq_110_010_rrr 3827: //ROL.L #<data>,Dr |-|012346|-|-UUUU|-**0*| |1110_qqq_110_011_rrr 3828: //ASL.L Dq,Dr |-|012346|-|UUUUU|*****| |1110_qqq_110_100_rrr 3829: //LSL.L Dq,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_110_101_rrr 3830: //ROXL.L Dq,Dr |-|012346|-|*UUUU|***0*| |1110_qqq_110_110_rrr 3831: //ROL.L Dq,Dr |-|012346|-|-UUUU|-**0*| |1110_qqq_110_111_rrr 3832: //ASL.L Dr |A|012346|-|UUUUU|*****| |1110_001_110_000_rrr [ASL.L #1,Dr] 3833: //LSL.L Dr |A|012346|-|UUUUU|***0*| |1110_001_110_001_rrr [LSL.L #1,Dr] 3834: //ROXL.L Dr |A|012346|-|*UUUU|***0*| |1110_001_110_010_rrr [ROXL.L #1,Dr] 3835: //ROL.L Dr |A|012346|-|-UUUU|-**0*| |1110_001_110_011_rrr [ROL.L #1,Dr] 3836: case 0b1110_000_110: 3837: case 0b1110_001_110: 3838: case 0b1110_010_110: 3839: case 0b1110_011_110: 3840: case 0b1110_100_110: 3841: case 0b1110_101_110: 3842: case 0b1110_110_110: 3843: case 0b1110_111_110: 3844: irpXxlToRegLong (); 3845: break irpSwitch; 3846: 3847: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3848: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3849: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3850: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3851: //ASL.W <ea> |-|012346|-|UUUUU|*****| M+-WXZ |1110_000_111_mmm_rrr 3852: case 0b1110_000_111: 3853: irpAslToMem (); 3854: break irpSwitch; 3855: 3856: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3857: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3858: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3859: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3860: //LSR.W <ea> |-|012346|-|UUUUU|*0*0*| M+-WXZ |1110_001_011_mmm_rrr 3861: case 0b1110_001_011: 3862: irpLsrToMem (); 3863: break irpSwitch; 3864: 3865: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3866: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3867: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3868: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3869: //LSL.W <ea> |-|012346|-|UUUUU|***0*| M+-WXZ |1110_001_111_mmm_rrr 3870: case 0b1110_001_111: 3871: irpLslToMem (); 3872: break irpSwitch; 3873: 3874: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3875: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3876: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3877: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3878: //ROXR.W <ea> |-|012346|-|*UUUU|***0*| M+-WXZ |1110_010_011_mmm_rrr 3879: case 0b1110_010_011: 3880: irpRoxrToMem (); 3881: break irpSwitch; 3882: 3883: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3884: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3885: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3886: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3887: //ROXL.W <ea> |-|012346|-|*UUUU|***0*| M+-WXZ |1110_010_111_mmm_rrr 3888: case 0b1110_010_111: 3889: irpRoxlToMem (); 3890: break irpSwitch; 3891: 3892: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3893: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3894: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3895: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3896: //ROR.W <ea> |-|012346|-|-UUUU|-**0*| M+-WXZ |1110_011_011_mmm_rrr 3897: case 0b1110_011_011: 3898: irpRorToMem (); 3899: break irpSwitch; 3900: 3901: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3902: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3903: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3904: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3905: //ROL.W <ea> |-|012346|-|-UUUU|-**0*| M+-WXZ |1110_011_111_mmm_rrr 3906: case 0b1110_011_111: 3907: irpRolToMem (); 3908: break irpSwitch; 3909: 3910: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3911: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3912: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3913: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3914: //BFTST <ea>{#o:#w} |-|--2346|-|-UUUU|-**00|D M WXZP |1110_100_011_mmm_rrr-00000ooooo0wwwww 3915: //BFTST <ea>{#o:Dw} |-|--2346|-|-UUUU|-**00|D M WXZP |1110_100_011_mmm_rrr-00000ooooo100www 3916: //BFTST <ea>{Do:#w} |-|--2346|-|-UUUU|-**00|D M WXZP |1110_100_011_mmm_rrr-0000100ooo0wwwww 3917: //BFTST <ea>{Do:Dw} |-|--2346|-|-UUUU|-**00|D M WXZP |1110_100_011_mmm_rrr-0000100ooo100www 3918: case 0b1110_100_011: 3919: irpBftst (); 3920: break irpSwitch; 3921: 3922: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3923: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3924: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3925: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3926: //BFEXTU <ea>{#o:#w},Dn |-|--2346|-|-UUUU|-**00|D M WXZP |1110_100_111_mmm_rrr-0nnn0ooooo0wwwww 3927: //BFEXTU <ea>{#o:Dw},Dn |-|--2346|-|-UUUU|-**00|D M WXZP |1110_100_111_mmm_rrr-0nnn0ooooo100www 3928: //BFEXTU <ea>{Do:#w},Dn |-|--2346|-|-UUUU|-**00|D M WXZP |1110_100_111_mmm_rrr-0nnn100ooo0wwwww 3929: //BFEXTU <ea>{Do:Dw},Dn |-|--2346|-|-UUUU|-**00|D M WXZP |1110_100_111_mmm_rrr-0nnn100ooo100www 3930: case 0b1110_100_111: 3931: irpBfextu (); 3932: break irpSwitch; 3933: 3934: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3935: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3936: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3937: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3938: //BFCHG <ea>{#o:#w} |-|--2346|-|-UUUU|-**00|D M WXZ |1110_101_011_mmm_rrr-00000ooooo0wwwww 3939: //BFCHG <ea>{#o:Dw} |-|--2346|-|-UUUU|-**00|D M WXZ |1110_101_011_mmm_rrr-00000ooooo100www 3940: //BFCHG <ea>{Do:#w} |-|--2346|-|-UUUU|-**00|D M WXZ |1110_101_011_mmm_rrr-0000100ooo0wwwww 3941: //BFCHG <ea>{Do:Dw} |-|--2346|-|-UUUU|-**00|D M WXZ |1110_101_011_mmm_rrr-0000100ooo100www 3942: case 0b1110_101_011: 3943: irpBfchg (); 3944: break irpSwitch; 3945: 3946: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3947: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3948: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3949: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3950: //BFEXTS <ea>{#o:#w},Dn |-|--2346|-|-UUUU|-**00|D M WXZP |1110_101_111_mmm_rrr-0nnn0ooooo0wwwww 3951: //BFEXTS <ea>{#o:Dw},Dn |-|--2346|-|-UUUU|-**00|D M WXZP |1110_101_111_mmm_rrr-0nnn0ooooo100www 3952: //BFEXTS <ea>{Do:#w},Dn |-|--2346|-|-UUUU|-**00|D M WXZP |1110_101_111_mmm_rrr-0nnn100ooo0wwwww 3953: //BFEXTS <ea>{Do:Dw},Dn |-|--2346|-|-UUUU|-**00|D M WXZP |1110_101_111_mmm_rrr-0nnn100ooo100www 3954: case 0b1110_101_111: 3955: irpBfexts (); 3956: break irpSwitch; 3957: 3958: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3959: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3960: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3961: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3962: //BFCLR <ea>{#o:#w} |-|--2346|-|-UUUU|-**00|D M WXZ |1110_110_011_mmm_rrr-00000ooooo0wwwww 3963: //BFCLR <ea>{#o:Dw} |-|--2346|-|-UUUU|-**00|D M WXZ |1110_110_011_mmm_rrr-00000ooooo100www 3964: //BFCLR <ea>{Do:#w} |-|--2346|-|-UUUU|-**00|D M WXZ |1110_110_011_mmm_rrr-0000100ooo0wwwww 3965: //BFCLR <ea>{Do:Dw} |-|--2346|-|-UUUU|-**00|D M WXZ |1110_110_011_mmm_rrr-0000100ooo100www 3966: case 0b1110_110_011: 3967: irpBfclr (); 3968: break irpSwitch; 3969: 3970: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3971: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3972: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3973: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3974: //BFFFO <ea>{#o:#w},Dn |-|--2346|-|-UUUU|-**00|D M WXZP |1110_110_111_mmm_rrr-0nnn0ooooo0wwwww 3975: //BFFFO <ea>{#o:Dw},Dn |-|--2346|-|-UUUU|-**00|D M WXZP |1110_110_111_mmm_rrr-0nnn0ooooo100www 3976: //BFFFO <ea>{Do:#w},Dn |-|--2346|-|-UUUU|-**00|D M WXZP |1110_110_111_mmm_rrr-0nnn100ooo0wwwww 3977: //BFFFO <ea>{Do:Dw},Dn |-|--2346|-|-UUUU|-**00|D M WXZP |1110_110_111_mmm_rrr-0nnn100ooo100www 3978: case 0b1110_110_111: 3979: irpBfffo (); 3980: break irpSwitch; 3981: 3982: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3983: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3984: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3985: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3986: //BFSET <ea>{#o:#w} |-|--2346|-|-UUUU|-**00|D M WXZ |1110_111_011_mmm_rrr-00000ooooo0wwwww 3987: //BFSET <ea>{#o:Dw} |-|--2346|-|-UUUU|-**00|D M WXZ |1110_111_011_mmm_rrr-00000ooooo100www 3988: //BFSET <ea>{Do:#w} |-|--2346|-|-UUUU|-**00|D M WXZ |1110_111_011_mmm_rrr-0000100ooo0wwwww 3989: //BFSET <ea>{Do:Dw} |-|--2346|-|-UUUU|-**00|D M WXZ |1110_111_011_mmm_rrr-0000100ooo100www 3990: case 0b1110_111_011: 3991: irpBfset (); 3992: break irpSwitch; 3993: 3994: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3995: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3996: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3997: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3998: //BFINS Dn,<ea>{#o:#w} |-|--2346|-|-UUUU|-**00|D M WXZ |1110_111_111_mmm_rrr-0nnn0ooooo0wwwww 3999: //BFINS Dn,<ea>{#o:Dw} |-|--2346|-|-UUUU|-**00|D M WXZ |1110_111_111_mmm_rrr-0nnn0ooooo100www 4000: //BFINS Dn,<ea>{Do:#w} |-|--2346|-|-UUUU|-**00|D M WXZ |1110_111_111_mmm_rrr-0nnn100ooo0wwwww 4001: //BFINS Dn,<ea>{Do:Dw} |-|--2346|-|-UUUU|-**00|D M WXZ |1110_111_111_mmm_rrr-0nnn100ooo100www 4002: case 0b1110_111_111: 4003: irpBfins (); 4004: break irpSwitch; 4005: 4006: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 4007: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 4008: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 4009: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 4010: //FTST.X FPm |-|--CC46|-|-----|-----| |1111_001_000_000_000-000mmm0000111010 4011: //FMOVE.X FPm,FPn |-|--CC46|-|-----|-----| |1111_001_000_000_000-000mmmnnn0000000 4012: //FINT.X FPm,FPn |-|--CCS6|-|-----|-----| |1111_001_000_000_000-000mmmnnn0000001 4013: //FSINH.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0000010 4014: //FINTRZ.X FPm,FPn |-|--CCS6|-|-----|-----| |1111_001_000_000_000-000mmmnnn0000011 4015: //FSQRT.X FPm,FPn |-|--CC46|-|-----|-----| |1111_001_000_000_000-000mmmnnn0000100 4016: //FLOGNP1.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0000110 4017: //FETOXM1.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0001000 4018: //FTANH.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0001001 4019: //FATAN.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0001010 4020: //FASIN.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0001100 4021: //FATANH.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0001101 4022: //FSIN.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0001110 4023: //FTAN.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0001111 4024: //FETOX.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0010000 4025: //FTWOTOX.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0010001 4026: //FTENTOX.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0010010 4027: //FLOGN.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0010100 4028: //FLOG10.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0010101 4029: //FLOG2.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0010110 4030: //FABS.X FPm,FPn |-|--CC46|-|-----|-----| |1111_001_000_000_000-000mmmnnn0011000 4031: //FCOSH.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0011001 4032: //FNEG.X FPm,FPn |-|--CC46|-|-----|-----| |1111_001_000_000_000-000mmmnnn0011010 4033: //FACOS.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0011100 4034: //FCOS.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0011101 4035: //FGETEXP.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0011110 4036: //FGETMAN.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0011111 4037: //FDIV.X FPm,FPn |-|--CC46|-|-----|-----| |1111_001_000_000_000-000mmmnnn0100000 4038: //FMOD.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0100001 4039: //FADD.X FPm,FPn |-|--CC46|-|-----|-----| |1111_001_000_000_000-000mmmnnn0100010 4040: //FMUL.X FPm,FPn |-|--CC46|-|-----|-----| |1111_001_000_000_000-000mmmnnn0100011 4041: //FSGLDIV.X FPm,FPn |-|--CCS6|-|-----|-----| |1111_001_000_000_000-000mmmnnn0100100 4042: //FREM.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0100101 4043: //FSCALE.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0100110 4044: //FSGLMUL.X FPm,FPn |-|--CCS6|-|-----|-----| |1111_001_000_000_000-000mmmnnn0100111 4045: //FSUB.X FPm,FPn |-|--CC46|-|-----|-----| |1111_001_000_000_000-000mmmnnn0101000 4046: //FCMP.X FPm,FPn |-|--CC46|-|-----|-----| |1111_001_000_000_000-000mmmnnn0111000 4047: //FSMOVE.X FPm,FPn |-|----46|-|-----|-----| |1111_001_000_000_000-000mmmnnn1000000 4048: //FSSQRT.X FPm,FPn |-|----46|-|-----|-----| |1111_001_000_000_000-000mmmnnn1000001 4049: //FDMOVE.X FPm,FPn |-|----46|-|-----|-----| |1111_001_000_000_000-000mmmnnn1000100 4050: //FDSQRT.X FPm,FPn |-|----46|-|-----|-----| |1111_001_000_000_000-000mmmnnn1000101 4051: //FSABS.X FPm,FPn |-|----46|-|-----|-----| |1111_001_000_000_000-000mmmnnn1011000 4052: //FSNEG.X FPm,FPn |-|----46|-|-----|-----| |1111_001_000_000_000-000mmmnnn1011010 4053: //FDABS.X FPm,FPn |-|----46|-|-----|-----| |1111_001_000_000_000-000mmmnnn1011100 4054: //FDNEG.X FPm,FPn |-|----46|-|-----|-----| |1111_001_000_000_000-000mmmnnn1011110 4055: //FSDIV.X FPm,FPn |-|----46|-|-----|-----| |1111_001_000_000_000-000mmmnnn1100000 4056: //FSADD.X FPm,FPn |-|----46|-|-----|-----| |1111_001_000_000_000-000mmmnnn1100010 4057: //FSMUL.X FPm,FPn |-|----46|-|-----|-----| |1111_001_000_000_000-000mmmnnn1100011 4058: //FDDIV.X FPm,FPn |-|----46|-|-----|-----| |1111_001_000_000_000-000mmmnnn1100100 4059: //FDADD.X FPm,FPn |-|----46|-|-----|-----| |1111_001_000_000_000-000mmmnnn1100110 4060: //FDMUL.X FPm,FPn |-|----46|-|-----|-----| |1111_001_000_000_000-000mmmnnn1100111 4061: //FSSUB.X FPm,FPn |-|----46|-|-----|-----| |1111_001_000_000_000-000mmmnnn1101000 4062: //FDSUB.X FPm,FPn |-|----46|-|-----|-----| |1111_001_000_000_000-000mmmnnn1101100 4063: //FSINCOS.X FPm,FPc:FPs |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmsss0110ccc 4064: //FMOVECR.X #ccc,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-010111nnn0cccccc 4065: //FMOVE.L FPn,<ea> |-|--CC46|-|-----|-----|D M+-WXZ |1111_001_000_mmm_rrr-011000nnn0000000 4066: //FMOVE.S FPn,<ea> |-|--CC46|-|-----|-----|D M+-WXZ |1111_001_000_mmm_rrr-011001nnn0000000 4067: //FMOVE.W FPn,<ea> |-|--CC46|-|-----|-----|D M+-WXZ |1111_001_000_mmm_rrr-011100nnn0000000 4068: //FMOVE.B FPn,<ea> |-|--CC46|-|-----|-----|D M+-WXZ |1111_001_000_mmm_rrr-011110nnn0000000 4069: //FMOVE.L FPIAR,<ea> |-|--CC46|-|-----|-----|DAM+-WXZ |1111_001_000_mmm_rrr-1010010000000000 4070: //FMOVEM.L FPIAR,<ea> |-|--CC46|-|-----|-----|DAM+-WXZ |1111_001_000_mmm_rrr-1010010000000000 4071: //FMOVE.L FPSR,<ea> |-|--CC46|-|-----|-----|D M+-WXZ |1111_001_000_mmm_rrr-1010100000000000 4072: //FMOVEM.L FPSR,<ea> |-|--CC46|-|-----|-----|D M+-WXZ |1111_001_000_mmm_rrr-1010100000000000 4073: //FMOVE.L FPCR,<ea> |-|--CC46|-|-----|-----|D M+-WXZ |1111_001_000_mmm_rrr-1011000000000000 4074: //FMOVEM.L FPCR,<ea> |-|--CC46|-|-----|-----|D M+-WXZ |1111_001_000_mmm_rrr-1011000000000000 4075: //FTST.L <ea> |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-0100000000111010 4076: //FMOVE.L <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0000000 4077: //FINT.L <ea>,FPn |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0000001 4078: //FSINH.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0000010 4079: //FINTRZ.L <ea>,FPn |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0000011 4080: //FSQRT.L <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0000100 4081: //FLOGNP1.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0000110 4082: //FETOXM1.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0001000 4083: //FTANH.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0001001 4084: //FATAN.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0001010 4085: //FASIN.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0001100 4086: //FATANH.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0001101 4087: //FSIN.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0001110 4088: //FTAN.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0001111 4089: //FETOX.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0010000 4090: //FTWOTOX.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0010001 4091: //FTENTOX.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0010010 4092: //FLOGN.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0010100 4093: //FLOG10.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0010101 4094: //FLOG2.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0010110 4095: //FABS.L <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0011000 4096: //FCOSH.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0011001 4097: //FNEG.L <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0011010 4098: //FACOS.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0011100 4099: //FCOS.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0011101 4100: //FGETEXP.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0011110 4101: //FGETMAN.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0011111 4102: //FDIV.L <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0100000 4103: //FMOD.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0100001 4104: //FADD.L <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0100010 4105: //FMUL.L <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0100011 4106: //FSGLDIV.L <ea>,FPn |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0100100 4107: //FREM.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0100101 4108: //FSCALE.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0100110 4109: //FSGLMUL.L <ea>,FPn |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0100111 4110: //FSUB.L <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0101000 4111: //FCMP.L <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0111000 4112: //FSMOVE.L <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn1000000 4113: //FSSQRT.L <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn1000001 4114: //FDMOVE.L <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn1000100 4115: //FDSQRT.L <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn1000101 4116: //FSABS.L <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn1011000 4117: //FSNEG.L <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn1011010 4118: //FDABS.L <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn1011100 4119: //FDNEG.L <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn1011110 4120: //FSDIV.L <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn1100000 4121: //FSADD.L <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn1100010 4122: //FSMUL.L <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn1100011 4123: //FDDIV.L <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn1100100 4124: //FDADD.L <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn1100110 4125: //FDMUL.L <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn1100111 4126: //FSSUB.L <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn1101000 4127: //FDSUB.L <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn1101100 4128: //FSINCOS.L <ea>,FPc:FPs |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000sss0110ccc 4129: //FTST.S <ea> |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-0100010000111010 4130: //FMOVE.S <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0000000 4131: //FINT.S <ea>,FPn |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0000001 4132: //FSINH.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0000010 4133: //FINTRZ.S <ea>,FPn |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0000011 4134: //FSQRT.S <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0000100 4135: //FLOGNP1.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0000110 4136: //FETOXM1.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0001000 4137: //FTANH.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0001001 4138: //FATAN.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0001010 4139: //FASIN.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0001100 4140: //FATANH.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0001101 4141: //FSIN.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0001110 4142: //FTAN.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0001111 4143: //FETOX.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0010000 4144: //FTWOTOX.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0010001 4145: //FTENTOX.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0010010 4146: //FLOGN.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0010100 4147: //FLOG10.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0010101 4148: //FLOG2.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0010110 4149: //FABS.S <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0011000 4150: //FCOSH.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0011001 4151: //FNEG.S <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0011010 4152: //FACOS.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0011100 4153: //FCOS.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0011101 4154: //FGETEXP.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0011110 4155: //FGETMAN.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0011111 4156: //FDIV.S <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0100000 4157: //FMOD.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0100001 4158: //FADD.S <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0100010 4159: //FMUL.S <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0100011 4160: //FSGLDIV.S <ea>,FPn |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0100100 4161: //FREM.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0100101 4162: //FSCALE.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0100110 4163: //FSGLMUL.S <ea>,FPn |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0100111 4164: //FSUB.S <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0101000 4165: //FCMP.S <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0111000 4166: //FSMOVE.S <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn1000000 4167: //FSSQRT.S <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn1000001 4168: //FDMOVE.S <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn1000100 4169: //FDSQRT.S <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn1000101 4170: //FSABS.S <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn1011000 4171: //FSNEG.S <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn1011010 4172: //FDABS.S <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn1011100 4173: //FDNEG.S <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn1011110 4174: //FSDIV.S <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn1100000 4175: //FSADD.S <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn1100010 4176: //FSMUL.S <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn1100011 4177: //FDDIV.S <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn1100100 4178: //FDADD.S <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn1100110 4179: //FDMUL.S <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn1100111 4180: //FSSUB.S <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn1101000 4181: //FDSUB.S <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn1101100 4182: //FSINCOS.S <ea>,FPc:FPs |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001sss0110ccc 4183: //FTST.W <ea> |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-0101000000111010 4184: //FMOVE.W <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0000000 4185: //FINT.W <ea>,FPn |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0000001 4186: //FSINH.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0000010 4187: //FINTRZ.W <ea>,FPn |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0000011 4188: //FSQRT.W <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0000100 4189: //FLOGNP1.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0000110 4190: //FETOXM1.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0001000 4191: //FTANH.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0001001 4192: //FATAN.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0001010 4193: //FASIN.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0001100 4194: //FATANH.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0001101 4195: //FSIN.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0001110 4196: //FTAN.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0001111 4197: //FETOX.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0010000 4198: //FTWOTOX.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0010001 4199: //FTENTOX.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0010010 4200: //FLOGN.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0010100 4201: //FLOG10.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0010101 4202: //FLOG2.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0010110 4203: //FABS.W <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0011000 4204: //FCOSH.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0011001 4205: //FNEG.W <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0011010 4206: //FACOS.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0011100 4207: //FCOS.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0011101 4208: //FGETEXP.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0011110 4209: //FGETMAN.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0011111 4210: //FDIV.W <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0100000 4211: //FMOD.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0100001 4212: //FADD.W <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0100010 4213: //FMUL.W <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0100011 4214: //FSGLDIV.W <ea>,FPn |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0100100 4215: //FREM.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0100101 4216: //FSCALE.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0100110 4217: //FSGLMUL.W <ea>,FPn |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0100111 4218: //FSUB.W <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0101000 4219: //FCMP.W <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0111000 4220: //FSMOVE.W <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn1000000 4221: //FSSQRT.W <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn1000001 4222: //FDMOVE.W <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn1000100 4223: //FDSQRT.W <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn1000101 4224: //FSABS.W <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn1011000 4225: //FSNEG.W <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn1011010 4226: //FDABS.W <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn1011100 4227: //FDNEG.W <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn1011110 4228: //FSDIV.W <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn1100000 4229: //FSADD.W <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn1100010 4230: //FSMUL.W <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn1100011 4231: //FDDIV.W <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn1100100 4232: //FDADD.W <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn1100110 4233: //FDMUL.W <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn1100111 4234: //FSSUB.W <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn1101000 4235: //FDSUB.W <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn1101100 4236: //FSINCOS.W <ea>,FPc:FPs |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100sss0110ccc 4237: //FTST.B <ea> |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-0101100000111010 4238: //FMOVE.B <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0000000 4239: //FINT.B <ea>,FPn |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0000001 4240: //FSINH.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0000010 4241: //FINTRZ.B <ea>,FPn |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0000011 4242: //FSQRT.B <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0000100 4243: //FLOGNP1.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0000110 4244: //FETOXM1.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0001000 4245: //FTANH.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0001001 4246: //FATAN.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0001010 4247: //FASIN.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0001100 4248: //FATANH.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0001101 4249: //FSIN.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0001110 4250: //FTAN.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0001111 4251: //FETOX.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0010000 4252: //FTWOTOX.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0010001 4253: //FTENTOX.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0010010 4254: //FLOGN.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0010100 4255: //FLOG10.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0010101 4256: //FLOG2.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0010110 4257: //FABS.B <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0011000 4258: //FCOSH.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0011001 4259: //FNEG.B <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0011010 4260: //FACOS.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0011100 4261: //FCOS.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0011101 4262: //FGETEXP.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0011110 4263: //FGETMAN.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0011111 4264: //FDIV.B <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0100000 4265: //FMOD.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0100001 4266: //FADD.B <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0100010 4267: //FMUL.B <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0100011 4268: //FSGLDIV.B <ea>,FPn |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0100100 4269: //FREM.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0100101 4270: //FSCALE.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0100110 4271: //FSGLMUL.B <ea>,FPn |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0100111 4272: //FSUB.B <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0101000 4273: //FCMP.B <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0111000 4274: //FSMOVE.B <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn1000000 4275: //FSSQRT.B <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn1000001 4276: //FDMOVE.B <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn1000100 4277: //FDSQRT.B <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn1000101 4278: //FSABS.B <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn1011000 4279: //FSNEG.B <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn1011010 4280: //FDABS.B <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn1011100 4281: //FDNEG.B <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn1011110 4282: //FSDIV.B <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn1100000 4283: //FSADD.B <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn1100010 4284: //FSMUL.B <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn1100011 4285: //FDDIV.B <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn1100100 4286: //FDADD.B <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn1100110 4287: //FDMUL.B <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn1100111 4288: //FSSUB.B <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn1101000 4289: //FDSUB.B <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn1101100 4290: //FSINCOS.B <ea>,FPc:FPs |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110sss0110ccc 4291: //FMOVE.L <ea>,FPIAR |-|--CC46|-|-----|-----|DAM+-WXZPI|1111_001_000_mmm_rrr-1000010000000000 4292: //FMOVEM.L <ea>,FPIAR |-|--CC46|-|-----|-----|DAM+-WXZPI|1111_001_000_mmm_rrr-1000010000000000 4293: //FMOVE.L <ea>,FPSR |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-1000100000000000 4294: //FMOVEM.L <ea>,FPSR |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-1000100000000000 4295: //FMOVE.L <ea>,FPCR |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-1001000000000000 4296: //FMOVEM.L <ea>,FPCR |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-1001000000000000 4297: //FMOVE.X FPn,<ea> |-|--CC46|-|-----|-----| M+-WXZ |1111_001_000_mmm_rrr-011010nnn0000000 4298: //FMOVE.P FPn,<ea>{#k} |-|--CCSS|-|-----|-----| M+-WXZ |1111_001_000_mmm_rrr-011011nnnkkkkkkk 4299: //FMOVE.D FPn,<ea> |-|--CC46|-|-----|-----| M+-WXZ |1111_001_000_mmm_rrr-011101nnn0000000 4300: //FMOVE.P FPn,<ea>{Dk} |-|--CCSS|-|-----|-----| M+-WXZ |1111_001_000_mmm_rrr-011111nnnkkk0000 4301: //FMOVEM.L FPSR/FPIAR,<ea> |-|--CC46|-|-----|-----| M+-WXZ |1111_001_000_mmm_rrr-1010110000000000 4302: //FMOVEM.L FPCR/FPIAR,<ea> |-|--CC46|-|-----|-----| M+-WXZ |1111_001_000_mmm_rrr-1011010000000000 4303: //FMOVEM.L FPCR/FPSR,<ea> |-|--CC46|-|-----|-----| M+-WXZ |1111_001_000_mmm_rrr-1011100000000000 4304: //FMOVEM.L FPCR/FPSR/FPIAR,<ea> |-|--CC46|-|-----|-----| M+-WXZ |1111_001_000_mmm_rrr-1011110000000000 4305: //FMOVEM.X #<data>,<ea> |-|--CC46|-|-----|-----| M WXZ |1111_001_000_mmm_rrr-11110000dddddddd 4306: //FMOVEM.X <list>,<ea> |-|--CC46|-|-----|-----| M WXZ |1111_001_000_mmm_rrr-11110000llllllll 4307: //FMOVEM.X Dl,<ea> |-|--CC4S|-|-----|-----| M WXZ |1111_001_000_mmm_rrr-111110000lll0000 4308: //FMOVEM.L <ea>,FPSR/FPIAR |-|--CC46|-|-----|-----| M+-WXZP |1111_001_000_mmm_rrr-1000110000000000 4309: //FMOVEM.L <ea>,FPCR/FPIAR |-|--CC46|-|-----|-----| M+-WXZP |1111_001_000_mmm_rrr-1001010000000000 4310: //FMOVEM.L <ea>,FPCR/FPSR |-|--CC46|-|-----|-----| M+-WXZP |1111_001_000_mmm_rrr-1001100000000000 4311: //FMOVEM.L <ea>,FPCR/FPSR/FPIAR |-|--CC46|-|-----|-----| M+-WXZP |1111_001_000_mmm_rrr-1001110000000000 4312: //FMOVEM.X <ea>,#<data> |-|--CC46|-|-----|-----| M+ WXZP |1111_001_000_mmm_rrr-11010000dddddddd 4313: //FMOVEM.X <ea>,<list> |-|--CC46|-|-----|-----| M+ WXZP |1111_001_000_mmm_rrr-11010000llllllll 4314: //FMOVEM.X <ea>,Dl |-|--CC4S|-|-----|-----| M+ WXZP |1111_001_000_mmm_rrr-110110000lll0000 4315: //FTST.X <ea> |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-0100100000111010 4316: //FMOVE.X <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0000000 4317: //FINT.X <ea>,FPn |-|--CCS6|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0000001 4318: //FSINH.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0000010 4319: //FINTRZ.X <ea>,FPn |-|--CCS6|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0000011 4320: //FSQRT.X <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0000100 4321: //FLOGNP1.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0000110 4322: //FETOXM1.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0001000 4323: //FTANH.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0001001 4324: //FATAN.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0001010 4325: //FASIN.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0001100 4326: //FATANH.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0001101 4327: //FSIN.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0001110 4328: //FTAN.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0001111 4329: //FETOX.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0010000 4330: //FTWOTOX.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0010001 4331: //FTENTOX.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0010010 4332: //FLOGN.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0010100 4333: //FLOG10.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0010101 4334: //FLOG2.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0010110 4335: //FABS.X <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0011000 4336: //FCOSH.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0011001 4337: //FNEG.X <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0011010 4338: //FACOS.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0011100 4339: //FCOS.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0011101 4340: //FGETEXP.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0011110 4341: //FGETMAN.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0011111 4342: //FDIV.X <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0100000 4343: //FMOD.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0100001 4344: //FADD.X <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0100010 4345: //FMUL.X <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0100011 4346: //FSGLDIV.X <ea>,FPn |-|--CCS6|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0100100 4347: //FREM.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0100101 4348: //FSCALE.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0100110 4349: //FSGLMUL.X <ea>,FPn |-|--CCS6|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0100111 4350: //FSUB.X <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0101000 4351: //FCMP.X <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0111000 4352: //FSMOVE.X <ea>,FPn |-|----46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn1000000 4353: //FSSQRT.X <ea>,FPn |-|----46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn1000001 4354: //FDMOVE.X <ea>,FPn |-|----46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn1000100 4355: //FDSQRT.X <ea>,FPn |-|----46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn1000101 4356: //FSABS.X <ea>,FPn |-|----46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn1011000 4357: //FSNEG.X <ea>,FPn |-|----46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn1011010 4358: //FDABS.X <ea>,FPn |-|----46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn1011100 4359: //FDNEG.X <ea>,FPn |-|----46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn1011110 4360: //FSDIV.X <ea>,FPn |-|----46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn1100000 4361: //FSADD.X <ea>,FPn |-|----46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn1100010 4362: //FSMUL.X <ea>,FPn |-|----46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn1100011 4363: //FDDIV.X <ea>,FPn |-|----46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn1100100 4364: //FDADD.X <ea>,FPn |-|----46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn1100110 4365: //FDMUL.X <ea>,FPn |-|----46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn1100111 4366: //FSSUB.X <ea>,FPn |-|----46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn1101000 4367: //FDSUB.X <ea>,FPn |-|----46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn1101100 4368: //FSINCOS.X <ea>,FPc:FPs |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010sss0110ccc 4369: //FTST.P <ea> |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-0100110000111010 4370: //FMOVE.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0000000 4371: //FINT.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0000001 4372: //FSINH.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0000010 4373: //FINTRZ.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0000011 4374: //FSQRT.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0000100 4375: //FLOGNP1.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0000110 4376: //FETOXM1.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0001000 4377: //FTANH.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0001001 4378: //FATAN.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0001010 4379: //FASIN.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0001100 4380: //FATANH.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0001101 4381: //FSIN.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0001110 4382: //FTAN.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0001111 4383: //FETOX.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0010000 4384: //FTWOTOX.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0010001 4385: //FTENTOX.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0010010 4386: //FLOGN.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0010100 4387: //FLOG10.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0010101 4388: //FLOG2.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0010110 4389: //FABS.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0011000 4390: //FCOSH.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0011001 4391: //FNEG.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0011010 4392: //FACOS.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0011100 4393: //FCOS.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0011101 4394: //FGETEXP.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0011110 4395: //FGETMAN.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0011111 4396: //FDIV.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0100000 4397: //FMOD.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0100001 4398: //FADD.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0100010 4399: //FMUL.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0100011 4400: //FSGLDIV.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0100100 4401: //FREM.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0100101 4402: //FSCALE.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0100110 4403: //FSGLMUL.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0100111 4404: //FSUB.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0101000 4405: //FCMP.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0111000 4406: //FSMOVE.P <ea>,FPn |-|----SS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn1000000 4407: //FSSQRT.P <ea>,FPn |-|----SS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn1000001 4408: //FDMOVE.P <ea>,FPn |-|----SS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn1000100 4409: //FDSQRT.P <ea>,FPn |-|----SS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn1000101 4410: //FSABS.P <ea>,FPn |-|----SS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn1011000 4411: //FSNEG.P <ea>,FPn |-|----SS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn1011010 4412: //FDABS.P <ea>,FPn |-|----SS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn1011100 4413: //FDNEG.P <ea>,FPn |-|----SS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn1011110 4414: //FSDIV.P <ea>,FPn |-|----SS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn1100000 4415: //FSADD.P <ea>,FPn |-|----SS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn1100010 4416: //FSMUL.P <ea>,FPn |-|----SS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn1100011 4417: //FDDIV.P <ea>,FPn |-|----SS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn1100100 4418: //FDADD.P <ea>,FPn |-|----SS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn1100110 4419: //FDMUL.P <ea>,FPn |-|----SS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn1100111 4420: //FSSUB.P <ea>,FPn |-|----SS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn1101000 4421: //FDSUB.P <ea>,FPn |-|----SS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn1101100 4422: //FSINCOS.P <ea>,FPc:FPs |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011sss0110ccc 4423: //FTST.D <ea> |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-0101010000111010 4424: //FMOVE.D <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0000000 4425: //FINT.D <ea>,FPn |-|--CCS6|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0000001 4426: //FSINH.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0000010 4427: //FINTRZ.D <ea>,FPn |-|--CCS6|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0000011 4428: //FSQRT.D <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0000100 4429: //FLOGNP1.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0000110 4430: //FETOXM1.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0001000 4431: //FTANH.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0001001 4432: //FATAN.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0001010 4433: //FASIN.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0001100 4434: //FATANH.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0001101 4435: //FSIN.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0001110 4436: //FTAN.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0001111 4437: //FETOX.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0010000 4438: //FTWOTOX.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0010001 4439: //FTENTOX.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0010010 4440: //FLOGN.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0010100 4441: //FLOG10.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0010101 4442: //FLOG2.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0010110 4443: //FABS.D <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0011000 4444: //FCOSH.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0011001 4445: //FNEG.D <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0011010 4446: //FACOS.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0011100 4447: //FCOS.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0011101 4448: //FGETEXP.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0011110 4449: //FGETMAN.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0011111 4450: //FDIV.D <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0100000 4451: //FMOD.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0100001 4452: //FADD.D <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0100010 4453: //FMUL.D <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0100011 4454: //FSGLDIV.D <ea>,FPn |-|--CCS6|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0100100 4455: //FREM.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0100101 4456: //FSCALE.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0100110 4457: //FSGLMUL.D <ea>,FPn |-|--CCS6|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0100111 4458: //FSUB.D <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0101000 4459: //FCMP.D <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0111000 4460: //FSMOVE.D <ea>,FPn |-|----46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn1000000 4461: //FSSQRT.D <ea>,FPn |-|----46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn1000001 4462: //FDMOVE.D <ea>,FPn |-|----46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn1000100 4463: //FDSQRT.D <ea>,FPn |-|----46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn1000101 4464: //FSABS.D <ea>,FPn |-|----46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn1011000 4465: //FSNEG.D <ea>,FPn |-|----46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn1011010 4466: //FDABS.D <ea>,FPn |-|----46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn1011100 4467: //FDNEG.D <ea>,FPn |-|----46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn1011110 4468: //FSDIV.D <ea>,FPn |-|----46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn1100000 4469: //FSADD.D <ea>,FPn |-|----46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn1100010 4470: //FSMUL.D <ea>,FPn |-|----46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn1100011 4471: //FDDIV.D <ea>,FPn |-|----46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn1100100 4472: //FDADD.D <ea>,FPn |-|----46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn1100110 4473: //FDMUL.D <ea>,FPn |-|----46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn1100111 4474: //FSSUB.D <ea>,FPn |-|----46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn1101000 4475: //FDSUB.D <ea>,FPn |-|----46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn1101100 4476: //FSINCOS.D <ea>,FPc:FPs |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101sss0110ccc 4477: //FMOVEM.X #<data>,-(Ar) |-|--CC46|-|-----|-----| - |1111_001_000_100_rrr-11100000dddddddd 4478: //FMOVEM.X <list>,-(Ar) |-|--CC46|-|-----|-----| - |1111_001_000_100_rrr-11100000llllllll 4479: //FMOVEM.X Dl,-(Ar) |-|--CC4S|-|-----|-----| - |1111_001_000_100_rrr-111010000lll0000 4480: //FMOVEM.L #<data>,#<data>,FPSR/FPIAR |-|--CC4S|-|-----|-----| I|1111_001_000_111_100-1000110000000000-{data} 4481: //FMOVEM.L #<data>,#<data>,FPCR/FPIAR |-|--CC4S|-|-----|-----| I|1111_001_000_111_100-1001010000000000-{data} 4482: //FMOVEM.L #<data>,#<data>,FPCR/FPSR |-|--CC4S|-|-----|-----| I|1111_001_000_111_100-1001100000000000-{data} 4483: //FMOVEM.L #<data>,#<data>,#<data>,FPCR/FPSR/FPIAR|-|--CC4S|-|-----|-----| I|1111_001_000_111_100-1001110000000000-{data} 4484: case 0b1111_001_000: 4485: irpFgen (); 4486: break irpSwitch; 4487: 4488: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 4489: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 4490: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 4491: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 4492: //FSF.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000000000 4493: //FSEQ.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000000001 4494: //FSOGT.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000000010 4495: //FSOGE.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000000011 4496: //FSOLT.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000000100 4497: //FSOLE.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000000101 4498: //FSOGL.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000000110 4499: //FSOR.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000000111 4500: //FSUN.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000001000 4501: //FSUEQ.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000001001 4502: //FSUGT.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000001010 4503: //FSUGE.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000001011 4504: //FSULT.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000001100 4505: //FSULE.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000001101 4506: //FSNE.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000001110 4507: //FST.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000001111 4508: //FSSF.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000010000 4509: //FSSEQ.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000010001 4510: //FSGT.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000010010 4511: //FSGE.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000010011 4512: //FSLT.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000010100 4513: //FSLE.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000010101 4514: //FSGL.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000010110 4515: //FSGLE.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000010111 4516: //FSNGLE.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000011000 4517: //FSNGL.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000011001 4518: //FSNLE.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000011010 4519: //FSNLT.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000011011 4520: //FSNGE.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000011100 4521: //FSNGT.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000011101 4522: //FSSNE.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000011110 4523: //FSST.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000011111 4524: //FDBF Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000000000-{offset} 4525: //FDBRA Dr,<label> |A|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000000000-{offset} [FDBF Dr,<label>] 4526: //FDBEQ Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000000001-{offset} 4527: //FDBOGT Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000000010-{offset} 4528: //FDBOGE Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000000011-{offset} 4529: //FDBOLT Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000000100-{offset} 4530: //FDBOLE Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000000101-{offset} 4531: //FDBOGL Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000000110-{offset} 4532: //FDBOR Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000000111-{offset} 4533: //FDBUN Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000001000-{offset} 4534: //FDBUEQ Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000001001-{offset} 4535: //FDBUGT Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000001010-{offset} 4536: //FDBUGE Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000001011-{offset} 4537: //FDBULT Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000001100-{offset} 4538: //FDBULE Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000001101-{offset} 4539: //FDBNE Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000001110-{offset} 4540: //FDBT Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000001111-{offset} 4541: //FDBSF Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000010000-{offset} 4542: //FDBSEQ Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000010001-{offset} 4543: //FDBGT Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000010010-{offset} 4544: //FDBGE Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000010011-{offset} 4545: //FDBLT Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000010100-{offset} 4546: //FDBLE Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000010101-{offset} 4547: //FDBGL Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000010110-{offset} 4548: //FDBGLE Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000010111-{offset} 4549: //FDBNGLE Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000011000-{offset} 4550: //FDBNGL Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000011001-{offset} 4551: //FDBNLE Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000011010-{offset} 4552: //FDBNLT Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000011011-{offset} 4553: //FDBNGE Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000011100-{offset} 4554: //FDBNGT Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000011101-{offset} 4555: //FDBSNE Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000011110-{offset} 4556: //FDBST Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000011111-{offset} 4557: //FTRAPF.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000000000-{data} 4558: //FTRAPEQ.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000000001-{data} 4559: //FTRAPOGT.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000000010-{data} 4560: //FTRAPOGE.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000000011-{data} 4561: //FTRAPOLT.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000000100-{data} 4562: //FTRAPOLE.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000000101-{data} 4563: //FTRAPOGL.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000000110-{data} 4564: //FTRAPOR.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000000111-{data} 4565: //FTRAPUN.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000001000-{data} 4566: //FTRAPUEQ.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000001001-{data} 4567: //FTRAPUGT.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000001010-{data} 4568: //FTRAPUGE.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000001011-{data} 4569: //FTRAPULT.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000001100-{data} 4570: //FTRAPULE.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000001101-{data} 4571: //FTRAPNE.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000001110-{data} 4572: //FTRAPT.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000001111-{data} 4573: //FTRAPSF.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000010000-{data} 4574: //FTRAPSEQ.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000010001-{data} 4575: //FTRAPGT.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000010010-{data} 4576: //FTRAPGE.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000010011-{data} 4577: //FTRAPLT.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000010100-{data} 4578: //FTRAPLE.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000010101-{data} 4579: //FTRAPGL.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000010110-{data} 4580: //FTRAPGLE.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000010111-{data} 4581: //FTRAPNGLE.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000011000-{data} 4582: //FTRAPNGL.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000011001-{data} 4583: //FTRAPNLE.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000011010-{data} 4584: //FTRAPNLT.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000011011-{data} 4585: //FTRAPNGE.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000011100-{data} 4586: //FTRAPNGT.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000011101-{data} 4587: //FTRAPSNE.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000011110-{data} 4588: //FTRAPST.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000011111-{data} 4589: //FTRAPF.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000000000-{data} 4590: //FTRAPEQ.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000000001-{data} 4591: //FTRAPOGT.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000000010-{data} 4592: //FTRAPOGE.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000000011-{data} 4593: //FTRAPOLT.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000000100-{data} 4594: //FTRAPOLE.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000000101-{data} 4595: //FTRAPOGL.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000000110-{data} 4596: //FTRAPOR.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000000111-{data} 4597: //FTRAPUN.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000001000-{data} 4598: //FTRAPUEQ.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000001001-{data} 4599: //FTRAPUGT.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000001010-{data} 4600: //FTRAPUGE.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000001011-{data} 4601: //FTRAPULT.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000001100-{data} 4602: //FTRAPULE.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000001101-{data} 4603: //FTRAPNE.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000001110-{data} 4604: //FTRAPT.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000001111-{data} 4605: //FTRAPSF.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000010000-{data} 4606: //FTRAPSEQ.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000010001-{data} 4607: //FTRAPGT.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000010010-{data} 4608: //FTRAPGE.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000010011-{data} 4609: //FTRAPLT.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000010100-{data} 4610: //FTRAPLE.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000010101-{data} 4611: //FTRAPGL.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000010110-{data} 4612: //FTRAPGLE.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000010111-{data} 4613: //FTRAPNGLE.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000011000-{data} 4614: //FTRAPNGL.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000011001-{data} 4615: //FTRAPNLE.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000011010-{data} 4616: //FTRAPNLT.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000011011-{data} 4617: //FTRAPNGE.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000011100-{data} 4618: //FTRAPNGT.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000011101-{data} 4619: //FTRAPSNE.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000011110-{data} 4620: //FTRAPST.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000011111-{data} 4621: //FTRAPF |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000000000 4622: //FTRAPEQ |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000000001 4623: //FTRAPOGT |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000000010 4624: //FTRAPOGE |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000000011 4625: //FTRAPOLT |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000000100 4626: //FTRAPOLE |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000000101 4627: //FTRAPOGL |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000000110 4628: //FTRAPOR |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000000111 4629: //FTRAPUN |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000001000 4630: //FTRAPUEQ |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000001001 4631: //FTRAPUGT |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000001010 4632: //FTRAPUGE |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000001011 4633: //FTRAPULT |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000001100 4634: //FTRAPULE |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000001101 4635: //FTRAPNE |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000001110 4636: //FTRAPT |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000001111 4637: //FTRAPSF |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000010000 4638: //FTRAPSEQ |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000010001 4639: //FTRAPGT |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000010010 4640: //FTRAPGE |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000010011 4641: //FTRAPLT |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000010100 4642: //FTRAPLE |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000010101 4643: //FTRAPGL |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000010110 4644: //FTRAPGLE |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000010111 4645: //FTRAPNGLE |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000011000 4646: //FTRAPNGL |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000011001 4647: //FTRAPNLE |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000011010 4648: //FTRAPNLT |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000011011 4649: //FTRAPNGE |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000011100 4650: //FTRAPNGT |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000011101 4651: //FTRAPSNE |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000011110 4652: //FTRAPST |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000011111 4653: case 0b1111_001_001: 4654: irpFscc (); 4655: break irpSwitch; 4656: 4657: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 4658: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 4659: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 4660: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 4661: //FNOP |A|--CC46|-|-----|-----| |1111_001_010_000_000-0000000000000000 [FBF.W (*)+2] 4662: //FBF.W <label> |-|--CC46|-|-----|-----| |1111_001_010_000_000-{offset} 4663: //FBEQ.W <label> |-|--CC46|-|-----|-----| |1111_001_010_000_001-{offset} 4664: //FBOGT.W <label> |-|--CC46|-|-----|-----| |1111_001_010_000_010-{offset} 4665: //FBOGE.W <label> |-|--CC46|-|-----|-----| |1111_001_010_000_011-{offset} 4666: //FBOLT.W <label> |-|--CC46|-|-----|-----| |1111_001_010_000_100-{offset} 4667: //FBOLE.W <label> |-|--CC46|-|-----|-----| |1111_001_010_000_101-{offset} 4668: //FBOGL.W <label> |-|--CC46|-|-----|-----| |1111_001_010_000_110-{offset} 4669: //FBOR.W <label> |-|--CC46|-|-----|-----| |1111_001_010_000_111-{offset} 4670: //FBUN.W <label> |-|--CC46|-|-----|-----| |1111_001_010_001_000-{offset} 4671: //FBUEQ.W <label> |-|--CC46|-|-----|-----| |1111_001_010_001_001-{offset} 4672: //FBUGT.W <label> |-|--CC46|-|-----|-----| |1111_001_010_001_010-{offset} 4673: //FBUGE.W <label> |-|--CC46|-|-----|-----| |1111_001_010_001_011-{offset} 4674: //FBULT.W <label> |-|--CC46|-|-----|-----| |1111_001_010_001_100-{offset} 4675: //FBULE.W <label> |-|--CC46|-|-----|-----| |1111_001_010_001_101-{offset} 4676: //FBNE.W <label> |-|--CC46|-|-----|-----| |1111_001_010_001_110-{offset} 4677: //FBT.W <label> |-|--CC46|-|-----|-----| |1111_001_010_001_111-{offset} 4678: //FBRA.W <label> |A|--CC46|-|-----|-----| |1111_001_010_001_111-{offset} [FBT.W <label>] 4679: //FBSF.W <label> |-|--CC46|-|-----|-----| |1111_001_010_010_000-{offset} 4680: //FBSEQ.W <label> |-|--CC46|-|-----|-----| |1111_001_010_010_001-{offset} 4681: //FBGT.W <label> |-|--CC46|-|-----|-----| |1111_001_010_010_010-{offset} 4682: //FBGE.W <label> |-|--CC46|-|-----|-----| |1111_001_010_010_011-{offset} 4683: //FBLT.W <label> |-|--CC46|-|-----|-----| |1111_001_010_010_100-{offset} 4684: //FBLE.W <label> |-|--CC46|-|-----|-----| |1111_001_010_010_101-{offset} 4685: //FBGL.W <label> |-|--CC46|-|-----|-----| |1111_001_010_010_110-{offset} 4686: //FBGLE.W <label> |-|--CC46|-|-----|-----| |1111_001_010_010_111-{offset} 4687: //FBNGLE.W <label> |-|--CC46|-|-----|-----| |1111_001_010_011_000-{offset} 4688: //FBNGL.W <label> |-|--CC46|-|-----|-----| |1111_001_010_011_001-{offset} 4689: //FBNLE.W <label> |-|--CC46|-|-----|-----| |1111_001_010_011_010-{offset} 4690: //FBNLT.W <label> |-|--CC46|-|-----|-----| |1111_001_010_011_011-{offset} 4691: //FBNGE.W <label> |-|--CC46|-|-----|-----| |1111_001_010_011_100-{offset} 4692: //FBNGT.W <label> |-|--CC46|-|-----|-----| |1111_001_010_011_101-{offset} 4693: //FBSNE.W <label> |-|--CC46|-|-----|-----| |1111_001_010_011_110-{offset} 4694: //FBST.W <label> |-|--CC46|-|-----|-----| |1111_001_010_011_111-{offset} 4695: case 0b1111_001_010: 4696: irpFbccWord (); 4697: break irpSwitch; 4698: 4699: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 4700: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 4701: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 4702: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 4703: //FBF.L <label> |-|--CC46|-|-----|-----| |1111_001_011_000_000-{offset} 4704: //FBEQ.L <label> |-|--CC46|-|-----|-----| |1111_001_011_000_001-{offset} 4705: //FBOGT.L <label> |-|--CC46|-|-----|-----| |1111_001_011_000_010-{offset} 4706: //FBOGE.L <label> |-|--CC46|-|-----|-----| |1111_001_011_000_011-{offset} 4707: //FBOLT.L <label> |-|--CC46|-|-----|-----| |1111_001_011_000_100-{offset} 4708: //FBOLE.L <label> |-|--CC46|-|-----|-----| |1111_001_011_000_101-{offset} 4709: //FBOGL.L <label> |-|--CC46|-|-----|-----| |1111_001_011_000_110-{offset} 4710: //FBOR.L <label> |-|--CC46|-|-----|-----| |1111_001_011_000_111-{offset} 4711: //FBUN.L <label> |-|--CC46|-|-----|-----| |1111_001_011_001_000-{offset} 4712: //FBUEQ.L <label> |-|--CC46|-|-----|-----| |1111_001_011_001_001-{offset} 4713: //FBUGT.L <label> |-|--CC46|-|-----|-----| |1111_001_011_001_010-{offset} 4714: //FBUGE.L <label> |-|--CC46|-|-----|-----| |1111_001_011_001_011-{offset} 4715: //FBULT.L <label> |-|--CC46|-|-----|-----| |1111_001_011_001_100-{offset} 4716: //FBULE.L <label> |-|--CC46|-|-----|-----| |1111_001_011_001_101-{offset} 4717: //FBNE.L <label> |-|--CC46|-|-----|-----| |1111_001_011_001_110-{offset} 4718: //FBT.L <label> |-|--CC46|-|-----|-----| |1111_001_011_001_111-{offset} 4719: //FBRA.L <label> |A|--CC46|-|-----|-----| |1111_001_011_001_111-{offset} [FBT.L <label>] 4720: //FBSF.L <label> |-|--CC46|-|-----|-----| |1111_001_011_010_000-{offset} 4721: //FBSEQ.L <label> |-|--CC46|-|-----|-----| |1111_001_011_010_001-{offset} 4722: //FBGT.L <label> |-|--CC46|-|-----|-----| |1111_001_011_010_010-{offset} 4723: //FBGE.L <label> |-|--CC46|-|-----|-----| |1111_001_011_010_011-{offset} 4724: //FBLT.L <label> |-|--CC46|-|-----|-----| |1111_001_011_010_100-{offset} 4725: //FBLE.L <label> |-|--CC46|-|-----|-----| |1111_001_011_010_101-{offset} 4726: //FBGL.L <label> |-|--CC46|-|-----|-----| |1111_001_011_010_110-{offset} 4727: //FBGLE.L <label> |-|--CC46|-|-----|-----| |1111_001_011_010_111-{offset} 4728: //FBNGLE.L <label> |-|--CC46|-|-----|-----| |1111_001_011_011_000-{offset} 4729: //FBNGL.L <label> |-|--CC46|-|-----|-----| |1111_001_011_011_001-{offset} 4730: //FBNLE.L <label> |-|--CC46|-|-----|-----| |1111_001_011_011_010-{offset} 4731: //FBNLT.L <label> |-|--CC46|-|-----|-----| |1111_001_011_011_011-{offset} 4732: //FBNGE.L <label> |-|--CC46|-|-----|-----| |1111_001_011_011_100-{offset} 4733: //FBNGT.L <label> |-|--CC46|-|-----|-----| |1111_001_011_011_101-{offset} 4734: //FBSNE.L <label> |-|--CC46|-|-----|-----| |1111_001_011_011_110-{offset} 4735: //FBST.L <label> |-|--CC46|-|-----|-----| |1111_001_011_011_111-{offset} 4736: case 0b1111_001_011: 4737: irpFbccLong (); 4738: break irpSwitch; 4739: 4740: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 4741: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 4742: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 4743: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 4744: //FSAVE <ea> |-|--CC46|P|-----|-----| M -WXZ |1111_001_100_mmm_rrr 4745: case 0b1111_001_100: 4746: irpFsave (); 4747: break irpSwitch; 4748: 4749: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 4750: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 4751: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 4752: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 4753: //FRESTORE <ea> |-|--CC46|P|-----|-----| M+ WXZP |1111_001_101_mmm_rrr 4754: case 0b1111_001_101: 4755: irpFrestore (); 4756: break irpSwitch; 4757: 4758: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 4759: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 4760: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 4761: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 4762: //CINVL NC,(Ar) |-|----46|P|-----|-----| |1111_010_000_001_rrr 4763: //CINVP NC,(Ar) |-|----46|P|-----|-----| |1111_010_000_010_rrr 4764: //CINVA NC |-|----46|P|-----|-----| |1111_010_000_011_000 4765: //CPUSHL NC,(Ar) |-|----46|P|-----|-----| |1111_010_000_101_rrr 4766: //CPUSHP NC,(Ar) |-|----46|P|-----|-----| |1111_010_000_110_rrr 4767: //CPUSHA NC |-|----46|P|-----|-----| |1111_010_000_111_000 4768: case 0b1111_010_000: 4769: irpCinvCpushNC (); 4770: break irpSwitch; 4771: 4772: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 4773: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 4774: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 4775: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 4776: //CINVL DC,(Ar) |-|----46|P|-----|-----| |1111_010_001_001_rrr 4777: //CINVP DC,(Ar) |-|----46|P|-----|-----| |1111_010_001_010_rrr 4778: //CINVA DC |-|----46|P|-----|-----| |1111_010_001_011_000 4779: //CPUSHL DC,(Ar) |-|----46|P|-----|-----| |1111_010_001_101_rrr 4780: //CPUSHP DC,(Ar) |-|----46|P|-----|-----| |1111_010_001_110_rrr 4781: //CPUSHA DC |-|----46|P|-----|-----| |1111_010_001_111_000 4782: case 0b1111_010_001: 4783: irpCinvCpushDC (); 4784: break irpSwitch; 4785: 4786: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 4787: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 4788: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 4789: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 4790: //CINVL IC,(Ar) |-|----46|P|-----|-----| |1111_010_010_001_rrr 4791: //CINVP IC,(Ar) |-|----46|P|-----|-----| |1111_010_010_010_rrr 4792: //CINVA IC |-|----46|P|-----|-----| |1111_010_010_011_000 4793: //CPUSHL IC,(Ar) |-|----46|P|-----|-----| |1111_010_010_101_rrr 4794: //CPUSHP IC,(Ar) |-|----46|P|-----|-----| |1111_010_010_110_rrr 4795: //CPUSHA IC |-|----46|P|-----|-----| |1111_010_010_111_000 4796: case 0b1111_010_010: 4797: irpCinvCpushIC (); 4798: break irpSwitch; 4799: 4800: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 4801: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 4802: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 4803: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 4804: //CINVL BC,(Ar) |-|----46|P|-----|-----| |1111_010_011_001_rrr 4805: //CINVP BC,(Ar) |-|----46|P|-----|-----| |1111_010_011_010_rrr 4806: //CINVA BC |-|----46|P|-----|-----| |1111_010_011_011_000 4807: //CPUSHL BC,(Ar) |-|----46|P|-----|-----| |1111_010_011_101_rrr 4808: //CPUSHP BC,(Ar) |-|----46|P|-----|-----| |1111_010_011_110_rrr 4809: //CPUSHA BC |-|----46|P|-----|-----| |1111_010_011_111_000 4810: case 0b1111_010_011: 4811: irpCinvCpushBC (); 4812: break irpSwitch; 4813: 4814: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 4815: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 4816: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 4817: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 4818: //PFLUSHN (Ar) |-|----46|P|-----|-----| |1111_010_100_000_rrr 4819: //PFLUSH (Ar) |-|----46|P|-----|-----| |1111_010_100_001_rrr 4820: //PFLUSHAN |-|----46|P|-----|-----| |1111_010_100_010_000 4821: //PFLUSHA |-|----46|P|-----|-----| |1111_010_100_011_000 4822: case 0b1111_010_100: 4823: irpPflush (); 4824: break irpSwitch; 4825: 4826: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 4827: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 4828: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 4829: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 4830: //PLPAW (Ar) |-|-----6|P|-----|-----| |1111_010_110_001_rrr 4831: case 0b1111_010_110: 4832: irpPlpaw (); 4833: break irpSwitch; 4834: 4835: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 4836: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 4837: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 4838: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 4839: //PLPAR (Ar) |-|-----6|P|-----|-----| |1111_010_111_001_rrr 4840: case 0b1111_010_111: 4841: irpPlpar (); 4842: break irpSwitch; 4843: 4844: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 4845: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 4846: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 4847: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 4848: //MOVE16 (Ar)+,xxx.L |-|----46|-|-----|-----| |1111_011_000_000_rrr-{address} 4849: //MOVE16 xxx.L,(Ar)+ |-|----46|-|-----|-----| |1111_011_000_001_rrr-{address} 4850: //MOVE16 (Ar),xxx.L |-|----46|-|-----|-----| |1111_011_000_010_rrr-{address} 4851: //MOVE16 xxx.L,(Ar) |-|----46|-|-----|-----| |1111_011_000_011_rrr-{address} 4852: //MOVE16 (Ar)+,(An)+ |-|----46|-|-----|-----| |1111_011_000_100_rrr-1nnn000000000000 4853: case 0b1111_011_000: 4854: irpMove16 (); 4855: break irpSwitch; 4856: 4857: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 4858: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 4859: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 4860: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 4861: //LPSTOP.W #<data> |-|-----6|P|-----|-----| |1111_100_000_000_000-0000000111000000-{data} 4862: case 0b1111_100_000: 4863: irpLpstop (); 4864: break irpSwitch; 4865: 4866: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 4867: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 4868: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 4869: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 4870: //FPACK <data> |A|012346|-|UUUUU|*****| |1111_111_0dd_ddd_ddd [FLINE #<data>] 4871: case 0b1111_111_000: 4872: case 0b1111_111_001: 4873: case 0b1111_111_010: 4874: case 0b1111_111_011: 4875: irpFpack (); 4876: break irpSwitch; 4877: 4878: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 4879: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 4880: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 4881: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 4882: //DOS <data> |A|012346|-|UUUUU|UUUUU| |1111_111_1dd_ddd_ddd [FLINE #<data>] 4883: case 0b1111_111_100: 4884: case 0b1111_111_101: 4885: case 0b1111_111_110: 4886: case 0b1111_111_111: 4887: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 4888: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 4889: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 4890: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 4891: //FLINE #<data> |-|012346|-|UUUUU|UUUUU| |1111_ddd_ddd_ddd_ddd (line 1111 emulator) 4892: case 0b1111_000_000: 4893: case 0b1111_000_001: 4894: case 0b1111_000_010: 4895: case 0b1111_000_011: 4896: case 0b1111_000_100: 4897: case 0b1111_000_101: 4898: case 0b1111_000_110: 4899: case 0b1111_000_111: 4900: case 0b1111_001_110: 4901: case 0b1111_001_111: 4902: case 0b1111_010_101: 4903: case 0b1111_011_001: 4904: case 0b1111_011_010: 4905: case 0b1111_011_011: 4906: case 0b1111_011_100: 4907: case 0b1111_011_101: 4908: case 0b1111_011_110: 4909: case 0b1111_011_111: 4910: case 0b1111_100_001: 4911: case 0b1111_100_010: 4912: case 0b1111_100_011: 4913: case 0b1111_100_100: 4914: case 0b1111_100_101: 4915: case 0b1111_100_110: 4916: case 0b1111_100_111: 4917: case 0b1111_101_000: 4918: case 0b1111_101_001: 4919: case 0b1111_101_010: 4920: case 0b1111_101_011: 4921: case 0b1111_101_100: 4922: case 0b1111_101_101: 4923: case 0b1111_101_110: 4924: case 0b1111_101_111: 4925: case 0b1111_110_000: 4926: case 0b1111_110_001: 4927: case 0b1111_110_010: 4928: case 0b1111_110_011: 4929: case 0b1111_110_100: 4930: case 0b1111_110_101: 4931: case 0b1111_110_110: 4932: case 0b1111_110_111: 4933: irpFline (); 4934: break irpSwitch; 4935: 4936: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 4937: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 4938: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 4939: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 4940: //HFSBOOT |-|012346|-|-----|-----| |0100_111_000_000_000 4941: //HFSINST |-|012346|-|-----|-----| |0100_111_000_000_001 4942: //HFSSTR |-|012346|-|-----|-----| |0100_111_000_000_010 4943: //HFSINT |-|012346|-|-----|-----| |0100_111_000_000_011 4944: //EMXNOP |-|012346|-|-----|-----| |0100_111_000_000_100 4945: case 0b0100_111_000: 4946: irpEmx (); 4947: break; 4948: 4949: default: 4950: irpIllegal (); 4951: 4952: } //switch XEiJ.regOC >>> 6 4953: 4954: //トレース例外 4955: // 命令実行前にsrのTビットがセットされていたとき命令実行後にトレース例外が発生する 4956: // トレース例外の発動は命令の機能拡張であり、他の例外処理で命令が中断されたときはトレース例外は発生しない 4957: // 命令例外はトレース例外の前に、割り込み例外はトレース例外の後に処理される 4958: // 未実装命令のエミュレーションルーチンはrteの直前にsrのTビットを復元することで未実装命令が1個の命令としてトレースされたように見せる 4959: // ;DOSコールの終了 4960: // ~008616: 4961: // btst.b #$07,(sp) 4962: // bne.s ~00861E 4963: // rte 4964: // ~00861E: 4965: // ori.w #$8000,sr 4966: // rte 4967: if (XEiJ.mpuTraceFlag != 0) { //命令実行前にsrのTビットがセットされていた 4968: irpExceptionFormat2 (M68kException.M6E_TRACE << 2, XEiJ.regPC, XEiJ.regPC0); //pcは次の命令 4969: } 4970: //クロックをカウントアップする 4971: // オペランドをアクセスした時点ではまだXEiJ.mpuClockTimeが更新されていないのでXEiJ.mpuClockTime<xxxClock 4972: // xxxTickを呼び出すときはXEiJ.mpuClockTime>=xxxClock 4973: XEiJ.mpuClockTime += XEiJ.mpuModifiedUnit * XEiJ.mpuCycleCount; 4974: //デバイスを呼び出す 4975: TickerQueue.tkqRun (XEiJ.mpuClockTime); 4976: //割り込みを受け付ける 4977: if ((t = XEiJ.mpuIMR & XEiJ.mpuIRR) != 0) { //マスクされているレベルよりも高くて受け付けていない割り込みがあるとき 4978: if (XEiJ.MPU_INTERRUPT_SWITCH) { 4979: switch (t) { 4980: case 0b00000001: 4981: case 0b00000011: 4982: case 0b00000101: 4983: case 0b00000111: 4984: case 0b00001001: 4985: case 0b00001011: 4986: case 0b00001101: 4987: case 0b00001111: 4988: case 0b00010001: 4989: case 0b00010011: 4990: case 0b00010101: 4991: case 0b00010111: 4992: case 0b00011001: 4993: case 0b00011011: 4994: case 0b00011101: 4995: case 0b00011111: 4996: case 0b00100001: 4997: case 0b00100011: 4998: case 0b00100101: 4999: case 0b00100111: 5000: case 0b00101001: 5001: case 0b00101011: 5002: case 0b00101101: 5003: case 0b00101111: 5004: case 0b00110001: 5005: case 0b00110011: 5006: case 0b00110101: 5007: case 0b00110111: 5008: case 0b00111001: 5009: case 0b00111011: 5010: case 0b00111101: 5011: case 0b00111111: 5012: case 0b01000001: 5013: case 0b01000011: 5014: case 0b01000101: 5015: case 0b01000111: 5016: case 0b01001001: 5017: case 0b01001011: 5018: case 0b01001101: 5019: case 0b01001111: 5020: case 0b01010001: 5021: case 0b01010011: 5022: case 0b01010101: 5023: case 0b01010111: 5024: case 0b01011001: 5025: case 0b01011011: 5026: case 0b01011101: 5027: case 0b01011111: 5028: case 0b01100001: 5029: case 0b01100011: 5030: case 0b01100101: 5031: case 0b01100111: 5032: case 0b01101001: 5033: case 0b01101011: 5034: case 0b01101101: 5035: case 0b01101111: 5036: case 0b01110001: 5037: case 0b01110011: 5038: case 0b01110101: 5039: case 0b01110111: 5040: case 0b01111001: 5041: case 0b01111011: 5042: case 0b01111101: 5043: case 0b01111111: 5044: case 0b10000001: 5045: case 0b10000011: 5046: case 0b10000101: 5047: case 0b10000111: 5048: case 0b10001001: 5049: case 0b10001011: 5050: case 0b10001101: 5051: case 0b10001111: 5052: case 0b10010001: 5053: case 0b10010011: 5054: case 0b10010101: 5055: case 0b10010111: 5056: case 0b10011001: 5057: case 0b10011011: 5058: case 0b10011101: 5059: case 0b10011111: 5060: case 0b10100001: 5061: case 0b10100011: 5062: case 0b10100101: 5063: case 0b10100111: 5064: case 0b10101001: 5065: case 0b10101011: 5066: case 0b10101101: 5067: case 0b10101111: 5068: case 0b10110001: 5069: case 0b10110011: 5070: case 0b10110101: 5071: case 0b10110111: 5072: case 0b10111001: 5073: case 0b10111011: 5074: case 0b10111101: 5075: case 0b10111111: 5076: case 0b11000001: 5077: case 0b11000011: 5078: case 0b11000101: 5079: case 0b11000111: 5080: case 0b11001001: 5081: case 0b11001011: 5082: case 0b11001101: 5083: case 0b11001111: 5084: case 0b11010001: 5085: case 0b11010011: 5086: case 0b11010101: 5087: case 0b11010111: 5088: case 0b11011001: 5089: case 0b11011011: 5090: case 0b11011101: 5091: case 0b11011111: 5092: case 0b11100001: 5093: case 0b11100011: 5094: case 0b11100101: 5095: case 0b11100111: 5096: case 0b11101001: 5097: case 0b11101011: 5098: case 0b11101101: 5099: case 0b11101111: 5100: case 0b11110001: 5101: case 0b11110011: 5102: case 0b11110101: 5103: case 0b11110111: 5104: case 0b11111001: 5105: case 0b11111011: 5106: case 0b11111101: 5107: case 0b11111111: 5108: //レベル7 5109: XEiJ.mpuIRR &= ~XEiJ.MPU_SYS_INTERRUPT_MASK; //割り込みを受け付ける 5110: if ((t = XEiJ.sysAcknowledge ()) != 0) { //デバイスにベクタ番号を要求して割り込み処理中の状態になったとき 5111: irpInterrupt (t << 2, XEiJ.MPU_SYS_INTERRUPT_LEVEL); //割り込み処理を開始する 5112: } 5113: break; 5114: case 0b00000010: 5115: case 0b00000110: 5116: case 0b00001010: 5117: case 0b00001110: 5118: case 0b00010010: 5119: case 0b00010110: 5120: case 0b00011010: 5121: case 0b00011110: 5122: case 0b00100010: 5123: case 0b00100110: 5124: case 0b00101010: 5125: case 0b00101110: 5126: case 0b00110010: 5127: case 0b00110110: 5128: case 0b00111010: 5129: case 0b00111110: 5130: case 0b01000010: 5131: case 0b01000110: 5132: case 0b01001010: 5133: case 0b01001110: 5134: case 0b01010010: 5135: case 0b01010110: 5136: case 0b01011010: 5137: case 0b01011110: 5138: case 0b01100010: 5139: case 0b01100110: 5140: case 0b01101010: 5141: case 0b01101110: 5142: case 0b01110010: 5143: case 0b01110110: 5144: case 0b01111010: 5145: case 0b01111110: 5146: case 0b10000010: 5147: case 0b10000110: 5148: case 0b10001010: 5149: case 0b10001110: 5150: case 0b10010010: 5151: case 0b10010110: 5152: case 0b10011010: 5153: case 0b10011110: 5154: case 0b10100010: 5155: case 0b10100110: 5156: case 0b10101010: 5157: case 0b10101110: 5158: case 0b10110010: 5159: case 0b10110110: 5160: case 0b10111010: 5161: case 0b10111110: 5162: case 0b11000010: 5163: case 0b11000110: 5164: case 0b11001010: 5165: case 0b11001110: 5166: case 0b11010010: 5167: case 0b11010110: 5168: case 0b11011010: 5169: case 0b11011110: 5170: case 0b11100010: 5171: case 0b11100110: 5172: case 0b11101010: 5173: case 0b11101110: 5174: case 0b11110010: 5175: case 0b11110110: 5176: case 0b11111010: 5177: case 0b11111110: 5178: //レベル6 5179: XEiJ.mpuIRR &= ~XEiJ.MPU_MFP_INTERRUPT_MASK; //割り込みを受け付ける 5180: if ((t = MC68901.mfpAcknowledge ()) != 0) { //デバイスにベクタ番号を要求して割り込み処理中の状態になったとき 5181: irpInterrupt (t << 2, XEiJ.MPU_MFP_INTERRUPT_LEVEL); //割り込み処理を開始する 5182: } 5183: break; 5184: case 0b00000100: 5185: case 0b00001100: 5186: case 0b00010100: 5187: case 0b00011100: 5188: case 0b00100100: 5189: case 0b00101100: 5190: case 0b00110100: 5191: case 0b00111100: 5192: case 0b01000100: 5193: case 0b01001100: 5194: case 0b01010100: 5195: case 0b01011100: 5196: case 0b01100100: 5197: case 0b01101100: 5198: case 0b01110100: 5199: case 0b01111100: 5200: case 0b10000100: 5201: case 0b10001100: 5202: case 0b10010100: 5203: case 0b10011100: 5204: case 0b10100100: 5205: case 0b10101100: 5206: case 0b10110100: 5207: case 0b10111100: 5208: case 0b11000100: 5209: case 0b11001100: 5210: case 0b11010100: 5211: case 0b11011100: 5212: case 0b11100100: 5213: case 0b11101100: 5214: case 0b11110100: 5215: case 0b11111100: 5216: //レベル5 5217: XEiJ.mpuIRR &= ~XEiJ.MPU_SCC_INTERRUPT_MASK; //割り込みを受け付ける 5218: if ((t = Z8530.sccAcknowledge ()) != 0) { //デバイスにベクタ番号を要求して割り込み処理中の状態になったとき 5219: irpInterrupt (t << 2, XEiJ.MPU_SCC_INTERRUPT_LEVEL); //割り込み処理を開始する 5220: } 5221: break; 5222: case 0b00010000: 5223: case 0b00110000: 5224: case 0b01010000: 5225: case 0b01110000: 5226: case 0b10010000: 5227: case 0b10110000: 5228: case 0b11010000: 5229: case 0b11110000: 5230: //レベル3 5231: XEiJ.mpuIRR &= ~XEiJ.MPU_DMA_INTERRUPT_MASK; //割り込みを受け付ける 5232: if ((t = HD63450.dmaAcknowledge ()) != 0) { //デバイスにベクタ番号を要求して割り込み処理中の状態になったとき 5233: irpInterrupt (t << 2, XEiJ.MPU_DMA_INTERRUPT_LEVEL); //割り込み処理を開始する 5234: } 5235: break; 5236: case 0b00100000: 5237: case 0b01100000: 5238: case 0b10100000: 5239: case 0b11100000: 5240: //レベル2 5241: XEiJ.mpuIRR &= ~XEiJ.MPU_EB2_INTERRUPT_MASK; //割り込みを受け付ける 5242: if ((t = XEiJ.eb2Acknowledge ()) != 0) { //デバイスにベクタ番号を要求して割り込み処理中の状態になったとき 5243: irpInterrupt (t << 2, XEiJ.MPU_EB2_INTERRUPT_LEVEL); //割り込み処理を開始する 5244: } 5245: break; 5246: case 0b01000000: 5247: case 0b11000000: 5248: //レベル1 5249: XEiJ.mpuIRR &= ~XEiJ.MPU_IOI_INTERRUPT_MASK; //割り込みを受け付ける 5250: if ((t = IOInterrupt.ioiAcknowledge ()) != 0) { //デバイスにベクタ番号を要求して割り込み処理中の状態になったとき 5251: irpInterrupt (t << 2, XEiJ.MPU_IOI_INTERRUPT_LEVEL); //割り込み処理を開始する 5252: } 5253: break; 5254: } 5255: } else { 5256: t &= -t; 5257: // x&=-xはxの最下位の1のビットだけを残す演算 5258: // すなわちマスクされているレベルよりも高くて受け付けていない割り込みの中で最高レベルの割り込みのビットだけが残る 5259: // 最高レベルの割り込みのビットしか残っていないので、割り込みの有無をレベルの高い順ではなく使用頻度の高い順に調べられる 5260: // MFPやDMAの割り込みがかかる度にそれより優先度の高いインタラプトスイッチが押されていないかどうかを確かめる必要がない 5261: if (t == XEiJ.MPU_MFP_INTERRUPT_MASK) { 5262: XEiJ.mpuIRR &= ~XEiJ.MPU_MFP_INTERRUPT_MASK; //割り込みを受け付ける 5263: if ((t = MC68901.mfpAcknowledge ()) != 0) { //デバイスにベクタ番号を要求して割り込み処理中の状態になったとき 5264: irpInterrupt (t << 2, XEiJ.MPU_MFP_INTERRUPT_LEVEL); //割り込み処理を開始する 5265: } 5266: } else if (t == XEiJ.MPU_DMA_INTERRUPT_MASK) { 5267: XEiJ.mpuIRR &= ~XEiJ.MPU_DMA_INTERRUPT_MASK; //割り込みを受け付ける 5268: if ((t = HD63450.dmaAcknowledge ()) != 0) { //デバイスにベクタ番号を要求して割り込み処理中の状態になったとき 5269: irpInterrupt (t << 2, XEiJ.MPU_DMA_INTERRUPT_LEVEL); //割り込み処理を開始する 5270: } 5271: } else if (t == XEiJ.MPU_SCC_INTERRUPT_MASK) { 5272: XEiJ.mpuIRR &= ~XEiJ.MPU_SCC_INTERRUPT_MASK; //割り込みを受け付ける 5273: if ((t = Z8530.sccAcknowledge ()) != 0) { //デバイスにベクタ番号を要求して割り込み処理中の状態になったとき 5274: irpInterrupt (t << 2, XEiJ.MPU_SCC_INTERRUPT_LEVEL); //割り込み処理を開始する 5275: } 5276: } else if (t == XEiJ.MPU_IOI_INTERRUPT_MASK) { 5277: XEiJ.mpuIRR &= ~XEiJ.MPU_IOI_INTERRUPT_MASK; //割り込みを受け付ける 5278: if ((t = IOInterrupt.ioiAcknowledge ()) != 0) { //デバイスにベクタ番号を要求して割り込み処理中の状態になったとき 5279: irpInterrupt (t << 2, XEiJ.MPU_IOI_INTERRUPT_LEVEL); //割り込み処理を開始する 5280: } 5281: } else if (t == XEiJ.MPU_EB2_INTERRUPT_MASK) { 5282: XEiJ.mpuIRR &= ~XEiJ.MPU_EB2_INTERRUPT_MASK; //割り込みを受け付ける 5283: if ((t = XEiJ.eb2Acknowledge ()) != 0) { //デバイスにベクタ番号を要求して割り込み処理中の状態になったとき 5284: irpInterrupt (t << 2, XEiJ.MPU_EB2_INTERRUPT_LEVEL); //割り込み処理を開始する 5285: } 5286: } else if (t == XEiJ.MPU_SYS_INTERRUPT_MASK) { 5287: XEiJ.mpuIRR &= ~XEiJ.MPU_SYS_INTERRUPT_MASK; //割り込みを受け付ける 5288: if ((t = XEiJ.sysAcknowledge ()) != 0) { //デバイスにベクタ番号を要求して割り込み処理中の状態になったとき 5289: irpInterrupt (t << 2, XEiJ.MPU_SYS_INTERRUPT_LEVEL); //割り込み処理を開始する 5290: } 5291: } 5292: } 5293: } //if t!=0 5294: if (MC68901.MFP_DELAYED_INTERRUPT) { 5295: XEiJ.mpuIRR |= XEiJ.mpuDIRR; //遅延割り込み要求 5296: XEiJ.mpuDIRR = 0; 5297: } 5298: } //命令ループ 5299: } catch (M68kException e) { 5300: if (M68kException.m6eNumber == M68kException.M6E_WAIT_EXCEPTION) { //待機例外 5301: if (irpWaitException ()) { 5302: continue; 5303: } else { 5304: break errorLoop; 5305: } 5306: } 5307: if (M68kException.m6eNumber == M68kException.M6E_INSTRUCTION_BREAK_POINT) { //命令ブレークポイントによる停止 5308: XEiJ.regPC = XEiJ.regPC0; 5309: XEiJ.mpuStop1 (null); //"Instruction Break Point" 5310: break errorLoop; 5311: } 5312: //例外処理 5313: // ここで処理するのはベクタ番号が2～63の例外に限る 5314: // 例外処理のサイクル数はACCESS_FAULTとADDRESS_ERROR以外は19になっているので必要ならば補正してからthrowする 5315: // 使用頻度が高いと思われる例外はインライン展開するのでここには来ない 5316: // セーブされるpcは以下の例外は命令の先頭、これ以外は次の命令 5317: // 2 ACCESS_FAULT 5318: // 3 ADDRESS_ERROR 5319: // 4 ILLEGAL_INSTRUCTION 5320: // 8 PRIVILEGE_VIOLATION 5321: // 10 LINE_1010_EMULATOR 5322: // 11 LINE_1111_EMULATOR 5323: // 14 FORMAT_ERROR 5324: // 48 FP_BRANCH_SET_UNORDERED 5325: // 60 UNIMPLEMENTED_EFFECTIVE 5326: // 61 UNIMPLEMENTED_INSTRUCTION 5327: // 111111111122222222223333333333444444444455555555556666 5328: // 0123456789012345678901234567890123456789012345678901234567890123 5329: if (0b0011100010110010000000000000000000000000000000001000000000001100L << M68kException.m6eNumber < 0L) { 5330: XEiJ.regPC = XEiJ.regPC0; //セーブされるpcは命令の先頭 5331: //アドレスレジスタを巻き戻す 5332: // A7を含むのでユーザモードのときはスーパーバイザモードに移行する前に巻き戻すこと 5333: for (int arr = 8; m60Incremented != 0L; arr++) { 5334: XEiJ.regRn[arr] -= (byte) m60Incremented; 5335: m60Incremented = (m60Incremented + 0x80L) >> 8; 5336: } 5337: } 5338: //FSLWのTTRを設定する 5339: // 透過変換でアドレス変換キャッシュがヒットしてバスエラーが発生したときFSLWのTTRが設定されていない 5340: //!!! SECONDのときFIRSTと同じページか確認していない。ページフォルトのときは次のページだがバスエラーのときは同じページかもしれない 5341: if ((m60FSLW & (M60_FSLW_BUS_ERROR_ON_READ | M60_FSLW_BUS_ERROR_ON_WRITE)) != 0) { //バスエラーのとき 5342: if (((m60FSLW & M60_FSLW_TM_SUPERVISOR) != 0 ? 5343: (m60FSLW & M60_FSLW_TM_CODE) != 0 ? mmuSuperCodeTransparent : mmuSuperDataTransparent : 5344: (m60FSLW & M60_FSLW_TM_CODE) != 0 ? mmuUserCodeTransparent : mmuUserDataTransparent) 5345: [m60Address >>> 24] != 0) { //透過変換 5346: m60FSLW |= M60_FSLW_TRANSPARENT; 5347: } 5348: } 5349: if (false) { 5350: System.out.println (m60ErrorToString ()); //srを表示するのでsrを更新する前に呼び出すこと 5351: } 5352: try { 5353: int save_sr = XEiJ.regSRT1 | XEiJ.regSRS | XEiJ.regSRM | XEiJ.regSRI | XEiJ.regCCR; 5354: XEiJ.regSRT1 = XEiJ.mpuTraceFlag = 0; //srのTビットを消す 5355: int sp; 5356: if (XEiJ.regSRS != 0) { //スーパーバイザモード 5357: sp = XEiJ.regRn[15]; 5358: } else { //ユーザモード 5359: XEiJ.regSRS = XEiJ.REG_SR_S; //スーパーバイザモードへ移行する 5360: XEiJ.mpuUSP = XEiJ.regRn[15]; //USPを保存 5361: sp = XEiJ.mpuISP; //SSPを復元 5362: if (DataBreakPoint.DBP_ON) { 5363: DataBreakPoint.dbpMemoryMap = DataBreakPoint.dbpSuperMap; //スーパーバイザメモリマップに切り替える 5364: } else { 5365: XEiJ.busMemoryMap = XEiJ.busSuperMap; //スーパーバイザメモリマップに切り替える 5366: } 5367: if (InstructionBreakPoint.IBP_ON) { 5368: InstructionBreakPoint.ibpOp1MemoryMap = InstructionBreakPoint.ibpOp1SuperMap; 5369: } 5370: } 5371: //以下はスーパーバイザモード 5372: XEiJ.mpuClockTime += XEiJ.mpuModifiedUnit * 19; 5373: // 同じオフセットで異なるフォーマットになるものはここでは処理できない 5374: if (M68kException.m6eNumber == M68kException.M6E_ACCESS_FAULT) { 5375: //ホストファイルシステムのデバイスコマンドを強制終了させる 5376: HFS.hfsState = HFS.HFS_STATE_IDLE; 5377: //FORMAT $4の例外スタックフレームを作る 5378: XEiJ.regRn[15] = sp -= 16; 5379: mmuWriteLongData (sp + 12, m60FSLW, 1); //15-12:フォルトステータスロングワード(FSLW) 5380: mmuWriteLongData (sp + 8, m60Address, 1); //11-8:フォルトアドレス 5381: mmuWriteWordData (sp + 6, 0x4000 | M68kException.M6E_ACCESS_FAULT << 2, 1); //7-6:フォーマットとベクタオフセット 5382: // 111111111122222222223333333333444444444455555555556666 5383: // 0123456789012345678901234567890123456789012345678901234567890123 5384: } else if (0b0001011101000000000000000000000000000000000000000000000000000000L << M68kException.m6eNumber < 0L) { 5385: //FORMAT $2の例外スタックフレームを作る 5386: XEiJ.regRn[15] = sp -= 12; 5387: mmuWriteLongData (sp + 8, m60Address, 1); //11-8:命令アドレス 5388: mmuWriteWordData (sp + 6, 0x2000 | M68kException.m6eNumber << 2, 1); //7-6:フォーマットとベクタオフセット 5389: } else { 5390: //FORMAT $0の例外スタックフレームを作る 5391: XEiJ.regRn[15] = sp -= 8; 5392: mmuWriteWordData (sp + 6, M68kException.m6eNumber << 2, 1); //7-6:フォーマットとベクタオフセット 5393: } 5394: mmuWriteLongData (sp + 2, XEiJ.regPC, 1); //5-2:プログラムカウンタ 5395: mmuWriteWordData (sp, save_sr, 1); //1-0:ステータスレジスタ 5396: irpSetPC (mmuReadLongFour (XEiJ.mpuVBR + (M68kException.m6eNumber << 2), 1)); //例外ベクタを取り出してジャンプする 5397: if (XEiJ.dbgStopOnError) { //エラーで停止する場合 5398: if (XEiJ.dbgDoStopOnError ()) { 5399: break errorLoop; 5400: } 5401: } 5402: } catch (M68kException ee) { //ダブルバスフォルト 5403: XEiJ.dbgDoubleBusFault (); 5404: break errorLoop; 5405: } 5406: } //catch M68kException 5407: } //例外ループ 5408: 5409: // 通常 5410: // pc0 最後に実行した命令 5411: // pc 次に実行する命令 5412: // バスエラー、アドレスエラー、不当命令、特権違反で停止したとき 5413: // pc0 エラーを発生させた命令 5414: // pc 例外処理ルーチンの先頭 5415: // ダブルバスフォルトで停止したとき 5416: // pc0 エラーを発生させた命令 5417: // pc エラーを発生させた命令 5418: // 命令ブレークポイントで停止したとき 5419: // pc0 命令ブレークポイントが設定された、次に実行する命令 5420: // pc 命令ブレークポイントが設定された、次に実行する命令 5421: // データブレークポイントで停止したとき 5422: // pc0 データを書き換えた、最後に実行した命令 5423: // pc 次に実行する命令 5424: 5425: //分岐ログに停止レコードを記録する 5426: if (BranchLog.BLG_ON) { 5427: BranchLog.blgStop (); 5428: } 5429: 5430: } //mpuCore() 5431: 5432: 5433: 5434: //cont = irpWaitException () 5435: // 待機例外をキャッチしたとき 5436: public static boolean irpWaitException () { 5437: XEiJ.regPC = XEiJ.regPC0; //PCを巻き戻す 5438: XEiJ.regRn[8 + (XEiJ.regOC & 7)] += WaitInstruction.REWIND_AR[XEiJ.regOC >> 3]; //(Ar)+|-(Ar)で変化したArを巻き戻す 5439: try { 5440: //トレース例外を処理する 5441: if (XEiJ.mpuTraceFlag != 0) { //命令実行前にsrのTビットがセットされていた 5442: irpExceptionFormat2 (M68kException.M6E_TRACE << 2, XEiJ.regPC, XEiJ.regPC0); //pcは次の命令 5443: } 5444: //デバイスを呼び出す 5445: TickerQueue.tkqRun (XEiJ.mpuClockTime); 5446: //割り込みを受け付ける 5447: int t; 5448: if ((t = XEiJ.mpuIMR & XEiJ.mpuIRR) != 0) { //マスクされているレベルよりも高くて受け付けていない割り込みがあるとき 5449: t &= -t; 5450: // x&=-xはxの最下位の1のビットだけを残す演算 5451: // すなわちマスクされているレベルよりも高くて受け付けていない割り込みの中で最高レベルの割り込みのビットだけが残る 5452: // 最高レベルの割り込みのビットしか残っていないので、割り込みの有無をレベルの高い順ではなく使用頻度の高い順に調べられる 5453: // MFPやDMAの割り込みがかかる度にそれより優先度の高いインタラプトスイッチが押されていないかどうかを確かめる必要がない 5454: if (t == XEiJ.MPU_MFP_INTERRUPT_MASK) { 5455: XEiJ.mpuIRR &= ~XEiJ.MPU_MFP_INTERRUPT_MASK; //割り込みを受け付ける 5456: if ((t = MC68901.mfpAcknowledge ()) != 0) { //デバイスにベクタ番号を要求して割り込み処理中の状態になったとき 5457: irpInterrupt (t << 2, XEiJ.MPU_MFP_INTERRUPT_LEVEL); //割り込み処理を開始する 5458: } 5459: } else if (t == XEiJ.MPU_DMA_INTERRUPT_MASK) { 5460: XEiJ.mpuIRR &= ~XEiJ.MPU_DMA_INTERRUPT_MASK; //割り込みを受け付ける 5461: if ((t = HD63450.dmaAcknowledge ()) != 0) { //デバイスにベクタ番号を要求して割り込み処理中の状態になったとき 5462: irpInterrupt (t << 2, XEiJ.MPU_DMA_INTERRUPT_LEVEL); //割り込み処理を開始する 5463: } 5464: } else if (t == XEiJ.MPU_SCC_INTERRUPT_MASK) { 5465: XEiJ.mpuIRR &= ~XEiJ.MPU_SCC_INTERRUPT_MASK; //割り込みを受け付ける 5466: if ((t = Z8530.sccAcknowledge ()) != 0) { //デバイスにベクタ番号を要求して割り込み処理中の状態になったとき 5467: irpInterrupt (t << 2, XEiJ.MPU_SCC_INTERRUPT_LEVEL); //割り込み処理を開始する 5468: } 5469: } else if (t == XEiJ.MPU_IOI_INTERRUPT_MASK) { 5470: XEiJ.mpuIRR &= ~XEiJ.MPU_IOI_INTERRUPT_MASK; //割り込みを受け付ける 5471: if ((t = IOInterrupt.ioiAcknowledge ()) != 0) { //デバイスにベクタ番号を要求して割り込み処理中の状態になったとき 5472: irpInterrupt (t << 2, XEiJ.MPU_IOI_INTERRUPT_LEVEL); //割り込み処理を開始する 5473: } 5474: } else if (t == XEiJ.MPU_EB2_INTERRUPT_MASK) { 5475: XEiJ.mpuIRR &= ~XEiJ.MPU_EB2_INTERRUPT_MASK; //割り込みを受け付ける 5476: if ((t = XEiJ.eb2Acknowledge ()) != 0) { //デバイスにベクタ番号を要求して割り込み処理中の状態になったとき 5477: irpInterrupt (t << 2, XEiJ.MPU_EB2_INTERRUPT_LEVEL); //割り込み処理を開始する 5478: } 5479: } else if (t == XEiJ.MPU_SYS_INTERRUPT_MASK) { 5480: XEiJ.mpuIRR &= ~XEiJ.MPU_SYS_INTERRUPT_MASK; //割り込みを受け付ける 5481: if ((t = XEiJ.sysAcknowledge ()) != 0) { //デバイスにベクタ番号を要求して割り込み処理中の状態になったとき 5482: irpInterrupt (t << 2, XEiJ.MPU_SYS_INTERRUPT_LEVEL); //割り込み処理を開始する 5483: } 5484: } 5485: } //if t!=0 5486: if (MC68901.MFP_DELAYED_INTERRUPT) { 5487: XEiJ.mpuIRR |= XEiJ.mpuDIRR; //遅延割り込み要求 5488: XEiJ.mpuDIRR = 0; 5489: } 5490: } catch (M68kException e) { 5491: //!!! 待機例外処理中のバスエラーの処理は省略 5492: XEiJ.dbgDoubleBusFault (); 5493: return false; 5494: } //catch M68kException 5495: return true; 5496: } //irpWaitException 5497: 5498: 5499: 5500: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 5501: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 5502: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 5503: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 5504: //ORI.B #<data>,<ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |0000_000_000_mmm_rrr-{data} 5505: //OR.B #<data>,<ea> |A|012346|-|-UUUU|-**00| M+-WXZ |0000_000_000_mmm_rrr-{data} [ORI.B #<data>,<ea>] 5506: //ORI.B #<data>,CCR |-|012346|-|*****|*****| |0000_000_000_111_100-{data} 5507: public static void irpOriByte () throws M68kException { 5508: int ea = XEiJ.regOC & 63; 5509: int z = mmuReadByteSignExword ((XEiJ.regPC += 2) - 1, XEiJ.regSRS); //pcbs 5510: if (ea < XEiJ.EA_AR) { //ORI.B #<data>,Dr 5511: if (XEiJ.DBG_ORI_BYTE_ZERO_D0) { 5512: if (z == 0 && ea == 0 && XEiJ.dbgOriByteZeroD0) { //ORI.B #$00,D0 5513: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 5514: throw M68kException.m6eSignal; 5515: } 5516: } 5517: XEiJ.mpuCycleCount++; 5518: z = XEiJ.regRn[ea] |= 255 & z; //0拡張してからOR 5519: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & z]; //ccr_tst_byte 5520: } else if (ea == XEiJ.EA_IM) { //ORI.B #<data>,CCR 5521: XEiJ.mpuCycleCount++; 5522: XEiJ.regCCR |= XEiJ.REG_CCR_MASK & z; 5523: } else { //ORI.B #<data>,<mem> 5524: XEiJ.mpuCycleCount++; 5525: int a = efaMltByte (ea); 5526: mmuWriteByteData (a, z |= mmuModifyByteSignData (a, XEiJ.regSRS), XEiJ.regSRS); 5527: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & z]; //ccr_tst_byte 5528: } 5529: } //irpOriByte 5530: 5531: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 5532: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 5533: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 5534: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 5535: //ORI.W #<data>,<ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |0000_000_001_mmm_rrr-{data} 5536: //OR.W #<data>,<ea> |A|012346|-|-UUUU|-**00| M+-WXZ |0000_000_001_mmm_rrr-{data} [ORI.W #<data>,<ea>] 5537: //ORI.W #<data>,SR |-|012346|P|*****|*****| |0000_000_001_111_100-{data} 5538: public static void irpOriWord () throws M68kException { 5539: int ea = XEiJ.regOC & 63; 5540: if (ea < XEiJ.EA_AR) { //ORI.W #<data>,Dr 5541: int z = mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); //pcws 5542: XEiJ.mpuCycleCount++; 5543: z = XEiJ.regRn[ea] |= (char) z; //0拡張してからOR 5544: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (char) z - 1 >> 31 & XEiJ.REG_CCR_Z | ((short) z < 0 ? XEiJ.REG_CCR_N : 0); //ccr_tst_word 5545: } else if (ea == XEiJ.EA_IM) { //ORI.W #<data>,SR 5546: if (XEiJ.regSRS == 0) { //ユーザモードのとき 5547: M68kException.m6eNumber = M68kException.M6E_PRIVILEGE_VIOLATION; 5548: throw M68kException.m6eSignal; 5549: } 5550: //以下はスーパーバイザモード 5551: XEiJ.mpuCycleCount += 5; 5552: irpSetSR (XEiJ.regSRT1 | XEiJ.regSRS | XEiJ.regSRM | XEiJ.regSRI | XEiJ.regCCR | mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, 1)); //pcws。特権違反チェックが先 5553: } else { //ORI.W #<data>,<mem> 5554: int z = mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); //pcws 5555: XEiJ.mpuCycleCount++; 5556: int a = efaMltWord (ea); 5557: mmuWriteWordData (a, z |= mmuModifyWordSignData (a, XEiJ.regSRS), XEiJ.regSRS); 5558: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (char) z - 1 >> 31 & XEiJ.REG_CCR_Z | ((short) z < 0 ? XEiJ.REG_CCR_N : 0); //ccr_tst_word 5559: } 5560: } //irpOriWord 5561: 5562: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 5563: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 5564: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 5565: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 5566: //ORI.L #<data>,<ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |0000_000_010_mmm_rrr-{data} 5567: //OR.L #<data>,<ea> |A|012346|-|-UUUU|-**00| M+-WXZ |0000_000_010_mmm_rrr-{data} [ORI.L #<data>,<ea>] 5568: public static void irpOriLong () throws M68kException { 5569: int ea = XEiJ.regOC & 63; 5570: int y = mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS); //pcls 5571: int z; 5572: if (ea < XEiJ.EA_AR) { //ORI.L #<data>,Dr 5573: XEiJ.mpuCycleCount++; 5574: z = XEiJ.regRn[ea] |= y; 5575: } else { //ORI.L #<data>,<mem> 5576: XEiJ.mpuCycleCount++; 5577: int a = efaMltLong (ea); 5578: mmuWriteLongData (a, z = mmuModifyLongData (a, XEiJ.regSRS) | y, XEiJ.regSRS); 5579: } 5580: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 5581: } //irpOriLong 5582: 5583: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 5584: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 5585: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 5586: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 5587: //BITREV.L Dr |-|------|-|-----|-----|D |0000_000_011_000_rrr (ISA_C) 5588: //CMP2.B <ea>,Rn |-|--234S|-|-UUUU|-U*U*| M WXZP |0000_000_011_mmm_rrr-rnnn000000000000 5589: //CHK2.B <ea>,Rn |-|--234S|-|-UUUU|-U*U*| M WXZP |0000_000_011_mmm_rrr-rnnn100000000000 5590: // 5591: //BITREV.L Dr 5592: // Drのビットの並びを逆順にする。CCRは変化しない 5593: // 5594: //CHK2.B <ea>,Rn 5595: // <ea>から下限と上限をリードしてRnが範囲内か調べる 5596: // CHK2.B <ea>,Anは下限と上限をそれぞれロングに符号拡張してロングで比較する 5597: // Rnが下限または上限と等しいときZをセットする 5598: // Rnが範囲外のときCをセットする。このときCHK instruction例外が発生する 5599: // 060ISPのソースは注釈に誤りが多いので注釈ではなくコードを参考にする 5600: // CCR 5601: // X 変化しない 5602: // N 変化しない(M68000PRMでは未定義) 5603: // Z Rn-LB==0||Rn-LB==UB-LB 5604: // V 変化しない(M68000PRMでは未定義) 5605: // C Rn-LB>UB-LB(符号なし比較) 5606: // 5607: //CMP2.B <ea>,Rn 5608: // <ea>から下限と上限をリードしてRnが範囲内か調べる 5609: // CMP2.B <ea>,Anは下限と上限をそれぞれロングに符号拡張してロングで比較する 5610: // Rnが下限または上限と等しいときZをセットする 5611: // Rnが範囲外のときCをセットする 5612: // 060ISPのソースは注釈に誤りが多いので注釈ではなくコードを参考にする 5613: // CCR 5614: // X 変化しない 5615: // N 変化しない(M68000PRMでは未定義) 5616: // Z Rn-LB==0||Rn-LB==UB-LB 5617: // V 変化しない(M68000PRMでは未定義) 5618: // C Rn-LB>UB-LB(符号なし比較) 5619: public static void irpCmp2Chk2Byte () throws M68kException { 5620: int ea = XEiJ.regOC & 63; 5621: if (ea < XEiJ.EA_AR) { //BITREV.L Dr 5622: XEiJ.mpuCycleCount++; 5623: int x = XEiJ.regRn[ea]; 5624: XEiJ.regRn[ea] = XEiJ.MPU_BITREV_TABLE_0[x & 2047] | XEiJ.MPU_BITREV_TABLE_1[x << 10 >>> 21] | XEiJ.MPU_BITREV_TABLE_2[x >>> 22]; 5625: } else { //CMP2/CHK2.B <ea>,Rn 5626: M68kException.m6eNumber = M68kException.M6E_UNIMPLEMENTED_INSTRUCTION; 5627: throw M68kException.m6eSignal; 5628: } 5629: } //irpCmp2Chk2Byte 5630: 5631: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 5632: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 5633: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 5634: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 5635: //BTST.L Dq,Dr |-|012346|-|--U--|--*--|D |0000_qqq_100_000_rrr 5636: //MOVEP.W (d16,Ar),Dq |-|01234S|-|-----|-----| |0000_qqq_100_001_rrr-{data} 5637: //BTST.B Dq,<ea> |-|012346|-|--U--|--*--| M+-WXZPI|0000_qqq_100_mmm_rrr 5638: public static void irpBtstReg () throws M68kException { 5639: int ea = XEiJ.regOC & 63; 5640: int qqq = XEiJ.regOC >> 9; //qqq 5641: if (ea >> 3 == XEiJ.MMM_AR) { //MOVEP.W (d16,Ar),Dq 5642: M68kException.m6eNumber = M68kException.M6E_UNIMPLEMENTED_INSTRUCTION; 5643: throw M68kException.m6eSignal; 5644: } else { //BTST.L Dq,Dr/<ea> 5645: int y = XEiJ.regRn[qqq]; 5646: if (ea < XEiJ.EA_AR) { //BTST.L Dq,Dr 5647: XEiJ.mpuCycleCount++; 5648: XEiJ.regCCR = XEiJ.regCCR & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_N | XEiJ.REG_CCR_V | XEiJ.REG_CCR_C) | (~XEiJ.regRn[ea] >>> y & 1) << 2; //ccr_btst。intのシフトは5bitでマスクされるので&31を省略 5649: } else { //BTST.B Dq,<ea> 5650: XEiJ.mpuCycleCount++; 5651: XEiJ.regCCR = XEiJ.regCCR & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_N | XEiJ.REG_CCR_V | XEiJ.REG_CCR_C) | (~(ea == XEiJ.EA_IM ? mmuReadByteSignExword ((XEiJ.regPC += 2) - 1, XEiJ.regSRS) : mmuReadByteSignData (efaAnyByte (ea), XEiJ.regSRS)) >>> (y & 7) & 1) << 2; //ccr_btst。pcbs。イミディエイトを分離 5652: } 5653: } 5654: } //irpBtstReg 5655: 5656: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 5657: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 5658: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 5659: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 5660: //BCHG.L Dq,Dr |-|012346|-|--U--|--*--|D |0000_qqq_101_000_rrr 5661: //MOVEP.L (d16,Ar),Dq |-|01234S|-|-----|-----| |0000_qqq_101_001_rrr-{data} 5662: //BCHG.B Dq,<ea> |-|012346|-|--U--|--*--| M+-WXZ |0000_qqq_101_mmm_rrr 5663: public static void irpBchgReg () throws M68kException { 5664: int ea = XEiJ.regOC & 63; 5665: int qqq = XEiJ.regOC >> 9; //qqq 5666: if (ea >> 3 == XEiJ.MMM_AR) { //MOVEP.L (d16,Ar),Dq 5667: M68kException.m6eNumber = M68kException.M6E_UNIMPLEMENTED_INSTRUCTION; 5668: throw M68kException.m6eSignal; 5669: } else { //BCHG.L Dq,Dr/<ea> 5670: int x; 5671: int y = XEiJ.regRn[qqq]; 5672: if (ea < XEiJ.EA_AR) { //BCHG.L Dq,Dr 5673: XEiJ.mpuCycleCount++; 5674: XEiJ.regRn[ea] = (x = XEiJ.regRn[ea]) ^ (y = 1 << y); //intのシフトは5bitでマスクされるので1<<(y&0x1f)の&0x1fを省略 5675: } else { //BCHG.B Dq,<ea> 5676: XEiJ.mpuCycleCount++; 5677: int a = efaMltByte (ea); 5678: mmuWriteByteData (a, (x = mmuModifyByteSignData (a, XEiJ.regSRS)) ^ (y = 1 << (y & 7)), XEiJ.regSRS); 5679: } 5680: XEiJ.regCCR = XEiJ.regCCR & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_N | XEiJ.REG_CCR_V | XEiJ.REG_CCR_C) | (x & y) - 1 >>> 31 << 2; //ccr_btst 5681: } 5682: } //irpBchgReg 5683: 5684: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 5685: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 5686: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 5687: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 5688: //BCLR.L Dq,Dr |-|012346|-|--U--|--*--|D |0000_qqq_110_000_rrr 5689: //MOVEP.W Dq,(d16,Ar) |-|01234S|-|-----|-----| |0000_qqq_110_001_rrr-{data} 5690: //BCLR.B Dq,<ea> |-|012346|-|--U--|--*--| M+-WXZ |0000_qqq_110_mmm_rrr 5691: public static void irpBclrReg () throws M68kException { 5692: int ea = XEiJ.regOC & 63; 5693: int y = XEiJ.regRn[XEiJ.regOC >> 9]; //qqq 5694: if (ea >> 3 == XEiJ.MMM_AR) { //MOVEP.W Dq,(d16,Ar) 5695: M68kException.m6eNumber = M68kException.M6E_UNIMPLEMENTED_INSTRUCTION; 5696: throw M68kException.m6eSignal; 5697: } else { //BCLR.L Dq,Dr/<ea> 5698: int x; 5699: if (ea < XEiJ.EA_AR) { //BCLR.L Dq,Dr 5700: XEiJ.mpuCycleCount++; 5701: XEiJ.regRn[ea] = (x = XEiJ.regRn[ea]) & ~(y = 1 << y); //intのシフトは5bitでマスクされるので1<<(y&0x1f)の&0x1fを省略 5702: } else { //BCLR.B Dq,<ea> 5703: XEiJ.mpuCycleCount++; 5704: int a = efaMltByte (ea); 5705: mmuWriteByteData (a, (x = mmuModifyByteSignData (a, XEiJ.regSRS)) & ~(y = 1 << (y & 7)), XEiJ.regSRS); 5706: } 5707: XEiJ.regCCR = XEiJ.regCCR & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_N | XEiJ.REG_CCR_V | XEiJ.REG_CCR_C) | (x & y) - 1 >>> 31 << 2; //ccr_btst 5708: } 5709: } //irpBclrReg 5710: 5711: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 5712: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 5713: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 5714: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 5715: //BSET.L Dq,Dr |-|012346|-|--U--|--*--|D |0000_qqq_111_000_rrr 5716: //MOVEP.L Dq,(d16,Ar) |-|01234S|-|-----|-----| |0000_qqq_111_001_rrr-{data} 5717: //BSET.B Dq,<ea> |-|012346|-|--U--|--*--| M+-WXZ |0000_qqq_111_mmm_rrr 5718: public static void irpBsetReg () throws M68kException { 5719: int ea = XEiJ.regOC & 63; 5720: int y = XEiJ.regRn[XEiJ.regOC >> 9]; //qqq 5721: if (ea >> 3 == XEiJ.MMM_AR) { //MOVEP.L Dq,(d16,Ar) 5722: M68kException.m6eNumber = M68kException.M6E_UNIMPLEMENTED_INSTRUCTION; 5723: throw M68kException.m6eSignal; 5724: } else { //BSET.L Dq,Dr/<ea> 5725: int x; 5726: if (ea < XEiJ.EA_AR) { //BSET.L Dq,Dr 5727: XEiJ.mpuCycleCount++; 5728: XEiJ.regRn[ea] = (x = XEiJ.regRn[ea]) | (y = 1 << y); //intのシフトは5bitでマスクされるので1<<(y&0x1f)の&0x1fを省略 5729: } else { //BSET.B Dq,<ea> 5730: XEiJ.mpuCycleCount++; 5731: int a = efaMltByte (ea); 5732: mmuWriteByteData (a, (x = mmuModifyByteSignData (a, XEiJ.regSRS)) | (y = 1 << (y & 7)), XEiJ.regSRS); 5733: } 5734: XEiJ.regCCR = XEiJ.regCCR & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_N | XEiJ.REG_CCR_V | XEiJ.REG_CCR_C) | (x & y) - 1 >>> 31 << 2; //ccr_btst 5735: } 5736: } //irpBsetReg 5737: 5738: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 5739: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 5740: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 5741: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 5742: //ANDI.B #<data>,<ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |0000_001_000_mmm_rrr-{data} 5743: //AND.B #<data>,<ea> |A|012346|-|-UUUU|-**00| M+-WXZ |0000_001_000_mmm_rrr-{data} [ANDI.B #<data>,<ea>] 5744: //ANDI.B #<data>,CCR |-|012346|-|*****|*****| |0000_001_000_111_100-{data} 5745: public static void irpAndiByte () throws M68kException { 5746: int ea = XEiJ.regOC & 63; 5747: int z = mmuReadByteSignExword ((XEiJ.regPC += 2) - 1, XEiJ.regSRS); //pcbs 5748: if (ea < XEiJ.EA_AR) { //ANDI.B #<data>,Dr 5749: XEiJ.mpuCycleCount++; 5750: z = XEiJ.regRn[ea] &= ~255 | z; //1拡張してからAND 5751: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & z]; //ccr_tst_byte 5752: } else if (ea == XEiJ.EA_IM) { //ANDI.B #<data>,CCR 5753: XEiJ.mpuCycleCount++; 5754: XEiJ.regCCR &= z; 5755: } else { //ANDI.B #<data>,<mem> 5756: XEiJ.mpuCycleCount++; 5757: int a = efaMltByte (ea); 5758: mmuWriteByteData (a, z &= mmuModifyByteSignData (a, XEiJ.regSRS), XEiJ.regSRS); 5759: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & z]; //ccr_tst_byte 5760: } 5761: } //irpAndiByte 5762: 5763: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 5764: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 5765: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 5766: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 5767: //ANDI.W #<data>,<ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |0000_001_001_mmm_rrr-{data} 5768: //AND.W #<data>,<ea> |A|012346|-|-UUUU|-**00| M+-WXZ |0000_001_001_mmm_rrr-{data} [ANDI.W #<data>,<ea>] 5769: //ANDI.W #<data>,SR |-|012346|P|*****|*****| |0000_001_001_111_100-{data} 5770: public static void irpAndiWord () throws M68kException { 5771: int ea = XEiJ.regOC & 63; 5772: if (ea < XEiJ.EA_AR) { //ANDI.W #<data>,Dr 5773: int z = mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); //pcws 5774: XEiJ.mpuCycleCount++; 5775: z = XEiJ.regRn[ea] &= ~65535 | z; //1拡張してからAND 5776: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (char) z - 1 >> 31 & XEiJ.REG_CCR_Z | ((short) z < 0 ? XEiJ.REG_CCR_N : 0); //ccr_tst_word 5777: } else if (ea == XEiJ.EA_IM) { //ANDI.W #<data>,SR 5778: if (XEiJ.regSRS == 0) { //ユーザモードのとき 5779: M68kException.m6eNumber = M68kException.M6E_PRIVILEGE_VIOLATION; 5780: throw M68kException.m6eSignal; 5781: } 5782: //以下はスーパーバイザモード 5783: XEiJ.mpuCycleCount += 12; 5784: irpSetSR ((XEiJ.regSRT1 | XEiJ.regSRS | XEiJ.regSRM | XEiJ.regSRI | XEiJ.regCCR) & mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, 1)); //pcws。特権違反チェックが先 5785: } else { //ANDI.W #<data>,<mem> 5786: int z = mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); //pcws 5787: XEiJ.mpuCycleCount++; 5788: int a = efaMltWord (ea); 5789: mmuWriteWordData (a, z &= mmuModifyWordSignData (a, XEiJ.regSRS), XEiJ.regSRS); 5790: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (char) z - 1 >> 31 & XEiJ.REG_CCR_Z | ((short) z < 0 ? XEiJ.REG_CCR_N : 0); //ccr_tst_word 5791: } 5792: } //irpAndiWord 5793: 5794: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 5795: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 5796: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 5797: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 5798: //ANDI.L #<data>,<ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |0000_001_010_mmm_rrr-{data} 5799: //AND.L #<data>,<ea> |A|012346|-|-UUUU|-**00| M+-WXZ |0000_001_010_mmm_rrr-{data} [ANDI.L #<data>,<ea>] 5800: public static void irpAndiLong () throws M68kException { 5801: int ea = XEiJ.regOC & 63; 5802: int y = mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS); //pcls 5803: int z; 5804: if (ea < XEiJ.EA_AR) { //ANDI.L #<data>,Dr 5805: XEiJ.mpuCycleCount++; 5806: z = XEiJ.regRn[ea] &= y; 5807: } else { //ANDI.L #<data>,<mem> 5808: XEiJ.mpuCycleCount++; 5809: int a = efaMltLong (ea); 5810: mmuWriteLongData (a, z = mmuModifyLongData (a, XEiJ.regSRS) & y, XEiJ.regSRS); 5811: } 5812: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 5813: } //irpAndiLong 5814: 5815: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 5816: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 5817: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 5818: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 5819: //BYTEREV.L Dr |-|------|-|-----|-----|D |0000_001_011_000_rrr (ISA_C) 5820: //CMP2.W <ea>,Rn |-|--234S|-|-UUUU|-U*U*| M WXZP |0000_001_011_mmm_rrr-rnnn000000000000 5821: //CHK2.W <ea>,Rn |-|--234S|-|-UUUU|-U*U*| M WXZP |0000_001_011_mmm_rrr-rnnn100000000000 5822: // 5823: //BYTEREV.L Dr 5824: // Drのバイトの並びを逆順にする。CCRは変化しない 5825: // 5826: //CHK2.W <ea>,Rn 5827: // <ea>から下限と上限をリードしてRnが範囲内か調べる 5828: // CHK2.W <ea>,Anは下限と上限をそれぞれロングに符号拡張してロングで比較する 5829: // Rnが下限または上限と等しいときZをセットする 5830: // Rnが範囲外のときCをセットする。このときCHK instruction例外が発生する 5831: // 060ISPのソースは注釈に誤りが多いので注釈ではなくコードを参考にする 5832: // CCR 5833: // X 変化しない 5834: // N 変化しない(M68000PRMでは未定義) 5835: // Z Rn-LB==0||Rn-LB==UB-LB 5836: // V 変化しない(M68000PRMでは未定義) 5837: // C Rn-LB>UB-LB(符号なし比較) 5838: // 5839: //CMP2.W <ea>,Rn 5840: // <ea>から下限と上限をリードしてRnが範囲内か調べる 5841: // CMP2.W <ea>,Anは下限と上限をそれぞれロングに符号拡張してロングで比較する 5842: // Rnが下限または上限と等しいときZをセットする 5843: // Rnが範囲外のときCをセットする 5844: // 060ISPのソースは注釈に誤りが多いので注釈ではなくコードを参考にする 5845: // CCR 5846: // X 変化しない 5847: // N 変化しない(M68000PRMでは未定義) 5848: // Z Rn-LB==0||Rn-LB==UB-LB 5849: // V 変化しない(M68000PRMでは未定義) 5850: // C Rn-LB>UB-LB(符号なし比較) 5851: public static void irpCmp2Chk2Word () throws M68kException { 5852: int ea = XEiJ.regOC & 63; 5853: if (ea < XEiJ.EA_AR) { //BYTEREV.L Dr 5854: XEiJ.mpuCycleCount++; 5855: XEiJ.regRn[ea] = Integer.reverseBytes (XEiJ.regRn[ea]); 5856: } else { //CMP2/CHK2.W <ea>,Rn 5857: M68kException.m6eNumber = M68kException.M6E_UNIMPLEMENTED_INSTRUCTION; 5858: throw M68kException.m6eSignal; 5859: } 5860: } //irpCmp2Chk2Word 5861: 5862: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 5863: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 5864: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 5865: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 5866: //SUBI.B #<data>,<ea> |-|012346|-|UUUUU|*****|D M+-WXZ |0000_010_000_mmm_rrr-{data} 5867: //SUB.B #<data>,<ea> |A|012346|-|UUUUU|*****| M+-WXZ |0000_010_000_mmm_rrr-{data} [SUBI.B #<data>,<ea>] 5868: public static void irpSubiByte () throws M68kException { 5869: int ea = XEiJ.regOC & 63; 5870: int x; 5871: int y = mmuReadByteSignExword ((XEiJ.regPC += 2) - 1, XEiJ.regSRS); //pcbs 5872: int z; 5873: if (ea < XEiJ.EA_AR) { //SUBI.B #<data>,Dr 5874: XEiJ.mpuCycleCount++; 5875: z = (byte) (XEiJ.regRn[ea] = ~0xff & (x = XEiJ.regRn[ea]) | 0xff & (x = (byte) x) - y); 5876: } else { //SUBI.B #<data>,<mem> 5877: XEiJ.mpuCycleCount++; 5878: int a = efaMltByte (ea); 5879: mmuWriteByteData (a, z = (byte) ((x = mmuModifyByteSignData (a, XEiJ.regSRS)) - y), XEiJ.regSRS); 5880: } 5881: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | 5882: ((x ^ y) & (x ^ z)) >>> 31 << 1 | 5883: (x & (y ^ z) ^ (y | z)) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_sub 5884: } //irpSubiByte 5885: 5886: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 5887: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 5888: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 5889: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 5890: //SUBI.W #<data>,<ea> |-|012346|-|UUUUU|*****|D M+-WXZ |0000_010_001_mmm_rrr-{data} 5891: //SUB.W #<data>,<ea> |A|012346|-|UUUUU|*****| M+-WXZ |0000_010_001_mmm_rrr-{data} [SUBI.W #<data>,<ea>] 5892: public static void irpSubiWord () throws M68kException { 5893: int ea = XEiJ.regOC & 63; 5894: int x; 5895: int y = mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); //pcws 5896: int z; 5897: if (ea < XEiJ.EA_AR) { //SUBI.W #<data>,Dr 5898: XEiJ.mpuCycleCount++; 5899: z = (short) (XEiJ.regRn[ea] = ~0xffff & (x = XEiJ.regRn[ea]) | (char) ((x = (short) x) - y)); 5900: } else { //SUBI.W #<data>,<mem> 5901: XEiJ.mpuCycleCount++; 5902: int a = efaMltWord (ea); 5903: mmuWriteWordData (a, z = (short) ((x = mmuModifyWordSignData (a, XEiJ.regSRS)) - y), XEiJ.regSRS); 5904: } 5905: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | 5906: ((x ^ y) & (x ^ z)) >>> 31 << 1 | 5907: (x & (y ^ z) ^ (y | z)) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_sub 5908: } //irpSubiWord 5909: 5910: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 5911: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 5912: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 5913: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 5914: //SUBI.L #<data>,<ea> |-|012346|-|UUUUU|*****|D M+-WXZ |0000_010_010_mmm_rrr-{data} 5915: //SUB.L #<data>,<ea> |A|012346|-|UUUUU|*****| M+-WXZ |0000_010_010_mmm_rrr-{data} [SUBI.L #<data>,<ea>] 5916: public static void irpSubiLong () throws M68kException { 5917: int ea = XEiJ.regOC & 63; 5918: int x; 5919: int y = mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS); //pcls 5920: int z; 5921: if (ea < XEiJ.EA_AR) { //SUBI.L #<data>,Dr 5922: XEiJ.mpuCycleCount++; 5923: XEiJ.regRn[ea] = z = (x = XEiJ.regRn[ea]) - y; 5924: } else { //SUBI.L #<data>,<mem> 5925: XEiJ.mpuCycleCount++; 5926: int a = efaMltLong (ea); 5927: mmuWriteLongData (a, z = (x = mmuModifyLongData (a, XEiJ.regSRS)) - y, XEiJ.regSRS); 5928: } 5929: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | 5930: ((x ^ y) & (x ^ z)) >>> 31 << 1 | 5931: (x & (y ^ z) ^ (y | z)) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_sub 5932: } //irpSubiLong 5933: 5934: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 5935: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 5936: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 5937: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 5938: //FF1.L Dr |-|------|-|-UUUU|-**00|D |0000_010_011_000_rrr (ISA_C) 5939: //CMP2.L <ea>,Rn |-|--234S|-|-UUUU|-U*U*| M WXZP |0000_010_011_mmm_rrr-rnnn000000000000 5940: //CHK2.L <ea>,Rn |-|--234S|-|-UUUU|-U*U*| M WXZP |0000_010_011_mmm_rrr-rnnn100000000000 5941: // 5942: //CHK2.L <ea>,Rn 5943: // <ea>から下限と上限をリードしてRnが範囲内か調べる 5944: // Rnが下限または上限と等しいときZをセットする 5945: // Rnが範囲外のときCをセットする。このときCHK instruction例外が発生する 5946: // 060ISPのソースは注釈に誤りが多いので注釈ではなくコードを参考にする 5947: // CCR 5948: // X 変化しない 5949: // N 変化しない(M68000PRMでは未定義) 5950: // Z Rn-LB==0||Rn-LB==UB-LB 5951: // V 変化しない(M68000PRMでは未定義) 5952: // C Rn-LB>UB-LB(符号なし比較) 5953: // 5954: //CMP2.L <ea>,Rn 5955: // <ea>から下限と上限をリードしてRnが範囲内か調べる 5956: // Rnが下限または上限と等しいときZをセットする 5957: // Rnが範囲外のときCをセットする 5958: // 060ISPのソースは注釈に誤りが多いので注釈ではなくコードを参考にする 5959: // CCR 5960: // X 変化しない 5961: // N 変化しない(M68000PRMでは未定義) 5962: // Z Rn-LB==0||Rn-LB==UB-LB 5963: // V 変化しない(M68000PRMでは未定義) 5964: // C Rn-LB>UB-LB(符号なし比較) 5965: // 5966: //FF1.L Dr 5967: // Drの最上位の1のbit31からのオフセットをDrに格納する 5968: // Drが0のときは32になる 5969: public static void irpCmp2Chk2Long () throws M68kException { 5970: int ea = XEiJ.regOC & 63; 5971: if (ea < XEiJ.EA_AR) { //FF1.L Dr 5972: XEiJ.mpuCycleCount++; 5973: int z = XEiJ.regRn[ea]; 5974: XEiJ.regRn[ea] = Integer.numberOfLeadingZeros (z); 5975: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 5976: } else { //CMP2/CHK2.L <ea>,Rn 5977: M68kException.m6eNumber = M68kException.M6E_UNIMPLEMENTED_INSTRUCTION; 5978: throw M68kException.m6eSignal; 5979: } 5980: } //irpCmp2Chk2Long 5981: 5982: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 5983: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 5984: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 5985: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 5986: //ADDI.B #<data>,<ea> |-|012346|-|UUUUU|*****|D M+-WXZ |0000_011_000_mmm_rrr-{data} 5987: public static void irpAddiByte () throws M68kException { 5988: int ea = XEiJ.regOC & 63; 5989: int x; 5990: int y = mmuReadByteSignExword ((XEiJ.regPC += 2) - 1, XEiJ.regSRS); //pcbs 5991: int z; 5992: if (ea < XEiJ.EA_AR) { //ADDI.B #<data>,Dr 5993: XEiJ.mpuCycleCount++; 5994: z = (byte) (XEiJ.regRn[ea] = ~0xff & (x = XEiJ.regRn[ea]) | 0xff & (x = (byte) x) + y); 5995: } else { //ADDI.B #<data>,<mem> 5996: XEiJ.mpuCycleCount++; 5997: int a = efaMltByte (ea); 5998: mmuWriteByteData (a, z = (byte) ((x = mmuModifyByteSignData (a, XEiJ.regSRS)) + y), XEiJ.regSRS); 5999: } 6000: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | 6001: ((x ^ z) & (y ^ z)) >>> 31 << 1 | 6002: ((x | y) ^ (x ^ y) & z) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_add 6003: } //irpAddiByte 6004: 6005: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6006: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 6007: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 6008: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6009: //ADDI.W #<data>,<ea> |-|012346|-|UUUUU|*****|D M+-WXZ |0000_011_001_mmm_rrr-{data} 6010: public static void irpAddiWord () throws M68kException { 6011: int ea = XEiJ.regOC & 63; 6012: int x; 6013: int y = mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); //pcws 6014: int z; 6015: if (ea < XEiJ.EA_AR) { //ADDI.W #<data>,Dr 6016: XEiJ.mpuCycleCount++; 6017: z = (short) (XEiJ.regRn[ea] = ~0xffff & (x = XEiJ.regRn[ea]) | (char) ((x = (short) x) + y)); 6018: } else { //ADDI.W #<data>,<mem> 6019: XEiJ.mpuCycleCount++; 6020: int a = efaMltWord (ea); 6021: mmuWriteWordData (a, z = (short) ((x = mmuModifyWordSignData (a, XEiJ.regSRS)) + y), XEiJ.regSRS); 6022: } 6023: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | 6024: ((x ^ z) & (y ^ z)) >>> 31 << 1 | 6025: ((x | y) ^ (x ^ y) & z) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_add 6026: } //irpAddiWord 6027: 6028: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6029: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 6030: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 6031: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6032: //ADDI.L #<data>,<ea> |-|012346|-|UUUUU|*****|D M+-WXZ |0000_011_010_mmm_rrr-{data} 6033: public static void irpAddiLong () throws M68kException { 6034: int ea = XEiJ.regOC & 63; 6035: int x; 6036: int y = mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS); //pcls 6037: int z; 6038: if (ea < XEiJ.EA_AR) { //ADDI.L #<data>,Dr 6039: XEiJ.mpuCycleCount++; 6040: XEiJ.regRn[ea] = z = (x = XEiJ.regRn[ea]) + y; 6041: } else { //ADDI.L #<data>,<mem> 6042: XEiJ.mpuCycleCount++; 6043: int a = efaMltLong (ea); 6044: mmuWriteLongData (a, z = (x = mmuModifyLongData (a, XEiJ.regSRS)) + y, XEiJ.regSRS); 6045: } 6046: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | 6047: ((x ^ z) & (y ^ z)) >>> 31 << 1 | 6048: ((x | y) ^ (x ^ y) & z) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_add 6049: } //irpAddiLong 6050: 6051: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6052: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 6053: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 6054: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6055: //BTST.L #<data>,Dr |-|012346|-|--U--|--*--|D |0000_100_000_000_rrr-{data} 6056: //BTST.B #<data>,<ea> |-|012346|-|--U--|--*--| M+-WXZP |0000_100_000_mmm_rrr-{data} 6057: public static void irpBtstImm () throws M68kException { 6058: int ea = XEiJ.regOC & 63; 6059: int y = mmuReadByteSignExword ((XEiJ.regPC += 2) - 1, XEiJ.regSRS); //pcbs 6060: if (ea < XEiJ.EA_AR) { //BTST.L #<data>,Dr 6061: XEiJ.mpuCycleCount++; 6062: XEiJ.regCCR = XEiJ.regCCR & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_N | XEiJ.REG_CCR_V | XEiJ.REG_CCR_C) | (~XEiJ.regRn[ea] >>> y & 1) << 2; //ccr_btst。intのシフトは5bitでマスクされるので&31を省略 6063: } else { //BTST.B #<data>,<ea> 6064: XEiJ.mpuCycleCount++; 6065: XEiJ.regCCR = XEiJ.regCCR & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_N | XEiJ.REG_CCR_V | XEiJ.REG_CCR_C) | (~mmuReadByteSignData (efaMemByte (ea), XEiJ.regSRS) >>> (y & 7) & 1) << 2; //ccr_btst 6066: } 6067: } //irpBtstImm 6068: 6069: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6070: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 6071: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 6072: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6073: //BCHG.L #<data>,Dr |-|012346|-|--U--|--*--|D |0000_100_001_000_rrr-{data} 6074: //BCHG.B #<data>,<ea> |-|012346|-|--U--|--*--| M+-WXZ |0000_100_001_mmm_rrr-{data} 6075: public static void irpBchgImm () throws M68kException { 6076: int ea = XEiJ.regOC & 63; 6077: int x; 6078: int y = mmuReadByteSignExword ((XEiJ.regPC += 2) - 1, XEiJ.regSRS); //pcbs 6079: if (ea < XEiJ.EA_AR) { //BCHG.L #<data>,Dr 6080: XEiJ.mpuCycleCount++; 6081: XEiJ.regRn[ea] = (x = XEiJ.regRn[ea]) ^ (y = 1 << y); //intのシフトは5bitでマスクされるので1<<(y&0x1f)の&0x1fを省略 6082: } else { //BCHG.B #<data>,<ea> 6083: XEiJ.mpuCycleCount++; 6084: int a = efaMltByte (ea); 6085: mmuWriteByteData (a, (x = mmuModifyByteSignData (a, XEiJ.regSRS)) ^ (y = 1 << (y & 7)), XEiJ.regSRS); 6086: } 6087: XEiJ.regCCR = XEiJ.regCCR & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_N | XEiJ.REG_CCR_V | XEiJ.REG_CCR_C) | (x & y) - 1 >>> 31 << 2; //ccr_btst 6088: } //irpBchgImm 6089: 6090: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6091: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 6092: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 6093: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6094: //BCLR.L #<data>,Dr |-|012346|-|--U--|--*--|D |0000_100_010_000_rrr-{data} 6095: //BCLR.B #<data>,<ea> |-|012346|-|--U--|--*--| M+-WXZ |0000_100_010_mmm_rrr-{data} 6096: public static void irpBclrImm () throws M68kException { 6097: int ea = XEiJ.regOC & 63; 6098: int x; 6099: int y = mmuReadByteSignExword ((XEiJ.regPC += 2) - 1, XEiJ.regSRS); //pcbs 6100: if (ea < XEiJ.EA_AR) { //BCLR.L #<data>,Dr 6101: XEiJ.mpuCycleCount++; 6102: XEiJ.regRn[ea] = (x = XEiJ.regRn[ea]) & ~(y = 1 << y); //intのシフトは5bitでマスクされるので1<<(y&0x1f)の&0x1fを省略 6103: } else { //BCLR.B #<data>,<ea> 6104: XEiJ.mpuCycleCount++; 6105: int a = efaMltByte (ea); 6106: mmuWriteByteData (a, (x = mmuModifyByteSignData (a, XEiJ.regSRS)) & ~(y = 1 << (y & 7)), XEiJ.regSRS); 6107: } 6108: XEiJ.regCCR = XEiJ.regCCR & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_N | XEiJ.REG_CCR_V | XEiJ.REG_CCR_C) | (x & y) - 1 >>> 31 << 2; //ccr_btst 6109: } //irpBclrImm 6110: 6111: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6112: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 6113: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 6114: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6115: //BSET.L #<data>,Dr |-|012346|-|--U--|--*--|D |0000_100_011_000_rrr-{data} 6116: //BSET.B #<data>,<ea> |-|012346|-|--U--|--*--| M+-WXZ |0000_100_011_mmm_rrr-{data} 6117: public static void irpBsetImm () throws M68kException { 6118: int ea = XEiJ.regOC & 63; 6119: int x; 6120: int y = mmuReadByteSignExword ((XEiJ.regPC += 2) - 1, XEiJ.regSRS); //pcbs 6121: if (ea < XEiJ.EA_AR) { //BSET.L #<data>,Dr 6122: XEiJ.mpuCycleCount++; 6123: XEiJ.regRn[ea] = (x = XEiJ.regRn[ea]) | (y = 1 << y); //intのシフトは5bitでマスクされるので1<<(y&0x1f)の&0x1fを省略 6124: } else { //BSET.B #<data>,<ea> 6125: XEiJ.mpuCycleCount++; 6126: int a = efaMltByte (ea); 6127: mmuWriteByteData (a, (x = mmuModifyByteSignData (a, XEiJ.regSRS)) | (y = 1 << (y & 7)), XEiJ.regSRS); 6128: } 6129: XEiJ.regCCR = XEiJ.regCCR & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_N | XEiJ.REG_CCR_V | XEiJ.REG_CCR_C) | (x & y) - 1 >>> 31 << 2; //ccr_btst 6130: } //irpBsetImm 6131: 6132: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6133: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 6134: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 6135: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6136: //EORI.B #<data>,<ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |0000_101_000_mmm_rrr-{data} 6137: //EOR.B #<data>,<ea> |A|012346|-|-UUUU|-**00|D M+-WXZ |0000_101_000_mmm_rrr-{data} [EORI.B #<data>,<ea>] 6138: //EORI.B #<data>,CCR |-|012346|-|*****|*****| |0000_101_000_111_100-{data} 6139: public static void irpEoriByte () throws M68kException { 6140: int ea = XEiJ.regOC & 63; 6141: int z = mmuReadByteSignExword ((XEiJ.regPC += 2) - 1, XEiJ.regSRS); //pcbs 6142: if (ea < XEiJ.EA_AR) { //EORI.B #<data>,Dr 6143: XEiJ.mpuCycleCount++; 6144: z = XEiJ.regRn[ea] ^= 255 & z; //0拡張してからEOR 6145: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & z]; //ccr_tst_byte 6146: } else if (ea == XEiJ.EA_IM) { //EORI.B #<data>,CCR 6147: XEiJ.mpuCycleCount++; 6148: XEiJ.regCCR ^= XEiJ.REG_CCR_MASK & z; 6149: } else { //EORI.B #<data>,<mem> 6150: XEiJ.mpuCycleCount++; 6151: int a = efaMltByte (ea); 6152: mmuWriteByteData (a, z ^= mmuModifyByteSignData (a, XEiJ.regSRS), XEiJ.regSRS); 6153: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & z]; //ccr_tst_byte 6154: } 6155: } //irpEoriByte 6156: 6157: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6158: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 6159: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 6160: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6161: //EORI.W #<data>,<ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |0000_101_001_mmm_rrr-{data} 6162: //EOR.W #<data>,<ea> |A|012346|-|-UUUU|-**00|D M+-WXZ |0000_101_001_mmm_rrr-{data} [EORI.W #<data>,<ea>] 6163: //EORI.W #<data>,SR |-|012346|P|*****|*****| |0000_101_001_111_100-{data} 6164: public static void irpEoriWord () throws M68kException { 6165: int ea = XEiJ.regOC & 63; 6166: if (ea < XEiJ.EA_AR) { //EORI.W #<data>,Dr 6167: int z = mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); //pcws 6168: XEiJ.mpuCycleCount++; 6169: z = XEiJ.regRn[ea] ^= (char) z; //0拡張してからEOR 6170: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (char) z - 1 >> 31 & XEiJ.REG_CCR_Z | ((short) z < 0 ? XEiJ.REG_CCR_N : 0); //ccr_tst_word 6171: } else if (ea == XEiJ.EA_IM) { //EORI.W #<data>,SR 6172: if (XEiJ.regSRS == 0) { //ユーザモードのとき 6173: M68kException.m6eNumber = M68kException.M6E_PRIVILEGE_VIOLATION; 6174: throw M68kException.m6eSignal; 6175: } 6176: //以下はスーパーバイザモード 6177: XEiJ.mpuCycleCount += 12; 6178: irpSetSR ((XEiJ.regSRT1 | XEiJ.regSRS | XEiJ.regSRM | XEiJ.regSRI | XEiJ.regCCR) ^ mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, 1)); //pcws。特権違反チェックが先 6179: } else { //EORI.W #<data>,<mem> 6180: int z = mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); //pcws 6181: XEiJ.mpuCycleCount++; 6182: int a = efaMltWord (ea); 6183: mmuWriteWordData (a, z ^= mmuModifyWordSignData (a, XEiJ.regSRS), XEiJ.regSRS); 6184: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (char) z - 1 >> 31 & XEiJ.REG_CCR_Z | ((short) z < 0 ? XEiJ.REG_CCR_N : 0); //ccr_tst_word 6185: } 6186: } //irpEoriWord 6187: 6188: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6189: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 6190: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 6191: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6192: //EORI.L #<data>,<ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |0000_101_010_mmm_rrr-{data} 6193: //EOR.L #<data>,<ea> |A|012346|-|-UUUU|-**00|D M+-WXZ |0000_101_010_mmm_rrr-{data} [EORI.L #<data>,<ea>] 6194: public static void irpEoriLong () throws M68kException { 6195: int ea = XEiJ.regOC & 63; 6196: int y = mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS); //pcls 6197: int z; 6198: if (ea < XEiJ.EA_AR) { //EORI.L #<data>,Dr 6199: XEiJ.mpuCycleCount++; 6200: z = XEiJ.regRn[ea] ^= y; 6201: } else { //EORI.L #<data>,<mem> 6202: XEiJ.mpuCycleCount++; 6203: int a = efaMltLong (ea); 6204: mmuWriteLongData (a, z = mmuModifyLongData (a, XEiJ.regSRS) ^ y, XEiJ.regSRS); 6205: } 6206: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 6207: } //irpEoriLong 6208: 6209: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6210: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 6211: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 6212: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6213: //CAS.B Dc,Du,<ea> |-|--2346|-|-UUUU|-****| M+-WXZ |0000_101_011_mmm_rrr-0000000uuu000ccc 6214: public static void irpCasByte () throws M68kException { 6215: int w = mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); //pcwz。拡張ワード 6216: if ((w & ~0b0000_000_111_000_111) != 0) { 6217: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 6218: throw M68kException.m6eSignal; 6219: } 6220: int c = w & 7; 6221: int y = (byte) XEiJ.regRn[c]; //y=Dc 6222: int a = efaMltByte (XEiJ.regOC & 63); 6223: int x = mmuReadByteSignData (a, XEiJ.regSRS); //x=<ea> 6224: int z = (byte) (x - y); //z=<ea>-Dc 6225: XEiJ.regCCR = (XEiJ.regCCR & XEiJ.REG_CCR_X | 6226: (z < 0 ? XEiJ.REG_CCR_N : 0) | 6227: (z == 0 ? XEiJ.REG_CCR_Z : 0) | 6228: ((x ^ y) & (x ^ z)) >>> 31 << 1 | 6229: (x & (y ^ z) ^ (y | z)) >>> 31); //ccr_cmp 6230: if (z == 0) { //<ea>==Dc 6231: XEiJ.mpuCycleCount += 19; 6232: mmuWriteByteData (a, XEiJ.regRn[w >> 6], XEiJ.regSRS); //Du→<ea> 6233: } else { //<ea>!=Dc 6234: XEiJ.mpuCycleCount += 19; 6235: XEiJ.regRn[c] = ~0xff & XEiJ.regRn[c] | 0xff & x; //<ea>→Dc 6236: } 6237: } //irpCasByte 6238: 6239: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6240: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 6241: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 6242: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6243: //CMPI.B #<data>,<ea> |-|--2346|-|-UUUU|-****|D M+-WXZP |0000_110_000_mmm_rrr-{data} 6244: //CMP.B #<data>,<ea> |A|--2346|-|-UUUU|-****| M+-WXZP |0000_110_000_mmm_rrr-{data} [CMPI.B #<data>,<ea>] 6245: public static void irpCmpiByte () throws M68kException { 6246: XEiJ.mpuCycleCount++; 6247: int ea = XEiJ.regOC & 63; 6248: int x; 6249: int y = mmuReadByteSignExword ((XEiJ.regPC += 2) - 1, XEiJ.regSRS); //pcbs 6250: int z = (byte) ((x = ea < XEiJ.EA_AR ? (byte) XEiJ.regRn[ea] : mmuReadByteSignData (efaMemByte (ea), XEiJ.regSRS)) - y); //アドレッシングモードに注意 6251: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | 6252: ((x ^ y) & (x ^ z)) >>> 31 << 1 | 6253: (x & (y ^ z) ^ (y | z)) >>> 31); //ccr_cmp 6254: } //irpCmpiByte 6255: 6256: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6257: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 6258: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 6259: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6260: //CMPI.W #<data>,<ea> |-|--2346|-|-UUUU|-****|D M+-WXZP |0000_110_001_mmm_rrr-{data} 6261: //CMP.W #<data>,<ea> |A|--2346|-|-UUUU|-****| M+-WXZP |0000_110_001_mmm_rrr-{data} [CMPI.W #<data>,<ea>] 6262: public static void irpCmpiWord () throws M68kException { 6263: XEiJ.mpuCycleCount++; 6264: int ea = XEiJ.regOC & 63; 6265: int x; 6266: int y = mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); //pcws 6267: int z = (short) ((x = ea < XEiJ.EA_AR ? (short) XEiJ.regRn[ea] : mmuReadWordSignData (efaMemWord (ea), XEiJ.regSRS)) - y); //アドレッシングモードに注意 6268: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | 6269: ((x ^ y) & (x ^ z)) >>> 31 << 1 | 6270: (x & (y ^ z) ^ (y | z)) >>> 31); //ccr_cmp 6271: } //irpCmpiWord 6272: 6273: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6274: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 6275: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 6276: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6277: //CMPI.L #<data>,<ea> |-|--2346|-|-UUUU|-****|D M+-WXZP |0000_110_010_mmm_rrr-{data} 6278: //CMP.L #<data>,<ea> |A|--2346|-|-UUUU|-****| M+-WXZP |0000_110_010_mmm_rrr-{data} [CMPI.L #<data>,<ea>] 6279: public static void irpCmpiLong () throws M68kException { 6280: int ea = XEiJ.regOC & 63; 6281: int x; 6282: int y = mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS); //pcls 6283: int z; 6284: if (ea < XEiJ.EA_AR) { //CMPI.L #<data>,Dr 6285: XEiJ.mpuCycleCount++; 6286: z = (x = XEiJ.regRn[ea]) - y; 6287: } else { //CMPI.L #<data>,<mem> 6288: XEiJ.mpuCycleCount++; 6289: z = (x = mmuReadLongData (efaMemLong (ea), XEiJ.regSRS)) - y; //アドレッシングモードに注意 6290: } 6291: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | 6292: ((x ^ y) & (x ^ z)) >>> 31 << 1 | 6293: (x & (y ^ z) ^ (y | z)) >>> 31); //ccr_cmp 6294: } //irpCmpiLong 6295: 6296: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6297: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 6298: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 6299: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6300: //CAS.W Dc,Du,<ea> |-|--2346|-|-UUUU|-****| M+-WXZ |0000_110_011_mmm_rrr-0000000uuu000ccc (68060 software emulate misaligned <ea>) 6301: //CAS2.W Dc1:Dc2,Du1:Du2,(Rn1):(Rn2) |-|--234S|-|-UUUU|-****| |0000_110_011_111_100-rnnn000uuu000ccc(1)-rnnn_000_uuu_000_ccc(2) 6302: public static void irpCasWord () throws M68kException { 6303: int ea = XEiJ.regOC & 63; 6304: if (ea == XEiJ.EA_IM) { //CAS2.W Dc1:Dc2,Du1:Du2,(Rn1):(Rn2) 6305: M68kException.m6eNumber = M68kException.M6E_UNIMPLEMENTED_INSTRUCTION; 6306: throw M68kException.m6eSignal; 6307: } else { //CAS.W Dc,Du,<ea> 6308: int w = mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); //pcwz 6309: if ((w & ~0b0000_000_111_000_111) != 0) { 6310: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 6311: throw M68kException.m6eSignal; 6312: } 6313: int a = efaMltWord (ea); //a=ea 6314: if ((a & 1) != 0) { //misaligned <ea> 6315: M68kException.m6eNumber = M68kException.M6E_UNIMPLEMENTED_INSTRUCTION; 6316: throw M68kException.m6eSignal; 6317: } 6318: int c = w & 7; 6319: int y = (short) XEiJ.regRn[c]; //y=Dc 6320: int x = mmuReadWordSignData (a, XEiJ.regSRS); //x=<ea> 6321: int z = (short) (x - y); //z=<ea>-Dc 6322: XEiJ.regCCR = (XEiJ.regCCR & XEiJ.REG_CCR_X | 6323: (z < 0 ? XEiJ.REG_CCR_N : 0) | 6324: (z == 0 ? XEiJ.REG_CCR_Z : 0) | 6325: ((x ^ y) & (x ^ z)) >>> 31 << 1 | 6326: (x & (y ^ z) ^ (y | z)) >>> 31); //ccr_cmp 6327: if (z == 0) { //<ea>==Dc 6328: XEiJ.mpuCycleCount += 19; 6329: mmuWriteWordData (a, XEiJ.regRn[w >> 6], XEiJ.regSRS); //Du→<ea> 6330: } else { //<ea>!=Dc 6331: XEiJ.mpuCycleCount += 19; 6332: XEiJ.regRn[c] = ~0xffff & XEiJ.regRn[c] | (char) x; //<ea>→Dc 6333: } 6334: } 6335: } //irpCasWord 6336: 6337: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6338: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 6339: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 6340: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6341: //MOVES.B <ea>,Rn |-|-12346|P|-----|-----| M+-WXZ |0000_111_000_mmm_rrr-rnnn000000000000 6342: //MOVES.B Rn,<ea> |-|-12346|P|-----|-----| M+-WXZ |0000_111_000_mmm_rrr-rnnn100000000000 6343: // 6344: //MOVES.B <ea>,Rn 6345: // MOVES.B <ea>,DnはDnの最下位バイトだけ更新する 6346: // MOVES.B <ea>,Anはバイトデータをロングに符号拡張してAnの全体を更新する 6347: // SFC=1,2,5,6はアドレス変換あり、SFC=0,3,4はアドレス変換なし、 6348: // SFC=7はCPU空間なのでコプロセッサが割り当てられている領域以外はバスエラーになる 6349: // 6350: //MOVES.B Rn,<ea> 6351: // DFC=1,2,5,6はアドレス変換あり、DFC=0,3,4はアドレス変換なし、 6352: // DFC=7はCPU空間なのでコプロセッサが割り当てられている領域以外はバスエラーになる 6353: public static void irpMovesByte () throws M68kException { 6354: int w = mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); //pcwz 6355: if (w << -11 != 0) { 6356: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 6357: throw M68kException.m6eSignal; 6358: } 6359: if (XEiJ.regSRS == 0) { //ユーザモードのとき 6360: M68kException.m6eNumber = M68kException.M6E_PRIVILEGE_VIOLATION; 6361: throw M68kException.m6eSignal; 6362: } 6363: //以下はスーパーバイザモード 6364: XEiJ.mpuCycleCount++; 6365: int a = efaMltByte (XEiJ.regOC & 63); 6366: int n = w >>> 12; //n 6367: if (w << 31 - 11 >= 0) { //MOVES.B <ea>,Rn。リード 6368: boolean supervisor = (0b10011111 << 24 << XEiJ.mpuSFC) < 0; 6369: boolean instruction = (0b00101010 << 24 << XEiJ.mpuSFC) < 0; 6370: MemoryMappedDevice[] mm = (DataBreakPoint.DBP_ON ? 6371: supervisor ? DataBreakPoint.dbpSuperMap : DataBreakPoint.dbpUserMap : 6372: supervisor ? XEiJ.busSuperMap : XEiJ.busUserMap); 6373: int z; 6374: // 01234567 6375: if (0b01100110 << 24 << XEiJ.mpuSFC < 0) { //SFC=1,2,5,6。アドレス変換あり 6376: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_READ | M60_FSLW_SIZE_BYTE | XEiJ.mpuSFC << 16; 6377: int pa = (supervisor ? 6378: instruction ? mmuTranslateReadSuperCode (a) : mmuTranslateReadSuperData (a) : 6379: instruction ? mmuTranslateReadUserCode (a) : mmuTranslateReadUserData (a)); 6380: //z = XEiJ.busRbz (pa); 6381: z = mm[pa >>> XEiJ.BUS_PAGE_BITS].mmdRbz (pa); 6382: } else if (XEiJ.mpuSFC != 7) { //SFC=0,3,4。アドレス変換なし 6383: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_READ | M60_FSLW_SIZE_BYTE | XEiJ.mpuSFC << 16; 6384: //z = XEiJ.busRbz (a); 6385: z = mm[a >>> XEiJ.BUS_PAGE_BITS].mmdRbz (a); 6386: } else { //SFC=7。CPU空間 6387: if (0x00022000 <= a && a <= 0x0002201f) { //コプロセッサID=1 6388: z = XEiJ.fpuMotherboardCoprocessor.cirReadByteZero (a); 6389: } else { 6390: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_READ | M60_FSLW_SIZE_BYTE | XEiJ.mpuSFC << 16 | M60_FSLW_BUS_ERROR_ON_READ; 6391: M68kException.m6eNumber = M68kException.M6E_ACCESS_FAULT; 6392: M68kException.m6eAddress = a; 6393: M68kException.m6eDirection = XEiJ.MPU_WR_READ; 6394: M68kException.m6eSize = XEiJ.MPU_SS_BYTE; 6395: throw M68kException.m6eSignal; 6396: } 6397: } 6398: if (n < 8) { //MOVES.B <ea>,Dn 6399: XEiJ.regRn[n] = XEiJ.regRn[n] & ~255 | z; 6400: } else { //MOVES.B <ea>,An 6401: XEiJ.regRn[n] = (byte) z; 6402: } 6403: if (MMU_DEBUG_COMMAND) { 6404: System.out.printf ("%08x movesReadByte(%d,0x%08x)=0x%02x\n", XEiJ.regPC0, XEiJ.mpuSFC, a, XEiJ.regRn[n] & 255); 6405: } 6406: } else { //MOVES.B Rn,<ea>。ライト 6407: if (MMU_DEBUG_COMMAND) { 6408: System.out.printf ("%08x movesWriteByte(%d,0x%08x,0x%02x)\n", XEiJ.regPC0, XEiJ.mpuDFC, a, XEiJ.regRn[n] & 255); 6409: } 6410: boolean supervisor = (0b10011111 << 24 << XEiJ.mpuDFC) < 0; 6411: boolean instruction = (0b00101010 << 24 << XEiJ.mpuDFC) < 0; 6412: MemoryMappedDevice mm[] = (DataBreakPoint.DBP_ON ? 6413: supervisor ? DataBreakPoint.dbpSuperMap : DataBreakPoint.dbpUserMap : 6414: supervisor ? XEiJ.busSuperMap : XEiJ.busUserMap); 6415: int z = XEiJ.regRn[n]; 6416: // 01234567 6417: if (0b01100110 << 24 << XEiJ.mpuDFC < 0) { //DFC=1,2,5,6。アドレス変換あり 6418: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_BYTE | XEiJ.mpuDFC << 16; 6419: int pa = (supervisor ? 6420: instruction ? mmuTranslateWriteSuperCode (a) : mmuTranslateWriteSuperData (a) : 6421: instruction ? mmuTranslateWriteUserCode (a) : mmuTranslateWriteUserData (a)); 6422: //XEiJ.busWb (pa, z); 6423: mm[pa >>> XEiJ.BUS_PAGE_BITS].mmdWb (pa, z); 6424: } else if (XEiJ.mpuDFC != 7) { //DFC=0,3,4。アドレス変換なし 6425: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_BYTE | XEiJ.mpuDFC << 16; 6426: //XEiJ.busWb (a, z); 6427: mm[a >>> XEiJ.BUS_PAGE_BITS].mmdWb (a, z); 6428: } else { //DFC=7。CPU空間 6429: if (0x00022000 <= a && a <= 0x0002201f) { //コプロセッサID=1 6430: XEiJ.fpuMotherboardCoprocessor.cirWriteByte (a, z); 6431: } else { 6432: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_BYTE | XEiJ.mpuDFC << 16 | M60_FSLW_BUS_ERROR_ON_WRITE; 6433: M68kException.m6eNumber = M68kException.M6E_ACCESS_FAULT; 6434: M68kException.m6eAddress = a; 6435: M68kException.m6eDirection = XEiJ.MPU_WR_WRITE; 6436: M68kException.m6eSize = XEiJ.MPU_SS_BYTE; 6437: throw M68kException.m6eSignal; 6438: } 6439: } 6440: } 6441: } //irpMovesByte 6442: 6443: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6444: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 6445: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 6446: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6447: //MOVES.W <ea>,Rn |-|-12346|P|-----|-----| M+-WXZ |0000_111_001_mmm_rrr-rnnn000000000000 6448: //MOVES.W Rn,<ea> |-|-12346|P|-----|-----| M+-WXZ |0000_111_001_mmm_rrr-rnnn100000000000 6449: // 6450: //MOVES.W <ea>,Rn 6451: // MOVES.W <ea>,DnはDnの下位ワードだけ更新する 6452: // MOVES.W <ea>,Anはワードデータをロングに符号拡張してAnの全体を更新する 6453: // SFC=1,2,5,6はアドレス変換あり、SFC=0,3,4はアドレス変換なし、 6454: // SFC=7はCPU空間なのでコプロセッサが割り当てられている領域以外はバスエラーになる 6455: // 6456: //MOVES.W Rn,<ea> 6457: // DFC=1,2,5,6はアドレス変換あり、DFC=0,3,4はアドレス変換なし、 6458: // DFC=7はCPU空間なのでコプロセッサが割り当てられている領域以外はバスエラーになる 6459: public static void irpMovesWord () throws M68kException { 6460: int w = mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); //pcwz 6461: if (w << -11 != 0) { 6462: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 6463: throw M68kException.m6eSignal; 6464: } 6465: if (XEiJ.regSRS == 0) { //ユーザモードのとき 6466: M68kException.m6eNumber = M68kException.M6E_PRIVILEGE_VIOLATION; 6467: throw M68kException.m6eSignal; 6468: } 6469: //以下はスーパーバイザモード 6470: XEiJ.mpuCycleCount++; 6471: int a = efaMltWord (XEiJ.regOC & 63); 6472: int n = w >>> 12; //n 6473: if (w << 31 - 11 >= 0) { //MOVES.W <ea>,Rn。リード 6474: boolean supervisor = (0b10011111 << 24 << XEiJ.mpuSFC) < 0; 6475: boolean instruction = (0b00101010 << 24 << XEiJ.mpuSFC) < 0; 6476: MemoryMappedDevice[] mm = (DataBreakPoint.DBP_ON ? 6477: supervisor ? DataBreakPoint.dbpSuperMap : DataBreakPoint.dbpUserMap : 6478: supervisor ? XEiJ.busSuperMap : XEiJ.busUserMap); 6479: int z; 6480: // 01234567 6481: if (0b01100110 << 24 << XEiJ.mpuSFC < 0) { //SFC=1,2,5,6。アドレス変換あり 6482: if ((a & 1) == 0) { //偶数 6483: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_READ | M60_FSLW_SIZE_WORD | XEiJ.mpuSFC << 16; 6484: int pa = (supervisor ? 6485: instruction ? mmuTranslateReadSuperCode (a) : mmuTranslateReadSuperData (a) : 6486: instruction ? mmuTranslateReadUserCode (a) : mmuTranslateReadUserData (a)); 6487: //z = XEiJ.busRwze (pa); 6488: z = mm[pa >>> XEiJ.BUS_PAGE_BITS].mmdRwz (pa); 6489: } else { //奇数 6490: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_READ | M60_FSLW_SIZE_WORD | XEiJ.mpuSFC << 16; 6491: int pa = (supervisor ? 6492: instruction ? mmuTranslateReadSuperCode (a) : mmuTranslateReadSuperData (a) : 6493: instruction ? mmuTranslateReadUserCode (a) : mmuTranslateReadUserData (a)); 6494: //z = XEiJ.busRbz (pa) << 8; 6495: z = mm[pa >>> XEiJ.BUS_PAGE_BITS].mmdRbz (pa) << 8; 6496: m60FSLW ^= M60_FSLW_IOMA_FIRST ^ M60_FSLW_IOMA_SECOND; 6497: pa = (supervisor ? 6498: instruction ? mmuTranslateReadSuperCode (a + 1) : mmuTranslateReadSuperData (a + 1) : 6499: instruction ? mmuTranslateReadUserCode (a + 1) : mmuTranslateReadUserData (a + 1)); 6500: //z |= XEiJ.busRbz (pa); 6501: z |= mm[pa >>> XEiJ.BUS_PAGE_BITS].mmdRbz (pa); 6502: } 6503: } else if (XEiJ.mpuSFC != 7) { //SFC=0,3,4。アドレス変換なし 6504: if ((a & 1) == 0) { //偶数 6505: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_READ | M60_FSLW_SIZE_WORD | XEiJ.mpuSFC << 16; 6506: //z = XEiJ.busRwze (a); 6507: z = mm[a >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a); 6508: } else { //奇数 6509: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_READ | M60_FSLW_SIZE_WORD | XEiJ.mpuSFC << 16; 6510: //z = XEiJ.busRbz (a) << 8; 6511: z = mm[a >>> XEiJ.BUS_PAGE_BITS].mmdRbz (a) << 8; 6512: m60FSLW ^= M60_FSLW_IOMA_FIRST ^ M60_FSLW_IOMA_SECOND; 6513: a++; 6514: //z |= XEiJ.busRbz (a); 6515: z |= mm[a >>> XEiJ.BUS_PAGE_BITS].mmdRbz (a); 6516: } 6517: } else { //SFC=7。CPU空間 6518: if (0x00022000 <= a && a <= 0x0002201f) { //コプロセッサID=1 6519: z = XEiJ.fpuMotherboardCoprocessor.cirReadWordZero (a); 6520: } else { 6521: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_READ | M60_FSLW_SIZE_WORD | XEiJ.mpuSFC << 16 | M60_FSLW_BUS_ERROR_ON_READ; 6522: M68kException.m6eNumber = M68kException.M6E_ACCESS_FAULT; 6523: M68kException.m6eAddress = a; 6524: M68kException.m6eDirection = XEiJ.MPU_WR_READ; 6525: M68kException.m6eSize = XEiJ.MPU_SS_WORD; 6526: throw M68kException.m6eSignal; 6527: } 6528: } 6529: if (n < 8) { //MOVES.W <ea>,Dn 6530: XEiJ.regRn[n] = XEiJ.regRn[n] & ~65535 | z; 6531: } else { //MOVES.W <ea>,An 6532: XEiJ.regRn[n] = (short) z; 6533: } 6534: if (MMU_DEBUG_COMMAND) { 6535: System.out.printf ("%08x movesReadWord(%d,0x%08x)=0x%04x\n", XEiJ.regPC0, XEiJ.mpuSFC, a, XEiJ.regRn[n] & 65535); 6536: } 6537: } else { //MOVES.W Rn,<ea>。ライト 6538: if (MMU_DEBUG_COMMAND) { 6539: System.out.printf ("%08x movesWriteWord(%d,0x%08x,0x%04x)\n", XEiJ.regPC0, XEiJ.mpuDFC, a, XEiJ.regRn[n] & 65535); 6540: } 6541: boolean supervisor = (0b10011111 << 24 << XEiJ.mpuDFC) < 0; 6542: boolean instruction = (0b00101010 << 24 << XEiJ.mpuDFC) < 0; 6543: MemoryMappedDevice[] mm = (DataBreakPoint.DBP_ON ? 6544: supervisor ? DataBreakPoint.dbpSuperMap : DataBreakPoint.dbpUserMap : 6545: supervisor ? XEiJ.busSuperMap : XEiJ.busUserMap); 6546: int z = XEiJ.regRn[n]; 6547: // 01234567 6548: if (0b01100110 << 24 << XEiJ.mpuDFC < 0) { //DFC=1,2,5,6。アドレス変換あり 6549: if ((a & 1) == 0) { //偶数 6550: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_WORD | XEiJ.mpuDFC << 16; 6551: int pa = (supervisor ? 6552: instruction ? mmuTranslateWriteSuperCode (a) : mmuTranslateWriteSuperData (a) : 6553: instruction ? mmuTranslateWriteUserCode (a) : mmuTranslateWriteUserData (a)); 6554: //XEiJ.busWwe (pa, z); 6555: mm[pa >>> XEiJ.BUS_PAGE_BITS].mmdWw (pa, z); 6556: } else { //奇数 6557: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_WORD | XEiJ.mpuDFC << 16; 6558: int pa = (supervisor ? 6559: instruction ? mmuTranslateWriteSuperCode (a) : mmuTranslateWriteSuperData (a) : 6560: instruction ? mmuTranslateWriteUserCode (a) : mmuTranslateWriteUserData (a)); 6561: //XEiJ.busWb (pa, z >> 8); 6562: mm[pa >>> XEiJ.BUS_PAGE_BITS].mmdWb (pa, z >> 8); 6563: m60FSLW ^= M60_FSLW_IOMA_FIRST ^ M60_FSLW_IOMA_SECOND; 6564: pa = (supervisor ? 6565: instruction ? mmuTranslateWriteSuperCode (a + 1) : mmuTranslateWriteSuperData (a + 1) : 6566: instruction ? mmuTranslateWriteUserCode (a + 1) : mmuTranslateWriteUserData (a + 1)); 6567: //XEiJ.busWb (pa, z); 6568: mm[pa >>> XEiJ.BUS_PAGE_BITS].mmdWb (pa, z); 6569: } 6570: } else if (XEiJ.mpuDFC != 7) { //DFC=0,3,4。アドレス変換なし 6571: if ((a & 1) == 0) { //偶数 6572: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_WORD | XEiJ.mpuDFC << 16; 6573: //XEiJ.busWwe (a, z); 6574: mm[a >>> XEiJ.BUS_PAGE_BITS].mmdWw (a, z); 6575: } else { //奇数 6576: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_WORD | XEiJ.mpuDFC << 16; 6577: //XEiJ.busWb (a, z >> 8); 6578: mm[a >>> XEiJ.BUS_PAGE_BITS].mmdWb (a, z >> 8); 6579: m60FSLW ^= M60_FSLW_IOMA_FIRST ^ M60_FSLW_IOMA_SECOND; 6580: a++; 6581: //XEiJ.busWb (a, z); 6582: mm[a >>> XEiJ.BUS_PAGE_BITS].mmdWb (a, z); 6583: } 6584: } else { //DFC=7。CPU空間 6585: if (0x00022000 <= a && a <= 0x0002201f) { //コプロセッサID=1 6586: XEiJ.fpuMotherboardCoprocessor.cirWriteWord (a, z); 6587: } else { 6588: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_WORD | XEiJ.mpuDFC << 16 | M60_FSLW_BUS_ERROR_ON_WRITE; 6589: M68kException.m6eNumber = M68kException.M6E_ACCESS_FAULT; 6590: M68kException.m6eAddress = a; 6591: M68kException.m6eDirection = XEiJ.MPU_WR_WRITE; 6592: M68kException.m6eSize = XEiJ.MPU_SS_WORD; 6593: throw M68kException.m6eSignal; 6594: } 6595: } 6596: } 6597: } //irpMovesWord 6598: 6599: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6600: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 6601: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 6602: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6603: //MOVES.L <ea>,Rn |-|-12346|P|-----|-----| M+-WXZ |0000_111_010_mmm_rrr-rnnn000000000000 6604: //MOVES.L Rn,<ea> |-|-12346|P|-----|-----| M+-WXZ |0000_111_010_mmm_rrr-rnnn100000000000 6605: // 6606: //MOVES.L <ea>,Rn 6607: // SFC=1,2,5,6はアドレス変換あり、SFC=0,3,4はアドレス変換なし、 6608: // SFC=7はCPU空間なのでコプロセッサが割り当てられている領域以外はバスエラーになる 6609: // 6610: //MOVES.L Rn,<ea> 6611: // DFC=1,2,5,6はアドレス変換あり、DFC=0,3,4はアドレス変換なし、 6612: // DFC=7はCPU空間なのでコプロセッサが割り当てられている領域以外はバスエラーになる 6613: public static void irpMovesLong () throws M68kException { 6614: int w = mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); //pcwz 6615: if (w << -11 != 0) { 6616: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 6617: throw M68kException.m6eSignal; 6618: } 6619: if (XEiJ.regSRS == 0) { //ユーザモードのとき 6620: M68kException.m6eNumber = M68kException.M6E_PRIVILEGE_VIOLATION; 6621: throw M68kException.m6eSignal; 6622: } 6623: //以下はスーパーバイザモード 6624: XEiJ.mpuCycleCount++; 6625: int a = efaMltLong (XEiJ.regOC & 63); 6626: int n = w >>> 12; //n 6627: if (w << 31 - 11 >= 0) { //MOVES.L <ea>,Rn。リード 6628: boolean supervisor = (0b10011111 << 24 << XEiJ.mpuSFC) < 0; 6629: boolean instruction = (0b00101010 << 24 << XEiJ.mpuSFC) < 0; 6630: MemoryMappedDevice[] mm = (DataBreakPoint.DBP_ON ? 6631: supervisor ? DataBreakPoint.dbpSuperMap : DataBreakPoint.dbpUserMap : 6632: supervisor ? XEiJ.busSuperMap : XEiJ.busUserMap); 6633: int z; 6634: // 01234567 6635: if (0b01100110 << 24 << XEiJ.mpuSFC < 0) { //SFC=1,2,5,6。アドレス変換あり 6636: if ((a & 3) == 0) { //4の倍数 6637: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_READ | M60_FSLW_SIZE_LONG | XEiJ.mpuSFC << 16; 6638: int pa = (supervisor ? 6639: instruction ? mmuTranslateReadSuperCode (a) : mmuTranslateReadSuperData (a) : 6640: instruction ? mmuTranslateReadUserCode (a) : mmuTranslateReadUserData (a)); 6641: //z = XEiJ.busRlsf (pa); 6642: z = mm[pa >>> XEiJ.BUS_PAGE_BITS].mmdRls (pa); 6643: } else if ((a & 1) == 0) { //4の倍数+2 6644: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_READ | M60_FSLW_SIZE_LONG | XEiJ.mpuSFC << 16; 6645: int pa = (supervisor ? 6646: instruction ? mmuTranslateReadSuperCode (a) : mmuTranslateReadSuperData (a) : 6647: instruction ? mmuTranslateReadUserCode (a) : mmuTranslateReadUserData (a)); 6648: //z = XEiJ.busRwse (pa) << 16; 6649: z = mm[pa >>> XEiJ.BUS_PAGE_BITS].mmdRws (pa) << 16; 6650: m60FSLW ^= M60_FSLW_IOMA_FIRST ^ M60_FSLW_IOMA_SECOND; 6651: pa = (supervisor ? 6652: instruction ? mmuTranslateReadSuperCode (a + 2) : mmuTranslateReadSuperData (a + 2) : 6653: instruction ? mmuTranslateReadUserCode (a + 2) : mmuTranslateReadUserData (a + 2)); 6654: //z |= XEiJ.busRwze (pa); 6655: z |= mm[pa >>> XEiJ.BUS_PAGE_BITS].mmdRwz (pa); 6656: } else { //奇数 6657: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_READ | M60_FSLW_SIZE_LONG | XEiJ.mpuSFC << 16; 6658: int pa = (supervisor ? 6659: instruction ? mmuTranslateReadSuperCode (a) : mmuTranslateReadSuperData (a) : 6660: instruction ? mmuTranslateReadUserCode (a) : mmuTranslateReadUserData (a)); 6661: //z = XEiJ.busRbs (pa) << 24; 6662: z = mm[pa >>> XEiJ.BUS_PAGE_BITS].mmdRbs (pa) << 24; 6663: m60FSLW ^= M60_FSLW_IOMA_FIRST ^ M60_FSLW_IOMA_SECOND; 6664: pa = (supervisor ? 6665: instruction ? mmuTranslateReadSuperCode (a + 1) : mmuTranslateReadSuperData (a + 1) : 6666: instruction ? mmuTranslateReadUserCode (a + 1) : mmuTranslateReadUserData (a + 1)); 6667: //z |= XEiJ.busRwze (pa) << 8; 6668: z |= mm[pa >>> XEiJ.BUS_PAGE_BITS].mmdRwz (pa) << 8; 6669: pa = (supervisor ? 6670: instruction ? mmuTranslateReadSuperCode (a + 3) : mmuTranslateReadSuperData (a + 3) : 6671: instruction ? mmuTranslateReadUserCode (a + 3) : mmuTranslateReadUserData (a + 3)); 6672: //z |= XEiJ.busRbz (pa); 6673: z |= mm[pa >>> XEiJ.BUS_PAGE_BITS].mmdRbz (pa); 6674: } 6675: } else if (XEiJ.mpuSFC != 7) { //SFC=0,3,4。アドレス変換なし 6676: if ((a & 3) == 0) { //4の倍数 6677: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_READ | M60_FSLW_SIZE_LONG | XEiJ.mpuSFC << 16; 6678: //z = XEiJ.busRlsf (a); 6679: z = mm[a >>> XEiJ.BUS_PAGE_BITS].mmdRls (a); 6680: } else if ((a & 1) == 0) { //4の倍数+2 6681: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_READ | M60_FSLW_SIZE_LONG | XEiJ.mpuSFC << 16; 6682: //z = XEiJ.busRwse (a) << 16; 6683: z = mm[a >>> XEiJ.BUS_PAGE_BITS].mmdRws (a) << 16; 6684: m60FSLW ^= M60_FSLW_IOMA_FIRST ^ M60_FSLW_IOMA_SECOND; 6685: a += 2; 6686: //z |= XEiJ.busRwze (a); 6687: z |= mm[a >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a); 6688: } else { //奇数 6689: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_READ | M60_FSLW_SIZE_LONG | XEiJ.mpuSFC << 16; 6690: //z = XEiJ.busRbs (a) << 24; 6691: z = mm[a >>> XEiJ.BUS_PAGE_BITS].mmdRbs (a) << 24; 6692: m60FSLW ^= M60_FSLW_IOMA_FIRST ^ M60_FSLW_IOMA_SECOND; 6693: a++; 6694: //z |= XEiJ.busRwze (a) << 8; 6695: z |= mm[a >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a) << 8; 6696: a += 2; 6697: //z |= XEiJ.busRbz (a); 6698: z |= mm[a >>> XEiJ.BUS_PAGE_BITS].mmdRbz (a); 6699: } 6700: } else { //SFC=7。CPU空間 6701: if (0x00022000 <= a && a <= 0x0002201f) { //コプロセッサID=1 6702: z = XEiJ.fpuMotherboardCoprocessor.cirReadLong (a); 6703: } else { 6704: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_READ | M60_FSLW_SIZE_LONG | XEiJ.mpuSFC << 16 | M60_FSLW_BUS_ERROR_ON_READ; 6705: M68kException.m6eNumber = M68kException.M6E_ACCESS_FAULT; 6706: M68kException.m6eAddress = a; 6707: M68kException.m6eDirection = XEiJ.MPU_WR_READ; 6708: M68kException.m6eSize = XEiJ.MPU_SS_LONG; 6709: throw M68kException.m6eSignal; 6710: } 6711: } 6712: XEiJ.regRn[n] = z; 6713: if (MMU_DEBUG_COMMAND) { 6714: System.out.printf ("%08x movesReadLong(%d,0x%08x)=0x%08x\n", XEiJ.regPC0, XEiJ.mpuSFC, a, XEiJ.regRn[n]); 6715: } 6716: } else { //MOVES.L Rn,<ea>。ライト 6717: if (MMU_DEBUG_COMMAND) { 6718: System.out.printf ("%08x movesWriteLong(%d,0x%08x,0x%08x)\n", XEiJ.regPC0, XEiJ.mpuDFC, a, XEiJ.regRn[n]); 6719: } 6720: boolean supervisor = (0b10011111 << 24 << XEiJ.mpuDFC) < 0; 6721: boolean instruction = (0b00101010 << 24 << XEiJ.mpuDFC) < 0; 6722: MemoryMappedDevice[] mm = (DataBreakPoint.DBP_ON ? 6723: supervisor ? DataBreakPoint.dbpSuperMap : DataBreakPoint.dbpUserMap : 6724: supervisor ? XEiJ.busSuperMap : XEiJ.busUserMap); 6725: int z = XEiJ.regRn[n]; 6726: // 01234567 6727: if (0b01100110 << 24 << XEiJ.mpuDFC < 0) { //DFC=1,2,5,6。アドレス変換あり 6728: if ((a & 3) == 0) { //4の倍数 6729: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_LONG | XEiJ.mpuDFC << 16; 6730: int pa = (supervisor ? 6731: instruction ? mmuTranslateWriteSuperCode (a) : mmuTranslateWriteSuperData (a) : 6732: instruction ? mmuTranslateWriteUserCode (a) : mmuTranslateWriteUserData (a)); 6733: //XEiJ.busWlf (pa, z); 6734: mm[pa >>> XEiJ.BUS_PAGE_BITS].mmdWl (pa, z); 6735: } else if ((a & 1) == 0) { //4の倍数+2 6736: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_LONG | XEiJ.mpuDFC << 16; 6737: int pa = (supervisor ? 6738: instruction ? mmuTranslateWriteSuperCode (a) : mmuTranslateWriteSuperData (a) : 6739: instruction ? mmuTranslateWriteUserCode (a) : mmuTranslateWriteUserData (a)); 6740: //XEiJ.busWwe (pa, z >> 16); 6741: mm[pa >>> XEiJ.BUS_PAGE_BITS].mmdWw (pa, z >> 16); 6742: m60FSLW ^= M60_FSLW_IOMA_FIRST ^ M60_FSLW_IOMA_SECOND; 6743: pa = (supervisor ? 6744: instruction ? mmuTranslateWriteSuperCode (a + 2) : mmuTranslateWriteSuperData (a + 2) : 6745: instruction ? mmuTranslateWriteUserCode (a + 2) : mmuTranslateWriteUserData (a + 2)); 6746: //XEiJ.busWwe (pa, z); 6747: mm[pa >>> XEiJ.BUS_PAGE_BITS].mmdWw (pa, z); 6748: } else { //奇数 6749: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_LONG | XEiJ.mpuDFC << 16; 6750: int pa = (supervisor ? 6751: instruction ? mmuTranslateWriteSuperCode (a) : mmuTranslateWriteSuperData (a) : 6752: instruction ? mmuTranslateWriteUserCode (a) : mmuTranslateWriteUserData (a)); 6753: //XEiJ.busWb (pa, z >> 24); 6754: mm[pa >>> XEiJ.BUS_PAGE_BITS].mmdWb (pa, z >> 24); 6755: m60FSLW ^= M60_FSLW_IOMA_FIRST ^ M60_FSLW_IOMA_SECOND; 6756: pa = (supervisor ? 6757: instruction ? mmuTranslateWriteSuperCode (a + 1) : mmuTranslateWriteSuperData (a + 1) : 6758: instruction ? mmuTranslateWriteUserCode (a + 1) : mmuTranslateWriteUserData (a + 1)); 6759: //XEiJ.busWwe (pa, z >> 8); 6760: mm[pa >>> XEiJ.BUS_PAGE_BITS].mmdWw (pa, z >> 8); 6761: pa = (supervisor ? 6762: instruction ? mmuTranslateWriteSuperCode (a + 3) : mmuTranslateWriteSuperData (a + 3) : 6763: instruction ? mmuTranslateWriteUserCode (a + 3) : mmuTranslateWriteUserData (a + 3)); 6764: //XEiJ.busWb (pa, z); 6765: mm[pa >>> XEiJ.BUS_PAGE_BITS].mmdWb (pa, z); 6766: } 6767: } else if (XEiJ.mpuDFC != 7) { //DFC=0,3,4。アドレス変換なし 6768: if ((a & 3) == 0) { //4の倍数 6769: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_LONG | XEiJ.mpuDFC << 16; 6770: //XEiJ.busWlf (a, z); 6771: mm[a >>> XEiJ.BUS_PAGE_BITS].mmdWl (a, z); 6772: } else if ((a & 1) == 0) { //4の倍数+2 6773: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_LONG | XEiJ.mpuDFC << 16; 6774: //XEiJ.busWwe (a, z >> 16); 6775: mm[a >>> XEiJ.BUS_PAGE_BITS].mmdWw (a, z >> 16); 6776: m60FSLW ^= M60_FSLW_IOMA_FIRST ^ M60_FSLW_IOMA_SECOND; 6777: a += 2; 6778: //XEiJ.busWwe (a, z); 6779: mm[a >>> XEiJ.BUS_PAGE_BITS].mmdWw (a, z); 6780: } else { //奇数 6781: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_LONG | XEiJ.mpuDFC << 16; 6782: //XEiJ.busWb (a, z >> 24); 6783: mm[a >>> XEiJ.BUS_PAGE_BITS].mmdWb (a, z >> 24); 6784: m60FSLW ^= M60_FSLW_IOMA_FIRST ^ M60_FSLW_IOMA_SECOND; 6785: a++; 6786: //XEiJ.busWwe (a, z >> 8); 6787: mm[a >>> XEiJ.BUS_PAGE_BITS].mmdWw (a, z >> 8); 6788: a += 2; 6789: //XEiJ.busWb (a, z); 6790: mm[a >>> XEiJ.BUS_PAGE_BITS].mmdWb (a, z); 6791: } 6792: } else { //DFC=7。CPU空間 6793: if (0x00022000 <= a && a <= 0x0002201f) { //コプロセッサID=1 6794: XEiJ.fpuMotherboardCoprocessor.cirWriteLong (a, z); 6795: } else { 6796: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_LONG | XEiJ.mpuDFC << 16 | M60_FSLW_BUS_ERROR_ON_WRITE; 6797: M68kException.m6eNumber = M68kException.M6E_ACCESS_FAULT; 6798: M68kException.m6eAddress = a; 6799: M68kException.m6eDirection = XEiJ.MPU_WR_WRITE; 6800: M68kException.m6eSize = XEiJ.MPU_SS_LONG; 6801: throw M68kException.m6eSignal; 6802: } 6803: } 6804: } 6805: } //irpMovesLong 6806: 6807: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6808: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 6809: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 6810: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6811: //CAS.L Dc,Du,<ea> |-|--2346|-|-UUUU|-****| M+-WXZ |0000_111_011_mmm_rrr-0000000uuu000ccc (68060 software emulate misaligned <ea>) 6812: //CAS2.L Dc1:Dc2,Du1:Du2,(Rn1):(Rn2) |-|--234S|-|-UUUU|-****| |0000_111_011_111_100-rnnn000uuu000ccc(1)-rnnn_000_uuu_000_ccc(2) 6813: public static void irpCasLong () throws M68kException { 6814: int ea = XEiJ.regOC & 63; 6815: if (ea == XEiJ.EA_IM) { //CAS2.L Dc1:Dc2,Du1:Du2,(Rn1):(Rn2) 6816: M68kException.m6eNumber = M68kException.M6E_UNIMPLEMENTED_INSTRUCTION; 6817: throw M68kException.m6eSignal; 6818: } else { //CAS.L Dc,Du,<ea> 6819: int w = mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); //pcwz 6820: if ((w & ~0b0000_000_111_000_111) != 0) { 6821: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 6822: throw M68kException.m6eSignal; 6823: } 6824: int a = efaMltLong (ea); //a=ea 6825: if ((a & 1) != 0) { //misaligned <ea> 6826: M68kException.m6eNumber = M68kException.M6E_UNIMPLEMENTED_INSTRUCTION; 6827: throw M68kException.m6eSignal; 6828: } 6829: int c = w & 7; 6830: int y = XEiJ.regRn[c]; //y=Dc 6831: int x = mmuReadLongData (a, XEiJ.regSRS); //x=<ea> 6832: int z = x - y; //z=<ea>-Dc 6833: XEiJ.regCCR = (XEiJ.regCCR & XEiJ.REG_CCR_X | 6834: (z < 0 ? XEiJ.REG_CCR_N : 0) | 6835: (z == 0 ? XEiJ.REG_CCR_Z : 0) | 6836: ((x ^ y) & (x ^ z)) >>> 31 << 1 | 6837: (x & (y ^ z) ^ (y | z)) >>> 31); //ccr_cmp 6838: if (z == 0) { //<ea>==Dc 6839: XEiJ.mpuCycleCount += 19; 6840: mmuWriteLongData (a, XEiJ.regRn[w >> 6], XEiJ.regSRS); //Du→<ea> 6841: } else { //<ea>!=Dc 6842: XEiJ.mpuCycleCount += 19; 6843: XEiJ.regRn[c] = x; //<ea>→Dc 6844: } 6845: } 6846: } //irpCasLong 6847: 6848: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6849: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 6850: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 6851: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6852: //MOVE.B <ea>,Dq |-|012346|-|-UUUU|-**00|D M+-WXZPI|0001_qqq_000_mmm_rrr 6853: public static void irpMoveToDRByte () throws M68kException { 6854: XEiJ.mpuCycleCount++; 6855: int ea = XEiJ.regOC & 63; 6856: int qqq = XEiJ.regOC >> 9 & 7; 6857: int z = ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadByteSignExword ((XEiJ.regPC += 2) - 1, XEiJ.regSRS) : mmuReadByteSignData (efaAnyByte (ea), XEiJ.regSRS); //pcbs。イミディエイトを分離 6858: XEiJ.regRn[qqq] = ~255 & XEiJ.regRn[qqq] | 255 & z; 6859: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & z]; //ccr_tst_byte 6860: } //irpMoveToDRByte 6861: 6862: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6863: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 6864: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 6865: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6866: //MOVE.B <ea>,(Aq) |-|012346|-|-UUUU|-**00|D M+-WXZPI|0001_qqq_010_mmm_rrr 6867: public static void irpMoveToMMByte () throws M68kException { 6868: XEiJ.mpuCycleCount++; 6869: int ea = XEiJ.regOC & 63; 6870: int z = ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadByteSignExword ((XEiJ.regPC += 2) - 1, XEiJ.regSRS) : mmuReadByteSignData (efaAnyByte (ea), XEiJ.regSRS); //pcbs。イミディエイトを分離。ここでAqが変化する可能性があることに注意 6871: int aqq = (XEiJ.regOC >> 9) - (0b0001_000 - 8); 6872: int a = m60Address = XEiJ.regRn[aqq]; 6873: mmuWriteByteData (a, z, XEiJ.regSRS); 6874: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & z]; //ccr_tst_byte 6875: } //irpMoveToMMByte 6876: 6877: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6878: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 6879: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 6880: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6881: //MOVE.B <ea>,(Aq)+ |-|012346|-|-UUUU|-**00|D M+-WXZPI|0001_qqq_011_mmm_rrr 6882: public static void irpMoveToMPByte () throws M68kException { 6883: XEiJ.mpuCycleCount++; 6884: int ea = XEiJ.regOC & 63; 6885: int z = ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadByteSignExword ((XEiJ.regPC += 2) - 1, XEiJ.regSRS) : mmuReadByteSignData (efaAnyByte (ea), XEiJ.regSRS); //pcbs。イミディエイトを分離。ここでAqが変化する可能性があることに注意 6886: int aqq = (XEiJ.regOC >> 9) - (0b0001_000 - 8); 6887: int a; 6888: if (aqq < 15) { 6889: m60Incremented += 1L << (aqq << 3); //longのシフトカウントは6bitでマスクされる 6890: a = m60Address = XEiJ.regRn[aqq]++; 6891: } else { 6892: m60Incremented += 2L << (7 << 3); 6893: a = m60Address = (XEiJ.regRn[15] += 2) - 2; 6894: } 6895: mmuWriteByteData (a, z, XEiJ.regSRS); 6896: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & z]; //ccr_tst_byte 6897: } //irpMoveToMPByte 6898: 6899: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6900: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 6901: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 6902: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6903: //MOVE.B <ea>,-(Aq) |-|012346|-|-UUUU|-**00|D M+-WXZPI|0001_qqq_100_mmm_rrr 6904: public static void irpMoveToMNByte () throws M68kException { 6905: XEiJ.mpuCycleCount++; 6906: int ea = XEiJ.regOC & 63; 6907: int z = ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadByteSignExword ((XEiJ.regPC += 2) - 1, XEiJ.regSRS) : mmuReadByteSignData (efaAnyByte (ea), XEiJ.regSRS); //pcbs。イミディエイトを分離。ここでAqが変化する可能性があることに注意 6908: int aqq = (XEiJ.regOC >> 9) - (0b0001_000 - 8); 6909: int a; 6910: if (aqq < 15) { 6911: m60Incremented -= 1L << (aqq << 3); //longのシフトカウントは6bitでマスクされる 6912: a = m60Address = --XEiJ.regRn[aqq]; 6913: } else { 6914: m60Incremented -= 2L << (7 << 3); 6915: a = m60Address = XEiJ.regRn[15] -= 2; 6916: } 6917: mmuWriteByteData (a, z, XEiJ.regSRS); 6918: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & z]; //ccr_tst_byte 6919: } //irpMoveToMNByte 6920: 6921: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6922: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 6923: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 6924: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6925: //MOVE.B <ea>,(d16,Aq) |-|012346|-|-UUUU|-**00|D M+-WXZPI|0001_qqq_101_mmm_rrr 6926: public static void irpMoveToMWByte () throws M68kException { 6927: XEiJ.mpuCycleCount++; 6928: int ea = XEiJ.regOC & 63; 6929: int z = ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadByteSignExword ((XEiJ.regPC += 2) - 1, XEiJ.regSRS) : mmuReadByteSignData (efaAnyByte (ea), XEiJ.regSRS); //pcbs。イミディエイトを分離。ここでAqが変化する可能性があることに注意 6930: int aqq = (XEiJ.regOC >> 9) - (0b0001_000 - 8); 6931: int t = XEiJ.regRn[aqq]; //ベースレジスタ 6932: int a = m60Address = t + mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); //ワードディスプレースメント 6933: mmuWriteByteData (a, z, XEiJ.regSRS); 6934: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & z]; //ccr_tst_byte 6935: } //irpMoveToMWByte 6936: 6937: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6938: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 6939: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 6940: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6941: //MOVE.B <ea>,(d8,Aq,Rn.wl) |-|012346|-|-UUUU|-**00|D M+-WXZPI|0001_qqq_110_mmm_rrr 6942: public static void irpMoveToMXByte () throws M68kException { 6943: XEiJ.mpuCycleCount++; 6944: int ea = XEiJ.regOC & 63; 6945: int z = ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadByteSignExword ((XEiJ.regPC += 2) - 1, XEiJ.regSRS) : mmuReadByteSignData (efaAnyByte (ea), XEiJ.regSRS); //pcbs。イミディエイトを分離。ここでAqが変化する可能性があることに注意 6946: int aqq = (XEiJ.regOC >> 9) - (0b0001_000 - 8); 6947: int a; 6948: int t = XEiJ.regRn[aqq]; //ベースレジスタ 6949: int w = mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); //拡張ワード 6950: if ((0x0100 & w) == 0) { //ブリーフフォーマット 6951: a = m60Address = 6952: (t //ベースレジスタ 6953: + (byte) w //バイトディスプレースメント 6954: + (((0x0800 & w) == 0 ? (short) XEiJ.regRn[w >> 12] : //ワードインデックス 6955: XEiJ.regRn[w >> 12]) //ロングインデックス 6956: << ((0x0600 & w) >> 9))); //スケールファクタ 6957: } else { //フルフォーマット 6958: XEiJ.mpuCycleCount += ((0x0003 & w) == 0 ? 1 : //インダイレクトなし 6959: 3); //インダイレクトあり 6960: t = (((0x0080 & w) != 0 ? 0 : //ベースレジスタなし 6961: t) + //ベースレジスタあり 6962: ((0x0020 & w) == 0 ? 0 : //ベースディスプレースメントなし 6963: (0x0010 & w) == 0 ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) : //ワードベースディスプレースメント 6964: mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS))); //ロングベースディスプレースメント 6965: int x = ((0x0040 & w) != 0 ? 0 : //インデックスなし 6966: ((0x0800 & w) == 0 ? (short) XEiJ.regRn[w >> 12] : //ワードインデックス 6967: XEiJ.regRn[w >> 12]) //ロングインデックス 6968: << ((0x0600 & w) >> 9)); //スケールファクタ 6969: a = m60Address = 6970: ((0x0003 & w) == 0 ? t + x : //インダイレクトなし 6971: (((0x0004 & w) == 0 ? mmuReadLongData (m60Address = t + x, XEiJ.regSRS) : //プリインデックス 6972: mmuReadLongData (m60Address = t, XEiJ.regSRS) + x) //ポストインデックス 6973: + ((0x0002 & w) == 0 ? 0 : //アウタディスプレースメントなし 6974: (0x0001 & w) == 0 ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) : //ワードアウタディスプレースメント 6975: mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS)))); //ロングアウタディスプレースメント 6976: } 6977: mmuWriteByteData (a, z, XEiJ.regSRS); 6978: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & z]; //ccr_tst_byte 6979: } //irpMoveToMXByte 6980: 6981: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6982: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 6983: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 6984: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6985: //MOVE.B <ea>,(xxx).W |-|012346|-|-UUUU|-**00|D M+-WXZPI|0001_000_111_mmm_rrr 6986: public static void irpMoveToZWByte () throws M68kException { 6987: XEiJ.mpuCycleCount++; 6988: int ea = XEiJ.regOC & 63; 6989: int z = ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadByteSignExword ((XEiJ.regPC += 2) - 1, XEiJ.regSRS) : mmuReadByteSignData (efaAnyByte (ea), XEiJ.regSRS); //pcbs。イミディエイトを分離 6990: int a = m60Address = mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); 6991: mmuWriteByteData (a, z, XEiJ.regSRS); 6992: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & z]; //ccr_tst_byte 6993: } //irpMoveToZWByte 6994: 6995: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6996: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 6997: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 6998: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6999: //MOVE.B <ea>,(xxx).L |-|012346|-|-UUUU|-**00|D M+-WXZPI|0001_001_111_mmm_rrr 7000: public static void irpMoveToZLByte () throws M68kException { 7001: XEiJ.mpuCycleCount++; 7002: int ea = XEiJ.regOC & 63; 7003: int z = ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadByteSignExword ((XEiJ.regPC += 2) - 1, XEiJ.regSRS) : mmuReadByteSignData (efaAnyByte (ea), XEiJ.regSRS); //pcbs。イミディエイトを分離 7004: int a = m60Address = mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS); 7005: mmuWriteByteData (a, z, XEiJ.regSRS); 7006: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & z]; //ccr_tst_byte 7007: } //irpMoveToZLByte 7008: 7009: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7010: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7011: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7012: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7013: //MOVE.L <ea>,Dq |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0010_qqq_000_mmm_rrr 7014: public static void irpMoveToDRLong () throws M68kException { 7015: XEiJ.mpuCycleCount++; 7016: int ea = XEiJ.regOC & 63; 7017: int z; 7018: XEiJ.regRn[XEiJ.regOC >> 9 & 7] = z = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS) : mmuReadLongData (efaAnyLong (ea), XEiJ.regSRS); //pcls。イミディエイトを分離。このr[ea]はデータレジスタまたはアドレスレジスタ 7019: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 7020: } //irpMoveToDRLong 7021: 7022: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7023: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7024: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7025: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7026: //MOVEA.L <ea>,Aq |-|012346|-|-----|-----|DAM+-WXZPI|0010_qqq_001_mmm_rrr 7027: //MOVE.L <ea>,Aq |A|012346|-|-----|-----|DAM+-WXZPI|0010_qqq_001_mmm_rrr [MOVEA.L <ea>,Aq] 7028: public static void irpMoveaLong () throws M68kException { 7029: XEiJ.mpuCycleCount++; 7030: int ea = XEiJ.regOC & 63; 7031: XEiJ.regRn[(XEiJ.regOC >> 9) - (16 - 8)] = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS) : mmuReadLongData (efaAnyLong (ea), XEiJ.regSRS); //pcls。イミディエイトを分離。このr[ea]はデータレジスタまたはアドレスレジスタ。右辺でAqが変化する可能性があることに注意 7032: } //irpMoveaLong 7033: 7034: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7035: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7036: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7037: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7038: //MOVE.L <ea>,(Aq) |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0010_qqq_010_mmm_rrr 7039: public static void irpMoveToMMLong () throws M68kException { 7040: XEiJ.mpuCycleCount++; 7041: int ea = XEiJ.regOC & 63; 7042: int z = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS) : mmuReadLongData (efaAnyLong (ea), XEiJ.regSRS); //pcls。イミディエイトを分離。このr[ea]はデータレジスタまたはアドレスレジスタ。ここでAqが変化する可能性があることに注意 7043: int aqq = (XEiJ.regOC >> 9) - (0b0010_000 - 8); 7044: int a = m60Address = XEiJ.regRn[aqq]; 7045: mmuWriteLongData (a, z, XEiJ.regSRS); 7046: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 7047: } //irpMoveToMMLong 7048: 7049: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7050: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7051: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7052: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7053: //MOVE.L <ea>,(Aq)+ |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0010_qqq_011_mmm_rrr 7054: public static void irpMoveToMPLong () throws M68kException { 7055: XEiJ.mpuCycleCount++; 7056: int ea = XEiJ.regOC & 63; 7057: int z = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS) : mmuReadLongData (efaAnyLong (ea), XEiJ.regSRS); //pcls。イミディエイトを分離。このr[ea]はデータレジスタまたはアドレスレジスタ。ここでAqが変化する可能性があることに注意 7058: int aqq = (XEiJ.regOC >> 9) - (0b0010_000 - 8); 7059: m60Incremented += 4L << (aqq << 3); //longのシフトカウントは6bitでマスクされる 7060: int a = m60Address = (XEiJ.regRn[aqq] += 4) - 4; 7061: mmuWriteLongData (a, z, XEiJ.regSRS); 7062: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 7063: } //irpMoveToMPLong 7064: 7065: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7066: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7067: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7068: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7069: //MOVE.L <ea>,-(Aq) |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0010_qqq_100_mmm_rrr 7070: public static void irpMoveToMNLong () throws M68kException { 7071: XEiJ.mpuCycleCount++; 7072: int ea = XEiJ.regOC & 63; 7073: int z = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS) : mmuReadLongData (efaAnyLong (ea), XEiJ.regSRS); //pcls。イミディエイトを分離。このr[ea]はデータレジスタまたはアドレスレジスタ。ここでAqが変化する可能性があることに注意 7074: int aqq = (XEiJ.regOC >> 9) - (0b0010_000 - 8); 7075: m60Incremented -= 4L << (aqq << 3); //longのシフトカウントは6bitでマスクされる 7076: int a = m60Address = XEiJ.regRn[aqq] -= 4; 7077: mmuWriteLongData (a, z, XEiJ.regSRS); 7078: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 7079: } //irpMoveToMNLong 7080: 7081: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7082: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7083: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7084: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7085: //MOVE.L <ea>,(d16,Aq) |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0010_qqq_101_mmm_rrr 7086: public static void irpMoveToMWLong () throws M68kException { 7087: XEiJ.mpuCycleCount++; 7088: int ea = XEiJ.regOC & 63; 7089: int z = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS) : mmuReadLongData (efaAnyLong (ea), XEiJ.regSRS); //pcls。イミディエイトを分離。このr[ea]はデータレジスタまたはアドレスレジスタ。ここでAqが変化する可能性があることに注意 7090: int aqq = (XEiJ.regOC >> 9) - (0b0010_000 - 8); 7091: int t = XEiJ.regRn[aqq]; //ベースレジスタ 7092: int a = m60Address = t + mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); //ワードディスプレースメント 7093: mmuWriteLongData (a, z, XEiJ.regSRS); 7094: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 7095: } //irpMoveToMWLong 7096: 7097: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7098: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7099: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7100: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7101: //MOVE.L <ea>,(d8,Aq,Rn.wl) |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0010_qqq_110_mmm_rrr 7102: public static void irpMoveToMXLong () throws M68kException { 7103: XEiJ.mpuCycleCount++; 7104: int ea = XEiJ.regOC & 63; 7105: int z = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS) : mmuReadLongData (efaAnyLong (ea), XEiJ.regSRS); //pcls。イミディエイトを分離。このr[ea]はデータレジスタまたはアドレスレジスタ。ここでAqが変化する可能性があることに注意 7106: int aqq = (XEiJ.regOC >> 9) - (0b0010_000 - 8); 7107: int t = XEiJ.regRn[aqq]; //ベースレジスタ 7108: int w = mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); //拡張ワード 7109: int a; 7110: if ((0x0100 & w) == 0) { //ブリーフフォーマット 7111: a = m60Address = 7112: (t //ベースレジスタ 7113: + (byte) w //バイトディスプレースメント 7114: + (((0x0800 & w) == 0 ? (short) XEiJ.regRn[w >> 12] : //ワードインデックス 7115: XEiJ.regRn[w >> 12]) //ロングインデックス 7116: << ((0x0600 & w) >> 9))); //スケールファクタ 7117: } else { //フルフォーマット 7118: XEiJ.mpuCycleCount += ((0x0003 & w) == 0 ? 1 : //インダイレクトなし 7119: 3); //インダイレクトあり 7120: t = (((0x0080 & w) != 0 ? 0 : //ベースレジスタなし 7121: t) + //ベースレジスタあり 7122: ((0x0020 & w) == 0 ? 0 : //ベースディスプレースメントなし 7123: (0x0010 & w) == 0 ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) : //ワードベースディスプレースメント 7124: mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS))); //ロングベースディスプレースメント 7125: int x = ((0x0040 & w) != 0 ? 0 : //インデックスなし 7126: ((0x0800 & w) == 0 ? (short) XEiJ.regRn[w >> 12] : //ワードインデックス 7127: XEiJ.regRn[w >> 12]) //ロングインデックス 7128: << ((0x0600 & w) >> 9)); //スケールファクタ 7129: a = m60Address = 7130: ((0x0003 & w) == 0 ? t + x : //インダイレクトなし 7131: (((0x0004 & w) == 0 ? mmuReadLongData (m60Address = t + x, XEiJ.regSRS) : //プリインデックス 7132: mmuReadLongData (m60Address = t, XEiJ.regSRS) + x) //ポストインデックス 7133: + ((0x0002 & w) == 0 ? 0 : //アウタディスプレースメントなし 7134: (0x0001 & w) == 0 ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) : //ワードアウタディスプレースメント 7135: mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS)))); //ロングアウタディスプレースメント 7136: } 7137: mmuWriteLongData (a, z, XEiJ.regSRS); 7138: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 7139: } //irpMoveToMXLong 7140: 7141: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7142: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7143: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7144: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7145: //MOVE.L <ea>,(xxx).W |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0010_000_111_mmm_rrr 7146: public static void irpMoveToZWLong () throws M68kException { 7147: XEiJ.mpuCycleCount++; 7148: int ea = XEiJ.regOC & 63; 7149: int z = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS) : mmuReadLongData (efaAnyLong (ea), XEiJ.regSRS); //pcls。イミディエイトを分離。このr[ea]はデータレジスタまたはアドレスレジスタ 7150: int a = m60Address = mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); 7151: mmuWriteLongData (a, z, XEiJ.regSRS); 7152: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 7153: } //irpMoveToZWLong 7154: 7155: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7156: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7157: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7158: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7159: //MOVE.L <ea>,(xxx).L |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0010_001_111_mmm_rrr 7160: public static void irpMoveToZLLong () throws M68kException { 7161: XEiJ.mpuCycleCount++; 7162: int ea = XEiJ.regOC & 63; 7163: int z = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS) : mmuReadLongData (efaAnyLong (ea), XEiJ.regSRS); //pcls。イミディエイトを分離。このr[ea]はデータレジスタまたはアドレスレジスタ 7164: int a = m60Address = mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS); 7165: mmuWriteLongData (a, z, XEiJ.regSRS); 7166: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 7167: } //irpMoveToZLLong 7168: 7169: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7170: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7171: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7172: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7173: //MOVE.W <ea>,Dq |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0011_qqq_000_mmm_rrr 7174: public static void irpMoveToDRWord () throws M68kException { 7175: XEiJ.mpuCycleCount++; 7176: int ea = XEiJ.regOC & 63; 7177: int qqq = XEiJ.regOC >> 9 & 7; 7178: int z = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) : mmuReadWordSignData (efaAnyWord (ea), XEiJ.regSRS); //pcws。イミディエイトを分離。このr[ea]はデータレジスタまたはアドレスレジスタ 7179: XEiJ.regRn[qqq] = ~65535 & XEiJ.regRn[qqq] | (char) z; 7180: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (char) z - 1 >> 31 & XEiJ.REG_CCR_Z | ((short) z < 0 ? XEiJ.REG_CCR_N : 0); //ccr_tst_word 7181: } //irpMoveToDRWord 7182: 7183: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7184: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7185: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7186: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7187: //MOVEA.W <ea>,Aq |-|012346|-|-----|-----|DAM+-WXZPI|0011_qqq_001_mmm_rrr 7188: //MOVE.W <ea>,Aq |A|012346|-|-----|-----|DAM+-WXZPI|0011_qqq_001_mmm_rrr [MOVEA.W <ea>,Aq] 7189: // 7190: //MOVEA.W <ea>,Aq 7191: // ワードデータをロングに符号拡張してAqの全体を更新する 7192: public static void irpMoveaWord () throws M68kException { 7193: XEiJ.mpuCycleCount++; 7194: int ea = XEiJ.regOC & 63; 7195: XEiJ.regRn[XEiJ.regOC >> 9 & 15] = ea < XEiJ.EA_MM ? (short) XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) : mmuReadWordSignData (efaAnyWord (ea), XEiJ.regSRS); //符号拡張して32bit全部書き換える。pcws。イミディエイトを分離。このr[ea]はデータレジスタまたはアドレスレジスタ。右辺でAqが変化する可能性があることに注意 7196: } //irpMoveaWord 7197: 7198: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7199: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7200: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7201: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7202: //MOVE.W <ea>,(Aq) |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0011_qqq_010_mmm_rrr 7203: public static void irpMoveToMMWord () throws M68kException { 7204: XEiJ.mpuCycleCount++; 7205: int ea = XEiJ.regOC & 63; 7206: int z = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) : mmuReadWordSignData (efaAnyWord (ea), XEiJ.regSRS); //pcws。イミディエイトを分離。このr[ea]はデータレジスタまたはアドレスレジスタ。ここでAqが変化する可能性があることに注意 7207: int aqq = (XEiJ.regOC >> 9) - (0b0011_000 - 8); 7208: int a = m60Address = XEiJ.regRn[aqq]; 7209: mmuWriteWordData (a, z, XEiJ.regSRS); 7210: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (char) z - 1 >> 31 & XEiJ.REG_CCR_Z | ((short) z < 0 ? XEiJ.REG_CCR_N : 0); //ccr_tst_word 7211: } //irpMoveToMMWord 7212: 7213: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7214: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7215: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7216: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7217: //MOVE.W <ea>,(Aq)+ |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0011_qqq_011_mmm_rrr 7218: public static void irpMoveToMPWord () throws M68kException { 7219: XEiJ.mpuCycleCount++; 7220: int ea = XEiJ.regOC & 63; 7221: int z = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) : mmuReadWordSignData (efaAnyWord (ea), XEiJ.regSRS); //このr[ea]はデータレジスタまたはアドレスレジスタ。pcws。イミディエイトを分離。ここでAqが変化する可能性があることに注意 7222: int aqq = (XEiJ.regOC >> 9) - (0b0011_000 - 8); 7223: m60Incremented += 2L << (aqq << 3); //longのシフトカウントは6bitでマスクされる 7224: int a = m60Address = (XEiJ.regRn[aqq] += 2) - 2; 7225: mmuWriteWordData (a, z, XEiJ.regSRS); 7226: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (char) z - 1 >> 31 & XEiJ.REG_CCR_Z | ((short) z < 0 ? XEiJ.REG_CCR_N : 0); //ccr_tst_word 7227: } //irpMoveToMPWord 7228: 7229: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7230: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7231: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7232: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7233: //MOVE.W <ea>,-(Aq) |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0011_qqq_100_mmm_rrr 7234: public static void irpMoveToMNWord () throws M68kException { 7235: XEiJ.mpuCycleCount++; 7236: int ea = XEiJ.regOC & 63; 7237: int z = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) : mmuReadWordSignData (efaAnyWord (ea), XEiJ.regSRS); //このr[ea]はデータレジスタまたはアドレスレジスタ。pcws。イミディエイトを分離。ここでAqが変化する可能性があることに注意 7238: int aqq = (XEiJ.regOC >> 9) - (0b0011_000 - 8); 7239: m60Incremented -= 2L << (aqq << 3); //longのシフトカウントは6bitでマスクされる 7240: int a = m60Address = XEiJ.regRn[aqq] -= 2; 7241: mmuWriteWordData (a, z, XEiJ.regSRS); 7242: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (char) z - 1 >> 31 & XEiJ.REG_CCR_Z | ((short) z < 0 ? XEiJ.REG_CCR_N : 0); //ccr_tst_word 7243: } //irpMoveToMNWord 7244: 7245: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7246: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7247: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7248: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7249: //MOVE.W <ea>,(d16,Aq) |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0011_qqq_101_mmm_rrr 7250: public static void irpMoveToMWWord () throws M68kException { 7251: XEiJ.mpuCycleCount++; 7252: int ea = XEiJ.regOC & 63; 7253: int z = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) : mmuReadWordSignData (efaAnyWord (ea), XEiJ.regSRS); //このr[ea]はデータレジスタまたはアドレスレジスタ。pcws。イミディエイトを分離。ここでAqが変化する可能性があることに注意 7254: int aqq = (XEiJ.regOC >> 9) - (0b0011_000 - 8); 7255: int t = XEiJ.regRn[aqq]; //ベースレジスタ 7256: int a = m60Address = t + mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); //ワードディスプレースメント 7257: mmuWriteWordData (a, z, XEiJ.regSRS); 7258: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (char) z - 1 >> 31 & XEiJ.REG_CCR_Z | ((short) z < 0 ? XEiJ.REG_CCR_N : 0); //ccr_tst_word 7259: } //irpMoveToMWWord 7260: 7261: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7262: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7263: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7264: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7265: //MOVE.W <ea>,(d8,Aq,Rn.wl) |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0011_qqq_110_mmm_rrr 7266: public static void irpMoveToMXWord () throws M68kException { 7267: XEiJ.mpuCycleCount++; 7268: int ea = XEiJ.regOC & 63; 7269: int z = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) : mmuReadWordSignData (efaAnyWord (ea), XEiJ.regSRS); //このr[ea]はデータレジスタまたはアドレスレジスタ。pcws。イミディエイトを分離。ここでAqが変化する可能性があることに注意 7270: int aqq = (XEiJ.regOC >> 9) - (0b0011_000 - 8); 7271: int t = XEiJ.regRn[aqq]; //ベースレジスタ 7272: int w = mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); //拡張ワード 7273: int a; 7274: if ((0x0100 & w) == 0) { //ブリーフフォーマット 7275: a = m60Address = 7276: (t //ベースレジスタ 7277: + (byte) w //バイトディスプレースメント 7278: + (((0x0800 & w) == 0 ? (short) XEiJ.regRn[w >> 12] : //ワードインデックス 7279: XEiJ.regRn[w >> 12]) //ロングインデックス 7280: << ((0x0600 & w) >> 9))); //スケールファクタ 7281: } else { //フルフォーマット 7282: XEiJ.mpuCycleCount += ((0x0003 & w) == 0 ? 1 : //インダイレクトなし 7283: 3); //インダイレクトあり 7284: t = (((0x0080 & w) != 0 ? 0 : //ベースレジスタなし 7285: t) + //ベースレジスタあり 7286: ((0x0020 & w) == 0 ? 0 : //ベースディスプレースメントなし 7287: (0x0010 & w) == 0 ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) : //ワードベースディスプレースメント 7288: mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS))); //ロングベースディスプレースメント 7289: int x = ((0x0040 & w) != 0 ? 0 : //インデックスなし 7290: ((0x0800 & w) == 0 ? (short) XEiJ.regRn[w >> 12] : //ワードインデックス 7291: XEiJ.regRn[w >> 12]) //ロングインデックス 7292: << ((0x0600 & w) >> 9)); //スケールファクタ 7293: a = m60Address = 7294: ((0x0003 & w) == 0 ? t + x : //インダイレクトなし 7295: (((0x0004 & w) == 0 ? mmuReadLongData (m60Address = t + x, XEiJ.regSRS) : //プリインデックス 7296: mmuReadLongData (m60Address = t, XEiJ.regSRS) + x) //ポストインデックス 7297: + ((0x0002 & w) == 0 ? 0 : //アウタディスプレースメントなし 7298: (0x0001 & w) == 0 ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) : //ワードアウタディスプレースメント 7299: mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS)))); //ロングアウタディスプレースメント 7300: } 7301: mmuWriteWordData (a, z, XEiJ.regSRS); 7302: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (char) z - 1 >> 31 & XEiJ.REG_CCR_Z | ((short) z < 0 ? XEiJ.REG_CCR_N : 0); //ccr_tst_word 7303: } //irpMoveToMXWord 7304: 7305: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7306: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7307: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7308: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7309: //MOVE.W <ea>,(xxx).W |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0011_000_111_mmm_rrr 7310: public static void irpMoveToZWWord () throws M68kException { 7311: XEiJ.mpuCycleCount++; 7312: int ea = XEiJ.regOC & 63; 7313: int z = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) : mmuReadWordSignData (efaAnyWord (ea), XEiJ.regSRS); //このr[ea]はデータレジスタまたはアドレスレジスタ。pcws。イミディエイトを分離 7314: int a = m60Address = mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); 7315: mmuWriteWordData (a, z, XEiJ.regSRS); 7316: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (char) z - 1 >> 31 & XEiJ.REG_CCR_Z | ((short) z < 0 ? XEiJ.REG_CCR_N : 0); //ccr_tst_word 7317: } //irpMoveToZWWord 7318: 7319: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7320: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7321: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7322: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7323: //MOVE.W <ea>,(xxx).L |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0011_001_111_mmm_rrr 7324: public static void irpMoveToZLWord () throws M68kException { 7325: XEiJ.mpuCycleCount++; 7326: int ea = XEiJ.regOC & 63; 7327: int z = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) : mmuReadWordSignData (efaAnyWord (ea), XEiJ.regSRS); //このr[ea]はデータレジスタまたはアドレスレジスタ。pcws。イミディエイトを分離 7328: int a = m60Address = mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS); 7329: mmuWriteWordData (a, z, XEiJ.regSRS); 7330: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (char) z - 1 >> 31 & XEiJ.REG_CCR_Z | ((short) z < 0 ? XEiJ.REG_CCR_N : 0); //ccr_tst_word 7331: } //irpMoveToZLWord 7332: 7333: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7334: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7335: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7336: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7337: //NEGX.B <ea> |-|012346|-|*UUUU|*****|D M+-WXZ |0100_000_000_mmm_rrr 7338: public static void irpNegxByte () throws M68kException { 7339: int ea = XEiJ.regOC & 63; 7340: int y; 7341: int z; 7342: if (ea < XEiJ.EA_AR) { //NEGX.B Dr 7343: XEiJ.mpuCycleCount++; 7344: z = (byte) (XEiJ.regRn[ea] = ~0xff & (y = XEiJ.regRn[ea]) | 0xff & -(y = (byte) y) - (XEiJ.regCCR >> 4)); //Xの左側はすべて0なのでCCR_X&を省略 7345: } else { //NEGX.B <mem> 7346: XEiJ.mpuCycleCount++; 7347: int a = efaMltByte (ea); 7348: mmuWriteByteData (a, z = (byte) (-(y = mmuModifyByteSignData (a, XEiJ.regSRS)) - (XEiJ.regCCR >> 4)), XEiJ.regSRS); //Xの左側はすべて0なのでCCR_X&を省略 7349: } 7350: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_Z : 0) | 7351: (y & z) >>> 31 << 1 | 7352: (y | z) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_negx 7353: } //irpNegxByte 7354: 7355: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7356: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7357: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7358: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7359: //NEGX.W <ea> |-|012346|-|*UUUU|*****|D M+-WXZ |0100_000_001_mmm_rrr 7360: public static void irpNegxWord () throws M68kException { 7361: int ea = XEiJ.regOC & 63; 7362: int y; 7363: int z; 7364: if (ea < XEiJ.EA_AR) { //NEGX.W Dr 7365: XEiJ.mpuCycleCount++; 7366: z = (short) (XEiJ.regRn[ea] = ~0xffff & (y = XEiJ.regRn[ea]) | (char) (-(y = (short) y) - (XEiJ.regCCR >> 4))); //Xの左側はすべて0なのでCCR_X&を省略 7367: } else { //NEGX.W <mem> 7368: XEiJ.mpuCycleCount++; 7369: int a = efaMltWord (ea); 7370: mmuWriteWordData (a, z = (short) (-(y = mmuModifyWordSignData (a, XEiJ.regSRS)) - (XEiJ.regCCR >> 4)), XEiJ.regSRS); //Xの左側はすべて0なのでCCR_X&を省略 7371: } 7372: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_Z : 0) | 7373: (y & z) >>> 31 << 1 | 7374: (y | z) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_negx 7375: } //irpNegxWord 7376: 7377: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7378: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7379: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7380: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7381: //NEGX.L <ea> |-|012346|-|*UUUU|*****|D M+-WXZ |0100_000_010_mmm_rrr 7382: public static void irpNegxLong () throws M68kException { 7383: int ea = XEiJ.regOC & 63; 7384: int y; 7385: int z; 7386: if (ea < XEiJ.EA_AR) { //NEGX.L Dr 7387: XEiJ.mpuCycleCount++; 7388: XEiJ.regRn[ea] = z = -(y = XEiJ.regRn[ea]) - (XEiJ.regCCR >> 4); //Xの左側はすべて0なのでCCR_X&を省略 7389: } else { //NEGX.L <mem> 7390: XEiJ.mpuCycleCount++; 7391: int a = efaMltLong (ea); 7392: mmuWriteLongData (a, z = -(y = mmuModifyLongData (a, XEiJ.regSRS)) - (XEiJ.regCCR >> 4), XEiJ.regSRS); //Xの左側はすべて0なのでCCR_X&を省略 7393: } 7394: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_Z : 0) | 7395: (y & z) >>> 31 << 1 | 7396: (y | z) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_negx 7397: } //irpNegxLong 7398: 7399: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7400: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7401: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7402: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7403: //MOVE.W SR,<ea> |-|-12346|P|*****|-----|D M+-WXZ |0100_000_011_mmm_rrr 7404: public static void irpMoveFromSR () throws M68kException { 7405: //MC68010以上では特権命令 7406: if (XEiJ.regSRS == 0) { //ユーザモードのとき 7407: M68kException.m6eNumber = M68kException.M6E_PRIVILEGE_VIOLATION; 7408: throw M68kException.m6eSignal; 7409: } 7410: //以下はスーパーバイザモード 7411: int ea = XEiJ.regOC & 63; 7412: if (ea < XEiJ.EA_AR) { //MOVE.W SR,Dr 7413: XEiJ.mpuCycleCount++; 7414: XEiJ.regRn[ea] = ~0xffff & XEiJ.regRn[ea] | XEiJ.regSRT1 | XEiJ.regSRS | XEiJ.regSRM | XEiJ.regSRI | XEiJ.regCCR; 7415: } else { //MOVE.W SR,<mem> 7416: XEiJ.mpuCycleCount++; 7417: mmuWriteWordData (efaMltWord (ea), XEiJ.regSRT1 | XEiJ.regSRS | XEiJ.regSRM | XEiJ.regSRI | XEiJ.regCCR, 1); 7418: } 7419: } //irpMoveFromSR 7420: 7421: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7422: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7423: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7424: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7425: //CHK.L <ea>,Dq |-|--2346|-|-UUUU|-*UUU|D M+-WXZPI|0100_qqq_100_mmm_rrr 7426: public static void irpChkLong () throws M68kException { 7427: XEiJ.mpuCycleCount += 2; 7428: int ea = XEiJ.regOC & 63; 7429: int x = ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS) : mmuReadLongData (efaAnyLong (ea), XEiJ.regSRS); //pcls。イミディエイトを分離 7430: int y = XEiJ.regRn[XEiJ.regOC >> 9 & 7]; 7431: int z = x - y; 7432: XEiJ.regCCR = (XEiJ.regCCR & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z | XEiJ.REG_CCR_V | XEiJ.REG_CCR_C) | 7433: (y < 0 ? XEiJ.REG_CCR_N : 0)); 7434: if (y < 0 || x < y) { 7435: XEiJ.mpuCycleCount += 20 - 19; 7436: m60Address = XEiJ.regPC0; //アドレスは命令の先頭 7437: M68kException.m6eNumber = M68kException.M6E_CHK_INSTRUCTION; 7438: throw M68kException.m6eSignal; 7439: } 7440: } //irpChkLong 7441: 7442: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7443: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7444: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7445: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7446: //CHK.W <ea>,Dq |-|012346|-|-UUUU|-*UUU|D M+-WXZPI|0100_qqq_110_mmm_rrr 7447: public static void irpChkWord () throws M68kException { 7448: XEiJ.mpuCycleCount += 2; 7449: int ea = XEiJ.regOC & 63; 7450: int x = ea < XEiJ.EA_AR ? (short) XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) : mmuReadWordSignData (efaAnyWord (ea), XEiJ.regSRS); //pcws。イミディエイトを分離 7451: int y = (short) XEiJ.regRn[XEiJ.regOC >> 9 & 7]; 7452: int z = (short) (x - y); 7453: XEiJ.regCCR = (XEiJ.regCCR & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z | XEiJ.REG_CCR_V | XEiJ.REG_CCR_C) | 7454: (y < 0 ? XEiJ.REG_CCR_N : 0)); 7455: if (y < 0 || x < y) { 7456: XEiJ.mpuCycleCount += 20 - 19; 7457: m60Address = XEiJ.regPC0; //アドレスは命令の先頭 7458: M68kException.m6eNumber = M68kException.M6E_CHK_INSTRUCTION; 7459: throw M68kException.m6eSignal; 7460: } 7461: } //irpChkWord 7462: 7463: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7464: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7465: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7466: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7467: //LEA.L <ea>,Aq |-|012346|-|-----|-----| M WXZP |0100_qqq_111_mmm_rrr 7468: //EXTB.L Dr |-|--2346|-|-UUUU|-**00|D |0100_100_111_000_rrr 7469: public static void irpLea () throws M68kException { 7470: int ea = XEiJ.regOC & 63; 7471: if (ea < XEiJ.EA_AR) { //EXTB.L Dr 7472: XEiJ.mpuCycleCount++; 7473: int z; 7474: XEiJ.regRn[ea] = z = (byte) XEiJ.regRn[ea]; 7475: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 7476: } else { //LEA.L <ea>,Aq 7477: XEiJ.mpuCycleCount++; 7478: XEiJ.regRn[(XEiJ.regOC >> 9) - (32 - 8)] = efaLeaPea (ea); 7479: } 7480: } //irpLea 7481: 7482: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7483: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7484: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7485: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7486: //CLR.B <ea> |-|012346|-|-UUUU|-0100|D M+-WXZ |0100_001_000_mmm_rrr (68000 and 68008 read before clear) 7487: public static void irpClrByte () throws M68kException { 7488: int ea = XEiJ.regOC & 63; 7489: if (ea < XEiJ.EA_AR) { //CLR.B Dr 7490: XEiJ.mpuCycleCount++; 7491: XEiJ.regRn[ea] &= ~0xff; 7492: } else { //CLR.B <mem> 7493: XEiJ.mpuCycleCount++; 7494: mmuWriteByteData (efaMltByte (ea), 0, XEiJ.regSRS); 7495: } 7496: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z; //ccr_clr 7497: } //irpClrByte 7498: 7499: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7500: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7501: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7502: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7503: //CLR.W <ea> |-|012346|-|-UUUU|-0100|D M+-WXZ |0100_001_001_mmm_rrr (68000 and 68008 read before clear) 7504: public static void irpClrWord () throws M68kException { 7505: int ea = XEiJ.regOC & 63; 7506: if (ea < XEiJ.EA_AR) { //CLR.W Dr 7507: XEiJ.mpuCycleCount++; 7508: XEiJ.regRn[ea] &= ~0xffff; 7509: } else { //CLR.W <mem> 7510: XEiJ.mpuCycleCount++; 7511: mmuWriteWordData (efaMltWord (ea), 0, XEiJ.regSRS); 7512: } 7513: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z; //ccr_clr 7514: } //irpClrWord 7515: 7516: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7517: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7518: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7519: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7520: //CLR.L <ea> |-|012346|-|-UUUU|-0100|D M+-WXZ |0100_001_010_mmm_rrr (68000 and 68008 read before clear) 7521: public static void irpClrLong () throws M68kException { 7522: int ea = XEiJ.regOC & 63; 7523: if (ea < XEiJ.EA_AR) { //CLR.L Dr 7524: XEiJ.mpuCycleCount++; 7525: XEiJ.regRn[ea] = 0; 7526: } else { //CLR.L <mem> 7527: XEiJ.mpuCycleCount++; 7528: mmuWriteLongData (efaMltLong (ea), 0, XEiJ.regSRS); 7529: } 7530: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z; //ccr_clr 7531: } //irpClrLong 7532: 7533: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7534: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7535: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7536: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7537: //MOVE.W CCR,<ea> |-|-12346|-|*****|-----|D M+-WXZ |0100_001_011_mmm_rrr 7538: public static void irpMoveFromCCR () throws M68kException { 7539: int ea = XEiJ.regOC & 63; 7540: if (ea < XEiJ.EA_AR) { //MOVE.W CCR,Dr 7541: XEiJ.mpuCycleCount++; 7542: XEiJ.regRn[ea] = ~0xffff & XEiJ.regRn[ea] | XEiJ.regCCR; 7543: } else { //MOVE.W CCR,<mem> 7544: XEiJ.mpuCycleCount++; 7545: mmuWriteWordData (efaMltWord (ea), XEiJ.regCCR, XEiJ.regSRS); 7546: } 7547: } //irpMoveFromCCR 7548: 7549: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7550: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7551: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7552: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7553: //NEG.B <ea> |-|012346|-|UUUUU|*****|D M+-WXZ |0100_010_000_mmm_rrr 7554: public static void irpNegByte () throws M68kException { 7555: int ea = XEiJ.regOC & 63; 7556: int y; 7557: int z; 7558: if (ea < XEiJ.EA_AR) { //NEG.B Dr 7559: XEiJ.mpuCycleCount++; 7560: z = (byte) (XEiJ.regRn[ea] = ~0xff & (y = XEiJ.regRn[ea]) | 0xff & -(y = (byte) y)); 7561: } else { //NEG.B <mem> 7562: XEiJ.mpuCycleCount++; 7563: int a = efaMltByte (ea); 7564: mmuWriteByteData (a, z = (byte) -(y = mmuModifyByteSignData (a, XEiJ.regSRS)), XEiJ.regSRS); 7565: } 7566: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | 7567: (y & z) >>> 31 << 1 | 7568: (y | z) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_neg 7569: } //irpNegByte 7570: 7571: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7572: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7573: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7574: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7575: //NEG.W <ea> |-|012346|-|UUUUU|*****|D M+-WXZ |0100_010_001_mmm_rrr 7576: public static void irpNegWord () throws M68kException { 7577: int ea = XEiJ.regOC & 63; 7578: int y; 7579: int z; 7580: if (ea < XEiJ.EA_AR) { //NEG.W Dr 7581: XEiJ.mpuCycleCount++; 7582: z = (short) (XEiJ.regRn[ea] = ~0xffff & (y = XEiJ.regRn[ea]) | (char) -(y = (short) y)); 7583: } else { //NEG.W <mem> 7584: XEiJ.mpuCycleCount++; 7585: int a = efaMltWord (ea); 7586: mmuWriteWordData (a, z = (short) -(y = mmuModifyWordSignData (a, XEiJ.regSRS)), XEiJ.regSRS); 7587: } 7588: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | 7589: (y & z) >>> 31 << 1 | 7590: (y | z) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_neg 7591: } //irpNegWord 7592: 7593: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7594: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7595: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7596: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7597: //NEG.L <ea> |-|012346|-|UUUUU|*****|D M+-WXZ |0100_010_010_mmm_rrr 7598: public static void irpNegLong () throws M68kException { 7599: int ea = XEiJ.regOC & 63; 7600: int y; 7601: int z; 7602: if (ea < XEiJ.EA_AR) { //NEG.L Dr 7603: XEiJ.mpuCycleCount++; 7604: XEiJ.regRn[ea] = z = -(y = XEiJ.regRn[ea]); 7605: } else { //NEG.L <mem> 7606: XEiJ.mpuCycleCount++; 7607: int a = efaMltLong (ea); 7608: mmuWriteLongData (a, z = -(y = mmuModifyLongData (a, XEiJ.regSRS)), XEiJ.regSRS); 7609: } 7610: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | 7611: (y & z) >>> 31 << 1 | 7612: (y | z) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_neg 7613: } //irpNegLong 7614: 7615: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7616: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7617: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7618: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7619: //MOVE.W <ea>,CCR |-|012346|-|UUUUU|*****|D M+-WXZPI|0100_010_011_mmm_rrr 7620: public static void irpMoveToCCR () throws M68kException { 7621: XEiJ.mpuCycleCount++; 7622: int ea = XEiJ.regOC & 63; 7623: XEiJ.regCCR = XEiJ.REG_CCR_MASK & (ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) : mmuReadWordSignData (efaAnyWord (ea), XEiJ.regSRS)); //pcws。イミディエイトを分離 7624: } //irpMoveToCCR 7625: 7626: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7627: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7628: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7629: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7630: //NOT.B <ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |0100_011_000_mmm_rrr 7631: public static void irpNotByte () throws M68kException { 7632: int ea = XEiJ.regOC & 63; 7633: int z; 7634: if (ea < XEiJ.EA_AR) { //NOT.B Dr 7635: XEiJ.mpuCycleCount++; 7636: z = XEiJ.regRn[ea] ^= 255; //0拡張してからEOR 7637: } else { //NOT.B <mem> 7638: XEiJ.mpuCycleCount++; 7639: int a = efaMltByte (ea); 7640: mmuWriteByteData (a, z = ~mmuModifyByteSignData (a, XEiJ.regSRS), XEiJ.regSRS); 7641: } 7642: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & z]; //ccr_tst_byte 7643: } //irpNotByte 7644: 7645: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7646: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7647: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7648: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7649: //NOT.W <ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |0100_011_001_mmm_rrr 7650: public static void irpNotWord () throws M68kException { 7651: int ea = XEiJ.regOC & 63; 7652: int z; 7653: if (ea < XEiJ.EA_AR) { //NOT.W Dr 7654: XEiJ.mpuCycleCount++; 7655: z = XEiJ.regRn[ea] ^= 65535; //0拡張してからEOR 7656: } else { //NOT.W <mem> 7657: XEiJ.mpuCycleCount++; 7658: int a = efaMltWord (ea); 7659: mmuWriteWordData (a, z = ~mmuModifyWordSignData (a, XEiJ.regSRS), XEiJ.regSRS); 7660: } 7661: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (char) z - 1 >> 31 & XEiJ.REG_CCR_Z | ((short) z < 0 ? XEiJ.REG_CCR_N : 0); //ccr_tst_word 7662: } //irpNotWord 7663: 7664: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7665: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7666: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7667: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7668: //NOT.L <ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |0100_011_010_mmm_rrr 7669: public static void irpNotLong () throws M68kException { 7670: int ea = XEiJ.regOC & 63; 7671: int z; 7672: if (ea < XEiJ.EA_AR) { //NOT.L Dr 7673: XEiJ.mpuCycleCount++; 7674: z = XEiJ.regRn[ea] ^= 0xffffffff; 7675: } else { //NOT.L <mem> 7676: XEiJ.mpuCycleCount++; 7677: int a = efaMltLong (ea); 7678: mmuWriteLongData (a, z = ~mmuModifyLongData (a, XEiJ.regSRS), XEiJ.regSRS); 7679: } 7680: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 7681: } //irpNotLong 7682: 7683: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7684: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7685: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7686: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7687: //MOVE.W <ea>,SR |-|012346|P|UUUUU|*****|D M+-WXZPI|0100_011_011_mmm_rrr 7688: public static void irpMoveToSR () throws M68kException { 7689: if (XEiJ.regSRS == 0) { //ユーザモードのとき 7690: M68kException.m6eNumber = M68kException.M6E_PRIVILEGE_VIOLATION; 7691: throw M68kException.m6eSignal; 7692: } 7693: //以下はスーパーバイザモード 7694: XEiJ.mpuCycleCount += 12; 7695: int ea = XEiJ.regOC & 63; 7696: irpSetSR (ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, 1) : mmuReadWordZeroData (efaAnyWord (ea), 1)); //特権違反チェックが先。pcwz。イミディエイトを分離 7697: } //irpMoveToSR 7698: 7699: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7700: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7701: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7702: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7703: //NBCD.B <ea> |-|012346|-|UUUUU|*U*U*|D M+-WXZ |0100_100_000_mmm_rrr 7704: //LINK.L Ar,#<data> |-|--2346|-|-----|-----| |0100_100_000_001_rrr-{data} 7705: // 7706: //LINK.L Ar,#<data> 7707: // PEA.L (Ar);MOVEA.L A7,Ar;ADDA.L #<data>,A7と同じ 7708: // LINK.L A7,#<data>はA7をデクリメントする前の値がプッシュされ、A7に#<data>が加算される 7709: public static void irpNbcd () throws M68kException { 7710: int ea = XEiJ.regOC & 63; 7711: if (ea < XEiJ.EA_AR) { //NBCD.B Dr 7712: XEiJ.mpuCycleCount++; 7713: XEiJ.regRn[ea] = ~0xff & XEiJ.regRn[ea] | irpSbcd (0, XEiJ.regRn[ea]); 7714: } else if (ea < XEiJ.EA_MM) { //LINK.L Ar,#<data> 7715: XEiJ.mpuCycleCount += 2; 7716: int o = mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS); //pcls 7717: int arr = XEiJ.regOC - (0b0100_100_000_001_000 - 8); 7718: //評価順序に注意。LINK.L A7,#<data>のときプッシュするのはA7をデクリメントする前の値。wl(r[15]-=4,r[8+rrr])は不可 7719: int a = XEiJ.regRn[arr]; 7720: m60Incremented -= 4L << (7 << 3); 7721: int sp = m60Address = XEiJ.regRn[15] -= 4; 7722: mmuWriteLongData (sp, a, XEiJ.regSRS); //pushl 7723: XEiJ.regRn[arr] = sp; 7724: XEiJ.regRn[15] = sp + o; 7725: } else { //NBCD.B <mem> 7726: XEiJ.mpuCycleCount++; 7727: int a = efaMltByte (ea); 7728: mmuWriteByteData (a, irpSbcd (0, mmuModifyByteSignData (a, XEiJ.regSRS)), XEiJ.regSRS); 7729: } 7730: } //irpNbcd 7731: 7732: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7733: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7734: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7735: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7736: //SWAP.W Dr |-|012346|-|-UUUU|-**00|D |0100_100_001_000_rrr 7737: //BKPT #<data> |-|-12346|-|-----|-----| |0100_100_001_001_ddd 7738: //PEA.L <ea> |-|012346|-|-----|-----| M WXZP |0100_100_001_mmm_rrr 7739: public static void irpPea () throws M68kException { 7740: int ea = XEiJ.regOC & 63; 7741: if (ea < XEiJ.EA_AR) { //SWAP.W Dr 7742: XEiJ.mpuCycleCount++; 7743: int x; 7744: int z; 7745: XEiJ.regRn[ea] = z = (x = XEiJ.regRn[ea]) << 16 | x >>> 16; 7746: //上位ワードと下位ワードを入れ替えた後のDrをロングでテストする 7747: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 7748: } else { //PEA.L <ea> 7749: XEiJ.mpuCycleCount++; 7750: //評価順序に注意。実効アドレスを求めてからspをデクリメントすること 7751: int a = efaLeaPea (ea); //BKPT #<data>はここでillegal instructionになる 7752: m60Incremented -= 4L << (7 << 3); 7753: int sp = m60Address = XEiJ.regRn[15] -= 4; 7754: mmuWriteLongData (sp, a, XEiJ.regSRS); 7755: } 7756: } //irpPea 7757: 7758: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7759: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7760: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7761: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7762: //EXT.W Dr |-|012346|-|-UUUU|-**00|D |0100_100_010_000_rrr 7763: //MOVEM.W <list>,<ea> |-|012346|-|-----|-----| M -WXZ |0100_100_010_mmm_rrr-llllllllllllllll 7764: public static void irpMovemToMemWord () throws M68kException { 7765: int ea = XEiJ.regOC & 63; 7766: if (ea < XEiJ.EA_AR) { //EXT.W Dr 7767: XEiJ.mpuCycleCount++; 7768: int z; 7769: XEiJ.regRn[ea] = ~0xffff & (z = XEiJ.regRn[ea]) | (char) (z = (byte) z); 7770: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 7771: } else { //MOVEM.W <list>,<ea> 7772: int l = mmuReadWordZeroExword (XEiJ.regPC, XEiJ.regSRS); //pcwze。レジスタリスト。ゼロ拡張 7773: XEiJ.regPC += 2; 7774: if (ea >> 3 == XEiJ.MMM_MN) { //-(Ar) 7775: //MOVEM.wl <list>,-(Ar)で<list>にArが含まれているとき、000/010は命令開始時のArを、020/030/040/060は命令開始時のAr-オペレーションサイズをメモリに書き込む 7776: //転送するレジスタが0個のときArは変化しない 7777: int arr = ea - (XEiJ.EA_MN - 8); 7778: m60Incremented -= 2L << (arr << 3); //longのシフトカウントは6bitでマスクされる 7779: int a = m60Address = XEiJ.regRn[arr]; 7780: XEiJ.regRn[arr] = a - 2; 7781: int t = a; 7782: if (XEiJ.IRP_MOVEM_EXPAND) { //16回展開する 7783: if ((l & 0x0001) != 0) { 7784: mmuWriteWordData (m60Address = a -= 2, XEiJ.regRn[15], XEiJ.regSRS); 7785: } 7786: if ((l & 0x0002) != 0) { 7787: mmuWriteWordData (m60Address = a -= 2, XEiJ.regRn[14], XEiJ.regSRS); 7788: } 7789: if ((l & 0x0004) != 0) { 7790: mmuWriteWordData (m60Address = a -= 2, XEiJ.regRn[13], XEiJ.regSRS); 7791: } 7792: if ((l & 0x0008) != 0) { 7793: mmuWriteWordData (m60Address = a -= 2, XEiJ.regRn[12], XEiJ.regSRS); 7794: } 7795: if ((l & 0x0010) != 0) { 7796: mmuWriteWordData (m60Address = a -= 2, XEiJ.regRn[11], XEiJ.regSRS); 7797: } 7798: if ((l & 0x0020) != 0) { 7799: mmuWriteWordData (m60Address = a -= 2, XEiJ.regRn[10], XEiJ.regSRS); 7800: } 7801: if ((l & 0x0040) != 0) { 7802: mmuWriteWordData (m60Address = a -= 2, XEiJ.regRn[ 9], XEiJ.regSRS); 7803: } 7804: if ((byte) l < 0) { //(l & 0x0080) != 0 7805: mmuWriteWordData (m60Address = a -= 2, XEiJ.regRn[ 8], XEiJ.regSRS); 7806: } 7807: if ((l & 0x0100) != 0) { 7808: mmuWriteWordData (m60Address = a -= 2, XEiJ.regRn[ 7], XEiJ.regSRS); 7809: } 7810: if ((l & 0x0200) != 0) { 7811: mmuWriteWordData (m60Address = a -= 2, XEiJ.regRn[ 6], XEiJ.regSRS); 7812: } 7813: if ((l & 0x0400) != 0) { 7814: mmuWriteWordData (m60Address = a -= 2, XEiJ.regRn[ 5], XEiJ.regSRS); 7815: } 7816: if ((l & 0x0800) != 0) { 7817: mmuWriteWordData (m60Address = a -= 2, XEiJ.regRn[ 4], XEiJ.regSRS); 7818: } 7819: if ((l & 0x1000) != 0) { 7820: mmuWriteWordData (m60Address = a -= 2, XEiJ.regRn[ 3], XEiJ.regSRS); 7821: } 7822: if ((l & 0x2000) != 0) { 7823: mmuWriteWordData (m60Address = a -= 2, XEiJ.regRn[ 2], XEiJ.regSRS); 7824: } 7825: if ((l & 0x4000) != 0) { 7826: mmuWriteWordData (m60Address = a -= 2, XEiJ.regRn[ 1], XEiJ.regSRS); 7827: } 7828: if ((short) l < 0) { //(l & 0x8000) != 0 7829: mmuWriteWordData (m60Address = a -= 2, XEiJ.regRn[ 0], XEiJ.regSRS); 7830: } 7831: } else if (XEiJ.IRP_MOVEM_LOOP) { //16回ループする。コンパイラが展開する 7832: for (int i = 15; i >= 0; i--) { 7833: if ((l & 0x8000 >>> i) != 0) { 7834: mmuWriteWordData (m60Address = a -= 2, XEiJ.regRn[i], XEiJ.regSRS); 7835: } 7836: } 7837: } else if (XEiJ.IRP_MOVEM_SHIFT_LEFT) { //0になるまで左にシフトする 7838: l = XEiJ.MPU_BITREV_TABLE_0[l & 2047] | XEiJ.MPU_BITREV_TABLE_1[l << 10 >>> 21]; //Integer.reverse(l) 7839: for (int i = 15; l != 0; i--, l <<= 1) { 7840: if (l < 0) { 7841: mmuWriteWordData (m60Address = a -= 2, XEiJ.regRn[i], XEiJ.regSRS); 7842: } 7843: } 7844: } else if (XEiJ.IRP_MOVEM_SHIFT_RIGHT) { //0になるまで右にシフトする 7845: for (int i = 15; l != 0; i--, l >>>= 1) { 7846: if ((l & 1) != 0) { 7847: mmuWriteWordData (m60Address = a -= 2, XEiJ.regRn[i], XEiJ.regSRS); 7848: } 7849: } 7850: } else if (XEiJ.IRP_MOVEM_ZEROS) { //Integer.numberOfTrailingZerosを使う 7851: for (int i = 15; l != 0; ) { 7852: int k = Integer.numberOfTrailingZeros (l); 7853: mmuWriteWordData (m60Address = a -= 2, XEiJ.regRn[i -= k], XEiJ.regSRS); 7854: l = l >>> k & ~1; 7855: } 7856: } 7857: m60Incremented += 2L << (arr << 3); //元に戻しておく。longのシフトカウントは6bitでマスクされる 7858: XEiJ.regRn[arr] = a; 7859: XEiJ.mpuCycleCount += t - a >> 1; //2バイト/個→1サイクル/個 7860: } else { //-(Ar)以外 7861: int a = efaCltWord (ea); 7862: int t = a; 7863: if (XEiJ.IRP_MOVEM_EXPAND) { //16回展開する 7864: if ((l & 0x0001) != 0) { 7865: mmuWriteWordData (m60Address = a, XEiJ.regRn[ 0], XEiJ.regSRS); 7866: a += 2; 7867: } 7868: if ((l & 0x0002) != 0) { 7869: mmuWriteWordData (m60Address = a, XEiJ.regRn[ 1], XEiJ.regSRS); 7870: a += 2; 7871: } 7872: if ((l & 0x0004) != 0) { 7873: mmuWriteWordData (m60Address = a, XEiJ.regRn[ 2], XEiJ.regSRS); 7874: a += 2; 7875: } 7876: if ((l & 0x0008) != 0) { 7877: mmuWriteWordData (m60Address = a, XEiJ.regRn[ 3], XEiJ.regSRS); 7878: a += 2; 7879: } 7880: if ((l & 0x0010) != 0) { 7881: mmuWriteWordData (m60Address = a, XEiJ.regRn[ 4], XEiJ.regSRS); 7882: a += 2; 7883: } 7884: if ((l & 0x0020) != 0) { 7885: mmuWriteWordData (m60Address = a, XEiJ.regRn[ 5], XEiJ.regSRS); 7886: a += 2; 7887: } 7888: if ((l & 0x0040) != 0) { 7889: mmuWriteWordData (m60Address = a, XEiJ.regRn[ 6], XEiJ.regSRS); 7890: a += 2; 7891: } 7892: if ((byte) l < 0) { //(l & 0x0080) != 0 7893: mmuWriteWordData (m60Address = a, XEiJ.regRn[ 7], XEiJ.regSRS); 7894: a += 2; 7895: } 7896: if ((l & 0x0100) != 0) { 7897: mmuWriteWordData (m60Address = a, XEiJ.regRn[ 8], XEiJ.regSRS); 7898: a += 2; 7899: } 7900: if ((l & 0x0200) != 0) { 7901: mmuWriteWordData (m60Address = a, XEiJ.regRn[ 9], XEiJ.regSRS); 7902: a += 2; 7903: } 7904: if ((l & 0x0400) != 0) { 7905: mmuWriteWordData (m60Address = a, XEiJ.regRn[10], XEiJ.regSRS); 7906: a += 2; 7907: } 7908: if ((l & 0x0800) != 0) { 7909: mmuWriteWordData (m60Address = a, XEiJ.regRn[11], XEiJ.regSRS); 7910: a += 2; 7911: } 7912: if ((l & 0x1000) != 0) { 7913: mmuWriteWordData (m60Address = a, XEiJ.regRn[12], XEiJ.regSRS); 7914: a += 2; 7915: } 7916: if ((l & 0x2000) != 0) { 7917: mmuWriteWordData (m60Address = a, XEiJ.regRn[13], XEiJ.regSRS); 7918: a += 2; 7919: } 7920: if ((l & 0x4000) != 0) { 7921: mmuWriteWordData (m60Address = a, XEiJ.regRn[14], XEiJ.regSRS); 7922: a += 2; 7923: } 7924: if ((short) l < 0) { //(l & 0x8000) != 0 7925: mmuWriteWordData (m60Address = a, XEiJ.regRn[15], XEiJ.regSRS); 7926: a += 2; 7927: } 7928: } else if (XEiJ.IRP_MOVEM_LOOP) { //16回ループする。コンパイラが展開する 7929: for (int i = 0; i <= 15; i++) { 7930: if ((l & 0x0001 << i) != 0) { 7931: mmuWriteWordData (m60Address = a, XEiJ.regRn[i], XEiJ.regSRS); 7932: a += 2; 7933: } 7934: } 7935: } else if (XEiJ.IRP_MOVEM_SHIFT_LEFT) { //0になるまで左にシフトする 7936: l = XEiJ.MPU_BITREV_TABLE_0[l & 2047] | XEiJ.MPU_BITREV_TABLE_1[l << 10 >>> 21]; //Integer.reverse(l) 7937: for (int i = 0; l != 0; i++, l <<= 1) { 7938: if (l < 0) { 7939: mmuWriteWordData (m60Address = a, XEiJ.regRn[i], XEiJ.regSRS); 7940: a += 2; 7941: } 7942: } 7943: } else if (XEiJ.IRP_MOVEM_SHIFT_RIGHT) { //0になるまで右にシフトする 7944: for (int i = 0; l != 0; i++, l >>>= 1) { 7945: if ((l & 1) != 0) { 7946: mmuWriteWordData (m60Address = a, XEiJ.regRn[i], XEiJ.regSRS); 7947: a += 2; 7948: } 7949: } 7950: } else if (XEiJ.IRP_MOVEM_ZEROS) { //Integer.numberOfTrailingZerosを使う 7951: for (int i = 0; l != 0; ) { 7952: int k = Integer.numberOfTrailingZeros (l); 7953: mmuWriteWordData (m60Address = a, XEiJ.regRn[i += k], XEiJ.regSRS); 7954: a += 2; 7955: l = l >>> k & ~1; 7956: } 7957: } 7958: XEiJ.mpuCycleCount += a - t >> 1; //2バイト/個→1サイクル/個 7959: } 7960: } 7961: } //irpMovemToMemWord 7962: 7963: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7964: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7965: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7966: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7967: //EXT.L Dr |-|012346|-|-UUUU|-**00|D |0100_100_011_000_rrr 7968: //MOVEM.L <list>,<ea> |-|012346|-|-----|-----| M -WXZ |0100_100_011_mmm_rrr-llllllllllllllll 7969: public static void irpMovemToMemLong () throws M68kException { 7970: int ea = XEiJ.regOC & 63; 7971: if (ea < XEiJ.EA_AR) { //EXT.L Dr 7972: XEiJ.mpuCycleCount++; 7973: int z; 7974: XEiJ.regRn[ea] = z = (short) XEiJ.regRn[ea]; 7975: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 7976: } else { //MOVEM.L <list>,<ea> 7977: int l = mmuReadWordZeroExword (XEiJ.regPC, XEiJ.regSRS); //pcwze。レジスタリスト。ゼロ拡張 7978: XEiJ.regPC += 2; 7979: if (ea >> 3 == XEiJ.MMM_MN) { //-(Ar) 7980: //MOVEM.wl <list>,-(Ar)で<list>にArが含まれているとき、000/010は命令開始時のArを、020/030/040/060は命令開始時のAr-オペレーションサイズをメモリに書き込む 7981: //転送するレジスタが0個のときArは変化しない 7982: int arr = ea - (XEiJ.EA_MN - 8); 7983: m60Incremented -= 4L << (arr << 3); //longのシフトカウントは6bitでマスクされる 7984: int a = m60Address = XEiJ.regRn[arr]; 7985: XEiJ.regRn[arr] = a - 4; 7986: int t = a; 7987: if (XEiJ.IRP_MOVEM_EXPAND) { //16回展開する 7988: if ((l & 0x0001) != 0) { 7989: mmuWriteLongData (m60Address = a -= 4, XEiJ.regRn[15], XEiJ.regSRS); 7990: } 7991: if ((l & 0x0002) != 0) { 7992: mmuWriteLongData (m60Address = a -= 4, XEiJ.regRn[14], XEiJ.regSRS); 7993: } 7994: if ((l & 0x0004) != 0) { 7995: mmuWriteLongData (m60Address = a -= 4, XEiJ.regRn[13], XEiJ.regSRS); 7996: } 7997: if ((l & 0x0008) != 0) { 7998: mmuWriteLongData (m60Address = a -= 4, XEiJ.regRn[12], XEiJ.regSRS); 7999: } 8000: if ((l & 0x0010) != 0) { 8001: mmuWriteLongData (m60Address = a -= 4, XEiJ.regRn[11], XEiJ.regSRS); 8002: } 8003: if ((l & 0x0020) != 0) { 8004: mmuWriteLongData (m60Address = a -= 4, XEiJ.regRn[10], XEiJ.regSRS); 8005: } 8006: if ((l & 0x0040) != 0) { 8007: mmuWriteLongData (m60Address = a -= 4, XEiJ.regRn[ 9], XEiJ.regSRS); 8008: } 8009: if ((byte) l < 0) { //(l & 0x0080) != 0 8010: mmuWriteLongData (m60Address = a -= 4, XEiJ.regRn[ 8], XEiJ.regSRS); 8011: } 8012: if ((l & 0x0100) != 0) { 8013: mmuWriteLongData (m60Address = a -= 4, XEiJ.regRn[ 7], XEiJ.regSRS); 8014: } 8015: if ((l & 0x0200) != 0) { 8016: mmuWriteLongData (m60Address = a -= 4, XEiJ.regRn[ 6], XEiJ.regSRS); 8017: } 8018: if ((l & 0x0400) != 0) { 8019: mmuWriteLongData (m60Address = a -= 4, XEiJ.regRn[ 5], XEiJ.regSRS); 8020: } 8021: if ((l & 0x0800) != 0) { 8022: mmuWriteLongData (m60Address = a -= 4, XEiJ.regRn[ 4], XEiJ.regSRS); 8023: } 8024: if ((l & 0x1000) != 0) { 8025: mmuWriteLongData (m60Address = a -= 4, XEiJ.regRn[ 3], XEiJ.regSRS); 8026: } 8027: if ((l & 0x2000) != 0) { 8028: mmuWriteLongData (m60Address = a -= 4, XEiJ.regRn[ 2], XEiJ.regSRS); 8029: } 8030: if ((l & 0x4000) != 0) { 8031: mmuWriteLongData (m60Address = a -= 4, XEiJ.regRn[ 1], XEiJ.regSRS); 8032: } 8033: if ((short) l < 0) { //(l & 0x8000) != 0 8034: mmuWriteLongData (m60Address = a -= 4, XEiJ.regRn[ 0], XEiJ.regSRS); 8035: } 8036: } else if (XEiJ.IRP_MOVEM_LOOP) { //16回ループする。コンパイラが展開する 8037: for (int i = 15; i >= 0; i--) { 8038: if ((l & 0x8000 >>> i) != 0) { 8039: mmuWriteLongData (m60Address = a -= 4, XEiJ.regRn[i], XEiJ.regSRS); 8040: } 8041: } 8042: } else if (XEiJ.IRP_MOVEM_SHIFT_LEFT) { //0になるまで左にシフトする 8043: l = XEiJ.MPU_BITREV_TABLE_0[l & 2047] | XEiJ.MPU_BITREV_TABLE_1[l << 10 >>> 21]; //Integer.reverse(l) 8044: for (int i = 15; l != 0; i--, l <<= 1) { 8045: if (l < 0) { 8046: mmuWriteLongData (m60Address = a -= 4, XEiJ.regRn[i], XEiJ.regSRS); 8047: } 8048: } 8049: } else if (XEiJ.IRP_MOVEM_SHIFT_RIGHT) { //0になるまで右にシフトする 8050: for (int i = 15; l != 0; i--, l >>>= 1) { 8051: if ((l & 1) != 0) { 8052: mmuWriteLongData (m60Address = a -= 4, XEiJ.regRn[i], XEiJ.regSRS); 8053: } 8054: } 8055: } else if (XEiJ.IRP_MOVEM_ZEROS) { //Integer.numberOfTrailingZerosを使う 8056: for (int i = 15; l != 0; ) { 8057: int k = Integer.numberOfTrailingZeros (l); 8058: mmuWriteLongData (m60Address = a -= 4, XEiJ.regRn[i -= k], XEiJ.regSRS); 8059: l = l >>> k & ~1; 8060: } 8061: } 8062: m60Incremented += 4L << (arr << 3); //元に戻しておく。longのシフトカウントは6bitでマスクされる 8063: XEiJ.regRn[arr] = a; 8064: XEiJ.mpuCycleCount += t - a >> 2; //4バイト/個→1サイクル/個 8065: } else { //-(Ar)以外 8066: int a = efaCltLong (ea); 8067: int t = a; 8068: if (XEiJ.IRP_MOVEM_EXPAND) { //16回展開する 8069: if ((l & 0x0001) != 0) { 8070: mmuWriteLongData (m60Address = a, XEiJ.regRn[ 0], XEiJ.regSRS); 8071: a += 4; 8072: } 8073: if ((l & 0x0002) != 0) { 8074: mmuWriteLongData (m60Address = a, XEiJ.regRn[ 1], XEiJ.regSRS); 8075: a += 4; 8076: } 8077: if ((l & 0x0004) != 0) { 8078: mmuWriteLongData (m60Address = a, XEiJ.regRn[ 2], XEiJ.regSRS); 8079: a += 4; 8080: } 8081: if ((l & 0x0008) != 0) { 8082: mmuWriteLongData (m60Address = a, XEiJ.regRn[ 3], XEiJ.regSRS); 8083: a += 4; 8084: } 8085: if ((l & 0x0010) != 0) { 8086: mmuWriteLongData (m60Address = a, XEiJ.regRn[ 4], XEiJ.regSRS); 8087: a += 4; 8088: } 8089: if ((l & 0x0020) != 0) { 8090: mmuWriteLongData (m60Address = a, XEiJ.regRn[ 5], XEiJ.regSRS); 8091: a += 4; 8092: } 8093: if ((l & 0x0040) != 0) { 8094: mmuWriteLongData (m60Address = a, XEiJ.regRn[ 6], XEiJ.regSRS); 8095: a += 4; 8096: } 8097: if ((byte) l < 0) { //(l & 0x0080) != 0 8098: mmuWriteLongData (m60Address = a, XEiJ.regRn[ 7], XEiJ.regSRS); 8099: a += 4; 8100: } 8101: if ((l & 0x0100) != 0) { 8102: mmuWriteLongData (m60Address = a, XEiJ.regRn[ 8], XEiJ.regSRS); 8103: a += 4; 8104: } 8105: if ((l & 0x0200) != 0) { 8106: mmuWriteLongData (m60Address = a, XEiJ.regRn[ 9], XEiJ.regSRS); 8107: a += 4; 8108: } 8109: if ((l & 0x0400) != 0) { 8110: mmuWriteLongData (m60Address = a, XEiJ.regRn[10], XEiJ.regSRS); 8111: a += 4; 8112: } 8113: if ((l & 0x0800) != 0) { 8114: mmuWriteLongData (m60Address = a, XEiJ.regRn[11], XEiJ.regSRS); 8115: a += 4; 8116: } 8117: if ((l & 0x1000) != 0) { 8118: mmuWriteLongData (m60Address = a, XEiJ.regRn[12], XEiJ.regSRS); 8119: a += 4; 8120: } 8121: if ((l & 0x2000) != 0) { 8122: mmuWriteLongData (m60Address = a, XEiJ.regRn[13], XEiJ.regSRS); 8123: a += 4; 8124: } 8125: if ((l & 0x4000) != 0) { 8126: mmuWriteLongData (m60Address = a, XEiJ.regRn[14], XEiJ.regSRS); 8127: a += 4; 8128: } 8129: if ((short) l < 0) { //(l & 0x8000) != 0 8130: mmuWriteLongData (m60Address = a, XEiJ.regRn[15], XEiJ.regSRS); 8131: a += 4; 8132: } 8133: } else if (XEiJ.IRP_MOVEM_LOOP) { //16回ループする。コンパイラが展開する 8134: for (int i = 0; i <= 15; i++) { 8135: if ((l & 0x0001 << i) != 0) { 8136: mmuWriteLongData (m60Address = a, XEiJ.regRn[i], XEiJ.regSRS); 8137: a += 4; 8138: } 8139: } 8140: } else if (XEiJ.IRP_MOVEM_SHIFT_LEFT) { //0になるまで左にシフトする 8141: l = XEiJ.MPU_BITREV_TABLE_0[l & 2047] | XEiJ.MPU_BITREV_TABLE_1[l << 10 >>> 21]; //Integer.reverse(l) 8142: for (int i = 0; l != 0; i++, l <<= 1) { 8143: if (l < 0) { 8144: mmuWriteLongData (m60Address = a, XEiJ.regRn[i], XEiJ.regSRS); 8145: a += 4; 8146: } 8147: } 8148: } else if (XEiJ.IRP_MOVEM_SHIFT_RIGHT) { //0になるまで右にシフトする 8149: for (int i = 0; l != 0; i++, l >>>= 1) { 8150: if ((l & 1) != 0) { 8151: mmuWriteLongData (m60Address = a, XEiJ.regRn[i], XEiJ.regSRS); 8152: a += 4; 8153: } 8154: } 8155: } else if (XEiJ.IRP_MOVEM_ZEROS) { //Integer.numberOfTrailingZerosを使う 8156: for (int i = 0; l != 0; ) { 8157: int k = Integer.numberOfTrailingZeros (l); 8158: mmuWriteLongData (m60Address = a, XEiJ.regRn[i += k], XEiJ.regSRS); 8159: a += 4; 8160: l = l >>> k & ~1; 8161: } 8162: } 8163: XEiJ.mpuCycleCount += a - t >> 2; //4バイト/個→1サイクル/個 8164: } 8165: } 8166: } //irpMovemToMemLong 8167: 8168: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8169: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 8170: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 8171: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8172: //TST.B <ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |0100_101_000_mmm_rrr 8173: //TST.B <ea> |-|--2346|-|-UUUU|-**00| PI|0100_101_000_mmm_rrr 8174: public static void irpTstByte () throws M68kException { 8175: XEiJ.mpuCycleCount++; 8176: int ea = XEiJ.regOC & 63; 8177: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & (ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadByteSignExword ((XEiJ.regPC += 2) - 1, XEiJ.regSRS) : mmuReadByteSignData (efaAnyByte (ea), XEiJ.regSRS))]; //ccr_tst_byte。pcbs。イミディエイトを分離。アドレッシングモードに注意 8178: } //irpTstByte 8179: 8180: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8181: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 8182: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 8183: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8184: //TST.W <ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |0100_101_001_mmm_rrr 8185: //TST.W <ea> |-|--2346|-|-UUUU|-**00| A PI|0100_101_001_mmm_rrr 8186: public static void irpTstWord () throws M68kException { 8187: XEiJ.mpuCycleCount++; 8188: int ea = XEiJ.regOC & 63; 8189: int z = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) : mmuReadWordSignData (efaAnyWord (ea), XEiJ.regSRS); //pcws。イミディエイトを分離。アドレッシングモードに注意。このr[ea]はデータレジスタまたはアドレスレジスタ 8190: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (char) z - 1 >> 31 & XEiJ.REG_CCR_Z | ((short) z < 0 ? XEiJ.REG_CCR_N : 0); //ccr_tst_word 8191: } //irpTstWord 8192: 8193: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8194: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 8195: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 8196: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8197: //TST.L <ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |0100_101_010_mmm_rrr 8198: //TST.L <ea> |-|--2346|-|-UUUU|-**00| A PI|0100_101_010_mmm_rrr 8199: public static void irpTstLong () throws M68kException { 8200: XEiJ.mpuCycleCount++; 8201: int ea = XEiJ.regOC & 63; 8202: int z = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS) : mmuReadLongData (efaAnyLong (ea), XEiJ.regSRS); //pcls。イミディエイトを分離。アドレッシングモードに注意。このr[ea]はデータレジスタまたはアドレスレジスタ 8203: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 8204: } //irpTstLong 8205: 8206: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8207: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 8208: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 8209: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8210: //TAS.B <ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |0100_101_011_mmm_rrr 8211: //ILLEGAL |-|012346|-|-----|-----| |0100_101_011_111_100 8212: public static void irpTas () throws M68kException { 8213: int ea = XEiJ.regOC & 63; 8214: int z; 8215: if (ea < XEiJ.EA_AR) { //TAS.B Dr 8216: XEiJ.mpuCycleCount++; 8217: XEiJ.regRn[ea] = 0x80 | (z = XEiJ.regRn[ea]); 8218: } else { //TAS.B <mem> 8219: XEiJ.mpuCycleCount += 17; 8220: int a = efaMltByte (ea); 8221: mmuWriteByteData (a, 0x80 | (z = mmuModifyByteSignData (a, XEiJ.regSRS)), XEiJ.regSRS); 8222: } 8223: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & z]; //ccr_tst_byte 8224: } //irpTas 8225: 8226: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8227: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 8228: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 8229: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8230: //MULU.L <ea>,Dl |-|--2346|-|-UUUU|-***0|D M+-WXZPI|0100_110_000_mmm_rrr-0lll000000000hhh (h is not used) 8231: //MULU.L <ea>,Dh:Dl |-|--234S|-|-UUUU|-***0|D M+-WXZPI|0100_110_000_mmm_rrr-0lll010000000hhh (if h=l then result is not defined) 8232: //MULS.L <ea>,Dl |-|--2346|-|-UUUU|-***0|D M+-WXZPI|0100_110_000_mmm_rrr-0lll100000000hhh (h is not used) 8233: //MULS.L <ea>,Dh:Dl |-|--234S|-|-UUUU|-***0|D M+-WXZPI|0100_110_000_mmm_rrr-0lll110000000hhh (if h=l then result is not defined) 8234: public static void irpMuluMulsLong () throws M68kException { 8235: int w = mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); //pcwz。拡張ワード 8236: if ((w & ~0b0111_110_000_000_111) != 0) { 8237: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 8238: throw M68kException.m6eSignal; 8239: } 8240: if ((w & 0b0000_010_000_000_000) != 0) { //64bit積 8241: M68kException.m6eNumber = M68kException.M6E_UNIMPLEMENTED_INSTRUCTION; 8242: throw M68kException.m6eSignal; 8243: } 8244: //32bit積 8245: int s = w & 0b0000_100_000_000_000; //0=MULU,1=MULS 8246: int l = w >> 12; //被乗数,積 8247: XEiJ.mpuCycleCount += 2; 8248: int ea = XEiJ.regOC & 63; 8249: long yy = (long) (ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS) : mmuReadLongData (efaAnyLong (ea), XEiJ.regSRS)); //pcls。イミディエイトを分離 8250: long xx = (long) XEiJ.regRn[l]; 8251: if (s == 0) { //MULU 8252: long zz = (0xffffffffL & xx) * (0xffffffffL & yy); 8253: int z = XEiJ.regRn[l] = (int) zz; 8254: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | (zz >>> 32 != 0L ? XEiJ.REG_CCR_V : 0); 8255: } else { //MULS 8256: long zz = xx * yy; 8257: int z = XEiJ.regRn[l] = (int) zz; 8258: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | (z != zz ? XEiJ.REG_CCR_V : 0); 8259: } 8260: } //irpMuluMulsLong 8261: 8262: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8263: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 8264: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 8265: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8266: //DIVU.L <ea>,Dq |-|--2346|-|-UUUU|-***0|D M+-WXZPI|0100_110_001_mmm_rrr-0qqq000000000qqq 8267: //DIVUL.L <ea>,Dr:Dq |-|--2346|-|-UUUU|-***0|D M+-WXZPI|0100_110_001_mmm_rrr-0qqq000000000rrr (q is not equal to r) 8268: //DIVU.L <ea>,Dr:Dq |-|--234S|-|-UUUU|-***0|D M+-WXZPI|0100_110_001_mmm_rrr-0qqq010000000rrr (q is not equal to r) 8269: //DIVS.L <ea>,Dq |-|--2346|-|-UUUU|-***0|D M+-WXZPI|0100_110_001_mmm_rrr-0qqq100000000qqq 8270: //DIVSL.L <ea>,Dr:Dq |-|--2346|-|-UUUU|-***0|D M+-WXZPI|0100_110_001_mmm_rrr-0qqq100000000rrr (q is not equal to r) 8271: //DIVS.L <ea>,Dr:Dq |-|--234S|-|-UUUU|-***0|D M+-WXZPI|0100_110_001_mmm_rrr-0qqq110000000rrr (q is not equal to r) 8272: // 8273: //DIVS.L <ea>,Dq 8274: // 32bit被除数Dq/32bit除数<ea>→32bit商Dq 8275: // 8276: //DIVS.L <ea>,Dr:Dq 8277: // 64bit被除数Dr:Dq/32bit除数<ea>→32bit余りDr:32bit商Dq 8278: // M68000PRMでDIVS.Lのアドレッシングモードがデータ可変と書かれているのはデータの間違い 8279: // 8280: //DIVSL.L <ea>,Dr:Dq 8281: // 32bit被除数Dq/32bit除数<ea>→32bit余りDr:32bit商Dq 8282: // 8283: //DIVU.L <ea>,Dq 8284: // 32bit被除数Dq/32bit除数<ea>→32bit商Dq 8285: // 8286: //DIVU.L <ea>,Dr:Dq 8287: // 64bit被除数Dr:Dq/32bit除数<ea>→32bit余りDr:32bit商Dq 8288: // 8289: //DIVUL.L <ea>,Dr:Dq 8290: // 32bit被除数Dq/32bit除数<ea>→32bit余りDr:32bit商Dq 8291: public static void irpDivuDivsLong () throws M68kException { 8292: int w = mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); //pcwz。拡張ワード 8293: if ((w & ~0b0111_110_000_000_111) != 0) { 8294: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 8295: throw M68kException.m6eSignal; 8296: } 8297: if ((w & 0b0000_010_000_000_000) != 0) { //64bit被除数 8298: M68kException.m6eNumber = M68kException.M6E_UNIMPLEMENTED_INSTRUCTION; 8299: throw M68kException.m6eSignal; 8300: } 8301: //32bit被除数 8302: int s = w & 0b0000_100_000_000_000; //0=DIVU,1=DIVS 8303: int h = w & 7; //余り 8304: int l = w >> 12; //被除数,商 8305: int ea = XEiJ.regOC & 63; 8306: int y = ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS) : mmuReadLongData (efaAnyLong (ea), XEiJ.regSRS); //除数。pcls。イミディエイトを分離 8307: if (s == 0) { //符号なし。DIVU.L <ea>,* 8308: XEiJ.mpuCycleCount += 38; //最大 8309: long yy = (long) y & 0xffffffffL; //除数 8310: if (y == 0) { //ゼロ除算 8311: XEiJ.regCCR = (XEiJ.regCCR & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_N | XEiJ.REG_CCR_Z | XEiJ.REG_CCR_V) //XとNとZとVは変化しない 8312: ); //Cは常にクリア 8313: XEiJ.mpuCycleCount += 38 - 34; 8314: m60Address = XEiJ.regPC0; //アドレスは命令の先頭 8315: M68kException.m6eNumber = M68kException.M6E_DIVIDE_BY_ZERO; 8316: throw M68kException.m6eSignal; 8317: } //if ゼロ除算 8318: long xx = (long) XEiJ.regRn[l] & 0xffffffffL; //被除数 8319: long zz = (long) ((double) xx / (double) yy); //double→intのキャストは飽和変換で0xffffffff/0x00000001が0x7fffffffになってしまうのでdouble→longとする 8320: int z = XEiJ.regRn[l] = (int) zz; //商 8321: if (h != l) { 8322: XEiJ.regRn[h] = (int) (xx - yy * zz); //余り 8323: } 8324: XEiJ.regCCR = (XEiJ.regCCR & XEiJ.REG_CCR_X | //Xは変化しない 8325: (z < 0 ? XEiJ.REG_CCR_N : 0) | //Nは商が負のときセット、さもなくばクリア 8326: (z == 0 ? XEiJ.REG_CCR_Z : 0) //Zは商が0のときセット、さもなくばクリア 8327: ); //VとCは常にクリア 8328: } else { //符号あり。DIVS.L <ea>,* 8329: XEiJ.mpuCycleCount += 38; //最大 8330: long yy = (long) y; //除数 8331: if (y == 0) { //ゼロ除算 8332: XEiJ.regCCR = (XEiJ.regCCR & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_N | XEiJ.REG_CCR_Z | XEiJ.REG_CCR_V) //XとNとZとVは変化しない 8333: ); //Cは常にクリア 8334: XEiJ.mpuCycleCount += 38 - 34; 8335: m60Address = XEiJ.regPC0; //アドレスは命令の先頭 8336: M68kException.m6eNumber = M68kException.M6E_DIVIDE_BY_ZERO; 8337: throw M68kException.m6eSignal; 8338: } //if ゼロ除算 8339: long xx = (long) XEiJ.regRn[l]; //被除数 8340: long zz = xx / yy; //商 8341: if ((int) zz != zz) { //オーバーフローあり 8342: //Dqは変化しない 8343: XEiJ.regCCR = (XEiJ.regCCR & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_N | XEiJ.REG_CCR_Z) | //XとNとZは変化しない 8344: XEiJ.REG_CCR_V //Vは常にセット 8345: ); //Cは常にクリア 8346: } else { //オーバーフローなし 8347: int z = XEiJ.regRn[l] = (int) zz; //商 8348: if (h != l) { //DIVSL.L <ea>,Dr:Dq 8349: XEiJ.regRn[h] = (int) (xx - yy * zz); //余り 8350: } 8351: XEiJ.regCCR = (XEiJ.regCCR & XEiJ.REG_CCR_X | //Xは変化しない 8352: (z < 0 ? XEiJ.REG_CCR_N : 0) | //Nは商が負のときセット、さもなくばクリア 8353: (z == 0 ? XEiJ.REG_CCR_Z : 0) //Zは商が0のときセット、さもなくばクリア 8354: ); //VとCは常にクリア 8355: } //if オーバーフローあり/オーバーフローなし 8356: } //if 符号なし/符号あり 8357: } //irpDivuDivsLong 8358: 8359: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8360: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 8361: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 8362: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8363: //SATS.L Dr |-|------|-|-UUUU|-**00|D |0100_110_010_000_rrr (ISA_B) 8364: //MOVEM.W <ea>,<list> |-|012346|-|-----|-----| M+ WXZP |0100_110_010_mmm_rrr-llllllllllllllll 8365: // 8366: //SATS.L Dr 8367: // VがセットされていたらDrを符号が逆で絶対値が最大の値にする(直前のDrに対する演算を飽和演算にする) 8368: public static void irpMovemToRegWord () throws M68kException { 8369: int ea = XEiJ.regOC & 63; 8370: if (ea < XEiJ.EA_AR) { //SATS.L Dr 8371: XEiJ.mpuCycleCount++; 8372: int z = XEiJ.regRn[ea]; 8373: if (XEiJ.TEST_BIT_1_SHIFT ? XEiJ.regCCR << 31 - 1 < 0 : (XEiJ.regCCR & XEiJ.REG_CCR_V) != 0) { //Vがセットされているとき 8374: XEiJ.regRn[ea] = z = z >> 31 ^ 0x80000000; //符号が逆で絶対値が最大の値にする 8375: } 8376: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 8377: } else { //MOVEM.W <ea>,<list> 8378: int l = mmuReadWordZeroExword (XEiJ.regPC, XEiJ.regSRS); //pcwze。レジスタリスト。ゼロ拡張 8379: XEiJ.regPC += 2; 8380: int arr, a; 8381: if (ea >> 3 == XEiJ.MMM_MP) { //(Ar)+ 8382: arr = ea - (XEiJ.EA_MP - 8); 8383: a = m60Address = XEiJ.regRn[arr]; 8384: } else { //(Ar)+以外 8385: arr = 16; 8386: a = efaCntWord (ea); 8387: } 8388: int t = a; 8389: if (XEiJ.IRP_MOVEM_EXPAND) { //16回展開する 8390: if ((l & 0x0001) != 0) { 8391: XEiJ.regRn[ 0] = mmuReadWordSignData (m60Address = a, XEiJ.regSRS); //データレジスタも符号拡張して32bit全部書き換える 8392: a += 2; 8393: } 8394: if ((l & 0x0002) != 0) { 8395: XEiJ.regRn[ 1] = mmuReadWordSignData (m60Address = a, XEiJ.regSRS); //データレジスタも符号拡張して32bit全部書き換える 8396: a += 2; 8397: } 8398: if ((l & 0x0004) != 0) { 8399: XEiJ.regRn[ 2] = mmuReadWordSignData (m60Address = a, XEiJ.regSRS); //データレジスタも符号拡張して32bit全部書き換える 8400: a += 2; 8401: } 8402: if ((l & 0x0008) != 0) { 8403: XEiJ.regRn[ 3] = mmuReadWordSignData (m60Address = a, XEiJ.regSRS); //データレジスタも符号拡張して32bit全部書き換える 8404: a += 2; 8405: } 8406: if ((l & 0x0010) != 0) { 8407: XEiJ.regRn[ 4] = mmuReadWordSignData (m60Address = a, XEiJ.regSRS); //データレジスタも符号拡張して32bit全部書き換える 8408: a += 2; 8409: } 8410: if ((l & 0x0020) != 0) { 8411: XEiJ.regRn[ 5] = mmuReadWordSignData (m60Address = a, XEiJ.regSRS); //データレジスタも符号拡張して32bit全部書き換える 8412: a += 2; 8413: } 8414: if ((l & 0x0040) != 0) { 8415: XEiJ.regRn[ 6] = mmuReadWordSignData (m60Address = a, XEiJ.regSRS); //データレジスタも符号拡張して32bit全部書き換える 8416: a += 2; 8417: } 8418: if ((byte) l < 0) { //(l & 0x0080) != 0 8419: XEiJ.regRn[ 7] = mmuReadWordSignData (m60Address = a, XEiJ.regSRS); //データレジスタも符号拡張して32bit全部書き換える 8420: a += 2; 8421: } 8422: if ((l & 0x0100) != 0) { 8423: XEiJ.regRn[ 8] = mmuReadWordSignData (m60Address = a, XEiJ.regSRS); //符号拡張して32bit全部書き換える 8424: a += 2; 8425: } 8426: if ((l & 0x0200) != 0) { 8427: XEiJ.regRn[ 9] = mmuReadWordSignData (m60Address = a, XEiJ.regSRS); //符号拡張して32bit全部書き換える 8428: a += 2; 8429: } 8430: if ((l & 0x0400) != 0) { 8431: XEiJ.regRn[10] = mmuReadWordSignData (m60Address = a, XEiJ.regSRS); //符号拡張して32bit全部書き換える 8432: a += 2; 8433: } 8434: if ((l & 0x0800) != 0) { 8435: XEiJ.regRn[11] = mmuReadWordSignData (m60Address = a, XEiJ.regSRS); //符号拡張して32bit全部書き換える 8436: a += 2; 8437: } 8438: if ((l & 0x1000) != 0) { 8439: XEiJ.regRn[12] = mmuReadWordSignData (m60Address = a, XEiJ.regSRS); //符号拡張して32bit全部書き換える 8440: a += 2; 8441: } 8442: if ((l & 0x2000) != 0) { 8443: XEiJ.regRn[13] = mmuReadWordSignData (m60Address = a, XEiJ.regSRS); //符号拡張して32bit全部書き換える 8444: a += 2; 8445: } 8446: if ((l & 0x4000) != 0) { 8447: XEiJ.regRn[14] = mmuReadWordSignData (m60Address = a, XEiJ.regSRS); //符号拡張して32bit全部書き換える 8448: a += 2; 8449: } 8450: if ((short) l < 0) { //(l & 0x8000) != 0 8451: XEiJ.regRn[15] = mmuReadWordSignData (m60Address = a, XEiJ.regSRS); //符号拡張して32bit全部書き換える 8452: a += 2; 8453: } 8454: } else if (XEiJ.IRP_MOVEM_LOOP) { //16回ループする。コンパイラが展開する 8455: for (int i = 0; i <= 15; i++) { 8456: if ((l & 0x0001 << i) != 0) { 8457: XEiJ.regRn[i] = mmuReadWordSignData (m60Address = a, XEiJ.regSRS); //(データレジスタも)符号拡張して32bit全部書き換える 8458: a += 2; 8459: } 8460: } 8461: } else if (XEiJ.IRP_MOVEM_SHIFT_LEFT) { //0になるまで左にシフトする 8462: l = XEiJ.MPU_BITREV_TABLE_0[l & 2047] | XEiJ.MPU_BITREV_TABLE_1[l << 10 >>> 21]; //Integer.reverse(l) 8463: for (int i = 0; l != 0; i++, l <<= 1) { 8464: if (l < 0) { 8465: XEiJ.regRn[i] = mmuReadWordSignData (m60Address = a, XEiJ.regSRS); //(データレジスタも)符号拡張して32bit全部書き換える 8466: a += 2; 8467: } 8468: } 8469: } else if (XEiJ.IRP_MOVEM_SHIFT_RIGHT) { //0になるまで右にシフトする 8470: for (int i = 0; l != 0; i++, l >>>= 1) { 8471: if ((l & 1) != 0) { 8472: XEiJ.regRn[i] = mmuReadWordSignData (m60Address = a, XEiJ.regSRS); //(データレジスタも)符号拡張して32bit全部書き換える 8473: a += 2; 8474: } 8475: } 8476: } else if (XEiJ.IRP_MOVEM_ZEROS) { //Integer.numberOfTrailingZerosを使う 8477: for (int i = 0; l != 0; ) { 8478: int k = Integer.numberOfTrailingZeros (l); 8479: XEiJ.regRn[i += k] = mmuReadWordSignData (m60Address = a, XEiJ.regSRS); //(データレジスタも)符号拡張して32bit全部書き換える 8480: a += 2; 8481: l = l >>> k & ~1; 8482: } 8483: } 8484: //MOVEM.W (Ar)+,<list>で<list>にArが含まれているとき、メモリから読み出したデータを捨ててArをインクリメントする 8485: XEiJ.regRn[arr] = a; 8486: XEiJ.mpuCycleCount += a - t >> 1; //2バイト/個→1サイクル/個 8487: } 8488: } //irpMovemToRegWord 8489: 8490: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8491: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 8492: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 8493: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8494: //MOVEM.L <ea>,<list> |-|012346|-|-----|-----| M+ WXZP |0100_110_011_mmm_rrr-llllllllllllllll 8495: public static void irpMovemToRegLong () throws M68kException { 8496: int ea = XEiJ.regOC & 63; 8497: { 8498: int l = mmuReadWordZeroExword (XEiJ.regPC, XEiJ.regSRS); //pcwze。レジスタリスト。ゼロ拡張 8499: XEiJ.regPC += 2; 8500: int arr, a; 8501: if (ea >> 3 == XEiJ.MMM_MP) { //(Ar)+ 8502: arr = ea - (XEiJ.EA_MP - 8); 8503: a = m60Address = XEiJ.regRn[arr]; 8504: } else { //(Ar)+以外 8505: arr = 16; 8506: a = efaCntLong (ea); 8507: } 8508: int t = a; 8509: if (XEiJ.IRP_MOVEM_EXPAND) { //16回展開する 8510: if ((l & 0x0001) != 0) { 8511: XEiJ.regRn[ 0] = mmuReadLongData (m60Address = a, XEiJ.regSRS); 8512: a += 4; 8513: } 8514: if ((l & 0x0002) != 0) { 8515: XEiJ.regRn[ 1] = mmuReadLongData (m60Address = a, XEiJ.regSRS); 8516: a += 4; 8517: } 8518: if ((l & 0x0004) != 0) { 8519: XEiJ.regRn[ 2] = mmuReadLongData (m60Address = a, XEiJ.regSRS); 8520: a += 4; 8521: } 8522: if ((l & 0x0008) != 0) { 8523: XEiJ.regRn[ 3] = mmuReadLongData (m60Address = a, XEiJ.regSRS); 8524: a += 4; 8525: } 8526: if ((l & 0x0010) != 0) { 8527: XEiJ.regRn[ 4] = mmuReadLongData (m60Address = a, XEiJ.regSRS); 8528: a += 4; 8529: } 8530: if ((l & 0x0020) != 0) { 8531: XEiJ.regRn[ 5] = mmuReadLongData (m60Address = a, XEiJ.regSRS); 8532: a += 4; 8533: } 8534: if ((l & 0x0040) != 0) { 8535: XEiJ.regRn[ 6] = mmuReadLongData (m60Address = a, XEiJ.regSRS); 8536: a += 4; 8537: } 8538: if ((byte) l < 0) { //(l & 0x0080) != 0 8539: XEiJ.regRn[ 7] = mmuReadLongData (m60Address = a, XEiJ.regSRS); 8540: a += 4; 8541: } 8542: if ((l & 0x0100) != 0) { 8543: XEiJ.regRn[ 8] = mmuReadLongData (m60Address = a, XEiJ.regSRS); 8544: a += 4; 8545: } 8546: if ((l & 0x0200) != 0) { 8547: XEiJ.regRn[ 9] = mmuReadLongData (m60Address = a, XEiJ.regSRS); 8548: a += 4; 8549: } 8550: if ((l & 0x0400) != 0) { 8551: XEiJ.regRn[10] = mmuReadLongData (m60Address = a, XEiJ.regSRS); 8552: a += 4; 8553: } 8554: if ((l & 0x0800) != 0) { 8555: XEiJ.regRn[11] = mmuReadLongData (m60Address = a, XEiJ.regSRS); 8556: a += 4; 8557: } 8558: if ((l & 0x1000) != 0) { 8559: XEiJ.regRn[12] = mmuReadLongData (m60Address = a, XEiJ.regSRS); 8560: a += 4; 8561: } 8562: if ((l & 0x2000) != 0) { 8563: XEiJ.regRn[13] = mmuReadLongData (m60Address = a, XEiJ.regSRS); 8564: a += 4; 8565: } 8566: if ((l & 0x4000) != 0) { 8567: XEiJ.regRn[14] = mmuReadLongData (m60Address = a, XEiJ.regSRS); 8568: a += 4; 8569: } 8570: if ((short) l < 0) { //(l & 0x8000) != 0 8571: XEiJ.regRn[15] = mmuReadLongData (m60Address = a, XEiJ.regSRS); 8572: a += 4; 8573: } 8574: } else if (XEiJ.IRP_MOVEM_LOOP) { //16回ループする。コンパイラが展開する 8575: for (int i = 0; i <= 15; i++) { 8576: if ((l & 0x0001 << i) != 0) { 8577: XEiJ.regRn[i] = mmuReadLongData (m60Address = a, XEiJ.regSRS); 8578: a += 4; 8579: } 8580: } 8581: } else if (XEiJ.IRP_MOVEM_SHIFT_LEFT) { //0になるまで左にシフトする 8582: l = XEiJ.MPU_BITREV_TABLE_0[l & 2047] | XEiJ.MPU_BITREV_TABLE_1[l << 10 >>> 21]; //Integer.reverse(l) 8583: for (int i = 0; l != 0; i++, l <<= 1) { 8584: if (l < 0) { 8585: XEiJ.regRn[i] = mmuReadLongData (m60Address = a, XEiJ.regSRS); 8586: a += 4; 8587: } 8588: } 8589: } else if (XEiJ.IRP_MOVEM_SHIFT_RIGHT) { //0になるまで右にシフトする 8590: for (int i = 0; l != 0; i++, l >>>= 1) { 8591: if ((l & 1) != 0) { 8592: XEiJ.regRn[i] = mmuReadLongData (m60Address = a, XEiJ.regSRS); 8593: a += 4; 8594: } 8595: } 8596: } else if (XEiJ.IRP_MOVEM_ZEROS) { //Integer.numberOfTrailingZerosを使う 8597: for (int i = 0; l != 0; ) { 8598: int k = Integer.numberOfTrailingZeros (l); 8599: XEiJ.regRn[i += k] = mmuReadLongData (m60Address = a, XEiJ.regSRS); 8600: a += 4; 8601: l = l >>> k & ~1; 8602: } 8603: } 8604: //MOVEM.L (Ar)+,<list>で<list>にArが含まれているとき、メモリから読み出したデータを捨ててArをインクリメントする 8605: XEiJ.regRn[arr] = a; 8606: XEiJ.mpuCycleCount += a - t >> 2; //4バイト/個→1サイクル/個 8607: } 8608: } //irpMovemToRegLong 8609: 8610: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8611: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 8612: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 8613: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8614: //TRAP #<vector> |-|012346|-|-----|-----| |0100_111_001_00v_vvv 8615: public static void irpTrap () throws M68kException { 8616: irpExceptionFormat0 (XEiJ.regOC - (0b0100_111_001_000_000 - M68kException.M6E_TRAP_0_INSTRUCTION_VECTOR) << 2, XEiJ.regPC); //pcは次の命令 8617: } //irpTrap 8618: public static void irpTrap15 () throws M68kException { 8619: if ((XEiJ.regRn[0] & 255) == 0x8e) { //IOCS _BOOTINF 8620: MainMemory.mmrCheckHuman (); 8621: } 8622: irpExceptionFormat0 (M68kException.M6E_TRAP_15_INSTRUCTION_VECTOR << 2, XEiJ.regPC); //pcは次の命令 8623: } //irpTrap15 8624: 8625: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8626: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 8627: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 8628: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8629: //LINK.W Ar,#<data> |-|012346|-|-----|-----| |0100_111_001_010_rrr-{data} 8630: // 8631: //LINK.W Ar,#<data> 8632: // PEA.L (Ar);MOVEA.L A7,Ar;ADDA.W #<data>,A7と同じ 8633: // LINK.W A7,#<data>はA7をデクリメントする前の値がプッシュされ、A7に#<data>が加算される 8634: public static void irpLinkWord () throws M68kException { 8635: XEiJ.mpuCycleCount++; 8636: int o = mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); //pcws 8637: int arr = XEiJ.regOC - (0b0100_111_001_010_000 - 8); 8638: //評価順序に注意。LINK.W A7,#<data>のときプッシュするのはA7をデクリメントする前の値。wl(r[15]-=4,r[8+rrr])は不可 8639: int a = XEiJ.regRn[arr]; 8640: m60Incremented -= 4L << (7 << 3); 8641: int sp = m60Address = XEiJ.regRn[15] -= 4; 8642: mmuWriteLongData (sp, a, XEiJ.regSRS); //pushl 8643: XEiJ.regRn[arr] = sp; 8644: XEiJ.regRn[15] = sp + o; 8645: } //irpLinkWord 8646: 8647: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8648: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 8649: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 8650: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8651: //UNLK Ar |-|012346|-|-----|-----| |0100_111_001_011_rrr 8652: // 8653: //UNLK Ar 8654: // MOVEA.L Ar,A7;MOVEA.L (A7)+,Arと同じ 8655: // UNLK A7はMOVEA.L A7,A7;MOVEA.L (A7)+,A7すなわちMOVEA.L (A7),A7と同じ 8656: // ソースオペランドのポストインクリメントはデスティネーションオペランドが評価される前に完了しているとみなされる 8657: // 例えばMOVE.L (A0)+,(A0)+はMOVE.L (A0),(4,A0);ADDQ.L #8,A0と同じ 8658: // MOVEA.L (A0)+,A0はポストインクリメントされたA0が(A0)から読み出された値で上書きされるのでMOVEA.L (A0),A0と同じ 8659: // M68000PRMにUNLK Anの動作はAn→SP;(SP)→An;SP+4→SPだと書かれているがこれはn=7の場合に当てはまらない 8660: // 余談だが68040の初期のマスクセットはUNLK A7を実行すると固まるらしい 8661: public static void irpUnlk () throws M68kException { 8662: XEiJ.mpuCycleCount += 2; 8663: int arr = XEiJ.regOC - (0b0100_111_001_011_000 - 8); 8664: //評価順序に注意 8665: int sp = XEiJ.regRn[arr]; 8666: // UNLK ArはMOVEA.L Ar,A7;MOVEA.L (A7)+,Arと同じ 8667: // (A7)+がページフォルトになってリトライするとき 8668: // Arはまだ更新されておらず、リトライでMOVEA.L Ar,A7が再実行されるので、A7を巻き戻す必要はない 8669: m60Incremented += 4L << (7 << 3); //UNLK A7でページフォルトが発生したときA7が増えすぎないようにする 8670: XEiJ.regRn[15] = sp + 4; 8671: XEiJ.regRn[arr] = mmuReadLongData (m60Address = sp, XEiJ.regSRS); //popls 8672: } //irpUnlk 8673: 8674: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8675: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 8676: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 8677: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8678: //MOVE.L Ar,USP |-|012346|P|-----|-----| |0100_111_001_100_rrr 8679: public static void irpMoveToUsp () throws M68kException { 8680: if (XEiJ.regSRS == 0) { //ユーザモードのとき 8681: M68kException.m6eNumber = M68kException.M6E_PRIVILEGE_VIOLATION; 8682: throw M68kException.m6eSignal; 8683: } 8684: //以下はスーパーバイザモード 8685: XEiJ.mpuCycleCount += 2; 8686: XEiJ.mpuUSP = XEiJ.regRn[XEiJ.regOC - (0b0100_111_001_100_000 - 8)]; 8687: } //irpMoveToUsp 8688: 8689: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8690: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 8691: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 8692: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8693: //MOVE.L USP,Ar |-|012346|P|-----|-----| |0100_111_001_101_rrr 8694: public static void irpMoveFromUsp () throws M68kException { 8695: if (XEiJ.regSRS == 0) { //ユーザモードのとき 8696: M68kException.m6eNumber = M68kException.M6E_PRIVILEGE_VIOLATION; 8697: throw M68kException.m6eSignal; 8698: } 8699: //以下はスーパーバイザモード 8700: XEiJ.mpuCycleCount++; 8701: XEiJ.regRn[XEiJ.regOC - (0b0100_111_001_101_000 - 8)] = XEiJ.mpuUSP; 8702: } //irpMoveFromUsp 8703: 8704: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8705: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 8706: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 8707: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8708: //RESET |-|012346|P|-----|-----| |0100_111_001_110_000 8709: public static void irpReset () throws M68kException { 8710: if (XEiJ.regSRS == 0) { //ユーザモードのとき 8711: M68kException.m6eNumber = M68kException.M6E_PRIVILEGE_VIOLATION; 8712: throw M68kException.m6eSignal; 8713: } 8714: //以下はスーパーバイザモード 8715: XEiJ.mpuCycleCount += 45; 8716: XEiJ.irpReset (); 8717: } //irpReset 8718: 8719: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8720: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 8721: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 8722: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8723: //NOP |-|012346|-|-----|-----| |0100_111_001_110_001 8724: public static void irpNop () throws M68kException { 8725: XEiJ.mpuCycleCount += 9; 8726: //何もしない 8727: } //irpNop 8728: 8729: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8730: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 8731: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 8732: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8733: //STOP #<data> |-|012346|P|UUUUU|*****| |0100_111_001_110_010-{data} 8734: // 8735: //STOP #<data> 8736: // 1. #<data>をsrに設定する 8737: // 2. pcを進める 8738: // 3. 以下のいずれかの条件が成立するまで停止する 8739: // 3a. トレース 8740: // 3b. マスクされているレベルよりも高い割り込み要求 8741: // 3c. リセット 8742: // コアと一緒にデバイスを止めるわけにいかないので、ここでは条件が成立するまで同じ命令を繰り返すループ命令として実装する 8743: public static void irpStop () throws M68kException { 8744: if (XEiJ.regSRS == 0) { //ユーザモードのとき 8745: M68kException.m6eNumber = M68kException.M6E_PRIVILEGE_VIOLATION; 8746: throw M68kException.m6eSignal; 8747: } 8748: //以下はスーパーバイザモード 8749: XEiJ.mpuCycleCount++; 8750: irpSetSR (mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, 1)); //pcws。特権違反チェックが先 8751: if (XEiJ.mpuTraceFlag == 0) { //トレースまたはマスクされているレベルよりも高い割り込み要求がない 8752: XEiJ.regPC = XEiJ.regPC0; //ループ 8753: //任意の負荷率を100%に設定しているときSTOP命令が軽すぎると動作周波数が大きくなりすぎて割り込みがかかったとき次に進めなくなる 8754: //負荷率の計算にSTOP命令で止まっていた時間を含めないことにする 8755: XEiJ.mpuClockTime += XEiJ.TMR_FREQ * 4 / 1000000; //4μs。50MHzのとき200clk 8756: XEiJ.mpuLastNano += 4000L; 8757: } 8758: } //irpStop 8759: 8760: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8761: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 8762: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 8763: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8764: //RTE |-|012346|P|UUUUU|*****| |0100_111_001_110_011 8765: public static void irpRte () throws M68kException { 8766: if (XEiJ.regSRS == 0) { //ユーザモードのとき 8767: M68kException.m6eNumber = M68kException.M6E_PRIVILEGE_VIOLATION; 8768: throw M68kException.m6eSignal; 8769: } 8770: //以下はスーパーバイザモード 8771: XEiJ.mpuCycleCount += 17; 8772: int sp = XEiJ.regRn[15]; 8773: int newSR = mmuReadWordZeroData (m60Address = sp, 1); //popwz 8774: int newPC = mmuReadLongData (m60Address = sp + 2, 1); //popls 8775: int format = mmuReadWordZeroData (m60Address = sp + 6, 1) >> 12; 8776: if (format == 0) { //010,020,030,040,060 8777: m60Incremented += 8L << (7 << 3); 8778: XEiJ.regRn[15] = sp + 8; 8779: } else if (format == 2 || //020,030,040,060 8780: format == 3) { //040,060 8781: m60Incremented += 12L << (7 << 3); 8782: XEiJ.regRn[15] = sp + 12; 8783: } else if (format == 4) { //060 8784: m60Incremented += 16L << (7 << 3); 8785: XEiJ.regRn[15] = sp + 16; 8786: } else { 8787: M68kException.m6eNumber = M68kException.M6E_FORMAT_ERROR; 8788: throw M68kException.m6eSignal; 8789: } 8790: //irpSetSRでモードが切り替わる場合があるのでその前にr[15]を更新しておくこと 8791: irpSetSR (newSR); //ここでユーザモードに戻る場合がある。特権違反チェックが先 8792: irpSetPC (newPC); //分岐ログが新しいsrを使う。順序に注意。ここでアドレスエラーが発生する場合がある 8793: } //irpRte 8794: 8795: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8796: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 8797: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 8798: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8799: //RTD #<data> |-|-12346|-|-----|-----| |0100_111_001_110_100-{data} 8800: public static void irpRtd () throws M68kException { 8801: XEiJ.mpuCycleCount += 7; 8802: int sp = XEiJ.regRn[15]; 8803: int o = mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); //pcws 8804: int pc = mmuReadLongData (m60Address = sp, XEiJ.regSRS); //popls 8805: m60Incremented += 4L << (7 << 3); 8806: XEiJ.regRn[15] = sp + 4 + o; 8807: irpSetPC (pc); 8808: } //irpRtd 8809: 8810: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8811: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 8812: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 8813: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8814: //RTS |-|012346|-|-----|-----| |0100_111_001_110_101 8815: public static void irpRts () throws M68kException { 8816: XEiJ.mpuCycleCount += 7; 8817: int sp = XEiJ.regRn[15]; 8818: int pc = mmuReadLongData (m60Address = sp, XEiJ.regSRS); //popls 8819: m60Incremented += 4L << (7 << 3); 8820: XEiJ.regRn[15] = sp + 4; 8821: irpSetPC (pc); 8822: } //irpRts 8823: 8824: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8825: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 8826: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 8827: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8828: //TRAPV |-|012346|-|---*-|-----| |0100_111_001_110_110 8829: public static void irpTrapv () throws M68kException { 8830: if (XEiJ.TEST_BIT_1_SHIFT ? XEiJ.regCCR << 31 - 1 >= 0 : (XEiJ.regCCR & XEiJ.REG_CCR_V) == 0) { //通過 8831: XEiJ.mpuCycleCount++; 8832: } else { 8833: m60Address = XEiJ.regPC0; //アドレスは命令の先頭 8834: M68kException.m6eNumber = M68kException.M6E_TRAPV_INSTRUCTION; 8835: throw M68kException.m6eSignal; 8836: } 8837: } //irpTrapv 8838: 8839: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8840: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 8841: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 8842: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8843: //RTR |-|012346|-|UUUUU|*****| |0100_111_001_110_111 8844: public static void irpRtr () throws M68kException { 8845: XEiJ.mpuCycleCount += 8; 8846: int sp = XEiJ.regRn[15]; 8847: int w = mmuReadWordZeroData (m60Address = sp, XEiJ.regSRS); //popwz 8848: int pc = mmuReadLongData (m60Address = sp + 2, XEiJ.regSRS); //popls 8849: XEiJ.regCCR = XEiJ.REG_CCR_MASK & w; 8850: m60Incremented += 6L << (7 << 3); 8851: XEiJ.regRn[15] = sp + 6; 8852: irpSetPC (pc); 8853: } //irpRtr 8854: 8855: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8856: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 8857: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 8858: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8859: //MOVEC.L Rc,Rn |-|-12346|P|-----|-----| |0100_111_001_111_010-rnnncccccccccccc 8860: public static void irpMovecFromControl () throws M68kException { 8861: if (XEiJ.regSRS == 0) { //ユーザモードのとき 8862: M68kException.m6eNumber = M68kException.M6E_PRIVILEGE_VIOLATION; 8863: throw M68kException.m6eSignal; 8864: } 8865: //以下はスーパーバイザモード 8866: int w = mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, 1); //pcwz。拡張ワード 8867: switch (w & 0x0fff) { 8868: case 0x000: //SFC 8869: XEiJ.mpuCycleCount += 12; 8870: XEiJ.regRn[w >> 12] = XEiJ.mpuSFC; 8871: break; 8872: case 0x001: //DFC 8873: XEiJ.mpuCycleCount += 12; 8874: XEiJ.regRn[w >> 12] = XEiJ.mpuDFC; 8875: break; 8876: case 0x002: //CACR 8877: XEiJ.mpuCycleCount += 15; 8878: XEiJ.regRn[w >> 12] = XEiJ.mpuCACR & 0xf880e000; //CABCとCUBCのリードは常に0 8879: break; 8880: case 0x003: //TCR 8881: XEiJ.mpuCycleCount += 15; 8882: XEiJ.regRn[w >> 12] = mmuGetTCR (); 8883: break; 8884: case 0x004: //ITT0 8885: XEiJ.mpuCycleCount += 15; 8886: XEiJ.regRn[w >> 12] = mmuGetITT0 (); 8887: break; 8888: case 0x005: //ITT1 8889: XEiJ.mpuCycleCount += 15; 8890: XEiJ.regRn[w >> 12] = mmuGetITT1 (); 8891: break; 8892: case 0x006: //DTT0 8893: XEiJ.mpuCycleCount += 15; 8894: XEiJ.regRn[w >> 12] = mmuGetDTT0 (); 8895: break; 8896: case 0x007: //DTT1 8897: XEiJ.mpuCycleCount += 15; 8898: XEiJ.regRn[w >> 12] = mmuGetDTT1 (); 8899: break; 8900: case 0x008: //BUSCR 8901: XEiJ.mpuCycleCount += 15; 8902: XEiJ.regRn[w >> 12] = XEiJ.mpuBUSCR; 8903: break; 8904: case 0x800: //USP 8905: XEiJ.mpuCycleCount += 12; 8906: XEiJ.regRn[w >> 12] = XEiJ.mpuUSP; 8907: break; 8908: case 0x801: //VBR 8909: XEiJ.mpuCycleCount += 12; 8910: XEiJ.regRn[w >> 12] = XEiJ.mpuVBR; 8911: break; 8912: case 0x806: //URP 8913: XEiJ.mpuCycleCount += 15; 8914: XEiJ.regRn[w >> 12] = mmuGetURP ();; 8915: break; 8916: case 0x807: //SRP 8917: XEiJ.mpuCycleCount += 15; 8918: XEiJ.regRn[w >> 12] = mmuGetSRP ();; 8919: break; 8920: case 0x808: //PCR 8921: XEiJ.mpuCycleCount += 12; 8922: XEiJ.regRn[w >> 12] = XEiJ.mpuPCR; 8923: break; 8924: default: 8925: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 8926: throw M68kException.m6eSignal; 8927: } 8928: } //irpMovecFromControl 8929: 8930: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8931: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 8932: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 8933: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8934: //MOVEC.L Rn,Rc |-|-12346|P|-----|-----| |0100_111_001_111_011-rnnncccccccccccc 8935: public static void irpMovecToControl () throws M68kException { 8936: if (XEiJ.regSRS == 0) { //ユーザモードのとき 8937: M68kException.m6eNumber = M68kException.M6E_PRIVILEGE_VIOLATION; 8938: throw M68kException.m6eSignal; 8939: } 8940: //以下はスーパーバイザモード 8941: int w = mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, 1); //pcwz。拡張ワード 8942: int d = XEiJ.regRn[w >> 12]; 8943: switch (w & 0x0fff) { 8944: case 0x000: //SFC 8945: XEiJ.mpuCycleCount += 11; 8946: XEiJ.mpuSFC = d & 0x00000007; 8947: break; 8948: case 0x001: //DFC 8949: XEiJ.mpuCycleCount += 11; 8950: XEiJ.mpuDFC = d & 0x00000007; 8951: break; 8952: case 0x002: //CACR 8953: // CACR 8954: // 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 8955: // EDC NAD ESB DPI FOC 0 0 0 EBC CABC CUBC 0 0 0 0 0 EIC NAI FIC 0 0 0 0 0 0 0 0 0 0 0 0 0 8956: // bit31 EDC Enable Data Cache 8957: // データキャッシュ有効 8958: // 4ウェイセットアソシアティブ。16バイト/ライン*128ライン/セット*4セット=8KB 8959: // bit30 NAD No Allocate Mode (Data Cache) 8960: // データキャッシュでミスしても新しいキャッシュラインをアロケートしない 8961: // bit29 ESB Enable Store Buffer 8962: // ストアバッファ有効 8963: // ライトスルーおよびキャッシュ禁止インプリサイスのページの書き込みを4エントリ(16バイト)のFIFOバッファで遅延させる 8964: // 例えば4の倍数のアドレスから始まる4バイトに連続して書き込むと1回のロングの書き込みにまとめられる 8965: // bit28 DPI Disable CPUSH Invalidation 8966: // CPUSHでプッシュされたキャッシュラインを無効化しない 8967: // bit27 FOC 1/2 Cache Operation Mode Enable (Data Cache) 8968: // データキャッシュを1/2キャッシュモードにする 8969: // bit23 EBC Enable Branch Cache 8970: // 分岐キャッシュ有効 8971: // 256エントリの分岐キャッシュを用いて分岐予測を行う 8972: // 正しく予測された分岐は前後の命令に隠れて実質0サイクルで実行される 8973: // MC68060は最大3個の命令(1個の分岐命令と2個の整数命令)を1サイクルで実行できる 8974: // MC68000(10MHz)とMC68060(50MHz)の処理速度の比は局所的に100倍を超えることがある 8975: // bit22 CABC Clear All Entries in the Branch Cache 8976: // 分岐キャッシュのすべてのエントリをクリアする 8977: // 分岐命令以外の場所で分岐キャッシュがヒットしてしまったときに発生する分岐予測エラーから復帰するときに使う 8978: // CABCはライトオンリーでリードは常に0 8979: // bit21 CUBC Clear All User Entries in the Branch Cache 8980: // 分岐キャッシュのすべてのユーザエントリをクリアする 8981: // CUBCはライトオンリーでリードは常に0 8982: // bit15 EIC Enable Instruction Cache 8983: // 命令キャッシュ有効 8984: // 4ウェイセットアソシアティブ。16バイト/ライン*128ライン/セット*4セット=8KB 8985: // bit14 NAI No Allocate Mode (Instruction Cache) 8986: // 命令キャッシュでミスしても新しいキャッシュラインをアロケートしない 8987: // bit13 FIC 1/2 Cache Operation Mode Enable (Instruction Cache) 8988: // 命令キャッシュを1/2キャッシュモードにする 8989: //! 非対応 8990: XEiJ.mpuCycleCount += 14; 8991: XEiJ.mpuCACR = d & 0xf8e0e000; //CABCとCUBCは保存しておいてリードするときにマスクする 8992: { 8993: boolean cacheOn = (XEiJ.mpuCACR & 0x80008000) != 0; 8994: if (XEiJ.mpuCacheOn != cacheOn) { 8995: XEiJ.mpuCacheOn = cacheOn; 8996: XEiJ.mpuSetWait (); 8997: } 8998: } 8999: break; 9000: case 0x003: //TCR 9001: // TCR 9002: // 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 9003: // 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 E P NAD NAI FOTC FITC DCO DUO DWO DCI DUI 0 9004: // bit15 E Enable 9005: // bit14 P Page Size 9006: // bit13 NAD No Allocate Mode (Data ATC) 9007: // bit12 NAI No Allocate Mode (Instruction ATC) 9008: // bit11 FOTC 1/2-Cache Mode (Data ATC) 9009: // bit10 FITC 1/2-Cache Mode (Instruction ATC) 9010: // bit9-8 DCO Default Cache Mode (Data Cache) 9011: // bit7-6 DUO Default UPA bits (Data Cache) 9012: // bit5 DWO Default Write Protect (Data Cache) 9013: // bit4-3 DCI Default Cache Mode (Instruction Cache) 9014: // bit2-1 DUI Default UPA bits (Instruction Cache) 9015: //MMUを参照 9016: XEiJ.mpuCycleCount += 14; 9017: mmuSetTCR (d); 9018: break; 9019: case 0x004: //ITT0 9020: XEiJ.mpuCycleCount += 14; 9021: mmuSetITT0 (d); 9022: break; 9023: case 0x005: //ITT1 9024: XEiJ.mpuCycleCount += 14; 9025: mmuSetITT1 (d); 9026: break; 9027: case 0x006: //DTT0 9028: XEiJ.mpuCycleCount += 14; 9029: mmuSetDTT0 (d); 9030: break; 9031: case 0x007: //DTT1 9032: XEiJ.mpuCycleCount += 14; 9033: mmuSetDTT1 (d); 9034: break; 9035: case 0x008: //BUSCR 9036: XEiJ.mpuCycleCount += 14; 9037: XEiJ.mpuBUSCR = d & 0xf0000000; 9038: break; 9039: case 0x800: //USP 9040: XEiJ.mpuCycleCount += 11; 9041: XEiJ.mpuUSP = d; 9042: break; 9043: case 0x801: //VBR 9044: XEiJ.mpuCycleCount += 11; 9045: XEiJ.mpuVBR = d & -4; //4の倍数でないと困る 9046: break; 9047: case 0x806: //URP 9048: XEiJ.mpuCycleCount += 14; 9049: mmuSetURP (d); 9050: break; 9051: case 0x807: //SRP 9052: XEiJ.mpuCycleCount += 14; 9053: mmuSetSRP (d); 9054: break; 9055: case 0x808: //PCR 9056: // PCR 9057: // 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 9058: // 0 0 0 0 0 1 0 0 0 0 1 1 0 0 0 0 Revision Number EDEBUG Reserved DFP ESS 9059: // bit31-16 Identification 0x0430 9060: // bit15-8 Revision Number 1=F43G,5=G65V,6=E41J。偽物もあるらしい 9061: // bit7 EDEBUG Enable Debug Features 9062: // bit6-2 Reserved 9063: // bit1 DFP Disable Floating-Point Unit。浮動小数点ユニット無効 9064: // bit0 ESS Enable Superscalar Dispatch。スーパースカラ有効 9065: XEiJ.mpuCycleCount += 11; 9066: XEiJ.mpuPCR = 0x04300000 | XEiJ.MPU_060_REV << 8 | d & 0x00000083; 9067: break; 9068: default: 9069: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 9070: throw M68kException.m6eSignal; 9071: } 9072: } //irpMovecToControl 9073: 9074: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9075: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 9076: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 9077: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9078: //JSR <ea> |-|012346|-|-----|-----| M WXZP |0100_111_010_mmm_rrr 9079: //JBSR.L <label> |A|012346|-|-----|-----| |0100_111_010_111_001-{address} [JSR <label>] 9080: public static void irpJsr () throws M68kException { 9081: XEiJ.mpuCycleCount++; 9082: //評価順序に注意。実効アドレスを求めてからspをデクリメントすること 9083: int a = efaJmpJsr (XEiJ.regOC & 63); 9084: m60Incremented -= 4L << (7 << 3); 9085: int sp = m60Address = XEiJ.regRn[15] -= 4; 9086: mmuWriteLongData (sp, XEiJ.regPC, XEiJ.regSRS); //pushl 9087: irpSetPC (a); 9088: } //irpJsr 9089: 9090: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9091: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 9092: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 9093: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9094: //JMP <ea> |-|012346|-|-----|-----| M WXZP |0100_111_011_mmm_rrr 9095: //JBRA.L <label> |A|012346|-|-----|-----| |0100_111_011_111_001-{address} [JMP <label>] 9096: public static void irpJmp () throws M68kException { 9097: XEiJ.mpuCycleCount++; //0clkにしない 9098: irpSetPC (efaJmpJsr (XEiJ.regOC & 63)); 9099: } //irpJmp 9100: 9101: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9102: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 9103: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 9104: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9105: //ADDQ.B #<data>,<ea> |-|012346|-|UUUUU|*****|D M+-WXZ |0101_qqq_000_mmm_rrr 9106: //INC.B <ea> |A|012346|-|UUUUU|*****|D M+-WXZ |0101_001_000_mmm_rrr [ADDQ.B #1,<ea>] 9107: public static void irpAddqByte () throws M68kException { 9108: int ea = XEiJ.regOC & 63; 9109: int x; 9110: int y = ((XEiJ.regOC >> 9) - 1 & 7) + 1; //qqq==0?8:qqq 9111: int z; 9112: if (ea < XEiJ.EA_AR) { //ADDQ.B #<data>,Dr 9113: XEiJ.mpuCycleCount++; 9114: z = (byte) (XEiJ.regRn[ea] = ~0xff & (x = XEiJ.regRn[ea]) | 0xff & (x = (byte) x) + y); 9115: } else { //ADDQ.B #<data>,<mem> 9116: XEiJ.mpuCycleCount++; 9117: int a = efaMltByte (ea); 9118: mmuWriteByteData (a, z = (byte) ((x = mmuModifyByteSignData (a, XEiJ.regSRS)) + y), XEiJ.regSRS); 9119: } 9120: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | 9121: (~x & z) >>> 31 << 1 | 9122: (x & ~z) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_addq 9123: } //irpAddqByte 9124: 9125: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9126: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 9127: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 9128: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9129: //ADDQ.W #<data>,<ea> |-|012346|-|UUUUU|*****|D M+-WXZ |0101_qqq_001_mmm_rrr 9130: //ADDQ.W #<data>,Ar |-|012346|-|-----|-----| A |0101_qqq_001_001_rrr 9131: //INC.W <ea> |A|012346|-|UUUUU|*****|D M+-WXZ |0101_001_001_mmm_rrr [ADDQ.W #1,<ea>] 9132: //INC.W Ar |A|012346|-|-----|-----| A |0101_001_001_001_rrr [ADDQ.W #1,Ar] 9133: // 9134: //ADDQ.W #<data>,Ar 9135: // ソースを符号拡張してロングで加算する 9136: public static void irpAddqWord () throws M68kException { 9137: int ea = XEiJ.regOC & 63; 9138: int y = ((XEiJ.regOC >> 9) - 1 & 7) + 1; //qqq==0?8:qqq 9139: if (ea >> 3 == XEiJ.MMM_AR) { //ADDQ.W #<data>,Ar 9140: XEiJ.mpuCycleCount++; 9141: XEiJ.regRn[ea] += y; //ロングで計算する。このr[ea]はアドレスレジスタ 9142: //ccrは操作しない 9143: } else { 9144: int x; 9145: int z; 9146: if (ea < XEiJ.EA_AR) { //ADDQ.W #<data>,Dr 9147: XEiJ.mpuCycleCount++; 9148: z = (short) (XEiJ.regRn[ea] = ~0xffff & (x = XEiJ.regRn[ea]) | (char) ((x = (short) x) + y)); 9149: } else { //ADDQ.W #<data>,<mem> 9150: XEiJ.mpuCycleCount++; 9151: int a = efaMltWord (ea); 9152: mmuWriteWordData (a, z = (short) ((x = mmuModifyWordSignData (a, XEiJ.regSRS)) + y), XEiJ.regSRS); 9153: } 9154: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | 9155: (~x & z) >>> 31 << 1 | 9156: (x & ~z) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_addq 9157: } 9158: } //irpAddqWord 9159: 9160: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9161: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 9162: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 9163: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9164: //ADDQ.L #<data>,<ea> |-|012346|-|UUUUU|*****|D M+-WXZ |0101_qqq_010_mmm_rrr 9165: //ADDQ.L #<data>,Ar |-|012346|-|-----|-----| A |0101_qqq_010_001_rrr 9166: //INC.L <ea> |A|012346|-|UUUUU|*****|D M+-WXZ |0101_001_010_mmm_rrr [ADDQ.L #1,<ea>] 9167: //INC.L Ar |A|012346|-|-----|-----| A |0101_001_010_001_rrr [ADDQ.L #1,Ar] 9168: public static void irpAddqLong () throws M68kException { 9169: int ea = XEiJ.regOC & 63; 9170: int y = ((XEiJ.regOC >> 9) - 1 & 7) + 1; //qqq==0?8:qqq 9171: if (ea >> 3 == XEiJ.MMM_AR) { //ADDQ.L #<data>,Ar 9172: XEiJ.mpuCycleCount++; 9173: XEiJ.regRn[ea] += y; //このr[ea]はアドレスレジスタ 9174: //ccrは操作しない 9175: } else { 9176: int x; 9177: int z; 9178: if (ea < XEiJ.EA_AR) { //ADDQ.L #<data>,Dr 9179: XEiJ.mpuCycleCount++; 9180: XEiJ.regRn[ea] = z = (x = XEiJ.regRn[ea]) + y; 9181: } else { //ADDQ.L #<data>,<mem> 9182: XEiJ.mpuCycleCount++; 9183: int a = efaMltLong (ea); 9184: mmuWriteLongData (a, z = (x = mmuModifyLongData (a, XEiJ.regSRS)) + y, XEiJ.regSRS); 9185: } 9186: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | 9187: (~x & z) >>> 31 << 1 | 9188: (x & ~z) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_addq 9189: } 9190: } //irpAddqLong 9191: 9192: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9193: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 9194: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 9195: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9196: //ST.B <ea> |-|012346|-|-----|-----|D M+-WXZ |0101_000_011_mmm_rrr 9197: //SNF.B <ea> |A|012346|-|-----|-----|D M+-WXZ |0101_000_011_mmm_rrr [ST.B <ea>] 9198: //DBT.W Dr,<label> |-|012346|-|-----|-----| |0101_000_011_001_rrr-{offset} 9199: //DBNF.W Dr,<label> |A|012346|-|-----|-----| |0101_000_011_001_rrr-{offset} [DBT.W Dr,<label>] 9200: //TRAPT.W #<data> |-|--2346|-|-----|-----| |0101_000_011_111_010-{data} 9201: //TPNF.W #<data> |A|--2346|-|-----|-----| |0101_000_011_111_010-{data} [TRAPT.W #<data>] 9202: //TPT.W #<data> |A|--2346|-|-----|-----| |0101_000_011_111_010-{data} [TRAPT.W #<data>] 9203: //TRAPNF.W #<data> |A|--2346|-|-----|-----| |0101_000_011_111_010-{data} [TRAPT.W #<data>] 9204: //TRAPT.L #<data> |-|--2346|-|-----|-----| |0101_000_011_111_011-{data} 9205: //TPNF.L #<data> |A|--2346|-|-----|-----| |0101_000_011_111_011-{data} [TRAPT.L #<data>] 9206: //TPT.L #<data> |A|--2346|-|-----|-----| |0101_000_011_111_011-{data} [TRAPT.L #<data>] 9207: //TRAPNF.L #<data> |A|--2346|-|-----|-----| |0101_000_011_111_011-{data} [TRAPT.L #<data>] 9208: //TRAPT |-|--2346|-|-----|-----| |0101_000_011_111_100 9209: //TPNF |A|--2346|-|-----|-----| |0101_000_011_111_100 [TRAPT] 9210: //TPT |A|--2346|-|-----|-----| |0101_000_011_111_100 [TRAPT] 9211: //TRAPNF |A|--2346|-|-----|-----| |0101_000_011_111_100 [TRAPT] 9212: public static void irpSt () throws M68kException { 9213: int ea = XEiJ.regOC & 63; 9214: //DBT.W Dr,<label>よりもST.B Drを優先する 9215: if (ea < XEiJ.EA_AR) { //ST.B Dr 9216: XEiJ.mpuCycleCount++; 9217: XEiJ.regRn[ea] |= 0xff; 9218: } else if (ea < XEiJ.EA_MM) { //DBT.W Dr,<label> 9219: int t = XEiJ.regPC; //pc0+2 9220: XEiJ.regPC = t + 2; //pc0+4 9221: t += mmuReadWordSignExword (t, XEiJ.regSRS); //pc0+2+16bitディスプレースメント 9222: if ((t & 1) != 0) { //分岐先のアドレスが奇数 9223: //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ 9224: irpBccAddressError (t); 9225: } 9226: //条件が成立しているので通過 9227: XEiJ.mpuCycleCount += 2; 9228: } else if ((XEiJ.EAM_PW | XEiJ.EAM_PX | XEiJ.EAM_IM) << ea < 0L) { //TRAPT.W/TRAPT.L/TRAPT 9229: if (ea == 072) { //.W 9230: mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); 9231: } else if (ea == 073) { //.L 9232: mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS); 9233: } 9234: //条件が成立しているのでTRAPする 9235: m60Address = XEiJ.regPC0; //アドレスは命令の先頭 9236: M68kException.m6eNumber = M68kException.M6E_TRAPV_INSTRUCTION; 9237: throw M68kException.m6eSignal; 9238: } else { //ST.B <mem> 9239: XEiJ.mpuCycleCount++; 9240: mmuWriteByteData (efaMltByte (ea), 0xff, XEiJ.regSRS); 9241: } 9242: } //irpSt 9243: 9244: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9245: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 9246: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 9247: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9248: //SUBQ.B #<data>,<ea> |-|012346|-|UUUUU|*****|D M+-WXZ |0101_qqq_100_mmm_rrr 9249: //DEC.B <ea> |A|012346|-|UUUUU|*****|D M+-WXZ |0101_001_100_mmm_rrr [SUBQ.B #1,<ea>] 9250: public static void irpSubqByte () throws M68kException { 9251: int ea = XEiJ.regOC & 63; 9252: int x; 9253: int y = ((XEiJ.regOC >> 9) - 1 & 7) + 1; //qqq==0?8:qqq 9254: int z; 9255: if (ea < XEiJ.EA_AR) { //SUBQ.B #<data>,Dr 9256: XEiJ.mpuCycleCount++; 9257: z = (byte) (XEiJ.regRn[ea] = ~0xff & (x = XEiJ.regRn[ea]) | 0xff & (x = (byte) x) - y); 9258: } else { //SUBQ.B #<data>,<mem> 9259: XEiJ.mpuCycleCount++; 9260: int a = efaMltByte (ea); 9261: mmuWriteByteData (a, z = (byte) ((x = mmuModifyByteSignData (a, XEiJ.regSRS)) - y), XEiJ.regSRS); 9262: } 9263: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | 9264: (x & ~z) >>> 31 << 1 | 9265: (~x & z) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_subq 9266: } //irpSubqByte 9267: 9268: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9269: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 9270: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 9271: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9272: //SUBQ.W #<data>,<ea> |-|012346|-|UUUUU|*****|D M+-WXZ |0101_qqq_101_mmm_rrr 9273: //SUBQ.W #<data>,Ar |-|012346|-|-----|-----| A |0101_qqq_101_001_rrr 9274: //DEC.W <ea> |A|012346|-|UUUUU|*****|D M+-WXZ |0101_001_101_mmm_rrr [SUBQ.W #1,<ea>] 9275: //DEC.W Ar |A|012346|-|-----|-----| A |0101_001_101_001_rrr [SUBQ.W #1,Ar] 9276: // 9277: //SUBQ.W #<data>,Ar 9278: // ソースを符号拡張してロングで減算する 9279: public static void irpSubqWord () throws M68kException { 9280: int ea = XEiJ.regOC & 63; 9281: int y = ((XEiJ.regOC >> 9) - 1 & 7) + 1; //qqq==0?8:qqq 9282: if (ea >> 3 == XEiJ.MMM_AR) { //SUBQ.W #<data>,Ar 9283: XEiJ.mpuCycleCount++; 9284: XEiJ.regRn[ea] -= y; //ロングで計算する。このr[ea]はアドレスレジスタ 9285: //ccrは操作しない 9286: } else { 9287: int x; 9288: int z; 9289: if (ea < XEiJ.EA_AR) { //SUBQ.W #<data>,Dr 9290: XEiJ.mpuCycleCount++; 9291: z = (short) (XEiJ.regRn[ea] = ~0xffff & (x = XEiJ.regRn[ea]) | (char) ((x = (short) x) - y)); 9292: } else { //SUBQ.W #<data>,<mem> 9293: XEiJ.mpuCycleCount++; 9294: int a = efaMltWord (ea); 9295: mmuWriteWordData (a, z = (short) ((x = mmuModifyWordSignData (a, XEiJ.regSRS)) - y), XEiJ.regSRS); 9296: } 9297: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | 9298: (x & ~z) >>> 31 << 1 | 9299: (~x & z) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_subq 9300: } 9301: } //irpSubqWord 9302: 9303: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9304: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 9305: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 9306: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9307: //SUBQ.L #<data>,<ea> |-|012346|-|UUUUU|*****|D M+-WXZ |0101_qqq_110_mmm_rrr 9308: //SUBQ.L #<data>,Ar |-|012346|-|-----|-----| A |0101_qqq_110_001_rrr 9309: //DEC.L <ea> |A|012346|-|UUUUU|*****|D M+-WXZ |0101_001_110_mmm_rrr [SUBQ.L #1,<ea>] 9310: //DEC.L Ar |A|012346|-|-----|-----| A |0101_001_110_001_rrr [SUBQ.L #1,Ar] 9311: public static void irpSubqLong () throws M68kException { 9312: int ea = XEiJ.regOC & 63; 9313: int y = ((XEiJ.regOC >> 9) - 1 & 7) + 1; //qqq==0?8:qqq 9314: if (ea >> 3 == XEiJ.MMM_AR) { //SUBQ.L #<data>,Ar 9315: XEiJ.mpuCycleCount++; 9316: XEiJ.regRn[ea] -= y; //このr[ea]はアドレスレジスタ 9317: //ccrは操作しない 9318: } else { 9319: int x; 9320: int z; 9321: if (ea < XEiJ.EA_AR) { //SUBQ.L #<data>,Dr 9322: XEiJ.mpuCycleCount++; 9323: XEiJ.regRn[ea] = z = (x = XEiJ.regRn[ea]) - y; 9324: } else { //SUBQ.L #<data>,<mem> 9325: XEiJ.mpuCycleCount++; 9326: int a = efaMltLong (ea); 9327: mmuWriteLongData (a, z = (x = mmuModifyLongData (a, XEiJ.regSRS)) - y, XEiJ.regSRS); 9328: } 9329: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | 9330: (x & ~z) >>> 31 << 1 | 9331: (~x & z) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_subq 9332: } 9333: } //irpSubqLong 9334: 9335: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9336: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 9337: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 9338: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9339: //SF.B <ea> |-|012346|-|-----|-----|D M+-WXZ |0101_000_111_mmm_rrr 9340: //SNT.B <ea> |A|012346|-|-----|-----|D M+-WXZ |0101_000_111_mmm_rrr [SF.B <ea>] 9341: //DBF.W Dr,<label> |-|012346|-|-----|-----| |0101_000_111_001_rrr-{offset} 9342: //DBNT.W Dr,<label> |A|012346|-|-----|-----| |0101_000_111_001_rrr-{offset} [DBF.W Dr,<label>] 9343: //DBRA.W Dr,<label> |A|012346|-|-----|-----| |0101_000_111_001_rrr-{offset} [DBF.W Dr,<label>] 9344: //TRAPF.W #<data> |-|--2346|-|-----|-----| |0101_000_111_111_010-{data} 9345: //TPF.W #<data> |A|--2346|-|-----|-----| |0101_000_111_111_010-{data} [TRAPF.W #<data>] 9346: //TPNT.W #<data> |A|--2346|-|-----|-----| |0101_000_111_111_010-{data} [TRAPF.W #<data>] 9347: //TRAPNT.W #<data> |A|--2346|-|-----|-----| |0101_000_111_111_010-{data} [TRAPF.W #<data>] 9348: //TRAPF.L #<data> |-|--2346|-|-----|-----| |0101_000_111_111_011-{data} 9349: //TPF.L #<data> |A|--2346|-|-----|-----| |0101_000_111_111_011-{data} [TRAPF.L #<data>] 9350: //TPNT.L #<data> |A|--2346|-|-----|-----| |0101_000_111_111_011-{data} [TRAPF.L #<data>] 9351: //TRAPNT.L #<data> |A|--2346|-|-----|-----| |0101_000_111_111_011-{data} [TRAPF.L #<data>] 9352: //TRAPF |-|--2346|-|-----|-----| |0101_000_111_111_100 9353: //TPF |A|--2346|-|-----|-----| |0101_000_111_111_100 [TRAPF] 9354: //TPNT |A|--2346|-|-----|-----| |0101_000_111_111_100 [TRAPF] 9355: //TRAPNT |A|--2346|-|-----|-----| |0101_000_111_111_100 [TRAPF] 9356: public static void irpSf () throws M68kException { 9357: int ea = XEiJ.regOC & 63; 9358: //DBRA.W Dr,<label>よりもSF.B Drを優先する 9359: if (ea < XEiJ.EA_AR) { //SF.B Dr 9360: XEiJ.mpuCycleCount++; 9361: XEiJ.regRn[ea] &= ~0xff; 9362: } else if (ea < XEiJ.EA_MM) { //DBRA.W Dr,<label> 9363: int t = XEiJ.regPC; //pc0+2 9364: XEiJ.regPC = t + 2; //pc0+4 9365: t += mmuReadWordSignExword (t, XEiJ.regSRS); //pc0+2+16bitディスプレースメント 9366: if ((t & 1) != 0) { //分岐先のアドレスが奇数 9367: //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ 9368: irpBccAddressError (t); 9369: } 9370: //条件が成立していないのでデクリメント 9371: int rrr = XEiJ.regOC & 7; 9372: int s = XEiJ.regRn[rrr]; 9373: if ((short) s == 0) { //Drの下位16bitが0なので通過 9374: XEiJ.mpuCycleCount += 2; 9375: XEiJ.regRn[rrr] = s + 65535; 9376: } else { //Drの下位16bitが0でないので分岐 9377: XEiJ.mpuCycleCount++; 9378: XEiJ.regRn[rrr] = s - 1; //下位16bitが0でないので上位16bitは変化しない 9379: irpSetPC (t); 9380: } 9381: } else if ((XEiJ.EAM_PW | XEiJ.EAM_PX | XEiJ.EAM_IM) << ea < 0L) { //TRAPF.W/TRAPF.L/TRAPF 9382: if (ea == 072) { //.W 9383: mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); 9384: } else if (ea == 073) { //.L 9385: mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS); 9386: } 9387: //条件が成立していないのでTRAPしない 9388: XEiJ.mpuCycleCount++; 9389: } else { //SF.B <mem> 9390: XEiJ.mpuCycleCount++; 9391: mmuWriteByteData (efaMltByte (ea), 0x00, XEiJ.regSRS); 9392: } 9393: } //irpSf 9394: 9395: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9396: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 9397: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 9398: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9399: //SHI.B <ea> |-|012346|-|--*-*|-----|D M+-WXZ |0101_001_011_mmm_rrr 9400: //SNLS.B <ea> |A|012346|-|--*-*|-----|D M+-WXZ |0101_001_011_mmm_rrr [SHI.B <ea>] 9401: //DBHI.W Dr,<label> |-|012346|-|--*-*|-----| |0101_001_011_001_rrr-{offset} 9402: //DBNLS.W Dr,<label> |A|012346|-|--*-*|-----| |0101_001_011_001_rrr-{offset} [DBHI.W Dr,<label>] 9403: //TRAPHI.W #<data> |-|--2346|-|--*-*|-----| |0101_001_011_111_010-{data} 9404: //TPHI.W #<data> |A|--2346|-|--*-*|-----| |0101_001_011_111_010-{data} [TRAPHI.W #<data>] 9405: //TPNLS.W #<data> |A|--2346|-|--*-*|-----| |0101_001_011_111_010-{data} [TRAPHI.W #<data>] 9406: //TRAPNLS.W #<data> |A|--2346|-|--*-*|-----| |0101_001_011_111_010-{data} [TRAPHI.W #<data>] 9407: //TRAPHI.L #<data> |-|--2346|-|--*-*|-----| |0101_001_011_111_011-{data} 9408: //TPHI.L #<data> |A|--2346|-|--*-*|-----| |0101_001_011_111_011-{data} [TRAPHI.L #<data>] 9409: //TPNLS.L #<data> |A|--2346|-|--*-*|-----| |0101_001_011_111_011-{data} [TRAPHI.L #<data>] 9410: //TRAPNLS.L #<data> |A|--2346|-|--*-*|-----| |0101_001_011_111_011-{data} [TRAPHI.L #<data>] 9411: //TRAPHI |-|--2346|-|--*-*|-----| |0101_001_011_111_100 9412: //TPHI |A|--2346|-|--*-*|-----| |0101_001_011_111_100 [TRAPHI] 9413: //TPNLS |A|--2346|-|--*-*|-----| |0101_001_011_111_100 [TRAPHI] 9414: //TRAPNLS |A|--2346|-|--*-*|-----| |0101_001_011_111_100 [TRAPHI] 9415: public static void irpShi () throws M68kException { 9416: int ea = XEiJ.regOC & 63; 9417: if (ea >> 3 == XEiJ.MMM_AR) { //DBHI.W Dr,<label> 9418: int t = XEiJ.regPC; //pc0+2 9419: XEiJ.regPC = t + 2; //pc0+4 9420: t += mmuReadWordSignExword (t, XEiJ.regSRS); //pc0+2+16bitディスプレースメント 9421: if ((t & 1) != 0) { //分岐先のアドレスが奇数 9422: //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ 9423: irpBccAddressError (t); 9424: } 9425: if (XEiJ.MPU_CC_HI << XEiJ.regCCR < 0) { //条件が成立しているので通過 9426: XEiJ.mpuCycleCount += 2; 9427: } else { //条件が成立していないのでデクリメント 9428: int rrr = XEiJ.regOC & 7; 9429: int s = XEiJ.regRn[rrr]; 9430: if ((short) s == 0) { //Drの下位16bitが0なので通過 9431: XEiJ.mpuCycleCount += 2; 9432: XEiJ.regRn[rrr] = s + 65535; 9433: } else { //Drの下位16bitが0でないので分岐 9434: XEiJ.mpuCycleCount++; 9435: XEiJ.regRn[rrr] = s - 1; //下位16bitが0でないので上位16bitは変化しない 9436: irpSetPC (t); 9437: } 9438: } 9439: } else if (ea < XEiJ.EA_AR) { //SHI.B Dr 9440: if (XEiJ.MPU_CC_HI << XEiJ.regCCR < 0) { //セット 9441: XEiJ.mpuCycleCount++; 9442: XEiJ.regRn[ea] |= 0xff; 9443: } else { //クリア 9444: XEiJ.mpuCycleCount++; 9445: XEiJ.regRn[ea] &= ~0xff; 9446: } 9447: } else if ((XEiJ.EAM_PW | XEiJ.EAM_PX | XEiJ.EAM_IM) << ea < 0L) { //TRAPHI.W/TRAPHI.L/TRAPHI 9448: if (ea == 072) { //.W 9449: mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); 9450: } else if (ea == 073) { //.L 9451: mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS); 9452: } 9453: if (XEiJ.MPU_CC_HI << XEiJ.regCCR < 0) { 9454: //条件が成立しているのでTRAPする 9455: m60Address = XEiJ.regPC0; //アドレスは命令の先頭 9456: M68kException.m6eNumber = M68kException.M6E_TRAPV_INSTRUCTION; 9457: throw M68kException.m6eSignal; 9458: } else { 9459: //条件が成立していないのでTRAPしない 9460: XEiJ.mpuCycleCount++; 9461: } 9462: } else { //SHI.B <mem> 9463: XEiJ.mpuCycleCount++; 9464: mmuWriteByteData (efaMltByte (ea), XEiJ.MPU_CC_HI << XEiJ.regCCR >> 31, XEiJ.regSRS); 9465: } 9466: } //irpShi 9467: 9468: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9469: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 9470: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 9471: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9472: //SLS.B <ea> |-|012346|-|--*-*|-----|D M+-WXZ |0101_001_111_mmm_rrr 9473: //SNHI.B <ea> |A|012346|-|--*-*|-----|D M+-WXZ |0101_001_111_mmm_rrr [SLS.B <ea>] 9474: //DBLS.W Dr,<label> |-|012346|-|--*-*|-----| |0101_001_111_001_rrr-{offset} 9475: //DBNHI.W Dr,<label> |A|012346|-|--*-*|-----| |0101_001_111_001_rrr-{offset} [DBLS.W Dr,<label>] 9476: //TRAPLS.W #<data> |-|--2346|-|--*-*|-----| |0101_001_111_111_010-{data} 9477: //TPLS.W #<data> |A|--2346|-|--*-*|-----| |0101_001_111_111_010-{data} [TRAPLS.W #<data>] 9478: //TPNHI.W #<data> |A|--2346|-|--*-*|-----| |0101_001_111_111_010-{data} [TRAPLS.W #<data>] 9479: //TRAPNHI.W #<data> |A|--2346|-|--*-*|-----| |0101_001_111_111_010-{data} [TRAPLS.W #<data>] 9480: //TRAPLS.L #<data> |-|--2346|-|--*-*|-----| |0101_001_111_111_011-{data} 9481: //TPLS.L #<data> |A|--2346|-|--*-*|-----| |0101_001_111_111_011-{data} [TRAPLS.L #<data>] 9482: //TPNHI.L #<data> |A|--2346|-|--*-*|-----| |0101_001_111_111_011-{data} [TRAPLS.L #<data>] 9483: //TRAPNHI.L #<data> |A|--2346|-|--*-*|-----| |0101_001_111_111_011-{data} [TRAPLS.L #<data>] 9484: //TRAPLS |-|--2346|-|--*-*|-----| |0101_001_111_111_100 9485: //TPLS |A|--2346|-|--*-*|-----| |0101_001_111_111_100 [TRAPLS] 9486: //TPNHI |A|--2346|-|--*-*|-----| |0101_001_111_111_100 [TRAPLS] 9487: //TRAPNHI |A|--2346|-|--*-*|-----| |0101_001_111_111_100 [TRAPLS] 9488: public static void irpSls () throws M68kException { 9489: int ea = XEiJ.regOC & 63; 9490: if (ea >> 3 == XEiJ.MMM_AR) { //DBLS.W Dr,<label> 9491: int t = XEiJ.regPC; //pc0+2 9492: XEiJ.regPC = t + 2; //pc0+4 9493: t += mmuReadWordSignExword (t, XEiJ.regSRS); //pc0+2+16bitディスプレースメント 9494: if ((t & 1) != 0) { //分岐先のアドレスが奇数 9495: //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ 9496: irpBccAddressError (t); 9497: } 9498: if (XEiJ.MPU_CC_LS << XEiJ.regCCR < 0) { //条件が成立しているので通過 9499: XEiJ.mpuCycleCount += 2; 9500: } else { //条件が成立していないのでデクリメント 9501: int rrr = XEiJ.regOC & 7; 9502: int s = XEiJ.regRn[rrr]; 9503: if ((short) s == 0) { //Drの下位16bitが0なので通過 9504: XEiJ.mpuCycleCount += 2; 9505: XEiJ.regRn[rrr] = s + 65535; 9506: } else { //Drの下位16bitが0でないので分岐 9507: XEiJ.mpuCycleCount++; 9508: XEiJ.regRn[rrr] = s - 1; //下位16bitが0でないので上位16bitは変化しない 9509: irpSetPC (t); 9510: } 9511: } 9512: } else if (ea < XEiJ.EA_AR) { //SLS.B Dr 9513: if (XEiJ.MPU_CC_LS << XEiJ.regCCR < 0) { //セット 9514: XEiJ.mpuCycleCount++; 9515: XEiJ.regRn[ea] |= 0xff; 9516: } else { //クリア 9517: XEiJ.mpuCycleCount++; 9518: XEiJ.regRn[ea] &= ~0xff; 9519: } 9520: } else if ((XEiJ.EAM_PW | XEiJ.EAM_PX | XEiJ.EAM_IM) << ea < 0L) { //TRAPLS.W/TRAPLS.L/TRAPLS 9521: if (ea == 072) { //.W 9522: mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); 9523: } else if (ea == 073) { //.L 9524: mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS); 9525: } 9526: if (XEiJ.MPU_CC_LS << XEiJ.regCCR < 0) { 9527: //条件が成立しているのでTRAPする 9528: m60Address = XEiJ.regPC0; //アドレスは命令の先頭 9529: M68kException.m6eNumber = M68kException.M6E_TRAPV_INSTRUCTION; 9530: throw M68kException.m6eSignal; 9531: } else { 9532: //条件が成立していないのでTRAPしない 9533: XEiJ.mpuCycleCount++; 9534: } 9535: } else { //SLS.B <mem> 9536: XEiJ.mpuCycleCount++; 9537: mmuWriteByteData (efaMltByte (ea), XEiJ.MPU_CC_LS << XEiJ.regCCR >> 31, XEiJ.regSRS); 9538: } 9539: } //irpSls 9540: 9541: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9542: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 9543: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 9544: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9545: //SCC.B <ea> |-|012346|-|----*|-----|D M+-WXZ |0101_010_011_mmm_rrr 9546: //SHS.B <ea> |A|012346|-|----*|-----|D M+-WXZ |0101_010_011_mmm_rrr [SCC.B <ea>] 9547: //SNCS.B <ea> |A|012346|-|----*|-----|D M+-WXZ |0101_010_011_mmm_rrr [SCC.B <ea>] 9548: //SNLO.B <ea> |A|012346|-|----*|-----|D M+-WXZ |0101_010_011_mmm_rrr [SCC.B <ea>] 9549: //DBCC.W Dr,<label> |-|012346|-|----*|-----| |0101_010_011_001_rrr-{offset} 9550: //DBHS.W Dr,<label> |A|012346|-|----*|-----| |0101_010_011_001_rrr-{offset} [DBCC.W Dr,<label>] 9551: //DBNCS.W Dr,<label> |A|012346|-|----*|-----| |0101_010_011_001_rrr-{offset} [DBCC.W Dr,<label>] 9552: //DBNLO.W Dr,<label> |A|012346|-|----*|-----| |0101_010_011_001_rrr-{offset} [DBCC.W Dr,<label>] 9553: //TRAPCC.W #<data> |-|--2346|-|----*|-----| |0101_010_011_111_010-{data} 9554: //TPCC.W #<data> |A|--2346|-|----*|-----| |0101_010_011_111_010-{data} [TRAPCC.W #<data>] 9555: //TPHS.W #<data> |A|--2346|-|----*|-----| |0101_010_011_111_010-{data} [TRAPCC.W #<data>] 9556: //TPNCS.W #<data> |A|--2346|-|----*|-----| |0101_010_011_111_010-{data} [TRAPCC.W #<data>] 9557: //TPNLO.W #<data> |A|--2346|-|----*|-----| |0101_010_011_111_010-{data} [TRAPCC.W #<data>] 9558: //TRAPHS.W #<data> |A|--2346|-|----*|-----| |0101_010_011_111_010-{data} [TRAPCC.W #<data>] 9559: //TRAPNCS.W #<data> |A|--2346|-|----*|-----| |0101_010_011_111_010-{data} [TRAPCC.W #<data>] 9560: //TRAPNLO.W #<data> |A|--2346|-|----*|-----| |0101_010_011_111_010-{data} [TRAPCC.W #<data>] 9561: //TRAPCC.L #<data> |-|--2346|-|----*|-----| |0101_010_011_111_011-{data} 9562: //TPCC.L #<data> |A|--2346|-|----*|-----| |0101_010_011_111_011-{data} [TRAPCC.L #<data>] 9563: //TPHS.L #<data> |A|--2346|-|----*|-----| |0101_010_011_111_011-{data} [TRAPCC.L #<data>] 9564: //TPNCS.L #<data> |A|--2346|-|----*|-----| |0101_010_011_111_011-{data} [TRAPCC.L #<data>] 9565: //TPNLO.L #<data> |A|--2346|-|----*|-----| |0101_010_011_111_011-{data} [TRAPCC.L #<data>] 9566: //TRAPHS.L #<data> |A|--2346|-|----*|-----| |0101_010_011_111_011-{data} [TRAPCC.L #<data>] 9567: //TRAPNCS.L #<data> |A|--2346|-|----*|-----| |0101_010_011_111_011-{data} [TRAPCC.L #<data>] 9568: //TRAPNLO.L #<data> |A|--2346|-|----*|-----| |0101_010_011_111_011-{data} [TRAPCC.L #<data>] 9569: //TRAPCC |-|--2346|-|----*|-----| |0101_010_011_111_100 9570: //TPCC |A|--2346|-|----*|-----| |0101_010_011_111_100 [TRAPCC] 9571: //TPHS |A|--2346|-|----*|-----| |0101_010_011_111_100 [TRAPCC] 9572: //TPNCS |A|--2346|-|----*|-----| |0101_010_011_111_100 [TRAPCC] 9573: //TPNLO |A|--2346|-|----*|-----| |0101_010_011_111_100 [TRAPCC] 9574: //TRAPHS |A|--2346|-|----*|-----| |0101_010_011_111_100 [TRAPCC] 9575: //TRAPNCS |A|--2346|-|----*|-----| |0101_010_011_111_100 [TRAPCC] 9576: //TRAPNLO |A|--2346|-|----*|-----| |0101_010_011_111_100 [TRAPCC] 9577: public static void irpShs () throws M68kException { 9578: int ea = XEiJ.regOC & 63; 9579: if (ea >> 3 == XEiJ.MMM_AR) { //DBHS.W Dr,<label> 9580: int t = XEiJ.regPC; //pc0+2 9581: XEiJ.regPC = t + 2; //pc0+4 9582: t += mmuReadWordSignExword (t, XEiJ.regSRS); //pc0+2+16bitディスプレースメント 9583: if ((t & 1) != 0) { //分岐先のアドレスが奇数 9584: //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ 9585: irpBccAddressError (t); 9586: } 9587: if (XEiJ.MPU_CC_HS << XEiJ.regCCR < 0) { //条件が成立しているので通過 9588: XEiJ.mpuCycleCount += 2; 9589: } else { //条件が成立していないのでデクリメント 9590: int rrr = XEiJ.regOC & 7; 9591: int s = XEiJ.regRn[rrr]; 9592: if ((short) s == 0) { //Drの下位16bitが0なので通過 9593: XEiJ.mpuCycleCount += 2; 9594: XEiJ.regRn[rrr] = s + 65535; 9595: } else { //Drの下位16bitが0でないので分岐 9596: XEiJ.mpuCycleCount++; 9597: XEiJ.regRn[rrr] = s - 1; //下位16bitが0でないので上位16bitは変化しない 9598: irpSetPC (t); 9599: } 9600: } 9601: } else if (ea < XEiJ.EA_AR) { //SHS.B Dr 9602: if (XEiJ.MPU_CC_HS << XEiJ.regCCR < 0) { //セット 9603: XEiJ.mpuCycleCount++; 9604: XEiJ.regRn[ea] |= 0xff; 9605: } else { //クリア 9606: XEiJ.mpuCycleCount++; 9607: XEiJ.regRn[ea] &= ~0xff; 9608: } 9609: } else if ((XEiJ.EAM_PW | XEiJ.EAM_PX | XEiJ.EAM_IM) << ea < 0L) { //TRAPHS.W/TRAPHS.L/TRAPHS 9610: if (ea == 072) { //.W 9611: mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); 9612: } else if (ea == 073) { //.L 9613: mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS); 9614: } 9615: if (XEiJ.MPU_CC_HS << XEiJ.regCCR < 0) { 9616: //条件が成立しているのでTRAPする 9617: m60Address = XEiJ.regPC0; //アドレスは命令の先頭 9618: M68kException.m6eNumber = M68kException.M6E_TRAPV_INSTRUCTION; 9619: throw M68kException.m6eSignal; 9620: } else { 9621: //条件が成立していないのでTRAPしない 9622: XEiJ.mpuCycleCount++; 9623: } 9624: } else { //SHS.B <mem> 9625: XEiJ.mpuCycleCount++; 9626: mmuWriteByteData (efaMltByte (ea), XEiJ.MPU_CC_HS << XEiJ.regCCR >> 31, XEiJ.regSRS); 9627: } 9628: } //irpShs 9629: 9630: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9631: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 9632: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 9633: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9634: //SCS.B <ea> |-|012346|-|----*|-----|D M+-WXZ |0101_010_111_mmm_rrr 9635: //SLO.B <ea> |A|012346|-|----*|-----|D M+-WXZ |0101_010_111_mmm_rrr [SCS.B <ea>] 9636: //SNCC.B <ea> |A|012346|-|----*|-----|D M+-WXZ |0101_010_111_mmm_rrr [SCS.B <ea>] 9637: //SNHS.B <ea> |A|012346|-|----*|-----|D M+-WXZ |0101_010_111_mmm_rrr [SCS.B <ea>] 9638: //DBCS.W Dr,<label> |-|012346|-|----*|-----| |0101_010_111_001_rrr-{offset} 9639: //DBLO.W Dr,<label> |A|012346|-|----*|-----| |0101_010_111_001_rrr-{offset} [DBCS.W Dr,<label>] 9640: //DBNCC.W Dr,<label> |A|012346|-|----*|-----| |0101_010_111_001_rrr-{offset} [DBCS.W Dr,<label>] 9641: //DBNHS.W Dr,<label> |A|012346|-|----*|-----| |0101_010_111_001_rrr-{offset} [DBCS.W Dr,<label>] 9642: //TRAPCS.W #<data> |-|--2346|-|----*|-----| |0101_010_111_111_010-{data} 9643: //TPCS.W #<data> |A|--2346|-|----*|-----| |0101_010_111_111_010-{data} [TRAPCS.W #<data>] 9644: //TPLO.W #<data> |A|--2346|-|----*|-----| |0101_010_111_111_010-{data} [TRAPCS.W #<data>] 9645: //TPNCC.W #<data> |A|--2346|-|----*|-----| |0101_010_111_111_010-{data} [TRAPCS.W #<data>] 9646: //TPNHS.W #<data> |A|--2346|-|----*|-----| |0101_010_111_111_010-{data} [TRAPCS.W #<data>] 9647: //TRAPLO.W #<data> |A|--2346|-|----*|-----| |0101_010_111_111_010-{data} [TRAPCS.W #<data>] 9648: //TRAPNCC.W #<data> |A|--2346|-|----*|-----| |0101_010_111_111_010-{data} [TRAPCS.W #<data>] 9649: //TRAPNHS.W #<data> |A|--2346|-|----*|-----| |0101_010_111_111_010-{data} [TRAPCS.W #<data>] 9650: //TRAPCS.L #<data> |-|--2346|-|----*|-----| |0101_010_111_111_011-{data} 9651: //TPCS.L #<data> |A|--2346|-|----*|-----| |0101_010_111_111_011-{data} [TRAPCS.L #<data>] 9652: //TPLO.L #<data> |A|--2346|-|----*|-----| |0101_010_111_111_011-{data} [TRAPCS.L #<data>] 9653: //TPNCC.L #<data> |A|--2346|-|----*|-----| |0101_010_111_111_011-{data} [TRAPCS.L #<data>] 9654: //TPNHS.L #<data> |A|--2346|-|----*|-----| |0101_010_111_111_011-{data} [TRAPCS.L #<data>] 9655: //TRAPLO.L #<data> |A|--2346|-|----*|-----| |0101_010_111_111_011-{data} [TRAPCS.L #<data>] 9656: //TRAPNCC.L #<data> |A|--2346|-|----*|-----| |0101_010_111_111_011-{data} [TRAPCS.L #<data>] 9657: //TRAPNHS.L #<data> |A|--2346|-|----*|-----| |0101_010_111_111_011-{data} [TRAPCS.L #<data>] 9658: //TRAPCS |-|--2346|-|----*|-----| |0101_010_111_111_100 9659: //TPCS |A|--2346|-|----*|-----| |0101_010_111_111_100 [TRAPCS] 9660: //TPLO |A|--2346|-|----*|-----| |0101_010_111_111_100 [TRAPCS] 9661: //TPNCC |A|--2346|-|----*|-----| |0101_010_111_111_100 [TRAPCS] 9662: //TPNHS |A|--2346|-|----*|-----| |0101_010_111_111_100 [TRAPCS] 9663: //TRAPLO |A|--2346|-|----*|-----| |0101_010_111_111_100 [TRAPCS] 9664: //TRAPNCC |A|--2346|-|----*|-----| |0101_010_111_111_100 [TRAPCS] 9665: //TRAPNHS |A|--2346|-|----*|-----| |0101_010_111_111_100 [TRAPCS] 9666: public static void irpSlo () throws M68kException { 9667: int ea = XEiJ.regOC & 63; 9668: if (ea >> 3 == XEiJ.MMM_AR) { //DBLO.W Dr,<label> 9669: int t = XEiJ.regPC; //pc0+2 9670: XEiJ.regPC = t + 2; //pc0+4 9671: t += mmuReadWordSignExword (t, XEiJ.regSRS); //pc0+2+16bitディスプレースメント 9672: if ((t & 1) != 0) { //分岐先のアドレスが奇数 9673: //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ 9674: irpBccAddressError (t); 9675: } 9676: if (XEiJ.MPU_CC_LO << XEiJ.regCCR < 0) { //条件が成立しているので通過 9677: XEiJ.mpuCycleCount += 2; 9678: } else { //条件が成立していないのでデクリメント 9679: int rrr = XEiJ.regOC & 7; 9680: int s = XEiJ.regRn[rrr]; 9681: if ((short) s == 0) { //Drの下位16bitが0なので通過 9682: XEiJ.mpuCycleCount += 2; 9683: XEiJ.regRn[rrr] = s + 65535; 9684: } else { //Drの下位16bitが0でないので分岐 9685: XEiJ.mpuCycleCount++; 9686: XEiJ.regRn[rrr] = s - 1; //下位16bitが0でないので上位16bitは変化しない 9687: irpSetPC (t); 9688: } 9689: } 9690: } else if (ea < XEiJ.EA_AR) { //SLO.B Dr 9691: if (XEiJ.MPU_CC_LO << XEiJ.regCCR < 0) { //セット 9692: XEiJ.mpuCycleCount++; 9693: XEiJ.regRn[ea] |= 0xff; 9694: } else { //クリア 9695: XEiJ.mpuCycleCount++; 9696: XEiJ.regRn[ea] &= ~0xff; 9697: } 9698: } else if ((XEiJ.EAM_PW | XEiJ.EAM_PX | XEiJ.EAM_IM) << ea < 0L) { //TRAPLO.W/TRAPLO.L/TRAPLO 9699: if (ea == 072) { //.W 9700: mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); 9701: } else if (ea == 073) { //.L 9702: mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS); 9703: } 9704: if (XEiJ.MPU_CC_LO << XEiJ.regCCR < 0) { 9705: //条件が成立しているのでTRAPする 9706: m60Address = XEiJ.regPC0; //アドレスは命令の先頭 9707: M68kException.m6eNumber = M68kException.M6E_TRAPV_INSTRUCTION; 9708: throw M68kException.m6eSignal; 9709: } else { 9710: //条件が成立していないのでTRAPしない 9711: XEiJ.mpuCycleCount++; 9712: } 9713: } else { //SLO.B <mem> 9714: XEiJ.mpuCycleCount++; 9715: mmuWriteByteData (efaMltByte (ea), XEiJ.MPU_CC_LO << XEiJ.regCCR >> 31, XEiJ.regSRS); 9716: } 9717: } //irpSlo 9718: 9719: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9720: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 9721: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 9722: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9723: //SNE.B <ea> |-|012346|-|--*--|-----|D M+-WXZ |0101_011_011_mmm_rrr 9724: //SNEQ.B <ea> |A|012346|-|--*--|-----|D M+-WXZ |0101_011_011_mmm_rrr [SNE.B <ea>] 9725: //SNZ.B <ea> |A|012346|-|--*--|-----|D M+-WXZ |0101_011_011_mmm_rrr [SNE.B <ea>] 9726: //SNZE.B <ea> |A|012346|-|--*--|-----|D M+-WXZ |0101_011_011_mmm_rrr [SNE.B <ea>] 9727: //DBNE.W Dr,<label> |-|012346|-|--*--|-----| |0101_011_011_001_rrr-{offset} 9728: //DBNEQ.W Dr,<label> |A|012346|-|--*--|-----| |0101_011_011_001_rrr-{offset} [DBNE.W Dr,<label>] 9729: //DBNZ.W Dr,<label> |A|012346|-|--*--|-----| |0101_011_011_001_rrr-{offset} [DBNE.W Dr,<label>] 9730: //DBNZE.W Dr,<label> |A|012346|-|--*--|-----| |0101_011_011_001_rrr-{offset} [DBNE.W Dr,<label>] 9731: //TRAPNE.W #<data> |-|--2346|-|--*--|-----| |0101_011_011_111_010-{data} 9732: //TPNE.W #<data> |A|--2346|-|--*--|-----| |0101_011_011_111_010-{data} [TRAPNE.W #<data>] 9733: //TPNEQ.W #<data> |A|--2346|-|--*--|-----| |0101_011_011_111_010-{data} [TRAPNE.W #<data>] 9734: //TPNZ.W #<data> |A|--2346|-|--*--|-----| |0101_011_011_111_010-{data} [TRAPNE.W #<data>] 9735: //TPNZE.W #<data> |A|--2346|-|--*--|-----| |0101_011_011_111_010-{data} [TRAPNE.W #<data>] 9736: //TRAPNEQ.W #<data> |A|--2346|-|--*--|-----| |0101_011_011_111_010-{data} [TRAPNE.W #<data>] 9737: //TRAPNZ.W #<data> |A|--2346|-|--*--|-----| |0101_011_011_111_010-{data} [TRAPNE.W #<data>] 9738: //TRAPNZE.W #<data> |A|--2346|-|--*--|-----| |0101_011_011_111_010-{data} [TRAPNE.W #<data>] 9739: //TRAPNE.L #<data> |-|--2346|-|--*--|-----| |0101_011_011_111_011-{data} 9740: //TPNE.L #<data> |A|--2346|-|--*--|-----| |0101_011_011_111_011-{data} [TRAPNE.L #<data>] 9741: //TPNEQ.L #<data> |A|--2346|-|--*--|-----| |0101_011_011_111_011-{data} [TRAPNE.L #<data>] 9742: //TPNZ.L #<data> |A|--2346|-|--*--|-----| |0101_011_011_111_011-{data} [TRAPNE.L #<data>] 9743: //TPNZE.L #<data> |A|--2346|-|--*--|-----| |0101_011_011_111_011-{data} [TRAPNE.L #<data>] 9744: //TRAPNEQ.L #<data> |A|--2346|-|--*--|-----| |0101_011_011_111_011-{data} [TRAPNE.L #<data>] 9745: //TRAPNZ.L #<data> |A|--2346|-|--*--|-----| |0101_011_011_111_011-{data} [TRAPNE.L #<data>] 9746: //TRAPNZE.L #<data> |A|--2346|-|--*--|-----| |0101_011_011_111_011-{data} [TRAPNE.L #<data>] 9747: //TRAPNE |-|--2346|-|--*--|-----| |0101_011_011_111_100 9748: //TPNE |A|--2346|-|--*--|-----| |0101_011_011_111_100 [TRAPNE] 9749: //TPNEQ |A|--2346|-|--*--|-----| |0101_011_011_111_100 [TRAPNE] 9750: //TPNZ |A|--2346|-|--*--|-----| |0101_011_011_111_100 [TRAPNE] 9751: //TPNZE |A|--2346|-|--*--|-----| |0101_011_011_111_100 [TRAPNE] 9752: //TRAPNEQ |A|--2346|-|--*--|-----| |0101_011_011_111_100 [TRAPNE] 9753: //TRAPNZ |A|--2346|-|--*--|-----| |0101_011_011_111_100 [TRAPNE] 9754: //TRAPNZE |A|--2346|-|--*--|-----| |0101_011_011_111_100 [TRAPNE] 9755: public static void irpSne () throws M68kException { 9756: int ea = XEiJ.regOC & 63; 9757: if (ea >> 3 == XEiJ.MMM_AR) { //DBNE.W Dr,<label> 9758: int t = XEiJ.regPC; //pc0+2 9759: XEiJ.regPC = t + 2; //pc0+4 9760: t += mmuReadWordSignExword (t, XEiJ.regSRS); //pc0+2+16bitディスプレースメント 9761: if ((t & 1) != 0) { //分岐先のアドレスが奇数 9762: //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ 9763: irpBccAddressError (t); 9764: } 9765: if (XEiJ.MPU_CC_NE << XEiJ.regCCR < 0) { //条件が成立しているので通過 9766: XEiJ.mpuCycleCount += 2; 9767: } else { //条件が成立していないのでデクリメント 9768: int rrr = XEiJ.regOC & 7; 9769: int s = XEiJ.regRn[rrr]; 9770: if ((short) s == 0) { //Drの下位16bitが0なので通過 9771: XEiJ.mpuCycleCount += 2; 9772: XEiJ.regRn[rrr] = s + 65535; 9773: } else { //Drの下位16bitが0でないので分岐 9774: XEiJ.mpuCycleCount++; 9775: XEiJ.regRn[rrr] = s - 1; //下位16bitが0でないので上位16bitは変化しない 9776: irpSetPC (t); 9777: } 9778: } 9779: } else if (ea < XEiJ.EA_AR) { //SNE.B Dr 9780: if (XEiJ.MPU_CC_NE << XEiJ.regCCR < 0) { //セット 9781: XEiJ.mpuCycleCount++; 9782: XEiJ.regRn[ea] |= 0xff; 9783: } else { //クリア 9784: XEiJ.mpuCycleCount++; 9785: XEiJ.regRn[ea] &= ~0xff; 9786: } 9787: } else if ((XEiJ.EAM_PW | XEiJ.EAM_PX | XEiJ.EAM_IM) << ea < 0L) { //TRAPNE.W/TRAPNE.L/TRAPNE 9788: if (ea == 072) { //.W 9789: mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); 9790: } else if (ea == 073) { //.L 9791: mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS); 9792: } 9793: if (XEiJ.MPU_CC_NE << XEiJ.regCCR < 0) { 9794: //条件が成立しているのでTRAPする 9795: m60Address = XEiJ.regPC0; //アドレスは命令の先頭 9796: M68kException.m6eNumber = M68kException.M6E_TRAPV_INSTRUCTION; 9797: throw M68kException.m6eSignal; 9798: } else { 9799: //条件が成立していないのでTRAPしない 9800: XEiJ.mpuCycleCount++; 9801: } 9802: } else { //SNE.B <mem> 9803: XEiJ.mpuCycleCount++; 9804: mmuWriteByteData (efaMltByte (ea), XEiJ.MPU_CC_NE << XEiJ.regCCR >> 31, XEiJ.regSRS); 9805: } 9806: } //irpSne 9807: 9808: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9809: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 9810: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 9811: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9812: //SEQ.B <ea> |-|012346|-|--*--|-----|D M+-WXZ |0101_011_111_mmm_rrr 9813: //SNNE.B <ea> |A|012346|-|--*--|-----|D M+-WXZ |0101_011_111_mmm_rrr [SEQ.B <ea>] 9814: //SNNZ.B <ea> |A|012346|-|--*--|-----|D M+-WXZ |0101_011_111_mmm_rrr [SEQ.B <ea>] 9815: //SZE.B <ea> |A|012346|-|--*--|-----|D M+-WXZ |0101_011_111_mmm_rrr [SEQ.B <ea>] 9816: //DBEQ.W Dr,<label> |-|012346|-|--*--|-----| |0101_011_111_001_rrr-{offset} 9817: //DBNNE.W Dr,<label> |A|012346|-|--*--|-----| |0101_011_111_001_rrr-{offset} [DBEQ.W Dr,<label>] 9818: //DBNNZ.W Dr,<label> |A|012346|-|--*--|-----| |0101_011_111_001_rrr-{offset} [DBEQ.W Dr,<label>] 9819: //DBZE.W Dr,<label> |A|012346|-|--*--|-----| |0101_011_111_001_rrr-{offset} [DBEQ.W Dr,<label>] 9820: //TRAPEQ.W #<data> |-|--2346|-|--*--|-----| |0101_011_111_111_010-{data} 9821: //TPEQ.W #<data> |A|--2346|-|--*--|-----| |0101_011_111_111_010-{data} [TRAPEQ.W #<data>] 9822: //TPNNE.W #<data> |A|--2346|-|--*--|-----| |0101_011_111_111_010-{data} [TRAPEQ.W #<data>] 9823: //TPNNZ.W #<data> |A|--2346|-|--*--|-----| |0101_011_111_111_010-{data} [TRAPEQ.W #<data>] 9824: //TPZE.W #<data> |A|--2346|-|--*--|-----| |0101_011_111_111_010-{data} [TRAPEQ.W #<data>] 9825: //TRAPNNE.W #<data> |A|--2346|-|--*--|-----| |0101_011_111_111_010-{data} [TRAPEQ.W #<data>] 9826: //TRAPNNZ.W #<data> |A|--2346|-|--*--|-----| |0101_011_111_111_010-{data} [TRAPEQ.W #<data>] 9827: //TRAPZE.W #<data> |A|--2346|-|--*--|-----| |0101_011_111_111_010-{data} [TRAPEQ.W #<data>] 9828: //TRAPEQ.L #<data> |-|--2346|-|--*--|-----| |0101_011_111_111_011-{data} 9829: //TPEQ.L #<data> |A|--2346|-|--*--|-----| |0101_011_111_111_011-{data} [TRAPEQ.L #<data>] 9830: //TPNNE.L #<data> |A|--2346|-|--*--|-----| |0101_011_111_111_011-{data} [TRAPEQ.L #<data>] 9831: //TPNNZ.L #<data> |A|--2346|-|--*--|-----| |0101_011_111_111_011-{data} [TRAPEQ.L #<data>] 9832: //TPZE.L #<data> |A|--2346|-|--*--|-----| |0101_011_111_111_011-{data} [TRAPEQ.L #<data>] 9833: //TRAPNNE.L #<data> |A|--2346|-|--*--|-----| |0101_011_111_111_011-{data} [TRAPEQ.L #<data>] 9834: //TRAPNNZ.L #<data> |A|--2346|-|--*--|-----| |0101_011_111_111_011-{data} [TRAPEQ.L #<data>] 9835: //TRAPZE.L #<data> |A|--2346|-|--*--|-----| |0101_011_111_111_011-{data} [TRAPEQ.L #<data>] 9836: //TRAPEQ |-|--2346|-|--*--|-----| |0101_011_111_111_100 9837: //TPEQ |A|--2346|-|--*--|-----| |0101_011_111_111_100 [TRAPEQ] 9838: //TPNNE |A|--2346|-|--*--|-----| |0101_011_111_111_100 [TRAPEQ] 9839: //TPNNZ |A|--2346|-|--*--|-----| |0101_011_111_111_100 [TRAPEQ] 9840: //TPZE |A|--2346|-|--*--|-----| |0101_011_111_111_100 [TRAPEQ] 9841: //TRAPNNE |A|--2346|-|--*--|-----| |0101_011_111_111_100 [TRAPEQ] 9842: //TRAPNNZ |A|--2346|-|--*--|-----| |0101_011_111_111_100 [TRAPEQ] 9843: //TRAPZE |A|--2346|-|--*--|-----| |0101_011_111_111_100 [TRAPEQ] 9844: public static void irpSeq () throws M68kException { 9845: int ea = XEiJ.regOC & 63; 9846: if (ea >> 3 == XEiJ.MMM_AR) { //DBEQ.W Dr,<label> 9847: int t = XEiJ.regPC; //pc0+2 9848: XEiJ.regPC = t + 2; //pc0+4 9849: t += mmuReadWordSignExword (t, XEiJ.regSRS); //pc0+2+16bitディスプレースメント 9850: if ((t & 1) != 0) { //分岐先のアドレスが奇数 9851: //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ 9852: irpBccAddressError (t); 9853: } 9854: if (XEiJ.MPU_CC_EQ << XEiJ.regCCR < 0) { //条件が成立しているので通過 9855: XEiJ.mpuCycleCount += 2; 9856: } else { //条件が成立していないのでデクリメント 9857: int rrr = XEiJ.regOC & 7; 9858: int s = XEiJ.regRn[rrr]; 9859: if ((short) s == 0) { //Drの下位16bitが0なので通過 9860: XEiJ.mpuCycleCount += 2; 9861: XEiJ.regRn[rrr] = s + 65535; 9862: } else { //Drの下位16bitが0でないので分岐 9863: XEiJ.mpuCycleCount++; 9864: XEiJ.regRn[rrr] = s - 1; //下位16bitが0でないので上位16bitは変化しない 9865: irpSetPC (t); 9866: } 9867: } 9868: } else if (ea < XEiJ.EA_AR) { //SEQ.B Dr 9869: if (XEiJ.MPU_CC_EQ << XEiJ.regCCR < 0) { //セット 9870: XEiJ.mpuCycleCount++; 9871: XEiJ.regRn[ea] |= 0xff; 9872: } else { //クリア 9873: XEiJ.mpuCycleCount++; 9874: XEiJ.regRn[ea] &= ~0xff; 9875: } 9876: } else if ((XEiJ.EAM_PW | XEiJ.EAM_PX | XEiJ.EAM_IM) << ea < 0L) { //TRAPEQ.W/TRAPEQ.L/TRAPEQ 9877: if (ea == 072) { //.W 9878: mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); 9879: } else if (ea == 073) { //.L 9880: mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS); 9881: } 9882: if (XEiJ.MPU_CC_EQ << XEiJ.regCCR < 0) { 9883: //条件が成立しているのでTRAPする 9884: m60Address = XEiJ.regPC0; //アドレスは命令の先頭 9885: M68kException.m6eNumber = M68kException.M6E_TRAPV_INSTRUCTION; 9886: throw M68kException.m6eSignal; 9887: } else { 9888: //条件が成立していないのでTRAPしない 9889: XEiJ.mpuCycleCount++; 9890: } 9891: } else { //SEQ.B <mem> 9892: XEiJ.mpuCycleCount++; 9893: mmuWriteByteData (efaMltByte (ea), XEiJ.MPU_CC_EQ << XEiJ.regCCR >> 31, XEiJ.regSRS); 9894: } 9895: } //irpSeq 9896: 9897: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9898: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 9899: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 9900: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9901: //SVC.B <ea> |-|012346|-|---*-|-----|D M+-WXZ |0101_100_011_mmm_rrr 9902: //SNVS.B <ea> |A|012346|-|---*-|-----|D M+-WXZ |0101_100_011_mmm_rrr [SVC.B <ea>] 9903: //DBVC.W Dr,<label> |-|012346|-|---*-|-----| |0101_100_011_001_rrr-{offset} 9904: //DBNVS.W Dr,<label> |A|012346|-|---*-|-----| |0101_100_011_001_rrr-{offset} [DBVC.W Dr,<label>] 9905: //TRAPVC.W #<data> |-|--2346|-|---*-|-----| |0101_100_011_111_010-{data} 9906: //TPNVS.W #<data> |A|--2346|-|---*-|-----| |0101_100_011_111_010-{data} [TRAPVC.W #<data>] 9907: //TPVC.W #<data> |A|--2346|-|---*-|-----| |0101_100_011_111_010-{data} [TRAPVC.W #<data>] 9908: //TRAPNVS.W #<data> |A|--2346|-|---*-|-----| |0101_100_011_111_010-{data} [TRAPVC.W #<data>] 9909: //TRAPVC.L #<data> |-|--2346|-|---*-|-----| |0101_100_011_111_011-{data} 9910: //TPNVS.L #<data> |A|--2346|-|---*-|-----| |0101_100_011_111_011-{data} [TRAPVC.L #<data>] 9911: //TPVC.L #<data> |A|--2346|-|---*-|-----| |0101_100_011_111_011-{data} [TRAPVC.L #<data>] 9912: //TRAPNVS.L #<data> |A|--2346|-|---*-|-----| |0101_100_011_111_011-{data} [TRAPVC.L #<data>] 9913: //TRAPVC |-|--2346|-|---*-|-----| |0101_100_011_111_100 9914: //TPNVS |A|--2346|-|---*-|-----| |0101_100_011_111_100 [TRAPVC] 9915: //TPVC |A|--2346|-|---*-|-----| |0101_100_011_111_100 [TRAPVC] 9916: //TRAPNVS |A|--2346|-|---*-|-----| |0101_100_011_111_100 [TRAPVC] 9917: public static void irpSvc () throws M68kException { 9918: int ea = XEiJ.regOC & 63; 9919: if (ea >> 3 == XEiJ.MMM_AR) { //DBVC.W Dr,<label> 9920: int t = XEiJ.regPC; //pc0+2 9921: XEiJ.regPC = t + 2; //pc0+4 9922: t += mmuReadWordSignExword (t, XEiJ.regSRS); //pc0+2+16bitディスプレースメント 9923: if ((t & 1) != 0) { //分岐先のアドレスが奇数 9924: //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ 9925: irpBccAddressError (t); 9926: } 9927: if (XEiJ.MPU_CC_VC << XEiJ.regCCR < 0) { //条件が成立しているので通過 9928: XEiJ.mpuCycleCount += 2; 9929: } else { //条件が成立していないのでデクリメント 9930: int rrr = XEiJ.regOC & 7; 9931: int s = XEiJ.regRn[rrr]; 9932: if ((short) s == 0) { //Drの下位16bitが0なので通過 9933: XEiJ.mpuCycleCount += 2; 9934: XEiJ.regRn[rrr] = s + 65535; 9935: } else { //Drの下位16bitが0でないので分岐 9936: XEiJ.mpuCycleCount++; 9937: XEiJ.regRn[rrr] = s - 1; //下位16bitが0でないので上位16bitは変化しない 9938: irpSetPC (t); 9939: } 9940: } 9941: } else if (ea < XEiJ.EA_AR) { //SVC.B Dr 9942: if (XEiJ.MPU_CC_VC << XEiJ.regCCR < 0) { //セット 9943: XEiJ.mpuCycleCount++; 9944: XEiJ.regRn[ea] |= 0xff; 9945: } else { //クリア 9946: XEiJ.mpuCycleCount++; 9947: XEiJ.regRn[ea] &= ~0xff; 9948: } 9949: } else if ((XEiJ.EAM_PW | XEiJ.EAM_PX | XEiJ.EAM_IM) << ea < 0L) { //TRAPVC.W/TRAPVC.L/TRAPVC 9950: if (ea == 072) { //.W 9951: mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); 9952: } else if (ea == 073) { //.L 9953: mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS); 9954: } 9955: if (XEiJ.MPU_CC_VC << XEiJ.regCCR < 0) { 9956: //条件が成立しているのでTRAPする 9957: m60Address = XEiJ.regPC0; //アドレスは命令の先頭 9958: M68kException.m6eNumber = M68kException.M6E_TRAPV_INSTRUCTION; 9959: throw M68kException.m6eSignal; 9960: } else { 9961: //条件が成立していないのでTRAPしない 9962: XEiJ.mpuCycleCount++; 9963: } 9964: } else { //SVC.B <mem> 9965: XEiJ.mpuCycleCount++; 9966: mmuWriteByteData (efaMltByte (ea), XEiJ.MPU_CC_VC << XEiJ.regCCR >> 31, XEiJ.regSRS); 9967: } 9968: } //irpSvc 9969: 9970: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9971: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 9972: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 9973: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9974: //SVS.B <ea> |-|012346|-|---*-|-----|D M+-WXZ |0101_100_111_mmm_rrr 9975: //SNVC.B <ea> |A|012346|-|---*-|-----|D M+-WXZ |0101_100_111_mmm_rrr [SVS.B <ea>] 9976: //DBVS.W Dr,<label> |-|012346|-|---*-|-----| |0101_100_111_001_rrr-{offset} 9977: //DBNVC.W Dr,<label> |A|012346|-|---*-|-----| |0101_100_111_001_rrr-{offset} [DBVS.W Dr,<label>] 9978: //TRAPVS.W #<data> |-|--2346|-|---*-|-----| |0101_100_111_111_010-{data} 9979: //TPNVC.W #<data> |A|--2346|-|---*-|-----| |0101_100_111_111_010-{data} [TRAPVS.W #<data>] 9980: //TPVS.W #<data> |A|--2346|-|---*-|-----| |0101_100_111_111_010-{data} [TRAPVS.W #<data>] 9981: //TRAPNVC.W #<data> |A|--2346|-|---*-|-----| |0101_100_111_111_010-{data} [TRAPVS.W #<data>] 9982: //TRAPVS.L #<data> |-|--2346|-|---*-|-----| |0101_100_111_111_011-{data} 9983: //TPNVC.L #<data> |A|--2346|-|---*-|-----| |0101_100_111_111_011-{data} [TRAPVS.L #<data>] 9984: //TPVS.L #<data> |A|--2346|-|---*-|-----| |0101_100_111_111_011-{data} [TRAPVS.L #<data>] 9985: //TRAPNVC.L #<data> |A|--2346|-|---*-|-----| |0101_100_111_111_011-{data} [TRAPVS.L #<data>] 9986: //TRAPVS |-|--2346|-|---*-|-----| |0101_100_111_111_100 9987: //TPNVC |A|--2346|-|---*-|-----| |0101_100_111_111_100 [TRAPVS] 9988: //TPVS |A|--2346|-|---*-|-----| |0101_100_111_111_100 [TRAPVS] 9989: //TRAPNVC |A|--2346|-|---*-|-----| |0101_100_111_111_100 [TRAPVS] 9990: public static void irpSvs () throws M68kException { 9991: int ea = XEiJ.regOC & 63; 9992: if (ea >> 3 == XEiJ.MMM_AR) { //DBVS.W Dr,<label> 9993: int t = XEiJ.regPC; //pc0+2 9994: XEiJ.regPC = t + 2; //pc0+4 9995: t += mmuReadWordSignExword (t, XEiJ.regSRS); //pc0+2+16bitディスプレースメント 9996: if ((t & 1) != 0) { //分岐先のアドレスが奇数 9997: //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ 9998: irpBccAddressError (t); 9999: } 10000: if (XEiJ.MPU_CC_VS << XEiJ.regCCR < 0) { //条件が成立しているので通過 10001: XEiJ.mpuCycleCount += 2; 10002: } else { //条件が成立していないのでデクリメント 10003: int rrr = XEiJ.regOC & 7; 10004: int s = XEiJ.regRn[rrr]; 10005: if ((short) s == 0) { //Drの下位16bitが0なので通過 10006: XEiJ.mpuCycleCount += 2; 10007: XEiJ.regRn[rrr] = s + 65535; 10008: } else { //Drの下位16bitが0でないので分岐 10009: XEiJ.mpuCycleCount++; 10010: XEiJ.regRn[rrr] = s - 1; //下位16bitが0でないので上位16bitは変化しない 10011: irpSetPC (t); 10012: } 10013: } 10014: } else if (ea < XEiJ.EA_AR) { //SVS.B Dr 10015: if (XEiJ.MPU_CC_VS << XEiJ.regCCR < 0) { //セット 10016: XEiJ.mpuCycleCount++; 10017: XEiJ.regRn[ea] |= 0xff; 10018: } else { //クリア 10019: XEiJ.mpuCycleCount++; 10020: XEiJ.regRn[ea] &= ~0xff; 10021: } 10022: } else if ((XEiJ.EAM_PW | XEiJ.EAM_PX | XEiJ.EAM_IM) << ea < 0L) { //TRAPVS.W/TRAPVS.L/TRAPVS 10023: if (ea == 072) { //.W 10024: mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); 10025: } else if (ea == 073) { //.L 10026: mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS); 10027: } 10028: if (XEiJ.MPU_CC_VS << XEiJ.regCCR < 0) { 10029: //条件が成立しているのでTRAPする 10030: m60Address = XEiJ.regPC0; //アドレスは命令の先頭 10031: M68kException.m6eNumber = M68kException.M6E_TRAPV_INSTRUCTION; 10032: throw M68kException.m6eSignal; 10033: } else { 10034: //条件が成立していないのでTRAPしない 10035: XEiJ.mpuCycleCount++; 10036: } 10037: } else { //SVS.B <mem> 10038: XEiJ.mpuCycleCount++; 10039: mmuWriteByteData (efaMltByte (ea), XEiJ.MPU_CC_VS << XEiJ.regCCR >> 31, XEiJ.regSRS); 10040: } 10041: } //irpSvs 10042: 10043: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10044: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 10045: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 10046: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10047: //SPL.B <ea> |-|012346|-|-*---|-----|D M+-WXZ |0101_101_011_mmm_rrr 10048: //SNMI.B <ea> |A|012346|-|-*---|-----|D M+-WXZ |0101_101_011_mmm_rrr [SPL.B <ea>] 10049: //DBPL.W Dr,<label> |-|012346|-|-*---|-----| |0101_101_011_001_rrr-{offset} 10050: //DBNMI.W Dr,<label> |A|012346|-|-*---|-----| |0101_101_011_001_rrr-{offset} [DBPL.W Dr,<label>] 10051: //TRAPPL.W #<data> |-|--2346|-|-*---|-----| |0101_101_011_111_010-{data} 10052: //TPNMI.W #<data> |A|--2346|-|-*---|-----| |0101_101_011_111_010-{data} [TRAPPL.W #<data>] 10053: //TPPL.W #<data> |A|--2346|-|-*---|-----| |0101_101_011_111_010-{data} [TRAPPL.W #<data>] 10054: //TRAPNMI.W #<data> |A|--2346|-|-*---|-----| |0101_101_011_111_010-{data} [TRAPPL.W #<data>] 10055: //TRAPPL.L #<data> |-|--2346|-|-*---|-----| |0101_101_011_111_011-{data} 10056: //TPNMI.L #<data> |A|--2346|-|-*---|-----| |0101_101_011_111_011-{data} [TRAPPL.L #<data>] 10057: //TPPL.L #<data> |A|--2346|-|-*---|-----| |0101_101_011_111_011-{data} [TRAPPL.L #<data>] 10058: //TRAPNMI.L #<data> |A|--2346|-|-*---|-----| |0101_101_011_111_011-{data} [TRAPPL.L #<data>] 10059: //TRAPPL |-|--2346|-|-*---|-----| |0101_101_011_111_100 10060: //TPNMI |A|--2346|-|-*---|-----| |0101_101_011_111_100 [TRAPPL] 10061: //TPPL |A|--2346|-|-*---|-----| |0101_101_011_111_100 [TRAPPL] 10062: //TRAPNMI |A|--2346|-|-*---|-----| |0101_101_011_111_100 [TRAPPL] 10063: public static void irpSpl () throws M68kException { 10064: int ea = XEiJ.regOC & 63; 10065: if (ea >> 3 == XEiJ.MMM_AR) { //DBPL.W Dr,<label> 10066: int t = XEiJ.regPC; //pc0+2 10067: XEiJ.regPC = t + 2; //pc0+4 10068: t += mmuReadWordSignExword (t, XEiJ.regSRS); //pc0+2+16bitディスプレースメント 10069: if ((t & 1) != 0) { //分岐先のアドレスが奇数 10070: //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ 10071: irpBccAddressError (t); 10072: } 10073: if (XEiJ.MPU_CC_PL << XEiJ.regCCR < 0) { //条件が成立しているので通過 10074: XEiJ.mpuCycleCount += 2; 10075: } else { //条件が成立していないのでデクリメント 10076: int rrr = XEiJ.regOC & 7; 10077: int s = XEiJ.regRn[rrr]; 10078: if ((short) s == 0) { //Drの下位16bitが0なので通過 10079: XEiJ.mpuCycleCount += 2; 10080: XEiJ.regRn[rrr] = s + 65535; 10081: } else { //Drの下位16bitが0でないので分岐 10082: XEiJ.mpuCycleCount++; 10083: XEiJ.regRn[rrr] = s - 1; //下位16bitが0でないので上位16bitは変化しない 10084: irpSetPC (t); 10085: } 10086: } 10087: } else if (ea < XEiJ.EA_AR) { //SPL.B Dr 10088: if (XEiJ.MPU_CC_PL << XEiJ.regCCR < 0) { //セット 10089: XEiJ.mpuCycleCount++; 10090: XEiJ.regRn[ea] |= 0xff; 10091: } else { //クリア 10092: XEiJ.mpuCycleCount++; 10093: XEiJ.regRn[ea] &= ~0xff; 10094: } 10095: } else if ((XEiJ.EAM_PW | XEiJ.EAM_PX | XEiJ.EAM_IM) << ea < 0L) { //TRAPPL.W/TRAPPL.L/TRAPPL 10096: if (ea == 072) { //.W 10097: mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); 10098: } else if (ea == 073) { //.L 10099: mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS); 10100: } 10101: if (XEiJ.MPU_CC_PL << XEiJ.regCCR < 0) { 10102: //条件が成立しているのでTRAPする 10103: m60Address = XEiJ.regPC0; //アドレスは命令の先頭 10104: M68kException.m6eNumber = M68kException.M6E_TRAPV_INSTRUCTION; 10105: throw M68kException.m6eSignal; 10106: } else { 10107: //条件が成立していないのでTRAPしない 10108: XEiJ.mpuCycleCount++; 10109: } 10110: } else { //SPL.B <mem> 10111: XEiJ.mpuCycleCount++; 10112: mmuWriteByteData (efaMltByte (ea), XEiJ.MPU_CC_PL << XEiJ.regCCR >> 31, XEiJ.regSRS); 10113: } 10114: } //irpSpl 10115: 10116: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10117: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 10118: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 10119: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10120: //SMI.B <ea> |-|012346|-|-*---|-----|D M+-WXZ |0101_101_111_mmm_rrr 10121: //SNPL.B <ea> |A|012346|-|-*---|-----|D M+-WXZ |0101_101_111_mmm_rrr [SMI.B <ea>] 10122: //DBMI.W Dr,<label> |-|012346|-|-*---|-----| |0101_101_111_001_rrr-{offset} 10123: //DBNPL.W Dr,<label> |A|012346|-|-*---|-----| |0101_101_111_001_rrr-{offset} [DBMI.W Dr,<label>] 10124: //TRAPMI.W #<data> |-|--2346|-|-*---|-----| |0101_101_111_111_010-{data} 10125: //TPMI.W #<data> |A|--2346|-|-*---|-----| |0101_101_111_111_010-{data} [TRAPMI.W #<data>] 10126: //TPNPL.W #<data> |A|--2346|-|-*---|-----| |0101_101_111_111_010-{data} [TRAPMI.W #<data>] 10127: //TRAPNPL.W #<data> |A|--2346|-|-*---|-----| |0101_101_111_111_010-{data} [TRAPMI.W #<data>] 10128: //TRAPMI.L #<data> |-|--2346|-|-*---|-----| |0101_101_111_111_011-{data} 10129: //TPMI.L #<data> |A|--2346|-|-*---|-----| |0101_101_111_111_011-{data} [TRAPMI.L #<data>] 10130: //TPNPL.L #<data> |A|--2346|-|-*---|-----| |0101_101_111_111_011-{data} [TRAPMI.L #<data>] 10131: //TRAPNPL.L #<data> |A|--2346|-|-*---|-----| |0101_101_111_111_011-{data} [TRAPMI.L #<data>] 10132: //TRAPMI |-|--2346|-|-*---|-----| |0101_101_111_111_100 10133: //TPMI |A|--2346|-|-*---|-----| |0101_101_111_111_100 [TRAPMI] 10134: //TPNPL |A|--2346|-|-*---|-----| |0101_101_111_111_100 [TRAPMI] 10135: //TRAPNPL |A|--2346|-|-*---|-----| |0101_101_111_111_100 [TRAPMI] 10136: public static void irpSmi () throws M68kException { 10137: int ea = XEiJ.regOC & 63; 10138: if (ea >> 3 == XEiJ.MMM_AR) { //DBMI.W Dr,<label> 10139: int t = XEiJ.regPC; //pc0+2 10140: XEiJ.regPC = t + 2; //pc0+4 10141: t += mmuReadWordSignExword (t, XEiJ.regSRS); //pc0+2+16bitディスプレースメント 10142: if ((t & 1) != 0) { //分岐先のアドレスが奇数 10143: //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ 10144: irpBccAddressError (t); 10145: } 10146: if (XEiJ.MPU_CC_MI << XEiJ.regCCR < 0) { //条件が成立しているので通過 10147: XEiJ.mpuCycleCount += 2; 10148: } else { //条件が成立していないのでデクリメント 10149: int rrr = XEiJ.regOC & 7; 10150: int s = XEiJ.regRn[rrr]; 10151: if ((short) s == 0) { //Drの下位16bitが0なので通過 10152: XEiJ.mpuCycleCount += 2; 10153: XEiJ.regRn[rrr] = s + 65535; 10154: } else { //Drの下位16bitが0でないので分岐 10155: XEiJ.mpuCycleCount++; 10156: XEiJ.regRn[rrr] = s - 1; //下位16bitが0でないので上位16bitは変化しない 10157: irpSetPC (t); 10158: } 10159: } 10160: } else if (ea < XEiJ.EA_AR) { //SMI.B Dr 10161: if (XEiJ.MPU_CC_MI << XEiJ.regCCR < 0) { //セット 10162: XEiJ.mpuCycleCount++; 10163: XEiJ.regRn[ea] |= 0xff; 10164: } else { //クリア 10165: XEiJ.mpuCycleCount++; 10166: XEiJ.regRn[ea] &= ~0xff; 10167: } 10168: } else if ((XEiJ.EAM_PW | XEiJ.EAM_PX | XEiJ.EAM_IM) << ea < 0L) { //TRAPMI.W/TRAPMI.L/TRAPMI 10169: if (ea == 072) { //.W 10170: mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); 10171: } else if (ea == 073) { //.L 10172: mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS); 10173: } 10174: if (XEiJ.MPU_CC_MI << XEiJ.regCCR < 0) { 10175: //条件が成立しているのでTRAPする 10176: m60Address = XEiJ.regPC0; //アドレスは命令の先頭 10177: M68kException.m6eNumber = M68kException.M6E_TRAPV_INSTRUCTION; 10178: throw M68kException.m6eSignal; 10179: } else { 10180: //条件が成立していないのでTRAPしない 10181: XEiJ.mpuCycleCount++; 10182: } 10183: } else { //SMI.B <mem> 10184: XEiJ.mpuCycleCount++; 10185: mmuWriteByteData (efaMltByte (ea), XEiJ.MPU_CC_MI << XEiJ.regCCR >> 31, XEiJ.regSRS); 10186: } 10187: } //irpSmi 10188: 10189: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10190: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 10191: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 10192: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10193: //SGE.B <ea> |-|012346|-|-*-*-|-----|D M+-WXZ |0101_110_011_mmm_rrr 10194: //SNLT.B <ea> |A|012346|-|-*-*-|-----|D M+-WXZ |0101_110_011_mmm_rrr [SGE.B <ea>] 10195: //DBGE.W Dr,<label> |-|012346|-|-*-*-|-----| |0101_110_011_001_rrr-{offset} 10196: //DBNLT.W Dr,<label> |A|012346|-|-*-*-|-----| |0101_110_011_001_rrr-{offset} [DBGE.W Dr,<label>] 10197: //TRAPGE.W #<data> |-|--2346|-|-*-*-|-----| |0101_110_011_111_010-{data} 10198: //TPGE.W #<data> |A|--2346|-|-*-*-|-----| |0101_110_011_111_010-{data} [TRAPGE.W #<data>] 10199: //TPNLT.W #<data> |A|--2346|-|-*-*-|-----| |0101_110_011_111_010-{data} [TRAPGE.W #<data>] 10200: //TRAPNLT.W #<data> |A|--2346|-|-*-*-|-----| |0101_110_011_111_010-{data} [TRAPGE.W #<data>] 10201: //TRAPGE.L #<data> |-|--2346|-|-*-*-|-----| |0101_110_011_111_011-{data} 10202: //TPGE.L #<data> |A|--2346|-|-*-*-|-----| |0101_110_011_111_011-{data} [TRAPGE.L #<data>] 10203: //TPNLT.L #<data> |A|--2346|-|-*-*-|-----| |0101_110_011_111_011-{data} [TRAPGE.L #<data>] 10204: //TRAPNLT.L #<data> |A|--2346|-|-*-*-|-----| |0101_110_011_111_011-{data} [TRAPGE.L #<data>] 10205: //TRAPGE |-|--2346|-|-*-*-|-----| |0101_110_011_111_100 10206: //TPGE |A|--2346|-|-*-*-|-----| |0101_110_011_111_100 [TRAPGE] 10207: //TPNLT |A|--2346|-|-*-*-|-----| |0101_110_011_111_100 [TRAPGE] 10208: //TRAPNLT |A|--2346|-|-*-*-|-----| |0101_110_011_111_100 [TRAPGE] 10209: public static void irpSge () throws M68kException { 10210: int ea = XEiJ.regOC & 63; 10211: if (ea >> 3 == XEiJ.MMM_AR) { //DBGE.W Dr,<label> 10212: int t = XEiJ.regPC; //pc0+2 10213: XEiJ.regPC = t + 2; //pc0+4 10214: t += mmuReadWordSignExword (t, XEiJ.regSRS); //pc0+2+16bitディスプレースメント 10215: if ((t & 1) != 0) { //分岐先のアドレスが奇数 10216: //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ 10217: irpBccAddressError (t); 10218: } 10219: if (XEiJ.MPU_CC_GE << XEiJ.regCCR < 0) { //条件が成立しているので通過 10220: XEiJ.mpuCycleCount += 2; 10221: } else { //条件が成立していないのでデクリメント 10222: int rrr = XEiJ.regOC & 7; 10223: int s = XEiJ.regRn[rrr]; 10224: if ((short) s == 0) { //Drの下位16bitが0なので通過 10225: XEiJ.mpuCycleCount += 2; 10226: XEiJ.regRn[rrr] = s + 65535; 10227: } else { //Drの下位16bitが0でないので分岐 10228: XEiJ.mpuCycleCount++; 10229: XEiJ.regRn[rrr] = s - 1; //下位16bitが0でないので上位16bitは変化しない 10230: irpSetPC (t); 10231: } 10232: } 10233: } else if (ea < XEiJ.EA_AR) { //SGE.B Dr 10234: if (XEiJ.MPU_CC_GE << XEiJ.regCCR < 0) { //セット 10235: XEiJ.mpuCycleCount++; 10236: XEiJ.regRn[ea] |= 0xff; 10237: } else { //クリア 10238: XEiJ.mpuCycleCount++; 10239: XEiJ.regRn[ea] &= ~0xff; 10240: } 10241: } else if ((XEiJ.EAM_PW | XEiJ.EAM_PX | XEiJ.EAM_IM) << ea < 0L) { //TRAPGE.W/TRAPGE.L/TRAPGE 10242: if (ea == 072) { //.W 10243: mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); 10244: } else if (ea == 073) { //.L 10245: mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS); 10246: } 10247: if (XEiJ.MPU_CC_GE << XEiJ.regCCR < 0) { 10248: //条件が成立しているのでTRAPする 10249: m60Address = XEiJ.regPC0; //アドレスは命令の先頭 10250: M68kException.m6eNumber = M68kException.M6E_TRAPV_INSTRUCTION; 10251: throw M68kException.m6eSignal; 10252: } else { 10253: //条件が成立していないのでTRAPしない 10254: XEiJ.mpuCycleCount++; 10255: } 10256: } else { //SGE.B <mem> 10257: XEiJ.mpuCycleCount++; 10258: mmuWriteByteData (efaMltByte (ea), XEiJ.MPU_CC_GE << XEiJ.regCCR >> 31, XEiJ.regSRS); 10259: } 10260: } //irpSge 10261: 10262: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10263: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 10264: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 10265: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10266: //SLT.B <ea> |-|012346|-|-*-*-|-----|D M+-WXZ |0101_110_111_mmm_rrr 10267: //SNGE.B <ea> |A|012346|-|-*-*-|-----|D M+-WXZ |0101_110_111_mmm_rrr [SLT.B <ea>] 10268: //DBLT.W Dr,<label> |-|012346|-|-*-*-|-----| |0101_110_111_001_rrr-{offset} 10269: //DBNGE.W Dr,<label> |A|012346|-|-*-*-|-----| |0101_110_111_001_rrr-{offset} [DBLT.W Dr,<label>] 10270: //TRAPLT.W #<data> |-|--2346|-|-*-*-|-----| |0101_110_111_111_010-{data} 10271: //TPLT.W #<data> |A|--2346|-|-*-*-|-----| |0101_110_111_111_010-{data} [TRAPLT.W #<data>] 10272: //TPNGE.W #<data> |A|--2346|-|-*-*-|-----| |0101_110_111_111_010-{data} [TRAPLT.W #<data>] 10273: //TRAPNGE.W #<data> |A|--2346|-|-*-*-|-----| |0101_110_111_111_010-{data} [TRAPLT.W #<data>] 10274: //TRAPLT.L #<data> |-|--2346|-|-*-*-|-----| |0101_110_111_111_011-{data} 10275: //TPLT.L #<data> |A|--2346|-|-*-*-|-----| |0101_110_111_111_011-{data} [TRAPLT.L #<data>] 10276: //TPNGE.L #<data> |A|--2346|-|-*-*-|-----| |0101_110_111_111_011-{data} [TRAPLT.L #<data>] 10277: //TRAPNGE.L #<data> |A|--2346|-|-*-*-|-----| |0101_110_111_111_011-{data} [TRAPLT.L #<data>] 10278: //TRAPLT |-|--2346|-|-*-*-|-----| |0101_110_111_111_100 10279: //TPLT |A|--2346|-|-*-*-|-----| |0101_110_111_111_100 [TRAPLT] 10280: //TPNGE |A|--2346|-|-*-*-|-----| |0101_110_111_111_100 [TRAPLT] 10281: //TRAPNGE |A|--2346|-|-*-*-|-----| |0101_110_111_111_100 [TRAPLT] 10282: public static void irpSlt () throws M68kException { 10283: int ea = XEiJ.regOC & 63; 10284: if (ea >> 3 == XEiJ.MMM_AR) { //DBLT.W Dr,<label> 10285: int t = XEiJ.regPC; //pc0+2 10286: XEiJ.regPC = t + 2; //pc0+4 10287: t += mmuReadWordSignExword (t, XEiJ.regSRS); //pc0+2+16bitディスプレースメント 10288: if ((t & 1) != 0) { //分岐先のアドレスが奇数 10289: //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ 10290: irpBccAddressError (t); 10291: } 10292: if (XEiJ.MPU_CC_LT << XEiJ.regCCR < 0) { //条件が成立しているので通過 10293: XEiJ.mpuCycleCount += 2; 10294: } else { //条件が成立していないのでデクリメント 10295: int rrr = XEiJ.regOC & 7; 10296: int s = XEiJ.regRn[rrr]; 10297: if ((short) s == 0) { //Drの下位16bitが0なので通過 10298: XEiJ.mpuCycleCount += 2; 10299: XEiJ.regRn[rrr] = s + 65535; 10300: } else { //Drの下位16bitが0でないので分岐 10301: XEiJ.mpuCycleCount++; 10302: XEiJ.regRn[rrr] = s - 1; //下位16bitが0でないので上位16bitは変化しない 10303: irpSetPC (t); 10304: } 10305: } 10306: } else if (ea < XEiJ.EA_AR) { //SLT.B Dr 10307: if (XEiJ.MPU_CC_LT << XEiJ.regCCR < 0) { //セット 10308: XEiJ.mpuCycleCount++; 10309: XEiJ.regRn[ea] |= 0xff; 10310: } else { //クリア 10311: XEiJ.mpuCycleCount++; 10312: XEiJ.regRn[ea] &= ~0xff; 10313: } 10314: } else if ((XEiJ.EAM_PW | XEiJ.EAM_PX | XEiJ.EAM_IM) << ea < 0L) { //TRAPLT.W/TRAPLT.L/TRAPLT 10315: if (ea == 072) { //.W 10316: mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); 10317: } else if (ea == 073) { //.L 10318: mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS); 10319: } 10320: if (XEiJ.MPU_CC_LT << XEiJ.regCCR < 0) { 10321: //条件が成立しているのでTRAPする 10322: m60Address = XEiJ.regPC0; //アドレスは命令の先頭 10323: M68kException.m6eNumber = M68kException.M6E_TRAPV_INSTRUCTION; 10324: throw M68kException.m6eSignal; 10325: } else { 10326: //条件が成立していないのでTRAPしない 10327: XEiJ.mpuCycleCount++; 10328: } 10329: } else { //SLT.B <mem> 10330: XEiJ.mpuCycleCount++; 10331: mmuWriteByteData (efaMltByte (ea), XEiJ.MPU_CC_LT << XEiJ.regCCR >> 31, XEiJ.regSRS); 10332: } 10333: } //irpSlt 10334: 10335: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10336: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 10337: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 10338: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10339: //SGT.B <ea> |-|012346|-|-***-|-----|D M+-WXZ |0101_111_011_mmm_rrr 10340: //SNLE.B <ea> |A|012346|-|-***-|-----|D M+-WXZ |0101_111_011_mmm_rrr [SGT.B <ea>] 10341: //DBGT.W Dr,<label> |-|012346|-|-***-|-----| |0101_111_011_001_rrr-{offset} 10342: //DBNLE.W Dr,<label> |A|012346|-|-***-|-----| |0101_111_011_001_rrr-{offset} [DBGT.W Dr,<label>] 10343: //TRAPGT.W #<data> |-|--2346|-|-***-|-----| |0101_111_011_111_010-{data} 10344: //TPGT.W #<data> |A|--2346|-|-***-|-----| |0101_111_011_111_010-{data} [TRAPGT.W #<data>] 10345: //TPNLE.W #<data> |A|--2346|-|-***-|-----| |0101_111_011_111_010-{data} [TRAPGT.W #<data>] 10346: //TRAPNLE.W #<data> |A|--2346|-|-***-|-----| |0101_111_011_111_010-{data} [TRAPGT.W #<data>] 10347: //TRAPGT.L #<data> |-|--2346|-|-***-|-----| |0101_111_011_111_011-{data} 10348: //TPGT.L #<data> |A|--2346|-|-***-|-----| |0101_111_011_111_011-{data} [TRAPGT.L #<data>] 10349: //TPNLE.L #<data> |A|--2346|-|-***-|-----| |0101_111_011_111_011-{data} [TRAPGT.L #<data>] 10350: //TRAPNLE.L #<data> |A|--2346|-|-***-|-----| |0101_111_011_111_011-{data} [TRAPGT.L #<data>] 10351: //TRAPGT |-|--2346|-|-***-|-----| |0101_111_011_111_100 10352: //TPGT |A|--2346|-|-***-|-----| |0101_111_011_111_100 [TRAPGT] 10353: //TPNLE |A|--2346|-|-***-|-----| |0101_111_011_111_100 [TRAPGT] 10354: //TRAPNLE |A|--2346|-|-***-|-----| |0101_111_011_111_100 [TRAPGT] 10355: public static void irpSgt () throws M68kException { 10356: int ea = XEiJ.regOC & 63; 10357: if (ea >> 3 == XEiJ.MMM_AR) { //DBGT.W Dr,<label> 10358: int t = XEiJ.regPC; //pc0+2 10359: XEiJ.regPC = t + 2; //pc0+4 10360: t += mmuReadWordSignExword (t, XEiJ.regSRS); //pc0+2+16bitディスプレースメント 10361: if ((t & 1) != 0) { //分岐先のアドレスが奇数 10362: //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ 10363: irpBccAddressError (t); 10364: } 10365: if (XEiJ.MPU_CC_GT << XEiJ.regCCR < 0) { //条件が成立しているので通過 10366: XEiJ.mpuCycleCount += 2; 10367: } else { //条件が成立していないのでデクリメント 10368: int rrr = XEiJ.regOC & 7; 10369: int s = XEiJ.regRn[rrr]; 10370: if ((short) s == 0) { //Drの下位16bitが0なので通過 10371: XEiJ.mpuCycleCount += 2; 10372: XEiJ.regRn[rrr] = s + 65535; 10373: } else { //Drの下位16bitが0でないので分岐 10374: XEiJ.mpuCycleCount++; 10375: XEiJ.regRn[rrr] = s - 1; //下位16bitが0でないので上位16bitは変化しない 10376: irpSetPC (t); 10377: } 10378: } 10379: } else if (ea < XEiJ.EA_AR) { //SGT.B Dr 10380: if (XEiJ.MPU_CC_GT << XEiJ.regCCR < 0) { //セット 10381: XEiJ.mpuCycleCount++; 10382: XEiJ.regRn[ea] |= 0xff; 10383: } else { //クリア 10384: XEiJ.mpuCycleCount++; 10385: XEiJ.regRn[ea] &= ~0xff; 10386: } 10387: } else if ((XEiJ.EAM_PW | XEiJ.EAM_PX | XEiJ.EAM_IM) << ea < 0L) { //TRAPGT.W/TRAPGT.L/TRAPGT 10388: if (ea == 072) { //.W 10389: mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); 10390: } else if (ea == 073) { //.L 10391: mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS); 10392: } 10393: if (XEiJ.MPU_CC_GT << XEiJ.regCCR < 0) { 10394: //条件が成立しているのでTRAPする 10395: m60Address = XEiJ.regPC0; //アドレスは命令の先頭 10396: M68kException.m6eNumber = M68kException.M6E_TRAPV_INSTRUCTION; 10397: throw M68kException.m6eSignal; 10398: } else { 10399: //条件が成立していないのでTRAPしない 10400: XEiJ.mpuCycleCount++; 10401: } 10402: } else { //SGT.B <mem> 10403: XEiJ.mpuCycleCount++; 10404: mmuWriteByteData (efaMltByte (ea), XEiJ.MPU_CC_GT << XEiJ.regCCR >> 31, XEiJ.regSRS); 10405: } 10406: } //irpSgt 10407: 10408: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10409: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 10410: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 10411: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10412: //SLE.B <ea> |-|012346|-|-***-|-----|D M+-WXZ |0101_111_111_mmm_rrr 10413: //SNGT.B <ea> |A|012346|-|-***-|-----|D M+-WXZ |0101_111_111_mmm_rrr [SLE.B <ea>] 10414: //DBLE.W Dr,<label> |-|012346|-|-***-|-----| |0101_111_111_001_rrr-{offset} 10415: //DBNGT.W Dr,<label> |A|012346|-|-***-|-----| |0101_111_111_001_rrr-{offset} [DBLE.W Dr,<label>] 10416: //TRAPLE.W #<data> |-|--2346|-|-***-|-----| |0101_111_111_111_010-{data} 10417: //TPLE.W #<data> |A|--2346|-|-***-|-----| |0101_111_111_111_010-{data} [TRAPLE.W #<data>] 10418: //TPNGT.W #<data> |A|--2346|-|-***-|-----| |0101_111_111_111_010-{data} [TRAPLE.W #<data>] 10419: //TRAPNGT.W #<data> |A|--2346|-|-***-|-----| |0101_111_111_111_010-{data} [TRAPLE.W #<data>] 10420: //TRAPLE.L #<data> |-|--2346|-|-***-|-----| |0101_111_111_111_011-{data} 10421: //TPLE.L #<data> |A|--2346|-|-***-|-----| |0101_111_111_111_011-{data} [TRAPLE.L #<data>] 10422: //TPNGT.L #<data> |A|--2346|-|-***-|-----| |0101_111_111_111_011-{data} [TRAPLE.L #<data>] 10423: //TRAPNGT.L #<data> |A|--2346|-|-***-|-----| |0101_111_111_111_011-{data} [TRAPLE.L #<data>] 10424: //TRAPLE |-|--2346|-|-***-|-----| |0101_111_111_111_100 10425: //TPLE |A|--2346|-|-***-|-----| |0101_111_111_111_100 [TRAPLE] 10426: //TPNGT |A|--2346|-|-***-|-----| |0101_111_111_111_100 [TRAPLE] 10427: //TRAPNGT |A|--2346|-|-***-|-----| |0101_111_111_111_100 [TRAPLE] 10428: public static void irpSle () throws M68kException { 10429: int ea = XEiJ.regOC & 63; 10430: if (ea >> 3 == XEiJ.MMM_AR) { //DBLE.W Dr,<label> 10431: int t = XEiJ.regPC; //pc0+2 10432: XEiJ.regPC = t + 2; //pc0+4 10433: t += mmuReadWordSignExword (t, XEiJ.regSRS); //pc0+2+16bitディスプレースメント 10434: if ((t & 1) != 0) { //分岐先のアドレスが奇数 10435: //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ 10436: irpBccAddressError (t); 10437: } 10438: if (XEiJ.MPU_CC_LE << XEiJ.regCCR < 0) { //条件が成立しているので通過 10439: XEiJ.mpuCycleCount += 2; 10440: } else { //条件が成立していないのでデクリメント 10441: int rrr = XEiJ.regOC & 7; 10442: int s = XEiJ.regRn[rrr]; 10443: if ((short) s == 0) { //Drの下位16bitが0なので通過 10444: XEiJ.mpuCycleCount += 2; 10445: XEiJ.regRn[rrr] = s + 65535; 10446: } else { //Drの下位16bitが0でないので分岐 10447: XEiJ.mpuCycleCount++; 10448: XEiJ.regRn[rrr] = s - 1; //下位16bitが0でないので上位16bitは変化しない 10449: irpSetPC (t); 10450: } 10451: } 10452: } else if (ea < XEiJ.EA_AR) { //SLE.B Dr 10453: if (XEiJ.MPU_CC_LE << XEiJ.regCCR < 0) { //セット 10454: XEiJ.mpuCycleCount++; 10455: XEiJ.regRn[ea] |= 0xff; 10456: } else { //クリア 10457: XEiJ.mpuCycleCount++; 10458: XEiJ.regRn[ea] &= ~0xff; 10459: } 10460: } else if ((XEiJ.EAM_PW | XEiJ.EAM_PX | XEiJ.EAM_IM) << ea < 0L) { //TRAPLE.W/TRAPLE.L/TRAPLE 10461: if (ea == 072) { //.W 10462: mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); 10463: } else if (ea == 073) { //.L 10464: mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS); 10465: } 10466: if (XEiJ.MPU_CC_LE << XEiJ.regCCR < 0) { 10467: //条件が成立しているのでTRAPする 10468: m60Address = XEiJ.regPC0; //アドレスは命令の先頭 10469: M68kException.m6eNumber = M68kException.M6E_TRAPV_INSTRUCTION; 10470: throw M68kException.m6eSignal; 10471: } else { 10472: //条件が成立していないのでTRAPしない 10473: XEiJ.mpuCycleCount++; 10474: } 10475: } else { //SLE.B <mem> 10476: XEiJ.mpuCycleCount++; 10477: mmuWriteByteData (efaMltByte (ea), XEiJ.MPU_CC_LE << XEiJ.regCCR >> 31, XEiJ.regSRS); 10478: } 10479: } //irpSle 10480: 10481: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10482: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 10483: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 10484: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10485: //BRA.W <label> |-|012346|-|-----|-----| |0110_000_000_000_000-{offset} 10486: //JBRA.W <label> |A|012346|-|-----|-----| |0110_000_000_000_000-{offset} [BRA.W <label>] 10487: //BRA.S <label> |-|012346|-|-----|-----| |0110_000_000_sss_sss (s is not equal to 0) 10488: //JBRA.S <label> |A|012346|-|-----|-----| |0110_000_000_sss_sss (s is not equal to 0) [BRA.S <label>] 10489: public static void irpBrasw () throws M68kException { 10490: XEiJ.mpuCycleCount++; //0clkにしない 10491: int t = XEiJ.regPC; //pc0+2 10492: int s = (byte) XEiJ.regOC; //オフセット 10493: if (s == 0) { //BRA.W 10494: XEiJ.regPC = t + 2; 10495: s = mmuReadWordSignExword (t, XEiJ.regSRS); //pcws 10496: } 10497: irpSetPC (t + s); //pc0+2+オフセット 10498: } //irpBrasw 10499: 10500: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10501: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 10502: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 10503: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10504: //BRA.S <label> |-|012346|-|-----|-----| |0110_000_001_sss_sss 10505: //JBRA.S <label> |A|012346|-|-----|-----| |0110_000_001_sss_sss [BRA.S <label>] 10506: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10507: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 10508: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 10509: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10510: //BRA.S <label> |-|012346|-|-----|-----| |0110_000_010_sss_sss 10511: //JBRA.S <label> |A|012346|-|-----|-----| |0110_000_010_sss_sss [BRA.S <label>] 10512: public static void irpBras () throws M68kException { 10513: XEiJ.mpuCycleCount++; //0clkにしない 10514: irpSetPC (XEiJ.regPC + (byte) XEiJ.regOC); //pc0+2+オフセット 10515: } //irpBras 10516: 10517: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10518: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 10519: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 10520: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10521: //BRA.S <label> |-|--2346|-|-----|-----| |0110_000_011_sss_sss (s is not equal to 63) 10522: //JBRA.S <label> |A|--2346|-|-----|-----| |0110_000_011_sss_sss (s is not equal to 63) [BRA.S <label>] 10523: //BRA.L <label> |-|--2346|-|-----|-----| |0110_000_011_111_111-{offset} 10524: public static void irpBrasl () throws M68kException { 10525: XEiJ.mpuCycleCount++; //0clkにしない 10526: int t = XEiJ.regPC; //pc0+2 10527: int s = (byte) XEiJ.regOC; //オフセット 10528: if (s == -1) { //BRA.L 10529: XEiJ.regPC = t + 4; 10530: s = mmuReadLongExword (t, XEiJ.regSRS); //pcls 10531: } 10532: irpSetPC (t + s); //pc0+2+オフセット 10533: } //irpBrasl 10534: 10535: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10536: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 10537: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 10538: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10539: //BSR.W <label> |-|012346|-|-----|-----| |0110_000_100_000_000-{offset} 10540: //JBSR.W <label> |A|012346|-|-----|-----| |0110_000_100_000_000-{offset} [BSR.W <label>] 10541: //BSR.S <label> |-|012346|-|-----|-----| |0110_000_100_sss_sss (s is not equal to 0) 10542: //JBSR.S <label> |A|012346|-|-----|-----| |0110_000_100_sss_sss (s is not equal to 0) [BSR.S <label>] 10543: public static void irpBsrsw () throws M68kException { 10544: XEiJ.mpuCycleCount++; 10545: int t = XEiJ.regPC; //pc0+2 10546: int s = (byte) XEiJ.regOC; //オフセット 10547: if (s == 0) { //BSR.W 10548: XEiJ.regPC = t + 2; 10549: s = mmuReadWordSignExword (t, XEiJ.regSRS); //pcws 10550: } 10551: m60Incremented -= 4L << (7 << 3); 10552: int sp = m60Address = XEiJ.regRn[15] -= 4; 10553: mmuWriteLongData (sp, XEiJ.regPC, XEiJ.regSRS); //pushl 10554: irpSetPC (t + s); //pc0+2+オフセット 10555: } //irpBsrsw 10556: 10557: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10558: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 10559: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 10560: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10561: //BSR.S <label> |-|012346|-|-----|-----| |0110_000_101_sss_sss 10562: //JBSR.S <label> |A|012346|-|-----|-----| |0110_000_101_sss_sss [BSR.S <label>] 10563: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10564: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 10565: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 10566: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10567: //BSR.S <label> |-|012346|-|-----|-----| |0110_000_110_sss_sss 10568: //JBSR.S <label> |A|012346|-|-----|-----| |0110_000_110_sss_sss [BSR.S <label>] 10569: public static void irpBsrs () throws M68kException { 10570: XEiJ.mpuCycleCount++; 10571: m60Incremented -= 4L << (7 << 3); 10572: int sp = m60Address = XEiJ.regRn[15] -= 4; 10573: mmuWriteLongData (sp, XEiJ.regPC, XEiJ.regSRS); //pushl 10574: irpSetPC (XEiJ.regPC + (byte) XEiJ.regOC); //pc0+2+オフセット 10575: } //irpBsrs 10576: 10577: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10578: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 10579: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 10580: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10581: //BSR.S <label> |-|--2346|-|-----|-----| |0110_000_111_sss_sss (s is not equal to 63) 10582: //JBSR.S <label> |A|--2346|-|-----|-----| |0110_000_111_sss_sss (s is not equal to 63) [BSR.S <label>] 10583: //BSR.L <label> |-|--2346|-|-----|-----| |0110_000_111_111_111-{offset} 10584: public static void irpBsrsl () throws M68kException { 10585: XEiJ.mpuCycleCount++; 10586: int t = XEiJ.regPC; //pc0+2 10587: int s = (byte) XEiJ.regOC; //オフセット 10588: if (s == -1) { //BSR.L 10589: XEiJ.regPC = t + 4; 10590: s = mmuReadLongExword (t, XEiJ.regSRS); //pcls 10591: } 10592: m60Incremented -= 4L << (7 << 3); 10593: int sp = m60Address = XEiJ.regRn[15] -= 4; 10594: mmuWriteLongData (sp, XEiJ.regPC, XEiJ.regSRS); //pushl 10595: irpSetPC (t + s); //pc0+2+オフセット 10596: } //irpBsrsl 10597: 10598: //irpBccAddressError (int t) 10599: public static void irpBccAddressError (int t) throws M68kException { 10600: M68kException.m6eNumber = M68kException.M6E_ADDRESS_ERROR; 10601: m60Address = t & -2; //偶数にする 10602: M68kException.m6eDirection = XEiJ.MPU_WR_READ; 10603: M68kException.m6eSize = XEiJ.MPU_SS_WORD; 10604: throw M68kException.m6eSignal; 10605: } 10606: 10607: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10608: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 10609: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 10610: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10611: //BHI.W <label> |-|012346|-|--*-*|-----| |0110_001_000_000_000-{offset} 10612: //BNLS.W <label> |A|012346|-|--*-*|-----| |0110_001_000_000_000-{offset} [BHI.W <label>] 10613: //JBHI.W <label> |A|012346|-|--*-*|-----| |0110_001_000_000_000-{offset} [BHI.W <label>] 10614: //JBNLS.W <label> |A|012346|-|--*-*|-----| |0110_001_000_000_000-{offset} [BHI.W <label>] 10615: //BHI.S <label> |-|012346|-|--*-*|-----| |0110_001_000_sss_sss (s is not equal to 0) 10616: //BNLS.S <label> |A|012346|-|--*-*|-----| |0110_001_000_sss_sss (s is not equal to 0) [BHI.S <label>] 10617: //JBHI.S <label> |A|012346|-|--*-*|-----| |0110_001_000_sss_sss (s is not equal to 0) [BHI.S <label>] 10618: //JBNLS.S <label> |A|012346|-|--*-*|-----| |0110_001_000_sss_sss (s is not equal to 0) [BHI.S <label>] 10619: //JBLS.L <label> |A|012346|-|--*-*|-----| |0110_001_000_000_110-0100111011111001-{address} [BHI.S (*)+8;JMP <label>] 10620: //JBNHI.L <label> |A|012346|-|--*-*|-----| |0110_001_000_000_110-0100111011111001-{address} [BHI.S (*)+8;JMP <label>] 10621: public static void irpBhisw () throws M68kException { 10622: XEiJ.mpuCycleCount++; 10623: int t = XEiJ.regPC; //pc0+2 10624: int s = (byte) XEiJ.regOC; //8bitディスプレースメント 10625: if (s == 0) { //Bcc.W 10626: XEiJ.regPC = t + 2; //pc0+4 10627: s = mmuReadWordSignExword (t, XEiJ.regSRS); //16bitディスプレースメント 10628: } 10629: t += s; //pc0+2+ディスプレースメント 10630: if ((t & 1) != 0) { //分岐先のアドレスが奇数 10631: //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ 10632: irpBccAddressError (t); 10633: } 10634: if (XEiJ.MPU_CC_HI << XEiJ.regCCR < 0) { //分岐する 10635: irpSetPC (t); 10636: } 10637: } //irpBhisw 10638: 10639: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10640: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 10641: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 10642: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10643: //BHI.S <label> |-|012346|-|--*-*|-----| |0110_001_001_sss_sss 10644: //BNLS.S <label> |A|012346|-|--*-*|-----| |0110_001_001_sss_sss [BHI.S <label>] 10645: //JBHI.S <label> |A|012346|-|--*-*|-----| |0110_001_001_sss_sss [BHI.S <label>] 10646: //JBNLS.S <label> |A|012346|-|--*-*|-----| |0110_001_001_sss_sss [BHI.S <label>] 10647: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10648: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 10649: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 10650: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10651: //BHI.S <label> |-|012346|-|--*-*|-----| |0110_001_010_sss_sss 10652: //BNLS.S <label> |A|012346|-|--*-*|-----| |0110_001_010_sss_sss [BHI.S <label>] 10653: //JBHI.S <label> |A|012346|-|--*-*|-----| |0110_001_010_sss_sss [BHI.S <label>] 10654: //JBNLS.S <label> |A|012346|-|--*-*|-----| |0110_001_010_sss_sss [BHI.S <label>] 10655: public static void irpBhis () throws M68kException { 10656: XEiJ.mpuCycleCount++; 10657: int t = XEiJ.regPC; //pc0+2 10658: int s = (byte) XEiJ.regOC; //8bitディスプレースメント 10659: t += s; //pc0+2+ディスプレースメント 10660: if ((t & 1) != 0) { //分岐先のアドレスが奇数 10661: //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ 10662: irpBccAddressError (t); 10663: } 10664: if (XEiJ.MPU_CC_HI << XEiJ.regCCR < 0) { //分岐する 10665: irpSetPC (t); 10666: } 10667: } //irpBhis 10668: 10669: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10670: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 10671: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 10672: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10673: //BHI.S <label> |-|--2346|-|--*-*|-----| |0110_001_011_sss_sss (s is not equal to 63) 10674: //BNLS.S <label> |A|--2346|-|--*-*|-----| |0110_001_011_sss_sss (s is not equal to 63) [BHI.S <label>] 10675: //JBHI.S <label> |A|--2346|-|--*-*|-----| |0110_001_011_sss_sss (s is not equal to 63) [BHI.S <label>] 10676: //JBNLS.S <label> |A|--2346|-|--*-*|-----| |0110_001_011_sss_sss (s is not equal to 63) [BHI.S <label>] 10677: //BHI.L <label> |-|--2346|-|--*-*|-----| |0110_001_011_111_111-{offset} 10678: //BNLS.L <label> |A|--2346|-|--*-*|-----| |0110_001_011_111_111-{offset} [BHI.L <label>] 10679: public static void irpBhisl () throws M68kException { 10680: XEiJ.mpuCycleCount++; 10681: int t = XEiJ.regPC; //pc0+2 10682: int s = (byte) XEiJ.regOC; //8bitディスプレースメント 10683: if (s == -1) { //Bcc.L 10684: XEiJ.regPC = t + 4; //pc0+6 10685: s = mmuReadLongExword (t, XEiJ.regSRS); //32bitディスプレースメント 10686: } 10687: t += s; //pc0+2+ディスプレースメント 10688: if ((t & 1) != 0) { //分岐先のアドレスが奇数 10689: //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ 10690: irpBccAddressError (t); 10691: } 10692: if (XEiJ.MPU_CC_HI << XEiJ.regCCR < 0) { //分岐する 10693: irpSetPC (t); 10694: } 10695: } //irpBhisl 10696: 10697: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10698: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 10699: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 10700: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10701: //BLS.W <label> |-|012346|-|--*-*|-----| |0110_001_100_000_000-{offset} 10702: //BNHI.W <label> |A|012346|-|--*-*|-----| |0110_001_100_000_000-{offset} [BLS.W <label>] 10703: //JBLS.W <label> |A|012346|-|--*-*|-----| |0110_001_100_000_000-{offset} [BLS.W <label>] 10704: //JBNHI.W <label> |A|012346|-|--*-*|-----| |0110_001_100_000_000-{offset} [BLS.W <label>] 10705: //BLS.S <label> |-|012346|-|--*-*|-----| |0110_001_100_sss_sss (s is not equal to 0) 10706: //BNHI.S <label> |A|012346|-|--*-*|-----| |0110_001_100_sss_sss (s is not equal to 0) [BLS.S <label>] 10707: //JBLS.S <label> |A|012346|-|--*-*|-----| |0110_001_100_sss_sss (s is not equal to 0) [BLS.S <label>] 10708: //JBNHI.S <label> |A|012346|-|--*-*|-----| |0110_001_100_sss_sss (s is not equal to 0) [BLS.S <label>] 10709: //JBHI.L <label> |A|012346|-|--*-*|-----| |0110_001_100_000_110-0100111011111001-{address} [BLS.S (*)+8;JMP <label>] 10710: //JBNLS.L <label> |A|012346|-|--*-*|-----| |0110_001_100_000_110-0100111011111001-{address} [BLS.S (*)+8;JMP <label>] 10711: public static void irpBlssw () throws M68kException { 10712: XEiJ.mpuCycleCount++; 10713: int t = XEiJ.regPC; //pc0+2 10714: int s = (byte) XEiJ.regOC; //8bitディスプレースメント 10715: if (s == 0) { //Bcc.W 10716: XEiJ.regPC = t + 2; //pc0+4 10717: s = mmuReadWordSignExword (t, XEiJ.regSRS); //16bitディスプレースメント 10718: } 10719: t += s; //pc0+2+ディスプレースメント 10720: if ((t & 1) != 0) { //分岐先のアドレスが奇数 10721: //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ 10722: irpBccAddressError (t); 10723: } 10724: if (XEiJ.MPU_CC_LS << XEiJ.regCCR < 0) { //分岐する 10725: irpSetPC (t); 10726: } 10727: } //irpBlssw 10728: 10729: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10730: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 10731: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 10732: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10733: //BLS.S <label> |-|012346|-|--*-*|-----| |0110_001_101_sss_sss 10734: //BNHI.S <label> |A|012346|-|--*-*|-----| |0110_001_101_sss_sss [BLS.S <label>] 10735: //JBLS.S <label> |A|012346|-|--*-*|-----| |0110_001_101_sss_sss [BLS.S <label>] 10736: //JBNHI.S <label> |A|012346|-|--*-*|-----| |0110_001_101_sss_sss [BLS.S <label>] 10737: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10738: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 10739: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 10740: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10741: //BLS.S <label> |-|012346|-|--*-*|-----| |0110_001_110_sss_sss 10742: //BNHI.S <label> |A|012346|-|--*-*|-----| |0110_001_110_sss_sss [BLS.S <label>] 10743: //JBLS.S <label> |A|012346|-|--*-*|-----| |0110_001_110_sss_sss [BLS.S <label>] 10744: //JBNHI.S <label> |A|012346|-|--*-*|-----| |0110_001_110_sss_sss [BLS.S <label>] 10745: public static void irpBlss () throws M68kException { 10746: XEiJ.mpuCycleCount++; 10747: int t = XEiJ.regPC; //pc0+2 10748: int s = (byte) XEiJ.regOC; //8bitディスプレースメント 10749: t += s; //pc0+2+ディスプレースメント 10750: if ((t & 1) != 0) { //分岐先のアドレスが奇数 10751: //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ 10752: irpBccAddressError (t); 10753: } 10754: if (XEiJ.MPU_CC_LS << XEiJ.regCCR < 0) { //分岐する 10755: irpSetPC (t); 10756: } 10757: } //irpBlss 10758: 10759: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10760: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 10761: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 10762: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10763: //BLS.S <label> |-|--2346|-|--*-*|-----| |0110_001_111_sss_sss (s is not equal to 63) 10764: //BNHI.S <label> |A|--2346|-|--*-*|-----| |0110_001_111_sss_sss (s is not equal to 63) [BLS.S <label>] 10765: //JBLS.S <label> |A|--2346|-|--*-*|-----| |0110_001_111_sss_sss (s is not equal to 63) [BLS.S <label>] 10766: //JBNHI.S <label> |A|--2346|-|--*-*|-----| |0110_001_111_sss_sss (s is not equal to 63) [BLS.S <label>] 10767: //BLS.L <label> |-|--2346|-|--*-*|-----| |0110_001_111_111_111-{offset} 10768: //BNHI.L <label> |A|--2346|-|--*-*|-----| |0110_001_111_111_111-{offset} [BLS.L <label>] 10769: public static void irpBlssl () throws M68kException { 10770: XEiJ.mpuCycleCount++; 10771: int t = XEiJ.regPC; //pc0+2 10772: int s = (byte) XEiJ.regOC; //8bitディスプレースメント 10773: if (s == -1) { //Bcc.L 10774: XEiJ.regPC = t + 4; //pc0+6 10775: s = mmuReadLongExword (t, XEiJ.regSRS); //32bitディスプレースメント 10776: } 10777: t += s; //pc0+2+ディスプレースメント 10778: if ((t & 1) != 0) { //分岐先のアドレスが奇数 10779: //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ 10780: irpBccAddressError (t); 10781: } 10782: if (XEiJ.MPU_CC_LS << XEiJ.regCCR < 0) { //分岐する 10783: irpSetPC (t); 10784: } 10785: } //irpBlssl 10786: 10787: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10788: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 10789: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 10790: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10791: //BCC.W <label> |-|012346|-|----*|-----| |0110_010_000_000_000-{offset} 10792: //BHS.W <label> |A|012346|-|----*|-----| |0110_010_000_000_000-{offset} [BCC.W <label>] 10793: //BNCS.W <label> |A|012346|-|----*|-----| |0110_010_000_000_000-{offset} [BCC.W <label>] 10794: //BNLO.W <label> |A|012346|-|----*|-----| |0110_010_000_000_000-{offset} [BCC.W <label>] 10795: //JBCC.W <label> |A|012346|-|----*|-----| |0110_010_000_000_000-{offset} [BCC.W <label>] 10796: //JBHS.W <label> |A|012346|-|----*|-----| |0110_010_000_000_000-{offset} [BCC.W <label>] 10797: //JBNCS.W <label> |A|012346|-|----*|-----| |0110_010_000_000_000-{offset} [BCC.W <label>] 10798: //JBNLO.W <label> |A|012346|-|----*|-----| |0110_010_000_000_000-{offset} [BCC.W <label>] 10799: //BCC.S <label> |-|012346|-|----*|-----| |0110_010_000_sss_sss (s is not equal to 0) 10800: //BHS.S <label> |A|012346|-|----*|-----| |0110_010_000_sss_sss (s is not equal to 0) [BCC.S <label>] 10801: //BNCS.S <label> |A|012346|-|----*|-----| |0110_010_000_sss_sss (s is not equal to 0) [BCC.S <label>] 10802: //BNLO.S <label> |A|012346|-|----*|-----| |0110_010_000_sss_sss (s is not equal to 0) [BCC.S <label>] 10803: //JBCC.S <label> |A|012346|-|----*|-----| |0110_010_000_sss_sss (s is not equal to 0) [BCC.S <label>] 10804: //JBHS.S <label> |A|012346|-|----*|-----| |0110_010_000_sss_sss (s is not equal to 0) [BCC.S <label>] 10805: //JBNCS.S <label> |A|012346|-|----*|-----| |0110_010_000_sss_sss (s is not equal to 0) [BCC.S <label>] 10806: //JBNLO.S <label> |A|012346|-|----*|-----| |0110_010_000_sss_sss (s is not equal to 0) [BCC.S <label>] 10807: //JBCS.L <label> |A|012346|-|----*|-----| |0110_010_000_000_110-0100111011111001-{address} [BCC.S (*)+8;JMP <label>] 10808: //JBLO.L <label> |A|012346|-|----*|-----| |0110_010_000_000_110-0100111011111001-{address} [BCC.S (*)+8;JMP <label>] 10809: //JBNCC.L <label> |A|012346|-|----*|-----| |0110_010_000_000_110-0100111011111001-{address} [BCC.S (*)+8;JMP <label>] 10810: //JBNHS.L <label> |A|012346|-|----*|-----| |0110_010_000_000_110-0100111011111001-{address} [BCC.S (*)+8;JMP <label>] 10811: public static void irpBhssw () throws M68kException { 10812: XEiJ.mpuCycleCount++; 10813: int t = XEiJ.regPC; //pc0+2 10814: int s = (byte) XEiJ.regOC; //8bitディスプレースメント 10815: if (s == 0) { //Bcc.W 10816: XEiJ.regPC = t + 2; //pc0+4 10817: s = mmuReadWordSignExword (t, XEiJ.regSRS); //16bitディスプレースメント 10818: } 10819: t += s; //pc0+2+ディスプレースメント 10820: if ((t & 1) != 0) { //分岐先のアドレスが奇数 10821: //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ 10822: irpBccAddressError (t); 10823: } 10824: if (XEiJ.MPU_CC_HS << XEiJ.regCCR < 0) { //分岐する 10825: irpSetPC (t); 10826: } 10827: } //irpBhssw 10828: 10829: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10830: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 10831: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 10832: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10833: //BCC.S <label> |-|012346|-|----*|-----| |0110_010_001_sss_sss 10834: //BHS.S <label> |A|012346|-|----*|-----| |0110_010_001_sss_sss [BCC.S <label>] 10835: //BNCS.S <label> |A|012346|-|----*|-----| |0110_010_001_sss_sss [BCC.S <label>] 10836: //BNLO.S <label> |A|012346|-|----*|-----| |0110_010_001_sss_sss [BCC.S <label>] 10837: //JBCC.S <label> |A|012346|-|----*|-----| |0110_010_001_sss_sss [BCC.S <label>] 10838: //JBHS.S <label> |A|012346|-|----*|-----| |0110_010_001_sss_sss [BCC.S <label>] 10839: //JBNCS.S <label> |A|012346|-|----*|-----| |0110_010_001_sss_sss [BCC.S <label>] 10840: //JBNLO.S <label> |A|012346|-|----*|-----| |0110_010_001_sss_sss [BCC.S <label>] 10841: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10842: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 10843: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 10844: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10845: //BCC.S <label> |-|012346|-|----*|-----| |0110_010_010_sss_sss 10846: //BHS.S <label> |A|012346|-|----*|-----| |0110_010_010_sss_sss [BCC.S <label>] 10847: //BNCS.S <label> |A|012346|-|----*|-----| |0110_010_010_sss_sss [BCC.S <label>] 10848: //BNLO.S <label> |A|012346|-|----*|-----| |0110_010_010_sss_sss [BCC.S <label>] 10849: //JBCC.S <label> |A|012346|-|----*|-----| |0110_010_010_sss_sss [BCC.S <label>] 10850: //JBHS.S <label> |A|012346|-|----*|-----| |0110_010_010_sss_sss [BCC.S <label>] 10851: //JBNCS.S <label> |A|012346|-|----*|-----| |0110_010_010_sss_sss [BCC.S <label>] 10852: //JBNLO.S <label> |A|012346|-|----*|-----| |0110_010_010_sss_sss [BCC.S <label>] 10853: public static void irpBhss () throws M68kException { 10854: XEiJ.mpuCycleCount++; 10855: int t = XEiJ.regPC; //pc0+2 10856: int s = (byte) XEiJ.regOC; //8bitディスプレースメント 10857: t += s; //pc0+2+ディスプレースメント 10858: if ((t & 1) != 0) { //分岐先のアドレスが奇数 10859: //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ 10860: irpBccAddressError (t); 10861: } 10862: if (XEiJ.MPU_CC_HS << XEiJ.regCCR < 0) { //分岐する 10863: irpSetPC (t); 10864: } 10865: } //irpBhss 10866: 10867: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10868: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 10869: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 10870: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10871: //BCC.S <label> |-|--2346|-|----*|-----| |0110_010_011_sss_sss (s is not equal to 63) 10872: //BHS.S <label> |A|--2346|-|----*|-----| |0110_010_011_sss_sss (s is not equal to 63) [BCC.S <label>] 10873: //BNCS.S <label> |A|--2346|-|----*|-----| |0110_010_011_sss_sss (s is not equal to 63) [BCC.S <label>] 10874: //BNLO.S <label> |A|--2346|-|----*|-----| |0110_010_011_sss_sss (s is not equal to 63) [BCC.S <label>] 10875: //JBCC.S <label> |A|--2346|-|----*|-----| |0110_010_011_sss_sss (s is not equal to 63) [BCC.S <label>] 10876: //JBHS.S <label> |A|--2346|-|----*|-----| |0110_010_011_sss_sss (s is not equal to 63) [BCC.S <label>] 10877: //JBNCS.S <label> |A|--2346|-|----*|-----| |0110_010_011_sss_sss (s is not equal to 63) [BCC.S <label>] 10878: //JBNLO.S <label> |A|--2346|-|----*|-----| |0110_010_011_sss_sss (s is not equal to 63) [BCC.S <label>] 10879: //BCC.L <label> |-|--2346|-|----*|-----| |0110_010_011_111_111-{offset} 10880: //BHS.L <label> |A|--2346|-|----*|-----| |0110_010_011_111_111-{offset} [BCC.L <label>] 10881: //BNCS.L <label> |A|--2346|-|----*|-----| |0110_010_011_111_111-{offset} [BCC.L <label>] 10882: //BNLO.L <label> |A|--2346|-|----*|-----| |0110_010_011_111_111-{offset} [BCC.L <label>] 10883: public static void irpBhssl () throws M68kException { 10884: XEiJ.mpuCycleCount++; 10885: int t = XEiJ.regPC; //pc0+2 10886: int s = (byte) XEiJ.regOC; //8bitディスプレースメント 10887: if (s == -1) { //Bcc.L 10888: XEiJ.regPC = t + 4; //pc0+6 10889: s = mmuReadLongExword (t, XEiJ.regSRS); //32bitディスプレースメント 10890: } 10891: t += s; //pc0+2+ディスプレースメント 10892: if ((t & 1) != 0) { //分岐先のアドレスが奇数 10893: //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ 10894: irpBccAddressError (t); 10895: } 10896: if (XEiJ.MPU_CC_HS << XEiJ.regCCR < 0) { //分岐する 10897: irpSetPC (t); 10898: } 10899: } //irpBhssl 10900: 10901: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10902: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 10903: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 10904: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10905: //BCS.W <label> |-|012346|-|----*|-----| |0110_010_100_000_000-{offset} 10906: //BLO.W <label> |A|012346|-|----*|-----| |0110_010_100_000_000-{offset} [BCS.W <label>] 10907: //BNCC.W <label> |A|012346|-|----*|-----| |0110_010_100_000_000-{offset} [BCS.W <label>] 10908: //BNHS.W <label> |A|012346|-|----*|-----| |0110_010_100_000_000-{offset} [BCS.W <label>] 10909: //JBCS.W <label> |A|012346|-|----*|-----| |0110_010_100_000_000-{offset} [BCS.W <label>] 10910: //JBLO.W <label> |A|012346|-|----*|-----| |0110_010_100_000_000-{offset} [BCS.W <label>] 10911: //JBNCC.W <label> |A|012346|-|----*|-----| |0110_010_100_000_000-{offset} [BCS.W <label>] 10912: //JBNHS.W <label> |A|012346|-|----*|-----| |0110_010_100_000_000-{offset} [BCS.W <label>] 10913: //BCS.S <label> |-|012346|-|----*|-----| |0110_010_100_sss_sss (s is not equal to 0) 10914: //BLO.S <label> |A|012346|-|----*|-----| |0110_010_100_sss_sss (s is not equal to 0) [BCS.S <label>] 10915: //BNCC.S <label> |A|012346|-|----*|-----| |0110_010_100_sss_sss (s is not equal to 0) [BCS.S <label>] 10916: //BNHS.S <label> |A|012346|-|----*|-----| |0110_010_100_sss_sss (s is not equal to 0) [BCS.S <label>] 10917: //JBCS.S <label> |A|012346|-|----*|-----| |0110_010_100_sss_sss (s is not equal to 0) [BCS.S <label>] 10918: //JBLO.S <label> |A|012346|-|----*|-----| |0110_010_100_sss_sss (s is not equal to 0) [BCS.S <label>] 10919: //JBNCC.S <label> |A|012346|-|----*|-----| |0110_010_100_sss_sss (s is not equal to 0) [BCS.S <label>] 10920: //JBNHS.S <label> |A|012346|-|----*|-----| |0110_010_100_sss_sss (s is not equal to 0) [BCS.S <label>] 10921: //JBCC.L <label> |A|012346|-|----*|-----| |0110_010_100_000_110-0100111011111001-{address} [BCS.S (*)+8;JMP <label>] 10922: //JBHS.L <label> |A|012346|-|----*|-----| |0110_010_100_000_110-0100111011111001-{address} [BCS.S (*)+8;JMP <label>] 10923: //JBNCS.L <label> |A|012346|-|----*|-----| |0110_010_100_000_110-0100111011111001-{address} [BCS.S (*)+8;JMP <label>] 10924: //JBNLO.L <label> |A|012346|-|----*|-----| |0110_010_100_000_110-0100111011111001-{address} [BCS.S (*)+8;JMP <label>] 10925: public static void irpBlosw () throws M68kException { 10926: XEiJ.mpuCycleCount++; 10927: int t = XEiJ.regPC; //pc0+2 10928: int s = (byte) XEiJ.regOC; //8bitディスプレースメント 10929: if (s == 0) { //Bcc.W 10930: XEiJ.regPC = t + 2; //pc0+4 10931: s = mmuReadWordSignExword (t, XEiJ.regSRS); //16bitディスプレースメント 10932: } 10933: t += s; //pc0+2+ディスプレースメント 10934: if ((t & 1) != 0) { //分岐先のアドレスが奇数 10935: //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ 10936: irpBccAddressError (t); 10937: } 10938: if (XEiJ.MPU_CC_LO << XEiJ.regCCR < 0) { //分岐する 10939: irpSetPC (t); 10940: } 10941: } //irpBlosw 10942: 10943: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10944: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 10945: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 10946: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10947: //BCS.S <label> |-|012346|-|----*|-----| |0110_010_101_sss_sss 10948: //BLO.S <label> |A|012346|-|----*|-----| |0110_010_101_sss_sss [BCS.S <label>] 10949: //BNCC.S <label> |A|012346|-|----*|-----| |0110_010_101_sss_sss [BCS.S <label>] 10950: //BNHS.S <label> |A|012346|-|----*|-----| |0110_010_101_sss_sss [BCS.S <label>] 10951: //JBCS.S <label> |A|012346|-|----*|-----| |0110_010_101_sss_sss [BCS.S <label>] 10952: //JBLO.S <label> |A|012346|-|----*|-----| |0110_010_101_sss_sss [BCS.S <label>] 10953: //JBNCC.S <label> |A|012346|-|----*|-----| |0110_010_101_sss_sss [BCS.S <label>] 10954: //JBNHS.S <label> |A|012346|-|----*|-----| |0110_010_101_sss_sss [BCS.S <label>] 10955: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10956: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 10957: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 10958: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10959: //BCS.S <label> |-|012346|-|----*|-----| |0110_010_110_sss_sss 10960: //BLO.S <label> |A|012346|-|----*|-----| |0110_010_110_sss_sss [BCS.S <label>] 10961: //BNCC.S <label> |A|012346|-|----*|-----| |0110_010_110_sss_sss [BCS.S <label>] 10962: //BNHS.S <label> |A|012346|-|----*|-----| |0110_010_110_sss_sss [BCS.S <label>] 10963: //JBCS.S <label> |A|012346|-|----*|-----| |0110_010_110_sss_sss [BCS.S <label>] 10964: //JBLO.S <label> |A|012346|-|----*|-----| |0110_010_110_sss_sss [BCS.S <label>] 10965: //JBNCC.S <label> |A|012346|-|----*|-----| |0110_010_110_sss_sss [BCS.S <label>] 10966: //JBNHS.S <label> |A|012346|-|----*|-----| |0110_010_110_sss_sss [BCS.S <label>] 10967: public static void irpBlos () throws M68kException { 10968: XEiJ.mpuCycleCount++; 10969: int t = XEiJ.regPC; //pc0+2 10970: int s = (byte) XEiJ.regOC; //8bitディスプレースメント 10971: t += s; //pc0+2+ディスプレースメント 10972: if ((t & 1) != 0) { //分岐先のアドレスが奇数 10973: //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ 10974: irpBccAddressError (t); 10975: } 10976: if (XEiJ.MPU_CC_LO << XEiJ.regCCR < 0) { //分岐する 10977: irpSetPC (t); 10978: } 10979: } //irpBlos 10980: 10981: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10982: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 10983: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 10984: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10985: //BCS.S <label> |-|--2346|-|----*|-----| |0110_010_111_sss_sss (s is not equal to 63) 10986: //BLO.S <label> |A|--2346|-|----*|-----| |0110_010_111_sss_sss (s is not equal to 63) [BCS.S <label>] 10987: //BNCC.S <label> |A|--2346|-|----*|-----| |0110_010_111_sss_sss (s is not equal to 63) [BCS.S <label>] 10988: //BNHS.S <label> |A|--2346|-|----*|-----| |0110_010_111_sss_sss (s is not equal to 63) [BCS.S <label>] 10989: //JBCS.S <label> |A|--2346|-|----*|-----| |0110_010_111_sss_sss (s is not equal to 63) [BCS.S <label>] 10990: //JBLO.S <label> |A|--2346|-|----*|-----| |0110_010_111_sss_sss (s is not equal to 63) [BCS.S <label>] 10991: //JBNCC.S <label> |A|--2346|-|----*|-----| |0110_010_111_sss_sss (s is not equal to 63) [BCS.S <label>] 10992: //JBNHS.S <label> |A|--2346|-|----*|-----| |0110_010_111_sss_sss (s is not equal to 63) [BCS.S <label>] 10993: //BCS.L <label> |-|--2346|-|----*|-----| |0110_010_111_111_111-{offset} 10994: //BLO.L <label> |A|--2346|-|----*|-----| |0110_010_111_111_111-{offset} [BCS.L <label>] 10995: //BNCC.L <label> |A|--2346|-|----*|-----| |0110_010_111_111_111-{offset} [BCS.L <label>] 10996: //BNHS.L <label> |A|--2346|-|----*|-----| |0110_010_111_111_111-{offset} [BCS.L <label>] 10997: public static void irpBlosl () throws M68kException { 10998: XEiJ.mpuCycleCount++; 10999: int t = XEiJ.regPC; //pc0+2 11000: int s = (byte) XEiJ.regOC; //8bitディスプレースメント 11001: if (s == -1) { //Bcc.L 11002: XEiJ.regPC = t + 4; //pc0+6 11003: s = mmuReadLongExword (t, XEiJ.regSRS); //32bitディスプレースメント 11004: } 11005: t += s; //pc0+2+ディスプレースメント 11006: if ((t & 1) != 0) { //分岐先のアドレスが奇数 11007: //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ 11008: irpBccAddressError (t); 11009: } 11010: if (XEiJ.MPU_CC_LO << XEiJ.regCCR < 0) { //分岐する 11011: irpSetPC (t); 11012: } 11013: } //irpBlosl 11014: 11015: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11016: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11017: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11018: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11019: //BNE.W <label> |-|012346|-|--*--|-----| |0110_011_000_000_000-{offset} 11020: //BNEQ.W <label> |A|012346|-|--*--|-----| |0110_011_000_000_000-{offset} [BNE.W <label>] 11021: //BNZ.W <label> |A|012346|-|--*--|-----| |0110_011_000_000_000-{offset} [BNE.W <label>] 11022: //BNZE.W <label> |A|012346|-|--*--|-----| |0110_011_000_000_000-{offset} [BNE.W <label>] 11023: //JBNE.W <label> |A|012346|-|--*--|-----| |0110_011_000_000_000-{offset} [BNE.W <label>] 11024: //JBNEQ.W <label> |A|012346|-|--*--|-----| |0110_011_000_000_000-{offset} [BNE.W <label>] 11025: //JBNZ.W <label> |A|012346|-|--*--|-----| |0110_011_000_000_000-{offset} [BNE.W <label>] 11026: //JBNZE.W <label> |A|012346|-|--*--|-----| |0110_011_000_000_000-{offset} [BNE.W <label>] 11027: //BNE.S <label> |-|012346|-|--*--|-----| |0110_011_000_sss_sss (s is not equal to 0) 11028: //BNEQ.S <label> |A|012346|-|--*--|-----| |0110_011_000_sss_sss (s is not equal to 0) [BNE.S <label>] 11029: //BNZ.S <label> |A|012346|-|--*--|-----| |0110_011_000_sss_sss (s is not equal to 0) [BNE.S <label>] 11030: //BNZE.S <label> |A|012346|-|--*--|-----| |0110_011_000_sss_sss (s is not equal to 0) [BNE.S <label>] 11031: //JBNE.S <label> |A|012346|-|--*--|-----| |0110_011_000_sss_sss (s is not equal to 0) [BNE.S <label>] 11032: //JBNEQ.S <label> |A|012346|-|--*--|-----| |0110_011_000_sss_sss (s is not equal to 0) [BNE.S <label>] 11033: //JBNZ.S <label> |A|012346|-|--*--|-----| |0110_011_000_sss_sss (s is not equal to 0) [BNE.S <label>] 11034: //JBNZE.S <label> |A|012346|-|--*--|-----| |0110_011_000_sss_sss (s is not equal to 0) [BNE.S <label>] 11035: //JBEQ.L <label> |A|012346|-|--*--|-----| |0110_011_000_000_110-0100111011111001-{address} [BNE.S (*)+8;JMP <label>] 11036: //JBNEQ.L <label> |A|012346|-|--*--|-----| |0110_011_000_000_110-0100111011111001-{address} [BNE.S (*)+8;JMP <label>] 11037: //JBNNE.L <label> |A|012346|-|--*--|-----| |0110_011_000_000_110-0100111011111001-{address} [BNE.S (*)+8;JMP <label>] 11038: //JBNNZ.L <label> |A|012346|-|--*--|-----| |0110_011_000_000_110-0100111011111001-{address} [BNE.S (*)+8;JMP <label>] 11039: //JBNZ.L <label> |A|012346|-|--*--|-----| |0110_011_000_000_110-0100111011111001-{address} [BNE.S (*)+8;JMP <label>] 11040: //JBNZE.L <label> |A|012346|-|--*--|-----| |0110_011_000_000_110-0100111011111001-{address} [BNE.S (*)+8;JMP <label>] 11041: //JBZE.L <label> |A|012346|-|--*--|-----| |0110_011_000_000_110-0100111011111001-{address} [BNE.S (*)+8;JMP <label>] 11042: public static void irpBnesw () throws M68kException { 11043: XEiJ.mpuCycleCount++; 11044: int t = XEiJ.regPC; //pc0+2 11045: int s = (byte) XEiJ.regOC; //8bitディスプレースメント 11046: if (s == 0) { //Bcc.W 11047: XEiJ.regPC = t + 2; //pc0+4 11048: s = mmuReadWordSignExword (t, XEiJ.regSRS); //16bitディスプレースメント 11049: } 11050: t += s; //pc0+2+ディスプレースメント 11051: if ((t & 1) != 0) { //分岐先のアドレスが奇数 11052: //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ 11053: irpBccAddressError (t); 11054: } 11055: if (XEiJ.MPU_CC_NE << XEiJ.regCCR < 0) { //分岐する 11056: irpSetPC (t); 11057: } 11058: } //irpBnesw 11059: 11060: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11061: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11062: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11063: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11064: //BNE.S <label> |-|012346|-|--*--|-----| |0110_011_001_sss_sss 11065: //BNEQ.S <label> |A|012346|-|--*--|-----| |0110_011_001_sss_sss [BNE.S <label>] 11066: //BNZ.S <label> |A|012346|-|--*--|-----| |0110_011_001_sss_sss [BNE.S <label>] 11067: //BNZE.S <label> |A|012346|-|--*--|-----| |0110_011_001_sss_sss [BNE.S <label>] 11068: //JBNE.S <label> |A|012346|-|--*--|-----| |0110_011_001_sss_sss [BNE.S <label>] 11069: //JBNEQ.S <label> |A|012346|-|--*--|-----| |0110_011_001_sss_sss [BNE.S <label>] 11070: //JBNZ.S <label> |A|012346|-|--*--|-----| |0110_011_001_sss_sss [BNE.S <label>] 11071: //JBNZE.S <label> |A|012346|-|--*--|-----| |0110_011_001_sss_sss [BNE.S <label>] 11072: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11073: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11074: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11075: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11076: //BNE.S <label> |-|012346|-|--*--|-----| |0110_011_010_sss_sss 11077: //BNEQ.S <label> |A|012346|-|--*--|-----| |0110_011_010_sss_sss [BNE.S <label>] 11078: //BNZ.S <label> |A|012346|-|--*--|-----| |0110_011_010_sss_sss [BNE.S <label>] 11079: //BNZE.S <label> |A|012346|-|--*--|-----| |0110_011_010_sss_sss [BNE.S <label>] 11080: //JBNE.S <label> |A|012346|-|--*--|-----| |0110_011_010_sss_sss [BNE.S <label>] 11081: //JBNEQ.S <label> |A|012346|-|--*--|-----| |0110_011_010_sss_sss [BNE.S <label>] 11082: //JBNZ.S <label> |A|012346|-|--*--|-----| |0110_011_010_sss_sss [BNE.S <label>] 11083: //JBNZE.S <label> |A|012346|-|--*--|-----| |0110_011_010_sss_sss [BNE.S <label>] 11084: public static void irpBnes () throws M68kException { 11085: XEiJ.mpuCycleCount++; 11086: int t = XEiJ.regPC; //pc0+2 11087: int s = (byte) XEiJ.regOC; //8bitディスプレースメント 11088: t += s; //pc0+2+ディスプレースメント 11089: if ((t & 1) != 0) { //分岐先のアドレスが奇数 11090: //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ 11091: irpBccAddressError (t); 11092: } 11093: if (XEiJ.MPU_CC_NE << XEiJ.regCCR < 0) { //分岐する 11094: irpSetPC (t); 11095: } 11096: } //irpBnes 11097: 11098: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11099: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11100: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11101: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11102: //BNE.S <label> |-|--2346|-|--*--|-----| |0110_011_011_sss_sss (s is not equal to 63) 11103: //BNEQ.S <label> |A|--2346|-|--*--|-----| |0110_011_011_sss_sss (s is not equal to 63) [BNE.S <label>] 11104: //BNZ.S <label> |A|--2346|-|--*--|-----| |0110_011_011_sss_sss (s is not equal to 63) [BNE.S <label>] 11105: //BNZE.S <label> |A|--2346|-|--*--|-----| |0110_011_011_sss_sss (s is not equal to 63) [BNE.S <label>] 11106: //JBNE.S <label> |A|--2346|-|--*--|-----| |0110_011_011_sss_sss (s is not equal to 63) [BNE.S <label>] 11107: //JBNEQ.S <label> |A|--2346|-|--*--|-----| |0110_011_011_sss_sss (s is not equal to 63) [BNE.S <label>] 11108: //JBNZ.S <label> |A|--2346|-|--*--|-----| |0110_011_011_sss_sss (s is not equal to 63) [BNE.S <label>] 11109: //JBNZE.S <label> |A|--2346|-|--*--|-----| |0110_011_011_sss_sss (s is not equal to 63) [BNE.S <label>] 11110: //BNE.L <label> |-|--2346|-|--*--|-----| |0110_011_011_111_111-{offset} 11111: //BNEQ.L <label> |A|--2346|-|--*--|-----| |0110_011_011_111_111-{offset} [BNE.L <label>] 11112: //BNZ.L <label> |A|--2346|-|--*--|-----| |0110_011_011_111_111-{offset} [BNE.L <label>] 11113: //BNZE.L <label> |A|--2346|-|--*--|-----| |0110_011_011_111_111-{offset} [BNE.L <label>] 11114: public static void irpBnesl () throws M68kException { 11115: XEiJ.mpuCycleCount++; 11116: int t = XEiJ.regPC; //pc0+2 11117: int s = (byte) XEiJ.regOC; //8bitディスプレースメント 11118: if (s == -1) { //Bcc.L 11119: XEiJ.regPC = t + 4; //pc0+6 11120: s = mmuReadLongExword (t, XEiJ.regSRS); //32bitディスプレースメント 11121: } 11122: t += s; //pc0+2+ディスプレースメント 11123: if ((t & 1) != 0) { //分岐先のアドレスが奇数 11124: //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ 11125: irpBccAddressError (t); 11126: } 11127: if (XEiJ.MPU_CC_NE << XEiJ.regCCR < 0) { //分岐する 11128: irpSetPC (t); 11129: } 11130: } //irpBnesl 11131: 11132: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11133: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11134: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11135: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11136: //BEQ.W <label> |-|012346|-|--*--|-----| |0110_011_100_000_000-{offset} 11137: //BNNE.W <label> |A|012346|-|--*--|-----| |0110_011_100_000_000-{offset} [BEQ.W <label>] 11138: //BNNZ.W <label> |A|012346|-|--*--|-----| |0110_011_100_000_000-{offset} [BEQ.W <label>] 11139: //BZE.W <label> |A|012346|-|--*--|-----| |0110_011_100_000_000-{offset} [BEQ.W <label>] 11140: //JBEQ.W <label> |A|012346|-|--*--|-----| |0110_011_100_000_000-{offset} [BEQ.W <label>] 11141: //JBNNE.W <label> |A|012346|-|--*--|-----| |0110_011_100_000_000-{offset} [BEQ.W <label>] 11142: //JBNNZ.W <label> |A|012346|-|--*--|-----| |0110_011_100_000_000-{offset} [BEQ.W <label>] 11143: //JBZE.W <label> |A|012346|-|--*--|-----| |0110_011_100_000_000-{offset} [BEQ.W <label>] 11144: //BEQ.S <label> |-|012346|-|--*--|-----| |0110_011_100_sss_sss (s is not equal to 0) 11145: //BNNE.S <label> |A|012346|-|--*--|-----| |0110_011_100_sss_sss (s is not equal to 0) [BEQ.S <label>] 11146: //BNNZ.S <label> |A|012346|-|--*--|-----| |0110_011_100_sss_sss (s is not equal to 0) [BEQ.S <label>] 11147: //BZE.S <label> |A|012346|-|--*--|-----| |0110_011_100_sss_sss (s is not equal to 0) [BEQ.S <label>] 11148: //JBEQ.S <label> |A|012346|-|--*--|-----| |0110_011_100_sss_sss (s is not equal to 0) [BEQ.S <label>] 11149: //JBNNE.S <label> |A|012346|-|--*--|-----| |0110_011_100_sss_sss (s is not equal to 0) [BEQ.S <label>] 11150: //JBNNZ.S <label> |A|012346|-|--*--|-----| |0110_011_100_sss_sss (s is not equal to 0) [BEQ.S <label>] 11151: //JBZE.S <label> |A|012346|-|--*--|-----| |0110_011_100_sss_sss (s is not equal to 0) [BEQ.S <label>] 11152: //JBNE.L <label> |A|012346|-|--*--|-----| |0110_011_100_000_110-0100111011111001-{address} [BEQ.S (*)+8;JMP <label>] 11153: public static void irpBeqsw () throws M68kException { 11154: XEiJ.mpuCycleCount++; 11155: int t = XEiJ.regPC; //pc0+2 11156: int s = (byte) XEiJ.regOC; //8bitディスプレースメント 11157: if (s == 0) { //Bcc.W 11158: XEiJ.regPC = t + 2; //pc0+4 11159: s = mmuReadWordSignExword (t, XEiJ.regSRS); //16bitディスプレースメント 11160: } 11161: t += s; //pc0+2+ディスプレースメント 11162: if ((t & 1) != 0) { //分岐先のアドレスが奇数 11163: //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ 11164: irpBccAddressError (t); 11165: } 11166: if (XEiJ.MPU_CC_EQ << XEiJ.regCCR < 0) { //分岐する 11167: irpSetPC (t); 11168: } 11169: } //irpBeqsw 11170: 11171: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11172: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11173: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11174: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11175: //BEQ.S <label> |-|012346|-|--*--|-----| |0110_011_101_sss_sss 11176: //BNNE.S <label> |A|012346|-|--*--|-----| |0110_011_101_sss_sss [BEQ.S <label>] 11177: //BNNZ.S <label> |A|012346|-|--*--|-----| |0110_011_101_sss_sss [BEQ.S <label>] 11178: //BZE.S <label> |A|012346|-|--*--|-----| |0110_011_101_sss_sss [BEQ.S <label>] 11179: //JBEQ.S <label> |A|012346|-|--*--|-----| |0110_011_101_sss_sss [BEQ.S <label>] 11180: //JBNNE.S <label> |A|012346|-|--*--|-----| |0110_011_101_sss_sss [BEQ.S <label>] 11181: //JBNNZ.S <label> |A|012346|-|--*--|-----| |0110_011_101_sss_sss [BEQ.S <label>] 11182: //JBZE.S <label> |A|012346|-|--*--|-----| |0110_011_101_sss_sss [BEQ.S <label>] 11183: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11184: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11185: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11186: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11187: //BEQ.S <label> |-|012346|-|--*--|-----| |0110_011_110_sss_sss 11188: //BNNE.S <label> |A|012346|-|--*--|-----| |0110_011_110_sss_sss [BEQ.S <label>] 11189: //BNNZ.S <label> |A|012346|-|--*--|-----| |0110_011_110_sss_sss [BEQ.S <label>] 11190: //BZE.S <label> |A|012346|-|--*--|-----| |0110_011_110_sss_sss [BEQ.S <label>] 11191: //JBEQ.S <label> |A|012346|-|--*--|-----| |0110_011_110_sss_sss [BEQ.S <label>] 11192: //JBNNE.S <label> |A|012346|-|--*--|-----| |0110_011_110_sss_sss [BEQ.S <label>] 11193: //JBNNZ.S <label> |A|012346|-|--*--|-----| |0110_011_110_sss_sss [BEQ.S <label>] 11194: //JBZE.S <label> |A|012346|-|--*--|-----| |0110_011_110_sss_sss [BEQ.S <label>] 11195: public static void irpBeqs () throws M68kException { 11196: XEiJ.mpuCycleCount++; 11197: int t = XEiJ.regPC; //pc0+2 11198: int s = (byte) XEiJ.regOC; //8bitディスプレースメント 11199: t += s; //pc0+2+ディスプレースメント 11200: if ((t & 1) != 0) { //分岐先のアドレスが奇数 11201: //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ 11202: irpBccAddressError (t); 11203: } 11204: if (XEiJ.MPU_CC_EQ << XEiJ.regCCR < 0) { //分岐する 11205: irpSetPC (t); 11206: } 11207: } //irpBeqs 11208: 11209: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11210: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11211: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11212: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11213: //BEQ.S <label> |-|--2346|-|--*--|-----| |0110_011_111_sss_sss (s is not equal to 63) 11214: //BNNE.S <label> |A|--2346|-|--*--|-----| |0110_011_111_sss_sss (s is not equal to 63) [BEQ.S <label>] 11215: //BNNZ.S <label> |A|--2346|-|--*--|-----| |0110_011_111_sss_sss (s is not equal to 63) [BEQ.S <label>] 11216: //BZE.S <label> |A|--2346|-|--*--|-----| |0110_011_111_sss_sss (s is not equal to 63) [BEQ.S <label>] 11217: //JBEQ.S <label> |A|--2346|-|--*--|-----| |0110_011_111_sss_sss (s is not equal to 63) [BEQ.S <label>] 11218: //JBNNE.S <label> |A|--2346|-|--*--|-----| |0110_011_111_sss_sss (s is not equal to 63) [BEQ.S <label>] 11219: //JBNNZ.S <label> |A|--2346|-|--*--|-----| |0110_011_111_sss_sss (s is not equal to 63) [BEQ.S <label>] 11220: //JBZE.S <label> |A|--2346|-|--*--|-----| |0110_011_111_sss_sss (s is not equal to 63) [BEQ.S <label>] 11221: //BEQ.L <label> |-|--2346|-|--*--|-----| |0110_011_111_111_111-{offset} 11222: //BNNE.L <label> |A|--2346|-|--*--|-----| |0110_011_111_111_111-{offset} [BEQ.L <label>] 11223: //BNNZ.L <label> |A|--2346|-|--*--|-----| |0110_011_111_111_111-{offset} [BEQ.L <label>] 11224: //BZE.L <label> |A|--2346|-|--*--|-----| |0110_011_111_111_111-{offset} [BEQ.L <label>] 11225: public static void irpBeqsl () throws M68kException { 11226: XEiJ.mpuCycleCount++; 11227: int t = XEiJ.regPC; //pc0+2 11228: int s = (byte) XEiJ.regOC; //8bitディスプレースメント 11229: if (s == -1) { //Bcc.L 11230: XEiJ.regPC = t + 4; //pc0+6 11231: s = mmuReadLongExword (t, XEiJ.regSRS); //32bitディスプレースメント 11232: } 11233: t += s; //pc0+2+ディスプレースメント 11234: if ((t & 1) != 0) { //分岐先のアドレスが奇数 11235: //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ 11236: irpBccAddressError (t); 11237: } 11238: if (XEiJ.MPU_CC_EQ << XEiJ.regCCR < 0) { //分岐する 11239: irpSetPC (t); 11240: } 11241: } //irpBeqsl 11242: 11243: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11244: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11245: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11246: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11247: //BVC.W <label> |-|012346|-|---*-|-----| |0110_100_000_000_000-{offset} 11248: //BNVS.W <label> |A|012346|-|---*-|-----| |0110_100_000_000_000-{offset} [BVC.W <label>] 11249: //JBNVS.W <label> |A|012346|-|---*-|-----| |0110_100_000_000_000-{offset} [BVC.W <label>] 11250: //JBVC.W <label> |A|012346|-|---*-|-----| |0110_100_000_000_000-{offset} [BVC.W <label>] 11251: //BVC.S <label> |-|012346|-|---*-|-----| |0110_100_000_sss_sss (s is not equal to 0) 11252: //BNVS.S <label> |A|012346|-|---*-|-----| |0110_100_000_sss_sss (s is not equal to 0) [BVC.S <label>] 11253: //JBNVS.S <label> |A|012346|-|---*-|-----| |0110_100_000_sss_sss (s is not equal to 0) [BVC.S <label>] 11254: //JBVC.S <label> |A|012346|-|---*-|-----| |0110_100_000_sss_sss (s is not equal to 0) [BVC.S <label>] 11255: //JBNVC.L <label> |A|012346|-|---*-|-----| |0110_100_000_000_110-0100111011111001-{address} [BVC.S (*)+8;JMP <label>] 11256: //JBVS.L <label> |A|012346|-|---*-|-----| |0110_100_000_000_110-0100111011111001-{address} [BVC.S (*)+8;JMP <label>] 11257: public static void irpBvcsw () throws M68kException { 11258: XEiJ.mpuCycleCount++; 11259: int t = XEiJ.regPC; //pc0+2 11260: int s = (byte) XEiJ.regOC; //8bitディスプレースメント 11261: if (s == 0) { //Bcc.W 11262: XEiJ.regPC = t + 2; //pc0+4 11263: s = mmuReadWordSignExword (t, XEiJ.regSRS); //16bitディスプレースメント 11264: } 11265: t += s; //pc0+2+ディスプレースメント 11266: if ((t & 1) != 0) { //分岐先のアドレスが奇数 11267: //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ 11268: irpBccAddressError (t); 11269: } 11270: if (XEiJ.MPU_CC_VC << XEiJ.regCCR < 0) { //分岐する 11271: irpSetPC (t); 11272: } 11273: } //irpBvcsw 11274: 11275: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11276: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11277: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11278: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11279: //BVC.S <label> |-|012346|-|---*-|-----| |0110_100_001_sss_sss 11280: //BNVS.S <label> |A|012346|-|---*-|-----| |0110_100_001_sss_sss [BVC.S <label>] 11281: //JBNVS.S <label> |A|012346|-|---*-|-----| |0110_100_001_sss_sss [BVC.S <label>] 11282: //JBVC.S <label> |A|012346|-|---*-|-----| |0110_100_001_sss_sss [BVC.S <label>] 11283: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11284: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11285: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11286: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11287: //BVC.S <label> |-|012346|-|---*-|-----| |0110_100_010_sss_sss 11288: //BNVS.S <label> |A|012346|-|---*-|-----| |0110_100_010_sss_sss [BVC.S <label>] 11289: //JBNVS.S <label> |A|012346|-|---*-|-----| |0110_100_010_sss_sss [BVC.S <label>] 11290: //JBVC.S <label> |A|012346|-|---*-|-----| |0110_100_010_sss_sss [BVC.S <label>] 11291: public static void irpBvcs () throws M68kException { 11292: XEiJ.mpuCycleCount++; 11293: int t = XEiJ.regPC; //pc0+2 11294: int s = (byte) XEiJ.regOC; //8bitディスプレースメント 11295: t += s; //pc0+2+ディスプレースメント 11296: if ((t & 1) != 0) { //分岐先のアドレスが奇数 11297: //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ 11298: irpBccAddressError (t); 11299: } 11300: if (XEiJ.MPU_CC_VC << XEiJ.regCCR < 0) { //分岐する 11301: irpSetPC (t); 11302: } 11303: } //irpBvcs 11304: 11305: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11306: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11307: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11308: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11309: //BVC.S <label> |-|--2346|-|---*-|-----| |0110_100_011_sss_sss (s is not equal to 63) 11310: //BNVS.S <label> |A|--2346|-|---*-|-----| |0110_100_011_sss_sss (s is not equal to 63) [BVC.S <label>] 11311: //JBNVS.S <label> |A|--2346|-|---*-|-----| |0110_100_011_sss_sss (s is not equal to 63) [BVC.S <label>] 11312: //JBVC.S <label> |A|--2346|-|---*-|-----| |0110_100_011_sss_sss (s is not equal to 63) [BVC.S <label>] 11313: //BVC.L <label> |-|--2346|-|---*-|-----| |0110_100_011_111_111-{offset} 11314: //BNVS.L <label> |A|--2346|-|---*-|-----| |0110_100_011_111_111-{offset} [BVC.L <label>] 11315: public static void irpBvcsl () throws M68kException { 11316: XEiJ.mpuCycleCount++; 11317: int t = XEiJ.regPC; //pc0+2 11318: int s = (byte) XEiJ.regOC; //8bitディスプレースメント 11319: if (s == -1) { //Bcc.L 11320: XEiJ.regPC = t + 4; //pc0+6 11321: s = mmuReadLongExword (t, XEiJ.regSRS); //32bitディスプレースメント 11322: } 11323: t += s; //pc0+2+ディスプレースメント 11324: if ((t & 1) != 0) { //分岐先のアドレスが奇数 11325: //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ 11326: irpBccAddressError (t); 11327: } 11328: if (XEiJ.MPU_CC_VC << XEiJ.regCCR < 0) { //分岐する 11329: irpSetPC (t); 11330: } 11331: } //irpBvcsl 11332: 11333: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11334: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11335: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11336: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11337: //BVS.W <label> |-|012346|-|---*-|-----| |0110_100_100_000_000-{offset} 11338: //BNVC.W <label> |A|012346|-|---*-|-----| |0110_100_100_000_000-{offset} [BVS.W <label>] 11339: //JBNVC.W <label> |A|012346|-|---*-|-----| |0110_100_100_000_000-{offset} [BVS.W <label>] 11340: //JBVS.W <label> |A|012346|-|---*-|-----| |0110_100_100_000_000-{offset} [BVS.W <label>] 11341: //BVS.S <label> |-|012346|-|---*-|-----| |0110_100_100_sss_sss (s is not equal to 0) 11342: //BNVC.S <label> |A|012346|-|---*-|-----| |0110_100_100_sss_sss (s is not equal to 0) [BVS.S <label>] 11343: //JBNVC.S <label> |A|012346|-|---*-|-----| |0110_100_100_sss_sss (s is not equal to 0) [BVS.S <label>] 11344: //JBVS.S <label> |A|012346|-|---*-|-----| |0110_100_100_sss_sss (s is not equal to 0) [BVS.S <label>] 11345: //JBNVS.L <label> |A|012346|-|---*-|-----| |0110_100_100_000_110-0100111011111001-{address} [BVS.S (*)+8;JMP <label>] 11346: //JBVC.L <label> |A|012346|-|---*-|-----| |0110_100_100_000_110-0100111011111001-{address} [BVS.S (*)+8;JMP <label>] 11347: public static void irpBvssw () throws M68kException { 11348: XEiJ.mpuCycleCount++; 11349: int t = XEiJ.regPC; //pc0+2 11350: int s = (byte) XEiJ.regOC; //8bitディスプレースメント 11351: if (s == 0) { //Bcc.W 11352: XEiJ.regPC = t + 2; //pc0+4 11353: s = mmuReadWordSignExword (t, XEiJ.regSRS); //16bitディスプレースメント 11354: } 11355: t += s; //pc0+2+ディスプレースメント 11356: if ((t & 1) != 0) { //分岐先のアドレスが奇数 11357: //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ 11358: irpBccAddressError (t); 11359: } 11360: if (XEiJ.MPU_CC_VS << XEiJ.regCCR < 0) { //分岐する 11361: irpSetPC (t); 11362: } 11363: } //irpBvssw 11364: 11365: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11366: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11367: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11368: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11369: //BVS.S <label> |-|012346|-|---*-|-----| |0110_100_101_sss_sss 11370: //BNVC.S <label> |A|012346|-|---*-|-----| |0110_100_101_sss_sss [BVS.S <label>] 11371: //JBNVC.S <label> |A|012346|-|---*-|-----| |0110_100_101_sss_sss [BVS.S <label>] 11372: //JBVS.S <label> |A|012346|-|---*-|-----| |0110_100_101_sss_sss [BVS.S <label>] 11373: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11374: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11375: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11376: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11377: //BVS.S <label> |-|012346|-|---*-|-----| |0110_100_110_sss_sss 11378: //BNVC.S <label> |A|012346|-|---*-|-----| |0110_100_110_sss_sss [BVS.S <label>] 11379: //JBNVC.S <label> |A|012346|-|---*-|-----| |0110_100_110_sss_sss [BVS.S <label>] 11380: //JBVS.S <label> |A|012346|-|---*-|-----| |0110_100_110_sss_sss [BVS.S <label>] 11381: public static void irpBvss () throws M68kException { 11382: XEiJ.mpuCycleCount++; 11383: int t = XEiJ.regPC; //pc0+2 11384: int s = (byte) XEiJ.regOC; //8bitディスプレースメント 11385: t += s; //pc0+2+ディスプレースメント 11386: if ((t & 1) != 0) { //分岐先のアドレスが奇数 11387: //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ 11388: irpBccAddressError (t); 11389: } 11390: if (XEiJ.MPU_CC_VS << XEiJ.regCCR < 0) { //分岐する 11391: irpSetPC (t); 11392: } 11393: } //irpBvss 11394: 11395: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11396: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11397: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11398: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11399: //BVS.S <label> |-|--2346|-|---*-|-----| |0110_100_111_sss_sss (s is not equal to 63) 11400: //BNVC.S <label> |A|--2346|-|---*-|-----| |0110_100_111_sss_sss (s is not equal to 63) [BVS.S <label>] 11401: //JBNVC.S <label> |A|--2346|-|---*-|-----| |0110_100_111_sss_sss (s is not equal to 63) [BVS.S <label>] 11402: //JBVS.S <label> |A|--2346|-|---*-|-----| |0110_100_111_sss_sss (s is not equal to 63) [BVS.S <label>] 11403: //BVS.L <label> |-|--2346|-|---*-|-----| |0110_100_111_111_111-{offset} 11404: //BNVC.L <label> |A|--2346|-|---*-|-----| |0110_100_111_111_111-{offset} [BVS.L <label>] 11405: public static void irpBvssl () throws M68kException { 11406: XEiJ.mpuCycleCount++; 11407: int t = XEiJ.regPC; //pc0+2 11408: int s = (byte) XEiJ.regOC; //8bitディスプレースメント 11409: if (s == -1) { //Bcc.L 11410: XEiJ.regPC = t + 4; //pc0+6 11411: s = mmuReadLongExword (t, XEiJ.regSRS); //32bitディスプレースメント 11412: } 11413: t += s; //pc0+2+ディスプレースメント 11414: if ((t & 1) != 0) { //分岐先のアドレスが奇数 11415: //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ 11416: irpBccAddressError (t); 11417: } 11418: if (XEiJ.MPU_CC_VS << XEiJ.regCCR < 0) { //分岐する 11419: irpSetPC (t); 11420: } 11421: } //irpBvssl 11422: 11423: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11424: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11425: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11426: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11427: //BPL.W <label> |-|012346|-|-*---|-----| |0110_101_000_000_000-{offset} 11428: //BNMI.W <label> |A|012346|-|-*---|-----| |0110_101_000_000_000-{offset} [BPL.W <label>] 11429: //JBNMI.W <label> |A|012346|-|-*---|-----| |0110_101_000_000_000-{offset} [BPL.W <label>] 11430: //JBPL.W <label> |A|012346|-|-*---|-----| |0110_101_000_000_000-{offset} [BPL.W <label>] 11431: //BPL.S <label> |-|012346|-|-*---|-----| |0110_101_000_sss_sss (s is not equal to 0) 11432: //BNMI.S <label> |A|012346|-|-*---|-----| |0110_101_000_sss_sss (s is not equal to 0) [BPL.S <label>] 11433: //JBNMI.S <label> |A|012346|-|-*---|-----| |0110_101_000_sss_sss (s is not equal to 0) [BPL.S <label>] 11434: //JBPL.S <label> |A|012346|-|-*---|-----| |0110_101_000_sss_sss (s is not equal to 0) [BPL.S <label>] 11435: //JBMI.L <label> |A|012346|-|-*---|-----| |0110_101_000_000_110-0100111011111001-{address} [BPL.S (*)+8;JMP <label>] 11436: //JBNPL.L <label> |A|012346|-|-*---|-----| |0110_101_000_000_110-0100111011111001-{address} [BPL.S (*)+8;JMP <label>] 11437: public static void irpBplsw () throws M68kException { 11438: XEiJ.mpuCycleCount++; 11439: int t = XEiJ.regPC; //pc0+2 11440: int s = (byte) XEiJ.regOC; //8bitディスプレースメント 11441: if (s == 0) { //Bcc.W 11442: XEiJ.regPC = t + 2; //pc0+4 11443: s = mmuReadWordSignExword (t, XEiJ.regSRS); //16bitディスプレースメント 11444: } 11445: t += s; //pc0+2+ディスプレースメント 11446: if ((t & 1) != 0) { //分岐先のアドレスが奇数 11447: //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ 11448: irpBccAddressError (t); 11449: } 11450: if (XEiJ.MPU_CC_PL << XEiJ.regCCR < 0) { //分岐する 11451: irpSetPC (t); 11452: } 11453: } //irpBplsw 11454: 11455: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11456: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11457: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11458: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11459: //BPL.S <label> |-|012346|-|-*---|-----| |0110_101_001_sss_sss 11460: //BNMI.S <label> |A|012346|-|-*---|-----| |0110_101_001_sss_sss [BPL.S <label>] 11461: //JBNMI.S <label> |A|012346|-|-*---|-----| |0110_101_001_sss_sss [BPL.S <label>] 11462: //JBPL.S <label> |A|012346|-|-*---|-----| |0110_101_001_sss_sss [BPL.S <label>] 11463: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11464: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11465: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11466: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11467: //BPL.S <label> |-|012346|-|-*---|-----| |0110_101_010_sss_sss 11468: //BNMI.S <label> |A|012346|-|-*---|-----| |0110_101_010_sss_sss [BPL.S <label>] 11469: //JBNMI.S <label> |A|012346|-|-*---|-----| |0110_101_010_sss_sss [BPL.S <label>] 11470: //JBPL.S <label> |A|012346|-|-*---|-----| |0110_101_010_sss_sss [BPL.S <label>] 11471: public static void irpBpls () throws M68kException { 11472: XEiJ.mpuCycleCount++; 11473: int t = XEiJ.regPC; //pc0+2 11474: int s = (byte) XEiJ.regOC; //8bitディスプレースメント 11475: t += s; //pc0+2+ディスプレースメント 11476: if ((t & 1) != 0) { //分岐先のアドレスが奇数 11477: //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ 11478: irpBccAddressError (t); 11479: } 11480: if (XEiJ.MPU_CC_PL << XEiJ.regCCR < 0) { //分岐する 11481: irpSetPC (t); 11482: } 11483: } //irpBpls 11484: 11485: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11486: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11487: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11488: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11489: //BPL.S <label> |-|--2346|-|-*---|-----| |0110_101_011_sss_sss (s is not equal to 63) 11490: //BNMI.S <label> |A|--2346|-|-*---|-----| |0110_101_011_sss_sss (s is not equal to 63) [BPL.S <label>] 11491: //JBNMI.S <label> |A|--2346|-|-*---|-----| |0110_101_011_sss_sss (s is not equal to 63) [BPL.S <label>] 11492: //JBPL.S <label> |A|--2346|-|-*---|-----| |0110_101_011_sss_sss (s is not equal to 63) [BPL.S <label>] 11493: //BPL.L <label> |-|--2346|-|-*---|-----| |0110_101_011_111_111-{offset} 11494: //BNMI.L <label> |A|--2346|-|-*---|-----| |0110_101_011_111_111-{offset} [BPL.L <label>] 11495: public static void irpBplsl () throws M68kException { 11496: XEiJ.mpuCycleCount++; 11497: int t = XEiJ.regPC; //pc0+2 11498: int s = (byte) XEiJ.regOC; //8bitディスプレースメント 11499: if (s == -1) { //Bcc.L 11500: XEiJ.regPC = t + 4; //pc0+6 11501: s = mmuReadLongExword (t, XEiJ.regSRS); //32bitディスプレースメント 11502: } 11503: t += s; //pc0+2+ディスプレースメント 11504: if ((t & 1) != 0) { //分岐先のアドレスが奇数 11505: //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ 11506: irpBccAddressError (t); 11507: } 11508: if (XEiJ.MPU_CC_PL << XEiJ.regCCR < 0) { //分岐する 11509: irpSetPC (t); 11510: } 11511: } //irpBplsl 11512: 11513: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11514: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11515: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11516: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11517: //BMI.W <label> |-|012346|-|-*---|-----| |0110_101_100_000_000-{offset} 11518: //BNPL.W <label> |A|012346|-|-*---|-----| |0110_101_100_000_000-{offset} [BMI.W <label>] 11519: //JBMI.W <label> |A|012346|-|-*---|-----| |0110_101_100_000_000-{offset} [BMI.W <label>] 11520: //JBNPL.W <label> |A|012346|-|-*---|-----| |0110_101_100_000_000-{offset} [BMI.W <label>] 11521: //BMI.S <label> |-|012346|-|-*---|-----| |0110_101_100_sss_sss (s is not equal to 0) 11522: //BNPL.S <label> |A|012346|-|-*---|-----| |0110_101_100_sss_sss (s is not equal to 0) [BMI.S <label>] 11523: //JBMI.S <label> |A|012346|-|-*---|-----| |0110_101_100_sss_sss (s is not equal to 0) [BMI.S <label>] 11524: //JBNPL.S <label> |A|012346|-|-*---|-----| |0110_101_100_sss_sss (s is not equal to 0) [BMI.S <label>] 11525: //JBNMI.L <label> |A|012346|-|-*---|-----| |0110_101_100_000_110-0100111011111001-{address} [BMI.S (*)+8;JMP <label>] 11526: //JBPL.L <label> |A|012346|-|-*---|-----| |0110_101_100_000_110-0100111011111001-{address} [BMI.S (*)+8;JMP <label>] 11527: public static void irpBmisw () throws M68kException { 11528: XEiJ.mpuCycleCount++; 11529: int t = XEiJ.regPC; //pc0+2 11530: int s = (byte) XEiJ.regOC; //8bitディスプレースメント 11531: if (s == 0) { //Bcc.W 11532: XEiJ.regPC = t + 2; //pc0+4 11533: s = mmuReadWordSignExword (t, XEiJ.regSRS); //16bitディスプレースメント 11534: } 11535: t += s; //pc0+2+ディスプレースメント 11536: if ((t & 1) != 0) { //分岐先のアドレスが奇数 11537: //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ 11538: irpBccAddressError (t); 11539: } 11540: if (XEiJ.MPU_CC_MI << XEiJ.regCCR < 0) { //分岐する 11541: irpSetPC (t); 11542: } 11543: } //irpBmisw 11544: 11545: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11546: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11547: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11548: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11549: //BMI.S <label> |-|012346|-|-*---|-----| |0110_101_101_sss_sss 11550: //BNPL.S <label> |A|012346|-|-*---|-----| |0110_101_101_sss_sss [BMI.S <label>] 11551: //JBMI.S <label> |A|012346|-|-*---|-----| |0110_101_101_sss_sss [BMI.S <label>] 11552: //JBNPL.S <label> |A|012346|-|-*---|-----| |0110_101_101_sss_sss [BMI.S <label>] 11553: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11554: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11555: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11556: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11557: //BMI.S <label> |-|012346|-|-*---|-----| |0110_101_110_sss_sss 11558: //BNPL.S <label> |A|012346|-|-*---|-----| |0110_101_110_sss_sss [BMI.S <label>] 11559: //JBMI.S <label> |A|012346|-|-*---|-----| |0110_101_110_sss_sss [BMI.S <label>] 11560: //JBNPL.S <label> |A|012346|-|-*---|-----| |0110_101_110_sss_sss [BMI.S <label>] 11561: public static void irpBmis () throws M68kException { 11562: XEiJ.mpuCycleCount++; 11563: int t = XEiJ.regPC; //pc0+2 11564: int s = (byte) XEiJ.regOC; //8bitディスプレースメント 11565: t += s; //pc0+2+ディスプレースメント 11566: if ((t & 1) != 0) { //分岐先のアドレスが奇数 11567: //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ 11568: irpBccAddressError (t); 11569: } 11570: if (XEiJ.MPU_CC_MI << XEiJ.regCCR < 0) { //分岐する 11571: irpSetPC (t); 11572: } 11573: } //irpBmis 11574: 11575: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11576: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11577: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11578: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11579: //BMI.S <label> |-|--2346|-|-*---|-----| |0110_101_111_sss_sss (s is not equal to 63) 11580: //BNPL.S <label> |A|--2346|-|-*---|-----| |0110_101_111_sss_sss (s is not equal to 63) [BMI.S <label>] 11581: //JBMI.S <label> |A|--2346|-|-*---|-----| |0110_101_111_sss_sss (s is not equal to 63) [BMI.S <label>] 11582: //JBNPL.S <label> |A|--2346|-|-*---|-----| |0110_101_111_sss_sss (s is not equal to 63) [BMI.S <label>] 11583: //BMI.L <label> |-|--2346|-|-*---|-----| |0110_101_111_111_111-{offset} 11584: //BNPL.L <label> |A|--2346|-|-*---|-----| |0110_101_111_111_111-{offset} [BMI.L <label>] 11585: public static void irpBmisl () throws M68kException { 11586: XEiJ.mpuCycleCount++; 11587: int t = XEiJ.regPC; //pc0+2 11588: int s = (byte) XEiJ.regOC; //8bitディスプレースメント 11589: if (s == -1) { //Bcc.L 11590: XEiJ.regPC = t + 4; //pc0+6 11591: s = mmuReadLongExword (t, XEiJ.regSRS); //32bitディスプレースメント 11592: } 11593: t += s; //pc0+2+ディスプレースメント 11594: if ((t & 1) != 0) { //分岐先のアドレスが奇数 11595: //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ 11596: irpBccAddressError (t); 11597: } 11598: if (XEiJ.MPU_CC_MI << XEiJ.regCCR < 0) { //分岐する 11599: irpSetPC (t); 11600: } 11601: } //irpBmisl 11602: 11603: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11604: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11605: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11606: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11607: //BGE.W <label> |-|012346|-|-*-*-|-----| |0110_110_000_000_000-{offset} 11608: //BNLT.W <label> |A|012346|-|-*-*-|-----| |0110_110_000_000_000-{offset} [BGE.W <label>] 11609: //JBGE.W <label> |A|012346|-|-*-*-|-----| |0110_110_000_000_000-{offset} [BGE.W <label>] 11610: //JBNLT.W <label> |A|012346|-|-*-*-|-----| |0110_110_000_000_000-{offset} [BGE.W <label>] 11611: //BGE.S <label> |-|012346|-|-*-*-|-----| |0110_110_000_sss_sss (s is not equal to 0) 11612: //BNLT.S <label> |A|012346|-|-*-*-|-----| |0110_110_000_sss_sss (s is not equal to 0) [BGE.S <label>] 11613: //JBGE.S <label> |A|012346|-|-*-*-|-----| |0110_110_000_sss_sss (s is not equal to 0) [BGE.S <label>] 11614: //JBNLT.S <label> |A|012346|-|-*-*-|-----| |0110_110_000_sss_sss (s is not equal to 0) [BGE.S <label>] 11615: //JBLT.L <label> |A|012346|-|-*-*-|-----| |0110_110_000_000_110-0100111011111001-{address} [BGE.S (*)+8;JMP <label>] 11616: //JBNGE.L <label> |A|012346|-|-*-*-|-----| |0110_110_000_000_110-0100111011111001-{address} [BGE.S (*)+8;JMP <label>] 11617: public static void irpBgesw () throws M68kException { 11618: XEiJ.mpuCycleCount++; 11619: int t = XEiJ.regPC; //pc0+2 11620: int s = (byte) XEiJ.regOC; //8bitディスプレースメント 11621: if (s == 0) { //Bcc.W 11622: XEiJ.regPC = t + 2; //pc0+4 11623: s = mmuReadWordSignExword (t, XEiJ.regSRS); //16bitディスプレースメント 11624: } 11625: t += s; //pc0+2+ディスプレースメント 11626: if ((t & 1) != 0) { //分岐先のアドレスが奇数 11627: //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ 11628: irpBccAddressError (t); 11629: } 11630: if (XEiJ.MPU_CC_GE << XEiJ.regCCR < 0) { //分岐する 11631: irpSetPC (t); 11632: } 11633: } //irpBgesw 11634: 11635: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11636: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11637: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11638: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11639: //BGE.S <label> |-|012346|-|-*-*-|-----| |0110_110_001_sss_sss 11640: //BNLT.S <label> |A|012346|-|-*-*-|-----| |0110_110_001_sss_sss [BGE.S <label>] 11641: //JBGE.S <label> |A|012346|-|-*-*-|-----| |0110_110_001_sss_sss [BGE.S <label>] 11642: //JBNLT.S <label> |A|012346|-|-*-*-|-----| |0110_110_001_sss_sss [BGE.S <label>] 11643: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11644: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11645: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11646: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11647: //BGE.S <label> |-|012346|-|-*-*-|-----| |0110_110_010_sss_sss 11648: //BNLT.S <label> |A|012346|-|-*-*-|-----| |0110_110_010_sss_sss [BGE.S <label>] 11649: //JBGE.S <label> |A|012346|-|-*-*-|-----| |0110_110_010_sss_sss [BGE.S <label>] 11650: //JBNLT.S <label> |A|012346|-|-*-*-|-----| |0110_110_010_sss_sss [BGE.S <label>] 11651: public static void irpBges () throws M68kException { 11652: XEiJ.mpuCycleCount++; 11653: int t = XEiJ.regPC; //pc0+2 11654: int s = (byte) XEiJ.regOC; //8bitディスプレースメント 11655: t += s; //pc0+2+ディスプレースメント 11656: if ((t & 1) != 0) { //分岐先のアドレスが奇数 11657: //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ 11658: irpBccAddressError (t); 11659: } 11660: if (XEiJ.MPU_CC_GE << XEiJ.regCCR < 0) { //分岐する 11661: irpSetPC (t); 11662: } 11663: } //irpBges 11664: 11665: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11666: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11667: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11668: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11669: //BGE.S <label> |-|--2346|-|-*-*-|-----| |0110_110_011_sss_sss (s is not equal to 63) 11670: //BNLT.S <label> |A|--2346|-|-*-*-|-----| |0110_110_011_sss_sss (s is not equal to 63) [BGE.S <label>] 11671: //JBGE.S <label> |A|--2346|-|-*-*-|-----| |0110_110_011_sss_sss (s is not equal to 63) [BGE.S <label>] 11672: //JBNLT.S <label> |A|--2346|-|-*-*-|-----| |0110_110_011_sss_sss (s is not equal to 63) [BGE.S <label>] 11673: //BGE.L <label> |-|--2346|-|-*-*-|-----| |0110_110_011_111_111-{offset} 11674: //BNLT.L <label> |A|--2346|-|-*-*-|-----| |0110_110_011_111_111-{offset} [BGE.L <label>] 11675: public static void irpBgesl () throws M68kException { 11676: XEiJ.mpuCycleCount++; 11677: int t = XEiJ.regPC; //pc0+2 11678: int s = (byte) XEiJ.regOC; //8bitディスプレースメント 11679: if (s == -1) { //Bcc.L 11680: XEiJ.regPC = t + 4; //pc0+6 11681: s = mmuReadLongExword (t, XEiJ.regSRS); //32bitディスプレースメント 11682: } 11683: t += s; //pc0+2+ディスプレースメント 11684: if ((t & 1) != 0) { //分岐先のアドレスが奇数 11685: //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ 11686: irpBccAddressError (t); 11687: } 11688: if (XEiJ.MPU_CC_GE << XEiJ.regCCR < 0) { //分岐する 11689: irpSetPC (t); 11690: } 11691: } //irpBgesl 11692: 11693: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11694: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11695: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11696: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11697: //BLT.W <label> |-|012346|-|-*-*-|-----| |0110_110_100_000_000-{offset} 11698: //BNGE.W <label> |A|012346|-|-*-*-|-----| |0110_110_100_000_000-{offset} [BLT.W <label>] 11699: //JBLT.W <label> |A|012346|-|-*-*-|-----| |0110_110_100_000_000-{offset} [BLT.W <label>] 11700: //JBNGE.W <label> |A|012346|-|-*-*-|-----| |0110_110_100_000_000-{offset} [BLT.W <label>] 11701: //BLT.S <label> |-|012346|-|-*-*-|-----| |0110_110_100_sss_sss (s is not equal to 0) 11702: //BNGE.S <label> |A|012346|-|-*-*-|-----| |0110_110_100_sss_sss (s is not equal to 0) [BLT.S <label>] 11703: //JBLT.S <label> |A|012346|-|-*-*-|-----| |0110_110_100_sss_sss (s is not equal to 0) [BLT.S <label>] 11704: //JBNGE.S <label> |A|012346|-|-*-*-|-----| |0110_110_100_sss_sss (s is not equal to 0) [BLT.S <label>] 11705: //JBGE.L <label> |A|012346|-|-*-*-|-----| |0110_110_100_000_110-0100111011111001-{address} [BLT.S (*)+8;JMP <label>] 11706: //JBNLT.L <label> |A|012346|-|-*-*-|-----| |0110_110_100_000_110-0100111011111001-{address} [BLT.S (*)+8;JMP <label>] 11707: public static void irpBltsw () throws M68kException { 11708: XEiJ.mpuCycleCount++; 11709: int t = XEiJ.regPC; //pc0+2 11710: int s = (byte) XEiJ.regOC; //8bitディスプレースメント 11711: if (s == 0) { //Bcc.W 11712: XEiJ.regPC = t + 2; //pc0+4 11713: s = mmuReadWordSignExword (t, XEiJ.regSRS); //16bitディスプレースメント 11714: } 11715: t += s; //pc0+2+ディスプレースメント 11716: if ((t & 1) != 0) { //分岐先のアドレスが奇数 11717: //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ 11718: irpBccAddressError (t); 11719: } 11720: if (XEiJ.MPU_CC_LT << XEiJ.regCCR < 0) { //分岐する 11721: irpSetPC (t); 11722: } 11723: } //irpBltsw 11724: 11725: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11726: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11727: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11728: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11729: //BLT.S <label> |-|012346|-|-*-*-|-----| |0110_110_101_sss_sss 11730: //BNGE.S <label> |A|012346|-|-*-*-|-----| |0110_110_101_sss_sss [BLT.S <label>] 11731: //JBLT.S <label> |A|012346|-|-*-*-|-----| |0110_110_101_sss_sss [BLT.S <label>] 11732: //JBNGE.S <label> |A|012346|-|-*-*-|-----| |0110_110_101_sss_sss [BLT.S <label>] 11733: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11734: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11735: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11736: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11737: //BLT.S <label> |-|012346|-|-*-*-|-----| |0110_110_110_sss_sss 11738: //BNGE.S <label> |A|012346|-|-*-*-|-----| |0110_110_110_sss_sss [BLT.S <label>] 11739: //JBLT.S <label> |A|012346|-|-*-*-|-----| |0110_110_110_sss_sss [BLT.S <label>] 11740: //JBNGE.S <label> |A|012346|-|-*-*-|-----| |0110_110_110_sss_sss [BLT.S <label>] 11741: public static void irpBlts () throws M68kException { 11742: XEiJ.mpuCycleCount++; 11743: int t = XEiJ.regPC; //pc0+2 11744: int s = (byte) XEiJ.regOC; //8bitディスプレースメント 11745: t += s; //pc0+2+ディスプレースメント 11746: if ((t & 1) != 0) { //分岐先のアドレスが奇数 11747: //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ 11748: irpBccAddressError (t); 11749: } 11750: if (XEiJ.MPU_CC_LT << XEiJ.regCCR < 0) { //分岐する 11751: irpSetPC (t); 11752: } 11753: } //irpBlts 11754: 11755: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11756: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11757: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11758: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11759: //BLT.S <label> |-|--2346|-|-*-*-|-----| |0110_110_111_sss_sss (s is not equal to 63) 11760: //BNGE.S <label> |A|--2346|-|-*-*-|-----| |0110_110_111_sss_sss (s is not equal to 63) [BLT.S <label>] 11761: //JBLT.S <label> |A|--2346|-|-*-*-|-----| |0110_110_111_sss_sss (s is not equal to 63) [BLT.S <label>] 11762: //JBNGE.S <label> |A|--2346|-|-*-*-|-----| |0110_110_111_sss_sss (s is not equal to 63) [BLT.S <label>] 11763: //BLT.L <label> |-|--2346|-|-*-*-|-----| |0110_110_111_111_111-{offset} 11764: //BNGE.L <label> |A|--2346|-|-*-*-|-----| |0110_110_111_111_111-{offset} [BLT.L <label>] 11765: public static void irpBltsl () throws M68kException { 11766: XEiJ.mpuCycleCount++; 11767: int t = XEiJ.regPC; //pc0+2 11768: int s = (byte) XEiJ.regOC; //8bitディスプレースメント 11769: if (s == -1) { //Bcc.L 11770: XEiJ.regPC = t + 4; //pc0+6 11771: s = mmuReadLongExword (t, XEiJ.regSRS); //32bitディスプレースメント 11772: } 11773: t += s; //pc0+2+ディスプレースメント 11774: if ((t & 1) != 0) { //分岐先のアドレスが奇数 11775: //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ 11776: irpBccAddressError (t); 11777: } 11778: if (XEiJ.MPU_CC_LT << XEiJ.regCCR < 0) { //分岐する 11779: irpSetPC (t); 11780: } 11781: } //irpBltsl 11782: 11783: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11784: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11785: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11786: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11787: //BGT.W <label> |-|012346|-|-***-|-----| |0110_111_000_000_000-{offset} 11788: //BNLE.W <label> |A|012346|-|-***-|-----| |0110_111_000_000_000-{offset} [BGT.W <label>] 11789: //JBGT.W <label> |A|012346|-|-***-|-----| |0110_111_000_000_000-{offset} [BGT.W <label>] 11790: //JBNLE.W <label> |A|012346|-|-***-|-----| |0110_111_000_000_000-{offset} [BGT.W <label>] 11791: //BGT.S <label> |-|012346|-|-***-|-----| |0110_111_000_sss_sss (s is not equal to 0) 11792: //BNLE.S <label> |A|012346|-|-***-|-----| |0110_111_000_sss_sss (s is not equal to 0) [BGT.S <label>] 11793: //JBGT.S <label> |A|012346|-|-***-|-----| |0110_111_000_sss_sss (s is not equal to 0) [BGT.S <label>] 11794: //JBNLE.S <label> |A|012346|-|-***-|-----| |0110_111_000_sss_sss (s is not equal to 0) [BGT.S <label>] 11795: //JBLE.L <label> |A|012346|-|-***-|-----| |0110_111_000_000_110-0100111011111001-{address} [BGT.S (*)+8;JMP <label>] 11796: //JBNGT.L <label> |A|012346|-|-***-|-----| |0110_111_000_000_110-0100111011111001-{address} [BGT.S (*)+8;JMP <label>] 11797: public static void irpBgtsw () throws M68kException { 11798: XEiJ.mpuCycleCount++; 11799: int t = XEiJ.regPC; //pc0+2 11800: int s = (byte) XEiJ.regOC; //8bitディスプレースメント 11801: if (s == 0) { //Bcc.W 11802: XEiJ.regPC = t + 2; //pc0+4 11803: s = mmuReadWordSignExword (t, XEiJ.regSRS); //16bitディスプレースメント 11804: } 11805: t += s; //pc0+2+ディスプレースメント 11806: if ((t & 1) != 0) { //分岐先のアドレスが奇数 11807: //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ 11808: irpBccAddressError (t); 11809: } 11810: if (XEiJ.MPU_CC_GT << XEiJ.regCCR < 0) { //分岐する 11811: irpSetPC (t); 11812: } 11813: } //irpBgtsw 11814: 11815: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11816: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11817: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11818: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11819: //BGT.S <label> |-|012346|-|-***-|-----| |0110_111_001_sss_sss 11820: //BNLE.S <label> |A|012346|-|-***-|-----| |0110_111_001_sss_sss [BGT.S <label>] 11821: //JBGT.S <label> |A|012346|-|-***-|-----| |0110_111_001_sss_sss [BGT.S <label>] 11822: //JBNLE.S <label> |A|012346|-|-***-|-----| |0110_111_001_sss_sss [BGT.S <label>] 11823: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11824: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11825: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11826: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11827: //BGT.S <label> |-|012346|-|-***-|-----| |0110_111_010_sss_sss 11828: //BNLE.S <label> |A|012346|-|-***-|-----| |0110_111_010_sss_sss [BGT.S <label>] 11829: //JBGT.S <label> |A|012346|-|-***-|-----| |0110_111_010_sss_sss [BGT.S <label>] 11830: //JBNLE.S <label> |A|012346|-|-***-|-----| |0110_111_010_sss_sss [BGT.S <label>] 11831: public static void irpBgts () throws M68kException { 11832: XEiJ.mpuCycleCount++; 11833: int t = XEiJ.regPC; //pc0+2 11834: int s = (byte) XEiJ.regOC; //8bitディスプレースメント 11835: t += s; //pc0+2+ディスプレースメント 11836: if ((t & 1) != 0) { //分岐先のアドレスが奇数 11837: //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ 11838: irpBccAddressError (t); 11839: } 11840: if (XEiJ.MPU_CC_GT << XEiJ.regCCR < 0) { //分岐する 11841: irpSetPC (t); 11842: } 11843: } //irpBgts 11844: 11845: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11846: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11847: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11848: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11849: //BGT.S <label> |-|--2346|-|-***-|-----| |0110_111_011_sss_sss (s is not equal to 63) 11850: //BNLE.S <label> |A|--2346|-|-***-|-----| |0110_111_011_sss_sss (s is not equal to 63) [BGT.S <label>] 11851: //JBGT.S <label> |A|--2346|-|-***-|-----| |0110_111_011_sss_sss (s is not equal to 63) [BGT.S <label>] 11852: //JBNLE.S <label> |A|--2346|-|-***-|-----| |0110_111_011_sss_sss (s is not equal to 63) [BGT.S <label>] 11853: //BGT.L <label> |-|--2346|-|-***-|-----| |0110_111_011_111_111-{offset} 11854: //BNLE.L <label> |A|--2346|-|-***-|-----| |0110_111_011_111_111-{offset} [BGT.L <label>] 11855: public static void irpBgtsl () throws M68kException { 11856: XEiJ.mpuCycleCount++; 11857: int t = XEiJ.regPC; //pc0+2 11858: int s = (byte) XEiJ.regOC; //8bitディスプレースメント 11859: if (s == -1) { //Bcc.L 11860: XEiJ.regPC = t + 4; //pc0+6 11861: s = mmuReadLongExword (t, XEiJ.regSRS); //32bitディスプレースメント 11862: } 11863: t += s; //pc0+2+ディスプレースメント 11864: if ((t & 1) != 0) { //分岐先のアドレスが奇数 11865: //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ 11866: irpBccAddressError (t); 11867: } 11868: if (XEiJ.MPU_CC_GT << XEiJ.regCCR < 0) { //分岐する 11869: irpSetPC (t); 11870: } 11871: } //irpBgtsl 11872: 11873: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11874: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11875: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11876: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11877: //BLE.W <label> |-|012346|-|-***-|-----| |0110_111_100_000_000-{offset} 11878: //BNGT.W <label> |A|012346|-|-***-|-----| |0110_111_100_000_000-{offset} [BLE.W <label>] 11879: //JBLE.W <label> |A|012346|-|-***-|-----| |0110_111_100_000_000-{offset} [BLE.W <label>] 11880: //JBNGT.W <label> |A|012346|-|-***-|-----| |0110_111_100_000_000-{offset} [BLE.W <label>] 11881: //BLE.S <label> |-|012346|-|-***-|-----| |0110_111_100_sss_sss (s is not equal to 0) 11882: //BNGT.S <label> |A|012346|-|-***-|-----| |0110_111_100_sss_sss (s is not equal to 0) [BLE.S <label>] 11883: //JBLE.S <label> |A|012346|-|-***-|-----| |0110_111_100_sss_sss (s is not equal to 0) [BLE.S <label>] 11884: //JBNGT.S <label> |A|012346|-|-***-|-----| |0110_111_100_sss_sss (s is not equal to 0) [BLE.S <label>] 11885: //JBGT.L <label> |A|012346|-|-***-|-----| |0110_111_100_000_110-0100111011111001-{address} [BLE.S (*)+8;JMP <label>] 11886: //JBNLE.L <label> |A|012346|-|-***-|-----| |0110_111_100_000_110-0100111011111001-{address} [BLE.S (*)+8;JMP <label>] 11887: public static void irpBlesw () throws M68kException { 11888: XEiJ.mpuCycleCount++; 11889: int t = XEiJ.regPC; //pc0+2 11890: int s = (byte) XEiJ.regOC; //8bitディスプレースメント 11891: if (s == 0) { //Bcc.W 11892: XEiJ.regPC = t + 2; //pc0+4 11893: s = mmuReadWordSignExword (t, XEiJ.regSRS); //16bitディスプレースメント 11894: } 11895: t += s; //pc0+2+ディスプレースメント 11896: if ((t & 1) != 0) { //分岐先のアドレスが奇数 11897: //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ 11898: irpBccAddressError (t); 11899: } 11900: if (XEiJ.MPU_CC_LE << XEiJ.regCCR < 0) { //分岐する 11901: irpSetPC (t); 11902: } 11903: } //irpBlesw 11904: 11905: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11906: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11907: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11908: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11909: //BLE.S <label> |-|012346|-|-***-|-----| |0110_111_101_sss_sss 11910: //BNGT.S <label> |A|012346|-|-***-|-----| |0110_111_101_sss_sss [BLE.S <label>] 11911: //JBLE.S <label> |A|012346|-|-***-|-----| |0110_111_101_sss_sss [BLE.S <label>] 11912: //JBNGT.S <label> |A|012346|-|-***-|-----| |0110_111_101_sss_sss [BLE.S <label>] 11913: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11914: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11915: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11916: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11917: //BLE.S <label> |-|012346|-|-***-|-----| |0110_111_110_sss_sss 11918: //BNGT.S <label> |A|012346|-|-***-|-----| |0110_111_110_sss_sss [BLE.S <label>] 11919: //JBLE.S <label> |A|012346|-|-***-|-----| |0110_111_110_sss_sss [BLE.S <label>] 11920: //JBNGT.S <label> |A|012346|-|-***-|-----| |0110_111_110_sss_sss [BLE.S <label>] 11921: public static void irpBles () throws M68kException { 11922: XEiJ.mpuCycleCount++; 11923: int t = XEiJ.regPC; //pc0+2 11924: int s = (byte) XEiJ.regOC; //8bitディスプレースメント 11925: t += s; //pc0+2+ディスプレースメント 11926: if ((t & 1) != 0) { //分岐先のアドレスが奇数 11927: //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ 11928: irpBccAddressError (t); 11929: } 11930: if (XEiJ.MPU_CC_LE << XEiJ.regCCR < 0) { //分岐する 11931: irpSetPC (t); 11932: } 11933: } //irpBles 11934: 11935: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11936: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11937: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11938: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11939: //BLE.S <label> |-|--2346|-|-***-|-----| |0110_111_111_sss_sss (s is not equal to 63) 11940: //BNGT.S <label> |A|--2346|-|-***-|-----| |0110_111_111_sss_sss (s is not equal to 63) [BLE.S <label>] 11941: //JBLE.S <label> |A|--2346|-|-***-|-----| |0110_111_111_sss_sss (s is not equal to 63) [BLE.S <label>] 11942: //JBNGT.S <label> |A|--2346|-|-***-|-----| |0110_111_111_sss_sss (s is not equal to 63) [BLE.S <label>] 11943: //BLE.L <label> |-|--2346|-|-***-|-----| |0110_111_111_111_111-{offset} 11944: //BNGT.L <label> |A|--2346|-|-***-|-----| |0110_111_111_111_111-{offset} [BLE.L <label>] 11945: public static void irpBlesl () throws M68kException { 11946: XEiJ.mpuCycleCount++; 11947: int t = XEiJ.regPC; //pc0+2 11948: int s = (byte) XEiJ.regOC; //8bitディスプレースメント 11949: if (s == -1) { //Bcc.L 11950: XEiJ.regPC = t + 4; //pc0+6 11951: s = mmuReadLongExword (t, XEiJ.regSRS); //32bitディスプレースメント 11952: } 11953: t += s; //pc0+2+ディスプレースメント 11954: if ((t & 1) != 0) { //分岐先のアドレスが奇数 11955: //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ 11956: irpBccAddressError (t); 11957: } 11958: if (XEiJ.MPU_CC_LE << XEiJ.regCCR < 0) { //分岐する 11959: irpSetPC (t); 11960: } 11961: } //irpBlesl 11962: 11963: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11964: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11965: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11966: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11967: //IOCS <name> |A|012346|-|UUUUU|UUUUU| |0111_000_0dd_ddd_ddd-0100111001001111 [MOVEQ.L #<data>,D0;TRAP #15] 11968: //MOVEQ.L #<data>,Dq |-|012346|-|-UUUU|-**00| |0111_qqq_0dd_ddd_ddd 11969: public static void irpMoveq () throws M68kException { 11970: XEiJ.mpuCycleCount++; 11971: int z; 11972: XEiJ.regRn[XEiJ.regOC >> 9 & 7] = z = (byte) XEiJ.regOC; 11973: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 11974: } //irpMoveq 11975: 11976: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11977: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11978: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11979: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11980: //MVS.B <ea>,Dq |-|------|-|-UUUU|-**00|D M+-WXZPI|0111_qqq_100_mmm_rrr (ISA_B) 11981: // 11982: //MVS.B <ea>,Dq 11983: // バイトデータをロングに符号拡張してDqの全体を更新する 11984: public static void irpMvsByte () throws M68kException { 11985: XEiJ.mpuCycleCount++; 11986: int ea = XEiJ.regOC & 63; 11987: int z; 11988: XEiJ.regRn[XEiJ.regOC >> 9 & 7] = z = ea < XEiJ.EA_AR ? (byte) XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadByteSignExword ((XEiJ.regPC += 2) - 1, XEiJ.regSRS) : mmuReadByteSignData (efaAnyByte (ea), XEiJ.regSRS); //pcbs。イミディエイトを分離 11989: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 11990: } //irpMvsByte 11991: 11992: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11993: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11994: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11995: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11996: //MVS.W <ea>,Dq |-|------|-|-UUUU|-**00|D M+-WXZPI|0111_qqq_101_mmm_rrr (ISA_B) 11997: // 11998: //MVS.W <ea>,Dq 11999: // ワードデータをロングに符号拡張してDqの全体を更新する 12000: public static void irpMvsWord () throws M68kException { 12001: XEiJ.mpuCycleCount++; 12002: int ea = XEiJ.regOC & 63; 12003: int z; 12004: XEiJ.regRn[XEiJ.regOC >> 9 & 7] = z = ea < XEiJ.EA_AR ? (short) XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) : mmuReadWordSignData (efaAnyWord (ea), XEiJ.regSRS); //pcws。イミディエイトを分離 12005: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 12006: } //irpMvsWord 12007: 12008: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12009: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12010: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12011: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12012: //MVZ.B <ea>,Dq |-|------|-|-UUUU|-0*00|D M+-WXZPI|0111_qqq_110_mmm_rrr (ISA_B) 12013: // 12014: //MVZ.B <ea>,Dq 12015: // バイトデータをロングにゼロ拡張してDqの全体を更新する 12016: public static void irpMvzByte () throws M68kException { 12017: XEiJ.mpuCycleCount++; 12018: int ea = XEiJ.regOC & 63; 12019: int z; 12020: XEiJ.regRn[XEiJ.regOC >> 9 & 7] = z = ea < XEiJ.EA_AR ? 0xff & XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadByteZeroExword ((XEiJ.regPC += 2) - 1, XEiJ.regSRS) : mmuReadByteZeroData (efaAnyByte (ea), XEiJ.regSRS); //pcbz。イミディエイトを分離 12021: XEiJ.regCCR = XEiJ.REG_CCR_X & XEiJ.regCCR | (z == 0 ? XEiJ.REG_CCR_Z : 0); 12022: } //irpMvzByte 12023: 12024: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12025: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12026: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12027: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12028: //MVZ.W <ea>,Dq |-|------|-|-UUUU|-0*00|D M+-WXZPI|0111_qqq_111_mmm_rrr (ISA_B) 12029: // 12030: //MVZ.W <ea>,Dq 12031: // ワードデータをロングにゼロ拡張してDqの全体を更新する 12032: public static void irpMvzWord () throws M68kException { 12033: XEiJ.mpuCycleCount++; 12034: int ea = XEiJ.regOC & 63; 12035: int z; 12036: XEiJ.regRn[XEiJ.regOC >> 9 & 7] = z = ea < XEiJ.EA_AR ? (char) XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) : mmuReadWordZeroData (efaAnyWord (ea), XEiJ.regSRS); //pcwz。イミディエイトを分離 12037: XEiJ.regCCR = XEiJ.REG_CCR_X & XEiJ.regCCR | (z == 0 ? XEiJ.REG_CCR_Z : 0); 12038: } //irpMvzWord 12039: 12040: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12041: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12042: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12043: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12044: //OR.B <ea>,Dq |-|012346|-|-UUUU|-**00|D M+-WXZPI|1000_qqq_000_mmm_rrr 12045: public static void irpOrToRegByte () throws M68kException { 12046: XEiJ.mpuCycleCount++; 12047: int ea = XEiJ.regOC & 63; 12048: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & (XEiJ.regRn[XEiJ.regOC >> 9 & 7] |= 255 & (ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadByteSignExword ((XEiJ.regPC += 2) - 1, XEiJ.regSRS) : mmuReadByteSignData (efaAnyByte (ea), XEiJ.regSRS)))]; //ccr_tst_byte。pcbs。イミディエイトを分離。0拡張してからOR 12049: } //irpOrToRegByte 12050: 12051: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12052: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12053: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12054: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12055: //OR.W <ea>,Dq |-|012346|-|-UUUU|-**00|D M+-WXZPI|1000_qqq_001_mmm_rrr 12056: public static void irpOrToRegWord () throws M68kException { 12057: XEiJ.mpuCycleCount++; 12058: int ea = XEiJ.regOC & 63; 12059: int z = (short) (XEiJ.regRn[XEiJ.regOC >> 9 & 7] |= ea < XEiJ.EA_AR ? (char) XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) : mmuReadWordZeroData (efaAnyWord (ea), XEiJ.regSRS)); //pcwz。イミディエイトを分離。0拡張してからOR 12060: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 12061: } //irpOrToRegWord 12062: 12063: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12064: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12065: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12066: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12067: //OR.L <ea>,Dq |-|012346|-|-UUUU|-**00|D M+-WXZPI|1000_qqq_010_mmm_rrr 12068: public static void irpOrToRegLong () throws M68kException { 12069: int ea = XEiJ.regOC & 63; 12070: int z = XEiJ.regRn[XEiJ.regOC >> 9 & 7] |= ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS) : mmuReadLongData (efaAnyLong (ea), XEiJ.regSRS); //pcls。イミディエイトを分離 12071: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 12072: } //irpOrToRegLong 12073: 12074: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12075: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12076: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12077: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12078: //DIVU.W <ea>,Dq |-|012346|-|-UUUU|-***0|D M+-WXZPI|1000_qqq_011_mmm_rrr 12079: // 12080: //DIVU.W <ea>,Dq 12081: // M68000PRMでDIVU.Wのオーバーフローの条件が16bit符号あり整数と書かれているのは16bit符号なし整数の間違い 12082: public static void irpDivuWord () throws M68kException { 12083: // X 変化しない 12084: // N ゼロ除算またはオーバーフローのとき不定。商が負のときセット。それ以外はクリア 12085: // Z ゼロ除算またはオーバーフローのとき不定。商が0のときセット。それ以外はクリア 12086: // V ゼロ除算のとき不定。オーバーフローのときセット。それ以外はクリア 12087: // C 常にクリア 12088: XEiJ.mpuCycleCount += 22; //最大 12089: int ea = XEiJ.regOC & 63; 12090: int qqq = XEiJ.regOC >> 9 & 7; 12091: int y = ea < XEiJ.EA_AR ? (char) XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) : mmuReadWordZeroData (efaAnyWord (ea), XEiJ.regSRS); //除数。pcwz。イミディエイトを分離 12092: int x = XEiJ.regRn[qqq]; //被除数 12093: if (y == 0) { //ゼロ除算 12094: //Dqは変化しない 12095: XEiJ.regCCR = (XEiJ.regCCR & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_N | XEiJ.REG_CCR_Z | XEiJ.REG_CCR_V) //XとNとZとVは変化しない 12096: ); //Cは常にクリア 12097: m60Address = XEiJ.regPC0; //アドレスは命令の先頭 12098: M68kException.m6eNumber = M68kException.M6E_DIVIDE_BY_ZERO; 12099: throw M68kException.m6eSignal; 12100: } 12101: //無理にintで符号なし除算をやろうとするよりもdoubleにキャストしてから割ったほうが速い 12102: // intの除算をdoubleの除算器で行うプロセッサならばなおさら 12103: //被除数を符号なし32ビットとみなすためlongを経由してdoubleに変換する 12104: //doubleからlongやintへのキャストは小数点以下が切り捨てられ、オーバーフローは表現できる絶対値最大の値になる 12105: //doubleから直接intに戻しているので0xffffffff/0x0001=0xffffffffが絶対値最大の0x7fffffffになってしまうが、 12106: //DIVU.Wではオーバーフローになることに変わりはないのでよいことにする 12107: // 符号なし32ビットの0xffffffffにしたいときは戻すときもlongを経由すればよい 12108: int z = (int) ((double) ((long) x & 0xffffffffL) / (double) y); //商 12109: if (z >>> 16 != 0) { //オーバーフローあり 12110: //Dqは変化しない 12111: XEiJ.regCCR = (XEiJ.regCCR & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_N | XEiJ.REG_CCR_Z) | //XとNとZは変化しない 12112: XEiJ.REG_CCR_V //Vは常にセット 12113: ); //Cは常にクリア 12114: } else { //オーバーフローなし 12115: XEiJ.regRn[qqq] = x - y * z << 16 | z; //余り<<16|商 12116: z = (short) z; 12117: XEiJ.regCCR = (XEiJ.regCCR & XEiJ.REG_CCR_X | //Xは変化しない 12118: (z < 0 ? XEiJ.REG_CCR_N : 0) | //Nは商が負のときセット、さもなくばクリア 12119: (z == 0 ? XEiJ.REG_CCR_Z : 0) //Zは商が0のときセット、さもなくばクリア 12120: //Vは常にクリア 12121: ); //Cは常にクリア 12122: } //if オーバーフローあり/オーバーフローなし 12123: } //irpDivuWord 12124: 12125: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12126: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12127: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12128: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12129: //SBCD.B Dr,Dq |-|012346|-|UUUUU|*U*U*| |1000_qqq_100_000_rrr 12130: //SBCD.B -(Ar),-(Aq) |-|012346|-|UUUUU|*U*U*| |1000_qqq_100_001_rrr 12131: //OR.B Dq,<ea> |-|012346|-|-UUUU|-**00| M+-WXZ |1000_qqq_100_mmm_rrr 12132: public static void irpOrToMemByte () throws M68kException { 12133: int ea = XEiJ.regOC & 63; 12134: if (ea >= XEiJ.EA_MM) { //OR.B Dq,<ea> 12135: XEiJ.mpuCycleCount++; 12136: int a = efaMltByte (ea); 12137: int z = XEiJ.regRn[XEiJ.regOC >> 9 & 7] | mmuReadByteSignData (a, XEiJ.regSRS); 12138: mmuWriteByteData (a, z, XEiJ.regSRS); 12139: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & z]; //ccr_tst_byte 12140: } else if (ea < XEiJ.EA_AR) { //SBCD.B Dr,Dq 12141: int qqq = XEiJ.regOC >> 9 & 7; 12142: XEiJ.mpuCycleCount++; 12143: int x; 12144: XEiJ.regRn[qqq] = ~0xff & (x = XEiJ.regRn[qqq]) | irpSbcd (x, XEiJ.regRn[ea]); 12145: } else { //SBCD.B -(Ar),-(Aq) 12146: XEiJ.mpuCycleCount += 2; 12147: m60Incremented -= 1L << (ea << 3); 12148: int a = m60Address = --XEiJ.regRn[ea]; //このr[ea]はアドレスレジスタ 12149: int y = mmuReadByteZeroData (a, XEiJ.regSRS); 12150: int aqq = (XEiJ.regOC >> 9) - (64 - 8); 12151: m60Incremented -= 1L << (aqq << 3); 12152: a = m60Address = --XEiJ.regRn[aqq]; 12153: mmuWriteByteData (a, irpSbcd (mmuModifyByteZeroData (a, XEiJ.regSRS), y), XEiJ.regSRS); 12154: } 12155: } //irpOrToMemByte 12156: 12157: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12158: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12159: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12160: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12161: //PACK Dr,Dq,#<data> |-|--2346|-|-----|-----| |1000_qqq_101_000_rrr-{data} 12162: //PACK -(Ar),-(Aq),#<data> |-|--2346|-|-----|-----| |1000_qqq_101_001_rrr-{data} 12163: //OR.W Dq,<ea> |-|012346|-|-UUUU|-**00| M+-WXZ |1000_qqq_101_mmm_rrr 12164: // 12165: //PACK Dr,Dq,#<data> 12166: //PACK -(Ar),-(Aq),#<data> 12167: // PACK/UNPKは第1オペランドのソースと第2オペランドのデスティネーションのサイズが違う。パックされていない方がワードでされている方がバイト 12168: // 10の位を4ビット右または左にシフトする。第3オペランドの補正値はワードでパックされていない方に加算する。CCRは変化しない 12169: public static void irpOrToMemWord () throws M68kException { 12170: int ea = XEiJ.regOC & 63; 12171: if (ea >= XEiJ.EA_MM) { //OR.W Dq,<ea> 12172: XEiJ.mpuCycleCount++; 12173: int a = efaMltWord (ea); 12174: int z; 12175: mmuWriteWordData (a, z = XEiJ.regRn[XEiJ.regOC >> 9 & 7] | mmuModifyWordSignData (a, XEiJ.regSRS), XEiJ.regSRS); 12176: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (char) z - 1 >> 31 & XEiJ.REG_CCR_Z | ((short) z < 0 ? XEiJ.REG_CCR_N : 0); //ccr_tst_word 12177: } else if (ea < XEiJ.EA_AR) { //PACK Dr,Dq,#<data> 12178: XEiJ.mpuCycleCount += 2; 12179: int qqq = XEiJ.regOC >> 9 & 7; 12180: int t = XEiJ.regRn[ea] + mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); //pcws 12181: XEiJ.regRn[qqq] = ~0xff & XEiJ.regRn[qqq] | t >> 4 & 0xf0 | t & 15; 12182: } else { //PACK -(Ar),-(Aq),#<data> 12183: int o = mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); //pcws 12184: m60Incremented -= 2L << (ea << 3); 12185: int a = m60Address = XEiJ.regRn[ea] -= 2; 12186: int t = mmuReadWordSignData (a, XEiJ.regSRS) + o; //020以上なのでアドレスエラーは出ない 12187: int aqq = (XEiJ.regOC >> 9) - (64 - 8); 12188: m60Incremented -= 1L << (aqq << 3); 12189: a = m60Address = --XEiJ.regRn[aqq]; 12190: mmuWriteByteData (a, t >> 4 & 0xf0 | t & 15, XEiJ.regSRS); 12191: } 12192: } //irpOrToMemWord 12193: 12194: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12195: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12196: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12197: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12198: //UNPK Dr,Dq,#<data> |-|--2346|-|-----|-----| |1000_qqq_110_000_rrr-{data} 12199: //UNPK -(Ar),-(Aq),#<data> |-|--2346|-|-----|-----| |1000_qqq_110_001_rrr-{data} 12200: //OR.L Dq,<ea> |-|012346|-|-UUUU|-**00| M+-WXZ |1000_qqq_110_mmm_rrr 12201: // 12202: //UNPK Dr,Dq,#<data> 12203: //UNPK -(Ar),-(Aq),#<data> 12204: // PACK/UNPKは第1オペランドのソースと第2オペランドのデスティネーションのサイズが違う。パックされていない方がワードでされている方がバイト 12205: // 10の位を4ビット右または左にシフトする。第3オペランドの補正値はワードでパックされていない方に加算する。CCRは変化しない 12206: public static void irpOrToMemLong () throws M68kException { 12207: int ea = XEiJ.regOC & 63; 12208: if (ea >= XEiJ.EA_MM) { //OR.L Dq,<ea> 12209: XEiJ.mpuCycleCount++; 12210: int a = efaMltLong (ea); 12211: int z; 12212: mmuWriteLongData (a, z = XEiJ.regRn[XEiJ.regOC >> 9 & 7] | mmuModifyLongData (a, XEiJ.regSRS), XEiJ.regSRS); 12213: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 12214: } else if (ea < XEiJ.EA_AR) { //UNPK Dr,Dq,#<data> 12215: int qqq = XEiJ.regOC >> 9 & 7; 12216: int t = XEiJ.regRn[ea]; 12217: XEiJ.regRn[qqq] = ~0xffff & XEiJ.regRn[qqq] | (char) ((t << 4 & 0x0f00 | t & 15) + mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS)); //pcws 12218: } else { //UNPK -(Ar),-(Aq),#<data> 12219: int o = mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); //pcws 12220: m60Incremented -= 1L << (ea << 3); 12221: int a = m60Address = --XEiJ.regRn[ea]; 12222: int t = mmuReadByteSignData (a, XEiJ.regSRS); 12223: int aqq = (XEiJ.regOC >> 9) - (64 - 8); 12224: m60Incremented -= 2L << (aqq << 3); 12225: a = m60Address = XEiJ.regRn[aqq] -= 2; 12226: mmuWriteWordData (a, (t << 4 & 0x0f00 | t & 15) + o, XEiJ.regSRS); //020以上なのでアドレスエラーは出ない 12227: } 12228: } //irpOrToMemLong 12229: 12230: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12231: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12232: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12233: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12234: //DIVS.W <ea>,Dq |-|012346|-|-UUUU|-***0|D M+-WXZPI|1000_qqq_111_mmm_rrr 12235: // 12236: //DIVS.W <ea>,Dq 12237: // DIVSの余りの符号は被除数と一致 12238: // M68000PRMでDIVS.Wのアドレッシングモードがデータ可変と書かれているのはデータの間違い 12239: public static void irpDivsWord () throws M68kException { 12240: // X 変化しない 12241: // N ゼロ除算またはオーバーフローのとき不定。商が負のときセット。それ以外はクリア 12242: // Z ゼロ除算またはオーバーフローのとき不定。商が0のときセット。それ以外はクリア 12243: // V ゼロ除算のとき不定。オーバーフローのときセット。それ以外はクリア 12244: // C 常にクリア 12245: //divsの余りの符号は被除数と一致 12246: //Javaの除算演算子の挙動 12247: // 10 / 3 == 3 10 % 3 == 1 10 = 3 * 3 + 1 12248: // 10 / -3 == -3 10 % -3 == 1 10 = -3 * -3 + 1 12249: // -10 / 3 == -3 -10 % 3 == -1 -10 = 3 * -3 + -1 12250: // -10 / -3 == 3 -10 % -3 == -1 -10 = -3 * 3 + -1 12251: XEiJ.mpuCycleCount += 22; //最大 12252: int ea = XEiJ.regOC & 63; 12253: int qqq = XEiJ.regOC >> 9 & 7; 12254: int y = ea < XEiJ.EA_AR ? (short) XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) : mmuReadWordSignData (efaAnyWord (ea), XEiJ.regSRS); //除数。pcws。イミディエイトを分離 12255: int x = XEiJ.regRn[qqq]; //被除数 12256: if (y == 0) { //ゼロ除算 12257: //Dqは変化しない 12258: XEiJ.regCCR = (XEiJ.regCCR & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_N | XEiJ.REG_CCR_Z | XEiJ.REG_CCR_V) //XとNとZとVは変化しない 12259: ); //Cは常にクリア 12260: m60Address = XEiJ.regPC0; //アドレスは命令の先頭 12261: M68kException.m6eNumber = M68kException.M6E_DIVIDE_BY_ZERO; 12262: throw M68kException.m6eSignal; 12263: } 12264: int z = x / y; //商 12265: if ((short) z != z) { //オーバーフローあり 12266: //Dqは変化しない 12267: XEiJ.regCCR = (XEiJ.regCCR & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_N | XEiJ.REG_CCR_Z) | //XとNとZは変化しない 12268: XEiJ.REG_CCR_V //Vは常にセット 12269: ); //Cは常にクリア 12270: } else { //オーバーフローなし 12271: XEiJ.regRn[qqq] = x - y * z << 16 | (char) z; //Dqは余り<<16|商&$ffff 12272: XEiJ.regCCR = (XEiJ.regCCR & XEiJ.REG_CCR_X | //Xは変化しない 12273: (z < 0 ? XEiJ.REG_CCR_N : 0) | //Nは商が負のときセット、さもなくばクリア 12274: (z == 0 ? XEiJ.REG_CCR_Z : 0) //Zは商が0のときセット、さもなくばクリア 12275: //Vは常にクリア 12276: ); //Cは常にクリア 12277: } 12278: } //irpDivsWord 12279: 12280: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12281: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12282: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12283: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12284: //SUB.B <ea>,Dq |-|012346|-|UUUUU|*****|D M+-WXZPI|1001_qqq_000_mmm_rrr 12285: public static void irpSubToRegByte () throws M68kException { 12286: XEiJ.mpuCycleCount++; 12287: int ea = XEiJ.regOC & 63; 12288: int qqq = XEiJ.regOC >> 9 & 7; 12289: int x, y, z; 12290: y = ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadByteSignExword ((XEiJ.regPC += 2) - 1, XEiJ.regSRS) : mmuReadByteSignData (efaAnyByte (ea), XEiJ.regSRS); //pcbs。イミディエイトを分離 12291: x = XEiJ.regRn[qqq]; 12292: z = x - y; 12293: XEiJ.regRn[qqq] = ~255 & x | 255 & z; 12294: XEiJ.regCCR = (XEiJ.MPU_TSTB_TABLE[255 & z] | 12295: ((x ^ y) & (x ^ z)) >> 6 & XEiJ.REG_CCR_V | 12296: (byte) (x & (y ^ z) ^ (y | z)) >> 7 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_sub_byte 12297: } //irpSubToRegByte 12298: 12299: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12300: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12301: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12302: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12303: //SUB.W <ea>,Dq |-|012346|-|UUUUU|*****|DAM+-WXZPI|1001_qqq_001_mmm_rrr 12304: public static void irpSubToRegWord () throws M68kException { 12305: XEiJ.mpuCycleCount++; 12306: int ea = XEiJ.regOC & 63; 12307: int qqq = XEiJ.regOC >> 9 & 7; 12308: int x, y, z; 12309: y = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) : mmuReadWordSignData (efaAnyWord (ea), XEiJ.regSRS); //このr[ea]はデータレジスタまたはアドレスレジスタ。pcws。イミディエイトを分離 12310: x = XEiJ.regRn[qqq]; 12311: z = x - y; 12312: XEiJ.regRn[qqq] = ~65535 & x | (char) z; 12313: XEiJ.regCCR = (z >> 12 & XEiJ.REG_CCR_N | (char) z - 1 >> 14 & XEiJ.REG_CCR_Z | 12314: ((x ^ y) & (x ^ z)) >> 14 & XEiJ.REG_CCR_V | 12315: (short) (x & (y ^ z) ^ (y | z)) >> 15 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_sub_word 12316: } //irpSubToRegWord 12317: 12318: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12319: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12320: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12321: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12322: //SUB.L <ea>,Dq |-|012346|-|UUUUU|*****|DAM+-WXZPI|1001_qqq_010_mmm_rrr 12323: public static void irpSubToRegLong () throws M68kException { 12324: int ea = XEiJ.regOC & 63; 12325: int qqq = XEiJ.regOC >> 9 & 7; 12326: XEiJ.mpuCycleCount++; 12327: int x, y, z; 12328: y = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS) : mmuReadLongData (efaAnyLong (ea), XEiJ.regSRS); //このr[ea]はデータレジスタまたはアドレスレジスタ。pcls。イミディエイトを分離 12329: x = XEiJ.regRn[qqq]; 12330: z = x - y; 12331: XEiJ.regRn[qqq] = z; 12332: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | 12333: ((x ^ y) & (x ^ z)) >> 30 & XEiJ.REG_CCR_V | 12334: (x & (y ^ z) ^ (y | z)) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_sub 12335: } //irpSubToRegLong 12336: 12337: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12338: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12339: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12340: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12341: //SUBA.W <ea>,Aq |-|012346|-|-----|-----|DAM+-WXZPI|1001_qqq_011_mmm_rrr 12342: //SUB.W <ea>,Aq |A|012346|-|-----|-----|DAM+-WXZPI|1001_qqq_011_mmm_rrr [SUBA.W <ea>,Aq] 12343: //CLR.W Ar |A|012346|-|-----|-----| A |1001_rrr_011_001_rrr [SUBA.W Ar,Ar] 12344: // 12345: //SUBA.W <ea>,Aq 12346: // ソースを符号拡張してロングで減算する 12347: public static void irpSubaWord () throws M68kException { 12348: XEiJ.mpuCycleCount++; 12349: int ea = XEiJ.regOC & 63; 12350: int z = ea < XEiJ.EA_MM ? (short) XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) : mmuReadWordSignData (efaAnyWord (ea), XEiJ.regSRS); //このr[ea]はデータレジスタまたはアドレスレジスタ。pcws。イミディエイトを分離。ここでAqが変化する可能性があることに注意 12351: XEiJ.regRn[XEiJ.regOC >> 9 & 15] -= z; //r[op >> 9 & 15] -= ea < XEiJ.EA_MM ? (short) r[ea] : rws (efaAnyWord (ea));は不可 12352: //ccrは変化しない 12353: } //irpSubaWord 12354: 12355: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12356: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12357: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12358: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12359: //SUBX.B Dr,Dq |-|012346|-|*UUUU|*****| |1001_qqq_100_000_rrr 12360: //SUBX.B -(Ar),-(Aq) |-|012346|-|*UUUU|*****| |1001_qqq_100_001_rrr 12361: //SUB.B Dq,<ea> |-|012346|-|UUUUU|*****| M+-WXZ |1001_qqq_100_mmm_rrr 12362: public static void irpSubToMemByte () throws M68kException { 12363: int ea = XEiJ.regOC & 63; 12364: int a, x, y, z; 12365: if (ea < XEiJ.EA_MM) { 12366: if (ea < XEiJ.EA_AR) { //SUBX.B Dr,Dq 12367: int qqq = XEiJ.regOC >> 9 & 7; 12368: XEiJ.mpuCycleCount++; 12369: y = XEiJ.regRn[ea]; 12370: x = XEiJ.regRn[qqq]; 12371: z = x - y - (XEiJ.regCCR >> 4); //Xの左側はすべて0なのでCCR_X&を省略 12372: XEiJ.regRn[qqq] = ~255 & x | 255 & z; 12373: } else { //SUBX.B -(Ar),-(Aq) 12374: XEiJ.mpuCycleCount += 2; 12375: m60Incremented -= 1L << (ea << 3); 12376: a = m60Address = --XEiJ.regRn[ea]; 12377: y = mmuReadByteSignData (a, XEiJ.regSRS); //このr[ea]はアドレスレジスタ 12378: int aqq = XEiJ.regOC >> 9 & 15; //1qqq=aqq 12379: m60Incremented -= 1L << (aqq << 3); 12380: a = m60Address = --XEiJ.regRn[aqq]; 12381: x = mmuModifyByteSignData (a, XEiJ.regSRS); 12382: z = x - y - (XEiJ.regCCR >> 4); //Xの左側はすべて0なのでCCR_X&を省略 12383: mmuWriteByteData (a, z, XEiJ.regSRS); 12384: } 12385: XEiJ.regCCR = (z >> 4 & XEiJ.REG_CCR_N | (255 & z) - 1 >> 6 & XEiJ.regCCR & XEiJ.REG_CCR_Z | //SUBXはZをクリアすることはあるがセットすることはない 12386: ((x ^ y) & (x ^ z)) >> 6 & XEiJ.REG_CCR_V | 12387: (byte) (x & (y ^ z) ^ (y | z)) >> 7 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_subx_byte 12388: } else { //SUB.B Dq,<ea> 12389: XEiJ.mpuCycleCount++; 12390: y = XEiJ.regRn[XEiJ.regOC >> 9 & 7]; 12391: a = efaMltByte (ea); 12392: x = mmuModifyByteSignData (a, XEiJ.regSRS); 12393: z = x - y; 12394: mmuWriteByteData (a, z, XEiJ.regSRS); 12395: XEiJ.regCCR = (XEiJ.MPU_TSTB_TABLE[255 & z] | 12396: ((x ^ y) & (x ^ z)) >> 6 & XEiJ.REG_CCR_V | 12397: (byte) (x & (y ^ z) ^ (y | z)) >> 7 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_sub_byte 12398: } 12399: } //irpSubToMemByte 12400: 12401: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12402: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12403: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12404: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12405: //SUBX.W Dr,Dq |-|012346|-|*UUUU|*****| |1001_qqq_101_000_rrr 12406: //SUBX.W -(Ar),-(Aq) |-|012346|-|*UUUU|*****| |1001_qqq_101_001_rrr 12407: //SUB.W Dq,<ea> |-|012346|-|UUUUU|*****| M+-WXZ |1001_qqq_101_mmm_rrr 12408: public static void irpSubToMemWord () throws M68kException { 12409: int ea = XEiJ.regOC & 63; 12410: int a, x, y, z; 12411: if (ea < XEiJ.EA_MM) { 12412: if (ea < XEiJ.EA_AR) { //SUBX.W Dr,Dq 12413: int qqq = XEiJ.regOC >> 9 & 7; 12414: XEiJ.mpuCycleCount++; 12415: y = XEiJ.regRn[ea]; 12416: x = XEiJ.regRn[qqq]; 12417: z = x - y - (XEiJ.regCCR >> 4); //Xの左側はすべて0なのでCCR_X&を省略 12418: XEiJ.regRn[qqq] = ~65535 & x | (char) z; 12419: } else { //SUBX.W -(Ar),-(Aq) 12420: XEiJ.mpuCycleCount += 2; 12421: m60Incremented -= 2L << (ea << 3); 12422: a = m60Address = XEiJ.regRn[ea] -= 2; 12423: y = mmuReadWordSignData (a, XEiJ.regSRS); //このr[ea]はアドレスレジスタ 12424: int aqq = XEiJ.regOC >> 9 & 15; 12425: m60Incremented -= 2L << (aqq << 3); 12426: a = m60Address = XEiJ.regRn[aqq] -= 2; 12427: x = mmuModifyWordSignData (a, XEiJ.regSRS); 12428: z = x - y - (XEiJ.regCCR >> 4); //Xの左側はすべて0なのでCCR_X&を省略 12429: mmuWriteWordData (a, z, XEiJ.regSRS); 12430: } 12431: XEiJ.regCCR = (z >> 12 & XEiJ.REG_CCR_N | (char) z - 1 >> 14 & XEiJ.regCCR & XEiJ.REG_CCR_Z | //ADDXはZをクリアすることはあるがセットすることはない 12432: ((x ^ y) & (x ^ z)) >> 14 & XEiJ.REG_CCR_V | 12433: (short) (x & (y ^ z) ^ (y | z)) >> 15 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_subx_word 12434: } else { //SUB.W Dq,<ea> 12435: XEiJ.mpuCycleCount++; 12436: y = (short) XEiJ.regRn[XEiJ.regOC >> 9 & 7]; 12437: a = efaMltWord (ea); 12438: x = mmuModifyWordSignData (a, XEiJ.regSRS); 12439: z = x - y; 12440: mmuWriteWordData (a, z, XEiJ.regSRS); 12441: XEiJ.regCCR = (z >> 12 & XEiJ.REG_CCR_N | (char) z - 1 >> 14 & XEiJ.REG_CCR_Z | 12442: ((x ^ y) & (x ^ z)) >> 14 & XEiJ.REG_CCR_V | 12443: (short) (x & (y ^ z) ^ (y | z)) >> 15 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_sub_word 12444: } 12445: } //irpSubToMemWord 12446: 12447: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12448: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12449: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12450: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12451: //SUBX.L Dr,Dq |-|012346|-|*UUUU|*****| |1001_qqq_110_000_rrr 12452: //SUBX.L -(Ar),-(Aq) |-|012346|-|*UUUU|*****| |1001_qqq_110_001_rrr 12453: //SUB.L Dq,<ea> |-|012346|-|UUUUU|*****| M+-WXZ |1001_qqq_110_mmm_rrr 12454: public static void irpSubToMemLong () throws M68kException { 12455: int ea = XEiJ.regOC & 63; 12456: if (ea < XEiJ.EA_MM) { 12457: int x; 12458: int y; 12459: int z; 12460: if (ea < XEiJ.EA_AR) { //SUBX.L Dr,Dq 12461: int qqq = XEiJ.regOC >> 9 & 7; 12462: XEiJ.mpuCycleCount++; 12463: XEiJ.regRn[qqq] = z = (x = XEiJ.regRn[qqq]) - (y = XEiJ.regRn[ea]) - (XEiJ.regCCR >> 4); //Xの左側はすべて0なのでCCR_X&を省略 12464: } else { //SUBX.L -(Ar),-(Aq) 12465: XEiJ.mpuCycleCount += 2; 12466: m60Incremented -= 4L << (ea << 3); 12467: int a = m60Address = XEiJ.regRn[ea] -= 4; //このr[ea]はアドレスレジスタ 12468: y = mmuReadLongData (a, XEiJ.regSRS); 12469: int aqq = XEiJ.regOC >> 9 & 15; 12470: m60Incremented -= 4L << (aqq << 3); 12471: a = m60Address = XEiJ.regRn[aqq] -= 4; 12472: mmuWriteLongData (a, z = (x = mmuModifyLongData (a, XEiJ.regSRS)) - y - (XEiJ.regCCR >> 4), XEiJ.regSRS); //Xの左側はすべて0なのでCCR_X&を省略 12473: } 12474: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_Z : 0) | 12475: ((x ^ y) & (x ^ z)) >>> 31 << 1 | 12476: (x & (y ^ z) ^ (y | z)) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_subx 12477: } else { //SUB.L Dq,<ea> 12478: XEiJ.mpuCycleCount++; 12479: int a = efaMltLong (ea); 12480: int x; 12481: int y; 12482: int z; 12483: mmuWriteLongData (a, z = (x = mmuModifyLongData (a, XEiJ.regSRS)) - (y = XEiJ.regRn[XEiJ.regOC >> 9 & 7]), XEiJ.regSRS); 12484: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | 12485: ((x ^ y) & (x ^ z)) >>> 31 << 1 | 12486: (x & (y ^ z) ^ (y | z)) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_sub 12487: } 12488: } //irpSubToMemLong 12489: 12490: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12491: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12492: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12493: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12494: //SUBA.L <ea>,Aq |-|012346|-|-----|-----|DAM+-WXZPI|1001_qqq_111_mmm_rrr 12495: //SUB.L <ea>,Aq |A|012346|-|-----|-----|DAM+-WXZPI|1001_qqq_111_mmm_rrr [SUBA.L <ea>,Aq] 12496: //CLR.L Ar |A|012346|-|-----|-----| A |1001_rrr_111_001_rrr [SUBA.L Ar,Ar] 12497: public static void irpSubaLong () throws M68kException { 12498: int ea = XEiJ.regOC & 63; 12499: XEiJ.mpuCycleCount++; 12500: int z = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS) : mmuReadLongData (efaAnyLong (ea), XEiJ.regSRS); //このr[ea]はデータレジスタまたはアドレスレジスタ。pcls。イミディエイトを分離。ここでAqが変化する可能性があることに注意 12501: XEiJ.regRn[XEiJ.regOC >> 9 & 15] -= z; //r[op >> 9 & 15] -= ea < XEiJ.EA_MM ? r[ea] : rls (efaAnyLong (ea));は不可 12502: //ccrは変化しない 12503: } //irpSubaLong 12504: 12505: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12506: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12507: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12508: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12509: //SXCALL <name> |A|012346|-|UUUUU|*****| |1010_0dd_ddd_ddd_ddd [ALINE #<data>] 12510: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12511: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12512: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12513: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12514: //ALINE #<data> |-|012346|-|UUUUU|*****| |1010_ddd_ddd_ddd_ddd (line 1010 emulator) 12515: public static void irpAline () throws M68kException { 12516: irpExceptionFormat0 (M68kException.M6E_LINE_1010_EMULATOR << 2, XEiJ.regPC0); //pcは命令の先頭 12517: } //irpAline 12518: 12519: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12520: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12521: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12522: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12523: //CMP.B <ea>,Dq |-|012346|-|-UUUU|-****|D M+-WXZPI|1011_qqq_000_mmm_rrr 12524: public static void irpCmpByte () throws M68kException { 12525: XEiJ.mpuCycleCount++; 12526: int ea = XEiJ.regOC & 63; 12527: int x; 12528: int y; 12529: int z = (byte) ((x = (byte) XEiJ.regRn[XEiJ.regOC >> 9 & 7]) - (y = ea < XEiJ.EA_AR ? (byte) XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadByteSignExword ((XEiJ.regPC += 2) - 1, XEiJ.regSRS) : mmuReadByteSignData (efaAnyByte (ea), XEiJ.regSRS))); //pcbs。イミディエイトを分離 12530: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | 12531: ((x ^ y) & (x ^ z)) >>> 31 << 1 | 12532: (x & (y ^ z) ^ (y | z)) >>> 31); //ccr_cmp 12533: } //irpCmpByte 12534: 12535: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12536: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12537: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12538: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12539: //CMP.W <ea>,Dq |-|012346|-|-UUUU|-****|DAM+-WXZPI|1011_qqq_001_mmm_rrr 12540: public static void irpCmpWord () throws M68kException { 12541: XEiJ.mpuCycleCount++; 12542: int ea = XEiJ.regOC & 63; 12543: int x; 12544: int y; 12545: int z = (short) ((x = (short) XEiJ.regRn[XEiJ.regOC >> 9 & 7]) - (y = ea < XEiJ.EA_MM ? (short) XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) : mmuReadWordSignData (efaAnyWord (ea), XEiJ.regSRS))); //このr[ea]はデータレジスタまたはアドレスレジスタ。pcws。イミディエイトを分離 12546: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | 12547: ((x ^ y) & (x ^ z)) >>> 31 << 1 | 12548: (x & (y ^ z) ^ (y | z)) >>> 31); //ccr_cmp 12549: } //irpCmpWord 12550: 12551: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12552: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12553: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12554: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12555: //CMP.L <ea>,Dq |-|012346|-|-UUUU|-****|DAM+-WXZPI|1011_qqq_010_mmm_rrr 12556: public static void irpCmpLong () throws M68kException { 12557: XEiJ.mpuCycleCount++; 12558: int ea = XEiJ.regOC & 63; 12559: int x; 12560: int y; 12561: int z = (x = XEiJ.regRn[XEiJ.regOC >> 9 & 7]) - (y = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS) : mmuReadLongData (efaAnyLong (ea), XEiJ.regSRS)); //このr[ea]はデータレジスタまたはアドレスレジスタ。pcls。イミディエイトを分離 12562: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | 12563: ((x ^ y) & (x ^ z)) >>> 31 << 1 | 12564: (x & (y ^ z) ^ (y | z)) >>> 31); //ccr_cmp 12565: } //irpCmpLong 12566: 12567: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12568: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12569: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12570: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12571: //CMPA.W <ea>,Aq |-|012346|-|-UUUU|-****|DAM+-WXZPI|1011_qqq_011_mmm_rrr 12572: //CMP.W <ea>,Aq |A|012346|-|-UUUU|-****|DAM+-WXZPI|1011_qqq_011_mmm_rrr [CMPA.W <ea>,Aq] 12573: // 12574: //CMPA.W <ea>,Aq 12575: // ソースを符号拡張してロングで比較する 12576: public static void irpCmpaWord () throws M68kException { 12577: XEiJ.mpuCycleCount++; 12578: int ea = XEiJ.regOC & 63; 12579: //ソースを符号拡張してからロングで比較する 12580: int y = ea < XEiJ.EA_MM ? (short) XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) : mmuReadWordSignData (efaAnyWord (ea), XEiJ.regSRS); //このr[ea]はデータレジスタまたはアドレスレジスタ。pcws。イミディエイトを分離。ここでAqが変化する可能性があることに注意 12581: int x; 12582: int z = (x = XEiJ.regRn[XEiJ.regOC >> 9 & 15]) - y; 12583: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | 12584: ((x ^ y) & (x ^ z)) >>> 31 << 1 | 12585: (x & (y ^ z) ^ (y | z)) >>> 31); //ccr_cmp 12586: } //irpCmpaWord 12587: 12588: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12589: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12590: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12591: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12592: //EOR.B Dq,<ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |1011_qqq_100_mmm_rrr 12593: //CMPM.B (Ar)+,(Aq)+ |-|012346|-|-UUUU|-****| |1011_qqq_100_001_rrr 12594: public static void irpEorByte () throws M68kException { 12595: int ea = XEiJ.regOC & 63; 12596: if (ea >> 3 == XEiJ.MMM_AR) { //CMPM.B (Ar)+,(Aq)+ 12597: XEiJ.mpuCycleCount += 2; 12598: m60Incremented += 1L << (ea << 3); 12599: int a = m60Address = XEiJ.regRn[ea]++; //このr[ea]はアドレスレジスタ 12600: int y = mmuReadByteSignData (a, XEiJ.regSRS); 12601: int x; 12602: int aqq = XEiJ.regOC >> 9 & 15; 12603: m60Incremented += 1L << (aqq << 3); 12604: a = m60Address = XEiJ.regRn[aqq]++; 12605: int z = (byte) ((x = mmuReadByteSignData (a, XEiJ.regSRS)) - y); 12606: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | 12607: ((x ^ y) & (x ^ z)) >>> 31 << 1 | 12608: (x & (y ^ z) ^ (y | z)) >>> 31); //ccr_cmp 12609: } else { 12610: int qqq = XEiJ.regOC >> 9 & 7; 12611: int z; 12612: if (ea < XEiJ.EA_AR) { //EOR.B Dq,Dr 12613: XEiJ.mpuCycleCount++; 12614: z = XEiJ.regRn[ea] ^= 255 & XEiJ.regRn[qqq]; //0拡張してからEOR 12615: } else { //EOR.B Dq,<mem> 12616: XEiJ.mpuCycleCount++; 12617: int a = efaMltByte (ea); 12618: mmuWriteByteData (a, z = XEiJ.regRn[qqq] ^ mmuModifyByteSignData (a, XEiJ.regSRS), XEiJ.regSRS); 12619: } 12620: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & z]; //ccr_tst_byte 12621: } 12622: } //irpEorByte 12623: 12624: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12625: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12626: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12627: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12628: //EOR.W Dq,<ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |1011_qqq_101_mmm_rrr 12629: //CMPM.W (Ar)+,(Aq)+ |-|012346|-|-UUUU|-****| |1011_qqq_101_001_rrr 12630: public static void irpEorWord () throws M68kException { 12631: int ea = XEiJ.regOC & 63; 12632: int rrr = XEiJ.regOC & 7; 12633: int mmm = ea >> 3; 12634: if (mmm == XEiJ.MMM_AR) { //CMPM.W (Ar)+,(Aq)+ 12635: XEiJ.mpuCycleCount += 2; 12636: m60Incremented += 2L << (ea << 3); 12637: int a = m60Address = (XEiJ.regRn[ea] += 2) - 2; //このr[ea]はアドレスレジスタ 12638: int y = mmuReadWordSignData (a, XEiJ.regSRS); 12639: int x; 12640: int aqq = XEiJ.regOC >> 9 & 15; 12641: m60Incremented += 2L << (aqq << 3); 12642: a = m60Address = (XEiJ.regRn[aqq] += 2) - 2; 12643: int z = (short) ((x = mmuReadWordSignData (a, XEiJ.regSRS)) - y); 12644: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | 12645: ((x ^ y) & (x ^ z)) >>> 31 << 1 | 12646: (x & (y ^ z) ^ (y | z)) >>> 31); //ccr_cmp 12647: } else { 12648: int qqq = XEiJ.regOC >> 9 & 7; 12649: int z; 12650: if (ea < XEiJ.EA_AR) { //EOR.W Dq,Dr 12651: XEiJ.mpuCycleCount++; 12652: z = XEiJ.regRn[rrr] ^= (char) XEiJ.regRn[qqq]; //0拡張してからEOR 12653: } else { //EOR.W Dq,<mem> 12654: XEiJ.mpuCycleCount++; 12655: int a = efaMltWord (ea); 12656: mmuWriteWordData (a, z = XEiJ.regRn[qqq] ^ mmuModifyWordSignData (a, XEiJ.regSRS), XEiJ.regSRS); 12657: } 12658: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (char) z - 1 >> 31 & XEiJ.REG_CCR_Z | ((short) z < 0 ? XEiJ.REG_CCR_N : 0); //ccr_tst_word 12659: } 12660: } //irpEorWord 12661: 12662: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12663: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12664: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12665: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12666: //EOR.L Dq,<ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |1011_qqq_110_mmm_rrr 12667: //CMPM.L (Ar)+,(Aq)+ |-|012346|-|-UUUU|-****| |1011_qqq_110_001_rrr 12668: public static void irpEorLong () throws M68kException { 12669: int ea = XEiJ.regOC & 63; 12670: if (ea >> 3 == XEiJ.MMM_AR) { //CMPM.L (Ar)+,(Aq)+ 12671: XEiJ.mpuCycleCount += 2; 12672: m60Incremented += 4L << (ea << 3); 12673: int a = m60Address = (XEiJ.regRn[ea] += 4) - 4; //このr[ea]はアドレスレジスタ 12674: int y = mmuReadLongData (a, XEiJ.regSRS); 12675: int x; 12676: int aqq = XEiJ.regOC >> 9 & 15; 12677: m60Incremented += 4L << (aqq << 3); 12678: a = m60Address = (XEiJ.regRn[aqq] += 4) - 4; 12679: int z = (x = mmuReadLongData (a, XEiJ.regSRS)) - y; 12680: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | 12681: ((x ^ y) & (x ^ z)) >>> 31 << 1 | 12682: (x & (y ^ z) ^ (y | z)) >>> 31); //ccr_cmp 12683: } else { 12684: int qqq = XEiJ.regOC >> 9 & 7; 12685: int z; 12686: if (ea < XEiJ.EA_AR) { //EOR.L Dq,Dr 12687: XEiJ.mpuCycleCount++; 12688: XEiJ.regRn[ea] = z = XEiJ.regRn[ea] ^ XEiJ.regRn[qqq]; 12689: } else { //EOR.L Dq,<mem> 12690: XEiJ.mpuCycleCount++; 12691: int a = efaMltLong (ea); 12692: mmuWriteLongData (a, z = mmuModifyLongData (a, XEiJ.regSRS) ^ XEiJ.regRn[qqq], XEiJ.regSRS); 12693: } 12694: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 12695: } 12696: } //irpEorLong 12697: 12698: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12699: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12700: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12701: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12702: //CMPA.L <ea>,Aq |-|012346|-|-UUUU|-****|DAM+-WXZPI|1011_qqq_111_mmm_rrr 12703: //CMP.L <ea>,Aq |A|012346|-|-UUUU|-****|DAM+-WXZPI|1011_qqq_111_mmm_rrr [CMPA.L <ea>,Aq] 12704: public static void irpCmpaLong () throws M68kException { 12705: XEiJ.mpuCycleCount++; 12706: int ea = XEiJ.regOC & 63; 12707: int y = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS) : mmuReadLongData (efaAnyLong (ea), XEiJ.regSRS); //このr[ea]はデータレジスタまたはアドレスレジスタ。pcls。イミディエイトを分離。ここでAqが変化する可能性があることに注意 12708: int x; 12709: int z = (x = XEiJ.regRn[XEiJ.regOC >> 9 & 15]) - y; 12710: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | 12711: ((x ^ y) & (x ^ z)) >>> 31 << 1 | 12712: (x & (y ^ z) ^ (y | z)) >>> 31); //ccr_cmp 12713: } //irpCmpaLong 12714: 12715: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12716: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12717: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12718: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12719: //AND.B <ea>,Dq |-|012346|-|-UUUU|-**00|D M+-WXZPI|1100_qqq_000_mmm_rrr 12720: public static void irpAndToRegByte () throws M68kException { 12721: XEiJ.mpuCycleCount++; 12722: int ea = XEiJ.regOC & 63; 12723: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & (XEiJ.regRn[XEiJ.regOC >> 9 & 7] &= ~255 | (ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadByteSignExword ((XEiJ.regPC += 2) - 1, XEiJ.regSRS) : mmuReadByteSignData (efaAnyByte (ea), XEiJ.regSRS)))]; //ccr_tst_byte。pcbs。イミディエイトを分離。1拡張してからAND 12724: } //irpAndToRegByte 12725: 12726: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12727: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12728: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12729: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12730: //AND.W <ea>,Dq |-|012346|-|-UUUU|-**00|D M+-WXZPI|1100_qqq_001_mmm_rrr 12731: public static void irpAndToRegWord () throws M68kException { 12732: XEiJ.mpuCycleCount++; 12733: int ea = XEiJ.regOC & 63; 12734: int z = XEiJ.regRn[XEiJ.regOC >> 9 & 7] &= ~65535 | (ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) : mmuReadWordSignData (efaAnyWord (ea), XEiJ.regSRS)); //pcws。イミディエイトを分離。1拡張してからAND 12735: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (char) z - 1 >> 31 & XEiJ.REG_CCR_Z | ((short) z < 0 ? XEiJ.REG_CCR_N : 0); //ccr_tst_word 12736: } //irpAndToRegWord 12737: 12738: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12739: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12740: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12741: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12742: //AND.L <ea>,Dq |-|012346|-|-UUUU|-**00|D M+-WXZPI|1100_qqq_010_mmm_rrr 12743: public static void irpAndToRegLong () throws M68kException { 12744: XEiJ.mpuCycleCount++; 12745: int ea = XEiJ.regOC & 63; 12746: int z = XEiJ.regRn[XEiJ.regOC >> 9 & 7] &= ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS) : mmuReadLongData (efaAnyLong (ea), XEiJ.regSRS); //pcls。イミディエイトを分離 12747: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 12748: } //irpAndToRegLong 12749: 12750: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12751: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12752: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12753: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12754: //MULU.W <ea>,Dq |-|012346|-|-UUUU|-***0|D M+-WXZPI|1100_qqq_011_mmm_rrr 12755: public static void irpMuluWord () throws M68kException { 12756: XEiJ.mpuCycleCount += 2; 12757: int ea = XEiJ.regOC & 63; 12758: int qqq = XEiJ.regOC >> 9 & 7; 12759: int y = ea < XEiJ.EA_AR ? (char) XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) : mmuReadWordZeroData (efaAnyWord (ea), XEiJ.regSRS); //pcwz。イミディエイトを分離 12760: int z; 12761: XEiJ.regRn[qqq] = z = (char) XEiJ.regRn[qqq] * y; //積の下位32ビット。オーバーフローは無視 12762: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 12763: } //irpMuluWord 12764: 12765: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12766: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12767: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12768: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12769: //ABCD.B Dr,Dq |-|012346|-|UUUUU|*U*U*| |1100_qqq_100_000_rrr 12770: //ABCD.B -(Ar),-(Aq) |-|012346|-|UUUUU|*U*U*| |1100_qqq_100_001_rrr 12771: //AND.B Dq,<ea> |-|012346|-|-UUUU|-**00| M+-WXZ |1100_qqq_100_mmm_rrr 12772: public static void irpAndToMemByte () throws M68kException { 12773: int ea = XEiJ.regOC & 63; 12774: if (ea >= XEiJ.EA_MM) { //AND.B Dq,<ea> 12775: XEiJ.mpuCycleCount++; 12776: int a = efaMltByte (ea); 12777: int z = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & mmuModifyByteSignData (a, XEiJ.regSRS); 12778: mmuWriteByteData (a, z, XEiJ.regSRS); 12779: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & z]; //ccr_tst_byte 12780: } else if (ea < XEiJ.EA_AR) { //ABCD.B Dr,Dq 12781: int qqq = XEiJ.regOC >> 9 & 7; 12782: XEiJ.mpuCycleCount++; 12783: XEiJ.regRn[qqq] = ~0xff & XEiJ.regRn[qqq] | irpAbcd (XEiJ.regRn[qqq], XEiJ.regRn[ea]); 12784: } else { //ABCD.B -(Ar),-(Aq) 12785: XEiJ.mpuCycleCount += 2; 12786: m60Incremented -= 1L << (ea << 3); 12787: int a = m60Address = --XEiJ.regRn[ea]; //このr[ea]はアドレスレジスタ 12788: int y = mmuReadByteZeroData (a, XEiJ.regSRS); 12789: int aqq = (XEiJ.regOC >> 9) - (96 - 8); 12790: m60Incremented -= 1L << (aqq << 3); 12791: a = m60Address = --XEiJ.regRn[aqq]; 12792: mmuWriteByteData (a, irpAbcd (mmuModifyByteZeroData (a, XEiJ.regSRS), y), XEiJ.regSRS); 12793: } 12794: } //irpAndToMemByte 12795: 12796: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12797: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12798: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12799: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12800: //EXG.L Dq,Dr |-|012346|-|-----|-----| |1100_qqq_101_000_rrr 12801: //EXG.L Aq,Ar |-|012346|-|-----|-----| |1100_qqq_101_001_rrr 12802: //AND.W Dq,<ea> |-|012346|-|-UUUU|-**00| M+-WXZ |1100_qqq_101_mmm_rrr 12803: public static void irpAndToMemWord () throws M68kException { 12804: int ea = XEiJ.regOC & 63; 12805: if (ea < XEiJ.EA_MM) { //EXG 12806: XEiJ.mpuCycleCount++; 12807: if (ea < XEiJ.EA_AR) { //EXG.L Dq,Dr 12808: int qqq = XEiJ.regOC >> 9 & 7; 12809: int t = XEiJ.regRn[qqq]; 12810: XEiJ.regRn[qqq] = XEiJ.regRn[ea]; 12811: XEiJ.regRn[ea] = t; 12812: } else { //EXG.L Aq,Ar 12813: int aqq = (XEiJ.regOC >> 9) - (96 - 8); 12814: int t = XEiJ.regRn[aqq]; 12815: XEiJ.regRn[aqq] = XEiJ.regRn[ea]; //このr[ea]アドレスレジスタ 12816: XEiJ.regRn[ea] = t; //このr[ea]はアドレスレジスタ 12817: } 12818: } else { //AND.W Dq,<ea> 12819: XEiJ.mpuCycleCount++; 12820: int a = efaMltWord (ea); 12821: int z = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & mmuModifyWordSignData (a, XEiJ.regSRS); 12822: mmuWriteWordData (a, z, XEiJ.regSRS); 12823: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (char) z - 1 >> 31 & XEiJ.REG_CCR_Z | ((short) z < 0 ? XEiJ.REG_CCR_N : 0); //ccr_tst_word 12824: } 12825: } //irpAndToMemWord 12826: 12827: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12828: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12829: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12830: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12831: //EXG.L Dq,Ar |-|012346|-|-----|-----| |1100_qqq_110_001_rrr 12832: //AND.L Dq,<ea> |-|012346|-|-UUUU|-**00| M+-WXZ |1100_qqq_110_mmm_rrr 12833: public static void irpAndToMemLong () throws M68kException { 12834: int ea = XEiJ.regOC & 63; 12835: int qqq = XEiJ.regOC >> 9 & 7; 12836: if (ea >> 3 == XEiJ.MMM_AR) { //EXG.L Dq,Ar 12837: XEiJ.mpuCycleCount++; 12838: int t = XEiJ.regRn[qqq]; 12839: XEiJ.regRn[qqq] = XEiJ.regRn[ea]; //このr[ea]はアドレスレジスタ 12840: XEiJ.regRn[ea] = t; //このr[ea]はアドレスレジスタ 12841: } else { //AND.L Dq,<ea> 12842: XEiJ.mpuCycleCount++; 12843: int a = efaMltLong (ea); 12844: int z; 12845: mmuWriteLongData (a, z = mmuModifyLongData (a, XEiJ.regSRS) & XEiJ.regRn[qqq], XEiJ.regSRS); 12846: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 12847: } 12848: } //irpAndToMemLong 12849: 12850: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12851: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12852: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12853: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12854: //MULS.W <ea>,Dq |-|012346|-|-UUUU|-***0|D M+-WXZPI|1100_qqq_111_mmm_rrr 12855: public static void irpMulsWord () throws M68kException { 12856: XEiJ.mpuCycleCount += 2; 12857: int ea = XEiJ.regOC & 63; 12858: int qqq = XEiJ.regOC >> 9 & 7; 12859: int y = ea < XEiJ.EA_AR ? (short) XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) : mmuReadWordSignData (efaAnyWord (ea), XEiJ.regSRS); //pcws。イミディエイトを分離 12860: int z; 12861: XEiJ.regRn[qqq] = z = (short) XEiJ.regRn[qqq] * y; //積の下位32ビット。オーバーフローは無視 12862: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 12863: } //irpMulsWord 12864: 12865: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12866: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12867: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12868: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12869: //ADD.B <ea>,Dq |-|012346|-|UUUUU|*****|D M+-WXZPI|1101_qqq_000_mmm_rrr 12870: public static void irpAddToRegByte () throws M68kException { 12871: XEiJ.mpuCycleCount++; 12872: int ea = XEiJ.regOC & 63; 12873: int qqq = XEiJ.regOC >> 9 & 7; 12874: int x, y, z; 12875: y = ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadByteSignExword ((XEiJ.regPC += 2) - 1, XEiJ.regSRS) : mmuReadByteSignData (efaAnyByte (ea), XEiJ.regSRS); //pcbs。イミディエイトを分離 12876: x = XEiJ.regRn[qqq]; 12877: z = x + y; 12878: XEiJ.regRn[qqq] = ~255 & x | 255 & z; 12879: XEiJ.regCCR = (XEiJ.MPU_TSTB_TABLE[255 & z] | 12880: ((x ^ z) & (y ^ z)) >> 6 & XEiJ.REG_CCR_V | 12881: (byte) ((x | y) ^ (x ^ y) & z) >> 7 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_add_byte 12882: } //irpAddToRegByte 12883: 12884: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12885: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12886: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12887: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12888: //ADD.W <ea>,Dq |-|012346|-|UUUUU|*****|DAM+-WXZPI|1101_qqq_001_mmm_rrr 12889: public static void irpAddToRegWord () throws M68kException { 12890: XEiJ.mpuCycleCount++; 12891: int ea = XEiJ.regOC & 63; 12892: int qqq = XEiJ.regOC >> 9 & 7; 12893: int x, y, z; 12894: y = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) : mmuReadWordSignData (efaAnyWord (ea), XEiJ.regSRS); //このr[ea]はデータレジスタまたはアドレスレジスタ。pcws。イミディエイトを分離 12895: x = XEiJ.regRn[qqq]; 12896: z = x + y; 12897: XEiJ.regRn[qqq] = ~65535 & x | (char) z; 12898: XEiJ.regCCR = (z >> 12 & XEiJ.REG_CCR_N | (char) z - 1 >> 14 & XEiJ.REG_CCR_Z | 12899: ((x ^ z) & (y ^ z)) >> 14 & XEiJ.REG_CCR_V | 12900: (short) ((x | y) ^ (x ^ y) & z) >> 15 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_add_word 12901: } //irpAddToRegWord 12902: 12903: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12904: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12905: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12906: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12907: //ADD.L <ea>,Dq |-|012346|-|UUUUU|*****|DAM+-WXZPI|1101_qqq_010_mmm_rrr 12908: public static void irpAddToRegLong () throws M68kException { 12909: XEiJ.mpuCycleCount++; 12910: int ea = XEiJ.regOC & 63; 12911: int qqq = XEiJ.regOC >> 9 & 7; 12912: int x, y, z; 12913: y = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS) : mmuReadLongData (efaAnyLong (ea), XEiJ.regSRS); //このr[ea]はデータレジスタまたはアドレスレジスタ。pcls。イミディエイトを分離 12914: x = XEiJ.regRn[qqq]; 12915: z = x + y; 12916: XEiJ.regRn[qqq] = z; 12917: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | 12918: ((x ^ z) & (y ^ z)) >> 30 & XEiJ.REG_CCR_V | 12919: ((x | y) ^ (x ^ y) & z) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_add 12920: } //irpAddToRegLong 12921: 12922: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12923: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12924: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12925: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12926: //ADDA.W <ea>,Aq |-|012346|-|-----|-----|DAM+-WXZPI|1101_qqq_011_mmm_rrr 12927: //ADD.W <ea>,Aq |A|012346|-|-----|-----|DAM+-WXZPI|1101_qqq_011_mmm_rrr [ADDA.W <ea>,Aq] 12928: // 12929: //ADDA.W <ea>,Aq 12930: // ソースを符号拡張してロングで加算する 12931: public static void irpAddaWord () throws M68kException { 12932: XEiJ.mpuCycleCount++; 12933: int ea = XEiJ.regOC & 63; 12934: int z = ea < XEiJ.EA_MM ? (short) XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) : mmuReadWordSignData (efaAnyWord (ea), XEiJ.regSRS); //このr[ea]はデータレジスタまたはアドレスレジスタ。pcws。イミディエイトを分離。ここでAqが変化する可能性があることに注意 12935: XEiJ.regRn[XEiJ.regOC >> 9 & 15] += z; //r[op >> 9 & 15] += ea < XEiJ.EA_MM ? (short) r[ea] : rws (efaAnyWord (ea));は不可 12936: //ccrは変化しない 12937: } //irpAddaWord 12938: 12939: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12940: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12941: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12942: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12943: //ADDX.B Dr,Dq |-|012346|-|*UUUU|*****| |1101_qqq_100_000_rrr 12944: //ADDX.B -(Ar),-(Aq) |-|012346|-|*UUUU|*****| |1101_qqq_100_001_rrr 12945: //ADD.B Dq,<ea> |-|012346|-|UUUUU|*****| M+-WXZ |1101_qqq_100_mmm_rrr 12946: public static void irpAddToMemByte () throws M68kException { 12947: int ea = XEiJ.regOC & 63; 12948: int a, x, y, z; 12949: if (ea < XEiJ.EA_MM) { 12950: if (ea < XEiJ.EA_AR) { //ADDX.B Dr,Dq 12951: int qqq = XEiJ.regOC >> 9 & 7; 12952: XEiJ.mpuCycleCount++; 12953: y = XEiJ.regRn[ea]; 12954: x = XEiJ.regRn[qqq]; 12955: z = x + y + (XEiJ.regCCR >> 4); //Xの左側はすべて0なのでCCR_X&を省略 12956: XEiJ.regRn[qqq] = ~255 & x | 255 & z; 12957: } else { //ADDX.B -(Ar),-(Aq) 12958: XEiJ.mpuCycleCount += 2; 12959: m60Incremented -= 1L << (ea << 3); 12960: a = m60Address = --XEiJ.regRn[ea]; //このr[ea]はアドレスレジスタ 12961: y = mmuReadByteSignData (a, XEiJ.regSRS); 12962: int aqq = XEiJ.regOC >> 9 & 15; //1qqq=aqq 12963: m60Incremented -= 1L << (aqq << 3); 12964: a = m60Address = --XEiJ.regRn[aqq]; 12965: x = mmuModifyByteSignData (a, XEiJ.regSRS); 12966: z = x + y + (XEiJ.regCCR >> 4); //Xの左側はすべて0なのでCCR_X&を省略 12967: mmuWriteByteData (a, z, XEiJ.regSRS); 12968: } 12969: XEiJ.regCCR = (z >> 4 & XEiJ.REG_CCR_N | (255 & z) - 1 >> 6 & XEiJ.regCCR & XEiJ.REG_CCR_Z | //ADDXはZをクリアすることはあるがセットすることはない 12970: ((x ^ z) & (y ^ z)) >> 6 & XEiJ.REG_CCR_V | 12971: (byte) ((x | y) ^ (x ^ y) & z) >> 7 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_addx_byte 12972: } else { //ADD.B Dq,<ea> 12973: XEiJ.mpuCycleCount++; 12974: y = XEiJ.regRn[XEiJ.regOC >> 9 & 7]; 12975: a = efaMltByte (ea); 12976: x = mmuModifyByteSignData (a, XEiJ.regSRS); 12977: z = x + y; 12978: mmuWriteByteData (a, z, XEiJ.regSRS); 12979: XEiJ.regCCR = (XEiJ.MPU_TSTB_TABLE[255 & z] | 12980: ((x ^ z) & (y ^ z)) >> 6 & XEiJ.REG_CCR_V | 12981: (byte) ((x | y) ^ (x ^ y) & z) >> 7 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_add_byte 12982: } 12983: } //irpAddToMemByte 12984: 12985: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12986: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12987: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12988: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12989: //ADDX.W Dr,Dq |-|012346|-|*UUUU|*****| |1101_qqq_101_000_rrr 12990: //ADDX.W -(Ar),-(Aq) |-|012346|-|*UUUU|*****| |1101_qqq_101_001_rrr 12991: //ADD.W Dq,<ea> |-|012346|-|UUUUU|*****| M+-WXZ |1101_qqq_101_mmm_rrr 12992: public static void irpAddToMemWord () throws M68kException { 12993: int ea = XEiJ.regOC & 63; 12994: int a, x, y, z; 12995: if (ea < XEiJ.EA_MM) { 12996: if (ea < XEiJ.EA_AR) { //ADDX.W Dr,Dq 12997: int qqq = XEiJ.regOC >> 9 & 7; 12998: XEiJ.mpuCycleCount++; 12999: y = XEiJ.regRn[ea]; 13000: x = XEiJ.regRn[qqq]; 13001: z = x + y + (XEiJ.regCCR >> 4); //Xの左側はすべて0なのでCCR_X&を省略 13002: XEiJ.regRn[qqq] = ~65535 & x | (char) z; 13003: } else { //ADDX.W -(Ar),-(Aq) 13004: XEiJ.mpuCycleCount += 2; 13005: m60Incremented -= 2L << (ea << 3); 13006: a = m60Address = XEiJ.regRn[ea] -= 2; //このr[ea]はアドレスレジスタ 13007: y = mmuReadWordSignData (a, XEiJ.regSRS); 13008: int aqq = XEiJ.regOC >> 9 & 15; 13009: m60Incremented -= 2L << (aqq << 3); 13010: a = m60Address = XEiJ.regRn[aqq] -= 2; 13011: x = mmuModifyWordSignData (a, XEiJ.regSRS); 13012: z = x + y + (XEiJ.regCCR >> 4); //Xの左側はすべて0なのでCCR_X&を省略 13013: mmuWriteWordData (a, z, XEiJ.regSRS); 13014: } 13015: XEiJ.regCCR = (z >> 12 & XEiJ.REG_CCR_N | (char) z - 1 >> 14 & XEiJ.regCCR & XEiJ.REG_CCR_Z | //ADDXはZをクリアすることはあるがセットすることはない 13016: ((x ^ z) & (y ^ z)) >> 14 & XEiJ.REG_CCR_V | 13017: (short) ((x | y) ^ (x ^ y) & z) >> 15 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_addx_word 13018: } else { //ADD.W Dq,<ea> 13019: XEiJ.mpuCycleCount++; 13020: a = efaMltWord (ea); 13021: y = XEiJ.regRn[XEiJ.regOC >> 9 & 7]; 13022: x = mmuModifyWordSignData (a, XEiJ.regSRS); 13023: z = x + y; 13024: mmuWriteWordData (a, z, XEiJ.regSRS); 13025: XEiJ.regCCR = (z >> 12 & XEiJ.REG_CCR_N | (char) z - 1 >> 14 & XEiJ.REG_CCR_Z | 13026: ((x ^ z) & (y ^ z)) >> 14 & XEiJ.REG_CCR_V | 13027: (short) ((x | y) ^ (x ^ y) & z) >> 15 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_add_word 13028: } 13029: } //irpAddToMemWord 13030: 13031: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 13032: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 13033: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 13034: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 13035: //ADDX.L Dr,Dq |-|012346|-|*UUUU|*****| |1101_qqq_110_000_rrr 13036: //ADDX.L -(Ar),-(Aq) |-|012346|-|*UUUU|*****| |1101_qqq_110_001_rrr 13037: //ADD.L Dq,<ea> |-|012346|-|UUUUU|*****| M+-WXZ |1101_qqq_110_mmm_rrr 13038: public static void irpAddToMemLong () throws M68kException { 13039: int ea = XEiJ.regOC & 63; 13040: if (ea < XEiJ.EA_MM) { 13041: int x; 13042: int y; 13043: int z; 13044: if (ea < XEiJ.EA_AR) { //ADDX.L Dr,Dq 13045: int qqq = XEiJ.regOC >> 9 & 7; 13046: XEiJ.mpuCycleCount++; 13047: XEiJ.regRn[qqq] = z = (x = XEiJ.regRn[qqq]) + (y = XEiJ.regRn[ea]) + (XEiJ.regCCR >> 4); //Xの左側はすべて0なのでCCR_X&を省略 13048: } else { //ADDX.L -(Ar),-(Aq) 13049: XEiJ.mpuCycleCount += 2; 13050: m60Incremented -= 4L << (ea << 3); 13051: int a = m60Address = XEiJ.regRn[ea] -= 4; //このr[ea]はアドレスレジスタ 13052: y = mmuReadLongData (a, XEiJ.regSRS); 13053: int aqq = XEiJ.regOC >> 9 & 15; 13054: m60Incremented -= 4L << (aqq << 3); 13055: a = m60Address = XEiJ.regRn[aqq] -= 4; 13056: mmuWriteLongData (a, z = (x = mmuModifyLongData (a, XEiJ.regSRS)) + y + (XEiJ.regCCR >> 4), XEiJ.regSRS); //Xの左側はすべて0なのでCCR_X&を省略 13057: } 13058: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_Z : 0) | 13059: ((x ^ z) & (y ^ z)) >>> 31 << 1 | 13060: ((x | y) ^ (x ^ y) & z) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_addx 13061: } else { //ADD.L Dq,<ea> 13062: XEiJ.mpuCycleCount++; 13063: int a = efaMltLong (ea); 13064: int x; 13065: int y; 13066: int z; 13067: mmuWriteLongData (a, z = (x = mmuModifyLongData (a, XEiJ.regSRS)) + (y = XEiJ.regRn[XEiJ.regOC >> 9 & 7]), XEiJ.regSRS); 13068: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | 13069: ((x ^ z) & (y ^ z)) >>> 31 << 1 | 13070: ((x | y) ^ (x ^ y) & z) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_add 13071: } 13072: } //irpAddToMemLong 13073: 13074: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 13075: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 13076: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 13077: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 13078: //ADDA.L <ea>,Aq |-|012346|-|-----|-----|DAM+-WXZPI|1101_qqq_111_mmm_rrr 13079: //ADD.L <ea>,Aq |A|012346|-|-----|-----|DAM+-WXZPI|1101_qqq_111_mmm_rrr [ADDA.L <ea>,Aq] 13080: public static void irpAddaLong () throws M68kException { 13081: int ea = XEiJ.regOC & 63; 13082: XEiJ.mpuCycleCount++; 13083: int z = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS) : mmuReadLongData (efaAnyLong (ea), XEiJ.regSRS); //このr[ea]はデータレジスタまたはアドレスレジスタ。pcls。イミディエイトを分離。ここでAqが変化する可能性があることに注意 13084: XEiJ.regRn[XEiJ.regOC >> 9 & 15] += z; //r[op >> 9 & 15] += ea < XEiJ.EA_MM ? r[ea] : rls (efaAnyLong (ea));は不可 13085: //ccrは変化しない 13086: } //irpAddaLong 13087: 13088: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 13089: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 13090: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 13091: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 13092: //ASR.B #<data>,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_000_000_rrr 13093: //LSR.B #<data>,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_000_001_rrr 13094: //ROXR.B #<data>,Dr |-|012346|-|*UUUU|***0*| |1110_qqq_000_010_rrr 13095: //ROR.B #<data>,Dr |-|012346|-|-UUUU|-**0*| |1110_qqq_000_011_rrr 13096: //ASR.B Dq,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_000_100_rrr 13097: //LSR.B Dq,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_000_101_rrr 13098: //ROXR.B Dq,Dr |-|012346|-|*UUUU|***0*| |1110_qqq_000_110_rrr 13099: //ROR.B Dq,Dr |-|012346|-|-UUUU|-**0*| |1110_qqq_000_111_rrr 13100: //ASR.B Dr |A|012346|-|UUUUU|***0*| |1110_001_000_000_rrr [ASR.B #1,Dr] 13101: //LSR.B Dr |A|012346|-|UUUUU|***0*| |1110_001_000_001_rrr [LSR.B #1,Dr] 13102: //ROXR.B Dr |A|012346|-|*UUUU|***0*| |1110_001_000_010_rrr [ROXR.B #1,Dr] 13103: //ROR.B Dr |A|012346|-|-UUUU|-**0*| |1110_001_000_011_rrr [ROR.B #1,Dr] 13104: // 13105: //ASR.B #<data>,Dr 13106: //ASR.B Dq,Dr 13107: // 算術右シフトバイト 13108: // ........................ｱｲｳｴｵｶｷｸ XNZVC 13109: // 0 ........................ｱｲｳｴｵｶｷｸ Xｱ*00 Z=ｱｲｳｴｵｶｷｸ==0 13110: // 1 ........................ｱｱｲｳｴｵｶｷ ｸｱ*0ｸ Z=ｱｲｳｴｵｶｷ==0 13111: // 2 ........................ｱｱｱｲｳｴｵｶ ｷｱ*0ｷ Z=ｱｲｳｴｵｶ==0 13112: // 3 ........................ｱｱｱｱｲｳｴｵ ｶｱ*0ｶ Z=ｱｲｳｴｵ==0 13113: // 4 ........................ｱｱｱｱｱｲｳｴ ｵｱ*0ｵ Z=ｱｲｳｴ==0 13114: // 5 ........................ｱｱｱｱｱｱｲｳ ｴｱ*0ｴ Z=ｱｲｳ==0 13115: // 6 ........................ｱｱｱｱｱｱｱｲ ｳｱ*0ｳ Z=ｱｲ==0 13116: // 7 ........................ｱｱｱｱｱｱｱｱ ｲｱ*0ｲ Z=ｱ==0 13117: // 8 ........................ｱｱｱｱｱｱｱｱ ｱｱ*0ｱ Z=ｱ==0 13118: // CCR 13119: // X countが0のとき変化しない。他は最後に押し出されたビット 13120: // N 結果の最上位ビット 13121: // Z 結果が0のときセット。他はクリア 13122: // V 常にクリア 13123: // C countが0のときクリア。他は最後に押し出されたビット 13124: // 13125: //LSR.B #<data>,Dr 13126: //LSR.B Dq,Dr 13127: // 論理右シフトバイト 13128: // ........................ｱｲｳｴｵｶｷｸ XNZVC 13129: // 0 ........................ｱｲｳｴｵｶｷｸ Xｱ*00 Z=ｱｲｳｴｵｶｷｸ==0 13130: // 1 ........................0ｱｲｳｴｵｶｷ ｸ0*0ｸ Z=ｱｲｳｴｵｶｷ==0 13131: // 2 ........................00ｱｲｳｴｵｶ ｷ0*0ｷ Z=ｱｲｳｴｵｶ==0 13132: // 3 ........................000ｱｲｳｴｵ ｶ0*0ｶ Z=ｱｲｳｴｵ==0 13133: // 4 ........................0000ｱｲｳｴ ｵ0*0ｵ Z=ｱｲｳｴ==0 13134: // 5 ........................00000ｱｲｳ ｴ0*0ｴ Z=ｱｲｳ==0 13135: // 6 ........................000000ｱｲ ｳ0*0ｳ Z=ｱｲ==0 13136: // 7 ........................0000000ｱ ｲ0*0ｲ Z=ｱ==0 13137: // 8 ........................00000000 ｱ010ｱ 13138: // 9 ........................00000000 00100 13139: // CCR 13140: // X countが0のとき変化しない。他は最後に押し出されたビット 13141: // N 結果の最上位ビット 13142: // Z 結果が0のときセット。他はクリア 13143: // V 常にクリア 13144: // C countが0のときクリア。他は最後に押し出されたビット 13145: // 13146: //ROR.B #<data>,Dr 13147: //ROR.B Dq,Dr 13148: // 右ローテートバイト 13149: // ........................ｱｲｳｴｵｶｷｸ XNZVC 13150: // 0 ........................ｱｲｳｴｵｶｷｸ Xｱ*00 Z=ｱｲｳｴｵｶｷｸ==0 13151: // 1 ........................ｸｱｲｳｴｵｶｷ Xｸ*0ｸ Z=ｱｲｳｴｵｶｷｸ==0 13152: // : 13153: // 7 ........................ｲｳｴｵｶｷｸｱ Xｲ*0ｲ Z=ｱｲｳｴｵｶｷｸ==0 13154: // 8 ........................ｱｲｳｴｵｶｷｸ Xｱ*0ｱ Z=ｱｲｳｴｵｶｷｸ==0 13155: // CCR 13156: // X 常に変化しない 13157: // N 結果の最上位ビット 13158: // Z 結果が0のときセット。他はクリア 13159: // V 常にクリア 13160: // C countが0のときクリア。他は結果の最上位ビット 13161: // 13162: //ROXR.B #<data>,Dr 13163: //ROXR.B Dq,Dr 13164: // 拡張右ローテートバイト 13165: // ........................ｱｲｳｴｵｶｷｸ XNZVC 13166: // 0 ........................ｱｲｳｴｵｶｷｸ Xｱ*0X Z=ｱｲｳｴｵｶｷｸ==0 13167: // 1 ........................Xｱｲｳｴｵｶｷ ｸX*0ｸ Z=ｱｲｳｴｵｶｷX==0 13168: // 2 ........................ｸXｱｲｳｴｵｶ ｷｸ*0ｷ Z=ｱｲｳｴｵｶｸX==0 13169: // 3 ........................ｷｸXｱｲｳｴｵ ｶｷ*0ｶ Z=ｱｲｳｴｵｷｸX==0 13170: // 4 ........................ｶｷｸXｱｲｳｴ ｵｶ*0ｵ Z=ｱｲｳｴｶｷｸX==0 13171: // 5 ........................ｵｶｷｸXｱｲｳ ｴｵ*0ｴ Z=ｱｲｳｵｶｷｸX==0 13172: // 6 ........................ｴｵｶｷｸXｱｲ ｳｴ*0ｳ Z=ｱｲｴｵｶｷｸX==0 13173: // 7 ........................ｳｴｵｶｷｸXｱ ｲｳ*0ｲ Z=ｱｳｴｵｶｷｸX==0 13174: // 8 ........................ｲｳｴｵｶｷｸX ｱｲ*0ｱ Z=ｲｳｴｵｶｷｸX==0 13175: // 9 ........................ｱｲｳｴｵｶｷｸ Xｱ*0X Z=ｱｲｳｴｵｶｷｸ==0 13176: // CCR 13177: // X countが0のとき変化しない。他は最後に押し出されたビット 13178: // N 結果の最上位ビット 13179: // Z 結果が0のときセット。他はクリア 13180: // V 常にクリア 13181: // C countが0のときXのコピー。他は最後に押し出されたビット 13182: public static void irpXxrToRegByte () throws M68kException { 13183: int rrr; 13184: int x = XEiJ.regRn[rrr = XEiJ.regOC & 7]; 13185: int y; 13186: int z; 13187: int t; 13188: XEiJ.mpuCycleCount++; 13189: switch (XEiJ.regOC >> 3 & 0b111_000 >> 3) { 13190: case 0b000_000 >> 3: //ASR.B #<data>,Dr 13191: y = (XEiJ.regOC >> 9) - 1 & 7; //y=data-1=1-1～8-1 13192: XEiJ.regRn[rrr] = ~0xff & x | 0xff & (z = (t = (byte) x >> y) >> 1); 13193: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | -(t & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //XとCは最後に押し出されたビット 13194: break; 13195: case 0b001_000 >> 3: //LSR.B #<data>,Dr 13196: y = (XEiJ.regOC >> 9) - 1 & 7; //y=data-1=1-1～8-1 13197: XEiJ.regRn[rrr] = ~0xff & x | (z = (t = (0xff & x) >>> y) >>> 1); 13198: XEiJ.regCCR = (z == 0 ? XEiJ.REG_CCR_Z : 0) | -(t & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //XとCは最後に押し出されたビット 13199: break; 13200: case 0b010_000 >> 3: //ROXR.B #<data>,Dr 13201: y = (XEiJ.regOC >> 9) - 1 & 7; //y=data-1=1-1～8-1 13202: z = (XEiJ.regCCR & XEiJ.REG_CCR_X) << 7 - 4 | (0xff & x) >>> 1; 13203: if (y == 1 - 1) { //y=data-1=1-1 13204: t = x; 13205: } else { //y=data-1=2-1～8-1 13206: z = x << 9 - 1 - y | (t = z >>> y - (2 - 1)) >>> 1; 13207: } 13208: XEiJ.regRn[rrr] = ~0xff & x | 0xff & (z = (byte) z); 13209: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | -(t & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //XとCは最後に押し出されたビット 13210: break; 13211: case 0b011_000 >> 3: //ROR.B #<data>,Dr 13212: y = XEiJ.regOC >> 9 & 7; //y=data&7 13213: XEiJ.regRn[rrr] = ~0xff & x | 0xff & (z = (byte) (x << 8 - y | (0xff & x) >>> y)); 13214: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | z >>> 7 & 1; //Xは変化しない。Cは結果の最上位ビット 13215: break; 13216: case 0b100_000 >> 3: //ASR.B Dq,Dr 13217: y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63; //y=0～63。Javaのシフト演算子は5ビットでマスクされることに注意 13218: if (y == 0) { //y=data=0 13219: z = (byte) x; 13220: t = XEiJ.regCCR & XEiJ.REG_CCR_X; //Xは変化しない。Cはクリア 13221: } else { //y=data=1～63 13222: XEiJ.regRn[rrr] = ~0xff & x | 0xff & (z = (t = (byte) x >> (y <= 8 ? y - 1 : 7)) >> 1); 13223: t = -(t & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //XとCは最後に押し出されたビット 13224: } 13225: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | t; 13226: break; 13227: case 0b101_000 >> 3: //LSR.B Dq,Dr 13228: y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63; //y=0～63。Javaのシフト演算子は5ビットでマスクされることに注意 13229: if (y == 0) { //y=data=0 13230: z = (byte) x; 13231: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (z < 0 ? XEiJ.REG_CCR_N : z == 0 ? XEiJ.REG_CCR_Z : 0); //Xは変化しない。Cはクリア 13232: } else { //y=data=1～63 13233: XEiJ.regRn[rrr] = ~0xff & x | (z = (t = y <= 8 ? (0xff & x) >>> y - 1 : 0) >>> 1); 13234: XEiJ.regCCR = (z == 0 ? XEiJ.REG_CCR_Z : 0) | -(t & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //XとCは最後に押し出されたビット 13235: } 13236: break; 13237: case 0b110_000 >> 3: //ROXR.B Dq,Dr 13238: y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63; //y=0～63。Javaのシフト演算子は5ビットでマスクされることに注意 13239: //y %= 9; 13240: y = (y & 7) - (y >> 3); //y=data=-7～7 13241: y += y >> 3 & 9; //y=data=0～8 13242: if (y == 0) { //y=data=0 13243: z = (byte) x; 13244: t = -(XEiJ.regCCR >> 4 & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //Xは変化しない。CはXのコピー 13245: } else { //y=data=1～8 13246: z = (XEiJ.regCCR & XEiJ.REG_CCR_X) << 7 - 4 | (0xff & x) >>> 1; 13247: if (y == 1) { //y=data=1 13248: t = x; //Cは最後に押し出されたビット 13249: } else { //y=data=2～8 13250: z = x << 9 - y | (t = z >>> y - 2) >>> 1; 13251: } 13252: XEiJ.regRn[rrr] = ~0xff & x | 0xff & (z = (byte) z); 13253: t = -(t & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //XとCは最後に押し出されたビット 13254: } 13255: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | t; 13256: break; 13257: case 0b111_000 >> 3: //ROR.B Dq,Dr 13258: default: 13259: y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63; //y=0～63。Javaのシフト演算子は5ビットでマスクされることに注意 13260: if (y == 0) { 13261: z = (byte) x; 13262: t = 0; //Cはクリア 13263: } else { 13264: y &= 7; //y=data=0～7 13265: XEiJ.regRn[rrr] = ~0xff & x | 0xff & (z = (byte) (x << 8 - y | (0xff & x) >>> y)); 13266: t = z >>> 7 & 1; //Cは結果の最上位ビット 13267: } 13268: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | t; //Xは変化しない 13269: } 13270: } //irpXxrToRegByte 13271: 13272: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 13273: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 13274: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 13275: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 13276: //ASR.W #<data>,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_001_000_rrr 13277: //LSR.W #<data>,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_001_001_rrr 13278: //ROXR.W #<data>,Dr |-|012346|-|*UUUU|***0*| |1110_qqq_001_010_rrr 13279: //ROR.W #<data>,Dr |-|012346|-|-UUUU|-**0*| |1110_qqq_001_011_rrr 13280: //ASR.W Dq,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_001_100_rrr 13281: //LSR.W Dq,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_001_101_rrr 13282: //ROXR.W Dq,Dr |-|012346|-|*UUUU|***0*| |1110_qqq_001_110_rrr 13283: //ROR.W Dq,Dr |-|012346|-|-UUUU|-**0*| |1110_qqq_001_111_rrr 13284: //ASR.W Dr |A|012346|-|UUUUU|***0*| |1110_001_001_000_rrr [ASR.W #1,Dr] 13285: //LSR.W Dr |A|012346|-|UUUUU|***0*| |1110_001_001_001_rrr [LSR.W #1,Dr] 13286: //ROXR.W Dr |A|012346|-|*UUUU|***0*| |1110_001_001_010_rrr [ROXR.W #1,Dr] 13287: //ROR.W Dr |A|012346|-|-UUUU|-**0*| |1110_001_001_011_rrr [ROR.W #1,Dr] 13288: // 13289: //ASR.W #<data>,Dr 13290: //ASR.W Dq,Dr 13291: //ASR.W <ea> 13292: // 算術右シフトワード 13293: // ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ XNZVC 13294: // 0 ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ Xｱ*00 Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0 13295: // 1 ................ｱｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿ ﾀｱ*0ﾀ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿ==0 13296: // : 13297: // 15 ................ｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱ ｲｱ*0ｲ Z=ｱ==0 13298: // 16 ................ｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱ ｱｱ*0ｱ Z=ｱ==0 13299: // CCR 13300: // X countが0のとき変化しない。他は最後に押し出されたビット 13301: // N 結果の最上位ビット 13302: // Z 結果が0のときセット。他はクリア 13303: // V 常にクリア 13304: // C countが0のときクリア。他は最後に押し出されたビット 13305: // 13306: //LSR.W #<data>,Dr 13307: //LSR.W Dq,Dr 13308: //LSR.W <ea> 13309: // 論理右シフトワード 13310: // ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ XNZVC 13311: // 0 ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ Xｱ*00 Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0 13312: // 1 ................0ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿ ﾀ0*0ﾀ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿ==0 13313: // : 13314: // 15 ................000000000000000ｱ ｲ0*0ｲ Z=ｱ==0 13315: // 16 ................0000000000000000 ｱ010ｱ 13316: // 17 ................0000000000000000 00100 13317: // CCR 13318: // X countが0のとき変化しない。他は最後に押し出されたビット 13319: // N 結果の最上位ビット 13320: // Z 結果が0のときセット。他はクリア 13321: // V 常にクリア 13322: // C countが0のときクリア。他は最後に押し出されたビット 13323: // 13324: //ROR.W #<data>,Dr 13325: //ROR.W Dq,Dr 13326: //ROR.W <ea> 13327: // 右ローテートワード 13328: // ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ XNZVC 13329: // 0 ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ Xｱ*00 Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0 13330: // 1 ................ﾀｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿ Xﾀ*0ﾀ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0 13331: // : 13332: // 15 ................ｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀｱ Xｲ*0ｲ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0 13333: // 16 ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ Xｱ*0ｱ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0 13334: // CCR 13335: // X 常に変化しない 13336: // N 結果の最上位ビット 13337: // Z 結果が0のときセット。他はクリア 13338: // V 常にクリア 13339: // C countが0のときクリア。他は結果の最上位ビット 13340: // 13341: //ROXR.W #<data>,Dr 13342: //ROXR.W Dq,Dr 13343: //ROXR.W <ea> 13344: // 拡張右ローテートワード 13345: // ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ XNZVC 13346: // 0 ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ Xｱ*0X Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0 13347: // 1 ................Xｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿ ﾀX*0ﾀ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿX==0 13348: // 2 ................ﾀXｱｲｳｴｵｶｷｸｹｺｻｼｽｾ ｿﾀ*0ｿ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾﾀX==0 13349: // : 13350: // 15 ................ｳｴｵｶｷｸｹｺｻｼｽｾｿﾀXｱ ｲｳ*0ｲ Z=ｱｳｴｵｶｷｸｹｺｻｼｽｾｿﾀX==0 13351: // 16 ................ｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀX ｱｲ*0ｱ Z=ｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀX==0 13352: // 17 ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ Xｱ*0X Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0 13353: // CCR 13354: // X countが0のとき変化しない。他は最後に押し出されたビット 13355: // N 結果の最上位ビット 13356: // Z 結果が0のときセット。他はクリア 13357: // V 常にクリア 13358: // C countが0のときXのコピー。他は最後に押し出されたビット 13359: public static void irpXxrToRegWord () throws M68kException { 13360: int rrr; 13361: int x = XEiJ.regRn[rrr = XEiJ.regOC & 7]; 13362: int y; 13363: int z; 13364: int t; 13365: XEiJ.mpuCycleCount++; 13366: switch (XEiJ.regOC >> 3 & 0b111_000 >> 3) { 13367: case 0b000_000 >> 3: //ASR.W #<data>,Dr 13368: y = (XEiJ.regOC >> 9) - 1 & 7; //y=data-1=1-1～8-1 13369: XEiJ.regRn[rrr] = ~0xffff & x | (char) (z = (t = (short) x >> y) >> 1); 13370: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | -(t & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //XとCは最後に押し出されたビット 13371: break; 13372: case 0b001_000 >> 3: //LSR.W #<data>,Dr 13373: y = (XEiJ.regOC >> 9) - 1 & 7; //y=data-1=1-1～8-1 13374: XEiJ.regRn[rrr] = ~0xffff & x | (z = (t = (char) x >>> y) >>> 1); 13375: XEiJ.regCCR = (z == 0 ? XEiJ.REG_CCR_Z : 0) | -(t & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //XとCは最後に押し出されたビット 13376: break; 13377: case 0b010_000 >> 3: //ROXR.W #<data>,Dr 13378: y = (XEiJ.regOC >> 9) - 1 & 7; //y=data-1=1-1～8-1 13379: z = (XEiJ.regCCR & XEiJ.REG_CCR_X) << 15 - 4 | (char) x >>> 1; 13380: if (y == 1 - 1) { //y=data-1=1-1 13381: t = x; 13382: } else { //y=data-1=2-1～8-1 13383: z = x << 17 - 1 - y | (t = z >>> y - (2 - 1)) >>> 1; 13384: } 13385: XEiJ.regRn[rrr] = ~0xffff & x | (char) (z = (short) z); 13386: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | -(t & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //XとCは最後に押し出されたビット 13387: break; 13388: case 0b011_000 >> 3: //ROR.W #<data>,Dr 13389: y = (XEiJ.regOC >> 9) - 1 & 7; //y=data-1=1-1～8-1 13390: XEiJ.regRn[rrr] = ~0xffff & x | (char) (z = (short) (x << 16 - 1 - y | (char) x >>> y + 1)); 13391: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | z >>> 15 & 1; //Xは変化しない。Cは結果の最上位ビット 13392: break; 13393: case 0b100_000 >> 3: //ASR.W Dq,Dr 13394: y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63; //y=0～63。Javaのシフト演算子は5ビットでマスクされることに注意 13395: if (y == 0) { //y=data=0 13396: z = (short) x; 13397: t = XEiJ.regCCR & XEiJ.REG_CCR_X; //Xは変化しない。Cはクリア 13398: } else { //y=data=1～63 13399: XEiJ.regRn[rrr] = ~0xffff & x | (char) (z = (t = (short) x >> (y <= 16 ? y - 1 : 15)) >> 1); 13400: t = -(t & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //XとCは最後に押し出されたビット 13401: } 13402: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | t; 13403: break; 13404: case 0b101_000 >> 3: //LSR.W Dq,Dr 13405: y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63; //y=0～63。Javaのシフト演算子は5ビットでマスクされることに注意 13406: if (y == 0) { //y=data=0 13407: z = (short) x; 13408: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (z < 0 ? XEiJ.REG_CCR_N : z == 0 ? XEiJ.REG_CCR_Z : 0); //Xは変化しない。Cはクリア 13409: } else { //y=data=1～63 13410: XEiJ.regRn[rrr] = ~0xffff & x | (z = (t = y <= 16 ? (char) x >>> y - 1 : 0) >>> 1); 13411: XEiJ.regCCR = (z == 0 ? XEiJ.REG_CCR_Z : 0) | -(t & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //XとCは最後に押し出されたビット 13412: } 13413: break; 13414: case 0b110_000 >> 3: //ROXR.W Dq,Dr 13415: y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63; //y=0～63。Javaのシフト演算子は5ビットでマスクされることに注意 13416: //y %= 17; 13417: y = (y & 15) - (y >> 4); //y=data=-3～15 13418: y += y >> 4 & 17; //y=data=0～16 13419: if (y == 0) { //y=data=0 13420: z = (short) x; 13421: t = -(XEiJ.regCCR >> 4 & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //Xは変化しない。CはXのコピー 13422: } else { //y=data=1～16 13423: z = (XEiJ.regCCR & XEiJ.REG_CCR_X) << 15 - 4 | (char) x >>> 1; 13424: if (y == 1) { //y=data=1 13425: t = x; //Cは最後に押し出されたビット 13426: } else { //y=data=2～16 13427: z = x << 17 - y | (t = z >>> y - 2) >>> 1; 13428: } 13429: XEiJ.regRn[rrr] = ~0xffff & x | (char) (z = (short) z); 13430: t = -(t & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //XとCは最後に押し出されたビット 13431: } 13432: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | t; 13433: break; 13434: case 0b111_000 >> 3: //ROR.W Dq,Dr 13435: default: 13436: y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63; //y=0～63。Javaのシフト演算子は5ビットでマスクされることに注意 13437: if (y == 0) { 13438: z = (short) x; 13439: t = 0; //Cはクリア 13440: } else { 13441: y &= 15; //y=data=0～15 13442: XEiJ.regRn[rrr] = ~0xffff & x | (char) (z = (short) (x << 16 - y | (char) x >>> y)); 13443: t = z >>> 15 & 1; //Cは結果の最上位ビット 13444: } 13445: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | t; //Xは変化しない 13446: } 13447: } //irpXxrToRegWord 13448: 13449: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 13450: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 13451: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 13452: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 13453: //ASR.L #<data>,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_010_000_rrr 13454: //LSR.L #<data>,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_010_001_rrr 13455: //ROXR.L #<data>,Dr |-|012346|-|*UUUU|***0*| |1110_qqq_010_010_rrr 13456: //ROR.L #<data>,Dr |-|012346|-|-UUUU|-**0*| |1110_qqq_010_011_rrr 13457: //ASR.L Dq,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_010_100_rrr 13458: //LSR.L Dq,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_010_101_rrr 13459: //ROXR.L Dq,Dr |-|012346|-|*UUUU|***0*| |1110_qqq_010_110_rrr 13460: //ROR.L Dq,Dr |-|012346|-|-UUUU|-**0*| |1110_qqq_010_111_rrr 13461: //ASR.L Dr |A|012346|-|UUUUU|***0*| |1110_001_010_000_rrr [ASR.L #1,Dr] 13462: //LSR.L Dr |A|012346|-|UUUUU|***0*| |1110_001_010_001_rrr [LSR.L #1,Dr] 13463: //ROXR.L Dr |A|012346|-|*UUUU|***0*| |1110_001_010_010_rrr [ROXR.L #1,Dr] 13464: //ROR.L Dr |A|012346|-|-UUUU|-**0*| |1110_001_010_011_rrr [ROR.L #1,Dr] 13465: // 13466: //ASR.L #<data>,Dr 13467: //ASR.L Dq,Dr 13468: // 算術右シフトロング 13469: // ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ XNZVC 13470: // 0 ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ Xｱ*00 Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ==0 13471: // 1 ｱｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏ ﾐｱ*0ﾐ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏ==0 13472: // : 13473: // 31 ｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱ ｲｱ*0ｲ Z=ｱ==0 13474: // 32 ｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱ ｱｱ*0ｱ Z=ｱ==0 13475: // CCR 13476: // X countが0のとき変化しない。他は最後に押し出されたビット 13477: // N 結果の最上位ビット 13478: // Z 結果が0のときセット。他はクリア 13479: // V 常にクリア 13480: // C countが0のときクリア。他は最後に押し出されたビット 13481: // 13482: //LSR.L #<data>,Dr 13483: //LSR.L Dq,Dr 13484: // 論理右シフトロング 13485: // ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ XNZVC 13486: // 0 ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ Xｱ*00 Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ==0 13487: // 1 0ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏ ﾐ0*0ﾐ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏ==0 13488: // : 13489: // 31 0000000000000000000000000000000ｱ ｲ0*0ｲ Z=ｱ==0 13490: // 32 00000000000000000000000000000000 ｱ010ｱ 13491: // 33 00000000000000000000000000000000 00100 13492: // CCR 13493: // X countが0のとき変化しない。他は最後に押し出されたビット 13494: // N 結果の最上位ビット 13495: // Z 結果が0のときセット。他はクリア 13496: // V 常にクリア 13497: // C countが0のときクリア。他は最後に押し出されたビット 13498: // 13499: //ROR.L #<data>,Dr 13500: //ROR.L Dq,Dr 13501: // 右ローテートロング 13502: // ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ XNZVC 13503: // 0 ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ Xｱ*00 Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ==0 13504: // 1 ﾐｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏ Xﾐ*0ﾐ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ==0 13505: // : 13506: // 31 ｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐｱ Xｲ*0ｲ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ==0 13507: // 32 ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ Xｱ*0ｱ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ==0 13508: // CCR 13509: // X 常に変化しない 13510: // N 結果の最上位ビット 13511: // Z 結果が0のときセット。他はクリア 13512: // V 常にクリア 13513: // C countが0のときクリア。他は結果の最上位ビット 13514: // 13515: //ROXR.L #<data>,Dr 13516: //ROXR.L Dq,Dr 13517: // 拡張右ローテートロング 13518: // ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ XNZVC 13519: // 0 ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ Xｱ*0X Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ==0 13520: // 1 Xｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏ ﾐX*0ﾐ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏX==0 13521: // 2 ﾐXｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎ ﾏﾐ*0ﾏ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾐX==0 13522: // : 13523: // 31 ｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐXｱ ｲｳ*0ｲ Z=ｱｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐX==0 13524: // 32 ｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐX ｱｲ*0ｱ Z=ｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐX==0 13525: // 33 ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ Xｱ*0X Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ==0 13526: // CCR 13527: // X countが0のとき変化しない。他は最後に押し出されたビット 13528: // N 結果の最上位ビット 13529: // Z 結果が0のときセット。他はクリア 13530: // V 常にクリア 13531: // C countが0のときXのコピー。他は最後に押し出されたビット 13532: public static void irpXxrToRegLong () throws M68kException { 13533: int rrr; 13534: int x = XEiJ.regRn[rrr = XEiJ.regOC & 7]; 13535: int y; 13536: int z; 13537: int t; 13538: XEiJ.mpuCycleCount++; 13539: switch (XEiJ.regOC >> 3 & 0b111_000 >> 3) { 13540: case 0b000_000 >> 3: //ASR.L #<data>,Dr 13541: y = (XEiJ.regOC >> 9) - 1 & 7; //y=data-1=1-1～8-1 13542: XEiJ.regRn[rrr] = z = (t = x >> y) >> 1; 13543: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | -(t & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //XとCは最後に押し出されたビット 13544: break; 13545: case 0b001_000 >> 3: //LSR.L #<data>,Dr 13546: y = (XEiJ.regOC >> 9) - 1 & 7; //y=data-1=1-1～8-1 13547: XEiJ.regRn[rrr] = z = (t = x >>> y) >>> 1; 13548: XEiJ.regCCR = (z == 0 ? XEiJ.REG_CCR_Z : 0) | -(t & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //XとCは最後に押し出されたビット 13549: break; 13550: case 0b010_000 >> 3: //ROXR.L #<data>,Dr 13551: y = (XEiJ.regOC >> 9) - 1 & 7; //y=data-1=1-1～8-1 13552: z = (XEiJ.regCCR & XEiJ.REG_CCR_X) << 31 - 4 | x >>> 1; 13553: if (y == 1 - 1) { //y=data-1=1-1 13554: t = x; 13555: } else { //y=data-1=2-1～8-1 13556: z = x << -y | (t = z >>> y - (2 - 1)) >>> 1; //Javaのシフト演算子は5ビットでマスクされるので33-1-yを-yに省略 13557: } 13558: XEiJ.regRn[rrr] = z; 13559: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | -(t & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //XとCは最後に押し出されたビット 13560: break; 13561: case 0b011_000 >> 3: //ROR.L #<data>,Dr 13562: y = (XEiJ.regOC >> 9) - 1 & 7; //y=data-1=1-1～8-1 13563: XEiJ.regRn[rrr] = z = x << ~y | x >>> y + 1; //Javaのシフト演算子は5ビットでマスクされるので32-1-yを~yに省略 13564: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | z >>> 31; //Xは変化しない。Cは結果の最上位ビット 13565: break; 13566: case 0b100_000 >> 3: //ASR.L Dq,Dr 13567: y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63; //y=0～63。Javaのシフト演算子は5ビットでマスクされることに注意 13568: if (y == 0) { //y=data=0 13569: z = x; 13570: t = XEiJ.regCCR & XEiJ.REG_CCR_X; //Xは変化しない。Cはクリア 13571: } else { //y=data=1～63 13572: XEiJ.regRn[rrr] = z = (t = x >> (y <= 32 ? y - 1 : 31)) >> 1; 13573: t = -(t & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //XとCは最後に押し出されたビット 13574: } 13575: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | t; 13576: break; 13577: case 0b101_000 >> 3: //LSR.L Dq,Dr 13578: y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63; //y=0～63。Javaのシフト演算子は5ビットでマスクされることに注意 13579: if (y == 0) { //y=data=0 13580: z = x; 13581: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (z < 0 ? XEiJ.REG_CCR_N : z == 0 ? XEiJ.REG_CCR_Z : 0); //Xは変化しない。Cはクリア 13582: } else { //y=data=1～63 13583: XEiJ.regRn[rrr] = z = (t = y <= 32 ? x >>> y - 1 : 0) >>> 1; 13584: XEiJ.regCCR = (z == 0 ? XEiJ.REG_CCR_Z : 0) | -(t & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //XとCは最後に押し出されたビット 13585: } 13586: break; 13587: case 0b110_000 >> 3: //ROXR.L Dq,Dr 13588: y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63; //y=0～63。Javaのシフト演算子は5ビットでマスクされることに注意 13589: //y %= 33; 13590: y -= 32 - y >> 6 & 33; //y=data=0～32 13591: if (y == 0) { //y=data=0 13592: z = x; 13593: t = -(XEiJ.regCCR >> 4 & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //Xは変化しない。CはXのコピー 13594: } else { //y=data=1～32 13595: z = (XEiJ.regCCR & XEiJ.REG_CCR_X) << 31 - 4 | x >>> 1; 13596: if (y == 1) { //y=data=1 13597: t = x; //Cは最後に押し出されたビット 13598: } else { //y=data=2～32 13599: z = x << 33 - y | (t = z >>> y - 2) >>> 1; 13600: } 13601: XEiJ.regRn[rrr] = z; 13602: t = -(t & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //XとCは最後に押し出されたビット 13603: } 13604: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | t; 13605: break; 13606: case 0b111_000 >> 3: //ROR.L Dq,Dr 13607: default: 13608: y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63; //y=0～63。Javaのシフト演算子は5ビットでマスクされることに注意 13609: if (y == 0) { 13610: z = x; 13611: t = 0; //Cはクリア 13612: } else { 13613: y &= 31; //y=data=0～31 13614: XEiJ.regRn[rrr] = z = x << -y | x >>> y; //Javaのシフト演算子は5ビットでマスクされるので32-yを-yに省略。y=32のときx|xになるが問題ない 13615: t = z >>> 31; //Cは結果の最上位ビット 13616: } 13617: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | t; //Xは変化しない 13618: } 13619: } //irpXxrToRegLong 13620: 13621: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 13622: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 13623: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 13624: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 13625: //ASR.W <ea> |-|012346|-|UUUUU|***0*| M+-WXZ |1110_000_011_mmm_rrr 13626: // 13627: //ASR.W #<data>,Dr 13628: //ASR.W Dq,Dr 13629: //ASR.W <ea> 13630: // 算術右シフトワード 13631: // ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ XNZVC 13632: // 0 ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ Xｱ*00 Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0 13633: // 1 ................ｱｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿ ﾀｱ*0ﾀ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿ==0 13634: // : 13635: // 15 ................ｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱ ｲｱ*0ｲ Z=ｱ==0 13636: // 16 ................ｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱ ｱｱ*0ｱ Z=ｱ==0 13637: // CCR 13638: // X countが0のとき変化しない。他は最後に押し出されたビット 13639: // N 結果の最上位ビット 13640: // Z 結果が0のときセット。他はクリア 13641: // V 常にクリア 13642: // C countが0のときクリア。他は最後に押し出されたビット 13643: public static void irpAsrToMem () throws M68kException { 13644: XEiJ.mpuCycleCount++; 13645: int ea = XEiJ.regOC & 63; 13646: int a = efaMltWord (ea); 13647: int x = mmuModifyWordSignData (a, XEiJ.regSRS); 13648: int z = x >> 1; 13649: mmuWriteWordData (a, z, XEiJ.regSRS); 13650: XEiJ.regCCR = ((z < 0 ? XEiJ.REG_CCR_N : 0) | 13651: (z == 0 ? XEiJ.REG_CCR_Z : 0) | 13652: -(x & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //XとCは最後に押し出されたビット 13653: } //irpAsrToMem 13654: 13655: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 13656: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 13657: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 13658: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 13659: //ASL.B #<data>,Dr |-|012346|-|UUUUU|*****| |1110_qqq_100_000_rrr 13660: //LSL.B #<data>,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_100_001_rrr 13661: //ROXL.B #<data>,Dr |-|012346|-|*UUUU|***0*| |1110_qqq_100_010_rrr 13662: //ROL.B #<data>,Dr |-|012346|-|-UUUU|-**0*| |1110_qqq_100_011_rrr 13663: //ASL.B Dq,Dr |-|012346|-|UUUUU|*****| |1110_qqq_100_100_rrr 13664: //LSL.B Dq,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_100_101_rrr 13665: //ROXL.B Dq,Dr |-|012346|-|*UUUU|***0*| |1110_qqq_100_110_rrr 13666: //ROL.B Dq,Dr |-|012346|-|-UUUU|-**0*| |1110_qqq_100_111_rrr 13667: //ASL.B Dr |A|012346|-|UUUUU|*****| |1110_001_100_000_rrr [ASL.B #1,Dr] 13668: //LSL.B Dr |A|012346|-|UUUUU|***0*| |1110_001_100_001_rrr [LSL.B #1,Dr] 13669: //ROXL.B Dr |A|012346|-|*UUUU|***0*| |1110_001_100_010_rrr [ROXL.B #1,Dr] 13670: //ROL.B Dr |A|012346|-|-UUUU|-**0*| |1110_001_100_011_rrr [ROL.B #1,Dr] 13671: // 13672: //ASL.B #<data>,Dr 13673: //ASL.B Dq,Dr 13674: // 算術左シフトバイト 13675: // ........................ｱｲｳｴｵｶｷｸ XNZVC 13676: // 0 ........................ｱｲｳｴｵｶｷｸ Xｱ*00 Z=ｱｲｳｴｵｶｷｸ==0 13677: // 1 ........................ｲｳｴｵｶｷｸ0 ｱｲ**ｱ Z=ｲｳｴｵｶｷｸ==0,V=ｱｲ!=0/-1 13678: // : 13679: // 7 ........................ｸ0000000 ｷｸ**ｷ Z=ｸ==0,V=ｱｲｳｴｵｶｷｸ!=0/-1 13680: // 8 ........................00000000 ｸ01*ｸ V=ｱｲｳｴｵｶｷｸ!=0 13681: // 9 ........................00000000 001*0 V=ｱｲｳｴｵｶｷｸ!=0 13682: // CCR 13683: // X countが0のとき変化しない。他は最後に押し出されたビット 13684: // N 結果の最上位ビット 13685: // Z 結果が0のときセット。他はクリア 13686: // V ASRで元に戻せないときセット。他はクリア 13687: // C countが0のときクリア。他は最後に押し出されたビット 13688: // 13689: //LSL.B #<data>,Dr 13690: //LSL.B Dq,Dr 13691: // 論理左シフトバイト 13692: // ........................ｱｲｳｴｵｶｷｸ XNZVC 13693: // 0 ........................ｱｲｳｴｵｶｷｸ Xｱ*00 Z=ｱｲｳｴｵｶｷｸ==0 13694: // 1 ........................ｲｳｴｵｶｷｸ0 ｱｲ*0ｱ Z=ｲｳｴｵｶｷｸ==0 13695: // : 13696: // 7 ........................ｸ0000000 ｷｸ*0ｷ Z=ｸ==0 13697: // 8 ........................00000000 ｸ010ｸ 13698: // 9 ........................00000000 00100 13699: // CCR 13700: // X countが0のとき変化しない。他は最後に押し出されたビット 13701: // N 結果の最上位ビット 13702: // Z 結果が0のときセット。他はクリア 13703: // V 常にクリア 13704: // C countが0のときクリア。他は最後に押し出されたビット 13705: // 13706: //ROL.B #<data>,Dr 13707: //ROL.B Dq,Dr 13708: // 左ローテートバイト 13709: // ........................ｱｲｳｴｵｶｷｸ XNZVC 13710: // 0 ........................ｱｲｳｴｵｶｷｸ Xｱ*00 Z=ｱｲｳｴｵｶｷｸ==0 13711: // 1 ........................ｲｳｴｵｶｷｸｱ Xｲ*0ｱ Z=ｱｲｳｴｵｶｷｸ==0 13712: // : 13713: // 7 ........................ｸｱｲｳｴｵｶｷ Xｸ*0ｷ Z=ｱｲｳｴｵｶｷｸ==0 13714: // 8 ........................ｱｲｳｴｵｶｷｸ Xｱ*0ｸ Z=ｱｲｳｴｵｶｷｸ==0 13715: // CCR 13716: // X 常に変化しない 13717: // N 結果の最上位ビット 13718: // Z 結果が0のときセット。他はクリア 13719: // V 常にクリア 13720: // C countが0のときクリア。他は結果の最下位ビット 13721: // 13722: //ROXL.B #<data>,Dr 13723: //ROXL.B Dq,Dr 13724: // 拡張左ローテートバイト 13725: // ........................ｱｲｳｴｵｶｷｸ XNZVC 13726: // 0 ........................ｱｲｳｴｵｶｷｸ Xｱ*0X Z=ｱｲｳｴｵｶｷｸ==0 13727: // 1 ........................ｲｳｴｵｶｷｸX ｱｲ*0ｱ Z=ｲｳｴｵｶｷｸX==0 13728: // 2 ........................ｳｴｵｶｷｸXｱ ｲｳ*0ｲ Z=ｱｳｴｵｶｷｸX==0 13729: // : 13730: // 7 ........................ｸXｱｲｳｴｵｶ ｷｸ*0ｷ Z=ｱｲｳｴｵｶｸX==0 13731: // 8 ........................Xｱｲｳｴｵｶｷ ｸX*0ｸ Z=ｱｲｳｴｵｶｷX==0 13732: // 9 ........................ｱｲｳｴｵｶｷｸ Xｱ*0X Z=ｱｲｳｴｵｶｷｸ==0 13733: // CCR 13734: // X countが0のとき変化しない。他は最後に押し出されたビット 13735: // N 結果の最上位ビット 13736: // Z 結果が0のときセット。他はクリア 13737: // V 常にクリア 13738: // C countが0のときXのコピー。他は最後に押し出されたビット 13739: public static void irpXxlToRegByte () throws M68kException { 13740: int rrr; 13741: int x = XEiJ.regRn[rrr = XEiJ.regOC & 7]; 13742: int y; 13743: int z; 13744: int t; 13745: XEiJ.mpuCycleCount++; 13746: switch (XEiJ.regOC >> 3 & 0b111_000 >> 3) { 13747: case 0b000_000 >> 3: //ASL.B #<data>,Dr 13748: y = (XEiJ.regOC >> 9) - 1 & 7; //y=data-1=1-1～8-1 13749: XEiJ.regRn[rrr] = ~0xff & x | 0xff & (z = (byte) ((t = x << y) << 1)); 13750: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | (z >> y + 1 != (byte) x ? XEiJ.REG_CCR_V : 0) | (byte) t >> 7 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //VはASRで元に戻せないときセット。XとCは最後に押し出されたビット 13751: break; 13752: case 0b001_000 >> 3: //LSL.B #<data>,Dr 13753: y = (XEiJ.regOC >> 9) - 1 & 7; //y=data-1=1-1～8-1 13754: XEiJ.regRn[rrr] = ~0xff & x | 0xff & (z = (byte) ((t = x << y) << 1)); 13755: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | (byte) t >> 7 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //XとCは最後に押し出されたビット 13756: break; 13757: case 0b010_000 >> 3: //ROXL.B #<data>,Dr 13758: y = (XEiJ.regOC >> 9) - 1 & 7; //y=data-1=1-1～8-1 13759: z = x << 1 | XEiJ.regCCR >> 4 & 1; 13760: if (y == 1 - 1) { //y=data-1=1-1 13761: t = x; 13762: } else { //y=data-1=2-1～8-1 13763: z = (t = z << y - (2 - 1)) << 1 | (0xff & x) >>> 9 - 1 - y; 13764: } 13765: XEiJ.regRn[rrr] = ~0xff & x | 0xff & (z = (byte) z); 13766: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | (byte) t >> 7 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //XとCは最後に押し出されたビット 13767: break; 13768: case 0b011_000 >> 3: //ROL.B #<data>,Dr 13769: y = XEiJ.regOC >> 9 & 7; //y=data&7 13770: XEiJ.regRn[rrr] = ~0xff & x | 0xff & (z = (byte) (x << y | (0xff & x) >>> 8 - y)); 13771: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | z & 1; //Xは変化しない。Cは結果の最下位ビット 13772: break; 13773: case 0b100_000 >> 3: //ASL.B Dq,Dr 13774: y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63; //y=0～63。Javaのシフト演算子は5ビットでマスクされることに注意 13775: if (y <= 7) { //y=data=0～7 13776: if (y == 0) { //y=data=0 13777: z = (byte) x; 13778: t = XEiJ.regCCR & XEiJ.REG_CCR_X; //Xは変化しない。VとCはクリア 13779: } else { //y=data=1～7 13780: XEiJ.regRn[rrr] = ~0xff & x | 0xff & (z = (byte) ((t = x << y - 1) << 1)); 13781: t = (z >> y != (byte) x ? XEiJ.REG_CCR_V : 0) | (byte) t >> 7 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //VはASRで元に戻せないときセット。XとCは最後に押し出されたビット 13782: } 13783: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | t; 13784: } else { //y=data=8～63 13785: XEiJ.regRn[rrr] = ~0xff & x; 13786: XEiJ.regCCR = XEiJ.REG_CCR_Z | ((byte) x != 0 ? XEiJ.REG_CCR_V : 0) | (y == 8 ? -(x & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C) : 0); 13787: } 13788: break; 13789: case 0b101_000 >> 3: //LSL.B Dq,Dr 13790: y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63; //y=0～63。Javaのシフト演算子は5ビットでマスクされることに注意 13791: if (y == 0) { //y=data=0 13792: z = (byte) x; 13793: t = XEiJ.regCCR & XEiJ.REG_CCR_X; //Xは変化しない。Cはクリア 13794: } else { //y=data=1～63 13795: XEiJ.regRn[rrr] = ~0xff & x | 0xff & (z = (byte) ((t = y <= 8 ? x << y - 1 : 0) << 1)); 13796: t = (byte) t >> 7 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //XとCは最後に押し出されたビット 13797: } 13798: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | t; 13799: break; 13800: case 0b110_000 >> 3: //ROXL.B Dq,Dr 13801: y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63; //y=0～63。Javaのシフト演算子は5ビットでマスクされることに注意 13802: //y %= 9; 13803: y = (y & 7) - (y >> 3); //y=data=-7～7 13804: y += y >> 3 & 9; //y=data=0～8 13805: if (y == 0) { //y=data=0 13806: z = (byte) x; 13807: t = -(XEiJ.regCCR >> 4 & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //Xは変化しない。CはXのコピー 13808: } else { //y=data=1～8 13809: z = x << 1 | XEiJ.regCCR >> 4 & 1; 13810: if (y == 1) { //y=data=1 13811: t = x; //Cは最後に押し出されたビット 13812: } else { //y=data=2～8 13813: z = (t = z << y - 2) << 1 | (0xff & x) >>> 9 - y; 13814: } 13815: XEiJ.regRn[rrr] = ~0xff & x | 0xff & (z = (byte) z); 13816: t = (byte) t >> 7 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //XとCは最後に押し出されたビット 13817: } 13818: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | t; 13819: break; 13820: case 0b111_000 >> 3: //ROL.B Dq,Dr 13821: default: 13822: y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63; //y=0～63。Javaのシフト演算子は5ビットでマスクされることに注意 13823: if (y == 0) { 13824: z = (byte) x; 13825: t = 0; //Cはクリア 13826: } else { 13827: y &= 7; //y=data=0～7 13828: XEiJ.regRn[rrr] = ~0xff & x | 0xff & (z = (byte) (x << y | (0xff & x) >>> 8 - y)); 13829: t = z & 1; //Cは結果の最下位ビット 13830: } 13831: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | t; //Xは変化しない 13832: } 13833: } //irpXxlToRegByte 13834: 13835: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 13836: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 13837: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 13838: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 13839: //ASL.W #<data>,Dr |-|012346|-|UUUUU|*****| |1110_qqq_101_000_rrr 13840: //LSL.W #<data>,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_101_001_rrr 13841: //ROXL.W #<data>,Dr |-|012346|-|*UUUU|***0*| |1110_qqq_101_010_rrr 13842: //ROL.W #<data>,Dr |-|012346|-|-UUUU|-**0*| |1110_qqq_101_011_rrr 13843: //ASL.W Dq,Dr |-|012346|-|UUUUU|*****| |1110_qqq_101_100_rrr 13844: //LSL.W Dq,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_101_101_rrr 13845: //ROXL.W Dq,Dr |-|012346|-|*UUUU|***0*| |1110_qqq_101_110_rrr 13846: //ROL.W Dq,Dr |-|012346|-|-UUUU|-**0*| |1110_qqq_101_111_rrr 13847: //ASL.W Dr |A|012346|-|UUUUU|*****| |1110_001_101_000_rrr [ASL.W #1,Dr] 13848: //LSL.W Dr |A|012346|-|UUUUU|***0*| |1110_001_101_001_rrr [LSL.W #1,Dr] 13849: //ROXL.W Dr |A|012346|-|*UUUU|***0*| |1110_001_101_010_rrr [ROXL.W #1,Dr] 13850: //ROL.W Dr |A|012346|-|-UUUU|-**0*| |1110_001_101_011_rrr [ROL.W #1,Dr] 13851: // 13852: //ASL.W #<data>,Dr 13853: //ASL.W Dq,Dr 13854: //ASL.W <ea> 13855: // 算術左シフトワード 13856: // ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ XNZVC 13857: // 0 ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ Xｱ*00 Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0 13858: // 1 ................ｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ0 ｱｲ**ｱ Z=ｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0,V=ｱｲ!=0/-1 13859: // : 13860: // 15 ................ﾀ000000000000000 ｿﾀ**ｿ Z=ﾀ==0,V=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ!=0/-1 13861: // 16 ................0000000000000000 ﾀ01*ﾀ V=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ!=0 13862: // 17 ................0000000000000000 001*0 V=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ!=0 13863: // CCR 13864: // X countが0のとき変化しない。他は最後に押し出されたビット 13865: // N 結果の最上位ビット 13866: // Z 結果が0のときセット。他はクリア 13867: // V ASRで元に戻せないときセット。他はクリア 13868: // C countが0のときクリア。他は最後に押し出されたビット 13869: // 13870: //LSL.W #<data>,Dr 13871: //LSL.W Dq,Dr 13872: //LSL.W <ea> 13873: // 論理左シフトワード 13874: // ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ XNZVC 13875: // 0 ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ Xｱ*00 Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0 13876: // 1 ................ｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ0 ｱｲ*0ｱ Z=ｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0 13877: // : 13878: // 15 ................ﾀ000000000000000 ｿﾀ*0ｿ Z=ﾀ==0 13879: // 16 ................0000000000000000 ﾀ010ﾀ 13880: // 17 ................0000000000000000 00100 13881: // CCR 13882: // X countが0のとき変化しない。他は最後に押し出されたビット 13883: // N 結果の最上位ビット 13884: // Z 結果が0のときセット。他はクリア 13885: // V 常にクリア 13886: // C countが0のときクリア。他は最後に押し出されたビット 13887: // 13888: //ROL.W #<data>,Dr 13889: //ROL.W Dq,Dr 13890: //ROL.W <ea> 13891: // 左ローテートワード 13892: // ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ XNZVC 13893: // 0 ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ Xｱ*00 Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0 13894: // 1 ................ｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀｱ Xｲ*0ｱ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0 13895: // : 13896: // 15 ................ﾀｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿ Xﾀ*0ｿ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0 13897: // 16 ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ Xｱ*0ﾀ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0 13898: // CCR 13899: // X 常に変化しない 13900: // N 結果の最上位ビット 13901: // Z 結果が0のときセット。他はクリア 13902: // V 常にクリア 13903: // C countが0のときクリア。他は結果の最下位ビット 13904: // 13905: //ROXL.W #<data>,Dr 13906: //ROXL.W Dq,Dr 13907: //ROXL.W <ea> 13908: // 拡張左ローテートワード 13909: // ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ XNZVC 13910: // 0 ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ Xｱ*0X Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0 13911: // 1 ................ｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀX ｱｲ*0ｱ Z=ｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀX==0 13912: // 2 ................ｳｴｵｶｷｸｹｺｻｼｽｾｿﾀXｱ ｲｳ*0ｲ Z=ｱｳｴｵｶｷｸｹｺｻｼｽｾｿﾀX==0 13913: // : 13914: // 15 ................ﾀXｱｲｳｴｵｶｷｸｹｺｻｼｽｾ ｿﾀ*0ｿ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾﾀX==0 13915: // 16 ................Xｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿ ﾀX*0ﾀ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿX==0 13916: // 17 ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ Xｱ*0X Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0 13917: // CCR 13918: // X countが0のとき変化しない。他は最後に押し出されたビット 13919: // N 結果の最上位ビット 13920: // Z 結果が0のときセット。他はクリア 13921: // V 常にクリア 13922: // C countが0のときXのコピー。他は最後に押し出されたビット 13923: public static void irpXxlToRegWord () throws M68kException { 13924: int rrr; 13925: int x = XEiJ.regRn[rrr = XEiJ.regOC & 7]; 13926: int y; 13927: int z; 13928: int t; 13929: XEiJ.mpuCycleCount++; 13930: switch (XEiJ.regOC >> 3 & 0b111_000 >> 3) { 13931: case 0b000_000 >> 3: //ASL.W #<data>,Dr 13932: y = (XEiJ.regOC >> 9) - 1 & 7; //y=data-1=1-1～8-1 13933: XEiJ.regRn[rrr] = ~0xffff & x | (char) (z = (short) ((t = x << y) << 1)); 13934: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | (z >> y + 1 != (short) x ? XEiJ.REG_CCR_V : 0) | (short) t >> 15 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //VはASRで元に戻せないときセット。XとCは最後に押し出されたビット 13935: break; 13936: case 0b001_000 >> 3: //LSL.W #<data>,Dr 13937: y = (XEiJ.regOC >> 9) - 1 & 7; //y=data-1=1-1～8-1 13938: XEiJ.regRn[rrr] = ~0xffff & x | (char) (z = (short) ((t = x << y) << 1)); 13939: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | (short) t >> 15 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //XとCは最後に押し出されたビット 13940: break; 13941: case 0b010_000 >> 3: //ROXL.W #<data>,Dr 13942: y = (XEiJ.regOC >> 9) - 1 & 7; //y=data-1=1-1～8-1 13943: z = x << 1 | XEiJ.regCCR >> 4 & 1; 13944: if (y == 1 - 1) { //y=data-1=1-1 13945: t = x; 13946: } else { //y=data-1=2-1～8-1 13947: z = (t = z << y - (2 - 1)) << 1 | (char) x >>> 17 - 1 - y; 13948: } 13949: XEiJ.regRn[rrr] = ~0xffff & x | (char) (z = (short) z); 13950: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | (short) t >> 15 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //XとCは最後に押し出されたビット 13951: break; 13952: case 0b011_000 >> 3: //ROL.W #<data>,Dr 13953: y = (XEiJ.regOC >> 9) - 1 & 7; //y=data-1=1-1～8-1 13954: XEiJ.regRn[rrr] = ~0xffff & x | (char) (z = (short) (x << y + 1 | (char) x >>> 16 - 1 - y)); 13955: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | z & 1; //Xは変化しない。Cは結果の最下位ビット 13956: break; 13957: case 0b100_000 >> 3: //ASL.W Dq,Dr 13958: y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63; //y=0～63。Javaのシフト演算子は5ビットでマスクされることに注意 13959: if (y <= 15) { //y=data=0～15 13960: if (y == 0) { //y=data=0 13961: z = (short) x; 13962: t = XEiJ.regCCR & XEiJ.REG_CCR_X; //Xは変化しない。VとCはクリア 13963: } else { //y=data=1～15 13964: XEiJ.regRn[rrr] = ~0xffff & x | (char) (z = (short) ((t = x << y - 1) << 1)); 13965: t = (z >> y != (short) x ? XEiJ.REG_CCR_V : 0) | (short) t >> 15 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //VはASRで元に戻せないときセット。XとCは最後に押し出されたビット 13966: } 13967: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | t; 13968: } else { //y=data=16～63 13969: XEiJ.regRn[rrr] = ~0xffff & x; 13970: XEiJ.regCCR = XEiJ.REG_CCR_Z | ((short) x != 0 ? XEiJ.REG_CCR_V : 0) | (y == 16 ? -(x & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C) : 0); 13971: } 13972: break; 13973: case 0b101_000 >> 3: //LSL.W Dq,Dr 13974: y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63; //y=0～63。Javaのシフト演算子は5ビットでマスクされることに注意 13975: if (y == 0) { //y=data=0 13976: z = (short) x; 13977: t = XEiJ.regCCR & XEiJ.REG_CCR_X; //Xは変化しない。Cはクリア 13978: } else { //y=data=1～63 13979: XEiJ.regRn[rrr] = ~0xffff & x | (char) (z = (short) ((t = y <= 16 ? x << y - 1 : 0) << 1)); 13980: t = (short) t >> 15 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //XとCは最後に押し出されたビット 13981: } 13982: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | t; 13983: break; 13984: case 0b110_000 >> 3: //ROXL.W Dq,Dr 13985: y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63; //y=0～63。Javaのシフト演算子は5ビットでマスクされることに注意 13986: //y %= 17; 13987: y = (y & 15) - (y >> 4); //y=data=-3～15 13988: y += y >> 4 & 17; //y=data=0～16 13989: if (y == 0) { //y=data=0 13990: z = (short) x; 13991: t = -(XEiJ.regCCR >> 4 & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //Xは変化しない。CはXのコピー 13992: } else { //y=data=1～16 13993: z = x << 1 | XEiJ.regCCR >> 4 & 1; 13994: if (y == 1) { //y=data=1 13995: t = x; //Cは最後に押し出されたビット 13996: } else { //y=data=2～16 13997: z = (t = z << y - 2) << 1 | (char) x >>> 17 - y; 13998: } 13999: XEiJ.regRn[rrr] = ~0xffff & x | (char) (z = (short) z); 14000: t = (short) t >> 15 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //XとCは最後に押し出されたビット 14001: } 14002: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | t; 14003: break; 14004: case 0b111_000 >> 3: //ROL.W Dq,Dr 14005: default: 14006: y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63; //y=0～63。Javaのシフト演算子は5ビットでマスクされることに注意 14007: if (y == 0) { 14008: z = (short) x; 14009: t = 0; //Cはクリア 14010: } else { 14011: y &= 15; //y=data=0～15 14012: XEiJ.regRn[rrr] = ~0xffff & x | (char) (z = (short) (x << y | (char) x >>> 16 - y)); 14013: t = z & 1; //Cは結果の最下位ビット 14014: } 14015: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | t; //Xは変化しない 14016: } 14017: } //irpXxlToRegWord 14018: 14019: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 14020: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 14021: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 14022: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 14023: //ASL.L #<data>,Dr |-|012346|-|UUUUU|*****| |1110_qqq_110_000_rrr 14024: //LSL.L #<data>,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_110_001_rrr 14025: //ROXL.L #<data>,Dr |-|012346|-|*UUUU|***0*| |1110_qqq_110_010_rrr 14026: //ROL.L #<data>,Dr |-|012346|-|-UUUU|-**0*| |1110_qqq_110_011_rrr 14027: //ASL.L Dq,Dr |-|012346|-|UUUUU|*****| |1110_qqq_110_100_rrr 14028: //LSL.L Dq,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_110_101_rrr 14029: //ROXL.L Dq,Dr |-|012346|-|*UUUU|***0*| |1110_qqq_110_110_rrr 14030: //ROL.L Dq,Dr |-|012346|-|-UUUU|-**0*| |1110_qqq_110_111_rrr 14031: //ASL.L Dr |A|012346|-|UUUUU|*****| |1110_001_110_000_rrr [ASL.L #1,Dr] 14032: //LSL.L Dr |A|012346|-|UUUUU|***0*| |1110_001_110_001_rrr [LSL.L #1,Dr] 14033: //ROXL.L Dr |A|012346|-|*UUUU|***0*| |1110_001_110_010_rrr [ROXL.L #1,Dr] 14034: //ROL.L Dr |A|012346|-|-UUUU|-**0*| |1110_001_110_011_rrr [ROL.L #1,Dr] 14035: // 14036: //ASL.L #<data>,Dr 14037: //ASL.L Dq,Dr 14038: // 算術左シフトロング 14039: // ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ XNZVC 14040: // 0 ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ Xｱ**0 Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ==0 14041: // 1 ｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ0 ｱｲ**ｱ Z=ｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ==0,V=ｱｲ!=0/-1 14042: // : 14043: // 31 ﾐ0000000000000000000000000000000 ﾏﾐ**ﾏ Z=ﾐ==0,V=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ!=0/-1 14044: // 32 00000000000000000000000000000000 ﾐ01*ﾐ V=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ!=0 14045: // 33 00000000000000000000000000000000 001*0 V=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ!=0 14046: // CCR 14047: // X countが0のとき変化しない。他は最後に押し出されたビット 14048: // N 結果の最上位ビット 14049: // Z 結果が0のときセット。他はクリア 14050: // V ASRで元に戻せないときセット。他はクリア 14051: // C countが0のときクリア。他は最後に押し出されたビット 14052: // 14053: //LSL.L #<data>,Dr 14054: //LSL.L Dq,Dr 14055: // 論理左シフトロング 14056: // ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ XNZVC 14057: // 0 ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ Xｱ*00 Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ==0 14058: // 1 ｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ0 ｱｲ*0ｱ Z=ｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ==0 14059: // : 14060: // 31 ﾐ0000000000000000000000000000000 ﾏﾐ*0ﾏ Z=ﾐ==0 14061: // 32 00000000000000000000000000000000 ﾐ010ﾐ 14062: // 33 00000000000000000000000000000000 00100 14063: // CCR 14064: // X countが0のとき変化しない。他は最後に押し出されたビット 14065: // N 結果の最上位ビット 14066: // Z 結果が0のときセット。他はクリア 14067: // V 常にクリア 14068: // C countが0のときクリア。他は最後に押し出されたビット 14069: // 14070: //ROL.L #<data>,Dr 14071: //ROL.L Dq,Dr 14072: // 左ローテートロング 14073: // ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ XNZVC 14074: // 0 ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ Xｱ*00 Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ==0 14075: // 1 ｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐｱ Xｲ*0ｱ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ==0 14076: // : 14077: // 31 ﾐｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏ Xﾐ*0ﾏ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ==0 14078: // 32 ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ Xｱ*0ﾐ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ==0 14079: // CCR 14080: // X 常に変化しない 14081: // N 結果の最上位ビット 14082: // Z 結果が0のときセット。他はクリア 14083: // V 常にクリア 14084: // C countが0のときクリア。他は結果の最下位ビット 14085: // 14086: //ROXL.L #<data>,Dr 14087: //ROXL.L Dq,Dr 14088: // 拡張左ローテートロング 14089: // ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ XNZVC 14090: // 0 ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ Xｱ*0X Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ==0 14091: // 1 ｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐX ｱｲ*0ｱ Z=ｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐX==0 14092: // 2 ｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐXｱ ｲｳ*0ｲ Z=ｱｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐX==0 14093: // : 14094: // 31 ﾐXｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎ ﾏﾐ*0ﾏ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾐX==0 14095: // 32 Xｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏ ﾐX*0ﾐ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏX==0 14096: // 33 ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ Xｱ*0X Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ==0 14097: // CCR 14098: // X countが0のとき変化しない。他は最後に押し出されたビット 14099: // N 結果の最上位ビット 14100: // Z 結果が0のときセット。他はクリア 14101: // V 常にクリア 14102: // C countが0のときXのコピー。他は最後に押し出されたビット 14103: public static void irpXxlToRegLong () throws M68kException { 14104: int rrr; 14105: int x = XEiJ.regRn[rrr = XEiJ.regOC & 7]; 14106: int y; 14107: int z; 14108: int t; 14109: XEiJ.mpuCycleCount++; 14110: switch (XEiJ.regOC >> 3 & 0b111_000 >> 3) { 14111: case 0b000_000 >> 3: //ASL.L #<data>,Dr 14112: y = (XEiJ.regOC >> 9) - 1 & 7; //y=data-1=1-1～8-1 14113: XEiJ.regRn[rrr] = z = (t = x << y) << 1; 14114: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | (z >> y + 1 != x ? XEiJ.REG_CCR_V : 0) | t >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //VはASRで元に戻せないときセット。XとCは最後に押し出されたビット 14115: break; 14116: case 0b001_000 >> 3: //LSL.L #<data>,Dr 14117: y = (XEiJ.regOC >> 9) - 1 & 7; //y=data-1=1-1～8-1 14118: XEiJ.regRn[rrr] = z = (t = x << y) << 1; 14119: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | t >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //XとCは最後に押し出されたビット 14120: break; 14121: case 0b010_000 >> 3: //ROXL.L #<data>,Dr 14122: y = (XEiJ.regOC >> 9) - 1 & 7; //y=data-1=1-1～8-1 14123: z = x << 1 | XEiJ.regCCR >> 4 & 1; 14124: if (y == 1 - 1) { //y=data-1=1-1 14125: t = x; 14126: } else { //y=data-1=2-1～8-1 14127: z = (t = z << y - (2 - 1)) << 1 | x >>> -y; //Javaのシフト演算子は5ビットでマスクされるので33-1-yを-yに省略 14128: } 14129: XEiJ.regRn[rrr] = z; 14130: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | t >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //XとCは最後に押し出されたビット 14131: break; 14132: case 0b011_000 >> 3: //ROL.L #<data>,Dr 14133: y = (XEiJ.regOC >> 9) - 1 & 7; //y=data-1=1-1～8-1 14134: XEiJ.regRn[rrr] = z = x << y + 1 | x >>> ~y; //Javaのシフト演算子は5ビットでマスクされるので32-1-yを~yに省略 14135: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | z & 1; //Xは変化しない。Cは結果の最下位ビット 14136: break; 14137: case 0b100_000 >> 3: //ASL.L Dq,Dr 14138: y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63; //y=0～63。Javaのシフト演算子は5ビットでマスクされることに注意 14139: if (y <= 31) { //y=data=0～31 14140: if (y == 0) { //y=data=0 14141: z = x; 14142: t = XEiJ.regCCR & XEiJ.REG_CCR_X; //Xは変化しない。VとCはクリア 14143: } else { //y=data=1～31 14144: XEiJ.regRn[rrr] = z = (t = x << y - 1) << 1; 14145: t = (z >> y != x ? XEiJ.REG_CCR_V : 0) | t >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //VはASRで元に戻せないときセット。XとCは最後に押し出されたビット 14146: } 14147: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | t; 14148: } else { //y=data=32～63 14149: XEiJ.regRn[rrr] = 0; 14150: XEiJ.regCCR = XEiJ.REG_CCR_Z | (x != 0 ? XEiJ.REG_CCR_V : 0) | (y == 32 ? -(x & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C) : 0); 14151: } 14152: break; 14153: case 0b101_000 >> 3: //LSL.L Dq,Dr 14154: y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63; //y=0～63。Javaのシフト演算子は5ビットでマスクされることに注意 14155: if (y == 0) { //y=data=0 14156: z = x; 14157: t = XEiJ.regCCR & XEiJ.REG_CCR_X; //Xは変化しない。Cはクリア 14158: } else { //y=data=1～63 14159: XEiJ.regRn[rrr] = z = (t = y <= 32 ? x << y - 1 : 0) << 1; 14160: t = t >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //XとCは最後に押し出されたビット 14161: } 14162: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | t; 14163: break; 14164: case 0b110_000 >> 3: //ROXL.L Dq,Dr 14165: y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63; //y=0～63。Javaのシフト演算子は5ビットでマスクされることに注意 14166: //y %= 33; 14167: y -= 32 - y >> 6 & 33; //y=data=0～32 14168: if (y == 0) { //y=data=0 14169: z = x; 14170: t = -(XEiJ.regCCR >> 4 & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //Xは変化しない。CはXのコピー 14171: } else { //y=data=1～32 14172: z = x << 1 | XEiJ.regCCR >> 4 & 1; 14173: if (y == 1) { //y=data=1 14174: t = x; //Cは最後に押し出されたビット 14175: } else { //y=data=2～32 14176: z = (t = z << y - 2) << 1 | x >>> 33 - y; 14177: } 14178: XEiJ.regRn[rrr] = z; 14179: t = t >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //XとCは最後に押し出されたビット 14180: } 14181: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | t; 14182: break; 14183: case 0b111_000 >> 3: //ROL.L Dq,Dr 14184: default: 14185: y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63; //y=0～63。Javaのシフト演算子は5ビットでマスクされることに注意 14186: if (y == 0) { 14187: z = x; 14188: t = 0; //Cはクリア 14189: } else { 14190: XEiJ.regRn[rrr] = z = x << y | x >>> -y; //Javaのシフト演算子は5ビットでマスクされるのでy&31をyに、32-(y&31)を-yに省略。y=32のときx|xになるが問題ない 14191: t = z & 1; 14192: } 14193: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | t; //Xは変化しない 14194: } 14195: } //irpXxlToRegLong 14196: 14197: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 14198: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 14199: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 14200: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 14201: //ASL.W <ea> |-|012346|-|UUUUU|*****| M+-WXZ |1110_000_111_mmm_rrr 14202: // 14203: //ASL.W #<data>,Dr 14204: //ASL.W Dq,Dr 14205: //ASL.W <ea> 14206: // 算術左シフトワード 14207: // ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ XNZVC 14208: // 0 ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ Xｱ*00 Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0 14209: // 1 ................ｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ0 ｱｲ**ｱ Z=ｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0,V=ｱｲ!=0/-1 14210: // : 14211: // 15 ................ﾀ000000000000000 ｿﾀ**ｿ Z=ﾀ==0,V=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ!=0/-1 14212: // 16 ................0000000000000000 ﾀ01*ﾀ V=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ!=0 14213: // 17 ................0000000000000000 001*0 V=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ!=0 14214: // CCR 14215: // X countが0のとき変化しない。他は最後に押し出されたビット 14216: // N 結果の最上位ビット 14217: // Z 結果が0のときセット。他はクリア 14218: // V ASRで元に戻せないときセット。他はクリア 14219: // C countが0のときクリア。他は最後に押し出されたビット 14220: public static void irpAslToMem () throws M68kException { 14221: XEiJ.mpuCycleCount++; 14222: int ea = XEiJ.regOC & 63; 14223: int a = efaMltWord (ea); 14224: int x = mmuModifyWordSignData (a, XEiJ.regSRS); 14225: int z = (short) (x << 1); 14226: mmuWriteWordData (a, z, XEiJ.regSRS); 14227: XEiJ.regCCR = ((z < 0 ? XEiJ.REG_CCR_N : 0) | 14228: (z == 0 ? XEiJ.REG_CCR_Z : 0) | 14229: (x ^ z) >>> 31 << 1 | //Vは最上位ビットが変化したときセット 14230: x >> 15 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //XとCは最後に押し出されたビット 14231: } //irpAslToMem 14232: 14233: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 14234: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 14235: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 14236: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 14237: //LSR.W <ea> |-|012346|-|UUUUU|*0*0*| M+-WXZ |1110_001_011_mmm_rrr 14238: // 14239: //LSR.W #<data>,Dr 14240: //LSR.W Dq,Dr 14241: //LSR.W <ea> 14242: // 論理右シフトワード 14243: // ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ XNZVC 14244: // 0 ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ Xｱ*00 Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0 14245: // 1 ................0ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿ ﾀ0*0ﾀ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿ==0 14246: // : 14247: // 15 ................000000000000000ｱ ｲ0*0ｲ Z=ｱ==0 14248: // 16 ................0000000000000000 ｱ010ｱ 14249: // 17 ................0000000000000000 00100 14250: // CCR 14251: // X countが0のとき変化しない。他は最後に押し出されたビット 14252: // N 結果の最上位ビット 14253: // Z 結果が0のときセット。他はクリア 14254: // V 常にクリア 14255: // C countが0のときクリア。他は最後に押し出されたビット 14256: public static void irpLsrToMem () throws M68kException { 14257: XEiJ.mpuCycleCount++; 14258: int ea = XEiJ.regOC & 63; 14259: int a = efaMltWord (ea); 14260: int x = mmuModifyWordZeroData (a, XEiJ.regSRS); 14261: int z = x >>> 1; 14262: mmuWriteWordData (a, z, XEiJ.regSRS); 14263: XEiJ.regCCR = ((z == 0 ? XEiJ.REG_CCR_Z : 0) | 14264: -(x & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //XとCは最後に押し出されたビット 14265: } //irpLsrToMem 14266: 14267: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 14268: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 14269: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 14270: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 14271: //LSL.W <ea> |-|012346|-|UUUUU|***0*| M+-WXZ |1110_001_111_mmm_rrr 14272: // 14273: //LSL.W #<data>,Dr 14274: //LSL.W Dq,Dr 14275: //LSL.W <ea> 14276: // 論理左シフトワード 14277: // ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ XNZVC 14278: // 0 ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ Xｱ*00 Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0 14279: // 1 ................ｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ0 ｱｲ*0ｱ Z=ｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0 14280: // : 14281: // 15 ................ﾀ000000000000000 ｿﾀ*0ｿ Z=ﾀ==0 14282: // 16 ................0000000000000000 ﾀ010ﾀ 14283: // 17 ................0000000000000000 00100 14284: // CCR 14285: // X countが0のとき変化しない。他は最後に押し出されたビット 14286: // N 結果の最上位ビット 14287: // Z 結果が0のときセット。他はクリア 14288: // V 常にクリア 14289: // C countが0のときクリア。他は最後に押し出されたビット 14290: public static void irpLslToMem () throws M68kException { 14291: XEiJ.mpuCycleCount++; 14292: int ea = XEiJ.regOC & 63; 14293: int a = efaMltWord (ea); 14294: int x = mmuModifyWordSignData (a, XEiJ.regSRS); 14295: int z = (short) (x << 1); 14296: mmuWriteWordData (a, z, XEiJ.regSRS); 14297: XEiJ.regCCR = ((z < 0 ? XEiJ.REG_CCR_N : 0) | 14298: (z == 0 ? XEiJ.REG_CCR_Z : 0) | 14299: x >> 15 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //XとCは最後に押し出されたビット 14300: } //irpLslToMem 14301: 14302: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 14303: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 14304: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 14305: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 14306: //ROXR.W <ea> |-|012346|-|*UUUU|***0*| M+-WXZ |1110_010_011_mmm_rrr 14307: // 14308: //ROXR.W #<data>,Dr 14309: //ROXR.W Dq,Dr 14310: //ROXR.W <ea> 14311: // 拡張右ローテートワード 14312: // ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ XNZVC 14313: // 0 ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ Xｱ*0X Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0 14314: // 1 ................Xｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿ ﾀX*0ﾀ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿX==0 14315: // 2 ................ﾀXｱｲｳｴｵｶｷｸｹｺｻｼｽｾ ｿﾀ*0ｿ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾﾀX==0 14316: // : 14317: // 15 ................ｳｴｵｶｷｸｹｺｻｼｽｾｿﾀXｱ ｲｳ*0ｲ Z=ｱｳｴｵｶｷｸｹｺｻｼｽｾｿﾀX==0 14318: // 16 ................ｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀX ｱｲ*0ｱ Z=ｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀX==0 14319: // 17 ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ Xｱ*0X Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0 14320: // CCR 14321: // X countが0のとき変化しない。他は最後に押し出されたビット 14322: // N 結果の最上位ビット 14323: // Z 結果が0のときセット。他はクリア 14324: // V 常にクリア 14325: // C countが0のときXのコピー。他は最後に押し出されたビット 14326: public static void irpRoxrToMem () throws M68kException { 14327: XEiJ.mpuCycleCount++; 14328: int ea = XEiJ.regOC & 63; 14329: int a = efaMltWord (ea); 14330: int x = mmuModifyWordZeroData (a, XEiJ.regSRS); 14331: int z = -(XEiJ.regCCR & XEiJ.REG_CCR_X) << 15 - 4 | x >>> 1; 14332: mmuWriteWordData (a, z, XEiJ.regSRS); 14333: XEiJ.regCCR = ((z < 0 ? XEiJ.REG_CCR_N : 0) | 14334: (z == 0 ? XEiJ.REG_CCR_Z : 0) | 14335: -(x & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //XとCは最後に押し出されたビット 14336: } //irpRoxrToMem 14337: 14338: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 14339: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 14340: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 14341: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 14342: //ROXL.W <ea> |-|012346|-|*UUUU|***0*| M+-WXZ |1110_010_111_mmm_rrr 14343: // 14344: //ROXL.W #<data>,Dr 14345: //ROXL.W Dq,Dr 14346: //ROXL.W <ea> 14347: // 拡張左ローテートワード 14348: // ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ XNZVC 14349: // 0 ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ Xｱ*0X Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0 14350: // 1 ................ｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀX ｱｲ*0ｱ Z=ｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀX==0 14351: // 2 ................ｳｴｵｶｷｸｹｺｻｼｽｾｿﾀXｱ ｲｳ*0ｲ Z=ｱｳｴｵｶｷｸｹｺｻｼｽｾｿﾀX==0 14352: // : 14353: // 15 ................ﾀXｱｲｳｴｵｶｷｸｹｺｻｼｽｾ ｿﾀ*0ｿ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾﾀX==0 14354: // 16 ................Xｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿ ﾀX*0ﾀ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿX==0 14355: // 17 ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ Xｱ*0X Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0 14356: // CCR 14357: // X countが0のとき変化しない。他は最後に押し出されたビット 14358: // N 結果の最上位ビット 14359: // Z 結果が0のときセット。他はクリア 14360: // V 常にクリア 14361: // C countが0のときXのコピー。他は最後に押し出されたビット 14362: public static void irpRoxlToMem () throws M68kException { 14363: XEiJ.mpuCycleCount++; 14364: int ea = XEiJ.regOC & 63; 14365: int a = efaMltWord (ea); 14366: int x = mmuModifyWordSignData (a, XEiJ.regSRS); 14367: int z = (short) (x << 1 | XEiJ.regCCR >> 4 & 1); 14368: mmuWriteWordData (a, z, XEiJ.regSRS); 14369: XEiJ.regCCR = ((z < 0 ? XEiJ.REG_CCR_N : 0) | 14370: (z == 0 ? XEiJ.REG_CCR_Z : 0) | 14371: x >> 15 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //XとCは最後に押し出されたビット 14372: } //irpRoxlToMem 14373: 14374: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 14375: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 14376: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 14377: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 14378: //ROR.W <ea> |-|012346|-|-UUUU|-**0*| M+-WXZ |1110_011_011_mmm_rrr 14379: // 14380: //ROR.W #<data>,Dr 14381: //ROR.W Dq,Dr 14382: //ROR.W <ea> 14383: // 右ローテートワード 14384: // ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ XNZVC 14385: // 0 ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ Xｱ*00 Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0 14386: // 1 ................ﾀｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿ Xﾀ*0ﾀ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0 14387: // : 14388: // 15 ................ｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀｱ Xｲ*0ｲ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0 14389: // 16 ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ Xｱ*0ｱ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0 14390: // CCR 14391: // X 常に変化しない 14392: // N 結果の最上位ビット 14393: // Z 結果が0のときセット。他はクリア 14394: // V 常にクリア 14395: // C countが0のときクリア。他は結果の最上位ビット 14396: public static void irpRorToMem () throws M68kException { 14397: XEiJ.mpuCycleCount++; 14398: int ea = XEiJ.regOC & 63; 14399: int a = efaMltWord (ea); 14400: int x = mmuModifyWordZeroData (a, XEiJ.regSRS); 14401: int z = (short) (x << 15 | x >>> 1); 14402: mmuWriteWordData (a, z, XEiJ.regSRS); 14403: XEiJ.regCCR = (XEiJ.regCCR & XEiJ.REG_CCR_X | //Xは変化しない 14404: (z < 0 ? XEiJ.REG_CCR_N : 0) | 14405: (z == 0 ? XEiJ.REG_CCR_Z : 0) | 14406: z >>> 31); //Cは結果の最上位ビット 14407: } //irpRorToMem 14408: 14409: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 14410: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 14411: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 14412: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 14413: //ROL.W <ea> |-|012346|-|-UUUU|-**0*| M+-WXZ |1110_011_111_mmm_rrr 14414: // 14415: //ROL.W #<data>,Dr 14416: //ROL.W Dq,Dr 14417: //ROL.W <ea> 14418: // 左ローテートワード 14419: // ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ XNZVC 14420: // 0 ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ Xｱ*00 Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0 14421: // 1 ................ｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀｱ Xｲ*0ｱ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0 14422: // : 14423: // 15 ................ﾀｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿ Xﾀ*0ｿ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0 14424: // 16 ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ Xｱ*0ﾀ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0 14425: // CCR 14426: // X 常に変化しない 14427: // N 結果の最上位ビット 14428: // Z 結果が0のときセット。他はクリア 14429: // V 常にクリア 14430: // C countが0のときクリア。他は結果の最下位ビット 14431: public static void irpRolToMem () throws M68kException { 14432: XEiJ.mpuCycleCount++; 14433: int ea = XEiJ.regOC & 63; 14434: int a = efaMltWord (ea); 14435: int x = mmuModifyWordZeroData (a, XEiJ.regSRS); 14436: int z = (short) (x << 1 | x >>> 15); 14437: mmuWriteWordData (a, z, XEiJ.regSRS); 14438: XEiJ.regCCR = (XEiJ.regCCR & XEiJ.REG_CCR_X | //Xは変化しない 14439: (z < 0 ? XEiJ.REG_CCR_N : 0) | 14440: (z == 0 ? XEiJ.REG_CCR_Z : 0) | 14441: z & 1); //Cは結果の最下位ビット 14442: } //irpRolToMem 14443: 14444: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 14445: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 14446: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 14447: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 14448: //BFTST <ea>{#o:#w} |-|--2346|-|-UUUU|-**00|D M WXZP |1110_100_011_mmm_rrr-00000ooooo0wwwww 14449: //BFTST <ea>{#o:Dw} |-|--2346|-|-UUUU|-**00|D M WXZP |1110_100_011_mmm_rrr-00000ooooo100www 14450: //BFTST <ea>{Do:#w} |-|--2346|-|-UUUU|-**00|D M WXZP |1110_100_011_mmm_rrr-0000100ooo0wwwww 14451: //BFTST <ea>{Do:Dw} |-|--2346|-|-UUUU|-**00|D M WXZP |1110_100_011_mmm_rrr-0000100ooo100www 14452: public static void irpBftst () throws M68kException { 14453: int w = mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); //pcwz。拡張ワード 14454: if ((w & ~0b0000_111_111_111_111) != 0 || 14455: (w & 0b0000_111_111_000_000) > 0b0000_100_111_000_000 || 14456: (w & 0b0000_000_000_111_111) > 0b0000_000_000_100_111) { 14457: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 14458: throw M68kException.m6eSignal; 14459: } 14460: int o = w << 31 - 11 >= 0 ? w >> 6 & 31 : XEiJ.regRn[w >> 6 & 7]; //o=offset 14461: w = -(w << 31 - 5 >= 0 ? w : XEiJ.regRn[w & 7]) & 31; //w=32-width。1<=width<=32なので0<=32-width<=31 14462: XEiJ.mpuCycleCount += 6; 14463: int ea = XEiJ.regOC & 63; 14464: int z; 14465: if (ea < XEiJ.EA_AR) { //BFTST Dr{～} 14466: z = XEiJ.regRn[ea]; 14467: z = z << o | z >>> -o; //下位からはみ出したフィールドは上位に戻る 14468: } else { //BFTST <mem>{～} 14469: int a = efaCntLong (ea) + (o >> 3); //フィールドの最上位ビットを含むバイトのアドレス 14470: o &= 7; 14471: z = 31 - w + o >> 3; //フィールドが跨ぐバイト境界の数。0～4 14472: z = (z == 0 ? mmuReadByteSignData (m60Address = a, XEiJ.regSRS) << 24 + o : //不要なバイトにアクセスしない 14473: z == 1 ? mmuReadWordSignData (m60Address = a, XEiJ.regSRS) << 16 + o : //020以上なのでアドレスエラーは出ない 14474: z == 2 ? (mmuReadWordSignData (m60Address = a, XEiJ.regSRS) << 8 | mmuReadByteZeroData (a + 2, XEiJ.regSRS)) << 8 + o : 14475: z == 3 ? mmuReadLongData (m60Address = a, XEiJ.regSRS) << o : 14476: mmuReadLongData (m60Address = a, XEiJ.regSRS) << o | mmuReadByteZeroData (m60Address = a + 4, XEiJ.regSRS) >>> 8 - o); 14477: } 14478: z >>= w; //符号拡張。下位のゴミを消す 14479: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 14480: } //irpBftst 14481: 14482: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 14483: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 14484: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 14485: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 14486: //BFEXTU <ea>{#o:#w},Dn |-|--2346|-|-UUUU|-**00|D M WXZP |1110_100_111_mmm_rrr-0nnn0ooooo0wwwww 14487: //BFEXTU <ea>{#o:Dw},Dn |-|--2346|-|-UUUU|-**00|D M WXZP |1110_100_111_mmm_rrr-0nnn0ooooo100www 14488: //BFEXTU <ea>{Do:#w},Dn |-|--2346|-|-UUUU|-**00|D M WXZP |1110_100_111_mmm_rrr-0nnn100ooo0wwwww 14489: //BFEXTU <ea>{Do:Dw},Dn |-|--2346|-|-UUUU|-**00|D M WXZP |1110_100_111_mmm_rrr-0nnn100ooo100www 14490: public static void irpBfextu () throws M68kException { 14491: int w = mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); //pcwz。拡張ワード 14492: if ((w & ~0b0111_111_111_111_111) != 0 || 14493: (w & 0b0000_111_111_000_000) > 0b0000_100_111_000_000 || 14494: (w & 0b0000_000_000_111_111) > 0b0000_000_000_100_111) { 14495: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 14496: throw M68kException.m6eSignal; 14497: } 14498: int n = w >> 12; 14499: int o = w << 31 - 11 >= 0 ? w >> 6 & 31 : XEiJ.regRn[w >> 6 & 7]; //o=offset 14500: w = -(w << 31 - 5 >= 0 ? w : XEiJ.regRn[w & 7]) & 31; //w=32-width。1<=width<=32なので0<=32-width<=31 14501: XEiJ.mpuCycleCount += 6; 14502: int ea = XEiJ.regOC & 63; 14503: int z; 14504: if (ea < XEiJ.EA_AR) { //BFEXTU Dr{～} 14505: z = XEiJ.regRn[ea]; 14506: z = z << o | z >>> -o; //下位からはみ出したフィールドは上位に戻る 14507: } else { //BFEXTU <mem>{～} 14508: int a = efaCntLong (ea) + (o >> 3); 14509: o &= 7; 14510: z = 31 - w + o >> 3; 14511: z = (z == 0 ? mmuReadByteSignData (m60Address = a, XEiJ.regSRS) << 24 + o : //不要なバイトにアクセスしない 14512: z == 1 ? mmuReadWordSignData (m60Address = a, XEiJ.regSRS) << 16 + o : //020以上なのでアドレスエラーは出ない 14513: z == 2 ? (mmuReadWordSignData (m60Address = a, XEiJ.regSRS) << 8 | mmuReadByteZeroData (a + 2, XEiJ.regSRS)) << 8 + o : 14514: z == 3 ? mmuReadLongData (m60Address = a, XEiJ.regSRS) << o : 14515: mmuReadLongData (m60Address = a, XEiJ.regSRS) << o | mmuReadByteZeroData (m60Address = a + 4, XEiJ.regSRS) >>> 8 - o); 14516: } 14517: XEiJ.regRn[n] = z >>> w; //ゼロ拡張 14518: z >>= w; //符号拡張。下位のゴミを消す 14519: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 14520: } //irpBfextu 14521: 14522: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 14523: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 14524: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 14525: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 14526: //BFCHG <ea>{#o:#w} |-|--2346|-|-UUUU|-**00|D M WXZ |1110_101_011_mmm_rrr-00000ooooo0wwwww 14527: //BFCHG <ea>{#o:Dw} |-|--2346|-|-UUUU|-**00|D M WXZ |1110_101_011_mmm_rrr-00000ooooo100www 14528: //BFCHG <ea>{Do:#w} |-|--2346|-|-UUUU|-**00|D M WXZ |1110_101_011_mmm_rrr-0000100ooo0wwwww 14529: //BFCHG <ea>{Do:Dw} |-|--2346|-|-UUUU|-**00|D M WXZ |1110_101_011_mmm_rrr-0000100ooo100www 14530: public static void irpBfchg () throws M68kException { 14531: int w = mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); //pcwz。拡張ワード 14532: if ((w & ~0b0000_111_111_111_111) != 0 || 14533: (w & 0b0000_111_111_000_000) > 0b0000_100_111_000_000 || 14534: (w & 0b0000_000_000_111_111) > 0b0000_000_000_100_111) { 14535: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 14536: throw M68kException.m6eSignal; 14537: } 14538: int o = w << 31 - 11 >= 0 ? w >> 6 & 31 : XEiJ.regRn[w >> 6 & 7]; //o=offset 14539: w = -(w << 31 - 5 >= 0 ? w : XEiJ.regRn[w & 7]) & 31; //w=32-width。1<=width<=32なので0<=32-width<=31 14540: XEiJ.mpuCycleCount += 8; 14541: int ea = XEiJ.regOC & 63; 14542: int z; 14543: if (ea < XEiJ.EA_AR) { //BFCHG Dr{～} 14544: z = XEiJ.regRn[ea]; 14545: z = z << o | z >>> -o; //下位からはみ出したフィールドは上位に戻る 14546: int t = z ^ -1 << w; //フィールドの幅だけ反転する 14547: XEiJ.regRn[ea] = t << -o | t >>> o; 14548: } else { //BFCHG <mem>{～} 14549: int a = efaCltLong (ea) + (o >> 3); //フィールドの最上位ビットを含むバイトのアドレス 14550: o &= 7; 14551: z = 31 - w + o >> 3; //フィールドが跨ぐバイト境界の数。0～4 14552: if (z == 0) { 14553: // <ea>{2,5} o=2,w=32-5=27 <ea> --abcde- 14554: int t = mmuModifyByteSignData (a, XEiJ.regSRS) << 24; // t --abcde- 00000000 00000000 00000000 不要なバイトにアクセスしない 14555: z = t << o; // z abcde-00 00000000 00000000 00000000 14556: // // -1<<w 11111000 00000000 00000000 00000000 14557: // // -1<<w>>>o 00111110 00000000 00000000 00000000 14558: // //t^-1<<w>>>o --ABCDE- 00000000 00000000 00000000 14559: mmuWriteByteData (a, (t ^ -1 << w >>> o) >>> 24, XEiJ.regSRS); // <ea> --ABCDE- 14560: } else if (z == 1) { 14561: // <ea>{7,5} o=7,w=32-5=27 <ea> -------a bcde---- 14562: int t = mmuModifyWordSignData (a, XEiJ.regSRS) << 16; // t -------a bcde---- 00000000 00000000 020以上なのでアドレスエラーは出ない 14563: z = t << o; // z abcde--- -0000000 00000000 00000000 14564: // // -1<<w 11111000 00000000 00000000 00000000 14565: // // -1<<w>>>o 00000001 11110000 00000000 00000000 14566: // //t^-1<<w>>>o -------A BCDE---- 00000000 00000000 14567: mmuWriteWordData (a, (t ^ -1 << w >>> o) >>> 16, XEiJ.regSRS); // <ea> -------A BCDE---- 14568: } else if (z == 2) { 14569: // <ea>{7,12} o=7,w=32-12=20 <ea> -------a bcdefghi jkl----- 14570: int t = mmuModifyWordSignData (a, XEiJ.regSRS) << 16 | mmuModifyByteZeroData (a + 2, XEiJ.regSRS) << 8; // t -------a bcdefghi jkl----- 00000000 14571: z = t << o; // z abcdefgh ijkl---- -0000000 00000000 14572: // // -1<<w 11111111 11110000 00000000 00000000 14573: // // -1<<w>>>o 00000001 11111111 11100000 00000000 14574: t ^= -1 << w >>> o; // t -------A BCDEFGHI JKL----- 00000000 14575: mmuWriteWordData (a, t >>> 16, XEiJ.regSRS); // <ea> -------A BCDEFGHI jkl----- 14576: mmuWriteByteData (a + 2, t >>> 8, XEiJ.regSRS); // <ea> -------A BCDEFGHI JKL----- 14577: } else if (z == 3) { 14578: // <ea>{7,19} o=7,w=32-19=13 <ea> -------a bcdefghi jklmnopq rs------ 14579: int t = mmuModifyLongData (a, XEiJ.regSRS); // t -------a bcdefghi jklmnopq rs------ 14580: z = t << o; // z abcdefgh ijklmnop qrs----- -0000000 14581: // // -1<<w 11111111 11111111 11100000 00000000 14582: // // -1<<w>>>o 00000001 11111111 11111111 11000000 14583: mmuWriteLongData (a, t ^ -1 << w >>> o, XEiJ.regSRS); // <ea> -------A BCDEFGHI JKLMNOPQ RS------ 14584: } else { 14585: // <ea>{7,26} o=7,w=32-26=6 <ea> -------a bcdefghi jklmnopq rstuvwxy z------- 14586: int t = mmuModifyLongData (a, XEiJ.regSRS); // t -------a bcdefghi jklmnopq rstuvwxy 14587: z = t << o; // z abcdefgh ijklmnop qrstuvwx y0000000 14588: // -1>>>o 00000001 11111111 11111111 11111111 14589: mmuWriteLongData (a, t ^ -1 >>> o, XEiJ.regSRS); // <ea> -------A BCDEFGHI JKLMNOPQ RSTUVWXY 14590: t = mmuModifyByteZeroData (a + 4, XEiJ.regSRS); // t 00000000 00000000 00000000 z------- 14591: // // t>>>8-o 00000000 00000000 00000000 0z------ 14592: z |= t >>> 8 - o; // z abcdefgh ijklmnop qrstuvwx yz------ 14593: // // -1<<8-o+w 11111111 11111111 11111111 10000000 14594: mmuWriteByteData (a + 4, t ^ -1 << 8 - o + w, XEiJ.regSRS); // <ea> -------A BCDEFGHI JKLMNOPQ RSTUVWXY Z------- 14595: } 14596: } 14597: z >>= w; //符号拡張。下位のゴミを消す 14598: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 14599: } //irpBfchg 14600: 14601: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 14602: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 14603: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 14604: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 14605: //BFEXTS <ea>{#o:#w},Dn |-|--2346|-|-UUUU|-**00|D M WXZP |1110_101_111_mmm_rrr-0nnn0ooooo0wwwww 14606: //BFEXTS <ea>{#o:Dw},Dn |-|--2346|-|-UUUU|-**00|D M WXZP |1110_101_111_mmm_rrr-0nnn0ooooo100www 14607: //BFEXTS <ea>{Do:#w},Dn |-|--2346|-|-UUUU|-**00|D M WXZP |1110_101_111_mmm_rrr-0nnn100ooo0wwwww 14608: //BFEXTS <ea>{Do:Dw},Dn |-|--2346|-|-UUUU|-**00|D M WXZP |1110_101_111_mmm_rrr-0nnn100ooo100www 14609: public static void irpBfexts () throws M68kException { 14610: int w = mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); //pcwz。拡張ワード 14611: if ((w & ~0b0111_111_111_111_111) != 0 || 14612: (w & 0b0000_111_111_000_000) > 0b0000_100_111_000_000 || 14613: (w & 0b0000_000_000_111_111) > 0b0000_000_000_100_111) { 14614: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 14615: throw M68kException.m6eSignal; 14616: } 14617: int n = w >> 12; 14618: int o = w << 31 - 11 >= 0 ? w >> 6 & 31 : XEiJ.regRn[w >> 6 & 7]; //o=offset 14619: w = -(w << 31 - 5 >= 0 ? w : XEiJ.regRn[w & 7]) & 31; //w=32-width。1<=width<=32なので0<=32-width<=31 14620: XEiJ.mpuCycleCount += 6; 14621: int ea = XEiJ.regOC & 63; 14622: int z; 14623: if (ea < XEiJ.EA_AR) { //BFEXTS Dr{～} 14624: z = XEiJ.regRn[ea]; 14625: z = z << o | z >>> -o; //下位からはみ出したフィールドは上位に戻る 14626: } else { //BFEXTS <mem>{～} 14627: int a = efaCntLong (ea) + (o >> 3); //フィールドの最上位ビットを含むバイトのアドレス 14628: o &= 7; 14629: z = 31 - w + o >> 3; //フィールドが跨ぐバイト境界の数。0～4 14630: z = (z == 0 ? mmuReadByteSignData (m60Address = a, XEiJ.regSRS) << 24 + o : //不要なバイトにアクセスしない 14631: z == 1 ? mmuReadWordSignData (m60Address = a, XEiJ.regSRS) << 16 + o : //020以上なのでアドレスエラーは出ない 14632: z == 2 ? (mmuReadWordSignData (m60Address = a, XEiJ.regSRS) << 8 | mmuReadByteZeroData (a + 2, XEiJ.regSRS)) << 8 + o : 14633: z == 3 ? mmuReadLongData (m60Address = a, XEiJ.regSRS) << o : 14634: mmuReadLongData (m60Address = a, XEiJ.regSRS) << o | mmuReadByteZeroData (m60Address = a + 4, XEiJ.regSRS) >>> 8 - o); 14635: } 14636: XEiJ.regRn[n] = z >>= w; //符号拡張。下位のゴミを消す 14637: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 14638: } //irpBfexts 14639: 14640: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 14641: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 14642: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 14643: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 14644: //BFCLR <ea>{#o:#w} |-|--2346|-|-UUUU|-**00|D M WXZ |1110_110_011_mmm_rrr-00000ooooo0wwwww 14645: //BFCLR <ea>{#o:Dw} |-|--2346|-|-UUUU|-**00|D M WXZ |1110_110_011_mmm_rrr-00000ooooo100www 14646: //BFCLR <ea>{Do:#w} |-|--2346|-|-UUUU|-**00|D M WXZ |1110_110_011_mmm_rrr-0000100ooo0wwwww 14647: //BFCLR <ea>{Do:Dw} |-|--2346|-|-UUUU|-**00|D M WXZ |1110_110_011_mmm_rrr-0000100ooo100www 14648: public static void irpBfclr () throws M68kException { 14649: int w = mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); //pcwz。拡張ワード 14650: if ((w & ~0b0000_111_111_111_111) != 0 || 14651: (w & 0b0000_111_111_000_000) > 0b0000_100_111_000_000 || 14652: (w & 0b0000_000_000_111_111) > 0b0000_000_000_100_111) { 14653: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 14654: throw M68kException.m6eSignal; 14655: } 14656: int o = w << 31 - 11 >= 0 ? w >> 6 & 31 : XEiJ.regRn[w >> 6 & 7]; //o=offset 14657: w = -(w << 31 - 5 >= 0 ? w : XEiJ.regRn[w & 7]) & 31; //w=32-width。1<=width<=32なので0<=32-width<=31 14658: XEiJ.mpuCycleCount += 8; 14659: int ea = XEiJ.regOC & 63; 14660: int z; 14661: if (ea < XEiJ.EA_AR) { //BFCLR Dr{～} 14662: z = XEiJ.regRn[ea]; 14663: z = z << o | z >>> -o; //下位からはみ出したフィールドは上位に戻る 14664: int t = z & ~(-1 << w); //フィールドの幅だけ0を並べる 14665: XEiJ.regRn[ea] = t << -o | t >>> o; 14666: } else { //BFCLR <mem>{～} 14667: int a = efaCltLong (ea) + (o >> 3); //フィールドの最上位ビットを含むバイトのアドレス 14668: o &= 7; 14669: z = 31 - w + o >> 3; //フィールドが跨ぐバイト境界の数。0～4 14670: if (z == 0) { 14671: // <ea>{2,5} o=2,w=32-5=27 <ea> --abcde- 14672: int t = mmuModifyByteSignData (a, XEiJ.regSRS) << 24; // t --abcde- 00000000 00000000 00000000 不要なバイトにアクセスしない 14673: z = t << o; // z abcde-00 00000000 00000000 00000000 14674: // // -1<<w 11111000 00000000 00000000 00000000 14675: // // -1<<w>>>o 00111110 00000000 00000000 00000000 14676: // //~(-1<<w>>>o) 11000001 11111111 11111111 11111111 14677: // //t&~(-1<<w>>>o) --00000- 00000000 00000000 00000000 14678: mmuWriteByteData (a, (t & ~(-1 << w >>> o)) >>> 24, XEiJ.regSRS); // <ea> --00000- 14679: } else if (z == 1) { 14680: // <ea>{7,5} o=7,w=32-5=27 <ea> -------a bcde---- 14681: int t = mmuModifyWordSignData (a, XEiJ.regSRS) << 16; // t -------a bcde---- 00000000 00000000 020以上なのでアドレスエラーは出ない 14682: z = t << o; // z abcde--- -0000000 00000000 00000000 14683: // // -1<<w 11111000 00000000 00000000 00000000 14684: // // -1<<w>>>o 00000001 11110000 00000000 00000000 14685: // //~(-1<<w>>>o) 11111110 00001111 11111111 11111111 14686: // //t&~(-1<<w>>>o) -------0 0000---- 00000000 00000000 14687: mmuWriteWordData (a, (t & ~(-1 << w >>> o)) >>> 16, XEiJ.regSRS); // <ea> -------0 0000---- 14688: } else if (z == 2) { 14689: // <ea>{7,12} o=7,w=32-12=20 <ea> -------a bcdefghi jkl----- 14690: int t = mmuModifyWordSignData (a, XEiJ.regSRS) << 16 | mmuModifyByteZeroData (a + 2, XEiJ.regSRS) << 8; // t -------a bcdefghi jkl----- 00000000 14691: z = t << o; // z abcdefgh ijkl---- -0000000 00000000 14692: // // -1<<w 11111111 11110000 00000000 00000000 14693: // // -1<<w>>>o 00000001 11111111 11100000 00000000 14694: // //~(-1<<w>>>o) 11111110 00000000 00011111 11111111 14695: t &= ~(-1 << w >>> o); // t -------0 00000000 000----- 00000000 14696: mmuWriteWordData (a, t >>> 16, XEiJ.regSRS); // <ea> -------0 00000000 jkl----- 14697: mmuWriteByteData (a + 2, t >>> 8, XEiJ.regSRS); // <ea> -------0 00000000 000----- 14698: } else if (z == 3) { 14699: // <ea>{7,19} o=7,w=32-19=13 <ea> -------a bcdefghi jklmnopq rs------ 14700: int t = mmuModifyLongData (a, XEiJ.regSRS); // t -------a bcdefghi jklmnopq rs------ 14701: z = t << o; // z abcdefgh ijklmnop qrs----- -0000000 14702: // // -1<<w 11111111 11111111 11100000 00000000 14703: // // -1<<w>>>o 00000001 11111111 11111111 11000000 14704: // //~(-1<<w>>>o) 11111110 00000000 00000000 00111111 14705: mmuWriteLongData (a, t & ~(-1 << w >>> o), XEiJ.regSRS); // <ea> -------0 00000000 00000000 00------ 14706: } else { 14707: // <ea>{7,26} o=7,w=32-26=6 <ea> -------a bcdefghi jklmnopq rstuvwxy z------- 14708: int t = mmuModifyLongData (a, XEiJ.regSRS); // t -------a bcdefghi jklmnopq rstuvwxy 14709: z = t << o; // z abcdefgh ijklmnop qrstuvwx y0000000 14710: // -1>>>o 00000001 11111111 11111111 11111111 14711: // ~(-1>>>o) 11111110 00000000 00000000 00000000 14712: mmuWriteLongData (a, t & ~(-1 >>> o), XEiJ.regSRS); // <ea> -------0 00000000 00000000 00000000 14713: t = mmuModifyByteZeroData (a + 4, XEiJ.regSRS); // t 00000000 00000000 00000000 z------- 14714: // // t>>>8-o 00000000 00000000 00000000 0z------ 14715: z |= t >>> 8 - o; // z abcdefgh ijklmnop qrstuvwx yz------ 14716: // // -1<<8-o+w 11111111 11111111 11111111 10000000 14717: // //~(-1<<8-o+w) 00000000 00000000 00000000 01111111 14718: mmuWriteByteData (a + 4, t & ~(-1 << 8 - o + w), XEiJ.regSRS); // <ea> -------0 00000000 00000000 00000000 0------- 14719: } 14720: } 14721: z >>= w; //符号拡張。下位のゴミを消す 14722: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 14723: } //irpBfclr 14724: 14725: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 14726: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 14727: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 14728: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 14729: //BFFFO <ea>{#o:#w},Dn |-|--2346|-|-UUUU|-**00|D M WXZP |1110_110_111_mmm_rrr-0nnn0ooooo0wwwww 14730: //BFFFO <ea>{#o:Dw},Dn |-|--2346|-|-UUUU|-**00|D M WXZP |1110_110_111_mmm_rrr-0nnn0ooooo100www 14731: //BFFFO <ea>{Do:#w},Dn |-|--2346|-|-UUUU|-**00|D M WXZP |1110_110_111_mmm_rrr-0nnn100ooo0wwwww 14732: //BFFFO <ea>{Do:Dw},Dn |-|--2346|-|-UUUU|-**00|D M WXZP |1110_110_111_mmm_rrr-0nnn100ooo100www 14733: public static void irpBfffo () throws M68kException { 14734: int w = mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); //pcwz。拡張ワード 14735: if ((w & ~0b0111_111_111_111_111) != 0 || 14736: (w & 0b0000_111_111_000_000) > 0b0000_100_111_000_000 || 14737: (w & 0b0000_000_000_111_111) > 0b0000_000_000_100_111) { 14738: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 14739: throw M68kException.m6eSignal; 14740: } 14741: int n = w >> 12; 14742: int o = w << 31 - 11 >= 0 ? w >> 6 & 31 : XEiJ.regRn[w >> 6 & 7]; //o=offset 14743: w = -(w << 31 - 5 >= 0 ? w : XEiJ.regRn[w & 7]) & 31; //w=32-width。1<=width<=32なので0<=32-width<=31 14744: XEiJ.mpuCycleCount += 9; 14745: int ea = XEiJ.regOC & 63; 14746: int z; 14747: if (ea < XEiJ.EA_AR) { //BFFFO Dr{～} 14748: z = XEiJ.regRn[ea]; 14749: z = z << o | z >>> -o; //下位からはみ出したフィールドは上位に戻る 14750: } else { //BFFFO <mem>{～} 14751: int a = efaCntLong (ea) + (o >> 3); //フィールドの最上位ビットを含むバイトのアドレス 14752: int o7 = o & 7; 14753: z = 31 - w + o7 >> 3; //フィールドが跨ぐバイト境界の数。0～4 14754: z = (z == 0 ? mmuReadByteSignData (m60Address = a, XEiJ.regSRS) << 24 + o7 : //不要なバイトにアクセスしない 14755: z == 1 ? mmuReadWordSignData (m60Address = a, XEiJ.regSRS) << 16 + o7 : //020以上なのでアドレスエラーは出ない 14756: z == 2 ? (mmuReadWordSignData (m60Address = a, XEiJ.regSRS) << 8 | mmuReadByteZeroData (a + 2, XEiJ.regSRS)) << 8 + o7 : 14757: z == 3 ? mmuReadLongData (m60Address = a, XEiJ.regSRS) << o7 : 14758: mmuReadLongData (m60Address = a, XEiJ.regSRS) << o7 | mmuReadByteZeroData (m60Address = a + 4, XEiJ.regSRS) >>> 8 - o7); 14759: } 14760: if (true) { 14761: XEiJ.regRn[n] = Integer.numberOfLeadingZeros (z >>> w) - w + o; //ゼロ拡張してから1のビットを探す。見つからないときはoffset+widthになる 14762: } else { 14763: int t = z >>> w; 14764: if (t == 0) { 14765: XEiJ.regRn[n] = 32 - w + o; 14766: } else { 14767: int k = -(t >>> 16) >> 16 & 16; 14768: k += -(t >>> k + 8) >> 8 & 8; 14769: k += -(t >>> k + 4) >> 4 & 4; 14770: // bit3 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 14771: // bit2 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 14772: // bit1 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 14773: // bit0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 14774: XEiJ.regRn[n] = ((0b11_11_11_11_11_11_11_11_10_10_10_10_01_01_00_00 >>> (t >>> k << 1)) & 3) + k - w + o; //intのシフトカウントは下位5bitだけが使用される 14775: } 14776: } 14777: z >>= w; //符号拡張。下位のゴミを消す 14778: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 14779: } //irpBfffo 14780: 14781: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 14782: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 14783: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 14784: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 14785: //BFSET <ea>{#o:#w} |-|--2346|-|-UUUU|-**00|D M WXZ |1110_111_011_mmm_rrr-00000ooooo0wwwww 14786: //BFSET <ea>{#o:Dw} |-|--2346|-|-UUUU|-**00|D M WXZ |1110_111_011_mmm_rrr-00000ooooo100www 14787: //BFSET <ea>{Do:#w} |-|--2346|-|-UUUU|-**00|D M WXZ |1110_111_011_mmm_rrr-0000100ooo0wwwww 14788: //BFSET <ea>{Do:Dw} |-|--2346|-|-UUUU|-**00|D M WXZ |1110_111_011_mmm_rrr-0000100ooo100www 14789: public static void irpBfset () throws M68kException { 14790: int w = mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); //pcwz。拡張ワード 14791: if ((w & ~0b0000_111_111_111_111) != 0 || 14792: (w & 0b0000_111_111_000_000) > 0b0000_100_111_000_000 || 14793: (w & 0b0000_000_000_111_111) > 0b0000_000_000_100_111) { 14794: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 14795: throw M68kException.m6eSignal; 14796: } 14797: int o = w << 31 - 11 >= 0 ? w >> 6 & 31 : XEiJ.regRn[w >> 6 & 7]; //o=offset 14798: w = -(w << 31 - 5 >= 0 ? w : XEiJ.regRn[w & 7]) & 31; //w=32-width。1<=width<=32なので0<=32-width<=31 14799: XEiJ.mpuCycleCount += 8; 14800: int ea = XEiJ.regOC & 63; 14801: int z; 14802: if (ea < XEiJ.EA_AR) { //BFSET Dr{～} 14803: z = XEiJ.regRn[ea]; 14804: z = z << o | z >>> -o; //下位からはみ出したフィールドは上位に戻る 14805: int t = z | -1 << w; //フィールドの幅だけ1を並べる 14806: XEiJ.regRn[ea] = t << -o | t >>> o; 14807: } else { //BFSET <mem>{～} 14808: int a = efaCltLong (ea) + (o >> 3); //フィールドの最上位ビットを含むバイトのアドレス 14809: o &= 7; 14810: z = 31 - w + o >> 3; //フィールドが跨ぐバイト境界の数。0～4 14811: if (z == 0) { 14812: // <ea>{2,5} o=2,w=32-5=27 <ea> --abcde- 14813: int t = mmuModifyByteSignData (a, XEiJ.regSRS) << 24; // t --abcde- 00000000 00000000 00000000 不要なバイトにアクセスしない 14814: z = t << o; // z abcde-00 00000000 00000000 00000000 14815: // // -1<<w 11111000 00000000 00000000 00000000 14816: // // -1<<w>>>o 00111110 00000000 00000000 00000000 14817: // //t|-1<<w>>>o --11111- 00000000 00000000 00000000 14818: mmuWriteByteData (a, (t | -1 << w >>> o) >>> 24, XEiJ.regSRS); // <ea> --11111- 14819: } else if (z == 1) { 14820: // <ea>{7,5} o=7,w=32-5=27 <ea> -------a bcde---- 14821: int t = mmuModifyWordSignData (a, XEiJ.regSRS) << 16; // t -------a bcde---- 00000000 00000000 020以上なのでアドレスエラーは出ない 14822: z = t << o; // z abcde--- -0000000 00000000 00000000 14823: // // -1<<w 11111000 00000000 00000000 00000000 14824: // // -1<<w>>>o 00000001 11110000 00000000 00000000 14825: // //t|-1<<w>>>o -------1 1111---- 00000000 00000000 14826: mmuWriteWordData (a, (t | -1 << w >>> o) >>> 16, XEiJ.regSRS); // <ea> -------1 1111---- 14827: } else if (z == 2) { 14828: // <ea>{7,12} o=7,w=32-12=20 <ea> -------a bcdefghi jkl----- 14829: int t = mmuModifyWordSignData (a, XEiJ.regSRS) << 16 | mmuModifyByteZeroData (a + 2, XEiJ.regSRS) << 8; // t -------a bcdefghi jkl----- 00000000 14830: z = t << o; // z abcdefgh ijkl---- -0000000 00000000 14831: // // -1<<w 11111111 11110000 00000000 00000000 14832: // // -1<<w>>>o 00000001 11111111 11100000 00000000 14833: t |= -1 << w >>> o; // t -------1 11111111 111----- 00000000 14834: mmuWriteWordData (a, t >>> 16, XEiJ.regSRS); // <ea> -------1 11111111 jkl----- 14835: mmuWriteByteData (a + 2, t >>> 8, XEiJ.regSRS); // <ea> -------1 11111111 111----- 14836: } else if (z == 3) { 14837: // <ea>{7,19} o=7,w=32-19=13 <ea> -------a bcdefghi jklmnopq rs------ 14838: int t = mmuModifyLongData (a, XEiJ.regSRS); // t -------a bcdefghi jklmnopq rs------ 14839: z = t << o; // z abcdefgh ijklmnop qrs----- -0000000 14840: // // -1<<w 11111111 11111111 11100000 00000000 14841: // // -1<<w>>>o 00000001 11111111 11111111 11000000 14842: mmuWriteLongData (a, t | -1 << w >>> o, XEiJ.regSRS); // <ea> -------1 11111111 11111111 11------ 14843: } else { 14844: // <ea>{7,26} o=7,w=32-26=6 <ea> -------a bcdefghi jklmnopq rstuvwxy z------- 14845: int t = mmuModifyLongData (a, XEiJ.regSRS); // t -------a bcdefghi jklmnopq rstuvwxy 14846: z = t << o; // z abcdefgh ijklmnop qrstuvwx y0000000 14847: // -1>>>o 00000001 11111111 11111111 11111111 14848: mmuWriteLongData (a, t | -1 >>> o, XEiJ.regSRS); // <ea> -------1 11111111 11111111 11111111 14849: t = mmuModifyByteZeroData (a + 4, XEiJ.regSRS); // t 00000000 00000000 00000000 z------- 14850: // // t>>>8-o 00000000 00000000 00000000 0z------ 14851: z |= t >>> 8 - o; // z abcdefgh ijklmnop qrstuvwx yz------ 14852: // // -1<<8-o+w 11111111 11111111 11111111 10000000 14853: mmuWriteByteData (a + 4, t | -1 << 8 - o + w, XEiJ.regSRS); // <ea> -------1 11111111 11111111 11111111 1------- 14854: } 14855: } 14856: z >>= w; //符号拡張。下位のゴミを消す 14857: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 14858: } //irpBfset 14859: 14860: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 14861: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 14862: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 14863: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 14864: //BFINS Dn,<ea>{#o:#w} |-|--2346|-|-UUUU|-**00|D M WXZ |1110_111_111_mmm_rrr-0nnn0ooooo0wwwww 14865: //BFINS Dn,<ea>{#o:Dw} |-|--2346|-|-UUUU|-**00|D M WXZ |1110_111_111_mmm_rrr-0nnn0ooooo100www 14866: //BFINS Dn,<ea>{Do:#w} |-|--2346|-|-UUUU|-**00|D M WXZ |1110_111_111_mmm_rrr-0nnn100ooo0wwwww 14867: //BFINS Dn,<ea>{Do:Dw} |-|--2346|-|-UUUU|-**00|D M WXZ |1110_111_111_mmm_rrr-0nnn100ooo100www 14868: public static void irpBfins () throws M68kException { 14869: int w = mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); //pcwz。拡張ワード 14870: if ((w & ~0b0111_111_111_111_111) != 0 || 14871: (w & 0b0000_111_111_000_000) > 0b0000_100_111_000_000 || 14872: (w & 0b0000_000_000_111_111) > 0b0000_000_000_100_111) { 14873: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 14874: throw M68kException.m6eSignal; 14875: } 14876: int n = w >> 12; 14877: int o = w << 31 - 11 >= 0 ? w >> 6 & 31 : XEiJ.regRn[w >> 6 & 7]; //o=offset 14878: w = -(w << 31 - 5 >= 0 ? w : XEiJ.regRn[w & 7]) & 31; //w=32-width。1<=width<=32なので0<=32-width<=31 14879: XEiJ.mpuCycleCount += 6; 14880: int ea = XEiJ.regOC & 63; 14881: int z = XEiJ.regRn[n] << w; //z=Dn<<-width 14882: if (ea < XEiJ.EA_AR) { //BFINS Dn,Dr{～} 14883: // Dr{30,5} o=30,w=32-5=27 t=Dr cde----- -------- -------- ------ab 14884: // t<<o ab000000 00000000 00000000 00000000 14885: // t>>>-o 00cde--- -------- -------- -------- 14886: // t<<o|t>>>-o abcde--- -------- -------- -------- 14887: // -1<<w 11111000 00000000 00000000 00000000 14888: // ~(-1<<w) 00000111 11111111 11111111 11111111 14889: // (t<<o|t>>>-o)&~(-1<<w) 00000--- -------- -------- -------- 14890: // r[n] -------- -------- -------- ---ABCDE 14891: // z=r[n]<<w ABCDE000 00000000 00000000 00000000 14892: // t=(t<<o|t>>>-o)&~(-1<<w)|z ABCDE--- -------- -------- -------- 14893: // t<<-o CDE----- -------- -------- ------00 14894: // t>>>o 00000000 00000000 00000000 000000AB 14895: // t<<-o|t>>>o CDE----- -------- -------- ------AB 14896: int t = XEiJ.regRn[ea]; 14897: t = (t << o | t >>> -o) & ~(-1 << w) | z; 14898: XEiJ.regRn[ea] = t << -o | t >>> o; 14899: } else { //BFINS Dn,<mem>{～} 14900: int a = efaCltLong (ea) + (o >> 3); //フィールドの最上位ビットを含むバイトのアドレス 14901: o &= 7; 14902: n = 31 - w + o >> 3; //フィールドが跨ぐバイト境界の数。0～4 14903: if (n == 0) { 14904: // <ea>{2,5} o=2,w=32-5=27 <ea> --abcde- 14905: // XEiJ.busRbs(a)<<24 --abcde- 00000000 00000000 00000000 14906: // -1<<w 11111000 00000000 00000000 00000000 14907: // -1<<w>>>o 00111110 00000000 00000000 00000000 14908: // ~(-1<<w>>>o) 11000001 11111111 11111111 11111111 14909: // XEiJ.busRbs(a)<<24&~(-1<<w>>>o) --00000- 00000000 00000000 00000000 14910: // r[n] -------- -------- -------- ---ABCDE 14911: // z=r[n]<<w ABCDE000 00000000 00000000 00000000 14912: // z>>>o 00ABCDE0 00000000 00000000 00000000 14913: // XEiJ.busRbs(a)<<24&~(-1<<w>>>o)|z>>>o --ABCDE- 00000000 00000000 00000000 14914: mmuWriteByteData (a, (mmuModifyByteSignData (a, XEiJ.regSRS) << 24 & ~(-1 << w >>> o) | z >>> o) >>> 24, XEiJ.regSRS); 14915: } else if (n == 1) { 14916: // <ea>{3,11} o=3,w=32-11=21 <ea> ---abcde fghijk-- 14917: // rws(a)<<16 ---abcde fghijk-- 00000000 00000000 14918: // -1<<w 11111111 11100000 00000000 00000000 14919: // -1<<w>>>o 00011111 11111100 00000000 00000000 14920: // ~(-1<<w>>>o) 11100000 00000011 11111111 11111111 14921: // rws(a)<<16&~(-1<<w>>>o) ---00000 000000-- 00000000 00000000 14922: // r[n] -------- -------- -----ABC DEFGHIJK 14923: // z=r[n]<<w ABCDEFGH IJK00000 00000000 00000000 14924: // z>>>o 000ABCDE FGHIJK00 00000000 00000000 14925: // rws(a)<<16&~(-1<<w>>>o)|z>>>o ---ABCDE FGHIJK-- 00000000 00000000 14926: mmuWriteWordData (a, (mmuModifyWordSignData (a, XEiJ.regSRS) << 16 & ~(-1 << w >>> o) | z >>> o) >>> 16, XEiJ.regSRS); 14927: } else if (n == 2) { 14928: // <ea>{4,17} o=4,w=32-17=15 <ea> ----abcd efghijkl mnopq--- 14929: // rws(a)<<16|rbz(a+2)<<8 ----abcd efghijkl mnopq--- 00000000 14930: // -1<<w 11111111 11111111 10000000 00000000 14931: // -1<<w>>>o 00001111 11111111 11111000 00000000 14932: // ~(-1<<w>>>o) 11110000 00000000 00000111 11111111 14933: // (rws(a)<<16|rbz(a+2)<<8)&~(-1<<w>>>o) ----0000 00000000 00000--- 00000000 14934: // r[n] -------- -------A BCDEFGHI JKLMNOPQ 14935: // z=r[n]<<w ABCDEFGH IJKLMNOP Q0000000 00000000 14936: // z>>>o 0000ABCD EFGHIJKL MNOPQ000 00000000 14937: // (rws(a)<<16|rbz(a+2)<<8)&~(-1<<w>>>o)|z>>>o ----ABCD EFGHIJKL MNOPQ--- 00000000 14938: int t = (mmuModifyWordSignData (a, XEiJ.regSRS) << 16 | mmuModifyByteZeroData (a + 2, XEiJ.regSRS) << 8) & ~(-1 << w >>> o) | z >>> o; 14939: mmuWriteWordData (a, t >>> 16, XEiJ.regSRS); 14940: mmuWriteByteData (a + 2, t >>> 8, XEiJ.regSRS); 14941: } else if (n == 3) { 14942: // <ea>{5,23} o=5,w=32-23=9 <ea> -----abc defghijk lmnopqrs tuvw---- 14943: // rls(a) -----abc defghijk lmnopqrs tuvw---- 14944: // -1<<w 11111111 11111111 11111110 00000000 14945: // -1<<w>>>o 00000111 11111111 11111111 11110000 14946: // ~(-1<<w>>>o) 11111000 00000000 00000000 00001111 14947: // rls(a)&~(-1<<w>>>o) -----000 00000000 00000000 0000---- 14948: // r[n] -------- -ABCDEFG HIJKLMNO PQRSTUVW 14949: // z=r[n]<<w ABCDEFGH IJKLMNOP QRSTUVW0 00000000 14950: // z>>>o 00000ABC DEFGHIJK LMNOPQRS TUVW0000 14951: // rls(a)&~(-1<<w>>>o)|z>>>o -----ABC DEFGHIJK LMNOPQRS TUVW---- 14952: mmuWriteLongData (a, mmuModifyLongData (a, XEiJ.regSRS) & ~(-1 << w >>> o) | z >>> o, XEiJ.regSRS); 14953: } else { 14954: // <ea>{6,29} o=6,w=32-29=3 <ea> ------ab cdefghij klmnopqr stuvwxyz abc----- 14955: // rls(a) ------ab cdefghij klmnopqr stuvwxyz 14956: // -1>>>o 00000011 11111111 11111111 11111111 14957: // ~(-1>>>o) 11111100 00000000 00000000 00000000 14958: // rls(a)&~(-1>>>o) ------00 00000000 00000000 00000000 14959: // r[n] ---ABCDE FGHIJKLM NOPQRSTU VWXYZABC 14960: // z=r[n]<<w ABCDEFGH IJKLMNOP QRSTUVWX YZABC000 14961: // z>>>o 000000AB CDEFGHIJ KLMNOPQR STUVWXYZ 14962: // rls(a)&~(-1>>>o)|z>>>o ------AB CDEFGHIJ KLMNOPQR STUVWXYZ 14963: mmuWriteLongData (a, mmuModifyLongData (a, XEiJ.regSRS) & ~(-1 >>> o) | z >>> o, XEiJ.regSRS); 14964: // rbz(a+4) 00000000 00000000 00000000 abc----- 14965: // -1<<8-o+w 11111111 11111111 11111111 11100000 14966: // ~(-1<<8-o+w) 00000000 00000000 00000000 00011111 14967: // rbz(a+4)&~(-1<<8-o+w) 00000000 00000000 00000000 000----- 14968: // z<<8-o CDEFGHIJ KLMNOPQR STUVWXYZ ABC00000 14969: // rbz(a+4)&~(-1<<8-o+w)|z<<8-o CDEFGHIJ KLMNOPQR STUVWXYZ ABC----- 14970: mmuWriteByteData (a + 4, mmuModifyByteZeroData (a + 4, XEiJ.regSRS) & ~(-1 << 8 - o + w) | z << 8 - o, XEiJ.regSRS); 14971: } 14972: } 14973: //zは上位に寄ったままだが下位の空きは0なのでそのままテストする 14974: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 14975: } //irpBfins 14976: 14977: //浮動小数点例外 14978: // 48 BSUN FP分岐または比較不能状態でのセット 14979: // 49 INEX FP不正確な結果 14980: // 50 DZ FPゼロによる除算 14981: // 51 UNFL FPアンダーフロー 14982: // 52 OPERR FPオペランドエラー 14983: // 53 OVFL FPオーバーフロー 14984: // 54 SNAN FPシグナリングNAN 14985: // 55 FP未実装データ型 14986: //FPSRのビットオフセット→例外ベクタ番号 14987: /* 14988: public static final int[] FP_OFFSET_TO_NUMBER = { 14989: 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 14990: 48, //16 15 BSUN 48 BSUN FP分岐または比較不能状態でのセット 14991: 54, //17 14 SNAN 54 SNAN FPシグナリングNAN 14992: 52, //18 13 OPERR 52 OPERR FPオペランドエラー 14993: 53, //19 12 OVFL 53 OVFL FPオーバーフロー 14994: 51, //20 11 UNFL 51 UNFL FPアンダーフロー 14995: 50, //21 10 DZ 50 DZ FPゼロによる除算 14996: 49, //22 9 INEX2 49 INEX FP不正確な結果 14997: 49, //23 8 INEX1 49 INEX FP不正確な結果 14998: 0, 0, 0, 0, 0, 0, 0, 0, 14999: }; 15000: */ 15001: public static final byte[] FP_OFFSET_TO_NUMBER = "\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\00006453211\0\0\0\0\0\0\0\0".getBytes (XEiJ.ISO_8859_1); 15002: 15003: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 15004: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 15005: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 15006: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 15007: //FTST.X FPm |-|--CC46|-|-----|-----| |1111_001_000_000_000-000mmm0000111010 15008: //FMOVE.X FPm,FPn |-|--CC46|-|-----|-----| |1111_001_000_000_000-000mmmnnn0000000 15009: //FINT.X FPm,FPn |-|--CCS6|-|-----|-----| |1111_001_000_000_000-000mmmnnn0000001 15010: //FSINH.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0000010 15011: //FINTRZ.X FPm,FPn |-|--CCS6|-|-----|-----| |1111_001_000_000_000-000mmmnnn0000011 15012: //FSQRT.X FPm,FPn |-|--CC46|-|-----|-----| |1111_001_000_000_000-000mmmnnn0000100 15013: //FLOGNP1.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0000110 15014: //FETOXM1.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0001000 15015: //FTANH.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0001001 15016: //FATAN.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0001010 15017: //FASIN.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0001100 15018: //FATANH.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0001101 15019: //FSIN.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0001110 15020: //FTAN.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0001111 15021: //FETOX.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0010000 15022: //FTWOTOX.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0010001 15023: //FTENTOX.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0010010 15024: //FLOGN.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0010100 15025: //FLOG10.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0010101 15026: //FLOG2.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0010110 15027: //FABS.X FPm,FPn |-|--CC46|-|-----|-----| |1111_001_000_000_000-000mmmnnn0011000 15028: //FCOSH.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0011001 15029: //FNEG.X FPm,FPn |-|--CC46|-|-----|-----| |1111_001_000_000_000-000mmmnnn0011010 15030: //FACOS.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0011100 15031: //FCOS.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0011101 15032: //FGETEXP.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0011110 15033: //FGETMAN.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0011111 15034: //FDIV.X FPm,FPn |-|--CC46|-|-----|-----| |1111_001_000_000_000-000mmmnnn0100000 15035: //FMOD.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0100001 15036: //FADD.X FPm,FPn |-|--CC46|-|-----|-----| |1111_001_000_000_000-000mmmnnn0100010 15037: //FMUL.X FPm,FPn |-|--CC46|-|-----|-----| |1111_001_000_000_000-000mmmnnn0100011 15038: //FSGLDIV.X FPm,FPn |-|--CCS6|-|-----|-----| |1111_001_000_000_000-000mmmnnn0100100 15039: //FREM.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0100101 15040: //FSCALE.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0100110 15041: //FSGLMUL.X FPm,FPn |-|--CCS6|-|-----|-----| |1111_001_000_000_000-000mmmnnn0100111 15042: //FSUB.X FPm,FPn |-|--CC46|-|-----|-----| |1111_001_000_000_000-000mmmnnn0101000 15043: //FCMP.X FPm,FPn |-|--CC46|-|-----|-----| |1111_001_000_000_000-000mmmnnn0111000 15044: //FSMOVE.X FPm,FPn |-|----46|-|-----|-----| |1111_001_000_000_000-000mmmnnn1000000 15045: //FSSQRT.X FPm,FPn |-|----46|-|-----|-----| |1111_001_000_000_000-000mmmnnn1000001 15046: //FDMOVE.X FPm,FPn |-|----46|-|-----|-----| |1111_001_000_000_000-000mmmnnn1000100 15047: //FDSQRT.X FPm,FPn |-|----46|-|-----|-----| |1111_001_000_000_000-000mmmnnn1000101 15048: //FSABS.X FPm,FPn |-|----46|-|-----|-----| |1111_001_000_000_000-000mmmnnn1011000 15049: //FSNEG.X FPm,FPn |-|----46|-|-----|-----| |1111_001_000_000_000-000mmmnnn1011010 15050: //FDABS.X FPm,FPn |-|----46|-|-----|-----| |1111_001_000_000_000-000mmmnnn1011100 15051: //FDNEG.X FPm,FPn |-|----46|-|-----|-----| |1111_001_000_000_000-000mmmnnn1011110 15052: //FSDIV.X FPm,FPn |-|----46|-|-----|-----| |1111_001_000_000_000-000mmmnnn1100000 15053: //FSADD.X FPm,FPn |-|----46|-|-----|-----| |1111_001_000_000_000-000mmmnnn1100010 15054: //FSMUL.X FPm,FPn |-|----46|-|-----|-----| |1111_001_000_000_000-000mmmnnn1100011 15055: //FDDIV.X FPm,FPn |-|----46|-|-----|-----| |1111_001_000_000_000-000mmmnnn1100100 15056: //FDADD.X FPm,FPn |-|----46|-|-----|-----| |1111_001_000_000_000-000mmmnnn1100110 15057: //FDMUL.X FPm,FPn |-|----46|-|-----|-----| |1111_001_000_000_000-000mmmnnn1100111 15058: //FSSUB.X FPm,FPn |-|----46|-|-----|-----| |1111_001_000_000_000-000mmmnnn1101000 15059: //FDSUB.X FPm,FPn |-|----46|-|-----|-----| |1111_001_000_000_000-000mmmnnn1101100 15060: //FSINCOS.X FPm,FPc:FPs |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmsss0110ccc 15061: //FMOVECR.X #ccc,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-010111nnn0cccccc 15062: //FMOVE.L FPn,<ea> |-|--CC46|-|-----|-----|D M+-WXZ |1111_001_000_mmm_rrr-011000nnn0000000 15063: //FMOVE.S FPn,<ea> |-|--CC46|-|-----|-----|D M+-WXZ |1111_001_000_mmm_rrr-011001nnn0000000 15064: //FMOVE.W FPn,<ea> |-|--CC46|-|-----|-----|D M+-WXZ |1111_001_000_mmm_rrr-011100nnn0000000 15065: //FMOVE.B FPn,<ea> |-|--CC46|-|-----|-----|D M+-WXZ |1111_001_000_mmm_rrr-011110nnn0000000 15066: //FMOVE.L FPIAR,<ea> |-|--CC46|-|-----|-----|DAM+-WXZ |1111_001_000_mmm_rrr-1010010000000000 15067: //FMOVEM.L FPIAR,<ea> |-|--CC46|-|-----|-----|DAM+-WXZ |1111_001_000_mmm_rrr-1010010000000000 15068: //FMOVE.L FPSR,<ea> |-|--CC46|-|-----|-----|D M+-WXZ |1111_001_000_mmm_rrr-1010100000000000 15069: //FMOVEM.L FPSR,<ea> |-|--CC46|-|-----|-----|D M+-WXZ |1111_001_000_mmm_rrr-1010100000000000 15070: //FMOVE.L FPCR,<ea> |-|--CC46|-|-----|-----|D M+-WXZ |1111_001_000_mmm_rrr-1011000000000000 15071: //FMOVEM.L FPCR,<ea> |-|--CC46|-|-----|-----|D M+-WXZ |1111_001_000_mmm_rrr-1011000000000000 15072: //FTST.L <ea> |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-0100000000111010 15073: //FMOVE.L <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0000000 15074: //FINT.L <ea>,FPn |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0000001 15075: //FSINH.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0000010 15076: //FINTRZ.L <ea>,FPn |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0000011 15077: //FSQRT.L <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0000100 15078: //FLOGNP1.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0000110 15079: //FETOXM1.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0001000 15080: //FTANH.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0001001 15081: //FATAN.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0001010 15082: //FASIN.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0001100 15083: //FATANH.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0001101 15084: //FSIN.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0001110 15085: //FTAN.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0001111 15086: //FETOX.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0010000 15087: //FTWOTOX.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0010001 15088: //FTENTOX.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0010010 15089: //FLOGN.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0010100 15090: //FLOG10.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0010101 15091: //FLOG2.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0010110 15092: //FABS.L <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0011000 15093: //FCOSH.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0011001 15094: //FNEG.L <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0011010 15095: //FACOS.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0011100 15096: //FCOS.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0011101 15097: //FGETEXP.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0011110 15098: //FGETMAN.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0011111 15099: //FDIV.L <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0100000 15100: //FMOD.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0100001 15101: //FADD.L <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0100010 15102: //FMUL.L <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0100011 15103: //FSGLDIV.L <ea>,FPn |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0100100 15104: //FREM.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0100101 15105: //FSCALE.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0100110 15106: //FSGLMUL.L <ea>,FPn |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0100111 15107: //FSUB.L <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0101000 15108: //FCMP.L <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0111000 15109: //FSMOVE.L <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn1000000 15110: //FSSQRT.L <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn1000001 15111: //FDMOVE.L <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn1000100 15112: //FDSQRT.L <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn1000101 15113: //FSABS.L <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn1011000 15114: //FSNEG.L <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn1011010 15115: //FDABS.L <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn1011100 15116: //FDNEG.L <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn1011110 15117: //FSDIV.L <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn1100000 15118: //FSADD.L <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn1100010 15119: //FSMUL.L <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn1100011 15120: //FDDIV.L <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn1100100 15121: //FDADD.L <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn1100110 15122: //FDMUL.L <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn1100111 15123: //FSSUB.L <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn1101000 15124: //FDSUB.L <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn1101100 15125: //FSINCOS.L <ea>,FPc:FPs |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000sss0110ccc 15126: //FTST.S <ea> |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-0100010000111010 15127: //FMOVE.S <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0000000 15128: //FINT.S <ea>,FPn |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0000001 15129: //FSINH.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0000010 15130: //FINTRZ.S <ea>,FPn |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0000011 15131: //FSQRT.S <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0000100 15132: //FLOGNP1.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0000110 15133: //FETOXM1.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0001000 15134: //FTANH.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0001001 15135: //FATAN.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0001010 15136: //FASIN.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0001100 15137: //FATANH.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0001101 15138: //FSIN.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0001110 15139: //FTAN.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0001111 15140: //FETOX.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0010000 15141: //FTWOTOX.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0010001 15142: //FTENTOX.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0010010 15143: //FLOGN.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0010100 15144: //FLOG10.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0010101 15145: //FLOG2.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0010110 15146: //FABS.S <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0011000 15147: //FCOSH.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0011001 15148: //FNEG.S <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0011010 15149: //FACOS.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0011100 15150: //FCOS.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0011101 15151: //FGETEXP.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0011110 15152: //FGETMAN.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0011111 15153: //FDIV.S <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0100000 15154: //FMOD.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0100001 15155: //FADD.S <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0100010 15156: //FMUL.S <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0100011 15157: //FSGLDIV.S <ea>,FPn |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0100100 15158: //FREM.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0100101 15159: //FSCALE.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0100110 15160: //FSGLMUL.S <ea>,FPn |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0100111 15161: //FSUB.S <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0101000 15162: //FCMP.S <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0111000 15163: //FSMOVE.S <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn1000000 15164: //FSSQRT.S <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn1000001 15165: //FDMOVE.S <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn1000100 15166: //FDSQRT.S <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn1000101 15167: //FSABS.S <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn1011000 15168: //FSNEG.S <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn1011010 15169: //FDABS.S <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn1011100 15170: //FDNEG.S <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn1011110 15171: //FSDIV.S <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn1100000 15172: //FSADD.S <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn1100010 15173: //FSMUL.S <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn1100011 15174: //FDDIV.S <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn1100100 15175: //FDADD.S <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn1100110 15176: //FDMUL.S <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn1100111 15177: //FSSUB.S <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn1101000 15178: //FDSUB.S <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn1101100 15179: //FSINCOS.S <ea>,FPc:FPs |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001sss0110ccc 15180: //FTST.W <ea> |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-0101000000111010 15181: //FMOVE.W <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0000000 15182: //FINT.W <ea>,FPn |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0000001 15183: //FSINH.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0000010 15184: //FINTRZ.W <ea>,FPn |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0000011 15185: //FSQRT.W <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0000100 15186: //FLOGNP1.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0000110 15187: //FETOXM1.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0001000 15188: //FTANH.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0001001 15189: //FATAN.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0001010 15190: //FASIN.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0001100 15191: //FATANH.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0001101 15192: //FSIN.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0001110 15193: //FTAN.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0001111 15194: //FETOX.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0010000 15195: //FTWOTOX.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0010001 15196: //FTENTOX.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0010010 15197: //FLOGN.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0010100 15198: //FLOG10.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0010101 15199: //FLOG2.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0010110 15200: //FABS.W <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0011000 15201: //FCOSH.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0011001 15202: //FNEG.W <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0011010 15203: //FACOS.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0011100 15204: //FCOS.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0011101 15205: //FGETEXP.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0011110 15206: //FGETMAN.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0011111 15207: //FDIV.W <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0100000 15208: //FMOD.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0100001 15209: //FADD.W <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0100010 15210: //FMUL.W <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0100011 15211: //FSGLDIV.W <ea>,FPn |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0100100 15212: //FREM.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0100101 15213: //FSCALE.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0100110 15214: //FSGLMUL.W <ea>,FPn |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0100111 15215: //FSUB.W <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0101000 15216: //FCMP.W <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0111000 15217: //FSMOVE.W <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn1000000 15218: //FSSQRT.W <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn1000001 15219: //FDMOVE.W <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn1000100 15220: //FDSQRT.W <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn1000101 15221: //FSABS.W <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn1011000 15222: //FSNEG.W <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn1011010 15223: //FDABS.W <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn1011100 15224: //FDNEG.W <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn1011110 15225: //FSDIV.W <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn1100000 15226: //FSADD.W <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn1100010 15227: //FSMUL.W <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn1100011 15228: //FDDIV.W <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn1100100 15229: //FDADD.W <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn1100110 15230: //FDMUL.W <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn1100111 15231: //FSSUB.W <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn1101000 15232: //FDSUB.W <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn1101100 15233: //FSINCOS.W <ea>,FPc:FPs |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100sss0110ccc 15234: //FTST.B <ea> |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-0101100000111010 15235: //FMOVE.B <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0000000 15236: //FINT.B <ea>,FPn |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0000001 15237: //FSINH.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0000010 15238: //FINTRZ.B <ea>,FPn |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0000011 15239: //FSQRT.B <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0000100 15240: //FLOGNP1.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0000110 15241: //FETOXM1.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0001000 15242: //FTANH.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0001001 15243: //FATAN.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0001010 15244: //FASIN.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0001100 15245: //FATANH.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0001101 15246: //FSIN.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0001110 15247: //FTAN.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0001111 15248: //FETOX.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0010000 15249: //FTWOTOX.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0010001 15250: //FTENTOX.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0010010 15251: //FLOGN.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0010100 15252: //FLOG10.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0010101 15253: //FLOG2.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0010110 15254: //FABS.B <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0011000 15255: //FCOSH.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0011001 15256: //FNEG.B <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0011010 15257: //FACOS.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0011100 15258: //FCOS.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0011101 15259: //FGETEXP.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0011110 15260: //FGETMAN.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0011111 15261: //FDIV.B <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0100000 15262: //FMOD.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0100001 15263: //FADD.B <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0100010 15264: //FMUL.B <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0100011 15265: //FSGLDIV.B <ea>,FPn |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0100100 15266: //FREM.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0100101 15267: //FSCALE.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0100110 15268: //FSGLMUL.B <ea>,FPn |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0100111 15269: //FSUB.B <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0101000 15270: //FCMP.B <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0111000 15271: //FSMOVE.B <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn1000000 15272: //FSSQRT.B <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn1000001 15273: //FDMOVE.B <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn1000100 15274: //FDSQRT.B <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn1000101 15275: //FSABS.B <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn1011000 15276: //FSNEG.B <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn1011010 15277: //FDABS.B <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn1011100 15278: //FDNEG.B <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn1011110 15279: //FSDIV.B <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn1100000 15280: //FSADD.B <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn1100010 15281: //FSMUL.B <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn1100011 15282: //FDDIV.B <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn1100100 15283: //FDADD.B <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn1100110 15284: //FDMUL.B <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn1100111 15285: //FSSUB.B <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn1101000 15286: //FDSUB.B <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn1101100 15287: //FSINCOS.B <ea>,FPc:FPs |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110sss0110ccc 15288: //FMOVE.L <ea>,FPIAR |-|--CC46|-|-----|-----|DAM+-WXZPI|1111_001_000_mmm_rrr-1000010000000000 15289: //FMOVEM.L <ea>,FPIAR |-|--CC46|-|-----|-----|DAM+-WXZPI|1111_001_000_mmm_rrr-1000010000000000 15290: //FMOVE.L <ea>,FPSR |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-1000100000000000 15291: //FMOVEM.L <ea>,FPSR |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-1000100000000000 15292: //FMOVE.L <ea>,FPCR |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-1001000000000000 15293: //FMOVEM.L <ea>,FPCR |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-1001000000000000 15294: //FMOVE.X FPn,<ea> |-|--CC46|-|-----|-----| M+-WXZ |1111_001_000_mmm_rrr-011010nnn0000000 15295: //FMOVE.P FPn,<ea>{#k} |-|--CCSS|-|-----|-----| M+-WXZ |1111_001_000_mmm_rrr-011011nnnkkkkkkk 15296: //FMOVE.D FPn,<ea> |-|--CC46|-|-----|-----| M+-WXZ |1111_001_000_mmm_rrr-011101nnn0000000 15297: //FMOVE.P FPn,<ea>{Dk} |-|--CCSS|-|-----|-----| M+-WXZ |1111_001_000_mmm_rrr-011111nnnkkk0000 15298: //FMOVEM.L FPSR/FPIAR,<ea> |-|--CC46|-|-----|-----| M+-WXZ |1111_001_000_mmm_rrr-1010110000000000 15299: //FMOVEM.L FPCR/FPIAR,<ea> |-|--CC46|-|-----|-----| M+-WXZ |1111_001_000_mmm_rrr-1011010000000000 15300: //FMOVEM.L FPCR/FPSR,<ea> |-|--CC46|-|-----|-----| M+-WXZ |1111_001_000_mmm_rrr-1011100000000000 15301: //FMOVEM.L FPCR/FPSR/FPIAR,<ea> |-|--CC46|-|-----|-----| M+-WXZ |1111_001_000_mmm_rrr-1011110000000000 15302: //FMOVEM.X #<data>,<ea> |-|--CC46|-|-----|-----| M WXZ |1111_001_000_mmm_rrr-11110000dddddddd 15303: //FMOVEM.X <list>,<ea> |-|--CC46|-|-----|-----| M WXZ |1111_001_000_mmm_rrr-11110000llllllll 15304: //FMOVEM.X Dl,<ea> |-|--CC4S|-|-----|-----| M WXZ |1111_001_000_mmm_rrr-111110000lll0000 15305: //FMOVEM.L <ea>,FPSR/FPIAR |-|--CC46|-|-----|-----| M+-WXZP |1111_001_000_mmm_rrr-1000110000000000 15306: //FMOVEM.L <ea>,FPCR/FPIAR |-|--CC46|-|-----|-----| M+-WXZP |1111_001_000_mmm_rrr-1001010000000000 15307: //FMOVEM.L <ea>,FPCR/FPSR |-|--CC46|-|-----|-----| M+-WXZP |1111_001_000_mmm_rrr-1001100000000000 15308: //FMOVEM.L <ea>,FPCR/FPSR/FPIAR |-|--CC46|-|-----|-----| M+-WXZP |1111_001_000_mmm_rrr-1001110000000000 15309: //FMOVEM.X <ea>,#<data> |-|--CC46|-|-----|-----| M+ WXZP |1111_001_000_mmm_rrr-11010000dddddddd 15310: //FMOVEM.X <ea>,<list> |-|--CC46|-|-----|-----| M+ WXZP |1111_001_000_mmm_rrr-11010000llllllll 15311: //FMOVEM.X <ea>,Dl |-|--CC4S|-|-----|-----| M+ WXZP |1111_001_000_mmm_rrr-110110000lll0000 15312: //FTST.X <ea> |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-0100100000111010 15313: //FMOVE.X <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0000000 15314: //FINT.X <ea>,FPn |-|--CCS6|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0000001 15315: //FSINH.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0000010 15316: //FINTRZ.X <ea>,FPn |-|--CCS6|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0000011 15317: //FSQRT.X <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0000100 15318: //FLOGNP1.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0000110 15319: //FETOXM1.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0001000 15320: //FTANH.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0001001 15321: //FATAN.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0001010 15322: //FASIN.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0001100 15323: //FATANH.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0001101 15324: //FSIN.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0001110 15325: //FTAN.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0001111 15326: //FETOX.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0010000 15327: //FTWOTOX.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0010001 15328: //FTENTOX.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0010010 15329: //FLOGN.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0010100 15330: //FLOG10.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0010101 15331: //FLOG2.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0010110 15332: //FABS.X <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0011000 15333: //FCOSH.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0011001 15334: //FNEG.X <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0011010 15335: //FACOS.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0011100 15336: //FCOS.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0011101 15337: //FGETEXP.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0011110 15338: //FGETMAN.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0011111 15339: //FDIV.X <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0100000 15340: //FMOD.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0100001 15341: //FADD.X <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0100010 15342: //FMUL.X <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0100011 15343: //FSGLDIV.X <ea>,FPn |-|--CCS6|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0100100 15344: //FREM.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0100101 15345: //FSCALE.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0100110 15346: //FSGLMUL.X <ea>,FPn |-|--CCS6|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0100111 15347: //FSUB.X <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0101000 15348: //FCMP.X <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0111000 15349: //FSMOVE.X <ea>,FPn |-|----46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn1000000 15350: //FSSQRT.X <ea>,FPn |-|----46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn1000001 15351: //FDMOVE.X <ea>,FPn |-|----46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn1000100 15352: //FDSQRT.X <ea>,FPn |-|----46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn1000101 15353: //FSABS.X <ea>,FPn |-|----46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn1011000 15354: //FSNEG.X <ea>,FPn |-|----46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn1011010 15355: //FDABS.X <ea>,FPn |-|----46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn1011100 15356: //FDNEG.X <ea>,FPn |-|----46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn1011110 15357: //FSDIV.X <ea>,FPn |-|----46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn1100000 15358: //FSADD.X <ea>,FPn |-|----46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn1100010 15359: //FSMUL.X <ea>,FPn |-|----46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn1100011 15360: //FDDIV.X <ea>,FPn |-|----46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn1100100 15361: //FDADD.X <ea>,FPn |-|----46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn1100110 15362: //FDMUL.X <ea>,FPn |-|----46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn1100111 15363: //FSSUB.X <ea>,FPn |-|----46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn1101000 15364: //FDSUB.X <ea>,FPn |-|----46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn1101100 15365: //FSINCOS.X <ea>,FPc:FPs |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010sss0110ccc 15366: //FTST.P <ea> |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-0100110000111010 15367: //FMOVE.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0000000 15368: //FINT.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0000001 15369: //FSINH.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0000010 15370: //FINTRZ.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0000011 15371: //FSQRT.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0000100 15372: //FLOGNP1.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0000110 15373: //FETOXM1.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0001000 15374: //FTANH.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0001001 15375: //FATAN.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0001010 15376: //FASIN.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0001100 15377: //FATANH.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0001101 15378: //FSIN.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0001110 15379: //FTAN.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0001111 15380: //FETOX.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0010000 15381: //FTWOTOX.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0010001 15382: //FTENTOX.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0010010 15383: //FLOGN.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0010100 15384: //FLOG10.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0010101 15385: //FLOG2.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0010110 15386: //FABS.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0011000 15387: //FCOSH.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0011001 15388: //FNEG.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0011010 15389: //FACOS.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0011100 15390: //FCOS.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0011101 15391: //FGETEXP.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0011110 15392: //FGETMAN.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0011111 15393: //FDIV.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0100000 15394: //FMOD.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0100001 15395: //FADD.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0100010 15396: //FMUL.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0100011 15397: //FSGLDIV.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0100100 15398: //FREM.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0100101 15399: //FSCALE.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0100110 15400: //FSGLMUL.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0100111 15401: //FSUB.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0101000 15402: //FCMP.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0111000 15403: //FSMOVE.P <ea>,FPn |-|----SS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn1000000 15404: //FSSQRT.P <ea>,FPn |-|----SS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn1000001 15405: //FDMOVE.P <ea>,FPn |-|----SS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn1000100 15406: //FDSQRT.P <ea>,FPn |-|----SS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn1000101 15407: //FSABS.P <ea>,FPn |-|----SS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn1011000 15408: //FSNEG.P <ea>,FPn |-|----SS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn1011010 15409: //FDABS.P <ea>,FPn |-|----SS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn1011100 15410: //FDNEG.P <ea>,FPn |-|----SS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn1011110 15411: //FSDIV.P <ea>,FPn |-|----SS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn1100000 15412: //FSADD.P <ea>,FPn |-|----SS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn1100010 15413: //FSMUL.P <ea>,FPn |-|----SS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn1100011 15414: //FDDIV.P <ea>,FPn |-|----SS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn1100100 15415: //FDADD.P <ea>,FPn |-|----SS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn1100110 15416: //FDMUL.P <ea>,FPn |-|----SS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn1100111 15417: //FSSUB.P <ea>,FPn |-|----SS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn1101000 15418: //FDSUB.P <ea>,FPn |-|----SS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn1101100 15419: //FSINCOS.P <ea>,FPc:FPs |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011sss0110ccc 15420: //FTST.D <ea> |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-0101010000111010 15421: //FMOVE.D <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0000000 15422: //FINT.D <ea>,FPn |-|--CCS6|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0000001 15423: //FSINH.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0000010 15424: //FINTRZ.D <ea>,FPn |-|--CCS6|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0000011 15425: //FSQRT.D <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0000100 15426: //FLOGNP1.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0000110 15427: //FETOXM1.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0001000 15428: //FTANH.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0001001 15429: //FATAN.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0001010 15430: //FASIN.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0001100 15431: //FATANH.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0001101 15432: //FSIN.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0001110 15433: //FTAN.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0001111 15434: //FETOX.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0010000 15435: //FTWOTOX.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0010001 15436: //FTENTOX.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0010010 15437: //FLOGN.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0010100 15438: //FLOG10.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0010101 15439: //FLOG2.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0010110 15440: //FABS.D <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0011000 15441: //FCOSH.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0011001 15442: //FNEG.D <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0011010 15443: //FACOS.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0011100 15444: //FCOS.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0011101 15445: //FGETEXP.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0011110 15446: //FGETMAN.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0011111 15447: //FDIV.D <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0100000 15448: //FMOD.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0100001 15449: //FADD.D <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0100010 15450: //FMUL.D <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0100011 15451: //FSGLDIV.D <ea>,FPn |-|--CCS6|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0100100 15452: //FREM.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0100101 15453: //FSCALE.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0100110 15454: //FSGLMUL.D <ea>,FPn |-|--CCS6|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0100111 15455: //FSUB.D <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0101000 15456: //FCMP.D <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0111000 15457: //FSMOVE.D <ea>,FPn |-|----46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn1000000 15458: //FSSQRT.D <ea>,FPn |-|----46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn1000001 15459: //FDMOVE.D <ea>,FPn |-|----46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn1000100 15460: //FDSQRT.D <ea>,FPn |-|----46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn1000101 15461: //FSABS.D <ea>,FPn |-|----46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn1011000 15462: //FSNEG.D <ea>,FPn |-|----46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn1011010 15463: //FDABS.D <ea>,FPn |-|----46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn1011100 15464: //FDNEG.D <ea>,FPn |-|----46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn1011110 15465: //FSDIV.D <ea>,FPn |-|----46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn1100000 15466: //FSADD.D <ea>,FPn |-|----46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn1100010 15467: //FSMUL.D <ea>,FPn |-|----46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn1100011 15468: //FDDIV.D <ea>,FPn |-|----46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn1100100 15469: //FDADD.D <ea>,FPn |-|----46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn1100110 15470: //FDMUL.D <ea>,FPn |-|----46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn1100111 15471: //FSSUB.D <ea>,FPn |-|----46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn1101000 15472: //FDSUB.D <ea>,FPn |-|----46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn1101100 15473: //FSINCOS.D <ea>,FPc:FPs |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101sss0110ccc 15474: //FMOVEM.X #<data>,-(Ar) |-|--CC46|-|-----|-----| - |1111_001_000_100_rrr-11100000dddddddd 15475: //FMOVEM.X <list>,-(Ar) |-|--CC46|-|-----|-----| - |1111_001_000_100_rrr-11100000llllllll 15476: //FMOVEM.X Dl,-(Ar) |-|--CC4S|-|-----|-----| - |1111_001_000_100_rrr-111010000lll0000 15477: //FMOVEM.L #<data>,#<data>,FPSR/FPIAR |-|--CC4S|-|-----|-----| I|1111_001_000_111_100-1000110000000000-{data} 15478: //FMOVEM.L #<data>,#<data>,FPCR/FPIAR |-|--CC4S|-|-----|-----| I|1111_001_000_111_100-1001010000000000-{data} 15479: //FMOVEM.L #<data>,#<data>,FPCR/FPSR |-|--CC4S|-|-----|-----| I|1111_001_000_111_100-1001100000000000-{data} 15480: //FMOVEM.L #<data>,#<data>,#<data>,FPCR/FPSR/FPIAR|-|--CC4S|-|-----|-----| I|1111_001_000_111_100-1001110000000000-{data} 15481: @SuppressWarnings ("fallthrough") public static void irpFgen () throws M68kException { 15482: fgen: { 15483: if ((7 & XEiJ.currentOnchipFPU) == 0) { 15484: irpFline (); 15485: break fgen; 15486: } 15487: XEiJ.mpuCycleCount++; 15488: int ea = XEiJ.regOC & 63; 15489: int a = XEiJ.regPC; 15490: XEiJ.regPC = a + 2; 15491: int w = mmuReadWordZeroExword (a, XEiJ.regSRS); //pcwz。拡張ワード 15492: int m = w >> 10 & 7; 15493: int n = w >> 7 & 7; 15494: int c = w & 0x7f; 15495: XEiJ.fpuBox.epbSetRoundingPrec (XEiJ.fpuBox.epbFpcr >> 6 & 3); //丸め桁数 15496: XEiJ.fpuBox.epbSetRoundingMode (XEiJ.fpuBox.epbFpcr >> 4 & 3); //丸めモード 15497: a = 0; //実効アドレス 15498: //XEiJ.fpuBox.epbExceptionStatusWord = 0; 15499: 15500: 15501: switch (w >> 13) { 15502: 15503: 15504: case 0b010: //$4xxx-$5xxx: Fop.* <ea>,FPn 15505: XEiJ.fpuBox.epbFpsr &= 0x00ff00ff; 15506: XEiJ.fpuBox.epbFpiar = XEiJ.regPC0; //FPIARはFMOVEM/FMOVE FPcr/FSAVE/FRESTORE以外の命令で例外が発生しなくても更新される 15507: 15508: switch (m) { 15509: 15510: case 0b000: //$40xx-$43xx: Fop.L <ea>,FPn 15511: { 15512: XEiJ.mpuCycleCount += 3; 15513: int i; 15514: if (ea < XEiJ.EA_AR) { //Dr 15515: XEiJ.mpuCycleCount += 2; 15516: //a = 0; 15517: i = XEiJ.regRn[ea]; 15518: } else if (ea == XEiJ.EA_IM) { //#<data> 15519: a = XEiJ.regPC; 15520: XEiJ.regPC = a + 4; 15521: i = mmuReadLongExword (a, XEiJ.regSRS); //pcls 15522: } else { //Dr,#<data>以外 15523: a = efaAnyLong (ea); 15524: i = mmuReadLongData (a, XEiJ.regSRS); 15525: } 15526: XEiJ.fpuFPn[m = EFPBox.EPB_SRC_TMP].seti (i); 15527: } 15528: break; 15529: 15530: case 0b001: //$44xx-$47xx: Fop.S <ea>,FPn 15531: { 15532: int i; 15533: if (ea < XEiJ.EA_AR) { //Dr 15534: XEiJ.mpuCycleCount += 2; 15535: //a = 0; 15536: i = XEiJ.regRn[ea]; 15537: } else if (ea == XEiJ.EA_IM) { //#<data> 15538: a = XEiJ.regPC; 15539: XEiJ.regPC = a + 4; 15540: i = mmuReadLongExword (a, XEiJ.regSRS); //pcls 15541: } else { //Dr,#<data>以外 15542: a = efaAnyLong (ea); 15543: i = mmuReadLongData (a, XEiJ.regSRS); 15544: } 15545: XEiJ.fpuFPn[m = EFPBox.EPB_SRC_TMP].setf0 (i); 15546: } 15547: break; 15548: 15549: case 0b010: //$48xx-$4Bxx: Fop.X <ea>,FPn 15550: { 15551: int[] ib = new int[3]; 15552: if (ea == 074) { //#<data> 15553: if (!XEiJ.fpuBox.epbIsFullSpec ()) { //12バイトのイミディエイト 15554: irpExceptionFormat0 (M68kException.M6E_UNIMPLEMENTED_EFFECTIVE << 2, XEiJ.regPC0); //pcは命令の先頭 15555: break fgen; 15556: } 15557: a = (XEiJ.regPC += 12) - 12; 15558: ib[0] = mmuReadLongExword (a, XEiJ.regSRS); 15559: ib[1] = mmuReadLongExword (a + 4, XEiJ.regSRS); 15560: ib[2] = mmuReadLongExword (a + 8, XEiJ.regSRS); 15561: } else { //#<data>以外 15562: a = efaMemExtd (ea); 15563: if ((ea & 070) == 040) { //-(Ar) 15564: ib[2] = mmuReadLongData (m60Address = a + 8, XEiJ.regSRS); 15565: ib[1] = mmuReadLongData (m60Address = a + 4, XEiJ.regSRS); 15566: ib[0] = mmuReadLongData (m60Address = a, XEiJ.regSRS); 15567: } else { //-(Ar)以外 15568: ib[0] = mmuReadLongData (m60Address = a, XEiJ.regSRS); 15569: ib[1] = mmuReadLongData (m60Address = a + 4, XEiJ.regSRS); 15570: ib[2] = mmuReadLongData (m60Address = a + 8, XEiJ.regSRS); 15571: } 15572: } 15573: if (XEiJ.fpuBox.epbIsTriple ()) { //三倍精度 15574: XEiJ.fpuFPn[m = EFPBox.EPB_SRC_TMP].sety012 (ib, 0); 15575: } else { //拡張精度 15576: XEiJ.fpuFPn[m = EFPBox.EPB_SRC_TMP].setx012 (ib, 0); 15577: } 15578: } 15579: break; 15580: 15581: case 0b011: //$4Cxx-$4Fxx: Fop.P <ea>,FPn 15582: { 15583: int[] ib = new int[3]; 15584: if (ea == 074) { //#<data> 15585: if (!XEiJ.fpuBox.epbIsFullSpec ()) { //12バイトのイミディエイト 15586: irpExceptionFormat0 (M68kException.M6E_UNIMPLEMENTED_EFFECTIVE << 2, XEiJ.regPC0); //pcは命令の先頭 15587: break fgen; 15588: } 15589: a = (XEiJ.regPC += 12) - 12; 15590: ib[0] = mmuReadLongExword (a, XEiJ.regSRS); 15591: ib[1] = mmuReadLongExword (a + 4, XEiJ.regSRS); 15592: ib[2] = mmuReadLongExword (a + 8, XEiJ.regSRS); 15593: } else { //#<data>以外 15594: a = efaMemExtd (ea); 15595: if ((ea & 070) == 040) { //-(Ar) 15596: ib[2] = mmuReadLongData (m60Address = a + 8, XEiJ.regSRS); 15597: ib[1] = mmuReadLongData (m60Address = a + 4, XEiJ.regSRS); 15598: ib[0] = mmuReadLongData (m60Address = a, XEiJ.regSRS); 15599: } else { //-(Ar)以外 15600: ib[0] = mmuReadLongData (m60Address = a, XEiJ.regSRS); 15601: ib[1] = mmuReadLongData (m60Address = a + 4, XEiJ.regSRS); 15602: ib[2] = mmuReadLongData (m60Address = a + 8, XEiJ.regSRS); 15603: } 15604: } 15605: if (!XEiJ.fpuBox.epbIsFullSpec ()) { //パックトデシマル 15606: XEiJ.fpuBox.epbExceptionStatusWord = 0xe000 | M68kException.M6E_FP_UNSUPPORTED_DATA_TYPE & 7; 15607: irpExceptionFormat2 (M68kException.M6E_FP_UNSUPPORTED_DATA_TYPE << 2, XEiJ.regPC, a); //pcは次の命令,アドレスはソースオペランド 15608: break fgen; 15609: } 15610: XEiJ.fpuFPn[m = EFPBox.EPB_SRC_TMP].setp012 (ib, 0); 15611: } 15612: break; 15613: 15614: case 0b100: //$50xx-$53xx: Fop.W <ea>,FPn 15615: { 15616: XEiJ.mpuCycleCount += 3; 15617: int i; 15618: if (ea < XEiJ.EA_AR) { //Dr 15619: XEiJ.mpuCycleCount += 2; 15620: //a = 0; 15621: i = (short) XEiJ.regRn[ea]; 15622: } else if (ea == XEiJ.EA_IM) { //#<data> 15623: a = XEiJ.regPC; 15624: XEiJ.regPC = a + 2; 15625: i = mmuReadWordSignExword (a, XEiJ.regSRS); //pcws 15626: } else { //Dr,#<data>以外 15627: a = efaAnyWord (ea); 15628: i = mmuReadWordSignData (a, XEiJ.regSRS); 15629: } 15630: XEiJ.fpuFPn[m = EFPBox.EPB_SRC_TMP].seti (i); 15631: } 15632: break; 15633: 15634: case 0b101: //$54xx-$57xx: Fop.D <ea>,FPn 15635: { 15636: long l; 15637: if (ea == XEiJ.EA_IM) { //#<data> 15638: a = XEiJ.regPC; 15639: XEiJ.regPC = a + 8; 15640: l = mmuReadQuadExword (a, XEiJ.regSRS); 15641: } else { //#<data>以外 15642: a = efaAnyQuad (ea); 15643: l = mmuReadQuadData (a, XEiJ.regSRS); 15644: } 15645: XEiJ.fpuFPn[m = EFPBox.EPB_SRC_TMP].setd01 (l); 15646: } 15647: break; 15648: 15649: case 0b110: //$58xx-$5Bxx: Fop.B <ea>,FPn 15650: { 15651: XEiJ.mpuCycleCount += 3; 15652: int i; 15653: if (ea < XEiJ.EA_AR) { //Dr 15654: XEiJ.mpuCycleCount += 2; 15655: //a = 0; 15656: i = (byte) XEiJ.regRn[ea]; 15657: } else if (ea == XEiJ.EA_IM) { //#<data> 15658: a = XEiJ.regPC; 15659: XEiJ.regPC = a + 2; 15660: i = mmuReadByteSignExword (a + 1, XEiJ.regSRS); //pcbs 15661: } else { //Dr,#<data>以外 15662: a = efaAnyByte (ea); 15663: i = mmuReadByteSignData (a, XEiJ.regSRS); 15664: } 15665: XEiJ.fpuFPn[m = EFPBox.EPB_SRC_TMP].seti (i); 15666: } 15667: break; 15668: 15669: case 0b111: //$5Cxx-$5Fxx: FMOVECR.X #ccc,FPn 15670: default: 15671: if (!XEiJ.fpuBox.epbIsFullSpec ()) { 15672: irpExceptionFormat2 (M68kException.M6E_FP_UNIMPLEMENTED_INSTRUCTION << 2, XEiJ.regPC, M68kException.M6E_FP_UNIMPLEMENTED_INSTRUCTION << 2); //pcは次の命令,アドレスはベクタオフセット 15673: break fgen; 15674: } 15675: if (0x40 <= c) { 15676: //マニュアルにはFMOVECRの命令フォーマットのROMオフセットが7bitあるように書かれているが実際は6bit 15677: //MC68882で0x40以上を指定すると命令実行前例外のF-Line Emulator(レスポンス$1C0B)が返る 15678: XEiJ.regPC = XEiJ.regPC0 + 2; //拡張ワードを読まなかったことにする 15679: irpFline (); 15680: break fgen; 15681: } 15682: if (false) { 15683: m = EFPBox.EPB_CONST_START + c; //定数 15684: c = 0; //FMOVE 15685: } else { 15686: //FMOVECR 15687: XEiJ.fpuBox.epbFmovecr (XEiJ.fpuFPn[n], c); 15688: //FPSRのAEXCを設定する 15689: XEiJ.fpuBox.epbFpsr |= XEiJ.FPU_FPSR_EXC_TO_AEXC[XEiJ.fpuBox.epbFpsr >> 8 & 255]; 15690: //浮動小数点命令実行後例外 floating-point post-instruction exception 15691: if (irpFPPostInstruction (a)) { 15692: break fgen; 15693: } 15694: break fgen; 15695: } 15696: 15697: } 15698: //浮動小数点命令実行前例外 floating-point pre-instruction exception 15699: if (irpFPPreInstruction ()) { 15700: break fgen; 15701: } 15702: //Fop.X <ea>,FPn → Fop.X FP[EFPBox.EPB_SRC_TMP],FPn 15703: //FMOVECR.X #ccc,FPn → FMOVE.X FPc,FPn 15704: 15705: 15706: //fallthrough 15707: case 0b000: //$0xxx-$1xxx: Fop.X FPm,FPn 15708: if (w >> 13 == 0) { 15709: XEiJ.fpuBox.epbFpsr &= 0x00ff00ff; 15710: } 15711: //Fop.* <ea>,FPnのときFPIARは設定済み 15712: XEiJ.fpuBox.epbFpiar = XEiJ.regPC0; //FPIARはFMOVEM/FMOVE FPcr/FSAVE/FRESTORE以外の命令で例外が発生しなくても更新される 15713: 15714: switch (c) { 15715: 15716: case 0b000_0000: //$xx00: FMOVE.* *m,FPn 15717: // BSUN 常にクリア 15718: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 15719: // OPERR 常にクリア 15720: // OVFL 常にクリア 15721: // UNFL 結果が非正規化数のときセット、それ以外はクリア 15722: // DZ 常にクリア 15723: // INEX2 結果に誤差があるときセット、それ以外はクリア 15724: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 15725: XEiJ.fpuFPn[n].sete (XEiJ.fpuFPn[m]).finish (); 15726: break; 15727: 15728: case 0b000_0001: //$xx01: FINT.* *m,FPn 15729: // BSUN 常にクリア 15730: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 15731: // OPERR 常にクリア 15732: // OVFL 常にクリア 15733: // 正規化数の最大値は整数なので丸めても大きくなることはない 15734: // UNFL 常にクリア 15735: // 結果は整数なので非正規化数にはならない 15736: // DZ 常にクリア 15737: // INEX2 結果に誤差があるときセット、それ以外はクリア 15738: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 15739: XEiJ.mpuCycleCount += 2; 15740: // FINTはsingleとdoubleの丸め処理を行わない 15741: XEiJ.fpuBox.epbSetRoundingPrec (EFPBox.EPB_PREC_EXD); 15742: XEiJ.fpuFPn[n].round (XEiJ.fpuFPn[m], XEiJ.fpuBox.epbRoundingMode); 15743: break; 15744: 15745: case 0b000_0010: //$xx02: FSINH.* *m,FPn 15746: // BSUN 常にクリア 15747: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 15748: // OPERR 常にクリア 15749: // OVFL オーバーフローしたときセット、それ以外はクリア 15750: // UNFL 結果が非正規化数のときセット、それ以外はクリア 15751: // DZ 常にクリア 15752: // INEX2 結果に誤差があるときセット、それ以外はクリア 15753: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 15754: if (!XEiJ.fpuBox.epbIsFullSpec ()) { 15755: irpExceptionFormat2 (M68kException.M6E_FP_UNIMPLEMENTED_INSTRUCTION << 2, XEiJ.regPC, a); //pcは次の命令,アドレスは実効アドレス 15756: break fgen; 15757: } 15758: XEiJ.fpuFPn[n].sinh (XEiJ.fpuFPn[m]); 15759: break; 15760: 15761: case 0b000_0011: //$xx03: FINTRZ.* *m,FPn 15762: // BSUN 常にクリア 15763: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 15764: // OPERR 常にクリア 15765: // OVFL 常にクリア 15766: // UNFL 常にクリア 15767: // 結果は整数なので非正規化数にはならない 15768: // DZ 常にクリア 15769: // INEX2 結果に誤差があるときセット、それ以外はクリア 15770: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 15771: XEiJ.mpuCycleCount += 2; 15772: // FINTRZはsingleとdoubleの丸め処理を行わない 15773: XEiJ.fpuBox.epbSetRoundingPrec (EFPBox.EPB_PREC_EXD); 15774: XEiJ.fpuFPn[n].trunc (XEiJ.fpuFPn[m]); 15775: break; 15776: 15777: case 0b000_0100: //$xx04: FSQRT.* *m,FPn 15778: case 0b000_0101: //$xx05: FSQRT.* *m,FPn (MC68882) 15779: // BSUN 常にクリア 15780: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 15781: // OPERR 引数が-0を除く負数のときセット、それ以外はクリア 15782: // OVFL 常にクリア 15783: // 1よりも大きい数は小さくなるので溢れることはない 15784: // UNFL 常にクリア 15785: // 非正規化数の平方根は正規化数なので結果が非正規化数になることはない 15786: // DZ 常にクリア 15787: // INEX2 結果に誤差があるときセット、それ以外はクリア 15788: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 15789: XEiJ.mpuCycleCount += 67; 15790: XEiJ.fpuFPn[n].sqrt (XEiJ.fpuFPn[m]); 15791: break; 15792: 15793: case 0b000_0110: //$xx06: FLOGNP1.* *m,FPn 15794: case 0b000_0111: //$xx07: FLOGNP1.* *m,FPn (MC68882) 15795: // BSUN 常にクリア 15796: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 15797: // OPERR 引数が-1よりも小さいときセット、それ以外はクリア 15798: // OVFL 常にクリア 15799: // log(1+0)=0,log(1+x)<=xなので結果が引数よりも大きくなることはない 15800: // UNFL 結果が非正規化数のときセット、それ以外はクリア 15801: // DZ 引数が-1のときセット、それ以外はクリア 15802: // INEX2 結果に誤差があるときセット、それ以外はクリア 15803: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 15804: if (!XEiJ.fpuBox.epbIsFullSpec ()) { 15805: irpExceptionFormat2 (M68kException.M6E_FP_UNIMPLEMENTED_INSTRUCTION << 2, XEiJ.regPC, a); //pcは次の命令,アドレスは実効アドレス 15806: break fgen; 15807: } 15808: XEiJ.fpuFPn[n].log1p (XEiJ.fpuFPn[m]); 15809: break; 15810: 15811: case 0b000_1000: //$xx08: FETOXM1.* *m,FPn 15812: // BSUN 常にクリア 15813: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 15814: // OPERR 常にクリア 15815: // OVFL オーバーフローしたときセット、それ以外はクリア 15816: // UNFL 結果が非正規化数のときセット、それ以外はクリア 15817: // DZ 常にクリア 15818: // INEX2 結果に誤差があるときセット、それ以外はクリア 15819: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 15820: if (!XEiJ.fpuBox.epbIsFullSpec ()) { 15821: irpExceptionFormat2 (M68kException.M6E_FP_UNIMPLEMENTED_INSTRUCTION << 2, XEiJ.regPC, a); //pcは次の命令,アドレスは実効アドレス 15822: break fgen; 15823: } 15824: XEiJ.fpuFPn[n].expm1 (XEiJ.fpuFPn[m]); 15825: break; 15826: 15827: case 0b000_1001: //$xx09: FTANH.* *m,FPn 15828: // BSUN 常にクリア 15829: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 15830: // OPERR 常にクリア 15831: // OVFL 常にクリア 15832: // UNFL 結果が非正規化数のときセット、それ以外はクリア 15833: // DZ 常にクリア 15834: // INEX2 結果に誤差があるときセット、それ以外はクリア 15835: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 15836: if (!XEiJ.fpuBox.epbIsFullSpec ()) { 15837: irpExceptionFormat2 (M68kException.M6E_FP_UNIMPLEMENTED_INSTRUCTION << 2, XEiJ.regPC, a); //pcは次の命令,アドレスは実効アドレス 15838: break fgen; 15839: } 15840: XEiJ.fpuFPn[n].tanh (XEiJ.fpuFPn[m]); 15841: break; 15842: 15843: case 0b000_1010: //$xx0A: FATAN.* *m,FPn 15844: case 0b000_1011: //$xx0B: FATAN.* *m,FPn (MC68882) 15845: // BSUN 常にクリア 15846: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 15847: // OPERR 常にクリア 15848: // OVFL 常にクリア 15849: // UNFL 結果が非正規化数のときセット、それ以外はクリア 15850: // DZ 常にクリア 15851: // INEX2 結果に誤差があるときセット、それ以外はクリア 15852: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 15853: if (!XEiJ.fpuBox.epbIsFullSpec ()) { 15854: irpExceptionFormat2 (M68kException.M6E_FP_UNIMPLEMENTED_INSTRUCTION << 2, XEiJ.regPC, a); //pcは次の命令,アドレスは実効アドレス 15855: break fgen; 15856: } 15857: XEiJ.fpuFPn[n].atan (XEiJ.fpuFPn[m]); 15858: break; 15859: 15860: case 0b000_1100: //$xx0C: FASIN.* *m,FPn 15861: // BSUN 常にクリア 15862: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 15863: // OPERR 引数の絶対値が1よりも大きいときセット、それ以外はクリア 15864: // OVFL 常にクリア 15865: // UNFL 結果が非正規化数のときセット、それ以外はクリア 15866: // DZ 常にクリア 15867: // INEX2 結果に誤差があるときセット、それ以外はクリア 15868: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 15869: if (!XEiJ.fpuBox.epbIsFullSpec ()) { 15870: irpExceptionFormat2 (M68kException.M6E_FP_UNIMPLEMENTED_INSTRUCTION << 2, XEiJ.regPC, a); //pcは次の命令,アドレスは実効アドレス 15871: break fgen; 15872: } 15873: XEiJ.fpuFPn[n].asin (XEiJ.fpuFPn[m]); 15874: break; 15875: 15876: case 0b000_1101: //$xx0D: FATANH.* *m,FPn 15877: // BSUN 常にクリア 15878: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 15879: // OPERR 引数の絶対値が1よりも大きいときセット、それ以外はクリア 15880: // OVFL 常にクリア 15881: // 1のとき無限大なのだから1の近くでオーバーフローしそうに思えるがatanh(1-2^-80)≒28.07くらい 15882: // UNFL 結果が非正規化数のときセット、それ以外はクリア 15883: // DZ 引数の絶対値が1のときセット、それ以外はクリア 15884: // INEX2 結果に誤差があるときセット、それ以外はクリア 15885: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 15886: if (!XEiJ.fpuBox.epbIsFullSpec ()) { 15887: irpExceptionFormat2 (M68kException.M6E_FP_UNIMPLEMENTED_INSTRUCTION << 2, XEiJ.regPC, a); //pcは次の命令,アドレスは実効アドレス 15888: break fgen; 15889: } 15890: XEiJ.fpuFPn[n].atanh (XEiJ.fpuFPn[m]); 15891: break; 15892: 15893: case 0b000_1110: //$xx0E: FSIN.* *m,FPn 15894: // BSUN 常にクリア 15895: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 15896: // OPERR 引数が無限大のときセット、それ以外はクリア 15897: // OVFL 常にクリア 15898: // UNFL 結果が非正規化数のときセット、それ以外はクリア 15899: // DZ 常にクリア 15900: // INEX2 結果に誤差があるときセット、それ以外はクリア 15901: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 15902: if (!XEiJ.fpuBox.epbIsFullSpec ()) { 15903: irpExceptionFormat2 (M68kException.M6E_FP_UNIMPLEMENTED_INSTRUCTION << 2, XEiJ.regPC, a); //pcは次の命令,アドレスは実効アドレス 15904: break fgen; 15905: } 15906: XEiJ.fpuFPn[n].sin (XEiJ.fpuFPn[m]); 15907: break; 15908: 15909: case 0b000_1111: //$xx0F: FTAN.* *m,FPn 15910: // BSUN 常にクリア 15911: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 15912: // OPERR 引数が無限大のときセット、それ以外はクリア 15913: // OVFL オーバーフローしたときセット、それ以外はクリア 15914: // UNFL 結果が非正規化数のときセット、それ以外はクリア 15915: // DZ 常にクリア 15916: // cos(x)=0を満たすxは正確に表現できないのだからsin(x)/cos(x)がゼロ除算になるのはおかしい 15917: // INEX2 結果に誤差があるときセット、それ以外はクリア 15918: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 15919: if (!XEiJ.fpuBox.epbIsFullSpec ()) { 15920: irpExceptionFormat2 (M68kException.M6E_FP_UNIMPLEMENTED_INSTRUCTION << 2, XEiJ.regPC, a); //pcは次の命令,アドレスは実効アドレス 15921: break fgen; 15922: } 15923: XEiJ.fpuFPn[n].tan (XEiJ.fpuFPn[m]); 15924: break; 15925: 15926: case 0b001_0000: //$xx10: FETOX.* *m,FPn 15927: // BSUN 常にクリア 15928: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 15929: // OPERR 常にクリア 15930: // OVFL オーバーフローしたときセット、それ以外はクリア 15931: // UNFL 結果が非正規化数のときセット、それ以外はクリア 15932: // DZ 常にクリア 15933: // INEX2 結果に誤差があるときセット、それ以外はクリア 15934: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 15935: if (!XEiJ.fpuBox.epbIsFullSpec ()) { 15936: irpExceptionFormat2 (M68kException.M6E_FP_UNIMPLEMENTED_INSTRUCTION << 2, XEiJ.regPC, a); //pcは次の命令,アドレスは実効アドレス 15937: break fgen; 15938: } 15939: XEiJ.fpuFPn[n].exp (XEiJ.fpuFPn[m]); 15940: break; 15941: 15942: case 0b001_0001: //$xx11: FTWOTOX.* *m,FPn 15943: // BSUN 常にクリア 15944: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 15945: // OPERR 常にクリア 15946: // OVFL オーバーフローしたときセット、それ以外はクリア 15947: // UNFL 結果が非正規化数のときセット、それ以外はクリア 15948: // DZ 常にクリア 15949: // INEX2 結果に誤差があるときセット、それ以外はクリア 15950: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 15951: if (!XEiJ.fpuBox.epbIsFullSpec ()) { 15952: irpExceptionFormat2 (M68kException.M6E_FP_UNIMPLEMENTED_INSTRUCTION << 2, XEiJ.regPC, a); //pcは次の命令,アドレスは実効アドレス 15953: break fgen; 15954: } 15955: XEiJ.fpuFPn[n].exp2 (XEiJ.fpuFPn[m]); 15956: break; 15957: 15958: case 0b001_0010: //$xx12: FTENTOX.* *m,FPn 15959: case 0b001_0011: //$xx13: FTENTOX.* *m,FPn (MC68882) 15960: // BSUN 常にクリア 15961: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 15962: // OPERR 常にクリア 15963: // OVFL オーバーフローしたときセット、それ以外はクリア 15964: // UNFL 結果が非正規化数のときセット、それ以外はクリア 15965: // DZ 常にクリア 15966: // INEX2 結果に誤差があるときセット、それ以外はクリア 15967: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 15968: if (!XEiJ.fpuBox.epbIsFullSpec ()) { 15969: irpExceptionFormat2 (M68kException.M6E_FP_UNIMPLEMENTED_INSTRUCTION << 2, XEiJ.regPC, a); //pcは次の命令,アドレスは実効アドレス 15970: break fgen; 15971: } 15972: XEiJ.fpuFPn[n].exp10 (XEiJ.fpuFPn[m]); 15973: break; 15974: 15975: case 0b001_0100: //$xx14: FLOGN.* *m,FPn 15976: // BSUN 常にクリア 15977: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 15978: // OPERR 引数が0よりも小さいときセット、それ以外はクリア 15979: // OVFL 常にクリア 15980: // log(1)=0,log(x)<=x-1なので結果が引数よりも大きくなることはない 15981: // UNFL 常にクリア 15982: // log(1+2^-80)≒2^-80 15983: // DZ 引数がゼロのときセット、それ以外はクリア 15984: // INEX2 結果に誤差があるときセット、それ以外はクリア 15985: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 15986: if (!XEiJ.fpuBox.epbIsFullSpec ()) { 15987: irpExceptionFormat2 (M68kException.M6E_FP_UNIMPLEMENTED_INSTRUCTION << 2, XEiJ.regPC, a); //pcは次の命令,アドレスは実効アドレス 15988: break fgen; 15989: } 15990: XEiJ.fpuFPn[n].log (XEiJ.fpuFPn[m]); 15991: break; 15992: 15993: case 0b001_0101: //$xx15: FLOG10.* *m,FPn 15994: // BSUN 常にクリア 15995: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 15996: // OPERR 引数が0よりも小さいときセット、それ以外はクリア 15997: // OVFL 常にクリア 15998: // UNFL 常にクリア 15999: // DZ 引数がゼロのときセット、それ以外はクリア 16000: // INEX2 結果に誤差があるときセット、それ以外はクリア 16001: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16002: if (!XEiJ.fpuBox.epbIsFullSpec ()) { 16003: irpExceptionFormat2 (M68kException.M6E_FP_UNIMPLEMENTED_INSTRUCTION << 2, XEiJ.regPC, a); //pcは次の命令,アドレスは実効アドレス 16004: break fgen; 16005: } 16006: XEiJ.fpuFPn[n].log10 (XEiJ.fpuFPn[m]); 16007: break; 16008: 16009: case 0b001_0110: //$xx16: FLOG2.* *m,FPn 16010: case 0b001_0111: //$xx17: FLOG2.* *m,FPn (MC68882) 16011: // BSUN 常にクリア 16012: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16013: // OPERR 引数が0よりも小さいときセット、それ以外はクリア 16014: // OVFL 常にクリア 16015: // UNFL 常にクリア 16016: // DZ 引数がゼロのときセット、それ以外はクリア 16017: // INEX2 結果に誤差があるときセット、それ以外はクリア 16018: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16019: if (!XEiJ.fpuBox.epbIsFullSpec ()) { 16020: irpExceptionFormat2 (M68kException.M6E_FP_UNIMPLEMENTED_INSTRUCTION << 2, XEiJ.regPC, a); //pcは次の命令,アドレスは実効アドレス 16021: break fgen; 16022: } 16023: XEiJ.fpuFPn[n].log2 (XEiJ.fpuFPn[m]); 16024: break; 16025: 16026: case 0b001_1000: //$xx18: FABS.* *m,FPn 16027: // BSUN 常にクリア 16028: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16029: // OPERR 常にクリア 16030: // OVFL 常にクリア 16031: // UNFL 結果が非正規化数のときセット、それ以外はクリア 16032: // DZ 常にクリア 16033: // INEX2 常にクリア 16034: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16035: XEiJ.fpuFPn[n].abs (XEiJ.fpuFPn[m]); 16036: break; 16037: 16038: case 0b001_1001: //$xx19: FCOSH.* *m,FPn 16039: // BSUN 常にクリア 16040: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16041: // OPERR 常にクリア 16042: // OVFL オーバーフローしたときセット、それ以外はクリア 16043: // UNFL 常にクリア 16044: // DZ 常にクリア 16045: // INEX2 結果に誤差があるときセット、それ以外はクリア 16046: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16047: if (!XEiJ.fpuBox.epbIsFullSpec ()) { 16048: irpExceptionFormat2 (M68kException.M6E_FP_UNIMPLEMENTED_INSTRUCTION << 2, XEiJ.regPC, a); //pcは次の命令,アドレスは実効アドレス 16049: break fgen; 16050: } 16051: XEiJ.fpuFPn[n].cosh (XEiJ.fpuFPn[m]); 16052: break; 16053: 16054: case 0b001_1010: //$xx1A: FNEG.* *m,FPn 16055: case 0b001_1011: //$xx1B: FNEG.* *m,FPn (MC68882) 16056: // BSUN 常にクリア 16057: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16058: // OPERR 常にクリア 16059: // OVFL 常にクリア 16060: // UNFL 結果が非正規化数のときセット、それ以外はクリア 16061: // DZ 常にクリア 16062: // INEX2 常にクリア 16063: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16064: XEiJ.fpuFPn[n].neg (XEiJ.fpuFPn[m]); 16065: break; 16066: 16067: case 0b001_1100: //$xx1C: FACOS.* *m,FPn 16068: // BSUN 常にクリア 16069: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16070: // OPERR 引数の絶対値が1よりも大きいときセット、それ以外はクリア 16071: // OVFL 常にクリア 16072: // UNFL 常にクリア 16073: // acos(1-ulp(1))はulp(1)よりも大きい 16074: // DZ 常にクリア 16075: // INEX2 結果に誤差があるときセット、それ以外はクリア 16076: // おそらくセットされないのはacos(1)=0だけ 16077: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16078: if (!XEiJ.fpuBox.epbIsFullSpec ()) { 16079: irpExceptionFormat2 (M68kException.M6E_FP_UNIMPLEMENTED_INSTRUCTION << 2, XEiJ.regPC, a); //pcは次の命令,アドレスは実効アドレス 16080: break fgen; 16081: } 16082: XEiJ.fpuFPn[n].acos (XEiJ.fpuFPn[m]); 16083: break; 16084: 16085: case 0b001_1101: //$xx1D: FCOS.* *m,FPn 16086: // BSUN 常にクリア 16087: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16088: // OPERR 引数が無限大のときセット、それ以外はクリア 16089: // OVFL 常にクリア 16090: // UNFL 常にクリア 16091: // cos(x)=0を満たすxは正確に表現できず、cos(pi/2)とcos(3*pi/2)が正規化数になってしまう 16092: // DZ 常にクリア 16093: // INEX2 結果に誤差があるときセット、それ以外はクリア 16094: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16095: if (!XEiJ.fpuBox.epbIsFullSpec ()) { 16096: irpExceptionFormat2 (M68kException.M6E_FP_UNIMPLEMENTED_INSTRUCTION << 2, XEiJ.regPC, a); //pcは次の命令,アドレスは実効アドレス 16097: break fgen; 16098: } 16099: XEiJ.fpuFPn[n].cos (XEiJ.fpuFPn[m]); 16100: break; 16101: 16102: case 0b001_1110: //$xx1E: FGETEXP.* *m,FPn 16103: // BSUN 常にクリア 16104: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16105: // OPERR 引数が無限大のときセット、それ以外はクリア 16106: // OVFL 常にクリア 16107: // UNFL 常にクリア 16108: // DZ 常にクリア 16109: // INEX2 常にクリア 16110: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16111: if (!XEiJ.fpuBox.epbIsFullSpec ()) { 16112: irpExceptionFormat2 (M68kException.M6E_FP_UNIMPLEMENTED_INSTRUCTION << 2, XEiJ.regPC, a); //pcは次の命令,アドレスは実効アドレス 16113: break fgen; 16114: } 16115: XEiJ.fpuFPn[n].getexp (XEiJ.fpuFPn[m]); 16116: break; 16117: 16118: case 0b001_1111: //$xx1F: FGETMAN.* *m,FPn 16119: // BSUN 常にクリア 16120: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16121: // OPERR 引数が無限大のときセット、それ以外はクリア 16122: // OVFL 常にクリア 16123: // UNFL 常にクリア 16124: // DZ 常にクリア 16125: // INEX2 常にクリア 16126: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16127: if (!XEiJ.fpuBox.epbIsFullSpec ()) { 16128: irpExceptionFormat2 (M68kException.M6E_FP_UNIMPLEMENTED_INSTRUCTION << 2, XEiJ.regPC, a); //pcは次の命令,アドレスは実効アドレス 16129: break fgen; 16130: } 16131: XEiJ.fpuFPn[n].getman (XEiJ.fpuFPn[m]); 16132: break; 16133: 16134: case 0b010_0000: //$xx20: FDIV.* *m,FPn 16135: // BSUN 常にクリア 16136: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16137: // OPERR 引数が両方ゼロまたは両方無限大のときセット、それ以外はクリア 16138: // OVFL オーバーフローしたときセット、それ以外はクリア 16139: // UNFL 結果が非正規化数のときセット、それ以外はクリア 16140: // DZ 被除数がゼロ、無限大、NaN以外で除数がゼロのときセット、それ以外はクリア 16141: // INEX2 結果に誤差があるときセット、それ以外はクリア 16142: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16143: XEiJ.mpuCycleCount += 36; 16144: XEiJ.fpuFPn[n].div (XEiJ.fpuFPn[m]); 16145: break; 16146: 16147: case 0b010_0001: //$xx21: FMOD.* *m,FPn 16148: // BSUN 常にクリア 16149: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16150: // OPERR 除数がゼロまたは被除数が無限大のときセット、それ以外はクリア 16151: // OVFL 常にクリア 16152: // UNFL 結果が非正規化数のときセット、それ以外はクリア 16153: // DZ 常にクリア 16154: // 除数がゼロのとき結果は無限大ではなくNaNでありゼロ除算にはならない 16155: // INEX2 結果に誤差があるときセット、それ以外はクリア 16156: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16157: // FPSRのquotient byteに符号付き商の下位7bitが入る 16158: if (!XEiJ.fpuBox.epbIsFullSpec ()) { 16159: irpExceptionFormat2 (M68kException.M6E_FP_UNIMPLEMENTED_INSTRUCTION << 2, XEiJ.regPC, a); //pcは次の命令,アドレスは実効アドレス 16160: break fgen; 16161: } 16162: XEiJ.fpuFPn[n].rem (XEiJ.fpuFPn[m]); 16163: break; 16164: 16165: case 0b010_0010: //$xx22: FADD.* *m,FPn 16166: // BSUN 常にクリア 16167: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16168: // OPERR 引数が両方無限大で符号が異なるときセット、それ以外はクリア 16169: // OVFL オーバーフローしたときセット、それ以外はクリア 16170: // UNFL 結果が非正規化数のときセット、それ以外はクリア 16171: // DZ 常にクリア 16172: // INEX2 結果に誤差があるときセット、それ以外はクリア 16173: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16174: XEiJ.mpuCycleCount += 2; 16175: XEiJ.fpuFPn[n].add (XEiJ.fpuFPn[m]); 16176: break; 16177: 16178: case 0b010_0011: //$xx23: FMUL.* *m,FPn 16179: // BSUN 常にクリア 16180: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16181: // OPERR 引数の一方がゼロで他方が無限大のときセット、それ以外はクリア 16182: // OVFL オーバーフローしたときセット、それ以外はクリア 16183: // UNFL 結果が非正規化数のときセット、それ以外はクリア 16184: // DZ 常にクリア 16185: // INEX2 結果に誤差があるときセット、それ以外はクリア 16186: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16187: XEiJ.mpuCycleCount += 2; 16188: XEiJ.fpuFPn[n].mul (XEiJ.fpuFPn[m]); 16189: break; 16190: 16191: case 0b010_0100: //$xx24: FSGLDIV.* *m,FPn 16192: // BSUN 常にクリア 16193: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16194: // OPERR 引数が両方ゼロまたは両方無限大のときセット、それ以外はクリア 16195: // OVFL オーバーフローしたときセット、それ以外はクリア 16196: // UNFL 結果が非正規化数のときセット、それ以外はクリア 16197: // DZ 被除数がゼロ、無限大、NaN以外で除数がゼロのときセット、それ以外はクリア 16198: // INEX2 結果に誤差があるときセット、それ以外はクリア 16199: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16200: XEiJ.mpuCycleCount += 36; 16201: XEiJ.fpuBox.epbSetRoundingPrec (EFPBox.EPB_PREC_XSG); 16202: XEiJ.fpuFPn[n].div (XEiJ.fpuFPn[m]); 16203: break; 16204: 16205: case 0b010_0101: //$xx25: FREM.* *m,FPn 16206: // BSUN 常にクリア 16207: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16208: // OPERR 除数がゼロまたは被除数が無限大のときセット、それ以外はクリア 16209: // OVFL 常にクリア 16210: // UNFL 結果が非正規化数のときセット、それ以外はクリア 16211: // DZ 常にクリア 16212: // 除数がゼロのとき結果は無限大ではなくNaNでありゼロ除算にはならない 16213: // INEX2 結果に誤差があるときセット、それ以外はクリア 16214: // マニュアルにClearedと書いてあるのは間違い 16215: // 除数が無限大で被除数をそのまま返す場合でもサイズが減ればアンダーフローや不正確な結果になることはマニュアルにも書かれている 16216: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16217: // FPSRのquotient byteに符号付き商の下位7bitが入る 16218: if (!XEiJ.fpuBox.epbIsFullSpec ()) { 16219: irpExceptionFormat2 (M68kException.M6E_FP_UNIMPLEMENTED_INSTRUCTION << 2, XEiJ.regPC, a); //pcは次の命令,アドレスは実効アドレス 16220: break fgen; 16221: } 16222: XEiJ.fpuFPn[n].ieeerem (XEiJ.fpuFPn[m]); 16223: break; 16224: 16225: case 0b010_0110: //$xx26: FSCALE.* *m,FPn 16226: // BSUN 常にクリア 16227: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16228: // OPERR 引数が無限大のときセット、それ以外はクリア 16229: // OVFL オーバーフローしたときセット、それ以外はクリア 16230: // UNFL 結果が非正規化数のときセット、それ以外はクリア 16231: // DZ 常にクリア 16232: // INEX2 常にクリア 16233: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16234: if (!XEiJ.fpuBox.epbIsFullSpec ()) { 16235: irpExceptionFormat2 (M68kException.M6E_FP_UNIMPLEMENTED_INSTRUCTION << 2, XEiJ.regPC, a); //pcは次の命令,アドレスは実効アドレス 16236: break fgen; 16237: } 16238: //! 本来はソースが整数のとき浮動小数点数を経由しないが、これは経由してしまっている。結果は同じだが効率が悪い 16239: XEiJ.fpuFPn[n].scale (XEiJ.fpuFPn[m]); 16240: break; 16241: 16242: case 0b010_0111: //$xx27: FSGLMUL.* *m,FPn 16243: // BSUN 常にクリア 16244: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16245: // OPERR 引数の一方がゼロで他方が無限大のときセット、それ以外はクリア 16246: // OVFL オーバーフローしたときセット、それ以外はクリア 16247: // UNFL 結果が非正規化数のときセット、それ以外はクリア 16248: // DZ 常にクリア 16249: // INEX2 結果に誤差があるときセット、それ以外はクリア 16250: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16251: XEiJ.mpuCycleCount += 2; 16252: { 16253: //引数を24bitに切り捨てるときX2をセットしない 16254: int sr = XEiJ.fpuBox.epbFpsr; 16255: XEiJ.fpuFPn[EFPBox.EPB_SRC_TMP].roundmanf (XEiJ.fpuFPn[m], EFPBox.EPB_MODE_RZ); 16256: XEiJ.fpuFPn[EFPBox.EPB_DST_TMP].roundmanf (XEiJ.fpuFPn[n], EFPBox.EPB_MODE_RZ); 16257: XEiJ.fpuBox.epbFpsr = sr; 16258: } 16259: XEiJ.fpuBox.epbSetRoundingPrec (EFPBox.EPB_PREC_XSG); 16260: XEiJ.fpuFPn[n].mul (XEiJ.fpuFPn[EFPBox.EPB_DST_TMP], XEiJ.fpuFPn[EFPBox.EPB_SRC_TMP]); 16261: break; 16262: 16263: case 0b010_1000: //$xx28: FSUB.* *m,FPn 16264: case 0b010_1001: //$xx29: FSUB.* *m,FPn (MC68882) 16265: case 0b010_1010: //$xx2A: FSUB.* *m,FPn (MC68882) 16266: case 0b010_1011: //$xx2B: FSUB.* *m,FPn (MC68882) 16267: case 0b010_1100: //$xx2C: FSUB.* *m,FPn (MC68882) 16268: case 0b010_1101: //$xx2D: FSUB.* *m,FPn (MC68882) 16269: case 0b010_1110: //$xx2E: FSUB.* *m,FPn (MC68882) 16270: case 0b010_1111: //$xx2F: FSUB.* *m,FPn (MC68882) 16271: // BSUN 常にクリア 16272: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16273: // OPERR 引数が両方無限大で符号が同じときセット、それ以外はクリア 16274: // OVFL オーバーフローしたときセット、それ以外はクリア 16275: // UNFL 結果が非正規化数のときセット、それ以外はクリア 16276: // DZ 常にクリア 16277: // INEX2 結果に誤差があるときセット、それ以外はクリア 16278: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16279: XEiJ.mpuCycleCount += 2; 16280: XEiJ.fpuFPn[n].sub (XEiJ.fpuFPn[m]); 16281: break; 16282: 16283: case 0b011_0000: //$xx30: FSINCOS.* *m,FP0:FPn (c=0,s=n) 16284: case 0b011_0001: //$xx31: FSINCOS.* *m,FP1:FPn (c=1,s=n) 16285: case 0b011_0010: //$xx32: FSINCOS.* *m,FP2:FPn (c=2,s=n) 16286: case 0b011_0011: //$xx33: FSINCOS.* *m,FP3:FPn (c=3,s=n) 16287: case 0b011_0100: //$xx34: FSINCOS.* *m,FP4:FPn (c=4,s=n) 16288: case 0b011_0101: //$xx35: FSINCOS.* *m,FP5:FPn (c=5,s=n) 16289: case 0b011_0110: //$xx36: FSINCOS.* *m,FP6:FPn (c=6,s=n) 16290: case 0b011_0111: //$xx37: FSINCOS.* *m,FP7:FPn (c=7,s=n) 16291: // BSUN 常にクリア 16292: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16293: // OPERR 引数が無限大のときセット、それ以外はクリア 16294: // OVFL 常にクリア 16295: // UNFL sin(x)の結果が非正規化数のときセット、それ以外はクリア 16296: // cos(x)の結果は非正規化数にならない 16297: // DZ 常にクリア 16298: // INEX2 結果に誤差があるときセット、それ以外はクリア 16299: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16300: if (!XEiJ.fpuBox.epbIsFullSpec ()) { 16301: irpExceptionFormat2 (M68kException.M6E_FP_UNIMPLEMENTED_INSTRUCTION << 2, XEiJ.regPC, a); //pcは次の命令,アドレスは実効アドレス 16302: break fgen; 16303: } 16304: c &= 7; 16305: //m==EFPBox.EPB_SRC_TMP||m==n||m==cの場合があることに注意する 16306: XEiJ.fpuFPn[EFPBox.EPB_SRC_TMP].sete (XEiJ.fpuFPn[m]); 16307: XEiJ.fpuFPn[c].cos (XEiJ.fpuFPn[EFPBox.EPB_SRC_TMP]); 16308: XEiJ.fpuFPn[n].sin (XEiJ.fpuFPn[EFPBox.EPB_SRC_TMP]); 16309: break; 16310: 16311: case 0b011_1000: //$xx38: FCMP.* *m,FPn 16312: case 0b011_1001: //$xx39: FCMP.* *m,FPn (MC68882) 16313: case 0b011_1100: //$xx3C: FCMP.* *m,FPn (MC68882) コマンドワードの不連続箇所に注意 16314: case 0b011_1101: //$xx3D: FCMP.* *m,FPn (MC68882) 16315: // BSUN 常にクリア 16316: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16317: // OPERR 常にクリア 16318: // OVFL 常にクリア 16319: // UNFL 常にクリア 16320: // DZ 常にクリア 16321: // INEX2 常にクリア 16322: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16323: // FCMPはinfinityを常にクリアする 16324: // efp.compareTo(x,y)を使う 16325: // efp.compareTo(x,y)はefp.sub(x,y)よりも速い 16326: // efp.sub(x,y)はINEX2をセットしてしまう 16327: // efp.compareTo(x,y)は-0<+0だがFCMPは-0==+0なのでこれだけ調節する 16328: { 16329: int xf = XEiJ.fpuFPn[n].flg; 16330: int yf = XEiJ.fpuFPn[m].flg; 16331: if ((xf | yf) << 3 < 0) { //どちらかがNaN 16332: //XEiJ.fpuFPn[EFPBox.EPB_DST_TMP].setnan (); 16333: XEiJ.fpuFPn[EFPBox.EPB_DST_TMP].flg = EFPBox.N; 16334: } else { 16335: int i = ((xf & yf) << 1 < 0 ? 0 : //両方±0 16336: XEiJ.fpuFPn[n].compareTo (XEiJ.fpuFPn[m])); //-Inf==-Inf<-x<-0<+0<+x<+Inf==+Inf<NaN==NaN 16337: if (i == 0) { 16338: if (xf < 0) { 16339: //XEiJ.fpuFPn[EFPBox.EPB_DST_TMP].negset0 (); 16340: XEiJ.fpuFPn[EFPBox.EPB_DST_TMP].flg = EFPBox.M | EFPBox.Z; 16341: } else { 16342: //XEiJ.fpuFPn[EFPBox.EPB_DST_TMP].set0 (); 16343: XEiJ.fpuFPn[EFPBox.EPB_DST_TMP].flg = EFPBox.P | EFPBox.Z; 16344: } 16345: } else if (i < 0) { 16346: XEiJ.fpuFPn[EFPBox.EPB_DST_TMP].negset1 (); 16347: } else { 16348: XEiJ.fpuFPn[EFPBox.EPB_DST_TMP].set1 (); 16349: } 16350: } 16351: n = EFPBox.EPB_DST_TMP; 16352: } 16353: break; 16354: 16355: case 0b011_1010: //$xx3A: FTST.* *m 16356: case 0b011_1011: //$xx3B: FTST.* *m (MC68882) 16357: case 0b011_1110: //$xx3E: FTST.* *m (MC68882) コマンドワードの不連続箇所に注意 16358: case 0b011_1111: //$xx3F: FTST.* *m (MC68882) 16359: // BSUN 常にクリア 16360: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16361: // OPERR 常にクリア 16362: // OVFL 常にクリア 16363: // UNFL 常にクリア 16364: // DZ 常にクリア 16365: // INEX2 常にクリア 16366: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16367: // ソースオペランドをダミーのデスティネーションオペランドにコピーしてテストする 16368: // デスティネーションオペランドは変化しない 16369: // デスティネーションオペランドにはFP0が指定される場合が多いがFP0である必要はない 16370: XEiJ.fpuFPn[EFPBox.EPB_DST_TMP].sete (XEiJ.fpuFPn[m]); 16371: n = EFPBox.EPB_DST_TMP; 16372: break; 16373: 16374: case 0b100_0000: //$xx40: FSMOVE.* *m,FPn 16375: // BSUN 常にクリア 16376: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16377: // OPERR 常にクリア 16378: // OVFL 常にクリア 16379: // UNFL 結果が非正規化数のときセット、それ以外はクリア 16380: // DZ 常にクリア 16381: // INEX2 結果に誤差があるときセット、それ以外はクリア 16382: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16383: XEiJ.fpuBox.epbSetRoundingPrec (EFPBox.EPB_PREC_SGL); 16384: XEiJ.fpuFPn[n].sete (XEiJ.fpuFPn[m]).finish (); 16385: break; 16386: 16387: case 0b100_0001: //$xx41: FSSQRT.* *m,FPn 16388: // BSUN 常にクリア 16389: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16390: // OPERR 引数が-0を除く負数のときセット、それ以外はクリア 16391: // OVFL 常にクリア 16392: // UNFL 常にクリア 16393: // DZ 常にクリア 16394: // INEX2 結果に誤差があるときセット、それ以外はクリア 16395: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16396: XEiJ.mpuCycleCount += 67; 16397: XEiJ.fpuBox.epbSetRoundingPrec (EFPBox.EPB_PREC_SGL); 16398: XEiJ.fpuFPn[n].sqrt (XEiJ.fpuFPn[m]); 16399: break; 16400: 16401: //case 0b100_0010: //$xx42: 16402: //case 0b100_0011: //$xx43: 16403: 16404: case 0b100_0100: //$xx44: FDMOVE.* *m,FPn 16405: // BSUN 常にクリア 16406: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16407: // OPERR 常にクリア 16408: // OVFL 常にクリア 16409: // UNFL 結果が非正規化数のときセット、それ以外はクリア 16410: // DZ 常にクリア 16411: // INEX2 結果に誤差があるときセット、それ以外はクリア 16412: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16413: XEiJ.fpuBox.epbSetRoundingPrec (EFPBox.EPB_PREC_DBL); 16414: XEiJ.fpuFPn[n].sete (XEiJ.fpuFPn[m]).finish (); 16415: break; 16416: 16417: case 0b100_0101: //$xx45: FDSQRT.* *m,FPn 16418: // BSUN 常にクリア 16419: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16420: // OPERR 引数が-0を除く負数のときセット、それ以外はクリア 16421: // OVFL 常にクリア 16422: // UNFL 常にクリア 16423: // DZ 常にクリア 16424: // INEX2 結果に誤差があるときセット、それ以外はクリア 16425: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16426: XEiJ.mpuCycleCount += 67; 16427: XEiJ.fpuBox.epbSetRoundingPrec (EFPBox.EPB_PREC_DBL); 16428: XEiJ.fpuFPn[n].sqrt (XEiJ.fpuFPn[m]); 16429: break; 16430: 16431: //case 0b100_0110: //$xx46: 16432: //case 0b100_0111: //$xx47: 16433: //case 0b100_1000: //$xx48: 16434: //case 0b100_1001: //$xx49: 16435: //case 0b100_1010: //$xx4A: 16436: //case 0b100_1011: //$xx4B: 16437: //case 0b100_1100: //$xx4C: 16438: //case 0b100_1101: //$xx4D: 16439: //case 0b100_1110: //$xx4E: 16440: //case 0b100_1111: //$xx4F: 16441: //case 0b101_0000: //$xx50: 16442: //case 0b101_0001: //$xx51: 16443: //case 0b101_0010: //$xx52: 16444: //case 0b101_0011: //$xx53: 16445: //case 0b101_0100: //$xx54: 16446: //case 0b101_0101: //$xx55: 16447: //case 0b101_0110: //$xx56: 16448: //case 0b101_0111: //$xx57: 16449: 16450: case 0b101_1000: //$xx58: FSABS.* *m,FPn 16451: // BSUN 常にクリア 16452: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16453: // OPERR 常にクリア 16454: // OVFL 常にクリア 16455: // UNFL 結果が非正規化数のときセット、それ以外はクリア 16456: // DZ 常にクリア 16457: // INEX2 常にクリア 16458: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16459: XEiJ.fpuBox.epbSetRoundingPrec (EFPBox.EPB_PREC_SGL); 16460: XEiJ.fpuFPn[n].abs (XEiJ.fpuFPn[m]); 16461: break; 16462: 16463: //case 0b101_1001: //$xx59: 16464: 16465: case 0b101_1010: //$xx5A: FSNEG.* *m,FPn 16466: // BSUN 常にクリア 16467: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16468: // OPERR 常にクリア 16469: // OVFL 常にクリア 16470: // UNFL 結果が非正規化数のときセット、それ以外はクリア 16471: // DZ 常にクリア 16472: // INEX2 常にクリア 16473: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16474: XEiJ.fpuBox.epbSetRoundingPrec (EFPBox.EPB_PREC_SGL); 16475: XEiJ.fpuFPn[n].neg (XEiJ.fpuFPn[m]); 16476: break; 16477: 16478: //case 0b101_1011: //$xx5B: 16479: 16480: case 0b101_1100: //$xx5C: FDABS.* *m,FPn 16481: // BSUN 常にクリア 16482: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16483: // OPERR 常にクリア 16484: // OVFL 常にクリア 16485: // UNFL 結果が非正規化数のときセット、それ以外はクリア 16486: // DZ 常にクリア 16487: // INEX2 常にクリア 16488: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16489: XEiJ.fpuBox.epbSetRoundingPrec (EFPBox.EPB_PREC_DBL); 16490: XEiJ.fpuFPn[n].abs (XEiJ.fpuFPn[m]); 16491: break; 16492: 16493: //case 0b101_1101: //$xx5D: 16494: 16495: case 0b101_1110: //$xx5E: FDNEG.* *m,FPn 16496: // BSUN 常にクリア 16497: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16498: // OPERR 常にクリア 16499: // OVFL 常にクリア 16500: // UNFL 結果が非正規化数のときセット、それ以外はクリア 16501: // DZ 常にクリア 16502: // INEX2 常にクリア 16503: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16504: XEiJ.fpuBox.epbSetRoundingPrec (EFPBox.EPB_PREC_DBL); 16505: XEiJ.fpuFPn[n].neg (XEiJ.fpuFPn[m]); 16506: break; 16507: 16508: //case 0b101_1111: //$xx5F: 16509: 16510: case 0b110_0000: //$xx60: FSDIV.* *m,FPn 16511: // BSUN 常にクリア 16512: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16513: // OPERR 引数が両方ゼロまたは両方無限大のときセット、それ以外はクリア 16514: // OVFL オーバーフローしたときセット、それ以外はクリア 16515: // UNFL 結果が非正規化数のときセット、それ以外はクリア 16516: // DZ 被除数がゼロ、無限大、NaN以外で除数がゼロのときセット、それ以外はクリア 16517: // INEX2 結果に誤差があるときセット、それ以外はクリア 16518: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16519: XEiJ.mpuCycleCount += 36; 16520: XEiJ.fpuBox.epbSetRoundingPrec (EFPBox.EPB_PREC_SGL); 16521: XEiJ.fpuFPn[n].div (XEiJ.fpuFPn[m]); 16522: break; 16523: 16524: //case 0b110_0001: //$xx61: 16525: 16526: case 0b110_0010: //$xx62: FSADD.* *m,FPn 16527: // BSUN 常にクリア 16528: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16529: // OPERR 引数が両方無限大で符号が異なるときセット、それ以外はクリア 16530: // OVFL オーバーフローしたときセット、それ以外はクリア 16531: // UNFL 結果が非正規化数のときセット、それ以外はクリア 16532: // DZ 常にクリア 16533: // INEX2 結果に誤差があるときセット、それ以外はクリア 16534: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16535: XEiJ.mpuCycleCount += 2; 16536: XEiJ.fpuBox.epbSetRoundingPrec (EFPBox.EPB_PREC_SGL); 16537: XEiJ.fpuFPn[n].add (XEiJ.fpuFPn[m]); 16538: break; 16539: 16540: case 0b110_0011: //$xx63: FSMUL.* *m,FPn 16541: // BSUN 常にクリア 16542: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16543: // OPERR 引数の一方がゼロで他方が無限大のときセット、それ以外はクリア 16544: // OVFL オーバーフローしたときセット、それ以外はクリア 16545: // UNFL 結果が非正規化数のときセット、それ以外はクリア 16546: // DZ 常にクリア 16547: // INEX2 結果に誤差があるときセット、それ以外はクリア 16548: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16549: XEiJ.mpuCycleCount += 2; 16550: XEiJ.fpuBox.epbSetRoundingPrec (EFPBox.EPB_PREC_SGL); 16551: XEiJ.fpuFPn[n].mul (XEiJ.fpuFPn[m]); 16552: break; 16553: 16554: case 0b110_0100: //$xx64: FDDIV.* *m,FPn 16555: // BSUN 常にクリア 16556: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16557: // OPERR 引数が両方ゼロまたは両方無限大のときセット、それ以外はクリア 16558: // OVFL オーバーフローしたときセット、それ以外はクリア 16559: // UNFL 結果が非正規化数のときセット、それ以外はクリア 16560: // DZ 被除数がゼロ、無限大、NaN以外で除数がゼロのときセット、それ以外はクリア 16561: // INEX2 結果に誤差があるときセット、それ以外はクリア 16562: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16563: XEiJ.mpuCycleCount += 36; 16564: XEiJ.fpuBox.epbSetRoundingPrec (EFPBox.EPB_PREC_DBL); 16565: XEiJ.fpuFPn[n].div (XEiJ.fpuFPn[m]); 16566: break; 16567: 16568: //case 0b110_0101: //$xx65: 16569: 16570: case 0b110_0110: //$xx66: FDADD.* *m,FPn 16571: // BSUN 常にクリア 16572: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16573: // OPERR 引数が両方無限大で符号が異なるときセット、それ以外はクリア 16574: // OVFL オーバーフローしたときセット、それ以外はクリア 16575: // UNFL 結果が非正規化数のときセット、それ以外はクリア 16576: // DZ 常にクリア 16577: // INEX2 結果に誤差があるときセット、それ以外はクリア 16578: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16579: XEiJ.mpuCycleCount += 2; 16580: XEiJ.fpuBox.epbSetRoundingPrec (EFPBox.EPB_PREC_DBL); 16581: XEiJ.fpuFPn[n].add (XEiJ.fpuFPn[m]); 16582: break; 16583: 16584: case 0b110_0111: //$xx67: FDMUL.* *m,FPn 16585: // BSUN 常にクリア 16586: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16587: // OPERR 引数の一方がゼロで他方が無限大のときセット、それ以外はクリア 16588: // OVFL オーバーフローしたときセット、それ以外はクリア 16589: // UNFL 結果が非正規化数のときセット、それ以外はクリア 16590: // DZ 常にクリア 16591: // INEX2 結果に誤差があるときセット、それ以外はクリア 16592: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16593: XEiJ.mpuCycleCount += 2; 16594: XEiJ.fpuBox.epbSetRoundingPrec (EFPBox.EPB_PREC_DBL); 16595: XEiJ.fpuFPn[n].mul (XEiJ.fpuFPn[m]); 16596: break; 16597: 16598: case 0b110_1000: //$xx68: FSSUB.* *m,FPn 16599: // BSUN 常にクリア 16600: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16601: // OPERR 引数が両方無限大で符号が同じときセット、それ以外はクリア 16602: // OVFL オーバーフローしたときセット、それ以外はクリア 16603: // UNFL 結果が非正規化数のときセット、それ以外はクリア 16604: // DZ 常にクリア 16605: // INEX2 結果に誤差があるときセット、それ以外はクリア 16606: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16607: XEiJ.mpuCycleCount += 2; 16608: XEiJ.fpuBox.epbSetRoundingPrec (EFPBox.EPB_PREC_SGL); 16609: XEiJ.fpuFPn[n].sub (XEiJ.fpuFPn[m]); 16610: break; 16611: 16612: //case 0b110_1001: //$xx69: 16613: //case 0b110_1010: //$xx6A: 16614: //case 0b110_1011: //$xx6B: 16615: 16616: case 0b110_1100: //$xx6C: FDSUB.* *m,FPn 16617: // BSUN 常にクリア 16618: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16619: // OPERR 引数が両方無限大で符号が同じときセット、それ以外はクリア 16620: // OVFL オーバーフローしたときセット、それ以外はクリア 16621: // UNFL 結果が非正規化数のときセット、それ以外はクリア 16622: // DZ 常にクリア 16623: // INEX2 結果に誤差があるときセット、それ以外はクリア 16624: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16625: XEiJ.mpuCycleCount += 2; 16626: XEiJ.fpuBox.epbSetRoundingPrec (EFPBox.EPB_PREC_DBL); 16627: XEiJ.fpuFPn[n].sub (XEiJ.fpuFPn[m]); 16628: break; 16629: 16630: //case 0b110_1101: //$xx6D: 16631: //case 0b110_1110: //$xx6E: 16632: //case 0b110_1111: //$xx6F: 16633: 16634: case 0b111_0000: //$xx70: FLGAMMA *m,FPn 16635: if (EFPBox.EPB_EXTRA_OPERATION) { 16636: XEiJ.fpuFPn[n].lgamma (XEiJ.fpuFPn[m]); 16637: break; 16638: } else { 16639: XEiJ.regPC = XEiJ.regPC0 + 2; //拡張ワードを読まなかったことにする 16640: irpFline (); 16641: break fgen; 16642: } 16643: 16644: case 0b111_0001: //$xx71: FTGAMMA *m,FPn 16645: if (EFPBox.EPB_EXTRA_OPERATION) { 16646: XEiJ.fpuFPn[n].tgamma (XEiJ.fpuFPn[m]); 16647: break; 16648: } else { 16649: XEiJ.regPC = XEiJ.regPC0 + 2; //拡張ワードを読まなかったことにする 16650: irpFline (); 16651: break fgen; 16652: } 16653: 16654: //case 0b111_0010: //$xx72: 16655: //case 0b111_0011: //$xx73: 16656: //case 0b111_0100: //$xx74: 16657: //case 0b111_0101: //$xx75: 16658: //case 0b111_0110: //$xx76: 16659: //case 0b111_0111: //$xx77: 16660: //case 0b111_1000: //$xx78: 16661: //case 0b111_1001: //$xx79: 16662: //case 0b111_1010: //$xx7A: 16663: //case 0b111_1011: //$xx7B: 16664: //case 0b111_1100: //$xx7C: 16665: //case 0b111_1101: //$xx7D: 16666: //case 0b111_1110: //$xx7E: 16667: //case 0b111_1111: //$xx7F: 16668: 16669: default: //未定義 16670: XEiJ.regPC = XEiJ.regPC0 + 2; //拡張ワードを読まなかったことにする 16671: irpFline (); 16672: break fgen; 16673: } 16674: //FPSRのFPCCを設定する 16675: XEiJ.fpuBox.epbFpsr |= XEiJ.fpuFPn[n].flg >>> 4; 16676: //FPSRのAEXCを設定する 16677: XEiJ.fpuBox.epbFpsr |= XEiJ.FPU_FPSR_EXC_TO_AEXC[XEiJ.fpuBox.epbFpsr >> 8 & 255]; 16678: //浮動小数点命令実行後例外 floating-point post-instruction exception 16679: if (irpFPPostInstruction (a)) { 16680: break fgen; 16681: } 16682: break fgen; 16683: 16684: 16685: case 0b011: //$6xxx-$7xxx: FMOVE.* FPn,<ea> 16686: // BSUN 常にクリア 16687: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16688: // OPERR byte,word,longで無限大または指定されたサイズに収まらないとき、packedでk-factorが17よりも大きいか指数部が3桁に収まらないときセット、それ以外はクリア 16689: // OVFL packedではなくてオーバーフローしたときセット、それ以外はクリア 16690: // UNFL packedではなくて結果が非正規化数のときセット、それ以外はクリア 16691: // DZ 常にクリア 16692: // INEX2 結果に誤差があるときセット、それ以外はクリア 16693: // INEX1 常にクリア 16694: XEiJ.fpuBox.epbFpsr &= 0xffff00ff; //FMOVE.* FPn,<ea>でFPSRのコンディションコードバイトは変化しない 16695: XEiJ.fpuBox.epbFpiar = XEiJ.regPC0; //FPIARはFMOVEM/FMOVE FPcr/FSAVE/FRESTORE以外の命令で例外が発生しなくても更新される 16696: 16697: switch (m) { 16698: 16699: case 0b000: //$60xx-$63xx: FMOVE.L FPn,<ea> 16700: { 16701: int i = XEiJ.fpuFPn[n].geti (XEiJ.fpuBox.epbRoundingMode); 16702: if (ea < XEiJ.EA_AR) { //Dr。Ar不可 16703: XEiJ.regRn[ea] = i; 16704: } else { //Dr以外 16705: a = efaMltLong (ea); 16706: mmuWriteLongData (a, i, XEiJ.regSRS); 16707: } 16708: } 16709: break; 16710: 16711: case 0b001: //$64xx-$67xx: FMOVE.S FPn,<ea> 16712: { 16713: int i = XEiJ.fpuFPn[n].getf0 (XEiJ.fpuBox.epbRoundingMode); 16714: if (ea < XEiJ.EA_AR) { //Dr。Ar不可 16715: XEiJ.regRn[ea] = i; 16716: } else { //Dr以外 16717: a = efaMltLong (ea); 16718: mmuWriteLongData (a, i, XEiJ.regSRS); 16719: } 16720: } 16721: break; 16722: 16723: case 0b010: //$68xx-$6Bxx: FMOVE.X FPn,<ea> 16724: { 16725: int[] ib = new int[3]; 16726: if (XEiJ.fpuBox.epbIsTriple ()) { //三倍精度 16727: XEiJ.fpuFPn[n].gety012 (ib, 0, XEiJ.fpuBox.epbRoundingMode); 16728: } else { //拡張精度 16729: XEiJ.fpuFPn[n].getx012 (ib, 0, XEiJ.fpuBox.epbRoundingMode); 16730: } 16731: a = efaMltExtd (ea); 16732: if ((ea & 070) == 040) { //-(Ar) 16733: mmuWriteLongData (m60Address = a + 8, ib[2], XEiJ.regSRS); 16734: mmuWriteLongData (m60Address = a + 4, ib[1], XEiJ.regSRS); 16735: mmuWriteLongData (m60Address = a, ib[0], XEiJ.regSRS); 16736: } else { //-(Ar)以外 16737: mmuWriteLongData (m60Address = a, ib[0], XEiJ.regSRS); 16738: mmuWriteLongData (m60Address = a + 4, ib[1], XEiJ.regSRS); 16739: mmuWriteLongData (m60Address = a + 8, ib[2], XEiJ.regSRS); 16740: } 16741: } 16742: break; 16743: 16744: case 0b011: //$6Cxx-$6Fxx: FMOVE.P FPn,<ea>{#k} 16745: { 16746: a = efaMltExtd (ea); 16747: if (!XEiJ.fpuBox.epbIsFullSpec ()) { //パックトデシマル 16748: XEiJ.fpuBox.epbExceptionStatusWord = 0xe000 | M68kException.M6E_FP_UNSUPPORTED_DATA_TYPE & 7; 16749: irpExceptionFormat3 (M68kException.M6E_FP_UNSUPPORTED_DATA_TYPE << 2, XEiJ.regPC, a); //pcは次の命令,アドレスはデスティネーションオペランド 16750: break fgen; 16751: } 16752: int[] ib = new int[3]; 16753: XEiJ.fpuFPn[n].getp012 (ib, 0, w); //k-factor付き 16754: if ((ea & 070) == 040) { //-(Ar) 16755: mmuWriteLongData (m60Address = a + 8, ib[2], XEiJ.regSRS); 16756: mmuWriteLongData (m60Address = a + 4, ib[1], XEiJ.regSRS); 16757: mmuWriteLongData (m60Address = a, ib[0], XEiJ.regSRS); 16758: } else { //-(Ar)以外 16759: mmuWriteLongData (m60Address = a, ib[0], XEiJ.regSRS); 16760: mmuWriteLongData (m60Address = a + 4, ib[1], XEiJ.regSRS); 16761: mmuWriteLongData (m60Address = a + 8, ib[2], XEiJ.regSRS); 16762: } 16763: } 16764: break; 16765: 16766: case 0b100: //$70xx-$73xx: FMOVE.W FPn,<ea> 16767: { 16768: int i = XEiJ.fpuFPn[n].gets (XEiJ.fpuBox.epbRoundingMode); 16769: if (ea < XEiJ.EA_AR) { //Dr。Ar不可 16770: XEiJ.regRn[ea] = XEiJ.regRn[ea] & ~65535 | (char) i; 16771: } else { //Dr以外 16772: a = efaMltWord (ea); 16773: mmuWriteWordData (a, i, XEiJ.regSRS); 16774: } 16775: } 16776: break; 16777: 16778: case 0b101: //$74xx-$77xx: FMOVE.D FPn,<ea> 16779: { 16780: long l = XEiJ.fpuFPn[n].getd01 (XEiJ.fpuBox.epbRoundingMode); 16781: a = efaMltQuad (ea); 16782: mmuWriteQuadData (a, l, XEiJ.regSRS); 16783: } 16784: break; 16785: 16786: case 0b110: //$78xx-$7Bxx: FMOVE.B FPn,<ea> 16787: { 16788: int i = XEiJ.fpuFPn[n].getb (XEiJ.fpuBox.epbRoundingMode); 16789: if (ea < XEiJ.EA_AR) { //Dr。Ar不可 16790: XEiJ.regRn[ea] = XEiJ.regRn[ea] & ~255 | i & 255; 16791: } else { //Dr以外 16792: a = efaMltByte (ea); 16793: mmuWriteByteData (a, i, XEiJ.regSRS); 16794: } 16795: } 16796: break; 16797: 16798: case 0b111: //$7Cxx-$7Fxx: FMOVE.P FPn,<ea>{Dl} 16799: default: 16800: { 16801: a = efaMltExtd (ea); 16802: if (!XEiJ.fpuBox.epbIsFullSpec ()) { //パックトデシマル 16803: XEiJ.fpuBox.epbExceptionStatusWord = 0xe000 | M68kException.M6E_FP_UNSUPPORTED_DATA_TYPE & 7; 16804: irpExceptionFormat3 (M68kException.M6E_FP_UNSUPPORTED_DATA_TYPE << 2, XEiJ.regPC, a); //pcは次の命令,アドレスはデスティネーションオペランド 16805: break fgen; 16806: } 16807: byte[] b = new byte[12]; 16808: XEiJ.fpuFPn[n].getp012 (b, 0, XEiJ.regRn[w >> 4 & 7]); //k-factor付き 16809: if (ea >> 3 == XEiJ.MMM_MN) { //-(Ar) 16810: mmuWriteByteArrayDecrement (a, b, 0, 12, XEiJ.regSRS); 16811: } else { //-(Ar) 16812: mmuWriteByteArray (a, b, 0, 12, XEiJ.regSRS); 16813: } 16814: } 16815: } 16816: //FPSRのAEXCを設定する 16817: XEiJ.fpuBox.epbFpsr |= XEiJ.FPU_FPSR_EXC_TO_AEXC[XEiJ.fpuBox.epbFpsr >> 8 & 255]; 16818: //浮動小数点命令実行後例外 floating-point post-instruction exception 16819: if (irpFPPostInstruction (a)) { 16820: break fgen; 16821: } 16822: break fgen; 16823: 16824: 16825: case 0b100: //$8xxx-$9xxx: FMOVEM.L <ea>,FPCR/FPSR/FPIAR 16826: XEiJ.mpuCycleCount += 6; 16827: // FMOVEM命令は例外を発生させずFPCR/FPSR/FPIARも(デスティネーションに書かれたもの以外)変化しない 16828: // 格納順序はFPCRが下位アドレス(連結したとき上位),FPIARが上位アドレス(連結したとき下位) 16829: 16830: // レジスタリストは転送方向によらず4=FPCR,2=FPSR,1=FPIAR。0のとき1とみなす 16831: // Dr,Arは単一レジスタのみ、ArはFPIARのみ、さもなくば不当命令 16832: // (Ar)+は下位から転送した後にArをまとめて増やし、-(Ar)はArをまとめて減らした後に下位から転送する 16833: // 68060のとき#<data>は単一レジスタのみ、さもなくば未実装実効アドレス 16834: // 複数転送するときもFSLWのSIZEはLong 16835: { 16836: if (m == 0) { //レジスタリストが0のとき 16837: m = 1; //FPIARとみなす 16838: } 16839: int s = m == 7 ? 12 : m == 6 || m == 5 || m == 3 ? 8 : 4; //転送サイズ 16840: if ((ea & 070) == 000) { //Dr 16841: if (4 < s) { //複数 16842: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 16843: throw M68kException.m6eSignal; 16844: } 16845: } else if ((ea & 070) == 010) { //Ar 16846: if (m != 1) { //FPIAR以外 16847: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 16848: throw M68kException.m6eSignal; 16849: } 16850: } else if ((ea & 070) == 030) { //(Ar)+ 16851: a = XEiJ.regRn[ea - (030 - 8)]; 16852: } else if ((ea & 070) == 040) { //-(Ar) 16853: m60Incremented -= (long) s << (ea << 3); 16854: a = XEiJ.regRn[ea - (040 - 8)] -= s; 16855: } else if (ea == 074) { //#<data> 16856: if (4 < s && //複数 16857: !XEiJ.fpuBox.epbIsFullSpec ()) { //フルスペック以外 16858: irpExceptionFormat0 (M68kException.M6E_UNIMPLEMENTED_EFFECTIVE << 2, XEiJ.regPC0); //pcは命令の先頭 16859: break fgen; 16860: } 16861: } else { //その他 16862: a = efaMemLong (ea); 16863: } 16864: for (int t = 4; 1 <= t; t >>= 1) { //4,2,1 16865: if ((m & t) == 0) { 16866: continue; 16867: } 16868: int i = (ea < 020 ? XEiJ.regRn[ea] : //Dr,Ar 16869: ea == 074 ? mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS) : //#<data> 16870: mmuReadLongData (m60Address = a, XEiJ.regSRS)); 16871: if (t == 4) { //FPCR 16872: XEiJ.fpuBox.epbFpcr = i & EFPBox.EPB_FPCR_ALL; 16873: } else if (t == 2) { //FPSR 16874: XEiJ.fpuBox.epbFpsr = i & EFPBox.EPB_FPSR_ALL; 16875: // fmove.lでfpsrのEXCに書き込んだだけではAEXCは更新されない 16876: // fmove.lでfpsrに0x0000ff00を書き込んですぐに読み出しても0x0000ff00のまま 16877: } else { //FPIAR 16878: XEiJ.fpuBox.epbFpiar = i; 16879: } 16880: a += 4; 16881: } 16882: if ((ea & 070) == 030) { //(Ar)+ 16883: m60Incremented += (long) s << (ea << 3); 16884: XEiJ.regRn[ea - (040 - 8)] += s; 16885: } 16886: } 16887: break fgen; 16888: 16889: 16890: case 0b101: //$Axxx-$Bxxx: FMOVEM.L FPCR/FPSR/FPIAR,<ea> 16891: XEiJ.mpuCycleCount += 4; 16892: 16893: { 16894: if (m == 0) { //レジスタリストが0のとき 16895: m = 1; //FPIARとみなす 16896: } 16897: int s = m == 7 ? 12 : m == 6 || m == 5 || m == 3 ? 8 : 4; //転送サイズ 16898: if ((ea & 070) == 000) { //Dr 16899: if (4 < s) { //複数 16900: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 16901: throw M68kException.m6eSignal; 16902: } 16903: } else if ((ea & 070) == 010) { //Ar 16904: if (m != 1) { //FPIAR以外 16905: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 16906: throw M68kException.m6eSignal; 16907: } 16908: } else if ((ea & 070) == 030) { //(Ar)+ 16909: a = XEiJ.regRn[ea - (030 - 8)]; 16910: } else if ((ea & 070) == 040) { //-(Ar) 16911: m60Incremented -= (long) s << (ea << 3); 16912: a = XEiJ.regRn[ea - (040 - 8)] -= s; 16913: } else { //その他 16914: a = efaMltLong (ea); 16915: } 16916: for (int t = 4; 1 <= t; t >>= 1) { //4,2,1 16917: if ((m & t) == 0) { 16918: continue; 16919: } 16920: int i = (t == 4 ? XEiJ.fpuBox.epbFpcr : //FPCR 16921: t == 2 ? XEiJ.fpuBox.epbFpsr : //FPSR 16922: XEiJ.fpuBox.epbFpiar); //FPIAR 16923: if (ea < 020) { //Dr,Ar 16924: XEiJ.regRn[ea] = i; 16925: } else { 16926: mmuWriteLongData (m60Address = a, i, XEiJ.regSRS); 16927: } 16928: a += 4; 16929: } 16930: if ((ea & 070) == 030) { //(Ar)+ 16931: m60Incremented += (long) s << (ea << 3); 16932: XEiJ.regRn[ea - (040 - 8)] += s; 16933: } 16934: } 16935: break fgen; 16936: 16937: 16938: case 0b110: //$Cxxx-$Dxxx: FMOVEM.X <ea>,<list> 16939: // 0 <ea>,<list> 16940: // 1 <list>,<ea> 16941: // 0 -(Ar) 76543210 16942: // 1 -(Ar)以外 01234567 16943: // 0 static 16944: // 1 dynamic 0rrr0000 16945: // mmm 16946: { 16947: if ((m & 2) != 0 && !XEiJ.fpuBox.epbIsFullSpec ()) { //動的レジスタリスト 16948: irpExceptionFormat0 (M68kException.M6E_UNIMPLEMENTED_EFFECTIVE << 2, XEiJ.regPC0); //pcは命令の先頭 16949: break fgen; 16950: } 16951: int l = 0xff & ((m & 2) == 0 ? w : XEiJ.regRn[(0x0070 & w) >> 4]); 16952: int[] ib = new int[3]; 16953: if ((ea & 070) == 030) { //(Ar)+ 16954: int arr = ea - (030 - 8); 16955: a = XEiJ.regRn[arr]; 16956: for (n = 0; n <= 7; n++) { 16957: if ((l & (0x80 >> n)) == 0) { //01234567 16958: continue; 16959: } 16960: XEiJ.mpuCycleCount += 3; 16961: ib[0] = mmuReadLongData (m60Address = a, XEiJ.regSRS); 16962: ib[1] = mmuReadLongData (m60Address = a + 4, XEiJ.regSRS); 16963: ib[2] = mmuReadLongData (m60Address = a + 8, XEiJ.regSRS); 16964: if (XEiJ.fpuBox.epbIsTriple ()) { //三倍精度 16965: XEiJ.fpuFPn[n].sety012 (ib, 0); 16966: } else { //拡張精度 16967: XEiJ.fpuFPn[n].setx012 (ib, 0); 16968: } 16969: a += 12; 16970: } 16971: m60Incremented += (long) (a - XEiJ.regRn[arr]) << (arr << 3); 16972: XEiJ.regRn[arr] = a; 16973: } else { //(Ar)+以外 16974: a = efaCntLong (ea); 16975: for (n = 0; n <= 7; n++) { 16976: if ((l & (0x80 >> n)) == 0) { //01234567 16977: continue; 16978: } 16979: XEiJ.mpuCycleCount += 3; 16980: ib[0] = mmuReadLongData (m60Address = a, XEiJ.regSRS); 16981: ib[1] = mmuReadLongData (m60Address = a + 4, XEiJ.regSRS); 16982: ib[2] = mmuReadLongData (m60Address = a + 8, XEiJ.regSRS); 16983: if (XEiJ.fpuBox.epbIsTriple ()) { //三倍精度 16984: XEiJ.fpuFPn[n].sety012 (ib, 0); 16985: } else { //拡張精度 16986: XEiJ.fpuFPn[n].setx012 (ib, 0); 16987: } 16988: a += 12; 16989: } 16990: } 16991: } 16992: break fgen; 16993: 16994: 16995: case 0b111: //$Exxx-$Fxxx: FMOVEM.X <list>,<ea> 16996: { 16997: if ((m & 2) != 0 && !XEiJ.fpuBox.epbIsFullSpec ()) { //動的レジスタリスト 16998: irpExceptionFormat0 (M68kException.M6E_UNIMPLEMENTED_EFFECTIVE << 2, XEiJ.regPC0); //pcは命令の先頭 16999: break fgen; 17000: } 17001: int l = 0xff & ((m & 2) == 0 ? w : XEiJ.regRn[(0x0070 & w) >> 4]); 17002: int[] ib = new int[3]; 17003: if ((ea & 070) == 040) { //-(Ar) 17004: int arr = ea - (040 - 8); 17005: a = XEiJ.regRn[arr]; 17006: for (n = 7; 0 <= n; n--) { 17007: if ((l & (0x01 << n)) == 0) { //76543210 17008: continue; 17009: } 17010: XEiJ.mpuCycleCount += 3; 17011: a -= 12; 17012: if (XEiJ.fpuBox.epbIsTriple ()) { //三倍精度 17013: XEiJ.fpuFPn[n].gety012 (ib, 0, XEiJ.fpuBox.epbRoundingMode); 17014: } else { //拡張精度 17015: XEiJ.fpuFPn[n].getx012 (ib, 0, XEiJ.fpuBox.epbRoundingMode); 17016: } 17017: mmuWriteLongData (m60Address = a + 8, ib[2], XEiJ.regSRS); 17018: mmuWriteLongData (m60Address = a + 4, ib[1], XEiJ.regSRS); 17019: mmuWriteLongData (m60Address = a, ib[0], XEiJ.regSRS); 17020: } 17021: m60Incremented -= (long) (XEiJ.regRn[arr] - a) << (arr << 3); 17022: XEiJ.regRn[arr] = a; 17023: } else { //-(Ar)以外 17024: a = efaCntLong (ea); 17025: for (n = 0; n <= 7; n++) { 17026: if ((l & (0x80 >> n)) == 0) { //01234567 17027: continue; 17028: } 17029: XEiJ.mpuCycleCount += 3; 17030: if (XEiJ.fpuBox.epbIsTriple ()) { //三倍精度 17031: XEiJ.fpuFPn[n].gety012 (ib, 0, XEiJ.fpuBox.epbRoundingMode); 17032: } else { //拡張精度 17033: XEiJ.fpuFPn[n].getx012 (ib, 0, XEiJ.fpuBox.epbRoundingMode); 17034: } 17035: mmuWriteLongData (m60Address = a, ib[0], XEiJ.regSRS); 17036: mmuWriteLongData (m60Address = a + 4, ib[1], XEiJ.regSRS); 17037: mmuWriteLongData (m60Address = a + 8, ib[2], XEiJ.regSRS); 17038: a += 12; 17039: } 17040: } 17041: } 17042: break fgen; 17043: 17044: 17045: case 0b001: //$2xxx-$3xxx: 未定義 17046: default: //未定義 17047: XEiJ.fpuBox.epbFpiar = XEiJ.regPC0; //FPIARはFMOVEM/FMOVE FPcr/FSAVE/FRESTORE以外の命令で例外が発生しなくても更新される 17048: XEiJ.regPC = XEiJ.regPC0 + 2; //拡張ワードを読まなかったことにする 17049: irpFline (); 17050: break fgen; 17051: } 17052: } //fgen 17053: } //irpFgen 17054: 17055: 17056: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 17057: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 17058: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 17059: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 17060: //FSF.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000000000 17061: //FSEQ.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000000001 17062: //FSOGT.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000000010 17063: //FSOGE.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000000011 17064: //FSOLT.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000000100 17065: //FSOLE.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000000101 17066: //FSOGL.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000000110 17067: //FSOR.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000000111 17068: //FSUN.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000001000 17069: //FSUEQ.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000001001 17070: //FSUGT.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000001010 17071: //FSUGE.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000001011 17072: //FSULT.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000001100 17073: //FSULE.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000001101 17074: //FSNE.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000001110 17075: //FST.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000001111 17076: //FSSF.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000010000 17077: //FSSEQ.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000010001 17078: //FSGT.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000010010 17079: //FSGE.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000010011 17080: //FSLT.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000010100 17081: //FSLE.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000010101 17082: //FSGL.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000010110 17083: //FSGLE.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000010111 17084: //FSNGLE.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000011000 17085: //FSNGL.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000011001 17086: //FSNLE.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000011010 17087: //FSNLT.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000011011 17088: //FSNGE.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000011100 17089: //FSNGT.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000011101 17090: //FSSNE.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000011110 17091: //FSST.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000011111 17092: //FDBF Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000000000-{offset} 17093: //FDBRA Dr,<label> |A|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000000000-{offset} [FDBF Dr,<label>] 17094: //FDBEQ Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000000001-{offset} 17095: //FDBOGT Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000000010-{offset} 17096: //FDBOGE Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000000011-{offset} 17097: //FDBOLT Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000000100-{offset} 17098: //FDBOLE Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000000101-{offset} 17099: //FDBOGL Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000000110-{offset} 17100: //FDBOR Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000000111-{offset} 17101: //FDBUN Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000001000-{offset} 17102: //FDBUEQ Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000001001-{offset} 17103: //FDBUGT Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000001010-{offset} 17104: //FDBUGE Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000001011-{offset} 17105: //FDBULT Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000001100-{offset} 17106: //FDBULE Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000001101-{offset} 17107: //FDBNE Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000001110-{offset} 17108: //FDBT Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000001111-{offset} 17109: //FDBSF Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000010000-{offset} 17110: //FDBSEQ Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000010001-{offset} 17111: //FDBGT Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000010010-{offset} 17112: //FDBGE Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000010011-{offset} 17113: //FDBLT Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000010100-{offset} 17114: //FDBLE Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000010101-{offset} 17115: //FDBGL Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000010110-{offset} 17116: //FDBGLE Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000010111-{offset} 17117: //FDBNGLE Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000011000-{offset} 17118: //FDBNGL Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000011001-{offset} 17119: //FDBNLE Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000011010-{offset} 17120: //FDBNLT Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000011011-{offset} 17121: //FDBNGE Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000011100-{offset} 17122: //FDBNGT Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000011101-{offset} 17123: //FDBSNE Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000011110-{offset} 17124: //FDBST Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000011111-{offset} 17125: //FTRAPF.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000000000-{data} 17126: //FTRAPEQ.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000000001-{data} 17127: //FTRAPOGT.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000000010-{data} 17128: //FTRAPOGE.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000000011-{data} 17129: //FTRAPOLT.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000000100-{data} 17130: //FTRAPOLE.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000000101-{data} 17131: //FTRAPOGL.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000000110-{data} 17132: //FTRAPOR.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000000111-{data} 17133: //FTRAPUN.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000001000-{data} 17134: //FTRAPUEQ.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000001001-{data} 17135: //FTRAPUGT.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000001010-{data} 17136: //FTRAPUGE.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000001011-{data} 17137: //FTRAPULT.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000001100-{data} 17138: //FTRAPULE.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000001101-{data} 17139: //FTRAPNE.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000001110-{data} 17140: //FTRAPT.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000001111-{data} 17141: //FTRAPSF.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000010000-{data} 17142: //FTRAPSEQ.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000010001-{data} 17143: //FTRAPGT.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000010010-{data} 17144: //FTRAPGE.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000010011-{data} 17145: //FTRAPLT.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000010100-{data} 17146: //FTRAPLE.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000010101-{data} 17147: //FTRAPGL.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000010110-{data} 17148: //FTRAPGLE.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000010111-{data} 17149: //FTRAPNGLE.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000011000-{data} 17150: //FTRAPNGL.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000011001-{data} 17151: //FTRAPNLE.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000011010-{data} 17152: //FTRAPNLT.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000011011-{data} 17153: //FTRAPNGE.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000011100-{data} 17154: //FTRAPNGT.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000011101-{data} 17155: //FTRAPSNE.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000011110-{data} 17156: //FTRAPST.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000011111-{data} 17157: //FTRAPF.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000000000-{data} 17158: //FTRAPEQ.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000000001-{data} 17159: //FTRAPOGT.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000000010-{data} 17160: //FTRAPOGE.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000000011-{data} 17161: //FTRAPOLT.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000000100-{data} 17162: //FTRAPOLE.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000000101-{data} 17163: //FTRAPOGL.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000000110-{data} 17164: //FTRAPOR.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000000111-{data} 17165: //FTRAPUN.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000001000-{data} 17166: //FTRAPUEQ.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000001001-{data} 17167: //FTRAPUGT.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000001010-{data} 17168: //FTRAPUGE.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000001011-{data} 17169: //FTRAPULT.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000001100-{data} 17170: //FTRAPULE.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000001101-{data} 17171: //FTRAPNE.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000001110-{data} 17172: //FTRAPT.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000001111-{data} 17173: //FTRAPSF.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000010000-{data} 17174: //FTRAPSEQ.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000010001-{data} 17175: //FTRAPGT.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000010010-{data} 17176: //FTRAPGE.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000010011-{data} 17177: //FTRAPLT.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000010100-{data} 17178: //FTRAPLE.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000010101-{data} 17179: //FTRAPGL.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000010110-{data} 17180: //FTRAPGLE.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000010111-{data} 17181: //FTRAPNGLE.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000011000-{data} 17182: //FTRAPNGL.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000011001-{data} 17183: //FTRAPNLE.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000011010-{data} 17184: //FTRAPNLT.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000011011-{data} 17185: //FTRAPNGE.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000011100-{data} 17186: //FTRAPNGT.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000011101-{data} 17187: //FTRAPSNE.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000011110-{data} 17188: //FTRAPST.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000011111-{data} 17189: //FTRAPF |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000000000 17190: //FTRAPEQ |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000000001 17191: //FTRAPOGT |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000000010 17192: //FTRAPOGE |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000000011 17193: //FTRAPOLT |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000000100 17194: //FTRAPOLE |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000000101 17195: //FTRAPOGL |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000000110 17196: //FTRAPOR |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000000111 17197: //FTRAPUN |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000001000 17198: //FTRAPUEQ |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000001001 17199: //FTRAPUGT |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000001010 17200: //FTRAPUGE |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000001011 17201: //FTRAPULT |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000001100 17202: //FTRAPULE |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000001101 17203: //FTRAPNE |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000001110 17204: //FTRAPT |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000001111 17205: //FTRAPSF |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000010000 17206: //FTRAPSEQ |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000010001 17207: //FTRAPGT |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000010010 17208: //FTRAPGE |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000010011 17209: //FTRAPLT |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000010100 17210: //FTRAPLE |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000010101 17211: //FTRAPGL |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000010110 17212: //FTRAPGLE |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000010111 17213: //FTRAPNGLE |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000011000 17214: //FTRAPNGL |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000011001 17215: //FTRAPNLE |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000011010 17216: //FTRAPNLT |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000011011 17217: //FTRAPNGE |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000011100 17218: //FTRAPNGT |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000011101 17219: //FTRAPSNE |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000011110 17220: //FTRAPST |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000011111 17221: public static void irpFscc () throws M68kException { 17222: fscc: { 17223: //XEiJ.fpuBox.epbExceptionStatusWord = 0; 17224: if ((7 & XEiJ.currentOnchipFPU) == 0) { 17225: irpFline (); 17226: break fscc; 17227: } 17228: XEiJ.fpuBox.epbFpiar = XEiJ.regPC0; //FPIARはFMOVEM/FMOVE FPcr/FSAVE/FRESTORE以外の命令で例外が発生しなくても更新される 17229: int w = mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); //pcwz。拡張ワード 17230: if ((w & 0b010000) != 0 && (XEiJ.fpuBox.epbFpsr & XEiJ.FPU_FPSR_NAN) != 0) { //IEEEノンアウェアテストでNANがセットされているとき 17231: XEiJ.fpuBox.epbFpsr |= XEiJ.FPU_FPSR_EXC_BSUN; //BSUNをセット 17232: XEiJ.fpuBox.epbFpsr |= XEiJ.FPU_FPSR_EXC_TO_AEXC[XEiJ.fpuBox.epbFpsr >> 8 & 255]; 17233: if ((XEiJ.fpuBox.epbFpcr & XEiJ.FPU_FPCR_BSUN) != 0) { //BSUN例外許可 17234: XEiJ.fpuBox.epbExceptionStatusWord = 0xe000 | M68kException.M6E_FP_BRANCH_SET_UNORDERED & 7; 17235: irpExceptionFormat0 (M68kException.M6E_FP_BRANCH_SET_UNORDERED << 2, XEiJ.regPC0); //pcは命令の先頭 17236: break fscc; 17237: } 17238: } 17239: int ea = XEiJ.regOC & 63; 17240: if (ea < XEiJ.EA_AR) { //FScc.B Dr 17241: if (!XEiJ.fpuBox.epbIsFullSpec ()) { 17242: irpExceptionFormat2 (M68kException.M6E_FP_UNIMPLEMENTED_INSTRUCTION << 2, XEiJ.regPC, 0); //pcは次の命令,アドレスは実効アドレス 17243: break fscc; 17244: } 17245: if (XEiJ.FPU_CCMAP_060[(w & 63) << 4 | XEiJ.fpuBox.epbFpsr >> 24 & 15]) { //セット 17246: XEiJ.mpuCycleCount++; 17247: XEiJ.regRn[ea] |= 0xff; 17248: } else { //クリア 17249: XEiJ.mpuCycleCount++; 17250: XEiJ.regRn[ea] &= ~0xff; 17251: } 17252: } else if (ea < XEiJ.EA_MM) { //FDBcc Dr,<label> 17253: if (!XEiJ.fpuBox.epbIsFullSpec ()) { 17254: XEiJ.regPC += 2; //オフセットを読み飛ばす 17255: irpExceptionFormat2 (M68kException.M6E_FP_UNIMPLEMENTED_INSTRUCTION << 2, XEiJ.regPC, 0); //pcは次の命令,アドレスは実効アドレス 17256: break fscc; 17257: } 17258: if (XEiJ.FPU_CCMAP_060[(w & 63) << 4 | XEiJ.fpuBox.epbFpsr >> 24 & 15]) { //条件が成立しているので通過 17259: XEiJ.mpuCycleCount += 2; 17260: XEiJ.regPC += 2; //オフセットを読み飛ばす 17261: } else { 17262: int rrr = XEiJ.regOC & 7; 17263: int t = XEiJ.regRn[rrr]; 17264: if ((short) t == 0) { //Drの下位16bitが0なので通過 17265: XEiJ.mpuCycleCount += 2; 17266: XEiJ.regRn[rrr] = t + 65535; 17267: XEiJ.regPC += 2; //オフセットを読み飛ばす 17268: } else { //Drの下位16bitが0でないのでジャンプ 17269: XEiJ.mpuCycleCount++; 17270: XEiJ.regRn[rrr] = t - 1; //下位16bitが0でないので上位16bitは変化しない 17271: irpSetPC (XEiJ.regPC + mmuReadWordSignExword (XEiJ.regPC, XEiJ.regSRS)); //pc==pc0+2 17272: } 17273: } 17274: } else if (ea < XEiJ.EA_PW) { //FScc.B <mem> 17275: int a = efaMltByte (ea); 17276: if (!XEiJ.fpuBox.epbIsFullSpec ()) { 17277: irpExceptionFormat2 (M68kException.M6E_FP_UNIMPLEMENTED_INSTRUCTION << 2, XEiJ.regPC, a); //pcは次の命令,アドレスは実効アドレス 17278: break fscc; 17279: } 17280: XEiJ.mpuCycleCount++; 17281: mmuWriteByteData (a, XEiJ.FPU_CCMAP_060[(w & 63) << 4 | XEiJ.fpuBox.epbFpsr >> 24 & 15] ? 0xff : 0x00, XEiJ.regSRS); 17282: } else if (ea <= XEiJ.EA_IM) { //FTRAPcc.W/FTRAPcc.L/FTRAPcc 17283: if (ea == 072) { //.W 17284: mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); 17285: } else if (ea == 073) { //.L 17286: mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS); 17287: } 17288: if (!XEiJ.fpuBox.epbIsFullSpec ()) { 17289: irpExceptionFormat2 (M68kException.M6E_FP_UNIMPLEMENTED_INSTRUCTION << 2, XEiJ.regPC, 0); //pcは次の命令,アドレスは実効アドレス 17290: break fscc; 17291: } 17292: if (!XEiJ.FPU_CCMAP_060[(w & 63) << 4 | XEiJ.fpuBox.epbFpsr >> 24 & 15]) { //通過 17293: XEiJ.mpuCycleCount += 2; 17294: } else { 17295: m60Address = XEiJ.regPC0; //アドレスは命令の先頭 17296: M68kException.m6eNumber = M68kException.M6E_TRAPV_INSTRUCTION; 17297: throw M68kException.m6eSignal; 17298: } 17299: } else { 17300: XEiJ.regPC = XEiJ.regPC0 + 2; //拡張ワードを読まなかったことにする 17301: irpFline (); 17302: break fscc; 17303: } 17304: } //fscc 17305: } //irpFscc 17306: 17307: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 17308: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 17309: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 17310: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 17311: //FNOP |A|--CC46|-|-----|-----| |1111_001_010_000_000-0000000000000000 [FBF.W (*)+2] 17312: //FBF.W <label> |-|--CC46|-|-----|-----| |1111_001_010_000_000-{offset} 17313: //FBEQ.W <label> |-|--CC46|-|-----|-----| |1111_001_010_000_001-{offset} 17314: //FBOGT.W <label> |-|--CC46|-|-----|-----| |1111_001_010_000_010-{offset} 17315: //FBOGE.W <label> |-|--CC46|-|-----|-----| |1111_001_010_000_011-{offset} 17316: //FBOLT.W <label> |-|--CC46|-|-----|-----| |1111_001_010_000_100-{offset} 17317: //FBOLE.W <label> |-|--CC46|-|-----|-----| |1111_001_010_000_101-{offset} 17318: //FBOGL.W <label> |-|--CC46|-|-----|-----| |1111_001_010_000_110-{offset} 17319: //FBOR.W <label> |-|--CC46|-|-----|-----| |1111_001_010_000_111-{offset} 17320: //FBUN.W <label> |-|--CC46|-|-----|-----| |1111_001_010_001_000-{offset} 17321: //FBUEQ.W <label> |-|--CC46|-|-----|-----| |1111_001_010_001_001-{offset} 17322: //FBUGT.W <label> |-|--CC46|-|-----|-----| |1111_001_010_001_010-{offset} 17323: //FBUGE.W <label> |-|--CC46|-|-----|-----| |1111_001_010_001_011-{offset} 17324: //FBULT.W <label> |-|--CC46|-|-----|-----| |1111_001_010_001_100-{offset} 17325: //FBULE.W <label> |-|--CC46|-|-----|-----| |1111_001_010_001_101-{offset} 17326: //FBNE.W <label> |-|--CC46|-|-----|-----| |1111_001_010_001_110-{offset} 17327: //FBT.W <label> |-|--CC46|-|-----|-----| |1111_001_010_001_111-{offset} 17328: //FBRA.W <label> |A|--CC46|-|-----|-----| |1111_001_010_001_111-{offset} [FBT.W <label>] 17329: //FBSF.W <label> |-|--CC46|-|-----|-----| |1111_001_010_010_000-{offset} 17330: //FBSEQ.W <label> |-|--CC46|-|-----|-----| |1111_001_010_010_001-{offset} 17331: //FBGT.W <label> |-|--CC46|-|-----|-----| |1111_001_010_010_010-{offset} 17332: //FBGE.W <label> |-|--CC46|-|-----|-----| |1111_001_010_010_011-{offset} 17333: //FBLT.W <label> |-|--CC46|-|-----|-----| |1111_001_010_010_100-{offset} 17334: //FBLE.W <label> |-|--CC46|-|-----|-----| |1111_001_010_010_101-{offset} 17335: //FBGL.W <label> |-|--CC46|-|-----|-----| |1111_001_010_010_110-{offset} 17336: //FBGLE.W <label> |-|--CC46|-|-----|-----| |1111_001_010_010_111-{offset} 17337: //FBNGLE.W <label> |-|--CC46|-|-----|-----| |1111_001_010_011_000-{offset} 17338: //FBNGL.W <label> |-|--CC46|-|-----|-----| |1111_001_010_011_001-{offset} 17339: //FBNLE.W <label> |-|--CC46|-|-----|-----| |1111_001_010_011_010-{offset} 17340: //FBNLT.W <label> |-|--CC46|-|-----|-----| |1111_001_010_011_011-{offset} 17341: //FBNGE.W <label> |-|--CC46|-|-----|-----| |1111_001_010_011_100-{offset} 17342: //FBNGT.W <label> |-|--CC46|-|-----|-----| |1111_001_010_011_101-{offset} 17343: //FBSNE.W <label> |-|--CC46|-|-----|-----| |1111_001_010_011_110-{offset} 17344: //FBST.W <label> |-|--CC46|-|-----|-----| |1111_001_010_011_111-{offset} 17345: public static void irpFbccWord () throws M68kException { 17346: fbcc: { 17347: //XEiJ.fpuBox.epbExceptionStatusWord = 0; 17348: if ((7 & XEiJ.currentOnchipFPU) == 0) { 17349: irpFline (); 17350: break fbcc; 17351: } 17352: XEiJ.fpuBox.epbFpiar = XEiJ.regPC0; //FPIARはFMOVEM/FMOVE FPcr/FSAVE/FRESTORE以外の命令で例外が発生しなくても更新される 17353: if ((XEiJ.regOC & 0b010000) != 0 && (XEiJ.fpuBox.epbFpsr & XEiJ.FPU_FPSR_NAN) != 0) { //IEEEノンアウェアテストでNANがセットされているとき 17354: XEiJ.fpuBox.epbFpsr |= XEiJ.FPU_FPSR_EXC_BSUN; //BSUNをセット 17355: XEiJ.fpuBox.epbFpsr |= XEiJ.FPU_FPSR_EXC_TO_AEXC[XEiJ.fpuBox.epbFpsr >> 8 & 255]; 17356: if ((XEiJ.fpuBox.epbFpcr & XEiJ.FPU_FPCR_BSUN) != 0) { //BSUN例外許可 17357: XEiJ.fpuBox.epbExceptionStatusWord = 0xe000 | M68kException.M6E_FP_BRANCH_SET_UNORDERED & 7; 17358: irpExceptionFormat0 (M68kException.M6E_FP_BRANCH_SET_UNORDERED << 2, XEiJ.regPC0); //pcは命令の先頭 17359: break fbcc; 17360: } 17361: } 17362: XEiJ.mpuCycleCount++; 17363: int t = XEiJ.regPC; //pc0+2 17364: XEiJ.regPC = t + 2; //pc0+4 17365: t += mmuReadWordSignExword (t, XEiJ.regSRS); //pc0+2+16bitディスプレースメント 17366: if ((t & 1) != 0) { //分岐先のアドレスが奇数 17367: //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ 17368: irpBccAddressError (t); 17369: } 17370: if (XEiJ.FPU_CCMAP_060[(XEiJ.regOC & 63) << 4 | XEiJ.fpuBox.epbFpsr >> 24 & 15]) { //分岐する 17371: irpSetPC (t); 17372: } 17373: } //fbcc 17374: } //irpFbccWord 17375: 17376: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 17377: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 17378: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 17379: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 17380: //FBF.L <label> |-|--CC46|-|-----|-----| |1111_001_011_000_000-{offset} 17381: //FBEQ.L <label> |-|--CC46|-|-----|-----| |1111_001_011_000_001-{offset} 17382: //FBOGT.L <label> |-|--CC46|-|-----|-----| |1111_001_011_000_010-{offset} 17383: //FBOGE.L <label> |-|--CC46|-|-----|-----| |1111_001_011_000_011-{offset} 17384: //FBOLT.L <label> |-|--CC46|-|-----|-----| |1111_001_011_000_100-{offset} 17385: //FBOLE.L <label> |-|--CC46|-|-----|-----| |1111_001_011_000_101-{offset} 17386: //FBOGL.L <label> |-|--CC46|-|-----|-----| |1111_001_011_000_110-{offset} 17387: //FBOR.L <label> |-|--CC46|-|-----|-----| |1111_001_011_000_111-{offset} 17388: //FBUN.L <label> |-|--CC46|-|-----|-----| |1111_001_011_001_000-{offset} 17389: //FBUEQ.L <label> |-|--CC46|-|-----|-----| |1111_001_011_001_001-{offset} 17390: //FBUGT.L <label> |-|--CC46|-|-----|-----| |1111_001_011_001_010-{offset} 17391: //FBUGE.L <label> |-|--CC46|-|-----|-----| |1111_001_011_001_011-{offset} 17392: //FBULT.L <label> |-|--CC46|-|-----|-----| |1111_001_011_001_100-{offset} 17393: //FBULE.L <label> |-|--CC46|-|-----|-----| |1111_001_011_001_101-{offset} 17394: //FBNE.L <label> |-|--CC46|-|-----|-----| |1111_001_011_001_110-{offset} 17395: //FBT.L <label> |-|--CC46|-|-----|-----| |1111_001_011_001_111-{offset} 17396: //FBRA.L <label> |A|--CC46|-|-----|-----| |1111_001_011_001_111-{offset} [FBT.L <label>] 17397: //FBSF.L <label> |-|--CC46|-|-----|-----| |1111_001_011_010_000-{offset} 17398: //FBSEQ.L <label> |-|--CC46|-|-----|-----| |1111_001_011_010_001-{offset} 17399: //FBGT.L <label> |-|--CC46|-|-----|-----| |1111_001_011_010_010-{offset} 17400: //FBGE.L <label> |-|--CC46|-|-----|-----| |1111_001_011_010_011-{offset} 17401: //FBLT.L <label> |-|--CC46|-|-----|-----| |1111_001_011_010_100-{offset} 17402: //FBLE.L <label> |-|--CC46|-|-----|-----| |1111_001_011_010_101-{offset} 17403: //FBGL.L <label> |-|--CC46|-|-----|-----| |1111_001_011_010_110-{offset} 17404: //FBGLE.L <label> |-|--CC46|-|-----|-----| |1111_001_011_010_111-{offset} 17405: //FBNGLE.L <label> |-|--CC46|-|-----|-----| |1111_001_011_011_000-{offset} 17406: //FBNGL.L <label> |-|--CC46|-|-----|-----| |1111_001_011_011_001-{offset} 17407: //FBNLE.L <label> |-|--CC46|-|-----|-----| |1111_001_011_011_010-{offset} 17408: //FBNLT.L <label> |-|--CC46|-|-----|-----| |1111_001_011_011_011-{offset} 17409: //FBNGE.L <label> |-|--CC46|-|-----|-----| |1111_001_011_011_100-{offset} 17410: //FBNGT.L <label> |-|--CC46|-|-----|-----| |1111_001_011_011_101-{offset} 17411: //FBSNE.L <label> |-|--CC46|-|-----|-----| |1111_001_011_011_110-{offset} 17412: //FBST.L <label> |-|--CC46|-|-----|-----| |1111_001_011_011_111-{offset} 17413: public static void irpFbccLong () throws M68kException { 17414: fbcc: { 17415: //XEiJ.fpuBox.epbExceptionStatusWord = 0; 17416: if ((7 & XEiJ.currentOnchipFPU) == 0) { 17417: irpFline (); 17418: break fbcc; 17419: } 17420: XEiJ.fpuBox.epbFpiar = XEiJ.regPC0; //FPIARはFMOVEM/FMOVE FPcr/FSAVE/FRESTORE以外の命令で例外が発生しなくても更新される 17421: if ((XEiJ.regOC & 0b010000) != 0 && (XEiJ.fpuBox.epbFpsr & XEiJ.FPU_FPSR_NAN) != 0) { //IEEEノンアウェアテストでNANがセットされているとき 17422: XEiJ.fpuBox.epbFpsr |= XEiJ.FPU_FPSR_EXC_BSUN; //BSUNをセット 17423: XEiJ.fpuBox.epbFpsr |= XEiJ.FPU_FPSR_EXC_TO_AEXC[XEiJ.fpuBox.epbFpsr >> 8 & 255]; 17424: if ((XEiJ.fpuBox.epbFpcr & XEiJ.FPU_FPCR_BSUN) != 0) { //BSUN例外許可 17425: XEiJ.fpuBox.epbExceptionStatusWord = 0xe000 | M68kException.M6E_FP_BRANCH_SET_UNORDERED & 7; 17426: irpExceptionFormat0 (M68kException.M6E_FP_BRANCH_SET_UNORDERED << 2, XEiJ.regPC0); //pcは命令の先頭 17427: break fbcc; 17428: } 17429: } 17430: XEiJ.mpuCycleCount++; 17431: int t = XEiJ.regPC; //pc0+2 17432: XEiJ.regPC = t + 4; //pc0+6 17433: t += mmuReadLongExword (t, XEiJ.regSRS); //pc0+2+32bitディスプレースメント 17434: if ((t & 1) != 0) { //分岐先のアドレスが奇数 17435: //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ 17436: irpBccAddressError (t); 17437: } 17438: if (XEiJ.FPU_CCMAP_060[(XEiJ.regOC & 63) << 4 | XEiJ.fpuBox.epbFpsr >> 24 & 15]) { //分岐する 17439: irpSetPC (t); 17440: } 17441: } //fbcc 17442: } //irpFbccLong 17443: 17444: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 17445: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 17446: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 17447: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 17448: //FSAVE <ea> |-|--CC46|P|-----|-----| M -WXZ |1111_001_100_mmm_rrr 17449: public static void irpFsave () throws M68kException { 17450: if ((7 & XEiJ.currentOnchipFPU) == 0) { 17451: irpFline (); 17452: return; 17453: } 17454: if (XEiJ.regSRS == 0) { //ユーザモードのとき 17455: M68kException.m6eNumber = M68kException.M6E_PRIVILEGE_VIOLATION; 17456: throw M68kException.m6eSignal; 17457: } 17458: //以下はスーパーバイザモード 17459: XEiJ.mpuCycleCount += 3; 17460: int ea = XEiJ.regOC & 63; 17461: int a; 17462: if (ea >> 3 == XEiJ.MMM_MN) { //-(Ar) 17463: int arr = XEiJ.regOC & 7 | 8; 17464: m60Incremented -= 12L << (arr << 3); 17465: a = m60Address = XEiJ.regRn[arr] -= 12; 17466: } else { //-(Ar)以外 17467: a = efaCltWord (ea); 17468: } 17469: if (XEiJ.fpuBox.epbExceptionStatusWord == 0) { //例外なし 17470: mmuWriteLongData (a, 0x00006000, 1); //アイドルフレーム 17471: mmuWriteQuadSecond (a + 4, 0L, 1); 17472: } else { //例外あり 17473: mmuWriteLongData (a, XEiJ.fpuBox.epbExceptionOperandExponent | XEiJ.fpuBox.epbExceptionStatusWord, 1); //例外フレーム 17474: mmuWriteQuadSecond (a + 4, XEiJ.fpuBox.epbExceptionOperandMantissa, 1); 17475: XEiJ.fpuBox.epbExceptionStatusWord = 0; 17476: } 17477: } //irpFsave 17478: 17479: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 17480: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 17481: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 17482: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 17483: //FRESTORE <ea> |-|--CC46|P|-----|-----| M+ WXZP |1111_001_101_mmm_rrr 17484: public static void irpFrestore () throws M68kException { 17485: if ((7 & XEiJ.currentOnchipFPU) == 0) { 17486: irpFline (); 17487: return; 17488: } 17489: if (XEiJ.regSRS == 0) { //ユーザモードのとき 17490: M68kException.m6eNumber = M68kException.M6E_PRIVILEGE_VIOLATION; 17491: throw M68kException.m6eSignal; 17492: } 17493: //以下はスーパーバイザモード 17494: XEiJ.mpuCycleCount += 6; 17495: int ea = XEiJ.regOC & 63; 17496: int a; 17497: if (ea >> 3 == XEiJ.MMM_MP) { //(Ar)+ 17498: int arr = XEiJ.regOC & 7 | 8; 17499: m60Incremented += 12L << (arr << 3); 17500: a = m60Address = (XEiJ.regRn[arr] += 12) - 12; 17501: } else { //(Ar)+以外 17502: a = efaCntWord (ea); 17503: } 17504: int i = mmuReadLongData (a, 1); 17505: long l = mmuReadQuadData (a + 4, 1); 17506: if ((i & 0xff00) == 0xe000) { //例外フレーム 17507: //例外ハンドラが0xe0xxを0x60xxに変更してFRESTOREする場合がある 17508: XEiJ.fpuBox.epbExceptionStatusWord = (char) i; 17509: XEiJ.fpuBox.epbExceptionOperandExponent = i & 0xffff0000; 17510: XEiJ.fpuBox.epbExceptionOperandMantissa = l; 17511: } else { 17512: XEiJ.fpuBox.epbExceptionStatusWord = 0; 17513: XEiJ.fpuBox.epbExceptionOperandExponent = 0; 17514: XEiJ.fpuBox.epbExceptionOperandMantissa = 0x0000000000000000L; 17515: } 17516: //FPSRのAEXCをクリアする 17517: XEiJ.fpuBox.epbFpsr = 0; 17518: //FPIARをクリアする 17519: XEiJ.fpuBox.epbFpiar = 0; 17520: } //irpFrestore 17521: 17522: //irpFPPreInstruction () 17523: // 浮動小数点命令実行前例外 floating-point pre-instruction exception 17524: // 優先順位はBSUN>SNAN>OPERR>OVFL>UNFL>DZ>INEX2/INEX1 17525: // 複数の例外が同時に発生したときは最上位の例外ハンドラだけが呼び出される 17526: // 浮動小数点例外ハンドラは自分よりも下位の浮動小数点例外が発生していないか確認しなければならない 17527: public static boolean irpFPPreInstruction () throws M68kException { 17528: int mask = XEiJ.fpuBox.epbFpcr & XEiJ.fpuBox.epbFpsr & 0x0000ff00; 17529: if (mask == 0) { 17530: return false; 17531: } 17532: int number = FP_OFFSET_TO_NUMBER[Integer.numberOfLeadingZeros (mask)]; 17533: XEiJ.fpuBox.epbExceptionStatusWord = 0xe000 | number & 7; 17534: irpExceptionFormat0 (number << 2, XEiJ.regPC0); //pcは命令の先頭 17535: return true; 17536: } //irpFPPreInstruction() 17537: 17538: //irpFPPostInstruction (a) 17539: // 浮動小数点命令実行後例外 floating-point post-instruction exception 17540: // 優先順位はBSUN>SNAN>OPERR>OVFL>UNFL>DZ>INEX2/INEX1 17541: // 複数の例外が同時に発生したときは最上位の例外ハンドラだけが呼び出される 17542: // 浮動小数点例外ハンドラは自分よりも下位の浮動小数点例外が発生していないか確認しなければならない 17543: public static boolean irpFPPostInstruction (int a) throws M68kException { 17544: int mask = XEiJ.fpuBox.epbFpcr & XEiJ.fpuBox.epbFpsr & 0x0000ff00; 17545: if (mask == 0) { 17546: return false; 17547: } 17548: int number = FP_OFFSET_TO_NUMBER[Integer.numberOfLeadingZeros (mask)]; 17549: XEiJ.fpuBox.epbExceptionStatusWord = 0xe000 | number & 7; 17550: irpExceptionFormat3 (number << 2, XEiJ.regPC, a); //pcは次の命令,アドレスはデスティネーションオペランド 17551: return true; 17552: } //irpFPPostInstruction(int) 17553: 17554: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 17555: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 17556: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 17557: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 17558: //CINVL NC,(Ar) |-|----46|P|-----|-----| |1111_010_000_001_rrr 17559: //CINVP NC,(Ar) |-|----46|P|-----|-----| |1111_010_000_010_rrr 17560: //CINVA NC |-|----46|P|-----|-----| |1111_010_000_011_000 17561: //CPUSHL NC,(Ar) |-|----46|P|-----|-----| |1111_010_000_101_rrr 17562: //CPUSHP NC,(Ar) |-|----46|P|-----|-----| |1111_010_000_110_rrr 17563: //CPUSHA NC |-|----46|P|-----|-----| |1111_010_000_111_000 17564: public static void irpCinvCpushNC () throws M68kException { 17565: if (XEiJ.regSRS == 0) { //ユーザモードのとき 17566: M68kException.m6eNumber = M68kException.M6E_PRIVILEGE_VIOLATION; 17567: throw M68kException.m6eSignal; 17568: } 17569: //以下はスーパーバイザモード 17570: XEiJ.mpuCycleCount++; 17571: } //irpCinvCpushNC 17572: 17573: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 17574: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 17575: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 17576: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 17577: //CINVL DC,(Ar) |-|----46|P|-----|-----| |1111_010_001_001_rrr 17578: //CINVP DC,(Ar) |-|----46|P|-----|-----| |1111_010_001_010_rrr 17579: //CINVA DC |-|----46|P|-----|-----| |1111_010_001_011_000 17580: //CPUSHL DC,(Ar) |-|----46|P|-----|-----| |1111_010_001_101_rrr 17581: //CPUSHP DC,(Ar) |-|----46|P|-----|-----| |1111_010_001_110_rrr 17582: //CPUSHA DC |-|----46|P|-----|-----| |1111_010_001_111_000 17583: public static void irpCinvCpushDC () throws M68kException { 17584: if (XEiJ.regSRS == 0) { //ユーザモードのとき 17585: M68kException.m6eNumber = M68kException.M6E_PRIVILEGE_VIOLATION; 17586: throw M68kException.m6eSignal; 17587: } 17588: //以下はスーパーバイザモード 17589: XEiJ.mpuCycleCount++; 17590: } //irpCinvCpushDC 17591: 17592: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 17593: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 17594: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 17595: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 17596: //CINVL IC,(Ar) |-|----46|P|-----|-----| |1111_010_010_001_rrr 17597: //CINVP IC,(Ar) |-|----46|P|-----|-----| |1111_010_010_010_rrr 17598: //CINVA IC |-|----46|P|-----|-----| |1111_010_010_011_000 17599: //CPUSHL IC,(Ar) |-|----46|P|-----|-----| |1111_010_010_101_rrr 17600: //CPUSHP IC,(Ar) |-|----46|P|-----|-----| |1111_010_010_110_rrr 17601: //CPUSHA IC |-|----46|P|-----|-----| |1111_010_010_111_000 17602: public static void irpCinvCpushIC () throws M68kException { 17603: if (XEiJ.regSRS == 0) { //ユーザモードのとき 17604: M68kException.m6eNumber = M68kException.M6E_PRIVILEGE_VIOLATION; 17605: throw M68kException.m6eSignal; 17606: } 17607: //以下はスーパーバイザモード 17608: XEiJ.mpuCycleCount++; 17609: } //irpCinvCpushIC 17610: 17611: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 17612: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 17613: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 17614: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 17615: //CINVL BC,(Ar) |-|----46|P|-----|-----| |1111_010_011_001_rrr 17616: //CINVP BC,(Ar) |-|----46|P|-----|-----| |1111_010_011_010_rrr 17617: //CINVA BC |-|----46|P|-----|-----| |1111_010_011_011_000 17618: //CPUSHL BC,(Ar) |-|----46|P|-----|-----| |1111_010_011_101_rrr 17619: //CPUSHP BC,(Ar) |-|----46|P|-----|-----| |1111_010_011_110_rrr 17620: //CPUSHA BC |-|----46|P|-----|-----| |1111_010_011_111_000 17621: public static void irpCinvCpushBC () throws M68kException { 17622: if (XEiJ.regSRS == 0) { //ユーザモードのとき 17623: M68kException.m6eNumber = M68kException.M6E_PRIVILEGE_VIOLATION; 17624: throw M68kException.m6eSignal; 17625: } 17626: //以下はスーパーバイザモード 17627: XEiJ.mpuCycleCount++; 17628: } //irpCinvCpushBC 17629: 17630: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 17631: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 17632: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 17633: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 17634: //PFLUSHN (Ar) |-|----46|P|-----|-----| |1111_010_100_000_rrr 17635: //PFLUSH (Ar) |-|----46|P|-----|-----| |1111_010_100_001_rrr 17636: //PFLUSHAN |-|----46|P|-----|-----| |1111_010_100_010_000 17637: //PFLUSHA |-|----46|P|-----|-----| |1111_010_100_011_000 17638: public static void irpPflush () throws M68kException { 17639: if (XEiJ.regSRS == 0) { //ユーザモードのとき 17640: M68kException.m6eNumber = M68kException.M6E_PRIVILEGE_VIOLATION; 17641: throw M68kException.m6eSignal; 17642: } 17643: //以下はスーパーバイザモード 17644: if (XEiJ.regOC <= 0b1111_010_100_000_111) { //PFLUSHN (An) 17645: XEiJ.mpuCycleCount += 18; 17646: mmuInvalidateNonGlobalCache (XEiJ.regRn[XEiJ.regOC - (0b1111_010_100_000_000 - 8)]); 17647: } else if (XEiJ.regOC <= 0b1111_010_100_001_111) { //PFLUSH (An) 17648: XEiJ.mpuCycleCount += 18; 17649: mmuInvalidateCache (XEiJ.regRn[XEiJ.regOC - (0b1111_010_100_001_000 - 8)]); 17650: } else if (XEiJ.regOC == 0b1111_010_100_010_000) { //PFLUSHAN 17651: XEiJ.mpuCycleCount += 33; 17652: mmuInvalidateAllNonGlobalCache (); 17653: } else if (XEiJ.regOC == 0b1111_010_100_011_000) { //PFLUSHA 17654: XEiJ.mpuCycleCount += 33; 17655: mmuInvalidateAllCache (); 17656: } else { 17657: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 17658: throw M68kException.m6eSignal; 17659: } 17660: } //irpPflush 17661: 17662: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 17663: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 17664: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 17665: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 17666: //PLPAW (Ar) |-|-----6|P|-----|-----| |1111_010_110_001_rrr 17667: public static void irpPlpaw () throws M68kException { 17668: if (XEiJ.regSRS == 0) { //ユーザモードのとき 17669: M68kException.m6eNumber = M68kException.M6E_PRIVILEGE_VIOLATION; 17670: throw M68kException.m6eSignal; 17671: } 17672: //以下はスーパーバイザモード 17673: XEiJ.mpuCycleCount += 15; 17674: int ann = XEiJ.regOC - (0b1111_010_110_001_000 - 8); //8+nnn 17675: XEiJ.regRn[ann] = mmuLoadPhysicalAddressWrite (XEiJ.regRn[ann]); 17676: } //irpPlpaw 17677: 17678: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 17679: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 17680: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 17681: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 17682: //PLPAR (Ar) |-|-----6|P|-----|-----| |1111_010_111_001_rrr 17683: // 17684: //PLPAR (Ar) 17685: // ReadだがSFCではなくDFCを使う 17686: public static void irpPlpar () throws M68kException { 17687: if (XEiJ.regSRS == 0) { //ユーザモードのとき 17688: M68kException.m6eNumber = M68kException.M6E_PRIVILEGE_VIOLATION; 17689: throw M68kException.m6eSignal; 17690: } 17691: //以下はスーパーバイザモード 17692: XEiJ.mpuCycleCount += 15; 17693: int ann = XEiJ.regOC - (0b1111_010_111_001_000 - 8); //8+nnn 17694: XEiJ.regRn[ann] = mmuLoadPhysicalAddressRead (XEiJ.regRn[ann]); 17695: } //irpPlpar 17696: 17697: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 17698: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 17699: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 17700: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 17701: //MOVE16 (Ar)+,xxx.L |-|----46|-|-----|-----| |1111_011_000_000_rrr-{address} 17702: //MOVE16 xxx.L,(Ar)+ |-|----46|-|-----|-----| |1111_011_000_001_rrr-{address} 17703: //MOVE16 (Ar),xxx.L |-|----46|-|-----|-----| |1111_011_000_010_rrr-{address} 17704: //MOVE16 xxx.L,(Ar) |-|----46|-|-----|-----| |1111_011_000_011_rrr-{address} 17705: //MOVE16 (Ar)+,(An)+ |-|----46|-|-----|-----| |1111_011_000_100_rrr-1nnn000000000000 17706: // 17707: //MOVE16 (Ar)+,xxx.L 17708: //MOVE16 xxx.L,(Ar)+ 17709: //MOVE16 (Ar),xxx.L 17710: //MOVE16 xxx.L,(Ar) 17711: //MOVE16 (Ar)+,(An)+ 17712: // アドレスの下位4bitは無視される 17713: // ポストインクリメントで16増えるとき下位4bitは変化しない 17714: // r==nのときMOVE16 (Ar)+,(Ar)+はMOVE16 (Ar),(Ar)+のような動作になる。データは動かずArは16だけ増える(M68060UM 1-21) 17715: public static void irpMove16 () throws M68kException { 17716: if (XEiJ.regOC <= 0b1111_011_000_011_111) { //どちらかがxxx.L 17717: XEiJ.mpuCycleCount += 18; 17718: int arr = XEiJ.regOC - (0b1111_011_000_000_000 - 8); //8+rrr 17719: int a = XEiJ.regRn[arr] & -16; 17720: int x = mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS) & -16; //pcls 17721: if ((XEiJ.regOC & 0b001_000) == 0) { //(Ar)→xxx.L 17722: long l = mmuReadQuadData (m60Address = a, XEiJ.regSRS); 17723: long m = mmuReadQuadSecond (a + 8, XEiJ.regSRS); 17724: mmuWriteQuadData (m60Address = x, l, XEiJ.regSRS); 17725: mmuWriteQuadSecond (x + 8, m, XEiJ.regSRS); 17726: } else { //xxx.L→(An) 17727: long l = mmuReadQuadData (m60Address = x, XEiJ.regSRS); 17728: long m = mmuReadQuadSecond (x + 8, XEiJ.regSRS); 17729: mmuWriteQuadData (m60Address = a, l, XEiJ.regSRS); 17730: mmuWriteQuadSecond (a + 8, m, XEiJ.regSRS); 17731: } 17732: if ((XEiJ.regOC & 0b010_000) == 0) { //(Ar)+ 17733: XEiJ.regRn[arr] += 16; //aはマスクされているのでa+16は不可 17734: } 17735: } else if (XEiJ.regOC <= 0b1111_011_000_100_111) { 17736: int w = mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); //pcwz 17737: if ((w & 0b1000111111111111) == 0b1000000000000000) { //MOVE16 (Ar)+,(As)+ 17738: XEiJ.mpuCycleCount += 18; 17739: int arr = XEiJ.regOC - (0b1111_011_000_100_000 - 8); //8+rrr 17740: int a = XEiJ.regRn[arr] & -16; 17741: int ass = w >> 12; //8+sss 17742: int x = XEiJ.regRn[ass] & -16; 17743: long l = mmuReadQuadData (m60Address = a, XEiJ.regSRS); 17744: long m = mmuReadQuadSecond (a + 8, XEiJ.regSRS); 17745: mmuWriteQuadData (m60Address = x, l, XEiJ.regSRS); 17746: mmuWriteQuadSecond (x + 8, m, XEiJ.regSRS); 17747: XEiJ.regRn[arr] += 16; //aはマスクされているのでa+16は不可 17748: if (arr != ass) { 17749: XEiJ.regRn[ass] += 16; //xはマスクされているのでx+16は不可 17750: } 17751: } else { 17752: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 17753: throw M68kException.m6eSignal; 17754: } 17755: } else { 17756: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 17757: throw M68kException.m6eSignal; 17758: } 17759: } //irpMove16 17760: 17761: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 17762: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 17763: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 17764: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 17765: //LPSTOP.W #<data> |-|-----6|P|-----|-----| |1111_100_000_000_000-0000000111000000-{data} 17766: public static void irpLpstop () throws M68kException { 17767: if (XEiJ.regSRS == 0) { //ユーザモードのとき 17768: M68kException.m6eNumber = M68kException.M6E_PRIVILEGE_VIOLATION; 17769: throw M68kException.m6eSignal; 17770: } 17771: //以下はスーパーバイザモード 17772: //!!! 非対応 17773: } //irpLpstop 17774: 17775: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 17776: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 17777: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 17778: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 17779: //FPACK <data> |A|012346|-|UUUUU|*****| |1111_111_0dd_ddd_ddd [FLINE #<data>] 17780: public static void irpFpack () throws M68kException { 17781: if (!MainMemory.mmrFEfuncActivated) { 17782: irpFline (); 17783: return; 17784: } 17785: StringBuilder sb; 17786: int a0; 17787: if (FEFunction.FPK_DEBUG_TRACE) { 17788: sb = new StringBuilder (); 17789: String name = Disassembler.DIS_FPACK_NAME[XEiJ.regOC & 255]; 17790: if (name.length () == 0) { 17791: XEiJ.fmtHex4 (sb.append ('$'), XEiJ.regOC); 17792: } else { 17793: sb.append (name); 17794: } 17795: sb.append ('\n'); 17796: XEiJ.fmtHex8 (XEiJ.fmtHex8 (XEiJ.fmtHex8 (XEiJ.fmtHex8 (sb.append (" D0="), XEiJ.regRn[0]).append (" D1="), XEiJ.regRn[1]).append (" D2="), XEiJ.regRn[2]).append (" D3="), XEiJ.regRn[3]); 17797: a0 = XEiJ.regRn[8]; 17798: MainMemory.mmrRstr (sb.append (" (A0)=\""), a0, MainMemory.mmrStrlen (a0, 20)).append ("\"\n"); 17799: } 17800: XEiJ.mpuCycleCount += FEFunction.FPK_CLOCK; //一律にFEFunction.FPK_CLOCKサイクルかかることにする 17801: switch (XEiJ.regOC & 255) { 17802: case 0x00: FEFunction.fpkLMUL (); break; 17803: case 0x01: FEFunction.fpkLDIV (); break; 17804: case 0x02: FEFunction.fpkLMOD (); break; 17805: //case 0x03: break; 17806: case 0x04: FEFunction.fpkUMUL (); break; 17807: case 0x05: FEFunction.fpkUDIV (); break; 17808: case 0x06: FEFunction.fpkUMOD (); break; 17809: //case 0x07: break; 17810: case 0x08: FEFunction.fpkIMUL (); break; 17811: case 0x09: FEFunction.fpkIDIV (); break; 17812: //case 0x0a: break; 17813: //case 0x0b: break; 17814: case 0x0c: FEFunction.fpkRANDOMIZE (); break; 17815: case 0x0d: FEFunction.fpkSRAND (); break; 17816: case 0x0e: FEFunction.fpkRAND (); break; 17817: //case 0x0f: break; 17818: case 0x10: fpkSTOL (); break; 17819: case 0x11: fpkLTOS (); break; 17820: case 0x12: fpkSTOH (); break; 17821: case 0x13: fpkHTOS (); break; 17822: case 0x14: fpkSTOO (); break; 17823: case 0x15: fpkOTOS (); break; 17824: case 0x16: fpkSTOB (); break; 17825: case 0x17: fpkBTOS (); break; 17826: case 0x18: fpkIUSING (); break; 17827: //case 0x19: break; 17828: case 0x1a: FEFunction.fpkLTOD (); break; 17829: case 0x1b: FEFunction.fpkDTOL (); break; 17830: case 0x1c: FEFunction.fpkLTOF (); break; 17831: case 0x1d: FEFunction.fpkFTOL (); break; 17832: case 0x1e: FEFunction.fpkFTOD (); break; 17833: case 0x1f: FEFunction.fpkDTOF (); break; 17834: case 0x20: fpkVAL (); break; 17835: case 0x21: fpkUSING (); break; 17836: case 0x22: fpkSTOD (); break; 17837: case 0x23: fpkDTOS (); break; 17838: case 0x24: fpkECVT (); break; 17839: case 0x25: fpkFCVT (); break; 17840: case 0x26: fpkGCVT (); break; 17841: //case 0x27: break; 17842: case 0x28: FEFunction.fpkDTST (); break; 17843: case 0x29: FEFunction.fpkDCMP (); break; 17844: case 0x2a: FEFunction.fpkDNEG (); break; 17845: case 0x2b: FEFunction.fpkDADD (); break; 17846: case 0x2c: FEFunction.fpkDSUB (); break; 17847: case 0x2d: FEFunction.fpkDMUL (); break; 17848: case 0x2e: FEFunction.fpkDDIV (); break; 17849: case 0x2f: FEFunction.fpkDMOD (); break; 17850: case 0x30: FEFunction.fpkDABS (); break; 17851: case 0x31: FEFunction.fpkDCEIL (); break; 17852: case 0x32: FEFunction.fpkDFIX (); break; 17853: case 0x33: FEFunction.fpkDFLOOR (); break; 17854: case 0x34: FEFunction.fpkDFRAC (); break; 17855: case 0x35: FEFunction.fpkDSGN (); break; 17856: case 0x36: FEFunction.fpkSIN (); break; 17857: case 0x37: FEFunction.fpkCOS (); break; 17858: case 0x38: FEFunction.fpkTAN (); break; 17859: case 0x39: FEFunction.fpkATAN (); break; 17860: case 0x3a: FEFunction.fpkLOG (); break; 17861: case 0x3b: FEFunction.fpkEXP (); break; 17862: case 0x3c: FEFunction.fpkSQR (); break; 17863: case 0x3d: FEFunction.fpkPI (); break; 17864: case 0x3e: FEFunction.fpkNPI (); break; 17865: case 0x3f: FEFunction.fpkPOWER (); break; 17866: case 0x40: FEFunction.fpkRND (); break; 17867: case 0x41: FEFunction.fpkSINH (); break; 17868: case 0x42: FEFunction.fpkCOSH (); break; 17869: case 0x43: FEFunction.fpkTANH (); break; 17870: case 0x44: FEFunction.fpkATANH (); break; 17871: case 0x45: FEFunction.fpkASIN (); break; 17872: case 0x46: FEFunction.fpkACOS (); break; 17873: case 0x47: FEFunction.fpkLOG10 (); break; 17874: case 0x48: FEFunction.fpkLOG2 (); break; 17875: case 0x49: FEFunction.fpkDFREXP (); break; 17876: case 0x4a: FEFunction.fpkDLDEXP (); break; 17877: case 0x4b: FEFunction.fpkDADDONE (); break; 17878: case 0x4c: FEFunction.fpkDSUBONE (); break; 17879: case 0x4d: FEFunction.fpkDDIVTWO (); break; 17880: case 0x4e: FEFunction.fpkDIEECNV (); break; 17881: case 0x4f: FEFunction.fpkIEEDCNV (); break; 17882: case 0x50: fpkFVAL (); break; 17883: case 0x51: FEFunction.fpkFUSING (); break; 17884: case 0x52: FEFunction.fpkSTOF (); break; 17885: case 0x53: FEFunction.fpkFTOS (); break; 17886: case 0x54: FEFunction.fpkFECVT (); break; 17887: case 0x55: FEFunction.fpkFFCVT (); break; 17888: case 0x56: FEFunction.fpkFGCVT (); break; 17889: //case 0x57: break; 17890: case 0x58: FEFunction.fpkFTST (); break; 17891: case 0x59: FEFunction.fpkFCMP (); break; 17892: case 0x5a: FEFunction.fpkFNEG (); break; 17893: case 0x5b: FEFunction.fpkFADD (); break; 17894: case 0x5c: FEFunction.fpkFSUB (); break; 17895: case 0x5d: FEFunction.fpkFMUL (); break; 17896: case 0x5e: FEFunction.fpkFDIV (); break; 17897: case 0x5f: FEFunction.fpkFMOD (); break; 17898: case 0x60: FEFunction.fpkFABS (); break; 17899: case 0x61: FEFunction.fpkFCEIL (); break; 17900: case 0x62: FEFunction.fpkFFIX (); break; 17901: case 0x63: FEFunction.fpkFFLOOR (); break; 17902: case 0x64: FEFunction.fpkFFRAC (); break; 17903: case 0x65: FEFunction.fpkFSGN (); break; 17904: case 0x66: FEFunction.fpkFSIN (); break; 17905: case 0x67: FEFunction.fpkFCOS (); break; 17906: case 0x68: FEFunction.fpkFTAN (); break; 17907: case 0x69: FEFunction.fpkFATAN (); break; 17908: case 0x6a: FEFunction.fpkFLOG (); break; 17909: case 0x6b: FEFunction.fpkFEXP (); break; 17910: case 0x6c: FEFunction.fpkFSQR (); break; 17911: case 0x6d: FEFunction.fpkFPI (); break; 17912: case 0x6e: FEFunction.fpkFNPI (); break; 17913: case 0x6f: FEFunction.fpkFPOWER (); break; 17914: case 0x70: FEFunction.fpkFRND (); break; 17915: case 0x71: FEFunction.fpkFSINH (); break; 17916: case 0x72: FEFunction.fpkFCOSH (); break; 17917: case 0x73: FEFunction.fpkFTANH (); break; 17918: case 0x74: FEFunction.fpkFATANH (); break; 17919: case 0x75: FEFunction.fpkFASIN (); break; 17920: case 0x76: FEFunction.fpkFACOS (); break; 17921: case 0x77: FEFunction.fpkFLOG10 (); break; 17922: case 0x78: FEFunction.fpkFLOG2 (); break; 17923: case 0x79: FEFunction.fpkFFREXP (); break; 17924: case 0x7a: FEFunction.fpkFLDEXP (); break; 17925: case 0x7b: FEFunction.fpkFADDONE (); break; 17926: case 0x7c: FEFunction.fpkFSUBONE (); break; 17927: case 0x7d: FEFunction.fpkFDIVTWO (); break; 17928: case 0x7e: FEFunction.fpkFIEECNV (); break; 17929: case 0x7f: FEFunction.fpkIEEFCNV (); break; 17930: //case 0x80: break; 17931: //case 0x81: break; 17932: //case 0x82: break; 17933: //case 0x83: break; 17934: //case 0x84: break; 17935: //case 0x85: break; 17936: //case 0x86: break; 17937: //case 0x87: break; 17938: //case 0x88: break; 17939: //case 0x89: break; 17940: //case 0x8a: break; 17941: //case 0x8b: break; 17942: //case 0x8c: break; 17943: //case 0x8d: break; 17944: //case 0x8e: break; 17945: //case 0x8f: break; 17946: //case 0x90: break; 17947: //case 0x91: break; 17948: //case 0x92: break; 17949: //case 0x93: break; 17950: //case 0x94: break; 17951: //case 0x95: break; 17952: //case 0x96: break; 17953: //case 0x97: break; 17954: //case 0x98: break; 17955: //case 0x99: break; 17956: //case 0x9a: break; 17957: //case 0x9b: break; 17958: //case 0x9c: break; 17959: //case 0x9d: break; 17960: //case 0x9e: break; 17961: //case 0x9f: break; 17962: //case 0xa0: break; 17963: //case 0xa1: break; 17964: //case 0xa2: break; 17965: //case 0xa3: break; 17966: //case 0xa4: break; 17967: //case 0xa5: break; 17968: //case 0xa6: break; 17969: //case 0xa7: break; 17970: //case 0xa8: break; 17971: //case 0xa9: break; 17972: //case 0xaa: break; 17973: //case 0xab: break; 17974: //case 0xac: break; 17975: //case 0xad: break; 17976: //case 0xae: break; 17977: //case 0xaf: break; 17978: //case 0xb0: break; 17979: //case 0xb1: break; 17980: //case 0xb2: break; 17981: //case 0xb3: break; 17982: //case 0xb4: break; 17983: //case 0xb5: break; 17984: //case 0xb6: break; 17985: //case 0xb7: break; 17986: //case 0xb8: break; 17987: //case 0xb9: break; 17988: //case 0xba: break; 17989: //case 0xbb: break; 17990: //case 0xbc: break; 17991: //case 0xbd: break; 17992: //case 0xbe: break; 17993: //case 0xbf: break; 17994: //case 0xc0: break; 17995: //case 0xc1: break; 17996: //case 0xc2: break; 17997: //case 0xc3: break; 17998: //case 0xc4: break; 17999: //case 0xc5: break; 18000: //case 0xc6: break; 18001: //case 0xc7: break; 18002: //case 0xc8: break; 18003: //case 0xc9: break; 18004: //case 0xca: break; 18005: //case 0xcb: break; 18006: //case 0xcc: break; 18007: //case 0xcd: break; 18008: //case 0xce: break; 18009: //case 0xcf: break; 18010: //case 0xd0: break; 18011: //case 0xd1: break; 18012: //case 0xd2: break; 18013: //case 0xd3: break; 18014: //case 0xd4: break; 18015: //case 0xd5: break; 18016: //case 0xd6: break; 18017: //case 0xd7: break; 18018: //case 0xd8: break; 18019: //case 0xd9: break; 18020: //case 0xda: break; 18021: //case 0xdb: break; 18022: //case 0xdc: break; 18023: //case 0xdd: break; 18024: //case 0xde: break; 18025: //case 0xdf: break; 18026: case 0xe0: fpkCLMUL (); break; 18027: case 0xe1: fpkCLDIV (); break; 18028: case 0xe2: fpkCLMOD (); break; 18029: case 0xe3: fpkCUMUL (); break; 18030: case 0xe4: fpkCUDIV (); break; 18031: case 0xe5: fpkCUMOD (); break; 18032: case 0xe6: fpkCLTOD (); break; 18033: case 0xe7: fpkCDTOL (); break; 18034: case 0xe8: fpkCLTOF (); break; 18035: case 0xe9: fpkCFTOL (); break; 18036: case 0xea: fpkCFTOD (); break; 18037: case 0xeb: fpkCDTOF (); break; 18038: case 0xec: fpkCDCMP (); break; 18039: case 0xed: fpkCDADD (); break; 18040: case 0xee: fpkCDSUB (); break; 18041: case 0xef: fpkCDMUL (); break; 18042: case 0xf0: fpkCDDIV (); break; 18043: case 0xf1: fpkCDMOD (); break; 18044: case 0xf2: fpkCFCMP (); break; 18045: case 0xf3: fpkCFADD (); break; 18046: case 0xf4: fpkCFSUB (); break; 18047: case 0xf5: fpkCFMUL (); break; 18048: case 0xf6: fpkCFDIV (); break; 18049: case 0xf7: fpkCFMOD (); break; 18050: case 0xf8: fpkCDTST (); break; 18051: case 0xf9: fpkCFTST (); break; 18052: case 0xfa: fpkCDINC (); break; 18053: case 0xfb: fpkCFINC (); break; 18054: case 0xfc: fpkCDDEC (); break; 18055: case 0xfd: fpkCFDEC (); break; 18056: case 0xfe: FEFunction.fpkFEVARG (); break; 18057: //case 0xff: FEFunction.fpkFEVECS (); break; //FLOATn.Xに処理させる 18058: default: 18059: XEiJ.mpuCycleCount -= FEFunction.FPK_CLOCK; //戻す 18060: irpFline (); 18061: } 18062: if (FEFunction.FPK_DEBUG_TRACE) { 18063: int i = sb.length (); 18064: XEiJ.fmtHex8 (XEiJ.fmtHex8 (XEiJ.fmtHex8 (XEiJ.fmtHex8 (sb.append (" D0="), XEiJ.regRn[0]).append (" D1="), XEiJ.regRn[1]).append (" D2="), XEiJ.regRn[2]).append (" D3="), XEiJ.regRn[3]); 18065: int l = MainMemory.mmrStrlen (a0, 20); 18066: sb.append (" (A0)=\""); 18067: i = sb.length () - i; 18068: MainMemory.mmrRstr (sb, a0, l).append ("\"\n"); 18069: if (a0 <= XEiJ.regRn[8] && XEiJ.regRn[8] <= a0 + l) { 18070: for (i += sb.length () + XEiJ.regRn[8] - a0; sb.length () < i; ) { 18071: sb.append (' '); 18072: } 18073: sb.append ('^'); 18074: } 18075: System.out.println (sb.toString ()); 18076: } 18077: } //irpFpack 18078: 18079: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 18080: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 18081: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 18082: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 18083: //DOS <data> |A|012346|-|UUUUU|UUUUU| |1111_111_1dd_ddd_ddd [FLINE #<data>] 18084: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 18085: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 18086: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 18087: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 18088: //FLINE #<data> |-|012346|-|UUUUU|UUUUU| |1111_ddd_ddd_ddd_ddd (line 1111 emulator) 18089: public static void irpFline () throws M68kException { 18090: irpExceptionFormat0 (M68kException.M6E_LINE_1111_EMULATOR << 2, XEiJ.regPC0); //pcは命令の先頭 18091: } //irpFline 18092: 18093: //irpIllegal () 18094: // オペコードの上位10bitで分類されなかった未実装命令 18095: // 命令実行回数をカウントするために分けてある 18096: // 0x4afcのILLEGAL命令はTASに分類されて未実装実効アドレスで処理されるのでここには来ない 18097: public static void irpIllegal () throws M68kException { 18098: if (true) { 18099: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 18100: throw M68kException.m6eSignal; 18101: } 18102: } //irpIllegal 18103: 18104: //z = irpAbcd (x, y) 18105: // ABCD 18106: public static int irpAbcd (int x, int y) { 18107: int c = XEiJ.regCCR >> 4; 18108: int t = (x & 0xff) + (y & 0xff) + c; //仮の結果 18109: int z = t; //結果 18110: if (0x0a <= (x & 0x0f) + (y & 0x0f) + c) { //ハーフキャリー 18111: z += 0x10 - 0x0a; 18112: } 18113: //XとCはキャリーがあるときセット、さもなくばクリア 18114: if (0xa0 <= z) { //キャリー 18115: z += 0x100 - 0xa0; 18116: XEiJ.regCCR |= XEiJ.REG_CCR_X | XEiJ.REG_CCR_C; 18117: } else { 18118: XEiJ.regCCR &= ~(XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); 18119: } 18120: //Zは結果が0でないときクリア、さもなくば変化しない 18121: z &= 0xff; 18122: if (z != 0x00) { 18123: XEiJ.regCCR &= ~XEiJ.REG_CCR_Z; 18124: } 18125: if (false) { 18126: //000/030のときNは結果の最上位ビット 18127: if ((z & 0x80) != 0) { 18128: XEiJ.regCCR |= XEiJ.REG_CCR_N; 18129: } else { 18130: XEiJ.regCCR &= ~XEiJ.REG_CCR_N; 18131: } 18132: //000のときVは補正値の加算でオーバーフローしたときセット、さもなくばクリア 18133: int a = z - t; //補正値 18134: if ((((t ^ z) & (a ^ z)) & 0x80) != 0) { 18135: XEiJ.regCCR |= XEiJ.REG_CCR_V; 18136: } else { 18137: XEiJ.regCCR &= ~XEiJ.REG_CCR_V; 18138: } 18139: } else if (false) { 18140: //000/030のときNは結果の最上位ビット 18141: if ((z & 0x80) != 0) { 18142: XEiJ.regCCR |= XEiJ.REG_CCR_N; 18143: } else { 18144: XEiJ.regCCR &= ~XEiJ.REG_CCR_N; 18145: } 18146: //030のときVはクリア 18147: XEiJ.regCCR &= ~XEiJ.REG_CCR_V; 18148: } else { 18149: //060のときNとVは変化しない 18150: } 18151: return z; 18152: } //irpAbcd 18153: 18154: //z = irpSbcd (x, y) 18155: // SBCD 18156: public static int irpSbcd (int x, int y) { 18157: int b = XEiJ.regCCR >> 4; 18158: int t = (x & 0xff) - (y & 0xff) - b; //仮の結果 18159: int z = t; //結果 18160: if ((x & 0x0f) - (y & 0x0f) - b < 0) { //ハーフボロー 18161: z -= 0x10 - 0x0a; 18162: } 18163: //XとCはボローがあるときセット、さもなくばクリア 18164: if (z < 0) { //ボロー 18165: if (t < 0) { 18166: z -= 0x100 - 0xa0; 18167: } 18168: XEiJ.regCCR |= XEiJ.REG_CCR_X | XEiJ.REG_CCR_C; 18169: } else { 18170: XEiJ.regCCR &= ~(XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); 18171: } 18172: //Zは結果が0でないときクリア、さもなくば変化しない 18173: z &= 0xff; 18174: if (z != 0x00) { 18175: XEiJ.regCCR &= ~XEiJ.REG_CCR_Z; 18176: } 18177: if (false) { 18178: //000/030のときNは結果の最上位ビット 18179: if ((z & 0x80) != 0) { 18180: XEiJ.regCCR |= XEiJ.REG_CCR_N; 18181: } else { 18182: XEiJ.regCCR &= ~XEiJ.REG_CCR_N; 18183: } 18184: //000のときVは補正値の加算でオーバーフローしたときセット、さもなくばクリア 18185: int a = z - t; //補正値 18186: if ((((t ^ z) & (a ^ z)) & 0x80) != 0) { 18187: XEiJ.regCCR |= XEiJ.REG_CCR_V; 18188: } else { 18189: XEiJ.regCCR &= ~XEiJ.REG_CCR_V; 18190: } 18191: } else if (false) { 18192: //000/030のときNは結果の最上位ビット 18193: if ((z & 0x80) != 0) { 18194: XEiJ.regCCR |= XEiJ.REG_CCR_N; 18195: } else { 18196: XEiJ.regCCR &= ~XEiJ.REG_CCR_N; 18197: } 18198: //030のときVはクリア 18199: XEiJ.regCCR &= ~XEiJ.REG_CCR_V; 18200: } else { 18201: //060のときNとVは変化しない 18202: } 18203: return z; 18204: } //irpSbcd 18205: 18206: 18207: 18208: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 18209: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 18210: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 18211: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 18212: //HFSBOOT |-|012346|-|-----|-----| |0100_111_000_000_000 18213: //HFSINST |-|012346|-|-----|-----| |0100_111_000_000_001 18214: //HFSSTR |-|012346|-|-----|-----| |0100_111_000_000_010 18215: //HFSINT |-|012346|-|-----|-----| |0100_111_000_000_011 18216: //EMXNOP |-|012346|-|-----|-----| |0100_111_000_000_100 18217: // エミュレータ拡張命令 18218: public static void irpEmx () throws M68kException { 18219: switch (XEiJ.regOC & 63) { 18220: case XEiJ.EMX_OPCODE_HFSBOOT & 63: 18221: XEiJ.mpuCycleCount += 19; 18222: if (HFS.hfsIPLBoot ()) { 18223: //JMP $6800.W 18224: irpSetPC (0x00006800); 18225: } 18226: break; 18227: case XEiJ.EMX_OPCODE_HFSINST & 63: 18228: XEiJ.mpuCycleCount += 19; 18229: HFS.hfsInstall (); 18230: break; 18231: case XEiJ.EMX_OPCODE_HFSSTR & 63: 18232: XEiJ.mpuCycleCount += 19; 18233: HFS.hfsStrategy (); 18234: break; 18235: case XEiJ.EMX_OPCODE_HFSINT & 63: 18236: XEiJ.mpuCycleCount += 19; 18237: //XEiJ.mpuClockTime += TMR_FREQ / 100000L; //0.01ms 18238: if (HFS.hfsInterrupt ()) { 18239: //WAIT 18240: XEiJ.mpuTraceFlag = 0; //トレース例外を発生させない 18241: XEiJ.regPC = XEiJ.regPC0; //ループ 18242: XEiJ.mpuClockTime += XEiJ.TMR_FREQ * 4 / 1000000; //4μs。10MHzのとき40clk 18243: XEiJ.mpuLastNano += 4000L; 18244: } 18245: break; 18246: case XEiJ.EMX_OPCODE_EMXNOP & 63: 18247: XEiJ.emxNop (); 18248: break; 18249: case XEiJ.EMX_OPCODE_EMXWAIT & 63: 18250: WaitInstruction.execute (); //待機命令を実行する 18251: break; 18252: default: 18253: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 18254: throw M68kException.m6eSignal; 18255: } 18256: } //irpEmx 18257: 18258: 18259: 18260: //irpSetPC (a) 18261: // pcへデータを書き込む 18262: // 奇数のときはアドレスエラーが発生する 18263: public static void irpSetPC (int a) throws M68kException { 18264: if (XEiJ.TEST_BIT_0_SHIFT ? a << 31 - 0 < 0 : (a & 1) != 0) { 18265: M68kException.m6eNumber = M68kException.M6E_ADDRESS_ERROR; 18266: m60Address = a & -2; //アドレスを偶数にする 18267: M68kException.m6eDirection = XEiJ.MPU_WR_READ; 18268: M68kException.m6eSize = XEiJ.MPU_SS_LONG; 18269: throw M68kException.m6eSignal; 18270: } 18271: if (BranchLog.BLG_ON) { 18272: BranchLog.blgJump (a); //分岐ログに分岐レコードを追加する 18273: } else { 18274: XEiJ.regPC = a; 18275: } 18276: } //irpSetPC 18277: 18278: //irpSetSR (newSr) 18279: // srへデータを書き込む 18280: // ori to sr/andi to sr/eori to sr/move to sr/stop/rteで使用される 18281: // スーパーバイザモードになっていることを確認してから呼び出すこと 18282: // rteではr[15]が指すアドレスからsrとpcを取り出してr[15]を更新してから呼び出すこと 18283: // スーパーバイザモード→ユーザモードのときは移行のための処理を行う 18284: // 新しい割り込みマスクレベルよりも高い割り込み処理の終了をデバイスに通知する 18285: public static void irpSetSR (int newSr) { 18286: XEiJ.regSRT1 = XEiJ.REG_SR_T1 & newSr; 18287: XEiJ.regSRM = XEiJ.REG_SR_M & newSr; 18288: if ((XEiJ.regSRS = XEiJ.REG_SR_S & newSr) == 0) { //スーパーバイザモード→ユーザモード 18289: XEiJ.mpuISP = XEiJ.regRn[15]; //SSPを保存 18290: XEiJ.regRn[15] = XEiJ.mpuUSP; //USPを復元 18291: if (DataBreakPoint.DBP_ON) { 18292: DataBreakPoint.dbpMemoryMap = DataBreakPoint.dbpUserMap; //ユーザメモリマップに切り替える 18293: } else { 18294: XEiJ.busMemoryMap = XEiJ.busUserMap; //ユーザメモリマップに切り替える 18295: } 18296: if (InstructionBreakPoint.IBP_ON) { 18297: InstructionBreakPoint.ibpOp1MemoryMap = InstructionBreakPoint.ibpOp1UserMap; 18298: } 18299: } 18300: int t = (XEiJ.mpuIMR = 0x7f >> ((XEiJ.regSRI = XEiJ.REG_SR_I & newSr) >> 8)) & XEiJ.mpuISR; //XEiJ.mpuISRで1→0とするビット 18301: if (t != 0) { //終了する割り込みがあるとき 18302: XEiJ.mpuISR ^= t; 18303: //デバイスに割り込み処理の終了を通知する 18304: if (t == XEiJ.MPU_MFP_INTERRUPT_MASK) { //MFPのみ 18305: MC68901.mfpDone (); 18306: } else if (t == XEiJ.MPU_DMA_INTERRUPT_MASK) { //DMAのみ 18307: HD63450.dmaDone (); 18308: } else if (t == XEiJ.MPU_SCC_INTERRUPT_MASK) { //SCCのみ 18309: Z8530.sccDone (); 18310: } else if (t == XEiJ.MPU_IOI_INTERRUPT_MASK) { //IOIのみ 18311: IOInterrupt.ioiDone (); 18312: } else if (t == XEiJ.MPU_EB2_INTERRUPT_MASK) { //EB2のみ 18313: XEiJ.eb2Done (); 18314: } else { //SYSのみまたは複数 18315: if (XEiJ.TEST_BIT_1_SHIFT ? t << 24 + XEiJ.MPU_MFP_INTERRUPT_LEVEL < 0 : (t & XEiJ.MPU_MFP_INTERRUPT_MASK) != 0) { 18316: MC68901.mfpDone (); 18317: } 18318: if (t << 24 + XEiJ.MPU_DMA_INTERRUPT_LEVEL < 0) { //(t & XEiJ.MPU_DMA_INTERRUPT_MASK) != 0 18319: HD63450.dmaDone (); 18320: } 18321: if (XEiJ.TEST_BIT_2_SHIFT ? t << 24 + XEiJ.MPU_SCC_INTERRUPT_LEVEL < 0 : (t & XEiJ.MPU_SCC_INTERRUPT_MASK) != 0) { 18322: Z8530.sccDone (); 18323: } 18324: if (t << 24 + XEiJ.MPU_IOI_INTERRUPT_LEVEL < 0) { //(t & XEiJ.MPU_IOI_INTERRUPT_MASK) != 0 18325: IOInterrupt.ioiDone (); 18326: } 18327: if (t << 24 + XEiJ.MPU_EB2_INTERRUPT_LEVEL < 0) { //(t & XEiJ.MPU_EB2_INTERRUPT_MASK) != 0 18328: XEiJ.eb2Done (); 18329: } 18330: if (XEiJ.TEST_BIT_0_SHIFT ? t << 24 + XEiJ.MPU_SYS_INTERRUPT_LEVEL < 0 : (t & XEiJ.MPU_SYS_INTERRUPT_MASK) != 0) { 18331: XEiJ.sysDone (); 18332: } 18333: } 18334: } 18335: XEiJ.mpuIMR |= ~XEiJ.mpuISR & XEiJ.MPU_SYS_INTERRUPT_MASK; //割り込みマスクレベルが7のときレベル7割り込みの処理中でなければレベル7割り込みを許可する 18336: XEiJ.regCCR = XEiJ.REG_CCR_MASK & newSr; 18337: } //irpSetSR 18338: 18339: //irpInterrupt (offset, level) 18340: // 割り込み処理を開始する 18341: public static void irpInterrupt (int offset, int level) throws M68kException { 18342: if (XEiJ.regOC == 0b0100_111_001_110_010) { //最後に実行した命令はSTOP命令 18343: XEiJ.regPC = XEiJ.regPC0 + 4; //次の命令に進む 18344: } 18345: XEiJ.mpuClockTime += XEiJ.mpuModifiedUnit * 19; 18346: int save_sr = XEiJ.regSRT1 | XEiJ.regSRS | XEiJ.regSRM | XEiJ.regSRI | XEiJ.regCCR; 18347: XEiJ.regSRI = level << 8; //割り込みマスクを要求されたレベルに変更する 18348: XEiJ.mpuIMR = 0x7f >> level; 18349: XEiJ.mpuISR |= 0x80 >> level; 18350: XEiJ.regSRT1 = XEiJ.mpuTraceFlag = 0; //srのTビットを消す 18351: int sp; 18352: if (XEiJ.regSRS != 0) { //スーパーバイザモード 18353: sp = XEiJ.regRn[15]; 18354: } else { //ユーザモード 18355: XEiJ.regSRS = XEiJ.REG_SR_S; //スーパーバイザモードへ移行する 18356: XEiJ.mpuUSP = XEiJ.regRn[15]; //USPを保存 18357: sp = XEiJ.mpuISP; //SSPを復元 18358: if (DataBreakPoint.DBP_ON) { 18359: DataBreakPoint.dbpMemoryMap = DataBreakPoint.dbpSuperMap; //スーパーバイザメモリマップに切り替える 18360: } else { 18361: XEiJ.busMemoryMap = XEiJ.busSuperMap; //スーパーバイザメモリマップに切り替える 18362: } 18363: if (InstructionBreakPoint.IBP_ON) { 18364: InstructionBreakPoint.ibpOp1MemoryMap = InstructionBreakPoint.ibpOp1SuperMap; 18365: } 18366: } 18367: //以下はスーパーバイザモード 18368: XEiJ.regRn[15] = sp -= 8; 18369: mmuWriteWordData (sp + 6, offset, 1); //7-6:フォーマットとベクタオフセット 18370: mmuWriteLongData (sp + 2, XEiJ.regPC, 1); //5-2:プログラムカウンタ 18371: mmuWriteWordData (sp, save_sr, 1); //1-0:ステータスレジスタ 18372: //if (XEiJ.regSRM != 0) { //マスタモードのとき 18373: XEiJ.regSRM = 0; //割り込みモードへ移行する 18374: //} 18375: if (BranchLog.BLG_ON) { 18376: XEiJ.regPC0 = XEiJ.regPC; //rteによる割り込み終了と同時に次の割り込みを受け付けたとき間でpc0を更新しないと2番目の分岐レコードの終了アドレスが1番目と同じになっておかしな分岐レコードができてしまう 18377: } 18378: irpSetPC (mmuReadLongFour (XEiJ.mpuVBR + offset, 1)); //例外ベクタを取り出してジャンプする 18379: } //irpInterrupt 18380: 18381: //irpExceptionFormat0 (offset, save_pc) 18382: // 例外処理を開始する 18383: // スタックへのプッシュ、ベクタの取り出し、ジャンプのいずれかでバスエラーまたはアドレスエラーが発生する場合がある 18384: public static void irpExceptionFormat0 (int offset, int save_pc) throws M68kException { 18385: XEiJ.mpuCycleCount += 19; 18386: int save_sr = XEiJ.regSRT1 | XEiJ.regSRS | XEiJ.regSRM | XEiJ.regSRI | XEiJ.regCCR; 18387: XEiJ.regSRT1 = XEiJ.mpuTraceFlag = 0; //srのTビットを消す 18388: int sp; 18389: if (XEiJ.regSRS != 0) { //スーパーバイザモード 18390: sp = XEiJ.regRn[15]; 18391: } else { //ユーザモード 18392: XEiJ.regSRS = XEiJ.REG_SR_S; //スーパーバイザモードへ移行する 18393: XEiJ.mpuUSP = XEiJ.regRn[15]; //USPを保存 18394: sp = XEiJ.mpuISP; //SSPを復元 18395: if (DataBreakPoint.DBP_ON) { 18396: DataBreakPoint.dbpMemoryMap = DataBreakPoint.dbpSuperMap; //スーパーバイザメモリマップに切り替える 18397: } else { 18398: XEiJ.busMemoryMap = XEiJ.busSuperMap; //スーパーバイザメモリマップに切り替える 18399: } 18400: if (InstructionBreakPoint.IBP_ON) { 18401: InstructionBreakPoint.ibpOp1MemoryMap = InstructionBreakPoint.ibpOp1SuperMap; 18402: } 18403: } 18404: //以下はスーパーバイザモード 18405: XEiJ.regRn[15] = sp -= 8; 18406: mmuWriteWordData (sp + 6, offset, 1); //7-6:フォーマットとベクタオフセット 18407: mmuWriteLongData (sp + 2, save_pc, 1); //5-2:プログラムカウンタ 18408: mmuWriteWordData (sp, save_sr, 1); //1-0:ステータスレジスタ 18409: irpSetPC (mmuReadLongFour (XEiJ.mpuVBR + offset, 1)); //例外ベクタを取り出してジャンプする 18410: } //irpExceptionFormat0 18411: 18412: //irpExceptionFormat2 (offset, save_pc, address) 18413: // 例外処理を開始する 18414: // スタックへのプッシュ、ベクタの取り出し、ジャンプのいずれかでバスエラーまたはアドレスエラーが発生する場合がある 18415: public static void irpExceptionFormat2 (int offset, int save_pc, int address) throws M68kException { 18416: XEiJ.mpuCycleCount += 19; 18417: int save_sr = XEiJ.regSRT1 | XEiJ.regSRS | XEiJ.regSRM | XEiJ.regSRI | XEiJ.regCCR; 18418: XEiJ.regSRT1 = XEiJ.mpuTraceFlag = 0; //srのTビットを消す 18419: int sp; 18420: if (XEiJ.regSRS != 0) { //スーパーバイザモード 18421: sp = XEiJ.regRn[15]; 18422: } else { //ユーザモード 18423: XEiJ.regSRS = XEiJ.REG_SR_S; //スーパーバイザモードへ移行する 18424: XEiJ.mpuUSP = XEiJ.regRn[15]; //USPを保存 18425: sp = XEiJ.mpuISP; //SSPを復元 18426: if (DataBreakPoint.DBP_ON) { 18427: DataBreakPoint.dbpMemoryMap = DataBreakPoint.dbpSuperMap; //スーパーバイザメモリマップに切り替える 18428: } else { 18429: XEiJ.busMemoryMap = XEiJ.busSuperMap; //スーパーバイザメモリマップに切り替える 18430: } 18431: if (InstructionBreakPoint.IBP_ON) { 18432: InstructionBreakPoint.ibpOp1MemoryMap = InstructionBreakPoint.ibpOp1SuperMap; 18433: } 18434: } 18435: //以下はスーパーバイザモード 18436: XEiJ.regRn[15] = sp -= 12; 18437: mmuWriteLongData (sp + 8, address, 1); //11-8:アドレス 18438: mmuWriteWordData (sp + 6, 0x2000 | offset, 1); //7-6:フォーマットとベクタオフセット 18439: mmuWriteLongData (sp + 2, save_pc, 1); //5-2:プログラムカウンタ 18440: mmuWriteWordData (sp, save_sr, 1); //1-0:ステータスレジスタ 18441: irpSetPC (mmuReadLongFour (XEiJ.mpuVBR + offset, 1)); //例外ベクタを取り出してジャンプする 18442: } //irpExceptionFormat2 18443: 18444: //irpExceptionFormat3 (offset, save_pc, address) 18445: // 例外処理を開始する 18446: // スタックへのプッシュ、ベクタの取り出し、ジャンプのいずれかでバスエラーまたはアドレスエラーが発生する場合がある 18447: public static void irpExceptionFormat3 (int offset, int save_pc, int address) throws M68kException { 18448: XEiJ.mpuCycleCount += 19; 18449: int save_sr = XEiJ.regSRT1 | XEiJ.regSRS | XEiJ.regSRM | XEiJ.regSRI | XEiJ.regCCR; 18450: XEiJ.regSRT1 = XEiJ.mpuTraceFlag = 0; //srのTビットを消す 18451: int sp; 18452: if (XEiJ.regSRS != 0) { //スーパーバイザモード 18453: sp = XEiJ.regRn[15]; 18454: } else { //ユーザモード 18455: XEiJ.regSRS = XEiJ.REG_SR_S; //スーパーバイザモードへ移行する 18456: XEiJ.mpuUSP = XEiJ.regRn[15]; //USPを保存 18457: sp = XEiJ.mpuISP; //SSPを復元 18458: if (DataBreakPoint.DBP_ON) { 18459: DataBreakPoint.dbpMemoryMap = DataBreakPoint.dbpSuperMap; //スーパーバイザメモリマップに切り替える 18460: } else { 18461: XEiJ.busMemoryMap = XEiJ.busSuperMap; //スーパーバイザメモリマップに切り替える 18462: } 18463: if (InstructionBreakPoint.IBP_ON) { 18464: InstructionBreakPoint.ibpOp1MemoryMap = InstructionBreakPoint.ibpOp1SuperMap; 18465: } 18466: } 18467: //以下はスーパーバイザモード 18468: XEiJ.regRn[15] = sp -= 12; 18469: mmuWriteLongData (sp + 8, address, 1); //11-8:実効アドレス 18470: mmuWriteWordData (sp + 6, 0x3000 | offset, 1); //7-6:フォーマットとベクタオフセット 18471: mmuWriteLongData (sp + 2, save_pc, 1); //5-2:プログラムカウンタ 18472: mmuWriteWordData (sp, save_sr, 1); //1-0:ステータスレジスタ 18473: irpSetPC (mmuReadLongFour (XEiJ.mpuVBR + offset, 1)); //例外ベクタを取り出してジャンプする 18474: } //irpExceptionFormat3 18475: 18476: 18477: 18478: // 18479: // (d8,Ar,Rn.wl)と(d8,PC,Rn.wl)の拡張ワード 18480: // 0xf000 インデックスレジスタ 18481: // 0=D0,1=D1,2=D2,3=D3,4=D4,5=D5,6=D6,7=D7,8=A0,9=A1,10=A2,11=A3,12=A4,13=A5,14=A6,15=A7 18482: // 0x0800 インデックスサイズ 18483: // 0=ワードインデックス,1=ロングインデックス 18484: // 0x0600 スケールファクタ。ワードインデックスのとき符号拡張してから掛ける 18485: // 0=*1,1=*2,2=*4,3=*8 18486: // 0x0100 フォーマット 18487: // 0=ブリーフフォーマット,1=フルフォーマット 18488: // ブリーフフォーマット 18489: // 0x00ff バイトディスプレースメント 18490: // フルフォーマット 18491: // 0x0080 1=ベースレジスタなし 18492: // 0x0040 1=インデックスなし 18493: // 0x0030 ベースディスプレースメントサイズ 18494: // 1=ベースディスプレースメントなし,2=ワードベースディスプレースメント,3=ロングベースディスプレースメント 18495: // 0x0008 0 18496: // 0x0004 0=プリインデックス,1=ポストインデックス 18497: // 0x0003 インダイレクトとアウタディスプレースメントサイズ 18498: // 0=インダイレクトなし,1=アウタディスプレースメントなし,2=ワードアウタディスプレースメント,3=ロングアウタディスプレースメント 18499: // ベースディスプレースメントとアウタディスプレースメントが続く 18500: // MPUによる制限 18501: // スケールファクタは68020以上。68000と68010では無視されて*1になる 18502: // フルフォーマットは68020以上。68000と68010では不当命令になる 18503: // 18504: // (d16,PC)と(d8,PC,Rn.wl)のベースアドレス 18505: // (d16,PC)と(d8,PC,Rn.wl)のベースアドレスは、Fライン命令以外では命令の先頭アドレス+2、Fライン命令では命令の先頭アドレス+4 18506: // ベースアドレスの位置で実効アドレスを計算する 18507: // 18508: // #<data>の扱い 18509: // #<data>をそれが書かれている場所を実効アドレスとみなす方法で処理するとデータアクセスになってしまう 18510: // 命令アクセスにするためDr,Arと同様に呼び出し側で分離する 18511: // バイト 18512: // data = (ea < 020 ? (byte) XEiJ.regRn[ea] : //Dr,Ar 18513: // ea < 074 ? mmuReadByteSignData (efaMemByte (ea)) : 18514: // mmuReadByteSignExword ((XEiJ.regPC += 2) - 1, XEiJ.regSRS)); //#<data> 18515: // ワード 18516: // data = (ea < 020 ? (short) XEiJ.regRn[ea] : //Dr,Ar 18517: // ea < 074 ? mmuReadWordSignData (efaMemWord (ea)) : 18518: // mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS)); //#<data> 18519: // ロング 18520: // data = (ea < 020 ? XEiJ.regRn[ea] : //Dr,Ar 18521: // ea < 074 ? mmuReadLongData (efaMemLong (ea)) : 18522: // mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS)); //#<data> 18523: // 18524: 18525: //a = efaMemByte (ea) 18526: //a = efaMemWord (ea) 18527: //a = efaMemLong (ea) 18528: //a = efaMemQuad (ea) 18529: //a = efaMemExtd (ea) 18530: // | M+-WXZP | 18531: // メモリモードの実効アドレスを求める 18532: // バイトのとき(A7)+と-(A7)はA7を奇偶に関わらず2変化させ、跨いだワードの上位バイト(アドレスの小さい方)を参照する 18533: public static int efaMemByte (int ea) throws M68kException { 18534: int t, w, x; 18535: switch (ea) { 18536: case 020: //(A0) 18537: case 021: //(A1) 18538: case 022: //(A2) 18539: case 023: //(A3) 18540: case 024: //(A4) 18541: case 025: //(A5) 18542: case 026: //(A6) 18543: case 027: //(A7) 18544: return m60Address = XEiJ.regRn[ea - (020 - 8)]; 18545: case 030: //(A0)+ 18546: case 031: //(A1)+ 18547: case 032: //(A1)+ 18548: case 033: //(A3)+ 18549: case 034: //(A4)+ 18550: case 035: //(A5)+ 18551: case 036: //(A6)+ 18552: m60Incremented += 1L << ((ea - 030) << 3); 18553: return m60Address = XEiJ.regRn[ea - (030 - 8)]++; 18554: case 037: //(A7)+ 18555: m60Incremented += 2L << (7 << 3); 18556: return m60Address = (XEiJ.regRn[15] += 2) - 2; 18557: case 040: //-(A0) 18558: case 041: //-(A1) 18559: case 042: //-(A2) 18560: case 043: //-(A3) 18561: case 044: //-(A4) 18562: case 045: //-(A5) 18563: case 046: //-(A6) 18564: m60Incremented -= 1L << ((ea - 040) << 3); 18565: return m60Address = --XEiJ.regRn[ea - (040 - 8)]; 18566: case 047: //-(A7) 18567: m60Incremented -= 2L << (7 << 3); 18568: return m60Address = XEiJ.regRn[15] -= 2; 18569: case 050: //(d16,A0) 18570: case 051: //(d16,A1) 18571: case 052: //(d16,A2) 18572: case 053: //(d16,A3) 18573: case 054: //(d16,A4) 18574: case 055: //(d16,A5) 18575: case 056: //(d16,A6) 18576: case 057: //(d16,A7) 18577: case 072: //(d16,PC) 18578: t = ea == 072 ? XEiJ.regPC : XEiJ.regRn[ea - (050 - 8)]; //ベースレジスタ 18579: return m60Address = t + mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); //ワードディスプレースメント 18580: case 060: //(d8,A0,Rn.wl) 18581: case 061: //(d8,A1,Rn.wl) 18582: case 062: //(d8,A2,Rn.wl) 18583: case 063: //(d8,A3,Rn.wl) 18584: case 064: //(d8,A4,Rn.wl) 18585: case 065: //(d8,A5,Rn.wl) 18586: case 066: //(d8,A6,Rn.wl) 18587: case 067: //(d8,A7,Rn.wl) 18588: case 073: //(d8,PC,Rn.wl) 18589: t = ea == 073 ? XEiJ.regPC : XEiJ.regRn[ea - (060 - 8)]; //ベースレジスタ 18590: w = mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); //拡張ワード 18591: if ((0x0100 & w) == 0) { //ブリーフフォーマット 18592: return m60Address = 18593: (t //ベースレジスタ 18594: + (byte) w //バイトディスプレースメント 18595: + (((0x0800 & w) == 0 ? (short) XEiJ.regRn[w >> 12] : //ワードインデックス 18596: XEiJ.regRn[w >> 12]) //ロングインデックス 18597: << ((0x0600 & w) >> 9))); //スケールファクタ 18598: } else { //フルフォーマット 18599: XEiJ.mpuCycleCount += ((0x0003 & w) == 0 ? 1 : //インダイレクトなし 18600: 3); //インダイレクトあり 18601: t = (((0x0080 & w) != 0 ? 0 : //ベースレジスタなし 18602: t) + //ベースレジスタあり 18603: ((0x0020 & w) == 0 ? 0 : //ベースディスプレースメントなし 18604: (0x0010 & w) == 0 ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) : //ワードベースディスプレースメント 18605: mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS))); //ロングベースディスプレースメント 18606: x = ((0x0040 & w) != 0 ? 0 : //インデックスなし 18607: ((0x0800 & w) == 0 ? (short) XEiJ.regRn[w >> 12] : //ワードインデックス 18608: XEiJ.regRn[w >> 12]) //ロングインデックス 18609: << ((0x0600 & w) >> 9)); //スケールファクタ 18610: return m60Address = 18611: ((0x0003 & w) == 0 ? t + x : //インダイレクトなし 18612: (((0x0004 & w) == 0 ? mmuReadLongData (m60Address = t + x, XEiJ.regSRS) : //プリインデックス 18613: mmuReadLongData (m60Address = t, XEiJ.regSRS) + x) //ポストインデックス 18614: + ((0x0002 & w) == 0 ? 0 : //アウタディスプレースメントなし 18615: (0x0001 & w) == 0 ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) : //ワードアウタディスプレースメント 18616: mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS)))); //ロングアウタディスプレースメント 18617: } 18618: case 070: //(xxx).W 18619: return m60Address = mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); 18620: case 071: //(xxx).L 18621: return m60Address = mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS); 18622: case 074: 18623: Thread.dumpStack (); 18624: break; 18625: } //switch 18626: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 18627: throw M68kException.m6eSignal; 18628: } //efaMemByte 18629: public static int efaMemWord (int ea) throws M68kException { 18630: int t, w, x; 18631: switch (ea) { 18632: case 020: //(A0) 18633: case 021: //(A1) 18634: case 022: //(A2) 18635: case 023: //(A3) 18636: case 024: //(A4) 18637: case 025: //(A5) 18638: case 026: //(A6) 18639: case 027: //(A7) 18640: return m60Address = XEiJ.regRn[ea - (020 - 8)]; 18641: case 030: //(A0)+ 18642: case 031: //(A1)+ 18643: case 032: //(A1)+ 18644: case 033: //(A3)+ 18645: case 034: //(A4)+ 18646: case 035: //(A5)+ 18647: case 036: //(A6)+ 18648: case 037: //(A7)+ 18649: m60Incremented += 2L << ((ea - 030) << 3); 18650: return m60Address = (XEiJ.regRn[ea - (030 - 8)] += 2) - 2; 18651: case 040: //-(A0) 18652: case 041: //-(A1) 18653: case 042: //-(A2) 18654: case 043: //-(A3) 18655: case 044: //-(A4) 18656: case 045: //-(A5) 18657: case 046: //-(A6) 18658: case 047: //-(A7) 18659: m60Incremented -= 2L << ((ea - 040) << 3); 18660: return m60Address = XEiJ.regRn[ea - (040 - 8)] -= 2; 18661: case 050: //(d16,A0) 18662: case 051: //(d16,A1) 18663: case 052: //(d16,A2) 18664: case 053: //(d16,A3) 18665: case 054: //(d16,A4) 18666: case 055: //(d16,A5) 18667: case 056: //(d16,A6) 18668: case 057: //(d16,A7) 18669: case 072: //(d16,PC) 18670: t = ea == 072 ? XEiJ.regPC : XEiJ.regRn[ea - (050 - 8)]; //ベースレジスタ 18671: return m60Address = t + mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); //ワードディスプレースメント 18672: case 060: //(d8,A0,Rn.wl) 18673: case 061: //(d8,A1,Rn.wl) 18674: case 062: //(d8,A2,Rn.wl) 18675: case 063: //(d8,A3,Rn.wl) 18676: case 064: //(d8,A4,Rn.wl) 18677: case 065: //(d8,A5,Rn.wl) 18678: case 066: //(d8,A6,Rn.wl) 18679: case 067: //(d8,A7,Rn.wl) 18680: case 073: //(d8,PC,Rn.wl) 18681: t = ea == 073 ? XEiJ.regPC : XEiJ.regRn[ea - (060 - 8)]; //ベースレジスタ 18682: w = mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); //拡張ワード 18683: if ((0x0100 & w) == 0) { //ブリーフフォーマット 18684: return m60Address = 18685: (t //ベースレジスタ 18686: + (byte) w //バイトディスプレースメント 18687: + (((0x0800 & w) == 0 ? (short) XEiJ.regRn[w >> 12] : //ワードインデックス 18688: XEiJ.regRn[w >> 12]) //ロングインデックス 18689: << ((0x0600 & w) >> 9))); //スケールファクタ 18690: } else { //フルフォーマット 18691: XEiJ.mpuCycleCount += ((0x0003 & w) == 0 ? 1 : //インダイレクトなし 18692: 3); //インダイレクトあり 18693: t = (((0x0080 & w) != 0 ? 0 : //ベースレジスタなし 18694: t) + //ベースレジスタあり 18695: ((0x0020 & w) == 0 ? 0 : //ベースディスプレースメントなし 18696: (0x0010 & w) == 0 ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) : //ワードベースディスプレースメント 18697: mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS))); //ロングベースディスプレースメント 18698: x = ((0x0040 & w) != 0 ? 0 : //インデックスなし 18699: ((0x0800 & w) == 0 ? (short) XEiJ.regRn[w >> 12] : //ワードインデックス 18700: XEiJ.regRn[w >> 12]) //ロングインデックス 18701: << ((0x0600 & w) >> 9)); //スケールファクタ 18702: return m60Address = 18703: ((0x0003 & w) == 0 ? t + x : //インダイレクトなし 18704: (((0x0004 & w) == 0 ? mmuReadLongData (m60Address = t + x, XEiJ.regSRS) : //プリインデックス 18705: mmuReadLongData (m60Address = t, XEiJ.regSRS) + x) //ポストインデックス 18706: + ((0x0002 & w) == 0 ? 0 : //アウタディスプレースメントなし 18707: (0x0001 & w) == 0 ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) : //ワードアウタディスプレースメント 18708: mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS)))); //ロングアウタディスプレースメント 18709: } 18710: case 070: //(xxx).W 18711: return m60Address = mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); 18712: case 071: //(xxx).L 18713: return m60Address = mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS); 18714: case 074: 18715: Thread.dumpStack (); 18716: break; 18717: } //switch 18718: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 18719: throw M68kException.m6eSignal; 18720: } //efaMemWord 18721: public static int efaMemLong (int ea) throws M68kException { 18722: int t, w, x; 18723: switch (ea) { 18724: case 020: //(A0) 18725: case 021: //(A1) 18726: case 022: //(A2) 18727: case 023: //(A3) 18728: case 024: //(A4) 18729: case 025: //(A5) 18730: case 026: //(A6) 18731: case 027: //(A7) 18732: return m60Address = XEiJ.regRn[ea - (020 - 8)]; 18733: case 030: //(A0)+ 18734: case 031: //(A1)+ 18735: case 032: //(A1)+ 18736: case 033: //(A3)+ 18737: case 034: //(A4)+ 18738: case 035: //(A5)+ 18739: case 036: //(A6)+ 18740: case 037: //(A7)+ 18741: m60Incremented += 4L << ((ea - 030) << 3); 18742: return m60Address = (XEiJ.regRn[ea - (030 - 8)] += 4) - 4; 18743: case 040: //-(A0) 18744: case 041: //-(A1) 18745: case 042: //-(A2) 18746: case 043: //-(A3) 18747: case 044: //-(A4) 18748: case 045: //-(A5) 18749: case 046: //-(A6) 18750: case 047: //-(A7) 18751: m60Incremented -= 4L << ((ea - 040) << 3); 18752: return m60Address = XEiJ.regRn[ea - (040 - 8)] -= 4; 18753: case 050: //(d16,A0) 18754: case 051: //(d16,A1) 18755: case 052: //(d16,A2) 18756: case 053: //(d16,A3) 18757: case 054: //(d16,A4) 18758: case 055: //(d16,A5) 18759: case 056: //(d16,A6) 18760: case 057: //(d16,A7) 18761: case 072: //(d16,PC) 18762: t = ea == 072 ? XEiJ.regPC : XEiJ.regRn[ea - (050 - 8)]; //ベースレジスタ 18763: return m60Address = t + mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); //ワードディスプレースメント 18764: case 060: //(d8,A0,Rn.wl) 18765: case 061: //(d8,A1,Rn.wl) 18766: case 062: //(d8,A2,Rn.wl) 18767: case 063: //(d8,A3,Rn.wl) 18768: case 064: //(d8,A4,Rn.wl) 18769: case 065: //(d8,A5,Rn.wl) 18770: case 066: //(d8,A6,Rn.wl) 18771: case 067: //(d8,A7,Rn.wl) 18772: case 073: //(d8,PC,Rn.wl) 18773: t = ea == 073 ? XEiJ.regPC : XEiJ.regRn[ea - (060 - 8)]; //ベースレジスタ 18774: w = mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); //拡張ワード 18775: if ((0x0100 & w) == 0) { //ブリーフフォーマット 18776: return m60Address = 18777: (t //ベースレジスタ 18778: + (byte) w //バイトディスプレースメント 18779: + (((0x0800 & w) == 0 ? (short) XEiJ.regRn[w >> 12] : //ワードインデックス 18780: XEiJ.regRn[w >> 12]) //ロングインデックス 18781: << ((0x0600 & w) >> 9))); //スケールファクタ 18782: } else { //フルフォーマット 18783: XEiJ.mpuCycleCount += ((0x0003 & w) == 0 ? 1 : //インダイレクトなし 18784: 3); //インダイレクトあり 18785: t = (((0x0080 & w) != 0 ? 0 : //ベースレジスタなし 18786: t) + //ベースレジスタあり 18787: ((0x0020 & w) == 0 ? 0 : //ベースディスプレースメントなし 18788: (0x0010 & w) == 0 ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) : //ワードベースディスプレースメント 18789: mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS))); //ロングベースディスプレースメント 18790: x = ((0x0040 & w) != 0 ? 0 : //インデックスなし 18791: ((0x0800 & w) == 0 ? (short) XEiJ.regRn[w >> 12] : //ワードインデックス 18792: XEiJ.regRn[w >> 12]) //ロングインデックス 18793: << ((0x0600 & w) >> 9)); //スケールファクタ 18794: return m60Address = 18795: ((0x0003 & w) == 0 ? t + x : //インダイレクトなし 18796: (((0x0004 & w) == 0 ? mmuReadLongData (m60Address = t + x, XEiJ.regSRS) : //プリインデックス 18797: mmuReadLongData (m60Address = t, XEiJ.regSRS) + x) //ポストインデックス 18798: + ((0x0002 & w) == 0 ? 0 : //アウタディスプレースメントなし 18799: (0x0001 & w) == 0 ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) : //ワードアウタディスプレースメント 18800: mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS)))); //ロングアウタディスプレースメント 18801: } 18802: case 070: //(xxx).W 18803: return m60Address = mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); 18804: case 071: //(xxx).L 18805: return m60Address = mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS); 18806: case 074: 18807: Thread.dumpStack (); 18808: break; 18809: } //switch 18810: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 18811: throw M68kException.m6eSignal; 18812: } //efaMemLong 18813: public static int efaMemQuad (int ea) throws M68kException { 18814: int t, w, x; 18815: switch (ea) { 18816: case 020: //(A0) 18817: case 021: //(A1) 18818: case 022: //(A2) 18819: case 023: //(A3) 18820: case 024: //(A4) 18821: case 025: //(A5) 18822: case 026: //(A6) 18823: case 027: //(A7) 18824: return m60Address = XEiJ.regRn[ea - (020 - 8)]; 18825: case 030: //(A0)+ 18826: case 031: //(A1)+ 18827: case 032: //(A1)+ 18828: case 033: //(A3)+ 18829: case 034: //(A4)+ 18830: case 035: //(A5)+ 18831: case 036: //(A6)+ 18832: case 037: //(A7)+ 18833: m60Incremented += 8L << ((ea - 030) << 3); 18834: return m60Address = (XEiJ.regRn[ea - (030 - 8)] += 8) - 8; 18835: case 040: //-(A0) 18836: case 041: //-(A1) 18837: case 042: //-(A2) 18838: case 043: //-(A3) 18839: case 044: //-(A4) 18840: case 045: //-(A5) 18841: case 046: //-(A6) 18842: case 047: //-(A7) 18843: m60Incremented -= 8L << ((ea - 040) << 3); 18844: return m60Address = XEiJ.regRn[ea - (040 - 8)] -= 8; 18845: case 050: //(d16,A0) 18846: case 051: //(d16,A1) 18847: case 052: //(d16,A2) 18848: case 053: //(d16,A3) 18849: case 054: //(d16,A4) 18850: case 055: //(d16,A5) 18851: case 056: //(d16,A6) 18852: case 057: //(d16,A7) 18853: case 072: //(d16,PC) 18854: t = ea == 072 ? XEiJ.regPC : XEiJ.regRn[ea - (050 - 8)]; //ベースレジスタ 18855: return m60Address = t + mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); //ワードディスプレースメント 18856: case 060: //(d8,A0,Rn.wl) 18857: case 061: //(d8,A1,Rn.wl) 18858: case 062: //(d8,A2,Rn.wl) 18859: case 063: //(d8,A3,Rn.wl) 18860: case 064: //(d8,A4,Rn.wl) 18861: case 065: //(d8,A5,Rn.wl) 18862: case 066: //(d8,A6,Rn.wl) 18863: case 067: //(d8,A7,Rn.wl) 18864: case 073: //(d8,PC,Rn.wl) 18865: t = ea == 073 ? XEiJ.regPC : XEiJ.regRn[ea - (060 - 8)]; //ベースレジスタ 18866: w = mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); //拡張ワード 18867: if ((0x0100 & w) == 0) { //ブリーフフォーマット 18868: return m60Address = 18869: (t //ベースレジスタ 18870: + (byte) w //バイトディスプレースメント 18871: + (((0x0800 & w) == 0 ? (short) XEiJ.regRn[w >> 12] : //ワードインデックス 18872: XEiJ.regRn[w >> 12]) //ロングインデックス 18873: << ((0x0600 & w) >> 9))); //スケールファクタ 18874: } else { //フルフォーマット 18875: XEiJ.mpuCycleCount += ((0x0003 & w) == 0 ? 1 : //インダイレクトなし 18876: 3); //インダイレクトあり 18877: t = (((0x0080 & w) != 0 ? 0 : //ベースレジスタなし 18878: t) + //ベースレジスタあり 18879: ((0x0020 & w) == 0 ? 0 : //ベースディスプレースメントなし 18880: (0x0010 & w) == 0 ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) : //ワードベースディスプレースメント 18881: mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS))); //ロングベースディスプレースメント 18882: x = ((0x0040 & w) != 0 ? 0 : //インデックスなし 18883: ((0x0800 & w) == 0 ? (short) XEiJ.regRn[w >> 12] : //ワードインデックス 18884: XEiJ.regRn[w >> 12]) //ロングインデックス 18885: << ((0x0600 & w) >> 9)); //スケールファクタ 18886: return m60Address = 18887: ((0x0003 & w) == 0 ? t + x : //インダイレクトなし 18888: (((0x0004 & w) == 0 ? mmuReadLongData (m60Address = t + x, XEiJ.regSRS) : //プリインデックス 18889: mmuReadLongData (m60Address = t, XEiJ.regSRS) + x) //ポストインデックス 18890: + ((0x0002 & w) == 0 ? 0 : //アウタディスプレースメントなし 18891: (0x0001 & w) == 0 ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) : //ワードアウタディスプレースメント 18892: mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS)))); //ロングアウタディスプレースメント 18893: } 18894: case 070: //(xxx).W 18895: return m60Address = mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); 18896: case 071: //(xxx).L 18897: return m60Address = mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS); 18898: case 074: 18899: Thread.dumpStack (); 18900: break; 18901: } //switch 18902: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 18903: throw M68kException.m6eSignal; 18904: } //efaMemQuad 18905: public static int efaMemExtd (int ea) throws M68kException { 18906: int t, w, x; 18907: switch (ea) { 18908: case 020: //(A0) 18909: case 021: //(A1) 18910: case 022: //(A2) 18911: case 023: //(A3) 18912: case 024: //(A4) 18913: case 025: //(A5) 18914: case 026: //(A6) 18915: case 027: //(A7) 18916: return m60Address = XEiJ.regRn[ea - (020 - 8)]; 18917: case 030: //(A0)+ 18918: case 031: //(A1)+ 18919: case 032: //(A1)+ 18920: case 033: //(A3)+ 18921: case 034: //(A4)+ 18922: case 035: //(A5)+ 18923: case 036: //(A6)+ 18924: case 037: //(A7)+ 18925: m60Incremented += 12L << ((ea - 030) << 3); 18926: return m60Address = (XEiJ.regRn[ea - (030 - 8)] += 12) - 12; 18927: case 040: //-(A0) 18928: case 041: //-(A1) 18929: case 042: //-(A2) 18930: case 043: //-(A3) 18931: case 044: //-(A4) 18932: case 045: //-(A5) 18933: case 046: //-(A6) 18934: case 047: //-(A7) 18935: m60Incremented -= 12L << ((ea - 040) << 3); 18936: return m60Address = XEiJ.regRn[ea - (040 - 8)] -= 12; 18937: case 050: //(d16,A0) 18938: case 051: //(d16,A1) 18939: case 052: //(d16,A2) 18940: case 053: //(d16,A3) 18941: case 054: //(d16,A4) 18942: case 055: //(d16,A5) 18943: case 056: //(d16,A6) 18944: case 057: //(d16,A7) 18945: case 072: //(d16,PC) 18946: t = ea == 072 ? XEiJ.regPC : XEiJ.regRn[ea - (050 - 8)]; //ベースレジスタ 18947: return m60Address = t + mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); //ワードディスプレースメント 18948: case 060: //(d8,A0,Rn.wl) 18949: case 061: //(d8,A1,Rn.wl) 18950: case 062: //(d8,A2,Rn.wl) 18951: case 063: //(d8,A3,Rn.wl) 18952: case 064: //(d8,A4,Rn.wl) 18953: case 065: //(d8,A5,Rn.wl) 18954: case 066: //(d8,A6,Rn.wl) 18955: case 067: //(d8,A7,Rn.wl) 18956: case 073: //(d8,PC,Rn.wl) 18957: t = ea == 073 ? XEiJ.regPC : XEiJ.regRn[ea - (060 - 8)]; //ベースレジスタ 18958: w = mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); //拡張ワード 18959: if ((0x0100 & w) == 0) { //ブリーフフォーマット 18960: return m60Address = 18961: (t //ベースレジスタ 18962: + (byte) w //バイトディスプレースメント 18963: + (((0x0800 & w) == 0 ? (short) XEiJ.regRn[w >> 12] : //ワードインデックス 18964: XEiJ.regRn[w >> 12]) //ロングインデックス 18965: << ((0x0600 & w) >> 9))); //スケールファクタ 18966: } else { //フルフォーマット 18967: XEiJ.mpuCycleCount += ((0x0003 & w) == 0 ? 1 : //インダイレクトなし 18968: 3); //インダイレクトあり 18969: t = (((0x0080 & w) != 0 ? 0 : //ベースレジスタなし 18970: t) + //ベースレジスタあり 18971: ((0x0020 & w) == 0 ? 0 : //ベースディスプレースメントなし 18972: (0x0010 & w) == 0 ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) : //ワードベースディスプレースメント 18973: mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS))); //ロングベースディスプレースメント 18974: x = ((0x0040 & w) != 0 ? 0 : //インデックスなし 18975: ((0x0800 & w) == 0 ? (short) XEiJ.regRn[w >> 12] : //ワードインデックス 18976: XEiJ.regRn[w >> 12]) //ロングインデックス 18977: << ((0x0600 & w) >> 9)); //スケールファクタ 18978: return m60Address = 18979: ((0x0003 & w) == 0 ? t + x : //インダイレクトなし 18980: (((0x0004 & w) == 0 ? mmuReadLongData (m60Address = t + x, XEiJ.regSRS) : //プリインデックス 18981: mmuReadLongData (m60Address = t, XEiJ.regSRS) + x) //ポストインデックス 18982: + ((0x0002 & w) == 0 ? 0 : //アウタディスプレースメントなし 18983: (0x0001 & w) == 0 ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) : //ワードアウタディスプレースメント 18984: mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS)))); //ロングアウタディスプレースメント 18985: } 18986: case 070: //(xxx).W 18987: return m60Address = mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); 18988: case 071: //(xxx).L 18989: return m60Address = mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS); 18990: case 074: 18991: Thread.dumpStack (); 18992: break; 18993: } //switch 18994: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 18995: throw M68kException.m6eSignal; 18996: } //efaMemExtd 18997: 18998: // 7777777766666666555555554444444433333333222222221111111100000000 mmm 18999: // 7654321076543210765432107654321076543210765432107654321076543210 rrr 19000: // ...IPPZZXXXXXXXXWWWWWWWW--------++++++++MMMMMMMMAAAAAAAADDDDDDDD 19001: static final long MEM_MASK = 0b0000111111111111111111111111111111111111111111110000000000000000L; //メモリモード 19002: static final long MLT_MASK = 0b0000001111111111111111111111111111111111111111110000000000000000L; //メモリ可変モード 19003: static final long CNT_MASK = 0b0000111111111111111111110000000000000000111111110000000000000000L; //制御モード 19004: static final long CLT_MASK = 0b0000001111111111111111110000000000000000111111110000000000000000L; //制御可変モード 19005: 19006: //a = efaMltByte (ea) 19007: //a = efaMltWord (ea) 19008: //a = efaMltLong (ea) 19009: //a = efaMltQuad (ea) 19010: //a = efaMltExtd (ea) 19011: // | M+-WXZ | 19012: // メモリ可変モードの実効アドレスを求める 19013: // メモリモードとの違いは(d16,PC)と(d8,PC,Rn.wl)がないこと 19014: public static int efaMltByte (int ea) throws M68kException { 19015: return efaMemByte ((MLT_MASK & (1L << ea)) == 0 ? 0 : ea); 19016: } //efaMltByte 19017: public static int efaMltWord (int ea) throws M68kException { 19018: return efaMemWord ((MLT_MASK & (1L << ea)) == 0 ? 0 : ea); 19019: } //efaMltWord 19020: public static int efaMltLong (int ea) throws M68kException { 19021: return efaMemLong ((MLT_MASK & (1L << ea)) == 0 ? 0 : ea); 19022: } //efaMltLong 19023: public static int efaMltQuad (int ea) throws M68kException { 19024: return efaMemQuad ((MLT_MASK & (1L << ea)) == 0 ? 0 : ea); 19025: } //efaMltQuad 19026: public static int efaMltExtd (int ea) throws M68kException { 19027: return efaMemExtd ((MLT_MASK & (1L << ea)) == 0 ? 0 : ea); 19028: } //efaMltExtd 19029: 19030: //a = efaCntByte (ea) 19031: //a = efaCntWord (ea) 19032: //a = efaCntLong (ea) 19033: //a = efaCntQuad (ea) 19034: //a = efaCntExtd (ea) 19035: // | M WXZP | 19036: // 制御モードの実効アドレスを求める 19037: // メモリモードとの違いは(Ar)+と-(Ar)がないこと 19038: public static int efaCntByte (int ea) throws M68kException { 19039: return efaMemByte ((CNT_MASK & (1L << ea)) == 0 ? 0 : ea); 19040: } //efaCntByte 19041: public static int efaCntWord (int ea) throws M68kException { 19042: return efaMemWord ((CNT_MASK & (1L << ea)) == 0 ? 0 : ea); 19043: } //efaCntWord 19044: public static int efaCntLong (int ea) throws M68kException { 19045: return efaMemLong ((CNT_MASK & (1L << ea)) == 0 ? 0 : ea); 19046: } //efaCntLong 19047: public static int efaCntQuad (int ea) throws M68kException { 19048: return efaMemQuad ((CNT_MASK & (1L << ea)) == 0 ? 0 : ea); 19049: } //efaCntQuad 19050: public static int efaCntExtd (int ea) throws M68kException { 19051: return efaMemExtd ((CNT_MASK & (1L << ea)) == 0 ? 0 : ea); 19052: } //efaCntExtd 19053: 19054: //a = efaCltByte (ea) 19055: //a = efaCltWord (ea) 19056: //a = efaCltLong (ea) 19057: //a = efaCltQuad (ea) 19058: //a = efaCltExtd (ea) 19059: // | M WXZ | 19060: // 制御可変モードの実効アドレスを求める 19061: // メモリモードとの違いは(Ar)+と-(Ar)と(d16,PC)と(d8,PC,Rn.wl)がないこと 19062: public static int efaCltByte (int ea) throws M68kException { 19063: return efaMemByte ((CLT_MASK & (1L << ea)) == 0 ? 0 : ea); 19064: } //efaCltByte 19065: public static int efaCltWord (int ea) throws M68kException { 19066: return efaMemWord ((CLT_MASK & (1L << ea)) == 0 ? 0 : ea); 19067: } //efaCltWord 19068: public static int efaCltLong (int ea) throws M68kException { 19069: return efaMemLong ((CLT_MASK & (1L << ea)) == 0 ? 0 : ea); 19070: } //efaCltLong 19071: public static int efaCltQuad (int ea) throws M68kException { 19072: return efaMemQuad ((CLT_MASK & (1L << ea)) == 0 ? 0 : ea); 19073: } //efaCltQuad 19074: public static int efaCltExtd (int ea) throws M68kException { 19075: return efaMemExtd ((CLT_MASK & (1L << ea)) == 0 ? 0 : ea); 19076: } //efaCltExtd 19077: 19078: //以下廃止予定 19079: // Any* → Mem* #<data>を分離できているか確認すること 19080: // LeaPea → Cnt* 19081: // JmpJsr → Cnt* 19082: public static int efaAnyByte (int ea) throws M68kException { 19083: return efaMemByte (ea); 19084: } //efaAnyByte 19085: public static int efaAnyWord (int ea) throws M68kException { 19086: return efaMemWord (ea); 19087: } //efaAnyWord 19088: public static int efaAnyLong (int ea) throws M68kException { 19089: return efaMemLong (ea); 19090: } //efaAnyLong 19091: public static int efaAnyQuad (int ea) throws M68kException { 19092: return efaMemQuad (ea); 19093: } //efaAnyQuad 19094: public static int efaAnyExtd (int ea) throws M68kException { 19095: return efaMemExtd (ea); 19096: } //efaAnyExtd 19097: public static int efaLeaPea (int ea) throws M68kException { 19098: return efaCntLong (ea); 19099: } //efaLeaPea 19100: public static int efaJmpJsr (int ea) throws M68kException { 19101: return efaCntLong (ea); 19102: } //efaJmpJsr 19103: 19104: 19105: 19106: //fpkSTOL () 19107: // $FE10 __STOL 19108: // 10進数の文字列を32bit符号あり整数に変換する 19109: // /^[ \t]*[-+]?[0-9]+/ 19110: // 先頭の'\t'と' 'を読み飛ばす 19111: // <a0.l:10進数の文字列の先頭 19112: // >d0.l:32bit符号あり整数 19113: // >a0.l:10進数の文字列の直後('\0'とは限らない) 19114: // >ccr:0=エラーなし,CCR_N|CCR_C=文法エラー,CCR_V|CCR_C=オーバーフロー 19115: public static void fpkSTOL () throws M68kException { 19116: int a = XEiJ.regRn[8]; //a0 19117: int c = mmuReadByteZeroData (a, 1); 19118: while (c == ' ' || c == '\t') { 19119: c = mmuReadByteZeroData (++a, 1); 19120: } 19121: int n = '7'; //'7'=正,'8'=負 19122: if (c == '-') { //負 19123: n = '8'; 19124: c = mmuReadByteZeroData (++a, 1); 19125: } else if (c == '+') { //正 19126: c = mmuReadByteZeroData (++a, 1); 19127: } 19128: if (!('0' <= c && c <= '9')) { //数字が1つもない 19129: XEiJ.regRn[8] = a; //a0 19130: XEiJ.regCCR = XEiJ.REG_CCR_N | XEiJ.REG_CCR_C; 19131: return; 19132: } 19133: int x = c - '0'; //値 19134: for (c = mmuReadByteZeroData (++a, 1); '0' <= c && c <= '9'; c = mmuReadByteZeroData (++a, 1)) { 19135: if (214748364 < x || x == 214748364 && n < c) { //正のとき2147483647、負のとき2147483648より大きくなるときオーバーフロー 19136: XEiJ.regRn[8] = a; //a0 19137: XEiJ.regCCR = XEiJ.REG_CCR_V | XEiJ.REG_CCR_C; 19138: return; 19139: } 19140: x = x * 10 + (c - '0'); 19141: } 19142: if (n != '7') { //負 19143: x = -x; 19144: } 19145: XEiJ.regRn[0] = x; //d0 19146: XEiJ.regRn[8] = a; //a0 19147: XEiJ.regCCR = 0; 19148: } //fpkSTOL() 19149: 19150: //fpkLTOS () 19151: // $FE11 __LTOS 19152: // 32bit符号あり整数を10進数の文字列に変換する 19153: // /^-?[1-9][0-9]*$/ 19154: // <d0.l:32bit符号あり整数 19155: // <a0.l:文字列バッファの先頭 19156: // >a0.l:10進数の文字列の直後('\0'の位置) 19157: public static void fpkLTOS () throws M68kException { 19158: int x = XEiJ.regRn[0]; //d0 19159: int a = XEiJ.regRn[8]; //a0 19160: if (x < 0) { //負 19161: mmuWriteByteData (a++, '-', 1); 19162: x = -x; 19163: } 19164: long t = XEiJ.fmtBcd12 (0xffffffffL & x); //符号は取り除いてあるがx=0x80000000の場合があるので(long)xは不可 19165: XEiJ.regRn[8] = a += Math.max (1, 67 - Long.numberOfLeadingZeros (t) >> 2); //a0 19166: mmuWriteByteData (a, 0, 1); 19167: do { 19168: mmuWriteByteData (--a, '0' | (int) t & 15, 1); 19169: } while ((t >>>= 4) != 0L); 19170: } //fpkLTOS() 19171: 19172: //fpkSTOH () 19173: // $FE12 __STOH 19174: // 16進数の文字列を32bit符号なし整数に変換する 19175: // /^[0-9A-Fa-f]+/ 19176: // <a0.l:16進数の文字列の先頭 19177: // >d0.l:32bit符号なし整数 19178: // >a0.l:16進数の文字列の直後('\0'とは限らない) 19179: // >ccr:0=エラーなし,CCR_N|CCR_C=文法エラー,CCR_V|CCR_C=オーバーフロー 19180: public static void fpkSTOH () throws M68kException { 19181: int a = XEiJ.regRn[8]; //a0 19182: int c = mmuReadByteZeroData (a, 1); 19183: if (!('0' <= c && c <= '9' || 'A' <= c && c <= 'F' || 'a' <= c && c <= 'f')) { //数字が1つもない 19184: XEiJ.regRn[8] = a; //a0 19185: XEiJ.regCCR = XEiJ.REG_CCR_N | XEiJ.REG_CCR_C; 19186: return; 19187: } 19188: int x = c <= '9' ? c - '0' : c <= 'F' ? c - ('A' - 10) : c - ('a' - 10); //値 19189: for (c = mmuReadByteZeroData (++a, 1); '0' <= c && c <= '9' || 'A' <= c && c <= 'F' || 'a' <= c && c <= 'f'; c = mmuReadByteZeroData (++a, 1)) { 19190: if (0x0fffffff < x) { //0xffffffffより大きくなるときオーバーフロー 19191: XEiJ.regRn[8] = a; //a0 19192: XEiJ.regCCR = XEiJ.REG_CCR_V | XEiJ.REG_CCR_C; 19193: return; 19194: } 19195: x = x << 4 | (c <= '9' ? c - '0' : c <= 'F' ? c - ('A' - 10) : c - ('a' - 10)); 19196: } 19197: XEiJ.regRn[0] = x; //d0 19198: XEiJ.regRn[8] = a; //a0 19199: XEiJ.regCCR = 0; 19200: } //fpkSTOH() 19201: 19202: //fpkHTOS () 19203: // $FE13 __HTOS 19204: // 32bit符号なし整数を16進数の文字列に変換する 19205: // /^[1-9A-F][0-9A-F]*$/ 19206: // <d0.l:32bit符号なし整数 19207: // <a0.l:文字列バッファの先頭 19208: // >a0.l:16進数の文字列の直後('\0'の位置) 19209: public static void fpkHTOS () throws M68kException { 19210: int x = XEiJ.regRn[0]; //d0 19211: int a = XEiJ.regRn[8] += Math.max (1, 35 - Integer.numberOfLeadingZeros (x) >> 2); //a0 19212: mmuWriteByteData (a, 0, 1); 19213: do { 19214: int t = x & 15; 19215: // t 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 19216: // 9-t 09 08 07 06 05 04 03 02 01 00 ff fe fd fc fb fa 19217: // 9-t>>4 00 00 00 00 00 00 00 00 00 00 ff ff ff ff ff ff 19218: // 9-t>>4&7 00 00 00 00 00 00 00 00 00 00 07 07 07 07 07 07 19219: // 9-t>>4&7|48 30 30 30 30 30 30 30 30 30 30 37 37 37 37 37 37 19220: // (9-t>>4&7|48)+t 30 31 32 33 34 35 36 37 38 39 41 42 43 44 45 46 19221: // 0 1 2 3 4 5 6 7 8 9 A B C D E F 19222: mmuWriteByteData (--a, (9 - t >> 4 & 7 | 48) + t, 1); 19223: } while ((x >>>= 4) != 0); 19224: } //fpkHTOS() 19225: 19226: //fpkSTOO () 19227: // $FE14 __STOO 19228: // 8進数の文字列を32bit符号なし整数に変換する 19229: // /^[0-7]+/ 19230: // <a0.l:8進数の文字列の先頭 19231: // >d0.l:32bit符号なし整数 19232: // >a0.l:8進数の文字列の直後('\0'とは限らない) 19233: // >ccr:0=エラーなし,CCR_N|CCR_C=文法エラー,CCR_V|CCR_C=オーバーフロー 19234: public static void fpkSTOO () throws M68kException { 19235: int a = XEiJ.regRn[8]; //a0 19236: int c = mmuReadByteZeroData (a, 1); 19237: if (!('0' <= c && c <= '7')) { //数字が1つもない 19238: XEiJ.regRn[8] = a; //a0 19239: XEiJ.regCCR = XEiJ.REG_CCR_N | XEiJ.REG_CCR_C; 19240: return; 19241: } 19242: int x = c - '0'; //値 19243: for (c = mmuReadByteZeroData (++a, 1); '0' <= c && c <= '7'; c = mmuReadByteZeroData (++a, 1)) { 19244: if (0x1fffffff < x) { //0xffffffffより大きくなるときオーバーフロー 19245: XEiJ.regRn[8] = a; //a0 19246: XEiJ.regCCR = XEiJ.REG_CCR_V | XEiJ.REG_CCR_C; 19247: return; 19248: } 19249: x = x << 3 | c & 7; 19250: } 19251: XEiJ.regRn[0] = x; //d0 19252: XEiJ.regRn[8] = a; //a0 19253: XEiJ.regCCR = 0; 19254: } //fpkSTOO() 19255: 19256: //fpkOTOS () 19257: // $FE15 __OTOS 19258: // 32bit符号なし整数を8進数の文字列に変換する 19259: // /^[1-7][0-7]*$/ 19260: // <d0.l:32bit符号なし整数 19261: // <a0.l:文字列バッファの先頭 19262: // >a0.l:8進数の文字列の直後('\0'の位置) 19263: public static void fpkOTOS () throws M68kException { 19264: int x = XEiJ.regRn[0]; //d0 19265: //perl optdiv.pl 34 3 19266: // x/3==x*43>>>7 (0<=x<=127) [34*43==1462] 19267: int a = XEiJ.regRn[8] += Math.max (1, (34 - Integer.numberOfLeadingZeros (x)) * 43 >>> 7); //a0 19268: mmuWriteByteData (a, 0, 1); 19269: do { 19270: mmuWriteByteData (--a, '0' | x & 7, 1); 19271: } while ((x >>>= 3) != 0); 19272: } //fpkOTOS() 19273: 19274: //fpkSTOB () 19275: // $FE16 __STOB 19276: // 2進数の文字列を32bit符号なし整数に変換する 19277: // /^[01]+/ 19278: // <a0.l:2進数の文字列の先頭 19279: // >d0.l:32bit符号なし整数 19280: // >a0.l:2進数の文字列の直後('\0'とは限らない) 19281: // >ccr:0=エラーなし,CCR_N|CCR_C=文法エラー,CCR_V|CCR_C=オーバーフロー 19282: public static void fpkSTOB () throws M68kException { 19283: int a = XEiJ.regRn[8]; //a0 19284: int c = mmuReadByteZeroData (a, 1); 19285: if (!('0' <= c && c <= '1')) { //数字が1つもない 19286: XEiJ.regRn[8] = a; //a0 19287: XEiJ.regCCR = XEiJ.REG_CCR_N | XEiJ.REG_CCR_C; 19288: return; 19289: } 19290: int x = c - '0'; //値 19291: for (c = mmuReadByteZeroData (++a, 1); '0' <= c && c <= '1'; c = mmuReadByteZeroData (++a, 1)) { 19292: if (x < 0) { //オーバーフロー 19293: XEiJ.regRn[8] = a; //a0 19294: XEiJ.regCCR = XEiJ.REG_CCR_V | XEiJ.REG_CCR_C; 19295: return; 19296: } 19297: x = x << 1 | c & 1; 19298: } 19299: XEiJ.regRn[0] = x; //d0 19300: XEiJ.regRn[8] = a; //a0 19301: XEiJ.regCCR = 0; 19302: } //fpkSTOB() 19303: 19304: //fpkBTOS () 19305: // $FE17 __BTOS 19306: // 32bit符号なし整数を2進数の文字列に変換する 19307: // /^1[01]*$/ 19308: // <d0.l:32bit符号なし整数 19309: // <a0.l:文字列バッファの先頭 19310: // >a0.l:2進数の文字列の直後('\0'の位置) 19311: public static void fpkBTOS () throws M68kException { 19312: int x = XEiJ.regRn[0]; //d0 19313: int a = XEiJ.regRn[8] += Math.max (1, 32 - Integer.numberOfLeadingZeros (x)); //a0 19314: mmuWriteByteData (a, 0, 1); 19315: do { 19316: mmuWriteByteData (--a, '0' | x & 1, 1); 19317: } while ((x >>>= 1) != 0); 19318: } //fpkBTOS() 19319: 19320: //fpkIUSING () 19321: // $FE18 __IUSING 19322: // 32bit符号あり整数を文字数を指定して右詰めで10進数の文字列に変換する 19323: // /^ *-?[1-9][0-9]*$/ 19324: // <d0.l:32bit符号あり整数 19325: // <d1.b:文字数 19326: // <a0.l:文字列バッファの先頭 19327: // >a0.l:10進数の文字列の直後('\0'の位置) 19328: public static void fpkIUSING () throws M68kException { 19329: int x = XEiJ.regRn[0]; //d0 19330: int n = 0; //符号の文字数 19331: if (x < 0) { //負 19332: n = 1; 19333: x = -x; 19334: } 19335: long t = XEiJ.fmtBcd12 (0xffffffffL & x); //符号は取り除いてあるがx=0x80000000の場合があるので(long)xは不可 19336: int l = n + Math.max (1, 67 - Long.numberOfLeadingZeros (t) >> 2); //符号を含めた文字数 19337: int a = XEiJ.regRn[8]; //a0 19338: for (int i = (XEiJ.regRn[1] & 255) - l; i > 0; i--) { 19339: mmuWriteByteData (a++, ' ', 1); 19340: } 19341: XEiJ.regRn[8] = a += l; //a0 19342: mmuWriteByteData (a, 0, 1); 19343: do { 19344: mmuWriteByteData (--a, '0' | (int) t & 15, 1); 19345: } while ((t >>>= 4) != 0L); 19346: if (n != 0) { 19347: mmuWriteByteData (--a, '-', 1); 19348: } 19349: } //fpkIUSING() 19350: 19351: //fpkVAL () 19352: // $FE20 __VAL 19353: // 文字列を64bit浮動小数点数に変換する 19354: // 先頭の'\t'と' 'を読み飛ばす 19355: // "&B"または"&b"で始まっているときは続きを2進数とみなして__STOBで32bit符号なし整数に変換してから__LTODで64bit浮動小数点数に変換する 19356: // "&O"または"&o"で始まっているときは続きを8進数とみなして__STOOで32bit符号なし整数に変換してから__LTODで64bit浮動小数点数に変換する 19357: // "&H"または"&h"で始まっているときは続きを16進数とみなして__STOHで32bit符号なし整数に変換してから__LTODで64bit浮動小数点数に変換する 19358: // それ以外は__STODと同じ 19359: // <a0.l:文字列の先頭 19360: // >d0d1.d:64bit浮動小数点数 19361: // >d2.l:(先頭が'&'でないとき)65535=64bit浮動小数点数をオーバーフローなしでintに変換できる,0=それ以外 19362: // >d3.l:(先頭が'&'でないとき)d2.l==65535のとき64bit浮動小数点数をintに変換した値 19363: // >a0.l:変換された文字列の直後('\0'とは限らない) 19364: // >ccr:0=エラーなし,CCR_N|CCR_C=文法エラー,CCR_V|CCR_C=オーバーフロー 19365: public static void fpkVAL () throws M68kException { 19366: int a = XEiJ.regRn[8]; //a0 19367: //先頭の空白を読み飛ばす 19368: int c = mmuReadByteSignData (a++, 1); 19369: while (c == ' ' || c == '\t') { 19370: c = mmuReadByteSignData (a++, 1); 19371: } 19372: if (c == '&') { //&B,&O,&H 19373: c = mmuReadByteSignData (a++, 1) & 0xdf; 19374: XEiJ.regRn[8] = a; //&?の直後 19375: if (c == 'B') { 19376: fpkSTOB (); 19377: FEFunction.fpkLTOD (); 19378: } else if (c == 'O') { 19379: fpkSTOO (); 19380: FEFunction.fpkLTOD (); 19381: } else if (c == 'H') { 19382: fpkSTOH (); 19383: FEFunction.fpkLTOD (); 19384: } else { 19385: XEiJ.regCCR = XEiJ.REG_CCR_N | XEiJ.REG_CCR_C; //文法エラー 19386: } 19387: } else { //&B,&O,&H以外 19388: fpkSTOD (); 19389: } 19390: } //fpkVAL() 19391: 19392: //fpkUSING () 19393: // $FE21 __USING 19394: // 64bit浮動小数点数をアトリビュートを指定して文字列に変換する 19395: // メモ 19396: // bit1の'\\'とbit4の'+'を両方指定したときは'\\'が右側。先頭に"+\\"を付ける 19397: // bit1の'\\'とbit2の','とbit4の'+'は整数部の桁数が足りないとき数字を右にずらして押し込まれる 19398: // bit3で指数形式を指示しなければ指数部が極端に大きくても極端に小さくても指数形式にならない 19399: // bit3で指数形式を指定したときbit1の'\\'とbit2の','は無効 19400: // bit4とbit5とbit6はbit4>bit5>bit6の順位で1つだけ有効 19401: // 有効数字は14桁で15桁目以降はすべて0 19402: // FLOAT2.Xは整数部の0でない最初の数字から256文字目までで打ち切られてしまう 19403: // 整数部の桁数に余裕があれば左側の空白は出力されるので文字列の全体が常に256バイトに収まるわけではない 19404: // using 1234.5 5 0 0 " 1235." 19405: // using 1234.5 5 1 0 " 1234.5" 19406: // using 1234.5 5 2 0 " 1234.50" 19407: // using 1234.5 6 2 1 "**1234.50" 19408: // using 1234.5 6 2 2 " \\1234.50" 19409: // using 1234.5 6 2 3 "*\\1234.50" 19410: // using 1234.5 6 2 4 " 1,234.50" 19411: // using 1234.5 4 2 4 "1,234.50" 19412: // using 1234.5 4 2 5 "1,234.50" 19413: // using 1234.5 4 2 6 "\\1,234.50" 19414: // using 1234.5 4 2 7 "\\1,234.50" 19415: // using 1234.5 4 2 16 "+1234.50" 19416: // using 1234.5 4 2 22 "+\\1,234.50" 19417: // using 1234.5 4 2 32 "1234.50+" 19418: // using 1234.5 4 2 48 "+1234.50" 19419: // using 1234.5 4 2 64 "1234.50 " 19420: // using 1234.5 4 2 80 "+1234.50" 19421: // using 1234.5 4 2 96 "1234.50+" 19422: // using 12345678901234567890 10 1 0 "12345678901235000000.0" 19423: // using 12345678901234567890e+10 10 1 0 "123456789012350000000000000000.0" 19424: // using 0.3333 0 0 0 "." 19425: // using 0.6666 0 0 0 "1." 19426: // using 0.6666 0 3 0 ".667" 19427: // using 0.6666 3 0 0 " 1." 19428: // using 0.3333 0 0 2 "\\." 19429: // using 0.3333 0 0 16 "+." 19430: // using 0.3333 0 0 18 "+\\." 19431: // using 1e-10 3 3 0 " 0.000" 19432: // 指数形式の出力は不可解で本来の動作ではないように思えるが、 19433: // X-BASICのprint using命令が使っているのでFLOAT2.Xに合わせておいた方がよさそう 19434: // print using "###.##";1.23 " 1.23" 整数部の桁数は3 19435: // print using "+##.##";1.23 " +1.23" 整数部の桁数は3← 19436: // print using "###.##^^^^^";1.23 " 12.30E-001" 整数部の桁数は3 19437: // print using "+##.##^^^^^";1.23 "+12.30E-001" 整数部の桁数は2← 19438: // FLOAT2.Xでは#NANと#INFは4桁の整数のように出力される。末尾に小数点が付くが小数部には何も出力されない 19439: // using -#INF 7 3 23 "*-\\#,INF." 19440: // FLOAT2.Xで#NANと#INFを指数形式にするとさらに不可解。これはバグと言ってよいと思う 19441: // using #INF 10 10 8 " #INFE-005" 19442: // ここでは#NANと#INFは整数部と小数点と小数部と指数部の全体を使って右寄せにする 19443: // <d0d1.d:64bit浮動小数点数 19444: // <d2.l:整数部の桁数 19445: // <d3.l:小数部の桁数 19446: // <d4.l:アトリビュート 19447: // bit0 左側を'*'で埋める 19448: // bit1 先頭に'\\'を付ける 19449: // bit2 整数部を3桁毎に','で区切る 19450: // bit3 指数形式 19451: // bit4 先頭に符号('+'または'-')を付ける 19452: // bit5 末尾に符号('+'または'-')を付ける 19453: // bit6 末尾に符号(' 'または'-')を付ける 19454: // <a0.l:文字列バッファの先頭 19455: // a0は変化しない 19456: public static void fpkUSING () throws M68kException { 19457: fpkUSINGSub ((long) XEiJ.regRn[0] << 32 | 0xffffffffL & XEiJ.regRn[1]); //64bit浮動小数点数 19458: } //fpkUSING() 19459: public static void fpkUSINGSub (long l) throws M68kException { 19460: int len1 = Math.max (0, XEiJ.regRn[2]); //整数部の桁数 19461: int len2 = Math.max (0, XEiJ.regRn[3]); //小数部の桁数 19462: int attr = XEiJ.regRn[4]; //アトリビュート 19463: int a = XEiJ.regRn[8]; //文字列バッファの先頭 19464: boolean exp = (attr & 8) != 0; //true=指数形式 19465: int spc = (attr & 1) != 0 ? '*' : ' '; //先頭の空白を充填する文字 19466: int yen = (attr & 2) != 0 ? '\\' : 0; //先頭の'\\' 19467: int cmm = !exp && (attr & 4) != 0 ? ',' : 0; //3桁毎に入れる',' 19468: //符号 19469: int sgn1 = 0; //先頭の符号 19470: int sgn2 = 0; //末尾の符号 19471: if (l < 0L) { //負 19472: if ((attr & 32 + 64) == 0) { //末尾に符号を付けない 19473: sgn1 = '-'; //先頭の符号 19474: } else { //末尾に符号を付ける 19475: sgn2 = '-'; //末尾の符号 19476: } 19477: l &= 0x7fffffffffffffffL; //符号bitを消しておく 19478: } else { //正 19479: if ((attr & 16) != 0) { //先頭に符号('+'または'-')を付ける 19480: sgn1 = '+'; 19481: } else if ((attr & 16 + 32) == 32) { //末尾に符号('+'または'-')を付ける 19482: sgn2 = '+'; 19483: } else if ((attr & 16 + 32 + 64) == 64) { //末尾に符号(' 'または'-')を付ける 19484: sgn2 = ' '; 19485: } 19486: } 19487: double x = Double.longBitsToDouble (l); //絶対値 19488: int e = (int) (l >>> 52) - 1023; //指数部。ゲタ0。符号bitは消してあるのでマスクは不要 19489: l &= 0x000fffffffffffffL; //仮数部の小数部。正規化数のとき整数部の1が付いていないことに注意 19490: //±0,±Inf,NaN 19491: if (e == -1023) { //±0,非正規化数 19492: if (l == 0L) { //±0 19493: for (int i = len1 - ((sgn1 != 0 ? 1 : 0) + //先頭の符号 19494: (yen != 0 ? 1 : 0) + //'\\' 19495: 1 //数字 19496: ); 0 < i; i--) { 19497: mmuWriteByteData (a++, spc, 1); //空白 19498: } 19499: if (sgn1 != 0) { 19500: mmuWriteByteData (a++, sgn1, 1); //先頭の符号 19501: } 19502: if (yen != 0) { 19503: mmuWriteByteData (a++, yen, 1); //'\\' 19504: } 19505: if (0 < len1) { 19506: mmuWriteByteData (a++, '0', 1); //整数部 19507: } 19508: mmuWriteByteData (a++, '.', 1); //小数点 19509: for (; 0 < len2; len2--) { 19510: mmuWriteByteData (a++, '0', 1); //小数部 19511: } 19512: mmuWriteByteData (a, '\0', 1); 19513: return; 19514: } 19515: e -= Long.numberOfLeadingZeros (l) - 12; //非正規化数の指数部を補正する 19516: } else if (e == 1024) { //±Inf,NaN 19517: for (int i = len1 + 1 + len2 + (exp ? 5 : 0) - //整数部と小数点と小数部と指数部の全体を使って右寄せにする 19518: ((sgn1 != 0 ? 1 : 0) + //先頭の符号 19519: (yen != 0 ? 1 : 0) + //'\\' 19520: 4 //文字 19521: ); 0 < i; i--) { 19522: mmuWriteByteData (a++, spc, 1); //空白 19523: } 19524: if (sgn1 != 0) { 19525: mmuWriteByteData (a++, sgn1, 1); //先頭の符号 19526: } 19527: if (yen != 0) { 19528: mmuWriteByteData (a++, yen, 1); //'\\' 19529: } 19530: mmuWriteByteData (a++, '#', 1); 19531: if (l == 0L) { //±Inf 19532: mmuWriteByteData (a++, 'I', 1); 19533: mmuWriteByteData (a++, 'N', 1); 19534: mmuWriteByteData (a++, 'F', 1); 19535: } else { //NaN 19536: mmuWriteByteData (a++, 'N', 1); 19537: mmuWriteByteData (a++, 'A', 1); 19538: mmuWriteByteData (a++, 'N', 1); 19539: } 19540: mmuWriteByteData (a, '\0', 1); 19541: return; 19542: } 19543: //10進数で表現したときの指数部を求める 19544: // 10^e<=x<10^(e+1)となるeを求める 19545: e = (int) Math.floor ((double) e * 0.30102999566398119521373889472); //log10(2) 19546: //10^-eを掛けて1<=x<10にする 19547: // 非正規化数の最小値から正規化数の最大値まで処理できなければならない 19548: // 10^-eを計算してからまとめて掛ける方法はxが非正規化数のとき10^-eがオーバーフローしてしまうので不可 19549: // doubleは非正規化数の逆数を表現できない 19550: if (0 < e) { //10<=x 19551: x *= FEFunction.FPK_TEN_M16QR[e & 15]; 19552: if (16 <= e) { 19553: x *= FEFunction.FPK_TEN_M16QR[16 + (e >> 4 & 15)]; 19554: if (256 <= e) { 19555: x *= FEFunction.FPK_TEN_M16QR[33]; //FEFunction.FPK_TEN_M16QR[32 + (e >> 8)] 19556: } 19557: } 19558: } else if (e < 0) { //x<1 19559: x *= FEFunction.FPK_TEN_P16QR[-e & 15]; 19560: if (e <= -16) { 19561: x *= FEFunction.FPK_TEN_P16QR[16 + (-e >> 4 & 15)]; 19562: if (e <= -256) { 19563: x *= FEFunction.FPK_TEN_P16QR[33]; //FEFunction.FPK_TEN_P16QR[32 + (-e >> 8)] 19564: } 19565: } 19566: } 19567: //整数部2桁、小数部16桁の10進数に変換する 19568: // 1<=x<10なのでw[1]が先頭になるはずだが誤差で前後にずれる可能性がある 19569: int[] w = new int[18]; 19570: { 19571: int d = (int) x; 19572: int t = XEiJ.FMT_BCD4[d]; 19573: w[0] = t >> 4; 19574: w[1] = t & 15; 19575: for (int i = 2; i < 18; i += 4) { 19576: //xを10000倍して整数部dを引くことで小数部を残すが、このとき情報落ちが発生して誤差が蓄積する 19577: //Double-Doubleの乗算の要領で10000倍を正確に行い、誤差の蓄積を回避する 19578: //x = (x - (double) d) * 10000.0; 19579: double xh = x * 0x8000001p0; 19580: xh += x - xh; //xの上半分 19581: x = (xh - (double) d) * 10000.0 + (x - xh) * 10000.0; 19582: d = (int) x; 19583: t = XEiJ.FMT_BCD4[d]; 19584: w[i ] = t >> 12; 19585: w[i + 1] = t >> 8 & 15; 19586: w[i + 2] = t >> 4 & 15; 19587: w[i + 3] = t & 15; 19588: } 19589: } 19590: //先頭の位置を確認する 19591: // w[h]が先頭(0でない最初の数字)の位置 19592: int h = w[0] != 0 ? 0 : w[1] != 0 ? 1 : 2; 19593: //14+1桁目を四捨五入する 19594: int o = h + 14; //w[o]は四捨五入する桁の位置。w[]の範囲内 19595: if (5 <= w[o]) { 19596: int i = o; 19597: while (10 <= ++w[--i]) { 19598: w[i] = 0; 19599: } 19600: if (i < h) { //先頭から繰り上がった。このとき新しい先頭は1でそれ以外はすべて0 19601: h--; //先頭を左にずらす 19602: o--; //末尾を左にずらす 19603: } 19604: } 19605: //先頭の位置に応じて指数部を更新する 19606: // w[h]が整数部、w[h+1..13]が小数部。10^eの小数点はw[h]の右側。整数部の桁数はe+1桁 19607: e -= h - 1; 19608: //整数部の桁数を調節する 19609: int ee = !exp ? e : Math.max (0, sgn1 != 0 || sgn2 != 0 ? len1 : len1 - 1) - 1; //整数部の桁数-1。整数部の桁数はee+1桁。指数部はe-ee 19610: //小数点以下len2+1桁目が先頭から14+1桁目よりも左側にあるときその桁で改めて四捨五入する 19611: // あらかじめ14+1桁目で四捨五入しておかないと、 19612: // 1.5の5を四捨五入しなければならないときに誤差で1.499…になったまま4を四捨五入しようとして失敗することがある 19613: int s = h + ee + 1 + len2; //w[s]は小数点以下len2+1桁目の位置。w.length<=sの場合があることに注意 19614: if (s < o) { 19615: o = s; //w[o]は四捨五入する桁の位置。o<0の場合があることに注意 19616: if (0 <= o && 5 <= w[o]) { 19617: int i = o; 19618: while (10 <= ++w[--i]) { 19619: w[i] = 0; 19620: } 19621: if (i < h) { //先頭から繰り上がった。このとき新しい先頭は1でそれ以外はすべて0 19622: h--; //先頭を左にずらす 19623: if (!exp) { //指数形式でないとき 19624: ee++; //左に1桁伸ばす。全体の桁数が1桁増える 19625: } else { //指数形式のとき 19626: e++; //指数部を1増やす 19627: o--; //末尾を左にずらす。全体の桁数は変わらない 19628: } 19629: } 19630: } 19631: } 19632: //文字列に変換する 19633: if (0 <= ee) { //1<=x 19634: for (int i = len1 - ((sgn1 != 0 ? 1 : 0) + //先頭の符号 19635: (yen != 0 ? 1 : 0) + //'\\' 19636: (cmm != 0 ? ee / 3 : 0) + //',' 19637: ee + 1 //数字 19638: ); 0 < i; i--) { 19639: mmuWriteByteData (a++, spc, 1); //空白 19640: } 19641: if (sgn1 != 0) { 19642: mmuWriteByteData (a++, sgn1, 1); //先頭の符号 19643: } 19644: if (yen != 0) { 19645: mmuWriteByteData (a++, yen, 1); //'\\' 19646: } 19647: for (int i = ee; 0 <= i; i--) { 19648: mmuWriteByteData (a++, h < o ? '0' + w[h] : '0', 1); //整数部 19649: h++; 19650: if (cmm != 0 && 0 < i && i % 3 == 0) { 19651: mmuWriteByteData (a++, cmm, 1); //',' 19652: } 19653: } 19654: mmuWriteByteData (a++, '.', 1); //小数点 19655: for (; 0 < len2; len2--) { 19656: mmuWriteByteData (a++, h < o ? '0' + w[h] : '0', 1); //小数部 19657: h++; 19658: } 19659: } else { //x<1 19660: for (int i = len1 - ((sgn1 != 0 ? 1 : 0) + //先頭の符号 19661: (yen != 0 ? 1 : 0) + //'\\' 19662: 1 //数字 19663: ); 0 < i; i--) { 19664: mmuWriteByteData (a++, spc, 1); //空白 19665: } 19666: if (sgn1 != 0) { 19667: mmuWriteByteData (a++, sgn1, 1); //先頭の符号 19668: } 19669: if (yen != 0) { 19670: mmuWriteByteData (a++, yen, 1); //'\\' 19671: } 19672: if (0 < len1) { 19673: mmuWriteByteData (a++, '0', 1); //整数部 19674: } 19675: mmuWriteByteData (a++, '.', 1); //小数点 19676: for (int i = -1 - ee; 0 < len2 && 0 < i; len2--, i--) { 19677: mmuWriteByteData (a++, '0', 1); //小数部の先頭の0の並び 19678: } 19679: for (; 0 < len2; len2--) { 19680: mmuWriteByteData (a++, h < o ? '0' + w[h] : '0', 1); //小数部 19681: h++; 19682: } 19683: } 19684: if (exp) { 19685: e -= ee; 19686: mmuWriteByteData (a++, 'E', 1); //指数部の始まり 19687: if (0 <= e) { 19688: mmuWriteByteData (a++, '+', 1); //指数部の正符号。省略しない 19689: } else { 19690: mmuWriteByteData (a++, '-', 1); //指数部の負符号 19691: e = -e; 19692: } 19693: e = XEiJ.FMT_BCD4[e]; 19694: mmuWriteByteData (a++, '0' + (e >> 8 ), 1); //指数部の100の位。0でも省略しない 19695: mmuWriteByteData (a++, '0' + (e >> 4 & 15), 1); //指数部の10の位 19696: mmuWriteByteData (a++, '0' + (e & 15), 1); //指数部の1の位 19697: } 19698: if (sgn2 != 0) { 19699: mmuWriteByteData (a++, sgn2, 1); //末尾の符号 19700: } 19701: mmuWriteByteData (a, '\0', 1); 19702: } //fpkUSINGSub6(long) 19703: 19704: //fpkSTOD () 19705: // $FE22 __STOD 19706: // 文字列を64bit浮動小数点数に変換する 19707: // 先頭の'\t'と' 'を読み飛ばす 19708: // "#INF"は無限大、"#NAN"は非数とみなす 19709: // バグ 19710: // FLOAT2.X 2.02/2.03は誤差が大きい 19711: // "1.7976931348623E+308"=0x7fefffffffffffb0が0x7fefffffffffffb3になる 19712: // "1.5707963267949"=0x3ff921fb54442d28が0x3ff921fb54442d26になる 19713: // "4.9406564584125E-324"(非正規化数の最小値よりもわずかに大きい)がエラーになる 19714: // FLOAT2.X 2.02/2.03は"-0"が+0になる 19715: // FLOAT4.X 1.02は"-0"が+0になる(実機で確認済み) 19716: // FLOAT2.X 2.02/2.03は"-#INF"が+Infになる 19717: // print val("-#INF")で再現できる 19718: // '-'を符号として解釈しておきながら結果の無限大に符号を付けるのを忘れている 19719: // FLOAT2.X 2.02/2.03は".#INF"が+Infになる 19720: // print val(".#INF")で再現できる 19721: // FLOAT4.X 1.02は"#NAN","#INF","-#INF"を読み取ったときa0が文字列の直後ではなく最後の文字を指している 19722: // <a0.l:文字列の先頭 19723: // >d0d1.d:64bit浮動小数点数 19724: // >d2.l:65535=64bit浮動小数点数をオーバーフローなしでintに変換できる,0=それ以外 19725: // >d3.l:d2.l==65535のとき64bit浮動小数点数をintに変換した値 19726: // >a0.l:変換された文字列の直後('\0'とは限らない) 19727: // >ccr:0=エラーなし,CCR_N|CCR_C=文法エラー,CCR_V|CCR_C=オーバーフロー 19728: public static void fpkSTOD () throws M68kException { 19729: long l = Double.doubleToLongBits (fpkSTODSub ()); 19730: if (FEFunction.FPK_FPCP_NAN && l == 0x7ff8000000000000L) { 19731: l = 0x7fffffffffffffffL; 19732: } 19733: XEiJ.regRn[0] = (int) (l >> 32); //d0 19734: XEiJ.regRn[1] = (int) l; //d1 19735: } //fpkSTOD() 19736: public static double fpkSTODSub () throws M68kException { 19737: int a = XEiJ.regRn[8]; //a0 19738: //先頭の空白を読み飛ばす 19739: int c = mmuReadByteSignData (a, 1); 19740: while (c == ' ' || c == '\t') { 19741: c = mmuReadByteSignData (++a, 1); 19742: } 19743: //符号を読み取る 19744: double s = 1.0; //仮数部の符号 19745: if (c == '+') { 19746: c = mmuReadByteSignData (++a, 1); 19747: } else if (c == '-') { 19748: s = -s; 19749: c = mmuReadByteSignData (++a, 1); 19750: } 19751: //#NANと#INFを処理する 19752: if (c == '#') { 19753: c = mmuReadByteSignData (a + 1, 1); 19754: if (c == 'N' || c == 'I') { //小文字は不可 19755: c = c << 8 | mmuReadByteZeroData (a + 2, 1); 19756: if (c == ('N' << 8 | 'A') || c == ('I' << 8 | 'N')) { 19757: c = c << 8 | mmuReadByteZeroData (a + 3, 1); 19758: if (c == ('N' << 16 | 'A' << 8 | 'N') || c == ('I' << 16 | 'N' << 8 | 'F')) { 19759: XEiJ.regRn[2] = 0; //d2 19760: XEiJ.regRn[3] = 0; //d3 19761: XEiJ.regRn[8] = a + 4; //a0。"#NAN"または"#INF"のときだけ直後まで進める。それ以外は'#'の位置で止める 19762: XEiJ.regCCR = 0; //エラーなし。"#INF"はオーバーフローとみなされない 19763: return c == ('N' << 16 | 'A' << 8 | 'N') ? Double.NaN : s * Double.POSITIVE_INFINITY; 19764: } 19765: } 19766: } 19767: XEiJ.regRn[8] = a; //a0。'#'の位置で止める 19768: XEiJ.regCCR = XEiJ.REG_CCR_N | XEiJ.REG_CCR_C; //文法エラー 19769: return 0.0; 19770: } //if c=='#' 19771: //仮数部を読み取る 19772: // 数字を1000個並べてからe-1000などと書いてあるとき途中でオーバーフローすると困るので、 19773: // 多すぎる数字の並びは先頭の有効数字だけ読み取って残りは桁数だけ数えて読み飛ばす 19774: long u = 0L; //仮数部 19775: int n = 0; //0以外の最初の数字から数えて何桁目か 19776: int e = 1; //-小数部の桁数。1=整数部 19777: if (c == '.') { //仮数部の先頭が小数点 19778: e = 0; //小数部開始 19779: c = mmuReadByteSignData (++a, 1); 19780: } 19781: if (c < '0' || '9' < c) { //仮数部に数字がない 19782: XEiJ.regRn[8] = a; //a0 19783: XEiJ.regCCR = XEiJ.REG_CCR_N | XEiJ.REG_CCR_C; //文法エラー 19784: return 0.0; 19785: } 19786: double x = 0.0; 19787: do { 19788: if (0 < n || '0' < c) { //0以外 19789: n++; //0以外の最初の数字から数えて何桁目か 19790: } 19791: if (e <= 0 && n <= 18) { //小数部で18桁目まで 19792: e--; //-小数部の桁数 19793: } 19794: if (0 < n && n <= 18) { //1桁目から18桁目まで 19795: u = u * 10L + (long) (c - '0'); 19796: } 19797: c = mmuReadByteSignData (++a, 1); 19798: if (0 < e && c == '.') { //整数部で小数点が出てきた 19799: e = 0; //小数部開始 19800: c = mmuReadByteSignData (++a, 1); 19801: } 19802: } while ('0' <= c && c <= '9'); 19803: if (0 < e) { //小数点が出てこなかった 19804: e = 18 < n ? n - 18 : 0; //整数部を読み飛ばした桁数が(-小数部の桁数) 19805: } 19806: // 1<=u<10^18 整数なので誤差はない 19807: // 0<e 小数点がなくて整数部が19桁以上あって末尾を読み飛ばした 19808: // e==0 小数点がなくて整数部が18桁以内で末尾を読み飛ばさなかった 19809: // 小数点があって小数点で終わっていた 19810: // e<0 小数点があって小数部が1桁以上あった 19811: //指数部を読み取る 19812: if (c == 'E' || c == 'e') { 19813: c = mmuReadByteSignData (++a, 1); 19814: int t = 1; //指数部の符号 19815: if (c == '+') { 19816: c = mmuReadByteSignData (++a, 1); 19817: } else if (c == '-') { 19818: t = -t; 19819: c = mmuReadByteSignData (++a, 1); 19820: } 19821: if (c < '0' || '9' < c) { //指数部に数字がない 19822: XEiJ.regRn[8] = a; //a0 19823: XEiJ.regCCR = XEiJ.REG_CCR_N | XEiJ.REG_CCR_C; //文法エラー 19824: return 0.0; 19825: } 19826: while (c == '0') { //先頭の0を読み飛ばす 19827: c = mmuReadByteSignData (++a, 1); 19828: } 19829: int p = 0; 19830: for (int j = 0; '0' <= c && c <= '9' && j < 9; j++) { //0以外の数字が出てきてから最大で9桁目まで読み取る。Human68kの環境では数字を1GBも並べることはできないのでオーバーフローの判定には9桁あれば十分 19831: p = p * 10 + (c - '0'); 19832: c = mmuReadByteSignData (++a, 1); 19833: } 19834: e += t * p; 19835: } 19836: //符号と仮数部と指数部を合わせる 19837: // x=s*x*10^e 19838: // 1<=u<10^18なのでeが範囲を大きく外れている場合を先に除外する 19839: if (e < -350) { 19840: XEiJ.regRn[2] = 65535; //d2。-1ではない 19841: XEiJ.regRn[3] = 0; //d3 19842: XEiJ.regRn[8] = a; //a0 19843: XEiJ.regCCR = 0; //エラーなし。アンダーフローはエラーとみなされない 19844: return s < 0.0 ? -0.0 : 0.0; 19845: } 19846: if (350 < e) { 19847: XEiJ.regRn[2] = 0; //d2 19848: XEiJ.regRn[3] = 0; //d3 19849: XEiJ.regRn[8] = a; //a0 19850: XEiJ.regCCR = XEiJ.REG_CCR_V | XEiJ.REG_CCR_C; //オーバーフロー 19851: return s * Double.POSITIVE_INFINITY; 19852: } 19853: if (true) { 19854: QFP xx = new QFP (s < 0.0 ? -u : u); //符号と仮数部 19855: if (0 < e) { 19856: xx.mul (QFP.QFP_TEN_P16QR[e & 15]); 19857: if (16 <= e) { 19858: xx.mul (QFP.QFP_TEN_P16QR[16 + (e >> 4 & 15)]); 19859: if (256 <= e) { 19860: xx.mul (QFP.QFP_TEN_P16QR[33]); 19861: } 19862: } 19863: } else if (e < 0) { 19864: xx.mul (QFP.QFP_TEN_M16QR[-e & 15]); 19865: if (e <= -16) { 19866: xx.mul (QFP.QFP_TEN_M16QR[16 + (-e >> 4 & 15)]); 19867: if (e <= -256) { 19868: xx.mul (QFP.QFP_TEN_M16QR[33]); 19869: } 19870: } 19871: } 19872: x = xx.getd (); 19873: } else { 19874: x = s * (double) u; //符号と仮数部 19875: if (0 < e) { 19876: x *= FEFunction.FPK_TEN_P16QR[e & 15]; 19877: if (16 <= e) { 19878: x *= FEFunction.FPK_TEN_P16QR[16 + (e >> 4 & 15)]; 19879: if (256 <= e) { 19880: x *= FEFunction.FPK_TEN_P16QR[33]; //FEFunction.FPK_TEN_P16QR[32 + (e >> 8)] 19881: } 19882: } 19883: } else if (e < 0) { 19884: x /= FEFunction.FPK_TEN_P16QR[-e & 15]; 19885: if (e <= -16) { 19886: x /= FEFunction.FPK_TEN_P16QR[16 + (-e >> 4 & 15)]; 19887: if (e <= -256) { 19888: x /= FEFunction.FPK_TEN_P16QR[33]; //FEFunction.FPK_TEN_P16QR[32 + (-e >> 8)] 19889: } 19890: } 19891: } 19892: } 19893: if (Double.isInfinite (x)) { 19894: XEiJ.regRn[8] = a; //a0 19895: XEiJ.regCCR = XEiJ.REG_CCR_V | XEiJ.REG_CCR_C; //オーバーフロー 19896: return x; 19897: } 19898: // アンダーフローで0になっている場合がある 19899: if (x == (double) ((int) x)) { //intで表現できる。+0.0==-0.0==0なので±0.0を含む 19900: XEiJ.regRn[2] = 65535; //d2。-1ではない 19901: XEiJ.regRn[3] = (int) x; //d3 19902: } else { //intで表現できない 19903: XEiJ.regRn[2] = 0; //d2 19904: XEiJ.regRn[3] = 0; //d3 19905: } 19906: XEiJ.regRn[8] = a; //a0 19907: XEiJ.regCCR = 0; //エラーなし 19908: return x; 19909: } //fpkSTODSub() 19910: 19911: //fpkDTOS () 19912: // $FE23 __DTOS 19913: // 64bit浮動小数点数を文字列に変換する 19914: // 無限大は"#INF"、非数は"#NAN"になる 19915: // 指数形式の境目 19916: // x<10^-4または10^14<=xのとき指数形式にする 19917: // FLOAT2.X/FLOAT4.Xの場合 19918: // 3f2fffffffffff47 2.4414062499999E-004 19919: // 3f2fffffffffff48 0.000244140625 19920: // 42d6bcc41e8fffdf 99999999999999 19921: // 42d6bcc41e8fffe0 1E+014 19922: // <d0d1.d:64bit浮動小数点数 19923: // <a0.l:文字列バッファの先頭 19924: // >a0.l:末尾の'\0'の位置 19925: public static void fpkDTOS () throws M68kException { 19926: fpkDTOSSub ((long) XEiJ.regRn[0] << 32 | 0xffffffffL & XEiJ.regRn[1]); //64bit浮動小数点数 19927: } //fpkDTOS() 19928: public static void fpkDTOSSub (long l) throws M68kException { 19929: final int len3 = 14; 19930: int a = XEiJ.regRn[8]; //文字列バッファの先頭 19931: //符号と指数部の処理 19932: // ±0,±Inf,NaNはここで除外する 19933: if (l < 0L) { 19934: mmuWriteByteData (a++, '-', 1); //負符号 19935: l &= 0x7fffffffffffffffL; //符号bitを消しておく 19936: } 19937: double x = Double.longBitsToDouble (l); //絶対値 19938: int e = (int) (l >>> 52) - 1023; //指数部。ゲタ0。符号bitは消してあるのでマスクは不要 19939: l &= 0x000fffffffffffffL; //仮数部の小数部。正規化数のとき整数部の1が付いていないことに注意 19940: if (e == -1023) { //±0,非正規化数 19941: if (l == 0L) { //±0 19942: mmuWriteByteData (a++, '0', 1); //0 19943: mmuWriteByteData (a, '\0', 1); 19944: XEiJ.regRn[8] = a; //末尾の'\0'の位置 19945: return; 19946: } 19947: e -= Long.numberOfLeadingZeros (l) - 12; //非正規化数の指数部を補正する 19948: } else if (e == 1024) { //±Inf,NaN 19949: mmuWriteByteData (a++, '#', 1); 19950: if (l == 0L) { //±Inf 19951: mmuWriteByteData (a++, 'I', 1); 19952: mmuWriteByteData (a++, 'N', 1); 19953: mmuWriteByteData (a++, 'F', 1); 19954: } else { //NaN 19955: mmuWriteByteData (a++, 'N', 1); 19956: mmuWriteByteData (a++, 'A', 1); 19957: mmuWriteByteData (a++, 'N', 1); 19958: } 19959: mmuWriteByteData (a, '\0', 1); 19960: XEiJ.regRn[8] = a; //末尾の'\0'の位置 19961: return; 19962: } 19963: //10進数で表現したときの指数部を求める 19964: // 10^e<=x<10^(e+1)となるeを求める 19965: e = (int) Math.floor ((double) e * 0.30102999566398119521373889472); //log10(2) 19966: //10^-eを掛けて1<=x<10にする 19967: // 非正規化数の最小値から正規化数の最大値まで処理できなければならない 19968: // 10^-eを計算してからまとめて掛ける方法はxが非正規化数のとき10^-eがオーバーフローしてしまうので不可 19969: // doubleは非正規化数の逆数を表現できない 19970: if (0 < e) { //10<=x 19971: x *= FEFunction.FPK_TEN_M16QR[e & 15]; 19972: if (16 <= e) { 19973: x *= FEFunction.FPK_TEN_M16QR[16 + (e >> 4 & 15)]; 19974: if (256 <= e) { 19975: x *= FEFunction.FPK_TEN_M16QR[33]; //FEFunction.FPK_TEN_M16QR[32 + (e >> 8)] 19976: } 19977: } 19978: } else if (e < 0) { //x<1 19979: x *= FEFunction.FPK_TEN_P16QR[-e & 15]; 19980: if (e <= -16) { 19981: x *= FEFunction.FPK_TEN_P16QR[16 + (-e >> 4 & 15)]; 19982: if (e <= -256) { 19983: x *= FEFunction.FPK_TEN_P16QR[33]; //FEFunction.FPK_TEN_P16QR[32 + (-e >> 8)] 19984: } 19985: } 19986: } 19987: //整数部2桁、小数部16桁の10進数に変換する 19988: // 1<=x<10なのでw[1]が先頭になるはずだが誤差で前後にずれる可能性がある 19989: int[] w = new int[18]; 19990: { 19991: int d = (int) x; 19992: int t = XEiJ.FMT_BCD4[d]; 19993: w[0] = t >> 4; 19994: w[1] = t & 15; 19995: for (int i = 2; i < 18; i += 4) { 19996: //xを10000倍して整数部dを引くことで小数部を残すが、このとき情報落ちが発生して誤差が蓄積する 19997: //Double-Doubleの乗算の要領で10000倍を正確に行い、誤差の蓄積を回避する 19998: //x = (x - (double) d) * 10000.0; 19999: double xh = x * 0x8000001p0; 20000: xh += x - xh; //xの上半分 20001: x = (xh - (double) d) * 10000.0 + (x - xh) * 10000.0; 20002: d = (int) x; 20003: t = XEiJ.FMT_BCD4[d]; 20004: w[i ] = t >> 12; 20005: w[i + 1] = t >> 8 & 15; 20006: w[i + 2] = t >> 4 & 15; 20007: w[i + 3] = t & 15; 20008: } 20009: } 20010: //先頭の位置を確認する 20011: // w[h]が先頭(0でない最初の数字)の位置 20012: int h = w[0] != 0 ? 0 : w[1] != 0 ? 1 : 2; 20013: //14+1桁目を四捨五入する 20014: int o = h + 14; //w[o]は四捨五入する桁の位置。w[]の範囲内 20015: if (5 <= w[o]) { 20016: int i = o; 20017: while (10 <= ++w[--i]) { 20018: w[i] = 0; 20019: } 20020: if (i < h) { //先頭から繰り上がった。このとき新しい先頭は1でそれ以外はすべて0 20021: h--; //先頭を左にずらす 20022: o--; //末尾を左にずらす 20023: } 20024: } 20025: //先頭の位置に応じて指数部を更新する 20026: // w[h]が整数部、w[h+1..o-1]が小数部。10^eの小数点はw[h]の右側。整数部の桁数はe+1桁 20027: e -= h - 1; 20028: //末尾の位置を確認する 20029: // w[o-1]が末尾(0でない最後の数字)の位置 20030: while (w[o - 1] == 0) { //全体は0ではないので必ず止まる。小数点よりも左側で止まる場合があることに注意 20031: o--; 20032: } 20033: //指数形式にするかどうか選択して文字列に変換する 20034: if (0 <= e && e < len3) { //1<=x<10^len3。指数形式にしない 20035: do { 20036: mmuWriteByteData (a++, '0' + w[h++], 1); //整数部。末尾の位置に関係なく1の位まで書く 20037: } while (0 <= --e); 20038: if (h < o) { //小数部がある 20039: mmuWriteByteData (a++, '.', 1); //小数部があるときだけ小数点を書く 20040: do { 20041: mmuWriteByteData (a++, '0' + w[h++], 1); //小数部 20042: } while (h < o); 20043: } 20044: } else if (-4 <= e && e < 0) { //10^-4<=x<1。指数形式にしない 20045: mmuWriteByteData (a++, '0', 1); //整数部の0 20046: mmuWriteByteData (a++, '.', 1); //小数点 20047: while (++e < 0) { 20048: mmuWriteByteData (a++, '0', 1); //小数部の先頭の0の並び 20049: } 20050: do { 20051: mmuWriteByteData (a++, '0' + w[h++], 1); //小数部 20052: } while (h < o); 20053: } else { //x<10^-4または10^len3<=x。指数形式にする 20054: mmuWriteByteData (a++, '0' + w[h++], 1); //整数部 20055: if (h < o) { //小数部がある 20056: mmuWriteByteData (a++, '.', 1); //小数部があるときだけ小数点を書く 20057: do { 20058: mmuWriteByteData (a++, '0' + w[h++], 1); //小数部 20059: } while (h < o); 20060: } 20061: mmuWriteByteData (a++, 'E', 1); //指数部の始まり 20062: if (0 <= e) { 20063: mmuWriteByteData (a++, '+', 1); //指数部の正符号。省略しない 20064: } else { 20065: mmuWriteByteData (a++, '-', 1); //指数部の負符号 20066: e = -e; 20067: } 20068: e = XEiJ.FMT_BCD4[e]; 20069: mmuWriteByteData (a++, '0' + (e >> 8 ), 1); //指数部の100の位。0でも省略しない 20070: mmuWriteByteData (a++, '0' + (e >> 4 & 15), 1); //指数部の10の位 20071: mmuWriteByteData (a++, '0' + (e & 15), 1); //指数部の1の位 20072: } 20073: mmuWriteByteData (a, '\0', 1); 20074: XEiJ.regRn[8] = a; //末尾の'\0'の位置 20075: } //fpkDTOSSub6() 20076: 20077: //fpkECVT () 20078: // $FE24 __ECVT 20079: // 64bit浮動小数点数を全体の桁数を指定して文字列に変換する 20080: // 文字列に書くのは仮数部の数字のみ 20081: // 符号と小数点と指数部は文字列に書かず、小数点の位置と符号をレジスタに入れて返す 20082: // 桁数は255桁まで指定できるが、有効桁数は14桁まで 20083: // 有効桁数の次の桁で絶対値を四捨五入する 20084: // 15桁以上を指定しても14桁に丸められ、15桁目以降はすべて'0'になる 20085: // 無限大は"#INF"、非数は"#NAN"に変換する 20086: // "#INF"と"#NAN"のとき小数点の位置は4になる 20087: // "#INF"と"#NAN"で3桁以下のときは途中で打ち切る 20088: // メモ 20089: // FLOATn.Xは"#INF"と"#NAN"で1桁～3桁のとき文字列が"$","$0","$00"になってしまう 20090: // 文字数が少なすぎて"#INF"や"#NAN"が入り切らないのは仕方がないが、 20091: // 無意味な"$00"という文字列になるのは数字ではない文字列を四捨五入しようとするバグが原因 20092: // 例えば3桁のときは4桁目の'F'または'N'が'5'以上なので繰り上げて上の位をインクリメントする 20093: // 'N'+1='O'または'A'+1='B'が'9'よりも大きいので'0'を上書きして繰り上げて上の位をインクリメントする 20094: // 'I'+1='J'または'N'+1='O'も'9'よりも大きいので'0'を上書きして繰り上げて上の位をインクリメントする 20095: // '#'+1='$'は'9'以下なので"$00"になる 20096: // X-BASICでint i2,i3:print ecvt(val("#INF"),3,i2,i3)とすると再現できる 20097: // "#INF"と"#NAN"で5桁以上のときは5桁目以降はすべて'\0'になる 20098: // メモ 20099: // FLOATn.Xは"#NAN"と"#INF"で15桁以上のとき5桁目から14桁目までは'\0'だが15桁目以降に'0'が書き込まれる 20100: // 通常は5桁目の'\0'で文字列は終了していると見なされるので実害はないが気持ち悪い 20101: // メモ 20102: // FLOAT2.X 2.02/2.03は0のとき小数点の位置が0になる 20103: // FLOAT4.X 1.02は0のとき小数点の位置が1になる 20104: // ここでは1にしている 20105: // <d0d1.d:64bit浮動小数点数 20106: // <d2.l:全体の桁数 20107: // <a0.l:文字列バッファの先頭。末尾に'\0'を書き込むので桁数+1バイト必要 20108: // >d0.l:先頭から小数点の位置までのオフセット 20109: // >d1.l:符号(0=+,1=-) 20110: // a0.lは変化しない 20111: public static void fpkECVT () throws M68kException { 20112: fpkECVTSub ((long) XEiJ.regRn[0] << 32 | 0xffffffffL & XEiJ.regRn[1]); //64bit浮動小数点数 20113: } //fpkECVT() 20114: public static void fpkECVTSub (long l) throws M68kException { 20115: int len3 = Math.max (0, XEiJ.regRn[2]); //全体の桁数 20116: int a = XEiJ.regRn[8]; //文字列バッファの先頭 20117: int b = a + len3; //文字列バッファの末尾+1。'\0'を書き込む位置 20118: //符号と指数部の処理 20119: // ±0,±Inf,NaNはここで除外する 20120: if (0L <= l) { 20121: XEiJ.regRn[1] = 0; //正符号 20122: } else { 20123: XEiJ.regRn[1] = 1; //負符号 20124: l &= 0x7fffffffffffffffL; //符号bitを消しておく 20125: } 20126: double x = Double.longBitsToDouble (l); //絶対値 20127: int e = (int) (l >>> 52) - 1023; //指数部。ゲタ0。符号bitは消してあるのでマスクは不要 20128: l &= 0x000fffffffffffffL; //仮数部の小数部。正規化数のとき整数部の1が付いていないことに注意 20129: if (e == -1023) { //±0,非正規化数 20130: if (l == 0L) { //±0 20131: //指定された全体の桁数だけ'0'を並べる 20132: while (a < b) { 20133: mmuWriteByteData (a++, '0', 1); 20134: } 20135: mmuWriteByteData (a, '\0', 1); 20136: XEiJ.regRn[0] = 1; //小数点の位置 20137: return; 20138: } 20139: e -= Long.numberOfLeadingZeros (l) - 12; //非正規化数の指数部を補正する 20140: } else if (e == 1024) { //±Inf,NaN 20141: for (int s = l != 0L ? '#' | 'N' << 8 | 'A' << 16 | 'N' << 24 : '#' | 'I' << 8 | 'N' << 16 | 'F' << 24; a < b && s != 0; s >>>= 8) { 20142: mmuWriteByteData (a++, s, 1); 20143: } 20144: while (a < b) { 20145: mmuWriteByteData (a++, '\0', 1); //残りは'\0' 20146: } 20147: mmuWriteByteData (a, '\0', 1); 20148: XEiJ.regRn[0] = 4; //小数点の位置 20149: return; 20150: } 20151: //10進数で表現したときの指数部を求める 20152: // 10^e<=x<10^(e+1)となるeを求める 20153: e = (int) Math.floor ((double) e * 0.30102999566398119521373889472); //log10(2) 20154: //10^-eを掛けて1<=x<10にする 20155: // 非正規化数の最小値から正規化数の最大値まで処理できなければならない 20156: // 10^-eを計算してからまとめて掛ける方法はxが非正規化数のとき10^-eがオーバーフローしてしまうので不可 20157: // doubleは非正規化数の逆数を表現できない 20158: if (0 < e) { //10<=x 20159: x *= FEFunction.FPK_TEN_M16QR[e & 15]; 20160: if (16 <= e) { 20161: x *= FEFunction.FPK_TEN_M16QR[16 + (e >> 4 & 15)]; 20162: if (256 <= e) { 20163: x *= FEFunction.FPK_TEN_M16QR[33]; //FEFunction.FPK_TEN_M16QR[32 + (e >> 8)] 20164: } 20165: } 20166: } else if (e < 0) { //x<1 20167: x *= FEFunction.FPK_TEN_P16QR[-e & 15]; 20168: if (e <= -16) { 20169: x *= FEFunction.FPK_TEN_P16QR[16 + (-e >> 4 & 15)]; 20170: if (e <= -256) { 20171: x *= FEFunction.FPK_TEN_P16QR[33]; //FEFunction.FPK_TEN_P16QR[32 + (-e >> 8)] 20172: } 20173: } 20174: } 20175: //整数部2桁、小数部16桁の10進数に変換する 20176: // 1<=x<10なのでw[1]が先頭になるはずだが誤差で前後にずれる可能性がある 20177: int[] w = new int[18]; 20178: { 20179: int d = (int) x; 20180: int t = XEiJ.FMT_BCD4[d]; 20181: w[0] = t >> 4; 20182: w[1] = t & 15; 20183: for (int i = 2; i < 18; i += 4) { 20184: //xを10000倍して整数部dを引くことで小数部を残すが、このとき情報落ちが発生して誤差が蓄積する 20185: //Double-Doubleの乗算の要領で10000倍を正確に行い、誤差の蓄積を回避する 20186: //x = (x - (double) d) * 10000.0; 20187: double xh = x * 0x8000001p0; 20188: xh += x - xh; //xの上半分 20189: x = (xh - (double) d) * 10000.0 + (x - xh) * 10000.0; 20190: d = (int) x; 20191: t = XEiJ.FMT_BCD4[d]; 20192: w[i ] = t >> 12; 20193: w[i + 1] = t >> 8 & 15; 20194: w[i + 2] = t >> 4 & 15; 20195: w[i + 3] = t & 15; 20196: } 20197: } 20198: //先頭の位置を確認する 20199: // w[h]が先頭(0でない最初の数字)の位置 20200: int h = w[0] != 0 ? 0 : w[1] != 0 ? 1 : 2; 20201: //14+1桁目を四捨五入する 20202: int o = h + 14; //w[o]は四捨五入する桁の位置。w[]の範囲内 20203: if (5 <= w[o]) { 20204: int i = o; 20205: while (10 <= ++w[--i]) { 20206: w[i] = 0; 20207: } 20208: if (i < h) { //先頭から繰り上がった。このとき新しい先頭は1でそれ以外はすべて0 20209: h--; //先頭を左にずらす 20210: o--; //末尾を左にずらす 20211: } 20212: } 20213: //先頭の位置に応じて指数部を更新する 20214: // w[h]が整数部、w[h+1..o-1]が小数部。10^eの小数点はw[h]の右側。整数部の桁数はe+1桁 20215: e -= h - 1; 20216: //先頭からlen3+1桁目が先頭から14+1桁目よりも左側にあるときその桁で改めて四捨五入する 20217: // あらかじめ14+1桁目で四捨五入しておかないと、 20218: // 1.5の5を四捨五入しなければならないときに誤差で1.499…になったまま4を四捨五入しようとして失敗することがある 20219: int s = h + len3; //w[s]は先頭からlen3+1桁目の位置。w.length<=sの場合があることに注意 20220: if (s < o) { 20221: o = s; //w[o]は四捨五入する桁の位置。o<0の場合があることに注意 20222: if (0 <= o && 5 <= w[o]) { 20223: int i = o; 20224: while (10 <= ++w[--i]) { 20225: w[i] = 0; 20226: } 20227: if (i < h) { //先頭から繰り上がった。このとき新しい先頭は1でそれ以外はすべて0 20228: h--; //先頭を左にずらす 20229: o--; //末尾を左にずらす 20230: e++; //指数部を1増やす 20231: } 20232: } 20233: } 20234: //文字列に変換する 20235: while (a < b && h < o) { 20236: mmuWriteByteData (a++, '0' + w[h++], 1); //有効数字 20237: } 20238: while (a < b) { 20239: mmuWriteByteData (a++, '0', 1); //残りは'0' 20240: } 20241: mmuWriteByteData (a, '\0', 1); 20242: XEiJ.regRn[0] = e + 1; //小数点の位置 20243: } //fpkECVTSub6() 20244: 20245: //fpkFCVT () 20246: // $FE25 __FCVT 20247: // 64bit浮動小数点数を小数点以下の桁数を指定して文字列に変換する 20248: // メモ 20249: // 小数点の位置がpのとき[p]の左側に小数点がある 20250: // 全体の桁数が制限されないので指数部が大きいとき整数部が収まるサイズのバッファが必要 20251: // 0または1以上のとき 20252: // 整数部と小数点以下の指定された桁数までを小数部の0を省略せずに出力する 20253: // 整数部と小数点以下の指定された桁数が合わせて14桁を超えるときは15桁目が四捨五入されて15桁目以降は0になる 20254: // 小数点の位置は整数部の桁数に等しい 20255: // print fcvt(0#,4,i2,i3),i2,i3 20256: // 0000 0 0 20257: // print fcvt(2e+12/3#,4,i2,i3),i2,i3 20258: // 6666666666666700 12 0 20259: // ↑ 20260: // 1未満のとき 20261: // 小数点以下の桁数の範囲内を先頭の0を省略して出力する 20262: // 小数点以下の桁数の範囲内がすべて0のときは""になる 20263: // 小数点の位置は指数部+1に等しい 20264: // print fcvt(0.01,3,i2,i3),i2,i3 0.010 20265: // 10 -1 0 <~~ 20266: // print fcvt(0.001,3,i2,i3),i2,i3 0.001 20267: // 1 -2 0 <<~ 20268: // print fcvt(0.0001,3,i2,i3),i2,i3 0.0001 20269: // -3 0 <<< 20270: // print fcvt(0.00001,3,i2,i3),i2,i3 0.00001 20271: // -4 0 <<<< 20272: // #INFと#NAN 20273: // 小数点以下の桁数の指定に関係なく4文字出力して小数点の位置4を返す 20274: // print fcvt(val("#INF"),2,i2,i3),i2,i3 20275: // #INF 4 0 20276: // print fcvt(val("#INF"),6,i2,i3),i2,i3 20277: // #INF 4 0 20278: // バグ 20279: // FLOAT4.X 1.02は結果が整数部が大きいとき255文字で打ち切られる 20280: // FLOAT4.X 1.02はFCVT(±0)の整数部が0桁ではなく1桁になる 20281: // <d0d1.d:64bit浮動小数点数 20282: // <d2.l:小数点以下の桁数 20283: // <a0.l:文字列バッファの先頭 20284: // >d0.l:先頭から小数点の位置までのオフセット 20285: // >d1.l:符号(0=+,1=-) 20286: public static void fpkFCVT () throws M68kException { 20287: fpkFCVTSub ((long) XEiJ.regRn[0] << 32 | 0xffffffffL & XEiJ.regRn[1]); //64bit浮動小数点数 20288: } //fpkFCVT() 20289: public static void fpkFCVTSub (long l) throws M68kException { 20290: int len2 = Math.max (0, XEiJ.regRn[2]); //小数部の桁数 20291: int a = XEiJ.regRn[8]; //文字列バッファの先頭 20292: //符号と指数部の処理 20293: // ±0,±Inf,NaNはここで除外する 20294: if (0L <= l) { 20295: XEiJ.regRn[1] = 0; //正符号 20296: } else { 20297: XEiJ.regRn[1] = 1; //負符号 20298: l &= 0x7fffffffffffffffL; //符号bitを消しておく 20299: } 20300: double x = Double.longBitsToDouble (l); //絶対値 20301: int e = (int) (l >>> 52) - 1023; //指数部。ゲタ0。符号bitは消してあるのでマスクは不要 20302: l &= 0x000fffffffffffffL; //仮数部の小数部。正規化数のとき整数部の1が付いていないことに注意 20303: if (e == -1023) { //±0,非正規化数 20304: if (l == 0L) { //±0 20305: //指定された小数点以下の桁数だけ'0'を並べる 20306: while (len2-- > 0) { 20307: mmuWriteByteData (a++, '0', 1); 20308: } 20309: mmuWriteByteData (a, '\0', 1); 20310: XEiJ.regRn[0] = 0; //小数点の位置 20311: return; 20312: } 20313: e -= Long.numberOfLeadingZeros (l) - 12; //非正規化数の指数部を補正する 20314: } else if (e == 1024) { //±Inf,NaN 20315: mmuWriteByteData (a++, '#', 1); 20316: if (l == 0L) { //±Inf 20317: mmuWriteByteData (a++, 'I', 1); 20318: mmuWriteByteData (a++, 'N', 1); 20319: mmuWriteByteData (a++, 'F', 1); 20320: } else { //NaN 20321: mmuWriteByteData (a++, 'N', 1); 20322: mmuWriteByteData (a++, 'A', 1); 20323: mmuWriteByteData (a++, 'N', 1); 20324: } 20325: mmuWriteByteData (a, '\0', 1); 20326: XEiJ.regRn[0] = 4; //小数点の位置 20327: return; 20328: } 20329: //10進数で表現したときの指数部を求める 20330: // 10^e<=x<10^(e+1)となるeを求める 20331: e = (int) Math.floor ((double) e * 0.30102999566398119521373889472); //log10(2) 20332: //10^-eを掛けて1<=x<10にする 20333: // 非正規化数の最小値から正規化数の最大値まで処理できなければならない 20334: // 10^-eを計算してからまとめて掛ける方法はxが非正規化数のとき10^-eがオーバーフローしてしまうので不可 20335: // doubleは非正規化数の逆数を表現できない 20336: if (0 < e) { //10<=x 20337: x *= FEFunction.FPK_TEN_M16QR[e & 15]; 20338: if (16 <= e) { 20339: x *= FEFunction.FPK_TEN_M16QR[16 + (e >> 4 & 15)]; 20340: if (256 <= e) { 20341: x *= FEFunction.FPK_TEN_M16QR[33]; //FEFunction.FPK_TEN_M16QR[32 + (e >> 8)] 20342: } 20343: } 20344: } else if (e < 0) { //x<1 20345: x *= FEFunction.FPK_TEN_P16QR[-e & 15]; 20346: if (e <= -16) { 20347: x *= FEFunction.FPK_TEN_P16QR[16 + (-e >> 4 & 15)]; 20348: if (e <= -256) { 20349: x *= FEFunction.FPK_TEN_P16QR[33]; //FEFunction.FPK_TEN_P16QR[32 + (-e >> 8)] 20350: } 20351: } 20352: } 20353: //整数部2桁、小数部16桁の10進数に変換する 20354: // 1<=x<10なのでw[1]が先頭になるはずだが誤差で前後にずれる可能性がある 20355: int[] w = new int[18]; 20356: { 20357: int d = (int) x; 20358: int t = XEiJ.FMT_BCD4[d]; 20359: w[0] = t >> 4; 20360: w[1] = t & 15; 20361: for (int i = 2; i < 18; i += 4) { 20362: //xを10000倍して整数部dを引くことで小数部を残すが、このとき情報落ちが発生して誤差が蓄積する 20363: //Double-Doubleの乗算の要領で10000倍を正確に行い、誤差の蓄積を回避する 20364: //x = (x - (double) d) * 10000.0; 20365: double xh = x * 0x8000001p0; 20366: xh += x - xh; //xの上半分 20367: x = (xh - (double) d) * 10000.0 + (x - xh) * 10000.0; 20368: d = (int) x; 20369: t = XEiJ.FMT_BCD4[d]; 20370: w[i ] = t >> 12; 20371: w[i + 1] = t >> 8 & 15; 20372: w[i + 2] = t >> 4 & 15; 20373: w[i + 3] = t & 15; 20374: } 20375: } 20376: //先頭の位置を確認する 20377: // w[h]が先頭(0でない最初の数字)の位置 20378: int h = w[0] != 0 ? 0 : w[1] != 0 ? 1 : 2; 20379: //14+1桁目を四捨五入する 20380: int o = h + 14; //w[o]は四捨五入する桁の位置。w[]の範囲内 20381: if (5 <= w[o]) { 20382: int i = o; 20383: while (10 <= ++w[--i]) { 20384: w[i] = 0; 20385: } 20386: if (i < h) { //先頭から繰り上がった。このとき新しい先頭は1でそれ以外はすべて0 20387: h--; //先頭を左にずらす 20388: o--; //末尾を左にずらす 20389: } 20390: } 20391: //先頭の位置に応じて指数部を更新する 20392: // w[h]が整数部、w[h+1..o-1]が小数部。10^eの小数点はw[h]の右側。整数部の桁数はe+1桁 20393: e -= h - 1; 20394: //小数点以下len2+1桁目が先頭から14+1桁目よりも左側にあるときその桁で改めて四捨五入する 20395: // あらかじめ14+1桁目で四捨五入しておかないと、 20396: // 1.5の5を四捨五入しなければならないときに誤差で1.499…になったまま4を四捨五入しようとして失敗することがある 20397: int s = h + e + 1 + len2; //w[s]は小数点以下len2+1桁目の位置。w.length<=sの場合があることに注意 20398: if (s < o) { 20399: o = s; //w[o]は四捨五入する桁の位置。o<0の場合があることに注意 20400: if (0 <= o && 5 <= w[o]) { 20401: int i = o; 20402: while (10 <= ++w[--i]) { 20403: w[i] = 0; 20404: } 20405: if (i < h) { //先頭から繰り上がった。このとき新しい先頭は1でそれ以外はすべて0 20406: h--; //先頭を左にずらす 20407: o--; //末尾を左にずらす 20408: e++; //指数部を1増やす 20409: } 20410: } 20411: } 20412: //文字列に変換する 20413: while (h < o) { 20414: mmuWriteByteData (a++, '0' + w[h++], 1); //有効数字 20415: } 20416: while (h++ < s) { 20417: mmuWriteByteData (a++, '0', 1); //残りは'0' 20418: } 20419: mmuWriteByteData (a, '\0', 1); 20420: XEiJ.regRn[0] = e + 1; //小数点の位置 20421: } //fpkFCVTSub6() 20422: 20423: //fpkGCVT () 20424: // $FE26 __GCVT 20425: // 64bit浮動小数点数を全体の桁数を指定して文字列に変換する 20426: // 指定された桁数で表現できないときは指数表現になる 20427: // メモ 20428: // print gcvt(1e-1,10) 20429: // 0.1 20430: // print gcvt(1e-8,10) 20431: // 0.00000001 20432: // print gcvt(1.5e-8,10) 20433: // 1.5E-008 20434: // print gcvt(1e-9,10) 20435: // 1.E-009 小数点はあるが小数部がない 20436: // print gcvt(2e-1/3#,10) 20437: // 6.666666667E-002 20438: // print gcvt(2e+0/3#,10) 20439: // 0.6666666667 20440: // print gcvt(2e+1/3#,10) 20441: // 6.666666667 20442: // print gcvt(2e+9/3#,10) 20443: // 666666666.7 20444: // print gcvt(2e+10/3#,10) 20445: // 6666666667 20446: // print gcvt(2e+11/3#,10) 20447: // 6.666666667E+010 20448: // print gcvt(0#,4) 20449: // 0. 20450: // print gcvt(val("#INF"),4) 20451: // #INF 20452: // print gcvt(val("#INF"),3) 20453: // $.E+003 20454: // print gcvt(val("#INF"),2) 20455: // $.E+003 20456: // print gcvt(val("#INF"),1) 20457: // $.E+003 20458: // FLOAT2.XのGCVTは小数部がなくても桁数の範囲内であれば小数点を書く 20459: // 桁数ちょうどのときは小数点も指数部も付かないので、整数でないことを明確にするために小数点を書いているとも言い難い 20460: // ここでは#NANと#INF以外は小数部がなくても小数点を書くことにする 20461: // バグ 20462: // FLOAT2.X 2.02/2.03は#NANと#INFにも小数点を付ける 20463: // FLOAT2.X 2.02/2.03は#NANと#INFのとき桁数が足りないと指数形式にしようとして文字列が壊れる 20464: // FLOAT4.X 1.02は#NANと#INFにも小数点を付ける 20465: // FLOAT4.X 1.02は桁数の少ない整数には小数点を付けて桁数ちょうどの整数には小数点も指数部も付けない 20466: // <d0d1.d:64bit浮動小数点数 20467: // <d2.b:全体の桁数 20468: // <a0.l:文字列バッファの先頭 20469: // >a0.l:末尾の'\0'の位置 20470: public static void fpkGCVT () throws M68kException { 20471: fpkGCVTSub ((long) XEiJ.regRn[0] << 32 | 0xffffffffL & XEiJ.regRn[1]); //64bit浮動小数点数 20472: } //fpkGCVT() 20473: public static void fpkGCVTSub (long l) throws M68kException { 20474: int len3 = Math.max (0, XEiJ.regRn[2]); //全体の桁数 20475: int a = XEiJ.regRn[8]; //文字列バッファの先頭 20476: //符号と指数部の処理 20477: // ±0,±Inf,NaNはここで除外する 20478: if (l < 0L) { 20479: mmuWriteByteData (a++, '-', 1); //負符号 20480: l &= 0x7fffffffffffffffL; //符号bitを消しておく 20481: } 20482: double x = Double.longBitsToDouble (l); //絶対値 20483: int e = (int) (l >>> 52) - 1023; //指数部。ゲタ0。符号bitは消してあるのでマスクは不要 20484: l &= 0x000fffffffffffffL; //仮数部の小数部。正規化数のとき整数部の1が付いていないことに注意 20485: if (e == -1023) { //±0,非正規化数 20486: if (l == 0L) { //±0 20487: mmuWriteByteData (a++, '0', 1); //0 20488: mmuWriteByteData (a++, '.', 1); //小数点 20489: mmuWriteByteData (a, '\0', 1); 20490: XEiJ.regRn[8] = a; //末尾の'\0'の位置 20491: return; 20492: } 20493: e -= Long.numberOfLeadingZeros (l) - 12; //非正規化数の指数部を補正する 20494: } else if (e == 1024) { //±Inf,NaN 20495: mmuWriteByteData (a++, '#', 1); 20496: if (l == 0L) { //±Inf 20497: mmuWriteByteData (a++, 'I', 1); 20498: mmuWriteByteData (a++, 'N', 1); 20499: mmuWriteByteData (a++, 'F', 1); 20500: } else { //NaN 20501: mmuWriteByteData (a++, 'N', 1); 20502: mmuWriteByteData (a++, 'A', 1); 20503: mmuWriteByteData (a++, 'N', 1); 20504: } 20505: mmuWriteByteData (a, '\0', 1); 20506: XEiJ.regRn[8] = a; //末尾の'\0'の位置 20507: return; 20508: } 20509: //10進数で表現したときの指数部を求める 20510: // 10^e<=x<10^(e+1)となるeを求める 20511: e = (int) Math.floor ((double) e * 0.30102999566398119521373889472); //log10(2) 20512: //10^-eを掛けて1<=x<10にする 20513: // 非正規化数の最小値から正規化数の最大値まで処理できなければならない 20514: // 10^-eを計算してからまとめて掛ける方法はxが非正規化数のとき10^-eがオーバーフローしてしまうので不可 20515: // doubleは非正規化数の逆数を表現できない 20516: if (0 < e) { //10<=x 20517: x *= FEFunction.FPK_TEN_M16QR[e & 15]; 20518: if (16 <= e) { 20519: x *= FEFunction.FPK_TEN_M16QR[16 + (e >> 4 & 15)]; 20520: if (256 <= e) { 20521: x *= FEFunction.FPK_TEN_M16QR[33]; //FEFunction.FPK_TEN_M16QR[32 + (e >> 8)] 20522: } 20523: } 20524: } else if (e < 0) { //x<1 20525: x *= FEFunction.FPK_TEN_P16QR[-e & 15]; 20526: if (e <= -16) { 20527: x *= FEFunction.FPK_TEN_P16QR[16 + (-e >> 4 & 15)]; 20528: if (e <= -256) { 20529: x *= FEFunction.FPK_TEN_P16QR[33]; //FEFunction.FPK_TEN_P16QR[32 + (-e >> 8)] 20530: } 20531: } 20532: } 20533: //整数部2桁、小数部16桁の10進数に変換する 20534: // 1<=x<10なのでw[1]が先頭になるはずだが誤差で前後にずれる可能性がある 20535: int[] w = new int[18]; 20536: { 20537: int d = (int) x; 20538: int t = XEiJ.FMT_BCD4[d]; 20539: w[0] = t >> 4; 20540: w[1] = t & 15; 20541: for (int i = 2; i < 18; i += 4) { 20542: //xを10000倍して整数部dを引くことで小数部を残すが、このとき情報落ちが発生して誤差が蓄積する 20543: //Double-Doubleの乗算の要領で10000倍を正確に行い、誤差の蓄積を回避する 20544: //x = (x - (double) d) * 10000.0; 20545: double xh = x * 0x8000001p0; 20546: xh += x - xh; //xの上半分 20547: x = (xh - (double) d) * 10000.0 + (x - xh) * 10000.0; 20548: d = (int) x; 20549: t = XEiJ.FMT_BCD4[d]; 20550: w[i ] = t >> 12; 20551: w[i + 1] = t >> 8 & 15; 20552: w[i + 2] = t >> 4 & 15; 20553: w[i + 3] = t & 15; 20554: } 20555: } 20556: //先頭の位置を確認する 20557: // w[h]が先頭(0でない最初の数字)の位置 20558: int h = w[0] != 0 ? 0 : w[1] != 0 ? 1 : 2; 20559: //14+1桁目を四捨五入する 20560: int o = h + 14; //w[o]は四捨五入する桁の位置。w[]の範囲内 20561: if (5 <= w[o]) { 20562: int i = o; 20563: while (10 <= ++w[--i]) { 20564: w[i] = 0; 20565: } 20566: if (i < h) { //先頭から繰り上がった。このとき新しい先頭は1でそれ以外はすべて0 20567: h--; //先頭を左にずらす 20568: o--; //末尾を左にずらす 20569: } 20570: } 20571: //先頭の位置に応じて指数部を更新する 20572: // w[h]が整数部、w[h+1..o-1]が小数部。10^eの小数点はw[h]の右側。整数部の桁数はe+1桁 20573: e -= h - 1; 20574: //先頭からlen3+1桁目が先頭から14+1桁目よりも左側にあるときその桁で改めて四捨五入する 20575: // あらかじめ14+1桁目で四捨五入しておかないと、 20576: // 1.5の5を四捨五入しなければならないときに誤差で1.499…になったまま4を四捨五入しようとして失敗することがある 20577: int s = h + len3; //w[s]は先頭からlen3+1桁目の位置。w.length<=sの場合があることに注意 20578: if (s < o) { 20579: o = s; //w[o]は四捨五入する桁の位置。o<0の場合があることに注意 20580: if (0 <= o && 5 <= w[o]) { 20581: int i = o; 20582: while (10 <= ++w[--i]) { 20583: w[i] = 0; 20584: } 20585: if (i < h) { //先頭から繰り上がった。このとき新しい先頭は1でそれ以外はすべて0 20586: h--; //先頭を左にずらす 20587: o--; //末尾を左にずらす 20588: e++; //指数部を1増やす 20589: } 20590: } 20591: } 20592: //末尾の位置を確認する 20593: // w[o-1]が末尾(0でない最後の数字)の位置 20594: while (w[o - 1] == 0) { //全体は0ではないので必ず止まる。小数点よりも左側で止まる場合があることに注意 20595: o--; 20596: } 20597: //指数形式にするかどうか選択して文字列に変換する 20598: if (0 <= e && e < len3) { //1<=x<10^len3。指数形式にしない 20599: do { 20600: mmuWriteByteData (a++, '0' + w[h++], 1); //整数部。末尾の位置に関係なく1の位まで書く 20601: } while (0 <= --e); 20602: mmuWriteByteData (a++, '.', 1); //小数部がなくても小数点を書く 20603: while (h < o) { 20604: mmuWriteByteData (a++, '0' + w[h++], 1); //小数部 20605: } 20606: } else if (-4 <= e && e < 0) { //10^-4<=x<1。指数形式にしない 20607: mmuWriteByteData (a++, '0', 1); //整数部の0 20608: mmuWriteByteData (a++, '.', 1); //小数点 20609: while (++e < 0) { 20610: mmuWriteByteData (a++, '0', 1); //小数部の先頭の0の並び 20611: } 20612: while (h < o) { 20613: mmuWriteByteData (a++, '0' + w[h++], 1); //小数部 20614: } 20615: } else { //x<10^-4または10^len3<=x。指数形式にする 20616: mmuWriteByteData (a++, '0' + w[h++], 1); //整数部 20617: mmuWriteByteData (a++, '.', 1); //小数部がなくても小数点を書く 20618: while (h < o) { 20619: mmuWriteByteData (a++, '0' + w[h++], 1); //小数部 20620: } 20621: mmuWriteByteData (a++, 'E', 1); //指数部の始まり 20622: if (0 <= e) { 20623: mmuWriteByteData (a++, '+', 1); //指数部の正符号。省略しない 20624: } else { 20625: mmuWriteByteData (a++, '-', 1); //指数部の負符号 20626: e = -e; 20627: } 20628: e = XEiJ.FMT_BCD4[e]; 20629: mmuWriteByteData (a++, '0' + (e >> 8 ), 1); //指数部の100の位。0でも省略しない 20630: mmuWriteByteData (a++, '0' + (e >> 4 & 15), 1); //指数部の10の位 20631: mmuWriteByteData (a++, '0' + (e & 15), 1); //指数部の1の位 20632: } 20633: mmuWriteByteData (a, '\0', 1); 20634: XEiJ.regRn[8] = a; //末尾の'\0'の位置 20635: } //fpkGCVTSub6() 20636: 20637: //fpkFVAL () 20638: // $FE50 __FVAL 20639: // 文字列を32bit浮動小数点数に変換する 20640: // __VALとほぼ同じ 20641: // <a0.l:文字列の先頭 20642: // >d0.s:32bit浮動小数点数 20643: // >d2.l:(先頭が'&'でないとき)65535=32bit浮動小数点数をオーバーフローなしでintに変換できる,0=それ以外 20644: // >d3.l:(先頭が'&'でないとき)d2.l==65535のとき32bit浮動小数点数をintに変換した値 20645: // >a0.l:変換された文字列の直後('\0'とは限らない) 20646: // >ccr:0=エラーなし,CCR_N|CCR_C=文法エラー,CCR_V|CCR_C=オーバーフロー 20647: public static void fpkFVAL () throws M68kException { 20648: int a = XEiJ.regRn[8]; //a0 20649: //先頭の空白を読み飛ばす 20650: int c = mmuReadByteSignData (a++, 1); 20651: while (c == ' ' || c == '\t') { 20652: c = mmuReadByteSignData (a++, 1); 20653: } 20654: if (c == '&') { //&B,&O,&H 20655: c = mmuReadByteSignData (a++, 1) & 0xdf; 20656: XEiJ.regRn[8] = a; //&?の直後 20657: if (c == 'B') { 20658: fpkSTOB (); 20659: FEFunction.fpkLTOF (); 20660: } else if (c == 'O') { 20661: fpkSTOO (); 20662: FEFunction.fpkLTOF (); 20663: } else if (c == 'H') { 20664: fpkSTOH (); 20665: FEFunction.fpkLTOF (); 20666: } else { 20667: XEiJ.regCCR = XEiJ.REG_CCR_N | XEiJ.REG_CCR_C; //文法エラー 20668: } 20669: } else { //&B,&O,&H以外 20670: FEFunction.fpkSTOF (); 20671: } 20672: } //fpkFVAL() 20673: 20674: //fpkCLMUL () 20675: // $FEE0 __CLMUL 20676: // 32bit符号あり整数乗算 20677: // <(a7).l:32bit符号あり整数。被乗数x 20678: // <4(a7).l:32bit符号あり整数。乗数y 20679: // >(a7).l:32bit符号あり整数。積x*y。オーバーフローのときは不定 20680: // >ccr:cs=オーバーフロー。C以外は不定 20681: public static void fpkCLMUL () throws M68kException { 20682: int a7 = XEiJ.regRn[15]; 20683: long l = (long) mmuReadLongData (a7, 1) * (long) mmuReadLongData (a7 + 4, 1); 20684: int h = (int) l; 20685: mmuWriteLongData (a7, h, 1); //オーバーフローのときは積の下位32bit 20686: XEiJ.regCCR = (long) h == l ? 0 : XEiJ.REG_CCR_C; 20687: } //fpkCLMUL() 20688: 20689: //fpkCLDIV () 20690: // $FEE1 __CLDIV 20691: // 32bit符号あり整数除算 20692: // <(a7).l:32bit符号あり整数。被除数x 20693: // <4(a7).l:32bit符号あり整数。除数y 20694: // >(a7).l:32bit符号あり整数。商x/y。ゼロ除算のときは不定 20695: // >ccr:cs=ゼロ除算。C以外は不定 20696: public static void fpkCLDIV () throws M68kException { 20697: int a7 = XEiJ.regRn[15]; 20698: int h = mmuReadLongData (a7 + 4, 1); 20699: if (h == 0) { 20700: //(a7).lは変化しない 20701: XEiJ.regCCR = XEiJ.REG_CCR_C; 20702: } else { 20703: mmuWriteLongData (a7, mmuReadLongData (a7, 1) / h, 1); 20704: XEiJ.regCCR = 0; 20705: } 20706: } //fpkCLDIV() 20707: 20708: //fpkCLMOD () 20709: // $FEE2 __CLMOD 20710: // 32bit符号あり整数剰余算 20711: // <(a7).l:32bit符号あり整数。被除数x 20712: // <4(a7).l:32bit符号あり整数。除数y 20713: // >(a7).l:32bit符号あり整数。余りx%y。ゼロ除算のときは不定 20714: // >ccr:cs=ゼロ除算。C以外は不定 20715: public static void fpkCLMOD () throws M68kException { 20716: int a7 = XEiJ.regRn[15]; 20717: int h = mmuReadLongData (a7 + 4, 1); 20718: if (h == 0) { 20719: //(a7).lは変化しない 20720: XEiJ.regCCR = XEiJ.REG_CCR_C; 20721: } else { 20722: mmuWriteLongData (a7, mmuReadLongData (a7, 1) % h, 1); 20723: XEiJ.regCCR = 0; 20724: } 20725: } //fpkCLMOD() 20726: 20727: //fpkCUMUL () 20728: // $FEE3 __CUMUL 20729: // 32bit符号なし整数乗算 20730: // <(a7).l:32bit符号なし整数。被乗数x 20731: // <4(a7).l:32bit符号なし整数。乗数y 20732: // >(a7).l:32bit符号なし整数。積x*y。オーバーフローのときは不定 20733: // >ccr:cs=オーバーフロー。C以外は不定 20734: public static void fpkCUMUL () throws M68kException { 20735: int a7 = XEiJ.regRn[15]; 20736: long l = (0xffffffffL & mmuReadLongData (a7, 1)) * (0xffffffffL & mmuReadLongData (a7 + 4, 1)); 20737: int h = (int) l; 20738: mmuWriteLongData (a7, h, 1); 20739: XEiJ.regCCR = (0xffffffffL & h) == l ? 0 : XEiJ.REG_CCR_C; 20740: } //fpkCUMUL() 20741: 20742: //fpkCUDIV () 20743: // $FEE4 __CUDIV 20744: // 32bit符号なし整数除算 20745: // <(a7).l:32bit符号なし整数。被除数x 20746: // <4(a7).l:32bit符号なし整数。除数y 20747: // >(a7).l:32bit符号なし整数。商x/y。ゼロ除算のときは不定 20748: // >ccr:cs=ゼロ除算。C以外は不定 20749: public static void fpkCUDIV () throws M68kException { 20750: int a7 = XEiJ.regRn[15]; 20751: int h = mmuReadLongData (a7 + 4, 1); 20752: if (h == 0) { 20753: //(a7).lは変化しない 20754: XEiJ.regCCR = XEiJ.REG_CCR_C; 20755: } else { 20756: mmuWriteLongData (a7, (int) ((0xffffffffL & mmuReadLongData (a7, 1)) / (0xffffffffL & h)), 1); 20757: XEiJ.regCCR = 0; 20758: } 20759: } //fpkCUDIV() 20760: 20761: //fpkCUMOD () 20762: // $FEE5 __CUMOD 20763: // 32bit符号なし整数剰余算 20764: // <(a7).l:32bit符号なし整数。被除数x 20765: // <4(a7).l:32bit符号なし整数。除数y 20766: // >(a7).l:32bit符号なし整数。余りx%y。ゼロ除算のときは不定 20767: // >ccr:cs=ゼロ除算。C以外は不定 20768: public static void fpkCUMOD () throws M68kException { 20769: int a7 = XEiJ.regRn[15]; 20770: int h = mmuReadLongData (a7 + 4, 1); 20771: if (h == 0) { 20772: //(a7).lは変化しない 20773: XEiJ.regCCR = XEiJ.REG_CCR_C; 20774: } else { 20775: mmuWriteLongData (a7, (int) ((0xffffffffL & mmuReadLongData (a7, 1)) % (0xffffffffL & h)), 1); 20776: XEiJ.regCCR = 0; 20777: } 20778: } //fpkCUMOD() 20779: 20780: //fpkCLTOD () 20781: // $FEE6 __CLTOD 20782: // 32bit符号あり整数を64bit浮動小数点数に変換する 20783: // <(a7).l:32bit符号あり整数。x 20784: // >(a7).d:64bit浮動小数点数。(double)x 20785: public static void fpkCLTOD () throws M68kException { 20786: //int→double→[long]→[int,int] 20787: int a7 = XEiJ.regRn[15]; 20788: long l = Double.doubleToLongBits ((double) mmuReadLongData (a7, 1)); 20789: mmuWriteLongData (a7, (int) (l >>> 32), 1); 20790: mmuWriteLongData (a7 + 4, (int) l, 1); 20791: } //fpkCLTOD() 20792: 20793: //fpkCDTOL () 20794: // $FEE7 __CDTOL 20795: // 64bit浮動小数点数を32bit符号あり整数に変換する 20796: // <(a7).d:64bit浮動小数点数。x 20797: // >(a7).l:32bit符号あり整数。(int)x 20798: // >ccr:cs=オーバーフロー。C以外は不定 20799: public static void fpkCDTOL () throws M68kException { 20800: //[int,int]→[long]→double→int 20801: int a7 = XEiJ.regRn[15]; 20802: double d = Double.longBitsToDouble ((long) mmuReadLongData (a7, 1) << 32 | 0xffffffffL & mmuReadLongData (a7 + 4, 1)); 20803: mmuWriteLongData (a7, (int) d, 1); //オーバーフローのときは最小値または最大値 20804: XEiJ.regCCR = (double) Integer.MIN_VALUE - 1.0 < d && d < (double) Integer.MAX_VALUE + 1.0 ? 0 : XEiJ.REG_CCR_C; //NaN,±Infはエラー 20805: } //fpkCDTOL() 20806: 20807: //fpkCLTOF () 20808: // $FEE8 __CLTOF 20809: // 32bit符号あり整数を32bit浮動小数点数に変換する 20810: // <(a7).l:32bit符号あり整数。x 20811: // >(a7).s:32bit浮動小数点数。(float)x 20812: public static void fpkCLTOF () throws M68kException { 20813: //int→float→[int] 20814: int a7 = XEiJ.regRn[15]; 20815: mmuWriteLongData (a7, Float.floatToIntBits ((float) mmuReadLongData (a7, 1)), 1); 20816: } //fpkCLTOF() 20817: 20818: //fpkCFTOL () 20819: // $FEE9 __CFTOL 20820: // 32bit浮動小数点数を32bit符号あり整数に変換する 20821: // <(a7).s:32bit浮動小数点数。x 20822: // >(a7).l:32bit符号あり整数。(int)x 20823: // >ccr:cs=オーバーフロー。C以外は不定 20824: public static void fpkCFTOL () throws M68kException { 20825: //[int]→float→int 20826: int a7 = XEiJ.regRn[15]; 20827: float f = Float.intBitsToFloat (mmuReadLongData (a7, 1)); 20828: mmuWriteLongData (a7, (int) f, 1); 20829: XEiJ.regCCR = (float) Integer.MIN_VALUE - 1.0F < f && f < (float) Integer.MAX_VALUE + 1.0F ? 0 : XEiJ.REG_CCR_C; //NaN,±Infはエラー 20830: } //fpkCFTOL() 20831: 20832: //fpkCFTOD () 20833: // $FEEA __CFTOD 20834: // 32bit浮動小数点数を64bit浮動小数点数に変換する 20835: // <(a7).s:32bit浮動小数点数。x 20836: // >(a7).d:64bit浮動小数点数。(double)x 20837: public static void fpkCFTOD () throws M68kException { 20838: //[int]→float→double→[long]→[int,int] 20839: int a7 = XEiJ.regRn[15]; 20840: long l = Double.doubleToLongBits ((double) Float.intBitsToFloat (mmuReadLongData (a7, 1))); 20841: if (FEFunction.FPK_FPCP_NAN && l == 0x7ff8000000000000L) { 20842: l = 0x7fffffffffffffffL; 20843: } 20844: mmuWriteLongData (a7, (int) (l >>> 32), 1); 20845: mmuWriteLongData (a7 + 4, (int) l, 1); 20846: } //fpkCFTOD() 20847: 20848: //fpkCDTOF () 20849: // $FEEB __CDTOF 20850: // 64bit浮動小数点数を32bit浮動小数点数に変換する 20851: // <(a7).d:64bit浮動小数点数。x 20852: // >(a7).s:32bit浮動小数点数。(float)x 20853: // >ccr:cs=オーバーフロー。C以外は不定 20854: public static void fpkCDTOF () throws M68kException { 20855: //[int,int]→[long]→double→float→[int] 20856: int a7 = XEiJ.regRn[15]; 20857: double d = Double.longBitsToDouble ((long) mmuReadLongData (a7, 1) << 32 | 0xffffffffL & mmuReadLongData (a7 + 4, 1)); 20858: int h = Float.floatToIntBits ((float) d); 20859: if (FEFunction.FPK_FPCP_NAN && h == 0x7fc00000) { 20860: h = 0x7fffffff; 20861: } 20862: mmuWriteLongData (a7, h, 1); 20863: XEiJ.regCCR = (Double.isNaN (d) || Double.isInfinite (d) || 20864: Math.abs (d) < (double) Float.MAX_VALUE + 0.5 * (double) Math.ulp (Float.MAX_VALUE) ? 0 : XEiJ.REG_CCR_C); //アンダーフローはエラーなし 20865: } //fpkCDTOF() 20866: 20867: //fpkCDCMP () 20868: // $FEEC __CDCMP 20869: // 64bit浮動小数点数の比較 20870: // x<=>y 20871: // <(a7).d:64bit浮動小数点数。x 20872: // <8(a7).d:64bit浮動小数点数。y 20873: // >ccr:lt=x<y,eq=x==y,gt=x>y 20874: public static void fpkCDCMP () throws M68kException { 20875: //([int,int]→[long]→double)<=>([int,int]→[long]→double) 20876: int a7 = XEiJ.regRn[15]; 20877: double xd = Double.longBitsToDouble ((long) mmuReadLongData (a7, 1) << 32 | 0xffffffffL & mmuReadLongData (a7 + 4, 1)); 20878: double yd = Double.longBitsToDouble ((long) mmuReadLongData (a7 + 8, 1) << 32 | 0xffffffffL & mmuReadLongData (a7 + 12, 1)); 20879: XEiJ.regCCR = xd < yd ? XEiJ.REG_CCR_N | XEiJ.REG_CCR_C : xd == yd ? XEiJ.REG_CCR_Z : 0; //どちらかがNaNのときは0 20880: } //fpkCDCMP() 20881: 20882: //fpkCDADD () 20883: // $FEED __CDADD 20884: // 64bit浮動小数点数の加算 20885: // <(a7).d:64bit浮動小数点数。被加算数x 20886: // <8(a7).d:64bit浮動小数点数。加算数y 20887: // >(a7).d:64bit浮動小数点数。和x+y 20888: // >ccr:0=エラーなし,CCR_C=アンダーフロー,CCR_V|CCR_C=オーバーフロー 20889: public static void fpkCDADD () throws M68kException { 20890: //([int,int]→[long]→double)+([int,int]→[long]→double)→[long]→[int,int] 20891: int a7 = XEiJ.regRn[15]; 20892: double xd = Double.longBitsToDouble ((long) mmuReadLongData (a7, 1) << 32 | 0xffffffffL & mmuReadLongData (a7 + 4, 1)); 20893: double yd = Double.longBitsToDouble ((long) mmuReadLongData (a7 + 8, 1) << 32 | 0xffffffffL & mmuReadLongData (a7 + 12, 1)); 20894: double zd = xd + yd; 20895: long l = Double.doubleToLongBits (zd); 20896: if (FEFunction.FPK_FPCP_NAN && l == 0x7ff8000000000000L) { 20897: l = 0x7fffffffffffffffL; 20898: } 20899: mmuWriteLongData (a7, (int) (l >>> 32), 1); 20900: mmuWriteLongData (a7 + 4, (int) l, 1); 20901: XEiJ.regCCR = (Double.isNaN (xd) || Double.isNaN (yd) ? 0 : //引数がNaN 20902: Double.isNaN (zd) ? XEiJ.REG_CCR_C : //引数がNaNでないのに結果がNaNのときはエラー。(+Inf)+(-Inf)=NaN 20903: Double.isInfinite (xd) || Double.isInfinite (yd) ? 0 : //引数が±Inf 20904: Double.isInfinite (zd) ? XEiJ.REG_CCR_V | XEiJ.REG_CCR_C : //引数が±Infでないのに結果が±Infのときはオーバーフロー 20905: 0); 20906: } //fpkCDADD() 20907: 20908: //fpkCDSUB () 20909: // $FEEE __CDSUB 20910: // 64bit浮動小数点数の減算 20911: // <(a7).d:64bit浮動小数点数。被減算数x 20912: // <8(a7).d:64bit浮動小数点数。減算数y 20913: // >(a7).d:64bit浮動小数点数。差x-y 20914: // >ccr:cs=エラー,vs=オーバーフロー 20915: public static void fpkCDSUB () throws M68kException { 20916: //([int,int]→[long]→double)-([int,int]→[long]→double)→[long]→[int,int] 20917: int a7 = XEiJ.regRn[15]; 20918: double xd = Double.longBitsToDouble ((long) mmuReadLongData (a7, 1) << 32 | 0xffffffffL & mmuReadLongData (a7 + 4, 1)); 20919: double yd = Double.longBitsToDouble ((long) mmuReadLongData (a7 + 8, 1) << 32 | 0xffffffffL & mmuReadLongData (a7 + 12, 1)); 20920: double zd = xd - yd; 20921: long l = Double.doubleToLongBits (zd); 20922: if (FEFunction.FPK_FPCP_NAN && l == 0x7ff8000000000000L) { 20923: l = 0x7fffffffffffffffL; 20924: } 20925: mmuWriteLongData (a7, (int) (l >>> 32), 1); 20926: mmuWriteLongData (a7 + 4, (int) l, 1); 20927: XEiJ.regCCR = (Double.isNaN (xd) || Double.isNaN (yd) ? 0 : //引数がNaN 20928: Double.isNaN (zd) ? XEiJ.REG_CCR_C : //引数がNaNでないのに結果がNaNのときはエラー。(+Inf)-(+Inf)=NaN 20929: Double.isInfinite (xd) || Double.isInfinite (yd) ? 0 : //引数が±Inf 20930: Double.isInfinite (zd) ? XEiJ.REG_CCR_V | XEiJ.REG_CCR_C : //引数が±Infでないのに結果が±Infのときはオーバーフロー 20931: 0); 20932: } //fpkCDSUB() 20933: 20934: //fpkCDMUL () 20935: // $FEEF __CDMUL 20936: // 64bit浮動小数点数の乗算 20937: // <(a7).d:64bit浮動小数点数。被乗数x 20938: // <8(a7).d:64bit浮動小数点数。乗数y 20939: // >(a7).d:64bit浮動小数点数。積x*y 20940: // >ccr:cs=エラー,vs=オーバーフロー 20941: public static void fpkCDMUL () throws M68kException { 20942: //([int,int]→[long]→double)*([int,int]→[long]→double)→[long]→[int,int] 20943: int a7 = XEiJ.regRn[15]; 20944: double xd = Double.longBitsToDouble ((long) mmuReadLongData (a7, 1) << 32 | 0xffffffffL & mmuReadLongData (a7 + 4, 1)); 20945: double yd = Double.longBitsToDouble ((long) mmuReadLongData (a7 + 8, 1) << 32 | 0xffffffffL & mmuReadLongData (a7 + 12, 1)); 20946: double zd = xd * yd; 20947: long l = Double.doubleToLongBits (zd); 20948: if (FEFunction.FPK_FPCP_NAN && l == 0x7ff8000000000000L) { 20949: l = 0x7fffffffffffffffL; 20950: } 20951: mmuWriteLongData (a7, (int) (l >>> 32), 1); 20952: mmuWriteLongData (a7 + 4, (int) l, 1); 20953: XEiJ.regCCR = (Double.isNaN (xd) || Double.isNaN (yd) ? 0 : //引数がNaN 20954: Double.isNaN (zd) ? XEiJ.REG_CCR_C : //引数がNaNでないのに結果がNaNのときはエラー。(±0)*(±Inf)=NaN 20955: Double.isInfinite (xd) || Double.isInfinite (yd) ? 0 : //引数が±Inf 20956: Double.isInfinite (zd) ? XEiJ.REG_CCR_V | XEiJ.REG_CCR_C : //引数が±Infでないのに結果が±Infのときはオーバーフロー 20957: 0); 20958: } //fpkCDMUL() 20959: 20960: //fpkCDDIV () 20961: // $FEF0 __CDDIV 20962: // 64bit浮動小数点数の除算 20963: // <(a7).d:64bit浮動小数点数。被除数x 20964: // <8(a7).d:64bit浮動小数点数。除数y 20965: // >(a7).d:64bit浮動小数点数。商x/y。ゼロ除算のときは不定 20966: // >ccr:cs=エラー,eq=ゼロ除算,vs=オーバーフロー 20967: public static void fpkCDDIV () throws M68kException { 20968: //([int,int]→[long]→double)/([int,int]→[long]→double)→[long]→[int,int] 20969: int a7 = XEiJ.regRn[15]; 20970: double xd = Double.longBitsToDouble ((long) mmuReadLongData (a7, 1) << 32 | 0xffffffffL & mmuReadLongData (a7 + 4, 1)); 20971: double yd = Double.longBitsToDouble ((long) mmuReadLongData (a7 + 8, 1) << 32 | 0xffffffffL & mmuReadLongData (a7 + 12, 1)); 20972: double zd = xd / yd; 20973: long l = Double.doubleToLongBits (zd); 20974: if (FEFunction.FPK_FPCP_NAN && l == 0x7ff8000000000000L) { 20975: l = 0x7fffffffffffffffL; 20976: } 20977: mmuWriteLongData (a7, (int) (l >>> 32), 1); 20978: mmuWriteLongData (a7 + 4, (int) l, 1); 20979: XEiJ.regCCR = (Double.isNaN (xd) || Double.isNaN (yd) ? 0 : //引数がNaN 20980: Double.isNaN (zd) ? XEiJ.REG_CCR_C : //引数がNaNでないのに結果がNaNのときはエラー。(±0)/(±0)=NaN 20981: Double.isInfinite (xd) || Double.isInfinite (yd) ? 0 : //引数が±Inf。(±Inf)/(±0)=(±Inf) 20982: yd == 0.0 ? XEiJ.REG_CCR_Z | XEiJ.REG_CCR_C : //除数が±0のときはゼロ除算 20983: Double.isInfinite (zd) ? XEiJ.REG_CCR_V | XEiJ.REG_CCR_C : //引数が±Infでないのに結果が±Infのときはオーバーフロー 20984: 0); 20985: } //fpkCDDIV() 20986: 20987: //fpkCDMOD () 20988: // $FEF1 __CDMOD 20989: // 64bit浮動小数点数の剰余算 20990: // <(a7).d:64bit浮動小数点数。被除数x 20991: // <8(a7).d:64bit浮動小数点数。除数y 20992: // >(a7).d:64bit浮動小数点数。余りx%y。ゼロ除算のときは不定 20993: // >ccr:cs=エラー,eq=ゼロ除算 20994: public static void fpkCDMOD () throws M68kException { 20995: //([int,int]→[long]→double)%([int,int]→[long]→double)→[long]→[int,int] 20996: int a7 = XEiJ.regRn[15]; 20997: double xd = Double.longBitsToDouble ((long) mmuReadLongData (a7, 1) << 32 | 0xffffffffL & mmuReadLongData (a7 + 4, 1)); 20998: double yd = Double.longBitsToDouble ((long) mmuReadLongData (a7 + 8, 1) << 32 | 0xffffffffL & mmuReadLongData (a7 + 12, 1)); 20999: double zd = xd % yd; 21000: long l = Double.doubleToLongBits (zd); 21001: if (FEFunction.FPK_FPCP_NAN && l == 0x7ff8000000000000L) { 21002: l = 0x7fffffffffffffffL; 21003: } 21004: mmuWriteLongData (a7, (int) (l >>> 32), 1); 21005: mmuWriteLongData (a7 + 4, (int) l, 1); 21006: XEiJ.regCCR = (Double.isNaN (xd) || Double.isNaN (yd) ? 0 : //引数がNaN 21007: yd == 0.0 ? XEiJ.REG_CCR_Z | XEiJ.REG_CCR_C : //除数が0のときはゼロ除算。(±Inf)%(±0)=NaN, x%(±0)=(±Inf) 21008: Double.isNaN (zd) ? XEiJ.REG_CCR_C : //引数がNaNでないのに結果がNaNのときはエラー。(±Inf)%y=NaN 21009: Double.isInfinite (xd) || Double.isInfinite (yd) ? 0 : //引数が±Inf 21010: Double.isInfinite (zd) ? XEiJ.REG_CCR_V | XEiJ.REG_CCR_C : //引数が±Infでないのに結果が±Infのときはオーバーフロー 21011: 0); 21012: } //fpkCDMOD() 21013: 21014: //fpkCFCMP () 21015: // $FEF2 __CFCMP 21016: // 32bit浮動小数点数の比較 21017: // x<=>y 21018: // <(a7).s:32bit浮動小数点数。x 21019: // <(a7).s:32bit浮動小数点数。y 21020: // >ccr:lt=x<y,eq=x==y,gt=x>y 21021: public static void fpkCFCMP () throws M68kException { 21022: //([int]→float)<=>([int]→float) 21023: int a7 = XEiJ.regRn[15]; 21024: float xf = Float.intBitsToFloat (mmuReadLongData (a7, 1)); 21025: float yf = Float.intBitsToFloat (mmuReadLongData (a7 + 4, 1)); 21026: XEiJ.regCCR = xf < yf ? XEiJ.REG_CCR_N | XEiJ.REG_CCR_C : xf == yf ? XEiJ.REG_CCR_Z : 0; //どちらかがNaNのときは0 21027: } //fpkCFCMP() 21028: 21029: //fpkCFADD () 21030: // $FEF3 __CFADD 21031: // 32bit浮動小数点数の加算 21032: // <(a7).s:32bit浮動小数点数。被加算数x 21033: // <4(a7).s:32bit浮動小数点数。加算数y 21034: // >(a7).s:32bit浮動小数点数。和x+y 21035: // >ccr:cs=エラー,vs=オーバーフロー 21036: public static void fpkCFADD () throws M68kException { 21037: //([int]→float)+([int]→float)→[int] 21038: int a7 = XEiJ.regRn[15]; 21039: float xf = Float.intBitsToFloat (mmuReadLongData (a7, 1)); 21040: float yf = Float.intBitsToFloat (mmuReadLongData (a7 + 4, 1)); 21041: float zf = xf + yf; 21042: int h = Float.floatToIntBits (zf); 21043: if (FEFunction.FPK_FPCP_NAN && h == 0x7fc00000) { 21044: h = 0x7fffffff; 21045: } 21046: mmuWriteLongData (a7, h, 1); 21047: XEiJ.regCCR = (Float.isNaN (xf) || Float.isNaN (yf) ? 0 : //引数がNaN 21048: Float.isNaN (zf) ? XEiJ.REG_CCR_C : //引数がNaNでないのに結果がNaNのときはエラー。(+Inf)+(-Inf)=NaN 21049: Float.isInfinite (xf) || Float.isInfinite (yf) ? 0 : //引数が±Inf 21050: Float.isInfinite (zf) ? XEiJ.REG_CCR_V | XEiJ.REG_CCR_C : //引数が±Infでないのに結果が±Infのときはオーバーフロー 21051: 0); 21052: } //fpkCFADD() 21053: 21054: //fpkCFSUB () 21055: // $FEF4 __CFSUB 21056: // 32bit浮動小数点数の減算 21057: // <(a7).s:32bit浮動小数点数。被減算数x 21058: // <4(a7).s:32bit浮動小数点数。減算数y 21059: // >(a7).s:32bit浮動小数点数。差x-y 21060: // >ccr:cs=エラー,vs=オーバーフロー 21061: public static void fpkCFSUB () throws M68kException { 21062: //([int]→float)-([int]→float)→[int] 21063: int a7 = XEiJ.regRn[15]; 21064: float xf = Float.intBitsToFloat (mmuReadLongData (a7, 1)); 21065: float yf = Float.intBitsToFloat (mmuReadLongData (a7 + 4, 1)); 21066: float zf = xf - yf; 21067: int h = Float.floatToIntBits (zf); 21068: if (FEFunction.FPK_FPCP_NAN && h == 0x7fc00000) { 21069: h = 0x7fffffff; 21070: } 21071: mmuWriteLongData (a7, h, 1); 21072: XEiJ.regCCR = (Float.isNaN (xf) || Float.isNaN (yf) ? 0 : //引数がNaN 21073: Float.isNaN (zf) ? XEiJ.REG_CCR_C : //引数がNaNでないのに結果がNaNのときはエラー。(+Inf)-(+Inf)=NaN 21074: Float.isInfinite (xf) || Float.isInfinite (yf) ? 0 : //引数が±Inf 21075: Float.isInfinite (zf) ? XEiJ.REG_CCR_V | XEiJ.REG_CCR_C : //引数が±Infでないのに結果が±Infのときはオーバーフロー 21076: 0); 21077: } //fpkCFSUB() 21078: 21079: //fpkCFMUL () 21080: // $FEF5 __CFMUL 21081: // 32bit浮動小数点数の乗算 21082: // <(a7).s:32bit浮動小数点数。被乗数x 21083: // <4(a7).s:32bit浮動小数点数。乗数y 21084: // >(a7).s:32bit浮動小数点数。積x*y 21085: // >ccr:0=エラーなし,CCR_C=アンダーフロー,CCR_V|CCR_C=オーバーフロー 21086: public static void fpkCFMUL () throws M68kException { 21087: //([int]→float)*([int]→float)→[int] 21088: int a7 = XEiJ.regRn[15]; 21089: float xf = Float.intBitsToFloat (mmuReadLongData (a7, 1)); 21090: float yf = Float.intBitsToFloat (mmuReadLongData (a7 + 4, 1)); 21091: float zf = xf * yf; 21092: int h = Float.floatToIntBits (zf); 21093: if (FEFunction.FPK_FPCP_NAN && h == 0x7fc00000) { 21094: h = 0x7fffffff; 21095: } 21096: mmuWriteLongData (a7, h, 1); 21097: XEiJ.regCCR = (Float.isNaN (xf) || Float.isNaN (yf) ? 0 : //引数がNaN 21098: Float.isNaN (zf) ? XEiJ.REG_CCR_C : //引数がNaNでないのに結果がNaNのときはエラー。(±0)*(±Inf)=NaN 21099: Float.isInfinite (xf) || Float.isInfinite (yf) ? 0 : //引数が±Inf 21100: Float.isInfinite (zf) ? XEiJ.REG_CCR_V | XEiJ.REG_CCR_C : //引数が±Infでないのに結果が±Infのときはオーバーフロー 21101: 0); 21102: } //fpkCFMUL() 21103: 21104: //fpkCFDIV () 21105: // $FEF6 __CFDIV 21106: // 32bit浮動小数点数の除算 21107: // <(a7).s:32bit浮動小数点数。被除数x 21108: // <4(a7).s:32bit浮動小数点数。除数y 21109: // >(a7).s:32bit浮動小数点数。商x/y。ゼロ除算のときは不定 21110: // >ccr:cs=エラー,eq=ゼロ除算,vs=オーバーフロー 21111: public static void fpkCFDIV () throws M68kException { 21112: //([int]→float)/([int]→float)→[int] 21113: int a7 = XEiJ.regRn[15]; 21114: float xf = Float.intBitsToFloat (mmuReadLongData (a7, 1)); 21115: float yf = Float.intBitsToFloat (mmuReadLongData (a7 + 4, 1)); 21116: float zf = xf / yf; 21117: int h = Float.floatToIntBits (zf); 21118: if (FEFunction.FPK_FPCP_NAN && h == 0x7fc00000) { 21119: h = 0x7fffffff; 21120: } 21121: mmuWriteLongData (a7, h, 1); 21122: XEiJ.regCCR = (Float.isNaN (xf) || Float.isNaN (yf) ? 0 : //引数がNaN 21123: Float.isNaN (zf) ? XEiJ.REG_CCR_C : //引数がNaNでないのに結果がNaNのときはエラー。(±0)/(±0)=NaN 21124: Float.isInfinite (xf) || Float.isInfinite (yf) ? 0 : //引数が±Inf。(±Inf)/(±0)=(±Inf) 21125: yf == 0.0F ? XEiJ.REG_CCR_Z | XEiJ.REG_CCR_C : //除数が±0のときはゼロ除算 21126: Float.isInfinite (zf) ? XEiJ.REG_CCR_V | XEiJ.REG_CCR_C : //引数が±Infでないのに結果が±Infのときはオーバーフロー 21127: 0); 21128: } //fpkCFDIV() 21129: 21130: //fpkCFMOD () 21131: // $FEF7 __CFMOD 21132: // 32bit浮動小数点数の剰余算 21133: // <(a7).s:32bit浮動小数点数。被除数x 21134: // <4(a7).s:32bit浮動小数点数。除数y 21135: // >(a7).s:32bit浮動小数点数。余りx%y。ゼロ除算のときは不定 21136: // >ccr:cs=エラー,eq=ゼロ除算 21137: public static void fpkCFMOD () throws M68kException { 21138: //([int]→float)%([int]→float)→[int] 21139: int a7 = XEiJ.regRn[15]; 21140: float xf = Float.intBitsToFloat (mmuReadLongData (a7, 1)); 21141: float yf = Float.intBitsToFloat (mmuReadLongData (a7 + 4, 1)); 21142: float zf = xf % yf; 21143: int h = Float.floatToIntBits (zf); 21144: if (FEFunction.FPK_FPCP_NAN && h == 0x7fc00000) { 21145: h = 0x7fffffff; 21146: } 21147: mmuWriteLongData (a7, h, 1); 21148: XEiJ.regCCR = (Float.isNaN (xf) || Float.isNaN (yf) ? 0 : //引数がNaN 21149: yf == 0.0F ? XEiJ.REG_CCR_Z | XEiJ.REG_CCR_C : //除数が0のときはゼロ除算。(±Inf)%(±0)=NaN, x%(±0)=(±Inf) 21150: Float.isNaN (zf) ? XEiJ.REG_CCR_C : //引数がNaNでないのに結果がNaNのときはエラー。(±Inf)%y=NaN 21151: Float.isInfinite (xf) || Float.isInfinite (yf) ? 0 : //引数が±Inf 21152: Float.isInfinite (zf) ? XEiJ.REG_CCR_V | XEiJ.REG_CCR_C : //引数が±Infでないのに結果が±Infのときはオーバーフロー 21153: 0); 21154: } //fpkCFMOD() 21155: 21156: //fpkCDTST () 21157: // $FEF8 __CDTST 21158: // 64bit浮動小数点数と0の比較 21159: // x<=>0 21160: // <(a7).d:64bit浮動小数点数。x 21161: // >ccr:lt=x<0,eq=x==0,gt=x>0 21162: public static void fpkCDTST () throws M68kException { 21163: if (true) { 21164: int a7 = XEiJ.regRn[15]; 21165: long l = (long) mmuReadLongData (a7, 1) << 32 | 0xffffffffL & mmuReadLongData (a7 + 4, 1); 21166: XEiJ.regCCR = l << 1 == 0L ? XEiJ.REG_CCR_Z : 0L <= l ? 0 : XEiJ.REG_CCR_N; //NaNのときは0 21167: } else { 21168: //[int,int]→[long]→double 21169: int a7 = XEiJ.regRn[15]; 21170: double d = Double.longBitsToDouble ((long) mmuReadLongData (a7, 1) << 32 | 0xffffffffL & mmuReadLongData (a7 + 4, 1)); 21171: XEiJ.regCCR = d < 0.0 ? XEiJ.REG_CCR_N : d == 0.0 ? XEiJ.REG_CCR_Z : 0; //NaNのときは0 21172: } 21173: } //fpkCDTST() 21174: 21175: //fpkCFTST () 21176: // $FEF9 __CFTST 21177: // 32bit浮動小数点数と0の比較 21178: // x<=>0 21179: // <(a7).s:32bit浮動小数点数。x 21180: // >ccr:lt=x<0,eq=x==0,gt=x>0 21181: public static void fpkCFTST () throws M68kException { 21182: //[int]→float 21183: if (true) { 21184: int h = mmuReadLongData (XEiJ.regRn[15], 1); 21185: XEiJ.regCCR = h << 1 == 0 ? XEiJ.REG_CCR_Z : 0 <= h ? 0 : XEiJ.REG_CCR_N; //NaNのときは0 21186: } else { 21187: //([int]→float)<=>0 21188: float f = Float.intBitsToFloat (mmuReadLongData (XEiJ.regRn[15], 1)); 21189: XEiJ.regCCR = f < 0.0F ? XEiJ.REG_CCR_N : f == 0.0F ? XEiJ.REG_CCR_Z : 0; //NaNのときは0 21190: } 21191: } //fpkCFTST() 21192: 21193: //fpkCDINC () 21194: // $FEFA __CDINC 21195: // 64bit浮動小数点数に1を加える 21196: // <(a7).d:64bit浮動小数点数。x 21197: // >(a7).d:64bit浮動小数点数。x+1 21198: public static void fpkCDINC () throws M68kException { 21199: //([int,int]→[long]→double)+1→[long]→[int,int] 21200: int a7 = XEiJ.regRn[15]; 21201: double xd = Double.longBitsToDouble ((long) mmuReadLongData (a7, 1) << 32 | 0xffffffffL & mmuReadLongData (a7 + 4, 1)); 21202: double zd = xd + 1.0; 21203: long l = Double.doubleToLongBits (zd); 21204: if (FEFunction.FPK_FPCP_NAN && l == 0x7ff8000000000000L) { 21205: l = 0x7fffffffffffffffL; 21206: } 21207: mmuWriteLongData (a7, (int) (l >>> 32), 1); 21208: mmuWriteLongData (a7 + 4, (int) l, 1); 21209: XEiJ.regCCR = Double.isInfinite (zd) && !Double.isInfinite (xd) ? XEiJ.REG_CCR_V | XEiJ.REG_CCR_C : 0; //結果が±Infだが引数が±Infでないときはオーバーフロー 21210: } //fpkCDINC() 21211: 21212: //fpkCFINC () 21213: // $FEFB __CFINC 21214: // 32bit浮動小数点数に1を加える 21215: // <(a7).s:32bit浮動小数点数。x 21216: // >(a7).s:32bit浮動小数点数。x+1 21217: public static void fpkCFINC () throws M68kException { 21218: //([int]→float)+1→[int] 21219: int a7 = XEiJ.regRn[15]; 21220: float xf = Float.intBitsToFloat (mmuReadLongData (a7, 1)); 21221: float zf = xf + 1.0F; 21222: int h = Float.floatToIntBits (zf); 21223: if (FEFunction.FPK_FPCP_NAN && h == 0x7fc00000) { 21224: h = 0x7fffffff; 21225: } 21226: mmuWriteLongData (a7, h, 1); 21227: XEiJ.regCCR = Double.isInfinite (zf) && !Float.isInfinite (xf) ? XEiJ.REG_CCR_V | XEiJ.REG_CCR_C : 0; //結果が±Infだが引数が±Infでないときはオーバーフロー 21228: } //fpkCFINC() 21229: 21230: //fpkCDDEC () 21231: // $FEFC __CDDEC 21232: // 64bit浮動小数点数から1を引く 21233: // <(a7).d:64bit浮動小数点数。x 21234: // >(a7).d:64bit浮動小数点数。x-1 21235: public static void fpkCDDEC () throws M68kException { 21236: //([int,int]→[long]→double)-1→[long]→[int,int] 21237: int a7 = XEiJ.regRn[15]; 21238: double xd = Double.longBitsToDouble ((long) mmuReadLongData (a7, 1) << 32 | 0xffffffffL & mmuReadLongData (a7 + 4, 1)); 21239: double zd = xd - 1.0; 21240: long l = Double.doubleToLongBits (zd); 21241: if (FEFunction.FPK_FPCP_NAN && l == 0x7ff8000000000000L) { 21242: l = 0x7fffffffffffffffL; 21243: } 21244: mmuWriteLongData (a7, (int) (l >>> 32), 1); 21245: mmuWriteLongData (a7 + 4, (int) l, 1); 21246: XEiJ.regCCR = Double.isInfinite (zd) && !Double.isInfinite (xd) ? XEiJ.REG_CCR_V | XEiJ.REG_CCR_C : 0; //結果が±Infだが引数が±Infでないときはオーバーフロー 21247: } //fpkCDDEC() 21248: 21249: //fpkCFDEC () 21250: // $FEFD __CFDEC 21251: // 32bit浮動小数点数から1を引く 21252: // <(a7).s:32bit浮動小数点数。x 21253: // >(a7).s:32bit浮動小数点数。x-1 21254: public static void fpkCFDEC () throws M68kException { 21255: //([int]→float)-1→[int] 21256: int a7 = XEiJ.regRn[15]; 21257: float xf = Float.intBitsToFloat (mmuReadLongData (a7, 1)); 21258: float zf = xf - 1.0F; 21259: int h = Float.floatToIntBits (zf); 21260: if (FEFunction.FPK_FPCP_NAN && h == 0x7fc00000) { 21261: h = 0x7fffffff; 21262: } 21263: mmuWriteLongData (a7, h, 1); 21264: XEiJ.regCCR = Double.isInfinite (zf) && !Float.isInfinite (xf) ? XEiJ.REG_CCR_V | XEiJ.REG_CCR_C : 0; //結果が±Infだが引数が±Infでないときはオーバーフロー 21265: } //fpkCFDEC() 21266: 21267: 21268: 21269: //======================================================================================== 21270: //$$MMU メモリ管理ユニット 21271: 21272: public static final boolean MMU_DEBUG_COMMAND = false; 21273: public static final boolean MMU_DEBUG_TRANSLATION = false; 21274: public static final boolean MMU_NOT_ALLOCATE_CACHE = false; //true=アドレス変換キャッシュをアロケートしない 21275: 21276: //-------------------------------------------------------------------------------- 21277: //論理アドレスと物理アドレス 21278: // 21279: // ページサイズが4KBの場合 21280: // ┌── 7 ──┬── 7 ──┬── 6──┬─────12─────┐ 21281: // 31 2524 1817 1211 0 21282: // ┏━━━━━━┯━━━━━━┯━━━━━┯━━━━━━━━━━━┓ 21283: // 論理 ┃ ルート │ ポインタ │ ページ │ ページ ┃ 21284: // アドレス┃インデックス│インデックス インデックス オフセット ┃ 21285: // ┗━━↓━━━┷━━↓━━━┷━━↓━━┷━━━━━↓━━━━━┛ 21286: // ┌────┘ │ └────┐ └──────┐ 21287: // │ ルートテーブル │ ポインタテーブル │ ページテーブル │ 21288: // ┌┼→┏━━━━━━━┓┌┼→┏━━━━━━━┓┌┼→┏━━━━━━━┓│ 21289: // ││ 0┃ ┃││ 0┃ ┃││ 0┃ ┃│ 21290: // ││ ┃ ┃││ ┃ ┃│└→┠───────┨│ 21291: // │└→┠───────┨││ ┃ ┃│ ┃ ページ ┃│ 21292: // ルート ┃ ルート ┃│└→┠───────┨│┌─←ディスクリプタ┃│ 21293: // ポインタ ┃ディスクリプタ→┘ ┃ ポインタ ┃││ ┠───────┨│ 21294: // ┠───────┨ ┃ディスクリプタ→┘│63┃ ┃│ 21295: // ┃ ┃ ┠───────┨ │ ┗━━━━━━━┛│ 21296: // 127┃ ┃ 127┃ ┃ │ │ 21297: // ┗━━━━━━━┛ ┗━━━━━━━┛ │ │ 21298: // ┌───────────┘ ┌──────┘ 21299: // ┏━━━━━━━━━↓━━━━━━━━━┯━━━━━↓━━━━━┓ 21300: // 物理 ┃ 物理ページ │ ページ ┃ 21301: // アドレス┃ アドレス │ オフセット ┃ 21302: // ┗━━━━━━━━━━━━━━━━━━━┷━━━━━━━━━━━┛ 21303: // 31 1211 0 21304: // └─────────20─────────┴─────12─────┘ 21305: // 21306: // ページサイズが8KBの場合 21307: // ┌── 7 ──┬── 7 ──┬─ 5 ─┬───── 13 ─────┐ 21308: // 31 2524 1817 1312 0 21309: // ┏━━━━━━┯━━━━━━┯━━━━┯━━━━━━━━━━━━┓ 21310: // 論理 ┃ ルート │ ポインタ │ ページ │ ページ ┃ 21311: // アドレス┃インデックス│インデックスインデックス オフセット ┃ 21312: // ┗━━↓━━━┷━━↓━━━┷━━↓━┷━━━━━━↓━━━━━┛ 21313: // ┌────┘ │ └────┐ └──────┐ 21314: // │ ルートテーブル │ ポインタテーブル │ ページテーブル │ 21315: // ┌┼→┏━━━━━━━┓┌┼→┏━━━━━━━┓┌┼→┏━━━━━━━┓│ 21316: // ││ 0┃ ┃││ 0┃ ┃││ 0┃ ┃│ 21317: // ││ ┃ ┃││ ┃ ┃│└→┠───────┨│ 21318: // │└→┠───────┨││ ┃ ┃│ ┃ ページ ┃│ 21319: // ルート ┃ ルート ┃│└→┠───────┨│┌─←ディスクリプタ┃│ 21320: // ポインタ ┃ディスクリプタ→┘ ┃ ポインタ ┃││ ┠───────┨│ 21321: // ┠───────┨ ┃ディスクリプタ→┘│31┃ ┃│ 21322: // ┃ ┃ ┠───────┨ │ ┗━━━━━━━┛│ 21323: // 127┃ ┃ 127┃ ┃ │ │ 21324: // ┗━━━━━━━┛ ┗━━━━━━━┛ │ │ 21325: // ┌───────────┘ ┌──────┘ 21326: // ┏━━━━━━━━━↓━━━━━━━━┯━━━━━━↓━━━━━┓ 21327: // 物理 ┃ 物理ページ │ ページ ┃ 21328: // アドレス┃ アドレス │ オフセット ┃ 21329: // ┗━━━━━━━━━━━━━━━━━━┷━━━━━━━━━━━━┛ 21330: // 31 1312 0 21331: // └──────── 19 ────────┴───── 13 ─────┘ 21332: // 21333: public static final int MMU_ROOT_INDEX_BIT0 = 25; 21334: public static final int MMU_POINTER_INDEX_BIT0 = 18; 21335: public static final int MMU_PAGE_INDEX_BIT0_4KB = 12; 21336: public static final int MMU_PAGE_INDEX_BIT0_8KB = 13; 21337: public static final int MMU_PAGE_SIZE_4KB = 1 << MMU_PAGE_INDEX_BIT0_4KB; 21338: public static final int MMU_PAGE_SIZE_8KB = 1 << MMU_PAGE_INDEX_BIT0_8KB; 21339: // 33222222_22221111_111111 21340: // 10987654_32109876_54321098_76543210 21341: public static final int MMU_ROOT_INDEX_MASK = 0b11111110_00000000_00000000_00000000; 21342: public static final int MMU_POINTER_INDEX_MASK = 0b00000001_11111100_00000000_00000000; 21343: public static final int MMU_PAGE_INDEX_MASK_4KB = 0b00000000_00000011_11110000_00000000; 21344: public static final int MMU_PAGE_INDEX_MASK_8KB = 0b00000000_00000011_11100000_00000000; 21345: public static final int MMU_PAGE_OFFSET_MASK_4KB = 0b00000000_00000000_00001111_11111111; 21346: public static final int MMU_PAGE_OFFSET_MASK_8KB = 0b00000000_00000000_00011111_11111111; 21347: public static final int MMU_PAGE_ADDRESS_MASK_4KB = 0b11111111_11111111_11110000_00000000; 21348: public static final int MMU_PAGE_ADDRESS_MASK_8KB = 0b11111111_11111111_11100000_00000000; 21349: 21350: //-------------------------------------------------------------------------------- 21351: //透過変換レジスタ 21352: // 21353: // DTT0 データ透過変換レジスタ0 21354: // DTT1 データ透過変換レジスタ1 21355: // ITT0 命令透過変換レジスタ0 21356: // ITT1 命令透過変換レジスタ1 21357: // 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 21358: // ┏━━━━━━━━━━━━━━━┯━━━━━━━━━━━━━━━┯━┯━┯━┯━━━━━┯━┯━┯━┯━━━┯━━━┯━┯━━━┓ 21359: // ┃ 論理アドレスベース │ 論理アドレスマスク │ E│IS│US│ 0 │U1│U0│ 0│ CM │ 0 │ W│ 0 ┃ 21360: // ┗━━━━━━━━━━━━━━━┷━━━━━━━━━━━━━━━┷━┷━┷━┷━━━━━┷━┷━┷━┷━━━┷━━━┷━┷━━━┛ 21361: public static final int MMU_TTR_BASE = 255 << 24; //x Logical Address Base 21362: public static final int MMU_TTR_MASK = 255 << 16; //x Logical Address Mask 21363: public static final int MMU_TTR_ENABLE = 1 << 15; //x E Enable 21364: public static final int MMU_TTR_IGNORE_FC2 = 1 << 14; //x IS Ignore FC2 when matching 21365: public static final int MMU_TTR_USER_SUPERVISOR = 1 << 13; //x US User or Supervisor when IS=0 21366: public static final int MMU_TTR_US_USER = 0 << 13; // Match only if FC2=0 (user mode access) 21367: public static final int MMU_TTR_US_SUPERVISOR = 1 << 13; // Match only if FC2=1 (supervisor mode access) 21368: public static final int MMU_TTR_WRITE_PROTECT = 1 << 2; //x W Write Protect 21369: public static int mmuDTT0; //DTT0 21370: public static int mmuDTT1; //DTT1 21371: public static int mmuITT0; //ITT0 21372: public static int mmuITT1; //ITT1 21373: // 透過変換マップ 21374: // インデックス 21375: // a >>> 24 21376: // 値 21377: // -1 透過変換あり,ライトプロテクトあり → リードのときアドレス変換なし、ライトのときアクセスフォルト 21378: // 0 透過変換なし → アドレス変換あり 21379: // 1 透過変換あり,ライトプロテクトなし → アドレス変換なし 21380: public static int[] mmuUserDataTransparent; //ユーザデータ透過変換マップ 21381: public static int[] mmuUserCodeTransparent; //ユーザ命令透過変換マップ 21382: public static int[] mmuSuperDataTransparent; //スーパーバイザデータ透過変換マップ 21383: public static int[] mmuSuperCodeTransparent; //スーパーバイザ命令透過変換マップ 21384: public static int[] mmuUserDataDifference; //ユーザデータ透過変換差分マップ 21385: public static int[] mmuUserCodeDifference; //ユーザ命令透過変換差分マップ 21386: public static int[] mmuSuperDataDifference; //スーパーバイザデータ透過変換差分マップ 21387: public static int[] mmuSuperCodeDifference; //スーパーバイザ命令透過変換差分マップ 21388: 21389: //d = mmuGetDTT0 () 21390: // DTT0を読む 21391: public static int mmuGetDTT0 () { 21392: return mmuDTT0; 21393: } //mmuGetDTT0() 21394: 21395: //d = mmuGetDTT1 () 21396: // DTT1を読む 21397: public static int mmuGetDTT1 () { 21398: return mmuDTT1; 21399: } //mmuGetDTT1() 21400: 21401: //d = mmuGetITT0 () 21402: // ITT0を読む 21403: public static int mmuGetITT0 () { 21404: return mmuITT0; 21405: } //mmuGetITT0() 21406: 21407: //d = mmuGetITT1 () 21408: // ITT1を読む 21409: public static int mmuGetITT1 () { 21410: return mmuITT1; 21411: } //mmuGetITT1() 21412: 21413: //mmuSetDTT0 (d) 21414: // DTT0に書く 21415: public static void mmuSetDTT0 (int d) { 21416: mmuSetDataTransparent (d, mmuDTT1); 21417: if (MMU_DEBUG_COMMAND) { 21418: System.out.printf ("%08x mmuSetDTT0(0x%08x)\n", XEiJ.regPC0, mmuDTT0); 21419: } 21420: } //mmuSetDTT0(int) 21421: 21422: //mmuSetDTT1 (d) 21423: // DTT1に書く 21424: public static void mmuSetDTT1 (int d) { 21425: mmuSetDataTransparent (mmuDTT0, d); 21426: if (MMU_DEBUG_COMMAND) { 21427: System.out.printf ("%08x mmuSetDTT1(0x%08x)\n", XEiJ.regPC0, mmuDTT1); 21428: } 21429: } //mmuSetDTT1(int) 21430: 21431: //mmuSetDataTransparent (d0, d1) 21432: // DTT0,DTT1に書く 21433: // データ透過変換マップを更新する 21434: // DTT0とDTT1の両方がヒットするときDTT0を用いるため、DTT1の変換を展開してからDTT0の変換を上書きする 21435: // DTT1でライトプロテクトされていてもDTT0でライトプロテクトされていなければ書き込める 21436: public static void mmuSetDataTransparent (int d0, int d1) { 21437: mmuDTT0 = d0 & 0xffffe364; 21438: mmuDTT1 = d1 & 0xffffe364; 21439: //透過変換マップと透過変換差分マップを入れ換える 21440: { 21441: int[] t = mmuUserDataDifference; 21442: mmuUserDataDifference = mmuUserDataTransparent; 21443: mmuUserDataTransparent = t; 21444: t = mmuSuperDataDifference; 21445: mmuSuperDataDifference = mmuSuperDataTransparent; 21446: mmuSuperDataTransparent = t; 21447: } 21448: //透過変換マップを構築する 21449: Arrays.fill (mmuUserDataTransparent, 0); //透過変換なし 21450: Arrays.fill (mmuSuperDataTransparent, 0); //透過変換なし 21451: if ((short) mmuDTT1 < 0) { //(mmuDTT1 & MMU_TTR_ENABLE) != 0。有効 21452: int mask = ~mmuDTT1 >>> 16 & 255; 21453: int base = mmuDTT1 >>> 24 & mask; 21454: int writeProtect = (mmuDTT1 & MMU_TTR_WRITE_PROTECT) != 0 ? -1 : 1; //-1=ライトプロテクトあり,1=ライトプロテクトなし 21455: if ((mmuDTT1 & MMU_TTR_IGNORE_FC2) != 0 || 21456: (mmuDTT1 & MMU_TTR_USER_SUPERVISOR) == MMU_TTR_US_USER) { //ユーザモードで有効 21457: for (int block = 0; block < 256; block++) { 21458: //if (((block << 24 ^ mmuDTT1) & ~mmuDTT1 << 8) >>> 24 == 0) { 21459: if ((block & mask) == base) { 21460: mmuUserDataTransparent[block] = writeProtect; 21461: } 21462: } 21463: } 21464: if ((mmuDTT1 & MMU_TTR_IGNORE_FC2) != 0 || 21465: (mmuDTT1 & MMU_TTR_USER_SUPERVISOR) == MMU_TTR_US_SUPERVISOR) { //スーパーバイザモードで有効 21466: for (int block = 0; block < 256; block++) { 21467: //if (((block << 24 ^ mmuDTT1) & ~mmuDTT1 << 8) >>> 24 == 0) { 21468: if ((block & mask) == base) { 21469: mmuSuperDataTransparent[block] = writeProtect; 21470: } 21471: } 21472: } 21473: } 21474: if ((short) mmuDTT0 < 0) { //(mmuDTT0 & MMU_TTR_ENABLE) != 0。有効 21475: int mask = ~mmuDTT0 >>> 16 & 255; 21476: int base = mmuDTT0 >>> 24 & mask; 21477: int writeProtect = (mmuDTT0 & MMU_TTR_WRITE_PROTECT) != 0 ? -1 : 1; //-1=ライトプロテクトあり,1=ライトプロテクトなし 21478: if ((mmuDTT0 & MMU_TTR_IGNORE_FC2) != 0 || 21479: (mmuDTT0 & MMU_TTR_USER_SUPERVISOR) == MMU_TTR_US_USER) { //ユーザモードで有効 21480: for (int block = 0; block < 256; block++) { 21481: //if (((block << 24 ^ mmuDTT0) & ~mmuDTT0 << 8) >>> 24 == 0) { 21482: if ((block & mask) == base) { 21483: mmuUserDataTransparent[block] = writeProtect; 21484: } 21485: } 21486: } 21487: if ((mmuDTT0 & MMU_TTR_IGNORE_FC2) != 0 || 21488: (mmuDTT0 & MMU_TTR_USER_SUPERVISOR) == MMU_TTR_US_SUPERVISOR) { //スーパーバイザモードで有効 21489: for (int block = 0; block < 256; block++) { 21490: //if (((block << 24 ^ mmuDTT0) & ~mmuDTT0 << 8) >>> 24 == 0) { 21491: if ((block & mask) == base) { 21492: mmuSuperDataTransparent[block] = writeProtect; 21493: } 21494: } 21495: } 21496: } 21497: //透過変換差分マップを作る 21498: int difference = 0; 21499: for (int block = 0; block < 256; block++) { 21500: difference |= mmuUserDataDifference[block] -= mmuUserDataTransparent[block]; 21501: difference |= mmuSuperDataDifference[block] -= mmuSuperDataTransparent[block]; 21502: } 21503: //透過変換の状態が変化したブロックのエントリを無効化する 21504: if (difference != 0) { 21505: for (int i = 0; i < 4 * MMU_CACHE_WAYS * MMU_HASH_SIZE; i += 4) { 21506: int logicalPage = mmuUserDataCache[i]; 21507: if (logicalPage != 1 && //有効なエントリで 21508: mmuUserDataDifference[logicalPage >>> 24] != 0) { //透過変換の状態が変化した 21509: mmuUserDataCache[i] = mmuUserDataCache[i + 1] = mmuUserDataCache[i + 2] = mmuUserDataCache[i + 3] = 1; //無効化する 21510: } 21511: logicalPage = mmuSuperDataCache[i]; 21512: if (logicalPage != 1 && //有効なエントリで 21513: mmuSuperDataDifference[logicalPage >>> 24] != 0) { //透過変換の状態が変化した 21514: mmuSuperDataCache[i] = mmuSuperDataCache[i + 1] = mmuSuperDataCache[i + 2] = mmuSuperDataCache[i + 3] = 1; //無効化する 21515: } 21516: } 21517: } 21518: } //mmuSetDataTransparent(int,int) 21519: 21520: //mmuSetITT0 (d) 21521: // ITT0に書く 21522: public static void mmuSetITT0 (int d) { 21523: mmuSetCodeTransparent (d, mmuITT1); 21524: if (MMU_DEBUG_COMMAND) { 21525: System.out.printf ("%08x mmuSetITT0(0x%08x)\n", XEiJ.regPC0, mmuITT0); 21526: } 21527: } //mmuSetITT0(int) 21528: 21529: //mmuSetITT1 (d) 21530: // ITT1に書く 21531: public static void mmuSetITT1 (int d) { 21532: mmuSetCodeTransparent (mmuITT0, d); 21533: if (MMU_DEBUG_COMMAND) { 21534: System.out.printf ("%08x mmuSetITT1(0x%08x)\n", XEiJ.regPC0, mmuITT1); 21535: } 21536: } //mmuSetITT1(int) 21537: 21538: //mmuSetCodeTransparent (d0, d1) 21539: // ITT0,ITT1に書く 21540: // 命令透過変換マップを更新する 21541: // ITT0とITT1の両方がヒットするときITT0を用いるため、ITT1の変換を展開してからITT0の変換を上書きする 21542: public static void mmuSetCodeTransparent (int d0, int d1) { 21543: mmuITT0 = d0 & 0xffffe364; 21544: mmuITT1 = d1 & 0xffffe364; 21545: //透過変換マップと透過変換差分マップを入れ換える 21546: { 21547: int[] t = mmuUserCodeDifference; 21548: mmuUserCodeDifference = mmuUserCodeTransparent; 21549: mmuUserCodeTransparent = t; 21550: t = mmuSuperCodeDifference; 21551: mmuSuperCodeDifference = mmuSuperCodeTransparent; 21552: mmuSuperCodeTransparent = t; 21553: } 21554: //透過変換マップを構築する 21555: Arrays.fill (mmuUserCodeTransparent, 0); //透過変換なし 21556: Arrays.fill (mmuSuperCodeTransparent, 0); //透過変換なし 21557: if ((short) mmuITT1 < 0) { //(mmuITT1 & MMU_TTR_ENABLE) != 0。有効 21558: int mask = ~mmuITT1 >>> 16 & 255; 21559: int base = mmuITT1 >>> 24 & mask; 21560: int writeProtect = (mmuITT1 & MMU_TTR_WRITE_PROTECT) != 0 ? -1 : 1; //-1=ライトプロテクトあり,1=ライトプロテクトなし 21561: if ((mmuITT1 & MMU_TTR_IGNORE_FC2) != 0 || 21562: (mmuITT1 & MMU_TTR_USER_SUPERVISOR) == MMU_TTR_US_USER) { //ユーザモードで有効 21563: for (int block = 0; block < 256; block++) { 21564: //if (((block << 24 ^ mmuITT1) & ~mmuITT1 << 8) >>> 24 == 0) { 21565: if ((block & mask) == base) { 21566: mmuUserCodeTransparent[block] = writeProtect; 21567: } 21568: } 21569: } 21570: if ((mmuITT1 & MMU_TTR_IGNORE_FC2) != 0 || 21571: (mmuITT1 & MMU_TTR_USER_SUPERVISOR) == MMU_TTR_US_SUPERVISOR) { //スーパーバイザモードで有効 21572: for (int block = 0; block < 256; block++) { 21573: //if (((block << 24 ^ mmuITT1) & ~mmuITT1 << 8) >>> 24 == 0) { 21574: if ((block & mask) == base) { 21575: mmuSuperCodeTransparent[block] = writeProtect; 21576: } 21577: } 21578: } 21579: } 21580: if ((short) mmuITT0 < 0) { //(mmuITT0 & MMU_TTR_ENABLE) != 0。有効 21581: int mask = ~mmuITT0 >>> 16 & 255; 21582: int base = mmuITT0 >>> 24 & mask; 21583: int writeProtect = (mmuITT0 & MMU_TTR_WRITE_PROTECT) != 0 ? -1 : 1; //-1=ライトプロテクトあり,1=ライトプロテクトなし 21584: if ((mmuITT0 & MMU_TTR_IGNORE_FC2) != 0 || 21585: (mmuITT0 & MMU_TTR_USER_SUPERVISOR) == MMU_TTR_US_USER) { //ユーザモードで有効 21586: for (int block = 0; block < 256; block++) { 21587: //if (((block << 24 ^ mmuITT0) & ~mmuITT0 << 8) >>> 24 == 0) { 21588: if ((block & mask) == base) { 21589: mmuUserCodeTransparent[block] = writeProtect; 21590: } 21591: } 21592: } 21593: if ((mmuITT0 & MMU_TTR_IGNORE_FC2) != 0 || 21594: (mmuITT0 & MMU_TTR_USER_SUPERVISOR) == MMU_TTR_US_SUPERVISOR) { //スーパーバイザモードで有効 21595: for (int block = 0; block < 256; block++) { 21596: //if (((block << 24 ^ mmuITT0) & ~mmuITT0 << 8) >>> 24 == 0) { 21597: if ((block & mask) == base) { 21598: mmuSuperCodeTransparent[block] = writeProtect; 21599: } 21600: } 21601: } 21602: } 21603: //透過変換差分マップを作る 21604: int difference = 0; 21605: for (int block = 0; block < 256; block++) { 21606: difference |= mmuUserCodeDifference[block] -= mmuUserCodeTransparent[block]; 21607: difference |= mmuSuperCodeDifference[block] -= mmuSuperCodeTransparent[block]; 21608: } 21609: //透過変換の状態が変化したブロックのエントリを無効化する 21610: if (difference != 0) { 21611: for (int i = 0; i < 4 * MMU_CACHE_WAYS * MMU_HASH_SIZE; i += 4) { 21612: int logicalPage = mmuUserCodeCache[i]; 21613: if (logicalPage != 1 && //有効なエントリで 21614: mmuUserCodeDifference[logicalPage >>> 24] != 0) { //透過変換の状態が変化した 21615: mmuUserCodeCache[i] = mmuUserCodeCache[i + 1] = mmuUserCodeCache[i + 2] = mmuUserCodeCache[i + 3] = 1; //無効化する 21616: } 21617: logicalPage = mmuSuperCodeCache[i]; 21618: if (logicalPage != 1 && //有効なエントリで 21619: mmuSuperCodeDifference[logicalPage >>> 24] != 0) { //透過変換の状態が変化した 21620: mmuSuperCodeCache[i] = mmuSuperCodeCache[i + 1] = mmuSuperCodeCache[i + 2] = mmuSuperCodeCache[i + 3] = 1; //無効化する 21621: } 21622: } 21623: } 21624: } //mmuSetCodeTransparent(int,int) 21625: 21626: //-------------------------------------------------------------------------------- 21627: //変換制御レジスタ 21628: // 21629: // TCR 変換制御レジスタ 21630: // 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 21631: // ┏━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━┯━┯━┯━┯━┯━┯━┯━━━┯━━━┯━┯━━━┯━━━┯━┓ 21632: // ┃ 0 │ E│ P NAD NAI FOTC FITC DCO │ DUO │DWO DCI │ DUI │ 0┃ 21633: // ┗━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━┷━┷━┷━┷━┷━┷━┷━━━┷━━━┷━┷━━━┷━━━┷━┛ 21634: public static final int MMU_TCR_ENABLE = 1 << 15; //x E Enable 21635: public static final int MMU_TCR_PAGE_SIZE = 1 << 14; //x P Page Size 21636: public static final int MMU_TCR_P_4KB = 0 << 14; // 4KB 21637: public static final int MMU_TCR_P_8KB = 1 << 14; // 8KB 21638: public static final int MMU_TCR_NAD = 1 << 13; //x NAD No Allocate Mode (Data ATC)。データATCはヒットするが更新されない 21639: public static final int MMU_TCR_NAI = 1 << 12; //x NAI No Allocate Mode (Instruction ATC)。命令ATCはヒットするが更新されない 21640: public static final int MMU_TCR_FOTC = 1 << 11; // FOTC 1/2-Cache Mode (Data ATC)。データATCは0=64エントリ,1=32エントリ 21641: public static final int MMU_TCR_FITC = 1 << 10; // FITC 1/2-Cache Mode (Instruction ATC)。命令ATCは0=64エントリ,1=32エントリ 21642: public static final int MMU_TCR_DCO = 3 << 8; // DCO Default Cache Mode (Data Cache)。デフォルトデータキャッシュモード 21643: public static final int MMU_TCR_DUO = 3 << 6; // DUO Default UPA bits (Data Cache)。デフォルトデータUPA 21644: public static final int MMU_TCR_DWO = 1 << 5; // DWO Default Write Protect (Data Cache)。デフォルトライトプロテクト 21645: public static final int MMU_TCR_DCI = 3 << 3; // DCI Default Cache Mode (Instruction Cache)。デフォルト命令キャッシュモード 21646: public static final int MMU_TCR_DUI = 3 << 1; // DUI Default UPA bits (Instruction Cache)。デフォルト命令UPA 21647: public static int mmuTCR; //TCR 21648: public static boolean mmuEnabled; //true=アドレス変換有効 21649: public static boolean mmu4KB; //false=8KB,true=4KB 21650: public static boolean mmuNotAllocateData; //true=データアドレス変換キャッシュをアロケートしない 21651: public static boolean mmuNotAllocateCode; //true=命令アドレス変換キャッシュをアロケートしない 21652: public static int mmuPageSize; //ページサイズ 21653: public static int mmuPageAddressMask; //ページアドレスのマスク 21654: public static int mmuPageOffsetMask; //ページオフセットのマスク 21655: public static int mmuPageIndexMask; //ページインデックスのマスク 21656: public static int mmuPageIndexBit2; //ページインデックスのbit番号-2 21657: public static int mmuPageTableMask; //ページテーブルの先頭アドレスのマスク 21658: 21659: //d = mmuGetTCR () 21660: // TCRを読む 21661: public static int mmuGetTCR () { 21662: return mmuTCR; 21663: } //mmuGetTCR() 21664: 21665: //mmuSetTCR (d) 21666: // TCRに書く 21667: public static void mmuSetTCR (int d) { 21668: mmuInvalidateAllCache (); //高速化のためアドレス変換していないときもキャッシュに乗せているので、アドレス変換を有効にしたときキャッシュを初期化する必要がある 21669: mmuTCR = d & 0x0000fffe; 21670: mmuEnabled = (short) d < 0; //(d & MMU_TCR_ENABLE) != 0 21671: mmu4KB = (d & MMU_TCR_PAGE_SIZE) == MMU_TCR_P_4KB; 21672: mmuNotAllocateData = (d & MMU_TCR_NAD) != 0; 21673: mmuNotAllocateCode = (d & MMU_TCR_NAI) != 0; 21674: if (mmu4KB) { //4KB 21675: mmuPageSize = MMU_PAGE_SIZE_4KB; 21676: mmuPageAddressMask = MMU_PAGE_ADDRESS_MASK_4KB; 21677: mmuPageOffsetMask = MMU_PAGE_OFFSET_MASK_4KB; 21678: mmuPageIndexMask = MMU_PAGE_INDEX_MASK_4KB; 21679: mmuPageIndexBit2 = MMU_PAGE_INDEX_BIT0_4KB - 2; 21680: mmuPageTableMask = MMU_DESCRIPTOR_PAGE_TABLE_ADDRESS_4KB; 21681: } else { //8KB 21682: mmuPageSize = MMU_PAGE_SIZE_8KB; 21683: mmuPageAddressMask = MMU_PAGE_ADDRESS_MASK_8KB; 21684: mmuPageOffsetMask = MMU_PAGE_OFFSET_MASK_8KB; 21685: mmuPageIndexMask = MMU_PAGE_INDEX_MASK_8KB; 21686: mmuPageIndexBit2 = MMU_PAGE_INDEX_BIT0_8KB - 2; 21687: mmuPageTableMask = MMU_DESCRIPTOR_PAGE_TABLE_ADDRESS_8KB; 21688: } 21689: if (MMU_DEBUG_COMMAND) { 21690: System.out.printf ("%08x mmuSetTCR(0x%08x)\n", XEiJ.regPC0, mmuTCR); 21691: System.out.printf (" mmuEnabled=%b\n", mmuEnabled); 21692: System.out.printf (" mmu4KB=%b\n", mmu4KB); 21693: System.out.printf (" mmuPageSize=0x%08x\n", mmuPageSize); 21694: System.out.printf (" mmuPageAddressMask=0x%08x\n", mmuPageAddressMask); 21695: System.out.printf (" mmuPageOffsetMask=0x%08x\n", mmuPageOffsetMask); 21696: System.out.printf (" mmuPageIndexMask=0x%08x\n", mmuPageIndexMask); 21697: System.out.printf (" mmuPageIndexBit2=%d\n", mmuPageIndexBit2); 21698: System.out.printf (" mmuPageTableMask=%d\n", mmuPageTableMask); 21699: } 21700: } //mmuSetTCR(int) 21701: 21702: //-------------------------------------------------------------------------------- 21703: //アドレス変換テーブル 21704: 21705: // URP ユーザルートポインタ 21706: // SRP スーパーバイザルートポインタ 21707: // 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 21708: // ┏━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━┯━━━━━━━━━━━━━━━━━┓ 21709: // ┃ ルートテーブルアドレス │ 0 ┃ 21710: // ┗━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━┷━━━━━━━━━━━━━━━━━┛ 21711: public static int mmuURP; //URP 21712: public static int mmuSRP; //SRP 21713: 21714: //d = mmuGetURP () 21715: // URPを読む 21716: public static int mmuGetURP () { 21717: return mmuURP; 21718: } //mmuGetURP() 21719: 21720: //d = mmuGetSRP () 21721: // SRPを読む 21722: public static int mmuGetSRP () { 21723: return mmuSRP; 21724: } //mmuGetSRP() 21725: 21726: //mmuSetURP (d) 21727: // URPに書く 21728: public static void mmuSetURP (int d) throws M68kException { 21729: mmuURP = d &= 0xfffffe00; 21730: Arrays.fill (mmuUserDataCache, 1); 21731: Arrays.fill (mmuUserCodeCache, 1); 21732: if (MMU_DEBUG_COMMAND) { 21733: System.out.printf ("%08x mmuSetURP(0x%08x)\n", XEiJ.regPC0, mmuURP); 21734: } 21735: if (RootPointerList.RTL_ON) { 21736: RootPointerList.rtlSetRootPointer (d, false); 21737: } 21738: } //mmuSetURP(int) 21739: 21740: //mmuSetSRP (d) 21741: // SRPに書く 21742: public static void mmuSetSRP (int d) { 21743: mmuSRP = d &= 0xfffffe00; 21744: Arrays.fill (mmuSuperDataCache, 1); 21745: Arrays.fill (mmuSuperCodeCache, 1); 21746: if (MMU_DEBUG_COMMAND) { 21747: System.out.printf ("%08x mmuSetSRP(0x%08x)\n", XEiJ.regPC0, mmuSRP); 21748: } 21749: if (RootPointerList.RTL_ON) { 21750: RootPointerList.rtlSetRootPointer (d, true); 21751: } 21752: } //mmuSetSRP(int) 21753: 21754: // ディスクリプタ 21755: // 21756: // ルートテーブルディスクリプタ 21757: // 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 21758: // ┏━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━┯━━━━━━━━━┯━┯━┯━━━┓ 21759: // ┃ ポインタテーブルアドレス │ X │ U│ W│ UDT ┃ 21760: // ┗━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━┷━━━━━━━━━┷━┷━┷━━━┛ 21761: // 21762: // 4KBポインタテーブルディスクリプタ 21763: // 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 21764: // ┏━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━┯━━━┯━┯━┯━━━┓ 21765: // ┃ ページテーブルアドレス │ X │ U│ W│ UDT ┃ 21766: // ┗━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━┷━━━┷━┷━┷━━━┛ 21767: // 21768: // 8KBポインタテーブルディスクリプタ 21769: // 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 21770: // ┏━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━┯━┯━┯━┯━━━┓ 21771: // ┃ ページテーブルアドレス │ X│ U│ W│ UDT ┃ 21772: // ┗━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━┷━┷━┷━┷━━━┛ 21773: // 21774: // 4KBページテーブルディスクリプタ 21775: // 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 21776: // ┏━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━┯━┯━┯━┯━┯━┯━━━┯━┯━┯━┯━━━┓ 21777: // ┃ 物理ページアドレス │UR│ G│U1│U0│ S│ CM │ M│ U│ W│ PDT ┃ 21778: // ┗━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━┷━┷━┷━┷━┷━┷━━━┷━┷━┷━┷━━━┛ 21779: // 21780: // 8KBページテーブルディスクリプタ 21781: // 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 21782: // ┏━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━┯━┯━┯━┯━┯━┯━┯━━━┯━┯━┯━┯━━━┓ 21783: // ┃ 物理ページアドレス │UR│UR│ G│U1│U0│ S│ CM │ M│ U│ W│ PDT ┃ 21784: // ┗━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━┷━┷━┷━┷━┷━┷━┷━━━┷━┷━┷━┷━━━┛ 21785: // 21786: // 間接ページテーブルディスクリプタ 21787: // 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 21788: // ┏━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━┯━━━┓ 21789: // ┃ ページディスクリプタアドレス │ PDT ┃ 21790: // ┗━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━┷━━━┛ 21791: public static final int MMU_DESCRIPTOR_POINTER_TABLE_ADDRESS = -1 << 9; //x Pointer Table Address 21792: public static final int MMU_DESCRIPTOR_PAGE_TABLE_ADDRESS_4KB = -1 << 6; //x Page Table Address (4KB) 21793: public static final int MMU_DESCRIPTOR_PAGE_TABLE_ADDRESS_8KB = -1 << 5; //x Page Table Address (8KB) 21794: public static final int MMU_DESCRIPTOR_GLOBAL = 1 << 10; //x G Global 21795: public static final int MMU_DESCRIPTOR_SUPERVISOR_PROTECTED = 1 << 7; //x S Supervisor Protected 21796: public static final int MMU_DESCRIPTOR_MODIFIED = 1 << 4; //x M Modified 21797: public static final int MMU_DESCRIPTOR_USED = 1 << 3; //x U Used 21798: public static final int MMU_DESCRIPTOR_WRITE_PROTECTED = 1 << 2; //x W Write Protected 21799: public static final int MMU_DESCRIPTOR_UDT = 2 << 0; //x UDT Upper Level Descriptor Type 21800: public static final int MMU_DESCRIPTOR_PDT = 3 << 0; //x PDT Page Descriptor Type 21801: public static final int MMU_DESCRIPTOR_TYPE_INVALID = 0 << 0; // Invalid 21802: public static final int MMU_DESCRIPTOR_TYPE_INDIRECT = 2 << 0; // Indirect 21803: public static final int MMU_DESCRIPTOR_INDIRECT_ADDRESS = -1 << 2; //x Descriptor Address 21804: 21805: //-------------------------------------------------------------------------------- 21806: //アドレス変換キャッシュ 21807: // 21808: // 構造 21809: // ユーザモード 21810: // ライン0 21811: // エントリ0 21812: // [0] 論理ページアドレス。リード用。1=無効 21813: // [1] 論理ページアドレス。ライト用。修正済みかつライトプロテクトされていないときだけ有効。1=無効 21814: // [2] 物理ページアドレス。1=無効 21815: // [3] グローバルフラグ。-1=Global,0=NonGlobal,1=無効 21816: // エントリ1 21817: // エントリ2 21818: // エントリ3 21819: // ライン1 21820: // : 21821: // ライン63 21822: // スーパーバイザモード 21823: // ライン0 21824: // エントリ0 21825: // [0] 論理ページアドレス。リード用。1=無効 21826: // [1] 論理ページアドレス。ライト用。修正済みかつライトプロテクトされていないときだけ有効。1=無効 21827: // [2] 物理ページアドレス。1=無効 21828: // [3] グローバルフラグ。-1=Global,0=NonGlobal,1=無効 21829: // エントリ1 21830: // エントリ2 21831: // エントリ3 21832: // ライン1 21833: // : 21834: // ライン63 21835: // 21836: // ハッシュ関数 21837: // 次の関数で32bitの論理ページアドレスを6bitのライン番号に変換する 21838: // a * 0x5efc103f >>> 26 21839: // 32bitの中に幅6bit以内で6bitまでセットする組み合わせは1+1+2+4+8+16+32*27=896通りあるが、 21840: // それらをa*x>>>26で0～63になるべく均一に分散させる係数を2^32通りの中から探して以下の24個を得た 21841: // 0x5efbf041 0x5efc0fc1 0x5efc103f 0x5f03efc1 0x5f03f03f 0x5f040fbf 21842: // 0x60fbf041 0x60fc0fc1 0x60fc103f 0x6103efc1 0x6103f03f 0x61040fbf 21843: // 0x9efbf041 0x9efc0fc1 0x9efc103f 0x9f03efc1 0x9f03f03f 0x9f040fbf 21844: // 0xa0fbf041 0xa0fc0fc1 0xa0fc103f 0xa103efc1 0xa103f03f 0xa1040fbf 21845: // この中で(0..63)<<12と(0..63)<<13がそれぞれすべて分離するのは 21846: // 0x5efc103f 21847: // 0x60fc103f 21848: // 0x9efc103f 21849: // 0xa0fc103f 21850: // この4個はほぼ同じパターンなので0x5efc103fを係数として用いることにする 21851: // perl -e "for$x(0x5efc103f){printf' // 0x%x%c',$x,10;for$b(7..15){@c=(0)x64;for$n(0..63){$a=$n<<$b;$c[$a*$x>>26&63]++;}printf' // %2d %s%c',$b,join('',@c),10;}}" 21852: // 0x5efc103f 21853: // 7 2111111111111111111111111111111101111111111111111111111111111111 21854: // 8 1111111111111111111111111111111111111111111111111111111111111111 21855: // 9 1111111111111111111111111111111111111111111111111111111111111111 21856: // 10 1111111111111111111111111111111111111111111111111111111111111111 21857: // 11 1111111111111111111111111111111111111111111111111111111111111111 21858: // 12 1111111111111111111111111111111111111111111111111111111111111111 21859: // 13 1111111111111111111111111111111111111111111111111111111111111111 21860: // 14 1111111111111111111111111111111111111111111111111111111111111111 21861: // 15 2011111111111111111111111111111111111111111111111111111111111111 21862: // ページサイズが2^8=256バイトから2^14=16384バイトまで、それぞれ先頭の64ページがすべて異なるハッシュ値を持つことがわかる 21863: // 21864: // 1wayセットアソシアティブ 21865: // ハッシュ値が衝突したときの速度低下を抑えるため4waysにしてみたが効果がなさそうなので1wayに戻してある 21866: // ハッシュ関数を工夫してあるので4waysにしてもほとんどの場合は1番目でヒットするか4番目まですべてミスするかのどちらかになる 21867: // 1wayを4waysにするとミスしたときの条件分岐が1回から4回に増えてテーブルサーチの開始が遅れる 21868: // 2ways以上では参照するときに1番目に比較するエントリとアロケートするときに押し出すエントリを適切に選択するための仕組みが必要 21869: // 21870: // LRU(least recently used)方式(2ways以上の場合) 21871: // アロケートはラインの中で最も古いエントリを切り捨てて最も新しいエントリを追加する方法で行う 21872: // アドレス変換キャッシュは最も新しいエントリが繰り返しアクセスされる場合が多く、ハッシュ関数で十分に分散させられているので、 21873: // ここではエントリを常に新しい順にソートしておく方法を用いる 21874: // 2番目以降のエントリがヒットしたときエントリを並べ替えなければならないので遅くなるが、1番目のヒット率が十分に高ければ問題ない 21875: // 21876: // グローバルフラグ 21877: // 関連する命令 21878: // PFLUSHA アドレス変換キャッシュのすべてのエントリを無効化する 21879: // PFLUSHAN アドレス変換キャッシュのNonGlobalなエントリを無効化する 21880: // PFLUSH (An) アドレス変換キャッシュの、DFC=1またはDFC=2ならばユーザモード、DFC=5またはDFC=6ならばスーパーバイザモードの、 21881: // 論理ページアドレスがAnのエントリを無効化する 21882: // PFLUSHN (An) アドレス変換キャッシュの、DFC=1またはDFC=2ならばユーザモード、DFC=5またはDFC=6ならばスーパーバイザモードの、 21883: // 論理ページアドレスがAnかつNonGlobalのエントリを無効化する 21884: // グローバルフラグはこれらの命令の動作を変更する以外の機能を持たない 21885: // 21886: public static final int MMU_HASH_BITS = 6; 21887: public static final int MMU_HASH_SIZE = 1 << MMU_HASH_BITS; 21888: public static final int MMU_HASH_COEFF = 0x5efc103f; //ハッシュ関数の係数 21889: public static final int MMU_CACHE_WAYS = 1; //1=1way,4=4waysセットアソシアティブ 21890: public static final int[] mmuUserDataCache = new int[4 * MMU_CACHE_WAYS * MMU_HASH_SIZE]; 21891: public static final int[] mmuUserCodeCache = new int[4 * MMU_CACHE_WAYS * MMU_HASH_SIZE]; 21892: public static final int[] mmuSuperDataCache = new int[4 * MMU_CACHE_WAYS * MMU_HASH_SIZE]; 21893: public static final int[] mmuSuperCodeCache = new int[4 * MMU_CACHE_WAYS * MMU_HASH_SIZE]; 21894: 21895: //mmuInvalidateAllCache () 21896: // PFLUSHA 21897: // アドレス変換キャッシュのすべてのエントリを無効化する 21898: public static void mmuInvalidateAllCache () { 21899: Arrays.fill (mmuUserDataCache, 1); 21900: Arrays.fill (mmuUserCodeCache, 1); 21901: Arrays.fill (mmuSuperDataCache, 1); 21902: Arrays.fill (mmuSuperCodeCache, 1); 21903: } //mmuInvalidateAllCache() 21904: 21905: //mmuInvalidateAllNonGlobalCache () 21906: // PFLUSHAN 21907: // アドレス変換キャッシュのNonGlobalなエントリを無効化する 21908: public static void mmuInvalidateAllNonGlobalCache () { 21909: for (int i = 0; i < 4 * MMU_CACHE_WAYS * MMU_HASH_SIZE; i += 4) { 21910: if (mmuUserDataCache[i + 3] == 0) { //エントリが有効かつNonGlobal 21911: mmuUserDataCache[i] = mmuUserDataCache[i + 1] = mmuUserDataCache[i + 2] = mmuUserDataCache[i + 3] = 1; 21912: } 21913: if (mmuUserCodeCache[i + 3] == 0) { //エントリが有効かつNonGlobal 21914: mmuUserCodeCache[i] = mmuUserCodeCache[i + 1] = mmuUserCodeCache[i + 2] = mmuUserCodeCache[i + 3] = 1; 21915: } 21916: if (mmuSuperDataCache[i + 3] == 0) { //エントリが有効かつNonGlobal 21917: mmuSuperDataCache[i] = mmuSuperDataCache[i + 1] = mmuSuperDataCache[i + 2] = mmuSuperDataCache[i + 3] = 1; 21918: } 21919: if (mmuSuperCodeCache[i + 3] == 0) { //エントリが有効かつNonGlobal 21920: mmuSuperCodeCache[i] = mmuSuperCodeCache[i + 1] = mmuSuperCodeCache[i + 2] = mmuSuperCodeCache[i + 3] = 1; 21921: } 21922: } 21923: } //mmuInvalidateAllNonGlobalCache() 21924: 21925: //mmuInvalidateCache (a) 21926: // PFLUSH (An) 21927: // アドレス変換キャッシュの、DFC=1またはDFC=2ならばユーザモード、DFC=5またはDFC=6ならばスーパーバイザモードの、 21928: // 論理ページアドレスがAnのエントリを無効化する 21929: public static void mmuInvalidateCache (int a) { 21930: int logicalPage = a & mmuPageAddressMask; 21931: boolean supervisor = (0b10011111 << 24 << XEiJ.mpuDFC) < 0; 21932: boolean instruction = (0b00101010 << 24 << XEiJ.mpuDFC) < 0; 21933: int[] cache = (supervisor ? 21934: instruction ? mmuSuperCodeCache : mmuSuperDataCache : 21935: instruction ? mmuUserCodeCache : mmuUserDataCache); 21936: int head = (logicalPage * MMU_HASH_COEFF >>> -MMU_HASH_BITS) * (4 * MMU_CACHE_WAYS); //先頭のエントリ 21937: if (MMU_CACHE_WAYS == 1) { //1way 21938: if (cache[head] == logicalPage) { //エントリが有効かつ論理ページアドレスがAn 21939: cache[head] = cache[head + 1] = cache[head + 2] = cache[head + 3] = 1; //末尾を空ける 21940: return; 21941: } 21942: } else { //2ways以上 21943: int tail = head + (4 * MMU_CACHE_WAYS - 4); //末尾のエントリ 21944: for (int i = head; i <= tail; i += 4) { 21945: if (cache[i] == logicalPage) { //エントリが有効かつ論理ページアドレスがAn 21946: for (int j = i; j < tail; j += 4) { //後ろを詰める 21947: cache[j ] = cache[j + 4]; 21948: cache[j + 1] = cache[j + 5]; 21949: cache[j + 2] = cache[j + 6]; 21950: cache[j + 3] = cache[j + 7]; 21951: } 21952: cache[tail] = cache[tail + 1] = cache[tail + 2] = cache[tail + 3] = 1; //末尾を空ける 21953: return; 21954: } 21955: } 21956: } 21957: } //mmuInvalidateCache(int) 21958: 21959: //mmuInvalidateNonGlobalCache (a) 21960: // PFLUSHN (An) 21961: // アドレス変換キャッシュの、DFC=1またはDFC=2ならばユーザモード、DFC=5またはDFC=6ならばスーパーバイザモードの、 21962: // 論理ページアドレスがAnかつNonGlobalのエントリを無効化する 21963: public static void mmuInvalidateNonGlobalCache (int a) { 21964: int logicalPage = a & mmuPageAddressMask; 21965: boolean supervisor = (0b10011111 << 24 << XEiJ.mpuDFC) < 0; 21966: boolean instruction = (0b00101010 << 24 << XEiJ.mpuDFC) < 0; 21967: int[] cache = (supervisor ? 21968: instruction ? mmuSuperCodeCache : mmuSuperDataCache : 21969: instruction ? mmuUserCodeCache : mmuUserDataCache); 21970: int head = (logicalPage * MMU_HASH_COEFF >>> -MMU_HASH_BITS) * (4 * MMU_CACHE_WAYS); //先頭のエントリ 21971: if (MMU_CACHE_WAYS == 1) { //1way 21972: if (cache[head] == logicalPage) { //エントリが有効かつ論理ページアドレスがAn 21973: if (cache[head + 3] == 0) { //エントリが有効かつNonGlobal 21974: cache[head] = cache[head + 1] = cache[head + 2] = cache[head + 3] = 1; //末尾を空ける 21975: } 21976: return; //論理ページアドレスがAnのエントリは1つだけなのでそれがNonGlobalでなければ何もしないで終了する 21977: } 21978: } else { //2ways以上 21979: int tail = head + (4 * MMU_CACHE_WAYS - 4); //末尾のエントリ 21980: for (int i = head; i <= tail; i += 4) { 21981: if (cache[i] == logicalPage) { //エントリが有効かつ論理ページアドレスがAn 21982: if (cache[i + 3] == 0) { //エントリが有効かつNonGlobal 21983: for (int j = i; j < tail; j += 4) { //後ろを詰める 21984: cache[j ] = cache[j + 4]; 21985: cache[j + 1] = cache[j + 5]; 21986: cache[j + 2] = cache[j + 6]; 21987: cache[j + 3] = cache[j + 7]; 21988: } 21989: cache[tail] = cache[tail + 1] = cache[tail + 2] = cache[tail + 3] = 1; //末尾を空ける 21990: } 21991: return; //論理ページアドレスがAnのエントリは1つだけなのでそれがNonGlobalでなければ何もしないで終了する 21992: } 21993: } 21994: } 21995: } //mmuInvalidateNonGlobalCache(int) 21996: 21997: //-------------------------------------------------------------------------------- 21998: //初期化 21999: 22000: //mmuInit () 22001: // 初期化 22002: public static void mmuInit () { 22003: mmuUserDataTransparent = new int[256]; 22004: mmuUserCodeTransparent = new int[256]; 22005: mmuSuperDataTransparent = new int[256]; 22006: mmuSuperCodeTransparent = new int[256]; 22007: mmuUserDataDifference = new int[256]; 22008: mmuUserCodeDifference = new int[256]; 22009: mmuSuperDataDifference = new int[256]; 22010: mmuSuperCodeDifference = new int[256]; 22011: mmuReset (); 22012: } //mmuInit() 22013: 22014: //mmuReset () 22015: // リセット 22016: public static void mmuReset () { 22017: mmuSetDataTransparent (0, 0); 22018: mmuSetCodeTransparent (0, 0); 22019: mmuSetTCR (0); 22020: } //mmuReset() 22021: 22022: //-------------------------------------------------------------------------------- 22023: //バスアクセス 22024: // 22025: // ByteSign byte バイト符号拡張 22026: // ByteZero int バイトゼロ拡張 22027: // WordSign int ワード符号拡張 22028: // WordZero int ワードゼロ拡張 22029: // Long int ロング 22030: // Quad long クワッド 22031: // 22032: // Data データ 1 先頭 22033: // Second データ 1 2番目 22034: // Even データ 2 先頭 22035: // Four データ 4 先頭 22036: // Code コード 2 先頭 22037: // Opword コード 2 先頭(命令ワード) 22038: // Exword コード 2 2番目(拡張ワード) 22039: // 22040: // バイト 22041: // 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 22042: // ┳━┯━┯━┯━┳━┯━┯━┯━┳━┯━┯━┯━┳━┯━┯━┯━┳ 22043: // ┃ │ │ │ ┃ │ │ │ ┃ │ │ │ ┃ │ │ │ ┃ 22044: // ┻━┷━┷━┷━┻━┷━┷━┷━┻━┷━┷━┷━┻━┷━┷━┷━┻ 22045: // ┏━┓ 22046: // ┃ B┃ 22047: // ┗━┛ 22048: // 0 22049: // 22050: // ワード 22051: // 偶数 22052: // 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 22053: // ┳━┯━┯━┯━┳━┯━┯━┯━┳━┯━┯━┯━┳━┯━┯━┯━┳ 22054: // ┃ │ │ │ ┃ │ │ │ ┃ │ │ │ ┃ │ │ │ ┃ 22055: // ┻━┷━┷━┷━┻━┷━┷━┷━┻━┷━┷━┷━┻━┷━┷━┷━┻ 22056: // ┏━━━┓ 22057: // ┃ W ┃ 22058: // ┗━━━┛ 22059: // 0 22060: // 奇数 22061: // -1 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 22062: // ┳━┯━┯━┯━┳━┯━┯━┯━┳━┯━┯━┯━┳━┯━┯━┯━┳ 22063: // ┃ │ │ │ ┃ │ │ │ ┃ │ │ │ ┃ │ │ │ ┃ 22064: // ┻━┷━┷━┷━┻━┷━┷━┷━┻━┷━┷━┷━┻━┷━┷━┷━┻ 22065: // ┏━┳━┓ 22066: // ┃ B┃ B┃ 22067: // ┗━┻━┛ 22068: // 8 0 22069: // 22070: // ロング 22071: // 4の倍数 22072: // 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 22073: // ┳━┯━┯━┯━┳━┯━┯━┯━┳━┯━┯━┯━┳━┯━┯━┯━┳ 22074: // ┃ │ │ │ ┃ │ │ │ ┃ │ │ │ ┃ │ │ │ ┃ 22075: // ┻━┷━┷━┷━┻━┷━┷━┷━┻━┷━┷━┷━┻━┷━┷━┷━┻ 22076: // ┏━━━━━━━┓ 22077: // ┃ L ┃ 22078: // ┗━━━━━━━┛ 22079: // 0 22080: // 4の倍数+1 22081: // -1 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 22082: // ┳━┯━┯━┯━┳━┯━┯━┯━┳━┯━┯━┯━┳━┯━┯━┯━┳ 22083: // ┃ │ │ │ ┃ │ │ │ ┃ │ │ │ ┃ │ │ │ ┃ 22084: // ┻━┷━┷━┷━┻━┷━┷━┷━┻━┷━┷━┷━┻━┷━┷━┷━┻ 22085: // ┏━┳━━━┳━┓ 22086: // ┃ B┃ W ┃ B┃ 22087: // ┗━┻━━━┻━┛ 22088: // 24 8 0 22089: // 4の倍数+2 22090: // -2 -1 0 1 2 3 4 5 6 7 8 9 10 11 12 13 22091: // ┳━┯━┯━┯━┳━┯━┯━┯━┳━┯━┯━┯━┳━┯━┯━┯━┳ 22092: // ┃ │ │ │ ┃ │ │ │ ┃ │ │ │ ┃ │ │ │ ┃ 22093: // ┻━┷━┷━┷━┻━┷━┷━┷━┻━┷━┷━┷━┻━┷━┷━┷━┻ 22094: // ┏━━━┳━━━┓ 22095: // ┃ W ┃ W ┃ 22096: // ┗━━━┻━━━┛ 22097: // 16 0 22098: // 4の倍数+3 22099: // -3 -2 -1 0 1 2 3 4 5 6 7 8 9 10 11 12 22100: // ┳━┯━┯━┯━┳━┯━┯━┯━┳━┯━┯━┯━┳━┯━┯━┯━┳ 22101: // ┃ │ │ │ ┃ │ │ │ ┃ │ │ │ ┃ │ │ │ ┃ 22102: // ┻━┷━┷━┷━┻━┷━┷━┷━┻━┷━┷━┷━┻━┷━┷━┷━┻ 22103: // ┏━┳━━━┳━┓ 22104: // ┃ B┃ W ┃ B┃ 22105: // ┗━┻━━━┻━┛ 22106: // 24 8 0 22107: // 22108: // クワッド 22109: // 4の倍数 22110: // 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 22111: // ┳━┯━┯━┯━┳━┯━┯━┯━┳━┯━┯━┯━┳━┯━┯━┯━┳ 22112: // ┃ │ │ │ ┃ │ │ │ ┃ │ │ │ ┃ │ │ │ ┃ 22113: // ┻━┷━┷━┷━┻━┷━┷━┷━┻━┷━┷━┷━┻━┷━┷━┷━┻ 22114: // ┏━━━━━━━┳━━━━━━━┓ 22115: // ┃ L ┃ L ┃ 22116: // ┗━━━━━━━┻━━━━━━━┛ 22117: // 32 0 22118: // 4の倍数+1 22119: // -1 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 22120: // ┳━┯━┯━┯━┳━┯━┯━┯━┳━┯━┯━┯━┳━┯━┯━┯━┳ 22121: // ┃ │ │ │ ┃ │ │ │ ┃ │ │ │ ┃ │ │ │ ┃ 22122: // ┻━┷━┷━┷━┻━┷━┷━┷━┻━┷━┷━┷━┻━┷━┷━┷━┻ 22123: // ┏━┳━━━┳━━━━━━━┳━┓ 22124: // ┃ B┃ W ┃ L ┃ B┃ 22125: // ┗━┻━━━┻━━━━━━━┻━┛ 22126: // 56 40 8 0 22127: // 4の倍数+2 22128: // -2 -1 0 1 2 3 4 5 6 7 8 9 10 11 12 13 22129: // ┳━┯━┯━┯━┳━┯━┯━┯━┳━┯━┯━┯━┳━┯━┯━┯━┳ 22130: // ┃ │ │ │ ┃ │ │ │ ┃ │ │ │ ┃ │ │ │ ┃ 22131: // ┻━┷━┷━┷━┻━┷━┷━┷━┻━┷━┷━┷━┻━┷━┷━┷━┻ 22132: // ┏━━━┳━━━━━━━┳━━━┓ 22133: // ┃ W ┃ L ┃ W ┃ 22134: // ┗━━━┻━━━━━━━┻━━━┛ 22135: // 48 16 0 22136: // 4の倍数+3 22137: // -3 -2 -1 0 1 2 3 4 5 6 7 8 9 10 11 12 22138: // ┳━┯━┯━┯━┳━┯━┯━┯━┳━┯━┯━┯━┳━┯━┯━┯━┳ 22139: // ┃ │ │ │ ┃ │ │ │ ┃ │ │ │ ┃ │ │ │ ┃ 22140: // ┻━┷━┷━┷━┻━┷━┷━┷━┻━┷━┷━┷━┻━┷━┷━┷━┻ 22141: // ┏━┳━━━━━━━┳━━━┳━┓ 22142: // ┃ B┃ L ┃ W ┃ B┃ 22143: // ┗━┻━━━━━━━┻━━━┻━┛ 22144: // 56 24 8 0 22145: // 22146: 22147: //-------------------------------------------------------------------------------- 22148: //ピーク 22149: // デバッガ用 22150: // エラーや副作用なしでリードする 22151: // アドレス変換はピーク 22152: // ページフォルトやバスエラーのときは-1をキャストした値を返す 22153: 22154: //d = mmuPeekByteSign (a, f) 22155: // ピークバイト符号拡張 22156: public static byte mmuPeekByteSign (int a, int f) { 22157: f = f == -1 ? XEiJ.regSRS != 0 ? 5 : 1 : f & 7; 22158: MemoryMappedDevice[] mm = (DataBreakPoint.DBP_ON ? 22159: (f & 4) != 0 ? DataBreakPoint.dbpSuperMap : DataBreakPoint.dbpUserMap : 22160: (f & 4) != 0 ? XEiJ.busSuperMap : XEiJ.busUserMap); 22161: // 01234567 22162: if (0b01100110 << 24 << f < 0) { //SFC=1,2,5,6。アドレス変換あり 22163: int a0 = mmuTranslatePeek (a, f & 4, f & 2); 22164: return (a ^ a0) != 1 ? mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdPbs (a0) : -1; 22165: } else if (f != 7) { //SFC=0,3,4。アドレス変換なし 22166: return mm[a >>> XEiJ.BUS_PAGE_BITS].mmdPbs (a); 22167: } else { 22168: return -1; 22169: } 22170: } //mmuPeekByteSign(int,int) 22171: 22172: //d = mmuPeekByteZero (a, f) 22173: // ピークバイトゼロ拡張 22174: public static int mmuPeekByteZero (int a, int f) { 22175: f = f == -1 ? XEiJ.regSRS != 0 ? 5 : 1 : f & 7; 22176: MemoryMappedDevice[] mm = (DataBreakPoint.DBP_ON ? 22177: (f & 4) != 0 ? DataBreakPoint.dbpSuperMap : DataBreakPoint.dbpUserMap : 22178: (f & 4) != 0 ? XEiJ.busSuperMap : XEiJ.busUserMap); 22179: // 01234567 22180: if (0b01100110 << 24 << f < 0) { //SFC=1,2,5,6。アドレス変換あり 22181: int a0 = mmuTranslatePeek (a, f & 4, f & 2); 22182: return (a ^ a0) != 1 ? mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdPbz (a0) : 0xff; 22183: // ^ ^^^^ 22184: } else if (f != 7) { //SFC=0,3,4。アドレス変換なし 22185: return mm[a >>> XEiJ.BUS_PAGE_BITS].mmdPbz (a); 22186: // ^ 22187: } else { 22188: return 0xff; 22189: // ^^^^ 22190: } 22191: } //mmuPeekByteZero(int,int) 22192: 22193: //d = mmuPeekByteSignData (a, supervisor) 22194: // ピークバイト符号拡張(データ) 22195: public static byte mmuPeekByteSignData (int a, int supervisor) { 22196: MemoryMappedDevice[] mm = supervisor != 0 ? DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap : DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap; 22197: int a0 = mmuTranslatePeek (a, supervisor, 0); 22198: return (a ^ a0) == 1 ? -1 : mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdPbs (a0); 22199: } //mmuPeekByteSignData(int,int) 22200: 22201: //d = mmuPeekByteSignCode (a, supervisor) 22202: // ピークバイト符号拡張(コード) 22203: public static byte mmuPeekByteSignCode (int a, int supervisor) { 22204: MemoryMappedDevice[] mm = supervisor != 0 ? DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap : DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap; 22205: int a0 = mmuTranslatePeek (a, supervisor, 1); 22206: return (a ^ a0) == 1 ? -1 : mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdPbs (a0); 22207: } //mmuPeekByteSignCode(int,int) 22208: 22209: //d = mmuPeekByteZeroData (a, supervisor) 22210: // ピークバイトゼロ拡張(データ) 22211: public static int mmuPeekByteZeroData (int a, int supervisor) { 22212: MemoryMappedDevice[] mm = supervisor != 0 ? DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap : DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap; 22213: int a0 = mmuTranslatePeek (a, supervisor, 0); 22214: return (a ^ a0) == 1 ? 255 : mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdPbz (a0); 22215: } //mmuPeekByteZeroData(int,int) 22216: 22217: //d = mmuPeekByteZeroCode (a, supervisor) 22218: // ピークバイトゼロ拡張(コード) 22219: public static int mmuPeekByteZeroCode (int a, int supervisor) { 22220: MemoryMappedDevice[] mm = supervisor != 0 ? DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap : DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap; 22221: int a0 = mmuTranslatePeek (a, supervisor, 1); 22222: return (a ^ a0) == 1 ? 255 : mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdPbz (a0); 22223: } //mmuPeekByteZeroCode(int,int) 22224: 22225: //d = mmuPeekWordSign (a, f) 22226: // ピークワード符号拡張 22227: public static int mmuPeekWordSign (int a, int f) { 22228: f = f == -1 ? XEiJ.regSRS != 0 ? 5 : 1 : f & 7; 22229: MemoryMappedDevice[] mm = (DataBreakPoint.DBP_ON ? 22230: (f & 4) != 0 ? DataBreakPoint.dbpSuperMap : DataBreakPoint.dbpUserMap : 22231: (f & 4) != 0 ? XEiJ.busSuperMap : XEiJ.busUserMap); 22232: // 01234567 22233: if (0b01100110 << 24 << f < 0) { //SFC=1,2,5,6。アドレス変換あり 22234: int a0 = mmuTranslatePeek (a, f & 4, f & 2); 22235: if ((a & 1) == 0) { //偶数 22236: return (a ^ a0) != 1 ? mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdPws (a0) : -1; 22237: } else { //奇数 22238: int a1 = mmuTranslatePeek (a + 1, f & 4, f & 2); 22239: return (((a ^ a0) != 1 ? mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdPbs (a0) : -1) << 8 | 22240: ((a + 1 ^ a1) != 1 ? mm[a1 >>> XEiJ.BUS_PAGE_BITS].mmdPbz (a1) : 255)); 22241: } 22242: } else if (f != 7) { //SFC=0,3,4。アドレス変換なし 22243: if ((a & 1) == 0) { //偶数 22244: return mm[a >>> XEiJ.BUS_PAGE_BITS].mmdPws (a); 22245: } else { //奇数 22246: return (mm[a >>> XEiJ.BUS_PAGE_BITS].mmdPbs (a ) << 8 | 22247: mm[a + 1 >>> XEiJ.BUS_PAGE_BITS].mmdPbz (a + 1)); 22248: } 22249: } else { 22250: return -1; 22251: } 22252: } //mmuPeekWordSign(int,int) 22253: 22254: //d = mmuPeekWordSignData (a, supervisor) 22255: // ピークワード符号拡張(データ) 22256: public static int mmuPeekWordSignData (int a, int supervisor) { 22257: MemoryMappedDevice[] mm = supervisor != 0 ? DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap : DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap; 22258: int a0 = mmuTranslatePeek (a, supervisor, 0); //a+1が必要なので上書き不可 22259: if ((a & 1) == 0) { //偶数 22260: return (a0 & 1) != 0 ? -1 : mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdPws (a0); 22261: } else { //奇数 22262: int a1 = mmuTranslatePeek (a + 1, supervisor, 0); 22263: return (((a0 & 1) == 0 ? -1 : mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdPbs (a0)) << 8 | 22264: ((a1 & 1) != 0 ? 255 : mm[a1 >>> XEiJ.BUS_PAGE_BITS].mmdPbz (a1))); 22265: } 22266: } //mmuPeekWordSignData(int,int) 22267: 22268: //d = mmuPeekWordSignEven (a, supervisor) 22269: // ピークワード符号拡張(偶数) 22270: public static int mmuPeekWordSignEven (int a, int supervisor) { 22271: MemoryMappedDevice[] mm = supervisor != 0 ? DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap : DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap; 22272: a = mmuTranslatePeek (a, supervisor, 0); 22273: return (a & 1) != 0 ? -1 : mm[a >>> XEiJ.BUS_PAGE_BITS].mmdPws (a); 22274: } //mmuPeekWordSignEven(int,int) 22275: 22276: //d = mmuPeekWordSignCode (a, supervisor) 22277: // ピークワード符号拡張(コード) 22278: public static int mmuPeekWordSignCode (int a, int supervisor) { 22279: MemoryMappedDevice[] mm = supervisor != 0 ? DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap : DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap; 22280: a = mmuTranslatePeek (a, supervisor, 1); 22281: return (a & 1) != 0 ? -1 : mm[a >>> XEiJ.BUS_PAGE_BITS].mmdPws (a); 22282: } //mmuPeekWordSignCode(int,int) 22283: 22284: //d = mmuPeekWordZeroData (a, supervisor) 22285: // ピークワードゼロ拡張(データ) 22286: public static int mmuPeekWordZeroData (int a, int supervisor) { 22287: MemoryMappedDevice[] mm = supervisor != 0 ? DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap : DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap; 22288: int a0 = mmuTranslatePeek (a, supervisor, 0); //a+1が必要なので上書き不可 22289: if ((a & 1) == 0) { //偶数 22290: return (a0 & 1) != 0 ? 65535 : mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdPwz (a0); 22291: } else { //奇数 22292: int a1 = mmuTranslatePeek (a + 1, supervisor, 0); 22293: return (((a0 & 1) == 0 ? 255 : mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdPbz (a0)) << 8 | 22294: ((a1 & 1) != 0 ? 255 : mm[a1 >>> XEiJ.BUS_PAGE_BITS].mmdPbz (a1))); 22295: } 22296: } //mmuPeekWordZeroData(int,int) 22297: 22298: //d = mmuPeekWordZeroEven (a, supervisor) 22299: // ピークワードゼロ拡張(偶数) 22300: public static int mmuPeekWordZeroEven (int a, int supervisor) { 22301: MemoryMappedDevice[] mm = supervisor != 0 ? DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap : DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap; 22302: a = mmuTranslatePeek (a, supervisor, 0); 22303: return (a & 1) != 0 ? 65535 : mm[a >>> XEiJ.BUS_PAGE_BITS].mmdPwz (a); 22304: } //mmuPeekWordZeroEven(int,int) 22305: 22306: //d = mmuPeekWordZeroCode (a, supervisor) 22307: // ピークワードゼロ拡張(コード) 22308: public static int mmuPeekWordZeroCode (int a, int supervisor) { 22309: MemoryMappedDevice[] mm = supervisor != 0 ? DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap : DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap; 22310: a = mmuTranslatePeek (a, supervisor, 1); 22311: return (a & 1) != 0 ? 65535 : mm[a >>> XEiJ.BUS_PAGE_BITS].mmdPwz (a); 22312: } //mmuPeekWordZeroCode(int,int) 22313: 22314: //d = mmuPeekLong (a, f) 22315: // ピークロング 22316: public static int mmuPeekLong (int a, int f) { 22317: f = f == -1 ? XEiJ.regSRS != 0 ? 5 : 1 : f & 7; 22318: MemoryMappedDevice[] mm = (DataBreakPoint.DBP_ON ? 22319: (f & 4) != 0 ? DataBreakPoint.dbpSuperMap : DataBreakPoint.dbpUserMap : 22320: (f & 4) != 0 ? XEiJ.busSuperMap : XEiJ.busUserMap); 22321: // 01234567 22322: if (0b01100110 << 24 << f < 0) { //SFC=1,2,5,6。アドレス変換あり 22323: int a0 = mmuTranslatePeek (a, f & 4, f & 2); 22324: if ((a & 3) == 0) { //4の倍数 22325: return (a ^ a0) != 1 ? mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdPls (a0) : -1; 22326: } else if ((a & 1) == 0) { //4の倍数ではない偶数 22327: int a2 = mmuTranslatePeek (a + 2, f & 4, f & 2); 22328: return (((a ^ a0) != 1 ? mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdPws (a0) : -1) << 16 | 22329: ((a + 2 ^ a2) != 1 ? mm[a2 >>> XEiJ.BUS_PAGE_BITS].mmdPwz (a2) : 65535)); 22330: } else { //奇数 22331: int a1 = mmuTranslatePeek (a + 1, f & 4, f & 2); 22332: int a3 = mmuTranslatePeek (a + 3, f & 4, f & 2); 22333: return (((a ^ a0) != 1 ? mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdPbs (a0) : -1) << 24 | 22334: ((a + 1 ^ a1) != 1 ? mm[a1 >>> XEiJ.BUS_PAGE_BITS].mmdPwz (a1) : 65535) << 8 | 22335: ((a + 3 ^ a3) != 1 ? mm[a3 >>> XEiJ.BUS_PAGE_BITS].mmdPbz (a3) : 255)); 22336: } 22337: } else if (f != 7) { //SFC=0,3,4。アドレス変換なし 22338: if ((a & 3) == 0) { //4の倍数 22339: return mm[a >>> XEiJ.BUS_PAGE_BITS].mmdPls (a); 22340: } else if ((a & 1) == 0) { //4の倍数ではない偶数 22341: return (mm[a >>> XEiJ.BUS_PAGE_BITS].mmdPws (a ) << 16 | 22342: mm[a + 2 >>> XEiJ.BUS_PAGE_BITS].mmdPwz (a + 2)); 22343: } else { //奇数 22344: return (mm[a >>> XEiJ.BUS_PAGE_BITS].mmdPbs (a ) << 24 | 22345: mm[a + 1 >>> XEiJ.BUS_PAGE_BITS].mmdPwz (a + 1) << 8 | 22346: mm[a + 3 >>> XEiJ.BUS_PAGE_BITS].mmdPbz (a + 3)); 22347: } 22348: } else { 22349: return -1; 22350: } 22351: } //mmuPeekLong(int,int) 22352: 22353: //d = mmuPeekLongData (a, supervisor) 22354: // ピークロング(データ) 22355: public static int mmuPeekLongData (int a, int supervisor) { 22356: MemoryMappedDevice[] mm = supervisor != 0 ? DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap : DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap; 22357: int a0 = mmuTranslatePeek (a, supervisor, 0); //a+1,a+2,a+3が必要なので上書き不可 22358: if ((a & 3) == 0) { //4の倍数 22359: return (a0 & 1) != 0 ? -1 : mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdPls (a0); 22360: } else if ((a & 1) == 0) { //4の倍数+2 22361: int a2 = mmuTranslatePeek (a + 2, supervisor, 0); 22362: return (((a0 & 1) != 0 ? -1 : mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdPws (a0)) << 16 | 22363: ((a2 & 1) != 0 ? 65535 : mm[a2 >>> XEiJ.BUS_PAGE_BITS].mmdPwz (a2))); 22364: } else { //奇数 22365: int a1 = mmuTranslatePeek (a + 1, supervisor, 0); 22366: int a3 = mmuTranslatePeek (a + 3, supervisor, 0); 22367: return (((a0 & 1) == 0 ? -1 : mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdPbs (a0)) << 24 | 22368: ((a1 & 1) != 0 ? 65535 : mm[a1 >>> XEiJ.BUS_PAGE_BITS].mmdPwz (a1)) << 16 | 22369: ((a3 & 1) != 0 ? 255 : mm[a3 >>> XEiJ.BUS_PAGE_BITS].mmdPbz (a3))); 22370: } 22371: } //mmuPeekLongData(int,int) 22372: 22373: //d = mmuPeekLongEven (a, supervisor) 22374: // ピークロング(偶数) 22375: public static int mmuPeekLongEven (int a, int supervisor) { 22376: MemoryMappedDevice[] mm = supervisor != 0 ? DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap : DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap; 22377: int a0 = mmuTranslatePeek (a, supervisor, 0); //a+2が必要なので上書き不可 22378: if ((a & 2) == 0) { //4の倍数 22379: return (a0 & 1) != 0 ? -1 : mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdPls (a0); 22380: } else { //4の倍数+2 22381: int a2 = mmuTranslatePeek (a + 2, supervisor, 0); 22382: return (((a0 & 1) != 0 ? -1 : mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdPws (a0)) << 16 | 22383: ((a2 & 1) != 0 ? 65535 : mm[a2 >>> XEiJ.BUS_PAGE_BITS].mmdPwz (a2))); 22384: } 22385: } //mmuPeekLongEven(int,int) 22386: 22387: //d = mmuPeekLongFour (a, supervisor) 22388: // ピークロング(4の倍数) 22389: public static int mmuPeekLongFour (int a, int supervisor) { 22390: MemoryMappedDevice[] mm = supervisor != 0 ? DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap : DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap; 22391: a = mmuTranslatePeek (a, supervisor, 0); 22392: return (a & 1) != 0 ? -1 : mm[a >>> XEiJ.BUS_PAGE_BITS].mmdPls (a); 22393: } //mmuPeekLongFour(int,int) 22394: 22395: //d = mmuPeekLongCode (a, supervisor) 22396: // ピークロング(コード) 22397: public static int mmuPeekLongCode (int a, int supervisor) { 22398: MemoryMappedDevice[] mm = supervisor != 0 ? DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap : DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap; 22399: int a0 = mmuTranslatePeek (a, supervisor, 1); //a+2が必要なので上書き不可 22400: if ((a & 2) == 0) { //4の倍数 22401: return (a0 & 1) != 0 ? -1 : mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdPls (a0); 22402: } else { //4の倍数+2 22403: int a2 = mmuTranslatePeek (a + 2, supervisor, 1); 22404: return (((a0 & 1) != 0 ? -1 : mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdPws (a0)) << 16 | 22405: ((a2 & 1) != 0 ? 65535 : mm[a2 >>> XEiJ.BUS_PAGE_BITS].mmdPwz (a2))); 22406: } 22407: } //mmuPeekLongCode(int,int) 22408: 22409: //d = mmuPeekQuad (a, f) 22410: // ピーククワッド 22411: public static long mmuPeekQuad (int a, int f) { 22412: return (long) mmuPeekLong (a, f) << 32 | mmuPeekLong (a + 4, f) & 0xffffffffL; 22413: } //mmuPeekQuad(int,int) 22414: 22415: //d = mmuPeekQuadData (a, supervisor) 22416: // ピーククワッド(データ) 22417: public static long mmuPeekQuadData (int a, int supervisor) { 22418: MemoryMappedDevice[] mm = supervisor != 0 ? DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap : DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap; 22419: int a0 = mmuTranslatePeek (a, supervisor, 0); //a+1,a+2,a+3,a+4,a+5,a+6,a+7が必要なので上書き不可 22420: if ((a & 3) == 0) { //4の倍数 22421: int a4 = mmuTranslatePeek (a + 4, supervisor, 0); //4の倍数 22422: return ((long) ((a0 & 1) != 0 ? -1 : mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdPls (a0)) << 32 | 22423: (long) ((a4 & 1) != 0 ? -1 : mm[a4 >>> XEiJ.BUS_PAGE_BITS].mmdPls (a4)) & 0x00000000ffffffffL); 22424: } else if ((a & 1) == 0) { //4の倍数+2 22425: int a2 = mmuTranslatePeek (a + 2, supervisor, 0); //4の倍数 22426: int a6 = mmuTranslatePeek (a + 6, supervisor, 0); //4の倍数 22427: return ((long) ((a0 & 1) != 0 ? -1 : mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdPws (a0)) << 48 | 22428: (long) ((a2 & 1) != 0 ? -1 : mm[a2 >>> XEiJ.BUS_PAGE_BITS].mmdPls (a2)) << 16 & 0x0000ffffffff0000L | 22429: (long) ((a6 & 1) != 0 ? 65535 : mm[a6 >>> XEiJ.BUS_PAGE_BITS].mmdPwz (a6))); 22430: } else if ((a & 3) == 1) { //4の倍数+1 22431: int a1 = mmuTranslatePeek (a + 1, supervisor, 0); //4の倍数+2 22432: int a3 = mmuTranslatePeek (a + 3, supervisor, 0); //4の倍数 22433: int a7 = mmuTranslatePeek (a + 7, supervisor, 0); //4の倍数 22434: return ((long) ((a0 & 1) != 0 ? -1 : mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdPbs (a0)) << 56 | 22435: (long) ((a1 & 1) != 0 ? 65535 : mm[a1 >>> XEiJ.BUS_PAGE_BITS].mmdPwz (a1)) << 40 | 22436: (long) ((a3 & 1) != 0 ? -1 : mm[a3 >>> XEiJ.BUS_PAGE_BITS].mmdPls (a3)) << 8 & 0x000000ffffffff00L | 22437: (long) ((a7 & 1) != 0 ? 255 : mm[a7 >>> XEiJ.BUS_PAGE_BITS].mmdPbz (a7))); 22438: } else { //4の倍数+3 22439: int a1 = mmuTranslatePeek (a + 1, supervisor, 0); //4の倍数 22440: int a5 = mmuTranslatePeek (a + 5, supervisor, 0); //4の倍数 22441: int a7 = mmuTranslatePeek (a + 7, supervisor, 0); //4の倍数+2 22442: return ((long) ((a0 & 1) != 0 ? -1 : mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdPbs (a0)) << 56 | 22443: (long) ((a1 & 1) != 0 ? -1 : mm[a1 >>> XEiJ.BUS_PAGE_BITS].mmdPls (a1)) << 24 & 0x00ffffffff000000L | 22444: (long) ((a5 & 1) != 0 ? 65535 : mm[a5 >>> XEiJ.BUS_PAGE_BITS].mmdPwz (a5)) << 8 | 22445: (long) ((a7 & 1) != 0 ? 255 : mm[a7 >>> XEiJ.BUS_PAGE_BITS].mmdPbz (a7))); 22446: } 22447: } //mmuPeekQuadData(int,int) 22448: 22449: //d = mmuPeekQuadEven (a, supervisor) 22450: // ピーククワッド(偶数) 22451: public static long mmuPeekQuadEven (int a, int supervisor) { 22452: MemoryMappedDevice[] mm = supervisor != 0 ? DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap : DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap; 22453: int a0 = mmuTranslatePeek (a, supervisor, 0); //a+2,a+4,a+6が必要なので上書き不可 22454: if ((a & 2) == 0) { //4の倍数 22455: int a4 = mmuTranslatePeek (a + 4, supervisor, 0); //4の倍数 22456: return ((long) ((a0 & 1) != 0 ? -1 : mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdPls (a0)) << 32 | 22457: (long) ((a4 & 1) != 0 ? -1 : mm[a4 >>> XEiJ.BUS_PAGE_BITS].mmdPls (a4)) & 0x00000000ffffffffL); 22458: } else { //4の倍数+2 22459: int a2 = mmuTranslatePeek (a + 2, supervisor, 0); //4の倍数 22460: int a6 = mmuTranslatePeek (a + 6, supervisor, 0); //4の倍数 22461: return ((long) ((a0 & 1) != 0 ? -1 : mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdPws (a0)) << 48 | 22462: (long) ((a2 & 1) != 0 ? -1 : mm[a2 >>> XEiJ.BUS_PAGE_BITS].mmdPls (a2)) << 16 & 0x0000ffffffff0000L | 22463: (long) ((a6 & 1) != 0 ? 65535 : mm[a6 >>> XEiJ.BUS_PAGE_BITS].mmdPwz (a6))); 22464: } 22465: } //mmuPeekQuadEven(int,int) 22466: 22467: //d = mmuPeekQuadFour (a, supervisor) 22468: // ピーククワッド(4の倍数) 22469: public static long mmuPeekQuadFour (int a, int supervisor) { 22470: MemoryMappedDevice[] mm = supervisor != 0 ? DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap : DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap; 22471: int a0 = mmuTranslatePeek (a , supervisor, 0); //4の倍数。a+4が必要なので上書き不可 22472: int a4 = mmuTranslatePeek (a + 4, supervisor, 0); //4の倍数 22473: return ((long) ((a0 & 1) != 0 ? -1 : mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdPls (a0)) << 32 | 22474: (long) ((a4 & 1) != 0 ? -1 : mm[a4 >>> XEiJ.BUS_PAGE_BITS].mmdPls (a4)) & 0x00000000ffffffffL); 22475: } //mmuPeekQuadFour(int,int) 22476: 22477: //d = mmuPeekQuadCode (a, supervisor) 22478: // ピーククワッド(コード) 22479: public static long mmuPeekQuadCode (int a, int supervisor) { 22480: MemoryMappedDevice[] mm = supervisor != 0 ? DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap : DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap; 22481: int a0 = mmuTranslatePeek (a, supervisor, 1); //a+2,a+4,a+6が必要なので上書き不可 22482: if ((a & 2) == 0) { //4の倍数 22483: int a4 = mmuTranslatePeek (a + 4, supervisor, 1); 22484: return ((long) ((a0 & 1) != 0 ? -1 : mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdPls (a0)) << 32 | 22485: (long) ((a4 & 1) != 0 ? -1 : mm[a4 >>> XEiJ.BUS_PAGE_BITS].mmdPls (a4)) & 0x00000000ffffffffL); 22486: } else { //4の倍数+2 22487: int a2 = mmuTranslatePeek (a + 2, supervisor, 1); //4の倍数 22488: int a6 = mmuTranslatePeek (a + 6, supervisor, 1); //4の倍数 22489: return ((long) ((a0 & 1) != 0 ? -1 : mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdPws (a0)) << 48 | 22490: (long) ((a2 & 1) != 0 ? -1 : mm[a2 >>> XEiJ.BUS_PAGE_BITS].mmdPls (a2)) << 16 & 0x0000ffffffff0000L | 22491: (long) ((a6 & 1) != 0 ? 65535 : mm[a6 >>> XEiJ.BUS_PAGE_BITS].mmdPwz (a6))); 22492: } 22493: } //mmuPeekQuadCode(int,int) 22494: 22495: //mmuPeekExtended (a, b, f) 22496: // ピークエクステンデッド 22497: public static void mmuPeekExtended (int a, byte[] b, int f) { 22498: for (int i = 0; i < 12; i++) { 22499: b[i] = mmuPeekByteSign (a + i, f); 22500: } 22501: } //mmuPeekExtended(int,int,byte[]) 22502: 22503: //len = mmuPeekStrlen (a, l) 22504: public static int mmuPeekStrlen (int a, int l, int supervisor) { 22505: for (int i = 0; i < l; i++) { 22506: if (mmuPeekByteZeroData (a + i, supervisor) == 0) { 22507: return i; 22508: } 22509: } 22510: return l; 22511: } //mmuPeekStrlen(int,int,int) 22512: 22513: //bool = mmuPeekEquals (a, str) 22514: // アドレスaから始まるSJISの文字列とstrをSJISに変換してエスケープシーケンスを展開した文字列を比較する 22515: // 終端の\0まで比較するときはstrに\0を含めること 22516: // \x??で任意のSJISの文字を書ける 22517: // SJISに変換できない文字は'※'とみなす 22518: // スーパーバイザモード比較する 22519: public static boolean mmuPeekEquals (int a, String str) { 22520: int len = str.length (); 22521: for (int i = 0; i < len; i++) { 22522: int c = str.charAt (i); 22523: if (c == '\\') { //エスケープシーケンス。SJIS変換を省略する 22524: int d = i + 1 < len ? str.charAt (i + 1) : -1; //2文字目 22525: if ((d & -4) == '0') { // \[0-3][0-7]{0,2} 22526: c = d & 7; 22527: d = i + 2 < len ? str.charAt (i + 2) : -1; //3文字目 22528: if ((d & -8) == '0') { 22529: c = c << 3 | (d & 7); 22530: d = i + 3 < len ? str.charAt (i + 3) : -1; //4文字目 22531: if ((d & -8) == '0') { 22532: c = c << 3 | (d & 7); 22533: i++; //4文字 22534: } 22535: i++; //3文字 22536: } 22537: i++; //2文字 22538: } else if ((d & -4) == '4') { // \[4-7][0-7]? 22539: c = d & 7; 22540: d = i + 2 < len ? str.charAt (i + 2) : -1; //3文字目 22541: if ((d & -8) == '0') { 22542: c = c << 3 | (d & 7); 22543: i++; //3文字 22544: } 22545: i++; //2文字 22546: } else if (d == 'b') { // \b 22547: c = 0x08; //BS 22548: i++; //2文字 22549: } else if (d == 't') { // \t 22550: c = 0x09; //HT 22551: i++; //2文字 22552: } else if (d == 'n') { // \n 22553: c = 0x0a; //LF 22554: i++; //2文字 22555: } else if (d == 'v') { // \v 22556: c = 0x0b; //VT 22557: i++; //2文字 22558: } else if (d == 'f') { // \f 22559: c = 0x0c; //FF 22560: i++; //2文字 22561: } else if (d == 'r') { // \r 22562: c = 0x0d; //CR 22563: i++; //2文字 22564: } else if (d == 'x' && 22565: i + 3 < len && 22566: CharacterCode.chrIsXdigit (str.charAt (i + 2)) && 22567: CharacterCode.chrIsXdigit (str.charAt (i + 3))) { // \x[0-9A-Fa-f]{2} 22568: c = (CharacterCode.chrDigit (str.charAt (i + 2)) << 4 | 22569: CharacterCode.chrDigit (str.charAt (i + 3))); 22570: i += 3; //4文字 22571: } else if ('!' <= d && d <= '~') { 22572: c = d; 22573: i++; //2文字 22574: } 22575: if (mmuPeekByteZeroData (a++, 1) != c) { 22576: return false; 22577: } 22578: } else { //エスケープシーケンス以外 22579: int s = CharacterCode.chrCharToSJIS[c]; 22580: if (s == 0 && c != 0) { 22581: s = 0x81a6; //'※' 22582: } 22583: if (s >> 8 != 0) { //2バイトコード 22584: if (mmuPeekByteZeroData (a++, 1) != s >> 8) { 22585: return false; 22586: } 22587: } 22588: if (mmuPeekByteZeroData (a++, 1) != (s & 0xff)) { 22589: return false; 22590: } 22591: } 22592: } //for 22593: return true; 22594: } //mmuPeekEquals 22595: 22596: //s = mmuPeekStringL (a, l, supervisor) 22597: //sb = mmuPeekStringL (sb, a, l, supervisor) 22598: // ピークストリング(長さ指定) 22599: // 文字列を読み出す 22600: // 対応する文字がないときは'.'または'※'になる 22601: // 制御コードは'.'になる 22602: public static String mmuPeekStringL (int a, int l, int supervisor) { 22603: return mmuPeekStringL (new StringBuilder (), a, l, supervisor).toString (); 22604: } //mmuPeekStringL(int,int,int) 22605: public static StringBuilder mmuPeekStringL (StringBuilder sb, int a, int l, int supervisor) { 22606: for (int i = 0; i < l; i++) { 22607: int s = mmuPeekByteZeroData (a + i, supervisor); 22608: char c; 22609: if (0x81 <= s && s <= 0x9f || 0xe0 <= s && s <= 0xef) { //SJISの2バイトコードの1バイト目 22610: int t = i + 1 < l ? mmuPeekByteZeroData (a + i + 1, supervisor) : 0; 22611: if (0x40 <= t && t != 0x7f && t <= 0xfc) { //SJISの2バイトコードの2バイト目 22612: c = CharacterCode.chrSJISToChar[s << 8 | t]; //2バイトで変換する 22613: if (c == 0) { //対応する文字がない 22614: c = '※'; 22615: } 22616: i++; 22617: } else { //SJISの2バイトコードの2バイト目ではない 22618: c = '.'; //SJISの2バイトコードの1バイト目ではなかった 22619: } 22620: } else { //SJISの2バイトコードの1バイト目ではない 22621: c = CharacterCode.chrSJISToChar[s]; //1バイトで変換する 22622: if (c < 0x20 || c == 0x7f) { //対応する文字がないまたは制御コード 22623: c = '.'; 22624: } 22625: } 22626: sb.append (c); 22627: } 22628: return sb; 22629: } //mmuPeekString(StringBuilder,int,int,int) 22630: 22631: //s = mmuPeekStringZ (a, f) 22632: //sb = mmuPeekStringZ (sb, a, f) 22633: // ピークストリング 22634: // 文字列をSJISからUTF-16に変換しながらメモリから読み出す 22635: // '\0'の手前まで読み出す 22636: // UTF-16に変換できない文字は'\ufffd'になる 22637: public static String mmuPeekStringZ (int a, int f) { 22638: return mmuPeekStringZ (new StringBuilder (), a, f).toString (); 22639: } //mmuPeekStringZ(int,int) 22640: public static StringBuilder mmuPeekStringZ (StringBuilder sb, int a, int f) { 22641: for (;;) { 22642: int s = mmuPeekByteSign (a++, f) & 255; 22643: if (s == 0) { 22644: break; 22645: } 22646: int u; 22647: if (0x81 <= s && s <= 0x9f || 0xe0 <= s && s <= 0xef) { //SJISの2バイトコードの1バイト目 22648: int t = mmuPeekByteSign (a++, f) & 255; 22649: if (t == 0) { 22650: sb.append ('\ufffd'); 22651: break; 22652: } 22653: if (0x40 <= t && t != 0x7f && t <= 0xfc) { //SJISの2バイトコードの2バイト目 22654: t |= s << 8; 22655: u = CharacterCode.chrSJISToChar[t]; //2バイトで変換する 22656: if (u == 0) { //変換できない 22657: u = 0xfffd; 22658: } 22659: } else { //SJISの2バイトコードの2バイト目ではない 22660: u = 0xfffd; 22661: } 22662: } else { //SJISの2バイトコードの1バイト目ではない 22663: u = CharacterCode.chrSJISToChar[s]; //1バイトで変換する 22664: if (u == 0) { //変換できない 22665: u = 0xfffd; 22666: } 22667: } 22668: sb.append ((char) u); 22669: } 22670: return sb; 22671: } //mmuPeekStringZ(StringBuilder,int,int) 22672: 22673: //-------------------------------------------------------------------------------- 22674: //リード 22675: // アドレス変換はリード 22676: // FSLWのRead and WriteはRead 22677: 22678: //d = mmuReadByteSignData (a, supervisor) 22679: // リードバイト符号拡張(データ) 22680: public static byte mmuReadByteSignData (int a, int supervisor) throws M68kException { 22681: if (supervisor != 0) { //スーパーバイザモード 22682: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_READ | M60_FSLW_SIZE_BYTE | M60_FSLW_TM_SUPER_DATA; 22683: int a0 = mmuTranslateReadSuperData (a); 22684: return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRbs (a0); 22685: } else { //ユーザモード 22686: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_READ | M60_FSLW_SIZE_BYTE | M60_FSLW_TM_USER_DATA; 22687: int a0 = mmuTranslateReadUserData (a); 22688: return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRbs (a0); 22689: } 22690: } //mmuReadByteSignData(int,int) 22691: 22692: //d = mmuReadByteZeroData (a, supervisor) 22693: // リードバイトゼロ拡張(データ) 22694: public static int mmuReadByteZeroData (int a, int supervisor) throws M68kException { 22695: if (supervisor != 0) { //スーパーバイザモード 22696: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_READ | M60_FSLW_SIZE_BYTE | M60_FSLW_TM_SUPER_DATA; 22697: int a0 = mmuTranslateReadSuperData (a); 22698: return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRbz (a0); 22699: } else { //ユーザモード 22700: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_READ | M60_FSLW_SIZE_BYTE | M60_FSLW_TM_USER_DATA; 22701: int a0 = mmuTranslateReadUserData (a); 22702: return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRbz (a0); 22703: } 22704: } //mmuReadByteZeroData(int,int) 22705: 22706: //d = mmuReadByteSignExword (a, supervisor) 22707: // リードバイト符号拡張(拡張ワード) 22708: public static byte mmuReadByteSignExword (int a, int supervisor) throws M68kException { 22709: if (supervisor != 0) { //スーパーバイザモード 22710: m60FSLW = M60_FSLW_IOMA_EXWORD | M60_FSLW_RW_READ | M60_FSLW_SIZE_BYTE | M60_FSLW_TM_SUPER_CODE; 22711: int a0 = mmuTranslateReadSuperCode (a); 22712: return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRbs (a0); 22713: } else { //ユーザモード 22714: m60FSLW = M60_FSLW_IOMA_EXWORD | M60_FSLW_RW_READ | M60_FSLW_SIZE_BYTE | M60_FSLW_TM_USER_CODE; 22715: int a0 = mmuTranslateReadUserCode (a); 22716: return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRbs (a0); 22717: } 22718: } //mmuReadByteSignExword(int,int) 22719: 22720: //d = mmuReadByteZeroExword (a, supervisor) 22721: // リードバイトゼロ拡張(拡張ワード) 22722: public static int mmuReadByteZeroExword (int a, int supervisor) throws M68kException { 22723: if (supervisor != 0) { //スーパーバイザモード 22724: m60FSLW = M60_FSLW_IOMA_EXWORD | M60_FSLW_RW_READ | M60_FSLW_SIZE_BYTE | M60_FSLW_TM_SUPER_CODE; 22725: int a0 = mmuTranslateReadSuperCode (a); 22726: return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRbz (a0); 22727: } else { //ユーザモード 22728: m60FSLW = M60_FSLW_IOMA_EXWORD | M60_FSLW_RW_READ | M60_FSLW_SIZE_BYTE | M60_FSLW_TM_USER_CODE; 22729: int a0 = mmuTranslateReadUserCode (a); 22730: return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRbz (a0); 22731: } 22732: } //mmuReadByteZeroExword(int,int) 22733: 22734: //d = mmuReadWordSignData (a, supervisor) 22735: // リードワード符号拡張(データ) 22736: public static int mmuReadWordSignData (int a, int supervisor) throws M68kException { 22737: if (supervisor != 0) { //スーパーバイザモード 22738: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_READ | M60_FSLW_SIZE_WORD | M60_FSLW_TM_SUPER_DATA; 22739: int a0 = mmuTranslateReadSuperData (a); //a+1が必要なので上書き不可 22740: if ((a & 1) == 0) { //偶数 22741: return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRws (a0); 22742: } else { //奇数 22743: int d0 = (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRbs (a0); 22744: m60FSLW ^= M60_FSLW_IOMA_FIRST ^ M60_FSLW_IOMA_SECOND; 22745: int a1 = mmuTranslateReadSuperData (a + 1); //偶数 22746: return (d0 << 8 | 22747: (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a1 >>> XEiJ.BUS_PAGE_BITS].mmdRbz (a1)); 22748: } 22749: } else { //ユーザモード 22750: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_READ | M60_FSLW_SIZE_WORD | M60_FSLW_TM_USER_DATA; 22751: int a0 = mmuTranslateReadUserData (a); //a+1が必要なので上書き不可 22752: if ((a & 1) == 0) { //偶数 22753: return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRws (a0); 22754: } else { //奇数 22755: int d0 = (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRbs (a0); 22756: m60FSLW ^= M60_FSLW_IOMA_FIRST ^ M60_FSLW_IOMA_SECOND; 22757: int a1 = mmuTranslateReadUserData (a + 1); //偶数 22758: return (d0 << 8 | 22759: (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a1 >>> XEiJ.BUS_PAGE_BITS].mmdRbz (a1)); 22760: } 22761: } 22762: } //mmuReadWordSignData(int,int) 22763: 22764: //d = mmuReadWordZeroData (a, supervisor) 22765: // リードワードゼロ拡張(データ) 22766: public static int mmuReadWordZeroData (int a, int supervisor) throws M68kException { 22767: if (supervisor != 0) { //スーパーバイザモード 22768: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_READ | M60_FSLW_SIZE_WORD | M60_FSLW_TM_SUPER_DATA; 22769: int a0 = mmuTranslateReadSuperData (a); //a+1が必要なので上書き不可 22770: if ((a & 1) == 0) { //偶数 22771: return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a0); 22772: } else { //奇数 22773: int d0 = (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRbz (a0); 22774: m60FSLW ^= M60_FSLW_IOMA_FIRST ^ M60_FSLW_IOMA_SECOND; 22775: int a1 = mmuTranslateReadSuperData (a + 1); //偶数 22776: return (d0 << 8 | 22777: (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a1 >>> XEiJ.BUS_PAGE_BITS].mmdRbz (a1)); 22778: } 22779: } else { //ユーザモード 22780: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_READ | M60_FSLW_SIZE_WORD | M60_FSLW_TM_USER_DATA; 22781: int a0 = mmuTranslateReadUserData (a); //a+1が必要なので上書き不可 22782: if ((a & 1) == 0) { //偶数 22783: return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a0); 22784: } else { //奇数 22785: int d0 = (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRbz (a0); 22786: m60FSLW ^= M60_FSLW_IOMA_FIRST ^ M60_FSLW_IOMA_SECOND; 22787: int a1 = mmuTranslateReadUserData (a + 1); //偶数 22788: return (d0 << 8 | 22789: (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a1 >>> XEiJ.BUS_PAGE_BITS].mmdRbz (a1)); 22790: } 22791: } 22792: } //mmuReadWordZeroData(int,int) 22793: 22794: //d = mmuReadWordSignEven (a, supervisor) 22795: // リードワード符号拡張(偶数) 22796: public static int mmuReadWordSignEven (int a, int supervisor) throws M68kException { 22797: if (supervisor != 0) { //スーパーバイザモード 22798: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_READ | M60_FSLW_SIZE_WORD | M60_FSLW_TM_SUPER_DATA; 22799: a = mmuTranslateReadSuperData (a); 22800: return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a >>> XEiJ.BUS_PAGE_BITS].mmdRws (a); 22801: } else { //ユーザモード 22802: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_READ | M60_FSLW_SIZE_WORD | M60_FSLW_TM_USER_DATA; 22803: a = mmuTranslateReadUserData (a); 22804: return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a >>> XEiJ.BUS_PAGE_BITS].mmdRws (a); 22805: } 22806: } //mmuReadWordSignEven(int,int) 22807: 22808: //d = mmuReadWordZeroEven (a, supervisor) 22809: // リードワードゼロ拡張(偶数) 22810: public static int mmuReadWordZeroEven (int a, int supervisor) throws M68kException { 22811: if (supervisor != 0) { //スーパーバイザモード 22812: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_READ | M60_FSLW_SIZE_WORD | M60_FSLW_TM_SUPER_DATA; 22813: a = mmuTranslateReadSuperData (a); 22814: return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a); 22815: } else { //ユーザモード 22816: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_READ | M60_FSLW_SIZE_WORD | M60_FSLW_TM_USER_DATA; 22817: a = mmuTranslateReadUserData (a); 22818: return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a); 22819: } 22820: } //mmuReadWordZeroEven(int,int) 22821: 22822: //d = mmuReadWordSignExword (a, supervisor) 22823: // リードワード符号拡張(拡張ワード) 22824: public static int mmuReadWordSignExword (int a, int supervisor) throws M68kException { 22825: if (supervisor != 0) { //スーパーバイザモード 22826: m60FSLW = M60_FSLW_IOMA_EXWORD | M60_FSLW_RW_READ | M60_FSLW_SIZE_WORD | M60_FSLW_TM_SUPER_CODE; 22827: a = mmuTranslateReadSuperCode (a); 22828: return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a >>> XEiJ.BUS_PAGE_BITS].mmdRws (a); 22829: } else { //ユーザモード 22830: m60FSLW = M60_FSLW_IOMA_EXWORD | M60_FSLW_RW_READ | M60_FSLW_SIZE_WORD | M60_FSLW_TM_USER_CODE; 22831: a = mmuTranslateReadUserCode (a); 22832: return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a >>> XEiJ.BUS_PAGE_BITS].mmdRws (a); 22833: } 22834: } //mmuReadWordSignExword(int,int) 22835: 22836: //d = mmuReadWordZeroExword (a, supervisor) 22837: // リードワードゼロ拡張(拡張ワード) 22838: public static int mmuReadWordZeroExword (int a, int supervisor) throws M68kException { 22839: if (supervisor != 0) { //スーパーバイザモード 22840: m60FSLW = M60_FSLW_IOMA_EXWORD | M60_FSLW_RW_READ | M60_FSLW_SIZE_WORD | M60_FSLW_TM_SUPER_CODE; 22841: a = mmuTranslateReadSuperCode (a); 22842: return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a); 22843: } else { //ユーザモード 22844: m60FSLW = M60_FSLW_IOMA_EXWORD | M60_FSLW_RW_READ | M60_FSLW_SIZE_WORD | M60_FSLW_TM_USER_CODE; 22845: a = mmuTranslateReadUserCode (a); 22846: return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a); 22847: } 22848: } //mmuReadWordZeroExword(int,int) 22849: 22850: //d = mmuReadWordSignOpword (a, supervisor) 22851: // リードワード符号拡張(命令ワード) 22852: public static int mmuReadWordSignOpword (int a, int supervisor) throws M68kException { 22853: if (supervisor != 0) { //スーパーバイザモード 22854: m60FSLW = M60_FSLW_IOMA_OPWORD | M60_FSLW_RW_READ | M60_FSLW_SIZE_WORD | M60_FSLW_TM_SUPER_CODE; 22855: a = mmuTranslateReadSuperCode (a); 22856: return (InstructionBreakPoint.IBP_ON ? InstructionBreakPoint.ibpOp1SuperMap : DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a >>> XEiJ.BUS_PAGE_BITS].mmdRws (a); 22857: } else { //ユーザモード 22858: m60FSLW = M60_FSLW_IOMA_OPWORD | M60_FSLW_RW_READ | M60_FSLW_SIZE_WORD | M60_FSLW_TM_USER_CODE; 22859: a = mmuTranslateReadUserCode (a); 22860: return (InstructionBreakPoint.IBP_ON ? InstructionBreakPoint.ibpOp1UserMap : DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a >>> XEiJ.BUS_PAGE_BITS].mmdRws (a); 22861: } 22862: } //mmuReadWordSignOpword(int,int) 22863: 22864: //d = mmuReadWordZeroOpword (a, supervisor) 22865: // リードワードゼロ拡張(命令ワード) 22866: public static int mmuReadWordZeroOpword (int a, int supervisor) throws M68kException { 22867: if (supervisor != 0) { //スーパーバイザモード 22868: m60FSLW = M60_FSLW_IOMA_OPWORD | M60_FSLW_RW_READ | M60_FSLW_SIZE_WORD | M60_FSLW_TM_SUPER_CODE; 22869: a = mmuTranslateReadSuperCode (a); 22870: return (InstructionBreakPoint.IBP_ON ? InstructionBreakPoint.ibpOp1SuperMap : DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a); 22871: } else { //ユーザモード 22872: m60FSLW = M60_FSLW_IOMA_OPWORD | M60_FSLW_RW_READ | M60_FSLW_SIZE_WORD | M60_FSLW_TM_USER_CODE; 22873: a = mmuTranslateReadUserCode (a); 22874: return (InstructionBreakPoint.IBP_ON ? InstructionBreakPoint.ibpOp1UserMap : DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a); 22875: } 22876: } //mmuReadWordZeroOpword(int,int) 22877: 22878: //d = mmuReadLongData (a, supervisor) 22879: // リードロング(データ) 22880: public static int mmuReadLongData (int a, int supervisor) throws M68kException { 22881: if (supervisor != 0) { //スーパーバイザモード 22882: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_READ | M60_FSLW_SIZE_LONG | M60_FSLW_TM_SUPER_DATA; 22883: int a0 = mmuTranslateReadSuperData (a); //a+1,a+2,a+3が必要なので上書き不可 22884: if ((a & 3) == 0) { //4の倍数 22885: return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRls (a0); 22886: } else if ((a & 1) == 0) { //4の倍数+2 22887: int d0 = (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRws (a0); 22888: m60FSLW ^= M60_FSLW_IOMA_FIRST ^ M60_FSLW_IOMA_SECOND; 22889: int a2 = mmuTranslateReadSuperData (a + 2); //偶数 22890: return (d0 << 16 | 22891: (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a2 >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a2)); 22892: } else { //奇数 22893: int d0 = (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRbs (a0); 22894: m60FSLW ^= M60_FSLW_IOMA_FIRST ^ M60_FSLW_IOMA_SECOND; 22895: int a1 = mmuTranslateReadSuperData (a + 1); //偶数 22896: int a3 = mmuTranslateReadSuperData (a + 3); //偶数 22897: return (d0 << 24 | 22898: (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a1 >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a1) << 8 | 22899: (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a3 >>> XEiJ.BUS_PAGE_BITS].mmdRbz (a3)); 22900: } 22901: } else { //ユーザモード 22902: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_READ | M60_FSLW_SIZE_LONG | M60_FSLW_TM_USER_DATA; 22903: int a0 = mmuTranslateReadUserData (a); //a+1,a+2,a+3が必要なので上書き不可 22904: if ((a & 3) == 0) { //4の倍数 22905: return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRls (a0); 22906: } else if ((a & 1) == 0) { //4の倍数+2 22907: int d0 = (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRws (a0); 22908: m60FSLW ^= M60_FSLW_IOMA_FIRST ^ M60_FSLW_IOMA_SECOND; 22909: int a2 = mmuTranslateReadUserData (a + 2); //偶数 22910: return (d0 << 16 | 22911: (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a2 >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a2)); 22912: } else { //奇数 22913: int d0 = (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRbs (a0); 22914: m60FSLW ^= M60_FSLW_IOMA_FIRST ^ M60_FSLW_IOMA_SECOND; 22915: int a1 = mmuTranslateReadUserData (a + 1); //偶数 22916: int a3 = mmuTranslateReadUserData (a + 3); //偶数 22917: return (d0 << 24 | 22918: (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a1 >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a1) << 8 | 22919: (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a3 >>> XEiJ.BUS_PAGE_BITS].mmdRbz (a3)); 22920: } 22921: } 22922: } //mmuReadLongData(int,int) 22923: 22924: //d = mmuReadLongEven (a, supervisor) 22925: // リードロング(偶数) 22926: public static int mmuReadLongEven (int a, int supervisor) throws M68kException { 22927: if (supervisor != 0) { //スーパーバイザモード 22928: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_READ | M60_FSLW_SIZE_LONG | M60_FSLW_TM_SUPER_DATA; 22929: int a0 = mmuTranslateReadSuperData (a); //a+2が必要なので上書き不可 22930: if ((a & 2) == 0) { //4の倍数 22931: return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRls (a0); 22932: } else { //4の倍数+2 22933: int d0 = (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRws (a0); 22934: m60FSLW ^= M60_FSLW_IOMA_FIRST ^ M60_FSLW_IOMA_SECOND; 22935: int a2 = mmuTranslateReadSuperData (a + 2); //偶数 22936: return (d0 << 16 | 22937: (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a2 >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a2)); 22938: } 22939: } else { //ユーザモード 22940: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_READ | M60_FSLW_SIZE_LONG | M60_FSLW_TM_USER_DATA; 22941: int a0 = mmuTranslateReadUserData (a); //a+2が必要なので上書き不可 22942: if ((a & 2) == 0) { //4の倍数 22943: return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRls (a0); 22944: } else { //4の倍数+2 22945: int d0 = (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRws (a0); 22946: m60FSLW ^= M60_FSLW_IOMA_FIRST ^ M60_FSLW_IOMA_SECOND; 22947: int a2 = mmuTranslateReadUserData (a + 2); //偶数 22948: return (d0 << 16 | 22949: (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a2 >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a2)); 22950: } 22951: } 22952: } //mmuReadLongEven(int,int) 22953: 22954: //d = mmuReadLongExword (a, supervisor) 22955: // リードロング(拡張ワード) 22956: public static int mmuReadLongExword (int a, int supervisor) throws M68kException { 22957: if (supervisor != 0) { //スーパーバイザモード 22958: m60FSLW = M60_FSLW_IOMA_EXWORD | M60_FSLW_RW_READ | M60_FSLW_SIZE_LONG | M60_FSLW_TM_SUPER_CODE; 22959: int a0 = mmuTranslateReadSuperData (a); //a+2が必要なので上書き不可 22960: if ((a & 2) == 0) { //4の倍数 22961: return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRls (a0); 22962: } else { //4の倍数+2 22963: int a2 = mmuTranslateReadSuperData (a + 2); //偶数 22964: return ((DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRws (a0) << 16 | 22965: (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a2 >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a2)); 22966: } 22967: } else { //ユーザモード 22968: m60FSLW = M60_FSLW_IOMA_EXWORD | M60_FSLW_RW_READ | M60_FSLW_SIZE_LONG | M60_FSLW_TM_USER_CODE; 22969: int a0 = mmuTranslateReadUserData (a); //a+2が必要なので上書き不可 22970: if ((a & 2) == 0) { //4の倍数 22971: return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRls (a0); 22972: } else { //4の倍数+2 22973: int a2 = mmuTranslateReadUserData (a + 2); //偶数 22974: return ((DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRws (a0) << 16 | 22975: (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a2 >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a2)); 22976: } 22977: } 22978: } //mmuReadLongExword(int,int) 22979: 22980: //d = mmuReadLongFour (a, supervisor) 22981: // リードロング(4の倍数) 22982: public static int mmuReadLongFour (int a, int supervisor) throws M68kException { 22983: if (supervisor != 0) { //スーパーバイザモード 22984: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_READ | M60_FSLW_SIZE_LONG | M60_FSLW_TM_SUPER_DATA; 22985: a = mmuTranslateReadSuperData (a); 22986: return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a >>> XEiJ.BUS_PAGE_BITS].mmdRls (a); 22987: } else { //ユーザモード 22988: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_READ | M60_FSLW_SIZE_LONG | M60_FSLW_TM_USER_DATA; 22989: a = mmuTranslateReadUserData (a); 22990: return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a >>> XEiJ.BUS_PAGE_BITS].mmdRls (a); 22991: } 22992: } //mmuReadLongFour(int,int) 22993: 22994: //l = mmuReadQuadData (a, supervisor) 22995: // リードクワッド(データ) 22996: public static long mmuReadQuadData (int a, int supervisor) throws M68kException { 22997: long d; 22998: if (supervisor != 0) { //スーパーバイザモード 22999: final MemoryMappedDevice[] map = DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap; 23000: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_READ | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_SUPER_DATA; 23001: int t = mmuTranslateReadSuperData (a); 23002: if ((a & 3) == 0) { //4n 23003: d = (long) map[t >>> XEiJ.BUS_PAGE_BITS].mmdRls (t); 23004: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_READ | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_SUPER_DATA; 23005: t = mmuTranslateReadSuperData (a + 4); 23006: d = d << 32 | (0xffffffffL & (long) map[t >>> XEiJ.BUS_PAGE_BITS].mmdRls (t)); 23007: } else if ((a & 1) == 0) { //4n+2 23008: d = (long) map[t >>> XEiJ.BUS_PAGE_BITS].mmdRws (t); 23009: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_READ | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_SUPER_DATA; 23010: t = mmuTranslateReadSuperData (a + 2); 23011: d = d << 32 | (0xffffffffL & (long) map[t >>> XEiJ.BUS_PAGE_BITS].mmdRls (t)); 23012: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_READ | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_SUPER_DATA; 23013: t = mmuTranslateReadSuperData (a + 6); 23014: d = d << 16 | (long) map[t >>> XEiJ.BUS_PAGE_BITS].mmdRwz (t); 23015: } else if ((a & 3) == 1) { //4n+1 23016: d = (long) map[t >>> XEiJ.BUS_PAGE_BITS].mmdRbs (t); 23017: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_READ | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_SUPER_DATA; 23018: t = mmuTranslateReadSuperData (a + 1); 23019: d = d << 16 | (long) map[t >>> XEiJ.BUS_PAGE_BITS].mmdRwz (t); 23020: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_READ | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_SUPER_DATA; 23021: t = mmuTranslateReadSuperData (a + 3); 23022: d = d << 32 | (0xffffffffL & (long) map[t >>> XEiJ.BUS_PAGE_BITS].mmdRls (t)); 23023: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_READ | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_SUPER_DATA; 23024: t = mmuTranslateReadSuperData (a + 7); 23025: d = d << 8 | (long) map[t >>> XEiJ.BUS_PAGE_BITS].mmdRbz (t); 23026: } else { // //4n+3 23027: d = (long) map[t >>> XEiJ.BUS_PAGE_BITS].mmdRbs (t); 23028: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_READ | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_SUPER_DATA; 23029: t = mmuTranslateReadSuperData (a + 1); 23030: d = d << 32 | (0xffffffffL & (long) map[t >>> XEiJ.BUS_PAGE_BITS].mmdRls (t)); 23031: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_READ | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_SUPER_DATA; 23032: t = mmuTranslateReadSuperData (a + 5); 23033: d = d << 16 | (long) map[t >>> XEiJ.BUS_PAGE_BITS].mmdRwz (t); 23034: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_READ | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_SUPER_DATA; 23035: t = mmuTranslateReadSuperData (a + 7); 23036: d = d << 8 | (long) map[t >>> XEiJ.BUS_PAGE_BITS].mmdRbz (t); 23037: } 23038: } else { //ユーザモード 23039: final MemoryMappedDevice[] map = DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap; 23040: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_READ | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_USER_DATA; 23041: int t = mmuTranslateReadUserData (a); 23042: if ((a & 3) == 0) { //4n 23043: d = (long) map[t >>> XEiJ.BUS_PAGE_BITS].mmdRls (t); 23044: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_READ | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_USER_DATA; 23045: t = mmuTranslateReadUserData (a + 4); 23046: d = d << 32 | (0xffffffffL & (long) map[t >>> XEiJ.BUS_PAGE_BITS].mmdRls (t)); 23047: } else if ((a & 1) == 0) { //4n+2 23048: d = (long) map[t >>> XEiJ.BUS_PAGE_BITS].mmdRws (t); 23049: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_READ | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_USER_DATA; 23050: t = mmuTranslateReadUserData (a + 2); 23051: d = d << 32 | (0xffffffffL & (long) map[t >>> XEiJ.BUS_PAGE_BITS].mmdRls (t)); 23052: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_READ | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_USER_DATA; 23053: t = mmuTranslateReadUserData (a + 6); 23054: d = d << 16 | (long) map[t >>> XEiJ.BUS_PAGE_BITS].mmdRwz (t); 23055: } else if ((a & 3) == 1) { //4n+1 23056: d = (long) map[t >>> XEiJ.BUS_PAGE_BITS].mmdRbs (t); 23057: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_READ | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_USER_DATA; 23058: t = mmuTranslateReadUserData (a + 1); 23059: d = d << 16 | (long) map[t >>> XEiJ.BUS_PAGE_BITS].mmdRwz (t); 23060: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_READ | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_USER_DATA; 23061: t = mmuTranslateReadUserData (a + 3); 23062: d = d << 32 | (0xffffffffL & (long) map[t >>> XEiJ.BUS_PAGE_BITS].mmdRls (t)); 23063: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_READ | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_USER_DATA; 23064: t = mmuTranslateReadUserData (a + 7); 23065: d = d << 8 | (long) map[t >>> XEiJ.BUS_PAGE_BITS].mmdRbz (t); 23066: } else { // //4n+3 23067: d = (long) map[t >>> XEiJ.BUS_PAGE_BITS].mmdRbs (t); 23068: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_READ | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_USER_DATA; 23069: t = mmuTranslateReadUserData (a + 1); 23070: d = d << 32 | (0xffffffffL & (long) map[t >>> XEiJ.BUS_PAGE_BITS].mmdRls (t)); 23071: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_READ | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_USER_DATA; 23072: t = mmuTranslateReadUserData (a + 5); 23073: d = d << 16 | (long) map[t >>> XEiJ.BUS_PAGE_BITS].mmdRwz (t); 23074: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_READ | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_USER_DATA; 23075: t = mmuTranslateReadUserData (a + 7); 23076: d = d << 8 | (long) map[t >>> XEiJ.BUS_PAGE_BITS].mmdRbz (t); 23077: } 23078: } 23079: return d; 23080: } //mmuReadQuadData(int,int) 23081: 23082: //l = mmuReadQuadSecond (a, supervisor) 23083: // リードクワッド(2番目) 23084: // エクステンデッドとラインの2番目で使う 23085: public static long mmuReadQuadSecond (int a, int supervisor) throws M68kException { 23086: long d; 23087: if (supervisor != 0) { //スーパーバイザモード 23088: final MemoryMappedDevice[] map = DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap; 23089: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_READ | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_SUPER_DATA; 23090: int t = mmuTranslateReadSuperData (a); 23091: if ((a & 3) == 0) { //4n 23092: d = (long) map[t >>> XEiJ.BUS_PAGE_BITS].mmdRls (t); 23093: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_READ | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_SUPER_DATA; 23094: t = mmuTranslateReadSuperData (a + 4); 23095: d = d << 32 | (0xffffffffL & (long) map[t >>> XEiJ.BUS_PAGE_BITS].mmdRls (t)); 23096: } else if ((a & 1) == 0) { //4n+2 23097: d = (long) map[t >>> XEiJ.BUS_PAGE_BITS].mmdRws (t); 23098: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_READ | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_SUPER_DATA; 23099: t = mmuTranslateReadSuperData (a + 2); 23100: d = d << 32 | (0xffffffffL & (long) map[t >>> XEiJ.BUS_PAGE_BITS].mmdRls (t)); 23101: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_READ | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_SUPER_DATA; 23102: t = mmuTranslateReadSuperData (a + 6); 23103: d = d << 16 | (long) map[t >>> XEiJ.BUS_PAGE_BITS].mmdRwz (t); 23104: } else if ((a & 3) == 1) { //4n+1 23105: d = (long) map[t >>> XEiJ.BUS_PAGE_BITS].mmdRbs (t); 23106: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_READ | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_SUPER_DATA; 23107: t = mmuTranslateReadSuperData (a + 1); 23108: d = d << 16 | (long) map[t >>> XEiJ.BUS_PAGE_BITS].mmdRwz (t); 23109: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_READ | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_SUPER_DATA; 23110: t = mmuTranslateReadSuperData (a + 3); 23111: d = d << 32 | (0xffffffffL & (long) map[t >>> XEiJ.BUS_PAGE_BITS].mmdRls (t)); 23112: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_READ | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_SUPER_DATA; 23113: t = mmuTranslateReadSuperData (a + 7); 23114: d = d << 8 | (long) map[t >>> XEiJ.BUS_PAGE_BITS].mmdRbz (t); 23115: } else { // //4n+3 23116: d = (long) map[t >>> XEiJ.BUS_PAGE_BITS].mmdRbs (t); 23117: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_READ | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_SUPER_DATA; 23118: t = mmuTranslateReadSuperData (a + 1); 23119: d = d << 32 | (0xffffffffL & (long) map[t >>> XEiJ.BUS_PAGE_BITS].mmdRls (t)); 23120: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_READ | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_SUPER_DATA; 23121: t = mmuTranslateReadSuperData (a + 5); 23122: d = d << 16 | (long) map[t >>> XEiJ.BUS_PAGE_BITS].mmdRwz (t); 23123: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_READ | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_SUPER_DATA; 23124: t = mmuTranslateReadSuperData (a + 7); 23125: d = d << 8 | (long) map[t >>> XEiJ.BUS_PAGE_BITS].mmdRbz (t); 23126: } 23127: } else { //ユーザモード 23128: final MemoryMappedDevice[] map = DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap; 23129: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_READ | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_USER_DATA; 23130: int t = mmuTranslateReadUserData (a); 23131: if ((a & 3) == 0) { //4n 23132: d = (long) map[t >>> XEiJ.BUS_PAGE_BITS].mmdRls (t); 23133: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_READ | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_USER_DATA; 23134: t = mmuTranslateReadUserData (a + 4); 23135: d = d << 32 | (0xffffffffL & (long) map[t >>> XEiJ.BUS_PAGE_BITS].mmdRls (t)); 23136: } else if ((a & 1) == 0) { //4n+2 23137: d = (long) map[t >>> XEiJ.BUS_PAGE_BITS].mmdRws (t); 23138: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_READ | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_USER_DATA; 23139: t = mmuTranslateReadUserData (a + 2); 23140: d = d << 32 | (0xffffffffL & (long) map[t >>> XEiJ.BUS_PAGE_BITS].mmdRls (t)); 23141: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_READ | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_USER_DATA; 23142: t = mmuTranslateReadUserData (a + 6); 23143: d = d << 16 | (long) map[t >>> XEiJ.BUS_PAGE_BITS].mmdRwz (t); 23144: } else if ((a & 3) == 1) { //4n+1 23145: d = (long) map[t >>> XEiJ.BUS_PAGE_BITS].mmdRbs (t); 23146: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_READ | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_USER_DATA; 23147: t = mmuTranslateReadUserData (a + 1); 23148: d = d << 16 | (long) map[t >>> XEiJ.BUS_PAGE_BITS].mmdRwz (t); 23149: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_READ | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_USER_DATA; 23150: t = mmuTranslateReadUserData (a + 3); 23151: d = d << 32 | (0xffffffffL & (long) map[t >>> XEiJ.BUS_PAGE_BITS].mmdRls (t)); 23152: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_READ | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_USER_DATA; 23153: t = mmuTranslateReadUserData (a + 7); 23154: d = d << 8 | (long) map[t >>> XEiJ.BUS_PAGE_BITS].mmdRbz (t); 23155: } else { // //4n+3 23156: d = (long) map[t >>> XEiJ.BUS_PAGE_BITS].mmdRbs (t); 23157: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_READ | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_USER_DATA; 23158: t = mmuTranslateReadUserData (a + 1); 23159: d = d << 32 | (0xffffffffL & (long) map[t >>> XEiJ.BUS_PAGE_BITS].mmdRls (t)); 23160: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_READ | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_USER_DATA; 23161: t = mmuTranslateReadUserData (a + 5); 23162: d = d << 16 | (long) map[t >>> XEiJ.BUS_PAGE_BITS].mmdRwz (t); 23163: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_READ | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_USER_DATA; 23164: t = mmuTranslateReadUserData (a + 7); 23165: d = d << 8 | (long) map[t >>> XEiJ.BUS_PAGE_BITS].mmdRbz (t); 23166: } 23167: } 23168: return d; 23169: } //mmuReadQuadSecond(int,int) 23170: 23171: //l = mmuReadQuadExword (a, supervisor) 23172: // リードクワッド(拡張ワード) 23173: // イミディエイトで使う 23174: public static long mmuReadQuadExword (int a, int supervisor) throws M68kException { 23175: if (supervisor != 0) { //スーパーバイザモード 23176: m60FSLW = M60_FSLW_IOMA_EXWORD | M60_FSLW_RW_READ | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_SUPER_CODE; 23177: int a0 = mmuTranslateReadSuperData (a); //a+2,a+4,a+6が必要なので上書き不可 23178: if ((a & 2) == 0) { //4の倍数 23179: int a4 = mmuTranslateReadSuperData (a + 4); //4の倍数 23180: return ((long) (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRls (a0) << 32 | 23181: (long) (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a4 >>> XEiJ.BUS_PAGE_BITS].mmdRls (a4) & 0x00000000ffffffffL); 23182: } else { //4の倍数+2 23183: int a2 = mmuTranslateReadSuperData (a + 2); //4の倍数 23184: int a6 = mmuTranslateReadSuperData (a + 6); //4の倍数 23185: return ((long) (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRws (a0) << 48 | 23186: (long) (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a2 >>> XEiJ.BUS_PAGE_BITS].mmdRls (a2) << 16 & 0x0000ffffffff0000L | 23187: (long) (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a6 >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a6)); 23188: } 23189: } else { //ユーザモード 23190: m60FSLW = M60_FSLW_IOMA_EXWORD | M60_FSLW_RW_READ | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_USER_CODE; 23191: int a0 = mmuTranslateReadUserData (a); //a+2,a+4,a+6が必要なので上書き不可 23192: if ((a & 2) == 0) { //4の倍数 23193: int a4 = mmuTranslateReadUserData (a + 4); //4の倍数 23194: return ((long) (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRls (a0) << 32 | 23195: (long) (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a4 >>> XEiJ.BUS_PAGE_BITS].mmdRls (a4) & 0x00000000ffffffffL); 23196: } else { //4の倍数+2 23197: int a2 = mmuTranslateReadUserData (a + 2); //4の倍数 23198: int a6 = mmuTranslateReadUserData (a + 6); //4の倍数 23199: return ((long) (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRws (a0) << 48 | 23200: (long) (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a2 >>> XEiJ.BUS_PAGE_BITS].mmdRls (a2) << 16 & 0x0000ffffffff0000L | 23201: (long) (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a6 >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a6)); 23202: } 23203: } 23204: } //mmuReadQuadExword(int,int) 23205: 23206: //-------------------------------------------------------------------------------- 23207: //リードモディファイライトのリード 23208: // アドレス変換はライト 23209: // FSLWのRead and WriteはRead-Modify-Write 23210: 23211: //d = mmuModifyByteSignData (a, supervisor) 23212: // リードモディファイライトのリードバイト符号拡張(データ) 23213: public static byte mmuModifyByteSignData (int a, int supervisor) throws M68kException { 23214: if (supervisor != 0) { //スーパーバイザモード 23215: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_MODIFY | M60_FSLW_SIZE_BYTE | M60_FSLW_TM_SUPER_DATA; 23216: int a0 = mmuTranslateWriteSuperData (a); 23217: return (a ^ a0) == 1 ? -1 : (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRbs (a0); 23218: } else { //ユーザモード 23219: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_MODIFY | M60_FSLW_SIZE_BYTE | M60_FSLW_TM_USER_DATA; 23220: int a0 = mmuTranslateWriteUserData (a); 23221: return (a ^ a0) == 1 ? -1 : (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRbs (a0); 23222: } 23223: } //mmuModifyByteSignData(int,int) 23224: 23225: //d = mmuModifyByteZeroData (a, supervisor) 23226: // リードモディファイライトのリードバイトゼロ拡張(データ) 23227: public static int mmuModifyByteZeroData (int a, int supervisor) throws M68kException { 23228: if (supervisor != 0) { //スーパーバイザモード 23229: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_MODIFY | M60_FSLW_SIZE_BYTE | M60_FSLW_TM_SUPER_DATA; 23230: int a0 = mmuTranslateWriteSuperData (a); 23231: return (a ^ a0) == 1 ? 255 : (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRbz (a0); 23232: } else { //ユーザモード 23233: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_MODIFY | M60_FSLW_SIZE_BYTE | M60_FSLW_TM_USER_DATA; 23234: int a0 = mmuTranslateWriteUserData (a); 23235: return (a ^ a0) == 1 ? 255 : (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRbz (a0); 23236: } 23237: } //mmuModifyByteZeroData(int,int) 23238: 23239: //d = mmuModifyWordSignData (a, supervisor) 23240: // リードモディファイライトのリードワード符号拡張(データ) 23241: public static int mmuModifyWordSignData (int a, int supervisor) throws M68kException { 23242: if (supervisor != 0) { //スーパーバイザモード 23243: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_MODIFY | M60_FSLW_SIZE_WORD | M60_FSLW_TM_SUPER_DATA; 23244: int a0 = mmuTranslateWriteSuperData (a); //a+1が必要なので上書き不可 23245: if ((a & 1) == 0) { //偶数 23246: return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRws (a0); 23247: } else { //奇数 23248: int d0 = (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRbs (a0); 23249: m60FSLW ^= M60_FSLW_IOMA_FIRST ^ M60_FSLW_IOMA_SECOND; 23250: int a1 = mmuTranslateWriteSuperData (a + 1); //偶数 23251: return (d0 << 8 | 23252: (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a1 >>> XEiJ.BUS_PAGE_BITS].mmdRbz (a1)); 23253: } 23254: } else { //ユーザモード 23255: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_MODIFY | M60_FSLW_SIZE_WORD | M60_FSLW_TM_USER_DATA; 23256: int a0 = mmuTranslateWriteUserData (a); //a+1が必要なので上書き不可 23257: if ((a & 1) == 0) { //偶数 23258: return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRws (a0); 23259: } else { //奇数 23260: int d0 = (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRbs (a0); 23261: m60FSLW ^= M60_FSLW_IOMA_FIRST ^ M60_FSLW_IOMA_SECOND; 23262: int a1 = mmuTranslateWriteUserData (a + 1); //偶数 23263: return (d0 << 8 | 23264: (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a1 >>> XEiJ.BUS_PAGE_BITS].mmdRbz (a1)); 23265: } 23266: } 23267: } //mmuModifyWordSignData(int,int) 23268: 23269: //d = mmuModifyWordZeroData (a, supervisor) 23270: // リードモディファイライトのリードワードゼロ拡張(データ) 23271: public static int mmuModifyWordZeroData (int a, int supervisor) throws M68kException { 23272: if (supervisor != 0) { //スーパーバイザモード 23273: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_MODIFY | M60_FSLW_SIZE_WORD | M60_FSLW_TM_SUPER_DATA; 23274: int a0 = mmuTranslateWriteSuperData (a); //a+1が必要なので上書き不可 23275: if ((a & 1) == 0) { //偶数 23276: return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a0); 23277: } else { //奇数 23278: int d0 = (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRbz (a0); 23279: m60FSLW ^= M60_FSLW_IOMA_FIRST ^ M60_FSLW_IOMA_SECOND; 23280: int a1 = mmuTranslateWriteSuperData (a + 1); //偶数 23281: return (d0 << 8 | 23282: (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a1 >>> XEiJ.BUS_PAGE_BITS].mmdRbz (a1)); 23283: } 23284: } else { //ユーザモード 23285: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_MODIFY | M60_FSLW_SIZE_WORD | M60_FSLW_TM_USER_DATA; 23286: int a0 = mmuTranslateWriteUserData (a); //a+1が必要なので上書き不可 23287: if ((a & 1) == 0) { //偶数 23288: return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a0); 23289: } else { //奇数 23290: int d0 = (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRbz (a0); 23291: m60FSLW ^= M60_FSLW_IOMA_FIRST ^ M60_FSLW_IOMA_SECOND; 23292: int a1 = mmuTranslateWriteUserData (a + 1); //偶数 23293: return (d0 << 8 | 23294: (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a1 >>> XEiJ.BUS_PAGE_BITS].mmdRbz (a1)); 23295: } 23296: } 23297: } //mmuModifyWordZeroData(int,int) 23298: 23299: //d = mmuModifyWordSignEven (a, supervisor) 23300: // リードモディファイライトのリードワード符号拡張(偶数) 23301: public static int mmuModifyWordSignEven (int a, int supervisor) throws M68kException { 23302: if (supervisor != 0) { //スーパーバイザモード 23303: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_MODIFY | M60_FSLW_SIZE_WORD | M60_FSLW_TM_SUPER_DATA; 23304: a = mmuTranslateWriteSuperData (a); 23305: return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a >>> XEiJ.BUS_PAGE_BITS].mmdRws (a); 23306: } else { //ユーザモード 23307: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_MODIFY | M60_FSLW_SIZE_WORD | M60_FSLW_TM_USER_DATA; 23308: a = mmuTranslateWriteUserData (a); 23309: return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a >>> XEiJ.BUS_PAGE_BITS].mmdRws (a); 23310: } 23311: } //mmuModifyWordSignEven(int,int) 23312: 23313: //d = mmuModifyWordZeroEven (a, supervisor) 23314: // リードモディファイライトのリードワードゼロ拡張(偶数) 23315: public static int mmuModifyWordZeroEven (int a, int supervisor) throws M68kException { 23316: if (supervisor != 0) { //スーパーバイザモード 23317: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_MODIFY | M60_FSLW_SIZE_WORD | M60_FSLW_TM_SUPER_DATA; 23318: a = mmuTranslateWriteSuperData (a); 23319: return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a); 23320: } else { //ユーザモード 23321: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_MODIFY | M60_FSLW_SIZE_WORD | M60_FSLW_TM_USER_DATA; 23322: a = mmuTranslateWriteUserData (a); 23323: return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a); 23324: } 23325: } //mmuModifyWordZeroEven(int,int) 23326: 23327: //d = mmuModifyLongData (a, supervisor) 23328: // リードモディファイライトのリードロング(データ) 23329: public static int mmuModifyLongData (int a, int supervisor) throws M68kException { 23330: if (supervisor != 0) { //スーパーバイザモード 23331: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_MODIFY | M60_FSLW_SIZE_LONG | M60_FSLW_TM_SUPER_DATA; 23332: int a0 = mmuTranslateWriteSuperData (a); //a+1,a+2,a+3が必要なので上書き不可 23333: if ((a & 3) == 0) { //4の倍数 23334: return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRls (a0); 23335: } else if ((a & 1) == 0) { //4の倍数+2 23336: int d0 = (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRws (a0); 23337: m60FSLW ^= M60_FSLW_IOMA_FIRST ^ M60_FSLW_IOMA_SECOND; 23338: int a2 = mmuTranslateWriteSuperData (a + 2); //偶数 23339: return (d0 << 16 | 23340: (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a2 >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a2)); 23341: } else { //奇数 23342: int d0 = (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRbs (a0); 23343: m60FSLW ^= M60_FSLW_IOMA_FIRST ^ M60_FSLW_IOMA_SECOND; 23344: int a1 = mmuTranslateWriteSuperData (a + 1); //偶数 23345: int a3 = mmuTranslateWriteSuperData (a + 3); //偶数 23346: return (d0 << 24 | 23347: (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a1 >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a1) << 8 | 23348: (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a3 >>> XEiJ.BUS_PAGE_BITS].mmdRbz (a3)); 23349: } 23350: } else { //ユーザモード 23351: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_MODIFY | M60_FSLW_SIZE_LONG | M60_FSLW_TM_USER_DATA; 23352: int a0 = mmuTranslateWriteUserData (a); //a+1,a+2,a+3が必要なので上書き不可 23353: if ((a & 3) == 0) { //4の倍数 23354: return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRls (a0); 23355: } else if ((a & 1) == 0) { //4の倍数+2 23356: int d0 = (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRws (a0); 23357: m60FSLW ^= M60_FSLW_IOMA_FIRST ^ M60_FSLW_IOMA_SECOND; 23358: int a2 = mmuTranslateWriteUserData (a + 2); //偶数 23359: return (d0 << 16 | 23360: (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a2 >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a2)); 23361: } else { //奇数 23362: int d0 = (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRbs (a0); 23363: m60FSLW ^= M60_FSLW_IOMA_FIRST ^ M60_FSLW_IOMA_SECOND; 23364: int a1 = mmuTranslateWriteUserData (a + 1); //偶数 23365: int a3 = mmuTranslateWriteUserData (a + 3); //偶数 23366: return (d0 << 24 | 23367: (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a1 >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a1) << 8 | 23368: (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a3 >>> XEiJ.BUS_PAGE_BITS].mmdRbz (a3)); 23369: } 23370: } 23371: } //mmuModifyLongData(int,int) 23372: 23373: //d = mmuModifyLongEven (a, supervisor) 23374: // リードモディファイライトのリードロング(偶数) 23375: public static int mmuModifyLongEven (int a, int supervisor) throws M68kException { 23376: if (supervisor != 0) { //スーパーバイザモード 23377: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_MODIFY | M60_FSLW_SIZE_LONG | M60_FSLW_TM_SUPER_DATA; 23378: int a0 = mmuTranslateWriteSuperData (a); //a+2が必要なので上書き不可 23379: if ((a & 2) == 0) { //4の倍数 23380: return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRls (a0); 23381: } else { //4の倍数+2 23382: int d0 = (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRws (a0); 23383: m60FSLW ^= M60_FSLW_IOMA_FIRST ^ M60_FSLW_IOMA_SECOND; 23384: int a2 = mmuTranslateWriteSuperData (a + 2); //偶数 23385: return (d0 << 16 | 23386: (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a2 >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a2)); 23387: } 23388: } else { //ユーザモード 23389: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_MODIFY | M60_FSLW_SIZE_LONG | M60_FSLW_TM_USER_DATA; 23390: int a0 = mmuTranslateWriteUserData (a); //a+2が必要なので上書き不可 23391: if ((a & 2) == 0) { //4の倍数 23392: return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRls (a0); 23393: } else { //4の倍数+2 23394: int d0 = (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRws (a0); 23395: m60FSLW ^= M60_FSLW_IOMA_FIRST ^ M60_FSLW_IOMA_SECOND; 23396: int a2 = mmuTranslateWriteUserData (a + 2); //偶数 23397: return (d0 << 16 | 23398: (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a2 >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a2)); 23399: } 23400: } 23401: } //mmuModifyLongEven(int,int) 23402: 23403: //d = mmuModifyLongFour (a, supervisor) 23404: // リードモディファイライトのリードロング(4の倍数) 23405: public static int mmuModifyLongFour (int a, int supervisor) throws M68kException { 23406: if (supervisor != 0) { //スーパーバイザモード 23407: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_MODIFY | M60_FSLW_SIZE_LONG | M60_FSLW_TM_SUPER_DATA; 23408: a = mmuTranslateWriteSuperData (a); 23409: return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a >>> XEiJ.BUS_PAGE_BITS].mmdRls (a); 23410: } else { //ユーザモード 23411: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_MODIFY | M60_FSLW_SIZE_LONG | M60_FSLW_TM_USER_DATA; 23412: a = mmuTranslateWriteUserData (a); 23413: return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a >>> XEiJ.BUS_PAGE_BITS].mmdRls (a); 23414: } 23415: } //mmuModifyLongFour(int,int) 23416: 23417: //-------------------------------------------------------------------------------- 23418: //ポーク 23419: // デバッガ用 23420: // エラーや副作用なしでライトする 23421: 23422: //mmuPokeByte (a, x, f) 23423: // ポークバイト 23424: public static void mmuPokeByte (int a, int x, int f) { 23425: f = f == -1 ? XEiJ.regSRS != 0 ? 5 : 1 : f & 7; 23426: MemoryMappedDevice[] mm = (DataBreakPoint.DBP_ON ? 23427: (f & 4) != 0 ? DataBreakPoint.dbpSuperMap : DataBreakPoint.dbpUserMap : 23428: (f & 4) != 0 ? XEiJ.busSuperMap : XEiJ.busUserMap); 23429: // 01234567 23430: if (0b01100110 << 24 << f < 0) { //DFC=1,2,5,6。アドレス変換あり 23431: int a0 = mmuTranslatePeek (a, f & 4, f & 2); 23432: if ((a ^ a0) != 1) { 23433: mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdVb (a0, x); 23434: } 23435: } else if (f != 7) { //DFC=0,3,4。アドレス変換なし 23436: mm[a >>> XEiJ.BUS_PAGE_BITS].mmdVb (a, x); 23437: } 23438: } //mmuPokeByte(int,int,int) 23439: 23440: //mmuPokeByteData (a, d, supervisor) 23441: // ポークバイト(データ) 23442: public static void mmuPokeByteData (int a, int d, int supervisor) { 23443: MemoryMappedDevice[] mm = supervisor != 0 ? DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap : DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap; 23444: int a0 = mmuTranslatePeek (a, supervisor, 0); 23445: if ((a ^ a0) != 1) { 23446: //mm[a >>> XEiJ.BUS_PAGE_BITS].mmdVb (a0, d); 23447: XEiJ.busVb (a0, d); 23448: } 23449: } //mmuPokeByteData(int,int,int) 23450: 23451: //mmuPokeWord (a, x, f) 23452: // ポークワード 23453: public static void mmuPokeWord (int a, int x, int f) { 23454: f = f == -1 ? XEiJ.regSRS != 0 ? 5 : 1 : f & 7; 23455: MemoryMappedDevice[] mm = (DataBreakPoint.DBP_ON ? 23456: (f & 4) != 0 ? DataBreakPoint.dbpSuperMap : DataBreakPoint.dbpUserMap : 23457: (f & 4) != 0 ? XEiJ.busSuperMap : XEiJ.busUserMap); 23458: // 01234567 23459: if (0b01100110 << 24 << f < 0) { //DFC=1,2,5,6。アドレス変換あり 23460: int a0 = mmuTranslatePeek (a, f & 4, f & 2); 23461: if ((a & 1) == 0) { //偶数 23462: if ((a ^ a0) != 1) { 23463: mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdVw (a0, x); 23464: } 23465: } else { //奇数 23466: int a1 = mmuTranslatePeek (a + 1, f & 4, f & 2); 23467: if ((a ^ a0) != 1) { 23468: mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdVb (a0, x >> 8); 23469: } 23470: if ((a + 1 ^ a1) != 1) { 23471: mm[a1 >>> XEiJ.BUS_PAGE_BITS].mmdVb (a1, x ); 23472: } 23473: } 23474: } else if (f != 7) { //DFC=0,3,4。アドレス変換なし 23475: if ((a & 1) == 0) { //偶数 23476: mm[a >>> XEiJ.BUS_PAGE_BITS].mmdVw (a, x); 23477: } else { //奇数 23478: mm[a >>> XEiJ.BUS_PAGE_BITS].mmdVb (a , x >> 8); 23479: mm[a + 1 >>> XEiJ.BUS_PAGE_BITS].mmdVb (a + 1, x ); 23480: } 23481: } 23482: } //mmuPokeWord(int,int,int) 23483: 23484: //mmuPokeWordData (a, d, supervisor) 23485: // ポークワード(データ) 23486: public static void mmuPokeWordData (int a, int d, int supervisor) { 23487: mmuPokeByteData (a, d >> 8, supervisor); 23488: mmuPokeByteData (a + 1, d, supervisor); 23489: } //mmuPokeWordData(int,int,int) 23490: 23491: //mmuPokeLong (a, x, f) 23492: // ポークロング 23493: public static void mmuPokeLong (int a, int x, int f) { 23494: f = f == -1 ? XEiJ.regSRS != 0 ? 5 : 1 : f & 7; 23495: MemoryMappedDevice[] mm = (DataBreakPoint.DBP_ON ? 23496: (f & 4) != 0 ? DataBreakPoint.dbpSuperMap : DataBreakPoint.dbpUserMap : 23497: (f & 4) != 0 ? XEiJ.busSuperMap : XEiJ.busUserMap); 23498: // 01234567 23499: if (0b01100110 << 24 << f < 0) { //DFC=1,2,5,6。アドレス変換あり 23500: int a0 = mmuTranslatePeek (a, f & 4, f & 2); 23501: if ((a & 3) == 0) { //4の倍数 23502: if ((a ^ a0) != 1) { 23503: mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdVl (a0, x); 23504: } 23505: } else if ((a & 1) == 0) { //4の倍数ではない偶数 23506: int a2 = mmuTranslatePeek (a + 2, f & 4, f & 2); 23507: if ((a ^ a0) != 1) { 23508: mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdVw (a0, x >> 16); 23509: } 23510: if ((a + 2 ^ a2) != 1) { 23511: mm[a2 >>> XEiJ.BUS_PAGE_BITS].mmdVw (a2, x); 23512: } 23513: } else { //奇数 23514: int a1 = mmuTranslatePeek (a + 1, f & 4, f & 2); 23515: int a3 = mmuTranslatePeek (a + 3, f & 4, f & 2); 23516: if ((a ^ a0) != 1) { 23517: mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdVb (a0, x >> 24); 23518: } 23519: if ((a + 1 ^ a1) != 1) { 23520: mm[a1 >>> XEiJ.BUS_PAGE_BITS].mmdVw (a1, x >> 8); 23521: } 23522: if ((a + 3 ^ a3) != 1) { 23523: mm[a3 >>> XEiJ.BUS_PAGE_BITS].mmdVb (a3, x); 23524: } 23525: } 23526: } else if (f != 7) { //DFC=0,3,4。アドレス変換なし 23527: if ((a & 3) == 0) { //4の倍数 23528: mm[a >>> XEiJ.BUS_PAGE_BITS].mmdVl (a, x); 23529: } else if ((a & 1) == 0) { //4の倍数ではない偶数 23530: mm[a >>> XEiJ.BUS_PAGE_BITS].mmdVw (a , x >> 16); 23531: mm[a + 2 >>> XEiJ.BUS_PAGE_BITS].mmdVw (a + 2, x ); 23532: } else { //奇数 23533: mm[a >>> XEiJ.BUS_PAGE_BITS].mmdVb (a, x >> 24); 23534: mm[a + 1 >>> XEiJ.BUS_PAGE_BITS].mmdVw (a + 1, x >> 8); 23535: mm[a + 3 >>> XEiJ.BUS_PAGE_BITS].mmdVb (a + 3, x ); 23536: } 23537: } 23538: } //mmuPokeLong(int,int,int) 23539: 23540: //mmuPokeLongData (a, d, supervisor) 23541: // ポークロング(データ) 23542: public static void mmuPokeLongData (int a, int d, int supervisor) { 23543: mmuPokeByteData (a, d >> 24, supervisor); 23544: mmuPokeByteData (a + 1, d >> 16, supervisor); 23545: mmuPokeByteData (a + 2, d >> 8, supervisor); 23546: mmuPokeByteData (a + 3, d, supervisor); 23547: } //mmuPokeLongData(int,int,int) 23548: 23549: //mmuPokeQuad (a, x, f) 23550: // ポーククワッド 23551: public static void mmuPokeQuad (int a, long x, int f) { 23552: mmuPokeLong (a , (int) (x >> 32), f); 23553: mmuPokeLong (a + 4, (int) x , f); 23554: } //mmuPokeQuad(int,long,int) 23555: 23556: //mmuPokeExtended (a, b, f) 23557: public static void mmuPokeExtended (int a, byte[] b, int f) { 23558: for (int i = 0; i < 12; i++) { 23559: mmuPokeByte (a + i, b[i], f); 23560: } 23561: } //mmuPokeQuad(int,long,int) 23562: 23563: //a = mmuPokeStringZ (a, str, f) 23564: // ポークストリング 23565: // 文字列をUTF-16からSJISに変換しながらメモリに書き込む 23566: // 文字列に'\0'が含まれるときはその手前まで書き込む 23567: // SJISに変換できない文字は'※'になる 23568: // 最後に'\0'を書き込む 23569: // '\0'を含まない書き込んだ文字列を返す 23570: public static String mmuPokeStringZ (int a, String str, int f) { 23571: StringBuilder sb = new StringBuilder (); 23572: int l = str.length (); 23573: for (int i = 0; i < l; i++) { 23574: int u = str.charAt (i); 23575: if (u == '\0') { 23576: break; 23577: } 23578: int s = CharacterCode.chrCharToSJIS[u]; //SJISに変換する 23579: if (s == 0) { //変換できない 23580: s = 0x81a6; //'※' 23581: } 23582: if (s >> 8 != 0) { 23583: mmuPokeByte (a++, s >> 8, f); 23584: } 23585: mmuPokeByte (a++, s, f); 23586: u = CharacterCode.chrSJISToChar[s]; //UTF-16に変換する 23587: if (u == 0) { //変換できない 23588: u = 0xfffd; 23589: } 23590: sb.append ((char) u); 23591: } 23592: mmuPokeByte (a, 0, f); //'\0' 23593: return sb.toString (); 23594: } //mmuPokeStringZ(int,String,int) 23595: 23596: //-------------------------------------------------------------------------------- 23597: //ライト 23598: // アドレス変換はライト 23599: // FSLWのRead and WriteはWrite 23600: 23601: //mmuWriteByteData (a, d, supervisor) 23602: // ライトバイト符号拡張(データ) 23603: public static void mmuWriteByteData (int a, int d, int supervisor) throws M68kException { 23604: if (supervisor != 0) { //スーパーバイザモード 23605: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_BYTE | M60_FSLW_TM_SUPER_DATA; 23606: int t = mmuTranslateWriteSuperData (a); 23607: (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWb (t, d); 23608: } else { //ユーザモード 23609: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_BYTE | M60_FSLW_TM_USER_DATA; 23610: int t = mmuTranslateWriteUserData (a); 23611: (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWb (t, d); 23612: } 23613: } //mmuWriteByteData(int,int,int) 23614: 23615: //mmuWriteWordData (a, d, supervisor) 23616: // ライトワード符号拡張(データ) 23617: public static void mmuWriteWordData (int a, int d, int supervisor) throws M68kException { 23618: if (supervisor != 0) { //スーパーバイザモード 23619: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_WORD | M60_FSLW_TM_SUPER_DATA; 23620: int t = mmuTranslateWriteSuperData (a); //a+1が必要なので上書き不可 23621: if ((a & 1) == 0) { //偶数 23622: (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWw (t, d); 23623: } else { //奇数 23624: (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWb (t, d >> 8); 23625: m60FSLW ^= M60_FSLW_IOMA_FIRST ^ M60_FSLW_IOMA_SECOND; 23626: t = mmuTranslateWriteSuperData (a + 1); //偶数 23627: (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWb (t, d); 23628: } 23629: } else { //ユーザモード 23630: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_WORD | M60_FSLW_TM_USER_DATA; 23631: int t = mmuTranslateWriteUserData (a); //a+1が必要なので上書き不可 23632: if ((a & 1) == 0) { //偶数 23633: (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWw (t, d); 23634: } else { //奇数 23635: (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWb (t, d >> 8); 23636: m60FSLW ^= M60_FSLW_IOMA_FIRST ^ M60_FSLW_IOMA_SECOND; 23637: t = mmuTranslateWriteUserData (a + 1); //偶数 23638: (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWb (t, d); 23639: } 23640: } 23641: } //mmuWriteWordData(int,int,int) 23642: 23643: //mmuWriteWordEven (a, d, supervisor) 23644: // ライトワード符号拡張(偶数) 23645: public static void mmuWriteWordEven (int a, int d, int supervisor) throws M68kException { 23646: if (supervisor != 0) { //スーパーバイザモード 23647: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_WORD | M60_FSLW_TM_SUPER_DATA; 23648: a = mmuTranslateWriteSuperData (a); 23649: (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a >>> XEiJ.BUS_PAGE_BITS].mmdWw (a, d); 23650: } else { //ユーザモード 23651: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_WORD | M60_FSLW_TM_USER_DATA; 23652: a = mmuTranslateWriteUserData (a); 23653: (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a >>> XEiJ.BUS_PAGE_BITS].mmdWw (a, d); 23654: } 23655: } //mmuWriteWordEven(int,int,int) 23656: 23657: //mmuWriteLongData (a, d, supervisor) 23658: // ライトロング(データ) 23659: public static void mmuWriteLongData (int a, int d, int supervisor) throws M68kException { 23660: if (supervisor != 0) { //スーパーバイザモード 23661: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_LONG | M60_FSLW_TM_SUPER_DATA; 23662: int t = mmuTranslateWriteSuperData (a); //a+1,a+2,a+3が必要なので上書き不可 23663: if ((a & 3) == 0) { //4の倍数 23664: (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWl (t, d); 23665: } else if ((a & 1) == 0) { //4の倍数+2 23666: (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWw (t, d >> 16); 23667: m60FSLW ^= M60_FSLW_IOMA_FIRST ^ M60_FSLW_IOMA_SECOND; 23668: t = mmuTranslateWriteSuperData (a + 2); //偶数 23669: (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWw (t, d); 23670: } else { //奇数 23671: (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWb (t, d >> 24); 23672: m60FSLW ^= M60_FSLW_IOMA_FIRST ^ M60_FSLW_IOMA_SECOND; 23673: t = mmuTranslateWriteSuperData (a + 1); //偶数 23674: (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWw (t, d >> 8); 23675: t = mmuTranslateWriteSuperData (a + 3); //偶数 23676: (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWb (t, d); 23677: } 23678: } else { //ユーザモード 23679: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_LONG | M60_FSLW_TM_USER_DATA; 23680: int t = mmuTranslateWriteUserData (a); //a+1,a+2,a+3が必要なので上書き不可 23681: if ((a & 3) == 0) { //4の倍数 23682: (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWl (t, d); 23683: } else if ((a & 1) == 0) { //4の倍数+2 23684: (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWw (t, d >> 16); 23685: m60FSLW ^= M60_FSLW_IOMA_FIRST ^ M60_FSLW_IOMA_SECOND; 23686: t = mmuTranslateWriteUserData (a + 2); //偶数 23687: (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWw (t, d); 23688: } else { //奇数 23689: (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWb (t, d >> 24); 23690: m60FSLW ^= M60_FSLW_IOMA_FIRST ^ M60_FSLW_IOMA_SECOND; 23691: t = mmuTranslateWriteUserData (a + 1); //偶数 23692: (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWw (t, d >> 8); 23693: t = mmuTranslateWriteUserData (a + 3); //偶数 23694: (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWb (t, d); 23695: } 23696: } 23697: } //mmuWriteLongData(int,int,int) 23698: 23699: //mmuWriteLongEven (a, d, supervisor) 23700: // ライトロング(偶数) 23701: public static void mmuWriteLongEven (int a, int d, int supervisor) throws M68kException { 23702: if (supervisor != 0) { //スーパーバイザモード 23703: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_LONG | M60_FSLW_TM_SUPER_DATA; 23704: int t = mmuTranslateWriteSuperData (a); //a+2が必要なので上書き不可 23705: if ((a & 2) == 0) { //4の倍数 23706: (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWl (t, d); 23707: } else { //4の倍数+2 23708: (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWw (t, d >> 16); 23709: m60FSLW ^= M60_FSLW_IOMA_FIRST ^ M60_FSLW_IOMA_SECOND; 23710: t = mmuTranslateWriteSuperData (a + 2); //偶数 23711: (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWw (t, d); 23712: } 23713: } else { //ユーザモード 23714: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_LONG | M60_FSLW_TM_USER_DATA; 23715: int t = mmuTranslateWriteUserData (a); //a+2が必要なので上書き不可 23716: if ((a & 2) == 0) { //4の倍数 23717: (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWl (t, d); 23718: } else { //4の倍数+2 23719: (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWw (t, d >> 16); 23720: m60FSLW ^= M60_FSLW_IOMA_FIRST ^ M60_FSLW_IOMA_SECOND; 23721: t = mmuTranslateWriteUserData (a + 2); //偶数 23722: (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWw (t, d); 23723: } 23724: } 23725: } //mmuWriteLongEven(int,int,int) 23726: 23727: //mmuWriteLongFour (a, d, supervisor) 23728: // ライトロング(4の倍数) 23729: public static void mmuWriteLongFour (int a, int d, int supervisor) throws M68kException { 23730: if (supervisor != 0) { //スーパーバイザモード 23731: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_LONG | M60_FSLW_TM_SUPER_DATA; 23732: a = mmuTranslateWriteSuperData (a); 23733: (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a >>> XEiJ.BUS_PAGE_BITS].mmdWl (a, d); 23734: } else { //ユーザモード 23735: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_LONG | M60_FSLW_TM_USER_DATA; 23736: a = mmuTranslateWriteUserData (a); 23737: (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a >>> XEiJ.BUS_PAGE_BITS].mmdWl (a, d); 23738: } 23739: } //mmuWriteLongFour(int,int,int) 23740: 23741: //mmuWriteQuadData (a, d, supervisor) 23742: // ライトクワッド(データ) 23743: public static void mmuWriteQuadData (int a, long d, int supervisor) throws M68kException { 23744: if (supervisor != 0) { //スーパーバイザモード 23745: final MemoryMappedDevice[] map = DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap; 23746: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_SUPER_DATA; 23747: int t = mmuTranslateWriteSuperData (a); 23748: if ((a & 3) == 0) { //4n 23749: map[t >>> XEiJ.BUS_PAGE_BITS].mmdWl (t, (int) (d >> 32)); 23750: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_SUPER_DATA; 23751: t = mmuTranslateWriteSuperData (a + 4); 23752: map[t >>> XEiJ.BUS_PAGE_BITS].mmdWl (t, (int) d); 23753: } else if ((a & 1) == 0) { //4n+2 23754: map[t >>> XEiJ.BUS_PAGE_BITS].mmdWw (t, (int) (d >> 48)); 23755: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_SUPER_DATA; 23756: t = mmuTranslateWriteSuperData (a + 2); 23757: map[t >>> XEiJ.BUS_PAGE_BITS].mmdWl (t, (int) (d >> 16)); 23758: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_SUPER_DATA; 23759: t = mmuTranslateWriteSuperData (a + 6); 23760: map[t >>> XEiJ.BUS_PAGE_BITS].mmdWw (t, (int) d); 23761: } else if ((a & 3) == 1) { //4n+1 23762: map[t >>> XEiJ.BUS_PAGE_BITS].mmdWb (t, (int) (d >> 56)); 23763: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_SUPER_DATA; 23764: t = mmuTranslateWriteSuperData (a + 1); 23765: map[t >>> XEiJ.BUS_PAGE_BITS].mmdWw (t, (int) (d >> 40)); 23766: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_SUPER_DATA; 23767: t = mmuTranslateWriteSuperData (a + 3); 23768: map[t >>> XEiJ.BUS_PAGE_BITS].mmdWl (t, (int) (d >> 8)); 23769: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_SUPER_DATA; 23770: t = mmuTranslateWriteSuperData (a + 7); 23771: map[t >>> XEiJ.BUS_PAGE_BITS].mmdWb (t, (int) d); 23772: } else { //4n+3 23773: map[t >>> XEiJ.BUS_PAGE_BITS].mmdWb (t, (int) (d >> 56)); 23774: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_SUPER_DATA; 23775: t = mmuTranslateWriteSuperData (a + 1); 23776: map[t >>> XEiJ.BUS_PAGE_BITS].mmdWl (t, (int) (d >> 24)); 23777: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_SUPER_DATA; 23778: t = mmuTranslateWriteSuperData (a + 5); 23779: map[t >>> XEiJ.BUS_PAGE_BITS].mmdWw (t, (int) (d >> 8)); 23780: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_SUPER_DATA; 23781: t = mmuTranslateWriteSuperData (a + 7); 23782: map[t >>> XEiJ.BUS_PAGE_BITS].mmdWb (t, (int) d); 23783: } 23784: } else { //ユーザモード 23785: final MemoryMappedDevice[] map = DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap; 23786: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_USER_DATA; 23787: int t = mmuTranslateWriteUserData (a); 23788: if ((a & 3) == 0) { //4n 23789: map[t >>> XEiJ.BUS_PAGE_BITS].mmdWl (t, (int) (d >> 32)); 23790: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_USER_DATA; 23791: t = mmuTranslateWriteUserData (a + 4); 23792: map[t >>> XEiJ.BUS_PAGE_BITS].mmdWl (t, (int) d); 23793: } else if ((a & 1) == 0) { //4n+2 23794: map[t >>> XEiJ.BUS_PAGE_BITS].mmdWw (t, (int) (d >> 48)); 23795: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_USER_DATA; 23796: t = mmuTranslateWriteUserData (a + 2); 23797: map[t >>> XEiJ.BUS_PAGE_BITS].mmdWl (t, (int) (d >> 16)); 23798: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_USER_DATA; 23799: t = mmuTranslateWriteUserData (a + 6); 23800: map[t >>> XEiJ.BUS_PAGE_BITS].mmdWw (t, (int) d); 23801: } else if ((a & 3) == 1) { //4n+1 23802: map[t >>> XEiJ.BUS_PAGE_BITS].mmdWb (t, (int) (d >> 56)); 23803: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_USER_DATA; 23804: t = mmuTranslateWriteUserData (a + 1); 23805: map[t >>> XEiJ.BUS_PAGE_BITS].mmdWw (t, (int) (d >> 40)); 23806: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_USER_DATA; 23807: t = mmuTranslateWriteUserData (a + 3); 23808: map[t >>> XEiJ.BUS_PAGE_BITS].mmdWl (t, (int) (d >> 8)); 23809: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_USER_DATA; 23810: t = mmuTranslateWriteUserData (a + 7); 23811: map[t >>> XEiJ.BUS_PAGE_BITS].mmdWb (t, (int) d); 23812: } else { //4n+3 23813: map[t >>> XEiJ.BUS_PAGE_BITS].mmdWb (t, (int) (d >> 56)); 23814: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_USER_DATA; 23815: t = mmuTranslateWriteUserData (a + 1); 23816: map[t >>> XEiJ.BUS_PAGE_BITS].mmdWl (t, (int) (d >> 24)); 23817: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_USER_DATA; 23818: t = mmuTranslateWriteUserData (a + 5); 23819: map[t >>> XEiJ.BUS_PAGE_BITS].mmdWw (t, (int) (d >> 8)); 23820: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_USER_DATA; 23821: t = mmuTranslateWriteUserData (a + 7); 23822: map[t >>> XEiJ.BUS_PAGE_BITS].mmdWb (t, (int) d); 23823: } 23824: } 23825: } //mmuWriteQuadData(int,long,int) 23826: 23827: //mmuWriteQuadSecond (a, d, supervisor) 23828: // ライトクワッド(2番目) 23829: // エクステンデッドとラインの2番目で使う 23830: public static void mmuWriteQuadSecond (int a, long d, int supervisor) throws M68kException { 23831: if (supervisor != 0) { //スーパーバイザモード 23832: final MemoryMappedDevice[] map = DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap; 23833: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_SUPER_DATA; 23834: int t = mmuTranslateWriteSuperData (a); 23835: if ((a & 3) == 0) { //4n 23836: map[t >>> XEiJ.BUS_PAGE_BITS].mmdWl (t, (int) (d >> 32)); 23837: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_SUPER_DATA; 23838: t = mmuTranslateWriteSuperData (a + 4); 23839: map[t >>> XEiJ.BUS_PAGE_BITS].mmdWl (t, (int) d); 23840: } else if ((a & 1) == 0) { //4n+2 23841: map[t >>> XEiJ.BUS_PAGE_BITS].mmdWw (t, (int) (d >> 48)); 23842: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_SUPER_DATA; 23843: t = mmuTranslateWriteSuperData (a + 2); 23844: map[t >>> XEiJ.BUS_PAGE_BITS].mmdWl (t, (int) (d >> 16)); 23845: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_SUPER_DATA; 23846: t = mmuTranslateWriteSuperData (a + 6); 23847: map[t >>> XEiJ.BUS_PAGE_BITS].mmdWw (t, (int) d); 23848: } else if ((a & 3) == 1) { //4n+1 23849: map[t >>> XEiJ.BUS_PAGE_BITS].mmdWb (t, (int) (d >> 56)); 23850: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_SUPER_DATA; 23851: t = mmuTranslateWriteSuperData (a + 1); 23852: map[t >>> XEiJ.BUS_PAGE_BITS].mmdWw (t, (int) (d >> 40)); 23853: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_SUPER_DATA; 23854: t = mmuTranslateWriteSuperData (a + 3); 23855: map[t >>> XEiJ.BUS_PAGE_BITS].mmdWl (t, (int) (d >> 8)); 23856: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_SUPER_DATA; 23857: t = mmuTranslateWriteSuperData (a + 7); 23858: map[t >>> XEiJ.BUS_PAGE_BITS].mmdWb (t, (int) d); 23859: } else { //4n+3 23860: map[t >>> XEiJ.BUS_PAGE_BITS].mmdWb (t, (int) (d >> 56)); 23861: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_SUPER_DATA; 23862: t = mmuTranslateWriteSuperData (a + 1); 23863: map[t >>> XEiJ.BUS_PAGE_BITS].mmdWl (t, (int) (d >> 24)); 23864: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_SUPER_DATA; 23865: t = mmuTranslateWriteSuperData (a + 5); 23866: map[t >>> XEiJ.BUS_PAGE_BITS].mmdWw (t, (int) (d >> 8)); 23867: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_SUPER_DATA; 23868: t = mmuTranslateWriteSuperData (a + 7); 23869: map[t >>> XEiJ.BUS_PAGE_BITS].mmdWb (t, (int) d); 23870: } 23871: } else { //ユーザモード 23872: final MemoryMappedDevice[] map = DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap; 23873: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_USER_DATA; 23874: int t = mmuTranslateWriteUserData (a); 23875: if ((a & 3) == 0) { //4n 23876: map[t >>> XEiJ.BUS_PAGE_BITS].mmdWl (t, (int) (d >> 32)); 23877: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_USER_DATA; 23878: t = mmuTranslateWriteUserData (a + 4); 23879: map[t >>> XEiJ.BUS_PAGE_BITS].mmdWl (t, (int) d); 23880: } else if ((a & 1) == 0) { //4n+2 23881: map[t >>> XEiJ.BUS_PAGE_BITS].mmdWw (t, (int) (d >> 48)); 23882: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_USER_DATA; 23883: t = mmuTranslateWriteUserData (a + 2); 23884: map[t >>> XEiJ.BUS_PAGE_BITS].mmdWl (t, (int) (d >> 16)); 23885: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_USER_DATA; 23886: t = mmuTranslateWriteUserData (a + 6); 23887: map[t >>> XEiJ.BUS_PAGE_BITS].mmdWw (t, (int) d); 23888: } else if ((a & 3) == 1) { //4n+1 23889: map[t >>> XEiJ.BUS_PAGE_BITS].mmdWb (t, (int) (d >> 56)); 23890: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_USER_DATA; 23891: t = mmuTranslateWriteUserData (a + 1); 23892: map[t >>> XEiJ.BUS_PAGE_BITS].mmdWw (t, (int) (d >> 40)); 23893: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_USER_DATA; 23894: t = mmuTranslateWriteUserData (a + 3); 23895: map[t >>> XEiJ.BUS_PAGE_BITS].mmdWl (t, (int) (d >> 8)); 23896: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_USER_DATA; 23897: t = mmuTranslateWriteUserData (a + 7); 23898: map[t >>> XEiJ.BUS_PAGE_BITS].mmdWb (t, (int) d); 23899: } else { //4n+3 23900: map[t >>> XEiJ.BUS_PAGE_BITS].mmdWb (t, (int) (d >> 56)); 23901: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_USER_DATA; 23902: t = mmuTranslateWriteUserData (a + 1); 23903: map[t >>> XEiJ.BUS_PAGE_BITS].mmdWl (t, (int) (d >> 24)); 23904: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_USER_DATA; 23905: t = mmuTranslateWriteUserData (a + 5); 23906: map[t >>> XEiJ.BUS_PAGE_BITS].mmdWw (t, (int) (d >> 8)); 23907: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_USER_DATA; 23908: t = mmuTranslateWriteUserData (a + 7); 23909: map[t >>> XEiJ.BUS_PAGE_BITS].mmdWb (t, (int) d); 23910: } 23911: } 23912: } //mmuWriteQuadSecond(int,int,int) 23913: 23914: 23915: 23916: //mmuReadByteArray (address, array, offset, length, supervisor) 23917: // リードバイト配列。先頭から読み出す 23918: // address 先頭アドレス 23919: // array バイト配列 23920: // offset 先頭オフセット 23921: // length バイト数 23922: public static void mmuReadByteArray (int address, byte[] array, int offset, int length, int supervisor) throws M68kException { 23923: if (false) { //1バイトずつmmuReadByteSignDataを呼び出す 23924: for (int index = 0; index < length; index++) { 23925: array[offset + index] = mmuReadByteSignData (address + index, supervisor); 23926: } 23927: } else { 23928: // 変換後アドレスは0 23929: // デバイスはnull 23930: // while 残りが1バイト以上 23931: // if ページの先頭 23932: // デバイスはnull 23933: // if アドレスが4nかつ残りが4バイト以上 23934: // FSLWはリードロング 23935: // if デバイスがnull 23936: // 変換後アドレスを求める 23937: // デバイスを求める 23938: // リードロング 23939: // elif アドレスが2nかつ残りが2バイト以上 23940: // FSLWはリードワード 23941: // if デバイスがnull 23942: // 変換後アドレスを求める 23943: // デバイスを求める 23944: // リードワード 23945: // else 23946: // FSLWはリードバイト 23947: // if デバイスがnull 23948: // 変換後アドレスを求める 23949: // デバイスを求める 23950: // リードバイト 23951: // endwhile 23952: length += offset; //lengthはoffsetの上限 23953: final int mask = Math.min (XEiJ.BUS_PAGE_SIZE, mmuPageSize) - 1; 23954: if (supervisor != 0) { //スーパーバイザモード 23955: final MemoryMappedDevice[] map = DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap; 23956: int translated = 0; //変換後アドレスは0 23957: MemoryMappedDevice device = null; //デバイスはnull 23958: while (offset < length) { //残りが1バイト以上 23959: if ((address & mask) == 0) { //ページの先頭 23960: device = null; //デバイスはnull 23961: } 23962: if ((address & 3) == 0 && offset + 4 <= length) { //アドレスが4nかつ残りが4バイト以上 23963: m60FSLW = (M60_FSLW_IOMA_FIRST | 23964: M60_FSLW_RW_READ | 23965: M60_FSLW_SIZE_LONG | 23966: M60_FSLW_TM_SUPER_DATA); //FSLWはリードロング 23967: if (device == null) { //デバイスがnull 23968: translated = mmuTranslateReadSuperData (address); //変換後アドレスを求める 23969: device = map[translated >>> XEiJ.BUS_PAGE_BITS]; //デバイスを求める 23970: } 23971: int data = device.mmdRls (translated); //リードロング 23972: array[offset] = (byte) (data >> 24); 23973: array[offset + 1] = (byte) (data >> 16); 23974: array[offset + 2] = (byte) (data >> 8); 23975: array[offset + 3] = (byte) data; 23976: address += 4; 23977: translated += 4; 23978: offset += 4; 23979: } else if ((address & 1) == 0 && offset + 2 <= length) { //アドレスが2nかつ残りが2バイト以上 23980: m60FSLW = (M60_FSLW_IOMA_FIRST | 23981: M60_FSLW_RW_READ | 23982: M60_FSLW_SIZE_WORD | 23983: M60_FSLW_TM_SUPER_DATA); //FSLWはリードワード 23984: if (device == null) { //デバイスがnull 23985: translated = mmuTranslateReadSuperData (address); //変換後アドレスを求める 23986: device = map[translated >>> XEiJ.BUS_PAGE_BITS]; //デバイスを求める 23987: } 23988: int data = device.mmdRws (translated); //リードワード 23989: array[offset] = (byte) (data >> 8); 23990: array[offset + 1] = (byte) data; 23991: address += 2; 23992: translated += 2; 23993: offset += 2; 23994: } else { 23995: m60FSLW = (M60_FSLW_IOMA_FIRST | 23996: M60_FSLW_RW_READ | 23997: M60_FSLW_SIZE_BYTE | 23998: M60_FSLW_TM_SUPER_DATA); //FSLWはリードバイト 23999: if (device == null) { //デバイスがnull 24000: translated = mmuTranslateReadSuperData (address); //変換後アドレスを求める 24001: device = map[translated >>> XEiJ.BUS_PAGE_BITS]; //デバイスを求める 24002: } 24003: array[offset] = device.mmdRbs (translated); //リードバイト 24004: address++; 24005: translated++; 24006: offset++; 24007: } 24008: } //while 24009: } else { //ユーザモード 24010: final MemoryMappedDevice[] map = DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap; 24011: int translated = 0; //変換後アドレスは0 24012: MemoryMappedDevice device = null; //デバイスはnull 24013: while (offset < length) { //残りが1バイト以上 24014: if ((address & mask) == 0) { //ページの先頭 24015: device = null; //デバイスはnull 24016: } 24017: if ((address & 3) == 0 && offset + 4 <= length) { //アドレスが4nかつ残りが4バイト以上 24018: m60FSLW = (M60_FSLW_IOMA_FIRST | 24019: M60_FSLW_RW_READ | 24020: M60_FSLW_SIZE_LONG | 24021: M60_FSLW_TM_USER_DATA); //FSLWはリードロング 24022: if (device == null) { //デバイスがnull 24023: translated = mmuTranslateReadUserData (address); //変換後アドレスを求める 24024: device = map[translated >>> XEiJ.BUS_PAGE_BITS]; //デバイスを求める 24025: } 24026: int data = device.mmdRls (translated); //リードロング 24027: array[offset] = (byte) (data >> 24); 24028: array[offset + 1] = (byte) (data >> 16); 24029: array[offset + 2] = (byte) (data >> 8); 24030: array[offset + 3] = (byte) data; 24031: address += 4; 24032: translated += 4; 24033: offset += 4; 24034: } else if ((address & 1) == 0 && offset + 2 <= length) { //アドレスが2nかつ残りが2バイト以上 24035: m60FSLW = (M60_FSLW_IOMA_FIRST | 24036: M60_FSLW_RW_READ | 24037: M60_FSLW_SIZE_WORD | 24038: M60_FSLW_TM_USER_DATA); //FSLWはリードワード 24039: if (device == null) { //デバイスがnull 24040: translated = mmuTranslateReadUserData (address); //変換後アドレスを求める 24041: device = map[translated >>> XEiJ.BUS_PAGE_BITS]; //デバイスを求める 24042: } 24043: int data = device.mmdRws (translated); //リードワード 24044: array[offset] = (byte) (data >> 8); 24045: array[offset + 1] = (byte) data; 24046: address += 2; 24047: translated += 2; 24048: offset += 2; 24049: } else { 24050: m60FSLW = (M60_FSLW_IOMA_FIRST | 24051: M60_FSLW_RW_READ | 24052: M60_FSLW_SIZE_BYTE | 24053: M60_FSLW_TM_USER_DATA); //FSLWはリードバイト 24054: if (device == null) { //デバイスがnull 24055: translated = mmuTranslateReadUserData (address); //変換後アドレスを求める 24056: device = map[translated >>> XEiJ.BUS_PAGE_BITS]; //デバイスを求める 24057: } 24058: array[offset] = device.mmdRbs (translated); //リードバイト 24059: address++; 24060: translated++; 24061: offset++; 24062: } 24063: } //while 24064: } 24065: } 24066: } //mmuReadByteArray 24067: 24068: //mmuWriteByteArray (address, array, offset, length, supervisor) 24069: // ライトバイト配列。先頭から書き込む 24070: // address 先頭アドレス 24071: // array バイト配列 24072: // offset 先頭オフセット 24073: // length バイト数 24074: public static void mmuWriteByteArray (int address, byte[] array, int offset, int length, int supervisor) throws M68kException { 24075: if (false) { //1バイトずつmmuWriteByteDataを呼び出す 24076: for (int index = 0; index < length; index++) { 24077: mmuWriteByteData (address + index, array[offset + index], supervisor); 24078: } 24079: } else { 24080: // 変換後アドレスは0 24081: // デバイスはnull 24082: // while 残りが1バイト以上 24083: // if ページの先頭 24084: // デバイスはnull 24085: // if アドレスが4nかつ残りが4バイト以上 24086: // FSLWはライトロング 24087: // if デバイスがnull 24088: // 変換後アドレスを求める 24089: // デバイスを求める 24090: // ライトロング 24091: // elif アドレスが2nかつ残りが2バイト以上 24092: // FSLWはライトワード 24093: // if デバイスがnull 24094: // 変換後アドレスを求める 24095: // デバイスを求める 24096: // ライトワード 24097: // else 24098: // FSLWはライトバイト 24099: // if デバイスがnull 24100: // 変換後アドレスを求める 24101: // デバイスを求める 24102: // ライトバイト 24103: // endwhile 24104: length += offset; //lengthはoffsetの上限 24105: final int mask = Math.min (XEiJ.BUS_PAGE_SIZE, mmuPageSize) - 1; 24106: if (supervisor != 0) { //スーパーバイザモード 24107: final MemoryMappedDevice[] map = DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap; 24108: int translated = 0; //変換後アドレスは0 24109: MemoryMappedDevice device = null; //デバイスはnull 24110: while (offset < length) { //残りが1バイト以上 24111: if ((address & mask) == 0) { //ページの先頭 24112: device = null; //デバイスはnull 24113: } 24114: if ((address & 3) == 0 && offset + 4 <= length) { //アドレスが4nかつ残りが4バイト以上 24115: m60FSLW = (M60_FSLW_IOMA_FIRST | 24116: M60_FSLW_RW_WRITE | 24117: M60_FSLW_SIZE_LONG | 24118: M60_FSLW_TM_SUPER_DATA); //FSLWはライトロング 24119: if (device == null) { //デバイスがnull 24120: translated = mmuTranslateWriteSuperData (address); //変換後アドレスを求める 24121: device = map[translated >>> XEiJ.BUS_PAGE_BITS]; //デバイスを求める 24122: } 24123: device.mmdWl (translated, 24124: array[offset] << 24 | 24125: (0xff & array[offset + 1]) << 16 | 24126: (0xff & array[offset + 2]) << 8 | 24127: (0xff & array[offset + 3])); //ライトロング 24128: address += 4; 24129: translated += 4; 24130: offset += 4; 24131: } else if ((address & 1) == 0 && offset + 2 <= length) { //アドレスが2nかつ残りが2バイト以上 24132: m60FSLW = (M60_FSLW_IOMA_FIRST | 24133: M60_FSLW_RW_WRITE | 24134: M60_FSLW_SIZE_WORD | 24135: M60_FSLW_TM_SUPER_DATA); //FSLWはライトワード 24136: if (device == null) { //デバイスがnull 24137: translated = mmuTranslateWriteSuperData (address); //変換後アドレスを求める 24138: device = map[translated >>> XEiJ.BUS_PAGE_BITS]; //デバイスを求める 24139: } 24140: device.mmdWw (translated, 24141: array[offset] << 8 | 24142: (0xff & array[offset + 1])); //ライトワード 24143: address += 2; 24144: translated += 2; 24145: offset += 2; 24146: } else { 24147: m60FSLW = (M60_FSLW_IOMA_FIRST | 24148: M60_FSLW_RW_WRITE | 24149: M60_FSLW_SIZE_BYTE | 24150: M60_FSLW_TM_SUPER_DATA); //FSLWはライトバイト 24151: if (device == null) { //デバイスがnull 24152: translated = mmuTranslateWriteSuperData (address); //変換後アドレスを求める 24153: device = map[translated >>> XEiJ.BUS_PAGE_BITS]; //デバイスを求める 24154: } 24155: device.mmdWb (translated, array[offset]); //ライトバイト 24156: address++; 24157: translated++; 24158: offset++; 24159: } 24160: } //while 24161: } else { //ユーザモード 24162: final MemoryMappedDevice[] map = DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap; 24163: int translated = 0; //変換後アドレスは0 24164: MemoryMappedDevice device = null; //デバイスはnull 24165: while (offset < length) { //残りが1バイト以上 24166: if ((address & mask) == 0) { //ページの先頭 24167: device = null; //デバイスはnull 24168: } 24169: if ((address & 3) == 0 && offset + 4 <= length) { //アドレスが4nかつ残りが4バイト以上 24170: m60FSLW = (M60_FSLW_IOMA_FIRST | 24171: M60_FSLW_RW_WRITE | 24172: M60_FSLW_SIZE_LONG | 24173: M60_FSLW_TM_USER_DATA); //FSLWはライトロング 24174: if (device == null) { //デバイスがnull 24175: translated = mmuTranslateWriteUserData (address); //変換後アドレスを求める 24176: device = map[translated >>> XEiJ.BUS_PAGE_BITS]; //デバイスを求める 24177: } 24178: device.mmdWl (translated, 24179: array[offset] << 24 | 24180: (0xff & array[offset + 1]) << 16 | 24181: (0xff & array[offset + 2]) << 8 | 24182: (0xff & array[offset + 3])); //ライトロング 24183: address += 4; 24184: translated += 4; 24185: offset += 4; 24186: } else if ((address & 1) == 0 && offset + 2 <= length) { //アドレスが2nかつ残りが2バイト以上 24187: m60FSLW = (M60_FSLW_IOMA_FIRST | 24188: M60_FSLW_RW_WRITE | 24189: M60_FSLW_SIZE_WORD | 24190: M60_FSLW_TM_USER_DATA); //FSLWはライトワード 24191: if (device == null) { //デバイスがnull 24192: translated = mmuTranslateWriteUserData (address); //変換後アドレスを求める 24193: device = map[translated >>> XEiJ.BUS_PAGE_BITS]; //デバイスを求める 24194: } 24195: device.mmdWw (translated, 24196: array[offset] << 8 | 24197: (0xff & array[offset + 1])); //ライトワード 24198: address += 2; 24199: translated += 2; 24200: offset += 2; 24201: } else { 24202: m60FSLW = (M60_FSLW_IOMA_FIRST | 24203: M60_FSLW_RW_WRITE | 24204: M60_FSLW_SIZE_BYTE | 24205: M60_FSLW_TM_USER_DATA); //FSLWはライトバイト 24206: if (device == null) { //デバイスがnull 24207: translated = mmuTranslateWriteUserData (address); //変換後アドレスを求める 24208: device = map[translated >>> XEiJ.BUS_PAGE_BITS]; //デバイスを求める 24209: } 24210: device.mmdWb (translated, array[offset]); //ライトバイト 24211: address++; 24212: translated++; 24213: offset++; 24214: } 24215: } //while 24216: } 24217: } 24218: } //mmuWriteByteArray 24219: 24220: //mmuWriteByteArrayDecrement (address, array, offset, length, supervisor) 24221: // ライトバイト配列デクリメント。末尾から書き込む 24222: // address 先頭アドレス 24223: // array バイト配列 24224: // offset 先頭オフセット 24225: // length バイト数 24226: public static void mmuWriteByteArrayDecrement (int address, byte[] array, int offset, int length, int supervisor) throws M68kException { 24227: if (false) { //1バイトずつmmuWriteByteDataを呼び出す 24228: for (int index = length - 1; 0 <= index; index--) { 24229: mmuWriteByteData (address + index, array[offset + index], supervisor); 24230: } 24231: } else { 24232: // 変換後アドレスは0 24233: // デバイスはnull 24234: // while 残りが1バイト以上 24235: // if ページの先頭 24236: // デバイスはnull 24237: // if アドレスが4nかつ残りが4バイト以上 24238: // FSLWはライトロング 24239: // if デバイスがnull 24240: // 変換後アドレスを求める 24241: // デバイスを求める 24242: // ライトロング 24243: // elif アドレスが2nかつ残りが2バイト以上 24244: // FSLWはライトワード 24245: // if デバイスがnull 24246: // 変換後アドレスを求める 24247: // デバイスを求める 24248: // ライトワード 24249: // else 24250: // FSLWはライトバイト 24251: // if デバイスがnull 24252: // 変換後アドレスを求める 24253: // デバイスを求める 24254: // ライトバイト 24255: // endwhile 24256: address += length; //addressはaddressの上限 24257: offset += length; //offsetはoffsetの上限 24258: length = offset - length; //lengthはoffsetの下限 24259: final int mask = Math.min (XEiJ.BUS_PAGE_SIZE, mmuPageSize) - 1; 24260: if (supervisor != 0) { //スーパーバイザモード 24261: final MemoryMappedDevice[] map = DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap; 24262: int translated = 0; //変換後アドレスは0 24263: MemoryMappedDevice device = null; //デバイスはnull 24264: while (length < offset) { //残りが1バイト以上 24265: if ((address & mask) == 0) { //ページの先頭 24266: device = null; //デバイスはnull 24267: } 24268: if ((address & 3) == 0 && length <= offset - 4) { //アドレスが4nかつ残りが4バイト以上 24269: m60FSLW = (M60_FSLW_IOMA_FIRST | 24270: M60_FSLW_RW_WRITE | 24271: M60_FSLW_SIZE_LONG | 24272: M60_FSLW_TM_SUPER_DATA); //FSLWはライトロング 24273: address -= 4; 24274: translated -= 4; 24275: offset -= 4; 24276: if (device == null) { //デバイスがnull 24277: translated = mmuTranslateWriteSuperData (address); //変換後アドレスを求める 24278: device = map[translated >>> XEiJ.BUS_PAGE_BITS]; //デバイスを求める 24279: } 24280: device.mmdWl (translated, 24281: array[offset] << 24 | 24282: (0xff & array[offset + 1]) << 16 | 24283: (0xff & array[offset + 2]) << 8 | 24284: (0xff & array[offset + 3])); //ライトロング 24285: } else if ((address & 1) == 0 && length <= offset - 2) { //アドレスが2nかつ残りが2バイト以上 24286: m60FSLW = (M60_FSLW_IOMA_FIRST | 24287: M60_FSLW_RW_WRITE | 24288: M60_FSLW_SIZE_WORD | 24289: M60_FSLW_TM_SUPER_DATA); //FSLWはライトワード 24290: address -= 2; 24291: translated -= 2; 24292: offset -= 2; 24293: if (device == null) { //デバイスがnull 24294: translated = mmuTranslateWriteSuperData (address); //変換後アドレスを求める 24295: device = map[translated >>> XEiJ.BUS_PAGE_BITS]; //デバイスを求める 24296: } 24297: device.mmdWw (translated, 24298: array[offset] << 8 | 24299: (0xff & array[offset + 1])); //ライトワード 24300: } else { 24301: m60FSLW = (M60_FSLW_IOMA_FIRST | 24302: M60_FSLW_RW_WRITE | 24303: M60_FSLW_SIZE_BYTE | 24304: M60_FSLW_TM_SUPER_DATA); //FSLWはライトバイト 24305: address--; 24306: translated--; 24307: offset--; 24308: if (device == null) { //デバイスがnull 24309: translated = mmuTranslateWriteSuperData (address); //変換後アドレスを求める 24310: device = map[translated >>> XEiJ.BUS_PAGE_BITS]; //デバイスを求める 24311: } 24312: device.mmdWb (translated, array[offset]); //ライトバイト 24313: } 24314: } //while 24315: } else { //ユーザモード 24316: final MemoryMappedDevice[] map = DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap; 24317: int translated = 0; //変換後アドレスは0 24318: MemoryMappedDevice device = null; //デバイスはnull 24319: while (length < offset) { //残りが1バイト以上 24320: if ((address & mask) == 0) { //ページの先頭 24321: device = null; //デバイスはnull 24322: } 24323: if ((address & 3) == 0 && length <= offset - 4) { //アドレスが4nかつ残りが4バイト以上 24324: m60FSLW = (M60_FSLW_IOMA_FIRST | 24325: M60_FSLW_RW_WRITE | 24326: M60_FSLW_SIZE_LONG | 24327: M60_FSLW_TM_USER_DATA); //FSLWはライトロング 24328: address -= 4; 24329: translated -= 4; 24330: offset -= 4; 24331: if (device == null) { //デバイスがnull 24332: translated = mmuTranslateWriteUserData (address); //変換後アドレスを求める 24333: device = map[translated >>> XEiJ.BUS_PAGE_BITS]; //デバイスを求める 24334: } 24335: device.mmdWl (translated, 24336: array[offset] << 24 | 24337: (0xff & array[offset + 1]) << 16 | 24338: (0xff & array[offset + 2]) << 8 | 24339: (0xff & array[offset + 3])); //ライトロング 24340: } else if ((address & 1) == 0 && length <= offset - 2) { //アドレスが2nかつ残りが2バイト以上 24341: m60FSLW = (M60_FSLW_IOMA_FIRST | 24342: M60_FSLW_RW_WRITE | 24343: M60_FSLW_SIZE_WORD | 24344: M60_FSLW_TM_USER_DATA); //FSLWはライトワード 24345: address -= 2; 24346: translated -= 2; 24347: offset -= 2; 24348: if (device == null) { //デバイスがnull 24349: translated = mmuTranslateWriteUserData (address); //変換後アドレスを求める 24350: device = map[translated >>> XEiJ.BUS_PAGE_BITS]; //デバイスを求める 24351: } 24352: device.mmdWw (translated, 24353: array[offset] << 8 | 24354: (0xff & array[offset + 1])); //ライトワード 24355: } else { 24356: m60FSLW = (M60_FSLW_IOMA_FIRST | 24357: M60_FSLW_RW_WRITE | 24358: M60_FSLW_SIZE_BYTE | 24359: M60_FSLW_TM_USER_DATA); //FSLWはライトバイト 24360: address--; 24361: translated--; 24362: offset--; 24363: if (device == null) { //デバイスがnull 24364: translated = mmuTranslateWriteUserData (address); //変換後アドレスを求める 24365: device = map[translated >>> XEiJ.BUS_PAGE_BITS]; //デバイスを求める 24366: } 24367: device.mmdWb (translated, array[offset]); //ライトバイト 24368: } 24369: } //while 24370: } 24371: } 24372: } //mmuWriteByteArrayDecrement 24373: 24374: 24375: 24376: //-------------------------------------------------------------------------------- 24377: //アドレス変換 24378: 24379: //pa = mmuLoadPhysicalAddressRead (a) 24380: // PLPAR (An) 24381: // DFCに従って論理アドレスを物理アドレスに変換する(リードアクセス) 24382: // DFC 1=ユーザデータ,2=ユーザ命令,5=スーパーバイザデータ,6=スーパーバイザ命令 24383: // pa 物理アドレス 24384: // a 論理アドレス 24385: public static int mmuLoadPhysicalAddressRead (int a) throws M68kException { 24386: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_READ | M60_FSLW_SIZE_BYTE | XEiJ.mpuDFC << 16; 24387: return ((0b10011111 << 24 << XEiJ.mpuDFC) < 0 ? 24388: (0b00101010 << 24 << XEiJ.mpuDFC) < 0 ? mmuTranslateReadSuperCode (a) : mmuTranslateReadSuperData (a) : 24389: (0b00101010 << 24 << XEiJ.mpuDFC) < 0 ? mmuTranslateReadUserCode (a) : mmuTranslateReadUserData (a)); 24390: } //mmuLoadPhysicalAddressRead(int) 24391: 24392: //pa = mmuLoadPhysicalAddressWrite (a) 24393: // PLPAW (An) 24394: // DFCに従って論理アドレスを物理アドレスに変換する(ライトアクセス) 24395: // DFC 1=ユーザデータ,2=ユーザ命令,5=スーパーバイザデータ,6=スーパーバイザ命令 24396: // pa 物理アドレス 24397: // a 論理アドレス 24398: public static int mmuLoadPhysicalAddressWrite (int a) throws M68kException { 24399: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_BYTE | XEiJ.mpuDFC << 16; 24400: return ((0b10011111 << 24 << XEiJ.mpuDFC) < 0 ? 24401: (0b00101010 << 24 << XEiJ.mpuDFC) < 0 ? mmuTranslateWriteSuperCode (a) : mmuTranslateWriteSuperData (a) : 24402: (0b00101010 << 24 << XEiJ.mpuDFC) < 0 ? mmuTranslateWriteUserCode (a) : mmuTranslateWriteUserData (a)); 24403: } //mmuLoadPhysicalAddressWrite(int) 24404: 24405: //pa = mmuTranslateReadUserData (a) 24406: // アドレス変換を行う(リードユーザデータ) 24407: // pa 物理アドレス 24408: // a 論理アドレス 24409: // m60FSLWのMA,RW,SIZE,TM,IOをセットしてから呼び出すこと 24410: public static int mmuTranslateReadUserData (int a) throws M68kException { 24411: int logicalPage = a & mmuPageAddressMask; //論理ページアドレス 24412: int head = (logicalPage * MMU_HASH_COEFF >>> -MMU_HASH_BITS) * (4 * MMU_CACHE_WAYS); //先頭のエントリ 24413: if (mmuUserDataCache[head] == logicalPage) { //リード用の論理ページアドレスと一致した 24414: return mmuUserDataCache[head + 2] | (a & mmuPageOffsetMask); //物理ページアドレスとページオフセットを連結する 24415: } 24416: if (MMU_CACHE_WAYS >= 2) { //2ways以上 24417: int tail = head + (4 * MMU_CACHE_WAYS - 4); //末尾のエントリ 24418: for (int i = head + 4; i <= tail; i += 4) { 24419: if (mmuUserDataCache[i] == logicalPage) { //リード用の論理ページアドレスと一致した 24420: //int logicalRead = mmuUserDataCache[i ]; 24421: int logicalWrite = mmuUserDataCache[i + 1]; 24422: int physicalPage = mmuUserDataCache[i + 2]; 24423: int globalFlag = mmuUserDataCache[i + 3]; 24424: for (; i > head; i -= 4) { 24425: mmuUserDataCache[i ] = mmuUserDataCache[i - 4]; 24426: mmuUserDataCache[i + 1] = mmuUserDataCache[i - 3]; 24427: mmuUserDataCache[i + 2] = mmuUserDataCache[i - 2]; 24428: mmuUserDataCache[i + 3] = mmuUserDataCache[i - 1]; 24429: } 24430: mmuUserDataCache[i ] = logicalPage; //logicalRead 24431: mmuUserDataCache[i + 1] = logicalWrite; 24432: mmuUserDataCache[i + 2] = physicalPage; 24433: mmuUserDataCache[i + 3] = globalFlag; 24434: return physicalPage | (a & mmuPageOffsetMask); //物理ページアドレスとページオフセットを連結する 24435: } 24436: } //for i 24437: } 24438: return mmuTranslateCommon (a, false, false, false); 24439: } //mmuTranslateReadUserData(int) 24440: 24441: //pa = mmuTranslateReadUserCode (a) 24442: // アドレス変換を行う(リードユーザコード) 24443: // pa 物理アドレス 24444: // a 論理アドレス 24445: // m60FSLWのMA,RW,SIZE,TM,IOをセットしてから呼び出すこと 24446: public static int mmuTranslateReadUserCode (int a) throws M68kException { 24447: int logicalPage = a & mmuPageAddressMask; //論理ページアドレス 24448: int head = (logicalPage * MMU_HASH_COEFF >>> -MMU_HASH_BITS) * (4 * MMU_CACHE_WAYS); //先頭のエントリ 24449: if (mmuUserCodeCache[head] == logicalPage) { //リード用の論理ページアドレスと一致した 24450: return mmuUserCodeCache[head + 2] | (a & mmuPageOffsetMask); //物理ページアドレスとページオフセットを連結する 24451: } 24452: if (MMU_CACHE_WAYS >= 2) { //2ways以上 24453: int tail = head + (4 * MMU_CACHE_WAYS - 4); //末尾のエントリ 24454: for (int i = head + 4; i <= tail; i += 4) { 24455: if (mmuUserCodeCache[i] == logicalPage) { //リード用の論理ページアドレスと一致した 24456: //int logicalRead = mmuUserCodeCache[i ]; 24457: int logicalWrite = mmuUserCodeCache[i + 1]; 24458: int physicalPage = mmuUserCodeCache[i + 2]; 24459: int globalFlag = mmuUserCodeCache[i + 3]; 24460: for (; i > head; i -= 4) { 24461: mmuUserCodeCache[i ] = mmuUserCodeCache[i - 4]; 24462: mmuUserCodeCache[i + 1] = mmuUserCodeCache[i - 3]; 24463: mmuUserCodeCache[i + 2] = mmuUserCodeCache[i - 2]; 24464: mmuUserCodeCache[i + 3] = mmuUserCodeCache[i - 1]; 24465: } 24466: mmuUserCodeCache[head ] = logicalPage; //logicalRead 24467: mmuUserCodeCache[head + 1] = logicalWrite; 24468: mmuUserCodeCache[head + 2] = physicalPage; 24469: mmuUserCodeCache[head + 3] = globalFlag; 24470: return physicalPage | (a & mmuPageOffsetMask); //物理ページアドレスとページオフセットを連結する 24471: } 24472: } //for i 24473: } 24474: return mmuTranslateCommon (a, false, false, true); 24475: } //mmuTranslateReadUserCode(int) 24476: 24477: //pa = mmuTranslateReadSuperData (a) 24478: // アドレス変換を行う(リードスーパーバイザデータ) 24479: // pa 物理アドレス 24480: // a 論理アドレス 24481: // m60FSLWのMA,RW,SIZE,TM,IOをセットしてから呼び出すこと 24482: public static int mmuTranslateReadSuperData (int a) throws M68kException { 24483: int logicalPage = a & mmuPageAddressMask; //論理ページアドレス 24484: int head = (logicalPage * MMU_HASH_COEFF >>> -MMU_HASH_BITS) * (4 * MMU_CACHE_WAYS); //先頭のエントリ 24485: if (mmuSuperDataCache[head] == logicalPage) { //リード用の論理ページアドレスと一致した 24486: return mmuSuperDataCache[head + 2] | (a & mmuPageOffsetMask); //物理ページアドレスとページオフセットを連結する 24487: } 24488: if (MMU_CACHE_WAYS >= 2) { //2ways以上 24489: int tail = head + (4 * MMU_CACHE_WAYS - 4); //末尾のエントリ 24490: for (int i = head + 4; i <= tail; i += 4) { 24491: if (mmuSuperDataCache[i] == logicalPage) { //リード用の論理ページアドレスと一致した 24492: //int logicalRead = mmuSuperDataCache[i ]; 24493: int logicalWrite = mmuSuperDataCache[i + 1]; 24494: int physicalPage = mmuSuperDataCache[i + 2]; 24495: int globalFlag = mmuSuperDataCache[i + 3]; 24496: for (; i > head; i -= 4) { 24497: mmuSuperDataCache[i ] = mmuSuperDataCache[i - 4]; 24498: mmuSuperDataCache[i + 1] = mmuSuperDataCache[i - 3]; 24499: mmuSuperDataCache[i + 2] = mmuSuperDataCache[i - 2]; 24500: mmuSuperDataCache[i + 3] = mmuSuperDataCache[i - 1]; 24501: } 24502: mmuSuperDataCache[i ] = logicalPage; //logicalRead 24503: mmuSuperDataCache[i + 1] = logicalWrite; 24504: mmuSuperDataCache[i + 2] = physicalPage; 24505: mmuSuperDataCache[i + 3] = globalFlag; 24506: return physicalPage | (a & mmuPageOffsetMask); //物理ページアドレスとページオフセットを連結する 24507: } 24508: } //for i 24509: } 24510: return mmuTranslateCommon (a, false, true, false); 24511: } //mmuTranslateReadSuperData(int) 24512: 24513: //pa = mmuTranslateReadSuperCode (a) 24514: // アドレス変換を行う(リードスーパーバイザコード) 24515: // pa 物理アドレス 24516: // a 論理アドレス 24517: // m60FSLWのMA,RW,SIZE,TM,IOをセットしてから呼び出すこと 24518: public static int mmuTranslateReadSuperCode (int a) throws M68kException { 24519: int logicalPage = a & mmuPageAddressMask; //論理ページアドレス 24520: int head = (logicalPage * MMU_HASH_COEFF >>> -MMU_HASH_BITS) * (4 * MMU_CACHE_WAYS); //先頭のエントリ 24521: if (mmuSuperCodeCache[head] == logicalPage) { //リード用の論理ページアドレスと一致した 24522: return mmuSuperCodeCache[head + 2] | (a & mmuPageOffsetMask); //物理ページアドレスとページオフセットを連結する 24523: } 24524: if (MMU_CACHE_WAYS >= 2) { //2ways以上 24525: int tail = head + (4 * MMU_CACHE_WAYS - 4); //末尾のエントリ 24526: for (int i = head + 4; i <= tail; i += 4) { 24527: if (mmuSuperCodeCache[i] == logicalPage) { //リード用の論理ページアドレスと一致した 24528: //int logicalRead = mmuSuperCodeCache[i ]; 24529: int logicalWrite = mmuSuperCodeCache[i + 1]; 24530: int physicalPage = mmuSuperCodeCache[i + 2]; 24531: int globalFlag = mmuSuperCodeCache[i + 3]; 24532: for (; i > head; i -= 4) { 24533: mmuSuperCodeCache[i ] = mmuSuperCodeCache[i - 4]; 24534: mmuSuperCodeCache[i + 1] = mmuSuperCodeCache[i - 3]; 24535: mmuSuperCodeCache[i + 2] = mmuSuperCodeCache[i - 2]; 24536: mmuSuperCodeCache[i + 3] = mmuSuperCodeCache[i - 1]; 24537: } 24538: mmuSuperCodeCache[head ] = logicalPage; //logicalRead 24539: mmuSuperCodeCache[head + 1] = logicalWrite; 24540: mmuSuperCodeCache[head + 2] = physicalPage; 24541: mmuSuperCodeCache[head + 3] = globalFlag; 24542: return physicalPage | (a & mmuPageOffsetMask); //物理ページアドレスとページオフセットを連結する 24543: } 24544: } //for i 24545: } 24546: return mmuTranslateCommon (a, false, true, true); 24547: } //mmuTranslateReadSuperCode(int) 24548: 24549: //pa = mmuTranslateWriteUserData (a) 24550: // アドレス変換を行う(ライトユーザデータ) 24551: // pa 物理アドレス 24552: // a 論理アドレス 24553: // m60FSLWのMA,RW,SIZE,TM,IOをセットしてから呼び出すこと 24554: public static int mmuTranslateWriteUserData (int a) throws M68kException { 24555: int logicalPage = a & mmuPageAddressMask; //論理ページアドレス 24556: int head = (logicalPage * MMU_HASH_COEFF >>> -MMU_HASH_BITS) * (4 * MMU_CACHE_WAYS); //先頭のエントリ 24557: if (mmuUserDataCache[head + 1] == logicalPage) { //ライト用の論理ページアドレスと一致した 24558: return mmuUserDataCache[head + 2] | (a & mmuPageOffsetMask); //物理ページアドレスとページオフセットを連結する 24559: } 24560: if (MMU_CACHE_WAYS >= 2) { //2ways以上 24561: int tail = head + (4 * MMU_CACHE_WAYS - 4); //末尾のエントリ 24562: for (int i = head + 4; i <= tail; i += 4) { 24563: if (mmuUserDataCache[i + 1] == logicalPage) { //ライト用の論理ページアドレスと一致した 24564: int logicalRead = mmuUserDataCache[i ]; 24565: //int logicalWrite = mmuUserDataCache[i + 1]; 24566: int physicalPage = mmuUserDataCache[i + 2]; 24567: int globalFlag = mmuUserDataCache[i + 3]; 24568: for (; i > head; i -= 4) { 24569: mmuUserDataCache[i ] = mmuUserDataCache[i - 4]; 24570: mmuUserDataCache[i + 1] = mmuUserDataCache[i - 3]; 24571: mmuUserDataCache[i + 2] = mmuUserDataCache[i - 2]; 24572: mmuUserDataCache[i + 3] = mmuUserDataCache[i - 1]; 24573: } 24574: mmuUserDataCache[i ] = logicalRead; 24575: mmuUserDataCache[i + 1] = logicalPage; //logicalWrite 24576: mmuUserDataCache[i + 2] = physicalPage; 24577: mmuUserDataCache[i + 3] = globalFlag; 24578: return physicalPage | (a & mmuPageOffsetMask); //物理ページアドレスとページオフセットを連結する 24579: } 24580: } //for i 24581: } 24582: return mmuTranslateCommon (a, true, false, false); 24583: } //mmuTranslateWriteUserData(int) 24584: 24585: //pa = mmuTranslateWriteUserCode (a) 24586: // アドレス変換を行う(ライトユーザコード) 24587: // pa 物理アドレス 24588: // a 論理アドレス 24589: // m60FSLWのMA,RW,SIZE,TM,IOをセットしてから呼び出すこと 24590: public static int mmuTranslateWriteUserCode (int a) throws M68kException { 24591: int logicalPage = a & mmuPageAddressMask; //論理ページアドレス 24592: int head = (logicalPage * MMU_HASH_COEFF >>> -MMU_HASH_BITS) * (4 * MMU_CACHE_WAYS); //先頭のエントリ 24593: if (mmuUserCodeCache[head + 1] == logicalPage) { //ライト用の論理ページアドレスと一致した 24594: return mmuUserCodeCache[head + 2] | (a & mmuPageOffsetMask); //物理ページアドレスとページオフセットを連結する 24595: } 24596: if (MMU_CACHE_WAYS >= 2) { //2ways以上 24597: int tail = head + (4 * MMU_CACHE_WAYS - 4); //末尾のエントリ 24598: for (int i = head + 4; i <= tail; i += 4) { 24599: if (mmuUserCodeCache[i + 1] == logicalPage) { //ライト用の論理ページアドレスと一致した 24600: int logicalRead = mmuUserCodeCache[i ]; 24601: //int logicalWrite = mmuUserCodeCache[i + 1]; 24602: int physicalPage = mmuUserCodeCache[i + 2]; 24603: int globalFlag = mmuUserCodeCache[i + 3]; 24604: for (; i > head; i -= 4) { 24605: mmuUserCodeCache[i ] = mmuUserCodeCache[i - 4]; 24606: mmuUserCodeCache[i + 1] = mmuUserCodeCache[i - 3]; 24607: mmuUserCodeCache[i + 2] = mmuUserCodeCache[i - 2]; 24608: mmuUserCodeCache[i + 3] = mmuUserCodeCache[i - 1]; 24609: } 24610: mmuUserCodeCache[head ] = logicalRead; 24611: mmuUserCodeCache[head + 1] = logicalPage; //logicalWrite 24612: mmuUserCodeCache[head + 2] = physicalPage; 24613: mmuUserCodeCache[head + 3] = globalFlag; 24614: return physicalPage | (a & mmuPageOffsetMask); //物理ページアドレスとページオフセットを連結する 24615: } 24616: } //for i 24617: } 24618: return mmuTranslateCommon (a, true, false, true); 24619: } //mmuTranslateWriteUserCode(int) 24620: 24621: //pa = mmuTranslateWriteSuperData (a) 24622: // アドレス変換を行う(ライトスーパーバイザデータ) 24623: // pa 物理アドレス 24624: // a 論理アドレス 24625: // m60FSLWのMA,RW,SIZE,TM,IOをセットしてから呼び出すこと 24626: public static int mmuTranslateWriteSuperData (int a) throws M68kException { 24627: int logicalPage = a & mmuPageAddressMask; //論理ページアドレス 24628: int head = (logicalPage * MMU_HASH_COEFF >>> -MMU_HASH_BITS) * (4 * MMU_CACHE_WAYS); //先頭のエントリ 24629: if (mmuSuperDataCache[head + 1] == logicalPage) { //ライト用の論理ページアドレスと一致した 24630: return mmuSuperDataCache[head + 2] | (a & mmuPageOffsetMask); //物理ページアドレスとページオフセットを連結する 24631: } 24632: if (MMU_CACHE_WAYS >= 2) { //2ways以上 24633: int tail = head + (4 * MMU_CACHE_WAYS - 4); //末尾のエントリ 24634: for (int i = head + 4; i <= tail; i += 4) { 24635: if (mmuSuperDataCache[i + 1] == logicalPage) { //ライト用の論理ページアドレスと一致した 24636: int logicalRead = mmuSuperDataCache[i ]; 24637: //int logicalWrite = mmuSuperDataCache[i + 1]; 24638: int physicalPage = mmuSuperDataCache[i + 2]; 24639: int globalFlag = mmuSuperDataCache[i + 3]; 24640: for (; i > head; i -= 4) { 24641: mmuSuperDataCache[i ] = mmuSuperDataCache[i - 4]; 24642: mmuSuperDataCache[i + 1] = mmuSuperDataCache[i - 3]; 24643: mmuSuperDataCache[i + 2] = mmuSuperDataCache[i - 2]; 24644: mmuSuperDataCache[i + 3] = mmuSuperDataCache[i - 1]; 24645: } 24646: mmuSuperDataCache[i ] = logicalRead; 24647: mmuSuperDataCache[i + 1] = logicalPage; //logicalWrite 24648: mmuSuperDataCache[i + 2] = physicalPage; 24649: mmuSuperDataCache[i + 3] = globalFlag; 24650: return physicalPage | (a & mmuPageOffsetMask); //物理ページアドレスとページオフセットを連結する 24651: } 24652: } //for i 24653: } 24654: return mmuTranslateCommon (a, true, true, false); 24655: } //mmuTranslateWriteSuperData(int) 24656: 24657: //pa = mmuTranslateWriteSuperCode (a) 24658: // アドレス変換を行う(ライトスーパーバイザコード) 24659: // pa 物理アドレス 24660: // a 論理アドレス 24661: // m60FSLWのMA,RW,SIZE,TM,IOをセットしてから呼び出すこと 24662: public static int mmuTranslateWriteSuperCode (int a) throws M68kException { 24663: int logicalPage = a & mmuPageAddressMask; //論理ページアドレス 24664: int head = (logicalPage * MMU_HASH_COEFF >>> -MMU_HASH_BITS) * (4 * MMU_CACHE_WAYS); //先頭のエントリ 24665: if (mmuSuperCodeCache[head + 1] == logicalPage) { //ライト用の論理ページアドレスと一致した 24666: return mmuSuperCodeCache[head + 2] | (a & mmuPageOffsetMask); //物理ページアドレスとページオフセットを連結する 24667: } 24668: if (MMU_CACHE_WAYS >= 2) { //2ways以上 24669: int tail = head + (4 * MMU_CACHE_WAYS - 4); //末尾のエントリ 24670: for (int i = head + 4; i <= tail; i += 4) { 24671: if (mmuSuperCodeCache[i + 1] == logicalPage) { //ライト用の論理ページアドレスと一致した 24672: int logicalRead = mmuSuperCodeCache[i ]; 24673: //int logicalWrite = mmuSuperCodeCache[i + 1]; 24674: int physicalPage = mmuSuperCodeCache[i + 2]; 24675: int globalFlag = mmuSuperCodeCache[i + 3]; 24676: for (; i > head; i -= 4) { 24677: mmuSuperCodeCache[i ] = mmuSuperCodeCache[i - 4]; 24678: mmuSuperCodeCache[i + 1] = mmuSuperCodeCache[i - 3]; 24679: mmuSuperCodeCache[i + 2] = mmuSuperCodeCache[i - 2]; 24680: mmuSuperCodeCache[i + 3] = mmuSuperCodeCache[i - 1]; 24681: } 24682: mmuSuperCodeCache[head ] = logicalRead; 24683: mmuSuperCodeCache[head + 1] = logicalPage; //logicalWrite 24684: mmuSuperCodeCache[head + 2] = physicalPage; 24685: mmuSuperCodeCache[head + 3] = globalFlag; 24686: return physicalPage | (a & mmuPageOffsetMask); //物理ページアドレスとページオフセットを連結する 24687: } 24688: } //for i 24689: } 24690: return mmuTranslateCommon (a, true, true, true); 24691: } //mmuTranslateWriteSuperCode(int) 24692: 24693: //pa = mmuTranslateCommon (a, write, supervisor, instruction) 24694: // 透過変換とテーブルサーチを行い、アドレス変換キャッシュ更新する 24695: // アドレス変換キャッシュがミスしたときに呼び出す 24696: // pa 物理アドレス 24697: // a 論理アドレス 24698: // write true=ライト,false=リード 24699: // supervisor true=スーパーバイザ,false=ユーザ。通常はXEiJ.regSRS!=0、PLPAR/PLPAWでは(XEiJ.mpuDFC&4)!=0 24700: // instruction true=命令,false=データ。通常は命令フェッチまたは拡張ワードのときtrue、PLPAR/PLPAWでは(XEiJ.mpuDFC&2)!=0 24701: // m60FSLWのMA,RW,SIZE,TM,IOをセットしてから呼び出すこと 24702: public static int mmuTranslateCommon (int a, boolean write, boolean supervisor, boolean instruction) throws M68kException { 24703: if (MMU_DEBUG_TRANSLATION) { 24704: System.out.printf ("%08x mmuTranslateCommon(0x%08x,%b,%b,%b)", XEiJ.regPC0, a, write, supervisor, instruction); 24705: } 24706: int logicalPage = a & mmuPageAddressMask; //リード用の論理ページアドレス 24707: int logicalWrite; //ライト用の論理ページアドレス 24708: int physicalPage; //物理ページアドレス 24709: int globalFlag; //グローバルフラグ。-1=Global,0=NonGlobal 24710: int pa; //物理アドレス 24711: //透過変換 24712: // 透過変換はスーパーバイザモードかどうかを条件にすることができる(しないこともできる) 24713: // 条件が合わなければヒットしないだけで、スーパーバイザプロテクトのアクセスフォルトになならない 24714: // 透過変換をアドレス変換キャッシュに乗せる場合 24715: // アドレス変換キャッシュがヒットしてバスエラーが発生したとき 24716: // 透過変換かどうかを再確認してFSLWのTTRをセットしなければならない 24717: // 透過変換レジスタが操作されたとき 24718: // OFF→ONの領域だけでなくON→OFFの領域もフラッシュしなければならない 24719: // 透過変換レジスタを頻繁に操作されると重くなるかも知れない 24720: int tt = (supervisor ? 24721: instruction ? mmuSuperCodeTransparent : mmuSuperDataTransparent : 24722: instruction ? mmuUserCodeTransparent : mmuUserDataTransparent)[a >>> 24]; 24723: if (tt != 0) { //透過変換あり 24724: m60FSLW |= M60_FSLW_TRANSPARENT; 24725: if (write && //ライトで 24726: tt < 0) { //透過変換によるライトプロテクト 24727: if (MMU_DEBUG_TRANSLATION) { 24728: System.out.printf (" write protected by transparent translation\n", a); 24729: } 24730: m60FSLW |= M60_FSLW_WRITE_PROTECT; 24731: M68kException.m6eNumber = M68kException.M6E_ACCESS_FAULT; 24732: //m60Address = a; 24733: throw M68kException.m6eSignal; 24734: } 24735: logicalWrite = logicalPage; //ライト用の論理ページアドレス 24736: physicalPage = logicalPage; //物理ページアドレス 24737: globalFlag = -1; //グローバルフラグ。-1=Global,0=NonGlobal 24738: pa = a; 24739: if (MMU_DEBUG_TRANSLATION) { 24740: System.out.printf ("=0x%08x (transparent translation)\n", pa); 24741: } 24742: } else if (mmuEnabled) { //透過変換なし、アドレス変換あり 24743: //テーブルサーチ 24744: // スーパーバイザプロテクトまたはライトプロテクトで停止したときディスクリプタの使用済みフラグはセットされない 24745: // リードモディファイライトはライトでアロケートするのでリードする前にライトプロテクトに引っかかる 24746: // 例えばROMの内容をインクリメントしようとしたときライトだけでなくリードも行われない 24747: m60FSLW |= M60_FSLW_TABLE_SEARCH; 24748: //ルートテーブル 24749: int rootDescriptorAddress = (supervisor ? mmuSRP : mmuURP) + ((a & MMU_ROOT_INDEX_MASK) >>> MMU_ROOT_INDEX_BIT0 - 2); //ルートテーブルディスクリプタのアドレス 24750: MemoryMappedDevice rootDescriptorDevice = (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[rootDescriptorAddress >>> XEiJ.BUS_PAGE_BITS]; 24751: int rootDescriptor = rootDescriptorDevice.mmdRls (rootDescriptorAddress); //ルートテーブルディスクリプタ 24752: if ((rootDescriptor & MMU_DESCRIPTOR_UDT) == MMU_DESCRIPTOR_TYPE_INVALID) { //ディスクリプタが無効のとき 24753: if (MMU_DEBUG_TRANSLATION) { 24754: System.out.printf (" invalid root descriptor 0x%08x at 0x%08x\n", rootDescriptor, rootDescriptorAddress); 24755: } 24756: m60FSLW ^= M60_FSLW_TABLE_SEARCH ^ M60_FSLW_ROOT_DESCRIPTOR; 24757: M68kException.m6eNumber = M68kException.M6E_ACCESS_FAULT; 24758: //m60Address = a; 24759: throw M68kException.m6eSignal; 24760: } 24761: if (write && //ライトで 24762: (rootDescriptor & MMU_DESCRIPTOR_WRITE_PROTECTED) != 0) { //ライトプロテクトされているとき 24763: if (MMU_DEBUG_TRANSLATION) { 24764: System.out.printf (" write protected by root descriptor 0x%08x at 0x%08x\n", rootDescriptor, rootDescriptorAddress); 24765: } 24766: m60FSLW ^= M60_FSLW_TABLE_SEARCH ^ M60_FSLW_WRITE_PROTECT; 24767: M68kException.m6eNumber = M68kException.M6E_ACCESS_FAULT; 24768: //m60Address = a; 24769: throw M68kException.m6eSignal; 24770: } 24771: if ((rootDescriptor & MMU_DESCRIPTOR_USED) == 0) { //ディスクリプタが未使用のとき 24772: rootDescriptor |= MMU_DESCRIPTOR_USED; //使用済み 24773: rootDescriptorDevice.mmdWl (rootDescriptorAddress, rootDescriptor); 24774: } 24775: //ポインタテーブル 24776: int pointerDescriptorAddress = (rootDescriptor & MMU_DESCRIPTOR_POINTER_TABLE_ADDRESS) + ((a & MMU_POINTER_INDEX_MASK) >>> MMU_POINTER_INDEX_BIT0 - 2); //ポインタテーブルディスクリプタのアドレス 24777: MemoryMappedDevice pointerDescriptorDevice = (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[pointerDescriptorAddress >>> XEiJ.BUS_PAGE_BITS]; 24778: int pointerDescriptor = pointerDescriptorDevice.mmdRls (pointerDescriptorAddress); //ポインタテーブルディスクリプタ 24779: if ((pointerDescriptor & MMU_DESCRIPTOR_UDT) == MMU_DESCRIPTOR_TYPE_INVALID) { //ディスクリプタが無効のとき 24780: if (MMU_DEBUG_TRANSLATION) { 24781: System.out.printf (" invalid pointer descriptor 0x%08x at 0x%08x\n", pointerDescriptor, pointerDescriptorAddress); 24782: } 24783: m60FSLW ^= M60_FSLW_TABLE_SEARCH ^ M60_FSLW_POINTER_DESCRIPTOR; 24784: M68kException.m6eNumber = M68kException.M6E_ACCESS_FAULT; 24785: //m60Address = a; 24786: throw M68kException.m6eSignal; 24787: } 24788: if (write && //ライトで 24789: (pointerDescriptor & MMU_DESCRIPTOR_WRITE_PROTECTED) != 0) { //ライトプロテクトされているとき 24790: if (MMU_DEBUG_TRANSLATION) { 24791: System.out.printf (" write protected by pointer descriptor 0x%08x at 0x%08x\n", pointerDescriptor, pointerDescriptorAddress); 24792: } 24793: m60FSLW ^= M60_FSLW_TABLE_SEARCH ^ M60_FSLW_WRITE_PROTECT; 24794: M68kException.m6eNumber = M68kException.M6E_ACCESS_FAULT; 24795: //m60Address = a; 24796: throw M68kException.m6eSignal; 24797: } 24798: if ((pointerDescriptor & MMU_DESCRIPTOR_USED) == 0) { //ディスクリプタが未使用のとき 24799: pointerDescriptor |= MMU_DESCRIPTOR_USED; //使用済み 24800: pointerDescriptorDevice.mmdWl (pointerDescriptorAddress, pointerDescriptor); 24801: } 24802: //ページテーブル 24803: int pageDescriptorAddress = (pointerDescriptor & mmuPageTableMask) + ((a & mmuPageIndexMask) >>> mmuPageIndexBit2); //ページテーブルディスクリプタのアドレス 24804: MemoryMappedDevice pageDescriptorDevice = (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[pageDescriptorAddress >>> XEiJ.BUS_PAGE_BITS]; 24805: int pageDescriptor = pageDescriptorDevice.mmdRls (pageDescriptorAddress); //ページテーブルディスクリプタ 24806: if ((pageDescriptor & MMU_DESCRIPTOR_PDT) == MMU_DESCRIPTOR_TYPE_INVALID) { //ディスクリプタが無効のとき 24807: if (MMU_DEBUG_TRANSLATION) { 24808: System.out.printf (" invalid page descriptor 0x%08x at 0x%08x\n", pageDescriptor, pageDescriptorAddress); 24809: } 24810: m60FSLW ^= M60_FSLW_TABLE_SEARCH ^ M60_FSLW_PAGE_FAULT; 24811: M68kException.m6eNumber = M68kException.M6E_ACCESS_FAULT; 24812: //m60Address = a; 24813: throw M68kException.m6eSignal; 24814: } 24815: if ((pageDescriptor & MMU_DESCRIPTOR_PDT) == MMU_DESCRIPTOR_TYPE_INDIRECT) { //ディスクリプタが間接のとき 24816: pageDescriptorAddress = pageDescriptor & MMU_DESCRIPTOR_INDIRECT_ADDRESS; //ページテーブルディスクリプタのアドレス 24817: pageDescriptorDevice = (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[pageDescriptorAddress >>> XEiJ.BUS_PAGE_BITS]; 24818: pageDescriptor = pageDescriptorDevice.mmdRls (pageDescriptorAddress); //ページテーブルディスクリプタ 24819: if ((pageDescriptor & MMU_DESCRIPTOR_PDT) == MMU_DESCRIPTOR_TYPE_INVALID) { //ディスクリプタが無効のとき 24820: if (MMU_DEBUG_TRANSLATION) { 24821: System.out.printf (" invalid page descriptor 0x%08x at 0x%08x\n", pageDescriptor, pageDescriptorAddress); 24822: } 24823: m60FSLW ^= M60_FSLW_TABLE_SEARCH ^ M60_FSLW_PAGE_FAULT; 24824: M68kException.m6eNumber = M68kException.M6E_ACCESS_FAULT; 24825: //m60Address = a; 24826: throw M68kException.m6eSignal; 24827: } 24828: if ((pageDescriptor & MMU_DESCRIPTOR_PDT) == MMU_DESCRIPTOR_TYPE_INDIRECT) { //ディスクリプタが二重間接のとき 24829: if (MMU_DEBUG_TRANSLATION) { 24830: System.out.printf (" indirect page descriptor 0x%08x at 0x%08x\n", pageDescriptor, pageDescriptorAddress); 24831: } 24832: m60FSLW ^= M60_FSLW_TABLE_SEARCH ^ M60_FSLW_INDIRECT_LEVEL; 24833: M68kException.m6eNumber = M68kException.M6E_ACCESS_FAULT; 24834: //m60Address = a; 24835: throw M68kException.m6eSignal; 24836: } 24837: } 24838: if (!supervisor && //ユーザモードで 24839: (pageDescriptor & MMU_DESCRIPTOR_SUPERVISOR_PROTECTED) != 0) { //スーパーバイザプロテクトされているとき 24840: if (MMU_DEBUG_TRANSLATION) { 24841: System.out.printf (" supervisor protected by page descriptor 0x%08x at 0x%08x\n", pageDescriptor, pageDescriptorAddress); 24842: } 24843: m60FSLW ^= M60_FSLW_TABLE_SEARCH ^ M60_FSLW_SUPERVISOR_PROTECT; 24844: M68kException.m6eNumber = M68kException.M6E_ACCESS_FAULT; 24845: //m60Address = a; 24846: throw M68kException.m6eSignal; 24847: } 24848: if (write && //ライトで 24849: (pageDescriptor & MMU_DESCRIPTOR_WRITE_PROTECTED) != 0) { //ライトプロテクトされているとき 24850: if (MMU_DEBUG_TRANSLATION) { 24851: System.out.printf (" write protected by page descriptor 0x%08x at 0x%08x\n", pageDescriptor, pageDescriptorAddress); 24852: } 24853: m60FSLW ^= M60_FSLW_TABLE_SEARCH ^ M60_FSLW_WRITE_PROTECT; 24854: M68kException.m6eNumber = M68kException.M6E_ACCESS_FAULT; 24855: //m60Address = a; 24856: throw M68kException.m6eSignal; 24857: } 24858: if ((pageDescriptor & MMU_DESCRIPTOR_USED) == 0) { //ディスクリプタが未使用のとき 24859: pageDescriptor |= MMU_DESCRIPTOR_USED; //使用済みにする 24860: pageDescriptorDevice.mmdWl (pageDescriptorAddress, pageDescriptor); 24861: } 24862: if (write && //ライトで 24863: (pageDescriptor & MMU_DESCRIPTOR_MODIFIED) == 0) { //修正済みでないとき 24864: pageDescriptor |= MMU_DESCRIPTOR_MODIFIED; //修正済みにする 24865: pageDescriptorDevice.mmdWl (pageDescriptorAddress, pageDescriptor); 24866: } 24867: //テーブルサーチ終了 24868: m60FSLW &= ~M60_FSLW_TABLE_SEARCH; 24869: //logicalWrite = (pageDescriptor & (MMU_DESCRIPTOR_MODIFIED | MMU_DESCRIPTOR_WRITE_PROTECTED)) == MMU_DESCRIPTOR_MODIFIED ? logicalPage : 1; //ライト用の論理ページアドレス。修正済みかつライトプロテクトされていないときだけ有効 24870: logicalWrite = (pageDescriptor & MMU_DESCRIPTOR_WRITE_PROTECTED) == 0 ? logicalPage : 1; //ライト用の論理ページアドレス。ライトプロテクトされていないときだけ有効 24871: physicalPage = pageDescriptor & mmuPageAddressMask; //物理ページアドレス 24872: globalFlag = (pageDescriptor & MMU_DESCRIPTOR_GLOBAL) != 0 ? -1 : 0; //グローバルフラグ。-1=Global,0=NonGlobal 24873: pa = physicalPage | a & mmuPageOffsetMask; //物理ページアドレスとページオフセットを連結する 24874: if (MMU_DEBUG_TRANSLATION) { 24875: System.out.printf ("=0x%08x (table search)\n", pa); 24876: System.out.printf (" rootTable=0x%08x\n", supervisor ? mmuSRP : mmuURP); 24877: System.out.printf (" rootIndex=0x%08x\n", (a & MMU_ROOT_INDEX_MASK) >>> MMU_ROOT_INDEX_BIT0); 24878: System.out.printf (" rootDescriptorAddress=0x%08x\n", rootDescriptorAddress); 24879: System.out.printf (" rootDescriptor=0x%08x\n", rootDescriptor); 24880: System.out.printf (" pointerTable=0x%08x\n", rootDescriptor & MMU_DESCRIPTOR_POINTER_TABLE_ADDRESS); 24881: System.out.printf (" pointerIndex=0x%08x\n", (a & MMU_POINTER_INDEX_MASK) >>> MMU_POINTER_INDEX_BIT0); 24882: System.out.printf (" pointerDescriptorAddress=0x%08x\n", pointerDescriptorAddress); 24883: System.out.printf (" pointerDescriptor=0x%08x\n", pointerDescriptor); 24884: System.out.printf (" pageTable=0x%08x\n", pointerDescriptor & mmuPageTableMask); 24885: System.out.printf (" pageIndex=0x%08x\n", (a & mmuPageIndexMask) >>> mmuPageIndexBit2 + 2); 24886: System.out.printf (" pageDescriptorAddress=0x%08x\n", pageDescriptorAddress); 24887: System.out.printf (" pageDescriptor=0x%08x\n", pageDescriptor); 24888: } 24889: } else { //透過変換なし、アドレス変換なし 24890: logicalWrite = logicalPage; //ライト用の論理ページアドレス 24891: physicalPage = logicalPage; //物理ページアドレス 24892: globalFlag = -1; //グローバルフラグ。-1=Global,0=NonGlobal 24893: pa = a; 24894: if (MMU_DEBUG_TRANSLATION) { 24895: System.out.printf ("=0x%08x (no translation)\n", pa); 24896: } 24897: } 24898: if (!(MMU_NOT_ALLOCATE_CACHE || 24899: (instruction ? mmuNotAllocateCode : mmuNotAllocateData))) { 24900: //アドレス変換キャッシュを更新する 24901: // 同じ論理ページアドレスのエントリが存在する場合 24902: // (リードでアロケートしたとき修正済みでなかったためライトでアロケートしなかった場合) 24903: // 同じ論理ページアドレスのエントリよりも前にあるエントリを後ろにずらす 24904: // 空いた先頭のエントリに上書きする 24905: // 同じ論理ページアドレスのエントリが存在しない場合 24906: // 末尾以外のエントリを後ろにずらす 24907: // 空いた先頭のエントリに上書きする 24908: int[] cache = (supervisor ? 24909: instruction ? mmuSuperCodeCache : mmuSuperDataCache : 24910: instruction ? mmuUserCodeCache : mmuUserDataCache); 24911: int head = (logicalPage * MMU_HASH_COEFF >>> -MMU_HASH_BITS) * (4 * MMU_CACHE_WAYS); //先頭のエントリ 24912: if (MMU_CACHE_WAYS >= 2) { //2ways以上のとき 24913: int tail = head + (4 * MMU_CACHE_WAYS - 4); //末尾のエントリ→捨てるエントリ 24914: if (write) { //ライトのとき 24915: for (int i = head; i < tail; i += 4) { 24916: if (cache[i] == logicalPage) { //リードでアロケートされていた 24917: tail = i; 24918: break; 24919: } 24920: } 24921: } 24922: // 捨てるエントリよりも前にあるエントリを後ろにずらす 24923: for (; tail > head; tail -= 4) { 24924: cache[tail ] = cache[tail - 4]; 24925: cache[tail + 1] = cache[tail - 3]; 24926: cache[tail + 2] = cache[tail - 2]; 24927: cache[tail + 3] = cache[tail - 1]; 24928: } 24929: } 24930: // 先頭のエントリに上書きする 24931: cache[head ] = logicalPage; //リード用の論理ページアドレス 24932: cache[head + 1] = logicalWrite; //ライト用の論理ページアドレス 24933: cache[head + 2] = physicalPage; //物理ページアドレス 24934: cache[head + 3] = globalFlag; //グローバルフラグ 24935: if (MMU_DEBUG_TRANSLATION) { 24936: System.out.printf (" ATC[%d]={0x%08x,0x%08x,0x%08x,%d}\n", 24937: head / (4 * MMU_CACHE_WAYS), logicalPage, logicalWrite, physicalPage, globalFlag); 24938: } 24939: } 24940: return pa; 24941: } //mmuTranslateCommon(int,boolean,boolean,boolean) 24942: 24943: public static int mmuPeekFlags; 24944: 24945: //pa = mmuTranslatePeek (a, supervisor, instruction) { 24946: // アドレス変換を行う(デバッガ用、例外なし、テーブル更新なし) 24947: // pa 物理アドレス。a^1=エラー 24948: // a 論理アドレス 24949: // supervisor 0=ユーザ,0以外=スーパーバイザ。通常はXEiJ.regSRS、PLPAR/PLPAWではXEiJ.mpuDFC&4 24950: // instruction 0=データ,0以外=命令。通常は命令フェッチまたは拡張ワードのとき1、PLPAR/PLPAWではXEiJ.mpuDFC&2 24951: public static int mmuTranslatePeek (int a, int supervisor, int instruction) { 24952: //透過変換の確認 24953: // 透過変換はスーパーバイザモードかどうかを条件にすることができる(しないこともできる) 24954: // 透過変換にスーパーバイザプロテクトの機能はない 24955: { 24956: int[] tta = new int[2]; 24957: if (instruction != 0) { 24958: tta[0] = mmuITT0; 24959: tta[1] = mmuITT1; 24960: } else { 24961: tta[0] = mmuDTT0; 24962: tta[1] = mmuDTT1; 24963: } 24964: for (int i = 0; i < 2; i++) { 24965: int ttr = tta[i]; 24966: if ((ttr & 0x8000) != 0 && //Enable 24967: ((ttr & 0x4000) != 0 || ((ttr & 0x2000) != 0) == (supervisor != 0)) && 24968: ((a ^ ttr) & ~ttr << 8) >>> 24 == 0) { 24969: mmuPeekFlags = ttr & MMU_TTR_WRITE_PROTECT; 24970: return a; 24971: } 24972: } 24973: } 24974: //透過変換なし 24975: if (!mmuEnabled) { //アドレス変換なし 24976: mmuPeekFlags = 0; 24977: return a; 24978: } 24979: //アドレス変換あり 24980: int logicalPage = a & mmuPageAddressMask; //論理ページアドレス 24981: //テーブルサーチ開始 24982: // スーパーバイザプロテクトまたはライトプロテクトで停止したときディスクリプタの使用済みフラグはセットされない 24983: // リードモディファイライトはライトでアロケートするのでリードする前にライトプロテクトに引っかかる 24984: // 例えばROMの内容をインクリメントしようとしたときライトだけでなくリードも行われない 24985: //ルートテーブル 24986: int rootDescriptorAddress = (supervisor != 0 ? mmuSRP : mmuURP) + ((a & MMU_ROOT_INDEX_MASK) >>> MMU_ROOT_INDEX_BIT0 - 2); //ルートテーブルディスクリプタのアドレス 24987: int rootDescriptor = XEiJ.busPlsf (rootDescriptorAddress); //ルートテーブルディスクリプタ 24988: if ((rootDescriptor & MMU_DESCRIPTOR_UDT) == MMU_DESCRIPTOR_TYPE_INVALID) { //ディスクリプタが無効のとき 24989: return a ^ 1; 24990: } 24991: //ポインタテーブル 24992: int pointerDescriptorAddress = (rootDescriptor & MMU_DESCRIPTOR_POINTER_TABLE_ADDRESS) + ((a & MMU_POINTER_INDEX_MASK) >>> MMU_POINTER_INDEX_BIT0 - 2); //ポインタテーブルディスクリプタのアドレス 24993: int pointerDescriptor = XEiJ.busPlsf (pointerDescriptorAddress); //ポインタテーブルディスクリプタ 24994: if ((pointerDescriptor & MMU_DESCRIPTOR_UDT) == MMU_DESCRIPTOR_TYPE_INVALID) { //ディスクリプタが無効のとき 24995: return a ^ 1; 24996: } 24997: //ページテーブル 24998: int pageDescriptorAddress = (pointerDescriptor & mmuPageTableMask) + ((a & mmuPageIndexMask) >>> mmuPageIndexBit2); //ページテーブルディスクリプタのアドレス 24999: int pageDescriptor = XEiJ.busPlsf (pageDescriptorAddress); //ページテーブルディスクリプタ 25000: if ((pageDescriptor & MMU_DESCRIPTOR_PDT) == MMU_DESCRIPTOR_TYPE_INVALID) { //ディスクリプタが無効のとき 25001: return a ^ 1; 25002: } 25003: if ((pageDescriptor & MMU_DESCRIPTOR_PDT) == MMU_DESCRIPTOR_TYPE_INDIRECT) { //ディスクリプタが間接のとき 25004: pageDescriptorAddress = pageDescriptor & MMU_DESCRIPTOR_INDIRECT_ADDRESS; //ページテーブルディスクリプタのアドレス 25005: pageDescriptor = XEiJ.busPlsf (pageDescriptorAddress); //ページテーブルディスクリプタ 25006: if ((pageDescriptor & MMU_DESCRIPTOR_PDT) == MMU_DESCRIPTOR_TYPE_INVALID) { //ディスクリプタが無効のとき 25007: return a ^ 1; 25008: } 25009: if ((pageDescriptor & MMU_DESCRIPTOR_PDT) == MMU_DESCRIPTOR_TYPE_INDIRECT) { //ディスクリプタが二重間接のとき 25010: return a ^ 1; 25011: } 25012: } 25013: if (supervisor == 0 && //ユーザモードで 25014: (pageDescriptor & MMU_DESCRIPTOR_SUPERVISOR_PROTECTED) != 0) { //スーパーバイザプロテクトされているとき 25015: return a ^ 1; 25016: } 25017: int physicalPage = pageDescriptor & mmuPageAddressMask; //物理ページアドレス 25018: //テーブルサーチ終了 25019: mmuPeekFlags = pageDescriptor & (MMU_DESCRIPTOR_SUPERVISOR_PROTECTED | 25020: MMU_DESCRIPTOR_MODIFIED | 25021: MMU_DESCRIPTOR_USED | 25022: MMU_DESCRIPTOR_WRITE_PROTECTED); 25023: return physicalPage | a & mmuPageOffsetMask; //物理ページアドレスとページオフセットを連結する 25024: } //mmuTranslatePeek(int,int,int) 25025: 25026: 25027: 25028: //実効アドレス 25029: // FIRSTのアドレス 25030: // SECONDでアクセスフォルトが発生した場合でも、FORMAT $4の例外スタックフレームにはFIRSTのアドレスが書き込まれる 25031: // M68kException.m6eAddressは実際にバスエラーが発生したアドレスを示しており、これはSECONDの場合がある 25032: private static int m60Address; 25033: 25034: // MC68060のページフォルトに関する考察 25035: // ページフォルトが発生すると、プレデクリメントとポストインクリメントによるアドレスレジスタの変化がすべてキャンセルされる 25036: // MOVE.B (A0)+,(A0)+またはMOVE.B -(A0),-(A0)でソースまたはデスティネーションでページフォルトが発生したとき、 25037: // どの組み合わせでもA0は命令開始時の値のままアクセスフォルトハンドラに移行する 25038: // RTEでページフォルトを発生させた命令に復帰すると、ソースをリードするところからやり直す 25039: // MOVE.B <mem>,<mem>のデスティネーションのライトでページフォルトが発生したとき、ソースのリードが2回行われる 25040: // これはMC68060ユーザーズマニュアルの7.10 BUS SYNCHRONIZATIONに書かれており、 25041: // 060turboでも、ページフォルトのハンドラでソースを書き換えると結果に反映されることから、リードが再実行されていることを確認できる 25042: // リードすると値が変化する可能性のあるデバイスから非常駐の可能性のあるページに転送するとき、MOVE.B <mem>,<mem>を使ってはいけない 25043: 25044: //アドレスレジスタの増分 25045: // 実効アドレスの計算でポストインクリメントまたはプレデクリメントのとき、 25046: // アドレスレジスタを更新してそのままにするとページフォルトを起こした命令を再実行することができない 25047: // MOVE.L (A0)+,(d16,A0)などでデスティネーションの実効アドレスの計算にソースの結果を反映させる必要があるので、 25048: // アドレスレジスタは更新しておいてページフォルトのときだけ命令開始時の値に巻き戻す 25049: // CMPM.L (A0)+,(A1)+やSUBX.L -(A0),-(A1)などでは複数の増分を並べるかまたは積まなければならない 25050: // m60Incremented += (long) offset << (r << 3); 25051: // で積むことにする 25052: // 巻き戻すとき負数に注意する 25053: private static long m60Incremented; 25054: 25055: // FSLW Fault Status Long Word 25056: // 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 25057: // ┏━━━━━━━┯━┯━┯━┯━━━┯━━━┯━━━┯━━━━━┯━┯━┯━┯━┯━┯━┯━┯━┯━┯━┯━┯━┯━┯━┯━┯━┓ 25058: // ┃ │MA│ │LK│ RW │ SIZE │ TT │ TM │IO│PBE SBE PTA PTB IL│PF│SP│WP│TWE RE│WE│TTR BPE SEE┃ 25059: // ┗━━━━━━━┷━┷━┷━┷━━━┷━━━┷━━━┷━━━━━┷━┷━┷━┷━┷━┷━┷━┷━┷━┷━┷━┷━┷━┷━┷━┷━┛ 25060: private static final int M60_FSLW_MISALIGNED = 1 << 27; //MA Misaligned Access 25061: private static final int M60_FSLW_LOCKED = 1 << 25; //LK Locked Transfer 25062: private static final int M60_FSLW_READ_AND_WRITE = 3 << 23; //RW Read and Write 25063: private static final int M60_FSLW_RW_WRITE = 1 << 23; // Write 25064: private static final int M60_FSLW_RW_READ = 2 << 23; // Read 25065: private static final int M60_FSLW_RW_MODIFY = 3 << 23; // Read-Modify-Write 25066: private static final int M60_FSLW_TRANSFER_SIZE = 3 << 21; //SIZE Transfer Size 25067: private static final int M60_FSLW_SIZE_LONG = 0 << 21; // Long マニュアルが間違っているので注意 25068: private static final int M60_FSLW_SIZE_BYTE = 1 << 21; // Byte マニュアルが間違っているので注意 25069: private static final int M60_FSLW_SIZE_WORD = 2 << 21; // Word マニュアルが間違っているので注意 25070: private static final int M60_FSLW_SIZE_QUAD = 3 << 21; // Double Precision or MOVE16 25071: private static final int M60_FSLW_TRANSFER_TYPE = 3 << 19; //TT Transfer Type 25072: private static final int M60_FSLW_TT_NORMAL = 0 << 19; // Normal Access 25073: private static final int M60_FSLW_TT_MOVE16 = 1 << 19; // MOVE16 Access 25074: private static final int M60_FSLW_TT_ALTERNATE = 2 << 19; // Alternate Logical Function Code Access, Debug Access 25075: private static final int M60_FSLW_TT_ACKNOWLEDGE = 3 << 19; // Acknowledge Access, Low-Power Stop Broadcast 25076: private static final int M60_FSLW_TRANSFER_MODIFIER = 7 << 16; //TM Transfer Modifier 25077: private static final int M60_FSLW_TM_CACHE_PUSH = 0 << 16; // Data Cache Push Access 25078: private static final int M60_FSLW_TM_USER_DATA = 1 << 16; // User Data Access 25079: private static final int M60_FSLW_TM_USER_CODE = 2 << 16; // User Code Access 25080: private static final int M60_FSLW_TM_MMU_DATA = 3 << 16; // MMU Table Search Data Access 25081: private static final int M60_FSLW_TM_MMU_CODE = 4 << 16; // MMU Table Search Code Access 25082: private static final int M60_FSLW_TM_SUPER_DATA = 5 << 16; // Supervisor Data Access 25083: private static final int M60_FSLW_TM_SUPER_CODE = 6 << 16; // Supervisor Code Access 25084: private static final int M60_FSLW_TM_DATA = 1 << 16; // Data Access 25085: private static final int M60_FSLW_TM_CODE = 2 << 16; // Code Access 25086: private static final int M60_FSLW_TM_SUPERVISOR = 4 << 16; // Supervisor Access 25087: private static final int M60_FSLW_INSTRUCTION = 1 << 15; //IO Instruction or Operand 25088: private static final int M60_FSLW_IOMA_FIRST = 0 << 15 | 0 << 27; //Fault occurred on the first access of a misaligned transfer, or to the only access of an aligned transfer 25089: private static final int M60_FSLW_IOMA_SECOND = 0 << 15 | 1 << 27; //Fault occurred on the second or later access of a misaligned transfer 25090: private static final int M60_FSLW_IOMA_OPWORD = 1 << 15 | 0 << 27; //Fault occurred on an instruction opword fetch 25091: private static final int M60_FSLW_IOMA_EXWORD = 1 << 15 | 1 << 27; //Fault occurred on a fetch of an extension word 25092: private static final int M60_FSLW_PUSH_BUFFER = 1 << 14; //PBE Push Buffer Bus Error 25093: private static final int M60_FSLW_STORE_BUFFER = 1 << 13; //SBE Store Buffer Bus Error 25094: private static final int M60_FSLW_ROOT_DESCRIPTOR = 1 << 12; //PTA Pointer A Fault 25095: private static final int M60_FSLW_POINTER_DESCRIPTOR = 1 << 11; //PTB Pointer B Fault 25096: private static final int M60_FSLW_INDIRECT_LEVEL = 1 << 10; //IL Indirect Level Fault 25097: private static final int M60_FSLW_PAGE_FAULT = 1 << 9; //PF Page Fault 25098: private static final int M60_FSLW_SUPERVISOR_PROTECT = 1 << 8; //SP Supervisor Protect 25099: private static final int M60_FSLW_WRITE_PROTECT = 1 << 7; //WP Write Protect 25100: private static final int M60_FSLW_TABLE_SEARCH = 1 << 6; //TWE Bus Error on Table Search 25101: private static final int M60_FSLW_BUS_ERROR_ON_READ = 1 << 5; //RE Bus Error on Read 25102: private static final int M60_FSLW_BUS_ERROR_ON_WRITE = 1 << 4; //WE Bus Error on Write 25103: private static final int M60_FSLW_TRANSPARENT = 1 << 3; //TTR TTR Hit 25104: private static final int M60_FSLW_BRANCH_PREDICTION = 1 << 2; //BPE Branch Prediction Error 25105: private static final int M60_FSLW_SOFTWARE_EMULATION = 1 << 0; //SEE Software Emulation Error 25106: 25107: private static int m60FSLW; 25108: 25109: public static void m60BusErrorOnRead () { 25110: m60FSLW |= M60_FSLW_BUS_ERROR_ON_READ; 25111: } 25112: public static void m60BusErrorOnWrite () { 25113: m60FSLW |= M60_FSLW_BUS_ERROR_ON_WRITE; 25114: } 25115: 25116: private static final String[] M60_FSLW_TEXT_IOMA = { 25117: "IO=0,MA=0 First access of a misaligned transfer or only access of an aligned transfer", 25118: "IO=0,MA=1 Second or later access of a misaligned transfer", 25119: "IO=1,MA=0 Instruction opword fetch", 25120: "IO=1,MA=1 Fetch of an extension word", 25121: }; 25122: private static final String[] M60_FSLW_TEXT_LK = { 25123: "LK=0 Not locked", 25124: "LK=1 Locked", 25125: }; 25126: private static final String[] M60_FSLW_TEXT_RW = { 25127: "RW=0 Undefined, reserved", 25128: "RW=1 Write", 25129: "RW=2 Read", 25130: "RW=3 Read-Modify-Write", 25131: }; 25132: private static final String[] M60_FSLW_TEXT_SIZE = { 25133: "SIZE=0 Byte", 25134: "SIZE=1 Word", 25135: "SIZE=2 Long", 25136: "SIZE=3 Double precision or MOVE16", 25137: }; 25138: private static final String[] M60_FSLW_TEXT_TT = { 25139: "TT=0 Normal access", 25140: "TT=1 MOVE16 access", 25141: "TT=2 Alternate or debug access", 25142: "TT=3 Acknowledge or LPSTOP broadcast", 25143: }; 25144: private static final String[] M60_FSLW_TEXT_TM = { 25145: "TM=0 Data cache push access", 25146: "TM=1 User data or MOVE16 access", 25147: "TM=2 User code access", 25148: "TM=3 MMU table search data access", 25149: "TM=4 MMU table search code access", 25150: "TM=5 Supervisor data access", 25151: "TM=6 Supervisor code access", 25152: "TM=7 Reserved", 25153: //"TM=0 Logical function code 0", 25154: //"TM=1 Debug access", 25155: //"TM=2 Reserved", 25156: //"TM=3 Logical function code 3", 25157: //"TM=4 Logical function code 4", 25158: //"TM=5 Debug pipe control mode access", 25159: //"TM=6 Debug pipe control mode access", 25160: //"TM=7 Logical function code 7", 25161: }; 25162: private static final String[] M60_FSLW_TEXT_CAUSE = { 25163: "SEE=1 Software emulation error", //0 25164: "", //1 25165: "BPE=1 Branch prediction error", //2 25166: "TTR=1 TTR hit", //3 25167: "WE=1 Bus error on write", //4 25168: "RE=1 Bus error on read", //5 25169: "TWE=1 Bus error on table search", //6 25170: "WP=1 Write protect", //7 25171: "SP=1 Supervisor protect", //8 25172: "PF=1 Page fault", //9 25173: "IL=1 Indirect level fault", //10 25174: "PTB=1 Pointer B fault", //11 25175: "PTA=1 Pointer A fault", //12 25176: "SBE=1 Store buffer bus error", //13 25177: "PBE=1 Push buffer bus error", //14 25178: }; 25179: 25180: private static String m60ErrorToString () { 25181: StringBuilder sb = new StringBuilder (); 25182: int supervisor = m60FSLW & M60_FSLW_TM_SUPERVISOR; 25183: int instruction = m60FSLW & M60_FSLW_TM_CODE; 25184: if (0 <= M68kException.m6eNumber && M68kException.m6eNumber < M68kException.M6E_ERROR_NAME.length) { 25185: sb.append (M68kException.M6E_ERROR_NAME[M68kException.m6eNumber]); 25186: } else { 25187: sb.append ("undefined exception #").append (M68kException.m6eNumber); 25188: } 25189: XEiJ.fmtHex8 (sb.append (" at PC=$"), XEiJ.regPC0).append ("($"); 25190: int pa = mmuTranslatePeek (XEiJ.regPC0, supervisor, 1); 25191: if ((XEiJ.regPC0 ^ pa) == 1) { 25192: sb.append ("????????"); 25193: } else { 25194: XEiJ.fmtHex8 (sb, pa); 25195: } 25196: XEiJ.fmtHex4 (sb.append ("), SR=$"), XEiJ.regSRT1 | XEiJ.regSRS | XEiJ.regSRI | XEiJ.regCCR); 25197: // 111111111122222222223333333333444444444455555555556666 25198: // 0123456789012345678901234567890123456789012345678901234567890123 25199: if (0b0011011101000000000000000000000000000000000000000000000000000000L << M68kException.m6eNumber < 0L) { //FORMAT $2,$4 25200: XEiJ.fmtHex8 (sb.append ("\n Fault or effective address is EA=$"), m60Address).append ("($"); 25201: pa = mmuTranslatePeek (m60Address, supervisor, instruction); 25202: if ((m60Address ^ pa) == 1) { 25203: sb.append ("????????"); 25204: } else { 25205: XEiJ.fmtHex8 (sb, pa); 25206: } 25207: sb.append (')'); 25208: } 25209: if (M68kException.m6eNumber == M68kException.M6E_ACCESS_FAULT) { //FORMAT $4 25210: XEiJ.fmtHex8 (sb.append ("\n Fault status long word is FSLW=$"), m60FSLW); 25211: sb.append ("\n Fault was caused by:"); 25212: for (int i = 14; i >= 0; i--) { 25213: if ((m60FSLW & (1 << i)) != 0) { 25214: sb.append ("\n ").append (M60_FSLW_TEXT_CAUSE[i]); 25215: } 25216: } 25217: sb.append ("\n Fault occured on:\n ") 25218: .append (M60_FSLW_TEXT_IOMA[(m60FSLW & M60_FSLW_INSTRUCTION) >>> 15 - 1 | (m60FSLW & M60_FSLW_MISALIGNED) >>> 27]) 25219: .append ("\n ").append (M60_FSLW_TEXT_LK[(m60FSLW & M60_FSLW_LOCKED) >>> 25]) 25220: .append ("\n ").append (M60_FSLW_TEXT_RW[(m60FSLW & M60_FSLW_READ_AND_WRITE) >>> 23]) 25221: .append ("\n ").append (M60_FSLW_TEXT_SIZE[(m60FSLW & M60_FSLW_TRANSFER_SIZE) >>> 21]) 25222: .append ("\n ").append (M60_FSLW_TEXT_TT[(m60FSLW & M60_FSLW_TRANSFER_TYPE) >>> 19]) 25223: .append ("\n ").append (M60_FSLW_TEXT_TM[(m60FSLW & M60_FSLW_TRANSFER_MODIFIER) >>> 16]); 25224: } 25225: return sb.toString (); 25226: } //m60ErrorToString() 25227: 25228: 25229: 25230: } //class MC68060 25231: 25232: 25233: