MC68060.java
     1: //========================================================================================
     2: //  MC68060.java
     3: //    en:MC68060 core
     4: //    ja:MC68060コア
     5: //  Copyright (C) 2003-2025 Makoto Kamada
     6: //
     7: //  This file is part of the XEiJ (X68000 Emulator in Java).
     8: //  You can use, modify and redistribute the XEiJ if the conditions are met.
     9: //  Read the XEiJ License for more details.
    10: //  https://stdkmd.net/xeij/
    11: //========================================================================================
    12: 
    13: package xeij;
    14: 
    15: import java.lang.*;  //Boolean,Character,Class,Comparable,Double,Exception,Float,IllegalArgumentException,Integer,Long,Math,Number,Object,Runnable,SecurityException,String,StringBuilder,System
    16: import java.util.*;  //ArrayList,Arrays,Calendar,GregorianCalendar,HashMap,Map,Map.Entry,Timer,TimerTask,TreeMap
    17: 
    18: public class MC68060 {
    19: 
    20:   public static void mpuCore () {
    21: 
    22:     //例外ループ
    23:     //  別のメソッドで検出された例外を命令ループの外側でcatchすることで命令ループを高速化する
    24:   errorLoop:
    25:     while (XEiJ.mpuClockTime < XEiJ.mpuClockLimit) {
    26:       try {
    27:         //命令ループ
    28:         while (XEiJ.mpuClockTime < XEiJ.mpuClockLimit) {
    29:           int t;
    30:           //命令を実行する
    31:           m60Incremented = 0L;  //アドレスレジスタの増分
    32:           XEiJ.mpuTraceFlag = XEiJ.regSRT1;  //命令実行前のsrT1
    33:           XEiJ.mpuCycleCount = 0;  //第1オペコードからROMのアクセスウエイトを有効にする。命令のサイクル数はすべてXEiJ.mpuCycleCount+=~で加えること
    34:           XEiJ.regPC0 = t = m60Address = XEiJ.regPC;  //命令の先頭アドレス
    35:           XEiJ.regPC = t + 2;
    36:           //XEiJ.regOC = mmuReadWordZeroOpword (t, XEiJ.regSRS);  //第1オペコード。必ずゼロ拡張すること。pcに奇数が入っていることはないのでアドレスエラーのチェックを省略する
    37:           if (XEiJ.regSRS != 0) {  //スーパーバイザモード
    38:             m60FSLW = M60_FSLW_IOMA_OPWORD | M60_FSLW_RW_READ | M60_FSLW_SIZE_WORD | M60_FSLW_TM_SUPER_CODE;
    39:             t = mmuTranslateReadSuperCode (t);
    40:             XEiJ.regOC = (InstructionBreakPoint.IBP_ON ? InstructionBreakPoint.ibpOp1SuperMap : DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdRwz (t);
    41:           } else {  //ユーザモード
    42:             m60FSLW = M60_FSLW_IOMA_OPWORD | M60_FSLW_RW_READ | M60_FSLW_SIZE_WORD | M60_FSLW_TM_USER_CODE;
    43:             t = mmuTranslateReadUserCode (t);
    44:             XEiJ.regOC = (InstructionBreakPoint.IBP_ON ? InstructionBreakPoint.ibpOp1UserMap : DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdRwz (t);
    45:           }
    46: 
    47:           //命令の処理
    48:           //  第1オペコードの上位10ビットで分岐する
    49:         irpSwitch:
    50:           switch (XEiJ.regOC >>> 6) {  //第1オペコードの上位10ビット。XEiJ.regOCはゼロ拡張されているので0b1111_111_111&を省略
    51: 
    52:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
    53:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
    54:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
    55:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
    56:             //ORI.B #<data>,<ea>                              |-|012346|-|-UUUU|-**00|D M+-WXZ  |0000_000_000_mmm_rrr-{data}
    57:             //OR.B #<data>,<ea>                               |A|012346|-|-UUUU|-**00|  M+-WXZ  |0000_000_000_mmm_rrr-{data}  [ORI.B #<data>,<ea>]
    58:             //ORI.B #<data>,CCR                               |-|012346|-|*****|*****|          |0000_000_000_111_100-{data}
    59:           case 0b0000_000_000:
    60:             irpOriByte ();
    61:             break irpSwitch;
    62: 
    63:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
    64:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
    65:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
    66:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
    67:             //ORI.W #<data>,<ea>                              |-|012346|-|-UUUU|-**00|D M+-WXZ  |0000_000_001_mmm_rrr-{data}
    68:             //OR.W #<data>,<ea>                               |A|012346|-|-UUUU|-**00|  M+-WXZ  |0000_000_001_mmm_rrr-{data}  [ORI.W #<data>,<ea>]
    69:             //ORI.W #<data>,SR                                |-|012346|P|*****|*****|          |0000_000_001_111_100-{data}
    70:           case 0b0000_000_001:
    71:             irpOriWord ();
    72:             break irpSwitch;
    73: 
    74:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
    75:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
    76:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
    77:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
    78:             //ORI.L #<data>,<ea>                              |-|012346|-|-UUUU|-**00|D M+-WXZ  |0000_000_010_mmm_rrr-{data}
    79:             //OR.L #<data>,<ea>                               |A|012346|-|-UUUU|-**00|  M+-WXZ  |0000_000_010_mmm_rrr-{data}  [ORI.L #<data>,<ea>]
    80:           case 0b0000_000_010:
    81:             irpOriLong ();
    82:             break irpSwitch;
    83: 
    84:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
    85:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
    86:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
    87:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
    88:             //BITREV.L Dr                                     |-|------|-|-----|-----|D         |0000_000_011_000_rrr (ISA_C)
    89:             //CMP2.B <ea>,Rn                                  |-|--234S|-|-UUUU|-U*U*|  M  WXZP |0000_000_011_mmm_rrr-rnnn000000000000
    90:             //CHK2.B <ea>,Rn                                  |-|--234S|-|-UUUU|-U*U*|  M  WXZP |0000_000_011_mmm_rrr-rnnn100000000000
    91:           case 0b0000_000_011:
    92:             irpCmp2Chk2Byte ();
    93:             break irpSwitch;
    94: 
    95:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
    96:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
    97:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
    98:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
    99:             //BTST.L Dq,Dr                                    |-|012346|-|--U--|--*--|D         |0000_qqq_100_000_rrr
   100:             //MOVEP.W (d16,Ar),Dq                             |-|01234S|-|-----|-----|          |0000_qqq_100_001_rrr-{data}
   101:             //BTST.B Dq,<ea>                                  |-|012346|-|--U--|--*--|  M+-WXZPI|0000_qqq_100_mmm_rrr
   102:           case 0b0000_000_100:
   103:           case 0b0000_001_100:
   104:           case 0b0000_010_100:
   105:           case 0b0000_011_100:
   106:           case 0b0000_100_100:
   107:           case 0b0000_101_100:
   108:           case 0b0000_110_100:
   109:           case 0b0000_111_100:
   110:             irpBtstReg ();
   111:             break irpSwitch;
   112: 
   113:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   114:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   115:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   116:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   117:             //BCHG.L Dq,Dr                                    |-|012346|-|--U--|--*--|D         |0000_qqq_101_000_rrr
   118:             //MOVEP.L (d16,Ar),Dq                             |-|01234S|-|-----|-----|          |0000_qqq_101_001_rrr-{data}
   119:             //BCHG.B Dq,<ea>                                  |-|012346|-|--U--|--*--|  M+-WXZ  |0000_qqq_101_mmm_rrr
   120:           case 0b0000_000_101:
   121:           case 0b0000_001_101:
   122:           case 0b0000_010_101:
   123:           case 0b0000_011_101:
   124:           case 0b0000_100_101:
   125:           case 0b0000_101_101:
   126:           case 0b0000_110_101:
   127:           case 0b0000_111_101:
   128:             irpBchgReg ();
   129:             break irpSwitch;
   130: 
   131:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   132:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   133:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   134:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   135:             //BCLR.L Dq,Dr                                    |-|012346|-|--U--|--*--|D         |0000_qqq_110_000_rrr
   136:             //MOVEP.W Dq,(d16,Ar)                             |-|01234S|-|-----|-----|          |0000_qqq_110_001_rrr-{data}
   137:             //BCLR.B Dq,<ea>                                  |-|012346|-|--U--|--*--|  M+-WXZ  |0000_qqq_110_mmm_rrr
   138:           case 0b0000_000_110:
   139:           case 0b0000_001_110:
   140:           case 0b0000_010_110:
   141:           case 0b0000_011_110:
   142:           case 0b0000_100_110:
   143:           case 0b0000_101_110:
   144:           case 0b0000_110_110:
   145:           case 0b0000_111_110:
   146:             irpBclrReg ();
   147:             break irpSwitch;
   148: 
   149:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   150:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   151:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   152:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   153:             //BSET.L Dq,Dr                                    |-|012346|-|--U--|--*--|D         |0000_qqq_111_000_rrr
   154:             //MOVEP.L Dq,(d16,Ar)                             |-|01234S|-|-----|-----|          |0000_qqq_111_001_rrr-{data}
   155:             //BSET.B Dq,<ea>                                  |-|012346|-|--U--|--*--|  M+-WXZ  |0000_qqq_111_mmm_rrr
   156:           case 0b0000_000_111:
   157:           case 0b0000_001_111:
   158:           case 0b0000_010_111:
   159:           case 0b0000_011_111:
   160:           case 0b0000_100_111:
   161:           case 0b0000_101_111:
   162:           case 0b0000_110_111:
   163:           case 0b0000_111_111:
   164:             irpBsetReg ();
   165:             break irpSwitch;
   166: 
   167:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   168:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   169:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   170:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   171:             //ANDI.B #<data>,<ea>                             |-|012346|-|-UUUU|-**00|D M+-WXZ  |0000_001_000_mmm_rrr-{data}
   172:             //AND.B #<data>,<ea>                              |A|012346|-|-UUUU|-**00|  M+-WXZ  |0000_001_000_mmm_rrr-{data}  [ANDI.B #<data>,<ea>]
   173:             //ANDI.B #<data>,CCR                              |-|012346|-|*****|*****|          |0000_001_000_111_100-{data}
   174:           case 0b0000_001_000:
   175:             irpAndiByte ();
   176:             break irpSwitch;
   177: 
   178:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   179:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   180:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   181:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   182:             //ANDI.W #<data>,<ea>                             |-|012346|-|-UUUU|-**00|D M+-WXZ  |0000_001_001_mmm_rrr-{data}
   183:             //AND.W #<data>,<ea>                              |A|012346|-|-UUUU|-**00|  M+-WXZ  |0000_001_001_mmm_rrr-{data}  [ANDI.W #<data>,<ea>]
   184:             //ANDI.W #<data>,SR                               |-|012346|P|*****|*****|          |0000_001_001_111_100-{data}
   185:           case 0b0000_001_001:
   186:             irpAndiWord ();
   187:             break irpSwitch;
   188: 
   189:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   190:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   191:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   192:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   193:             //ANDI.L #<data>,<ea>                             |-|012346|-|-UUUU|-**00|D M+-WXZ  |0000_001_010_mmm_rrr-{data}
   194:             //AND.L #<data>,<ea>                              |A|012346|-|-UUUU|-**00|  M+-WXZ  |0000_001_010_mmm_rrr-{data}  [ANDI.L #<data>,<ea>]
   195:           case 0b0000_001_010:
   196:             irpAndiLong ();
   197:             break irpSwitch;
   198: 
   199:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   200:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   201:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   202:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   203:             //BYTEREV.L Dr                                    |-|------|-|-----|-----|D         |0000_001_011_000_rrr (ISA_C)
   204:             //CMP2.W <ea>,Rn                                  |-|--234S|-|-UUUU|-U*U*|  M  WXZP |0000_001_011_mmm_rrr-rnnn000000000000
   205:             //CHK2.W <ea>,Rn                                  |-|--234S|-|-UUUU|-U*U*|  M  WXZP |0000_001_011_mmm_rrr-rnnn100000000000
   206:           case 0b0000_001_011:
   207:             irpCmp2Chk2Word ();
   208:             break irpSwitch;
   209: 
   210:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   211:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   212:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   213:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   214:             //SUBI.B #<data>,<ea>                             |-|012346|-|UUUUU|*****|D M+-WXZ  |0000_010_000_mmm_rrr-{data}
   215:             //SUB.B #<data>,<ea>                              |A|012346|-|UUUUU|*****|  M+-WXZ  |0000_010_000_mmm_rrr-{data}  [SUBI.B #<data>,<ea>]
   216:           case 0b0000_010_000:
   217:             irpSubiByte ();
   218:             break irpSwitch;
   219: 
   220:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   221:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   222:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   223:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   224:             //SUBI.W #<data>,<ea>                             |-|012346|-|UUUUU|*****|D M+-WXZ  |0000_010_001_mmm_rrr-{data}
   225:             //SUB.W #<data>,<ea>                              |A|012346|-|UUUUU|*****|  M+-WXZ  |0000_010_001_mmm_rrr-{data}  [SUBI.W #<data>,<ea>]
   226:           case 0b0000_010_001:
   227:             irpSubiWord ();
   228:             break irpSwitch;
   229: 
   230:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   231:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   232:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   233:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   234:             //SUBI.L #<data>,<ea>                             |-|012346|-|UUUUU|*****|D M+-WXZ  |0000_010_010_mmm_rrr-{data}
   235:             //SUB.L #<data>,<ea>                              |A|012346|-|UUUUU|*****|  M+-WXZ  |0000_010_010_mmm_rrr-{data}  [SUBI.L #<data>,<ea>]
   236:           case 0b0000_010_010:
   237:             irpSubiLong ();
   238:             break irpSwitch;
   239: 
   240:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   241:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   242:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   243:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   244:             //FF1.L Dr                                        |-|------|-|-UUUU|-**00|D         |0000_010_011_000_rrr (ISA_C)
   245:             //CMP2.L <ea>,Rn                                  |-|--234S|-|-UUUU|-U*U*|  M  WXZP |0000_010_011_mmm_rrr-rnnn000000000000
   246:             //CHK2.L <ea>,Rn                                  |-|--234S|-|-UUUU|-U*U*|  M  WXZP |0000_010_011_mmm_rrr-rnnn100000000000
   247:           case 0b0000_010_011:
   248:             irpCmp2Chk2Long ();
   249:             break irpSwitch;
   250: 
   251:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   252:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   253:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   254:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   255:             //ADDI.B #<data>,<ea>                             |-|012346|-|UUUUU|*****|D M+-WXZ  |0000_011_000_mmm_rrr-{data}
   256:           case 0b0000_011_000:
   257:             irpAddiByte ();
   258:             break irpSwitch;
   259: 
   260:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   261:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   262:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   263:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   264:             //ADDI.W #<data>,<ea>                             |-|012346|-|UUUUU|*****|D M+-WXZ  |0000_011_001_mmm_rrr-{data}
   265:           case 0b0000_011_001:
   266:             irpAddiWord ();
   267:             break irpSwitch;
   268: 
   269:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   270:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   271:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   272:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   273:             //ADDI.L #<data>,<ea>                             |-|012346|-|UUUUU|*****|D M+-WXZ  |0000_011_010_mmm_rrr-{data}
   274:           case 0b0000_011_010:
   275:             irpAddiLong ();
   276:             break irpSwitch;
   277: 
   278:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   279:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   280:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   281:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   282:             //BTST.L #<data>,Dr                               |-|012346|-|--U--|--*--|D         |0000_100_000_000_rrr-{data}
   283:             //BTST.B #<data>,<ea>                             |-|012346|-|--U--|--*--|  M+-WXZP |0000_100_000_mmm_rrr-{data}
   284:           case 0b0000_100_000:
   285:             irpBtstImm ();
   286:             break irpSwitch;
   287: 
   288:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   289:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   290:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   291:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   292:             //BCHG.L #<data>,Dr                               |-|012346|-|--U--|--*--|D         |0000_100_001_000_rrr-{data}
   293:             //BCHG.B #<data>,<ea>                             |-|012346|-|--U--|--*--|  M+-WXZ  |0000_100_001_mmm_rrr-{data}
   294:           case 0b0000_100_001:
   295:             irpBchgImm ();
   296:             break irpSwitch;
   297: 
   298:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   299:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   300:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   301:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   302:             //BCLR.L #<data>,Dr                               |-|012346|-|--U--|--*--|D         |0000_100_010_000_rrr-{data}
   303:             //BCLR.B #<data>,<ea>                             |-|012346|-|--U--|--*--|  M+-WXZ  |0000_100_010_mmm_rrr-{data}
   304:           case 0b0000_100_010:
   305:             irpBclrImm ();
   306:             break irpSwitch;
   307: 
   308:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   309:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   310:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   311:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   312:             //BSET.L #<data>,Dr                               |-|012346|-|--U--|--*--|D         |0000_100_011_000_rrr-{data}
   313:             //BSET.B #<data>,<ea>                             |-|012346|-|--U--|--*--|  M+-WXZ  |0000_100_011_mmm_rrr-{data}
   314:           case 0b0000_100_011:
   315:             irpBsetImm ();
   316:             break irpSwitch;
   317: 
   318:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   319:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   320:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   321:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   322:             //EORI.B #<data>,<ea>                             |-|012346|-|-UUUU|-**00|D M+-WXZ  |0000_101_000_mmm_rrr-{data}
   323:             //EOR.B #<data>,<ea>                              |A|012346|-|-UUUU|-**00|D M+-WXZ  |0000_101_000_mmm_rrr-{data}  [EORI.B #<data>,<ea>]
   324:             //EORI.B #<data>,CCR                              |-|012346|-|*****|*****|          |0000_101_000_111_100-{data}
   325:           case 0b0000_101_000:
   326:             irpEoriByte ();
   327:             break irpSwitch;
   328: 
   329:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   330:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   331:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   332:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   333:             //EORI.W #<data>,<ea>                             |-|012346|-|-UUUU|-**00|D M+-WXZ  |0000_101_001_mmm_rrr-{data}
   334:             //EOR.W #<data>,<ea>                              |A|012346|-|-UUUU|-**00|D M+-WXZ  |0000_101_001_mmm_rrr-{data}  [EORI.W #<data>,<ea>]
   335:             //EORI.W #<data>,SR                               |-|012346|P|*****|*****|          |0000_101_001_111_100-{data}
   336:           case 0b0000_101_001:
   337:             irpEoriWord ();
   338:             break irpSwitch;
   339: 
   340:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   341:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   342:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   343:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   344:             //EORI.L #<data>,<ea>                             |-|012346|-|-UUUU|-**00|D M+-WXZ  |0000_101_010_mmm_rrr-{data}
   345:             //EOR.L #<data>,<ea>                              |A|012346|-|-UUUU|-**00|D M+-WXZ  |0000_101_010_mmm_rrr-{data}  [EORI.L #<data>,<ea>]
   346:           case 0b0000_101_010:
   347:             irpEoriLong ();
   348:             break irpSwitch;
   349: 
   350:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   351:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   352:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   353:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   354:             //CAS.B Dc,Du,<ea>                                |-|--2346|-|-UUUU|-****|  M+-WXZ  |0000_101_011_mmm_rrr-0000000uuu000ccc
   355:           case 0b0000_101_011:
   356:             irpCasByte ();
   357:             break irpSwitch;
   358: 
   359:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   360:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   361:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   362:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   363:             //CMPI.B #<data>,<ea>                             |-|--2346|-|-UUUU|-****|D M+-WXZP |0000_110_000_mmm_rrr-{data}
   364:             //CMP.B #<data>,<ea>                              |A|--2346|-|-UUUU|-****|  M+-WXZP |0000_110_000_mmm_rrr-{data}  [CMPI.B #<data>,<ea>]
   365:           case 0b0000_110_000:
   366:             irpCmpiByte ();
   367:             break irpSwitch;
   368: 
   369:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   370:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   371:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   372:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   373:             //CMPI.W #<data>,<ea>                             |-|--2346|-|-UUUU|-****|D M+-WXZP |0000_110_001_mmm_rrr-{data}
   374:             //CMP.W #<data>,<ea>                              |A|--2346|-|-UUUU|-****|  M+-WXZP |0000_110_001_mmm_rrr-{data}  [CMPI.W #<data>,<ea>]
   375:           case 0b0000_110_001:
   376:             irpCmpiWord ();
   377:             break irpSwitch;
   378: 
   379:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   380:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   381:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   382:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   383:             //CMPI.L #<data>,<ea>                             |-|--2346|-|-UUUU|-****|D M+-WXZP |0000_110_010_mmm_rrr-{data}
   384:             //CMP.L #<data>,<ea>                              |A|--2346|-|-UUUU|-****|  M+-WXZP |0000_110_010_mmm_rrr-{data}  [CMPI.L #<data>,<ea>]
   385:           case 0b0000_110_010:
   386:             irpCmpiLong ();
   387:             break irpSwitch;
   388: 
   389:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   390:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   391:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   392:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   393:             //CAS.W Dc,Du,<ea>                                |-|--2346|-|-UUUU|-****|  M+-WXZ  |0000_110_011_mmm_rrr-0000000uuu000ccc        (68060 software emulate misaligned <ea>)
   394:             //CAS2.W Dc1:Dc2,Du1:Du2,(Rn1):(Rn2)              |-|--234S|-|-UUUU|-****|          |0000_110_011_111_100-rnnn000uuu000ccc(1)-rnnn_000_uuu_000_ccc(2)
   395:           case 0b0000_110_011:
   396:             irpCasWord ();
   397:             break irpSwitch;
   398: 
   399:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   400:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   401:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   402:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   403:             //MOVES.B <ea>,Rn                                 |-|-12346|P|-----|-----|  M+-WXZ  |0000_111_000_mmm_rrr-rnnn000000000000
   404:             //MOVES.B Rn,<ea>                                 |-|-12346|P|-----|-----|  M+-WXZ  |0000_111_000_mmm_rrr-rnnn100000000000
   405:           case 0b0000_111_000:
   406:             irpMovesByte ();
   407:             break irpSwitch;
   408: 
   409:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   410:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   411:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   412:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   413:             //MOVES.W <ea>,Rn                                 |-|-12346|P|-----|-----|  M+-WXZ  |0000_111_001_mmm_rrr-rnnn000000000000
   414:             //MOVES.W Rn,<ea>                                 |-|-12346|P|-----|-----|  M+-WXZ  |0000_111_001_mmm_rrr-rnnn100000000000
   415:           case 0b0000_111_001:
   416:             irpMovesWord ();
   417:             break irpSwitch;
   418: 
   419:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   420:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   421:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   422:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   423:             //MOVES.L <ea>,Rn                                 |-|-12346|P|-----|-----|  M+-WXZ  |0000_111_010_mmm_rrr-rnnn000000000000
   424:             //MOVES.L Rn,<ea>                                 |-|-12346|P|-----|-----|  M+-WXZ  |0000_111_010_mmm_rrr-rnnn100000000000
   425:           case 0b0000_111_010:
   426:             irpMovesLong ();
   427:             break irpSwitch;
   428: 
   429:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   430:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   431:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   432:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   433:             //CAS.L Dc,Du,<ea>                                |-|--2346|-|-UUUU|-****|  M+-WXZ  |0000_111_011_mmm_rrr-0000000uuu000ccc        (68060 software emulate misaligned <ea>)
   434:             //CAS2.L Dc1:Dc2,Du1:Du2,(Rn1):(Rn2)              |-|--234S|-|-UUUU|-****|          |0000_111_011_111_100-rnnn000uuu000ccc(1)-rnnn_000_uuu_000_ccc(2)
   435:           case 0b0000_111_011:
   436:             irpCasLong ();
   437:             break irpSwitch;
   438: 
   439:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   440:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   441:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   442:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   443:             //MOVE.B <ea>,Dq                                  |-|012346|-|-UUUU|-**00|D M+-WXZPI|0001_qqq_000_mmm_rrr
   444:           case 0b0001_000_000:
   445:           case 0b0001_001_000:
   446:           case 0b0001_010_000:
   447:           case 0b0001_011_000:
   448:           case 0b0001_100_000:
   449:           case 0b0001_101_000:
   450:           case 0b0001_110_000:
   451:           case 0b0001_111_000:
   452:             irpMoveToDRByte ();
   453:             break irpSwitch;
   454: 
   455:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   456:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   457:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   458:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   459:             //MOVE.B <ea>,(Aq)                                |-|012346|-|-UUUU|-**00|D M+-WXZPI|0001_qqq_010_mmm_rrr
   460:           case 0b0001_000_010:
   461:           case 0b0001_001_010:
   462:           case 0b0001_010_010:
   463:           case 0b0001_011_010:
   464:           case 0b0001_100_010:
   465:           case 0b0001_101_010:
   466:           case 0b0001_110_010:
   467:           case 0b0001_111_010:
   468:             irpMoveToMMByte ();
   469:             break irpSwitch;
   470: 
   471:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   472:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   473:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   474:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   475:             //MOVE.B <ea>,(Aq)+                               |-|012346|-|-UUUU|-**00|D M+-WXZPI|0001_qqq_011_mmm_rrr
   476:           case 0b0001_000_011:
   477:           case 0b0001_001_011:
   478:           case 0b0001_010_011:
   479:           case 0b0001_011_011:
   480:           case 0b0001_100_011:
   481:           case 0b0001_101_011:
   482:           case 0b0001_110_011:
   483:           case 0b0001_111_011:
   484:             irpMoveToMPByte ();
   485:             break irpSwitch;
   486: 
   487:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   488:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   489:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   490:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   491:             //MOVE.B <ea>,-(Aq)                               |-|012346|-|-UUUU|-**00|D M+-WXZPI|0001_qqq_100_mmm_rrr
   492:           case 0b0001_000_100:
   493:           case 0b0001_001_100:
   494:           case 0b0001_010_100:
   495:           case 0b0001_011_100:
   496:           case 0b0001_100_100:
   497:           case 0b0001_101_100:
   498:           case 0b0001_110_100:
   499:           case 0b0001_111_100:
   500:             irpMoveToMNByte ();
   501:             break irpSwitch;
   502: 
   503:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   504:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   505:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   506:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   507:             //MOVE.B <ea>,(d16,Aq)                            |-|012346|-|-UUUU|-**00|D M+-WXZPI|0001_qqq_101_mmm_rrr
   508:           case 0b0001_000_101:
   509:           case 0b0001_001_101:
   510:           case 0b0001_010_101:
   511:           case 0b0001_011_101:
   512:           case 0b0001_100_101:
   513:           case 0b0001_101_101:
   514:           case 0b0001_110_101:
   515:           case 0b0001_111_101:
   516:             irpMoveToMWByte ();
   517:             break irpSwitch;
   518: 
   519:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   520:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   521:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   522:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   523:             //MOVE.B <ea>,(d8,Aq,Rn.wl)                       |-|012346|-|-UUUU|-**00|D M+-WXZPI|0001_qqq_110_mmm_rrr
   524:           case 0b0001_000_110:
   525:           case 0b0001_001_110:
   526:           case 0b0001_010_110:
   527:           case 0b0001_011_110:
   528:           case 0b0001_100_110:
   529:           case 0b0001_101_110:
   530:           case 0b0001_110_110:
   531:           case 0b0001_111_110:
   532:             irpMoveToMXByte ();
   533:             break irpSwitch;
   534: 
   535:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   536:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   537:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   538:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   539:             //MOVE.B <ea>,(xxx).W                             |-|012346|-|-UUUU|-**00|D M+-WXZPI|0001_000_111_mmm_rrr
   540:           case 0b0001_000_111:
   541:             irpMoveToZWByte ();
   542:             break irpSwitch;
   543: 
   544:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   545:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   546:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   547:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   548:             //MOVE.B <ea>,(xxx).L                             |-|012346|-|-UUUU|-**00|D M+-WXZPI|0001_001_111_mmm_rrr
   549:           case 0b0001_001_111:
   550:             irpMoveToZLByte ();
   551:             break irpSwitch;
   552: 
   553:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   554:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   555:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   556:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   557:             //MOVE.L <ea>,Dq                                  |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0010_qqq_000_mmm_rrr
   558:           case 0b0010_000_000:
   559:           case 0b0010_001_000:
   560:           case 0b0010_010_000:
   561:           case 0b0010_011_000:
   562:           case 0b0010_100_000:
   563:           case 0b0010_101_000:
   564:           case 0b0010_110_000:
   565:           case 0b0010_111_000:
   566:             irpMoveToDRLong ();
   567:             break irpSwitch;
   568: 
   569:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   570:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   571:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   572:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   573:             //MOVEA.L <ea>,Aq                                 |-|012346|-|-----|-----|DAM+-WXZPI|0010_qqq_001_mmm_rrr
   574:             //MOVE.L <ea>,Aq                                  |A|012346|-|-----|-----|DAM+-WXZPI|0010_qqq_001_mmm_rrr [MOVEA.L <ea>,Aq]
   575:           case 0b0010_000_001:
   576:           case 0b0010_001_001:
   577:           case 0b0010_010_001:
   578:           case 0b0010_011_001:
   579:           case 0b0010_100_001:
   580:           case 0b0010_101_001:
   581:           case 0b0010_110_001:
   582:           case 0b0010_111_001:
   583:             irpMoveaLong ();
   584:             break irpSwitch;
   585: 
   586:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   587:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   588:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   589:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   590:             //MOVE.L <ea>,(Aq)                                |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0010_qqq_010_mmm_rrr
   591:           case 0b0010_000_010:
   592:           case 0b0010_001_010:
   593:           case 0b0010_010_010:
   594:           case 0b0010_011_010:
   595:           case 0b0010_100_010:
   596:           case 0b0010_101_010:
   597:           case 0b0010_110_010:
   598:           case 0b0010_111_010:
   599:             irpMoveToMMLong ();
   600:             break irpSwitch;
   601: 
   602:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   603:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   604:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   605:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   606:             //MOVE.L <ea>,(Aq)+                               |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0010_qqq_011_mmm_rrr
   607:           case 0b0010_000_011:
   608:           case 0b0010_001_011:
   609:           case 0b0010_010_011:
   610:           case 0b0010_011_011:
   611:           case 0b0010_100_011:
   612:           case 0b0010_101_011:
   613:           case 0b0010_110_011:
   614:           case 0b0010_111_011:
   615:             irpMoveToMPLong ();
   616:             break irpSwitch;
   617: 
   618:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   619:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   620:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   621:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   622:             //MOVE.L <ea>,-(Aq)                               |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0010_qqq_100_mmm_rrr
   623:           case 0b0010_000_100:
   624:           case 0b0010_001_100:
   625:           case 0b0010_010_100:
   626:           case 0b0010_011_100:
   627:           case 0b0010_100_100:
   628:           case 0b0010_101_100:
   629:           case 0b0010_110_100:
   630:           case 0b0010_111_100:
   631:             irpMoveToMNLong ();
   632:             break irpSwitch;
   633: 
   634:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   635:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   636:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   637:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   638:             //MOVE.L <ea>,(d16,Aq)                            |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0010_qqq_101_mmm_rrr
   639:           case 0b0010_000_101:
   640:           case 0b0010_001_101:
   641:           case 0b0010_010_101:
   642:           case 0b0010_011_101:
   643:           case 0b0010_100_101:
   644:           case 0b0010_101_101:
   645:           case 0b0010_110_101:
   646:           case 0b0010_111_101:
   647:             irpMoveToMWLong ();
   648:             break irpSwitch;
   649: 
   650:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   651:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   652:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   653:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   654:             //MOVE.L <ea>,(d8,Aq,Rn.wl)                       |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0010_qqq_110_mmm_rrr
   655:           case 0b0010_000_110:
   656:           case 0b0010_001_110:
   657:           case 0b0010_010_110:
   658:           case 0b0010_011_110:
   659:           case 0b0010_100_110:
   660:           case 0b0010_101_110:
   661:           case 0b0010_110_110:
   662:           case 0b0010_111_110:
   663:             irpMoveToMXLong ();
   664:             break irpSwitch;
   665: 
   666:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   667:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   668:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   669:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   670:             //MOVE.L <ea>,(xxx).W                             |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0010_000_111_mmm_rrr
   671:           case 0b0010_000_111:
   672:             irpMoveToZWLong ();
   673:             break irpSwitch;
   674: 
   675:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   676:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   677:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   678:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   679:             //MOVE.L <ea>,(xxx).L                             |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0010_001_111_mmm_rrr
   680:           case 0b0010_001_111:
   681:             irpMoveToZLLong ();
   682:             break irpSwitch;
   683: 
   684:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   685:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   686:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   687:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   688:             //MOVE.W <ea>,Dq                                  |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0011_qqq_000_mmm_rrr
   689:           case 0b0011_000_000:
   690:           case 0b0011_001_000:
   691:           case 0b0011_010_000:
   692:           case 0b0011_011_000:
   693:           case 0b0011_100_000:
   694:           case 0b0011_101_000:
   695:           case 0b0011_110_000:
   696:           case 0b0011_111_000:
   697:             irpMoveToDRWord ();
   698:             break irpSwitch;
   699: 
   700:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   701:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   702:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   703:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   704:             //MOVEA.W <ea>,Aq                                 |-|012346|-|-----|-----|DAM+-WXZPI|0011_qqq_001_mmm_rrr
   705:             //MOVE.W <ea>,Aq                                  |A|012346|-|-----|-----|DAM+-WXZPI|0011_qqq_001_mmm_rrr [MOVEA.W <ea>,Aq]
   706:           case 0b0011_000_001:
   707:           case 0b0011_001_001:
   708:           case 0b0011_010_001:
   709:           case 0b0011_011_001:
   710:           case 0b0011_100_001:
   711:           case 0b0011_101_001:
   712:           case 0b0011_110_001:
   713:           case 0b0011_111_001:
   714:             irpMoveaWord ();
   715:             break irpSwitch;
   716: 
   717:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   718:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   719:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   720:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   721:             //MOVE.W <ea>,(Aq)                                |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0011_qqq_010_mmm_rrr
   722:           case 0b0011_000_010:
   723:           case 0b0011_001_010:
   724:           case 0b0011_010_010:
   725:           case 0b0011_011_010:
   726:           case 0b0011_100_010:
   727:           case 0b0011_101_010:
   728:           case 0b0011_110_010:
   729:           case 0b0011_111_010:
   730:             irpMoveToMMWord ();
   731:             break irpSwitch;
   732: 
   733:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   734:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   735:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   736:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   737:             //MOVE.W <ea>,(Aq)+                               |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0011_qqq_011_mmm_rrr
   738:           case 0b0011_000_011:
   739:           case 0b0011_001_011:
   740:           case 0b0011_010_011:
   741:           case 0b0011_011_011:
   742:           case 0b0011_100_011:
   743:           case 0b0011_101_011:
   744:           case 0b0011_110_011:
   745:           case 0b0011_111_011:
   746:             irpMoveToMPWord ();
   747:             break irpSwitch;
   748: 
   749:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   750:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   751:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   752:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   753:             //MOVE.W <ea>,-(Aq)                               |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0011_qqq_100_mmm_rrr
   754:           case 0b0011_000_100:
   755:           case 0b0011_001_100:
   756:           case 0b0011_010_100:
   757:           case 0b0011_011_100:
   758:           case 0b0011_100_100:
   759:           case 0b0011_101_100:
   760:           case 0b0011_110_100:
   761:           case 0b0011_111_100:
   762:             irpMoveToMNWord ();
   763:             break irpSwitch;
   764: 
   765:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   766:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   767:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   768:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   769:             //MOVE.W <ea>,(d16,Aq)                            |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0011_qqq_101_mmm_rrr
   770:           case 0b0011_000_101:
   771:           case 0b0011_001_101:
   772:           case 0b0011_010_101:
   773:           case 0b0011_011_101:
   774:           case 0b0011_100_101:
   775:           case 0b0011_101_101:
   776:           case 0b0011_110_101:
   777:           case 0b0011_111_101:
   778:             irpMoveToMWWord ();
   779:             break irpSwitch;
   780: 
   781:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   782:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   783:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   784:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   785:             //MOVE.W <ea>,(d8,Aq,Rn.wl)                       |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0011_qqq_110_mmm_rrr
   786:           case 0b0011_000_110:
   787:           case 0b0011_001_110:
   788:           case 0b0011_010_110:
   789:           case 0b0011_011_110:
   790:           case 0b0011_100_110:
   791:           case 0b0011_101_110:
   792:           case 0b0011_110_110:
   793:           case 0b0011_111_110:
   794:             irpMoveToMXWord ();
   795:             break irpSwitch;
   796: 
   797:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   798:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   799:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   800:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   801:             //MOVE.W <ea>,(xxx).W                             |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0011_000_111_mmm_rrr
   802:           case 0b0011_000_111:
   803:             irpMoveToZWWord ();
   804:             break irpSwitch;
   805: 
   806:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   807:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   808:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   809:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   810:             //MOVE.W <ea>,(xxx).L                             |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0011_001_111_mmm_rrr
   811:           case 0b0011_001_111:
   812:             irpMoveToZLWord ();
   813:             break irpSwitch;
   814: 
   815:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   816:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   817:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   818:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   819:             //NEGX.B <ea>                                     |-|012346|-|*UUUU|*****|D M+-WXZ  |0100_000_000_mmm_rrr
   820:           case 0b0100_000_000:
   821:             irpNegxByte ();
   822:             break irpSwitch;
   823: 
   824:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   825:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   826:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   827:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   828:             //NEGX.W <ea>                                     |-|012346|-|*UUUU|*****|D M+-WXZ  |0100_000_001_mmm_rrr
   829:           case 0b0100_000_001:
   830:             irpNegxWord ();
   831:             break irpSwitch;
   832: 
   833:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   834:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   835:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   836:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   837:             //NEGX.L <ea>                                     |-|012346|-|*UUUU|*****|D M+-WXZ  |0100_000_010_mmm_rrr
   838:           case 0b0100_000_010:
   839:             irpNegxLong ();
   840:             break irpSwitch;
   841: 
   842:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   843:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   844:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   845:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   846:             //MOVE.W SR,<ea>                                  |-|-12346|P|*****|-----|D M+-WXZ  |0100_000_011_mmm_rrr
   847:           case 0b0100_000_011:
   848:             irpMoveFromSR ();
   849:             break irpSwitch;
   850: 
   851:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   852:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   853:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   854:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   855:             //CHK.L <ea>,Dq                                   |-|--2346|-|-UUUU|-*UUU|D M+-WXZPI|0100_qqq_100_mmm_rrr
   856:           case 0b0100_000_100:
   857:           case 0b0100_001_100:
   858:           case 0b0100_010_100:
   859:           case 0b0100_011_100:
   860:           case 0b0100_100_100:
   861:           case 0b0100_101_100:
   862:           case 0b0100_110_100:
   863:           case 0b0100_111_100:
   864:             irpChkLong ();
   865:             break irpSwitch;
   866: 
   867:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   868:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   869:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   870:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   871:             //CHK.W <ea>,Dq                                   |-|012346|-|-UUUU|-*UUU|D M+-WXZPI|0100_qqq_110_mmm_rrr
   872:           case 0b0100_000_110:
   873:           case 0b0100_001_110:
   874:           case 0b0100_010_110:
   875:           case 0b0100_011_110:
   876:           case 0b0100_100_110:
   877:           case 0b0100_101_110:
   878:           case 0b0100_110_110:
   879:           case 0b0100_111_110:
   880:             irpChkWord ();
   881:             break irpSwitch;
   882: 
   883:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   884:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   885:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   886:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   887:             //LEA.L <ea>,Aq                                   |-|012346|-|-----|-----|  M  WXZP |0100_qqq_111_mmm_rrr
   888:             //EXTB.L Dr                                       |-|--2346|-|-UUUU|-**00|D         |0100_100_111_000_rrr
   889:           case 0b0100_000_111:
   890:           case 0b0100_001_111:
   891:           case 0b0100_010_111:
   892:           case 0b0100_011_111:
   893:           case 0b0100_100_111:
   894:           case 0b0100_101_111:
   895:           case 0b0100_110_111:
   896:           case 0b0100_111_111:
   897:             irpLea ();
   898:             break irpSwitch;
   899: 
   900:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   901:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   902:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   903:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   904:             //CLR.B <ea>                                      |-|012346|-|-UUUU|-0100|D M+-WXZ  |0100_001_000_mmm_rrr (68000 and 68008 read before clear)
   905:           case 0b0100_001_000:
   906:             irpClrByte ();
   907:             break irpSwitch;
   908: 
   909:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   910:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   911:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   912:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   913:             //CLR.W <ea>                                      |-|012346|-|-UUUU|-0100|D M+-WXZ  |0100_001_001_mmm_rrr (68000 and 68008 read before clear)
   914:           case 0b0100_001_001:
   915:             irpClrWord ();
   916:             break irpSwitch;
   917: 
   918:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   919:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   920:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   921:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   922:             //CLR.L <ea>                                      |-|012346|-|-UUUU|-0100|D M+-WXZ  |0100_001_010_mmm_rrr (68000 and 68008 read before clear)
   923:           case 0b0100_001_010:
   924:             irpClrLong ();
   925:             break irpSwitch;
   926: 
   927:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   928:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   929:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   930:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   931:             //MOVE.W CCR,<ea>                                 |-|-12346|-|*****|-----|D M+-WXZ  |0100_001_011_mmm_rrr
   932:           case 0b0100_001_011:
   933:             irpMoveFromCCR ();
   934:             break irpSwitch;
   935: 
   936:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   937:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   938:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   939:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   940:             //NEG.B <ea>                                      |-|012346|-|UUUUU|*****|D M+-WXZ  |0100_010_000_mmm_rrr
   941:           case 0b0100_010_000:
   942:             irpNegByte ();
   943:             break irpSwitch;
   944: 
   945:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   946:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   947:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   948:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   949:             //NEG.W <ea>                                      |-|012346|-|UUUUU|*****|D M+-WXZ  |0100_010_001_mmm_rrr
   950:           case 0b0100_010_001:
   951:             irpNegWord ();
   952:             break irpSwitch;
   953: 
   954:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   955:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   956:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   957:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   958:             //NEG.L <ea>                                      |-|012346|-|UUUUU|*****|D M+-WXZ  |0100_010_010_mmm_rrr
   959:           case 0b0100_010_010:
   960:             irpNegLong ();
   961:             break irpSwitch;
   962: 
   963:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   964:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   965:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   966:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   967:             //MOVE.W <ea>,CCR                                 |-|012346|-|UUUUU|*****|D M+-WXZPI|0100_010_011_mmm_rrr
   968:           case 0b0100_010_011:
   969:             irpMoveToCCR ();
   970:             break irpSwitch;
   971: 
   972:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   973:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   974:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   975:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   976:             //NOT.B <ea>                                      |-|012346|-|-UUUU|-**00|D M+-WXZ  |0100_011_000_mmm_rrr
   977:           case 0b0100_011_000:
   978:             irpNotByte ();
   979:             break irpSwitch;
   980: 
   981:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   982:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   983:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   984:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   985:             //NOT.W <ea>                                      |-|012346|-|-UUUU|-**00|D M+-WXZ  |0100_011_001_mmm_rrr
   986:           case 0b0100_011_001:
   987:             irpNotWord ();
   988:             break irpSwitch;
   989: 
   990:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   991:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   992:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   993:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   994:             //NOT.L <ea>                                      |-|012346|-|-UUUU|-**00|D M+-WXZ  |0100_011_010_mmm_rrr
   995:           case 0b0100_011_010:
   996:             irpNotLong ();
   997:             break irpSwitch;
   998: 
   999:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1000:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1001:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1002:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1003:             //MOVE.W <ea>,SR                                  |-|012346|P|UUUUU|*****|D M+-WXZPI|0100_011_011_mmm_rrr
  1004:           case 0b0100_011_011:
  1005:             irpMoveToSR ();
  1006:             break irpSwitch;
  1007: 
  1008:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1009:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1010:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1011:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1012:             //NBCD.B <ea>                                     |-|012346|-|UUUUU|*U*U*|D M+-WXZ  |0100_100_000_mmm_rrr
  1013:             //LINK.L Ar,#<data>                               |-|--2346|-|-----|-----|          |0100_100_000_001_rrr-{data}
  1014:           case 0b0100_100_000:
  1015:             irpNbcd ();
  1016:             break irpSwitch;
  1017: 
  1018:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1019:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1020:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1021:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1022:             //SWAP.W Dr                                       |-|012346|-|-UUUU|-**00|D         |0100_100_001_000_rrr
  1023:             //BKPT #<data>                                    |-|-12346|-|-----|-----|          |0100_100_001_001_ddd
  1024:             //PEA.L <ea>                                      |-|012346|-|-----|-----|  M  WXZP |0100_100_001_mmm_rrr
  1025:           case 0b0100_100_001:
  1026:             irpPea ();
  1027:             break irpSwitch;
  1028: 
  1029:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1030:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1031:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1032:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1033:             //EXT.W Dr                                        |-|012346|-|-UUUU|-**00|D         |0100_100_010_000_rrr
  1034:             //MOVEM.W <list>,<ea>                             |-|012346|-|-----|-----|  M -WXZ  |0100_100_010_mmm_rrr-llllllllllllllll
  1035:           case 0b0100_100_010:
  1036:             irpMovemToMemWord ();
  1037:             break irpSwitch;
  1038: 
  1039:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1040:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1041:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1042:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1043:             //EXT.L Dr                                        |-|012346|-|-UUUU|-**00|D         |0100_100_011_000_rrr
  1044:             //MOVEM.L <list>,<ea>                             |-|012346|-|-----|-----|  M -WXZ  |0100_100_011_mmm_rrr-llllllllllllllll
  1045:           case 0b0100_100_011:
  1046:             irpMovemToMemLong ();
  1047:             break irpSwitch;
  1048: 
  1049:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1050:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1051:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1052:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1053:             //TST.B <ea>                                      |-|012346|-|-UUUU|-**00|D M+-WXZ  |0100_101_000_mmm_rrr
  1054:             //TST.B <ea>                                      |-|--2346|-|-UUUU|-**00|        PI|0100_101_000_mmm_rrr
  1055:           case 0b0100_101_000:
  1056:             irpTstByte ();
  1057:             break irpSwitch;
  1058: 
  1059:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1060:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1061:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1062:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1063:             //TST.W <ea>                                      |-|012346|-|-UUUU|-**00|D M+-WXZ  |0100_101_001_mmm_rrr
  1064:             //TST.W <ea>                                      |-|--2346|-|-UUUU|-**00| A      PI|0100_101_001_mmm_rrr
  1065:           case 0b0100_101_001:
  1066:             irpTstWord ();
  1067:             break irpSwitch;
  1068: 
  1069:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1070:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1071:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1072:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1073:             //TST.L <ea>                                      |-|012346|-|-UUUU|-**00|D M+-WXZ  |0100_101_010_mmm_rrr
  1074:             //TST.L <ea>                                      |-|--2346|-|-UUUU|-**00| A      PI|0100_101_010_mmm_rrr
  1075:           case 0b0100_101_010:
  1076:             irpTstLong ();
  1077:             break irpSwitch;
  1078: 
  1079:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1080:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1081:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1082:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1083:             //TAS.B <ea>                                      |-|012346|-|-UUUU|-**00|D M+-WXZ  |0100_101_011_mmm_rrr
  1084:             //ILLEGAL                                         |-|012346|-|-----|-----|          |0100_101_011_111_100
  1085:           case 0b0100_101_011:
  1086:             irpTas ();
  1087:             break irpSwitch;
  1088: 
  1089:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1090:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1091:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1092:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1093:             //MULU.L <ea>,Dl                                  |-|--2346|-|-UUUU|-***0|D M+-WXZPI|0100_110_000_mmm_rrr-0lll000000000hhh        (h is not used)
  1094:             //MULU.L <ea>,Dh:Dl                               |-|--234S|-|-UUUU|-***0|D M+-WXZPI|0100_110_000_mmm_rrr-0lll010000000hhh        (if h=l then result is not defined)
  1095:             //MULS.L <ea>,Dl                                  |-|--2346|-|-UUUU|-***0|D M+-WXZPI|0100_110_000_mmm_rrr-0lll100000000hhh        (h is not used)
  1096:             //MULS.L <ea>,Dh:Dl                               |-|--234S|-|-UUUU|-***0|D M+-WXZPI|0100_110_000_mmm_rrr-0lll110000000hhh        (if h=l then result is not defined)
  1097:           case 0b0100_110_000:
  1098:             irpMuluMulsLong ();
  1099:             break irpSwitch;
  1100: 
  1101:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1102:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1103:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1104:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1105:             //DIVU.L <ea>,Dq                                  |-|--2346|-|-UUUU|-***0|D M+-WXZPI|0100_110_001_mmm_rrr-0qqq000000000qqq
  1106:             //DIVUL.L <ea>,Dr:Dq                              |-|--2346|-|-UUUU|-***0|D M+-WXZPI|0100_110_001_mmm_rrr-0qqq000000000rrr        (q is not equal to r)
  1107:             //DIVU.L <ea>,Dr:Dq                               |-|--234S|-|-UUUU|-***0|D M+-WXZPI|0100_110_001_mmm_rrr-0qqq010000000rrr        (q is not equal to r)
  1108:             //DIVS.L <ea>,Dq                                  |-|--2346|-|-UUUU|-***0|D M+-WXZPI|0100_110_001_mmm_rrr-0qqq100000000qqq
  1109:             //DIVSL.L <ea>,Dr:Dq                              |-|--2346|-|-UUUU|-***0|D M+-WXZPI|0100_110_001_mmm_rrr-0qqq100000000rrr        (q is not equal to r)
  1110:             //DIVS.L <ea>,Dr:Dq                               |-|--234S|-|-UUUU|-***0|D M+-WXZPI|0100_110_001_mmm_rrr-0qqq110000000rrr        (q is not equal to r)
  1111:           case 0b0100_110_001:
  1112:             irpDivuDivsLong ();
  1113:             break irpSwitch;
  1114: 
  1115:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1116:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1117:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1118:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1119:             //SATS.L Dr                                       |-|------|-|-UUUU|-**00|D         |0100_110_010_000_rrr (ISA_B)
  1120:             //MOVEM.W <ea>,<list>                             |-|012346|-|-----|-----|  M+ WXZP |0100_110_010_mmm_rrr-llllllllllllllll
  1121:           case 0b0100_110_010:
  1122:             irpMovemToRegWord ();
  1123:             break irpSwitch;
  1124: 
  1125:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1126:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1127:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1128:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1129:             //MOVEM.L <ea>,<list>                             |-|012346|-|-----|-----|  M+ WXZP |0100_110_011_mmm_rrr-llllllllllllllll
  1130:           case 0b0100_110_011:
  1131:             irpMovemToRegLong ();
  1132:             break irpSwitch;
  1133: 
  1134:           case 0b0100_111_001:
  1135:             switch (XEiJ.regOC & 0b111_111) {
  1136: 
  1137:               //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1138:               //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1139:               //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1140:               //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1141:               //TRAP #<vector>                                  |-|012346|-|-----|-----|          |0100_111_001_00v_vvv
  1142:             case 0b000_000:
  1143:             case 0b000_001:
  1144:             case 0b000_010:
  1145:             case 0b000_011:
  1146:             case 0b000_100:
  1147:             case 0b000_101:
  1148:             case 0b000_110:
  1149:             case 0b000_111:
  1150:             case 0b001_000:
  1151:             case 0b001_001:
  1152:             case 0b001_010:
  1153:             case 0b001_011:
  1154:             case 0b001_100:
  1155:             case 0b001_101:
  1156:             case 0b001_110:
  1157:               irpTrap ();
  1158:               break irpSwitch;
  1159:             case 0b001_111:
  1160:               irpTrap15 ();
  1161:               break irpSwitch;
  1162: 
  1163:               //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1164:               //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1165:               //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1166:               //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1167:               //LINK.W Ar,#<data>                               |-|012346|-|-----|-----|          |0100_111_001_010_rrr-{data}
  1168:             case 0b010_000:
  1169:             case 0b010_001:
  1170:             case 0b010_010:
  1171:             case 0b010_011:
  1172:             case 0b010_100:
  1173:             case 0b010_101:
  1174:             case 0b010_110:
  1175:             case 0b010_111:
  1176:               irpLinkWord ();
  1177:               break irpSwitch;
  1178: 
  1179:               //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1180:               //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1181:               //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1182:               //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1183:               //UNLK Ar                                         |-|012346|-|-----|-----|          |0100_111_001_011_rrr
  1184:             case 0b011_000:
  1185:             case 0b011_001:
  1186:             case 0b011_010:
  1187:             case 0b011_011:
  1188:             case 0b011_100:
  1189:             case 0b011_101:
  1190:             case 0b011_110:
  1191:             case 0b011_111:
  1192:               irpUnlk ();
  1193:               break irpSwitch;
  1194: 
  1195:               //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1196:               //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1197:               //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1198:               //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1199:               //MOVE.L Ar,USP                                   |-|012346|P|-----|-----|          |0100_111_001_100_rrr
  1200:             case 0b100_000:
  1201:             case 0b100_001:
  1202:             case 0b100_010:
  1203:             case 0b100_011:
  1204:             case 0b100_100:
  1205:             case 0b100_101:
  1206:             case 0b100_110:
  1207:             case 0b100_111:
  1208:               irpMoveToUsp ();
  1209:               break irpSwitch;
  1210: 
  1211:               //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1212:               //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1213:               //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1214:               //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1215:               //MOVE.L USP,Ar                                   |-|012346|P|-----|-----|          |0100_111_001_101_rrr
  1216:             case 0b101_000:
  1217:             case 0b101_001:
  1218:             case 0b101_010:
  1219:             case 0b101_011:
  1220:             case 0b101_100:
  1221:             case 0b101_101:
  1222:             case 0b101_110:
  1223:             case 0b101_111:
  1224:               irpMoveFromUsp ();
  1225:               break irpSwitch;
  1226: 
  1227:               //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1228:               //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1229:               //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1230:               //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1231:               //RESET                                           |-|012346|P|-----|-----|          |0100_111_001_110_000
  1232:             case 0b110_000:
  1233:               irpReset ();
  1234:               break irpSwitch;
  1235: 
  1236:               //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1237:               //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1238:               //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1239:               //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1240:               //NOP                                             |-|012346|-|-----|-----|          |0100_111_001_110_001
  1241:             case 0b110_001:
  1242:               irpNop ();
  1243:               break irpSwitch;
  1244: 
  1245:               //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1246:               //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1247:               //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1248:               //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1249:               //STOP #<data>                                    |-|012346|P|UUUUU|*****|          |0100_111_001_110_010-{data}
  1250:             case 0b110_010:
  1251:               irpStop ();
  1252:               break irpSwitch;
  1253: 
  1254:               //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1255:               //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1256:               //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1257:               //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1258:               //RTE                                             |-|012346|P|UUUUU|*****|          |0100_111_001_110_011
  1259:             case 0b110_011:
  1260:               irpRte ();
  1261:               break irpSwitch;
  1262: 
  1263:               //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1264:               //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1265:               //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1266:               //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1267:               //RTD #<data>                                     |-|-12346|-|-----|-----|          |0100_111_001_110_100-{data}
  1268:             case 0b110_100:
  1269:               irpRtd ();
  1270:               break irpSwitch;
  1271: 
  1272:               //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1273:               //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1274:               //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1275:               //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1276:               //RTS                                             |-|012346|-|-----|-----|          |0100_111_001_110_101
  1277:             case 0b110_101:
  1278:               irpRts ();
  1279:               break irpSwitch;
  1280: 
  1281:               //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1282:               //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1283:               //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1284:               //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1285:               //TRAPV                                           |-|012346|-|---*-|-----|          |0100_111_001_110_110
  1286:             case 0b110_110:
  1287:               irpTrapv ();
  1288:               break irpSwitch;
  1289: 
  1290:               //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1291:               //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1292:               //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1293:               //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1294:               //RTR                                             |-|012346|-|UUUUU|*****|          |0100_111_001_110_111
  1295:             case 0b110_111:
  1296:               irpRtr ();
  1297:               break irpSwitch;
  1298: 
  1299:               //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1300:               //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1301:               //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1302:               //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1303:               //MOVEC.L Rc,Rn                                   |-|-12346|P|-----|-----|          |0100_111_001_111_010-rnnncccccccccccc
  1304:             case 0b111_010:
  1305:               irpMovecFromControl ();
  1306:               break irpSwitch;
  1307: 
  1308:               //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1309:               //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1310:               //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1311:               //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1312:               //MOVEC.L Rn,Rc                                   |-|-12346|P|-----|-----|          |0100_111_001_111_011-rnnncccccccccccc
  1313:             case 0b111_011:
  1314:               irpMovecToControl ();
  1315:               break irpSwitch;
  1316: 
  1317:             default:
  1318:               irpIllegal ();
  1319: 
  1320:             }  //switch XEiJ.regOC & 0b111_111
  1321:             break irpSwitch;
  1322: 
  1323:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1324:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1325:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1326:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1327:             //JSR <ea>                                        |-|012346|-|-----|-----|  M  WXZP |0100_111_010_mmm_rrr
  1328:             //JBSR.L <label>                                  |A|012346|-|-----|-----|          |0100_111_010_111_001-{address}       [JSR <label>]
  1329:           case 0b0100_111_010:
  1330:             irpJsr ();
  1331:             break irpSwitch;
  1332: 
  1333:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1334:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1335:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1336:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1337:             //JMP <ea>                                        |-|012346|-|-----|-----|  M  WXZP |0100_111_011_mmm_rrr
  1338:             //JBRA.L <label>                                  |A|012346|-|-----|-----|          |0100_111_011_111_001-{address}       [JMP <label>]
  1339:           case 0b0100_111_011:
  1340:             irpJmp ();
  1341:             break irpSwitch;
  1342: 
  1343:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1344:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1345:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1346:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1347:             //ADDQ.B #<data>,<ea>                             |-|012346|-|UUUUU|*****|D M+-WXZ  |0101_qqq_000_mmm_rrr
  1348:             //INC.B <ea>                                      |A|012346|-|UUUUU|*****|D M+-WXZ  |0101_001_000_mmm_rrr [ADDQ.B #1,<ea>]
  1349:           case 0b0101_000_000:
  1350:           case 0b0101_001_000:
  1351:           case 0b0101_010_000:
  1352:           case 0b0101_011_000:
  1353:           case 0b0101_100_000:
  1354:           case 0b0101_101_000:
  1355:           case 0b0101_110_000:
  1356:           case 0b0101_111_000:
  1357:             irpAddqByte ();
  1358:             break irpSwitch;
  1359: 
  1360:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1361:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1362:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1363:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1364:             //ADDQ.W #<data>,<ea>                             |-|012346|-|UUUUU|*****|D M+-WXZ  |0101_qqq_001_mmm_rrr
  1365:             //ADDQ.W #<data>,Ar                               |-|012346|-|-----|-----| A        |0101_qqq_001_001_rrr
  1366:             //INC.W <ea>                                      |A|012346|-|UUUUU|*****|D M+-WXZ  |0101_001_001_mmm_rrr [ADDQ.W #1,<ea>]
  1367:             //INC.W Ar                                        |A|012346|-|-----|-----| A        |0101_001_001_001_rrr [ADDQ.W #1,Ar]
  1368:           case 0b0101_000_001:
  1369:           case 0b0101_001_001:
  1370:           case 0b0101_010_001:
  1371:           case 0b0101_011_001:
  1372:           case 0b0101_100_001:
  1373:           case 0b0101_101_001:
  1374:           case 0b0101_110_001:
  1375:           case 0b0101_111_001:
  1376:             irpAddqWord ();
  1377:             break irpSwitch;
  1378: 
  1379:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1380:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1381:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1382:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1383:             //ADDQ.L #<data>,<ea>                             |-|012346|-|UUUUU|*****|D M+-WXZ  |0101_qqq_010_mmm_rrr
  1384:             //ADDQ.L #<data>,Ar                               |-|012346|-|-----|-----| A        |0101_qqq_010_001_rrr
  1385:             //INC.L <ea>                                      |A|012346|-|UUUUU|*****|D M+-WXZ  |0101_001_010_mmm_rrr [ADDQ.L #1,<ea>]
  1386:             //INC.L Ar                                        |A|012346|-|-----|-----| A        |0101_001_010_001_rrr [ADDQ.L #1,Ar]
  1387:           case 0b0101_000_010:
  1388:           case 0b0101_001_010:
  1389:           case 0b0101_010_010:
  1390:           case 0b0101_011_010:
  1391:           case 0b0101_100_010:
  1392:           case 0b0101_101_010:
  1393:           case 0b0101_110_010:
  1394:           case 0b0101_111_010:
  1395:             irpAddqLong ();
  1396:             break irpSwitch;
  1397: 
  1398:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1399:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1400:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1401:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1402:             //ST.B <ea>                                       |-|012346|-|-----|-----|D M+-WXZ  |0101_000_011_mmm_rrr
  1403:             //SNF.B <ea>                                      |A|012346|-|-----|-----|D M+-WXZ  |0101_000_011_mmm_rrr [ST.B <ea>]
  1404:             //DBT.W Dr,<label>                                |-|012346|-|-----|-----|          |0101_000_011_001_rrr-{offset}
  1405:             //DBNF.W Dr,<label>                               |A|012346|-|-----|-----|          |0101_000_011_001_rrr-{offset}        [DBT.W Dr,<label>]
  1406:             //TRAPT.W #<data>                                 |-|--2346|-|-----|-----|          |0101_000_011_111_010-{data}
  1407:             //TPNF.W #<data>                                  |A|--2346|-|-----|-----|          |0101_000_011_111_010-{data}  [TRAPT.W #<data>]
  1408:             //TPT.W #<data>                                   |A|--2346|-|-----|-----|          |0101_000_011_111_010-{data}  [TRAPT.W #<data>]
  1409:             //TRAPNF.W #<data>                                |A|--2346|-|-----|-----|          |0101_000_011_111_010-{data}  [TRAPT.W #<data>]
  1410:             //TRAPT.L #<data>                                 |-|--2346|-|-----|-----|          |0101_000_011_111_011-{data}
  1411:             //TPNF.L #<data>                                  |A|--2346|-|-----|-----|          |0101_000_011_111_011-{data}  [TRAPT.L #<data>]
  1412:             //TPT.L #<data>                                   |A|--2346|-|-----|-----|          |0101_000_011_111_011-{data}  [TRAPT.L #<data>]
  1413:             //TRAPNF.L #<data>                                |A|--2346|-|-----|-----|          |0101_000_011_111_011-{data}  [TRAPT.L #<data>]
  1414:             //TRAPT                                           |-|--2346|-|-----|-----|          |0101_000_011_111_100
  1415:             //TPNF                                            |A|--2346|-|-----|-----|          |0101_000_011_111_100 [TRAPT]
  1416:             //TPT                                             |A|--2346|-|-----|-----|          |0101_000_011_111_100 [TRAPT]
  1417:             //TRAPNF                                          |A|--2346|-|-----|-----|          |0101_000_011_111_100 [TRAPT]
  1418:           case 0b0101_000_011:
  1419:             irpSt ();
  1420:             break irpSwitch;
  1421: 
  1422:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1423:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1424:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1425:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1426:             //SUBQ.B #<data>,<ea>                             |-|012346|-|UUUUU|*****|D M+-WXZ  |0101_qqq_100_mmm_rrr
  1427:             //DEC.B <ea>                                      |A|012346|-|UUUUU|*****|D M+-WXZ  |0101_001_100_mmm_rrr [SUBQ.B #1,<ea>]
  1428:           case 0b0101_000_100:
  1429:           case 0b0101_001_100:
  1430:           case 0b0101_010_100:
  1431:           case 0b0101_011_100:
  1432:           case 0b0101_100_100:
  1433:           case 0b0101_101_100:
  1434:           case 0b0101_110_100:
  1435:           case 0b0101_111_100:
  1436:             irpSubqByte ();
  1437:             break irpSwitch;
  1438: 
  1439:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1440:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1441:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1442:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1443:             //SUBQ.W #<data>,<ea>                             |-|012346|-|UUUUU|*****|D M+-WXZ  |0101_qqq_101_mmm_rrr
  1444:             //SUBQ.W #<data>,Ar                               |-|012346|-|-----|-----| A        |0101_qqq_101_001_rrr
  1445:             //DEC.W <ea>                                      |A|012346|-|UUUUU|*****|D M+-WXZ  |0101_001_101_mmm_rrr [SUBQ.W #1,<ea>]
  1446:             //DEC.W Ar                                        |A|012346|-|-----|-----| A        |0101_001_101_001_rrr [SUBQ.W #1,Ar]
  1447:           case 0b0101_000_101:
  1448:           case 0b0101_001_101:
  1449:           case 0b0101_010_101:
  1450:           case 0b0101_011_101:
  1451:           case 0b0101_100_101:
  1452:           case 0b0101_101_101:
  1453:           case 0b0101_110_101:
  1454:           case 0b0101_111_101:
  1455:             irpSubqWord ();
  1456:             break irpSwitch;
  1457: 
  1458:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1459:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1460:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1461:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1462:             //SUBQ.L #<data>,<ea>                             |-|012346|-|UUUUU|*****|D M+-WXZ  |0101_qqq_110_mmm_rrr
  1463:             //SUBQ.L #<data>,Ar                               |-|012346|-|-----|-----| A        |0101_qqq_110_001_rrr
  1464:             //DEC.L <ea>                                      |A|012346|-|UUUUU|*****|D M+-WXZ  |0101_001_110_mmm_rrr [SUBQ.L #1,<ea>]
  1465:             //DEC.L Ar                                        |A|012346|-|-----|-----| A        |0101_001_110_001_rrr [SUBQ.L #1,Ar]
  1466:           case 0b0101_000_110:
  1467:           case 0b0101_001_110:
  1468:           case 0b0101_010_110:
  1469:           case 0b0101_011_110:
  1470:           case 0b0101_100_110:
  1471:           case 0b0101_101_110:
  1472:           case 0b0101_110_110:
  1473:           case 0b0101_111_110:
  1474:             irpSubqLong ();
  1475:             break irpSwitch;
  1476: 
  1477:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1478:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1479:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1480:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1481:             //SF.B <ea>                                       |-|012346|-|-----|-----|D M+-WXZ  |0101_000_111_mmm_rrr
  1482:             //SNT.B <ea>                                      |A|012346|-|-----|-----|D M+-WXZ  |0101_000_111_mmm_rrr [SF.B <ea>]
  1483:             //DBF.W Dr,<label>                                |-|012346|-|-----|-----|          |0101_000_111_001_rrr-{offset}
  1484:             //DBNT.W Dr,<label>                               |A|012346|-|-----|-----|          |0101_000_111_001_rrr-{offset}        [DBF.W Dr,<label>]
  1485:             //DBRA.W Dr,<label>                               |A|012346|-|-----|-----|          |0101_000_111_001_rrr-{offset}        [DBF.W Dr,<label>]
  1486:             //TRAPF.W #<data>                                 |-|--2346|-|-----|-----|          |0101_000_111_111_010-{data}
  1487:             //TPF.W #<data>                                   |A|--2346|-|-----|-----|          |0101_000_111_111_010-{data}  [TRAPF.W #<data>]
  1488:             //TPNT.W #<data>                                  |A|--2346|-|-----|-----|          |0101_000_111_111_010-{data}  [TRAPF.W #<data>]
  1489:             //TRAPNT.W #<data>                                |A|--2346|-|-----|-----|          |0101_000_111_111_010-{data}  [TRAPF.W #<data>]
  1490:             //TRAPF.L #<data>                                 |-|--2346|-|-----|-----|          |0101_000_111_111_011-{data}
  1491:             //TPF.L #<data>                                   |A|--2346|-|-----|-----|          |0101_000_111_111_011-{data}  [TRAPF.L #<data>]
  1492:             //TPNT.L #<data>                                  |A|--2346|-|-----|-----|          |0101_000_111_111_011-{data}  [TRAPF.L #<data>]
  1493:             //TRAPNT.L #<data>                                |A|--2346|-|-----|-----|          |0101_000_111_111_011-{data}  [TRAPF.L #<data>]
  1494:             //TRAPF                                           |-|--2346|-|-----|-----|          |0101_000_111_111_100
  1495:             //TPF                                             |A|--2346|-|-----|-----|          |0101_000_111_111_100 [TRAPF]
  1496:             //TPNT                                            |A|--2346|-|-----|-----|          |0101_000_111_111_100 [TRAPF]
  1497:             //TRAPNT                                          |A|--2346|-|-----|-----|          |0101_000_111_111_100 [TRAPF]
  1498:           case 0b0101_000_111:
  1499:             irpSf ();
  1500:             break irpSwitch;
  1501: 
  1502:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1503:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1504:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1505:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1506:             //SHI.B <ea>                                      |-|012346|-|--*-*|-----|D M+-WXZ  |0101_001_011_mmm_rrr
  1507:             //SNLS.B <ea>                                     |A|012346|-|--*-*|-----|D M+-WXZ  |0101_001_011_mmm_rrr [SHI.B <ea>]
  1508:             //DBHI.W Dr,<label>                               |-|012346|-|--*-*|-----|          |0101_001_011_001_rrr-{offset}
  1509:             //DBNLS.W Dr,<label>                              |A|012346|-|--*-*|-----|          |0101_001_011_001_rrr-{offset}        [DBHI.W Dr,<label>]
  1510:             //TRAPHI.W #<data>                                |-|--2346|-|--*-*|-----|          |0101_001_011_111_010-{data}
  1511:             //TPHI.W #<data>                                  |A|--2346|-|--*-*|-----|          |0101_001_011_111_010-{data}  [TRAPHI.W #<data>]
  1512:             //TPNLS.W #<data>                                 |A|--2346|-|--*-*|-----|          |0101_001_011_111_010-{data}  [TRAPHI.W #<data>]
  1513:             //TRAPNLS.W #<data>                               |A|--2346|-|--*-*|-----|          |0101_001_011_111_010-{data}  [TRAPHI.W #<data>]
  1514:             //TRAPHI.L #<data>                                |-|--2346|-|--*-*|-----|          |0101_001_011_111_011-{data}
  1515:             //TPHI.L #<data>                                  |A|--2346|-|--*-*|-----|          |0101_001_011_111_011-{data}  [TRAPHI.L #<data>]
  1516:             //TPNLS.L #<data>                                 |A|--2346|-|--*-*|-----|          |0101_001_011_111_011-{data}  [TRAPHI.L #<data>]
  1517:             //TRAPNLS.L #<data>                               |A|--2346|-|--*-*|-----|          |0101_001_011_111_011-{data}  [TRAPHI.L #<data>]
  1518:             //TRAPHI                                          |-|--2346|-|--*-*|-----|          |0101_001_011_111_100
  1519:             //TPHI                                            |A|--2346|-|--*-*|-----|          |0101_001_011_111_100 [TRAPHI]
  1520:             //TPNLS                                           |A|--2346|-|--*-*|-----|          |0101_001_011_111_100 [TRAPHI]
  1521:             //TRAPNLS                                         |A|--2346|-|--*-*|-----|          |0101_001_011_111_100 [TRAPHI]
  1522:           case 0b0101_001_011:
  1523:             irpShi ();
  1524:             break irpSwitch;
  1525: 
  1526:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1527:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1528:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1529:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1530:             //SLS.B <ea>                                      |-|012346|-|--*-*|-----|D M+-WXZ  |0101_001_111_mmm_rrr
  1531:             //SNHI.B <ea>                                     |A|012346|-|--*-*|-----|D M+-WXZ  |0101_001_111_mmm_rrr [SLS.B <ea>]
  1532:             //DBLS.W Dr,<label>                               |-|012346|-|--*-*|-----|          |0101_001_111_001_rrr-{offset}
  1533:             //DBNHI.W Dr,<label>                              |A|012346|-|--*-*|-----|          |0101_001_111_001_rrr-{offset}        [DBLS.W Dr,<label>]
  1534:             //TRAPLS.W #<data>                                |-|--2346|-|--*-*|-----|          |0101_001_111_111_010-{data}
  1535:             //TPLS.W #<data>                                  |A|--2346|-|--*-*|-----|          |0101_001_111_111_010-{data}
  1536:             //TPNHI.W #<data>                                 |A|--2346|-|--*-*|-----|          |0101_001_111_111_010-{data}  [TRAPLS.W #<data>]
  1537:             //TRAPNHI.W #<data>                               |A|--2346|-|--*-*|-----|          |0101_001_111_111_010-{data}  [TRAPLS.W #<data>]
  1538:             //TRAPLS.L #<data>                                |-|--2346|-|--*-*|-----|          |0101_001_111_111_011-{data}
  1539:             //TPLS.L #<data>                                  |A|--2346|-|--*-*|-----|          |0101_001_111_111_011-{data}
  1540:             //TPNHI.L #<data>                                 |A|--2346|-|--*-*|-----|          |0101_001_111_111_011-{data}  [TRAPLS.L #<data>]
  1541:             //TRAPNHI.L #<data>                               |A|--2346|-|--*-*|-----|          |0101_001_111_111_011-{data}  [TRAPLS.L #<data>]
  1542:             //TRAPLS                                          |-|--2346|-|--*-*|-----|          |0101_001_111_111_100
  1543:             //TPLS                                            |A|--2346|-|--*-*|-----|          |0101_001_111_111_100 [TRAPLS]
  1544:             //TPNHI                                           |A|--2346|-|--*-*|-----|          |0101_001_111_111_100 [TRAPLS]
  1545:             //TRAPNHI                                         |A|--2346|-|--*-*|-----|          |0101_001_111_111_100 [TRAPLS]
  1546:           case 0b0101_001_111:
  1547:             irpSls ();
  1548:             break irpSwitch;
  1549: 
  1550:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1551:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1552:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1553:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1554:             //SCC.B <ea>                                      |-|012346|-|----*|-----|D M+-WXZ  |0101_010_011_mmm_rrr
  1555:             //SHS.B <ea>                                      |A|012346|-|----*|-----|D M+-WXZ  |0101_010_011_mmm_rrr [SCC.B <ea>]
  1556:             //SNCS.B <ea>                                     |A|012346|-|----*|-----|D M+-WXZ  |0101_010_011_mmm_rrr [SCC.B <ea>]
  1557:             //SNLO.B <ea>                                     |A|012346|-|----*|-----|D M+-WXZ  |0101_010_011_mmm_rrr [SCC.B <ea>]
  1558:             //DBCC.W Dr,<label>                               |-|012346|-|----*|-----|          |0101_010_011_001_rrr-{offset}
  1559:             //DBHS.W Dr,<label>                               |A|012346|-|----*|-----|          |0101_010_011_001_rrr-{offset}        [DBCC.W Dr,<label>]
  1560:             //DBNCS.W Dr,<label>                              |A|012346|-|----*|-----|          |0101_010_011_001_rrr-{offset}        [DBCC.W Dr,<label>]
  1561:             //DBNLO.W Dr,<label>                              |A|012346|-|----*|-----|          |0101_010_011_001_rrr-{offset}        [DBCC.W Dr,<label>]
  1562:             //TRAPCC.W #<data>                                |-|--2346|-|----*|-----|          |0101_010_011_111_010-{data}
  1563:             //TPCC.W #<data>                                  |A|--2346|-|----*|-----|          |0101_010_011_111_010-{data}  [TRAPCC.W #<data>]
  1564:             //TPHS.W #<data>                                  |A|--2346|-|----*|-----|          |0101_010_011_111_010-{data}  [TRAPCC.W #<data>]
  1565:             //TPNCS.W #<data>                                 |A|--2346|-|----*|-----|          |0101_010_011_111_010-{data}  [TRAPCC.W #<data>]
  1566:             //TPNLO.W #<data>                                 |A|--2346|-|----*|-----|          |0101_010_011_111_010-{data}  [TRAPCC.W #<data>]
  1567:             //TRAPHS.W #<data>                                |A|--2346|-|----*|-----|          |0101_010_011_111_010-{data}  [TRAPCC.W #<data>]
  1568:             //TRAPNCS.W #<data>                               |A|--2346|-|----*|-----|          |0101_010_011_111_010-{data}  [TRAPCC.W #<data>]
  1569:             //TRAPNLO.W #<data>                               |A|--2346|-|----*|-----|          |0101_010_011_111_010-{data}  [TRAPCC.W #<data>]
  1570:             //TRAPCC.L #<data>                                |-|--2346|-|----*|-----|          |0101_010_011_111_011-{data}
  1571:             //TPCC.L #<data>                                  |A|--2346|-|----*|-----|          |0101_010_011_111_011-{data}  [TRAPCC.L #<data>]
  1572:             //TPHS.L #<data>                                  |A|--2346|-|----*|-----|          |0101_010_011_111_011-{data}  [TRAPCC.L #<data>]
  1573:             //TPNCS.L #<data>                                 |A|--2346|-|----*|-----|          |0101_010_011_111_011-{data}  [TRAPCC.L #<data>]
  1574:             //TPNLO.L #<data>                                 |A|--2346|-|----*|-----|          |0101_010_011_111_011-{data}  [TRAPCC.L #<data>]
  1575:             //TRAPHS.L #<data>                                |A|--2346|-|----*|-----|          |0101_010_011_111_011-{data}  [TRAPCC.L #<data>]
  1576:             //TRAPNCS.L #<data>                               |A|--2346|-|----*|-----|          |0101_010_011_111_011-{data}  [TRAPCC.L #<data>]
  1577:             //TRAPNLO.L #<data>                               |A|--2346|-|----*|-----|          |0101_010_011_111_011-{data}  [TRAPCC.L #<data>]
  1578:             //TRAPCC                                          |-|--2346|-|----*|-----|          |0101_010_011_111_100
  1579:             //TPCC                                            |A|--2346|-|----*|-----|          |0101_010_011_111_100 [TRAPCC]
  1580:             //TPHS                                            |A|--2346|-|----*|-----|          |0101_010_011_111_100 [TRAPCC]
  1581:             //TPNCS                                           |A|--2346|-|----*|-----|          |0101_010_011_111_100 [TRAPCC]
  1582:             //TPNLO                                           |A|--2346|-|----*|-----|          |0101_010_011_111_100 [TRAPCC]
  1583:             //TRAPHS                                          |A|--2346|-|----*|-----|          |0101_010_011_111_100 [TRAPCC]
  1584:             //TRAPNCS                                         |A|--2346|-|----*|-----|          |0101_010_011_111_100 [TRAPCC]
  1585:             //TRAPNLO                                         |A|--2346|-|----*|-----|          |0101_010_011_111_100 [TRAPCC]
  1586:           case 0b0101_010_011:
  1587:             irpShs ();
  1588:             break irpSwitch;
  1589: 
  1590:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1591:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1592:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1593:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1594:             //SCS.B <ea>                                      |-|012346|-|----*|-----|D M+-WXZ  |0101_010_111_mmm_rrr
  1595:             //SLO.B <ea>                                      |A|012346|-|----*|-----|D M+-WXZ  |0101_010_111_mmm_rrr [SCS.B <ea>]
  1596:             //SNCC.B <ea>                                     |A|012346|-|----*|-----|D M+-WXZ  |0101_010_111_mmm_rrr [SCS.B <ea>]
  1597:             //SNHS.B <ea>                                     |A|012346|-|----*|-----|D M+-WXZ  |0101_010_111_mmm_rrr [SCS.B <ea>]
  1598:             //DBCS.W Dr,<label>                               |-|012346|-|----*|-----|          |0101_010_111_001_rrr-{offset}
  1599:             //DBLO.W Dr,<label>                               |A|012346|-|----*|-----|          |0101_010_111_001_rrr-{offset}        [DBCS.W Dr,<label>]
  1600:             //DBNCC.W Dr,<label>                              |A|012346|-|----*|-----|          |0101_010_111_001_rrr-{offset}        [DBCS.W Dr,<label>]
  1601:             //DBNHS.W Dr,<label>                              |A|012346|-|----*|-----|          |0101_010_111_001_rrr-{offset}        [DBCS.W Dr,<label>]
  1602:             //TRAPCS.W #<data>                                |-|--2346|-|----*|-----|          |0101_010_111_111_010-{data}
  1603:             //TPCS.W #<data>                                  |A|--2346|-|----*|-----|          |0101_010_111_111_010-{data}  [TRAPCS.W #<data>]
  1604:             //TPLO.W #<data>                                  |A|--2346|-|----*|-----|          |0101_010_111_111_010-{data}  [TRAPCS.W #<data>]
  1605:             //TPNCC.W #<data>                                 |A|--2346|-|----*|-----|          |0101_010_111_111_010-{data}  [TRAPCS.W #<data>]
  1606:             //TPNHS.W #<data>                                 |A|--2346|-|----*|-----|          |0101_010_111_111_010-{data}  [TRAPCS.W #<data>]
  1607:             //TRAPLO.W #<data>                                |A|--2346|-|----*|-----|          |0101_010_111_111_010-{data}  [TRAPCS.W #<data>]
  1608:             //TRAPNCC.W #<data>                               |A|--2346|-|----*|-----|          |0101_010_111_111_010-{data}  [TRAPCS.W #<data>]
  1609:             //TRAPNHS.W #<data>                               |A|--2346|-|----*|-----|          |0101_010_111_111_010-{data}  [TRAPCS.W #<data>]
  1610:             //TRAPCS.L #<data>                                |-|--2346|-|----*|-----|          |0101_010_111_111_011-{data}
  1611:             //TPCS.L #<data>                                  |A|--2346|-|----*|-----|          |0101_010_111_111_011-{data}  [TRAPCS.L #<data>]
  1612:             //TPLO.L #<data>                                  |A|--2346|-|----*|-----|          |0101_010_111_111_011-{data}  [TRAPCS.L #<data>]
  1613:             //TPNCC.L #<data>                                 |A|--2346|-|----*|-----|          |0101_010_111_111_011-{data}  [TRAPCS.L #<data>]
  1614:             //TPNHS.L #<data>                                 |A|--2346|-|----*|-----|          |0101_010_111_111_011-{data}  [TRAPCS.L #<data>]
  1615:             //TRAPLO.L #<data>                                |A|--2346|-|----*|-----|          |0101_010_111_111_011-{data}  [TRAPCS.L #<data>]
  1616:             //TRAPNCC.L #<data>                               |A|--2346|-|----*|-----|          |0101_010_111_111_011-{data}  [TRAPCS.L #<data>]
  1617:             //TRAPNHS.L #<data>                               |A|--2346|-|----*|-----|          |0101_010_111_111_011-{data}  [TRAPCS.L #<data>]
  1618:             //TRAPCS                                          |-|--2346|-|----*|-----|          |0101_010_111_111_100
  1619:             //TPCS                                            |A|--2346|-|----*|-----|          |0101_010_111_111_100 [TRAPCS]
  1620:             //TPLO                                            |A|--2346|-|----*|-----|          |0101_010_111_111_100 [TRAPCS]
  1621:             //TPNCC                                           |A|--2346|-|----*|-----|          |0101_010_111_111_100 [TRAPCS]
  1622:             //TPNHS                                           |A|--2346|-|----*|-----|          |0101_010_111_111_100 [TRAPCS]
  1623:             //TRAPLO                                          |A|--2346|-|----*|-----|          |0101_010_111_111_100 [TRAPCS]
  1624:             //TRAPNCC                                         |A|--2346|-|----*|-----|          |0101_010_111_111_100 [TRAPCS]
  1625:             //TRAPNHS                                         |A|--2346|-|----*|-----|          |0101_010_111_111_100 [TRAPCS]
  1626:           case 0b0101_010_111:
  1627:             irpSlo ();
  1628:             break irpSwitch;
  1629: 
  1630:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1631:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1632:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1633:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1634:             //SNE.B <ea>                                      |-|012346|-|--*--|-----|D M+-WXZ  |0101_011_011_mmm_rrr
  1635:             //SNEQ.B <ea>                                     |A|012346|-|--*--|-----|D M+-WXZ  |0101_011_011_mmm_rrr [SNE.B <ea>]
  1636:             //SNZ.B <ea>                                      |A|012346|-|--*--|-----|D M+-WXZ  |0101_011_011_mmm_rrr [SNE.B <ea>]
  1637:             //SNZE.B <ea>                                     |A|012346|-|--*--|-----|D M+-WXZ  |0101_011_011_mmm_rrr [SNE.B <ea>]
  1638:             //DBNE.W Dr,<label>                               |-|012346|-|--*--|-----|          |0101_011_011_001_rrr-{offset}
  1639:             //DBNEQ.W Dr,<label>                              |A|012346|-|--*--|-----|          |0101_011_011_001_rrr-{offset}        [DBNE.W Dr,<label>]
  1640:             //DBNZ.W Dr,<label>                               |A|012346|-|--*--|-----|          |0101_011_011_001_rrr-{offset}        [DBNE.W Dr,<label>]
  1641:             //DBNZE.W Dr,<label>                              |A|012346|-|--*--|-----|          |0101_011_011_001_rrr-{offset}        [DBNE.W Dr,<label>]
  1642:             //TRAPNE.W #<data>                                |-|--2346|-|--*--|-----|          |0101_011_011_111_010-{data}
  1643:             //TPNE.W #<data>                                  |A|--2346|-|--*--|-----|          |0101_011_011_111_010-{data}  [TRAPNE.W #<data>]
  1644:             //TPNEQ.W #<data>                                 |A|--2346|-|--*--|-----|          |0101_011_011_111_010-{data}  [TRAPNE.W #<data>]
  1645:             //TPNZ.W #<data>                                  |A|--2346|-|--*--|-----|          |0101_011_011_111_010-{data}  [TRAPNE.W #<data>]
  1646:             //TPNZE.W #<data>                                 |A|--2346|-|--*--|-----|          |0101_011_011_111_010-{data}  [TRAPNE.W #<data>]
  1647:             //TRAPNEQ.W #<data>                               |A|--2346|-|--*--|-----|          |0101_011_011_111_010-{data}  [TRAPNE.W #<data>]
  1648:             //TRAPNZ.W #<data>                                |A|--2346|-|--*--|-----|          |0101_011_011_111_010-{data}  [TRAPNE.W #<data>]
  1649:             //TRAPNZE.W #<data>                               |A|--2346|-|--*--|-----|          |0101_011_011_111_010-{data}  [TRAPNE.W #<data>]
  1650:             //TRAPNE.L #<data>                                |-|--2346|-|--*--|-----|          |0101_011_011_111_011-{data}
  1651:             //TPNE.L #<data>                                  |A|--2346|-|--*--|-----|          |0101_011_011_111_011-{data}  [TRAPNE.L #<data>]
  1652:             //TPNEQ.L #<data>                                 |A|--2346|-|--*--|-----|          |0101_011_011_111_011-{data}  [TRAPNE.L #<data>]
  1653:             //TPNZ.L #<data>                                  |A|--2346|-|--*--|-----|          |0101_011_011_111_011-{data}  [TRAPNE.L #<data>]
  1654:             //TPNZE.L #<data>                                 |A|--2346|-|--*--|-----|          |0101_011_011_111_011-{data}  [TRAPNE.L #<data>]
  1655:             //TRAPNEQ.L #<data>                               |A|--2346|-|--*--|-----|          |0101_011_011_111_011-{data}  [TRAPNE.L #<data>]
  1656:             //TRAPNZ.L #<data>                                |A|--2346|-|--*--|-----|          |0101_011_011_111_011-{data}  [TRAPNE.L #<data>]
  1657:             //TRAPNZE.L #<data>                               |A|--2346|-|--*--|-----|          |0101_011_011_111_011-{data}  [TRAPNE.L #<data>]
  1658:             //TRAPNE                                          |-|--2346|-|--*--|-----|          |0101_011_011_111_100
  1659:             //TPNE                                            |A|--2346|-|--*--|-----|          |0101_011_011_111_100 [TRAPNE]
  1660:             //TPNEQ                                           |A|--2346|-|--*--|-----|          |0101_011_011_111_100 [TRAPNE]
  1661:             //TPNZ                                            |A|--2346|-|--*--|-----|          |0101_011_011_111_100 [TRAPNE]
  1662:             //TPNZE                                           |A|--2346|-|--*--|-----|          |0101_011_011_111_100 [TRAPNE]
  1663:             //TRAPNEQ                                         |A|--2346|-|--*--|-----|          |0101_011_011_111_100 [TRAPNE]
  1664:             //TRAPNZ                                          |A|--2346|-|--*--|-----|          |0101_011_011_111_100 [TRAPNE]
  1665:             //TRAPNZE                                         |A|--2346|-|--*--|-----|          |0101_011_011_111_100 [TRAPNE]
  1666:           case 0b0101_011_011:
  1667:             irpSne ();
  1668:             break irpSwitch;
  1669: 
  1670:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1671:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1672:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1673:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1674:             //SEQ.B <ea>                                      |-|012346|-|--*--|-----|D M+-WXZ  |0101_011_111_mmm_rrr
  1675:             //SNNE.B <ea>                                     |A|012346|-|--*--|-----|D M+-WXZ  |0101_011_111_mmm_rrr [SEQ.B <ea>]
  1676:             //SNNZ.B <ea>                                     |A|012346|-|--*--|-----|D M+-WXZ  |0101_011_111_mmm_rrr [SEQ.B <ea>]
  1677:             //SZE.B <ea>                                      |A|012346|-|--*--|-----|D M+-WXZ  |0101_011_111_mmm_rrr [SEQ.B <ea>]
  1678:             //DBEQ.W Dr,<label>                               |-|012346|-|--*--|-----|          |0101_011_111_001_rrr-{offset}
  1679:             //DBNNE.W Dr,<label>                              |A|012346|-|--*--|-----|          |0101_011_111_001_rrr-{offset}        [DBEQ.W Dr,<label>]
  1680:             //DBNNZ.W Dr,<label>                              |A|012346|-|--*--|-----|          |0101_011_111_001_rrr-{offset}        [DBEQ.W Dr,<label>]
  1681:             //DBZE.W Dr,<label>                               |A|012346|-|--*--|-----|          |0101_011_111_001_rrr-{offset}        [DBEQ.W Dr,<label>]
  1682:             //TRAPEQ.W #<data>                                |-|--2346|-|--*--|-----|          |0101_011_111_111_010-{data}
  1683:             //TPEQ.W #<data>                                  |A|--2346|-|--*--|-----|          |0101_011_111_111_010-{data}  [TRAPEQ.W #<data>]
  1684:             //TPNNE.W #<data>                                 |A|--2346|-|--*--|-----|          |0101_011_111_111_010-{data}  [TRAPEQ.W #<data>]
  1685:             //TPNNZ.W #<data>                                 |A|--2346|-|--*--|-----|          |0101_011_111_111_010-{data}  [TRAPEQ.W #<data>]
  1686:             //TPZE.W #<data>                                  |A|--2346|-|--*--|-----|          |0101_011_111_111_010-{data}  [TRAPEQ.W #<data>]
  1687:             //TRAPNNE.W #<data>                               |A|--2346|-|--*--|-----|          |0101_011_111_111_010-{data}  [TRAPEQ.W #<data>]
  1688:             //TRAPNNZ.W #<data>                               |A|--2346|-|--*--|-----|          |0101_011_111_111_010-{data}  [TRAPEQ.W #<data>]
  1689:             //TRAPZE.W #<data>                                |A|--2346|-|--*--|-----|          |0101_011_111_111_010-{data}  [TRAPEQ.W #<data>]
  1690:             //TRAPEQ.L #<data>                                |-|--2346|-|--*--|-----|          |0101_011_111_111_011-{data}
  1691:             //TPEQ.L #<data>                                  |A|--2346|-|--*--|-----|          |0101_011_111_111_011-{data}  [TRAPEQ.L #<data>]
  1692:             //TPNNE.L #<data>                                 |A|--2346|-|--*--|-----|          |0101_011_111_111_011-{data}  [TRAPEQ.L #<data>]
  1693:             //TPNNZ.L #<data>                                 |A|--2346|-|--*--|-----|          |0101_011_111_111_011-{data}  [TRAPEQ.L #<data>]
  1694:             //TPZE.L #<data>                                  |A|--2346|-|--*--|-----|          |0101_011_111_111_011-{data}  [TRAPEQ.L #<data>]
  1695:             //TRAPNNE.L #<data>                               |A|--2346|-|--*--|-----|          |0101_011_111_111_011-{data}  [TRAPEQ.L #<data>]
  1696:             //TRAPNNZ.L #<data>                               |A|--2346|-|--*--|-----|          |0101_011_111_111_011-{data}  [TRAPEQ.L #<data>]
  1697:             //TRAPZE.L #<data>                                |A|--2346|-|--*--|-----|          |0101_011_111_111_011-{data}  [TRAPEQ.L #<data>]
  1698:             //TRAPEQ                                          |-|--2346|-|--*--|-----|          |0101_011_111_111_100
  1699:             //TPEQ                                            |A|--2346|-|--*--|-----|          |0101_011_111_111_100 [TRAPEQ]
  1700:             //TPNNE                                           |A|--2346|-|--*--|-----|          |0101_011_111_111_100 [TRAPEQ]
  1701:             //TPNNZ                                           |A|--2346|-|--*--|-----|          |0101_011_111_111_100 [TRAPEQ]
  1702:             //TPZE                                            |A|--2346|-|--*--|-----|          |0101_011_111_111_100 [TRAPEQ]
  1703:             //TRAPNNE                                         |A|--2346|-|--*--|-----|          |0101_011_111_111_100 [TRAPEQ]
  1704:             //TRAPNNZ                                         |A|--2346|-|--*--|-----|          |0101_011_111_111_100 [TRAPEQ]
  1705:             //TRAPZE                                          |A|--2346|-|--*--|-----|          |0101_011_111_111_100 [TRAPEQ]
  1706:           case 0b0101_011_111:
  1707:             irpSeq ();
  1708:             break irpSwitch;
  1709: 
  1710:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1711:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1712:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1713:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1714:             //SVC.B <ea>                                      |-|012346|-|---*-|-----|D M+-WXZ  |0101_100_011_mmm_rrr
  1715:             //SNVS.B <ea>                                     |A|012346|-|---*-|-----|D M+-WXZ  |0101_100_011_mmm_rrr [SVC.B <ea>]
  1716:             //DBVC.W Dr,<label>                               |-|012346|-|---*-|-----|          |0101_100_011_001_rrr-{offset}
  1717:             //DBNVS.W Dr,<label>                              |A|012346|-|---*-|-----|          |0101_100_011_001_rrr-{offset}        [DBVC.W Dr,<label>]
  1718:             //TRAPVC.W #<data>                                |-|--2346|-|---*-|-----|          |0101_100_011_111_010-{data}
  1719:             //TPNVS.W #<data>                                 |A|--2346|-|---*-|-----|          |0101_100_011_111_010-{data}  [TRAPVC.W #<data>]
  1720:             //TPVC.W #<data>                                  |A|--2346|-|---*-|-----|          |0101_100_011_111_010-{data}  [TRAPVC.W #<data>]
  1721:             //TRAPNVS.W #<data>                               |A|--2346|-|---*-|-----|          |0101_100_011_111_010-{data}  [TRAPVC.W #<data>]
  1722:             //TRAPVC.L #<data>                                |-|--2346|-|---*-|-----|          |0101_100_011_111_011-{data}
  1723:             //TPNVS.L #<data>                                 |A|--2346|-|---*-|-----|          |0101_100_011_111_011-{data}  [TRAPVC.L #<data>]
  1724:             //TPVC.L #<data>                                  |A|--2346|-|---*-|-----|          |0101_100_011_111_011-{data}  [TRAPVC.L #<data>]
  1725:             //TRAPNVS.L #<data>                               |A|--2346|-|---*-|-----|          |0101_100_011_111_011-{data}  [TRAPVC.L #<data>]
  1726:             //TRAPVC                                          |-|--2346|-|---*-|-----|          |0101_100_011_111_100
  1727:             //TPNVS                                           |A|--2346|-|---*-|-----|          |0101_100_011_111_100 [TRAPVC]
  1728:             //TPVC                                            |A|--2346|-|---*-|-----|          |0101_100_011_111_100 [TRAPVC]
  1729:             //TRAPNVS                                         |A|--2346|-|---*-|-----|          |0101_100_011_111_100 [TRAPVC]
  1730:           case 0b0101_100_011:
  1731:             irpSvc ();
  1732:             break irpSwitch;
  1733: 
  1734:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1735:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1736:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1737:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1738:             //SVS.B <ea>                                      |-|012346|-|---*-|-----|D M+-WXZ  |0101_100_111_mmm_rrr
  1739:             //SNVC.B <ea>                                     |A|012346|-|---*-|-----|D M+-WXZ  |0101_100_111_mmm_rrr [SVS.B <ea>]
  1740:             //DBVS.W Dr,<label>                               |-|012346|-|---*-|-----|          |0101_100_111_001_rrr-{offset}
  1741:             //DBNVC.W Dr,<label>                              |A|012346|-|---*-|-----|          |0101_100_111_001_rrr-{offset}        [DBVS.W Dr,<label>]
  1742:             //TRAPVS.W #<data>                                |-|--2346|-|---*-|-----|          |0101_100_111_111_010-{data}
  1743:             //TPNVC.W #<data>                                 |A|--2346|-|---*-|-----|          |0101_100_111_111_010-{data}  [TRAPVS.W #<data>]
  1744:             //TPVS.W #<data>                                  |A|--2346|-|---*-|-----|          |0101_100_111_111_010-{data}  [TRAPVS.W #<data>]
  1745:             //TRAPNVC.W #<data>                               |A|--2346|-|---*-|-----|          |0101_100_111_111_010-{data}  [TRAPVS.W #<data>]
  1746:             //TRAPVS.L #<data>                                |-|--2346|-|---*-|-----|          |0101_100_111_111_011-{data}
  1747:             //TPNVC.L #<data>                                 |A|--2346|-|---*-|-----|          |0101_100_111_111_011-{data}  [TRAPVS.L #<data>]
  1748:             //TPVS.L #<data>                                  |A|--2346|-|---*-|-----|          |0101_100_111_111_011-{data}  [TRAPVS.L #<data>]
  1749:             //TRAPNVC.L #<data>                               |A|--2346|-|---*-|-----|          |0101_100_111_111_011-{data}  [TRAPVS.L #<data>]
  1750:             //TRAPVS                                          |-|--2346|-|---*-|-----|          |0101_100_111_111_100
  1751:             //TPNVC                                           |A|--2346|-|---*-|-----|          |0101_100_111_111_100 [TRAPVS]
  1752:             //TPVS                                            |A|--2346|-|---*-|-----|          |0101_100_111_111_100 [TRAPVS]
  1753:             //TRAPNVC                                         |A|--2346|-|---*-|-----|          |0101_100_111_111_100 [TRAPVS]
  1754:           case 0b0101_100_111:
  1755:             irpSvs ();
  1756:             break irpSwitch;
  1757: 
  1758:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1759:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1760:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1761:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1762:             //SPL.B <ea>                                      |-|012346|-|-*---|-----|D M+-WXZ  |0101_101_011_mmm_rrr
  1763:             //SNMI.B <ea>                                     |A|012346|-|-*---|-----|D M+-WXZ  |0101_101_011_mmm_rrr [SPL.B <ea>]
  1764:             //DBPL.W Dr,<label>                               |-|012346|-|-*---|-----|          |0101_101_011_001_rrr-{offset}
  1765:             //DBNMI.W Dr,<label>                              |A|012346|-|-*---|-----|          |0101_101_011_001_rrr-{offset}        [DBPL.W Dr,<label>]
  1766:             //TRAPPL.W #<data>                                |-|--2346|-|-*---|-----|          |0101_101_011_111_010-{data}
  1767:             //TPNMI.W #<data>                                 |A|--2346|-|-*---|-----|          |0101_101_011_111_010-{data}  [TRAPPL.W #<data>]
  1768:             //TPPL.W #<data>                                  |A|--2346|-|-*---|-----|          |0101_101_011_111_010-{data}  [TRAPPL.W #<data>]
  1769:             //TRAPNMI.W #<data>                               |A|--2346|-|-*---|-----|          |0101_101_011_111_010-{data}  [TRAPPL.W #<data>]
  1770:             //TRAPPL.L #<data>                                |-|--2346|-|-*---|-----|          |0101_101_011_111_011-{data}
  1771:             //TPNMI.L #<data>                                 |A|--2346|-|-*---|-----|          |0101_101_011_111_011-{data}  [TRAPPL.L #<data>]
  1772:             //TPPL.L #<data>                                  |A|--2346|-|-*---|-----|          |0101_101_011_111_011-{data}  [TRAPPL.L #<data>]
  1773:             //TRAPNMI.L #<data>                               |A|--2346|-|-*---|-----|          |0101_101_011_111_011-{data}  [TRAPPL.L #<data>]
  1774:             //TRAPPL                                          |-|--2346|-|-*---|-----|          |0101_101_011_111_100
  1775:             //TPNMI                                           |A|--2346|-|-*---|-----|          |0101_101_011_111_100 [TRAPPL]
  1776:             //TPPL                                            |A|--2346|-|-*---|-----|          |0101_101_011_111_100 [TRAPPL]
  1777:             //TRAPNMI                                         |A|--2346|-|-*---|-----|          |0101_101_011_111_100 [TRAPPL]
  1778:           case 0b0101_101_011:
  1779:             irpSpl ();
  1780:             break irpSwitch;
  1781: 
  1782:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1783:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1784:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1785:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1786:             //SMI.B <ea>                                      |-|012346|-|-*---|-----|D M+-WXZ  |0101_101_111_mmm_rrr
  1787:             //SNPL.B <ea>                                     |A|012346|-|-*---|-----|D M+-WXZ  |0101_101_111_mmm_rrr [SMI.B <ea>]
  1788:             //DBMI.W Dr,<label>                               |-|012346|-|-*---|-----|          |0101_101_111_001_rrr-{offset}
  1789:             //DBNPL.W Dr,<label>                              |A|012346|-|-*---|-----|          |0101_101_111_001_rrr-{offset}        [DBMI.W Dr,<label>]
  1790:             //TRAPMI.W #<data>                                |-|--2346|-|-*---|-----|          |0101_101_111_111_010-{data}
  1791:             //TPMI.W #<data>                                  |A|--2346|-|-*---|-----|          |0101_101_111_111_010-{data}  [TRAPMI.W #<data>]
  1792:             //TPNPL.W #<data>                                 |A|--2346|-|-*---|-----|          |0101_101_111_111_010-{data}  [TRAPMI.W #<data>]
  1793:             //TRAPNPL.W #<data>                               |A|--2346|-|-*---|-----|          |0101_101_111_111_010-{data}  [TRAPMI.W #<data>]
  1794:             //TRAPMI.L #<data>                                |-|--2346|-|-*---|-----|          |0101_101_111_111_011-{data}
  1795:             //TPMI.L #<data>                                  |A|--2346|-|-*---|-----|          |0101_101_111_111_011-{data}  [TRAPMI.L #<data>]
  1796:             //TPNPL.L #<data>                                 |A|--2346|-|-*---|-----|          |0101_101_111_111_011-{data}  [TRAPMI.L #<data>]
  1797:             //TRAPNPL.L #<data>                               |A|--2346|-|-*---|-----|          |0101_101_111_111_011-{data}  [TRAPMI.L #<data>]
  1798:             //TRAPMI                                          |-|--2346|-|-*---|-----|          |0101_101_111_111_100
  1799:             //TPMI                                            |A|--2346|-|-*---|-----|          |0101_101_111_111_100 [TRAPMI]
  1800:             //TPNPL                                           |A|--2346|-|-*---|-----|          |0101_101_111_111_100 [TRAPMI]
  1801:             //TRAPNPL                                         |A|--2346|-|-*---|-----|          |0101_101_111_111_100 [TRAPMI]
  1802:           case 0b0101_101_111:
  1803:             irpSmi ();
  1804:             break irpSwitch;
  1805: 
  1806:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1807:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1808:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1809:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1810:             //SGE.B <ea>                                      |-|012346|-|-*-*-|-----|D M+-WXZ  |0101_110_011_mmm_rrr
  1811:             //SNLT.B <ea>                                     |A|012346|-|-*-*-|-----|D M+-WXZ  |0101_110_011_mmm_rrr [SGE.B <ea>]
  1812:             //DBGE.W Dr,<label>                               |-|012346|-|-*-*-|-----|          |0101_110_011_001_rrr-{offset}
  1813:             //DBNLT.W Dr,<label>                              |A|012346|-|-*-*-|-----|          |0101_110_011_001_rrr-{offset}        [DBGE.W Dr,<label>]
  1814:             //TRAPGE.W #<data>                                |-|--2346|-|-*-*-|-----|          |0101_110_011_111_010-{data}
  1815:             //TPGE.W #<data>                                  |A|--2346|-|-*-*-|-----|          |0101_110_011_111_010-{data}  [TRAPGE.W #<data>]
  1816:             //TPNLT.W #<data>                                 |A|--2346|-|-*-*-|-----|          |0101_110_011_111_010-{data}  [TRAPGE.W #<data>]
  1817:             //TRAPNLT.W #<data>                               |A|--2346|-|-*-*-|-----|          |0101_110_011_111_010-{data}  [TRAPGE.W #<data>]
  1818:             //TRAPGE.L #<data>                                |-|--2346|-|-*-*-|-----|          |0101_110_011_111_011-{data}
  1819:             //TPGE.L #<data>                                  |A|--2346|-|-*-*-|-----|          |0101_110_011_111_011-{data}  [TRAPGE.L #<data>]
  1820:             //TPNLT.L #<data>                                 |A|--2346|-|-*-*-|-----|          |0101_110_011_111_011-{data}  [TRAPGE.L #<data>]
  1821:             //TRAPNLT.L #<data>                               |A|--2346|-|-*-*-|-----|          |0101_110_011_111_011-{data}  [TRAPGE.L #<data>]
  1822:             //TRAPGE                                          |-|--2346|-|-*-*-|-----|          |0101_110_011_111_100
  1823:             //TPGE                                            |A|--2346|-|-*-*-|-----|          |0101_110_011_111_100 [TRAPGE]
  1824:             //TPNLT                                           |A|--2346|-|-*-*-|-----|          |0101_110_011_111_100 [TRAPGE]
  1825:             //TRAPNLT                                         |A|--2346|-|-*-*-|-----|          |0101_110_011_111_100 [TRAPGE]
  1826:           case 0b0101_110_011:
  1827:             irpSge ();
  1828:             break irpSwitch;
  1829: 
  1830:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1831:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1832:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1833:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1834:             //SLT.B <ea>                                      |-|012346|-|-*-*-|-----|D M+-WXZ  |0101_110_111_mmm_rrr
  1835:             //SNGE.B <ea>                                     |A|012346|-|-*-*-|-----|D M+-WXZ  |0101_110_111_mmm_rrr [SLT.B <ea>]
  1836:             //DBLT.W Dr,<label>                               |-|012346|-|-*-*-|-----|          |0101_110_111_001_rrr-{offset}
  1837:             //DBNGE.W Dr,<label>                              |A|012346|-|-*-*-|-----|          |0101_110_111_001_rrr-{offset}        [DBLT.W Dr,<label>]
  1838:             //TRAPLT.W #<data>                                |-|--2346|-|-*-*-|-----|          |0101_110_111_111_010-{data}
  1839:             //TPLT.W #<data>                                  |A|--2346|-|-*-*-|-----|          |0101_110_111_111_010-{data}  [TRAPLT.W #<data>]
  1840:             //TPNGE.W #<data>                                 |A|--2346|-|-*-*-|-----|          |0101_110_111_111_010-{data}  [TRAPLT.W #<data>]
  1841:             //TRAPNGE.W #<data>                               |A|--2346|-|-*-*-|-----|          |0101_110_111_111_010-{data}  [TRAPLT.W #<data>]
  1842:             //TRAPLT.L #<data>                                |-|--2346|-|-*-*-|-----|          |0101_110_111_111_011-{data}
  1843:             //TPLT.L #<data>                                  |A|--2346|-|-*-*-|-----|          |0101_110_111_111_011-{data}  [TRAPLT.L #<data>]
  1844:             //TPNGE.L #<data>                                 |A|--2346|-|-*-*-|-----|          |0101_110_111_111_011-{data}  [TRAPLT.L #<data>]
  1845:             //TRAPNGE.L #<data>                               |A|--2346|-|-*-*-|-----|          |0101_110_111_111_011-{data}  [TRAPLT.L #<data>]
  1846:             //TRAPLT                                          |-|--2346|-|-*-*-|-----|          |0101_110_111_111_100
  1847:             //TPLT                                            |A|--2346|-|-*-*-|-----|          |0101_110_111_111_100 [TRAPLT]
  1848:             //TPNGE                                           |A|--2346|-|-*-*-|-----|          |0101_110_111_111_100 [TRAPLT]
  1849:             //TRAPNGE                                         |A|--2346|-|-*-*-|-----|          |0101_110_111_111_100 [TRAPLT]
  1850:           case 0b0101_110_111:
  1851:             irpSlt ();
  1852:             break irpSwitch;
  1853: 
  1854:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1855:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1856:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1857:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1858:             //SGT.B <ea>                                      |-|012346|-|-***-|-----|D M+-WXZ  |0101_111_011_mmm_rrr
  1859:             //SNLE.B <ea>                                     |A|012346|-|-***-|-----|D M+-WXZ  |0101_111_011_mmm_rrr [SGT.B <ea>]
  1860:             //DBGT.W Dr,<label>                               |-|012346|-|-***-|-----|          |0101_111_011_001_rrr-{offset}
  1861:             //DBNLE.W Dr,<label>                              |A|012346|-|-***-|-----|          |0101_111_011_001_rrr-{offset}        [DBGT.W Dr,<label>]
  1862:             //TRAPGT.W #<data>                                |-|--2346|-|-***-|-----|          |0101_111_011_111_010-{data}
  1863:             //TPGT.W #<data>                                  |A|--2346|-|-***-|-----|          |0101_111_011_111_010-{data}  [TRAPGT.W #<data>]
  1864:             //TPNLE.W #<data>                                 |A|--2346|-|-***-|-----|          |0101_111_011_111_010-{data}  [TRAPGT.W #<data>]
  1865:             //TRAPNLE.W #<data>                               |A|--2346|-|-***-|-----|          |0101_111_011_111_010-{data}  [TRAPGT.W #<data>]
  1866:             //TRAPGT.L #<data>                                |-|--2346|-|-***-|-----|          |0101_111_011_111_011-{data}
  1867:             //TPGT.L #<data>                                  |A|--2346|-|-***-|-----|          |0101_111_011_111_011-{data}  [TRAPGT.L #<data>]
  1868:             //TPNLE.L #<data>                                 |A|--2346|-|-***-|-----|          |0101_111_011_111_011-{data}  [TRAPGT.L #<data>]
  1869:             //TRAPNLE.L #<data>                               |A|--2346|-|-***-|-----|          |0101_111_011_111_011-{data}  [TRAPGT.L #<data>]
  1870:             //TRAPGT                                          |-|--2346|-|-***-|-----|          |0101_111_011_111_100
  1871:             //TPGT                                            |A|--2346|-|-***-|-----|          |0101_111_011_111_100 [TRAPGT]
  1872:             //TPNLE                                           |A|--2346|-|-***-|-----|          |0101_111_011_111_100 [TRAPGT]
  1873:             //TRAPNLE                                         |A|--2346|-|-***-|-----|          |0101_111_011_111_100 [TRAPGT]
  1874:           case 0b0101_111_011:
  1875:             irpSgt ();
  1876:             break irpSwitch;
  1877: 
  1878:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1879:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1880:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1881:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1882:             //SLE.B <ea>                                      |-|012346|-|-***-|-----|D M+-WXZ  |0101_111_111_mmm_rrr
  1883:             //SNGT.B <ea>                                     |A|012346|-|-***-|-----|D M+-WXZ  |0101_111_111_mmm_rrr [SLE.B <ea>]
  1884:             //DBLE.W Dr,<label>                               |-|012346|-|-***-|-----|          |0101_111_111_001_rrr-{offset}
  1885:             //DBNGT.W Dr,<label>                              |A|012346|-|-***-|-----|          |0101_111_111_001_rrr-{offset}        [DBLE.W Dr,<label>]
  1886:             //TRAPLE.W #<data>                                |-|--2346|-|-***-|-----|          |0101_111_111_111_010-{data}
  1887:             //TPLE.W #<data>                                  |A|--2346|-|-***-|-----|          |0101_111_111_111_010-{data}  [TRAPLE.W #<data>]
  1888:             //TPNGT.W #<data>                                 |A|--2346|-|-***-|-----|          |0101_111_111_111_010-{data}  [TRAPLE.W #<data>]
  1889:             //TRAPNGT.W #<data>                               |A|--2346|-|-***-|-----|          |0101_111_111_111_010-{data}  [TRAPLE.W #<data>]
  1890:             //TRAPLE.L #<data>                                |-|--2346|-|-***-|-----|          |0101_111_111_111_011-{data}
  1891:             //TPLE.L #<data>                                  |A|--2346|-|-***-|-----|          |0101_111_111_111_011-{data}  [TRAPLE.L #<data>]
  1892:             //TPNGT.L #<data>                                 |A|--2346|-|-***-|-----|          |0101_111_111_111_011-{data}  [TRAPLE.L #<data>]
  1893:             //TRAPNGT.L #<data>                               |A|--2346|-|-***-|-----|          |0101_111_111_111_011-{data}  [TRAPLE.L #<data>]
  1894:             //TRAPLE                                          |-|--2346|-|-***-|-----|          |0101_111_111_111_100
  1895:             //TPLE                                            |A|--2346|-|-***-|-----|          |0101_111_111_111_100 [TRAPLE]
  1896:             //TPNGT                                           |A|--2346|-|-***-|-----|          |0101_111_111_111_100 [TRAPLE]
  1897:             //TRAPNGT                                         |A|--2346|-|-***-|-----|          |0101_111_111_111_100 [TRAPLE]
  1898:           case 0b0101_111_111:
  1899:             irpSle ();
  1900:             break irpSwitch;
  1901: 
  1902:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1903:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1904:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1905:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1906:             //BRA.W <label>                                   |-|012346|-|-----|-----|          |0110_000_000_000_000-{offset}
  1907:             //JBRA.W <label>                                  |A|012346|-|-----|-----|          |0110_000_000_000_000-{offset}        [BRA.W <label>]
  1908:             //BRA.S <label>                                   |-|012346|-|-----|-----|          |0110_000_000_sss_sss (s is not equal to 0)
  1909:             //JBRA.S <label>                                  |A|012346|-|-----|-----|          |0110_000_000_sss_sss (s is not equal to 0)   [BRA.S <label>]
  1910:           case 0b0110_000_000:
  1911:             irpBrasw ();
  1912:             break irpSwitch;
  1913: 
  1914:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1915:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1916:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1917:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1918:             //BRA.S <label>                                   |-|012346|-|-----|-----|          |0110_000_001_sss_sss
  1919:             //JBRA.S <label>                                  |A|012346|-|-----|-----|          |0110_000_001_sss_sss [BRA.S <label>]
  1920:           case 0b0110_000_001:
  1921:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1922:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1923:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1924:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1925:             //BRA.S <label>                                   |-|012346|-|-----|-----|          |0110_000_010_sss_sss
  1926:             //JBRA.S <label>                                  |A|012346|-|-----|-----|          |0110_000_010_sss_sss [BRA.S <label>]
  1927:           case 0b0110_000_010:
  1928:             irpBras ();
  1929:             break irpSwitch;
  1930: 
  1931:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1932:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1933:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1934:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1935:             //BRA.S <label>                                   |-|--2346|-|-----|-----|          |0110_000_011_sss_sss (s is not equal to 63)
  1936:             //JBRA.S <label>                                  |A|--2346|-|-----|-----|          |0110_000_011_sss_sss (s is not equal to 63)  [BRA.S <label>]
  1937:             //BRA.L <label>                                   |-|--2346|-|-----|-----|          |0110_000_011_111_111-{offset}
  1938:           case 0b0110_000_011:
  1939:             irpBrasl ();
  1940:             break irpSwitch;
  1941: 
  1942:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1943:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1944:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1945:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1946:             //BSR.W <label>                                   |-|012346|-|-----|-----|          |0110_000_100_000_000-{offset}
  1947:             //JBSR.W <label>                                  |A|012346|-|-----|-----|          |0110_000_100_000_000-{offset}        [BSR.W <label>]
  1948:             //BSR.S <label>                                   |-|012346|-|-----|-----|          |0110_000_100_sss_sss (s is not equal to 0)
  1949:             //JBSR.S <label>                                  |A|012346|-|-----|-----|          |0110_000_100_sss_sss (s is not equal to 0)   [BSR.S <label>]
  1950:           case 0b0110_000_100:
  1951:             irpBsrsw ();
  1952:             break irpSwitch;
  1953: 
  1954:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1955:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1956:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1957:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1958:             //BSR.S <label>                                   |-|012346|-|-----|-----|          |0110_000_101_sss_sss
  1959:             //JBSR.S <label>                                  |A|012346|-|-----|-----|          |0110_000_101_sss_sss [BSR.S <label>]
  1960:           case 0b0110_000_101:
  1961:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1962:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1963:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1964:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1965:             //BSR.S <label>                                   |-|012346|-|-----|-----|          |0110_000_110_sss_sss
  1966:             //JBSR.S <label>                                  |A|012346|-|-----|-----|          |0110_000_110_sss_sss [BSR.S <label>]
  1967:           case 0b0110_000_110:
  1968:             irpBsrs ();
  1969:             break irpSwitch;
  1970: 
  1971:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1972:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1973:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1974:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1975:             //BSR.S <label>                                   |-|--2346|-|-----|-----|          |0110_000_111_sss_sss (s is not equal to 63)
  1976:             //JBSR.S <label>                                  |A|--2346|-|-----|-----|          |0110_000_111_sss_sss (s is not equal to 63)  [BSR.S <label>]
  1977:             //BSR.L <label>                                   |-|--2346|-|-----|-----|          |0110_000_111_111_111-{offset}
  1978:           case 0b0110_000_111:
  1979:             irpBsrsl ();
  1980:             break irpSwitch;
  1981: 
  1982:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1983:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1984:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1985:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1986:             //BHI.W <label>                                   |-|012346|-|--*-*|-----|          |0110_001_000_000_000-{offset}
  1987:             //BNLS.W <label>                                  |A|012346|-|--*-*|-----|          |0110_001_000_000_000-{offset}        [BHI.W <label>]
  1988:             //JBHI.W <label>                                  |A|012346|-|--*-*|-----|          |0110_001_000_000_000-{offset}        [BHI.W <label>]
  1989:             //JBNLS.W <label>                                 |A|012346|-|--*-*|-----|          |0110_001_000_000_000-{offset}        [BHI.W <label>]
  1990:             //BHI.S <label>                                   |-|012346|-|--*-*|-----|          |0110_001_000_sss_sss (s is not equal to 0)
  1991:             //BNLS.S <label>                                  |A|012346|-|--*-*|-----|          |0110_001_000_sss_sss (s is not equal to 0)   [BHI.S <label>]
  1992:             //JBHI.S <label>                                  |A|012346|-|--*-*|-----|          |0110_001_000_sss_sss (s is not equal to 0)   [BHI.S <label>]
  1993:             //JBNLS.S <label>                                 |A|012346|-|--*-*|-----|          |0110_001_000_sss_sss (s is not equal to 0)   [BHI.S <label>]
  1994:             //JBLS.L <label>                                  |A|012346|-|--*-*|-----|          |0110_001_000_000_110-0100111011111001-{address}      [BHI.S (*)+8;JMP <label>]
  1995:             //JBNHI.L <label>                                 |A|012346|-|--*-*|-----|          |0110_001_000_000_110-0100111011111001-{address}      [BHI.S (*)+8;JMP <label>]
  1996:           case 0b0110_001_000:
  1997:             irpBhisw ();
  1998:             break irpSwitch;
  1999: 
  2000:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2001:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2002:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2003:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2004:             //BHI.S <label>                                   |-|012346|-|--*-*|-----|          |0110_001_001_sss_sss
  2005:             //BNLS.S <label>                                  |A|012346|-|--*-*|-----|          |0110_001_001_sss_sss [BHI.S <label>]
  2006:             //JBHI.S <label>                                  |A|012346|-|--*-*|-----|          |0110_001_001_sss_sss [BHI.S <label>]
  2007:             //JBNLS.S <label>                                 |A|012346|-|--*-*|-----|          |0110_001_001_sss_sss [BHI.S <label>]
  2008:           case 0b0110_001_001:
  2009:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2010:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2011:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2012:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2013:             //BHI.S <label>                                   |-|012346|-|--*-*|-----|          |0110_001_010_sss_sss
  2014:             //BNLS.S <label>                                  |A|012346|-|--*-*|-----|          |0110_001_010_sss_sss [BHI.S <label>]
  2015:             //JBHI.S <label>                                  |A|012346|-|--*-*|-----|          |0110_001_010_sss_sss [BHI.S <label>]
  2016:             //JBNLS.S <label>                                 |A|012346|-|--*-*|-----|          |0110_001_010_sss_sss [BHI.S <label>]
  2017:           case 0b0110_001_010:
  2018:             irpBhis ();
  2019:             break irpSwitch;
  2020: 
  2021:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2022:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2023:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2024:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2025:             //BHI.S <label>                                   |-|--2346|-|--*-*|-----|          |0110_001_011_sss_sss (s is not equal to 63)
  2026:             //BNLS.S <label>                                  |A|--2346|-|--*-*|-----|          |0110_001_011_sss_sss (s is not equal to 63)  [BHI.S <label>]
  2027:             //JBHI.S <label>                                  |A|--2346|-|--*-*|-----|          |0110_001_011_sss_sss (s is not equal to 63)  [BHI.S <label>]
  2028:             //JBNLS.S <label>                                 |A|--2346|-|--*-*|-----|          |0110_001_011_sss_sss (s is not equal to 63)  [BHI.S <label>]
  2029:             //BHI.L <label>                                   |-|--2346|-|--*-*|-----|          |0110_001_011_111_111-{offset}
  2030:             //BNLS.L <label>                                  |A|--2346|-|--*-*|-----|          |0110_001_011_111_111-{offset}        [BHI.L <label>]
  2031:           case 0b0110_001_011:
  2032:             irpBhisl ();
  2033:             break irpSwitch;
  2034: 
  2035:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2036:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2037:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2038:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2039:             //BLS.W <label>                                   |-|012346|-|--*-*|-----|          |0110_001_100_000_000-{offset}
  2040:             //BNHI.W <label>                                  |A|012346|-|--*-*|-----|          |0110_001_100_000_000-{offset}        [BLS.W <label>]
  2041:             //JBLS.W <label>                                  |A|012346|-|--*-*|-----|          |0110_001_100_000_000-{offset}        [BLS.W <label>]
  2042:             //JBNHI.W <label>                                 |A|012346|-|--*-*|-----|          |0110_001_100_000_000-{offset}        [BLS.W <label>]
  2043:             //BLS.S <label>                                   |-|012346|-|--*-*|-----|          |0110_001_100_sss_sss (s is not equal to 0)
  2044:             //BNHI.S <label>                                  |A|012346|-|--*-*|-----|          |0110_001_100_sss_sss (s is not equal to 0)   [BLS.S <label>]
  2045:             //JBLS.S <label>                                  |A|012346|-|--*-*|-----|          |0110_001_100_sss_sss (s is not equal to 0)   [BLS.S <label>]
  2046:             //JBNHI.S <label>                                 |A|012346|-|--*-*|-----|          |0110_001_100_sss_sss (s is not equal to 0)   [BLS.S <label>]
  2047:             //JBHI.L <label>                                  |A|012346|-|--*-*|-----|          |0110_001_100_000_110-0100111011111001-{address}      [BLS.S (*)+8;JMP <label>]
  2048:             //JBNLS.L <label>                                 |A|012346|-|--*-*|-----|          |0110_001_100_000_110-0100111011111001-{address}      [BLS.S (*)+8;JMP <label>]
  2049:           case 0b0110_001_100:
  2050:             irpBlssw ();
  2051:             break irpSwitch;
  2052: 
  2053:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2054:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2055:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2056:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2057:             //BLS.S <label>                                   |-|012346|-|--*-*|-----|          |0110_001_101_sss_sss
  2058:             //BNHI.S <label>                                  |A|012346|-|--*-*|-----|          |0110_001_101_sss_sss [BLS.S <label>]
  2059:             //JBLS.S <label>                                  |A|012346|-|--*-*|-----|          |0110_001_101_sss_sss [BLS.S <label>]
  2060:             //JBNHI.S <label>                                 |A|012346|-|--*-*|-----|          |0110_001_101_sss_sss [BLS.S <label>]
  2061:           case 0b0110_001_101:
  2062:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2063:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2064:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2065:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2066:             //BLS.S <label>                                   |-|012346|-|--*-*|-----|          |0110_001_110_sss_sss
  2067:             //BNHI.S <label>                                  |A|012346|-|--*-*|-----|          |0110_001_110_sss_sss [BLS.S <label>]
  2068:             //JBLS.S <label>                                  |A|012346|-|--*-*|-----|          |0110_001_110_sss_sss [BLS.S <label>]
  2069:             //JBNHI.S <label>                                 |A|012346|-|--*-*|-----|          |0110_001_110_sss_sss [BLS.S <label>]
  2070:           case 0b0110_001_110:
  2071:             irpBlss ();
  2072:             break irpSwitch;
  2073: 
  2074:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2075:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2076:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2077:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2078:             //BLS.S <label>                                   |-|--2346|-|--*-*|-----|          |0110_001_111_sss_sss (s is not equal to 63)
  2079:             //BNHI.S <label>                                  |A|--2346|-|--*-*|-----|          |0110_001_111_sss_sss (s is not equal to 63)  [BLS.S <label>]
  2080:             //JBLS.S <label>                                  |A|--2346|-|--*-*|-----|          |0110_001_111_sss_sss (s is not equal to 63)  [BLS.S <label>]
  2081:             //JBNHI.S <label>                                 |A|--2346|-|--*-*|-----|          |0110_001_111_sss_sss (s is not equal to 63)  [BLS.S <label>]
  2082:             //BLS.L <label>                                   |-|--2346|-|--*-*|-----|          |0110_001_111_111_111-{offset}
  2083:             //BNHI.L <label>                                  |A|--2346|-|--*-*|-----|          |0110_001_111_111_111-{offset}        [BLS.L <label>]
  2084:           case 0b0110_001_111:
  2085:             irpBlssl ();
  2086:             break irpSwitch;
  2087: 
  2088:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2089:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2090:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2091:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2092:             //BCC.W <label>                                   |-|012346|-|----*|-----|          |0110_010_000_000_000-{offset}
  2093:             //BHS.W <label>                                   |A|012346|-|----*|-----|          |0110_010_000_000_000-{offset}        [BCC.W <label>]
  2094:             //BNCS.W <label>                                  |A|012346|-|----*|-----|          |0110_010_000_000_000-{offset}        [BCC.W <label>]
  2095:             //BNLO.W <label>                                  |A|012346|-|----*|-----|          |0110_010_000_000_000-{offset}        [BCC.W <label>]
  2096:             //JBCC.W <label>                                  |A|012346|-|----*|-----|          |0110_010_000_000_000-{offset}        [BCC.W <label>]
  2097:             //JBHS.W <label>                                  |A|012346|-|----*|-----|          |0110_010_000_000_000-{offset}        [BCC.W <label>]
  2098:             //JBNCS.W <label>                                 |A|012346|-|----*|-----|          |0110_010_000_000_000-{offset}        [BCC.W <label>]
  2099:             //JBNLO.W <label>                                 |A|012346|-|----*|-----|          |0110_010_000_000_000-{offset}        [BCC.W <label>]
  2100:             //BCC.S <label>                                   |-|012346|-|----*|-----|          |0110_010_000_sss_sss (s is not equal to 0)
  2101:             //BHS.S <label>                                   |A|012346|-|----*|-----|          |0110_010_000_sss_sss (s is not equal to 0)   [BCC.S <label>]
  2102:             //BNCS.S <label>                                  |A|012346|-|----*|-----|          |0110_010_000_sss_sss (s is not equal to 0)   [BCC.S <label>]
  2103:             //BNLO.S <label>                                  |A|012346|-|----*|-----|          |0110_010_000_sss_sss (s is not equal to 0)   [BCC.S <label>]
  2104:             //JBCC.S <label>                                  |A|012346|-|----*|-----|          |0110_010_000_sss_sss (s is not equal to 0)   [BCC.S <label>]
  2105:             //JBHS.S <label>                                  |A|012346|-|----*|-----|          |0110_010_000_sss_sss (s is not equal to 0)   [BCC.S <label>]
  2106:             //JBNCS.S <label>                                 |A|012346|-|----*|-----|          |0110_010_000_sss_sss (s is not equal to 0)   [BCC.S <label>]
  2107:             //JBNLO.S <label>                                 |A|012346|-|----*|-----|          |0110_010_000_sss_sss (s is not equal to 0)   [BCC.S <label>]
  2108:             //JBCS.L <label>                                  |A|012346|-|----*|-----|          |0110_010_000_000_110-0100111011111001-{address}      [BCC.S (*)+8;JMP <label>]
  2109:             //JBLO.L <label>                                  |A|012346|-|----*|-----|          |0110_010_000_000_110-0100111011111001-{address}      [BCC.S (*)+8;JMP <label>]
  2110:             //JBNCC.L <label>                                 |A|012346|-|----*|-----|          |0110_010_000_000_110-0100111011111001-{address}      [BCC.S (*)+8;JMP <label>]
  2111:             //JBNHS.L <label>                                 |A|012346|-|----*|-----|          |0110_010_000_000_110-0100111011111001-{address}      [BCC.S (*)+8;JMP <label>]
  2112:           case 0b0110_010_000:
  2113:             irpBhssw ();
  2114:             break irpSwitch;
  2115: 
  2116:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2117:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2118:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2119:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2120:             //BCC.S <label>                                   |-|012346|-|----*|-----|          |0110_010_001_sss_sss
  2121:             //BHS.S <label>                                   |A|012346|-|----*|-----|          |0110_010_001_sss_sss [BCC.S <label>]
  2122:             //BNCS.S <label>                                  |A|012346|-|----*|-----|          |0110_010_001_sss_sss [BCC.S <label>]
  2123:             //BNLO.S <label>                                  |A|012346|-|----*|-----|          |0110_010_001_sss_sss [BCC.S <label>]
  2124:             //JBCC.S <label>                                  |A|012346|-|----*|-----|          |0110_010_001_sss_sss [BCC.S <label>]
  2125:             //JBHS.S <label>                                  |A|012346|-|----*|-----|          |0110_010_001_sss_sss [BCC.S <label>]
  2126:             //JBNCS.S <label>                                 |A|012346|-|----*|-----|          |0110_010_001_sss_sss [BCC.S <label>]
  2127:             //JBNLO.S <label>                                 |A|012346|-|----*|-----|          |0110_010_001_sss_sss [BCC.S <label>]
  2128:           case 0b0110_010_001:
  2129:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2130:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2131:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2132:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2133:             //BCC.S <label>                                   |-|012346|-|----*|-----|          |0110_010_010_sss_sss
  2134:             //BHS.S <label>                                   |A|012346|-|----*|-----|          |0110_010_010_sss_sss [BCC.S <label>]
  2135:             //BNCS.S <label>                                  |A|012346|-|----*|-----|          |0110_010_010_sss_sss [BCC.S <label>]
  2136:             //BNLO.S <label>                                  |A|012346|-|----*|-----|          |0110_010_010_sss_sss [BCC.S <label>]
  2137:             //JBCC.S <label>                                  |A|012346|-|----*|-----|          |0110_010_010_sss_sss [BCC.S <label>]
  2138:             //JBHS.S <label>                                  |A|012346|-|----*|-----|          |0110_010_010_sss_sss [BCC.S <label>]
  2139:             //JBNCS.S <label>                                 |A|012346|-|----*|-----|          |0110_010_010_sss_sss [BCC.S <label>]
  2140:             //JBNLO.S <label>                                 |A|012346|-|----*|-----|          |0110_010_010_sss_sss [BCC.S <label>]
  2141:           case 0b0110_010_010:
  2142:             irpBhss ();
  2143:             break irpSwitch;
  2144: 
  2145:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2146:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2147:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2148:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2149:             //BCC.S <label>                                   |-|--2346|-|----*|-----|          |0110_010_011_sss_sss (s is not equal to 63)
  2150:             //BHS.S <label>                                   |A|--2346|-|----*|-----|          |0110_010_011_sss_sss (s is not equal to 63)  [BCC.S <label>]
  2151:             //BNCS.S <label>                                  |A|--2346|-|----*|-----|          |0110_010_011_sss_sss (s is not equal to 63)  [BCC.S <label>]
  2152:             //BNLO.S <label>                                  |A|--2346|-|----*|-----|          |0110_010_011_sss_sss (s is not equal to 63)  [BCC.S <label>]
  2153:             //JBCC.S <label>                                  |A|--2346|-|----*|-----|          |0110_010_011_sss_sss (s is not equal to 63)  [BCC.S <label>]
  2154:             //JBHS.S <label>                                  |A|--2346|-|----*|-----|          |0110_010_011_sss_sss (s is not equal to 63)  [BCC.S <label>]
  2155:             //JBNCS.S <label>                                 |A|--2346|-|----*|-----|          |0110_010_011_sss_sss (s is not equal to 63)  [BCC.S <label>]
  2156:             //JBNLO.S <label>                                 |A|--2346|-|----*|-----|          |0110_010_011_sss_sss (s is not equal to 63)  [BCC.S <label>]
  2157:             //BCC.L <label>                                   |-|--2346|-|----*|-----|          |0110_010_011_111_111-{offset}
  2158:             //BHS.L <label>                                   |A|--2346|-|----*|-----|          |0110_010_011_111_111-{offset}        [BCC.L <label>]
  2159:             //BNCS.L <label>                                  |A|--2346|-|----*|-----|          |0110_010_011_111_111-{offset}        [BCC.L <label>]
  2160:             //BNLO.L <label>                                  |A|--2346|-|----*|-----|          |0110_010_011_111_111-{offset}        [BCC.L <label>]
  2161:           case 0b0110_010_011:
  2162:             irpBhssl ();
  2163:             break irpSwitch;
  2164: 
  2165:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2166:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2167:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2168:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2169:             //BCS.W <label>                                   |-|012346|-|----*|-----|          |0110_010_100_000_000-{offset}
  2170:             //BLO.W <label>                                   |A|012346|-|----*|-----|          |0110_010_100_000_000-{offset}        [BCS.W <label>]
  2171:             //BNCC.W <label>                                  |A|012346|-|----*|-----|          |0110_010_100_000_000-{offset}        [BCS.W <label>]
  2172:             //BNHS.W <label>                                  |A|012346|-|----*|-----|          |0110_010_100_000_000-{offset}        [BCS.W <label>]
  2173:             //JBCS.W <label>                                  |A|012346|-|----*|-----|          |0110_010_100_000_000-{offset}        [BCS.W <label>]
  2174:             //JBLO.W <label>                                  |A|012346|-|----*|-----|          |0110_010_100_000_000-{offset}        [BCS.W <label>]
  2175:             //JBNCC.W <label>                                 |A|012346|-|----*|-----|          |0110_010_100_000_000-{offset}        [BCS.W <label>]
  2176:             //JBNHS.W <label>                                 |A|012346|-|----*|-----|          |0110_010_100_000_000-{offset}        [BCS.W <label>]
  2177:             //BCS.S <label>                                   |-|012346|-|----*|-----|          |0110_010_100_sss_sss (s is not equal to 0)
  2178:             //BLO.S <label>                                   |A|012346|-|----*|-----|          |0110_010_100_sss_sss (s is not equal to 0)   [BCS.S <label>]
  2179:             //BNCC.S <label>                                  |A|012346|-|----*|-----|          |0110_010_100_sss_sss (s is not equal to 0)   [BCS.S <label>]
  2180:             //BNHS.S <label>                                  |A|012346|-|----*|-----|          |0110_010_100_sss_sss (s is not equal to 0)   [BCS.S <label>]
  2181:             //JBCS.S <label>                                  |A|012346|-|----*|-----|          |0110_010_100_sss_sss (s is not equal to 0)   [BCS.S <label>]
  2182:             //JBLO.S <label>                                  |A|012346|-|----*|-----|          |0110_010_100_sss_sss (s is not equal to 0)   [BCS.S <label>]
  2183:             //JBNCC.S <label>                                 |A|012346|-|----*|-----|          |0110_010_100_sss_sss (s is not equal to 0)   [BCS.S <label>]
  2184:             //JBNHS.S <label>                                 |A|012346|-|----*|-----|          |0110_010_100_sss_sss (s is not equal to 0)   [BCS.S <label>]
  2185:             //JBCC.L <label>                                  |A|012346|-|----*|-----|          |0110_010_100_000_110-0100111011111001-{address}      [BCS.S (*)+8;JMP <label>]
  2186:             //JBHS.L <label>                                  |A|012346|-|----*|-----|          |0110_010_100_000_110-0100111011111001-{address}      [BCS.S (*)+8;JMP <label>]
  2187:             //JBNCS.L <label>                                 |A|012346|-|----*|-----|          |0110_010_100_000_110-0100111011111001-{address}      [BCS.S (*)+8;JMP <label>]
  2188:             //JBNLO.L <label>                                 |A|012346|-|----*|-----|          |0110_010_100_000_110-0100111011111001-{address}      [BCS.S (*)+8;JMP <label>]
  2189:           case 0b0110_010_100:
  2190:             irpBlosw ();
  2191:             break irpSwitch;
  2192: 
  2193:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2194:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2195:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2196:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2197:             //BCS.S <label>                                   |-|012346|-|----*|-----|          |0110_010_101_sss_sss
  2198:             //BLO.S <label>                                   |A|012346|-|----*|-----|          |0110_010_101_sss_sss [BCS.S <label>]
  2199:             //BNCC.S <label>                                  |A|012346|-|----*|-----|          |0110_010_101_sss_sss [BCS.S <label>]
  2200:             //BNHS.S <label>                                  |A|012346|-|----*|-----|          |0110_010_101_sss_sss [BCS.S <label>]
  2201:             //JBCS.S <label>                                  |A|012346|-|----*|-----|          |0110_010_101_sss_sss [BCS.S <label>]
  2202:             //JBLO.S <label>                                  |A|012346|-|----*|-----|          |0110_010_101_sss_sss [BCS.S <label>]
  2203:             //JBNCC.S <label>                                 |A|012346|-|----*|-----|          |0110_010_101_sss_sss [BCS.S <label>]
  2204:             //JBNHS.S <label>                                 |A|012346|-|----*|-----|          |0110_010_101_sss_sss [BCS.S <label>]
  2205:           case 0b0110_010_101:
  2206:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2207:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2208:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2209:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2210:             //BCS.S <label>                                   |-|012346|-|----*|-----|          |0110_010_110_sss_sss
  2211:             //BLO.S <label>                                   |A|012346|-|----*|-----|          |0110_010_110_sss_sss [BCS.S <label>]
  2212:             //BNCC.S <label>                                  |A|012346|-|----*|-----|          |0110_010_110_sss_sss [BCS.S <label>]
  2213:             //BNHS.S <label>                                  |A|012346|-|----*|-----|          |0110_010_110_sss_sss [BCS.S <label>]
  2214:             //JBCS.S <label>                                  |A|012346|-|----*|-----|          |0110_010_110_sss_sss [BCS.S <label>]
  2215:             //JBLO.S <label>                                  |A|012346|-|----*|-----|          |0110_010_110_sss_sss [BCS.S <label>]
  2216:             //JBNCC.S <label>                                 |A|012346|-|----*|-----|          |0110_010_110_sss_sss [BCS.S <label>]
  2217:             //JBNHS.S <label>                                 |A|012346|-|----*|-----|          |0110_010_110_sss_sss [BCS.S <label>]
  2218:           case 0b0110_010_110:
  2219:             irpBlos ();
  2220:             break irpSwitch;
  2221: 
  2222:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2223:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2224:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2225:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2226:             //BCS.S <label>                                   |-|--2346|-|----*|-----|          |0110_010_111_sss_sss (s is not equal to 63)
  2227:             //BLO.S <label>                                   |A|--2346|-|----*|-----|          |0110_010_111_sss_sss (s is not equal to 63)  [BCS.S <label>]
  2228:             //BNCC.S <label>                                  |A|--2346|-|----*|-----|          |0110_010_111_sss_sss (s is not equal to 63)  [BCS.S <label>]
  2229:             //BNHS.S <label>                                  |A|--2346|-|----*|-----|          |0110_010_111_sss_sss (s is not equal to 63)  [BCS.S <label>]
  2230:             //JBCS.S <label>                                  |A|--2346|-|----*|-----|          |0110_010_111_sss_sss (s is not equal to 63)  [BCS.S <label>]
  2231:             //JBLO.S <label>                                  |A|--2346|-|----*|-----|          |0110_010_111_sss_sss (s is not equal to 63)  [BCS.S <label>]
  2232:             //JBNCC.S <label>                                 |A|--2346|-|----*|-----|          |0110_010_111_sss_sss (s is not equal to 63)  [BCS.S <label>]
  2233:             //JBNHS.S <label>                                 |A|--2346|-|----*|-----|          |0110_010_111_sss_sss (s is not equal to 63)  [BCS.S <label>]
  2234:             //BCS.L <label>                                   |-|--2346|-|----*|-----|          |0110_010_111_111_111-{offset}
  2235:             //BLO.L <label>                                   |A|--2346|-|----*|-----|          |0110_010_111_111_111-{offset}        [BCS.L <label>]
  2236:             //BNCC.L <label>                                  |A|--2346|-|----*|-----|          |0110_010_111_111_111-{offset}        [BCS.L <label>]
  2237:             //BNHS.L <label>                                  |A|--2346|-|----*|-----|          |0110_010_111_111_111-{offset}        [BCS.L <label>]
  2238:           case 0b0110_010_111:
  2239:             irpBlosl ();
  2240:             break irpSwitch;
  2241: 
  2242:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2243:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2244:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2245:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2246:             //BNE.W <label>                                   |-|012346|-|--*--|-----|          |0110_011_000_000_000-{offset}
  2247:             //BNEQ.W <label>                                  |A|012346|-|--*--|-----|          |0110_011_000_000_000-{offset}        [BNE.W <label>]
  2248:             //BNZ.W <label>                                   |A|012346|-|--*--|-----|          |0110_011_000_000_000-{offset}        [BNE.W <label>]
  2249:             //BNZE.W <label>                                  |A|012346|-|--*--|-----|          |0110_011_000_000_000-{offset}        [BNE.W <label>]
  2250:             //JBNE.W <label>                                  |A|012346|-|--*--|-----|          |0110_011_000_000_000-{offset}        [BNE.W <label>]
  2251:             //JBNEQ.W <label>                                 |A|012346|-|--*--|-----|          |0110_011_000_000_000-{offset}        [BNE.W <label>]
  2252:             //JBNZ.W <label>                                  |A|012346|-|--*--|-----|          |0110_011_000_000_000-{offset}        [BNE.W <label>]
  2253:             //JBNZE.W <label>                                 |A|012346|-|--*--|-----|          |0110_011_000_000_000-{offset}        [BNE.W <label>]
  2254:             //BNE.S <label>                                   |-|012346|-|--*--|-----|          |0110_011_000_sss_sss (s is not equal to 0)
  2255:             //BNEQ.S <label>                                  |A|012346|-|--*--|-----|          |0110_011_000_sss_sss (s is not equal to 0)   [BNE.S <label>]
  2256:             //BNZ.S <label>                                   |A|012346|-|--*--|-----|          |0110_011_000_sss_sss (s is not equal to 0)   [BNE.S <label>]
  2257:             //BNZE.S <label>                                  |A|012346|-|--*--|-----|          |0110_011_000_sss_sss (s is not equal to 0)   [BNE.S <label>]
  2258:             //JBNE.S <label>                                  |A|012346|-|--*--|-----|          |0110_011_000_sss_sss (s is not equal to 0)   [BNE.S <label>]
  2259:             //JBNEQ.S <label>                                 |A|012346|-|--*--|-----|          |0110_011_000_sss_sss (s is not equal to 0)   [BNE.S <label>]
  2260:             //JBNZ.S <label>                                  |A|012346|-|--*--|-----|          |0110_011_000_sss_sss (s is not equal to 0)   [BNE.S <label>]
  2261:             //JBNZE.S <label>                                 |A|012346|-|--*--|-----|          |0110_011_000_sss_sss (s is not equal to 0)   [BNE.S <label>]
  2262:             //JBEQ.L <label>                                  |A|012346|-|--*--|-----|          |0110_011_000_000_110-0100111011111001-{address}      [BNE.S (*)+8;JMP <label>]
  2263:             //JBNEQ.L <label>                                 |A|012346|-|--*--|-----|          |0110_011_000_000_110-0100111011111001-{address}      [BNE.S (*)+8;JMP <label>]
  2264:             //JBNNE.L <label>                                 |A|012346|-|--*--|-----|          |0110_011_000_000_110-0100111011111001-{address}      [BNE.S (*)+8;JMP <label>]
  2265:             //JBNNZ.L <label>                                 |A|012346|-|--*--|-----|          |0110_011_000_000_110-0100111011111001-{address}      [BNE.S (*)+8;JMP <label>]
  2266:             //JBNZ.L <label>                                  |A|012346|-|--*--|-----|          |0110_011_000_000_110-0100111011111001-{address}      [BNE.S (*)+8;JMP <label>]
  2267:             //JBNZE.L <label>                                 |A|012346|-|--*--|-----|          |0110_011_000_000_110-0100111011111001-{address}      [BNE.S (*)+8;JMP <label>]
  2268:             //JBZE.L <label>                                  |A|012346|-|--*--|-----|          |0110_011_000_000_110-0100111011111001-{address}      [BNE.S (*)+8;JMP <label>]
  2269:           case 0b0110_011_000:
  2270:             irpBnesw ();
  2271:             break irpSwitch;
  2272: 
  2273:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2274:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2275:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2276:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2277:             //BNE.S <label>                                   |-|012346|-|--*--|-----|          |0110_011_001_sss_sss
  2278:             //BNEQ.S <label>                                  |A|012346|-|--*--|-----|          |0110_011_001_sss_sss [BNE.S <label>]
  2279:             //BNZ.S <label>                                   |A|012346|-|--*--|-----|          |0110_011_001_sss_sss [BNE.S <label>]
  2280:             //BNZE.S <label>                                  |A|012346|-|--*--|-----|          |0110_011_001_sss_sss [BNE.S <label>]
  2281:             //JBNE.S <label>                                  |A|012346|-|--*--|-----|          |0110_011_001_sss_sss [BNE.S <label>]
  2282:             //JBNEQ.S <label>                                 |A|012346|-|--*--|-----|          |0110_011_001_sss_sss [BNE.S <label>]
  2283:             //JBNZ.S <label>                                  |A|012346|-|--*--|-----|          |0110_011_001_sss_sss [BNE.S <label>]
  2284:             //JBNZE.S <label>                                 |A|012346|-|--*--|-----|          |0110_011_001_sss_sss [BNE.S <label>]
  2285:           case 0b0110_011_001:
  2286:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2287:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2288:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2289:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2290:             //BNE.S <label>                                   |-|012346|-|--*--|-----|          |0110_011_010_sss_sss
  2291:             //BNEQ.S <label>                                  |A|012346|-|--*--|-----|          |0110_011_010_sss_sss [BNE.S <label>]
  2292:             //BNZ.S <label>                                   |A|012346|-|--*--|-----|          |0110_011_010_sss_sss [BNE.S <label>]
  2293:             //BNZE.S <label>                                  |A|012346|-|--*--|-----|          |0110_011_010_sss_sss [BNE.S <label>]
  2294:             //JBNE.S <label>                                  |A|012346|-|--*--|-----|          |0110_011_010_sss_sss [BNE.S <label>]
  2295:             //JBNEQ.S <label>                                 |A|012346|-|--*--|-----|          |0110_011_010_sss_sss [BNE.S <label>]
  2296:             //JBNZ.S <label>                                  |A|012346|-|--*--|-----|          |0110_011_010_sss_sss [BNE.S <label>]
  2297:             //JBNZE.S <label>                                 |A|012346|-|--*--|-----|          |0110_011_010_sss_sss [BNE.S <label>]
  2298:           case 0b0110_011_010:
  2299:             irpBnes ();
  2300:             break irpSwitch;
  2301: 
  2302:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2303:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2304:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2305:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2306:             //BNE.S <label>                                   |-|--2346|-|--*--|-----|          |0110_011_011_sss_sss (s is not equal to 63)
  2307:             //BNEQ.S <label>                                  |A|--2346|-|--*--|-----|          |0110_011_011_sss_sss (s is not equal to 63)  [BNE.S <label>]
  2308:             //BNZ.S <label>                                   |A|--2346|-|--*--|-----|          |0110_011_011_sss_sss (s is not equal to 63)  [BNE.S <label>]
  2309:             //BNZE.S <label>                                  |A|--2346|-|--*--|-----|          |0110_011_011_sss_sss (s is not equal to 63)  [BNE.S <label>]
  2310:             //JBNE.S <label>                                  |A|--2346|-|--*--|-----|          |0110_011_011_sss_sss (s is not equal to 63)  [BNE.S <label>]
  2311:             //JBNEQ.S <label>                                 |A|--2346|-|--*--|-----|          |0110_011_011_sss_sss (s is not equal to 63)  [BNE.S <label>]
  2312:             //JBNZ.S <label>                                  |A|--2346|-|--*--|-----|          |0110_011_011_sss_sss (s is not equal to 63)  [BNE.S <label>]
  2313:             //JBNZE.S <label>                                 |A|--2346|-|--*--|-----|          |0110_011_011_sss_sss (s is not equal to 63)  [BNE.S <label>]
  2314:             //BNE.L <label>                                   |-|--2346|-|--*--|-----|          |0110_011_011_111_111-{offset}
  2315:             //BNEQ.L <label>                                  |A|--2346|-|--*--|-----|          |0110_011_011_111_111-{offset}        [BNE.L <label>]
  2316:             //BNZ.L <label>                                   |A|--2346|-|--*--|-----|          |0110_011_011_111_111-{offset}        [BNE.L <label>]
  2317:             //BNZE.L <label>                                  |A|--2346|-|--*--|-----|          |0110_011_011_111_111-{offset}        [BNE.L <label>]
  2318:           case 0b0110_011_011:
  2319:             irpBnesl ();
  2320:             break irpSwitch;
  2321: 
  2322:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2323:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2324:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2325:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2326:             //BEQ.W <label>                                   |-|012346|-|--*--|-----|          |0110_011_100_000_000-{offset}
  2327:             //BNNE.W <label>                                  |A|012346|-|--*--|-----|          |0110_011_100_000_000-{offset}        [BEQ.W <label>]
  2328:             //BNNZ.W <label>                                  |A|012346|-|--*--|-----|          |0110_011_100_000_000-{offset}        [BEQ.W <label>]
  2329:             //BZE.W <label>                                   |A|012346|-|--*--|-----|          |0110_011_100_000_000-{offset}        [BEQ.W <label>]
  2330:             //JBEQ.W <label>                                  |A|012346|-|--*--|-----|          |0110_011_100_000_000-{offset}        [BEQ.W <label>]
  2331:             //JBNNE.W <label>                                 |A|012346|-|--*--|-----|          |0110_011_100_000_000-{offset}        [BEQ.W <label>]
  2332:             //JBNNZ.W <label>                                 |A|012346|-|--*--|-----|          |0110_011_100_000_000-{offset}        [BEQ.W <label>]
  2333:             //JBZE.W <label>                                  |A|012346|-|--*--|-----|          |0110_011_100_000_000-{offset}        [BEQ.W <label>]
  2334:             //BEQ.S <label>                                   |-|012346|-|--*--|-----|          |0110_011_100_sss_sss (s is not equal to 0)
  2335:             //BNNE.S <label>                                  |A|012346|-|--*--|-----|          |0110_011_100_sss_sss (s is not equal to 0)   [BEQ.S <label>]
  2336:             //BNNZ.S <label>                                  |A|012346|-|--*--|-----|          |0110_011_100_sss_sss (s is not equal to 0)   [BEQ.S <label>]
  2337:             //BZE.S <label>                                   |A|012346|-|--*--|-----|          |0110_011_100_sss_sss (s is not equal to 0)   [BEQ.S <label>]
  2338:             //JBEQ.S <label>                                  |A|012346|-|--*--|-----|          |0110_011_100_sss_sss (s is not equal to 0)   [BEQ.S <label>]
  2339:             //JBNNE.S <label>                                 |A|012346|-|--*--|-----|          |0110_011_100_sss_sss (s is not equal to 0)   [BEQ.S <label>]
  2340:             //JBNNZ.S <label>                                 |A|012346|-|--*--|-----|          |0110_011_100_sss_sss (s is not equal to 0)   [BEQ.S <label>]
  2341:             //JBZE.S <label>                                  |A|012346|-|--*--|-----|          |0110_011_100_sss_sss (s is not equal to 0)   [BEQ.S <label>]
  2342:             //JBNE.L <label>                                  |A|012346|-|--*--|-----|          |0110_011_100_000_110-0100111011111001-{address}      [BEQ.S (*)+8;JMP <label>]
  2343:           case 0b0110_011_100:
  2344:             irpBeqsw ();
  2345:             break irpSwitch;
  2346: 
  2347:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2348:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2349:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2350:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2351:             //BEQ.S <label>                                   |-|012346|-|--*--|-----|          |0110_011_101_sss_sss
  2352:             //BNNE.S <label>                                  |A|012346|-|--*--|-----|          |0110_011_101_sss_sss [BEQ.S <label>]
  2353:             //BNNZ.S <label>                                  |A|012346|-|--*--|-----|          |0110_011_101_sss_sss [BEQ.S <label>]
  2354:             //BZE.S <label>                                   |A|012346|-|--*--|-----|          |0110_011_101_sss_sss [BEQ.S <label>]
  2355:             //JBEQ.S <label>                                  |A|012346|-|--*--|-----|          |0110_011_101_sss_sss [BEQ.S <label>]
  2356:             //JBNNE.S <label>                                 |A|012346|-|--*--|-----|          |0110_011_101_sss_sss [BEQ.S <label>]
  2357:             //JBNNZ.S <label>                                 |A|012346|-|--*--|-----|          |0110_011_101_sss_sss [BEQ.S <label>]
  2358:             //JBZE.S <label>                                  |A|012346|-|--*--|-----|          |0110_011_101_sss_sss [BEQ.S <label>]
  2359:           case 0b0110_011_101:
  2360:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2361:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2362:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2363:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2364:             //BEQ.S <label>                                   |-|012346|-|--*--|-----|          |0110_011_110_sss_sss
  2365:             //BNNE.S <label>                                  |A|012346|-|--*--|-----|          |0110_011_110_sss_sss [BEQ.S <label>]
  2366:             //BNNZ.S <label>                                  |A|012346|-|--*--|-----|          |0110_011_110_sss_sss [BEQ.S <label>]
  2367:             //BZE.S <label>                                   |A|012346|-|--*--|-----|          |0110_011_110_sss_sss [BEQ.S <label>]
  2368:             //JBEQ.S <label>                                  |A|012346|-|--*--|-----|          |0110_011_110_sss_sss [BEQ.S <label>]
  2369:             //JBNNE.S <label>                                 |A|012346|-|--*--|-----|          |0110_011_110_sss_sss [BEQ.S <label>]
  2370:             //JBNNZ.S <label>                                 |A|012346|-|--*--|-----|          |0110_011_110_sss_sss [BEQ.S <label>]
  2371:             //JBZE.S <label>                                  |A|012346|-|--*--|-----|          |0110_011_110_sss_sss [BEQ.S <label>]
  2372:           case 0b0110_011_110:
  2373:             irpBeqs ();
  2374:             break irpSwitch;
  2375: 
  2376:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2377:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2378:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2379:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2380:             //BEQ.S <label>                                   |-|--2346|-|--*--|-----|          |0110_011_111_sss_sss (s is not equal to 63)
  2381:             //BNNE.S <label>                                  |A|--2346|-|--*--|-----|          |0110_011_111_sss_sss (s is not equal to 63)  [BEQ.S <label>]
  2382:             //BNNZ.S <label>                                  |A|--2346|-|--*--|-----|          |0110_011_111_sss_sss (s is not equal to 63)  [BEQ.S <label>]
  2383:             //BZE.S <label>                                   |A|--2346|-|--*--|-----|          |0110_011_111_sss_sss (s is not equal to 63)  [BEQ.S <label>]
  2384:             //JBEQ.S <label>                                  |A|--2346|-|--*--|-----|          |0110_011_111_sss_sss (s is not equal to 63)  [BEQ.S <label>]
  2385:             //JBNNE.S <label>                                 |A|--2346|-|--*--|-----|          |0110_011_111_sss_sss (s is not equal to 63)  [BEQ.S <label>]
  2386:             //JBNNZ.S <label>                                 |A|--2346|-|--*--|-----|          |0110_011_111_sss_sss (s is not equal to 63)  [BEQ.S <label>]
  2387:             //JBZE.S <label>                                  |A|--2346|-|--*--|-----|          |0110_011_111_sss_sss (s is not equal to 63)  [BEQ.S <label>]
  2388:             //BEQ.L <label>                                   |-|--2346|-|--*--|-----|          |0110_011_111_111_111-{offset}
  2389:             //BNNE.L <label>                                  |A|--2346|-|--*--|-----|          |0110_011_111_111_111-{offset}        [BEQ.L <label>]
  2390:             //BNNZ.L <label>                                  |A|--2346|-|--*--|-----|          |0110_011_111_111_111-{offset}        [BEQ.L <label>]
  2391:             //BZE.L <label>                                   |A|--2346|-|--*--|-----|          |0110_011_111_111_111-{offset}        [BEQ.L <label>]
  2392:           case 0b0110_011_111:
  2393:             irpBeqsl ();
  2394:             break irpSwitch;
  2395: 
  2396:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2397:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2398:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2399:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2400:             //BVC.W <label>                                   |-|012346|-|---*-|-----|          |0110_100_000_000_000-{offset}
  2401:             //BNVS.W <label>                                  |A|012346|-|---*-|-----|          |0110_100_000_000_000-{offset}        [BVC.W <label>]
  2402:             //JBNVS.W <label>                                 |A|012346|-|---*-|-----|          |0110_100_000_000_000-{offset}        [BVC.W <label>]
  2403:             //JBVC.W <label>                                  |A|012346|-|---*-|-----|          |0110_100_000_000_000-{offset}        [BVC.W <label>]
  2404:             //BVC.S <label>                                   |-|012346|-|---*-|-----|          |0110_100_000_sss_sss (s is not equal to 0)
  2405:             //BNVS.S <label>                                  |A|012346|-|---*-|-----|          |0110_100_000_sss_sss (s is not equal to 0)   [BVC.S <label>]
  2406:             //JBNVS.S <label>                                 |A|012346|-|---*-|-----|          |0110_100_000_sss_sss (s is not equal to 0)   [BVC.S <label>]
  2407:             //JBVC.S <label>                                  |A|012346|-|---*-|-----|          |0110_100_000_sss_sss (s is not equal to 0)   [BVC.S <label>]
  2408:             //JBNVC.L <label>                                 |A|012346|-|---*-|-----|          |0110_100_000_000_110-0100111011111001-{address}      [BVC.S (*)+8;JMP <label>]
  2409:             //JBVS.L <label>                                  |A|012346|-|---*-|-----|          |0110_100_000_000_110-0100111011111001-{address}      [BVC.S (*)+8;JMP <label>]
  2410:           case 0b0110_100_000:
  2411:             irpBvcsw ();
  2412:             break irpSwitch;
  2413: 
  2414:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2415:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2416:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2417:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2418:             //BVC.S <label>                                   |-|012346|-|---*-|-----|          |0110_100_001_sss_sss
  2419:             //BNVS.S <label>                                  |A|012346|-|---*-|-----|          |0110_100_001_sss_sss [BVC.S <label>]
  2420:             //JBNVS.S <label>                                 |A|012346|-|---*-|-----|          |0110_100_001_sss_sss [BVC.S <label>]
  2421:             //JBVC.S <label>                                  |A|012346|-|---*-|-----|          |0110_100_001_sss_sss [BVC.S <label>]
  2422:           case 0b0110_100_001:
  2423:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2424:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2425:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2426:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2427:             //BVC.S <label>                                   |-|012346|-|---*-|-----|          |0110_100_010_sss_sss
  2428:             //BNVS.S <label>                                  |A|012346|-|---*-|-----|          |0110_100_010_sss_sss [BVC.S <label>]
  2429:             //JBNVS.S <label>                                 |A|012346|-|---*-|-----|          |0110_100_010_sss_sss [BVC.S <label>]
  2430:             //JBVC.S <label>                                  |A|012346|-|---*-|-----|          |0110_100_010_sss_sss [BVC.S <label>]
  2431:           case 0b0110_100_010:
  2432:             irpBvcs ();
  2433:             break irpSwitch;
  2434: 
  2435:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2436:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2437:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2438:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2439:             //BVC.S <label>                                   |-|--2346|-|---*-|-----|          |0110_100_011_sss_sss (s is not equal to 63)
  2440:             //BNVS.S <label>                                  |A|--2346|-|---*-|-----|          |0110_100_011_sss_sss (s is not equal to 63)  [BVC.S <label>]
  2441:             //JBNVS.S <label>                                 |A|--2346|-|---*-|-----|          |0110_100_011_sss_sss (s is not equal to 63)  [BVC.S <label>]
  2442:             //JBVC.S <label>                                  |A|--2346|-|---*-|-----|          |0110_100_011_sss_sss (s is not equal to 63)  [BVC.S <label>]
  2443:             //BVC.L <label>                                   |-|--2346|-|---*-|-----|          |0110_100_011_111_111-{offset}
  2444:             //BNVS.L <label>                                  |A|--2346|-|---*-|-----|          |0110_100_011_111_111-{offset}        [BVC.L <label>]
  2445:           case 0b0110_100_011:
  2446:             irpBvcsl ();
  2447:             break irpSwitch;
  2448: 
  2449:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2450:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2451:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2452:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2453:             //BVS.W <label>                                   |-|012346|-|---*-|-----|          |0110_100_100_000_000-{offset}
  2454:             //BNVC.W <label>                                  |A|012346|-|---*-|-----|          |0110_100_100_000_000-{offset}        [BVS.W <label>]
  2455:             //JBNVC.W <label>                                 |A|012346|-|---*-|-----|          |0110_100_100_000_000-{offset}        [BVS.W <label>]
  2456:             //JBVS.W <label>                                  |A|012346|-|---*-|-----|          |0110_100_100_000_000-{offset}        [BVS.W <label>]
  2457:             //BVS.S <label>                                   |-|012346|-|---*-|-----|          |0110_100_100_sss_sss (s is not equal to 0)
  2458:             //BNVC.S <label>                                  |A|012346|-|---*-|-----|          |0110_100_100_sss_sss (s is not equal to 0)   [BVS.S <label>]
  2459:             //JBNVC.S <label>                                 |A|012346|-|---*-|-----|          |0110_100_100_sss_sss (s is not equal to 0)   [BVS.S <label>]
  2460:             //JBVS.S <label>                                  |A|012346|-|---*-|-----|          |0110_100_100_sss_sss (s is not equal to 0)   [BVS.S <label>]
  2461:             //JBNVS.L <label>                                 |A|012346|-|---*-|-----|          |0110_100_100_000_110-0100111011111001-{address}      [BVS.S (*)+8;JMP <label>]
  2462:             //JBVC.L <label>                                  |A|012346|-|---*-|-----|          |0110_100_100_000_110-0100111011111001-{address}      [BVS.S (*)+8;JMP <label>]
  2463:           case 0b0110_100_100:
  2464:             irpBvssw ();
  2465:             break irpSwitch;
  2466: 
  2467:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2468:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2469:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2470:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2471:             //BVS.S <label>                                   |-|012346|-|---*-|-----|          |0110_100_101_sss_sss
  2472:             //BNVC.S <label>                                  |A|012346|-|---*-|-----|          |0110_100_101_sss_sss [BVS.S <label>]
  2473:             //JBNVC.S <label>                                 |A|012346|-|---*-|-----|          |0110_100_101_sss_sss [BVS.S <label>]
  2474:             //JBVS.S <label>                                  |A|012346|-|---*-|-----|          |0110_100_101_sss_sss [BVS.S <label>]
  2475:           case 0b0110_100_101:
  2476:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2477:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2478:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2479:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2480:             //BVS.S <label>                                   |-|012346|-|---*-|-----|          |0110_100_110_sss_sss
  2481:             //BNVC.S <label>                                  |A|012346|-|---*-|-----|          |0110_100_110_sss_sss [BVS.S <label>]
  2482:             //JBNVC.S <label>                                 |A|012346|-|---*-|-----|          |0110_100_110_sss_sss [BVS.S <label>]
  2483:             //JBVS.S <label>                                  |A|012346|-|---*-|-----|          |0110_100_110_sss_sss [BVS.S <label>]
  2484:           case 0b0110_100_110:
  2485:             irpBvss ();
  2486:             break irpSwitch;
  2487: 
  2488:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2489:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2490:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2491:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2492:             //BVS.S <label>                                   |-|--2346|-|---*-|-----|          |0110_100_111_sss_sss (s is not equal to 63)
  2493:             //BNVC.S <label>                                  |A|--2346|-|---*-|-----|          |0110_100_111_sss_sss (s is not equal to 63)  [BVS.S <label>]
  2494:             //JBNVC.S <label>                                 |A|--2346|-|---*-|-----|          |0110_100_111_sss_sss (s is not equal to 63)  [BVS.S <label>]
  2495:             //JBVS.S <label>                                  |A|--2346|-|---*-|-----|          |0110_100_111_sss_sss (s is not equal to 63)  [BVS.S <label>]
  2496:             //BVS.L <label>                                   |-|--2346|-|---*-|-----|          |0110_100_111_111_111-{offset}
  2497:             //BNVC.L <label>                                  |A|--2346|-|---*-|-----|          |0110_100_111_111_111-{offset}        [BVS.L <label>]
  2498:           case 0b0110_100_111:
  2499:             irpBvssl ();
  2500:             break irpSwitch;
  2501: 
  2502:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2503:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2504:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2505:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2506:             //BPL.W <label>                                   |-|012346|-|-*---|-----|          |0110_101_000_000_000-{offset}
  2507:             //BNMI.W <label>                                  |A|012346|-|-*---|-----|          |0110_101_000_000_000-{offset}        [BPL.W <label>]
  2508:             //JBNMI.W <label>                                 |A|012346|-|-*---|-----|          |0110_101_000_000_000-{offset}        [BPL.W <label>]
  2509:             //JBPL.W <label>                                  |A|012346|-|-*---|-----|          |0110_101_000_000_000-{offset}        [BPL.W <label>]
  2510:             //BPL.S <label>                                   |-|012346|-|-*---|-----|          |0110_101_000_sss_sss (s is not equal to 0)
  2511:             //BNMI.S <label>                                  |A|012346|-|-*---|-----|          |0110_101_000_sss_sss (s is not equal to 0)   [BPL.S <label>]
  2512:             //JBNMI.S <label>                                 |A|012346|-|-*---|-----|          |0110_101_000_sss_sss (s is not equal to 0)   [BPL.S <label>]
  2513:             //JBPL.S <label>                                  |A|012346|-|-*---|-----|          |0110_101_000_sss_sss (s is not equal to 0)   [BPL.S <label>]
  2514:             //JBMI.L <label>                                  |A|012346|-|-*---|-----|          |0110_101_000_000_110-0100111011111001-{address}      [BPL.S (*)+8;JMP <label>]
  2515:             //JBNPL.L <label>                                 |A|012346|-|-*---|-----|          |0110_101_000_000_110-0100111011111001-{address}      [BPL.S (*)+8;JMP <label>]
  2516:           case 0b0110_101_000:
  2517:             irpBplsw ();
  2518:             break irpSwitch;
  2519: 
  2520:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2521:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2522:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2523:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2524:             //BPL.S <label>                                   |-|012346|-|-*---|-----|          |0110_101_001_sss_sss
  2525:             //BNMI.S <label>                                  |A|012346|-|-*---|-----|          |0110_101_001_sss_sss [BPL.S <label>]
  2526:             //JBNMI.S <label>                                 |A|012346|-|-*---|-----|          |0110_101_001_sss_sss [BPL.S <label>]
  2527:             //JBPL.S <label>                                  |A|012346|-|-*---|-----|          |0110_101_001_sss_sss [BPL.S <label>]
  2528:           case 0b0110_101_001:
  2529:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2530:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2531:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2532:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2533:             //BPL.S <label>                                   |-|012346|-|-*---|-----|          |0110_101_010_sss_sss
  2534:             //BNMI.S <label>                                  |A|012346|-|-*---|-----|          |0110_101_010_sss_sss [BPL.S <label>]
  2535:             //JBNMI.S <label>                                 |A|012346|-|-*---|-----|          |0110_101_010_sss_sss [BPL.S <label>]
  2536:             //JBPL.S <label>                                  |A|012346|-|-*---|-----|          |0110_101_010_sss_sss [BPL.S <label>]
  2537:           case 0b0110_101_010:
  2538:             irpBpls ();
  2539:             break irpSwitch;
  2540: 
  2541:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2542:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2543:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2544:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2545:             //BPL.S <label>                                   |-|--2346|-|-*---|-----|          |0110_101_011_sss_sss (s is not equal to 63)
  2546:             //BNMI.S <label>                                  |A|--2346|-|-*---|-----|          |0110_101_011_sss_sss (s is not equal to 63)  [BPL.S <label>]
  2547:             //JBNMI.S <label>                                 |A|--2346|-|-*---|-----|          |0110_101_011_sss_sss (s is not equal to 63)  [BPL.S <label>]
  2548:             //JBPL.S <label>                                  |A|--2346|-|-*---|-----|          |0110_101_011_sss_sss (s is not equal to 63)  [BPL.S <label>]
  2549:             //BPL.L <label>                                   |-|--2346|-|-*---|-----|          |0110_101_011_111_111-{offset}
  2550:             //BNMI.L <label>                                  |A|--2346|-|-*---|-----|          |0110_101_011_111_111-{offset}        [BPL.L <label>]
  2551:           case 0b0110_101_011:
  2552:             irpBplsl ();
  2553:             break irpSwitch;
  2554: 
  2555:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2556:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2557:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2558:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2559:             //BMI.W <label>                                   |-|012346|-|-*---|-----|          |0110_101_100_000_000-{offset}
  2560:             //BNPL.W <label>                                  |A|012346|-|-*---|-----|          |0110_101_100_000_000-{offset}        [BMI.W <label>]
  2561:             //JBMI.W <label>                                  |A|012346|-|-*---|-----|          |0110_101_100_000_000-{offset}        [BMI.W <label>]
  2562:             //JBNPL.W <label>                                 |A|012346|-|-*---|-----|          |0110_101_100_000_000-{offset}        [BMI.W <label>]
  2563:             //BMI.S <label>                                   |-|012346|-|-*---|-----|          |0110_101_100_sss_sss (s is not equal to 0)
  2564:             //BNPL.S <label>                                  |A|012346|-|-*---|-----|          |0110_101_100_sss_sss (s is not equal to 0)   [BMI.S <label>]
  2565:             //JBMI.S <label>                                  |A|012346|-|-*---|-----|          |0110_101_100_sss_sss (s is not equal to 0)   [BMI.S <label>]
  2566:             //JBNPL.S <label>                                 |A|012346|-|-*---|-----|          |0110_101_100_sss_sss (s is not equal to 0)   [BMI.S <label>]
  2567:             //JBNMI.L <label>                                 |A|012346|-|-*---|-----|          |0110_101_100_000_110-0100111011111001-{address}      [BMI.S (*)+8;JMP <label>]
  2568:             //JBPL.L <label>                                  |A|012346|-|-*---|-----|          |0110_101_100_000_110-0100111011111001-{address}      [BMI.S (*)+8;JMP <label>]
  2569:           case 0b0110_101_100:
  2570:             irpBmisw ();
  2571:             break irpSwitch;
  2572: 
  2573:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2574:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2575:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2576:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2577:             //BMI.S <label>                                   |-|012346|-|-*---|-----|          |0110_101_101_sss_sss
  2578:             //BNPL.S <label>                                  |A|012346|-|-*---|-----|          |0110_101_101_sss_sss [BMI.S <label>]
  2579:             //JBMI.S <label>                                  |A|012346|-|-*---|-----|          |0110_101_101_sss_sss [BMI.S <label>]
  2580:             //JBNPL.S <label>                                 |A|012346|-|-*---|-----|          |0110_101_101_sss_sss [BMI.S <label>]
  2581:           case 0b0110_101_101:
  2582:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2583:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2584:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2585:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2586:             //BMI.S <label>                                   |-|012346|-|-*---|-----|          |0110_101_110_sss_sss
  2587:             //BNPL.S <label>                                  |A|012346|-|-*---|-----|          |0110_101_110_sss_sss [BMI.S <label>]
  2588:             //JBMI.S <label>                                  |A|012346|-|-*---|-----|          |0110_101_110_sss_sss [BMI.S <label>]
  2589:             //JBNPL.S <label>                                 |A|012346|-|-*---|-----|          |0110_101_110_sss_sss [BMI.S <label>]
  2590:           case 0b0110_101_110:
  2591:             irpBmis ();
  2592:             break irpSwitch;
  2593: 
  2594:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2595:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2596:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2597:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2598:             //BMI.S <label>                                   |-|--2346|-|-*---|-----|          |0110_101_111_sss_sss (s is not equal to 63)
  2599:             //BNPL.S <label>                                  |A|--2346|-|-*---|-----|          |0110_101_111_sss_sss (s is not equal to 63)  [BMI.S <label>]
  2600:             //JBMI.S <label>                                  |A|--2346|-|-*---|-----|          |0110_101_111_sss_sss (s is not equal to 63)  [BMI.S <label>]
  2601:             //JBNPL.S <label>                                 |A|--2346|-|-*---|-----|          |0110_101_111_sss_sss (s is not equal to 63)  [BMI.S <label>]
  2602:             //BMI.L <label>                                   |-|--2346|-|-*---|-----|          |0110_101_111_111_111-{offset}
  2603:             //BNPL.L <label>                                  |A|--2346|-|-*---|-----|          |0110_101_111_111_111-{offset}        [BMI.L <label>]
  2604:           case 0b0110_101_111:
  2605:             irpBmisl ();
  2606:             break irpSwitch;
  2607: 
  2608:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2609:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2610:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2611:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2612:             //BGE.W <label>                                   |-|012346|-|-*-*-|-----|          |0110_110_000_000_000-{offset}
  2613:             //BNLT.W <label>                                  |A|012346|-|-*-*-|-----|          |0110_110_000_000_000-{offset}        [BGE.W <label>]
  2614:             //JBGE.W <label>                                  |A|012346|-|-*-*-|-----|          |0110_110_000_000_000-{offset}        [BGE.W <label>]
  2615:             //JBNLT.W <label>                                 |A|012346|-|-*-*-|-----|          |0110_110_000_000_000-{offset}        [BGE.W <label>]
  2616:             //BGE.S <label>                                   |-|012346|-|-*-*-|-----|          |0110_110_000_sss_sss (s is not equal to 0)
  2617:             //BNLT.S <label>                                  |A|012346|-|-*-*-|-----|          |0110_110_000_sss_sss (s is not equal to 0)   [BGE.S <label>]
  2618:             //JBGE.S <label>                                  |A|012346|-|-*-*-|-----|          |0110_110_000_sss_sss (s is not equal to 0)   [BGE.S <label>]
  2619:             //JBNLT.S <label>                                 |A|012346|-|-*-*-|-----|          |0110_110_000_sss_sss (s is not equal to 0)   [BGE.S <label>]
  2620:             //JBLT.L <label>                                  |A|012346|-|-*-*-|-----|          |0110_110_000_000_110-0100111011111001-{address}      [BGE.S (*)+8;JMP <label>]
  2621:             //JBNGE.L <label>                                 |A|012346|-|-*-*-|-----|          |0110_110_000_000_110-0100111011111001-{address}      [BGE.S (*)+8;JMP <label>]
  2622:           case 0b0110_110_000:
  2623:             irpBgesw ();
  2624:             break irpSwitch;
  2625: 
  2626:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2627:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2628:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2629:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2630:             //BGE.S <label>                                   |-|012346|-|-*-*-|-----|          |0110_110_001_sss_sss
  2631:             //BNLT.S <label>                                  |A|012346|-|-*-*-|-----|          |0110_110_001_sss_sss [BGE.S <label>]
  2632:             //JBGE.S <label>                                  |A|012346|-|-*-*-|-----|          |0110_110_001_sss_sss [BGE.S <label>]
  2633:             //JBNLT.S <label>                                 |A|012346|-|-*-*-|-----|          |0110_110_001_sss_sss [BGE.S <label>]
  2634:           case 0b0110_110_001:
  2635:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2636:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2637:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2638:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2639:             //BGE.S <label>                                   |-|012346|-|-*-*-|-----|          |0110_110_010_sss_sss
  2640:             //BNLT.S <label>                                  |A|012346|-|-*-*-|-----|          |0110_110_010_sss_sss [BGE.S <label>]
  2641:             //JBGE.S <label>                                  |A|012346|-|-*-*-|-----|          |0110_110_010_sss_sss [BGE.S <label>]
  2642:             //JBNLT.S <label>                                 |A|012346|-|-*-*-|-----|          |0110_110_010_sss_sss [BGE.S <label>]
  2643:           case 0b0110_110_010:
  2644:             irpBges ();
  2645:             break irpSwitch;
  2646: 
  2647:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2648:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2649:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2650:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2651:             //BGE.S <label>                                   |-|--2346|-|-*-*-|-----|          |0110_110_011_sss_sss (s is not equal to 63)
  2652:             //BNLT.S <label>                                  |A|--2346|-|-*-*-|-----|          |0110_110_011_sss_sss (s is not equal to 63)  [BGE.S <label>]
  2653:             //JBGE.S <label>                                  |A|--2346|-|-*-*-|-----|          |0110_110_011_sss_sss (s is not equal to 63)  [BGE.S <label>]
  2654:             //JBNLT.S <label>                                 |A|--2346|-|-*-*-|-----|          |0110_110_011_sss_sss (s is not equal to 63)  [BGE.S <label>]
  2655:             //BGE.L <label>                                   |-|--2346|-|-*-*-|-----|          |0110_110_011_111_111-{offset}
  2656:             //BNLT.L <label>                                  |A|--2346|-|-*-*-|-----|          |0110_110_011_111_111-{offset}        [BGE.L <label>]
  2657:           case 0b0110_110_011:
  2658:             irpBgesl ();
  2659:             break irpSwitch;
  2660: 
  2661:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2662:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2663:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2664:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2665:             //BLT.W <label>                                   |-|012346|-|-*-*-|-----|          |0110_110_100_000_000-{offset}
  2666:             //BNGE.W <label>                                  |A|012346|-|-*-*-|-----|          |0110_110_100_000_000-{offset}        [BLT.W <label>]
  2667:             //JBLT.W <label>                                  |A|012346|-|-*-*-|-----|          |0110_110_100_000_000-{offset}        [BLT.W <label>]
  2668:             //JBNGE.W <label>                                 |A|012346|-|-*-*-|-----|          |0110_110_100_000_000-{offset}        [BLT.W <label>]
  2669:             //BLT.S <label>                                   |-|012346|-|-*-*-|-----|          |0110_110_100_sss_sss (s is not equal to 0)
  2670:             //BNGE.S <label>                                  |A|012346|-|-*-*-|-----|          |0110_110_100_sss_sss (s is not equal to 0)   [BLT.S <label>]
  2671:             //JBLT.S <label>                                  |A|012346|-|-*-*-|-----|          |0110_110_100_sss_sss (s is not equal to 0)   [BLT.S <label>]
  2672:             //JBNGE.S <label>                                 |A|012346|-|-*-*-|-----|          |0110_110_100_sss_sss (s is not equal to 0)   [BLT.S <label>]
  2673:             //JBGE.L <label>                                  |A|012346|-|-*-*-|-----|          |0110_110_100_000_110-0100111011111001-{address}      [BLT.S (*)+8;JMP <label>]
  2674:             //JBNLT.L <label>                                 |A|012346|-|-*-*-|-----|          |0110_110_100_000_110-0100111011111001-{address}      [BLT.S (*)+8;JMP <label>]
  2675:           case 0b0110_110_100:
  2676:             irpBltsw ();
  2677:             break irpSwitch;
  2678: 
  2679:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2680:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2681:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2682:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2683:             //BLT.S <label>                                   |-|012346|-|-*-*-|-----|          |0110_110_101_sss_sss
  2684:             //BNGE.S <label>                                  |A|012346|-|-*-*-|-----|          |0110_110_101_sss_sss [BLT.S <label>]
  2685:             //JBLT.S <label>                                  |A|012346|-|-*-*-|-----|          |0110_110_101_sss_sss [BLT.S <label>]
  2686:             //JBNGE.S <label>                                 |A|012346|-|-*-*-|-----|          |0110_110_101_sss_sss [BLT.S <label>]
  2687:           case 0b0110_110_101:
  2688:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2689:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2690:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2691:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2692:             //BLT.S <label>                                   |-|012346|-|-*-*-|-----|          |0110_110_110_sss_sss
  2693:             //BNGE.S <label>                                  |A|012346|-|-*-*-|-----|          |0110_110_110_sss_sss [BLT.S <label>]
  2694:             //JBLT.S <label>                                  |A|012346|-|-*-*-|-----|          |0110_110_110_sss_sss [BLT.S <label>]
  2695:             //JBNGE.S <label>                                 |A|012346|-|-*-*-|-----|          |0110_110_110_sss_sss [BLT.S <label>]
  2696:           case 0b0110_110_110:
  2697:             irpBlts ();
  2698:             break irpSwitch;
  2699: 
  2700:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2701:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2702:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2703:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2704:             //BLT.S <label>                                   |-|--2346|-|-*-*-|-----|          |0110_110_111_sss_sss (s is not equal to 63)
  2705:             //BNGE.S <label>                                  |A|--2346|-|-*-*-|-----|          |0110_110_111_sss_sss (s is not equal to 63)  [BLT.S <label>]
  2706:             //JBLT.S <label>                                  |A|--2346|-|-*-*-|-----|          |0110_110_111_sss_sss (s is not equal to 63)  [BLT.S <label>]
  2707:             //JBNGE.S <label>                                 |A|--2346|-|-*-*-|-----|          |0110_110_111_sss_sss (s is not equal to 63)  [BLT.S <label>]
  2708:             //BLT.L <label>                                   |-|--2346|-|-*-*-|-----|          |0110_110_111_111_111-{offset}
  2709:             //BNGE.L <label>                                  |A|--2346|-|-*-*-|-----|          |0110_110_111_111_111-{offset}        [BLT.L <label>]
  2710:           case 0b0110_110_111:
  2711:             irpBltsl ();
  2712:             break irpSwitch;
  2713: 
  2714:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2715:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2716:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2717:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2718:             //BGT.W <label>                                   |-|012346|-|-***-|-----|          |0110_111_000_000_000-{offset}
  2719:             //BNLE.W <label>                                  |A|012346|-|-***-|-----|          |0110_111_000_000_000-{offset}        [BGT.W <label>]
  2720:             //JBGT.W <label>                                  |A|012346|-|-***-|-----|          |0110_111_000_000_000-{offset}        [BGT.W <label>]
  2721:             //JBNLE.W <label>                                 |A|012346|-|-***-|-----|          |0110_111_000_000_000-{offset}        [BGT.W <label>]
  2722:             //BGT.S <label>                                   |-|012346|-|-***-|-----|          |0110_111_000_sss_sss (s is not equal to 0)
  2723:             //BNLE.S <label>                                  |A|012346|-|-***-|-----|          |0110_111_000_sss_sss (s is not equal to 0)   [BGT.S <label>]
  2724:             //JBGT.S <label>                                  |A|012346|-|-***-|-----|          |0110_111_000_sss_sss (s is not equal to 0)   [BGT.S <label>]
  2725:             //JBNLE.S <label>                                 |A|012346|-|-***-|-----|          |0110_111_000_sss_sss (s is not equal to 0)   [BGT.S <label>]
  2726:             //JBLE.L <label>                                  |A|012346|-|-***-|-----|          |0110_111_000_000_110-0100111011111001-{address}      [BGT.S (*)+8;JMP <label>]
  2727:             //JBNGT.L <label>                                 |A|012346|-|-***-|-----|          |0110_111_000_000_110-0100111011111001-{address}      [BGT.S (*)+8;JMP <label>]
  2728:           case 0b0110_111_000:
  2729:             irpBgtsw ();
  2730:             break irpSwitch;
  2731: 
  2732:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2733:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2734:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2735:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2736:             //BGT.S <label>                                   |-|012346|-|-***-|-----|          |0110_111_001_sss_sss
  2737:             //BNLE.S <label>                                  |A|012346|-|-***-|-----|          |0110_111_001_sss_sss [BGT.S <label>]
  2738:             //JBGT.S <label>                                  |A|012346|-|-***-|-----|          |0110_111_001_sss_sss [BGT.S <label>]
  2739:             //JBNLE.S <label>                                 |A|012346|-|-***-|-----|          |0110_111_001_sss_sss [BGT.S <label>]
  2740:           case 0b0110_111_001:
  2741:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2742:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2743:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2744:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2745:             //BGT.S <label>                                   |-|012346|-|-***-|-----|          |0110_111_010_sss_sss
  2746:             //BNLE.S <label>                                  |A|012346|-|-***-|-----|          |0110_111_010_sss_sss [BGT.S <label>]
  2747:             //JBGT.S <label>                                  |A|012346|-|-***-|-----|          |0110_111_010_sss_sss [BGT.S <label>]
  2748:             //JBNLE.S <label>                                 |A|012346|-|-***-|-----|          |0110_111_010_sss_sss [BGT.S <label>]
  2749:           case 0b0110_111_010:
  2750:             irpBgts ();
  2751:             break irpSwitch;
  2752: 
  2753:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2754:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2755:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2756:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2757:             //BGT.S <label>                                   |-|--2346|-|-***-|-----|          |0110_111_011_sss_sss (s is not equal to 63)
  2758:             //BNLE.S <label>                                  |A|--2346|-|-***-|-----|          |0110_111_011_sss_sss (s is not equal to 63)  [BGT.S <label>]
  2759:             //JBGT.S <label>                                  |A|--2346|-|-***-|-----|          |0110_111_011_sss_sss (s is not equal to 63)  [BGT.S <label>]
  2760:             //JBNLE.S <label>                                 |A|--2346|-|-***-|-----|          |0110_111_011_sss_sss (s is not equal to 63)  [BGT.S <label>]
  2761:             //BGT.L <label>                                   |-|--2346|-|-***-|-----|          |0110_111_011_111_111-{offset}
  2762:             //BNLE.L <label>                                  |A|--2346|-|-***-|-----|          |0110_111_011_111_111-{offset}        [BGT.L <label>]
  2763:           case 0b0110_111_011:
  2764:             irpBgtsl ();
  2765:             break irpSwitch;
  2766: 
  2767:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2768:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2769:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2770:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2771:             //BLE.W <label>                                   |-|012346|-|-***-|-----|          |0110_111_100_000_000-{offset}
  2772:             //BNGT.W <label>                                  |A|012346|-|-***-|-----|          |0110_111_100_000_000-{offset}        [BLE.W <label>]
  2773:             //JBLE.W <label>                                  |A|012346|-|-***-|-----|          |0110_111_100_000_000-{offset}        [BLE.W <label>]
  2774:             //JBNGT.W <label>                                 |A|012346|-|-***-|-----|          |0110_111_100_000_000-{offset}        [BLE.W <label>]
  2775:             //BLE.S <label>                                   |-|012346|-|-***-|-----|          |0110_111_100_sss_sss (s is not equal to 0)
  2776:             //BNGT.S <label>                                  |A|012346|-|-***-|-----|          |0110_111_100_sss_sss (s is not equal to 0)   [BLE.S <label>]
  2777:             //JBLE.S <label>                                  |A|012346|-|-***-|-----|          |0110_111_100_sss_sss (s is not equal to 0)   [BLE.S <label>]
  2778:             //JBNGT.S <label>                                 |A|012346|-|-***-|-----|          |0110_111_100_sss_sss (s is not equal to 0)   [BLE.S <label>]
  2779:             //JBGT.L <label>                                  |A|012346|-|-***-|-----|          |0110_111_100_000_110-0100111011111001-{address}      [BLE.S (*)+8;JMP <label>]
  2780:             //JBNLE.L <label>                                 |A|012346|-|-***-|-----|          |0110_111_100_000_110-0100111011111001-{address}      [BLE.S (*)+8;JMP <label>]
  2781:           case 0b0110_111_100:
  2782:             irpBlesw ();
  2783:             break irpSwitch;
  2784: 
  2785:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2786:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2787:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2788:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2789:             //BLE.S <label>                                   |-|012346|-|-***-|-----|          |0110_111_101_sss_sss
  2790:             //BNGT.S <label>                                  |A|012346|-|-***-|-----|          |0110_111_101_sss_sss [BLE.S <label>]
  2791:             //JBLE.S <label>                                  |A|012346|-|-***-|-----|          |0110_111_101_sss_sss [BLE.S <label>]
  2792:             //JBNGT.S <label>                                 |A|012346|-|-***-|-----|          |0110_111_101_sss_sss [BLE.S <label>]
  2793:           case 0b0110_111_101:
  2794:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2795:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2796:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2797:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2798:             //BLE.S <label>                                   |-|012346|-|-***-|-----|          |0110_111_110_sss_sss
  2799:             //BNGT.S <label>                                  |A|012346|-|-***-|-----|          |0110_111_110_sss_sss [BLE.S <label>]
  2800:             //JBLE.S <label>                                  |A|012346|-|-***-|-----|          |0110_111_110_sss_sss [BLE.S <label>]
  2801:             //JBNGT.S <label>                                 |A|012346|-|-***-|-----|          |0110_111_110_sss_sss [BLE.S <label>]
  2802:           case 0b0110_111_110:
  2803:             irpBles ();
  2804:             break irpSwitch;
  2805: 
  2806:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2807:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2808:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2809:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2810:             //BLE.S <label>                                   |-|--2346|-|-***-|-----|          |0110_111_111_sss_sss (s is not equal to 63)
  2811:             //BNGT.S <label>                                  |A|--2346|-|-***-|-----|          |0110_111_111_sss_sss (s is not equal to 63)  [BLE.S <label>]
  2812:             //JBLE.S <label>                                  |A|--2346|-|-***-|-----|          |0110_111_111_sss_sss (s is not equal to 63)  [BLE.S <label>]
  2813:             //JBNGT.S <label>                                 |A|--2346|-|-***-|-----|          |0110_111_111_sss_sss (s is not equal to 63)  [BLE.S <label>]
  2814:             //BLE.L <label>                                   |-|--2346|-|-***-|-----|          |0110_111_111_111_111-{offset}
  2815:             //BNGT.L <label>                                  |A|--2346|-|-***-|-----|          |0110_111_111_111_111-{offset}        [BLE.L <label>]
  2816:           case 0b0110_111_111:
  2817:             irpBlesl ();
  2818:             break irpSwitch;
  2819: 
  2820:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2821:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2822:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2823:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2824:             //IOCS <name>                                     |A|012346|-|UUUUU|UUUUU|          |0111_000_0dd_ddd_ddd-0100111001001111        [MOVEQ.L #<data>,D0;TRAP #15]
  2825:             //MOVEQ.L #<data>,Dq                              |-|012346|-|-UUUU|-**00|          |0111_qqq_0dd_ddd_ddd
  2826:           case 0b0111_000_000:
  2827:           case 0b0111_000_001:
  2828:           case 0b0111_000_010:
  2829:           case 0b0111_000_011:
  2830:           case 0b0111_001_000:
  2831:           case 0b0111_001_001:
  2832:           case 0b0111_001_010:
  2833:           case 0b0111_001_011:
  2834:           case 0b0111_010_000:
  2835:           case 0b0111_010_001:
  2836:           case 0b0111_010_010:
  2837:           case 0b0111_010_011:
  2838:           case 0b0111_011_000:
  2839:           case 0b0111_011_001:
  2840:           case 0b0111_011_010:
  2841:           case 0b0111_011_011:
  2842:           case 0b0111_100_000:
  2843:           case 0b0111_100_001:
  2844:           case 0b0111_100_010:
  2845:           case 0b0111_100_011:
  2846:           case 0b0111_101_000:
  2847:           case 0b0111_101_001:
  2848:           case 0b0111_101_010:
  2849:           case 0b0111_101_011:
  2850:           case 0b0111_110_000:
  2851:           case 0b0111_110_001:
  2852:           case 0b0111_110_010:
  2853:           case 0b0111_110_011:
  2854:           case 0b0111_111_000:
  2855:           case 0b0111_111_001:
  2856:           case 0b0111_111_010:
  2857:           case 0b0111_111_011:
  2858:             irpMoveq ();
  2859:             break irpSwitch;
  2860: 
  2861:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2862:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2863:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2864:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2865:             //MVS.B <ea>,Dq                                   |-|------|-|-UUUU|-**00|D M+-WXZPI|0111_qqq_100_mmm_rrr (ISA_B)
  2866:           case 0b0111_000_100:
  2867:           case 0b0111_001_100:
  2868:           case 0b0111_010_100:
  2869:           case 0b0111_011_100:
  2870:           case 0b0111_100_100:
  2871:           case 0b0111_101_100:
  2872:           case 0b0111_110_100:
  2873:           case 0b0111_111_100:
  2874:             irpMvsByte ();
  2875:             break irpSwitch;
  2876: 
  2877:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2878:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2879:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2880:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2881:             //MVS.W <ea>,Dq                                   |-|------|-|-UUUU|-**00|D M+-WXZPI|0111_qqq_101_mmm_rrr (ISA_B)
  2882:           case 0b0111_000_101:
  2883:           case 0b0111_001_101:
  2884:           case 0b0111_010_101:
  2885:           case 0b0111_011_101:
  2886:           case 0b0111_100_101:
  2887:           case 0b0111_101_101:
  2888:           case 0b0111_110_101:
  2889:           case 0b0111_111_101:
  2890:             irpMvsWord ();
  2891:             break irpSwitch;
  2892: 
  2893:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2894:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2895:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2896:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2897:             //MVZ.B <ea>,Dq                                   |-|------|-|-UUUU|-0*00|D M+-WXZPI|0111_qqq_110_mmm_rrr (ISA_B)
  2898:           case 0b0111_000_110:
  2899:           case 0b0111_001_110:
  2900:           case 0b0111_010_110:
  2901:           case 0b0111_011_110:
  2902:           case 0b0111_100_110:
  2903:           case 0b0111_101_110:
  2904:           case 0b0111_110_110:
  2905:           case 0b0111_111_110:
  2906:             irpMvzByte ();
  2907:             break irpSwitch;
  2908: 
  2909:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2910:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2911:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2912:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2913:             //MVZ.W <ea>,Dq                                   |-|------|-|-UUUU|-0*00|D M+-WXZPI|0111_qqq_111_mmm_rrr (ISA_B)
  2914:           case 0b0111_000_111:
  2915:           case 0b0111_001_111:
  2916:           case 0b0111_010_111:
  2917:           case 0b0111_011_111:
  2918:           case 0b0111_100_111:
  2919:           case 0b0111_101_111:
  2920:           case 0b0111_110_111:
  2921:           case 0b0111_111_111:
  2922:             irpMvzWord ();
  2923:             break irpSwitch;
  2924: 
  2925:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2926:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2927:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2928:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2929:             //OR.B <ea>,Dq                                    |-|012346|-|-UUUU|-**00|D M+-WXZPI|1000_qqq_000_mmm_rrr
  2930:           case 0b1000_000_000:
  2931:           case 0b1000_001_000:
  2932:           case 0b1000_010_000:
  2933:           case 0b1000_011_000:
  2934:           case 0b1000_100_000:
  2935:           case 0b1000_101_000:
  2936:           case 0b1000_110_000:
  2937:           case 0b1000_111_000:
  2938:             irpOrToRegByte ();
  2939:             break irpSwitch;
  2940: 
  2941:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2942:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2943:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2944:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2945:             //OR.W <ea>,Dq                                    |-|012346|-|-UUUU|-**00|D M+-WXZPI|1000_qqq_001_mmm_rrr
  2946:           case 0b1000_000_001:
  2947:           case 0b1000_001_001:
  2948:           case 0b1000_010_001:
  2949:           case 0b1000_011_001:
  2950:           case 0b1000_100_001:
  2951:           case 0b1000_101_001:
  2952:           case 0b1000_110_001:
  2953:           case 0b1000_111_001:
  2954:             irpOrToRegWord ();
  2955:             break irpSwitch;
  2956: 
  2957:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2958:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2959:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2960:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2961:             //OR.L <ea>,Dq                                    |-|012346|-|-UUUU|-**00|D M+-WXZPI|1000_qqq_010_mmm_rrr
  2962:           case 0b1000_000_010:
  2963:           case 0b1000_001_010:
  2964:           case 0b1000_010_010:
  2965:           case 0b1000_011_010:
  2966:           case 0b1000_100_010:
  2967:           case 0b1000_101_010:
  2968:           case 0b1000_110_010:
  2969:           case 0b1000_111_010:
  2970:             irpOrToRegLong ();
  2971:             break irpSwitch;
  2972: 
  2973:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2974:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2975:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2976:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2977:             //DIVU.W <ea>,Dq                                  |-|012346|-|-UUUU|-***0|D M+-WXZPI|1000_qqq_011_mmm_rrr
  2978:           case 0b1000_000_011:
  2979:           case 0b1000_001_011:
  2980:           case 0b1000_010_011:
  2981:           case 0b1000_011_011:
  2982:           case 0b1000_100_011:
  2983:           case 0b1000_101_011:
  2984:           case 0b1000_110_011:
  2985:           case 0b1000_111_011:
  2986:             irpDivuWord ();
  2987:             break irpSwitch;
  2988: 
  2989:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2990:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2991:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2992:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2993:             //SBCD.B Dr,Dq                                    |-|012346|-|UUUUU|*U*U*|          |1000_qqq_100_000_rrr
  2994:             //SBCD.B -(Ar),-(Aq)                              |-|012346|-|UUUUU|*U*U*|          |1000_qqq_100_001_rrr
  2995:             //OR.B Dq,<ea>                                    |-|012346|-|-UUUU|-**00|  M+-WXZ  |1000_qqq_100_mmm_rrr
  2996:           case 0b1000_000_100:
  2997:           case 0b1000_001_100:
  2998:           case 0b1000_010_100:
  2999:           case 0b1000_011_100:
  3000:           case 0b1000_100_100:
  3001:           case 0b1000_101_100:
  3002:           case 0b1000_110_100:
  3003:           case 0b1000_111_100:
  3004:             irpOrToMemByte ();
  3005:             break irpSwitch;
  3006: 
  3007:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3008:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  3009:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  3010:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3011:             //PACK Dr,Dq,#<data>                              |-|--2346|-|-----|-----|          |1000_qqq_101_000_rrr-{data}
  3012:             //PACK -(Ar),-(Aq),#<data>                        |-|--2346|-|-----|-----|          |1000_qqq_101_001_rrr-{data}
  3013:             //OR.W Dq,<ea>                                    |-|012346|-|-UUUU|-**00|  M+-WXZ  |1000_qqq_101_mmm_rrr
  3014:           case 0b1000_000_101:
  3015:           case 0b1000_001_101:
  3016:           case 0b1000_010_101:
  3017:           case 0b1000_011_101:
  3018:           case 0b1000_100_101:
  3019:           case 0b1000_101_101:
  3020:           case 0b1000_110_101:
  3021:           case 0b1000_111_101:
  3022:             irpOrToMemWord ();
  3023:             break irpSwitch;
  3024: 
  3025:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3026:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  3027:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  3028:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3029:             //UNPK Dr,Dq,#<data>                              |-|--2346|-|-----|-----|          |1000_qqq_110_000_rrr-{data}
  3030:             //UNPK -(Ar),-(Aq),#<data>                        |-|--2346|-|-----|-----|          |1000_qqq_110_001_rrr-{data}
  3031:             //OR.L Dq,<ea>                                    |-|012346|-|-UUUU|-**00|  M+-WXZ  |1000_qqq_110_mmm_rrr
  3032:           case 0b1000_000_110:
  3033:           case 0b1000_001_110:
  3034:           case 0b1000_010_110:
  3035:           case 0b1000_011_110:
  3036:           case 0b1000_100_110:
  3037:           case 0b1000_101_110:
  3038:           case 0b1000_110_110:
  3039:           case 0b1000_111_110:
  3040:             irpOrToMemLong ();
  3041:             break irpSwitch;
  3042: 
  3043:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3044:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  3045:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  3046:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3047:             //DIVS.W <ea>,Dq                                  |-|012346|-|-UUUU|-***0|D M+-WXZPI|1000_qqq_111_mmm_rrr
  3048:           case 0b1000_000_111:
  3049:           case 0b1000_001_111:
  3050:           case 0b1000_010_111:
  3051:           case 0b1000_011_111:
  3052:           case 0b1000_100_111:
  3053:           case 0b1000_101_111:
  3054:           case 0b1000_110_111:
  3055:           case 0b1000_111_111:
  3056:             irpDivsWord ();
  3057:             break irpSwitch;
  3058: 
  3059:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3060:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  3061:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  3062:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3063:             //SUB.B <ea>,Dq                                   |-|012346|-|UUUUU|*****|D M+-WXZPI|1001_qqq_000_mmm_rrr
  3064:           case 0b1001_000_000:
  3065:           case 0b1001_001_000:
  3066:           case 0b1001_010_000:
  3067:           case 0b1001_011_000:
  3068:           case 0b1001_100_000:
  3069:           case 0b1001_101_000:
  3070:           case 0b1001_110_000:
  3071:           case 0b1001_111_000:
  3072:             irpSubToRegByte ();
  3073:             break irpSwitch;
  3074: 
  3075:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3076:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  3077:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  3078:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3079:             //SUB.W <ea>,Dq                                   |-|012346|-|UUUUU|*****|DAM+-WXZPI|1001_qqq_001_mmm_rrr
  3080:           case 0b1001_000_001:
  3081:           case 0b1001_001_001:
  3082:           case 0b1001_010_001:
  3083:           case 0b1001_011_001:
  3084:           case 0b1001_100_001:
  3085:           case 0b1001_101_001:
  3086:           case 0b1001_110_001:
  3087:           case 0b1001_111_001:
  3088:             irpSubToRegWord ();
  3089:             break irpSwitch;
  3090: 
  3091:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3092:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  3093:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  3094:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3095:             //SUB.L <ea>,Dq                                   |-|012346|-|UUUUU|*****|DAM+-WXZPI|1001_qqq_010_mmm_rrr
  3096:           case 0b1001_000_010:
  3097:           case 0b1001_001_010:
  3098:           case 0b1001_010_010:
  3099:           case 0b1001_011_010:
  3100:           case 0b1001_100_010:
  3101:           case 0b1001_101_010:
  3102:           case 0b1001_110_010:
  3103:           case 0b1001_111_010:
  3104:             irpSubToRegLong ();
  3105:             break irpSwitch;
  3106: 
  3107:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3108:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  3109:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  3110:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3111:             //SUBA.W <ea>,Aq                                  |-|012346|-|-----|-----|DAM+-WXZPI|1001_qqq_011_mmm_rrr
  3112:             //SUB.W <ea>,Aq                                   |A|012346|-|-----|-----|DAM+-WXZPI|1001_qqq_011_mmm_rrr [SUBA.W <ea>,Aq]
  3113:             //CLR.W Ar                                        |A|012346|-|-----|-----| A        |1001_rrr_011_001_rrr [SUBA.W Ar,Ar]
  3114:           case 0b1001_000_011:
  3115:           case 0b1001_001_011:
  3116:           case 0b1001_010_011:
  3117:           case 0b1001_011_011:
  3118:           case 0b1001_100_011:
  3119:           case 0b1001_101_011:
  3120:           case 0b1001_110_011:
  3121:           case 0b1001_111_011:
  3122:             irpSubaWord ();
  3123:             break irpSwitch;
  3124: 
  3125:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3126:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  3127:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  3128:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3129:             //SUBX.B Dr,Dq                                    |-|012346|-|*UUUU|*****|          |1001_qqq_100_000_rrr
  3130:             //SUBX.B -(Ar),-(Aq)                              |-|012346|-|*UUUU|*****|          |1001_qqq_100_001_rrr
  3131:             //SUB.B Dq,<ea>                                   |-|012346|-|UUUUU|*****|  M+-WXZ  |1001_qqq_100_mmm_rrr
  3132:           case 0b1001_000_100:
  3133:           case 0b1001_001_100:
  3134:           case 0b1001_010_100:
  3135:           case 0b1001_011_100:
  3136:           case 0b1001_100_100:
  3137:           case 0b1001_101_100:
  3138:           case 0b1001_110_100:
  3139:           case 0b1001_111_100:
  3140:             irpSubToMemByte ();
  3141:             break irpSwitch;
  3142: 
  3143:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3144:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  3145:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  3146:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3147:             //SUBX.W Dr,Dq                                    |-|012346|-|*UUUU|*****|          |1001_qqq_101_000_rrr
  3148:             //SUBX.W -(Ar),-(Aq)                              |-|012346|-|*UUUU|*****|          |1001_qqq_101_001_rrr
  3149:             //SUB.W Dq,<ea>                                   |-|012346|-|UUUUU|*****|  M+-WXZ  |1001_qqq_101_mmm_rrr
  3150:           case 0b1001_000_101:
  3151:           case 0b1001_001_101:
  3152:           case 0b1001_010_101:
  3153:           case 0b1001_011_101:
  3154:           case 0b1001_100_101:
  3155:           case 0b1001_101_101:
  3156:           case 0b1001_110_101:
  3157:           case 0b1001_111_101:
  3158:             irpSubToMemWord ();
  3159:             break irpSwitch;
  3160: 
  3161:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3162:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  3163:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  3164:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3165:             //SUBX.L Dr,Dq                                    |-|012346|-|*UUUU|*****|          |1001_qqq_110_000_rrr
  3166:             //SUBX.L -(Ar),-(Aq)                              |-|012346|-|*UUUU|*****|          |1001_qqq_110_001_rrr
  3167:             //SUB.L Dq,<ea>                                   |-|012346|-|UUUUU|*****|  M+-WXZ  |1001_qqq_110_mmm_rrr
  3168:           case 0b1001_000_110:
  3169:           case 0b1001_001_110:
  3170:           case 0b1001_010_110:
  3171:           case 0b1001_011_110:
  3172:           case 0b1001_100_110:
  3173:           case 0b1001_101_110:
  3174:           case 0b1001_110_110:
  3175:           case 0b1001_111_110:
  3176:             irpSubToMemLong ();
  3177:             break irpSwitch;
  3178: 
  3179:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3180:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  3181:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  3182:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3183:             //SUBA.L <ea>,Aq                                  |-|012346|-|-----|-----|DAM+-WXZPI|1001_qqq_111_mmm_rrr
  3184:             //SUB.L <ea>,Aq                                   |A|012346|-|-----|-----|DAM+-WXZPI|1001_qqq_111_mmm_rrr [SUBA.L <ea>,Aq]
  3185:             //CLR.L Ar                                        |A|012346|-|-----|-----| A        |1001_rrr_111_001_rrr [SUBA.L Ar,Ar]
  3186:           case 0b1001_000_111:
  3187:           case 0b1001_001_111:
  3188:           case 0b1001_010_111:
  3189:           case 0b1001_011_111:
  3190:           case 0b1001_100_111:
  3191:           case 0b1001_101_111:
  3192:           case 0b1001_110_111:
  3193:           case 0b1001_111_111:
  3194:             irpSubaLong ();
  3195:             break irpSwitch;
  3196: 
  3197:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3198:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  3199:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  3200:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3201:             //SXCALL <name>                                   |A|012346|-|UUUUU|*****|          |1010_0dd_ddd_ddd_ddd [ALINE #<data>]
  3202:           case 0b1010_000_000:
  3203:           case 0b1010_000_001:
  3204:           case 0b1010_000_010:
  3205:           case 0b1010_000_011:
  3206:           case 0b1010_000_100:
  3207:           case 0b1010_000_101:
  3208:           case 0b1010_000_110:
  3209:           case 0b1010_000_111:
  3210:           case 0b1010_001_000:
  3211:           case 0b1010_001_001:
  3212:           case 0b1010_001_010:
  3213:           case 0b1010_001_011:
  3214:           case 0b1010_001_100:
  3215:           case 0b1010_001_101:
  3216:           case 0b1010_001_110:
  3217:           case 0b1010_001_111:
  3218:           case 0b1010_010_000:
  3219:           case 0b1010_010_001:
  3220:           case 0b1010_010_010:
  3221:           case 0b1010_010_011:
  3222:           case 0b1010_010_100:
  3223:           case 0b1010_010_101:
  3224:           case 0b1010_010_110:
  3225:           case 0b1010_010_111:
  3226:           case 0b1010_011_000:
  3227:           case 0b1010_011_001:
  3228:           case 0b1010_011_010:
  3229:           case 0b1010_011_011:
  3230:           case 0b1010_011_100:
  3231:           case 0b1010_011_101:
  3232:           case 0b1010_011_110:
  3233:           case 0b1010_011_111:
  3234:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3235:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  3236:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  3237:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3238:             //ALINE #<data>                                   |-|012346|-|UUUUU|*****|          |1010_ddd_ddd_ddd_ddd (line 1010 emulator)
  3239:           case 0b1010_100_000:
  3240:           case 0b1010_100_001:
  3241:           case 0b1010_100_010:
  3242:           case 0b1010_100_011:
  3243:           case 0b1010_100_100:
  3244:           case 0b1010_100_101:
  3245:           case 0b1010_100_110:
  3246:           case 0b1010_100_111:
  3247:           case 0b1010_101_000:
  3248:           case 0b1010_101_001:
  3249:           case 0b1010_101_010:
  3250:           case 0b1010_101_011:
  3251:           case 0b1010_101_100:
  3252:           case 0b1010_101_101:
  3253:           case 0b1010_101_110:
  3254:           case 0b1010_101_111:
  3255:           case 0b1010_110_000:
  3256:           case 0b1010_110_001:
  3257:           case 0b1010_110_010:
  3258:           case 0b1010_110_011:
  3259:           case 0b1010_110_100:
  3260:           case 0b1010_110_101:
  3261:           case 0b1010_110_110:
  3262:           case 0b1010_110_111:
  3263:           case 0b1010_111_000:
  3264:           case 0b1010_111_001:
  3265:           case 0b1010_111_010:
  3266:           case 0b1010_111_011:
  3267:           case 0b1010_111_100:
  3268:           case 0b1010_111_101:
  3269:           case 0b1010_111_110:
  3270:           case 0b1010_111_111:
  3271:             irpAline ();
  3272:             break irpSwitch;
  3273: 
  3274:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3275:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  3276:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  3277:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3278:             //CMP.B <ea>,Dq                                   |-|012346|-|-UUUU|-****|D M+-WXZPI|1011_qqq_000_mmm_rrr
  3279:           case 0b1011_000_000:
  3280:           case 0b1011_001_000:
  3281:           case 0b1011_010_000:
  3282:           case 0b1011_011_000:
  3283:           case 0b1011_100_000:
  3284:           case 0b1011_101_000:
  3285:           case 0b1011_110_000:
  3286:           case 0b1011_111_000:
  3287:             irpCmpByte ();
  3288:             break irpSwitch;
  3289: 
  3290:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3291:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  3292:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  3293:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3294:             //CMP.W <ea>,Dq                                   |-|012346|-|-UUUU|-****|DAM+-WXZPI|1011_qqq_001_mmm_rrr
  3295:           case 0b1011_000_001:
  3296:           case 0b1011_001_001:
  3297:           case 0b1011_010_001:
  3298:           case 0b1011_011_001:
  3299:           case 0b1011_100_001:
  3300:           case 0b1011_101_001:
  3301:           case 0b1011_110_001:
  3302:           case 0b1011_111_001:
  3303:             irpCmpWord ();
  3304:             break irpSwitch;
  3305: 
  3306:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3307:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  3308:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  3309:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3310:             //CMP.L <ea>,Dq                                   |-|012346|-|-UUUU|-****|DAM+-WXZPI|1011_qqq_010_mmm_rrr
  3311:           case 0b1011_000_010:
  3312:           case 0b1011_001_010:
  3313:           case 0b1011_010_010:
  3314:           case 0b1011_011_010:
  3315:           case 0b1011_100_010:
  3316:           case 0b1011_101_010:
  3317:           case 0b1011_110_010:
  3318:           case 0b1011_111_010:
  3319:             irpCmpLong ();
  3320:             break irpSwitch;
  3321: 
  3322:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3323:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  3324:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  3325:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3326:             //CMPA.W <ea>,Aq                                  |-|012346|-|-UUUU|-****|DAM+-WXZPI|1011_qqq_011_mmm_rrr
  3327:             //CMP.W <ea>,Aq                                   |A|012346|-|-UUUU|-****|DAM+-WXZPI|1011_qqq_011_mmm_rrr [CMPA.W <ea>,Aq]
  3328:           case 0b1011_000_011:
  3329:           case 0b1011_001_011:
  3330:           case 0b1011_010_011:
  3331:           case 0b1011_011_011:
  3332:           case 0b1011_100_011:
  3333:           case 0b1011_101_011:
  3334:           case 0b1011_110_011:
  3335:           case 0b1011_111_011:
  3336:             irpCmpaWord ();
  3337:             break irpSwitch;
  3338: 
  3339:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3340:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  3341:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  3342:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3343:             //EOR.B Dq,<ea>                                   |-|012346|-|-UUUU|-**00|D M+-WXZ  |1011_qqq_100_mmm_rrr
  3344:             //CMPM.B (Ar)+,(Aq)+                              |-|012346|-|-UUUU|-****|          |1011_qqq_100_001_rrr
  3345:           case 0b1011_000_100:
  3346:           case 0b1011_001_100:
  3347:           case 0b1011_010_100:
  3348:           case 0b1011_011_100:
  3349:           case 0b1011_100_100:
  3350:           case 0b1011_101_100:
  3351:           case 0b1011_110_100:
  3352:           case 0b1011_111_100:
  3353:             irpEorByte ();
  3354:             break irpSwitch;
  3355: 
  3356:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3357:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  3358:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  3359:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3360:             //EOR.W Dq,<ea>                                   |-|012346|-|-UUUU|-**00|D M+-WXZ  |1011_qqq_101_mmm_rrr
  3361:             //CMPM.W (Ar)+,(Aq)+                              |-|012346|-|-UUUU|-****|          |1011_qqq_101_001_rrr
  3362:           case 0b1011_000_101:
  3363:           case 0b1011_001_101:
  3364:           case 0b1011_010_101:
  3365:           case 0b1011_011_101:
  3366:           case 0b1011_100_101:
  3367:           case 0b1011_101_101:
  3368:           case 0b1011_110_101:
  3369:           case 0b1011_111_101:
  3370:             irpEorWord ();
  3371:             break irpSwitch;
  3372: 
  3373:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3374:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  3375:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  3376:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3377:             //EOR.L Dq,<ea>                                   |-|012346|-|-UUUU|-**00|D M+-WXZ  |1011_qqq_110_mmm_rrr
  3378:             //CMPM.L (Ar)+,(Aq)+                              |-|012346|-|-UUUU|-****|          |1011_qqq_110_001_rrr
  3379:           case 0b1011_000_110:
  3380:           case 0b1011_001_110:
  3381:           case 0b1011_010_110:
  3382:           case 0b1011_011_110:
  3383:           case 0b1011_100_110:
  3384:           case 0b1011_101_110:
  3385:           case 0b1011_110_110:
  3386:           case 0b1011_111_110:
  3387:             irpEorLong ();
  3388:             break irpSwitch;
  3389: 
  3390:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3391:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  3392:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  3393:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3394:             //CMPA.L <ea>,Aq                                  |-|012346|-|-UUUU|-****|DAM+-WXZPI|1011_qqq_111_mmm_rrr
  3395:             //CMP.L <ea>,Aq                                   |A|012346|-|-UUUU|-****|DAM+-WXZPI|1011_qqq_111_mmm_rrr [CMPA.L <ea>,Aq]
  3396:           case 0b1011_000_111:
  3397:           case 0b1011_001_111:
  3398:           case 0b1011_010_111:
  3399:           case 0b1011_011_111:
  3400:           case 0b1011_100_111:
  3401:           case 0b1011_101_111:
  3402:           case 0b1011_110_111:
  3403:           case 0b1011_111_111:
  3404:             irpCmpaLong ();
  3405:             break irpSwitch;
  3406: 
  3407:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3408:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  3409:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  3410:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3411:             //AND.B <ea>,Dq                                   |-|012346|-|-UUUU|-**00|D M+-WXZPI|1100_qqq_000_mmm_rrr
  3412:           case 0b1100_000_000:
  3413:           case 0b1100_001_000:
  3414:           case 0b1100_010_000:
  3415:           case 0b1100_011_000:
  3416:           case 0b1100_100_000:
  3417:           case 0b1100_101_000:
  3418:           case 0b1100_110_000:
  3419:           case 0b1100_111_000:
  3420:             irpAndToRegByte ();
  3421:             break irpSwitch;
  3422: 
  3423:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3424:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  3425:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  3426:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3427:             //AND.W <ea>,Dq                                   |-|012346|-|-UUUU|-**00|D M+-WXZPI|1100_qqq_001_mmm_rrr
  3428:           case 0b1100_000_001:
  3429:           case 0b1100_001_001:
  3430:           case 0b1100_010_001:
  3431:           case 0b1100_011_001:
  3432:           case 0b1100_100_001:
  3433:           case 0b1100_101_001:
  3434:           case 0b1100_110_001:
  3435:           case 0b1100_111_001:
  3436:             irpAndToRegWord ();
  3437:             break irpSwitch;
  3438: 
  3439:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3440:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  3441:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  3442:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3443:             //AND.L <ea>,Dq                                   |-|012346|-|-UUUU|-**00|D M+-WXZPI|1100_qqq_010_mmm_rrr
  3444:           case 0b1100_000_010:
  3445:           case 0b1100_001_010:
  3446:           case 0b1100_010_010:
  3447:           case 0b1100_011_010:
  3448:           case 0b1100_100_010:
  3449:           case 0b1100_101_010:
  3450:           case 0b1100_110_010:
  3451:           case 0b1100_111_010:
  3452:             irpAndToRegLong ();
  3453:             break irpSwitch;
  3454: 
  3455:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3456:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  3457:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  3458:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3459:             //MULU.W <ea>,Dq                                  |-|012346|-|-UUUU|-***0|D M+-WXZPI|1100_qqq_011_mmm_rrr
  3460:           case 0b1100_000_011:
  3461:           case 0b1100_001_011:
  3462:           case 0b1100_010_011:
  3463:           case 0b1100_011_011:
  3464:           case 0b1100_100_011:
  3465:           case 0b1100_101_011:
  3466:           case 0b1100_110_011:
  3467:           case 0b1100_111_011:
  3468:             irpMuluWord ();
  3469:             break irpSwitch;
  3470: 
  3471:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3472:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  3473:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  3474:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3475:             //ABCD.B Dr,Dq                                    |-|012346|-|UUUUU|*U*U*|          |1100_qqq_100_000_rrr
  3476:             //ABCD.B -(Ar),-(Aq)                              |-|012346|-|UUUUU|*U*U*|          |1100_qqq_100_001_rrr
  3477:             //AND.B Dq,<ea>                                   |-|012346|-|-UUUU|-**00|  M+-WXZ  |1100_qqq_100_mmm_rrr
  3478:           case 0b1100_000_100:
  3479:           case 0b1100_001_100:
  3480:           case 0b1100_010_100:
  3481:           case 0b1100_011_100:
  3482:           case 0b1100_100_100:
  3483:           case 0b1100_101_100:
  3484:           case 0b1100_110_100:
  3485:           case 0b1100_111_100:
  3486:             irpAndToMemByte ();
  3487:             break irpSwitch;
  3488: 
  3489:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3490:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  3491:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  3492:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3493:             //EXG.L Dq,Dr                                     |-|012346|-|-----|-----|          |1100_qqq_101_000_rrr
  3494:             //EXG.L Aq,Ar                                     |-|012346|-|-----|-----|          |1100_qqq_101_001_rrr
  3495:             //AND.W Dq,<ea>                                   |-|012346|-|-UUUU|-**00|  M+-WXZ  |1100_qqq_101_mmm_rrr
  3496:           case 0b1100_000_101:
  3497:           case 0b1100_001_101:
  3498:           case 0b1100_010_101:
  3499:           case 0b1100_011_101:
  3500:           case 0b1100_100_101:
  3501:           case 0b1100_101_101:
  3502:           case 0b1100_110_101:
  3503:           case 0b1100_111_101:
  3504:             irpAndToMemWord ();
  3505:             break irpSwitch;
  3506: 
  3507:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3508:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  3509:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  3510:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3511:             //EXG.L Dq,Ar                                     |-|012346|-|-----|-----|          |1100_qqq_110_001_rrr
  3512:             //AND.L Dq,<ea>                                   |-|012346|-|-UUUU|-**00|  M+-WXZ  |1100_qqq_110_mmm_rrr
  3513:           case 0b1100_000_110:
  3514:           case 0b1100_001_110:
  3515:           case 0b1100_010_110:
  3516:           case 0b1100_011_110:
  3517:           case 0b1100_100_110:
  3518:           case 0b1100_101_110:
  3519:           case 0b1100_110_110:
  3520:           case 0b1100_111_110:
  3521:             irpAndToMemLong ();
  3522:             break irpSwitch;
  3523: 
  3524:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3525:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  3526:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  3527:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3528:             //MULS.W <ea>,Dq                                  |-|012346|-|-UUUU|-***0|D M+-WXZPI|1100_qqq_111_mmm_rrr
  3529:           case 0b1100_000_111:
  3530:           case 0b1100_001_111:
  3531:           case 0b1100_010_111:
  3532:           case 0b1100_011_111:
  3533:           case 0b1100_100_111:
  3534:           case 0b1100_101_111:
  3535:           case 0b1100_110_111:
  3536:           case 0b1100_111_111:
  3537:             irpMulsWord ();
  3538:             break irpSwitch;
  3539: 
  3540:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3541:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  3542:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  3543:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3544:             //ADD.B <ea>,Dq                                   |-|012346|-|UUUUU|*****|D M+-WXZPI|1101_qqq_000_mmm_rrr
  3545:           case 0b1101_000_000:
  3546:           case 0b1101_001_000:
  3547:           case 0b1101_010_000:
  3548:           case 0b1101_011_000:
  3549:           case 0b1101_100_000:
  3550:           case 0b1101_101_000:
  3551:           case 0b1101_110_000:
  3552:           case 0b1101_111_000:
  3553:             irpAddToRegByte ();
  3554:             break irpSwitch;
  3555: 
  3556:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3557:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  3558:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  3559:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3560:             //ADD.W <ea>,Dq                                   |-|012346|-|UUUUU|*****|DAM+-WXZPI|1101_qqq_001_mmm_rrr
  3561:           case 0b1101_000_001:
  3562:           case 0b1101_001_001:
  3563:           case 0b1101_010_001:
  3564:           case 0b1101_011_001:
  3565:           case 0b1101_100_001:
  3566:           case 0b1101_101_001:
  3567:           case 0b1101_110_001:
  3568:           case 0b1101_111_001:
  3569:             irpAddToRegWord ();
  3570:             break irpSwitch;
  3571: 
  3572:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3573:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  3574:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  3575:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3576:             //ADD.L <ea>,Dq                                   |-|012346|-|UUUUU|*****|DAM+-WXZPI|1101_qqq_010_mmm_rrr
  3577:           case 0b1101_000_010:
  3578:           case 0b1101_001_010:
  3579:           case 0b1101_010_010:
  3580:           case 0b1101_011_010:
  3581:           case 0b1101_100_010:
  3582:           case 0b1101_101_010:
  3583:           case 0b1101_110_010:
  3584:           case 0b1101_111_010:
  3585:             irpAddToRegLong ();
  3586:             break irpSwitch;
  3587: 
  3588:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3589:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  3590:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  3591:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3592:             //ADDA.W <ea>,Aq                                  |-|012346|-|-----|-----|DAM+-WXZPI|1101_qqq_011_mmm_rrr
  3593:             //ADD.W <ea>,Aq                                   |A|012346|-|-----|-----|DAM+-WXZPI|1101_qqq_011_mmm_rrr [ADDA.W <ea>,Aq]
  3594:           case 0b1101_000_011:
  3595:           case 0b1101_001_011:
  3596:           case 0b1101_010_011:
  3597:           case 0b1101_011_011:
  3598:           case 0b1101_100_011:
  3599:           case 0b1101_101_011:
  3600:           case 0b1101_110_011:
  3601:           case 0b1101_111_011:
  3602:             irpAddaWord ();
  3603:             break irpSwitch;
  3604: 
  3605:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3606:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  3607:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  3608:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3609:             //ADDX.B Dr,Dq                                    |-|012346|-|*UUUU|*****|          |1101_qqq_100_000_rrr
  3610:             //ADDX.B -(Ar),-(Aq)                              |-|012346|-|*UUUU|*****|          |1101_qqq_100_001_rrr
  3611:             //ADD.B Dq,<ea>                                   |-|012346|-|UUUUU|*****|  M+-WXZ  |1101_qqq_100_mmm_rrr
  3612:           case 0b1101_000_100:
  3613:           case 0b1101_001_100:
  3614:           case 0b1101_010_100:
  3615:           case 0b1101_011_100:
  3616:           case 0b1101_100_100:
  3617:           case 0b1101_101_100:
  3618:           case 0b1101_110_100:
  3619:           case 0b1101_111_100:
  3620:             irpAddToMemByte ();
  3621:             break irpSwitch;
  3622: 
  3623:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3624:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  3625:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  3626:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3627:             //ADDX.W Dr,Dq                                    |-|012346|-|*UUUU|*****|          |1101_qqq_101_000_rrr
  3628:             //ADDX.W -(Ar),-(Aq)                              |-|012346|-|*UUUU|*****|          |1101_qqq_101_001_rrr
  3629:             //ADD.W Dq,<ea>                                   |-|012346|-|UUUUU|*****|  M+-WXZ  |1101_qqq_101_mmm_rrr
  3630:           case 0b1101_000_101:
  3631:           case 0b1101_001_101:
  3632:           case 0b1101_010_101:
  3633:           case 0b1101_011_101:
  3634:           case 0b1101_100_101:
  3635:           case 0b1101_101_101:
  3636:           case 0b1101_110_101:
  3637:           case 0b1101_111_101:
  3638:             irpAddToMemWord ();
  3639:             break irpSwitch;
  3640: 
  3641:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3642:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  3643:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  3644:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3645:             //ADDX.L Dr,Dq                                    |-|012346|-|*UUUU|*****|          |1101_qqq_110_000_rrr
  3646:             //ADDX.L -(Ar),-(Aq)                              |-|012346|-|*UUUU|*****|          |1101_qqq_110_001_rrr
  3647:             //ADD.L Dq,<ea>                                   |-|012346|-|UUUUU|*****|  M+-WXZ  |1101_qqq_110_mmm_rrr
  3648:           case 0b1101_000_110:
  3649:           case 0b1101_001_110:
  3650:           case 0b1101_010_110:
  3651:           case 0b1101_011_110:
  3652:           case 0b1101_100_110:
  3653:           case 0b1101_101_110:
  3654:           case 0b1101_110_110:
  3655:           case 0b1101_111_110:
  3656:             irpAddToMemLong ();
  3657:             break irpSwitch;
  3658: 
  3659:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3660:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  3661:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  3662:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3663:             //ADDA.L <ea>,Aq                                  |-|012346|-|-----|-----|DAM+-WXZPI|1101_qqq_111_mmm_rrr
  3664:             //ADD.L <ea>,Aq                                   |A|012346|-|-----|-----|DAM+-WXZPI|1101_qqq_111_mmm_rrr [ADDA.L <ea>,Aq]
  3665:           case 0b1101_000_111:
  3666:           case 0b1101_001_111:
  3667:           case 0b1101_010_111:
  3668:           case 0b1101_011_111:
  3669:           case 0b1101_100_111:
  3670:           case 0b1101_101_111:
  3671:           case 0b1101_110_111:
  3672:           case 0b1101_111_111:
  3673:             irpAddaLong ();
  3674:             break irpSwitch;
  3675: 
  3676:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3677:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  3678:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  3679:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3680:             //ASR.B #<data>,Dr                                |-|012346|-|UUUUU|***0*|          |1110_qqq_000_000_rrr
  3681:             //LSR.B #<data>,Dr                                |-|012346|-|UUUUU|***0*|          |1110_qqq_000_001_rrr
  3682:             //ROXR.B #<data>,Dr                               |-|012346|-|*UUUU|***0*|          |1110_qqq_000_010_rrr
  3683:             //ROR.B #<data>,Dr                                |-|012346|-|-UUUU|-**0*|          |1110_qqq_000_011_rrr
  3684:             //ASR.B Dq,Dr                                     |-|012346|-|UUUUU|***0*|          |1110_qqq_000_100_rrr
  3685:             //LSR.B Dq,Dr                                     |-|012346|-|UUUUU|***0*|          |1110_qqq_000_101_rrr
  3686:             //ROXR.B Dq,Dr                                    |-|012346|-|*UUUU|***0*|          |1110_qqq_000_110_rrr
  3687:             //ROR.B Dq,Dr                                     |-|012346|-|-UUUU|-**0*|          |1110_qqq_000_111_rrr
  3688:             //ASR.B Dr                                        |A|012346|-|UUUUU|***0*|          |1110_001_000_000_rrr [ASR.B #1,Dr]
  3689:             //LSR.B Dr                                        |A|012346|-|UUUUU|***0*|          |1110_001_000_001_rrr [LSR.B #1,Dr]
  3690:             //ROXR.B Dr                                       |A|012346|-|*UUUU|***0*|          |1110_001_000_010_rrr [ROXR.B #1,Dr]
  3691:             //ROR.B Dr                                        |A|012346|-|-UUUU|-**0*|          |1110_001_000_011_rrr [ROR.B #1,Dr]
  3692:           case 0b1110_000_000:
  3693:           case 0b1110_001_000:
  3694:           case 0b1110_010_000:
  3695:           case 0b1110_011_000:
  3696:           case 0b1110_100_000:
  3697:           case 0b1110_101_000:
  3698:           case 0b1110_110_000:
  3699:           case 0b1110_111_000:
  3700:             irpXxrToRegByte ();
  3701:             break irpSwitch;
  3702: 
  3703:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3704:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  3705:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  3706:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3707:             //ASR.W #<data>,Dr                                |-|012346|-|UUUUU|***0*|          |1110_qqq_001_000_rrr
  3708:             //LSR.W #<data>,Dr                                |-|012346|-|UUUUU|***0*|          |1110_qqq_001_001_rrr
  3709:             //ROXR.W #<data>,Dr                               |-|012346|-|*UUUU|***0*|          |1110_qqq_001_010_rrr
  3710:             //ROR.W #<data>,Dr                                |-|012346|-|-UUUU|-**0*|          |1110_qqq_001_011_rrr
  3711:             //ASR.W Dq,Dr                                     |-|012346|-|UUUUU|***0*|          |1110_qqq_001_100_rrr
  3712:             //LSR.W Dq,Dr                                     |-|012346|-|UUUUU|***0*|          |1110_qqq_001_101_rrr
  3713:             //ROXR.W Dq,Dr                                    |-|012346|-|*UUUU|***0*|          |1110_qqq_001_110_rrr
  3714:             //ROR.W Dq,Dr                                     |-|012346|-|-UUUU|-**0*|          |1110_qqq_001_111_rrr
  3715:             //ASR.W Dr                                        |A|012346|-|UUUUU|***0*|          |1110_001_001_000_rrr [ASR.W #1,Dr]
  3716:             //LSR.W Dr                                        |A|012346|-|UUUUU|***0*|          |1110_001_001_001_rrr [LSR.W #1,Dr]
  3717:             //ROXR.W Dr                                       |A|012346|-|*UUUU|***0*|          |1110_001_001_010_rrr [ROXR.W #1,Dr]
  3718:             //ROR.W Dr                                        |A|012346|-|-UUUU|-**0*|          |1110_001_001_011_rrr [ROR.W #1,Dr]
  3719:           case 0b1110_000_001:
  3720:           case 0b1110_001_001:
  3721:           case 0b1110_010_001:
  3722:           case 0b1110_011_001:
  3723:           case 0b1110_100_001:
  3724:           case 0b1110_101_001:
  3725:           case 0b1110_110_001:
  3726:           case 0b1110_111_001:
  3727:             irpXxrToRegWord ();
  3728:             break irpSwitch;
  3729: 
  3730:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3731:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  3732:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  3733:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3734:             //ASR.L #<data>,Dr                                |-|012346|-|UUUUU|***0*|          |1110_qqq_010_000_rrr
  3735:             //LSR.L #<data>,Dr                                |-|012346|-|UUUUU|***0*|          |1110_qqq_010_001_rrr
  3736:             //ROXR.L #<data>,Dr                               |-|012346|-|*UUUU|***0*|          |1110_qqq_010_010_rrr
  3737:             //ROR.L #<data>,Dr                                |-|012346|-|-UUUU|-**0*|          |1110_qqq_010_011_rrr
  3738:             //ASR.L Dq,Dr                                     |-|012346|-|UUUUU|***0*|          |1110_qqq_010_100_rrr
  3739:             //LSR.L Dq,Dr                                     |-|012346|-|UUUUU|***0*|          |1110_qqq_010_101_rrr
  3740:             //ROXR.L Dq,Dr                                    |-|012346|-|*UUUU|***0*|          |1110_qqq_010_110_rrr
  3741:             //ROR.L Dq,Dr                                     |-|012346|-|-UUUU|-**0*|          |1110_qqq_010_111_rrr
  3742:             //ASR.L Dr                                        |A|012346|-|UUUUU|***0*|          |1110_001_010_000_rrr [ASR.L #1,Dr]
  3743:             //LSR.L Dr                                        |A|012346|-|UUUUU|***0*|          |1110_001_010_001_rrr [LSR.L #1,Dr]
  3744:             //ROXR.L Dr                                       |A|012346|-|*UUUU|***0*|          |1110_001_010_010_rrr [ROXR.L #1,Dr]
  3745:             //ROR.L Dr                                        |A|012346|-|-UUUU|-**0*|          |1110_001_010_011_rrr [ROR.L #1,Dr]
  3746:           case 0b1110_000_010:
  3747:           case 0b1110_001_010:
  3748:           case 0b1110_010_010:
  3749:           case 0b1110_011_010:
  3750:           case 0b1110_100_010:
  3751:           case 0b1110_101_010:
  3752:           case 0b1110_110_010:
  3753:           case 0b1110_111_010:
  3754:             irpXxrToRegLong ();
  3755:             break irpSwitch;
  3756: 
  3757:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3758:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  3759:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  3760:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3761:             //ASR.W <ea>                                      |-|012346|-|UUUUU|***0*|  M+-WXZ  |1110_000_011_mmm_rrr
  3762:           case 0b1110_000_011:
  3763:             irpAsrToMem ();
  3764:             break irpSwitch;
  3765: 
  3766:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3767:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  3768:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  3769:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3770:             //ASL.B #<data>,Dr                                |-|012346|-|UUUUU|*****|          |1110_qqq_100_000_rrr
  3771:             //LSL.B #<data>,Dr                                |-|012346|-|UUUUU|***0*|          |1110_qqq_100_001_rrr
  3772:             //ROXL.B #<data>,Dr                               |-|012346|-|*UUUU|***0*|          |1110_qqq_100_010_rrr
  3773:             //ROL.B #<data>,Dr                                |-|012346|-|-UUUU|-**0*|          |1110_qqq_100_011_rrr
  3774:             //ASL.B Dq,Dr                                     |-|012346|-|UUUUU|*****|          |1110_qqq_100_100_rrr
  3775:             //LSL.B Dq,Dr                                     |-|012346|-|UUUUU|***0*|          |1110_qqq_100_101_rrr
  3776:             //ROXL.B Dq,Dr                                    |-|012346|-|*UUUU|***0*|          |1110_qqq_100_110_rrr
  3777:             //ROL.B Dq,Dr                                     |-|012346|-|-UUUU|-**0*|          |1110_qqq_100_111_rrr
  3778:             //ASL.B Dr                                        |A|012346|-|UUUUU|*****|          |1110_001_100_000_rrr [ASL.B #1,Dr]
  3779:             //LSL.B Dr                                        |A|012346|-|UUUUU|***0*|          |1110_001_100_001_rrr [LSL.B #1,Dr]
  3780:             //ROXL.B Dr                                       |A|012346|-|*UUUU|***0*|          |1110_001_100_010_rrr [ROXL.B #1,Dr]
  3781:             //ROL.B Dr                                        |A|012346|-|-UUUU|-**0*|          |1110_001_100_011_rrr [ROL.B #1,Dr]
  3782:           case 0b1110_000_100:
  3783:           case 0b1110_001_100:
  3784:           case 0b1110_010_100:
  3785:           case 0b1110_011_100:
  3786:           case 0b1110_100_100:
  3787:           case 0b1110_101_100:
  3788:           case 0b1110_110_100:
  3789:           case 0b1110_111_100:
  3790:             irpXxlToRegByte ();
  3791:             break irpSwitch;
  3792: 
  3793:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3794:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  3795:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  3796:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3797:             //ASL.W #<data>,Dr                                |-|012346|-|UUUUU|*****|          |1110_qqq_101_000_rrr
  3798:             //LSL.W #<data>,Dr                                |-|012346|-|UUUUU|***0*|          |1110_qqq_101_001_rrr
  3799:             //ROXL.W #<data>,Dr                               |-|012346|-|*UUUU|***0*|          |1110_qqq_101_010_rrr
  3800:             //ROL.W #<data>,Dr                                |-|012346|-|-UUUU|-**0*|          |1110_qqq_101_011_rrr
  3801:             //ASL.W Dq,Dr                                     |-|012346|-|UUUUU|*****|          |1110_qqq_101_100_rrr
  3802:             //LSL.W Dq,Dr                                     |-|012346|-|UUUUU|***0*|          |1110_qqq_101_101_rrr
  3803:             //ROXL.W Dq,Dr                                    |-|012346|-|*UUUU|***0*|          |1110_qqq_101_110_rrr
  3804:             //ROL.W Dq,Dr                                     |-|012346|-|-UUUU|-**0*|          |1110_qqq_101_111_rrr
  3805:             //ASL.W Dr                                        |A|012346|-|UUUUU|*****|          |1110_001_101_000_rrr [ASL.W #1,Dr]
  3806:             //LSL.W Dr                                        |A|012346|-|UUUUU|***0*|          |1110_001_101_001_rrr [LSL.W #1,Dr]
  3807:             //ROXL.W Dr                                       |A|012346|-|*UUUU|***0*|          |1110_001_101_010_rrr [ROXL.W #1,Dr]
  3808:             //ROL.W Dr                                        |A|012346|-|-UUUU|-**0*|          |1110_001_101_011_rrr [ROL.W #1,Dr]
  3809:           case 0b1110_000_101:
  3810:           case 0b1110_001_101:
  3811:           case 0b1110_010_101:
  3812:           case 0b1110_011_101:
  3813:           case 0b1110_100_101:
  3814:           case 0b1110_101_101:
  3815:           case 0b1110_110_101:
  3816:           case 0b1110_111_101:
  3817:             irpXxlToRegWord ();
  3818:             break irpSwitch;
  3819: 
  3820:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3821:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  3822:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  3823:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3824:             //ASL.L #<data>,Dr                                |-|012346|-|UUUUU|*****|          |1110_qqq_110_000_rrr
  3825:             //LSL.L #<data>,Dr                                |-|012346|-|UUUUU|***0*|          |1110_qqq_110_001_rrr
  3826:             //ROXL.L #<data>,Dr                               |-|012346|-|*UUUU|***0*|          |1110_qqq_110_010_rrr
  3827:             //ROL.L #<data>,Dr                                |-|012346|-|-UUUU|-**0*|          |1110_qqq_110_011_rrr
  3828:             //ASL.L Dq,Dr                                     |-|012346|-|UUUUU|*****|          |1110_qqq_110_100_rrr
  3829:             //LSL.L Dq,Dr                                     |-|012346|-|UUUUU|***0*|          |1110_qqq_110_101_rrr
  3830:             //ROXL.L Dq,Dr                                    |-|012346|-|*UUUU|***0*|          |1110_qqq_110_110_rrr
  3831:             //ROL.L Dq,Dr                                     |-|012346|-|-UUUU|-**0*|          |1110_qqq_110_111_rrr
  3832:             //ASL.L Dr                                        |A|012346|-|UUUUU|*****|          |1110_001_110_000_rrr [ASL.L #1,Dr]
  3833:             //LSL.L Dr                                        |A|012346|-|UUUUU|***0*|          |1110_001_110_001_rrr [LSL.L #1,Dr]
  3834:             //ROXL.L Dr                                       |A|012346|-|*UUUU|***0*|          |1110_001_110_010_rrr [ROXL.L #1,Dr]
  3835:             //ROL.L Dr                                        |A|012346|-|-UUUU|-**0*|          |1110_001_110_011_rrr [ROL.L #1,Dr]
  3836:           case 0b1110_000_110:
  3837:           case 0b1110_001_110:
  3838:           case 0b1110_010_110:
  3839:           case 0b1110_011_110:
  3840:           case 0b1110_100_110:
  3841:           case 0b1110_101_110:
  3842:           case 0b1110_110_110:
  3843:           case 0b1110_111_110:
  3844:             irpXxlToRegLong ();
  3845:             break irpSwitch;
  3846: 
  3847:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3848:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  3849:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  3850:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3851:             //ASL.W <ea>                                      |-|012346|-|UUUUU|*****|  M+-WXZ  |1110_000_111_mmm_rrr
  3852:           case 0b1110_000_111:
  3853:             irpAslToMem ();
  3854:             break irpSwitch;
  3855: 
  3856:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3857:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  3858:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  3859:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3860:             //LSR.W <ea>                                      |-|012346|-|UUUUU|*0*0*|  M+-WXZ  |1110_001_011_mmm_rrr
  3861:           case 0b1110_001_011:
  3862:             irpLsrToMem ();
  3863:             break irpSwitch;
  3864: 
  3865:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3866:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  3867:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  3868:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3869:             //LSL.W <ea>                                      |-|012346|-|UUUUU|***0*|  M+-WXZ  |1110_001_111_mmm_rrr
  3870:           case 0b1110_001_111:
  3871:             irpLslToMem ();
  3872:             break irpSwitch;
  3873: 
  3874:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3875:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  3876:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  3877:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3878:             //ROXR.W <ea>                                     |-|012346|-|*UUUU|***0*|  M+-WXZ  |1110_010_011_mmm_rrr
  3879:           case 0b1110_010_011:
  3880:             irpRoxrToMem ();
  3881:             break irpSwitch;
  3882: 
  3883:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3884:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  3885:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  3886:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3887:             //ROXL.W <ea>                                     |-|012346|-|*UUUU|***0*|  M+-WXZ  |1110_010_111_mmm_rrr
  3888:           case 0b1110_010_111:
  3889:             irpRoxlToMem ();
  3890:             break irpSwitch;
  3891: 
  3892:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3893:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  3894:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  3895:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3896:             //ROR.W <ea>                                      |-|012346|-|-UUUU|-**0*|  M+-WXZ  |1110_011_011_mmm_rrr
  3897:           case 0b1110_011_011:
  3898:             irpRorToMem ();
  3899:             break irpSwitch;
  3900: 
  3901:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3902:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  3903:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  3904:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3905:             //ROL.W <ea>                                      |-|012346|-|-UUUU|-**0*|  M+-WXZ  |1110_011_111_mmm_rrr
  3906:           case 0b1110_011_111:
  3907:             irpRolToMem ();
  3908:             break irpSwitch;
  3909: 
  3910:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3911:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  3912:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  3913:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3914:             //BFTST <ea>{#o:#w}                               |-|--2346|-|-UUUU|-**00|D M  WXZP |1110_100_011_mmm_rrr-00000ooooo0wwwww
  3915:             //BFTST <ea>{#o:Dw}                               |-|--2346|-|-UUUU|-**00|D M  WXZP |1110_100_011_mmm_rrr-00000ooooo100www
  3916:             //BFTST <ea>{Do:#w}                               |-|--2346|-|-UUUU|-**00|D M  WXZP |1110_100_011_mmm_rrr-0000100ooo0wwwww
  3917:             //BFTST <ea>{Do:Dw}                               |-|--2346|-|-UUUU|-**00|D M  WXZP |1110_100_011_mmm_rrr-0000100ooo100www
  3918:           case 0b1110_100_011:
  3919:             irpBftst ();
  3920:             break irpSwitch;
  3921: 
  3922:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3923:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  3924:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  3925:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3926:             //BFEXTU <ea>{#o:#w},Dn                           |-|--2346|-|-UUUU|-**00|D M  WXZP |1110_100_111_mmm_rrr-0nnn0ooooo0wwwww
  3927:             //BFEXTU <ea>{#o:Dw},Dn                           |-|--2346|-|-UUUU|-**00|D M  WXZP |1110_100_111_mmm_rrr-0nnn0ooooo100www
  3928:             //BFEXTU <ea>{Do:#w},Dn                           |-|--2346|-|-UUUU|-**00|D M  WXZP |1110_100_111_mmm_rrr-0nnn100ooo0wwwww
  3929:             //BFEXTU <ea>{Do:Dw},Dn                           |-|--2346|-|-UUUU|-**00|D M  WXZP |1110_100_111_mmm_rrr-0nnn100ooo100www
  3930:           case 0b1110_100_111:
  3931:             irpBfextu ();
  3932:             break irpSwitch;
  3933: 
  3934:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3935:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  3936:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  3937:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3938:             //BFCHG <ea>{#o:#w}                               |-|--2346|-|-UUUU|-**00|D M  WXZ  |1110_101_011_mmm_rrr-00000ooooo0wwwww
  3939:             //BFCHG <ea>{#o:Dw}                               |-|--2346|-|-UUUU|-**00|D M  WXZ  |1110_101_011_mmm_rrr-00000ooooo100www
  3940:             //BFCHG <ea>{Do:#w}                               |-|--2346|-|-UUUU|-**00|D M  WXZ  |1110_101_011_mmm_rrr-0000100ooo0wwwww
  3941:             //BFCHG <ea>{Do:Dw}                               |-|--2346|-|-UUUU|-**00|D M  WXZ  |1110_101_011_mmm_rrr-0000100ooo100www
  3942:           case 0b1110_101_011:
  3943:             irpBfchg ();
  3944:             break irpSwitch;
  3945: 
  3946:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3947:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  3948:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  3949:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3950:             //BFEXTS <ea>{#o:#w},Dn                           |-|--2346|-|-UUUU|-**00|D M  WXZP |1110_101_111_mmm_rrr-0nnn0ooooo0wwwww
  3951:             //BFEXTS <ea>{#o:Dw},Dn                           |-|--2346|-|-UUUU|-**00|D M  WXZP |1110_101_111_mmm_rrr-0nnn0ooooo100www
  3952:             //BFEXTS <ea>{Do:#w},Dn                           |-|--2346|-|-UUUU|-**00|D M  WXZP |1110_101_111_mmm_rrr-0nnn100ooo0wwwww
  3953:             //BFEXTS <ea>{Do:Dw},Dn                           |-|--2346|-|-UUUU|-**00|D M  WXZP |1110_101_111_mmm_rrr-0nnn100ooo100www
  3954:           case 0b1110_101_111:
  3955:             irpBfexts ();
  3956:             break irpSwitch;
  3957: 
  3958:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3959:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  3960:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  3961:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3962:             //BFCLR <ea>{#o:#w}                               |-|--2346|-|-UUUU|-**00|D M  WXZ  |1110_110_011_mmm_rrr-00000ooooo0wwwww
  3963:             //BFCLR <ea>{#o:Dw}                               |-|--2346|-|-UUUU|-**00|D M  WXZ  |1110_110_011_mmm_rrr-00000ooooo100www
  3964:             //BFCLR <ea>{Do:#w}                               |-|--2346|-|-UUUU|-**00|D M  WXZ  |1110_110_011_mmm_rrr-0000100ooo0wwwww
  3965:             //BFCLR <ea>{Do:Dw}                               |-|--2346|-|-UUUU|-**00|D M  WXZ  |1110_110_011_mmm_rrr-0000100ooo100www
  3966:           case 0b1110_110_011:
  3967:             irpBfclr ();
  3968:             break irpSwitch;
  3969: 
  3970:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3971:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  3972:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  3973:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3974:             //BFFFO <ea>{#o:#w},Dn                            |-|--2346|-|-UUUU|-**00|D M  WXZP |1110_110_111_mmm_rrr-0nnn0ooooo0wwwww
  3975:             //BFFFO <ea>{#o:Dw},Dn                            |-|--2346|-|-UUUU|-**00|D M  WXZP |1110_110_111_mmm_rrr-0nnn0ooooo100www
  3976:             //BFFFO <ea>{Do:#w},Dn                            |-|--2346|-|-UUUU|-**00|D M  WXZP |1110_110_111_mmm_rrr-0nnn100ooo0wwwww
  3977:             //BFFFO <ea>{Do:Dw},Dn                            |-|--2346|-|-UUUU|-**00|D M  WXZP |1110_110_111_mmm_rrr-0nnn100ooo100www
  3978:           case 0b1110_110_111:
  3979:             irpBfffo ();
  3980:             break irpSwitch;
  3981: 
  3982:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3983:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  3984:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  3985:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3986:             //BFSET <ea>{#o:#w}                               |-|--2346|-|-UUUU|-**00|D M  WXZ  |1110_111_011_mmm_rrr-00000ooooo0wwwww
  3987:             //BFSET <ea>{#o:Dw}                               |-|--2346|-|-UUUU|-**00|D M  WXZ  |1110_111_011_mmm_rrr-00000ooooo100www
  3988:             //BFSET <ea>{Do:#w}                               |-|--2346|-|-UUUU|-**00|D M  WXZ  |1110_111_011_mmm_rrr-0000100ooo0wwwww
  3989:             //BFSET <ea>{Do:Dw}                               |-|--2346|-|-UUUU|-**00|D M  WXZ  |1110_111_011_mmm_rrr-0000100ooo100www
  3990:           case 0b1110_111_011:
  3991:             irpBfset ();
  3992:             break irpSwitch;
  3993: 
  3994:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3995:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  3996:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  3997:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3998:             //BFINS Dn,<ea>{#o:#w}                            |-|--2346|-|-UUUU|-**00|D M  WXZ  |1110_111_111_mmm_rrr-0nnn0ooooo0wwwww
  3999:             //BFINS Dn,<ea>{#o:Dw}                            |-|--2346|-|-UUUU|-**00|D M  WXZ  |1110_111_111_mmm_rrr-0nnn0ooooo100www
  4000:             //BFINS Dn,<ea>{Do:#w}                            |-|--2346|-|-UUUU|-**00|D M  WXZ  |1110_111_111_mmm_rrr-0nnn100ooo0wwwww
  4001:             //BFINS Dn,<ea>{Do:Dw}                            |-|--2346|-|-UUUU|-**00|D M  WXZ  |1110_111_111_mmm_rrr-0nnn100ooo100www
  4002:           case 0b1110_111_111:
  4003:             irpBfins ();
  4004:             break irpSwitch;
  4005: 
  4006:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  4007:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  4008:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  4009:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  4010:             //FTST.X FPm                                      |-|--CC46|-|-----|-----|          |1111_001_000_000_000-000mmm0000111010
  4011:             //FMOVE.X FPm,FPn                                 |-|--CC46|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0000000
  4012:             //FINT.X FPm,FPn                                  |-|--CCS6|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0000001
  4013:             //FSINH.X FPm,FPn                                 |-|--CCSS|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0000010
  4014:             //FINTRZ.X FPm,FPn                                |-|--CCS6|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0000011
  4015:             //FSQRT.X FPm,FPn                                 |-|--CC46|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0000100
  4016:             //FLOGNP1.X FPm,FPn                               |-|--CCSS|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0000110
  4017:             //FETOXM1.X FPm,FPn                               |-|--CCSS|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0001000
  4018:             //FTANH.X FPm,FPn                                 |-|--CCSS|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0001001
  4019:             //FATAN.X FPm,FPn                                 |-|--CCSS|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0001010
  4020:             //FASIN.X FPm,FPn                                 |-|--CCSS|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0001100
  4021:             //FATANH.X FPm,FPn                                |-|--CCSS|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0001101
  4022:             //FSIN.X FPm,FPn                                  |-|--CCSS|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0001110
  4023:             //FTAN.X FPm,FPn                                  |-|--CCSS|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0001111
  4024:             //FETOX.X FPm,FPn                                 |-|--CCSS|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0010000
  4025:             //FTWOTOX.X FPm,FPn                               |-|--CCSS|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0010001
  4026:             //FTENTOX.X FPm,FPn                               |-|--CCSS|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0010010
  4027:             //FLOGN.X FPm,FPn                                 |-|--CCSS|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0010100
  4028:             //FLOG10.X FPm,FPn                                |-|--CCSS|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0010101
  4029:             //FLOG2.X FPm,FPn                                 |-|--CCSS|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0010110
  4030:             //FABS.X FPm,FPn                                  |-|--CC46|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0011000
  4031:             //FCOSH.X FPm,FPn                                 |-|--CCSS|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0011001
  4032:             //FNEG.X FPm,FPn                                  |-|--CC46|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0011010
  4033:             //FACOS.X FPm,FPn                                 |-|--CCSS|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0011100
  4034:             //FCOS.X FPm,FPn                                  |-|--CCSS|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0011101
  4035:             //FGETEXP.X FPm,FPn                               |-|--CCSS|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0011110
  4036:             //FGETMAN.X FPm,FPn                               |-|--CCSS|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0011111
  4037:             //FDIV.X FPm,FPn                                  |-|--CC46|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0100000
  4038:             //FMOD.X FPm,FPn                                  |-|--CCSS|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0100001
  4039:             //FADD.X FPm,FPn                                  |-|--CC46|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0100010
  4040:             //FMUL.X FPm,FPn                                  |-|--CC46|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0100011
  4041:             //FSGLDIV.X FPm,FPn                               |-|--CCS6|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0100100
  4042:             //FREM.X FPm,FPn                                  |-|--CCSS|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0100101
  4043:             //FSCALE.X FPm,FPn                                |-|--CCSS|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0100110
  4044:             //FSGLMUL.X FPm,FPn                               |-|--CCS6|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0100111
  4045:             //FSUB.X FPm,FPn                                  |-|--CC46|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0101000
  4046:             //FCMP.X FPm,FPn                                  |-|--CC46|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0111000
  4047:             //FSMOVE.X FPm,FPn                                |-|----46|-|-----|-----|          |1111_001_000_000_000-000mmmnnn1000000
  4048:             //FSSQRT.X FPm,FPn                                |-|----46|-|-----|-----|          |1111_001_000_000_000-000mmmnnn1000001
  4049:             //FDMOVE.X FPm,FPn                                |-|----46|-|-----|-----|          |1111_001_000_000_000-000mmmnnn1000100
  4050:             //FDSQRT.X FPm,FPn                                |-|----46|-|-----|-----|          |1111_001_000_000_000-000mmmnnn1000101
  4051:             //FSABS.X FPm,FPn                                 |-|----46|-|-----|-----|          |1111_001_000_000_000-000mmmnnn1011000
  4052:             //FSNEG.X FPm,FPn                                 |-|----46|-|-----|-----|          |1111_001_000_000_000-000mmmnnn1011010
  4053:             //FDABS.X FPm,FPn                                 |-|----46|-|-----|-----|          |1111_001_000_000_000-000mmmnnn1011100
  4054:             //FDNEG.X FPm,FPn                                 |-|----46|-|-----|-----|          |1111_001_000_000_000-000mmmnnn1011110
  4055:             //FSDIV.X FPm,FPn                                 |-|----46|-|-----|-----|          |1111_001_000_000_000-000mmmnnn1100000
  4056:             //FSADD.X FPm,FPn                                 |-|----46|-|-----|-----|          |1111_001_000_000_000-000mmmnnn1100010
  4057:             //FSMUL.X FPm,FPn                                 |-|----46|-|-----|-----|          |1111_001_000_000_000-000mmmnnn1100011
  4058:             //FDDIV.X FPm,FPn                                 |-|----46|-|-----|-----|          |1111_001_000_000_000-000mmmnnn1100100
  4059:             //FDADD.X FPm,FPn                                 |-|----46|-|-----|-----|          |1111_001_000_000_000-000mmmnnn1100110
  4060:             //FDMUL.X FPm,FPn                                 |-|----46|-|-----|-----|          |1111_001_000_000_000-000mmmnnn1100111
  4061:             //FSSUB.X FPm,FPn                                 |-|----46|-|-----|-----|          |1111_001_000_000_000-000mmmnnn1101000
  4062:             //FDSUB.X FPm,FPn                                 |-|----46|-|-----|-----|          |1111_001_000_000_000-000mmmnnn1101100
  4063:             //FSINCOS.X FPm,FPc:FPs                           |-|--CCSS|-|-----|-----|          |1111_001_000_000_000-000mmmsss0110ccc
  4064:             //FMOVECR.X #ccc,FPn                              |-|--CCSS|-|-----|-----|          |1111_001_000_000_000-010111nnn0cccccc
  4065:             //FMOVE.L FPn,<ea>                                |-|--CC46|-|-----|-----|D M+-WXZ  |1111_001_000_mmm_rrr-011000nnn0000000
  4066:             //FMOVE.S FPn,<ea>                                |-|--CC46|-|-----|-----|D M+-WXZ  |1111_001_000_mmm_rrr-011001nnn0000000
  4067:             //FMOVE.W FPn,<ea>                                |-|--CC46|-|-----|-----|D M+-WXZ  |1111_001_000_mmm_rrr-011100nnn0000000
  4068:             //FMOVE.B FPn,<ea>                                |-|--CC46|-|-----|-----|D M+-WXZ  |1111_001_000_mmm_rrr-011110nnn0000000
  4069:             //FMOVE.L FPIAR,<ea>                              |-|--CC46|-|-----|-----|DAM+-WXZ  |1111_001_000_mmm_rrr-1010010000000000
  4070:             //FMOVEM.L FPIAR,<ea>                             |-|--CC46|-|-----|-----|DAM+-WXZ  |1111_001_000_mmm_rrr-1010010000000000
  4071:             //FMOVE.L FPSR,<ea>                               |-|--CC46|-|-----|-----|D M+-WXZ  |1111_001_000_mmm_rrr-1010100000000000
  4072:             //FMOVEM.L FPSR,<ea>                              |-|--CC46|-|-----|-----|D M+-WXZ  |1111_001_000_mmm_rrr-1010100000000000
  4073:             //FMOVE.L FPCR,<ea>                               |-|--CC46|-|-----|-----|D M+-WXZ  |1111_001_000_mmm_rrr-1011000000000000
  4074:             //FMOVEM.L FPCR,<ea>                              |-|--CC46|-|-----|-----|D M+-WXZ  |1111_001_000_mmm_rrr-1011000000000000
  4075:             //FTST.L <ea>                                     |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-0100000000111010
  4076:             //FMOVE.L <ea>,FPn                                |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0000000
  4077:             //FINT.L <ea>,FPn                                 |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0000001
  4078:             //FSINH.L <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0000010
  4079:             //FINTRZ.L <ea>,FPn                               |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0000011
  4080:             //FSQRT.L <ea>,FPn                                |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0000100
  4081:             //FLOGNP1.L <ea>,FPn                              |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0000110
  4082:             //FETOXM1.L <ea>,FPn                              |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0001000
  4083:             //FTANH.L <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0001001
  4084:             //FATAN.L <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0001010
  4085:             //FASIN.L <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0001100
  4086:             //FATANH.L <ea>,FPn                               |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0001101
  4087:             //FSIN.L <ea>,FPn                                 |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0001110
  4088:             //FTAN.L <ea>,FPn                                 |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0001111
  4089:             //FETOX.L <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0010000
  4090:             //FTWOTOX.L <ea>,FPn                              |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0010001
  4091:             //FTENTOX.L <ea>,FPn                              |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0010010
  4092:             //FLOGN.L <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0010100
  4093:             //FLOG10.L <ea>,FPn                               |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0010101
  4094:             //FLOG2.L <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0010110
  4095:             //FABS.L <ea>,FPn                                 |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0011000
  4096:             //FCOSH.L <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0011001
  4097:             //FNEG.L <ea>,FPn                                 |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0011010
  4098:             //FACOS.L <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0011100
  4099:             //FCOS.L <ea>,FPn                                 |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0011101
  4100:             //FGETEXP.L <ea>,FPn                              |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0011110
  4101:             //FGETMAN.L <ea>,FPn                              |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0011111
  4102:             //FDIV.L <ea>,FPn                                 |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0100000
  4103:             //FMOD.L <ea>,FPn                                 |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0100001
  4104:             //FADD.L <ea>,FPn                                 |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0100010
  4105:             //FMUL.L <ea>,FPn                                 |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0100011
  4106:             //FSGLDIV.L <ea>,FPn                              |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0100100
  4107:             //FREM.L <ea>,FPn                                 |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0100101
  4108:             //FSCALE.L <ea>,FPn                               |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0100110
  4109:             //FSGLMUL.L <ea>,FPn                              |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0100111
  4110:             //FSUB.L <ea>,FPn                                 |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0101000
  4111:             //FCMP.L <ea>,FPn                                 |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0111000
  4112:             //FSMOVE.L <ea>,FPn                               |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn1000000
  4113:             //FSSQRT.L <ea>,FPn                               |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn1000001
  4114:             //FDMOVE.L <ea>,FPn                               |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn1000100
  4115:             //FDSQRT.L <ea>,FPn                               |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn1000101
  4116:             //FSABS.L <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn1011000
  4117:             //FSNEG.L <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn1011010
  4118:             //FDABS.L <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn1011100
  4119:             //FDNEG.L <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn1011110
  4120:             //FSDIV.L <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn1100000
  4121:             //FSADD.L <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn1100010
  4122:             //FSMUL.L <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn1100011
  4123:             //FDDIV.L <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn1100100
  4124:             //FDADD.L <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn1100110
  4125:             //FDMUL.L <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn1100111
  4126:             //FSSUB.L <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn1101000
  4127:             //FDSUB.L <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn1101100
  4128:             //FSINCOS.L <ea>,FPc:FPs                          |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000sss0110ccc
  4129:             //FTST.S <ea>                                     |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-0100010000111010
  4130:             //FMOVE.S <ea>,FPn                                |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0000000
  4131:             //FINT.S <ea>,FPn                                 |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0000001
  4132:             //FSINH.S <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0000010
  4133:             //FINTRZ.S <ea>,FPn                               |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0000011
  4134:             //FSQRT.S <ea>,FPn                                |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0000100
  4135:             //FLOGNP1.S <ea>,FPn                              |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0000110
  4136:             //FETOXM1.S <ea>,FPn                              |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0001000
  4137:             //FTANH.S <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0001001
  4138:             //FATAN.S <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0001010
  4139:             //FASIN.S <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0001100
  4140:             //FATANH.S <ea>,FPn                               |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0001101
  4141:             //FSIN.S <ea>,FPn                                 |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0001110
  4142:             //FTAN.S <ea>,FPn                                 |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0001111
  4143:             //FETOX.S <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0010000
  4144:             //FTWOTOX.S <ea>,FPn                              |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0010001
  4145:             //FTENTOX.S <ea>,FPn                              |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0010010
  4146:             //FLOGN.S <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0010100
  4147:             //FLOG10.S <ea>,FPn                               |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0010101
  4148:             //FLOG2.S <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0010110
  4149:             //FABS.S <ea>,FPn                                 |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0011000
  4150:             //FCOSH.S <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0011001
  4151:             //FNEG.S <ea>,FPn                                 |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0011010
  4152:             //FACOS.S <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0011100
  4153:             //FCOS.S <ea>,FPn                                 |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0011101
  4154:             //FGETEXP.S <ea>,FPn                              |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0011110
  4155:             //FGETMAN.S <ea>,FPn                              |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0011111
  4156:             //FDIV.S <ea>,FPn                                 |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0100000
  4157:             //FMOD.S <ea>,FPn                                 |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0100001
  4158:             //FADD.S <ea>,FPn                                 |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0100010
  4159:             //FMUL.S <ea>,FPn                                 |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0100011
  4160:             //FSGLDIV.S <ea>,FPn                              |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0100100
  4161:             //FREM.S <ea>,FPn                                 |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0100101
  4162:             //FSCALE.S <ea>,FPn                               |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0100110
  4163:             //FSGLMUL.S <ea>,FPn                              |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0100111
  4164:             //FSUB.S <ea>,FPn                                 |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0101000
  4165:             //FCMP.S <ea>,FPn                                 |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0111000
  4166:             //FSMOVE.S <ea>,FPn                               |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn1000000
  4167:             //FSSQRT.S <ea>,FPn                               |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn1000001
  4168:             //FDMOVE.S <ea>,FPn                               |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn1000100
  4169:             //FDSQRT.S <ea>,FPn                               |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn1000101
  4170:             //FSABS.S <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn1011000
  4171:             //FSNEG.S <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn1011010
  4172:             //FDABS.S <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn1011100
  4173:             //FDNEG.S <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn1011110
  4174:             //FSDIV.S <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn1100000
  4175:             //FSADD.S <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn1100010
  4176:             //FSMUL.S <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn1100011
  4177:             //FDDIV.S <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn1100100
  4178:             //FDADD.S <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn1100110
  4179:             //FDMUL.S <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn1100111
  4180:             //FSSUB.S <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn1101000
  4181:             //FDSUB.S <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn1101100
  4182:             //FSINCOS.S <ea>,FPc:FPs                          |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001sss0110ccc
  4183:             //FTST.W <ea>                                     |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-0101000000111010
  4184:             //FMOVE.W <ea>,FPn                                |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0000000
  4185:             //FINT.W <ea>,FPn                                 |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0000001
  4186:             //FSINH.W <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0000010
  4187:             //FINTRZ.W <ea>,FPn                               |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0000011
  4188:             //FSQRT.W <ea>,FPn                                |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0000100
  4189:             //FLOGNP1.W <ea>,FPn                              |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0000110
  4190:             //FETOXM1.W <ea>,FPn                              |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0001000
  4191:             //FTANH.W <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0001001
  4192:             //FATAN.W <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0001010
  4193:             //FASIN.W <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0001100
  4194:             //FATANH.W <ea>,FPn                               |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0001101
  4195:             //FSIN.W <ea>,FPn                                 |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0001110
  4196:             //FTAN.W <ea>,FPn                                 |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0001111
  4197:             //FETOX.W <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0010000
  4198:             //FTWOTOX.W <ea>,FPn                              |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0010001
  4199:             //FTENTOX.W <ea>,FPn                              |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0010010
  4200:             //FLOGN.W <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0010100
  4201:             //FLOG10.W <ea>,FPn                               |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0010101
  4202:             //FLOG2.W <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0010110
  4203:             //FABS.W <ea>,FPn                                 |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0011000
  4204:             //FCOSH.W <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0011001
  4205:             //FNEG.W <ea>,FPn                                 |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0011010
  4206:             //FACOS.W <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0011100
  4207:             //FCOS.W <ea>,FPn                                 |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0011101
  4208:             //FGETEXP.W <ea>,FPn                              |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0011110
  4209:             //FGETMAN.W <ea>,FPn                              |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0011111
  4210:             //FDIV.W <ea>,FPn                                 |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0100000
  4211:             //FMOD.W <ea>,FPn                                 |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0100001
  4212:             //FADD.W <ea>,FPn                                 |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0100010
  4213:             //FMUL.W <ea>,FPn                                 |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0100011
  4214:             //FSGLDIV.W <ea>,FPn                              |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0100100
  4215:             //FREM.W <ea>,FPn                                 |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0100101
  4216:             //FSCALE.W <ea>,FPn                               |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0100110
  4217:             //FSGLMUL.W <ea>,FPn                              |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0100111
  4218:             //FSUB.W <ea>,FPn                                 |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0101000
  4219:             //FCMP.W <ea>,FPn                                 |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0111000
  4220:             //FSMOVE.W <ea>,FPn                               |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn1000000
  4221:             //FSSQRT.W <ea>,FPn                               |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn1000001
  4222:             //FDMOVE.W <ea>,FPn                               |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn1000100
  4223:             //FDSQRT.W <ea>,FPn                               |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn1000101
  4224:             //FSABS.W <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn1011000
  4225:             //FSNEG.W <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn1011010
  4226:             //FDABS.W <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn1011100
  4227:             //FDNEG.W <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn1011110
  4228:             //FSDIV.W <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn1100000
  4229:             //FSADD.W <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn1100010
  4230:             //FSMUL.W <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn1100011
  4231:             //FDDIV.W <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn1100100
  4232:             //FDADD.W <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn1100110
  4233:             //FDMUL.W <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn1100111
  4234:             //FSSUB.W <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn1101000
  4235:             //FDSUB.W <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn1101100
  4236:             //FSINCOS.W <ea>,FPc:FPs                          |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100sss0110ccc
  4237:             //FTST.B <ea>                                     |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-0101100000111010
  4238:             //FMOVE.B <ea>,FPn                                |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0000000
  4239:             //FINT.B <ea>,FPn                                 |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0000001
  4240:             //FSINH.B <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0000010
  4241:             //FINTRZ.B <ea>,FPn                               |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0000011
  4242:             //FSQRT.B <ea>,FPn                                |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0000100
  4243:             //FLOGNP1.B <ea>,FPn                              |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0000110
  4244:             //FETOXM1.B <ea>,FPn                              |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0001000
  4245:             //FTANH.B <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0001001
  4246:             //FATAN.B <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0001010
  4247:             //FASIN.B <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0001100
  4248:             //FATANH.B <ea>,FPn                               |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0001101
  4249:             //FSIN.B <ea>,FPn                                 |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0001110
  4250:             //FTAN.B <ea>,FPn                                 |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0001111
  4251:             //FETOX.B <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0010000
  4252:             //FTWOTOX.B <ea>,FPn                              |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0010001
  4253:             //FTENTOX.B <ea>,FPn                              |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0010010
  4254:             //FLOGN.B <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0010100
  4255:             //FLOG10.B <ea>,FPn                               |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0010101
  4256:             //FLOG2.B <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0010110
  4257:             //FABS.B <ea>,FPn                                 |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0011000
  4258:             //FCOSH.B <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0011001
  4259:             //FNEG.B <ea>,FPn                                 |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0011010
  4260:             //FACOS.B <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0011100
  4261:             //FCOS.B <ea>,FPn                                 |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0011101
  4262:             //FGETEXP.B <ea>,FPn                              |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0011110
  4263:             //FGETMAN.B <ea>,FPn                              |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0011111
  4264:             //FDIV.B <ea>,FPn                                 |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0100000
  4265:             //FMOD.B <ea>,FPn                                 |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0100001
  4266:             //FADD.B <ea>,FPn                                 |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0100010
  4267:             //FMUL.B <ea>,FPn                                 |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0100011
  4268:             //FSGLDIV.B <ea>,FPn                              |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0100100
  4269:             //FREM.B <ea>,FPn                                 |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0100101
  4270:             //FSCALE.B <ea>,FPn                               |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0100110
  4271:             //FSGLMUL.B <ea>,FPn                              |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0100111
  4272:             //FSUB.B <ea>,FPn                                 |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0101000
  4273:             //FCMP.B <ea>,FPn                                 |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0111000
  4274:             //FSMOVE.B <ea>,FPn                               |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn1000000
  4275:             //FSSQRT.B <ea>,FPn                               |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn1000001
  4276:             //FDMOVE.B <ea>,FPn                               |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn1000100
  4277:             //FDSQRT.B <ea>,FPn                               |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn1000101
  4278:             //FSABS.B <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn1011000
  4279:             //FSNEG.B <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn1011010
  4280:             //FDABS.B <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn1011100
  4281:             //FDNEG.B <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn1011110
  4282:             //FSDIV.B <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn1100000
  4283:             //FSADD.B <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn1100010
  4284:             //FSMUL.B <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn1100011
  4285:             //FDDIV.B <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn1100100
  4286:             //FDADD.B <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn1100110
  4287:             //FDMUL.B <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn1100111
  4288:             //FSSUB.B <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn1101000
  4289:             //FDSUB.B <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn1101100
  4290:             //FSINCOS.B <ea>,FPc:FPs                          |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110sss0110ccc
  4291:             //FMOVE.L <ea>,FPIAR                              |-|--CC46|-|-----|-----|DAM+-WXZPI|1111_001_000_mmm_rrr-1000010000000000
  4292:             //FMOVEM.L <ea>,FPIAR                             |-|--CC46|-|-----|-----|DAM+-WXZPI|1111_001_000_mmm_rrr-1000010000000000
  4293:             //FMOVE.L <ea>,FPSR                               |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-1000100000000000
  4294:             //FMOVEM.L <ea>,FPSR                              |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-1000100000000000
  4295:             //FMOVE.L <ea>,FPCR                               |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-1001000000000000
  4296:             //FMOVEM.L <ea>,FPCR                              |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-1001000000000000
  4297:             //FMOVE.X FPn,<ea>                                |-|--CC46|-|-----|-----|  M+-WXZ  |1111_001_000_mmm_rrr-011010nnn0000000
  4298:             //FMOVE.P FPn,<ea>{#k}                            |-|--CCSS|-|-----|-----|  M+-WXZ  |1111_001_000_mmm_rrr-011011nnnkkkkkkk
  4299:             //FMOVE.D FPn,<ea>                                |-|--CC46|-|-----|-----|  M+-WXZ  |1111_001_000_mmm_rrr-011101nnn0000000
  4300:             //FMOVE.P FPn,<ea>{Dk}                            |-|--CCSS|-|-----|-----|  M+-WXZ  |1111_001_000_mmm_rrr-011111nnnkkk0000
  4301:             //FMOVEM.L FPSR/FPIAR,<ea>                        |-|--CC46|-|-----|-----|  M+-WXZ  |1111_001_000_mmm_rrr-1010110000000000
  4302:             //FMOVEM.L FPCR/FPIAR,<ea>                        |-|--CC46|-|-----|-----|  M+-WXZ  |1111_001_000_mmm_rrr-1011010000000000
  4303:             //FMOVEM.L FPCR/FPSR,<ea>                         |-|--CC46|-|-----|-----|  M+-WXZ  |1111_001_000_mmm_rrr-1011100000000000
  4304:             //FMOVEM.L FPCR/FPSR/FPIAR,<ea>                   |-|--CC46|-|-----|-----|  M+-WXZ  |1111_001_000_mmm_rrr-1011110000000000
  4305:             //FMOVEM.X #<data>,<ea>                           |-|--CC46|-|-----|-----|  M  WXZ  |1111_001_000_mmm_rrr-11110000dddddddd
  4306:             //FMOVEM.X <list>,<ea>                            |-|--CC46|-|-----|-----|  M  WXZ  |1111_001_000_mmm_rrr-11110000llllllll
  4307:             //FMOVEM.X Dl,<ea>                                |-|--CC4S|-|-----|-----|  M  WXZ  |1111_001_000_mmm_rrr-111110000lll0000
  4308:             //FMOVEM.L <ea>,FPSR/FPIAR                        |-|--CC46|-|-----|-----|  M+-WXZP |1111_001_000_mmm_rrr-1000110000000000
  4309:             //FMOVEM.L <ea>,FPCR/FPIAR                        |-|--CC46|-|-----|-----|  M+-WXZP |1111_001_000_mmm_rrr-1001010000000000
  4310:             //FMOVEM.L <ea>,FPCR/FPSR                         |-|--CC46|-|-----|-----|  M+-WXZP |1111_001_000_mmm_rrr-1001100000000000
  4311:             //FMOVEM.L <ea>,FPCR/FPSR/FPIAR                   |-|--CC46|-|-----|-----|  M+-WXZP |1111_001_000_mmm_rrr-1001110000000000
  4312:             //FMOVEM.X <ea>,#<data>                           |-|--CC46|-|-----|-----|  M+ WXZP |1111_001_000_mmm_rrr-11010000dddddddd
  4313:             //FMOVEM.X <ea>,<list>                            |-|--CC46|-|-----|-----|  M+ WXZP |1111_001_000_mmm_rrr-11010000llllllll
  4314:             //FMOVEM.X <ea>,Dl                                |-|--CC4S|-|-----|-----|  M+ WXZP |1111_001_000_mmm_rrr-110110000lll0000
  4315:             //FTST.X <ea>                                     |-|--CC46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-0100100000111010
  4316:             //FMOVE.X <ea>,FPn                                |-|--CC46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0000000
  4317:             //FINT.X <ea>,FPn                                 |-|--CCS6|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0000001
  4318:             //FSINH.X <ea>,FPn                                |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0000010
  4319:             //FINTRZ.X <ea>,FPn                               |-|--CCS6|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0000011
  4320:             //FSQRT.X <ea>,FPn                                |-|--CC46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0000100
  4321:             //FLOGNP1.X <ea>,FPn                              |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0000110
  4322:             //FETOXM1.X <ea>,FPn                              |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0001000
  4323:             //FTANH.X <ea>,FPn                                |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0001001
  4324:             //FATAN.X <ea>,FPn                                |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0001010
  4325:             //FASIN.X <ea>,FPn                                |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0001100
  4326:             //FATANH.X <ea>,FPn                               |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0001101
  4327:             //FSIN.X <ea>,FPn                                 |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0001110
  4328:             //FTAN.X <ea>,FPn                                 |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0001111
  4329:             //FETOX.X <ea>,FPn                                |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0010000
  4330:             //FTWOTOX.X <ea>,FPn                              |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0010001
  4331:             //FTENTOX.X <ea>,FPn                              |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0010010
  4332:             //FLOGN.X <ea>,FPn                                |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0010100
  4333:             //FLOG10.X <ea>,FPn                               |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0010101
  4334:             //FLOG2.X <ea>,FPn                                |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0010110
  4335:             //FABS.X <ea>,FPn                                 |-|--CC46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0011000
  4336:             //FCOSH.X <ea>,FPn                                |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0011001
  4337:             //FNEG.X <ea>,FPn                                 |-|--CC46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0011010
  4338:             //FACOS.X <ea>,FPn                                |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0011100
  4339:             //FCOS.X <ea>,FPn                                 |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0011101
  4340:             //FGETEXP.X <ea>,FPn                              |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0011110
  4341:             //FGETMAN.X <ea>,FPn                              |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0011111
  4342:             //FDIV.X <ea>,FPn                                 |-|--CC46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0100000
  4343:             //FMOD.X <ea>,FPn                                 |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0100001
  4344:             //FADD.X <ea>,FPn                                 |-|--CC46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0100010
  4345:             //FMUL.X <ea>,FPn                                 |-|--CC46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0100011
  4346:             //FSGLDIV.X <ea>,FPn                              |-|--CCS6|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0100100
  4347:             //FREM.X <ea>,FPn                                 |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0100101
  4348:             //FSCALE.X <ea>,FPn                               |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0100110
  4349:             //FSGLMUL.X <ea>,FPn                              |-|--CCS6|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0100111
  4350:             //FSUB.X <ea>,FPn                                 |-|--CC46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0101000
  4351:             //FCMP.X <ea>,FPn                                 |-|--CC46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0111000
  4352:             //FSMOVE.X <ea>,FPn                               |-|----46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn1000000
  4353:             //FSSQRT.X <ea>,FPn                               |-|----46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn1000001
  4354:             //FDMOVE.X <ea>,FPn                               |-|----46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn1000100
  4355:             //FDSQRT.X <ea>,FPn                               |-|----46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn1000101
  4356:             //FSABS.X <ea>,FPn                                |-|----46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn1011000
  4357:             //FSNEG.X <ea>,FPn                                |-|----46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn1011010
  4358:             //FDABS.X <ea>,FPn                                |-|----46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn1011100
  4359:             //FDNEG.X <ea>,FPn                                |-|----46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn1011110
  4360:             //FSDIV.X <ea>,FPn                                |-|----46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn1100000
  4361:             //FSADD.X <ea>,FPn                                |-|----46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn1100010
  4362:             //FSMUL.X <ea>,FPn                                |-|----46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn1100011
  4363:             //FDDIV.X <ea>,FPn                                |-|----46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn1100100
  4364:             //FDADD.X <ea>,FPn                                |-|----46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn1100110
  4365:             //FDMUL.X <ea>,FPn                                |-|----46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn1100111
  4366:             //FSSUB.X <ea>,FPn                                |-|----46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn1101000
  4367:             //FDSUB.X <ea>,FPn                                |-|----46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn1101100
  4368:             //FSINCOS.X <ea>,FPc:FPs                          |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010sss0110ccc
  4369:             //FTST.P <ea>                                     |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-0100110000111010
  4370:             //FMOVE.P <ea>,FPn                                |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0000000
  4371:             //FINT.P <ea>,FPn                                 |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0000001
  4372:             //FSINH.P <ea>,FPn                                |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0000010
  4373:             //FINTRZ.P <ea>,FPn                               |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0000011
  4374:             //FSQRT.P <ea>,FPn                                |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0000100
  4375:             //FLOGNP1.P <ea>,FPn                              |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0000110
  4376:             //FETOXM1.P <ea>,FPn                              |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0001000
  4377:             //FTANH.P <ea>,FPn                                |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0001001
  4378:             //FATAN.P <ea>,FPn                                |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0001010
  4379:             //FASIN.P <ea>,FPn                                |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0001100
  4380:             //FATANH.P <ea>,FPn                               |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0001101
  4381:             //FSIN.P <ea>,FPn                                 |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0001110
  4382:             //FTAN.P <ea>,FPn                                 |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0001111
  4383:             //FETOX.P <ea>,FPn                                |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0010000
  4384:             //FTWOTOX.P <ea>,FPn                              |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0010001
  4385:             //FTENTOX.P <ea>,FPn                              |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0010010
  4386:             //FLOGN.P <ea>,FPn                                |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0010100
  4387:             //FLOG10.P <ea>,FPn                               |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0010101
  4388:             //FLOG2.P <ea>,FPn                                |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0010110
  4389:             //FABS.P <ea>,FPn                                 |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0011000
  4390:             //FCOSH.P <ea>,FPn                                |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0011001
  4391:             //FNEG.P <ea>,FPn                                 |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0011010
  4392:             //FACOS.P <ea>,FPn                                |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0011100
  4393:             //FCOS.P <ea>,FPn                                 |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0011101
  4394:             //FGETEXP.P <ea>,FPn                              |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0011110
  4395:             //FGETMAN.P <ea>,FPn                              |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0011111
  4396:             //FDIV.P <ea>,FPn                                 |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0100000
  4397:             //FMOD.P <ea>,FPn                                 |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0100001
  4398:             //FADD.P <ea>,FPn                                 |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0100010
  4399:             //FMUL.P <ea>,FPn                                 |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0100011
  4400:             //FSGLDIV.P <ea>,FPn                              |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0100100
  4401:             //FREM.P <ea>,FPn                                 |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0100101
  4402:             //FSCALE.P <ea>,FPn                               |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0100110
  4403:             //FSGLMUL.P <ea>,FPn                              |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0100111
  4404:             //FSUB.P <ea>,FPn                                 |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0101000
  4405:             //FCMP.P <ea>,FPn                                 |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0111000
  4406:             //FSMOVE.P <ea>,FPn                               |-|----SS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn1000000
  4407:             //FSSQRT.P <ea>,FPn                               |-|----SS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn1000001
  4408:             //FDMOVE.P <ea>,FPn                               |-|----SS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn1000100
  4409:             //FDSQRT.P <ea>,FPn                               |-|----SS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn1000101
  4410:             //FSABS.P <ea>,FPn                                |-|----SS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn1011000
  4411:             //FSNEG.P <ea>,FPn                                |-|----SS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn1011010
  4412:             //FDABS.P <ea>,FPn                                |-|----SS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn1011100
  4413:             //FDNEG.P <ea>,FPn                                |-|----SS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn1011110
  4414:             //FSDIV.P <ea>,FPn                                |-|----SS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn1100000
  4415:             //FSADD.P <ea>,FPn                                |-|----SS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn1100010
  4416:             //FSMUL.P <ea>,FPn                                |-|----SS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn1100011
  4417:             //FDDIV.P <ea>,FPn                                |-|----SS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn1100100
  4418:             //FDADD.P <ea>,FPn                                |-|----SS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn1100110
  4419:             //FDMUL.P <ea>,FPn                                |-|----SS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn1100111
  4420:             //FSSUB.P <ea>,FPn                                |-|----SS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn1101000
  4421:             //FDSUB.P <ea>,FPn                                |-|----SS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn1101100
  4422:             //FSINCOS.P <ea>,FPc:FPs                          |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011sss0110ccc
  4423:             //FTST.D <ea>                                     |-|--CC46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-0101010000111010
  4424:             //FMOVE.D <ea>,FPn                                |-|--CC46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0000000
  4425:             //FINT.D <ea>,FPn                                 |-|--CCS6|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0000001
  4426:             //FSINH.D <ea>,FPn                                |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0000010
  4427:             //FINTRZ.D <ea>,FPn                               |-|--CCS6|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0000011
  4428:             //FSQRT.D <ea>,FPn                                |-|--CC46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0000100
  4429:             //FLOGNP1.D <ea>,FPn                              |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0000110
  4430:             //FETOXM1.D <ea>,FPn                              |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0001000
  4431:             //FTANH.D <ea>,FPn                                |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0001001
  4432:             //FATAN.D <ea>,FPn                                |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0001010
  4433:             //FASIN.D <ea>,FPn                                |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0001100
  4434:             //FATANH.D <ea>,FPn                               |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0001101
  4435:             //FSIN.D <ea>,FPn                                 |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0001110
  4436:             //FTAN.D <ea>,FPn                                 |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0001111
  4437:             //FETOX.D <ea>,FPn                                |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0010000
  4438:             //FTWOTOX.D <ea>,FPn                              |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0010001
  4439:             //FTENTOX.D <ea>,FPn                              |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0010010
  4440:             //FLOGN.D <ea>,FPn                                |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0010100
  4441:             //FLOG10.D <ea>,FPn                               |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0010101
  4442:             //FLOG2.D <ea>,FPn                                |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0010110
  4443:             //FABS.D <ea>,FPn                                 |-|--CC46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0011000
  4444:             //FCOSH.D <ea>,FPn                                |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0011001
  4445:             //FNEG.D <ea>,FPn                                 |-|--CC46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0011010
  4446:             //FACOS.D <ea>,FPn                                |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0011100
  4447:             //FCOS.D <ea>,FPn                                 |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0011101
  4448:             //FGETEXP.D <ea>,FPn                              |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0011110
  4449:             //FGETMAN.D <ea>,FPn                              |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0011111
  4450:             //FDIV.D <ea>,FPn                                 |-|--CC46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0100000
  4451:             //FMOD.D <ea>,FPn                                 |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0100001
  4452:             //FADD.D <ea>,FPn                                 |-|--CC46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0100010
  4453:             //FMUL.D <ea>,FPn                                 |-|--CC46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0100011
  4454:             //FSGLDIV.D <ea>,FPn                              |-|--CCS6|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0100100
  4455:             //FREM.D <ea>,FPn                                 |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0100101
  4456:             //FSCALE.D <ea>,FPn                               |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0100110
  4457:             //FSGLMUL.D <ea>,FPn                              |-|--CCS6|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0100111
  4458:             //FSUB.D <ea>,FPn                                 |-|--CC46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0101000
  4459:             //FCMP.D <ea>,FPn                                 |-|--CC46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0111000
  4460:             //FSMOVE.D <ea>,FPn                               |-|----46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn1000000
  4461:             //FSSQRT.D <ea>,FPn                               |-|----46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn1000001
  4462:             //FDMOVE.D <ea>,FPn                               |-|----46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn1000100
  4463:             //FDSQRT.D <ea>,FPn                               |-|----46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn1000101
  4464:             //FSABS.D <ea>,FPn                                |-|----46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn1011000
  4465:             //FSNEG.D <ea>,FPn                                |-|----46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn1011010
  4466:             //FDABS.D <ea>,FPn                                |-|----46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn1011100
  4467:             //FDNEG.D <ea>,FPn                                |-|----46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn1011110
  4468:             //FSDIV.D <ea>,FPn                                |-|----46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn1100000
  4469:             //FSADD.D <ea>,FPn                                |-|----46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn1100010
  4470:             //FSMUL.D <ea>,FPn                                |-|----46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn1100011
  4471:             //FDDIV.D <ea>,FPn                                |-|----46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn1100100
  4472:             //FDADD.D <ea>,FPn                                |-|----46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn1100110
  4473:             //FDMUL.D <ea>,FPn                                |-|----46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn1100111
  4474:             //FSSUB.D <ea>,FPn                                |-|----46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn1101000
  4475:             //FDSUB.D <ea>,FPn                                |-|----46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn1101100
  4476:             //FSINCOS.D <ea>,FPc:FPs                          |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101sss0110ccc
  4477:             //FMOVEM.X #<data>,-(Ar)                          |-|--CC46|-|-----|-----|    -     |1111_001_000_100_rrr-11100000dddddddd
  4478:             //FMOVEM.X <list>,-(Ar)                           |-|--CC46|-|-----|-----|    -     |1111_001_000_100_rrr-11100000llllllll
  4479:             //FMOVEM.X Dl,-(Ar)                               |-|--CC4S|-|-----|-----|    -     |1111_001_000_100_rrr-111010000lll0000
  4480:             //FMOVEM.L #<data>,#<data>,FPSR/FPIAR             |-|--CC4S|-|-----|-----|         I|1111_001_000_111_100-1000110000000000-{data}
  4481:             //FMOVEM.L #<data>,#<data>,FPCR/FPIAR             |-|--CC4S|-|-----|-----|         I|1111_001_000_111_100-1001010000000000-{data}
  4482:             //FMOVEM.L #<data>,#<data>,FPCR/FPSR              |-|--CC4S|-|-----|-----|         I|1111_001_000_111_100-1001100000000000-{data}
  4483:             //FMOVEM.L #<data>,#<data>,#<data>,FPCR/FPSR/FPIAR|-|--CC4S|-|-----|-----|         I|1111_001_000_111_100-1001110000000000-{data}
  4484:           case 0b1111_001_000:
  4485:             irpFgen ();
  4486:             break irpSwitch;
  4487: 
  4488:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  4489:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  4490:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  4491:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  4492:             //FSF.B <ea>                                      |-|--CC4S|-|-----|-----|D M+-WXZ  |1111_001_001_mmm_rrr-0000000000000000
  4493:             //FSEQ.B <ea>                                     |-|--CC4S|-|-----|-----|D M+-WXZ  |1111_001_001_mmm_rrr-0000000000000001
  4494:             //FSOGT.B <ea>                                    |-|--CC4S|-|-----|-----|D M+-WXZ  |1111_001_001_mmm_rrr-0000000000000010
  4495:             //FSOGE.B <ea>                                    |-|--CC4S|-|-----|-----|D M+-WXZ  |1111_001_001_mmm_rrr-0000000000000011
  4496:             //FSOLT.B <ea>                                    |-|--CC4S|-|-----|-----|D M+-WXZ  |1111_001_001_mmm_rrr-0000000000000100
  4497:             //FSOLE.B <ea>                                    |-|--CC4S|-|-----|-----|D M+-WXZ  |1111_001_001_mmm_rrr-0000000000000101
  4498:             //FSOGL.B <ea>                                    |-|--CC4S|-|-----|-----|D M+-WXZ  |1111_001_001_mmm_rrr-0000000000000110
  4499:             //FSOR.B <ea>                                     |-|--CC4S|-|-----|-----|D M+-WXZ  |1111_001_001_mmm_rrr-0000000000000111
  4500:             //FSUN.B <ea>                                     |-|--CC4S|-|-----|-----|D M+-WXZ  |1111_001_001_mmm_rrr-0000000000001000
  4501:             //FSUEQ.B <ea>                                    |-|--CC4S|-|-----|-----|D M+-WXZ  |1111_001_001_mmm_rrr-0000000000001001
  4502:             //FSUGT.B <ea>                                    |-|--CC4S|-|-----|-----|D M+-WXZ  |1111_001_001_mmm_rrr-0000000000001010
  4503:             //FSUGE.B <ea>                                    |-|--CC4S|-|-----|-----|D M+-WXZ  |1111_001_001_mmm_rrr-0000000000001011
  4504:             //FSULT.B <ea>                                    |-|--CC4S|-|-----|-----|D M+-WXZ  |1111_001_001_mmm_rrr-0000000000001100
  4505:             //FSULE.B <ea>                                    |-|--CC4S|-|-----|-----|D M+-WXZ  |1111_001_001_mmm_rrr-0000000000001101
  4506:             //FSNE.B <ea>                                     |-|--CC4S|-|-----|-----|D M+-WXZ  |1111_001_001_mmm_rrr-0000000000001110
  4507:             //FST.B <ea>                                      |-|--CC4S|-|-----|-----|D M+-WXZ  |1111_001_001_mmm_rrr-0000000000001111
  4508:             //FSSF.B <ea>                                     |-|--CC4S|-|-----|-----|D M+-WXZ  |1111_001_001_mmm_rrr-0000000000010000
  4509:             //FSSEQ.B <ea>                                    |-|--CC4S|-|-----|-----|D M+-WXZ  |1111_001_001_mmm_rrr-0000000000010001
  4510:             //FSGT.B <ea>                                     |-|--CC4S|-|-----|-----|D M+-WXZ  |1111_001_001_mmm_rrr-0000000000010010
  4511:             //FSGE.B <ea>                                     |-|--CC4S|-|-----|-----|D M+-WXZ  |1111_001_001_mmm_rrr-0000000000010011
  4512:             //FSLT.B <ea>                                     |-|--CC4S|-|-----|-----|D M+-WXZ  |1111_001_001_mmm_rrr-0000000000010100
  4513:             //FSLE.B <ea>                                     |-|--CC4S|-|-----|-----|D M+-WXZ  |1111_001_001_mmm_rrr-0000000000010101
  4514:             //FSGL.B <ea>                                     |-|--CC4S|-|-----|-----|D M+-WXZ  |1111_001_001_mmm_rrr-0000000000010110
  4515:             //FSGLE.B <ea>                                    |-|--CC4S|-|-----|-----|D M+-WXZ  |1111_001_001_mmm_rrr-0000000000010111
  4516:             //FSNGLE.B <ea>                                   |-|--CC4S|-|-----|-----|D M+-WXZ  |1111_001_001_mmm_rrr-0000000000011000
  4517:             //FSNGL.B <ea>                                    |-|--CC4S|-|-----|-----|D M+-WXZ  |1111_001_001_mmm_rrr-0000000000011001
  4518:             //FSNLE.B <ea>                                    |-|--CC4S|-|-----|-----|D M+-WXZ  |1111_001_001_mmm_rrr-0000000000011010
  4519:             //FSNLT.B <ea>                                    |-|--CC4S|-|-----|-----|D M+-WXZ  |1111_001_001_mmm_rrr-0000000000011011
  4520:             //FSNGE.B <ea>                                    |-|--CC4S|-|-----|-----|D M+-WXZ  |1111_001_001_mmm_rrr-0000000000011100
  4521:             //FSNGT.B <ea>                                    |-|--CC4S|-|-----|-----|D M+-WXZ  |1111_001_001_mmm_rrr-0000000000011101
  4522:             //FSSNE.B <ea>                                    |-|--CC4S|-|-----|-----|D M+-WXZ  |1111_001_001_mmm_rrr-0000000000011110
  4523:             //FSST.B <ea>                                     |-|--CC4S|-|-----|-----|D M+-WXZ  |1111_001_001_mmm_rrr-0000000000011111
  4524:             //FDBF Dr,<label>                                 |-|--CC4S|-|-----|-----|          |1111_001_001_001_rrr-0000000000000000-{offset}
  4525:             //FDBRA Dr,<label>                                |A|--CC4S|-|-----|-----|          |1111_001_001_001_rrr-0000000000000000-{offset}       [FDBF Dr,<label>]
  4526:             //FDBEQ Dr,<label>                                |-|--CC4S|-|-----|-----|          |1111_001_001_001_rrr-0000000000000001-{offset}
  4527:             //FDBOGT Dr,<label>                               |-|--CC4S|-|-----|-----|          |1111_001_001_001_rrr-0000000000000010-{offset}
  4528:             //FDBOGE Dr,<label>                               |-|--CC4S|-|-----|-----|          |1111_001_001_001_rrr-0000000000000011-{offset}
  4529:             //FDBOLT Dr,<label>                               |-|--CC4S|-|-----|-----|          |1111_001_001_001_rrr-0000000000000100-{offset}
  4530:             //FDBOLE Dr,<label>                               |-|--CC4S|-|-----|-----|          |1111_001_001_001_rrr-0000000000000101-{offset}
  4531:             //FDBOGL Dr,<label>                               |-|--CC4S|-|-----|-----|          |1111_001_001_001_rrr-0000000000000110-{offset}
  4532:             //FDBOR Dr,<label>                                |-|--CC4S|-|-----|-----|          |1111_001_001_001_rrr-0000000000000111-{offset}
  4533:             //FDBUN Dr,<label>                                |-|--CC4S|-|-----|-----|          |1111_001_001_001_rrr-0000000000001000-{offset}
  4534:             //FDBUEQ Dr,<label>                               |-|--CC4S|-|-----|-----|          |1111_001_001_001_rrr-0000000000001001-{offset}
  4535:             //FDBUGT Dr,<label>                               |-|--CC4S|-|-----|-----|          |1111_001_001_001_rrr-0000000000001010-{offset}
  4536:             //FDBUGE Dr,<label>                               |-|--CC4S|-|-----|-----|          |1111_001_001_001_rrr-0000000000001011-{offset}
  4537:             //FDBULT Dr,<label>                               |-|--CC4S|-|-----|-----|          |1111_001_001_001_rrr-0000000000001100-{offset}
  4538:             //FDBULE Dr,<label>                               |-|--CC4S|-|-----|-----|          |1111_001_001_001_rrr-0000000000001101-{offset}
  4539:             //FDBNE Dr,<label>                                |-|--CC4S|-|-----|-----|          |1111_001_001_001_rrr-0000000000001110-{offset}
  4540:             //FDBT Dr,<label>                                 |-|--CC4S|-|-----|-----|          |1111_001_001_001_rrr-0000000000001111-{offset}
  4541:             //FDBSF Dr,<label>                                |-|--CC4S|-|-----|-----|          |1111_001_001_001_rrr-0000000000010000-{offset}
  4542:             //FDBSEQ Dr,<label>                               |-|--CC4S|-|-----|-----|          |1111_001_001_001_rrr-0000000000010001-{offset}
  4543:             //FDBGT Dr,<label>                                |-|--CC4S|-|-----|-----|          |1111_001_001_001_rrr-0000000000010010-{offset}
  4544:             //FDBGE Dr,<label>                                |-|--CC4S|-|-----|-----|          |1111_001_001_001_rrr-0000000000010011-{offset}
  4545:             //FDBLT Dr,<label>                                |-|--CC4S|-|-----|-----|          |1111_001_001_001_rrr-0000000000010100-{offset}
  4546:             //FDBLE Dr,<label>                                |-|--CC4S|-|-----|-----|          |1111_001_001_001_rrr-0000000000010101-{offset}
  4547:             //FDBGL Dr,<label>                                |-|--CC4S|-|-----|-----|          |1111_001_001_001_rrr-0000000000010110-{offset}
  4548:             //FDBGLE Dr,<label>                               |-|--CC4S|-|-----|-----|          |1111_001_001_001_rrr-0000000000010111-{offset}
  4549:             //FDBNGLE Dr,<label>                              |-|--CC4S|-|-----|-----|          |1111_001_001_001_rrr-0000000000011000-{offset}
  4550:             //FDBNGL Dr,<label>                               |-|--CC4S|-|-----|-----|          |1111_001_001_001_rrr-0000000000011001-{offset}
  4551:             //FDBNLE Dr,<label>                               |-|--CC4S|-|-----|-----|          |1111_001_001_001_rrr-0000000000011010-{offset}
  4552:             //FDBNLT Dr,<label>                               |-|--CC4S|-|-----|-----|          |1111_001_001_001_rrr-0000000000011011-{offset}
  4553:             //FDBNGE Dr,<label>                               |-|--CC4S|-|-----|-----|          |1111_001_001_001_rrr-0000000000011100-{offset}
  4554:             //FDBNGT Dr,<label>                               |-|--CC4S|-|-----|-----|          |1111_001_001_001_rrr-0000000000011101-{offset}
  4555:             //FDBSNE Dr,<label>                               |-|--CC4S|-|-----|-----|          |1111_001_001_001_rrr-0000000000011110-{offset}
  4556:             //FDBST Dr,<label>                                |-|--CC4S|-|-----|-----|          |1111_001_001_001_rrr-0000000000011111-{offset}
  4557:             //FTRAPF.W #<data>                                |-|--CC4S|-|-----|-----|          |1111_001_001_111_010-0000000000000000-{data}
  4558:             //FTRAPEQ.W #<data>                               |-|--CC4S|-|-----|-----|          |1111_001_001_111_010-0000000000000001-{data}
  4559:             //FTRAPOGT.W #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_010-0000000000000010-{data}
  4560:             //FTRAPOGE.W #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_010-0000000000000011-{data}
  4561:             //FTRAPOLT.W #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_010-0000000000000100-{data}
  4562:             //FTRAPOLE.W #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_010-0000000000000101-{data}
  4563:             //FTRAPOGL.W #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_010-0000000000000110-{data}
  4564:             //FTRAPOR.W #<data>                               |-|--CC4S|-|-----|-----|          |1111_001_001_111_010-0000000000000111-{data}
  4565:             //FTRAPUN.W #<data>                               |-|--CC4S|-|-----|-----|          |1111_001_001_111_010-0000000000001000-{data}
  4566:             //FTRAPUEQ.W #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_010-0000000000001001-{data}
  4567:             //FTRAPUGT.W #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_010-0000000000001010-{data}
  4568:             //FTRAPUGE.W #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_010-0000000000001011-{data}
  4569:             //FTRAPULT.W #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_010-0000000000001100-{data}
  4570:             //FTRAPULE.W #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_010-0000000000001101-{data}
  4571:             //FTRAPNE.W #<data>                               |-|--CC4S|-|-----|-----|          |1111_001_001_111_010-0000000000001110-{data}
  4572:             //FTRAPT.W #<data>                                |-|--CC4S|-|-----|-----|          |1111_001_001_111_010-0000000000001111-{data}
  4573:             //FTRAPSF.W #<data>                               |-|--CC4S|-|-----|-----|          |1111_001_001_111_010-0000000000010000-{data}
  4574:             //FTRAPSEQ.W #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_010-0000000000010001-{data}
  4575:             //FTRAPGT.W #<data>                               |-|--CC4S|-|-----|-----|          |1111_001_001_111_010-0000000000010010-{data}
  4576:             //FTRAPGE.W #<data>                               |-|--CC4S|-|-----|-----|          |1111_001_001_111_010-0000000000010011-{data}
  4577:             //FTRAPLT.W #<data>                               |-|--CC4S|-|-----|-----|          |1111_001_001_111_010-0000000000010100-{data}
  4578:             //FTRAPLE.W #<data>                               |-|--CC4S|-|-----|-----|          |1111_001_001_111_010-0000000000010101-{data}
  4579:             //FTRAPGL.W #<data>                               |-|--CC4S|-|-----|-----|          |1111_001_001_111_010-0000000000010110-{data}
  4580:             //FTRAPGLE.W #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_010-0000000000010111-{data}
  4581:             //FTRAPNGLE.W #<data>                             |-|--CC4S|-|-----|-----|          |1111_001_001_111_010-0000000000011000-{data}
  4582:             //FTRAPNGL.W #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_010-0000000000011001-{data}
  4583:             //FTRAPNLE.W #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_010-0000000000011010-{data}
  4584:             //FTRAPNLT.W #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_010-0000000000011011-{data}
  4585:             //FTRAPNGE.W #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_010-0000000000011100-{data}
  4586:             //FTRAPNGT.W #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_010-0000000000011101-{data}
  4587:             //FTRAPSNE.W #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_010-0000000000011110-{data}
  4588:             //FTRAPST.W #<data>                               |-|--CC4S|-|-----|-----|          |1111_001_001_111_010-0000000000011111-{data}
  4589:             //FTRAPF.L #<data>                                |-|--CC4S|-|-----|-----|          |1111_001_001_111_011-0000000000000000-{data}
  4590:             //FTRAPEQ.L #<data>                               |-|--CC4S|-|-----|-----|          |1111_001_001_111_011-0000000000000001-{data}
  4591:             //FTRAPOGT.L #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_011-0000000000000010-{data}
  4592:             //FTRAPOGE.L #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_011-0000000000000011-{data}
  4593:             //FTRAPOLT.L #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_011-0000000000000100-{data}
  4594:             //FTRAPOLE.L #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_011-0000000000000101-{data}
  4595:             //FTRAPOGL.L #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_011-0000000000000110-{data}
  4596:             //FTRAPOR.L #<data>                               |-|--CC4S|-|-----|-----|          |1111_001_001_111_011-0000000000000111-{data}
  4597:             //FTRAPUN.L #<data>                               |-|--CC4S|-|-----|-----|          |1111_001_001_111_011-0000000000001000-{data}
  4598:             //FTRAPUEQ.L #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_011-0000000000001001-{data}
  4599:             //FTRAPUGT.L #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_011-0000000000001010-{data}
  4600:             //FTRAPUGE.L #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_011-0000000000001011-{data}
  4601:             //FTRAPULT.L #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_011-0000000000001100-{data}
  4602:             //FTRAPULE.L #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_011-0000000000001101-{data}
  4603:             //FTRAPNE.L #<data>                               |-|--CC4S|-|-----|-----|          |1111_001_001_111_011-0000000000001110-{data}
  4604:             //FTRAPT.L #<data>                                |-|--CC4S|-|-----|-----|          |1111_001_001_111_011-0000000000001111-{data}
  4605:             //FTRAPSF.L #<data>                               |-|--CC4S|-|-----|-----|          |1111_001_001_111_011-0000000000010000-{data}
  4606:             //FTRAPSEQ.L #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_011-0000000000010001-{data}
  4607:             //FTRAPGT.L #<data>                               |-|--CC4S|-|-----|-----|          |1111_001_001_111_011-0000000000010010-{data}
  4608:             //FTRAPGE.L #<data>                               |-|--CC4S|-|-----|-----|          |1111_001_001_111_011-0000000000010011-{data}
  4609:             //FTRAPLT.L #<data>                               |-|--CC4S|-|-----|-----|          |1111_001_001_111_011-0000000000010100-{data}
  4610:             //FTRAPLE.L #<data>                               |-|--CC4S|-|-----|-----|          |1111_001_001_111_011-0000000000010101-{data}
  4611:             //FTRAPGL.L #<data>                               |-|--CC4S|-|-----|-----|          |1111_001_001_111_011-0000000000010110-{data}
  4612:             //FTRAPGLE.L #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_011-0000000000010111-{data}
  4613:             //FTRAPNGLE.L #<data>                             |-|--CC4S|-|-----|-----|          |1111_001_001_111_011-0000000000011000-{data}
  4614:             //FTRAPNGL.L #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_011-0000000000011001-{data}
  4615:             //FTRAPNLE.L #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_011-0000000000011010-{data}
  4616:             //FTRAPNLT.L #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_011-0000000000011011-{data}
  4617:             //FTRAPNGE.L #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_011-0000000000011100-{data}
  4618:             //FTRAPNGT.L #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_011-0000000000011101-{data}
  4619:             //FTRAPSNE.L #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_011-0000000000011110-{data}
  4620:             //FTRAPST.L #<data>                               |-|--CC4S|-|-----|-----|          |1111_001_001_111_011-0000000000011111-{data}
  4621:             //FTRAPF                                          |-|--CC4S|-|-----|-----|          |1111_001_001_111_100-0000000000000000
  4622:             //FTRAPEQ                                         |-|--CC4S|-|-----|-----|          |1111_001_001_111_100-0000000000000001
  4623:             //FTRAPOGT                                        |-|--CC4S|-|-----|-----|          |1111_001_001_111_100-0000000000000010
  4624:             //FTRAPOGE                                        |-|--CC4S|-|-----|-----|          |1111_001_001_111_100-0000000000000011
  4625:             //FTRAPOLT                                        |-|--CC4S|-|-----|-----|          |1111_001_001_111_100-0000000000000100
  4626:             //FTRAPOLE                                        |-|--CC4S|-|-----|-----|          |1111_001_001_111_100-0000000000000101
  4627:             //FTRAPOGL                                        |-|--CC4S|-|-----|-----|          |1111_001_001_111_100-0000000000000110
  4628:             //FTRAPOR                                         |-|--CC4S|-|-----|-----|          |1111_001_001_111_100-0000000000000111
  4629:             //FTRAPUN                                         |-|--CC4S|-|-----|-----|          |1111_001_001_111_100-0000000000001000
  4630:             //FTRAPUEQ                                        |-|--CC4S|-|-----|-----|          |1111_001_001_111_100-0000000000001001
  4631:             //FTRAPUGT                                        |-|--CC4S|-|-----|-----|          |1111_001_001_111_100-0000000000001010
  4632:             //FTRAPUGE                                        |-|--CC4S|-|-----|-----|          |1111_001_001_111_100-0000000000001011
  4633:             //FTRAPULT                                        |-|--CC4S|-|-----|-----|          |1111_001_001_111_100-0000000000001100
  4634:             //FTRAPULE                                        |-|--CC4S|-|-----|-----|          |1111_001_001_111_100-0000000000001101
  4635:             //FTRAPNE                                         |-|--CC4S|-|-----|-----|          |1111_001_001_111_100-0000000000001110
  4636:             //FTRAPT                                          |-|--CC4S|-|-----|-----|          |1111_001_001_111_100-0000000000001111
  4637:             //FTRAPSF                                         |-|--CC4S|-|-----|-----|          |1111_001_001_111_100-0000000000010000
  4638:             //FTRAPSEQ                                        |-|--CC4S|-|-----|-----|          |1111_001_001_111_100-0000000000010001
  4639:             //FTRAPGT                                         |-|--CC4S|-|-----|-----|          |1111_001_001_111_100-0000000000010010
  4640:             //FTRAPGE                                         |-|--CC4S|-|-----|-----|          |1111_001_001_111_100-0000000000010011
  4641:             //FTRAPLT                                         |-|--CC4S|-|-----|-----|          |1111_001_001_111_100-0000000000010100
  4642:             //FTRAPLE                                         |-|--CC4S|-|-----|-----|          |1111_001_001_111_100-0000000000010101
  4643:             //FTRAPGL                                         |-|--CC4S|-|-----|-----|          |1111_001_001_111_100-0000000000010110
  4644:             //FTRAPGLE                                        |-|--CC4S|-|-----|-----|          |1111_001_001_111_100-0000000000010111
  4645:             //FTRAPNGLE                                       |-|--CC4S|-|-----|-----|          |1111_001_001_111_100-0000000000011000
  4646:             //FTRAPNGL                                        |-|--CC4S|-|-----|-----|          |1111_001_001_111_100-0000000000011001
  4647:             //FTRAPNLE                                        |-|--CC4S|-|-----|-----|          |1111_001_001_111_100-0000000000011010
  4648:             //FTRAPNLT                                        |-|--CC4S|-|-----|-----|          |1111_001_001_111_100-0000000000011011
  4649:             //FTRAPNGE                                        |-|--CC4S|-|-----|-----|          |1111_001_001_111_100-0000000000011100
  4650:             //FTRAPNGT                                        |-|--CC4S|-|-----|-----|          |1111_001_001_111_100-0000000000011101
  4651:             //FTRAPSNE                                        |-|--CC4S|-|-----|-----|          |1111_001_001_111_100-0000000000011110
  4652:             //FTRAPST                                         |-|--CC4S|-|-----|-----|          |1111_001_001_111_100-0000000000011111
  4653:           case 0b1111_001_001:
  4654:             irpFscc ();
  4655:             break irpSwitch;
  4656: 
  4657:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  4658:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  4659:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  4660:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  4661:             //FNOP                                            |A|--CC46|-|-----|-----|          |1111_001_010_000_000-0000000000000000        [FBF.W (*)+2]
  4662:             //FBF.W <label>                                   |-|--CC46|-|-----|-----|          |1111_001_010_000_000-{offset}
  4663:             //FBEQ.W <label>                                  |-|--CC46|-|-----|-----|          |1111_001_010_000_001-{offset}
  4664:             //FBOGT.W <label>                                 |-|--CC46|-|-----|-----|          |1111_001_010_000_010-{offset}
  4665:             //FBOGE.W <label>                                 |-|--CC46|-|-----|-----|          |1111_001_010_000_011-{offset}
  4666:             //FBOLT.W <label>                                 |-|--CC46|-|-----|-----|          |1111_001_010_000_100-{offset}
  4667:             //FBOLE.W <label>                                 |-|--CC46|-|-----|-----|          |1111_001_010_000_101-{offset}
  4668:             //FBOGL.W <label>                                 |-|--CC46|-|-----|-----|          |1111_001_010_000_110-{offset}
  4669:             //FBOR.W <label>                                  |-|--CC46|-|-----|-----|          |1111_001_010_000_111-{offset}
  4670:             //FBUN.W <label>                                  |-|--CC46|-|-----|-----|          |1111_001_010_001_000-{offset}
  4671:             //FBUEQ.W <label>                                 |-|--CC46|-|-----|-----|          |1111_001_010_001_001-{offset}
  4672:             //FBUGT.W <label>                                 |-|--CC46|-|-----|-----|          |1111_001_010_001_010-{offset}
  4673:             //FBUGE.W <label>                                 |-|--CC46|-|-----|-----|          |1111_001_010_001_011-{offset}
  4674:             //FBULT.W <label>                                 |-|--CC46|-|-----|-----|          |1111_001_010_001_100-{offset}
  4675:             //FBULE.W <label>                                 |-|--CC46|-|-----|-----|          |1111_001_010_001_101-{offset}
  4676:             //FBNE.W <label>                                  |-|--CC46|-|-----|-----|          |1111_001_010_001_110-{offset}
  4677:             //FBT.W <label>                                   |-|--CC46|-|-----|-----|          |1111_001_010_001_111-{offset}
  4678:             //FBRA.W <label>                                  |A|--CC46|-|-----|-----|          |1111_001_010_001_111-{offset}        [FBT.W <label>]
  4679:             //FBSF.W <label>                                  |-|--CC46|-|-----|-----|          |1111_001_010_010_000-{offset}
  4680:             //FBSEQ.W <label>                                 |-|--CC46|-|-----|-----|          |1111_001_010_010_001-{offset}
  4681:             //FBGT.W <label>                                  |-|--CC46|-|-----|-----|          |1111_001_010_010_010-{offset}
  4682:             //FBGE.W <label>                                  |-|--CC46|-|-----|-----|          |1111_001_010_010_011-{offset}
  4683:             //FBLT.W <label>                                  |-|--CC46|-|-----|-----|          |1111_001_010_010_100-{offset}
  4684:             //FBLE.W <label>                                  |-|--CC46|-|-----|-----|          |1111_001_010_010_101-{offset}
  4685:             //FBGL.W <label>                                  |-|--CC46|-|-----|-----|          |1111_001_010_010_110-{offset}
  4686:             //FBGLE.W <label>                                 |-|--CC46|-|-----|-----|          |1111_001_010_010_111-{offset}
  4687:             //FBNGLE.W <label>                                |-|--CC46|-|-----|-----|          |1111_001_010_011_000-{offset}
  4688:             //FBNGL.W <label>                                 |-|--CC46|-|-----|-----|          |1111_001_010_011_001-{offset}
  4689:             //FBNLE.W <label>                                 |-|--CC46|-|-----|-----|          |1111_001_010_011_010-{offset}
  4690:             //FBNLT.W <label>                                 |-|--CC46|-|-----|-----|          |1111_001_010_011_011-{offset}
  4691:             //FBNGE.W <label>                                 |-|--CC46|-|-----|-----|          |1111_001_010_011_100-{offset}
  4692:             //FBNGT.W <label>                                 |-|--CC46|-|-----|-----|          |1111_001_010_011_101-{offset}
  4693:             //FBSNE.W <label>                                 |-|--CC46|-|-----|-----|          |1111_001_010_011_110-{offset}
  4694:             //FBST.W <label>                                  |-|--CC46|-|-----|-----|          |1111_001_010_011_111-{offset}
  4695:           case 0b1111_001_010:
  4696:             irpFbccWord ();
  4697:             break irpSwitch;
  4698: 
  4699:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  4700:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  4701:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  4702:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  4703:             //FBF.L <label>                                   |-|--CC46|-|-----|-----|          |1111_001_011_000_000-{offset}
  4704:             //FBEQ.L <label>                                  |-|--CC46|-|-----|-----|          |1111_001_011_000_001-{offset}
  4705:             //FBOGT.L <label>                                 |-|--CC46|-|-----|-----|          |1111_001_011_000_010-{offset}
  4706:             //FBOGE.L <label>                                 |-|--CC46|-|-----|-----|          |1111_001_011_000_011-{offset}
  4707:             //FBOLT.L <label>                                 |-|--CC46|-|-----|-----|          |1111_001_011_000_100-{offset}
  4708:             //FBOLE.L <label>                                 |-|--CC46|-|-----|-----|          |1111_001_011_000_101-{offset}
  4709:             //FBOGL.L <label>                                 |-|--CC46|-|-----|-----|          |1111_001_011_000_110-{offset}
  4710:             //FBOR.L <label>                                  |-|--CC46|-|-----|-----|          |1111_001_011_000_111-{offset}
  4711:             //FBUN.L <label>                                  |-|--CC46|-|-----|-----|          |1111_001_011_001_000-{offset}
  4712:             //FBUEQ.L <label>                                 |-|--CC46|-|-----|-----|          |1111_001_011_001_001-{offset}
  4713:             //FBUGT.L <label>                                 |-|--CC46|-|-----|-----|          |1111_001_011_001_010-{offset}
  4714:             //FBUGE.L <label>                                 |-|--CC46|-|-----|-----|          |1111_001_011_001_011-{offset}
  4715:             //FBULT.L <label>                                 |-|--CC46|-|-----|-----|          |1111_001_011_001_100-{offset}
  4716:             //FBULE.L <label>                                 |-|--CC46|-|-----|-----|          |1111_001_011_001_101-{offset}
  4717:             //FBNE.L <label>                                  |-|--CC46|-|-----|-----|          |1111_001_011_001_110-{offset}
  4718:             //FBT.L <label>                                   |-|--CC46|-|-----|-----|          |1111_001_011_001_111-{offset}
  4719:             //FBRA.L <label>                                  |A|--CC46|-|-----|-----|          |1111_001_011_001_111-{offset}        [FBT.L <label>]
  4720:             //FBSF.L <label>                                  |-|--CC46|-|-----|-----|          |1111_001_011_010_000-{offset}
  4721:             //FBSEQ.L <label>                                 |-|--CC46|-|-----|-----|          |1111_001_011_010_001-{offset}
  4722:             //FBGT.L <label>                                  |-|--CC46|-|-----|-----|          |1111_001_011_010_010-{offset}
  4723:             //FBGE.L <label>                                  |-|--CC46|-|-----|-----|          |1111_001_011_010_011-{offset}
  4724:             //FBLT.L <label>                                  |-|--CC46|-|-----|-----|          |1111_001_011_010_100-{offset}
  4725:             //FBLE.L <label>                                  |-|--CC46|-|-----|-----|          |1111_001_011_010_101-{offset}
  4726:             //FBGL.L <label>                                  |-|--CC46|-|-----|-----|          |1111_001_011_010_110-{offset}
  4727:             //FBGLE.L <label>                                 |-|--CC46|-|-----|-----|          |1111_001_011_010_111-{offset}
  4728:             //FBNGLE.L <label>                                |-|--CC46|-|-----|-----|          |1111_001_011_011_000-{offset}
  4729:             //FBNGL.L <label>                                 |-|--CC46|-|-----|-----|          |1111_001_011_011_001-{offset}
  4730:             //FBNLE.L <label>                                 |-|--CC46|-|-----|-----|          |1111_001_011_011_010-{offset}
  4731:             //FBNLT.L <label>                                 |-|--CC46|-|-----|-----|          |1111_001_011_011_011-{offset}
  4732:             //FBNGE.L <label>                                 |-|--CC46|-|-----|-----|          |1111_001_011_011_100-{offset}
  4733:             //FBNGT.L <label>                                 |-|--CC46|-|-----|-----|          |1111_001_011_011_101-{offset}
  4734:             //FBSNE.L <label>                                 |-|--CC46|-|-----|-----|          |1111_001_011_011_110-{offset}
  4735:             //FBST.L <label>                                  |-|--CC46|-|-----|-----|          |1111_001_011_011_111-{offset}
  4736:           case 0b1111_001_011:
  4737:             irpFbccLong ();
  4738:             break irpSwitch;
  4739: 
  4740:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  4741:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  4742:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  4743:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  4744:             //FSAVE <ea>                                      |-|--CC46|P|-----|-----|  M -WXZ  |1111_001_100_mmm_rrr
  4745:           case 0b1111_001_100:
  4746:             irpFsave ();
  4747:             break irpSwitch;
  4748: 
  4749:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  4750:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  4751:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  4752:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  4753:             //FRESTORE <ea>                                   |-|--CC46|P|-----|-----|  M+ WXZP |1111_001_101_mmm_rrr
  4754:           case 0b1111_001_101:
  4755:             irpFrestore ();
  4756:             break irpSwitch;
  4757: 
  4758:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  4759:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  4760:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  4761:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  4762:             //CINVL NC,(Ar)                                   |-|----46|P|-----|-----|          |1111_010_000_001_rrr
  4763:             //CINVP NC,(Ar)                                   |-|----46|P|-----|-----|          |1111_010_000_010_rrr
  4764:             //CINVA NC                                        |-|----46|P|-----|-----|          |1111_010_000_011_000
  4765:             //CPUSHL NC,(Ar)                                  |-|----46|P|-----|-----|          |1111_010_000_101_rrr
  4766:             //CPUSHP NC,(Ar)                                  |-|----46|P|-----|-----|          |1111_010_000_110_rrr
  4767:             //CPUSHA NC                                       |-|----46|P|-----|-----|          |1111_010_000_111_000
  4768:           case 0b1111_010_000:
  4769:             irpCinvCpushNC ();
  4770:             break irpSwitch;
  4771: 
  4772:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  4773:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  4774:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  4775:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  4776:             //CINVL DC,(Ar)                                   |-|----46|P|-----|-----|          |1111_010_001_001_rrr
  4777:             //CINVP DC,(Ar)                                   |-|----46|P|-----|-----|          |1111_010_001_010_rrr
  4778:             //CINVA DC                                        |-|----46|P|-----|-----|          |1111_010_001_011_000
  4779:             //CPUSHL DC,(Ar)                                  |-|----46|P|-----|-----|          |1111_010_001_101_rrr
  4780:             //CPUSHP DC,(Ar)                                  |-|----46|P|-----|-----|          |1111_010_001_110_rrr
  4781:             //CPUSHA DC                                       |-|----46|P|-----|-----|          |1111_010_001_111_000
  4782:           case 0b1111_010_001:
  4783:             irpCinvCpushDC ();
  4784:             break irpSwitch;
  4785: 
  4786:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  4787:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  4788:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  4789:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  4790:             //CINVL IC,(Ar)                                   |-|----46|P|-----|-----|          |1111_010_010_001_rrr
  4791:             //CINVP IC,(Ar)                                   |-|----46|P|-----|-----|          |1111_010_010_010_rrr
  4792:             //CINVA IC                                        |-|----46|P|-----|-----|          |1111_010_010_011_000
  4793:             //CPUSHL IC,(Ar)                                  |-|----46|P|-----|-----|          |1111_010_010_101_rrr
  4794:             //CPUSHP IC,(Ar)                                  |-|----46|P|-----|-----|          |1111_010_010_110_rrr
  4795:             //CPUSHA IC                                       |-|----46|P|-----|-----|          |1111_010_010_111_000
  4796:           case 0b1111_010_010:
  4797:             irpCinvCpushIC ();
  4798:             break irpSwitch;
  4799: 
  4800:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  4801:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  4802:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  4803:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  4804:             //CINVL BC,(Ar)                                   |-|----46|P|-----|-----|          |1111_010_011_001_rrr
  4805:             //CINVP BC,(Ar)                                   |-|----46|P|-----|-----|          |1111_010_011_010_rrr
  4806:             //CINVA BC                                        |-|----46|P|-----|-----|          |1111_010_011_011_000
  4807:             //CPUSHL BC,(Ar)                                  |-|----46|P|-----|-----|          |1111_010_011_101_rrr
  4808:             //CPUSHP BC,(Ar)                                  |-|----46|P|-----|-----|          |1111_010_011_110_rrr
  4809:             //CPUSHA BC                                       |-|----46|P|-----|-----|          |1111_010_011_111_000
  4810:           case 0b1111_010_011:
  4811:             irpCinvCpushBC ();
  4812:             break irpSwitch;
  4813: 
  4814:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  4815:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  4816:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  4817:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  4818:             //PFLUSHN (Ar)                                    |-|----46|P|-----|-----|          |1111_010_100_000_rrr
  4819:             //PFLUSH (Ar)                                     |-|----46|P|-----|-----|          |1111_010_100_001_rrr
  4820:             //PFLUSHAN                                        |-|----46|P|-----|-----|          |1111_010_100_010_000
  4821:             //PFLUSHA                                         |-|----46|P|-----|-----|          |1111_010_100_011_000
  4822:           case 0b1111_010_100:
  4823:             irpPflush ();
  4824:             break irpSwitch;
  4825: 
  4826:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  4827:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  4828:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  4829:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  4830:             //PLPAW (Ar)                                      |-|-----6|P|-----|-----|          |1111_010_110_001_rrr
  4831:           case 0b1111_010_110:
  4832:             irpPlpaw ();
  4833:             break irpSwitch;
  4834: 
  4835:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  4836:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  4837:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  4838:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  4839:             //PLPAR (Ar)                                      |-|-----6|P|-----|-----|          |1111_010_111_001_rrr
  4840:           case 0b1111_010_111:
  4841:             irpPlpar ();
  4842:             break irpSwitch;
  4843: 
  4844:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  4845:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  4846:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  4847:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  4848:             //MOVE16 (Ar)+,xxx.L                              |-|----46|-|-----|-----|          |1111_011_000_000_rrr-{address}
  4849:             //MOVE16 xxx.L,(Ar)+                              |-|----46|-|-----|-----|          |1111_011_000_001_rrr-{address}
  4850:             //MOVE16 (Ar),xxx.L                               |-|----46|-|-----|-----|          |1111_011_000_010_rrr-{address}
  4851:             //MOVE16 xxx.L,(Ar)                               |-|----46|-|-----|-----|          |1111_011_000_011_rrr-{address}
  4852:             //MOVE16 (Ar)+,(An)+                              |-|----46|-|-----|-----|          |1111_011_000_100_rrr-1nnn000000000000
  4853:           case 0b1111_011_000:
  4854:             irpMove16 ();
  4855:             break irpSwitch;
  4856: 
  4857:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  4858:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  4859:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  4860:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  4861:             //LPSTOP.W #<data>                                |-|-----6|P|-----|-----|          |1111_100_000_000_000-0000000111000000-{data}
  4862:           case 0b1111_100_000:
  4863:             irpLpstop ();
  4864:             break irpSwitch;
  4865: 
  4866:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  4867:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  4868:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  4869:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  4870:             //FPACK <data>                                    |A|012346|-|UUUUU|*****|          |1111_111_0dd_ddd_ddd [FLINE #<data>]
  4871:           case 0b1111_111_000:
  4872:           case 0b1111_111_001:
  4873:           case 0b1111_111_010:
  4874:           case 0b1111_111_011:
  4875:             irpFpack ();
  4876:             break irpSwitch;
  4877: 
  4878:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  4879:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  4880:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  4881:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  4882:             //DOS <data>                                      |A|012346|-|UUUUU|UUUUU|          |1111_111_1dd_ddd_ddd [FLINE #<data>]
  4883:           case 0b1111_111_100:
  4884:           case 0b1111_111_101:
  4885:           case 0b1111_111_110:
  4886:           case 0b1111_111_111:
  4887:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  4888:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  4889:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  4890:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  4891:             //FLINE #<data>                                   |-|012346|-|UUUUU|UUUUU|          |1111_ddd_ddd_ddd_ddd (line 1111 emulator)
  4892:           case 0b1111_000_000:
  4893:           case 0b1111_000_001:
  4894:           case 0b1111_000_010:
  4895:           case 0b1111_000_011:
  4896:           case 0b1111_000_100:
  4897:           case 0b1111_000_101:
  4898:           case 0b1111_000_110:
  4899:           case 0b1111_000_111:
  4900:           case 0b1111_001_110:
  4901:           case 0b1111_001_111:
  4902:           case 0b1111_010_101:
  4903:           case 0b1111_011_001:
  4904:           case 0b1111_011_010:
  4905:           case 0b1111_011_011:
  4906:           case 0b1111_011_100:
  4907:           case 0b1111_011_101:
  4908:           case 0b1111_011_110:
  4909:           case 0b1111_011_111:
  4910:           case 0b1111_100_001:
  4911:           case 0b1111_100_010:
  4912:           case 0b1111_100_011:
  4913:           case 0b1111_100_100:
  4914:           case 0b1111_100_101:
  4915:           case 0b1111_100_110:
  4916:           case 0b1111_100_111:
  4917:           case 0b1111_101_000:
  4918:           case 0b1111_101_001:
  4919:           case 0b1111_101_010:
  4920:           case 0b1111_101_011:
  4921:           case 0b1111_101_100:
  4922:           case 0b1111_101_101:
  4923:           case 0b1111_101_110:
  4924:           case 0b1111_101_111:
  4925:           case 0b1111_110_000:
  4926:           case 0b1111_110_001:
  4927:           case 0b1111_110_010:
  4928:           case 0b1111_110_011:
  4929:           case 0b1111_110_100:
  4930:           case 0b1111_110_101:
  4931:           case 0b1111_110_110:
  4932:           case 0b1111_110_111:
  4933:             irpFline ();
  4934:             break irpSwitch;
  4935: 
  4936:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  4937:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  4938:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  4939:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  4940:             //HFSBOOT                                         |-|012346|-|-----|-----|          |0100_111_000_000_000
  4941:             //HFSINST                                         |-|012346|-|-----|-----|          |0100_111_000_000_001
  4942:             //HFSSTR                                          |-|012346|-|-----|-----|          |0100_111_000_000_010
  4943:             //HFSINT                                          |-|012346|-|-----|-----|          |0100_111_000_000_011
  4944:             //EMXNOP                                          |-|012346|-|-----|-----|          |0100_111_000_000_100
  4945:           case 0b0100_111_000:
  4946:             irpEmx ();
  4947:             break;
  4948: 
  4949:           default:
  4950:             irpIllegal ();
  4951: 
  4952:           }  //switch XEiJ.regOC >>> 6
  4953: 
  4954:           //トレース例外
  4955:           //  命令実行前にsrのTビットがセットされていたとき命令実行後にトレース例外が発生する
  4956:           //  トレース例外の発動は命令の機能拡張であり、他の例外処理で命令が中断されたときはトレース例外は発生しない
  4957:           //  命令例外はトレース例外の前に、割り込み例外はトレース例外の後に処理される
  4958:           //  未実装命令のエミュレーションルーチンはrteの直前にsrのTビットを復元することで未実装命令が1個の命令としてトレースされたように見せる
  4959:           //    ;DOSコールの終了
  4960:           //    ~008616:
  4961:           //            btst.b  #$07,(sp)
  4962:           //            bne.s   ~00861E
  4963:           //            rte
  4964:           //    ~00861E:
  4965:           //            ori.w   #$8000,sr
  4966:           //            rte
  4967:           if (XEiJ.mpuTraceFlag != 0) {  //命令実行前にsrのTビットがセットされていた
  4968:             irpExceptionFormat2 (M68kException.M6E_TRACE << 2, XEiJ.regPC, XEiJ.regPC0);  //pcは次の命令
  4969:           }
  4970:           //クロックをカウントアップする
  4971:           //  オペランドをアクセスした時点ではまだXEiJ.mpuClockTimeが更新されていないのでXEiJ.mpuClockTime<xxxClock
  4972:           //  xxxTickを呼び出すときはXEiJ.mpuClockTime>=xxxClock
  4973:           XEiJ.mpuClockTime += XEiJ.mpuModifiedUnit * XEiJ.mpuCycleCount;
  4974:           //デバイスを呼び出す
  4975:           TickerQueue.tkqRun (XEiJ.mpuClockTime);
  4976:           //割り込みを受け付ける
  4977:           if ((t = XEiJ.mpuIMR & XEiJ.mpuIRR) != 0) {  //マスクされているレベルよりも高くて受け付けていない割り込みがあるとき
  4978:             if (XEiJ.MPU_INTERRUPT_SWITCH) {
  4979:               switch (t) {
  4980:               case 0b00000001:
  4981:               case 0b00000011:
  4982:               case 0b00000101:
  4983:               case 0b00000111:
  4984:               case 0b00001001:
  4985:               case 0b00001011:
  4986:               case 0b00001101:
  4987:               case 0b00001111:
  4988:               case 0b00010001:
  4989:               case 0b00010011:
  4990:               case 0b00010101:
  4991:               case 0b00010111:
  4992:               case 0b00011001:
  4993:               case 0b00011011:
  4994:               case 0b00011101:
  4995:               case 0b00011111:
  4996:               case 0b00100001:
  4997:               case 0b00100011:
  4998:               case 0b00100101:
  4999:               case 0b00100111:
  5000:               case 0b00101001:
  5001:               case 0b00101011:
  5002:               case 0b00101101:
  5003:               case 0b00101111:
  5004:               case 0b00110001:
  5005:               case 0b00110011:
  5006:               case 0b00110101:
  5007:               case 0b00110111:
  5008:               case 0b00111001:
  5009:               case 0b00111011:
  5010:               case 0b00111101:
  5011:               case 0b00111111:
  5012:               case 0b01000001:
  5013:               case 0b01000011:
  5014:               case 0b01000101:
  5015:               case 0b01000111:
  5016:               case 0b01001001:
  5017:               case 0b01001011:
  5018:               case 0b01001101:
  5019:               case 0b01001111:
  5020:               case 0b01010001:
  5021:               case 0b01010011:
  5022:               case 0b01010101:
  5023:               case 0b01010111:
  5024:               case 0b01011001:
  5025:               case 0b01011011:
  5026:               case 0b01011101:
  5027:               case 0b01011111:
  5028:               case 0b01100001:
  5029:               case 0b01100011:
  5030:               case 0b01100101:
  5031:               case 0b01100111:
  5032:               case 0b01101001:
  5033:               case 0b01101011:
  5034:               case 0b01101101:
  5035:               case 0b01101111:
  5036:               case 0b01110001:
  5037:               case 0b01110011:
  5038:               case 0b01110101:
  5039:               case 0b01110111:
  5040:               case 0b01111001:
  5041:               case 0b01111011:
  5042:               case 0b01111101:
  5043:               case 0b01111111:
  5044:               case 0b10000001:
  5045:               case 0b10000011:
  5046:               case 0b10000101:
  5047:               case 0b10000111:
  5048:               case 0b10001001:
  5049:               case 0b10001011:
  5050:               case 0b10001101:
  5051:               case 0b10001111:
  5052:               case 0b10010001:
  5053:               case 0b10010011:
  5054:               case 0b10010101:
  5055:               case 0b10010111:
  5056:               case 0b10011001:
  5057:               case 0b10011011:
  5058:               case 0b10011101:
  5059:               case 0b10011111:
  5060:               case 0b10100001:
  5061:               case 0b10100011:
  5062:               case 0b10100101:
  5063:               case 0b10100111:
  5064:               case 0b10101001:
  5065:               case 0b10101011:
  5066:               case 0b10101101:
  5067:               case 0b10101111:
  5068:               case 0b10110001:
  5069:               case 0b10110011:
  5070:               case 0b10110101:
  5071:               case 0b10110111:
  5072:               case 0b10111001:
  5073:               case 0b10111011:
  5074:               case 0b10111101:
  5075:               case 0b10111111:
  5076:               case 0b11000001:
  5077:               case 0b11000011:
  5078:               case 0b11000101:
  5079:               case 0b11000111:
  5080:               case 0b11001001:
  5081:               case 0b11001011:
  5082:               case 0b11001101:
  5083:               case 0b11001111:
  5084:               case 0b11010001:
  5085:               case 0b11010011:
  5086:               case 0b11010101:
  5087:               case 0b11010111:
  5088:               case 0b11011001:
  5089:               case 0b11011011:
  5090:               case 0b11011101:
  5091:               case 0b11011111:
  5092:               case 0b11100001:
  5093:               case 0b11100011:
  5094:               case 0b11100101:
  5095:               case 0b11100111:
  5096:               case 0b11101001:
  5097:               case 0b11101011:
  5098:               case 0b11101101:
  5099:               case 0b11101111:
  5100:               case 0b11110001:
  5101:               case 0b11110011:
  5102:               case 0b11110101:
  5103:               case 0b11110111:
  5104:               case 0b11111001:
  5105:               case 0b11111011:
  5106:               case 0b11111101:
  5107:               case 0b11111111:
  5108:                 //レベル7
  5109:                 XEiJ.mpuIRR &= ~XEiJ.MPU_SYS_INTERRUPT_MASK;  //割り込みを受け付ける
  5110:                 if ((t = XEiJ.sysAcknowledge ()) != 0) {  //デバイスにベクタ番号を要求して割り込み処理中の状態になったとき
  5111:                   irpInterrupt (t << 2, XEiJ.MPU_SYS_INTERRUPT_LEVEL);  //割り込み処理を開始する
  5112:                 }
  5113:                 break;
  5114:               case 0b00000010:
  5115:               case 0b00000110:
  5116:               case 0b00001010:
  5117:               case 0b00001110:
  5118:               case 0b00010010:
  5119:               case 0b00010110:
  5120:               case 0b00011010:
  5121:               case 0b00011110:
  5122:               case 0b00100010:
  5123:               case 0b00100110:
  5124:               case 0b00101010:
  5125:               case 0b00101110:
  5126:               case 0b00110010:
  5127:               case 0b00110110:
  5128:               case 0b00111010:
  5129:               case 0b00111110:
  5130:               case 0b01000010:
  5131:               case 0b01000110:
  5132:               case 0b01001010:
  5133:               case 0b01001110:
  5134:               case 0b01010010:
  5135:               case 0b01010110:
  5136:               case 0b01011010:
  5137:               case 0b01011110:
  5138:               case 0b01100010:
  5139:               case 0b01100110:
  5140:               case 0b01101010:
  5141:               case 0b01101110:
  5142:               case 0b01110010:
  5143:               case 0b01110110:
  5144:               case 0b01111010:
  5145:               case 0b01111110:
  5146:               case 0b10000010:
  5147:               case 0b10000110:
  5148:               case 0b10001010:
  5149:               case 0b10001110:
  5150:               case 0b10010010:
  5151:               case 0b10010110:
  5152:               case 0b10011010:
  5153:               case 0b10011110:
  5154:               case 0b10100010:
  5155:               case 0b10100110:
  5156:               case 0b10101010:
  5157:               case 0b10101110:
  5158:               case 0b10110010:
  5159:               case 0b10110110:
  5160:               case 0b10111010:
  5161:               case 0b10111110:
  5162:               case 0b11000010:
  5163:               case 0b11000110:
  5164:               case 0b11001010:
  5165:               case 0b11001110:
  5166:               case 0b11010010:
  5167:               case 0b11010110:
  5168:               case 0b11011010:
  5169:               case 0b11011110:
  5170:               case 0b11100010:
  5171:               case 0b11100110:
  5172:               case 0b11101010:
  5173:               case 0b11101110:
  5174:               case 0b11110010:
  5175:               case 0b11110110:
  5176:               case 0b11111010:
  5177:               case 0b11111110:
  5178:                 //レベル6
  5179:                 XEiJ.mpuIRR &= ~XEiJ.MPU_MFP_INTERRUPT_MASK;  //割り込みを受け付ける
  5180:                 if ((t = MC68901.mfpAcknowledge ()) != 0) {  //デバイスにベクタ番号を要求して割り込み処理中の状態になったとき
  5181:                   irpInterrupt (t << 2, XEiJ.MPU_MFP_INTERRUPT_LEVEL);  //割り込み処理を開始する
  5182:                 }
  5183:                 break;
  5184:               case 0b00000100:
  5185:               case 0b00001100:
  5186:               case 0b00010100:
  5187:               case 0b00011100:
  5188:               case 0b00100100:
  5189:               case 0b00101100:
  5190:               case 0b00110100:
  5191:               case 0b00111100:
  5192:               case 0b01000100:
  5193:               case 0b01001100:
  5194:               case 0b01010100:
  5195:               case 0b01011100:
  5196:               case 0b01100100:
  5197:               case 0b01101100:
  5198:               case 0b01110100:
  5199:               case 0b01111100:
  5200:               case 0b10000100:
  5201:               case 0b10001100:
  5202:               case 0b10010100:
  5203:               case 0b10011100:
  5204:               case 0b10100100:
  5205:               case 0b10101100:
  5206:               case 0b10110100:
  5207:               case 0b10111100:
  5208:               case 0b11000100:
  5209:               case 0b11001100:
  5210:               case 0b11010100:
  5211:               case 0b11011100:
  5212:               case 0b11100100:
  5213:               case 0b11101100:
  5214:               case 0b11110100:
  5215:               case 0b11111100:
  5216:                 //レベル5
  5217:                 XEiJ.mpuIRR &= ~XEiJ.MPU_SCC_INTERRUPT_MASK;  //割り込みを受け付ける
  5218:                 if ((t = Z8530.sccAcknowledge ()) != 0) {  //デバイスにベクタ番号を要求して割り込み処理中の状態になったとき
  5219:                   irpInterrupt (t << 2, XEiJ.MPU_SCC_INTERRUPT_LEVEL);  //割り込み処理を開始する
  5220:                 }
  5221:                 break;
  5222:               case 0b00010000:
  5223:               case 0b00110000:
  5224:               case 0b01010000:
  5225:               case 0b01110000:
  5226:               case 0b10010000:
  5227:               case 0b10110000:
  5228:               case 0b11010000:
  5229:               case 0b11110000:
  5230:                 //レベル3
  5231:                 XEiJ.mpuIRR &= ~XEiJ.MPU_DMA_INTERRUPT_MASK;  //割り込みを受け付ける
  5232:                 if ((t = HD63450.dmaAcknowledge ()) != 0) {  //デバイスにベクタ番号を要求して割り込み処理中の状態になったとき
  5233:                   irpInterrupt (t << 2, XEiJ.MPU_DMA_INTERRUPT_LEVEL);  //割り込み処理を開始する
  5234:                 }
  5235:                 break;
  5236:               case 0b00100000:
  5237:               case 0b01100000:
  5238:               case 0b10100000:
  5239:               case 0b11100000:
  5240:                 //レベル2
  5241:                 XEiJ.mpuIRR &= ~XEiJ.MPU_EB2_INTERRUPT_MASK;  //割り込みを受け付ける
  5242:                 if ((t = XEiJ.eb2Acknowledge ()) != 0) {  //デバイスにベクタ番号を要求して割り込み処理中の状態になったとき
  5243:                   irpInterrupt (t << 2, XEiJ.MPU_EB2_INTERRUPT_LEVEL);  //割り込み処理を開始する
  5244:                 }
  5245:                 break;
  5246:               case 0b01000000:
  5247:               case 0b11000000:
  5248:                 //レベル1
  5249:                 XEiJ.mpuIRR &= ~XEiJ.MPU_IOI_INTERRUPT_MASK;  //割り込みを受け付ける
  5250:                 if ((t = IOInterrupt.ioiAcknowledge ()) != 0) {  //デバイスにベクタ番号を要求して割り込み処理中の状態になったとき
  5251:                   irpInterrupt (t << 2, XEiJ.MPU_IOI_INTERRUPT_LEVEL);  //割り込み処理を開始する
  5252:                 }
  5253:                 break;
  5254:               }
  5255:             } else {
  5256:               t &= -t;
  5257:               //  x&=-xはxの最下位の1のビットだけを残す演算
  5258:               //  すなわちマスクされているレベルよりも高くて受け付けていない割り込みの中で最高レベルの割り込みのビットだけが残る
  5259:               //  最高レベルの割り込みのビットしか残っていないので、割り込みの有無をレベルの高い順ではなく使用頻度の高い順に調べられる
  5260:               //  MFPやDMAの割り込みがかかる度にそれより優先度の高いインタラプトスイッチが押されていないかどうかを確かめる必要がない
  5261:               if (t == XEiJ.MPU_MFP_INTERRUPT_MASK) {
  5262:                 XEiJ.mpuIRR &= ~XEiJ.MPU_MFP_INTERRUPT_MASK;  //割り込みを受け付ける
  5263:                 if ((t = MC68901.mfpAcknowledge ()) != 0) {  //デバイスにベクタ番号を要求して割り込み処理中の状態になったとき
  5264:                   irpInterrupt (t << 2, XEiJ.MPU_MFP_INTERRUPT_LEVEL);  //割り込み処理を開始する
  5265:                 }
  5266:               } else if (t == XEiJ.MPU_DMA_INTERRUPT_MASK) {
  5267:                 XEiJ.mpuIRR &= ~XEiJ.MPU_DMA_INTERRUPT_MASK;  //割り込みを受け付ける
  5268:                 if ((t = HD63450.dmaAcknowledge ()) != 0) {  //デバイスにベクタ番号を要求して割り込み処理中の状態になったとき
  5269:                   irpInterrupt (t << 2, XEiJ.MPU_DMA_INTERRUPT_LEVEL);  //割り込み処理を開始する
  5270:                 }
  5271:               } else if (t == XEiJ.MPU_SCC_INTERRUPT_MASK) {
  5272:                 XEiJ.mpuIRR &= ~XEiJ.MPU_SCC_INTERRUPT_MASK;  //割り込みを受け付ける
  5273:                 if ((t = Z8530.sccAcknowledge ()) != 0) {  //デバイスにベクタ番号を要求して割り込み処理中の状態になったとき
  5274:                   irpInterrupt (t << 2, XEiJ.MPU_SCC_INTERRUPT_LEVEL);  //割り込み処理を開始する
  5275:                 }
  5276:               } else if (t == XEiJ.MPU_IOI_INTERRUPT_MASK) {
  5277:                 XEiJ.mpuIRR &= ~XEiJ.MPU_IOI_INTERRUPT_MASK;  //割り込みを受け付ける
  5278:                 if ((t = IOInterrupt.ioiAcknowledge ()) != 0) {  //デバイスにベクタ番号を要求して割り込み処理中の状態になったとき
  5279:                   irpInterrupt (t << 2, XEiJ.MPU_IOI_INTERRUPT_LEVEL);  //割り込み処理を開始する
  5280:                 }
  5281:               } else if (t == XEiJ.MPU_EB2_INTERRUPT_MASK) {
  5282:                 XEiJ.mpuIRR &= ~XEiJ.MPU_EB2_INTERRUPT_MASK;  //割り込みを受け付ける
  5283:                 if ((t = XEiJ.eb2Acknowledge ()) != 0) {  //デバイスにベクタ番号を要求して割り込み処理中の状態になったとき
  5284:                   irpInterrupt (t << 2, XEiJ.MPU_EB2_INTERRUPT_LEVEL);  //割り込み処理を開始する
  5285:                 }
  5286:               } else if (t == XEiJ.MPU_SYS_INTERRUPT_MASK) {
  5287:                 XEiJ.mpuIRR &= ~XEiJ.MPU_SYS_INTERRUPT_MASK;  //割り込みを受け付ける
  5288:                 if ((t = XEiJ.sysAcknowledge ()) != 0) {  //デバイスにベクタ番号を要求して割り込み処理中の状態になったとき
  5289:                   irpInterrupt (t << 2, XEiJ.MPU_SYS_INTERRUPT_LEVEL);  //割り込み処理を開始する
  5290:                 }
  5291:               }
  5292:             }
  5293:           }  //if t!=0
  5294:           if (MC68901.MFP_DELAYED_INTERRUPT) {
  5295:             XEiJ.mpuIRR |= XEiJ.mpuDIRR;  //遅延割り込み要求
  5296:             XEiJ.mpuDIRR = 0;
  5297:           }
  5298:         }  //命令ループ
  5299:       } catch (M68kException e) {
  5300:         if (M68kException.m6eNumber == M68kException.M6E_WAIT_EXCEPTION) {  //待機例外
  5301:           if (irpWaitException ()) {
  5302:             continue;
  5303:           } else {
  5304:             break errorLoop;
  5305:           }
  5306:         }
  5307:         if (M68kException.m6eNumber == M68kException.M6E_INSTRUCTION_BREAK_POINT) {  //命令ブレークポイントによる停止
  5308:           XEiJ.regPC = XEiJ.regPC0;
  5309:           XEiJ.mpuStop1 (null);  //"Instruction Break Point"
  5310:           break errorLoop;
  5311:         }
  5312:         //例外処理
  5313:         //  ここで処理するのはベクタ番号が2~63の例外に限る
  5314:         //  例外処理のサイクル数はACCESS_FAULTとADDRESS_ERROR以外は19になっているので必要ならば補正してからthrowする
  5315:         //  使用頻度が高いと思われる例外はインライン展開するのでここには来ない
  5316:         //  セーブされるpcは以下の例外は命令の先頭、これ以外は次の命令
  5317:         //     2  ACCESS_FAULT
  5318:         //     3  ADDRESS_ERROR
  5319:         //     4  ILLEGAL_INSTRUCTION
  5320:         //     8  PRIVILEGE_VIOLATION
  5321:         //    10  LINE_1010_EMULATOR
  5322:         //    11  LINE_1111_EMULATOR
  5323:         //    14  FORMAT_ERROR
  5324:         //    48  FP_BRANCH_SET_UNORDERED
  5325:         //    60  UNIMPLEMENTED_EFFECTIVE
  5326:         //    61  UNIMPLEMENTED_INSTRUCTION
  5327:         //              111111111122222222223333333333444444444455555555556666
  5328:         //    0123456789012345678901234567890123456789012345678901234567890123
  5329:         if (0b0011100010110010000000000000000000000000000000001000000000001100L << M68kException.m6eNumber < 0L) {
  5330:           XEiJ.regPC = XEiJ.regPC0;  //セーブされるpcは命令の先頭
  5331:           //アドレスレジスタを巻き戻す
  5332:           //  A7を含むのでユーザモードのときはスーパーバイザモードに移行する前に巻き戻すこと
  5333:           for (int arr = 8; m60Incremented != 0L; arr++) {
  5334:             XEiJ.regRn[arr] -= (byte) m60Incremented;
  5335:             m60Incremented = (m60Incremented + 0x80L) >> 8;
  5336:           }
  5337:         }
  5338:         //FSLWのTTRを設定する
  5339:         //  透過変換でアドレス変換キャッシュがヒットしてバスエラーが発生したときFSLWのTTRが設定されていない
  5340:         //!!! SECONDのときFIRSTと同じページか確認していない。ページフォルトのときは次のページだがバスエラーのときは同じページかもしれない
  5341:         if ((m60FSLW & (M60_FSLW_BUS_ERROR_ON_READ | M60_FSLW_BUS_ERROR_ON_WRITE)) != 0) {  //バスエラーのとき
  5342:           if (((m60FSLW & M60_FSLW_TM_SUPERVISOR) != 0 ?
  5343:                (m60FSLW & M60_FSLW_TM_CODE) != 0 ? mmuSuperCodeTransparent : mmuSuperDataTransparent :
  5344:                (m60FSLW & M60_FSLW_TM_CODE) != 0 ? mmuUserCodeTransparent : mmuUserDataTransparent)
  5345:               [m60Address >>> 24] != 0) {  //透過変換
  5346:             m60FSLW |= M60_FSLW_TRANSPARENT;
  5347:           }
  5348:         }
  5349:         if (false) {
  5350:           System.out.println (m60ErrorToString ());  //srを表示するのでsrを更新する前に呼び出すこと
  5351:         }
  5352:         try {
  5353:           int save_sr = XEiJ.regSRT1 | XEiJ.regSRS | XEiJ.regSRM | XEiJ.regSRI | XEiJ.regCCR;
  5354:           XEiJ.regSRT1 = XEiJ.mpuTraceFlag = 0;  //srのTビットを消す
  5355:           int sp;
  5356:           if (XEiJ.regSRS != 0) {  //スーパーバイザモード
  5357:             sp = XEiJ.regRn[15];
  5358:           } else {  //ユーザモード
  5359:             XEiJ.regSRS = XEiJ.REG_SR_S;  //スーパーバイザモードへ移行する
  5360:             XEiJ.mpuUSP = XEiJ.regRn[15];  //USPを保存
  5361:             sp = XEiJ.mpuISP;  //SSPを復元
  5362:             if (DataBreakPoint.DBP_ON) {
  5363:               DataBreakPoint.dbpMemoryMap = DataBreakPoint.dbpSuperMap;  //スーパーバイザメモリマップに切り替える
  5364:             } else {
  5365:               XEiJ.busMemoryMap = XEiJ.busSuperMap;  //スーパーバイザメモリマップに切り替える
  5366:             }
  5367:             if (InstructionBreakPoint.IBP_ON) {
  5368:               InstructionBreakPoint.ibpOp1MemoryMap = InstructionBreakPoint.ibpOp1SuperMap;
  5369:             }
  5370:           }
  5371:           //以下はスーパーバイザモード
  5372:           XEiJ.mpuClockTime += XEiJ.mpuModifiedUnit * 19;
  5373:           //  同じオフセットで異なるフォーマットになるものはここでは処理できない
  5374:           if (M68kException.m6eNumber == M68kException.M6E_ACCESS_FAULT) {
  5375:             //ホストファイルシステムのデバイスコマンドを強制終了させる
  5376:             HFS.hfsState = HFS.HFS_STATE_IDLE;
  5377:             //FORMAT $4の例外スタックフレームを作る
  5378:             XEiJ.regRn[15] = sp -= 16;
  5379:             mmuWriteLongData (sp + 12, m60FSLW, 1);  //15-12:フォルトステータスロングワード(FSLW)
  5380:             mmuWriteLongData (sp + 8, m60Address, 1);  //11-8:フォルトアドレス
  5381:             mmuWriteWordData (sp + 6, 0x4000 | M68kException.M6E_ACCESS_FAULT << 2, 1);  //7-6:フォーマットとベクタオフセット
  5382:             //                   111111111122222222223333333333444444444455555555556666
  5383:             //         0123456789012345678901234567890123456789012345678901234567890123
  5384:           } else if (0b0001011101000000000000000000000000000000000000000000000000000000L << M68kException.m6eNumber < 0L) {
  5385:             //FORMAT $2の例外スタックフレームを作る
  5386:             XEiJ.regRn[15] = sp -= 12;
  5387:             mmuWriteLongData (sp + 8, m60Address, 1);  //11-8:命令アドレス
  5388:             mmuWriteWordData (sp + 6, 0x2000 | M68kException.m6eNumber << 2, 1);  //7-6:フォーマットとベクタオフセット
  5389:           } else {
  5390:             //FORMAT $0の例外スタックフレームを作る
  5391:             XEiJ.regRn[15] = sp -= 8;
  5392:             mmuWriteWordData (sp + 6, M68kException.m6eNumber << 2, 1);  //7-6:フォーマットとベクタオフセット
  5393:           }
  5394:           mmuWriteLongData (sp + 2, XEiJ.regPC, 1);  //5-2:プログラムカウンタ
  5395:           mmuWriteWordData (sp, save_sr, 1);  //1-0:ステータスレジスタ
  5396:           irpSetPC (mmuReadLongFour (XEiJ.mpuVBR + (M68kException.m6eNumber << 2), 1));  //例外ベクタを取り出してジャンプする
  5397:           if (XEiJ.dbgStopOnError) {  //エラーで停止する場合
  5398:             if (XEiJ.dbgDoStopOnError ()) {
  5399:               break errorLoop;
  5400:             }
  5401:           }
  5402:         } catch (M68kException ee) {  //ダブルバスフォルト
  5403:           XEiJ.dbgDoubleBusFault ();
  5404:           break errorLoop;
  5405:         }
  5406:       }  //catch M68kException
  5407:     }  //例外ループ
  5408: 
  5409:     //  通常
  5410:     //    pc0  最後に実行した命令
  5411:     //    pc  次に実行する命令
  5412:     //  バスエラー、アドレスエラー、不当命令、特権違反で停止したとき
  5413:     //    pc0  エラーを発生させた命令
  5414:     //    pc  例外処理ルーチンの先頭
  5415:     //  ダブルバスフォルトで停止したとき
  5416:     //    pc0  エラーを発生させた命令
  5417:     //    pc  エラーを発生させた命令
  5418:     //  命令ブレークポイントで停止したとき
  5419:     //    pc0  命令ブレークポイントが設定された、次に実行する命令
  5420:     //    pc  命令ブレークポイントが設定された、次に実行する命令
  5421:     //  データブレークポイントで停止したとき
  5422:     //    pc0  データを書き換えた、最後に実行した命令
  5423:     //    pc  次に実行する命令
  5424: 
  5425:     //分岐ログに停止レコードを記録する
  5426:     if (BranchLog.BLG_ON) {
  5427:       BranchLog.blgStop ();
  5428:     }
  5429: 
  5430:   }  //mpuCore()
  5431: 
  5432: 
  5433: 
  5434:   //cont = irpWaitException ()
  5435:   //  待機例外をキャッチしたとき
  5436:   public static boolean irpWaitException () {
  5437:     XEiJ.regPC = XEiJ.regPC0;  //PCを巻き戻す
  5438:     XEiJ.regRn[8 + (XEiJ.regOC & 7)] += WaitInstruction.REWIND_AR[XEiJ.regOC >> 3];  //(Ar)+|-(Ar)で変化したArを巻き戻す
  5439:     try {
  5440:       //トレース例外を処理する
  5441:       if (XEiJ.mpuTraceFlag != 0) {  //命令実行前にsrのTビットがセットされていた
  5442:         irpExceptionFormat2 (M68kException.M6E_TRACE << 2, XEiJ.regPC, XEiJ.regPC0);  //pcは次の命令
  5443:       }
  5444:       //デバイスを呼び出す
  5445:       TickerQueue.tkqRun (XEiJ.mpuClockTime);
  5446:       //割り込みを受け付ける
  5447:       int t;
  5448:       if ((t = XEiJ.mpuIMR & XEiJ.mpuIRR) != 0) {  //マスクされているレベルよりも高くて受け付けていない割り込みがあるとき
  5449:         t &= -t;
  5450:         //  x&=-xはxの最下位の1のビットだけを残す演算
  5451:         //  すなわちマスクされているレベルよりも高くて受け付けていない割り込みの中で最高レベルの割り込みのビットだけが残る
  5452:         //  最高レベルの割り込みのビットしか残っていないので、割り込みの有無をレベルの高い順ではなく使用頻度の高い順に調べられる
  5453:         //  MFPやDMAの割り込みがかかる度にそれより優先度の高いインタラプトスイッチが押されていないかどうかを確かめる必要がない
  5454:         if (t == XEiJ.MPU_MFP_INTERRUPT_MASK) {
  5455:           XEiJ.mpuIRR &= ~XEiJ.MPU_MFP_INTERRUPT_MASK;  //割り込みを受け付ける
  5456:           if ((t = MC68901.mfpAcknowledge ()) != 0) {  //デバイスにベクタ番号を要求して割り込み処理中の状態になったとき
  5457:             irpInterrupt (t << 2, XEiJ.MPU_MFP_INTERRUPT_LEVEL);  //割り込み処理を開始する
  5458:           }
  5459:         } else if (t == XEiJ.MPU_DMA_INTERRUPT_MASK) {
  5460:           XEiJ.mpuIRR &= ~XEiJ.MPU_DMA_INTERRUPT_MASK;  //割り込みを受け付ける
  5461:           if ((t = HD63450.dmaAcknowledge ()) != 0) {  //デバイスにベクタ番号を要求して割り込み処理中の状態になったとき
  5462:             irpInterrupt (t << 2, XEiJ.MPU_DMA_INTERRUPT_LEVEL);  //割り込み処理を開始する
  5463:           }
  5464:         } else if (t == XEiJ.MPU_SCC_INTERRUPT_MASK) {
  5465:           XEiJ.mpuIRR &= ~XEiJ.MPU_SCC_INTERRUPT_MASK;  //割り込みを受け付ける
  5466:           if ((t = Z8530.sccAcknowledge ()) != 0) {  //デバイスにベクタ番号を要求して割り込み処理中の状態になったとき
  5467:             irpInterrupt (t << 2, XEiJ.MPU_SCC_INTERRUPT_LEVEL);  //割り込み処理を開始する
  5468:           }
  5469:         } else if (t == XEiJ.MPU_IOI_INTERRUPT_MASK) {
  5470:           XEiJ.mpuIRR &= ~XEiJ.MPU_IOI_INTERRUPT_MASK;  //割り込みを受け付ける
  5471:           if ((t = IOInterrupt.ioiAcknowledge ()) != 0) {  //デバイスにベクタ番号を要求して割り込み処理中の状態になったとき
  5472:             irpInterrupt (t << 2, XEiJ.MPU_IOI_INTERRUPT_LEVEL);  //割り込み処理を開始する
  5473:           }
  5474:         } else if (t == XEiJ.MPU_EB2_INTERRUPT_MASK) {
  5475:           XEiJ.mpuIRR &= ~XEiJ.MPU_EB2_INTERRUPT_MASK;  //割り込みを受け付ける
  5476:           if ((t = XEiJ.eb2Acknowledge ()) != 0) {  //デバイスにベクタ番号を要求して割り込み処理中の状態になったとき
  5477:             irpInterrupt (t << 2, XEiJ.MPU_EB2_INTERRUPT_LEVEL);  //割り込み処理を開始する
  5478:           }
  5479:         } else if (t == XEiJ.MPU_SYS_INTERRUPT_MASK) {
  5480:           XEiJ.mpuIRR &= ~XEiJ.MPU_SYS_INTERRUPT_MASK;  //割り込みを受け付ける
  5481:           if ((t = XEiJ.sysAcknowledge ()) != 0) {  //デバイスにベクタ番号を要求して割り込み処理中の状態になったとき
  5482:             irpInterrupt (t << 2, XEiJ.MPU_SYS_INTERRUPT_LEVEL);  //割り込み処理を開始する
  5483:           }
  5484:         }
  5485:       }  //if t!=0
  5486:       if (MC68901.MFP_DELAYED_INTERRUPT) {
  5487:         XEiJ.mpuIRR |= XEiJ.mpuDIRR;  //遅延割り込み要求
  5488:         XEiJ.mpuDIRR = 0;
  5489:       }
  5490:     } catch (M68kException e) {
  5491:       //!!! 待機例外処理中のバスエラーの処理は省略
  5492:       XEiJ.dbgDoubleBusFault ();
  5493:       return false;
  5494:     }  //catch M68kException
  5495:     return true;
  5496:   }  //irpWaitException
  5497: 
  5498: 
  5499: 
  5500:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  5501:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  5502:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  5503:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  5504:   //ORI.B #<data>,<ea>                              |-|012346|-|-UUUU|-**00|D M+-WXZ  |0000_000_000_mmm_rrr-{data}
  5505:   //OR.B #<data>,<ea>                               |A|012346|-|-UUUU|-**00|  M+-WXZ  |0000_000_000_mmm_rrr-{data}  [ORI.B #<data>,<ea>]
  5506:   //ORI.B #<data>,CCR                               |-|012346|-|*****|*****|          |0000_000_000_111_100-{data}
  5507:   public static void irpOriByte () throws M68kException {
  5508:     int ea = XEiJ.regOC & 63;
  5509:     int z = mmuReadByteSignExword ((XEiJ.regPC += 2) - 1, XEiJ.regSRS);  //pcbs
  5510:     if (ea < XEiJ.EA_AR) {  //ORI.B #<data>,Dr
  5511:       if (XEiJ.DBG_ORI_BYTE_ZERO_D0) {
  5512:         if (z == 0 && ea == 0 && XEiJ.dbgOriByteZeroD0) {  //ORI.B #$00,D0
  5513:           M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION;
  5514:           throw M68kException.m6eSignal;
  5515:         }
  5516:       }
  5517:       XEiJ.mpuCycleCount++;
  5518:       z = XEiJ.regRn[ea] |= 255 & z;  //0拡張してからOR
  5519:       XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & z];  //ccr_tst_byte
  5520:     } else if (ea == XEiJ.EA_IM) {  //ORI.B #<data>,CCR
  5521:       XEiJ.mpuCycleCount++;
  5522:       XEiJ.regCCR |= XEiJ.REG_CCR_MASK & z;
  5523:     } else {  //ORI.B #<data>,<mem>
  5524:       XEiJ.mpuCycleCount++;
  5525:       int a = efaMltByte (ea);
  5526:       mmuWriteByteData (a, z |= mmuModifyByteSignData (a, XEiJ.regSRS), XEiJ.regSRS);
  5527:       XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & z];  //ccr_tst_byte
  5528:     }
  5529:   }  //irpOriByte
  5530: 
  5531:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  5532:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  5533:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  5534:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  5535:   //ORI.W #<data>,<ea>                              |-|012346|-|-UUUU|-**00|D M+-WXZ  |0000_000_001_mmm_rrr-{data}
  5536:   //OR.W #<data>,<ea>                               |A|012346|-|-UUUU|-**00|  M+-WXZ  |0000_000_001_mmm_rrr-{data}  [ORI.W #<data>,<ea>]
  5537:   //ORI.W #<data>,SR                                |-|012346|P|*****|*****|          |0000_000_001_111_100-{data}
  5538:   public static void irpOriWord () throws M68kException {
  5539:     int ea = XEiJ.regOC & 63;
  5540:     if (ea < XEiJ.EA_AR) {  //ORI.W #<data>,Dr
  5541:       int z = mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);  //pcws
  5542:       XEiJ.mpuCycleCount++;
  5543:       z = XEiJ.regRn[ea] |= (char) z;  //0拡張してからOR
  5544:       XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (char) z - 1 >> 31 & XEiJ.REG_CCR_Z | ((short) z < 0 ? XEiJ.REG_CCR_N : 0);  //ccr_tst_word
  5545:     } else if (ea == XEiJ.EA_IM) {  //ORI.W #<data>,SR
  5546:       if (XEiJ.regSRS == 0) {  //ユーザモードのとき
  5547:         M68kException.m6eNumber = M68kException.M6E_PRIVILEGE_VIOLATION;
  5548:         throw M68kException.m6eSignal;
  5549:       }
  5550:       //以下はスーパーバイザモード
  5551:       XEiJ.mpuCycleCount += 5;
  5552:       irpSetSR (XEiJ.regSRT1 | XEiJ.regSRS | XEiJ.regSRM | XEiJ.regSRI | XEiJ.regCCR | mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, 1));  //pcws。特権違反チェックが先
  5553:     } else {  //ORI.W #<data>,<mem>
  5554:       int z = mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);  //pcws
  5555:       XEiJ.mpuCycleCount++;
  5556:       int a = efaMltWord (ea);
  5557:       mmuWriteWordData (a, z |= mmuModifyWordSignData (a, XEiJ.regSRS), XEiJ.regSRS);
  5558:       XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (char) z - 1 >> 31 & XEiJ.REG_CCR_Z | ((short) z < 0 ? XEiJ.REG_CCR_N : 0);  //ccr_tst_word
  5559:     }
  5560:   }  //irpOriWord
  5561: 
  5562:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  5563:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  5564:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  5565:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  5566:   //ORI.L #<data>,<ea>                              |-|012346|-|-UUUU|-**00|D M+-WXZ  |0000_000_010_mmm_rrr-{data}
  5567:   //OR.L #<data>,<ea>                               |A|012346|-|-UUUU|-**00|  M+-WXZ  |0000_000_010_mmm_rrr-{data}  [ORI.L #<data>,<ea>]
  5568:   public static void irpOriLong () throws M68kException {
  5569:     int ea = XEiJ.regOC & 63;
  5570:     int y = mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS);  //pcls
  5571:     int z;
  5572:     if (ea < XEiJ.EA_AR) {  //ORI.L #<data>,Dr
  5573:       XEiJ.mpuCycleCount++;
  5574:       z = XEiJ.regRn[ea] |= y;
  5575:     } else {  //ORI.L #<data>,<mem>
  5576:       XEiJ.mpuCycleCount++;
  5577:       int a = efaMltLong (ea);
  5578:       mmuWriteLongData (a, z = mmuModifyLongData (a, XEiJ.regSRS) | y, XEiJ.regSRS);
  5579:     }
  5580:     XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X);  //ccr_tst
  5581:   }  //irpOriLong
  5582: 
  5583:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  5584:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  5585:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  5586:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  5587:   //BITREV.L Dr                                     |-|------|-|-----|-----|D         |0000_000_011_000_rrr (ISA_C)
  5588:   //CMP2.B <ea>,Rn                                  |-|--234S|-|-UUUU|-U*U*|  M  WXZP |0000_000_011_mmm_rrr-rnnn000000000000
  5589:   //CHK2.B <ea>,Rn                                  |-|--234S|-|-UUUU|-U*U*|  M  WXZP |0000_000_011_mmm_rrr-rnnn100000000000
  5590:   //
  5591:   //BITREV.L Dr
  5592:   //  Drのビットの並びを逆順にする。CCRは変化しない
  5593:   //
  5594:   //CHK2.B <ea>,Rn
  5595:   //  <ea>から下限と上限をリードしてRnが範囲内か調べる
  5596:   //  CHK2.B <ea>,Anは下限と上限をそれぞれロングに符号拡張してロングで比較する
  5597:   //  Rnが下限または上限と等しいときZをセットする
  5598:   //  Rnが範囲外のときCをセットする。このときCHK instruction例外が発生する
  5599:   //  060ISPのソースは注釈に誤りが多いので注釈ではなくコードを参考にする
  5600:   //  CCR
  5601:   //    X  変化しない
  5602:   //    N  変化しない(M68000PRMでは未定義)
  5603:   //    Z  Rn-LB==0||Rn-LB==UB-LB
  5604:   //    V  変化しない(M68000PRMでは未定義)
  5605:   //    C  Rn-LB>UB-LB(符号なし比較)
  5606:   //
  5607:   //CMP2.B <ea>,Rn
  5608:   //  <ea>から下限と上限をリードしてRnが範囲内か調べる
  5609:   //  CMP2.B <ea>,Anは下限と上限をそれぞれロングに符号拡張してロングで比較する
  5610:   //  Rnが下限または上限と等しいときZをセットする
  5611:   //  Rnが範囲外のときCをセットする
  5612:   //  060ISPのソースは注釈に誤りが多いので注釈ではなくコードを参考にする
  5613:   //  CCR
  5614:   //    X  変化しない
  5615:   //    N  変化しない(M68000PRMでは未定義)
  5616:   //    Z  Rn-LB==0||Rn-LB==UB-LB
  5617:   //    V  変化しない(M68000PRMでは未定義)
  5618:   //    C  Rn-LB>UB-LB(符号なし比較)
  5619:   public static void irpCmp2Chk2Byte () throws M68kException {
  5620:     int ea = XEiJ.regOC & 63;
  5621:     if (ea < XEiJ.EA_AR) {  //BITREV.L Dr
  5622:       XEiJ.mpuCycleCount++;
  5623:       int x = XEiJ.regRn[ea];
  5624:       XEiJ.regRn[ea] = XEiJ.MPU_BITREV_TABLE_0[x & 2047] | XEiJ.MPU_BITREV_TABLE_1[x << 10 >>> 21] | XEiJ.MPU_BITREV_TABLE_2[x >>> 22];
  5625:     } else {  //CMP2/CHK2.B <ea>,Rn
  5626:       M68kException.m6eNumber = M68kException.M6E_UNIMPLEMENTED_INSTRUCTION;
  5627:       throw M68kException.m6eSignal;
  5628:     }
  5629:   }  //irpCmp2Chk2Byte
  5630: 
  5631:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  5632:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  5633:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  5634:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  5635:   //BTST.L Dq,Dr                                    |-|012346|-|--U--|--*--|D         |0000_qqq_100_000_rrr
  5636:   //MOVEP.W (d16,Ar),Dq                             |-|01234S|-|-----|-----|          |0000_qqq_100_001_rrr-{data}
  5637:   //BTST.B Dq,<ea>                                  |-|012346|-|--U--|--*--|  M+-WXZPI|0000_qqq_100_mmm_rrr
  5638:   public static void irpBtstReg () throws M68kException {
  5639:     int ea = XEiJ.regOC & 63;
  5640:     int qqq = XEiJ.regOC >> 9;  //qqq
  5641:     if (ea >> 3 == XEiJ.MMM_AR) {  //MOVEP.W (d16,Ar),Dq
  5642:       M68kException.m6eNumber = M68kException.M6E_UNIMPLEMENTED_INSTRUCTION;
  5643:       throw M68kException.m6eSignal;
  5644:     } else {  //BTST.L Dq,Dr/<ea>
  5645:       int y = XEiJ.regRn[qqq];
  5646:       if (ea < XEiJ.EA_AR) {  //BTST.L Dq,Dr
  5647:         XEiJ.mpuCycleCount++;
  5648:         XEiJ.regCCR = XEiJ.regCCR & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_N | XEiJ.REG_CCR_V | XEiJ.REG_CCR_C) | (~XEiJ.regRn[ea] >>> y & 1) << 2;  //ccr_btst。intのシフトは5bitでマスクされるので&31を省略
  5649:       } else {  //BTST.B Dq,<ea>
  5650:         XEiJ.mpuCycleCount++;
  5651:         XEiJ.regCCR = XEiJ.regCCR & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_N | XEiJ.REG_CCR_V | XEiJ.REG_CCR_C) | (~(ea == XEiJ.EA_IM ? mmuReadByteSignExword ((XEiJ.regPC += 2) - 1, XEiJ.regSRS) : mmuReadByteSignData (efaAnyByte (ea), XEiJ.regSRS)) >>> (y & 7) & 1) << 2;  //ccr_btst。pcbs。イミディエイトを分離
  5652:       }
  5653:     }
  5654:   }  //irpBtstReg
  5655: 
  5656:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  5657:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  5658:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  5659:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  5660:   //BCHG.L Dq,Dr                                    |-|012346|-|--U--|--*--|D         |0000_qqq_101_000_rrr
  5661:   //MOVEP.L (d16,Ar),Dq                             |-|01234S|-|-----|-----|          |0000_qqq_101_001_rrr-{data}
  5662:   //BCHG.B Dq,<ea>                                  |-|012346|-|--U--|--*--|  M+-WXZ  |0000_qqq_101_mmm_rrr
  5663:   public static void irpBchgReg () throws M68kException {
  5664:     int ea = XEiJ.regOC & 63;
  5665:     int qqq = XEiJ.regOC >> 9;  //qqq
  5666:     if (ea >> 3 == XEiJ.MMM_AR) {  //MOVEP.L (d16,Ar),Dq
  5667:       M68kException.m6eNumber = M68kException.M6E_UNIMPLEMENTED_INSTRUCTION;
  5668:       throw M68kException.m6eSignal;
  5669:     } else {  //BCHG.L Dq,Dr/<ea>
  5670:       int x;
  5671:       int y = XEiJ.regRn[qqq];
  5672:       if (ea < XEiJ.EA_AR) {  //BCHG.L Dq,Dr
  5673:         XEiJ.mpuCycleCount++;
  5674:         XEiJ.regRn[ea] = (x = XEiJ.regRn[ea]) ^ (y = 1 << y);  //intのシフトは5bitでマスクされるので1<<(y&0x1f)の&0x1fを省略
  5675:       } else {  //BCHG.B Dq,<ea>
  5676:         XEiJ.mpuCycleCount++;
  5677:         int a = efaMltByte (ea);
  5678:         mmuWriteByteData (a, (x = mmuModifyByteSignData (a, XEiJ.regSRS)) ^ (y = 1 << (y & 7)), XEiJ.regSRS);
  5679:       }
  5680:       XEiJ.regCCR = XEiJ.regCCR & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_N | XEiJ.REG_CCR_V | XEiJ.REG_CCR_C) | (x & y) - 1 >>> 31 << 2;  //ccr_btst
  5681:     }
  5682:   }  //irpBchgReg
  5683: 
  5684:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  5685:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  5686:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  5687:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  5688:   //BCLR.L Dq,Dr                                    |-|012346|-|--U--|--*--|D         |0000_qqq_110_000_rrr
  5689:   //MOVEP.W Dq,(d16,Ar)                             |-|01234S|-|-----|-----|          |0000_qqq_110_001_rrr-{data}
  5690:   //BCLR.B Dq,<ea>                                  |-|012346|-|--U--|--*--|  M+-WXZ  |0000_qqq_110_mmm_rrr
  5691:   public static void irpBclrReg () throws M68kException {
  5692:     int ea = XEiJ.regOC & 63;
  5693:     int y = XEiJ.regRn[XEiJ.regOC >> 9];  //qqq
  5694:     if (ea >> 3 == XEiJ.MMM_AR) {  //MOVEP.W Dq,(d16,Ar)
  5695:       M68kException.m6eNumber = M68kException.M6E_UNIMPLEMENTED_INSTRUCTION;
  5696:       throw M68kException.m6eSignal;
  5697:     } else {  //BCLR.L Dq,Dr/<ea>
  5698:       int x;
  5699:       if (ea < XEiJ.EA_AR) {  //BCLR.L Dq,Dr
  5700:         XEiJ.mpuCycleCount++;
  5701:         XEiJ.regRn[ea] = (x = XEiJ.regRn[ea]) & ~(y = 1 << y);  //intのシフトは5bitでマスクされるので1<<(y&0x1f)の&0x1fを省略
  5702:       } else {  //BCLR.B Dq,<ea>
  5703:         XEiJ.mpuCycleCount++;
  5704:         int a = efaMltByte (ea);
  5705:         mmuWriteByteData (a, (x = mmuModifyByteSignData (a, XEiJ.regSRS)) & ~(y = 1 << (y & 7)), XEiJ.regSRS);
  5706:       }
  5707:       XEiJ.regCCR = XEiJ.regCCR & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_N | XEiJ.REG_CCR_V | XEiJ.REG_CCR_C) | (x & y) - 1 >>> 31 << 2;  //ccr_btst
  5708:     }
  5709:   }  //irpBclrReg
  5710: 
  5711:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  5712:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  5713:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  5714:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  5715:   //BSET.L Dq,Dr                                    |-|012346|-|--U--|--*--|D         |0000_qqq_111_000_rrr
  5716:   //MOVEP.L Dq,(d16,Ar)                             |-|01234S|-|-----|-----|          |0000_qqq_111_001_rrr-{data}
  5717:   //BSET.B Dq,<ea>                                  |-|012346|-|--U--|--*--|  M+-WXZ  |0000_qqq_111_mmm_rrr
  5718:   public static void irpBsetReg () throws M68kException {
  5719:     int ea = XEiJ.regOC & 63;
  5720:     int y = XEiJ.regRn[XEiJ.regOC >> 9];  //qqq
  5721:     if (ea >> 3 == XEiJ.MMM_AR) {  //MOVEP.L Dq,(d16,Ar)
  5722:       M68kException.m6eNumber = M68kException.M6E_UNIMPLEMENTED_INSTRUCTION;
  5723:       throw M68kException.m6eSignal;
  5724:     } else {  //BSET.L Dq,Dr/<ea>
  5725:       int x;
  5726:       if (ea < XEiJ.EA_AR) {  //BSET.L Dq,Dr
  5727:         XEiJ.mpuCycleCount++;
  5728:         XEiJ.regRn[ea] = (x = XEiJ.regRn[ea]) | (y = 1 << y);  //intのシフトは5bitでマスクされるので1<<(y&0x1f)の&0x1fを省略
  5729:       } else {  //BSET.B Dq,<ea>
  5730:         XEiJ.mpuCycleCount++;
  5731:         int a = efaMltByte (ea);
  5732:         mmuWriteByteData (a, (x = mmuModifyByteSignData (a, XEiJ.regSRS)) | (y = 1 << (y & 7)), XEiJ.regSRS);
  5733:       }
  5734:       XEiJ.regCCR = XEiJ.regCCR & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_N | XEiJ.REG_CCR_V | XEiJ.REG_CCR_C) | (x & y) - 1 >>> 31 << 2;  //ccr_btst
  5735:     }
  5736:   }  //irpBsetReg
  5737: 
  5738:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  5739:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  5740:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  5741:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  5742:   //ANDI.B #<data>,<ea>                             |-|012346|-|-UUUU|-**00|D M+-WXZ  |0000_001_000_mmm_rrr-{data}
  5743:   //AND.B #<data>,<ea>                              |A|012346|-|-UUUU|-**00|  M+-WXZ  |0000_001_000_mmm_rrr-{data}  [ANDI.B #<data>,<ea>]
  5744:   //ANDI.B #<data>,CCR                              |-|012346|-|*****|*****|          |0000_001_000_111_100-{data}
  5745:   public static void irpAndiByte () throws M68kException {
  5746:     int ea = XEiJ.regOC & 63;
  5747:     int z = mmuReadByteSignExword ((XEiJ.regPC += 2) - 1, XEiJ.regSRS);  //pcbs
  5748:     if (ea < XEiJ.EA_AR) {  //ANDI.B #<data>,Dr
  5749:       XEiJ.mpuCycleCount++;
  5750:       z = XEiJ.regRn[ea] &= ~255 | z;  //1拡張してからAND
  5751:       XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & z];  //ccr_tst_byte
  5752:     } else if (ea == XEiJ.EA_IM) {  //ANDI.B #<data>,CCR
  5753:       XEiJ.mpuCycleCount++;
  5754:       XEiJ.regCCR &= z;
  5755:     } else {  //ANDI.B #<data>,<mem>
  5756:       XEiJ.mpuCycleCount++;
  5757:       int a = efaMltByte (ea);
  5758:       mmuWriteByteData (a, z &= mmuModifyByteSignData (a, XEiJ.regSRS), XEiJ.regSRS);
  5759:       XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & z];  //ccr_tst_byte
  5760:     }
  5761:   }  //irpAndiByte
  5762: 
  5763:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  5764:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  5765:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  5766:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  5767:   //ANDI.W #<data>,<ea>                             |-|012346|-|-UUUU|-**00|D M+-WXZ  |0000_001_001_mmm_rrr-{data}
  5768:   //AND.W #<data>,<ea>                              |A|012346|-|-UUUU|-**00|  M+-WXZ  |0000_001_001_mmm_rrr-{data}  [ANDI.W #<data>,<ea>]
  5769:   //ANDI.W #<data>,SR                               |-|012346|P|*****|*****|          |0000_001_001_111_100-{data}
  5770:   public static void irpAndiWord () throws M68kException {
  5771:     int ea = XEiJ.regOC & 63;
  5772:     if (ea < XEiJ.EA_AR) {  //ANDI.W #<data>,Dr
  5773:       int z = mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);  //pcws
  5774:       XEiJ.mpuCycleCount++;
  5775:       z = XEiJ.regRn[ea] &= ~65535 | z;  //1拡張してからAND
  5776:       XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (char) z - 1 >> 31 & XEiJ.REG_CCR_Z | ((short) z < 0 ? XEiJ.REG_CCR_N : 0);  //ccr_tst_word
  5777:     } else if (ea == XEiJ.EA_IM) {  //ANDI.W #<data>,SR
  5778:       if (XEiJ.regSRS == 0) {  //ユーザモードのとき
  5779:         M68kException.m6eNumber = M68kException.M6E_PRIVILEGE_VIOLATION;
  5780:         throw M68kException.m6eSignal;
  5781:       }
  5782:       //以下はスーパーバイザモード
  5783:       XEiJ.mpuCycleCount += 12;
  5784:       irpSetSR ((XEiJ.regSRT1 | XEiJ.regSRS | XEiJ.regSRM | XEiJ.regSRI | XEiJ.regCCR) & mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, 1));  //pcws。特権違反チェックが先
  5785:     } else {  //ANDI.W #<data>,<mem>
  5786:       int z = mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);  //pcws
  5787:       XEiJ.mpuCycleCount++;
  5788:       int a = efaMltWord (ea);
  5789:       mmuWriteWordData (a, z &= mmuModifyWordSignData (a, XEiJ.regSRS), XEiJ.regSRS);
  5790:       XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (char) z - 1 >> 31 & XEiJ.REG_CCR_Z | ((short) z < 0 ? XEiJ.REG_CCR_N : 0);  //ccr_tst_word
  5791:     }
  5792:   }  //irpAndiWord
  5793: 
  5794:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  5795:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  5796:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  5797:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  5798:   //ANDI.L #<data>,<ea>                             |-|012346|-|-UUUU|-**00|D M+-WXZ  |0000_001_010_mmm_rrr-{data}
  5799:   //AND.L #<data>,<ea>                              |A|012346|-|-UUUU|-**00|  M+-WXZ  |0000_001_010_mmm_rrr-{data}  [ANDI.L #<data>,<ea>]
  5800:   public static void irpAndiLong () throws M68kException {
  5801:     int ea = XEiJ.regOC & 63;
  5802:     int y = mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS);  //pcls
  5803:     int z;
  5804:     if (ea < XEiJ.EA_AR) {  //ANDI.L #<data>,Dr
  5805:       XEiJ.mpuCycleCount++;
  5806:       z = XEiJ.regRn[ea] &= y;
  5807:     } else {  //ANDI.L #<data>,<mem>
  5808:       XEiJ.mpuCycleCount++;
  5809:       int a = efaMltLong (ea);
  5810:       mmuWriteLongData (a, z = mmuModifyLongData (a, XEiJ.regSRS) & y, XEiJ.regSRS);
  5811:     }
  5812:     XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X);  //ccr_tst
  5813:   }  //irpAndiLong
  5814: 
  5815:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  5816:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  5817:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  5818:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  5819:   //BYTEREV.L Dr                                    |-|------|-|-----|-----|D         |0000_001_011_000_rrr (ISA_C)
  5820:   //CMP2.W <ea>,Rn                                  |-|--234S|-|-UUUU|-U*U*|  M  WXZP |0000_001_011_mmm_rrr-rnnn000000000000
  5821:   //CHK2.W <ea>,Rn                                  |-|--234S|-|-UUUU|-U*U*|  M  WXZP |0000_001_011_mmm_rrr-rnnn100000000000
  5822:   //
  5823:   //BYTEREV.L Dr
  5824:   //  Drのバイトの並びを逆順にする。CCRは変化しない
  5825:   //
  5826:   //CHK2.W <ea>,Rn
  5827:   //  <ea>から下限と上限をリードしてRnが範囲内か調べる
  5828:   //  CHK2.W <ea>,Anは下限と上限をそれぞれロングに符号拡張してロングで比較する
  5829:   //  Rnが下限または上限と等しいときZをセットする
  5830:   //  Rnが範囲外のときCをセットする。このときCHK instruction例外が発生する
  5831:   //  060ISPのソースは注釈に誤りが多いので注釈ではなくコードを参考にする
  5832:   //  CCR
  5833:   //    X  変化しない
  5834:   //    N  変化しない(M68000PRMでは未定義)
  5835:   //    Z  Rn-LB==0||Rn-LB==UB-LB
  5836:   //    V  変化しない(M68000PRMでは未定義)
  5837:   //    C  Rn-LB>UB-LB(符号なし比較)
  5838:   //
  5839:   //CMP2.W <ea>,Rn
  5840:   //  <ea>から下限と上限をリードしてRnが範囲内か調べる
  5841:   //  CMP2.W <ea>,Anは下限と上限をそれぞれロングに符号拡張してロングで比較する
  5842:   //  Rnが下限または上限と等しいときZをセットする
  5843:   //  Rnが範囲外のときCをセットする
  5844:   //  060ISPのソースは注釈に誤りが多いので注釈ではなくコードを参考にする
  5845:   //  CCR
  5846:   //    X  変化しない
  5847:   //    N  変化しない(M68000PRMでは未定義)
  5848:   //    Z  Rn-LB==0||Rn-LB==UB-LB
  5849:   //    V  変化しない(M68000PRMでは未定義)
  5850:   //    C  Rn-LB>UB-LB(符号なし比較)
  5851:   public static void irpCmp2Chk2Word () throws M68kException {
  5852:     int ea = XEiJ.regOC & 63;
  5853:     if (ea < XEiJ.EA_AR) {  //BYTEREV.L Dr
  5854:       XEiJ.mpuCycleCount++;
  5855:       XEiJ.regRn[ea] = Integer.reverseBytes (XEiJ.regRn[ea]);
  5856:     } else {  //CMP2/CHK2.W <ea>,Rn
  5857:       M68kException.m6eNumber = M68kException.M6E_UNIMPLEMENTED_INSTRUCTION;
  5858:       throw M68kException.m6eSignal;
  5859:     }
  5860:   }  //irpCmp2Chk2Word
  5861: 
  5862:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  5863:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  5864:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  5865:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  5866:   //SUBI.B #<data>,<ea>                             |-|012346|-|UUUUU|*****|D M+-WXZ  |0000_010_000_mmm_rrr-{data}
  5867:   //SUB.B #<data>,<ea>                              |A|012346|-|UUUUU|*****|  M+-WXZ  |0000_010_000_mmm_rrr-{data}  [SUBI.B #<data>,<ea>]
  5868:   public static void irpSubiByte () throws M68kException {
  5869:     int ea = XEiJ.regOC & 63;
  5870:     int x;
  5871:     int y = mmuReadByteSignExword ((XEiJ.regPC += 2) - 1, XEiJ.regSRS);  //pcbs
  5872:     int z;
  5873:     if (ea < XEiJ.EA_AR) {  //SUBI.B #<data>,Dr
  5874:       XEiJ.mpuCycleCount++;
  5875:       z = (byte) (XEiJ.regRn[ea] = ~0xff & (x = XEiJ.regRn[ea]) | 0xff & (x = (byte) x) - y);
  5876:     } else {  //SUBI.B #<data>,<mem>
  5877:       XEiJ.mpuCycleCount++;
  5878:       int a = efaMltByte (ea);
  5879:       mmuWriteByteData (a, z = (byte) ((x = mmuModifyByteSignData (a, XEiJ.regSRS)) - y), XEiJ.regSRS);
  5880:     }
  5881:     XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) |
  5882:            ((x ^ y) & (x ^ z)) >>> 31 << 1 |
  5883:            (x & (y ^ z) ^ (y | z)) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C));  //ccr_sub
  5884:   }  //irpSubiByte
  5885: 
  5886:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  5887:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  5888:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  5889:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  5890:   //SUBI.W #<data>,<ea>                             |-|012346|-|UUUUU|*****|D M+-WXZ  |0000_010_001_mmm_rrr-{data}
  5891:   //SUB.W #<data>,<ea>                              |A|012346|-|UUUUU|*****|  M+-WXZ  |0000_010_001_mmm_rrr-{data}  [SUBI.W #<data>,<ea>]
  5892:   public static void irpSubiWord () throws M68kException {
  5893:     int ea = XEiJ.regOC & 63;
  5894:     int x;
  5895:     int y = mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);  //pcws
  5896:     int z;
  5897:     if (ea < XEiJ.EA_AR) {  //SUBI.W #<data>,Dr
  5898:       XEiJ.mpuCycleCount++;
  5899:       z = (short) (XEiJ.regRn[ea] = ~0xffff & (x = XEiJ.regRn[ea]) | (char) ((x = (short) x) - y));
  5900:     } else {  //SUBI.W #<data>,<mem>
  5901:       XEiJ.mpuCycleCount++;
  5902:       int a = efaMltWord (ea);
  5903:       mmuWriteWordData (a, z = (short) ((x = mmuModifyWordSignData (a, XEiJ.regSRS)) - y), XEiJ.regSRS);
  5904:     }
  5905:     XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) |
  5906:            ((x ^ y) & (x ^ z)) >>> 31 << 1 |
  5907:            (x & (y ^ z) ^ (y | z)) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C));  //ccr_sub
  5908:   }  //irpSubiWord
  5909: 
  5910:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  5911:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  5912:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  5913:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  5914:   //SUBI.L #<data>,<ea>                             |-|012346|-|UUUUU|*****|D M+-WXZ  |0000_010_010_mmm_rrr-{data}
  5915:   //SUB.L #<data>,<ea>                              |A|012346|-|UUUUU|*****|  M+-WXZ  |0000_010_010_mmm_rrr-{data}  [SUBI.L #<data>,<ea>]
  5916:   public static void irpSubiLong () throws M68kException {
  5917:     int ea = XEiJ.regOC & 63;
  5918:     int x;
  5919:     int y = mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS);  //pcls
  5920:     int z;
  5921:     if (ea < XEiJ.EA_AR) {  //SUBI.L #<data>,Dr
  5922:       XEiJ.mpuCycleCount++;
  5923:       XEiJ.regRn[ea] = z = (x = XEiJ.regRn[ea]) - y;
  5924:     } else {  //SUBI.L #<data>,<mem>
  5925:       XEiJ.mpuCycleCount++;
  5926:       int a = efaMltLong (ea);
  5927:       mmuWriteLongData (a, z = (x = mmuModifyLongData (a, XEiJ.regSRS)) - y, XEiJ.regSRS);
  5928:     }
  5929:     XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) |
  5930:            ((x ^ y) & (x ^ z)) >>> 31 << 1 |
  5931:            (x & (y ^ z) ^ (y | z)) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C));  //ccr_sub
  5932:   }  //irpSubiLong
  5933: 
  5934:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  5935:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  5936:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  5937:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  5938:   //FF1.L Dr                                        |-|------|-|-UUUU|-**00|D         |0000_010_011_000_rrr (ISA_C)
  5939:   //CMP2.L <ea>,Rn                                  |-|--234S|-|-UUUU|-U*U*|  M  WXZP |0000_010_011_mmm_rrr-rnnn000000000000
  5940:   //CHK2.L <ea>,Rn                                  |-|--234S|-|-UUUU|-U*U*|  M  WXZP |0000_010_011_mmm_rrr-rnnn100000000000
  5941:   //
  5942:   //CHK2.L <ea>,Rn
  5943:   //  <ea>から下限と上限をリードしてRnが範囲内か調べる
  5944:   //  Rnが下限または上限と等しいときZをセットする
  5945:   //  Rnが範囲外のときCをセットする。このときCHK instruction例外が発生する
  5946:   //  060ISPのソースは注釈に誤りが多いので注釈ではなくコードを参考にする
  5947:   //  CCR
  5948:   //    X  変化しない
  5949:   //    N  変化しない(M68000PRMでは未定義)
  5950:   //    Z  Rn-LB==0||Rn-LB==UB-LB
  5951:   //    V  変化しない(M68000PRMでは未定義)
  5952:   //    C  Rn-LB>UB-LB(符号なし比較)
  5953:   //
  5954:   //CMP2.L <ea>,Rn
  5955:   //  <ea>から下限と上限をリードしてRnが範囲内か調べる
  5956:   //  Rnが下限または上限と等しいときZをセットする
  5957:   //  Rnが範囲外のときCをセットする
  5958:   //  060ISPのソースは注釈に誤りが多いので注釈ではなくコードを参考にする
  5959:   //  CCR
  5960:   //    X  変化しない
  5961:   //    N  変化しない(M68000PRMでは未定義)
  5962:   //    Z  Rn-LB==0||Rn-LB==UB-LB
  5963:   //    V  変化しない(M68000PRMでは未定義)
  5964:   //    C  Rn-LB>UB-LB(符号なし比較)
  5965:   //
  5966:   //FF1.L Dr
  5967:   //  Drの最上位の1のbit31からのオフセットをDrに格納する
  5968:   //  Drが0のときは32になる
  5969:   public static void irpCmp2Chk2Long () throws M68kException {
  5970:     int ea = XEiJ.regOC & 63;
  5971:     if (ea < XEiJ.EA_AR) {  //FF1.L Dr
  5972:       XEiJ.mpuCycleCount++;
  5973:       int z = XEiJ.regRn[ea];
  5974:       XEiJ.regRn[ea] = Integer.numberOfLeadingZeros (z);
  5975:       XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X);  //ccr_tst
  5976:     } else {  //CMP2/CHK2.L <ea>,Rn
  5977:       M68kException.m6eNumber = M68kException.M6E_UNIMPLEMENTED_INSTRUCTION;
  5978:       throw M68kException.m6eSignal;
  5979:     }
  5980:   }  //irpCmp2Chk2Long
  5981: 
  5982:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  5983:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  5984:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  5985:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  5986:   //ADDI.B #<data>,<ea>                             |-|012346|-|UUUUU|*****|D M+-WXZ  |0000_011_000_mmm_rrr-{data}
  5987:   public static void irpAddiByte () throws M68kException {
  5988:     int ea = XEiJ.regOC & 63;
  5989:     int x;
  5990:     int y = mmuReadByteSignExword ((XEiJ.regPC += 2) - 1, XEiJ.regSRS);  //pcbs
  5991:     int z;
  5992:     if (ea < XEiJ.EA_AR) {  //ADDI.B #<data>,Dr
  5993:       XEiJ.mpuCycleCount++;
  5994:       z = (byte) (XEiJ.regRn[ea] = ~0xff & (x = XEiJ.regRn[ea]) | 0xff & (x = (byte) x) + y);
  5995:     } else {  //ADDI.B #<data>,<mem>
  5996:       XEiJ.mpuCycleCount++;
  5997:       int a = efaMltByte (ea);
  5998:       mmuWriteByteData (a, z = (byte) ((x = mmuModifyByteSignData (a, XEiJ.regSRS)) + y), XEiJ.regSRS);
  5999:     }
  6000:     XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) |
  6001:            ((x ^ z) & (y ^ z)) >>> 31 << 1 |
  6002:            ((x | y) ^ (x ^ y) & z) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C));  //ccr_add
  6003:   }  //irpAddiByte
  6004: 
  6005:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  6006:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  6007:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  6008:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  6009:   //ADDI.W #<data>,<ea>                             |-|012346|-|UUUUU|*****|D M+-WXZ  |0000_011_001_mmm_rrr-{data}
  6010:   public static void irpAddiWord () throws M68kException {
  6011:     int ea = XEiJ.regOC & 63;
  6012:     int x;
  6013:     int y = mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);  //pcws
  6014:     int z;
  6015:     if (ea < XEiJ.EA_AR) {  //ADDI.W #<data>,Dr
  6016:       XEiJ.mpuCycleCount++;
  6017:       z = (short) (XEiJ.regRn[ea] = ~0xffff & (x = XEiJ.regRn[ea]) | (char) ((x = (short) x) + y));
  6018:     } else {  //ADDI.W #<data>,<mem>
  6019:       XEiJ.mpuCycleCount++;
  6020:       int a = efaMltWord (ea);
  6021:       mmuWriteWordData (a, z = (short) ((x = mmuModifyWordSignData (a, XEiJ.regSRS)) + y), XEiJ.regSRS);
  6022:     }
  6023:     XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) |
  6024:            ((x ^ z) & (y ^ z)) >>> 31 << 1 |
  6025:            ((x | y) ^ (x ^ y) & z) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C));  //ccr_add
  6026:   }  //irpAddiWord
  6027: 
  6028:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  6029:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  6030:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  6031:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  6032:   //ADDI.L #<data>,<ea>                             |-|012346|-|UUUUU|*****|D M+-WXZ  |0000_011_010_mmm_rrr-{data}
  6033:   public static void irpAddiLong () throws M68kException {
  6034:     int ea = XEiJ.regOC & 63;
  6035:     int x;
  6036:     int y = mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS);  //pcls
  6037:     int z;
  6038:     if (ea < XEiJ.EA_AR) {  //ADDI.L #<data>,Dr
  6039:       XEiJ.mpuCycleCount++;
  6040:       XEiJ.regRn[ea] = z = (x = XEiJ.regRn[ea]) + y;
  6041:     } else {  //ADDI.L #<data>,<mem>
  6042:       XEiJ.mpuCycleCount++;
  6043:       int a = efaMltLong (ea);
  6044:       mmuWriteLongData (a, z = (x = mmuModifyLongData (a, XEiJ.regSRS)) + y, XEiJ.regSRS);
  6045:     }
  6046:     XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) |
  6047:            ((x ^ z) & (y ^ z)) >>> 31 << 1 |
  6048:            ((x | y) ^ (x ^ y) & z) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C));  //ccr_add
  6049:   }  //irpAddiLong
  6050: 
  6051:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  6052:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  6053:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  6054:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  6055:   //BTST.L #<data>,Dr                               |-|012346|-|--U--|--*--|D         |0000_100_000_000_rrr-{data}
  6056:   //BTST.B #<data>,<ea>                             |-|012346|-|--U--|--*--|  M+-WXZP |0000_100_000_mmm_rrr-{data}
  6057:   public static void irpBtstImm () throws M68kException {
  6058:     int ea = XEiJ.regOC & 63;
  6059:     int y = mmuReadByteSignExword ((XEiJ.regPC += 2) - 1, XEiJ.regSRS);  //pcbs
  6060:     if (ea < XEiJ.EA_AR) {  //BTST.L #<data>,Dr
  6061:       XEiJ.mpuCycleCount++;
  6062:       XEiJ.regCCR = XEiJ.regCCR & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_N | XEiJ.REG_CCR_V | XEiJ.REG_CCR_C) | (~XEiJ.regRn[ea] >>> y & 1) << 2;  //ccr_btst。intのシフトは5bitでマスクされるので&31を省略
  6063:     } else {  //BTST.B #<data>,<ea>
  6064:       XEiJ.mpuCycleCount++;
  6065:       XEiJ.regCCR = XEiJ.regCCR & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_N | XEiJ.REG_CCR_V | XEiJ.REG_CCR_C) | (~mmuReadByteSignData (efaMemByte (ea), XEiJ.regSRS) >>> (y & 7) & 1) << 2;  //ccr_btst
  6066:     }
  6067:   }  //irpBtstImm
  6068: 
  6069:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  6070:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  6071:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  6072:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  6073:   //BCHG.L #<data>,Dr                               |-|012346|-|--U--|--*--|D         |0000_100_001_000_rrr-{data}
  6074:   //BCHG.B #<data>,<ea>                             |-|012346|-|--U--|--*--|  M+-WXZ  |0000_100_001_mmm_rrr-{data}
  6075:   public static void irpBchgImm () throws M68kException {
  6076:     int ea = XEiJ.regOC & 63;
  6077:     int x;
  6078:     int y = mmuReadByteSignExword ((XEiJ.regPC += 2) - 1, XEiJ.regSRS);  //pcbs
  6079:     if (ea < XEiJ.EA_AR) {  //BCHG.L #<data>,Dr
  6080:       XEiJ.mpuCycleCount++;
  6081:       XEiJ.regRn[ea] = (x = XEiJ.regRn[ea]) ^ (y = 1 << y);  //intのシフトは5bitでマスクされるので1<<(y&0x1f)の&0x1fを省略
  6082:     } else {  //BCHG.B #<data>,<ea>
  6083:       XEiJ.mpuCycleCount++;
  6084:       int a = efaMltByte (ea);
  6085:       mmuWriteByteData (a, (x = mmuModifyByteSignData (a, XEiJ.regSRS)) ^ (y = 1 << (y & 7)), XEiJ.regSRS);
  6086:     }
  6087:     XEiJ.regCCR = XEiJ.regCCR & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_N | XEiJ.REG_CCR_V | XEiJ.REG_CCR_C) | (x & y) - 1 >>> 31 << 2;  //ccr_btst
  6088:   }  //irpBchgImm
  6089: 
  6090:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  6091:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  6092:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  6093:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  6094:   //BCLR.L #<data>,Dr                               |-|012346|-|--U--|--*--|D         |0000_100_010_000_rrr-{data}
  6095:   //BCLR.B #<data>,<ea>                             |-|012346|-|--U--|--*--|  M+-WXZ  |0000_100_010_mmm_rrr-{data}
  6096:   public static void irpBclrImm () throws M68kException {
  6097:     int ea = XEiJ.regOC & 63;
  6098:     int x;
  6099:     int y = mmuReadByteSignExword ((XEiJ.regPC += 2) - 1, XEiJ.regSRS);  //pcbs
  6100:     if (ea < XEiJ.EA_AR) {  //BCLR.L #<data>,Dr
  6101:       XEiJ.mpuCycleCount++;
  6102:       XEiJ.regRn[ea] = (x = XEiJ.regRn[ea]) & ~(y = 1 << y);  //intのシフトは5bitでマスクされるので1<<(y&0x1f)の&0x1fを省略
  6103:     } else {  //BCLR.B #<data>,<ea>
  6104:       XEiJ.mpuCycleCount++;
  6105:       int a = efaMltByte (ea);
  6106:       mmuWriteByteData (a, (x = mmuModifyByteSignData (a, XEiJ.regSRS)) & ~(y = 1 << (y & 7)), XEiJ.regSRS);
  6107:     }
  6108:     XEiJ.regCCR = XEiJ.regCCR & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_N | XEiJ.REG_CCR_V | XEiJ.REG_CCR_C) | (x & y) - 1 >>> 31 << 2;  //ccr_btst
  6109:   }  //irpBclrImm
  6110: 
  6111:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  6112:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  6113:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  6114:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  6115:   //BSET.L #<data>,Dr                               |-|012346|-|--U--|--*--|D         |0000_100_011_000_rrr-{data}
  6116:   //BSET.B #<data>,<ea>                             |-|012346|-|--U--|--*--|  M+-WXZ  |0000_100_011_mmm_rrr-{data}
  6117:   public static void irpBsetImm () throws M68kException {
  6118:     int ea = XEiJ.regOC & 63;
  6119:     int x;
  6120:     int y = mmuReadByteSignExword ((XEiJ.regPC += 2) - 1, XEiJ.regSRS);  //pcbs
  6121:     if (ea < XEiJ.EA_AR) {  //BSET.L #<data>,Dr
  6122:       XEiJ.mpuCycleCount++;
  6123:       XEiJ.regRn[ea] = (x = XEiJ.regRn[ea]) | (y = 1 << y);  //intのシフトは5bitでマスクされるので1<<(y&0x1f)の&0x1fを省略
  6124:     } else {  //BSET.B #<data>,<ea>
  6125:       XEiJ.mpuCycleCount++;
  6126:       int a = efaMltByte (ea);
  6127:       mmuWriteByteData (a, (x = mmuModifyByteSignData (a, XEiJ.regSRS)) | (y = 1 << (y & 7)), XEiJ.regSRS);
  6128:     }
  6129:     XEiJ.regCCR = XEiJ.regCCR & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_N | XEiJ.REG_CCR_V | XEiJ.REG_CCR_C) | (x & y) - 1 >>> 31 << 2;  //ccr_btst
  6130:   }  //irpBsetImm
  6131: 
  6132:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  6133:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  6134:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  6135:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  6136:   //EORI.B #<data>,<ea>                             |-|012346|-|-UUUU|-**00|D M+-WXZ  |0000_101_000_mmm_rrr-{data}
  6137:   //EOR.B #<data>,<ea>                              |A|012346|-|-UUUU|-**00|D M+-WXZ  |0000_101_000_mmm_rrr-{data}  [EORI.B #<data>,<ea>]
  6138:   //EORI.B #<data>,CCR                              |-|012346|-|*****|*****|          |0000_101_000_111_100-{data}
  6139:   public static void irpEoriByte () throws M68kException {
  6140:     int ea = XEiJ.regOC & 63;
  6141:     int z = mmuReadByteSignExword ((XEiJ.regPC += 2) - 1, XEiJ.regSRS);  //pcbs
  6142:     if (ea < XEiJ.EA_AR) {  //EORI.B #<data>,Dr
  6143:       XEiJ.mpuCycleCount++;
  6144:       z = XEiJ.regRn[ea] ^= 255 & z;  //0拡張してからEOR
  6145:       XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & z];  //ccr_tst_byte
  6146:     } else if (ea == XEiJ.EA_IM) {  //EORI.B #<data>,CCR
  6147:       XEiJ.mpuCycleCount++;
  6148:       XEiJ.regCCR ^= XEiJ.REG_CCR_MASK & z;
  6149:     } else {  //EORI.B #<data>,<mem>
  6150:       XEiJ.mpuCycleCount++;
  6151:       int a = efaMltByte (ea);
  6152:       mmuWriteByteData (a, z ^= mmuModifyByteSignData (a, XEiJ.regSRS), XEiJ.regSRS);
  6153:       XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & z];  //ccr_tst_byte
  6154:     }
  6155:   }  //irpEoriByte
  6156: 
  6157:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  6158:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  6159:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  6160:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  6161:   //EORI.W #<data>,<ea>                             |-|012346|-|-UUUU|-**00|D M+-WXZ  |0000_101_001_mmm_rrr-{data}
  6162:   //EOR.W #<data>,<ea>                              |A|012346|-|-UUUU|-**00|D M+-WXZ  |0000_101_001_mmm_rrr-{data}  [EORI.W #<data>,<ea>]
  6163:   //EORI.W #<data>,SR                               |-|012346|P|*****|*****|          |0000_101_001_111_100-{data}
  6164:   public static void irpEoriWord () throws M68kException {
  6165:     int ea = XEiJ.regOC & 63;
  6166:     if (ea < XEiJ.EA_AR) {  //EORI.W #<data>,Dr
  6167:       int z = mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);  //pcws
  6168:       XEiJ.mpuCycleCount++;
  6169:       z = XEiJ.regRn[ea] ^= (char) z;  //0拡張してからEOR
  6170:       XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (char) z - 1 >> 31 & XEiJ.REG_CCR_Z | ((short) z < 0 ? XEiJ.REG_CCR_N : 0);  //ccr_tst_word
  6171:     } else if (ea == XEiJ.EA_IM) {  //EORI.W #<data>,SR
  6172:       if (XEiJ.regSRS == 0) {  //ユーザモードのとき
  6173:         M68kException.m6eNumber = M68kException.M6E_PRIVILEGE_VIOLATION;
  6174:         throw M68kException.m6eSignal;
  6175:       }
  6176:       //以下はスーパーバイザモード
  6177:       XEiJ.mpuCycleCount += 12;
  6178:       irpSetSR ((XEiJ.regSRT1 | XEiJ.regSRS | XEiJ.regSRM | XEiJ.regSRI | XEiJ.regCCR) ^ mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, 1));  //pcws。特権違反チェックが先
  6179:     } else {  //EORI.W #<data>,<mem>
  6180:       int z = mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);  //pcws
  6181:       XEiJ.mpuCycleCount++;
  6182:       int a = efaMltWord (ea);
  6183:       mmuWriteWordData (a, z ^= mmuModifyWordSignData (a, XEiJ.regSRS), XEiJ.regSRS);
  6184:       XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (char) z - 1 >> 31 & XEiJ.REG_CCR_Z | ((short) z < 0 ? XEiJ.REG_CCR_N : 0);  //ccr_tst_word
  6185:     }
  6186:   }  //irpEoriWord
  6187: 
  6188:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  6189:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  6190:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  6191:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  6192:   //EORI.L #<data>,<ea>                             |-|012346|-|-UUUU|-**00|D M+-WXZ  |0000_101_010_mmm_rrr-{data}
  6193:   //EOR.L #<data>,<ea>                              |A|012346|-|-UUUU|-**00|D M+-WXZ  |0000_101_010_mmm_rrr-{data}  [EORI.L #<data>,<ea>]
  6194:   public static void irpEoriLong () throws M68kException {
  6195:     int ea = XEiJ.regOC & 63;
  6196:     int y = mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS);  //pcls
  6197:     int z;
  6198:     if (ea < XEiJ.EA_AR) {  //EORI.L #<data>,Dr
  6199:       XEiJ.mpuCycleCount++;
  6200:       z = XEiJ.regRn[ea] ^= y;
  6201:     } else {  //EORI.L #<data>,<mem>
  6202:       XEiJ.mpuCycleCount++;
  6203:       int a = efaMltLong (ea);
  6204:       mmuWriteLongData (a, z = mmuModifyLongData (a, XEiJ.regSRS) ^ y, XEiJ.regSRS);
  6205:     }
  6206:     XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X);  //ccr_tst
  6207:   }  //irpEoriLong
  6208: 
  6209:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  6210:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  6211:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  6212:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  6213:   //CAS.B Dc,Du,<ea>                                |-|--2346|-|-UUUU|-****|  M+-WXZ  |0000_101_011_mmm_rrr-0000000uuu000ccc
  6214:   public static void irpCasByte () throws M68kException {
  6215:     int w = mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);  //pcwz。拡張ワード
  6216:     if ((w & ~0b0000_000_111_000_111) != 0) {
  6217:       M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION;
  6218:       throw M68kException.m6eSignal;
  6219:     }
  6220:     int c = w & 7;
  6221:     int y = (byte) XEiJ.regRn[c];  //y=Dc
  6222:     int a = efaMltByte (XEiJ.regOC & 63);
  6223:     int x = mmuReadByteSignData (a, XEiJ.regSRS);  //x=<ea>
  6224:     int z = (byte) (x - y);  //z=<ea>-Dc
  6225:     XEiJ.regCCR = (XEiJ.regCCR & XEiJ.REG_CCR_X |
  6226:                    (z < 0 ? XEiJ.REG_CCR_N : 0) |
  6227:                    (z == 0 ? XEiJ.REG_CCR_Z : 0) |
  6228:                    ((x ^ y) & (x ^ z)) >>> 31 << 1 |
  6229:                    (x & (y ^ z) ^ (y | z)) >>> 31);  //ccr_cmp
  6230:     if (z == 0) {  //<ea>==Dc
  6231:       XEiJ.mpuCycleCount += 19;
  6232:       mmuWriteByteData (a, XEiJ.regRn[w >> 6], XEiJ.regSRS);  //Du→<ea>
  6233:     } else {  //<ea>!=Dc
  6234:       XEiJ.mpuCycleCount += 19;
  6235:       XEiJ.regRn[c] = ~0xff & XEiJ.regRn[c] | 0xff & x;  //<ea>→Dc
  6236:     }
  6237:   }  //irpCasByte
  6238: 
  6239:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  6240:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  6241:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  6242:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  6243:   //CMPI.B #<data>,<ea>                             |-|--2346|-|-UUUU|-****|D M+-WXZP |0000_110_000_mmm_rrr-{data}
  6244:   //CMP.B #<data>,<ea>                              |A|--2346|-|-UUUU|-****|  M+-WXZP |0000_110_000_mmm_rrr-{data}  [CMPI.B #<data>,<ea>]
  6245:   public static void irpCmpiByte () throws M68kException {
  6246:     XEiJ.mpuCycleCount++;
  6247:     int ea = XEiJ.regOC & 63;
  6248:     int x;
  6249:     int y = mmuReadByteSignExword ((XEiJ.regPC += 2) - 1, XEiJ.regSRS);  //pcbs
  6250:     int z = (byte) ((x = ea < XEiJ.EA_AR ? (byte) XEiJ.regRn[ea] : mmuReadByteSignData (efaMemByte (ea), XEiJ.regSRS)) - y);  //アドレッシングモードに注意
  6251:     XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) |
  6252:            ((x ^ y) & (x ^ z)) >>> 31 << 1 |
  6253:            (x & (y ^ z) ^ (y | z)) >>> 31);  //ccr_cmp
  6254:   }  //irpCmpiByte
  6255: 
  6256:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  6257:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  6258:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  6259:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  6260:   //CMPI.W #<data>,<ea>                             |-|--2346|-|-UUUU|-****|D M+-WXZP |0000_110_001_mmm_rrr-{data}
  6261:   //CMP.W #<data>,<ea>                              |A|--2346|-|-UUUU|-****|  M+-WXZP |0000_110_001_mmm_rrr-{data}  [CMPI.W #<data>,<ea>]
  6262:   public static void irpCmpiWord () throws M68kException {
  6263:     XEiJ.mpuCycleCount++;
  6264:     int ea = XEiJ.regOC & 63;
  6265:     int x;
  6266:     int y = mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);  //pcws
  6267:     int z = (short) ((x = ea < XEiJ.EA_AR ? (short) XEiJ.regRn[ea] : mmuReadWordSignData (efaMemWord (ea), XEiJ.regSRS)) - y);  //アドレッシングモードに注意
  6268:     XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) |
  6269:            ((x ^ y) & (x ^ z)) >>> 31 << 1 |
  6270:            (x & (y ^ z) ^ (y | z)) >>> 31);  //ccr_cmp
  6271:   }  //irpCmpiWord
  6272: 
  6273:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  6274:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  6275:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  6276:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  6277:   //CMPI.L #<data>,<ea>                             |-|--2346|-|-UUUU|-****|D M+-WXZP |0000_110_010_mmm_rrr-{data}
  6278:   //CMP.L #<data>,<ea>                              |A|--2346|-|-UUUU|-****|  M+-WXZP |0000_110_010_mmm_rrr-{data}  [CMPI.L #<data>,<ea>]
  6279:   public static void irpCmpiLong () throws M68kException {
  6280:     int ea = XEiJ.regOC & 63;
  6281:     int x;
  6282:     int y = mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS);  //pcls
  6283:     int z;
  6284:     if (ea < XEiJ.EA_AR) {  //CMPI.L #<data>,Dr
  6285:       XEiJ.mpuCycleCount++;
  6286:       z = (x = XEiJ.regRn[ea]) - y;
  6287:     } else {  //CMPI.L #<data>,<mem>
  6288:       XEiJ.mpuCycleCount++;
  6289:       z = (x = mmuReadLongData (efaMemLong (ea), XEiJ.regSRS)) - y;  //アドレッシングモードに注意
  6290:     }
  6291:     XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) |
  6292:            ((x ^ y) & (x ^ z)) >>> 31 << 1 |
  6293:            (x & (y ^ z) ^ (y | z)) >>> 31);  //ccr_cmp
  6294:   }  //irpCmpiLong
  6295: 
  6296:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  6297:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  6298:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  6299:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  6300:   //CAS.W Dc,Du,<ea>                                |-|--2346|-|-UUUU|-****|  M+-WXZ  |0000_110_011_mmm_rrr-0000000uuu000ccc        (68060 software emulate misaligned <ea>)
  6301:   //CAS2.W Dc1:Dc2,Du1:Du2,(Rn1):(Rn2)              |-|--234S|-|-UUUU|-****|          |0000_110_011_111_100-rnnn000uuu000ccc(1)-rnnn_000_uuu_000_ccc(2)
  6302:   public static void irpCasWord () throws M68kException {
  6303:     int ea = XEiJ.regOC & 63;
  6304:     if (ea == XEiJ.EA_IM) {  //CAS2.W Dc1:Dc2,Du1:Du2,(Rn1):(Rn2)
  6305:       M68kException.m6eNumber = M68kException.M6E_UNIMPLEMENTED_INSTRUCTION;
  6306:       throw M68kException.m6eSignal;
  6307:     } else {  //CAS.W Dc,Du,<ea>
  6308:       int w = mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);  //pcwz
  6309:       if ((w & ~0b0000_000_111_000_111) != 0) {
  6310:         M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION;
  6311:         throw M68kException.m6eSignal;
  6312:       }
  6313:       int a = efaMltWord (ea);  //a=ea
  6314:       if ((a & 1) != 0) {  //misaligned <ea>
  6315:         M68kException.m6eNumber = M68kException.M6E_UNIMPLEMENTED_INSTRUCTION;
  6316:         throw M68kException.m6eSignal;
  6317:       }
  6318:       int c = w & 7;
  6319:       int y = (short) XEiJ.regRn[c];  //y=Dc
  6320:       int x = mmuReadWordSignData (a, XEiJ.regSRS);  //x=<ea>
  6321:       int z = (short) (x - y);  //z=<ea>-Dc
  6322:       XEiJ.regCCR = (XEiJ.regCCR & XEiJ.REG_CCR_X |
  6323:                      (z < 0 ? XEiJ.REG_CCR_N : 0) |
  6324:                      (z == 0 ? XEiJ.REG_CCR_Z : 0) |
  6325:                      ((x ^ y) & (x ^ z)) >>> 31 << 1 |
  6326:                      (x & (y ^ z) ^ (y | z)) >>> 31);  //ccr_cmp
  6327:       if (z == 0) {  //<ea>==Dc
  6328:         XEiJ.mpuCycleCount += 19;
  6329:         mmuWriteWordData (a, XEiJ.regRn[w >> 6], XEiJ.regSRS);  //Du→<ea>
  6330:       } else {  //<ea>!=Dc
  6331:         XEiJ.mpuCycleCount += 19;
  6332:         XEiJ.regRn[c] = ~0xffff & XEiJ.regRn[c] | (char) x;  //<ea>→Dc
  6333:       }
  6334:     }
  6335:   }  //irpCasWord
  6336: 
  6337:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  6338:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  6339:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  6340:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  6341:   //MOVES.B <ea>,Rn                                 |-|-12346|P|-----|-----|  M+-WXZ  |0000_111_000_mmm_rrr-rnnn000000000000
  6342:   //MOVES.B Rn,<ea>                                 |-|-12346|P|-----|-----|  M+-WXZ  |0000_111_000_mmm_rrr-rnnn100000000000
  6343:   //
  6344:   //MOVES.B <ea>,Rn
  6345:   //  MOVES.B <ea>,DnはDnの最下位バイトだけ更新する
  6346:   //  MOVES.B <ea>,Anはバイトデータをロングに符号拡張してAnの全体を更新する
  6347:   //  SFC=1,2,5,6はアドレス変換あり、SFC=0,3,4はアドレス変換なし、
  6348:   //  SFC=7はCPU空間なのでコプロセッサが割り当てられている領域以外はバスエラーになる
  6349:   //
  6350:   //MOVES.B Rn,<ea>
  6351:   //  DFC=1,2,5,6はアドレス変換あり、DFC=0,3,4はアドレス変換なし、
  6352:   //  DFC=7はCPU空間なのでコプロセッサが割り当てられている領域以外はバスエラーになる
  6353:   public static void irpMovesByte () throws M68kException {
  6354:     int w = mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);  //pcwz
  6355:     if (w << -11 != 0) {
  6356:       M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION;
  6357:       throw M68kException.m6eSignal;
  6358:     }
  6359:     if (XEiJ.regSRS == 0) {  //ユーザモードのとき
  6360:       M68kException.m6eNumber = M68kException.M6E_PRIVILEGE_VIOLATION;
  6361:       throw M68kException.m6eSignal;
  6362:     }
  6363:     //以下はスーパーバイザモード
  6364:     XEiJ.mpuCycleCount++;
  6365:     int a = efaMltByte (XEiJ.regOC & 63);
  6366:     int n = w >>> 12;  //n
  6367:     if (w << 31 - 11 >= 0) {  //MOVES.B <ea>,Rn。リード
  6368:       boolean supervisor = (0b10011111 << 24 << XEiJ.mpuSFC) < 0;
  6369:       boolean instruction = (0b00101010 << 24 << XEiJ.mpuSFC) < 0;
  6370:       MemoryMappedDevice[] mm = (DataBreakPoint.DBP_ON ?
  6371:                                  supervisor ? DataBreakPoint.dbpSuperMap : DataBreakPoint.dbpUserMap :
  6372:                                  supervisor ? XEiJ.busSuperMap : XEiJ.busUserMap);
  6373:       int z;
  6374:       //    01234567
  6375:       if (0b01100110 << 24 << XEiJ.mpuSFC < 0) {  //SFC=1,2,5,6。アドレス変換あり
  6376:         m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_READ | M60_FSLW_SIZE_BYTE | XEiJ.mpuSFC << 16;
  6377:         int pa = (supervisor ?
  6378:                   instruction ? mmuTranslateReadSuperCode (a) : mmuTranslateReadSuperData (a) :
  6379:                   instruction ? mmuTranslateReadUserCode (a) : mmuTranslateReadUserData (a));
  6380:         //z = XEiJ.busRbz (pa);
  6381:         z = mm[pa >>> XEiJ.BUS_PAGE_BITS].mmdRbz (pa);
  6382:       } else if (XEiJ.mpuSFC != 7) {  //SFC=0,3,4。アドレス変換なし
  6383:         m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_READ | M60_FSLW_SIZE_BYTE | XEiJ.mpuSFC << 16;
  6384:         //z = XEiJ.busRbz (a);
  6385:         z = mm[a >>> XEiJ.BUS_PAGE_BITS].mmdRbz (a);
  6386:       } else {  //SFC=7。CPU空間
  6387:         if (0x00022000 <= a && a <= 0x0002201f) {  //コプロセッサID=1
  6388:           z = XEiJ.fpuMotherboardCoprocessor.cirReadByteZero (a);
  6389:         } else {
  6390:           m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_READ | M60_FSLW_SIZE_BYTE | XEiJ.mpuSFC << 16 | M60_FSLW_BUS_ERROR_ON_READ;
  6391:           M68kException.m6eNumber = M68kException.M6E_ACCESS_FAULT;
  6392:           M68kException.m6eAddress = a;
  6393:           M68kException.m6eDirection = XEiJ.MPU_WR_READ;
  6394:           M68kException.m6eSize = XEiJ.MPU_SS_BYTE;
  6395:           throw M68kException.m6eSignal;
  6396:         }
  6397:       }
  6398:       if (n < 8) {  //MOVES.B <ea>,Dn
  6399:         XEiJ.regRn[n] = XEiJ.regRn[n] & ~255 | z;
  6400:       } else {  //MOVES.B <ea>,An
  6401:         XEiJ.regRn[n] = (byte) z;
  6402:       }
  6403:       if (MMU_DEBUG_COMMAND) {
  6404:         System.out.printf ("%08x movesReadByte(%d,0x%08x)=0x%02x\n", XEiJ.regPC0, XEiJ.mpuSFC, a, XEiJ.regRn[n] & 255);
  6405:       }
  6406:     } else {  //MOVES.B Rn,<ea>。ライト
  6407:       if (MMU_DEBUG_COMMAND) {
  6408:         System.out.printf ("%08x movesWriteByte(%d,0x%08x,0x%02x)\n", XEiJ.regPC0, XEiJ.mpuDFC, a, XEiJ.regRn[n] & 255);
  6409:       }
  6410:       boolean supervisor = (0b10011111 << 24 << XEiJ.mpuDFC) < 0;
  6411:       boolean instruction = (0b00101010 << 24 << XEiJ.mpuDFC) < 0;
  6412:       MemoryMappedDevice mm[] = (DataBreakPoint.DBP_ON ?
  6413:                                  supervisor ? DataBreakPoint.dbpSuperMap : DataBreakPoint.dbpUserMap :
  6414:                                  supervisor ? XEiJ.busSuperMap : XEiJ.busUserMap);
  6415:       int z = XEiJ.regRn[n];
  6416:       //    01234567
  6417:       if (0b01100110 << 24 << XEiJ.mpuDFC < 0) {  //DFC=1,2,5,6。アドレス変換あり
  6418:         m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_BYTE | XEiJ.mpuDFC << 16;
  6419:         int pa = (supervisor ?
  6420:                   instruction ? mmuTranslateWriteSuperCode (a) : mmuTranslateWriteSuperData (a) :
  6421:                   instruction ? mmuTranslateWriteUserCode (a) : mmuTranslateWriteUserData (a));
  6422:         //XEiJ.busWb (pa, z);
  6423:         mm[pa >>> XEiJ.BUS_PAGE_BITS].mmdWb (pa, z);
  6424:       } else if (XEiJ.mpuDFC != 7) {  //DFC=0,3,4。アドレス変換なし
  6425:         m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_BYTE | XEiJ.mpuDFC << 16;
  6426:         //XEiJ.busWb (a, z);
  6427:         mm[a >>> XEiJ.BUS_PAGE_BITS].mmdWb (a, z);
  6428:       } else {  //DFC=7。CPU空間
  6429:         if (0x00022000 <= a && a <= 0x0002201f) {  //コプロセッサID=1
  6430:           XEiJ.fpuMotherboardCoprocessor.cirWriteByte (a, z);
  6431:         } else {
  6432:           m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_BYTE | XEiJ.mpuDFC << 16 | M60_FSLW_BUS_ERROR_ON_WRITE;
  6433:           M68kException.m6eNumber = M68kException.M6E_ACCESS_FAULT;
  6434:           M68kException.m6eAddress = a;
  6435:           M68kException.m6eDirection = XEiJ.MPU_WR_WRITE;
  6436:           M68kException.m6eSize = XEiJ.MPU_SS_BYTE;
  6437:           throw M68kException.m6eSignal;
  6438:         }
  6439:       }
  6440:     }
  6441:   }  //irpMovesByte
  6442: 
  6443:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  6444:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  6445:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  6446:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  6447:   //MOVES.W <ea>,Rn                                 |-|-12346|P|-----|-----|  M+-WXZ  |0000_111_001_mmm_rrr-rnnn000000000000
  6448:   //MOVES.W Rn,<ea>                                 |-|-12346|P|-----|-----|  M+-WXZ  |0000_111_001_mmm_rrr-rnnn100000000000
  6449:   //
  6450:   //MOVES.W <ea>,Rn
  6451:   //  MOVES.W <ea>,DnはDnの下位ワードだけ更新する
  6452:   //  MOVES.W <ea>,Anはワードデータをロングに符号拡張してAnの全体を更新する
  6453:   //  SFC=1,2,5,6はアドレス変換あり、SFC=0,3,4はアドレス変換なし、
  6454:   //  SFC=7はCPU空間なのでコプロセッサが割り当てられている領域以外はバスエラーになる
  6455:   //
  6456:   //MOVES.W Rn,<ea>
  6457:   //  DFC=1,2,5,6はアドレス変換あり、DFC=0,3,4はアドレス変換なし、
  6458:   //  DFC=7はCPU空間なのでコプロセッサが割り当てられている領域以外はバスエラーになる
  6459:   public static void irpMovesWord () throws M68kException {
  6460:     int w = mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);  //pcwz
  6461:     if (w << -11 != 0) {
  6462:       M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION;
  6463:       throw M68kException.m6eSignal;
  6464:     }
  6465:     if (XEiJ.regSRS == 0) {  //ユーザモードのとき
  6466:       M68kException.m6eNumber = M68kException.M6E_PRIVILEGE_VIOLATION;
  6467:       throw M68kException.m6eSignal;
  6468:     }
  6469:     //以下はスーパーバイザモード
  6470:     XEiJ.mpuCycleCount++;
  6471:     int a = efaMltWord (XEiJ.regOC & 63);
  6472:     int n = w >>> 12;  //n
  6473:     if (w << 31 - 11 >= 0) {  //MOVES.W <ea>,Rn。リード
  6474:       boolean supervisor = (0b10011111 << 24 << XEiJ.mpuSFC) < 0;
  6475:       boolean instruction = (0b00101010 << 24 << XEiJ.mpuSFC) < 0;
  6476:       MemoryMappedDevice[] mm = (DataBreakPoint.DBP_ON ?
  6477:                                  supervisor ? DataBreakPoint.dbpSuperMap : DataBreakPoint.dbpUserMap :
  6478:                                  supervisor ? XEiJ.busSuperMap : XEiJ.busUserMap);
  6479:       int z;
  6480:       //    01234567
  6481:       if (0b01100110 << 24 << XEiJ.mpuSFC < 0) {  //SFC=1,2,5,6。アドレス変換あり
  6482:         if ((a & 1) == 0) {  //偶数
  6483:           m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_READ | M60_FSLW_SIZE_WORD | XEiJ.mpuSFC << 16;
  6484:           int pa = (supervisor ?
  6485:                     instruction ? mmuTranslateReadSuperCode (a) : mmuTranslateReadSuperData (a) :
  6486:                     instruction ? mmuTranslateReadUserCode (a) : mmuTranslateReadUserData (a));
  6487:           //z = XEiJ.busRwze (pa);
  6488:           z = mm[pa >>> XEiJ.BUS_PAGE_BITS].mmdRwz (pa);
  6489:         } else {  //奇数
  6490:           m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_READ | M60_FSLW_SIZE_WORD | XEiJ.mpuSFC << 16;
  6491:           int pa = (supervisor ?
  6492:                     instruction ? mmuTranslateReadSuperCode (a) : mmuTranslateReadSuperData (a) :
  6493:                     instruction ? mmuTranslateReadUserCode (a) : mmuTranslateReadUserData (a));
  6494:           //z = XEiJ.busRbz (pa) << 8;
  6495:           z = mm[pa >>> XEiJ.BUS_PAGE_BITS].mmdRbz (pa) << 8;
  6496:           m60FSLW ^= M60_FSLW_IOMA_FIRST ^ M60_FSLW_IOMA_SECOND;
  6497:           pa = (supervisor ?
  6498:                 instruction ? mmuTranslateReadSuperCode (a + 1) : mmuTranslateReadSuperData (a + 1) :
  6499:                 instruction ? mmuTranslateReadUserCode (a + 1) : mmuTranslateReadUserData (a + 1));
  6500:           //z |= XEiJ.busRbz (pa);
  6501:           z |= mm[pa >>> XEiJ.BUS_PAGE_BITS].mmdRbz (pa);
  6502:         }
  6503:       } else if (XEiJ.mpuSFC != 7) {  //SFC=0,3,4。アドレス変換なし
  6504:         if ((a & 1) == 0) {  //偶数
  6505:           m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_READ | M60_FSLW_SIZE_WORD | XEiJ.mpuSFC << 16;
  6506:           //z = XEiJ.busRwze (a);
  6507:           z = mm[a >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a);
  6508:         } else {  //奇数
  6509:           m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_READ | M60_FSLW_SIZE_WORD | XEiJ.mpuSFC << 16;
  6510:           //z = XEiJ.busRbz (a) << 8;
  6511:           z = mm[a >>> XEiJ.BUS_PAGE_BITS].mmdRbz (a) << 8;
  6512:           m60FSLW ^= M60_FSLW_IOMA_FIRST ^ M60_FSLW_IOMA_SECOND;
  6513:           a++;
  6514:           //z |= XEiJ.busRbz (a);
  6515:           z |= mm[a >>> XEiJ.BUS_PAGE_BITS].mmdRbz (a);
  6516:         }
  6517:       } else {  //SFC=7。CPU空間
  6518:         if (0x00022000 <= a && a <= 0x0002201f) {  //コプロセッサID=1
  6519:           z = XEiJ.fpuMotherboardCoprocessor.cirReadWordZero (a);
  6520:         } else {
  6521:           m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_READ | M60_FSLW_SIZE_WORD | XEiJ.mpuSFC << 16 | M60_FSLW_BUS_ERROR_ON_READ;
  6522:           M68kException.m6eNumber = M68kException.M6E_ACCESS_FAULT;
  6523:           M68kException.m6eAddress = a;
  6524:           M68kException.m6eDirection = XEiJ.MPU_WR_READ;
  6525:           M68kException.m6eSize = XEiJ.MPU_SS_WORD;
  6526:           throw M68kException.m6eSignal;
  6527:         }
  6528:       }
  6529:       if (n < 8) {  //MOVES.W <ea>,Dn
  6530:         XEiJ.regRn[n] = XEiJ.regRn[n] & ~65535 | z;
  6531:       } else {  //MOVES.W <ea>,An
  6532:         XEiJ.regRn[n] = (short) z;
  6533:       }
  6534:       if (MMU_DEBUG_COMMAND) {
  6535:         System.out.printf ("%08x movesReadWord(%d,0x%08x)=0x%04x\n", XEiJ.regPC0, XEiJ.mpuSFC, a, XEiJ.regRn[n] & 65535);
  6536:       }
  6537:     } else {  //MOVES.W Rn,<ea>。ライト
  6538:       if (MMU_DEBUG_COMMAND) {
  6539:         System.out.printf ("%08x movesWriteWord(%d,0x%08x,0x%04x)\n", XEiJ.regPC0, XEiJ.mpuDFC, a, XEiJ.regRn[n] & 65535);
  6540:       }
  6541:       boolean supervisor = (0b10011111 << 24 << XEiJ.mpuDFC) < 0;
  6542:       boolean instruction = (0b00101010 << 24 << XEiJ.mpuDFC) < 0;
  6543:       MemoryMappedDevice[] mm = (DataBreakPoint.DBP_ON ?
  6544:                                  supervisor ? DataBreakPoint.dbpSuperMap : DataBreakPoint.dbpUserMap :
  6545:                                  supervisor ? XEiJ.busSuperMap : XEiJ.busUserMap);
  6546:       int z = XEiJ.regRn[n];
  6547:       //    01234567
  6548:       if (0b01100110 << 24 << XEiJ.mpuDFC < 0) {  //DFC=1,2,5,6。アドレス変換あり
  6549:         if ((a & 1) == 0) {  //偶数
  6550:           m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_WORD | XEiJ.mpuDFC << 16;
  6551:           int pa = (supervisor ?
  6552:                     instruction ? mmuTranslateWriteSuperCode (a) : mmuTranslateWriteSuperData (a) :
  6553:                     instruction ? mmuTranslateWriteUserCode (a) : mmuTranslateWriteUserData (a));
  6554:           //XEiJ.busWwe (pa, z);
  6555:           mm[pa >>> XEiJ.BUS_PAGE_BITS].mmdWw (pa, z);
  6556:         } else {  //奇数
  6557:           m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_WORD | XEiJ.mpuDFC << 16;
  6558:           int pa = (supervisor ?
  6559:                     instruction ? mmuTranslateWriteSuperCode (a) : mmuTranslateWriteSuperData (a) :
  6560:                     instruction ? mmuTranslateWriteUserCode (a) : mmuTranslateWriteUserData (a));
  6561:           //XEiJ.busWb (pa, z >> 8);
  6562:           mm[pa >>> XEiJ.BUS_PAGE_BITS].mmdWb (pa, z >> 8);
  6563:           m60FSLW ^= M60_FSLW_IOMA_FIRST ^ M60_FSLW_IOMA_SECOND;
  6564:           pa = (supervisor ?
  6565:                 instruction ? mmuTranslateWriteSuperCode (a + 1) : mmuTranslateWriteSuperData (a + 1) :
  6566:                 instruction ? mmuTranslateWriteUserCode (a + 1) : mmuTranslateWriteUserData (a + 1));
  6567:           //XEiJ.busWb (pa, z);
  6568:           mm[pa >>> XEiJ.BUS_PAGE_BITS].mmdWb (pa, z);
  6569:         }
  6570:       } else if (XEiJ.mpuDFC != 7) {  //DFC=0,3,4。アドレス変換なし
  6571:         if ((a & 1) == 0) {  //偶数
  6572:           m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_WORD | XEiJ.mpuDFC << 16;
  6573:           //XEiJ.busWwe (a, z);
  6574:           mm[a >>> XEiJ.BUS_PAGE_BITS].mmdWw (a, z);
  6575:         } else {  //奇数
  6576:           m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_WORD | XEiJ.mpuDFC << 16;
  6577:           //XEiJ.busWb (a, z >> 8);
  6578:           mm[a >>> XEiJ.BUS_PAGE_BITS].mmdWb (a, z >> 8);
  6579:           m60FSLW ^= M60_FSLW_IOMA_FIRST ^ M60_FSLW_IOMA_SECOND;
  6580:           a++;
  6581:           //XEiJ.busWb (a, z);
  6582:           mm[a >>> XEiJ.BUS_PAGE_BITS].mmdWb (a, z);
  6583:         }
  6584:       } else {  //DFC=7。CPU空間
  6585:         if (0x00022000 <= a && a <= 0x0002201f) {  //コプロセッサID=1
  6586:           XEiJ.fpuMotherboardCoprocessor.cirWriteWord (a, z);
  6587:         } else {
  6588:           m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_WORD | XEiJ.mpuDFC << 16 | M60_FSLW_BUS_ERROR_ON_WRITE;
  6589:           M68kException.m6eNumber = M68kException.M6E_ACCESS_FAULT;
  6590:           M68kException.m6eAddress = a;
  6591:           M68kException.m6eDirection = XEiJ.MPU_WR_WRITE;
  6592:           M68kException.m6eSize = XEiJ.MPU_SS_WORD;
  6593:           throw M68kException.m6eSignal;
  6594:         }
  6595:       }
  6596:     }
  6597:   }  //irpMovesWord
  6598: 
  6599:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  6600:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  6601:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  6602:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  6603:   //MOVES.L <ea>,Rn                                 |-|-12346|P|-----|-----|  M+-WXZ  |0000_111_010_mmm_rrr-rnnn000000000000
  6604:   //MOVES.L Rn,<ea>                                 |-|-12346|P|-----|-----|  M+-WXZ  |0000_111_010_mmm_rrr-rnnn100000000000
  6605:   //
  6606:   //MOVES.L <ea>,Rn
  6607:   //  SFC=1,2,5,6はアドレス変換あり、SFC=0,3,4はアドレス変換なし、
  6608:   //  SFC=7はCPU空間なのでコプロセッサが割り当てられている領域以外はバスエラーになる
  6609:   //
  6610:   //MOVES.L Rn,<ea>
  6611:   //  DFC=1,2,5,6はアドレス変換あり、DFC=0,3,4はアドレス変換なし、
  6612:   //  DFC=7はCPU空間なのでコプロセッサが割り当てられている領域以外はバスエラーになる
  6613:   public static void irpMovesLong () throws M68kException {
  6614:     int w = mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);  //pcwz
  6615:     if (w << -11 != 0) {
  6616:       M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION;
  6617:       throw M68kException.m6eSignal;
  6618:     }
  6619:     if (XEiJ.regSRS == 0) {  //ユーザモードのとき
  6620:       M68kException.m6eNumber = M68kException.M6E_PRIVILEGE_VIOLATION;
  6621:       throw M68kException.m6eSignal;
  6622:     }
  6623:     //以下はスーパーバイザモード
  6624:     XEiJ.mpuCycleCount++;
  6625:     int a = efaMltLong (XEiJ.regOC & 63);
  6626:     int n = w >>> 12;  //n
  6627:     if (w << 31 - 11 >= 0) {  //MOVES.L <ea>,Rn。リード
  6628:       boolean supervisor = (0b10011111 << 24 << XEiJ.mpuSFC) < 0;
  6629:       boolean instruction = (0b00101010 << 24 << XEiJ.mpuSFC) < 0;
  6630:       MemoryMappedDevice[] mm = (DataBreakPoint.DBP_ON ?
  6631:                                  supervisor ? DataBreakPoint.dbpSuperMap : DataBreakPoint.dbpUserMap :
  6632:                                  supervisor ? XEiJ.busSuperMap : XEiJ.busUserMap);
  6633:       int z;
  6634:       //    01234567
  6635:       if (0b01100110 << 24 << XEiJ.mpuSFC < 0) {  //SFC=1,2,5,6。アドレス変換あり
  6636:         if ((a & 3) == 0) {  //4の倍数
  6637:           m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_READ | M60_FSLW_SIZE_LONG | XEiJ.mpuSFC << 16;
  6638:           int pa = (supervisor ?
  6639:                     instruction ? mmuTranslateReadSuperCode (a) : mmuTranslateReadSuperData (a) :
  6640:                     instruction ? mmuTranslateReadUserCode (a) : mmuTranslateReadUserData (a));
  6641:           //z = XEiJ.busRlsf (pa);
  6642:           z = mm[pa >>> XEiJ.BUS_PAGE_BITS].mmdRls (pa);
  6643:         } else if ((a & 1) == 0) {  //4の倍数+2
  6644:           m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_READ | M60_FSLW_SIZE_LONG | XEiJ.mpuSFC << 16;
  6645:           int pa = (supervisor ?
  6646:                     instruction ? mmuTranslateReadSuperCode (a) : mmuTranslateReadSuperData (a) :
  6647:                     instruction ? mmuTranslateReadUserCode (a) : mmuTranslateReadUserData (a));
  6648:           //z = XEiJ.busRwse (pa) << 16;
  6649:           z = mm[pa >>> XEiJ.BUS_PAGE_BITS].mmdRws (pa) << 16;
  6650:           m60FSLW ^= M60_FSLW_IOMA_FIRST ^ M60_FSLW_IOMA_SECOND;
  6651:           pa = (supervisor ?
  6652:                 instruction ? mmuTranslateReadSuperCode (a + 2) : mmuTranslateReadSuperData (a + 2) :
  6653:                 instruction ? mmuTranslateReadUserCode (a + 2) : mmuTranslateReadUserData (a + 2));
  6654:           //z |= XEiJ.busRwze (pa);
  6655:           z |= mm[pa >>> XEiJ.BUS_PAGE_BITS].mmdRwz (pa);
  6656:         } else {  //奇数
  6657:           m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_READ | M60_FSLW_SIZE_LONG | XEiJ.mpuSFC << 16;
  6658:           int pa = (supervisor ?
  6659:                     instruction ? mmuTranslateReadSuperCode (a) : mmuTranslateReadSuperData (a) :
  6660:                     instruction ? mmuTranslateReadUserCode (a) : mmuTranslateReadUserData (a));
  6661:           //z = XEiJ.busRbs (pa) << 24;
  6662:           z = mm[pa >>> XEiJ.BUS_PAGE_BITS].mmdRbs (pa) << 24;
  6663:           m60FSLW ^= M60_FSLW_IOMA_FIRST ^ M60_FSLW_IOMA_SECOND;
  6664:           pa = (supervisor ?
  6665:                 instruction ? mmuTranslateReadSuperCode (a + 1) : mmuTranslateReadSuperData (a + 1) :
  6666:                 instruction ? mmuTranslateReadUserCode (a + 1) : mmuTranslateReadUserData (a + 1));
  6667:           //z |= XEiJ.busRwze (pa) << 8;
  6668:           z |= mm[pa >>> XEiJ.BUS_PAGE_BITS].mmdRwz (pa) << 8;
  6669:           pa = (supervisor ?
  6670:                 instruction ? mmuTranslateReadSuperCode (a + 3) : mmuTranslateReadSuperData (a + 3) :
  6671:                 instruction ? mmuTranslateReadUserCode (a + 3) : mmuTranslateReadUserData (a + 3));
  6672:           //z |= XEiJ.busRbz (pa);
  6673:           z |= mm[pa >>> XEiJ.BUS_PAGE_BITS].mmdRbz (pa);
  6674:         }
  6675:       } else if (XEiJ.mpuSFC != 7) {  //SFC=0,3,4。アドレス変換なし
  6676:         if ((a & 3) == 0) {  //4の倍数
  6677:           m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_READ | M60_FSLW_SIZE_LONG | XEiJ.mpuSFC << 16;
  6678:           //z = XEiJ.busRlsf (a);
  6679:           z = mm[a >>> XEiJ.BUS_PAGE_BITS].mmdRls (a);
  6680:         } else if ((a & 1) == 0) {  //4の倍数+2
  6681:           m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_READ | M60_FSLW_SIZE_LONG | XEiJ.mpuSFC << 16;
  6682:           //z = XEiJ.busRwse (a) << 16;
  6683:           z = mm[a >>> XEiJ.BUS_PAGE_BITS].mmdRws (a) << 16;
  6684:           m60FSLW ^= M60_FSLW_IOMA_FIRST ^ M60_FSLW_IOMA_SECOND;
  6685:           a += 2;
  6686:           //z |= XEiJ.busRwze (a);
  6687:           z |= mm[a >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a);
  6688:         } else {  //奇数
  6689:           m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_READ | M60_FSLW_SIZE_LONG | XEiJ.mpuSFC << 16;
  6690:           //z = XEiJ.busRbs (a) << 24;
  6691:           z = mm[a >>> XEiJ.BUS_PAGE_BITS].mmdRbs (a) << 24;
  6692:           m60FSLW ^= M60_FSLW_IOMA_FIRST ^ M60_FSLW_IOMA_SECOND;
  6693:           a++;
  6694:           //z |= XEiJ.busRwze (a) << 8;
  6695:           z |= mm[a >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a) << 8;
  6696:           a += 2;
  6697:           //z |= XEiJ.busRbz (a);
  6698:           z |= mm[a >>> XEiJ.BUS_PAGE_BITS].mmdRbz (a);
  6699:         }
  6700:       } else {  //SFC=7。CPU空間
  6701:         if (0x00022000 <= a && a <= 0x0002201f) {  //コプロセッサID=1
  6702:           z = XEiJ.fpuMotherboardCoprocessor.cirReadLong (a);
  6703:         } else {
  6704:           m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_READ | M60_FSLW_SIZE_LONG | XEiJ.mpuSFC << 16 | M60_FSLW_BUS_ERROR_ON_READ;
  6705:           M68kException.m6eNumber = M68kException.M6E_ACCESS_FAULT;
  6706:           M68kException.m6eAddress = a;
  6707:           M68kException.m6eDirection = XEiJ.MPU_WR_READ;
  6708:           M68kException.m6eSize = XEiJ.MPU_SS_LONG;
  6709:           throw M68kException.m6eSignal;
  6710:         }
  6711:       }
  6712:       XEiJ.regRn[n] = z;
  6713:       if (MMU_DEBUG_COMMAND) {
  6714:         System.out.printf ("%08x movesReadLong(%d,0x%08x)=0x%08x\n", XEiJ.regPC0, XEiJ.mpuSFC, a, XEiJ.regRn[n]);
  6715:       }
  6716:     } else {  //MOVES.L Rn,<ea>。ライト
  6717:       if (MMU_DEBUG_COMMAND) {
  6718:         System.out.printf ("%08x movesWriteLong(%d,0x%08x,0x%08x)\n", XEiJ.regPC0, XEiJ.mpuDFC, a, XEiJ.regRn[n]);
  6719:       }
  6720:       boolean supervisor = (0b10011111 << 24 << XEiJ.mpuDFC) < 0;
  6721:       boolean instruction = (0b00101010 << 24 << XEiJ.mpuDFC) < 0;
  6722:       MemoryMappedDevice[] mm = (DataBreakPoint.DBP_ON ?
  6723:                                  supervisor ? DataBreakPoint.dbpSuperMap : DataBreakPoint.dbpUserMap :
  6724:                                  supervisor ? XEiJ.busSuperMap : XEiJ.busUserMap);
  6725:       int z = XEiJ.regRn[n];
  6726:       //    01234567
  6727:       if (0b01100110 << 24 << XEiJ.mpuDFC < 0) {  //DFC=1,2,5,6。アドレス変換あり
  6728:         if ((a & 3) == 0) {  //4の倍数
  6729:           m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_LONG | XEiJ.mpuDFC << 16;
  6730:           int pa = (supervisor ?
  6731:                     instruction ? mmuTranslateWriteSuperCode (a) : mmuTranslateWriteSuperData (a) :
  6732:                     instruction ? mmuTranslateWriteUserCode (a) : mmuTranslateWriteUserData (a));
  6733:           //XEiJ.busWlf (pa, z);
  6734:           mm[pa >>> XEiJ.BUS_PAGE_BITS].mmdWl (pa, z);
  6735:         } else if ((a & 1) == 0) {  //4の倍数+2
  6736:           m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_LONG | XEiJ.mpuDFC << 16;
  6737:           int pa = (supervisor ?
  6738:                     instruction ? mmuTranslateWriteSuperCode (a) : mmuTranslateWriteSuperData (a) :
  6739:                     instruction ? mmuTranslateWriteUserCode (a) : mmuTranslateWriteUserData (a));
  6740:           //XEiJ.busWwe (pa, z >> 16);
  6741:           mm[pa >>> XEiJ.BUS_PAGE_BITS].mmdWw (pa, z >> 16);
  6742:           m60FSLW ^= M60_FSLW_IOMA_FIRST ^ M60_FSLW_IOMA_SECOND;
  6743:           pa = (supervisor ?
  6744:                 instruction ? mmuTranslateWriteSuperCode (a + 2) : mmuTranslateWriteSuperData (a + 2) :
  6745:                 instruction ? mmuTranslateWriteUserCode (a + 2) : mmuTranslateWriteUserData (a + 2));
  6746:           //XEiJ.busWwe (pa, z);
  6747:           mm[pa >>> XEiJ.BUS_PAGE_BITS].mmdWw (pa, z);
  6748:         } else {  //奇数
  6749:           m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_LONG | XEiJ.mpuDFC << 16;
  6750:           int pa = (supervisor ?
  6751:                     instruction ? mmuTranslateWriteSuperCode (a) : mmuTranslateWriteSuperData (a) :
  6752:                     instruction ? mmuTranslateWriteUserCode (a) : mmuTranslateWriteUserData (a));
  6753:           //XEiJ.busWb (pa, z >> 24);
  6754:           mm[pa >>> XEiJ.BUS_PAGE_BITS].mmdWb (pa, z >> 24);
  6755:           m60FSLW ^= M60_FSLW_IOMA_FIRST ^ M60_FSLW_IOMA_SECOND;
  6756:           pa = (supervisor ?
  6757:                 instruction ? mmuTranslateWriteSuperCode (a + 1) : mmuTranslateWriteSuperData (a + 1) :
  6758:                 instruction ? mmuTranslateWriteUserCode (a + 1) : mmuTranslateWriteUserData (a + 1));
  6759:           //XEiJ.busWwe (pa, z >> 8);
  6760:           mm[pa >>> XEiJ.BUS_PAGE_BITS].mmdWw (pa, z >> 8);
  6761:           pa = (supervisor ?
  6762:                 instruction ? mmuTranslateWriteSuperCode (a + 3) : mmuTranslateWriteSuperData (a + 3) :
  6763:                 instruction ? mmuTranslateWriteUserCode (a + 3) : mmuTranslateWriteUserData (a + 3));
  6764:           //XEiJ.busWb (pa, z);
  6765:           mm[pa >>> XEiJ.BUS_PAGE_BITS].mmdWb (pa, z);
  6766:         }
  6767:       } else if (XEiJ.mpuDFC != 7) {  //DFC=0,3,4。アドレス変換なし
  6768:         if ((a & 3) == 0) {  //4の倍数
  6769:           m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_LONG | XEiJ.mpuDFC << 16;
  6770:           //XEiJ.busWlf (a, z);
  6771:           mm[a >>> XEiJ.BUS_PAGE_BITS].mmdWl (a, z);
  6772:         } else if ((a & 1) == 0) {  //4の倍数+2
  6773:           m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_LONG | XEiJ.mpuDFC << 16;
  6774:           //XEiJ.busWwe (a, z >> 16);
  6775:           mm[a >>> XEiJ.BUS_PAGE_BITS].mmdWw (a, z >> 16);
  6776:           m60FSLW ^= M60_FSLW_IOMA_FIRST ^ M60_FSLW_IOMA_SECOND;
  6777:           a += 2;
  6778:           //XEiJ.busWwe (a, z);
  6779:           mm[a >>> XEiJ.BUS_PAGE_BITS].mmdWw (a, z);
  6780:         } else {  //奇数
  6781:           m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_LONG | XEiJ.mpuDFC << 16;
  6782:           //XEiJ.busWb (a, z >> 24);
  6783:           mm[a >>> XEiJ.BUS_PAGE_BITS].mmdWb (a, z >> 24);
  6784:           m60FSLW ^= M60_FSLW_IOMA_FIRST ^ M60_FSLW_IOMA_SECOND;
  6785:           a++;
  6786:           //XEiJ.busWwe (a, z >> 8);
  6787:           mm[a >>> XEiJ.BUS_PAGE_BITS].mmdWw (a, z >> 8);
  6788:           a += 2;
  6789:           //XEiJ.busWb (a, z);
  6790:           mm[a >>> XEiJ.BUS_PAGE_BITS].mmdWb (a, z);
  6791:         }
  6792:       } else {  //DFC=7。CPU空間
  6793:         if (0x00022000 <= a && a <= 0x0002201f) {  //コプロセッサID=1
  6794:           XEiJ.fpuMotherboardCoprocessor.cirWriteLong (a, z);
  6795:         } else {
  6796:           m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_LONG | XEiJ.mpuDFC << 16 | M60_FSLW_BUS_ERROR_ON_WRITE;
  6797:           M68kException.m6eNumber = M68kException.M6E_ACCESS_FAULT;
  6798:           M68kException.m6eAddress = a;
  6799:           M68kException.m6eDirection = XEiJ.MPU_WR_WRITE;
  6800:           M68kException.m6eSize = XEiJ.MPU_SS_LONG;
  6801:           throw M68kException.m6eSignal;
  6802:         }
  6803:       }
  6804:     }
  6805:   }  //irpMovesLong
  6806: 
  6807:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  6808:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  6809:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  6810:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  6811:   //CAS.L Dc,Du,<ea>                                |-|--2346|-|-UUUU|-****|  M+-WXZ  |0000_111_011_mmm_rrr-0000000uuu000ccc        (68060 software emulate misaligned <ea>)
  6812:   //CAS2.L Dc1:Dc2,Du1:Du2,(Rn1):(Rn2)              |-|--234S|-|-UUUU|-****|          |0000_111_011_111_100-rnnn000uuu000ccc(1)-rnnn_000_uuu_000_ccc(2)
  6813:   public static void irpCasLong () throws M68kException {
  6814:     int ea = XEiJ.regOC & 63;
  6815:     if (ea == XEiJ.EA_IM) {  //CAS2.L Dc1:Dc2,Du1:Du2,(Rn1):(Rn2)
  6816:       M68kException.m6eNumber = M68kException.M6E_UNIMPLEMENTED_INSTRUCTION;
  6817:       throw M68kException.m6eSignal;
  6818:     } else {  //CAS.L Dc,Du,<ea>
  6819:       int w = mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);  //pcwz
  6820:       if ((w & ~0b0000_000_111_000_111) != 0) {
  6821:         M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION;
  6822:         throw M68kException.m6eSignal;
  6823:       }
  6824:       int a = efaMltLong (ea);  //a=ea
  6825:       if ((a & 1) != 0) {  //misaligned <ea>
  6826:         M68kException.m6eNumber = M68kException.M6E_UNIMPLEMENTED_INSTRUCTION;
  6827:         throw M68kException.m6eSignal;
  6828:       }
  6829:       int c = w & 7;
  6830:       int y = XEiJ.regRn[c];  //y=Dc
  6831:       int x = mmuReadLongData (a, XEiJ.regSRS);  //x=<ea>
  6832:       int z = x - y;  //z=<ea>-Dc
  6833:       XEiJ.regCCR = (XEiJ.regCCR & XEiJ.REG_CCR_X |
  6834:                      (z < 0 ? XEiJ.REG_CCR_N : 0) |
  6835:                      (z == 0 ? XEiJ.REG_CCR_Z : 0) |
  6836:                      ((x ^ y) & (x ^ z)) >>> 31 << 1 |
  6837:                      (x & (y ^ z) ^ (y | z)) >>> 31);  //ccr_cmp
  6838:       if (z == 0) {  //<ea>==Dc
  6839:         XEiJ.mpuCycleCount += 19;
  6840:         mmuWriteLongData (a, XEiJ.regRn[w >> 6], XEiJ.regSRS);  //Du→<ea>
  6841:       } else {  //<ea>!=Dc
  6842:         XEiJ.mpuCycleCount += 19;
  6843:         XEiJ.regRn[c] = x;  //<ea>→Dc
  6844:       }
  6845:     }
  6846:   }  //irpCasLong
  6847: 
  6848:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  6849:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  6850:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  6851:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  6852:   //MOVE.B <ea>,Dq                                  |-|012346|-|-UUUU|-**00|D M+-WXZPI|0001_qqq_000_mmm_rrr
  6853:   public static void irpMoveToDRByte () throws M68kException {
  6854:     XEiJ.mpuCycleCount++;
  6855:     int ea = XEiJ.regOC & 63;
  6856:     int qqq = XEiJ.regOC >> 9 & 7;
  6857:     int z = ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadByteSignExword ((XEiJ.regPC += 2) - 1, XEiJ.regSRS) : mmuReadByteSignData (efaAnyByte (ea), XEiJ.regSRS);  //pcbs。イミディエイトを分離
  6858:     XEiJ.regRn[qqq] = ~255 & XEiJ.regRn[qqq] | 255 & z;
  6859:     XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & z];  //ccr_tst_byte
  6860:   }  //irpMoveToDRByte
  6861: 
  6862:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  6863:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  6864:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  6865:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  6866:   //MOVE.B <ea>,(Aq)                                |-|012346|-|-UUUU|-**00|D M+-WXZPI|0001_qqq_010_mmm_rrr
  6867:   public static void irpMoveToMMByte () throws M68kException {
  6868:     XEiJ.mpuCycleCount++;
  6869:     int ea = XEiJ.regOC & 63;
  6870:     int z = ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadByteSignExword ((XEiJ.regPC += 2) - 1, XEiJ.regSRS) : mmuReadByteSignData (efaAnyByte (ea), XEiJ.regSRS);  //pcbs。イミディエイトを分離。ここでAqが変化する可能性があることに注意
  6871:     int aqq = (XEiJ.regOC >> 9) - (0b0001_000 - 8);
  6872:     int a = m60Address = XEiJ.regRn[aqq];
  6873:     mmuWriteByteData (a, z, XEiJ.regSRS);
  6874:     XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & z];  //ccr_tst_byte
  6875:   }  //irpMoveToMMByte
  6876: 
  6877:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  6878:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  6879:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  6880:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  6881:   //MOVE.B <ea>,(Aq)+                               |-|012346|-|-UUUU|-**00|D M+-WXZPI|0001_qqq_011_mmm_rrr
  6882:   public static void irpMoveToMPByte () throws M68kException {
  6883:     XEiJ.mpuCycleCount++;
  6884:     int ea = XEiJ.regOC & 63;
  6885:     int z = ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadByteSignExword ((XEiJ.regPC += 2) - 1, XEiJ.regSRS) : mmuReadByteSignData (efaAnyByte (ea), XEiJ.regSRS);  //pcbs。イミディエイトを分離。ここでAqが変化する可能性があることに注意
  6886:     int aqq = (XEiJ.regOC >> 9) - (0b0001_000 - 8);
  6887:     int a;
  6888:     if (aqq < 15) {
  6889:       m60Incremented += 1L << (aqq << 3);  //longのシフトカウントは6bitでマスクされる
  6890:       a = m60Address = XEiJ.regRn[aqq]++;
  6891:     } else {
  6892:       m60Incremented += 2L << (7 << 3);
  6893:       a = m60Address = (XEiJ.regRn[15] += 2) - 2;
  6894:     }
  6895:     mmuWriteByteData (a, z, XEiJ.regSRS);
  6896:     XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & z];  //ccr_tst_byte
  6897:   }  //irpMoveToMPByte
  6898: 
  6899:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  6900:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  6901:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  6902:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  6903:   //MOVE.B <ea>,-(Aq)                               |-|012346|-|-UUUU|-**00|D M+-WXZPI|0001_qqq_100_mmm_rrr
  6904:   public static void irpMoveToMNByte () throws M68kException {
  6905:     XEiJ.mpuCycleCount++;
  6906:     int ea = XEiJ.regOC & 63;
  6907:     int z = ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadByteSignExword ((XEiJ.regPC += 2) - 1, XEiJ.regSRS) : mmuReadByteSignData (efaAnyByte (ea), XEiJ.regSRS);  //pcbs。イミディエイトを分離。ここでAqが変化する可能性があることに注意
  6908:     int aqq = (XEiJ.regOC >> 9) - (0b0001_000 - 8);
  6909:     int a;
  6910:     if (aqq < 15) {
  6911:       m60Incremented -= 1L << (aqq << 3);  //longのシフトカウントは6bitでマスクされる
  6912:       a = m60Address = --XEiJ.regRn[aqq];
  6913:     } else {
  6914:       m60Incremented -= 2L << (7 << 3);
  6915:       a = m60Address = XEiJ.regRn[15] -= 2;
  6916:     }
  6917:     mmuWriteByteData (a, z, XEiJ.regSRS);
  6918:     XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & z];  //ccr_tst_byte
  6919:   }  //irpMoveToMNByte
  6920: 
  6921:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  6922:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  6923:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  6924:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  6925:   //MOVE.B <ea>,(d16,Aq)                            |-|012346|-|-UUUU|-**00|D M+-WXZPI|0001_qqq_101_mmm_rrr
  6926:   public static void irpMoveToMWByte () throws M68kException {
  6927:     XEiJ.mpuCycleCount++;
  6928:     int ea = XEiJ.regOC & 63;
  6929:     int z = ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadByteSignExword ((XEiJ.regPC += 2) - 1, XEiJ.regSRS) : mmuReadByteSignData (efaAnyByte (ea), XEiJ.regSRS);  //pcbs。イミディエイトを分離。ここでAqが変化する可能性があることに注意
  6930:     int aqq = (XEiJ.regOC >> 9) - (0b0001_000 - 8);
  6931:     int t = XEiJ.regRn[aqq];  //ベースレジスタ
  6932:     int a = m60Address = t + mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);  //ワードディスプレースメント
  6933:     mmuWriteByteData (a, z, XEiJ.regSRS);
  6934:     XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & z];  //ccr_tst_byte
  6935:   }  //irpMoveToMWByte
  6936: 
  6937:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  6938:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  6939:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  6940:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  6941:   //MOVE.B <ea>,(d8,Aq,Rn.wl)                       |-|012346|-|-UUUU|-**00|D M+-WXZPI|0001_qqq_110_mmm_rrr
  6942:   public static void irpMoveToMXByte () throws M68kException {
  6943:     XEiJ.mpuCycleCount++;
  6944:     int ea = XEiJ.regOC & 63;
  6945:     int z = ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadByteSignExword ((XEiJ.regPC += 2) - 1, XEiJ.regSRS) : mmuReadByteSignData (efaAnyByte (ea), XEiJ.regSRS);  //pcbs。イミディエイトを分離。ここでAqが変化する可能性があることに注意
  6946:     int aqq = (XEiJ.regOC >> 9) - (0b0001_000 - 8);
  6947:     int a;
  6948:     int t = XEiJ.regRn[aqq];  //ベースレジスタ
  6949:     int w = mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);  //拡張ワード
  6950:     if ((0x0100 & w) == 0) {  //ブリーフフォーマット
  6951:       a = m60Address =
  6952:         (t  //ベースレジスタ
  6953:          + (byte) w  //バイトディスプレースメント
  6954:          + (((0x0800 & w) == 0 ? (short) XEiJ.regRn[w >> 12] :  //ワードインデックス
  6955:              XEiJ.regRn[w >> 12])  //ロングインデックス
  6956:             << ((0x0600 & w) >> 9)));  //スケールファクタ
  6957:     } else {  //フルフォーマット
  6958:       XEiJ.mpuCycleCount += ((0x0003 & w) == 0 ? 1 :  //インダイレクトなし
  6959:                              3);  //インダイレクトあり
  6960:       t = (((0x0080 & w) != 0 ? 0 :  //ベースレジスタなし
  6961:             t) +  //ベースレジスタあり
  6962:            ((0x0020 & w) == 0 ? 0 :  //ベースディスプレースメントなし
  6963:             (0x0010 & w) == 0 ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) :  //ワードベースディスプレースメント
  6964:             mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS)));  //ロングベースディスプレースメント
  6965:       int x = ((0x0040 & w) != 0 ? 0 :  //インデックスなし
  6966:                ((0x0800 & w) == 0 ? (short) XEiJ.regRn[w >> 12] :  //ワードインデックス
  6967:                 XEiJ.regRn[w >> 12])  //ロングインデックス
  6968:                << ((0x0600 & w) >> 9));  //スケールファクタ
  6969:       a = m60Address =
  6970:         ((0x0003 & w) == 0 ? t + x :  //インダイレクトなし
  6971:          (((0x0004 & w) == 0 ? mmuReadLongData (m60Address = t + x, XEiJ.regSRS) :  //プリインデックス
  6972:            mmuReadLongData (m60Address = t, XEiJ.regSRS) + x)  //ポストインデックス
  6973:           + ((0x0002 & w) == 0 ? 0 :  //アウタディスプレースメントなし
  6974:              (0x0001 & w) == 0 ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) :  //ワードアウタディスプレースメント
  6975:              mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS))));  //ロングアウタディスプレースメント
  6976:     }
  6977:     mmuWriteByteData (a, z, XEiJ.regSRS);
  6978:     XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & z];  //ccr_tst_byte
  6979:   }  //irpMoveToMXByte
  6980: 
  6981:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  6982:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  6983:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  6984:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  6985:   //MOVE.B <ea>,(xxx).W                             |-|012346|-|-UUUU|-**00|D M+-WXZPI|0001_000_111_mmm_rrr
  6986:   public static void irpMoveToZWByte () throws M68kException {
  6987:     XEiJ.mpuCycleCount++;
  6988:     int ea = XEiJ.regOC & 63;
  6989:     int z = ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadByteSignExword ((XEiJ.regPC += 2) - 1, XEiJ.regSRS) : mmuReadByteSignData (efaAnyByte (ea), XEiJ.regSRS);  //pcbs。イミディエイトを分離
  6990:     int a = m60Address = mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);
  6991:     mmuWriteByteData (a, z, XEiJ.regSRS);
  6992:     XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & z];  //ccr_tst_byte
  6993:   }  //irpMoveToZWByte
  6994: 
  6995:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  6996:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  6997:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  6998:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  6999:   //MOVE.B <ea>,(xxx).L                             |-|012346|-|-UUUU|-**00|D M+-WXZPI|0001_001_111_mmm_rrr
  7000:   public static void irpMoveToZLByte () throws M68kException {
  7001:     XEiJ.mpuCycleCount++;
  7002:     int ea = XEiJ.regOC & 63;
  7003:     int z = ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadByteSignExword ((XEiJ.regPC += 2) - 1, XEiJ.regSRS) : mmuReadByteSignData (efaAnyByte (ea), XEiJ.regSRS);  //pcbs。イミディエイトを分離
  7004:     int a = m60Address = mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS);
  7005:     mmuWriteByteData (a, z, XEiJ.regSRS);
  7006:     XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & z];  //ccr_tst_byte
  7007:   }  //irpMoveToZLByte
  7008: 
  7009:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7010:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  7011:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  7012:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7013:   //MOVE.L <ea>,Dq                                  |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0010_qqq_000_mmm_rrr
  7014:   public static void irpMoveToDRLong () throws M68kException {
  7015:     XEiJ.mpuCycleCount++;
  7016:     int ea = XEiJ.regOC & 63;
  7017:     int z;
  7018:     XEiJ.regRn[XEiJ.regOC >> 9 & 7] = z = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS) : mmuReadLongData (efaAnyLong (ea), XEiJ.regSRS);  //pcls。イミディエイトを分離。このr[ea]はデータレジスタまたはアドレスレジスタ
  7019:     XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X);  //ccr_tst
  7020:   }  //irpMoveToDRLong
  7021: 
  7022:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7023:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  7024:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  7025:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7026:   //MOVEA.L <ea>,Aq                                 |-|012346|-|-----|-----|DAM+-WXZPI|0010_qqq_001_mmm_rrr
  7027:   //MOVE.L <ea>,Aq                                  |A|012346|-|-----|-----|DAM+-WXZPI|0010_qqq_001_mmm_rrr [MOVEA.L <ea>,Aq]
  7028:   public static void irpMoveaLong () throws M68kException {
  7029:     XEiJ.mpuCycleCount++;
  7030:     int ea = XEiJ.regOC & 63;
  7031:     XEiJ.regRn[(XEiJ.regOC >> 9) - (16 - 8)] = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS) : mmuReadLongData (efaAnyLong (ea), XEiJ.regSRS);  //pcls。イミディエイトを分離。このr[ea]はデータレジスタまたはアドレスレジスタ。右辺でAqが変化する可能性があることに注意
  7032:   }  //irpMoveaLong
  7033: 
  7034:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7035:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  7036:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  7037:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7038:   //MOVE.L <ea>,(Aq)                                |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0010_qqq_010_mmm_rrr
  7039:   public static void irpMoveToMMLong () throws M68kException {
  7040:     XEiJ.mpuCycleCount++;
  7041:     int ea = XEiJ.regOC & 63;
  7042:     int z = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS) : mmuReadLongData (efaAnyLong (ea), XEiJ.regSRS);  //pcls。イミディエイトを分離。このr[ea]はデータレジスタまたはアドレスレジスタ。ここでAqが変化する可能性があることに注意
  7043:     int aqq = (XEiJ.regOC >> 9) - (0b0010_000 - 8);
  7044:     int a = m60Address = XEiJ.regRn[aqq];
  7045:     mmuWriteLongData (a, z, XEiJ.regSRS);
  7046:     XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X);  //ccr_tst
  7047:   }  //irpMoveToMMLong
  7048: 
  7049:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7050:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  7051:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  7052:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7053:   //MOVE.L <ea>,(Aq)+                               |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0010_qqq_011_mmm_rrr
  7054:   public static void irpMoveToMPLong () throws M68kException {
  7055:     XEiJ.mpuCycleCount++;
  7056:     int ea = XEiJ.regOC & 63;
  7057:     int z = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS) : mmuReadLongData (efaAnyLong (ea), XEiJ.regSRS);  //pcls。イミディエイトを分離。このr[ea]はデータレジスタまたはアドレスレジスタ。ここでAqが変化する可能性があることに注意
  7058:     int aqq = (XEiJ.regOC >> 9) - (0b0010_000 - 8);
  7059:     m60Incremented += 4L << (aqq << 3);  //longのシフトカウントは6bitでマスクされる
  7060:     int a = m60Address = (XEiJ.regRn[aqq] += 4) - 4;
  7061:     mmuWriteLongData (a, z, XEiJ.regSRS);
  7062:     XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X);  //ccr_tst
  7063:   }  //irpMoveToMPLong
  7064: 
  7065:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7066:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  7067:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  7068:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7069:   //MOVE.L <ea>,-(Aq)                               |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0010_qqq_100_mmm_rrr
  7070:   public static void irpMoveToMNLong () throws M68kException {
  7071:     XEiJ.mpuCycleCount++;
  7072:     int ea = XEiJ.regOC & 63;
  7073:     int z = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS) : mmuReadLongData (efaAnyLong (ea), XEiJ.regSRS);  //pcls。イミディエイトを分離。このr[ea]はデータレジスタまたはアドレスレジスタ。ここでAqが変化する可能性があることに注意
  7074:     int aqq = (XEiJ.regOC >> 9) - (0b0010_000 - 8);
  7075:     m60Incremented -= 4L << (aqq << 3);  //longのシフトカウントは6bitでマスクされる
  7076:     int a = m60Address = XEiJ.regRn[aqq] -= 4;
  7077:     mmuWriteLongData (a, z, XEiJ.regSRS);
  7078:     XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X);  //ccr_tst
  7079:   }  //irpMoveToMNLong
  7080: 
  7081:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7082:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  7083:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  7084:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7085:   //MOVE.L <ea>,(d16,Aq)                            |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0010_qqq_101_mmm_rrr
  7086:   public static void irpMoveToMWLong () throws M68kException {
  7087:     XEiJ.mpuCycleCount++;
  7088:     int ea = XEiJ.regOC & 63;
  7089:     int z = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS) : mmuReadLongData (efaAnyLong (ea), XEiJ.regSRS);  //pcls。イミディエイトを分離。このr[ea]はデータレジスタまたはアドレスレジスタ。ここでAqが変化する可能性があることに注意
  7090:     int aqq = (XEiJ.regOC >> 9) - (0b0010_000 - 8);
  7091:     int t = XEiJ.regRn[aqq];  //ベースレジスタ
  7092:     int a = m60Address = t + mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);  //ワードディスプレースメント
  7093:     mmuWriteLongData (a, z, XEiJ.regSRS);
  7094:     XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X);  //ccr_tst
  7095:   }  //irpMoveToMWLong
  7096: 
  7097:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7098:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  7099:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  7100:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7101:   //MOVE.L <ea>,(d8,Aq,Rn.wl)                       |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0010_qqq_110_mmm_rrr
  7102:   public static void irpMoveToMXLong () throws M68kException {
  7103:     XEiJ.mpuCycleCount++;
  7104:     int ea = XEiJ.regOC & 63;
  7105:     int z = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS) : mmuReadLongData (efaAnyLong (ea), XEiJ.regSRS);  //pcls。イミディエイトを分離。このr[ea]はデータレジスタまたはアドレスレジスタ。ここでAqが変化する可能性があることに注意
  7106:     int aqq = (XEiJ.regOC >> 9) - (0b0010_000 - 8);
  7107:     int t = XEiJ.regRn[aqq];  //ベースレジスタ
  7108:     int w = mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);  //拡張ワード
  7109:     int a;
  7110:     if ((0x0100 & w) == 0) {  //ブリーフフォーマット
  7111:       a = m60Address =
  7112:         (t  //ベースレジスタ
  7113:          + (byte) w  //バイトディスプレースメント
  7114:          + (((0x0800 & w) == 0 ? (short) XEiJ.regRn[w >> 12] :  //ワードインデックス
  7115:              XEiJ.regRn[w >> 12])  //ロングインデックス
  7116:             << ((0x0600 & w) >> 9)));  //スケールファクタ
  7117:     } else {  //フルフォーマット
  7118:       XEiJ.mpuCycleCount += ((0x0003 & w) == 0 ? 1 :  //インダイレクトなし
  7119:                              3);  //インダイレクトあり
  7120:       t = (((0x0080 & w) != 0 ? 0 :  //ベースレジスタなし
  7121:             t) +  //ベースレジスタあり
  7122:            ((0x0020 & w) == 0 ? 0 :  //ベースディスプレースメントなし
  7123:             (0x0010 & w) == 0 ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) :  //ワードベースディスプレースメント
  7124:             mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS)));  //ロングベースディスプレースメント
  7125:       int x = ((0x0040 & w) != 0 ? 0 :  //インデックスなし
  7126:                ((0x0800 & w) == 0 ? (short) XEiJ.regRn[w >> 12] :  //ワードインデックス
  7127:                 XEiJ.regRn[w >> 12])  //ロングインデックス
  7128:                << ((0x0600 & w) >> 9));  //スケールファクタ
  7129:       a = m60Address =
  7130:         ((0x0003 & w) == 0 ? t + x :  //インダイレクトなし
  7131:          (((0x0004 & w) == 0 ? mmuReadLongData (m60Address = t + x, XEiJ.regSRS) :  //プリインデックス
  7132:            mmuReadLongData (m60Address = t, XEiJ.regSRS) + x)  //ポストインデックス
  7133:           + ((0x0002 & w) == 0 ? 0 :  //アウタディスプレースメントなし
  7134:              (0x0001 & w) == 0 ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) :  //ワードアウタディスプレースメント
  7135:              mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS))));  //ロングアウタディスプレースメント
  7136:     }
  7137:     mmuWriteLongData (a, z, XEiJ.regSRS);
  7138:     XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X);  //ccr_tst
  7139:   }  //irpMoveToMXLong
  7140: 
  7141:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7142:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  7143:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  7144:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7145:   //MOVE.L <ea>,(xxx).W                             |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0010_000_111_mmm_rrr
  7146:   public static void irpMoveToZWLong () throws M68kException {
  7147:     XEiJ.mpuCycleCount++;
  7148:     int ea = XEiJ.regOC & 63;
  7149:     int z = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS) : mmuReadLongData (efaAnyLong (ea), XEiJ.regSRS);  //pcls。イミディエイトを分離。このr[ea]はデータレジスタまたはアドレスレジスタ
  7150:     int a = m60Address = mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);
  7151:     mmuWriteLongData (a, z, XEiJ.regSRS);
  7152:     XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X);  //ccr_tst
  7153:   }  //irpMoveToZWLong
  7154: 
  7155:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7156:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  7157:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  7158:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7159:   //MOVE.L <ea>,(xxx).L                             |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0010_001_111_mmm_rrr
  7160:   public static void irpMoveToZLLong () throws M68kException {
  7161:     XEiJ.mpuCycleCount++;
  7162:     int ea = XEiJ.regOC & 63;
  7163:     int z = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS) : mmuReadLongData (efaAnyLong (ea), XEiJ.regSRS);  //pcls。イミディエイトを分離。このr[ea]はデータレジスタまたはアドレスレジスタ
  7164:     int a = m60Address = mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS);
  7165:     mmuWriteLongData (a, z, XEiJ.regSRS);
  7166:     XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X);  //ccr_tst
  7167:   }  //irpMoveToZLLong
  7168: 
  7169:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7170:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  7171:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  7172:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7173:   //MOVE.W <ea>,Dq                                  |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0011_qqq_000_mmm_rrr
  7174:   public static void irpMoveToDRWord () throws M68kException {
  7175:     XEiJ.mpuCycleCount++;
  7176:     int ea = XEiJ.regOC & 63;
  7177:     int qqq = XEiJ.regOC >> 9 & 7;
  7178:     int z = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) : mmuReadWordSignData (efaAnyWord (ea), XEiJ.regSRS);  //pcws。イミディエイトを分離。このr[ea]はデータレジスタまたはアドレスレジスタ
  7179:     XEiJ.regRn[qqq] = ~65535 & XEiJ.regRn[qqq] | (char) z;
  7180:     XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (char) z - 1 >> 31 & XEiJ.REG_CCR_Z | ((short) z < 0 ? XEiJ.REG_CCR_N : 0);  //ccr_tst_word
  7181:   }  //irpMoveToDRWord
  7182: 
  7183:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7184:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  7185:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  7186:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7187:   //MOVEA.W <ea>,Aq                                 |-|012346|-|-----|-----|DAM+-WXZPI|0011_qqq_001_mmm_rrr
  7188:   //MOVE.W <ea>,Aq                                  |A|012346|-|-----|-----|DAM+-WXZPI|0011_qqq_001_mmm_rrr [MOVEA.W <ea>,Aq]
  7189:   //
  7190:   //MOVEA.W <ea>,Aq
  7191:   //  ワードデータをロングに符号拡張してAqの全体を更新する
  7192:   public static void irpMoveaWord () throws M68kException {
  7193:     XEiJ.mpuCycleCount++;
  7194:     int ea = XEiJ.regOC & 63;
  7195:     XEiJ.regRn[XEiJ.regOC >> 9 & 15] = ea < XEiJ.EA_MM ? (short) XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) : mmuReadWordSignData (efaAnyWord (ea), XEiJ.regSRS);  //符号拡張して32bit全部書き換える。pcws。イミディエイトを分離。このr[ea]はデータレジスタまたはアドレスレジスタ。右辺でAqが変化する可能性があることに注意
  7196:   }  //irpMoveaWord
  7197: 
  7198:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7199:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  7200:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  7201:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7202:   //MOVE.W <ea>,(Aq)                                |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0011_qqq_010_mmm_rrr
  7203:   public static void irpMoveToMMWord () throws M68kException {
  7204:     XEiJ.mpuCycleCount++;
  7205:     int ea = XEiJ.regOC & 63;
  7206:     int z = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) : mmuReadWordSignData (efaAnyWord (ea), XEiJ.regSRS);  //pcws。イミディエイトを分離。このr[ea]はデータレジスタまたはアドレスレジスタ。ここでAqが変化する可能性があることに注意
  7207:     int aqq = (XEiJ.regOC >> 9) - (0b0011_000 - 8);
  7208:     int a = m60Address = XEiJ.regRn[aqq];
  7209:     mmuWriteWordData (a, z, XEiJ.regSRS);
  7210:     XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (char) z - 1 >> 31 & XEiJ.REG_CCR_Z | ((short) z < 0 ? XEiJ.REG_CCR_N : 0);  //ccr_tst_word
  7211:   }  //irpMoveToMMWord
  7212: 
  7213:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7214:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  7215:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  7216:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7217:   //MOVE.W <ea>,(Aq)+                               |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0011_qqq_011_mmm_rrr
  7218:   public static void irpMoveToMPWord () throws M68kException {
  7219:     XEiJ.mpuCycleCount++;
  7220:     int ea = XEiJ.regOC & 63;
  7221:     int z = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) : mmuReadWordSignData (efaAnyWord (ea), XEiJ.regSRS);  //このr[ea]はデータレジスタまたはアドレスレジスタ。pcws。イミディエイトを分離。ここでAqが変化する可能性があることに注意
  7222:     int aqq = (XEiJ.regOC >> 9) - (0b0011_000 - 8);
  7223:     m60Incremented += 2L << (aqq << 3);  //longのシフトカウントは6bitでマスクされる
  7224:     int a = m60Address = (XEiJ.regRn[aqq] += 2) - 2;
  7225:     mmuWriteWordData (a, z, XEiJ.regSRS);
  7226:     XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (char) z - 1 >> 31 & XEiJ.REG_CCR_Z | ((short) z < 0 ? XEiJ.REG_CCR_N : 0);  //ccr_tst_word
  7227:   }  //irpMoveToMPWord
  7228: 
  7229:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7230:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  7231:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  7232:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7233:   //MOVE.W <ea>,-(Aq)                               |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0011_qqq_100_mmm_rrr
  7234:   public static void irpMoveToMNWord () throws M68kException {
  7235:     XEiJ.mpuCycleCount++;
  7236:     int ea = XEiJ.regOC & 63;
  7237:     int z = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) : mmuReadWordSignData (efaAnyWord (ea), XEiJ.regSRS);  //このr[ea]はデータレジスタまたはアドレスレジスタ。pcws。イミディエイトを分離。ここでAqが変化する可能性があることに注意
  7238:     int aqq = (XEiJ.regOC >> 9) - (0b0011_000 - 8);
  7239:     m60Incremented -= 2L << (aqq << 3);  //longのシフトカウントは6bitでマスクされる
  7240:     int a = m60Address = XEiJ.regRn[aqq] -= 2;
  7241:     mmuWriteWordData (a, z, XEiJ.regSRS);
  7242:     XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (char) z - 1 >> 31 & XEiJ.REG_CCR_Z | ((short) z < 0 ? XEiJ.REG_CCR_N : 0);  //ccr_tst_word
  7243:   }  //irpMoveToMNWord
  7244: 
  7245:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7246:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  7247:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  7248:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7249:   //MOVE.W <ea>,(d16,Aq)                            |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0011_qqq_101_mmm_rrr
  7250:   public static void irpMoveToMWWord () throws M68kException {
  7251:     XEiJ.mpuCycleCount++;
  7252:     int ea = XEiJ.regOC & 63;
  7253:     int z = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) : mmuReadWordSignData (efaAnyWord (ea), XEiJ.regSRS);  //このr[ea]はデータレジスタまたはアドレスレジスタ。pcws。イミディエイトを分離。ここでAqが変化する可能性があることに注意
  7254:     int aqq = (XEiJ.regOC >> 9) - (0b0011_000 - 8);
  7255:     int t = XEiJ.regRn[aqq];  //ベースレジスタ
  7256:     int a = m60Address = t + mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);  //ワードディスプレースメント
  7257:     mmuWriteWordData (a, z, XEiJ.regSRS);
  7258:     XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (char) z - 1 >> 31 & XEiJ.REG_CCR_Z | ((short) z < 0 ? XEiJ.REG_CCR_N : 0);  //ccr_tst_word
  7259:   }  //irpMoveToMWWord
  7260: 
  7261:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7262:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  7263:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  7264:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7265:   //MOVE.W <ea>,(d8,Aq,Rn.wl)                       |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0011_qqq_110_mmm_rrr
  7266:   public static void irpMoveToMXWord () throws M68kException {
  7267:     XEiJ.mpuCycleCount++;
  7268:     int ea = XEiJ.regOC & 63;
  7269:     int z = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) : mmuReadWordSignData (efaAnyWord (ea), XEiJ.regSRS);  //このr[ea]はデータレジスタまたはアドレスレジスタ。pcws。イミディエイトを分離。ここでAqが変化する可能性があることに注意
  7270:     int aqq = (XEiJ.regOC >> 9) - (0b0011_000 - 8);
  7271:     int t = XEiJ.regRn[aqq];  //ベースレジスタ
  7272:     int w = mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);  //拡張ワード
  7273:     int a;
  7274:     if ((0x0100 & w) == 0) {  //ブリーフフォーマット
  7275:       a = m60Address =
  7276:         (t  //ベースレジスタ
  7277:          + (byte) w  //バイトディスプレースメント
  7278:          + (((0x0800 & w) == 0 ? (short) XEiJ.regRn[w >> 12] :  //ワードインデックス
  7279:              XEiJ.regRn[w >> 12])  //ロングインデックス
  7280:             << ((0x0600 & w) >> 9)));  //スケールファクタ
  7281:     } else {  //フルフォーマット
  7282:       XEiJ.mpuCycleCount += ((0x0003 & w) == 0 ? 1 :  //インダイレクトなし
  7283:                              3);  //インダイレクトあり
  7284:       t = (((0x0080 & w) != 0 ? 0 :  //ベースレジスタなし
  7285:             t) +  //ベースレジスタあり
  7286:            ((0x0020 & w) == 0 ? 0 :  //ベースディスプレースメントなし
  7287:             (0x0010 & w) == 0 ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) :  //ワードベースディスプレースメント
  7288:             mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS)));  //ロングベースディスプレースメント
  7289:       int x = ((0x0040 & w) != 0 ? 0 :  //インデックスなし
  7290:                ((0x0800 & w) == 0 ? (short) XEiJ.regRn[w >> 12] :  //ワードインデックス
  7291:                 XEiJ.regRn[w >> 12])  //ロングインデックス
  7292:                << ((0x0600 & w) >> 9));  //スケールファクタ
  7293:       a = m60Address =
  7294:         ((0x0003 & w) == 0 ? t + x :  //インダイレクトなし
  7295:          (((0x0004 & w) == 0 ? mmuReadLongData (m60Address = t + x, XEiJ.regSRS) :  //プリインデックス
  7296:            mmuReadLongData (m60Address = t, XEiJ.regSRS) + x)  //ポストインデックス
  7297:           + ((0x0002 & w) == 0 ? 0 :  //アウタディスプレースメントなし
  7298:              (0x0001 & w) == 0 ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) :  //ワードアウタディスプレースメント
  7299:              mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS))));  //ロングアウタディスプレースメント
  7300:     }
  7301:     mmuWriteWordData (a, z, XEiJ.regSRS);
  7302:     XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (char) z - 1 >> 31 & XEiJ.REG_CCR_Z | ((short) z < 0 ? XEiJ.REG_CCR_N : 0);  //ccr_tst_word
  7303:   }  //irpMoveToMXWord
  7304: 
  7305:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7306:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  7307:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  7308:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7309:   //MOVE.W <ea>,(xxx).W                             |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0011_000_111_mmm_rrr
  7310:   public static void irpMoveToZWWord () throws M68kException {
  7311:     XEiJ.mpuCycleCount++;
  7312:     int ea = XEiJ.regOC & 63;
  7313:     int z = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) : mmuReadWordSignData (efaAnyWord (ea), XEiJ.regSRS);  //このr[ea]はデータレジスタまたはアドレスレジスタ。pcws。イミディエイトを分離
  7314:     int a = m60Address = mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);
  7315:     mmuWriteWordData (a, z, XEiJ.regSRS);
  7316:     XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (char) z - 1 >> 31 & XEiJ.REG_CCR_Z | ((short) z < 0 ? XEiJ.REG_CCR_N : 0);  //ccr_tst_word
  7317:   }  //irpMoveToZWWord
  7318: 
  7319:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7320:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  7321:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  7322:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7323:   //MOVE.W <ea>,(xxx).L                             |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0011_001_111_mmm_rrr
  7324:   public static void irpMoveToZLWord () throws M68kException {
  7325:     XEiJ.mpuCycleCount++;
  7326:     int ea = XEiJ.regOC & 63;
  7327:     int z = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) : mmuReadWordSignData (efaAnyWord (ea), XEiJ.regSRS);  //このr[ea]はデータレジスタまたはアドレスレジスタ。pcws。イミディエイトを分離
  7328:     int a = m60Address = mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS);
  7329:     mmuWriteWordData (a, z, XEiJ.regSRS);
  7330:     XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (char) z - 1 >> 31 & XEiJ.REG_CCR_Z | ((short) z < 0 ? XEiJ.REG_CCR_N : 0);  //ccr_tst_word
  7331:   }  //irpMoveToZLWord
  7332: 
  7333:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7334:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  7335:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  7336:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7337:   //NEGX.B <ea>                                     |-|012346|-|*UUUU|*****|D M+-WXZ  |0100_000_000_mmm_rrr
  7338:   public static void irpNegxByte () throws M68kException {
  7339:     int ea = XEiJ.regOC & 63;
  7340:     int y;
  7341:     int z;
  7342:     if (ea < XEiJ.EA_AR) {  //NEGX.B Dr
  7343:       XEiJ.mpuCycleCount++;
  7344:       z = (byte) (XEiJ.regRn[ea] = ~0xff & (y = XEiJ.regRn[ea]) | 0xff & -(y = (byte) y) - (XEiJ.regCCR >> 4));  //Xの左側はすべて0なのでCCR_X&を省略
  7345:     } else {  //NEGX.B <mem>
  7346:       XEiJ.mpuCycleCount++;
  7347:       int a = efaMltByte (ea);
  7348:       mmuWriteByteData (a, z = (byte) (-(y = mmuModifyByteSignData (a, XEiJ.regSRS)) - (XEiJ.regCCR >> 4)), XEiJ.regSRS);  //Xの左側はすべて0なのでCCR_X&を省略
  7349:     }
  7350:     XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_Z : 0) |
  7351:            (y & z) >>> 31 << 1 |
  7352:            (y | z) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C));  //ccr_negx
  7353:   }  //irpNegxByte
  7354: 
  7355:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7356:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  7357:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  7358:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7359:   //NEGX.W <ea>                                     |-|012346|-|*UUUU|*****|D M+-WXZ  |0100_000_001_mmm_rrr
  7360:   public static void irpNegxWord () throws M68kException {
  7361:     int ea = XEiJ.regOC & 63;
  7362:     int y;
  7363:     int z;
  7364:     if (ea < XEiJ.EA_AR) {  //NEGX.W Dr
  7365:       XEiJ.mpuCycleCount++;
  7366:       z = (short) (XEiJ.regRn[ea] = ~0xffff & (y = XEiJ.regRn[ea]) | (char) (-(y = (short) y) - (XEiJ.regCCR >> 4)));  //Xの左側はすべて0なのでCCR_X&を省略
  7367:     } else {  //NEGX.W <mem>
  7368:       XEiJ.mpuCycleCount++;
  7369:       int a = efaMltWord (ea);
  7370:       mmuWriteWordData (a, z = (short) (-(y = mmuModifyWordSignData (a, XEiJ.regSRS)) - (XEiJ.regCCR >> 4)), XEiJ.regSRS);  //Xの左側はすべて0なのでCCR_X&を省略
  7371:     }
  7372:     XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_Z : 0) |
  7373:            (y & z) >>> 31 << 1 |
  7374:            (y | z) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C));  //ccr_negx
  7375:   }  //irpNegxWord
  7376: 
  7377:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7378:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  7379:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  7380:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7381:   //NEGX.L <ea>                                     |-|012346|-|*UUUU|*****|D M+-WXZ  |0100_000_010_mmm_rrr
  7382:   public static void irpNegxLong () throws M68kException {
  7383:     int ea = XEiJ.regOC & 63;
  7384:     int y;
  7385:     int z;
  7386:     if (ea < XEiJ.EA_AR) {  //NEGX.L Dr
  7387:       XEiJ.mpuCycleCount++;
  7388:       XEiJ.regRn[ea] = z = -(y = XEiJ.regRn[ea]) - (XEiJ.regCCR >> 4);  //Xの左側はすべて0なのでCCR_X&を省略
  7389:     } else {  //NEGX.L <mem>
  7390:       XEiJ.mpuCycleCount++;
  7391:       int a = efaMltLong (ea);
  7392:       mmuWriteLongData (a, z = -(y = mmuModifyLongData (a, XEiJ.regSRS)) - (XEiJ.regCCR >> 4), XEiJ.regSRS);  //Xの左側はすべて0なのでCCR_X&を省略
  7393:     }
  7394:     XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_Z : 0) |
  7395:            (y & z) >>> 31 << 1 |
  7396:            (y | z) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C));  //ccr_negx
  7397:   }  //irpNegxLong
  7398: 
  7399:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7400:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  7401:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  7402:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7403:   //MOVE.W SR,<ea>                                  |-|-12346|P|*****|-----|D M+-WXZ  |0100_000_011_mmm_rrr
  7404:   public static void irpMoveFromSR () throws M68kException {
  7405:     //MC68010以上では特権命令
  7406:     if (XEiJ.regSRS == 0) {  //ユーザモードのとき
  7407:       M68kException.m6eNumber = M68kException.M6E_PRIVILEGE_VIOLATION;
  7408:       throw M68kException.m6eSignal;
  7409:     }
  7410:     //以下はスーパーバイザモード
  7411:     int ea = XEiJ.regOC & 63;
  7412:     if (ea < XEiJ.EA_AR) {  //MOVE.W SR,Dr
  7413:       XEiJ.mpuCycleCount++;
  7414:       XEiJ.regRn[ea] = ~0xffff & XEiJ.regRn[ea] | XEiJ.regSRT1 | XEiJ.regSRS | XEiJ.regSRM | XEiJ.regSRI | XEiJ.regCCR;
  7415:     } else {  //MOVE.W SR,<mem>
  7416:       XEiJ.mpuCycleCount++;
  7417:       mmuWriteWordData (efaMltWord (ea), XEiJ.regSRT1 | XEiJ.regSRS | XEiJ.regSRM | XEiJ.regSRI | XEiJ.regCCR, 1);
  7418:     }
  7419:   }  //irpMoveFromSR
  7420: 
  7421:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7422:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  7423:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  7424:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7425:   //CHK.L <ea>,Dq                                   |-|--2346|-|-UUUU|-*UUU|D M+-WXZPI|0100_qqq_100_mmm_rrr
  7426:   public static void irpChkLong () throws M68kException {
  7427:     XEiJ.mpuCycleCount += 2;
  7428:     int ea = XEiJ.regOC & 63;
  7429:     int x = ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS) : mmuReadLongData (efaAnyLong (ea), XEiJ.regSRS);  //pcls。イミディエイトを分離
  7430:     int y = XEiJ.regRn[XEiJ.regOC >> 9 & 7];
  7431:     int z = x - y;
  7432:     XEiJ.regCCR = (XEiJ.regCCR & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z | XEiJ.REG_CCR_V | XEiJ.REG_CCR_C) |
  7433:                    (y < 0 ? XEiJ.REG_CCR_N : 0));
  7434:     if (y < 0 || x < y) {
  7435:       XEiJ.mpuCycleCount += 20 - 19;
  7436:       m60Address = XEiJ.regPC0;  //アドレスは命令の先頭
  7437:       M68kException.m6eNumber = M68kException.M6E_CHK_INSTRUCTION;
  7438:       throw M68kException.m6eSignal;
  7439:     }
  7440:   }  //irpChkLong
  7441: 
  7442:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7443:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  7444:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  7445:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7446:   //CHK.W <ea>,Dq                                   |-|012346|-|-UUUU|-*UUU|D M+-WXZPI|0100_qqq_110_mmm_rrr
  7447:   public static void irpChkWord () throws M68kException {
  7448:     XEiJ.mpuCycleCount += 2;
  7449:     int ea = XEiJ.regOC & 63;
  7450:     int x = ea < XEiJ.EA_AR ? (short) XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) : mmuReadWordSignData (efaAnyWord (ea), XEiJ.regSRS);  //pcws。イミディエイトを分離
  7451:     int y = (short) XEiJ.regRn[XEiJ.regOC >> 9 & 7];
  7452:     int z = (short) (x - y);
  7453:     XEiJ.regCCR = (XEiJ.regCCR & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z | XEiJ.REG_CCR_V | XEiJ.REG_CCR_C) |
  7454:                    (y < 0 ? XEiJ.REG_CCR_N : 0));
  7455:     if (y < 0 || x < y) {
  7456:       XEiJ.mpuCycleCount += 20 - 19;
  7457:       m60Address = XEiJ.regPC0;  //アドレスは命令の先頭
  7458:       M68kException.m6eNumber = M68kException.M6E_CHK_INSTRUCTION;
  7459:       throw M68kException.m6eSignal;
  7460:     }
  7461:   }  //irpChkWord
  7462: 
  7463:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7464:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  7465:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  7466:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7467:   //LEA.L <ea>,Aq                                   |-|012346|-|-----|-----|  M  WXZP |0100_qqq_111_mmm_rrr
  7468:   //EXTB.L Dr                                       |-|--2346|-|-UUUU|-**00|D         |0100_100_111_000_rrr
  7469:   public static void irpLea () throws M68kException {
  7470:     int ea = XEiJ.regOC & 63;
  7471:     if (ea < XEiJ.EA_AR) {  //EXTB.L Dr
  7472:       XEiJ.mpuCycleCount++;
  7473:       int z;
  7474:       XEiJ.regRn[ea] = z = (byte) XEiJ.regRn[ea];
  7475:       XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X);  //ccr_tst
  7476:     } else {  //LEA.L <ea>,Aq
  7477:       XEiJ.mpuCycleCount++;
  7478:       XEiJ.regRn[(XEiJ.regOC >> 9) - (32 - 8)] = efaLeaPea (ea);
  7479:     }
  7480:   }  //irpLea
  7481: 
  7482:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7483:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  7484:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  7485:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7486:   //CLR.B <ea>                                      |-|012346|-|-UUUU|-0100|D M+-WXZ  |0100_001_000_mmm_rrr (68000 and 68008 read before clear)
  7487:   public static void irpClrByte () throws M68kException {
  7488:     int ea = XEiJ.regOC & 63;
  7489:     if (ea < XEiJ.EA_AR) {  //CLR.B Dr
  7490:       XEiJ.mpuCycleCount++;
  7491:       XEiJ.regRn[ea] &= ~0xff;
  7492:     } else {  //CLR.B <mem>
  7493:       XEiJ.mpuCycleCount++;
  7494:       mmuWriteByteData (efaMltByte (ea), 0, XEiJ.regSRS);
  7495:     }
  7496:     XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z;  //ccr_clr
  7497:   }  //irpClrByte
  7498: 
  7499:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7500:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  7501:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  7502:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7503:   //CLR.W <ea>                                      |-|012346|-|-UUUU|-0100|D M+-WXZ  |0100_001_001_mmm_rrr (68000 and 68008 read before clear)
  7504:   public static void irpClrWord () throws M68kException {
  7505:     int ea = XEiJ.regOC & 63;
  7506:     if (ea < XEiJ.EA_AR) {  //CLR.W Dr
  7507:       XEiJ.mpuCycleCount++;
  7508:       XEiJ.regRn[ea] &= ~0xffff;
  7509:     } else {  //CLR.W <mem>
  7510:       XEiJ.mpuCycleCount++;
  7511:       mmuWriteWordData (efaMltWord (ea), 0, XEiJ.regSRS);
  7512:     }
  7513:     XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z;  //ccr_clr
  7514:   }  //irpClrWord
  7515: 
  7516:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7517:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  7518:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  7519:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7520:   //CLR.L <ea>                                      |-|012346|-|-UUUU|-0100|D M+-WXZ  |0100_001_010_mmm_rrr (68000 and 68008 read before clear)
  7521:   public static void irpClrLong () throws M68kException {
  7522:     int ea = XEiJ.regOC & 63;
  7523:     if (ea < XEiJ.EA_AR) {  //CLR.L Dr
  7524:       XEiJ.mpuCycleCount++;
  7525:       XEiJ.regRn[ea] = 0;
  7526:     } else {  //CLR.L <mem>
  7527:       XEiJ.mpuCycleCount++;
  7528:       mmuWriteLongData (efaMltLong (ea), 0, XEiJ.regSRS);
  7529:     }
  7530:     XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z;  //ccr_clr
  7531:   }  //irpClrLong
  7532: 
  7533:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7534:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  7535:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  7536:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7537:   //MOVE.W CCR,<ea>                                 |-|-12346|-|*****|-----|D M+-WXZ  |0100_001_011_mmm_rrr
  7538:   public static void irpMoveFromCCR () throws M68kException {
  7539:     int ea = XEiJ.regOC & 63;
  7540:     if (ea < XEiJ.EA_AR) {  //MOVE.W CCR,Dr
  7541:       XEiJ.mpuCycleCount++;
  7542:       XEiJ.regRn[ea] = ~0xffff & XEiJ.regRn[ea] | XEiJ.regCCR;
  7543:     } else {  //MOVE.W CCR,<mem>
  7544:       XEiJ.mpuCycleCount++;
  7545:       mmuWriteWordData (efaMltWord (ea), XEiJ.regCCR, XEiJ.regSRS);
  7546:     }
  7547:   }  //irpMoveFromCCR
  7548: 
  7549:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7550:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  7551:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  7552:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7553:   //NEG.B <ea>                                      |-|012346|-|UUUUU|*****|D M+-WXZ  |0100_010_000_mmm_rrr
  7554:   public static void irpNegByte () throws M68kException {
  7555:     int ea = XEiJ.regOC & 63;
  7556:     int y;
  7557:     int z;
  7558:     if (ea < XEiJ.EA_AR) {  //NEG.B Dr
  7559:       XEiJ.mpuCycleCount++;
  7560:       z = (byte) (XEiJ.regRn[ea] = ~0xff & (y = XEiJ.regRn[ea]) | 0xff & -(y = (byte) y));
  7561:     } else {  //NEG.B <mem>
  7562:       XEiJ.mpuCycleCount++;
  7563:       int a = efaMltByte (ea);
  7564:       mmuWriteByteData (a, z = (byte) -(y = mmuModifyByteSignData (a, XEiJ.regSRS)), XEiJ.regSRS);
  7565:     }
  7566:     XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) |
  7567:            (y & z) >>> 31 << 1 |
  7568:            (y | z) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C));  //ccr_neg
  7569:   }  //irpNegByte
  7570: 
  7571:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7572:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  7573:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  7574:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7575:   //NEG.W <ea>                                      |-|012346|-|UUUUU|*****|D M+-WXZ  |0100_010_001_mmm_rrr
  7576:   public static void irpNegWord () throws M68kException {
  7577:     int ea = XEiJ.regOC & 63;
  7578:     int y;
  7579:     int z;
  7580:     if (ea < XEiJ.EA_AR) {  //NEG.W Dr
  7581:       XEiJ.mpuCycleCount++;
  7582:       z = (short) (XEiJ.regRn[ea] = ~0xffff & (y = XEiJ.regRn[ea]) | (char) -(y = (short) y));
  7583:     } else {  //NEG.W <mem>
  7584:       XEiJ.mpuCycleCount++;
  7585:       int a = efaMltWord (ea);
  7586:       mmuWriteWordData (a, z = (short) -(y = mmuModifyWordSignData (a, XEiJ.regSRS)), XEiJ.regSRS);
  7587:     }
  7588:     XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) |
  7589:            (y & z) >>> 31 << 1 |
  7590:            (y | z) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C));  //ccr_neg
  7591:   }  //irpNegWord
  7592: 
  7593:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7594:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  7595:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  7596:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7597:   //NEG.L <ea>                                      |-|012346|-|UUUUU|*****|D M+-WXZ  |0100_010_010_mmm_rrr
  7598:   public static void irpNegLong () throws M68kException {
  7599:     int ea = XEiJ.regOC & 63;
  7600:     int y;
  7601:     int z;
  7602:     if (ea < XEiJ.EA_AR) {  //NEG.L Dr
  7603:       XEiJ.mpuCycleCount++;
  7604:       XEiJ.regRn[ea] = z = -(y = XEiJ.regRn[ea]);
  7605:     } else {  //NEG.L <mem>
  7606:       XEiJ.mpuCycleCount++;
  7607:       int a = efaMltLong (ea);
  7608:       mmuWriteLongData (a, z = -(y = mmuModifyLongData (a, XEiJ.regSRS)), XEiJ.regSRS);
  7609:     }
  7610:     XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) |
  7611:            (y & z) >>> 31 << 1 |
  7612:            (y | z) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C));  //ccr_neg
  7613:   }  //irpNegLong
  7614: 
  7615:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7616:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  7617:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  7618:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7619:   //MOVE.W <ea>,CCR                                 |-|012346|-|UUUUU|*****|D M+-WXZPI|0100_010_011_mmm_rrr
  7620:   public static void irpMoveToCCR () throws M68kException {
  7621:     XEiJ.mpuCycleCount++;
  7622:     int ea = XEiJ.regOC & 63;
  7623:     XEiJ.regCCR = XEiJ.REG_CCR_MASK & (ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) : mmuReadWordSignData (efaAnyWord (ea), XEiJ.regSRS));  //pcws。イミディエイトを分離
  7624:   }  //irpMoveToCCR
  7625: 
  7626:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7627:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  7628:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  7629:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7630:   //NOT.B <ea>                                      |-|012346|-|-UUUU|-**00|D M+-WXZ  |0100_011_000_mmm_rrr
  7631:   public static void irpNotByte () throws M68kException {
  7632:     int ea = XEiJ.regOC & 63;
  7633:     int z;
  7634:     if (ea < XEiJ.EA_AR) {  //NOT.B Dr
  7635:       XEiJ.mpuCycleCount++;
  7636:       z = XEiJ.regRn[ea] ^= 255;  //0拡張してからEOR
  7637:     } else {  //NOT.B <mem>
  7638:       XEiJ.mpuCycleCount++;
  7639:       int a = efaMltByte (ea);
  7640:       mmuWriteByteData (a, z = ~mmuModifyByteSignData (a, XEiJ.regSRS), XEiJ.regSRS);
  7641:     }
  7642:     XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & z];  //ccr_tst_byte
  7643:   }  //irpNotByte
  7644: 
  7645:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7646:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  7647:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  7648:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7649:   //NOT.W <ea>                                      |-|012346|-|-UUUU|-**00|D M+-WXZ  |0100_011_001_mmm_rrr
  7650:   public static void irpNotWord () throws M68kException {
  7651:     int ea = XEiJ.regOC & 63;
  7652:     int z;
  7653:     if (ea < XEiJ.EA_AR) {  //NOT.W Dr
  7654:       XEiJ.mpuCycleCount++;
  7655:       z = XEiJ.regRn[ea] ^= 65535;  //0拡張してからEOR
  7656:     } else {  //NOT.W <mem>
  7657:       XEiJ.mpuCycleCount++;
  7658:       int a = efaMltWord (ea);
  7659:       mmuWriteWordData (a, z = ~mmuModifyWordSignData (a, XEiJ.regSRS), XEiJ.regSRS);
  7660:     }
  7661:     XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (char) z - 1 >> 31 & XEiJ.REG_CCR_Z | ((short) z < 0 ? XEiJ.REG_CCR_N : 0);  //ccr_tst_word
  7662:   }  //irpNotWord
  7663: 
  7664:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7665:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  7666:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  7667:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7668:   //NOT.L <ea>                                      |-|012346|-|-UUUU|-**00|D M+-WXZ  |0100_011_010_mmm_rrr
  7669:   public static void irpNotLong () throws M68kException {
  7670:     int ea = XEiJ.regOC & 63;
  7671:     int z;
  7672:     if (ea < XEiJ.EA_AR) {  //NOT.L Dr
  7673:       XEiJ.mpuCycleCount++;
  7674:       z = XEiJ.regRn[ea] ^= 0xffffffff;
  7675:     } else {  //NOT.L <mem>
  7676:       XEiJ.mpuCycleCount++;
  7677:       int a = efaMltLong (ea);
  7678:       mmuWriteLongData (a, z = ~mmuModifyLongData (a, XEiJ.regSRS), XEiJ.regSRS);
  7679:     }
  7680:     XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X);  //ccr_tst
  7681:   }  //irpNotLong
  7682: 
  7683:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7684:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  7685:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  7686:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7687:   //MOVE.W <ea>,SR                                  |-|012346|P|UUUUU|*****|D M+-WXZPI|0100_011_011_mmm_rrr
  7688:   public static void irpMoveToSR () throws M68kException {
  7689:     if (XEiJ.regSRS == 0) {  //ユーザモードのとき
  7690:       M68kException.m6eNumber = M68kException.M6E_PRIVILEGE_VIOLATION;
  7691:       throw M68kException.m6eSignal;
  7692:     }
  7693:     //以下はスーパーバイザモード
  7694:     XEiJ.mpuCycleCount += 12;
  7695:     int ea = XEiJ.regOC & 63;
  7696:     irpSetSR (ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, 1) : mmuReadWordZeroData (efaAnyWord (ea), 1));  //特権違反チェックが先。pcwz。イミディエイトを分離
  7697:   }  //irpMoveToSR
  7698: 
  7699:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7700:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  7701:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  7702:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7703:   //NBCD.B <ea>                                     |-|012346|-|UUUUU|*U*U*|D M+-WXZ  |0100_100_000_mmm_rrr
  7704:   //LINK.L Ar,#<data>                               |-|--2346|-|-----|-----|          |0100_100_000_001_rrr-{data}
  7705:   //
  7706:   //LINK.L Ar,#<data>
  7707:   //  PEA.L (Ar);MOVEA.L A7,Ar;ADDA.L #<data>,A7と同じ
  7708:   //  LINK.L A7,#<data>はA7をデクリメントする前の値がプッシュされ、A7に#<data>が加算される
  7709:   public static void irpNbcd () throws M68kException {
  7710:     int ea = XEiJ.regOC & 63;
  7711:     if (ea < XEiJ.EA_AR) {  //NBCD.B Dr
  7712:       XEiJ.mpuCycleCount++;
  7713:       XEiJ.regRn[ea] = ~0xff & XEiJ.regRn[ea] | irpSbcd (0, XEiJ.regRn[ea]);
  7714:     } else if (ea < XEiJ.EA_MM) {  //LINK.L Ar,#<data>
  7715:       XEiJ.mpuCycleCount += 2;
  7716:       int o = mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS);  //pcls
  7717:       int arr = XEiJ.regOC - (0b0100_100_000_001_000 - 8);
  7718:       //評価順序に注意。LINK.L A7,#<data>のときプッシュするのはA7をデクリメントする前の値。wl(r[15]-=4,r[8+rrr])は不可
  7719:       int a = XEiJ.regRn[arr];
  7720:       m60Incremented -= 4L << (7 << 3);
  7721:       int sp = m60Address = XEiJ.regRn[15] -= 4;
  7722:       mmuWriteLongData (sp, a, XEiJ.regSRS);  //pushl
  7723:       XEiJ.regRn[arr] = sp;
  7724:       XEiJ.regRn[15] = sp + o;
  7725:     } else {  //NBCD.B <mem>
  7726:       XEiJ.mpuCycleCount++;
  7727:       int a = efaMltByte (ea);
  7728:       mmuWriteByteData (a, irpSbcd (0, mmuModifyByteSignData (a, XEiJ.regSRS)), XEiJ.regSRS);
  7729:     }
  7730:   }  //irpNbcd
  7731: 
  7732:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7733:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  7734:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  7735:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7736:   //SWAP.W Dr                                       |-|012346|-|-UUUU|-**00|D         |0100_100_001_000_rrr
  7737:   //BKPT #<data>                                    |-|-12346|-|-----|-----|          |0100_100_001_001_ddd
  7738:   //PEA.L <ea>                                      |-|012346|-|-----|-----|  M  WXZP |0100_100_001_mmm_rrr
  7739:   public static void irpPea () throws M68kException {
  7740:     int ea = XEiJ.regOC & 63;
  7741:     if (ea < XEiJ.EA_AR) {  //SWAP.W Dr
  7742:       XEiJ.mpuCycleCount++;
  7743:       int x;
  7744:       int z;
  7745:       XEiJ.regRn[ea] = z = (x = XEiJ.regRn[ea]) << 16 | x >>> 16;
  7746:       //上位ワードと下位ワードを入れ替えた後のDrをロングでテストする
  7747:       XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X);  //ccr_tst
  7748:     } else {  //PEA.L <ea>
  7749:       XEiJ.mpuCycleCount++;
  7750:       //評価順序に注意。実効アドレスを求めてからspをデクリメントすること
  7751:       int a = efaLeaPea (ea);  //BKPT #<data>はここでillegal instructionになる
  7752:       m60Incremented -= 4L << (7 << 3);
  7753:       int sp = m60Address = XEiJ.regRn[15] -= 4;
  7754:       mmuWriteLongData (sp, a, XEiJ.regSRS);
  7755:     }
  7756:   }  //irpPea
  7757: 
  7758:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7759:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  7760:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  7761:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7762:   //EXT.W Dr                                        |-|012346|-|-UUUU|-**00|D         |0100_100_010_000_rrr
  7763:   //MOVEM.W <list>,<ea>                             |-|012346|-|-----|-----|  M -WXZ  |0100_100_010_mmm_rrr-llllllllllllllll
  7764:   public static void irpMovemToMemWord () throws M68kException {
  7765:     int ea = XEiJ.regOC & 63;
  7766:     if (ea < XEiJ.EA_AR) {  //EXT.W Dr
  7767:       XEiJ.mpuCycleCount++;
  7768:       int z;
  7769:       XEiJ.regRn[ea] = ~0xffff & (z = XEiJ.regRn[ea]) | (char) (z = (byte) z);
  7770:       XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X);  //ccr_tst
  7771:     } else {  //MOVEM.W <list>,<ea>
  7772:       int l = mmuReadWordZeroExword (XEiJ.regPC, XEiJ.regSRS);  //pcwze。レジスタリスト。ゼロ拡張
  7773:       XEiJ.regPC += 2;
  7774:       if (ea >> 3 == XEiJ.MMM_MN) {  //-(Ar)
  7775:         //MOVEM.wl <list>,-(Ar)で<list>にArが含まれているとき、000/010は命令開始時のArを、020/030/040/060は命令開始時のAr-オペレーションサイズをメモリに書き込む
  7776:         //転送するレジスタが0個のときArは変化しない
  7777:         int arr = ea - (XEiJ.EA_MN - 8);
  7778:         m60Incremented -= 2L << (arr << 3);  //longのシフトカウントは6bitでマスクされる
  7779:         int a = m60Address = XEiJ.regRn[arr];
  7780:         XEiJ.regRn[arr] = a - 2;
  7781:         int t = a;
  7782:         if (XEiJ.IRP_MOVEM_EXPAND) {  //16回展開する
  7783:           if ((l & 0x0001) != 0) {
  7784:             mmuWriteWordData (m60Address = a -= 2, XEiJ.regRn[15], XEiJ.regSRS);
  7785:           }
  7786:           if ((l & 0x0002) != 0) {
  7787:             mmuWriteWordData (m60Address = a -= 2, XEiJ.regRn[14], XEiJ.regSRS);
  7788:           }
  7789:           if ((l & 0x0004) != 0) {
  7790:             mmuWriteWordData (m60Address = a -= 2, XEiJ.regRn[13], XEiJ.regSRS);
  7791:           }
  7792:           if ((l & 0x0008) != 0) {
  7793:             mmuWriteWordData (m60Address = a -= 2, XEiJ.regRn[12], XEiJ.regSRS);
  7794:           }
  7795:           if ((l & 0x0010) != 0) {
  7796:             mmuWriteWordData (m60Address = a -= 2, XEiJ.regRn[11], XEiJ.regSRS);
  7797:           }
  7798:           if ((l & 0x0020) != 0) {
  7799:             mmuWriteWordData (m60Address = a -= 2, XEiJ.regRn[10], XEiJ.regSRS);
  7800:           }
  7801:           if ((l & 0x0040) != 0) {
  7802:             mmuWriteWordData (m60Address = a -= 2, XEiJ.regRn[ 9], XEiJ.regSRS);
  7803:           }
  7804:           if ((byte) l < 0) {  //(l & 0x0080) != 0
  7805:             mmuWriteWordData (m60Address = a -= 2, XEiJ.regRn[ 8], XEiJ.regSRS);
  7806:           }
  7807:           if ((l & 0x0100) != 0) {
  7808:             mmuWriteWordData (m60Address = a -= 2, XEiJ.regRn[ 7], XEiJ.regSRS);
  7809:           }
  7810:           if ((l & 0x0200) != 0) {
  7811:             mmuWriteWordData (m60Address = a -= 2, XEiJ.regRn[ 6], XEiJ.regSRS);
  7812:           }
  7813:           if ((l & 0x0400) != 0) {
  7814:             mmuWriteWordData (m60Address = a -= 2, XEiJ.regRn[ 5], XEiJ.regSRS);
  7815:           }
  7816:           if ((l & 0x0800) != 0) {
  7817:             mmuWriteWordData (m60Address = a -= 2, XEiJ.regRn[ 4], XEiJ.regSRS);
  7818:           }
  7819:           if ((l & 0x1000) != 0) {
  7820:             mmuWriteWordData (m60Address = a -= 2, XEiJ.regRn[ 3], XEiJ.regSRS);
  7821:           }
  7822:           if ((l & 0x2000) != 0) {
  7823:             mmuWriteWordData (m60Address = a -= 2, XEiJ.regRn[ 2], XEiJ.regSRS);
  7824:           }
  7825:           if ((l & 0x4000) != 0) {
  7826:             mmuWriteWordData (m60Address = a -= 2, XEiJ.regRn[ 1], XEiJ.regSRS);
  7827:           }
  7828:           if ((short) l < 0) {  //(l & 0x8000) != 0
  7829:             mmuWriteWordData (m60Address = a -= 2, XEiJ.regRn[ 0], XEiJ.regSRS);
  7830:           }
  7831:         } else if (XEiJ.IRP_MOVEM_LOOP) {  //16回ループする。コンパイラが展開する
  7832:           for (int i = 15; i >= 0; i--) {
  7833:             if ((l & 0x8000 >>> i) != 0) {
  7834:               mmuWriteWordData (m60Address = a -= 2, XEiJ.regRn[i], XEiJ.regSRS);
  7835:             }
  7836:           }
  7837:         } else if (XEiJ.IRP_MOVEM_SHIFT_LEFT) {  //0になるまで左にシフトする
  7838:           l = XEiJ.MPU_BITREV_TABLE_0[l & 2047] | XEiJ.MPU_BITREV_TABLE_1[l << 10 >>> 21];  //Integer.reverse(l)
  7839:           for (int i = 15; l != 0; i--, l <<= 1) {
  7840:             if (l < 0) {
  7841:               mmuWriteWordData (m60Address = a -= 2, XEiJ.regRn[i], XEiJ.regSRS);
  7842:             }
  7843:           }
  7844:         } else if (XEiJ.IRP_MOVEM_SHIFT_RIGHT) {  //0になるまで右にシフトする
  7845:           for (int i = 15; l != 0; i--, l >>>= 1) {
  7846:             if ((l & 1) != 0) {
  7847:               mmuWriteWordData (m60Address = a -= 2, XEiJ.regRn[i], XEiJ.regSRS);
  7848:             }
  7849:           }
  7850:         } else if (XEiJ.IRP_MOVEM_ZEROS) {  //Integer.numberOfTrailingZerosを使う
  7851:           for (int i = 15; l != 0; ) {
  7852:             int k = Integer.numberOfTrailingZeros (l);
  7853:             mmuWriteWordData (m60Address = a -= 2, XEiJ.regRn[i -= k], XEiJ.regSRS);
  7854:             l = l >>> k & ~1;
  7855:           }
  7856:         }
  7857:         m60Incremented += 2L << (arr << 3);  //元に戻しておく。longのシフトカウントは6bitでマスクされる
  7858:         XEiJ.regRn[arr] = a;
  7859:         XEiJ.mpuCycleCount += t - a >> 1;  //2バイト/個→1サイクル/個
  7860:       } else {  //-(Ar)以外
  7861:         int a = efaCltWord (ea);
  7862:         int t = a;
  7863:         if (XEiJ.IRP_MOVEM_EXPAND) {  //16回展開する
  7864:           if ((l & 0x0001) != 0) {
  7865:             mmuWriteWordData (m60Address = a, XEiJ.regRn[ 0], XEiJ.regSRS);
  7866:             a += 2;
  7867:           }
  7868:           if ((l & 0x0002) != 0) {
  7869:             mmuWriteWordData (m60Address = a, XEiJ.regRn[ 1], XEiJ.regSRS);
  7870:             a += 2;
  7871:           }
  7872:           if ((l & 0x0004) != 0) {
  7873:             mmuWriteWordData (m60Address = a, XEiJ.regRn[ 2], XEiJ.regSRS);
  7874:             a += 2;
  7875:           }
  7876:           if ((l & 0x0008) != 0) {
  7877:             mmuWriteWordData (m60Address = a, XEiJ.regRn[ 3], XEiJ.regSRS);
  7878:             a += 2;
  7879:           }
  7880:           if ((l & 0x0010) != 0) {
  7881:             mmuWriteWordData (m60Address = a, XEiJ.regRn[ 4], XEiJ.regSRS);
  7882:             a += 2;
  7883:           }
  7884:           if ((l & 0x0020) != 0) {
  7885:             mmuWriteWordData (m60Address = a, XEiJ.regRn[ 5], XEiJ.regSRS);
  7886:             a += 2;
  7887:           }
  7888:           if ((l & 0x0040) != 0) {
  7889:             mmuWriteWordData (m60Address = a, XEiJ.regRn[ 6], XEiJ.regSRS);
  7890:             a += 2;
  7891:           }
  7892:           if ((byte) l < 0) {  //(l & 0x0080) != 0
  7893:             mmuWriteWordData (m60Address = a, XEiJ.regRn[ 7], XEiJ.regSRS);
  7894:             a += 2;
  7895:           }
  7896:           if ((l & 0x0100) != 0) {
  7897:             mmuWriteWordData (m60Address = a, XEiJ.regRn[ 8], XEiJ.regSRS);
  7898:             a += 2;
  7899:           }
  7900:           if ((l & 0x0200) != 0) {
  7901:             mmuWriteWordData (m60Address = a, XEiJ.regRn[ 9], XEiJ.regSRS);
  7902:             a += 2;
  7903:           }
  7904:           if ((l & 0x0400) != 0) {
  7905:             mmuWriteWordData (m60Address = a, XEiJ.regRn[10], XEiJ.regSRS);
  7906:             a += 2;
  7907:           }
  7908:           if ((l & 0x0800) != 0) {
  7909:             mmuWriteWordData (m60Address = a, XEiJ.regRn[11], XEiJ.regSRS);
  7910:             a += 2;
  7911:           }
  7912:           if ((l & 0x1000) != 0) {
  7913:             mmuWriteWordData (m60Address = a, XEiJ.regRn[12], XEiJ.regSRS);
  7914:             a += 2;
  7915:           }
  7916:           if ((l & 0x2000) != 0) {
  7917:             mmuWriteWordData (m60Address = a, XEiJ.regRn[13], XEiJ.regSRS);
  7918:             a += 2;
  7919:           }
  7920:           if ((l & 0x4000) != 0) {
  7921:             mmuWriteWordData (m60Address = a, XEiJ.regRn[14], XEiJ.regSRS);
  7922:             a += 2;
  7923:           }
  7924:           if ((short) l < 0) {  //(l & 0x8000) != 0
  7925:             mmuWriteWordData (m60Address = a, XEiJ.regRn[15], XEiJ.regSRS);
  7926:             a += 2;
  7927:           }
  7928:         } else if (XEiJ.IRP_MOVEM_LOOP) {  //16回ループする。コンパイラが展開する
  7929:           for (int i = 0; i <= 15; i++) {
  7930:             if ((l & 0x0001 << i) != 0) {
  7931:               mmuWriteWordData (m60Address = a, XEiJ.regRn[i], XEiJ.regSRS);
  7932:               a += 2;
  7933:             }
  7934:           }
  7935:         } else if (XEiJ.IRP_MOVEM_SHIFT_LEFT) {  //0になるまで左にシフトする
  7936:           l = XEiJ.MPU_BITREV_TABLE_0[l & 2047] | XEiJ.MPU_BITREV_TABLE_1[l << 10 >>> 21];  //Integer.reverse(l)
  7937:           for (int i = 0; l != 0; i++, l <<= 1) {
  7938:             if (l < 0) {
  7939:               mmuWriteWordData (m60Address = a, XEiJ.regRn[i], XEiJ.regSRS);
  7940:               a += 2;
  7941:             }
  7942:           }
  7943:         } else if (XEiJ.IRP_MOVEM_SHIFT_RIGHT) {  //0になるまで右にシフトする
  7944:           for (int i = 0; l != 0; i++, l >>>= 1) {
  7945:             if ((l & 1) != 0) {
  7946:               mmuWriteWordData (m60Address = a, XEiJ.regRn[i], XEiJ.regSRS);
  7947:               a += 2;
  7948:             }
  7949:           }
  7950:         } else if (XEiJ.IRP_MOVEM_ZEROS) {  //Integer.numberOfTrailingZerosを使う
  7951:           for (int i = 0; l != 0; ) {
  7952:             int k = Integer.numberOfTrailingZeros (l);
  7953:             mmuWriteWordData (m60Address = a, XEiJ.regRn[i += k], XEiJ.regSRS);
  7954:             a += 2;
  7955:             l = l >>> k & ~1;
  7956:           }
  7957:         }
  7958:         XEiJ.mpuCycleCount += a - t >> 1;  //2バイト/個→1サイクル/個
  7959:       }
  7960:     }
  7961:   }  //irpMovemToMemWord
  7962: 
  7963:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7964:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  7965:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  7966:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7967:   //EXT.L Dr                                        |-|012346|-|-UUUU|-**00|D         |0100_100_011_000_rrr
  7968:   //MOVEM.L <list>,<ea>                             |-|012346|-|-----|-----|  M -WXZ  |0100_100_011_mmm_rrr-llllllllllllllll
  7969:   public static void irpMovemToMemLong () throws M68kException {
  7970:     int ea = XEiJ.regOC & 63;
  7971:     if (ea < XEiJ.EA_AR) {  //EXT.L Dr
  7972:       XEiJ.mpuCycleCount++;
  7973:       int z;
  7974:       XEiJ.regRn[ea] = z = (short) XEiJ.regRn[ea];
  7975:       XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X);  //ccr_tst
  7976:     } else {  //MOVEM.L <list>,<ea>
  7977:       int l = mmuReadWordZeroExword (XEiJ.regPC, XEiJ.regSRS);  //pcwze。レジスタリスト。ゼロ拡張
  7978:       XEiJ.regPC += 2;
  7979:       if (ea >> 3 == XEiJ.MMM_MN) {  //-(Ar)
  7980:         //MOVEM.wl <list>,-(Ar)で<list>にArが含まれているとき、000/010は命令開始時のArを、020/030/040/060は命令開始時のAr-オペレーションサイズをメモリに書き込む
  7981:         //転送するレジスタが0個のときArは変化しない
  7982:         int arr = ea - (XEiJ.EA_MN - 8);
  7983:         m60Incremented -= 4L << (arr << 3);  //longのシフトカウントは6bitでマスクされる
  7984:         int a = m60Address = XEiJ.regRn[arr];
  7985:         XEiJ.regRn[arr] = a - 4;
  7986:         int t = a;
  7987:         if (XEiJ.IRP_MOVEM_EXPAND) {  //16回展開する
  7988:           if ((l & 0x0001) != 0) {
  7989:             mmuWriteLongData (m60Address = a -= 4, XEiJ.regRn[15], XEiJ.regSRS);
  7990:           }
  7991:           if ((l & 0x0002) != 0) {
  7992:             mmuWriteLongData (m60Address = a -= 4, XEiJ.regRn[14], XEiJ.regSRS);
  7993:           }
  7994:           if ((l & 0x0004) != 0) {
  7995:             mmuWriteLongData (m60Address = a -= 4, XEiJ.regRn[13], XEiJ.regSRS);
  7996:           }
  7997:           if ((l & 0x0008) != 0) {
  7998:             mmuWriteLongData (m60Address = a -= 4, XEiJ.regRn[12], XEiJ.regSRS);
  7999:           }
  8000:           if ((l & 0x0010) != 0) {
  8001:             mmuWriteLongData (m60Address = a -= 4, XEiJ.regRn[11], XEiJ.regSRS);
  8002:           }
  8003:           if ((l & 0x0020) != 0) {
  8004:             mmuWriteLongData (m60Address = a -= 4, XEiJ.regRn[10], XEiJ.regSRS);
  8005:           }
  8006:           if ((l & 0x0040) != 0) {
  8007:             mmuWriteLongData (m60Address = a -= 4, XEiJ.regRn[ 9], XEiJ.regSRS);
  8008:           }
  8009:           if ((byte) l < 0) {  //(l & 0x0080) != 0
  8010:             mmuWriteLongData (m60Address = a -= 4, XEiJ.regRn[ 8], XEiJ.regSRS);
  8011:           }
  8012:           if ((l & 0x0100) != 0) {
  8013:             mmuWriteLongData (m60Address = a -= 4, XEiJ.regRn[ 7], XEiJ.regSRS);
  8014:           }
  8015:           if ((l & 0x0200) != 0) {
  8016:             mmuWriteLongData (m60Address = a -= 4, XEiJ.regRn[ 6], XEiJ.regSRS);
  8017:           }
  8018:           if ((l & 0x0400) != 0) {
  8019:             mmuWriteLongData (m60Address = a -= 4, XEiJ.regRn[ 5], XEiJ.regSRS);
  8020:           }
  8021:           if ((l & 0x0800) != 0) {
  8022:             mmuWriteLongData (m60Address = a -= 4, XEiJ.regRn[ 4], XEiJ.regSRS);
  8023:           }
  8024:           if ((l & 0x1000) != 0) {
  8025:             mmuWriteLongData (m60Address = a -= 4, XEiJ.regRn[ 3], XEiJ.regSRS);
  8026:           }
  8027:           if ((l & 0x2000) != 0) {
  8028:             mmuWriteLongData (m60Address = a -= 4, XEiJ.regRn[ 2], XEiJ.regSRS);
  8029:           }
  8030:           if ((l & 0x4000) != 0) {
  8031:             mmuWriteLongData (m60Address = a -= 4, XEiJ.regRn[ 1], XEiJ.regSRS);
  8032:           }
  8033:           if ((short) l < 0) {  //(l & 0x8000) != 0
  8034:             mmuWriteLongData (m60Address = a -= 4, XEiJ.regRn[ 0], XEiJ.regSRS);
  8035:           }
  8036:         } else if (XEiJ.IRP_MOVEM_LOOP) {  //16回ループする。コンパイラが展開する
  8037:           for (int i = 15; i >= 0; i--) {
  8038:             if ((l & 0x8000 >>> i) != 0) {
  8039:               mmuWriteLongData (m60Address = a -= 4, XEiJ.regRn[i], XEiJ.regSRS);
  8040:             }
  8041:           }
  8042:         } else if (XEiJ.IRP_MOVEM_SHIFT_LEFT) {  //0になるまで左にシフトする
  8043:           l = XEiJ.MPU_BITREV_TABLE_0[l & 2047] | XEiJ.MPU_BITREV_TABLE_1[l << 10 >>> 21];  //Integer.reverse(l)
  8044:           for (int i = 15; l != 0; i--, l <<= 1) {
  8045:             if (l < 0) {
  8046:               mmuWriteLongData (m60Address = a -= 4, XEiJ.regRn[i], XEiJ.regSRS);
  8047:             }
  8048:           }
  8049:         } else if (XEiJ.IRP_MOVEM_SHIFT_RIGHT) {  //0になるまで右にシフトする
  8050:           for (int i = 15; l != 0; i--, l >>>= 1) {
  8051:             if ((l & 1) != 0) {
  8052:               mmuWriteLongData (m60Address = a -= 4, XEiJ.regRn[i], XEiJ.regSRS);
  8053:             }
  8054:           }
  8055:         } else if (XEiJ.IRP_MOVEM_ZEROS) {  //Integer.numberOfTrailingZerosを使う
  8056:           for (int i = 15; l != 0; ) {
  8057:             int k = Integer.numberOfTrailingZeros (l);
  8058:             mmuWriteLongData (m60Address = a -= 4, XEiJ.regRn[i -= k], XEiJ.regSRS);
  8059:             l = l >>> k & ~1;
  8060:           }
  8061:         }
  8062:         m60Incremented += 4L << (arr << 3);  //元に戻しておく。longのシフトカウントは6bitでマスクされる
  8063:         XEiJ.regRn[arr] = a;
  8064:         XEiJ.mpuCycleCount += t - a >> 2;  //4バイト/個→1サイクル/個
  8065:       } else {  //-(Ar)以外
  8066:         int a = efaCltLong (ea);
  8067:         int t = a;
  8068:         if (XEiJ.IRP_MOVEM_EXPAND) {  //16回展開する
  8069:           if ((l & 0x0001) != 0) {
  8070:             mmuWriteLongData (m60Address = a, XEiJ.regRn[ 0], XEiJ.regSRS);
  8071:             a += 4;
  8072:           }
  8073:           if ((l & 0x0002) != 0) {
  8074:             mmuWriteLongData (m60Address = a, XEiJ.regRn[ 1], XEiJ.regSRS);
  8075:             a += 4;
  8076:           }
  8077:           if ((l & 0x0004) != 0) {
  8078:             mmuWriteLongData (m60Address = a, XEiJ.regRn[ 2], XEiJ.regSRS);
  8079:             a += 4;
  8080:           }
  8081:           if ((l & 0x0008) != 0) {
  8082:             mmuWriteLongData (m60Address = a, XEiJ.regRn[ 3], XEiJ.regSRS);
  8083:             a += 4;
  8084:           }
  8085:           if ((l & 0x0010) != 0) {
  8086:             mmuWriteLongData (m60Address = a, XEiJ.regRn[ 4], XEiJ.regSRS);
  8087:             a += 4;
  8088:           }
  8089:           if ((l & 0x0020) != 0) {
  8090:             mmuWriteLongData (m60Address = a, XEiJ.regRn[ 5], XEiJ.regSRS);
  8091:             a += 4;
  8092:           }
  8093:           if ((l & 0x0040) != 0) {
  8094:             mmuWriteLongData (m60Address = a, XEiJ.regRn[ 6], XEiJ.regSRS);
  8095:             a += 4;
  8096:           }
  8097:           if ((byte) l < 0) {  //(l & 0x0080) != 0
  8098:             mmuWriteLongData (m60Address = a, XEiJ.regRn[ 7], XEiJ.regSRS);
  8099:             a += 4;
  8100:           }
  8101:           if ((l & 0x0100) != 0) {
  8102:             mmuWriteLongData (m60Address = a, XEiJ.regRn[ 8], XEiJ.regSRS);
  8103:             a += 4;
  8104:           }
  8105:           if ((l & 0x0200) != 0) {
  8106:             mmuWriteLongData (m60Address = a, XEiJ.regRn[ 9], XEiJ.regSRS);
  8107:             a += 4;
  8108:           }
  8109:           if ((l & 0x0400) != 0) {
  8110:             mmuWriteLongData (m60Address = a, XEiJ.regRn[10], XEiJ.regSRS);
  8111:             a += 4;
  8112:           }
  8113:           if ((l & 0x0800) != 0) {
  8114:             mmuWriteLongData (m60Address = a, XEiJ.regRn[11], XEiJ.regSRS);
  8115:             a += 4;
  8116:           }
  8117:           if ((l & 0x1000) != 0) {
  8118:             mmuWriteLongData (m60Address = a, XEiJ.regRn[12], XEiJ.regSRS);
  8119:             a += 4;
  8120:           }
  8121:           if ((l & 0x2000) != 0) {
  8122:             mmuWriteLongData (m60Address = a, XEiJ.regRn[13], XEiJ.regSRS);
  8123:             a += 4;
  8124:           }
  8125:           if ((l & 0x4000) != 0) {
  8126:             mmuWriteLongData (m60Address = a, XEiJ.regRn[14], XEiJ.regSRS);
  8127:             a += 4;
  8128:           }
  8129:           if ((short) l < 0) {  //(l & 0x8000) != 0
  8130:             mmuWriteLongData (m60Address = a, XEiJ.regRn[15], XEiJ.regSRS);
  8131:             a += 4;
  8132:           }
  8133:         } else if (XEiJ.IRP_MOVEM_LOOP) {  //16回ループする。コンパイラが展開する
  8134:           for (int i = 0; i <= 15; i++) {
  8135:             if ((l & 0x0001 << i) != 0) {
  8136:               mmuWriteLongData (m60Address = a, XEiJ.regRn[i], XEiJ.regSRS);
  8137:               a += 4;
  8138:             }
  8139:           }
  8140:         } else if (XEiJ.IRP_MOVEM_SHIFT_LEFT) {  //0になるまで左にシフトする
  8141:           l = XEiJ.MPU_BITREV_TABLE_0[l & 2047] | XEiJ.MPU_BITREV_TABLE_1[l << 10 >>> 21];  //Integer.reverse(l)
  8142:           for (int i = 0; l != 0; i++, l <<= 1) {
  8143:             if (l < 0) {
  8144:               mmuWriteLongData (m60Address = a, XEiJ.regRn[i], XEiJ.regSRS);
  8145:               a += 4;
  8146:             }
  8147:           }
  8148:         } else if (XEiJ.IRP_MOVEM_SHIFT_RIGHT) {  //0になるまで右にシフトする
  8149:           for (int i = 0; l != 0; i++, l >>>= 1) {
  8150:             if ((l & 1) != 0) {
  8151:               mmuWriteLongData (m60Address = a, XEiJ.regRn[i], XEiJ.regSRS);
  8152:               a += 4;
  8153:             }
  8154:           }
  8155:         } else if (XEiJ.IRP_MOVEM_ZEROS) {  //Integer.numberOfTrailingZerosを使う
  8156:           for (int i = 0; l != 0; ) {
  8157:             int k = Integer.numberOfTrailingZeros (l);
  8158:             mmuWriteLongData (m60Address = a, XEiJ.regRn[i += k], XEiJ.regSRS);
  8159:             a += 4;
  8160:             l = l >>> k & ~1;
  8161:           }
  8162:         }
  8163:         XEiJ.mpuCycleCount += a - t >> 2;  //4バイト/個→1サイクル/個
  8164:       }
  8165:     }
  8166:   }  //irpMovemToMemLong
  8167: 
  8168:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  8169:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  8170:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  8171:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  8172:   //TST.B <ea>                                      |-|012346|-|-UUUU|-**00|D M+-WXZ  |0100_101_000_mmm_rrr
  8173:   //TST.B <ea>                                      |-|--2346|-|-UUUU|-**00|        PI|0100_101_000_mmm_rrr
  8174:   public static void irpTstByte () throws M68kException {
  8175:     XEiJ.mpuCycleCount++;
  8176:     int ea = XEiJ.regOC & 63;
  8177:     XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & (ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadByteSignExword ((XEiJ.regPC += 2) - 1, XEiJ.regSRS) : mmuReadByteSignData (efaAnyByte (ea), XEiJ.regSRS))];  //ccr_tst_byte。pcbs。イミディエイトを分離。アドレッシングモードに注意
  8178:   }  //irpTstByte
  8179: 
  8180:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  8181:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  8182:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  8183:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  8184:   //TST.W <ea>                                      |-|012346|-|-UUUU|-**00|D M+-WXZ  |0100_101_001_mmm_rrr
  8185:   //TST.W <ea>                                      |-|--2346|-|-UUUU|-**00| A      PI|0100_101_001_mmm_rrr
  8186:   public static void irpTstWord () throws M68kException {
  8187:     XEiJ.mpuCycleCount++;
  8188:     int ea = XEiJ.regOC & 63;
  8189:     int z = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) : mmuReadWordSignData (efaAnyWord (ea), XEiJ.regSRS);  //pcws。イミディエイトを分離。アドレッシングモードに注意。このr[ea]はデータレジスタまたはアドレスレジスタ
  8190:     XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (char) z - 1 >> 31 & XEiJ.REG_CCR_Z | ((short) z < 0 ? XEiJ.REG_CCR_N : 0);  //ccr_tst_word
  8191:   }  //irpTstWord
  8192: 
  8193:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  8194:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  8195:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  8196:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  8197:   //TST.L <ea>                                      |-|012346|-|-UUUU|-**00|D M+-WXZ  |0100_101_010_mmm_rrr
  8198:   //TST.L <ea>                                      |-|--2346|-|-UUUU|-**00| A      PI|0100_101_010_mmm_rrr
  8199:   public static void irpTstLong () throws M68kException {
  8200:     XEiJ.mpuCycleCount++;
  8201:     int ea = XEiJ.regOC & 63;
  8202:     int z = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS) : mmuReadLongData (efaAnyLong (ea), XEiJ.regSRS);  //pcls。イミディエイトを分離。アドレッシングモードに注意。このr[ea]はデータレジスタまたはアドレスレジスタ
  8203:     XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X);  //ccr_tst
  8204:   }  //irpTstLong
  8205: 
  8206:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  8207:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  8208:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  8209:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  8210:   //TAS.B <ea>                                      |-|012346|-|-UUUU|-**00|D M+-WXZ  |0100_101_011_mmm_rrr
  8211:   //ILLEGAL                                         |-|012346|-|-----|-----|          |0100_101_011_111_100
  8212:   public static void irpTas () throws M68kException {
  8213:     int ea = XEiJ.regOC & 63;
  8214:     int z;
  8215:     if (ea < XEiJ.EA_AR) {  //TAS.B Dr
  8216:       XEiJ.mpuCycleCount++;
  8217:       XEiJ.regRn[ea] = 0x80 | (z = XEiJ.regRn[ea]);
  8218:     } else {  //TAS.B <mem>
  8219:       XEiJ.mpuCycleCount += 17;
  8220:       int a = efaMltByte (ea);
  8221:       mmuWriteByteData (a, 0x80 | (z = mmuModifyByteSignData (a, XEiJ.regSRS)), XEiJ.regSRS);
  8222:     }
  8223:     XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & z];  //ccr_tst_byte
  8224:   }  //irpTas
  8225: 
  8226:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  8227:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  8228:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  8229:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  8230:   //MULU.L <ea>,Dl                                  |-|--2346|-|-UUUU|-***0|D M+-WXZPI|0100_110_000_mmm_rrr-0lll000000000hhh        (h is not used)
  8231:   //MULU.L <ea>,Dh:Dl                               |-|--234S|-|-UUUU|-***0|D M+-WXZPI|0100_110_000_mmm_rrr-0lll010000000hhh        (if h=l then result is not defined)
  8232:   //MULS.L <ea>,Dl                                  |-|--2346|-|-UUUU|-***0|D M+-WXZPI|0100_110_000_mmm_rrr-0lll100000000hhh        (h is not used)
  8233:   //MULS.L <ea>,Dh:Dl                               |-|--234S|-|-UUUU|-***0|D M+-WXZPI|0100_110_000_mmm_rrr-0lll110000000hhh        (if h=l then result is not defined)
  8234:   public static void irpMuluMulsLong () throws M68kException {
  8235:     int w = mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);  //pcwz。拡張ワード
  8236:     if ((w & ~0b0111_110_000_000_111) != 0) {
  8237:       M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION;
  8238:       throw M68kException.m6eSignal;
  8239:     }
  8240:     if ((w & 0b0000_010_000_000_000) != 0) {  //64bit積
  8241:       M68kException.m6eNumber = M68kException.M6E_UNIMPLEMENTED_INSTRUCTION;
  8242:       throw M68kException.m6eSignal;
  8243:     }
  8244:     //32bit積
  8245:     int s = w & 0b0000_100_000_000_000;  //0=MULU,1=MULS
  8246:     int l = w >> 12;  //被乗数,積
  8247:     XEiJ.mpuCycleCount += 2;
  8248:     int ea = XEiJ.regOC & 63;
  8249:     long yy = (long) (ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS) : mmuReadLongData (efaAnyLong (ea), XEiJ.regSRS));  //pcls。イミディエイトを分離
  8250:     long xx = (long) XEiJ.regRn[l];
  8251:     if (s == 0) {  //MULU
  8252:       long zz = (0xffffffffL & xx) * (0xffffffffL & yy);
  8253:       int z = XEiJ.regRn[l] = (int) zz;
  8254:       XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | (zz >>> 32 != 0L ? XEiJ.REG_CCR_V : 0);
  8255:     } else {  //MULS
  8256:       long zz = xx * yy;
  8257:       int z = XEiJ.regRn[l] = (int) zz;
  8258:       XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | (z != zz ? XEiJ.REG_CCR_V : 0);
  8259:     }
  8260:   }  //irpMuluMulsLong
  8261: 
  8262:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  8263:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  8264:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  8265:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  8266:   //DIVU.L <ea>,Dq                                  |-|--2346|-|-UUUU|-***0|D M+-WXZPI|0100_110_001_mmm_rrr-0qqq000000000qqq
  8267:   //DIVUL.L <ea>,Dr:Dq                              |-|--2346|-|-UUUU|-***0|D M+-WXZPI|0100_110_001_mmm_rrr-0qqq000000000rrr        (q is not equal to r)
  8268:   //DIVU.L <ea>,Dr:Dq                               |-|--234S|-|-UUUU|-***0|D M+-WXZPI|0100_110_001_mmm_rrr-0qqq010000000rrr        (q is not equal to r)
  8269:   //DIVS.L <ea>,Dq                                  |-|--2346|-|-UUUU|-***0|D M+-WXZPI|0100_110_001_mmm_rrr-0qqq100000000qqq
  8270:   //DIVSL.L <ea>,Dr:Dq                              |-|--2346|-|-UUUU|-***0|D M+-WXZPI|0100_110_001_mmm_rrr-0qqq100000000rrr        (q is not equal to r)
  8271:   //DIVS.L <ea>,Dr:Dq                               |-|--234S|-|-UUUU|-***0|D M+-WXZPI|0100_110_001_mmm_rrr-0qqq110000000rrr        (q is not equal to r)
  8272:   //
  8273:   //DIVS.L <ea>,Dq
  8274:   //  32bit被除数Dq/32bit除数<ea>→32bit商Dq
  8275:   //
  8276:   //DIVS.L <ea>,Dr:Dq
  8277:   //  64bit被除数Dr:Dq/32bit除数<ea>→32bit余りDr:32bit商Dq
  8278:   //  M68000PRMでDIVS.Lのアドレッシングモードがデータ可変と書かれているのはデータの間違い
  8279:   //
  8280:   //DIVSL.L <ea>,Dr:Dq
  8281:   //  32bit被除数Dq/32bit除数<ea>→32bit余りDr:32bit商Dq
  8282:   //
  8283:   //DIVU.L <ea>,Dq
  8284:   //  32bit被除数Dq/32bit除数<ea>→32bit商Dq
  8285:   //
  8286:   //DIVU.L <ea>,Dr:Dq
  8287:   //  64bit被除数Dr:Dq/32bit除数<ea>→32bit余りDr:32bit商Dq
  8288:   //
  8289:   //DIVUL.L <ea>,Dr:Dq
  8290:   //  32bit被除数Dq/32bit除数<ea>→32bit余りDr:32bit商Dq
  8291:   public static void irpDivuDivsLong () throws M68kException {
  8292:     int w = mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);  //pcwz。拡張ワード
  8293:     if ((w & ~0b0111_110_000_000_111) != 0) {
  8294:       M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION;
  8295:       throw M68kException.m6eSignal;
  8296:     }
  8297:     if ((w & 0b0000_010_000_000_000) != 0) {  //64bit被除数
  8298:       M68kException.m6eNumber = M68kException.M6E_UNIMPLEMENTED_INSTRUCTION;
  8299:       throw M68kException.m6eSignal;
  8300:     }
  8301:     //32bit被除数
  8302:     int s = w & 0b0000_100_000_000_000;  //0=DIVU,1=DIVS
  8303:     int h = w & 7;  //余り
  8304:     int l = w >> 12;  //被除数,商
  8305:     int ea = XEiJ.regOC & 63;
  8306:     int y = ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS) : mmuReadLongData (efaAnyLong (ea), XEiJ.regSRS);  //除数。pcls。イミディエイトを分離
  8307:     if (s == 0) {  //符号なし。DIVU.L <ea>,*
  8308:       XEiJ.mpuCycleCount += 38;  //最大
  8309:       long yy = (long) y & 0xffffffffL;  //除数
  8310:       if (y == 0) {  //ゼロ除算
  8311:         XEiJ.regCCR = (XEiJ.regCCR & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_N | XEiJ.REG_CCR_Z | XEiJ.REG_CCR_V)  //XとNとZとVは変化しない
  8312:                        );  //Cは常にクリア
  8313:         XEiJ.mpuCycleCount += 38 - 34;
  8314:         m60Address = XEiJ.regPC0;  //アドレスは命令の先頭
  8315:         M68kException.m6eNumber = M68kException.M6E_DIVIDE_BY_ZERO;
  8316:         throw M68kException.m6eSignal;
  8317:       }  //if ゼロ除算
  8318:       long xx = (long) XEiJ.regRn[l] & 0xffffffffL;  //被除数
  8319:       long zz = (long) ((double) xx / (double) yy);  //double→intのキャストは飽和変換で0xffffffff/0x00000001が0x7fffffffになってしまうのでdouble→longとする
  8320:       int z = XEiJ.regRn[l] = (int) zz;  //商
  8321:       if (h != l) {
  8322:         XEiJ.regRn[h] = (int) (xx - yy * zz);  //余り
  8323:       }
  8324:       XEiJ.regCCR = (XEiJ.regCCR & XEiJ.REG_CCR_X |  //Xは変化しない
  8325:                      (z < 0 ? XEiJ.REG_CCR_N : 0) |  //Nは商が負のときセット、さもなくばクリア
  8326:                      (z == 0 ? XEiJ.REG_CCR_Z : 0)  //Zは商が0のときセット、さもなくばクリア
  8327:                      );  //VとCは常にクリア
  8328:     } else {  //符号あり。DIVS.L <ea>,*
  8329:       XEiJ.mpuCycleCount += 38;  //最大
  8330:       long yy = (long) y;  //除数
  8331:       if (y == 0) {  //ゼロ除算
  8332:         XEiJ.regCCR = (XEiJ.regCCR & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_N | XEiJ.REG_CCR_Z | XEiJ.REG_CCR_V)  //XとNとZとVは変化しない
  8333:                        );  //Cは常にクリア
  8334:         XEiJ.mpuCycleCount += 38 - 34;
  8335:         m60Address = XEiJ.regPC0;  //アドレスは命令の先頭
  8336:         M68kException.m6eNumber = M68kException.M6E_DIVIDE_BY_ZERO;
  8337:         throw M68kException.m6eSignal;
  8338:       }  //if ゼロ除算
  8339:       long xx = (long) XEiJ.regRn[l];  //被除数
  8340:       long zz = xx / yy;  //商
  8341:       if ((int) zz != zz) {  //オーバーフローあり
  8342:         //Dqは変化しない
  8343:         XEiJ.regCCR = (XEiJ.regCCR & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_N | XEiJ.REG_CCR_Z) |  //XとNとZは変化しない
  8344:                        XEiJ.REG_CCR_V  //Vは常にセット
  8345:                        );  //Cは常にクリア
  8346:       } else {  //オーバーフローなし
  8347:         int z = XEiJ.regRn[l] = (int) zz;  //商
  8348:         if (h != l) {  //DIVSL.L <ea>,Dr:Dq
  8349:           XEiJ.regRn[h] = (int) (xx - yy * zz);  //余り
  8350:         }
  8351:         XEiJ.regCCR = (XEiJ.regCCR & XEiJ.REG_CCR_X |  //Xは変化しない
  8352:                        (z < 0 ? XEiJ.REG_CCR_N : 0) |  //Nは商が負のときセット、さもなくばクリア
  8353:                        (z == 0 ? XEiJ.REG_CCR_Z : 0)  //Zは商が0のときセット、さもなくばクリア
  8354:                        );  //VとCは常にクリア
  8355:       }  //if オーバーフローあり/オーバーフローなし
  8356:     }  //if 符号なし/符号あり
  8357:   }  //irpDivuDivsLong
  8358: 
  8359:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  8360:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  8361:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  8362:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  8363:   //SATS.L Dr                                       |-|------|-|-UUUU|-**00|D         |0100_110_010_000_rrr (ISA_B)
  8364:   //MOVEM.W <ea>,<list>                             |-|012346|-|-----|-----|  M+ WXZP |0100_110_010_mmm_rrr-llllllllllllllll
  8365:   //
  8366:   //SATS.L Dr
  8367:   //  VがセットされていたらDrを符号が逆で絶対値が最大の値にする(直前のDrに対する演算を飽和演算にする)
  8368:   public static void irpMovemToRegWord () throws M68kException {
  8369:     int ea = XEiJ.regOC & 63;
  8370:     if (ea < XEiJ.EA_AR) {  //SATS.L Dr
  8371:       XEiJ.mpuCycleCount++;
  8372:       int z = XEiJ.regRn[ea];
  8373:       if (XEiJ.TEST_BIT_1_SHIFT ? XEiJ.regCCR << 31 - 1 < 0 : (XEiJ.regCCR & XEiJ.REG_CCR_V) != 0) {  //Vがセットされているとき
  8374:         XEiJ.regRn[ea] = z = z >> 31 ^ 0x80000000;  //符号が逆で絶対値が最大の値にする
  8375:       }
  8376:       XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X);  //ccr_tst
  8377:     } else {  //MOVEM.W <ea>,<list>
  8378:       int l = mmuReadWordZeroExword (XEiJ.regPC, XEiJ.regSRS);  //pcwze。レジスタリスト。ゼロ拡張
  8379:       XEiJ.regPC += 2;
  8380:       int arr, a;
  8381:       if (ea >> 3 == XEiJ.MMM_MP) {  //(Ar)+
  8382:         arr = ea - (XEiJ.EA_MP - 8);
  8383:         a = m60Address = XEiJ.regRn[arr];
  8384:       } else {  //(Ar)+以外
  8385:         arr = 16;
  8386:         a = efaCntWord (ea);
  8387:       }
  8388:       int t = a;
  8389:       if (XEiJ.IRP_MOVEM_EXPAND) {  //16回展開する
  8390:         if ((l & 0x0001) != 0) {
  8391:           XEiJ.regRn[ 0] = mmuReadWordSignData (m60Address = a, XEiJ.regSRS);  //データレジスタも符号拡張して32bit全部書き換える
  8392:           a += 2;
  8393:         }
  8394:         if ((l & 0x0002) != 0) {
  8395:           XEiJ.regRn[ 1] = mmuReadWordSignData (m60Address = a, XEiJ.regSRS);  //データレジスタも符号拡張して32bit全部書き換える
  8396:           a += 2;
  8397:         }
  8398:         if ((l & 0x0004) != 0) {
  8399:           XEiJ.regRn[ 2] = mmuReadWordSignData (m60Address = a, XEiJ.regSRS);  //データレジスタも符号拡張して32bit全部書き換える
  8400:           a += 2;
  8401:         }
  8402:         if ((l & 0x0008) != 0) {
  8403:           XEiJ.regRn[ 3] = mmuReadWordSignData (m60Address = a, XEiJ.regSRS);  //データレジスタも符号拡張して32bit全部書き換える
  8404:           a += 2;
  8405:         }
  8406:         if ((l & 0x0010) != 0) {
  8407:           XEiJ.regRn[ 4] = mmuReadWordSignData (m60Address = a, XEiJ.regSRS);  //データレジスタも符号拡張して32bit全部書き換える
  8408:           a += 2;
  8409:         }
  8410:         if ((l & 0x0020) != 0) {
  8411:           XEiJ.regRn[ 5] = mmuReadWordSignData (m60Address = a, XEiJ.regSRS);  //データレジスタも符号拡張して32bit全部書き換える
  8412:           a += 2;
  8413:         }
  8414:         if ((l & 0x0040) != 0) {
  8415:           XEiJ.regRn[ 6] = mmuReadWordSignData (m60Address = a, XEiJ.regSRS);  //データレジスタも符号拡張して32bit全部書き換える
  8416:           a += 2;
  8417:         }
  8418:         if ((byte) l < 0) {  //(l & 0x0080) != 0
  8419:           XEiJ.regRn[ 7] = mmuReadWordSignData (m60Address = a, XEiJ.regSRS);  //データレジスタも符号拡張して32bit全部書き換える
  8420:           a += 2;
  8421:         }
  8422:         if ((l & 0x0100) != 0) {
  8423:           XEiJ.regRn[ 8] = mmuReadWordSignData (m60Address = a, XEiJ.regSRS);  //符号拡張して32bit全部書き換える
  8424:           a += 2;
  8425:         }
  8426:         if ((l & 0x0200) != 0) {
  8427:           XEiJ.regRn[ 9] = mmuReadWordSignData (m60Address = a, XEiJ.regSRS);  //符号拡張して32bit全部書き換える
  8428:           a += 2;
  8429:         }
  8430:         if ((l & 0x0400) != 0) {
  8431:           XEiJ.regRn[10] = mmuReadWordSignData (m60Address = a, XEiJ.regSRS);  //符号拡張して32bit全部書き換える
  8432:           a += 2;
  8433:         }
  8434:         if ((l & 0x0800) != 0) {
  8435:           XEiJ.regRn[11] = mmuReadWordSignData (m60Address = a, XEiJ.regSRS);  //符号拡張して32bit全部書き換える
  8436:           a += 2;
  8437:         }
  8438:         if ((l & 0x1000) != 0) {
  8439:           XEiJ.regRn[12] = mmuReadWordSignData (m60Address = a, XEiJ.regSRS);  //符号拡張して32bit全部書き換える
  8440:           a += 2;
  8441:         }
  8442:         if ((l & 0x2000) != 0) {
  8443:           XEiJ.regRn[13] = mmuReadWordSignData (m60Address = a, XEiJ.regSRS);  //符号拡張して32bit全部書き換える
  8444:           a += 2;
  8445:         }
  8446:         if ((l & 0x4000) != 0) {
  8447:           XEiJ.regRn[14] = mmuReadWordSignData (m60Address = a, XEiJ.regSRS);  //符号拡張して32bit全部書き換える
  8448:           a += 2;
  8449:         }
  8450:         if ((short) l < 0) {  //(l & 0x8000) != 0
  8451:           XEiJ.regRn[15] = mmuReadWordSignData (m60Address = a, XEiJ.regSRS);  //符号拡張して32bit全部書き換える
  8452:           a += 2;
  8453:         }
  8454:       } else if (XEiJ.IRP_MOVEM_LOOP) {  //16回ループする。コンパイラが展開する
  8455:         for (int i = 0; i <= 15; i++) {
  8456:           if ((l & 0x0001 << i) != 0) {
  8457:             XEiJ.regRn[i] = mmuReadWordSignData (m60Address = a, XEiJ.regSRS);  //(データレジスタも)符号拡張して32bit全部書き換える
  8458:             a += 2;
  8459:           }
  8460:         }
  8461:       } else if (XEiJ.IRP_MOVEM_SHIFT_LEFT) {  //0になるまで左にシフトする
  8462:         l = XEiJ.MPU_BITREV_TABLE_0[l & 2047] | XEiJ.MPU_BITREV_TABLE_1[l << 10 >>> 21];  //Integer.reverse(l)
  8463:         for (int i = 0; l != 0; i++, l <<= 1) {
  8464:           if (l < 0) {
  8465:             XEiJ.regRn[i] = mmuReadWordSignData (m60Address = a, XEiJ.regSRS);  //(データレジスタも)符号拡張して32bit全部書き換える
  8466:             a += 2;
  8467:           }
  8468:         }
  8469:       } else if (XEiJ.IRP_MOVEM_SHIFT_RIGHT) {  //0になるまで右にシフトする
  8470:         for (int i = 0; l != 0; i++, l >>>= 1) {
  8471:           if ((l & 1) != 0) {
  8472:             XEiJ.regRn[i] = mmuReadWordSignData (m60Address = a, XEiJ.regSRS);  //(データレジスタも)符号拡張して32bit全部書き換える
  8473:             a += 2;
  8474:           }
  8475:         }
  8476:       } else if (XEiJ.IRP_MOVEM_ZEROS) {  //Integer.numberOfTrailingZerosを使う
  8477:         for (int i = 0; l != 0; ) {
  8478:           int k = Integer.numberOfTrailingZeros (l);
  8479:           XEiJ.regRn[i += k] = mmuReadWordSignData (m60Address = a, XEiJ.regSRS);  //(データレジスタも)符号拡張して32bit全部書き換える
  8480:           a += 2;
  8481:           l = l >>> k & ~1;
  8482:         }
  8483:       }
  8484:       //MOVEM.W (Ar)+,<list>で<list>にArが含まれているとき、メモリから読み出したデータを捨ててArをインクリメントする
  8485:       XEiJ.regRn[arr] = a;
  8486:       XEiJ.mpuCycleCount += a - t >> 1;  //2バイト/個→1サイクル/個
  8487:     }
  8488:   }  //irpMovemToRegWord
  8489: 
  8490:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  8491:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  8492:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  8493:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  8494:   //MOVEM.L <ea>,<list>                             |-|012346|-|-----|-----|  M+ WXZP |0100_110_011_mmm_rrr-llllllllllllllll
  8495:   public static void irpMovemToRegLong () throws M68kException {
  8496:     int ea = XEiJ.regOC & 63;
  8497:     {
  8498:       int l = mmuReadWordZeroExword (XEiJ.regPC, XEiJ.regSRS);  //pcwze。レジスタリスト。ゼロ拡張
  8499:       XEiJ.regPC += 2;
  8500:       int arr, a;
  8501:       if (ea >> 3 == XEiJ.MMM_MP) {  //(Ar)+
  8502:         arr = ea - (XEiJ.EA_MP - 8);
  8503:         a = m60Address = XEiJ.regRn[arr];
  8504:       } else {  //(Ar)+以外
  8505:         arr = 16;
  8506:         a = efaCntLong (ea);
  8507:       }
  8508:       int t = a;
  8509:       if (XEiJ.IRP_MOVEM_EXPAND) {  //16回展開する
  8510:         if ((l & 0x0001) != 0) {
  8511:           XEiJ.regRn[ 0] = mmuReadLongData (m60Address = a, XEiJ.regSRS);
  8512:           a += 4;
  8513:         }
  8514:         if ((l & 0x0002) != 0) {
  8515:           XEiJ.regRn[ 1] = mmuReadLongData (m60Address = a, XEiJ.regSRS);
  8516:           a += 4;
  8517:         }
  8518:         if ((l & 0x0004) != 0) {
  8519:           XEiJ.regRn[ 2] = mmuReadLongData (m60Address = a, XEiJ.regSRS);
  8520:           a += 4;
  8521:         }
  8522:         if ((l & 0x0008) != 0) {
  8523:           XEiJ.regRn[ 3] = mmuReadLongData (m60Address = a, XEiJ.regSRS);
  8524:           a += 4;
  8525:         }
  8526:         if ((l & 0x0010) != 0) {
  8527:           XEiJ.regRn[ 4] = mmuReadLongData (m60Address = a, XEiJ.regSRS);
  8528:           a += 4;
  8529:         }
  8530:         if ((l & 0x0020) != 0) {
  8531:           XEiJ.regRn[ 5] = mmuReadLongData (m60Address = a, XEiJ.regSRS);
  8532:           a += 4;
  8533:         }
  8534:         if ((l & 0x0040) != 0) {
  8535:           XEiJ.regRn[ 6] = mmuReadLongData (m60Address = a, XEiJ.regSRS);
  8536:           a += 4;
  8537:         }
  8538:         if ((byte) l < 0) {  //(l & 0x0080) != 0
  8539:           XEiJ.regRn[ 7] = mmuReadLongData (m60Address = a, XEiJ.regSRS);
  8540:           a += 4;
  8541:         }
  8542:         if ((l & 0x0100) != 0) {
  8543:           XEiJ.regRn[ 8] = mmuReadLongData (m60Address = a, XEiJ.regSRS);
  8544:           a += 4;
  8545:         }
  8546:         if ((l & 0x0200) != 0) {
  8547:           XEiJ.regRn[ 9] = mmuReadLongData (m60Address = a, XEiJ.regSRS);
  8548:           a += 4;
  8549:         }
  8550:         if ((l & 0x0400) != 0) {
  8551:           XEiJ.regRn[10] = mmuReadLongData (m60Address = a, XEiJ.regSRS);
  8552:           a += 4;
  8553:         }
  8554:         if ((l & 0x0800) != 0) {
  8555:           XEiJ.regRn[11] = mmuReadLongData (m60Address = a, XEiJ.regSRS);
  8556:           a += 4;
  8557:         }
  8558:         if ((l & 0x1000) != 0) {
  8559:           XEiJ.regRn[12] = mmuReadLongData (m60Address = a, XEiJ.regSRS);
  8560:           a += 4;
  8561:         }
  8562:         if ((l & 0x2000) != 0) {
  8563:           XEiJ.regRn[13] = mmuReadLongData (m60Address = a, XEiJ.regSRS);
  8564:           a += 4;
  8565:         }
  8566:         if ((l & 0x4000) != 0) {
  8567:           XEiJ.regRn[14] = mmuReadLongData (m60Address = a, XEiJ.regSRS);
  8568:           a += 4;
  8569:         }
  8570:         if ((short) l < 0) {  //(l & 0x8000) != 0
  8571:           XEiJ.regRn[15] = mmuReadLongData (m60Address = a, XEiJ.regSRS);
  8572:           a += 4;
  8573:         }
  8574:       } else if (XEiJ.IRP_MOVEM_LOOP) {  //16回ループする。コンパイラが展開する
  8575:         for (int i = 0; i <= 15; i++) {
  8576:           if ((l & 0x0001 << i) != 0) {
  8577:             XEiJ.regRn[i] = mmuReadLongData (m60Address = a, XEiJ.regSRS);
  8578:             a += 4;
  8579:           }
  8580:         }
  8581:       } else if (XEiJ.IRP_MOVEM_SHIFT_LEFT) {  //0になるまで左にシフトする
  8582:         l = XEiJ.MPU_BITREV_TABLE_0[l & 2047] | XEiJ.MPU_BITREV_TABLE_1[l << 10 >>> 21];  //Integer.reverse(l)
  8583:         for (int i = 0; l != 0; i++, l <<= 1) {
  8584:           if (l < 0) {
  8585:             XEiJ.regRn[i] = mmuReadLongData (m60Address = a, XEiJ.regSRS);
  8586:             a += 4;
  8587:           }
  8588:         }
  8589:       } else if (XEiJ.IRP_MOVEM_SHIFT_RIGHT) {  //0になるまで右にシフトする
  8590:         for (int i = 0; l != 0; i++, l >>>= 1) {
  8591:           if ((l & 1) != 0) {
  8592:             XEiJ.regRn[i] = mmuReadLongData (m60Address = a, XEiJ.regSRS);
  8593:             a += 4;
  8594:           }
  8595:         }
  8596:       } else if (XEiJ.IRP_MOVEM_ZEROS) {  //Integer.numberOfTrailingZerosを使う
  8597:         for (int i = 0; l != 0; ) {
  8598:           int k = Integer.numberOfTrailingZeros (l);
  8599:           XEiJ.regRn[i += k] = mmuReadLongData (m60Address = a, XEiJ.regSRS);
  8600:           a += 4;
  8601:           l = l >>> k & ~1;
  8602:         }
  8603:       }
  8604:       //MOVEM.L (Ar)+,<list>で<list>にArが含まれているとき、メモリから読み出したデータを捨ててArをインクリメントする
  8605:       XEiJ.regRn[arr] = a;
  8606:       XEiJ.mpuCycleCount += a - t >> 2;  //4バイト/個→1サイクル/個
  8607:     }
  8608:   }  //irpMovemToRegLong
  8609: 
  8610:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  8611:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  8612:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  8613:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  8614:   //TRAP #<vector>                                  |-|012346|-|-----|-----|          |0100_111_001_00v_vvv
  8615:   public static void irpTrap () throws M68kException {
  8616:     irpExceptionFormat0 (XEiJ.regOC - (0b0100_111_001_000_000 - M68kException.M6E_TRAP_0_INSTRUCTION_VECTOR) << 2, XEiJ.regPC);  //pcは次の命令
  8617:   }  //irpTrap
  8618:   public static void irpTrap15 () throws M68kException {
  8619:     if ((XEiJ.regRn[0] & 255) == 0x8e) {  //IOCS _BOOTINF
  8620:       MainMemory.mmrCheckHuman ();
  8621:     }
  8622:     irpExceptionFormat0 (M68kException.M6E_TRAP_15_INSTRUCTION_VECTOR << 2, XEiJ.regPC);  //pcは次の命令
  8623:   }  //irpTrap15
  8624: 
  8625:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  8626:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  8627:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  8628:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  8629:   //LINK.W Ar,#<data>                               |-|012346|-|-----|-----|          |0100_111_001_010_rrr-{data}
  8630:   //
  8631:   //LINK.W Ar,#<data>
  8632:   //  PEA.L (Ar);MOVEA.L A7,Ar;ADDA.W #<data>,A7と同じ
  8633:   //  LINK.W A7,#<data>はA7をデクリメントする前の値がプッシュされ、A7に#<data>が加算される
  8634:   public static void irpLinkWord () throws M68kException {
  8635:     XEiJ.mpuCycleCount++;
  8636:     int o = mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);  //pcws
  8637:     int arr = XEiJ.regOC - (0b0100_111_001_010_000 - 8);
  8638:     //評価順序に注意。LINK.W A7,#<data>のときプッシュするのはA7をデクリメントする前の値。wl(r[15]-=4,r[8+rrr])は不可
  8639:     int a = XEiJ.regRn[arr];
  8640:     m60Incremented -= 4L << (7 << 3);
  8641:     int sp = m60Address = XEiJ.regRn[15] -= 4;
  8642:     mmuWriteLongData (sp, a, XEiJ.regSRS);  //pushl
  8643:     XEiJ.regRn[arr] = sp;
  8644:     XEiJ.regRn[15] = sp + o;
  8645:   }  //irpLinkWord
  8646: 
  8647:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  8648:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  8649:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  8650:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  8651:   //UNLK Ar                                         |-|012346|-|-----|-----|          |0100_111_001_011_rrr
  8652:   //
  8653:   //UNLK Ar
  8654:   //  MOVEA.L Ar,A7;MOVEA.L (A7)+,Arと同じ
  8655:   //  UNLK A7はMOVEA.L A7,A7;MOVEA.L (A7)+,A7すなわちMOVEA.L (A7),A7と同じ
  8656:   //  ソースオペランドのポストインクリメントはデスティネーションオペランドが評価される前に完了しているとみなされる
  8657:   //    例えばMOVE.L (A0)+,(A0)+はMOVE.L (A0),(4,A0);ADDQ.L #8,A0と同じ
  8658:   //    MOVEA.L (A0)+,A0はポストインクリメントされたA0が(A0)から読み出された値で上書きされるのでMOVEA.L (A0),A0と同じ
  8659:   //  M68000PRMにUNLK Anの動作はAn→SP;(SP)→An;SP+4→SPだと書かれているがこれはn=7の場合に当てはまらない
  8660:   //  余談だが68040の初期のマスクセットはUNLK A7を実行すると固まるらしい
  8661:   public static void irpUnlk () throws M68kException {
  8662:     XEiJ.mpuCycleCount += 2;
  8663:     int arr = XEiJ.regOC - (0b0100_111_001_011_000 - 8);
  8664:     //評価順序に注意
  8665:     int sp = XEiJ.regRn[arr];
  8666:     //  UNLK ArはMOVEA.L Ar,A7;MOVEA.L (A7)+,Arと同じ
  8667:     //  (A7)+がページフォルトになってリトライするとき
  8668:     //    Arはまだ更新されておらず、リトライでMOVEA.L Ar,A7が再実行されるので、A7を巻き戻す必要はない
  8669:     m60Incremented += 4L << (7 << 3);  //UNLK A7でページフォルトが発生したときA7が増えすぎないようにする
  8670:     XEiJ.regRn[15] = sp + 4;
  8671:     XEiJ.regRn[arr] = mmuReadLongData (m60Address = sp, XEiJ.regSRS);  //popls
  8672:   }  //irpUnlk
  8673: 
  8674:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  8675:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  8676:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  8677:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  8678:   //MOVE.L Ar,USP                                   |-|012346|P|-----|-----|          |0100_111_001_100_rrr
  8679:   public static void irpMoveToUsp () throws M68kException {
  8680:     if (XEiJ.regSRS == 0) {  //ユーザモードのとき
  8681:       M68kException.m6eNumber = M68kException.M6E_PRIVILEGE_VIOLATION;
  8682:       throw M68kException.m6eSignal;
  8683:     }
  8684:     //以下はスーパーバイザモード
  8685:     XEiJ.mpuCycleCount += 2;
  8686:     XEiJ.mpuUSP = XEiJ.regRn[XEiJ.regOC - (0b0100_111_001_100_000 - 8)];
  8687:   }  //irpMoveToUsp
  8688: 
  8689:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  8690:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  8691:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  8692:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  8693:   //MOVE.L USP,Ar                                   |-|012346|P|-----|-----|          |0100_111_001_101_rrr
  8694:   public static void irpMoveFromUsp () throws M68kException {
  8695:     if (XEiJ.regSRS == 0) {  //ユーザモードのとき
  8696:       M68kException.m6eNumber = M68kException.M6E_PRIVILEGE_VIOLATION;
  8697:       throw M68kException.m6eSignal;
  8698:     }
  8699:     //以下はスーパーバイザモード
  8700:     XEiJ.mpuCycleCount++;
  8701:     XEiJ.regRn[XEiJ.regOC - (0b0100_111_001_101_000 - 8)] = XEiJ.mpuUSP;
  8702:   }  //irpMoveFromUsp
  8703: 
  8704:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  8705:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  8706:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  8707:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  8708:   //RESET                                           |-|012346|P|-----|-----|          |0100_111_001_110_000
  8709:   public static void irpReset () throws M68kException {
  8710:     if (XEiJ.regSRS == 0) {  //ユーザモードのとき
  8711:       M68kException.m6eNumber = M68kException.M6E_PRIVILEGE_VIOLATION;
  8712:       throw M68kException.m6eSignal;
  8713:     }
  8714:     //以下はスーパーバイザモード
  8715:     XEiJ.mpuCycleCount += 45;
  8716:     XEiJ.irpReset ();
  8717:   }  //irpReset
  8718: 
  8719:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  8720:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  8721:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  8722:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  8723:   //NOP                                             |-|012346|-|-----|-----|          |0100_111_001_110_001
  8724:   public static void irpNop () throws M68kException {
  8725:     XEiJ.mpuCycleCount += 9;
  8726:     //何もしない
  8727:   }  //irpNop
  8728: 
  8729:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  8730:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  8731:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  8732:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  8733:   //STOP #<data>                                    |-|012346|P|UUUUU|*****|          |0100_111_001_110_010-{data}
  8734:   //
  8735:   //STOP #<data>
  8736:   //    1. #<data>をsrに設定する
  8737:   //    2. pcを進める
  8738:   //    3. 以下のいずれかの条件が成立するまで停止する
  8739:   //      3a. トレース
  8740:   //      3b. マスクされているレベルよりも高い割り込み要求
  8741:   //      3c. リセット
  8742:   //  コアと一緒にデバイスを止めるわけにいかないので、ここでは条件が成立するまで同じ命令を繰り返すループ命令として実装する
  8743:   public static void irpStop () throws M68kException {
  8744:     if (XEiJ.regSRS == 0) {  //ユーザモードのとき
  8745:       M68kException.m6eNumber = M68kException.M6E_PRIVILEGE_VIOLATION;
  8746:       throw M68kException.m6eSignal;
  8747:     }
  8748:     //以下はスーパーバイザモード
  8749:     XEiJ.mpuCycleCount++;
  8750:     irpSetSR (mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, 1));  //pcws。特権違反チェックが先
  8751:     if (XEiJ.mpuTraceFlag == 0) {  //トレースまたはマスクされているレベルよりも高い割り込み要求がない
  8752:       XEiJ.regPC = XEiJ.regPC0;  //ループ
  8753:       //任意の負荷率を100%に設定しているときSTOP命令が軽すぎると動作周波数が大きくなりすぎて割り込みがかかったとき次に進めなくなる
  8754:       //負荷率の計算にSTOP命令で止まっていた時間を含めないことにする
  8755:       XEiJ.mpuClockTime += XEiJ.TMR_FREQ * 4 / 1000000;  //4μs。50MHzのとき200clk
  8756:       XEiJ.mpuLastNano += 4000L;
  8757:     }
  8758:   }  //irpStop
  8759: 
  8760:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  8761:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  8762:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  8763:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  8764:   //RTE                                             |-|012346|P|UUUUU|*****|          |0100_111_001_110_011
  8765:   public static void irpRte () throws M68kException {
  8766:     if (XEiJ.regSRS == 0) {  //ユーザモードのとき
  8767:       M68kException.m6eNumber = M68kException.M6E_PRIVILEGE_VIOLATION;
  8768:       throw M68kException.m6eSignal;
  8769:     }
  8770:     //以下はスーパーバイザモード
  8771:     XEiJ.mpuCycleCount += 17;
  8772:     int sp = XEiJ.regRn[15];
  8773:     int newSR = mmuReadWordZeroData (m60Address = sp, 1);  //popwz
  8774:     int newPC = mmuReadLongData (m60Address = sp + 2, 1);  //popls
  8775:     int format = mmuReadWordZeroData (m60Address = sp + 6, 1) >> 12;
  8776:     if (format == 0) {  //010,020,030,040,060
  8777:       m60Incremented += 8L << (7 << 3);
  8778:       XEiJ.regRn[15] = sp + 8;
  8779:     } else if (format == 2 ||  //020,030,040,060
  8780:                format == 3) {  //040,060
  8781:       m60Incremented += 12L << (7 << 3);
  8782:       XEiJ.regRn[15] = sp + 12;
  8783:     } else if (format == 4) {  //060
  8784:       m60Incremented += 16L << (7 << 3);
  8785:       XEiJ.regRn[15] = sp + 16;
  8786:     } else {
  8787:       M68kException.m6eNumber = M68kException.M6E_FORMAT_ERROR;
  8788:       throw M68kException.m6eSignal;
  8789:     }
  8790:     //irpSetSRでモードが切り替わる場合があるのでその前にr[15]を更新しておくこと
  8791:     irpSetSR (newSR);  //ここでユーザモードに戻る場合がある。特権違反チェックが先
  8792:     irpSetPC (newPC);  //分岐ログが新しいsrを使う。順序に注意。ここでアドレスエラーが発生する場合がある
  8793:   }  //irpRte
  8794: 
  8795:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  8796:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  8797:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  8798:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  8799:   //RTD #<data>                                     |-|-12346|-|-----|-----|          |0100_111_001_110_100-{data}
  8800:   public static void irpRtd () throws M68kException {
  8801:     XEiJ.mpuCycleCount += 7;
  8802:     int sp = XEiJ.regRn[15];
  8803:     int o = mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);  //pcws
  8804:     irpSetPC (mmuReadLongData (m60Address = sp, XEiJ.regSRS));  //popls
  8805:     m60Incremented += 4L << (7 << 3);
  8806:     XEiJ.regRn[15] = sp + 4 + o;
  8807:   }  //irpRtd
  8808: 
  8809:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  8810:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  8811:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  8812:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  8813:   //RTS                                             |-|012346|-|-----|-----|          |0100_111_001_110_101
  8814:   public static void irpRts () throws M68kException {
  8815:     XEiJ.mpuCycleCount += 7;
  8816:     int sp = XEiJ.regRn[15];
  8817:     irpSetPC (mmuReadLongData (m60Address = sp, XEiJ.regSRS));  //popls
  8818:     m60Incremented += 4L << (7 << 3);
  8819:     XEiJ.regRn[15] = sp + 4;
  8820:   }  //irpRts
  8821: 
  8822:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  8823:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  8824:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  8825:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  8826:   //TRAPV                                           |-|012346|-|---*-|-----|          |0100_111_001_110_110
  8827:   public static void irpTrapv () throws M68kException {
  8828:     if (XEiJ.TEST_BIT_1_SHIFT ? XEiJ.regCCR << 31 - 1 >= 0 : (XEiJ.regCCR & XEiJ.REG_CCR_V) == 0) {  //通過
  8829:       XEiJ.mpuCycleCount++;
  8830:     } else {
  8831:       m60Address = XEiJ.regPC0;  //アドレスは命令の先頭
  8832:       M68kException.m6eNumber = M68kException.M6E_TRAPV_INSTRUCTION;
  8833:       throw M68kException.m6eSignal;
  8834:     }
  8835:   }  //irpTrapv
  8836: 
  8837:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  8838:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  8839:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  8840:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  8841:   //RTR                                             |-|012346|-|UUUUU|*****|          |0100_111_001_110_111
  8842:   public static void irpRtr () throws M68kException {
  8843:     XEiJ.mpuCycleCount += 8;
  8844:     int sp = XEiJ.regRn[15];
  8845:     int w = mmuReadWordZeroData (m60Address = sp, XEiJ.regSRS);  //popwz
  8846:     irpSetPC (mmuReadLongData (m60Address = sp + 2, XEiJ.regSRS));  //popls
  8847:     XEiJ.regCCR = XEiJ.REG_CCR_MASK & w;
  8848:     m60Incremented += 6L << (7 << 3);
  8849:     XEiJ.regRn[15] = sp + 6;
  8850:   }  //irpRtr
  8851: 
  8852:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  8853:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  8854:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  8855:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  8856:   //MOVEC.L Rc,Rn                                   |-|-12346|P|-----|-----|          |0100_111_001_111_010-rnnncccccccccccc
  8857:   public static void irpMovecFromControl () throws M68kException {
  8858:     if (XEiJ.regSRS == 0) {  //ユーザモードのとき
  8859:       M68kException.m6eNumber = M68kException.M6E_PRIVILEGE_VIOLATION;
  8860:       throw M68kException.m6eSignal;
  8861:     }
  8862:     //以下はスーパーバイザモード
  8863:     int w = mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, 1);  //pcwz。拡張ワード
  8864:     switch (w & 0x0fff) {
  8865:     case 0x000:  //SFC
  8866:       XEiJ.mpuCycleCount += 12;
  8867:       XEiJ.regRn[w >> 12] = XEiJ.mpuSFC;
  8868:       break;
  8869:     case 0x001:  //DFC
  8870:       XEiJ.mpuCycleCount += 12;
  8871:       XEiJ.regRn[w >> 12] = XEiJ.mpuDFC;
  8872:       break;
  8873:     case 0x002:  //CACR
  8874:       XEiJ.mpuCycleCount += 15;
  8875:       XEiJ.regRn[w >> 12] = XEiJ.mpuCACR & 0xf880e000;  //CABCとCUBCのリードは常に0
  8876:       break;
  8877:     case 0x003:  //TCR
  8878:       XEiJ.mpuCycleCount += 15;
  8879:       XEiJ.regRn[w >> 12] = mmuGetTCR ();
  8880:       break;
  8881:     case 0x004:  //ITT0
  8882:       XEiJ.mpuCycleCount += 15;
  8883:       XEiJ.regRn[w >> 12] = mmuGetITT0 ();
  8884:       break;
  8885:     case 0x005:  //ITT1
  8886:       XEiJ.mpuCycleCount += 15;
  8887:       XEiJ.regRn[w >> 12] = mmuGetITT1 ();
  8888:       break;
  8889:     case 0x006:  //DTT0
  8890:       XEiJ.mpuCycleCount += 15;
  8891:       XEiJ.regRn[w >> 12] = mmuGetDTT0 ();
  8892:       break;
  8893:     case 0x007:  //DTT1
  8894:       XEiJ.mpuCycleCount += 15;
  8895:       XEiJ.regRn[w >> 12] = mmuGetDTT1 ();
  8896:       break;
  8897:     case 0x008:  //BUSCR
  8898:       XEiJ.mpuCycleCount += 15;
  8899:       XEiJ.regRn[w >> 12] = XEiJ.mpuBUSCR;
  8900:       break;
  8901:     case 0x800:  //USP
  8902:       XEiJ.mpuCycleCount += 12;
  8903:       XEiJ.regRn[w >> 12] = XEiJ.mpuUSP;
  8904:       break;
  8905:     case 0x801:  //VBR
  8906:       XEiJ.mpuCycleCount += 12;
  8907:       XEiJ.regRn[w >> 12] = XEiJ.mpuVBR;
  8908:       break;
  8909:     case 0x806:  //URP
  8910:       XEiJ.mpuCycleCount += 15;
  8911:       XEiJ.regRn[w >> 12] = mmuGetURP ();;
  8912:       break;
  8913:     case 0x807:  //SRP
  8914:       XEiJ.mpuCycleCount += 15;
  8915:       XEiJ.regRn[w >> 12] = mmuGetSRP ();;
  8916:       break;
  8917:     case 0x808:  //PCR
  8918:       XEiJ.mpuCycleCount += 12;
  8919:       XEiJ.regRn[w >> 12] = XEiJ.mpuPCR;
  8920:       break;
  8921:     default:
  8922:       M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION;
  8923:       throw M68kException.m6eSignal;
  8924:     }
  8925:   }  //irpMovecFromControl
  8926: 
  8927:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  8928:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  8929:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  8930:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  8931:   //MOVEC.L Rn,Rc                                   |-|-12346|P|-----|-----|          |0100_111_001_111_011-rnnncccccccccccc
  8932:   public static void irpMovecToControl () throws M68kException {
  8933:     if (XEiJ.regSRS == 0) {  //ユーザモードのとき
  8934:       M68kException.m6eNumber = M68kException.M6E_PRIVILEGE_VIOLATION;
  8935:       throw M68kException.m6eSignal;
  8936:     }
  8937:     //以下はスーパーバイザモード
  8938:     int w = mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, 1);  //pcwz。拡張ワード
  8939:     int d = XEiJ.regRn[w >> 12];
  8940:     switch (w & 0x0fff) {
  8941:     case 0x000:  //SFC
  8942:       XEiJ.mpuCycleCount += 11;
  8943:       XEiJ.mpuSFC = d & 0x00000007;
  8944:       break;
  8945:     case 0x001:  //DFC
  8946:       XEiJ.mpuCycleCount += 11;
  8947:       XEiJ.mpuDFC = d & 0x00000007;
  8948:       break;
  8949:     case 0x002:  //CACR
  8950:       //  CACR
  8951:       //   31  30  29  28  27 26 25 24   23   22   21 20 19 18 17 16   15  14  13 12 11 10 9 8  7 6 5 4 3 2 1 0
  8952:       //  EDC NAD ESB DPI FOC  0  0  0  EBC CABC CUBC  0  0  0  0  0  EIC NAI FIC  0  0  0 0 0  0 0 0 0 0 0 0 0
  8953:       //    bit31  EDC   Enable Data Cache
  8954:       //                 データキャッシュ有効
  8955:       //                 4ウェイセットアソシアティブ。16バイト/ライン*128ライン/セット*4セット=8KB
  8956:       //    bit30  NAD   No Allocate Mode (Data Cache)
  8957:       //                 データキャッシュでミスしても新しいキャッシュラインをアロケートしない
  8958:       //    bit29  ESB   Enable Store Buffer
  8959:       //                 ストアバッファ有効
  8960:       //                 ライトスルーおよびキャッシュ禁止インプリサイスのページの書き込みを4エントリ(16バイト)のFIFOバッファで遅延させる
  8961:       //                 例えば4の倍数のアドレスから始まる4バイトに連続して書き込むと1回のロングの書き込みにまとめられる
  8962:       //    bit28  DPI   Disable CPUSH Invalidation
  8963:       //                 CPUSHでプッシュされたキャッシュラインを無効化しない
  8964:       //    bit27  FOC   1/2 Cache Operation Mode Enable (Data Cache)
  8965:       //                 データキャッシュを1/2キャッシュモードにする
  8966:       //    bit23  EBC   Enable Branch Cache
  8967:       //                 分岐キャッシュ有効
  8968:       //                 256エントリの分岐キャッシュを用いて分岐予測を行う
  8969:       //                 正しく予測された分岐は前後の命令に隠れて実質0サイクルで実行される
  8970:       //                   MC68060は最大3個の命令(1個の分岐命令と2個の整数命令)を1サイクルで実行できる
  8971:       //                   MC68000(10MHz)とMC68060(50MHz)の処理速度の比は局所的に100倍を超えることがある
  8972:       //    bit22  CABC  Clear All Entries in the Branch Cache
  8973:       //                 分岐キャッシュのすべてのエントリをクリアする
  8974:       //                 分岐命令以外の場所で分岐キャッシュがヒットしてしまったときに発生する分岐予測エラーから復帰するときに使う
  8975:       //                 CABCはライトオンリーでリードは常に0
  8976:       //    bit21  CUBC  Clear All User Entries in the Branch Cache
  8977:       //                 分岐キャッシュのすべてのユーザエントリをクリアする
  8978:       //                 CUBCはライトオンリーでリードは常に0
  8979:       //    bit15  EIC   Enable Instruction Cache
  8980:       //                 命令キャッシュ有効
  8981:       //                 4ウェイセットアソシアティブ。16バイト/ライン*128ライン/セット*4セット=8KB
  8982:       //    bit14  NAI   No Allocate Mode (Instruction Cache)
  8983:       //                 命令キャッシュでミスしても新しいキャッシュラインをアロケートしない
  8984:       //    bit13  FIC   1/2 Cache Operation Mode Enable (Instruction Cache)
  8985:       //                 命令キャッシュを1/2キャッシュモードにする
  8986:       //! 非対応
  8987:       XEiJ.mpuCycleCount += 14;
  8988:       XEiJ.mpuCACR = d & 0xf8e0e000;  //CABCとCUBCは保存しておいてリードするときにマスクする
  8989:       {
  8990:         boolean cacheOn = (XEiJ.mpuCACR & 0x80008000) != 0;
  8991:         if (XEiJ.mpuCacheOn != cacheOn) {
  8992:           XEiJ.mpuCacheOn = cacheOn;
  8993:           XEiJ.mpuSetWait ();
  8994:         }
  8995:       }
  8996:       break;
  8997:     case 0x003:  //TCR
  8998:       //  TCR
  8999:       //  31 30 29 28 27 26 25 24  23 22 21 20 19 18 17 16  15 14  13  12   11   10 9 8  7 6   5 4 3 2 1 0
  9000:       //   0  0  0  0  0  0  0  0   0  0  0  0  0  0  0  0   E  P NAD NAI FOTC FITC DCO  DUO DWO DCI DUI 0
  9001:       //  bit15   E     Enable
  9002:       //  bit14   P     Page Size
  9003:       //  bit13   NAD   No Allocate Mode (Data ATC)
  9004:       //  bit12   NAI   No Allocate Mode (Instruction ATC)
  9005:       //  bit11   FOTC  1/2-Cache Mode (Data ATC)
  9006:       //  bit10   FITC  1/2-Cache Mode (Instruction ATC)
  9007:       //  bit9-8  DCO   Default Cache Mode (Data Cache)
  9008:       //  bit7-6  DUO   Default UPA bits (Data Cache)
  9009:       //  bit5    DWO   Default Write Protect (Data Cache)
  9010:       //  bit4-3  DCI   Default Cache Mode (Instruction Cache)
  9011:       //  bit2-1  DUI   Default UPA bits (Instruction Cache)
  9012:       //MMUを参照
  9013:       XEiJ.mpuCycleCount += 14;
  9014:       mmuSetTCR (d);
  9015:       break;
  9016:     case 0x004:  //ITT0
  9017:       XEiJ.mpuCycleCount += 14;
  9018:       mmuSetITT0 (d);
  9019:       break;
  9020:     case 0x005:  //ITT1
  9021:       XEiJ.mpuCycleCount += 14;
  9022:       mmuSetITT1 (d);
  9023:       break;
  9024:     case 0x006:  //DTT0
  9025:       XEiJ.mpuCycleCount += 14;
  9026:       mmuSetDTT0 (d);
  9027:       break;
  9028:     case 0x007:  //DTT1
  9029:       XEiJ.mpuCycleCount += 14;
  9030:       mmuSetDTT1 (d);
  9031:       break;
  9032:     case 0x008:  //BUSCR
  9033:       XEiJ.mpuCycleCount += 14;
  9034:       XEiJ.mpuBUSCR = d & 0xf0000000;
  9035:       break;
  9036:     case 0x800:  //USP
  9037:       XEiJ.mpuCycleCount += 11;
  9038:       XEiJ.mpuUSP = d;
  9039:       break;
  9040:     case 0x801:  //VBR
  9041:       XEiJ.mpuCycleCount += 11;
  9042:       XEiJ.mpuVBR = d & -4;  //4の倍数でないと困る
  9043:       break;
  9044:     case 0x806:  //URP
  9045:       XEiJ.mpuCycleCount += 14;
  9046:       mmuSetURP (d);
  9047:       break;
  9048:     case 0x807:  //SRP
  9049:       XEiJ.mpuCycleCount += 14;
  9050:       mmuSetSRP (d);
  9051:       break;
  9052:     case 0x808:  //PCR
  9053:       //  PCR
  9054:       //  31 30 29 28 27 26 25 24  23 22 21 20 19 18 17 16  15 14 13 12 11 10 9 8       7 6 5 4 3 2   1   0
  9055:       //   0  0  0  0  0  1  0  0   0  0  1  1  0  0  0  0     Revision Number     EDEBUG  Reserved DFP ESS
  9056:       //  bit31-16  Identification   0x0430
  9057:       //  bit15-8   Revision Number  1=F43G,5=G65V,6=E41J。偽物もあるらしい
  9058:       //  bit7      EDEBUG           Enable Debug Features
  9059:       //  bit6-2    Reserved
  9060:       //  bit1      DFP              Disable Floating-Point Unit。浮動小数点ユニット無効
  9061:       //  bit0      ESS              Enable Superscalar Dispatch。スーパースカラ有効
  9062:       XEiJ.mpuCycleCount += 11;
  9063:       XEiJ.mpuPCR = 0x04300000 | XEiJ.MPU_060_REV << 8 | d & 0x00000083;
  9064:       break;
  9065:     default:
  9066:       M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION;
  9067:       throw M68kException.m6eSignal;
  9068:     }
  9069:   }  //irpMovecToControl
  9070: 
  9071:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  9072:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  9073:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  9074:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  9075:   //JSR <ea>                                        |-|012346|-|-----|-----|  M  WXZP |0100_111_010_mmm_rrr
  9076:   //JBSR.L <label>                                  |A|012346|-|-----|-----|          |0100_111_010_111_001-{address}       [JSR <label>]
  9077:   public static void irpJsr () throws M68kException {
  9078:     XEiJ.mpuCycleCount++;
  9079:     //評価順序に注意。実効アドレスを求めてからspをデクリメントすること
  9080:     int a = efaJmpJsr (XEiJ.regOC & 63);
  9081:     m60Incremented -= 4L << (7 << 3);
  9082:     int sp = m60Address = XEiJ.regRn[15] -= 4;
  9083:     mmuWriteLongData (sp, XEiJ.regPC, XEiJ.regSRS);  //pushl
  9084:     irpSetPC (a);
  9085:   }  //irpJsr
  9086: 
  9087:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  9088:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  9089:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  9090:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  9091:   //JMP <ea>                                        |-|012346|-|-----|-----|  M  WXZP |0100_111_011_mmm_rrr
  9092:   //JBRA.L <label>                                  |A|012346|-|-----|-----|          |0100_111_011_111_001-{address}       [JMP <label>]
  9093:   public static void irpJmp () throws M68kException {
  9094:     XEiJ.mpuCycleCount++;  //0clkにしない
  9095:     irpSetPC (efaJmpJsr (XEiJ.regOC & 63));
  9096:   }  //irpJmp
  9097: 
  9098:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  9099:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  9100:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  9101:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  9102:   //ADDQ.B #<data>,<ea>                             |-|012346|-|UUUUU|*****|D M+-WXZ  |0101_qqq_000_mmm_rrr
  9103:   //INC.B <ea>                                      |A|012346|-|UUUUU|*****|D M+-WXZ  |0101_001_000_mmm_rrr [ADDQ.B #1,<ea>]
  9104:   public static void irpAddqByte () throws M68kException {
  9105:     int ea = XEiJ.regOC & 63;
  9106:     int x;
  9107:     int y = ((XEiJ.regOC >> 9) - 1 & 7) + 1;  //qqq==0?8:qqq
  9108:     int z;
  9109:     if (ea < XEiJ.EA_AR) {  //ADDQ.B #<data>,Dr
  9110:       XEiJ.mpuCycleCount++;
  9111:       z = (byte) (XEiJ.regRn[ea] = ~0xff & (x = XEiJ.regRn[ea]) | 0xff & (x = (byte) x) + y);
  9112:     } else {  //ADDQ.B #<data>,<mem>
  9113:       XEiJ.mpuCycleCount++;
  9114:       int a = efaMltByte (ea);
  9115:       mmuWriteByteData (a, z = (byte) ((x = mmuModifyByteSignData (a, XEiJ.regSRS)) + y), XEiJ.regSRS);
  9116:     }
  9117:     XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) |
  9118:            (~x & z) >>> 31 << 1 |
  9119:            (x & ~z) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C));  //ccr_addq
  9120:   }  //irpAddqByte
  9121: 
  9122:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  9123:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  9124:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  9125:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  9126:   //ADDQ.W #<data>,<ea>                             |-|012346|-|UUUUU|*****|D M+-WXZ  |0101_qqq_001_mmm_rrr
  9127:   //ADDQ.W #<data>,Ar                               |-|012346|-|-----|-----| A        |0101_qqq_001_001_rrr
  9128:   //INC.W <ea>                                      |A|012346|-|UUUUU|*****|D M+-WXZ  |0101_001_001_mmm_rrr [ADDQ.W #1,<ea>]
  9129:   //INC.W Ar                                        |A|012346|-|-----|-----| A        |0101_001_001_001_rrr [ADDQ.W #1,Ar]
  9130:   //
  9131:   //ADDQ.W #<data>,Ar
  9132:   //  ソースを符号拡張してロングで加算する
  9133:   public static void irpAddqWord () throws M68kException {
  9134:     int ea = XEiJ.regOC & 63;
  9135:     int y = ((XEiJ.regOC >> 9) - 1 & 7) + 1;  //qqq==0?8:qqq
  9136:     if (ea >> 3 == XEiJ.MMM_AR) {  //ADDQ.W #<data>,Ar
  9137:       XEiJ.mpuCycleCount++;
  9138:       XEiJ.regRn[ea] += y;  //ロングで計算する。このr[ea]はアドレスレジスタ
  9139:       //ccrは操作しない
  9140:     } else {
  9141:       int x;
  9142:       int z;
  9143:       if (ea < XEiJ.EA_AR) {  //ADDQ.W #<data>,Dr
  9144:         XEiJ.mpuCycleCount++;
  9145:         z = (short) (XEiJ.regRn[ea] = ~0xffff & (x = XEiJ.regRn[ea]) | (char) ((x = (short) x) + y));
  9146:       } else {  //ADDQ.W #<data>,<mem>
  9147:         XEiJ.mpuCycleCount++;
  9148:         int a = efaMltWord (ea);
  9149:         mmuWriteWordData (a, z = (short) ((x = mmuModifyWordSignData (a, XEiJ.regSRS)) + y), XEiJ.regSRS);
  9150:       }
  9151:       XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) |
  9152:              (~x & z) >>> 31 << 1 |
  9153:              (x & ~z) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C));  //ccr_addq
  9154:     }
  9155:   }  //irpAddqWord
  9156: 
  9157:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  9158:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  9159:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  9160:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  9161:   //ADDQ.L #<data>,<ea>                             |-|012346|-|UUUUU|*****|D M+-WXZ  |0101_qqq_010_mmm_rrr
  9162:   //ADDQ.L #<data>,Ar                               |-|012346|-|-----|-----| A        |0101_qqq_010_001_rrr
  9163:   //INC.L <ea>                                      |A|012346|-|UUUUU|*****|D M+-WXZ  |0101_001_010_mmm_rrr [ADDQ.L #1,<ea>]
  9164:   //INC.L Ar                                        |A|012346|-|-----|-----| A        |0101_001_010_001_rrr [ADDQ.L #1,Ar]
  9165:   public static void irpAddqLong () throws M68kException {
  9166:     int ea = XEiJ.regOC & 63;
  9167:     int y = ((XEiJ.regOC >> 9) - 1 & 7) + 1;  //qqq==0?8:qqq
  9168:     if (ea >> 3 == XEiJ.MMM_AR) {  //ADDQ.L #<data>,Ar
  9169:       XEiJ.mpuCycleCount++;
  9170:       XEiJ.regRn[ea] += y;  //このr[ea]はアドレスレジスタ
  9171:       //ccrは操作しない
  9172:     } else {
  9173:       int x;
  9174:       int z;
  9175:       if (ea < XEiJ.EA_AR) {  //ADDQ.L #<data>,Dr
  9176:         XEiJ.mpuCycleCount++;
  9177:         XEiJ.regRn[ea] = z = (x = XEiJ.regRn[ea]) + y;
  9178:       } else {  //ADDQ.L #<data>,<mem>
  9179:         XEiJ.mpuCycleCount++;
  9180:         int a = efaMltLong (ea);
  9181:         mmuWriteLongData (a, z = (x = mmuModifyLongData (a, XEiJ.regSRS)) + y, XEiJ.regSRS);
  9182:       }
  9183:       XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) |
  9184:              (~x & z) >>> 31 << 1 |
  9185:              (x & ~z) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C));  //ccr_addq
  9186:     }
  9187:   }  //irpAddqLong
  9188: 
  9189:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  9190:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  9191:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  9192:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  9193:   //ST.B <ea>                                       |-|012346|-|-----|-----|D M+-WXZ  |0101_000_011_mmm_rrr
  9194:   //SNF.B <ea>                                      |A|012346|-|-----|-----|D M+-WXZ  |0101_000_011_mmm_rrr [ST.B <ea>]
  9195:   //DBT.W Dr,<label>                                |-|012346|-|-----|-----|          |0101_000_011_001_rrr-{offset}
  9196:   //DBNF.W Dr,<label>                               |A|012346|-|-----|-----|          |0101_000_011_001_rrr-{offset}        [DBT.W Dr,<label>]
  9197:   //TRAPT.W #<data>                                 |-|--2346|-|-----|-----|          |0101_000_011_111_010-{data}
  9198:   //TPNF.W #<data>                                  |A|--2346|-|-----|-----|          |0101_000_011_111_010-{data}  [TRAPT.W #<data>]
  9199:   //TPT.W #<data>                                   |A|--2346|-|-----|-----|          |0101_000_011_111_010-{data}  [TRAPT.W #<data>]
  9200:   //TRAPNF.W #<data>                                |A|--2346|-|-----|-----|          |0101_000_011_111_010-{data}  [TRAPT.W #<data>]
  9201:   //TRAPT.L #<data>                                 |-|--2346|-|-----|-----|          |0101_000_011_111_011-{data}
  9202:   //TPNF.L #<data>                                  |A|--2346|-|-----|-----|          |0101_000_011_111_011-{data}  [TRAPT.L #<data>]
  9203:   //TPT.L #<data>                                   |A|--2346|-|-----|-----|          |0101_000_011_111_011-{data}  [TRAPT.L #<data>]
  9204:   //TRAPNF.L #<data>                                |A|--2346|-|-----|-----|          |0101_000_011_111_011-{data}  [TRAPT.L #<data>]
  9205:   //TRAPT                                           |-|--2346|-|-----|-----|          |0101_000_011_111_100
  9206:   //TPNF                                            |A|--2346|-|-----|-----|          |0101_000_011_111_100 [TRAPT]
  9207:   //TPT                                             |A|--2346|-|-----|-----|          |0101_000_011_111_100 [TRAPT]
  9208:   //TRAPNF                                          |A|--2346|-|-----|-----|          |0101_000_011_111_100 [TRAPT]
  9209:   public static void irpSt () throws M68kException {
  9210:     int ea = XEiJ.regOC & 63;
  9211:     //DBT.W Dr,<label>よりもST.B Drを優先する
  9212:     if (ea < XEiJ.EA_AR) {  //ST.B Dr
  9213:       XEiJ.mpuCycleCount++;
  9214:       XEiJ.regRn[ea] |= 0xff;
  9215:     } else if (ea < XEiJ.EA_MM) {  //DBT.W Dr,<label>
  9216:       int t = XEiJ.regPC;  //pc0+2
  9217:       XEiJ.regPC = t + 2;  //pc0+4
  9218:       t += mmuReadWordSignExword (t, XEiJ.regSRS);  //pc0+2+16bitディスプレースメント
  9219:       if ((t & 1) != 0) {  //分岐先のアドレスが奇数
  9220:         //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ
  9221:         irpBccAddressError (t);
  9222:       }
  9223:       //条件が成立しているので通過
  9224:       XEiJ.mpuCycleCount += 2;
  9225:     } else if ((XEiJ.EAM_PW | XEiJ.EAM_PX | XEiJ.EAM_IM) << ea < 0L) {  //TRAPT.W/TRAPT.L/TRAPT
  9226:       if (ea == 072) {  //.W
  9227:         mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);
  9228:       } else if (ea == 073) {  //.L
  9229:         mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS);
  9230:       }
  9231:       //条件が成立しているのでTRAPする
  9232:       m60Address = XEiJ.regPC0;  //アドレスは命令の先頭
  9233:       M68kException.m6eNumber = M68kException.M6E_TRAPV_INSTRUCTION;
  9234:       throw M68kException.m6eSignal;
  9235:     } else {  //ST.B <mem>
  9236:       XEiJ.mpuCycleCount++;
  9237:       mmuWriteByteData (efaMltByte (ea), 0xff, XEiJ.regSRS);
  9238:     }
  9239:   }  //irpSt
  9240: 
  9241:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  9242:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  9243:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  9244:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  9245:   //SUBQ.B #<data>,<ea>                             |-|012346|-|UUUUU|*****|D M+-WXZ  |0101_qqq_100_mmm_rrr
  9246:   //DEC.B <ea>                                      |A|012346|-|UUUUU|*****|D M+-WXZ  |0101_001_100_mmm_rrr [SUBQ.B #1,<ea>]
  9247:   public static void irpSubqByte () throws M68kException {
  9248:     int ea = XEiJ.regOC & 63;
  9249:     int x;
  9250:     int y = ((XEiJ.regOC >> 9) - 1 & 7) + 1;  //qqq==0?8:qqq
  9251:     int z;
  9252:     if (ea < XEiJ.EA_AR) {  //SUBQ.B #<data>,Dr
  9253:       XEiJ.mpuCycleCount++;
  9254:       z = (byte) (XEiJ.regRn[ea] = ~0xff & (x = XEiJ.regRn[ea]) | 0xff & (x = (byte) x) - y);
  9255:     } else {  //SUBQ.B #<data>,<mem>
  9256:       XEiJ.mpuCycleCount++;
  9257:       int a = efaMltByte (ea);
  9258:       mmuWriteByteData (a, z = (byte) ((x = mmuModifyByteSignData (a, XEiJ.regSRS)) - y), XEiJ.regSRS);
  9259:     }
  9260:     XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) |
  9261:            (x & ~z) >>> 31 << 1 |
  9262:            (~x & z) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C));  //ccr_subq
  9263:   }  //irpSubqByte
  9264: 
  9265:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  9266:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  9267:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  9268:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  9269:   //SUBQ.W #<data>,<ea>                             |-|012346|-|UUUUU|*****|D M+-WXZ  |0101_qqq_101_mmm_rrr
  9270:   //SUBQ.W #<data>,Ar                               |-|012346|-|-----|-----| A        |0101_qqq_101_001_rrr
  9271:   //DEC.W <ea>                                      |A|012346|-|UUUUU|*****|D M+-WXZ  |0101_001_101_mmm_rrr [SUBQ.W #1,<ea>]
  9272:   //DEC.W Ar                                        |A|012346|-|-----|-----| A        |0101_001_101_001_rrr [SUBQ.W #1,Ar]
  9273:   //
  9274:   //SUBQ.W #<data>,Ar
  9275:   //  ソースを符号拡張してロングで減算する
  9276:   public static void irpSubqWord () throws M68kException {
  9277:     int ea = XEiJ.regOC & 63;
  9278:     int y = ((XEiJ.regOC >> 9) - 1 & 7) + 1;  //qqq==0?8:qqq
  9279:     if (ea >> 3 == XEiJ.MMM_AR) {  //SUBQ.W #<data>,Ar
  9280:       XEiJ.mpuCycleCount++;
  9281:       XEiJ.regRn[ea] -= y;  //ロングで計算する。このr[ea]はアドレスレジスタ
  9282:       //ccrは操作しない
  9283:     } else {
  9284:       int x;
  9285:       int z;
  9286:       if (ea < XEiJ.EA_AR) {  //SUBQ.W #<data>,Dr
  9287:         XEiJ.mpuCycleCount++;
  9288:         z = (short) (XEiJ.regRn[ea] = ~0xffff & (x = XEiJ.regRn[ea]) | (char) ((x = (short) x) - y));
  9289:       } else {  //SUBQ.W #<data>,<mem>
  9290:         XEiJ.mpuCycleCount++;
  9291:         int a = efaMltWord (ea);
  9292:         mmuWriteWordData (a, z = (short) ((x = mmuModifyWordSignData (a, XEiJ.regSRS)) - y), XEiJ.regSRS);
  9293:       }
  9294:       XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) |
  9295:              (x & ~z) >>> 31 << 1 |
  9296:              (~x & z) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C));  //ccr_subq
  9297:     }
  9298:   }  //irpSubqWord
  9299: 
  9300:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  9301:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  9302:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  9303:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  9304:   //SUBQ.L #<data>,<ea>                             |-|012346|-|UUUUU|*****|D M+-WXZ  |0101_qqq_110_mmm_rrr
  9305:   //SUBQ.L #<data>,Ar                               |-|012346|-|-----|-----| A        |0101_qqq_110_001_rrr
  9306:   //DEC.L <ea>                                      |A|012346|-|UUUUU|*****|D M+-WXZ  |0101_001_110_mmm_rrr [SUBQ.L #1,<ea>]
  9307:   //DEC.L Ar                                        |A|012346|-|-----|-----| A        |0101_001_110_001_rrr [SUBQ.L #1,Ar]
  9308:   public static void irpSubqLong () throws M68kException {
  9309:     int ea = XEiJ.regOC & 63;
  9310:     int y = ((XEiJ.regOC >> 9) - 1 & 7) + 1;  //qqq==0?8:qqq
  9311:     if (ea >> 3 == XEiJ.MMM_AR) {  //SUBQ.L #<data>,Ar
  9312:       XEiJ.mpuCycleCount++;
  9313:       XEiJ.regRn[ea] -= y;  //このr[ea]はアドレスレジスタ
  9314:       //ccrは操作しない
  9315:     } else {
  9316:       int x;
  9317:       int z;
  9318:       if (ea < XEiJ.EA_AR) {  //SUBQ.L #<data>,Dr
  9319:         XEiJ.mpuCycleCount++;
  9320:         XEiJ.regRn[ea] = z = (x = XEiJ.regRn[ea]) - y;
  9321:       } else {  //SUBQ.L #<data>,<mem>
  9322:         XEiJ.mpuCycleCount++;
  9323:         int a = efaMltLong (ea);
  9324:         mmuWriteLongData (a, z = (x = mmuModifyLongData (a, XEiJ.regSRS)) - y, XEiJ.regSRS);
  9325:       }
  9326:       XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) |
  9327:              (x & ~z) >>> 31 << 1 |
  9328:              (~x & z) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C));  //ccr_subq
  9329:     }
  9330:   }  //irpSubqLong
  9331: 
  9332:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  9333:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  9334:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  9335:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  9336:   //SF.B <ea>                                       |-|012346|-|-----|-----|D M+-WXZ  |0101_000_111_mmm_rrr
  9337:   //SNT.B <ea>                                      |A|012346|-|-----|-----|D M+-WXZ  |0101_000_111_mmm_rrr [SF.B <ea>]
  9338:   //DBF.W Dr,<label>                                |-|012346|-|-----|-----|          |0101_000_111_001_rrr-{offset}
  9339:   //DBNT.W Dr,<label>                               |A|012346|-|-----|-----|          |0101_000_111_001_rrr-{offset}        [DBF.W Dr,<label>]
  9340:   //DBRA.W Dr,<label>                               |A|012346|-|-----|-----|          |0101_000_111_001_rrr-{offset}        [DBF.W Dr,<label>]
  9341:   //TRAPF.W #<data>                                 |-|--2346|-|-----|-----|          |0101_000_111_111_010-{data}
  9342:   //TPF.W #<data>                                   |A|--2346|-|-----|-----|          |0101_000_111_111_010-{data}  [TRAPF.W #<data>]
  9343:   //TPNT.W #<data>                                  |A|--2346|-|-----|-----|          |0101_000_111_111_010-{data}  [TRAPF.W #<data>]
  9344:   //TRAPNT.W #<data>                                |A|--2346|-|-----|-----|          |0101_000_111_111_010-{data}  [TRAPF.W #<data>]
  9345:   //TRAPF.L #<data>                                 |-|--2346|-|-----|-----|          |0101_000_111_111_011-{data}
  9346:   //TPF.L #<data>                                   |A|--2346|-|-----|-----|          |0101_000_111_111_011-{data}  [TRAPF.L #<data>]
  9347:   //TPNT.L #<data>                                  |A|--2346|-|-----|-----|          |0101_000_111_111_011-{data}  [TRAPF.L #<data>]
  9348:   //TRAPNT.L #<data>                                |A|--2346|-|-----|-----|          |0101_000_111_111_011-{data}  [TRAPF.L #<data>]
  9349:   //TRAPF                                           |-|--2346|-|-----|-----|          |0101_000_111_111_100
  9350:   //TPF                                             |A|--2346|-|-----|-----|          |0101_000_111_111_100 [TRAPF]
  9351:   //TPNT                                            |A|--2346|-|-----|-----|          |0101_000_111_111_100 [TRAPF]
  9352:   //TRAPNT                                          |A|--2346|-|-----|-----|          |0101_000_111_111_100 [TRAPF]
  9353:   public static void irpSf () throws M68kException {
  9354:     int ea = XEiJ.regOC & 63;
  9355:     //DBRA.W Dr,<label>よりもSF.B Drを優先する
  9356:     if (ea < XEiJ.EA_AR) {  //SF.B Dr
  9357:       XEiJ.mpuCycleCount++;
  9358:       XEiJ.regRn[ea] &= ~0xff;
  9359:     } else if (ea < XEiJ.EA_MM) {  //DBRA.W Dr,<label>
  9360:       int t = XEiJ.regPC;  //pc0+2
  9361:       XEiJ.regPC = t + 2;  //pc0+4
  9362:       t += mmuReadWordSignExword (t, XEiJ.regSRS);  //pc0+2+16bitディスプレースメント
  9363:       if ((t & 1) != 0) {  //分岐先のアドレスが奇数
  9364:         //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ
  9365:         irpBccAddressError (t);
  9366:       }
  9367:       //条件が成立していないのでデクリメント
  9368:       int rrr = XEiJ.regOC & 7;
  9369:       int s = XEiJ.regRn[rrr];
  9370:       if ((short) s == 0) {  //Drの下位16bitが0なので通過
  9371:         XEiJ.mpuCycleCount += 2;
  9372:         XEiJ.regRn[rrr] = s + 65535;
  9373:       } else {  //Drの下位16bitが0でないので分岐
  9374:         XEiJ.mpuCycleCount++;
  9375:         XEiJ.regRn[rrr] = s - 1;  //下位16bitが0でないので上位16bitは変化しない
  9376:         irpSetPC (t);
  9377:       }
  9378:     } else if ((XEiJ.EAM_PW | XEiJ.EAM_PX | XEiJ.EAM_IM) << ea < 0L) {  //TRAPF.W/TRAPF.L/TRAPF
  9379:       if (ea == 072) {  //.W
  9380:         mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);
  9381:       } else if (ea == 073) {  //.L
  9382:         mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS);
  9383:       }
  9384:       //条件が成立していないのでTRAPしない
  9385:       XEiJ.mpuCycleCount++;
  9386:     } else {  //SF.B <mem>
  9387:       XEiJ.mpuCycleCount++;
  9388:       mmuWriteByteData (efaMltByte (ea), 0x00, XEiJ.regSRS);
  9389:     }
  9390:   }  //irpSf
  9391: 
  9392:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  9393:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  9394:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  9395:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  9396:   //SHI.B <ea>                                      |-|012346|-|--*-*|-----|D M+-WXZ  |0101_001_011_mmm_rrr
  9397:   //SNLS.B <ea>                                     |A|012346|-|--*-*|-----|D M+-WXZ  |0101_001_011_mmm_rrr [SHI.B <ea>]
  9398:   //DBHI.W Dr,<label>                               |-|012346|-|--*-*|-----|          |0101_001_011_001_rrr-{offset}
  9399:   //DBNLS.W Dr,<label>                              |A|012346|-|--*-*|-----|          |0101_001_011_001_rrr-{offset}        [DBHI.W Dr,<label>]
  9400:   //TRAPHI.W #<data>                                |-|--2346|-|--*-*|-----|          |0101_001_011_111_010-{data}
  9401:   //TPHI.W #<data>                                  |A|--2346|-|--*-*|-----|          |0101_001_011_111_010-{data}  [TRAPHI.W #<data>]
  9402:   //TPNLS.W #<data>                                 |A|--2346|-|--*-*|-----|          |0101_001_011_111_010-{data}  [TRAPHI.W #<data>]
  9403:   //TRAPNLS.W #<data>                               |A|--2346|-|--*-*|-----|          |0101_001_011_111_010-{data}  [TRAPHI.W #<data>]
  9404:   //TRAPHI.L #<data>                                |-|--2346|-|--*-*|-----|          |0101_001_011_111_011-{data}
  9405:   //TPHI.L #<data>                                  |A|--2346|-|--*-*|-----|          |0101_001_011_111_011-{data}  [TRAPHI.L #<data>]
  9406:   //TPNLS.L #<data>                                 |A|--2346|-|--*-*|-----|          |0101_001_011_111_011-{data}  [TRAPHI.L #<data>]
  9407:   //TRAPNLS.L #<data>                               |A|--2346|-|--*-*|-----|          |0101_001_011_111_011-{data}  [TRAPHI.L #<data>]
  9408:   //TRAPHI                                          |-|--2346|-|--*-*|-----|          |0101_001_011_111_100
  9409:   //TPHI                                            |A|--2346|-|--*-*|-----|          |0101_001_011_111_100 [TRAPHI]
  9410:   //TPNLS                                           |A|--2346|-|--*-*|-----|          |0101_001_011_111_100 [TRAPHI]
  9411:   //TRAPNLS                                         |A|--2346|-|--*-*|-----|          |0101_001_011_111_100 [TRAPHI]
  9412:   public static void irpShi () throws M68kException {
  9413:     int ea = XEiJ.regOC & 63;
  9414:     if (ea >> 3 == XEiJ.MMM_AR) {  //DBHI.W Dr,<label>
  9415:       int t = XEiJ.regPC;  //pc0+2
  9416:       XEiJ.regPC = t + 2;  //pc0+4
  9417:       t += mmuReadWordSignExword (t, XEiJ.regSRS);  //pc0+2+16bitディスプレースメント
  9418:       if ((t & 1) != 0) {  //分岐先のアドレスが奇数
  9419:         //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ
  9420:         irpBccAddressError (t);
  9421:       }
  9422:       if (XEiJ.MPU_CC_HI << XEiJ.regCCR < 0) {  //条件が成立しているので通過
  9423:         XEiJ.mpuCycleCount += 2;
  9424:       } else {  //条件が成立していないのでデクリメント
  9425:         int rrr = XEiJ.regOC & 7;
  9426:         int s = XEiJ.regRn[rrr];
  9427:         if ((short) s == 0) {  //Drの下位16bitが0なので通過
  9428:           XEiJ.mpuCycleCount += 2;
  9429:           XEiJ.regRn[rrr] = s + 65535;
  9430:         } else {  //Drの下位16bitが0でないので分岐
  9431:           XEiJ.mpuCycleCount++;
  9432:           XEiJ.regRn[rrr] = s - 1;  //下位16bitが0でないので上位16bitは変化しない
  9433:           irpSetPC (t);
  9434:         }
  9435:       }
  9436:     } else if (ea < XEiJ.EA_AR) {  //SHI.B Dr
  9437:       if (XEiJ.MPU_CC_HI << XEiJ.regCCR < 0) {  //セット
  9438:         XEiJ.mpuCycleCount++;
  9439:         XEiJ.regRn[ea] |= 0xff;
  9440:       } else {  //クリア
  9441:         XEiJ.mpuCycleCount++;
  9442:         XEiJ.regRn[ea] &= ~0xff;
  9443:       }
  9444:     } else if ((XEiJ.EAM_PW | XEiJ.EAM_PX | XEiJ.EAM_IM) << ea < 0L) {  //TRAPHI.W/TRAPHI.L/TRAPHI
  9445:       if (ea == 072) {  //.W
  9446:         mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);
  9447:       } else if (ea == 073) {  //.L
  9448:         mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS);
  9449:       }
  9450:       if (XEiJ.MPU_CC_HI << XEiJ.regCCR < 0) {
  9451:         //条件が成立しているのでTRAPする
  9452:         m60Address = XEiJ.regPC0;  //アドレスは命令の先頭
  9453:         M68kException.m6eNumber = M68kException.M6E_TRAPV_INSTRUCTION;
  9454:         throw M68kException.m6eSignal;
  9455:       } else {
  9456:         //条件が成立していないのでTRAPしない
  9457:         XEiJ.mpuCycleCount++;
  9458:       }
  9459:     } else {  //SHI.B <mem>
  9460:       XEiJ.mpuCycleCount++;
  9461:       mmuWriteByteData (efaMltByte (ea), XEiJ.MPU_CC_HI << XEiJ.regCCR >> 31, XEiJ.regSRS);
  9462:     }
  9463:   }  //irpShi
  9464: 
  9465:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  9466:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  9467:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  9468:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  9469:   //SLS.B <ea>                                      |-|012346|-|--*-*|-----|D M+-WXZ  |0101_001_111_mmm_rrr
  9470:   //SNHI.B <ea>                                     |A|012346|-|--*-*|-----|D M+-WXZ  |0101_001_111_mmm_rrr [SLS.B <ea>]
  9471:   //DBLS.W Dr,<label>                               |-|012346|-|--*-*|-----|          |0101_001_111_001_rrr-{offset}
  9472:   //DBNHI.W Dr,<label>                              |A|012346|-|--*-*|-----|          |0101_001_111_001_rrr-{offset}        [DBLS.W Dr,<label>]
  9473:   //TRAPLS.W #<data>                                |-|--2346|-|--*-*|-----|          |0101_001_111_111_010-{data}
  9474:   //TPLS.W #<data>                                  |A|--2346|-|--*-*|-----|          |0101_001_111_111_010-{data}  [TRAPLS.W #<data>]
  9475:   //TPNHI.W #<data>                                 |A|--2346|-|--*-*|-----|          |0101_001_111_111_010-{data}  [TRAPLS.W #<data>]
  9476:   //TRAPNHI.W #<data>                               |A|--2346|-|--*-*|-----|          |0101_001_111_111_010-{data}  [TRAPLS.W #<data>]
  9477:   //TRAPLS.L #<data>                                |-|--2346|-|--*-*|-----|          |0101_001_111_111_011-{data}
  9478:   //TPLS.L #<data>                                  |A|--2346|-|--*-*|-----|          |0101_001_111_111_011-{data}  [TRAPLS.L #<data>]
  9479:   //TPNHI.L #<data>                                 |A|--2346|-|--*-*|-----|          |0101_001_111_111_011-{data}  [TRAPLS.L #<data>]
  9480:   //TRAPNHI.L #<data>                               |A|--2346|-|--*-*|-----|          |0101_001_111_111_011-{data}  [TRAPLS.L #<data>]
  9481:   //TRAPLS                                          |-|--2346|-|--*-*|-----|          |0101_001_111_111_100
  9482:   //TPLS                                            |A|--2346|-|--*-*|-----|          |0101_001_111_111_100 [TRAPLS]
  9483:   //TPNHI                                           |A|--2346|-|--*-*|-----|          |0101_001_111_111_100 [TRAPLS]
  9484:   //TRAPNHI                                         |A|--2346|-|--*-*|-----|          |0101_001_111_111_100 [TRAPLS]
  9485:   public static void irpSls () throws M68kException {
  9486:     int ea = XEiJ.regOC & 63;
  9487:     if (ea >> 3 == XEiJ.MMM_AR) {  //DBLS.W Dr,<label>
  9488:       int t = XEiJ.regPC;  //pc0+2
  9489:       XEiJ.regPC = t + 2;  //pc0+4
  9490:       t += mmuReadWordSignExword (t, XEiJ.regSRS);  //pc0+2+16bitディスプレースメント
  9491:       if ((t & 1) != 0) {  //分岐先のアドレスが奇数
  9492:         //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ
  9493:         irpBccAddressError (t);
  9494:       }
  9495:       if (XEiJ.MPU_CC_LS << XEiJ.regCCR < 0) {  //条件が成立しているので通過
  9496:         XEiJ.mpuCycleCount += 2;
  9497:       } else {  //条件が成立していないのでデクリメント
  9498:         int rrr = XEiJ.regOC & 7;
  9499:         int s = XEiJ.regRn[rrr];
  9500:         if ((short) s == 0) {  //Drの下位16bitが0なので通過
  9501:           XEiJ.mpuCycleCount += 2;
  9502:           XEiJ.regRn[rrr] = s + 65535;
  9503:         } else {  //Drの下位16bitが0でないので分岐
  9504:           XEiJ.mpuCycleCount++;
  9505:           XEiJ.regRn[rrr] = s - 1;  //下位16bitが0でないので上位16bitは変化しない
  9506:           irpSetPC (t);
  9507:         }
  9508:       }
  9509:     } else if (ea < XEiJ.EA_AR) {  //SLS.B Dr
  9510:       if (XEiJ.MPU_CC_LS << XEiJ.regCCR < 0) {  //セット
  9511:         XEiJ.mpuCycleCount++;
  9512:         XEiJ.regRn[ea] |= 0xff;
  9513:       } else {  //クリア
  9514:         XEiJ.mpuCycleCount++;
  9515:         XEiJ.regRn[ea] &= ~0xff;
  9516:       }
  9517:     } else if ((XEiJ.EAM_PW | XEiJ.EAM_PX | XEiJ.EAM_IM) << ea < 0L) {  //TRAPLS.W/TRAPLS.L/TRAPLS
  9518:       if (ea == 072) {  //.W
  9519:         mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);
  9520:       } else if (ea == 073) {  //.L
  9521:         mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS);
  9522:       }
  9523:       if (XEiJ.MPU_CC_LS << XEiJ.regCCR < 0) {
  9524:         //条件が成立しているのでTRAPする
  9525:         m60Address = XEiJ.regPC0;  //アドレスは命令の先頭
  9526:         M68kException.m6eNumber = M68kException.M6E_TRAPV_INSTRUCTION;
  9527:         throw M68kException.m6eSignal;
  9528:       } else {
  9529:         //条件が成立していないのでTRAPしない
  9530:         XEiJ.mpuCycleCount++;
  9531:       }
  9532:     } else {  //SLS.B <mem>
  9533:       XEiJ.mpuCycleCount++;
  9534:       mmuWriteByteData (efaMltByte (ea), XEiJ.MPU_CC_LS << XEiJ.regCCR >> 31, XEiJ.regSRS);
  9535:     }
  9536:   }  //irpSls
  9537: 
  9538:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  9539:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  9540:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  9541:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  9542:   //SCC.B <ea>                                      |-|012346|-|----*|-----|D M+-WXZ  |0101_010_011_mmm_rrr
  9543:   //SHS.B <ea>                                      |A|012346|-|----*|-----|D M+-WXZ  |0101_010_011_mmm_rrr [SCC.B <ea>]
  9544:   //SNCS.B <ea>                                     |A|012346|-|----*|-----|D M+-WXZ  |0101_010_011_mmm_rrr [SCC.B <ea>]
  9545:   //SNLO.B <ea>                                     |A|012346|-|----*|-----|D M+-WXZ  |0101_010_011_mmm_rrr [SCC.B <ea>]
  9546:   //DBCC.W Dr,<label>                               |-|012346|-|----*|-----|          |0101_010_011_001_rrr-{offset}
  9547:   //DBHS.W Dr,<label>                               |A|012346|-|----*|-----|          |0101_010_011_001_rrr-{offset}        [DBCC.W Dr,<label>]
  9548:   //DBNCS.W Dr,<label>                              |A|012346|-|----*|-----|          |0101_010_011_001_rrr-{offset}        [DBCC.W Dr,<label>]
  9549:   //DBNLO.W Dr,<label>                              |A|012346|-|----*|-----|          |0101_010_011_001_rrr-{offset}        [DBCC.W Dr,<label>]
  9550:   //TRAPCC.W #<data>                                |-|--2346|-|----*|-----|          |0101_010_011_111_010-{data}
  9551:   //TPCC.W #<data>                                  |A|--2346|-|----*|-----|          |0101_010_011_111_010-{data}  [TRAPCC.W #<data>]
  9552:   //TPHS.W #<data>                                  |A|--2346|-|----*|-----|          |0101_010_011_111_010-{data}  [TRAPCC.W #<data>]
  9553:   //TPNCS.W #<data>                                 |A|--2346|-|----*|-----|          |0101_010_011_111_010-{data}  [TRAPCC.W #<data>]
  9554:   //TPNLO.W #<data>                                 |A|--2346|-|----*|-----|          |0101_010_011_111_010-{data}  [TRAPCC.W #<data>]
  9555:   //TRAPHS.W #<data>                                |A|--2346|-|----*|-----|          |0101_010_011_111_010-{data}  [TRAPCC.W #<data>]
  9556:   //TRAPNCS.W #<data>                               |A|--2346|-|----*|-----|          |0101_010_011_111_010-{data}  [TRAPCC.W #<data>]
  9557:   //TRAPNLO.W #<data>                               |A|--2346|-|----*|-----|          |0101_010_011_111_010-{data}  [TRAPCC.W #<data>]
  9558:   //TRAPCC.L #<data>                                |-|--2346|-|----*|-----|          |0101_010_011_111_011-{data}
  9559:   //TPCC.L #<data>                                  |A|--2346|-|----*|-----|          |0101_010_011_111_011-{data}  [TRAPCC.L #<data>]
  9560:   //TPHS.L #<data>                                  |A|--2346|-|----*|-----|          |0101_010_011_111_011-{data}  [TRAPCC.L #<data>]
  9561:   //TPNCS.L #<data>                                 |A|--2346|-|----*|-----|          |0101_010_011_111_011-{data}  [TRAPCC.L #<data>]
  9562:   //TPNLO.L #<data>                                 |A|--2346|-|----*|-----|          |0101_010_011_111_011-{data}  [TRAPCC.L #<data>]
  9563:   //TRAPHS.L #<data>                                |A|--2346|-|----*|-----|          |0101_010_011_111_011-{data}  [TRAPCC.L #<data>]
  9564:   //TRAPNCS.L #<data>                               |A|--2346|-|----*|-----|          |0101_010_011_111_011-{data}  [TRAPCC.L #<data>]
  9565:   //TRAPNLO.L #<data>                               |A|--2346|-|----*|-----|          |0101_010_011_111_011-{data}  [TRAPCC.L #<data>]
  9566:   //TRAPCC                                          |-|--2346|-|----*|-----|          |0101_010_011_111_100
  9567:   //TPCC                                            |A|--2346|-|----*|-----|          |0101_010_011_111_100 [TRAPCC]
  9568:   //TPHS                                            |A|--2346|-|----*|-----|          |0101_010_011_111_100 [TRAPCC]
  9569:   //TPNCS                                           |A|--2346|-|----*|-----|          |0101_010_011_111_100 [TRAPCC]
  9570:   //TPNLO                                           |A|--2346|-|----*|-----|          |0101_010_011_111_100 [TRAPCC]
  9571:   //TRAPHS                                          |A|--2346|-|----*|-----|          |0101_010_011_111_100 [TRAPCC]
  9572:   //TRAPNCS                                         |A|--2346|-|----*|-----|          |0101_010_011_111_100 [TRAPCC]
  9573:   //TRAPNLO                                         |A|--2346|-|----*|-----|          |0101_010_011_111_100 [TRAPCC]
  9574:   public static void irpShs () throws M68kException {
  9575:     int ea = XEiJ.regOC & 63;
  9576:     if (ea >> 3 == XEiJ.MMM_AR) {  //DBHS.W Dr,<label>
  9577:       int t = XEiJ.regPC;  //pc0+2
  9578:       XEiJ.regPC = t + 2;  //pc0+4
  9579:       t += mmuReadWordSignExword (t, XEiJ.regSRS);  //pc0+2+16bitディスプレースメント
  9580:       if ((t & 1) != 0) {  //分岐先のアドレスが奇数
  9581:         //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ
  9582:         irpBccAddressError (t);
  9583:       }
  9584:       if (XEiJ.MPU_CC_HS << XEiJ.regCCR < 0) {  //条件が成立しているので通過
  9585:         XEiJ.mpuCycleCount += 2;
  9586:       } else {  //条件が成立していないのでデクリメント
  9587:         int rrr = XEiJ.regOC & 7;
  9588:         int s = XEiJ.regRn[rrr];
  9589:         if ((short) s == 0) {  //Drの下位16bitが0なので通過
  9590:           XEiJ.mpuCycleCount += 2;
  9591:           XEiJ.regRn[rrr] = s + 65535;
  9592:         } else {  //Drの下位16bitが0でないので分岐
  9593:           XEiJ.mpuCycleCount++;
  9594:           XEiJ.regRn[rrr] = s - 1;  //下位16bitが0でないので上位16bitは変化しない
  9595:           irpSetPC (t);
  9596:         }
  9597:       }
  9598:     } else if (ea < XEiJ.EA_AR) {  //SHS.B Dr
  9599:       if (XEiJ.MPU_CC_HS << XEiJ.regCCR < 0) {  //セット
  9600:         XEiJ.mpuCycleCount++;
  9601:         XEiJ.regRn[ea] |= 0xff;
  9602:       } else {  //クリア
  9603:         XEiJ.mpuCycleCount++;
  9604:         XEiJ.regRn[ea] &= ~0xff;
  9605:       }
  9606:     } else if ((XEiJ.EAM_PW | XEiJ.EAM_PX | XEiJ.EAM_IM) << ea < 0L) {  //TRAPHS.W/TRAPHS.L/TRAPHS
  9607:       if (ea == 072) {  //.W
  9608:         mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);
  9609:       } else if (ea == 073) {  //.L
  9610:         mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS);
  9611:       }
  9612:       if (XEiJ.MPU_CC_HS << XEiJ.regCCR < 0) {
  9613:         //条件が成立しているのでTRAPする
  9614:         m60Address = XEiJ.regPC0;  //アドレスは命令の先頭
  9615:         M68kException.m6eNumber = M68kException.M6E_TRAPV_INSTRUCTION;
  9616:         throw M68kException.m6eSignal;
  9617:       } else {
  9618:         //条件が成立していないのでTRAPしない
  9619:         XEiJ.mpuCycleCount++;
  9620:       }
  9621:     } else {  //SHS.B <mem>
  9622:       XEiJ.mpuCycleCount++;
  9623:       mmuWriteByteData (efaMltByte (ea), XEiJ.MPU_CC_HS << XEiJ.regCCR >> 31, XEiJ.regSRS);
  9624:     }
  9625:   }  //irpShs
  9626: 
  9627:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  9628:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  9629:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  9630:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  9631:   //SCS.B <ea>                                      |-|012346|-|----*|-----|D M+-WXZ  |0101_010_111_mmm_rrr
  9632:   //SLO.B <ea>                                      |A|012346|-|----*|-----|D M+-WXZ  |0101_010_111_mmm_rrr [SCS.B <ea>]
  9633:   //SNCC.B <ea>                                     |A|012346|-|----*|-----|D M+-WXZ  |0101_010_111_mmm_rrr [SCS.B <ea>]
  9634:   //SNHS.B <ea>                                     |A|012346|-|----*|-----|D M+-WXZ  |0101_010_111_mmm_rrr [SCS.B <ea>]
  9635:   //DBCS.W Dr,<label>                               |-|012346|-|----*|-----|          |0101_010_111_001_rrr-{offset}
  9636:   //DBLO.W Dr,<label>                               |A|012346|-|----*|-----|          |0101_010_111_001_rrr-{offset}        [DBCS.W Dr,<label>]
  9637:   //DBNCC.W Dr,<label>                              |A|012346|-|----*|-----|          |0101_010_111_001_rrr-{offset}        [DBCS.W Dr,<label>]
  9638:   //DBNHS.W Dr,<label>                              |A|012346|-|----*|-----|          |0101_010_111_001_rrr-{offset}        [DBCS.W Dr,<label>]
  9639:   //TRAPCS.W #<data>                                |-|--2346|-|----*|-----|          |0101_010_111_111_010-{data}
  9640:   //TPCS.W #<data>                                  |A|--2346|-|----*|-----|          |0101_010_111_111_010-{data}  [TRAPCS.W #<data>]
  9641:   //TPLO.W #<data>                                  |A|--2346|-|----*|-----|          |0101_010_111_111_010-{data}  [TRAPCS.W #<data>]
  9642:   //TPNCC.W #<data>                                 |A|--2346|-|----*|-----|          |0101_010_111_111_010-{data}  [TRAPCS.W #<data>]
  9643:   //TPNHS.W #<data>                                 |A|--2346|-|----*|-----|          |0101_010_111_111_010-{data}  [TRAPCS.W #<data>]
  9644:   //TRAPLO.W #<data>                                |A|--2346|-|----*|-----|          |0101_010_111_111_010-{data}  [TRAPCS.W #<data>]
  9645:   //TRAPNCC.W #<data>                               |A|--2346|-|----*|-----|          |0101_010_111_111_010-{data}  [TRAPCS.W #<data>]
  9646:   //TRAPNHS.W #<data>                               |A|--2346|-|----*|-----|          |0101_010_111_111_010-{data}  [TRAPCS.W #<data>]
  9647:   //TRAPCS.L #<data>                                |-|--2346|-|----*|-----|          |0101_010_111_111_011-{data}
  9648:   //TPCS.L #<data>                                  |A|--2346|-|----*|-----|          |0101_010_111_111_011-{data}  [TRAPCS.L #<data>]
  9649:   //TPLO.L #<data>                                  |A|--2346|-|----*|-----|          |0101_010_111_111_011-{data}  [TRAPCS.L #<data>]
  9650:   //TPNCC.L #<data>                                 |A|--2346|-|----*|-----|          |0101_010_111_111_011-{data}  [TRAPCS.L #<data>]
  9651:   //TPNHS.L #<data>                                 |A|--2346|-|----*|-----|          |0101_010_111_111_011-{data}  [TRAPCS.L #<data>]
  9652:   //TRAPLO.L #<data>                                |A|--2346|-|----*|-----|          |0101_010_111_111_011-{data}  [TRAPCS.L #<data>]
  9653:   //TRAPNCC.L #<data>                               |A|--2346|-|----*|-----|          |0101_010_111_111_011-{data}  [TRAPCS.L #<data>]
  9654:   //TRAPNHS.L #<data>                               |A|--2346|-|----*|-----|          |0101_010_111_111_011-{data}  [TRAPCS.L #<data>]
  9655:   //TRAPCS                                          |-|--2346|-|----*|-----|          |0101_010_111_111_100
  9656:   //TPCS                                            |A|--2346|-|----*|-----|          |0101_010_111_111_100 [TRAPCS]
  9657:   //TPLO                                            |A|--2346|-|----*|-----|          |0101_010_111_111_100 [TRAPCS]
  9658:   //TPNCC                                           |A|--2346|-|----*|-----|          |0101_010_111_111_100 [TRAPCS]
  9659:   //TPNHS                                           |A|--2346|-|----*|-----|          |0101_010_111_111_100 [TRAPCS]
  9660:   //TRAPLO                                          |A|--2346|-|----*|-----|          |0101_010_111_111_100 [TRAPCS]
  9661:   //TRAPNCC                                         |A|--2346|-|----*|-----|          |0101_010_111_111_100 [TRAPCS]
  9662:   //TRAPNHS                                         |A|--2346|-|----*|-----|          |0101_010_111_111_100 [TRAPCS]
  9663:   public static void irpSlo () throws M68kException {
  9664:     int ea = XEiJ.regOC & 63;
  9665:     if (ea >> 3 == XEiJ.MMM_AR) {  //DBLO.W Dr,<label>
  9666:       int t = XEiJ.regPC;  //pc0+2
  9667:       XEiJ.regPC = t + 2;  //pc0+4
  9668:       t += mmuReadWordSignExword (t, XEiJ.regSRS);  //pc0+2+16bitディスプレースメント
  9669:       if ((t & 1) != 0) {  //分岐先のアドレスが奇数
  9670:         //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ
  9671:         irpBccAddressError (t);
  9672:       }
  9673:       if (XEiJ.MPU_CC_LO << XEiJ.regCCR < 0) {  //条件が成立しているので通過
  9674:         XEiJ.mpuCycleCount += 2;
  9675:       } else {  //条件が成立していないのでデクリメント
  9676:         int rrr = XEiJ.regOC & 7;
  9677:         int s = XEiJ.regRn[rrr];
  9678:         if ((short) s == 0) {  //Drの下位16bitが0なので通過
  9679:           XEiJ.mpuCycleCount += 2;
  9680:           XEiJ.regRn[rrr] = s + 65535;
  9681:         } else {  //Drの下位16bitが0でないので分岐
  9682:           XEiJ.mpuCycleCount++;
  9683:           XEiJ.regRn[rrr] = s - 1;  //下位16bitが0でないので上位16bitは変化しない
  9684:           irpSetPC (t);
  9685:         }
  9686:       }
  9687:     } else if (ea < XEiJ.EA_AR) {  //SLO.B Dr
  9688:       if (XEiJ.MPU_CC_LO << XEiJ.regCCR < 0) {  //セット
  9689:         XEiJ.mpuCycleCount++;
  9690:         XEiJ.regRn[ea] |= 0xff;
  9691:       } else {  //クリア
  9692:         XEiJ.mpuCycleCount++;
  9693:         XEiJ.regRn[ea] &= ~0xff;
  9694:       }
  9695:     } else if ((XEiJ.EAM_PW | XEiJ.EAM_PX | XEiJ.EAM_IM) << ea < 0L) {  //TRAPLO.W/TRAPLO.L/TRAPLO
  9696:       if (ea == 072) {  //.W
  9697:         mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);
  9698:       } else if (ea == 073) {  //.L
  9699:         mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS);
  9700:       }
  9701:       if (XEiJ.MPU_CC_LO << XEiJ.regCCR < 0) {
  9702:         //条件が成立しているのでTRAPする
  9703:         m60Address = XEiJ.regPC0;  //アドレスは命令の先頭
  9704:         M68kException.m6eNumber = M68kException.M6E_TRAPV_INSTRUCTION;
  9705:         throw M68kException.m6eSignal;
  9706:       } else {
  9707:         //条件が成立していないのでTRAPしない
  9708:         XEiJ.mpuCycleCount++;
  9709:       }
  9710:     } else {  //SLO.B <mem>
  9711:       XEiJ.mpuCycleCount++;
  9712:       mmuWriteByteData (efaMltByte (ea), XEiJ.MPU_CC_LO << XEiJ.regCCR >> 31, XEiJ.regSRS);
  9713:     }
  9714:   }  //irpSlo
  9715: 
  9716:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  9717:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  9718:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  9719:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  9720:   //SNE.B <ea>                                      |-|012346|-|--*--|-----|D M+-WXZ  |0101_011_011_mmm_rrr
  9721:   //SNEQ.B <ea>                                     |A|012346|-|--*--|-----|D M+-WXZ  |0101_011_011_mmm_rrr [SNE.B <ea>]
  9722:   //SNZ.B <ea>                                      |A|012346|-|--*--|-----|D M+-WXZ  |0101_011_011_mmm_rrr [SNE.B <ea>]
  9723:   //SNZE.B <ea>                                     |A|012346|-|--*--|-----|D M+-WXZ  |0101_011_011_mmm_rrr [SNE.B <ea>]
  9724:   //DBNE.W Dr,<label>                               |-|012346|-|--*--|-----|          |0101_011_011_001_rrr-{offset}
  9725:   //DBNEQ.W Dr,<label>                              |A|012346|-|--*--|-----|          |0101_011_011_001_rrr-{offset}        [DBNE.W Dr,<label>]
  9726:   //DBNZ.W Dr,<label>                               |A|012346|-|--*--|-----|          |0101_011_011_001_rrr-{offset}        [DBNE.W Dr,<label>]
  9727:   //DBNZE.W Dr,<label>                              |A|012346|-|--*--|-----|          |0101_011_011_001_rrr-{offset}        [DBNE.W Dr,<label>]
  9728:   //TRAPNE.W #<data>                                |-|--2346|-|--*--|-----|          |0101_011_011_111_010-{data}
  9729:   //TPNE.W #<data>                                  |A|--2346|-|--*--|-----|          |0101_011_011_111_010-{data}  [TRAPNE.W #<data>]
  9730:   //TPNEQ.W #<data>                                 |A|--2346|-|--*--|-----|          |0101_011_011_111_010-{data}  [TRAPNE.W #<data>]
  9731:   //TPNZ.W #<data>                                  |A|--2346|-|--*--|-----|          |0101_011_011_111_010-{data}  [TRAPNE.W #<data>]
  9732:   //TPNZE.W #<data>                                 |A|--2346|-|--*--|-----|          |0101_011_011_111_010-{data}  [TRAPNE.W #<data>]
  9733:   //TRAPNEQ.W #<data>                               |A|--2346|-|--*--|-----|          |0101_011_011_111_010-{data}  [TRAPNE.W #<data>]
  9734:   //TRAPNZ.W #<data>                                |A|--2346|-|--*--|-----|          |0101_011_011_111_010-{data}  [TRAPNE.W #<data>]
  9735:   //TRAPNZE.W #<data>                               |A|--2346|-|--*--|-----|          |0101_011_011_111_010-{data}  [TRAPNE.W #<data>]
  9736:   //TRAPNE.L #<data>                                |-|--2346|-|--*--|-----|          |0101_011_011_111_011-{data}
  9737:   //TPNE.L #<data>                                  |A|--2346|-|--*--|-----|          |0101_011_011_111_011-{data}  [TRAPNE.L #<data>]
  9738:   //TPNEQ.L #<data>                                 |A|--2346|-|--*--|-----|          |0101_011_011_111_011-{data}  [TRAPNE.L #<data>]
  9739:   //TPNZ.L #<data>                                  |A|--2346|-|--*--|-----|          |0101_011_011_111_011-{data}  [TRAPNE.L #<data>]
  9740:   //TPNZE.L #<data>                                 |A|--2346|-|--*--|-----|          |0101_011_011_111_011-{data}  [TRAPNE.L #<data>]
  9741:   //TRAPNEQ.L #<data>                               |A|--2346|-|--*--|-----|          |0101_011_011_111_011-{data}  [TRAPNE.L #<data>]
  9742:   //TRAPNZ.L #<data>                                |A|--2346|-|--*--|-----|          |0101_011_011_111_011-{data}  [TRAPNE.L #<data>]
  9743:   //TRAPNZE.L #<data>                               |A|--2346|-|--*--|-----|          |0101_011_011_111_011-{data}  [TRAPNE.L #<data>]
  9744:   //TRAPNE                                          |-|--2346|-|--*--|-----|          |0101_011_011_111_100
  9745:   //TPNE                                            |A|--2346|-|--*--|-----|          |0101_011_011_111_100 [TRAPNE]
  9746:   //TPNEQ                                           |A|--2346|-|--*--|-----|          |0101_011_011_111_100 [TRAPNE]
  9747:   //TPNZ                                            |A|--2346|-|--*--|-----|          |0101_011_011_111_100 [TRAPNE]
  9748:   //TPNZE                                           |A|--2346|-|--*--|-----|          |0101_011_011_111_100 [TRAPNE]
  9749:   //TRAPNEQ                                         |A|--2346|-|--*--|-----|          |0101_011_011_111_100 [TRAPNE]
  9750:   //TRAPNZ                                          |A|--2346|-|--*--|-----|          |0101_011_011_111_100 [TRAPNE]
  9751:   //TRAPNZE                                         |A|--2346|-|--*--|-----|          |0101_011_011_111_100 [TRAPNE]
  9752:   public static void irpSne () throws M68kException {
  9753:     int ea = XEiJ.regOC & 63;
  9754:     if (ea >> 3 == XEiJ.MMM_AR) {  //DBNE.W Dr,<label>
  9755:       int t = XEiJ.regPC;  //pc0+2
  9756:       XEiJ.regPC = t + 2;  //pc0+4
  9757:       t += mmuReadWordSignExword (t, XEiJ.regSRS);  //pc0+2+16bitディスプレースメント
  9758:       if ((t & 1) != 0) {  //分岐先のアドレスが奇数
  9759:         //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ
  9760:         irpBccAddressError (t);
  9761:       }
  9762:       if (XEiJ.MPU_CC_NE << XEiJ.regCCR < 0) {  //条件が成立しているので通過
  9763:         XEiJ.mpuCycleCount += 2;
  9764:       } else {  //条件が成立していないのでデクリメント
  9765:         int rrr = XEiJ.regOC & 7;
  9766:         int s = XEiJ.regRn[rrr];
  9767:         if ((short) s == 0) {  //Drの下位16bitが0なので通過
  9768:           XEiJ.mpuCycleCount += 2;
  9769:           XEiJ.regRn[rrr] = s + 65535;
  9770:         } else {  //Drの下位16bitが0でないので分岐
  9771:           XEiJ.mpuCycleCount++;
  9772:           XEiJ.regRn[rrr] = s - 1;  //下位16bitが0でないので上位16bitは変化しない
  9773:           irpSetPC (t);
  9774:         }
  9775:       }
  9776:     } else if (ea < XEiJ.EA_AR) {  //SNE.B Dr
  9777:       if (XEiJ.MPU_CC_NE << XEiJ.regCCR < 0) {  //セット
  9778:         XEiJ.mpuCycleCount++;
  9779:         XEiJ.regRn[ea] |= 0xff;
  9780:       } else {  //クリア
  9781:         XEiJ.mpuCycleCount++;
  9782:         XEiJ.regRn[ea] &= ~0xff;
  9783:       }
  9784:     } else if ((XEiJ.EAM_PW | XEiJ.EAM_PX | XEiJ.EAM_IM) << ea < 0L) {  //TRAPNE.W/TRAPNE.L/TRAPNE
  9785:       if (ea == 072) {  //.W
  9786:         mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);
  9787:       } else if (ea == 073) {  //.L
  9788:         mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS);
  9789:       }
  9790:       if (XEiJ.MPU_CC_NE << XEiJ.regCCR < 0) {
  9791:         //条件が成立しているのでTRAPする
  9792:         m60Address = XEiJ.regPC0;  //アドレスは命令の先頭
  9793:         M68kException.m6eNumber = M68kException.M6E_TRAPV_INSTRUCTION;
  9794:         throw M68kException.m6eSignal;
  9795:       } else {
  9796:         //条件が成立していないのでTRAPしない
  9797:         XEiJ.mpuCycleCount++;
  9798:       }
  9799:     } else {  //SNE.B <mem>
  9800:       XEiJ.mpuCycleCount++;
  9801:       mmuWriteByteData (efaMltByte (ea), XEiJ.MPU_CC_NE << XEiJ.regCCR >> 31, XEiJ.regSRS);
  9802:     }
  9803:   }  //irpSne
  9804: 
  9805:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  9806:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  9807:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  9808:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  9809:   //SEQ.B <ea>                                      |-|012346|-|--*--|-----|D M+-WXZ  |0101_011_111_mmm_rrr
  9810:   //SNNE.B <ea>                                     |A|012346|-|--*--|-----|D M+-WXZ  |0101_011_111_mmm_rrr [SEQ.B <ea>]
  9811:   //SNNZ.B <ea>                                     |A|012346|-|--*--|-----|D M+-WXZ  |0101_011_111_mmm_rrr [SEQ.B <ea>]
  9812:   //SZE.B <ea>                                      |A|012346|-|--*--|-----|D M+-WXZ  |0101_011_111_mmm_rrr [SEQ.B <ea>]
  9813:   //DBEQ.W Dr,<label>                               |-|012346|-|--*--|-----|          |0101_011_111_001_rrr-{offset}
  9814:   //DBNNE.W Dr,<label>                              |A|012346|-|--*--|-----|          |0101_011_111_001_rrr-{offset}        [DBEQ.W Dr,<label>]
  9815:   //DBNNZ.W Dr,<label>                              |A|012346|-|--*--|-----|          |0101_011_111_001_rrr-{offset}        [DBEQ.W Dr,<label>]
  9816:   //DBZE.W Dr,<label>                               |A|012346|-|--*--|-----|          |0101_011_111_001_rrr-{offset}        [DBEQ.W Dr,<label>]
  9817:   //TRAPEQ.W #<data>                                |-|--2346|-|--*--|-----|          |0101_011_111_111_010-{data}
  9818:   //TPEQ.W #<data>                                  |A|--2346|-|--*--|-----|          |0101_011_111_111_010-{data}  [TRAPEQ.W #<data>]
  9819:   //TPNNE.W #<data>                                 |A|--2346|-|--*--|-----|          |0101_011_111_111_010-{data}  [TRAPEQ.W #<data>]
  9820:   //TPNNZ.W #<data>                                 |A|--2346|-|--*--|-----|          |0101_011_111_111_010-{data}  [TRAPEQ.W #<data>]
  9821:   //TPZE.W #<data>                                  |A|--2346|-|--*--|-----|          |0101_011_111_111_010-{data}  [TRAPEQ.W #<data>]
  9822:   //TRAPNNE.W #<data>                               |A|--2346|-|--*--|-----|          |0101_011_111_111_010-{data}  [TRAPEQ.W #<data>]
  9823:   //TRAPNNZ.W #<data>                               |A|--2346|-|--*--|-----|          |0101_011_111_111_010-{data}  [TRAPEQ.W #<data>]
  9824:   //TRAPZE.W #<data>                                |A|--2346|-|--*--|-----|          |0101_011_111_111_010-{data}  [TRAPEQ.W #<data>]
  9825:   //TRAPEQ.L #<data>                                |-|--2346|-|--*--|-----|          |0101_011_111_111_011-{data}
  9826:   //TPEQ.L #<data>                                  |A|--2346|-|--*--|-----|          |0101_011_111_111_011-{data}  [TRAPEQ.L #<data>]
  9827:   //TPNNE.L #<data>                                 |A|--2346|-|--*--|-----|          |0101_011_111_111_011-{data}  [TRAPEQ.L #<data>]
  9828:   //TPNNZ.L #<data>                                 |A|--2346|-|--*--|-----|          |0101_011_111_111_011-{data}  [TRAPEQ.L #<data>]
  9829:   //TPZE.L #<data>                                  |A|--2346|-|--*--|-----|          |0101_011_111_111_011-{data}  [TRAPEQ.L #<data>]
  9830:   //TRAPNNE.L #<data>                               |A|--2346|-|--*--|-----|          |0101_011_111_111_011-{data}  [TRAPEQ.L #<data>]
  9831:   //TRAPNNZ.L #<data>                               |A|--2346|-|--*--|-----|          |0101_011_111_111_011-{data}  [TRAPEQ.L #<data>]
  9832:   //TRAPZE.L #<data>                                |A|--2346|-|--*--|-----|          |0101_011_111_111_011-{data}  [TRAPEQ.L #<data>]
  9833:   //TRAPEQ                                          |-|--2346|-|--*--|-----|          |0101_011_111_111_100
  9834:   //TPEQ                                            |A|--2346|-|--*--|-----|          |0101_011_111_111_100 [TRAPEQ]
  9835:   //TPNNE                                           |A|--2346|-|--*--|-----|          |0101_011_111_111_100 [TRAPEQ]
  9836:   //TPNNZ                                           |A|--2346|-|--*--|-----|          |0101_011_111_111_100 [TRAPEQ]
  9837:   //TPZE                                            |A|--2346|-|--*--|-----|          |0101_011_111_111_100 [TRAPEQ]
  9838:   //TRAPNNE                                         |A|--2346|-|--*--|-----|          |0101_011_111_111_100 [TRAPEQ]
  9839:   //TRAPNNZ                                         |A|--2346|-|--*--|-----|          |0101_011_111_111_100 [TRAPEQ]
  9840:   //TRAPZE                                          |A|--2346|-|--*--|-----|          |0101_011_111_111_100 [TRAPEQ]
  9841:   public static void irpSeq () throws M68kException {
  9842:     int ea = XEiJ.regOC & 63;
  9843:     if (ea >> 3 == XEiJ.MMM_AR) {  //DBEQ.W Dr,<label>
  9844:       int t = XEiJ.regPC;  //pc0+2
  9845:       XEiJ.regPC = t + 2;  //pc0+4
  9846:       t += mmuReadWordSignExword (t, XEiJ.regSRS);  //pc0+2+16bitディスプレースメント
  9847:       if ((t & 1) != 0) {  //分岐先のアドレスが奇数
  9848:         //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ
  9849:         irpBccAddressError (t);
  9850:       }
  9851:       if (XEiJ.MPU_CC_EQ << XEiJ.regCCR < 0) {  //条件が成立しているので通過
  9852:         XEiJ.mpuCycleCount += 2;
  9853:       } else {  //条件が成立していないのでデクリメント
  9854:         int rrr = XEiJ.regOC & 7;
  9855:         int s = XEiJ.regRn[rrr];
  9856:         if ((short) s == 0) {  //Drの下位16bitが0なので通過
  9857:           XEiJ.mpuCycleCount += 2;
  9858:           XEiJ.regRn[rrr] = s + 65535;
  9859:         } else {  //Drの下位16bitが0でないので分岐
  9860:           XEiJ.mpuCycleCount++;
  9861:           XEiJ.regRn[rrr] = s - 1;  //下位16bitが0でないので上位16bitは変化しない
  9862:           irpSetPC (t);
  9863:         }
  9864:       }
  9865:     } else if (ea < XEiJ.EA_AR) {  //SEQ.B Dr
  9866:       if (XEiJ.MPU_CC_EQ << XEiJ.regCCR < 0) {  //セット
  9867:         XEiJ.mpuCycleCount++;
  9868:         XEiJ.regRn[ea] |= 0xff;
  9869:       } else {  //クリア
  9870:         XEiJ.mpuCycleCount++;
  9871:         XEiJ.regRn[ea] &= ~0xff;
  9872:       }
  9873:     } else if ((XEiJ.EAM_PW | XEiJ.EAM_PX | XEiJ.EAM_IM) << ea < 0L) {  //TRAPEQ.W/TRAPEQ.L/TRAPEQ
  9874:       if (ea == 072) {  //.W
  9875:         mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);
  9876:       } else if (ea == 073) {  //.L
  9877:         mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS);
  9878:       }
  9879:       if (XEiJ.MPU_CC_EQ << XEiJ.regCCR < 0) {
  9880:         //条件が成立しているのでTRAPする
  9881:         m60Address = XEiJ.regPC0;  //アドレスは命令の先頭
  9882:         M68kException.m6eNumber = M68kException.M6E_TRAPV_INSTRUCTION;
  9883:         throw M68kException.m6eSignal;
  9884:       } else {
  9885:         //条件が成立していないのでTRAPしない
  9886:         XEiJ.mpuCycleCount++;
  9887:       }
  9888:     } else {  //SEQ.B <mem>
  9889:       XEiJ.mpuCycleCount++;
  9890:       mmuWriteByteData (efaMltByte (ea), XEiJ.MPU_CC_EQ << XEiJ.regCCR >> 31, XEiJ.regSRS);
  9891:     }
  9892:   }  //irpSeq
  9893: 
  9894:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  9895:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  9896:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  9897:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  9898:   //SVC.B <ea>                                      |-|012346|-|---*-|-----|D M+-WXZ  |0101_100_011_mmm_rrr
  9899:   //SNVS.B <ea>                                     |A|012346|-|---*-|-----|D M+-WXZ  |0101_100_011_mmm_rrr [SVC.B <ea>]
  9900:   //DBVC.W Dr,<label>                               |-|012346|-|---*-|-----|          |0101_100_011_001_rrr-{offset}
  9901:   //DBNVS.W Dr,<label>                              |A|012346|-|---*-|-----|          |0101_100_011_001_rrr-{offset}        [DBVC.W Dr,<label>]
  9902:   //TRAPVC.W #<data>                                |-|--2346|-|---*-|-----|          |0101_100_011_111_010-{data}
  9903:   //TPNVS.W #<data>                                 |A|--2346|-|---*-|-----|          |0101_100_011_111_010-{data}  [TRAPVC.W #<data>]
  9904:   //TPVC.W #<data>                                  |A|--2346|-|---*-|-----|          |0101_100_011_111_010-{data}  [TRAPVC.W #<data>]
  9905:   //TRAPNVS.W #<data>                               |A|--2346|-|---*-|-----|          |0101_100_011_111_010-{data}  [TRAPVC.W #<data>]
  9906:   //TRAPVC.L #<data>                                |-|--2346|-|---*-|-----|          |0101_100_011_111_011-{data}
  9907:   //TPNVS.L #<data>                                 |A|--2346|-|---*-|-----|          |0101_100_011_111_011-{data}  [TRAPVC.L #<data>]
  9908:   //TPVC.L #<data>                                  |A|--2346|-|---*-|-----|          |0101_100_011_111_011-{data}  [TRAPVC.L #<data>]
  9909:   //TRAPNVS.L #<data>                               |A|--2346|-|---*-|-----|          |0101_100_011_111_011-{data}  [TRAPVC.L #<data>]
  9910:   //TRAPVC                                          |-|--2346|-|---*-|-----|          |0101_100_011_111_100
  9911:   //TPNVS                                           |A|--2346|-|---*-|-----|          |0101_100_011_111_100 [TRAPVC]
  9912:   //TPVC                                            |A|--2346|-|---*-|-----|          |0101_100_011_111_100 [TRAPVC]
  9913:   //TRAPNVS                                         |A|--2346|-|---*-|-----|          |0101_100_011_111_100 [TRAPVC]
  9914:   public static void irpSvc () throws M68kException {
  9915:     int ea = XEiJ.regOC & 63;
  9916:     if (ea >> 3 == XEiJ.MMM_AR) {  //DBVC.W Dr,<label>
  9917:       int t = XEiJ.regPC;  //pc0+2
  9918:       XEiJ.regPC = t + 2;  //pc0+4
  9919:       t += mmuReadWordSignExword (t, XEiJ.regSRS);  //pc0+2+16bitディスプレースメント
  9920:       if ((t & 1) != 0) {  //分岐先のアドレスが奇数
  9921:         //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ
  9922:         irpBccAddressError (t);
  9923:       }
  9924:       if (XEiJ.MPU_CC_VC << XEiJ.regCCR < 0) {  //条件が成立しているので通過
  9925:         XEiJ.mpuCycleCount += 2;
  9926:       } else {  //条件が成立していないのでデクリメント
  9927:         int rrr = XEiJ.regOC & 7;
  9928:         int s = XEiJ.regRn[rrr];
  9929:         if ((short) s == 0) {  //Drの下位16bitが0なので通過
  9930:           XEiJ.mpuCycleCount += 2;
  9931:           XEiJ.regRn[rrr] = s + 65535;
  9932:         } else {  //Drの下位16bitが0でないので分岐
  9933:           XEiJ.mpuCycleCount++;
  9934:           XEiJ.regRn[rrr] = s - 1;  //下位16bitが0でないので上位16bitは変化しない
  9935:           irpSetPC (t);
  9936:         }
  9937:       }
  9938:     } else if (ea < XEiJ.EA_AR) {  //SVC.B Dr
  9939:       if (XEiJ.MPU_CC_VC << XEiJ.regCCR < 0) {  //セット
  9940:         XEiJ.mpuCycleCount++;
  9941:         XEiJ.regRn[ea] |= 0xff;
  9942:       } else {  //クリア
  9943:         XEiJ.mpuCycleCount++;
  9944:         XEiJ.regRn[ea] &= ~0xff;
  9945:       }
  9946:     } else if ((XEiJ.EAM_PW | XEiJ.EAM_PX | XEiJ.EAM_IM) << ea < 0L) {  //TRAPVC.W/TRAPVC.L/TRAPVC
  9947:       if (ea == 072) {  //.W
  9948:         mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);
  9949:       } else if (ea == 073) {  //.L
  9950:         mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS);
  9951:       }
  9952:       if (XEiJ.MPU_CC_VC << XEiJ.regCCR < 0) {
  9953:         //条件が成立しているのでTRAPする
  9954:         m60Address = XEiJ.regPC0;  //アドレスは命令の先頭
  9955:         M68kException.m6eNumber = M68kException.M6E_TRAPV_INSTRUCTION;
  9956:         throw M68kException.m6eSignal;
  9957:       } else {
  9958:         //条件が成立していないのでTRAPしない
  9959:         XEiJ.mpuCycleCount++;
  9960:       }
  9961:     } else {  //SVC.B <mem>
  9962:       XEiJ.mpuCycleCount++;
  9963:       mmuWriteByteData (efaMltByte (ea), XEiJ.MPU_CC_VC << XEiJ.regCCR >> 31, XEiJ.regSRS);
  9964:     }
  9965:   }  //irpSvc
  9966: 
  9967:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  9968:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  9969:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  9970:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  9971:   //SVS.B <ea>                                      |-|012346|-|---*-|-----|D M+-WXZ  |0101_100_111_mmm_rrr
  9972:   //SNVC.B <ea>                                     |A|012346|-|---*-|-----|D M+-WXZ  |0101_100_111_mmm_rrr [SVS.B <ea>]
  9973:   //DBVS.W Dr,<label>                               |-|012346|-|---*-|-----|          |0101_100_111_001_rrr-{offset}
  9974:   //DBNVC.W Dr,<label>                              |A|012346|-|---*-|-----|          |0101_100_111_001_rrr-{offset}        [DBVS.W Dr,<label>]
  9975:   //TRAPVS.W #<data>                                |-|--2346|-|---*-|-----|          |0101_100_111_111_010-{data}
  9976:   //TPNVC.W #<data>                                 |A|--2346|-|---*-|-----|          |0101_100_111_111_010-{data}  [TRAPVS.W #<data>]
  9977:   //TPVS.W #<data>                                  |A|--2346|-|---*-|-----|          |0101_100_111_111_010-{data}  [TRAPVS.W #<data>]
  9978:   //TRAPNVC.W #<data>                               |A|--2346|-|---*-|-----|          |0101_100_111_111_010-{data}  [TRAPVS.W #<data>]
  9979:   //TRAPVS.L #<data>                                |-|--2346|-|---*-|-----|          |0101_100_111_111_011-{data}
  9980:   //TPNVC.L #<data>                                 |A|--2346|-|---*-|-----|          |0101_100_111_111_011-{data}  [TRAPVS.L #<data>]
  9981:   //TPVS.L #<data>                                  |A|--2346|-|---*-|-----|          |0101_100_111_111_011-{data}  [TRAPVS.L #<data>]
  9982:   //TRAPNVC.L #<data>                               |A|--2346|-|---*-|-----|          |0101_100_111_111_011-{data}  [TRAPVS.L #<data>]
  9983:   //TRAPVS                                          |-|--2346|-|---*-|-----|          |0101_100_111_111_100
  9984:   //TPNVC                                           |A|--2346|-|---*-|-----|          |0101_100_111_111_100 [TRAPVS]
  9985:   //TPVS                                            |A|--2346|-|---*-|-----|          |0101_100_111_111_100 [TRAPVS]
  9986:   //TRAPNVC                                         |A|--2346|-|---*-|-----|          |0101_100_111_111_100 [TRAPVS]
  9987:   public static void irpSvs () throws M68kException {
  9988:     int ea = XEiJ.regOC & 63;
  9989:     if (ea >> 3 == XEiJ.MMM_AR) {  //DBVS.W Dr,<label>
  9990:       int t = XEiJ.regPC;  //pc0+2
  9991:       XEiJ.regPC = t + 2;  //pc0+4
  9992:       t += mmuReadWordSignExword (t, XEiJ.regSRS);  //pc0+2+16bitディスプレースメント
  9993:       if ((t & 1) != 0) {  //分岐先のアドレスが奇数
  9994:         //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ
  9995:         irpBccAddressError (t);
  9996:       }
  9997:       if (XEiJ.MPU_CC_VS << XEiJ.regCCR < 0) {  //条件が成立しているので通過
  9998:         XEiJ.mpuCycleCount += 2;
  9999:       } else {  //条件が成立していないのでデクリメント
 10000:         int rrr = XEiJ.regOC & 7;
 10001:         int s = XEiJ.regRn[rrr];
 10002:         if ((short) s == 0) {  //Drの下位16bitが0なので通過
 10003:           XEiJ.mpuCycleCount += 2;
 10004:           XEiJ.regRn[rrr] = s + 65535;
 10005:         } else {  //Drの下位16bitが0でないので分岐
 10006:           XEiJ.mpuCycleCount++;
 10007:           XEiJ.regRn[rrr] = s - 1;  //下位16bitが0でないので上位16bitは変化しない
 10008:           irpSetPC (t);
 10009:         }
 10010:       }
 10011:     } else if (ea < XEiJ.EA_AR) {  //SVS.B Dr
 10012:       if (XEiJ.MPU_CC_VS << XEiJ.regCCR < 0) {  //セット
 10013:         XEiJ.mpuCycleCount++;
 10014:         XEiJ.regRn[ea] |= 0xff;
 10015:       } else {  //クリア
 10016:         XEiJ.mpuCycleCount++;
 10017:         XEiJ.regRn[ea] &= ~0xff;
 10018:       }
 10019:     } else if ((XEiJ.EAM_PW | XEiJ.EAM_PX | XEiJ.EAM_IM) << ea < 0L) {  //TRAPVS.W/TRAPVS.L/TRAPVS
 10020:       if (ea == 072) {  //.W
 10021:         mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);
 10022:       } else if (ea == 073) {  //.L
 10023:         mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS);
 10024:       }
 10025:       if (XEiJ.MPU_CC_VS << XEiJ.regCCR < 0) {
 10026:         //条件が成立しているのでTRAPする
 10027:         m60Address = XEiJ.regPC0;  //アドレスは命令の先頭
 10028:         M68kException.m6eNumber = M68kException.M6E_TRAPV_INSTRUCTION;
 10029:         throw M68kException.m6eSignal;
 10030:       } else {
 10031:         //条件が成立していないのでTRAPしない
 10032:         XEiJ.mpuCycleCount++;
 10033:       }
 10034:     } else {  //SVS.B <mem>
 10035:       XEiJ.mpuCycleCount++;
 10036:       mmuWriteByteData (efaMltByte (ea), XEiJ.MPU_CC_VS << XEiJ.regCCR >> 31, XEiJ.regSRS);
 10037:     }
 10038:   }  //irpSvs
 10039: 
 10040:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10041:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 10042:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 10043:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10044:   //SPL.B <ea>                                      |-|012346|-|-*---|-----|D M+-WXZ  |0101_101_011_mmm_rrr
 10045:   //SNMI.B <ea>                                     |A|012346|-|-*---|-----|D M+-WXZ  |0101_101_011_mmm_rrr [SPL.B <ea>]
 10046:   //DBPL.W Dr,<label>                               |-|012346|-|-*---|-----|          |0101_101_011_001_rrr-{offset}
 10047:   //DBNMI.W Dr,<label>                              |A|012346|-|-*---|-----|          |0101_101_011_001_rrr-{offset}        [DBPL.W Dr,<label>]
 10048:   //TRAPPL.W #<data>                                |-|--2346|-|-*---|-----|          |0101_101_011_111_010-{data}
 10049:   //TPNMI.W #<data>                                 |A|--2346|-|-*---|-----|          |0101_101_011_111_010-{data}  [TRAPPL.W #<data>]
 10050:   //TPPL.W #<data>                                  |A|--2346|-|-*---|-----|          |0101_101_011_111_010-{data}  [TRAPPL.W #<data>]
 10051:   //TRAPNMI.W #<data>                               |A|--2346|-|-*---|-----|          |0101_101_011_111_010-{data}  [TRAPPL.W #<data>]
 10052:   //TRAPPL.L #<data>                                |-|--2346|-|-*---|-----|          |0101_101_011_111_011-{data}
 10053:   //TPNMI.L #<data>                                 |A|--2346|-|-*---|-----|          |0101_101_011_111_011-{data}  [TRAPPL.L #<data>]
 10054:   //TPPL.L #<data>                                  |A|--2346|-|-*---|-----|          |0101_101_011_111_011-{data}  [TRAPPL.L #<data>]
 10055:   //TRAPNMI.L #<data>                               |A|--2346|-|-*---|-----|          |0101_101_011_111_011-{data}  [TRAPPL.L #<data>]
 10056:   //TRAPPL                                          |-|--2346|-|-*---|-----|          |0101_101_011_111_100
 10057:   //TPNMI                                           |A|--2346|-|-*---|-----|          |0101_101_011_111_100 [TRAPPL]
 10058:   //TPPL                                            |A|--2346|-|-*---|-----|          |0101_101_011_111_100 [TRAPPL]
 10059:   //TRAPNMI                                         |A|--2346|-|-*---|-----|          |0101_101_011_111_100 [TRAPPL]
 10060:   public static void irpSpl () throws M68kException {
 10061:     int ea = XEiJ.regOC & 63;
 10062:     if (ea >> 3 == XEiJ.MMM_AR) {  //DBPL.W Dr,<label>
 10063:       int t = XEiJ.regPC;  //pc0+2
 10064:       XEiJ.regPC = t + 2;  //pc0+4
 10065:       t += mmuReadWordSignExword (t, XEiJ.regSRS);  //pc0+2+16bitディスプレースメント
 10066:       if ((t & 1) != 0) {  //分岐先のアドレスが奇数
 10067:         //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ
 10068:         irpBccAddressError (t);
 10069:       }
 10070:       if (XEiJ.MPU_CC_PL << XEiJ.regCCR < 0) {  //条件が成立しているので通過
 10071:         XEiJ.mpuCycleCount += 2;
 10072:       } else {  //条件が成立していないのでデクリメント
 10073:         int rrr = XEiJ.regOC & 7;
 10074:         int s = XEiJ.regRn[rrr];
 10075:         if ((short) s == 0) {  //Drの下位16bitが0なので通過
 10076:           XEiJ.mpuCycleCount += 2;
 10077:           XEiJ.regRn[rrr] = s + 65535;
 10078:         } else {  //Drの下位16bitが0でないので分岐
 10079:           XEiJ.mpuCycleCount++;
 10080:           XEiJ.regRn[rrr] = s - 1;  //下位16bitが0でないので上位16bitは変化しない
 10081:           irpSetPC (t);
 10082:         }
 10083:       }
 10084:     } else if (ea < XEiJ.EA_AR) {  //SPL.B Dr
 10085:       if (XEiJ.MPU_CC_PL << XEiJ.regCCR < 0) {  //セット
 10086:         XEiJ.mpuCycleCount++;
 10087:         XEiJ.regRn[ea] |= 0xff;
 10088:       } else {  //クリア
 10089:         XEiJ.mpuCycleCount++;
 10090:         XEiJ.regRn[ea] &= ~0xff;
 10091:       }
 10092:     } else if ((XEiJ.EAM_PW | XEiJ.EAM_PX | XEiJ.EAM_IM) << ea < 0L) {  //TRAPPL.W/TRAPPL.L/TRAPPL
 10093:       if (ea == 072) {  //.W
 10094:         mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);
 10095:       } else if (ea == 073) {  //.L
 10096:         mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS);
 10097:       }
 10098:       if (XEiJ.MPU_CC_PL << XEiJ.regCCR < 0) {
 10099:         //条件が成立しているのでTRAPする
 10100:         m60Address = XEiJ.regPC0;  //アドレスは命令の先頭
 10101:         M68kException.m6eNumber = M68kException.M6E_TRAPV_INSTRUCTION;
 10102:         throw M68kException.m6eSignal;
 10103:       } else {
 10104:         //条件が成立していないのでTRAPしない
 10105:         XEiJ.mpuCycleCount++;
 10106:       }
 10107:     } else {  //SPL.B <mem>
 10108:       XEiJ.mpuCycleCount++;
 10109:       mmuWriteByteData (efaMltByte (ea), XEiJ.MPU_CC_PL << XEiJ.regCCR >> 31, XEiJ.regSRS);
 10110:     }
 10111:   }  //irpSpl
 10112: 
 10113:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10114:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 10115:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 10116:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10117:   //SMI.B <ea>                                      |-|012346|-|-*---|-----|D M+-WXZ  |0101_101_111_mmm_rrr
 10118:   //SNPL.B <ea>                                     |A|012346|-|-*---|-----|D M+-WXZ  |0101_101_111_mmm_rrr [SMI.B <ea>]
 10119:   //DBMI.W Dr,<label>                               |-|012346|-|-*---|-----|          |0101_101_111_001_rrr-{offset}
 10120:   //DBNPL.W Dr,<label>                              |A|012346|-|-*---|-----|          |0101_101_111_001_rrr-{offset}        [DBMI.W Dr,<label>]
 10121:   //TRAPMI.W #<data>                                |-|--2346|-|-*---|-----|          |0101_101_111_111_010-{data}
 10122:   //TPMI.W #<data>                                  |A|--2346|-|-*---|-----|          |0101_101_111_111_010-{data}  [TRAPMI.W #<data>]
 10123:   //TPNPL.W #<data>                                 |A|--2346|-|-*---|-----|          |0101_101_111_111_010-{data}  [TRAPMI.W #<data>]
 10124:   //TRAPNPL.W #<data>                               |A|--2346|-|-*---|-----|          |0101_101_111_111_010-{data}  [TRAPMI.W #<data>]
 10125:   //TRAPMI.L #<data>                                |-|--2346|-|-*---|-----|          |0101_101_111_111_011-{data}
 10126:   //TPMI.L #<data>                                  |A|--2346|-|-*---|-----|          |0101_101_111_111_011-{data}  [TRAPMI.L #<data>]
 10127:   //TPNPL.L #<data>                                 |A|--2346|-|-*---|-----|          |0101_101_111_111_011-{data}  [TRAPMI.L #<data>]
 10128:   //TRAPNPL.L #<data>                               |A|--2346|-|-*---|-----|          |0101_101_111_111_011-{data}  [TRAPMI.L #<data>]
 10129:   //TRAPMI                                          |-|--2346|-|-*---|-----|          |0101_101_111_111_100
 10130:   //TPMI                                            |A|--2346|-|-*---|-----|          |0101_101_111_111_100 [TRAPMI]
 10131:   //TPNPL                                           |A|--2346|-|-*---|-----|          |0101_101_111_111_100 [TRAPMI]
 10132:   //TRAPNPL                                         |A|--2346|-|-*---|-----|          |0101_101_111_111_100 [TRAPMI]
 10133:   public static void irpSmi () throws M68kException {
 10134:     int ea = XEiJ.regOC & 63;
 10135:     if (ea >> 3 == XEiJ.MMM_AR) {  //DBMI.W Dr,<label>
 10136:       int t = XEiJ.regPC;  //pc0+2
 10137:       XEiJ.regPC = t + 2;  //pc0+4
 10138:       t += mmuReadWordSignExword (t, XEiJ.regSRS);  //pc0+2+16bitディスプレースメント
 10139:       if ((t & 1) != 0) {  //分岐先のアドレスが奇数
 10140:         //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ
 10141:         irpBccAddressError (t);
 10142:       }
 10143:       if (XEiJ.MPU_CC_MI << XEiJ.regCCR < 0) {  //条件が成立しているので通過
 10144:         XEiJ.mpuCycleCount += 2;
 10145:       } else {  //条件が成立していないのでデクリメント
 10146:         int rrr = XEiJ.regOC & 7;
 10147:         int s = XEiJ.regRn[rrr];
 10148:         if ((short) s == 0) {  //Drの下位16bitが0なので通過
 10149:           XEiJ.mpuCycleCount += 2;
 10150:           XEiJ.regRn[rrr] = s + 65535;
 10151:         } else {  //Drの下位16bitが0でないので分岐
 10152:           XEiJ.mpuCycleCount++;
 10153:           XEiJ.regRn[rrr] = s - 1;  //下位16bitが0でないので上位16bitは変化しない
 10154:           irpSetPC (t);
 10155:         }
 10156:       }
 10157:     } else if (ea < XEiJ.EA_AR) {  //SMI.B Dr
 10158:       if (XEiJ.MPU_CC_MI << XEiJ.regCCR < 0) {  //セット
 10159:         XEiJ.mpuCycleCount++;
 10160:         XEiJ.regRn[ea] |= 0xff;
 10161:       } else {  //クリア
 10162:         XEiJ.mpuCycleCount++;
 10163:         XEiJ.regRn[ea] &= ~0xff;
 10164:       }
 10165:     } else if ((XEiJ.EAM_PW | XEiJ.EAM_PX | XEiJ.EAM_IM) << ea < 0L) {  //TRAPMI.W/TRAPMI.L/TRAPMI
 10166:       if (ea == 072) {  //.W
 10167:         mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);
 10168:       } else if (ea == 073) {  //.L
 10169:         mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS);
 10170:       }
 10171:       if (XEiJ.MPU_CC_MI << XEiJ.regCCR < 0) {
 10172:         //条件が成立しているのでTRAPする
 10173:         m60Address = XEiJ.regPC0;  //アドレスは命令の先頭
 10174:         M68kException.m6eNumber = M68kException.M6E_TRAPV_INSTRUCTION;
 10175:         throw M68kException.m6eSignal;
 10176:       } else {
 10177:         //条件が成立していないのでTRAPしない
 10178:         XEiJ.mpuCycleCount++;
 10179:       }
 10180:     } else {  //SMI.B <mem>
 10181:       XEiJ.mpuCycleCount++;
 10182:       mmuWriteByteData (efaMltByte (ea), XEiJ.MPU_CC_MI << XEiJ.regCCR >> 31, XEiJ.regSRS);
 10183:     }
 10184:   }  //irpSmi
 10185: 
 10186:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10187:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 10188:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 10189:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10190:   //SGE.B <ea>                                      |-|012346|-|-*-*-|-----|D M+-WXZ  |0101_110_011_mmm_rrr
 10191:   //SNLT.B <ea>                                     |A|012346|-|-*-*-|-----|D M+-WXZ  |0101_110_011_mmm_rrr [SGE.B <ea>]
 10192:   //DBGE.W Dr,<label>                               |-|012346|-|-*-*-|-----|          |0101_110_011_001_rrr-{offset}
 10193:   //DBNLT.W Dr,<label>                              |A|012346|-|-*-*-|-----|          |0101_110_011_001_rrr-{offset}        [DBGE.W Dr,<label>]
 10194:   //TRAPGE.W #<data>                                |-|--2346|-|-*-*-|-----|          |0101_110_011_111_010-{data}
 10195:   //TPGE.W #<data>                                  |A|--2346|-|-*-*-|-----|          |0101_110_011_111_010-{data}  [TRAPGE.W #<data>]
 10196:   //TPNLT.W #<data>                                 |A|--2346|-|-*-*-|-----|          |0101_110_011_111_010-{data}  [TRAPGE.W #<data>]
 10197:   //TRAPNLT.W #<data>                               |A|--2346|-|-*-*-|-----|          |0101_110_011_111_010-{data}  [TRAPGE.W #<data>]
 10198:   //TRAPGE.L #<data>                                |-|--2346|-|-*-*-|-----|          |0101_110_011_111_011-{data}
 10199:   //TPGE.L #<data>                                  |A|--2346|-|-*-*-|-----|          |0101_110_011_111_011-{data}  [TRAPGE.L #<data>]
 10200:   //TPNLT.L #<data>                                 |A|--2346|-|-*-*-|-----|          |0101_110_011_111_011-{data}  [TRAPGE.L #<data>]
 10201:   //TRAPNLT.L #<data>                               |A|--2346|-|-*-*-|-----|          |0101_110_011_111_011-{data}  [TRAPGE.L #<data>]
 10202:   //TRAPGE                                          |-|--2346|-|-*-*-|-----|          |0101_110_011_111_100
 10203:   //TPGE                                            |A|--2346|-|-*-*-|-----|          |0101_110_011_111_100 [TRAPGE]
 10204:   //TPNLT                                           |A|--2346|-|-*-*-|-----|          |0101_110_011_111_100 [TRAPGE]
 10205:   //TRAPNLT                                         |A|--2346|-|-*-*-|-----|          |0101_110_011_111_100 [TRAPGE]
 10206:   public static void irpSge () throws M68kException {
 10207:     int ea = XEiJ.regOC & 63;
 10208:     if (ea >> 3 == XEiJ.MMM_AR) {  //DBGE.W Dr,<label>
 10209:       int t = XEiJ.regPC;  //pc0+2
 10210:       XEiJ.regPC = t + 2;  //pc0+4
 10211:       t += mmuReadWordSignExword (t, XEiJ.regSRS);  //pc0+2+16bitディスプレースメント
 10212:       if ((t & 1) != 0) {  //分岐先のアドレスが奇数
 10213:         //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ
 10214:         irpBccAddressError (t);
 10215:       }
 10216:       if (XEiJ.MPU_CC_GE << XEiJ.regCCR < 0) {  //条件が成立しているので通過
 10217:         XEiJ.mpuCycleCount += 2;
 10218:       } else {  //条件が成立していないのでデクリメント
 10219:         int rrr = XEiJ.regOC & 7;
 10220:         int s = XEiJ.regRn[rrr];
 10221:         if ((short) s == 0) {  //Drの下位16bitが0なので通過
 10222:           XEiJ.mpuCycleCount += 2;
 10223:           XEiJ.regRn[rrr] = s + 65535;
 10224:         } else {  //Drの下位16bitが0でないので分岐
 10225:           XEiJ.mpuCycleCount++;
 10226:           XEiJ.regRn[rrr] = s - 1;  //下位16bitが0でないので上位16bitは変化しない
 10227:           irpSetPC (t);
 10228:         }
 10229:       }
 10230:     } else if (ea < XEiJ.EA_AR) {  //SGE.B Dr
 10231:       if (XEiJ.MPU_CC_GE << XEiJ.regCCR < 0) {  //セット
 10232:         XEiJ.mpuCycleCount++;
 10233:         XEiJ.regRn[ea] |= 0xff;
 10234:       } else {  //クリア
 10235:         XEiJ.mpuCycleCount++;
 10236:         XEiJ.regRn[ea] &= ~0xff;
 10237:       }
 10238:     } else if ((XEiJ.EAM_PW | XEiJ.EAM_PX | XEiJ.EAM_IM) << ea < 0L) {  //TRAPGE.W/TRAPGE.L/TRAPGE
 10239:       if (ea == 072) {  //.W
 10240:         mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);
 10241:       } else if (ea == 073) {  //.L
 10242:         mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS);
 10243:       }
 10244:       if (XEiJ.MPU_CC_GE << XEiJ.regCCR < 0) {
 10245:         //条件が成立しているのでTRAPする
 10246:         m60Address = XEiJ.regPC0;  //アドレスは命令の先頭
 10247:         M68kException.m6eNumber = M68kException.M6E_TRAPV_INSTRUCTION;
 10248:         throw M68kException.m6eSignal;
 10249:       } else {
 10250:         //条件が成立していないのでTRAPしない
 10251:         XEiJ.mpuCycleCount++;
 10252:       }
 10253:     } else {  //SGE.B <mem>
 10254:       XEiJ.mpuCycleCount++;
 10255:       mmuWriteByteData (efaMltByte (ea), XEiJ.MPU_CC_GE << XEiJ.regCCR >> 31, XEiJ.regSRS);
 10256:     }
 10257:   }  //irpSge
 10258: 
 10259:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10260:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 10261:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 10262:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10263:   //SLT.B <ea>                                      |-|012346|-|-*-*-|-----|D M+-WXZ  |0101_110_111_mmm_rrr
 10264:   //SNGE.B <ea>                                     |A|012346|-|-*-*-|-----|D M+-WXZ  |0101_110_111_mmm_rrr [SLT.B <ea>]
 10265:   //DBLT.W Dr,<label>                               |-|012346|-|-*-*-|-----|          |0101_110_111_001_rrr-{offset}
 10266:   //DBNGE.W Dr,<label>                              |A|012346|-|-*-*-|-----|          |0101_110_111_001_rrr-{offset}        [DBLT.W Dr,<label>]
 10267:   //TRAPLT.W #<data>                                |-|--2346|-|-*-*-|-----|          |0101_110_111_111_010-{data}
 10268:   //TPLT.W #<data>                                  |A|--2346|-|-*-*-|-----|          |0101_110_111_111_010-{data}  [TRAPLT.W #<data>]
 10269:   //TPNGE.W #<data>                                 |A|--2346|-|-*-*-|-----|          |0101_110_111_111_010-{data}  [TRAPLT.W #<data>]
 10270:   //TRAPNGE.W #<data>                               |A|--2346|-|-*-*-|-----|          |0101_110_111_111_010-{data}  [TRAPLT.W #<data>]
 10271:   //TRAPLT.L #<data>                                |-|--2346|-|-*-*-|-----|          |0101_110_111_111_011-{data}
 10272:   //TPLT.L #<data>                                  |A|--2346|-|-*-*-|-----|          |0101_110_111_111_011-{data}  [TRAPLT.L #<data>]
 10273:   //TPNGE.L #<data>                                 |A|--2346|-|-*-*-|-----|          |0101_110_111_111_011-{data}  [TRAPLT.L #<data>]
 10274:   //TRAPNGE.L #<data>                               |A|--2346|-|-*-*-|-----|          |0101_110_111_111_011-{data}  [TRAPLT.L #<data>]
 10275:   //TRAPLT                                          |-|--2346|-|-*-*-|-----|          |0101_110_111_111_100
 10276:   //TPLT                                            |A|--2346|-|-*-*-|-----|          |0101_110_111_111_100 [TRAPLT]
 10277:   //TPNGE                                           |A|--2346|-|-*-*-|-----|          |0101_110_111_111_100 [TRAPLT]
 10278:   //TRAPNGE                                         |A|--2346|-|-*-*-|-----|          |0101_110_111_111_100 [TRAPLT]
 10279:   public static void irpSlt () throws M68kException {
 10280:     int ea = XEiJ.regOC & 63;
 10281:     if (ea >> 3 == XEiJ.MMM_AR) {  //DBLT.W Dr,<label>
 10282:       int t = XEiJ.regPC;  //pc0+2
 10283:       XEiJ.regPC = t + 2;  //pc0+4
 10284:       t += mmuReadWordSignExword (t, XEiJ.regSRS);  //pc0+2+16bitディスプレースメント
 10285:       if ((t & 1) != 0) {  //分岐先のアドレスが奇数
 10286:         //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ
 10287:         irpBccAddressError (t);
 10288:       }
 10289:       if (XEiJ.MPU_CC_LT << XEiJ.regCCR < 0) {  //条件が成立しているので通過
 10290:         XEiJ.mpuCycleCount += 2;
 10291:       } else {  //条件が成立していないのでデクリメント
 10292:         int rrr = XEiJ.regOC & 7;
 10293:         int s = XEiJ.regRn[rrr];
 10294:         if ((short) s == 0) {  //Drの下位16bitが0なので通過
 10295:           XEiJ.mpuCycleCount += 2;
 10296:           XEiJ.regRn[rrr] = s + 65535;
 10297:         } else {  //Drの下位16bitが0でないので分岐
 10298:           XEiJ.mpuCycleCount++;
 10299:           XEiJ.regRn[rrr] = s - 1;  //下位16bitが0でないので上位16bitは変化しない
 10300:           irpSetPC (t);
 10301:         }
 10302:       }
 10303:     } else if (ea < XEiJ.EA_AR) {  //SLT.B Dr
 10304:       if (XEiJ.MPU_CC_LT << XEiJ.regCCR < 0) {  //セット
 10305:         XEiJ.mpuCycleCount++;
 10306:         XEiJ.regRn[ea] |= 0xff;
 10307:       } else {  //クリア
 10308:         XEiJ.mpuCycleCount++;
 10309:         XEiJ.regRn[ea] &= ~0xff;
 10310:       }
 10311:     } else if ((XEiJ.EAM_PW | XEiJ.EAM_PX | XEiJ.EAM_IM) << ea < 0L) {  //TRAPLT.W/TRAPLT.L/TRAPLT
 10312:       if (ea == 072) {  //.W
 10313:         mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);
 10314:       } else if (ea == 073) {  //.L
 10315:         mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS);
 10316:       }
 10317:       if (XEiJ.MPU_CC_LT << XEiJ.regCCR < 0) {
 10318:         //条件が成立しているのでTRAPする
 10319:         m60Address = XEiJ.regPC0;  //アドレスは命令の先頭
 10320:         M68kException.m6eNumber = M68kException.M6E_TRAPV_INSTRUCTION;
 10321:         throw M68kException.m6eSignal;
 10322:       } else {
 10323:         //条件が成立していないのでTRAPしない
 10324:         XEiJ.mpuCycleCount++;
 10325:       }
 10326:     } else {  //SLT.B <mem>
 10327:       XEiJ.mpuCycleCount++;
 10328:       mmuWriteByteData (efaMltByte (ea), XEiJ.MPU_CC_LT << XEiJ.regCCR >> 31, XEiJ.regSRS);
 10329:     }
 10330:   }  //irpSlt
 10331: 
 10332:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10333:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 10334:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 10335:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10336:   //SGT.B <ea>                                      |-|012346|-|-***-|-----|D M+-WXZ  |0101_111_011_mmm_rrr
 10337:   //SNLE.B <ea>                                     |A|012346|-|-***-|-----|D M+-WXZ  |0101_111_011_mmm_rrr [SGT.B <ea>]
 10338:   //DBGT.W Dr,<label>                               |-|012346|-|-***-|-----|          |0101_111_011_001_rrr-{offset}
 10339:   //DBNLE.W Dr,<label>                              |A|012346|-|-***-|-----|          |0101_111_011_001_rrr-{offset}        [DBGT.W Dr,<label>]
 10340:   //TRAPGT.W #<data>                                |-|--2346|-|-***-|-----|          |0101_111_011_111_010-{data}
 10341:   //TPGT.W #<data>                                  |A|--2346|-|-***-|-----|          |0101_111_011_111_010-{data}  [TRAPGT.W #<data>]
 10342:   //TPNLE.W #<data>                                 |A|--2346|-|-***-|-----|          |0101_111_011_111_010-{data}  [TRAPGT.W #<data>]
 10343:   //TRAPNLE.W #<data>                               |A|--2346|-|-***-|-----|          |0101_111_011_111_010-{data}  [TRAPGT.W #<data>]
 10344:   //TRAPGT.L #<data>                                |-|--2346|-|-***-|-----|          |0101_111_011_111_011-{data}
 10345:   //TPGT.L #<data>                                  |A|--2346|-|-***-|-----|          |0101_111_011_111_011-{data}  [TRAPGT.L #<data>]
 10346:   //TPNLE.L #<data>                                 |A|--2346|-|-***-|-----|          |0101_111_011_111_011-{data}  [TRAPGT.L #<data>]
 10347:   //TRAPNLE.L #<data>                               |A|--2346|-|-***-|-----|          |0101_111_011_111_011-{data}  [TRAPGT.L #<data>]
 10348:   //TRAPGT                                          |-|--2346|-|-***-|-----|          |0101_111_011_111_100
 10349:   //TPGT                                            |A|--2346|-|-***-|-----|          |0101_111_011_111_100 [TRAPGT]
 10350:   //TPNLE                                           |A|--2346|-|-***-|-----|          |0101_111_011_111_100 [TRAPGT]
 10351:   //TRAPNLE                                         |A|--2346|-|-***-|-----|          |0101_111_011_111_100 [TRAPGT]
 10352:   public static void irpSgt () throws M68kException {
 10353:     int ea = XEiJ.regOC & 63;
 10354:     if (ea >> 3 == XEiJ.MMM_AR) {  //DBGT.W Dr,<label>
 10355:       int t = XEiJ.regPC;  //pc0+2
 10356:       XEiJ.regPC = t + 2;  //pc0+4
 10357:       t += mmuReadWordSignExword (t, XEiJ.regSRS);  //pc0+2+16bitディスプレースメント
 10358:       if ((t & 1) != 0) {  //分岐先のアドレスが奇数
 10359:         //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ
 10360:         irpBccAddressError (t);
 10361:       }
 10362:       if (XEiJ.MPU_CC_GT << XEiJ.regCCR < 0) {  //条件が成立しているので通過
 10363:         XEiJ.mpuCycleCount += 2;
 10364:       } else {  //条件が成立していないのでデクリメント
 10365:         int rrr = XEiJ.regOC & 7;
 10366:         int s = XEiJ.regRn[rrr];
 10367:         if ((short) s == 0) {  //Drの下位16bitが0なので通過
 10368:           XEiJ.mpuCycleCount += 2;
 10369:           XEiJ.regRn[rrr] = s + 65535;
 10370:         } else {  //Drの下位16bitが0でないので分岐
 10371:           XEiJ.mpuCycleCount++;
 10372:           XEiJ.regRn[rrr] = s - 1;  //下位16bitが0でないので上位16bitは変化しない
 10373:           irpSetPC (t);
 10374:         }
 10375:       }
 10376:     } else if (ea < XEiJ.EA_AR) {  //SGT.B Dr
 10377:       if (XEiJ.MPU_CC_GT << XEiJ.regCCR < 0) {  //セット
 10378:         XEiJ.mpuCycleCount++;
 10379:         XEiJ.regRn[ea] |= 0xff;
 10380:       } else {  //クリア
 10381:         XEiJ.mpuCycleCount++;
 10382:         XEiJ.regRn[ea] &= ~0xff;
 10383:       }
 10384:     } else if ((XEiJ.EAM_PW | XEiJ.EAM_PX | XEiJ.EAM_IM) << ea < 0L) {  //TRAPGT.W/TRAPGT.L/TRAPGT
 10385:       if (ea == 072) {  //.W
 10386:         mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);
 10387:       } else if (ea == 073) {  //.L
 10388:         mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS);
 10389:       }
 10390:       if (XEiJ.MPU_CC_GT << XEiJ.regCCR < 0) {
 10391:         //条件が成立しているのでTRAPする
 10392:         m60Address = XEiJ.regPC0;  //アドレスは命令の先頭
 10393:         M68kException.m6eNumber = M68kException.M6E_TRAPV_INSTRUCTION;
 10394:         throw M68kException.m6eSignal;
 10395:       } else {
 10396:         //条件が成立していないのでTRAPしない
 10397:         XEiJ.mpuCycleCount++;
 10398:       }
 10399:     } else {  //SGT.B <mem>
 10400:       XEiJ.mpuCycleCount++;
 10401:       mmuWriteByteData (efaMltByte (ea), XEiJ.MPU_CC_GT << XEiJ.regCCR >> 31, XEiJ.regSRS);
 10402:     }
 10403:   }  //irpSgt
 10404: 
 10405:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10406:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 10407:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 10408:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10409:   //SLE.B <ea>                                      |-|012346|-|-***-|-----|D M+-WXZ  |0101_111_111_mmm_rrr
 10410:   //SNGT.B <ea>                                     |A|012346|-|-***-|-----|D M+-WXZ  |0101_111_111_mmm_rrr [SLE.B <ea>]
 10411:   //DBLE.W Dr,<label>                               |-|012346|-|-***-|-----|          |0101_111_111_001_rrr-{offset}
 10412:   //DBNGT.W Dr,<label>                              |A|012346|-|-***-|-----|          |0101_111_111_001_rrr-{offset}        [DBLE.W Dr,<label>]
 10413:   //TRAPLE.W #<data>                                |-|--2346|-|-***-|-----|          |0101_111_111_111_010-{data}
 10414:   //TPLE.W #<data>                                  |A|--2346|-|-***-|-----|          |0101_111_111_111_010-{data}  [TRAPLE.W #<data>]
 10415:   //TPNGT.W #<data>                                 |A|--2346|-|-***-|-----|          |0101_111_111_111_010-{data}  [TRAPLE.W #<data>]
 10416:   //TRAPNGT.W #<data>                               |A|--2346|-|-***-|-----|          |0101_111_111_111_010-{data}  [TRAPLE.W #<data>]
 10417:   //TRAPLE.L #<data>                                |-|--2346|-|-***-|-----|          |0101_111_111_111_011-{data}
 10418:   //TPLE.L #<data>                                  |A|--2346|-|-***-|-----|          |0101_111_111_111_011-{data}  [TRAPLE.L #<data>]
 10419:   //TPNGT.L #<data>                                 |A|--2346|-|-***-|-----|          |0101_111_111_111_011-{data}  [TRAPLE.L #<data>]
 10420:   //TRAPNGT.L #<data>                               |A|--2346|-|-***-|-----|          |0101_111_111_111_011-{data}  [TRAPLE.L #<data>]
 10421:   //TRAPLE                                          |-|--2346|-|-***-|-----|          |0101_111_111_111_100
 10422:   //TPLE                                            |A|--2346|-|-***-|-----|          |0101_111_111_111_100 [TRAPLE]
 10423:   //TPNGT                                           |A|--2346|-|-***-|-----|          |0101_111_111_111_100 [TRAPLE]
 10424:   //TRAPNGT                                         |A|--2346|-|-***-|-----|          |0101_111_111_111_100 [TRAPLE]
 10425:   public static void irpSle () throws M68kException {
 10426:     int ea = XEiJ.regOC & 63;
 10427:     if (ea >> 3 == XEiJ.MMM_AR) {  //DBLE.W Dr,<label>
 10428:       int t = XEiJ.regPC;  //pc0+2
 10429:       XEiJ.regPC = t + 2;  //pc0+4
 10430:       t += mmuReadWordSignExword (t, XEiJ.regSRS);  //pc0+2+16bitディスプレースメント
 10431:       if ((t & 1) != 0) {  //分岐先のアドレスが奇数
 10432:         //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ
 10433:         irpBccAddressError (t);
 10434:       }
 10435:       if (XEiJ.MPU_CC_LE << XEiJ.regCCR < 0) {  //条件が成立しているので通過
 10436:         XEiJ.mpuCycleCount += 2;
 10437:       } else {  //条件が成立していないのでデクリメント
 10438:         int rrr = XEiJ.regOC & 7;
 10439:         int s = XEiJ.regRn[rrr];
 10440:         if ((short) s == 0) {  //Drの下位16bitが0なので通過
 10441:           XEiJ.mpuCycleCount += 2;
 10442:           XEiJ.regRn[rrr] = s + 65535;
 10443:         } else {  //Drの下位16bitが0でないので分岐
 10444:           XEiJ.mpuCycleCount++;
 10445:           XEiJ.regRn[rrr] = s - 1;  //下位16bitが0でないので上位16bitは変化しない
 10446:           irpSetPC (t);
 10447:         }
 10448:       }
 10449:     } else if (ea < XEiJ.EA_AR) {  //SLE.B Dr
 10450:       if (XEiJ.MPU_CC_LE << XEiJ.regCCR < 0) {  //セット
 10451:         XEiJ.mpuCycleCount++;
 10452:         XEiJ.regRn[ea] |= 0xff;
 10453:       } else {  //クリア
 10454:         XEiJ.mpuCycleCount++;
 10455:         XEiJ.regRn[ea] &= ~0xff;
 10456:       }
 10457:     } else if ((XEiJ.EAM_PW | XEiJ.EAM_PX | XEiJ.EAM_IM) << ea < 0L) {  //TRAPLE.W/TRAPLE.L/TRAPLE
 10458:       if (ea == 072) {  //.W
 10459:         mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);
 10460:       } else if (ea == 073) {  //.L
 10461:         mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS);
 10462:       }
 10463:       if (XEiJ.MPU_CC_LE << XEiJ.regCCR < 0) {
 10464:         //条件が成立しているのでTRAPする
 10465:         m60Address = XEiJ.regPC0;  //アドレスは命令の先頭
 10466:         M68kException.m6eNumber = M68kException.M6E_TRAPV_INSTRUCTION;
 10467:         throw M68kException.m6eSignal;
 10468:       } else {
 10469:         //条件が成立していないのでTRAPしない
 10470:         XEiJ.mpuCycleCount++;
 10471:       }
 10472:     } else {  //SLE.B <mem>
 10473:       XEiJ.mpuCycleCount++;
 10474:       mmuWriteByteData (efaMltByte (ea), XEiJ.MPU_CC_LE << XEiJ.regCCR >> 31, XEiJ.regSRS);
 10475:     }
 10476:   }  //irpSle
 10477: 
 10478:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10479:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 10480:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 10481:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10482:   //BRA.W <label>                                   |-|012346|-|-----|-----|          |0110_000_000_000_000-{offset}
 10483:   //JBRA.W <label>                                  |A|012346|-|-----|-----|          |0110_000_000_000_000-{offset}        [BRA.W <label>]
 10484:   //BRA.S <label>                                   |-|012346|-|-----|-----|          |0110_000_000_sss_sss (s is not equal to 0)
 10485:   //JBRA.S <label>                                  |A|012346|-|-----|-----|          |0110_000_000_sss_sss (s is not equal to 0)   [BRA.S <label>]
 10486:   public static void irpBrasw () throws M68kException {
 10487:     XEiJ.mpuCycleCount++;  //0clkにしない
 10488:     int t = XEiJ.regPC;  //pc0+2
 10489:     int s = (byte) XEiJ.regOC;  //オフセット
 10490:     if (s == 0) {  //BRA.W
 10491:       XEiJ.regPC = t + 2;
 10492:       s = mmuReadWordSignExword (t, XEiJ.regSRS);  //pcws
 10493:     }
 10494:     irpSetPC (t + s);  //pc0+2+オフセット
 10495:   }  //irpBrasw
 10496: 
 10497:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10498:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 10499:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 10500:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10501:   //BRA.S <label>                                   |-|012346|-|-----|-----|          |0110_000_001_sss_sss
 10502:   //JBRA.S <label>                                  |A|012346|-|-----|-----|          |0110_000_001_sss_sss [BRA.S <label>]
 10503:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10504:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 10505:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 10506:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10507:   //BRA.S <label>                                   |-|012346|-|-----|-----|          |0110_000_010_sss_sss
 10508:   //JBRA.S <label>                                  |A|012346|-|-----|-----|          |0110_000_010_sss_sss [BRA.S <label>]
 10509:   public static void irpBras () throws M68kException {
 10510:     XEiJ.mpuCycleCount++;  //0clkにしない
 10511:     irpSetPC (XEiJ.regPC + (byte) XEiJ.regOC);  //pc0+2+オフセット
 10512:   }  //irpBras
 10513: 
 10514:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10515:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 10516:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 10517:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10518:   //BRA.S <label>                                   |-|--2346|-|-----|-----|          |0110_000_011_sss_sss (s is not equal to 63)
 10519:   //JBRA.S <label>                                  |A|--2346|-|-----|-----|          |0110_000_011_sss_sss (s is not equal to 63)  [BRA.S <label>]
 10520:   //BRA.L <label>                                   |-|--2346|-|-----|-----|          |0110_000_011_111_111-{offset}
 10521:   public static void irpBrasl () throws M68kException {
 10522:     XEiJ.mpuCycleCount++;  //0clkにしない
 10523:     int t = XEiJ.regPC;  //pc0+2
 10524:     int s = (byte) XEiJ.regOC;  //オフセット
 10525:     if (s == -1) {  //BRA.L
 10526:       XEiJ.regPC = t + 4;
 10527:       s = mmuReadLongExword (t, XEiJ.regSRS);  //pcls
 10528:     }
 10529:     irpSetPC (t + s);  //pc0+2+オフセット
 10530:   }  //irpBrasl
 10531: 
 10532:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10533:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 10534:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 10535:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10536:   //BSR.W <label>                                   |-|012346|-|-----|-----|          |0110_000_100_000_000-{offset}
 10537:   //JBSR.W <label>                                  |A|012346|-|-----|-----|          |0110_000_100_000_000-{offset}        [BSR.W <label>]
 10538:   //BSR.S <label>                                   |-|012346|-|-----|-----|          |0110_000_100_sss_sss (s is not equal to 0)
 10539:   //JBSR.S <label>                                  |A|012346|-|-----|-----|          |0110_000_100_sss_sss (s is not equal to 0)   [BSR.S <label>]
 10540:   public static void irpBsrsw () throws M68kException {
 10541:     XEiJ.mpuCycleCount++;
 10542:     int t = XEiJ.regPC;  //pc0+2
 10543:     int s = (byte) XEiJ.regOC;  //オフセット
 10544:     if (s == 0) {  //BSR.W
 10545:       XEiJ.regPC = t + 2;
 10546:       s = mmuReadWordSignExword (t, XEiJ.regSRS);  //pcws
 10547:     }
 10548:     m60Incremented -= 4L << (7 << 3);
 10549:     int sp = m60Address = XEiJ.regRn[15] -= 4;
 10550:     mmuWriteLongData (sp, XEiJ.regPC, XEiJ.regSRS);  //pushl
 10551:     irpSetPC (t + s);  //pc0+2+オフセット
 10552:   }  //irpBsrsw
 10553: 
 10554:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10555:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 10556:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 10557:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10558:   //BSR.S <label>                                   |-|012346|-|-----|-----|          |0110_000_101_sss_sss
 10559:   //JBSR.S <label>                                  |A|012346|-|-----|-----|          |0110_000_101_sss_sss [BSR.S <label>]
 10560:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10561:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 10562:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 10563:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10564:   //BSR.S <label>                                   |-|012346|-|-----|-----|          |0110_000_110_sss_sss
 10565:   //JBSR.S <label>                                  |A|012346|-|-----|-----|          |0110_000_110_sss_sss [BSR.S <label>]
 10566:   public static void irpBsrs () throws M68kException {
 10567:     XEiJ.mpuCycleCount++;
 10568:     m60Incremented -= 4L << (7 << 3);
 10569:     int sp = m60Address = XEiJ.regRn[15] -= 4;
 10570:     mmuWriteLongData (sp, XEiJ.regPC, XEiJ.regSRS);  //pushl
 10571:     irpSetPC (XEiJ.regPC + (byte) XEiJ.regOC);  //pc0+2+オフセット
 10572:   }  //irpBsrs
 10573: 
 10574:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10575:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 10576:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 10577:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10578:   //BSR.S <label>                                   |-|--2346|-|-----|-----|          |0110_000_111_sss_sss (s is not equal to 63)
 10579:   //JBSR.S <label>                                  |A|--2346|-|-----|-----|          |0110_000_111_sss_sss (s is not equal to 63)  [BSR.S <label>]
 10580:   //BSR.L <label>                                   |-|--2346|-|-----|-----|          |0110_000_111_111_111-{offset}
 10581:   public static void irpBsrsl () throws M68kException {
 10582:     XEiJ.mpuCycleCount++;
 10583:     int t = XEiJ.regPC;  //pc0+2
 10584:     int s = (byte) XEiJ.regOC;  //オフセット
 10585:     if (s == -1) {  //BSR.L
 10586:       XEiJ.regPC = t + 4;
 10587:       s = mmuReadLongExword (t, XEiJ.regSRS);  //pcls
 10588:     }
 10589:     m60Incremented -= 4L << (7 << 3);
 10590:     int sp = m60Address = XEiJ.regRn[15] -= 4;
 10591:     mmuWriteLongData (sp, XEiJ.regPC, XEiJ.regSRS);  //pushl
 10592:     irpSetPC (t + s);  //pc0+2+オフセット
 10593:   }  //irpBsrsl
 10594: 
 10595:   //irpBccAddressError (int t)
 10596:   public static void irpBccAddressError (int t) throws M68kException {
 10597:     M68kException.m6eNumber = M68kException.M6E_ADDRESS_ERROR;
 10598:     m60Address = t & -2;  //偶数にする
 10599:     M68kException.m6eDirection = XEiJ.MPU_WR_READ;
 10600:     M68kException.m6eSize = XEiJ.MPU_SS_WORD;
 10601:     throw M68kException.m6eSignal;
 10602:   }
 10603: 
 10604:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10605:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 10606:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 10607:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10608:   //BHI.W <label>                                   |-|012346|-|--*-*|-----|          |0110_001_000_000_000-{offset}
 10609:   //BNLS.W <label>                                  |A|012346|-|--*-*|-----|          |0110_001_000_000_000-{offset}        [BHI.W <label>]
 10610:   //JBHI.W <label>                                  |A|012346|-|--*-*|-----|          |0110_001_000_000_000-{offset}        [BHI.W <label>]
 10611:   //JBNLS.W <label>                                 |A|012346|-|--*-*|-----|          |0110_001_000_000_000-{offset}        [BHI.W <label>]
 10612:   //BHI.S <label>                                   |-|012346|-|--*-*|-----|          |0110_001_000_sss_sss (s is not equal to 0)
 10613:   //BNLS.S <label>                                  |A|012346|-|--*-*|-----|          |0110_001_000_sss_sss (s is not equal to 0)   [BHI.S <label>]
 10614:   //JBHI.S <label>                                  |A|012346|-|--*-*|-----|          |0110_001_000_sss_sss (s is not equal to 0)   [BHI.S <label>]
 10615:   //JBNLS.S <label>                                 |A|012346|-|--*-*|-----|          |0110_001_000_sss_sss (s is not equal to 0)   [BHI.S <label>]
 10616:   //JBLS.L <label>                                  |A|012346|-|--*-*|-----|          |0110_001_000_000_110-0100111011111001-{address}      [BHI.S (*)+8;JMP <label>]
 10617:   //JBNHI.L <label>                                 |A|012346|-|--*-*|-----|          |0110_001_000_000_110-0100111011111001-{address}      [BHI.S (*)+8;JMP <label>]
 10618:   public static void irpBhisw () throws M68kException {
 10619:     XEiJ.mpuCycleCount++;
 10620:     int t = XEiJ.regPC;  //pc0+2
 10621:     int s = (byte) XEiJ.regOC;  //8bitディスプレースメント
 10622:     if (s == 0) {  //Bcc.W
 10623:       XEiJ.regPC = t + 2;  //pc0+4
 10624:       s = mmuReadWordSignExword (t, XEiJ.regSRS);  //16bitディスプレースメント
 10625:     }
 10626:     t += s;  //pc0+2+ディスプレースメント
 10627:     if ((t & 1) != 0) {  //分岐先のアドレスが奇数
 10628:       //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ
 10629:       irpBccAddressError (t);
 10630:     }
 10631:     if (XEiJ.MPU_CC_HI << XEiJ.regCCR < 0) {  //分岐する
 10632:       irpSetPC (t);
 10633:     }
 10634:   }  //irpBhisw
 10635: 
 10636:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10637:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 10638:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 10639:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10640:   //BHI.S <label>                                   |-|012346|-|--*-*|-----|          |0110_001_001_sss_sss
 10641:   //BNLS.S <label>                                  |A|012346|-|--*-*|-----|          |0110_001_001_sss_sss [BHI.S <label>]
 10642:   //JBHI.S <label>                                  |A|012346|-|--*-*|-----|          |0110_001_001_sss_sss [BHI.S <label>]
 10643:   //JBNLS.S <label>                                 |A|012346|-|--*-*|-----|          |0110_001_001_sss_sss [BHI.S <label>]
 10644:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10645:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 10646:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 10647:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10648:   //BHI.S <label>                                   |-|012346|-|--*-*|-----|          |0110_001_010_sss_sss
 10649:   //BNLS.S <label>                                  |A|012346|-|--*-*|-----|          |0110_001_010_sss_sss [BHI.S <label>]
 10650:   //JBHI.S <label>                                  |A|012346|-|--*-*|-----|          |0110_001_010_sss_sss [BHI.S <label>]
 10651:   //JBNLS.S <label>                                 |A|012346|-|--*-*|-----|          |0110_001_010_sss_sss [BHI.S <label>]
 10652:   public static void irpBhis () throws M68kException {
 10653:     XEiJ.mpuCycleCount++;
 10654:     int t = XEiJ.regPC;  //pc0+2
 10655:     int s = (byte) XEiJ.regOC;  //8bitディスプレースメント
 10656:     t += s;  //pc0+2+ディスプレースメント
 10657:     if ((t & 1) != 0) {  //分岐先のアドレスが奇数
 10658:       //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ
 10659:       irpBccAddressError (t);
 10660:     }
 10661:     if (XEiJ.MPU_CC_HI << XEiJ.regCCR < 0) {  //分岐する
 10662:       irpSetPC (t);
 10663:     }
 10664:   }  //irpBhis
 10665: 
 10666:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10667:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 10668:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 10669:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10670:   //BHI.S <label>                                   |-|--2346|-|--*-*|-----|          |0110_001_011_sss_sss (s is not equal to 63)
 10671:   //BNLS.S <label>                                  |A|--2346|-|--*-*|-----|          |0110_001_011_sss_sss (s is not equal to 63)  [BHI.S <label>]
 10672:   //JBHI.S <label>                                  |A|--2346|-|--*-*|-----|          |0110_001_011_sss_sss (s is not equal to 63)  [BHI.S <label>]
 10673:   //JBNLS.S <label>                                 |A|--2346|-|--*-*|-----|          |0110_001_011_sss_sss (s is not equal to 63)  [BHI.S <label>]
 10674:   //BHI.L <label>                                   |-|--2346|-|--*-*|-----|          |0110_001_011_111_111-{offset}
 10675:   //BNLS.L <label>                                  |A|--2346|-|--*-*|-----|          |0110_001_011_111_111-{offset}        [BHI.L <label>]
 10676:   public static void irpBhisl () throws M68kException {
 10677:     XEiJ.mpuCycleCount++;
 10678:     int t = XEiJ.regPC;  //pc0+2
 10679:     int s = (byte) XEiJ.regOC;  //8bitディスプレースメント
 10680:     if (s == -1) {  //Bcc.L
 10681:       XEiJ.regPC = t + 4;  //pc0+6
 10682:       s = mmuReadLongExword (t, XEiJ.regSRS);  //32bitディスプレースメント
 10683:     }
 10684:     t += s;  //pc0+2+ディスプレースメント
 10685:     if ((t & 1) != 0) {  //分岐先のアドレスが奇数
 10686:       //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ
 10687:       irpBccAddressError (t);
 10688:     }
 10689:     if (XEiJ.MPU_CC_HI << XEiJ.regCCR < 0) {  //分岐する
 10690:       irpSetPC (t);
 10691:     }
 10692:   }  //irpBhisl
 10693: 
 10694:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10695:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 10696:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 10697:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10698:   //BLS.W <label>                                   |-|012346|-|--*-*|-----|          |0110_001_100_000_000-{offset}
 10699:   //BNHI.W <label>                                  |A|012346|-|--*-*|-----|          |0110_001_100_000_000-{offset}        [BLS.W <label>]
 10700:   //JBLS.W <label>                                  |A|012346|-|--*-*|-----|          |0110_001_100_000_000-{offset}        [BLS.W <label>]
 10701:   //JBNHI.W <label>                                 |A|012346|-|--*-*|-----|          |0110_001_100_000_000-{offset}        [BLS.W <label>]
 10702:   //BLS.S <label>                                   |-|012346|-|--*-*|-----|          |0110_001_100_sss_sss (s is not equal to 0)
 10703:   //BNHI.S <label>                                  |A|012346|-|--*-*|-----|          |0110_001_100_sss_sss (s is not equal to 0)   [BLS.S <label>]
 10704:   //JBLS.S <label>                                  |A|012346|-|--*-*|-----|          |0110_001_100_sss_sss (s is not equal to 0)   [BLS.S <label>]
 10705:   //JBNHI.S <label>                                 |A|012346|-|--*-*|-----|          |0110_001_100_sss_sss (s is not equal to 0)   [BLS.S <label>]
 10706:   //JBHI.L <label>                                  |A|012346|-|--*-*|-----|          |0110_001_100_000_110-0100111011111001-{address}      [BLS.S (*)+8;JMP <label>]
 10707:   //JBNLS.L <label>                                 |A|012346|-|--*-*|-----|          |0110_001_100_000_110-0100111011111001-{address}      [BLS.S (*)+8;JMP <label>]
 10708:   public static void irpBlssw () throws M68kException {
 10709:     XEiJ.mpuCycleCount++;
 10710:     int t = XEiJ.regPC;  //pc0+2
 10711:     int s = (byte) XEiJ.regOC;  //8bitディスプレースメント
 10712:     if (s == 0) {  //Bcc.W
 10713:       XEiJ.regPC = t + 2;  //pc0+4
 10714:       s = mmuReadWordSignExword (t, XEiJ.regSRS);  //16bitディスプレースメント
 10715:     }
 10716:     t += s;  //pc0+2+ディスプレースメント
 10717:     if ((t & 1) != 0) {  //分岐先のアドレスが奇数
 10718:       //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ
 10719:       irpBccAddressError (t);
 10720:     }
 10721:     if (XEiJ.MPU_CC_LS << XEiJ.regCCR < 0) {  //分岐する
 10722:       irpSetPC (t);
 10723:     }
 10724:   }  //irpBlssw
 10725: 
 10726:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10727:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 10728:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 10729:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10730:   //BLS.S <label>                                   |-|012346|-|--*-*|-----|          |0110_001_101_sss_sss
 10731:   //BNHI.S <label>                                  |A|012346|-|--*-*|-----|          |0110_001_101_sss_sss [BLS.S <label>]
 10732:   //JBLS.S <label>                                  |A|012346|-|--*-*|-----|          |0110_001_101_sss_sss [BLS.S <label>]
 10733:   //JBNHI.S <label>                                 |A|012346|-|--*-*|-----|          |0110_001_101_sss_sss [BLS.S <label>]
 10734:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10735:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 10736:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 10737:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10738:   //BLS.S <label>                                   |-|012346|-|--*-*|-----|          |0110_001_110_sss_sss
 10739:   //BNHI.S <label>                                  |A|012346|-|--*-*|-----|          |0110_001_110_sss_sss [BLS.S <label>]
 10740:   //JBLS.S <label>                                  |A|012346|-|--*-*|-----|          |0110_001_110_sss_sss [BLS.S <label>]
 10741:   //JBNHI.S <label>                                 |A|012346|-|--*-*|-----|          |0110_001_110_sss_sss [BLS.S <label>]
 10742:   public static void irpBlss () throws M68kException {
 10743:     XEiJ.mpuCycleCount++;
 10744:     int t = XEiJ.regPC;  //pc0+2
 10745:     int s = (byte) XEiJ.regOC;  //8bitディスプレースメント
 10746:     t += s;  //pc0+2+ディスプレースメント
 10747:     if ((t & 1) != 0) {  //分岐先のアドレスが奇数
 10748:       //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ
 10749:       irpBccAddressError (t);
 10750:     }
 10751:     if (XEiJ.MPU_CC_LS << XEiJ.regCCR < 0) {  //分岐する
 10752:       irpSetPC (t);
 10753:     }
 10754:   }  //irpBlss
 10755: 
 10756:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10757:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 10758:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 10759:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10760:   //BLS.S <label>                                   |-|--2346|-|--*-*|-----|          |0110_001_111_sss_sss (s is not equal to 63)
 10761:   //BNHI.S <label>                                  |A|--2346|-|--*-*|-----|          |0110_001_111_sss_sss (s is not equal to 63)  [BLS.S <label>]
 10762:   //JBLS.S <label>                                  |A|--2346|-|--*-*|-----|          |0110_001_111_sss_sss (s is not equal to 63)  [BLS.S <label>]
 10763:   //JBNHI.S <label>                                 |A|--2346|-|--*-*|-----|          |0110_001_111_sss_sss (s is not equal to 63)  [BLS.S <label>]
 10764:   //BLS.L <label>                                   |-|--2346|-|--*-*|-----|          |0110_001_111_111_111-{offset}
 10765:   //BNHI.L <label>                                  |A|--2346|-|--*-*|-----|          |0110_001_111_111_111-{offset}        [BLS.L <label>]
 10766:   public static void irpBlssl () throws M68kException {
 10767:     XEiJ.mpuCycleCount++;
 10768:     int t = XEiJ.regPC;  //pc0+2
 10769:     int s = (byte) XEiJ.regOC;  //8bitディスプレースメント
 10770:     if (s == -1) {  //Bcc.L
 10771:       XEiJ.regPC = t + 4;  //pc0+6
 10772:       s = mmuReadLongExword (t, XEiJ.regSRS);  //32bitディスプレースメント
 10773:     }
 10774:     t += s;  //pc0+2+ディスプレースメント
 10775:     if ((t & 1) != 0) {  //分岐先のアドレスが奇数
 10776:       //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ
 10777:       irpBccAddressError (t);
 10778:     }
 10779:     if (XEiJ.MPU_CC_LS << XEiJ.regCCR < 0) {  //分岐する
 10780:       irpSetPC (t);
 10781:     }
 10782:   }  //irpBlssl
 10783: 
 10784:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10785:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 10786:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 10787:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10788:   //BCC.W <label>                                   |-|012346|-|----*|-----|          |0110_010_000_000_000-{offset}
 10789:   //BHS.W <label>                                   |A|012346|-|----*|-----|          |0110_010_000_000_000-{offset}        [BCC.W <label>]
 10790:   //BNCS.W <label>                                  |A|012346|-|----*|-----|          |0110_010_000_000_000-{offset}        [BCC.W <label>]
 10791:   //BNLO.W <label>                                  |A|012346|-|----*|-----|          |0110_010_000_000_000-{offset}        [BCC.W <label>]
 10792:   //JBCC.W <label>                                  |A|012346|-|----*|-----|          |0110_010_000_000_000-{offset}        [BCC.W <label>]
 10793:   //JBHS.W <label>                                  |A|012346|-|----*|-----|          |0110_010_000_000_000-{offset}        [BCC.W <label>]
 10794:   //JBNCS.W <label>                                 |A|012346|-|----*|-----|          |0110_010_000_000_000-{offset}        [BCC.W <label>]
 10795:   //JBNLO.W <label>                                 |A|012346|-|----*|-----|          |0110_010_000_000_000-{offset}        [BCC.W <label>]
 10796:   //BCC.S <label>                                   |-|012346|-|----*|-----|          |0110_010_000_sss_sss (s is not equal to 0)
 10797:   //BHS.S <label>                                   |A|012346|-|----*|-----|          |0110_010_000_sss_sss (s is not equal to 0)   [BCC.S <label>]
 10798:   //BNCS.S <label>                                  |A|012346|-|----*|-----|          |0110_010_000_sss_sss (s is not equal to 0)   [BCC.S <label>]
 10799:   //BNLO.S <label>                                  |A|012346|-|----*|-----|          |0110_010_000_sss_sss (s is not equal to 0)   [BCC.S <label>]
 10800:   //JBCC.S <label>                                  |A|012346|-|----*|-----|          |0110_010_000_sss_sss (s is not equal to 0)   [BCC.S <label>]
 10801:   //JBHS.S <label>                                  |A|012346|-|----*|-----|          |0110_010_000_sss_sss (s is not equal to 0)   [BCC.S <label>]
 10802:   //JBNCS.S <label>                                 |A|012346|-|----*|-----|          |0110_010_000_sss_sss (s is not equal to 0)   [BCC.S <label>]
 10803:   //JBNLO.S <label>                                 |A|012346|-|----*|-----|          |0110_010_000_sss_sss (s is not equal to 0)   [BCC.S <label>]
 10804:   //JBCS.L <label>                                  |A|012346|-|----*|-----|          |0110_010_000_000_110-0100111011111001-{address}      [BCC.S (*)+8;JMP <label>]
 10805:   //JBLO.L <label>                                  |A|012346|-|----*|-----|          |0110_010_000_000_110-0100111011111001-{address}      [BCC.S (*)+8;JMP <label>]
 10806:   //JBNCC.L <label>                                 |A|012346|-|----*|-----|          |0110_010_000_000_110-0100111011111001-{address}      [BCC.S (*)+8;JMP <label>]
 10807:   //JBNHS.L <label>                                 |A|012346|-|----*|-----|          |0110_010_000_000_110-0100111011111001-{address}      [BCC.S (*)+8;JMP <label>]
 10808:   public static void irpBhssw () throws M68kException {
 10809:     XEiJ.mpuCycleCount++;
 10810:     int t = XEiJ.regPC;  //pc0+2
 10811:     int s = (byte) XEiJ.regOC;  //8bitディスプレースメント
 10812:     if (s == 0) {  //Bcc.W
 10813:       XEiJ.regPC = t + 2;  //pc0+4
 10814:       s = mmuReadWordSignExword (t, XEiJ.regSRS);  //16bitディスプレースメント
 10815:     }
 10816:     t += s;  //pc0+2+ディスプレースメント
 10817:     if ((t & 1) != 0) {  //分岐先のアドレスが奇数
 10818:       //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ
 10819:       irpBccAddressError (t);
 10820:     }
 10821:     if (XEiJ.MPU_CC_HS << XEiJ.regCCR < 0) {  //分岐する
 10822:       irpSetPC (t);
 10823:     }
 10824:   }  //irpBhssw
 10825: 
 10826:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10827:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 10828:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 10829:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10830:   //BCC.S <label>                                   |-|012346|-|----*|-----|          |0110_010_001_sss_sss
 10831:   //BHS.S <label>                                   |A|012346|-|----*|-----|          |0110_010_001_sss_sss [BCC.S <label>]
 10832:   //BNCS.S <label>                                  |A|012346|-|----*|-----|          |0110_010_001_sss_sss [BCC.S <label>]
 10833:   //BNLO.S <label>                                  |A|012346|-|----*|-----|          |0110_010_001_sss_sss [BCC.S <label>]
 10834:   //JBCC.S <label>                                  |A|012346|-|----*|-----|          |0110_010_001_sss_sss [BCC.S <label>]
 10835:   //JBHS.S <label>                                  |A|012346|-|----*|-----|          |0110_010_001_sss_sss [BCC.S <label>]
 10836:   //JBNCS.S <label>                                 |A|012346|-|----*|-----|          |0110_010_001_sss_sss [BCC.S <label>]
 10837:   //JBNLO.S <label>                                 |A|012346|-|----*|-----|          |0110_010_001_sss_sss [BCC.S <label>]
 10838:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10839:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 10840:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 10841:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10842:   //BCC.S <label>                                   |-|012346|-|----*|-----|          |0110_010_010_sss_sss
 10843:   //BHS.S <label>                                   |A|012346|-|----*|-----|          |0110_010_010_sss_sss [BCC.S <label>]
 10844:   //BNCS.S <label>                                  |A|012346|-|----*|-----|          |0110_010_010_sss_sss [BCC.S <label>]
 10845:   //BNLO.S <label>                                  |A|012346|-|----*|-----|          |0110_010_010_sss_sss [BCC.S <label>]
 10846:   //JBCC.S <label>                                  |A|012346|-|----*|-----|          |0110_010_010_sss_sss [BCC.S <label>]
 10847:   //JBHS.S <label>                                  |A|012346|-|----*|-----|          |0110_010_010_sss_sss [BCC.S <label>]
 10848:   //JBNCS.S <label>                                 |A|012346|-|----*|-----|          |0110_010_010_sss_sss [BCC.S <label>]
 10849:   //JBNLO.S <label>                                 |A|012346|-|----*|-----|          |0110_010_010_sss_sss [BCC.S <label>]
 10850:   public static void irpBhss () throws M68kException {
 10851:     XEiJ.mpuCycleCount++;
 10852:     int t = XEiJ.regPC;  //pc0+2
 10853:     int s = (byte) XEiJ.regOC;  //8bitディスプレースメント
 10854:     t += s;  //pc0+2+ディスプレースメント
 10855:     if ((t & 1) != 0) {  //分岐先のアドレスが奇数
 10856:       //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ
 10857:       irpBccAddressError (t);
 10858:     }
 10859:     if (XEiJ.MPU_CC_HS << XEiJ.regCCR < 0) {  //分岐する
 10860:       irpSetPC (t);
 10861:     }
 10862:   }  //irpBhss
 10863: 
 10864:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10865:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 10866:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 10867:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10868:   //BCC.S <label>                                   |-|--2346|-|----*|-----|          |0110_010_011_sss_sss (s is not equal to 63)
 10869:   //BHS.S <label>                                   |A|--2346|-|----*|-----|          |0110_010_011_sss_sss (s is not equal to 63)  [BCC.S <label>]
 10870:   //BNCS.S <label>                                  |A|--2346|-|----*|-----|          |0110_010_011_sss_sss (s is not equal to 63)  [BCC.S <label>]
 10871:   //BNLO.S <label>                                  |A|--2346|-|----*|-----|          |0110_010_011_sss_sss (s is not equal to 63)  [BCC.S <label>]
 10872:   //JBCC.S <label>                                  |A|--2346|-|----*|-----|          |0110_010_011_sss_sss (s is not equal to 63)  [BCC.S <label>]
 10873:   //JBHS.S <label>                                  |A|--2346|-|----*|-----|          |0110_010_011_sss_sss (s is not equal to 63)  [BCC.S <label>]
 10874:   //JBNCS.S <label>                                 |A|--2346|-|----*|-----|          |0110_010_011_sss_sss (s is not equal to 63)  [BCC.S <label>]
 10875:   //JBNLO.S <label>                                 |A|--2346|-|----*|-----|          |0110_010_011_sss_sss (s is not equal to 63)  [BCC.S <label>]
 10876:   //BCC.L <label>                                   |-|--2346|-|----*|-----|          |0110_010_011_111_111-{offset}
 10877:   //BHS.L <label>                                   |A|--2346|-|----*|-----|          |0110_010_011_111_111-{offset}        [BCC.L <label>]
 10878:   //BNCS.L <label>                                  |A|--2346|-|----*|-----|          |0110_010_011_111_111-{offset}        [BCC.L <label>]
 10879:   //BNLO.L <label>                                  |A|--2346|-|----*|-----|          |0110_010_011_111_111-{offset}        [BCC.L <label>]
 10880:   public static void irpBhssl () throws M68kException {
 10881:     XEiJ.mpuCycleCount++;
 10882:     int t = XEiJ.regPC;  //pc0+2
 10883:     int s = (byte) XEiJ.regOC;  //8bitディスプレースメント
 10884:     if (s == -1) {  //Bcc.L
 10885:       XEiJ.regPC = t + 4;  //pc0+6
 10886:       s = mmuReadLongExword (t, XEiJ.regSRS);  //32bitディスプレースメント
 10887:     }
 10888:     t += s;  //pc0+2+ディスプレースメント
 10889:     if ((t & 1) != 0) {  //分岐先のアドレスが奇数
 10890:       //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ
 10891:       irpBccAddressError (t);
 10892:     }
 10893:     if (XEiJ.MPU_CC_HS << XEiJ.regCCR < 0) {  //分岐する
 10894:       irpSetPC (t);
 10895:     }
 10896:   }  //irpBhssl
 10897: 
 10898:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10899:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 10900:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 10901:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10902:   //BCS.W <label>                                   |-|012346|-|----*|-----|          |0110_010_100_000_000-{offset}
 10903:   //BLO.W <label>                                   |A|012346|-|----*|-----|          |0110_010_100_000_000-{offset}        [BCS.W <label>]
 10904:   //BNCC.W <label>                                  |A|012346|-|----*|-----|          |0110_010_100_000_000-{offset}        [BCS.W <label>]
 10905:   //BNHS.W <label>                                  |A|012346|-|----*|-----|          |0110_010_100_000_000-{offset}        [BCS.W <label>]
 10906:   //JBCS.W <label>                                  |A|012346|-|----*|-----|          |0110_010_100_000_000-{offset}        [BCS.W <label>]
 10907:   //JBLO.W <label>                                  |A|012346|-|----*|-----|          |0110_010_100_000_000-{offset}        [BCS.W <label>]
 10908:   //JBNCC.W <label>                                 |A|012346|-|----*|-----|          |0110_010_100_000_000-{offset}        [BCS.W <label>]
 10909:   //JBNHS.W <label>                                 |A|012346|-|----*|-----|          |0110_010_100_000_000-{offset}        [BCS.W <label>]
 10910:   //BCS.S <label>                                   |-|012346|-|----*|-----|          |0110_010_100_sss_sss (s is not equal to 0)
 10911:   //BLO.S <label>                                   |A|012346|-|----*|-----|          |0110_010_100_sss_sss (s is not equal to 0)   [BCS.S <label>]
 10912:   //BNCC.S <label>                                  |A|012346|-|----*|-----|          |0110_010_100_sss_sss (s is not equal to 0)   [BCS.S <label>]
 10913:   //BNHS.S <label>                                  |A|012346|-|----*|-----|          |0110_010_100_sss_sss (s is not equal to 0)   [BCS.S <label>]
 10914:   //JBCS.S <label>                                  |A|012346|-|----*|-----|          |0110_010_100_sss_sss (s is not equal to 0)   [BCS.S <label>]
 10915:   //JBLO.S <label>                                  |A|012346|-|----*|-----|          |0110_010_100_sss_sss (s is not equal to 0)   [BCS.S <label>]
 10916:   //JBNCC.S <label>                                 |A|012346|-|----*|-----|          |0110_010_100_sss_sss (s is not equal to 0)   [BCS.S <label>]
 10917:   //JBNHS.S <label>                                 |A|012346|-|----*|-----|          |0110_010_100_sss_sss (s is not equal to 0)   [BCS.S <label>]
 10918:   //JBCC.L <label>                                  |A|012346|-|----*|-----|          |0110_010_100_000_110-0100111011111001-{address}      [BCS.S (*)+8;JMP <label>]
 10919:   //JBHS.L <label>                                  |A|012346|-|----*|-----|          |0110_010_100_000_110-0100111011111001-{address}      [BCS.S (*)+8;JMP <label>]
 10920:   //JBNCS.L <label>                                 |A|012346|-|----*|-----|          |0110_010_100_000_110-0100111011111001-{address}      [BCS.S (*)+8;JMP <label>]
 10921:   //JBNLO.L <label>                                 |A|012346|-|----*|-----|          |0110_010_100_000_110-0100111011111001-{address}      [BCS.S (*)+8;JMP <label>]
 10922:   public static void irpBlosw () throws M68kException {
 10923:     XEiJ.mpuCycleCount++;
 10924:     int t = XEiJ.regPC;  //pc0+2
 10925:     int s = (byte) XEiJ.regOC;  //8bitディスプレースメント
 10926:     if (s == 0) {  //Bcc.W
 10927:       XEiJ.regPC = t + 2;  //pc0+4
 10928:       s = mmuReadWordSignExword (t, XEiJ.regSRS);  //16bitディスプレースメント
 10929:     }
 10930:     t += s;  //pc0+2+ディスプレースメント
 10931:     if ((t & 1) != 0) {  //分岐先のアドレスが奇数
 10932:       //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ
 10933:       irpBccAddressError (t);
 10934:     }
 10935:     if (XEiJ.MPU_CC_LO << XEiJ.regCCR < 0) {  //分岐する
 10936:       irpSetPC (t);
 10937:     }
 10938:   }  //irpBlosw
 10939: 
 10940:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10941:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 10942:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 10943:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10944:   //BCS.S <label>                                   |-|012346|-|----*|-----|          |0110_010_101_sss_sss
 10945:   //BLO.S <label>                                   |A|012346|-|----*|-----|          |0110_010_101_sss_sss [BCS.S <label>]
 10946:   //BNCC.S <label>                                  |A|012346|-|----*|-----|          |0110_010_101_sss_sss [BCS.S <label>]
 10947:   //BNHS.S <label>                                  |A|012346|-|----*|-----|          |0110_010_101_sss_sss [BCS.S <label>]
 10948:   //JBCS.S <label>                                  |A|012346|-|----*|-----|          |0110_010_101_sss_sss [BCS.S <label>]
 10949:   //JBLO.S <label>                                  |A|012346|-|----*|-----|          |0110_010_101_sss_sss [BCS.S <label>]
 10950:   //JBNCC.S <label>                                 |A|012346|-|----*|-----|          |0110_010_101_sss_sss [BCS.S <label>]
 10951:   //JBNHS.S <label>                                 |A|012346|-|----*|-----|          |0110_010_101_sss_sss [BCS.S <label>]
 10952:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10953:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 10954:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 10955:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10956:   //BCS.S <label>                                   |-|012346|-|----*|-----|          |0110_010_110_sss_sss
 10957:   //BLO.S <label>                                   |A|012346|-|----*|-----|          |0110_010_110_sss_sss [BCS.S <label>]
 10958:   //BNCC.S <label>                                  |A|012346|-|----*|-----|          |0110_010_110_sss_sss [BCS.S <label>]
 10959:   //BNHS.S <label>                                  |A|012346|-|----*|-----|          |0110_010_110_sss_sss [BCS.S <label>]
 10960:   //JBCS.S <label>                                  |A|012346|-|----*|-----|          |0110_010_110_sss_sss [BCS.S <label>]
 10961:   //JBLO.S <label>                                  |A|012346|-|----*|-----|          |0110_010_110_sss_sss [BCS.S <label>]
 10962:   //JBNCC.S <label>                                 |A|012346|-|----*|-----|          |0110_010_110_sss_sss [BCS.S <label>]
 10963:   //JBNHS.S <label>                                 |A|012346|-|----*|-----|          |0110_010_110_sss_sss [BCS.S <label>]
 10964:   public static void irpBlos () throws M68kException {
 10965:     XEiJ.mpuCycleCount++;
 10966:     int t = XEiJ.regPC;  //pc0+2
 10967:     int s = (byte) XEiJ.regOC;  //8bitディスプレースメント
 10968:     t += s;  //pc0+2+ディスプレースメント
 10969:     if ((t & 1) != 0) {  //分岐先のアドレスが奇数
 10970:       //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ
 10971:       irpBccAddressError (t);
 10972:     }
 10973:     if (XEiJ.MPU_CC_LO << XEiJ.regCCR < 0) {  //分岐する
 10974:       irpSetPC (t);
 10975:     }
 10976:   }  //irpBlos
 10977: 
 10978:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10979:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 10980:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 10981:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10982:   //BCS.S <label>                                   |-|--2346|-|----*|-----|          |0110_010_111_sss_sss (s is not equal to 63)
 10983:   //BLO.S <label>                                   |A|--2346|-|----*|-----|          |0110_010_111_sss_sss (s is not equal to 63)  [BCS.S <label>]
 10984:   //BNCC.S <label>                                  |A|--2346|-|----*|-----|          |0110_010_111_sss_sss (s is not equal to 63)  [BCS.S <label>]
 10985:   //BNHS.S <label>                                  |A|--2346|-|----*|-----|          |0110_010_111_sss_sss (s is not equal to 63)  [BCS.S <label>]
 10986:   //JBCS.S <label>                                  |A|--2346|-|----*|-----|          |0110_010_111_sss_sss (s is not equal to 63)  [BCS.S <label>]
 10987:   //JBLO.S <label>                                  |A|--2346|-|----*|-----|          |0110_010_111_sss_sss (s is not equal to 63)  [BCS.S <label>]
 10988:   //JBNCC.S <label>                                 |A|--2346|-|----*|-----|          |0110_010_111_sss_sss (s is not equal to 63)  [BCS.S <label>]
 10989:   //JBNHS.S <label>                                 |A|--2346|-|----*|-----|          |0110_010_111_sss_sss (s is not equal to 63)  [BCS.S <label>]
 10990:   //BCS.L <label>                                   |-|--2346|-|----*|-----|          |0110_010_111_111_111-{offset}
 10991:   //BLO.L <label>                                   |A|--2346|-|----*|-----|          |0110_010_111_111_111-{offset}        [BCS.L <label>]
 10992:   //BNCC.L <label>                                  |A|--2346|-|----*|-----|          |0110_010_111_111_111-{offset}        [BCS.L <label>]
 10993:   //BNHS.L <label>                                  |A|--2346|-|----*|-----|          |0110_010_111_111_111-{offset}        [BCS.L <label>]
 10994:   public static void irpBlosl () throws M68kException {
 10995:     XEiJ.mpuCycleCount++;
 10996:     int t = XEiJ.regPC;  //pc0+2
 10997:     int s = (byte) XEiJ.regOC;  //8bitディスプレースメント
 10998:     if (s == -1) {  //Bcc.L
 10999:       XEiJ.regPC = t + 4;  //pc0+6
 11000:       s = mmuReadLongExword (t, XEiJ.regSRS);  //32bitディスプレースメント
 11001:     }
 11002:     t += s;  //pc0+2+ディスプレースメント
 11003:     if ((t & 1) != 0) {  //分岐先のアドレスが奇数
 11004:       //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ
 11005:       irpBccAddressError (t);
 11006:     }
 11007:     if (XEiJ.MPU_CC_LO << XEiJ.regCCR < 0) {  //分岐する
 11008:       irpSetPC (t);
 11009:     }
 11010:   }  //irpBlosl
 11011: 
 11012:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11013:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 11014:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 11015:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11016:   //BNE.W <label>                                   |-|012346|-|--*--|-----|          |0110_011_000_000_000-{offset}
 11017:   //BNEQ.W <label>                                  |A|012346|-|--*--|-----|          |0110_011_000_000_000-{offset}        [BNE.W <label>]
 11018:   //BNZ.W <label>                                   |A|012346|-|--*--|-----|          |0110_011_000_000_000-{offset}        [BNE.W <label>]
 11019:   //BNZE.W <label>                                  |A|012346|-|--*--|-----|          |0110_011_000_000_000-{offset}        [BNE.W <label>]
 11020:   //JBNE.W <label>                                  |A|012346|-|--*--|-----|          |0110_011_000_000_000-{offset}        [BNE.W <label>]
 11021:   //JBNEQ.W <label>                                 |A|012346|-|--*--|-----|          |0110_011_000_000_000-{offset}        [BNE.W <label>]
 11022:   //JBNZ.W <label>                                  |A|012346|-|--*--|-----|          |0110_011_000_000_000-{offset}        [BNE.W <label>]
 11023:   //JBNZE.W <label>                                 |A|012346|-|--*--|-----|          |0110_011_000_000_000-{offset}        [BNE.W <label>]
 11024:   //BNE.S <label>                                   |-|012346|-|--*--|-----|          |0110_011_000_sss_sss (s is not equal to 0)
 11025:   //BNEQ.S <label>                                  |A|012346|-|--*--|-----|          |0110_011_000_sss_sss (s is not equal to 0)   [BNE.S <label>]
 11026:   //BNZ.S <label>                                   |A|012346|-|--*--|-----|          |0110_011_000_sss_sss (s is not equal to 0)   [BNE.S <label>]
 11027:   //BNZE.S <label>                                  |A|012346|-|--*--|-----|          |0110_011_000_sss_sss (s is not equal to 0)   [BNE.S <label>]
 11028:   //JBNE.S <label>                                  |A|012346|-|--*--|-----|          |0110_011_000_sss_sss (s is not equal to 0)   [BNE.S <label>]
 11029:   //JBNEQ.S <label>                                 |A|012346|-|--*--|-----|          |0110_011_000_sss_sss (s is not equal to 0)   [BNE.S <label>]
 11030:   //JBNZ.S <label>                                  |A|012346|-|--*--|-----|          |0110_011_000_sss_sss (s is not equal to 0)   [BNE.S <label>]
 11031:   //JBNZE.S <label>                                 |A|012346|-|--*--|-----|          |0110_011_000_sss_sss (s is not equal to 0)   [BNE.S <label>]
 11032:   //JBEQ.L <label>                                  |A|012346|-|--*--|-----|          |0110_011_000_000_110-0100111011111001-{address}      [BNE.S (*)+8;JMP <label>]
 11033:   //JBNEQ.L <label>                                 |A|012346|-|--*--|-----|          |0110_011_000_000_110-0100111011111001-{address}      [BNE.S (*)+8;JMP <label>]
 11034:   //JBNNE.L <label>                                 |A|012346|-|--*--|-----|          |0110_011_000_000_110-0100111011111001-{address}      [BNE.S (*)+8;JMP <label>]
 11035:   //JBNNZ.L <label>                                 |A|012346|-|--*--|-----|          |0110_011_000_000_110-0100111011111001-{address}      [BNE.S (*)+8;JMP <label>]
 11036:   //JBNZ.L <label>                                  |A|012346|-|--*--|-----|          |0110_011_000_000_110-0100111011111001-{address}      [BNE.S (*)+8;JMP <label>]
 11037:   //JBNZE.L <label>                                 |A|012346|-|--*--|-----|          |0110_011_000_000_110-0100111011111001-{address}      [BNE.S (*)+8;JMP <label>]
 11038:   //JBZE.L <label>                                  |A|012346|-|--*--|-----|          |0110_011_000_000_110-0100111011111001-{address}      [BNE.S (*)+8;JMP <label>]
 11039:   public static void irpBnesw () throws M68kException {
 11040:     XEiJ.mpuCycleCount++;
 11041:     int t = XEiJ.regPC;  //pc0+2
 11042:     int s = (byte) XEiJ.regOC;  //8bitディスプレースメント
 11043:     if (s == 0) {  //Bcc.W
 11044:       XEiJ.regPC = t + 2;  //pc0+4
 11045:       s = mmuReadWordSignExword (t, XEiJ.regSRS);  //16bitディスプレースメント
 11046:     }
 11047:     t += s;  //pc0+2+ディスプレースメント
 11048:     if ((t & 1) != 0) {  //分岐先のアドレスが奇数
 11049:       //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ
 11050:       irpBccAddressError (t);
 11051:     }
 11052:     if (XEiJ.MPU_CC_NE << XEiJ.regCCR < 0) {  //分岐する
 11053:       irpSetPC (t);
 11054:     }
 11055:   }  //irpBnesw
 11056: 
 11057:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11058:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 11059:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 11060:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11061:   //BNE.S <label>                                   |-|012346|-|--*--|-----|          |0110_011_001_sss_sss
 11062:   //BNEQ.S <label>                                  |A|012346|-|--*--|-----|          |0110_011_001_sss_sss [BNE.S <label>]
 11063:   //BNZ.S <label>                                   |A|012346|-|--*--|-----|          |0110_011_001_sss_sss [BNE.S <label>]
 11064:   //BNZE.S <label>                                  |A|012346|-|--*--|-----|          |0110_011_001_sss_sss [BNE.S <label>]
 11065:   //JBNE.S <label>                                  |A|012346|-|--*--|-----|          |0110_011_001_sss_sss [BNE.S <label>]
 11066:   //JBNEQ.S <label>                                 |A|012346|-|--*--|-----|          |0110_011_001_sss_sss [BNE.S <label>]
 11067:   //JBNZ.S <label>                                  |A|012346|-|--*--|-----|          |0110_011_001_sss_sss [BNE.S <label>]
 11068:   //JBNZE.S <label>                                 |A|012346|-|--*--|-----|          |0110_011_001_sss_sss [BNE.S <label>]
 11069:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11070:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 11071:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 11072:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11073:   //BNE.S <label>                                   |-|012346|-|--*--|-----|          |0110_011_010_sss_sss
 11074:   //BNEQ.S <label>                                  |A|012346|-|--*--|-----|          |0110_011_010_sss_sss [BNE.S <label>]
 11075:   //BNZ.S <label>                                   |A|012346|-|--*--|-----|          |0110_011_010_sss_sss [BNE.S <label>]
 11076:   //BNZE.S <label>                                  |A|012346|-|--*--|-----|          |0110_011_010_sss_sss [BNE.S <label>]
 11077:   //JBNE.S <label>                                  |A|012346|-|--*--|-----|          |0110_011_010_sss_sss [BNE.S <label>]
 11078:   //JBNEQ.S <label>                                 |A|012346|-|--*--|-----|          |0110_011_010_sss_sss [BNE.S <label>]
 11079:   //JBNZ.S <label>                                  |A|012346|-|--*--|-----|          |0110_011_010_sss_sss [BNE.S <label>]
 11080:   //JBNZE.S <label>                                 |A|012346|-|--*--|-----|          |0110_011_010_sss_sss [BNE.S <label>]
 11081:   public static void irpBnes () throws M68kException {
 11082:     XEiJ.mpuCycleCount++;
 11083:     int t = XEiJ.regPC;  //pc0+2
 11084:     int s = (byte) XEiJ.regOC;  //8bitディスプレースメント
 11085:     t += s;  //pc0+2+ディスプレースメント
 11086:     if ((t & 1) != 0) {  //分岐先のアドレスが奇数
 11087:       //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ
 11088:       irpBccAddressError (t);
 11089:     }
 11090:     if (XEiJ.MPU_CC_NE << XEiJ.regCCR < 0) {  //分岐する
 11091:       irpSetPC (t);
 11092:     }
 11093:   }  //irpBnes
 11094: 
 11095:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11096:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 11097:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 11098:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11099:   //BNE.S <label>                                   |-|--2346|-|--*--|-----|          |0110_011_011_sss_sss (s is not equal to 63)
 11100:   //BNEQ.S <label>                                  |A|--2346|-|--*--|-----|          |0110_011_011_sss_sss (s is not equal to 63)  [BNE.S <label>]
 11101:   //BNZ.S <label>                                   |A|--2346|-|--*--|-----|          |0110_011_011_sss_sss (s is not equal to 63)  [BNE.S <label>]
 11102:   //BNZE.S <label>                                  |A|--2346|-|--*--|-----|          |0110_011_011_sss_sss (s is not equal to 63)  [BNE.S <label>]
 11103:   //JBNE.S <label>                                  |A|--2346|-|--*--|-----|          |0110_011_011_sss_sss (s is not equal to 63)  [BNE.S <label>]
 11104:   //JBNEQ.S <label>                                 |A|--2346|-|--*--|-----|          |0110_011_011_sss_sss (s is not equal to 63)  [BNE.S <label>]
 11105:   //JBNZ.S <label>                                  |A|--2346|-|--*--|-----|          |0110_011_011_sss_sss (s is not equal to 63)  [BNE.S <label>]
 11106:   //JBNZE.S <label>                                 |A|--2346|-|--*--|-----|          |0110_011_011_sss_sss (s is not equal to 63)  [BNE.S <label>]
 11107:   //BNE.L <label>                                   |-|--2346|-|--*--|-----|          |0110_011_011_111_111-{offset}
 11108:   //BNEQ.L <label>                                  |A|--2346|-|--*--|-----|          |0110_011_011_111_111-{offset}        [BNE.L <label>]
 11109:   //BNZ.L <label>                                   |A|--2346|-|--*--|-----|          |0110_011_011_111_111-{offset}        [BNE.L <label>]
 11110:   //BNZE.L <label>                                  |A|--2346|-|--*--|-----|          |0110_011_011_111_111-{offset}        [BNE.L <label>]
 11111:   public static void irpBnesl () throws M68kException {
 11112:     XEiJ.mpuCycleCount++;
 11113:     int t = XEiJ.regPC;  //pc0+2
 11114:     int s = (byte) XEiJ.regOC;  //8bitディスプレースメント
 11115:     if (s == -1) {  //Bcc.L
 11116:       XEiJ.regPC = t + 4;  //pc0+6
 11117:       s = mmuReadLongExword (t, XEiJ.regSRS);  //32bitディスプレースメント
 11118:     }
 11119:     t += s;  //pc0+2+ディスプレースメント
 11120:     if ((t & 1) != 0) {  //分岐先のアドレスが奇数
 11121:       //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ
 11122:       irpBccAddressError (t);
 11123:     }
 11124:     if (XEiJ.MPU_CC_NE << XEiJ.regCCR < 0) {  //分岐する
 11125:       irpSetPC (t);
 11126:     }
 11127:   }  //irpBnesl
 11128: 
 11129:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11130:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 11131:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 11132:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11133:   //BEQ.W <label>                                   |-|012346|-|--*--|-----|          |0110_011_100_000_000-{offset}
 11134:   //BNNE.W <label>                                  |A|012346|-|--*--|-----|          |0110_011_100_000_000-{offset}        [BEQ.W <label>]
 11135:   //BNNZ.W <label>                                  |A|012346|-|--*--|-----|          |0110_011_100_000_000-{offset}        [BEQ.W <label>]
 11136:   //BZE.W <label>                                   |A|012346|-|--*--|-----|          |0110_011_100_000_000-{offset}        [BEQ.W <label>]
 11137:   //JBEQ.W <label>                                  |A|012346|-|--*--|-----|          |0110_011_100_000_000-{offset}        [BEQ.W <label>]
 11138:   //JBNNE.W <label>                                 |A|012346|-|--*--|-----|          |0110_011_100_000_000-{offset}        [BEQ.W <label>]
 11139:   //JBNNZ.W <label>                                 |A|012346|-|--*--|-----|          |0110_011_100_000_000-{offset}        [BEQ.W <label>]
 11140:   //JBZE.W <label>                                  |A|012346|-|--*--|-----|          |0110_011_100_000_000-{offset}        [BEQ.W <label>]
 11141:   //BEQ.S <label>                                   |-|012346|-|--*--|-----|          |0110_011_100_sss_sss (s is not equal to 0)
 11142:   //BNNE.S <label>                                  |A|012346|-|--*--|-----|          |0110_011_100_sss_sss (s is not equal to 0)   [BEQ.S <label>]
 11143:   //BNNZ.S <label>                                  |A|012346|-|--*--|-----|          |0110_011_100_sss_sss (s is not equal to 0)   [BEQ.S <label>]
 11144:   //BZE.S <label>                                   |A|012346|-|--*--|-----|          |0110_011_100_sss_sss (s is not equal to 0)   [BEQ.S <label>]
 11145:   //JBEQ.S <label>                                  |A|012346|-|--*--|-----|          |0110_011_100_sss_sss (s is not equal to 0)   [BEQ.S <label>]
 11146:   //JBNNE.S <label>                                 |A|012346|-|--*--|-----|          |0110_011_100_sss_sss (s is not equal to 0)   [BEQ.S <label>]
 11147:   //JBNNZ.S <label>                                 |A|012346|-|--*--|-----|          |0110_011_100_sss_sss (s is not equal to 0)   [BEQ.S <label>]
 11148:   //JBZE.S <label>                                  |A|012346|-|--*--|-----|          |0110_011_100_sss_sss (s is not equal to 0)   [BEQ.S <label>]
 11149:   //JBNE.L <label>                                  |A|012346|-|--*--|-----|          |0110_011_100_000_110-0100111011111001-{address}      [BEQ.S (*)+8;JMP <label>]
 11150:   public static void irpBeqsw () throws M68kException {
 11151:     XEiJ.mpuCycleCount++;
 11152:     int t = XEiJ.regPC;  //pc0+2
 11153:     int s = (byte) XEiJ.regOC;  //8bitディスプレースメント
 11154:     if (s == 0) {  //Bcc.W
 11155:       XEiJ.regPC = t + 2;  //pc0+4
 11156:       s = mmuReadWordSignExword (t, XEiJ.regSRS);  //16bitディスプレースメント
 11157:     }
 11158:     t += s;  //pc0+2+ディスプレースメント
 11159:     if ((t & 1) != 0) {  //分岐先のアドレスが奇数
 11160:       //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ
 11161:       irpBccAddressError (t);
 11162:     }
 11163:     if (XEiJ.MPU_CC_EQ << XEiJ.regCCR < 0) {  //分岐する
 11164:       irpSetPC (t);
 11165:     }
 11166:   }  //irpBeqsw
 11167: 
 11168:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11169:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 11170:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 11171:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11172:   //BEQ.S <label>                                   |-|012346|-|--*--|-----|          |0110_011_101_sss_sss
 11173:   //BNNE.S <label>                                  |A|012346|-|--*--|-----|          |0110_011_101_sss_sss [BEQ.S <label>]
 11174:   //BNNZ.S <label>                                  |A|012346|-|--*--|-----|          |0110_011_101_sss_sss [BEQ.S <label>]
 11175:   //BZE.S <label>                                   |A|012346|-|--*--|-----|          |0110_011_101_sss_sss [BEQ.S <label>]
 11176:   //JBEQ.S <label>                                  |A|012346|-|--*--|-----|          |0110_011_101_sss_sss [BEQ.S <label>]
 11177:   //JBNNE.S <label>                                 |A|012346|-|--*--|-----|          |0110_011_101_sss_sss [BEQ.S <label>]
 11178:   //JBNNZ.S <label>                                 |A|012346|-|--*--|-----|          |0110_011_101_sss_sss [BEQ.S <label>]
 11179:   //JBZE.S <label>                                  |A|012346|-|--*--|-----|          |0110_011_101_sss_sss [BEQ.S <label>]
 11180:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11181:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 11182:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 11183:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11184:   //BEQ.S <label>                                   |-|012346|-|--*--|-----|          |0110_011_110_sss_sss
 11185:   //BNNE.S <label>                                  |A|012346|-|--*--|-----|          |0110_011_110_sss_sss [BEQ.S <label>]
 11186:   //BNNZ.S <label>                                  |A|012346|-|--*--|-----|          |0110_011_110_sss_sss [BEQ.S <label>]
 11187:   //BZE.S <label>                                   |A|012346|-|--*--|-----|          |0110_011_110_sss_sss [BEQ.S <label>]
 11188:   //JBEQ.S <label>                                  |A|012346|-|--*--|-----|          |0110_011_110_sss_sss [BEQ.S <label>]
 11189:   //JBNNE.S <label>                                 |A|012346|-|--*--|-----|          |0110_011_110_sss_sss [BEQ.S <label>]
 11190:   //JBNNZ.S <label>                                 |A|012346|-|--*--|-----|          |0110_011_110_sss_sss [BEQ.S <label>]
 11191:   //JBZE.S <label>                                  |A|012346|-|--*--|-----|          |0110_011_110_sss_sss [BEQ.S <label>]
 11192:   public static void irpBeqs () throws M68kException {
 11193:     XEiJ.mpuCycleCount++;
 11194:     int t = XEiJ.regPC;  //pc0+2
 11195:     int s = (byte) XEiJ.regOC;  //8bitディスプレースメント
 11196:     t += s;  //pc0+2+ディスプレースメント
 11197:     if ((t & 1) != 0) {  //分岐先のアドレスが奇数
 11198:       //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ
 11199:       irpBccAddressError (t);
 11200:     }
 11201:     if (XEiJ.MPU_CC_EQ << XEiJ.regCCR < 0) {  //分岐する
 11202:       irpSetPC (t);
 11203:     }
 11204:   }  //irpBeqs
 11205: 
 11206:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11207:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 11208:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 11209:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11210:   //BEQ.S <label>                                   |-|--2346|-|--*--|-----|          |0110_011_111_sss_sss (s is not equal to 63)
 11211:   //BNNE.S <label>                                  |A|--2346|-|--*--|-----|          |0110_011_111_sss_sss (s is not equal to 63)  [BEQ.S <label>]
 11212:   //BNNZ.S <label>                                  |A|--2346|-|--*--|-----|          |0110_011_111_sss_sss (s is not equal to 63)  [BEQ.S <label>]
 11213:   //BZE.S <label>                                   |A|--2346|-|--*--|-----|          |0110_011_111_sss_sss (s is not equal to 63)  [BEQ.S <label>]
 11214:   //JBEQ.S <label>                                  |A|--2346|-|--*--|-----|          |0110_011_111_sss_sss (s is not equal to 63)  [BEQ.S <label>]
 11215:   //JBNNE.S <label>                                 |A|--2346|-|--*--|-----|          |0110_011_111_sss_sss (s is not equal to 63)  [BEQ.S <label>]
 11216:   //JBNNZ.S <label>                                 |A|--2346|-|--*--|-----|          |0110_011_111_sss_sss (s is not equal to 63)  [BEQ.S <label>]
 11217:   //JBZE.S <label>                                  |A|--2346|-|--*--|-----|          |0110_011_111_sss_sss (s is not equal to 63)  [BEQ.S <label>]
 11218:   //BEQ.L <label>                                   |-|--2346|-|--*--|-----|          |0110_011_111_111_111-{offset}
 11219:   //BNNE.L <label>                                  |A|--2346|-|--*--|-----|          |0110_011_111_111_111-{offset}        [BEQ.L <label>]
 11220:   //BNNZ.L <label>                                  |A|--2346|-|--*--|-----|          |0110_011_111_111_111-{offset}        [BEQ.L <label>]
 11221:   //BZE.L <label>                                   |A|--2346|-|--*--|-----|          |0110_011_111_111_111-{offset}        [BEQ.L <label>]
 11222:   public static void irpBeqsl () throws M68kException {
 11223:     XEiJ.mpuCycleCount++;
 11224:     int t = XEiJ.regPC;  //pc0+2
 11225:     int s = (byte) XEiJ.regOC;  //8bitディスプレースメント
 11226:     if (s == -1) {  //Bcc.L
 11227:       XEiJ.regPC = t + 4;  //pc0+6
 11228:       s = mmuReadLongExword (t, XEiJ.regSRS);  //32bitディスプレースメント
 11229:     }
 11230:     t += s;  //pc0+2+ディスプレースメント
 11231:     if ((t & 1) != 0) {  //分岐先のアドレスが奇数
 11232:       //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ
 11233:       irpBccAddressError (t);
 11234:     }
 11235:     if (XEiJ.MPU_CC_EQ << XEiJ.regCCR < 0) {  //分岐する
 11236:       irpSetPC (t);
 11237:     }
 11238:   }  //irpBeqsl
 11239: 
 11240:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11241:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 11242:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 11243:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11244:   //BVC.W <label>                                   |-|012346|-|---*-|-----|          |0110_100_000_000_000-{offset}
 11245:   //BNVS.W <label>                                  |A|012346|-|---*-|-----|          |0110_100_000_000_000-{offset}        [BVC.W <label>]
 11246:   //JBNVS.W <label>                                 |A|012346|-|---*-|-----|          |0110_100_000_000_000-{offset}        [BVC.W <label>]
 11247:   //JBVC.W <label>                                  |A|012346|-|---*-|-----|          |0110_100_000_000_000-{offset}        [BVC.W <label>]
 11248:   //BVC.S <label>                                   |-|012346|-|---*-|-----|          |0110_100_000_sss_sss (s is not equal to 0)
 11249:   //BNVS.S <label>                                  |A|012346|-|---*-|-----|          |0110_100_000_sss_sss (s is not equal to 0)   [BVC.S <label>]
 11250:   //JBNVS.S <label>                                 |A|012346|-|---*-|-----|          |0110_100_000_sss_sss (s is not equal to 0)   [BVC.S <label>]
 11251:   //JBVC.S <label>                                  |A|012346|-|---*-|-----|          |0110_100_000_sss_sss (s is not equal to 0)   [BVC.S <label>]
 11252:   //JBNVC.L <label>                                 |A|012346|-|---*-|-----|          |0110_100_000_000_110-0100111011111001-{address}      [BVC.S (*)+8;JMP <label>]
 11253:   //JBVS.L <label>                                  |A|012346|-|---*-|-----|          |0110_100_000_000_110-0100111011111001-{address}      [BVC.S (*)+8;JMP <label>]
 11254:   public static void irpBvcsw () throws M68kException {
 11255:     XEiJ.mpuCycleCount++;
 11256:     int t = XEiJ.regPC;  //pc0+2
 11257:     int s = (byte) XEiJ.regOC;  //8bitディスプレースメント
 11258:     if (s == 0) {  //Bcc.W
 11259:       XEiJ.regPC = t + 2;  //pc0+4
 11260:       s = mmuReadWordSignExword (t, XEiJ.regSRS);  //16bitディスプレースメント
 11261:     }
 11262:     t += s;  //pc0+2+ディスプレースメント
 11263:     if ((t & 1) != 0) {  //分岐先のアドレスが奇数
 11264:       //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ
 11265:       irpBccAddressError (t);
 11266:     }
 11267:     if (XEiJ.MPU_CC_VC << XEiJ.regCCR < 0) {  //分岐する
 11268:       irpSetPC (t);
 11269:     }
 11270:   }  //irpBvcsw
 11271: 
 11272:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11273:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 11274:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 11275:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11276:   //BVC.S <label>                                   |-|012346|-|---*-|-----|          |0110_100_001_sss_sss
 11277:   //BNVS.S <label>                                  |A|012346|-|---*-|-----|          |0110_100_001_sss_sss [BVC.S <label>]
 11278:   //JBNVS.S <label>                                 |A|012346|-|---*-|-----|          |0110_100_001_sss_sss [BVC.S <label>]
 11279:   //JBVC.S <label>                                  |A|012346|-|---*-|-----|          |0110_100_001_sss_sss [BVC.S <label>]
 11280:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11281:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 11282:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 11283:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11284:   //BVC.S <label>                                   |-|012346|-|---*-|-----|          |0110_100_010_sss_sss
 11285:   //BNVS.S <label>                                  |A|012346|-|---*-|-----|          |0110_100_010_sss_sss [BVC.S <label>]
 11286:   //JBNVS.S <label>                                 |A|012346|-|---*-|-----|          |0110_100_010_sss_sss [BVC.S <label>]
 11287:   //JBVC.S <label>                                  |A|012346|-|---*-|-----|          |0110_100_010_sss_sss [BVC.S <label>]
 11288:   public static void irpBvcs () throws M68kException {
 11289:     XEiJ.mpuCycleCount++;
 11290:     int t = XEiJ.regPC;  //pc0+2
 11291:     int s = (byte) XEiJ.regOC;  //8bitディスプレースメント
 11292:     t += s;  //pc0+2+ディスプレースメント
 11293:     if ((t & 1) != 0) {  //分岐先のアドレスが奇数
 11294:       //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ
 11295:       irpBccAddressError (t);
 11296:     }
 11297:     if (XEiJ.MPU_CC_VC << XEiJ.regCCR < 0) {  //分岐する
 11298:       irpSetPC (t);
 11299:     }
 11300:   }  //irpBvcs
 11301: 
 11302:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11303:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 11304:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 11305:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11306:   //BVC.S <label>                                   |-|--2346|-|---*-|-----|          |0110_100_011_sss_sss (s is not equal to 63)
 11307:   //BNVS.S <label>                                  |A|--2346|-|---*-|-----|          |0110_100_011_sss_sss (s is not equal to 63)  [BVC.S <label>]
 11308:   //JBNVS.S <label>                                 |A|--2346|-|---*-|-----|          |0110_100_011_sss_sss (s is not equal to 63)  [BVC.S <label>]
 11309:   //JBVC.S <label>                                  |A|--2346|-|---*-|-----|          |0110_100_011_sss_sss (s is not equal to 63)  [BVC.S <label>]
 11310:   //BVC.L <label>                                   |-|--2346|-|---*-|-----|          |0110_100_011_111_111-{offset}
 11311:   //BNVS.L <label>                                  |A|--2346|-|---*-|-----|          |0110_100_011_111_111-{offset}        [BVC.L <label>]
 11312:   public static void irpBvcsl () throws M68kException {
 11313:     XEiJ.mpuCycleCount++;
 11314:     int t = XEiJ.regPC;  //pc0+2
 11315:     int s = (byte) XEiJ.regOC;  //8bitディスプレースメント
 11316:     if (s == -1) {  //Bcc.L
 11317:       XEiJ.regPC = t + 4;  //pc0+6
 11318:       s = mmuReadLongExword (t, XEiJ.regSRS);  //32bitディスプレースメント
 11319:     }
 11320:     t += s;  //pc0+2+ディスプレースメント
 11321:     if ((t & 1) != 0) {  //分岐先のアドレスが奇数
 11322:       //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ
 11323:       irpBccAddressError (t);
 11324:     }
 11325:     if (XEiJ.MPU_CC_VC << XEiJ.regCCR < 0) {  //分岐する
 11326:       irpSetPC (t);
 11327:     }
 11328:   }  //irpBvcsl
 11329: 
 11330:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11331:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 11332:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 11333:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11334:   //BVS.W <label>                                   |-|012346|-|---*-|-----|          |0110_100_100_000_000-{offset}
 11335:   //BNVC.W <label>                                  |A|012346|-|---*-|-----|          |0110_100_100_000_000-{offset}        [BVS.W <label>]
 11336:   //JBNVC.W <label>                                 |A|012346|-|---*-|-----|          |0110_100_100_000_000-{offset}        [BVS.W <label>]
 11337:   //JBVS.W <label>                                  |A|012346|-|---*-|-----|          |0110_100_100_000_000-{offset}        [BVS.W <label>]
 11338:   //BVS.S <label>                                   |-|012346|-|---*-|-----|          |0110_100_100_sss_sss (s is not equal to 0)
 11339:   //BNVC.S <label>                                  |A|012346|-|---*-|-----|          |0110_100_100_sss_sss (s is not equal to 0)   [BVS.S <label>]
 11340:   //JBNVC.S <label>                                 |A|012346|-|---*-|-----|          |0110_100_100_sss_sss (s is not equal to 0)   [BVS.S <label>]
 11341:   //JBVS.S <label>                                  |A|012346|-|---*-|-----|          |0110_100_100_sss_sss (s is not equal to 0)   [BVS.S <label>]
 11342:   //JBNVS.L <label>                                 |A|012346|-|---*-|-----|          |0110_100_100_000_110-0100111011111001-{address}      [BVS.S (*)+8;JMP <label>]
 11343:   //JBVC.L <label>                                  |A|012346|-|---*-|-----|          |0110_100_100_000_110-0100111011111001-{address}      [BVS.S (*)+8;JMP <label>]
 11344:   public static void irpBvssw () throws M68kException {
 11345:     XEiJ.mpuCycleCount++;
 11346:     int t = XEiJ.regPC;  //pc0+2
 11347:     int s = (byte) XEiJ.regOC;  //8bitディスプレースメント
 11348:     if (s == 0) {  //Bcc.W
 11349:       XEiJ.regPC = t + 2;  //pc0+4
 11350:       s = mmuReadWordSignExword (t, XEiJ.regSRS);  //16bitディスプレースメント
 11351:     }
 11352:     t += s;  //pc0+2+ディスプレースメント
 11353:     if ((t & 1) != 0) {  //分岐先のアドレスが奇数
 11354:       //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ
 11355:       irpBccAddressError (t);
 11356:     }
 11357:     if (XEiJ.MPU_CC_VS << XEiJ.regCCR < 0) {  //分岐する
 11358:       irpSetPC (t);
 11359:     }
 11360:   }  //irpBvssw
 11361: 
 11362:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11363:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 11364:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 11365:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11366:   //BVS.S <label>                                   |-|012346|-|---*-|-----|          |0110_100_101_sss_sss
 11367:   //BNVC.S <label>                                  |A|012346|-|---*-|-----|          |0110_100_101_sss_sss [BVS.S <label>]
 11368:   //JBNVC.S <label>                                 |A|012346|-|---*-|-----|          |0110_100_101_sss_sss [BVS.S <label>]
 11369:   //JBVS.S <label>                                  |A|012346|-|---*-|-----|          |0110_100_101_sss_sss [BVS.S <label>]
 11370:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11371:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 11372:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 11373:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11374:   //BVS.S <label>                                   |-|012346|-|---*-|-----|          |0110_100_110_sss_sss
 11375:   //BNVC.S <label>                                  |A|012346|-|---*-|-----|          |0110_100_110_sss_sss [BVS.S <label>]
 11376:   //JBNVC.S <label>                                 |A|012346|-|---*-|-----|          |0110_100_110_sss_sss [BVS.S <label>]
 11377:   //JBVS.S <label>                                  |A|012346|-|---*-|-----|          |0110_100_110_sss_sss [BVS.S <label>]
 11378:   public static void irpBvss () throws M68kException {
 11379:     XEiJ.mpuCycleCount++;
 11380:     int t = XEiJ.regPC;  //pc0+2
 11381:     int s = (byte) XEiJ.regOC;  //8bitディスプレースメント
 11382:     t += s;  //pc0+2+ディスプレースメント
 11383:     if ((t & 1) != 0) {  //分岐先のアドレスが奇数
 11384:       //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ
 11385:       irpBccAddressError (t);
 11386:     }
 11387:     if (XEiJ.MPU_CC_VS << XEiJ.regCCR < 0) {  //分岐する
 11388:       irpSetPC (t);
 11389:     }
 11390:   }  //irpBvss
 11391: 
 11392:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11393:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 11394:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 11395:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11396:   //BVS.S <label>                                   |-|--2346|-|---*-|-----|          |0110_100_111_sss_sss (s is not equal to 63)
 11397:   //BNVC.S <label>                                  |A|--2346|-|---*-|-----|          |0110_100_111_sss_sss (s is not equal to 63)  [BVS.S <label>]
 11398:   //JBNVC.S <label>                                 |A|--2346|-|---*-|-----|          |0110_100_111_sss_sss (s is not equal to 63)  [BVS.S <label>]
 11399:   //JBVS.S <label>                                  |A|--2346|-|---*-|-----|          |0110_100_111_sss_sss (s is not equal to 63)  [BVS.S <label>]
 11400:   //BVS.L <label>                                   |-|--2346|-|---*-|-----|          |0110_100_111_111_111-{offset}
 11401:   //BNVC.L <label>                                  |A|--2346|-|---*-|-----|          |0110_100_111_111_111-{offset}        [BVS.L <label>]
 11402:   public static void irpBvssl () throws M68kException {
 11403:     XEiJ.mpuCycleCount++;
 11404:     int t = XEiJ.regPC;  //pc0+2
 11405:     int s = (byte) XEiJ.regOC;  //8bitディスプレースメント
 11406:     if (s == -1) {  //Bcc.L
 11407:       XEiJ.regPC = t + 4;  //pc0+6
 11408:       s = mmuReadLongExword (t, XEiJ.regSRS);  //32bitディスプレースメント
 11409:     }
 11410:     t += s;  //pc0+2+ディスプレースメント
 11411:     if ((t & 1) != 0) {  //分岐先のアドレスが奇数
 11412:       //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ
 11413:       irpBccAddressError (t);
 11414:     }
 11415:     if (XEiJ.MPU_CC_VS << XEiJ.regCCR < 0) {  //分岐する
 11416:       irpSetPC (t);
 11417:     }
 11418:   }  //irpBvssl
 11419: 
 11420:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11421:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 11422:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 11423:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11424:   //BPL.W <label>                                   |-|012346|-|-*---|-----|          |0110_101_000_000_000-{offset}
 11425:   //BNMI.W <label>                                  |A|012346|-|-*---|-----|          |0110_101_000_000_000-{offset}        [BPL.W <label>]
 11426:   //JBNMI.W <label>                                 |A|012346|-|-*---|-----|          |0110_101_000_000_000-{offset}        [BPL.W <label>]
 11427:   //JBPL.W <label>                                  |A|012346|-|-*---|-----|          |0110_101_000_000_000-{offset}        [BPL.W <label>]
 11428:   //BPL.S <label>                                   |-|012346|-|-*---|-----|          |0110_101_000_sss_sss (s is not equal to 0)
 11429:   //BNMI.S <label>                                  |A|012346|-|-*---|-----|          |0110_101_000_sss_sss (s is not equal to 0)   [BPL.S <label>]
 11430:   //JBNMI.S <label>                                 |A|012346|-|-*---|-----|          |0110_101_000_sss_sss (s is not equal to 0)   [BPL.S <label>]
 11431:   //JBPL.S <label>                                  |A|012346|-|-*---|-----|          |0110_101_000_sss_sss (s is not equal to 0)   [BPL.S <label>]
 11432:   //JBMI.L <label>                                  |A|012346|-|-*---|-----|          |0110_101_000_000_110-0100111011111001-{address}      [BPL.S (*)+8;JMP <label>]
 11433:   //JBNPL.L <label>                                 |A|012346|-|-*---|-----|          |0110_101_000_000_110-0100111011111001-{address}      [BPL.S (*)+8;JMP <label>]
 11434:   public static void irpBplsw () throws M68kException {
 11435:     XEiJ.mpuCycleCount++;
 11436:     int t = XEiJ.regPC;  //pc0+2
 11437:     int s = (byte) XEiJ.regOC;  //8bitディスプレースメント
 11438:     if (s == 0) {  //Bcc.W
 11439:       XEiJ.regPC = t + 2;  //pc0+4
 11440:       s = mmuReadWordSignExword (t, XEiJ.regSRS);  //16bitディスプレースメント
 11441:     }
 11442:     t += s;  //pc0+2+ディスプレースメント
 11443:     if ((t & 1) != 0) {  //分岐先のアドレスが奇数
 11444:       //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ
 11445:       irpBccAddressError (t);
 11446:     }
 11447:     if (XEiJ.MPU_CC_PL << XEiJ.regCCR < 0) {  //分岐する
 11448:       irpSetPC (t);
 11449:     }
 11450:   }  //irpBplsw
 11451: 
 11452:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11453:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 11454:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 11455:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11456:   //BPL.S <label>                                   |-|012346|-|-*---|-----|          |0110_101_001_sss_sss
 11457:   //BNMI.S <label>                                  |A|012346|-|-*---|-----|          |0110_101_001_sss_sss [BPL.S <label>]
 11458:   //JBNMI.S <label>                                 |A|012346|-|-*---|-----|          |0110_101_001_sss_sss [BPL.S <label>]
 11459:   //JBPL.S <label>                                  |A|012346|-|-*---|-----|          |0110_101_001_sss_sss [BPL.S <label>]
 11460:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11461:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 11462:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 11463:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11464:   //BPL.S <label>                                   |-|012346|-|-*---|-----|          |0110_101_010_sss_sss
 11465:   //BNMI.S <label>                                  |A|012346|-|-*---|-----|          |0110_101_010_sss_sss [BPL.S <label>]
 11466:   //JBNMI.S <label>                                 |A|012346|-|-*---|-----|          |0110_101_010_sss_sss [BPL.S <label>]
 11467:   //JBPL.S <label>                                  |A|012346|-|-*---|-----|          |0110_101_010_sss_sss [BPL.S <label>]
 11468:   public static void irpBpls () throws M68kException {
 11469:     XEiJ.mpuCycleCount++;
 11470:     int t = XEiJ.regPC;  //pc0+2
 11471:     int s = (byte) XEiJ.regOC;  //8bitディスプレースメント
 11472:     t += s;  //pc0+2+ディスプレースメント
 11473:     if ((t & 1) != 0) {  //分岐先のアドレスが奇数
 11474:       //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ
 11475:       irpBccAddressError (t);
 11476:     }
 11477:     if (XEiJ.MPU_CC_PL << XEiJ.regCCR < 0) {  //分岐する
 11478:       irpSetPC (t);
 11479:     }
 11480:   }  //irpBpls
 11481: 
 11482:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11483:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 11484:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 11485:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11486:   //BPL.S <label>                                   |-|--2346|-|-*---|-----|          |0110_101_011_sss_sss (s is not equal to 63)
 11487:   //BNMI.S <label>                                  |A|--2346|-|-*---|-----|          |0110_101_011_sss_sss (s is not equal to 63)  [BPL.S <label>]
 11488:   //JBNMI.S <label>                                 |A|--2346|-|-*---|-----|          |0110_101_011_sss_sss (s is not equal to 63)  [BPL.S <label>]
 11489:   //JBPL.S <label>                                  |A|--2346|-|-*---|-----|          |0110_101_011_sss_sss (s is not equal to 63)  [BPL.S <label>]
 11490:   //BPL.L <label>                                   |-|--2346|-|-*---|-----|          |0110_101_011_111_111-{offset}
 11491:   //BNMI.L <label>                                  |A|--2346|-|-*---|-----|          |0110_101_011_111_111-{offset}        [BPL.L <label>]
 11492:   public static void irpBplsl () throws M68kException {
 11493:     XEiJ.mpuCycleCount++;
 11494:     int t = XEiJ.regPC;  //pc0+2
 11495:     int s = (byte) XEiJ.regOC;  //8bitディスプレースメント
 11496:     if (s == -1) {  //Bcc.L
 11497:       XEiJ.regPC = t + 4;  //pc0+6
 11498:       s = mmuReadLongExword (t, XEiJ.regSRS);  //32bitディスプレースメント
 11499:     }
 11500:     t += s;  //pc0+2+ディスプレースメント
 11501:     if ((t & 1) != 0) {  //分岐先のアドレスが奇数
 11502:       //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ
 11503:       irpBccAddressError (t);
 11504:     }
 11505:     if (XEiJ.MPU_CC_PL << XEiJ.regCCR < 0) {  //分岐する
 11506:       irpSetPC (t);
 11507:     }
 11508:   }  //irpBplsl
 11509: 
 11510:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11511:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 11512:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 11513:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11514:   //BMI.W <label>                                   |-|012346|-|-*---|-----|          |0110_101_100_000_000-{offset}
 11515:   //BNPL.W <label>                                  |A|012346|-|-*---|-----|          |0110_101_100_000_000-{offset}        [BMI.W <label>]
 11516:   //JBMI.W <label>                                  |A|012346|-|-*---|-----|          |0110_101_100_000_000-{offset}        [BMI.W <label>]
 11517:   //JBNPL.W <label>                                 |A|012346|-|-*---|-----|          |0110_101_100_000_000-{offset}        [BMI.W <label>]
 11518:   //BMI.S <label>                                   |-|012346|-|-*---|-----|          |0110_101_100_sss_sss (s is not equal to 0)
 11519:   //BNPL.S <label>                                  |A|012346|-|-*---|-----|          |0110_101_100_sss_sss (s is not equal to 0)   [BMI.S <label>]
 11520:   //JBMI.S <label>                                  |A|012346|-|-*---|-----|          |0110_101_100_sss_sss (s is not equal to 0)   [BMI.S <label>]
 11521:   //JBNPL.S <label>                                 |A|012346|-|-*---|-----|          |0110_101_100_sss_sss (s is not equal to 0)   [BMI.S <label>]
 11522:   //JBNMI.L <label>                                 |A|012346|-|-*---|-----|          |0110_101_100_000_110-0100111011111001-{address}      [BMI.S (*)+8;JMP <label>]
 11523:   //JBPL.L <label>                                  |A|012346|-|-*---|-----|          |0110_101_100_000_110-0100111011111001-{address}      [BMI.S (*)+8;JMP <label>]
 11524:   public static void irpBmisw () throws M68kException {
 11525:     XEiJ.mpuCycleCount++;
 11526:     int t = XEiJ.regPC;  //pc0+2
 11527:     int s = (byte) XEiJ.regOC;  //8bitディスプレースメント
 11528:     if (s == 0) {  //Bcc.W
 11529:       XEiJ.regPC = t + 2;  //pc0+4
 11530:       s = mmuReadWordSignExword (t, XEiJ.regSRS);  //16bitディスプレースメント
 11531:     }
 11532:     t += s;  //pc0+2+ディスプレースメント
 11533:     if ((t & 1) != 0) {  //分岐先のアドレスが奇数
 11534:       //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ
 11535:       irpBccAddressError (t);
 11536:     }
 11537:     if (XEiJ.MPU_CC_MI << XEiJ.regCCR < 0) {  //分岐する
 11538:       irpSetPC (t);
 11539:     }
 11540:   }  //irpBmisw
 11541: 
 11542:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11543:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 11544:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 11545:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11546:   //BMI.S <label>                                   |-|012346|-|-*---|-----|          |0110_101_101_sss_sss
 11547:   //BNPL.S <label>                                  |A|012346|-|-*---|-----|          |0110_101_101_sss_sss [BMI.S <label>]
 11548:   //JBMI.S <label>                                  |A|012346|-|-*---|-----|          |0110_101_101_sss_sss [BMI.S <label>]
 11549:   //JBNPL.S <label>                                 |A|012346|-|-*---|-----|          |0110_101_101_sss_sss [BMI.S <label>]
 11550:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11551:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 11552:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 11553:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11554:   //BMI.S <label>                                   |-|012346|-|-*---|-----|          |0110_101_110_sss_sss
 11555:   //BNPL.S <label>                                  |A|012346|-|-*---|-----|          |0110_101_110_sss_sss [BMI.S <label>]
 11556:   //JBMI.S <label>                                  |A|012346|-|-*---|-----|          |0110_101_110_sss_sss [BMI.S <label>]
 11557:   //JBNPL.S <label>                                 |A|012346|-|-*---|-----|          |0110_101_110_sss_sss [BMI.S <label>]
 11558:   public static void irpBmis () throws M68kException {
 11559:     XEiJ.mpuCycleCount++;
 11560:     int t = XEiJ.regPC;  //pc0+2
 11561:     int s = (byte) XEiJ.regOC;  //8bitディスプレースメント
 11562:     t += s;  //pc0+2+ディスプレースメント
 11563:     if ((t & 1) != 0) {  //分岐先のアドレスが奇数
 11564:       //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ
 11565:       irpBccAddressError (t);
 11566:     }
 11567:     if (XEiJ.MPU_CC_MI << XEiJ.regCCR < 0) {  //分岐する
 11568:       irpSetPC (t);
 11569:     }
 11570:   }  //irpBmis
 11571: 
 11572:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11573:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 11574:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 11575:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11576:   //BMI.S <label>                                   |-|--2346|-|-*---|-----|          |0110_101_111_sss_sss (s is not equal to 63)
 11577:   //BNPL.S <label>                                  |A|--2346|-|-*---|-----|          |0110_101_111_sss_sss (s is not equal to 63)  [BMI.S <label>]
 11578:   //JBMI.S <label>                                  |A|--2346|-|-*---|-----|          |0110_101_111_sss_sss (s is not equal to 63)  [BMI.S <label>]
 11579:   //JBNPL.S <label>                                 |A|--2346|-|-*---|-----|          |0110_101_111_sss_sss (s is not equal to 63)  [BMI.S <label>]
 11580:   //BMI.L <label>                                   |-|--2346|-|-*---|-----|          |0110_101_111_111_111-{offset}
 11581:   //BNPL.L <label>                                  |A|--2346|-|-*---|-----|          |0110_101_111_111_111-{offset}        [BMI.L <label>]
 11582:   public static void irpBmisl () throws M68kException {
 11583:     XEiJ.mpuCycleCount++;
 11584:     int t = XEiJ.regPC;  //pc0+2
 11585:     int s = (byte) XEiJ.regOC;  //8bitディスプレースメント
 11586:     if (s == -1) {  //Bcc.L
 11587:       XEiJ.regPC = t + 4;  //pc0+6
 11588:       s = mmuReadLongExword (t, XEiJ.regSRS);  //32bitディスプレースメント
 11589:     }
 11590:     t += s;  //pc0+2+ディスプレースメント
 11591:     if ((t & 1) != 0) {  //分岐先のアドレスが奇数
 11592:       //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ
 11593:       irpBccAddressError (t);
 11594:     }
 11595:     if (XEiJ.MPU_CC_MI << XEiJ.regCCR < 0) {  //分岐する
 11596:       irpSetPC (t);
 11597:     }
 11598:   }  //irpBmisl
 11599: 
 11600:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11601:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 11602:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 11603:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11604:   //BGE.W <label>                                   |-|012346|-|-*-*-|-----|          |0110_110_000_000_000-{offset}
 11605:   //BNLT.W <label>                                  |A|012346|-|-*-*-|-----|          |0110_110_000_000_000-{offset}        [BGE.W <label>]
 11606:   //JBGE.W <label>                                  |A|012346|-|-*-*-|-----|          |0110_110_000_000_000-{offset}        [BGE.W <label>]
 11607:   //JBNLT.W <label>                                 |A|012346|-|-*-*-|-----|          |0110_110_000_000_000-{offset}        [BGE.W <label>]
 11608:   //BGE.S <label>                                   |-|012346|-|-*-*-|-----|          |0110_110_000_sss_sss (s is not equal to 0)
 11609:   //BNLT.S <label>                                  |A|012346|-|-*-*-|-----|          |0110_110_000_sss_sss (s is not equal to 0)   [BGE.S <label>]
 11610:   //JBGE.S <label>                                  |A|012346|-|-*-*-|-----|          |0110_110_000_sss_sss (s is not equal to 0)   [BGE.S <label>]
 11611:   //JBNLT.S <label>                                 |A|012346|-|-*-*-|-----|          |0110_110_000_sss_sss (s is not equal to 0)   [BGE.S <label>]
 11612:   //JBLT.L <label>                                  |A|012346|-|-*-*-|-----|          |0110_110_000_000_110-0100111011111001-{address}      [BGE.S (*)+8;JMP <label>]
 11613:   //JBNGE.L <label>                                 |A|012346|-|-*-*-|-----|          |0110_110_000_000_110-0100111011111001-{address}      [BGE.S (*)+8;JMP <label>]
 11614:   public static void irpBgesw () throws M68kException {
 11615:     XEiJ.mpuCycleCount++;
 11616:     int t = XEiJ.regPC;  //pc0+2
 11617:     int s = (byte) XEiJ.regOC;  //8bitディスプレースメント
 11618:     if (s == 0) {  //Bcc.W
 11619:       XEiJ.regPC = t + 2;  //pc0+4
 11620:       s = mmuReadWordSignExword (t, XEiJ.regSRS);  //16bitディスプレースメント
 11621:     }
 11622:     t += s;  //pc0+2+ディスプレースメント
 11623:     if ((t & 1) != 0) {  //分岐先のアドレスが奇数
 11624:       //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ
 11625:       irpBccAddressError (t);
 11626:     }
 11627:     if (XEiJ.MPU_CC_GE << XEiJ.regCCR < 0) {  //分岐する
 11628:       irpSetPC (t);
 11629:     }
 11630:   }  //irpBgesw
 11631: 
 11632:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11633:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 11634:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 11635:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11636:   //BGE.S <label>                                   |-|012346|-|-*-*-|-----|          |0110_110_001_sss_sss
 11637:   //BNLT.S <label>                                  |A|012346|-|-*-*-|-----|          |0110_110_001_sss_sss [BGE.S <label>]
 11638:   //JBGE.S <label>                                  |A|012346|-|-*-*-|-----|          |0110_110_001_sss_sss [BGE.S <label>]
 11639:   //JBNLT.S <label>                                 |A|012346|-|-*-*-|-----|          |0110_110_001_sss_sss [BGE.S <label>]
 11640:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11641:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 11642:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 11643:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11644:   //BGE.S <label>                                   |-|012346|-|-*-*-|-----|          |0110_110_010_sss_sss
 11645:   //BNLT.S <label>                                  |A|012346|-|-*-*-|-----|          |0110_110_010_sss_sss [BGE.S <label>]
 11646:   //JBGE.S <label>                                  |A|012346|-|-*-*-|-----|          |0110_110_010_sss_sss [BGE.S <label>]
 11647:   //JBNLT.S <label>                                 |A|012346|-|-*-*-|-----|          |0110_110_010_sss_sss [BGE.S <label>]
 11648:   public static void irpBges () throws M68kException {
 11649:     XEiJ.mpuCycleCount++;
 11650:     int t = XEiJ.regPC;  //pc0+2
 11651:     int s = (byte) XEiJ.regOC;  //8bitディスプレースメント
 11652:     t += s;  //pc0+2+ディスプレースメント
 11653:     if ((t & 1) != 0) {  //分岐先のアドレスが奇数
 11654:       //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ
 11655:       irpBccAddressError (t);
 11656:     }
 11657:     if (XEiJ.MPU_CC_GE << XEiJ.regCCR < 0) {  //分岐する
 11658:       irpSetPC (t);
 11659:     }
 11660:   }  //irpBges
 11661: 
 11662:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11663:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 11664:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 11665:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11666:   //BGE.S <label>                                   |-|--2346|-|-*-*-|-----|          |0110_110_011_sss_sss (s is not equal to 63)
 11667:   //BNLT.S <label>                                  |A|--2346|-|-*-*-|-----|          |0110_110_011_sss_sss (s is not equal to 63)  [BGE.S <label>]
 11668:   //JBGE.S <label>                                  |A|--2346|-|-*-*-|-----|          |0110_110_011_sss_sss (s is not equal to 63)  [BGE.S <label>]
 11669:   //JBNLT.S <label>                                 |A|--2346|-|-*-*-|-----|          |0110_110_011_sss_sss (s is not equal to 63)  [BGE.S <label>]
 11670:   //BGE.L <label>                                   |-|--2346|-|-*-*-|-----|          |0110_110_011_111_111-{offset}
 11671:   //BNLT.L <label>                                  |A|--2346|-|-*-*-|-----|          |0110_110_011_111_111-{offset}        [BGE.L <label>]
 11672:   public static void irpBgesl () throws M68kException {
 11673:     XEiJ.mpuCycleCount++;
 11674:     int t = XEiJ.regPC;  //pc0+2
 11675:     int s = (byte) XEiJ.regOC;  //8bitディスプレースメント
 11676:     if (s == -1) {  //Bcc.L
 11677:       XEiJ.regPC = t + 4;  //pc0+6
 11678:       s = mmuReadLongExword (t, XEiJ.regSRS);  //32bitディスプレースメント
 11679:     }
 11680:     t += s;  //pc0+2+ディスプレースメント
 11681:     if ((t & 1) != 0) {  //分岐先のアドレスが奇数
 11682:       //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ
 11683:       irpBccAddressError (t);
 11684:     }
 11685:     if (XEiJ.MPU_CC_GE << XEiJ.regCCR < 0) {  //分岐する
 11686:       irpSetPC (t);
 11687:     }
 11688:   }  //irpBgesl
 11689: 
 11690:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11691:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 11692:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 11693:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11694:   //BLT.W <label>                                   |-|012346|-|-*-*-|-----|          |0110_110_100_000_000-{offset}
 11695:   //BNGE.W <label>                                  |A|012346|-|-*-*-|-----|          |0110_110_100_000_000-{offset}        [BLT.W <label>]
 11696:   //JBLT.W <label>                                  |A|012346|-|-*-*-|-----|          |0110_110_100_000_000-{offset}        [BLT.W <label>]
 11697:   //JBNGE.W <label>                                 |A|012346|-|-*-*-|-----|          |0110_110_100_000_000-{offset}        [BLT.W <label>]
 11698:   //BLT.S <label>                                   |-|012346|-|-*-*-|-----|          |0110_110_100_sss_sss (s is not equal to 0)
 11699:   //BNGE.S <label>                                  |A|012346|-|-*-*-|-----|          |0110_110_100_sss_sss (s is not equal to 0)   [BLT.S <label>]
 11700:   //JBLT.S <label>                                  |A|012346|-|-*-*-|-----|          |0110_110_100_sss_sss (s is not equal to 0)   [BLT.S <label>]
 11701:   //JBNGE.S <label>                                 |A|012346|-|-*-*-|-----|          |0110_110_100_sss_sss (s is not equal to 0)   [BLT.S <label>]
 11702:   //JBGE.L <label>                                  |A|012346|-|-*-*-|-----|          |0110_110_100_000_110-0100111011111001-{address}      [BLT.S (*)+8;JMP <label>]
 11703:   //JBNLT.L <label>                                 |A|012346|-|-*-*-|-----|          |0110_110_100_000_110-0100111011111001-{address}      [BLT.S (*)+8;JMP <label>]
 11704:   public static void irpBltsw () throws M68kException {
 11705:     XEiJ.mpuCycleCount++;
 11706:     int t = XEiJ.regPC;  //pc0+2
 11707:     int s = (byte) XEiJ.regOC;  //8bitディスプレースメント
 11708:     if (s == 0) {  //Bcc.W
 11709:       XEiJ.regPC = t + 2;  //pc0+4
 11710:       s = mmuReadWordSignExword (t, XEiJ.regSRS);  //16bitディスプレースメント
 11711:     }
 11712:     t += s;  //pc0+2+ディスプレースメント
 11713:     if ((t & 1) != 0) {  //分岐先のアドレスが奇数
 11714:       //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ
 11715:       irpBccAddressError (t);
 11716:     }
 11717:     if (XEiJ.MPU_CC_LT << XEiJ.regCCR < 0) {  //分岐する
 11718:       irpSetPC (t);
 11719:     }
 11720:   }  //irpBltsw
 11721: 
 11722:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11723:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 11724:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 11725:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11726:   //BLT.S <label>                                   |-|012346|-|-*-*-|-----|          |0110_110_101_sss_sss
 11727:   //BNGE.S <label>                                  |A|012346|-|-*-*-|-----|          |0110_110_101_sss_sss [BLT.S <label>]
 11728:   //JBLT.S <label>                                  |A|012346|-|-*-*-|-----|          |0110_110_101_sss_sss [BLT.S <label>]
 11729:   //JBNGE.S <label>                                 |A|012346|-|-*-*-|-----|          |0110_110_101_sss_sss [BLT.S <label>]
 11730:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11731:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 11732:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 11733:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11734:   //BLT.S <label>                                   |-|012346|-|-*-*-|-----|          |0110_110_110_sss_sss
 11735:   //BNGE.S <label>                                  |A|012346|-|-*-*-|-----|          |0110_110_110_sss_sss [BLT.S <label>]
 11736:   //JBLT.S <label>                                  |A|012346|-|-*-*-|-----|          |0110_110_110_sss_sss [BLT.S <label>]
 11737:   //JBNGE.S <label>                                 |A|012346|-|-*-*-|-----|          |0110_110_110_sss_sss [BLT.S <label>]
 11738:   public static void irpBlts () throws M68kException {
 11739:     XEiJ.mpuCycleCount++;
 11740:     int t = XEiJ.regPC;  //pc0+2
 11741:     int s = (byte) XEiJ.regOC;  //8bitディスプレースメント
 11742:     t += s;  //pc0+2+ディスプレースメント
 11743:     if ((t & 1) != 0) {  //分岐先のアドレスが奇数
 11744:       //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ
 11745:       irpBccAddressError (t);
 11746:     }
 11747:     if (XEiJ.MPU_CC_LT << XEiJ.regCCR < 0) {  //分岐する
 11748:       irpSetPC (t);
 11749:     }
 11750:   }  //irpBlts
 11751: 
 11752:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11753:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 11754:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 11755:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11756:   //BLT.S <label>                                   |-|--2346|-|-*-*-|-----|          |0110_110_111_sss_sss (s is not equal to 63)
 11757:   //BNGE.S <label>                                  |A|--2346|-|-*-*-|-----|          |0110_110_111_sss_sss (s is not equal to 63)  [BLT.S <label>]
 11758:   //JBLT.S <label>                                  |A|--2346|-|-*-*-|-----|          |0110_110_111_sss_sss (s is not equal to 63)  [BLT.S <label>]
 11759:   //JBNGE.S <label>                                 |A|--2346|-|-*-*-|-----|          |0110_110_111_sss_sss (s is not equal to 63)  [BLT.S <label>]
 11760:   //BLT.L <label>                                   |-|--2346|-|-*-*-|-----|          |0110_110_111_111_111-{offset}
 11761:   //BNGE.L <label>                                  |A|--2346|-|-*-*-|-----|          |0110_110_111_111_111-{offset}        [BLT.L <label>]
 11762:   public static void irpBltsl () throws M68kException {
 11763:     XEiJ.mpuCycleCount++;
 11764:     int t = XEiJ.regPC;  //pc0+2
 11765:     int s = (byte) XEiJ.regOC;  //8bitディスプレースメント
 11766:     if (s == -1) {  //Bcc.L
 11767:       XEiJ.regPC = t + 4;  //pc0+6
 11768:       s = mmuReadLongExword (t, XEiJ.regSRS);  //32bitディスプレースメント
 11769:     }
 11770:     t += s;  //pc0+2+ディスプレースメント
 11771:     if ((t & 1) != 0) {  //分岐先のアドレスが奇数
 11772:       //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ
 11773:       irpBccAddressError (t);
 11774:     }
 11775:     if (XEiJ.MPU_CC_LT << XEiJ.regCCR < 0) {  //分岐する
 11776:       irpSetPC (t);
 11777:     }
 11778:   }  //irpBltsl
 11779: 
 11780:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11781:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 11782:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 11783:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11784:   //BGT.W <label>                                   |-|012346|-|-***-|-----|          |0110_111_000_000_000-{offset}
 11785:   //BNLE.W <label>                                  |A|012346|-|-***-|-----|          |0110_111_000_000_000-{offset}        [BGT.W <label>]
 11786:   //JBGT.W <label>                                  |A|012346|-|-***-|-----|          |0110_111_000_000_000-{offset}        [BGT.W <label>]
 11787:   //JBNLE.W <label>                                 |A|012346|-|-***-|-----|          |0110_111_000_000_000-{offset}        [BGT.W <label>]
 11788:   //BGT.S <label>                                   |-|012346|-|-***-|-----|          |0110_111_000_sss_sss (s is not equal to 0)
 11789:   //BNLE.S <label>                                  |A|012346|-|-***-|-----|          |0110_111_000_sss_sss (s is not equal to 0)   [BGT.S <label>]
 11790:   //JBGT.S <label>                                  |A|012346|-|-***-|-----|          |0110_111_000_sss_sss (s is not equal to 0)   [BGT.S <label>]
 11791:   //JBNLE.S <label>                                 |A|012346|-|-***-|-----|          |0110_111_000_sss_sss (s is not equal to 0)   [BGT.S <label>]
 11792:   //JBLE.L <label>                                  |A|012346|-|-***-|-----|          |0110_111_000_000_110-0100111011111001-{address}      [BGT.S (*)+8;JMP <label>]
 11793:   //JBNGT.L <label>                                 |A|012346|-|-***-|-----|          |0110_111_000_000_110-0100111011111001-{address}      [BGT.S (*)+8;JMP <label>]
 11794:   public static void irpBgtsw () throws M68kException {
 11795:     XEiJ.mpuCycleCount++;
 11796:     int t = XEiJ.regPC;  //pc0+2
 11797:     int s = (byte) XEiJ.regOC;  //8bitディスプレースメント
 11798:     if (s == 0) {  //Bcc.W
 11799:       XEiJ.regPC = t + 2;  //pc0+4
 11800:       s = mmuReadWordSignExword (t, XEiJ.regSRS);  //16bitディスプレースメント
 11801:     }
 11802:     t += s;  //pc0+2+ディスプレースメント
 11803:     if ((t & 1) != 0) {  //分岐先のアドレスが奇数
 11804:       //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ
 11805:       irpBccAddressError (t);
 11806:     }
 11807:     if (XEiJ.MPU_CC_GT << XEiJ.regCCR < 0) {  //分岐する
 11808:       irpSetPC (t);
 11809:     }
 11810:   }  //irpBgtsw
 11811: 
 11812:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11813:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 11814:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 11815:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11816:   //BGT.S <label>                                   |-|012346|-|-***-|-----|          |0110_111_001_sss_sss
 11817:   //BNLE.S <label>                                  |A|012346|-|-***-|-----|          |0110_111_001_sss_sss [BGT.S <label>]
 11818:   //JBGT.S <label>                                  |A|012346|-|-***-|-----|          |0110_111_001_sss_sss [BGT.S <label>]
 11819:   //JBNLE.S <label>                                 |A|012346|-|-***-|-----|          |0110_111_001_sss_sss [BGT.S <label>]
 11820:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11821:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 11822:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 11823:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11824:   //BGT.S <label>                                   |-|012346|-|-***-|-----|          |0110_111_010_sss_sss
 11825:   //BNLE.S <label>                                  |A|012346|-|-***-|-----|          |0110_111_010_sss_sss [BGT.S <label>]
 11826:   //JBGT.S <label>                                  |A|012346|-|-***-|-----|          |0110_111_010_sss_sss [BGT.S <label>]
 11827:   //JBNLE.S <label>                                 |A|012346|-|-***-|-----|          |0110_111_010_sss_sss [BGT.S <label>]
 11828:   public static void irpBgts () throws M68kException {
 11829:     XEiJ.mpuCycleCount++;
 11830:     int t = XEiJ.regPC;  //pc0+2
 11831:     int s = (byte) XEiJ.regOC;  //8bitディスプレースメント
 11832:     t += s;  //pc0+2+ディスプレースメント
 11833:     if ((t & 1) != 0) {  //分岐先のアドレスが奇数
 11834:       //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ
 11835:       irpBccAddressError (t);
 11836:     }
 11837:     if (XEiJ.MPU_CC_GT << XEiJ.regCCR < 0) {  //分岐する
 11838:       irpSetPC (t);
 11839:     }
 11840:   }  //irpBgts
 11841: 
 11842:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11843:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 11844:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 11845:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11846:   //BGT.S <label>                                   |-|--2346|-|-***-|-----|          |0110_111_011_sss_sss (s is not equal to 63)
 11847:   //BNLE.S <label>                                  |A|--2346|-|-***-|-----|          |0110_111_011_sss_sss (s is not equal to 63)  [BGT.S <label>]
 11848:   //JBGT.S <label>                                  |A|--2346|-|-***-|-----|          |0110_111_011_sss_sss (s is not equal to 63)  [BGT.S <label>]
 11849:   //JBNLE.S <label>                                 |A|--2346|-|-***-|-----|          |0110_111_011_sss_sss (s is not equal to 63)  [BGT.S <label>]
 11850:   //BGT.L <label>                                   |-|--2346|-|-***-|-----|          |0110_111_011_111_111-{offset}
 11851:   //BNLE.L <label>                                  |A|--2346|-|-***-|-----|          |0110_111_011_111_111-{offset}        [BGT.L <label>]
 11852:   public static void irpBgtsl () throws M68kException {
 11853:     XEiJ.mpuCycleCount++;
 11854:     int t = XEiJ.regPC;  //pc0+2
 11855:     int s = (byte) XEiJ.regOC;  //8bitディスプレースメント
 11856:     if (s == -1) {  //Bcc.L
 11857:       XEiJ.regPC = t + 4;  //pc0+6
 11858:       s = mmuReadLongExword (t, XEiJ.regSRS);  //32bitディスプレースメント
 11859:     }
 11860:     t += s;  //pc0+2+ディスプレースメント
 11861:     if ((t & 1) != 0) {  //分岐先のアドレスが奇数
 11862:       //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ
 11863:       irpBccAddressError (t);
 11864:     }
 11865:     if (XEiJ.MPU_CC_GT << XEiJ.regCCR < 0) {  //分岐する
 11866:       irpSetPC (t);
 11867:     }
 11868:   }  //irpBgtsl
 11869: 
 11870:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11871:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 11872:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 11873:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11874:   //BLE.W <label>                                   |-|012346|-|-***-|-----|          |0110_111_100_000_000-{offset}
 11875:   //BNGT.W <label>                                  |A|012346|-|-***-|-----|          |0110_111_100_000_000-{offset}        [BLE.W <label>]
 11876:   //JBLE.W <label>                                  |A|012346|-|-***-|-----|          |0110_111_100_000_000-{offset}        [BLE.W <label>]
 11877:   //JBNGT.W <label>                                 |A|012346|-|-***-|-----|          |0110_111_100_000_000-{offset}        [BLE.W <label>]
 11878:   //BLE.S <label>                                   |-|012346|-|-***-|-----|          |0110_111_100_sss_sss (s is not equal to 0)
 11879:   //BNGT.S <label>                                  |A|012346|-|-***-|-----|          |0110_111_100_sss_sss (s is not equal to 0)   [BLE.S <label>]
 11880:   //JBLE.S <label>                                  |A|012346|-|-***-|-----|          |0110_111_100_sss_sss (s is not equal to 0)   [BLE.S <label>]
 11881:   //JBNGT.S <label>                                 |A|012346|-|-***-|-----|          |0110_111_100_sss_sss (s is not equal to 0)   [BLE.S <label>]
 11882:   //JBGT.L <label>                                  |A|012346|-|-***-|-----|          |0110_111_100_000_110-0100111011111001-{address}      [BLE.S (*)+8;JMP <label>]
 11883:   //JBNLE.L <label>                                 |A|012346|-|-***-|-----|          |0110_111_100_000_110-0100111011111001-{address}      [BLE.S (*)+8;JMP <label>]
 11884:   public static void irpBlesw () throws M68kException {
 11885:     XEiJ.mpuCycleCount++;
 11886:     int t = XEiJ.regPC;  //pc0+2
 11887:     int s = (byte) XEiJ.regOC;  //8bitディスプレースメント
 11888:     if (s == 0) {  //Bcc.W
 11889:       XEiJ.regPC = t + 2;  //pc0+4
 11890:       s = mmuReadWordSignExword (t, XEiJ.regSRS);  //16bitディスプレースメント
 11891:     }
 11892:     t += s;  //pc0+2+ディスプレースメント
 11893:     if ((t & 1) != 0) {  //分岐先のアドレスが奇数
 11894:       //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ
 11895:       irpBccAddressError (t);
 11896:     }
 11897:     if (XEiJ.MPU_CC_LE << XEiJ.regCCR < 0) {  //分岐する
 11898:       irpSetPC (t);
 11899:     }
 11900:   }  //irpBlesw
 11901: 
 11902:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11903:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 11904:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 11905:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11906:   //BLE.S <label>                                   |-|012346|-|-***-|-----|          |0110_111_101_sss_sss
 11907:   //BNGT.S <label>                                  |A|012346|-|-***-|-----|          |0110_111_101_sss_sss [BLE.S <label>]
 11908:   //JBLE.S <label>                                  |A|012346|-|-***-|-----|          |0110_111_101_sss_sss [BLE.S <label>]
 11909:   //JBNGT.S <label>                                 |A|012346|-|-***-|-----|          |0110_111_101_sss_sss [BLE.S <label>]
 11910:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11911:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 11912:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 11913:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11914:   //BLE.S <label>                                   |-|012346|-|-***-|-----|          |0110_111_110_sss_sss
 11915:   //BNGT.S <label>                                  |A|012346|-|-***-|-----|          |0110_111_110_sss_sss [BLE.S <label>]
 11916:   //JBLE.S <label>                                  |A|012346|-|-***-|-----|          |0110_111_110_sss_sss [BLE.S <label>]
 11917:   //JBNGT.S <label>                                 |A|012346|-|-***-|-----|          |0110_111_110_sss_sss [BLE.S <label>]
 11918:   public static void irpBles () throws M68kException {
 11919:     XEiJ.mpuCycleCount++;
 11920:     int t = XEiJ.regPC;  //pc0+2
 11921:     int s = (byte) XEiJ.regOC;  //8bitディスプレースメント
 11922:     t += s;  //pc0+2+ディスプレースメント
 11923:     if ((t & 1) != 0) {  //分岐先のアドレスが奇数
 11924:       //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ
 11925:       irpBccAddressError (t);
 11926:     }
 11927:     if (XEiJ.MPU_CC_LE << XEiJ.regCCR < 0) {  //分岐する
 11928:       irpSetPC (t);
 11929:     }
 11930:   }  //irpBles
 11931: 
 11932:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11933:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 11934:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 11935:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11936:   //BLE.S <label>                                   |-|--2346|-|-***-|-----|          |0110_111_111_sss_sss (s is not equal to 63)
 11937:   //BNGT.S <label>                                  |A|--2346|-|-***-|-----|          |0110_111_111_sss_sss (s is not equal to 63)  [BLE.S <label>]
 11938:   //JBLE.S <label>                                  |A|--2346|-|-***-|-----|          |0110_111_111_sss_sss (s is not equal to 63)  [BLE.S <label>]
 11939:   //JBNGT.S <label>                                 |A|--2346|-|-***-|-----|          |0110_111_111_sss_sss (s is not equal to 63)  [BLE.S <label>]
 11940:   //BLE.L <label>                                   |-|--2346|-|-***-|-----|          |0110_111_111_111_111-{offset}
 11941:   //BNGT.L <label>                                  |A|--2346|-|-***-|-----|          |0110_111_111_111_111-{offset}        [BLE.L <label>]
 11942:   public static void irpBlesl () throws M68kException {
 11943:     XEiJ.mpuCycleCount++;
 11944:     int t = XEiJ.regPC;  //pc0+2
 11945:     int s = (byte) XEiJ.regOC;  //8bitディスプレースメント
 11946:     if (s == -1) {  //Bcc.L
 11947:       XEiJ.regPC = t + 4;  //pc0+6
 11948:       s = mmuReadLongExword (t, XEiJ.regSRS);  //32bitディスプレースメント
 11949:     }
 11950:     t += s;  //pc0+2+ディスプレースメント
 11951:     if ((t & 1) != 0) {  //分岐先のアドレスが奇数
 11952:       //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ
 11953:       irpBccAddressError (t);
 11954:     }
 11955:     if (XEiJ.MPU_CC_LE << XEiJ.regCCR < 0) {  //分岐する
 11956:       irpSetPC (t);
 11957:     }
 11958:   }  //irpBlesl
 11959: 
 11960:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11961:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 11962:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 11963:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11964:   //IOCS <name>                                     |A|012346|-|UUUUU|UUUUU|          |0111_000_0dd_ddd_ddd-0100111001001111        [MOVEQ.L #<data>,D0;TRAP #15]
 11965:   //MOVEQ.L #<data>,Dq                              |-|012346|-|-UUUU|-**00|          |0111_qqq_0dd_ddd_ddd
 11966:   public static void irpMoveq () throws M68kException {
 11967:     XEiJ.mpuCycleCount++;
 11968:     int z;
 11969:     XEiJ.regRn[XEiJ.regOC >> 9 & 7] = z = (byte) XEiJ.regOC;
 11970:     XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X);  //ccr_tst
 11971:   }  //irpMoveq
 11972: 
 11973:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11974:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 11975:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 11976:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11977:   //MVS.B <ea>,Dq                                   |-|------|-|-UUUU|-**00|D M+-WXZPI|0111_qqq_100_mmm_rrr (ISA_B)
 11978:   //
 11979:   //MVS.B <ea>,Dq
 11980:   //  バイトデータをロングに符号拡張してDqの全体を更新する
 11981:   public static void irpMvsByte () throws M68kException {
 11982:     XEiJ.mpuCycleCount++;
 11983:     int ea = XEiJ.regOC & 63;
 11984:     int z;
 11985:     XEiJ.regRn[XEiJ.regOC >> 9 & 7] = z = ea < XEiJ.EA_AR ? (byte) XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadByteSignExword ((XEiJ.regPC += 2) - 1, XEiJ.regSRS) : mmuReadByteSignData (efaAnyByte (ea), XEiJ.regSRS);  //pcbs。イミディエイトを分離
 11986:     XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X);  //ccr_tst
 11987:   }  //irpMvsByte
 11988: 
 11989:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11990:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 11991:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 11992:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11993:   //MVS.W <ea>,Dq                                   |-|------|-|-UUUU|-**00|D M+-WXZPI|0111_qqq_101_mmm_rrr (ISA_B)
 11994:   //
 11995:   //MVS.W <ea>,Dq
 11996:   //  ワードデータをロングに符号拡張してDqの全体を更新する
 11997:   public static void irpMvsWord () throws M68kException {
 11998:     XEiJ.mpuCycleCount++;
 11999:     int ea = XEiJ.regOC & 63;
 12000:     int z;
 12001:     XEiJ.regRn[XEiJ.regOC >> 9 & 7] = z = ea < XEiJ.EA_AR ? (short) XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) : mmuReadWordSignData (efaAnyWord (ea), XEiJ.regSRS);  //pcws。イミディエイトを分離
 12002:     XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X);  //ccr_tst
 12003:   }  //irpMvsWord
 12004: 
 12005:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12006:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 12007:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 12008:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12009:   //MVZ.B <ea>,Dq                                   |-|------|-|-UUUU|-0*00|D M+-WXZPI|0111_qqq_110_mmm_rrr (ISA_B)
 12010:   //
 12011:   //MVZ.B <ea>,Dq
 12012:   //  バイトデータをロングにゼロ拡張してDqの全体を更新する
 12013:   public static void irpMvzByte () throws M68kException {
 12014:     XEiJ.mpuCycleCount++;
 12015:     int ea = XEiJ.regOC & 63;
 12016:     int z;
 12017:     XEiJ.regRn[XEiJ.regOC >> 9 & 7] = z = ea < XEiJ.EA_AR ? 0xff & XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadByteZeroExword ((XEiJ.regPC += 2) - 1, XEiJ.regSRS) : mmuReadByteZeroData (efaAnyByte (ea), XEiJ.regSRS);  //pcbz。イミディエイトを分離
 12018:     XEiJ.regCCR = XEiJ.REG_CCR_X & XEiJ.regCCR | (z == 0 ? XEiJ.REG_CCR_Z : 0);
 12019:   }  //irpMvzByte
 12020: 
 12021:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12022:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 12023:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 12024:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12025:   //MVZ.W <ea>,Dq                                   |-|------|-|-UUUU|-0*00|D M+-WXZPI|0111_qqq_111_mmm_rrr (ISA_B)
 12026:   //
 12027:   //MVZ.W <ea>,Dq
 12028:   //  ワードデータをロングにゼロ拡張してDqの全体を更新する
 12029:   public static void irpMvzWord () throws M68kException {
 12030:     XEiJ.mpuCycleCount++;
 12031:     int ea = XEiJ.regOC & 63;
 12032:     int z;
 12033:     XEiJ.regRn[XEiJ.regOC >> 9 & 7] = z = ea < XEiJ.EA_AR ? (char) XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) : mmuReadWordZeroData (efaAnyWord (ea), XEiJ.regSRS);  //pcwz。イミディエイトを分離
 12034:     XEiJ.regCCR = XEiJ.REG_CCR_X & XEiJ.regCCR | (z == 0 ? XEiJ.REG_CCR_Z : 0);
 12035:   }  //irpMvzWord
 12036: 
 12037:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12038:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 12039:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 12040:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12041:   //OR.B <ea>,Dq                                    |-|012346|-|-UUUU|-**00|D M+-WXZPI|1000_qqq_000_mmm_rrr
 12042:   public static void irpOrToRegByte () throws M68kException {
 12043:     XEiJ.mpuCycleCount++;
 12044:     int ea = XEiJ.regOC & 63;
 12045:     XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & (XEiJ.regRn[XEiJ.regOC >> 9 & 7] |= 255 & (ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadByteSignExword ((XEiJ.regPC += 2) - 1, XEiJ.regSRS) : mmuReadByteSignData (efaAnyByte (ea), XEiJ.regSRS)))];  //ccr_tst_byte。pcbs。イミディエイトを分離。0拡張してからOR
 12046:   }  //irpOrToRegByte
 12047: 
 12048:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12049:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 12050:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 12051:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12052:   //OR.W <ea>,Dq                                    |-|012346|-|-UUUU|-**00|D M+-WXZPI|1000_qqq_001_mmm_rrr
 12053:   public static void irpOrToRegWord () throws M68kException {
 12054:     XEiJ.mpuCycleCount++;
 12055:     int ea = XEiJ.regOC & 63;
 12056:     int z = (short) (XEiJ.regRn[XEiJ.regOC >> 9 & 7] |= ea < XEiJ.EA_AR ? (char) XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) : mmuReadWordZeroData (efaAnyWord (ea), XEiJ.regSRS));  //pcwz。イミディエイトを分離。0拡張してからOR
 12057:     XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X);  //ccr_tst
 12058:   }  //irpOrToRegWord
 12059: 
 12060:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12061:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 12062:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 12063:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12064:   //OR.L <ea>,Dq                                    |-|012346|-|-UUUU|-**00|D M+-WXZPI|1000_qqq_010_mmm_rrr
 12065:   public static void irpOrToRegLong () throws M68kException {
 12066:     int ea = XEiJ.regOC & 63;
 12067:     int z = XEiJ.regRn[XEiJ.regOC >> 9 & 7] |= ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS) : mmuReadLongData (efaAnyLong (ea), XEiJ.regSRS);  //pcls。イミディエイトを分離
 12068:     XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X);  //ccr_tst
 12069:   }  //irpOrToRegLong
 12070: 
 12071:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12072:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 12073:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 12074:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12075:   //DIVU.W <ea>,Dq                                  |-|012346|-|-UUUU|-***0|D M+-WXZPI|1000_qqq_011_mmm_rrr
 12076:   //
 12077:   //DIVU.W <ea>,Dq
 12078:   //  M68000PRMでDIVU.Wのオーバーフローの条件が16bit符号あり整数と書かれているのは16bit符号なし整数の間違い
 12079:   public static void irpDivuWord () throws M68kException {
 12080:     //  X  変化しない
 12081:     //  N  ゼロ除算またはオーバーフローのとき不定。商が負のときセット。それ以外はクリア
 12082:     //  Z  ゼロ除算またはオーバーフローのとき不定。商が0のときセット。それ以外はクリア
 12083:     //  V  ゼロ除算のとき不定。オーバーフローのときセット。それ以外はクリア
 12084:     //  C  常にクリア
 12085:     XEiJ.mpuCycleCount += 22;  //最大
 12086:     int ea = XEiJ.regOC & 63;
 12087:     int qqq = XEiJ.regOC >> 9 & 7;
 12088:     int y = ea < XEiJ.EA_AR ? (char) XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) : mmuReadWordZeroData (efaAnyWord (ea), XEiJ.regSRS);  //除数。pcwz。イミディエイトを分離
 12089:     int x = XEiJ.regRn[qqq];  //被除数
 12090:     if (y == 0) {  //ゼロ除算
 12091:       //Dqは変化しない
 12092:       XEiJ.regCCR = (XEiJ.regCCR & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_N | XEiJ.REG_CCR_Z | XEiJ.REG_CCR_V)  //XとNとZとVは変化しない
 12093:                      );  //Cは常にクリア
 12094:       m60Address = XEiJ.regPC0;  //アドレスは命令の先頭
 12095:       M68kException.m6eNumber = M68kException.M6E_DIVIDE_BY_ZERO;
 12096:       throw M68kException.m6eSignal;
 12097:     }
 12098:     //無理にintで符号なし除算をやろうとするよりもdoubleにキャストしてから割ったほうが速い
 12099:     //  intの除算をdoubleの除算器で行うプロセッサならばなおさら
 12100:     //被除数を符号なし32ビットとみなすためlongを経由してdoubleに変換する
 12101:     //doubleからlongやintへのキャストは小数点以下が切り捨てられ、オーバーフローは表現できる絶対値最大の値になる
 12102:     //doubleから直接intに戻しているので0xffffffff/0x0001=0xffffffffが絶対値最大の0x7fffffffになってしまうが、
 12103:     //DIVU.Wではオーバーフローになることに変わりはないのでよいことにする
 12104:     //  符号なし32ビットの0xffffffffにしたいときは戻すときもlongを経由すればよい
 12105:     int z = (int) ((double) ((long) x & 0xffffffffL) / (double) y);  //商
 12106:     if (z >>> 16 != 0) {  //オーバーフローあり
 12107:       //Dqは変化しない
 12108:       XEiJ.regCCR = (XEiJ.regCCR & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_N | XEiJ.REG_CCR_Z) |  //XとNとZは変化しない
 12109:                      XEiJ.REG_CCR_V  //Vは常にセット
 12110:                      );  //Cは常にクリア
 12111:     } else {  //オーバーフローなし
 12112:       XEiJ.regRn[qqq] = x - y * z << 16 | z;  //余り<<16|商
 12113:       z = (short) z;
 12114:       XEiJ.regCCR = (XEiJ.regCCR & XEiJ.REG_CCR_X |  //Xは変化しない
 12115:                      (z < 0 ? XEiJ.REG_CCR_N : 0) |  //Nは商が負のときセット、さもなくばクリア
 12116:                      (z == 0 ? XEiJ.REG_CCR_Z : 0)  //Zは商が0のときセット、さもなくばクリア
 12117:                      //Vは常にクリア
 12118:                      );  //Cは常にクリア
 12119:     }  //if オーバーフローあり/オーバーフローなし
 12120:   }  //irpDivuWord
 12121: 
 12122:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12123:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 12124:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 12125:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12126:   //SBCD.B Dr,Dq                                    |-|012346|-|UUUUU|*U*U*|          |1000_qqq_100_000_rrr
 12127:   //SBCD.B -(Ar),-(Aq)                              |-|012346|-|UUUUU|*U*U*|          |1000_qqq_100_001_rrr
 12128:   //OR.B Dq,<ea>                                    |-|012346|-|-UUUU|-**00|  M+-WXZ  |1000_qqq_100_mmm_rrr
 12129:   public static void irpOrToMemByte () throws M68kException {
 12130:     int ea = XEiJ.regOC & 63;
 12131:     if (ea >= XEiJ.EA_MM) {  //OR.B Dq,<ea>
 12132:       XEiJ.mpuCycleCount++;
 12133:       int a = efaMltByte (ea);
 12134:       int z = XEiJ.regRn[XEiJ.regOC >> 9 & 7] | mmuReadByteSignData (a, XEiJ.regSRS);
 12135:       mmuWriteByteData (a, z, XEiJ.regSRS);
 12136:       XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & z];  //ccr_tst_byte
 12137:     } else if (ea < XEiJ.EA_AR) {  //SBCD.B Dr,Dq
 12138:       int qqq = XEiJ.regOC >> 9 & 7;
 12139:       XEiJ.mpuCycleCount++;
 12140:       int x;
 12141:       XEiJ.regRn[qqq] = ~0xff & (x = XEiJ.regRn[qqq]) | irpSbcd (x, XEiJ.regRn[ea]);
 12142:     } else {  //SBCD.B -(Ar),-(Aq)
 12143:       XEiJ.mpuCycleCount += 2;
 12144:       m60Incremented -= 1L << (ea << 3);
 12145:       int a = m60Address = --XEiJ.regRn[ea];  //このr[ea]はアドレスレジスタ
 12146:       int y = mmuReadByteZeroData (a, XEiJ.regSRS);
 12147:       int aqq = (XEiJ.regOC >> 9) - (64 - 8);
 12148:       m60Incremented -= 1L << (aqq << 3);
 12149:       a = m60Address = --XEiJ.regRn[aqq];
 12150:       mmuWriteByteData (a, irpSbcd (mmuModifyByteZeroData (a, XEiJ.regSRS), y), XEiJ.regSRS);
 12151:     }
 12152:   }  //irpOrToMemByte
 12153: 
 12154:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12155:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 12156:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 12157:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12158:   //PACK Dr,Dq,#<data>                              |-|--2346|-|-----|-----|          |1000_qqq_101_000_rrr-{data}
 12159:   //PACK -(Ar),-(Aq),#<data>                        |-|--2346|-|-----|-----|          |1000_qqq_101_001_rrr-{data}
 12160:   //OR.W Dq,<ea>                                    |-|012346|-|-UUUU|-**00|  M+-WXZ  |1000_qqq_101_mmm_rrr
 12161:   //
 12162:   //PACK Dr,Dq,#<data>
 12163:   //PACK -(Ar),-(Aq),#<data>
 12164:   //  PACK/UNPKは第1オペランドのソースと第2オペランドのデスティネーションのサイズが違う。パックされていない方がワードでされている方がバイト
 12165:   //  10の位を4ビット右または左にシフトする。第3オペランドの補正値はワードでパックされていない方に加算する。CCRは変化しない
 12166:   public static void irpOrToMemWord () throws M68kException {
 12167:     int ea = XEiJ.regOC & 63;
 12168:     if (ea >= XEiJ.EA_MM) {  //OR.W Dq,<ea>
 12169:       XEiJ.mpuCycleCount++;
 12170:       int a = efaMltWord (ea);
 12171:       int z;
 12172:       mmuWriteWordData (a, z = XEiJ.regRn[XEiJ.regOC >> 9 & 7] | mmuModifyWordSignData (a, XEiJ.regSRS), XEiJ.regSRS);
 12173:       XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (char) z - 1 >> 31 & XEiJ.REG_CCR_Z | ((short) z < 0 ? XEiJ.REG_CCR_N : 0);  //ccr_tst_word
 12174:     } else if (ea < XEiJ.EA_AR) {  //PACK Dr,Dq,#<data>
 12175:       XEiJ.mpuCycleCount += 2;
 12176:       int qqq = XEiJ.regOC >> 9 & 7;
 12177:       int t = XEiJ.regRn[ea] + mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);  //pcws
 12178:       XEiJ.regRn[qqq] = ~0xff & XEiJ.regRn[qqq] | t >> 4 & 0xf0 | t & 15;
 12179:     } else {  //PACK -(Ar),-(Aq),#<data>
 12180:       int o = mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);  //pcws
 12181:       m60Incremented -= 2L << (ea << 3);
 12182:       int a = m60Address = XEiJ.regRn[ea] -= 2;
 12183:       int t = mmuReadWordSignData (a, XEiJ.regSRS) + o;  //020以上なのでアドレスエラーは出ない
 12184:       int aqq = (XEiJ.regOC >> 9) - (64 - 8);
 12185:       m60Incremented -= 1L << (aqq << 3);
 12186:       a = m60Address = --XEiJ.regRn[aqq];
 12187:       mmuWriteByteData (a, t >> 4 & 0xf0 | t & 15, XEiJ.regSRS);
 12188:     }
 12189:   }  //irpOrToMemWord
 12190: 
 12191:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12192:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 12193:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 12194:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12195:   //UNPK Dr,Dq,#<data>                              |-|--2346|-|-----|-----|          |1000_qqq_110_000_rrr-{data}
 12196:   //UNPK -(Ar),-(Aq),#<data>                        |-|--2346|-|-----|-----|          |1000_qqq_110_001_rrr-{data}
 12197:   //OR.L Dq,<ea>                                    |-|012346|-|-UUUU|-**00|  M+-WXZ  |1000_qqq_110_mmm_rrr
 12198:   //
 12199:   //UNPK Dr,Dq,#<data>
 12200:   //UNPK -(Ar),-(Aq),#<data>
 12201:   //  PACK/UNPKは第1オペランドのソースと第2オペランドのデスティネーションのサイズが違う。パックされていない方がワードでされている方がバイト
 12202:   //  10の位を4ビット右または左にシフトする。第3オペランドの補正値はワードでパックされていない方に加算する。CCRは変化しない
 12203:   public static void irpOrToMemLong () throws M68kException {
 12204:     int ea = XEiJ.regOC & 63;
 12205:     if (ea >= XEiJ.EA_MM) {  //OR.L Dq,<ea>
 12206:       XEiJ.mpuCycleCount++;
 12207:       int a = efaMltLong (ea);
 12208:       int z;
 12209:       mmuWriteLongData (a, z = XEiJ.regRn[XEiJ.regOC >> 9 & 7] | mmuModifyLongData (a, XEiJ.regSRS), XEiJ.regSRS);
 12210:       XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X);  //ccr_tst
 12211:     } else if (ea < XEiJ.EA_AR) {  //UNPK Dr,Dq,#<data>
 12212:       int qqq = XEiJ.regOC >> 9 & 7;
 12213:       int t = XEiJ.regRn[ea];
 12214:       XEiJ.regRn[qqq] = ~0xffff & XEiJ.regRn[qqq] | (char) ((t << 4 & 0x0f00 | t & 15) + mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS));  //pcws
 12215:     } else {  //UNPK -(Ar),-(Aq),#<data>
 12216:       int o = mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);  //pcws
 12217:       m60Incremented -= 1L << (ea << 3);
 12218:       int a = m60Address = --XEiJ.regRn[ea];
 12219:       int t = mmuReadByteSignData (a, XEiJ.regSRS);
 12220:       int aqq = (XEiJ.regOC >> 9) - (64 - 8);
 12221:       m60Incremented -= 2L << (aqq << 3);
 12222:       a = m60Address = XEiJ.regRn[aqq] -= 2;
 12223:       mmuWriteWordData (a, (t << 4 & 0x0f00 | t & 15) + o, XEiJ.regSRS);  //020以上なのでアドレスエラーは出ない
 12224:     }
 12225:   }  //irpOrToMemLong
 12226: 
 12227:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12228:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 12229:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 12230:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12231:   //DIVS.W <ea>,Dq                                  |-|012346|-|-UUUU|-***0|D M+-WXZPI|1000_qqq_111_mmm_rrr
 12232:   //
 12233:   //DIVS.W <ea>,Dq
 12234:   //  DIVSの余りの符号は被除数と一致
 12235:   //  M68000PRMでDIVS.Wのアドレッシングモードがデータ可変と書かれているのはデータの間違い
 12236:   public static void irpDivsWord () throws M68kException {
 12237:     //  X  変化しない
 12238:     //  N  ゼロ除算またはオーバーフローのとき不定。商が負のときセット。それ以外はクリア
 12239:     //  Z  ゼロ除算またはオーバーフローのとき不定。商が0のときセット。それ以外はクリア
 12240:     //  V  ゼロ除算のとき不定。オーバーフローのときセット。それ以外はクリア
 12241:     //  C  常にクリア
 12242:     //divsの余りの符号は被除数と一致
 12243:     //Javaの除算演算子の挙動
 12244:     //   10 /  3 ==  3   10 %  3 ==  1   10 =  3 *  3 +  1
 12245:     //   10 / -3 == -3   10 % -3 ==  1   10 = -3 * -3 +  1
 12246:     //  -10 /  3 == -3  -10 %  3 == -1  -10 =  3 * -3 + -1
 12247:     //  -10 / -3 ==  3  -10 % -3 == -1  -10 = -3 *  3 + -1
 12248:     XEiJ.mpuCycleCount += 22;  //最大
 12249:     int ea = XEiJ.regOC & 63;
 12250:     int qqq = XEiJ.regOC >> 9 & 7;
 12251:     int y = ea < XEiJ.EA_AR ? (short) XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) : mmuReadWordSignData (efaAnyWord (ea), XEiJ.regSRS);  //除数。pcws。イミディエイトを分離
 12252:     int x = XEiJ.regRn[qqq];  //被除数
 12253:     if (y == 0) {  //ゼロ除算
 12254:       //Dqは変化しない
 12255:       XEiJ.regCCR = (XEiJ.regCCR & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_N | XEiJ.REG_CCR_Z | XEiJ.REG_CCR_V)  //XとNとZとVは変化しない
 12256:                      );  //Cは常にクリア
 12257:       m60Address = XEiJ.regPC0;  //アドレスは命令の先頭
 12258:       M68kException.m6eNumber = M68kException.M6E_DIVIDE_BY_ZERO;
 12259:       throw M68kException.m6eSignal;
 12260:     }
 12261:     int z = x / y;  //商
 12262:     if ((short) z != z) {  //オーバーフローあり
 12263:       //Dqは変化しない
 12264:       XEiJ.regCCR = (XEiJ.regCCR & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_N | XEiJ.REG_CCR_Z) |  //XとNとZは変化しない
 12265:                      XEiJ.REG_CCR_V  //Vは常にセット
 12266:                      );  //Cは常にクリア
 12267:     } else {  //オーバーフローなし
 12268:       XEiJ.regRn[qqq] = x - y * z << 16 | (char) z;  //Dqは余り<<16|商&$ffff
 12269:       XEiJ.regCCR = (XEiJ.regCCR & XEiJ.REG_CCR_X |  //Xは変化しない
 12270:                      (z < 0 ? XEiJ.REG_CCR_N : 0) |  //Nは商が負のときセット、さもなくばクリア
 12271:                      (z == 0 ? XEiJ.REG_CCR_Z : 0)  //Zは商が0のときセット、さもなくばクリア
 12272:                      //Vは常にクリア
 12273:                      );  //Cは常にクリア
 12274:     }
 12275:   }  //irpDivsWord
 12276: 
 12277:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12278:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 12279:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 12280:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12281:   //SUB.B <ea>,Dq                                   |-|012346|-|UUUUU|*****|D M+-WXZPI|1001_qqq_000_mmm_rrr
 12282:   public static void irpSubToRegByte () throws M68kException {
 12283:     XEiJ.mpuCycleCount++;
 12284:     int ea = XEiJ.regOC & 63;
 12285:     int qqq = XEiJ.regOC >> 9 & 7;
 12286:     int x, y, z;
 12287:     y = ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadByteSignExword ((XEiJ.regPC += 2) - 1, XEiJ.regSRS) : mmuReadByteSignData (efaAnyByte (ea), XEiJ.regSRS);  //pcbs。イミディエイトを分離
 12288:     x = XEiJ.regRn[qqq];
 12289:     z = x - y;
 12290:     XEiJ.regRn[qqq] = ~255 & x | 255 & z;
 12291:     XEiJ.regCCR = (XEiJ.MPU_TSTB_TABLE[255 & z] |
 12292:            ((x ^ y) & (x ^ z)) >> 6 & XEiJ.REG_CCR_V |
 12293:            (byte) (x & (y ^ z) ^ (y | z)) >> 7 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C));  //ccr_sub_byte
 12294:   }  //irpSubToRegByte
 12295: 
 12296:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12297:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 12298:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 12299:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12300:   //SUB.W <ea>,Dq                                   |-|012346|-|UUUUU|*****|DAM+-WXZPI|1001_qqq_001_mmm_rrr
 12301:   public static void irpSubToRegWord () throws M68kException {
 12302:     XEiJ.mpuCycleCount++;
 12303:     int ea = XEiJ.regOC & 63;
 12304:     int qqq = XEiJ.regOC >> 9 & 7;
 12305:     int x, y, z;
 12306:     y = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) : mmuReadWordSignData (efaAnyWord (ea), XEiJ.regSRS);  //このr[ea]はデータレジスタまたはアドレスレジスタ。pcws。イミディエイトを分離
 12307:     x = XEiJ.regRn[qqq];
 12308:     z = x - y;
 12309:     XEiJ.regRn[qqq] = ~65535 & x | (char) z;
 12310:     XEiJ.regCCR = (z >> 12 & XEiJ.REG_CCR_N | (char) z - 1 >> 14 & XEiJ.REG_CCR_Z |
 12311:            ((x ^ y) & (x ^ z)) >> 14 & XEiJ.REG_CCR_V |
 12312:            (short) (x & (y ^ z) ^ (y | z)) >> 15 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C));  //ccr_sub_word
 12313:   }  //irpSubToRegWord
 12314: 
 12315:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12316:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 12317:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 12318:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12319:   //SUB.L <ea>,Dq                                   |-|012346|-|UUUUU|*****|DAM+-WXZPI|1001_qqq_010_mmm_rrr
 12320:   public static void irpSubToRegLong () throws M68kException {
 12321:     int ea = XEiJ.regOC & 63;
 12322:     int qqq = XEiJ.regOC >> 9 & 7;
 12323:     XEiJ.mpuCycleCount++;
 12324:     int x, y, z;
 12325:     y = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS) : mmuReadLongData (efaAnyLong (ea), XEiJ.regSRS);  //このr[ea]はデータレジスタまたはアドレスレジスタ。pcls。イミディエイトを分離
 12326:     x = XEiJ.regRn[qqq];
 12327:     z = x - y;
 12328:     XEiJ.regRn[qqq] = z;
 12329:     XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) |
 12330:            ((x ^ y) & (x ^ z)) >> 30 & XEiJ.REG_CCR_V |
 12331:            (x & (y ^ z) ^ (y | z)) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C));  //ccr_sub
 12332:   }  //irpSubToRegLong
 12333: 
 12334:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12335:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 12336:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 12337:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12338:   //SUBA.W <ea>,Aq                                  |-|012346|-|-----|-----|DAM+-WXZPI|1001_qqq_011_mmm_rrr
 12339:   //SUB.W <ea>,Aq                                   |A|012346|-|-----|-----|DAM+-WXZPI|1001_qqq_011_mmm_rrr [SUBA.W <ea>,Aq]
 12340:   //CLR.W Ar                                        |A|012346|-|-----|-----| A        |1001_rrr_011_001_rrr [SUBA.W Ar,Ar]
 12341:   //
 12342:   //SUBA.W <ea>,Aq
 12343:   //  ソースを符号拡張してロングで減算する
 12344:   public static void irpSubaWord () throws M68kException {
 12345:     XEiJ.mpuCycleCount++;
 12346:     int ea = XEiJ.regOC & 63;
 12347:     int z = ea < XEiJ.EA_MM ? (short) XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) : mmuReadWordSignData (efaAnyWord (ea), XEiJ.regSRS);  //このr[ea]はデータレジスタまたはアドレスレジスタ。pcws。イミディエイトを分離。ここでAqが変化する可能性があることに注意
 12348:     XEiJ.regRn[XEiJ.regOC >> 9 & 15] -= z;  //r[op >> 9 & 15] -= ea < XEiJ.EA_MM ? (short) r[ea] : rws (efaAnyWord (ea));は不可
 12349:     //ccrは変化しない
 12350:   }  //irpSubaWord
 12351: 
 12352:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12353:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 12354:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 12355:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12356:   //SUBX.B Dr,Dq                                    |-|012346|-|*UUUU|*****|          |1001_qqq_100_000_rrr
 12357:   //SUBX.B -(Ar),-(Aq)                              |-|012346|-|*UUUU|*****|          |1001_qqq_100_001_rrr
 12358:   //SUB.B Dq,<ea>                                   |-|012346|-|UUUUU|*****|  M+-WXZ  |1001_qqq_100_mmm_rrr
 12359:   public static void irpSubToMemByte () throws M68kException {
 12360:     int ea = XEiJ.regOC & 63;
 12361:     int a, x, y, z;
 12362:     if (ea < XEiJ.EA_MM) {
 12363:       if (ea < XEiJ.EA_AR) {  //SUBX.B Dr,Dq
 12364:         int qqq = XEiJ.regOC >> 9 & 7;
 12365:         XEiJ.mpuCycleCount++;
 12366:         y = XEiJ.regRn[ea];
 12367:         x = XEiJ.regRn[qqq];
 12368:         z = x - y - (XEiJ.regCCR >> 4);  //Xの左側はすべて0なのでCCR_X&を省略
 12369:         XEiJ.regRn[qqq] = ~255 & x | 255 & z;
 12370:       } else {  //SUBX.B -(Ar),-(Aq)
 12371:         XEiJ.mpuCycleCount += 2;
 12372:         m60Incremented -= 1L << (ea << 3);
 12373:         a = m60Address = --XEiJ.regRn[ea];
 12374:         y = mmuReadByteSignData (a, XEiJ.regSRS);  //このr[ea]はアドレスレジスタ
 12375:         int aqq = XEiJ.regOC >> 9 & 15;  //1qqq=aqq
 12376:         m60Incremented -= 1L << (aqq << 3);
 12377:         a = m60Address = --XEiJ.regRn[aqq];
 12378:         x = mmuModifyByteSignData (a, XEiJ.regSRS);
 12379:         z = x - y - (XEiJ.regCCR >> 4);  //Xの左側はすべて0なのでCCR_X&を省略
 12380:         mmuWriteByteData (a, z, XEiJ.regSRS);
 12381:       }
 12382:       XEiJ.regCCR = (z >> 4 & XEiJ.REG_CCR_N | (255 & z) - 1 >> 6 & XEiJ.regCCR & XEiJ.REG_CCR_Z |  //SUBXはZをクリアすることはあるがセットすることはない
 12383:              ((x ^ y) & (x ^ z)) >> 6 & XEiJ.REG_CCR_V |
 12384:              (byte) (x & (y ^ z) ^ (y | z)) >> 7 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C));  //ccr_subx_byte
 12385:     } else {  //SUB.B Dq,<ea>
 12386:       XEiJ.mpuCycleCount++;
 12387:       y = XEiJ.regRn[XEiJ.regOC >> 9 & 7];
 12388:       a = efaMltByte (ea);
 12389:       x = mmuModifyByteSignData (a, XEiJ.regSRS);
 12390:       z = x - y;
 12391:       mmuWriteByteData (a, z, XEiJ.regSRS);
 12392:       XEiJ.regCCR = (XEiJ.MPU_TSTB_TABLE[255 & z] |
 12393:              ((x ^ y) & (x ^ z)) >> 6 & XEiJ.REG_CCR_V |
 12394:              (byte) (x & (y ^ z) ^ (y | z)) >> 7 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C));  //ccr_sub_byte
 12395:     }
 12396:   }  //irpSubToMemByte
 12397: 
 12398:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12399:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 12400:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 12401:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12402:   //SUBX.W Dr,Dq                                    |-|012346|-|*UUUU|*****|          |1001_qqq_101_000_rrr
 12403:   //SUBX.W -(Ar),-(Aq)                              |-|012346|-|*UUUU|*****|          |1001_qqq_101_001_rrr
 12404:   //SUB.W Dq,<ea>                                   |-|012346|-|UUUUU|*****|  M+-WXZ  |1001_qqq_101_mmm_rrr
 12405:   public static void irpSubToMemWord () throws M68kException {
 12406:     int ea = XEiJ.regOC & 63;
 12407:     int a, x, y, z;
 12408:     if (ea < XEiJ.EA_MM) {
 12409:       if (ea < XEiJ.EA_AR) {  //SUBX.W Dr,Dq
 12410:         int qqq = XEiJ.regOC >> 9 & 7;
 12411:         XEiJ.mpuCycleCount++;
 12412:         y = XEiJ.regRn[ea];
 12413:         x = XEiJ.regRn[qqq];
 12414:         z = x - y - (XEiJ.regCCR >> 4);  //Xの左側はすべて0なのでCCR_X&を省略
 12415:         XEiJ.regRn[qqq] = ~65535 & x | (char) z;
 12416:       } else {  //SUBX.W -(Ar),-(Aq)
 12417:         XEiJ.mpuCycleCount += 2;
 12418:         m60Incremented -= 2L << (ea << 3);
 12419:         a = m60Address = XEiJ.regRn[ea] -= 2;
 12420:         y = mmuReadWordSignData (a, XEiJ.regSRS);  //このr[ea]はアドレスレジスタ
 12421:         int aqq = XEiJ.regOC >> 9 & 15;
 12422:         m60Incremented -= 2L << (aqq << 3);
 12423:         a = m60Address = XEiJ.regRn[aqq] -= 2;
 12424:         x = mmuModifyWordSignData (a, XEiJ.regSRS);
 12425:         z = x - y - (XEiJ.regCCR >> 4);  //Xの左側はすべて0なのでCCR_X&を省略
 12426:         mmuWriteWordData (a, z, XEiJ.regSRS);
 12427:       }
 12428:       XEiJ.regCCR = (z >> 12 & XEiJ.REG_CCR_N | (char) z - 1 >> 14 & XEiJ.regCCR & XEiJ.REG_CCR_Z |  //ADDXはZをクリアすることはあるがセットすることはない
 12429:              ((x ^ y) & (x ^ z)) >> 14 & XEiJ.REG_CCR_V |
 12430:              (short) (x & (y ^ z) ^ (y | z)) >> 15 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C));  //ccr_subx_word
 12431:     } else {  //SUB.W Dq,<ea>
 12432:       XEiJ.mpuCycleCount++;
 12433:       y = (short) XEiJ.regRn[XEiJ.regOC >> 9 & 7];
 12434:       a = efaMltWord (ea);
 12435:       x = mmuModifyWordSignData (a, XEiJ.regSRS);
 12436:       z = x - y;
 12437:       mmuWriteWordData (a, z, XEiJ.regSRS);
 12438:       XEiJ.regCCR = (z >> 12 & XEiJ.REG_CCR_N | (char) z - 1 >> 14 & XEiJ.REG_CCR_Z |
 12439:              ((x ^ y) & (x ^ z)) >> 14 & XEiJ.REG_CCR_V |
 12440:              (short) (x & (y ^ z) ^ (y | z)) >> 15 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C));  //ccr_sub_word
 12441:     }
 12442:   }  //irpSubToMemWord
 12443: 
 12444:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12445:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 12446:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 12447:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12448:   //SUBX.L Dr,Dq                                    |-|012346|-|*UUUU|*****|          |1001_qqq_110_000_rrr
 12449:   //SUBX.L -(Ar),-(Aq)                              |-|012346|-|*UUUU|*****|          |1001_qqq_110_001_rrr
 12450:   //SUB.L Dq,<ea>                                   |-|012346|-|UUUUU|*****|  M+-WXZ  |1001_qqq_110_mmm_rrr
 12451:   public static void irpSubToMemLong () throws M68kException {
 12452:     int ea = XEiJ.regOC & 63;
 12453:     if (ea < XEiJ.EA_MM) {
 12454:       int x;
 12455:       int y;
 12456:       int z;
 12457:       if (ea < XEiJ.EA_AR) {  //SUBX.L Dr,Dq
 12458:         int qqq = XEiJ.regOC >> 9 & 7;
 12459:         XEiJ.mpuCycleCount++;
 12460:         XEiJ.regRn[qqq] = z = (x = XEiJ.regRn[qqq]) - (y = XEiJ.regRn[ea]) - (XEiJ.regCCR >> 4);  //Xの左側はすべて0なのでCCR_X&を省略
 12461:       } else {  //SUBX.L -(Ar),-(Aq)
 12462:         XEiJ.mpuCycleCount += 2;
 12463:         m60Incremented -= 4L << (ea << 3);
 12464:         int a = m60Address = XEiJ.regRn[ea] -= 4;  //このr[ea]はアドレスレジスタ
 12465:         y = mmuReadLongData (a, XEiJ.regSRS);
 12466:         int aqq = XEiJ.regOC >> 9 & 15;
 12467:         m60Incremented -= 4L << (aqq << 3);
 12468:         a = m60Address = XEiJ.regRn[aqq] -= 4;
 12469:         mmuWriteLongData (a, z = (x = mmuModifyLongData (a, XEiJ.regSRS)) - y - (XEiJ.regCCR >> 4), XEiJ.regSRS);  //Xの左側はすべて0なのでCCR_X&を省略
 12470:       }
 12471:       XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_Z : 0) |
 12472:              ((x ^ y) & (x ^ z)) >>> 31 << 1 |
 12473:              (x & (y ^ z) ^ (y | z)) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C));  //ccr_subx
 12474:     } else {  //SUB.L Dq,<ea>
 12475:       XEiJ.mpuCycleCount++;
 12476:       int a = efaMltLong (ea);
 12477:       int x;
 12478:       int y;
 12479:       int z;
 12480:       mmuWriteLongData (a, z = (x = mmuModifyLongData (a, XEiJ.regSRS)) - (y = XEiJ.regRn[XEiJ.regOC >> 9 & 7]), XEiJ.regSRS);
 12481:       XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) |
 12482:              ((x ^ y) & (x ^ z)) >>> 31 << 1 |
 12483:              (x & (y ^ z) ^ (y | z)) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C));  //ccr_sub
 12484:     }
 12485:   }  //irpSubToMemLong
 12486: 
 12487:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12488:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 12489:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 12490:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12491:   //SUBA.L <ea>,Aq                                  |-|012346|-|-----|-----|DAM+-WXZPI|1001_qqq_111_mmm_rrr
 12492:   //SUB.L <ea>,Aq                                   |A|012346|-|-----|-----|DAM+-WXZPI|1001_qqq_111_mmm_rrr [SUBA.L <ea>,Aq]
 12493:   //CLR.L Ar                                        |A|012346|-|-----|-----| A        |1001_rrr_111_001_rrr [SUBA.L Ar,Ar]
 12494:   public static void irpSubaLong () throws M68kException {
 12495:     int ea = XEiJ.regOC & 63;
 12496:     XEiJ.mpuCycleCount++;
 12497:     int z = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS) : mmuReadLongData (efaAnyLong (ea), XEiJ.regSRS);  //このr[ea]はデータレジスタまたはアドレスレジスタ。pcls。イミディエイトを分離。ここでAqが変化する可能性があることに注意
 12498:     XEiJ.regRn[XEiJ.regOC >> 9 & 15] -= z;  //r[op >> 9 & 15] -= ea < XEiJ.EA_MM ? r[ea] : rls (efaAnyLong (ea));は不可
 12499:     //ccrは変化しない
 12500:   }  //irpSubaLong
 12501: 
 12502:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12503:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 12504:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 12505:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12506:   //SXCALL <name>                                   |A|012346|-|UUUUU|*****|          |1010_0dd_ddd_ddd_ddd [ALINE #<data>]
 12507:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12508:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 12509:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 12510:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12511:   //ALINE #<data>                                   |-|012346|-|UUUUU|*****|          |1010_ddd_ddd_ddd_ddd (line 1010 emulator)
 12512:   public static void irpAline () throws M68kException {
 12513:     irpExceptionFormat0 (M68kException.M6E_LINE_1010_EMULATOR << 2, XEiJ.regPC0);  //pcは命令の先頭
 12514:   }  //irpAline
 12515: 
 12516:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12517:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 12518:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 12519:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12520:   //CMP.B <ea>,Dq                                   |-|012346|-|-UUUU|-****|D M+-WXZPI|1011_qqq_000_mmm_rrr
 12521:   public static void irpCmpByte () throws M68kException {
 12522:     XEiJ.mpuCycleCount++;
 12523:     int ea = XEiJ.regOC & 63;
 12524:     int x;
 12525:     int y;
 12526:     int z = (byte) ((x = (byte) XEiJ.regRn[XEiJ.regOC >> 9 & 7]) - (y = ea < XEiJ.EA_AR ? (byte) XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadByteSignExword ((XEiJ.regPC += 2) - 1, XEiJ.regSRS) : mmuReadByteSignData (efaAnyByte (ea), XEiJ.regSRS)));  //pcbs。イミディエイトを分離
 12527:     XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) |
 12528:            ((x ^ y) & (x ^ z)) >>> 31 << 1 |
 12529:            (x & (y ^ z) ^ (y | z)) >>> 31);  //ccr_cmp
 12530:   }  //irpCmpByte
 12531: 
 12532:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12533:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 12534:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 12535:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12536:   //CMP.W <ea>,Dq                                   |-|012346|-|-UUUU|-****|DAM+-WXZPI|1011_qqq_001_mmm_rrr
 12537:   public static void irpCmpWord () throws M68kException {
 12538:     XEiJ.mpuCycleCount++;
 12539:     int ea = XEiJ.regOC & 63;
 12540:     int x;
 12541:     int y;
 12542:     int z = (short) ((x = (short) XEiJ.regRn[XEiJ.regOC >> 9 & 7]) - (y = ea < XEiJ.EA_MM ? (short) XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) : mmuReadWordSignData (efaAnyWord (ea), XEiJ.regSRS)));  //このr[ea]はデータレジスタまたはアドレスレジスタ。pcws。イミディエイトを分離
 12543:     XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) |
 12544:            ((x ^ y) & (x ^ z)) >>> 31 << 1 |
 12545:            (x & (y ^ z) ^ (y | z)) >>> 31);  //ccr_cmp
 12546:   }  //irpCmpWord
 12547: 
 12548:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12549:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 12550:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 12551:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12552:   //CMP.L <ea>,Dq                                   |-|012346|-|-UUUU|-****|DAM+-WXZPI|1011_qqq_010_mmm_rrr
 12553:   public static void irpCmpLong () throws M68kException {
 12554:     XEiJ.mpuCycleCount++;
 12555:     int ea = XEiJ.regOC & 63;
 12556:     int x;
 12557:     int y;
 12558:     int z = (x = XEiJ.regRn[XEiJ.regOC >> 9 & 7]) - (y = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS) : mmuReadLongData (efaAnyLong (ea), XEiJ.regSRS));  //このr[ea]はデータレジスタまたはアドレスレジスタ。pcls。イミディエイトを分離
 12559:     XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) |
 12560:            ((x ^ y) & (x ^ z)) >>> 31 << 1 |
 12561:            (x & (y ^ z) ^ (y | z)) >>> 31);  //ccr_cmp
 12562:   }  //irpCmpLong
 12563: 
 12564:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12565:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 12566:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 12567:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12568:   //CMPA.W <ea>,Aq                                  |-|012346|-|-UUUU|-****|DAM+-WXZPI|1011_qqq_011_mmm_rrr
 12569:   //CMP.W <ea>,Aq                                   |A|012346|-|-UUUU|-****|DAM+-WXZPI|1011_qqq_011_mmm_rrr [CMPA.W <ea>,Aq]
 12570:   //
 12571:   //CMPA.W <ea>,Aq
 12572:   //  ソースを符号拡張してロングで比較する
 12573:   public static void irpCmpaWord () throws M68kException {
 12574:     XEiJ.mpuCycleCount++;
 12575:     int ea = XEiJ.regOC & 63;
 12576:     //ソースを符号拡張してからロングで比較する
 12577:     int y = ea < XEiJ.EA_MM ? (short) XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) : mmuReadWordSignData (efaAnyWord (ea), XEiJ.regSRS);  //このr[ea]はデータレジスタまたはアドレスレジスタ。pcws。イミディエイトを分離。ここでAqが変化する可能性があることに注意
 12578:     int x;
 12579:     int z = (x = XEiJ.regRn[XEiJ.regOC >> 9 & 15]) - y;
 12580:     XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) |
 12581:            ((x ^ y) & (x ^ z)) >>> 31 << 1 |
 12582:            (x & (y ^ z) ^ (y | z)) >>> 31);  //ccr_cmp
 12583:   }  //irpCmpaWord
 12584: 
 12585:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12586:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 12587:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 12588:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12589:   //EOR.B Dq,<ea>                                   |-|012346|-|-UUUU|-**00|D M+-WXZ  |1011_qqq_100_mmm_rrr
 12590:   //CMPM.B (Ar)+,(Aq)+                              |-|012346|-|-UUUU|-****|          |1011_qqq_100_001_rrr
 12591:   public static void irpEorByte () throws M68kException {
 12592:     int ea = XEiJ.regOC & 63;
 12593:     if (ea >> 3 == XEiJ.MMM_AR) {  //CMPM.B (Ar)+,(Aq)+
 12594:       XEiJ.mpuCycleCount += 2;
 12595:       m60Incremented += 1L << (ea << 3);
 12596:       int a = m60Address = XEiJ.regRn[ea]++;  //このr[ea]はアドレスレジスタ
 12597:       int y = mmuReadByteSignData (a, XEiJ.regSRS);
 12598:       int x;
 12599:       int aqq = XEiJ.regOC >> 9 & 15;
 12600:       m60Incremented += 1L << (aqq << 3);
 12601:       a = m60Address = XEiJ.regRn[aqq]++;
 12602:       int z = (byte) ((x = mmuReadByteSignData (a, XEiJ.regSRS)) - y);
 12603:       XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) |
 12604:              ((x ^ y) & (x ^ z)) >>> 31 << 1 |
 12605:              (x & (y ^ z) ^ (y | z)) >>> 31);  //ccr_cmp
 12606:     } else {
 12607:       int qqq = XEiJ.regOC >> 9 & 7;
 12608:       int z;
 12609:       if (ea < XEiJ.EA_AR) {  //EOR.B Dq,Dr
 12610:         XEiJ.mpuCycleCount++;
 12611:         z = XEiJ.regRn[ea] ^= 255 & XEiJ.regRn[qqq];  //0拡張してからEOR
 12612:       } else {  //EOR.B Dq,<mem>
 12613:         XEiJ.mpuCycleCount++;
 12614:         int a = efaMltByte (ea);
 12615:         mmuWriteByteData (a, z = XEiJ.regRn[qqq] ^ mmuModifyByteSignData (a, XEiJ.regSRS), XEiJ.regSRS);
 12616:       }
 12617:       XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & z];  //ccr_tst_byte
 12618:     }
 12619:   }  //irpEorByte
 12620: 
 12621:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12622:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 12623:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 12624:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12625:   //EOR.W Dq,<ea>                                   |-|012346|-|-UUUU|-**00|D M+-WXZ  |1011_qqq_101_mmm_rrr
 12626:   //CMPM.W (Ar)+,(Aq)+                              |-|012346|-|-UUUU|-****|          |1011_qqq_101_001_rrr
 12627:   public static void irpEorWord () throws M68kException {
 12628:     int ea = XEiJ.regOC & 63;
 12629:     int rrr = XEiJ.regOC & 7;
 12630:     int mmm = ea >> 3;
 12631:     if (mmm == XEiJ.MMM_AR) {  //CMPM.W (Ar)+,(Aq)+
 12632:       XEiJ.mpuCycleCount += 2;
 12633:       m60Incremented += 2L << (ea << 3);
 12634:       int a = m60Address = (XEiJ.regRn[ea] += 2) - 2;  //このr[ea]はアドレスレジスタ
 12635:       int y = mmuReadWordSignData (a, XEiJ.regSRS);
 12636:       int x;
 12637:       int aqq = XEiJ.regOC >> 9 & 15;
 12638:       m60Incremented += 2L << (aqq << 3);
 12639:       a = m60Address = (XEiJ.regRn[aqq] += 2) - 2;
 12640:       int z = (short) ((x = mmuReadWordSignData (a, XEiJ.regSRS)) - y);
 12641:       XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) |
 12642:              ((x ^ y) & (x ^ z)) >>> 31 << 1 |
 12643:              (x & (y ^ z) ^ (y | z)) >>> 31);  //ccr_cmp
 12644:     } else {
 12645:       int qqq = XEiJ.regOC >> 9 & 7;
 12646:       int z;
 12647:       if (ea < XEiJ.EA_AR) {  //EOR.W Dq,Dr
 12648:         XEiJ.mpuCycleCount++;
 12649:         z = XEiJ.regRn[rrr] ^= (char) XEiJ.regRn[qqq];  //0拡張してからEOR
 12650:       } else {  //EOR.W Dq,<mem>
 12651:         XEiJ.mpuCycleCount++;
 12652:         int a = efaMltWord (ea);
 12653:         mmuWriteWordData (a, z = XEiJ.regRn[qqq] ^ mmuModifyWordSignData (a, XEiJ.regSRS), XEiJ.regSRS);
 12654:       }
 12655:       XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (char) z - 1 >> 31 & XEiJ.REG_CCR_Z | ((short) z < 0 ? XEiJ.REG_CCR_N : 0);  //ccr_tst_word
 12656:     }
 12657:   }  //irpEorWord
 12658: 
 12659:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12660:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 12661:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 12662:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12663:   //EOR.L Dq,<ea>                                   |-|012346|-|-UUUU|-**00|D M+-WXZ  |1011_qqq_110_mmm_rrr
 12664:   //CMPM.L (Ar)+,(Aq)+                              |-|012346|-|-UUUU|-****|          |1011_qqq_110_001_rrr
 12665:   public static void irpEorLong () throws M68kException {
 12666:     int ea = XEiJ.regOC & 63;
 12667:     if (ea >> 3 == XEiJ.MMM_AR) {  //CMPM.L (Ar)+,(Aq)+
 12668:       XEiJ.mpuCycleCount += 2;
 12669:       m60Incremented += 4L << (ea << 3);
 12670:       int a = m60Address = (XEiJ.regRn[ea] += 4) - 4;  //このr[ea]はアドレスレジスタ
 12671:       int y = mmuReadLongData (a, XEiJ.regSRS);
 12672:       int x;
 12673:       int aqq = XEiJ.regOC >> 9 & 15;
 12674:       m60Incremented += 4L << (aqq << 3);
 12675:       a = m60Address = (XEiJ.regRn[aqq] += 4) - 4;
 12676:       int z = (x = mmuReadLongData (a, XEiJ.regSRS)) - y;
 12677:       XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) |
 12678:              ((x ^ y) & (x ^ z)) >>> 31 << 1 |
 12679:              (x & (y ^ z) ^ (y | z)) >>> 31);  //ccr_cmp
 12680:     } else {
 12681:       int qqq = XEiJ.regOC >> 9 & 7;
 12682:       int z;
 12683:       if (ea < XEiJ.EA_AR) {  //EOR.L Dq,Dr
 12684:         XEiJ.mpuCycleCount++;
 12685:         XEiJ.regRn[ea] = z = XEiJ.regRn[ea] ^ XEiJ.regRn[qqq];
 12686:       } else {  //EOR.L Dq,<mem>
 12687:         XEiJ.mpuCycleCount++;
 12688:         int a = efaMltLong (ea);
 12689:         mmuWriteLongData (a, z = mmuModifyLongData (a, XEiJ.regSRS) ^ XEiJ.regRn[qqq], XEiJ.regSRS);
 12690:       }
 12691:       XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X);  //ccr_tst
 12692:     }
 12693:   }  //irpEorLong
 12694: 
 12695:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12696:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 12697:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 12698:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12699:   //CMPA.L <ea>,Aq                                  |-|012346|-|-UUUU|-****|DAM+-WXZPI|1011_qqq_111_mmm_rrr
 12700:   //CMP.L <ea>,Aq                                   |A|012346|-|-UUUU|-****|DAM+-WXZPI|1011_qqq_111_mmm_rrr [CMPA.L <ea>,Aq]
 12701:   public static void irpCmpaLong () throws M68kException {
 12702:     XEiJ.mpuCycleCount++;
 12703:     int ea = XEiJ.regOC & 63;
 12704:     int y = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS) : mmuReadLongData (efaAnyLong (ea), XEiJ.regSRS);  //このr[ea]はデータレジスタまたはアドレスレジスタ。pcls。イミディエイトを分離。ここでAqが変化する可能性があることに注意
 12705:     int x;
 12706:     int z = (x = XEiJ.regRn[XEiJ.regOC >> 9 & 15]) - y;
 12707:     XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) |
 12708:            ((x ^ y) & (x ^ z)) >>> 31 << 1 |
 12709:            (x & (y ^ z) ^ (y | z)) >>> 31);  //ccr_cmp
 12710:   }  //irpCmpaLong
 12711: 
 12712:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12713:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 12714:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 12715:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12716:   //AND.B <ea>,Dq                                   |-|012346|-|-UUUU|-**00|D M+-WXZPI|1100_qqq_000_mmm_rrr
 12717:   public static void irpAndToRegByte () throws M68kException {
 12718:     XEiJ.mpuCycleCount++;
 12719:     int ea = XEiJ.regOC & 63;
 12720:     XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & (XEiJ.regRn[XEiJ.regOC >> 9 & 7] &= ~255 | (ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadByteSignExword ((XEiJ.regPC += 2) - 1, XEiJ.regSRS) : mmuReadByteSignData (efaAnyByte (ea), XEiJ.regSRS)))];  //ccr_tst_byte。pcbs。イミディエイトを分離。1拡張してからAND
 12721:   }  //irpAndToRegByte
 12722: 
 12723:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12724:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 12725:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 12726:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12727:   //AND.W <ea>,Dq                                   |-|012346|-|-UUUU|-**00|D M+-WXZPI|1100_qqq_001_mmm_rrr
 12728:   public static void irpAndToRegWord () throws M68kException {
 12729:     XEiJ.mpuCycleCount++;
 12730:     int ea = XEiJ.regOC & 63;
 12731:     int z = XEiJ.regRn[XEiJ.regOC >> 9 & 7] &= ~65535 | (ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) : mmuReadWordSignData (efaAnyWord (ea), XEiJ.regSRS));  //pcws。イミディエイトを分離。1拡張してからAND
 12732:     XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (char) z - 1 >> 31 & XEiJ.REG_CCR_Z | ((short) z < 0 ? XEiJ.REG_CCR_N : 0);  //ccr_tst_word
 12733:   }  //irpAndToRegWord
 12734: 
 12735:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12736:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 12737:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 12738:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12739:   //AND.L <ea>,Dq                                   |-|012346|-|-UUUU|-**00|D M+-WXZPI|1100_qqq_010_mmm_rrr
 12740:   public static void irpAndToRegLong () throws M68kException {
 12741:     XEiJ.mpuCycleCount++;
 12742:     int ea = XEiJ.regOC & 63;
 12743:     int z = XEiJ.regRn[XEiJ.regOC >> 9 & 7] &= ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS) : mmuReadLongData (efaAnyLong (ea), XEiJ.regSRS);  //pcls。イミディエイトを分離
 12744:     XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X);  //ccr_tst
 12745:   }  //irpAndToRegLong
 12746: 
 12747:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12748:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 12749:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 12750:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12751:   //MULU.W <ea>,Dq                                  |-|012346|-|-UUUU|-***0|D M+-WXZPI|1100_qqq_011_mmm_rrr
 12752:   public static void irpMuluWord () throws M68kException {
 12753:     XEiJ.mpuCycleCount += 2;
 12754:     int ea = XEiJ.regOC & 63;
 12755:     int qqq = XEiJ.regOC >> 9 & 7;
 12756:     int y = ea < XEiJ.EA_AR ? (char) XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) : mmuReadWordZeroData (efaAnyWord (ea), XEiJ.regSRS);  //pcwz。イミディエイトを分離
 12757:     int z;
 12758:     XEiJ.regRn[qqq] = z = (char) XEiJ.regRn[qqq] * y;  //積の下位32ビット。オーバーフローは無視
 12759:     XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X);  //ccr_tst
 12760:   }  //irpMuluWord
 12761: 
 12762:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12763:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 12764:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 12765:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12766:   //ABCD.B Dr,Dq                                    |-|012346|-|UUUUU|*U*U*|          |1100_qqq_100_000_rrr
 12767:   //ABCD.B -(Ar),-(Aq)                              |-|012346|-|UUUUU|*U*U*|          |1100_qqq_100_001_rrr
 12768:   //AND.B Dq,<ea>                                   |-|012346|-|-UUUU|-**00|  M+-WXZ  |1100_qqq_100_mmm_rrr
 12769:   public static void irpAndToMemByte () throws M68kException {
 12770:     int ea = XEiJ.regOC & 63;
 12771:     if (ea >= XEiJ.EA_MM) {  //AND.B Dq,<ea>
 12772:       XEiJ.mpuCycleCount++;
 12773:       int a = efaMltByte (ea);
 12774:       int z = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & mmuModifyByteSignData (a, XEiJ.regSRS);
 12775:       mmuWriteByteData (a, z, XEiJ.regSRS);
 12776:       XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & z];  //ccr_tst_byte
 12777:     } else if (ea < XEiJ.EA_AR) {  //ABCD.B Dr,Dq
 12778:       int qqq = XEiJ.regOC >> 9 & 7;
 12779:       XEiJ.mpuCycleCount++;
 12780:       XEiJ.regRn[qqq] = ~0xff & XEiJ.regRn[qqq] | irpAbcd (XEiJ.regRn[qqq], XEiJ.regRn[ea]);
 12781:     } else {  //ABCD.B -(Ar),-(Aq)
 12782:       XEiJ.mpuCycleCount += 2;
 12783:       m60Incremented -= 1L << (ea << 3);
 12784:       int a = m60Address = --XEiJ.regRn[ea];  //このr[ea]はアドレスレジスタ
 12785:       int y = mmuReadByteZeroData (a, XEiJ.regSRS);
 12786:       int aqq = (XEiJ.regOC >> 9) - (96 - 8);
 12787:       m60Incremented -= 1L << (aqq << 3);
 12788:       a = m60Address = --XEiJ.regRn[aqq];
 12789:       mmuWriteByteData (a, irpAbcd (mmuModifyByteZeroData (a, XEiJ.regSRS), y), XEiJ.regSRS);
 12790:     }
 12791:   }  //irpAndToMemByte
 12792: 
 12793:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12794:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 12795:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 12796:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12797:   //EXG.L Dq,Dr                                     |-|012346|-|-----|-----|          |1100_qqq_101_000_rrr
 12798:   //EXG.L Aq,Ar                                     |-|012346|-|-----|-----|          |1100_qqq_101_001_rrr
 12799:   //AND.W Dq,<ea>                                   |-|012346|-|-UUUU|-**00|  M+-WXZ  |1100_qqq_101_mmm_rrr
 12800:   public static void irpAndToMemWord () throws M68kException {
 12801:     int ea = XEiJ.regOC & 63;
 12802:     if (ea < XEiJ.EA_MM) {  //EXG
 12803:       XEiJ.mpuCycleCount++;
 12804:       if (ea < XEiJ.EA_AR) {  //EXG.L Dq,Dr
 12805:         int qqq = XEiJ.regOC >> 9 & 7;
 12806:         int t = XEiJ.regRn[qqq];
 12807:         XEiJ.regRn[qqq] = XEiJ.regRn[ea];
 12808:         XEiJ.regRn[ea] = t;
 12809:       } else {  //EXG.L Aq,Ar
 12810:         int aqq = (XEiJ.regOC >> 9) - (96 - 8);
 12811:         int t = XEiJ.regRn[aqq];
 12812:         XEiJ.regRn[aqq] = XEiJ.regRn[ea];  //このr[ea]アドレスレジスタ
 12813:         XEiJ.regRn[ea] = t;  //このr[ea]はアドレスレジスタ
 12814:       }
 12815:     } else {  //AND.W Dq,<ea>
 12816:       XEiJ.mpuCycleCount++;
 12817:       int a = efaMltWord (ea);
 12818:       int z = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & mmuModifyWordSignData (a, XEiJ.regSRS);
 12819:       mmuWriteWordData (a, z, XEiJ.regSRS);
 12820:       XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (char) z - 1 >> 31 & XEiJ.REG_CCR_Z | ((short) z < 0 ? XEiJ.REG_CCR_N : 0);  //ccr_tst_word
 12821:     }
 12822:   }  //irpAndToMemWord
 12823: 
 12824:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12825:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 12826:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 12827:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12828:   //EXG.L Dq,Ar                                     |-|012346|-|-----|-----|          |1100_qqq_110_001_rrr
 12829:   //AND.L Dq,<ea>                                   |-|012346|-|-UUUU|-**00|  M+-WXZ  |1100_qqq_110_mmm_rrr
 12830:   public static void irpAndToMemLong () throws M68kException {
 12831:     int ea = XEiJ.regOC & 63;
 12832:     int qqq = XEiJ.regOC >> 9 & 7;
 12833:     if (ea >> 3 == XEiJ.MMM_AR) {  //EXG.L Dq,Ar
 12834:       XEiJ.mpuCycleCount++;
 12835:       int t = XEiJ.regRn[qqq];
 12836:       XEiJ.regRn[qqq] = XEiJ.regRn[ea];  //このr[ea]はアドレスレジスタ
 12837:       XEiJ.regRn[ea] = t;  //このr[ea]はアドレスレジスタ
 12838:     } else {  //AND.L Dq,<ea>
 12839:       XEiJ.mpuCycleCount++;
 12840:       int a = efaMltLong (ea);
 12841:       int z;
 12842:       mmuWriteLongData (a, z = mmuModifyLongData (a, XEiJ.regSRS) & XEiJ.regRn[qqq], XEiJ.regSRS);
 12843:       XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X);  //ccr_tst
 12844:     }
 12845:   }  //irpAndToMemLong
 12846: 
 12847:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12848:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 12849:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 12850:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12851:   //MULS.W <ea>,Dq                                  |-|012346|-|-UUUU|-***0|D M+-WXZPI|1100_qqq_111_mmm_rrr
 12852:   public static void irpMulsWord () throws M68kException {
 12853:     XEiJ.mpuCycleCount += 2;
 12854:     int ea = XEiJ.regOC & 63;
 12855:     int qqq = XEiJ.regOC >> 9 & 7;
 12856:     int y = ea < XEiJ.EA_AR ? (short) XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) : mmuReadWordSignData (efaAnyWord (ea), XEiJ.regSRS);  //pcws。イミディエイトを分離
 12857:     int z;
 12858:     XEiJ.regRn[qqq] = z = (short) XEiJ.regRn[qqq] * y;  //積の下位32ビット。オーバーフローは無視
 12859:     XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X);  //ccr_tst
 12860:   }  //irpMulsWord
 12861: 
 12862:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12863:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 12864:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 12865:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12866:   //ADD.B <ea>,Dq                                   |-|012346|-|UUUUU|*****|D M+-WXZPI|1101_qqq_000_mmm_rrr
 12867:   public static void irpAddToRegByte () throws M68kException {
 12868:     XEiJ.mpuCycleCount++;
 12869:     int ea = XEiJ.regOC & 63;
 12870:     int qqq = XEiJ.regOC >> 9 & 7;
 12871:     int x, y, z;
 12872:     y = ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadByteSignExword ((XEiJ.regPC += 2) - 1, XEiJ.regSRS) : mmuReadByteSignData (efaAnyByte (ea), XEiJ.regSRS);  //pcbs。イミディエイトを分離
 12873:     x = XEiJ.regRn[qqq];
 12874:     z = x + y;
 12875:     XEiJ.regRn[qqq] = ~255 & x | 255 & z;
 12876:     XEiJ.regCCR = (XEiJ.MPU_TSTB_TABLE[255 & z] |
 12877:            ((x ^ z) & (y ^ z)) >> 6 & XEiJ.REG_CCR_V |
 12878:            (byte) ((x | y) ^ (x ^ y) & z) >> 7 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C));  //ccr_add_byte
 12879:   }  //irpAddToRegByte
 12880: 
 12881:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12882:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 12883:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 12884:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12885:   //ADD.W <ea>,Dq                                   |-|012346|-|UUUUU|*****|DAM+-WXZPI|1101_qqq_001_mmm_rrr
 12886:   public static void irpAddToRegWord () throws M68kException {
 12887:     XEiJ.mpuCycleCount++;
 12888:     int ea = XEiJ.regOC & 63;
 12889:     int qqq = XEiJ.regOC >> 9 & 7;
 12890:     int x, y, z;
 12891:     y = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) : mmuReadWordSignData (efaAnyWord (ea), XEiJ.regSRS);  //このr[ea]はデータレジスタまたはアドレスレジスタ。pcws。イミディエイトを分離
 12892:     x = XEiJ.regRn[qqq];
 12893:     z = x + y;
 12894:     XEiJ.regRn[qqq] = ~65535 & x | (char) z;
 12895:     XEiJ.regCCR = (z >> 12 & XEiJ.REG_CCR_N | (char) z - 1 >> 14 & XEiJ.REG_CCR_Z |
 12896:            ((x ^ z) & (y ^ z)) >> 14 & XEiJ.REG_CCR_V |
 12897:            (short) ((x | y) ^ (x ^ y) & z) >> 15 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C));  //ccr_add_word
 12898:   }  //irpAddToRegWord
 12899: 
 12900:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12901:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 12902:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 12903:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12904:   //ADD.L <ea>,Dq                                   |-|012346|-|UUUUU|*****|DAM+-WXZPI|1101_qqq_010_mmm_rrr
 12905:   public static void irpAddToRegLong () throws M68kException {
 12906:     XEiJ.mpuCycleCount++;
 12907:     int ea = XEiJ.regOC & 63;
 12908:     int qqq = XEiJ.regOC >> 9 & 7;
 12909:     int x, y, z;
 12910:     y = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS) : mmuReadLongData (efaAnyLong (ea), XEiJ.regSRS);  //このr[ea]はデータレジスタまたはアドレスレジスタ。pcls。イミディエイトを分離
 12911:     x = XEiJ.regRn[qqq];
 12912:     z = x + y;
 12913:     XEiJ.regRn[qqq] = z;
 12914:     XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) |
 12915:            ((x ^ z) & (y ^ z)) >> 30 & XEiJ.REG_CCR_V |
 12916:            ((x | y) ^ (x ^ y) & z) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C));  //ccr_add
 12917:   }  //irpAddToRegLong
 12918: 
 12919:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12920:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 12921:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 12922:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12923:   //ADDA.W <ea>,Aq                                  |-|012346|-|-----|-----|DAM+-WXZPI|1101_qqq_011_mmm_rrr
 12924:   //ADD.W <ea>,Aq                                   |A|012346|-|-----|-----|DAM+-WXZPI|1101_qqq_011_mmm_rrr [ADDA.W <ea>,Aq]
 12925:   //
 12926:   //ADDA.W <ea>,Aq
 12927:   //  ソースを符号拡張してロングで加算する
 12928:   public static void irpAddaWord () throws M68kException {
 12929:     XEiJ.mpuCycleCount++;
 12930:     int ea = XEiJ.regOC & 63;
 12931:     int z = ea < XEiJ.EA_MM ? (short) XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) : mmuReadWordSignData (efaAnyWord (ea), XEiJ.regSRS);  //このr[ea]はデータレジスタまたはアドレスレジスタ。pcws。イミディエイトを分離。ここでAqが変化する可能性があることに注意
 12932:     XEiJ.regRn[XEiJ.regOC >> 9 & 15] += z;  //r[op >> 9 & 15] += ea < XEiJ.EA_MM ? (short) r[ea] : rws (efaAnyWord (ea));は不可
 12933:     //ccrは変化しない
 12934:   }  //irpAddaWord
 12935: 
 12936:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12937:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 12938:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 12939:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12940:   //ADDX.B Dr,Dq                                    |-|012346|-|*UUUU|*****|          |1101_qqq_100_000_rrr
 12941:   //ADDX.B -(Ar),-(Aq)                              |-|012346|-|*UUUU|*****|          |1101_qqq_100_001_rrr
 12942:   //ADD.B Dq,<ea>                                   |-|012346|-|UUUUU|*****|  M+-WXZ  |1101_qqq_100_mmm_rrr
 12943:   public static void irpAddToMemByte () throws M68kException {
 12944:     int ea = XEiJ.regOC & 63;
 12945:     int a, x, y, z;
 12946:     if (ea < XEiJ.EA_MM) {
 12947:       if (ea < XEiJ.EA_AR) {  //ADDX.B Dr,Dq
 12948:         int qqq = XEiJ.regOC >> 9 & 7;
 12949:         XEiJ.mpuCycleCount++;
 12950:         y = XEiJ.regRn[ea];
 12951:         x = XEiJ.regRn[qqq];
 12952:         z = x + y + (XEiJ.regCCR >> 4);  //Xの左側はすべて0なのでCCR_X&を省略
 12953:         XEiJ.regRn[qqq] = ~255 & x | 255 & z;
 12954:       } else {  //ADDX.B -(Ar),-(Aq)
 12955:         XEiJ.mpuCycleCount += 2;
 12956:         m60Incremented -= 1L << (ea << 3);
 12957:         a = m60Address = --XEiJ.regRn[ea];  //このr[ea]はアドレスレジスタ
 12958:         y = mmuReadByteSignData (a, XEiJ.regSRS);
 12959:         int aqq = XEiJ.regOC >> 9 & 15;  //1qqq=aqq
 12960:         m60Incremented -= 1L << (aqq << 3);
 12961:         a = m60Address = --XEiJ.regRn[aqq];
 12962:         x = mmuModifyByteSignData (a, XEiJ.regSRS);
 12963:         z = x + y + (XEiJ.regCCR >> 4);  //Xの左側はすべて0なのでCCR_X&を省略
 12964:         mmuWriteByteData (a, z, XEiJ.regSRS);
 12965:       }
 12966:       XEiJ.regCCR = (z >> 4 & XEiJ.REG_CCR_N | (255 & z) - 1 >> 6 & XEiJ.regCCR & XEiJ.REG_CCR_Z |  //ADDXはZをクリアすることはあるがセットすることはない
 12967:              ((x ^ z) & (y ^ z)) >> 6 & XEiJ.REG_CCR_V |
 12968:              (byte) ((x | y) ^ (x ^ y) & z) >> 7 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C));  //ccr_addx_byte
 12969:     } else {  //ADD.B Dq,<ea>
 12970:       XEiJ.mpuCycleCount++;
 12971:       y = XEiJ.regRn[XEiJ.regOC >> 9 & 7];
 12972:       a = efaMltByte (ea);
 12973:       x = mmuModifyByteSignData (a, XEiJ.regSRS);
 12974:       z = x + y;
 12975:       mmuWriteByteData (a, z, XEiJ.regSRS);
 12976:       XEiJ.regCCR = (XEiJ.MPU_TSTB_TABLE[255 & z] |
 12977:              ((x ^ z) & (y ^ z)) >> 6 & XEiJ.REG_CCR_V |
 12978:              (byte) ((x | y) ^ (x ^ y) & z) >> 7 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C));  //ccr_add_byte
 12979:     }
 12980:   }  //irpAddToMemByte
 12981: 
 12982:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12983:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 12984:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 12985:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12986:   //ADDX.W Dr,Dq                                    |-|012346|-|*UUUU|*****|          |1101_qqq_101_000_rrr
 12987:   //ADDX.W -(Ar),-(Aq)                              |-|012346|-|*UUUU|*****|          |1101_qqq_101_001_rrr
 12988:   //ADD.W Dq,<ea>                                   |-|012346|-|UUUUU|*****|  M+-WXZ  |1101_qqq_101_mmm_rrr
 12989:   public static void irpAddToMemWord () throws M68kException {
 12990:     int ea = XEiJ.regOC & 63;
 12991:     int a, x, y, z;
 12992:     if (ea < XEiJ.EA_MM) {
 12993:       if (ea < XEiJ.EA_AR) {  //ADDX.W Dr,Dq
 12994:         int qqq = XEiJ.regOC >> 9 & 7;
 12995:         XEiJ.mpuCycleCount++;
 12996:         y = XEiJ.regRn[ea];
 12997:         x = XEiJ.regRn[qqq];
 12998:         z = x + y + (XEiJ.regCCR >> 4);  //Xの左側はすべて0なのでCCR_X&を省略
 12999:         XEiJ.regRn[qqq] = ~65535 & x | (char) z;
 13000:       } else {  //ADDX.W -(Ar),-(Aq)
 13001:         XEiJ.mpuCycleCount += 2;
 13002:         m60Incremented -= 2L << (ea << 3);
 13003:         a = m60Address = XEiJ.regRn[ea] -= 2;  //このr[ea]はアドレスレジスタ
 13004:         y = mmuReadWordSignData (a, XEiJ.regSRS);
 13005:         int aqq = XEiJ.regOC >> 9 & 15;
 13006:         m60Incremented -= 2L << (aqq << 3);
 13007:         a = m60Address = XEiJ.regRn[aqq] -= 2;
 13008:         x = mmuModifyWordSignData (a, XEiJ.regSRS);
 13009:         z = x + y + (XEiJ.regCCR >> 4);  //Xの左側はすべて0なのでCCR_X&を省略
 13010:         mmuWriteWordData (a, z, XEiJ.regSRS);
 13011:       }
 13012:       XEiJ.regCCR = (z >> 12 & XEiJ.REG_CCR_N | (char) z - 1 >> 14 & XEiJ.regCCR & XEiJ.REG_CCR_Z |  //ADDXはZをクリアすることはあるがセットすることはない
 13013:              ((x ^ z) & (y ^ z)) >> 14 & XEiJ.REG_CCR_V |
 13014:              (short) ((x | y) ^ (x ^ y) & z) >> 15 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C));  //ccr_addx_word
 13015:     } else {  //ADD.W Dq,<ea>
 13016:       XEiJ.mpuCycleCount++;
 13017:       a = efaMltWord (ea);
 13018:       y = XEiJ.regRn[XEiJ.regOC >> 9 & 7];
 13019:       x = mmuModifyWordSignData (a, XEiJ.regSRS);
 13020:       z = x + y;
 13021:       mmuWriteWordData (a, z, XEiJ.regSRS);
 13022:       XEiJ.regCCR = (z >> 12 & XEiJ.REG_CCR_N | (char) z - 1 >> 14 & XEiJ.REG_CCR_Z |
 13023:              ((x ^ z) & (y ^ z)) >> 14 & XEiJ.REG_CCR_V |
 13024:              (short) ((x | y) ^ (x ^ y) & z) >> 15 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C));  //ccr_add_word
 13025:     }
 13026:   }  //irpAddToMemWord
 13027: 
 13028:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 13029:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 13030:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 13031:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 13032:   //ADDX.L Dr,Dq                                    |-|012346|-|*UUUU|*****|          |1101_qqq_110_000_rrr
 13033:   //ADDX.L -(Ar),-(Aq)                              |-|012346|-|*UUUU|*****|          |1101_qqq_110_001_rrr
 13034:   //ADD.L Dq,<ea>                                   |-|012346|-|UUUUU|*****|  M+-WXZ  |1101_qqq_110_mmm_rrr
 13035:   public static void irpAddToMemLong () throws M68kException {
 13036:     int ea = XEiJ.regOC & 63;
 13037:     if (ea < XEiJ.EA_MM) {
 13038:       int x;
 13039:       int y;
 13040:       int z;
 13041:       if (ea < XEiJ.EA_AR) {  //ADDX.L Dr,Dq
 13042:         int qqq = XEiJ.regOC >> 9 & 7;
 13043:         XEiJ.mpuCycleCount++;
 13044:         XEiJ.regRn[qqq] = z = (x = XEiJ.regRn[qqq]) + (y = XEiJ.regRn[ea]) + (XEiJ.regCCR >> 4);  //Xの左側はすべて0なのでCCR_X&を省略
 13045:       } else {  //ADDX.L -(Ar),-(Aq)
 13046:         XEiJ.mpuCycleCount += 2;
 13047:         m60Incremented -= 4L << (ea << 3);
 13048:         int a = m60Address = XEiJ.regRn[ea] -= 4;  //このr[ea]はアドレスレジスタ
 13049:         y = mmuReadLongData (a, XEiJ.regSRS);
 13050:         int aqq = XEiJ.regOC >> 9 & 15;
 13051:         m60Incremented -= 4L << (aqq << 3);
 13052:         a = m60Address = XEiJ.regRn[aqq] -= 4;
 13053:         mmuWriteLongData (a, z = (x = mmuModifyLongData (a, XEiJ.regSRS)) + y + (XEiJ.regCCR >> 4), XEiJ.regSRS);  //Xの左側はすべて0なのでCCR_X&を省略
 13054:       }
 13055:       XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_Z : 0) |
 13056:              ((x ^ z) & (y ^ z)) >>> 31 << 1 |
 13057:              ((x | y) ^ (x ^ y) & z) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C));  //ccr_addx
 13058:     } else {  //ADD.L Dq,<ea>
 13059:       XEiJ.mpuCycleCount++;
 13060:       int a = efaMltLong (ea);
 13061:       int x;
 13062:       int y;
 13063:       int z;
 13064:       mmuWriteLongData (a, z = (x = mmuModifyLongData (a, XEiJ.regSRS)) + (y = XEiJ.regRn[XEiJ.regOC >> 9 & 7]), XEiJ.regSRS);
 13065:       XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) |
 13066:              ((x ^ z) & (y ^ z)) >>> 31 << 1 |
 13067:              ((x | y) ^ (x ^ y) & z) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C));  //ccr_add
 13068:     }
 13069:   }  //irpAddToMemLong
 13070: 
 13071:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 13072:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 13073:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 13074:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 13075:   //ADDA.L <ea>,Aq                                  |-|012346|-|-----|-----|DAM+-WXZPI|1101_qqq_111_mmm_rrr
 13076:   //ADD.L <ea>,Aq                                   |A|012346|-|-----|-----|DAM+-WXZPI|1101_qqq_111_mmm_rrr [ADDA.L <ea>,Aq]
 13077:   public static void irpAddaLong () throws M68kException {
 13078:     int ea = XEiJ.regOC & 63;
 13079:     XEiJ.mpuCycleCount++;
 13080:     int z = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS) : mmuReadLongData (efaAnyLong (ea), XEiJ.regSRS);  //このr[ea]はデータレジスタまたはアドレスレジスタ。pcls。イミディエイトを分離。ここでAqが変化する可能性があることに注意
 13081:     XEiJ.regRn[XEiJ.regOC >> 9 & 15] += z;  //r[op >> 9 & 15] += ea < XEiJ.EA_MM ? r[ea] : rls (efaAnyLong (ea));は不可
 13082:     //ccrは変化しない
 13083:   }  //irpAddaLong
 13084: 
 13085:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 13086:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 13087:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 13088:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 13089:   //ASR.B #<data>,Dr                                |-|012346|-|UUUUU|***0*|          |1110_qqq_000_000_rrr
 13090:   //LSR.B #<data>,Dr                                |-|012346|-|UUUUU|***0*|          |1110_qqq_000_001_rrr
 13091:   //ROXR.B #<data>,Dr                               |-|012346|-|*UUUU|***0*|          |1110_qqq_000_010_rrr
 13092:   //ROR.B #<data>,Dr                                |-|012346|-|-UUUU|-**0*|          |1110_qqq_000_011_rrr
 13093:   //ASR.B Dq,Dr                                     |-|012346|-|UUUUU|***0*|          |1110_qqq_000_100_rrr
 13094:   //LSR.B Dq,Dr                                     |-|012346|-|UUUUU|***0*|          |1110_qqq_000_101_rrr
 13095:   //ROXR.B Dq,Dr                                    |-|012346|-|*UUUU|***0*|          |1110_qqq_000_110_rrr
 13096:   //ROR.B Dq,Dr                                     |-|012346|-|-UUUU|-**0*|          |1110_qqq_000_111_rrr
 13097:   //ASR.B Dr                                        |A|012346|-|UUUUU|***0*|          |1110_001_000_000_rrr [ASR.B #1,Dr]
 13098:   //LSR.B Dr                                        |A|012346|-|UUUUU|***0*|          |1110_001_000_001_rrr [LSR.B #1,Dr]
 13099:   //ROXR.B Dr                                       |A|012346|-|*UUUU|***0*|          |1110_001_000_010_rrr [ROXR.B #1,Dr]
 13100:   //ROR.B Dr                                        |A|012346|-|-UUUU|-**0*|          |1110_001_000_011_rrr [ROR.B #1,Dr]
 13101:   //
 13102:   //ASR.B #<data>,Dr
 13103:   //ASR.B Dq,Dr
 13104:   //  算術右シフトバイト
 13105:   //       ........................アイウエオカキク XNZVC
 13106:   //     0 ........................アイウエオカキク Xア*00 Z=アイウエオカキク==0
 13107:   //     1 ........................アアイウエオカキ クア*0ク Z=アイウエオカキ==0
 13108:   //     2 ........................アアアイウエオカ キア*0キ Z=アイウエオカ==0
 13109:   //     3 ........................アアアアイウエオ カア*0カ Z=アイウエオ==0
 13110:   //     4 ........................アアアアアイウエ オア*0オ Z=アイウエ==0
 13111:   //     5 ........................アアアアアアイウ エア*0エ Z=アイウ==0
 13112:   //     6 ........................アアアアアアアイ ウア*0ウ Z=アイ==0
 13113:   //     7 ........................アアアアアアアア イア*0イ Z=ア==0
 13114:   //     8 ........................アアアアアアアア アア*0ア Z=ア==0
 13115:   //  CCR
 13116:   //    X  countが0のとき変化しない。他は最後に押し出されたビット
 13117:   //    N  結果の最上位ビット
 13118:   //    Z  結果が0のときセット。他はクリア
 13119:   //    V  常にクリア
 13120:   //    C  countが0のときクリア。他は最後に押し出されたビット
 13121:   //
 13122:   //LSR.B #<data>,Dr
 13123:   //LSR.B Dq,Dr
 13124:   //  論理右シフトバイト
 13125:   //       ........................アイウエオカキク XNZVC
 13126:   //     0 ........................アイウエオカキク Xア*00 Z=アイウエオカキク==0
 13127:   //     1 ........................0アイウエオカキ ク0*0ク Z=アイウエオカキ==0
 13128:   //     2 ........................00アイウエオカ キ0*0キ Z=アイウエオカ==0
 13129:   //     3 ........................000アイウエオ カ0*0カ Z=アイウエオ==0
 13130:   //     4 ........................0000アイウエ オ0*0オ Z=アイウエ==0
 13131:   //     5 ........................00000アイウ エ0*0エ Z=アイウ==0
 13132:   //     6 ........................000000アイ ウ0*0ウ Z=アイ==0
 13133:   //     7 ........................0000000ア イ0*0イ Z=ア==0
 13134:   //     8 ........................00000000 ア010ア
 13135:   //     9 ........................00000000 00100
 13136:   //  CCR
 13137:   //    X  countが0のとき変化しない。他は最後に押し出されたビット
 13138:   //    N  結果の最上位ビット
 13139:   //    Z  結果が0のときセット。他はクリア
 13140:   //    V  常にクリア
 13141:   //    C  countが0のときクリア。他は最後に押し出されたビット
 13142:   //
 13143:   //ROR.B #<data>,Dr
 13144:   //ROR.B Dq,Dr
 13145:   //  右ローテートバイト
 13146:   //       ........................アイウエオカキク XNZVC
 13147:   //     0 ........................アイウエオカキク Xア*00 Z=アイウエオカキク==0
 13148:   //     1 ........................クアイウエオカキ Xク*0ク Z=アイウエオカキク==0
 13149:   //     :
 13150:   //     7 ........................イウエオカキクア Xイ*0イ Z=アイウエオカキク==0
 13151:   //     8 ........................アイウエオカキク Xア*0ア Z=アイウエオカキク==0
 13152:   //  CCR
 13153:   //    X  常に変化しない
 13154:   //    N  結果の最上位ビット
 13155:   //    Z  結果が0のときセット。他はクリア
 13156:   //    V  常にクリア
 13157:   //    C  countが0のときクリア。他は結果の最上位ビット
 13158:   //
 13159:   //ROXR.B #<data>,Dr
 13160:   //ROXR.B Dq,Dr
 13161:   //  拡張右ローテートバイト
 13162:   //       ........................アイウエオカキク XNZVC
 13163:   //     0 ........................アイウエオカキク Xア*0X Z=アイウエオカキク==0
 13164:   //     1 ........................Xアイウエオカキ クX*0ク Z=アイウエオカキX==0
 13165:   //     2 ........................クXアイウエオカ キク*0キ Z=アイウエオカクX==0
 13166:   //     3 ........................キクXアイウエオ カキ*0カ Z=アイウエオキクX==0
 13167:   //     4 ........................カキクXアイウエ オカ*0オ Z=アイウエカキクX==0
 13168:   //     5 ........................オカキクXアイウ エオ*0エ Z=アイウオカキクX==0
 13169:   //     6 ........................エオカキクXアイ ウエ*0ウ Z=アイエオカキクX==0
 13170:   //     7 ........................ウエオカキクXア イウ*0イ Z=アウエオカキクX==0
 13171:   //     8 ........................イウエオカキクX アイ*0ア Z=イウエオカキクX==0
 13172:   //     9 ........................アイウエオカキク Xア*0X Z=アイウエオカキク==0
 13173:   //  CCR
 13174:   //    X  countが0のとき変化しない。他は最後に押し出されたビット
 13175:   //    N  結果の最上位ビット
 13176:   //    Z  結果が0のときセット。他はクリア
 13177:   //    V  常にクリア
 13178:   //    C  countが0のときXのコピー。他は最後に押し出されたビット
 13179:   public static void irpXxrToRegByte () throws M68kException {
 13180:     int rrr;
 13181:     int x = XEiJ.regRn[rrr = XEiJ.regOC & 7];
 13182:     int y;
 13183:     int z;
 13184:     int t;
 13185:     XEiJ.mpuCycleCount++;
 13186:     switch (XEiJ.regOC >> 3 & 0b111_000 >> 3) {
 13187:     case 0b000_000 >> 3:  //ASR.B #<data>,Dr
 13188:       y = (XEiJ.regOC >> 9) - 1 & 7;  //y=data-1=1-1~8-1
 13189:       XEiJ.regRn[rrr] = ~0xff & x | 0xff & (z = (t = (byte) x >> y) >> 1);
 13190:       XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | -(t & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C);  //XとCは最後に押し出されたビット
 13191:       break;
 13192:     case 0b001_000 >> 3:  //LSR.B #<data>,Dr
 13193:       y = (XEiJ.regOC >> 9) - 1 & 7;  //y=data-1=1-1~8-1
 13194:       XEiJ.regRn[rrr] = ~0xff & x | (z = (t = (0xff & x) >>> y) >>> 1);
 13195:       XEiJ.regCCR = (z == 0 ? XEiJ.REG_CCR_Z : 0) | -(t & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C);  //XとCは最後に押し出されたビット
 13196:       break;
 13197:     case 0b010_000 >> 3:  //ROXR.B #<data>,Dr
 13198:       y = (XEiJ.regOC >> 9) - 1 & 7;  //y=data-1=1-1~8-1
 13199:       z = (XEiJ.regCCR & XEiJ.REG_CCR_X) << 7 - 4 | (0xff & x) >>> 1;
 13200:       if (y == 1 - 1) {  //y=data-1=1-1
 13201:         t = x;
 13202:       } else {  //y=data-1=2-1~8-1
 13203:         z = x << 9 - 1 - y | (t = z >>> y - (2 - 1)) >>> 1;
 13204:       }
 13205:       XEiJ.regRn[rrr] = ~0xff & x | 0xff & (z = (byte) z);
 13206:       XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | -(t & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C);  //XとCは最後に押し出されたビット
 13207:       break;
 13208:     case 0b011_000 >> 3:  //ROR.B #<data>,Dr
 13209:       y = XEiJ.regOC >> 9 & 7;  //y=data&7
 13210:       XEiJ.regRn[rrr] = ~0xff & x | 0xff & (z = (byte) (x << 8 - y | (0xff & x) >>> y));
 13211:       XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | z >>> 7 & 1;  //Xは変化しない。Cは結果の最上位ビット
 13212:       break;
 13213:     case 0b100_000 >> 3:  //ASR.B Dq,Dr
 13214:       y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63;  //y=0~63。Javaのシフト演算子は5ビットでマスクされることに注意
 13215:       if (y == 0) {  //y=data=0
 13216:         z = (byte) x;
 13217:         t = XEiJ.regCCR & XEiJ.REG_CCR_X;  //Xは変化しない。Cはクリア
 13218:       } else {  //y=data=1~63
 13219:         XEiJ.regRn[rrr] = ~0xff & x | 0xff & (z = (t = (byte) x >> (y <= 8 ? y - 1 : 7)) >> 1);
 13220:         t = -(t & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C);  //XとCは最後に押し出されたビット
 13221:       }
 13222:       XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | t;
 13223:       break;
 13224:     case 0b101_000 >> 3:  //LSR.B Dq,Dr
 13225:       y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63;  //y=0~63。Javaのシフト演算子は5ビットでマスクされることに注意
 13226:       if (y == 0) {  //y=data=0
 13227:         z = (byte) x;
 13228:         XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (z < 0 ? XEiJ.REG_CCR_N : z == 0 ? XEiJ.REG_CCR_Z : 0);  //Xは変化しない。Cはクリア
 13229:       } else {  //y=data=1~63
 13230:         XEiJ.regRn[rrr] = ~0xff & x | (z = (t = y <= 8 ? (0xff & x) >>> y - 1 : 0) >>> 1);
 13231:         XEiJ.regCCR = (z == 0 ? XEiJ.REG_CCR_Z : 0) | -(t & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C);  //XとCは最後に押し出されたビット
 13232:       }
 13233:       break;
 13234:     case 0b110_000 >> 3:  //ROXR.B Dq,Dr
 13235:       y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63;  //y=0~63。Javaのシフト演算子は5ビットでマスクされることに注意
 13236:       //y %= 9;
 13237:       y = (y & 7) - (y >> 3);  //y=data=-7~7
 13238:       y += y >> 3 & 9;  //y=data=0~8
 13239:       if (y == 0) {  //y=data=0
 13240:         z = (byte) x;
 13241:         t = -(XEiJ.regCCR >> 4 & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C);  //Xは変化しない。CはXのコピー
 13242:       } else {  //y=data=1~8
 13243:         z = (XEiJ.regCCR & XEiJ.REG_CCR_X) << 7 - 4 | (0xff & x) >>> 1;
 13244:         if (y == 1) {  //y=data=1
 13245:           t = x;  //Cは最後に押し出されたビット
 13246:         } else {  //y=data=2~8
 13247:           z = x << 9 - y | (t = z >>> y - 2) >>> 1;
 13248:         }
 13249:         XEiJ.regRn[rrr] = ~0xff & x | 0xff & (z = (byte) z);
 13250:         t = -(t & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C);  //XとCは最後に押し出されたビット
 13251:       }
 13252:       XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | t;
 13253:       break;
 13254:     case 0b111_000 >> 3:  //ROR.B Dq,Dr
 13255:     default:
 13256:       y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63;  //y=0~63。Javaのシフト演算子は5ビットでマスクされることに注意
 13257:       if (y == 0) {
 13258:         z = (byte) x;
 13259:         t = 0;  //Cはクリア
 13260:       } else {
 13261:         y &= 7;  //y=data=0~7
 13262:         XEiJ.regRn[rrr] = ~0xff & x | 0xff & (z = (byte) (x << 8 - y | (0xff & x) >>> y));
 13263:         t = z >>> 7 & 1;  //Cは結果の最上位ビット
 13264:       }
 13265:       XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | t;  //Xは変化しない
 13266:     }
 13267:   }  //irpXxrToRegByte
 13268: 
 13269:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 13270:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 13271:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 13272:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 13273:   //ASR.W #<data>,Dr                                |-|012346|-|UUUUU|***0*|          |1110_qqq_001_000_rrr
 13274:   //LSR.W #<data>,Dr                                |-|012346|-|UUUUU|***0*|          |1110_qqq_001_001_rrr
 13275:   //ROXR.W #<data>,Dr                               |-|012346|-|*UUUU|***0*|          |1110_qqq_001_010_rrr
 13276:   //ROR.W #<data>,Dr                                |-|012346|-|-UUUU|-**0*|          |1110_qqq_001_011_rrr
 13277:   //ASR.W Dq,Dr                                     |-|012346|-|UUUUU|***0*|          |1110_qqq_001_100_rrr
 13278:   //LSR.W Dq,Dr                                     |-|012346|-|UUUUU|***0*|          |1110_qqq_001_101_rrr
 13279:   //ROXR.W Dq,Dr                                    |-|012346|-|*UUUU|***0*|          |1110_qqq_001_110_rrr
 13280:   //ROR.W Dq,Dr                                     |-|012346|-|-UUUU|-**0*|          |1110_qqq_001_111_rrr
 13281:   //ASR.W Dr                                        |A|012346|-|UUUUU|***0*|          |1110_001_001_000_rrr [ASR.W #1,Dr]
 13282:   //LSR.W Dr                                        |A|012346|-|UUUUU|***0*|          |1110_001_001_001_rrr [LSR.W #1,Dr]
 13283:   //ROXR.W Dr                                       |A|012346|-|*UUUU|***0*|          |1110_001_001_010_rrr [ROXR.W #1,Dr]
 13284:   //ROR.W Dr                                        |A|012346|-|-UUUU|-**0*|          |1110_001_001_011_rrr [ROR.W #1,Dr]
 13285:   //
 13286:   //ASR.W #<data>,Dr
 13287:   //ASR.W Dq,Dr
 13288:   //ASR.W <ea>
 13289:   //  算術右シフトワード
 13290:   //       ................アイウエオカキクケコサシスセソタ XNZVC
 13291:   //     0 ................アイウエオカキクケコサシスセソタ Xア*00 Z=アイウエオカキクケコサシスセソタ==0
 13292:   //     1 ................アアイウエオカキクケコサシスセソ タア*0タ Z=アイウエオカキクケコサシスセソ==0
 13293:   //     :
 13294:   //    15 ................アアアアアアアアアアアアアアアア イア*0イ Z=ア==0
 13295:   //    16 ................アアアアアアアアアアアアアアアア アア*0ア Z=ア==0
 13296:   //  CCR
 13297:   //    X  countが0のとき変化しない。他は最後に押し出されたビット
 13298:   //    N  結果の最上位ビット
 13299:   //    Z  結果が0のときセット。他はクリア
 13300:   //    V  常にクリア
 13301:   //    C  countが0のときクリア。他は最後に押し出されたビット
 13302:   //
 13303:   //LSR.W #<data>,Dr
 13304:   //LSR.W Dq,Dr
 13305:   //LSR.W <ea>
 13306:   //  論理右シフトワード
 13307:   //       ................アイウエオカキクケコサシスセソタ XNZVC
 13308:   //     0 ................アイウエオカキクケコサシスセソタ Xア*00 Z=アイウエオカキクケコサシスセソタ==0
 13309:   //     1 ................0アイウエオカキクケコサシスセソ タ0*0タ Z=アイウエオカキクケコサシスセソ==0
 13310:   //     :
 13311:   //    15 ................000000000000000ア イ0*0イ Z=ア==0
 13312:   //    16 ................0000000000000000 ア010ア
 13313:   //    17 ................0000000000000000 00100
 13314:   //  CCR
 13315:   //    X  countが0のとき変化しない。他は最後に押し出されたビット
 13316:   //    N  結果の最上位ビット
 13317:   //    Z  結果が0のときセット。他はクリア
 13318:   //    V  常にクリア
 13319:   //    C  countが0のときクリア。他は最後に押し出されたビット
 13320:   //
 13321:   //ROR.W #<data>,Dr
 13322:   //ROR.W Dq,Dr
 13323:   //ROR.W <ea>
 13324:   //  右ローテートワード
 13325:   //       ................アイウエオカキクケコサシスセソタ XNZVC
 13326:   //     0 ................アイウエオカキクケコサシスセソタ Xア*00 Z=アイウエオカキクケコサシスセソタ==0
 13327:   //     1 ................タアイウエオカキクケコサシスセソ Xタ*0タ Z=アイウエオカキクケコサシスセソタ==0
 13328:   //     :
 13329:   //    15 ................イウエオカキクケコサシスセソタア Xイ*0イ Z=アイウエオカキクケコサシスセソタ==0
 13330:   //    16 ................アイウエオカキクケコサシスセソタ Xア*0ア Z=アイウエオカキクケコサシスセソタ==0
 13331:   //  CCR
 13332:   //    X  常に変化しない
 13333:   //    N  結果の最上位ビット
 13334:   //    Z  結果が0のときセット。他はクリア
 13335:   //    V  常にクリア
 13336:   //    C  countが0のときクリア。他は結果の最上位ビット
 13337:   //
 13338:   //ROXR.W #<data>,Dr
 13339:   //ROXR.W Dq,Dr
 13340:   //ROXR.W <ea>
 13341:   //  拡張右ローテートワード
 13342:   //       ................アイウエオカキクケコサシスセソタ XNZVC
 13343:   //     0 ................アイウエオカキクケコサシスセソタ Xア*0X Z=アイウエオカキクケコサシスセソタ==0
 13344:   //     1 ................Xアイウエオカキクケコサシスセソ タX*0タ Z=アイウエオカキクケコサシスセソX==0
 13345:   //     2 ................タXアイウエオカキクケコサシスセ ソタ*0ソ Z=アイウエオカキクケコサシスセタX==0
 13346:   //     :
 13347:   //    15 ................ウエオカキクケコサシスセソタXア イウ*0イ Z=アウエオカキクケコサシスセソタX==0
 13348:   //    16 ................イウエオカキクケコサシスセソタX アイ*0ア Z=イウエオカキクケコサシスセソタX==0
 13349:   //    17 ................アイウエオカキクケコサシスセソタ Xア*0X Z=アイウエオカキクケコサシスセソタ==0
 13350:   //  CCR
 13351:   //    X  countが0のとき変化しない。他は最後に押し出されたビット
 13352:   //    N  結果の最上位ビット
 13353:   //    Z  結果が0のときセット。他はクリア
 13354:   //    V  常にクリア
 13355:   //    C  countが0のときXのコピー。他は最後に押し出されたビット
 13356:   public static void irpXxrToRegWord () throws M68kException {
 13357:     int rrr;
 13358:     int x = XEiJ.regRn[rrr = XEiJ.regOC & 7];
 13359:     int y;
 13360:     int z;
 13361:     int t;
 13362:     XEiJ.mpuCycleCount++;
 13363:     switch (XEiJ.regOC >> 3 & 0b111_000 >> 3) {
 13364:     case 0b000_000 >> 3:  //ASR.W #<data>,Dr
 13365:       y = (XEiJ.regOC >> 9) - 1 & 7;  //y=data-1=1-1~8-1
 13366:       XEiJ.regRn[rrr] = ~0xffff & x | (char) (z = (t = (short) x >> y) >> 1);
 13367:       XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | -(t & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C);  //XとCは最後に押し出されたビット
 13368:       break;
 13369:     case 0b001_000 >> 3:  //LSR.W #<data>,Dr
 13370:       y = (XEiJ.regOC >> 9) - 1 & 7;  //y=data-1=1-1~8-1
 13371:       XEiJ.regRn[rrr] = ~0xffff & x | (z = (t = (char) x >>> y) >>> 1);
 13372:       XEiJ.regCCR = (z == 0 ? XEiJ.REG_CCR_Z : 0) | -(t & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C);  //XとCは最後に押し出されたビット
 13373:       break;
 13374:     case 0b010_000 >> 3:  //ROXR.W #<data>,Dr
 13375:       y = (XEiJ.regOC >> 9) - 1 & 7;  //y=data-1=1-1~8-1
 13376:       z = (XEiJ.regCCR & XEiJ.REG_CCR_X) << 15 - 4 | (char) x >>> 1;
 13377:       if (y == 1 - 1) {  //y=data-1=1-1
 13378:         t = x;
 13379:       } else {  //y=data-1=2-1~8-1
 13380:         z = x << 17 - 1 - y | (t = z >>> y - (2 - 1)) >>> 1;
 13381:       }
 13382:       XEiJ.regRn[rrr] = ~0xffff & x | (char) (z = (short) z);
 13383:       XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | -(t & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C);  //XとCは最後に押し出されたビット
 13384:       break;
 13385:     case 0b011_000 >> 3:  //ROR.W #<data>,Dr
 13386:       y = (XEiJ.regOC >> 9) - 1 & 7;  //y=data-1=1-1~8-1
 13387:       XEiJ.regRn[rrr] = ~0xffff & x | (char) (z = (short) (x << 16 - 1 - y | (char) x >>> y + 1));
 13388:       XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | z >>> 15 & 1;  //Xは変化しない。Cは結果の最上位ビット
 13389:       break;
 13390:     case 0b100_000 >> 3:  //ASR.W Dq,Dr
 13391:       y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63;  //y=0~63。Javaのシフト演算子は5ビットでマスクされることに注意
 13392:       if (y == 0) {  //y=data=0
 13393:         z = (short) x;
 13394:         t = XEiJ.regCCR & XEiJ.REG_CCR_X;  //Xは変化しない。Cはクリア
 13395:       } else {  //y=data=1~63
 13396:         XEiJ.regRn[rrr] = ~0xffff & x | (char) (z = (t = (short) x >> (y <= 16 ? y - 1 : 15)) >> 1);
 13397:         t = -(t & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C);  //XとCは最後に押し出されたビット
 13398:       }
 13399:       XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | t;
 13400:       break;
 13401:     case 0b101_000 >> 3:  //LSR.W Dq,Dr
 13402:       y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63;  //y=0~63。Javaのシフト演算子は5ビットでマスクされることに注意
 13403:       if (y == 0) {  //y=data=0
 13404:         z = (short) x;
 13405:         XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (z < 0 ? XEiJ.REG_CCR_N : z == 0 ? XEiJ.REG_CCR_Z : 0);  //Xは変化しない。Cはクリア
 13406:       } else {  //y=data=1~63
 13407:         XEiJ.regRn[rrr] = ~0xffff & x | (z = (t = y <= 16 ? (char) x >>> y - 1 : 0) >>> 1);
 13408:         XEiJ.regCCR = (z == 0 ? XEiJ.REG_CCR_Z : 0) | -(t & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C);  //XとCは最後に押し出されたビット
 13409:       }
 13410:       break;
 13411:     case 0b110_000 >> 3:  //ROXR.W Dq,Dr
 13412:       y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63;  //y=0~63。Javaのシフト演算子は5ビットでマスクされることに注意
 13413:       //y %= 17;
 13414:       y = (y & 15) - (y >> 4);  //y=data=-3~15
 13415:       y += y >> 4 & 17;  //y=data=0~16
 13416:       if (y == 0) {  //y=data=0
 13417:         z = (short) x;
 13418:         t = -(XEiJ.regCCR >> 4 & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C);  //Xは変化しない。CはXのコピー
 13419:       } else {  //y=data=1~16
 13420:         z = (XEiJ.regCCR & XEiJ.REG_CCR_X) << 15 - 4 | (char) x >>> 1;
 13421:         if (y == 1) {  //y=data=1
 13422:           t = x;  //Cは最後に押し出されたビット
 13423:         } else {  //y=data=2~16
 13424:           z = x << 17 - y | (t = z >>> y - 2) >>> 1;
 13425:         }
 13426:         XEiJ.regRn[rrr] = ~0xffff & x | (char) (z = (short) z);
 13427:         t = -(t & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C);  //XとCは最後に押し出されたビット
 13428:       }
 13429:       XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | t;
 13430:       break;
 13431:     case 0b111_000 >> 3:  //ROR.W Dq,Dr
 13432:     default:
 13433:       y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63;  //y=0~63。Javaのシフト演算子は5ビットでマスクされることに注意
 13434:       if (y == 0) {
 13435:         z = (short) x;
 13436:         t = 0;  //Cはクリア
 13437:       } else {
 13438:         y &= 15;  //y=data=0~15
 13439:         XEiJ.regRn[rrr] = ~0xffff & x | (char) (z = (short) (x << 16 - y | (char) x >>> y));
 13440:         t = z >>> 15 & 1;  //Cは結果の最上位ビット
 13441:       }
 13442:       XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | t;  //Xは変化しない
 13443:     }
 13444:   }  //irpXxrToRegWord
 13445: 
 13446:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 13447:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 13448:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 13449:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 13450:   //ASR.L #<data>,Dr                                |-|012346|-|UUUUU|***0*|          |1110_qqq_010_000_rrr
 13451:   //LSR.L #<data>,Dr                                |-|012346|-|UUUUU|***0*|          |1110_qqq_010_001_rrr
 13452:   //ROXR.L #<data>,Dr                               |-|012346|-|*UUUU|***0*|          |1110_qqq_010_010_rrr
 13453:   //ROR.L #<data>,Dr                                |-|012346|-|-UUUU|-**0*|          |1110_qqq_010_011_rrr
 13454:   //ASR.L Dq,Dr                                     |-|012346|-|UUUUU|***0*|          |1110_qqq_010_100_rrr
 13455:   //LSR.L Dq,Dr                                     |-|012346|-|UUUUU|***0*|          |1110_qqq_010_101_rrr
 13456:   //ROXR.L Dq,Dr                                    |-|012346|-|*UUUU|***0*|          |1110_qqq_010_110_rrr
 13457:   //ROR.L Dq,Dr                                     |-|012346|-|-UUUU|-**0*|          |1110_qqq_010_111_rrr
 13458:   //ASR.L Dr                                        |A|012346|-|UUUUU|***0*|          |1110_001_010_000_rrr [ASR.L #1,Dr]
 13459:   //LSR.L Dr                                        |A|012346|-|UUUUU|***0*|          |1110_001_010_001_rrr [LSR.L #1,Dr]
 13460:   //ROXR.L Dr                                       |A|012346|-|*UUUU|***0*|          |1110_001_010_010_rrr [ROXR.L #1,Dr]
 13461:   //ROR.L Dr                                        |A|012346|-|-UUUU|-**0*|          |1110_001_010_011_rrr [ROR.L #1,Dr]
 13462:   //
 13463:   //ASR.L #<data>,Dr
 13464:   //ASR.L Dq,Dr
 13465:   //  算術右シフトロング
 13466:   //       アイウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマミ XNZVC
 13467:   //     0 アイウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマミ Xア*00 Z=アイウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマミ==0
 13468:   //     1 アアイウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマ ミア*0ミ Z=アイウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマ==0
 13469:   //     :
 13470:   //    31 アアアアアアアアアアアアアアアアアアアアアアアアアアアアアアアア イア*0イ Z=ア==0
 13471:   //    32 アアアアアアアアアアアアアアアアアアアアアアアアアアアアアアアア アア*0ア Z=ア==0
 13472:   //  CCR
 13473:   //    X  countが0のとき変化しない。他は最後に押し出されたビット
 13474:   //    N  結果の最上位ビット
 13475:   //    Z  結果が0のときセット。他はクリア
 13476:   //    V  常にクリア
 13477:   //    C  countが0のときクリア。他は最後に押し出されたビット
 13478:   //
 13479:   //LSR.L #<data>,Dr
 13480:   //LSR.L Dq,Dr
 13481:   //  論理右シフトロング
 13482:   //       アイウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマミ XNZVC
 13483:   //     0 アイウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマミ Xア*00 Z=アイウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマミ==0
 13484:   //     1 0アイウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマ ミ0*0ミ Z=アイウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマ==0
 13485:   //     :
 13486:   //    31 0000000000000000000000000000000ア イ0*0イ Z=ア==0
 13487:   //    32 00000000000000000000000000000000 ア010ア
 13488:   //    33 00000000000000000000000000000000 00100
 13489:   //  CCR
 13490:   //    X  countが0のとき変化しない。他は最後に押し出されたビット
 13491:   //    N  結果の最上位ビット
 13492:   //    Z  結果が0のときセット。他はクリア
 13493:   //    V  常にクリア
 13494:   //    C  countが0のときクリア。他は最後に押し出されたビット
 13495:   //
 13496:   //ROR.L #<data>,Dr
 13497:   //ROR.L Dq,Dr
 13498:   //  右ローテートロング
 13499:   //       アイウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマミ XNZVC
 13500:   //     0 アイウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマミ Xア*00 Z=アイウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマミ==0
 13501:   //     1 ミアイウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマ Xミ*0ミ Z=アイウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマミ==0
 13502:   //     :
 13503:   //    31 イウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマミア Xイ*0イ Z=アイウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマミ==0
 13504:   //    32 アイウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマミ Xア*0ア Z=アイウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマミ==0
 13505:   //  CCR
 13506:   //    X  常に変化しない
 13507:   //    N  結果の最上位ビット
 13508:   //    Z  結果が0のときセット。他はクリア
 13509:   //    V  常にクリア
 13510:   //    C  countが0のときクリア。他は結果の最上位ビット
 13511:   //
 13512:   //ROXR.L #<data>,Dr
 13513:   //ROXR.L Dq,Dr
 13514:   //  拡張右ローテートロング
 13515:   //       アイウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマミ XNZVC
 13516:   //     0 アイウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマミ Xア*0X Z=アイウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマミ==0
 13517:   //     1 Xアイウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマ ミX*0ミ Z=アイウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマX==0
 13518:   //     2 ミXアイウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホ マミ*0マ Z=アイウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホミX==0
 13519:   //     :
 13520:   //    31 ウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマミXア イウ*0イ Z=アウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマミX==0
 13521:   //    32 イウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマミX アイ*0ア Z=イウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマミX==0
 13522:   //    33 アイウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマミ Xア*0X Z=アイウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマミ==0
 13523:   //  CCR
 13524:   //    X  countが0のとき変化しない。他は最後に押し出されたビット
 13525:   //    N  結果の最上位ビット
 13526:   //    Z  結果が0のときセット。他はクリア
 13527:   //    V  常にクリア
 13528:   //    C  countが0のときXのコピー。他は最後に押し出されたビット
 13529:   public static void irpXxrToRegLong () throws M68kException {
 13530:     int rrr;
 13531:     int x = XEiJ.regRn[rrr = XEiJ.regOC & 7];
 13532:     int y;
 13533:     int z;
 13534:     int t;
 13535:     XEiJ.mpuCycleCount++;
 13536:     switch (XEiJ.regOC >> 3 & 0b111_000 >> 3) {
 13537:     case 0b000_000 >> 3:  //ASR.L #<data>,Dr
 13538:       y = (XEiJ.regOC >> 9) - 1 & 7;  //y=data-1=1-1~8-1
 13539:       XEiJ.regRn[rrr] = z = (t = x >> y) >> 1;
 13540:       XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | -(t & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C);  //XとCは最後に押し出されたビット
 13541:       break;
 13542:     case 0b001_000 >> 3:  //LSR.L #<data>,Dr
 13543:       y = (XEiJ.regOC >> 9) - 1 & 7;  //y=data-1=1-1~8-1
 13544:       XEiJ.regRn[rrr] = z = (t = x >>> y) >>> 1;
 13545:       XEiJ.regCCR = (z == 0 ? XEiJ.REG_CCR_Z : 0) | -(t & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C);  //XとCは最後に押し出されたビット
 13546:       break;
 13547:     case 0b010_000 >> 3:  //ROXR.L #<data>,Dr
 13548:       y = (XEiJ.regOC >> 9) - 1 & 7;  //y=data-1=1-1~8-1
 13549:       z = (XEiJ.regCCR & XEiJ.REG_CCR_X) << 31 - 4 | x >>> 1;
 13550:       if (y == 1 - 1) {  //y=data-1=1-1
 13551:         t = x;
 13552:       } else {  //y=data-1=2-1~8-1
 13553:         z = x << -y | (t = z >>> y - (2 - 1)) >>> 1;  //Javaのシフト演算子は5ビットでマスクされるので33-1-yを-yに省略
 13554:       }
 13555:       XEiJ.regRn[rrr] = z;
 13556:       XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | -(t & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C);  //XとCは最後に押し出されたビット
 13557:       break;
 13558:     case 0b011_000 >> 3:  //ROR.L #<data>,Dr
 13559:       y = (XEiJ.regOC >> 9) - 1 & 7;  //y=data-1=1-1~8-1
 13560:       XEiJ.regRn[rrr] = z = x << ~y | x >>> y + 1;  //Javaのシフト演算子は5ビットでマスクされるので32-1-yを~yに省略
 13561:       XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | z >>> 31;  //Xは変化しない。Cは結果の最上位ビット
 13562:       break;
 13563:     case 0b100_000 >> 3:  //ASR.L Dq,Dr
 13564:       y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63;  //y=0~63。Javaのシフト演算子は5ビットでマスクされることに注意
 13565:       if (y == 0) {  //y=data=0
 13566:         z = x;
 13567:         t = XEiJ.regCCR & XEiJ.REG_CCR_X;  //Xは変化しない。Cはクリア
 13568:       } else {  //y=data=1~63
 13569:         XEiJ.regRn[rrr] = z = (t = x >> (y <= 32 ? y - 1 : 31)) >> 1;
 13570:         t = -(t & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C);  //XとCは最後に押し出されたビット
 13571:       }
 13572:       XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | t;
 13573:       break;
 13574:     case 0b101_000 >> 3:  //LSR.L Dq,Dr
 13575:       y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63;  //y=0~63。Javaのシフト演算子は5ビットでマスクされることに注意
 13576:       if (y == 0) {  //y=data=0
 13577:         z = x;
 13578:         XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (z < 0 ? XEiJ.REG_CCR_N : z == 0 ? XEiJ.REG_CCR_Z : 0);  //Xは変化しない。Cはクリア
 13579:       } else {  //y=data=1~63
 13580:         XEiJ.regRn[rrr] = z = (t = y <= 32 ? x >>> y - 1 : 0) >>> 1;
 13581:         XEiJ.regCCR = (z == 0 ? XEiJ.REG_CCR_Z : 0) | -(t & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C);  //XとCは最後に押し出されたビット
 13582:       }
 13583:       break;
 13584:     case 0b110_000 >> 3:  //ROXR.L Dq,Dr
 13585:       y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63;  //y=0~63。Javaのシフト演算子は5ビットでマスクされることに注意
 13586:       //y %= 33;
 13587:       y -= 32 - y >> 6 & 33;  //y=data=0~32
 13588:       if (y == 0) {  //y=data=0
 13589:         z = x;
 13590:         t = -(XEiJ.regCCR >> 4 & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C);  //Xは変化しない。CはXのコピー
 13591:       } else {  //y=data=1~32
 13592:         z = (XEiJ.regCCR & XEiJ.REG_CCR_X) << 31 - 4 | x >>> 1;
 13593:         if (y == 1) {  //y=data=1
 13594:           t = x;  //Cは最後に押し出されたビット
 13595:         } else {  //y=data=2~32
 13596:           z = x << 33 - y | (t = z >>> y - 2) >>> 1;
 13597:         }
 13598:         XEiJ.regRn[rrr] = z;
 13599:         t = -(t & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C);  //XとCは最後に押し出されたビット
 13600:       }
 13601:       XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | t;
 13602:       break;
 13603:     case 0b111_000 >> 3:  //ROR.L Dq,Dr
 13604:     default:
 13605:       y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63;  //y=0~63。Javaのシフト演算子は5ビットでマスクされることに注意
 13606:       if (y == 0) {
 13607:         z = x;
 13608:         t = 0;  //Cはクリア
 13609:       } else {
 13610:         y &= 31;  //y=data=0~31
 13611:         XEiJ.regRn[rrr] = z = x << -y | x >>> y;  //Javaのシフト演算子は5ビットでマスクされるので32-yを-yに省略。y=32のときx|xになるが問題ない
 13612:         t = z >>> 31;  //Cは結果の最上位ビット
 13613:       }
 13614:       XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | t;  //Xは変化しない
 13615:     }
 13616:   }  //irpXxrToRegLong
 13617: 
 13618:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 13619:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 13620:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 13621:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 13622:   //ASR.W <ea>                                      |-|012346|-|UUUUU|***0*|  M+-WXZ  |1110_000_011_mmm_rrr
 13623:   //
 13624:   //ASR.W #<data>,Dr
 13625:   //ASR.W Dq,Dr
 13626:   //ASR.W <ea>
 13627:   //  算術右シフトワード
 13628:   //       ................アイウエオカキクケコサシスセソタ XNZVC
 13629:   //     0 ................アイウエオカキクケコサシスセソタ Xア*00 Z=アイウエオカキクケコサシスセソタ==0
 13630:   //     1 ................アアイウエオカキクケコサシスセソ タア*0タ Z=アイウエオカキクケコサシスセソ==0
 13631:   //     :
 13632:   //    15 ................アアアアアアアアアアアアアアアア イア*0イ Z=ア==0
 13633:   //    16 ................アアアアアアアアアアアアアアアア アア*0ア Z=ア==0
 13634:   //  CCR
 13635:   //    X  countが0のとき変化しない。他は最後に押し出されたビット
 13636:   //    N  結果の最上位ビット
 13637:   //    Z  結果が0のときセット。他はクリア
 13638:   //    V  常にクリア
 13639:   //    C  countが0のときクリア。他は最後に押し出されたビット
 13640:   public static void irpAsrToMem () throws M68kException {
 13641:     XEiJ.mpuCycleCount++;
 13642:     int ea = XEiJ.regOC & 63;
 13643:     int a = efaMltWord (ea);
 13644:     int x = mmuModifyWordSignData (a, XEiJ.regSRS);
 13645:     int z = x >> 1;
 13646:     mmuWriteWordData (a, z, XEiJ.regSRS);
 13647:     XEiJ.regCCR = ((z < 0 ? XEiJ.REG_CCR_N : 0) |
 13648:                    (z == 0 ? XEiJ.REG_CCR_Z : 0) |
 13649:                    -(x & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C));  //XとCは最後に押し出されたビット
 13650:   }  //irpAsrToMem
 13651: 
 13652:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 13653:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 13654:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 13655:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 13656:   //ASL.B #<data>,Dr                                |-|012346|-|UUUUU|*****|          |1110_qqq_100_000_rrr
 13657:   //LSL.B #<data>,Dr                                |-|012346|-|UUUUU|***0*|          |1110_qqq_100_001_rrr
 13658:   //ROXL.B #<data>,Dr                               |-|012346|-|*UUUU|***0*|          |1110_qqq_100_010_rrr
 13659:   //ROL.B #<data>,Dr                                |-|012346|-|-UUUU|-**0*|          |1110_qqq_100_011_rrr
 13660:   //ASL.B Dq,Dr                                     |-|012346|-|UUUUU|*****|          |1110_qqq_100_100_rrr
 13661:   //LSL.B Dq,Dr                                     |-|012346|-|UUUUU|***0*|          |1110_qqq_100_101_rrr
 13662:   //ROXL.B Dq,Dr                                    |-|012346|-|*UUUU|***0*|          |1110_qqq_100_110_rrr
 13663:   //ROL.B Dq,Dr                                     |-|012346|-|-UUUU|-**0*|          |1110_qqq_100_111_rrr
 13664:   //ASL.B Dr                                        |A|012346|-|UUUUU|*****|          |1110_001_100_000_rrr [ASL.B #1,Dr]
 13665:   //LSL.B Dr                                        |A|012346|-|UUUUU|***0*|          |1110_001_100_001_rrr [LSL.B #1,Dr]
 13666:   //ROXL.B Dr                                       |A|012346|-|*UUUU|***0*|          |1110_001_100_010_rrr [ROXL.B #1,Dr]
 13667:   //ROL.B Dr                                        |A|012346|-|-UUUU|-**0*|          |1110_001_100_011_rrr [ROL.B #1,Dr]
 13668:   //
 13669:   //ASL.B #<data>,Dr
 13670:   //ASL.B Dq,Dr
 13671:   //  算術左シフトバイト
 13672:   //       ........................アイウエオカキク XNZVC
 13673:   //     0 ........................アイウエオカキク Xア*00 Z=アイウエオカキク==0
 13674:   //     1 ........................イウエオカキク0 アイ**ア Z=イウエオカキク==0,V=アイ!=0/-1
 13675:   //     :
 13676:   //     7 ........................ク0000000 キク**キ Z=ク==0,V=アイウエオカキク!=0/-1
 13677:   //     8 ........................00000000 ク01*ク V=アイウエオカキク!=0
 13678:   //     9 ........................00000000 001*0 V=アイウエオカキク!=0
 13679:   //  CCR
 13680:   //    X  countが0のとき変化しない。他は最後に押し出されたビット
 13681:   //    N  結果の最上位ビット
 13682:   //    Z  結果が0のときセット。他はクリア
 13683:   //    V  ASRで元に戻せないときセット。他はクリア
 13684:   //    C  countが0のときクリア。他は最後に押し出されたビット
 13685:   //
 13686:   //LSL.B #<data>,Dr
 13687:   //LSL.B Dq,Dr
 13688:   //  論理左シフトバイト
 13689:   //       ........................アイウエオカキク XNZVC
 13690:   //     0 ........................アイウエオカキク Xア*00 Z=アイウエオカキク==0
 13691:   //     1 ........................イウエオカキク0 アイ*0ア Z=イウエオカキク==0
 13692:   //     :
 13693:   //     7 ........................ク0000000 キク*0キ Z=ク==0
 13694:   //     8 ........................00000000 ク010ク
 13695:   //     9 ........................00000000 00100
 13696:   //  CCR
 13697:   //    X  countが0のとき変化しない。他は最後に押し出されたビット
 13698:   //    N  結果の最上位ビット
 13699:   //    Z  結果が0のときセット。他はクリア
 13700:   //    V  常にクリア
 13701:   //    C  countが0のときクリア。他は最後に押し出されたビット
 13702:   //
 13703:   //ROL.B #<data>,Dr
 13704:   //ROL.B Dq,Dr
 13705:   //  左ローテートバイト
 13706:   //       ........................アイウエオカキク XNZVC
 13707:   //     0 ........................アイウエオカキク Xア*00 Z=アイウエオカキク==0
 13708:   //     1 ........................イウエオカキクア Xイ*0ア Z=アイウエオカキク==0
 13709:   //     :
 13710:   //     7 ........................クアイウエオカキ Xク*0キ Z=アイウエオカキク==0
 13711:   //     8 ........................アイウエオカキク Xア*0ク Z=アイウエオカキク==0
 13712:   //  CCR
 13713:   //    X  常に変化しない
 13714:   //    N  結果の最上位ビット
 13715:   //    Z  結果が0のときセット。他はクリア
 13716:   //    V  常にクリア
 13717:   //    C  countが0のときクリア。他は結果の最下位ビット
 13718:   //
 13719:   //ROXL.B #<data>,Dr
 13720:   //ROXL.B Dq,Dr
 13721:   //  拡張左ローテートバイト
 13722:   //       ........................アイウエオカキク XNZVC
 13723:   //     0 ........................アイウエオカキク Xア*0X Z=アイウエオカキク==0
 13724:   //     1 ........................イウエオカキクX アイ*0ア Z=イウエオカキクX==0
 13725:   //     2 ........................ウエオカキクXア イウ*0イ Z=アウエオカキクX==0
 13726:   //     :
 13727:   //     7 ........................クXアイウエオカ キク*0キ Z=アイウエオカクX==0
 13728:   //     8 ........................Xアイウエオカキ クX*0ク Z=アイウエオカキX==0
 13729:   //     9 ........................アイウエオカキク Xア*0X Z=アイウエオカキク==0
 13730:   //  CCR
 13731:   //    X  countが0のとき変化しない。他は最後に押し出されたビット
 13732:   //    N  結果の最上位ビット
 13733:   //    Z  結果が0のときセット。他はクリア
 13734:   //    V  常にクリア
 13735:   //    C  countが0のときXのコピー。他は最後に押し出されたビット
 13736:   public static void irpXxlToRegByte () throws M68kException {
 13737:     int rrr;
 13738:     int x = XEiJ.regRn[rrr = XEiJ.regOC & 7];
 13739:     int y;
 13740:     int z;
 13741:     int t;
 13742:     XEiJ.mpuCycleCount++;
 13743:     switch (XEiJ.regOC >> 3 & 0b111_000 >> 3) {
 13744:     case 0b000_000 >> 3:  //ASL.B #<data>,Dr
 13745:       y = (XEiJ.regOC >> 9) - 1 & 7;  //y=data-1=1-1~8-1
 13746:       XEiJ.regRn[rrr] = ~0xff & x | 0xff & (z = (byte) ((t = x << y) << 1));
 13747:       XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | (z >> y + 1 != (byte) x ? XEiJ.REG_CCR_V : 0) | (byte) t >> 7 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C);  //VはASRで元に戻せないときセット。XとCは最後に押し出されたビット
 13748:       break;
 13749:     case 0b001_000 >> 3:  //LSL.B #<data>,Dr
 13750:       y = (XEiJ.regOC >> 9) - 1 & 7;  //y=data-1=1-1~8-1
 13751:       XEiJ.regRn[rrr] = ~0xff & x | 0xff & (z = (byte) ((t = x << y) << 1));
 13752:       XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | (byte) t >> 7 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C);  //XとCは最後に押し出されたビット
 13753:       break;
 13754:     case 0b010_000 >> 3:  //ROXL.B #<data>,Dr
 13755:       y = (XEiJ.regOC >> 9) - 1 & 7;  //y=data-1=1-1~8-1
 13756:       z = x << 1 | XEiJ.regCCR >> 4 & 1;
 13757:       if (y == 1 - 1) {  //y=data-1=1-1
 13758:         t = x;
 13759:       } else {  //y=data-1=2-1~8-1
 13760:         z = (t = z << y - (2 - 1)) << 1 | (0xff & x) >>> 9 - 1 - y;
 13761:       }
 13762:       XEiJ.regRn[rrr] = ~0xff & x | 0xff & (z = (byte) z);
 13763:       XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | (byte) t >> 7 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C);  //XとCは最後に押し出されたビット
 13764:       break;
 13765:     case 0b011_000 >> 3:  //ROL.B #<data>,Dr
 13766:       y = XEiJ.regOC >> 9 & 7;  //y=data&7
 13767:       XEiJ.regRn[rrr] = ~0xff & x | 0xff & (z = (byte) (x << y | (0xff & x) >>> 8 - y));
 13768:       XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | z & 1;  //Xは変化しない。Cは結果の最下位ビット
 13769:       break;
 13770:     case 0b100_000 >> 3:  //ASL.B Dq,Dr
 13771:       y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63;  //y=0~63。Javaのシフト演算子は5ビットでマスクされることに注意
 13772:       if (y <= 7) {  //y=data=0~7
 13773:         if (y == 0) {  //y=data=0
 13774:           z = (byte) x;
 13775:           t = XEiJ.regCCR & XEiJ.REG_CCR_X;  //Xは変化しない。VとCはクリア
 13776:         } else {  //y=data=1~7
 13777:           XEiJ.regRn[rrr] = ~0xff & x | 0xff & (z = (byte) ((t = x << y - 1) << 1));
 13778:           t = (z >> y != (byte) x ? XEiJ.REG_CCR_V : 0) | (byte) t >> 7 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C);  //VはASRで元に戻せないときセット。XとCは最後に押し出されたビット
 13779:         }
 13780:         XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | t;
 13781:       } else {  //y=data=8~63
 13782:         XEiJ.regRn[rrr] = ~0xff & x;
 13783:         XEiJ.regCCR = XEiJ.REG_CCR_Z | ((byte) x != 0 ? XEiJ.REG_CCR_V : 0) | (y == 8 ? -(x & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C) : 0);
 13784:       }
 13785:       break;
 13786:     case 0b101_000 >> 3:  //LSL.B Dq,Dr
 13787:       y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63;  //y=0~63。Javaのシフト演算子は5ビットでマスクされることに注意
 13788:       if (y == 0) {  //y=data=0
 13789:         z = (byte) x;
 13790:         t = XEiJ.regCCR & XEiJ.REG_CCR_X;  //Xは変化しない。Cはクリア
 13791:       } else {  //y=data=1~63
 13792:         XEiJ.regRn[rrr] = ~0xff & x | 0xff & (z = (byte) ((t = y <= 8 ? x << y - 1 : 0) << 1));
 13793:         t = (byte) t >> 7 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C);  //XとCは最後に押し出されたビット
 13794:       }
 13795:       XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | t;
 13796:       break;
 13797:     case 0b110_000 >> 3:  //ROXL.B Dq,Dr
 13798:       y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63;  //y=0~63。Javaのシフト演算子は5ビットでマスクされることに注意
 13799:       //y %= 9;
 13800:       y = (y & 7) - (y >> 3);  //y=data=-7~7
 13801:       y += y >> 3 & 9;  //y=data=0~8
 13802:       if (y == 0) {  //y=data=0
 13803:         z = (byte) x;
 13804:         t = -(XEiJ.regCCR >> 4 & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C);  //Xは変化しない。CはXのコピー
 13805:       } else {  //y=data=1~8
 13806:         z = x << 1 | XEiJ.regCCR >> 4 & 1;
 13807:         if (y == 1) {  //y=data=1
 13808:           t = x;  //Cは最後に押し出されたビット
 13809:         } else {  //y=data=2~8
 13810:           z = (t = z << y - 2) << 1 | (0xff & x) >>> 9 - y;
 13811:         }
 13812:         XEiJ.regRn[rrr] = ~0xff & x | 0xff & (z = (byte) z);
 13813:         t = (byte) t >> 7 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C);  //XとCは最後に押し出されたビット
 13814:       }
 13815:       XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | t;
 13816:       break;
 13817:     case 0b111_000 >> 3:  //ROL.B Dq,Dr
 13818:     default:
 13819:       y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63;  //y=0~63。Javaのシフト演算子は5ビットでマスクされることに注意
 13820:       if (y == 0) {
 13821:         z = (byte) x;
 13822:         t = 0;  //Cはクリア
 13823:       } else {
 13824:         y &= 7;  //y=data=0~7
 13825:         XEiJ.regRn[rrr] = ~0xff & x | 0xff & (z = (byte) (x << y | (0xff & x) >>> 8 - y));
 13826:         t = z & 1;  //Cは結果の最下位ビット
 13827:       }
 13828:       XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | t;  //Xは変化しない
 13829:     }
 13830:   }  //irpXxlToRegByte
 13831: 
 13832:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 13833:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 13834:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 13835:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 13836:   //ASL.W #<data>,Dr                                |-|012346|-|UUUUU|*****|          |1110_qqq_101_000_rrr
 13837:   //LSL.W #<data>,Dr                                |-|012346|-|UUUUU|***0*|          |1110_qqq_101_001_rrr
 13838:   //ROXL.W #<data>,Dr                               |-|012346|-|*UUUU|***0*|          |1110_qqq_101_010_rrr
 13839:   //ROL.W #<data>,Dr                                |-|012346|-|-UUUU|-**0*|          |1110_qqq_101_011_rrr
 13840:   //ASL.W Dq,Dr                                     |-|012346|-|UUUUU|*****|          |1110_qqq_101_100_rrr
 13841:   //LSL.W Dq,Dr                                     |-|012346|-|UUUUU|***0*|          |1110_qqq_101_101_rrr
 13842:   //ROXL.W Dq,Dr                                    |-|012346|-|*UUUU|***0*|          |1110_qqq_101_110_rrr
 13843:   //ROL.W Dq,Dr                                     |-|012346|-|-UUUU|-**0*|          |1110_qqq_101_111_rrr
 13844:   //ASL.W Dr                                        |A|012346|-|UUUUU|*****|          |1110_001_101_000_rrr [ASL.W #1,Dr]
 13845:   //LSL.W Dr                                        |A|012346|-|UUUUU|***0*|          |1110_001_101_001_rrr [LSL.W #1,Dr]
 13846:   //ROXL.W Dr                                       |A|012346|-|*UUUU|***0*|          |1110_001_101_010_rrr [ROXL.W #1,Dr]
 13847:   //ROL.W Dr                                        |A|012346|-|-UUUU|-**0*|          |1110_001_101_011_rrr [ROL.W #1,Dr]
 13848:   //
 13849:   //ASL.W #<data>,Dr
 13850:   //ASL.W Dq,Dr
 13851:   //ASL.W <ea>
 13852:   //  算術左シフトワード
 13853:   //       ................アイウエオカキクケコサシスセソタ XNZVC
 13854:   //     0 ................アイウエオカキクケコサシスセソタ Xア*00 Z=アイウエオカキクケコサシスセソタ==0
 13855:   //     1 ................イウエオカキクケコサシスセソタ0 アイ**ア Z=イウエオカキクケコサシスセソタ==0,V=アイ!=0/-1
 13856:   //     :
 13857:   //    15 ................タ000000000000000 ソタ**ソ Z=タ==0,V=アイウエオカキクケコサシスセソタ!=0/-1
 13858:   //    16 ................0000000000000000 タ01*タ V=アイウエオカキクケコサシスセソタ!=0
 13859:   //    17 ................0000000000000000 001*0 V=アイウエオカキクケコサシスセソタ!=0
 13860:   //  CCR
 13861:   //    X  countが0のとき変化しない。他は最後に押し出されたビット
 13862:   //    N  結果の最上位ビット
 13863:   //    Z  結果が0のときセット。他はクリア
 13864:   //    V  ASRで元に戻せないときセット。他はクリア
 13865:   //    C  countが0のときクリア。他は最後に押し出されたビット
 13866:   //
 13867:   //LSL.W #<data>,Dr
 13868:   //LSL.W Dq,Dr
 13869:   //LSL.W <ea>
 13870:   //  論理左シフトワード
 13871:   //       ................アイウエオカキクケコサシスセソタ XNZVC
 13872:   //     0 ................アイウエオカキクケコサシスセソタ Xア*00 Z=アイウエオカキクケコサシスセソタ==0
 13873:   //     1 ................イウエオカキクケコサシスセソタ0 アイ*0ア Z=イウエオカキクケコサシスセソタ==0
 13874:   //     :
 13875:   //    15 ................タ000000000000000 ソタ*0ソ Z=タ==0
 13876:   //    16 ................0000000000000000 タ010タ
 13877:   //    17 ................0000000000000000 00100
 13878:   //  CCR
 13879:   //    X  countが0のとき変化しない。他は最後に押し出されたビット
 13880:   //    N  結果の最上位ビット
 13881:   //    Z  結果が0のときセット。他はクリア
 13882:   //    V  常にクリア
 13883:   //    C  countが0のときクリア。他は最後に押し出されたビット
 13884:   //
 13885:   //ROL.W #<data>,Dr
 13886:   //ROL.W Dq,Dr
 13887:   //ROL.W <ea>
 13888:   //  左ローテートワード
 13889:   //       ................アイウエオカキクケコサシスセソタ XNZVC
 13890:   //     0 ................アイウエオカキクケコサシスセソタ Xア*00 Z=アイウエオカキクケコサシスセソタ==0
 13891:   //     1 ................イウエオカキクケコサシスセソタア Xイ*0ア Z=アイウエオカキクケコサシスセソタ==0
 13892:   //     :
 13893:   //    15 ................タアイウエオカキクケコサシスセソ Xタ*0ソ Z=アイウエオカキクケコサシスセソタ==0
 13894:   //    16 ................アイウエオカキクケコサシスセソタ Xア*0タ Z=アイウエオカキクケコサシスセソタ==0
 13895:   //  CCR
 13896:   //    X  常に変化しない
 13897:   //    N  結果の最上位ビット
 13898:   //    Z  結果が0のときセット。他はクリア
 13899:   //    V  常にクリア
 13900:   //    C  countが0のときクリア。他は結果の最下位ビット
 13901:   //
 13902:   //ROXL.W #<data>,Dr
 13903:   //ROXL.W Dq,Dr
 13904:   //ROXL.W <ea>
 13905:   //  拡張左ローテートワード
 13906:   //       ................アイウエオカキクケコサシスセソタ XNZVC
 13907:   //     0 ................アイウエオカキクケコサシスセソタ Xア*0X Z=アイウエオカキクケコサシスセソタ==0
 13908:   //     1 ................イウエオカキクケコサシスセソタX アイ*0ア Z=イウエオカキクケコサシスセソタX==0
 13909:   //     2 ................ウエオカキクケコサシスセソタXア イウ*0イ Z=アウエオカキクケコサシスセソタX==0
 13910:   //     :
 13911:   //    15 ................タXアイウエオカキクケコサシスセ ソタ*0ソ Z=アイウエオカキクケコサシスセタX==0
 13912:   //    16 ................Xアイウエオカキクケコサシスセソ タX*0タ Z=アイウエオカキクケコサシスセソX==0
 13913:   //    17 ................アイウエオカキクケコサシスセソタ Xア*0X Z=アイウエオカキクケコサシスセソタ==0
 13914:   //  CCR
 13915:   //    X  countが0のとき変化しない。他は最後に押し出されたビット
 13916:   //    N  結果の最上位ビット
 13917:   //    Z  結果が0のときセット。他はクリア
 13918:   //    V  常にクリア
 13919:   //    C  countが0のときXのコピー。他は最後に押し出されたビット
 13920:   public static void irpXxlToRegWord () throws M68kException {
 13921:     int rrr;
 13922:     int x = XEiJ.regRn[rrr = XEiJ.regOC & 7];
 13923:     int y;
 13924:     int z;
 13925:     int t;
 13926:     XEiJ.mpuCycleCount++;
 13927:     switch (XEiJ.regOC >> 3 & 0b111_000 >> 3) {
 13928:     case 0b000_000 >> 3:  //ASL.W #<data>,Dr
 13929:       y = (XEiJ.regOC >> 9) - 1 & 7;  //y=data-1=1-1~8-1
 13930:       XEiJ.regRn[rrr] = ~0xffff & x | (char) (z = (short) ((t = x << y) << 1));
 13931:       XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | (z >> y + 1 != (short) x ? XEiJ.REG_CCR_V : 0) | (short) t >> 15 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C);  //VはASRで元に戻せないときセット。XとCは最後に押し出されたビット
 13932:       break;
 13933:     case 0b001_000 >> 3:  //LSL.W #<data>,Dr
 13934:       y = (XEiJ.regOC >> 9) - 1 & 7;  //y=data-1=1-1~8-1
 13935:       XEiJ.regRn[rrr] = ~0xffff & x | (char) (z = (short) ((t = x << y) << 1));
 13936:       XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | (short) t >> 15 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C);  //XとCは最後に押し出されたビット
 13937:       break;
 13938:     case 0b010_000 >> 3:  //ROXL.W #<data>,Dr
 13939:       y = (XEiJ.regOC >> 9) - 1 & 7;  //y=data-1=1-1~8-1
 13940:       z = x << 1 | XEiJ.regCCR >> 4 & 1;
 13941:       if (y == 1 - 1) {  //y=data-1=1-1
 13942:         t = x;
 13943:       } else {  //y=data-1=2-1~8-1
 13944:         z = (t = z << y - (2 - 1)) << 1 | (char) x >>> 17 - 1 - y;
 13945:       }
 13946:       XEiJ.regRn[rrr] = ~0xffff & x | (char) (z = (short) z);
 13947:       XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | (short) t >> 15 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C);  //XとCは最後に押し出されたビット
 13948:       break;
 13949:     case 0b011_000 >> 3:  //ROL.W #<data>,Dr
 13950:       y = (XEiJ.regOC >> 9) - 1 & 7;  //y=data-1=1-1~8-1
 13951:       XEiJ.regRn[rrr] = ~0xffff & x | (char) (z = (short) (x << y + 1 | (char) x >>> 16 - 1 - y));
 13952:       XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | z & 1;  //Xは変化しない。Cは結果の最下位ビット
 13953:       break;
 13954:     case 0b100_000 >> 3:  //ASL.W Dq,Dr
 13955:       y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63;  //y=0~63。Javaのシフト演算子は5ビットでマスクされることに注意
 13956:       if (y <= 15) {  //y=data=0~15
 13957:         if (y == 0) {  //y=data=0
 13958:           z = (short) x;
 13959:           t = XEiJ.regCCR & XEiJ.REG_CCR_X;  //Xは変化しない。VとCはクリア
 13960:         } else {  //y=data=1~15
 13961:           XEiJ.regRn[rrr] = ~0xffff & x | (char) (z = (short) ((t = x << y - 1) << 1));
 13962:           t = (z >> y != (short) x ? XEiJ.REG_CCR_V : 0) | (short) t >> 15 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C);  //VはASRで元に戻せないときセット。XとCは最後に押し出されたビット
 13963:         }
 13964:         XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | t;
 13965:       } else {  //y=data=16~63
 13966:         XEiJ.regRn[rrr] = ~0xffff & x;
 13967:         XEiJ.regCCR = XEiJ.REG_CCR_Z | ((short) x != 0 ? XEiJ.REG_CCR_V : 0) | (y == 16 ? -(x & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C) : 0);
 13968:       }
 13969:       break;
 13970:     case 0b101_000 >> 3:  //LSL.W Dq,Dr
 13971:       y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63;  //y=0~63。Javaのシフト演算子は5ビットでマスクされることに注意
 13972:       if (y == 0) {  //y=data=0
 13973:         z = (short) x;
 13974:         t = XEiJ.regCCR & XEiJ.REG_CCR_X;  //Xは変化しない。Cはクリア
 13975:       } else {  //y=data=1~63
 13976:         XEiJ.regRn[rrr] = ~0xffff & x | (char) (z = (short) ((t = y <= 16 ? x << y - 1 : 0) << 1));
 13977:         t = (short) t >> 15 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C);  //XとCは最後に押し出されたビット
 13978:       }
 13979:       XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | t;
 13980:       break;
 13981:     case 0b110_000 >> 3:  //ROXL.W Dq,Dr
 13982:       y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63;  //y=0~63。Javaのシフト演算子は5ビットでマスクされることに注意
 13983:       //y %= 17;
 13984:       y = (y & 15) - (y >> 4);  //y=data=-3~15
 13985:       y += y >> 4 & 17;  //y=data=0~16
 13986:       if (y == 0) {  //y=data=0
 13987:         z = (short) x;
 13988:         t = -(XEiJ.regCCR >> 4 & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C);  //Xは変化しない。CはXのコピー
 13989:       } else {  //y=data=1~16
 13990:         z = x << 1 | XEiJ.regCCR >> 4 & 1;
 13991:         if (y == 1) {  //y=data=1
 13992:           t = x;  //Cは最後に押し出されたビット
 13993:         } else {  //y=data=2~16
 13994:           z = (t = z << y - 2) << 1 | (char) x >>> 17 - y;
 13995:         }
 13996:         XEiJ.regRn[rrr] = ~0xffff & x | (char) (z = (short) z);
 13997:         t = (short) t >> 15 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C);  //XとCは最後に押し出されたビット
 13998:       }
 13999:       XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | t;
 14000:       break;
 14001:     case 0b111_000 >> 3:  //ROL.W Dq,Dr
 14002:     default:
 14003:       y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63;  //y=0~63。Javaのシフト演算子は5ビットでマスクされることに注意
 14004:       if (y == 0) {
 14005:         z = (short) x;
 14006:         t = 0;  //Cはクリア
 14007:       } else {
 14008:         y &= 15;  //y=data=0~15
 14009:         XEiJ.regRn[rrr] = ~0xffff & x | (char) (z = (short) (x << y | (char) x >>> 16 - y));
 14010:         t = z & 1;  //Cは結果の最下位ビット
 14011:       }
 14012:       XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | t;  //Xは変化しない
 14013:     }
 14014:   }  //irpXxlToRegWord
 14015: 
 14016:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 14017:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 14018:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 14019:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 14020:   //ASL.L #<data>,Dr                                |-|012346|-|UUUUU|*****|          |1110_qqq_110_000_rrr
 14021:   //LSL.L #<data>,Dr                                |-|012346|-|UUUUU|***0*|          |1110_qqq_110_001_rrr
 14022:   //ROXL.L #<data>,Dr                               |-|012346|-|*UUUU|***0*|          |1110_qqq_110_010_rrr
 14023:   //ROL.L #<data>,Dr                                |-|012346|-|-UUUU|-**0*|          |1110_qqq_110_011_rrr
 14024:   //ASL.L Dq,Dr                                     |-|012346|-|UUUUU|*****|          |1110_qqq_110_100_rrr
 14025:   //LSL.L Dq,Dr                                     |-|012346|-|UUUUU|***0*|          |1110_qqq_110_101_rrr
 14026:   //ROXL.L Dq,Dr                                    |-|012346|-|*UUUU|***0*|          |1110_qqq_110_110_rrr
 14027:   //ROL.L Dq,Dr                                     |-|012346|-|-UUUU|-**0*|          |1110_qqq_110_111_rrr
 14028:   //ASL.L Dr                                        |A|012346|-|UUUUU|*****|          |1110_001_110_000_rrr [ASL.L #1,Dr]
 14029:   //LSL.L Dr                                        |A|012346|-|UUUUU|***0*|          |1110_001_110_001_rrr [LSL.L #1,Dr]
 14030:   //ROXL.L Dr                                       |A|012346|-|*UUUU|***0*|          |1110_001_110_010_rrr [ROXL.L #1,Dr]
 14031:   //ROL.L Dr                                        |A|012346|-|-UUUU|-**0*|          |1110_001_110_011_rrr [ROL.L #1,Dr]
 14032:   //
 14033:   //ASL.L #<data>,Dr
 14034:   //ASL.L Dq,Dr
 14035:   //  算術左シフトロング
 14036:   //       アイウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマミ XNZVC
 14037:   //     0 アイウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマミ Xア**0 Z=アイウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマミ==0
 14038:   //     1 イウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマミ0 アイ**ア Z=イウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマミ==0,V=アイ!=0/-1
 14039:   //     :
 14040:   //    31 ミ0000000000000000000000000000000 マミ**マ Z=ミ==0,V=アイウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマミ!=0/-1
 14041:   //    32 00000000000000000000000000000000 ミ01*ミ V=アイウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマミ!=0
 14042:   //    33 00000000000000000000000000000000 001*0 V=アイウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマミ!=0
 14043:   //  CCR
 14044:   //    X  countが0のとき変化しない。他は最後に押し出されたビット
 14045:   //    N  結果の最上位ビット
 14046:   //    Z  結果が0のときセット。他はクリア
 14047:   //    V  ASRで元に戻せないときセット。他はクリア
 14048:   //    C  countが0のときクリア。他は最後に押し出されたビット
 14049:   //
 14050:   //LSL.L #<data>,Dr
 14051:   //LSL.L Dq,Dr
 14052:   //  論理左シフトロング
 14053:   //       アイウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマミ XNZVC
 14054:   //     0 アイウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマミ Xア*00 Z=アイウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマミ==0
 14055:   //     1 イウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマミ0 アイ*0ア Z=イウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマミ==0
 14056:   //     :
 14057:   //    31 ミ0000000000000000000000000000000 マミ*0マ Z=ミ==0
 14058:   //    32 00000000000000000000000000000000 ミ010ミ
 14059:   //    33 00000000000000000000000000000000 00100
 14060:   //  CCR
 14061:   //    X  countが0のとき変化しない。他は最後に押し出されたビット
 14062:   //    N  結果の最上位ビット
 14063:   //    Z  結果が0のときセット。他はクリア
 14064:   //    V  常にクリア
 14065:   //    C  countが0のときクリア。他は最後に押し出されたビット
 14066:   //
 14067:   //ROL.L #<data>,Dr
 14068:   //ROL.L Dq,Dr
 14069:   //  左ローテートロング
 14070:   //       アイウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマミ XNZVC
 14071:   //     0 アイウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマミ Xア*00 Z=アイウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマミ==0
 14072:   //     1 イウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマミア Xイ*0ア Z=アイウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマミ==0
 14073:   //     :
 14074:   //    31 ミアイウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマ Xミ*0マ Z=アイウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマミ==0
 14075:   //    32 アイウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマミ Xア*0ミ Z=アイウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマミ==0
 14076:   //  CCR
 14077:   //    X  常に変化しない
 14078:   //    N  結果の最上位ビット
 14079:   //    Z  結果が0のときセット。他はクリア
 14080:   //    V  常にクリア
 14081:   //    C  countが0のときクリア。他は結果の最下位ビット
 14082:   //
 14083:   //ROXL.L #<data>,Dr
 14084:   //ROXL.L Dq,Dr
 14085:   //  拡張左ローテートロング
 14086:   //       アイウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマミ XNZVC
 14087:   //     0 アイウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマミ Xア*0X Z=アイウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマミ==0
 14088:   //     1 イウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマミX アイ*0ア Z=イウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマミX==0
 14089:   //     2 ウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマミXア イウ*0イ Z=アウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマミX==0
 14090:   //     :
 14091:   //    31 ミXアイウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホ マミ*0マ Z=アイウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホミX==0
 14092:   //    32 Xアイウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマ ミX*0ミ Z=アイウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマX==0
 14093:   //    33 アイウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマミ Xア*0X Z=アイウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマミ==0
 14094:   //  CCR
 14095:   //    X  countが0のとき変化しない。他は最後に押し出されたビット
 14096:   //    N  結果の最上位ビット
 14097:   //    Z  結果が0のときセット。他はクリア
 14098:   //    V  常にクリア
 14099:   //    C  countが0のときXのコピー。他は最後に押し出されたビット
 14100:   public static void irpXxlToRegLong () throws M68kException {
 14101:     int rrr;
 14102:     int x = XEiJ.regRn[rrr = XEiJ.regOC & 7];
 14103:     int y;
 14104:     int z;
 14105:     int t;
 14106:     XEiJ.mpuCycleCount++;
 14107:     switch (XEiJ.regOC >> 3 & 0b111_000 >> 3) {
 14108:     case 0b000_000 >> 3:  //ASL.L #<data>,Dr
 14109:       y = (XEiJ.regOC >> 9) - 1 & 7;  //y=data-1=1-1~8-1
 14110:       XEiJ.regRn[rrr] = z = (t = x << y) << 1;
 14111:       XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | (z >> y + 1 != x ? XEiJ.REG_CCR_V : 0) | t >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C);  //VはASRで元に戻せないときセット。XとCは最後に押し出されたビット
 14112:       break;
 14113:     case 0b001_000 >> 3:  //LSL.L #<data>,Dr
 14114:       y = (XEiJ.regOC >> 9) - 1 & 7;  //y=data-1=1-1~8-1
 14115:       XEiJ.regRn[rrr] = z = (t = x << y) << 1;
 14116:       XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | t >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C);  //XとCは最後に押し出されたビット
 14117:       break;
 14118:     case 0b010_000 >> 3:  //ROXL.L #<data>,Dr
 14119:       y = (XEiJ.regOC >> 9) - 1 & 7;  //y=data-1=1-1~8-1
 14120:       z = x << 1 | XEiJ.regCCR >> 4 & 1;
 14121:       if (y == 1 - 1) {  //y=data-1=1-1
 14122:         t = x;
 14123:       } else {  //y=data-1=2-1~8-1
 14124:         z = (t = z << y - (2 - 1)) << 1 | x >>> -y;  //Javaのシフト演算子は5ビットでマスクされるので33-1-yを-yに省略
 14125:       }
 14126:       XEiJ.regRn[rrr] = z;
 14127:       XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | t >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C);  //XとCは最後に押し出されたビット
 14128:       break;
 14129:     case 0b011_000 >> 3:  //ROL.L #<data>,Dr
 14130:       y = (XEiJ.regOC >> 9) - 1 & 7;  //y=data-1=1-1~8-1
 14131:       XEiJ.regRn[rrr] = z = x << y + 1 | x >>> ~y;  //Javaのシフト演算子は5ビットでマスクされるので32-1-yを~yに省略
 14132:       XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | z & 1;  //Xは変化しない。Cは結果の最下位ビット
 14133:       break;
 14134:     case 0b100_000 >> 3:  //ASL.L Dq,Dr
 14135:       y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63;  //y=0~63。Javaのシフト演算子は5ビットでマスクされることに注意
 14136:       if (y <= 31) {  //y=data=0~31
 14137:         if (y == 0) {  //y=data=0
 14138:           z = x;
 14139:           t = XEiJ.regCCR & XEiJ.REG_CCR_X;  //Xは変化しない。VとCはクリア
 14140:         } else {  //y=data=1~31
 14141:           XEiJ.regRn[rrr] = z = (t = x << y - 1) << 1;
 14142:           t = (z >> y != x ? XEiJ.REG_CCR_V : 0) | t >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C);  //VはASRで元に戻せないときセット。XとCは最後に押し出されたビット
 14143:         }
 14144:         XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | t;
 14145:       } else {  //y=data=32~63
 14146:         XEiJ.regRn[rrr] = 0;
 14147:         XEiJ.regCCR = XEiJ.REG_CCR_Z | (x != 0 ? XEiJ.REG_CCR_V : 0) | (y == 32 ? -(x & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C) : 0);
 14148:       }
 14149:       break;
 14150:     case 0b101_000 >> 3:  //LSL.L Dq,Dr
 14151:       y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63;  //y=0~63。Javaのシフト演算子は5ビットでマスクされることに注意
 14152:       if (y == 0) {  //y=data=0
 14153:         z = x;
 14154:         t = XEiJ.regCCR & XEiJ.REG_CCR_X;  //Xは変化しない。Cはクリア
 14155:       } else {  //y=data=1~63
 14156:         XEiJ.regRn[rrr] = z = (t = y <= 32 ? x << y - 1 : 0) << 1;
 14157:         t = t >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C);  //XとCは最後に押し出されたビット
 14158:       }
 14159:       XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | t;
 14160:       break;
 14161:     case 0b110_000 >> 3:  //ROXL.L Dq,Dr
 14162:       y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63;  //y=0~63。Javaのシフト演算子は5ビットでマスクされることに注意
 14163:       //y %= 33;
 14164:       y -= 32 - y >> 6 & 33;  //y=data=0~32
 14165:       if (y == 0) {  //y=data=0
 14166:         z = x;
 14167:         t = -(XEiJ.regCCR >> 4 & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C);  //Xは変化しない。CはXのコピー
 14168:       } else {  //y=data=1~32
 14169:         z = x << 1 | XEiJ.regCCR >> 4 & 1;
 14170:         if (y == 1) {  //y=data=1
 14171:           t = x;  //Cは最後に押し出されたビット
 14172:         } else {  //y=data=2~32
 14173:           z = (t = z << y - 2) << 1 | x >>> 33 - y;
 14174:         }
 14175:         XEiJ.regRn[rrr] = z;
 14176:         t = t >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C);  //XとCは最後に押し出されたビット
 14177:       }
 14178:       XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | t;
 14179:       break;
 14180:     case 0b111_000 >> 3:  //ROL.L Dq,Dr
 14181:     default:
 14182:       y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63;  //y=0~63。Javaのシフト演算子は5ビットでマスクされることに注意
 14183:       if (y == 0) {
 14184:         z = x;
 14185:         t = 0;  //Cはクリア
 14186:       } else {
 14187:         XEiJ.regRn[rrr] = z = x << y | x >>> -y;  //Javaのシフト演算子は5ビットでマスクされるのでy&31をyに、32-(y&31)を-yに省略。y=32のときx|xになるが問題ない
 14188:         t = z & 1;
 14189:       }
 14190:       XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | t;  //Xは変化しない
 14191:     }
 14192:   }  //irpXxlToRegLong
 14193: 
 14194:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 14195:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 14196:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 14197:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 14198:   //ASL.W <ea>                                      |-|012346|-|UUUUU|*****|  M+-WXZ  |1110_000_111_mmm_rrr
 14199:   //
 14200:   //ASL.W #<data>,Dr
 14201:   //ASL.W Dq,Dr
 14202:   //ASL.W <ea>
 14203:   //  算術左シフトワード
 14204:   //       ................アイウエオカキクケコサシスセソタ XNZVC
 14205:   //     0 ................アイウエオカキクケコサシスセソタ Xア*00 Z=アイウエオカキクケコサシスセソタ==0
 14206:   //     1 ................イウエオカキクケコサシスセソタ0 アイ**ア Z=イウエオカキクケコサシスセソタ==0,V=アイ!=0/-1
 14207:   //     :
 14208:   //    15 ................タ000000000000000 ソタ**ソ Z=タ==0,V=アイウエオカキクケコサシスセソタ!=0/-1
 14209:   //    16 ................0000000000000000 タ01*タ V=アイウエオカキクケコサシスセソタ!=0
 14210:   //    17 ................0000000000000000 001*0 V=アイウエオカキクケコサシスセソタ!=0
 14211:   //  CCR
 14212:   //    X  countが0のとき変化しない。他は最後に押し出されたビット
 14213:   //    N  結果の最上位ビット
 14214:   //    Z  結果が0のときセット。他はクリア
 14215:   //    V  ASRで元に戻せないときセット。他はクリア
 14216:   //    C  countが0のときクリア。他は最後に押し出されたビット
 14217:   public static void irpAslToMem () throws M68kException {
 14218:     XEiJ.mpuCycleCount++;
 14219:     int ea = XEiJ.regOC & 63;
 14220:     int a = efaMltWord (ea);
 14221:     int x = mmuModifyWordSignData (a, XEiJ.regSRS);
 14222:     int z = (short) (x << 1);
 14223:     mmuWriteWordData (a, z, XEiJ.regSRS);
 14224:     XEiJ.regCCR = ((z < 0 ? XEiJ.REG_CCR_N : 0) |
 14225:                    (z == 0 ? XEiJ.REG_CCR_Z : 0) |
 14226:                    (x ^ z) >>> 31 << 1 |  //Vは最上位ビットが変化したときセット
 14227:                    x >> 15 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C));  //XとCは最後に押し出されたビット
 14228:   }  //irpAslToMem
 14229: 
 14230:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 14231:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 14232:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 14233:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 14234:   //LSR.W <ea>                                      |-|012346|-|UUUUU|*0*0*|  M+-WXZ  |1110_001_011_mmm_rrr
 14235:   //
 14236:   //LSR.W #<data>,Dr
 14237:   //LSR.W Dq,Dr
 14238:   //LSR.W <ea>
 14239:   //  論理右シフトワード
 14240:   //       ................アイウエオカキクケコサシスセソタ XNZVC
 14241:   //     0 ................アイウエオカキクケコサシスセソタ Xア*00 Z=アイウエオカキクケコサシスセソタ==0
 14242:   //     1 ................0アイウエオカキクケコサシスセソ タ0*0タ Z=アイウエオカキクケコサシスセソ==0
 14243:   //     :
 14244:   //    15 ................000000000000000ア イ0*0イ Z=ア==0
 14245:   //    16 ................0000000000000000 ア010ア
 14246:   //    17 ................0000000000000000 00100
 14247:   //  CCR
 14248:   //    X  countが0のとき変化しない。他は最後に押し出されたビット
 14249:   //    N  結果の最上位ビット
 14250:   //    Z  結果が0のときセット。他はクリア
 14251:   //    V  常にクリア
 14252:   //    C  countが0のときクリア。他は最後に押し出されたビット
 14253:   public static void irpLsrToMem () throws M68kException {
 14254:     XEiJ.mpuCycleCount++;
 14255:     int ea = XEiJ.regOC & 63;
 14256:     int a = efaMltWord (ea);
 14257:     int x = mmuModifyWordZeroData (a, XEiJ.regSRS);
 14258:     int z = x >>> 1;
 14259:     mmuWriteWordData (a, z, XEiJ.regSRS);
 14260:     XEiJ.regCCR = ((z == 0 ? XEiJ.REG_CCR_Z : 0) |
 14261:                    -(x & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C));  //XとCは最後に押し出されたビット
 14262:   }  //irpLsrToMem
 14263: 
 14264:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 14265:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 14266:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 14267:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 14268:   //LSL.W <ea>                                      |-|012346|-|UUUUU|***0*|  M+-WXZ  |1110_001_111_mmm_rrr
 14269:   //
 14270:   //LSL.W #<data>,Dr
 14271:   //LSL.W Dq,Dr
 14272:   //LSL.W <ea>
 14273:   //  論理左シフトワード
 14274:   //       ................アイウエオカキクケコサシスセソタ XNZVC
 14275:   //     0 ................アイウエオカキクケコサシスセソタ Xア*00 Z=アイウエオカキクケコサシスセソタ==0
 14276:   //     1 ................イウエオカキクケコサシスセソタ0 アイ*0ア Z=イウエオカキクケコサシスセソタ==0
 14277:   //     :
 14278:   //    15 ................タ000000000000000 ソタ*0ソ Z=タ==0
 14279:   //    16 ................0000000000000000 タ010タ
 14280:   //    17 ................0000000000000000 00100
 14281:   //  CCR
 14282:   //    X  countが0のとき変化しない。他は最後に押し出されたビット
 14283:   //    N  結果の最上位ビット
 14284:   //    Z  結果が0のときセット。他はクリア
 14285:   //    V  常にクリア
 14286:   //    C  countが0のときクリア。他は最後に押し出されたビット
 14287:   public static void irpLslToMem () throws M68kException {
 14288:     XEiJ.mpuCycleCount++;
 14289:     int ea = XEiJ.regOC & 63;
 14290:     int a = efaMltWord (ea);
 14291:     int x = mmuModifyWordSignData (a, XEiJ.regSRS);
 14292:     int z = (short) (x << 1);
 14293:     mmuWriteWordData (a, z, XEiJ.regSRS);
 14294:     XEiJ.regCCR = ((z < 0 ? XEiJ.REG_CCR_N : 0) |
 14295:                    (z == 0 ? XEiJ.REG_CCR_Z : 0) |
 14296:                    x >> 15 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C));  //XとCは最後に押し出されたビット
 14297:   }  //irpLslToMem
 14298: 
 14299:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 14300:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 14301:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 14302:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 14303:   //ROXR.W <ea>                                     |-|012346|-|*UUUU|***0*|  M+-WXZ  |1110_010_011_mmm_rrr
 14304:   //
 14305:   //ROXR.W #<data>,Dr
 14306:   //ROXR.W Dq,Dr
 14307:   //ROXR.W <ea>
 14308:   //  拡張右ローテートワード
 14309:   //       ................アイウエオカキクケコサシスセソタ XNZVC
 14310:   //     0 ................アイウエオカキクケコサシスセソタ Xア*0X Z=アイウエオカキクケコサシスセソタ==0
 14311:   //     1 ................Xアイウエオカキクケコサシスセソ タX*0タ Z=アイウエオカキクケコサシスセソX==0
 14312:   //     2 ................タXアイウエオカキクケコサシスセ ソタ*0ソ Z=アイウエオカキクケコサシスセタX==0
 14313:   //     :
 14314:   //    15 ................ウエオカキクケコサシスセソタXア イウ*0イ Z=アウエオカキクケコサシスセソタX==0
 14315:   //    16 ................イウエオカキクケコサシスセソタX アイ*0ア Z=イウエオカキクケコサシスセソタX==0
 14316:   //    17 ................アイウエオカキクケコサシスセソタ Xア*0X Z=アイウエオカキクケコサシスセソタ==0
 14317:   //  CCR
 14318:   //    X  countが0のとき変化しない。他は最後に押し出されたビット
 14319:   //    N  結果の最上位ビット
 14320:   //    Z  結果が0のときセット。他はクリア
 14321:   //    V  常にクリア
 14322:   //    C  countが0のときXのコピー。他は最後に押し出されたビット
 14323:   public static void irpRoxrToMem () throws M68kException {
 14324:     XEiJ.mpuCycleCount++;
 14325:     int ea = XEiJ.regOC & 63;
 14326:     int a = efaMltWord (ea);
 14327:     int x = mmuModifyWordZeroData (a, XEiJ.regSRS);
 14328:     int z = -(XEiJ.regCCR & XEiJ.REG_CCR_X) << 15 - 4 | x >>> 1;
 14329:     mmuWriteWordData (a, z, XEiJ.regSRS);
 14330:     XEiJ.regCCR = ((z < 0 ? XEiJ.REG_CCR_N : 0) |
 14331:                    (z == 0 ? XEiJ.REG_CCR_Z : 0) |
 14332:                    -(x & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C));  //XとCは最後に押し出されたビット
 14333:   }  //irpRoxrToMem
 14334: 
 14335:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 14336:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 14337:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 14338:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 14339:   //ROXL.W <ea>                                     |-|012346|-|*UUUU|***0*|  M+-WXZ  |1110_010_111_mmm_rrr
 14340:   //
 14341:   //ROXL.W #<data>,Dr
 14342:   //ROXL.W Dq,Dr
 14343:   //ROXL.W <ea>
 14344:   //  拡張左ローテートワード
 14345:   //       ................アイウエオカキクケコサシスセソタ XNZVC
 14346:   //     0 ................アイウエオカキクケコサシスセソタ Xア*0X Z=アイウエオカキクケコサシスセソタ==0
 14347:   //     1 ................イウエオカキクケコサシスセソタX アイ*0ア Z=イウエオカキクケコサシスセソタX==0
 14348:   //     2 ................ウエオカキクケコサシスセソタXア イウ*0イ Z=アウエオカキクケコサシスセソタX==0
 14349:   //     :
 14350:   //    15 ................タXアイウエオカキクケコサシスセ ソタ*0ソ Z=アイウエオカキクケコサシスセタX==0
 14351:   //    16 ................Xアイウエオカキクケコサシスセソ タX*0タ Z=アイウエオカキクケコサシスセソX==0
 14352:   //    17 ................アイウエオカキクケコサシスセソタ Xア*0X Z=アイウエオカキクケコサシスセソタ==0
 14353:   //  CCR
 14354:   //    X  countが0のとき変化しない。他は最後に押し出されたビット
 14355:   //    N  結果の最上位ビット
 14356:   //    Z  結果が0のときセット。他はクリア
 14357:   //    V  常にクリア
 14358:   //    C  countが0のときXのコピー。他は最後に押し出されたビット
 14359:   public static void irpRoxlToMem () throws M68kException {
 14360:     XEiJ.mpuCycleCount++;
 14361:     int ea = XEiJ.regOC & 63;
 14362:     int a = efaMltWord (ea);
 14363:     int x = mmuModifyWordSignData (a, XEiJ.regSRS);
 14364:     int z = (short) (x << 1 | XEiJ.regCCR >> 4 & 1);
 14365:     mmuWriteWordData (a, z, XEiJ.regSRS);
 14366:     XEiJ.regCCR = ((z < 0 ? XEiJ.REG_CCR_N : 0) |
 14367:                    (z == 0 ? XEiJ.REG_CCR_Z : 0) |
 14368:                    x >> 15 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C));  //XとCは最後に押し出されたビット
 14369:   }  //irpRoxlToMem
 14370: 
 14371:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 14372:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 14373:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 14374:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 14375:   //ROR.W <ea>                                      |-|012346|-|-UUUU|-**0*|  M+-WXZ  |1110_011_011_mmm_rrr
 14376:   //
 14377:   //ROR.W #<data>,Dr
 14378:   //ROR.W Dq,Dr
 14379:   //ROR.W <ea>
 14380:   //  右ローテートワード
 14381:   //       ................アイウエオカキクケコサシスセソタ XNZVC
 14382:   //     0 ................アイウエオカキクケコサシスセソタ Xア*00 Z=アイウエオカキクケコサシスセソタ==0
 14383:   //     1 ................タアイウエオカキクケコサシスセソ Xタ*0タ Z=アイウエオカキクケコサシスセソタ==0
 14384:   //     :
 14385:   //    15 ................イウエオカキクケコサシスセソタア Xイ*0イ Z=アイウエオカキクケコサシスセソタ==0
 14386:   //    16 ................アイウエオカキクケコサシスセソタ Xア*0ア Z=アイウエオカキクケコサシスセソタ==0
 14387:   //  CCR
 14388:   //    X  常に変化しない
 14389:   //    N  結果の最上位ビット
 14390:   //    Z  結果が0のときセット。他はクリア
 14391:   //    V  常にクリア
 14392:   //    C  countが0のときクリア。他は結果の最上位ビット
 14393:   public static void irpRorToMem () throws M68kException {
 14394:     XEiJ.mpuCycleCount++;
 14395:     int ea = XEiJ.regOC & 63;
 14396:     int a = efaMltWord (ea);
 14397:     int x = mmuModifyWordZeroData (a, XEiJ.regSRS);
 14398:     int z = (short) (x << 15 | x >>> 1);
 14399:     mmuWriteWordData (a, z, XEiJ.regSRS);
 14400:     XEiJ.regCCR = (XEiJ.regCCR & XEiJ.REG_CCR_X |  //Xは変化しない
 14401:                    (z < 0 ? XEiJ.REG_CCR_N : 0) |
 14402:                    (z == 0 ? XEiJ.REG_CCR_Z : 0) |
 14403:                    z >>> 31);  //Cは結果の最上位ビット
 14404:   }  //irpRorToMem
 14405: 
 14406:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 14407:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 14408:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 14409:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 14410:   //ROL.W <ea>                                      |-|012346|-|-UUUU|-**0*|  M+-WXZ  |1110_011_111_mmm_rrr
 14411:   //
 14412:   //ROL.W #<data>,Dr
 14413:   //ROL.W Dq,Dr
 14414:   //ROL.W <ea>
 14415:   //  左ローテートワード
 14416:   //       ................アイウエオカキクケコサシスセソタ XNZVC
 14417:   //     0 ................アイウエオカキクケコサシスセソタ Xア*00 Z=アイウエオカキクケコサシスセソタ==0
 14418:   //     1 ................イウエオカキクケコサシスセソタア Xイ*0ア Z=アイウエオカキクケコサシスセソタ==0
 14419:   //     :
 14420:   //    15 ................タアイウエオカキクケコサシスセソ Xタ*0ソ Z=アイウエオカキクケコサシスセソタ==0
 14421:   //    16 ................アイウエオカキクケコサシスセソタ Xア*0タ Z=アイウエオカキクケコサシスセソタ==0
 14422:   //  CCR
 14423:   //    X  常に変化しない
 14424:   //    N  結果の最上位ビット
 14425:   //    Z  結果が0のときセット。他はクリア
 14426:   //    V  常にクリア
 14427:   //    C  countが0のときクリア。他は結果の最下位ビット
 14428:   public static void irpRolToMem () throws M68kException {
 14429:     XEiJ.mpuCycleCount++;
 14430:     int ea = XEiJ.regOC & 63;
 14431:     int a = efaMltWord (ea);
 14432:     int x = mmuModifyWordZeroData (a, XEiJ.regSRS);
 14433:     int z = (short) (x << 1 | x >>> 15);
 14434:     mmuWriteWordData (a, z, XEiJ.regSRS);
 14435:     XEiJ.regCCR = (XEiJ.regCCR & XEiJ.REG_CCR_X |  //Xは変化しない
 14436:                    (z < 0 ? XEiJ.REG_CCR_N : 0) |
 14437:                    (z == 0 ? XEiJ.REG_CCR_Z : 0) |
 14438:                    z & 1);  //Cは結果の最下位ビット
 14439:   }  //irpRolToMem
 14440: 
 14441:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 14442:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 14443:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 14444:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 14445:   //BFTST <ea>{#o:#w}                               |-|--2346|-|-UUUU|-**00|D M  WXZP |1110_100_011_mmm_rrr-00000ooooo0wwwww
 14446:   //BFTST <ea>{#o:Dw}                               |-|--2346|-|-UUUU|-**00|D M  WXZP |1110_100_011_mmm_rrr-00000ooooo100www
 14447:   //BFTST <ea>{Do:#w}                               |-|--2346|-|-UUUU|-**00|D M  WXZP |1110_100_011_mmm_rrr-0000100ooo0wwwww
 14448:   //BFTST <ea>{Do:Dw}                               |-|--2346|-|-UUUU|-**00|D M  WXZP |1110_100_011_mmm_rrr-0000100ooo100www
 14449:   public static void irpBftst () throws M68kException {
 14450:     int w = mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);  //pcwz。拡張ワード
 14451:     if ((w & ~0b0000_111_111_111_111) != 0 ||
 14452:         (w & 0b0000_111_111_000_000) > 0b0000_100_111_000_000 ||
 14453:         (w & 0b0000_000_000_111_111) > 0b0000_000_000_100_111) {
 14454:       M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION;
 14455:       throw M68kException.m6eSignal;
 14456:     }
 14457:     int o = w << 31 - 11 >= 0 ? w >> 6 & 31 : XEiJ.regRn[w >> 6 & 7];  //o=offset
 14458:     w = -(w << 31 - 5 >= 0 ? w : XEiJ.regRn[w & 7]) & 31;  //w=32-width。1<=width<=32なので0<=32-width<=31
 14459:     XEiJ.mpuCycleCount += 6;
 14460:     int ea = XEiJ.regOC & 63;
 14461:     int z;
 14462:     if (ea < XEiJ.EA_AR) {  //BFTST Dr{~}
 14463:       z = XEiJ.regRn[ea];
 14464:       z = z << o | z >>> -o;  //下位からはみ出したフィールドは上位に戻る
 14465:     } else {  //BFTST <mem>{~}
 14466:       int a = efaCntLong (ea) + (o >> 3);  //フィールドの最上位ビットを含むバイトのアドレス
 14467:       o &= 7;
 14468:       z = 31 - w + o >> 3;  //フィールドが跨ぐバイト境界の数。0~4
 14469:       z = (z == 0 ? mmuReadByteSignData (m60Address = a, XEiJ.regSRS) << 24 + o :  //不要なバイトにアクセスしない
 14470:            z == 1 ? mmuReadWordSignData (m60Address = a, XEiJ.regSRS) << 16 + o :  //020以上なのでアドレスエラーは出ない
 14471:            z == 2 ? (mmuReadWordSignData (m60Address = a, XEiJ.regSRS) << 8 | mmuReadByteZeroData (a + 2, XEiJ.regSRS)) << 8 + o :
 14472:            z == 3 ? mmuReadLongData (m60Address = a, XEiJ.regSRS) << o :
 14473:            mmuReadLongData (m60Address = a, XEiJ.regSRS) << o | mmuReadByteZeroData (m60Address = a + 4, XEiJ.regSRS) >>> 8 - o);
 14474:     }
 14475:     z >>= w;  //符号拡張。下位のゴミを消す
 14476:     XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X);  //ccr_tst
 14477:   }  //irpBftst
 14478: 
 14479:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 14480:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 14481:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 14482:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 14483:   //BFEXTU <ea>{#o:#w},Dn                           |-|--2346|-|-UUUU|-**00|D M  WXZP |1110_100_111_mmm_rrr-0nnn0ooooo0wwwww
 14484:   //BFEXTU <ea>{#o:Dw},Dn                           |-|--2346|-|-UUUU|-**00|D M  WXZP |1110_100_111_mmm_rrr-0nnn0ooooo100www
 14485:   //BFEXTU <ea>{Do:#w},Dn                           |-|--2346|-|-UUUU|-**00|D M  WXZP |1110_100_111_mmm_rrr-0nnn100ooo0wwwww
 14486:   //BFEXTU <ea>{Do:Dw},Dn                           |-|--2346|-|-UUUU|-**00|D M  WXZP |1110_100_111_mmm_rrr-0nnn100ooo100www
 14487:   public static void irpBfextu () throws M68kException {
 14488:     int w = mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);  //pcwz。拡張ワード
 14489:     if ((w & ~0b0111_111_111_111_111) != 0 ||
 14490:         (w & 0b0000_111_111_000_000) > 0b0000_100_111_000_000 ||
 14491:         (w & 0b0000_000_000_111_111) > 0b0000_000_000_100_111) {
 14492:       M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION;
 14493:       throw M68kException.m6eSignal;
 14494:     }
 14495:     int n = w >> 12;
 14496:     int o = w << 31 - 11 >= 0 ? w >> 6 & 31 : XEiJ.regRn[w >> 6 & 7];  //o=offset
 14497:     w = -(w << 31 - 5 >= 0 ? w : XEiJ.regRn[w & 7]) & 31;  //w=32-width。1<=width<=32なので0<=32-width<=31
 14498:     XEiJ.mpuCycleCount += 6;
 14499:     int ea = XEiJ.regOC & 63;
 14500:     int z;
 14501:     if (ea < XEiJ.EA_AR) {  //BFEXTU Dr{~}
 14502:       z = XEiJ.regRn[ea];
 14503:       z = z << o | z >>> -o;  //下位からはみ出したフィールドは上位に戻る
 14504:     } else {  //BFEXTU <mem>{~}
 14505:       int a = efaCntLong (ea) + (o >> 3);
 14506:       o &= 7;
 14507:       z = 31 - w + o >> 3;
 14508:       z = (z == 0 ? mmuReadByteSignData (m60Address = a, XEiJ.regSRS) << 24 + o :  //不要なバイトにアクセスしない
 14509:            z == 1 ? mmuReadWordSignData (m60Address = a, XEiJ.regSRS) << 16 + o :  //020以上なのでアドレスエラーは出ない
 14510:            z == 2 ? (mmuReadWordSignData (m60Address = a, XEiJ.regSRS) << 8 | mmuReadByteZeroData (a + 2, XEiJ.regSRS)) << 8 + o :
 14511:            z == 3 ? mmuReadLongData (m60Address = a, XEiJ.regSRS) << o :
 14512:            mmuReadLongData (m60Address = a, XEiJ.regSRS) << o | mmuReadByteZeroData (m60Address = a + 4, XEiJ.regSRS) >>> 8 - o);
 14513:     }
 14514:     XEiJ.regRn[n] = z >>> w;  //ゼロ拡張
 14515:     z >>= w;  //符号拡張。下位のゴミを消す
 14516:     XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X);  //ccr_tst
 14517:   }  //irpBfextu
 14518: 
 14519:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 14520:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 14521:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 14522:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 14523:   //BFCHG <ea>{#o:#w}                               |-|--2346|-|-UUUU|-**00|D M  WXZ  |1110_101_011_mmm_rrr-00000ooooo0wwwww
 14524:   //BFCHG <ea>{#o:Dw}                               |-|--2346|-|-UUUU|-**00|D M  WXZ  |1110_101_011_mmm_rrr-00000ooooo100www
 14525:   //BFCHG <ea>{Do:#w}                               |-|--2346|-|-UUUU|-**00|D M  WXZ  |1110_101_011_mmm_rrr-0000100ooo0wwwww
 14526:   //BFCHG <ea>{Do:Dw}                               |-|--2346|-|-UUUU|-**00|D M  WXZ  |1110_101_011_mmm_rrr-0000100ooo100www
 14527:   public static void irpBfchg () throws M68kException {
 14528:     int w = mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);  //pcwz。拡張ワード
 14529:     if ((w & ~0b0000_111_111_111_111) != 0 ||
 14530:         (w & 0b0000_111_111_000_000) > 0b0000_100_111_000_000 ||
 14531:         (w & 0b0000_000_000_111_111) > 0b0000_000_000_100_111) {
 14532:       M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION;
 14533:       throw M68kException.m6eSignal;
 14534:     }
 14535:     int o = w << 31 - 11 >= 0 ? w >> 6 & 31 : XEiJ.regRn[w >> 6 & 7];  //o=offset
 14536:     w = -(w << 31 - 5 >= 0 ? w : XEiJ.regRn[w & 7]) & 31;  //w=32-width。1<=width<=32なので0<=32-width<=31
 14537:     XEiJ.mpuCycleCount += 8;
 14538:     int ea = XEiJ.regOC & 63;
 14539:     int z;
 14540:     if (ea < XEiJ.EA_AR) {  //BFCHG Dr{~}
 14541:       z = XEiJ.regRn[ea];
 14542:       z = z << o | z >>> -o;  //下位からはみ出したフィールドは上位に戻る
 14543:       int t = z ^ -1 << w;  //フィールドの幅だけ反転する
 14544:       XEiJ.regRn[ea] = t << -o | t >>> o;
 14545:     } else {  //BFCHG <mem>{~}
 14546:       int a = efaCltLong (ea) + (o >> 3);  //フィールドの最上位ビットを含むバイトのアドレス
 14547:       o &= 7;
 14548:       z = 31 - w + o >> 3;  //フィールドが跨ぐバイト境界の数。0~4
 14549:       if (z == 0) {
 14550:         //  <ea>{2,5}  o=2,w=32-5=27                        <ea>  --abcde-
 14551:         int t = mmuModifyByteSignData (a, XEiJ.regSRS) << 24;                     //          t  --abcde- 00000000 00000000 00000000  不要なバイトにアクセスしない
 14552:         z = t << o;                                //          z  abcde-00 00000000 00000000 00000000
 14553:         //                                         //      -1<<w  11111000 00000000 00000000 00000000
 14554:         //                                         //  -1<<w>>>o  00111110 00000000 00000000 00000000
 14555:         //                                         //t^-1<<w>>>o  --ABCDE- 00000000 00000000 00000000
 14556:         mmuWriteByteData (a, (t ^ -1 << w >>> o) >>> 24, XEiJ.regSRS);        //       <ea>  --ABCDE-
 14557:       } else if (z == 1) {
 14558:         //  <ea>{7,5}  o=7,w=32-5=27                        <ea>  -------a bcde----
 14559:         int t = mmuModifyWordSignData (a, XEiJ.regSRS) << 16;                     //          t  -------a bcde---- 00000000 00000000  020以上なのでアドレスエラーは出ない
 14560:         z = t << o;                                //          z  abcde--- -0000000 00000000 00000000
 14561:         //                                         //      -1<<w  11111000 00000000 00000000 00000000
 14562:         //                                         //  -1<<w>>>o  00000001 11110000 00000000 00000000
 14563:         //                                         //t^-1<<w>>>o  -------A BCDE---- 00000000 00000000
 14564:         mmuWriteWordData (a, (t ^ -1 << w >>> o) >>> 16, XEiJ.regSRS);       //       <ea>  -------A BCDE----
 14565:       } else if (z == 2) {
 14566:         //  <ea>{7,12}  o=7,w=32-12=20                      <ea>  -------a bcdefghi jkl-----
 14567:         int t = mmuModifyWordSignData (a, XEiJ.regSRS) << 16 | mmuModifyByteZeroData (a + 2, XEiJ.regSRS) << 8;  //          t  -------a bcdefghi jkl----- 00000000
 14568:         z = t << o;                                //          z  abcdefgh ijkl---- -0000000 00000000
 14569:         //                                         //      -1<<w  11111111 11110000 00000000 00000000
 14570:         //                                         //  -1<<w>>>o  00000001 11111111 11100000 00000000
 14571:         t ^= -1 << w >>> o;                        //          t  -------A BCDEFGHI JKL----- 00000000
 14572:         mmuWriteWordData (a, t >>> 16, XEiJ.regSRS);                         //       <ea>  -------A BCDEFGHI jkl-----
 14573:         mmuWriteByteData (a + 2, t >>> 8, XEiJ.regSRS);                       //       <ea>  -------A BCDEFGHI JKL-----
 14574:       } else if (z == 3) {
 14575:         //  <ea>{7,19}  o=7,w=32-19=13                      <ea>  -------a bcdefghi jklmnopq rs------
 14576:         int t = mmuModifyLongData (a, XEiJ.regSRS);                           //          t  -------a bcdefghi jklmnopq rs------
 14577:         z = t << o;                                //          z  abcdefgh ijklmnop qrs----- -0000000
 14578:         //                                         //      -1<<w  11111111 11111111 11100000 00000000
 14579:         //                                         //  -1<<w>>>o  00000001 11111111 11111111 11000000
 14580:         mmuWriteLongData (a, t ^ -1 << w >>> o, XEiJ.regSRS);                //       <ea>  -------A BCDEFGHI JKLMNOPQ RS------
 14581:       } else {
 14582:         //  <ea>{7,26}  o=7,w=32-26=6                       <ea>  -------a bcdefghi jklmnopq rstuvwxy z-------
 14583:         int t = mmuModifyLongData (a, XEiJ.regSRS);                           //          t  -------a bcdefghi jklmnopq rstuvwxy
 14584:         z = t << o;                                //          z  abcdefgh ijklmnop qrstuvwx y0000000
 14585:         //                                                -1>>>o  00000001 11111111 11111111 11111111
 14586:         mmuWriteLongData (a, t ^ -1 >>> o, XEiJ.regSRS);                     //       <ea>  -------A BCDEFGHI JKLMNOPQ RSTUVWXY
 14587:         t = mmuModifyByteZeroData (a + 4, XEiJ.regSRS);                           //          t  00000000 00000000 00000000 z-------
 14588:         //                                         //    t>>>8-o  00000000 00000000 00000000 0z------
 14589:         z |= t >>> 8 - o;                          //          z  abcdefgh ijklmnop qrstuvwx yz------
 14590:         //                                         //  -1<<8-o+w  11111111 11111111 11111111 10000000
 14591:         mmuWriteByteData (a + 4, t ^ -1 << 8 - o + w, XEiJ.regSRS);           //       <ea>  -------A BCDEFGHI JKLMNOPQ RSTUVWXY Z-------
 14592:       }
 14593:     }
 14594:     z >>= w;  //符号拡張。下位のゴミを消す
 14595:     XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X);  //ccr_tst
 14596:   }  //irpBfchg
 14597: 
 14598:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 14599:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 14600:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 14601:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 14602:   //BFEXTS <ea>{#o:#w},Dn                           |-|--2346|-|-UUUU|-**00|D M  WXZP |1110_101_111_mmm_rrr-0nnn0ooooo0wwwww
 14603:   //BFEXTS <ea>{#o:Dw},Dn                           |-|--2346|-|-UUUU|-**00|D M  WXZP |1110_101_111_mmm_rrr-0nnn0ooooo100www
 14604:   //BFEXTS <ea>{Do:#w},Dn                           |-|--2346|-|-UUUU|-**00|D M  WXZP |1110_101_111_mmm_rrr-0nnn100ooo0wwwww
 14605:   //BFEXTS <ea>{Do:Dw},Dn                           |-|--2346|-|-UUUU|-**00|D M  WXZP |1110_101_111_mmm_rrr-0nnn100ooo100www
 14606:   public static void irpBfexts () throws M68kException {
 14607:     int w = mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);  //pcwz。拡張ワード
 14608:     if ((w & ~0b0111_111_111_111_111) != 0 ||
 14609:         (w & 0b0000_111_111_000_000) > 0b0000_100_111_000_000 ||
 14610:         (w & 0b0000_000_000_111_111) > 0b0000_000_000_100_111) {
 14611:       M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION;
 14612:       throw M68kException.m6eSignal;
 14613:     }
 14614:     int n = w >> 12;
 14615:     int o = w << 31 - 11 >= 0 ? w >> 6 & 31 : XEiJ.regRn[w >> 6 & 7];  //o=offset
 14616:     w = -(w << 31 - 5 >= 0 ? w : XEiJ.regRn[w & 7]) & 31;  //w=32-width。1<=width<=32なので0<=32-width<=31
 14617:     XEiJ.mpuCycleCount += 6;
 14618:     int ea = XEiJ.regOC & 63;
 14619:     int z;
 14620:     if (ea < XEiJ.EA_AR) {  //BFEXTS Dr{~}
 14621:       z = XEiJ.regRn[ea];
 14622:       z = z << o | z >>> -o;  //下位からはみ出したフィールドは上位に戻る
 14623:     } else {  //BFEXTS <mem>{~}
 14624:       int a = efaCntLong (ea) + (o >> 3);  //フィールドの最上位ビットを含むバイトのアドレス
 14625:       o &= 7;
 14626:       z = 31 - w + o >> 3;  //フィールドが跨ぐバイト境界の数。0~4
 14627:       z = (z == 0 ? mmuReadByteSignData (m60Address = a, XEiJ.regSRS) << 24 + o :  //不要なバイトにアクセスしない
 14628:            z == 1 ? mmuReadWordSignData (m60Address = a, XEiJ.regSRS) << 16 + o :  //020以上なのでアドレスエラーは出ない
 14629:            z == 2 ? (mmuReadWordSignData (m60Address = a, XEiJ.regSRS) << 8 | mmuReadByteZeroData (a + 2, XEiJ.regSRS)) << 8 + o :
 14630:            z == 3 ? mmuReadLongData (m60Address = a, XEiJ.regSRS) << o :
 14631:            mmuReadLongData (m60Address = a, XEiJ.regSRS) << o | mmuReadByteZeroData (m60Address = a + 4, XEiJ.regSRS) >>> 8 - o);
 14632:     }
 14633:     XEiJ.regRn[n] = z >>= w;  //符号拡張。下位のゴミを消す
 14634:     XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X);  //ccr_tst
 14635:   }  //irpBfexts
 14636: 
 14637:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 14638:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 14639:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 14640:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 14641:   //BFCLR <ea>{#o:#w}                               |-|--2346|-|-UUUU|-**00|D M  WXZ  |1110_110_011_mmm_rrr-00000ooooo0wwwww
 14642:   //BFCLR <ea>{#o:Dw}                               |-|--2346|-|-UUUU|-**00|D M  WXZ  |1110_110_011_mmm_rrr-00000ooooo100www
 14643:   //BFCLR <ea>{Do:#w}                               |-|--2346|-|-UUUU|-**00|D M  WXZ  |1110_110_011_mmm_rrr-0000100ooo0wwwww
 14644:   //BFCLR <ea>{Do:Dw}                               |-|--2346|-|-UUUU|-**00|D M  WXZ  |1110_110_011_mmm_rrr-0000100ooo100www
 14645:   public static void irpBfclr () throws M68kException {
 14646:     int w = mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);  //pcwz。拡張ワード
 14647:     if ((w & ~0b0000_111_111_111_111) != 0 ||
 14648:         (w & 0b0000_111_111_000_000) > 0b0000_100_111_000_000 ||
 14649:         (w & 0b0000_000_000_111_111) > 0b0000_000_000_100_111) {
 14650:       M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION;
 14651:       throw M68kException.m6eSignal;
 14652:     }
 14653:     int o = w << 31 - 11 >= 0 ? w >> 6 & 31 : XEiJ.regRn[w >> 6 & 7];  //o=offset
 14654:     w = -(w << 31 - 5 >= 0 ? w : XEiJ.regRn[w & 7]) & 31;  //w=32-width。1<=width<=32なので0<=32-width<=31
 14655:     XEiJ.mpuCycleCount += 8;
 14656:     int ea = XEiJ.regOC & 63;
 14657:     int z;
 14658:     if (ea < XEiJ.EA_AR) {  //BFCLR Dr{~}
 14659:       z = XEiJ.regRn[ea];
 14660:       z = z << o | z >>> -o;  //下位からはみ出したフィールドは上位に戻る
 14661:       int t = z & ~(-1 << w);  //フィールドの幅だけ0を並べる
 14662:       XEiJ.regRn[ea] = t << -o | t >>> o;
 14663:     } else {  //BFCLR <mem>{~}
 14664:       int a = efaCltLong (ea) + (o >> 3);  //フィールドの最上位ビットを含むバイトのアドレス
 14665:       o &= 7;
 14666:       z = 31 - w + o >> 3;  //フィールドが跨ぐバイト境界の数。0~4
 14667:       if (z == 0) {
 14668:         //  <ea>{2,5}  o=2,w=32-5=27                        <ea>  --abcde-
 14669:         int t = mmuModifyByteSignData (a, XEiJ.regSRS) << 24;                     //          t  --abcde- 00000000 00000000 00000000  不要なバイトにアクセスしない
 14670:         z = t << o;                                //          z  abcde-00 00000000 00000000 00000000
 14671:         //                                         //      -1<<w  11111000 00000000 00000000 00000000
 14672:         //                                         //  -1<<w>>>o  00111110 00000000 00000000 00000000
 14673:         //                                        //~(-1<<w>>>o)  11000001 11111111 11111111 11111111
 14674:         //                                      //t&~(-1<<w>>>o)  --00000- 00000000 00000000 00000000
 14675:         mmuWriteByteData (a, (t & ~(-1 << w >>> o)) >>> 24, XEiJ.regSRS);     //       <ea>  --00000-
 14676:       } else if (z == 1) {
 14677:         //  <ea>{7,5}  o=7,w=32-5=27                        <ea>  -------a bcde----
 14678:         int t = mmuModifyWordSignData (a, XEiJ.regSRS) << 16;                     //          t  -------a bcde---- 00000000 00000000  020以上なのでアドレスエラーは出ない
 14679:         z = t << o;                                //          z  abcde--- -0000000 00000000 00000000
 14680:         //                                         //      -1<<w  11111000 00000000 00000000 00000000
 14681:         //                                         //  -1<<w>>>o  00000001 11110000 00000000 00000000
 14682:         //                                        //~(-1<<w>>>o)  11111110 00001111 11111111 11111111
 14683:         //                                      //t&~(-1<<w>>>o)  -------0 0000---- 00000000 00000000
 14684:         mmuWriteWordData (a, (t & ~(-1 << w >>> o)) >>> 16, XEiJ.regSRS);    //       <ea>  -------0 0000----
 14685:       } else if (z == 2) {
 14686:         //  <ea>{7,12}  o=7,w=32-12=20                      <ea>  -------a bcdefghi jkl-----
 14687:         int t = mmuModifyWordSignData (a, XEiJ.regSRS) << 16 | mmuModifyByteZeroData (a + 2, XEiJ.regSRS) << 8;  //          t  -------a bcdefghi jkl----- 00000000
 14688:         z = t << o;                                //          z  abcdefgh ijkl---- -0000000 00000000
 14689:         //                                         //      -1<<w  11111111 11110000 00000000 00000000
 14690:         //                                         //  -1<<w>>>o  00000001 11111111 11100000 00000000
 14691:         //                                        //~(-1<<w>>>o)  11111110 00000000 00011111 11111111
 14692:         t &= ~(-1 << w >>> o);                     //          t  -------0 00000000 000----- 00000000
 14693:         mmuWriteWordData (a, t >>> 16, XEiJ.regSRS);                         //       <ea>  -------0 00000000 jkl-----
 14694:         mmuWriteByteData (a + 2, t >>> 8, XEiJ.regSRS);                       //       <ea>  -------0 00000000 000-----
 14695:       } else if (z == 3) {
 14696:         //  <ea>{7,19}  o=7,w=32-19=13                      <ea>  -------a bcdefghi jklmnopq rs------
 14697:         int t = mmuModifyLongData (a, XEiJ.regSRS);                           //          t  -------a bcdefghi jklmnopq rs------
 14698:         z = t << o;                                //          z  abcdefgh ijklmnop qrs----- -0000000
 14699:         //                                         //      -1<<w  11111111 11111111 11100000 00000000
 14700:         //                                         //  -1<<w>>>o  00000001 11111111 11111111 11000000
 14701:         //                                        //~(-1<<w>>>o)  11111110 00000000 00000000 00111111
 14702:         mmuWriteLongData (a, t & ~(-1 << w >>> o), XEiJ.regSRS);             //       <ea>  -------0 00000000 00000000 00------
 14703:       } else {
 14704:         //  <ea>{7,26}  o=7,w=32-26=6                       <ea>  -------a bcdefghi jklmnopq rstuvwxy z-------
 14705:         int t = mmuModifyLongData (a, XEiJ.regSRS);                           //          t  -------a bcdefghi jklmnopq rstuvwxy
 14706:         z = t << o;                                //          z  abcdefgh ijklmnop qrstuvwx y0000000
 14707:         //                                                -1>>>o  00000001 11111111 11111111 11111111
 14708:         //                                             ~(-1>>>o)  11111110 00000000 00000000 00000000
 14709:         mmuWriteLongData (a, t & ~(-1 >>> o), XEiJ.regSRS);                  //       <ea>  -------0 00000000 00000000 00000000
 14710:         t = mmuModifyByteZeroData (a + 4, XEiJ.regSRS);                           //          t  00000000 00000000 00000000 z-------
 14711:         //                                         //    t>>>8-o  00000000 00000000 00000000 0z------
 14712:         z |= t >>> 8 - o;                          //          z  abcdefgh ijklmnop qrstuvwx yz------
 14713:         //                                         //  -1<<8-o+w  11111111 11111111 11111111 10000000
 14714:         //                                        //~(-1<<8-o+w)  00000000 00000000 00000000 01111111
 14715:         mmuWriteByteData (a + 4, t & ~(-1 << 8 - o + w), XEiJ.regSRS);        //       <ea>  -------0 00000000 00000000 00000000 0-------
 14716:       }
 14717:     }
 14718:     z >>= w;  //符号拡張。下位のゴミを消す
 14719:     XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X);  //ccr_tst
 14720:   }  //irpBfclr
 14721: 
 14722:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 14723:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 14724:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 14725:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 14726:   //BFFFO <ea>{#o:#w},Dn                            |-|--2346|-|-UUUU|-**00|D M  WXZP |1110_110_111_mmm_rrr-0nnn0ooooo0wwwww
 14727:   //BFFFO <ea>{#o:Dw},Dn                            |-|--2346|-|-UUUU|-**00|D M  WXZP |1110_110_111_mmm_rrr-0nnn0ooooo100www
 14728:   //BFFFO <ea>{Do:#w},Dn                            |-|--2346|-|-UUUU|-**00|D M  WXZP |1110_110_111_mmm_rrr-0nnn100ooo0wwwww
 14729:   //BFFFO <ea>{Do:Dw},Dn                            |-|--2346|-|-UUUU|-**00|D M  WXZP |1110_110_111_mmm_rrr-0nnn100ooo100www
 14730:   public static void irpBfffo () throws M68kException {
 14731:     int w = mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);  //pcwz。拡張ワード
 14732:     if ((w & ~0b0111_111_111_111_111) != 0 ||
 14733:         (w & 0b0000_111_111_000_000) > 0b0000_100_111_000_000 ||
 14734:         (w & 0b0000_000_000_111_111) > 0b0000_000_000_100_111) {
 14735:       M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION;
 14736:       throw M68kException.m6eSignal;
 14737:     }
 14738:     int n = w >> 12;
 14739:     int o = w << 31 - 11 >= 0 ? w >> 6 & 31 : XEiJ.regRn[w >> 6 & 7];  //o=offset
 14740:     w = -(w << 31 - 5 >= 0 ? w : XEiJ.regRn[w & 7]) & 31;  //w=32-width。1<=width<=32なので0<=32-width<=31
 14741:     XEiJ.mpuCycleCount += 9;
 14742:     int ea = XEiJ.regOC & 63;
 14743:     int z;
 14744:     if (ea < XEiJ.EA_AR) {  //BFFFO Dr{~}
 14745:       z = XEiJ.regRn[ea];
 14746:       z = z << o | z >>> -o;  //下位からはみ出したフィールドは上位に戻る
 14747:     } else {  //BFFFO <mem>{~}
 14748:       int a = efaCntLong (ea) + (o >> 3);  //フィールドの最上位ビットを含むバイトのアドレス
 14749:       int o7 = o & 7;
 14750:       z = 31 - w + o7 >> 3;  //フィールドが跨ぐバイト境界の数。0~4
 14751:       z = (z == 0 ? mmuReadByteSignData (m60Address = a, XEiJ.regSRS) << 24 + o7 :  //不要なバイトにアクセスしない
 14752:            z == 1 ? mmuReadWordSignData (m60Address = a, XEiJ.regSRS) << 16 + o7 :  //020以上なのでアドレスエラーは出ない
 14753:            z == 2 ? (mmuReadWordSignData (m60Address = a, XEiJ.regSRS) << 8 | mmuReadByteZeroData (a + 2, XEiJ.regSRS)) << 8 + o7 :
 14754:            z == 3 ? mmuReadLongData (m60Address = a, XEiJ.regSRS) << o7 :
 14755:            mmuReadLongData (m60Address = a, XEiJ.regSRS) << o7 | mmuReadByteZeroData (m60Address = a + 4, XEiJ.regSRS) >>> 8 - o7);
 14756:     }
 14757:     if (true) {
 14758:       XEiJ.regRn[n] = Integer.numberOfLeadingZeros (z >>> w) - w + o;  //ゼロ拡張してから1のビットを探す。見つからないときはoffset+widthになる
 14759:     } else {
 14760:       int t = z >>> w;
 14761:       if (t == 0) {
 14762:         XEiJ.regRn[n] = 32 - w + o;
 14763:       } else {
 14764:         int k = -(t >>> 16) >> 16 & 16;
 14765:         k += -(t >>> k + 8) >> 8 & 8;
 14766:         k += -(t >>> k + 4) >> 4 & 4;
 14767:         //     bit3  1  1  1  1  1  1  1  1  0  0  0  0  0  0  0  0
 14768:         //     bit2  1  1  1  1  0  0  0  0  1  1  1  1  0  0  0  0
 14769:         //     bit1  1  1  0  0  1  1  0  0  1  1  0  0  1  1  0  0
 14770:         //     bit0  1  0  1  0  1  0  1  0  1  0  1  0  1  0  1  0
 14771:         XEiJ.regRn[n] = ((0b11_11_11_11_11_11_11_11_10_10_10_10_01_01_00_00 >>> (t >>> k << 1)) & 3) + k - w + o;  //intのシフトカウントは下位5bitだけが使用される
 14772:       }
 14773:     }
 14774:     z >>= w;  //符号拡張。下位のゴミを消す
 14775:     XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X);  //ccr_tst
 14776:   }  //irpBfffo
 14777: 
 14778:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 14779:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 14780:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 14781:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 14782:   //BFSET <ea>{#o:#w}                               |-|--2346|-|-UUUU|-**00|D M  WXZ  |1110_111_011_mmm_rrr-00000ooooo0wwwww
 14783:   //BFSET <ea>{#o:Dw}                               |-|--2346|-|-UUUU|-**00|D M  WXZ  |1110_111_011_mmm_rrr-00000ooooo100www
 14784:   //BFSET <ea>{Do:#w}                               |-|--2346|-|-UUUU|-**00|D M  WXZ  |1110_111_011_mmm_rrr-0000100ooo0wwwww
 14785:   //BFSET <ea>{Do:Dw}                               |-|--2346|-|-UUUU|-**00|D M  WXZ  |1110_111_011_mmm_rrr-0000100ooo100www
 14786:   public static void irpBfset () throws M68kException {
 14787:     int w = mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);  //pcwz。拡張ワード
 14788:     if ((w & ~0b0000_111_111_111_111) != 0 ||
 14789:         (w & 0b0000_111_111_000_000) > 0b0000_100_111_000_000 ||
 14790:         (w & 0b0000_000_000_111_111) > 0b0000_000_000_100_111) {
 14791:       M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION;
 14792:       throw M68kException.m6eSignal;
 14793:     }
 14794:     int o = w << 31 - 11 >= 0 ? w >> 6 & 31 : XEiJ.regRn[w >> 6 & 7];  //o=offset
 14795:     w = -(w << 31 - 5 >= 0 ? w : XEiJ.regRn[w & 7]) & 31;  //w=32-width。1<=width<=32なので0<=32-width<=31
 14796:     XEiJ.mpuCycleCount += 8;
 14797:     int ea = XEiJ.regOC & 63;
 14798:     int z;
 14799:     if (ea < XEiJ.EA_AR) {  //BFSET Dr{~}
 14800:       z = XEiJ.regRn[ea];
 14801:       z = z << o | z >>> -o;  //下位からはみ出したフィールドは上位に戻る
 14802:       int t = z | -1 << w;  //フィールドの幅だけ1を並べる
 14803:       XEiJ.regRn[ea] = t << -o | t >>> o;
 14804:     } else {  //BFSET <mem>{~}
 14805:       int a = efaCltLong (ea) + (o >> 3);  //フィールドの最上位ビットを含むバイトのアドレス
 14806:       o &= 7;
 14807:       z = 31 - w + o >> 3;  //フィールドが跨ぐバイト境界の数。0~4
 14808:       if (z == 0) {
 14809:         //  <ea>{2,5}  o=2,w=32-5=27                        <ea>  --abcde-
 14810:         int t = mmuModifyByteSignData (a, XEiJ.regSRS) << 24;                     //          t  --abcde- 00000000 00000000 00000000  不要なバイトにアクセスしない
 14811:         z = t << o;                                //          z  abcde-00 00000000 00000000 00000000
 14812:         //                                         //      -1<<w  11111000 00000000 00000000 00000000
 14813:         //                                         //  -1<<w>>>o  00111110 00000000 00000000 00000000
 14814:         //                                         //t|-1<<w>>>o  --11111- 00000000 00000000 00000000
 14815:         mmuWriteByteData (a, (t | -1 << w >>> o) >>> 24, XEiJ.regSRS);        //       <ea>  --11111-
 14816:       } else if (z == 1) {
 14817:         //  <ea>{7,5}  o=7,w=32-5=27                        <ea>  -------a bcde----
 14818:         int t = mmuModifyWordSignData (a, XEiJ.regSRS) << 16;                     //          t  -------a bcde---- 00000000 00000000  020以上なのでアドレスエラーは出ない
 14819:         z = t << o;                                //          z  abcde--- -0000000 00000000 00000000
 14820:         //                                         //      -1<<w  11111000 00000000 00000000 00000000
 14821:         //                                         //  -1<<w>>>o  00000001 11110000 00000000 00000000
 14822:         //                                         //t|-1<<w>>>o  -------1 1111---- 00000000 00000000
 14823:         mmuWriteWordData (a, (t | -1 << w >>> o) >>> 16, XEiJ.regSRS);       //       <ea>  -------1 1111----
 14824:       } else if (z == 2) {
 14825:         //  <ea>{7,12}  o=7,w=32-12=20                      <ea>  -------a bcdefghi jkl-----
 14826:         int t = mmuModifyWordSignData (a, XEiJ.regSRS) << 16 | mmuModifyByteZeroData (a + 2, XEiJ.regSRS) << 8;  //          t  -------a bcdefghi jkl----- 00000000
 14827:         z = t << o;                                //          z  abcdefgh ijkl---- -0000000 00000000
 14828:         //                                         //      -1<<w  11111111 11110000 00000000 00000000
 14829:         //                                         //  -1<<w>>>o  00000001 11111111 11100000 00000000
 14830:         t |= -1 << w >>> o;                        //          t  -------1 11111111 111----- 00000000
 14831:         mmuWriteWordData (a, t >>> 16, XEiJ.regSRS);                         //       <ea>  -------1 11111111 jkl-----
 14832:         mmuWriteByteData (a + 2, t >>> 8, XEiJ.regSRS);                       //       <ea>  -------1 11111111 111-----
 14833:       } else if (z == 3) {
 14834:         //  <ea>{7,19}  o=7,w=32-19=13                      <ea>  -------a bcdefghi jklmnopq rs------
 14835:         int t = mmuModifyLongData (a, XEiJ.regSRS);                           //          t  -------a bcdefghi jklmnopq rs------
 14836:         z = t << o;                                //          z  abcdefgh ijklmnop qrs----- -0000000
 14837:         //                                         //      -1<<w  11111111 11111111 11100000 00000000
 14838:         //                                         //  -1<<w>>>o  00000001 11111111 11111111 11000000
 14839:         mmuWriteLongData (a, t | -1 << w >>> o, XEiJ.regSRS);                //       <ea>  -------1 11111111 11111111 11------
 14840:       } else {
 14841:         //  <ea>{7,26}  o=7,w=32-26=6                       <ea>  -------a bcdefghi jklmnopq rstuvwxy z-------
 14842:         int t = mmuModifyLongData (a, XEiJ.regSRS);                           //          t  -------a bcdefghi jklmnopq rstuvwxy
 14843:         z = t << o;                                //          z  abcdefgh ijklmnop qrstuvwx y0000000
 14844:         //                                                -1>>>o  00000001 11111111 11111111 11111111
 14845:         mmuWriteLongData (a, t | -1 >>> o, XEiJ.regSRS);                     //       <ea>  -------1 11111111 11111111 11111111
 14846:         t = mmuModifyByteZeroData (a + 4, XEiJ.regSRS);                           //          t  00000000 00000000 00000000 z-------
 14847:         //                                         //    t>>>8-o  00000000 00000000 00000000 0z------
 14848:         z |= t >>> 8 - o;                          //          z  abcdefgh ijklmnop qrstuvwx yz------
 14849:         //                                         //  -1<<8-o+w  11111111 11111111 11111111 10000000
 14850:         mmuWriteByteData (a + 4, t | -1 << 8 - o + w, XEiJ.regSRS);           //       <ea>  -------1 11111111 11111111 11111111 1-------
 14851:       }
 14852:     }
 14853:     z >>= w;  //符号拡張。下位のゴミを消す
 14854:     XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X);  //ccr_tst
 14855:   }  //irpBfset
 14856: 
 14857:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 14858:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 14859:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 14860:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 14861:   //BFINS Dn,<ea>{#o:#w}                            |-|--2346|-|-UUUU|-**00|D M  WXZ  |1110_111_111_mmm_rrr-0nnn0ooooo0wwwww
 14862:   //BFINS Dn,<ea>{#o:Dw}                            |-|--2346|-|-UUUU|-**00|D M  WXZ  |1110_111_111_mmm_rrr-0nnn0ooooo100www
 14863:   //BFINS Dn,<ea>{Do:#w}                            |-|--2346|-|-UUUU|-**00|D M  WXZ  |1110_111_111_mmm_rrr-0nnn100ooo0wwwww
 14864:   //BFINS Dn,<ea>{Do:Dw}                            |-|--2346|-|-UUUU|-**00|D M  WXZ  |1110_111_111_mmm_rrr-0nnn100ooo100www
 14865:   public static void irpBfins () throws M68kException {
 14866:     int w = mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);  //pcwz。拡張ワード
 14867:     if ((w & ~0b0111_111_111_111_111) != 0 ||
 14868:         (w & 0b0000_111_111_000_000) > 0b0000_100_111_000_000 ||
 14869:         (w & 0b0000_000_000_111_111) > 0b0000_000_000_100_111) {
 14870:       M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION;
 14871:       throw M68kException.m6eSignal;
 14872:     }
 14873:     int n = w >> 12;
 14874:     int o = w << 31 - 11 >= 0 ? w >> 6 & 31 : XEiJ.regRn[w >> 6 & 7];  //o=offset
 14875:     w = -(w << 31 - 5 >= 0 ? w : XEiJ.regRn[w & 7]) & 31;  //w=32-width。1<=width<=32なので0<=32-width<=31
 14876:     XEiJ.mpuCycleCount += 6;
 14877:     int ea = XEiJ.regOC & 63;
 14878:     int z = XEiJ.regRn[n] << w;  //z=Dn<<-width
 14879:     if (ea < XEiJ.EA_AR) {  //BFINS Dn,Dr{~}
 14880:       //  Dr{30,5}  o=30,w=32-5=27                          t=Dr  cde----- -------- -------- ------ab
 14881:       //                                                    t<<o  ab000000 00000000 00000000 00000000
 14882:       //                                                  t>>>-o  00cde--- -------- -------- --------
 14883:       //                                             t<<o|t>>>-o  abcde--- -------- -------- --------
 14884:       //                                                   -1<<w  11111000 00000000 00000000 00000000
 14885:       //                                                ~(-1<<w)  00000111 11111111 11111111 11111111
 14886:       //                                  (t<<o|t>>>-o)&~(-1<<w)  00000--- -------- -------- --------
 14887:       //                                                    r[n]  -------- -------- -------- ---ABCDE
 14888:       //                                               z=r[n]<<w  ABCDE000 00000000 00000000 00000000
 14889:       //                              t=(t<<o|t>>>-o)&~(-1<<w)|z  ABCDE--- -------- -------- --------
 14890:       //                                                   t<<-o  CDE----- -------- -------- ------00
 14891:       //                                                   t>>>o  00000000 00000000 00000000 000000AB
 14892:       //                                             t<<-o|t>>>o  CDE----- -------- -------- ------AB
 14893:       int t = XEiJ.regRn[ea];
 14894:       t = (t << o | t >>> -o) & ~(-1 << w) | z;
 14895:       XEiJ.regRn[ea] = t << -o | t >>> o;
 14896:     } else {  //BFINS Dn,<mem>{~}
 14897:       int a = efaCltLong (ea) + (o >> 3);  //フィールドの最上位ビットを含むバイトのアドレス
 14898:       o &= 7;
 14899:       n = 31 - w + o >> 3;  //フィールドが跨ぐバイト境界の数。0~4
 14900:       if (n == 0) {
 14901:         //  <ea>{2,5}  o=2,w=32-5=27                        <ea>  --abcde-
 14902:         //                                         XEiJ.busRbs(a)<<24  --abcde- 00000000 00000000 00000000
 14903:         //                                                 -1<<w  11111000 00000000 00000000 00000000
 14904:         //                                             -1<<w>>>o  00111110 00000000 00000000 00000000
 14905:         //                                          ~(-1<<w>>>o)  11000001 11111111 11111111 11111111
 14906:         //                            XEiJ.busRbs(a)<<24&~(-1<<w>>>o)  --00000- 00000000 00000000 00000000
 14907:         //                                                  r[n]  -------- -------- -------- ---ABCDE
 14908:         //                                             z=r[n]<<w  ABCDE000 00000000 00000000 00000000
 14909:         //                                                 z>>>o  00ABCDE0 00000000 00000000 00000000
 14910:         //                      XEiJ.busRbs(a)<<24&~(-1<<w>>>o)|z>>>o  --ABCDE- 00000000 00000000 00000000
 14911:         mmuWriteByteData (a, (mmuModifyByteSignData (a, XEiJ.regSRS) << 24 & ~(-1 << w >>> o) | z >>> o) >>> 24, XEiJ.regSRS);
 14912:       } else if (n == 1) {
 14913:         //  <ea>{3,11}  o=3,w=32-11=21                      <ea>  ---abcde fghijk--
 14914:         //                                            rws(a)<<16  ---abcde fghijk-- 00000000 00000000
 14915:         //                                                 -1<<w  11111111 11100000 00000000 00000000
 14916:         //                                             -1<<w>>>o  00011111 11111100 00000000 00000000
 14917:         //                                          ~(-1<<w>>>o)  11100000 00000011 11111111 11111111
 14918:         //                               rws(a)<<16&~(-1<<w>>>o)  ---00000 000000-- 00000000 00000000
 14919:         //                                                  r[n]  -------- -------- -----ABC DEFGHIJK
 14920:         //                                             z=r[n]<<w  ABCDEFGH IJK00000 00000000 00000000
 14921:         //                                                 z>>>o  000ABCDE FGHIJK00 00000000 00000000
 14922:         //                         rws(a)<<16&~(-1<<w>>>o)|z>>>o  ---ABCDE FGHIJK-- 00000000 00000000
 14923:         mmuWriteWordData (a, (mmuModifyWordSignData (a, XEiJ.regSRS) << 16 & ~(-1 << w >>> o) | z >>> o) >>> 16, XEiJ.regSRS);
 14924:       } else if (n == 2) {
 14925:         //  <ea>{4,17}  o=4,w=32-17=15                      <ea>  ----abcd efghijkl mnopq---
 14926:         //                                rws(a)<<16|rbz(a+2)<<8  ----abcd efghijkl mnopq--- 00000000
 14927:         //                                                 -1<<w  11111111 11111111 10000000 00000000
 14928:         //                                             -1<<w>>>o  00001111 11111111 11111000 00000000
 14929:         //                                          ~(-1<<w>>>o)  11110000 00000000 00000111 11111111
 14930:         //                 (rws(a)<<16|rbz(a+2)<<8)&~(-1<<w>>>o)  ----0000 00000000 00000--- 00000000
 14931:         //                                                  r[n]  -------- -------A BCDEFGHI JKLMNOPQ
 14932:         //                                             z=r[n]<<w  ABCDEFGH IJKLMNOP Q0000000 00000000
 14933:         //                                                 z>>>o  0000ABCD EFGHIJKL MNOPQ000 00000000
 14934:         //           (rws(a)<<16|rbz(a+2)<<8)&~(-1<<w>>>o)|z>>>o  ----ABCD EFGHIJKL MNOPQ--- 00000000
 14935:         int t = (mmuModifyWordSignData (a, XEiJ.regSRS) << 16 | mmuModifyByteZeroData (a + 2, XEiJ.regSRS) << 8) & ~(-1 << w >>> o) | z >>> o;
 14936:         mmuWriteWordData (a, t >>> 16, XEiJ.regSRS);
 14937:         mmuWriteByteData (a + 2, t >>> 8, XEiJ.regSRS);
 14938:       } else if (n == 3) {
 14939:         //  <ea>{5,23}  o=5,w=32-23=9                       <ea>  -----abc defghijk lmnopqrs tuvw----
 14940:         //                                                rls(a)  -----abc defghijk lmnopqrs tuvw----
 14941:         //                                                 -1<<w  11111111 11111111 11111110 00000000
 14942:         //                                             -1<<w>>>o  00000111 11111111 11111111 11110000
 14943:         //                                          ~(-1<<w>>>o)  11111000 00000000 00000000 00001111
 14944:         //                                   rls(a)&~(-1<<w>>>o)  -----000 00000000 00000000 0000----
 14945:         //                                                  r[n]  -------- -ABCDEFG HIJKLMNO PQRSTUVW
 14946:         //                                             z=r[n]<<w  ABCDEFGH IJKLMNOP QRSTUVW0 00000000
 14947:         //                                                 z>>>o  00000ABC DEFGHIJK LMNOPQRS TUVW0000
 14948:         //                             rls(a)&~(-1<<w>>>o)|z>>>o  -----ABC DEFGHIJK LMNOPQRS TUVW----
 14949:         mmuWriteLongData (a, mmuModifyLongData (a, XEiJ.regSRS) & ~(-1 << w >>> o) | z >>> o, XEiJ.regSRS);
 14950:       } else {
 14951:         //  <ea>{6,29}  o=6,w=32-29=3                       <ea>  ------ab cdefghij klmnopqr stuvwxyz abc-----
 14952:         //                                                rls(a)  ------ab cdefghij klmnopqr stuvwxyz
 14953:         //                                                -1>>>o  00000011 11111111 11111111 11111111
 14954:         //                                             ~(-1>>>o)  11111100 00000000 00000000 00000000
 14955:         //                                      rls(a)&~(-1>>>o)  ------00 00000000 00000000 00000000
 14956:         //                                                  r[n]  ---ABCDE FGHIJKLM NOPQRSTU VWXYZABC
 14957:         //                                             z=r[n]<<w  ABCDEFGH IJKLMNOP QRSTUVWX YZABC000
 14958:         //                                                 z>>>o  000000AB CDEFGHIJ KLMNOPQR STUVWXYZ
 14959:         //                                rls(a)&~(-1>>>o)|z>>>o  ------AB CDEFGHIJ KLMNOPQR STUVWXYZ
 14960:         mmuWriteLongData (a, mmuModifyLongData (a, XEiJ.regSRS) & ~(-1 >>> o) | z >>> o, XEiJ.regSRS);
 14961:         //                                              rbz(a+4)  00000000 00000000 00000000 abc-----
 14962:         //                                             -1<<8-o+w  11111111 11111111 11111111 11100000
 14963:         //                                          ~(-1<<8-o+w)  00000000 00000000 00000000 00011111
 14964:         //                                 rbz(a+4)&~(-1<<8-o+w)  00000000 00000000 00000000 000-----
 14965:         //                                                z<<8-o  CDEFGHIJ KLMNOPQR STUVWXYZ ABC00000
 14966:         //                          rbz(a+4)&~(-1<<8-o+w)|z<<8-o  CDEFGHIJ KLMNOPQR STUVWXYZ ABC-----
 14967:         mmuWriteByteData (a + 4, mmuModifyByteZeroData (a + 4, XEiJ.regSRS) & ~(-1 << 8 - o + w) | z << 8 - o, XEiJ.regSRS);
 14968:       }
 14969:     }
 14970:     //zは上位に寄ったままだが下位の空きは0なのでそのままテストする
 14971:     XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X);  //ccr_tst
 14972:   }  //irpBfins
 14973: 
 14974:   //浮動小数点例外
 14975:   //  48  BSUN   FP分岐または比較不能状態でのセット
 14976:   //  49  INEX   FP不正確な結果
 14977:   //  50  DZ     FPゼロによる除算
 14978:   //  51  UNFL   FPアンダーフロー
 14979:   //  52  OPERR  FPオペランドエラー
 14980:   //  53  OVFL   FPオーバーフロー
 14981:   //  54  SNAN   FPシグナリングNAN
 14982:   //  55         FP未実装データ型
 14983:   //FPSRのビットオフセット→例外ベクタ番号
 14984: /*
 14985:   public static final int[] FP_OFFSET_TO_NUMBER = {
 14986:     0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 14987:     48,  //16  15  BSUN   48  BSUN   FP分岐または比較不能状態でのセット
 14988:     54,  //17  14  SNAN   54  SNAN   FPシグナリングNAN
 14989:     52,  //18  13  OPERR  52  OPERR  FPオペランドエラー
 14990:     53,  //19  12  OVFL   53  OVFL   FPオーバーフロー
 14991:     51,  //20  11  UNFL   51  UNFL   FPアンダーフロー
 14992:     50,  //21  10  DZ     50  DZ     FPゼロによる除算
 14993:     49,  //22   9  INEX2  49  INEX   FP不正確な結果
 14994:     49,  //23   8  INEX1  49  INEX   FP不正確な結果
 14995:     0, 0, 0, 0, 0, 0, 0, 0,
 14996:   };
 14997: */
 14998:   public static final byte[] FP_OFFSET_TO_NUMBER = "\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\00006453211\0\0\0\0\0\0\0\0".getBytes (XEiJ.ISO_8859_1);
 14999: 
 15000:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 15001:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 15002:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 15003:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 15004:   //FTST.X FPm                                      |-|--CC46|-|-----|-----|          |1111_001_000_000_000-000mmm0000111010
 15005:   //FMOVE.X FPm,FPn                                 |-|--CC46|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0000000
 15006:   //FINT.X FPm,FPn                                  |-|--CCS6|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0000001
 15007:   //FSINH.X FPm,FPn                                 |-|--CCSS|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0000010
 15008:   //FINTRZ.X FPm,FPn                                |-|--CCS6|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0000011
 15009:   //FSQRT.X FPm,FPn                                 |-|--CC46|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0000100
 15010:   //FLOGNP1.X FPm,FPn                               |-|--CCSS|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0000110
 15011:   //FETOXM1.X FPm,FPn                               |-|--CCSS|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0001000
 15012:   //FTANH.X FPm,FPn                                 |-|--CCSS|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0001001
 15013:   //FATAN.X FPm,FPn                                 |-|--CCSS|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0001010
 15014:   //FASIN.X FPm,FPn                                 |-|--CCSS|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0001100
 15015:   //FATANH.X FPm,FPn                                |-|--CCSS|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0001101
 15016:   //FSIN.X FPm,FPn                                  |-|--CCSS|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0001110
 15017:   //FTAN.X FPm,FPn                                  |-|--CCSS|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0001111
 15018:   //FETOX.X FPm,FPn                                 |-|--CCSS|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0010000
 15019:   //FTWOTOX.X FPm,FPn                               |-|--CCSS|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0010001
 15020:   //FTENTOX.X FPm,FPn                               |-|--CCSS|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0010010
 15021:   //FLOGN.X FPm,FPn                                 |-|--CCSS|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0010100
 15022:   //FLOG10.X FPm,FPn                                |-|--CCSS|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0010101
 15023:   //FLOG2.X FPm,FPn                                 |-|--CCSS|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0010110
 15024:   //FABS.X FPm,FPn                                  |-|--CC46|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0011000
 15025:   //FCOSH.X FPm,FPn                                 |-|--CCSS|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0011001
 15026:   //FNEG.X FPm,FPn                                  |-|--CC46|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0011010
 15027:   //FACOS.X FPm,FPn                                 |-|--CCSS|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0011100
 15028:   //FCOS.X FPm,FPn                                  |-|--CCSS|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0011101
 15029:   //FGETEXP.X FPm,FPn                               |-|--CCSS|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0011110
 15030:   //FGETMAN.X FPm,FPn                               |-|--CCSS|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0011111
 15031:   //FDIV.X FPm,FPn                                  |-|--CC46|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0100000
 15032:   //FMOD.X FPm,FPn                                  |-|--CCSS|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0100001
 15033:   //FADD.X FPm,FPn                                  |-|--CC46|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0100010
 15034:   //FMUL.X FPm,FPn                                  |-|--CC46|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0100011
 15035:   //FSGLDIV.X FPm,FPn                               |-|--CCS6|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0100100
 15036:   //FREM.X FPm,FPn                                  |-|--CCSS|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0100101
 15037:   //FSCALE.X FPm,FPn                                |-|--CCSS|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0100110
 15038:   //FSGLMUL.X FPm,FPn                               |-|--CCS6|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0100111
 15039:   //FSUB.X FPm,FPn                                  |-|--CC46|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0101000
 15040:   //FCMP.X FPm,FPn                                  |-|--CC46|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0111000
 15041:   //FSMOVE.X FPm,FPn                                |-|----46|-|-----|-----|          |1111_001_000_000_000-000mmmnnn1000000
 15042:   //FSSQRT.X FPm,FPn                                |-|----46|-|-----|-----|          |1111_001_000_000_000-000mmmnnn1000001
 15043:   //FDMOVE.X FPm,FPn                                |-|----46|-|-----|-----|          |1111_001_000_000_000-000mmmnnn1000100
 15044:   //FDSQRT.X FPm,FPn                                |-|----46|-|-----|-----|          |1111_001_000_000_000-000mmmnnn1000101
 15045:   //FSABS.X FPm,FPn                                 |-|----46|-|-----|-----|          |1111_001_000_000_000-000mmmnnn1011000
 15046:   //FSNEG.X FPm,FPn                                 |-|----46|-|-----|-----|          |1111_001_000_000_000-000mmmnnn1011010
 15047:   //FDABS.X FPm,FPn                                 |-|----46|-|-----|-----|          |1111_001_000_000_000-000mmmnnn1011100
 15048:   //FDNEG.X FPm,FPn                                 |-|----46|-|-----|-----|          |1111_001_000_000_000-000mmmnnn1011110
 15049:   //FSDIV.X FPm,FPn                                 |-|----46|-|-----|-----|          |1111_001_000_000_000-000mmmnnn1100000
 15050:   //FSADD.X FPm,FPn                                 |-|----46|-|-----|-----|          |1111_001_000_000_000-000mmmnnn1100010
 15051:   //FSMUL.X FPm,FPn                                 |-|----46|-|-----|-----|          |1111_001_000_000_000-000mmmnnn1100011
 15052:   //FDDIV.X FPm,FPn                                 |-|----46|-|-----|-----|          |1111_001_000_000_000-000mmmnnn1100100
 15053:   //FDADD.X FPm,FPn                                 |-|----46|-|-----|-----|          |1111_001_000_000_000-000mmmnnn1100110
 15054:   //FDMUL.X FPm,FPn                                 |-|----46|-|-----|-----|          |1111_001_000_000_000-000mmmnnn1100111
 15055:   //FSSUB.X FPm,FPn                                 |-|----46|-|-----|-----|          |1111_001_000_000_000-000mmmnnn1101000
 15056:   //FDSUB.X FPm,FPn                                 |-|----46|-|-----|-----|          |1111_001_000_000_000-000mmmnnn1101100
 15057:   //FSINCOS.X FPm,FPc:FPs                           |-|--CCSS|-|-----|-----|          |1111_001_000_000_000-000mmmsss0110ccc
 15058:   //FMOVECR.X #ccc,FPn                              |-|--CCSS|-|-----|-----|          |1111_001_000_000_000-010111nnn0cccccc
 15059:   //FMOVE.L FPn,<ea>                                |-|--CC46|-|-----|-----|D M+-WXZ  |1111_001_000_mmm_rrr-011000nnn0000000
 15060:   //FMOVE.S FPn,<ea>                                |-|--CC46|-|-----|-----|D M+-WXZ  |1111_001_000_mmm_rrr-011001nnn0000000
 15061:   //FMOVE.W FPn,<ea>                                |-|--CC46|-|-----|-----|D M+-WXZ  |1111_001_000_mmm_rrr-011100nnn0000000
 15062:   //FMOVE.B FPn,<ea>                                |-|--CC46|-|-----|-----|D M+-WXZ  |1111_001_000_mmm_rrr-011110nnn0000000
 15063:   //FMOVE.L FPIAR,<ea>                              |-|--CC46|-|-----|-----|DAM+-WXZ  |1111_001_000_mmm_rrr-1010010000000000
 15064:   //FMOVEM.L FPIAR,<ea>                             |-|--CC46|-|-----|-----|DAM+-WXZ  |1111_001_000_mmm_rrr-1010010000000000
 15065:   //FMOVE.L FPSR,<ea>                               |-|--CC46|-|-----|-----|D M+-WXZ  |1111_001_000_mmm_rrr-1010100000000000
 15066:   //FMOVEM.L FPSR,<ea>                              |-|--CC46|-|-----|-----|D M+-WXZ  |1111_001_000_mmm_rrr-1010100000000000
 15067:   //FMOVE.L FPCR,<ea>                               |-|--CC46|-|-----|-----|D M+-WXZ  |1111_001_000_mmm_rrr-1011000000000000
 15068:   //FMOVEM.L FPCR,<ea>                              |-|--CC46|-|-----|-----|D M+-WXZ  |1111_001_000_mmm_rrr-1011000000000000
 15069:   //FTST.L <ea>                                     |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-0100000000111010
 15070:   //FMOVE.L <ea>,FPn                                |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0000000
 15071:   //FINT.L <ea>,FPn                                 |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0000001
 15072:   //FSINH.L <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0000010
 15073:   //FINTRZ.L <ea>,FPn                               |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0000011
 15074:   //FSQRT.L <ea>,FPn                                |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0000100
 15075:   //FLOGNP1.L <ea>,FPn                              |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0000110
 15076:   //FETOXM1.L <ea>,FPn                              |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0001000
 15077:   //FTANH.L <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0001001
 15078:   //FATAN.L <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0001010
 15079:   //FASIN.L <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0001100
 15080:   //FATANH.L <ea>,FPn                               |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0001101
 15081:   //FSIN.L <ea>,FPn                                 |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0001110
 15082:   //FTAN.L <ea>,FPn                                 |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0001111
 15083:   //FETOX.L <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0010000
 15084:   //FTWOTOX.L <ea>,FPn                              |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0010001
 15085:   //FTENTOX.L <ea>,FPn                              |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0010010
 15086:   //FLOGN.L <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0010100
 15087:   //FLOG10.L <ea>,FPn                               |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0010101
 15088:   //FLOG2.L <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0010110
 15089:   //FABS.L <ea>,FPn                                 |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0011000
 15090:   //FCOSH.L <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0011001
 15091:   //FNEG.L <ea>,FPn                                 |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0011010
 15092:   //FACOS.L <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0011100
 15093:   //FCOS.L <ea>,FPn                                 |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0011101
 15094:   //FGETEXP.L <ea>,FPn                              |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0011110
 15095:   //FGETMAN.L <ea>,FPn                              |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0011111
 15096:   //FDIV.L <ea>,FPn                                 |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0100000
 15097:   //FMOD.L <ea>,FPn                                 |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0100001
 15098:   //FADD.L <ea>,FPn                                 |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0100010
 15099:   //FMUL.L <ea>,FPn                                 |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0100011
 15100:   //FSGLDIV.L <ea>,FPn                              |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0100100
 15101:   //FREM.L <ea>,FPn                                 |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0100101
 15102:   //FSCALE.L <ea>,FPn                               |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0100110
 15103:   //FSGLMUL.L <ea>,FPn                              |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0100111
 15104:   //FSUB.L <ea>,FPn                                 |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0101000
 15105:   //FCMP.L <ea>,FPn                                 |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0111000
 15106:   //FSMOVE.L <ea>,FPn                               |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn1000000
 15107:   //FSSQRT.L <ea>,FPn                               |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn1000001
 15108:   //FDMOVE.L <ea>,FPn                               |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn1000100
 15109:   //FDSQRT.L <ea>,FPn                               |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn1000101
 15110:   //FSABS.L <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn1011000
 15111:   //FSNEG.L <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn1011010
 15112:   //FDABS.L <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn1011100
 15113:   //FDNEG.L <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn1011110
 15114:   //FSDIV.L <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn1100000
 15115:   //FSADD.L <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn1100010
 15116:   //FSMUL.L <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn1100011
 15117:   //FDDIV.L <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn1100100
 15118:   //FDADD.L <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn1100110
 15119:   //FDMUL.L <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn1100111
 15120:   //FSSUB.L <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn1101000
 15121:   //FDSUB.L <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn1101100
 15122:   //FSINCOS.L <ea>,FPc:FPs                          |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000sss0110ccc
 15123:   //FTST.S <ea>                                     |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-0100010000111010
 15124:   //FMOVE.S <ea>,FPn                                |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0000000
 15125:   //FINT.S <ea>,FPn                                 |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0000001
 15126:   //FSINH.S <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0000010
 15127:   //FINTRZ.S <ea>,FPn                               |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0000011
 15128:   //FSQRT.S <ea>,FPn                                |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0000100
 15129:   //FLOGNP1.S <ea>,FPn                              |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0000110
 15130:   //FETOXM1.S <ea>,FPn                              |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0001000
 15131:   //FTANH.S <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0001001
 15132:   //FATAN.S <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0001010
 15133:   //FASIN.S <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0001100
 15134:   //FATANH.S <ea>,FPn                               |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0001101
 15135:   //FSIN.S <ea>,FPn                                 |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0001110
 15136:   //FTAN.S <ea>,FPn                                 |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0001111
 15137:   //FETOX.S <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0010000
 15138:   //FTWOTOX.S <ea>,FPn                              |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0010001
 15139:   //FTENTOX.S <ea>,FPn                              |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0010010
 15140:   //FLOGN.S <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0010100
 15141:   //FLOG10.S <ea>,FPn                               |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0010101
 15142:   //FLOG2.S <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0010110
 15143:   //FABS.S <ea>,FPn                                 |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0011000
 15144:   //FCOSH.S <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0011001
 15145:   //FNEG.S <ea>,FPn                                 |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0011010
 15146:   //FACOS.S <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0011100
 15147:   //FCOS.S <ea>,FPn                                 |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0011101
 15148:   //FGETEXP.S <ea>,FPn                              |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0011110
 15149:   //FGETMAN.S <ea>,FPn                              |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0011111
 15150:   //FDIV.S <ea>,FPn                                 |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0100000
 15151:   //FMOD.S <ea>,FPn                                 |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0100001
 15152:   //FADD.S <ea>,FPn                                 |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0100010
 15153:   //FMUL.S <ea>,FPn                                 |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0100011
 15154:   //FSGLDIV.S <ea>,FPn                              |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0100100
 15155:   //FREM.S <ea>,FPn                                 |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0100101
 15156:   //FSCALE.S <ea>,FPn                               |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0100110
 15157:   //FSGLMUL.S <ea>,FPn                              |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0100111
 15158:   //FSUB.S <ea>,FPn                                 |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0101000
 15159:   //FCMP.S <ea>,FPn                                 |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0111000
 15160:   //FSMOVE.S <ea>,FPn                               |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn1000000
 15161:   //FSSQRT.S <ea>,FPn                               |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn1000001
 15162:   //FDMOVE.S <ea>,FPn                               |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn1000100
 15163:   //FDSQRT.S <ea>,FPn                               |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn1000101
 15164:   //FSABS.S <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn1011000
 15165:   //FSNEG.S <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn1011010
 15166:   //FDABS.S <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn1011100
 15167:   //FDNEG.S <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn1011110
 15168:   //FSDIV.S <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn1100000
 15169:   //FSADD.S <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn1100010
 15170:   //FSMUL.S <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn1100011
 15171:   //FDDIV.S <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn1100100
 15172:   //FDADD.S <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn1100110
 15173:   //FDMUL.S <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn1100111
 15174:   //FSSUB.S <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn1101000
 15175:   //FDSUB.S <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn1101100
 15176:   //FSINCOS.S <ea>,FPc:FPs                          |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001sss0110ccc
 15177:   //FTST.W <ea>                                     |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-0101000000111010
 15178:   //FMOVE.W <ea>,FPn                                |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0000000
 15179:   //FINT.W <ea>,FPn                                 |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0000001
 15180:   //FSINH.W <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0000010
 15181:   //FINTRZ.W <ea>,FPn                               |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0000011
 15182:   //FSQRT.W <ea>,FPn                                |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0000100
 15183:   //FLOGNP1.W <ea>,FPn                              |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0000110
 15184:   //FETOXM1.W <ea>,FPn                              |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0001000
 15185:   //FTANH.W <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0001001
 15186:   //FATAN.W <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0001010
 15187:   //FASIN.W <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0001100
 15188:   //FATANH.W <ea>,FPn                               |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0001101
 15189:   //FSIN.W <ea>,FPn                                 |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0001110
 15190:   //FTAN.W <ea>,FPn                                 |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0001111
 15191:   //FETOX.W <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0010000
 15192:   //FTWOTOX.W <ea>,FPn                              |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0010001
 15193:   //FTENTOX.W <ea>,FPn                              |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0010010
 15194:   //FLOGN.W <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0010100
 15195:   //FLOG10.W <ea>,FPn                               |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0010101
 15196:   //FLOG2.W <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0010110
 15197:   //FABS.W <ea>,FPn                                 |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0011000
 15198:   //FCOSH.W <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0011001
 15199:   //FNEG.W <ea>,FPn                                 |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0011010
 15200:   //FACOS.W <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0011100
 15201:   //FCOS.W <ea>,FPn                                 |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0011101
 15202:   //FGETEXP.W <ea>,FPn                              |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0011110
 15203:   //FGETMAN.W <ea>,FPn                              |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0011111
 15204:   //FDIV.W <ea>,FPn                                 |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0100000
 15205:   //FMOD.W <ea>,FPn                                 |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0100001
 15206:   //FADD.W <ea>,FPn                                 |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0100010
 15207:   //FMUL.W <ea>,FPn                                 |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0100011
 15208:   //FSGLDIV.W <ea>,FPn                              |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0100100
 15209:   //FREM.W <ea>,FPn                                 |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0100101
 15210:   //FSCALE.W <ea>,FPn                               |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0100110
 15211:   //FSGLMUL.W <ea>,FPn                              |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0100111
 15212:   //FSUB.W <ea>,FPn                                 |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0101000
 15213:   //FCMP.W <ea>,FPn                                 |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0111000
 15214:   //FSMOVE.W <ea>,FPn                               |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn1000000
 15215:   //FSSQRT.W <ea>,FPn                               |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn1000001
 15216:   //FDMOVE.W <ea>,FPn                               |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn1000100
 15217:   //FDSQRT.W <ea>,FPn                               |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn1000101
 15218:   //FSABS.W <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn1011000
 15219:   //FSNEG.W <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn1011010
 15220:   //FDABS.W <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn1011100
 15221:   //FDNEG.W <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn1011110
 15222:   //FSDIV.W <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn1100000
 15223:   //FSADD.W <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn1100010
 15224:   //FSMUL.W <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn1100011
 15225:   //FDDIV.W <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn1100100
 15226:   //FDADD.W <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn1100110
 15227:   //FDMUL.W <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn1100111
 15228:   //FSSUB.W <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn1101000
 15229:   //FDSUB.W <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn1101100
 15230:   //FSINCOS.W <ea>,FPc:FPs                          |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100sss0110ccc
 15231:   //FTST.B <ea>                                     |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-0101100000111010
 15232:   //FMOVE.B <ea>,FPn                                |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0000000
 15233:   //FINT.B <ea>,FPn                                 |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0000001
 15234:   //FSINH.B <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0000010
 15235:   //FINTRZ.B <ea>,FPn                               |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0000011
 15236:   //FSQRT.B <ea>,FPn                                |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0000100
 15237:   //FLOGNP1.B <ea>,FPn                              |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0000110
 15238:   //FETOXM1.B <ea>,FPn                              |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0001000
 15239:   //FTANH.B <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0001001
 15240:   //FATAN.B <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0001010
 15241:   //FASIN.B <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0001100
 15242:   //FATANH.B <ea>,FPn                               |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0001101
 15243:   //FSIN.B <ea>,FPn                                 |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0001110
 15244:   //FTAN.B <ea>,FPn                                 |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0001111
 15245:   //FETOX.B <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0010000
 15246:   //FTWOTOX.B <ea>,FPn                              |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0010001
 15247:   //FTENTOX.B <ea>,FPn                              |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0010010
 15248:   //FLOGN.B <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0010100
 15249:   //FLOG10.B <ea>,FPn                               |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0010101
 15250:   //FLOG2.B <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0010110
 15251:   //FABS.B <ea>,FPn                                 |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0011000
 15252:   //FCOSH.B <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0011001
 15253:   //FNEG.B <ea>,FPn                                 |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0011010
 15254:   //FACOS.B <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0011100
 15255:   //FCOS.B <ea>,FPn                                 |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0011101
 15256:   //FGETEXP.B <ea>,FPn                              |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0011110
 15257:   //FGETMAN.B <ea>,FPn                              |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0011111
 15258:   //FDIV.B <ea>,FPn                                 |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0100000
 15259:   //FMOD.B <ea>,FPn                                 |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0100001
 15260:   //FADD.B <ea>,FPn                                 |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0100010
 15261:   //FMUL.B <ea>,FPn                                 |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0100011
 15262:   //FSGLDIV.B <ea>,FPn                              |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0100100
 15263:   //FREM.B <ea>,FPn                                 |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0100101
 15264:   //FSCALE.B <ea>,FPn                               |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0100110
 15265:   //FSGLMUL.B <ea>,FPn                              |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0100111
 15266:   //FSUB.B <ea>,FPn                                 |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0101000
 15267:   //FCMP.B <ea>,FPn                                 |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0111000
 15268:   //FSMOVE.B <ea>,FPn                               |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn1000000
 15269:   //FSSQRT.B <ea>,FPn                               |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn1000001
 15270:   //FDMOVE.B <ea>,FPn                               |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn1000100
 15271:   //FDSQRT.B <ea>,FPn                               |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn1000101
 15272:   //FSABS.B <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn1011000
 15273:   //FSNEG.B <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn1011010
 15274:   //FDABS.B <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn1011100
 15275:   //FDNEG.B <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn1011110
 15276:   //FSDIV.B <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn1100000
 15277:   //FSADD.B <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn1100010
 15278:   //FSMUL.B <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn1100011
 15279:   //FDDIV.B <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn1100100
 15280:   //FDADD.B <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn1100110
 15281:   //FDMUL.B <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn1100111
 15282:   //FSSUB.B <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn1101000
 15283:   //FDSUB.B <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn1101100
 15284:   //FSINCOS.B <ea>,FPc:FPs                          |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110sss0110ccc
 15285:   //FMOVE.L <ea>,FPIAR                              |-|--CC46|-|-----|-----|DAM+-WXZPI|1111_001_000_mmm_rrr-1000010000000000
 15286:   //FMOVEM.L <ea>,FPIAR                             |-|--CC46|-|-----|-----|DAM+-WXZPI|1111_001_000_mmm_rrr-1000010000000000
 15287:   //FMOVE.L <ea>,FPSR                               |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-1000100000000000
 15288:   //FMOVEM.L <ea>,FPSR                              |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-1000100000000000
 15289:   //FMOVE.L <ea>,FPCR                               |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-1001000000000000
 15290:   //FMOVEM.L <ea>,FPCR                              |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-1001000000000000
 15291:   //FMOVE.X FPn,<ea>                                |-|--CC46|-|-----|-----|  M+-WXZ  |1111_001_000_mmm_rrr-011010nnn0000000
 15292:   //FMOVE.P FPn,<ea>{#k}                            |-|--CCSS|-|-----|-----|  M+-WXZ  |1111_001_000_mmm_rrr-011011nnnkkkkkkk
 15293:   //FMOVE.D FPn,<ea>                                |-|--CC46|-|-----|-----|  M+-WXZ  |1111_001_000_mmm_rrr-011101nnn0000000
 15294:   //FMOVE.P FPn,<ea>{Dk}                            |-|--CCSS|-|-----|-----|  M+-WXZ  |1111_001_000_mmm_rrr-011111nnnkkk0000
 15295:   //FMOVEM.L FPSR/FPIAR,<ea>                        |-|--CC46|-|-----|-----|  M+-WXZ  |1111_001_000_mmm_rrr-1010110000000000
 15296:   //FMOVEM.L FPCR/FPIAR,<ea>                        |-|--CC46|-|-----|-----|  M+-WXZ  |1111_001_000_mmm_rrr-1011010000000000
 15297:   //FMOVEM.L FPCR/FPSR,<ea>                         |-|--CC46|-|-----|-----|  M+-WXZ  |1111_001_000_mmm_rrr-1011100000000000
 15298:   //FMOVEM.L FPCR/FPSR/FPIAR,<ea>                   |-|--CC46|-|-----|-----|  M+-WXZ  |1111_001_000_mmm_rrr-1011110000000000
 15299:   //FMOVEM.X #<data>,<ea>                           |-|--CC46|-|-----|-----|  M  WXZ  |1111_001_000_mmm_rrr-11110000dddddddd
 15300:   //FMOVEM.X <list>,<ea>                            |-|--CC46|-|-----|-----|  M  WXZ  |1111_001_000_mmm_rrr-11110000llllllll
 15301:   //FMOVEM.X Dl,<ea>                                |-|--CC4S|-|-----|-----|  M  WXZ  |1111_001_000_mmm_rrr-111110000lll0000
 15302:   //FMOVEM.L <ea>,FPSR/FPIAR                        |-|--CC46|-|-----|-----|  M+-WXZP |1111_001_000_mmm_rrr-1000110000000000
 15303:   //FMOVEM.L <ea>,FPCR/FPIAR                        |-|--CC46|-|-----|-----|  M+-WXZP |1111_001_000_mmm_rrr-1001010000000000
 15304:   //FMOVEM.L <ea>,FPCR/FPSR                         |-|--CC46|-|-----|-----|  M+-WXZP |1111_001_000_mmm_rrr-1001100000000000
 15305:   //FMOVEM.L <ea>,FPCR/FPSR/FPIAR                   |-|--CC46|-|-----|-----|  M+-WXZP |1111_001_000_mmm_rrr-1001110000000000
 15306:   //FMOVEM.X <ea>,#<data>                           |-|--CC46|-|-----|-----|  M+ WXZP |1111_001_000_mmm_rrr-11010000dddddddd
 15307:   //FMOVEM.X <ea>,<list>                            |-|--CC46|-|-----|-----|  M+ WXZP |1111_001_000_mmm_rrr-11010000llllllll
 15308:   //FMOVEM.X <ea>,Dl                                |-|--CC4S|-|-----|-----|  M+ WXZP |1111_001_000_mmm_rrr-110110000lll0000
 15309:   //FTST.X <ea>                                     |-|--CC46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-0100100000111010
 15310:   //FMOVE.X <ea>,FPn                                |-|--CC46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0000000
 15311:   //FINT.X <ea>,FPn                                 |-|--CCS6|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0000001
 15312:   //FSINH.X <ea>,FPn                                |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0000010
 15313:   //FINTRZ.X <ea>,FPn                               |-|--CCS6|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0000011
 15314:   //FSQRT.X <ea>,FPn                                |-|--CC46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0000100
 15315:   //FLOGNP1.X <ea>,FPn                              |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0000110
 15316:   //FETOXM1.X <ea>,FPn                              |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0001000
 15317:   //FTANH.X <ea>,FPn                                |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0001001
 15318:   //FATAN.X <ea>,FPn                                |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0001010
 15319:   //FASIN.X <ea>,FPn                                |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0001100
 15320:   //FATANH.X <ea>,FPn                               |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0001101
 15321:   //FSIN.X <ea>,FPn                                 |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0001110
 15322:   //FTAN.X <ea>,FPn                                 |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0001111
 15323:   //FETOX.X <ea>,FPn                                |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0010000
 15324:   //FTWOTOX.X <ea>,FPn                              |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0010001
 15325:   //FTENTOX.X <ea>,FPn                              |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0010010
 15326:   //FLOGN.X <ea>,FPn                                |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0010100
 15327:   //FLOG10.X <ea>,FPn                               |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0010101
 15328:   //FLOG2.X <ea>,FPn                                |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0010110
 15329:   //FABS.X <ea>,FPn                                 |-|--CC46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0011000
 15330:   //FCOSH.X <ea>,FPn                                |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0011001
 15331:   //FNEG.X <ea>,FPn                                 |-|--CC46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0011010
 15332:   //FACOS.X <ea>,FPn                                |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0011100
 15333:   //FCOS.X <ea>,FPn                                 |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0011101
 15334:   //FGETEXP.X <ea>,FPn                              |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0011110
 15335:   //FGETMAN.X <ea>,FPn                              |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0011111
 15336:   //FDIV.X <ea>,FPn                                 |-|--CC46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0100000
 15337:   //FMOD.X <ea>,FPn                                 |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0100001
 15338:   //FADD.X <ea>,FPn                                 |-|--CC46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0100010
 15339:   //FMUL.X <ea>,FPn                                 |-|--CC46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0100011
 15340:   //FSGLDIV.X <ea>,FPn                              |-|--CCS6|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0100100
 15341:   //FREM.X <ea>,FPn                                 |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0100101
 15342:   //FSCALE.X <ea>,FPn                               |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0100110
 15343:   //FSGLMUL.X <ea>,FPn                              |-|--CCS6|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0100111
 15344:   //FSUB.X <ea>,FPn                                 |-|--CC46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0101000
 15345:   //FCMP.X <ea>,FPn                                 |-|--CC46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0111000
 15346:   //FSMOVE.X <ea>,FPn                               |-|----46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn1000000
 15347:   //FSSQRT.X <ea>,FPn                               |-|----46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn1000001
 15348:   //FDMOVE.X <ea>,FPn                               |-|----46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn1000100
 15349:   //FDSQRT.X <ea>,FPn                               |-|----46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn1000101
 15350:   //FSABS.X <ea>,FPn                                |-|----46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn1011000
 15351:   //FSNEG.X <ea>,FPn                                |-|----46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn1011010
 15352:   //FDABS.X <ea>,FPn                                |-|----46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn1011100
 15353:   //FDNEG.X <ea>,FPn                                |-|----46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn1011110
 15354:   //FSDIV.X <ea>,FPn                                |-|----46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn1100000
 15355:   //FSADD.X <ea>,FPn                                |-|----46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn1100010
 15356:   //FSMUL.X <ea>,FPn                                |-|----46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn1100011
 15357:   //FDDIV.X <ea>,FPn                                |-|----46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn1100100
 15358:   //FDADD.X <ea>,FPn                                |-|----46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn1100110
 15359:   //FDMUL.X <ea>,FPn                                |-|----46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn1100111
 15360:   //FSSUB.X <ea>,FPn                                |-|----46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn1101000
 15361:   //FDSUB.X <ea>,FPn                                |-|----46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn1101100
 15362:   //FSINCOS.X <ea>,FPc:FPs                          |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010sss0110ccc
 15363:   //FTST.P <ea>                                     |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-0100110000111010
 15364:   //FMOVE.P <ea>,FPn                                |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0000000
 15365:   //FINT.P <ea>,FPn                                 |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0000001
 15366:   //FSINH.P <ea>,FPn                                |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0000010
 15367:   //FINTRZ.P <ea>,FPn                               |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0000011
 15368:   //FSQRT.P <ea>,FPn                                |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0000100
 15369:   //FLOGNP1.P <ea>,FPn                              |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0000110
 15370:   //FETOXM1.P <ea>,FPn                              |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0001000
 15371:   //FTANH.P <ea>,FPn                                |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0001001
 15372:   //FATAN.P <ea>,FPn                                |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0001010
 15373:   //FASIN.P <ea>,FPn                                |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0001100
 15374:   //FATANH.P <ea>,FPn                               |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0001101
 15375:   //FSIN.P <ea>,FPn                                 |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0001110
 15376:   //FTAN.P <ea>,FPn                                 |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0001111
 15377:   //FETOX.P <ea>,FPn                                |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0010000
 15378:   //FTWOTOX.P <ea>,FPn                              |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0010001
 15379:   //FTENTOX.P <ea>,FPn                              |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0010010
 15380:   //FLOGN.P <ea>,FPn                                |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0010100
 15381:   //FLOG10.P <ea>,FPn                               |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0010101
 15382:   //FLOG2.P <ea>,FPn                                |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0010110
 15383:   //FABS.P <ea>,FPn                                 |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0011000
 15384:   //FCOSH.P <ea>,FPn                                |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0011001
 15385:   //FNEG.P <ea>,FPn                                 |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0011010
 15386:   //FACOS.P <ea>,FPn                                |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0011100
 15387:   //FCOS.P <ea>,FPn                                 |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0011101
 15388:   //FGETEXP.P <ea>,FPn                              |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0011110
 15389:   //FGETMAN.P <ea>,FPn                              |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0011111
 15390:   //FDIV.P <ea>,FPn                                 |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0100000
 15391:   //FMOD.P <ea>,FPn                                 |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0100001
 15392:   //FADD.P <ea>,FPn                                 |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0100010
 15393:   //FMUL.P <ea>,FPn                                 |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0100011
 15394:   //FSGLDIV.P <ea>,FPn                              |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0100100
 15395:   //FREM.P <ea>,FPn                                 |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0100101
 15396:   //FSCALE.P <ea>,FPn                               |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0100110
 15397:   //FSGLMUL.P <ea>,FPn                              |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0100111
 15398:   //FSUB.P <ea>,FPn                                 |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0101000
 15399:   //FCMP.P <ea>,FPn                                 |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0111000
 15400:   //FSMOVE.P <ea>,FPn                               |-|----SS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn1000000
 15401:   //FSSQRT.P <ea>,FPn                               |-|----SS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn1000001
 15402:   //FDMOVE.P <ea>,FPn                               |-|----SS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn1000100
 15403:   //FDSQRT.P <ea>,FPn                               |-|----SS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn1000101
 15404:   //FSABS.P <ea>,FPn                                |-|----SS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn1011000
 15405:   //FSNEG.P <ea>,FPn                                |-|----SS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn1011010
 15406:   //FDABS.P <ea>,FPn                                |-|----SS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn1011100
 15407:   //FDNEG.P <ea>,FPn                                |-|----SS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn1011110
 15408:   //FSDIV.P <ea>,FPn                                |-|----SS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn1100000
 15409:   //FSADD.P <ea>,FPn                                |-|----SS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn1100010
 15410:   //FSMUL.P <ea>,FPn                                |-|----SS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn1100011
 15411:   //FDDIV.P <ea>,FPn                                |-|----SS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn1100100
 15412:   //FDADD.P <ea>,FPn                                |-|----SS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn1100110
 15413:   //FDMUL.P <ea>,FPn                                |-|----SS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn1100111
 15414:   //FSSUB.P <ea>,FPn                                |-|----SS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn1101000
 15415:   //FDSUB.P <ea>,FPn                                |-|----SS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn1101100
 15416:   //FSINCOS.P <ea>,FPc:FPs                          |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011sss0110ccc
 15417:   //FTST.D <ea>                                     |-|--CC46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-0101010000111010
 15418:   //FMOVE.D <ea>,FPn                                |-|--CC46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0000000
 15419:   //FINT.D <ea>,FPn                                 |-|--CCS6|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0000001
 15420:   //FSINH.D <ea>,FPn                                |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0000010
 15421:   //FINTRZ.D <ea>,FPn                               |-|--CCS6|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0000011
 15422:   //FSQRT.D <ea>,FPn                                |-|--CC46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0000100
 15423:   //FLOGNP1.D <ea>,FPn                              |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0000110
 15424:   //FETOXM1.D <ea>,FPn                              |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0001000
 15425:   //FTANH.D <ea>,FPn                                |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0001001
 15426:   //FATAN.D <ea>,FPn                                |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0001010
 15427:   //FASIN.D <ea>,FPn                                |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0001100
 15428:   //FATANH.D <ea>,FPn                               |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0001101
 15429:   //FSIN.D <ea>,FPn                                 |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0001110
 15430:   //FTAN.D <ea>,FPn                                 |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0001111
 15431:   //FETOX.D <ea>,FPn                                |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0010000
 15432:   //FTWOTOX.D <ea>,FPn                              |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0010001
 15433:   //FTENTOX.D <ea>,FPn                              |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0010010
 15434:   //FLOGN.D <ea>,FPn                                |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0010100
 15435:   //FLOG10.D <ea>,FPn                               |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0010101
 15436:   //FLOG2.D <ea>,FPn                                |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0010110
 15437:   //FABS.D <ea>,FPn                                 |-|--CC46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0011000
 15438:   //FCOSH.D <ea>,FPn                                |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0011001
 15439:   //FNEG.D <ea>,FPn                                 |-|--CC46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0011010
 15440:   //FACOS.D <ea>,FPn                                |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0011100
 15441:   //FCOS.D <ea>,FPn                                 |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0011101
 15442:   //FGETEXP.D <ea>,FPn                              |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0011110
 15443:   //FGETMAN.D <ea>,FPn                              |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0011111
 15444:   //FDIV.D <ea>,FPn                                 |-|--CC46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0100000
 15445:   //FMOD.D <ea>,FPn                                 |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0100001
 15446:   //FADD.D <ea>,FPn                                 |-|--CC46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0100010
 15447:   //FMUL.D <ea>,FPn                                 |-|--CC46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0100011
 15448:   //FSGLDIV.D <ea>,FPn                              |-|--CCS6|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0100100
 15449:   //FREM.D <ea>,FPn                                 |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0100101
 15450:   //FSCALE.D <ea>,FPn                               |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0100110
 15451:   //FSGLMUL.D <ea>,FPn                              |-|--CCS6|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0100111
 15452:   //FSUB.D <ea>,FPn                                 |-|--CC46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0101000
 15453:   //FCMP.D <ea>,FPn                                 |-|--CC46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0111000
 15454:   //FSMOVE.D <ea>,FPn                               |-|----46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn1000000
 15455:   //FSSQRT.D <ea>,FPn                               |-|----46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn1000001
 15456:   //FDMOVE.D <ea>,FPn                               |-|----46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn1000100
 15457:   //FDSQRT.D <ea>,FPn                               |-|----46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn1000101
 15458:   //FSABS.D <ea>,FPn                                |-|----46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn1011000
 15459:   //FSNEG.D <ea>,FPn                                |-|----46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn1011010
 15460:   //FDABS.D <ea>,FPn                                |-|----46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn1011100
 15461:   //FDNEG.D <ea>,FPn                                |-|----46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn1011110
 15462:   //FSDIV.D <ea>,FPn                                |-|----46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn1100000
 15463:   //FSADD.D <ea>,FPn                                |-|----46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn1100010
 15464:   //FSMUL.D <ea>,FPn                                |-|----46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn1100011
 15465:   //FDDIV.D <ea>,FPn                                |-|----46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn1100100
 15466:   //FDADD.D <ea>,FPn                                |-|----46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn1100110
 15467:   //FDMUL.D <ea>,FPn                                |-|----46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn1100111
 15468:   //FSSUB.D <ea>,FPn                                |-|----46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn1101000
 15469:   //FDSUB.D <ea>,FPn                                |-|----46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn1101100
 15470:   //FSINCOS.D <ea>,FPc:FPs                          |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101sss0110ccc
 15471:   //FMOVEM.X #<data>,-(Ar)                          |-|--CC46|-|-----|-----|    -     |1111_001_000_100_rrr-11100000dddddddd
 15472:   //FMOVEM.X <list>,-(Ar)                           |-|--CC46|-|-----|-----|    -     |1111_001_000_100_rrr-11100000llllllll
 15473:   //FMOVEM.X Dl,-(Ar)                               |-|--CC4S|-|-----|-----|    -     |1111_001_000_100_rrr-111010000lll0000
 15474:   //FMOVEM.L #<data>,#<data>,FPSR/FPIAR             |-|--CC4S|-|-----|-----|         I|1111_001_000_111_100-1000110000000000-{data}
 15475:   //FMOVEM.L #<data>,#<data>,FPCR/FPIAR             |-|--CC4S|-|-----|-----|         I|1111_001_000_111_100-1001010000000000-{data}
 15476:   //FMOVEM.L #<data>,#<data>,FPCR/FPSR              |-|--CC4S|-|-----|-----|         I|1111_001_000_111_100-1001100000000000-{data}
 15477:   //FMOVEM.L #<data>,#<data>,#<data>,FPCR/FPSR/FPIAR|-|--CC4S|-|-----|-----|         I|1111_001_000_111_100-1001110000000000-{data}
 15478:   @SuppressWarnings ("fallthrough") public static void irpFgen () throws M68kException {
 15479:   fgen: {
 15480:     if ((7 & XEiJ.currentOnchipFPU) == 0) {
 15481:       irpFline ();
 15482:       break fgen;
 15483:     }
 15484:     XEiJ.mpuCycleCount++;
 15485:     int ea = XEiJ.regOC & 63;
 15486:     int a = XEiJ.regPC;
 15487:     XEiJ.regPC = a + 2;
 15488:     int w = mmuReadWordZeroExword (a, XEiJ.regSRS);  //pcwz。拡張ワード
 15489:     int m = w >> 10 & 7;
 15490:     int n = w >> 7 & 7;
 15491:     int c = w & 0x7f;
 15492:     XEiJ.fpuBox.epbSetRoundingPrec (XEiJ.fpuBox.epbFpcr >> 6 & 3);  //丸め桁数
 15493:     XEiJ.fpuBox.epbSetRoundingMode (XEiJ.fpuBox.epbFpcr >> 4 & 3);  //丸めモード
 15494:     a = 0;  //実効アドレス
 15495:     //XEiJ.fpuBox.epbExceptionStatusWord = 0;
 15496: 
 15497: 
 15498:     switch (w >> 13) {
 15499: 
 15500: 
 15501:     case 0b010:  //$4xxx-$5xxx: Fop.* <ea>,FPn
 15502:       XEiJ.fpuBox.epbFpsr &= 0x00ff00ff;
 15503:       XEiJ.fpuBox.epbFpiar = XEiJ.regPC0;  //FPIARはFMOVEM/FMOVE FPcr/FSAVE/FRESTORE以外の命令で例外が発生しなくても更新される
 15504: 
 15505:       switch (m) {
 15506: 
 15507:       case 0b000:  //$40xx-$43xx: Fop.L <ea>,FPn
 15508:         {
 15509:           XEiJ.mpuCycleCount += 3;
 15510:           int i;
 15511:           if (ea < XEiJ.EA_AR) {  //Dr
 15512:             XEiJ.mpuCycleCount += 2;
 15513:             //a = 0;
 15514:             i = XEiJ.regRn[ea];
 15515:           } else if (ea == XEiJ.EA_IM) {  //#<data>
 15516:             a = XEiJ.regPC;
 15517:             XEiJ.regPC = a + 4;
 15518:             i = mmuReadLongExword (a, XEiJ.regSRS);  //pcls
 15519:           } else {  //Dr,#<data>以外
 15520:             a = efaAnyLong (ea);
 15521:             i = mmuReadLongData (a, XEiJ.regSRS);
 15522:           }
 15523:           XEiJ.fpuFPn[m = EFPBox.EPB_SRC_TMP].seti (i);
 15524:         }
 15525:         break;
 15526: 
 15527:       case 0b001:  //$44xx-$47xx: Fop.S <ea>,FPn
 15528:         {
 15529:           int i;
 15530:           if (ea < XEiJ.EA_AR) {  //Dr
 15531:             XEiJ.mpuCycleCount += 2;
 15532:             //a = 0;
 15533:             i = XEiJ.regRn[ea];
 15534:           } else if (ea == XEiJ.EA_IM) {  //#<data>
 15535:             a = XEiJ.regPC;
 15536:             XEiJ.regPC = a + 4;
 15537:             i = mmuReadLongExword (a, XEiJ.regSRS);  //pcls
 15538:           } else {  //Dr,#<data>以外
 15539:             a = efaAnyLong (ea);
 15540:             i = mmuReadLongData (a, XEiJ.regSRS);
 15541:           }
 15542:           XEiJ.fpuFPn[m = EFPBox.EPB_SRC_TMP].setf0 (i);
 15543:         }
 15544:         break;
 15545: 
 15546:       case 0b010:  //$48xx-$4Bxx: Fop.X <ea>,FPn
 15547:         {
 15548:           int[] ib = new int[3];
 15549:           if (ea == 074) {  //#<data>
 15550:             if (!XEiJ.fpuBox.epbIsFullSpec ()) {  //12バイトのイミディエイト
 15551:               irpExceptionFormat0 (M68kException.M6E_UNIMPLEMENTED_EFFECTIVE << 2, XEiJ.regPC0);  //pcは命令の先頭
 15552:               break fgen;
 15553:             }
 15554:             a = (XEiJ.regPC += 12) - 12;
 15555:             ib[0] = mmuReadLongExword (a, XEiJ.regSRS);
 15556:             ib[1] = mmuReadLongExword (a + 4, XEiJ.regSRS);
 15557:             ib[2] = mmuReadLongExword (a + 8, XEiJ.regSRS);
 15558:           } else {  //#<data>以外
 15559:             a = efaMemExtd (ea);
 15560:             if ((ea & 070) == 040) {  //-(Ar)
 15561:               ib[2] = mmuReadLongData (m60Address = a + 8, XEiJ.regSRS);
 15562:               ib[1] = mmuReadLongData (m60Address = a + 4, XEiJ.regSRS);
 15563:               ib[0] = mmuReadLongData (m60Address = a, XEiJ.regSRS);
 15564:             } else {  //-(Ar)以外
 15565:               ib[0] = mmuReadLongData (m60Address = a, XEiJ.regSRS);
 15566:               ib[1] = mmuReadLongData (m60Address = a + 4, XEiJ.regSRS);
 15567:               ib[2] = mmuReadLongData (m60Address = a + 8, XEiJ.regSRS);
 15568:             }
 15569:           }
 15570:           if (XEiJ.fpuBox.epbIsTriple ()) {  //三倍精度
 15571:             XEiJ.fpuFPn[m = EFPBox.EPB_SRC_TMP].sety012 (ib, 0);
 15572:           } else {  //拡張精度
 15573:             XEiJ.fpuFPn[m = EFPBox.EPB_SRC_TMP].setx012 (ib, 0);
 15574:           }
 15575:         }
 15576:         break;
 15577: 
 15578:       case 0b011:  //$4Cxx-$4Fxx: Fop.P <ea>,FPn
 15579:         {
 15580:           int[] ib = new int[3];
 15581:           if (ea == 074) {  //#<data>
 15582:             if (!XEiJ.fpuBox.epbIsFullSpec ()) {  //12バイトのイミディエイト
 15583:               irpExceptionFormat0 (M68kException.M6E_UNIMPLEMENTED_EFFECTIVE << 2, XEiJ.regPC0);  //pcは命令の先頭
 15584:               break fgen;
 15585:             }
 15586:             a = (XEiJ.regPC += 12) - 12;
 15587:             ib[0] = mmuReadLongExword (a, XEiJ.regSRS);
 15588:             ib[1] = mmuReadLongExword (a + 4, XEiJ.regSRS);
 15589:             ib[2] = mmuReadLongExword (a + 8, XEiJ.regSRS);
 15590:           } else {  //#<data>以外
 15591:             a = efaMemExtd (ea);
 15592:             if ((ea & 070) == 040) {  //-(Ar)
 15593:               ib[2] = mmuReadLongData (m60Address = a + 8, XEiJ.regSRS);
 15594:               ib[1] = mmuReadLongData (m60Address = a + 4, XEiJ.regSRS);
 15595:               ib[0] = mmuReadLongData (m60Address = a, XEiJ.regSRS);
 15596:             } else {  //-(Ar)以外
 15597:               ib[0] = mmuReadLongData (m60Address = a, XEiJ.regSRS);
 15598:               ib[1] = mmuReadLongData (m60Address = a + 4, XEiJ.regSRS);
 15599:               ib[2] = mmuReadLongData (m60Address = a + 8, XEiJ.regSRS);
 15600:             }
 15601:           }
 15602:           if (!XEiJ.fpuBox.epbIsFullSpec ()) {  //パックトデシマル
 15603:             XEiJ.fpuBox.epbExceptionStatusWord = 0xe000 | M68kException.M6E_FP_UNSUPPORTED_DATA_TYPE & 7;
 15604:             irpExceptionFormat2 (M68kException.M6E_FP_UNSUPPORTED_DATA_TYPE << 2, XEiJ.regPC, a);  //pcは次の命令,アドレスはソースオペランド
 15605:             break fgen;
 15606:           }
 15607:           XEiJ.fpuFPn[m = EFPBox.EPB_SRC_TMP].setp012 (ib, 0);
 15608:         }
 15609:         break;
 15610: 
 15611:       case 0b100:  //$50xx-$53xx: Fop.W <ea>,FPn
 15612:         {
 15613:           XEiJ.mpuCycleCount += 3;
 15614:           int i;
 15615:           if (ea < XEiJ.EA_AR) {  //Dr
 15616:             XEiJ.mpuCycleCount += 2;
 15617:             //a = 0;
 15618:             i = (short) XEiJ.regRn[ea];
 15619:           } else if (ea == XEiJ.EA_IM) {  //#<data>
 15620:             a = XEiJ.regPC;
 15621:             XEiJ.regPC = a + 2;
 15622:             i = mmuReadWordSignExword (a, XEiJ.regSRS);  //pcws
 15623:           } else {  //Dr,#<data>以外
 15624:             a = efaAnyWord (ea);
 15625:             i = mmuReadWordSignData (a, XEiJ.regSRS);
 15626:           }
 15627:           XEiJ.fpuFPn[m = EFPBox.EPB_SRC_TMP].seti (i);
 15628:         }
 15629:         break;
 15630: 
 15631:       case 0b101:  //$54xx-$57xx: Fop.D <ea>,FPn
 15632:         {
 15633:           long l;
 15634:           if (ea == XEiJ.EA_IM) {  //#<data>
 15635:             a = XEiJ.regPC;
 15636:             XEiJ.regPC = a + 8;
 15637:             l = mmuReadQuadExword (a, XEiJ.regSRS);
 15638:           } else {  //#<data>以外
 15639:             a = efaAnyQuad (ea);
 15640:             l = mmuReadQuadData (a, XEiJ.regSRS);
 15641:           }
 15642:           XEiJ.fpuFPn[m = EFPBox.EPB_SRC_TMP].setd01 (l);
 15643:         }
 15644:         break;
 15645: 
 15646:       case 0b110:  //$58xx-$5Bxx: Fop.B <ea>,FPn
 15647:         {
 15648:           XEiJ.mpuCycleCount += 3;
 15649:           int i;
 15650:           if (ea < XEiJ.EA_AR) {  //Dr
 15651:             XEiJ.mpuCycleCount += 2;
 15652:             //a = 0;
 15653:             i = (byte) XEiJ.regRn[ea];
 15654:           } else if (ea == XEiJ.EA_IM) {  //#<data>
 15655:             a = XEiJ.regPC;
 15656:             XEiJ.regPC = a + 2;
 15657:             i = mmuReadByteSignExword (a + 1, XEiJ.regSRS);  //pcbs
 15658:           } else {  //Dr,#<data>以外
 15659:             a = efaAnyByte (ea);
 15660:             i = mmuReadByteSignData (a, XEiJ.regSRS);
 15661:           }
 15662:           XEiJ.fpuFPn[m = EFPBox.EPB_SRC_TMP].seti (i);
 15663:         }
 15664:         break;
 15665: 
 15666:       case 0b111:  //$5Cxx-$5Fxx: FMOVECR.X #ccc,FPn
 15667:       default:
 15668:         if (!XEiJ.fpuBox.epbIsFullSpec ()) {
 15669:           irpExceptionFormat2 (M68kException.M6E_FP_UNIMPLEMENTED_INSTRUCTION << 2, XEiJ.regPC, M68kException.M6E_FP_UNIMPLEMENTED_INSTRUCTION << 2);  //pcは次の命令,アドレスはベクタオフセット
 15670:           break fgen;
 15671:         }
 15672:         if (0x40 <= c) {
 15673:           //マニュアルにはFMOVECRの命令フォーマットのROMオフセットが7bitあるように書かれているが実際は6bit
 15674:           //MC68882で0x40以上を指定すると命令実行前例外のF-Line Emulator(レスポンス$1C0B)が返る
 15675:           XEiJ.regPC = XEiJ.regPC0 + 2;  //拡張ワードを読まなかったことにする
 15676:           irpFline ();
 15677:           break fgen;
 15678:         }
 15679:         if (false) {
 15680:           m = EFPBox.EPB_CONST_START + c;  //定数
 15681:           c = 0;  //FMOVE
 15682:         } else {
 15683:           //FMOVECR
 15684:           XEiJ.fpuBox.epbFmovecr (XEiJ.fpuFPn[n], c);
 15685:           //FPSRのAEXCを設定する
 15686:           XEiJ.fpuBox.epbFpsr |= XEiJ.FPU_FPSR_EXC_TO_AEXC[XEiJ.fpuBox.epbFpsr >> 8 & 255];
 15687:           //浮動小数点命令実行後例外 floating-point post-instruction exception
 15688:           if (irpFPPostInstruction (a)) {
 15689:             break fgen;
 15690:           }
 15691:           break fgen;
 15692:         }
 15693: 
 15694:       }
 15695:       //浮動小数点命令実行前例外 floating-point pre-instruction exception
 15696:       if (irpFPPreInstruction ()) {
 15697:         break fgen;
 15698:       }
 15699:       //Fop.X <ea>,FPn → Fop.X FP[EFPBox.EPB_SRC_TMP],FPn
 15700:       //FMOVECR.X #ccc,FPn → FMOVE.X FPc,FPn
 15701: 
 15702: 
 15703:       //fallthrough
 15704:     case 0b000:  //$0xxx-$1xxx: Fop.X FPm,FPn
 15705:       if (w >> 13 == 0) {
 15706:         XEiJ.fpuBox.epbFpsr &= 0x00ff00ff;
 15707:       }
 15708:       //Fop.* <ea>,FPnのときFPIARは設定済み
 15709:       XEiJ.fpuBox.epbFpiar = XEiJ.regPC0;  //FPIARはFMOVEM/FMOVE FPcr/FSAVE/FRESTORE以外の命令で例外が発生しなくても更新される
 15710: 
 15711:       switch (c) {
 15712: 
 15713:       case 0b000_0000:  //$xx00: FMOVE.* *m,FPn
 15714:         //  BSUN   常にクリア
 15715:         //  SNAN   引数がシグナリングNaNのときセット、それ以外はクリア
 15716:         //  OPERR  常にクリア
 15717:         //  OVFL   常にクリア
 15718:         //  UNFL   結果が非正規化数のときセット、それ以外はクリア
 15719:         //  DZ     常にクリア
 15720:         //  INEX2  結果に誤差があるときセット、それ以外はクリア
 15721:         //  INEX1  引数がpackedで正確に変換できないときセット、それ以外はクリア
 15722:         XEiJ.fpuFPn[n].sete (XEiJ.fpuFPn[m]).finish ();
 15723:         break;
 15724: 
 15725:       case 0b000_0001:  //$xx01: FINT.* *m,FPn
 15726:         //  BSUN   常にクリア
 15727:         //  SNAN   引数がシグナリングNaNのときセット、それ以外はクリア
 15728:         //  OPERR  常にクリア
 15729:         //  OVFL   常にクリア
 15730:         //         正規化数の最大値は整数なので丸めても大きくなることはない
 15731:         //  UNFL   常にクリア
 15732:         //         結果は整数なので非正規化数にはならない
 15733:         //  DZ     常にクリア
 15734:         //  INEX2  結果に誤差があるときセット、それ以外はクリア
 15735:         //  INEX1  引数がpackedで正確に変換できないときセット、それ以外はクリア
 15736:         XEiJ.mpuCycleCount += 2;
 15737:         //  FINTはsingleとdoubleの丸め処理を行わない
 15738:         XEiJ.fpuBox.epbSetRoundingPrec (EFPBox.EPB_PREC_EXD);
 15739:         XEiJ.fpuFPn[n].round (XEiJ.fpuFPn[m], XEiJ.fpuBox.epbRoundingMode);
 15740:         break;
 15741: 
 15742:       case 0b000_0010:  //$xx02: FSINH.* *m,FPn
 15743:         //  BSUN   常にクリア
 15744:         //  SNAN   引数がシグナリングNaNのときセット、それ以外はクリア
 15745:         //  OPERR  常にクリア
 15746:         //  OVFL   オーバーフローしたときセット、それ以外はクリア
 15747:         //  UNFL   結果が非正規化数のときセット、それ以外はクリア
 15748:         //  DZ     常にクリア
 15749:         //  INEX2  結果に誤差があるときセット、それ以外はクリア
 15750:         //  INEX1  引数がpackedで正確に変換できないときセット、それ以外はクリア
 15751:         if (!XEiJ.fpuBox.epbIsFullSpec ()) {
 15752:           irpExceptionFormat2 (M68kException.M6E_FP_UNIMPLEMENTED_INSTRUCTION << 2, XEiJ.regPC, a);  //pcは次の命令,アドレスは実効アドレス
 15753:           break fgen;
 15754:         }
 15755:         XEiJ.fpuFPn[n].sinh (XEiJ.fpuFPn[m]);
 15756:         break;
 15757: 
 15758:       case 0b000_0011:  //$xx03: FINTRZ.* *m,FPn
 15759:         //  BSUN   常にクリア
 15760:         //  SNAN   引数がシグナリングNaNのときセット、それ以外はクリア
 15761:         //  OPERR  常にクリア
 15762:         //  OVFL   常にクリア
 15763:         //  UNFL   常にクリア
 15764:         //         結果は整数なので非正規化数にはならない
 15765:         //  DZ     常にクリア
 15766:         //  INEX2  結果に誤差があるときセット、それ以外はクリア
 15767:         //  INEX1  引数がpackedで正確に変換できないときセット、それ以外はクリア
 15768:         XEiJ.mpuCycleCount += 2;
 15769:         //  FINTRZはsingleとdoubleの丸め処理を行わない
 15770:         XEiJ.fpuBox.epbSetRoundingPrec (EFPBox.EPB_PREC_EXD);
 15771:         XEiJ.fpuFPn[n].trunc (XEiJ.fpuFPn[m]);
 15772:         break;
 15773: 
 15774:       case 0b000_0100:  //$xx04: FSQRT.* *m,FPn
 15775:       case 0b000_0101:  //$xx05: FSQRT.* *m,FPn (MC68882)
 15776:         //  BSUN   常にクリア
 15777:         //  SNAN   引数がシグナリングNaNのときセット、それ以外はクリア
 15778:         //  OPERR  引数が-0を除く負数のときセット、それ以外はクリア
 15779:         //  OVFL   常にクリア
 15780:         //         1よりも大きい数は小さくなるので溢れることはない
 15781:         //  UNFL   常にクリア
 15782:         //         非正規化数の平方根は正規化数なので結果が非正規化数になることはない
 15783:         //  DZ     常にクリア
 15784:         //  INEX2  結果に誤差があるときセット、それ以外はクリア
 15785:         //  INEX1  引数がpackedで正確に変換できないときセット、それ以外はクリア
 15786:         XEiJ.mpuCycleCount += 67;
 15787:         XEiJ.fpuFPn[n].sqrt (XEiJ.fpuFPn[m]);
 15788:         break;
 15789: 
 15790:       case 0b000_0110:  //$xx06: FLOGNP1.* *m,FPn
 15791:       case 0b000_0111:  //$xx07: FLOGNP1.* *m,FPn (MC68882)
 15792:         //  BSUN   常にクリア
 15793:         //  SNAN   引数がシグナリングNaNのときセット、それ以外はクリア
 15794:         //  OPERR  引数が-1よりも小さいときセット、それ以外はクリア
 15795:         //  OVFL   常にクリア
 15796:         //         log(1+0)=0,log(1+x)<=xなので結果が引数よりも大きくなることはない
 15797:         //  UNFL   結果が非正規化数のときセット、それ以外はクリア
 15798:         //  DZ     引数が-1のときセット、それ以外はクリア
 15799:         //  INEX2  結果に誤差があるときセット、それ以外はクリア
 15800:         //  INEX1  引数がpackedで正確に変換できないときセット、それ以外はクリア
 15801:         if (!XEiJ.fpuBox.epbIsFullSpec ()) {
 15802:           irpExceptionFormat2 (M68kException.M6E_FP_UNIMPLEMENTED_INSTRUCTION << 2, XEiJ.regPC, a);  //pcは次の命令,アドレスは実効アドレス
 15803:           break fgen;
 15804:         }
 15805:         XEiJ.fpuFPn[n].log1p (XEiJ.fpuFPn[m]);
 15806:         break;
 15807: 
 15808:       case 0b000_1000:  //$xx08: FETOXM1.* *m,FPn
 15809:         //  BSUN   常にクリア
 15810:         //  SNAN   引数がシグナリングNaNのときセット、それ以外はクリア
 15811:         //  OPERR  常にクリア
 15812:         //  OVFL   オーバーフローしたときセット、それ以外はクリア
 15813:         //  UNFL   結果が非正規化数のときセット、それ以外はクリア
 15814:         //  DZ     常にクリア
 15815:         //  INEX2  結果に誤差があるときセット、それ以外はクリア
 15816:         //  INEX1  引数がpackedで正確に変換できないときセット、それ以外はクリア
 15817:         if (!XEiJ.fpuBox.epbIsFullSpec ()) {
 15818:           irpExceptionFormat2 (M68kException.M6E_FP_UNIMPLEMENTED_INSTRUCTION << 2, XEiJ.regPC, a);  //pcは次の命令,アドレスは実効アドレス
 15819:           break fgen;
 15820:         }
 15821:         XEiJ.fpuFPn[n].expm1 (XEiJ.fpuFPn[m]);
 15822:         break;
 15823: 
 15824:       case 0b000_1001:  //$xx09: FTANH.* *m,FPn
 15825:         //  BSUN   常にクリア
 15826:         //  SNAN   引数がシグナリングNaNのときセット、それ以外はクリア
 15827:         //  OPERR  常にクリア
 15828:         //  OVFL   常にクリア
 15829:         //  UNFL   結果が非正規化数のときセット、それ以外はクリア
 15830:         //  DZ     常にクリア
 15831:         //  INEX2  結果に誤差があるときセット、それ以外はクリア
 15832:         //  INEX1  引数がpackedで正確に変換できないときセット、それ以外はクリア
 15833:         if (!XEiJ.fpuBox.epbIsFullSpec ()) {
 15834:           irpExceptionFormat2 (M68kException.M6E_FP_UNIMPLEMENTED_INSTRUCTION << 2, XEiJ.regPC, a);  //pcは次の命令,アドレスは実効アドレス
 15835:           break fgen;
 15836:         }
 15837:         XEiJ.fpuFPn[n].tanh (XEiJ.fpuFPn[m]);
 15838:         break;
 15839: 
 15840:       case 0b000_1010:  //$xx0A: FATAN.* *m,FPn
 15841:       case 0b000_1011:  //$xx0B: FATAN.* *m,FPn (MC68882)
 15842:         //  BSUN   常にクリア
 15843:         //  SNAN   引数がシグナリングNaNのときセット、それ以外はクリア
 15844:         //  OPERR  常にクリア
 15845:         //  OVFL   常にクリア
 15846:         //  UNFL   結果が非正規化数のときセット、それ以外はクリア
 15847:         //  DZ     常にクリア
 15848:         //  INEX2  結果に誤差があるときセット、それ以外はクリア
 15849:         //  INEX1  引数がpackedで正確に変換できないときセット、それ以外はクリア
 15850:         if (!XEiJ.fpuBox.epbIsFullSpec ()) {
 15851:           irpExceptionFormat2 (M68kException.M6E_FP_UNIMPLEMENTED_INSTRUCTION << 2, XEiJ.regPC, a);  //pcは次の命令,アドレスは実効アドレス
 15852:           break fgen;
 15853:         }
 15854:         XEiJ.fpuFPn[n].atan (XEiJ.fpuFPn[m]);
 15855:         break;
 15856: 
 15857:       case 0b000_1100:  //$xx0C: FASIN.* *m,FPn
 15858:         //  BSUN   常にクリア
 15859:         //  SNAN   引数がシグナリングNaNのときセット、それ以外はクリア
 15860:         //  OPERR  引数の絶対値が1よりも大きいときセット、それ以外はクリア
 15861:         //  OVFL   常にクリア
 15862:         //  UNFL   結果が非正規化数のときセット、それ以外はクリア
 15863:         //  DZ     常にクリア
 15864:         //  INEX2  結果に誤差があるときセット、それ以外はクリア
 15865:         //  INEX1  引数がpackedで正確に変換できないときセット、それ以外はクリア
 15866:         if (!XEiJ.fpuBox.epbIsFullSpec ()) {
 15867:           irpExceptionFormat2 (M68kException.M6E_FP_UNIMPLEMENTED_INSTRUCTION << 2, XEiJ.regPC, a);  //pcは次の命令,アドレスは実効アドレス
 15868:           break fgen;
 15869:         }
 15870:         XEiJ.fpuFPn[n].asin (XEiJ.fpuFPn[m]);
 15871:         break;
 15872: 
 15873:       case 0b000_1101:  //$xx0D: FATANH.* *m,FPn
 15874:         //  BSUN   常にクリア
 15875:         //  SNAN   引数がシグナリングNaNのときセット、それ以外はクリア
 15876:         //  OPERR  引数の絶対値が1よりも大きいときセット、それ以外はクリア
 15877:         //  OVFL   常にクリア
 15878:         //         1のとき無限大なのだから1の近くでオーバーフローしそうに思えるがatanh(1-2^-80)≒28.07くらい
 15879:         //  UNFL   結果が非正規化数のときセット、それ以外はクリア
 15880:         //  DZ     引数の絶対値が1のときセット、それ以外はクリア
 15881:         //  INEX2  結果に誤差があるときセット、それ以外はクリア
 15882:         //  INEX1  引数がpackedで正確に変換できないときセット、それ以外はクリア
 15883:         if (!XEiJ.fpuBox.epbIsFullSpec ()) {
 15884:           irpExceptionFormat2 (M68kException.M6E_FP_UNIMPLEMENTED_INSTRUCTION << 2, XEiJ.regPC, a);  //pcは次の命令,アドレスは実効アドレス
 15885:           break fgen;
 15886:         }
 15887:         XEiJ.fpuFPn[n].atanh (XEiJ.fpuFPn[m]);
 15888:         break;
 15889: 
 15890:       case 0b000_1110:  //$xx0E: FSIN.* *m,FPn
 15891:         //  BSUN   常にクリア
 15892:         //  SNAN   引数がシグナリングNaNのときセット、それ以外はクリア
 15893:         //  OPERR  引数が無限大のときセット、それ以外はクリア
 15894:         //  OVFL   常にクリア
 15895:         //  UNFL   結果が非正規化数のときセット、それ以外はクリア
 15896:         //  DZ     常にクリア
 15897:         //  INEX2  結果に誤差があるときセット、それ以外はクリア
 15898:         //  INEX1  引数がpackedで正確に変換できないときセット、それ以外はクリア
 15899:         if (!XEiJ.fpuBox.epbIsFullSpec ()) {
 15900:           irpExceptionFormat2 (M68kException.M6E_FP_UNIMPLEMENTED_INSTRUCTION << 2, XEiJ.regPC, a);  //pcは次の命令,アドレスは実効アドレス
 15901:           break fgen;
 15902:         }
 15903:         XEiJ.fpuFPn[n].sin (XEiJ.fpuFPn[m]);
 15904:         break;
 15905: 
 15906:       case 0b000_1111:  //$xx0F: FTAN.* *m,FPn
 15907:         //  BSUN   常にクリア
 15908:         //  SNAN   引数がシグナリングNaNのときセット、それ以外はクリア
 15909:         //  OPERR  引数が無限大のときセット、それ以外はクリア
 15910:         //  OVFL   オーバーフローしたときセット、それ以外はクリア
 15911:         //  UNFL   結果が非正規化数のときセット、それ以外はクリア
 15912:         //  DZ     常にクリア
 15913:         //         cos(x)=0を満たすxは正確に表現できないのだからsin(x)/cos(x)がゼロ除算になるのはおかしい
 15914:         //  INEX2  結果に誤差があるときセット、それ以外はクリア
 15915:         //  INEX1  引数がpackedで正確に変換できないときセット、それ以外はクリア
 15916:         if (!XEiJ.fpuBox.epbIsFullSpec ()) {
 15917:           irpExceptionFormat2 (M68kException.M6E_FP_UNIMPLEMENTED_INSTRUCTION << 2, XEiJ.regPC, a);  //pcは次の命令,アドレスは実効アドレス
 15918:           break fgen;
 15919:         }
 15920:         XEiJ.fpuFPn[n].tan (XEiJ.fpuFPn[m]);
 15921:         break;
 15922: 
 15923:       case 0b001_0000:  //$xx10: FETOX.* *m,FPn
 15924:         //  BSUN   常にクリア
 15925:         //  SNAN   引数がシグナリングNaNのときセット、それ以外はクリア
 15926:         //  OPERR  常にクリア
 15927:         //  OVFL   オーバーフローしたときセット、それ以外はクリア
 15928:         //  UNFL   結果が非正規化数のときセット、それ以外はクリア
 15929:         //  DZ     常にクリア
 15930:         //  INEX2  結果に誤差があるときセット、それ以外はクリア
 15931:         //  INEX1  引数がpackedで正確に変換できないときセット、それ以外はクリア
 15932:         if (!XEiJ.fpuBox.epbIsFullSpec ()) {
 15933:           irpExceptionFormat2 (M68kException.M6E_FP_UNIMPLEMENTED_INSTRUCTION << 2, XEiJ.regPC, a);  //pcは次の命令,アドレスは実効アドレス
 15934:           break fgen;
 15935:         }
 15936:         XEiJ.fpuFPn[n].exp (XEiJ.fpuFPn[m]);
 15937:         break;
 15938: 
 15939:       case 0b001_0001:  //$xx11: FTWOTOX.* *m,FPn
 15940:         //  BSUN   常にクリア
 15941:         //  SNAN   引数がシグナリングNaNのときセット、それ以外はクリア
 15942:         //  OPERR  常にクリア
 15943:         //  OVFL   オーバーフローしたときセット、それ以外はクリア
 15944:         //  UNFL   結果が非正規化数のときセット、それ以外はクリア
 15945:         //  DZ     常にクリア
 15946:         //  INEX2  結果に誤差があるときセット、それ以外はクリア
 15947:         //  INEX1  引数がpackedで正確に変換できないときセット、それ以外はクリア
 15948:         if (!XEiJ.fpuBox.epbIsFullSpec ()) {
 15949:           irpExceptionFormat2 (M68kException.M6E_FP_UNIMPLEMENTED_INSTRUCTION << 2, XEiJ.regPC, a);  //pcは次の命令,アドレスは実効アドレス
 15950:           break fgen;
 15951:         }
 15952:         XEiJ.fpuFPn[n].exp2 (XEiJ.fpuFPn[m]);
 15953:         break;
 15954: 
 15955:       case 0b001_0010:  //$xx12: FTENTOX.* *m,FPn
 15956:       case 0b001_0011:  //$xx13: FTENTOX.* *m,FPn (MC68882)
 15957:         //  BSUN   常にクリア
 15958:         //  SNAN   引数がシグナリングNaNのときセット、それ以外はクリア
 15959:         //  OPERR  常にクリア
 15960:         //  OVFL   オーバーフローしたときセット、それ以外はクリア
 15961:         //  UNFL   結果が非正規化数のときセット、それ以外はクリア
 15962:         //  DZ     常にクリア
 15963:         //  INEX2  結果に誤差があるときセット、それ以外はクリア
 15964:         //  INEX1  引数がpackedで正確に変換できないときセット、それ以外はクリア
 15965:         if (!XEiJ.fpuBox.epbIsFullSpec ()) {
 15966:           irpExceptionFormat2 (M68kException.M6E_FP_UNIMPLEMENTED_INSTRUCTION << 2, XEiJ.regPC, a);  //pcは次の命令,アドレスは実効アドレス
 15967:           break fgen;
 15968:         }
 15969:         XEiJ.fpuFPn[n].exp10 (XEiJ.fpuFPn[m]);
 15970:         break;
 15971: 
 15972:       case 0b001_0100:  //$xx14: FLOGN.* *m,FPn
 15973:         //  BSUN   常にクリア
 15974:         //  SNAN   引数がシグナリングNaNのときセット、それ以外はクリア
 15975:         //  OPERR  引数が0よりも小さいときセット、それ以外はクリア
 15976:         //  OVFL   常にクリア
 15977:         //         log(1)=0,log(x)<=x-1なので結果が引数よりも大きくなることはない
 15978:         //  UNFL   常にクリア
 15979:         //         log(1+2^-80)≒2^-80
 15980:         //  DZ     引数がゼロのときセット、それ以外はクリア
 15981:         //  INEX2  結果に誤差があるときセット、それ以外はクリア
 15982:         //  INEX1  引数がpackedで正確に変換できないときセット、それ以外はクリア
 15983:         if (!XEiJ.fpuBox.epbIsFullSpec ()) {
 15984:           irpExceptionFormat2 (M68kException.M6E_FP_UNIMPLEMENTED_INSTRUCTION << 2, XEiJ.regPC, a);  //pcは次の命令,アドレスは実効アドレス
 15985:           break fgen;
 15986:         }
 15987:         XEiJ.fpuFPn[n].log (XEiJ.fpuFPn[m]);
 15988:         break;
 15989: 
 15990:       case 0b001_0101:  //$xx15: FLOG10.* *m,FPn
 15991:         //  BSUN   常にクリア
 15992:         //  SNAN   引数がシグナリングNaNのときセット、それ以外はクリア
 15993:         //  OPERR  引数が0よりも小さいときセット、それ以外はクリア
 15994:         //  OVFL   常にクリア
 15995:         //  UNFL   常にクリア
 15996:         //  DZ     引数がゼロのときセット、それ以外はクリア
 15997:         //  INEX2  結果に誤差があるときセット、それ以外はクリア
 15998:         //  INEX1  引数がpackedで正確に変換できないときセット、それ以外はクリア
 15999:         if (!XEiJ.fpuBox.epbIsFullSpec ()) {
 16000:           irpExceptionFormat2 (M68kException.M6E_FP_UNIMPLEMENTED_INSTRUCTION << 2, XEiJ.regPC, a);  //pcは次の命令,アドレスは実効アドレス
 16001:           break fgen;
 16002:         }
 16003:         XEiJ.fpuFPn[n].log10 (XEiJ.fpuFPn[m]);
 16004:         break;
 16005: 
 16006:       case 0b001_0110:  //$xx16: FLOG2.* *m,FPn
 16007:       case 0b001_0111:  //$xx17: FLOG2.* *m,FPn (MC68882)
 16008:         //  BSUN   常にクリア
 16009:         //  SNAN   引数がシグナリングNaNのときセット、それ以外はクリア
 16010:         //  OPERR  引数が0よりも小さいときセット、それ以外はクリア
 16011:         //  OVFL   常にクリア
 16012:         //  UNFL   常にクリア
 16013:         //  DZ     引数がゼロのときセット、それ以外はクリア
 16014:         //  INEX2  結果に誤差があるときセット、それ以外はクリア
 16015:         //  INEX1  引数がpackedで正確に変換できないときセット、それ以外はクリア
 16016:         if (!XEiJ.fpuBox.epbIsFullSpec ()) {
 16017:           irpExceptionFormat2 (M68kException.M6E_FP_UNIMPLEMENTED_INSTRUCTION << 2, XEiJ.regPC, a);  //pcは次の命令,アドレスは実効アドレス
 16018:           break fgen;
 16019:         }
 16020:         XEiJ.fpuFPn[n].log2 (XEiJ.fpuFPn[m]);
 16021:         break;
 16022: 
 16023:       case 0b001_1000:  //$xx18: FABS.* *m,FPn
 16024:         //  BSUN   常にクリア
 16025:         //  SNAN   引数がシグナリングNaNのときセット、それ以外はクリア
 16026:         //  OPERR  常にクリア
 16027:         //  OVFL   常にクリア
 16028:         //  UNFL   結果が非正規化数のときセット、それ以外はクリア
 16029:         //  DZ     常にクリア
 16030:         //  INEX2  常にクリア
 16031:         //  INEX1  引数がpackedで正確に変換できないときセット、それ以外はクリア
 16032:         XEiJ.fpuFPn[n].abs (XEiJ.fpuFPn[m]);
 16033:         break;
 16034: 
 16035:       case 0b001_1001:  //$xx19: FCOSH.* *m,FPn
 16036:         //  BSUN   常にクリア
 16037:         //  SNAN   引数がシグナリングNaNのときセット、それ以外はクリア
 16038:         //  OPERR  常にクリア
 16039:         //  OVFL   オーバーフローしたときセット、それ以外はクリア
 16040:         //  UNFL   常にクリア
 16041:         //  DZ     常にクリア
 16042:         //  INEX2  結果に誤差があるときセット、それ以外はクリア
 16043:         //  INEX1  引数がpackedで正確に変換できないときセット、それ以外はクリア
 16044:         if (!XEiJ.fpuBox.epbIsFullSpec ()) {
 16045:           irpExceptionFormat2 (M68kException.M6E_FP_UNIMPLEMENTED_INSTRUCTION << 2, XEiJ.regPC, a);  //pcは次の命令,アドレスは実効アドレス
 16046:           break fgen;
 16047:         }
 16048:         XEiJ.fpuFPn[n].cosh (XEiJ.fpuFPn[m]);
 16049:         break;
 16050: 
 16051:       case 0b001_1010:  //$xx1A: FNEG.* *m,FPn
 16052:       case 0b001_1011:  //$xx1B: FNEG.* *m,FPn (MC68882)
 16053:         //  BSUN   常にクリア
 16054:         //  SNAN   引数がシグナリングNaNのときセット、それ以外はクリア
 16055:         //  OPERR  常にクリア
 16056:         //  OVFL   常にクリア
 16057:         //  UNFL   結果が非正規化数のときセット、それ以外はクリア
 16058:         //  DZ     常にクリア
 16059:         //  INEX2  常にクリア
 16060:         //  INEX1  引数がpackedで正確に変換できないときセット、それ以外はクリア
 16061:         XEiJ.fpuFPn[n].neg (XEiJ.fpuFPn[m]);
 16062:         break;
 16063: 
 16064:       case 0b001_1100:  //$xx1C: FACOS.* *m,FPn
 16065:         //  BSUN   常にクリア
 16066:         //  SNAN   引数がシグナリングNaNのときセット、それ以外はクリア
 16067:         //  OPERR  引数の絶対値が1よりも大きいときセット、それ以外はクリア
 16068:         //  OVFL   常にクリア
 16069:         //  UNFL   常にクリア
 16070:         //         acos(1-ulp(1))はulp(1)よりも大きい
 16071:         //  DZ     常にクリア
 16072:         //  INEX2  結果に誤差があるときセット、それ以外はクリア
 16073:         //         おそらくセットされないのはacos(1)=0だけ
 16074:         //  INEX1  引数がpackedで正確に変換できないときセット、それ以外はクリア
 16075:         if (!XEiJ.fpuBox.epbIsFullSpec ()) {
 16076:           irpExceptionFormat2 (M68kException.M6E_FP_UNIMPLEMENTED_INSTRUCTION << 2, XEiJ.regPC, a);  //pcは次の命令,アドレスは実効アドレス
 16077:           break fgen;
 16078:         }
 16079:         XEiJ.fpuFPn[n].acos (XEiJ.fpuFPn[m]);
 16080:         break;
 16081: 
 16082:       case 0b001_1101:  //$xx1D: FCOS.* *m,FPn
 16083:         //  BSUN   常にクリア
 16084:         //  SNAN   引数がシグナリングNaNのときセット、それ以外はクリア
 16085:         //  OPERR  引数が無限大のときセット、それ以外はクリア
 16086:         //  OVFL   常にクリア
 16087:         //  UNFL   常にクリア
 16088:         //         cos(x)=0を満たすxは正確に表現できず、cos(pi/2)とcos(3*pi/2)が正規化数になってしまう
 16089:         //  DZ     常にクリア
 16090:         //  INEX2  結果に誤差があるときセット、それ以外はクリア
 16091:         //  INEX1  引数がpackedで正確に変換できないときセット、それ以外はクリア
 16092:         if (!XEiJ.fpuBox.epbIsFullSpec ()) {
 16093:           irpExceptionFormat2 (M68kException.M6E_FP_UNIMPLEMENTED_INSTRUCTION << 2, XEiJ.regPC, a);  //pcは次の命令,アドレスは実効アドレス
 16094:           break fgen;
 16095:         }
 16096:         XEiJ.fpuFPn[n].cos (XEiJ.fpuFPn[m]);
 16097:         break;
 16098: 
 16099:       case 0b001_1110:  //$xx1E: FGETEXP.* *m,FPn
 16100:         //  BSUN   常にクリア
 16101:         //  SNAN   引数がシグナリングNaNのときセット、それ以外はクリア
 16102:         //  OPERR  引数が無限大のときセット、それ以外はクリア
 16103:         //  OVFL   常にクリア
 16104:         //  UNFL   常にクリア
 16105:         //  DZ     常にクリア
 16106:         //  INEX2  常にクリア
 16107:         //  INEX1  引数がpackedで正確に変換できないときセット、それ以外はクリア
 16108:         if (!XEiJ.fpuBox.epbIsFullSpec ()) {
 16109:           irpExceptionFormat2 (M68kException.M6E_FP_UNIMPLEMENTED_INSTRUCTION << 2, XEiJ.regPC, a);  //pcは次の命令,アドレスは実効アドレス
 16110:           break fgen;
 16111:         }
 16112:         XEiJ.fpuFPn[n].getexp (XEiJ.fpuFPn[m]);
 16113:         break;
 16114: 
 16115:       case 0b001_1111:  //$xx1F: FGETMAN.* *m,FPn
 16116:         //  BSUN   常にクリア
 16117:         //  SNAN   引数がシグナリングNaNのときセット、それ以外はクリア
 16118:         //  OPERR  引数が無限大のときセット、それ以外はクリア
 16119:         //  OVFL   常にクリア
 16120:         //  UNFL   常にクリア
 16121:         //  DZ     常にクリア
 16122:         //  INEX2  常にクリア
 16123:         //  INEX1  引数がpackedで正確に変換できないときセット、それ以外はクリア
 16124:         if (!XEiJ.fpuBox.epbIsFullSpec ()) {
 16125:           irpExceptionFormat2 (M68kException.M6E_FP_UNIMPLEMENTED_INSTRUCTION << 2, XEiJ.regPC, a);  //pcは次の命令,アドレスは実効アドレス
 16126:           break fgen;
 16127:         }
 16128:         XEiJ.fpuFPn[n].getman (XEiJ.fpuFPn[m]);
 16129:         break;
 16130: 
 16131:       case 0b010_0000:  //$xx20: FDIV.* *m,FPn
 16132:         //  BSUN   常にクリア
 16133:         //  SNAN   引数がシグナリングNaNのときセット、それ以外はクリア
 16134:         //  OPERR  引数が両方ゼロまたは両方無限大のときセット、それ以外はクリア
 16135:         //  OVFL   オーバーフローしたときセット、それ以外はクリア
 16136:         //  UNFL   結果が非正規化数のときセット、それ以外はクリア
 16137:         //  DZ     被除数がゼロ、無限大、NaN以外で除数がゼロのときセット、それ以外はクリア
 16138:         //  INEX2  結果に誤差があるときセット、それ以外はクリア
 16139:         //  INEX1  引数がpackedで正確に変換できないときセット、それ以外はクリア
 16140:         XEiJ.mpuCycleCount += 36;
 16141:         XEiJ.fpuFPn[n].div (XEiJ.fpuFPn[m]);
 16142:         break;
 16143: 
 16144:       case 0b010_0001:  //$xx21: FMOD.* *m,FPn
 16145:         //  BSUN   常にクリア
 16146:         //  SNAN   引数がシグナリングNaNのときセット、それ以外はクリア
 16147:         //  OPERR  除数がゼロまたは被除数が無限大のときセット、それ以外はクリア
 16148:         //  OVFL   常にクリア
 16149:         //  UNFL   結果が非正規化数のときセット、それ以外はクリア
 16150:         //  DZ     常にクリア
 16151:         //         除数がゼロのとき結果は無限大ではなくNaNでありゼロ除算にはならない
 16152:         //  INEX2  結果に誤差があるときセット、それ以外はクリア
 16153:         //  INEX1  引数がpackedで正確に変換できないときセット、それ以外はクリア
 16154:         //  FPSRのquotient byteに符号付き商の下位7bitが入る
 16155:         if (!XEiJ.fpuBox.epbIsFullSpec ()) {
 16156:           irpExceptionFormat2 (M68kException.M6E_FP_UNIMPLEMENTED_INSTRUCTION << 2, XEiJ.regPC, a);  //pcは次の命令,アドレスは実効アドレス
 16157:           break fgen;
 16158:         }
 16159:         XEiJ.fpuFPn[n].rem (XEiJ.fpuFPn[m]);
 16160:         break;
 16161: 
 16162:       case 0b010_0010:  //$xx22: FADD.* *m,FPn
 16163:         //  BSUN   常にクリア
 16164:         //  SNAN   引数がシグナリングNaNのときセット、それ以外はクリア
 16165:         //  OPERR  引数が両方無限大で符号が異なるときセット、それ以外はクリア
 16166:         //  OVFL   オーバーフローしたときセット、それ以外はクリア
 16167:         //  UNFL   結果が非正規化数のときセット、それ以外はクリア
 16168:         //  DZ     常にクリア
 16169:         //  INEX2  結果に誤差があるときセット、それ以外はクリア
 16170:         //  INEX1  引数がpackedで正確に変換できないときセット、それ以外はクリア
 16171:         XEiJ.mpuCycleCount += 2;
 16172:         XEiJ.fpuFPn[n].add (XEiJ.fpuFPn[m]);
 16173:         break;
 16174: 
 16175:       case 0b010_0011:  //$xx23: FMUL.* *m,FPn
 16176:         //  BSUN   常にクリア
 16177:         //  SNAN   引数がシグナリングNaNのときセット、それ以外はクリア
 16178:         //  OPERR  引数の一方がゼロで他方が無限大のときセット、それ以外はクリア
 16179:         //  OVFL   オーバーフローしたときセット、それ以外はクリア
 16180:         //  UNFL   結果が非正規化数のときセット、それ以外はクリア
 16181:         //  DZ     常にクリア
 16182:         //  INEX2  結果に誤差があるときセット、それ以外はクリア
 16183:         //  INEX1  引数がpackedで正確に変換できないときセット、それ以外はクリア
 16184:         XEiJ.mpuCycleCount += 2;
 16185:         XEiJ.fpuFPn[n].mul (XEiJ.fpuFPn[m]);
 16186:         break;
 16187: 
 16188:       case 0b010_0100:  //$xx24: FSGLDIV.* *m,FPn
 16189:         //  BSUN   常にクリア
 16190:         //  SNAN   引数がシグナリングNaNのときセット、それ以外はクリア
 16191:         //  OPERR  引数が両方ゼロまたは両方無限大のときセット、それ以外はクリア
 16192:         //  OVFL   オーバーフローしたときセット、それ以外はクリア
 16193:         //  UNFL   結果が非正規化数のときセット、それ以外はクリア
 16194:         //  DZ     被除数がゼロ、無限大、NaN以外で除数がゼロのときセット、それ以外はクリア
 16195:         //  INEX2  結果に誤差があるときセット、それ以外はクリア
 16196:         //  INEX1  引数がpackedで正確に変換できないときセット、それ以外はクリア
 16197:         XEiJ.mpuCycleCount += 36;
 16198:         XEiJ.fpuBox.epbSetRoundingPrec (EFPBox.EPB_PREC_XSG);
 16199:         XEiJ.fpuFPn[n].div (XEiJ.fpuFPn[m]);
 16200:         break;
 16201: 
 16202:       case 0b010_0101:  //$xx25: FREM.* *m,FPn
 16203:         //  BSUN   常にクリア
 16204:         //  SNAN   引数がシグナリングNaNのときセット、それ以外はクリア
 16205:         //  OPERR  除数がゼロまたは被除数が無限大のときセット、それ以外はクリア
 16206:         //  OVFL   常にクリア
 16207:         //  UNFL   結果が非正規化数のときセット、それ以外はクリア
 16208:         //  DZ     常にクリア
 16209:         //         除数がゼロのとき結果は無限大ではなくNaNでありゼロ除算にはならない
 16210:         //  INEX2  結果に誤差があるときセット、それ以外はクリア
 16211:         //         マニュアルにClearedと書いてあるのは間違い
 16212:         //         除数が無限大で被除数をそのまま返す場合でもサイズが減ればアンダーフローや不正確な結果になることはマニュアルにも書かれている
 16213:         //  INEX1  引数がpackedで正確に変換できないときセット、それ以外はクリア
 16214:         //  FPSRのquotient byteに符号付き商の下位7bitが入る
 16215:         if (!XEiJ.fpuBox.epbIsFullSpec ()) {
 16216:           irpExceptionFormat2 (M68kException.M6E_FP_UNIMPLEMENTED_INSTRUCTION << 2, XEiJ.regPC, a);  //pcは次の命令,アドレスは実効アドレス
 16217:           break fgen;
 16218:         }
 16219:         XEiJ.fpuFPn[n].ieeerem (XEiJ.fpuFPn[m]);
 16220:         break;
 16221: 
 16222:       case 0b010_0110:  //$xx26: FSCALE.* *m,FPn
 16223:         //  BSUN   常にクリア
 16224:         //  SNAN   引数がシグナリングNaNのときセット、それ以外はクリア
 16225:         //  OPERR  引数が無限大のときセット、それ以外はクリア
 16226:         //  OVFL   オーバーフローしたときセット、それ以外はクリア
 16227:         //  UNFL   結果が非正規化数のときセット、それ以外はクリア
 16228:         //  DZ     常にクリア
 16229:         //  INEX2  常にクリア
 16230:         //  INEX1  引数がpackedで正確に変換できないときセット、それ以外はクリア
 16231:         if (!XEiJ.fpuBox.epbIsFullSpec ()) {
 16232:           irpExceptionFormat2 (M68kException.M6E_FP_UNIMPLEMENTED_INSTRUCTION << 2, XEiJ.regPC, a);  //pcは次の命令,アドレスは実効アドレス
 16233:           break fgen;
 16234:         }
 16235:         //! 本来はソースが整数のとき浮動小数点数を経由しないが、これは経由してしまっている。結果は同じだが効率が悪い
 16236:         XEiJ.fpuFPn[n].scale (XEiJ.fpuFPn[m]);
 16237:         break;
 16238: 
 16239:       case 0b010_0111:  //$xx27: FSGLMUL.* *m,FPn
 16240:         //  BSUN   常にクリア
 16241:         //  SNAN   引数がシグナリングNaNのときセット、それ以外はクリア
 16242:         //  OPERR  引数の一方がゼロで他方が無限大のときセット、それ以外はクリア
 16243:         //  OVFL   オーバーフローしたときセット、それ以外はクリア
 16244:         //  UNFL   結果が非正規化数のときセット、それ以外はクリア
 16245:         //  DZ     常にクリア
 16246:         //  INEX2  結果に誤差があるときセット、それ以外はクリア
 16247:         //  INEX1  引数がpackedで正確に変換できないときセット、それ以外はクリア
 16248:         XEiJ.mpuCycleCount += 2;
 16249:         {
 16250:           //引数を24bitに切り捨てるときX2をセットしない
 16251:           int sr = XEiJ.fpuBox.epbFpsr;
 16252:           XEiJ.fpuFPn[EFPBox.EPB_SRC_TMP].roundmanf (XEiJ.fpuFPn[m], EFPBox.EPB_MODE_RZ);
 16253:           XEiJ.fpuFPn[EFPBox.EPB_DST_TMP].roundmanf (XEiJ.fpuFPn[n], EFPBox.EPB_MODE_RZ);
 16254:           XEiJ.fpuBox.epbFpsr = sr;
 16255:         }
 16256:         XEiJ.fpuBox.epbSetRoundingPrec (EFPBox.EPB_PREC_XSG);
 16257:         XEiJ.fpuFPn[n].mul (XEiJ.fpuFPn[EFPBox.EPB_DST_TMP], XEiJ.fpuFPn[EFPBox.EPB_SRC_TMP]);
 16258:         break;
 16259: 
 16260:       case 0b010_1000:  //$xx28: FSUB.* *m,FPn
 16261:       case 0b010_1001:  //$xx29: FSUB.* *m,FPn (MC68882)
 16262:       case 0b010_1010:  //$xx2A: FSUB.* *m,FPn (MC68882)
 16263:       case 0b010_1011:  //$xx2B: FSUB.* *m,FPn (MC68882)
 16264:       case 0b010_1100:  //$xx2C: FSUB.* *m,FPn (MC68882)
 16265:       case 0b010_1101:  //$xx2D: FSUB.* *m,FPn (MC68882)
 16266:       case 0b010_1110:  //$xx2E: FSUB.* *m,FPn (MC68882)
 16267:       case 0b010_1111:  //$xx2F: FSUB.* *m,FPn (MC68882)
 16268:         //  BSUN   常にクリア
 16269:         //  SNAN   引数がシグナリングNaNのときセット、それ以外はクリア
 16270:         //  OPERR  引数が両方無限大で符号が同じときセット、それ以外はクリア
 16271:         //  OVFL   オーバーフローしたときセット、それ以外はクリア
 16272:         //  UNFL   結果が非正規化数のときセット、それ以外はクリア
 16273:         //  DZ     常にクリア
 16274:         //  INEX2  結果に誤差があるときセット、それ以外はクリア
 16275:         //  INEX1  引数がpackedで正確に変換できないときセット、それ以外はクリア
 16276:         XEiJ.mpuCycleCount += 2;
 16277:         XEiJ.fpuFPn[n].sub (XEiJ.fpuFPn[m]);
 16278:         break;
 16279: 
 16280:       case 0b011_0000:  //$xx30: FSINCOS.* *m,FP0:FPn (c=0,s=n)
 16281:       case 0b011_0001:  //$xx31: FSINCOS.* *m,FP1:FPn (c=1,s=n)
 16282:       case 0b011_0010:  //$xx32: FSINCOS.* *m,FP2:FPn (c=2,s=n)
 16283:       case 0b011_0011:  //$xx33: FSINCOS.* *m,FP3:FPn (c=3,s=n)
 16284:       case 0b011_0100:  //$xx34: FSINCOS.* *m,FP4:FPn (c=4,s=n)
 16285:       case 0b011_0101:  //$xx35: FSINCOS.* *m,FP5:FPn (c=5,s=n)
 16286:       case 0b011_0110:  //$xx36: FSINCOS.* *m,FP6:FPn (c=6,s=n)
 16287:       case 0b011_0111:  //$xx37: FSINCOS.* *m,FP7:FPn (c=7,s=n)
 16288:         //  BSUN   常にクリア
 16289:         //  SNAN   引数がシグナリングNaNのときセット、それ以外はクリア
 16290:         //  OPERR  引数が無限大のときセット、それ以外はクリア
 16291:         //  OVFL   常にクリア
 16292:         //  UNFL   sin(x)の結果が非正規化数のときセット、それ以外はクリア
 16293:         //         cos(x)の結果は非正規化数にならない
 16294:         //  DZ     常にクリア
 16295:         //  INEX2  結果に誤差があるときセット、それ以外はクリア
 16296:         //  INEX1  引数がpackedで正確に変換できないときセット、それ以外はクリア
 16297:         if (!XEiJ.fpuBox.epbIsFullSpec ()) {
 16298:           irpExceptionFormat2 (M68kException.M6E_FP_UNIMPLEMENTED_INSTRUCTION << 2, XEiJ.regPC, a);  //pcは次の命令,アドレスは実効アドレス
 16299:           break fgen;
 16300:         }
 16301:         c &= 7;
 16302:         //m==EFPBox.EPB_SRC_TMP||m==n||m==cの場合があることに注意する
 16303:         XEiJ.fpuFPn[EFPBox.EPB_SRC_TMP].sete (XEiJ.fpuFPn[m]);
 16304:         XEiJ.fpuFPn[c].cos (XEiJ.fpuFPn[EFPBox.EPB_SRC_TMP]);
 16305:         XEiJ.fpuFPn[n].sin (XEiJ.fpuFPn[EFPBox.EPB_SRC_TMP]);
 16306:         break;
 16307: 
 16308:       case 0b011_1000:  //$xx38: FCMP.* *m,FPn
 16309:       case 0b011_1001:  //$xx39: FCMP.* *m,FPn (MC68882)
 16310:       case 0b011_1100:  //$xx3C: FCMP.* *m,FPn (MC68882)  コマンドワードの不連続箇所に注意
 16311:       case 0b011_1101:  //$xx3D: FCMP.* *m,FPn (MC68882)
 16312:         //  BSUN   常にクリア
 16313:         //  SNAN   引数がシグナリングNaNのときセット、それ以外はクリア
 16314:         //  OPERR  常にクリア
 16315:         //  OVFL   常にクリア
 16316:         //  UNFL   常にクリア
 16317:         //  DZ     常にクリア
 16318:         //  INEX2  常にクリア
 16319:         //  INEX1  引数がpackedで正確に変換できないときセット、それ以外はクリア
 16320:         //  FCMPはinfinityを常にクリアする
 16321:         //  efp.compareTo(x,y)を使う
 16322:         //    efp.compareTo(x,y)はefp.sub(x,y)よりも速い
 16323:         //    efp.sub(x,y)はINEX2をセットしてしまう
 16324:         //  efp.compareTo(x,y)は-0<+0だがFCMPは-0==+0なのでこれだけ調節する
 16325:         {
 16326:           int xf = XEiJ.fpuFPn[n].flg;
 16327:           int yf = XEiJ.fpuFPn[m].flg;
 16328:           if ((xf | yf) << 3 < 0) {  //どちらかがNaN
 16329:             //XEiJ.fpuFPn[EFPBox.EPB_DST_TMP].setnan ();
 16330:             XEiJ.fpuFPn[EFPBox.EPB_DST_TMP].flg = EFPBox.N;
 16331:           } else {
 16332:             int i = ((xf & yf) << 1 < 0 ? 0 :  //両方±0
 16333:                      XEiJ.fpuFPn[n].compareTo (XEiJ.fpuFPn[m]));  //-Inf==-Inf<-x<-0<+0<+x<+Inf==+Inf<NaN==NaN
 16334:             if (i == 0) {
 16335:               if (xf < 0) {
 16336:                 //XEiJ.fpuFPn[EFPBox.EPB_DST_TMP].negset0 ();
 16337:                 XEiJ.fpuFPn[EFPBox.EPB_DST_TMP].flg = EFPBox.M | EFPBox.Z;
 16338:               } else {
 16339:                 //XEiJ.fpuFPn[EFPBox.EPB_DST_TMP].set0 ();
 16340:                 XEiJ.fpuFPn[EFPBox.EPB_DST_TMP].flg = EFPBox.P | EFPBox.Z;
 16341:               }
 16342:             } else if (i < 0) {
 16343:               XEiJ.fpuFPn[EFPBox.EPB_DST_TMP].negset1 ();
 16344:             } else {
 16345:               XEiJ.fpuFPn[EFPBox.EPB_DST_TMP].set1 ();
 16346:             }
 16347:           }
 16348:           n = EFPBox.EPB_DST_TMP;
 16349:         }
 16350:         break;
 16351: 
 16352:       case 0b011_1010:  //$xx3A: FTST.* *m
 16353:       case 0b011_1011:  //$xx3B: FTST.* *m (MC68882)
 16354:       case 0b011_1110:  //$xx3E: FTST.* *m (MC68882)  コマンドワードの不連続箇所に注意
 16355:       case 0b011_1111:  //$xx3F: FTST.* *m (MC68882)
 16356:         //  BSUN   常にクリア
 16357:         //  SNAN   引数がシグナリングNaNのときセット、それ以外はクリア
 16358:         //  OPERR  常にクリア
 16359:         //  OVFL   常にクリア
 16360:         //  UNFL   常にクリア
 16361:         //  DZ     常にクリア
 16362:         //  INEX2  常にクリア
 16363:         //  INEX1  引数がpackedで正確に変換できないときセット、それ以外はクリア
 16364:         //  ソースオペランドをダミーのデスティネーションオペランドにコピーしてテストする
 16365:         //  デスティネーションオペランドは変化しない
 16366:         //  デスティネーションオペランドにはFP0が指定される場合が多いがFP0である必要はない
 16367:         XEiJ.fpuFPn[EFPBox.EPB_DST_TMP].sete (XEiJ.fpuFPn[m]);
 16368:         n = EFPBox.EPB_DST_TMP;
 16369:         break;
 16370: 
 16371:       case 0b100_0000:  //$xx40: FSMOVE.* *m,FPn
 16372:         //  BSUN   常にクリア
 16373:         //  SNAN   引数がシグナリングNaNのときセット、それ以外はクリア
 16374:         //  OPERR  常にクリア
 16375:         //  OVFL   常にクリア
 16376:         //  UNFL   結果が非正規化数のときセット、それ以外はクリア
 16377:         //  DZ     常にクリア
 16378:         //  INEX2  結果に誤差があるときセット、それ以外はクリア
 16379:         //  INEX1  引数がpackedで正確に変換できないときセット、それ以外はクリア
 16380:         XEiJ.fpuBox.epbSetRoundingPrec (EFPBox.EPB_PREC_SGL);
 16381:         XEiJ.fpuFPn[n].sete (XEiJ.fpuFPn[m]).finish ();
 16382:         break;
 16383: 
 16384:       case 0b100_0001:  //$xx41: FSSQRT.* *m,FPn
 16385:         //  BSUN   常にクリア
 16386:         //  SNAN   引数がシグナリングNaNのときセット、それ以外はクリア
 16387:         //  OPERR  引数が-0を除く負数のときセット、それ以外はクリア
 16388:         //  OVFL   常にクリア
 16389:         //  UNFL   常にクリア
 16390:         //  DZ     常にクリア
 16391:         //  INEX2  結果に誤差があるときセット、それ以外はクリア
 16392:         //  INEX1  引数がpackedで正確に変換できないときセット、それ以外はクリア
 16393:         XEiJ.mpuCycleCount += 67;
 16394:         XEiJ.fpuBox.epbSetRoundingPrec (EFPBox.EPB_PREC_SGL);
 16395:         XEiJ.fpuFPn[n].sqrt (XEiJ.fpuFPn[m]);
 16396:         break;
 16397: 
 16398:         //case 0b100_0010:  //$xx42:
 16399:         //case 0b100_0011:  //$xx43:
 16400: 
 16401:       case 0b100_0100:  //$xx44: FDMOVE.* *m,FPn
 16402:         //  BSUN   常にクリア
 16403:         //  SNAN   引数がシグナリングNaNのときセット、それ以外はクリア
 16404:         //  OPERR  常にクリア
 16405:         //  OVFL   常にクリア
 16406:         //  UNFL   結果が非正規化数のときセット、それ以外はクリア
 16407:         //  DZ     常にクリア
 16408:         //  INEX2  結果に誤差があるときセット、それ以外はクリア
 16409:         //  INEX1  引数がpackedで正確に変換できないときセット、それ以外はクリア
 16410:         XEiJ.fpuBox.epbSetRoundingPrec (EFPBox.EPB_PREC_DBL);
 16411:         XEiJ.fpuFPn[n].sete (XEiJ.fpuFPn[m]).finish ();
 16412:         break;
 16413: 
 16414:       case 0b100_0101:  //$xx45: FDSQRT.* *m,FPn
 16415:         //  BSUN   常にクリア
 16416:         //  SNAN   引数がシグナリングNaNのときセット、それ以外はクリア
 16417:         //  OPERR  引数が-0を除く負数のときセット、それ以外はクリア
 16418:         //  OVFL   常にクリア
 16419:         //  UNFL   常にクリア
 16420:         //  DZ     常にクリア
 16421:         //  INEX2  結果に誤差があるときセット、それ以外はクリア
 16422:         //  INEX1  引数がpackedで正確に変換できないときセット、それ以外はクリア
 16423:         XEiJ.mpuCycleCount += 67;
 16424:         XEiJ.fpuBox.epbSetRoundingPrec (EFPBox.EPB_PREC_DBL);
 16425:         XEiJ.fpuFPn[n].sqrt (XEiJ.fpuFPn[m]);
 16426:         break;
 16427: 
 16428:         //case 0b100_0110:  //$xx46:
 16429:         //case 0b100_0111:  //$xx47:
 16430:         //case 0b100_1000:  //$xx48:
 16431:         //case 0b100_1001:  //$xx49:
 16432:         //case 0b100_1010:  //$xx4A:
 16433:         //case 0b100_1011:  //$xx4B:
 16434:         //case 0b100_1100:  //$xx4C:
 16435:         //case 0b100_1101:  //$xx4D:
 16436:         //case 0b100_1110:  //$xx4E:
 16437:         //case 0b100_1111:  //$xx4F:
 16438:         //case 0b101_0000:  //$xx50:
 16439:         //case 0b101_0001:  //$xx51:
 16440:         //case 0b101_0010:  //$xx52:
 16441:         //case 0b101_0011:  //$xx53:
 16442:         //case 0b101_0100:  //$xx54:
 16443:         //case 0b101_0101:  //$xx55:
 16444:         //case 0b101_0110:  //$xx56:
 16445:         //case 0b101_0111:  //$xx57:
 16446: 
 16447:       case 0b101_1000:  //$xx58: FSABS.* *m,FPn
 16448:         //  BSUN   常にクリア
 16449:         //  SNAN   引数がシグナリングNaNのときセット、それ以外はクリア
 16450:         //  OPERR  常にクリア
 16451:         //  OVFL   常にクリア
 16452:         //  UNFL   結果が非正規化数のときセット、それ以外はクリア
 16453:         //  DZ     常にクリア
 16454:         //  INEX2  常にクリア
 16455:         //  INEX1  引数がpackedで正確に変換できないときセット、それ以外はクリア
 16456:         XEiJ.fpuBox.epbSetRoundingPrec (EFPBox.EPB_PREC_SGL);
 16457:         XEiJ.fpuFPn[n].abs (XEiJ.fpuFPn[m]);
 16458:         break;
 16459: 
 16460:         //case 0b101_1001:  //$xx59:
 16461: 
 16462:       case 0b101_1010:  //$xx5A: FSNEG.* *m,FPn
 16463:         //  BSUN   常にクリア
 16464:         //  SNAN   引数がシグナリングNaNのときセット、それ以外はクリア
 16465:         //  OPERR  常にクリア
 16466:         //  OVFL   常にクリア
 16467:         //  UNFL   結果が非正規化数のときセット、それ以外はクリア
 16468:         //  DZ     常にクリア
 16469:         //  INEX2  常にクリア
 16470:         //  INEX1  引数がpackedで正確に変換できないときセット、それ以外はクリア
 16471:         XEiJ.fpuBox.epbSetRoundingPrec (EFPBox.EPB_PREC_SGL);
 16472:         XEiJ.fpuFPn[n].neg (XEiJ.fpuFPn[m]);
 16473:         break;
 16474: 
 16475:         //case 0b101_1011:  //$xx5B:
 16476: 
 16477:       case 0b101_1100:  //$xx5C: FDABS.* *m,FPn
 16478:         //  BSUN   常にクリア
 16479:         //  SNAN   引数がシグナリングNaNのときセット、それ以外はクリア
 16480:         //  OPERR  常にクリア
 16481:         //  OVFL   常にクリア
 16482:         //  UNFL   結果が非正規化数のときセット、それ以外はクリア
 16483:         //  DZ     常にクリア
 16484:         //  INEX2  常にクリア
 16485:         //  INEX1  引数がpackedで正確に変換できないときセット、それ以外はクリア
 16486:         XEiJ.fpuBox.epbSetRoundingPrec (EFPBox.EPB_PREC_DBL);
 16487:         XEiJ.fpuFPn[n].abs (XEiJ.fpuFPn[m]);
 16488:         break;
 16489: 
 16490:         //case 0b101_1101:  //$xx5D:
 16491: 
 16492:       case 0b101_1110:  //$xx5E: FDNEG.* *m,FPn
 16493:         //  BSUN   常にクリア
 16494:         //  SNAN   引数がシグナリングNaNのときセット、それ以外はクリア
 16495:         //  OPERR  常にクリア
 16496:         //  OVFL   常にクリア
 16497:         //  UNFL   結果が非正規化数のときセット、それ以外はクリア
 16498:         //  DZ     常にクリア
 16499:         //  INEX2  常にクリア
 16500:         //  INEX1  引数がpackedで正確に変換できないときセット、それ以外はクリア
 16501:         XEiJ.fpuBox.epbSetRoundingPrec (EFPBox.EPB_PREC_DBL);
 16502:         XEiJ.fpuFPn[n].neg (XEiJ.fpuFPn[m]);
 16503:         break;
 16504: 
 16505:         //case 0b101_1111:  //$xx5F:
 16506: 
 16507:       case 0b110_0000:  //$xx60: FSDIV.* *m,FPn
 16508:         //  BSUN   常にクリア
 16509:         //  SNAN   引数がシグナリングNaNのときセット、それ以外はクリア
 16510:         //  OPERR  引数が両方ゼロまたは両方無限大のときセット、それ以外はクリア
 16511:         //  OVFL   オーバーフローしたときセット、それ以外はクリア
 16512:         //  UNFL   結果が非正規化数のときセット、それ以外はクリア
 16513:         //  DZ     被除数がゼロ、無限大、NaN以外で除数がゼロのときセット、それ以外はクリア
 16514:         //  INEX2  結果に誤差があるときセット、それ以外はクリア
 16515:         //  INEX1  引数がpackedで正確に変換できないときセット、それ以外はクリア
 16516:         XEiJ.mpuCycleCount += 36;
 16517:         XEiJ.fpuBox.epbSetRoundingPrec (EFPBox.EPB_PREC_SGL);
 16518:         XEiJ.fpuFPn[n].div (XEiJ.fpuFPn[m]);
 16519:         break;
 16520: 
 16521:         //case 0b110_0001:  //$xx61:
 16522: 
 16523:       case 0b110_0010:  //$xx62: FSADD.* *m,FPn
 16524:         //  BSUN   常にクリア
 16525:         //  SNAN   引数がシグナリングNaNのときセット、それ以外はクリア
 16526:         //  OPERR  引数が両方無限大で符号が異なるときセット、それ以外はクリア
 16527:         //  OVFL   オーバーフローしたときセット、それ以外はクリア
 16528:         //  UNFL   結果が非正規化数のときセット、それ以外はクリア
 16529:         //  DZ     常にクリア
 16530:         //  INEX2  結果に誤差があるときセット、それ以外はクリア
 16531:         //  INEX1  引数がpackedで正確に変換できないときセット、それ以外はクリア
 16532:         XEiJ.mpuCycleCount += 2;
 16533:         XEiJ.fpuBox.epbSetRoundingPrec (EFPBox.EPB_PREC_SGL);
 16534:         XEiJ.fpuFPn[n].add (XEiJ.fpuFPn[m]);
 16535:         break;
 16536: 
 16537:       case 0b110_0011:  //$xx63: FSMUL.* *m,FPn
 16538:         //  BSUN   常にクリア
 16539:         //  SNAN   引数がシグナリングNaNのときセット、それ以外はクリア
 16540:         //  OPERR  引数の一方がゼロで他方が無限大のときセット、それ以外はクリア
 16541:         //  OVFL   オーバーフローしたときセット、それ以外はクリア
 16542:         //  UNFL   結果が非正規化数のときセット、それ以外はクリア
 16543:         //  DZ     常にクリア
 16544:         //  INEX2  結果に誤差があるときセット、それ以外はクリア
 16545:         //  INEX1  引数がpackedで正確に変換できないときセット、それ以外はクリア
 16546:         XEiJ.mpuCycleCount += 2;
 16547:         XEiJ.fpuBox.epbSetRoundingPrec (EFPBox.EPB_PREC_SGL);
 16548:         XEiJ.fpuFPn[n].mul (XEiJ.fpuFPn[m]);
 16549:         break;
 16550: 
 16551:       case 0b110_0100:  //$xx64: FDDIV.* *m,FPn
 16552:         //  BSUN   常にクリア
 16553:         //  SNAN   引数がシグナリングNaNのときセット、それ以外はクリア
 16554:         //  OPERR  引数が両方ゼロまたは両方無限大のときセット、それ以外はクリア
 16555:         //  OVFL   オーバーフローしたときセット、それ以外はクリア
 16556:         //  UNFL   結果が非正規化数のときセット、それ以外はクリア
 16557:         //  DZ     被除数がゼロ、無限大、NaN以外で除数がゼロのときセット、それ以外はクリア
 16558:         //  INEX2  結果に誤差があるときセット、それ以外はクリア
 16559:         //  INEX1  引数がpackedで正確に変換できないときセット、それ以外はクリア
 16560:         XEiJ.mpuCycleCount += 36;
 16561:         XEiJ.fpuBox.epbSetRoundingPrec (EFPBox.EPB_PREC_DBL);
 16562:         XEiJ.fpuFPn[n].div (XEiJ.fpuFPn[m]);
 16563:         break;
 16564: 
 16565:         //case 0b110_0101:  //$xx65:
 16566: 
 16567:       case 0b110_0110:  //$xx66: FDADD.* *m,FPn
 16568:         //  BSUN   常にクリア
 16569:         //  SNAN   引数がシグナリングNaNのときセット、それ以外はクリア
 16570:         //  OPERR  引数が両方無限大で符号が異なるときセット、それ以外はクリア
 16571:         //  OVFL   オーバーフローしたときセット、それ以外はクリア
 16572:         //  UNFL   結果が非正規化数のときセット、それ以外はクリア
 16573:         //  DZ     常にクリア
 16574:         //  INEX2  結果に誤差があるときセット、それ以外はクリア
 16575:         //  INEX1  引数がpackedで正確に変換できないときセット、それ以外はクリア
 16576:         XEiJ.mpuCycleCount += 2;
 16577:         XEiJ.fpuBox.epbSetRoundingPrec (EFPBox.EPB_PREC_DBL);
 16578:         XEiJ.fpuFPn[n].add (XEiJ.fpuFPn[m]);
 16579:         break;
 16580: 
 16581:       case 0b110_0111:  //$xx67: FDMUL.* *m,FPn
 16582:         //  BSUN   常にクリア
 16583:         //  SNAN   引数がシグナリングNaNのときセット、それ以外はクリア
 16584:         //  OPERR  引数の一方がゼロで他方が無限大のときセット、それ以外はクリア
 16585:         //  OVFL   オーバーフローしたときセット、それ以外はクリア
 16586:         //  UNFL   結果が非正規化数のときセット、それ以外はクリア
 16587:         //  DZ     常にクリア
 16588:         //  INEX2  結果に誤差があるときセット、それ以外はクリア
 16589:         //  INEX1  引数がpackedで正確に変換できないときセット、それ以外はクリア
 16590:         XEiJ.mpuCycleCount += 2;
 16591:         XEiJ.fpuBox.epbSetRoundingPrec (EFPBox.EPB_PREC_DBL);
 16592:         XEiJ.fpuFPn[n].mul (XEiJ.fpuFPn[m]);
 16593:         break;
 16594: 
 16595:       case 0b110_1000:  //$xx68: FSSUB.* *m,FPn
 16596:         //  BSUN   常にクリア
 16597:         //  SNAN   引数がシグナリングNaNのときセット、それ以外はクリア
 16598:         //  OPERR  引数が両方無限大で符号が同じときセット、それ以外はクリア
 16599:         //  OVFL   オーバーフローしたときセット、それ以外はクリア
 16600:         //  UNFL   結果が非正規化数のときセット、それ以外はクリア
 16601:         //  DZ     常にクリア
 16602:         //  INEX2  結果に誤差があるときセット、それ以外はクリア
 16603:         //  INEX1  引数がpackedで正確に変換できないときセット、それ以外はクリア
 16604:         XEiJ.mpuCycleCount += 2;
 16605:         XEiJ.fpuBox.epbSetRoundingPrec (EFPBox.EPB_PREC_SGL);
 16606:         XEiJ.fpuFPn[n].sub (XEiJ.fpuFPn[m]);
 16607:         break;
 16608: 
 16609:         //case 0b110_1001:  //$xx69:
 16610:         //case 0b110_1010:  //$xx6A:
 16611:         //case 0b110_1011:  //$xx6B:
 16612: 
 16613:       case 0b110_1100:  //$xx6C: FDSUB.* *m,FPn
 16614:         //  BSUN   常にクリア
 16615:         //  SNAN   引数がシグナリングNaNのときセット、それ以外はクリア
 16616:         //  OPERR  引数が両方無限大で符号が同じときセット、それ以外はクリア
 16617:         //  OVFL   オーバーフローしたときセット、それ以外はクリア
 16618:         //  UNFL   結果が非正規化数のときセット、それ以外はクリア
 16619:         //  DZ     常にクリア
 16620:         //  INEX2  結果に誤差があるときセット、それ以外はクリア
 16621:         //  INEX1  引数がpackedで正確に変換できないときセット、それ以外はクリア
 16622:         XEiJ.mpuCycleCount += 2;
 16623:         XEiJ.fpuBox.epbSetRoundingPrec (EFPBox.EPB_PREC_DBL);
 16624:         XEiJ.fpuFPn[n].sub (XEiJ.fpuFPn[m]);
 16625:         break;
 16626: 
 16627:         //case 0b110_1101:  //$xx6D:
 16628:         //case 0b110_1110:  //$xx6E:
 16629:         //case 0b110_1111:  //$xx6F:
 16630: 
 16631:       case 0b111_0000:  //$xx70: FLGAMMA *m,FPn
 16632:         if (EFPBox.EPB_EXTRA_OPERATION) {
 16633:           XEiJ.fpuFPn[n].lgamma (XEiJ.fpuFPn[m]);
 16634:           break;
 16635:         } else {
 16636:           XEiJ.regPC = XEiJ.regPC0 + 2;  //拡張ワードを読まなかったことにする
 16637:           irpFline ();
 16638:           break fgen;
 16639:         }
 16640: 
 16641:       case 0b111_0001:  //$xx71: FTGAMMA *m,FPn
 16642:         if (EFPBox.EPB_EXTRA_OPERATION) {
 16643:           XEiJ.fpuFPn[n].tgamma (XEiJ.fpuFPn[m]);
 16644:           break;
 16645:         } else {
 16646:           XEiJ.regPC = XEiJ.regPC0 + 2;  //拡張ワードを読まなかったことにする
 16647:           irpFline ();
 16648:           break fgen;
 16649:         }
 16650: 
 16651:         //case 0b111_0010:  //$xx72:
 16652:         //case 0b111_0011:  //$xx73:
 16653:         //case 0b111_0100:  //$xx74:
 16654:         //case 0b111_0101:  //$xx75:
 16655:         //case 0b111_0110:  //$xx76:
 16656:         //case 0b111_0111:  //$xx77:
 16657:         //case 0b111_1000:  //$xx78:
 16658:         //case 0b111_1001:  //$xx79:
 16659:         //case 0b111_1010:  //$xx7A:
 16660:         //case 0b111_1011:  //$xx7B:
 16661:         //case 0b111_1100:  //$xx7C:
 16662:         //case 0b111_1101:  //$xx7D:
 16663:         //case 0b111_1110:  //$xx7E:
 16664:         //case 0b111_1111:  //$xx7F:
 16665: 
 16666:       default:  //未定義
 16667:         XEiJ.regPC = XEiJ.regPC0 + 2;  //拡張ワードを読まなかったことにする
 16668:         irpFline ();
 16669:         break fgen;
 16670:       }
 16671:       //FPSRのFPCCを設定する
 16672:       XEiJ.fpuBox.epbFpsr |= XEiJ.fpuFPn[n].flg >>> 4;
 16673:       //FPSRのAEXCを設定する
 16674:       XEiJ.fpuBox.epbFpsr |= XEiJ.FPU_FPSR_EXC_TO_AEXC[XEiJ.fpuBox.epbFpsr >> 8 & 255];
 16675:       //浮動小数点命令実行後例外 floating-point post-instruction exception
 16676:       if (irpFPPostInstruction (a)) {
 16677:         break fgen;
 16678:       }
 16679:       break fgen;
 16680: 
 16681: 
 16682:     case 0b011:  //$6xxx-$7xxx: FMOVE.* FPn,<ea>
 16683:       //  BSUN   常にクリア
 16684:       //  SNAN   引数がシグナリングNaNのときセット、それ以外はクリア
 16685:       //  OPERR  byte,word,longで無限大または指定されたサイズに収まらないとき、packedでk-factorが17よりも大きいか指数部が3桁に収まらないときセット、それ以外はクリア
 16686:       //  OVFL   packedではなくてオーバーフローしたときセット、それ以外はクリア
 16687:       //  UNFL   packedではなくて結果が非正規化数のときセット、それ以外はクリア
 16688:       //  DZ     常にクリア
 16689:       //  INEX2  結果に誤差があるときセット、それ以外はクリア
 16690:       //  INEX1  常にクリア
 16691:       XEiJ.fpuBox.epbFpsr &= 0xffff00ff;  //FMOVE.* FPn,<ea>でFPSRのコンディションコードバイトは変化しない
 16692:       XEiJ.fpuBox.epbFpiar = XEiJ.regPC0;  //FPIARはFMOVEM/FMOVE FPcr/FSAVE/FRESTORE以外の命令で例外が発生しなくても更新される
 16693: 
 16694:       switch (m) {
 16695: 
 16696:       case 0b000:  //$60xx-$63xx: FMOVE.L FPn,<ea>
 16697:         {
 16698:           int i = XEiJ.fpuFPn[n].geti (XEiJ.fpuBox.epbRoundingMode);
 16699:           if (ea < XEiJ.EA_AR) {  //Dr。Ar不可
 16700:             XEiJ.regRn[ea] = i;
 16701:           } else {  //Dr以外
 16702:             a = efaMltLong (ea);
 16703:             mmuWriteLongData (a, i, XEiJ.regSRS);
 16704:           }
 16705:         }
 16706:         break;
 16707: 
 16708:       case 0b001:  //$64xx-$67xx: FMOVE.S FPn,<ea>
 16709:         {
 16710:           int i = XEiJ.fpuFPn[n].getf0 (XEiJ.fpuBox.epbRoundingMode);
 16711:           if (ea < XEiJ.EA_AR) {  //Dr。Ar不可
 16712:             XEiJ.regRn[ea] = i;
 16713:           } else {  //Dr以外
 16714:             a = efaMltLong (ea);
 16715:             mmuWriteLongData (a, i, XEiJ.regSRS);
 16716:           }
 16717:         }
 16718:         break;
 16719: 
 16720:       case 0b010:  //$68xx-$6Bxx: FMOVE.X FPn,<ea>
 16721:         {
 16722:           int[] ib = new int[3];
 16723:           if (XEiJ.fpuBox.epbIsTriple ()) {  //三倍精度
 16724:             XEiJ.fpuFPn[n].gety012 (ib, 0, XEiJ.fpuBox.epbRoundingMode);
 16725:           } else {  //拡張精度
 16726:             XEiJ.fpuFPn[n].getx012 (ib, 0, XEiJ.fpuBox.epbRoundingMode);
 16727:           }
 16728:           a = efaMltExtd (ea);
 16729:           if ((ea & 070) == 040) {  //-(Ar)
 16730:             mmuWriteLongData (m60Address = a + 8, ib[2], XEiJ.regSRS);
 16731:             mmuWriteLongData (m60Address = a + 4, ib[1], XEiJ.regSRS);
 16732:             mmuWriteLongData (m60Address = a, ib[0], XEiJ.regSRS);
 16733:           } else {  //-(Ar)以外
 16734:             mmuWriteLongData (m60Address = a, ib[0], XEiJ.regSRS);
 16735:             mmuWriteLongData (m60Address = a + 4, ib[1], XEiJ.regSRS);
 16736:             mmuWriteLongData (m60Address = a + 8, ib[2], XEiJ.regSRS);
 16737:           }
 16738:         }
 16739:         break;
 16740: 
 16741:       case 0b011:  //$6Cxx-$6Fxx: FMOVE.P FPn,<ea>{#k}
 16742:         {
 16743:           a = efaMltExtd (ea);
 16744:           if (!XEiJ.fpuBox.epbIsFullSpec ()) {  //パックトデシマル
 16745:             XEiJ.fpuBox.epbExceptionStatusWord = 0xe000 | M68kException.M6E_FP_UNSUPPORTED_DATA_TYPE & 7;
 16746:             irpExceptionFormat3 (M68kException.M6E_FP_UNSUPPORTED_DATA_TYPE << 2, XEiJ.regPC, a);  //pcは次の命令,アドレスはデスティネーションオペランド
 16747:             break fgen;
 16748:           }
 16749:           int[] ib = new int[3];
 16750:           XEiJ.fpuFPn[n].getp012 (ib, 0, w);  //k-factor付き
 16751:           if ((ea & 070) == 040) {  //-(Ar)
 16752:             mmuWriteLongData (m60Address = a + 8, ib[2], XEiJ.regSRS);
 16753:             mmuWriteLongData (m60Address = a + 4, ib[1], XEiJ.regSRS);
 16754:             mmuWriteLongData (m60Address = a, ib[0], XEiJ.regSRS);
 16755:           } else {  //-(Ar)以外
 16756:             mmuWriteLongData (m60Address = a, ib[0], XEiJ.regSRS);
 16757:             mmuWriteLongData (m60Address = a + 4, ib[1], XEiJ.regSRS);
 16758:             mmuWriteLongData (m60Address = a + 8, ib[2], XEiJ.regSRS);
 16759:           }
 16760:         }
 16761:         break;
 16762: 
 16763:       case 0b100:  //$70xx-$73xx: FMOVE.W FPn,<ea>
 16764:         {
 16765:           int i = XEiJ.fpuFPn[n].gets (XEiJ.fpuBox.epbRoundingMode);
 16766:           if (ea < XEiJ.EA_AR) {  //Dr。Ar不可
 16767:             XEiJ.regRn[ea] = XEiJ.regRn[ea] & ~65535 | (char) i;
 16768:           } else {  //Dr以外
 16769:             a = efaMltWord (ea);
 16770:             mmuWriteWordData (a, i, XEiJ.regSRS);
 16771:           }
 16772:         }
 16773:         break;
 16774: 
 16775:       case 0b101:  //$74xx-$77xx: FMOVE.D FPn,<ea>
 16776:         {
 16777:           long l = XEiJ.fpuFPn[n].getd01 (XEiJ.fpuBox.epbRoundingMode);
 16778:           a = efaMltQuad (ea);
 16779:           mmuWriteQuadData (a, l, XEiJ.regSRS);
 16780:         }
 16781:         break;
 16782: 
 16783:       case 0b110:  //$78xx-$7Bxx: FMOVE.B FPn,<ea>
 16784:         {
 16785:           int i = XEiJ.fpuFPn[n].getb (XEiJ.fpuBox.epbRoundingMode);
 16786:           if (ea < XEiJ.EA_AR) {  //Dr。Ar不可
 16787:             XEiJ.regRn[ea] = XEiJ.regRn[ea] & ~255 | i & 255;
 16788:           } else {  //Dr以外
 16789:             a = efaMltByte (ea);
 16790:             mmuWriteByteData (a, i, XEiJ.regSRS);
 16791:           }
 16792:         }
 16793:         break;
 16794: 
 16795:       case 0b111:  //$7Cxx-$7Fxx: FMOVE.P FPn,<ea>{Dl}
 16796:       default:
 16797:         {
 16798:           a = efaMltExtd (ea);
 16799:           if (!XEiJ.fpuBox.epbIsFullSpec ()) {  //パックトデシマル
 16800:             XEiJ.fpuBox.epbExceptionStatusWord = 0xe000 | M68kException.M6E_FP_UNSUPPORTED_DATA_TYPE & 7;
 16801:             irpExceptionFormat3 (M68kException.M6E_FP_UNSUPPORTED_DATA_TYPE << 2, XEiJ.regPC, a);  //pcは次の命令,アドレスはデスティネーションオペランド
 16802:             break fgen;
 16803:           }
 16804:           byte[] b = new byte[12];
 16805:           XEiJ.fpuFPn[n].getp012 (b, 0, XEiJ.regRn[w >> 4 & 7]);  //k-factor付き
 16806:           if (ea >> 3 == XEiJ.MMM_MN) {  //-(Ar)
 16807:             mmuWriteByteArrayDecrement (a, b, 0, 12, XEiJ.regSRS);
 16808:           } else {  //-(Ar)
 16809:             mmuWriteByteArray (a, b, 0, 12, XEiJ.regSRS);
 16810:           }
 16811:         }
 16812:       }
 16813:       //FPSRのAEXCを設定する
 16814:       XEiJ.fpuBox.epbFpsr |= XEiJ.FPU_FPSR_EXC_TO_AEXC[XEiJ.fpuBox.epbFpsr >> 8 & 255];
 16815:       //浮動小数点命令実行後例外 floating-point post-instruction exception
 16816:       if (irpFPPostInstruction (a)) {
 16817:         break fgen;
 16818:       }
 16819:       break fgen;
 16820: 
 16821: 
 16822:     case 0b100:  //$8xxx-$9xxx: FMOVEM.L <ea>,FPCR/FPSR/FPIAR
 16823:       XEiJ.mpuCycleCount += 6;
 16824:       //  FMOVEM命令は例外を発生させずFPCR/FPSR/FPIARも(デスティネーションに書かれたもの以外)変化しない
 16825:       //  格納順序はFPCRが下位アドレス(連結したとき上位),FPIARが上位アドレス(連結したとき下位)
 16826: 
 16827:       //  レジスタリストは転送方向によらず4=FPCR,2=FPSR,1=FPIAR。0のとき1とみなす
 16828:       //  Dr,Arは単一レジスタのみ、ArはFPIARのみ、さもなくば不当命令
 16829:       //  (Ar)+は下位から転送した後にArをまとめて増やし、-(Ar)はArをまとめて減らした後に下位から転送する
 16830:       //  68060のとき#<data>は単一レジスタのみ、さもなくば未実装実効アドレス
 16831:       //  複数転送するときもFSLWのSIZEはLong
 16832:       {
 16833:         if (m == 0) {  //レジスタリストが0のとき
 16834:           m = 1;  //FPIARとみなす
 16835:         }
 16836:         int s = m == 7 ? 12 : m == 6 || m == 5 || m == 3 ? 8 : 4;  //転送サイズ
 16837:         if ((ea & 070) == 000) {  //Dr
 16838:           if (4 < s) {  //複数
 16839:             M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION;
 16840:             throw M68kException.m6eSignal;
 16841:           }
 16842:         } else if ((ea & 070) == 010) {  //Ar
 16843:           if (m != 1) {  //FPIAR以外
 16844:             M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION;
 16845:             throw M68kException.m6eSignal;
 16846:           }
 16847:         } else if ((ea & 070) == 030) {  //(Ar)+
 16848:           a = XEiJ.regRn[ea - (030 - 8)];
 16849:         } else if ((ea & 070) == 040) {  //-(Ar)
 16850:           m60Incremented -= (long) s << (ea << 3);
 16851:           a = XEiJ.regRn[ea - (040 - 8)] -= s;
 16852:         } else if (ea == 074) {  //#<data>
 16853:           if (4 < s &&  //複数
 16854:               !XEiJ.fpuBox.epbIsFullSpec ()) {  //フルスペック以外
 16855:             irpExceptionFormat0 (M68kException.M6E_UNIMPLEMENTED_EFFECTIVE << 2, XEiJ.regPC0);  //pcは命令の先頭
 16856:             break fgen;
 16857:           }
 16858:         } else {  //その他
 16859:           a = efaMemLong (ea);
 16860:         }
 16861:         for (int t = 4; 1 <= t; t >>= 1) {  //4,2,1
 16862:           if ((m & t) == 0) {
 16863:             continue;
 16864:           }
 16865:           int i = (ea < 020 ? XEiJ.regRn[ea] :  //Dr,Ar
 16866:                    ea == 074 ? mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS) :  //#<data>
 16867:                    mmuReadLongData (m60Address = a, XEiJ.regSRS));
 16868:           if (t == 4) {  //FPCR
 16869:             XEiJ.fpuBox.epbFpcr = i & EFPBox.EPB_FPCR_ALL;
 16870:           } else if (t == 2) {  //FPSR
 16871:             XEiJ.fpuBox.epbFpsr = i & EFPBox.EPB_FPSR_ALL;
 16872:             //  fmove.lでfpsrのEXCに書き込んだだけではAEXCは更新されない
 16873:             //  fmove.lでfpsrに0x0000ff00を書き込んですぐに読み出しても0x0000ff00のまま
 16874:           } else {  //FPIAR
 16875:             XEiJ.fpuBox.epbFpiar = i;
 16876:           }
 16877:           a += 4;
 16878:         }
 16879:         if ((ea & 070) == 030) {  //(Ar)+
 16880:           m60Incremented += (long) s << (ea << 3);
 16881:           XEiJ.regRn[ea - (040 - 8)] += s;
 16882:         }
 16883:       }
 16884:       break fgen;
 16885: 
 16886: 
 16887:     case 0b101:  //$Axxx-$Bxxx: FMOVEM.L FPCR/FPSR/FPIAR,<ea>
 16888:       XEiJ.mpuCycleCount += 4;
 16889: 
 16890:       {
 16891:         if (m == 0) {  //レジスタリストが0のとき
 16892:           m = 1;  //FPIARとみなす
 16893:         }
 16894:         int s = m == 7 ? 12 : m == 6 || m == 5 || m == 3 ? 8 : 4;  //転送サイズ
 16895:         if ((ea & 070) == 000) {  //Dr
 16896:           if (4 < s) {  //複数
 16897:             M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION;
 16898:             throw M68kException.m6eSignal;
 16899:           }
 16900:         } else if ((ea & 070) == 010) {  //Ar
 16901:           if (m != 1) {  //FPIAR以外
 16902:             M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION;
 16903:             throw M68kException.m6eSignal;
 16904:           }
 16905:         } else if ((ea & 070) == 030) {  //(Ar)+
 16906:           a = XEiJ.regRn[ea - (030 - 8)];
 16907:         } else if ((ea & 070) == 040) {  //-(Ar)
 16908:           m60Incremented -= (long) s << (ea << 3);
 16909:           a = XEiJ.regRn[ea - (040 - 8)] -= s;
 16910:         } else {  //その他
 16911:           a = efaMltLong (ea);
 16912:         }
 16913:         for (int t = 4; 1 <= t; t >>= 1) {  //4,2,1
 16914:           if ((m & t) == 0) {
 16915:             continue;
 16916:           }
 16917:           int i = (t == 4 ? XEiJ.fpuBox.epbFpcr :  //FPCR
 16918:                    t == 2 ? XEiJ.fpuBox.epbFpsr :  //FPSR
 16919:                    XEiJ.fpuBox.epbFpiar);  //FPIAR
 16920:           if (ea < 020) {  //Dr,Ar
 16921:             XEiJ.regRn[ea] = i;
 16922:           } else {
 16923:             mmuWriteLongData (m60Address = a, i, XEiJ.regSRS);
 16924:           }
 16925:           a += 4;
 16926:         }
 16927:         if ((ea & 070) == 030) {  //(Ar)+
 16928:           m60Incremented += (long) s << (ea << 3);
 16929:           XEiJ.regRn[ea - (040 - 8)] += s;
 16930:         }
 16931:       }
 16932:       break fgen;
 16933: 
 16934: 
 16935:     case 0b110:  //$Cxxx-$Dxxx: FMOVEM.X <ea>,<list>
 16936:       //     0 <ea>,<list>
 16937:       //     1 <list>,<ea>
 16938:       //      0 -(Ar)     76543210
 16939:       //      1 -(Ar)以外 01234567
 16940:       //       0 static
 16941:       //       1 dynamic  0rrr0000
 16942:       //      mmm
 16943:       {
 16944:         if ((m & 2) != 0 && !XEiJ.fpuBox.epbIsFullSpec ()) {  //動的レジスタリスト
 16945:           irpExceptionFormat0 (M68kException.M6E_UNIMPLEMENTED_EFFECTIVE << 2, XEiJ.regPC0);  //pcは命令の先頭
 16946:           break fgen;
 16947:         }
 16948:         int l = 0xff & ((m & 2) == 0 ? w : XEiJ.regRn[(0x0070 & w) >> 4]);
 16949:         int[] ib = new int[3];
 16950:         if ((ea & 070) == 030) {  //(Ar)+
 16951:           int arr = ea - (030 - 8);
 16952:           a = XEiJ.regRn[arr];
 16953:           for (n = 0; n <= 7; n++) {
 16954:             if ((l & (0x80 >> n)) == 0) {  //01234567
 16955:               continue;
 16956:             }
 16957:             XEiJ.mpuCycleCount += 3;
 16958:             ib[0] = mmuReadLongData (m60Address = a, XEiJ.regSRS);
 16959:             ib[1] = mmuReadLongData (m60Address = a + 4, XEiJ.regSRS);
 16960:             ib[2] = mmuReadLongData (m60Address = a + 8, XEiJ.regSRS);
 16961:             if (XEiJ.fpuBox.epbIsTriple ()) {  //三倍精度
 16962:               XEiJ.fpuFPn[n].sety012 (ib, 0);
 16963:             } else {  //拡張精度
 16964:               XEiJ.fpuFPn[n].setx012 (ib, 0);
 16965:             }
 16966:             a += 12;
 16967:           }
 16968:           m60Incremented += (long) (a - XEiJ.regRn[arr]) << (arr << 3);
 16969:           XEiJ.regRn[arr] = a;
 16970:         } else {  //(Ar)+以外
 16971:           a = efaCntLong (ea);
 16972:           for (n = 0; n <= 7; n++) {
 16973:             if ((l & (0x80 >> n)) == 0) {  //01234567
 16974:               continue;
 16975:             }
 16976:             XEiJ.mpuCycleCount += 3;
 16977:             ib[0] = mmuReadLongData (m60Address = a, XEiJ.regSRS);
 16978:             ib[1] = mmuReadLongData (m60Address = a + 4, XEiJ.regSRS);
 16979:             ib[2] = mmuReadLongData (m60Address = a + 8, XEiJ.regSRS);
 16980:             if (XEiJ.fpuBox.epbIsTriple ()) {  //三倍精度
 16981:               XEiJ.fpuFPn[n].sety012 (ib, 0);
 16982:             } else {  //拡張精度
 16983:               XEiJ.fpuFPn[n].setx012 (ib, 0);
 16984:             }
 16985:             a += 12;
 16986:           }
 16987:         }
 16988:       }
 16989:       break fgen;
 16990: 
 16991: 
 16992:     case 0b111:  //$Exxx-$Fxxx: FMOVEM.X <list>,<ea>
 16993:       {
 16994:         if ((m & 2) != 0 && !XEiJ.fpuBox.epbIsFullSpec ()) {  //動的レジスタリスト
 16995:           irpExceptionFormat0 (M68kException.M6E_UNIMPLEMENTED_EFFECTIVE << 2, XEiJ.regPC0);  //pcは命令の先頭
 16996:           break fgen;
 16997:         }
 16998:         int l = 0xff & ((m & 2) == 0 ? w : XEiJ.regRn[(0x0070 & w) >> 4]);
 16999:         int[] ib = new int[3];
 17000:         if ((ea & 070) == 040) {  //-(Ar)
 17001:           int arr = ea - (040 - 8);
 17002:           a = XEiJ.regRn[arr];
 17003:           for (n = 7; 0 <= n; n--) {
 17004:             if ((l & (0x01 << n)) == 0) {  //76543210
 17005:               continue;
 17006:             }
 17007:             XEiJ.mpuCycleCount += 3;
 17008:             a -= 12;
 17009:             if (XEiJ.fpuBox.epbIsTriple ()) {  //三倍精度
 17010:               XEiJ.fpuFPn[n].gety012 (ib, 0, XEiJ.fpuBox.epbRoundingMode);
 17011:             } else {  //拡張精度
 17012:               XEiJ.fpuFPn[n].getx012 (ib, 0, XEiJ.fpuBox.epbRoundingMode);
 17013:             }
 17014:             mmuWriteLongData (m60Address = a + 8, ib[2], XEiJ.regSRS);
 17015:             mmuWriteLongData (m60Address = a + 4, ib[1], XEiJ.regSRS);
 17016:             mmuWriteLongData (m60Address = a, ib[0], XEiJ.regSRS);
 17017:           }
 17018:           m60Incremented -= (long) (XEiJ.regRn[arr] - a) << (arr << 3);
 17019:           XEiJ.regRn[arr] = a;
 17020:         } else {  //-(Ar)以外
 17021:           a = efaCntLong (ea);
 17022:           for (n = 0; n <= 7; n++) {
 17023:             if ((l & (0x80 >> n)) == 0) {  //01234567
 17024:               continue;
 17025:             }
 17026:             XEiJ.mpuCycleCount += 3;
 17027:             if (XEiJ.fpuBox.epbIsTriple ()) {  //三倍精度
 17028:               XEiJ.fpuFPn[n].gety012 (ib, 0, XEiJ.fpuBox.epbRoundingMode);
 17029:             } else {  //拡張精度
 17030:               XEiJ.fpuFPn[n].getx012 (ib, 0, XEiJ.fpuBox.epbRoundingMode);
 17031:             }
 17032:             mmuWriteLongData (m60Address = a, ib[0], XEiJ.regSRS);
 17033:             mmuWriteLongData (m60Address = a + 4, ib[1], XEiJ.regSRS);
 17034:             mmuWriteLongData (m60Address = a + 8, ib[2], XEiJ.regSRS);
 17035:             a += 12;
 17036:           }
 17037:         }
 17038:       }
 17039:       break fgen;
 17040: 
 17041: 
 17042:     case 0b001:  //$2xxx-$3xxx: 未定義
 17043:     default:  //未定義
 17044:       XEiJ.fpuBox.epbFpiar = XEiJ.regPC0;  //FPIARはFMOVEM/FMOVE FPcr/FSAVE/FRESTORE以外の命令で例外が発生しなくても更新される
 17045:       XEiJ.regPC = XEiJ.regPC0 + 2;  //拡張ワードを読まなかったことにする
 17046:       irpFline ();
 17047:       break fgen;
 17048:     }
 17049:   }  //fgen
 17050:   }  //irpFgen
 17051: 
 17052: 
 17053:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 17054:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 17055:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 17056:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 17057:   //FSF.B <ea>                                      |-|--CC4S|-|-----|-----|D M+-WXZ  |1111_001_001_mmm_rrr-0000000000000000
 17058:   //FSEQ.B <ea>                                     |-|--CC4S|-|-----|-----|D M+-WXZ  |1111_001_001_mmm_rrr-0000000000000001
 17059:   //FSOGT.B <ea>                                    |-|--CC4S|-|-----|-----|D M+-WXZ  |1111_001_001_mmm_rrr-0000000000000010
 17060:   //FSOGE.B <ea>                                    |-|--CC4S|-|-----|-----|D M+-WXZ  |1111_001_001_mmm_rrr-0000000000000011
 17061:   //FSOLT.B <ea>                                    |-|--CC4S|-|-----|-----|D M+-WXZ  |1111_001_001_mmm_rrr-0000000000000100
 17062:   //FSOLE.B <ea>                                    |-|--CC4S|-|-----|-----|D M+-WXZ  |1111_001_001_mmm_rrr-0000000000000101
 17063:   //FSOGL.B <ea>                                    |-|--CC4S|-|-----|-----|D M+-WXZ  |1111_001_001_mmm_rrr-0000000000000110
 17064:   //FSOR.B <ea>                                     |-|--CC4S|-|-----|-----|D M+-WXZ  |1111_001_001_mmm_rrr-0000000000000111
 17065:   //FSUN.B <ea>                                     |-|--CC4S|-|-----|-----|D M+-WXZ  |1111_001_001_mmm_rrr-0000000000001000
 17066:   //FSUEQ.B <ea>                                    |-|--CC4S|-|-----|-----|D M+-WXZ  |1111_001_001_mmm_rrr-0000000000001001
 17067:   //FSUGT.B <ea>                                    |-|--CC4S|-|-----|-----|D M+-WXZ  |1111_001_001_mmm_rrr-0000000000001010
 17068:   //FSUGE.B <ea>                                    |-|--CC4S|-|-----|-----|D M+-WXZ  |1111_001_001_mmm_rrr-0000000000001011
 17069:   //FSULT.B <ea>                                    |-|--CC4S|-|-----|-----|D M+-WXZ  |1111_001_001_mmm_rrr-0000000000001100
 17070:   //FSULE.B <ea>                                    |-|--CC4S|-|-----|-----|D M+-WXZ  |1111_001_001_mmm_rrr-0000000000001101
 17071:   //FSNE.B <ea>                                     |-|--CC4S|-|-----|-----|D M+-WXZ  |1111_001_001_mmm_rrr-0000000000001110
 17072:   //FST.B <ea>                                      |-|--CC4S|-|-----|-----|D M+-WXZ  |1111_001_001_mmm_rrr-0000000000001111
 17073:   //FSSF.B <ea>                                     |-|--CC4S|-|-----|-----|D M+-WXZ  |1111_001_001_mmm_rrr-0000000000010000
 17074:   //FSSEQ.B <ea>                                    |-|--CC4S|-|-----|-----|D M+-WXZ  |1111_001_001_mmm_rrr-0000000000010001
 17075:   //FSGT.B <ea>                                     |-|--CC4S|-|-----|-----|D M+-WXZ  |1111_001_001_mmm_rrr-0000000000010010
 17076:   //FSGE.B <ea>                                     |-|--CC4S|-|-----|-----|D M+-WXZ  |1111_001_001_mmm_rrr-0000000000010011
 17077:   //FSLT.B <ea>                                     |-|--CC4S|-|-----|-----|D M+-WXZ  |1111_001_001_mmm_rrr-0000000000010100
 17078:   //FSLE.B <ea>                                     |-|--CC4S|-|-----|-----|D M+-WXZ  |1111_001_001_mmm_rrr-0000000000010101
 17079:   //FSGL.B <ea>                                     |-|--CC4S|-|-----|-----|D M+-WXZ  |1111_001_001_mmm_rrr-0000000000010110
 17080:   //FSGLE.B <ea>                                    |-|--CC4S|-|-----|-----|D M+-WXZ  |1111_001_001_mmm_rrr-0000000000010111
 17081:   //FSNGLE.B <ea>                                   |-|--CC4S|-|-----|-----|D M+-WXZ  |1111_001_001_mmm_rrr-0000000000011000
 17082:   //FSNGL.B <ea>                                    |-|--CC4S|-|-----|-----|D M+-WXZ  |1111_001_001_mmm_rrr-0000000000011001
 17083:   //FSNLE.B <ea>                                    |-|--CC4S|-|-----|-----|D M+-WXZ  |1111_001_001_mmm_rrr-0000000000011010
 17084:   //FSNLT.B <ea>                                    |-|--CC4S|-|-----|-----|D M+-WXZ  |1111_001_001_mmm_rrr-0000000000011011
 17085:   //FSNGE.B <ea>                                    |-|--CC4S|-|-----|-----|D M+-WXZ  |1111_001_001_mmm_rrr-0000000000011100
 17086:   //FSNGT.B <ea>                                    |-|--CC4S|-|-----|-----|D M+-WXZ  |1111_001_001_mmm_rrr-0000000000011101
 17087:   //FSSNE.B <ea>                                    |-|--CC4S|-|-----|-----|D M+-WXZ  |1111_001_001_mmm_rrr-0000000000011110
 17088:   //FSST.B <ea>                                     |-|--CC4S|-|-----|-----|D M+-WXZ  |1111_001_001_mmm_rrr-0000000000011111
 17089:   //FDBF Dr,<label>                                 |-|--CC4S|-|-----|-----|          |1111_001_001_001_rrr-0000000000000000-{offset}
 17090:   //FDBRA Dr,<label>                                |A|--CC4S|-|-----|-----|          |1111_001_001_001_rrr-0000000000000000-{offset}       [FDBF Dr,<label>]
 17091:   //FDBEQ Dr,<label>                                |-|--CC4S|-|-----|-----|          |1111_001_001_001_rrr-0000000000000001-{offset}
 17092:   //FDBOGT Dr,<label>                               |-|--CC4S|-|-----|-----|          |1111_001_001_001_rrr-0000000000000010-{offset}
 17093:   //FDBOGE Dr,<label>                               |-|--CC4S|-|-----|-----|          |1111_001_001_001_rrr-0000000000000011-{offset}
 17094:   //FDBOLT Dr,<label>                               |-|--CC4S|-|-----|-----|          |1111_001_001_001_rrr-0000000000000100-{offset}
 17095:   //FDBOLE Dr,<label>                               |-|--CC4S|-|-----|-----|          |1111_001_001_001_rrr-0000000000000101-{offset}
 17096:   //FDBOGL Dr,<label>                               |-|--CC4S|-|-----|-----|          |1111_001_001_001_rrr-0000000000000110-{offset}
 17097:   //FDBOR Dr,<label>                                |-|--CC4S|-|-----|-----|          |1111_001_001_001_rrr-0000000000000111-{offset}
 17098:   //FDBUN Dr,<label>                                |-|--CC4S|-|-----|-----|          |1111_001_001_001_rrr-0000000000001000-{offset}
 17099:   //FDBUEQ Dr,<label>                               |-|--CC4S|-|-----|-----|          |1111_001_001_001_rrr-0000000000001001-{offset}
 17100:   //FDBUGT Dr,<label>                               |-|--CC4S|-|-----|-----|          |1111_001_001_001_rrr-0000000000001010-{offset}
 17101:   //FDBUGE Dr,<label>                               |-|--CC4S|-|-----|-----|          |1111_001_001_001_rrr-0000000000001011-{offset}
 17102:   //FDBULT Dr,<label>                               |-|--CC4S|-|-----|-----|          |1111_001_001_001_rrr-0000000000001100-{offset}
 17103:   //FDBULE Dr,<label>                               |-|--CC4S|-|-----|-----|          |1111_001_001_001_rrr-0000000000001101-{offset}
 17104:   //FDBNE Dr,<label>                                |-|--CC4S|-|-----|-----|          |1111_001_001_001_rrr-0000000000001110-{offset}
 17105:   //FDBT Dr,<label>                                 |-|--CC4S|-|-----|-----|          |1111_001_001_001_rrr-0000000000001111-{offset}
 17106:   //FDBSF Dr,<label>                                |-|--CC4S|-|-----|-----|          |1111_001_001_001_rrr-0000000000010000-{offset}
 17107:   //FDBSEQ Dr,<label>                               |-|--CC4S|-|-----|-----|          |1111_001_001_001_rrr-0000000000010001-{offset}
 17108:   //FDBGT Dr,<label>                                |-|--CC4S|-|-----|-----|          |1111_001_001_001_rrr-0000000000010010-{offset}
 17109:   //FDBGE Dr,<label>                                |-|--CC4S|-|-----|-----|          |1111_001_001_001_rrr-0000000000010011-{offset}
 17110:   //FDBLT Dr,<label>                                |-|--CC4S|-|-----|-----|          |1111_001_001_001_rrr-0000000000010100-{offset}
 17111:   //FDBLE Dr,<label>                                |-|--CC4S|-|-----|-----|          |1111_001_001_001_rrr-0000000000010101-{offset}
 17112:   //FDBGL Dr,<label>                                |-|--CC4S|-|-----|-----|          |1111_001_001_001_rrr-0000000000010110-{offset}
 17113:   //FDBGLE Dr,<label>                               |-|--CC4S|-|-----|-----|          |1111_001_001_001_rrr-0000000000010111-{offset}
 17114:   //FDBNGLE Dr,<label>                              |-|--CC4S|-|-----|-----|          |1111_001_001_001_rrr-0000000000011000-{offset}
 17115:   //FDBNGL Dr,<label>                               |-|--CC4S|-|-----|-----|          |1111_001_001_001_rrr-0000000000011001-{offset}
 17116:   //FDBNLE Dr,<label>                               |-|--CC4S|-|-----|-----|          |1111_001_001_001_rrr-0000000000011010-{offset}
 17117:   //FDBNLT Dr,<label>                               |-|--CC4S|-|-----|-----|          |1111_001_001_001_rrr-0000000000011011-{offset}
 17118:   //FDBNGE Dr,<label>                               |-|--CC4S|-|-----|-----|          |1111_001_001_001_rrr-0000000000011100-{offset}
 17119:   //FDBNGT Dr,<label>                               |-|--CC4S|-|-----|-----|          |1111_001_001_001_rrr-0000000000011101-{offset}
 17120:   //FDBSNE Dr,<label>                               |-|--CC4S|-|-----|-----|          |1111_001_001_001_rrr-0000000000011110-{offset}
 17121:   //FDBST Dr,<label>                                |-|--CC4S|-|-----|-----|          |1111_001_001_001_rrr-0000000000011111-{offset}
 17122:   //FTRAPF.W #<data>                                |-|--CC4S|-|-----|-----|          |1111_001_001_111_010-0000000000000000-{data}
 17123:   //FTRAPEQ.W #<data>                               |-|--CC4S|-|-----|-----|          |1111_001_001_111_010-0000000000000001-{data}
 17124:   //FTRAPOGT.W #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_010-0000000000000010-{data}
 17125:   //FTRAPOGE.W #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_010-0000000000000011-{data}
 17126:   //FTRAPOLT.W #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_010-0000000000000100-{data}
 17127:   //FTRAPOLE.W #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_010-0000000000000101-{data}
 17128:   //FTRAPOGL.W #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_010-0000000000000110-{data}
 17129:   //FTRAPOR.W #<data>                               |-|--CC4S|-|-----|-----|          |1111_001_001_111_010-0000000000000111-{data}
 17130:   //FTRAPUN.W #<data>                               |-|--CC4S|-|-----|-----|          |1111_001_001_111_010-0000000000001000-{data}
 17131:   //FTRAPUEQ.W #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_010-0000000000001001-{data}
 17132:   //FTRAPUGT.W #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_010-0000000000001010-{data}
 17133:   //FTRAPUGE.W #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_010-0000000000001011-{data}
 17134:   //FTRAPULT.W #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_010-0000000000001100-{data}
 17135:   //FTRAPULE.W #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_010-0000000000001101-{data}
 17136:   //FTRAPNE.W #<data>                               |-|--CC4S|-|-----|-----|          |1111_001_001_111_010-0000000000001110-{data}
 17137:   //FTRAPT.W #<data>                                |-|--CC4S|-|-----|-----|          |1111_001_001_111_010-0000000000001111-{data}
 17138:   //FTRAPSF.W #<data>                               |-|--CC4S|-|-----|-----|          |1111_001_001_111_010-0000000000010000-{data}
 17139:   //FTRAPSEQ.W #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_010-0000000000010001-{data}
 17140:   //FTRAPGT.W #<data>                               |-|--CC4S|-|-----|-----|          |1111_001_001_111_010-0000000000010010-{data}
 17141:   //FTRAPGE.W #<data>                               |-|--CC4S|-|-----|-----|          |1111_001_001_111_010-0000000000010011-{data}
 17142:   //FTRAPLT.W #<data>                               |-|--CC4S|-|-----|-----|          |1111_001_001_111_010-0000000000010100-{data}
 17143:   //FTRAPLE.W #<data>                               |-|--CC4S|-|-----|-----|          |1111_001_001_111_010-0000000000010101-{data}
 17144:   //FTRAPGL.W #<data>                               |-|--CC4S|-|-----|-----|          |1111_001_001_111_010-0000000000010110-{data}
 17145:   //FTRAPGLE.W #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_010-0000000000010111-{data}
 17146:   //FTRAPNGLE.W #<data>                             |-|--CC4S|-|-----|-----|          |1111_001_001_111_010-0000000000011000-{data}
 17147:   //FTRAPNGL.W #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_010-0000000000011001-{data}
 17148:   //FTRAPNLE.W #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_010-0000000000011010-{data}
 17149:   //FTRAPNLT.W #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_010-0000000000011011-{data}
 17150:   //FTRAPNGE.W #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_010-0000000000011100-{data}
 17151:   //FTRAPNGT.W #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_010-0000000000011101-{data}
 17152:   //FTRAPSNE.W #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_010-0000000000011110-{data}
 17153:   //FTRAPST.W #<data>                               |-|--CC4S|-|-----|-----|          |1111_001_001_111_010-0000000000011111-{data}
 17154:   //FTRAPF.L #<data>                                |-|--CC4S|-|-----|-----|          |1111_001_001_111_011-0000000000000000-{data}
 17155:   //FTRAPEQ.L #<data>                               |-|--CC4S|-|-----|-----|          |1111_001_001_111_011-0000000000000001-{data}
 17156:   //FTRAPOGT.L #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_011-0000000000000010-{data}
 17157:   //FTRAPOGE.L #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_011-0000000000000011-{data}
 17158:   //FTRAPOLT.L #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_011-0000000000000100-{data}
 17159:   //FTRAPOLE.L #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_011-0000000000000101-{data}
 17160:   //FTRAPOGL.L #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_011-0000000000000110-{data}
 17161:   //FTRAPOR.L #<data>                               |-|--CC4S|-|-----|-----|          |1111_001_001_111_011-0000000000000111-{data}
 17162:   //FTRAPUN.L #<data>                               |-|--CC4S|-|-----|-----|          |1111_001_001_111_011-0000000000001000-{data}
 17163:   //FTRAPUEQ.L #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_011-0000000000001001-{data}
 17164:   //FTRAPUGT.L #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_011-0000000000001010-{data}
 17165:   //FTRAPUGE.L #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_011-0000000000001011-{data}
 17166:   //FTRAPULT.L #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_011-0000000000001100-{data}
 17167:   //FTRAPULE.L #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_011-0000000000001101-{data}
 17168:   //FTRAPNE.L #<data>                               |-|--CC4S|-|-----|-----|          |1111_001_001_111_011-0000000000001110-{data}
 17169:   //FTRAPT.L #<data>                                |-|--CC4S|-|-----|-----|          |1111_001_001_111_011-0000000000001111-{data}
 17170:   //FTRAPSF.L #<data>                               |-|--CC4S|-|-----|-----|          |1111_001_001_111_011-0000000000010000-{data}
 17171:   //FTRAPSEQ.L #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_011-0000000000010001-{data}
 17172:   //FTRAPGT.L #<data>                               |-|--CC4S|-|-----|-----|          |1111_001_001_111_011-0000000000010010-{data}
 17173:   //FTRAPGE.L #<data>                               |-|--CC4S|-|-----|-----|          |1111_001_001_111_011-0000000000010011-{data}
 17174:   //FTRAPLT.L #<data>                               |-|--CC4S|-|-----|-----|          |1111_001_001_111_011-0000000000010100-{data}
 17175:   //FTRAPLE.L #<data>                               |-|--CC4S|-|-----|-----|          |1111_001_001_111_011-0000000000010101-{data}
 17176:   //FTRAPGL.L #<data>                               |-|--CC4S|-|-----|-----|          |1111_001_001_111_011-0000000000010110-{data}
 17177:   //FTRAPGLE.L #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_011-0000000000010111-{data}
 17178:   //FTRAPNGLE.L #<data>                             |-|--CC4S|-|-----|-----|          |1111_001_001_111_011-0000000000011000-{data}
 17179:   //FTRAPNGL.L #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_011-0000000000011001-{data}
 17180:   //FTRAPNLE.L #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_011-0000000000011010-{data}
 17181:   //FTRAPNLT.L #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_011-0000000000011011-{data}
 17182:   //FTRAPNGE.L #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_011-0000000000011100-{data}
 17183:   //FTRAPNGT.L #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_011-0000000000011101-{data}
 17184:   //FTRAPSNE.L #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_011-0000000000011110-{data}
 17185:   //FTRAPST.L #<data>                               |-|--CC4S|-|-----|-----|          |1111_001_001_111_011-0000000000011111-{data}
 17186:   //FTRAPF                                          |-|--CC4S|-|-----|-----|          |1111_001_001_111_100-0000000000000000
 17187:   //FTRAPEQ                                         |-|--CC4S|-|-----|-----|          |1111_001_001_111_100-0000000000000001
 17188:   //FTRAPOGT                                        |-|--CC4S|-|-----|-----|          |1111_001_001_111_100-0000000000000010
 17189:   //FTRAPOGE                                        |-|--CC4S|-|-----|-----|          |1111_001_001_111_100-0000000000000011
 17190:   //FTRAPOLT                                        |-|--CC4S|-|-----|-----|          |1111_001_001_111_100-0000000000000100
 17191:   //FTRAPOLE                                        |-|--CC4S|-|-----|-----|          |1111_001_001_111_100-0000000000000101
 17192:   //FTRAPOGL                                        |-|--CC4S|-|-----|-----|          |1111_001_001_111_100-0000000000000110
 17193:   //FTRAPOR                                         |-|--CC4S|-|-----|-----|          |1111_001_001_111_100-0000000000000111
 17194:   //FTRAPUN                                         |-|--CC4S|-|-----|-----|          |1111_001_001_111_100-0000000000001000
 17195:   //FTRAPUEQ                                        |-|--CC4S|-|-----|-----|          |1111_001_001_111_100-0000000000001001
 17196:   //FTRAPUGT                                        |-|--CC4S|-|-----|-----|          |1111_001_001_111_100-0000000000001010
 17197:   //FTRAPUGE                                        |-|--CC4S|-|-----|-----|          |1111_001_001_111_100-0000000000001011
 17198:   //FTRAPULT                                        |-|--CC4S|-|-----|-----|          |1111_001_001_111_100-0000000000001100
 17199:   //FTRAPULE                                        |-|--CC4S|-|-----|-----|          |1111_001_001_111_100-0000000000001101
 17200:   //FTRAPNE                                         |-|--CC4S|-|-----|-----|          |1111_001_001_111_100-0000000000001110
 17201:   //FTRAPT                                          |-|--CC4S|-|-----|-----|          |1111_001_001_111_100-0000000000001111
 17202:   //FTRAPSF                                         |-|--CC4S|-|-----|-----|          |1111_001_001_111_100-0000000000010000
 17203:   //FTRAPSEQ                                        |-|--CC4S|-|-----|-----|          |1111_001_001_111_100-0000000000010001
 17204:   //FTRAPGT                                         |-|--CC4S|-|-----|-----|          |1111_001_001_111_100-0000000000010010
 17205:   //FTRAPGE                                         |-|--CC4S|-|-----|-----|          |1111_001_001_111_100-0000000000010011
 17206:   //FTRAPLT                                         |-|--CC4S|-|-----|-----|          |1111_001_001_111_100-0000000000010100
 17207:   //FTRAPLE                                         |-|--CC4S|-|-----|-----|          |1111_001_001_111_100-0000000000010101
 17208:   //FTRAPGL                                         |-|--CC4S|-|-----|-----|          |1111_001_001_111_100-0000000000010110
 17209:   //FTRAPGLE                                        |-|--CC4S|-|-----|-----|          |1111_001_001_111_100-0000000000010111
 17210:   //FTRAPNGLE                                       |-|--CC4S|-|-----|-----|          |1111_001_001_111_100-0000000000011000
 17211:   //FTRAPNGL                                        |-|--CC4S|-|-----|-----|          |1111_001_001_111_100-0000000000011001
 17212:   //FTRAPNLE                                        |-|--CC4S|-|-----|-----|          |1111_001_001_111_100-0000000000011010
 17213:   //FTRAPNLT                                        |-|--CC4S|-|-----|-----|          |1111_001_001_111_100-0000000000011011
 17214:   //FTRAPNGE                                        |-|--CC4S|-|-----|-----|          |1111_001_001_111_100-0000000000011100
 17215:   //FTRAPNGT                                        |-|--CC4S|-|-----|-----|          |1111_001_001_111_100-0000000000011101
 17216:   //FTRAPSNE                                        |-|--CC4S|-|-----|-----|          |1111_001_001_111_100-0000000000011110
 17217:   //FTRAPST                                         |-|--CC4S|-|-----|-----|          |1111_001_001_111_100-0000000000011111
 17218:   public static void irpFscc () throws M68kException {
 17219:   fscc: {
 17220:     //XEiJ.fpuBox.epbExceptionStatusWord = 0;
 17221:     if ((7 & XEiJ.currentOnchipFPU) == 0) {
 17222:       irpFline ();
 17223:       break fscc;
 17224:     }
 17225:     XEiJ.fpuBox.epbFpiar = XEiJ.regPC0;  //FPIARはFMOVEM/FMOVE FPcr/FSAVE/FRESTORE以外の命令で例外が発生しなくても更新される
 17226:     int w = mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);  //pcwz。拡張ワード
 17227:     if ((w & 0b010000) != 0 && (XEiJ.fpuBox.epbFpsr & XEiJ.FPU_FPSR_NAN) != 0) {  //IEEEノンアウェアテストでNANがセットされているとき
 17228:       XEiJ.fpuBox.epbFpsr |= XEiJ.FPU_FPSR_EXC_BSUN;  //BSUNをセット
 17229:       XEiJ.fpuBox.epbFpsr |= XEiJ.FPU_FPSR_EXC_TO_AEXC[XEiJ.fpuBox.epbFpsr >> 8 & 255];
 17230:       if ((XEiJ.fpuBox.epbFpcr & XEiJ.FPU_FPCR_BSUN) != 0) {  //BSUN例外許可
 17231:         XEiJ.fpuBox.epbExceptionStatusWord = 0xe000 | M68kException.M6E_FP_BRANCH_SET_UNORDERED & 7;
 17232:         irpExceptionFormat0 (M68kException.M6E_FP_BRANCH_SET_UNORDERED << 2, XEiJ.regPC0);  //pcは命令の先頭
 17233:         break fscc;
 17234:       }
 17235:     }
 17236:     int ea = XEiJ.regOC & 63;
 17237:     if (ea < XEiJ.EA_AR) {  //FScc.B Dr
 17238:       if (!XEiJ.fpuBox.epbIsFullSpec ()) {
 17239:         irpExceptionFormat2 (M68kException.M6E_FP_UNIMPLEMENTED_INSTRUCTION << 2, XEiJ.regPC, 0);  //pcは次の命令,アドレスは実効アドレス
 17240:         break fscc;
 17241:       }
 17242:       if (XEiJ.FPU_CCMAP_060[(w & 63) << 4 | XEiJ.fpuBox.epbFpsr >> 24 & 15]) {  //セット
 17243:         XEiJ.mpuCycleCount++;
 17244:         XEiJ.regRn[ea] |= 0xff;
 17245:       } else {  //クリア
 17246:         XEiJ.mpuCycleCount++;
 17247:         XEiJ.regRn[ea] &= ~0xff;
 17248:       }
 17249:     } else if (ea < XEiJ.EA_MM) {  //FDBcc Dr,<label>
 17250:       if (!XEiJ.fpuBox.epbIsFullSpec ()) {
 17251:         XEiJ.regPC += 2;  //オフセットを読み飛ばす
 17252:         irpExceptionFormat2 (M68kException.M6E_FP_UNIMPLEMENTED_INSTRUCTION << 2, XEiJ.regPC, 0);  //pcは次の命令,アドレスは実効アドレス
 17253:         break fscc;
 17254:       }
 17255:       if (XEiJ.FPU_CCMAP_060[(w & 63) << 4 | XEiJ.fpuBox.epbFpsr >> 24 & 15]) {  //条件が成立しているので通過
 17256:         XEiJ.mpuCycleCount += 2;
 17257:         XEiJ.regPC += 2;  //オフセットを読み飛ばす
 17258:       } else {
 17259:         int rrr = XEiJ.regOC & 7;
 17260:         int t = XEiJ.regRn[rrr];
 17261:         if ((short) t == 0) {  //Drの下位16bitが0なので通過
 17262:           XEiJ.mpuCycleCount += 2;
 17263:           XEiJ.regRn[rrr] = t + 65535;
 17264:           XEiJ.regPC += 2;  //オフセットを読み飛ばす
 17265:         } else {  //Drの下位16bitが0でないのでジャンプ
 17266:           XEiJ.mpuCycleCount++;
 17267:           XEiJ.regRn[rrr] = t - 1;  //下位16bitが0でないので上位16bitは変化しない
 17268:           irpSetPC (XEiJ.regPC + mmuReadWordSignExword (XEiJ.regPC, XEiJ.regSRS));  //pc==pc0+2
 17269:         }
 17270:       }
 17271:     } else if (ea < XEiJ.EA_PW) {  //FScc.B <mem>
 17272:       int a = efaMltByte (ea);
 17273:       if (!XEiJ.fpuBox.epbIsFullSpec ()) {
 17274:         irpExceptionFormat2 (M68kException.M6E_FP_UNIMPLEMENTED_INSTRUCTION << 2, XEiJ.regPC, a);  //pcは次の命令,アドレスは実効アドレス
 17275:         break fscc;
 17276:       }
 17277:       XEiJ.mpuCycleCount++;
 17278:       mmuWriteByteData (a, XEiJ.FPU_CCMAP_060[(w & 63) << 4 | XEiJ.fpuBox.epbFpsr >> 24 & 15] ? 0xff : 0x00, XEiJ.regSRS);
 17279:     } else if (ea <= XEiJ.EA_IM) {  //FTRAPcc.W/FTRAPcc.L/FTRAPcc
 17280:       if (ea == 072) {  //.W
 17281:         mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);
 17282:       } else if (ea == 073) {  //.L
 17283:         mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS);
 17284:       }
 17285:       if (!XEiJ.fpuBox.epbIsFullSpec ()) {
 17286:         irpExceptionFormat2 (M68kException.M6E_FP_UNIMPLEMENTED_INSTRUCTION << 2, XEiJ.regPC, 0);  //pcは次の命令,アドレスは実効アドレス
 17287:         break fscc;
 17288:       }
 17289:       if (!XEiJ.FPU_CCMAP_060[(w & 63) << 4 | XEiJ.fpuBox.epbFpsr >> 24 & 15]) {  //通過
 17290:         XEiJ.mpuCycleCount += 2;
 17291:       } else {
 17292:         m60Address = XEiJ.regPC0;  //アドレスは命令の先頭
 17293:         M68kException.m6eNumber = M68kException.M6E_TRAPV_INSTRUCTION;
 17294:         throw M68kException.m6eSignal;
 17295:       }
 17296:     } else {
 17297:       XEiJ.regPC = XEiJ.regPC0 + 2;  //拡張ワードを読まなかったことにする
 17298:       irpFline ();
 17299:       break fscc;
 17300:     }
 17301:   }  //fscc
 17302:   }  //irpFscc
 17303: 
 17304:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 17305:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 17306:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 17307:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 17308:   //FNOP                                            |A|--CC46|-|-----|-----|          |1111_001_010_000_000-0000000000000000        [FBF.W (*)+2]
 17309:   //FBF.W <label>                                   |-|--CC46|-|-----|-----|          |1111_001_010_000_000-{offset}
 17310:   //FBEQ.W <label>                                  |-|--CC46|-|-----|-----|          |1111_001_010_000_001-{offset}
 17311:   //FBOGT.W <label>                                 |-|--CC46|-|-----|-----|          |1111_001_010_000_010-{offset}
 17312:   //FBOGE.W <label>                                 |-|--CC46|-|-----|-----|          |1111_001_010_000_011-{offset}
 17313:   //FBOLT.W <label>                                 |-|--CC46|-|-----|-----|          |1111_001_010_000_100-{offset}
 17314:   //FBOLE.W <label>                                 |-|--CC46|-|-----|-----|          |1111_001_010_000_101-{offset}
 17315:   //FBOGL.W <label>                                 |-|--CC46|-|-----|-----|          |1111_001_010_000_110-{offset}
 17316:   //FBOR.W <label>                                  |-|--CC46|-|-----|-----|          |1111_001_010_000_111-{offset}
 17317:   //FBUN.W <label>                                  |-|--CC46|-|-----|-----|          |1111_001_010_001_000-{offset}
 17318:   //FBUEQ.W <label>                                 |-|--CC46|-|-----|-----|          |1111_001_010_001_001-{offset}
 17319:   //FBUGT.W <label>                                 |-|--CC46|-|-----|-----|          |1111_001_010_001_010-{offset}
 17320:   //FBUGE.W <label>                                 |-|--CC46|-|-----|-----|          |1111_001_010_001_011-{offset}
 17321:   //FBULT.W <label>                                 |-|--CC46|-|-----|-----|          |1111_001_010_001_100-{offset}
 17322:   //FBULE.W <label>                                 |-|--CC46|-|-----|-----|          |1111_001_010_001_101-{offset}
 17323:   //FBNE.W <label>                                  |-|--CC46|-|-----|-----|          |1111_001_010_001_110-{offset}
 17324:   //FBT.W <label>                                   |-|--CC46|-|-----|-----|          |1111_001_010_001_111-{offset}
 17325:   //FBRA.W <label>                                  |A|--CC46|-|-----|-----|          |1111_001_010_001_111-{offset}        [FBT.W <label>]
 17326:   //FBSF.W <label>                                  |-|--CC46|-|-----|-----|          |1111_001_010_010_000-{offset}
 17327:   //FBSEQ.W <label>                                 |-|--CC46|-|-----|-----|          |1111_001_010_010_001-{offset}
 17328:   //FBGT.W <label>                                  |-|--CC46|-|-----|-----|          |1111_001_010_010_010-{offset}
 17329:   //FBGE.W <label>                                  |-|--CC46|-|-----|-----|          |1111_001_010_010_011-{offset}
 17330:   //FBLT.W <label>                                  |-|--CC46|-|-----|-----|          |1111_001_010_010_100-{offset}
 17331:   //FBLE.W <label>                                  |-|--CC46|-|-----|-----|          |1111_001_010_010_101-{offset}
 17332:   //FBGL.W <label>                                  |-|--CC46|-|-----|-----|          |1111_001_010_010_110-{offset}
 17333:   //FBGLE.W <label>                                 |-|--CC46|-|-----|-----|          |1111_001_010_010_111-{offset}
 17334:   //FBNGLE.W <label>                                |-|--CC46|-|-----|-----|          |1111_001_010_011_000-{offset}
 17335:   //FBNGL.W <label>                                 |-|--CC46|-|-----|-----|          |1111_001_010_011_001-{offset}
 17336:   //FBNLE.W <label>                                 |-|--CC46|-|-----|-----|          |1111_001_010_011_010-{offset}
 17337:   //FBNLT.W <label>                                 |-|--CC46|-|-----|-----|          |1111_001_010_011_011-{offset}
 17338:   //FBNGE.W <label>                                 |-|--CC46|-|-----|-----|          |1111_001_010_011_100-{offset}
 17339:   //FBNGT.W <label>                                 |-|--CC46|-|-----|-----|          |1111_001_010_011_101-{offset}
 17340:   //FBSNE.W <label>                                 |-|--CC46|-|-----|-----|          |1111_001_010_011_110-{offset}
 17341:   //FBST.W <label>                                  |-|--CC46|-|-----|-----|          |1111_001_010_011_111-{offset}
 17342:   public static void irpFbccWord () throws M68kException {
 17343:   fbcc: {
 17344:     //XEiJ.fpuBox.epbExceptionStatusWord = 0;
 17345:     if ((7 & XEiJ.currentOnchipFPU) == 0) {
 17346:       irpFline ();
 17347:       break fbcc;
 17348:     }
 17349:     XEiJ.fpuBox.epbFpiar = XEiJ.regPC0;  //FPIARはFMOVEM/FMOVE FPcr/FSAVE/FRESTORE以外の命令で例外が発生しなくても更新される
 17350:     if ((XEiJ.regOC & 0b010000) != 0 && (XEiJ.fpuBox.epbFpsr & XEiJ.FPU_FPSR_NAN) != 0) {  //IEEEノンアウェアテストでNANがセットされているとき
 17351:       XEiJ.fpuBox.epbFpsr |= XEiJ.FPU_FPSR_EXC_BSUN;  //BSUNをセット
 17352:       XEiJ.fpuBox.epbFpsr |= XEiJ.FPU_FPSR_EXC_TO_AEXC[XEiJ.fpuBox.epbFpsr >> 8 & 255];
 17353:       if ((XEiJ.fpuBox.epbFpcr & XEiJ.FPU_FPCR_BSUN) != 0) {  //BSUN例外許可
 17354:         XEiJ.fpuBox.epbExceptionStatusWord = 0xe000 | M68kException.M6E_FP_BRANCH_SET_UNORDERED & 7;
 17355:         irpExceptionFormat0 (M68kException.M6E_FP_BRANCH_SET_UNORDERED << 2, XEiJ.regPC0);  //pcは命令の先頭
 17356:         break fbcc;
 17357:       }
 17358:     }
 17359:     XEiJ.mpuCycleCount++;
 17360:     int t = XEiJ.regPC;  //pc0+2
 17361:     XEiJ.regPC = t + 2;  //pc0+4
 17362:     t += mmuReadWordSignExword (t, XEiJ.regSRS);  //pc0+2+16bitディスプレースメント
 17363:     if ((t & 1) != 0) {  //分岐先のアドレスが奇数
 17364:       //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ
 17365:       irpBccAddressError (t);
 17366:     }
 17367:     if (XEiJ.FPU_CCMAP_060[(XEiJ.regOC & 63) << 4 | XEiJ.fpuBox.epbFpsr >> 24 & 15]) {  //分岐する
 17368:       irpSetPC (t);
 17369:     }
 17370:   }  //fbcc
 17371:   }  //irpFbccWord
 17372: 
 17373:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 17374:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 17375:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 17376:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 17377:   //FBF.L <label>                                   |-|--CC46|-|-----|-----|          |1111_001_011_000_000-{offset}
 17378:   //FBEQ.L <label>                                  |-|--CC46|-|-----|-----|          |1111_001_011_000_001-{offset}
 17379:   //FBOGT.L <label>                                 |-|--CC46|-|-----|-----|          |1111_001_011_000_010-{offset}
 17380:   //FBOGE.L <label>                                 |-|--CC46|-|-----|-----|          |1111_001_011_000_011-{offset}
 17381:   //FBOLT.L <label>                                 |-|--CC46|-|-----|-----|          |1111_001_011_000_100-{offset}
 17382:   //FBOLE.L <label>                                 |-|--CC46|-|-----|-----|          |1111_001_011_000_101-{offset}
 17383:   //FBOGL.L <label>                                 |-|--CC46|-|-----|-----|          |1111_001_011_000_110-{offset}
 17384:   //FBOR.L <label>                                  |-|--CC46|-|-----|-----|          |1111_001_011_000_111-{offset}
 17385:   //FBUN.L <label>                                  |-|--CC46|-|-----|-----|          |1111_001_011_001_000-{offset}
 17386:   //FBUEQ.L <label>                                 |-|--CC46|-|-----|-----|          |1111_001_011_001_001-{offset}
 17387:   //FBUGT.L <label>                                 |-|--CC46|-|-----|-----|          |1111_001_011_001_010-{offset}
 17388:   //FBUGE.L <label>                                 |-|--CC46|-|-----|-----|          |1111_001_011_001_011-{offset}
 17389:   //FBULT.L <label>                                 |-|--CC46|-|-----|-----|          |1111_001_011_001_100-{offset}
 17390:   //FBULE.L <label>                                 |-|--CC46|-|-----|-----|          |1111_001_011_001_101-{offset}
 17391:   //FBNE.L <label>                                  |-|--CC46|-|-----|-----|          |1111_001_011_001_110-{offset}
 17392:   //FBT.L <label>                                   |-|--CC46|-|-----|-----|          |1111_001_011_001_111-{offset}
 17393:   //FBRA.L <label>                                  |A|--CC46|-|-----|-----|          |1111_001_011_001_111-{offset}        [FBT.L <label>]
 17394:   //FBSF.L <label>                                  |-|--CC46|-|-----|-----|          |1111_001_011_010_000-{offset}
 17395:   //FBSEQ.L <label>                                 |-|--CC46|-|-----|-----|          |1111_001_011_010_001-{offset}
 17396:   //FBGT.L <label>                                  |-|--CC46|-|-----|-----|          |1111_001_011_010_010-{offset}
 17397:   //FBGE.L <label>                                  |-|--CC46|-|-----|-----|          |1111_001_011_010_011-{offset}
 17398:   //FBLT.L <label>                                  |-|--CC46|-|-----|-----|          |1111_001_011_010_100-{offset}
 17399:   //FBLE.L <label>                                  |-|--CC46|-|-----|-----|          |1111_001_011_010_101-{offset}
 17400:   //FBGL.L <label>                                  |-|--CC46|-|-----|-----|          |1111_001_011_010_110-{offset}
 17401:   //FBGLE.L <label>                                 |-|--CC46|-|-----|-----|          |1111_001_011_010_111-{offset}
 17402:   //FBNGLE.L <label>                                |-|--CC46|-|-----|-----|          |1111_001_011_011_000-{offset}
 17403:   //FBNGL.L <label>                                 |-|--CC46|-|-----|-----|          |1111_001_011_011_001-{offset}
 17404:   //FBNLE.L <label>                                 |-|--CC46|-|-----|-----|          |1111_001_011_011_010-{offset}
 17405:   //FBNLT.L <label>                                 |-|--CC46|-|-----|-----|          |1111_001_011_011_011-{offset}
 17406:   //FBNGE.L <label>                                 |-|--CC46|-|-----|-----|          |1111_001_011_011_100-{offset}
 17407:   //FBNGT.L <label>                                 |-|--CC46|-|-----|-----|          |1111_001_011_011_101-{offset}
 17408:   //FBSNE.L <label>                                 |-|--CC46|-|-----|-----|          |1111_001_011_011_110-{offset}
 17409:   //FBST.L <label>                                  |-|--CC46|-|-----|-----|          |1111_001_011_011_111-{offset}
 17410:   public static void irpFbccLong () throws M68kException {
 17411:   fbcc: {
 17412:     //XEiJ.fpuBox.epbExceptionStatusWord = 0;
 17413:     if ((7 & XEiJ.currentOnchipFPU) == 0) {
 17414:       irpFline ();
 17415:       break fbcc;
 17416:     }
 17417:     XEiJ.fpuBox.epbFpiar = XEiJ.regPC0;  //FPIARはFMOVEM/FMOVE FPcr/FSAVE/FRESTORE以外の命令で例外が発生しなくても更新される
 17418:     if ((XEiJ.regOC & 0b010000) != 0 && (XEiJ.fpuBox.epbFpsr & XEiJ.FPU_FPSR_NAN) != 0) {  //IEEEノンアウェアテストでNANがセットされているとき
 17419:       XEiJ.fpuBox.epbFpsr |= XEiJ.FPU_FPSR_EXC_BSUN;  //BSUNをセット
 17420:       XEiJ.fpuBox.epbFpsr |= XEiJ.FPU_FPSR_EXC_TO_AEXC[XEiJ.fpuBox.epbFpsr >> 8 & 255];
 17421:       if ((XEiJ.fpuBox.epbFpcr & XEiJ.FPU_FPCR_BSUN) != 0) {  //BSUN例外許可
 17422:         XEiJ.fpuBox.epbExceptionStatusWord = 0xe000 | M68kException.M6E_FP_BRANCH_SET_UNORDERED & 7;
 17423:         irpExceptionFormat0 (M68kException.M6E_FP_BRANCH_SET_UNORDERED << 2, XEiJ.regPC0);  //pcは命令の先頭
 17424:         break fbcc;
 17425:       }
 17426:     }
 17427:     XEiJ.mpuCycleCount++;
 17428:     int t = XEiJ.regPC;  //pc0+2
 17429:     XEiJ.regPC = t + 4;  //pc0+6
 17430:     t += mmuReadLongExword (t, XEiJ.regSRS);  //pc0+2+32bitディスプレースメント
 17431:     if ((t & 1) != 0) {  //分岐先のアドレスが奇数
 17432:       //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ
 17433:       irpBccAddressError (t);
 17434:     }
 17435:     if (XEiJ.FPU_CCMAP_060[(XEiJ.regOC & 63) << 4 | XEiJ.fpuBox.epbFpsr >> 24 & 15]) {  //分岐する
 17436:       irpSetPC (t);
 17437:     }
 17438:   }  //fbcc
 17439:   }  //irpFbccLong
 17440: 
 17441:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 17442:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 17443:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 17444:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 17445:   //FSAVE <ea>                                      |-|--CC46|P|-----|-----|  M -WXZ  |1111_001_100_mmm_rrr
 17446:   public static void irpFsave () throws M68kException {
 17447:     if ((7 & XEiJ.currentOnchipFPU) == 0) {
 17448:       irpFline ();
 17449:       return;
 17450:     }
 17451:     if (XEiJ.regSRS == 0) {  //ユーザモードのとき
 17452:       M68kException.m6eNumber = M68kException.M6E_PRIVILEGE_VIOLATION;
 17453:       throw M68kException.m6eSignal;
 17454:     }
 17455:     //以下はスーパーバイザモード
 17456:     XEiJ.mpuCycleCount += 3;
 17457:     int ea = XEiJ.regOC & 63;
 17458:     int a;
 17459:     if (ea >> 3 == XEiJ.MMM_MN) {  //-(Ar)
 17460:       int arr = XEiJ.regOC & 7 | 8;
 17461:       m60Incremented -= 12L << (arr << 3);
 17462:       a = m60Address = XEiJ.regRn[arr] -= 12;
 17463:     } else {  //-(Ar)以外
 17464:       a = efaCltWord (ea);
 17465:     }
 17466:     if (XEiJ.fpuBox.epbExceptionStatusWord == 0) {  //例外なし
 17467:       mmuWriteLongData (a, 0x00006000, 1);  //アイドルフレーム
 17468:       mmuWriteQuadSecond (a + 4, 0L, 1);
 17469:     } else {  //例外あり
 17470:       mmuWriteLongData (a, XEiJ.fpuBox.epbExceptionOperandExponent | XEiJ.fpuBox.epbExceptionStatusWord, 1);  //例外フレーム
 17471:       mmuWriteQuadSecond (a + 4, XEiJ.fpuBox.epbExceptionOperandMantissa, 1);
 17472:       XEiJ.fpuBox.epbExceptionStatusWord = 0;
 17473:     }
 17474:   }  //irpFsave
 17475: 
 17476:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 17477:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 17478:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 17479:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 17480:   //FRESTORE <ea>                                   |-|--CC46|P|-----|-----|  M+ WXZP |1111_001_101_mmm_rrr
 17481:   public static void irpFrestore () throws M68kException {
 17482:     if ((7 & XEiJ.currentOnchipFPU) == 0) {
 17483:       irpFline ();
 17484:       return;
 17485:     }
 17486:     if (XEiJ.regSRS == 0) {  //ユーザモードのとき
 17487:       M68kException.m6eNumber = M68kException.M6E_PRIVILEGE_VIOLATION;
 17488:       throw M68kException.m6eSignal;
 17489:     }
 17490:     //以下はスーパーバイザモード
 17491:     XEiJ.mpuCycleCount += 6;
 17492:     int ea = XEiJ.regOC & 63;
 17493:     int a;
 17494:     if (ea >> 3 == XEiJ.MMM_MP) {  //(Ar)+
 17495:       int arr = XEiJ.regOC & 7 | 8;
 17496:       m60Incremented += 12L << (arr << 3);
 17497:       a = m60Address = (XEiJ.regRn[arr] += 12) - 12;
 17498:     } else {  //(Ar)+以外
 17499:       a = efaCntWord (ea);
 17500:     }
 17501:     int i = mmuReadLongData (a, 1);
 17502:     long l = mmuReadQuadData (a + 4, 1);
 17503:     if ((i & 0xff00) == 0xe000) {  //例外フレーム
 17504:       //例外ハンドラが0xe0xxを0x60xxに変更してFRESTOREする場合がある
 17505:       XEiJ.fpuBox.epbExceptionStatusWord = (char) i;
 17506:       XEiJ.fpuBox.epbExceptionOperandExponent = i & 0xffff0000;
 17507:       XEiJ.fpuBox.epbExceptionOperandMantissa = l;
 17508:     } else {
 17509:       XEiJ.fpuBox.epbExceptionStatusWord = 0;
 17510:       XEiJ.fpuBox.epbExceptionOperandExponent = 0;
 17511:       XEiJ.fpuBox.epbExceptionOperandMantissa = 0x0000000000000000L;
 17512:     }
 17513:     //FPSRのAEXCをクリアする
 17514:     XEiJ.fpuBox.epbFpsr = 0;
 17515:     //FPIARをクリアする
 17516:     XEiJ.fpuBox.epbFpiar = 0;
 17517:   }  //irpFrestore
 17518: 
 17519:   //irpFPPreInstruction ()
 17520:   //  浮動小数点命令実行前例外 floating-point pre-instruction exception
 17521:   //  優先順位はBSUN>SNAN>OPERR>OVFL>UNFL>DZ>INEX2/INEX1
 17522:   //  複数の例外が同時に発生したときは最上位の例外ハンドラだけが呼び出される
 17523:   //  浮動小数点例外ハンドラは自分よりも下位の浮動小数点例外が発生していないか確認しなければならない
 17524:   public static boolean irpFPPreInstruction () throws M68kException {
 17525:     int mask = XEiJ.fpuBox.epbFpcr & XEiJ.fpuBox.epbFpsr & 0x0000ff00;
 17526:     if (mask == 0) {
 17527:       return false;
 17528:     }
 17529:     int number = FP_OFFSET_TO_NUMBER[Integer.numberOfLeadingZeros (mask)];
 17530:     XEiJ.fpuBox.epbExceptionStatusWord = 0xe000 | number & 7;
 17531:     irpExceptionFormat0 (number << 2, XEiJ.regPC0);  //pcは命令の先頭
 17532:     return true;
 17533:   }  //irpFPPreInstruction()
 17534: 
 17535:   //irpFPPostInstruction (a)
 17536:   //  浮動小数点命令実行後例外 floating-point post-instruction exception
 17537:   //  優先順位はBSUN>SNAN>OPERR>OVFL>UNFL>DZ>INEX2/INEX1
 17538:   //  複数の例外が同時に発生したときは最上位の例外ハンドラだけが呼び出される
 17539:   //  浮動小数点例外ハンドラは自分よりも下位の浮動小数点例外が発生していないか確認しなければならない
 17540:   public static boolean irpFPPostInstruction (int a) throws M68kException {
 17541:     int mask = XEiJ.fpuBox.epbFpcr & XEiJ.fpuBox.epbFpsr & 0x0000ff00;
 17542:     if (mask == 0) {
 17543:       return false;
 17544:     }
 17545:     int number = FP_OFFSET_TO_NUMBER[Integer.numberOfLeadingZeros (mask)];
 17546:     XEiJ.fpuBox.epbExceptionStatusWord = 0xe000 | number & 7;
 17547:     irpExceptionFormat3 (number << 2, XEiJ.regPC, a);  //pcは次の命令,アドレスはデスティネーションオペランド
 17548:     return true;
 17549:   }  //irpFPPostInstruction(int)
 17550: 
 17551:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 17552:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 17553:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 17554:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 17555:   //CINVL NC,(Ar)                                   |-|----46|P|-----|-----|          |1111_010_000_001_rrr
 17556:   //CINVP NC,(Ar)                                   |-|----46|P|-----|-----|          |1111_010_000_010_rrr
 17557:   //CINVA NC                                        |-|----46|P|-----|-----|          |1111_010_000_011_000
 17558:   //CPUSHL NC,(Ar)                                  |-|----46|P|-----|-----|          |1111_010_000_101_rrr
 17559:   //CPUSHP NC,(Ar)                                  |-|----46|P|-----|-----|          |1111_010_000_110_rrr
 17560:   //CPUSHA NC                                       |-|----46|P|-----|-----|          |1111_010_000_111_000
 17561:   public static void irpCinvCpushNC () throws M68kException {
 17562:     if (XEiJ.regSRS == 0) {  //ユーザモードのとき
 17563:       M68kException.m6eNumber = M68kException.M6E_PRIVILEGE_VIOLATION;
 17564:       throw M68kException.m6eSignal;
 17565:     }
 17566:     //以下はスーパーバイザモード
 17567:     XEiJ.mpuCycleCount++;
 17568:   }  //irpCinvCpushNC
 17569: 
 17570:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 17571:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 17572:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 17573:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 17574:   //CINVL DC,(Ar)                                   |-|----46|P|-----|-----|          |1111_010_001_001_rrr
 17575:   //CINVP DC,(Ar)                                   |-|----46|P|-----|-----|          |1111_010_001_010_rrr
 17576:   //CINVA DC                                        |-|----46|P|-----|-----|          |1111_010_001_011_000
 17577:   //CPUSHL DC,(Ar)                                  |-|----46|P|-----|-----|          |1111_010_001_101_rrr
 17578:   //CPUSHP DC,(Ar)                                  |-|----46|P|-----|-----|          |1111_010_001_110_rrr
 17579:   //CPUSHA DC                                       |-|----46|P|-----|-----|          |1111_010_001_111_000
 17580:   public static void irpCinvCpushDC () throws M68kException {
 17581:     if (XEiJ.regSRS == 0) {  //ユーザモードのとき
 17582:       M68kException.m6eNumber = M68kException.M6E_PRIVILEGE_VIOLATION;
 17583:       throw M68kException.m6eSignal;
 17584:     }
 17585:     //以下はスーパーバイザモード
 17586:     XEiJ.mpuCycleCount++;
 17587:   }  //irpCinvCpushDC
 17588: 
 17589:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 17590:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 17591:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 17592:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 17593:   //CINVL IC,(Ar)                                   |-|----46|P|-----|-----|          |1111_010_010_001_rrr
 17594:   //CINVP IC,(Ar)                                   |-|----46|P|-----|-----|          |1111_010_010_010_rrr
 17595:   //CINVA IC                                        |-|----46|P|-----|-----|          |1111_010_010_011_000
 17596:   //CPUSHL IC,(Ar)                                  |-|----46|P|-----|-----|          |1111_010_010_101_rrr
 17597:   //CPUSHP IC,(Ar)                                  |-|----46|P|-----|-----|          |1111_010_010_110_rrr
 17598:   //CPUSHA IC                                       |-|----46|P|-----|-----|          |1111_010_010_111_000
 17599:   public static void irpCinvCpushIC () throws M68kException {
 17600:     if (XEiJ.regSRS == 0) {  //ユーザモードのとき
 17601:       M68kException.m6eNumber = M68kException.M6E_PRIVILEGE_VIOLATION;
 17602:       throw M68kException.m6eSignal;
 17603:     }
 17604:     //以下はスーパーバイザモード
 17605:     XEiJ.mpuCycleCount++;
 17606:   }  //irpCinvCpushIC
 17607: 
 17608:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 17609:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 17610:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 17611:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 17612:   //CINVL BC,(Ar)                                   |-|----46|P|-----|-----|          |1111_010_011_001_rrr
 17613:   //CINVP BC,(Ar)                                   |-|----46|P|-----|-----|          |1111_010_011_010_rrr
 17614:   //CINVA BC                                        |-|----46|P|-----|-----|          |1111_010_011_011_000
 17615:   //CPUSHL BC,(Ar)                                  |-|----46|P|-----|-----|          |1111_010_011_101_rrr
 17616:   //CPUSHP BC,(Ar)                                  |-|----46|P|-----|-----|          |1111_010_011_110_rrr
 17617:   //CPUSHA BC                                       |-|----46|P|-----|-----|          |1111_010_011_111_000
 17618:   public static void irpCinvCpushBC () throws M68kException {
 17619:     if (XEiJ.regSRS == 0) {  //ユーザモードのとき
 17620:       M68kException.m6eNumber = M68kException.M6E_PRIVILEGE_VIOLATION;
 17621:       throw M68kException.m6eSignal;
 17622:     }
 17623:     //以下はスーパーバイザモード
 17624:     XEiJ.mpuCycleCount++;
 17625:   }  //irpCinvCpushBC
 17626: 
 17627:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 17628:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 17629:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 17630:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 17631:   //PFLUSHN (Ar)                                    |-|----46|P|-----|-----|          |1111_010_100_000_rrr
 17632:   //PFLUSH (Ar)                                     |-|----46|P|-----|-----|          |1111_010_100_001_rrr
 17633:   //PFLUSHAN                                        |-|----46|P|-----|-----|          |1111_010_100_010_000
 17634:   //PFLUSHA                                         |-|----46|P|-----|-----|          |1111_010_100_011_000
 17635:   public static void irpPflush () throws M68kException {
 17636:     if (XEiJ.regSRS == 0) {  //ユーザモードのとき
 17637:       M68kException.m6eNumber = M68kException.M6E_PRIVILEGE_VIOLATION;
 17638:       throw M68kException.m6eSignal;
 17639:     }
 17640:     //以下はスーパーバイザモード
 17641:     if (XEiJ.regOC <= 0b1111_010_100_000_111) {  //PFLUSHN (An)
 17642:       XEiJ.mpuCycleCount += 18;
 17643:       mmuInvalidateNonGlobalCache (XEiJ.regRn[XEiJ.regOC - (0b1111_010_100_000_000 - 8)]);
 17644:     } else if (XEiJ.regOC <= 0b1111_010_100_001_111) {  //PFLUSH (An)
 17645:       XEiJ.mpuCycleCount += 18;
 17646:       mmuInvalidateCache (XEiJ.regRn[XEiJ.regOC - (0b1111_010_100_001_000 - 8)]);
 17647:     } else if (XEiJ.regOC == 0b1111_010_100_010_000) {  //PFLUSHAN
 17648:       XEiJ.mpuCycleCount += 33;
 17649:       mmuInvalidateAllNonGlobalCache ();
 17650:     } else if (XEiJ.regOC == 0b1111_010_100_011_000) {  //PFLUSHA
 17651:       XEiJ.mpuCycleCount += 33;
 17652:       mmuInvalidateAllCache ();
 17653:     } else {
 17654:       M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION;
 17655:       throw M68kException.m6eSignal;
 17656:     }
 17657:   }  //irpPflush
 17658: 
 17659:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 17660:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 17661:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 17662:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 17663:   //PLPAW (Ar)                                      |-|-----6|P|-----|-----|          |1111_010_110_001_rrr
 17664:   public static void irpPlpaw () throws M68kException {
 17665:     if (XEiJ.regSRS == 0) {  //ユーザモードのとき
 17666:       M68kException.m6eNumber = M68kException.M6E_PRIVILEGE_VIOLATION;
 17667:       throw M68kException.m6eSignal;
 17668:     }
 17669:     //以下はスーパーバイザモード
 17670:     XEiJ.mpuCycleCount += 15;
 17671:     int ann = XEiJ.regOC - (0b1111_010_110_001_000 - 8);  //8+nnn
 17672:     XEiJ.regRn[ann] = mmuLoadPhysicalAddressWrite (XEiJ.regRn[ann]);
 17673:   }  //irpPlpaw
 17674: 
 17675:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 17676:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 17677:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 17678:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 17679:   //PLPAR (Ar)                                      |-|-----6|P|-----|-----|          |1111_010_111_001_rrr
 17680:   //
 17681:   //PLPAR (Ar)
 17682:   //  ReadだがSFCではなくDFCを使う
 17683:   public static void irpPlpar () throws M68kException {
 17684:     if (XEiJ.regSRS == 0) {  //ユーザモードのとき
 17685:       M68kException.m6eNumber = M68kException.M6E_PRIVILEGE_VIOLATION;
 17686:       throw M68kException.m6eSignal;
 17687:     }
 17688:     //以下はスーパーバイザモード
 17689:     XEiJ.mpuCycleCount += 15;
 17690:     int ann = XEiJ.regOC - (0b1111_010_111_001_000 - 8);  //8+nnn
 17691:     XEiJ.regRn[ann] = mmuLoadPhysicalAddressRead (XEiJ.regRn[ann]);
 17692:   }  //irpPlpar
 17693: 
 17694:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 17695:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 17696:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 17697:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 17698:   //MOVE16 (Ar)+,xxx.L                              |-|----46|-|-----|-----|          |1111_011_000_000_rrr-{address}
 17699:   //MOVE16 xxx.L,(Ar)+                              |-|----46|-|-----|-----|          |1111_011_000_001_rrr-{address}
 17700:   //MOVE16 (Ar),xxx.L                               |-|----46|-|-----|-----|          |1111_011_000_010_rrr-{address}
 17701:   //MOVE16 xxx.L,(Ar)                               |-|----46|-|-----|-----|          |1111_011_000_011_rrr-{address}
 17702:   //MOVE16 (Ar)+,(An)+                              |-|----46|-|-----|-----|          |1111_011_000_100_rrr-1nnn000000000000
 17703:   //
 17704:   //MOVE16 (Ar)+,xxx.L
 17705:   //MOVE16 xxx.L,(Ar)+
 17706:   //MOVE16 (Ar),xxx.L
 17707:   //MOVE16 xxx.L,(Ar)
 17708:   //MOVE16 (Ar)+,(An)+
 17709:   //  アドレスの下位4bitは無視される
 17710:   //  ポストインクリメントで16増えるとき下位4bitは変化しない
 17711:   //  r==nのときMOVE16 (Ar)+,(Ar)+はMOVE16 (Ar),(Ar)+のような動作になる。データは動かずArは16だけ増える(M68060UM 1-21)
 17712:   public static void irpMove16 () throws M68kException {
 17713:     if (XEiJ.regOC <= 0b1111_011_000_011_111) {  //どちらかがxxx.L
 17714:       XEiJ.mpuCycleCount += 18;
 17715:       int arr = XEiJ.regOC - (0b1111_011_000_000_000 - 8);  //8+rrr
 17716:       int a = XEiJ.regRn[arr] & -16;
 17717:       int x = mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS) & -16;  //pcls
 17718:       if ((XEiJ.regOC & 0b001_000) == 0) {  //(Ar)→xxx.L
 17719:         long l = mmuReadQuadData (m60Address = a, XEiJ.regSRS);
 17720:         long m = mmuReadQuadSecond (a + 8, XEiJ.regSRS);
 17721:         mmuWriteQuadData (m60Address = x, l, XEiJ.regSRS);
 17722:         mmuWriteQuadSecond (x + 8, m, XEiJ.regSRS);
 17723:       } else {  //xxx.L→(An)
 17724:         long l = mmuReadQuadData (m60Address = x, XEiJ.regSRS);
 17725:         long m = mmuReadQuadSecond (x + 8, XEiJ.regSRS);
 17726:         mmuWriteQuadData (m60Address = a, l, XEiJ.regSRS);
 17727:         mmuWriteQuadSecond (a + 8, m, XEiJ.regSRS);
 17728:       }
 17729:       if ((XEiJ.regOC & 0b010_000) == 0) {  //(Ar)+
 17730:         XEiJ.regRn[arr] += 16;  //aはマスクされているのでa+16は不可
 17731:       }
 17732:     } else if (XEiJ.regOC <= 0b1111_011_000_100_111) {
 17733:       int w = mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);  //pcwz
 17734:       if ((w & 0b1000111111111111) == 0b1000000000000000) {  //MOVE16 (Ar)+,(As)+
 17735:         XEiJ.mpuCycleCount += 18;
 17736:         int arr = XEiJ.regOC - (0b1111_011_000_100_000 - 8);  //8+rrr
 17737:         int a = XEiJ.regRn[arr] & -16;
 17738:         int ass = w >> 12;  //8+sss
 17739:         int x = XEiJ.regRn[ass] & -16;
 17740:         long l = mmuReadQuadData (m60Address = a, XEiJ.regSRS);
 17741:         long m = mmuReadQuadSecond (a + 8, XEiJ.regSRS);
 17742:         mmuWriteQuadData (m60Address = x, l, XEiJ.regSRS);
 17743:         mmuWriteQuadSecond (x + 8, m, XEiJ.regSRS);
 17744:         XEiJ.regRn[arr] += 16;  //aはマスクされているのでa+16は不可
 17745:         if (arr != ass) {
 17746:           XEiJ.regRn[ass] += 16;  //xはマスクされているのでx+16は不可
 17747:         }
 17748:       } else {
 17749:         M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION;
 17750:         throw M68kException.m6eSignal;
 17751:       }
 17752:     } else {
 17753:       M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION;
 17754:       throw M68kException.m6eSignal;
 17755:     }
 17756:   }  //irpMove16
 17757: 
 17758:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 17759:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 17760:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 17761:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 17762:   //LPSTOP.W #<data>                                |-|-----6|P|-----|-----|          |1111_100_000_000_000-0000000111000000-{data}
 17763:   public static void irpLpstop () throws M68kException {
 17764:     if (XEiJ.regSRS == 0) {  //ユーザモードのとき
 17765:       M68kException.m6eNumber = M68kException.M6E_PRIVILEGE_VIOLATION;
 17766:       throw M68kException.m6eSignal;
 17767:     }
 17768:     //以下はスーパーバイザモード
 17769:     //!!! 非対応
 17770:   }  //irpLpstop
 17771: 
 17772:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 17773:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 17774:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 17775:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 17776:   //FPACK <data>                                    |A|012346|-|UUUUU|*****|          |1111_111_0dd_ddd_ddd [FLINE #<data>]
 17777:   public static void irpFpack () throws M68kException {
 17778:     if (!MainMemory.mmrFEfuncActivated) {
 17779:       irpFline ();
 17780:       return;
 17781:     }
 17782:     StringBuilder sb;
 17783:     int a0;
 17784:     if (FEFunction.FPK_DEBUG_TRACE) {
 17785:       sb = new StringBuilder ();
 17786:       String name = Disassembler.DIS_FPACK_NAME[XEiJ.regOC & 255];
 17787:       if (name.length () == 0) {
 17788:         XEiJ.fmtHex4 (sb.append ('$'), XEiJ.regOC);
 17789:       } else {
 17790:         sb.append (name);
 17791:       }
 17792:       sb.append ('\n');
 17793:       XEiJ.fmtHex8 (XEiJ.fmtHex8 (XEiJ.fmtHex8 (XEiJ.fmtHex8 (sb.append ("  D0="), XEiJ.regRn[0]).append (" D1="), XEiJ.regRn[1]).append (" D2="), XEiJ.regRn[2]).append (" D3="), XEiJ.regRn[3]);
 17794:       a0 = XEiJ.regRn[8];
 17795:       MainMemory.mmrRstr (sb.append (" (A0)=\""), a0, MainMemory.mmrStrlen (a0, 20)).append ("\"\n");
 17796:     }
 17797:     XEiJ.mpuCycleCount += FEFunction.FPK_CLOCK;  //一律にFEFunction.FPK_CLOCKサイクルかかることにする
 17798:     switch (XEiJ.regOC & 255) {
 17799:     case 0x00: FEFunction.fpkLMUL (); break;
 17800:     case 0x01: FEFunction.fpkLDIV (); break;
 17801:     case 0x02: FEFunction.fpkLMOD (); break;
 17802:       //case 0x03: break;
 17803:     case 0x04: FEFunction.fpkUMUL (); break;
 17804:     case 0x05: FEFunction.fpkUDIV (); break;
 17805:     case 0x06: FEFunction.fpkUMOD (); break;
 17806:       //case 0x07: break;
 17807:     case 0x08: FEFunction.fpkIMUL (); break;
 17808:     case 0x09: FEFunction.fpkIDIV (); break;
 17809:       //case 0x0a: break;
 17810:       //case 0x0b: break;
 17811:     case 0x0c: FEFunction.fpkRANDOMIZE (); break;
 17812:     case 0x0d: FEFunction.fpkSRAND (); break;
 17813:     case 0x0e: FEFunction.fpkRAND (); break;
 17814:       //case 0x0f: break;
 17815:     case 0x10: fpkSTOL (); break;
 17816:     case 0x11: fpkLTOS (); break;
 17817:     case 0x12: fpkSTOH (); break;
 17818:     case 0x13: fpkHTOS (); break;
 17819:     case 0x14: fpkSTOO (); break;
 17820:     case 0x15: fpkOTOS (); break;
 17821:     case 0x16: fpkSTOB (); break;
 17822:     case 0x17: fpkBTOS (); break;
 17823:     case 0x18: fpkIUSING (); break;
 17824:       //case 0x19: break;
 17825:     case 0x1a: FEFunction.fpkLTOD (); break;
 17826:     case 0x1b: FEFunction.fpkDTOL (); break;
 17827:     case 0x1c: FEFunction.fpkLTOF (); break;
 17828:     case 0x1d: FEFunction.fpkFTOL (); break;
 17829:     case 0x1e: FEFunction.fpkFTOD (); break;
 17830:     case 0x1f: FEFunction.fpkDTOF (); break;
 17831:     case 0x20: fpkVAL (); break;
 17832:     case 0x21: fpkUSING (); break;
 17833:     case 0x22: fpkSTOD (); break;
 17834:     case 0x23: fpkDTOS (); break;
 17835:     case 0x24: fpkECVT (); break;
 17836:     case 0x25: fpkFCVT (); break;
 17837:     case 0x26: fpkGCVT (); break;
 17838:       //case 0x27: break;
 17839:     case 0x28: FEFunction.fpkDTST (); break;
 17840:     case 0x29: FEFunction.fpkDCMP (); break;
 17841:     case 0x2a: FEFunction.fpkDNEG (); break;
 17842:     case 0x2b: FEFunction.fpkDADD (); break;
 17843:     case 0x2c: FEFunction.fpkDSUB (); break;
 17844:     case 0x2d: FEFunction.fpkDMUL (); break;
 17845:     case 0x2e: FEFunction.fpkDDIV (); break;
 17846:     case 0x2f: FEFunction.fpkDMOD (); break;
 17847:     case 0x30: FEFunction.fpkDABS (); break;
 17848:     case 0x31: FEFunction.fpkDCEIL (); break;
 17849:     case 0x32: FEFunction.fpkDFIX (); break;
 17850:     case 0x33: FEFunction.fpkDFLOOR (); break;
 17851:     case 0x34: FEFunction.fpkDFRAC (); break;
 17852:     case 0x35: FEFunction.fpkDSGN (); break;
 17853:     case 0x36: FEFunction.fpkSIN (); break;
 17854:     case 0x37: FEFunction.fpkCOS (); break;
 17855:     case 0x38: FEFunction.fpkTAN (); break;
 17856:     case 0x39: FEFunction.fpkATAN (); break;
 17857:     case 0x3a: FEFunction.fpkLOG (); break;
 17858:     case 0x3b: FEFunction.fpkEXP (); break;
 17859:     case 0x3c: FEFunction.fpkSQR (); break;
 17860:     case 0x3d: FEFunction.fpkPI (); break;
 17861:     case 0x3e: FEFunction.fpkNPI (); break;
 17862:     case 0x3f: FEFunction.fpkPOWER (); break;
 17863:     case 0x40: FEFunction.fpkRND (); break;
 17864:     case 0x41: FEFunction.fpkSINH (); break;
 17865:     case 0x42: FEFunction.fpkCOSH (); break;
 17866:     case 0x43: FEFunction.fpkTANH (); break;
 17867:     case 0x44: FEFunction.fpkATANH (); break;
 17868:     case 0x45: FEFunction.fpkASIN (); break;
 17869:     case 0x46: FEFunction.fpkACOS (); break;
 17870:     case 0x47: FEFunction.fpkLOG10 (); break;
 17871:     case 0x48: FEFunction.fpkLOG2 (); break;
 17872:     case 0x49: FEFunction.fpkDFREXP (); break;
 17873:     case 0x4a: FEFunction.fpkDLDEXP (); break;
 17874:     case 0x4b: FEFunction.fpkDADDONE (); break;
 17875:     case 0x4c: FEFunction.fpkDSUBONE (); break;
 17876:     case 0x4d: FEFunction.fpkDDIVTWO (); break;
 17877:     case 0x4e: FEFunction.fpkDIEECNV (); break;
 17878:     case 0x4f: FEFunction.fpkIEEDCNV (); break;
 17879:     case 0x50: fpkFVAL (); break;
 17880:     case 0x51: FEFunction.fpkFUSING (); break;
 17881:     case 0x52: FEFunction.fpkSTOF (); break;
 17882:     case 0x53: FEFunction.fpkFTOS (); break;
 17883:     case 0x54: FEFunction.fpkFECVT (); break;
 17884:     case 0x55: FEFunction.fpkFFCVT (); break;
 17885:     case 0x56: FEFunction.fpkFGCVT (); break;
 17886:       //case 0x57: break;
 17887:     case 0x58: FEFunction.fpkFTST (); break;
 17888:     case 0x59: FEFunction.fpkFCMP (); break;
 17889:     case 0x5a: FEFunction.fpkFNEG (); break;
 17890:     case 0x5b: FEFunction.fpkFADD (); break;
 17891:     case 0x5c: FEFunction.fpkFSUB (); break;
 17892:     case 0x5d: FEFunction.fpkFMUL (); break;
 17893:     case 0x5e: FEFunction.fpkFDIV (); break;
 17894:     case 0x5f: FEFunction.fpkFMOD (); break;
 17895:     case 0x60: FEFunction.fpkFABS (); break;
 17896:     case 0x61: FEFunction.fpkFCEIL (); break;
 17897:     case 0x62: FEFunction.fpkFFIX (); break;
 17898:     case 0x63: FEFunction.fpkFFLOOR (); break;
 17899:     case 0x64: FEFunction.fpkFFRAC (); break;
 17900:     case 0x65: FEFunction.fpkFSGN (); break;
 17901:     case 0x66: FEFunction.fpkFSIN (); break;
 17902:     case 0x67: FEFunction.fpkFCOS (); break;
 17903:     case 0x68: FEFunction.fpkFTAN (); break;
 17904:     case 0x69: FEFunction.fpkFATAN (); break;
 17905:     case 0x6a: FEFunction.fpkFLOG (); break;
 17906:     case 0x6b: FEFunction.fpkFEXP (); break;
 17907:     case 0x6c: FEFunction.fpkFSQR (); break;
 17908:     case 0x6d: FEFunction.fpkFPI (); break;
 17909:     case 0x6e: FEFunction.fpkFNPI (); break;
 17910:     case 0x6f: FEFunction.fpkFPOWER (); break;
 17911:     case 0x70: FEFunction.fpkFRND (); break;
 17912:     case 0x71: FEFunction.fpkFSINH (); break;
 17913:     case 0x72: FEFunction.fpkFCOSH (); break;
 17914:     case 0x73: FEFunction.fpkFTANH (); break;
 17915:     case 0x74: FEFunction.fpkFATANH (); break;
 17916:     case 0x75: FEFunction.fpkFASIN (); break;
 17917:     case 0x76: FEFunction.fpkFACOS (); break;
 17918:     case 0x77: FEFunction.fpkFLOG10 (); break;
 17919:     case 0x78: FEFunction.fpkFLOG2 (); break;
 17920:     case 0x79: FEFunction.fpkFFREXP (); break;
 17921:     case 0x7a: FEFunction.fpkFLDEXP (); break;
 17922:     case 0x7b: FEFunction.fpkFADDONE (); break;
 17923:     case 0x7c: FEFunction.fpkFSUBONE (); break;
 17924:     case 0x7d: FEFunction.fpkFDIVTWO (); break;
 17925:     case 0x7e: FEFunction.fpkFIEECNV (); break;
 17926:     case 0x7f: FEFunction.fpkIEEFCNV (); break;
 17927:       //case 0x80: break;
 17928:       //case 0x81: break;
 17929:       //case 0x82: break;
 17930:       //case 0x83: break;
 17931:       //case 0x84: break;
 17932:       //case 0x85: break;
 17933:       //case 0x86: break;
 17934:       //case 0x87: break;
 17935:       //case 0x88: break;
 17936:       //case 0x89: break;
 17937:       //case 0x8a: break;
 17938:       //case 0x8b: break;
 17939:       //case 0x8c: break;
 17940:       //case 0x8d: break;
 17941:       //case 0x8e: break;
 17942:       //case 0x8f: break;
 17943:       //case 0x90: break;
 17944:       //case 0x91: break;
 17945:       //case 0x92: break;
 17946:       //case 0x93: break;
 17947:       //case 0x94: break;
 17948:       //case 0x95: break;
 17949:       //case 0x96: break;
 17950:       //case 0x97: break;
 17951:       //case 0x98: break;
 17952:       //case 0x99: break;
 17953:       //case 0x9a: break;
 17954:       //case 0x9b: break;
 17955:       //case 0x9c: break;
 17956:       //case 0x9d: break;
 17957:       //case 0x9e: break;
 17958:       //case 0x9f: break;
 17959:       //case 0xa0: break;
 17960:       //case 0xa1: break;
 17961:       //case 0xa2: break;
 17962:       //case 0xa3: break;
 17963:       //case 0xa4: break;
 17964:       //case 0xa5: break;
 17965:       //case 0xa6: break;
 17966:       //case 0xa7: break;
 17967:       //case 0xa8: break;
 17968:       //case 0xa9: break;
 17969:       //case 0xaa: break;
 17970:       //case 0xab: break;
 17971:       //case 0xac: break;
 17972:       //case 0xad: break;
 17973:       //case 0xae: break;
 17974:       //case 0xaf: break;
 17975:       //case 0xb0: break;
 17976:       //case 0xb1: break;
 17977:       //case 0xb2: break;
 17978:       //case 0xb3: break;
 17979:       //case 0xb4: break;
 17980:       //case 0xb5: break;
 17981:       //case 0xb6: break;
 17982:       //case 0xb7: break;
 17983:       //case 0xb8: break;
 17984:       //case 0xb9: break;
 17985:       //case 0xba: break;
 17986:       //case 0xbb: break;
 17987:       //case 0xbc: break;
 17988:       //case 0xbd: break;
 17989:       //case 0xbe: break;
 17990:       //case 0xbf: break;
 17991:       //case 0xc0: break;
 17992:       //case 0xc1: break;
 17993:       //case 0xc2: break;
 17994:       //case 0xc3: break;
 17995:       //case 0xc4: break;
 17996:       //case 0xc5: break;
 17997:       //case 0xc6: break;
 17998:       //case 0xc7: break;
 17999:       //case 0xc8: break;
 18000:       //case 0xc9: break;
 18001:       //case 0xca: break;
 18002:       //case 0xcb: break;
 18003:       //case 0xcc: break;
 18004:       //case 0xcd: break;
 18005:       //case 0xce: break;
 18006:       //case 0xcf: break;
 18007:       //case 0xd0: break;
 18008:       //case 0xd1: break;
 18009:       //case 0xd2: break;
 18010:       //case 0xd3: break;
 18011:       //case 0xd4: break;
 18012:       //case 0xd5: break;
 18013:       //case 0xd6: break;
 18014:       //case 0xd7: break;
 18015:       //case 0xd8: break;
 18016:       //case 0xd9: break;
 18017:       //case 0xda: break;
 18018:       //case 0xdb: break;
 18019:       //case 0xdc: break;
 18020:       //case 0xdd: break;
 18021:       //case 0xde: break;
 18022:       //case 0xdf: break;
 18023:     case 0xe0: fpkCLMUL (); break;
 18024:     case 0xe1: fpkCLDIV (); break;
 18025:     case 0xe2: fpkCLMOD (); break;
 18026:     case 0xe3: fpkCUMUL (); break;
 18027:     case 0xe4: fpkCUDIV (); break;
 18028:     case 0xe5: fpkCUMOD (); break;
 18029:     case 0xe6: fpkCLTOD (); break;
 18030:     case 0xe7: fpkCDTOL (); break;
 18031:     case 0xe8: fpkCLTOF (); break;
 18032:     case 0xe9: fpkCFTOL (); break;
 18033:     case 0xea: fpkCFTOD (); break;
 18034:     case 0xeb: fpkCDTOF (); break;
 18035:     case 0xec: fpkCDCMP (); break;
 18036:     case 0xed: fpkCDADD (); break;
 18037:     case 0xee: fpkCDSUB (); break;
 18038:     case 0xef: fpkCDMUL (); break;
 18039:     case 0xf0: fpkCDDIV (); break;
 18040:     case 0xf1: fpkCDMOD (); break;
 18041:     case 0xf2: fpkCFCMP (); break;
 18042:     case 0xf3: fpkCFADD (); break;
 18043:     case 0xf4: fpkCFSUB (); break;
 18044:     case 0xf5: fpkCFMUL (); break;
 18045:     case 0xf6: fpkCFDIV (); break;
 18046:     case 0xf7: fpkCFMOD (); break;
 18047:     case 0xf8: fpkCDTST (); break;
 18048:     case 0xf9: fpkCFTST (); break;
 18049:     case 0xfa: fpkCDINC (); break;
 18050:     case 0xfb: fpkCFINC (); break;
 18051:     case 0xfc: fpkCDDEC (); break;
 18052:     case 0xfd: fpkCFDEC (); break;
 18053:     case 0xfe: FEFunction.fpkFEVARG (); break;
 18054:     //case 0xff: FEFunction.fpkFEVECS (); break;  //FLOATn.Xに処理させる
 18055:     default:
 18056:       XEiJ.mpuCycleCount -= FEFunction.FPK_CLOCK;  //戻す
 18057:       irpFline ();
 18058:     }
 18059:     if (FEFunction.FPK_DEBUG_TRACE) {
 18060:       int i = sb.length ();
 18061:       XEiJ.fmtHex8 (XEiJ.fmtHex8 (XEiJ.fmtHex8 (XEiJ.fmtHex8 (sb.append ("  D0="), XEiJ.regRn[0]).append (" D1="), XEiJ.regRn[1]).append (" D2="), XEiJ.regRn[2]).append (" D3="), XEiJ.regRn[3]);
 18062:       int l = MainMemory.mmrStrlen (a0, 20);
 18063:       sb.append (" (A0)=\"");
 18064:       i = sb.length () - i;
 18065:       MainMemory.mmrRstr (sb, a0, l).append ("\"\n");
 18066:       if (a0 <= XEiJ.regRn[8] && XEiJ.regRn[8] <= a0 + l) {
 18067:         for (i += sb.length () + XEiJ.regRn[8] - a0; sb.length () < i; ) {
 18068:           sb.append (' ');
 18069:         }
 18070:         sb.append ('^');
 18071:       }
 18072:       System.out.println (sb.toString ());
 18073:     }
 18074:   }  //irpFpack
 18075: 
 18076:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 18077:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 18078:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 18079:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 18080:   //DOS <data>                                      |A|012346|-|UUUUU|UUUUU|          |1111_111_1dd_ddd_ddd [FLINE #<data>]
 18081:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 18082:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 18083:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 18084:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 18085:   //FLINE #<data>                                   |-|012346|-|UUUUU|UUUUU|          |1111_ddd_ddd_ddd_ddd (line 1111 emulator)
 18086:   public static void irpFline () throws M68kException {
 18087:     irpExceptionFormat0 (M68kException.M6E_LINE_1111_EMULATOR << 2, XEiJ.regPC0);  //pcは命令の先頭
 18088:   }  //irpFline
 18089: 
 18090:   //irpIllegal ()
 18091:   //  オペコードの上位10bitで分類されなかった未実装命令
 18092:   //  命令実行回数をカウントするために分けてある
 18093:   //  0x4afcのILLEGAL命令はTASに分類されて未実装実効アドレスで処理されるのでここには来ない
 18094:   public static void irpIllegal () throws M68kException {
 18095:     if (true) {
 18096:       M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION;
 18097:       throw M68kException.m6eSignal;
 18098:     }
 18099:   }  //irpIllegal
 18100: 
 18101:   //z = irpAbcd (x, y)
 18102:   //  ABCD
 18103:   public static int irpAbcd (int x, int y) {
 18104:     int c = XEiJ.regCCR >> 4;
 18105:     int t = (x & 0xff) + (y & 0xff) + c;  //仮の結果
 18106:     int z = t;  //結果
 18107:     if (0x0a <= (x & 0x0f) + (y & 0x0f) + c) {  //ハーフキャリー
 18108:       z += 0x10 - 0x0a;
 18109:     }
 18110:     //XとCはキャリーがあるときセット、さもなくばクリア
 18111:     if (0xa0 <= z) {  //キャリー
 18112:       z += 0x100 - 0xa0;
 18113:       XEiJ.regCCR |= XEiJ.REG_CCR_X | XEiJ.REG_CCR_C;
 18114:     } else {
 18115:       XEiJ.regCCR &= ~(XEiJ.REG_CCR_X | XEiJ.REG_CCR_C);
 18116:     }
 18117:     //Zは結果が0でないときクリア、さもなくば変化しない
 18118:     z &= 0xff;
 18119:     if (z != 0x00) {
 18120:       XEiJ.regCCR &= ~XEiJ.REG_CCR_Z;
 18121:     }
 18122:     if (false) {
 18123:       //000/030のときNは結果の最上位ビット
 18124:       if ((z & 0x80) != 0) {
 18125:         XEiJ.regCCR |= XEiJ.REG_CCR_N;
 18126:       } else {
 18127:         XEiJ.regCCR &= ~XEiJ.REG_CCR_N;
 18128:       }
 18129:       //000のときVは補正値の加算でオーバーフローしたときセット、さもなくばクリア
 18130:       int a = z - t;  //補正値
 18131:       if ((((t ^ z) & (a ^ z)) & 0x80) != 0) {
 18132:         XEiJ.regCCR |= XEiJ.REG_CCR_V;
 18133:       } else {
 18134:         XEiJ.regCCR &= ~XEiJ.REG_CCR_V;
 18135:       }
 18136:     } else if (false) {
 18137:       //000/030のときNは結果の最上位ビット
 18138:       if ((z & 0x80) != 0) {
 18139:         XEiJ.regCCR |= XEiJ.REG_CCR_N;
 18140:       } else {
 18141:         XEiJ.regCCR &= ~XEiJ.REG_CCR_N;
 18142:       }
 18143:       //030のときVはクリア
 18144:       XEiJ.regCCR &= ~XEiJ.REG_CCR_V;
 18145:     } else {
 18146:       //060のときNとVは変化しない
 18147:     }
 18148:     return z;
 18149:   }  //irpAbcd
 18150: 
 18151:   //z = irpSbcd (x, y)
 18152:   //  SBCD
 18153:   public static int irpSbcd (int x, int y) {
 18154:     int b = XEiJ.regCCR >> 4;
 18155:     int t = (x & 0xff) - (y & 0xff) - b;  //仮の結果
 18156:     int z = t;  //結果
 18157:     if ((x & 0x0f) - (y & 0x0f) - b < 0) {  //ハーフボロー
 18158:       z -= 0x10 - 0x0a;
 18159:     }
 18160:     //XとCはボローがあるときセット、さもなくばクリア
 18161:     if (z < 0) {  //ボロー
 18162:       if (t < 0) {
 18163:         z -= 0x100 - 0xa0;
 18164:       }
 18165:       XEiJ.regCCR |= XEiJ.REG_CCR_X | XEiJ.REG_CCR_C;
 18166:     } else {
 18167:       XEiJ.regCCR &= ~(XEiJ.REG_CCR_X | XEiJ.REG_CCR_C);
 18168:     }
 18169:     //Zは結果が0でないときクリア、さもなくば変化しない
 18170:     z &= 0xff;
 18171:     if (z != 0x00) {
 18172:       XEiJ.regCCR &= ~XEiJ.REG_CCR_Z;
 18173:     }
 18174:     if (false) {
 18175:       //000/030のときNは結果の最上位ビット
 18176:       if ((z & 0x80) != 0) {
 18177:         XEiJ.regCCR |= XEiJ.REG_CCR_N;
 18178:       } else {
 18179:         XEiJ.regCCR &= ~XEiJ.REG_CCR_N;
 18180:       }
 18181:       //000のときVは補正値の加算でオーバーフローしたときセット、さもなくばクリア
 18182:       int a = z - t;  //補正値
 18183:       if ((((t ^ z) & (a ^ z)) & 0x80) != 0) {
 18184:         XEiJ.regCCR |= XEiJ.REG_CCR_V;
 18185:       } else {
 18186:         XEiJ.regCCR &= ~XEiJ.REG_CCR_V;
 18187:       }
 18188:     } else if (false) {
 18189:       //000/030のときNは結果の最上位ビット
 18190:       if ((z & 0x80) != 0) {
 18191:         XEiJ.regCCR |= XEiJ.REG_CCR_N;
 18192:       } else {
 18193:         XEiJ.regCCR &= ~XEiJ.REG_CCR_N;
 18194:       }
 18195:       //030のときVはクリア
 18196:       XEiJ.regCCR &= ~XEiJ.REG_CCR_V;
 18197:     } else {
 18198:       //060のときNとVは変化しない
 18199:     }
 18200:     return z;
 18201:   }  //irpSbcd
 18202: 
 18203: 
 18204: 
 18205:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 18206:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 18207:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 18208:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 18209:   //HFSBOOT                                         |-|012346|-|-----|-----|          |0100_111_000_000_000
 18210:   //HFSINST                                         |-|012346|-|-----|-----|          |0100_111_000_000_001
 18211:   //HFSSTR                                          |-|012346|-|-----|-----|          |0100_111_000_000_010
 18212:   //HFSINT                                          |-|012346|-|-----|-----|          |0100_111_000_000_011
 18213:   //EMXNOP                                          |-|012346|-|-----|-----|          |0100_111_000_000_100
 18214:   //  エミュレータ拡張命令
 18215:   public static void irpEmx () throws M68kException {
 18216:     switch (XEiJ.regOC & 63) {
 18217:     case XEiJ.EMX_OPCODE_HFSBOOT & 63:
 18218:       XEiJ.mpuCycleCount += 19;
 18219:       if (HFS.hfsIPLBoot ()) {
 18220:         //JMP $6800.W
 18221:         irpSetPC (0x00006800);
 18222:       }
 18223:       break;
 18224:     case XEiJ.EMX_OPCODE_HFSINST & 63:
 18225:       XEiJ.mpuCycleCount += 19;
 18226:       HFS.hfsInstall ();
 18227:       break;
 18228:     case XEiJ.EMX_OPCODE_HFSSTR & 63:
 18229:       XEiJ.mpuCycleCount += 19;
 18230:       HFS.hfsStrategy ();
 18231:       break;
 18232:     case XEiJ.EMX_OPCODE_HFSINT & 63:
 18233:       XEiJ.mpuCycleCount += 19;
 18234:       //XEiJ.mpuClockTime += TMR_FREQ / 100000L;  //0.01ms
 18235:       if (HFS.hfsInterrupt ()) {
 18236:         //WAIT
 18237:         XEiJ.mpuTraceFlag = 0;  //トレース例外を発生させない
 18238:         XEiJ.regPC = XEiJ.regPC0;  //ループ
 18239:         XEiJ.mpuClockTime += XEiJ.TMR_FREQ * 4 / 1000000;  //4μs。10MHzのとき40clk
 18240:         XEiJ.mpuLastNano += 4000L;
 18241:       }
 18242:       break;
 18243:     case XEiJ.EMX_OPCODE_EMXNOP & 63:
 18244:       XEiJ.emxNop ();
 18245:       break;
 18246:     case XEiJ.EMX_OPCODE_EMXWAIT & 63:
 18247:       WaitInstruction.execute ();  //待機命令を実行する
 18248:       break;
 18249:     default:
 18250:       M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION;
 18251:       throw M68kException.m6eSignal;
 18252:     }
 18253:   }  //irpEmx
 18254: 
 18255: 
 18256: 
 18257:   //irpSetPC (a)
 18258:   //  pcへデータを書き込む
 18259:   //  奇数のときはアドレスエラーが発生する
 18260:   public static void irpSetPC (int a) throws M68kException {
 18261:     if (XEiJ.TEST_BIT_0_SHIFT ? a << 31 - 0 < 0 : (a & 1) != 0) {
 18262:       M68kException.m6eNumber = M68kException.M6E_ADDRESS_ERROR;
 18263:       m60Address = a & -2;  //アドレスを偶数にする
 18264:       M68kException.m6eDirection = XEiJ.MPU_WR_READ;
 18265:       M68kException.m6eSize = XEiJ.MPU_SS_LONG;
 18266:       throw M68kException.m6eSignal;
 18267:     }
 18268:     if (BranchLog.BLG_ON) {
 18269:       BranchLog.blgJump (a);  //分岐ログに分岐レコードを追加する
 18270:     } else {
 18271:       XEiJ.regPC = a;
 18272:     }
 18273:   }  //irpSetPC
 18274: 
 18275:   //irpSetSR (newSr)
 18276:   //  srへデータを書き込む
 18277:   //  ori to sr/andi to sr/eori to sr/move to sr/stop/rteで使用される
 18278:   //  スーパーバイザモードになっていることを確認してから呼び出すこと
 18279:   //  rteではr[15]が指すアドレスからsrとpcを取り出してr[15]を更新してから呼び出すこと
 18280:   //  スーパーバイザモード→ユーザモードのときは移行のための処理を行う
 18281:   //  新しい割り込みマスクレベルよりも高い割り込み処理の終了をデバイスに通知する
 18282:   public static void irpSetSR (int newSr) {
 18283:     XEiJ.regSRT1 = XEiJ.REG_SR_T1 & newSr;
 18284:     XEiJ.regSRM = XEiJ.REG_SR_M & newSr;
 18285:     if ((XEiJ.regSRS = XEiJ.REG_SR_S & newSr) == 0) {  //スーパーバイザモード→ユーザモード
 18286:       XEiJ.mpuISP = XEiJ.regRn[15];  //SSPを保存
 18287:       XEiJ.regRn[15] = XEiJ.mpuUSP;  //USPを復元
 18288:       if (DataBreakPoint.DBP_ON) {
 18289:         DataBreakPoint.dbpMemoryMap = DataBreakPoint.dbpUserMap;  //ユーザメモリマップに切り替える
 18290:       } else {
 18291:         XEiJ.busMemoryMap = XEiJ.busUserMap;  //ユーザメモリマップに切り替える
 18292:       }
 18293:       if (InstructionBreakPoint.IBP_ON) {
 18294:         InstructionBreakPoint.ibpOp1MemoryMap = InstructionBreakPoint.ibpOp1UserMap;
 18295:       }
 18296:     }
 18297:     int t = (XEiJ.mpuIMR = 0x7f >> ((XEiJ.regSRI = XEiJ.REG_SR_I & newSr) >> 8)) & XEiJ.mpuISR;  //XEiJ.mpuISRで1→0とするビット
 18298:     if (t != 0) {  //終了する割り込みがあるとき
 18299:       XEiJ.mpuISR ^= t;
 18300:       //デバイスに割り込み処理の終了を通知する
 18301:       if (t == XEiJ.MPU_MFP_INTERRUPT_MASK) {  //MFPのみ
 18302:         MC68901.mfpDone ();
 18303:       } else if (t == XEiJ.MPU_DMA_INTERRUPT_MASK) {  //DMAのみ
 18304:         HD63450.dmaDone ();
 18305:       } else if (t == XEiJ.MPU_SCC_INTERRUPT_MASK) {  //SCCのみ
 18306:         Z8530.sccDone ();
 18307:       } else if (t == XEiJ.MPU_IOI_INTERRUPT_MASK) {  //IOIのみ
 18308:         IOInterrupt.ioiDone ();
 18309:       } else if (t == XEiJ.MPU_EB2_INTERRUPT_MASK) {  //EB2のみ
 18310:         XEiJ.eb2Done ();
 18311:       } else {  //SYSのみまたは複数
 18312:         if (XEiJ.TEST_BIT_1_SHIFT ? t << 24 + XEiJ.MPU_MFP_INTERRUPT_LEVEL < 0 : (t & XEiJ.MPU_MFP_INTERRUPT_MASK) != 0) {
 18313:           MC68901.mfpDone ();
 18314:         }
 18315:         if (t << 24 + XEiJ.MPU_DMA_INTERRUPT_LEVEL < 0) {  //(t & XEiJ.MPU_DMA_INTERRUPT_MASK) != 0
 18316:           HD63450.dmaDone ();
 18317:         }
 18318:         if (XEiJ.TEST_BIT_2_SHIFT ? t << 24 + XEiJ.MPU_SCC_INTERRUPT_LEVEL < 0 : (t & XEiJ.MPU_SCC_INTERRUPT_MASK) != 0) {
 18319:           Z8530.sccDone ();
 18320:         }
 18321:         if (t << 24 + XEiJ.MPU_IOI_INTERRUPT_LEVEL < 0) {  //(t & XEiJ.MPU_IOI_INTERRUPT_MASK) != 0
 18322:           IOInterrupt.ioiDone ();
 18323:         }
 18324:         if (t << 24 + XEiJ.MPU_EB2_INTERRUPT_LEVEL < 0) {  //(t & XEiJ.MPU_EB2_INTERRUPT_MASK) != 0
 18325:           XEiJ.eb2Done ();
 18326:         }
 18327:         if (XEiJ.TEST_BIT_0_SHIFT ? t << 24 + XEiJ.MPU_SYS_INTERRUPT_LEVEL < 0 : (t & XEiJ.MPU_SYS_INTERRUPT_MASK) != 0) {
 18328:           XEiJ.sysDone ();
 18329:         }
 18330:       }
 18331:     }
 18332:     XEiJ.mpuIMR |= ~XEiJ.mpuISR & XEiJ.MPU_SYS_INTERRUPT_MASK;  //割り込みマスクレベルが7のときレベル7割り込みの処理中でなければレベル7割り込みを許可する
 18333:     XEiJ.regCCR = XEiJ.REG_CCR_MASK & newSr;
 18334:   }  //irpSetSR
 18335: 
 18336:   //irpInterrupt (offset, level)
 18337:   //  割り込み処理を開始する
 18338:   public static void irpInterrupt (int offset, int level) throws M68kException {
 18339:     if (XEiJ.regOC == 0b0100_111_001_110_010) {  //最後に実行した命令はSTOP命令
 18340:       XEiJ.regPC = XEiJ.regPC0 + 4;  //次の命令に進む
 18341:     }
 18342:     XEiJ.mpuClockTime += XEiJ.mpuModifiedUnit * 19;
 18343:     int save_sr = XEiJ.regSRT1 | XEiJ.regSRS | XEiJ.regSRM | XEiJ.regSRI | XEiJ.regCCR;
 18344:     XEiJ.regSRI = level << 8;  //割り込みマスクを要求されたレベルに変更する
 18345:     XEiJ.mpuIMR = 0x7f >> level;
 18346:     XEiJ.mpuISR |= 0x80 >> level;
 18347:     XEiJ.regSRT1 = XEiJ.mpuTraceFlag = 0;  //srのTビットを消す
 18348:     int sp;
 18349:     if (XEiJ.regSRS != 0) {  //スーパーバイザモード
 18350:       sp = XEiJ.regRn[15];
 18351:     } else {  //ユーザモード
 18352:       XEiJ.regSRS = XEiJ.REG_SR_S;  //スーパーバイザモードへ移行する
 18353:       XEiJ.mpuUSP = XEiJ.regRn[15];  //USPを保存
 18354:       sp = XEiJ.mpuISP;  //SSPを復元
 18355:       if (DataBreakPoint.DBP_ON) {
 18356:         DataBreakPoint.dbpMemoryMap = DataBreakPoint.dbpSuperMap;  //スーパーバイザメモリマップに切り替える
 18357:       } else {
 18358:         XEiJ.busMemoryMap = XEiJ.busSuperMap;  //スーパーバイザメモリマップに切り替える
 18359:       }
 18360:       if (InstructionBreakPoint.IBP_ON) {
 18361:         InstructionBreakPoint.ibpOp1MemoryMap = InstructionBreakPoint.ibpOp1SuperMap;
 18362:       }
 18363:     }
 18364:     //以下はスーパーバイザモード
 18365:     XEiJ.regRn[15] = sp -= 8;
 18366:     mmuWriteWordData (sp + 6, offset, 1);  //7-6:フォーマットとベクタオフセット
 18367:     mmuWriteLongData (sp + 2, XEiJ.regPC, 1);  //5-2:プログラムカウンタ
 18368:     mmuWriteWordData (sp, save_sr, 1);  //1-0:ステータスレジスタ
 18369:     //if (XEiJ.regSRM != 0) {  //マスタモードのとき
 18370:     XEiJ.regSRM = 0;  //割り込みモードへ移行する
 18371:     //}
 18372:     if (BranchLog.BLG_ON) {
 18373:       XEiJ.regPC0 = XEiJ.regPC;  //rteによる割り込み終了と同時に次の割り込みを受け付けたとき間でpc0を更新しないと2番目の分岐レコードの終了アドレスが1番目と同じになっておかしな分岐レコードができてしまう
 18374:     }
 18375:     irpSetPC (mmuReadLongFour (XEiJ.mpuVBR + offset, 1));  //例外ベクタを取り出してジャンプする
 18376:   }  //irpInterrupt
 18377: 
 18378:   //irpExceptionFormat0 (offset, save_pc)
 18379:   //  例外処理を開始する
 18380:   //  スタックへのプッシュ、ベクタの取り出し、ジャンプのいずれかでバスエラーまたはアドレスエラーが発生する場合がある
 18381:   public static void irpExceptionFormat0 (int offset, int save_pc) throws M68kException {
 18382:     XEiJ.mpuCycleCount += 19;
 18383:     int save_sr = XEiJ.regSRT1 | XEiJ.regSRS | XEiJ.regSRM | XEiJ.regSRI | XEiJ.regCCR;
 18384:     XEiJ.regSRT1 = XEiJ.mpuTraceFlag = 0;  //srのTビットを消す
 18385:     int sp;
 18386:     if (XEiJ.regSRS != 0) {  //スーパーバイザモード
 18387:       sp = XEiJ.regRn[15];
 18388:     } else {  //ユーザモード
 18389:       XEiJ.regSRS = XEiJ.REG_SR_S;  //スーパーバイザモードへ移行する
 18390:       XEiJ.mpuUSP = XEiJ.regRn[15];  //USPを保存
 18391:       sp = XEiJ.mpuISP;  //SSPを復元
 18392:       if (DataBreakPoint.DBP_ON) {
 18393:         DataBreakPoint.dbpMemoryMap = DataBreakPoint.dbpSuperMap;  //スーパーバイザメモリマップに切り替える
 18394:       } else {
 18395:         XEiJ.busMemoryMap = XEiJ.busSuperMap;  //スーパーバイザメモリマップに切り替える
 18396:       }
 18397:       if (InstructionBreakPoint.IBP_ON) {
 18398:         InstructionBreakPoint.ibpOp1MemoryMap = InstructionBreakPoint.ibpOp1SuperMap;
 18399:       }
 18400:     }
 18401:     //以下はスーパーバイザモード
 18402:     XEiJ.regRn[15] = sp -= 8;
 18403:     mmuWriteWordData (sp + 6, offset, 1);  //7-6:フォーマットとベクタオフセット
 18404:     mmuWriteLongData (sp + 2, save_pc, 1);  //5-2:プログラムカウンタ
 18405:     mmuWriteWordData (sp, save_sr, 1);  //1-0:ステータスレジスタ
 18406:     irpSetPC (mmuReadLongFour (XEiJ.mpuVBR + offset, 1));  //例外ベクタを取り出してジャンプする
 18407:   }  //irpExceptionFormat0
 18408: 
 18409:   //irpExceptionFormat2 (offset, save_pc, address)
 18410:   //  例外処理を開始する
 18411:   //  スタックへのプッシュ、ベクタの取り出し、ジャンプのいずれかでバスエラーまたはアドレスエラーが発生する場合がある
 18412:   public static void irpExceptionFormat2 (int offset, int save_pc, int address) throws M68kException {
 18413:     XEiJ.mpuCycleCount += 19;
 18414:     int save_sr = XEiJ.regSRT1 | XEiJ.regSRS | XEiJ.regSRM | XEiJ.regSRI | XEiJ.regCCR;
 18415:     XEiJ.regSRT1 = XEiJ.mpuTraceFlag = 0;  //srのTビットを消す
 18416:     int sp;
 18417:     if (XEiJ.regSRS != 0) {  //スーパーバイザモード
 18418:       sp = XEiJ.regRn[15];
 18419:     } else {  //ユーザモード
 18420:       XEiJ.regSRS = XEiJ.REG_SR_S;  //スーパーバイザモードへ移行する
 18421:       XEiJ.mpuUSP = XEiJ.regRn[15];  //USPを保存
 18422:       sp = XEiJ.mpuISP;  //SSPを復元
 18423:       if (DataBreakPoint.DBP_ON) {
 18424:         DataBreakPoint.dbpMemoryMap = DataBreakPoint.dbpSuperMap;  //スーパーバイザメモリマップに切り替える
 18425:       } else {
 18426:         XEiJ.busMemoryMap = XEiJ.busSuperMap;  //スーパーバイザメモリマップに切り替える
 18427:       }
 18428:       if (InstructionBreakPoint.IBP_ON) {
 18429:         InstructionBreakPoint.ibpOp1MemoryMap = InstructionBreakPoint.ibpOp1SuperMap;
 18430:       }
 18431:     }
 18432:     //以下はスーパーバイザモード
 18433:     XEiJ.regRn[15] = sp -= 12;
 18434:     mmuWriteLongData (sp + 8, address, 1);  //11-8:アドレス
 18435:     mmuWriteWordData (sp + 6, 0x2000 | offset, 1);  //7-6:フォーマットとベクタオフセット
 18436:     mmuWriteLongData (sp + 2, save_pc, 1);  //5-2:プログラムカウンタ
 18437:     mmuWriteWordData (sp, save_sr, 1);  //1-0:ステータスレジスタ
 18438:     irpSetPC (mmuReadLongFour (XEiJ.mpuVBR + offset, 1));  //例外ベクタを取り出してジャンプする
 18439:   }  //irpExceptionFormat2
 18440: 
 18441:   //irpExceptionFormat3 (offset, save_pc, address)
 18442:   //  例外処理を開始する
 18443:   //  スタックへのプッシュ、ベクタの取り出し、ジャンプのいずれかでバスエラーまたはアドレスエラーが発生する場合がある
 18444:   public static void irpExceptionFormat3 (int offset, int save_pc, int address) throws M68kException {
 18445:     XEiJ.mpuCycleCount += 19;
 18446:     int save_sr = XEiJ.regSRT1 | XEiJ.regSRS | XEiJ.regSRM | XEiJ.regSRI | XEiJ.regCCR;
 18447:     XEiJ.regSRT1 = XEiJ.mpuTraceFlag = 0;  //srのTビットを消す
 18448:     int sp;
 18449:     if (XEiJ.regSRS != 0) {  //スーパーバイザモード
 18450:       sp = XEiJ.regRn[15];
 18451:     } else {  //ユーザモード
 18452:       XEiJ.regSRS = XEiJ.REG_SR_S;  //スーパーバイザモードへ移行する
 18453:       XEiJ.mpuUSP = XEiJ.regRn[15];  //USPを保存
 18454:       sp = XEiJ.mpuISP;  //SSPを復元
 18455:       if (DataBreakPoint.DBP_ON) {
 18456:         DataBreakPoint.dbpMemoryMap = DataBreakPoint.dbpSuperMap;  //スーパーバイザメモリマップに切り替える
 18457:       } else {
 18458:         XEiJ.busMemoryMap = XEiJ.busSuperMap;  //スーパーバイザメモリマップに切り替える
 18459:       }
 18460:       if (InstructionBreakPoint.IBP_ON) {
 18461:         InstructionBreakPoint.ibpOp1MemoryMap = InstructionBreakPoint.ibpOp1SuperMap;
 18462:       }
 18463:     }
 18464:     //以下はスーパーバイザモード
 18465:     XEiJ.regRn[15] = sp -= 12;
 18466:     mmuWriteLongData (sp + 8, address, 1);  //11-8:実効アドレス
 18467:     mmuWriteWordData (sp + 6, 0x3000 | offset, 1);  //7-6:フォーマットとベクタオフセット
 18468:     mmuWriteLongData (sp + 2, save_pc, 1);  //5-2:プログラムカウンタ
 18469:     mmuWriteWordData (sp, save_sr, 1);  //1-0:ステータスレジスタ
 18470:     irpSetPC (mmuReadLongFour (XEiJ.mpuVBR + offset, 1));  //例外ベクタを取り出してジャンプする
 18471:   }  //irpExceptionFormat3
 18472: 
 18473: 
 18474: 
 18475:   //
 18476:   //  (d8,Ar,Rn.wl)と(d8,PC,Rn.wl)の拡張ワード
 18477:   //    0xf000  インデックスレジスタ
 18478:   //            0=D0,1=D1,2=D2,3=D3,4=D4,5=D5,6=D6,7=D7,8=A0,9=A1,10=A2,11=A3,12=A4,13=A5,14=A6,15=A7
 18479:   //    0x0800  インデックスサイズ
 18480:   //            0=ワードインデックス,1=ロングインデックス
 18481:   //    0x0600  スケールファクタ。ワードインデックスのとき符号拡張してから掛ける
 18482:   //            0=*1,1=*2,2=*4,3=*8
 18483:   //    0x0100  フォーマット
 18484:   //            0=ブリーフフォーマット,1=フルフォーマット
 18485:   //    ブリーフフォーマット
 18486:   //      0x00ff  バイトディスプレースメント
 18487:   //    フルフォーマット
 18488:   //      0x0080  1=ベースレジスタなし
 18489:   //      0x0040  1=インデックスなし
 18490:   //      0x0030  ベースディスプレースメントサイズ
 18491:   //              1=ベースディスプレースメントなし,2=ワードベースディスプレースメント,3=ロングベースディスプレースメント
 18492:   //      0x0008  0
 18493:   //      0x0004  0=プリインデックス,1=ポストインデックス
 18494:   //      0x0003  インダイレクトとアウタディスプレースメントサイズ
 18495:   //              0=インダイレクトなし,1=アウタディスプレースメントなし,2=ワードアウタディスプレースメント,3=ロングアウタディスプレースメント
 18496:   //      ベースディスプレースメントとアウタディスプレースメントが続く
 18497:   //    MPUによる制限
 18498:   //      スケールファクタは68020以上。68000と68010では無視されて*1になる
 18499:   //      フルフォーマットは68020以上。68000と68010では不当命令になる
 18500:   //
 18501:   //  (d16,PC)と(d8,PC,Rn.wl)のベースアドレス
 18502:   //    (d16,PC)と(d8,PC,Rn.wl)のベースアドレスは、Fライン命令以外では命令の先頭アドレス+2、Fライン命令では命令の先頭アドレス+4
 18503:   //    ベースアドレスの位置で実効アドレスを計算する
 18504:   //
 18505:   //  #<data>の扱い
 18506:   //    #<data>をそれが書かれている場所を実効アドレスとみなす方法で処理するとデータアクセスになってしまう
 18507:   //    命令アクセスにするためDr,Arと同様に呼び出し側で分離する
 18508:   //    バイト
 18509:   //      data = (ea < 020 ? (byte) XEiJ.regRn[ea] :  //Dr,Ar
 18510:   //              ea < 074 ? mmuReadByteSignData (efaMemByte (ea)) :
 18511:   //              mmuReadByteSignExword ((XEiJ.regPC += 2) - 1, XEiJ.regSRS));  //#<data>
 18512:   //    ワード
 18513:   //      data = (ea < 020 ? (short) XEiJ.regRn[ea] :  //Dr,Ar
 18514:   //              ea < 074 ? mmuReadWordSignData (efaMemWord (ea)) :
 18515:   //              mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS));  //#<data>
 18516:   //    ロング
 18517:   //      data = (ea < 020 ? XEiJ.regRn[ea] :  //Dr,Ar
 18518:   //              ea < 074 ? mmuReadLongData (efaMemLong (ea)) :
 18519:   //              mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS));  //#<data>
 18520:   //
 18521: 
 18522:   //a = efaMemByte (ea)
 18523:   //a = efaMemWord (ea)
 18524:   //a = efaMemLong (ea)
 18525:   //a = efaMemQuad (ea)
 18526:   //a = efaMemExtd (ea)
 18527:   //  |  M+-WXZP |
 18528:   //  メモリモードの実効アドレスを求める
 18529:   //  バイトのとき(A7)+と-(A7)はA7を奇偶に関わらず2変化させ、跨いだワードの上位バイト(アドレスの小さい方)を参照する
 18530:   public static int efaMemByte (int ea) throws M68kException {
 18531:     int t, w, x;
 18532:     switch (ea) {
 18533:     case 020:  //(A0)
 18534:     case 021:  //(A1)
 18535:     case 022:  //(A2)
 18536:     case 023:  //(A3)
 18537:     case 024:  //(A4)
 18538:     case 025:  //(A5)
 18539:     case 026:  //(A6)
 18540:     case 027:  //(A7)
 18541:       return m60Address = XEiJ.regRn[ea - (020 - 8)];
 18542:     case 030:  //(A0)+
 18543:     case 031:  //(A1)+
 18544:     case 032:  //(A1)+
 18545:     case 033:  //(A3)+
 18546:     case 034:  //(A4)+
 18547:     case 035:  //(A5)+
 18548:     case 036:  //(A6)+
 18549:       m60Incremented += 1L << ((ea - 030) << 3);
 18550:       return m60Address = XEiJ.regRn[ea - (030 - 8)]++;
 18551:     case 037:  //(A7)+
 18552:       m60Incremented += 2L << (7 << 3);
 18553:       return m60Address = (XEiJ.regRn[15] += 2) - 2;
 18554:     case 040:  //-(A0)
 18555:     case 041:  //-(A1)
 18556:     case 042:  //-(A2)
 18557:     case 043:  //-(A3)
 18558:     case 044:  //-(A4)
 18559:     case 045:  //-(A5)
 18560:     case 046:  //-(A6)
 18561:       m60Incremented -= 1L << ((ea - 040) << 3);
 18562:       return m60Address = --XEiJ.regRn[ea - (040 - 8)];
 18563:     case 047:  //-(A7)
 18564:       m60Incremented -= 2L << (7 << 3);
 18565:       return m60Address = XEiJ.regRn[15] -= 2;
 18566:     case 050:  //(d16,A0)
 18567:     case 051:  //(d16,A1)
 18568:     case 052:  //(d16,A2)
 18569:     case 053:  //(d16,A3)
 18570:     case 054:  //(d16,A4)
 18571:     case 055:  //(d16,A5)
 18572:     case 056:  //(d16,A6)
 18573:     case 057:  //(d16,A7)
 18574:     case 072:  //(d16,PC)
 18575:       t = ea == 072 ? XEiJ.regPC : XEiJ.regRn[ea - (050 - 8)];  //ベースレジスタ
 18576:       return m60Address = t + mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);  //ワードディスプレースメント
 18577:     case 060:  //(d8,A0,Rn.wl)
 18578:     case 061:  //(d8,A1,Rn.wl)
 18579:     case 062:  //(d8,A2,Rn.wl)
 18580:     case 063:  //(d8,A3,Rn.wl)
 18581:     case 064:  //(d8,A4,Rn.wl)
 18582:     case 065:  //(d8,A5,Rn.wl)
 18583:     case 066:  //(d8,A6,Rn.wl)
 18584:     case 067:  //(d8,A7,Rn.wl)
 18585:     case 073:  //(d8,PC,Rn.wl)
 18586:       t = ea == 073 ? XEiJ.regPC : XEiJ.regRn[ea - (060 - 8)];  //ベースレジスタ
 18587:       w = mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);  //拡張ワード
 18588:       if ((0x0100 & w) == 0) {  //ブリーフフォーマット
 18589:         return m60Address =
 18590:           (t  //ベースレジスタ
 18591:            + (byte) w  //バイトディスプレースメント
 18592:            + (((0x0800 & w) == 0 ? (short) XEiJ.regRn[w >> 12] :  //ワードインデックス
 18593:                XEiJ.regRn[w >> 12])  //ロングインデックス
 18594:               << ((0x0600 & w) >> 9)));  //スケールファクタ
 18595:       } else {  //フルフォーマット
 18596:         XEiJ.mpuCycleCount += ((0x0003 & w) == 0 ? 1 :  //インダイレクトなし
 18597:                                3);  //インダイレクトあり
 18598:         t = (((0x0080 & w) != 0 ? 0 :  //ベースレジスタなし
 18599:               t) +  //ベースレジスタあり
 18600:              ((0x0020 & w) == 0 ? 0 :  //ベースディスプレースメントなし
 18601:               (0x0010 & w) == 0 ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) :  //ワードベースディスプレースメント
 18602:               mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS)));  //ロングベースディスプレースメント
 18603:         x = ((0x0040 & w) != 0 ? 0 :  //インデックスなし
 18604:              ((0x0800 & w) == 0 ? (short) XEiJ.regRn[w >> 12] :  //ワードインデックス
 18605:               XEiJ.regRn[w >> 12])  //ロングインデックス
 18606:              << ((0x0600 & w) >> 9));  //スケールファクタ
 18607:         return m60Address =
 18608:           ((0x0003 & w) == 0 ? t + x :  //インダイレクトなし
 18609:            (((0x0004 & w) == 0 ? mmuReadLongData (m60Address = t + x, XEiJ.regSRS) :  //プリインデックス
 18610:              mmuReadLongData (m60Address = t, XEiJ.regSRS) + x)  //ポストインデックス
 18611:             + ((0x0002 & w) == 0 ? 0 :  //アウタディスプレースメントなし
 18612:                (0x0001 & w) == 0 ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) :  //ワードアウタディスプレースメント
 18613:                mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS))));  //ロングアウタディスプレースメント
 18614:       }
 18615:     case 070:  //(xxx).W
 18616:       return m60Address = mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);
 18617:     case 071:  //(xxx).L
 18618:       return m60Address = mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS);
 18619:     case 074:
 18620:       Thread.dumpStack ();
 18621:       break;
 18622:     }  //switch
 18623:     M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION;
 18624:     throw M68kException.m6eSignal;
 18625:   }  //efaMemByte
 18626:   public static int efaMemWord (int ea) throws M68kException {
 18627:     int t, w, x;
 18628:     switch (ea) {
 18629:     case 020:  //(A0)
 18630:     case 021:  //(A1)
 18631:     case 022:  //(A2)
 18632:     case 023:  //(A3)
 18633:     case 024:  //(A4)
 18634:     case 025:  //(A5)
 18635:     case 026:  //(A6)
 18636:     case 027:  //(A7)
 18637:       return m60Address = XEiJ.regRn[ea - (020 - 8)];
 18638:     case 030:  //(A0)+
 18639:     case 031:  //(A1)+
 18640:     case 032:  //(A1)+
 18641:     case 033:  //(A3)+
 18642:     case 034:  //(A4)+
 18643:     case 035:  //(A5)+
 18644:     case 036:  //(A6)+
 18645:     case 037:  //(A7)+
 18646:       m60Incremented += 2L << ((ea - 030) << 3);
 18647:       return m60Address = (XEiJ.regRn[ea - (030 - 8)] += 2) - 2;
 18648:     case 040:  //-(A0)
 18649:     case 041:  //-(A1)
 18650:     case 042:  //-(A2)
 18651:     case 043:  //-(A3)
 18652:     case 044:  //-(A4)
 18653:     case 045:  //-(A5)
 18654:     case 046:  //-(A6)
 18655:     case 047:  //-(A7)
 18656:       m60Incremented -= 2L << ((ea - 040) << 3);
 18657:       return m60Address = XEiJ.regRn[ea - (040 - 8)] -= 2;
 18658:     case 050:  //(d16,A0)
 18659:     case 051:  //(d16,A1)
 18660:     case 052:  //(d16,A2)
 18661:     case 053:  //(d16,A3)
 18662:     case 054:  //(d16,A4)
 18663:     case 055:  //(d16,A5)
 18664:     case 056:  //(d16,A6)
 18665:     case 057:  //(d16,A7)
 18666:     case 072:  //(d16,PC)
 18667:       t = ea == 072 ? XEiJ.regPC : XEiJ.regRn[ea - (050 - 8)];  //ベースレジスタ
 18668:       return m60Address = t + mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);  //ワードディスプレースメント
 18669:     case 060:  //(d8,A0,Rn.wl)
 18670:     case 061:  //(d8,A1,Rn.wl)
 18671:     case 062:  //(d8,A2,Rn.wl)
 18672:     case 063:  //(d8,A3,Rn.wl)
 18673:     case 064:  //(d8,A4,Rn.wl)
 18674:     case 065:  //(d8,A5,Rn.wl)
 18675:     case 066:  //(d8,A6,Rn.wl)
 18676:     case 067:  //(d8,A7,Rn.wl)
 18677:     case 073:  //(d8,PC,Rn.wl)
 18678:       t = ea == 073 ? XEiJ.regPC : XEiJ.regRn[ea - (060 - 8)];  //ベースレジスタ
 18679:       w = mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);  //拡張ワード
 18680:       if ((0x0100 & w) == 0) {  //ブリーフフォーマット
 18681:         return m60Address =
 18682:           (t  //ベースレジスタ
 18683:            + (byte) w  //バイトディスプレースメント
 18684:            + (((0x0800 & w) == 0 ? (short) XEiJ.regRn[w >> 12] :  //ワードインデックス
 18685:                XEiJ.regRn[w >> 12])  //ロングインデックス
 18686:               << ((0x0600 & w) >> 9)));  //スケールファクタ
 18687:       } else {  //フルフォーマット
 18688:         XEiJ.mpuCycleCount += ((0x0003 & w) == 0 ? 1 :  //インダイレクトなし
 18689:                                3);  //インダイレクトあり
 18690:         t = (((0x0080 & w) != 0 ? 0 :  //ベースレジスタなし
 18691:               t) +  //ベースレジスタあり
 18692:              ((0x0020 & w) == 0 ? 0 :  //ベースディスプレースメントなし
 18693:               (0x0010 & w) == 0 ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) :  //ワードベースディスプレースメント
 18694:               mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS)));  //ロングベースディスプレースメント
 18695:         x = ((0x0040 & w) != 0 ? 0 :  //インデックスなし
 18696:              ((0x0800 & w) == 0 ? (short) XEiJ.regRn[w >> 12] :  //ワードインデックス
 18697:               XEiJ.regRn[w >> 12])  //ロングインデックス
 18698:              << ((0x0600 & w) >> 9));  //スケールファクタ
 18699:         return m60Address =
 18700:           ((0x0003 & w) == 0 ? t + x :  //インダイレクトなし
 18701:            (((0x0004 & w) == 0 ? mmuReadLongData (m60Address = t + x, XEiJ.regSRS) :  //プリインデックス
 18702:              mmuReadLongData (m60Address = t, XEiJ.regSRS) + x)  //ポストインデックス
 18703:             + ((0x0002 & w) == 0 ? 0 :  //アウタディスプレースメントなし
 18704:                (0x0001 & w) == 0 ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) :  //ワードアウタディスプレースメント
 18705:                mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS))));  //ロングアウタディスプレースメント
 18706:       }
 18707:     case 070:  //(xxx).W
 18708:       return m60Address = mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);
 18709:     case 071:  //(xxx).L
 18710:       return m60Address = mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS);
 18711:     case 074:
 18712:       Thread.dumpStack ();
 18713:       break;
 18714:     }  //switch
 18715:     M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION;
 18716:     throw M68kException.m6eSignal;
 18717:   }  //efaMemWord
 18718:   public static int efaMemLong (int ea) throws M68kException {
 18719:     int t, w, x;
 18720:     switch (ea) {
 18721:     case 020:  //(A0)
 18722:     case 021:  //(A1)
 18723:     case 022:  //(A2)
 18724:     case 023:  //(A3)
 18725:     case 024:  //(A4)
 18726:     case 025:  //(A5)
 18727:     case 026:  //(A6)
 18728:     case 027:  //(A7)
 18729:       return m60Address = XEiJ.regRn[ea - (020 - 8)];
 18730:     case 030:  //(A0)+
 18731:     case 031:  //(A1)+
 18732:     case 032:  //(A1)+
 18733:     case 033:  //(A3)+
 18734:     case 034:  //(A4)+
 18735:     case 035:  //(A5)+
 18736:     case 036:  //(A6)+
 18737:     case 037:  //(A7)+
 18738:       m60Incremented += 4L << ((ea - 030) << 3);
 18739:       return m60Address = (XEiJ.regRn[ea - (030 - 8)] += 4) - 4;
 18740:     case 040:  //-(A0)
 18741:     case 041:  //-(A1)
 18742:     case 042:  //-(A2)
 18743:     case 043:  //-(A3)
 18744:     case 044:  //-(A4)
 18745:     case 045:  //-(A5)
 18746:     case 046:  //-(A6)
 18747:     case 047:  //-(A7)
 18748:       m60Incremented -= 4L << ((ea - 040) << 3);
 18749:       return m60Address = XEiJ.regRn[ea - (040 - 8)] -= 4;
 18750:     case 050:  //(d16,A0)
 18751:     case 051:  //(d16,A1)
 18752:     case 052:  //(d16,A2)
 18753:     case 053:  //(d16,A3)
 18754:     case 054:  //(d16,A4)
 18755:     case 055:  //(d16,A5)
 18756:     case 056:  //(d16,A6)
 18757:     case 057:  //(d16,A7)
 18758:     case 072:  //(d16,PC)
 18759:       t = ea == 072 ? XEiJ.regPC : XEiJ.regRn[ea - (050 - 8)];  //ベースレジスタ
 18760:       return m60Address = t + mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);  //ワードディスプレースメント
 18761:     case 060:  //(d8,A0,Rn.wl)
 18762:     case 061:  //(d8,A1,Rn.wl)
 18763:     case 062:  //(d8,A2,Rn.wl)
 18764:     case 063:  //(d8,A3,Rn.wl)
 18765:     case 064:  //(d8,A4,Rn.wl)
 18766:     case 065:  //(d8,A5,Rn.wl)
 18767:     case 066:  //(d8,A6,Rn.wl)
 18768:     case 067:  //(d8,A7,Rn.wl)
 18769:     case 073:  //(d8,PC,Rn.wl)
 18770:       t = ea == 073 ? XEiJ.regPC : XEiJ.regRn[ea - (060 - 8)];  //ベースレジスタ
 18771:       w = mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);  //拡張ワード
 18772:       if ((0x0100 & w) == 0) {  //ブリーフフォーマット
 18773:         return m60Address =
 18774:           (t  //ベースレジスタ
 18775:            + (byte) w  //バイトディスプレースメント
 18776:            + (((0x0800 & w) == 0 ? (short) XEiJ.regRn[w >> 12] :  //ワードインデックス
 18777:                XEiJ.regRn[w >> 12])  //ロングインデックス
 18778:               << ((0x0600 & w) >> 9)));  //スケールファクタ
 18779:       } else {  //フルフォーマット
 18780:         XEiJ.mpuCycleCount += ((0x0003 & w) == 0 ? 1 :  //インダイレクトなし
 18781:                                3);  //インダイレクトあり
 18782:         t = (((0x0080 & w) != 0 ? 0 :  //ベースレジスタなし
 18783:               t) +  //ベースレジスタあり
 18784:              ((0x0020 & w) == 0 ? 0 :  //ベースディスプレースメントなし
 18785:               (0x0010 & w) == 0 ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) :  //ワードベースディスプレースメント
 18786:               mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS)));  //ロングベースディスプレースメント
 18787:         x = ((0x0040 & w) != 0 ? 0 :  //インデックスなし
 18788:              ((0x0800 & w) == 0 ? (short) XEiJ.regRn[w >> 12] :  //ワードインデックス
 18789:               XEiJ.regRn[w >> 12])  //ロングインデックス
 18790:              << ((0x0600 & w) >> 9));  //スケールファクタ
 18791:         return m60Address =
 18792:           ((0x0003 & w) == 0 ? t + x :  //インダイレクトなし
 18793:            (((0x0004 & w) == 0 ? mmuReadLongData (m60Address = t + x, XEiJ.regSRS) :  //プリインデックス
 18794:              mmuReadLongData (m60Address = t, XEiJ.regSRS) + x)  //ポストインデックス
 18795:             + ((0x0002 & w) == 0 ? 0 :  //アウタディスプレースメントなし
 18796:                (0x0001 & w) == 0 ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) :  //ワードアウタディスプレースメント
 18797:                mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS))));  //ロングアウタディスプレースメント
 18798:       }
 18799:     case 070:  //(xxx).W
 18800:       return m60Address = mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);
 18801:     case 071:  //(xxx).L
 18802:       return m60Address = mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS);
 18803:     case 074:
 18804:       Thread.dumpStack ();
 18805:       break;
 18806:     }  //switch
 18807:     M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION;
 18808:     throw M68kException.m6eSignal;
 18809:   }  //efaMemLong
 18810:   public static int efaMemQuad (int ea) throws M68kException {
 18811:     int t, w, x;
 18812:     switch (ea) {
 18813:     case 020:  //(A0)
 18814:     case 021:  //(A1)
 18815:     case 022:  //(A2)
 18816:     case 023:  //(A3)
 18817:     case 024:  //(A4)
 18818:     case 025:  //(A5)
 18819:     case 026:  //(A6)
 18820:     case 027:  //(A7)
 18821:       return m60Address = XEiJ.regRn[ea - (020 - 8)];
 18822:     case 030:  //(A0)+
 18823:     case 031:  //(A1)+
 18824:     case 032:  //(A1)+
 18825:     case 033:  //(A3)+
 18826:     case 034:  //(A4)+
 18827:     case 035:  //(A5)+
 18828:     case 036:  //(A6)+
 18829:     case 037:  //(A7)+
 18830:       m60Incremented += 8L << ((ea - 030) << 3);
 18831:       return m60Address = (XEiJ.regRn[ea - (030 - 8)] += 8) - 8;
 18832:     case 040:  //-(A0)
 18833:     case 041:  //-(A1)
 18834:     case 042:  //-(A2)
 18835:     case 043:  //-(A3)
 18836:     case 044:  //-(A4)
 18837:     case 045:  //-(A5)
 18838:     case 046:  //-(A6)
 18839:     case 047:  //-(A7)
 18840:       m60Incremented -= 8L << ((ea - 040) << 3);
 18841:       return m60Address = XEiJ.regRn[ea - (040 - 8)] -= 8;
 18842:     case 050:  //(d16,A0)
 18843:     case 051:  //(d16,A1)
 18844:     case 052:  //(d16,A2)
 18845:     case 053:  //(d16,A3)
 18846:     case 054:  //(d16,A4)
 18847:     case 055:  //(d16,A5)
 18848:     case 056:  //(d16,A6)
 18849:     case 057:  //(d16,A7)
 18850:     case 072:  //(d16,PC)
 18851:       t = ea == 072 ? XEiJ.regPC : XEiJ.regRn[ea - (050 - 8)];  //ベースレジスタ
 18852:       return m60Address = t + mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);  //ワードディスプレースメント
 18853:     case 060:  //(d8,A0,Rn.wl)
 18854:     case 061:  //(d8,A1,Rn.wl)
 18855:     case 062:  //(d8,A2,Rn.wl)
 18856:     case 063:  //(d8,A3,Rn.wl)
 18857:     case 064:  //(d8,A4,Rn.wl)
 18858:     case 065:  //(d8,A5,Rn.wl)
 18859:     case 066:  //(d8,A6,Rn.wl)
 18860:     case 067:  //(d8,A7,Rn.wl)
 18861:     case 073:  //(d8,PC,Rn.wl)
 18862:       t = ea == 073 ? XEiJ.regPC : XEiJ.regRn[ea - (060 - 8)];  //ベースレジスタ
 18863:       w = mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);  //拡張ワード
 18864:       if ((0x0100 & w) == 0) {  //ブリーフフォーマット
 18865:         return m60Address =
 18866:           (t  //ベースレジスタ
 18867:            + (byte) w  //バイトディスプレースメント
 18868:            + (((0x0800 & w) == 0 ? (short) XEiJ.regRn[w >> 12] :  //ワードインデックス
 18869:                XEiJ.regRn[w >> 12])  //ロングインデックス
 18870:               << ((0x0600 & w) >> 9)));  //スケールファクタ
 18871:       } else {  //フルフォーマット
 18872:         XEiJ.mpuCycleCount += ((0x0003 & w) == 0 ? 1 :  //インダイレクトなし
 18873:                                3);  //インダイレクトあり
 18874:         t = (((0x0080 & w) != 0 ? 0 :  //ベースレジスタなし
 18875:               t) +  //ベースレジスタあり
 18876:              ((0x0020 & w) == 0 ? 0 :  //ベースディスプレースメントなし
 18877:               (0x0010 & w) == 0 ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) :  //ワードベースディスプレースメント
 18878:               mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS)));  //ロングベースディスプレースメント
 18879:         x = ((0x0040 & w) != 0 ? 0 :  //インデックスなし
 18880:              ((0x0800 & w) == 0 ? (short) XEiJ.regRn[w >> 12] :  //ワードインデックス
 18881:               XEiJ.regRn[w >> 12])  //ロングインデックス
 18882:              << ((0x0600 & w) >> 9));  //スケールファクタ
 18883:         return m60Address =
 18884:           ((0x0003 & w) == 0 ? t + x :  //インダイレクトなし
 18885:            (((0x0004 & w) == 0 ? mmuReadLongData (m60Address = t + x, XEiJ.regSRS) :  //プリインデックス
 18886:              mmuReadLongData (m60Address = t, XEiJ.regSRS) + x)  //ポストインデックス
 18887:             + ((0x0002 & w) == 0 ? 0 :  //アウタディスプレースメントなし
 18888:                (0x0001 & w) == 0 ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) :  //ワードアウタディスプレースメント
 18889:                mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS))));  //ロングアウタディスプレースメント
 18890:       }
 18891:     case 070:  //(xxx).W
 18892:       return m60Address = mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);
 18893:     case 071:  //(xxx).L
 18894:       return m60Address = mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS);
 18895:     case 074:
 18896:       Thread.dumpStack ();
 18897:       break;
 18898:     }  //switch
 18899:     M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION;
 18900:     throw M68kException.m6eSignal;
 18901:   }  //efaMemQuad
 18902:   public static int efaMemExtd (int ea) throws M68kException {
 18903:     int t, w, x;
 18904:     switch (ea) {
 18905:     case 020:  //(A0)
 18906:     case 021:  //(A1)
 18907:     case 022:  //(A2)
 18908:     case 023:  //(A3)
 18909:     case 024:  //(A4)
 18910:     case 025:  //(A5)
 18911:     case 026:  //(A6)
 18912:     case 027:  //(A7)
 18913:       return m60Address = XEiJ.regRn[ea - (020 - 8)];
 18914:     case 030:  //(A0)+
 18915:     case 031:  //(A1)+
 18916:     case 032:  //(A1)+
 18917:     case 033:  //(A3)+
 18918:     case 034:  //(A4)+
 18919:     case 035:  //(A5)+
 18920:     case 036:  //(A6)+
 18921:     case 037:  //(A7)+
 18922:       m60Incremented += 12L << ((ea - 030) << 3);
 18923:       return m60Address = (XEiJ.regRn[ea - (030 - 8)] += 12) - 12;
 18924:     case 040:  //-(A0)
 18925:     case 041:  //-(A1)
 18926:     case 042:  //-(A2)
 18927:     case 043:  //-(A3)
 18928:     case 044:  //-(A4)
 18929:     case 045:  //-(A5)
 18930:     case 046:  //-(A6)
 18931:     case 047:  //-(A7)
 18932:       m60Incremented -= 12L << ((ea - 040) << 3);
 18933:       return m60Address = XEiJ.regRn[ea - (040 - 8)] -= 12;
 18934:     case 050:  //(d16,A0)
 18935:     case 051:  //(d16,A1)
 18936:     case 052:  //(d16,A2)
 18937:     case 053:  //(d16,A3)
 18938:     case 054:  //(d16,A4)
 18939:     case 055:  //(d16,A5)
 18940:     case 056:  //(d16,A6)
 18941:     case 057:  //(d16,A7)
 18942:     case 072:  //(d16,PC)
 18943:       t = ea == 072 ? XEiJ.regPC : XEiJ.regRn[ea - (050 - 8)];  //ベースレジスタ
 18944:       return m60Address = t + mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);  //ワードディスプレースメント
 18945:     case 060:  //(d8,A0,Rn.wl)
 18946:     case 061:  //(d8,A1,Rn.wl)
 18947:     case 062:  //(d8,A2,Rn.wl)
 18948:     case 063:  //(d8,A3,Rn.wl)
 18949:     case 064:  //(d8,A4,Rn.wl)
 18950:     case 065:  //(d8,A5,Rn.wl)
 18951:     case 066:  //(d8,A6,Rn.wl)
 18952:     case 067:  //(d8,A7,Rn.wl)
 18953:     case 073:  //(d8,PC,Rn.wl)
 18954:       t = ea == 073 ? XEiJ.regPC : XEiJ.regRn[ea - (060 - 8)];  //ベースレジスタ
 18955:       w = mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);  //拡張ワード
 18956:       if ((0x0100 & w) == 0) {  //ブリーフフォーマット
 18957:         return m60Address =
 18958:           (t  //ベースレジスタ
 18959:            + (byte) w  //バイトディスプレースメント
 18960:            + (((0x0800 & w) == 0 ? (short) XEiJ.regRn[w >> 12] :  //ワードインデックス
 18961:                XEiJ.regRn[w >> 12])  //ロングインデックス
 18962:               << ((0x0600 & w) >> 9)));  //スケールファクタ
 18963:       } else {  //フルフォーマット
 18964:         XEiJ.mpuCycleCount += ((0x0003 & w) == 0 ? 1 :  //インダイレクトなし
 18965:                                3);  //インダイレクトあり
 18966:         t = (((0x0080 & w) != 0 ? 0 :  //ベースレジスタなし
 18967:               t) +  //ベースレジスタあり
 18968:              ((0x0020 & w) == 0 ? 0 :  //ベースディスプレースメントなし
 18969:               (0x0010 & w) == 0 ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) :  //ワードベースディスプレースメント
 18970:               mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS)));  //ロングベースディスプレースメント
 18971:         x = ((0x0040 & w) != 0 ? 0 :  //インデックスなし
 18972:              ((0x0800 & w) == 0 ? (short) XEiJ.regRn[w >> 12] :  //ワードインデックス
 18973:               XEiJ.regRn[w >> 12])  //ロングインデックス
 18974:              << ((0x0600 & w) >> 9));  //スケールファクタ
 18975:         return m60Address =
 18976:           ((0x0003 & w) == 0 ? t + x :  //インダイレクトなし
 18977:            (((0x0004 & w) == 0 ? mmuReadLongData (m60Address = t + x, XEiJ.regSRS) :  //プリインデックス
 18978:              mmuReadLongData (m60Address = t, XEiJ.regSRS) + x)  //ポストインデックス
 18979:             + ((0x0002 & w) == 0 ? 0 :  //アウタディスプレースメントなし
 18980:                (0x0001 & w) == 0 ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) :  //ワードアウタディスプレースメント
 18981:                mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS))));  //ロングアウタディスプレースメント
 18982:       }
 18983:     case 070:  //(xxx).W
 18984:       return m60Address = mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);
 18985:     case 071:  //(xxx).L
 18986:       return m60Address = mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS);
 18987:     case 074:
 18988:       Thread.dumpStack ();
 18989:       break;
 18990:     }  //switch
 18991:     M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION;
 18992:     throw M68kException.m6eSignal;
 18993:   }  //efaMemExtd
 18994: 
 18995:   //                             7777777766666666555555554444444433333333222222221111111100000000  mmm
 18996:   //                             7654321076543210765432107654321076543210765432107654321076543210  rrr
 18997:   //                             ...IPPZZXXXXXXXXWWWWWWWW--------++++++++MMMMMMMMAAAAAAAADDDDDDDD
 18998:   static final long MEM_MASK = 0b0000111111111111111111111111111111111111111111110000000000000000L;  //メモリモード
 18999:   static final long MLT_MASK = 0b0000001111111111111111111111111111111111111111110000000000000000L;  //メモリ可変モード
 19000:   static final long CNT_MASK = 0b0000111111111111111111110000000000000000111111110000000000000000L;  //制御モード
 19001:   static final long CLT_MASK = 0b0000001111111111111111110000000000000000111111110000000000000000L;  //制御可変モード
 19002: 
 19003:   //a = efaMltByte (ea)
 19004:   //a = efaMltWord (ea)
 19005:   //a = efaMltLong (ea)
 19006:   //a = efaMltQuad (ea)
 19007:   //a = efaMltExtd (ea)
 19008:   //  |  M+-WXZ  |
 19009:   //  メモリ可変モードの実効アドレスを求める
 19010:   //  メモリモードとの違いは(d16,PC)と(d8,PC,Rn.wl)がないこと
 19011:   public static int efaMltByte (int ea) throws M68kException {
 19012:     return efaMemByte ((MLT_MASK & (1L << ea)) == 0 ? 0 : ea);
 19013:   }  //efaMltByte
 19014:   public static int efaMltWord (int ea) throws M68kException {
 19015:     return efaMemWord ((MLT_MASK & (1L << ea)) == 0 ? 0 : ea);
 19016:   }  //efaMltWord
 19017:   public static int efaMltLong (int ea) throws M68kException {
 19018:     return efaMemLong ((MLT_MASK & (1L << ea)) == 0 ? 0 : ea);
 19019:   }  //efaMltLong
 19020:   public static int efaMltQuad (int ea) throws M68kException {
 19021:     return efaMemQuad ((MLT_MASK & (1L << ea)) == 0 ? 0 : ea);
 19022:   }  //efaMltQuad
 19023:   public static int efaMltExtd (int ea) throws M68kException {
 19024:     return efaMemExtd ((MLT_MASK & (1L << ea)) == 0 ? 0 : ea);
 19025:   }  //efaMltExtd
 19026: 
 19027:   //a = efaCntByte (ea)
 19028:   //a = efaCntWord (ea)
 19029:   //a = efaCntLong (ea)
 19030:   //a = efaCntQuad (ea)
 19031:   //a = efaCntExtd (ea)
 19032:   //  |  M  WXZP |
 19033:   //  制御モードの実効アドレスを求める
 19034:   //  メモリモードとの違いは(Ar)+と-(Ar)がないこと
 19035:   public static int efaCntByte (int ea) throws M68kException {
 19036:     return efaMemByte ((CNT_MASK & (1L << ea)) == 0 ? 0 : ea);
 19037:   }  //efaCntByte
 19038:   public static int efaCntWord (int ea) throws M68kException {
 19039:     return efaMemWord ((CNT_MASK & (1L << ea)) == 0 ? 0 : ea);
 19040:   }  //efaCntWord
 19041:   public static int efaCntLong (int ea) throws M68kException {
 19042:     return efaMemLong ((CNT_MASK & (1L << ea)) == 0 ? 0 : ea);
 19043:   }  //efaCntLong
 19044:   public static int efaCntQuad (int ea) throws M68kException {
 19045:     return efaMemQuad ((CNT_MASK & (1L << ea)) == 0 ? 0 : ea);
 19046:   }  //efaCntQuad
 19047:   public static int efaCntExtd (int ea) throws M68kException {
 19048:     return efaMemExtd ((CNT_MASK & (1L << ea)) == 0 ? 0 : ea);
 19049:   }  //efaCntExtd
 19050: 
 19051:   //a = efaCltByte (ea)
 19052:   //a = efaCltWord (ea)
 19053:   //a = efaCltLong (ea)
 19054:   //a = efaCltQuad (ea)
 19055:   //a = efaCltExtd (ea)
 19056:   //  |  M  WXZ  |
 19057:   //  制御可変モードの実効アドレスを求める
 19058:   //  メモリモードとの違いは(Ar)+と-(Ar)と(d16,PC)と(d8,PC,Rn.wl)がないこと
 19059:   public static int efaCltByte (int ea) throws M68kException {
 19060:     return efaMemByte ((CLT_MASK & (1L << ea)) == 0 ? 0 : ea);
 19061:   }  //efaCltByte
 19062:   public static int efaCltWord (int ea) throws M68kException {
 19063:     return efaMemWord ((CLT_MASK & (1L << ea)) == 0 ? 0 : ea);
 19064:   }  //efaCltWord
 19065:   public static int efaCltLong (int ea) throws M68kException {
 19066:     return efaMemLong ((CLT_MASK & (1L << ea)) == 0 ? 0 : ea);
 19067:   }  //efaCltLong
 19068:   public static int efaCltQuad (int ea) throws M68kException {
 19069:     return efaMemQuad ((CLT_MASK & (1L << ea)) == 0 ? 0 : ea);
 19070:   }  //efaCltQuad
 19071:   public static int efaCltExtd (int ea) throws M68kException {
 19072:     return efaMemExtd ((CLT_MASK & (1L << ea)) == 0 ? 0 : ea);
 19073:   }  //efaCltExtd
 19074: 
 19075:   //以下廃止予定
 19076:   //  Any* → Mem*  #<data>を分離できているか確認すること
 19077:   //  LeaPea → Cnt*
 19078:   //  JmpJsr → Cnt*
 19079:   public static int efaAnyByte (int ea) throws M68kException {
 19080:     return efaMemByte (ea);
 19081:   }  //efaAnyByte
 19082:   public static int efaAnyWord (int ea) throws M68kException {
 19083:     return efaMemWord (ea);
 19084:   }  //efaAnyWord
 19085:   public static int efaAnyLong (int ea) throws M68kException {
 19086:     return efaMemLong (ea);
 19087:   }  //efaAnyLong
 19088:   public static int efaAnyQuad (int ea) throws M68kException {
 19089:     return efaMemQuad (ea);
 19090:   }  //efaAnyQuad
 19091:   public static int efaAnyExtd (int ea) throws M68kException {
 19092:     return efaMemExtd (ea);
 19093:   }  //efaAnyExtd
 19094:   public static int efaLeaPea (int ea) throws M68kException {
 19095:     return efaCntLong (ea);
 19096:   }  //efaLeaPea
 19097:   public static int efaJmpJsr (int ea) throws M68kException {
 19098:     return efaCntLong (ea);
 19099:   }  //efaJmpJsr
 19100: 
 19101: 
 19102: 
 19103:   //fpkSTOL ()
 19104:   //  $FE10  __STOL
 19105:   //  10進数の文字列を32bit符号あり整数に変換する
 19106:   //  /^[ \t]*[-+]?[0-9]+/
 19107:   //  先頭の'\t'と' 'を読み飛ばす
 19108:   //  <a0.l:10進数の文字列の先頭
 19109:   //  >d0.l:32bit符号あり整数
 19110:   //  >a0.l:10進数の文字列の直後('\0'とは限らない)
 19111:   //  >ccr:0=エラーなし,CCR_N|CCR_C=文法エラー,CCR_V|CCR_C=オーバーフロー
 19112:   public static void fpkSTOL () throws M68kException {
 19113:     int a = XEiJ.regRn[8];  //a0
 19114:     int c = mmuReadByteZeroData (a, 1);
 19115:     while (c == ' ' || c == '\t') {
 19116:       c = mmuReadByteZeroData (++a, 1);
 19117:     }
 19118:     int n = '7';  //'7'=正,'8'=負
 19119:     if (c == '-') {  //負
 19120:       n = '8';
 19121:       c = mmuReadByteZeroData (++a, 1);
 19122:     } else if (c == '+') {  //正
 19123:       c = mmuReadByteZeroData (++a, 1);
 19124:     }
 19125:     if (!('0' <= c && c <= '9')) {  //数字が1つもない
 19126:       XEiJ.regRn[8] = a;  //a0
 19127:       XEiJ.regCCR = XEiJ.REG_CCR_N | XEiJ.REG_CCR_C;
 19128:       return;
 19129:     }
 19130:     int x = c - '0';  //値
 19131:     for (c = mmuReadByteZeroData (++a, 1); '0' <= c && c <= '9'; c = mmuReadByteZeroData (++a, 1)) {
 19132:       if (214748364 < x || x == 214748364 && n < c) {  //正のとき2147483647、負のとき2147483648より大きくなるときオーバーフロー
 19133:         XEiJ.regRn[8] = a;  //a0
 19134:         XEiJ.regCCR = XEiJ.REG_CCR_V | XEiJ.REG_CCR_C;
 19135:         return;
 19136:       }
 19137:       x = x * 10 + (c - '0');
 19138:     }
 19139:     if (n != '7') {  //負
 19140:       x = -x;
 19141:     }
 19142:     XEiJ.regRn[0] = x;  //d0
 19143:     XEiJ.regRn[8] = a;  //a0
 19144:     XEiJ.regCCR = 0;
 19145:   }  //fpkSTOL()
 19146: 
 19147:   //fpkLTOS ()
 19148:   //  $FE11  __LTOS
 19149:   //  32bit符号あり整数を10進数の文字列に変換する
 19150:   //  /^-?[1-9][0-9]*$/
 19151:   //  <d0.l:32bit符号あり整数
 19152:   //  <a0.l:文字列バッファの先頭
 19153:   //  >a0.l:10進数の文字列の直後('\0'の位置)
 19154:   public static void fpkLTOS () throws M68kException {
 19155:     int x = XEiJ.regRn[0];  //d0
 19156:     int a = XEiJ.regRn[8];  //a0
 19157:     if (x < 0) {  //負
 19158:       mmuWriteByteData (a++, '-', 1);
 19159:       x = -x;
 19160:     }
 19161:     long t = XEiJ.fmtBcd12 (0xffffffffL & x);  //符号は取り除いてあるがx=0x80000000の場合があるので(long)xは不可
 19162:     XEiJ.regRn[8] = a += Math.max (1, 67 - Long.numberOfLeadingZeros (t) >> 2);  //a0
 19163:     mmuWriteByteData (a, 0, 1);
 19164:     do {
 19165:       mmuWriteByteData (--a, '0' | (int) t & 15, 1);
 19166:     } while ((t >>>= 4) != 0L);
 19167:   }  //fpkLTOS()
 19168: 
 19169:   //fpkSTOH ()
 19170:   //  $FE12  __STOH
 19171:   //  16進数の文字列を32bit符号なし整数に変換する
 19172:   //  /^[0-9A-Fa-f]+/
 19173:   //  <a0.l:16進数の文字列の先頭
 19174:   //  >d0.l:32bit符号なし整数
 19175:   //  >a0.l:16進数の文字列の直後('\0'とは限らない)
 19176:   //  >ccr:0=エラーなし,CCR_N|CCR_C=文法エラー,CCR_V|CCR_C=オーバーフロー
 19177:   public static void fpkSTOH () throws M68kException {
 19178:     int a = XEiJ.regRn[8];  //a0
 19179:     int c = mmuReadByteZeroData (a, 1);
 19180:     if (!('0' <= c && c <= '9' || 'A' <= c && c <= 'F' || 'a' <= c && c <= 'f')) {  //数字が1つもない
 19181:       XEiJ.regRn[8] = a;  //a0
 19182:       XEiJ.regCCR = XEiJ.REG_CCR_N | XEiJ.REG_CCR_C;
 19183:       return;
 19184:     }
 19185:     int x = c <= '9' ? c - '0' : c <= 'F' ? c - ('A' - 10) : c - ('a' - 10);  //値
 19186:     for (c = mmuReadByteZeroData (++a, 1); '0' <= c && c <= '9' || 'A' <= c && c <= 'F' || 'a' <= c && c <= 'f'; c = mmuReadByteZeroData (++a, 1)) {
 19187:       if (0x0fffffff < x) {  //0xffffffffより大きくなるときオーバーフロー
 19188:         XEiJ.regRn[8] = a;  //a0
 19189:         XEiJ.regCCR = XEiJ.REG_CCR_V | XEiJ.REG_CCR_C;
 19190:         return;
 19191:       }
 19192:       x = x << 4 | (c <= '9' ? c - '0' : c <= 'F' ? c - ('A' - 10) : c - ('a' - 10));
 19193:     }
 19194:     XEiJ.regRn[0] = x;  //d0
 19195:     XEiJ.regRn[8] = a;  //a0
 19196:     XEiJ.regCCR = 0;
 19197:   }  //fpkSTOH()
 19198: 
 19199:   //fpkHTOS ()
 19200:   //  $FE13  __HTOS
 19201:   //  32bit符号なし整数を16進数の文字列に変換する
 19202:   //  /^[1-9A-F][0-9A-F]*$/
 19203:   //  <d0.l:32bit符号なし整数
 19204:   //  <a0.l:文字列バッファの先頭
 19205:   //  >a0.l:16進数の文字列の直後('\0'の位置)
 19206:   public static void fpkHTOS () throws M68kException {
 19207:     int x = XEiJ.regRn[0];  //d0
 19208:     int a = XEiJ.regRn[8] += Math.max (1, 35 - Integer.numberOfLeadingZeros (x) >> 2);  //a0
 19209:     mmuWriteByteData (a, 0, 1);
 19210:     do {
 19211:       int t = x & 15;
 19212:       //     t             00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f
 19213:       //   9-t             09 08 07 06 05 04 03 02 01 00 ff fe fd fc fb fa
 19214:       //   9-t>>4          00 00 00 00 00 00 00 00 00 00 ff ff ff ff ff ff
 19215:       //   9-t>>4&7        00 00 00 00 00 00 00 00 00 00 07 07 07 07 07 07
 19216:       //   9-t>>4&7|48     30 30 30 30 30 30 30 30 30 30 37 37 37 37 37 37
 19217:       //  (9-t>>4&7|48)+t  30 31 32 33 34 35 36 37 38 39 41 42 43 44 45 46
 19218:       //                    0  1  2  3  4  5  6  7  8  9  A  B  C  D  E  F
 19219:       mmuWriteByteData (--a, (9 - t >> 4 & 7 | 48) + t, 1);
 19220:     } while ((x >>>= 4) != 0);
 19221:   }  //fpkHTOS()
 19222: 
 19223:   //fpkSTOO ()
 19224:   //  $FE14  __STOO
 19225:   //  8進数の文字列を32bit符号なし整数に変換する
 19226:   //  /^[0-7]+/
 19227:   //  <a0.l:8進数の文字列の先頭
 19228:   //  >d0.l:32bit符号なし整数
 19229:   //  >a0.l:8進数の文字列の直後('\0'とは限らない)
 19230:   //  >ccr:0=エラーなし,CCR_N|CCR_C=文法エラー,CCR_V|CCR_C=オーバーフロー
 19231:   public static void fpkSTOO () throws M68kException {
 19232:     int a = XEiJ.regRn[8];  //a0
 19233:     int c = mmuReadByteZeroData (a, 1);
 19234:     if (!('0' <= c && c <= '7')) {  //数字が1つもない
 19235:       XEiJ.regRn[8] = a;  //a0
 19236:       XEiJ.regCCR = XEiJ.REG_CCR_N | XEiJ.REG_CCR_C;
 19237:       return;
 19238:     }
 19239:     int x = c - '0';  //値
 19240:     for (c = mmuReadByteZeroData (++a, 1); '0' <= c && c <= '7'; c = mmuReadByteZeroData (++a, 1)) {
 19241:       if (0x1fffffff < x) {  //0xffffffffより大きくなるときオーバーフロー
 19242:         XEiJ.regRn[8] = a;  //a0
 19243:         XEiJ.regCCR = XEiJ.REG_CCR_V | XEiJ.REG_CCR_C;
 19244:         return;
 19245:       }
 19246:       x = x << 3 | c & 7;
 19247:     }
 19248:     XEiJ.regRn[0] = x;  //d0
 19249:     XEiJ.regRn[8] = a;  //a0
 19250:     XEiJ.regCCR = 0;
 19251:   }  //fpkSTOO()
 19252: 
 19253:   //fpkOTOS ()
 19254:   //  $FE15  __OTOS
 19255:   //  32bit符号なし整数を8進数の文字列に変換する
 19256:   //  /^[1-7][0-7]*$/
 19257:   //  <d0.l:32bit符号なし整数
 19258:   //  <a0.l:文字列バッファの先頭
 19259:   //  >a0.l:8進数の文字列の直後('\0'の位置)
 19260:   public static void fpkOTOS () throws M68kException {
 19261:     int x = XEiJ.regRn[0];  //d0
 19262:     //perl optdiv.pl 34 3
 19263:     //  x/3==x*43>>>7 (0<=x<=127) [34*43==1462]
 19264:     int a = XEiJ.regRn[8] += Math.max (1, (34 - Integer.numberOfLeadingZeros (x)) * 43 >>> 7);  //a0
 19265:     mmuWriteByteData (a, 0, 1);
 19266:     do {
 19267:       mmuWriteByteData (--a, '0' | x & 7, 1);
 19268:     } while ((x >>>= 3) != 0);
 19269:   }  //fpkOTOS()
 19270: 
 19271:   //fpkSTOB ()
 19272:   //  $FE16  __STOB
 19273:   //  2進数の文字列を32bit符号なし整数に変換する
 19274:   //  /^[01]+/
 19275:   //  <a0.l:2進数の文字列の先頭
 19276:   //  >d0.l:32bit符号なし整数
 19277:   //  >a0.l:2進数の文字列の直後('\0'とは限らない)
 19278:   //  >ccr:0=エラーなし,CCR_N|CCR_C=文法エラー,CCR_V|CCR_C=オーバーフロー
 19279:   public static void fpkSTOB () throws M68kException {
 19280:     int a = XEiJ.regRn[8];  //a0
 19281:     int c = mmuReadByteZeroData (a, 1);
 19282:     if (!('0' <= c && c <= '1')) {  //数字が1つもない
 19283:       XEiJ.regRn[8] = a;  //a0
 19284:       XEiJ.regCCR = XEiJ.REG_CCR_N | XEiJ.REG_CCR_C;
 19285:       return;
 19286:     }
 19287:     int x = c - '0';  //値
 19288:     for (c = mmuReadByteZeroData (++a, 1); '0' <= c && c <= '1'; c = mmuReadByteZeroData (++a, 1)) {
 19289:       if (x < 0) {  //オーバーフロー
 19290:         XEiJ.regRn[8] = a;  //a0
 19291:         XEiJ.regCCR = XEiJ.REG_CCR_V | XEiJ.REG_CCR_C;
 19292:         return;
 19293:       }
 19294:       x = x << 1 | c & 1;
 19295:     }
 19296:     XEiJ.regRn[0] = x;  //d0
 19297:     XEiJ.regRn[8] = a;  //a0
 19298:     XEiJ.regCCR = 0;
 19299:   }  //fpkSTOB()
 19300: 
 19301:   //fpkBTOS ()
 19302:   //  $FE17  __BTOS
 19303:   //  32bit符号なし整数を2進数の文字列に変換する
 19304:   //  /^1[01]*$/
 19305:   //  <d0.l:32bit符号なし整数
 19306:   //  <a0.l:文字列バッファの先頭
 19307:   //  >a0.l:2進数の文字列の直後('\0'の位置)
 19308:   public static void fpkBTOS () throws M68kException {
 19309:     int x = XEiJ.regRn[0];  //d0
 19310:     int a = XEiJ.regRn[8] += Math.max (1, 32 - Integer.numberOfLeadingZeros (x));  //a0
 19311:     mmuWriteByteData (a, 0, 1);
 19312:     do {
 19313:       mmuWriteByteData (--a, '0' | x & 1, 1);
 19314:     } while ((x >>>= 1) != 0);
 19315:   }  //fpkBTOS()
 19316: 
 19317:   //fpkIUSING ()
 19318:   //  $FE18  __IUSING
 19319:   //  32bit符号あり整数を文字数を指定して右詰めで10進数の文字列に変換する
 19320:   //  /^ *-?[1-9][0-9]*$/
 19321:   //  <d0.l:32bit符号あり整数
 19322:   //  <d1.b:文字数
 19323:   //  <a0.l:文字列バッファの先頭
 19324:   //  >a0.l:10進数の文字列の直後('\0'の位置)
 19325:   public static void fpkIUSING () throws M68kException {
 19326:     int x = XEiJ.regRn[0];  //d0
 19327:     int n = 0;  //符号の文字数
 19328:     if (x < 0) {  //負
 19329:       n = 1;
 19330:       x = -x;
 19331:     }
 19332:     long t = XEiJ.fmtBcd12 (0xffffffffL & x);  //符号は取り除いてあるがx=0x80000000の場合があるので(long)xは不可
 19333:     int l = n + Math.max (1, 67 - Long.numberOfLeadingZeros (t) >> 2);  //符号を含めた文字数
 19334:     int a = XEiJ.regRn[8];  //a0
 19335:     for (int i = (XEiJ.regRn[1] & 255) - l; i > 0; i--) {
 19336:       mmuWriteByteData (a++, ' ', 1);
 19337:     }
 19338:     XEiJ.regRn[8] = a += l;  //a0
 19339:     mmuWriteByteData (a, 0, 1);
 19340:     do {
 19341:       mmuWriteByteData (--a, '0' | (int) t & 15, 1);
 19342:     } while ((t >>>= 4) != 0L);
 19343:     if (n != 0) {
 19344:       mmuWriteByteData (--a, '-', 1);
 19345:     }
 19346:   }  //fpkIUSING()
 19347: 
 19348:   //fpkVAL ()
 19349:   //  $FE20  __VAL
 19350:   //  文字列を64bit浮動小数点数に変換する
 19351:   //  先頭の'\t'と' 'を読み飛ばす
 19352:   //  "&B"または"&b"で始まっているときは続きを2進数とみなして__STOBで32bit符号なし整数に変換してから__LTODで64bit浮動小数点数に変換する
 19353:   //  "&O"または"&o"で始まっているときは続きを8進数とみなして__STOOで32bit符号なし整数に変換してから__LTODで64bit浮動小数点数に変換する
 19354:   //  "&H"または"&h"で始まっているときは続きを16進数とみなして__STOHで32bit符号なし整数に変換してから__LTODで64bit浮動小数点数に変換する
 19355:   //  それ以外は__STODと同じ
 19356:   //  <a0.l:文字列の先頭
 19357:   //  >d0d1.d:64bit浮動小数点数
 19358:   //  >d2.l:(先頭が'&'でないとき)65535=64bit浮動小数点数をオーバーフローなしでintに変換できる,0=それ以外
 19359:   //  >d3.l:(先頭が'&'でないとき)d2.l==65535のとき64bit浮動小数点数をintに変換した値
 19360:   //  >a0.l:変換された文字列の直後('\0'とは限らない)
 19361:   //  >ccr:0=エラーなし,CCR_N|CCR_C=文法エラー,CCR_V|CCR_C=オーバーフロー
 19362:   public static void fpkVAL () throws M68kException {
 19363:     int a = XEiJ.regRn[8];  //a0
 19364:     //先頭の空白を読み飛ばす
 19365:     int c = mmuReadByteSignData (a++, 1);
 19366:     while (c == ' ' || c == '\t') {
 19367:       c = mmuReadByteSignData (a++, 1);
 19368:     }
 19369:     if (c == '&') {  //&B,&O,&H
 19370:       c = mmuReadByteSignData (a++, 1) & 0xdf;
 19371:       XEiJ.regRn[8] = a;  //&?の直後
 19372:       if (c == 'B') {
 19373:         fpkSTOB ();
 19374:         FEFunction.fpkLTOD ();
 19375:       } else if (c == 'O') {
 19376:         fpkSTOO ();
 19377:         FEFunction.fpkLTOD ();
 19378:       } else if (c == 'H') {
 19379:         fpkSTOH ();
 19380:         FEFunction.fpkLTOD ();
 19381:       } else {
 19382:         XEiJ.regCCR = XEiJ.REG_CCR_N | XEiJ.REG_CCR_C;  //文法エラー
 19383:       }
 19384:     } else {  //&B,&O,&H以外
 19385:       fpkSTOD ();
 19386:     }
 19387:   }  //fpkVAL()
 19388: 
 19389:   //fpkUSING ()
 19390:   //  $FE21  __USING
 19391:   //  64bit浮動小数点数をアトリビュートを指定して文字列に変換する
 19392:   //  メモ
 19393:   //    bit1の'\\'とbit4の'+'を両方指定したときは'\\'が右側。先頭に"+\\"を付ける
 19394:   //    bit1の'\\'とbit2の','とbit4の'+'は整数部の桁数が足りないとき数字を右にずらして押し込まれる
 19395:   //    bit3で指数形式を指示しなければ指数部が極端に大きくても極端に小さくても指数形式にならない
 19396:   //    bit3で指数形式を指定したときbit1の'\\'とbit2の','は無効
 19397:   //    bit4とbit5とbit6はbit4>bit5>bit6の順位で1つだけ有効
 19398:   //    有効数字は14桁で15桁目以降はすべて0
 19399:   //    FLOAT2.Xは整数部の0でない最初の数字から256文字目までで打ち切られてしまう
 19400:   //    整数部の桁数に余裕があれば左側の空白は出力されるので文字列の全体が常に256バイトに収まるわけではない
 19401:   //      using 1234.5 5 0 0    " 1235."
 19402:   //      using 1234.5 5 1 0    " 1234.5"
 19403:   //      using 1234.5 5 2 0    " 1234.50"
 19404:   //      using 1234.5 6 2 1    "**1234.50"
 19405:   //      using 1234.5 6 2 2    " \\1234.50"
 19406:   //      using 1234.5 6 2 3    "*\\1234.50"
 19407:   //      using 1234.5 6 2 4    " 1,234.50"
 19408:   //      using 1234.5 4 2 4    "1,234.50"
 19409:   //      using 1234.5 4 2 5    "1,234.50"
 19410:   //      using 1234.5 4 2 6    "\\1,234.50"
 19411:   //      using 1234.5 4 2 7    "\\1,234.50"
 19412:   //      using 1234.5 4 2 16   "+1234.50"
 19413:   //      using 1234.5 4 2 22   "+\\1,234.50"
 19414:   //      using 1234.5 4 2 32   "1234.50+"
 19415:   //      using 1234.5 4 2 48   "+1234.50"
 19416:   //      using 1234.5 4 2 64   "1234.50 "
 19417:   //      using 1234.5 4 2 80   "+1234.50"
 19418:   //      using 1234.5 4 2 96   "1234.50+"
 19419:   //      using 12345678901234567890 10 1 0      "12345678901235000000.0"
 19420:   //      using 12345678901234567890e+10 10 1 0  "123456789012350000000000000000.0"
 19421:   //      using 0.3333 0 0 0    "."
 19422:   //      using 0.6666 0 0 0    "1."
 19423:   //      using 0.6666 0 3 0    ".667"
 19424:   //      using 0.6666 3 0 0    "  1."
 19425:   //      using 0.3333 0 0 2    "\\."
 19426:   //      using 0.3333 0 0 16   "+."
 19427:   //      using 0.3333 0 0 18   "+\\."
 19428:   //      using 1e-10 3 3 0     "  0.000"
 19429:   //    指数形式の出力は不可解で本来の動作ではないように思えるが、
 19430:   //    X-BASICのprint using命令が使っているのでFLOAT2.Xに合わせておいた方がよさそう
 19431:   //      print using "###.##";1.23         "  1.23"         整数部の桁数は3
 19432:   //      print using "+##.##";1.23         " +1.23"         整数部の桁数は3←
 19433:   //      print using "###.##^^^^^";1.23    " 12.30E-001"    整数部の桁数は3
 19434:   //      print using "+##.##^^^^^";1.23    "+12.30E-001"    整数部の桁数は2←
 19435:   //    FLOAT2.Xでは#NANと#INFは4桁の整数のように出力される。末尾に小数点が付くが小数部には何も出力されない
 19436:   //      using -#INF 7 3 23     "*-\\#,INF."
 19437:   //    FLOAT2.Xで#NANと#INFを指数形式にするとさらに不可解。これはバグと言ってよいと思う
 19438:   //      using #INF 10 10 8      " #INFE-005"
 19439:   //    ここでは#NANと#INFは整数部と小数点と小数部と指数部の全体を使って右寄せにする
 19440:   //  <d0d1.d:64bit浮動小数点数
 19441:   //  <d2.l:整数部の桁数
 19442:   //  <d3.l:小数部の桁数
 19443:   //  <d4.l:アトリビュート
 19444:   //    bit0  左側を'*'で埋める
 19445:   //    bit1  先頭に'\\'を付ける
 19446:   //    bit2  整数部を3桁毎に','で区切る
 19447:   //    bit3  指数形式
 19448:   //    bit4  先頭に符号('+'または'-')を付ける
 19449:   //    bit5  末尾に符号('+'または'-')を付ける
 19450:   //    bit6  末尾に符号(' 'または'-')を付ける
 19451:   //  <a0.l:文字列バッファの先頭
 19452:   //  a0は変化しない
 19453:   public static void fpkUSING () throws M68kException {
 19454:     fpkUSINGSub ((long) XEiJ.regRn[0] << 32 | 0xffffffffL & XEiJ.regRn[1]);  //64bit浮動小数点数
 19455:   }  //fpkUSING()
 19456:   public static void fpkUSINGSub (long l) throws M68kException {
 19457:     int len1 = Math.max (0, XEiJ.regRn[2]);  //整数部の桁数
 19458:     int len2 = Math.max (0, XEiJ.regRn[3]);  //小数部の桁数
 19459:     int attr = XEiJ.regRn[4];  //アトリビュート
 19460:     int a = XEiJ.regRn[8];  //文字列バッファの先頭
 19461:     boolean exp = (attr & 8) != 0;  //true=指数形式
 19462:     int spc = (attr & 1) != 0 ? '*' : ' ';  //先頭の空白を充填する文字
 19463:     int yen = (attr & 2) != 0 ? '\\' : 0;  //先頭の'\\'
 19464:     int cmm = !exp && (attr & 4) != 0 ? ',' : 0;  //3桁毎に入れる','
 19465:     //符号
 19466:     int sgn1 = 0;  //先頭の符号
 19467:     int sgn2 = 0;  //末尾の符号
 19468:     if (l < 0L) {  //負
 19469:       if ((attr & 32 + 64) == 0) {  //末尾に符号を付けない
 19470:         sgn1 = '-';  //先頭の符号
 19471:       } else {  //末尾に符号を付ける
 19472:         sgn2 = '-';  //末尾の符号
 19473:       }
 19474:       l &= 0x7fffffffffffffffL;  //符号bitを消しておく
 19475:     } else {  //正
 19476:       if ((attr & 16) != 0) {  //先頭に符号('+'または'-')を付ける
 19477:         sgn1 = '+';
 19478:       } else if ((attr & 16 + 32) == 32) {  //末尾に符号('+'または'-')を付ける
 19479:         sgn2 = '+';
 19480:       } else if ((attr & 16 + 32 + 64) == 64) {  //末尾に符号(' 'または'-')を付ける
 19481:         sgn2 = ' ';
 19482:       }
 19483:     }
 19484:     double x = Double.longBitsToDouble (l);  //絶対値
 19485:     int e = (int) (l >>> 52) - 1023;  //指数部。ゲタ0。符号bitは消してあるのでマスクは不要
 19486:     l &= 0x000fffffffffffffL;  //仮数部の小数部。正規化数のとき整数部の1が付いていないことに注意
 19487:     //±0,±Inf,NaN
 19488:     if (e == -1023) {  //±0,非正規化数
 19489:       if (l == 0L) {  //±0
 19490:         for (int i = len1 - ((sgn1 != 0 ? 1 : 0) +  //先頭の符号
 19491:                              (yen != 0 ? 1 : 0) +  //'\\'
 19492:                              1  //数字
 19493:                              ); 0 < i; i--) {
 19494:           mmuWriteByteData (a++, spc, 1);  //空白
 19495:         }
 19496:         if (sgn1 != 0) {
 19497:           mmuWriteByteData (a++, sgn1, 1);  //先頭の符号
 19498:         }
 19499:         if (yen != 0) {
 19500:           mmuWriteByteData (a++, yen, 1);  //'\\'
 19501:         }
 19502:         if (0 < len1) {
 19503:           mmuWriteByteData (a++, '0', 1);  //整数部
 19504:         }
 19505:         mmuWriteByteData (a++, '.', 1);  //小数点
 19506:         for (; 0 < len2; len2--) {
 19507:           mmuWriteByteData (a++, '0', 1);  //小数部
 19508:         }
 19509:         mmuWriteByteData (a, '\0', 1);
 19510:         return;
 19511:       }
 19512:       e -= Long.numberOfLeadingZeros (l) - 12;  //非正規化数の指数部を補正する
 19513:     } else if (e == 1024) {  //±Inf,NaN
 19514:       for (int i = len1 + 1 + len2 + (exp ? 5 : 0) -  //整数部と小数点と小数部と指数部の全体を使って右寄せにする
 19515:            ((sgn1 != 0 ? 1 : 0) +  //先頭の符号
 19516:             (yen != 0 ? 1 : 0) +  //'\\'
 19517:             4  //文字
 19518:             ); 0 < i; i--) {
 19519:         mmuWriteByteData (a++, spc, 1);  //空白
 19520:       }
 19521:       if (sgn1 != 0) {
 19522:         mmuWriteByteData (a++, sgn1, 1);  //先頭の符号
 19523:       }
 19524:       if (yen != 0) {
 19525:         mmuWriteByteData (a++, yen, 1);  //'\\'
 19526:       }
 19527:       mmuWriteByteData (a++, '#', 1);
 19528:       if (l == 0L) {  //±Inf
 19529:         mmuWriteByteData (a++, 'I', 1);
 19530:         mmuWriteByteData (a++, 'N', 1);
 19531:         mmuWriteByteData (a++, 'F', 1);
 19532:       } else {  //NaN
 19533:         mmuWriteByteData (a++, 'N', 1);
 19534:         mmuWriteByteData (a++, 'A', 1);
 19535:         mmuWriteByteData (a++, 'N', 1);
 19536:       }
 19537:       mmuWriteByteData (a, '\0', 1);
 19538:       return;
 19539:     }
 19540:     //10進数で表現したときの指数部を求める
 19541:     //  10^e<=x<10^(e+1)となるeを求める
 19542:     e = (int) Math.floor ((double) e * 0.30102999566398119521373889472);  //log10(2)
 19543:     //10^-eを掛けて1<=x<10にする
 19544:     //  非正規化数の最小値から正規化数の最大値まで処理できなければならない
 19545:     //  10^-eを計算してからまとめて掛ける方法はxが非正規化数のとき10^-eがオーバーフローしてしまうので不可
 19546:     //    doubleは非正規化数の逆数を表現できない
 19547:     if (0 < e) {  //10<=x
 19548:       x *= FEFunction.FPK_TEN_M16QR[e & 15];
 19549:       if (16 <= e) {
 19550:         x *= FEFunction.FPK_TEN_M16QR[16 + (e >> 4 & 15)];
 19551:         if (256 <= e) {
 19552:           x *= FEFunction.FPK_TEN_M16QR[33];  //FEFunction.FPK_TEN_M16QR[32 + (e >> 8)]
 19553:         }
 19554:       }
 19555:     } else if (e < 0) {  //x<1
 19556:       x *= FEFunction.FPK_TEN_P16QR[-e & 15];
 19557:       if (e <= -16) {
 19558:         x *= FEFunction.FPK_TEN_P16QR[16 + (-e >> 4 & 15)];
 19559:         if (e <= -256) {
 19560:           x *= FEFunction.FPK_TEN_P16QR[33];  //FEFunction.FPK_TEN_P16QR[32 + (-e >> 8)]
 19561:         }
 19562:       }
 19563:     }
 19564:     //整数部2桁、小数部16桁の10進数に変換する
 19565:     //  1<=x<10なのでw[1]が先頭になるはずだが誤差で前後にずれる可能性がある
 19566:     int[] w = new int[18];
 19567:     {
 19568:       int d = (int) x;
 19569:       int t = XEiJ.FMT_BCD4[d];
 19570:       w[0] = t >> 4;
 19571:       w[1] = t      & 15;
 19572:       for (int i = 2; i < 18; i += 4) {
 19573:         //xを10000倍して整数部dを引くことで小数部を残すが、このとき情報落ちが発生して誤差が蓄積する
 19574:         //Double-Doubleの乗算の要領で10000倍を正確に行い、誤差の蓄積を回避する
 19575:         //x = (x - (double) d) * 10000.0;
 19576:         double xh = x * 0x8000001p0;
 19577:         xh += x - xh;  //xの上半分
 19578:         x = (xh - (double) d) * 10000.0 + (x - xh) * 10000.0;
 19579:         d = (int) x;
 19580:         t = XEiJ.FMT_BCD4[d];
 19581:         w[i    ] = t >> 12;
 19582:         w[i + 1] = t >>  8 & 15;
 19583:         w[i + 2] = t >>  4 & 15;
 19584:         w[i + 3] = t       & 15;
 19585:       }
 19586:     }
 19587:     //先頭の位置を確認する
 19588:     //  w[h]が先頭(0でない最初の数字)の位置
 19589:     int h = w[0] != 0 ? 0 : w[1] != 0 ? 1 : 2;
 19590:     //14+1桁目を四捨五入する
 19591:     int o = h + 14;  //w[o]は四捨五入する桁の位置。w[]の範囲内
 19592:     if (5 <= w[o]) {
 19593:       int i = o;
 19594:       while (10 <= ++w[--i]) {
 19595:         w[i] = 0;
 19596:       }
 19597:       if (i < h) {  //先頭から繰り上がった。このとき新しい先頭は1でそれ以外はすべて0
 19598:         h--;  //先頭を左にずらす
 19599:         o--;  //末尾を左にずらす
 19600:       }
 19601:     }
 19602:     //先頭の位置に応じて指数部を更新する
 19603:     //  w[h]が整数部、w[h+1..13]が小数部。10^eの小数点はw[h]の右側。整数部の桁数はe+1桁
 19604:     e -= h - 1;
 19605:     //整数部の桁数を調節する
 19606:     int ee = !exp ? e : Math.max (0, sgn1 != 0 || sgn2 != 0 ? len1 : len1 - 1) - 1;  //整数部の桁数-1。整数部の桁数はee+1桁。指数部はe-ee
 19607:     //小数点以下len2+1桁目が先頭から14+1桁目よりも左側にあるときその桁で改めて四捨五入する
 19608:     //  あらかじめ14+1桁目で四捨五入しておかないと、
 19609:     //  1.5の5を四捨五入しなければならないときに誤差で1.499…になったまま4を四捨五入しようとして失敗することがある
 19610:     int s = h + ee + 1 + len2;  //w[s]は小数点以下len2+1桁目の位置。w.length<=sの場合があることに注意
 19611:     if (s < o) {
 19612:       o = s;  //w[o]は四捨五入する桁の位置。o<0の場合があることに注意
 19613:       if (0 <= o && 5 <= w[o]) {
 19614:         int i = o;
 19615:         while (10 <= ++w[--i]) {
 19616:           w[i] = 0;
 19617:         }
 19618:         if (i < h) {  //先頭から繰り上がった。このとき新しい先頭は1でそれ以外はすべて0
 19619:           h--;  //先頭を左にずらす
 19620:           if (!exp) {  //指数形式でないとき
 19621:             ee++;  //左に1桁伸ばす。全体の桁数が1桁増える
 19622:           } else {  //指数形式のとき
 19623:             e++;  //指数部を1増やす
 19624:             o--;  //末尾を左にずらす。全体の桁数は変わらない
 19625:           }
 19626:         }
 19627:       }
 19628:     }
 19629:     //文字列に変換する
 19630:     if (0 <= ee) {  //1<=x
 19631:       for (int i = len1 - ((sgn1 != 0 ? 1 : 0) +  //先頭の符号
 19632:                            (yen != 0 ? 1 : 0) +  //'\\'
 19633:                            (cmm != 0 ? ee / 3 : 0) +  //','
 19634:                            ee + 1  //数字
 19635:                            ); 0 < i; i--) {
 19636:         mmuWriteByteData (a++, spc, 1);  //空白
 19637:       }
 19638:       if (sgn1 != 0) {
 19639:         mmuWriteByteData (a++, sgn1, 1);  //先頭の符号
 19640:       }
 19641:       if (yen != 0) {
 19642:         mmuWriteByteData (a++, yen, 1);  //'\\'
 19643:       }
 19644:       for (int i = ee; 0 <= i; i--) {
 19645:         mmuWriteByteData (a++, h < o ? '0' + w[h] : '0', 1);  //整数部
 19646:         h++;
 19647:         if (cmm != 0 && 0 < i && i % 3 == 0) {
 19648:           mmuWriteByteData (a++, cmm, 1);  //','
 19649:         }
 19650:       }
 19651:       mmuWriteByteData (a++, '.', 1);  //小数点
 19652:       for (; 0 < len2; len2--) {
 19653:         mmuWriteByteData (a++, h < o ? '0' + w[h] : '0', 1);  //小数部
 19654:         h++;
 19655:       }
 19656:     } else {  //x<1
 19657:       for (int i = len1 - ((sgn1 != 0 ? 1 : 0) +  //先頭の符号
 19658:                            (yen != 0 ? 1 : 0) +  //'\\'
 19659:                            1  //数字
 19660:                            ); 0 < i; i--) {
 19661:         mmuWriteByteData (a++, spc, 1);  //空白
 19662:       }
 19663:       if (sgn1 != 0) {
 19664:         mmuWriteByteData (a++, sgn1, 1);  //先頭の符号
 19665:       }
 19666:       if (yen != 0) {
 19667:         mmuWriteByteData (a++, yen, 1);  //'\\'
 19668:       }
 19669:       if (0 < len1) {
 19670:         mmuWriteByteData (a++, '0', 1);  //整数部
 19671:       }
 19672:       mmuWriteByteData (a++, '.', 1);  //小数点
 19673:       for (int i = -1 - ee; 0 < len2 && 0 < i; len2--, i--) {
 19674:         mmuWriteByteData (a++, '0', 1);  //小数部の先頭の0の並び
 19675:       }
 19676:       for (; 0 < len2; len2--) {
 19677:         mmuWriteByteData (a++, h < o ? '0' + w[h] : '0', 1);  //小数部
 19678:         h++;
 19679:       }
 19680:     }
 19681:     if (exp) {
 19682:       e -= ee;
 19683:       mmuWriteByteData (a++, 'E', 1);  //指数部の始まり
 19684:       if (0 <= e) {
 19685:         mmuWriteByteData (a++, '+', 1);  //指数部の正符号。省略しない
 19686:       } else {
 19687:         mmuWriteByteData (a++, '-', 1);  //指数部の負符号
 19688:         e = -e;
 19689:       }
 19690:       e = XEiJ.FMT_BCD4[e];
 19691:       mmuWriteByteData (a++, '0' + (e >> 8     ), 1);  //指数部の100の位。0でも省略しない
 19692:       mmuWriteByteData (a++, '0' + (e >> 4 & 15), 1);  //指数部の10の位
 19693:       mmuWriteByteData (a++, '0' + (e      & 15), 1);  //指数部の1の位
 19694:     }
 19695:     if (sgn2 != 0) {
 19696:       mmuWriteByteData (a++, sgn2, 1);  //末尾の符号
 19697:     }
 19698:     mmuWriteByteData (a, '\0', 1);
 19699:   }  //fpkUSINGSub6(long)
 19700: 
 19701:   //fpkSTOD ()
 19702:   //  $FE22  __STOD
 19703:   //  文字列を64bit浮動小数点数に変換する
 19704:   //  先頭の'\t'と' 'を読み飛ばす
 19705:   //  "#INF"は無限大、"#NAN"は非数とみなす
 19706:   //  バグ
 19707:   //    FLOAT2.X 2.02/2.03は誤差が大きい
 19708:   //      "1.7976931348623E+308"=0x7fefffffffffffb0が0x7fefffffffffffb3になる
 19709:   //      "1.5707963267949"=0x3ff921fb54442d28が0x3ff921fb54442d26になる
 19710:   //      "4.9406564584125E-324"(非正規化数の最小値よりもわずかに大きい)がエラーになる
 19711:   //    FLOAT2.X 2.02/2.03は"-0"が+0になる
 19712:   //    FLOAT4.X 1.02は"-0"が+0になる(実機で確認済み)
 19713:   //    FLOAT2.X 2.02/2.03は"-#INF"が+Infになる
 19714:   //      print val("-#INF")で再現できる
 19715:   //      '-'を符号として解釈しておきながら結果の無限大に符号を付けるのを忘れている
 19716:   //    FLOAT2.X 2.02/2.03は".#INF"が+Infになる
 19717:   //      print val(".#INF")で再現できる
 19718:   //    FLOAT4.X 1.02は"#NAN","#INF","-#INF"を読み取ったときa0が文字列の直後ではなく最後の文字を指している
 19719:   //  <a0.l:文字列の先頭
 19720:   //  >d0d1.d:64bit浮動小数点数
 19721:   //  >d2.l:65535=64bit浮動小数点数をオーバーフローなしでintに変換できる,0=それ以外
 19722:   //  >d3.l:d2.l==65535のとき64bit浮動小数点数をintに変換した値
 19723:   //  >a0.l:変換された文字列の直後('\0'とは限らない)
 19724:   //  >ccr:0=エラーなし,CCR_N|CCR_C=文法エラー,CCR_V|CCR_C=オーバーフロー
 19725:   public static void fpkSTOD () throws M68kException {
 19726:     long l = Double.doubleToLongBits (fpkSTODSub ());
 19727:     if (FEFunction.FPK_FPCP_NAN && l == 0x7ff8000000000000L) {
 19728:       l = 0x7fffffffffffffffL;
 19729:     }
 19730:     XEiJ.regRn[0] = (int) (l >> 32);  //d0
 19731:     XEiJ.regRn[1] = (int) l;  //d1
 19732:   }  //fpkSTOD()
 19733:   public static double fpkSTODSub () throws M68kException {
 19734:     int a = XEiJ.regRn[8];  //a0
 19735:     //先頭の空白を読み飛ばす
 19736:     int c = mmuReadByteSignData (a, 1);
 19737:     while (c == ' ' || c == '\t') {
 19738:       c = mmuReadByteSignData (++a, 1);
 19739:     }
 19740:     //符号を読み取る
 19741:     double s = 1.0;  //仮数部の符号
 19742:     if (c == '+') {
 19743:       c = mmuReadByteSignData (++a, 1);
 19744:     } else if (c == '-') {
 19745:       s = -s;
 19746:       c = mmuReadByteSignData (++a, 1);
 19747:     }
 19748:     //#NANと#INFを処理する
 19749:     if (c == '#') {
 19750:       c = mmuReadByteSignData (a + 1, 1);
 19751:       if (c == 'N' || c == 'I') {  //小文字は不可
 19752:         c = c << 8 | mmuReadByteZeroData (a + 2, 1);
 19753:         if (c == ('N' << 8 | 'A') || c == ('I' << 8 | 'N')) {
 19754:           c = c << 8 | mmuReadByteZeroData (a + 3, 1);
 19755:           if (c == ('N' << 16 | 'A' << 8 | 'N') || c == ('I' << 16 | 'N' << 8 | 'F')) {
 19756:             XEiJ.regRn[2] = 0;  //d2
 19757:             XEiJ.regRn[3] = 0;  //d3
 19758:             XEiJ.regRn[8] = a + 4;  //a0。"#NAN"または"#INF"のときだけ直後まで進める。それ以外は'#'の位置で止める
 19759:             XEiJ.regCCR = 0;  //エラーなし。"#INF"はオーバーフローとみなされない
 19760:             return c == ('N' << 16 | 'A' << 8 | 'N') ? Double.NaN : s * Double.POSITIVE_INFINITY;
 19761:           }
 19762:         }
 19763:       }
 19764:       XEiJ.regRn[8] = a;  //a0。'#'の位置で止める
 19765:       XEiJ.regCCR = XEiJ.REG_CCR_N | XEiJ.REG_CCR_C;  //文法エラー
 19766:       return 0.0;
 19767:     }  //if c=='#'
 19768:     //仮数部を読み取る
 19769:     //  数字を1000個並べてからe-1000などと書いてあるとき途中でオーバーフローすると困るので、
 19770:     //  多すぎる数字の並びは先頭の有効数字だけ読み取って残りは桁数だけ数えて読み飛ばす
 19771:     long u = 0L;  //仮数部
 19772:     int n = 0;  //0以外の最初の数字から数えて何桁目か
 19773:     int e = 1;  //-小数部の桁数。1=整数部
 19774:     if (c == '.') {  //仮数部の先頭が小数点
 19775:       e = 0;  //小数部開始
 19776:       c = mmuReadByteSignData (++a, 1);
 19777:     }
 19778:     if (c < '0' || '9' < c) {  //仮数部に数字がない
 19779:       XEiJ.regRn[8] = a;  //a0
 19780:       XEiJ.regCCR = XEiJ.REG_CCR_N | XEiJ.REG_CCR_C;  //文法エラー
 19781:       return 0.0;
 19782:     }
 19783:     double x = 0.0;
 19784:     do {
 19785:       if (0 < n || '0' < c) {  //0以外
 19786:         n++;  //0以外の最初の数字から数えて何桁目か
 19787:       }
 19788:       if (e <= 0 && n <= 18) {  //小数部で18桁目まで
 19789:         e--;  //-小数部の桁数
 19790:       }
 19791:       if (0 < n && n <= 18) {  //1桁目から18桁目まで
 19792:         u = u * 10L + (long) (c - '0');
 19793:       }
 19794:       c = mmuReadByteSignData (++a, 1);
 19795:       if (0 < e && c == '.') {  //整数部で小数点が出てきた
 19796:         e = 0;  //小数部開始
 19797:         c = mmuReadByteSignData (++a, 1);
 19798:       }
 19799:     } while ('0' <= c && c <= '9');
 19800:     if (0 < e) {  //小数点が出てこなかった
 19801:       e = 18 < n ? n - 18 : 0;  //整数部を読み飛ばした桁数が(-小数部の桁数)
 19802:     }
 19803:     //  1<=u<10^18  整数なので誤差はない
 19804:     //  0<e   小数点がなくて整数部が19桁以上あって末尾を読み飛ばした
 19805:     //  e==0  小数点がなくて整数部が18桁以内で末尾を読み飛ばさなかった
 19806:     //        小数点があって小数点で終わっていた
 19807:     //  e<0   小数点があって小数部が1桁以上あった
 19808:     //指数部を読み取る
 19809:     if (c == 'E' || c == 'e') {
 19810:       c = mmuReadByteSignData (++a, 1);
 19811:       int t = 1;  //指数部の符号
 19812:       if (c == '+') {
 19813:         c = mmuReadByteSignData (++a, 1);
 19814:       } else if (c == '-') {
 19815:         t = -t;
 19816:         c = mmuReadByteSignData (++a, 1);
 19817:       }
 19818:       if (c < '0' || '9' < c) {  //指数部に数字がない
 19819:         XEiJ.regRn[8] = a;  //a0
 19820:         XEiJ.regCCR = XEiJ.REG_CCR_N | XEiJ.REG_CCR_C;  //文法エラー
 19821:         return 0.0;
 19822:       }
 19823:       while (c == '0') {  //先頭の0を読み飛ばす
 19824:         c = mmuReadByteSignData (++a, 1);
 19825:       }
 19826:       int p = 0;
 19827:       for (int j = 0; '0' <= c && c <= '9' && j < 9; j++) {  //0以外の数字が出てきてから最大で9桁目まで読み取る。Human68kの環境では数字を1GBも並べることはできないのでオーバーフローの判定には9桁あれば十分
 19828:         p = p * 10 + (c - '0');
 19829:         c = mmuReadByteSignData (++a, 1);
 19830:       }
 19831:       e += t * p;
 19832:     }
 19833:     //符号と仮数部と指数部を合わせる
 19834:     //  x=s*x*10^e
 19835:     //  1<=u<10^18なのでeが範囲を大きく外れている場合を先に除外する
 19836:     if (e < -350) {
 19837:       XEiJ.regRn[2] = 65535;  //d2。-1ではない
 19838:       XEiJ.regRn[3] = 0;  //d3
 19839:       XEiJ.regRn[8] = a;  //a0
 19840:       XEiJ.regCCR = 0;  //エラーなし。アンダーフローはエラーとみなされない
 19841:       return s < 0.0 ? -0.0 : 0.0;
 19842:     }
 19843:     if (350 < e) {
 19844:       XEiJ.regRn[2] = 0;  //d2
 19845:       XEiJ.regRn[3] = 0;  //d3
 19846:       XEiJ.regRn[8] = a;  //a0
 19847:       XEiJ.regCCR = XEiJ.REG_CCR_V | XEiJ.REG_CCR_C;  //オーバーフロー
 19848:       return s * Double.POSITIVE_INFINITY;
 19849:     }
 19850:     if (true) {
 19851:       QFP xx = new QFP (s < 0.0 ? -u : u);  //符号と仮数部
 19852:       if (0 < e) {
 19853:         xx.mul (QFP.QFP_TEN_P16QR[e & 15]);
 19854:         if (16 <= e) {
 19855:           xx.mul (QFP.QFP_TEN_P16QR[16 + (e >> 4 & 15)]);
 19856:           if (256 <= e) {
 19857:             xx.mul (QFP.QFP_TEN_P16QR[33]);
 19858:           }
 19859:         }
 19860:       } else if (e < 0) {
 19861:         xx.mul (QFP.QFP_TEN_M16QR[-e & 15]);
 19862:         if (e <= -16) {
 19863:           xx.mul (QFP.QFP_TEN_M16QR[16 + (-e >> 4 & 15)]);
 19864:           if (e <= -256) {
 19865:             xx.mul (QFP.QFP_TEN_M16QR[33]);
 19866:           }
 19867:         }
 19868:       }
 19869:       x = xx.getd ();
 19870:     } else {
 19871:       x = s * (double) u;  //符号と仮数部
 19872:       if (0 < e) {
 19873:         x *= FEFunction.FPK_TEN_P16QR[e & 15];
 19874:         if (16 <= e) {
 19875:           x *= FEFunction.FPK_TEN_P16QR[16 + (e >> 4 & 15)];
 19876:           if (256 <= e) {
 19877:             x *= FEFunction.FPK_TEN_P16QR[33];  //FEFunction.FPK_TEN_P16QR[32 + (e >> 8)]
 19878:           }
 19879:         }
 19880:       } else if (e < 0) {
 19881:         x /= FEFunction.FPK_TEN_P16QR[-e & 15];
 19882:         if (e <= -16) {
 19883:           x /= FEFunction.FPK_TEN_P16QR[16 + (-e >> 4 & 15)];
 19884:           if (e <= -256) {
 19885:             x /= FEFunction.FPK_TEN_P16QR[33];  //FEFunction.FPK_TEN_P16QR[32 + (-e >> 8)]
 19886:           }
 19887:         }
 19888:       }
 19889:     }
 19890:     if (Double.isInfinite (x)) {
 19891:       XEiJ.regRn[8] = a;  //a0
 19892:       XEiJ.regCCR = XEiJ.REG_CCR_V | XEiJ.REG_CCR_C;  //オーバーフロー
 19893:       return x;
 19894:     }
 19895:     //  アンダーフローで0になっている場合がある
 19896:     if (x == (double) ((int) x)) {  //intで表現できる。+0.0==-0.0==0なので±0.0を含む
 19897:       XEiJ.regRn[2] = 65535;  //d2。-1ではない
 19898:       XEiJ.regRn[3] = (int) x;  //d3
 19899:     } else {  //intで表現できない
 19900:       XEiJ.regRn[2] = 0;  //d2
 19901:       XEiJ.regRn[3] = 0;  //d3
 19902:     }
 19903:     XEiJ.regRn[8] = a;  //a0
 19904:     XEiJ.regCCR = 0;  //エラーなし
 19905:     return x;
 19906:   }  //fpkSTODSub()
 19907: 
 19908:   //fpkDTOS ()
 19909:   //  $FE23  __DTOS
 19910:   //  64bit浮動小数点数を文字列に変換する
 19911:   //  無限大は"#INF"、非数は"#NAN"になる
 19912:   //  指数形式の境目
 19913:   //    x<10^-4または10^14<=xのとき指数形式にする
 19914:   //    FLOAT2.X/FLOAT4.Xの場合
 19915:   //      3f2fffffffffff47  2.4414062499999E-004
 19916:   //      3f2fffffffffff48  0.000244140625
 19917:   //      42d6bcc41e8fffdf  99999999999999
 19918:   //      42d6bcc41e8fffe0  1E+014
 19919:   //  <d0d1.d:64bit浮動小数点数
 19920:   //  <a0.l:文字列バッファの先頭
 19921:   //  >a0.l:末尾の'\0'の位置
 19922:   public static void fpkDTOS () throws M68kException {
 19923:     fpkDTOSSub ((long) XEiJ.regRn[0] << 32 | 0xffffffffL & XEiJ.regRn[1]);  //64bit浮動小数点数
 19924:   }  //fpkDTOS()
 19925:   public static void fpkDTOSSub (long l) throws M68kException {
 19926:     final int len3 = 14;
 19927:     int a = XEiJ.regRn[8];  //文字列バッファの先頭
 19928:     //符号と指数部の処理
 19929:     //  ±0,±Inf,NaNはここで除外する
 19930:     if (l < 0L) {
 19931:       mmuWriteByteData (a++, '-', 1);  //負符号
 19932:       l &= 0x7fffffffffffffffL;  //符号bitを消しておく
 19933:     }
 19934:     double x = Double.longBitsToDouble (l);  //絶対値
 19935:     int e = (int) (l >>> 52) - 1023;  //指数部。ゲタ0。符号bitは消してあるのでマスクは不要
 19936:     l &= 0x000fffffffffffffL;  //仮数部の小数部。正規化数のとき整数部の1が付いていないことに注意
 19937:     if (e == -1023) {  //±0,非正規化数
 19938:       if (l == 0L) {  //±0
 19939:         mmuWriteByteData (a++, '0', 1);  //0
 19940:         mmuWriteByteData (a, '\0', 1);
 19941:         XEiJ.regRn[8] = a;  //末尾の'\0'の位置
 19942:         return;
 19943:       }
 19944:       e -= Long.numberOfLeadingZeros (l) - 12;  //非正規化数の指数部を補正する
 19945:     } else if (e == 1024) {  //±Inf,NaN
 19946:       mmuWriteByteData (a++, '#', 1);
 19947:       if (l == 0L) {  //±Inf
 19948:         mmuWriteByteData (a++, 'I', 1);
 19949:         mmuWriteByteData (a++, 'N', 1);
 19950:         mmuWriteByteData (a++, 'F', 1);
 19951:       } else {  //NaN
 19952:         mmuWriteByteData (a++, 'N', 1);
 19953:         mmuWriteByteData (a++, 'A', 1);
 19954:         mmuWriteByteData (a++, 'N', 1);
 19955:       }
 19956:       mmuWriteByteData (a, '\0', 1);
 19957:       XEiJ.regRn[8] = a;  //末尾の'\0'の位置
 19958:       return;
 19959:     }
 19960:     //10進数で表現したときの指数部を求める
 19961:     //  10^e<=x<10^(e+1)となるeを求める
 19962:     e = (int) Math.floor ((double) e * 0.30102999566398119521373889472);  //log10(2)
 19963:     //10^-eを掛けて1<=x<10にする
 19964:     //  非正規化数の最小値から正規化数の最大値まで処理できなければならない
 19965:     //  10^-eを計算してからまとめて掛ける方法はxが非正規化数のとき10^-eがオーバーフローしてしまうので不可
 19966:     //    doubleは非正規化数の逆数を表現できない
 19967:     if (0 < e) {  //10<=x
 19968:       x *= FEFunction.FPK_TEN_M16QR[e & 15];
 19969:       if (16 <= e) {
 19970:         x *= FEFunction.FPK_TEN_M16QR[16 + (e >> 4 & 15)];
 19971:         if (256 <= e) {
 19972:           x *= FEFunction.FPK_TEN_M16QR[33];  //FEFunction.FPK_TEN_M16QR[32 + (e >> 8)]
 19973:         }
 19974:       }
 19975:     } else if (e < 0) {  //x<1
 19976:       x *= FEFunction.FPK_TEN_P16QR[-e & 15];
 19977:       if (e <= -16) {
 19978:         x *= FEFunction.FPK_TEN_P16QR[16 + (-e >> 4 & 15)];
 19979:         if (e <= -256) {
 19980:           x *= FEFunction.FPK_TEN_P16QR[33];  //FEFunction.FPK_TEN_P16QR[32 + (-e >> 8)]
 19981:         }
 19982:       }
 19983:     }
 19984:     //整数部2桁、小数部16桁の10進数に変換する
 19985:     //  1<=x<10なのでw[1]が先頭になるはずだが誤差で前後にずれる可能性がある
 19986:     int[] w = new int[18];
 19987:     {
 19988:       int d = (int) x;
 19989:       int t = XEiJ.FMT_BCD4[d];
 19990:       w[0] = t >> 4;
 19991:       w[1] = t      & 15;
 19992:       for (int i = 2; i < 18; i += 4) {
 19993:         //xを10000倍して整数部dを引くことで小数部を残すが、このとき情報落ちが発生して誤差が蓄積する
 19994:         //Double-Doubleの乗算の要領で10000倍を正確に行い、誤差の蓄積を回避する
 19995:         //x = (x - (double) d) * 10000.0;
 19996:         double xh = x * 0x8000001p0;
 19997:         xh += x - xh;  //xの上半分
 19998:         x = (xh - (double) d) * 10000.0 + (x - xh) * 10000.0;
 19999:         d = (int) x;
 20000:         t = XEiJ.FMT_BCD4[d];
 20001:         w[i    ] = t >> 12;
 20002:         w[i + 1] = t >>  8 & 15;
 20003:         w[i + 2] = t >>  4 & 15;
 20004:         w[i + 3] = t       & 15;
 20005:       }
 20006:     }
 20007:     //先頭の位置を確認する
 20008:     //  w[h]が先頭(0でない最初の数字)の位置
 20009:     int h = w[0] != 0 ? 0 : w[1] != 0 ? 1 : 2;
 20010:     //14+1桁目を四捨五入する
 20011:     int o = h + 14;  //w[o]は四捨五入する桁の位置。w[]の範囲内
 20012:     if (5 <= w[o]) {
 20013:       int i = o;
 20014:       while (10 <= ++w[--i]) {
 20015:         w[i] = 0;
 20016:       }
 20017:       if (i < h) {  //先頭から繰り上がった。このとき新しい先頭は1でそれ以外はすべて0
 20018:         h--;  //先頭を左にずらす
 20019:         o--;  //末尾を左にずらす
 20020:       }
 20021:     }
 20022:     //先頭の位置に応じて指数部を更新する
 20023:     //  w[h]が整数部、w[h+1..o-1]が小数部。10^eの小数点はw[h]の右側。整数部の桁数はe+1桁
 20024:     e -= h - 1;
 20025:     //末尾の位置を確認する
 20026:     //  w[o-1]が末尾(0でない最後の数字)の位置
 20027:     while (w[o - 1] == 0) {  //全体は0ではないので必ず止まる。小数点よりも左側で止まる場合があることに注意
 20028:       o--;
 20029:     }
 20030:     //指数形式にするかどうか選択して文字列に変換する
 20031:     if (0 <= e && e < len3) {  //1<=x<10^len3。指数形式にしない
 20032:       do {
 20033:         mmuWriteByteData (a++, '0' + w[h++], 1);  //整数部。末尾の位置に関係なく1の位まで書く
 20034:       } while (0 <= --e);
 20035:       if (h < o) {  //小数部がある
 20036:         mmuWriteByteData (a++, '.', 1);  //小数部があるときだけ小数点を書く
 20037:         do {
 20038:           mmuWriteByteData (a++, '0' + w[h++], 1);  //小数部
 20039:         } while (h < o);
 20040:       }
 20041:     } else if (-4 <= e && e < 0) {  //10^-4<=x<1。指数形式にしない
 20042:       mmuWriteByteData (a++, '0', 1);  //整数部の0
 20043:       mmuWriteByteData (a++, '.', 1);  //小数点
 20044:       while (++e < 0) {
 20045:         mmuWriteByteData (a++, '0', 1);  //小数部の先頭の0の並び
 20046:       }
 20047:       do {
 20048:         mmuWriteByteData (a++, '0' + w[h++], 1);  //小数部
 20049:       } while (h < o);
 20050:     } else {  //x<10^-4または10^len3<=x。指数形式にする
 20051:       mmuWriteByteData (a++, '0' + w[h++], 1);  //整数部
 20052:       if (h < o) {  //小数部がある
 20053:         mmuWriteByteData (a++, '.', 1);  //小数部があるときだけ小数点を書く
 20054:         do {
 20055:           mmuWriteByteData (a++, '0' + w[h++], 1);  //小数部
 20056:         } while (h < o);
 20057:       }
 20058:       mmuWriteByteData (a++, 'E', 1);  //指数部の始まり
 20059:       if (0 <= e) {
 20060:         mmuWriteByteData (a++, '+', 1);  //指数部の正符号。省略しない
 20061:       } else {
 20062:         mmuWriteByteData (a++, '-', 1);  //指数部の負符号
 20063:         e = -e;
 20064:       }
 20065:       e = XEiJ.FMT_BCD4[e];
 20066:       mmuWriteByteData (a++, '0' + (e >> 8     ), 1);  //指数部の100の位。0でも省略しない
 20067:       mmuWriteByteData (a++, '0' + (e >> 4 & 15), 1);  //指数部の10の位
 20068:       mmuWriteByteData (a++, '0' + (e      & 15), 1);  //指数部の1の位
 20069:     }
 20070:     mmuWriteByteData (a, '\0', 1);
 20071:     XEiJ.regRn[8] = a;  //末尾の'\0'の位置
 20072:   }  //fpkDTOSSub6()
 20073: 
 20074:   //fpkECVT ()
 20075:   //  $FE24  __ECVT
 20076:   //  64bit浮動小数点数を全体の桁数を指定して文字列に変換する
 20077:   //  文字列に書くのは仮数部の数字のみ
 20078:   //  符号と小数点と指数部は文字列に書かず、小数点の位置と符号をレジスタに入れて返す
 20079:   //  桁数は255桁まで指定できるが、有効桁数は14桁まで
 20080:   //    有効桁数の次の桁で絶対値を四捨五入する
 20081:   //    15桁以上を指定しても14桁に丸められ、15桁目以降はすべて'0'になる
 20082:   //  無限大は"#INF"、非数は"#NAN"に変換する
 20083:   //    "#INF"と"#NAN"のとき小数点の位置は4になる
 20084:   //    "#INF"と"#NAN"で3桁以下のときは途中で打ち切る
 20085:   //    メモ
 20086:   //      FLOATn.Xは"#INF"と"#NAN"で1桁~3桁のとき文字列が"$","$0","$00"になってしまう
 20087:   //      文字数が少なすぎて"#INF"や"#NAN"が入り切らないのは仕方がないが、
 20088:   //      無意味な"$00"という文字列になるのは数字ではない文字列を四捨五入しようとするバグが原因
 20089:   //      例えば3桁のときは4桁目の'F'または'N'が'5'以上なので繰り上げて上の位をインクリメントする
 20090:   //      'N'+1='O'または'A'+1='B'が'9'よりも大きいので'0'を上書きして繰り上げて上の位をインクリメントする
 20091:   //      'I'+1='J'または'N'+1='O'も'9'よりも大きいので'0'を上書きして繰り上げて上の位をインクリメントする
 20092:   //      '#'+1='$'は'9'以下なので"$00"になる
 20093:   //      X-BASICでint i2,i3:print ecvt(val("#INF"),3,i2,i3)とすると再現できる
 20094:   //    "#INF"と"#NAN"で5桁以上のときは5桁目以降はすべて'\0'になる
 20095:   //    メモ
 20096:   //      FLOATn.Xは"#NAN"と"#INF"で15桁以上のとき5桁目から14桁目までは'\0'だが15桁目以降に'0'が書き込まれる
 20097:   //      通常は5桁目の'\0'で文字列は終了していると見なされるので実害はないが気持ち悪い
 20098:   //  メモ
 20099:   //    FLOAT2.X 2.02/2.03は0のとき小数点の位置が0になる
 20100:   //    FLOAT4.X 1.02は0のとき小数点の位置が1になる
 20101:   //    ここでは1にしている
 20102:   //  <d0d1.d:64bit浮動小数点数
 20103:   //  <d2.l:全体の桁数
 20104:   //  <a0.l:文字列バッファの先頭。末尾に'\0'を書き込むので桁数+1バイト必要
 20105:   //  >d0.l:先頭から小数点の位置までのオフセット
 20106:   //  >d1.l:符号(0=+,1=-)
 20107:   //  a0.lは変化しない
 20108:   public static void fpkECVT () throws M68kException {
 20109:     fpkECVTSub ((long) XEiJ.regRn[0] << 32 | 0xffffffffL & XEiJ.regRn[1]);  //64bit浮動小数点数
 20110:   }  //fpkECVT()
 20111:   public static void fpkECVTSub (long l) throws M68kException {
 20112:     int len3 = Math.max (0, XEiJ.regRn[2]);  //全体の桁数
 20113:     int a = XEiJ.regRn[8];  //文字列バッファの先頭
 20114:     int b = a + len3;  //文字列バッファの末尾+1。'\0'を書き込む位置
 20115:     //符号と指数部の処理
 20116:     //  ±0,±Inf,NaNはここで除外する
 20117:     if (0L <= l) {
 20118:       XEiJ.regRn[1] = 0;  //正符号
 20119:     } else {
 20120:       XEiJ.regRn[1] = 1;  //負符号
 20121:       l &= 0x7fffffffffffffffL;  //符号bitを消しておく
 20122:     }
 20123:     double x = Double.longBitsToDouble (l);  //絶対値
 20124:     int e = (int) (l >>> 52) - 1023;  //指数部。ゲタ0。符号bitは消してあるのでマスクは不要
 20125:     l &= 0x000fffffffffffffL;  //仮数部の小数部。正規化数のとき整数部の1が付いていないことに注意
 20126:     if (e == -1023) {  //±0,非正規化数
 20127:       if (l == 0L) {  //±0
 20128:         //指定された全体の桁数だけ'0'を並べる
 20129:         while (a < b) {
 20130:           mmuWriteByteData (a++, '0', 1);
 20131:         }
 20132:         mmuWriteByteData (a, '\0', 1);
 20133:         XEiJ.regRn[0] = 1;  //小数点の位置
 20134:         return;
 20135:       }
 20136:       e -= Long.numberOfLeadingZeros (l) - 12;  //非正規化数の指数部を補正する
 20137:     } else if (e == 1024) {  //±Inf,NaN
 20138:       for (int s = l != 0L ? '#' | 'N' << 8 | 'A' << 16 | 'N' << 24 : '#' | 'I' << 8 | 'N' << 16 | 'F' << 24; a < b && s != 0; s >>>= 8) {
 20139:         mmuWriteByteData (a++, s, 1);
 20140:       }
 20141:       while (a < b) {
 20142:         mmuWriteByteData (a++, '\0', 1);  //残りは'\0'
 20143:       }
 20144:       mmuWriteByteData (a, '\0', 1);
 20145:       XEiJ.regRn[0] = 4;  //小数点の位置
 20146:       return;
 20147:     }
 20148:     //10進数で表現したときの指数部を求める
 20149:     //  10^e<=x<10^(e+1)となるeを求める
 20150:     e = (int) Math.floor ((double) e * 0.30102999566398119521373889472);  //log10(2)
 20151:     //10^-eを掛けて1<=x<10にする
 20152:     //  非正規化数の最小値から正規化数の最大値まで処理できなければならない
 20153:     //  10^-eを計算してからまとめて掛ける方法はxが非正規化数のとき10^-eがオーバーフローしてしまうので不可
 20154:     //    doubleは非正規化数の逆数を表現できない
 20155:     if (0 < e) {  //10<=x
 20156:       x *= FEFunction.FPK_TEN_M16QR[e & 15];
 20157:       if (16 <= e) {
 20158:         x *= FEFunction.FPK_TEN_M16QR[16 + (e >> 4 & 15)];
 20159:         if (256 <= e) {
 20160:           x *= FEFunction.FPK_TEN_M16QR[33];  //FEFunction.FPK_TEN_M16QR[32 + (e >> 8)]
 20161:         }
 20162:       }
 20163:     } else if (e < 0) {  //x<1
 20164:       x *= FEFunction.FPK_TEN_P16QR[-e & 15];
 20165:       if (e <= -16) {
 20166:         x *= FEFunction.FPK_TEN_P16QR[16 + (-e >> 4 & 15)];
 20167:         if (e <= -256) {
 20168:           x *= FEFunction.FPK_TEN_P16QR[33];  //FEFunction.FPK_TEN_P16QR[32 + (-e >> 8)]
 20169:         }
 20170:       }
 20171:     }
 20172:     //整数部2桁、小数部16桁の10進数に変換する
 20173:     //  1<=x<10なのでw[1]が先頭になるはずだが誤差で前後にずれる可能性がある
 20174:     int[] w = new int[18];
 20175:     {
 20176:       int d = (int) x;
 20177:       int t = XEiJ.FMT_BCD4[d];
 20178:       w[0] = t >> 4;
 20179:       w[1] = t      & 15;
 20180:       for (int i = 2; i < 18; i += 4) {
 20181:         //xを10000倍して整数部dを引くことで小数部を残すが、このとき情報落ちが発生して誤差が蓄積する
 20182:         //Double-Doubleの乗算の要領で10000倍を正確に行い、誤差の蓄積を回避する
 20183:         //x = (x - (double) d) * 10000.0;
 20184:         double xh = x * 0x8000001p0;
 20185:         xh += x - xh;  //xの上半分
 20186:         x = (xh - (double) d) * 10000.0 + (x - xh) * 10000.0;
 20187:         d = (int) x;
 20188:         t = XEiJ.FMT_BCD4[d];
 20189:         w[i    ] = t >> 12;
 20190:         w[i + 1] = t >>  8 & 15;
 20191:         w[i + 2] = t >>  4 & 15;
 20192:         w[i + 3] = t       & 15;
 20193:       }
 20194:     }
 20195:     //先頭の位置を確認する
 20196:     //  w[h]が先頭(0でない最初の数字)の位置
 20197:     int h = w[0] != 0 ? 0 : w[1] != 0 ? 1 : 2;
 20198:     //14+1桁目を四捨五入する
 20199:     int o = h + 14;  //w[o]は四捨五入する桁の位置。w[]の範囲内
 20200:     if (5 <= w[o]) {
 20201:       int i = o;
 20202:       while (10 <= ++w[--i]) {
 20203:         w[i] = 0;
 20204:       }
 20205:       if (i < h) {  //先頭から繰り上がった。このとき新しい先頭は1でそれ以外はすべて0
 20206:         h--;  //先頭を左にずらす
 20207:         o--;  //末尾を左にずらす
 20208:       }
 20209:     }
 20210:     //先頭の位置に応じて指数部を更新する
 20211:     //  w[h]が整数部、w[h+1..o-1]が小数部。10^eの小数点はw[h]の右側。整数部の桁数はe+1桁
 20212:     e -= h - 1;
 20213:     //先頭からlen3+1桁目が先頭から14+1桁目よりも左側にあるときその桁で改めて四捨五入する
 20214:     //  あらかじめ14+1桁目で四捨五入しておかないと、
 20215:     //  1.5の5を四捨五入しなければならないときに誤差で1.499…になったまま4を四捨五入しようとして失敗することがある
 20216:     int s = h + len3;  //w[s]は先頭からlen3+1桁目の位置。w.length<=sの場合があることに注意
 20217:     if (s < o) {
 20218:       o = s;  //w[o]は四捨五入する桁の位置。o<0の場合があることに注意
 20219:       if (0 <= o && 5 <= w[o]) {
 20220:         int i = o;
 20221:         while (10 <= ++w[--i]) {
 20222:           w[i] = 0;
 20223:         }
 20224:         if (i < h) {  //先頭から繰り上がった。このとき新しい先頭は1でそれ以外はすべて0
 20225:           h--;  //先頭を左にずらす
 20226:           o--;  //末尾を左にずらす
 20227:           e++;  //指数部を1増やす
 20228:         }
 20229:       }
 20230:     }
 20231:     //文字列に変換する
 20232:     while (a < b && h < o) {
 20233:       mmuWriteByteData (a++, '0' + w[h++], 1);  //有効数字
 20234:     }
 20235:     while (a < b) {
 20236:       mmuWriteByteData (a++, '0', 1);  //残りは'0'
 20237:     }
 20238:     mmuWriteByteData (a, '\0', 1);
 20239:     XEiJ.regRn[0] = e + 1;  //小数点の位置
 20240:   }  //fpkECVTSub6()
 20241: 
 20242:   //fpkFCVT ()
 20243:   //  $FE25  __FCVT
 20244:   //  64bit浮動小数点数を小数点以下の桁数を指定して文字列に変換する
 20245:   //  メモ
 20246:   //    小数点の位置がpのとき[p]の左側に小数点がある
 20247:   //    全体の桁数が制限されないので指数部が大きいとき整数部が収まるサイズのバッファが必要
 20248:   //    0または1以上のとき
 20249:   //      整数部と小数点以下の指定された桁数までを小数部の0を省略せずに出力する
 20250:   //      整数部と小数点以下の指定された桁数が合わせて14桁を超えるときは15桁目が四捨五入されて15桁目以降は0になる
 20251:   //      小数点の位置は整数部の桁数に等しい
 20252:   //      print fcvt(0#,4,i2,i3),i2,i3
 20253:   //      0000     0       0
 20254:   //      print fcvt(2e+12/3#,4,i2,i3),i2,i3
 20255:   //      6666666666666700         12      0
 20256:   //                 ↑
 20257:   //    1未満のとき
 20258:   //      小数点以下の桁数の範囲内を先頭の0を省略して出力する
 20259:   //      小数点以下の桁数の範囲内がすべて0のときは""になる
 20260:   //      小数点の位置は指数部+1に等しい
 20261:   //      print fcvt(0.01,3,i2,i3),i2,i3                0.010
 20262:   //      10      -1       0                              <~~
 20263:   //      print fcvt(0.001,3,i2,i3),i2,i3               0.001
 20264:   //      1       -2       0                              <<~
 20265:   //      print fcvt(0.0001,3,i2,i3),i2,i3              0.0001
 20266:   //              -3       0                              <<<
 20267:   //      print fcvt(0.00001,3,i2,i3),i2,i3             0.00001
 20268:   //              -4       0                              <<<<
 20269:   //    #INFと#NAN
 20270:   //      小数点以下の桁数の指定に関係なく4文字出力して小数点の位置4を返す
 20271:   //      print fcvt(val("#INF"),2,i2,i3),i2,i3
 20272:   //      #INF     4       0
 20273:   //      print fcvt(val("#INF"),6,i2,i3),i2,i3
 20274:   //      #INF     4       0
 20275:   //  バグ
 20276:   //    FLOAT4.X 1.02は結果が整数部が大きいとき255文字で打ち切られる
 20277:   //    FLOAT4.X 1.02はFCVT(±0)の整数部が0桁ではなく1桁になる
 20278:   //  <d0d1.d:64bit浮動小数点数
 20279:   //  <d2.l:小数点以下の桁数
 20280:   //  <a0.l:文字列バッファの先頭
 20281:   //  >d0.l:先頭から小数点の位置までのオフセット
 20282:   //  >d1.l:符号(0=+,1=-)
 20283:   public static void fpkFCVT () throws M68kException {
 20284:     fpkFCVTSub ((long) XEiJ.regRn[0] << 32 | 0xffffffffL & XEiJ.regRn[1]);  //64bit浮動小数点数
 20285:   }  //fpkFCVT()
 20286:   public static void fpkFCVTSub (long l) throws M68kException {
 20287:     int len2 = Math.max (0, XEiJ.regRn[2]);  //小数部の桁数
 20288:     int a = XEiJ.regRn[8];  //文字列バッファの先頭
 20289:     //符号と指数部の処理
 20290:     //  ±0,±Inf,NaNはここで除外する
 20291:     if (0L <= l) {
 20292:       XEiJ.regRn[1] = 0;  //正符号
 20293:     } else {
 20294:       XEiJ.regRn[1] = 1;  //負符号
 20295:       l &= 0x7fffffffffffffffL;  //符号bitを消しておく
 20296:     }
 20297:     double x = Double.longBitsToDouble (l);  //絶対値
 20298:     int e = (int) (l >>> 52) - 1023;  //指数部。ゲタ0。符号bitは消してあるのでマスクは不要
 20299:     l &= 0x000fffffffffffffL;  //仮数部の小数部。正規化数のとき整数部の1が付いていないことに注意
 20300:     if (e == -1023) {  //±0,非正規化数
 20301:       if (l == 0L) {  //±0
 20302:         //指定された小数点以下の桁数だけ'0'を並べる
 20303:         while (len2-- > 0) {
 20304:           mmuWriteByteData (a++, '0', 1);
 20305:         }
 20306:         mmuWriteByteData (a, '\0', 1);
 20307:         XEiJ.regRn[0] = 0;  //小数点の位置
 20308:         return;
 20309:       }
 20310:       e -= Long.numberOfLeadingZeros (l) - 12;  //非正規化数の指数部を補正する
 20311:     } else if (e == 1024) {  //±Inf,NaN
 20312:       mmuWriteByteData (a++, '#', 1);
 20313:       if (l == 0L) {  //±Inf
 20314:         mmuWriteByteData (a++, 'I', 1);
 20315:         mmuWriteByteData (a++, 'N', 1);
 20316:         mmuWriteByteData (a++, 'F', 1);
 20317:       } else {  //NaN
 20318:         mmuWriteByteData (a++, 'N', 1);
 20319:         mmuWriteByteData (a++, 'A', 1);
 20320:         mmuWriteByteData (a++, 'N', 1);
 20321:       }
 20322:       mmuWriteByteData (a, '\0', 1);
 20323:       XEiJ.regRn[0] = 4;  //小数点の位置
 20324:       return;
 20325:     }
 20326:     //10進数で表現したときの指数部を求める
 20327:     //  10^e<=x<10^(e+1)となるeを求める
 20328:     e = (int) Math.floor ((double) e * 0.30102999566398119521373889472);  //log10(2)
 20329:     //10^-eを掛けて1<=x<10にする
 20330:     //  非正規化数の最小値から正規化数の最大値まで処理できなければならない
 20331:     //  10^-eを計算してからまとめて掛ける方法はxが非正規化数のとき10^-eがオーバーフローしてしまうので不可
 20332:     //    doubleは非正規化数の逆数を表現できない
 20333:     if (0 < e) {  //10<=x
 20334:       x *= FEFunction.FPK_TEN_M16QR[e & 15];
 20335:       if (16 <= e) {
 20336:         x *= FEFunction.FPK_TEN_M16QR[16 + (e >> 4 & 15)];
 20337:         if (256 <= e) {
 20338:           x *= FEFunction.FPK_TEN_M16QR[33];  //FEFunction.FPK_TEN_M16QR[32 + (e >> 8)]
 20339:         }
 20340:       }
 20341:     } else if (e < 0) {  //x<1
 20342:       x *= FEFunction.FPK_TEN_P16QR[-e & 15];
 20343:       if (e <= -16) {
 20344:         x *= FEFunction.FPK_TEN_P16QR[16 + (-e >> 4 & 15)];
 20345:         if (e <= -256) {
 20346:           x *= FEFunction.FPK_TEN_P16QR[33];  //FEFunction.FPK_TEN_P16QR[32 + (-e >> 8)]
 20347:         }
 20348:       }
 20349:     }
 20350:     //整数部2桁、小数部16桁の10進数に変換する
 20351:     //  1<=x<10なのでw[1]が先頭になるはずだが誤差で前後にずれる可能性がある
 20352:     int[] w = new int[18];
 20353:     {
 20354:       int d = (int) x;
 20355:       int t = XEiJ.FMT_BCD4[d];
 20356:       w[0] = t >> 4;
 20357:       w[1] = t      & 15;
 20358:       for (int i = 2; i < 18; i += 4) {
 20359:         //xを10000倍して整数部dを引くことで小数部を残すが、このとき情報落ちが発生して誤差が蓄積する
 20360:         //Double-Doubleの乗算の要領で10000倍を正確に行い、誤差の蓄積を回避する
 20361:         //x = (x - (double) d) * 10000.0;
 20362:         double xh = x * 0x8000001p0;
 20363:         xh += x - xh;  //xの上半分
 20364:         x = (xh - (double) d) * 10000.0 + (x - xh) * 10000.0;
 20365:         d = (int) x;
 20366:         t = XEiJ.FMT_BCD4[d];
 20367:         w[i    ] = t >> 12;
 20368:         w[i + 1] = t >>  8 & 15;
 20369:         w[i + 2] = t >>  4 & 15;
 20370:         w[i + 3] = t       & 15;
 20371:       }
 20372:     }
 20373:     //先頭の位置を確認する
 20374:     //  w[h]が先頭(0でない最初の数字)の位置
 20375:     int h = w[0] != 0 ? 0 : w[1] != 0 ? 1 : 2;
 20376:     //14+1桁目を四捨五入する
 20377:     int o = h + 14;  //w[o]は四捨五入する桁の位置。w[]の範囲内
 20378:     if (5 <= w[o]) {
 20379:       int i = o;
 20380:       while (10 <= ++w[--i]) {
 20381:         w[i] = 0;
 20382:       }
 20383:       if (i < h) {  //先頭から繰り上がった。このとき新しい先頭は1でそれ以外はすべて0
 20384:         h--;  //先頭を左にずらす
 20385:         o--;  //末尾を左にずらす
 20386:       }
 20387:     }
 20388:     //先頭の位置に応じて指数部を更新する
 20389:     //  w[h]が整数部、w[h+1..o-1]が小数部。10^eの小数点はw[h]の右側。整数部の桁数はe+1桁
 20390:     e -= h - 1;
 20391:     //小数点以下len2+1桁目が先頭から14+1桁目よりも左側にあるときその桁で改めて四捨五入する
 20392:     //  あらかじめ14+1桁目で四捨五入しておかないと、
 20393:     //  1.5の5を四捨五入しなければならないときに誤差で1.499…になったまま4を四捨五入しようとして失敗することがある
 20394:     int s = h + e + 1 + len2;  //w[s]は小数点以下len2+1桁目の位置。w.length<=sの場合があることに注意
 20395:     if (s < o) {
 20396:       o = s;  //w[o]は四捨五入する桁の位置。o<0の場合があることに注意
 20397:       if (0 <= o && 5 <= w[o]) {
 20398:         int i = o;
 20399:         while (10 <= ++w[--i]) {
 20400:           w[i] = 0;
 20401:         }
 20402:         if (i < h) {  //先頭から繰り上がった。このとき新しい先頭は1でそれ以外はすべて0
 20403:           h--;  //先頭を左にずらす
 20404:           o--;  //末尾を左にずらす
 20405:           e++;  //指数部を1増やす
 20406:         }
 20407:       }
 20408:     }
 20409:     //文字列に変換する
 20410:     while (h < o) {
 20411:       mmuWriteByteData (a++, '0' + w[h++], 1);  //有効数字
 20412:     }
 20413:     while (h++ < s) {
 20414:       mmuWriteByteData (a++, '0', 1);  //残りは'0'
 20415:     }
 20416:     mmuWriteByteData (a, '\0', 1);
 20417:     XEiJ.regRn[0] = e + 1;  //小数点の位置
 20418:   }  //fpkFCVTSub6()
 20419: 
 20420:   //fpkGCVT ()
 20421:   //  $FE26  __GCVT
 20422:   //  64bit浮動小数点数を全体の桁数を指定して文字列に変換する
 20423:   //  指定された桁数で表現できないときは指数表現になる
 20424:   //  メモ
 20425:   //    print gcvt(1e-1,10)
 20426:   //    0.1
 20427:   //    print gcvt(1e-8,10)
 20428:   //    0.00000001
 20429:   //    print gcvt(1.5e-8,10)
 20430:   //    1.5E-008
 20431:   //    print gcvt(1e-9,10)
 20432:   //    1.E-009                 小数点はあるが小数部がない
 20433:   //    print gcvt(2e-1/3#,10)
 20434:   //    6.666666667E-002
 20435:   //    print gcvt(2e+0/3#,10)
 20436:   //    0.6666666667
 20437:   //    print gcvt(2e+1/3#,10)
 20438:   //    6.666666667
 20439:   //    print gcvt(2e+9/3#,10)
 20440:   //    666666666.7
 20441:   //    print gcvt(2e+10/3#,10)
 20442:   //    6666666667
 20443:   //    print gcvt(2e+11/3#,10)
 20444:   //    6.666666667E+010
 20445:   //    print gcvt(0#,4)
 20446:   //    0.
 20447:   //    print gcvt(val("#INF"),4)
 20448:   //    #INF
 20449:   //    print gcvt(val("#INF"),3)
 20450:   //    $.E+003
 20451:   //    print gcvt(val("#INF"),2)
 20452:   //    $.E+003
 20453:   //    print gcvt(val("#INF"),1)
 20454:   //    $.E+003
 20455:   //    FLOAT2.XのGCVTは小数部がなくても桁数の範囲内であれば小数点を書く
 20456:   //    桁数ちょうどのときは小数点も指数部も付かないので、整数でないことを明確にするために小数点を書いているとも言い難い
 20457:   //    ここでは#NANと#INF以外は小数部がなくても小数点を書くことにする
 20458:   //  バグ
 20459:   //    FLOAT2.X 2.02/2.03は#NANと#INFにも小数点を付ける
 20460:   //    FLOAT2.X 2.02/2.03は#NANと#INFのとき桁数が足りないと指数形式にしようとして文字列が壊れる
 20461:   //    FLOAT4.X 1.02は#NANと#INFにも小数点を付ける
 20462:   //    FLOAT4.X 1.02は桁数の少ない整数には小数点を付けて桁数ちょうどの整数には小数点も指数部も付けない
 20463:   //  <d0d1.d:64bit浮動小数点数
 20464:   //  <d2.b:全体の桁数
 20465:   //  <a0.l:文字列バッファの先頭
 20466:   //  >a0.l:末尾の'\0'の位置
 20467:   public static void fpkGCVT () throws M68kException {
 20468:     fpkGCVTSub ((long) XEiJ.regRn[0] << 32 | 0xffffffffL & XEiJ.regRn[1]);  //64bit浮動小数点数
 20469:   }  //fpkGCVT()
 20470:   public static void fpkGCVTSub (long l) throws M68kException {
 20471:     int len3 = Math.max (0, XEiJ.regRn[2]);  //全体の桁数
 20472:     int a = XEiJ.regRn[8];  //文字列バッファの先頭
 20473:     //符号と指数部の処理
 20474:     //  ±0,±Inf,NaNはここで除外する
 20475:     if (l < 0L) {
 20476:       mmuWriteByteData (a++, '-', 1);  //負符号
 20477:       l &= 0x7fffffffffffffffL;  //符号bitを消しておく
 20478:     }
 20479:     double x = Double.longBitsToDouble (l);  //絶対値
 20480:     int e = (int) (l >>> 52) - 1023;  //指数部。ゲタ0。符号bitは消してあるのでマスクは不要
 20481:     l &= 0x000fffffffffffffL;  //仮数部の小数部。正規化数のとき整数部の1が付いていないことに注意
 20482:     if (e == -1023) {  //±0,非正規化数
 20483:       if (l == 0L) {  //±0
 20484:         mmuWriteByteData (a++, '0', 1);  //0
 20485:         mmuWriteByteData (a++, '.', 1);  //小数点
 20486:         mmuWriteByteData (a, '\0', 1);
 20487:         XEiJ.regRn[8] = a;  //末尾の'\0'の位置
 20488:         return;
 20489:       }
 20490:       e -= Long.numberOfLeadingZeros (l) - 12;  //非正規化数の指数部を補正する
 20491:     } else if (e == 1024) {  //±Inf,NaN
 20492:       mmuWriteByteData (a++, '#', 1);
 20493:       if (l == 0L) {  //±Inf
 20494:         mmuWriteByteData (a++, 'I', 1);
 20495:         mmuWriteByteData (a++, 'N', 1);
 20496:         mmuWriteByteData (a++, 'F', 1);
 20497:       } else {  //NaN
 20498:         mmuWriteByteData (a++, 'N', 1);
 20499:         mmuWriteByteData (a++, 'A', 1);
 20500:         mmuWriteByteData (a++, 'N', 1);
 20501:       }
 20502:       mmuWriteByteData (a, '\0', 1);
 20503:       XEiJ.regRn[8] = a;  //末尾の'\0'の位置
 20504:       return;
 20505:     }
 20506:     //10進数で表現したときの指数部を求める
 20507:     //  10^e<=x<10^(e+1)となるeを求める
 20508:     e = (int) Math.floor ((double) e * 0.30102999566398119521373889472);  //log10(2)
 20509:     //10^-eを掛けて1<=x<10にする
 20510:     //  非正規化数の最小値から正規化数の最大値まで処理できなければならない
 20511:     //  10^-eを計算してからまとめて掛ける方法はxが非正規化数のとき10^-eがオーバーフローしてしまうので不可
 20512:     //    doubleは非正規化数の逆数を表現できない
 20513:     if (0 < e) {  //10<=x
 20514:       x *= FEFunction.FPK_TEN_M16QR[e & 15];
 20515:       if (16 <= e) {
 20516:         x *= FEFunction.FPK_TEN_M16QR[16 + (e >> 4 & 15)];
 20517:         if (256 <= e) {
 20518:           x *= FEFunction.FPK_TEN_M16QR[33];  //FEFunction.FPK_TEN_M16QR[32 + (e >> 8)]
 20519:         }
 20520:       }
 20521:     } else if (e < 0) {  //x<1
 20522:       x *= FEFunction.FPK_TEN_P16QR[-e & 15];
 20523:       if (e <= -16) {
 20524:         x *= FEFunction.FPK_TEN_P16QR[16 + (-e >> 4 & 15)];
 20525:         if (e <= -256) {
 20526:           x *= FEFunction.FPK_TEN_P16QR[33];  //FEFunction.FPK_TEN_P16QR[32 + (-e >> 8)]
 20527:         }
 20528:       }
 20529:     }
 20530:     //整数部2桁、小数部16桁の10進数に変換する
 20531:     //  1<=x<10なのでw[1]が先頭になるはずだが誤差で前後にずれる可能性がある
 20532:     int[] w = new int[18];
 20533:     {
 20534:       int d = (int) x;
 20535:       int t = XEiJ.FMT_BCD4[d];
 20536:       w[0] = t >> 4;
 20537:       w[1] = t      & 15;
 20538:       for (int i = 2; i < 18; i += 4) {
 20539:         //xを10000倍して整数部dを引くことで小数部を残すが、このとき情報落ちが発生して誤差が蓄積する
 20540:         //Double-Doubleの乗算の要領で10000倍を正確に行い、誤差の蓄積を回避する
 20541:         //x = (x - (double) d) * 10000.0;
 20542:         double xh = x * 0x8000001p0;
 20543:         xh += x - xh;  //xの上半分
 20544:         x = (xh - (double) d) * 10000.0 + (x - xh) * 10000.0;
 20545:         d = (int) x;
 20546:         t = XEiJ.FMT_BCD4[d];
 20547:         w[i    ] = t >> 12;
 20548:         w[i + 1] = t >>  8 & 15;
 20549:         w[i + 2] = t >>  4 & 15;
 20550:         w[i + 3] = t       & 15;
 20551:       }
 20552:     }
 20553:     //先頭の位置を確認する
 20554:     //  w[h]が先頭(0でない最初の数字)の位置
 20555:     int h = w[0] != 0 ? 0 : w[1] != 0 ? 1 : 2;
 20556:     //14+1桁目を四捨五入する
 20557:     int o = h + 14;  //w[o]は四捨五入する桁の位置。w[]の範囲内
 20558:     if (5 <= w[o]) {
 20559:       int i = o;
 20560:       while (10 <= ++w[--i]) {
 20561:         w[i] = 0;
 20562:       }
 20563:       if (i < h) {  //先頭から繰り上がった。このとき新しい先頭は1でそれ以外はすべて0
 20564:         h--;  //先頭を左にずらす
 20565:         o--;  //末尾を左にずらす
 20566:       }
 20567:     }
 20568:     //先頭の位置に応じて指数部を更新する
 20569:     //  w[h]が整数部、w[h+1..o-1]が小数部。10^eの小数点はw[h]の右側。整数部の桁数はe+1桁
 20570:     e -= h - 1;
 20571:     //先頭からlen3+1桁目が先頭から14+1桁目よりも左側にあるときその桁で改めて四捨五入する
 20572:     //  あらかじめ14+1桁目で四捨五入しておかないと、
 20573:     //  1.5の5を四捨五入しなければならないときに誤差で1.499…になったまま4を四捨五入しようとして失敗することがある
 20574:     int s = h + len3;  //w[s]は先頭からlen3+1桁目の位置。w.length<=sの場合があることに注意
 20575:     if (s < o) {
 20576:       o = s;  //w[o]は四捨五入する桁の位置。o<0の場合があることに注意
 20577:       if (0 <= o && 5 <= w[o]) {
 20578:         int i = o;
 20579:         while (10 <= ++w[--i]) {
 20580:           w[i] = 0;
 20581:         }
 20582:         if (i < h) {  //先頭から繰り上がった。このとき新しい先頭は1でそれ以外はすべて0
 20583:           h--;  //先頭を左にずらす
 20584:           o--;  //末尾を左にずらす
 20585:           e++;  //指数部を1増やす
 20586:         }
 20587:       }
 20588:     }
 20589:     //末尾の位置を確認する
 20590:     //  w[o-1]が末尾(0でない最後の数字)の位置
 20591:     while (w[o - 1] == 0) {  //全体は0ではないので必ず止まる。小数点よりも左側で止まる場合があることに注意
 20592:       o--;
 20593:     }
 20594:     //指数形式にするかどうか選択して文字列に変換する
 20595:     if (0 <= e && e < len3) {  //1<=x<10^len3。指数形式にしない
 20596:       do {
 20597:         mmuWriteByteData (a++, '0' + w[h++], 1);  //整数部。末尾の位置に関係なく1の位まで書く
 20598:       } while (0 <= --e);
 20599:       mmuWriteByteData (a++, '.', 1);  //小数部がなくても小数点を書く
 20600:       while (h < o) {
 20601:         mmuWriteByteData (a++, '0' + w[h++], 1);  //小数部
 20602:       }
 20603:     } else if (-4 <= e && e < 0) {  //10^-4<=x<1。指数形式にしない
 20604:       mmuWriteByteData (a++, '0', 1);  //整数部の0
 20605:       mmuWriteByteData (a++, '.', 1);  //小数点
 20606:       while (++e < 0) {
 20607:         mmuWriteByteData (a++, '0', 1);  //小数部の先頭の0の並び
 20608:       }
 20609:       while (h < o) {
 20610:         mmuWriteByteData (a++, '0' + w[h++], 1);  //小数部
 20611:       }
 20612:     } else {  //x<10^-4または10^len3<=x。指数形式にする
 20613:       mmuWriteByteData (a++, '0' + w[h++], 1);  //整数部
 20614:       mmuWriteByteData (a++, '.', 1);  //小数部がなくても小数点を書く
 20615:       while (h < o) {
 20616:         mmuWriteByteData (a++, '0' + w[h++], 1);  //小数部
 20617:       }
 20618:       mmuWriteByteData (a++, 'E', 1);  //指数部の始まり
 20619:       if (0 <= e) {
 20620:         mmuWriteByteData (a++, '+', 1);  //指数部の正符号。省略しない
 20621:       } else {
 20622:         mmuWriteByteData (a++, '-', 1);  //指数部の負符号
 20623:         e = -e;
 20624:       }
 20625:       e = XEiJ.FMT_BCD4[e];
 20626:       mmuWriteByteData (a++, '0' + (e >> 8     ), 1);  //指数部の100の位。0でも省略しない
 20627:       mmuWriteByteData (a++, '0' + (e >> 4 & 15), 1);  //指数部の10の位
 20628:       mmuWriteByteData (a++, '0' + (e      & 15), 1);  //指数部の1の位
 20629:     }
 20630:     mmuWriteByteData (a, '\0', 1);
 20631:     XEiJ.regRn[8] = a;  //末尾の'\0'の位置
 20632:   }  //fpkGCVTSub6()
 20633: 
 20634:   //fpkFVAL ()
 20635:   //  $FE50  __FVAL
 20636:   //  文字列を32bit浮動小数点数に変換する
 20637:   //  __VALとほぼ同じ
 20638:   //  <a0.l:文字列の先頭
 20639:   //  >d0.s:32bit浮動小数点数
 20640:   //  >d2.l:(先頭が'&'でないとき)65535=32bit浮動小数点数をオーバーフローなしでintに変換できる,0=それ以外
 20641:   //  >d3.l:(先頭が'&'でないとき)d2.l==65535のとき32bit浮動小数点数をintに変換した値
 20642:   //  >a0.l:変換された文字列の直後('\0'とは限らない)
 20643:   //  >ccr:0=エラーなし,CCR_N|CCR_C=文法エラー,CCR_V|CCR_C=オーバーフロー
 20644:   public static void fpkFVAL () throws M68kException {
 20645:     int a = XEiJ.regRn[8];  //a0
 20646:     //先頭の空白を読み飛ばす
 20647:     int c = mmuReadByteSignData (a++, 1);
 20648:     while (c == ' ' || c == '\t') {
 20649:       c = mmuReadByteSignData (a++, 1);
 20650:     }
 20651:     if (c == '&') {  //&B,&O,&H
 20652:       c = mmuReadByteSignData (a++, 1) & 0xdf;
 20653:       XEiJ.regRn[8] = a;  //&?の直後
 20654:       if (c == 'B') {
 20655:         fpkSTOB ();
 20656:         FEFunction.fpkLTOF ();
 20657:       } else if (c == 'O') {
 20658:         fpkSTOO ();
 20659:         FEFunction.fpkLTOF ();
 20660:       } else if (c == 'H') {
 20661:         fpkSTOH ();
 20662:         FEFunction.fpkLTOF ();
 20663:       } else {
 20664:         XEiJ.regCCR = XEiJ.REG_CCR_N | XEiJ.REG_CCR_C;  //文法エラー
 20665:       }
 20666:     } else {  //&B,&O,&H以外
 20667:       FEFunction.fpkSTOF ();
 20668:     }
 20669:   }  //fpkFVAL()
 20670: 
 20671:   //fpkCLMUL ()
 20672:   //  $FEE0  __CLMUL
 20673:   //  32bit符号あり整数乗算
 20674:   //  <(a7).l:32bit符号あり整数。被乗数x
 20675:   //  <4(a7).l:32bit符号あり整数。乗数y
 20676:   //  >(a7).l:32bit符号あり整数。積x*y。オーバーフローのときは不定
 20677:   //  >ccr:cs=オーバーフロー。C以外は不定
 20678:   public static void fpkCLMUL () throws M68kException {
 20679:     int a7 = XEiJ.regRn[15];
 20680:     long l = (long) mmuReadLongData (a7, 1) * (long) mmuReadLongData (a7 + 4, 1);
 20681:     int h = (int) l;
 20682:     mmuWriteLongData (a7, h, 1);  //オーバーフローのときは積の下位32bit
 20683:     XEiJ.regCCR = (long) h == l ? 0 : XEiJ.REG_CCR_C;
 20684:   }  //fpkCLMUL()
 20685: 
 20686:   //fpkCLDIV ()
 20687:   //  $FEE1  __CLDIV
 20688:   //  32bit符号あり整数除算
 20689:   //  <(a7).l:32bit符号あり整数。被除数x
 20690:   //  <4(a7).l:32bit符号あり整数。除数y
 20691:   //  >(a7).l:32bit符号あり整数。商x/y。ゼロ除算のときは不定
 20692:   //  >ccr:cs=ゼロ除算。C以外は不定
 20693:   public static void fpkCLDIV () throws M68kException {
 20694:     int a7 = XEiJ.regRn[15];
 20695:     int h = mmuReadLongData (a7 + 4, 1);
 20696:     if (h == 0) {
 20697:       //(a7).lは変化しない
 20698:       XEiJ.regCCR = XEiJ.REG_CCR_C;
 20699:     } else {
 20700:       mmuWriteLongData (a7, mmuReadLongData (a7, 1) / h, 1);
 20701:       XEiJ.regCCR = 0;
 20702:     }
 20703:   }  //fpkCLDIV()
 20704: 
 20705:   //fpkCLMOD ()
 20706:   //  $FEE2  __CLMOD
 20707:   //  32bit符号あり整数剰余算
 20708:   //  <(a7).l:32bit符号あり整数。被除数x
 20709:   //  <4(a7).l:32bit符号あり整数。除数y
 20710:   //  >(a7).l:32bit符号あり整数。余りx%y。ゼロ除算のときは不定
 20711:   //  >ccr:cs=ゼロ除算。C以外は不定
 20712:   public static void fpkCLMOD () throws M68kException {
 20713:     int a7 = XEiJ.regRn[15];
 20714:     int h = mmuReadLongData (a7 + 4, 1);
 20715:     if (h == 0) {
 20716:       //(a7).lは変化しない
 20717:       XEiJ.regCCR = XEiJ.REG_CCR_C;
 20718:     } else {
 20719:       mmuWriteLongData (a7, mmuReadLongData (a7, 1) % h, 1);
 20720:       XEiJ.regCCR = 0;
 20721:     }
 20722:   }  //fpkCLMOD()
 20723: 
 20724:   //fpkCUMUL ()
 20725:   //  $FEE3  __CUMUL
 20726:   //  32bit符号なし整数乗算
 20727:   //  <(a7).l:32bit符号なし整数。被乗数x
 20728:   //  <4(a7).l:32bit符号なし整数。乗数y
 20729:   //  >(a7).l:32bit符号なし整数。積x*y。オーバーフローのときは不定
 20730:   //  >ccr:cs=オーバーフロー。C以外は不定
 20731:   public static void fpkCUMUL () throws M68kException {
 20732:     int a7 = XEiJ.regRn[15];
 20733:     long l = (0xffffffffL & mmuReadLongData (a7, 1)) * (0xffffffffL & mmuReadLongData (a7 + 4, 1));
 20734:     int h = (int) l;
 20735:     mmuWriteLongData (a7, h, 1);
 20736:     XEiJ.regCCR = (0xffffffffL & h) == l ? 0 : XEiJ.REG_CCR_C;
 20737:   }  //fpkCUMUL()
 20738: 
 20739:   //fpkCUDIV ()
 20740:   //  $FEE4  __CUDIV
 20741:   //  32bit符号なし整数除算
 20742:   //  <(a7).l:32bit符号なし整数。被除数x
 20743:   //  <4(a7).l:32bit符号なし整数。除数y
 20744:   //  >(a7).l:32bit符号なし整数。商x/y。ゼロ除算のときは不定
 20745:   //  >ccr:cs=ゼロ除算。C以外は不定
 20746:   public static void fpkCUDIV () throws M68kException {
 20747:     int a7 = XEiJ.regRn[15];
 20748:     int h = mmuReadLongData (a7 + 4, 1);
 20749:     if (h == 0) {
 20750:       //(a7).lは変化しない
 20751:       XEiJ.regCCR = XEiJ.REG_CCR_C;
 20752:     } else {
 20753:       mmuWriteLongData (a7, (int) ((0xffffffffL & mmuReadLongData (a7, 1)) / (0xffffffffL & h)), 1);
 20754:       XEiJ.regCCR = 0;
 20755:     }
 20756:   }  //fpkCUDIV()
 20757: 
 20758:   //fpkCUMOD ()
 20759:   //  $FEE5  __CUMOD
 20760:   //  32bit符号なし整数剰余算
 20761:   //  <(a7).l:32bit符号なし整数。被除数x
 20762:   //  <4(a7).l:32bit符号なし整数。除数y
 20763:   //  >(a7).l:32bit符号なし整数。余りx%y。ゼロ除算のときは不定
 20764:   //  >ccr:cs=ゼロ除算。C以外は不定
 20765:   public static void fpkCUMOD () throws M68kException {
 20766:     int a7 = XEiJ.regRn[15];
 20767:     int h = mmuReadLongData (a7 + 4, 1);
 20768:     if (h == 0) {
 20769:       //(a7).lは変化しない
 20770:       XEiJ.regCCR = XEiJ.REG_CCR_C;
 20771:     } else {
 20772:       mmuWriteLongData (a7, (int) ((0xffffffffL & mmuReadLongData (a7, 1)) % (0xffffffffL & h)), 1);
 20773:       XEiJ.regCCR = 0;
 20774:     }
 20775:   }  //fpkCUMOD()
 20776: 
 20777:   //fpkCLTOD ()
 20778:   //  $FEE6  __CLTOD
 20779:   //  32bit符号あり整数を64bit浮動小数点数に変換する
 20780:   //  <(a7).l:32bit符号あり整数。x
 20781:   //  >(a7).d:64bit浮動小数点数。(double)x
 20782:   public static void fpkCLTOD () throws M68kException {
 20783:     //int→double→[long]→[int,int]
 20784:     int a7 = XEiJ.regRn[15];
 20785:     long l = Double.doubleToLongBits ((double) mmuReadLongData (a7, 1));
 20786:     mmuWriteLongData (a7, (int) (l >>> 32), 1);
 20787:     mmuWriteLongData (a7 + 4, (int) l, 1);
 20788:   }  //fpkCLTOD()
 20789: 
 20790:   //fpkCDTOL ()
 20791:   //  $FEE7  __CDTOL
 20792:   //  64bit浮動小数点数を32bit符号あり整数に変換する
 20793:   //  <(a7).d:64bit浮動小数点数。x
 20794:   //  >(a7).l:32bit符号あり整数。(int)x
 20795:   //  >ccr:cs=オーバーフロー。C以外は不定
 20796:   public static void fpkCDTOL () throws M68kException {
 20797:     //[int,int]→[long]→double→int
 20798:     int a7 = XEiJ.regRn[15];
 20799:     double d = Double.longBitsToDouble ((long) mmuReadLongData (a7, 1) << 32 | 0xffffffffL & mmuReadLongData (a7 + 4, 1));
 20800:     mmuWriteLongData (a7, (int) d, 1);  //オーバーフローのときは最小値または最大値
 20801:     XEiJ.regCCR = (double) Integer.MIN_VALUE - 1.0 < d && d < (double) Integer.MAX_VALUE + 1.0 ? 0 : XEiJ.REG_CCR_C;  //NaN,±Infはエラー
 20802:   }  //fpkCDTOL()
 20803: 
 20804:   //fpkCLTOF ()
 20805:   //  $FEE8  __CLTOF
 20806:   //  32bit符号あり整数を32bit浮動小数点数に変換する
 20807:   //  <(a7).l:32bit符号あり整数。x
 20808:   //  >(a7).s:32bit浮動小数点数。(float)x
 20809:   public static void fpkCLTOF () throws M68kException {
 20810:     //int→float→[int]
 20811:     int a7 = XEiJ.regRn[15];
 20812:     mmuWriteLongData (a7, Float.floatToIntBits ((float) mmuReadLongData (a7, 1)), 1);
 20813:   }  //fpkCLTOF()
 20814: 
 20815:   //fpkCFTOL ()
 20816:   //  $FEE9  __CFTOL
 20817:   //  32bit浮動小数点数を32bit符号あり整数に変換する
 20818:   //  <(a7).s:32bit浮動小数点数。x
 20819:   //  >(a7).l:32bit符号あり整数。(int)x
 20820:   //  >ccr:cs=オーバーフロー。C以外は不定
 20821:   public static void fpkCFTOL () throws M68kException {
 20822:     //[int]→float→int
 20823:     int a7 = XEiJ.regRn[15];
 20824:     float f = Float.intBitsToFloat (mmuReadLongData (a7, 1));
 20825:     mmuWriteLongData (a7, (int) f, 1);
 20826:     XEiJ.regCCR = (float) Integer.MIN_VALUE - 1.0F < f && f < (float) Integer.MAX_VALUE + 1.0F ? 0 : XEiJ.REG_CCR_C;  //NaN,±Infはエラー
 20827:   }  //fpkCFTOL()
 20828: 
 20829:   //fpkCFTOD ()
 20830:   //  $FEEA  __CFTOD
 20831:   //  32bit浮動小数点数を64bit浮動小数点数に変換する
 20832:   //  <(a7).s:32bit浮動小数点数。x
 20833:   //  >(a7).d:64bit浮動小数点数。(double)x
 20834:   public static void fpkCFTOD () throws M68kException {
 20835:     //[int]→float→double→[long]→[int,int]
 20836:     int a7 = XEiJ.regRn[15];
 20837:     long l = Double.doubleToLongBits ((double) Float.intBitsToFloat (mmuReadLongData (a7, 1)));
 20838:     if (FEFunction.FPK_FPCP_NAN && l == 0x7ff8000000000000L) {
 20839:       l = 0x7fffffffffffffffL;
 20840:     }
 20841:     mmuWriteLongData (a7, (int) (l >>> 32), 1);
 20842:     mmuWriteLongData (a7 + 4, (int) l, 1);
 20843:   }  //fpkCFTOD()
 20844: 
 20845:   //fpkCDTOF ()
 20846:   //  $FEEB  __CDTOF
 20847:   //  64bit浮動小数点数を32bit浮動小数点数に変換する
 20848:   //  <(a7).d:64bit浮動小数点数。x
 20849:   //  >(a7).s:32bit浮動小数点数。(float)x
 20850:   //  >ccr:cs=オーバーフロー。C以外は不定
 20851:   public static void fpkCDTOF () throws M68kException {
 20852:     //[int,int]→[long]→double→float→[int]
 20853:     int a7 = XEiJ.regRn[15];
 20854:     double d = Double.longBitsToDouble ((long) mmuReadLongData (a7, 1) << 32 | 0xffffffffL & mmuReadLongData (a7 + 4, 1));
 20855:     int h = Float.floatToIntBits ((float) d);
 20856:     if (FEFunction.FPK_FPCP_NAN && h == 0x7fc00000) {
 20857:       h = 0x7fffffff;
 20858:     }
 20859:     mmuWriteLongData (a7, h, 1);
 20860:     XEiJ.regCCR = (Double.isNaN (d) || Double.isInfinite (d) ||
 20861:            Math.abs (d) < (double) Float.MAX_VALUE + 0.5 * (double) Math.ulp (Float.MAX_VALUE) ? 0 : XEiJ.REG_CCR_C);  //アンダーフローはエラーなし
 20862:   }  //fpkCDTOF()
 20863: 
 20864:   //fpkCDCMP ()
 20865:   //  $FEEC  __CDCMP
 20866:   //  64bit浮動小数点数の比較
 20867:   //  x<=>y
 20868:   //  <(a7).d:64bit浮動小数点数。x
 20869:   //  <8(a7).d:64bit浮動小数点数。y
 20870:   //  >ccr:lt=x<y,eq=x==y,gt=x>y
 20871:   public static void fpkCDCMP () throws M68kException {
 20872:     //([int,int]→[long]→double)<=>([int,int]→[long]→double)
 20873:     int a7 = XEiJ.regRn[15];
 20874:     double xd = Double.longBitsToDouble ((long) mmuReadLongData (a7, 1) << 32 | 0xffffffffL & mmuReadLongData (a7 + 4, 1));
 20875:     double yd = Double.longBitsToDouble ((long) mmuReadLongData (a7 + 8, 1) << 32 | 0xffffffffL & mmuReadLongData (a7 + 12, 1));
 20876:     XEiJ.regCCR = xd < yd ? XEiJ.REG_CCR_N | XEiJ.REG_CCR_C : xd == yd ? XEiJ.REG_CCR_Z : 0;  //どちらかがNaNのときは0
 20877:   }  //fpkCDCMP()
 20878: 
 20879:   //fpkCDADD ()
 20880:   //  $FEED  __CDADD
 20881:   //  64bit浮動小数点数の加算
 20882:   //  <(a7).d:64bit浮動小数点数。被加算数x
 20883:   //  <8(a7).d:64bit浮動小数点数。加算数y
 20884:   //  >(a7).d:64bit浮動小数点数。和x+y
 20885:   //  >ccr:0=エラーなし,CCR_C=アンダーフロー,CCR_V|CCR_C=オーバーフロー
 20886:   public static void fpkCDADD () throws M68kException {
 20887:     //([int,int]→[long]→double)+([int,int]→[long]→double)→[long]→[int,int]
 20888:     int a7 = XEiJ.regRn[15];
 20889:     double xd = Double.longBitsToDouble ((long) mmuReadLongData (a7, 1) << 32 | 0xffffffffL & mmuReadLongData (a7 + 4, 1));
 20890:     double yd = Double.longBitsToDouble ((long) mmuReadLongData (a7 + 8, 1) << 32 | 0xffffffffL & mmuReadLongData (a7 + 12, 1));
 20891:     double zd = xd + yd;
 20892:     long l = Double.doubleToLongBits (zd);
 20893:     if (FEFunction.FPK_FPCP_NAN && l == 0x7ff8000000000000L) {
 20894:       l = 0x7fffffffffffffffL;
 20895:     }
 20896:     mmuWriteLongData (a7, (int) (l >>> 32), 1);
 20897:     mmuWriteLongData (a7 + 4, (int) l, 1);
 20898:     XEiJ.regCCR = (Double.isNaN (xd) || Double.isNaN (yd) ? 0 :  //引数がNaN
 20899:            Double.isNaN (zd) ? XEiJ.REG_CCR_C :  //引数がNaNでないのに結果がNaNのときはエラー。(+Inf)+(-Inf)=NaN
 20900:            Double.isInfinite (xd) || Double.isInfinite (yd) ? 0 :  //引数が±Inf
 20901:            Double.isInfinite (zd) ? XEiJ.REG_CCR_V | XEiJ.REG_CCR_C :  //引数が±Infでないのに結果が±Infのときはオーバーフロー
 20902:            0);
 20903:   }  //fpkCDADD()
 20904: 
 20905:   //fpkCDSUB ()
 20906:   //  $FEEE  __CDSUB
 20907:   //  64bit浮動小数点数の減算
 20908:   //  <(a7).d:64bit浮動小数点数。被減算数x
 20909:   //  <8(a7).d:64bit浮動小数点数。減算数y
 20910:   //  >(a7).d:64bit浮動小数点数。差x-y
 20911:   //  >ccr:cs=エラー,vs=オーバーフロー
 20912:   public static void fpkCDSUB () throws M68kException {
 20913:     //([int,int]→[long]→double)-([int,int]→[long]→double)→[long]→[int,int]
 20914:     int a7 = XEiJ.regRn[15];
 20915:     double xd = Double.longBitsToDouble ((long) mmuReadLongData (a7, 1) << 32 | 0xffffffffL & mmuReadLongData (a7 + 4, 1));
 20916:     double yd = Double.longBitsToDouble ((long) mmuReadLongData (a7 + 8, 1) << 32 | 0xffffffffL & mmuReadLongData (a7 + 12, 1));
 20917:     double zd = xd - yd;
 20918:     long l = Double.doubleToLongBits (zd);
 20919:     if (FEFunction.FPK_FPCP_NAN && l == 0x7ff8000000000000L) {
 20920:       l = 0x7fffffffffffffffL;
 20921:     }
 20922:     mmuWriteLongData (a7, (int) (l >>> 32), 1);
 20923:     mmuWriteLongData (a7 + 4, (int) l, 1);
 20924:     XEiJ.regCCR = (Double.isNaN (xd) || Double.isNaN (yd) ? 0 :  //引数がNaN
 20925:            Double.isNaN (zd) ? XEiJ.REG_CCR_C :  //引数がNaNでないのに結果がNaNのときはエラー。(+Inf)-(+Inf)=NaN
 20926:            Double.isInfinite (xd) || Double.isInfinite (yd) ? 0 :  //引数が±Inf
 20927:            Double.isInfinite (zd) ? XEiJ.REG_CCR_V | XEiJ.REG_CCR_C :  //引数が±Infでないのに結果が±Infのときはオーバーフロー
 20928:            0);
 20929:   }  //fpkCDSUB()
 20930: 
 20931:   //fpkCDMUL ()
 20932:   //  $FEEF  __CDMUL
 20933:   //  64bit浮動小数点数の乗算
 20934:   //  <(a7).d:64bit浮動小数点数。被乗数x
 20935:   //  <8(a7).d:64bit浮動小数点数。乗数y
 20936:   //  >(a7).d:64bit浮動小数点数。積x*y
 20937:   //  >ccr:cs=エラー,vs=オーバーフロー
 20938:   public static void fpkCDMUL () throws M68kException {
 20939:     //([int,int]→[long]→double)*([int,int]→[long]→double)→[long]→[int,int]
 20940:     int a7 = XEiJ.regRn[15];
 20941:     double xd = Double.longBitsToDouble ((long) mmuReadLongData (a7, 1) << 32 | 0xffffffffL & mmuReadLongData (a7 + 4, 1));
 20942:     double yd = Double.longBitsToDouble ((long) mmuReadLongData (a7 + 8, 1) << 32 | 0xffffffffL & mmuReadLongData (a7 + 12, 1));
 20943:     double zd = xd * yd;
 20944:     long l = Double.doubleToLongBits (zd);
 20945:     if (FEFunction.FPK_FPCP_NAN && l == 0x7ff8000000000000L) {
 20946:       l = 0x7fffffffffffffffL;
 20947:     }
 20948:     mmuWriteLongData (a7, (int) (l >>> 32), 1);
 20949:     mmuWriteLongData (a7 + 4, (int) l, 1);
 20950:     XEiJ.regCCR = (Double.isNaN (xd) || Double.isNaN (yd) ? 0 :  //引数がNaN
 20951:            Double.isNaN (zd) ? XEiJ.REG_CCR_C :  //引数がNaNでないのに結果がNaNのときはエラー。(±0)*(±Inf)=NaN
 20952:            Double.isInfinite (xd) || Double.isInfinite (yd) ? 0 :  //引数が±Inf
 20953:            Double.isInfinite (zd) ? XEiJ.REG_CCR_V | XEiJ.REG_CCR_C :  //引数が±Infでないのに結果が±Infのときはオーバーフロー
 20954:            0);
 20955:   }  //fpkCDMUL()
 20956: 
 20957:   //fpkCDDIV ()
 20958:   //  $FEF0  __CDDIV
 20959:   //  64bit浮動小数点数の除算
 20960:   //  <(a7).d:64bit浮動小数点数。被除数x
 20961:   //  <8(a7).d:64bit浮動小数点数。除数y
 20962:   //  >(a7).d:64bit浮動小数点数。商x/y。ゼロ除算のときは不定
 20963:   //  >ccr:cs=エラー,eq=ゼロ除算,vs=オーバーフロー
 20964:   public static void fpkCDDIV () throws M68kException {
 20965:     //([int,int]→[long]→double)/([int,int]→[long]→double)→[long]→[int,int]
 20966:     int a7 = XEiJ.regRn[15];
 20967:     double xd = Double.longBitsToDouble ((long) mmuReadLongData (a7, 1) << 32 | 0xffffffffL & mmuReadLongData (a7 + 4, 1));
 20968:     double yd = Double.longBitsToDouble ((long) mmuReadLongData (a7 + 8, 1) << 32 | 0xffffffffL & mmuReadLongData (a7 + 12, 1));
 20969:     double zd = xd / yd;
 20970:     long l = Double.doubleToLongBits (zd);
 20971:     if (FEFunction.FPK_FPCP_NAN && l == 0x7ff8000000000000L) {
 20972:       l = 0x7fffffffffffffffL;
 20973:     }
 20974:     mmuWriteLongData (a7, (int) (l >>> 32), 1);
 20975:     mmuWriteLongData (a7 + 4, (int) l, 1);
 20976:     XEiJ.regCCR = (Double.isNaN (xd) || Double.isNaN (yd) ? 0 :  //引数がNaN
 20977:            Double.isNaN (zd) ? XEiJ.REG_CCR_C :  //引数がNaNでないのに結果がNaNのときはエラー。(±0)/(±0)=NaN
 20978:            Double.isInfinite (xd) || Double.isInfinite (yd) ? 0 :  //引数が±Inf。(±Inf)/(±0)=(±Inf)
 20979:            yd == 0.0 ? XEiJ.REG_CCR_Z | XEiJ.REG_CCR_C :  //除数が±0のときはゼロ除算
 20980:            Double.isInfinite (zd) ? XEiJ.REG_CCR_V | XEiJ.REG_CCR_C :  //引数が±Infでないのに結果が±Infのときはオーバーフロー
 20981:            0);
 20982:   }  //fpkCDDIV()
 20983: 
 20984:   //fpkCDMOD ()
 20985:   //  $FEF1  __CDMOD
 20986:   //  64bit浮動小数点数の剰余算
 20987:   //  <(a7).d:64bit浮動小数点数。被除数x
 20988:   //  <8(a7).d:64bit浮動小数点数。除数y
 20989:   //  >(a7).d:64bit浮動小数点数。余りx%y。ゼロ除算のときは不定
 20990:   //  >ccr:cs=エラー,eq=ゼロ除算
 20991:   public static void fpkCDMOD () throws M68kException {
 20992:     //([int,int]→[long]→double)%([int,int]→[long]→double)→[long]→[int,int]
 20993:     int a7 = XEiJ.regRn[15];
 20994:     double xd = Double.longBitsToDouble ((long) mmuReadLongData (a7, 1) << 32 | 0xffffffffL & mmuReadLongData (a7 + 4, 1));
 20995:     double yd = Double.longBitsToDouble ((long) mmuReadLongData (a7 + 8, 1) << 32 | 0xffffffffL & mmuReadLongData (a7 + 12, 1));
 20996:     double zd = xd % yd;
 20997:     long l = Double.doubleToLongBits (zd);
 20998:     if (FEFunction.FPK_FPCP_NAN && l == 0x7ff8000000000000L) {
 20999:       l = 0x7fffffffffffffffL;
 21000:     }
 21001:     mmuWriteLongData (a7, (int) (l >>> 32), 1);
 21002:     mmuWriteLongData (a7 + 4, (int) l, 1);
 21003:     XEiJ.regCCR = (Double.isNaN (xd) || Double.isNaN (yd) ? 0 :  //引数がNaN
 21004:            yd == 0.0 ? XEiJ.REG_CCR_Z | XEiJ.REG_CCR_C :  //除数が0のときはゼロ除算。(±Inf)%(±0)=NaN, x%(±0)=(±Inf)
 21005:            Double.isNaN (zd) ? XEiJ.REG_CCR_C :  //引数がNaNでないのに結果がNaNのときはエラー。(±Inf)%y=NaN
 21006:            Double.isInfinite (xd) || Double.isInfinite (yd) ? 0 :  //引数が±Inf
 21007:            Double.isInfinite (zd) ? XEiJ.REG_CCR_V | XEiJ.REG_CCR_C :  //引数が±Infでないのに結果が±Infのときはオーバーフロー
 21008:            0);
 21009:   }  //fpkCDMOD()
 21010: 
 21011:   //fpkCFCMP ()
 21012:   //  $FEF2  __CFCMP
 21013:   //  32bit浮動小数点数の比較
 21014:   //  x<=>y
 21015:   //  <(a7).s:32bit浮動小数点数。x
 21016:   //  <(a7).s:32bit浮動小数点数。y
 21017:   //  >ccr:lt=x<y,eq=x==y,gt=x>y
 21018:   public static void fpkCFCMP () throws M68kException {
 21019:     //([int]→float)<=>([int]→float)
 21020:     int a7 = XEiJ.regRn[15];
 21021:     float xf = Float.intBitsToFloat (mmuReadLongData (a7, 1));
 21022:     float yf = Float.intBitsToFloat (mmuReadLongData (a7 + 4, 1));
 21023:     XEiJ.regCCR = xf < yf ? XEiJ.REG_CCR_N | XEiJ.REG_CCR_C : xf == yf ? XEiJ.REG_CCR_Z : 0;  //どちらかがNaNのときは0
 21024:   }  //fpkCFCMP()
 21025: 
 21026:   //fpkCFADD ()
 21027:   //  $FEF3  __CFADD
 21028:   //  32bit浮動小数点数の加算
 21029:   //  <(a7).s:32bit浮動小数点数。被加算数x
 21030:   //  <4(a7).s:32bit浮動小数点数。加算数y
 21031:   //  >(a7).s:32bit浮動小数点数。和x+y
 21032:   //  >ccr:cs=エラー,vs=オーバーフロー
 21033:   public static void fpkCFADD () throws M68kException {
 21034:     //([int]→float)+([int]→float)→[int]
 21035:     int a7 = XEiJ.regRn[15];
 21036:     float xf = Float.intBitsToFloat (mmuReadLongData (a7, 1));
 21037:     float yf = Float.intBitsToFloat (mmuReadLongData (a7 + 4, 1));
 21038:     float zf = xf + yf;
 21039:     int h = Float.floatToIntBits (zf);
 21040:     if (FEFunction.FPK_FPCP_NAN && h == 0x7fc00000) {
 21041:       h = 0x7fffffff;
 21042:     }
 21043:     mmuWriteLongData (a7, h, 1);
 21044:     XEiJ.regCCR = (Float.isNaN (xf) || Float.isNaN (yf) ? 0 :  //引数がNaN
 21045:            Float.isNaN (zf) ? XEiJ.REG_CCR_C :  //引数がNaNでないのに結果がNaNのときはエラー。(+Inf)+(-Inf)=NaN
 21046:            Float.isInfinite (xf) || Float.isInfinite (yf) ? 0 :  //引数が±Inf
 21047:            Float.isInfinite (zf) ? XEiJ.REG_CCR_V | XEiJ.REG_CCR_C :  //引数が±Infでないのに結果が±Infのときはオーバーフロー
 21048:            0);
 21049:   }  //fpkCFADD()
 21050: 
 21051:   //fpkCFSUB ()
 21052:   //  $FEF4  __CFSUB
 21053:   //  32bit浮動小数点数の減算
 21054:   //  <(a7).s:32bit浮動小数点数。被減算数x
 21055:   //  <4(a7).s:32bit浮動小数点数。減算数y
 21056:   //  >(a7).s:32bit浮動小数点数。差x-y
 21057:   //  >ccr:cs=エラー,vs=オーバーフロー
 21058:   public static void fpkCFSUB () throws M68kException {
 21059:     //([int]→float)-([int]→float)→[int]
 21060:     int a7 = XEiJ.regRn[15];
 21061:     float xf = Float.intBitsToFloat (mmuReadLongData (a7, 1));
 21062:     float yf = Float.intBitsToFloat (mmuReadLongData (a7 + 4, 1));
 21063:     float zf = xf - yf;
 21064:     int h = Float.floatToIntBits (zf);
 21065:     if (FEFunction.FPK_FPCP_NAN && h == 0x7fc00000) {
 21066:       h = 0x7fffffff;
 21067:     }
 21068:     mmuWriteLongData (a7, h, 1);
 21069:     XEiJ.regCCR = (Float.isNaN (xf) || Float.isNaN (yf) ? 0 :  //引数がNaN
 21070:            Float.isNaN (zf) ? XEiJ.REG_CCR_C :  //引数がNaNでないのに結果がNaNのときはエラー。(+Inf)-(+Inf)=NaN
 21071:            Float.isInfinite (xf) || Float.isInfinite (yf) ? 0 :  //引数が±Inf
 21072:            Float.isInfinite (zf) ? XEiJ.REG_CCR_V | XEiJ.REG_CCR_C :  //引数が±Infでないのに結果が±Infのときはオーバーフロー
 21073:            0);
 21074:   }  //fpkCFSUB()
 21075: 
 21076:   //fpkCFMUL ()
 21077:   //  $FEF5  __CFMUL
 21078:   //  32bit浮動小数点数の乗算
 21079:   //  <(a7).s:32bit浮動小数点数。被乗数x
 21080:   //  <4(a7).s:32bit浮動小数点数。乗数y
 21081:   //  >(a7).s:32bit浮動小数点数。積x*y
 21082:   //  >ccr:0=エラーなし,CCR_C=アンダーフロー,CCR_V|CCR_C=オーバーフロー
 21083:   public static void fpkCFMUL () throws M68kException {
 21084:     //([int]→float)*([int]→float)→[int]
 21085:     int a7 = XEiJ.regRn[15];
 21086:     float xf = Float.intBitsToFloat (mmuReadLongData (a7, 1));
 21087:     float yf = Float.intBitsToFloat (mmuReadLongData (a7 + 4, 1));
 21088:     float zf = xf * yf;
 21089:     int h = Float.floatToIntBits (zf);
 21090:     if (FEFunction.FPK_FPCP_NAN && h == 0x7fc00000) {
 21091:       h = 0x7fffffff;
 21092:     }
 21093:     mmuWriteLongData (a7, h, 1);
 21094:     XEiJ.regCCR = (Float.isNaN (xf) || Float.isNaN (yf) ? 0 :  //引数がNaN
 21095:            Float.isNaN (zf) ? XEiJ.REG_CCR_C :  //引数がNaNでないのに結果がNaNのときはエラー。(±0)*(±Inf)=NaN
 21096:            Float.isInfinite (xf) || Float.isInfinite (yf) ? 0 :  //引数が±Inf
 21097:            Float.isInfinite (zf) ? XEiJ.REG_CCR_V | XEiJ.REG_CCR_C :  //引数が±Infでないのに結果が±Infのときはオーバーフロー
 21098:            0);
 21099:   }  //fpkCFMUL()
 21100: 
 21101:   //fpkCFDIV ()
 21102:   //  $FEF6  __CFDIV
 21103:   //  32bit浮動小数点数の除算
 21104:   //  <(a7).s:32bit浮動小数点数。被除数x
 21105:   //  <4(a7).s:32bit浮動小数点数。除数y
 21106:   //  >(a7).s:32bit浮動小数点数。商x/y。ゼロ除算のときは不定
 21107:   //  >ccr:cs=エラー,eq=ゼロ除算,vs=オーバーフロー
 21108:   public static void fpkCFDIV () throws M68kException {
 21109:     //([int]→float)/([int]→float)→[int]
 21110:     int a7 = XEiJ.regRn[15];
 21111:     float xf = Float.intBitsToFloat (mmuReadLongData (a7, 1));
 21112:     float yf = Float.intBitsToFloat (mmuReadLongData (a7 + 4, 1));
 21113:     float zf = xf / yf;
 21114:     int h = Float.floatToIntBits (zf);
 21115:     if (FEFunction.FPK_FPCP_NAN && h == 0x7fc00000) {
 21116:       h = 0x7fffffff;
 21117:     }
 21118:     mmuWriteLongData (a7, h, 1);
 21119:     XEiJ.regCCR = (Float.isNaN (xf) || Float.isNaN (yf) ? 0 :  //引数がNaN
 21120:            Float.isNaN (zf) ? XEiJ.REG_CCR_C :  //引数がNaNでないのに結果がNaNのときはエラー。(±0)/(±0)=NaN
 21121:            Float.isInfinite (xf) || Float.isInfinite (yf) ? 0 :  //引数が±Inf。(±Inf)/(±0)=(±Inf)
 21122:            yf == 0.0F ? XEiJ.REG_CCR_Z | XEiJ.REG_CCR_C :  //除数が±0のときはゼロ除算
 21123:            Float.isInfinite (zf) ? XEiJ.REG_CCR_V | XEiJ.REG_CCR_C :  //引数が±Infでないのに結果が±Infのときはオーバーフロー
 21124:            0);
 21125:   }  //fpkCFDIV()
 21126: 
 21127:   //fpkCFMOD ()
 21128:   //  $FEF7  __CFMOD
 21129:   //  32bit浮動小数点数の剰余算
 21130:   //  <(a7).s:32bit浮動小数点数。被除数x
 21131:   //  <4(a7).s:32bit浮動小数点数。除数y
 21132:   //  >(a7).s:32bit浮動小数点数。余りx%y。ゼロ除算のときは不定
 21133:   //  >ccr:cs=エラー,eq=ゼロ除算
 21134:   public static void fpkCFMOD () throws M68kException {
 21135:     //([int]→float)%([int]→float)→[int]
 21136:     int a7 = XEiJ.regRn[15];
 21137:     float xf = Float.intBitsToFloat (mmuReadLongData (a7, 1));
 21138:     float yf = Float.intBitsToFloat (mmuReadLongData (a7 + 4, 1));
 21139:     float zf = xf % yf;
 21140:     int h = Float.floatToIntBits (zf);
 21141:     if (FEFunction.FPK_FPCP_NAN && h == 0x7fc00000) {
 21142:       h = 0x7fffffff;
 21143:     }
 21144:     mmuWriteLongData (a7, h, 1);
 21145:     XEiJ.regCCR = (Float.isNaN (xf) || Float.isNaN (yf) ? 0 :  //引数がNaN
 21146:            yf == 0.0F ? XEiJ.REG_CCR_Z | XEiJ.REG_CCR_C :  //除数が0のときはゼロ除算。(±Inf)%(±0)=NaN, x%(±0)=(±Inf)
 21147:            Float.isNaN (zf) ? XEiJ.REG_CCR_C :  //引数がNaNでないのに結果がNaNのときはエラー。(±Inf)%y=NaN
 21148:            Float.isInfinite (xf) || Float.isInfinite (yf) ? 0 :  //引数が±Inf
 21149:            Float.isInfinite (zf) ? XEiJ.REG_CCR_V | XEiJ.REG_CCR_C :  //引数が±Infでないのに結果が±Infのときはオーバーフロー
 21150:            0);
 21151:   }  //fpkCFMOD()
 21152: 
 21153:   //fpkCDTST ()
 21154:   //  $FEF8  __CDTST
 21155:   //  64bit浮動小数点数と0の比較
 21156:   //  x<=>0
 21157:   //  <(a7).d:64bit浮動小数点数。x
 21158:   //  >ccr:lt=x<0,eq=x==0,gt=x>0
 21159:   public static void fpkCDTST () throws M68kException {
 21160:     if (true) {
 21161:       int a7 = XEiJ.regRn[15];
 21162:       long l = (long) mmuReadLongData (a7, 1) << 32 | 0xffffffffL & mmuReadLongData (a7 + 4, 1);
 21163:       XEiJ.regCCR = l << 1 == 0L ? XEiJ.REG_CCR_Z : 0L <= l ? 0 : XEiJ.REG_CCR_N;  //NaNのときは0
 21164:     } else {
 21165:       //[int,int]→[long]→double
 21166:       int a7 = XEiJ.regRn[15];
 21167:       double d = Double.longBitsToDouble ((long) mmuReadLongData (a7, 1) << 32 | 0xffffffffL & mmuReadLongData (a7 + 4, 1));
 21168:       XEiJ.regCCR = d < 0.0 ? XEiJ.REG_CCR_N : d == 0.0 ? XEiJ.REG_CCR_Z : 0;  //NaNのときは0
 21169:     }
 21170:   }  //fpkCDTST()
 21171: 
 21172:   //fpkCFTST ()
 21173:   //  $FEF9  __CFTST
 21174:   //  32bit浮動小数点数と0の比較
 21175:   //  x<=>0
 21176:   //  <(a7).s:32bit浮動小数点数。x
 21177:   //  >ccr:lt=x<0,eq=x==0,gt=x>0
 21178:   public static void fpkCFTST () throws M68kException {
 21179:     //[int]→float
 21180:     if (true) {
 21181:       int h = mmuReadLongData (XEiJ.regRn[15], 1);
 21182:       XEiJ.regCCR = h << 1 == 0 ? XEiJ.REG_CCR_Z : 0 <= h ? 0 : XEiJ.REG_CCR_N;  //NaNのときは0
 21183:     } else {
 21184:       //([int]→float)<=>0
 21185:       float f = Float.intBitsToFloat (mmuReadLongData (XEiJ.regRn[15], 1));
 21186:       XEiJ.regCCR = f < 0.0F ? XEiJ.REG_CCR_N : f == 0.0F ? XEiJ.REG_CCR_Z : 0;  //NaNのときは0
 21187:     }
 21188:   }  //fpkCFTST()
 21189: 
 21190:   //fpkCDINC ()
 21191:   //  $FEFA  __CDINC
 21192:   //  64bit浮動小数点数に1を加える
 21193:   //  <(a7).d:64bit浮動小数点数。x
 21194:   //  >(a7).d:64bit浮動小数点数。x+1
 21195:   public static void fpkCDINC () throws M68kException {
 21196:     //([int,int]→[long]→double)+1→[long]→[int,int]
 21197:     int a7 = XEiJ.regRn[15];
 21198:     double xd = Double.longBitsToDouble ((long) mmuReadLongData (a7, 1) << 32 | 0xffffffffL & mmuReadLongData (a7 + 4, 1));
 21199:     double zd = xd + 1.0;
 21200:     long l = Double.doubleToLongBits (zd);
 21201:     if (FEFunction.FPK_FPCP_NAN && l == 0x7ff8000000000000L) {
 21202:       l = 0x7fffffffffffffffL;
 21203:     }
 21204:     mmuWriteLongData (a7, (int) (l >>> 32), 1);
 21205:     mmuWriteLongData (a7 + 4, (int) l, 1);
 21206:     XEiJ.regCCR = Double.isInfinite (zd) && !Double.isInfinite (xd) ? XEiJ.REG_CCR_V | XEiJ.REG_CCR_C : 0;  //結果が±Infだが引数が±Infでないときはオーバーフロー
 21207:   }  //fpkCDINC()
 21208: 
 21209:   //fpkCFINC ()
 21210:   //  $FEFB  __CFINC
 21211:   //  32bit浮動小数点数に1を加える
 21212:   //  <(a7).s:32bit浮動小数点数。x
 21213:   //  >(a7).s:32bit浮動小数点数。x+1
 21214:   public static void fpkCFINC () throws M68kException {
 21215:     //([int]→float)+1→[int]
 21216:     int a7 = XEiJ.regRn[15];
 21217:     float xf = Float.intBitsToFloat (mmuReadLongData (a7, 1));
 21218:     float zf = xf + 1.0F;
 21219:     int h = Float.floatToIntBits (zf);
 21220:     if (FEFunction.FPK_FPCP_NAN && h == 0x7fc00000) {
 21221:       h = 0x7fffffff;
 21222:     }
 21223:     mmuWriteLongData (a7, h, 1);
 21224:     XEiJ.regCCR = Double.isInfinite (zf) && !Float.isInfinite (xf) ? XEiJ.REG_CCR_V | XEiJ.REG_CCR_C : 0;  //結果が±Infだが引数が±Infでないときはオーバーフロー
 21225:   }  //fpkCFINC()
 21226: 
 21227:   //fpkCDDEC ()
 21228:   //  $FEFC  __CDDEC
 21229:   //  64bit浮動小数点数から1を引く
 21230:   //  <(a7).d:64bit浮動小数点数。x
 21231:   //  >(a7).d:64bit浮動小数点数。x-1
 21232:   public static void fpkCDDEC () throws M68kException {
 21233:     //([int,int]→[long]→double)-1→[long]→[int,int]
 21234:     int a7 = XEiJ.regRn[15];
 21235:     double xd = Double.longBitsToDouble ((long) mmuReadLongData (a7, 1) << 32 | 0xffffffffL & mmuReadLongData (a7 + 4, 1));
 21236:     double zd = xd - 1.0;
 21237:     long l = Double.doubleToLongBits (zd);
 21238:     if (FEFunction.FPK_FPCP_NAN && l == 0x7ff8000000000000L) {
 21239:       l = 0x7fffffffffffffffL;
 21240:     }
 21241:     mmuWriteLongData (a7, (int) (l >>> 32), 1);
 21242:     mmuWriteLongData (a7 + 4, (int) l, 1);
 21243:     XEiJ.regCCR = Double.isInfinite (zd) && !Double.isInfinite (xd) ? XEiJ.REG_CCR_V | XEiJ.REG_CCR_C : 0;  //結果が±Infだが引数が±Infでないときはオーバーフロー
 21244:   }  //fpkCDDEC()
 21245: 
 21246:   //fpkCFDEC ()
 21247:   //  $FEFD  __CFDEC
 21248:   //  32bit浮動小数点数から1を引く
 21249:   //  <(a7).s:32bit浮動小数点数。x
 21250:   //  >(a7).s:32bit浮動小数点数。x-1
 21251:   public static void fpkCFDEC () throws M68kException {
 21252:     //([int]→float)-1→[int]
 21253:     int a7 = XEiJ.regRn[15];
 21254:     float xf = Float.intBitsToFloat (mmuReadLongData (a7, 1));
 21255:     float zf = xf - 1.0F;
 21256:     int h = Float.floatToIntBits (zf);
 21257:     if (FEFunction.FPK_FPCP_NAN && h == 0x7fc00000) {
 21258:       h = 0x7fffffff;
 21259:     }
 21260:     mmuWriteLongData (a7, h, 1);
 21261:     XEiJ.regCCR = Double.isInfinite (zf) && !Float.isInfinite (xf) ? XEiJ.REG_CCR_V | XEiJ.REG_CCR_C : 0;  //結果が±Infだが引数が±Infでないときはオーバーフロー
 21262:   }  //fpkCFDEC()
 21263: 
 21264: 
 21265: 
 21266:   //========================================================================================
 21267:   //$$MMU メモリ管理ユニット
 21268: 
 21269:   public static final boolean MMU_DEBUG_COMMAND = false;
 21270:   public static final boolean MMU_DEBUG_TRANSLATION = false;
 21271:   public static final boolean MMU_NOT_ALLOCATE_CACHE = false;  //true=アドレス変換キャッシュをアロケートしない
 21272: 
 21273:   //--------------------------------------------------------------------------------
 21274:   //論理アドレスと物理アドレス
 21275:   //
 21276:   //  ページサイズが4KBの場合
 21277:   //              ┌──  7 ──┬──  7 ──┬── 6──┬─────12─────┐
 21278:   //               31          2524          1817        1211                     0
 21279:   //              ┏━━━━━━┯━━━━━━┯━━━━━┯━━━━━━━━━━━┓
 21280:   //        論理  ┃   ルート   │  ポインタ  │  ページ  │        ページ        ┃
 21281:   //      アドレス┃インデックス│インデックス インデックス       オフセット      ┃
 21282:   //              ┗━━↓━━━┷━━↓━━━┷━━↓━━┷━━━━━↓━━━━━┛
 21283:   //          ┌────┘            │            └────┐      └──────┐
 21284:   //          │    ルートテーブル    │   ポインタテーブル   │    ページテーブル  │
 21285:   //        ┌┼→┏━━━━━━━┓┌┼→┏━━━━━━━┓┌┼→┏━━━━━━━┓│
 21286:   //        ││ 0┃              ┃││ 0┃              ┃││ 0┃              ┃│
 21287:   //        ││  ┃              ┃││  ┃              ┃│└→┠───────┨│
 21288:   //        │└→┠───────┨││  ┃              ┃│    ┃    ページ    ┃│
 21289:   //      ルート  ┃    ルート    ┃│└→┠───────┨│┌─←ディスクリプタ┃│
 21290:   //     ポインタ ┃ディスクリプタ→┘    ┃   ポインタ   ┃││  ┠───────┨│
 21291:   //              ┠───────┨      ┃ディスクリプタ→┘│63┃              ┃│
 21292:   //              ┃              ┃      ┠───────┨  │  ┗━━━━━━━┛│
 21293:   //           127┃              ┃   127┃              ┃  │                    │
 21294:   //              ┗━━━━━━━┛      ┗━━━━━━━┛  │                    │
 21295:   //                                  ┌───────────┘      ┌──────┘
 21296:   //              ┏━━━━━━━━━↓━━━━━━━━━┯━━━━━↓━━━━━┓
 21297:   //        物理  ┃              物理ページ              │        ページ        ┃
 21298:   //      アドレス┃               アドレス               │      オフセット      ┃
 21299:   //              ┗━━━━━━━━━━━━━━━━━━━┷━━━━━━━━━━━┛
 21300:   //               31                                    1211                     0
 21301:   //              └─────────20─────────┴─────12─────┘
 21302:   //
 21303:   //  ページサイズが8KBの場合
 21304:   //              ┌──  7 ──┬──  7 ──┬─  5 ─┬───── 13 ─────┐
 21305:   //               31          2524          1817      1312                       0
 21306:   //              ┏━━━━━━┯━━━━━━┯━━━━┯━━━━━━━━━━━━┓
 21307:   //        論理  ┃   ルート   │  ポインタ  │ ページ │         ページ         ┃
 21308:   //      アドレス┃インデックス│インデックスインデックス       オフセット       ┃
 21309:   //              ┗━━↓━━━┷━━↓━━━┷━━↓━┷━━━━━━↓━━━━━┛
 21310:   //          ┌────┘            │            └────┐      └──────┐
 21311:   //          │    ルートテーブル    │   ポインタテーブル   │    ページテーブル  │
 21312:   //        ┌┼→┏━━━━━━━┓┌┼→┏━━━━━━━┓┌┼→┏━━━━━━━┓│
 21313:   //        ││ 0┃              ┃││ 0┃              ┃││ 0┃              ┃│
 21314:   //        ││  ┃              ┃││  ┃              ┃│└→┠───────┨│
 21315:   //        │└→┠───────┨││  ┃              ┃│    ┃    ページ    ┃│
 21316:   //      ルート  ┃    ルート    ┃│└→┠───────┨│┌─←ディスクリプタ┃│
 21317:   //     ポインタ ┃ディスクリプタ→┘    ┃   ポインタ   ┃││  ┠───────┨│
 21318:   //              ┠───────┨      ┃ディスクリプタ→┘│31┃              ┃│
 21319:   //              ┃              ┃      ┠───────┨  │  ┗━━━━━━━┛│
 21320:   //           127┃              ┃   127┃              ┃  │                    │
 21321:   //              ┗━━━━━━━┛      ┗━━━━━━━┛  │                    │
 21322:   //                                  ┌───────────┘      ┌──────┘
 21323:   //              ┏━━━━━━━━━↓━━━━━━━━┯━━━━━━↓━━━━━┓
 21324:   //        物理  ┃             物理ページ             │         ページ         ┃
 21325:   //      アドレス┃              アドレス              │       オフセット       ┃
 21326:   //              ┗━━━━━━━━━━━━━━━━━━┷━━━━━━━━━━━━┛
 21327:   //               31                                  1312                       0
 21328:   //              └──────── 19 ────────┴───── 13 ─────┘
 21329:   //
 21330:   public static final int MMU_ROOT_INDEX_BIT0       = 25;
 21331:   public static final int MMU_POINTER_INDEX_BIT0    = 18;
 21332:   public static final int MMU_PAGE_INDEX_BIT0_4KB   = 12;
 21333:   public static final int MMU_PAGE_INDEX_BIT0_8KB   = 13;
 21334:   public static final int MMU_PAGE_SIZE_4KB         = 1 << MMU_PAGE_INDEX_BIT0_4KB;
 21335:   public static final int MMU_PAGE_SIZE_8KB         = 1 << MMU_PAGE_INDEX_BIT0_8KB;
 21336:   //                                                    33222222_22221111_111111
 21337:   //                                                    10987654_32109876_54321098_76543210
 21338:   public static final int MMU_ROOT_INDEX_MASK       = 0b11111110_00000000_00000000_00000000;
 21339:   public static final int MMU_POINTER_INDEX_MASK    = 0b00000001_11111100_00000000_00000000;
 21340:   public static final int MMU_PAGE_INDEX_MASK_4KB   = 0b00000000_00000011_11110000_00000000;
 21341:   public static final int MMU_PAGE_INDEX_MASK_8KB   = 0b00000000_00000011_11100000_00000000;
 21342:   public static final int MMU_PAGE_OFFSET_MASK_4KB  = 0b00000000_00000000_00001111_11111111;
 21343:   public static final int MMU_PAGE_OFFSET_MASK_8KB  = 0b00000000_00000000_00011111_11111111;
 21344:   public static final int MMU_PAGE_ADDRESS_MASK_4KB = 0b11111111_11111111_11110000_00000000;
 21345:   public static final int MMU_PAGE_ADDRESS_MASK_8KB = 0b11111111_11111111_11100000_00000000;
 21346: 
 21347:   //--------------------------------------------------------------------------------
 21348:   //透過変換レジスタ
 21349:   //
 21350:   //  DTT0  データ透過変換レジスタ0
 21351:   //  DTT1  データ透過変換レジスタ1
 21352:   //  ITT0  命令透過変換レジスタ0
 21353:   //  ITT1  命令透過変換レジスタ1
 21354:   //      31  30  29  28  27  26  25  24  23  22  21  20  19  18  17  16  15  14  13  12  11  10   9   8   7   6   5   4   3   2   1   0
 21355:   //    ┏━━━━━━━━━━━━━━━┯━━━━━━━━━━━━━━━┯━┯━┯━┯━━━━━┯━┯━┯━┯━━━┯━━━┯━┯━━━┓
 21356:   //    ┃      論理アドレスベース      │      論理アドレスマスク      │ E│IS│US│     0    │U1│U0│ 0│  CM  │   0  │ W│   0  ┃
 21357:   //    ┗━━━━━━━━━━━━━━━┷━━━━━━━━━━━━━━━┷━┷━┷━┷━━━━━┷━┷━┷━┷━━━┷━━━┷━┷━━━┛
 21358:   public static final int MMU_TTR_BASE            = 255 << 24;  //x  Logical Address Base
 21359:   public static final int MMU_TTR_MASK            = 255 << 16;  //x  Logical Address Mask
 21360:   public static final int MMU_TTR_ENABLE          =   1 << 15;  //x  E   Enable
 21361:   public static final int MMU_TTR_IGNORE_FC2      =   1 << 14;  //x  IS  Ignore FC2 when matching
 21362:   public static final int MMU_TTR_USER_SUPERVISOR =   1 << 13;  //x  US  User or Supervisor when IS=0
 21363:   public static final int MMU_TTR_US_USER         =   0 << 13;  //         Match only if FC2=0 (user mode access)
 21364:   public static final int MMU_TTR_US_SUPERVISOR   =   1 << 13;  //         Match only if FC2=1 (supervisor mode access)
 21365:   public static final int MMU_TTR_WRITE_PROTECT   =   1 <<  2;  //x  W   Write Protect
 21366:   public static int mmuDTT0;  //DTT0
 21367:   public static int mmuDTT1;  //DTT1
 21368:   public static int mmuITT0;  //ITT0
 21369:   public static int mmuITT1;  //ITT1
 21370:   //  透過変換マップ
 21371:   //    インデックス
 21372:   //      a >>> 24
 21373:   //    値
 21374:   //      -1  透過変換あり,ライトプロテクトあり → リードのときアドレス変換なし、ライトのときアクセスフォルト
 21375:   //       0  透過変換なし                      → アドレス変換あり
 21376:   //       1  透過変換あり,ライトプロテクトなし → アドレス変換なし
 21377:   public static int[] mmuUserDataTransparent;  //ユーザデータ透過変換マップ
 21378:   public static int[] mmuUserCodeTransparent;  //ユーザ命令透過変換マップ
 21379:   public static int[] mmuSuperDataTransparent;  //スーパーバイザデータ透過変換マップ
 21380:   public static int[] mmuSuperCodeTransparent;  //スーパーバイザ命令透過変換マップ
 21381:   public static int[] mmuUserDataDifference;  //ユーザデータ透過変換差分マップ
 21382:   public static int[] mmuUserCodeDifference;  //ユーザ命令透過変換差分マップ
 21383:   public static int[] mmuSuperDataDifference;  //スーパーバイザデータ透過変換差分マップ
 21384:   public static int[] mmuSuperCodeDifference;  //スーパーバイザ命令透過変換差分マップ
 21385: 
 21386:   //d = mmuGetDTT0 ()
 21387:   //  DTT0を読む
 21388:   public static int mmuGetDTT0 () {
 21389:     return mmuDTT0;
 21390:   }  //mmuGetDTT0()
 21391: 
 21392:   //d = mmuGetDTT1 ()
 21393:   //  DTT1を読む
 21394:   public static int mmuGetDTT1 () {
 21395:     return mmuDTT1;
 21396:   }  //mmuGetDTT1()
 21397: 
 21398:   //d = mmuGetITT0 ()
 21399:   //  ITT0を読む
 21400:   public static int mmuGetITT0 () {
 21401:     return mmuITT0;
 21402:   }  //mmuGetITT0()
 21403: 
 21404:   //d = mmuGetITT1 ()
 21405:   //  ITT1を読む
 21406:   public static int mmuGetITT1 () {
 21407:     return mmuITT1;
 21408:   }  //mmuGetITT1()
 21409: 
 21410:   //mmuSetDTT0 (d)
 21411:   //  DTT0に書く
 21412:   public static void mmuSetDTT0 (int d) {
 21413:     mmuSetDataTransparent (d, mmuDTT1);
 21414:     if (MMU_DEBUG_COMMAND) {
 21415:       System.out.printf ("%08x mmuSetDTT0(0x%08x)\n", XEiJ.regPC0, mmuDTT0);
 21416:     }
 21417:   }  //mmuSetDTT0(int)
 21418: 
 21419:   //mmuSetDTT1 (d)
 21420:   //  DTT1に書く
 21421:   public static void mmuSetDTT1 (int d) {
 21422:     mmuSetDataTransparent (mmuDTT0, d);
 21423:     if (MMU_DEBUG_COMMAND) {
 21424:       System.out.printf ("%08x mmuSetDTT1(0x%08x)\n", XEiJ.regPC0, mmuDTT1);
 21425:     }
 21426:   }  //mmuSetDTT1(int)
 21427: 
 21428:   //mmuSetDataTransparent (d0, d1)
 21429:   //  DTT0,DTT1に書く
 21430:   //  データ透過変換マップを更新する
 21431:   //  DTT0とDTT1の両方がヒットするときDTT0を用いるため、DTT1の変換を展開してからDTT0の変換を上書きする
 21432:   //  DTT1でライトプロテクトされていてもDTT0でライトプロテクトされていなければ書き込める
 21433:   public static void mmuSetDataTransparent (int d0, int d1) {
 21434:     mmuDTT0 = d0 & 0xffffe364;
 21435:     mmuDTT1 = d1 & 0xffffe364;
 21436:     //透過変換マップと透過変換差分マップを入れ換える
 21437:     {
 21438:       int[] t = mmuUserDataDifference;
 21439:       mmuUserDataDifference = mmuUserDataTransparent;
 21440:       mmuUserDataTransparent = t;
 21441:       t = mmuSuperDataDifference;
 21442:       mmuSuperDataDifference = mmuSuperDataTransparent;
 21443:       mmuSuperDataTransparent = t;
 21444:     }
 21445:     //透過変換マップを構築する
 21446:     Arrays.fill (mmuUserDataTransparent, 0);  //透過変換なし
 21447:     Arrays.fill (mmuSuperDataTransparent, 0);  //透過変換なし
 21448:     if ((short) mmuDTT1 < 0) {  //(mmuDTT1 & MMU_TTR_ENABLE) != 0。有効
 21449:       int mask = ~mmuDTT1 >>> 16 & 255;
 21450:       int base = mmuDTT1 >>> 24 & mask;
 21451:       int writeProtect = (mmuDTT1 & MMU_TTR_WRITE_PROTECT) != 0 ? -1 : 1;  //-1=ライトプロテクトあり,1=ライトプロテクトなし
 21452:       if ((mmuDTT1 & MMU_TTR_IGNORE_FC2) != 0 ||
 21453:           (mmuDTT1 & MMU_TTR_USER_SUPERVISOR) == MMU_TTR_US_USER) {  //ユーザモードで有効
 21454:         for (int block = 0; block < 256; block++) {
 21455:           //if (((block << 24 ^ mmuDTT1) & ~mmuDTT1 << 8) >>> 24 == 0) {
 21456:           if ((block & mask) == base) {
 21457:             mmuUserDataTransparent[block] = writeProtect;
 21458:           }
 21459:         }
 21460:       }
 21461:       if ((mmuDTT1 & MMU_TTR_IGNORE_FC2) != 0 ||
 21462:           (mmuDTT1 & MMU_TTR_USER_SUPERVISOR) == MMU_TTR_US_SUPERVISOR) {  //スーパーバイザモードで有効
 21463:         for (int block = 0; block < 256; block++) {
 21464:           //if (((block << 24 ^ mmuDTT1) & ~mmuDTT1 << 8) >>> 24 == 0) {
 21465:           if ((block & mask) == base) {
 21466:             mmuSuperDataTransparent[block] = writeProtect;
 21467:           }
 21468:         }
 21469:       }
 21470:     }
 21471:     if ((short) mmuDTT0 < 0) {  //(mmuDTT0 & MMU_TTR_ENABLE) != 0。有効
 21472:       int mask = ~mmuDTT0 >>> 16 & 255;
 21473:       int base = mmuDTT0 >>> 24 & mask;
 21474:       int writeProtect = (mmuDTT0 & MMU_TTR_WRITE_PROTECT) != 0 ? -1 : 1;  //-1=ライトプロテクトあり,1=ライトプロテクトなし
 21475:       if ((mmuDTT0 & MMU_TTR_IGNORE_FC2) != 0 ||
 21476:           (mmuDTT0 & MMU_TTR_USER_SUPERVISOR) == MMU_TTR_US_USER) {  //ユーザモードで有効
 21477:         for (int block = 0; block < 256; block++) {
 21478:           //if (((block << 24 ^ mmuDTT0) & ~mmuDTT0 << 8) >>> 24 == 0) {
 21479:           if ((block & mask) == base) {
 21480:             mmuUserDataTransparent[block] = writeProtect;
 21481:           }
 21482:         }
 21483:       }
 21484:       if ((mmuDTT0 & MMU_TTR_IGNORE_FC2) != 0 ||
 21485:           (mmuDTT0 & MMU_TTR_USER_SUPERVISOR) == MMU_TTR_US_SUPERVISOR) {  //スーパーバイザモードで有効
 21486:         for (int block = 0; block < 256; block++) {
 21487:           //if (((block << 24 ^ mmuDTT0) & ~mmuDTT0 << 8) >>> 24 == 0) {
 21488:           if ((block & mask) == base) {
 21489:             mmuSuperDataTransparent[block] = writeProtect;
 21490:           }
 21491:         }
 21492:       }
 21493:     }
 21494:     //透過変換差分マップを作る
 21495:     int difference = 0;
 21496:     for (int block = 0; block < 256; block++) {
 21497:       difference |= mmuUserDataDifference[block] -= mmuUserDataTransparent[block];
 21498:       difference |= mmuSuperDataDifference[block] -= mmuSuperDataTransparent[block];
 21499:     }
 21500:     //透過変換の状態が変化したブロックのエントリを無効化する
 21501:     if (difference != 0) {
 21502:       for (int i = 0; i < 4 * MMU_CACHE_WAYS * MMU_HASH_SIZE; i += 4) {
 21503:         int logicalPage = mmuUserDataCache[i];
 21504:         if (logicalPage != 1 &&  //有効なエントリで
 21505:             mmuUserDataDifference[logicalPage >>> 24] != 0) {  //透過変換の状態が変化した
 21506:           mmuUserDataCache[i] = mmuUserDataCache[i + 1] = mmuUserDataCache[i + 2] = mmuUserDataCache[i + 3] = 1;  //無効化する
 21507:         }
 21508:         logicalPage = mmuSuperDataCache[i];
 21509:         if (logicalPage != 1 &&  //有効なエントリで
 21510:             mmuSuperDataDifference[logicalPage >>> 24] != 0) {  //透過変換の状態が変化した
 21511:           mmuSuperDataCache[i] = mmuSuperDataCache[i + 1] = mmuSuperDataCache[i + 2] = mmuSuperDataCache[i + 3] = 1;  //無効化する
 21512:         }
 21513:       }
 21514:     }
 21515:   }  //mmuSetDataTransparent(int,int)
 21516: 
 21517:   //mmuSetITT0 (d)
 21518:   //  ITT0に書く
 21519:   public static void mmuSetITT0 (int d) {
 21520:     mmuSetCodeTransparent (d, mmuITT1);
 21521:     if (MMU_DEBUG_COMMAND) {
 21522:       System.out.printf ("%08x mmuSetITT0(0x%08x)\n", XEiJ.regPC0, mmuITT0);
 21523:     }
 21524:   }  //mmuSetITT0(int)
 21525: 
 21526:   //mmuSetITT1 (d)
 21527:   //  ITT1に書く
 21528:   public static void mmuSetITT1 (int d) {
 21529:     mmuSetCodeTransparent (mmuITT0, d);
 21530:     if (MMU_DEBUG_COMMAND) {
 21531:       System.out.printf ("%08x mmuSetITT1(0x%08x)\n", XEiJ.regPC0, mmuITT1);
 21532:     }
 21533:   }  //mmuSetITT1(int)
 21534: 
 21535:   //mmuSetCodeTransparent (d0, d1)
 21536:   //  ITT0,ITT1に書く
 21537:   //  命令透過変換マップを更新する
 21538:   //  ITT0とITT1の両方がヒットするときITT0を用いるため、ITT1の変換を展開してからITT0の変換を上書きする
 21539:   public static void mmuSetCodeTransparent (int d0, int d1) {
 21540:     mmuITT0 = d0 & 0xffffe364;
 21541:     mmuITT1 = d1 & 0xffffe364;
 21542:     //透過変換マップと透過変換差分マップを入れ換える
 21543:     {
 21544:       int[] t = mmuUserCodeDifference;
 21545:       mmuUserCodeDifference = mmuUserCodeTransparent;
 21546:       mmuUserCodeTransparent = t;
 21547:       t = mmuSuperCodeDifference;
 21548:       mmuSuperCodeDifference = mmuSuperCodeTransparent;
 21549:       mmuSuperCodeTransparent = t;
 21550:     }
 21551:     //透過変換マップを構築する
 21552:     Arrays.fill (mmuUserCodeTransparent, 0);  //透過変換なし
 21553:     Arrays.fill (mmuSuperCodeTransparent, 0);  //透過変換なし
 21554:     if ((short) mmuITT1 < 0) {  //(mmuITT1 & MMU_TTR_ENABLE) != 0。有効
 21555:       int mask = ~mmuITT1 >>> 16 & 255;
 21556:       int base = mmuITT1 >>> 24 & mask;
 21557:       int writeProtect = (mmuITT1 & MMU_TTR_WRITE_PROTECT) != 0 ? -1 : 1;  //-1=ライトプロテクトあり,1=ライトプロテクトなし
 21558:       if ((mmuITT1 & MMU_TTR_IGNORE_FC2) != 0 ||
 21559:           (mmuITT1 & MMU_TTR_USER_SUPERVISOR) == MMU_TTR_US_USER) {  //ユーザモードで有効
 21560:         for (int block = 0; block < 256; block++) {
 21561:           //if (((block << 24 ^ mmuITT1) & ~mmuITT1 << 8) >>> 24 == 0) {
 21562:           if ((block & mask) == base) {
 21563:             mmuUserCodeTransparent[block] = writeProtect;
 21564:           }
 21565:         }
 21566:       }
 21567:       if ((mmuITT1 & MMU_TTR_IGNORE_FC2) != 0 ||
 21568:           (mmuITT1 & MMU_TTR_USER_SUPERVISOR) == MMU_TTR_US_SUPERVISOR) {  //スーパーバイザモードで有効
 21569:         for (int block = 0; block < 256; block++) {
 21570:           //if (((block << 24 ^ mmuITT1) & ~mmuITT1 << 8) >>> 24 == 0) {
 21571:           if ((block & mask) == base) {
 21572:             mmuSuperCodeTransparent[block] = writeProtect;
 21573:           }
 21574:         }
 21575:       }
 21576:     }
 21577:     if ((short) mmuITT0 < 0) {  //(mmuITT0 & MMU_TTR_ENABLE) != 0。有効
 21578:       int mask = ~mmuITT0 >>> 16 & 255;
 21579:       int base = mmuITT0 >>> 24 & mask;
 21580:       int writeProtect = (mmuITT0 & MMU_TTR_WRITE_PROTECT) != 0 ? -1 : 1;  //-1=ライトプロテクトあり,1=ライトプロテクトなし
 21581:       if ((mmuITT0 & MMU_TTR_IGNORE_FC2) != 0 ||
 21582:           (mmuITT0 & MMU_TTR_USER_SUPERVISOR) == MMU_TTR_US_USER) {  //ユーザモードで有効
 21583:         for (int block = 0; block < 256; block++) {
 21584:           //if (((block << 24 ^ mmuITT0) & ~mmuITT0 << 8) >>> 24 == 0) {
 21585:           if ((block & mask) == base) {
 21586:             mmuUserCodeTransparent[block] = writeProtect;
 21587:           }
 21588:         }
 21589:       }
 21590:       if ((mmuITT0 & MMU_TTR_IGNORE_FC2) != 0 ||
 21591:           (mmuITT0 & MMU_TTR_USER_SUPERVISOR) == MMU_TTR_US_SUPERVISOR) {  //スーパーバイザモードで有効
 21592:         for (int block = 0; block < 256; block++) {
 21593:           //if (((block << 24 ^ mmuITT0) & ~mmuITT0 << 8) >>> 24 == 0) {
 21594:           if ((block & mask) == base) {
 21595:             mmuSuperCodeTransparent[block] = writeProtect;
 21596:           }
 21597:         }
 21598:       }
 21599:     }
 21600:     //透過変換差分マップを作る
 21601:     int difference = 0;
 21602:     for (int block = 0; block < 256; block++) {
 21603:       difference |= mmuUserCodeDifference[block] -= mmuUserCodeTransparent[block];
 21604:       difference |= mmuSuperCodeDifference[block] -= mmuSuperCodeTransparent[block];
 21605:     }
 21606:     //透過変換の状態が変化したブロックのエントリを無効化する
 21607:     if (difference != 0) {
 21608:       for (int i = 0; i < 4 * MMU_CACHE_WAYS * MMU_HASH_SIZE; i += 4) {
 21609:         int logicalPage = mmuUserCodeCache[i];
 21610:         if (logicalPage != 1 &&  //有効なエントリで
 21611:             mmuUserCodeDifference[logicalPage >>> 24] != 0) {  //透過変換の状態が変化した
 21612:           mmuUserCodeCache[i] = mmuUserCodeCache[i + 1] = mmuUserCodeCache[i + 2] = mmuUserCodeCache[i + 3] = 1;  //無効化する
 21613:         }
 21614:         logicalPage = mmuSuperCodeCache[i];
 21615:         if (logicalPage != 1 &&  //有効なエントリで
 21616:             mmuSuperCodeDifference[logicalPage >>> 24] != 0) {  //透過変換の状態が変化した
 21617:           mmuSuperCodeCache[i] = mmuSuperCodeCache[i + 1] = mmuSuperCodeCache[i + 2] = mmuSuperCodeCache[i + 3] = 1;  //無効化する
 21618:         }
 21619:       }
 21620:     }
 21621:   }  //mmuSetCodeTransparent(int,int)
 21622: 
 21623:   //--------------------------------------------------------------------------------
 21624:   //変換制御レジスタ
 21625:   //
 21626:   //  TCR  変換制御レジスタ
 21627:   //      31  30  29  28  27  26  25  24  23  22  21  20  19  18  17  16  15  14  13  12  11  10   9   8   7   6   5   4   3   2   1   0
 21628:   //    ┏━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━┯━┯━┯━┯━┯━┯━┯━━━┯━━━┯━┯━━━┯━━━┯━┓
 21629:   //    ┃                               0                              │ E│ P NAD NAI FOTC FITC  DCO │  DUO │DWO   DCI │  DUI │ 0┃
 21630:   //    ┗━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━┷━┷━┷━┷━┷━┷━┷━━━┷━━━┷━┷━━━┷━━━┷━┛
 21631:   public static final int MMU_TCR_ENABLE    = 1 << 15;  //x  E     Enable
 21632:   public static final int MMU_TCR_PAGE_SIZE = 1 << 14;  //x  P     Page Size
 21633:   public static final int MMU_TCR_P_4KB     = 0 << 14;  //           4KB
 21634:   public static final int MMU_TCR_P_8KB     = 1 << 14;  //           8KB
 21635:   public static final int MMU_TCR_NAD       = 1 << 13;  //x  NAD   No Allocate Mode (Data ATC)。データATCはヒットするが更新されない
 21636:   public static final int MMU_TCR_NAI       = 1 << 12;  //x  NAI   No Allocate Mode (Instruction ATC)。命令ATCはヒットするが更新されない
 21637:   public static final int MMU_TCR_FOTC      = 1 << 11;  //   FOTC  1/2-Cache Mode (Data ATC)。データATCは0=64エントリ,1=32エントリ
 21638:   public static final int MMU_TCR_FITC      = 1 << 10;  //   FITC  1/2-Cache Mode (Instruction ATC)。命令ATCは0=64エントリ,1=32エントリ
 21639:   public static final int MMU_TCR_DCO       = 3 <<  8;  //   DCO   Default Cache Mode (Data Cache)。デフォルトデータキャッシュモード
 21640:   public static final int MMU_TCR_DUO       = 3 <<  6;  //   DUO   Default UPA bits (Data Cache)。デフォルトデータUPA
 21641:   public static final int MMU_TCR_DWO       = 1 <<  5;  //   DWO   Default Write Protect (Data Cache)。デフォルトライトプロテクト
 21642:   public static final int MMU_TCR_DCI       = 3 <<  3;  //   DCI   Default Cache Mode (Instruction Cache)。デフォルト命令キャッシュモード
 21643:   public static final int MMU_TCR_DUI       = 3 <<  1;  //   DUI   Default UPA bits (Instruction Cache)。デフォルト命令UPA
 21644:   public static int mmuTCR;  //TCR
 21645:   public static boolean mmuEnabled;  //true=アドレス変換有効
 21646:   public static boolean mmu4KB;  //false=8KB,true=4KB
 21647:   public static boolean mmuNotAllocateData;  //true=データアドレス変換キャッシュをアロケートしない
 21648:   public static boolean mmuNotAllocateCode;  //true=命令アドレス変換キャッシュをアロケートしない
 21649:   public static int mmuPageSize;  //ページサイズ
 21650:   public static int mmuPageAddressMask;  //ページアドレスのマスク
 21651:   public static int mmuPageOffsetMask;  //ページオフセットのマスク
 21652:   public static int mmuPageIndexMask;  //ページインデックスのマスク
 21653:   public static int mmuPageIndexBit2;  //ページインデックスのbit番号-2
 21654:   public static int mmuPageTableMask;  //ページテーブルの先頭アドレスのマスク
 21655: 
 21656:   //d = mmuGetTCR ()
 21657:   //  TCRを読む
 21658:   public static int mmuGetTCR () {
 21659:     return mmuTCR;
 21660:   }  //mmuGetTCR()
 21661: 
 21662:   //mmuSetTCR (d)
 21663:   //  TCRに書く
 21664:   public static void mmuSetTCR (int d) {
 21665:     mmuInvalidateAllCache ();  //高速化のためアドレス変換していないときもキャッシュに乗せているので、アドレス変換を有効にしたときキャッシュを初期化する必要がある
 21666:     mmuTCR = d & 0x0000fffe;
 21667:     mmuEnabled = (short) d < 0;  //(d & MMU_TCR_ENABLE) != 0
 21668:     mmu4KB = (d & MMU_TCR_PAGE_SIZE) == MMU_TCR_P_4KB;
 21669:     mmuNotAllocateData = (d & MMU_TCR_NAD) != 0;
 21670:     mmuNotAllocateCode = (d & MMU_TCR_NAI) != 0;
 21671:     if (mmu4KB) {  //4KB
 21672:       mmuPageSize = MMU_PAGE_SIZE_4KB;
 21673:       mmuPageAddressMask = MMU_PAGE_ADDRESS_MASK_4KB;
 21674:       mmuPageOffsetMask = MMU_PAGE_OFFSET_MASK_4KB;
 21675:       mmuPageIndexMask = MMU_PAGE_INDEX_MASK_4KB;
 21676:       mmuPageIndexBit2 = MMU_PAGE_INDEX_BIT0_4KB - 2;
 21677:       mmuPageTableMask = MMU_DESCRIPTOR_PAGE_TABLE_ADDRESS_4KB;
 21678:     } else {  //8KB
 21679:       mmuPageSize = MMU_PAGE_SIZE_8KB;
 21680:       mmuPageAddressMask = MMU_PAGE_ADDRESS_MASK_8KB;
 21681:       mmuPageOffsetMask = MMU_PAGE_OFFSET_MASK_8KB;
 21682:       mmuPageIndexMask = MMU_PAGE_INDEX_MASK_8KB;
 21683:       mmuPageIndexBit2 = MMU_PAGE_INDEX_BIT0_8KB - 2;
 21684:       mmuPageTableMask = MMU_DESCRIPTOR_PAGE_TABLE_ADDRESS_8KB;
 21685:     }
 21686:     if (MMU_DEBUG_COMMAND) {
 21687:       System.out.printf ("%08x mmuSetTCR(0x%08x)\n", XEiJ.regPC0, mmuTCR);
 21688:       System.out.printf ("  mmuEnabled=%b\n", mmuEnabled);
 21689:       System.out.printf ("  mmu4KB=%b\n", mmu4KB);
 21690:       System.out.printf ("  mmuPageSize=0x%08x\n", mmuPageSize);
 21691:       System.out.printf ("  mmuPageAddressMask=0x%08x\n", mmuPageAddressMask);
 21692:       System.out.printf ("  mmuPageOffsetMask=0x%08x\n", mmuPageOffsetMask);
 21693:       System.out.printf ("  mmuPageIndexMask=0x%08x\n", mmuPageIndexMask);
 21694:       System.out.printf ("  mmuPageIndexBit2=%d\n", mmuPageIndexBit2);
 21695:       System.out.printf ("  mmuPageTableMask=%d\n", mmuPageTableMask);
 21696:     }
 21697:   }  //mmuSetTCR(int)
 21698: 
 21699:   //--------------------------------------------------------------------------------
 21700:   //アドレス変換テーブル
 21701: 
 21702:   //  URP  ユーザルートポインタ
 21703:   //  SRP  スーパーバイザルートポインタ
 21704:   //      31  30  29  28  27  26  25  24  23  22  21  20  19  18  17  16  15  14  13  12  11  10   9   8   7   6   5   4   3   2   1   0
 21705:   //    ┏━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━┯━━━━━━━━━━━━━━━━━┓
 21706:   //    ┃                                  ルートテーブルアドレス                                  │                 0                ┃
 21707:   //    ┗━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━┷━━━━━━━━━━━━━━━━━┛
 21708:   public static int mmuURP;  //URP
 21709:   public static int mmuSRP;  //SRP
 21710: 
 21711:   //d = mmuGetURP ()
 21712:   //  URPを読む
 21713:   public static int mmuGetURP () {
 21714:     return mmuURP;
 21715:   }  //mmuGetURP()
 21716: 
 21717:   //d = mmuGetSRP ()
 21718:   //  SRPを読む
 21719:   public static int mmuGetSRP () {
 21720:     return mmuSRP;
 21721:   }  //mmuGetSRP()
 21722: 
 21723:   //mmuSetURP (d)
 21724:   //  URPに書く
 21725:   public static void mmuSetURP (int d) throws M68kException {
 21726:     mmuURP = d &= 0xfffffe00;
 21727:     Arrays.fill (mmuUserDataCache, 1);
 21728:     Arrays.fill (mmuUserCodeCache, 1);
 21729:     if (MMU_DEBUG_COMMAND) {
 21730:       System.out.printf ("%08x mmuSetURP(0x%08x)\n", XEiJ.regPC0, mmuURP);
 21731:     }
 21732:     if (RootPointerList.RTL_ON) {
 21733:       RootPointerList.rtlSetRootPointer (d, false);
 21734:     }
 21735:   }  //mmuSetURP(int)
 21736: 
 21737:   //mmuSetSRP (d)
 21738:   //  SRPに書く
 21739:   public static void mmuSetSRP (int d) {
 21740:     mmuSRP = d &= 0xfffffe00;
 21741:     Arrays.fill (mmuSuperDataCache, 1);
 21742:     Arrays.fill (mmuSuperCodeCache, 1);
 21743:     if (MMU_DEBUG_COMMAND) {
 21744:       System.out.printf ("%08x mmuSetSRP(0x%08x)\n", XEiJ.regPC0, mmuSRP);
 21745:     }
 21746:     if (RootPointerList.RTL_ON) {
 21747:       RootPointerList.rtlSetRootPointer (d, true);
 21748:     }
 21749:   }  //mmuSetSRP(int)
 21750: 
 21751:   //  ディスクリプタ
 21752:   //
 21753:   //    ルートテーブルディスクリプタ
 21754:   //      31  30  29  28  27  26  25  24  23  22  21  20  19  18  17  16  15  14  13  12  11  10   9   8   7   6   5   4   3   2   1   0
 21755:   //    ┏━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━┯━━━━━━━━━┯━┯━┯━━━┓
 21756:   //    ┃                                 ポインタテーブルアドレス                                 │         X        │ U│ W│  UDT ┃
 21757:   //    ┗━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━┷━━━━━━━━━┷━┷━┷━━━┛
 21758:   //
 21759:   //    4KBポインタテーブルディスクリプタ
 21760:   //      31  30  29  28  27  26  25  24  23  22  21  20  19  18  17  16  15  14  13  12  11  10   9   8   7   6   5   4   3   2   1   0
 21761:   //    ┏━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━┯━━━┯━┯━┯━━━┓
 21762:   //    ┃                                        ページテーブルアドレス                                        │   X  │ U│ W│  UDT ┃
 21763:   //    ┗━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━┷━━━┷━┷━┷━━━┛
 21764:   //
 21765:   //    8KBポインタテーブルディスクリプタ
 21766:   //      31  30  29  28  27  26  25  24  23  22  21  20  19  18  17  16  15  14  13  12  11  10   9   8   7   6   5   4   3   2   1   0
 21767:   //    ┏━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━┯━┯━┯━┯━━━┓
 21768:   //    ┃                                          ページテーブルアドレス                                          │ X│ U│ W│  UDT ┃
 21769:   //    ┗━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━┷━┷━┷━┷━━━┛
 21770:   //
 21771:   //    4KBページテーブルディスクリプタ
 21772:   //      31  30  29  28  27  26  25  24  23  22  21  20  19  18  17  16  15  14  13  12  11  10   9   8   7   6   5   4   3   2   1   0
 21773:   //    ┏━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━┯━┯━┯━┯━┯━┯━━━┯━┯━┯━┯━━━┓
 21774:   //    ┃                              物理ページアドレス                              │UR│ G│U1│U0│ S│  CM  │ M│ U│ W│  PDT ┃
 21775:   //    ┗━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━┷━┷━┷━┷━┷━┷━━━┷━┷━┷━┷━━━┛
 21776:   //
 21777:   //    8KBページテーブルディスクリプタ
 21778:   //      31  30  29  28  27  26  25  24  23  22  21  20  19  18  17  16  15  14  13  12  11  10   9   8   7   6   5   4   3   2   1   0
 21779:   //    ┏━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━┯━┯━┯━┯━┯━┯━┯━━━┯━┯━┯━┯━━━┓
 21780:   //    ┃                            物理ページアドレス                            │UR│UR│ G│U1│U0│ S│  CM  │ M│ U│ W│  PDT ┃
 21781:   //    ┗━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━┷━┷━┷━┷━┷━┷━┷━━━┷━┷━┷━┷━━━┛
 21782:   //
 21783:   //    間接ページテーブルディスクリプタ
 21784:   //      31  30  29  28  27  26  25  24  23  22  21  20  19  18  17  16  15  14  13  12  11  10   9   8   7   6   5   4   3   2   1   0
 21785:   //    ┏━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━┯━━━┓
 21786:   //    ┃                                             ページディスクリプタアドレス                                             │  PDT ┃
 21787:   //    ┗━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━┷━━━┛
 21788:   public static final int MMU_DESCRIPTOR_POINTER_TABLE_ADDRESS  = -1 <<  9;  //x  Pointer Table Address
 21789:   public static final int MMU_DESCRIPTOR_PAGE_TABLE_ADDRESS_4KB = -1 <<  6;  //x  Page Table Address (4KB)
 21790:   public static final int MMU_DESCRIPTOR_PAGE_TABLE_ADDRESS_8KB = -1 <<  5;  //x  Page Table Address (8KB)
 21791:   public static final int MMU_DESCRIPTOR_GLOBAL                 =  1 << 10;  //x  G    Global
 21792:   public static final int MMU_DESCRIPTOR_SUPERVISOR_PROTECTED   =  1 <<  7;  //x  S    Supervisor Protected
 21793:   public static final int MMU_DESCRIPTOR_MODIFIED               =  1 <<  4;  //x  M    Modified
 21794:   public static final int MMU_DESCRIPTOR_USED                   =  1 <<  3;  //x  U    Used
 21795:   public static final int MMU_DESCRIPTOR_WRITE_PROTECTED        =  1 <<  2;  //x  W    Write Protected
 21796:   public static final int MMU_DESCRIPTOR_UDT                    =  2 <<  0;  //x  UDT  Upper Level Descriptor Type
 21797:   public static final int MMU_DESCRIPTOR_PDT                    =  3 <<  0;  //x  PDT  Page Descriptor Type
 21798:   public static final int MMU_DESCRIPTOR_TYPE_INVALID           =  0 <<  0;  //          Invalid
 21799:   public static final int MMU_DESCRIPTOR_TYPE_INDIRECT          =  2 <<  0;  //          Indirect
 21800:   public static final int MMU_DESCRIPTOR_INDIRECT_ADDRESS       = -1 <<  2;  //x  Descriptor Address
 21801: 
 21802:   //--------------------------------------------------------------------------------
 21803:   //アドレス変換キャッシュ
 21804:   //
 21805:   //  構造
 21806:   //    ユーザモード
 21807:   //      ライン0
 21808:   //        エントリ0
 21809:   //          [0]  論理ページアドレス。リード用。1=無効
 21810:   //          [1]  論理ページアドレス。ライト用。修正済みかつライトプロテクトされていないときだけ有効。1=無効
 21811:   //          [2]  物理ページアドレス。1=無効
 21812:   //          [3]  グローバルフラグ。-1=Global,0=NonGlobal,1=無効
 21813:   //        エントリ1
 21814:   //        エントリ2
 21815:   //        エントリ3
 21816:   //      ライン1
 21817:   //          :
 21818:   //      ライン63
 21819:   //    スーパーバイザモード
 21820:   //      ライン0
 21821:   //        エントリ0
 21822:   //          [0]  論理ページアドレス。リード用。1=無効
 21823:   //          [1]  論理ページアドレス。ライト用。修正済みかつライトプロテクトされていないときだけ有効。1=無効
 21824:   //          [2]  物理ページアドレス。1=無効
 21825:   //          [3]  グローバルフラグ。-1=Global,0=NonGlobal,1=無効
 21826:   //        エントリ1
 21827:   //        エントリ2
 21828:   //        エントリ3
 21829:   //      ライン1
 21830:   //          :
 21831:   //      ライン63
 21832:   //
 21833:   //  ハッシュ関数
 21834:   //    次の関数で32bitの論理ページアドレスを6bitのライン番号に変換する
 21835:   //      a * 0x5efc103f >>> 26
 21836:   //    32bitの中に幅6bit以内で6bitまでセットする組み合わせは1+1+2+4+8+16+32*27=896通りあるが、
 21837:   //    それらをa*x>>>26で0~63になるべく均一に分散させる係数を2^32通りの中から探して以下の24個を得た
 21838:   //      0x5efbf041  0x5efc0fc1  0x5efc103f  0x5f03efc1  0x5f03f03f  0x5f040fbf
 21839:   //      0x60fbf041  0x60fc0fc1  0x60fc103f  0x6103efc1  0x6103f03f  0x61040fbf
 21840:   //      0x9efbf041  0x9efc0fc1  0x9efc103f  0x9f03efc1  0x9f03f03f  0x9f040fbf
 21841:   //      0xa0fbf041  0xa0fc0fc1  0xa0fc103f  0xa103efc1  0xa103f03f  0xa1040fbf
 21842:   //    この中で(0..63)<<12と(0..63)<<13がそれぞれすべて分離するのは
 21843:   //      0x5efc103f
 21844:   //      0x60fc103f
 21845:   //      0x9efc103f
 21846:   //      0xa0fc103f
 21847:   //    この4個はほぼ同じパターンなので0x5efc103fを係数として用いることにする
 21848:   //      perl -e "for$x(0x5efc103f){printf'  //        0x%x%c',$x,10;for$b(7..15){@c=(0)x64;for$n(0..63){$a=$n<<$b;$c[$a*$x>>26&63]++;}printf'  //        %2d %s%c',$b,join('',@c),10;}}"
 21849:   //      0x5efc103f
 21850:   //       7 2111111111111111111111111111111101111111111111111111111111111111
 21851:   //       8 1111111111111111111111111111111111111111111111111111111111111111
 21852:   //       9 1111111111111111111111111111111111111111111111111111111111111111
 21853:   //      10 1111111111111111111111111111111111111111111111111111111111111111
 21854:   //      11 1111111111111111111111111111111111111111111111111111111111111111
 21855:   //      12 1111111111111111111111111111111111111111111111111111111111111111
 21856:   //      13 1111111111111111111111111111111111111111111111111111111111111111
 21857:   //      14 1111111111111111111111111111111111111111111111111111111111111111
 21858:   //      15 2011111111111111111111111111111111111111111111111111111111111111
 21859:   //    ページサイズが2^8=256バイトから2^14=16384バイトまで、それぞれ先頭の64ページがすべて異なるハッシュ値を持つことがわかる
 21860:   //
 21861:   //  1wayセットアソシアティブ
 21862:   //    ハッシュ値が衝突したときの速度低下を抑えるため4waysにしてみたが効果がなさそうなので1wayに戻してある
 21863:   //    ハッシュ関数を工夫してあるので4waysにしてもほとんどの場合は1番目でヒットするか4番目まですべてミスするかのどちらかになる
 21864:   //    1wayを4waysにするとミスしたときの条件分岐が1回から4回に増えてテーブルサーチの開始が遅れる
 21865:   //    2ways以上では参照するときに1番目に比較するエントリとアロケートするときに押し出すエントリを適切に選択するための仕組みが必要
 21866:   //
 21867:   //  LRU(least recently used)方式(2ways以上の場合)
 21868:   //    アロケートはラインの中で最も古いエントリを切り捨てて最も新しいエントリを追加する方法で行う
 21869:   //    アドレス変換キャッシュは最も新しいエントリが繰り返しアクセスされる場合が多く、ハッシュ関数で十分に分散させられているので、
 21870:   //    ここではエントリを常に新しい順にソートしておく方法を用いる
 21871:   //    2番目以降のエントリがヒットしたときエントリを並べ替えなければならないので遅くなるが、1番目のヒット率が十分に高ければ問題ない
 21872:   //
 21873:   //  グローバルフラグ
 21874:   //    関連する命令
 21875:   //      PFLUSHA       アドレス変換キャッシュのすべてのエントリを無効化する
 21876:   //      PFLUSHAN      アドレス変換キャッシュのNonGlobalなエントリを無効化する
 21877:   //      PFLUSH (An)   アドレス変換キャッシュの、DFC=1またはDFC=2ならばユーザモード、DFC=5またはDFC=6ならばスーパーバイザモードの、
 21878:   //                    論理ページアドレスがAnのエントリを無効化する
 21879:   //      PFLUSHN (An)  アドレス変換キャッシュの、DFC=1またはDFC=2ならばユーザモード、DFC=5またはDFC=6ならばスーパーバイザモードの、
 21880:   //                    論理ページアドレスがAnかつNonGlobalのエントリを無効化する
 21881:   //    グローバルフラグはこれらの命令の動作を変更する以外の機能を持たない
 21882:   //
 21883:   public static final int MMU_HASH_BITS = 6;
 21884:   public static final int MMU_HASH_SIZE = 1 << MMU_HASH_BITS;
 21885:   public static final int MMU_HASH_COEFF = 0x5efc103f;  //ハッシュ関数の係数
 21886:   public static final int MMU_CACHE_WAYS = 1;  //1=1way,4=4waysセットアソシアティブ
 21887:   public static final int[] mmuUserDataCache = new int[4 * MMU_CACHE_WAYS * MMU_HASH_SIZE];
 21888:   public static final int[] mmuUserCodeCache = new int[4 * MMU_CACHE_WAYS * MMU_HASH_SIZE];
 21889:   public static final int[] mmuSuperDataCache = new int[4 * MMU_CACHE_WAYS * MMU_HASH_SIZE];
 21890:   public static final int[] mmuSuperCodeCache = new int[4 * MMU_CACHE_WAYS * MMU_HASH_SIZE];
 21891: 
 21892:   //mmuInvalidateAllCache ()
 21893:   //  PFLUSHA
 21894:   //  アドレス変換キャッシュのすべてのエントリを無効化する
 21895:   public static void mmuInvalidateAllCache () {
 21896:     Arrays.fill (mmuUserDataCache, 1);
 21897:     Arrays.fill (mmuUserCodeCache, 1);
 21898:     Arrays.fill (mmuSuperDataCache, 1);
 21899:     Arrays.fill (mmuSuperCodeCache, 1);
 21900:   }  //mmuInvalidateAllCache()
 21901: 
 21902:   //mmuInvalidateAllNonGlobalCache ()
 21903:   //  PFLUSHAN
 21904:   //  アドレス変換キャッシュのNonGlobalなエントリを無効化する
 21905:   public static void mmuInvalidateAllNonGlobalCache () {
 21906:     for (int i = 0; i < 4 * MMU_CACHE_WAYS * MMU_HASH_SIZE; i += 4) {
 21907:       if (mmuUserDataCache[i + 3] == 0) {  //エントリが有効かつNonGlobal
 21908:         mmuUserDataCache[i] = mmuUserDataCache[i + 1] = mmuUserDataCache[i + 2] = mmuUserDataCache[i + 3] = 1;
 21909:       }
 21910:       if (mmuUserCodeCache[i + 3] == 0) {  //エントリが有効かつNonGlobal
 21911:         mmuUserCodeCache[i] = mmuUserCodeCache[i + 1] = mmuUserCodeCache[i + 2] = mmuUserCodeCache[i + 3] = 1;
 21912:       }
 21913:       if (mmuSuperDataCache[i + 3] == 0) {  //エントリが有効かつNonGlobal
 21914:         mmuSuperDataCache[i] = mmuSuperDataCache[i + 1] = mmuSuperDataCache[i + 2] = mmuSuperDataCache[i + 3] = 1;
 21915:       }
 21916:       if (mmuSuperCodeCache[i + 3] == 0) {  //エントリが有効かつNonGlobal
 21917:         mmuSuperCodeCache[i] = mmuSuperCodeCache[i + 1] = mmuSuperCodeCache[i + 2] = mmuSuperCodeCache[i + 3] = 1;
 21918:       }
 21919:     }
 21920:   }  //mmuInvalidateAllNonGlobalCache()
 21921: 
 21922:   //mmuInvalidateCache (a)
 21923:   //  PFLUSH (An)
 21924:   //  アドレス変換キャッシュの、DFC=1またはDFC=2ならばユーザモード、DFC=5またはDFC=6ならばスーパーバイザモードの、
 21925:   //  論理ページアドレスがAnのエントリを無効化する
 21926:   public static void mmuInvalidateCache (int a) {
 21927:     int logicalPage = a & mmuPageAddressMask;
 21928:     boolean supervisor = (0b10011111 << 24 << XEiJ.mpuDFC) < 0;
 21929:     boolean instruction = (0b00101010 << 24 << XEiJ.mpuDFC) < 0;
 21930:     int[] cache = (supervisor ?
 21931:                    instruction ? mmuSuperCodeCache : mmuSuperDataCache :
 21932:                    instruction ? mmuUserCodeCache : mmuUserDataCache);
 21933:     int head = (logicalPage * MMU_HASH_COEFF >>> -MMU_HASH_BITS) * (4 * MMU_CACHE_WAYS);  //先頭のエントリ
 21934:     if (MMU_CACHE_WAYS == 1) {  //1way
 21935:       if (cache[head] == logicalPage) {  //エントリが有効かつ論理ページアドレスがAn
 21936:         cache[head] = cache[head + 1] = cache[head + 2] = cache[head + 3] = 1;  //末尾を空ける
 21937:         return;
 21938:       }
 21939:     } else {  //2ways以上
 21940:       int tail = head + (4 * MMU_CACHE_WAYS - 4);  //末尾のエントリ
 21941:       for (int i = head; i <= tail; i += 4) {
 21942:         if (cache[i] == logicalPage) {  //エントリが有効かつ論理ページアドレスがAn
 21943:           for (int j = i; j < tail; j += 4) {  //後ろを詰める
 21944:             cache[j    ] = cache[j + 4];
 21945:             cache[j + 1] = cache[j + 5];
 21946:             cache[j + 2] = cache[j + 6];
 21947:             cache[j + 3] = cache[j + 7];
 21948:           }
 21949:           cache[tail] = cache[tail + 1] = cache[tail + 2] = cache[tail + 3] = 1;  //末尾を空ける
 21950:           return;
 21951:         }
 21952:       }
 21953:     }
 21954:   }  //mmuInvalidateCache(int)
 21955: 
 21956:   //mmuInvalidateNonGlobalCache (a)
 21957:   //  PFLUSHN (An)
 21958:   //  アドレス変換キャッシュの、DFC=1またはDFC=2ならばユーザモード、DFC=5またはDFC=6ならばスーパーバイザモードの、
 21959:   //  論理ページアドレスがAnかつNonGlobalのエントリを無効化する
 21960:   public static void mmuInvalidateNonGlobalCache (int a) {
 21961:     int logicalPage = a & mmuPageAddressMask;
 21962:     boolean supervisor = (0b10011111 << 24 << XEiJ.mpuDFC) < 0;
 21963:     boolean instruction = (0b00101010 << 24 << XEiJ.mpuDFC) < 0;
 21964:     int[] cache = (supervisor ?
 21965:                    instruction ? mmuSuperCodeCache : mmuSuperDataCache :
 21966:                    instruction ? mmuUserCodeCache : mmuUserDataCache);
 21967:     int head = (logicalPage * MMU_HASH_COEFF >>> -MMU_HASH_BITS) * (4 * MMU_CACHE_WAYS);  //先頭のエントリ
 21968:     if (MMU_CACHE_WAYS == 1) {  //1way
 21969:       if (cache[head] == logicalPage) {  //エントリが有効かつ論理ページアドレスがAn
 21970:         if (cache[head + 3] == 0) {  //エントリが有効かつNonGlobal
 21971:           cache[head] = cache[head + 1] = cache[head + 2] = cache[head + 3] = 1;  //末尾を空ける
 21972:         }
 21973:         return;  //論理ページアドレスがAnのエントリは1つだけなのでそれがNonGlobalでなければ何もしないで終了する
 21974:       }
 21975:     } else {  //2ways以上
 21976:       int tail = head + (4 * MMU_CACHE_WAYS - 4);  //末尾のエントリ
 21977:       for (int i = head; i <= tail; i += 4) {
 21978:         if (cache[i] == logicalPage) {  //エントリが有効かつ論理ページアドレスがAn
 21979:           if (cache[i + 3] == 0) {  //エントリが有効かつNonGlobal
 21980:             for (int j = i; j < tail; j += 4) {  //後ろを詰める
 21981:               cache[j    ] = cache[j + 4];
 21982:               cache[j + 1] = cache[j + 5];
 21983:               cache[j + 2] = cache[j + 6];
 21984:               cache[j + 3] = cache[j + 7];
 21985:             }
 21986:             cache[tail] = cache[tail + 1] = cache[tail + 2] = cache[tail + 3] = 1;  //末尾を空ける
 21987:           }
 21988:           return;  //論理ページアドレスがAnのエントリは1つだけなのでそれがNonGlobalでなければ何もしないで終了する
 21989:         }
 21990:       }
 21991:     }
 21992:   }  //mmuInvalidateNonGlobalCache(int)
 21993: 
 21994:   //--------------------------------------------------------------------------------
 21995:   //初期化
 21996: 
 21997:   //mmuInit ()
 21998:   //  初期化
 21999:   public static void mmuInit () {
 22000:     mmuUserDataTransparent = new int[256];
 22001:     mmuUserCodeTransparent = new int[256];
 22002:     mmuSuperDataTransparent = new int[256];
 22003:     mmuSuperCodeTransparent = new int[256];
 22004:     mmuUserDataDifference = new int[256];
 22005:     mmuUserCodeDifference = new int[256];
 22006:     mmuSuperDataDifference = new int[256];
 22007:     mmuSuperCodeDifference = new int[256];
 22008:     mmuReset ();
 22009:   }  //mmuInit()
 22010: 
 22011:   //mmuReset ()
 22012:   //  リセット
 22013:   public static void mmuReset () {
 22014:     mmuSetDataTransparent (0, 0);
 22015:     mmuSetCodeTransparent (0, 0);
 22016:     mmuSetTCR (0);
 22017:   }  //mmuReset()
 22018: 
 22019:   //--------------------------------------------------------------------------------
 22020:   //バスアクセス
 22021:   //
 22022:   //    ByteSign  byte  バイト符号拡張
 22023:   //    ByteZero  int   バイトゼロ拡張
 22024:   //    WordSign  int   ワード符号拡張
 22025:   //    WordZero  int   ワードゼロ拡張
 22026:   //    Long      int   ロング
 22027:   //    Quad      long  クワッド
 22028:   //
 22029:   //    Data    データ  1  先頭
 22030:   //    Second  データ  1  2番目
 22031:   //    Even    データ  2  先頭
 22032:   //    Four    データ  4  先頭
 22033:   //    Code    コード  2  先頭
 22034:   //    Opword  コード  2  先頭(命令ワード)
 22035:   //    Exword  コード  2  2番目(拡張ワード)
 22036:   //
 22037:   //  バイト
 22038:   //       0   1   2   3   4   5   6   7   8   9  10  11  12  13  14  15
 22039:   //    ┳━┯━┯━┯━┳━┯━┯━┯━┳━┯━┯━┯━┳━┯━┯━┯━┳
 22040:   //    ┃  │  │  │  ┃  │  │  │  ┃  │  │  │  ┃  │  │  │  ┃
 22041:   //    ┻━┷━┷━┷━┻━┷━┷━┷━┻━┷━┷━┷━┻━┷━┷━┷━┻
 22042:   //    ┏━┓
 22043:   //    ┃ B┃
 22044:   //    ┗━┛
 22045:   //        0
 22046:   //
 22047:   //  ワード
 22048:   //    偶数
 22049:   //       0   1   2   3   4   5   6   7   8   9  10  11  12  13  14  15
 22050:   //    ┳━┯━┯━┯━┳━┯━┯━┯━┳━┯━┯━┯━┳━┯━┯━┯━┳
 22051:   //    ┃  │  │  │  ┃  │  │  │  ┃  │  │  │  ┃  │  │  │  ┃
 22052:   //    ┻━┷━┷━┷━┻━┷━┷━┷━┻━┷━┷━┷━┻━┷━┷━┷━┻
 22053:   //    ┏━━━┓
 22054:   //    ┃   W  ┃
 22055:   //    ┗━━━┛
 22056:   //            0
 22057:   //    奇数
 22058:   //      -1   0   1   2   3   4   5   6   7   8   9  10  11  12  13  14
 22059:   //    ┳━┯━┯━┯━┳━┯━┯━┯━┳━┯━┯━┯━┳━┯━┯━┯━┳
 22060:   //    ┃  │  │  │  ┃  │  │  │  ┃  │  │  │  ┃  │  │  │  ┃
 22061:   //    ┻━┷━┷━┷━┻━┷━┷━┷━┻━┷━┷━┷━┻━┷━┷━┷━┻
 22062:   //        ┏━┳━┓
 22063:   //        ┃ B┃ B┃
 22064:   //        ┗━┻━┛
 22065:   //            8   0
 22066:   //
 22067:   //  ロング
 22068:   //    4の倍数
 22069:   //       0   1   2   3   4   5   6   7   8   9  10  11  12  13  14  15
 22070:   //    ┳━┯━┯━┯━┳━┯━┯━┯━┳━┯━┯━┯━┳━┯━┯━┯━┳
 22071:   //    ┃  │  │  │  ┃  │  │  │  ┃  │  │  │  ┃  │  │  │  ┃
 22072:   //    ┻━┷━┷━┷━┻━┷━┷━┷━┻━┷━┷━┷━┻━┷━┷━┷━┻
 22073:   //    ┏━━━━━━━┓
 22074:   //    ┃       L      ┃
 22075:   //    ┗━━━━━━━┛
 22076:   //                    0
 22077:   //    4の倍数+1
 22078:   //      -1   0   1   2   3   4   5   6   7   8   9  10  11  12  13  14
 22079:   //    ┳━┯━┯━┯━┳━┯━┯━┯━┳━┯━┯━┯━┳━┯━┯━┯━┳
 22080:   //    ┃  │  │  │  ┃  │  │  │  ┃  │  │  │  ┃  │  │  │  ┃
 22081:   //    ┻━┷━┷━┷━┻━┷━┷━┷━┻━┷━┷━┷━┻━┷━┷━┷━┻
 22082:   //        ┏━┳━━━┳━┓
 22083:   //        ┃ B┃   W  ┃ B┃
 22084:   //        ┗━┻━━━┻━┛
 22085:   //           24       8   0
 22086:   //    4の倍数+2
 22087:   //      -2  -1   0   1   2   3   4   5   6   7   8   9  10  11  12  13
 22088:   //    ┳━┯━┯━┯━┳━┯━┯━┯━┳━┯━┯━┯━┳━┯━┯━┯━┳
 22089:   //    ┃  │  │  │  ┃  │  │  │  ┃  │  │  │  ┃  │  │  │  ┃
 22090:   //    ┻━┷━┷━┷━┻━┷━┷━┷━┻━┷━┷━┷━┻━┷━┷━┷━┻
 22091:   //            ┏━━━┳━━━┓
 22092:   //            ┃   W  ┃   W  ┃
 22093:   //            ┗━━━┻━━━┛
 22094:   //                   16       0
 22095:   //    4の倍数+3
 22096:   //      -3  -2  -1   0   1   2   3   4   5   6   7   8   9  10  11  12
 22097:   //    ┳━┯━┯━┯━┳━┯━┯━┯━┳━┯━┯━┯━┳━┯━┯━┯━┳
 22098:   //    ┃  │  │  │  ┃  │  │  │  ┃  │  │  │  ┃  │  │  │  ┃
 22099:   //    ┻━┷━┷━┷━┻━┷━┷━┷━┻━┷━┷━┷━┻━┷━┷━┷━┻
 22100:   //                ┏━┳━━━┳━┓
 22101:   //                ┃ B┃   W  ┃ B┃
 22102:   //                ┗━┻━━━┻━┛
 22103:   //                   24       8   0
 22104:   //
 22105:   //  クワッド
 22106:   //    4の倍数
 22107:   //       0   1   2   3   4   5   6   7   8   9  10  11  12  13  14  15
 22108:   //    ┳━┯━┯━┯━┳━┯━┯━┯━┳━┯━┯━┯━┳━┯━┯━┯━┳
 22109:   //    ┃  │  │  │  ┃  │  │  │  ┃  │  │  │  ┃  │  │  │  ┃
 22110:   //    ┻━┷━┷━┷━┻━┷━┷━┷━┻━┷━┷━┷━┻━┷━┷━┷━┻
 22111:   //    ┏━━━━━━━┳━━━━━━━┓
 22112:   //    ┃       L      ┃       L      ┃
 22113:   //    ┗━━━━━━━┻━━━━━━━┛
 22114:   //                   32               0
 22115:   //    4の倍数+1
 22116:   //      -1   0   1   2   3   4   5   6   7   8   9  10  11  12  13  14
 22117:   //    ┳━┯━┯━┯━┳━┯━┯━┯━┳━┯━┯━┯━┳━┯━┯━┯━┳
 22118:   //    ┃  │  │  │  ┃  │  │  │  ┃  │  │  │  ┃  │  │  │  ┃
 22119:   //    ┻━┷━┷━┷━┻━┷━┷━┷━┻━┷━┷━┷━┻━┷━┷━┷━┻
 22120:   //        ┏━┳━━━┳━━━━━━━┳━┓
 22121:   //        ┃ B┃   W  ┃       L      ┃ B┃
 22122:   //        ┗━┻━━━┻━━━━━━━┻━┛
 22123:   //           56      40               8   0
 22124:   //    4の倍数+2
 22125:   //      -2  -1   0   1   2   3   4   5   6   7   8   9  10  11  12  13
 22126:   //    ┳━┯━┯━┯━┳━┯━┯━┯━┳━┯━┯━┯━┳━┯━┯━┯━┳
 22127:   //    ┃  │  │  │  ┃  │  │  │  ┃  │  │  │  ┃  │  │  │  ┃
 22128:   //    ┻━┷━┷━┷━┻━┷━┷━┷━┻━┷━┷━┷━┻━┷━┷━┷━┻
 22129:   //            ┏━━━┳━━━━━━━┳━━━┓
 22130:   //            ┃   W  ┃       L      ┃   W  ┃
 22131:   //            ┗━━━┻━━━━━━━┻━━━┛
 22132:   //                   48              16       0
 22133:   //    4の倍数+3
 22134:   //      -3  -2  -1   0   1   2   3   4   5   6   7   8   9  10  11  12
 22135:   //    ┳━┯━┯━┯━┳━┯━┯━┯━┳━┯━┯━┯━┳━┯━┯━┯━┳
 22136:   //    ┃  │  │  │  ┃  │  │  │  ┃  │  │  │  ┃  │  │  │  ┃
 22137:   //    ┻━┷━┷━┷━┻━┷━┷━┷━┻━┷━┷━┷━┻━┷━┷━┷━┻
 22138:   //                ┏━┳━━━━━━━┳━━━┳━┓
 22139:   //                ┃ B┃       L      ┃   W  ┃ B┃
 22140:   //                ┗━┻━━━━━━━┻━━━┻━┛
 22141:   //                   56              24       8   0
 22142:   //
 22143: 
 22144:   //--------------------------------------------------------------------------------
 22145:   //ピーク
 22146:   //  デバッガ用
 22147:   //  エラーや副作用なしでリードする
 22148:   //  アドレス変換はピーク
 22149:   //  ページフォルトやバスエラーのときは-1をキャストした値を返す
 22150: 
 22151:   //d = mmuPeekByteSign (a, f)
 22152:   //  ピークバイト符号拡張
 22153:   public static byte mmuPeekByteSign (int a, int f) {
 22154:     f = f == -1 ? XEiJ.regSRS != 0 ? 5 : 1 : f & 7;
 22155:     MemoryMappedDevice[] mm = (DataBreakPoint.DBP_ON ?
 22156:                                (f & 4) != 0 ? DataBreakPoint.dbpSuperMap : DataBreakPoint.dbpUserMap :
 22157:                                (f & 4) != 0 ? XEiJ.busSuperMap : XEiJ.busUserMap);
 22158:     //    01234567
 22159:     if (0b01100110 << 24 << f < 0) {  //SFC=1,2,5,6。アドレス変換あり
 22160:       int a0 = mmuTranslatePeek (a, f & 4, f & 2);
 22161:       return (a ^ a0) != 1 ? mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdPbs (a0) : -1;
 22162:     } else if (f != 7) {  //SFC=0,3,4。アドレス変換なし
 22163:       return mm[a >>> XEiJ.BUS_PAGE_BITS].mmdPbs (a);
 22164:     } else {
 22165:       return -1;
 22166:     }
 22167:   }  //mmuPeekByteSign(int,int)
 22168: 
 22169:   //d = mmuPeekByteZero (a, f)
 22170:   //  ピークバイトゼロ拡張
 22171:   public static int mmuPeekByteZero (int a, int f) {
 22172:     f = f == -1 ? XEiJ.regSRS != 0 ? 5 : 1 : f & 7;
 22173:     MemoryMappedDevice[] mm = (DataBreakPoint.DBP_ON ?
 22174:                                (f & 4) != 0 ? DataBreakPoint.dbpSuperMap : DataBreakPoint.dbpUserMap :
 22175:                                (f & 4) != 0 ? XEiJ.busSuperMap : XEiJ.busUserMap);
 22176:     //    01234567
 22177:     if (0b01100110 << 24 << f < 0) {  //SFC=1,2,5,6。アドレス変換あり
 22178:       int a0 = mmuTranslatePeek (a, f & 4, f & 2);
 22179:       return (a ^ a0) != 1 ? mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdPbz (a0) : 0xff;
 22180:       //                                                        ^        ^^^^
 22181:     } else if (f != 7) {  //SFC=0,3,4。アドレス変換なし
 22182:       return mm[a >>> XEiJ.BUS_PAGE_BITS].mmdPbz (a);
 22183:       //                                       ^
 22184:     } else {
 22185:       return 0xff;
 22186:       //     ^^^^
 22187:     }
 22188:   }  //mmuPeekByteZero(int,int)
 22189: 
 22190:   //d = mmuPeekByteSignData (a, supervisor)
 22191:   //  ピークバイト符号拡張(データ)
 22192:   public static byte mmuPeekByteSignData (int a, int supervisor) {
 22193:     MemoryMappedDevice[] mm = supervisor != 0 ? DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap : DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap;
 22194:     int a0 = mmuTranslatePeek (a, supervisor, 0);
 22195:     return (a ^ a0) == 1 ? -1 : mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdPbs (a0);
 22196:   }  //mmuPeekByteSignData(int,int)
 22197: 
 22198:   //d = mmuPeekByteSignCode (a, supervisor)
 22199:   //  ピークバイト符号拡張(コード)
 22200:   public static byte mmuPeekByteSignCode (int a, int supervisor) {
 22201:     MemoryMappedDevice[] mm = supervisor != 0 ? DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap : DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap;
 22202:     int a0 = mmuTranslatePeek (a, supervisor, 1);
 22203:     return (a ^ a0) == 1 ? -1 : mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdPbs (a0);
 22204:   }  //mmuPeekByteSignCode(int,int)
 22205: 
 22206:   //d = mmuPeekByteZeroData (a, supervisor)
 22207:   //  ピークバイトゼロ拡張(データ)
 22208:   public static int mmuPeekByteZeroData (int a, int supervisor) {
 22209:     MemoryMappedDevice[] mm = supervisor != 0 ? DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap : DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap;
 22210:     int a0 = mmuTranslatePeek (a, supervisor, 0);
 22211:     return (a ^ a0) == 1 ? 255 : mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdPbz (a0);
 22212:   }  //mmuPeekByteZeroData(int,int)
 22213: 
 22214:   //d = mmuPeekByteZeroCode (a, supervisor)
 22215:   //  ピークバイトゼロ拡張(コード)
 22216:   public static int mmuPeekByteZeroCode (int a, int supervisor) {
 22217:     MemoryMappedDevice[] mm = supervisor != 0 ? DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap : DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap;
 22218:     int a0 = mmuTranslatePeek (a, supervisor, 1);
 22219:     return (a ^ a0) == 1 ? 255 : mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdPbz (a0);
 22220:   }  //mmuPeekByteZeroCode(int,int)
 22221: 
 22222:   //d = mmuPeekWordSign (a, f)
 22223:   //  ピークワード符号拡張
 22224:   public static int mmuPeekWordSign (int a, int f) {
 22225:     f = f == -1 ? XEiJ.regSRS != 0 ? 5 : 1 : f & 7;
 22226:     MemoryMappedDevice[] mm = (DataBreakPoint.DBP_ON ?
 22227:                                (f & 4) != 0 ? DataBreakPoint.dbpSuperMap : DataBreakPoint.dbpUserMap :
 22228:                                (f & 4) != 0 ? XEiJ.busSuperMap : XEiJ.busUserMap);
 22229:     //    01234567
 22230:     if (0b01100110 << 24 << f < 0) {  //SFC=1,2,5,6。アドレス変換あり
 22231:       int a0 = mmuTranslatePeek (a, f & 4, f & 2);
 22232:       if ((a & 1) == 0) {  //偶数
 22233:         return (a ^ a0) != 1 ? mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdPws (a0) : -1;
 22234:       } else {  //奇数
 22235:         int a1 = mmuTranslatePeek (a + 1, f & 4, f & 2);
 22236:         return (((a     ^ a0) != 1 ? mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdPbs (a0) :  -1) << 8 |
 22237:                 ((a + 1 ^ a1) != 1 ? mm[a1 >>> XEiJ.BUS_PAGE_BITS].mmdPbz (a1) : 255));
 22238:       }
 22239:     } else if (f != 7) {  //SFC=0,3,4。アドレス変換なし
 22240:       if ((a & 1) == 0) {  //偶数
 22241:         return mm[a >>> XEiJ.BUS_PAGE_BITS].mmdPws (a);
 22242:       } else {  //奇数
 22243:         return (mm[a     >>> XEiJ.BUS_PAGE_BITS].mmdPbs (a    ) << 8 |
 22244:                 mm[a + 1 >>> XEiJ.BUS_PAGE_BITS].mmdPbz (a + 1));
 22245:       }
 22246:     } else {
 22247:       return -1;
 22248:     }
 22249:   }  //mmuPeekWordSign(int,int)
 22250: 
 22251:   //d = mmuPeekWordSignData (a, supervisor)
 22252:   //  ピークワード符号拡張(データ)
 22253:   public static int mmuPeekWordSignData (int a, int supervisor) {
 22254:     MemoryMappedDevice[] mm = supervisor != 0 ? DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap : DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap;
 22255:     int a0 = mmuTranslatePeek (a, supervisor, 0);  //a+1が必要なので上書き不可
 22256:     if ((a & 1) == 0) {  //偶数
 22257:       return (a0 & 1) != 0 ? -1 : mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdPws (a0);
 22258:     } else {  //奇数
 22259:       int a1 = mmuTranslatePeek (a + 1, supervisor, 0);
 22260:       return (((a0 & 1) == 0 ?  -1 : mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdPbs (a0)) << 8 |
 22261:               ((a1 & 1) != 0 ? 255 : mm[a1 >>> XEiJ.BUS_PAGE_BITS].mmdPbz (a1)));
 22262:     }
 22263:   }  //mmuPeekWordSignData(int,int)
 22264: 
 22265:   //d = mmuPeekWordSignEven (a, supervisor)
 22266:   //  ピークワード符号拡張(偶数)
 22267:   public static int mmuPeekWordSignEven (int a, int supervisor) {
 22268:     MemoryMappedDevice[] mm = supervisor != 0 ? DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap : DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap;
 22269:     a = mmuTranslatePeek (a, supervisor, 0);
 22270:     return (a & 1) != 0 ? -1 : mm[a >>> XEiJ.BUS_PAGE_BITS].mmdPws (a);
 22271:   }  //mmuPeekWordSignEven(int,int)
 22272: 
 22273:   //d = mmuPeekWordSignCode (a, supervisor)
 22274:   //  ピークワード符号拡張(コード)
 22275:   public static int mmuPeekWordSignCode (int a, int supervisor) {
 22276:     MemoryMappedDevice[] mm = supervisor != 0 ? DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap : DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap;
 22277:     a = mmuTranslatePeek (a, supervisor, 1);
 22278:     return (a & 1) != 0 ? -1 : mm[a >>> XEiJ.BUS_PAGE_BITS].mmdPws (a);
 22279:   }  //mmuPeekWordSignCode(int,int)
 22280: 
 22281:   //d = mmuPeekWordZeroData (a, supervisor)
 22282:   //  ピークワードゼロ拡張(データ)
 22283:   public static int mmuPeekWordZeroData (int a, int supervisor) {
 22284:     MemoryMappedDevice[] mm = supervisor != 0 ? DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap : DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap;
 22285:     int a0 = mmuTranslatePeek (a, supervisor, 0);  //a+1が必要なので上書き不可
 22286:     if ((a & 1) == 0) {  //偶数
 22287:       return (a0 & 1) != 0 ? 65535 : mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdPwz (a0);
 22288:     } else {  //奇数
 22289:       int a1 = mmuTranslatePeek (a + 1, supervisor, 0);
 22290:       return (((a0 & 1) == 0 ? 255 : mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdPbz (a0)) << 8 |
 22291:               ((a1 & 1) != 0 ? 255 : mm[a1 >>> XEiJ.BUS_PAGE_BITS].mmdPbz (a1)));
 22292:     }
 22293:   }  //mmuPeekWordZeroData(int,int)
 22294: 
 22295:   //d = mmuPeekWordZeroEven (a, supervisor)
 22296:   //  ピークワードゼロ拡張(偶数)
 22297:   public static int mmuPeekWordZeroEven (int a, int supervisor) {
 22298:     MemoryMappedDevice[] mm = supervisor != 0 ? DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap : DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap;
 22299:     a = mmuTranslatePeek (a, supervisor, 0);
 22300:     return (a & 1) != 0 ? 65535 : mm[a >>> XEiJ.BUS_PAGE_BITS].mmdPwz (a);
 22301:   }  //mmuPeekWordZeroEven(int,int)
 22302: 
 22303:   //d = mmuPeekWordZeroCode (a, supervisor)
 22304:   //  ピークワードゼロ拡張(コード)
 22305:   public static int mmuPeekWordZeroCode (int a, int supervisor) {
 22306:     MemoryMappedDevice[] mm = supervisor != 0 ? DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap : DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap;
 22307:     a = mmuTranslatePeek (a, supervisor, 1);
 22308:     return (a & 1) != 0 ? 65535 : mm[a >>> XEiJ.BUS_PAGE_BITS].mmdPwz (a);
 22309:   }  //mmuPeekWordZeroCode(int,int)
 22310: 
 22311:   //d = mmuPeekLong (a, f)
 22312:   //  ピークロング
 22313:   public static int mmuPeekLong (int a, int f) {
 22314:     f = f == -1 ? XEiJ.regSRS != 0 ? 5 : 1 : f & 7;
 22315:     MemoryMappedDevice[] mm = (DataBreakPoint.DBP_ON ?
 22316:                                (f & 4) != 0 ? DataBreakPoint.dbpSuperMap : DataBreakPoint.dbpUserMap :
 22317:                                (f & 4) != 0 ? XEiJ.busSuperMap : XEiJ.busUserMap);
 22318:     //    01234567
 22319:     if (0b01100110 << 24 << f < 0) {  //SFC=1,2,5,6。アドレス変換あり
 22320:       int a0 = mmuTranslatePeek (a, f & 4, f & 2);
 22321:       if ((a & 3) == 0) {  //4の倍数
 22322:         return (a ^ a0) != 1 ? mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdPls (a0) : -1;
 22323:       } else if ((a & 1) == 0) {  //4の倍数ではない偶数
 22324:         int a2 = mmuTranslatePeek (a + 2, f & 4, f & 2);
 22325:         return (((a     ^ a0) != 1 ? mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdPws (a0) :    -1) << 16 |
 22326:                 ((a + 2 ^ a2) != 1 ? mm[a2 >>> XEiJ.BUS_PAGE_BITS].mmdPwz (a2) : 65535));
 22327:       } else {  //奇数
 22328:         int a1 = mmuTranslatePeek (a + 1, f & 4, f & 2);
 22329:         int a3 = mmuTranslatePeek (a + 3, f & 4, f & 2);
 22330:         return (((a     ^ a0) != 1 ? mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdPbs (a0) :    -1) << 24 |
 22331:                 ((a + 1 ^ a1) != 1 ? mm[a1 >>> XEiJ.BUS_PAGE_BITS].mmdPwz (a1) : 65535) <<  8 |
 22332:                 ((a + 3 ^ a3) != 1 ? mm[a3 >>> XEiJ.BUS_PAGE_BITS].mmdPbz (a3) :   255));
 22333:       }
 22334:     } else if (f != 7) {  //SFC=0,3,4。アドレス変換なし
 22335:       if ((a & 3) == 0) {  //4の倍数
 22336:         return mm[a >>> XEiJ.BUS_PAGE_BITS].mmdPls (a);
 22337:       } else if ((a & 1) == 0) {  //4の倍数ではない偶数
 22338:         return (mm[a     >>> XEiJ.BUS_PAGE_BITS].mmdPws (a    ) << 16 |
 22339:                 mm[a + 2 >>> XEiJ.BUS_PAGE_BITS].mmdPwz (a + 2));
 22340:       } else {  //奇数
 22341:         return (mm[a     >>> XEiJ.BUS_PAGE_BITS].mmdPbs (a    ) << 24 |
 22342:                 mm[a + 1 >>> XEiJ.BUS_PAGE_BITS].mmdPwz (a + 1) <<  8 |
 22343:                 mm[a + 3 >>> XEiJ.BUS_PAGE_BITS].mmdPbz (a + 3));
 22344:       }
 22345:     } else {
 22346:       return -1;
 22347:     }
 22348:   }  //mmuPeekLong(int,int)
 22349: 
 22350:   //d = mmuPeekLongData (a, supervisor)
 22351:   //  ピークロング(データ)
 22352:   public static int mmuPeekLongData (int a, int supervisor) {
 22353:     MemoryMappedDevice[] mm = supervisor != 0 ? DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap : DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap;
 22354:     int a0 = mmuTranslatePeek (a, supervisor, 0);  //a+1,a+2,a+3が必要なので上書き不可
 22355:     if ((a & 3) == 0) {  //4の倍数
 22356:       return (a0 & 1) != 0 ? -1 : mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdPls (a0);
 22357:     } else if ((a & 1) == 0) {  //4の倍数+2
 22358:       int a2 = mmuTranslatePeek (a + 2, supervisor, 0);
 22359:       return (((a0 & 1) != 0 ?    -1 : mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdPws (a0)) << 16 |
 22360:               ((a2 & 1) != 0 ? 65535 : mm[a2 >>> XEiJ.BUS_PAGE_BITS].mmdPwz (a2)));
 22361:     } else {  //奇数
 22362:       int a1 = mmuTranslatePeek (a + 1, supervisor, 0);
 22363:       int a3 = mmuTranslatePeek (a + 3, supervisor, 0);
 22364:       return (((a0 & 1) == 0 ?    -1 : mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdPbs (a0)) << 24 |
 22365:               ((a1 & 1) != 0 ? 65535 : mm[a1 >>> XEiJ.BUS_PAGE_BITS].mmdPwz (a1)) << 16 |
 22366:               ((a3 & 1) != 0 ?   255 : mm[a3 >>> XEiJ.BUS_PAGE_BITS].mmdPbz (a3)));
 22367:     }
 22368:   }  //mmuPeekLongData(int,int)
 22369: 
 22370:   //d = mmuPeekLongEven (a, supervisor)
 22371:   //  ピークロング(偶数)
 22372:   public static int mmuPeekLongEven (int a, int supervisor) {
 22373:     MemoryMappedDevice[] mm = supervisor != 0 ? DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap : DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap;
 22374:     int a0 = mmuTranslatePeek (a, supervisor, 0);  //a+2が必要なので上書き不可
 22375:     if ((a & 2) == 0) {  //4の倍数
 22376:       return (a0 & 1) != 0 ? -1 : mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdPls (a0);
 22377:     } else {  //4の倍数+2
 22378:       int a2 = mmuTranslatePeek (a + 2, supervisor, 0);
 22379:       return (((a0 & 1) != 0 ?    -1 : mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdPws (a0)) << 16 |
 22380:               ((a2 & 1) != 0 ? 65535 : mm[a2 >>> XEiJ.BUS_PAGE_BITS].mmdPwz (a2)));
 22381:     }
 22382:   }  //mmuPeekLongEven(int,int)
 22383: 
 22384:   //d = mmuPeekLongFour (a, supervisor)
 22385:   //  ピークロング(4の倍数)
 22386:   public static int mmuPeekLongFour (int a, int supervisor) {
 22387:     MemoryMappedDevice[] mm = supervisor != 0 ? DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap : DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap;
 22388:     a = mmuTranslatePeek (a, supervisor, 0);
 22389:     return (a & 1) != 0 ? -1 : mm[a >>> XEiJ.BUS_PAGE_BITS].mmdPls (a);
 22390:   }  //mmuPeekLongFour(int,int)
 22391: 
 22392:   //d = mmuPeekLongCode (a, supervisor)
 22393:   //  ピークロング(コード)
 22394:   public static int mmuPeekLongCode (int a, int supervisor) {
 22395:     MemoryMappedDevice[] mm = supervisor != 0 ? DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap : DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap;
 22396:     int a0 = mmuTranslatePeek (a, supervisor, 1);  //a+2が必要なので上書き不可
 22397:     if ((a & 2) == 0) {  //4の倍数
 22398:       return (a0 & 1) != 0 ? -1 : mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdPls (a0);
 22399:     } else {  //4の倍数+2
 22400:       int a2 = mmuTranslatePeek (a + 2, supervisor, 1);
 22401:       return (((a0 & 1) != 0 ?    -1 : mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdPws (a0)) << 16 |
 22402:               ((a2 & 1) != 0 ? 65535 : mm[a2 >>> XEiJ.BUS_PAGE_BITS].mmdPwz (a2)));
 22403:     }
 22404:   }  //mmuPeekLongCode(int,int)
 22405: 
 22406:   //d = mmuPeekQuad (a, f)
 22407:   //  ピーククワッド
 22408:   public static long mmuPeekQuad (int a, int f) {
 22409:     return (long) mmuPeekLong (a, f) << 32 | mmuPeekLong (a + 4, f) & 0xffffffffL;
 22410:   }  //mmuPeekQuad(int,int)
 22411: 
 22412:   //d = mmuPeekQuadData (a, supervisor)
 22413:   //  ピーククワッド(データ)
 22414:   public static long mmuPeekQuadData (int a, int supervisor) {
 22415:     MemoryMappedDevice[] mm = supervisor != 0 ? DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap : DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap;
 22416:     int a0 = mmuTranslatePeek (a, supervisor, 0);  //a+1,a+2,a+3,a+4,a+5,a+6,a+7が必要なので上書き不可
 22417:     if ((a & 3) == 0) {  //4の倍数
 22418:       int a4 = mmuTranslatePeek (a + 4, supervisor, 0);  //4の倍数
 22419:       return ((long) ((a0 & 1) != 0 ? -1 : mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdPls (a0)) << 32 |
 22420:               (long) ((a4 & 1) != 0 ? -1 : mm[a4 >>> XEiJ.BUS_PAGE_BITS].mmdPls (a4)) & 0x00000000ffffffffL);
 22421:     } else if ((a & 1) == 0) {  //4の倍数+2
 22422:       int a2 = mmuTranslatePeek (a + 2, supervisor, 0);  //4の倍数
 22423:       int a6 = mmuTranslatePeek (a + 6, supervisor, 0);  //4の倍数
 22424:       return ((long) ((a0 & 1) != 0 ?    -1 : mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdPws (a0)) << 48 |
 22425:               (long) ((a2 & 1) != 0 ?    -1 : mm[a2 >>> XEiJ.BUS_PAGE_BITS].mmdPls (a2)) << 16 & 0x0000ffffffff0000L |
 22426:               (long) ((a6 & 1) != 0 ? 65535 : mm[a6 >>> XEiJ.BUS_PAGE_BITS].mmdPwz (a6)));
 22427:     } else if ((a & 3) == 1) {  //4の倍数+1
 22428:       int a1 = mmuTranslatePeek (a + 1, supervisor, 0);  //4の倍数+2
 22429:       int a3 = mmuTranslatePeek (a + 3, supervisor, 0);  //4の倍数
 22430:       int a7 = mmuTranslatePeek (a + 7, supervisor, 0);  //4の倍数
 22431:       return ((long) ((a0 & 1) != 0 ?    -1 : mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdPbs (a0)) << 56 |
 22432:               (long) ((a1 & 1) != 0 ? 65535 : mm[a1 >>> XEiJ.BUS_PAGE_BITS].mmdPwz (a1)) << 40 |
 22433:               (long) ((a3 & 1) != 0 ?    -1 : mm[a3 >>> XEiJ.BUS_PAGE_BITS].mmdPls (a3)) <<  8 & 0x000000ffffffff00L |
 22434:               (long) ((a7 & 1) != 0 ?   255 : mm[a7 >>> XEiJ.BUS_PAGE_BITS].mmdPbz (a7)));
 22435:     } else {  //4の倍数+3
 22436:       int a1 = mmuTranslatePeek (a + 1, supervisor, 0);  //4の倍数
 22437:       int a5 = mmuTranslatePeek (a + 5, supervisor, 0);  //4の倍数
 22438:       int a7 = mmuTranslatePeek (a + 7, supervisor, 0);  //4の倍数+2
 22439:       return ((long) ((a0 & 1) != 0 ?    -1 : mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdPbs (a0)) << 56 |
 22440:               (long) ((a1 & 1) != 0 ?    -1 : mm[a1 >>> XEiJ.BUS_PAGE_BITS].mmdPls (a1)) << 24 & 0x00ffffffff000000L |
 22441:               (long) ((a5 & 1) != 0 ? 65535 : mm[a5 >>> XEiJ.BUS_PAGE_BITS].mmdPwz (a5)) <<  8 |
 22442:               (long) ((a7 & 1) != 0 ?   255 : mm[a7 >>> XEiJ.BUS_PAGE_BITS].mmdPbz (a7)));
 22443:     }
 22444:   }  //mmuPeekQuadData(int,int)
 22445: 
 22446:   //d = mmuPeekQuadEven (a, supervisor)
 22447:   //  ピーククワッド(偶数)
 22448:   public static long mmuPeekQuadEven (int a, int supervisor) {
 22449:     MemoryMappedDevice[] mm = supervisor != 0 ? DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap : DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap;
 22450:     int a0 = mmuTranslatePeek (a, supervisor, 0);  //a+2,a+4,a+6が必要なので上書き不可
 22451:     if ((a & 2) == 0) {  //4の倍数
 22452:       int a4 = mmuTranslatePeek (a + 4, supervisor, 0);  //4の倍数
 22453:       return ((long) ((a0 & 1) != 0 ? -1 : mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdPls (a0)) << 32 |
 22454:               (long) ((a4 & 1) != 0 ? -1 : mm[a4 >>> XEiJ.BUS_PAGE_BITS].mmdPls (a4)) & 0x00000000ffffffffL);
 22455:     } else {  //4の倍数+2
 22456:       int a2 = mmuTranslatePeek (a + 2, supervisor, 0);  //4の倍数
 22457:       int a6 = mmuTranslatePeek (a + 6, supervisor, 0);  //4の倍数
 22458:       return ((long) ((a0 & 1) != 0 ?    -1 : mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdPws (a0)) << 48 |
 22459:               (long) ((a2 & 1) != 0 ?    -1 : mm[a2 >>> XEiJ.BUS_PAGE_BITS].mmdPls (a2)) << 16 & 0x0000ffffffff0000L |
 22460:               (long) ((a6 & 1) != 0 ? 65535 : mm[a6 >>> XEiJ.BUS_PAGE_BITS].mmdPwz (a6)));
 22461:     }
 22462:   }  //mmuPeekQuadEven(int,int)
 22463: 
 22464:   //d = mmuPeekQuadFour (a, supervisor)
 22465:   //  ピーククワッド(4の倍数)
 22466:   public static long mmuPeekQuadFour (int a, int supervisor) {
 22467:     MemoryMappedDevice[] mm = supervisor != 0 ? DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap : DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap;
 22468:     int a0 = mmuTranslatePeek (a    , supervisor, 0);  //4の倍数。a+4が必要なので上書き不可
 22469:     int a4 = mmuTranslatePeek (a + 4, supervisor, 0);  //4の倍数
 22470:     return ((long) ((a0 & 1) != 0 ? -1 : mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdPls (a0)) << 32 |
 22471:             (long) ((a4 & 1) != 0 ? -1 : mm[a4 >>> XEiJ.BUS_PAGE_BITS].mmdPls (a4)) & 0x00000000ffffffffL);
 22472:   }  //mmuPeekQuadFour(int,int)
 22473: 
 22474:   //d = mmuPeekQuadCode (a, supervisor)
 22475:   //  ピーククワッド(コード)
 22476:   public static long mmuPeekQuadCode (int a, int supervisor) {
 22477:     MemoryMappedDevice[] mm = supervisor != 0 ? DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap : DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap;
 22478:     int a0 = mmuTranslatePeek (a, supervisor, 1);  //a+2,a+4,a+6が必要なので上書き不可
 22479:     if ((a & 2) == 0) {  //4の倍数
 22480:       int a4 = mmuTranslatePeek (a + 4, supervisor, 1);
 22481:       return ((long) ((a0 & 1) != 0 ? -1 : mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdPls (a0)) << 32 |
 22482:               (long) ((a4 & 1) != 0 ? -1 : mm[a4 >>> XEiJ.BUS_PAGE_BITS].mmdPls (a4)) & 0x00000000ffffffffL);
 22483:     } else {  //4の倍数+2
 22484:       int a2 = mmuTranslatePeek (a + 2, supervisor, 1);  //4の倍数
 22485:       int a6 = mmuTranslatePeek (a + 6, supervisor, 1);  //4の倍数
 22486:       return ((long) ((a0 & 1) != 0 ?    -1 : mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdPws (a0)) << 48 |
 22487:               (long) ((a2 & 1) != 0 ?    -1 : mm[a2 >>> XEiJ.BUS_PAGE_BITS].mmdPls (a2)) << 16 & 0x0000ffffffff0000L |
 22488:               (long) ((a6 & 1) != 0 ? 65535 : mm[a6 >>> XEiJ.BUS_PAGE_BITS].mmdPwz (a6)));
 22489:     }
 22490:   }  //mmuPeekQuadCode(int,int)
 22491: 
 22492:   //mmuPeekExtended (a, b, f)
 22493:   //  ピークエクステンデッド
 22494:   public static void mmuPeekExtended (int a, byte[] b, int f) {
 22495:     for (int i = 0; i < 12; i++) {
 22496:       b[i] = mmuPeekByteSign (a + i, f);
 22497:     }
 22498:   }  //mmuPeekExtended(int,int,byte[])
 22499: 
 22500:   //len = mmuPeekStrlen (a, l)
 22501:   public static int mmuPeekStrlen (int a, int l, int supervisor) {
 22502:     for (int i = 0; i < l; i++) {
 22503:       if (mmuPeekByteZeroData (a + i, supervisor) == 0) {
 22504:         return i;
 22505:       }
 22506:     }
 22507:     return l;
 22508:   }  //mmuPeekStrlen(int,int,int)
 22509: 
 22510:   //bool = mmuPeekEquals (a, str)
 22511:   //  アドレスaから始まるSJISの文字列とstrをSJISに変換してエスケープシーケンスを展開した文字列を比較する
 22512:   //  終端の\0まで比較するときはstrに\0を含めること
 22513:   //  \x??で任意のSJISの文字を書ける
 22514:   //  SJISに変換できない文字は'※'とみなす
 22515:   //  スーパーバイザモード比較する
 22516:   public static boolean mmuPeekEquals (int a, String str) {
 22517:     int len = str.length ();
 22518:     for (int i = 0; i < len; i++) {
 22519:       int c = str.charAt (i);
 22520:       if (c == '\\') {  //エスケープシーケンス。SJIS変換を省略する
 22521:         int d = i + 1 < len ? str.charAt (i + 1) : -1;  //2文字目
 22522:         if ((d & -4) == '0') {  // \[0-3][0-7]{0,2}
 22523:           c = d & 7;
 22524:           d = i + 2 < len ? str.charAt (i + 2) : -1;  //3文字目
 22525:           if ((d & -8) == '0') {
 22526:             c = c << 3 | (d & 7);
 22527:             d = i + 3 < len ? str.charAt (i + 3) : -1;  //4文字目
 22528:             if ((d & -8) == '0') {
 22529:               c = c << 3 | (d & 7);
 22530:               i++;  //4文字
 22531:             }
 22532:             i++;  //3文字
 22533:           }
 22534:           i++;  //2文字
 22535:         } else if ((d & -4) == '4') {  // \[4-7][0-7]?
 22536:           c = d & 7;
 22537:           d = i + 2 < len ? str.charAt (i + 2) : -1;  //3文字目
 22538:           if ((d & -8) == '0') {
 22539:             c = c << 3 | (d & 7);
 22540:             i++;  //3文字
 22541:           }
 22542:           i++;  //2文字
 22543:         } else if (d == 'b') {  // \b
 22544:           c = 0x08;  //BS
 22545:           i++;  //2文字
 22546:         } else if (d == 't') {  // \t
 22547:           c = 0x09;  //HT
 22548:           i++;  //2文字
 22549:         } else if (d == 'n') {  // \n
 22550:           c = 0x0a;  //LF
 22551:           i++;  //2文字
 22552:         } else if (d == 'v') {  // \v
 22553:           c = 0x0b;  //VT
 22554:           i++;  //2文字
 22555:         } else if (d == 'f') {  // \f
 22556:           c = 0x0c;  //FF
 22557:           i++;  //2文字
 22558:         } else if (d == 'r') {  // \r
 22559:           c = 0x0d;  //CR
 22560:           i++;  //2文字
 22561:         } else if (d == 'x' &&
 22562:                    i + 3 < len &&
 22563:                    CharacterCode.chrIsXdigit (str.charAt (i + 2)) &&
 22564:                    CharacterCode.chrIsXdigit (str.charAt (i + 3))) {  // \x[0-9A-Fa-f]{2}
 22565:           c = (CharacterCode.chrDigit (str.charAt (i + 2)) << 4 |
 22566:                CharacterCode.chrDigit (str.charAt (i + 3)));
 22567:           i += 3;  //4文字
 22568:         } else if ('!' <= d && d <= '~') {
 22569:           c = d;
 22570:           i++;  //2文字
 22571:         }
 22572:         if (mmuPeekByteZeroData (a++, 1) != c) {
 22573:           return false;
 22574:         }
 22575:       } else {  //エスケープシーケンス以外
 22576:         int s = CharacterCode.chrCharToSJIS[c];
 22577:         if (s == 0 && c != 0) {
 22578:           s = 0x81a6;  //'※'
 22579:         }
 22580:         if (s >> 8 != 0) {  //2バイトコード
 22581:           if (mmuPeekByteZeroData (a++, 1) != s >> 8) {
 22582:             return false;
 22583:           }
 22584:         }
 22585:         if (mmuPeekByteZeroData (a++, 1) != (s & 0xff)) {
 22586:           return false;
 22587:         }
 22588:       }
 22589:     }  //for
 22590:     return true;
 22591:   }  //mmuPeekEquals
 22592: 
 22593:   //s = mmuPeekStringL (a, l, supervisor)
 22594:   //sb = mmuPeekStringL (sb, a, l, supervisor)
 22595:   //  ピークストリング(長さ指定)
 22596:   //  文字列を読み出す
 22597:   //  対応する文字がないときは'.'または'※'になる
 22598:   //  制御コードは'.'になる
 22599:   public static String mmuPeekStringL (int a, int l, int supervisor) {
 22600:     return mmuPeekStringL (new StringBuilder (), a, l, supervisor).toString ();
 22601:   }  //mmuPeekStringL(int,int,int)
 22602:   public static StringBuilder mmuPeekStringL (StringBuilder sb, int a, int l, int supervisor) {
 22603:     for (int i = 0; i < l; i++) {
 22604:       int s = mmuPeekByteZeroData (a + i, supervisor);
 22605:       char c;
 22606:       if (0x81 <= s && s <= 0x9f || 0xe0 <= s && s <= 0xef) {  //SJISの2バイトコードの1バイト目
 22607:         int t = i + 1 < l ? mmuPeekByteZeroData (a + i + 1, supervisor) : 0;
 22608:         if (0x40 <= t && t != 0x7f && t <= 0xfc) {  //SJISの2バイトコードの2バイト目
 22609:           c = CharacterCode.chrSJISToChar[s << 8 | t];  //2バイトで変換する
 22610:           if (c == 0) {  //対応する文字がない
 22611:             c = '※';
 22612:           }
 22613:           i++;
 22614:         } else {  //SJISの2バイトコードの2バイト目ではない
 22615:           c = '.';  //SJISの2バイトコードの1バイト目ではなかった
 22616:         }
 22617:       } else {  //SJISの2バイトコードの1バイト目ではない
 22618:         c = CharacterCode.chrSJISToChar[s];  //1バイトで変換する
 22619:         if (c < 0x20 || c == 0x7f) {  //対応する文字がないまたは制御コード
 22620:           c = '.';
 22621:         }
 22622:       }
 22623:       sb.append (c);
 22624:     }
 22625:     return sb;
 22626:   }  //mmuPeekString(StringBuilder,int,int,int)
 22627: 
 22628:   //s = mmuPeekStringZ (a, f)
 22629:   //sb = mmuPeekStringZ (sb, a, f)
 22630:   //  ピークストリング
 22631:   //  文字列をSJISからUTF-16に変換しながらメモリから読み出す
 22632:   //  '\0'の手前まで読み出す
 22633:   //  UTF-16に変換できない文字は'\ufffd'になる
 22634:   public static String mmuPeekStringZ (int a, int f) {
 22635:     return mmuPeekStringZ (new StringBuilder (), a, f).toString ();
 22636:   }  //mmuPeekStringZ(int,int)
 22637:   public static StringBuilder mmuPeekStringZ (StringBuilder sb, int a, int f) {
 22638:     for (;;) {
 22639:       int s = mmuPeekByteSign (a++, f) & 255;
 22640:       if (s == 0) {
 22641:         break;
 22642:       }
 22643:       int u;
 22644:       if (0x81 <= s && s <= 0x9f || 0xe0 <= s && s <= 0xef) {  //SJISの2バイトコードの1バイト目
 22645:         int t = mmuPeekByteSign (a++, f) & 255;
 22646:         if (t == 0) {
 22647:           sb.append ('\ufffd');
 22648:           break;
 22649:         }
 22650:         if (0x40 <= t && t != 0x7f && t <= 0xfc) {  //SJISの2バイトコードの2バイト目
 22651:           t |= s << 8;
 22652:           u = CharacterCode.chrSJISToChar[t];  //2バイトで変換する
 22653:           if (u == 0) {  //変換できない
 22654:             u = 0xfffd;
 22655:           }
 22656:         } else {  //SJISの2バイトコードの2バイト目ではない
 22657:           u = 0xfffd;
 22658:         }
 22659:       } else {  //SJISの2バイトコードの1バイト目ではない
 22660:         u = CharacterCode.chrSJISToChar[s];  //1バイトで変換する
 22661:         if (u == 0) {  //変換できない
 22662:           u = 0xfffd;
 22663:         }
 22664:       }
 22665:       sb.append ((char) u);
 22666:     }
 22667:     return sb;
 22668:   }  //mmuPeekStringZ(StringBuilder,int,int)
 22669: 
 22670:   //--------------------------------------------------------------------------------
 22671:   //リード
 22672:   //  アドレス変換はリード
 22673:   //  FSLWのRead and WriteはRead
 22674: 
 22675:   //d = mmuReadByteSignData (a, supervisor)
 22676:   //  リードバイト符号拡張(データ)
 22677:   public static byte mmuReadByteSignData (int a, int supervisor) throws M68kException {
 22678:     if (supervisor != 0) {  //スーパーバイザモード
 22679:       m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_READ | M60_FSLW_SIZE_BYTE | M60_FSLW_TM_SUPER_DATA;
 22680:       int a0 = mmuTranslateReadSuperData (a);
 22681:       return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRbs (a0);
 22682:     } else {  //ユーザモード
 22683:       m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_READ | M60_FSLW_SIZE_BYTE | M60_FSLW_TM_USER_DATA;
 22684:       int a0 = mmuTranslateReadUserData (a);
 22685:       return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRbs (a0);
 22686:     }
 22687:   }  //mmuReadByteSignData(int,int)
 22688: 
 22689:   //d = mmuReadByteZeroData (a, supervisor)
 22690:   //  リードバイトゼロ拡張(データ)
 22691:   public static int mmuReadByteZeroData (int a, int supervisor) throws M68kException {
 22692:     if (supervisor != 0) {  //スーパーバイザモード
 22693:       m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_READ | M60_FSLW_SIZE_BYTE | M60_FSLW_TM_SUPER_DATA;
 22694:       int a0 = mmuTranslateReadSuperData (a);
 22695:       return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRbz (a0);
 22696:     } else {  //ユーザモード
 22697:       m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_READ | M60_FSLW_SIZE_BYTE | M60_FSLW_TM_USER_DATA;
 22698:       int a0 = mmuTranslateReadUserData (a);
 22699:       return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRbz (a0);
 22700:     }
 22701:   }  //mmuReadByteZeroData(int,int)
 22702: 
 22703:   //d = mmuReadByteSignExword (a, supervisor)
 22704:   //  リードバイト符号拡張(拡張ワード)
 22705:   public static byte mmuReadByteSignExword (int a, int supervisor) throws M68kException {
 22706:     if (supervisor != 0) {  //スーパーバイザモード
 22707:       m60FSLW = M60_FSLW_IOMA_EXWORD | M60_FSLW_RW_READ | M60_FSLW_SIZE_BYTE | M60_FSLW_TM_SUPER_CODE;
 22708:       int a0 = mmuTranslateReadSuperCode (a);
 22709:       return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRbs (a0);
 22710:     } else {  //ユーザモード
 22711:       m60FSLW = M60_FSLW_IOMA_EXWORD | M60_FSLW_RW_READ | M60_FSLW_SIZE_BYTE | M60_FSLW_TM_USER_CODE;
 22712:       int a0 = mmuTranslateReadUserCode (a);
 22713:       return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRbs (a0);
 22714:     }
 22715:   }  //mmuReadByteSignExword(int,int)
 22716: 
 22717:   //d = mmuReadByteZeroExword (a, supervisor)
 22718:   //  リードバイトゼロ拡張(拡張ワード)
 22719:   public static int mmuReadByteZeroExword (int a, int supervisor) throws M68kException {
 22720:     if (supervisor != 0) {  //スーパーバイザモード
 22721:       m60FSLW = M60_FSLW_IOMA_EXWORD | M60_FSLW_RW_READ | M60_FSLW_SIZE_BYTE | M60_FSLW_TM_SUPER_CODE;
 22722:       int a0 = mmuTranslateReadSuperCode (a);
 22723:       return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRbz (a0);
 22724:     } else {  //ユーザモード
 22725:       m60FSLW = M60_FSLW_IOMA_EXWORD | M60_FSLW_RW_READ | M60_FSLW_SIZE_BYTE | M60_FSLW_TM_USER_CODE;
 22726:       int a0 = mmuTranslateReadUserCode (a);
 22727:       return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRbz (a0);
 22728:     }
 22729:   }  //mmuReadByteZeroExword(int,int)
 22730: 
 22731:   //d = mmuReadWordSignData (a, supervisor)
 22732:   //  リードワード符号拡張(データ)
 22733:   public static int mmuReadWordSignData (int a, int supervisor) throws M68kException {
 22734:     if (supervisor != 0) {  //スーパーバイザモード
 22735:       m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_READ | M60_FSLW_SIZE_WORD | M60_FSLW_TM_SUPER_DATA;
 22736:       int a0 = mmuTranslateReadSuperData (a);  //a+1が必要なので上書き不可
 22737:       if ((a & 1) == 0) {  //偶数
 22738:         return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRws (a0);
 22739:       } else {  //奇数
 22740:         int d0 = (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRbs (a0);
 22741:         m60FSLW ^= M60_FSLW_IOMA_FIRST ^ M60_FSLW_IOMA_SECOND;
 22742:         int a1 = mmuTranslateReadSuperData (a + 1);  //偶数
 22743:         return (d0 << 8 |
 22744:                 (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a1 >>> XEiJ.BUS_PAGE_BITS].mmdRbz (a1));
 22745:       }
 22746:     } else {  //ユーザモード
 22747:       m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_READ | M60_FSLW_SIZE_WORD | M60_FSLW_TM_USER_DATA;
 22748:       int a0 = mmuTranslateReadUserData (a);  //a+1が必要なので上書き不可
 22749:       if ((a & 1) == 0) {  //偶数
 22750:         return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRws (a0);
 22751:       } else {  //奇数
 22752:         int d0 = (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRbs (a0);
 22753:         m60FSLW ^= M60_FSLW_IOMA_FIRST ^ M60_FSLW_IOMA_SECOND;
 22754:         int a1 = mmuTranslateReadUserData (a + 1);  //偶数
 22755:         return (d0 << 8 |
 22756:                 (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a1 >>> XEiJ.BUS_PAGE_BITS].mmdRbz (a1));
 22757:       }
 22758:     }
 22759:   }  //mmuReadWordSignData(int,int)
 22760: 
 22761:   //d = mmuReadWordZeroData (a, supervisor)
 22762:   //  リードワードゼロ拡張(データ)
 22763:   public static int mmuReadWordZeroData (int a, int supervisor) throws M68kException {
 22764:     if (supervisor != 0) {  //スーパーバイザモード
 22765:       m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_READ | M60_FSLW_SIZE_WORD | M60_FSLW_TM_SUPER_DATA;
 22766:       int a0 = mmuTranslateReadSuperData (a);  //a+1が必要なので上書き不可
 22767:       if ((a & 1) == 0) {  //偶数
 22768:         return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a0);
 22769:       } else {  //奇数
 22770:         int d0 = (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRbz (a0);
 22771:         m60FSLW ^= M60_FSLW_IOMA_FIRST ^ M60_FSLW_IOMA_SECOND;
 22772:         int a1 = mmuTranslateReadSuperData (a + 1);  //偶数
 22773:         return (d0 << 8 |
 22774:                 (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a1 >>> XEiJ.BUS_PAGE_BITS].mmdRbz (a1));
 22775:       }
 22776:     } else {  //ユーザモード
 22777:       m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_READ | M60_FSLW_SIZE_WORD | M60_FSLW_TM_USER_DATA;
 22778:       int a0 = mmuTranslateReadUserData (a);  //a+1が必要なので上書き不可
 22779:       if ((a & 1) == 0) {  //偶数
 22780:         return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a0);
 22781:       } else {  //奇数
 22782:         int d0 = (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRbz (a0);
 22783:         m60FSLW ^= M60_FSLW_IOMA_FIRST ^ M60_FSLW_IOMA_SECOND;
 22784:         int a1 = mmuTranslateReadUserData (a + 1);  //偶数
 22785:         return (d0 << 8 |
 22786:                 (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a1 >>> XEiJ.BUS_PAGE_BITS].mmdRbz (a1));
 22787:       }
 22788:     }
 22789:   }  //mmuReadWordZeroData(int,int)
 22790: 
 22791:   //d = mmuReadWordSignEven (a, supervisor)
 22792:   //  リードワード符号拡張(偶数)
 22793:   public static int mmuReadWordSignEven (int a, int supervisor) throws M68kException {
 22794:     if (supervisor != 0) {  //スーパーバイザモード
 22795:       m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_READ | M60_FSLW_SIZE_WORD | M60_FSLW_TM_SUPER_DATA;
 22796:       a = mmuTranslateReadSuperData (a);
 22797:       return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a >>> XEiJ.BUS_PAGE_BITS].mmdRws (a);
 22798:     } else {  //ユーザモード
 22799:       m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_READ | M60_FSLW_SIZE_WORD | M60_FSLW_TM_USER_DATA;
 22800:       a = mmuTranslateReadUserData (a);
 22801:       return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a >>> XEiJ.BUS_PAGE_BITS].mmdRws (a);
 22802:     }
 22803:   }  //mmuReadWordSignEven(int,int)
 22804: 
 22805:   //d = mmuReadWordZeroEven (a, supervisor)
 22806:   //  リードワードゼロ拡張(偶数)
 22807:   public static int mmuReadWordZeroEven (int a, int supervisor) throws M68kException {
 22808:     if (supervisor != 0) {  //スーパーバイザモード
 22809:       m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_READ | M60_FSLW_SIZE_WORD | M60_FSLW_TM_SUPER_DATA;
 22810:       a = mmuTranslateReadSuperData (a);
 22811:       return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a);
 22812:     } else {  //ユーザモード
 22813:       m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_READ | M60_FSLW_SIZE_WORD | M60_FSLW_TM_USER_DATA;
 22814:       a = mmuTranslateReadUserData (a);
 22815:       return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a);
 22816:     }
 22817:   }  //mmuReadWordZeroEven(int,int)
 22818: 
 22819:   //d = mmuReadWordSignExword (a, supervisor)
 22820:   //  リードワード符号拡張(拡張ワード)
 22821:   public static int mmuReadWordSignExword (int a, int supervisor) throws M68kException {
 22822:     if (supervisor != 0) {  //スーパーバイザモード
 22823:       m60FSLW = M60_FSLW_IOMA_EXWORD | M60_FSLW_RW_READ | M60_FSLW_SIZE_WORD | M60_FSLW_TM_SUPER_CODE;
 22824:       a = mmuTranslateReadSuperCode (a);
 22825:       return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a >>> XEiJ.BUS_PAGE_BITS].mmdRws (a);
 22826:     } else {  //ユーザモード
 22827:       m60FSLW = M60_FSLW_IOMA_EXWORD | M60_FSLW_RW_READ | M60_FSLW_SIZE_WORD | M60_FSLW_TM_USER_CODE;
 22828:       a = mmuTranslateReadUserCode (a);
 22829:       return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a >>> XEiJ.BUS_PAGE_BITS].mmdRws (a);
 22830:     }
 22831:   }  //mmuReadWordSignExword(int,int)
 22832: 
 22833:   //d = mmuReadWordZeroExword (a, supervisor)
 22834:   //  リードワードゼロ拡張(拡張ワード)
 22835:   public static int mmuReadWordZeroExword (int a, int supervisor) throws M68kException {
 22836:     if (supervisor != 0) {  //スーパーバイザモード
 22837:       m60FSLW = M60_FSLW_IOMA_EXWORD | M60_FSLW_RW_READ | M60_FSLW_SIZE_WORD | M60_FSLW_TM_SUPER_CODE;
 22838:       a = mmuTranslateReadSuperCode (a);
 22839:       return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a);
 22840:     } else {  //ユーザモード
 22841:       m60FSLW = M60_FSLW_IOMA_EXWORD | M60_FSLW_RW_READ | M60_FSLW_SIZE_WORD | M60_FSLW_TM_USER_CODE;
 22842:       a = mmuTranslateReadUserCode (a);
 22843:       return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a);
 22844:     }
 22845:   }  //mmuReadWordZeroExword(int,int)
 22846: 
 22847:   //d = mmuReadWordSignOpword (a, supervisor)
 22848:   //  リードワード符号拡張(命令ワード)
 22849:   public static int mmuReadWordSignOpword (int a, int supervisor) throws M68kException {
 22850:     if (supervisor != 0) {  //スーパーバイザモード
 22851:       m60FSLW = M60_FSLW_IOMA_OPWORD | M60_FSLW_RW_READ | M60_FSLW_SIZE_WORD | M60_FSLW_TM_SUPER_CODE;
 22852:       a = mmuTranslateReadSuperCode (a);
 22853:       return (InstructionBreakPoint.IBP_ON ? InstructionBreakPoint.ibpOp1SuperMap : DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a >>> XEiJ.BUS_PAGE_BITS].mmdRws (a);
 22854:     } else {  //ユーザモード
 22855:       m60FSLW = M60_FSLW_IOMA_OPWORD | M60_FSLW_RW_READ | M60_FSLW_SIZE_WORD | M60_FSLW_TM_USER_CODE;
 22856:       a = mmuTranslateReadUserCode (a);
 22857:       return (InstructionBreakPoint.IBP_ON ? InstructionBreakPoint.ibpOp1UserMap : DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a >>> XEiJ.BUS_PAGE_BITS].mmdRws (a);
 22858:     }
 22859:   }  //mmuReadWordSignOpword(int,int)
 22860: 
 22861:   //d = mmuReadWordZeroOpword (a, supervisor)
 22862:   //  リードワードゼロ拡張(命令ワード)
 22863:   public static int mmuReadWordZeroOpword (int a, int supervisor) throws M68kException {
 22864:     if (supervisor != 0) {  //スーパーバイザモード
 22865:       m60FSLW = M60_FSLW_IOMA_OPWORD | M60_FSLW_RW_READ | M60_FSLW_SIZE_WORD | M60_FSLW_TM_SUPER_CODE;
 22866:       a = mmuTranslateReadSuperCode (a);
 22867:       return (InstructionBreakPoint.IBP_ON ? InstructionBreakPoint.ibpOp1SuperMap : DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a);
 22868:     } else {  //ユーザモード
 22869:       m60FSLW = M60_FSLW_IOMA_OPWORD | M60_FSLW_RW_READ | M60_FSLW_SIZE_WORD | M60_FSLW_TM_USER_CODE;
 22870:       a = mmuTranslateReadUserCode (a);
 22871:       return (InstructionBreakPoint.IBP_ON ? InstructionBreakPoint.ibpOp1UserMap : DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a);
 22872:     }
 22873:   }  //mmuReadWordZeroOpword(int,int)
 22874: 
 22875:   //d = mmuReadLongData (a, supervisor)
 22876:   //  リードロング(データ)
 22877:   public static int mmuReadLongData (int a, int supervisor) throws M68kException {
 22878:     if (supervisor != 0) {  //スーパーバイザモード
 22879:       m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_READ | M60_FSLW_SIZE_LONG | M60_FSLW_TM_SUPER_DATA;
 22880:       int a0 = mmuTranslateReadSuperData (a);  //a+1,a+2,a+3が必要なので上書き不可
 22881:       if ((a & 3) == 0) {  //4の倍数
 22882:         return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRls (a0);
 22883:       } else if ((a & 1) == 0) {  //4の倍数+2
 22884:         int d0 = (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRws (a0);
 22885:         m60FSLW ^= M60_FSLW_IOMA_FIRST ^ M60_FSLW_IOMA_SECOND;
 22886:         int a2 = mmuTranslateReadSuperData (a + 2);  //偶数
 22887:         return (d0 << 16 |
 22888:                 (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a2 >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a2));
 22889:       } else {  //奇数
 22890:         int d0 = (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRbs (a0);
 22891:         m60FSLW ^= M60_FSLW_IOMA_FIRST ^ M60_FSLW_IOMA_SECOND;
 22892:         int a1 = mmuTranslateReadSuperData (a + 1);  //偶数
 22893:         int a3 = mmuTranslateReadSuperData (a + 3);  //偶数
 22894:         return (d0 << 24 |
 22895:                 (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a1 >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a1) << 8 |
 22896:                 (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a3 >>> XEiJ.BUS_PAGE_BITS].mmdRbz (a3));
 22897:       }
 22898:     } else {  //ユーザモード
 22899:       m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_READ | M60_FSLW_SIZE_LONG | M60_FSLW_TM_USER_DATA;
 22900:       int a0 = mmuTranslateReadUserData (a);  //a+1,a+2,a+3が必要なので上書き不可
 22901:       if ((a & 3) == 0) {  //4の倍数
 22902:         return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRls (a0);
 22903:       } else if ((a & 1) == 0) {  //4の倍数+2
 22904:         int d0 = (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRws (a0);
 22905:         m60FSLW ^= M60_FSLW_IOMA_FIRST ^ M60_FSLW_IOMA_SECOND;
 22906:         int a2 = mmuTranslateReadUserData (a + 2);  //偶数
 22907:         return (d0 << 16 |
 22908:                 (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a2 >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a2));
 22909:       } else {  //奇数
 22910:         int d0 = (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRbs (a0);
 22911:         m60FSLW ^= M60_FSLW_IOMA_FIRST ^ M60_FSLW_IOMA_SECOND;
 22912:         int a1 = mmuTranslateReadUserData (a + 1);  //偶数
 22913:         int a3 = mmuTranslateReadUserData (a + 3);  //偶数
 22914:         return (d0 << 24 |
 22915:                 (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a1 >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a1) << 8 |
 22916:                 (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a3 >>> XEiJ.BUS_PAGE_BITS].mmdRbz (a3));
 22917:       }
 22918:     }
 22919:   }  //mmuReadLongData(int,int)
 22920: 
 22921:   //d = mmuReadLongEven (a, supervisor)
 22922:   //  リードロング(偶数)
 22923:   public static int mmuReadLongEven (int a, int supervisor) throws M68kException {
 22924:     if (supervisor != 0) {  //スーパーバイザモード
 22925:       m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_READ | M60_FSLW_SIZE_LONG | M60_FSLW_TM_SUPER_DATA;
 22926:       int a0 = mmuTranslateReadSuperData (a);  //a+2が必要なので上書き不可
 22927:       if ((a & 2) == 0) {  //4の倍数
 22928:         return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRls (a0);
 22929:       } else {  //4の倍数+2
 22930:         int d0 = (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRws (a0);
 22931:         m60FSLW ^= M60_FSLW_IOMA_FIRST ^ M60_FSLW_IOMA_SECOND;
 22932:         int a2 = mmuTranslateReadSuperData (a + 2);  //偶数
 22933:         return (d0 << 16 |
 22934:                 (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a2 >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a2));
 22935:       }
 22936:     } else {  //ユーザモード
 22937:       m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_READ | M60_FSLW_SIZE_LONG | M60_FSLW_TM_USER_DATA;
 22938:       int a0 = mmuTranslateReadUserData (a);  //a+2が必要なので上書き不可
 22939:       if ((a & 2) == 0) {  //4の倍数
 22940:         return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRls (a0);
 22941:       } else {  //4の倍数+2
 22942:         int d0 = (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRws (a0);
 22943:         m60FSLW ^= M60_FSLW_IOMA_FIRST ^ M60_FSLW_IOMA_SECOND;
 22944:         int a2 = mmuTranslateReadUserData (a + 2);  //偶数
 22945:         return (d0 << 16 |
 22946:                 (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a2 >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a2));
 22947:       }
 22948:     }
 22949:   }  //mmuReadLongEven(int,int)
 22950: 
 22951:   //d = mmuReadLongExword (a, supervisor)
 22952:   //  リードロング(拡張ワード)
 22953:   public static int mmuReadLongExword (int a, int supervisor) throws M68kException {
 22954:     if (supervisor != 0) {  //スーパーバイザモード
 22955:       m60FSLW = M60_FSLW_IOMA_EXWORD | M60_FSLW_RW_READ | M60_FSLW_SIZE_LONG | M60_FSLW_TM_SUPER_CODE;
 22956:       int a0 = mmuTranslateReadSuperData (a);  //a+2が必要なので上書き不可
 22957:       if ((a & 2) == 0) {  //4の倍数
 22958:         return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRls (a0);
 22959:       } else {  //4の倍数+2
 22960:         int a2 = mmuTranslateReadSuperData (a + 2);  //偶数
 22961:         return ((DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRws (a0) << 16 |
 22962:                 (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a2 >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a2));
 22963:       }
 22964:     } else {  //ユーザモード
 22965:       m60FSLW = M60_FSLW_IOMA_EXWORD | M60_FSLW_RW_READ | M60_FSLW_SIZE_LONG | M60_FSLW_TM_USER_CODE;
 22966:       int a0 = mmuTranslateReadUserData (a);  //a+2が必要なので上書き不可
 22967:       if ((a & 2) == 0) {  //4の倍数
 22968:         return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRls (a0);
 22969:       } else {  //4の倍数+2
 22970:         int a2 = mmuTranslateReadUserData (a + 2);  //偶数
 22971:         return ((DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRws (a0) << 16 |
 22972:                 (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a2 >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a2));
 22973:       }
 22974:     }
 22975:   }  //mmuReadLongExword(int,int)
 22976: 
 22977:   //d = mmuReadLongFour (a, supervisor)
 22978:   //  リードロング(4の倍数)
 22979:   public static int mmuReadLongFour (int a, int supervisor) throws M68kException {
 22980:     if (supervisor != 0) {  //スーパーバイザモード
 22981:       m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_READ | M60_FSLW_SIZE_LONG | M60_FSLW_TM_SUPER_DATA;
 22982:       a = mmuTranslateReadSuperData (a);
 22983:       return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a >>> XEiJ.BUS_PAGE_BITS].mmdRls (a);
 22984:     } else {  //ユーザモード
 22985:       m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_READ | M60_FSLW_SIZE_LONG | M60_FSLW_TM_USER_DATA;
 22986:       a = mmuTranslateReadUserData (a);
 22987:       return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a >>> XEiJ.BUS_PAGE_BITS].mmdRls (a);
 22988:     }
 22989:   }  //mmuReadLongFour(int,int)
 22990: 
 22991:   //l = mmuReadQuadData (a, supervisor)
 22992:   //  リードクワッド(データ)
 22993:   public static long mmuReadQuadData (int a, int supervisor) throws M68kException {
 22994:     long d;
 22995:     if (supervisor != 0) {  //スーパーバイザモード
 22996:       final MemoryMappedDevice[] map = DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap;
 22997:       m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_READ | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_SUPER_DATA;
 22998:       int t = mmuTranslateReadSuperData (a);
 22999:       if ((a & 3) == 0) {  //4n
 23000:         d = (long) map[t >>> XEiJ.BUS_PAGE_BITS].mmdRls (t);
 23001:         m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_READ | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_SUPER_DATA;
 23002:         t = mmuTranslateReadSuperData (a + 4);
 23003:         d = d << 32 | (0xffffffffL & (long) map[t >>> XEiJ.BUS_PAGE_BITS].mmdRls (t));
 23004:       } else if ((a & 1) == 0) {  //4n+2
 23005:         d = (long) map[t >>> XEiJ.BUS_PAGE_BITS].mmdRws (t);
 23006:         m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_READ | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_SUPER_DATA;
 23007:         t = mmuTranslateReadSuperData (a + 2);
 23008:         d = d << 32 | (0xffffffffL & (long) map[t >>> XEiJ.BUS_PAGE_BITS].mmdRls (t));
 23009:         m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_READ | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_SUPER_DATA;
 23010:         t = mmuTranslateReadSuperData (a + 6);
 23011:         d = d << 16 | (long) map[t >>> XEiJ.BUS_PAGE_BITS].mmdRwz (t);
 23012:       } else if ((a & 3) == 1) {  //4n+1
 23013:         d = (long) map[t >>> XEiJ.BUS_PAGE_BITS].mmdRbs (t);
 23014:         m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_READ | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_SUPER_DATA;
 23015:         t = mmuTranslateReadSuperData (a + 1);
 23016:         d = d << 16 | (long) map[t >>> XEiJ.BUS_PAGE_BITS].mmdRwz (t);
 23017:         m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_READ | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_SUPER_DATA;
 23018:         t = mmuTranslateReadSuperData (a + 3);
 23019:         d = d << 32 | (0xffffffffL & (long) map[t >>> XEiJ.BUS_PAGE_BITS].mmdRls (t));
 23020:         m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_READ | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_SUPER_DATA;
 23021:         t = mmuTranslateReadSuperData (a + 7);
 23022:         d = d << 8 | (long) map[t >>> XEiJ.BUS_PAGE_BITS].mmdRbz (t);
 23023:       } else {  //  //4n+3
 23024:         d = (long) map[t >>> XEiJ.BUS_PAGE_BITS].mmdRbs (t);
 23025:         m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_READ | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_SUPER_DATA;
 23026:         t = mmuTranslateReadSuperData (a + 1);
 23027:         d = d << 32 | (0xffffffffL & (long) map[t >>> XEiJ.BUS_PAGE_BITS].mmdRls (t));
 23028:         m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_READ | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_SUPER_DATA;
 23029:         t = mmuTranslateReadSuperData (a + 5);
 23030:         d = d << 16 | (long) map[t >>> XEiJ.BUS_PAGE_BITS].mmdRwz (t);
 23031:         m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_READ | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_SUPER_DATA;
 23032:         t = mmuTranslateReadSuperData (a + 7);
 23033:         d = d << 8 | (long) map[t >>> XEiJ.BUS_PAGE_BITS].mmdRbz (t);
 23034:       }
 23035:     } else {  //ユーザモード
 23036:       final MemoryMappedDevice[] map = DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap;
 23037:       m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_READ | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_USER_DATA;
 23038:       int t = mmuTranslateReadUserData (a);
 23039:       if ((a & 3) == 0) {  //4n
 23040:         d = (long) map[t >>> XEiJ.BUS_PAGE_BITS].mmdRls (t);
 23041:         m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_READ | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_USER_DATA;
 23042:         t = mmuTranslateReadUserData (a + 4);
 23043:         d = d << 32 | (0xffffffffL & (long) map[t >>> XEiJ.BUS_PAGE_BITS].mmdRls (t));
 23044:       } else if ((a & 1) == 0) {  //4n+2
 23045:         d = (long) map[t >>> XEiJ.BUS_PAGE_BITS].mmdRws (t);
 23046:         m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_READ | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_USER_DATA;
 23047:         t = mmuTranslateReadUserData (a + 2);
 23048:         d = d << 32 | (0xffffffffL & (long) map[t >>> XEiJ.BUS_PAGE_BITS].mmdRls (t));
 23049:         m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_READ | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_USER_DATA;
 23050:         t = mmuTranslateReadUserData (a + 6);
 23051:         d = d << 16 | (long) map[t >>> XEiJ.BUS_PAGE_BITS].mmdRwz (t);
 23052:       } else if ((a & 3) == 1) {  //4n+1
 23053:         d = (long) map[t >>> XEiJ.BUS_PAGE_BITS].mmdRbs (t);
 23054:         m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_READ | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_USER_DATA;
 23055:         t = mmuTranslateReadUserData (a + 1);
 23056:         d = d << 16 | (long) map[t >>> XEiJ.BUS_PAGE_BITS].mmdRwz (t);
 23057:         m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_READ | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_USER_DATA;
 23058:         t = mmuTranslateReadUserData (a + 3);
 23059:         d = d << 32 | (0xffffffffL & (long) map[t >>> XEiJ.BUS_PAGE_BITS].mmdRls (t));
 23060:         m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_READ | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_USER_DATA;
 23061:         t = mmuTranslateReadUserData (a + 7);
 23062:         d = d << 8 | (long) map[t >>> XEiJ.BUS_PAGE_BITS].mmdRbz (t);
 23063:       } else {  //  //4n+3
 23064:         d = (long) map[t >>> XEiJ.BUS_PAGE_BITS].mmdRbs (t);
 23065:         m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_READ | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_USER_DATA;
 23066:         t = mmuTranslateReadUserData (a + 1);
 23067:         d = d << 32 | (0xffffffffL & (long) map[t >>> XEiJ.BUS_PAGE_BITS].mmdRls (t));
 23068:         m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_READ | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_USER_DATA;
 23069:         t = mmuTranslateReadUserData (a + 5);
 23070:         d = d << 16 | (long) map[t >>> XEiJ.BUS_PAGE_BITS].mmdRwz (t);
 23071:         m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_READ | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_USER_DATA;
 23072:         t = mmuTranslateReadUserData (a + 7);
 23073:         d = d << 8 | (long) map[t >>> XEiJ.BUS_PAGE_BITS].mmdRbz (t);
 23074:       }
 23075:     }
 23076:     return d;
 23077:   }  //mmuReadQuadData(int,int)
 23078: 
 23079:   //l = mmuReadQuadSecond (a, supervisor)
 23080:   //  リードクワッド(2番目)
 23081:   //  エクステンデッドとラインの2番目で使う
 23082:   public static long mmuReadQuadSecond (int a, int supervisor) throws M68kException {
 23083:     long d;
 23084:     if (supervisor != 0) {  //スーパーバイザモード
 23085:       final MemoryMappedDevice[] map = DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap;
 23086:       m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_READ | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_SUPER_DATA;
 23087:       int t = mmuTranslateReadSuperData (a);
 23088:       if ((a & 3) == 0) {  //4n
 23089:         d = (long) map[t >>> XEiJ.BUS_PAGE_BITS].mmdRls (t);
 23090:         m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_READ | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_SUPER_DATA;
 23091:         t = mmuTranslateReadSuperData (a + 4);
 23092:         d = d << 32 | (0xffffffffL & (long) map[t >>> XEiJ.BUS_PAGE_BITS].mmdRls (t));
 23093:       } else if ((a & 1) == 0) {  //4n+2
 23094:         d = (long) map[t >>> XEiJ.BUS_PAGE_BITS].mmdRws (t);
 23095:         m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_READ | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_SUPER_DATA;
 23096:         t = mmuTranslateReadSuperData (a + 2);
 23097:         d = d << 32 | (0xffffffffL & (long) map[t >>> XEiJ.BUS_PAGE_BITS].mmdRls (t));
 23098:         m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_READ | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_SUPER_DATA;
 23099:         t = mmuTranslateReadSuperData (a + 6);
 23100:         d = d << 16 | (long) map[t >>> XEiJ.BUS_PAGE_BITS].mmdRwz (t);
 23101:       } else if ((a & 3) == 1) {  //4n+1
 23102:         d = (long) map[t >>> XEiJ.BUS_PAGE_BITS].mmdRbs (t);
 23103:         m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_READ | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_SUPER_DATA;
 23104:         t = mmuTranslateReadSuperData (a + 1);
 23105:         d = d << 16 | (long) map[t >>> XEiJ.BUS_PAGE_BITS].mmdRwz (t);
 23106:         m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_READ | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_SUPER_DATA;
 23107:         t = mmuTranslateReadSuperData (a + 3);
 23108:         d = d << 32 | (0xffffffffL & (long) map[t >>> XEiJ.BUS_PAGE_BITS].mmdRls (t));
 23109:         m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_READ | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_SUPER_DATA;
 23110:         t = mmuTranslateReadSuperData (a + 7);
 23111:         d = d << 8 | (long) map[t >>> XEiJ.BUS_PAGE_BITS].mmdRbz (t);
 23112:       } else {  //  //4n+3
 23113:         d = (long) map[t >>> XEiJ.BUS_PAGE_BITS].mmdRbs (t);
 23114:         m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_READ | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_SUPER_DATA;
 23115:         t = mmuTranslateReadSuperData (a + 1);
 23116:         d = d << 32 | (0xffffffffL & (long) map[t >>> XEiJ.BUS_PAGE_BITS].mmdRls (t));
 23117:         m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_READ | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_SUPER_DATA;
 23118:         t = mmuTranslateReadSuperData (a + 5);
 23119:         d = d << 16 | (long) map[t >>> XEiJ.BUS_PAGE_BITS].mmdRwz (t);
 23120:         m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_READ | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_SUPER_DATA;
 23121:         t = mmuTranslateReadSuperData (a + 7);
 23122:         d = d << 8 | (long) map[t >>> XEiJ.BUS_PAGE_BITS].mmdRbz (t);
 23123:       }
 23124:     } else {  //ユーザモード
 23125:       final MemoryMappedDevice[] map = DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap;
 23126:       m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_READ | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_USER_DATA;
 23127:       int t = mmuTranslateReadUserData (a);
 23128:       if ((a & 3) == 0) {  //4n
 23129:         d = (long) map[t >>> XEiJ.BUS_PAGE_BITS].mmdRls (t);
 23130:         m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_READ | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_USER_DATA;
 23131:         t = mmuTranslateReadUserData (a + 4);
 23132:         d = d << 32 | (0xffffffffL & (long) map[t >>> XEiJ.BUS_PAGE_BITS].mmdRls (t));
 23133:       } else if ((a & 1) == 0) {  //4n+2
 23134:         d = (long) map[t >>> XEiJ.BUS_PAGE_BITS].mmdRws (t);
 23135:         m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_READ | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_USER_DATA;
 23136:         t = mmuTranslateReadUserData (a + 2);
 23137:         d = d << 32 | (0xffffffffL & (long) map[t >>> XEiJ.BUS_PAGE_BITS].mmdRls (t));
 23138:         m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_READ | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_USER_DATA;
 23139:         t = mmuTranslateReadUserData (a + 6);
 23140:         d = d << 16 | (long) map[t >>> XEiJ.BUS_PAGE_BITS].mmdRwz (t);
 23141:       } else if ((a & 3) == 1) {  //4n+1
 23142:         d = (long) map[t >>> XEiJ.BUS_PAGE_BITS].mmdRbs (t);
 23143:         m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_READ | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_USER_DATA;
 23144:         t = mmuTranslateReadUserData (a + 1);
 23145:         d = d << 16 | (long) map[t >>> XEiJ.BUS_PAGE_BITS].mmdRwz (t);
 23146:         m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_READ | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_USER_DATA;
 23147:         t = mmuTranslateReadUserData (a + 3);
 23148:         d = d << 32 | (0xffffffffL & (long) map[t >>> XEiJ.BUS_PAGE_BITS].mmdRls (t));
 23149:         m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_READ | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_USER_DATA;
 23150:         t = mmuTranslateReadUserData (a + 7);
 23151:         d = d << 8 | (long) map[t >>> XEiJ.BUS_PAGE_BITS].mmdRbz (t);
 23152:       } else {  //  //4n+3
 23153:         d = (long) map[t >>> XEiJ.BUS_PAGE_BITS].mmdRbs (t);
 23154:         m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_READ | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_USER_DATA;
 23155:         t = mmuTranslateReadUserData (a + 1);
 23156:         d = d << 32 | (0xffffffffL & (long) map[t >>> XEiJ.BUS_PAGE_BITS].mmdRls (t));
 23157:         m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_READ | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_USER_DATA;
 23158:         t = mmuTranslateReadUserData (a + 5);
 23159:         d = d << 16 | (long) map[t >>> XEiJ.BUS_PAGE_BITS].mmdRwz (t);
 23160:         m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_READ | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_USER_DATA;
 23161:         t = mmuTranslateReadUserData (a + 7);
 23162:         d = d << 8 | (long) map[t >>> XEiJ.BUS_PAGE_BITS].mmdRbz (t);
 23163:       }
 23164:     }
 23165:     return d;
 23166:   }  //mmuReadQuadSecond(int,int)
 23167: 
 23168:   //l = mmuReadQuadExword (a, supervisor)
 23169:   //  リードクワッド(拡張ワード)
 23170:   //  イミディエイトで使う
 23171:   public static long mmuReadQuadExword (int a, int supervisor) throws M68kException {
 23172:     if (supervisor != 0) {  //スーパーバイザモード
 23173:       m60FSLW = M60_FSLW_IOMA_EXWORD | M60_FSLW_RW_READ | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_SUPER_CODE;
 23174:       int a0 = mmuTranslateReadSuperData (a);  //a+2,a+4,a+6が必要なので上書き不可
 23175:       if ((a & 2) == 0) {  //4の倍数
 23176:         int a4 = mmuTranslateReadSuperData (a + 4);  //4の倍数
 23177:         return ((long) (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRls (a0) << 32 |
 23178:                 (long) (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a4 >>> XEiJ.BUS_PAGE_BITS].mmdRls (a4) & 0x00000000ffffffffL);
 23179:       } else {  //4の倍数+2
 23180:         int a2 = mmuTranslateReadSuperData (a + 2);  //4の倍数
 23181:         int a6 = mmuTranslateReadSuperData (a + 6);  //4の倍数
 23182:         return ((long) (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRws (a0) << 48 |
 23183:                 (long) (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a2 >>> XEiJ.BUS_PAGE_BITS].mmdRls (a2) << 16 & 0x0000ffffffff0000L |
 23184:                 (long) (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a6 >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a6));
 23185:       }
 23186:     } else {  //ユーザモード
 23187:       m60FSLW = M60_FSLW_IOMA_EXWORD | M60_FSLW_RW_READ | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_USER_CODE;
 23188:       int a0 = mmuTranslateReadUserData (a);  //a+2,a+4,a+6が必要なので上書き不可
 23189:       if ((a & 2) == 0) {  //4の倍数
 23190:         int a4 = mmuTranslateReadUserData (a + 4);  //4の倍数
 23191:         return ((long) (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRls (a0) << 32 |
 23192:                 (long) (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a4 >>> XEiJ.BUS_PAGE_BITS].mmdRls (a4) & 0x00000000ffffffffL);
 23193:       } else {  //4の倍数+2
 23194:         int a2 = mmuTranslateReadUserData (a + 2);  //4の倍数
 23195:         int a6 = mmuTranslateReadUserData (a + 6);  //4の倍数
 23196:         return ((long) (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRws (a0) << 48 |
 23197:                 (long) (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a2 >>> XEiJ.BUS_PAGE_BITS].mmdRls (a2) << 16 & 0x0000ffffffff0000L |
 23198:                 (long) (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a6 >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a6));
 23199:       }
 23200:     }
 23201:   }  //mmuReadQuadExword(int,int)
 23202: 
 23203:   //--------------------------------------------------------------------------------
 23204:   //リードモディファイライトのリード
 23205:   //  アドレス変換はライト
 23206:   //  FSLWのRead and WriteはRead-Modify-Write
 23207: 
 23208:   //d = mmuModifyByteSignData (a, supervisor)
 23209:   //  リードモディファイライトのリードバイト符号拡張(データ)
 23210:   public static byte mmuModifyByteSignData (int a, int supervisor) throws M68kException {
 23211:     if (supervisor != 0) {  //スーパーバイザモード
 23212:       m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_MODIFY | M60_FSLW_SIZE_BYTE | M60_FSLW_TM_SUPER_DATA;
 23213:       int a0 = mmuTranslateWriteSuperData (a);
 23214:       return (a ^ a0) == 1 ? -1 : (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRbs (a0);
 23215:     } else {  //ユーザモード
 23216:       m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_MODIFY | M60_FSLW_SIZE_BYTE | M60_FSLW_TM_USER_DATA;
 23217:       int a0 = mmuTranslateWriteUserData (a);
 23218:       return (a ^ a0) == 1 ? -1 : (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRbs (a0);
 23219:     }
 23220:   }  //mmuModifyByteSignData(int,int)
 23221: 
 23222:   //d = mmuModifyByteZeroData (a, supervisor)
 23223:   //  リードモディファイライトのリードバイトゼロ拡張(データ)
 23224:   public static int mmuModifyByteZeroData (int a, int supervisor) throws M68kException {
 23225:     if (supervisor != 0) {  //スーパーバイザモード
 23226:       m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_MODIFY | M60_FSLW_SIZE_BYTE | M60_FSLW_TM_SUPER_DATA;
 23227:       int a0 = mmuTranslateWriteSuperData (a);
 23228:       return (a ^ a0) == 1 ? 255 : (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRbz (a0);
 23229:     } else {  //ユーザモード
 23230:       m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_MODIFY | M60_FSLW_SIZE_BYTE | M60_FSLW_TM_USER_DATA;
 23231:       int a0 = mmuTranslateWriteUserData (a);
 23232:       return (a ^ a0) == 1 ? 255 : (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRbz (a0);
 23233:     }
 23234:   }  //mmuModifyByteZeroData(int,int)
 23235: 
 23236:   //d = mmuModifyWordSignData (a, supervisor)
 23237:   //  リードモディファイライトのリードワード符号拡張(データ)
 23238:   public static int mmuModifyWordSignData (int a, int supervisor) throws M68kException {
 23239:     if (supervisor != 0) {  //スーパーバイザモード
 23240:       m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_MODIFY | M60_FSLW_SIZE_WORD | M60_FSLW_TM_SUPER_DATA;
 23241:       int a0 = mmuTranslateWriteSuperData (a);  //a+1が必要なので上書き不可
 23242:       if ((a & 1) == 0) {  //偶数
 23243:         return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRws (a0);
 23244:       } else {  //奇数
 23245:         int d0 = (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRbs (a0);
 23246:         m60FSLW ^= M60_FSLW_IOMA_FIRST ^ M60_FSLW_IOMA_SECOND;
 23247:         int a1 = mmuTranslateWriteSuperData (a + 1);  //偶数
 23248:         return (d0 << 8 |
 23249:                 (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a1 >>> XEiJ.BUS_PAGE_BITS].mmdRbz (a1));
 23250:       }
 23251:     } else {  //ユーザモード
 23252:       m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_MODIFY | M60_FSLW_SIZE_WORD | M60_FSLW_TM_USER_DATA;
 23253:       int a0 = mmuTranslateWriteUserData (a);  //a+1が必要なので上書き不可
 23254:       if ((a & 1) == 0) {  //偶数
 23255:         return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRws (a0);
 23256:       } else {  //奇数
 23257:         int d0 = (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRbs (a0);
 23258:         m60FSLW ^= M60_FSLW_IOMA_FIRST ^ M60_FSLW_IOMA_SECOND;
 23259:         int a1 = mmuTranslateWriteUserData (a + 1);  //偶数
 23260:         return (d0 << 8 |
 23261:                 (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a1 >>> XEiJ.BUS_PAGE_BITS].mmdRbz (a1));
 23262:       }
 23263:     }
 23264:   }  //mmuModifyWordSignData(int,int)
 23265: 
 23266:   //d = mmuModifyWordZeroData (a, supervisor)
 23267:   //  リードモディファイライトのリードワードゼロ拡張(データ)
 23268:   public static int mmuModifyWordZeroData (int a, int supervisor) throws M68kException {
 23269:     if (supervisor != 0) {  //スーパーバイザモード
 23270:       m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_MODIFY | M60_FSLW_SIZE_WORD | M60_FSLW_TM_SUPER_DATA;
 23271:       int a0 = mmuTranslateWriteSuperData (a);  //a+1が必要なので上書き不可
 23272:       if ((a & 1) == 0) {  //偶数
 23273:         return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a0);
 23274:       } else {  //奇数
 23275:         int d0 = (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRbz (a0);
 23276:         m60FSLW ^= M60_FSLW_IOMA_FIRST ^ M60_FSLW_IOMA_SECOND;
 23277:         int a1 = mmuTranslateWriteSuperData (a + 1);  //偶数
 23278:         return (d0 << 8 |
 23279:                 (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a1 >>> XEiJ.BUS_PAGE_BITS].mmdRbz (a1));
 23280:       }
 23281:     } else {  //ユーザモード
 23282:       m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_MODIFY | M60_FSLW_SIZE_WORD | M60_FSLW_TM_USER_DATA;
 23283:       int a0 = mmuTranslateWriteUserData (a);  //a+1が必要なので上書き不可
 23284:       if ((a & 1) == 0) {  //偶数
 23285:         return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a0);
 23286:       } else {  //奇数
 23287:         int d0 = (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRbz (a0);
 23288:         m60FSLW ^= M60_FSLW_IOMA_FIRST ^ M60_FSLW_IOMA_SECOND;
 23289:         int a1 = mmuTranslateWriteUserData (a + 1);  //偶数
 23290:         return (d0 << 8 |
 23291:                 (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a1 >>> XEiJ.BUS_PAGE_BITS].mmdRbz (a1));
 23292:       }
 23293:     }
 23294:   }  //mmuModifyWordZeroData(int,int)
 23295: 
 23296:   //d = mmuModifyWordSignEven (a, supervisor)
 23297:   //  リードモディファイライトのリードワード符号拡張(偶数)
 23298:   public static int mmuModifyWordSignEven (int a, int supervisor) throws M68kException {
 23299:     if (supervisor != 0) {  //スーパーバイザモード
 23300:       m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_MODIFY | M60_FSLW_SIZE_WORD | M60_FSLW_TM_SUPER_DATA;
 23301:       a = mmuTranslateWriteSuperData (a);
 23302:       return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a >>> XEiJ.BUS_PAGE_BITS].mmdRws (a);
 23303:     } else {  //ユーザモード
 23304:       m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_MODIFY | M60_FSLW_SIZE_WORD | M60_FSLW_TM_USER_DATA;
 23305:       a = mmuTranslateWriteUserData (a);
 23306:       return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a >>> XEiJ.BUS_PAGE_BITS].mmdRws (a);
 23307:     }
 23308:   }  //mmuModifyWordSignEven(int,int)
 23309: 
 23310:   //d = mmuModifyWordZeroEven (a, supervisor)
 23311:   //  リードモディファイライトのリードワードゼロ拡張(偶数)
 23312:   public static int mmuModifyWordZeroEven (int a, int supervisor) throws M68kException {
 23313:     if (supervisor != 0) {  //スーパーバイザモード
 23314:       m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_MODIFY | M60_FSLW_SIZE_WORD | M60_FSLW_TM_SUPER_DATA;
 23315:       a = mmuTranslateWriteSuperData (a);
 23316:       return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a);
 23317:     } else {  //ユーザモード
 23318:       m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_MODIFY | M60_FSLW_SIZE_WORD | M60_FSLW_TM_USER_DATA;
 23319:       a = mmuTranslateWriteUserData (a);
 23320:       return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a);
 23321:     }
 23322:   }  //mmuModifyWordZeroEven(int,int)
 23323: 
 23324:   //d = mmuModifyLongData (a, supervisor)
 23325:   //  リードモディファイライトのリードロング(データ)
 23326:   public static int mmuModifyLongData (int a, int supervisor) throws M68kException {
 23327:     if (supervisor != 0) {  //スーパーバイザモード
 23328:       m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_MODIFY | M60_FSLW_SIZE_LONG | M60_FSLW_TM_SUPER_DATA;
 23329:       int a0 = mmuTranslateWriteSuperData (a);  //a+1,a+2,a+3が必要なので上書き不可
 23330:       if ((a & 3) == 0) {  //4の倍数
 23331:         return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRls (a0);
 23332:       } else if ((a & 1) == 0) {  //4の倍数+2
 23333:         int d0 = (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRws (a0);
 23334:         m60FSLW ^= M60_FSLW_IOMA_FIRST ^ M60_FSLW_IOMA_SECOND;
 23335:         int a2 = mmuTranslateWriteSuperData (a + 2);  //偶数
 23336:         return (d0 << 16 |
 23337:                 (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a2 >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a2));
 23338:       } else {  //奇数
 23339:         int d0 = (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRbs (a0);
 23340:         m60FSLW ^= M60_FSLW_IOMA_FIRST ^ M60_FSLW_IOMA_SECOND;
 23341:         int a1 = mmuTranslateWriteSuperData (a + 1);  //偶数
 23342:         int a3 = mmuTranslateWriteSuperData (a + 3);  //偶数
 23343:         return (d0 << 24 |
 23344:                 (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a1 >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a1) << 8 |
 23345:                 (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a3 >>> XEiJ.BUS_PAGE_BITS].mmdRbz (a3));
 23346:       }
 23347:     } else {  //ユーザモード
 23348:       m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_MODIFY | M60_FSLW_SIZE_LONG | M60_FSLW_TM_USER_DATA;
 23349:       int a0 = mmuTranslateWriteUserData (a);  //a+1,a+2,a+3が必要なので上書き不可
 23350:       if ((a & 3) == 0) {  //4の倍数
 23351:         return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRls (a0);
 23352:       } else if ((a & 1) == 0) {  //4の倍数+2
 23353:         int d0 = (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRws (a0);
 23354:         m60FSLW ^= M60_FSLW_IOMA_FIRST ^ M60_FSLW_IOMA_SECOND;
 23355:         int a2 = mmuTranslateWriteUserData (a + 2);  //偶数
 23356:         return (d0 << 16 |
 23357:                 (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a2 >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a2));
 23358:       } else {  //奇数
 23359:         int d0 = (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRbs (a0);
 23360:         m60FSLW ^= M60_FSLW_IOMA_FIRST ^ M60_FSLW_IOMA_SECOND;
 23361:         int a1 = mmuTranslateWriteUserData (a + 1);  //偶数
 23362:         int a3 = mmuTranslateWriteUserData (a + 3);  //偶数
 23363:         return (d0 << 24 |
 23364:                 (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a1 >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a1) << 8 |
 23365:                 (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a3 >>> XEiJ.BUS_PAGE_BITS].mmdRbz (a3));
 23366:       }
 23367:     }
 23368:   }  //mmuModifyLongData(int,int)
 23369: 
 23370:   //d = mmuModifyLongEven (a, supervisor)
 23371:   //  リードモディファイライトのリードロング(偶数)
 23372:   public static int mmuModifyLongEven (int a, int supervisor) throws M68kException {
 23373:     if (supervisor != 0) {  //スーパーバイザモード
 23374:       m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_MODIFY | M60_FSLW_SIZE_LONG | M60_FSLW_TM_SUPER_DATA;
 23375:       int a0 = mmuTranslateWriteSuperData (a);  //a+2が必要なので上書き不可
 23376:       if ((a & 2) == 0) {  //4の倍数
 23377:         return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRls (a0);
 23378:       } else {  //4の倍数+2
 23379:         int d0 = (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRws (a0);
 23380:         m60FSLW ^= M60_FSLW_IOMA_FIRST ^ M60_FSLW_IOMA_SECOND;
 23381:         int a2 = mmuTranslateWriteSuperData (a + 2);  //偶数
 23382:         return (d0 << 16 |
 23383:                 (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a2 >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a2));
 23384:       }
 23385:     } else {  //ユーザモード
 23386:       m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_MODIFY | M60_FSLW_SIZE_LONG | M60_FSLW_TM_USER_DATA;
 23387:       int a0 = mmuTranslateWriteUserData (a);  //a+2が必要なので上書き不可
 23388:       if ((a & 2) == 0) {  //4の倍数
 23389:         return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRls (a0);
 23390:       } else {  //4の倍数+2
 23391:         int d0 = (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRws (a0);
 23392:         m60FSLW ^= M60_FSLW_IOMA_FIRST ^ M60_FSLW_IOMA_SECOND;
 23393:         int a2 = mmuTranslateWriteUserData (a + 2);  //偶数
 23394:         return (d0 << 16 |
 23395:                 (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a2 >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a2));
 23396:       }
 23397:     }
 23398:   }  //mmuModifyLongEven(int,int)
 23399: 
 23400:   //d = mmuModifyLongFour (a, supervisor)
 23401:   //  リードモディファイライトのリードロング(4の倍数)
 23402:   public static int mmuModifyLongFour (int a, int supervisor) throws M68kException {
 23403:     if (supervisor != 0) {  //スーパーバイザモード
 23404:       m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_MODIFY | M60_FSLW_SIZE_LONG | M60_FSLW_TM_SUPER_DATA;
 23405:       a = mmuTranslateWriteSuperData (a);
 23406:       return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a >>> XEiJ.BUS_PAGE_BITS].mmdRls (a);
 23407:     } else {  //ユーザモード
 23408:       m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_MODIFY | M60_FSLW_SIZE_LONG | M60_FSLW_TM_USER_DATA;
 23409:       a = mmuTranslateWriteUserData (a);
 23410:       return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a >>> XEiJ.BUS_PAGE_BITS].mmdRls (a);
 23411:     }
 23412:   }  //mmuModifyLongFour(int,int)
 23413: 
 23414:   //--------------------------------------------------------------------------------
 23415:   //ポーク
 23416:   //  デバッガ用
 23417:   //  エラーや副作用なしでライトする
 23418: 
 23419:   //mmuPokeByte (a, x, f)
 23420:   //  ポークバイト
 23421:   public static void mmuPokeByte (int a, int x, int f) {
 23422:     f = f == -1 ? XEiJ.regSRS != 0 ? 5 : 1 : f & 7;
 23423:     MemoryMappedDevice[] mm = (DataBreakPoint.DBP_ON ?
 23424:                                (f & 4) != 0 ? DataBreakPoint.dbpSuperMap : DataBreakPoint.dbpUserMap :
 23425:                                (f & 4) != 0 ? XEiJ.busSuperMap : XEiJ.busUserMap);
 23426:     //    01234567
 23427:     if (0b01100110 << 24 << f < 0) {  //DFC=1,2,5,6。アドレス変換あり
 23428:       int a0 = mmuTranslatePeek (a, f & 4, f & 2);
 23429:       if ((a ^ a0) != 1) {
 23430:         mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdVb (a0, x);
 23431:       }
 23432:     } else if (f != 7) {  //DFC=0,3,4。アドレス変換なし
 23433:       mm[a >>> XEiJ.BUS_PAGE_BITS].mmdVb (a, x);
 23434:     }
 23435:   }  //mmuPokeByte(int,int,int)
 23436: 
 23437:   //mmuPokeByteData (a, d, supervisor)
 23438:   //  ポークバイト(データ)
 23439:   public static void mmuPokeByteData (int a, int d, int supervisor) {
 23440:     MemoryMappedDevice[] mm = supervisor != 0 ? DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap : DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap;
 23441:     int a0 = mmuTranslatePeek (a, supervisor, 0);
 23442:     if ((a ^ a0) != 1) {
 23443:       //mm[a >>> XEiJ.BUS_PAGE_BITS].mmdVb (a0, d);
 23444:       XEiJ.busVb (a0, d);
 23445:     }
 23446:   }  //mmuPokeByteData(int,int,int)
 23447: 
 23448:   //mmuPokeWord (a, x, f)
 23449:   //  ポークワード
 23450:   public static void mmuPokeWord (int a, int x, int f) {
 23451:     f = f == -1 ? XEiJ.regSRS != 0 ? 5 : 1 : f & 7;
 23452:     MemoryMappedDevice[] mm = (DataBreakPoint.DBP_ON ?
 23453:                                (f & 4) != 0 ? DataBreakPoint.dbpSuperMap : DataBreakPoint.dbpUserMap :
 23454:                                (f & 4) != 0 ? XEiJ.busSuperMap : XEiJ.busUserMap);
 23455:     //    01234567
 23456:     if (0b01100110 << 24 << f < 0) {  //DFC=1,2,5,6。アドレス変換あり
 23457:       int a0 = mmuTranslatePeek (a, f & 4, f & 2);
 23458:       if ((a & 1) == 0) {  //偶数
 23459:         if ((a ^ a0) != 1) {
 23460:           mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdVw (a0, x);
 23461:         }
 23462:       } else {  //奇数
 23463:         int a1 = mmuTranslatePeek (a + 1, f & 4, f & 2);
 23464:         if ((a     ^ a0) != 1) {
 23465:           mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdVb (a0, x >> 8);
 23466:         }
 23467:         if ((a + 1 ^ a1) != 1) {
 23468:           mm[a1 >>> XEiJ.BUS_PAGE_BITS].mmdVb (a1, x     );
 23469:         }
 23470:       }
 23471:     } else if (f != 7) {  //DFC=0,3,4。アドレス変換なし
 23472:       if ((a & 1) == 0) {  //偶数
 23473:         mm[a >>> XEiJ.BUS_PAGE_BITS].mmdVw (a, x);
 23474:       } else {  //奇数
 23475:         mm[a     >>> XEiJ.BUS_PAGE_BITS].mmdVb (a    , x >> 8);
 23476:         mm[a + 1 >>> XEiJ.BUS_PAGE_BITS].mmdVb (a + 1, x     );
 23477:       }
 23478:     }
 23479:   }  //mmuPokeWord(int,int,int)
 23480: 
 23481:   //mmuPokeWordData (a, d, supervisor)
 23482:   //  ポークワード(データ)
 23483:   public static void mmuPokeWordData (int a, int d, int supervisor) {
 23484:     mmuPokeByteData (a, d >> 8, supervisor);
 23485:     mmuPokeByteData (a + 1, d, supervisor);
 23486:   }  //mmuPokeWordData(int,int,int)
 23487: 
 23488:   //mmuPokeLong (a, x, f)
 23489:   //  ポークロング
 23490:   public static void mmuPokeLong (int a, int x, int f) {
 23491:     f = f == -1 ? XEiJ.regSRS != 0 ? 5 : 1 : f & 7;
 23492:     MemoryMappedDevice[] mm = (DataBreakPoint.DBP_ON ?
 23493:                                (f & 4) != 0 ? DataBreakPoint.dbpSuperMap : DataBreakPoint.dbpUserMap :
 23494:                                (f & 4) != 0 ? XEiJ.busSuperMap : XEiJ.busUserMap);
 23495:     //    01234567
 23496:     if (0b01100110 << 24 << f < 0) {  //DFC=1,2,5,6。アドレス変換あり
 23497:       int a0 = mmuTranslatePeek (a, f & 4, f & 2);
 23498:       if ((a & 3) == 0) {  //4の倍数
 23499:         if ((a ^ a0) != 1) {
 23500:           mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdVl (a0, x);
 23501:         }
 23502:       } else if ((a & 1) == 0) {  //4の倍数ではない偶数
 23503:         int a2 = mmuTranslatePeek (a + 2, f & 4, f & 2);
 23504:         if ((a     ^ a0) != 1) {
 23505:           mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdVw (a0, x >> 16);
 23506:         }
 23507:         if ((a + 2 ^ a2) != 1) {
 23508:           mm[a2 >>> XEiJ.BUS_PAGE_BITS].mmdVw (a2, x);
 23509:         }
 23510:       } else {  //奇数
 23511:         int a1 = mmuTranslatePeek (a + 1, f & 4, f & 2);
 23512:         int a3 = mmuTranslatePeek (a + 3, f & 4, f & 2);
 23513:         if ((a     ^ a0) != 1) {
 23514:           mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdVb (a0, x >> 24);
 23515:         }
 23516:         if ((a + 1 ^ a1) != 1) {
 23517:           mm[a1 >>> XEiJ.BUS_PAGE_BITS].mmdVw (a1, x >>  8);
 23518:         }
 23519:         if ((a + 3 ^ a3) != 1) {
 23520:           mm[a3 >>> XEiJ.BUS_PAGE_BITS].mmdVb (a3, x);
 23521:         }
 23522:       }
 23523:     } else if (f != 7) {  //DFC=0,3,4。アドレス変換なし
 23524:       if ((a & 3) == 0) {  //4の倍数
 23525:         mm[a >>> XEiJ.BUS_PAGE_BITS].mmdVl (a, x);
 23526:       } else if ((a & 1) == 0) {  //4の倍数ではない偶数
 23527:         mm[a     >>> XEiJ.BUS_PAGE_BITS].mmdVw (a    , x >> 16);
 23528:         mm[a + 2 >>> XEiJ.BUS_PAGE_BITS].mmdVw (a + 2, x      );
 23529:       } else {  //奇数
 23530:         mm[a     >>> XEiJ.BUS_PAGE_BITS].mmdVb (a,     x >> 24);
 23531:         mm[a + 1 >>> XEiJ.BUS_PAGE_BITS].mmdVw (a + 1, x >>  8);
 23532:         mm[a + 3 >>> XEiJ.BUS_PAGE_BITS].mmdVb (a + 3, x      );
 23533:       }
 23534:     }
 23535:   }  //mmuPokeLong(int,int,int)
 23536: 
 23537:   //mmuPokeLongData (a, d, supervisor)
 23538:   //  ポークロング(データ)
 23539:   public static void mmuPokeLongData (int a, int d, int supervisor) {
 23540:     mmuPokeByteData (a, d >> 24, supervisor);
 23541:     mmuPokeByteData (a + 1, d >> 16, supervisor);
 23542:     mmuPokeByteData (a + 2, d >> 8, supervisor);
 23543:     mmuPokeByteData (a + 3, d, supervisor);
 23544:   }  //mmuPokeLongData(int,int,int)
 23545: 
 23546:   //mmuPokeQuad (a, x, f)
 23547:   //  ポーククワッド
 23548:   public static void mmuPokeQuad (int a, long x, int f) {
 23549:     mmuPokeLong (a    , (int) (x >> 32), f);
 23550:     mmuPokeLong (a + 4, (int)  x       , f);
 23551:   }  //mmuPokeQuad(int,long,int)
 23552: 
 23553:   //mmuPokeExtended (a, b, f)
 23554:   public static void mmuPokeExtended (int a, byte[] b, int f) {
 23555:     for (int i = 0; i < 12; i++) {
 23556:       mmuPokeByte (a + i, b[i], f);
 23557:     }
 23558:   }  //mmuPokeQuad(int,long,int)
 23559: 
 23560:   //a = mmuPokeStringZ (a, str, f)
 23561:   //  ポークストリング
 23562:   //  文字列をUTF-16からSJISに変換しながらメモリに書き込む
 23563:   //  文字列に'\0'が含まれるときはその手前まで書き込む
 23564:   //  SJISに変換できない文字は'※'になる
 23565:   //  最後に'\0'を書き込む
 23566:   //  '\0'を含まない書き込んだ文字列を返す
 23567:   public static String mmuPokeStringZ (int a, String str, int f) {
 23568:     StringBuilder sb = new StringBuilder ();
 23569:     int l = str.length ();
 23570:     for (int i = 0; i < l; i++) {
 23571:       int u = str.charAt (i);
 23572:       if (u == '\0') {
 23573:         break;
 23574:       }
 23575:       int s = CharacterCode.chrCharToSJIS[u];  //SJISに変換する
 23576:       if (s == 0) {  //変換できない
 23577:         s = 0x81a6;  //'※'
 23578:       }
 23579:       if (s >> 8 != 0) {
 23580:         mmuPokeByte (a++, s >> 8, f);
 23581:       }
 23582:       mmuPokeByte (a++, s, f);
 23583:       u = CharacterCode.chrSJISToChar[s];  //UTF-16に変換する
 23584:       if (u == 0) {  //変換できない
 23585:         u = 0xfffd;
 23586:       }
 23587:       sb.append ((char) u);
 23588:     }
 23589:     mmuPokeByte (a, 0, f);  //'\0'
 23590:     return sb.toString ();
 23591:   }  //mmuPokeStringZ(int,String,int)
 23592: 
 23593:   //--------------------------------------------------------------------------------
 23594:   //ライト
 23595:   //  アドレス変換はライト
 23596:   //  FSLWのRead and WriteはWrite
 23597: 
 23598:   //mmuWriteByteData (a, d, supervisor)
 23599:   //  ライトバイト符号拡張(データ)
 23600:   public static void mmuWriteByteData (int a, int d, int supervisor) throws M68kException {
 23601:     if (supervisor != 0) {  //スーパーバイザモード
 23602:       m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_BYTE | M60_FSLW_TM_SUPER_DATA;
 23603:       int t = mmuTranslateWriteSuperData (a);
 23604:       (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWb (t, d);
 23605:     } else {  //ユーザモード
 23606:       m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_BYTE | M60_FSLW_TM_USER_DATA;
 23607:       int t = mmuTranslateWriteUserData (a);
 23608:       (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWb (t, d);
 23609:     }
 23610:   }  //mmuWriteByteData(int,int,int)
 23611: 
 23612:   //mmuWriteWordData (a, d, supervisor)
 23613:   //  ライトワード符号拡張(データ)
 23614:   public static void mmuWriteWordData (int a, int d, int supervisor) throws M68kException {
 23615:     if (supervisor != 0) {  //スーパーバイザモード
 23616:       m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_WORD | M60_FSLW_TM_SUPER_DATA;
 23617:       int t = mmuTranslateWriteSuperData (a);  //a+1が必要なので上書き不可
 23618:       if ((a & 1) == 0) {  //偶数
 23619:         (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWw (t, d);
 23620:       } else {  //奇数
 23621:         (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWb (t, d >> 8);
 23622:         m60FSLW ^= M60_FSLW_IOMA_FIRST ^ M60_FSLW_IOMA_SECOND;
 23623:         t = mmuTranslateWriteSuperData (a + 1);  //偶数
 23624:         (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWb (t, d);
 23625:       }
 23626:     } else {  //ユーザモード
 23627:       m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_WORD | M60_FSLW_TM_USER_DATA;
 23628:       int t = mmuTranslateWriteUserData (a);  //a+1が必要なので上書き不可
 23629:       if ((a & 1) == 0) {  //偶数
 23630:         (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWw (t, d);
 23631:       } else {  //奇数
 23632:         (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWb (t, d >> 8);
 23633:         m60FSLW ^= M60_FSLW_IOMA_FIRST ^ M60_FSLW_IOMA_SECOND;
 23634:         t = mmuTranslateWriteUserData (a + 1);  //偶数
 23635:         (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWb (t, d);
 23636:       }
 23637:     }
 23638:   }  //mmuWriteWordData(int,int,int)
 23639: 
 23640:   //mmuWriteWordEven (a, d, supervisor)
 23641:   //  ライトワード符号拡張(偶数)
 23642:   public static void mmuWriteWordEven (int a, int d, int supervisor) throws M68kException {
 23643:     if (supervisor != 0) {  //スーパーバイザモード
 23644:       m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_WORD | M60_FSLW_TM_SUPER_DATA;
 23645:       a = mmuTranslateWriteSuperData (a);
 23646:       (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a >>> XEiJ.BUS_PAGE_BITS].mmdWw (a, d);
 23647:     } else {  //ユーザモード
 23648:       m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_WORD | M60_FSLW_TM_USER_DATA;
 23649:       a = mmuTranslateWriteUserData (a);
 23650:       (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a >>> XEiJ.BUS_PAGE_BITS].mmdWw (a, d);
 23651:     }
 23652:   }  //mmuWriteWordEven(int,int,int)
 23653: 
 23654:   //mmuWriteLongData (a, d, supervisor)
 23655:   //  ライトロング(データ)
 23656:   public static void mmuWriteLongData (int a, int d, int supervisor) throws M68kException {
 23657:     if (supervisor != 0) {  //スーパーバイザモード
 23658:       m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_LONG | M60_FSLW_TM_SUPER_DATA;
 23659:       int t = mmuTranslateWriteSuperData (a);  //a+1,a+2,a+3が必要なので上書き不可
 23660:       if ((a & 3) == 0) {  //4の倍数
 23661:         (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWl (t, d);
 23662:       } else if ((a & 1) == 0) {  //4の倍数+2
 23663:         (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWw (t, d >> 16);
 23664:         m60FSLW ^= M60_FSLW_IOMA_FIRST ^ M60_FSLW_IOMA_SECOND;
 23665:         t = mmuTranslateWriteSuperData (a + 2);  //偶数
 23666:         (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWw (t, d);
 23667:       } else {  //奇数
 23668:         (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWb (t, d >> 24);
 23669:         m60FSLW ^= M60_FSLW_IOMA_FIRST ^ M60_FSLW_IOMA_SECOND;
 23670:         t = mmuTranslateWriteSuperData (a + 1);  //偶数
 23671:         (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWw (t, d >> 8);
 23672:         t = mmuTranslateWriteSuperData (a + 3);  //偶数
 23673:         (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWb (t, d);
 23674:       }
 23675:     } else {  //ユーザモード
 23676:       m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_LONG | M60_FSLW_TM_USER_DATA;
 23677:       int t = mmuTranslateWriteUserData (a);  //a+1,a+2,a+3が必要なので上書き不可
 23678:       if ((a & 3) == 0) {  //4の倍数
 23679:         (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWl (t, d);
 23680:       } else if ((a & 1) == 0) {  //4の倍数+2
 23681:         (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWw (t, d >> 16);
 23682:         m60FSLW ^= M60_FSLW_IOMA_FIRST ^ M60_FSLW_IOMA_SECOND;
 23683:         t = mmuTranslateWriteUserData (a + 2);  //偶数
 23684:         (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWw (t, d);
 23685:       } else {  //奇数
 23686:         (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWb (t, d >> 24);
 23687:         m60FSLW ^= M60_FSLW_IOMA_FIRST ^ M60_FSLW_IOMA_SECOND;
 23688:         t = mmuTranslateWriteUserData (a + 1);  //偶数
 23689:         (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWw (t, d >> 8);
 23690:         t = mmuTranslateWriteUserData (a + 3);  //偶数
 23691:         (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWb (t, d);
 23692:       }
 23693:     }
 23694:   }  //mmuWriteLongData(int,int,int)
 23695: 
 23696:   //mmuWriteLongEven (a, d, supervisor)
 23697:   //  ライトロング(偶数)
 23698:   public static void mmuWriteLongEven (int a, int d, int supervisor) throws M68kException {
 23699:     if (supervisor != 0) {  //スーパーバイザモード
 23700:       m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_LONG | M60_FSLW_TM_SUPER_DATA;
 23701:       int t = mmuTranslateWriteSuperData (a);  //a+2が必要なので上書き不可
 23702:       if ((a & 2) == 0) {  //4の倍数
 23703:         (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWl (t, d);
 23704:       } else {  //4の倍数+2
 23705:         (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWw (t, d >> 16);
 23706:         m60FSLW ^= M60_FSLW_IOMA_FIRST ^ M60_FSLW_IOMA_SECOND;
 23707:         t = mmuTranslateWriteSuperData (a + 2);  //偶数
 23708:         (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWw (t, d);
 23709:       }
 23710:     } else {  //ユーザモード
 23711:       m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_LONG | M60_FSLW_TM_USER_DATA;
 23712:       int t = mmuTranslateWriteUserData (a);  //a+2が必要なので上書き不可
 23713:       if ((a & 2) == 0) {  //4の倍数
 23714:         (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWl (t, d);
 23715:       } else {  //4の倍数+2
 23716:         (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWw (t, d >> 16);
 23717:         m60FSLW ^= M60_FSLW_IOMA_FIRST ^ M60_FSLW_IOMA_SECOND;
 23718:         t = mmuTranslateWriteUserData (a + 2);  //偶数
 23719:         (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWw (t, d);
 23720:       }
 23721:     }
 23722:   }  //mmuWriteLongEven(int,int,int)
 23723: 
 23724:   //mmuWriteLongFour (a, d, supervisor)
 23725:   //  ライトロング(4の倍数)
 23726:   public static void mmuWriteLongFour (int a, int d, int supervisor) throws M68kException {
 23727:     if (supervisor != 0) {  //スーパーバイザモード
 23728:       m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_LONG | M60_FSLW_TM_SUPER_DATA;
 23729:       a = mmuTranslateWriteSuperData (a);
 23730:       (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a >>> XEiJ.BUS_PAGE_BITS].mmdWl (a, d);
 23731:     } else {  //ユーザモード
 23732:       m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_LONG | M60_FSLW_TM_USER_DATA;
 23733:       a = mmuTranslateWriteUserData (a);
 23734:       (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a >>> XEiJ.BUS_PAGE_BITS].mmdWl (a, d);
 23735:     }
 23736:   }  //mmuWriteLongFour(int,int,int)
 23737: 
 23738:   //mmuWriteQuadData (a, d, supervisor)
 23739:   //  ライトクワッド(データ)
 23740:   public static void mmuWriteQuadData (int a, long d, int supervisor) throws M68kException {
 23741:     if (supervisor != 0) {  //スーパーバイザモード
 23742:       final MemoryMappedDevice[] map = DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap;
 23743:       m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_SUPER_DATA;
 23744:       int t = mmuTranslateWriteSuperData (a);
 23745:       if ((a & 3) == 0) {  //4n
 23746:         map[t >>> XEiJ.BUS_PAGE_BITS].mmdWl (t, (int) (d >> 32));
 23747:         m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_SUPER_DATA;
 23748:         t = mmuTranslateWriteSuperData (a + 4);
 23749:         map[t >>> XEiJ.BUS_PAGE_BITS].mmdWl (t, (int) d);
 23750:       } else if ((a & 1) == 0) {  //4n+2
 23751:         map[t >>> XEiJ.BUS_PAGE_BITS].mmdWw (t, (int) (d >> 48));
 23752:         m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_SUPER_DATA;
 23753:         t = mmuTranslateWriteSuperData (a + 2);
 23754:         map[t >>> XEiJ.BUS_PAGE_BITS].mmdWl (t, (int) (d >> 16));
 23755:         m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_SUPER_DATA;
 23756:         t = mmuTranslateWriteSuperData (a + 6);
 23757:         map[t >>> XEiJ.BUS_PAGE_BITS].mmdWw (t, (int) d);
 23758:       } else if ((a & 3) == 1) {  //4n+1
 23759:         map[t >>> XEiJ.BUS_PAGE_BITS].mmdWb (t, (int) (d >> 56));
 23760:         m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_SUPER_DATA;
 23761:         t = mmuTranslateWriteSuperData (a + 1);
 23762:         map[t >>> XEiJ.BUS_PAGE_BITS].mmdWw (t, (int) (d >> 40));
 23763:         m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_SUPER_DATA;
 23764:         t = mmuTranslateWriteSuperData (a + 3);
 23765:         map[t >>> XEiJ.BUS_PAGE_BITS].mmdWl (t, (int) (d >> 8));
 23766:         m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_SUPER_DATA;
 23767:         t = mmuTranslateWriteSuperData (a + 7);
 23768:         map[t >>> XEiJ.BUS_PAGE_BITS].mmdWb (t, (int) d);
 23769:       } else {  //4n+3
 23770:         map[t >>> XEiJ.BUS_PAGE_BITS].mmdWb (t, (int) (d >> 56));
 23771:         m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_SUPER_DATA;
 23772:         t = mmuTranslateWriteSuperData (a + 1);
 23773:         map[t >>> XEiJ.BUS_PAGE_BITS].mmdWl (t, (int) (d >> 24));
 23774:         m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_SUPER_DATA;
 23775:         t = mmuTranslateWriteSuperData (a + 5);
 23776:         map[t >>> XEiJ.BUS_PAGE_BITS].mmdWw (t, (int) (d >> 8));
 23777:         m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_SUPER_DATA;
 23778:         t = mmuTranslateWriteSuperData (a + 7);
 23779:         map[t >>> XEiJ.BUS_PAGE_BITS].mmdWb (t, (int) d);
 23780:       }
 23781:     } else {  //ユーザモード
 23782:       final MemoryMappedDevice[] map = DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap;
 23783:       m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_USER_DATA;
 23784:       int t = mmuTranslateWriteUserData (a);
 23785:       if ((a & 3) == 0) {  //4n
 23786:         map[t >>> XEiJ.BUS_PAGE_BITS].mmdWl (t, (int) (d >> 32));
 23787:         m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_USER_DATA;
 23788:         t = mmuTranslateWriteUserData (a + 4);
 23789:         map[t >>> XEiJ.BUS_PAGE_BITS].mmdWl (t, (int) d);
 23790:       } else if ((a & 1) == 0) {  //4n+2
 23791:         map[t >>> XEiJ.BUS_PAGE_BITS].mmdWw (t, (int) (d >> 48));
 23792:         m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_USER_DATA;
 23793:         t = mmuTranslateWriteUserData (a + 2);
 23794:         map[t >>> XEiJ.BUS_PAGE_BITS].mmdWl (t, (int) (d >> 16));
 23795:         m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_USER_DATA;
 23796:         t = mmuTranslateWriteUserData (a + 6);
 23797:         map[t >>> XEiJ.BUS_PAGE_BITS].mmdWw (t, (int) d);
 23798:       } else if ((a & 3) == 1) {  //4n+1
 23799:         map[t >>> XEiJ.BUS_PAGE_BITS].mmdWb (t, (int) (d >> 56));
 23800:         m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_USER_DATA;
 23801:         t = mmuTranslateWriteUserData (a + 1);
 23802:         map[t >>> XEiJ.BUS_PAGE_BITS].mmdWw (t, (int) (d >> 40));
 23803:         m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_USER_DATA;
 23804:         t = mmuTranslateWriteUserData (a + 3);
 23805:         map[t >>> XEiJ.BUS_PAGE_BITS].mmdWl (t, (int) (d >> 8));
 23806:         m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_USER_DATA;
 23807:         t = mmuTranslateWriteUserData (a + 7);
 23808:         map[t >>> XEiJ.BUS_PAGE_BITS].mmdWb (t, (int) d);
 23809:       } else {  //4n+3
 23810:         map[t >>> XEiJ.BUS_PAGE_BITS].mmdWb (t, (int) (d >> 56));
 23811:         m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_USER_DATA;
 23812:         t = mmuTranslateWriteUserData (a + 1);
 23813:         map[t >>> XEiJ.BUS_PAGE_BITS].mmdWl (t, (int) (d >> 24));
 23814:         m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_USER_DATA;
 23815:         t = mmuTranslateWriteUserData (a + 5);
 23816:         map[t >>> XEiJ.BUS_PAGE_BITS].mmdWw (t, (int) (d >> 8));
 23817:         m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_USER_DATA;
 23818:         t = mmuTranslateWriteUserData (a + 7);
 23819:         map[t >>> XEiJ.BUS_PAGE_BITS].mmdWb (t, (int) d);
 23820:       }
 23821:     }
 23822:   }  //mmuWriteQuadData(int,long,int)
 23823: 
 23824:   //mmuWriteQuadSecond (a, d, supervisor)
 23825:   //  ライトクワッド(2番目)
 23826:   //  エクステンデッドとラインの2番目で使う
 23827:   public static void mmuWriteQuadSecond (int a, long d, int supervisor) throws M68kException {
 23828:     if (supervisor != 0) {  //スーパーバイザモード
 23829:       final MemoryMappedDevice[] map = DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap;
 23830:       m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_SUPER_DATA;
 23831:       int t = mmuTranslateWriteSuperData (a);
 23832:       if ((a & 3) == 0) {  //4n
 23833:         map[t >>> XEiJ.BUS_PAGE_BITS].mmdWl (t, (int) (d >> 32));
 23834:         m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_SUPER_DATA;
 23835:         t = mmuTranslateWriteSuperData (a + 4);
 23836:         map[t >>> XEiJ.BUS_PAGE_BITS].mmdWl (t, (int) d);
 23837:       } else if ((a & 1) == 0) {  //4n+2
 23838:         map[t >>> XEiJ.BUS_PAGE_BITS].mmdWw (t, (int) (d >> 48));
 23839:         m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_SUPER_DATA;
 23840:         t = mmuTranslateWriteSuperData (a + 2);
 23841:         map[t >>> XEiJ.BUS_PAGE_BITS].mmdWl (t, (int) (d >> 16));
 23842:         m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_SUPER_DATA;
 23843:         t = mmuTranslateWriteSuperData (a + 6);
 23844:         map[t >>> XEiJ.BUS_PAGE_BITS].mmdWw (t, (int) d);
 23845:       } else if ((a & 3) == 1) {  //4n+1
 23846:         map[t >>> XEiJ.BUS_PAGE_BITS].mmdWb (t, (int) (d >> 56));
 23847:         m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_SUPER_DATA;
 23848:         t = mmuTranslateWriteSuperData (a + 1);
 23849:         map[t >>> XEiJ.BUS_PAGE_BITS].mmdWw (t, (int) (d >> 40));
 23850:         m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_SUPER_DATA;
 23851:         t = mmuTranslateWriteSuperData (a + 3);
 23852:         map[t >>> XEiJ.BUS_PAGE_BITS].mmdWl (t, (int) (d >> 8));
 23853:         m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_SUPER_DATA;
 23854:         t = mmuTranslateWriteSuperData (a + 7);
 23855:         map[t >>> XEiJ.BUS_PAGE_BITS].mmdWb (t, (int) d);
 23856:       } else {  //4n+3
 23857:         map[t >>> XEiJ.BUS_PAGE_BITS].mmdWb (t, (int) (d >> 56));
 23858:         m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_SUPER_DATA;
 23859:         t = mmuTranslateWriteSuperData (a + 1);
 23860:         map[t >>> XEiJ.BUS_PAGE_BITS].mmdWl (t, (int) (d >> 24));
 23861:         m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_SUPER_DATA;
 23862:         t = mmuTranslateWriteSuperData (a + 5);
 23863:         map[t >>> XEiJ.BUS_PAGE_BITS].mmdWw (t, (int) (d >> 8));
 23864:         m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_SUPER_DATA;
 23865:         t = mmuTranslateWriteSuperData (a + 7);
 23866:         map[t >>> XEiJ.BUS_PAGE_BITS].mmdWb (t, (int) d);
 23867:       }
 23868:     } else {  //ユーザモード
 23869:       final MemoryMappedDevice[] map = DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap;
 23870:       m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_USER_DATA;
 23871:       int t = mmuTranslateWriteUserData (a);
 23872:       if ((a & 3) == 0) {  //4n
 23873:         map[t >>> XEiJ.BUS_PAGE_BITS].mmdWl (t, (int) (d >> 32));
 23874:         m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_USER_DATA;
 23875:         t = mmuTranslateWriteUserData (a + 4);
 23876:         map[t >>> XEiJ.BUS_PAGE_BITS].mmdWl (t, (int) d);
 23877:       } else if ((a & 1) == 0) {  //4n+2
 23878:         map[t >>> XEiJ.BUS_PAGE_BITS].mmdWw (t, (int) (d >> 48));
 23879:         m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_USER_DATA;
 23880:         t = mmuTranslateWriteUserData (a + 2);
 23881:         map[t >>> XEiJ.BUS_PAGE_BITS].mmdWl (t, (int) (d >> 16));
 23882:         m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_USER_DATA;
 23883:         t = mmuTranslateWriteUserData (a + 6);
 23884:         map[t >>> XEiJ.BUS_PAGE_BITS].mmdWw (t, (int) d);
 23885:       } else if ((a & 3) == 1) {  //4n+1
 23886:         map[t >>> XEiJ.BUS_PAGE_BITS].mmdWb (t, (int) (d >> 56));
 23887:         m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_USER_DATA;
 23888:         t = mmuTranslateWriteUserData (a + 1);
 23889:         map[t >>> XEiJ.BUS_PAGE_BITS].mmdWw (t, (int) (d >> 40));
 23890:         m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_USER_DATA;
 23891:         t = mmuTranslateWriteUserData (a + 3);
 23892:         map[t >>> XEiJ.BUS_PAGE_BITS].mmdWl (t, (int) (d >> 8));
 23893:         m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_USER_DATA;
 23894:         t = mmuTranslateWriteUserData (a + 7);
 23895:         map[t >>> XEiJ.BUS_PAGE_BITS].mmdWb (t, (int) d);
 23896:       } else {  //4n+3
 23897:         map[t >>> XEiJ.BUS_PAGE_BITS].mmdWb (t, (int) (d >> 56));
 23898:         m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_USER_DATA;
 23899:         t = mmuTranslateWriteUserData (a + 1);
 23900:         map[t >>> XEiJ.BUS_PAGE_BITS].mmdWl (t, (int) (d >> 24));
 23901:         m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_USER_DATA;
 23902:         t = mmuTranslateWriteUserData (a + 5);
 23903:         map[t >>> XEiJ.BUS_PAGE_BITS].mmdWw (t, (int) (d >> 8));
 23904:         m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_USER_DATA;
 23905:         t = mmuTranslateWriteUserData (a + 7);
 23906:         map[t >>> XEiJ.BUS_PAGE_BITS].mmdWb (t, (int) d);
 23907:       }
 23908:     }
 23909:   }  //mmuWriteQuadSecond(int,int,int)
 23910: 
 23911: 
 23912: 
 23913:   //mmuReadByteArray (address, array, offset, length, supervisor)
 23914:   //  リードバイト配列。先頭から読み出す
 23915:   //  address  先頭アドレス
 23916:   //  array    バイト配列
 23917:   //  offset   先頭オフセット
 23918:   //  length   バイト数
 23919:   public static void mmuReadByteArray (int address, byte[] array, int offset, int length, int supervisor) throws M68kException {
 23920:     if (false) {  //1バイトずつmmuReadByteSignDataを呼び出す
 23921:       for (int index = 0; index < length; index++) {
 23922:         array[offset + index] = mmuReadByteSignData (address + index, supervisor);
 23923:       }
 23924:     } else {
 23925:       //  変換後アドレスは0
 23926:       //  デバイスはnull
 23927:       //  while 残りが1バイト以上
 23928:       //    if ページの先頭
 23929:       //      デバイスはnull
 23930:       //    if アドレスが4nかつ残りが4バイト以上
 23931:       //      FSLWはリードロング
 23932:       //      if デバイスがnull
 23933:       //        変換後アドレスを求める
 23934:       //        デバイスを求める
 23935:       //      リードロング
 23936:       //    elif アドレスが2nかつ残りが2バイト以上
 23937:       //      FSLWはリードワード
 23938:       //      if デバイスがnull
 23939:       //        変換後アドレスを求める
 23940:       //        デバイスを求める
 23941:       //      リードワード
 23942:       //    else
 23943:       //      FSLWはリードバイト
 23944:       //      if デバイスがnull
 23945:       //        変換後アドレスを求める
 23946:       //        デバイスを求める
 23947:       //      リードバイト
 23948:       //  endwhile
 23949:       length += offset;  //lengthはoffsetの上限
 23950:       final int mask = Math.min (XEiJ.BUS_PAGE_SIZE, mmuPageSize) - 1;
 23951:       if (supervisor != 0) {  //スーパーバイザモード
 23952:         final MemoryMappedDevice[] map = DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap;
 23953:         int translated = 0;  //変換後アドレスは0
 23954:         MemoryMappedDevice device = null;  //デバイスはnull
 23955:         while (offset < length) {  //残りが1バイト以上
 23956:           if ((address & mask) == 0) {  //ページの先頭
 23957:             device = null;  //デバイスはnull
 23958:           }
 23959:           if ((address & 3) == 0 && offset + 4 <= length) {  //アドレスが4nかつ残りが4バイト以上
 23960:             m60FSLW = (M60_FSLW_IOMA_FIRST |
 23961:                                      M60_FSLW_RW_READ |
 23962:                                      M60_FSLW_SIZE_LONG |
 23963:                                      M60_FSLW_TM_SUPER_DATA);  //FSLWはリードロング
 23964:             if (device == null) {  //デバイスがnull
 23965:               translated = mmuTranslateReadSuperData (address);  //変換後アドレスを求める
 23966:               device = map[translated >>> XEiJ.BUS_PAGE_BITS];  //デバイスを求める
 23967:             }
 23968:             int data = device.mmdRls (translated);  //リードロング
 23969:             array[offset] = (byte) (data >> 24);
 23970:             array[offset + 1] = (byte) (data >> 16);
 23971:             array[offset + 2] = (byte) (data >> 8);
 23972:             array[offset + 3] = (byte) data;
 23973:             address += 4;
 23974:             translated += 4;
 23975:             offset += 4;
 23976:           } else if ((address & 1) == 0 && offset + 2 <= length) {  //アドレスが2nかつ残りが2バイト以上
 23977:             m60FSLW = (M60_FSLW_IOMA_FIRST |
 23978:                                      M60_FSLW_RW_READ |
 23979:                                      M60_FSLW_SIZE_WORD |
 23980:                                      M60_FSLW_TM_SUPER_DATA);  //FSLWはリードワード
 23981:             if (device == null) {  //デバイスがnull
 23982:               translated = mmuTranslateReadSuperData (address);  //変換後アドレスを求める
 23983:               device = map[translated >>> XEiJ.BUS_PAGE_BITS];  //デバイスを求める
 23984:             }
 23985:             int data = device.mmdRws (translated);  //リードワード
 23986:             array[offset] = (byte) (data >> 8);
 23987:             array[offset + 1] = (byte) data;
 23988:             address += 2;
 23989:             translated += 2;
 23990:             offset += 2;
 23991:           } else {
 23992:             m60FSLW = (M60_FSLW_IOMA_FIRST |
 23993:                                      M60_FSLW_RW_READ |
 23994:                                      M60_FSLW_SIZE_BYTE |
 23995:                                      M60_FSLW_TM_SUPER_DATA);  //FSLWはリードバイト
 23996:             if (device == null) {  //デバイスがnull
 23997:               translated = mmuTranslateReadSuperData (address);  //変換後アドレスを求める
 23998:               device = map[translated >>> XEiJ.BUS_PAGE_BITS];  //デバイスを求める
 23999:             }
 24000:             array[offset] = device.mmdRbs (translated);  //リードバイト
 24001:             address++;
 24002:             translated++;
 24003:             offset++;
 24004:           }
 24005:         }  //while
 24006:       } else {  //ユーザモード
 24007:         final MemoryMappedDevice[] map = DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap;
 24008:         int translated = 0;  //変換後アドレスは0
 24009:         MemoryMappedDevice device = null;  //デバイスはnull
 24010:         while (offset < length) {  //残りが1バイト以上
 24011:           if ((address & mask) == 0) {  //ページの先頭
 24012:             device = null;  //デバイスはnull
 24013:           }
 24014:           if ((address & 3) == 0 && offset + 4 <= length) {  //アドレスが4nかつ残りが4バイト以上
 24015:             m60FSLW = (M60_FSLW_IOMA_FIRST |
 24016:                                      M60_FSLW_RW_READ |
 24017:                                      M60_FSLW_SIZE_LONG |
 24018:                                      M60_FSLW_TM_USER_DATA);  //FSLWはリードロング
 24019:             if (device == null) {  //デバイスがnull
 24020:               translated = mmuTranslateReadUserData (address);  //変換後アドレスを求める
 24021:               device = map[translated >>> XEiJ.BUS_PAGE_BITS];  //デバイスを求める
 24022:             }
 24023:             int data = device.mmdRls (translated);  //リードロング
 24024:             array[offset] = (byte) (data >> 24);
 24025:             array[offset + 1] = (byte) (data >> 16);
 24026:             array[offset + 2] = (byte) (data >> 8);
 24027:             array[offset + 3] = (byte) data;
 24028:             address += 4;
 24029:             translated += 4;
 24030:             offset += 4;
 24031:           } else if ((address & 1) == 0 && offset + 2 <= length) {  //アドレスが2nかつ残りが2バイト以上
 24032:             m60FSLW = (M60_FSLW_IOMA_FIRST |
 24033:                                      M60_FSLW_RW_READ |
 24034:                                      M60_FSLW_SIZE_WORD |
 24035:                                      M60_FSLW_TM_USER_DATA);  //FSLWはリードワード
 24036:             if (device == null) {  //デバイスがnull
 24037:               translated = mmuTranslateReadUserData (address);  //変換後アドレスを求める
 24038:               device = map[translated >>> XEiJ.BUS_PAGE_BITS];  //デバイスを求める
 24039:             }
 24040:             int data = device.mmdRws (translated);  //リードワード
 24041:             array[offset] = (byte) (data >> 8);
 24042:             array[offset + 1] = (byte) data;
 24043:             address += 2;
 24044:             translated += 2;
 24045:             offset += 2;
 24046:           } else {
 24047:             m60FSLW = (M60_FSLW_IOMA_FIRST |
 24048:                                      M60_FSLW_RW_READ |
 24049:                                      M60_FSLW_SIZE_BYTE |
 24050:                                      M60_FSLW_TM_USER_DATA);  //FSLWはリードバイト
 24051:             if (device == null) {  //デバイスがnull
 24052:               translated = mmuTranslateReadUserData (address);  //変換後アドレスを求める
 24053:               device = map[translated >>> XEiJ.BUS_PAGE_BITS];  //デバイスを求める
 24054:             }
 24055:             array[offset] = device.mmdRbs (translated);  //リードバイト
 24056:             address++;
 24057:             translated++;
 24058:             offset++;
 24059:           }
 24060:         }  //while
 24061:       }
 24062:     }
 24063:   }  //mmuReadByteArray
 24064: 
 24065:   //mmuWriteByteArray (address, array, offset, length, supervisor)
 24066:   //  ライトバイト配列。先頭から書き込む
 24067:   //  address  先頭アドレス
 24068:   //  array    バイト配列
 24069:   //  offset   先頭オフセット
 24070:   //  length   バイト数
 24071:   public static void mmuWriteByteArray (int address, byte[] array, int offset, int length, int supervisor) throws M68kException {
 24072:     if (false) {  //1バイトずつmmuWriteByteDataを呼び出す
 24073:       for (int index = 0; index < length; index++) {
 24074:         mmuWriteByteData (address + index, array[offset + index], supervisor);
 24075:       }
 24076:     } else {
 24077:       //  変換後アドレスは0
 24078:       //  デバイスはnull
 24079:       //  while 残りが1バイト以上
 24080:       //    if ページの先頭
 24081:       //      デバイスはnull
 24082:       //    if アドレスが4nかつ残りが4バイト以上
 24083:       //      FSLWはライトロング
 24084:       //      if デバイスがnull
 24085:       //        変換後アドレスを求める
 24086:       //        デバイスを求める
 24087:       //      ライトロング
 24088:       //    elif アドレスが2nかつ残りが2バイト以上
 24089:       //      FSLWはライトワード
 24090:       //      if デバイスがnull
 24091:       //        変換後アドレスを求める
 24092:       //        デバイスを求める
 24093:       //      ライトワード
 24094:       //    else
 24095:       //      FSLWはライトバイト
 24096:       //      if デバイスがnull
 24097:       //        変換後アドレスを求める
 24098:       //        デバイスを求める
 24099:       //      ライトバイト
 24100:       //  endwhile
 24101:       length += offset;  //lengthはoffsetの上限
 24102:       final int mask = Math.min (XEiJ.BUS_PAGE_SIZE, mmuPageSize) - 1;
 24103:       if (supervisor != 0) {  //スーパーバイザモード
 24104:         final MemoryMappedDevice[] map = DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap;
 24105:         int translated = 0;  //変換後アドレスは0
 24106:         MemoryMappedDevice device = null;  //デバイスはnull
 24107:         while (offset < length) {  //残りが1バイト以上
 24108:           if ((address & mask) == 0) {  //ページの先頭
 24109:             device = null;  //デバイスはnull
 24110:           }
 24111:           if ((address & 3) == 0 && offset + 4 <= length) {  //アドレスが4nかつ残りが4バイト以上
 24112:             m60FSLW = (M60_FSLW_IOMA_FIRST |
 24113:                                      M60_FSLW_RW_WRITE |
 24114:                                      M60_FSLW_SIZE_LONG |
 24115:                                      M60_FSLW_TM_SUPER_DATA);  //FSLWはライトロング
 24116:             if (device == null) {  //デバイスがnull
 24117:               translated = mmuTranslateWriteSuperData (address);  //変換後アドレスを求める
 24118:               device = map[translated >>> XEiJ.BUS_PAGE_BITS];  //デバイスを求める
 24119:             }
 24120:             device.mmdWl (translated,
 24121:                           array[offset] << 24 |
 24122:                           (0xff & array[offset + 1]) << 16 |
 24123:                           (0xff & array[offset + 2]) << 8 |
 24124:                           (0xff & array[offset + 3]));  //ライトロング
 24125:             address += 4;
 24126:             translated += 4;
 24127:             offset += 4;
 24128:           } else if ((address & 1) == 0 && offset + 2 <= length) {  //アドレスが2nかつ残りが2バイト以上
 24129:             m60FSLW = (M60_FSLW_IOMA_FIRST |
 24130:                                      M60_FSLW_RW_WRITE |
 24131:                                      M60_FSLW_SIZE_WORD |
 24132:                                      M60_FSLW_TM_SUPER_DATA);  //FSLWはライトワード
 24133:             if (device == null) {  //デバイスがnull
 24134:               translated = mmuTranslateWriteSuperData (address);  //変換後アドレスを求める
 24135:               device = map[translated >>> XEiJ.BUS_PAGE_BITS];  //デバイスを求める
 24136:             }
 24137:             device.mmdWw (translated,
 24138:                           array[offset] << 8 |
 24139:                           (0xff & array[offset + 1]));  //ライトワード
 24140:             address += 2;
 24141:             translated += 2;
 24142:             offset += 2;
 24143:           } else {
 24144:             m60FSLW = (M60_FSLW_IOMA_FIRST |
 24145:                                      M60_FSLW_RW_WRITE |
 24146:                                      M60_FSLW_SIZE_BYTE |
 24147:                                      M60_FSLW_TM_SUPER_DATA);  //FSLWはライトバイト
 24148:             if (device == null) {  //デバイスがnull
 24149:               translated = mmuTranslateWriteSuperData (address);  //変換後アドレスを求める
 24150:               device = map[translated >>> XEiJ.BUS_PAGE_BITS];  //デバイスを求める
 24151:             }
 24152:             device.mmdWb (translated, array[offset]);  //ライトバイト
 24153:             address++;
 24154:             translated++;
 24155:             offset++;
 24156:           }
 24157:         }  //while
 24158:       } else {  //ユーザモード
 24159:         final MemoryMappedDevice[] map = DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap;
 24160:         int translated = 0;  //変換後アドレスは0
 24161:         MemoryMappedDevice device = null;  //デバイスはnull
 24162:         while (offset < length) {  //残りが1バイト以上
 24163:           if ((address & mask) == 0) {  //ページの先頭
 24164:             device = null;  //デバイスはnull
 24165:           }
 24166:           if ((address & 3) == 0 && offset + 4 <= length) {  //アドレスが4nかつ残りが4バイト以上
 24167:             m60FSLW = (M60_FSLW_IOMA_FIRST |
 24168:                                      M60_FSLW_RW_WRITE |
 24169:                                      M60_FSLW_SIZE_LONG |
 24170:                                      M60_FSLW_TM_USER_DATA);  //FSLWはライトロング
 24171:             if (device == null) {  //デバイスがnull
 24172:               translated = mmuTranslateWriteUserData (address);  //変換後アドレスを求める
 24173:               device = map[translated >>> XEiJ.BUS_PAGE_BITS];  //デバイスを求める
 24174:             }
 24175:             device.mmdWl (translated,
 24176:                           array[offset] << 24 |
 24177:                           (0xff & array[offset + 1]) << 16 |
 24178:                           (0xff & array[offset + 2]) << 8 |
 24179:                           (0xff & array[offset + 3]));  //ライトロング
 24180:             address += 4;
 24181:             translated += 4;
 24182:             offset += 4;
 24183:           } else if ((address & 1) == 0 && offset + 2 <= length) {  //アドレスが2nかつ残りが2バイト以上
 24184:             m60FSLW = (M60_FSLW_IOMA_FIRST |
 24185:                                      M60_FSLW_RW_WRITE |
 24186:                                      M60_FSLW_SIZE_WORD |
 24187:                                      M60_FSLW_TM_USER_DATA);  //FSLWはライトワード
 24188:             if (device == null) {  //デバイスがnull
 24189:               translated = mmuTranslateWriteUserData (address);  //変換後アドレスを求める
 24190:               device = map[translated >>> XEiJ.BUS_PAGE_BITS];  //デバイスを求める
 24191:             }
 24192:             device.mmdWw (translated,
 24193:                           array[offset] << 8 |
 24194:                           (0xff & array[offset + 1]));  //ライトワード
 24195:             address += 2;
 24196:             translated += 2;
 24197:             offset += 2;
 24198:           } else {
 24199:             m60FSLW = (M60_FSLW_IOMA_FIRST |
 24200:                                      M60_FSLW_RW_WRITE |
 24201:                                      M60_FSLW_SIZE_BYTE |
 24202:                                      M60_FSLW_TM_USER_DATA);  //FSLWはライトバイト
 24203:             if (device == null) {  //デバイスがnull
 24204:               translated = mmuTranslateWriteUserData (address);  //変換後アドレスを求める
 24205:               device = map[translated >>> XEiJ.BUS_PAGE_BITS];  //デバイスを求める
 24206:             }
 24207:             device.mmdWb (translated, array[offset]);  //ライトバイト
 24208:             address++;
 24209:             translated++;
 24210:             offset++;
 24211:           }
 24212:         }  //while
 24213:       }
 24214:     }
 24215:   }  //mmuWriteByteArray
 24216: 
 24217:   //mmuWriteByteArrayDecrement (address, array, offset, length, supervisor)
 24218:   //  ライトバイト配列デクリメント。末尾から書き込む
 24219:   //  address  先頭アドレス
 24220:   //  array    バイト配列
 24221:   //  offset   先頭オフセット
 24222:   //  length   バイト数
 24223:   public static void mmuWriteByteArrayDecrement (int address, byte[] array, int offset, int length, int supervisor) throws M68kException {
 24224:     if (false) {  //1バイトずつmmuWriteByteDataを呼び出す
 24225:       for (int index = length - 1; 0 <= index; index--) {
 24226:         mmuWriteByteData (address + index, array[offset + index], supervisor);
 24227:       }
 24228:     } else {
 24229:       //  変換後アドレスは0
 24230:       //  デバイスはnull
 24231:       //  while 残りが1バイト以上
 24232:       //    if ページの先頭
 24233:       //      デバイスはnull
 24234:       //    if アドレスが4nかつ残りが4バイト以上
 24235:       //      FSLWはライトロング
 24236:       //      if デバイスがnull
 24237:       //        変換後アドレスを求める
 24238:       //        デバイスを求める
 24239:       //      ライトロング
 24240:       //    elif アドレスが2nかつ残りが2バイト以上
 24241:       //      FSLWはライトワード
 24242:       //      if デバイスがnull
 24243:       //        変換後アドレスを求める
 24244:       //        デバイスを求める
 24245:       //      ライトワード
 24246:       //    else
 24247:       //      FSLWはライトバイト
 24248:       //      if デバイスがnull
 24249:       //        変換後アドレスを求める
 24250:       //        デバイスを求める
 24251:       //      ライトバイト
 24252:       //  endwhile
 24253:       address += length;  //addressはaddressの上限
 24254:       offset += length;  //offsetはoffsetの上限
 24255:       length = offset - length;  //lengthはoffsetの下限
 24256:       final int mask = Math.min (XEiJ.BUS_PAGE_SIZE, mmuPageSize) - 1;
 24257:       if (supervisor != 0) {  //スーパーバイザモード
 24258:         final MemoryMappedDevice[] map = DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap;
 24259:         int translated = 0;  //変換後アドレスは0
 24260:         MemoryMappedDevice device = null;  //デバイスはnull
 24261:         while (length < offset) {  //残りが1バイト以上
 24262:           if ((address & mask) == 0) {  //ページの先頭
 24263:             device = null;  //デバイスはnull
 24264:           }
 24265:           if ((address & 3) == 0 && length <= offset - 4) {  //アドレスが4nかつ残りが4バイト以上
 24266:             m60FSLW = (M60_FSLW_IOMA_FIRST |
 24267:                                      M60_FSLW_RW_WRITE |
 24268:                                      M60_FSLW_SIZE_LONG |
 24269:                                      M60_FSLW_TM_SUPER_DATA);  //FSLWはライトロング
 24270:             address -= 4;
 24271:             translated -= 4;
 24272:             offset -= 4;
 24273:             if (device == null) {  //デバイスがnull
 24274:               translated = mmuTranslateWriteSuperData (address);  //変換後アドレスを求める
 24275:               device = map[translated >>> XEiJ.BUS_PAGE_BITS];  //デバイスを求める
 24276:             }
 24277:             device.mmdWl (translated,
 24278:                           array[offset] << 24 |
 24279:                           (0xff & array[offset + 1]) << 16 |
 24280:                           (0xff & array[offset + 2]) << 8 |
 24281:                           (0xff & array[offset + 3]));  //ライトロング
 24282:           } else if ((address & 1) == 0 && length <= offset - 2) {  //アドレスが2nかつ残りが2バイト以上
 24283:             m60FSLW = (M60_FSLW_IOMA_FIRST |
 24284:                                      M60_FSLW_RW_WRITE |
 24285:                                      M60_FSLW_SIZE_WORD |
 24286:                                      M60_FSLW_TM_SUPER_DATA);  //FSLWはライトワード
 24287:             address -= 2;
 24288:             translated -= 2;
 24289:             offset -= 2;
 24290:             if (device == null) {  //デバイスがnull
 24291:               translated = mmuTranslateWriteSuperData (address);  //変換後アドレスを求める
 24292:               device = map[translated >>> XEiJ.BUS_PAGE_BITS];  //デバイスを求める
 24293:             }
 24294:             device.mmdWw (translated,
 24295:                           array[offset] << 8 |
 24296:                           (0xff & array[offset + 1]));  //ライトワード
 24297:           } else {
 24298:             m60FSLW = (M60_FSLW_IOMA_FIRST |
 24299:                                      M60_FSLW_RW_WRITE |
 24300:                                      M60_FSLW_SIZE_BYTE |
 24301:                                      M60_FSLW_TM_SUPER_DATA);  //FSLWはライトバイト
 24302:             address--;
 24303:             translated--;
 24304:             offset--;
 24305:             if (device == null) {  //デバイスがnull
 24306:               translated = mmuTranslateWriteSuperData (address);  //変換後アドレスを求める
 24307:               device = map[translated >>> XEiJ.BUS_PAGE_BITS];  //デバイスを求める
 24308:             }
 24309:             device.mmdWb (translated, array[offset]);  //ライトバイト
 24310:           }
 24311:         }  //while
 24312:       } else {  //ユーザモード
 24313:         final MemoryMappedDevice[] map = DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap;
 24314:         int translated = 0;  //変換後アドレスは0
 24315:         MemoryMappedDevice device = null;  //デバイスはnull
 24316:         while (length < offset) {  //残りが1バイト以上
 24317:           if ((address & mask) == 0) {  //ページの先頭
 24318:             device = null;  //デバイスはnull
 24319:           }
 24320:           if ((address & 3) == 0 && length <= offset - 4) {  //アドレスが4nかつ残りが4バイト以上
 24321:             m60FSLW = (M60_FSLW_IOMA_FIRST |
 24322:                                      M60_FSLW_RW_WRITE |
 24323:                                      M60_FSLW_SIZE_LONG |
 24324:                                      M60_FSLW_TM_USER_DATA);  //FSLWはライトロング
 24325:             address -= 4;
 24326:             translated -= 4;
 24327:             offset -= 4;
 24328:             if (device == null) {  //デバイスがnull
 24329:               translated = mmuTranslateWriteUserData (address);  //変換後アドレスを求める
 24330:               device = map[translated >>> XEiJ.BUS_PAGE_BITS];  //デバイスを求める
 24331:             }
 24332:             device.mmdWl (translated,
 24333:                           array[offset] << 24 |
 24334:                           (0xff & array[offset + 1]) << 16 |
 24335:                           (0xff & array[offset + 2]) << 8 |
 24336:                           (0xff & array[offset + 3]));  //ライトロング
 24337:           } else if ((address & 1) == 0 && length <= offset - 2) {  //アドレスが2nかつ残りが2バイト以上
 24338:             m60FSLW = (M60_FSLW_IOMA_FIRST |
 24339:                                      M60_FSLW_RW_WRITE |
 24340:                                      M60_FSLW_SIZE_WORD |
 24341:                                      M60_FSLW_TM_USER_DATA);  //FSLWはライトワード
 24342:             address -= 2;
 24343:             translated -= 2;
 24344:             offset -= 2;
 24345:             if (device == null) {  //デバイスがnull
 24346:               translated = mmuTranslateWriteUserData (address);  //変換後アドレスを求める
 24347:               device = map[translated >>> XEiJ.BUS_PAGE_BITS];  //デバイスを求める
 24348:             }
 24349:             device.mmdWw (translated,
 24350:                           array[offset] << 8 |
 24351:                           (0xff & array[offset + 1]));  //ライトワード
 24352:           } else {
 24353:             m60FSLW = (M60_FSLW_IOMA_FIRST |
 24354:                                      M60_FSLW_RW_WRITE |
 24355:                                      M60_FSLW_SIZE_BYTE |
 24356:                                      M60_FSLW_TM_USER_DATA);  //FSLWはライトバイト
 24357:             address--;
 24358:             translated--;
 24359:             offset--;
 24360:             if (device == null) {  //デバイスがnull
 24361:               translated = mmuTranslateWriteUserData (address);  //変換後アドレスを求める
 24362:               device = map[translated >>> XEiJ.BUS_PAGE_BITS];  //デバイスを求める
 24363:             }
 24364:             device.mmdWb (translated, array[offset]);  //ライトバイト
 24365:           }
 24366:         }  //while
 24367:       }
 24368:     }
 24369:   }  //mmuWriteByteArrayDecrement
 24370: 
 24371: 
 24372: 
 24373:   //--------------------------------------------------------------------------------
 24374:   //アドレス変換
 24375: 
 24376:   //pa = mmuLoadPhysicalAddressRead (a)
 24377:   //  PLPAR (An)
 24378:   //  DFCに従って論理アドレスを物理アドレスに変換する(リードアクセス)
 24379:   //    DFC  1=ユーザデータ,2=ユーザ命令,5=スーパーバイザデータ,6=スーパーバイザ命令
 24380:   //    pa   物理アドレス
 24381:   //    a    論理アドレス
 24382:   public static int mmuLoadPhysicalAddressRead (int a) throws M68kException {
 24383:     m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_READ | M60_FSLW_SIZE_BYTE | XEiJ.mpuDFC << 16;
 24384:     return ((0b10011111 << 24 << XEiJ.mpuDFC) < 0 ?
 24385:             (0b00101010 << 24 << XEiJ.mpuDFC) < 0 ? mmuTranslateReadSuperCode (a) : mmuTranslateReadSuperData (a) :
 24386:             (0b00101010 << 24 << XEiJ.mpuDFC) < 0 ? mmuTranslateReadUserCode (a) : mmuTranslateReadUserData (a));
 24387:   }  //mmuLoadPhysicalAddressRead(int)
 24388: 
 24389:   //pa = mmuLoadPhysicalAddressWrite (a)
 24390:   //  PLPAW (An)
 24391:   //  DFCに従って論理アドレスを物理アドレスに変換する(ライトアクセス)
 24392:   //    DFC  1=ユーザデータ,2=ユーザ命令,5=スーパーバイザデータ,6=スーパーバイザ命令
 24393:   //    pa   物理アドレス
 24394:   //    a    論理アドレス
 24395:   public static int mmuLoadPhysicalAddressWrite (int a) throws M68kException {
 24396:     m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_BYTE | XEiJ.mpuDFC << 16;
 24397:     return ((0b10011111 << 24 << XEiJ.mpuDFC) < 0 ?
 24398:             (0b00101010 << 24 << XEiJ.mpuDFC) < 0 ? mmuTranslateWriteSuperCode (a) : mmuTranslateWriteSuperData (a) :
 24399:             (0b00101010 << 24 << XEiJ.mpuDFC) < 0 ? mmuTranslateWriteUserCode (a) : mmuTranslateWriteUserData (a));
 24400:   }  //mmuLoadPhysicalAddressWrite(int)
 24401: 
 24402:   //pa = mmuTranslateReadUserData (a)
 24403:   //  アドレス変換を行う(リードユーザデータ)
 24404:   //    pa  物理アドレス
 24405:   //    a   論理アドレス
 24406:   //  m60FSLWのMA,RW,SIZE,TM,IOをセットしてから呼び出すこと
 24407:   public static int mmuTranslateReadUserData (int a) throws M68kException {
 24408:     int logicalPage = a & mmuPageAddressMask;  //論理ページアドレス
 24409:     int head = (logicalPage * MMU_HASH_COEFF >>> -MMU_HASH_BITS) * (4 * MMU_CACHE_WAYS);  //先頭のエントリ
 24410:     if (mmuUserDataCache[head] == logicalPage) {  //リード用の論理ページアドレスと一致した
 24411:       return mmuUserDataCache[head + 2] | (a & mmuPageOffsetMask);  //物理ページアドレスとページオフセットを連結する
 24412:     }
 24413:     if (MMU_CACHE_WAYS >= 2) {  //2ways以上
 24414:       int tail = head + (4 * MMU_CACHE_WAYS - 4);  //末尾のエントリ
 24415:       for (int i = head + 4; i <= tail; i += 4) {
 24416:         if (mmuUserDataCache[i] == logicalPage) {  //リード用の論理ページアドレスと一致した
 24417:           //int logicalRead  = mmuUserDataCache[i    ];
 24418:           int logicalWrite = mmuUserDataCache[i + 1];
 24419:           int physicalPage = mmuUserDataCache[i + 2];
 24420:           int globalFlag   = mmuUserDataCache[i + 3];
 24421:           for (; i > head; i -= 4) {
 24422:             mmuUserDataCache[i    ] = mmuUserDataCache[i - 4];
 24423:             mmuUserDataCache[i + 1] = mmuUserDataCache[i - 3];
 24424:             mmuUserDataCache[i + 2] = mmuUserDataCache[i - 2];
 24425:             mmuUserDataCache[i + 3] = mmuUserDataCache[i - 1];
 24426:           }
 24427:           mmuUserDataCache[i    ] = logicalPage;  //logicalRead
 24428:           mmuUserDataCache[i + 1] = logicalWrite;
 24429:           mmuUserDataCache[i + 2] = physicalPage;
 24430:           mmuUserDataCache[i + 3] = globalFlag;
 24431:           return physicalPage | (a & mmuPageOffsetMask);  //物理ページアドレスとページオフセットを連結する
 24432:         }
 24433:       }  //for i
 24434:     }
 24435:     return mmuTranslateCommon (a, false, false, false);
 24436:   }  //mmuTranslateReadUserData(int)
 24437: 
 24438:   //pa = mmuTranslateReadUserCode (a)
 24439:   //  アドレス変換を行う(リードユーザコード)
 24440:   //    pa  物理アドレス
 24441:   //    a   論理アドレス
 24442:   //  m60FSLWのMA,RW,SIZE,TM,IOをセットしてから呼び出すこと
 24443:   public static int mmuTranslateReadUserCode (int a) throws M68kException {
 24444:     int logicalPage = a & mmuPageAddressMask;  //論理ページアドレス
 24445:     int head = (logicalPage * MMU_HASH_COEFF >>> -MMU_HASH_BITS) * (4 * MMU_CACHE_WAYS);  //先頭のエントリ
 24446:     if (mmuUserCodeCache[head] == logicalPage) {  //リード用の論理ページアドレスと一致した
 24447:       return mmuUserCodeCache[head + 2] | (a & mmuPageOffsetMask);  //物理ページアドレスとページオフセットを連結する
 24448:     }
 24449:     if (MMU_CACHE_WAYS >= 2) {  //2ways以上
 24450:       int tail = head + (4 * MMU_CACHE_WAYS - 4);  //末尾のエントリ
 24451:       for (int i = head + 4; i <= tail; i += 4) {
 24452:         if (mmuUserCodeCache[i] == logicalPage) {  //リード用の論理ページアドレスと一致した
 24453:           //int logicalRead  = mmuUserCodeCache[i    ];
 24454:           int logicalWrite = mmuUserCodeCache[i + 1];
 24455:           int physicalPage = mmuUserCodeCache[i + 2];
 24456:           int globalFlag   = mmuUserCodeCache[i + 3];
 24457:           for (; i > head; i -= 4) {
 24458:             mmuUserCodeCache[i    ] = mmuUserCodeCache[i - 4];
 24459:             mmuUserCodeCache[i + 1] = mmuUserCodeCache[i - 3];
 24460:             mmuUserCodeCache[i + 2] = mmuUserCodeCache[i - 2];
 24461:             mmuUserCodeCache[i + 3] = mmuUserCodeCache[i - 1];
 24462:           }
 24463:           mmuUserCodeCache[head    ] = logicalPage;  //logicalRead
 24464:           mmuUserCodeCache[head + 1] = logicalWrite;
 24465:           mmuUserCodeCache[head + 2] = physicalPage;
 24466:           mmuUserCodeCache[head + 3] = globalFlag;
 24467:           return physicalPage | (a & mmuPageOffsetMask);  //物理ページアドレスとページオフセットを連結する
 24468:         }
 24469:       }  //for i
 24470:     }
 24471:     return mmuTranslateCommon (a, false, false, true);
 24472:   }  //mmuTranslateReadUserCode(int)
 24473: 
 24474:   //pa = mmuTranslateReadSuperData (a)
 24475:   //  アドレス変換を行う(リードスーパーバイザデータ)
 24476:   //    pa  物理アドレス
 24477:   //    a   論理アドレス
 24478:   //  m60FSLWのMA,RW,SIZE,TM,IOをセットしてから呼び出すこと
 24479:   public static int mmuTranslateReadSuperData (int a) throws M68kException {
 24480:     int logicalPage = a & mmuPageAddressMask;  //論理ページアドレス
 24481:     int head = (logicalPage * MMU_HASH_COEFF >>> -MMU_HASH_BITS) * (4 * MMU_CACHE_WAYS);  //先頭のエントリ
 24482:     if (mmuSuperDataCache[head] == logicalPage) {  //リード用の論理ページアドレスと一致した
 24483:       return mmuSuperDataCache[head + 2] | (a & mmuPageOffsetMask);  //物理ページアドレスとページオフセットを連結する
 24484:     }
 24485:     if (MMU_CACHE_WAYS >= 2) {  //2ways以上
 24486:       int tail = head + (4 * MMU_CACHE_WAYS - 4);  //末尾のエントリ
 24487:       for (int i = head + 4; i <= tail; i += 4) {
 24488:         if (mmuSuperDataCache[i] == logicalPage) {  //リード用の論理ページアドレスと一致した
 24489:           //int logicalRead  = mmuSuperDataCache[i    ];
 24490:           int logicalWrite = mmuSuperDataCache[i + 1];
 24491:           int physicalPage = mmuSuperDataCache[i + 2];
 24492:           int globalFlag   = mmuSuperDataCache[i + 3];
 24493:           for (; i > head; i -= 4) {
 24494:             mmuSuperDataCache[i    ] = mmuSuperDataCache[i - 4];
 24495:             mmuSuperDataCache[i + 1] = mmuSuperDataCache[i - 3];
 24496:             mmuSuperDataCache[i + 2] = mmuSuperDataCache[i - 2];
 24497:             mmuSuperDataCache[i + 3] = mmuSuperDataCache[i - 1];
 24498:           }
 24499:           mmuSuperDataCache[i    ] = logicalPage;  //logicalRead
 24500:           mmuSuperDataCache[i + 1] = logicalWrite;
 24501:           mmuSuperDataCache[i + 2] = physicalPage;
 24502:           mmuSuperDataCache[i + 3] = globalFlag;
 24503:           return physicalPage | (a & mmuPageOffsetMask);  //物理ページアドレスとページオフセットを連結する
 24504:         }
 24505:       }  //for i
 24506:     }
 24507:     return mmuTranslateCommon (a, false, true, false);
 24508:   }  //mmuTranslateReadSuperData(int)
 24509: 
 24510:   //pa = mmuTranslateReadSuperCode (a)
 24511:   //  アドレス変換を行う(リードスーパーバイザコード)
 24512:   //    pa  物理アドレス
 24513:   //    a   論理アドレス
 24514:   //  m60FSLWのMA,RW,SIZE,TM,IOをセットしてから呼び出すこと
 24515:   public static int mmuTranslateReadSuperCode (int a) throws M68kException {
 24516:     int logicalPage = a & mmuPageAddressMask;  //論理ページアドレス
 24517:     int head = (logicalPage * MMU_HASH_COEFF >>> -MMU_HASH_BITS) * (4 * MMU_CACHE_WAYS);  //先頭のエントリ
 24518:     if (mmuSuperCodeCache[head] == logicalPage) {  //リード用の論理ページアドレスと一致した
 24519:       return mmuSuperCodeCache[head + 2] | (a & mmuPageOffsetMask);  //物理ページアドレスとページオフセットを連結する
 24520:     }
 24521:     if (MMU_CACHE_WAYS >= 2) {  //2ways以上
 24522:       int tail = head + (4 * MMU_CACHE_WAYS - 4);  //末尾のエントリ
 24523:       for (int i = head + 4; i <= tail; i += 4) {
 24524:         if (mmuSuperCodeCache[i] == logicalPage) {  //リード用の論理ページアドレスと一致した
 24525:           //int logicalRead  = mmuSuperCodeCache[i    ];
 24526:           int logicalWrite = mmuSuperCodeCache[i + 1];
 24527:           int physicalPage = mmuSuperCodeCache[i + 2];
 24528:           int globalFlag   = mmuSuperCodeCache[i + 3];
 24529:           for (; i > head; i -= 4) {
 24530:             mmuSuperCodeCache[i    ] = mmuSuperCodeCache[i - 4];
 24531:             mmuSuperCodeCache[i + 1] = mmuSuperCodeCache[i - 3];
 24532:             mmuSuperCodeCache[i + 2] = mmuSuperCodeCache[i - 2];
 24533:             mmuSuperCodeCache[i + 3] = mmuSuperCodeCache[i - 1];
 24534:           }
 24535:           mmuSuperCodeCache[head    ] = logicalPage;  //logicalRead
 24536:           mmuSuperCodeCache[head + 1] = logicalWrite;
 24537:           mmuSuperCodeCache[head + 2] = physicalPage;
 24538:           mmuSuperCodeCache[head + 3] = globalFlag;
 24539:           return physicalPage | (a & mmuPageOffsetMask);  //物理ページアドレスとページオフセットを連結する
 24540:         }
 24541:       }  //for i
 24542:     }
 24543:     return mmuTranslateCommon (a, false, true, true);
 24544:   }  //mmuTranslateReadSuperCode(int)
 24545: 
 24546:   //pa = mmuTranslateWriteUserData (a)
 24547:   //  アドレス変換を行う(ライトユーザデータ)
 24548:   //    pa  物理アドレス
 24549:   //    a   論理アドレス
 24550:   //  m60FSLWのMA,RW,SIZE,TM,IOをセットしてから呼び出すこと
 24551:   public static int mmuTranslateWriteUserData (int a) throws M68kException {
 24552:     int logicalPage = a & mmuPageAddressMask;  //論理ページアドレス
 24553:     int head = (logicalPage * MMU_HASH_COEFF >>> -MMU_HASH_BITS) * (4 * MMU_CACHE_WAYS);  //先頭のエントリ
 24554:     if (mmuUserDataCache[head + 1] == logicalPage) {  //ライト用の論理ページアドレスと一致した
 24555:       return mmuUserDataCache[head + 2] | (a & mmuPageOffsetMask);  //物理ページアドレスとページオフセットを連結する
 24556:     }
 24557:     if (MMU_CACHE_WAYS >= 2) {  //2ways以上
 24558:       int tail = head + (4 * MMU_CACHE_WAYS - 4);  //末尾のエントリ
 24559:       for (int i = head + 4; i <= tail; i += 4) {
 24560:         if (mmuUserDataCache[i + 1] == logicalPage) {  //ライト用の論理ページアドレスと一致した
 24561:           int logicalRead  = mmuUserDataCache[i    ];
 24562:           //int logicalWrite = mmuUserDataCache[i + 1];
 24563:           int physicalPage = mmuUserDataCache[i + 2];
 24564:           int globalFlag   = mmuUserDataCache[i + 3];
 24565:           for (; i > head; i -= 4) {
 24566:             mmuUserDataCache[i    ] = mmuUserDataCache[i - 4];
 24567:             mmuUserDataCache[i + 1] = mmuUserDataCache[i - 3];
 24568:             mmuUserDataCache[i + 2] = mmuUserDataCache[i - 2];
 24569:             mmuUserDataCache[i + 3] = mmuUserDataCache[i - 1];
 24570:           }
 24571:           mmuUserDataCache[i    ] = logicalRead;
 24572:           mmuUserDataCache[i + 1] = logicalPage;  //logicalWrite
 24573:           mmuUserDataCache[i + 2] = physicalPage;
 24574:           mmuUserDataCache[i + 3] = globalFlag;
 24575:           return physicalPage | (a & mmuPageOffsetMask);  //物理ページアドレスとページオフセットを連結する
 24576:         }
 24577:       }  //for i
 24578:     }
 24579:     return mmuTranslateCommon (a, true, false, false);
 24580:   }  //mmuTranslateWriteUserData(int)
 24581: 
 24582:   //pa = mmuTranslateWriteUserCode (a)
 24583:   //  アドレス変換を行う(ライトユーザコード)
 24584:   //    pa  物理アドレス
 24585:   //    a   論理アドレス
 24586:   //  m60FSLWのMA,RW,SIZE,TM,IOをセットしてから呼び出すこと
 24587:   public static int mmuTranslateWriteUserCode (int a) throws M68kException {
 24588:     int logicalPage = a & mmuPageAddressMask;  //論理ページアドレス
 24589:     int head = (logicalPage * MMU_HASH_COEFF >>> -MMU_HASH_BITS) * (4 * MMU_CACHE_WAYS);  //先頭のエントリ
 24590:     if (mmuUserCodeCache[head + 1] == logicalPage) {  //ライト用の論理ページアドレスと一致した
 24591:       return mmuUserCodeCache[head + 2] | (a & mmuPageOffsetMask);  //物理ページアドレスとページオフセットを連結する
 24592:     }
 24593:     if (MMU_CACHE_WAYS >= 2) {  //2ways以上
 24594:       int tail = head + (4 * MMU_CACHE_WAYS - 4);  //末尾のエントリ
 24595:       for (int i = head + 4; i <= tail; i += 4) {
 24596:         if (mmuUserCodeCache[i + 1] == logicalPage) {  //ライト用の論理ページアドレスと一致した
 24597:           int logicalRead  = mmuUserCodeCache[i    ];
 24598:           //int logicalWrite = mmuUserCodeCache[i + 1];
 24599:           int physicalPage = mmuUserCodeCache[i + 2];
 24600:           int globalFlag   = mmuUserCodeCache[i + 3];
 24601:           for (; i > head; i -= 4) {
 24602:             mmuUserCodeCache[i    ] = mmuUserCodeCache[i - 4];
 24603:             mmuUserCodeCache[i + 1] = mmuUserCodeCache[i - 3];
 24604:             mmuUserCodeCache[i + 2] = mmuUserCodeCache[i - 2];
 24605:             mmuUserCodeCache[i + 3] = mmuUserCodeCache[i - 1];
 24606:           }
 24607:           mmuUserCodeCache[head    ] = logicalRead;
 24608:           mmuUserCodeCache[head + 1] = logicalPage;  //logicalWrite
 24609:           mmuUserCodeCache[head + 2] = physicalPage;
 24610:           mmuUserCodeCache[head + 3] = globalFlag;
 24611:           return physicalPage | (a & mmuPageOffsetMask);  //物理ページアドレスとページオフセットを連結する
 24612:         }
 24613:       }  //for i
 24614:     }
 24615:     return mmuTranslateCommon (a, true, false, true);
 24616:   }  //mmuTranslateWriteUserCode(int)
 24617: 
 24618:   //pa = mmuTranslateWriteSuperData (a)
 24619:   //  アドレス変換を行う(ライトスーパーバイザデータ)
 24620:   //    pa  物理アドレス
 24621:   //    a   論理アドレス
 24622:   //  m60FSLWのMA,RW,SIZE,TM,IOをセットしてから呼び出すこと
 24623:   public static int mmuTranslateWriteSuperData (int a) throws M68kException {
 24624:     int logicalPage = a & mmuPageAddressMask;  //論理ページアドレス
 24625:     int head = (logicalPage * MMU_HASH_COEFF >>> -MMU_HASH_BITS) * (4 * MMU_CACHE_WAYS);  //先頭のエントリ
 24626:     if (mmuSuperDataCache[head + 1] == logicalPage) {  //ライト用の論理ページアドレスと一致した
 24627:       return mmuSuperDataCache[head + 2] | (a & mmuPageOffsetMask);  //物理ページアドレスとページオフセットを連結する
 24628:     }
 24629:     if (MMU_CACHE_WAYS >= 2) {  //2ways以上
 24630:       int tail = head + (4 * MMU_CACHE_WAYS - 4);  //末尾のエントリ
 24631:       for (int i = head + 4; i <= tail; i += 4) {
 24632:         if (mmuSuperDataCache[i + 1] == logicalPage) {  //ライト用の論理ページアドレスと一致した
 24633:           int logicalRead  = mmuSuperDataCache[i    ];
 24634:           //int logicalWrite = mmuSuperDataCache[i + 1];
 24635:           int physicalPage = mmuSuperDataCache[i + 2];
 24636:           int globalFlag   = mmuSuperDataCache[i + 3];
 24637:           for (; i > head; i -= 4) {
 24638:             mmuSuperDataCache[i    ] = mmuSuperDataCache[i - 4];
 24639:             mmuSuperDataCache[i + 1] = mmuSuperDataCache[i - 3];
 24640:             mmuSuperDataCache[i + 2] = mmuSuperDataCache[i - 2];
 24641:             mmuSuperDataCache[i + 3] = mmuSuperDataCache[i - 1];
 24642:           }
 24643:           mmuSuperDataCache[i    ] = logicalRead;
 24644:           mmuSuperDataCache[i + 1] = logicalPage;  //logicalWrite
 24645:           mmuSuperDataCache[i + 2] = physicalPage;
 24646:           mmuSuperDataCache[i + 3] = globalFlag;
 24647:           return physicalPage | (a & mmuPageOffsetMask);  //物理ページアドレスとページオフセットを連結する
 24648:         }
 24649:       }  //for i
 24650:     }
 24651:     return mmuTranslateCommon (a, true, true, false);
 24652:   }  //mmuTranslateWriteSuperData(int)
 24653: 
 24654:   //pa = mmuTranslateWriteSuperCode (a)
 24655:   //  アドレス変換を行う(ライトスーパーバイザコード)
 24656:   //    pa  物理アドレス
 24657:   //    a   論理アドレス
 24658:   //  m60FSLWのMA,RW,SIZE,TM,IOをセットしてから呼び出すこと
 24659:   public static int mmuTranslateWriteSuperCode (int a) throws M68kException {
 24660:     int logicalPage = a & mmuPageAddressMask;  //論理ページアドレス
 24661:     int head = (logicalPage * MMU_HASH_COEFF >>> -MMU_HASH_BITS) * (4 * MMU_CACHE_WAYS);  //先頭のエントリ
 24662:     if (mmuSuperCodeCache[head + 1] == logicalPage) {  //ライト用の論理ページアドレスと一致した
 24663:       return mmuSuperCodeCache[head + 2] | (a & mmuPageOffsetMask);  //物理ページアドレスとページオフセットを連結する
 24664:     }
 24665:     if (MMU_CACHE_WAYS >= 2) {  //2ways以上
 24666:       int tail = head + (4 * MMU_CACHE_WAYS - 4);  //末尾のエントリ
 24667:       for (int i = head + 4; i <= tail; i += 4) {
 24668:         if (mmuSuperCodeCache[i + 1] == logicalPage) {  //ライト用の論理ページアドレスと一致した
 24669:           int logicalRead  = mmuSuperCodeCache[i    ];
 24670:           //int logicalWrite = mmuSuperCodeCache[i + 1];
 24671:           int physicalPage = mmuSuperCodeCache[i + 2];
 24672:           int globalFlag   = mmuSuperCodeCache[i + 3];
 24673:           for (; i > head; i -= 4) {
 24674:             mmuSuperCodeCache[i    ] = mmuSuperCodeCache[i - 4];
 24675:             mmuSuperCodeCache[i + 1] = mmuSuperCodeCache[i - 3];
 24676:             mmuSuperCodeCache[i + 2] = mmuSuperCodeCache[i - 2];
 24677:             mmuSuperCodeCache[i + 3] = mmuSuperCodeCache[i - 1];
 24678:           }
 24679:           mmuSuperCodeCache[head    ] = logicalRead;
 24680:           mmuSuperCodeCache[head + 1] = logicalPage;  //logicalWrite
 24681:           mmuSuperCodeCache[head + 2] = physicalPage;
 24682:           mmuSuperCodeCache[head + 3] = globalFlag;
 24683:           return physicalPage | (a & mmuPageOffsetMask);  //物理ページアドレスとページオフセットを連結する
 24684:         }
 24685:       }  //for i
 24686:     }
 24687:     return mmuTranslateCommon (a, true, true, true);
 24688:   }  //mmuTranslateWriteSuperCode(int)
 24689: 
 24690:   //pa = mmuTranslateCommon (a, write, supervisor, instruction)
 24691:   //  透過変換とテーブルサーチを行い、アドレス変換キャッシュ更新する
 24692:   //  アドレス変換キャッシュがミスしたときに呼び出す
 24693:   //    pa           物理アドレス
 24694:   //    a            論理アドレス
 24695:   //    write        true=ライト,false=リード
 24696:   //    supervisor   true=スーパーバイザ,false=ユーザ。通常はXEiJ.regSRS!=0、PLPAR/PLPAWでは(XEiJ.mpuDFC&4)!=0
 24697:   //    instruction  true=命令,false=データ。通常は命令フェッチまたは拡張ワードのときtrue、PLPAR/PLPAWでは(XEiJ.mpuDFC&2)!=0
 24698:   //  m60FSLWのMA,RW,SIZE,TM,IOをセットしてから呼び出すこと
 24699:   public static int mmuTranslateCommon (int a, boolean write, boolean supervisor, boolean instruction) throws M68kException {
 24700:     if (MMU_DEBUG_TRANSLATION) {
 24701:       System.out.printf ("%08x mmuTranslateCommon(0x%08x,%b,%b,%b)", XEiJ.regPC0, a, write, supervisor, instruction);
 24702:     }
 24703:     int logicalPage = a & mmuPageAddressMask;  //リード用の論理ページアドレス
 24704:     int logicalWrite;  //ライト用の論理ページアドレス
 24705:     int physicalPage;  //物理ページアドレス
 24706:     int globalFlag;  //グローバルフラグ。-1=Global,0=NonGlobal
 24707:     int pa;  //物理アドレス
 24708:     //透過変換
 24709:     //  透過変換はスーパーバイザモードかどうかを条件にすることができる(しないこともできる)
 24710:     //    条件が合わなければヒットしないだけで、スーパーバイザプロテクトのアクセスフォルトになならない
 24711:     //  透過変換をアドレス変換キャッシュに乗せる場合
 24712:     //    アドレス変換キャッシュがヒットしてバスエラーが発生したとき
 24713:     //      透過変換かどうかを再確認してFSLWのTTRをセットしなければならない
 24714:     //    透過変換レジスタが操作されたとき
 24715:     //      OFF→ONの領域だけでなくON→OFFの領域もフラッシュしなければならない
 24716:     //      透過変換レジスタを頻繁に操作されると重くなるかも知れない
 24717:     int tt = (supervisor ?
 24718:               instruction ? mmuSuperCodeTransparent : mmuSuperDataTransparent :
 24719:               instruction ? mmuUserCodeTransparent : mmuUserDataTransparent)[a >>> 24];
 24720:     if (tt != 0) {  //透過変換あり
 24721:       m60FSLW |= M60_FSLW_TRANSPARENT;
 24722:       if (write &&  //ライトで
 24723:           tt < 0) {  //透過変換によるライトプロテクト
 24724:         if (MMU_DEBUG_TRANSLATION) {
 24725:           System.out.printf (" write protected by transparent translation\n", a);
 24726:         }
 24727:         m60FSLW |= M60_FSLW_WRITE_PROTECT;
 24728:         M68kException.m6eNumber = M68kException.M6E_ACCESS_FAULT;
 24729:         //m60Address = a;
 24730:         throw M68kException.m6eSignal;
 24731:       }
 24732:       logicalWrite = logicalPage;  //ライト用の論理ページアドレス
 24733:       physicalPage = logicalPage;  //物理ページアドレス
 24734:       globalFlag = -1;  //グローバルフラグ。-1=Global,0=NonGlobal
 24735:       pa = a;
 24736:       if (MMU_DEBUG_TRANSLATION) {
 24737:         System.out.printf ("=0x%08x (transparent translation)\n", pa);
 24738:       }
 24739:     } else if (mmuEnabled) {  //透過変換なし、アドレス変換あり
 24740:       //テーブルサーチ
 24741:       //  スーパーバイザプロテクトまたはライトプロテクトで停止したときディスクリプタの使用済みフラグはセットされない
 24742:       //  リードモディファイライトはライトでアロケートするのでリードする前にライトプロテクトに引っかかる
 24743:       //    例えばROMの内容をインクリメントしようとしたときライトだけでなくリードも行われない
 24744:       m60FSLW |= M60_FSLW_TABLE_SEARCH;
 24745:       //ルートテーブル
 24746:       int rootDescriptorAddress = (supervisor ? mmuSRP : mmuURP) + ((a & MMU_ROOT_INDEX_MASK) >>> MMU_ROOT_INDEX_BIT0 - 2);  //ルートテーブルディスクリプタのアドレス
 24747:       MemoryMappedDevice rootDescriptorDevice = (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[rootDescriptorAddress >>> XEiJ.BUS_PAGE_BITS];
 24748:       int rootDescriptor = rootDescriptorDevice.mmdRls (rootDescriptorAddress);  //ルートテーブルディスクリプタ
 24749:       if ((rootDescriptor & MMU_DESCRIPTOR_UDT) == MMU_DESCRIPTOR_TYPE_INVALID) {  //ディスクリプタが無効のとき
 24750:         if (MMU_DEBUG_TRANSLATION) {
 24751:           System.out.printf (" invalid root descriptor 0x%08x at 0x%08x\n", rootDescriptor, rootDescriptorAddress);
 24752:         }
 24753:         m60FSLW ^= M60_FSLW_TABLE_SEARCH ^ M60_FSLW_ROOT_DESCRIPTOR;
 24754:         M68kException.m6eNumber = M68kException.M6E_ACCESS_FAULT;
 24755:         //m60Address = a;
 24756:         throw M68kException.m6eSignal;
 24757:       }
 24758:       if (write &&  //ライトで
 24759:           (rootDescriptor & MMU_DESCRIPTOR_WRITE_PROTECTED) != 0) {  //ライトプロテクトされているとき
 24760:         if (MMU_DEBUG_TRANSLATION) {
 24761:           System.out.printf (" write protected by root descriptor 0x%08x at 0x%08x\n", rootDescriptor, rootDescriptorAddress);
 24762:         }
 24763:         m60FSLW ^= M60_FSLW_TABLE_SEARCH ^ M60_FSLW_WRITE_PROTECT;
 24764:         M68kException.m6eNumber = M68kException.M6E_ACCESS_FAULT;
 24765:         //m60Address = a;
 24766:         throw M68kException.m6eSignal;
 24767:       }
 24768:       if ((rootDescriptor & MMU_DESCRIPTOR_USED) == 0) {  //ディスクリプタが未使用のとき
 24769:         rootDescriptor |= MMU_DESCRIPTOR_USED;  //使用済み
 24770:         rootDescriptorDevice.mmdWl (rootDescriptorAddress, rootDescriptor);
 24771:       }
 24772:       //ポインタテーブル
 24773:       int pointerDescriptorAddress = (rootDescriptor & MMU_DESCRIPTOR_POINTER_TABLE_ADDRESS) + ((a & MMU_POINTER_INDEX_MASK) >>> MMU_POINTER_INDEX_BIT0 - 2);  //ポインタテーブルディスクリプタのアドレス
 24774:       MemoryMappedDevice pointerDescriptorDevice = (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[pointerDescriptorAddress >>> XEiJ.BUS_PAGE_BITS];
 24775:       int pointerDescriptor = pointerDescriptorDevice.mmdRls (pointerDescriptorAddress);  //ポインタテーブルディスクリプタ
 24776:       if ((pointerDescriptor & MMU_DESCRIPTOR_UDT) == MMU_DESCRIPTOR_TYPE_INVALID) {  //ディスクリプタが無効のとき
 24777:         if (MMU_DEBUG_TRANSLATION) {
 24778:           System.out.printf (" invalid pointer descriptor 0x%08x at 0x%08x\n", pointerDescriptor, pointerDescriptorAddress);
 24779:         }
 24780:         m60FSLW ^= M60_FSLW_TABLE_SEARCH ^ M60_FSLW_POINTER_DESCRIPTOR;
 24781:         M68kException.m6eNumber = M68kException.M6E_ACCESS_FAULT;
 24782:         //m60Address = a;
 24783:         throw M68kException.m6eSignal;
 24784:       }
 24785:       if (write &&  //ライトで
 24786:           (pointerDescriptor & MMU_DESCRIPTOR_WRITE_PROTECTED) != 0) {  //ライトプロテクトされているとき
 24787:         if (MMU_DEBUG_TRANSLATION) {
 24788:           System.out.printf (" write protected by pointer descriptor 0x%08x at 0x%08x\n", pointerDescriptor, pointerDescriptorAddress);
 24789:         }
 24790:         m60FSLW ^= M60_FSLW_TABLE_SEARCH ^ M60_FSLW_WRITE_PROTECT;
 24791:         M68kException.m6eNumber = M68kException.M6E_ACCESS_FAULT;
 24792:         //m60Address = a;
 24793:         throw M68kException.m6eSignal;
 24794:       }
 24795:       if ((pointerDescriptor & MMU_DESCRIPTOR_USED) == 0) {  //ディスクリプタが未使用のとき
 24796:         pointerDescriptor |= MMU_DESCRIPTOR_USED;  //使用済み
 24797:         pointerDescriptorDevice.mmdWl (pointerDescriptorAddress, pointerDescriptor);
 24798:       }
 24799:       //ページテーブル
 24800:       int pageDescriptorAddress = (pointerDescriptor & mmuPageTableMask) + ((a & mmuPageIndexMask) >>> mmuPageIndexBit2);  //ページテーブルディスクリプタのアドレス
 24801:       MemoryMappedDevice pageDescriptorDevice = (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[pageDescriptorAddress >>> XEiJ.BUS_PAGE_BITS];
 24802:       int pageDescriptor = pageDescriptorDevice.mmdRls (pageDescriptorAddress);  //ページテーブルディスクリプタ
 24803:       if ((pageDescriptor & MMU_DESCRIPTOR_PDT) == MMU_DESCRIPTOR_TYPE_INVALID) {  //ディスクリプタが無効のとき
 24804:         if (MMU_DEBUG_TRANSLATION) {
 24805:           System.out.printf (" invalid page descriptor 0x%08x at 0x%08x\n", pageDescriptor, pageDescriptorAddress);
 24806:         }
 24807:         m60FSLW ^= M60_FSLW_TABLE_SEARCH ^ M60_FSLW_PAGE_FAULT;
 24808:         M68kException.m6eNumber = M68kException.M6E_ACCESS_FAULT;
 24809:         //m60Address = a;
 24810:         throw M68kException.m6eSignal;
 24811:       }
 24812:       if ((pageDescriptor & MMU_DESCRIPTOR_PDT) == MMU_DESCRIPTOR_TYPE_INDIRECT) {  //ディスクリプタが間接のとき
 24813:         pageDescriptorAddress = pageDescriptor & MMU_DESCRIPTOR_INDIRECT_ADDRESS;  //ページテーブルディスクリプタのアドレス
 24814:         pageDescriptorDevice = (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[pageDescriptorAddress >>> XEiJ.BUS_PAGE_BITS];
 24815:         pageDescriptor = pageDescriptorDevice.mmdRls (pageDescriptorAddress);  //ページテーブルディスクリプタ
 24816:         if ((pageDescriptor & MMU_DESCRIPTOR_PDT) == MMU_DESCRIPTOR_TYPE_INVALID) {  //ディスクリプタが無効のとき
 24817:           if (MMU_DEBUG_TRANSLATION) {
 24818:             System.out.printf (" invalid page descriptor 0x%08x at 0x%08x\n", pageDescriptor, pageDescriptorAddress);
 24819:           }
 24820:           m60FSLW ^= M60_FSLW_TABLE_SEARCH ^ M60_FSLW_PAGE_FAULT;
 24821:           M68kException.m6eNumber = M68kException.M6E_ACCESS_FAULT;
 24822:           //m60Address = a;
 24823:           throw M68kException.m6eSignal;
 24824:         }
 24825:         if ((pageDescriptor & MMU_DESCRIPTOR_PDT) == MMU_DESCRIPTOR_TYPE_INDIRECT) {  //ディスクリプタが二重間接のとき
 24826:           if (MMU_DEBUG_TRANSLATION) {
 24827:             System.out.printf (" indirect page descriptor 0x%08x at 0x%08x\n", pageDescriptor, pageDescriptorAddress);
 24828:           }
 24829:           m60FSLW ^= M60_FSLW_TABLE_SEARCH ^ M60_FSLW_INDIRECT_LEVEL;
 24830:           M68kException.m6eNumber = M68kException.M6E_ACCESS_FAULT;
 24831:           //m60Address = a;
 24832:           throw M68kException.m6eSignal;
 24833:         }
 24834:       }
 24835:       if (!supervisor &&  //ユーザモードで
 24836:           (pageDescriptor & MMU_DESCRIPTOR_SUPERVISOR_PROTECTED) != 0) {  //スーパーバイザプロテクトされているとき
 24837:         if (MMU_DEBUG_TRANSLATION) {
 24838:           System.out.printf (" supervisor protected by page descriptor 0x%08x at 0x%08x\n", pageDescriptor, pageDescriptorAddress);
 24839:         }
 24840:         m60FSLW ^= M60_FSLW_TABLE_SEARCH ^ M60_FSLW_SUPERVISOR_PROTECT;
 24841:         M68kException.m6eNumber = M68kException.M6E_ACCESS_FAULT;
 24842:         //m60Address = a;
 24843:         throw M68kException.m6eSignal;
 24844:       }
 24845:       if (write &&  //ライトで
 24846:           (pageDescriptor & MMU_DESCRIPTOR_WRITE_PROTECTED) != 0) {  //ライトプロテクトされているとき
 24847:         if (MMU_DEBUG_TRANSLATION) {
 24848:           System.out.printf (" write protected by page descriptor 0x%08x at 0x%08x\n", pageDescriptor, pageDescriptorAddress);
 24849:         }
 24850:         m60FSLW ^= M60_FSLW_TABLE_SEARCH ^ M60_FSLW_WRITE_PROTECT;
 24851:         M68kException.m6eNumber = M68kException.M6E_ACCESS_FAULT;
 24852:         //m60Address = a;
 24853:         throw M68kException.m6eSignal;
 24854:       }
 24855:       if ((pageDescriptor & MMU_DESCRIPTOR_USED) == 0) {  //ディスクリプタが未使用のとき
 24856:         pageDescriptor |= MMU_DESCRIPTOR_USED;  //使用済みにする
 24857:         pageDescriptorDevice.mmdWl (pageDescriptorAddress, pageDescriptor);
 24858:       }
 24859:       if (write &&  //ライトで
 24860:           (pageDescriptor & MMU_DESCRIPTOR_MODIFIED) == 0) {  //修正済みでないとき
 24861:         pageDescriptor |= MMU_DESCRIPTOR_MODIFIED;  //修正済みにする
 24862:         pageDescriptorDevice.mmdWl (pageDescriptorAddress, pageDescriptor);
 24863:       }
 24864:       //テーブルサーチ終了
 24865:       m60FSLW &= ~M60_FSLW_TABLE_SEARCH;
 24866:       //logicalWrite = (pageDescriptor & (MMU_DESCRIPTOR_MODIFIED | MMU_DESCRIPTOR_WRITE_PROTECTED)) == MMU_DESCRIPTOR_MODIFIED ? logicalPage : 1;  //ライト用の論理ページアドレス。修正済みかつライトプロテクトされていないときだけ有効
 24867:       logicalWrite = (pageDescriptor & MMU_DESCRIPTOR_WRITE_PROTECTED) == 0 ? logicalPage : 1;  //ライト用の論理ページアドレス。ライトプロテクトされていないときだけ有効
 24868:       physicalPage = pageDescriptor & mmuPageAddressMask;  //物理ページアドレス
 24869:       globalFlag = (pageDescriptor & MMU_DESCRIPTOR_GLOBAL) != 0 ? -1 : 0;  //グローバルフラグ。-1=Global,0=NonGlobal
 24870:       pa = physicalPage | a & mmuPageOffsetMask;  //物理ページアドレスとページオフセットを連結する
 24871:       if (MMU_DEBUG_TRANSLATION) {
 24872:         System.out.printf ("=0x%08x (table search)\n", pa);
 24873:         System.out.printf ("  rootTable=0x%08x\n", supervisor ? mmuSRP : mmuURP);
 24874:         System.out.printf ("  rootIndex=0x%08x\n", (a & MMU_ROOT_INDEX_MASK) >>> MMU_ROOT_INDEX_BIT0);
 24875:         System.out.printf ("  rootDescriptorAddress=0x%08x\n", rootDescriptorAddress);
 24876:         System.out.printf ("  rootDescriptor=0x%08x\n", rootDescriptor);
 24877:         System.out.printf ("  pointerTable=0x%08x\n", rootDescriptor & MMU_DESCRIPTOR_POINTER_TABLE_ADDRESS);
 24878:         System.out.printf ("  pointerIndex=0x%08x\n", (a & MMU_POINTER_INDEX_MASK) >>> MMU_POINTER_INDEX_BIT0);
 24879:         System.out.printf ("  pointerDescriptorAddress=0x%08x\n", pointerDescriptorAddress);
 24880:         System.out.printf ("  pointerDescriptor=0x%08x\n", pointerDescriptor);
 24881:         System.out.printf ("  pageTable=0x%08x\n", pointerDescriptor & mmuPageTableMask);
 24882:         System.out.printf ("  pageIndex=0x%08x\n", (a & mmuPageIndexMask) >>> mmuPageIndexBit2 + 2);
 24883:         System.out.printf ("  pageDescriptorAddress=0x%08x\n", pageDescriptorAddress);
 24884:         System.out.printf ("  pageDescriptor=0x%08x\n", pageDescriptor);
 24885:       }
 24886:     } else {  //透過変換なし、アドレス変換なし
 24887:       logicalWrite = logicalPage;  //ライト用の論理ページアドレス
 24888:       physicalPage = logicalPage;  //物理ページアドレス
 24889:       globalFlag = -1;  //グローバルフラグ。-1=Global,0=NonGlobal
 24890:       pa = a;
 24891:       if (MMU_DEBUG_TRANSLATION) {
 24892:         System.out.printf ("=0x%08x (no translation)\n", pa);
 24893:       }
 24894:     }
 24895:     if (!(MMU_NOT_ALLOCATE_CACHE ||
 24896:           (instruction ? mmuNotAllocateCode : mmuNotAllocateData))) {
 24897:       //アドレス変換キャッシュを更新する
 24898:       //  同じ論理ページアドレスのエントリが存在する場合
 24899:       //    (リードでアロケートしたとき修正済みでなかったためライトでアロケートしなかった場合)
 24900:       //    同じ論理ページアドレスのエントリよりも前にあるエントリを後ろにずらす
 24901:       //    空いた先頭のエントリに上書きする
 24902:       //  同じ論理ページアドレスのエントリが存在しない場合
 24903:       //    末尾以外のエントリを後ろにずらす
 24904:       //    空いた先頭のエントリに上書きする
 24905:       int[] cache = (supervisor ?
 24906:                      instruction ? mmuSuperCodeCache : mmuSuperDataCache :
 24907:                      instruction ? mmuUserCodeCache : mmuUserDataCache);
 24908:       int head = (logicalPage * MMU_HASH_COEFF >>> -MMU_HASH_BITS) * (4 * MMU_CACHE_WAYS);  //先頭のエントリ
 24909:       if (MMU_CACHE_WAYS >= 2) {  //2ways以上のとき
 24910:         int tail = head + (4 * MMU_CACHE_WAYS - 4);  //末尾のエントリ→捨てるエントリ
 24911:         if (write) {  //ライトのとき
 24912:           for (int i = head; i < tail; i += 4) {
 24913:             if (cache[i] == logicalPage) {  //リードでアロケートされていた
 24914:               tail = i;
 24915:               break;
 24916:             }
 24917:           }
 24918:         }
 24919:         //  捨てるエントリよりも前にあるエントリを後ろにずらす
 24920:         for (; tail > head; tail -= 4) {
 24921:           cache[tail    ] = cache[tail - 4];
 24922:           cache[tail + 1] = cache[tail - 3];
 24923:           cache[tail + 2] = cache[tail - 2];
 24924:           cache[tail + 3] = cache[tail - 1];
 24925:         }
 24926:       }
 24927:       //  先頭のエントリに上書きする
 24928:       cache[head    ] = logicalPage;  //リード用の論理ページアドレス
 24929:       cache[head + 1] = logicalWrite;  //ライト用の論理ページアドレス
 24930:       cache[head + 2] = physicalPage;  //物理ページアドレス
 24931:       cache[head + 3] = globalFlag;  //グローバルフラグ
 24932:       if (MMU_DEBUG_TRANSLATION) {
 24933:         System.out.printf ("  ATC[%d]={0x%08x,0x%08x,0x%08x,%d}\n",
 24934:                            head / (4 * MMU_CACHE_WAYS), logicalPage, logicalWrite, physicalPage, globalFlag);
 24935:       }
 24936:     }
 24937:     return pa;
 24938:   }  //mmuTranslateCommon(int,boolean,boolean,boolean)
 24939: 
 24940:   public static int mmuPeekFlags;
 24941: 
 24942:   //pa = mmuTranslatePeek (a, supervisor, instruction) {
 24943:   //  アドレス変換を行う(デバッガ用、例外なし、テーブル更新なし)
 24944:   //    pa           物理アドレス。a^1=エラー
 24945:   //    a            論理アドレス
 24946:   //    supervisor   0=ユーザ,0以外=スーパーバイザ。通常はXEiJ.regSRS、PLPAR/PLPAWではXEiJ.mpuDFC&4
 24947:   //    instruction  0=データ,0以外=命令。通常は命令フェッチまたは拡張ワードのとき1、PLPAR/PLPAWではXEiJ.mpuDFC&2
 24948:   public static int mmuTranslatePeek (int a, int supervisor, int instruction) {
 24949:     //透過変換の確認
 24950:     //  透過変換はスーパーバイザモードかどうかを条件にすることができる(しないこともできる)
 24951:     //  透過変換にスーパーバイザプロテクトの機能はない
 24952:     {
 24953:       int[] tta = new int[2];
 24954:       if (instruction != 0) {
 24955:         tta[0] = mmuITT0;
 24956:         tta[1] = mmuITT1;
 24957:       } else {
 24958:         tta[0] = mmuDTT0;
 24959:         tta[1] = mmuDTT1;
 24960:       }
 24961:       for (int i = 0; i < 2; i++) {
 24962:         int ttr = tta[i];
 24963:         if ((ttr & 0x8000) != 0 &&  //Enable
 24964:             ((ttr & 0x4000) != 0 || ((ttr & 0x2000) != 0) == (supervisor != 0)) &&
 24965:             ((a ^ ttr) & ~ttr << 8) >>> 24 == 0) {
 24966:           mmuPeekFlags = ttr & MMU_TTR_WRITE_PROTECT;
 24967:           return a;
 24968:         }
 24969:       }
 24970:     }
 24971:     //透過変換なし
 24972:     if (!mmuEnabled) {  //アドレス変換なし
 24973:       mmuPeekFlags = 0;
 24974:       return a;
 24975:     }
 24976:     //アドレス変換あり
 24977:     int logicalPage = a & mmuPageAddressMask;  //論理ページアドレス
 24978:     //テーブルサーチ開始
 24979:     //  スーパーバイザプロテクトまたはライトプロテクトで停止したときディスクリプタの使用済みフラグはセットされない
 24980:     //  リードモディファイライトはライトでアロケートするのでリードする前にライトプロテクトに引っかかる
 24981:     //    例えばROMの内容をインクリメントしようとしたときライトだけでなくリードも行われない
 24982:     //ルートテーブル
 24983:     int rootDescriptorAddress = (supervisor != 0 ? mmuSRP : mmuURP) + ((a & MMU_ROOT_INDEX_MASK) >>> MMU_ROOT_INDEX_BIT0 - 2);  //ルートテーブルディスクリプタのアドレス
 24984:     int rootDescriptor = XEiJ.busPlsf (rootDescriptorAddress);  //ルートテーブルディスクリプタ
 24985:     if ((rootDescriptor & MMU_DESCRIPTOR_UDT) == MMU_DESCRIPTOR_TYPE_INVALID) {  //ディスクリプタが無効のとき
 24986:       return a ^ 1;
 24987:     }
 24988:     //ポインタテーブル
 24989:     int pointerDescriptorAddress = (rootDescriptor & MMU_DESCRIPTOR_POINTER_TABLE_ADDRESS) + ((a & MMU_POINTER_INDEX_MASK) >>> MMU_POINTER_INDEX_BIT0 - 2);  //ポインタテーブルディスクリプタのアドレス
 24990:     int pointerDescriptor = XEiJ.busPlsf (pointerDescriptorAddress);  //ポインタテーブルディスクリプタ
 24991:     if ((pointerDescriptor & MMU_DESCRIPTOR_UDT) == MMU_DESCRIPTOR_TYPE_INVALID) {  //ディスクリプタが無効のとき
 24992:       return a ^ 1;
 24993:     }
 24994:     //ページテーブル
 24995:     int pageDescriptorAddress = (pointerDescriptor & mmuPageTableMask) + ((a & mmuPageIndexMask) >>> mmuPageIndexBit2);  //ページテーブルディスクリプタのアドレス
 24996:     int pageDescriptor = XEiJ.busPlsf (pageDescriptorAddress);  //ページテーブルディスクリプタ
 24997:     if ((pageDescriptor & MMU_DESCRIPTOR_PDT) == MMU_DESCRIPTOR_TYPE_INVALID) {  //ディスクリプタが無効のとき
 24998:       return a ^ 1;
 24999:     }
 25000:     if ((pageDescriptor & MMU_DESCRIPTOR_PDT) == MMU_DESCRIPTOR_TYPE_INDIRECT) {  //ディスクリプタが間接のとき
 25001:       pageDescriptorAddress = pageDescriptor & MMU_DESCRIPTOR_INDIRECT_ADDRESS;  //ページテーブルディスクリプタのアドレス
 25002:       pageDescriptor = XEiJ.busPlsf (pageDescriptorAddress);  //ページテーブルディスクリプタ
 25003:       if ((pageDescriptor & MMU_DESCRIPTOR_PDT) == MMU_DESCRIPTOR_TYPE_INVALID) {  //ディスクリプタが無効のとき
 25004:         return a ^ 1;
 25005:       }
 25006:       if ((pageDescriptor & MMU_DESCRIPTOR_PDT) == MMU_DESCRIPTOR_TYPE_INDIRECT) {  //ディスクリプタが二重間接のとき
 25007:         return a ^ 1;
 25008:       }
 25009:     }
 25010:     if (supervisor == 0 &&  //ユーザモードで
 25011:         (pageDescriptor & MMU_DESCRIPTOR_SUPERVISOR_PROTECTED) != 0) {  //スーパーバイザプロテクトされているとき
 25012:       return a ^ 1;
 25013:     }
 25014:     int physicalPage = pageDescriptor & mmuPageAddressMask;  //物理ページアドレス
 25015:     //テーブルサーチ終了
 25016:     mmuPeekFlags = pageDescriptor & (MMU_DESCRIPTOR_SUPERVISOR_PROTECTED |
 25017:                                      MMU_DESCRIPTOR_MODIFIED |
 25018:                                      MMU_DESCRIPTOR_USED |
 25019:                                      MMU_DESCRIPTOR_WRITE_PROTECTED);
 25020:     return physicalPage | a & mmuPageOffsetMask;  //物理ページアドレスとページオフセットを連結する
 25021:   }  //mmuTranslatePeek(int,int,int)
 25022: 
 25023: 
 25024: 
 25025:   //実効アドレス
 25026:   //  FIRSTのアドレス
 25027:   //  SECONDでアクセスフォルトが発生した場合でも、FORMAT $4の例外スタックフレームにはFIRSTのアドレスが書き込まれる
 25028:   //  M68kException.m6eAddressは実際にバスエラーが発生したアドレスを示しており、これはSECONDの場合がある
 25029:   private static int m60Address;
 25030: 
 25031:   //  MC68060のページフォルトに関する考察
 25032:   //    ページフォルトが発生すると、プレデクリメントとポストインクリメントによるアドレスレジスタの変化がすべてキャンセルされる
 25033:   //      MOVE.B (A0)+,(A0)+またはMOVE.B -(A0),-(A0)でソースまたはデスティネーションでページフォルトが発生したとき、
 25034:   //      どの組み合わせでもA0は命令開始時の値のままアクセスフォルトハンドラに移行する
 25035:   //    RTEでページフォルトを発生させた命令に復帰すると、ソースをリードするところからやり直す
 25036:   //      MOVE.B <mem>,<mem>のデスティネーションのライトでページフォルトが発生したとき、ソースのリードが2回行われる
 25037:   //      これはMC68060ユーザーズマニュアルの7.10 BUS SYNCHRONIZATIONに書かれており、
 25038:   //      060turboでも、ページフォルトのハンドラでソースを書き換えると結果に反映されることから、リードが再実行されていることを確認できる
 25039:   //      リードすると値が変化する可能性のあるデバイスから非常駐の可能性のあるページに転送するとき、MOVE.B <mem>,<mem>を使ってはいけない
 25040: 
 25041:   //アドレスレジスタの増分
 25042:   //  実効アドレスの計算でポストインクリメントまたはプレデクリメントのとき、
 25043:   //  アドレスレジスタを更新してそのままにするとページフォルトを起こした命令を再実行することができない
 25044:   //  MOVE.L (A0)+,(d16,A0)などでデスティネーションの実効アドレスの計算にソースの結果を反映させる必要があるので、
 25045:   //  アドレスレジスタは更新しておいてページフォルトのときだけ命令開始時の値に巻き戻す
 25046:   //  CMPM.L (A0)+,(A1)+やSUBX.L -(A0),-(A1)などでは複数の増分を並べるかまたは積まなければならない
 25047:   //    m60Incremented += (long) offset << (r << 3);
 25048:   //  で積むことにする
 25049:   //  巻き戻すとき負数に注意する
 25050:   private static long m60Incremented;
 25051: 
 25052:   //  FSLW  Fault Status Long Word
 25053:   //      31  30  29  28  27  26  25  24  23  22  21  20  19  18  17  16  15  14  13  12  11  10   9   8   7   6   5   4   3   2   1   0
 25054:   //    ┏━━━━━━━┯━┯━┯━┯━━━┯━━━┯━━━┯━━━━━┯━┯━┯━┯━┯━┯━┯━┯━┯━┯━┯━┯━┯━┯━┯━┯━┓
 25055:   //    ┃              │MA│  │LK│  RW  │ SIZE │  TT  │    TM    │IO│PBE SBE PTA PTB IL│PF│SP│WP│TWE RE│WE│TTR BPE    SEE┃
 25056:   //    ┗━━━━━━━┷━┷━┷━┷━━━┷━━━┷━━━┷━━━━━┷━┷━┷━┷━┷━┷━┷━┷━┷━┷━┷━┷━┷━┷━┷━┷━┛
 25057:   private static final int M60_FSLW_MISALIGNED         = 1 << 27;  //MA    Misaligned Access
 25058:   private static final int M60_FSLW_LOCKED             = 1 << 25;  //LK    Locked Transfer
 25059:   private static final int M60_FSLW_READ_AND_WRITE     = 3 << 23;  //RW    Read and Write
 25060:   private static final int M60_FSLW_RW_WRITE           = 1 << 23;  //        Write
 25061:   private static final int M60_FSLW_RW_READ            = 2 << 23;  //        Read
 25062:   private static final int M60_FSLW_RW_MODIFY          = 3 << 23;  //        Read-Modify-Write
 25063:   private static final int M60_FSLW_TRANSFER_SIZE      = 3 << 21;  //SIZE  Transfer Size
 25064:   private static final int M60_FSLW_SIZE_LONG          = 0 << 21;  //        Long    マニュアルが間違っているので注意
 25065:   private static final int M60_FSLW_SIZE_BYTE          = 1 << 21;  //        Byte    マニュアルが間違っているので注意
 25066:   private static final int M60_FSLW_SIZE_WORD          = 2 << 21;  //        Word    マニュアルが間違っているので注意
 25067:   private static final int M60_FSLW_SIZE_QUAD          = 3 << 21;  //        Double Precision or MOVE16
 25068:   private static final int M60_FSLW_TRANSFER_TYPE      = 3 << 19;  //TT    Transfer Type
 25069:   private static final int M60_FSLW_TT_NORMAL          = 0 << 19;  //        Normal Access
 25070:   private static final int M60_FSLW_TT_MOVE16          = 1 << 19;  //        MOVE16 Access
 25071:   private static final int M60_FSLW_TT_ALTERNATE       = 2 << 19;  //        Alternate Logical Function Code Access, Debug Access
 25072:   private static final int M60_FSLW_TT_ACKNOWLEDGE     = 3 << 19;  //        Acknowledge Access, Low-Power Stop Broadcast
 25073:   private static final int M60_FSLW_TRANSFER_MODIFIER  = 7 << 16;  //TM    Transfer Modifier
 25074:   private static final int M60_FSLW_TM_CACHE_PUSH      = 0 << 16;  //        Data Cache Push Access
 25075:   private static final int M60_FSLW_TM_USER_DATA       = 1 << 16;  //        User Data Access
 25076:   private static final int M60_FSLW_TM_USER_CODE       = 2 << 16;  //        User Code Access
 25077:   private static final int M60_FSLW_TM_MMU_DATA        = 3 << 16;  //        MMU Table Search Data Access
 25078:   private static final int M60_FSLW_TM_MMU_CODE        = 4 << 16;  //        MMU Table Search Code Access
 25079:   private static final int M60_FSLW_TM_SUPER_DATA      = 5 << 16;  //        Supervisor Data Access
 25080:   private static final int M60_FSLW_TM_SUPER_CODE      = 6 << 16;  //        Supervisor Code Access
 25081:   private static final int M60_FSLW_TM_DATA            = 1 << 16;  //        Data Access
 25082:   private static final int M60_FSLW_TM_CODE            = 2 << 16;  //        Code Access
 25083:   private static final int M60_FSLW_TM_SUPERVISOR      = 4 << 16;  //        Supervisor Access
 25084:   private static final int M60_FSLW_INSTRUCTION        = 1 << 15;  //IO    Instruction or Operand
 25085:   private static final int M60_FSLW_IOMA_FIRST         = 0 << 15 | 0 << 27;  //Fault occurred on the first access of a misaligned transfer, or to the only access of an aligned transfer
 25086:   private static final int M60_FSLW_IOMA_SECOND        = 0 << 15 | 1 << 27;  //Fault occurred on the second or later access of a misaligned transfer
 25087:   private static final int M60_FSLW_IOMA_OPWORD        = 1 << 15 | 0 << 27;  //Fault occurred on an instruction opword fetch
 25088:   private static final int M60_FSLW_IOMA_EXWORD        = 1 << 15 | 1 << 27;  //Fault occurred on a fetch of an extension word
 25089:   private static final int M60_FSLW_PUSH_BUFFER        = 1 << 14;  //PBE   Push Buffer Bus Error
 25090:   private static final int M60_FSLW_STORE_BUFFER       = 1 << 13;  //SBE   Store Buffer Bus Error
 25091:   private static final int M60_FSLW_ROOT_DESCRIPTOR    = 1 << 12;  //PTA   Pointer A Fault
 25092:   private static final int M60_FSLW_POINTER_DESCRIPTOR = 1 << 11;  //PTB   Pointer B Fault
 25093:   private static final int M60_FSLW_INDIRECT_LEVEL     = 1 << 10;  //IL    Indirect Level Fault
 25094:   private static final int M60_FSLW_PAGE_FAULT         = 1 <<  9;  //PF    Page Fault
 25095:   private static final int M60_FSLW_SUPERVISOR_PROTECT = 1 <<  8;  //SP    Supervisor Protect
 25096:   private static final int M60_FSLW_WRITE_PROTECT      = 1 <<  7;  //WP    Write Protect
 25097:   private static final int M60_FSLW_TABLE_SEARCH       = 1 <<  6;  //TWE   Bus Error on Table Search
 25098:   private static final int M60_FSLW_BUS_ERROR_ON_READ  = 1 <<  5;  //RE    Bus Error on Read
 25099:   private static final int M60_FSLW_BUS_ERROR_ON_WRITE = 1 <<  4;  //WE    Bus Error on Write
 25100:   private static final int M60_FSLW_TRANSPARENT        = 1 <<  3;  //TTR   TTR Hit
 25101:   private static final int M60_FSLW_BRANCH_PREDICTION  = 1 <<  2;  //BPE   Branch Prediction Error
 25102:   private static final int M60_FSLW_SOFTWARE_EMULATION = 1 <<  0;  //SEE   Software Emulation Error
 25103: 
 25104:   private static int m60FSLW;
 25105: 
 25106:   public static void m60BusErrorOnRead () {
 25107:     m60FSLW |= M60_FSLW_BUS_ERROR_ON_READ;
 25108:   }
 25109:   public static void m60BusErrorOnWrite () {
 25110:     m60FSLW |= M60_FSLW_BUS_ERROR_ON_WRITE;
 25111:   }
 25112: 
 25113:   private static final String[] M60_FSLW_TEXT_IOMA = {
 25114:     "IO=0,MA=0  First access of a misaligned transfer or only access of an aligned transfer",
 25115:     "IO=0,MA=1  Second or later access of a misaligned transfer",
 25116:     "IO=1,MA=0  Instruction opword fetch",
 25117:     "IO=1,MA=1  Fetch of an extension word",
 25118:   };
 25119:   private static final String[] M60_FSLW_TEXT_LK = {
 25120:     "LK=0       Not locked",
 25121:     "LK=1       Locked",
 25122:   };
 25123:   private static final String[] M60_FSLW_TEXT_RW = {
 25124:     "RW=0       Undefined, reserved",
 25125:     "RW=1       Write",
 25126:     "RW=2       Read",
 25127:     "RW=3       Read-Modify-Write",
 25128:   };
 25129:   private static final String[] M60_FSLW_TEXT_SIZE = {
 25130:     "SIZE=0     Byte",
 25131:     "SIZE=1     Word",
 25132:     "SIZE=2     Long",
 25133:     "SIZE=3     Double precision or MOVE16",
 25134:   };
 25135:   private static final String[] M60_FSLW_TEXT_TT = {
 25136:     "TT=0       Normal access",
 25137:     "TT=1       MOVE16 access",
 25138:     "TT=2       Alternate or debug access",
 25139:     "TT=3       Acknowledge or LPSTOP broadcast",
 25140:   };
 25141:   private static final String[] M60_FSLW_TEXT_TM = {
 25142:     "TM=0       Data cache push access",
 25143:     "TM=1       User data or MOVE16 access",
 25144:     "TM=2       User code access",
 25145:     "TM=3       MMU table search data access",
 25146:     "TM=4       MMU table search code access",
 25147:     "TM=5       Supervisor data access",
 25148:     "TM=6       Supervisor code access",
 25149:     "TM=7       Reserved",
 25150:     //"TM=0       Logical function code 0",
 25151:     //"TM=1       Debug access",
 25152:     //"TM=2       Reserved",
 25153:     //"TM=3       Logical function code 3",
 25154:     //"TM=4       Logical function code 4",
 25155:     //"TM=5       Debug pipe control mode access",
 25156:     //"TM=6       Debug pipe control mode access",
 25157:     //"TM=7       Logical function code 7",
 25158:   };
 25159:   private static final String[] M60_FSLW_TEXT_CAUSE = {
 25160:     "SEE=1      Software emulation error",  //0
 25161:     "",  //1
 25162:     "BPE=1      Branch prediction error",  //2
 25163:     "TTR=1      TTR hit",  //3
 25164:     "WE=1       Bus error on write",  //4
 25165:     "RE=1       Bus error on read",  //5
 25166:     "TWE=1      Bus error on table search",  //6
 25167:     "WP=1       Write protect",  //7
 25168:     "SP=1       Supervisor protect",  //8
 25169:     "PF=1       Page fault",  //9
 25170:     "IL=1       Indirect level fault",  //10
 25171:     "PTB=1      Pointer B fault",  //11
 25172:     "PTA=1      Pointer A fault",  //12
 25173:     "SBE=1      Store buffer bus error",  //13
 25174:     "PBE=1      Push buffer bus error",  //14
 25175:   };
 25176: 
 25177:   private static String m60ErrorToString () {
 25178:     StringBuilder sb = new StringBuilder ();
 25179:     int supervisor = m60FSLW & M60_FSLW_TM_SUPERVISOR;
 25180:     int instruction = m60FSLW & M60_FSLW_TM_CODE;
 25181:     if (0 <= M68kException.m6eNumber && M68kException.m6eNumber < M68kException.M6E_ERROR_NAME.length) {
 25182:       sb.append (M68kException.M6E_ERROR_NAME[M68kException.m6eNumber]);
 25183:     } else {
 25184:       sb.append ("undefined exception #").append (M68kException.m6eNumber);
 25185:     }
 25186:     XEiJ.fmtHex8 (sb.append (" at PC=$"), XEiJ.regPC0).append ("($");
 25187:     int pa = mmuTranslatePeek (XEiJ.regPC0, supervisor, 1);
 25188:     if ((XEiJ.regPC0 ^ pa) == 1) {
 25189:       sb.append ("????????");
 25190:     } else {
 25191:       XEiJ.fmtHex8 (sb, pa);
 25192:     }
 25193:     XEiJ.fmtHex4 (sb.append ("), SR=$"), XEiJ.regSRT1 | XEiJ.regSRS | XEiJ.regSRI | XEiJ.regCCR);
 25194:     //              111111111122222222223333333333444444444455555555556666
 25195:     //    0123456789012345678901234567890123456789012345678901234567890123
 25196:     if (0b0011011101000000000000000000000000000000000000000000000000000000L << M68kException.m6eNumber < 0L) {  //FORMAT $2,$4
 25197:       XEiJ.fmtHex8 (sb.append ("\n  Fault or effective address is EA=$"), m60Address).append ("($");
 25198:       pa = mmuTranslatePeek (m60Address, supervisor, instruction);
 25199:       if ((m60Address ^ pa) == 1) {
 25200:         sb.append ("????????");
 25201:       } else {
 25202:         XEiJ.fmtHex8 (sb, pa);
 25203:       }
 25204:       sb.append (')');
 25205:     }
 25206:     if (M68kException.m6eNumber == M68kException.M6E_ACCESS_FAULT) {  //FORMAT $4
 25207:       XEiJ.fmtHex8 (sb.append ("\n  Fault status long word is FSLW=$"), m60FSLW);
 25208:       sb.append ("\n  Fault was caused by:");
 25209:       for (int i = 14; i >= 0; i--) {
 25210:         if ((m60FSLW & (1 << i)) != 0) {
 25211:           sb.append ("\n    ").append (M60_FSLW_TEXT_CAUSE[i]);
 25212:         }
 25213:       }
 25214:       sb.append ("\n  Fault occured on:\n    ")
 25215:         .append (M60_FSLW_TEXT_IOMA[(m60FSLW & M60_FSLW_INSTRUCTION) >>> 15 - 1 | (m60FSLW & M60_FSLW_MISALIGNED) >>> 27])
 25216:           .append ("\n    ").append (M60_FSLW_TEXT_LK[(m60FSLW & M60_FSLW_LOCKED) >>> 25])
 25217:             .append ("\n    ").append (M60_FSLW_TEXT_RW[(m60FSLW & M60_FSLW_READ_AND_WRITE) >>> 23])
 25218:               .append ("\n    ").append (M60_FSLW_TEXT_SIZE[(m60FSLW & M60_FSLW_TRANSFER_SIZE) >>> 21])
 25219:                 .append ("\n    ").append (M60_FSLW_TEXT_TT[(m60FSLW & M60_FSLW_TRANSFER_TYPE) >>> 19])
 25220:                   .append ("\n    ").append (M60_FSLW_TEXT_TM[(m60FSLW & M60_FSLW_TRANSFER_MODIFIER) >>> 16]);
 25221:     }
 25222:     return sb.toString ();
 25223:   }  //m60ErrorToString()
 25224: 
 25225: 
 25226: 
 25227: }  //class MC68060
 25228: 
 25229: 
 25230: