MC68060.java
     1: //========================================================================================
     2: //  MC68060.java
     3: //    en:MC68060 core
     4: //    ja:MC68060コア
     5: //  Copyright (C) 2003-2023 Makoto Kamada
     6: //
     7: //  This file is part of the XEiJ (X68000 Emulator in Java).
     8: //  You can use, modify and redistribute the XEiJ if the conditions are met.
     9: //  Read the XEiJ License for more details.
    10: //  https://stdkmd.net/xeij/
    11: //========================================================================================
    12: 
    13: package xeij;
    14: 
    15: import java.lang.*;  //Boolean,Character,Class,Comparable,Double,Exception,Float,IllegalArgumentException,Integer,Long,Math,Number,Object,Runnable,SecurityException,String,StringBuilder,System
    16: import java.util.*;  //ArrayList,Arrays,Calendar,GregorianCalendar,HashMap,Map,Map.Entry,Timer,TimerTask,TreeMap
    17: 
    18: public class MC68060 {
    19: 
    20:   public static void mpuCore () {
    21: 
    22:     //例外ループ
    23:     //  別のメソッドで検出された例外を命令ループの外側でcatchすることで命令ループを高速化する
    24:   errorLoop:
    25:     while (XEiJ.mpuClockTime < XEiJ.mpuClockLimit) {
    26:       try {
    27:         //命令ループ
    28:         while (XEiJ.mpuClockTime < XEiJ.mpuClockLimit) {
    29:           int t;
    30:           //命令を実行する
    31:           M68kException.m6eIncremented = 0L;  //アドレスレジスタの増分
    32:           XEiJ.mpuTraceFlag = XEiJ.regSRT1;  //命令実行前のsrT1
    33:           XEiJ.mpuCycleCount = 0;  //第1オペコードからROMのアクセスウエイトを有効にする。命令のサイクル数はすべてXEiJ.mpuCycleCount+=~で加えること
    34:           XEiJ.regPC0 = t = XEiJ.regPC;  //命令の先頭アドレス
    35:           XEiJ.regPC = t + 2;
    36:           //XEiJ.regOC = mmuReadWordZeroOpword (t, XEiJ.regSRS);  //第1オペコード。必ずゼロ拡張すること。pcに奇数が入っていることはないのでアドレスエラーのチェックを省略する
    37:           if (XEiJ.regSRS != 0) {  //スーパーバイザモード
    38:             M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_OPWORD | M68kException.M6E_FSLW_RW_READ | M68kException.M6E_FSLW_SIZE_WORD | M68kException.M6E_FSLW_TM_SUPER_CODE;
    39:             t = mmuTranslateReadSuperCode (t);
    40:             XEiJ.regOC = (InstructionBreakPoint.IBP_ON ? InstructionBreakPoint.ibpOp1SuperMap : DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdRwz (t);
    41:           } else {  //ユーザモード
    42:             M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_OPWORD | M68kException.M6E_FSLW_RW_READ | M68kException.M6E_FSLW_SIZE_WORD | M68kException.M6E_FSLW_TM_USER_CODE;
    43:             t = mmuTranslateReadUserCode (t);
    44:             XEiJ.regOC = (InstructionBreakPoint.IBP_ON ? InstructionBreakPoint.ibpOp1UserMap : DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdRwz (t);
    45:           }
    46: 
    47:           //命令の処理
    48:           //  第1オペコードの上位10ビットで分岐する
    49:         irpSwitch:
    50:           switch (XEiJ.regOC >>> 6) {  //第1オペコードの上位10ビット。XEiJ.regOCはゼロ拡張されているので0b1111_111_111&を省略
    51: 
    52:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
    53:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
    54:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
    55:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
    56:             //ORI.B #<data>,<ea>                              |-|012346|-|-UUUU|-**00|D M+-WXZ  |0000_000_000_mmm_rrr-{data}
    57:             //OR.B #<data>,<ea>                               |A|012346|-|-UUUU|-**00|  M+-WXZ  |0000_000_000_mmm_rrr-{data}  [ORI.B #<data>,<ea>]
    58:             //ORI.B #<data>,CCR                               |-|012346|-|*****|*****|          |0000_000_000_111_100-{data}
    59:           case 0b0000_000_000:
    60:             irpOriByte ();
    61:             break irpSwitch;
    62: 
    63:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
    64:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
    65:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
    66:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
    67:             //ORI.W #<data>,<ea>                              |-|012346|-|-UUUU|-**00|D M+-WXZ  |0000_000_001_mmm_rrr-{data}
    68:             //OR.W #<data>,<ea>                               |A|012346|-|-UUUU|-**00|  M+-WXZ  |0000_000_001_mmm_rrr-{data}  [ORI.W #<data>,<ea>]
    69:             //ORI.W #<data>,SR                                |-|012346|P|*****|*****|          |0000_000_001_111_100-{data}
    70:           case 0b0000_000_001:
    71:             irpOriWord ();
    72:             break irpSwitch;
    73: 
    74:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
    75:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
    76:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
    77:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
    78:             //ORI.L #<data>,<ea>                              |-|012346|-|-UUUU|-**00|D M+-WXZ  |0000_000_010_mmm_rrr-{data}
    79:             //OR.L #<data>,<ea>                               |A|012346|-|-UUUU|-**00|  M+-WXZ  |0000_000_010_mmm_rrr-{data}  [ORI.L #<data>,<ea>]
    80:           case 0b0000_000_010:
    81:             irpOriLong ();
    82:             break irpSwitch;
    83: 
    84:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
    85:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
    86:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
    87:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
    88:             //BITREV.L Dr                                     |-|------|-|-----|-----|D         |0000_000_011_000_rrr (ISA_C)
    89:             //CMP2.B <ea>,Rn                                  |-|--234S|-|-UUUU|-U*U*|  M  WXZP |0000_000_011_mmm_rrr-rnnn000000000000
    90:             //CHK2.B <ea>,Rn                                  |-|--234S|-|-UUUU|-U*U*|  M  WXZP |0000_000_011_mmm_rrr-rnnn100000000000
    91:           case 0b0000_000_011:
    92:             irpCmp2Chk2Byte ();
    93:             break irpSwitch;
    94: 
    95:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
    96:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
    97:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
    98:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
    99:             //BTST.L Dq,Dr                                    |-|012346|-|--U--|--*--|D         |0000_qqq_100_000_rrr
   100:             //MOVEP.W (d16,Ar),Dq                             |-|01234S|-|-----|-----|          |0000_qqq_100_001_rrr-{data}
   101:             //BTST.B Dq,<ea>                                  |-|012346|-|--U--|--*--|  M+-WXZPI|0000_qqq_100_mmm_rrr
   102:           case 0b0000_000_100:
   103:           case 0b0000_001_100:
   104:           case 0b0000_010_100:
   105:           case 0b0000_011_100:
   106:           case 0b0000_100_100:
   107:           case 0b0000_101_100:
   108:           case 0b0000_110_100:
   109:           case 0b0000_111_100:
   110:             irpBtstReg ();
   111:             break irpSwitch;
   112: 
   113:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   114:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   115:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   116:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   117:             //BCHG.L Dq,Dr                                    |-|012346|-|--U--|--*--|D         |0000_qqq_101_000_rrr
   118:             //MOVEP.L (d16,Ar),Dq                             |-|01234S|-|-----|-----|          |0000_qqq_101_001_rrr-{data}
   119:             //BCHG.B Dq,<ea>                                  |-|012346|-|--U--|--*--|  M+-WXZ  |0000_qqq_101_mmm_rrr
   120:           case 0b0000_000_101:
   121:           case 0b0000_001_101:
   122:           case 0b0000_010_101:
   123:           case 0b0000_011_101:
   124:           case 0b0000_100_101:
   125:           case 0b0000_101_101:
   126:           case 0b0000_110_101:
   127:           case 0b0000_111_101:
   128:             irpBchgReg ();
   129:             break irpSwitch;
   130: 
   131:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   132:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   133:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   134:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   135:             //BCLR.L Dq,Dr                                    |-|012346|-|--U--|--*--|D         |0000_qqq_110_000_rrr
   136:             //MOVEP.W Dq,(d16,Ar)                             |-|01234S|-|-----|-----|          |0000_qqq_110_001_rrr-{data}
   137:             //BCLR.B Dq,<ea>                                  |-|012346|-|--U--|--*--|  M+-WXZ  |0000_qqq_110_mmm_rrr
   138:           case 0b0000_000_110:
   139:           case 0b0000_001_110:
   140:           case 0b0000_010_110:
   141:           case 0b0000_011_110:
   142:           case 0b0000_100_110:
   143:           case 0b0000_101_110:
   144:           case 0b0000_110_110:
   145:           case 0b0000_111_110:
   146:             irpBclrReg ();
   147:             break irpSwitch;
   148: 
   149:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   150:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   151:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   152:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   153:             //BSET.L Dq,Dr                                    |-|012346|-|--U--|--*--|D         |0000_qqq_111_000_rrr
   154:             //MOVEP.L Dq,(d16,Ar)                             |-|01234S|-|-----|-----|          |0000_qqq_111_001_rrr-{data}
   155:             //BSET.B Dq,<ea>                                  |-|012346|-|--U--|--*--|  M+-WXZ  |0000_qqq_111_mmm_rrr
   156:           case 0b0000_000_111:
   157:           case 0b0000_001_111:
   158:           case 0b0000_010_111:
   159:           case 0b0000_011_111:
   160:           case 0b0000_100_111:
   161:           case 0b0000_101_111:
   162:           case 0b0000_110_111:
   163:           case 0b0000_111_111:
   164:             irpBsetReg ();
   165:             break irpSwitch;
   166: 
   167:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   168:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   169:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   170:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   171:             //ANDI.B #<data>,<ea>                             |-|012346|-|-UUUU|-**00|D M+-WXZ  |0000_001_000_mmm_rrr-{data}
   172:             //AND.B #<data>,<ea>                              |A|012346|-|-UUUU|-**00|  M+-WXZ  |0000_001_000_mmm_rrr-{data}  [ANDI.B #<data>,<ea>]
   173:             //ANDI.B #<data>,CCR                              |-|012346|-|*****|*****|          |0000_001_000_111_100-{data}
   174:           case 0b0000_001_000:
   175:             irpAndiByte ();
   176:             break irpSwitch;
   177: 
   178:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   179:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   180:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   181:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   182:             //ANDI.W #<data>,<ea>                             |-|012346|-|-UUUU|-**00|D M+-WXZ  |0000_001_001_mmm_rrr-{data}
   183:             //AND.W #<data>,<ea>                              |A|012346|-|-UUUU|-**00|  M+-WXZ  |0000_001_001_mmm_rrr-{data}  [ANDI.W #<data>,<ea>]
   184:             //ANDI.W #<data>,SR                               |-|012346|P|*****|*****|          |0000_001_001_111_100-{data}
   185:           case 0b0000_001_001:
   186:             irpAndiWord ();
   187:             break irpSwitch;
   188: 
   189:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   190:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   191:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   192:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   193:             //ANDI.L #<data>,<ea>                             |-|012346|-|-UUUU|-**00|D M+-WXZ  |0000_001_010_mmm_rrr-{data}
   194:             //AND.L #<data>,<ea>                              |A|012346|-|-UUUU|-**00|  M+-WXZ  |0000_001_010_mmm_rrr-{data}  [ANDI.L #<data>,<ea>]
   195:           case 0b0000_001_010:
   196:             irpAndiLong ();
   197:             break irpSwitch;
   198: 
   199:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   200:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   201:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   202:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   203:             //BYTEREV.L Dr                                    |-|------|-|-----|-----|D         |0000_001_011_000_rrr (ISA_C)
   204:             //CMP2.W <ea>,Rn                                  |-|--234S|-|-UUUU|-U*U*|  M  WXZP |0000_001_011_mmm_rrr-rnnn000000000000
   205:             //CHK2.W <ea>,Rn                                  |-|--234S|-|-UUUU|-U*U*|  M  WXZP |0000_001_011_mmm_rrr-rnnn100000000000
   206:           case 0b0000_001_011:
   207:             irpCmp2Chk2Word ();
   208:             break irpSwitch;
   209: 
   210:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   211:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   212:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   213:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   214:             //SUBI.B #<data>,<ea>                             |-|012346|-|UUUUU|*****|D M+-WXZ  |0000_010_000_mmm_rrr-{data}
   215:             //SUB.B #<data>,<ea>                              |A|012346|-|UUUUU|*****|  M+-WXZ  |0000_010_000_mmm_rrr-{data}  [SUBI.B #<data>,<ea>]
   216:           case 0b0000_010_000:
   217:             irpSubiByte ();
   218:             break irpSwitch;
   219: 
   220:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   221:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   222:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   223:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   224:             //SUBI.W #<data>,<ea>                             |-|012346|-|UUUUU|*****|D M+-WXZ  |0000_010_001_mmm_rrr-{data}
   225:             //SUB.W #<data>,<ea>                              |A|012346|-|UUUUU|*****|  M+-WXZ  |0000_010_001_mmm_rrr-{data}  [SUBI.W #<data>,<ea>]
   226:           case 0b0000_010_001:
   227:             irpSubiWord ();
   228:             break irpSwitch;
   229: 
   230:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   231:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   232:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   233:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   234:             //SUBI.L #<data>,<ea>                             |-|012346|-|UUUUU|*****|D M+-WXZ  |0000_010_010_mmm_rrr-{data}
   235:             //SUB.L #<data>,<ea>                              |A|012346|-|UUUUU|*****|  M+-WXZ  |0000_010_010_mmm_rrr-{data}  [SUBI.L #<data>,<ea>]
   236:           case 0b0000_010_010:
   237:             irpSubiLong ();
   238:             break irpSwitch;
   239: 
   240:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   241:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   242:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   243:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   244:             //FF1.L Dr                                        |-|------|-|-UUUU|-**00|D         |0000_010_011_000_rrr (ISA_C)
   245:             //CMP2.L <ea>,Rn                                  |-|--234S|-|-UUUU|-U*U*|  M  WXZP |0000_010_011_mmm_rrr-rnnn000000000000
   246:             //CHK2.L <ea>,Rn                                  |-|--234S|-|-UUUU|-U*U*|  M  WXZP |0000_010_011_mmm_rrr-rnnn100000000000
   247:           case 0b0000_010_011:
   248:             irpCmp2Chk2Long ();
   249:             break irpSwitch;
   250: 
   251:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   252:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   253:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   254:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   255:             //ADDI.B #<data>,<ea>                             |-|012346|-|UUUUU|*****|D M+-WXZ  |0000_011_000_mmm_rrr-{data}
   256:           case 0b0000_011_000:
   257:             irpAddiByte ();
   258:             break irpSwitch;
   259: 
   260:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   261:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   262:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   263:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   264:             //ADDI.W #<data>,<ea>                             |-|012346|-|UUUUU|*****|D M+-WXZ  |0000_011_001_mmm_rrr-{data}
   265:           case 0b0000_011_001:
   266:             irpAddiWord ();
   267:             break irpSwitch;
   268: 
   269:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   270:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   271:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   272:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   273:             //ADDI.L #<data>,<ea>                             |-|012346|-|UUUUU|*****|D M+-WXZ  |0000_011_010_mmm_rrr-{data}
   274:           case 0b0000_011_010:
   275:             irpAddiLong ();
   276:             break irpSwitch;
   277: 
   278:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   279:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   280:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   281:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   282:             //BTST.L #<data>,Dr                               |-|012346|-|--U--|--*--|D         |0000_100_000_000_rrr-{data}
   283:             //BTST.B #<data>,<ea>                             |-|012346|-|--U--|--*--|  M+-WXZP |0000_100_000_mmm_rrr-{data}
   284:           case 0b0000_100_000:
   285:             irpBtstImm ();
   286:             break irpSwitch;
   287: 
   288:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   289:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   290:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   291:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   292:             //BCHG.L #<data>,Dr                               |-|012346|-|--U--|--*--|D         |0000_100_001_000_rrr-{data}
   293:             //BCHG.B #<data>,<ea>                             |-|012346|-|--U--|--*--|  M+-WXZ  |0000_100_001_mmm_rrr-{data}
   294:           case 0b0000_100_001:
   295:             irpBchgImm ();
   296:             break irpSwitch;
   297: 
   298:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   299:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   300:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   301:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   302:             //BCLR.L #<data>,Dr                               |-|012346|-|--U--|--*--|D         |0000_100_010_000_rrr-{data}
   303:             //BCLR.B #<data>,<ea>                             |-|012346|-|--U--|--*--|  M+-WXZ  |0000_100_010_mmm_rrr-{data}
   304:           case 0b0000_100_010:
   305:             irpBclrImm ();
   306:             break irpSwitch;
   307: 
   308:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   309:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   310:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   311:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   312:             //BSET.L #<data>,Dr                               |-|012346|-|--U--|--*--|D         |0000_100_011_000_rrr-{data}
   313:             //BSET.B #<data>,<ea>                             |-|012346|-|--U--|--*--|  M+-WXZ  |0000_100_011_mmm_rrr-{data}
   314:           case 0b0000_100_011:
   315:             irpBsetImm ();
   316:             break irpSwitch;
   317: 
   318:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   319:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   320:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   321:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   322:             //EORI.B #<data>,<ea>                             |-|012346|-|-UUUU|-**00|D M+-WXZ  |0000_101_000_mmm_rrr-{data}
   323:             //EOR.B #<data>,<ea>                              |A|012346|-|-UUUU|-**00|D M+-WXZ  |0000_101_000_mmm_rrr-{data}  [EORI.B #<data>,<ea>]
   324:             //EORI.B #<data>,CCR                              |-|012346|-|*****|*****|          |0000_101_000_111_100-{data}
   325:           case 0b0000_101_000:
   326:             irpEoriByte ();
   327:             break irpSwitch;
   328: 
   329:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   330:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   331:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   332:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   333:             //EORI.W #<data>,<ea>                             |-|012346|-|-UUUU|-**00|D M+-WXZ  |0000_101_001_mmm_rrr-{data}
   334:             //EOR.W #<data>,<ea>                              |A|012346|-|-UUUU|-**00|D M+-WXZ  |0000_101_001_mmm_rrr-{data}  [EORI.W #<data>,<ea>]
   335:             //EORI.W #<data>,SR                               |-|012346|P|*****|*****|          |0000_101_001_111_100-{data}
   336:           case 0b0000_101_001:
   337:             irpEoriWord ();
   338:             break irpSwitch;
   339: 
   340:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   341:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   342:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   343:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   344:             //EORI.L #<data>,<ea>                             |-|012346|-|-UUUU|-**00|D M+-WXZ  |0000_101_010_mmm_rrr-{data}
   345:             //EOR.L #<data>,<ea>                              |A|012346|-|-UUUU|-**00|D M+-WXZ  |0000_101_010_mmm_rrr-{data}  [EORI.L #<data>,<ea>]
   346:           case 0b0000_101_010:
   347:             irpEoriLong ();
   348:             break irpSwitch;
   349: 
   350:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   351:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   352:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   353:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   354:             //CAS.B Dc,Du,<ea>                                |-|--2346|-|-UUUU|-****|  M+-WXZ  |0000_101_011_mmm_rrr-0000000uuu000ccc
   355:           case 0b0000_101_011:
   356:             irpCasByte ();
   357:             break irpSwitch;
   358: 
   359:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   360:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   361:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   362:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   363:             //CMPI.B #<data>,<ea>                             |-|--2346|-|-UUUU|-****|D M+-WXZP |0000_110_000_mmm_rrr-{data}
   364:             //CMP.B #<data>,<ea>                              |A|--2346|-|-UUUU|-****|  M+-WXZP |0000_110_000_mmm_rrr-{data}  [CMPI.B #<data>,<ea>]
   365:           case 0b0000_110_000:
   366:             irpCmpiByte ();
   367:             break irpSwitch;
   368: 
   369:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   370:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   371:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   372:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   373:             //CMPI.W #<data>,<ea>                             |-|--2346|-|-UUUU|-****|D M+-WXZP |0000_110_001_mmm_rrr-{data}
   374:             //CMP.W #<data>,<ea>                              |A|--2346|-|-UUUU|-****|  M+-WXZP |0000_110_001_mmm_rrr-{data}  [CMPI.W #<data>,<ea>]
   375:           case 0b0000_110_001:
   376:             irpCmpiWord ();
   377:             break irpSwitch;
   378: 
   379:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   380:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   381:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   382:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   383:             //CMPI.L #<data>,<ea>                             |-|--2346|-|-UUUU|-****|D M+-WXZP |0000_110_010_mmm_rrr-{data}
   384:             //CMP.L #<data>,<ea>                              |A|--2346|-|-UUUU|-****|  M+-WXZP |0000_110_010_mmm_rrr-{data}  [CMPI.L #<data>,<ea>]
   385:           case 0b0000_110_010:
   386:             irpCmpiLong ();
   387:             break irpSwitch;
   388: 
   389:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   390:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   391:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   392:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   393:             //CAS.W Dc,Du,<ea>                                |-|--2346|-|-UUUU|-****|  M+-WXZ  |0000_110_011_mmm_rrr-0000000uuu000ccc        (68060 software emulate misaligned <ea>)
   394:             //CAS2.W Dc1:Dc2,Du1:Du2,(Rn1):(Rn2)              |-|--234S|-|-UUUU|-****|          |0000_110_011_111_100-rnnn000uuu000ccc(1)-rnnn_000_uuu_000_ccc(2)
   395:           case 0b0000_110_011:
   396:             irpCasWord ();
   397:             break irpSwitch;
   398: 
   399:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   400:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   401:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   402:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   403:             //MOVES.B <ea>,Rn                                 |-|-12346|P|-----|-----|  M+-WXZ  |0000_111_000_mmm_rrr-rnnn000000000000
   404:             //MOVES.B Rn,<ea>                                 |-|-12346|P|-----|-----|  M+-WXZ  |0000_111_000_mmm_rrr-rnnn100000000000
   405:           case 0b0000_111_000:
   406:             irpMovesByte ();
   407:             break irpSwitch;
   408: 
   409:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   410:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   411:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   412:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   413:             //MOVES.W <ea>,Rn                                 |-|-12346|P|-----|-----|  M+-WXZ  |0000_111_001_mmm_rrr-rnnn000000000000
   414:             //MOVES.W Rn,<ea>                                 |-|-12346|P|-----|-----|  M+-WXZ  |0000_111_001_mmm_rrr-rnnn100000000000
   415:           case 0b0000_111_001:
   416:             irpMovesWord ();
   417:             break irpSwitch;
   418: 
   419:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   420:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   421:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   422:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   423:             //MOVES.L <ea>,Rn                                 |-|-12346|P|-----|-----|  M+-WXZ  |0000_111_010_mmm_rrr-rnnn000000000000
   424:             //MOVES.L Rn,<ea>                                 |-|-12346|P|-----|-----|  M+-WXZ  |0000_111_010_mmm_rrr-rnnn100000000000
   425:           case 0b0000_111_010:
   426:             irpMovesLong ();
   427:             break irpSwitch;
   428: 
   429:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   430:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   431:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   432:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   433:             //CAS.L Dc,Du,<ea>                                |-|--2346|-|-UUUU|-****|  M+-WXZ  |0000_111_011_mmm_rrr-0000000uuu000ccc        (68060 software emulate misaligned <ea>)
   434:             //CAS2.L Dc1:Dc2,Du1:Du2,(Rn1):(Rn2)              |-|--234S|-|-UUUU|-****|          |0000_111_011_111_100-rnnn000uuu000ccc(1)-rnnn_000_uuu_000_ccc(2)
   435:           case 0b0000_111_011:
   436:             irpCasLong ();
   437:             break irpSwitch;
   438: 
   439:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   440:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   441:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   442:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   443:             //MOVE.B <ea>,Dq                                  |-|012346|-|-UUUU|-**00|D M+-WXZPI|0001_qqq_000_mmm_rrr
   444:           case 0b0001_000_000:
   445:           case 0b0001_001_000:
   446:           case 0b0001_010_000:
   447:           case 0b0001_011_000:
   448:           case 0b0001_100_000:
   449:           case 0b0001_101_000:
   450:           case 0b0001_110_000:
   451:           case 0b0001_111_000:
   452:             irpMoveToDRByte ();
   453:             break irpSwitch;
   454: 
   455:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   456:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   457:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   458:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   459:             //MOVE.B <ea>,(Aq)                                |-|012346|-|-UUUU|-**00|D M+-WXZPI|0001_qqq_010_mmm_rrr
   460:           case 0b0001_000_010:
   461:           case 0b0001_001_010:
   462:           case 0b0001_010_010:
   463:           case 0b0001_011_010:
   464:           case 0b0001_100_010:
   465:           case 0b0001_101_010:
   466:           case 0b0001_110_010:
   467:           case 0b0001_111_010:
   468:             irpMoveToMMByte ();
   469:             break irpSwitch;
   470: 
   471:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   472:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   473:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   474:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   475:             //MOVE.B <ea>,(Aq)+                               |-|012346|-|-UUUU|-**00|D M+-WXZPI|0001_qqq_011_mmm_rrr
   476:           case 0b0001_000_011:
   477:           case 0b0001_001_011:
   478:           case 0b0001_010_011:
   479:           case 0b0001_011_011:
   480:           case 0b0001_100_011:
   481:           case 0b0001_101_011:
   482:           case 0b0001_110_011:
   483:           case 0b0001_111_011:
   484:             irpMoveToMPByte ();
   485:             break irpSwitch;
   486: 
   487:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   488:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   489:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   490:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   491:             //MOVE.B <ea>,-(Aq)                               |-|012346|-|-UUUU|-**00|D M+-WXZPI|0001_qqq_100_mmm_rrr
   492:           case 0b0001_000_100:
   493:           case 0b0001_001_100:
   494:           case 0b0001_010_100:
   495:           case 0b0001_011_100:
   496:           case 0b0001_100_100:
   497:           case 0b0001_101_100:
   498:           case 0b0001_110_100:
   499:           case 0b0001_111_100:
   500:             irpMoveToMNByte ();
   501:             break irpSwitch;
   502: 
   503:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   504:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   505:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   506:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   507:             //MOVE.B <ea>,(d16,Aq)                            |-|012346|-|-UUUU|-**00|D M+-WXZPI|0001_qqq_101_mmm_rrr
   508:           case 0b0001_000_101:
   509:           case 0b0001_001_101:
   510:           case 0b0001_010_101:
   511:           case 0b0001_011_101:
   512:           case 0b0001_100_101:
   513:           case 0b0001_101_101:
   514:           case 0b0001_110_101:
   515:           case 0b0001_111_101:
   516:             irpMoveToMWByte ();
   517:             break irpSwitch;
   518: 
   519:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   520:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   521:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   522:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   523:             //MOVE.B <ea>,(d8,Aq,Rn.wl)                       |-|012346|-|-UUUU|-**00|D M+-WXZPI|0001_qqq_110_mmm_rrr
   524:           case 0b0001_000_110:
   525:           case 0b0001_001_110:
   526:           case 0b0001_010_110:
   527:           case 0b0001_011_110:
   528:           case 0b0001_100_110:
   529:           case 0b0001_101_110:
   530:           case 0b0001_110_110:
   531:           case 0b0001_111_110:
   532:             irpMoveToMXByte ();
   533:             break irpSwitch;
   534: 
   535:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   536:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   537:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   538:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   539:             //MOVE.B <ea>,(xxx).W                             |-|012346|-|-UUUU|-**00|D M+-WXZPI|0001_000_111_mmm_rrr
   540:           case 0b0001_000_111:
   541:             irpMoveToZWByte ();
   542:             break irpSwitch;
   543: 
   544:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   545:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   546:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   547:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   548:             //MOVE.B <ea>,(xxx).L                             |-|012346|-|-UUUU|-**00|D M+-WXZPI|0001_001_111_mmm_rrr
   549:           case 0b0001_001_111:
   550:             irpMoveToZLByte ();
   551:             break irpSwitch;
   552: 
   553:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   554:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   555:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   556:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   557:             //MOVE.L <ea>,Dq                                  |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0010_qqq_000_mmm_rrr
   558:           case 0b0010_000_000:
   559:           case 0b0010_001_000:
   560:           case 0b0010_010_000:
   561:           case 0b0010_011_000:
   562:           case 0b0010_100_000:
   563:           case 0b0010_101_000:
   564:           case 0b0010_110_000:
   565:           case 0b0010_111_000:
   566:             irpMoveToDRLong ();
   567:             break irpSwitch;
   568: 
   569:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   570:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   571:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   572:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   573:             //MOVEA.L <ea>,Aq                                 |-|012346|-|-----|-----|DAM+-WXZPI|0010_qqq_001_mmm_rrr
   574:             //MOVE.L <ea>,Aq                                  |A|012346|-|-----|-----|DAM+-WXZPI|0010_qqq_001_mmm_rrr [MOVEA.L <ea>,Aq]
   575:           case 0b0010_000_001:
   576:           case 0b0010_001_001:
   577:           case 0b0010_010_001:
   578:           case 0b0010_011_001:
   579:           case 0b0010_100_001:
   580:           case 0b0010_101_001:
   581:           case 0b0010_110_001:
   582:           case 0b0010_111_001:
   583:             irpMoveaLong ();
   584:             break irpSwitch;
   585: 
   586:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   587:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   588:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   589:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   590:             //MOVE.L <ea>,(Aq)                                |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0010_qqq_010_mmm_rrr
   591:           case 0b0010_000_010:
   592:           case 0b0010_001_010:
   593:           case 0b0010_010_010:
   594:           case 0b0010_011_010:
   595:           case 0b0010_100_010:
   596:           case 0b0010_101_010:
   597:           case 0b0010_110_010:
   598:           case 0b0010_111_010:
   599:             irpMoveToMMLong ();
   600:             break irpSwitch;
   601: 
   602:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   603:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   604:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   605:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   606:             //MOVE.L <ea>,(Aq)+                               |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0010_qqq_011_mmm_rrr
   607:           case 0b0010_000_011:
   608:           case 0b0010_001_011:
   609:           case 0b0010_010_011:
   610:           case 0b0010_011_011:
   611:           case 0b0010_100_011:
   612:           case 0b0010_101_011:
   613:           case 0b0010_110_011:
   614:           case 0b0010_111_011:
   615:             irpMoveToMPLong ();
   616:             break irpSwitch;
   617: 
   618:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   619:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   620:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   621:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   622:             //MOVE.L <ea>,-(Aq)                               |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0010_qqq_100_mmm_rrr
   623:           case 0b0010_000_100:
   624:           case 0b0010_001_100:
   625:           case 0b0010_010_100:
   626:           case 0b0010_011_100:
   627:           case 0b0010_100_100:
   628:           case 0b0010_101_100:
   629:           case 0b0010_110_100:
   630:           case 0b0010_111_100:
   631:             irpMoveToMNLong ();
   632:             break irpSwitch;
   633: 
   634:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   635:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   636:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   637:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   638:             //MOVE.L <ea>,(d16,Aq)                            |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0010_qqq_101_mmm_rrr
   639:           case 0b0010_000_101:
   640:           case 0b0010_001_101:
   641:           case 0b0010_010_101:
   642:           case 0b0010_011_101:
   643:           case 0b0010_100_101:
   644:           case 0b0010_101_101:
   645:           case 0b0010_110_101:
   646:           case 0b0010_111_101:
   647:             irpMoveToMWLong ();
   648:             break irpSwitch;
   649: 
   650:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   651:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   652:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   653:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   654:             //MOVE.L <ea>,(d8,Aq,Rn.wl)                       |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0010_qqq_110_mmm_rrr
   655:           case 0b0010_000_110:
   656:           case 0b0010_001_110:
   657:           case 0b0010_010_110:
   658:           case 0b0010_011_110:
   659:           case 0b0010_100_110:
   660:           case 0b0010_101_110:
   661:           case 0b0010_110_110:
   662:           case 0b0010_111_110:
   663:             irpMoveToMXLong ();
   664:             break irpSwitch;
   665: 
   666:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   667:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   668:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   669:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   670:             //MOVE.L <ea>,(xxx).W                             |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0010_000_111_mmm_rrr
   671:           case 0b0010_000_111:
   672:             irpMoveToZWLong ();
   673:             break irpSwitch;
   674: 
   675:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   676:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   677:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   678:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   679:             //MOVE.L <ea>,(xxx).L                             |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0010_001_111_mmm_rrr
   680:           case 0b0010_001_111:
   681:             irpMoveToZLLong ();
   682:             break irpSwitch;
   683: 
   684:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   685:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   686:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   687:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   688:             //MOVE.W <ea>,Dq                                  |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0011_qqq_000_mmm_rrr
   689:           case 0b0011_000_000:
   690:           case 0b0011_001_000:
   691:           case 0b0011_010_000:
   692:           case 0b0011_011_000:
   693:           case 0b0011_100_000:
   694:           case 0b0011_101_000:
   695:           case 0b0011_110_000:
   696:           case 0b0011_111_000:
   697:             irpMoveToDRWord ();
   698:             break irpSwitch;
   699: 
   700:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   701:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   702:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   703:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   704:             //MOVEA.W <ea>,Aq                                 |-|012346|-|-----|-----|DAM+-WXZPI|0011_qqq_001_mmm_rrr
   705:             //MOVE.W <ea>,Aq                                  |A|012346|-|-----|-----|DAM+-WXZPI|0011_qqq_001_mmm_rrr [MOVEA.W <ea>,Aq]
   706:           case 0b0011_000_001:
   707:           case 0b0011_001_001:
   708:           case 0b0011_010_001:
   709:           case 0b0011_011_001:
   710:           case 0b0011_100_001:
   711:           case 0b0011_101_001:
   712:           case 0b0011_110_001:
   713:           case 0b0011_111_001:
   714:             irpMoveaWord ();
   715:             break irpSwitch;
   716: 
   717:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   718:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   719:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   720:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   721:             //MOVE.W <ea>,(Aq)                                |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0011_qqq_010_mmm_rrr
   722:           case 0b0011_000_010:
   723:           case 0b0011_001_010:
   724:           case 0b0011_010_010:
   725:           case 0b0011_011_010:
   726:           case 0b0011_100_010:
   727:           case 0b0011_101_010:
   728:           case 0b0011_110_010:
   729:           case 0b0011_111_010:
   730:             irpMoveToMMWord ();
   731:             break irpSwitch;
   732: 
   733:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   734:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   735:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   736:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   737:             //MOVE.W <ea>,(Aq)+                               |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0011_qqq_011_mmm_rrr
   738:           case 0b0011_000_011:
   739:           case 0b0011_001_011:
   740:           case 0b0011_010_011:
   741:           case 0b0011_011_011:
   742:           case 0b0011_100_011:
   743:           case 0b0011_101_011:
   744:           case 0b0011_110_011:
   745:           case 0b0011_111_011:
   746:             irpMoveToMPWord ();
   747:             break irpSwitch;
   748: 
   749:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   750:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   751:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   752:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   753:             //MOVE.W <ea>,-(Aq)                               |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0011_qqq_100_mmm_rrr
   754:           case 0b0011_000_100:
   755:           case 0b0011_001_100:
   756:           case 0b0011_010_100:
   757:           case 0b0011_011_100:
   758:           case 0b0011_100_100:
   759:           case 0b0011_101_100:
   760:           case 0b0011_110_100:
   761:           case 0b0011_111_100:
   762:             irpMoveToMNWord ();
   763:             break irpSwitch;
   764: 
   765:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   766:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   767:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   768:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   769:             //MOVE.W <ea>,(d16,Aq)                            |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0011_qqq_101_mmm_rrr
   770:           case 0b0011_000_101:
   771:           case 0b0011_001_101:
   772:           case 0b0011_010_101:
   773:           case 0b0011_011_101:
   774:           case 0b0011_100_101:
   775:           case 0b0011_101_101:
   776:           case 0b0011_110_101:
   777:           case 0b0011_111_101:
   778:             irpMoveToMWWord ();
   779:             break irpSwitch;
   780: 
   781:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   782:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   783:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   784:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   785:             //MOVE.W <ea>,(d8,Aq,Rn.wl)                       |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0011_qqq_110_mmm_rrr
   786:           case 0b0011_000_110:
   787:           case 0b0011_001_110:
   788:           case 0b0011_010_110:
   789:           case 0b0011_011_110:
   790:           case 0b0011_100_110:
   791:           case 0b0011_101_110:
   792:           case 0b0011_110_110:
   793:           case 0b0011_111_110:
   794:             irpMoveToMXWord ();
   795:             break irpSwitch;
   796: 
   797:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   798:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   799:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   800:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   801:             //MOVE.W <ea>,(xxx).W                             |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0011_000_111_mmm_rrr
   802:           case 0b0011_000_111:
   803:             irpMoveToZWWord ();
   804:             break irpSwitch;
   805: 
   806:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   807:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   808:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   809:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   810:             //MOVE.W <ea>,(xxx).L                             |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0011_001_111_mmm_rrr
   811:           case 0b0011_001_111:
   812:             irpMoveToZLWord ();
   813:             break irpSwitch;
   814: 
   815:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   816:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   817:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   818:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   819:             //NEGX.B <ea>                                     |-|012346|-|*UUUU|*****|D M+-WXZ  |0100_000_000_mmm_rrr
   820:           case 0b0100_000_000:
   821:             irpNegxByte ();
   822:             break irpSwitch;
   823: 
   824:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   825:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   826:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   827:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   828:             //NEGX.W <ea>                                     |-|012346|-|*UUUU|*****|D M+-WXZ  |0100_000_001_mmm_rrr
   829:           case 0b0100_000_001:
   830:             irpNegxWord ();
   831:             break irpSwitch;
   832: 
   833:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   834:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   835:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   836:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   837:             //NEGX.L <ea>                                     |-|012346|-|*UUUU|*****|D M+-WXZ  |0100_000_010_mmm_rrr
   838:           case 0b0100_000_010:
   839:             irpNegxLong ();
   840:             break irpSwitch;
   841: 
   842:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   843:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   844:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   845:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   846:             //MOVE.W SR,<ea>                                  |-|-12346|P|*****|-----|D M+-WXZ  |0100_000_011_mmm_rrr
   847:           case 0b0100_000_011:
   848:             irpMoveFromSR ();
   849:             break irpSwitch;
   850: 
   851:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   852:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   853:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   854:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   855:             //CHK.L <ea>,Dq                                   |-|--2346|-|-UUUU|-*UUU|D M+-WXZPI|0100_qqq_100_mmm_rrr
   856:           case 0b0100_000_100:
   857:           case 0b0100_001_100:
   858:           case 0b0100_010_100:
   859:           case 0b0100_011_100:
   860:           case 0b0100_100_100:
   861:           case 0b0100_101_100:
   862:           case 0b0100_110_100:
   863:           case 0b0100_111_100:
   864:             irpChkLong ();
   865:             break irpSwitch;
   866: 
   867:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   868:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   869:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   870:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   871:             //CHK.W <ea>,Dq                                   |-|012346|-|-UUUU|-*UUU|D M+-WXZPI|0100_qqq_110_mmm_rrr
   872:           case 0b0100_000_110:
   873:           case 0b0100_001_110:
   874:           case 0b0100_010_110:
   875:           case 0b0100_011_110:
   876:           case 0b0100_100_110:
   877:           case 0b0100_101_110:
   878:           case 0b0100_110_110:
   879:           case 0b0100_111_110:
   880:             irpChkWord ();
   881:             break irpSwitch;
   882: 
   883:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   884:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   885:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   886:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   887:             //LEA.L <ea>,Aq                                   |-|012346|-|-----|-----|  M  WXZP |0100_qqq_111_mmm_rrr
   888:             //EXTB.L Dr                                       |-|--2346|-|-UUUU|-**00|D         |0100_100_111_000_rrr
   889:           case 0b0100_000_111:
   890:           case 0b0100_001_111:
   891:           case 0b0100_010_111:
   892:           case 0b0100_011_111:
   893:           case 0b0100_100_111:
   894:           case 0b0100_101_111:
   895:           case 0b0100_110_111:
   896:           case 0b0100_111_111:
   897:             irpLea ();
   898:             break irpSwitch;
   899: 
   900:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   901:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   902:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   903:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   904:             //CLR.B <ea>                                      |-|012346|-|-UUUU|-0100|D M+-WXZ  |0100_001_000_mmm_rrr (68000 and 68008 read before clear)
   905:           case 0b0100_001_000:
   906:             irpClrByte ();
   907:             break irpSwitch;
   908: 
   909:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   910:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   911:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   912:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   913:             //CLR.W <ea>                                      |-|012346|-|-UUUU|-0100|D M+-WXZ  |0100_001_001_mmm_rrr (68000 and 68008 read before clear)
   914:           case 0b0100_001_001:
   915:             irpClrWord ();
   916:             break irpSwitch;
   917: 
   918:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   919:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   920:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   921:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   922:             //CLR.L <ea>                                      |-|012346|-|-UUUU|-0100|D M+-WXZ  |0100_001_010_mmm_rrr (68000 and 68008 read before clear)
   923:           case 0b0100_001_010:
   924:             irpClrLong ();
   925:             break irpSwitch;
   926: 
   927:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   928:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   929:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   930:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   931:             //MOVE.W CCR,<ea>                                 |-|-12346|-|*****|-----|D M+-WXZ  |0100_001_011_mmm_rrr
   932:           case 0b0100_001_011:
   933:             irpMoveFromCCR ();
   934:             break irpSwitch;
   935: 
   936:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   937:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   938:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   939:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   940:             //NEG.B <ea>                                      |-|012346|-|UUUUU|*****|D M+-WXZ  |0100_010_000_mmm_rrr
   941:           case 0b0100_010_000:
   942:             irpNegByte ();
   943:             break irpSwitch;
   944: 
   945:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   946:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   947:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   948:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   949:             //NEG.W <ea>                                      |-|012346|-|UUUUU|*****|D M+-WXZ  |0100_010_001_mmm_rrr
   950:           case 0b0100_010_001:
   951:             irpNegWord ();
   952:             break irpSwitch;
   953: 
   954:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   955:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   956:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   957:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   958:             //NEG.L <ea>                                      |-|012346|-|UUUUU|*****|D M+-WXZ  |0100_010_010_mmm_rrr
   959:           case 0b0100_010_010:
   960:             irpNegLong ();
   961:             break irpSwitch;
   962: 
   963:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   964:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   965:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   966:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   967:             //MOVE.W <ea>,CCR                                 |-|012346|-|UUUUU|*****|D M+-WXZPI|0100_010_011_mmm_rrr
   968:           case 0b0100_010_011:
   969:             irpMoveToCCR ();
   970:             break irpSwitch;
   971: 
   972:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   973:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   974:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   975:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   976:             //NOT.B <ea>                                      |-|012346|-|-UUUU|-**00|D M+-WXZ  |0100_011_000_mmm_rrr
   977:           case 0b0100_011_000:
   978:             irpNotByte ();
   979:             break irpSwitch;
   980: 
   981:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   982:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   983:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   984:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   985:             //NOT.W <ea>                                      |-|012346|-|-UUUU|-**00|D M+-WXZ  |0100_011_001_mmm_rrr
   986:           case 0b0100_011_001:
   987:             irpNotWord ();
   988:             break irpSwitch;
   989: 
   990:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   991:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   992:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   993:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   994:             //NOT.L <ea>                                      |-|012346|-|-UUUU|-**00|D M+-WXZ  |0100_011_010_mmm_rrr
   995:           case 0b0100_011_010:
   996:             irpNotLong ();
   997:             break irpSwitch;
   998: 
   999:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1000:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1001:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1002:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1003:             //MOVE.W <ea>,SR                                  |-|012346|P|UUUUU|*****|D M+-WXZPI|0100_011_011_mmm_rrr
  1004:           case 0b0100_011_011:
  1005:             irpMoveToSR ();
  1006:             break irpSwitch;
  1007: 
  1008:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1009:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1010:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1011:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1012:             //NBCD.B <ea>                                     |-|012346|-|UUUUU|*U*U*|D M+-WXZ  |0100_100_000_mmm_rrr
  1013:             //LINK.L Ar,#<data>                               |-|--2346|-|-----|-----|          |0100_100_000_001_rrr-{data}
  1014:           case 0b0100_100_000:
  1015:             irpNbcd ();
  1016:             break irpSwitch;
  1017: 
  1018:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1019:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1020:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1021:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1022:             //SWAP.W Dr                                       |-|012346|-|-UUUU|-**00|D         |0100_100_001_000_rrr
  1023:             //BKPT #<data>                                    |-|-12346|-|-----|-----|          |0100_100_001_001_ddd
  1024:             //PEA.L <ea>                                      |-|012346|-|-----|-----|  M  WXZP |0100_100_001_mmm_rrr
  1025:           case 0b0100_100_001:
  1026:             irpPea ();
  1027:             break irpSwitch;
  1028: 
  1029:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1030:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1031:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1032:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1033:             //EXT.W Dr                                        |-|012346|-|-UUUU|-**00|D         |0100_100_010_000_rrr
  1034:             //MOVEM.W <list>,<ea>                             |-|012346|-|-----|-----|  M -WXZ  |0100_100_010_mmm_rrr-llllllllllllllll
  1035:           case 0b0100_100_010:
  1036:             irpMovemToMemWord ();
  1037:             break irpSwitch;
  1038: 
  1039:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1040:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1041:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1042:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1043:             //EXT.L Dr                                        |-|012346|-|-UUUU|-**00|D         |0100_100_011_000_rrr
  1044:             //MOVEM.L <list>,<ea>                             |-|012346|-|-----|-----|  M -WXZ  |0100_100_011_mmm_rrr-llllllllllllllll
  1045:           case 0b0100_100_011:
  1046:             irpMovemToMemLong ();
  1047:             break irpSwitch;
  1048: 
  1049:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1050:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1051:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1052:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1053:             //TST.B <ea>                                      |-|012346|-|-UUUU|-**00|D M+-WXZ  |0100_101_000_mmm_rrr
  1054:             //TST.B <ea>                                      |-|--2346|-|-UUUU|-**00|        PI|0100_101_000_mmm_rrr
  1055:           case 0b0100_101_000:
  1056:             irpTstByte ();
  1057:             break irpSwitch;
  1058: 
  1059:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1060:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1061:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1062:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1063:             //TST.W <ea>                                      |-|012346|-|-UUUU|-**00|D M+-WXZ  |0100_101_001_mmm_rrr
  1064:             //TST.W <ea>                                      |-|--2346|-|-UUUU|-**00| A      PI|0100_101_001_mmm_rrr
  1065:           case 0b0100_101_001:
  1066:             irpTstWord ();
  1067:             break irpSwitch;
  1068: 
  1069:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1070:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1071:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1072:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1073:             //TST.L <ea>                                      |-|012346|-|-UUUU|-**00|D M+-WXZ  |0100_101_010_mmm_rrr
  1074:             //TST.L <ea>                                      |-|--2346|-|-UUUU|-**00| A      PI|0100_101_010_mmm_rrr
  1075:           case 0b0100_101_010:
  1076:             irpTstLong ();
  1077:             break irpSwitch;
  1078: 
  1079:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1080:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1081:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1082:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1083:             //TAS.B <ea>                                      |-|012346|-|-UUUU|-**00|D M+-WXZ  |0100_101_011_mmm_rrr
  1084:             //ILLEGAL                                         |-|012346|-|-----|-----|          |0100_101_011_111_100
  1085:           case 0b0100_101_011:
  1086:             irpTas ();
  1087:             break irpSwitch;
  1088: 
  1089:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1090:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1091:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1092:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1093:             //MULU.L <ea>,Dl                                  |-|--2346|-|-UUUU|-***0|D M+-WXZPI|0100_110_000_mmm_rrr-0lll000000000hhh        (h is not used)
  1094:             //MULU.L <ea>,Dh:Dl                               |-|--234S|-|-UUUU|-***0|D M+-WXZPI|0100_110_000_mmm_rrr-0lll010000000hhh        (if h=l then result is not defined)
  1095:             //MULS.L <ea>,Dl                                  |-|--2346|-|-UUUU|-***0|D M+-WXZPI|0100_110_000_mmm_rrr-0lll100000000hhh        (h is not used)
  1096:             //MULS.L <ea>,Dh:Dl                               |-|--234S|-|-UUUU|-***0|D M+-WXZPI|0100_110_000_mmm_rrr-0lll110000000hhh        (if h=l then result is not defined)
  1097:           case 0b0100_110_000:
  1098:             irpMuluMulsLong ();
  1099:             break irpSwitch;
  1100: 
  1101:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1102:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1103:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1104:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1105:             //DIVU.L <ea>,Dq                                  |-|--2346|-|-UUUU|-***0|D M+-WXZPI|0100_110_001_mmm_rrr-0qqq000000000qqq
  1106:             //DIVUL.L <ea>,Dr:Dq                              |-|--2346|-|-UUUU|-***0|D M+-WXZPI|0100_110_001_mmm_rrr-0qqq000000000rrr        (q is not equal to r)
  1107:             //DIVU.L <ea>,Dr:Dq                               |-|--234S|-|-UUUU|-***0|D M+-WXZPI|0100_110_001_mmm_rrr-0qqq010000000rrr        (q is not equal to r)
  1108:             //DIVS.L <ea>,Dq                                  |-|--2346|-|-UUUU|-***0|D M+-WXZPI|0100_110_001_mmm_rrr-0qqq100000000qqq
  1109:             //DIVSL.L <ea>,Dr:Dq                              |-|--2346|-|-UUUU|-***0|D M+-WXZPI|0100_110_001_mmm_rrr-0qqq100000000rrr        (q is not equal to r)
  1110:             //DIVS.L <ea>,Dr:Dq                               |-|--234S|-|-UUUU|-***0|D M+-WXZPI|0100_110_001_mmm_rrr-0qqq110000000rrr        (q is not equal to r)
  1111:           case 0b0100_110_001:
  1112:             irpDivuDivsLong ();
  1113:             break irpSwitch;
  1114: 
  1115:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1116:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1117:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1118:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1119:             //SATS.L Dr                                       |-|------|-|-UUUU|-**00|D         |0100_110_010_000_rrr (ISA_B)
  1120:             //MOVEM.W <ea>,<list>                             |-|012346|-|-----|-----|  M+ WXZP |0100_110_010_mmm_rrr-llllllllllllllll
  1121:           case 0b0100_110_010:
  1122:             irpMovemToRegWord ();
  1123:             break irpSwitch;
  1124: 
  1125:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1126:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1127:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1128:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1129:             //MOVEM.L <ea>,<list>                             |-|012346|-|-----|-----|  M+ WXZP |0100_110_011_mmm_rrr-llllllllllllllll
  1130:           case 0b0100_110_011:
  1131:             irpMovemToRegLong ();
  1132:             break irpSwitch;
  1133: 
  1134:           case 0b0100_111_001:
  1135:             switch (XEiJ.regOC & 0b111_111) {
  1136: 
  1137:               //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1138:               //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1139:               //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1140:               //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1141:               //TRAP #<vector>                                  |-|012346|-|-----|-----|          |0100_111_001_00v_vvv
  1142:             case 0b000_000:
  1143:             case 0b000_001:
  1144:             case 0b000_010:
  1145:             case 0b000_011:
  1146:             case 0b000_100:
  1147:             case 0b000_101:
  1148:             case 0b000_110:
  1149:             case 0b000_111:
  1150:             case 0b001_000:
  1151:             case 0b001_001:
  1152:             case 0b001_010:
  1153:             case 0b001_011:
  1154:             case 0b001_100:
  1155:             case 0b001_101:
  1156:             case 0b001_110:
  1157:               irpTrap ();
  1158:               break irpSwitch;
  1159:             case 0b001_111:
  1160:               irpTrap15 ();
  1161:               break irpSwitch;
  1162: 
  1163:               //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1164:               //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1165:               //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1166:               //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1167:               //LINK.W Ar,#<data>                               |-|012346|-|-----|-----|          |0100_111_001_010_rrr-{data}
  1168:             case 0b010_000:
  1169:             case 0b010_001:
  1170:             case 0b010_010:
  1171:             case 0b010_011:
  1172:             case 0b010_100:
  1173:             case 0b010_101:
  1174:             case 0b010_110:
  1175:             case 0b010_111:
  1176:               irpLinkWord ();
  1177:               break irpSwitch;
  1178: 
  1179:               //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1180:               //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1181:               //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1182:               //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1183:               //UNLK Ar                                         |-|012346|-|-----|-----|          |0100_111_001_011_rrr
  1184:             case 0b011_000:
  1185:             case 0b011_001:
  1186:             case 0b011_010:
  1187:             case 0b011_011:
  1188:             case 0b011_100:
  1189:             case 0b011_101:
  1190:             case 0b011_110:
  1191:             case 0b011_111:
  1192:               irpUnlk ();
  1193:               break irpSwitch;
  1194: 
  1195:               //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1196:               //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1197:               //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1198:               //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1199:               //MOVE.L Ar,USP                                   |-|012346|P|-----|-----|          |0100_111_001_100_rrr
  1200:             case 0b100_000:
  1201:             case 0b100_001:
  1202:             case 0b100_010:
  1203:             case 0b100_011:
  1204:             case 0b100_100:
  1205:             case 0b100_101:
  1206:             case 0b100_110:
  1207:             case 0b100_111:
  1208:               irpMoveToUsp ();
  1209:               break irpSwitch;
  1210: 
  1211:               //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1212:               //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1213:               //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1214:               //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1215:               //MOVE.L USP,Ar                                   |-|012346|P|-----|-----|          |0100_111_001_101_rrr
  1216:             case 0b101_000:
  1217:             case 0b101_001:
  1218:             case 0b101_010:
  1219:             case 0b101_011:
  1220:             case 0b101_100:
  1221:             case 0b101_101:
  1222:             case 0b101_110:
  1223:             case 0b101_111:
  1224:               irpMoveFromUsp ();
  1225:               break irpSwitch;
  1226: 
  1227:               //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1228:               //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1229:               //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1230:               //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1231:               //RESET                                           |-|012346|P|-----|-----|          |0100_111_001_110_000
  1232:             case 0b110_000:
  1233:               irpReset ();
  1234:               break irpSwitch;
  1235: 
  1236:               //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1237:               //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1238:               //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1239:               //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1240:               //NOP                                             |-|012346|-|-----|-----|          |0100_111_001_110_001
  1241:             case 0b110_001:
  1242:               irpNop ();
  1243:               break irpSwitch;
  1244: 
  1245:               //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1246:               //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1247:               //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1248:               //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1249:               //STOP #<data>                                    |-|012346|P|UUUUU|*****|          |0100_111_001_110_010-{data}
  1250:             case 0b110_010:
  1251:               irpStop ();
  1252:               break irpSwitch;
  1253: 
  1254:               //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1255:               //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1256:               //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1257:               //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1258:               //RTE                                             |-|012346|P|UUUUU|*****|          |0100_111_001_110_011
  1259:             case 0b110_011:
  1260:               irpRte ();
  1261:               break irpSwitch;
  1262: 
  1263:               //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1264:               //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1265:               //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1266:               //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1267:               //RTD #<data>                                     |-|-12346|-|-----|-----|          |0100_111_001_110_100-{data}
  1268:             case 0b110_100:
  1269:               irpRtd ();
  1270:               break irpSwitch;
  1271: 
  1272:               //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1273:               //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1274:               //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1275:               //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1276:               //RTS                                             |-|012346|-|-----|-----|          |0100_111_001_110_101
  1277:             case 0b110_101:
  1278:               irpRts ();
  1279:               break irpSwitch;
  1280: 
  1281:               //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1282:               //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1283:               //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1284:               //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1285:               //TRAPV                                           |-|012346|-|---*-|-----|          |0100_111_001_110_110
  1286:             case 0b110_110:
  1287:               irpTrapv ();
  1288:               break irpSwitch;
  1289: 
  1290:               //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1291:               //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1292:               //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1293:               //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1294:               //RTR                                             |-|012346|-|UUUUU|*****|          |0100_111_001_110_111
  1295:             case 0b110_111:
  1296:               irpRtr ();
  1297:               break irpSwitch;
  1298: 
  1299:               //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1300:               //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1301:               //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1302:               //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1303:               //MOVEC.L Rc,Rn                                   |-|-12346|P|-----|-----|          |0100_111_001_111_010-rnnncccccccccccc
  1304:             case 0b111_010:
  1305:               irpMovecFromControl ();
  1306:               break irpSwitch;
  1307: 
  1308:               //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1309:               //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1310:               //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1311:               //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1312:               //MOVEC.L Rn,Rc                                   |-|-12346|P|-----|-----|          |0100_111_001_111_011-rnnncccccccccccc
  1313:             case 0b111_011:
  1314:               irpMovecToControl ();
  1315:               break irpSwitch;
  1316: 
  1317:             default:
  1318:               irpIllegal ();
  1319: 
  1320:             }  //switch XEiJ.regOC & 0b111_111
  1321:             break irpSwitch;
  1322: 
  1323:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1324:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1325:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1326:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1327:             //JSR <ea>                                        |-|012346|-|-----|-----|  M  WXZP |0100_111_010_mmm_rrr
  1328:             //JBSR.L <label>                                  |A|012346|-|-----|-----|          |0100_111_010_111_001-{address}       [JSR <label>]
  1329:           case 0b0100_111_010:
  1330:             irpJsr ();
  1331:             break irpSwitch;
  1332: 
  1333:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1334:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1335:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1336:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1337:             //JMP <ea>                                        |-|012346|-|-----|-----|  M  WXZP |0100_111_011_mmm_rrr
  1338:             //JBRA.L <label>                                  |A|012346|-|-----|-----|          |0100_111_011_111_001-{address}       [JMP <label>]
  1339:           case 0b0100_111_011:
  1340:             irpJmp ();
  1341:             break irpSwitch;
  1342: 
  1343:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1344:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1345:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1346:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1347:             //ADDQ.B #<data>,<ea>                             |-|012346|-|UUUUU|*****|D M+-WXZ  |0101_qqq_000_mmm_rrr
  1348:             //INC.B <ea>                                      |A|012346|-|UUUUU|*****|D M+-WXZ  |0101_001_000_mmm_rrr [ADDQ.B #1,<ea>]
  1349:           case 0b0101_000_000:
  1350:           case 0b0101_001_000:
  1351:           case 0b0101_010_000:
  1352:           case 0b0101_011_000:
  1353:           case 0b0101_100_000:
  1354:           case 0b0101_101_000:
  1355:           case 0b0101_110_000:
  1356:           case 0b0101_111_000:
  1357:             irpAddqByte ();
  1358:             break irpSwitch;
  1359: 
  1360:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1361:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1362:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1363:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1364:             //ADDQ.W #<data>,<ea>                             |-|012346|-|UUUUU|*****|D M+-WXZ  |0101_qqq_001_mmm_rrr
  1365:             //ADDQ.W #<data>,Ar                               |-|012346|-|-----|-----| A        |0101_qqq_001_001_rrr
  1366:             //INC.W <ea>                                      |A|012346|-|UUUUU|*****|D M+-WXZ  |0101_001_001_mmm_rrr [ADDQ.W #1,<ea>]
  1367:             //INC.W Ar                                        |A|012346|-|-----|-----| A        |0101_001_001_001_rrr [ADDQ.W #1,Ar]
  1368:           case 0b0101_000_001:
  1369:           case 0b0101_001_001:
  1370:           case 0b0101_010_001:
  1371:           case 0b0101_011_001:
  1372:           case 0b0101_100_001:
  1373:           case 0b0101_101_001:
  1374:           case 0b0101_110_001:
  1375:           case 0b0101_111_001:
  1376:             irpAddqWord ();
  1377:             break irpSwitch;
  1378: 
  1379:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1380:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1381:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1382:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1383:             //ADDQ.L #<data>,<ea>                             |-|012346|-|UUUUU|*****|D M+-WXZ  |0101_qqq_010_mmm_rrr
  1384:             //ADDQ.L #<data>,Ar                               |-|012346|-|-----|-----| A        |0101_qqq_010_001_rrr
  1385:             //INC.L <ea>                                      |A|012346|-|UUUUU|*****|D M+-WXZ  |0101_001_010_mmm_rrr [ADDQ.L #1,<ea>]
  1386:             //INC.L Ar                                        |A|012346|-|-----|-----| A        |0101_001_010_001_rrr [ADDQ.L #1,Ar]
  1387:           case 0b0101_000_010:
  1388:           case 0b0101_001_010:
  1389:           case 0b0101_010_010:
  1390:           case 0b0101_011_010:
  1391:           case 0b0101_100_010:
  1392:           case 0b0101_101_010:
  1393:           case 0b0101_110_010:
  1394:           case 0b0101_111_010:
  1395:             irpAddqLong ();
  1396:             break irpSwitch;
  1397: 
  1398:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1399:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1400:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1401:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1402:             //ST.B <ea>                                       |-|012346|-|-----|-----|D M+-WXZ  |0101_000_011_mmm_rrr
  1403:             //SNF.B <ea>                                      |A|012346|-|-----|-----|D M+-WXZ  |0101_000_011_mmm_rrr [ST.B <ea>]
  1404:             //DBT.W Dr,<label>                                |-|012346|-|-----|-----|          |0101_000_011_001_rrr-{offset}
  1405:             //DBNF.W Dr,<label>                               |A|012346|-|-----|-----|          |0101_000_011_001_rrr-{offset}        [DBT.W Dr,<label>]
  1406:             //TRAPT.W #<data>                                 |-|--2346|-|-----|-----|          |0101_000_011_111_010-{data}
  1407:             //TPNF.W #<data>                                  |A|--2346|-|-----|-----|          |0101_000_011_111_010-{data}  [TRAPT.W #<data>]
  1408:             //TPT.W #<data>                                   |A|--2346|-|-----|-----|          |0101_000_011_111_010-{data}  [TRAPT.W #<data>]
  1409:             //TRAPNF.W #<data>                                |A|--2346|-|-----|-----|          |0101_000_011_111_010-{data}  [TRAPT.W #<data>]
  1410:             //TRAPT.L #<data>                                 |-|--2346|-|-----|-----|          |0101_000_011_111_011-{data}
  1411:             //TPNF.L #<data>                                  |A|--2346|-|-----|-----|          |0101_000_011_111_011-{data}  [TRAPT.L #<data>]
  1412:             //TPT.L #<data>                                   |A|--2346|-|-----|-----|          |0101_000_011_111_011-{data}  [TRAPT.L #<data>]
  1413:             //TRAPNF.L #<data>                                |A|--2346|-|-----|-----|          |0101_000_011_111_011-{data}  [TRAPT.L #<data>]
  1414:             //TRAPT                                           |-|--2346|-|-----|-----|          |0101_000_011_111_100
  1415:             //TPNF                                            |A|--2346|-|-----|-----|          |0101_000_011_111_100 [TRAPT]
  1416:             //TPT                                             |A|--2346|-|-----|-----|          |0101_000_011_111_100 [TRAPT]
  1417:             //TRAPNF                                          |A|--2346|-|-----|-----|          |0101_000_011_111_100 [TRAPT]
  1418:           case 0b0101_000_011:
  1419:             irpSt ();
  1420:             break irpSwitch;
  1421: 
  1422:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1423:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1424:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1425:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1426:             //SUBQ.B #<data>,<ea>                             |-|012346|-|UUUUU|*****|D M+-WXZ  |0101_qqq_100_mmm_rrr
  1427:             //DEC.B <ea>                                      |A|012346|-|UUUUU|*****|D M+-WXZ  |0101_001_100_mmm_rrr [SUBQ.B #1,<ea>]
  1428:           case 0b0101_000_100:
  1429:           case 0b0101_001_100:
  1430:           case 0b0101_010_100:
  1431:           case 0b0101_011_100:
  1432:           case 0b0101_100_100:
  1433:           case 0b0101_101_100:
  1434:           case 0b0101_110_100:
  1435:           case 0b0101_111_100:
  1436:             irpSubqByte ();
  1437:             break irpSwitch;
  1438: 
  1439:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1440:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1441:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1442:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1443:             //SUBQ.W #<data>,<ea>                             |-|012346|-|UUUUU|*****|D M+-WXZ  |0101_qqq_101_mmm_rrr
  1444:             //SUBQ.W #<data>,Ar                               |-|012346|-|-----|-----| A        |0101_qqq_101_001_rrr
  1445:             //DEC.W <ea>                                      |A|012346|-|UUUUU|*****|D M+-WXZ  |0101_001_101_mmm_rrr [SUBQ.W #1,<ea>]
  1446:             //DEC.W Ar                                        |A|012346|-|-----|-----| A        |0101_001_101_001_rrr [SUBQ.W #1,Ar]
  1447:           case 0b0101_000_101:
  1448:           case 0b0101_001_101:
  1449:           case 0b0101_010_101:
  1450:           case 0b0101_011_101:
  1451:           case 0b0101_100_101:
  1452:           case 0b0101_101_101:
  1453:           case 0b0101_110_101:
  1454:           case 0b0101_111_101:
  1455:             irpSubqWord ();
  1456:             break irpSwitch;
  1457: 
  1458:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1459:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1460:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1461:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1462:             //SUBQ.L #<data>,<ea>                             |-|012346|-|UUUUU|*****|D M+-WXZ  |0101_qqq_110_mmm_rrr
  1463:             //SUBQ.L #<data>,Ar                               |-|012346|-|-----|-----| A        |0101_qqq_110_001_rrr
  1464:             //DEC.L <ea>                                      |A|012346|-|UUUUU|*****|D M+-WXZ  |0101_001_110_mmm_rrr [SUBQ.L #1,<ea>]
  1465:             //DEC.L Ar                                        |A|012346|-|-----|-----| A        |0101_001_110_001_rrr [SUBQ.L #1,Ar]
  1466:           case 0b0101_000_110:
  1467:           case 0b0101_001_110:
  1468:           case 0b0101_010_110:
  1469:           case 0b0101_011_110:
  1470:           case 0b0101_100_110:
  1471:           case 0b0101_101_110:
  1472:           case 0b0101_110_110:
  1473:           case 0b0101_111_110:
  1474:             irpSubqLong ();
  1475:             break irpSwitch;
  1476: 
  1477:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1478:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1479:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1480:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1481:             //SF.B <ea>                                       |-|012346|-|-----|-----|D M+-WXZ  |0101_000_111_mmm_rrr
  1482:             //SNT.B <ea>                                      |A|012346|-|-----|-----|D M+-WXZ  |0101_000_111_mmm_rrr [SF.B <ea>]
  1483:             //DBF.W Dr,<label>                                |-|012346|-|-----|-----|          |0101_000_111_001_rrr-{offset}
  1484:             //DBNT.W Dr,<label>                               |A|012346|-|-----|-----|          |0101_000_111_001_rrr-{offset}        [DBF.W Dr,<label>]
  1485:             //DBRA.W Dr,<label>                               |A|012346|-|-----|-----|          |0101_000_111_001_rrr-{offset}        [DBF.W Dr,<label>]
  1486:             //TRAPF.W #<data>                                 |-|--2346|-|-----|-----|          |0101_000_111_111_010-{data}
  1487:             //TPF.W #<data>                                   |A|--2346|-|-----|-----|          |0101_000_111_111_010-{data}  [TRAPF.W #<data>]
  1488:             //TPNT.W #<data>                                  |A|--2346|-|-----|-----|          |0101_000_111_111_010-{data}  [TRAPF.W #<data>]
  1489:             //TRAPNT.W #<data>                                |A|--2346|-|-----|-----|          |0101_000_111_111_010-{data}  [TRAPF.W #<data>]
  1490:             //TRAPF.L #<data>                                 |-|--2346|-|-----|-----|          |0101_000_111_111_011-{data}
  1491:             //TPF.L #<data>                                   |A|--2346|-|-----|-----|          |0101_000_111_111_011-{data}  [TRAPF.L #<data>]
  1492:             //TPNT.L #<data>                                  |A|--2346|-|-----|-----|          |0101_000_111_111_011-{data}  [TRAPF.L #<data>]
  1493:             //TRAPNT.L #<data>                                |A|--2346|-|-----|-----|          |0101_000_111_111_011-{data}  [TRAPF.L #<data>]
  1494:             //TRAPF                                           |-|--2346|-|-----|-----|          |0101_000_111_111_100
  1495:             //TPF                                             |A|--2346|-|-----|-----|          |0101_000_111_111_100 [TRAPF]
  1496:             //TPNT                                            |A|--2346|-|-----|-----|          |0101_000_111_111_100 [TRAPF]
  1497:             //TRAPNT                                          |A|--2346|-|-----|-----|          |0101_000_111_111_100 [TRAPF]
  1498:           case 0b0101_000_111:
  1499:             irpSf ();
  1500:             break irpSwitch;
  1501: 
  1502:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1503:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1504:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1505:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1506:             //SHI.B <ea>                                      |-|012346|-|--*-*|-----|D M+-WXZ  |0101_001_011_mmm_rrr
  1507:             //SNLS.B <ea>                                     |A|012346|-|--*-*|-----|D M+-WXZ  |0101_001_011_mmm_rrr [SHI.B <ea>]
  1508:             //DBHI.W Dr,<label>                               |-|012346|-|--*-*|-----|          |0101_001_011_001_rrr-{offset}
  1509:             //DBNLS.W Dr,<label>                              |A|012346|-|--*-*|-----|          |0101_001_011_001_rrr-{offset}        [DBHI.W Dr,<label>]
  1510:             //TRAPHI.W #<data>                                |-|--2346|-|--*-*|-----|          |0101_001_011_111_010-{data}
  1511:             //TPHI.W #<data>                                  |A|--2346|-|--*-*|-----|          |0101_001_011_111_010-{data}  [TRAPHI.W #<data>]
  1512:             //TPNLS.W #<data>                                 |A|--2346|-|--*-*|-----|          |0101_001_011_111_010-{data}  [TRAPHI.W #<data>]
  1513:             //TRAPNLS.W #<data>                               |A|--2346|-|--*-*|-----|          |0101_001_011_111_010-{data}  [TRAPHI.W #<data>]
  1514:             //TRAPHI.L #<data>                                |-|--2346|-|--*-*|-----|          |0101_001_011_111_011-{data}
  1515:             //TPHI.L #<data>                                  |A|--2346|-|--*-*|-----|          |0101_001_011_111_011-{data}  [TRAPHI.L #<data>]
  1516:             //TPNLS.L #<data>                                 |A|--2346|-|--*-*|-----|          |0101_001_011_111_011-{data}  [TRAPHI.L #<data>]
  1517:             //TRAPNLS.L #<data>                               |A|--2346|-|--*-*|-----|          |0101_001_011_111_011-{data}  [TRAPHI.L #<data>]
  1518:             //TRAPHI                                          |-|--2346|-|--*-*|-----|          |0101_001_011_111_100
  1519:             //TPHI                                            |A|--2346|-|--*-*|-----|          |0101_001_011_111_100 [TRAPHI]
  1520:             //TPNLS                                           |A|--2346|-|--*-*|-----|          |0101_001_011_111_100 [TRAPHI]
  1521:             //TRAPNLS                                         |A|--2346|-|--*-*|-----|          |0101_001_011_111_100 [TRAPHI]
  1522:           case 0b0101_001_011:
  1523:             irpShi ();
  1524:             break irpSwitch;
  1525: 
  1526:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1527:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1528:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1529:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1530:             //SLS.B <ea>                                      |-|012346|-|--*-*|-----|D M+-WXZ  |0101_001_111_mmm_rrr
  1531:             //SNHI.B <ea>                                     |A|012346|-|--*-*|-----|D M+-WXZ  |0101_001_111_mmm_rrr [SLS.B <ea>]
  1532:             //DBLS.W Dr,<label>                               |-|012346|-|--*-*|-----|          |0101_001_111_001_rrr-{offset}
  1533:             //DBNHI.W Dr,<label>                              |A|012346|-|--*-*|-----|          |0101_001_111_001_rrr-{offset}        [DBLS.W Dr,<label>]
  1534:             //TRAPLS.W #<data>                                |-|--2346|-|--*-*|-----|          |0101_001_111_111_010-{data}
  1535:             //TPLS.W #<data>                                  |A|--2346|-|--*-*|-----|          |0101_001_111_111_010-{data}
  1536:             //TPNHI.W #<data>                                 |A|--2346|-|--*-*|-----|          |0101_001_111_111_010-{data}  [TRAPLS.W #<data>]
  1537:             //TRAPNHI.W #<data>                               |A|--2346|-|--*-*|-----|          |0101_001_111_111_010-{data}  [TRAPLS.W #<data>]
  1538:             //TRAPLS.L #<data>                                |-|--2346|-|--*-*|-----|          |0101_001_111_111_011-{data}
  1539:             //TPLS.L #<data>                                  |A|--2346|-|--*-*|-----|          |0101_001_111_111_011-{data}
  1540:             //TPNHI.L #<data>                                 |A|--2346|-|--*-*|-----|          |0101_001_111_111_011-{data}  [TRAPLS.L #<data>]
  1541:             //TRAPNHI.L #<data>                               |A|--2346|-|--*-*|-----|          |0101_001_111_111_011-{data}  [TRAPLS.L #<data>]
  1542:             //TRAPLS                                          |-|--2346|-|--*-*|-----|          |0101_001_111_111_100
  1543:             //TPLS                                            |A|--2346|-|--*-*|-----|          |0101_001_111_111_100 [TRAPLS]
  1544:             //TPNHI                                           |A|--2346|-|--*-*|-----|          |0101_001_111_111_100 [TRAPLS]
  1545:             //TRAPNHI                                         |A|--2346|-|--*-*|-----|          |0101_001_111_111_100 [TRAPLS]
  1546:           case 0b0101_001_111:
  1547:             irpSls ();
  1548:             break irpSwitch;
  1549: 
  1550:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1551:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1552:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1553:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1554:             //SCC.B <ea>                                      |-|012346|-|----*|-----|D M+-WXZ  |0101_010_011_mmm_rrr
  1555:             //SHS.B <ea>                                      |A|012346|-|----*|-----|D M+-WXZ  |0101_010_011_mmm_rrr [SCC.B <ea>]
  1556:             //SNCS.B <ea>                                     |A|012346|-|----*|-----|D M+-WXZ  |0101_010_011_mmm_rrr [SCC.B <ea>]
  1557:             //SNLO.B <ea>                                     |A|012346|-|----*|-----|D M+-WXZ  |0101_010_011_mmm_rrr [SCC.B <ea>]
  1558:             //DBCC.W Dr,<label>                               |-|012346|-|----*|-----|          |0101_010_011_001_rrr-{offset}
  1559:             //DBHS.W Dr,<label>                               |A|012346|-|----*|-----|          |0101_010_011_001_rrr-{offset}        [DBCC.W Dr,<label>]
  1560:             //DBNCS.W Dr,<label>                              |A|012346|-|----*|-----|          |0101_010_011_001_rrr-{offset}        [DBCC.W Dr,<label>]
  1561:             //DBNLO.W Dr,<label>                              |A|012346|-|----*|-----|          |0101_010_011_001_rrr-{offset}        [DBCC.W Dr,<label>]
  1562:             //TRAPCC.W #<data>                                |-|--2346|-|----*|-----|          |0101_010_011_111_010-{data}
  1563:             //TPCC.W #<data>                                  |A|--2346|-|----*|-----|          |0101_010_011_111_010-{data}  [TRAPCC.W #<data>]
  1564:             //TPHS.W #<data>                                  |A|--2346|-|----*|-----|          |0101_010_011_111_010-{data}  [TRAPCC.W #<data>]
  1565:             //TPNCS.W #<data>                                 |A|--2346|-|----*|-----|          |0101_010_011_111_010-{data}  [TRAPCC.W #<data>]
  1566:             //TPNLO.W #<data>                                 |A|--2346|-|----*|-----|          |0101_010_011_111_010-{data}  [TRAPCC.W #<data>]
  1567:             //TRAPHS.W #<data>                                |A|--2346|-|----*|-----|          |0101_010_011_111_010-{data}  [TRAPCC.W #<data>]
  1568:             //TRAPNCS.W #<data>                               |A|--2346|-|----*|-----|          |0101_010_011_111_010-{data}  [TRAPCC.W #<data>]
  1569:             //TRAPNLO.W #<data>                               |A|--2346|-|----*|-----|          |0101_010_011_111_010-{data}  [TRAPCC.W #<data>]
  1570:             //TRAPCC.L #<data>                                |-|--2346|-|----*|-----|          |0101_010_011_111_011-{data}
  1571:             //TPCC.L #<data>                                  |A|--2346|-|----*|-----|          |0101_010_011_111_011-{data}  [TRAPCC.L #<data>]
  1572:             //TPHS.L #<data>                                  |A|--2346|-|----*|-----|          |0101_010_011_111_011-{data}  [TRAPCC.L #<data>]
  1573:             //TPNCS.L #<data>                                 |A|--2346|-|----*|-----|          |0101_010_011_111_011-{data}  [TRAPCC.L #<data>]
  1574:             //TPNLO.L #<data>                                 |A|--2346|-|----*|-----|          |0101_010_011_111_011-{data}  [TRAPCC.L #<data>]
  1575:             //TRAPHS.L #<data>                                |A|--2346|-|----*|-----|          |0101_010_011_111_011-{data}  [TRAPCC.L #<data>]
  1576:             //TRAPNCS.L #<data>                               |A|--2346|-|----*|-----|          |0101_010_011_111_011-{data}  [TRAPCC.L #<data>]
  1577:             //TRAPNLO.L #<data>                               |A|--2346|-|----*|-----|          |0101_010_011_111_011-{data}  [TRAPCC.L #<data>]
  1578:             //TRAPCC                                          |-|--2346|-|----*|-----|          |0101_010_011_111_100
  1579:             //TPCC                                            |A|--2346|-|----*|-----|          |0101_010_011_111_100 [TRAPCC]
  1580:             //TPHS                                            |A|--2346|-|----*|-----|          |0101_010_011_111_100 [TRAPCC]
  1581:             //TPNCS                                           |A|--2346|-|----*|-----|          |0101_010_011_111_100 [TRAPCC]
  1582:             //TPNLO                                           |A|--2346|-|----*|-----|          |0101_010_011_111_100 [TRAPCC]
  1583:             //TRAPHS                                          |A|--2346|-|----*|-----|          |0101_010_011_111_100 [TRAPCC]
  1584:             //TRAPNCS                                         |A|--2346|-|----*|-----|          |0101_010_011_111_100 [TRAPCC]
  1585:             //TRAPNLO                                         |A|--2346|-|----*|-----|          |0101_010_011_111_100 [TRAPCC]
  1586:           case 0b0101_010_011:
  1587:             irpShs ();
  1588:             break irpSwitch;
  1589: 
  1590:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1591:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1592:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1593:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1594:             //SCS.B <ea>                                      |-|012346|-|----*|-----|D M+-WXZ  |0101_010_111_mmm_rrr
  1595:             //SLO.B <ea>                                      |A|012346|-|----*|-----|D M+-WXZ  |0101_010_111_mmm_rrr [SCS.B <ea>]
  1596:             //SNCC.B <ea>                                     |A|012346|-|----*|-----|D M+-WXZ  |0101_010_111_mmm_rrr [SCS.B <ea>]
  1597:             //SNHS.B <ea>                                     |A|012346|-|----*|-----|D M+-WXZ  |0101_010_111_mmm_rrr [SCS.B <ea>]
  1598:             //DBCS.W Dr,<label>                               |-|012346|-|----*|-----|          |0101_010_111_001_rrr-{offset}
  1599:             //DBLO.W Dr,<label>                               |A|012346|-|----*|-----|          |0101_010_111_001_rrr-{offset}        [DBCS.W Dr,<label>]
  1600:             //DBNCC.W Dr,<label>                              |A|012346|-|----*|-----|          |0101_010_111_001_rrr-{offset}        [DBCS.W Dr,<label>]
  1601:             //DBNHS.W Dr,<label>                              |A|012346|-|----*|-----|          |0101_010_111_001_rrr-{offset}        [DBCS.W Dr,<label>]
  1602:             //TRAPCS.W #<data>                                |-|--2346|-|----*|-----|          |0101_010_111_111_010-{data}
  1603:             //TPCS.W #<data>                                  |A|--2346|-|----*|-----|          |0101_010_111_111_010-{data}  [TRAPCS.W #<data>]
  1604:             //TPLO.W #<data>                                  |A|--2346|-|----*|-----|          |0101_010_111_111_010-{data}  [TRAPCS.W #<data>]
  1605:             //TPNCC.W #<data>                                 |A|--2346|-|----*|-----|          |0101_010_111_111_010-{data}  [TRAPCS.W #<data>]
  1606:             //TPNHS.W #<data>                                 |A|--2346|-|----*|-----|          |0101_010_111_111_010-{data}  [TRAPCS.W #<data>]
  1607:             //TRAPLO.W #<data>                                |A|--2346|-|----*|-----|          |0101_010_111_111_010-{data}  [TRAPCS.W #<data>]
  1608:             //TRAPNCC.W #<data>                               |A|--2346|-|----*|-----|          |0101_010_111_111_010-{data}  [TRAPCS.W #<data>]
  1609:             //TRAPNHS.W #<data>                               |A|--2346|-|----*|-----|          |0101_010_111_111_010-{data}  [TRAPCS.W #<data>]
  1610:             //TRAPCS.L #<data>                                |-|--2346|-|----*|-----|          |0101_010_111_111_011-{data}
  1611:             //TPCS.L #<data>                                  |A|--2346|-|----*|-----|          |0101_010_111_111_011-{data}  [TRAPCS.L #<data>]
  1612:             //TPLO.L #<data>                                  |A|--2346|-|----*|-----|          |0101_010_111_111_011-{data}  [TRAPCS.L #<data>]
  1613:             //TPNCC.L #<data>                                 |A|--2346|-|----*|-----|          |0101_010_111_111_011-{data}  [TRAPCS.L #<data>]
  1614:             //TPNHS.L #<data>                                 |A|--2346|-|----*|-----|          |0101_010_111_111_011-{data}  [TRAPCS.L #<data>]
  1615:             //TRAPLO.L #<data>                                |A|--2346|-|----*|-----|          |0101_010_111_111_011-{data}  [TRAPCS.L #<data>]
  1616:             //TRAPNCC.L #<data>                               |A|--2346|-|----*|-----|          |0101_010_111_111_011-{data}  [TRAPCS.L #<data>]
  1617:             //TRAPNHS.L #<data>                               |A|--2346|-|----*|-----|          |0101_010_111_111_011-{data}  [TRAPCS.L #<data>]
  1618:             //TRAPCS                                          |-|--2346|-|----*|-----|          |0101_010_111_111_100
  1619:             //TPCS                                            |A|--2346|-|----*|-----|          |0101_010_111_111_100 [TRAPCS]
  1620:             //TPLO                                            |A|--2346|-|----*|-----|          |0101_010_111_111_100 [TRAPCS]
  1621:             //TPNCC                                           |A|--2346|-|----*|-----|          |0101_010_111_111_100 [TRAPCS]
  1622:             //TPNHS                                           |A|--2346|-|----*|-----|          |0101_010_111_111_100 [TRAPCS]
  1623:             //TRAPLO                                          |A|--2346|-|----*|-----|          |0101_010_111_111_100 [TRAPCS]
  1624:             //TRAPNCC                                         |A|--2346|-|----*|-----|          |0101_010_111_111_100 [TRAPCS]
  1625:             //TRAPNHS                                         |A|--2346|-|----*|-----|          |0101_010_111_111_100 [TRAPCS]
  1626:           case 0b0101_010_111:
  1627:             irpSlo ();
  1628:             break irpSwitch;
  1629: 
  1630:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1631:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1632:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1633:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1634:             //SNE.B <ea>                                      |-|012346|-|--*--|-----|D M+-WXZ  |0101_011_011_mmm_rrr
  1635:             //SNEQ.B <ea>                                     |A|012346|-|--*--|-----|D M+-WXZ  |0101_011_011_mmm_rrr [SNE.B <ea>]
  1636:             //SNZ.B <ea>                                      |A|012346|-|--*--|-----|D M+-WXZ  |0101_011_011_mmm_rrr [SNE.B <ea>]
  1637:             //SNZE.B <ea>                                     |A|012346|-|--*--|-----|D M+-WXZ  |0101_011_011_mmm_rrr [SNE.B <ea>]
  1638:             //DBNE.W Dr,<label>                               |-|012346|-|--*--|-----|          |0101_011_011_001_rrr-{offset}
  1639:             //DBNEQ.W Dr,<label>                              |A|012346|-|--*--|-----|          |0101_011_011_001_rrr-{offset}        [DBNE.W Dr,<label>]
  1640:             //DBNZ.W Dr,<label>                               |A|012346|-|--*--|-----|          |0101_011_011_001_rrr-{offset}        [DBNE.W Dr,<label>]
  1641:             //DBNZE.W Dr,<label>                              |A|012346|-|--*--|-----|          |0101_011_011_001_rrr-{offset}        [DBNE.W Dr,<label>]
  1642:             //TRAPNE.W #<data>                                |-|--2346|-|--*--|-----|          |0101_011_011_111_010-{data}
  1643:             //TPNE.W #<data>                                  |A|--2346|-|--*--|-----|          |0101_011_011_111_010-{data}  [TRAPNE.W #<data>]
  1644:             //TPNEQ.W #<data>                                 |A|--2346|-|--*--|-----|          |0101_011_011_111_010-{data}  [TRAPNE.W #<data>]
  1645:             //TPNZ.W #<data>                                  |A|--2346|-|--*--|-----|          |0101_011_011_111_010-{data}  [TRAPNE.W #<data>]
  1646:             //TPNZE.W #<data>                                 |A|--2346|-|--*--|-----|          |0101_011_011_111_010-{data}  [TRAPNE.W #<data>]
  1647:             //TRAPNEQ.W #<data>                               |A|--2346|-|--*--|-----|          |0101_011_011_111_010-{data}  [TRAPNE.W #<data>]
  1648:             //TRAPNZ.W #<data>                                |A|--2346|-|--*--|-----|          |0101_011_011_111_010-{data}  [TRAPNE.W #<data>]
  1649:             //TRAPNZE.W #<data>                               |A|--2346|-|--*--|-----|          |0101_011_011_111_010-{data}  [TRAPNE.W #<data>]
  1650:             //TRAPNE.L #<data>                                |-|--2346|-|--*--|-----|          |0101_011_011_111_011-{data}
  1651:             //TPNE.L #<data>                                  |A|--2346|-|--*--|-----|          |0101_011_011_111_011-{data}  [TRAPNE.L #<data>]
  1652:             //TPNEQ.L #<data>                                 |A|--2346|-|--*--|-----|          |0101_011_011_111_011-{data}  [TRAPNE.L #<data>]
  1653:             //TPNZ.L #<data>                                  |A|--2346|-|--*--|-----|          |0101_011_011_111_011-{data}  [TRAPNE.L #<data>]
  1654:             //TPNZE.L #<data>                                 |A|--2346|-|--*--|-----|          |0101_011_011_111_011-{data}  [TRAPNE.L #<data>]
  1655:             //TRAPNEQ.L #<data>                               |A|--2346|-|--*--|-----|          |0101_011_011_111_011-{data}  [TRAPNE.L #<data>]
  1656:             //TRAPNZ.L #<data>                                |A|--2346|-|--*--|-----|          |0101_011_011_111_011-{data}  [TRAPNE.L #<data>]
  1657:             //TRAPNZE.L #<data>                               |A|--2346|-|--*--|-----|          |0101_011_011_111_011-{data}  [TRAPNE.L #<data>]
  1658:             //TRAPNE                                          |-|--2346|-|--*--|-----|          |0101_011_011_111_100
  1659:             //TPNE                                            |A|--2346|-|--*--|-----|          |0101_011_011_111_100 [TRAPNE]
  1660:             //TPNEQ                                           |A|--2346|-|--*--|-----|          |0101_011_011_111_100 [TRAPNE]
  1661:             //TPNZ                                            |A|--2346|-|--*--|-----|          |0101_011_011_111_100 [TRAPNE]
  1662:             //TPNZE                                           |A|--2346|-|--*--|-----|          |0101_011_011_111_100 [TRAPNE]
  1663:             //TRAPNEQ                                         |A|--2346|-|--*--|-----|          |0101_011_011_111_100 [TRAPNE]
  1664:             //TRAPNZ                                          |A|--2346|-|--*--|-----|          |0101_011_011_111_100 [TRAPNE]
  1665:             //TRAPNZE                                         |A|--2346|-|--*--|-----|          |0101_011_011_111_100 [TRAPNE]
  1666:           case 0b0101_011_011:
  1667:             irpSne ();
  1668:             break irpSwitch;
  1669: 
  1670:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1671:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1672:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1673:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1674:             //SEQ.B <ea>                                      |-|012346|-|--*--|-----|D M+-WXZ  |0101_011_111_mmm_rrr
  1675:             //SNNE.B <ea>                                     |A|012346|-|--*--|-----|D M+-WXZ  |0101_011_111_mmm_rrr [SEQ.B <ea>]
  1676:             //SNNZ.B <ea>                                     |A|012346|-|--*--|-----|D M+-WXZ  |0101_011_111_mmm_rrr [SEQ.B <ea>]
  1677:             //SZE.B <ea>                                      |A|012346|-|--*--|-----|D M+-WXZ  |0101_011_111_mmm_rrr [SEQ.B <ea>]
  1678:             //DBEQ.W Dr,<label>                               |-|012346|-|--*--|-----|          |0101_011_111_001_rrr-{offset}
  1679:             //DBNNE.W Dr,<label>                              |A|012346|-|--*--|-----|          |0101_011_111_001_rrr-{offset}        [DBEQ.W Dr,<label>]
  1680:             //DBNNZ.W Dr,<label>                              |A|012346|-|--*--|-----|          |0101_011_111_001_rrr-{offset}        [DBEQ.W Dr,<label>]
  1681:             //DBZE.W Dr,<label>                               |A|012346|-|--*--|-----|          |0101_011_111_001_rrr-{offset}        [DBEQ.W Dr,<label>]
  1682:             //TRAPEQ.W #<data>                                |-|--2346|-|--*--|-----|          |0101_011_111_111_010-{data}
  1683:             //TPEQ.W #<data>                                  |A|--2346|-|--*--|-----|          |0101_011_111_111_010-{data}  [TRAPEQ.W #<data>]
  1684:             //TPNNE.W #<data>                                 |A|--2346|-|--*--|-----|          |0101_011_111_111_010-{data}  [TRAPEQ.W #<data>]
  1685:             //TPNNZ.W #<data>                                 |A|--2346|-|--*--|-----|          |0101_011_111_111_010-{data}  [TRAPEQ.W #<data>]
  1686:             //TPZE.W #<data>                                  |A|--2346|-|--*--|-----|          |0101_011_111_111_010-{data}  [TRAPEQ.W #<data>]
  1687:             //TRAPNNE.W #<data>                               |A|--2346|-|--*--|-----|          |0101_011_111_111_010-{data}  [TRAPEQ.W #<data>]
  1688:             //TRAPNNZ.W #<data>                               |A|--2346|-|--*--|-----|          |0101_011_111_111_010-{data}  [TRAPEQ.W #<data>]
  1689:             //TRAPZE.W #<data>                                |A|--2346|-|--*--|-----|          |0101_011_111_111_010-{data}  [TRAPEQ.W #<data>]
  1690:             //TRAPEQ.L #<data>                                |-|--2346|-|--*--|-----|          |0101_011_111_111_011-{data}
  1691:             //TPEQ.L #<data>                                  |A|--2346|-|--*--|-----|          |0101_011_111_111_011-{data}  [TRAPEQ.L #<data>]
  1692:             //TPNNE.L #<data>                                 |A|--2346|-|--*--|-----|          |0101_011_111_111_011-{data}  [TRAPEQ.L #<data>]
  1693:             //TPNNZ.L #<data>                                 |A|--2346|-|--*--|-----|          |0101_011_111_111_011-{data}  [TRAPEQ.L #<data>]
  1694:             //TPZE.L #<data>                                  |A|--2346|-|--*--|-----|          |0101_011_111_111_011-{data}  [TRAPEQ.L #<data>]
  1695:             //TRAPNNE.L #<data>                               |A|--2346|-|--*--|-----|          |0101_011_111_111_011-{data}  [TRAPEQ.L #<data>]
  1696:             //TRAPNNZ.L #<data>                               |A|--2346|-|--*--|-----|          |0101_011_111_111_011-{data}  [TRAPEQ.L #<data>]
  1697:             //TRAPZE.L #<data>                                |A|--2346|-|--*--|-----|          |0101_011_111_111_011-{data}  [TRAPEQ.L #<data>]
  1698:             //TRAPEQ                                          |-|--2346|-|--*--|-----|          |0101_011_111_111_100
  1699:             //TPEQ                                            |A|--2346|-|--*--|-----|          |0101_011_111_111_100 [TRAPEQ]
  1700:             //TPNNE                                           |A|--2346|-|--*--|-----|          |0101_011_111_111_100 [TRAPEQ]
  1701:             //TPNNZ                                           |A|--2346|-|--*--|-----|          |0101_011_111_111_100 [TRAPEQ]
  1702:             //TPZE                                            |A|--2346|-|--*--|-----|          |0101_011_111_111_100 [TRAPEQ]
  1703:             //TRAPNNE                                         |A|--2346|-|--*--|-----|          |0101_011_111_111_100 [TRAPEQ]
  1704:             //TRAPNNZ                                         |A|--2346|-|--*--|-----|          |0101_011_111_111_100 [TRAPEQ]
  1705:             //TRAPZE                                          |A|--2346|-|--*--|-----|          |0101_011_111_111_100 [TRAPEQ]
  1706:           case 0b0101_011_111:
  1707:             irpSeq ();
  1708:             break irpSwitch;
  1709: 
  1710:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1711:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1712:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1713:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1714:             //SVC.B <ea>                                      |-|012346|-|---*-|-----|D M+-WXZ  |0101_100_011_mmm_rrr
  1715:             //SNVS.B <ea>                                     |A|012346|-|---*-|-----|D M+-WXZ  |0101_100_011_mmm_rrr [SVC.B <ea>]
  1716:             //DBVC.W Dr,<label>                               |-|012346|-|---*-|-----|          |0101_100_011_001_rrr-{offset}
  1717:             //DBNVS.W Dr,<label>                              |A|012346|-|---*-|-----|          |0101_100_011_001_rrr-{offset}        [DBVC.W Dr,<label>]
  1718:             //TRAPVC.W #<data>                                |-|--2346|-|---*-|-----|          |0101_100_011_111_010-{data}
  1719:             //TPNVS.W #<data>                                 |A|--2346|-|---*-|-----|          |0101_100_011_111_010-{data}  [TRAPVC.W #<data>]
  1720:             //TPVC.W #<data>                                  |A|--2346|-|---*-|-----|          |0101_100_011_111_010-{data}  [TRAPVC.W #<data>]
  1721:             //TRAPNVS.W #<data>                               |A|--2346|-|---*-|-----|          |0101_100_011_111_010-{data}  [TRAPVC.W #<data>]
  1722:             //TRAPVC.L #<data>                                |-|--2346|-|---*-|-----|          |0101_100_011_111_011-{data}
  1723:             //TPNVS.L #<data>                                 |A|--2346|-|---*-|-----|          |0101_100_011_111_011-{data}  [TRAPVC.L #<data>]
  1724:             //TPVC.L #<data>                                  |A|--2346|-|---*-|-----|          |0101_100_011_111_011-{data}  [TRAPVC.L #<data>]
  1725:             //TRAPNVS.L #<data>                               |A|--2346|-|---*-|-----|          |0101_100_011_111_011-{data}  [TRAPVC.L #<data>]
  1726:             //TRAPVC                                          |-|--2346|-|---*-|-----|          |0101_100_011_111_100
  1727:             //TPNVS                                           |A|--2346|-|---*-|-----|          |0101_100_011_111_100 [TRAPVC]
  1728:             //TPVC                                            |A|--2346|-|---*-|-----|          |0101_100_011_111_100 [TRAPVC]
  1729:             //TRAPNVS                                         |A|--2346|-|---*-|-----|          |0101_100_011_111_100 [TRAPVC]
  1730:           case 0b0101_100_011:
  1731:             irpSvc ();
  1732:             break irpSwitch;
  1733: 
  1734:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1735:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1736:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1737:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1738:             //SVS.B <ea>                                      |-|012346|-|---*-|-----|D M+-WXZ  |0101_100_111_mmm_rrr
  1739:             //SNVC.B <ea>                                     |A|012346|-|---*-|-----|D M+-WXZ  |0101_100_111_mmm_rrr [SVS.B <ea>]
  1740:             //DBVS.W Dr,<label>                               |-|012346|-|---*-|-----|          |0101_100_111_001_rrr-{offset}
  1741:             //DBNVC.W Dr,<label>                              |A|012346|-|---*-|-----|          |0101_100_111_001_rrr-{offset}        [DBVS.W Dr,<label>]
  1742:             //TRAPVS.W #<data>                                |-|--2346|-|---*-|-----|          |0101_100_111_111_010-{data}
  1743:             //TPNVC.W #<data>                                 |A|--2346|-|---*-|-----|          |0101_100_111_111_010-{data}  [TRAPVS.W #<data>]
  1744:             //TPVS.W #<data>                                  |A|--2346|-|---*-|-----|          |0101_100_111_111_010-{data}  [TRAPVS.W #<data>]
  1745:             //TRAPNVC.W #<data>                               |A|--2346|-|---*-|-----|          |0101_100_111_111_010-{data}  [TRAPVS.W #<data>]
  1746:             //TRAPVS.L #<data>                                |-|--2346|-|---*-|-----|          |0101_100_111_111_011-{data}
  1747:             //TPNVC.L #<data>                                 |A|--2346|-|---*-|-----|          |0101_100_111_111_011-{data}  [TRAPVS.L #<data>]
  1748:             //TPVS.L #<data>                                  |A|--2346|-|---*-|-----|          |0101_100_111_111_011-{data}  [TRAPVS.L #<data>]
  1749:             //TRAPNVC.L #<data>                               |A|--2346|-|---*-|-----|          |0101_100_111_111_011-{data}  [TRAPVS.L #<data>]
  1750:             //TRAPVS                                          |-|--2346|-|---*-|-----|          |0101_100_111_111_100
  1751:             //TPNVC                                           |A|--2346|-|---*-|-----|          |0101_100_111_111_100 [TRAPVS]
  1752:             //TPVS                                            |A|--2346|-|---*-|-----|          |0101_100_111_111_100 [TRAPVS]
  1753:             //TRAPNVC                                         |A|--2346|-|---*-|-----|          |0101_100_111_111_100 [TRAPVS]
  1754:           case 0b0101_100_111:
  1755:             irpSvs ();
  1756:             break irpSwitch;
  1757: 
  1758:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1759:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1760:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1761:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1762:             //SPL.B <ea>                                      |-|012346|-|-*---|-----|D M+-WXZ  |0101_101_011_mmm_rrr
  1763:             //SNMI.B <ea>                                     |A|012346|-|-*---|-----|D M+-WXZ  |0101_101_011_mmm_rrr [SPL.B <ea>]
  1764:             //DBPL.W Dr,<label>                               |-|012346|-|-*---|-----|          |0101_101_011_001_rrr-{offset}
  1765:             //DBNMI.W Dr,<label>                              |A|012346|-|-*---|-----|          |0101_101_011_001_rrr-{offset}        [DBPL.W Dr,<label>]
  1766:             //TRAPPL.W #<data>                                |-|--2346|-|-*---|-----|          |0101_101_011_111_010-{data}
  1767:             //TPNMI.W #<data>                                 |A|--2346|-|-*---|-----|          |0101_101_011_111_010-{data}  [TRAPPL.W #<data>]
  1768:             //TPPL.W #<data>                                  |A|--2346|-|-*---|-----|          |0101_101_011_111_010-{data}  [TRAPPL.W #<data>]
  1769:             //TRAPNMI.W #<data>                               |A|--2346|-|-*---|-----|          |0101_101_011_111_010-{data}  [TRAPPL.W #<data>]
  1770:             //TRAPPL.L #<data>                                |-|--2346|-|-*---|-----|          |0101_101_011_111_011-{data}
  1771:             //TPNMI.L #<data>                                 |A|--2346|-|-*---|-----|          |0101_101_011_111_011-{data}  [TRAPPL.L #<data>]
  1772:             //TPPL.L #<data>                                  |A|--2346|-|-*---|-----|          |0101_101_011_111_011-{data}  [TRAPPL.L #<data>]
  1773:             //TRAPNMI.L #<data>                               |A|--2346|-|-*---|-----|          |0101_101_011_111_011-{data}  [TRAPPL.L #<data>]
  1774:             //TRAPPL                                          |-|--2346|-|-*---|-----|          |0101_101_011_111_100
  1775:             //TPNMI                                           |A|--2346|-|-*---|-----|          |0101_101_011_111_100 [TRAPPL]
  1776:             //TPPL                                            |A|--2346|-|-*---|-----|          |0101_101_011_111_100 [TRAPPL]
  1777:             //TRAPNMI                                         |A|--2346|-|-*---|-----|          |0101_101_011_111_100 [TRAPPL]
  1778:           case 0b0101_101_011:
  1779:             irpSpl ();
  1780:             break irpSwitch;
  1781: 
  1782:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1783:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1784:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1785:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1786:             //SMI.B <ea>                                      |-|012346|-|-*---|-----|D M+-WXZ  |0101_101_111_mmm_rrr
  1787:             //SNPL.B <ea>                                     |A|012346|-|-*---|-----|D M+-WXZ  |0101_101_111_mmm_rrr [SMI.B <ea>]
  1788:             //DBMI.W Dr,<label>                               |-|012346|-|-*---|-----|          |0101_101_111_001_rrr-{offset}
  1789:             //DBNPL.W Dr,<label>                              |A|012346|-|-*---|-----|          |0101_101_111_001_rrr-{offset}        [DBMI.W Dr,<label>]
  1790:             //TRAPMI.W #<data>                                |-|--2346|-|-*---|-----|          |0101_101_111_111_010-{data}
  1791:             //TPMI.W #<data>                                  |A|--2346|-|-*---|-----|          |0101_101_111_111_010-{data}  [TRAPMI.W #<data>]
  1792:             //TPNPL.W #<data>                                 |A|--2346|-|-*---|-----|          |0101_101_111_111_010-{data}  [TRAPMI.W #<data>]
  1793:             //TRAPNPL.W #<data>                               |A|--2346|-|-*---|-----|          |0101_101_111_111_010-{data}  [TRAPMI.W #<data>]
  1794:             //TRAPMI.L #<data>                                |-|--2346|-|-*---|-----|          |0101_101_111_111_011-{data}
  1795:             //TPMI.L #<data>                                  |A|--2346|-|-*---|-----|          |0101_101_111_111_011-{data}  [TRAPMI.L #<data>]
  1796:             //TPNPL.L #<data>                                 |A|--2346|-|-*---|-----|          |0101_101_111_111_011-{data}  [TRAPMI.L #<data>]
  1797:             //TRAPNPL.L #<data>                               |A|--2346|-|-*---|-----|          |0101_101_111_111_011-{data}  [TRAPMI.L #<data>]
  1798:             //TRAPMI                                          |-|--2346|-|-*---|-----|          |0101_101_111_111_100
  1799:             //TPMI                                            |A|--2346|-|-*---|-----|          |0101_101_111_111_100 [TRAPMI]
  1800:             //TPNPL                                           |A|--2346|-|-*---|-----|          |0101_101_111_111_100 [TRAPMI]
  1801:             //TRAPNPL                                         |A|--2346|-|-*---|-----|          |0101_101_111_111_100 [TRAPMI]
  1802:           case 0b0101_101_111:
  1803:             irpSmi ();
  1804:             break irpSwitch;
  1805: 
  1806:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1807:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1808:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1809:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1810:             //SGE.B <ea>                                      |-|012346|-|-*-*-|-----|D M+-WXZ  |0101_110_011_mmm_rrr
  1811:             //SNLT.B <ea>                                     |A|012346|-|-*-*-|-----|D M+-WXZ  |0101_110_011_mmm_rrr [SGE.B <ea>]
  1812:             //DBGE.W Dr,<label>                               |-|012346|-|-*-*-|-----|          |0101_110_011_001_rrr-{offset}
  1813:             //DBNLT.W Dr,<label>                              |A|012346|-|-*-*-|-----|          |0101_110_011_001_rrr-{offset}        [DBGE.W Dr,<label>]
  1814:             //TRAPGE.W #<data>                                |-|--2346|-|-*-*-|-----|          |0101_110_011_111_010-{data}
  1815:             //TPGE.W #<data>                                  |A|--2346|-|-*-*-|-----|          |0101_110_011_111_010-{data}  [TRAPGE.W #<data>]
  1816:             //TPNLT.W #<data>                                 |A|--2346|-|-*-*-|-----|          |0101_110_011_111_010-{data}  [TRAPGE.W #<data>]
  1817:             //TRAPNLT.W #<data>                               |A|--2346|-|-*-*-|-----|          |0101_110_011_111_010-{data}  [TRAPGE.W #<data>]
  1818:             //TRAPGE.L #<data>                                |-|--2346|-|-*-*-|-----|          |0101_110_011_111_011-{data}
  1819:             //TPGE.L #<data>                                  |A|--2346|-|-*-*-|-----|          |0101_110_011_111_011-{data}  [TRAPGE.L #<data>]
  1820:             //TPNLT.L #<data>                                 |A|--2346|-|-*-*-|-----|          |0101_110_011_111_011-{data}  [TRAPGE.L #<data>]
  1821:             //TRAPNLT.L #<data>                               |A|--2346|-|-*-*-|-----|          |0101_110_011_111_011-{data}  [TRAPGE.L #<data>]
  1822:             //TRAPGE                                          |-|--2346|-|-*-*-|-----|          |0101_110_011_111_100
  1823:             //TPGE                                            |A|--2346|-|-*-*-|-----|          |0101_110_011_111_100 [TRAPGE]
  1824:             //TPNLT                                           |A|--2346|-|-*-*-|-----|          |0101_110_011_111_100 [TRAPGE]
  1825:             //TRAPNLT                                         |A|--2346|-|-*-*-|-----|          |0101_110_011_111_100 [TRAPGE]
  1826:           case 0b0101_110_011:
  1827:             irpSge ();
  1828:             break irpSwitch;
  1829: 
  1830:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1831:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1832:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1833:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1834:             //SLT.B <ea>                                      |-|012346|-|-*-*-|-----|D M+-WXZ  |0101_110_111_mmm_rrr
  1835:             //SNGE.B <ea>                                     |A|012346|-|-*-*-|-----|D M+-WXZ  |0101_110_111_mmm_rrr [SLT.B <ea>]
  1836:             //DBLT.W Dr,<label>                               |-|012346|-|-*-*-|-----|          |0101_110_111_001_rrr-{offset}
  1837:             //DBNGE.W Dr,<label>                              |A|012346|-|-*-*-|-----|          |0101_110_111_001_rrr-{offset}        [DBLT.W Dr,<label>]
  1838:             //TRAPLT.W #<data>                                |-|--2346|-|-*-*-|-----|          |0101_110_111_111_010-{data}
  1839:             //TPLT.W #<data>                                  |A|--2346|-|-*-*-|-----|          |0101_110_111_111_010-{data}  [TRAPLT.W #<data>]
  1840:             //TPNGE.W #<data>                                 |A|--2346|-|-*-*-|-----|          |0101_110_111_111_010-{data}  [TRAPLT.W #<data>]
  1841:             //TRAPNGE.W #<data>                               |A|--2346|-|-*-*-|-----|          |0101_110_111_111_010-{data}  [TRAPLT.W #<data>]
  1842:             //TRAPLT.L #<data>                                |-|--2346|-|-*-*-|-----|          |0101_110_111_111_011-{data}
  1843:             //TPLT.L #<data>                                  |A|--2346|-|-*-*-|-----|          |0101_110_111_111_011-{data}  [TRAPLT.L #<data>]
  1844:             //TPNGE.L #<data>                                 |A|--2346|-|-*-*-|-----|          |0101_110_111_111_011-{data}  [TRAPLT.L #<data>]
  1845:             //TRAPNGE.L #<data>                               |A|--2346|-|-*-*-|-----|          |0101_110_111_111_011-{data}  [TRAPLT.L #<data>]
  1846:             //TRAPLT                                          |-|--2346|-|-*-*-|-----|          |0101_110_111_111_100
  1847:             //TPLT                                            |A|--2346|-|-*-*-|-----|          |0101_110_111_111_100 [TRAPLT]
  1848:             //TPNGE                                           |A|--2346|-|-*-*-|-----|          |0101_110_111_111_100 [TRAPLT]
  1849:             //TRAPNGE                                         |A|--2346|-|-*-*-|-----|          |0101_110_111_111_100 [TRAPLT]
  1850:           case 0b0101_110_111:
  1851:             irpSlt ();
  1852:             break irpSwitch;
  1853: 
  1854:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1855:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1856:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1857:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1858:             //SGT.B <ea>                                      |-|012346|-|-***-|-----|D M+-WXZ  |0101_111_011_mmm_rrr
  1859:             //SNLE.B <ea>                                     |A|012346|-|-***-|-----|D M+-WXZ  |0101_111_011_mmm_rrr [SGT.B <ea>]
  1860:             //DBGT.W Dr,<label>                               |-|012346|-|-***-|-----|          |0101_111_011_001_rrr-{offset}
  1861:             //DBNLE.W Dr,<label>                              |A|012346|-|-***-|-----|          |0101_111_011_001_rrr-{offset}        [DBGT.W Dr,<label>]
  1862:             //TRAPGT.W #<data>                                |-|--2346|-|-***-|-----|          |0101_111_011_111_010-{data}
  1863:             //TPGT.W #<data>                                  |A|--2346|-|-***-|-----|          |0101_111_011_111_010-{data}  [TRAPGT.W #<data>]
  1864:             //TPNLE.W #<data>                                 |A|--2346|-|-***-|-----|          |0101_111_011_111_010-{data}  [TRAPGT.W #<data>]
  1865:             //TRAPNLE.W #<data>                               |A|--2346|-|-***-|-----|          |0101_111_011_111_010-{data}  [TRAPGT.W #<data>]
  1866:             //TRAPGT.L #<data>                                |-|--2346|-|-***-|-----|          |0101_111_011_111_011-{data}
  1867:             //TPGT.L #<data>                                  |A|--2346|-|-***-|-----|          |0101_111_011_111_011-{data}  [TRAPGT.L #<data>]
  1868:             //TPNLE.L #<data>                                 |A|--2346|-|-***-|-----|          |0101_111_011_111_011-{data}  [TRAPGT.L #<data>]
  1869:             //TRAPNLE.L #<data>                               |A|--2346|-|-***-|-----|          |0101_111_011_111_011-{data}  [TRAPGT.L #<data>]
  1870:             //TRAPGT                                          |-|--2346|-|-***-|-----|          |0101_111_011_111_100
  1871:             //TPGT                                            |A|--2346|-|-***-|-----|          |0101_111_011_111_100 [TRAPGT]
  1872:             //TPNLE                                           |A|--2346|-|-***-|-----|          |0101_111_011_111_100 [TRAPGT]
  1873:             //TRAPNLE                                         |A|--2346|-|-***-|-----|          |0101_111_011_111_100 [TRAPGT]
  1874:           case 0b0101_111_011:
  1875:             irpSgt ();
  1876:             break irpSwitch;
  1877: 
  1878:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1879:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1880:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1881:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1882:             //SLE.B <ea>                                      |-|012346|-|-***-|-----|D M+-WXZ  |0101_111_111_mmm_rrr
  1883:             //SNGT.B <ea>                                     |A|012346|-|-***-|-----|D M+-WXZ  |0101_111_111_mmm_rrr [SLE.B <ea>]
  1884:             //DBLE.W Dr,<label>                               |-|012346|-|-***-|-----|          |0101_111_111_001_rrr-{offset}
  1885:             //DBNGT.W Dr,<label>                              |A|012346|-|-***-|-----|          |0101_111_111_001_rrr-{offset}        [DBLE.W Dr,<label>]
  1886:             //TRAPLE.W #<data>                                |-|--2346|-|-***-|-----|          |0101_111_111_111_010-{data}
  1887:             //TPLE.W #<data>                                  |A|--2346|-|-***-|-----|          |0101_111_111_111_010-{data}  [TRAPLE.W #<data>]
  1888:             //TPNGT.W #<data>                                 |A|--2346|-|-***-|-----|          |0101_111_111_111_010-{data}  [TRAPLE.W #<data>]
  1889:             //TRAPNGT.W #<data>                               |A|--2346|-|-***-|-----|          |0101_111_111_111_010-{data}  [TRAPLE.W #<data>]
  1890:             //TRAPLE.L #<data>                                |-|--2346|-|-***-|-----|          |0101_111_111_111_011-{data}
  1891:             //TPLE.L #<data>                                  |A|--2346|-|-***-|-----|          |0101_111_111_111_011-{data}  [TRAPLE.L #<data>]
  1892:             //TPNGT.L #<data>                                 |A|--2346|-|-***-|-----|          |0101_111_111_111_011-{data}  [TRAPLE.L #<data>]
  1893:             //TRAPNGT.L #<data>                               |A|--2346|-|-***-|-----|          |0101_111_111_111_011-{data}  [TRAPLE.L #<data>]
  1894:             //TRAPLE                                          |-|--2346|-|-***-|-----|          |0101_111_111_111_100
  1895:             //TPLE                                            |A|--2346|-|-***-|-----|          |0101_111_111_111_100 [TRAPLE]
  1896:             //TPNGT                                           |A|--2346|-|-***-|-----|          |0101_111_111_111_100 [TRAPLE]
  1897:             //TRAPNGT                                         |A|--2346|-|-***-|-----|          |0101_111_111_111_100 [TRAPLE]
  1898:           case 0b0101_111_111:
  1899:             irpSle ();
  1900:             break irpSwitch;
  1901: 
  1902:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1903:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1904:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1905:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1906:             //BRA.W <label>                                   |-|012346|-|-----|-----|          |0110_000_000_000_000-{offset}
  1907:             //JBRA.W <label>                                  |A|012346|-|-----|-----|          |0110_000_000_000_000-{offset}        [BRA.W <label>]
  1908:             //BRA.S <label>                                   |-|012346|-|-----|-----|          |0110_000_000_sss_sss (s is not equal to 0)
  1909:             //JBRA.S <label>                                  |A|012346|-|-----|-----|          |0110_000_000_sss_sss (s is not equal to 0)   [BRA.S <label>]
  1910:           case 0b0110_000_000:
  1911:             irpBrasw ();
  1912:             break irpSwitch;
  1913: 
  1914:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1915:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1916:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1917:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1918:             //BRA.S <label>                                   |-|012346|-|-----|-----|          |0110_000_001_sss_sss
  1919:             //JBRA.S <label>                                  |A|012346|-|-----|-----|          |0110_000_001_sss_sss [BRA.S <label>]
  1920:           case 0b0110_000_001:
  1921:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1922:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1923:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1924:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1925:             //BRA.S <label>                                   |-|012346|-|-----|-----|          |0110_000_010_sss_sss
  1926:             //JBRA.S <label>                                  |A|012346|-|-----|-----|          |0110_000_010_sss_sss [BRA.S <label>]
  1927:           case 0b0110_000_010:
  1928:             irpBras ();
  1929:             break irpSwitch;
  1930: 
  1931:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1932:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1933:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1934:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1935:             //BRA.S <label>                                   |-|--2346|-|-----|-----|          |0110_000_011_sss_sss (s is not equal to 63)
  1936:             //JBRA.S <label>                                  |A|--2346|-|-----|-----|          |0110_000_011_sss_sss (s is not equal to 63)  [BRA.S <label>]
  1937:             //BRA.L <label>                                   |-|--2346|-|-----|-----|          |0110_000_011_111_111-{offset}
  1938:           case 0b0110_000_011:
  1939:             irpBrasl ();
  1940:             break irpSwitch;
  1941: 
  1942:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1943:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1944:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1945:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1946:             //BSR.W <label>                                   |-|012346|-|-----|-----|          |0110_000_100_000_000-{offset}
  1947:             //JBSR.W <label>                                  |A|012346|-|-----|-----|          |0110_000_100_000_000-{offset}        [BSR.W <label>]
  1948:             //BSR.S <label>                                   |-|012346|-|-----|-----|          |0110_000_100_sss_sss (s is not equal to 0)
  1949:             //JBSR.S <label>                                  |A|012346|-|-----|-----|          |0110_000_100_sss_sss (s is not equal to 0)   [BSR.S <label>]
  1950:           case 0b0110_000_100:
  1951:             irpBsrsw ();
  1952:             break irpSwitch;
  1953: 
  1954:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1955:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1956:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1957:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1958:             //BSR.S <label>                                   |-|012346|-|-----|-----|          |0110_000_101_sss_sss
  1959:             //JBSR.S <label>                                  |A|012346|-|-----|-----|          |0110_000_101_sss_sss [BSR.S <label>]
  1960:           case 0b0110_000_101:
  1961:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1962:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1963:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1964:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1965:             //BSR.S <label>                                   |-|012346|-|-----|-----|          |0110_000_110_sss_sss
  1966:             //JBSR.S <label>                                  |A|012346|-|-----|-----|          |0110_000_110_sss_sss [BSR.S <label>]
  1967:           case 0b0110_000_110:
  1968:             irpBsrs ();
  1969:             break irpSwitch;
  1970: 
  1971:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1972:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1973:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1974:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1975:             //BSR.S <label>                                   |-|--2346|-|-----|-----|          |0110_000_111_sss_sss (s is not equal to 63)
  1976:             //JBSR.S <label>                                  |A|--2346|-|-----|-----|          |0110_000_111_sss_sss (s is not equal to 63)  [BSR.S <label>]
  1977:             //BSR.L <label>                                   |-|--2346|-|-----|-----|          |0110_000_111_111_111-{offset}
  1978:           case 0b0110_000_111:
  1979:             irpBsrsl ();
  1980:             break irpSwitch;
  1981: 
  1982:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1983:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1984:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1985:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1986:             //BHI.W <label>                                   |-|012346|-|--*-*|-----|          |0110_001_000_000_000-{offset}
  1987:             //BNLS.W <label>                                  |A|012346|-|--*-*|-----|          |0110_001_000_000_000-{offset}        [BHI.W <label>]
  1988:             //JBHI.W <label>                                  |A|012346|-|--*-*|-----|          |0110_001_000_000_000-{offset}        [BHI.W <label>]
  1989:             //JBNLS.W <label>                                 |A|012346|-|--*-*|-----|          |0110_001_000_000_000-{offset}        [BHI.W <label>]
  1990:             //BHI.S <label>                                   |-|012346|-|--*-*|-----|          |0110_001_000_sss_sss (s is not equal to 0)
  1991:             //BNLS.S <label>                                  |A|012346|-|--*-*|-----|          |0110_001_000_sss_sss (s is not equal to 0)   [BHI.S <label>]
  1992:             //JBHI.S <label>                                  |A|012346|-|--*-*|-----|          |0110_001_000_sss_sss (s is not equal to 0)   [BHI.S <label>]
  1993:             //JBNLS.S <label>                                 |A|012346|-|--*-*|-----|          |0110_001_000_sss_sss (s is not equal to 0)   [BHI.S <label>]
  1994:             //JBLS.L <label>                                  |A|012346|-|--*-*|-----|          |0110_001_000_000_110-0100111011111001-{address}      [BHI.S (*)+8;JMP <label>]
  1995:             //JBNHI.L <label>                                 |A|012346|-|--*-*|-----|          |0110_001_000_000_110-0100111011111001-{address}      [BHI.S (*)+8;JMP <label>]
  1996:           case 0b0110_001_000:
  1997:             irpBhisw ();
  1998:             break irpSwitch;
  1999: 
  2000:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2001:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2002:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2003:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2004:             //BHI.S <label>                                   |-|012346|-|--*-*|-----|          |0110_001_001_sss_sss
  2005:             //BNLS.S <label>                                  |A|012346|-|--*-*|-----|          |0110_001_001_sss_sss [BHI.S <label>]
  2006:             //JBHI.S <label>                                  |A|012346|-|--*-*|-----|          |0110_001_001_sss_sss [BHI.S <label>]
  2007:             //JBNLS.S <label>                                 |A|012346|-|--*-*|-----|          |0110_001_001_sss_sss [BHI.S <label>]
  2008:           case 0b0110_001_001:
  2009:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2010:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2011:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2012:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2013:             //BHI.S <label>                                   |-|012346|-|--*-*|-----|          |0110_001_010_sss_sss
  2014:             //BNLS.S <label>                                  |A|012346|-|--*-*|-----|          |0110_001_010_sss_sss [BHI.S <label>]
  2015:             //JBHI.S <label>                                  |A|012346|-|--*-*|-----|          |0110_001_010_sss_sss [BHI.S <label>]
  2016:             //JBNLS.S <label>                                 |A|012346|-|--*-*|-----|          |0110_001_010_sss_sss [BHI.S <label>]
  2017:           case 0b0110_001_010:
  2018:             irpBhis ();
  2019:             break irpSwitch;
  2020: 
  2021:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2022:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2023:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2024:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2025:             //BHI.S <label>                                   |-|--2346|-|--*-*|-----|          |0110_001_011_sss_sss (s is not equal to 63)
  2026:             //BNLS.S <label>                                  |A|--2346|-|--*-*|-----|          |0110_001_011_sss_sss (s is not equal to 63)  [BHI.S <label>]
  2027:             //JBHI.S <label>                                  |A|--2346|-|--*-*|-----|          |0110_001_011_sss_sss (s is not equal to 63)  [BHI.S <label>]
  2028:             //JBNLS.S <label>                                 |A|--2346|-|--*-*|-----|          |0110_001_011_sss_sss (s is not equal to 63)  [BHI.S <label>]
  2029:             //BHI.L <label>                                   |-|--2346|-|--*-*|-----|          |0110_001_011_111_111-{offset}
  2030:             //BNLS.L <label>                                  |A|--2346|-|--*-*|-----|          |0110_001_011_111_111-{offset}        [BHI.L <label>]
  2031:           case 0b0110_001_011:
  2032:             irpBhisl ();
  2033:             break irpSwitch;
  2034: 
  2035:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2036:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2037:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2038:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2039:             //BLS.W <label>                                   |-|012346|-|--*-*|-----|          |0110_001_100_000_000-{offset}
  2040:             //BNHI.W <label>                                  |A|012346|-|--*-*|-----|          |0110_001_100_000_000-{offset}        [BLS.W <label>]
  2041:             //JBLS.W <label>                                  |A|012346|-|--*-*|-----|          |0110_001_100_000_000-{offset}        [BLS.W <label>]
  2042:             //JBNHI.W <label>                                 |A|012346|-|--*-*|-----|          |0110_001_100_000_000-{offset}        [BLS.W <label>]
  2043:             //BLS.S <label>                                   |-|012346|-|--*-*|-----|          |0110_001_100_sss_sss (s is not equal to 0)
  2044:             //BNHI.S <label>                                  |A|012346|-|--*-*|-----|          |0110_001_100_sss_sss (s is not equal to 0)   [BLS.S <label>]
  2045:             //JBLS.S <label>                                  |A|012346|-|--*-*|-----|          |0110_001_100_sss_sss (s is not equal to 0)   [BLS.S <label>]
  2046:             //JBNHI.S <label>                                 |A|012346|-|--*-*|-----|          |0110_001_100_sss_sss (s is not equal to 0)   [BLS.S <label>]
  2047:             //JBHI.L <label>                                  |A|012346|-|--*-*|-----|          |0110_001_100_000_110-0100111011111001-{address}      [BLS.S (*)+8;JMP <label>]
  2048:             //JBNLS.L <label>                                 |A|012346|-|--*-*|-----|          |0110_001_100_000_110-0100111011111001-{address}      [BLS.S (*)+8;JMP <label>]
  2049:           case 0b0110_001_100:
  2050:             irpBlssw ();
  2051:             break irpSwitch;
  2052: 
  2053:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2054:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2055:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2056:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2057:             //BLS.S <label>                                   |-|012346|-|--*-*|-----|          |0110_001_101_sss_sss
  2058:             //BNHI.S <label>                                  |A|012346|-|--*-*|-----|          |0110_001_101_sss_sss [BLS.S <label>]
  2059:             //JBLS.S <label>                                  |A|012346|-|--*-*|-----|          |0110_001_101_sss_sss [BLS.S <label>]
  2060:             //JBNHI.S <label>                                 |A|012346|-|--*-*|-----|          |0110_001_101_sss_sss [BLS.S <label>]
  2061:           case 0b0110_001_101:
  2062:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2063:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2064:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2065:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2066:             //BLS.S <label>                                   |-|012346|-|--*-*|-----|          |0110_001_110_sss_sss
  2067:             //BNHI.S <label>                                  |A|012346|-|--*-*|-----|          |0110_001_110_sss_sss [BLS.S <label>]
  2068:             //JBLS.S <label>                                  |A|012346|-|--*-*|-----|          |0110_001_110_sss_sss [BLS.S <label>]
  2069:             //JBNHI.S <label>                                 |A|012346|-|--*-*|-----|          |0110_001_110_sss_sss [BLS.S <label>]
  2070:           case 0b0110_001_110:
  2071:             irpBlss ();
  2072:             break irpSwitch;
  2073: 
  2074:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2075:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2076:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2077:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2078:             //BLS.S <label>                                   |-|--2346|-|--*-*|-----|          |0110_001_111_sss_sss (s is not equal to 63)
  2079:             //BNHI.S <label>                                  |A|--2346|-|--*-*|-----|          |0110_001_111_sss_sss (s is not equal to 63)  [BLS.S <label>]
  2080:             //JBLS.S <label>                                  |A|--2346|-|--*-*|-----|          |0110_001_111_sss_sss (s is not equal to 63)  [BLS.S <label>]
  2081:             //JBNHI.S <label>                                 |A|--2346|-|--*-*|-----|          |0110_001_111_sss_sss (s is not equal to 63)  [BLS.S <label>]
  2082:             //BLS.L <label>                                   |-|--2346|-|--*-*|-----|          |0110_001_111_111_111-{offset}
  2083:             //BNHI.L <label>                                  |A|--2346|-|--*-*|-----|          |0110_001_111_111_111-{offset}        [BLS.L <label>]
  2084:           case 0b0110_001_111:
  2085:             irpBlssl ();
  2086:             break irpSwitch;
  2087: 
  2088:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2089:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2090:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2091:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2092:             //BCC.W <label>                                   |-|012346|-|----*|-----|          |0110_010_000_000_000-{offset}
  2093:             //BHS.W <label>                                   |A|012346|-|----*|-----|          |0110_010_000_000_000-{offset}        [BCC.W <label>]
  2094:             //BNCS.W <label>                                  |A|012346|-|----*|-----|          |0110_010_000_000_000-{offset}        [BCC.W <label>]
  2095:             //BNLO.W <label>                                  |A|012346|-|----*|-----|          |0110_010_000_000_000-{offset}        [BCC.W <label>]
  2096:             //JBCC.W <label>                                  |A|012346|-|----*|-----|          |0110_010_000_000_000-{offset}        [BCC.W <label>]
  2097:             //JBHS.W <label>                                  |A|012346|-|----*|-----|          |0110_010_000_000_000-{offset}        [BCC.W <label>]
  2098:             //JBNCS.W <label>                                 |A|012346|-|----*|-----|          |0110_010_000_000_000-{offset}        [BCC.W <label>]
  2099:             //JBNLO.W <label>                                 |A|012346|-|----*|-----|          |0110_010_000_000_000-{offset}        [BCC.W <label>]
  2100:             //BCC.S <label>                                   |-|012346|-|----*|-----|          |0110_010_000_sss_sss (s is not equal to 0)
  2101:             //BHS.S <label>                                   |A|012346|-|----*|-----|          |0110_010_000_sss_sss (s is not equal to 0)   [BCC.S <label>]
  2102:             //BNCS.S <label>                                  |A|012346|-|----*|-----|          |0110_010_000_sss_sss (s is not equal to 0)   [BCC.S <label>]
  2103:             //BNLO.S <label>                                  |A|012346|-|----*|-----|          |0110_010_000_sss_sss (s is not equal to 0)   [BCC.S <label>]
  2104:             //JBCC.S <label>                                  |A|012346|-|----*|-----|          |0110_010_000_sss_sss (s is not equal to 0)   [BCC.S <label>]
  2105:             //JBHS.S <label>                                  |A|012346|-|----*|-----|          |0110_010_000_sss_sss (s is not equal to 0)   [BCC.S <label>]
  2106:             //JBNCS.S <label>                                 |A|012346|-|----*|-----|          |0110_010_000_sss_sss (s is not equal to 0)   [BCC.S <label>]
  2107:             //JBNLO.S <label>                                 |A|012346|-|----*|-----|          |0110_010_000_sss_sss (s is not equal to 0)   [BCC.S <label>]
  2108:             //JBCS.L <label>                                  |A|012346|-|----*|-----|          |0110_010_000_000_110-0100111011111001-{address}      [BCC.S (*)+8;JMP <label>]
  2109:             //JBLO.L <label>                                  |A|012346|-|----*|-----|          |0110_010_000_000_110-0100111011111001-{address}      [BCC.S (*)+8;JMP <label>]
  2110:             //JBNCC.L <label>                                 |A|012346|-|----*|-----|          |0110_010_000_000_110-0100111011111001-{address}      [BCC.S (*)+8;JMP <label>]
  2111:             //JBNHS.L <label>                                 |A|012346|-|----*|-----|          |0110_010_000_000_110-0100111011111001-{address}      [BCC.S (*)+8;JMP <label>]
  2112:           case 0b0110_010_000:
  2113:             irpBhssw ();
  2114:             break irpSwitch;
  2115: 
  2116:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2117:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2118:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2119:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2120:             //BCC.S <label>                                   |-|012346|-|----*|-----|          |0110_010_001_sss_sss
  2121:             //BHS.S <label>                                   |A|012346|-|----*|-----|          |0110_010_001_sss_sss [BCC.S <label>]
  2122:             //BNCS.S <label>                                  |A|012346|-|----*|-----|          |0110_010_001_sss_sss [BCC.S <label>]
  2123:             //BNLO.S <label>                                  |A|012346|-|----*|-----|          |0110_010_001_sss_sss [BCC.S <label>]
  2124:             //JBCC.S <label>                                  |A|012346|-|----*|-----|          |0110_010_001_sss_sss [BCC.S <label>]
  2125:             //JBHS.S <label>                                  |A|012346|-|----*|-----|          |0110_010_001_sss_sss [BCC.S <label>]
  2126:             //JBNCS.S <label>                                 |A|012346|-|----*|-----|          |0110_010_001_sss_sss [BCC.S <label>]
  2127:             //JBNLO.S <label>                                 |A|012346|-|----*|-----|          |0110_010_001_sss_sss [BCC.S <label>]
  2128:           case 0b0110_010_001:
  2129:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2130:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2131:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2132:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2133:             //BCC.S <label>                                   |-|012346|-|----*|-----|          |0110_010_010_sss_sss
  2134:             //BHS.S <label>                                   |A|012346|-|----*|-----|          |0110_010_010_sss_sss [BCC.S <label>]
  2135:             //BNCS.S <label>                                  |A|012346|-|----*|-----|          |0110_010_010_sss_sss [BCC.S <label>]
  2136:             //BNLO.S <label>                                  |A|012346|-|----*|-----|          |0110_010_010_sss_sss [BCC.S <label>]
  2137:             //JBCC.S <label>                                  |A|012346|-|----*|-----|          |0110_010_010_sss_sss [BCC.S <label>]
  2138:             //JBHS.S <label>                                  |A|012346|-|----*|-----|          |0110_010_010_sss_sss [BCC.S <label>]
  2139:             //JBNCS.S <label>                                 |A|012346|-|----*|-----|          |0110_010_010_sss_sss [BCC.S <label>]
  2140:             //JBNLO.S <label>                                 |A|012346|-|----*|-----|          |0110_010_010_sss_sss [BCC.S <label>]
  2141:           case 0b0110_010_010:
  2142:             irpBhss ();
  2143:             break irpSwitch;
  2144: 
  2145:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2146:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2147:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2148:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2149:             //BCC.S <label>                                   |-|--2346|-|----*|-----|          |0110_010_011_sss_sss (s is not equal to 63)
  2150:             //BHS.S <label>                                   |A|--2346|-|----*|-----|          |0110_010_011_sss_sss (s is not equal to 63)  [BCC.S <label>]
  2151:             //BNCS.S <label>                                  |A|--2346|-|----*|-----|          |0110_010_011_sss_sss (s is not equal to 63)  [BCC.S <label>]
  2152:             //BNLO.S <label>                                  |A|--2346|-|----*|-----|          |0110_010_011_sss_sss (s is not equal to 63)  [BCC.S <label>]
  2153:             //JBCC.S <label>                                  |A|--2346|-|----*|-----|          |0110_010_011_sss_sss (s is not equal to 63)  [BCC.S <label>]
  2154:             //JBHS.S <label>                                  |A|--2346|-|----*|-----|          |0110_010_011_sss_sss (s is not equal to 63)  [BCC.S <label>]
  2155:             //JBNCS.S <label>                                 |A|--2346|-|----*|-----|          |0110_010_011_sss_sss (s is not equal to 63)  [BCC.S <label>]
  2156:             //JBNLO.S <label>                                 |A|--2346|-|----*|-----|          |0110_010_011_sss_sss (s is not equal to 63)  [BCC.S <label>]
  2157:             //BCC.L <label>                                   |-|--2346|-|----*|-----|          |0110_010_011_111_111-{offset}
  2158:             //BHS.L <label>                                   |A|--2346|-|----*|-----|          |0110_010_011_111_111-{offset}        [BCC.L <label>]
  2159:             //BNCS.L <label>                                  |A|--2346|-|----*|-----|          |0110_010_011_111_111-{offset}        [BCC.L <label>]
  2160:             //BNLO.L <label>                                  |A|--2346|-|----*|-----|          |0110_010_011_111_111-{offset}        [BCC.L <label>]
  2161:           case 0b0110_010_011:
  2162:             irpBhssl ();
  2163:             break irpSwitch;
  2164: 
  2165:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2166:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2167:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2168:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2169:             //BCS.W <label>                                   |-|012346|-|----*|-----|          |0110_010_100_000_000-{offset}
  2170:             //BLO.W <label>                                   |A|012346|-|----*|-----|          |0110_010_100_000_000-{offset}        [BCS.W <label>]
  2171:             //BNCC.W <label>                                  |A|012346|-|----*|-----|          |0110_010_100_000_000-{offset}        [BCS.W <label>]
  2172:             //BNHS.W <label>                                  |A|012346|-|----*|-----|          |0110_010_100_000_000-{offset}        [BCS.W <label>]
  2173:             //JBCS.W <label>                                  |A|012346|-|----*|-----|          |0110_010_100_000_000-{offset}        [BCS.W <label>]
  2174:             //JBLO.W <label>                                  |A|012346|-|----*|-----|          |0110_010_100_000_000-{offset}        [BCS.W <label>]
  2175:             //JBNCC.W <label>                                 |A|012346|-|----*|-----|          |0110_010_100_000_000-{offset}        [BCS.W <label>]
  2176:             //JBNHS.W <label>                                 |A|012346|-|----*|-----|          |0110_010_100_000_000-{offset}        [BCS.W <label>]
  2177:             //BCS.S <label>                                   |-|012346|-|----*|-----|          |0110_010_100_sss_sss (s is not equal to 0)
  2178:             //BLO.S <label>                                   |A|012346|-|----*|-----|          |0110_010_100_sss_sss (s is not equal to 0)   [BCS.S <label>]
  2179:             //BNCC.S <label>                                  |A|012346|-|----*|-----|          |0110_010_100_sss_sss (s is not equal to 0)   [BCS.S <label>]
  2180:             //BNHS.S <label>                                  |A|012346|-|----*|-----|          |0110_010_100_sss_sss (s is not equal to 0)   [BCS.S <label>]
  2181:             //JBCS.S <label>                                  |A|012346|-|----*|-----|          |0110_010_100_sss_sss (s is not equal to 0)   [BCS.S <label>]
  2182:             //JBLO.S <label>                                  |A|012346|-|----*|-----|          |0110_010_100_sss_sss (s is not equal to 0)   [BCS.S <label>]
  2183:             //JBNCC.S <label>                                 |A|012346|-|----*|-----|          |0110_010_100_sss_sss (s is not equal to 0)   [BCS.S <label>]
  2184:             //JBNHS.S <label>                                 |A|012346|-|----*|-----|          |0110_010_100_sss_sss (s is not equal to 0)   [BCS.S <label>]
  2185:             //JBCC.L <label>                                  |A|012346|-|----*|-----|          |0110_010_100_000_110-0100111011111001-{address}      [BCS.S (*)+8;JMP <label>]
  2186:             //JBHS.L <label>                                  |A|012346|-|----*|-----|          |0110_010_100_000_110-0100111011111001-{address}      [BCS.S (*)+8;JMP <label>]
  2187:             //JBNCS.L <label>                                 |A|012346|-|----*|-----|          |0110_010_100_000_110-0100111011111001-{address}      [BCS.S (*)+8;JMP <label>]
  2188:             //JBNLO.L <label>                                 |A|012346|-|----*|-----|          |0110_010_100_000_110-0100111011111001-{address}      [BCS.S (*)+8;JMP <label>]
  2189:           case 0b0110_010_100:
  2190:             irpBlosw ();
  2191:             break irpSwitch;
  2192: 
  2193:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2194:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2195:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2196:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2197:             //BCS.S <label>                                   |-|012346|-|----*|-----|          |0110_010_101_sss_sss
  2198:             //BLO.S <label>                                   |A|012346|-|----*|-----|          |0110_010_101_sss_sss [BCS.S <label>]
  2199:             //BNCC.S <label>                                  |A|012346|-|----*|-----|          |0110_010_101_sss_sss [BCS.S <label>]
  2200:             //BNHS.S <label>                                  |A|012346|-|----*|-----|          |0110_010_101_sss_sss [BCS.S <label>]
  2201:             //JBCS.S <label>                                  |A|012346|-|----*|-----|          |0110_010_101_sss_sss [BCS.S <label>]
  2202:             //JBLO.S <label>                                  |A|012346|-|----*|-----|          |0110_010_101_sss_sss [BCS.S <label>]
  2203:             //JBNCC.S <label>                                 |A|012346|-|----*|-----|          |0110_010_101_sss_sss [BCS.S <label>]
  2204:             //JBNHS.S <label>                                 |A|012346|-|----*|-----|          |0110_010_101_sss_sss [BCS.S <label>]
  2205:           case 0b0110_010_101:
  2206:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2207:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2208:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2209:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2210:             //BCS.S <label>                                   |-|012346|-|----*|-----|          |0110_010_110_sss_sss
  2211:             //BLO.S <label>                                   |A|012346|-|----*|-----|          |0110_010_110_sss_sss [BCS.S <label>]
  2212:             //BNCC.S <label>                                  |A|012346|-|----*|-----|          |0110_010_110_sss_sss [BCS.S <label>]
  2213:             //BNHS.S <label>                                  |A|012346|-|----*|-----|          |0110_010_110_sss_sss [BCS.S <label>]
  2214:             //JBCS.S <label>                                  |A|012346|-|----*|-----|          |0110_010_110_sss_sss [BCS.S <label>]
  2215:             //JBLO.S <label>                                  |A|012346|-|----*|-----|          |0110_010_110_sss_sss [BCS.S <label>]
  2216:             //JBNCC.S <label>                                 |A|012346|-|----*|-----|          |0110_010_110_sss_sss [BCS.S <label>]
  2217:             //JBNHS.S <label>                                 |A|012346|-|----*|-----|          |0110_010_110_sss_sss [BCS.S <label>]
  2218:           case 0b0110_010_110:
  2219:             irpBlos ();
  2220:             break irpSwitch;
  2221: 
  2222:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2223:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2224:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2225:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2226:             //BCS.S <label>                                   |-|--2346|-|----*|-----|          |0110_010_111_sss_sss (s is not equal to 63)
  2227:             //BLO.S <label>                                   |A|--2346|-|----*|-----|          |0110_010_111_sss_sss (s is not equal to 63)  [BCS.S <label>]
  2228:             //BNCC.S <label>                                  |A|--2346|-|----*|-----|          |0110_010_111_sss_sss (s is not equal to 63)  [BCS.S <label>]
  2229:             //BNHS.S <label>                                  |A|--2346|-|----*|-----|          |0110_010_111_sss_sss (s is not equal to 63)  [BCS.S <label>]
  2230:             //JBCS.S <label>                                  |A|--2346|-|----*|-----|          |0110_010_111_sss_sss (s is not equal to 63)  [BCS.S <label>]
  2231:             //JBLO.S <label>                                  |A|--2346|-|----*|-----|          |0110_010_111_sss_sss (s is not equal to 63)  [BCS.S <label>]
  2232:             //JBNCC.S <label>                                 |A|--2346|-|----*|-----|          |0110_010_111_sss_sss (s is not equal to 63)  [BCS.S <label>]
  2233:             //JBNHS.S <label>                                 |A|--2346|-|----*|-----|          |0110_010_111_sss_sss (s is not equal to 63)  [BCS.S <label>]
  2234:             //BCS.L <label>                                   |-|--2346|-|----*|-----|          |0110_010_111_111_111-{offset}
  2235:             //BLO.L <label>                                   |A|--2346|-|----*|-----|          |0110_010_111_111_111-{offset}        [BCS.L <label>]
  2236:             //BNCC.L <label>                                  |A|--2346|-|----*|-----|          |0110_010_111_111_111-{offset}        [BCS.L <label>]
  2237:             //BNHS.L <label>                                  |A|--2346|-|----*|-----|          |0110_010_111_111_111-{offset}        [BCS.L <label>]
  2238:           case 0b0110_010_111:
  2239:             irpBlosl ();
  2240:             break irpSwitch;
  2241: 
  2242:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2243:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2244:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2245:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2246:             //BNE.W <label>                                   |-|012346|-|--*--|-----|          |0110_011_000_000_000-{offset}
  2247:             //BNEQ.W <label>                                  |A|012346|-|--*--|-----|          |0110_011_000_000_000-{offset}        [BNE.W <label>]
  2248:             //BNZ.W <label>                                   |A|012346|-|--*--|-----|          |0110_011_000_000_000-{offset}        [BNE.W <label>]
  2249:             //BNZE.W <label>                                  |A|012346|-|--*--|-----|          |0110_011_000_000_000-{offset}        [BNE.W <label>]
  2250:             //JBNE.W <label>                                  |A|012346|-|--*--|-----|          |0110_011_000_000_000-{offset}        [BNE.W <label>]
  2251:             //JBNEQ.W <label>                                 |A|012346|-|--*--|-----|          |0110_011_000_000_000-{offset}        [BNE.W <label>]
  2252:             //JBNZ.W <label>                                  |A|012346|-|--*--|-----|          |0110_011_000_000_000-{offset}        [BNE.W <label>]
  2253:             //JBNZE.W <label>                                 |A|012346|-|--*--|-----|          |0110_011_000_000_000-{offset}        [BNE.W <label>]
  2254:             //BNE.S <label>                                   |-|012346|-|--*--|-----|          |0110_011_000_sss_sss (s is not equal to 0)
  2255:             //BNEQ.S <label>                                  |A|012346|-|--*--|-----|          |0110_011_000_sss_sss (s is not equal to 0)   [BNE.S <label>]
  2256:             //BNZ.S <label>                                   |A|012346|-|--*--|-----|          |0110_011_000_sss_sss (s is not equal to 0)   [BNE.S <label>]
  2257:             //BNZE.S <label>                                  |A|012346|-|--*--|-----|          |0110_011_000_sss_sss (s is not equal to 0)   [BNE.S <label>]
  2258:             //JBNE.S <label>                                  |A|012346|-|--*--|-----|          |0110_011_000_sss_sss (s is not equal to 0)   [BNE.S <label>]
  2259:             //JBNEQ.S <label>                                 |A|012346|-|--*--|-----|          |0110_011_000_sss_sss (s is not equal to 0)   [BNE.S <label>]
  2260:             //JBNZ.S <label>                                  |A|012346|-|--*--|-----|          |0110_011_000_sss_sss (s is not equal to 0)   [BNE.S <label>]
  2261:             //JBNZE.S <label>                                 |A|012346|-|--*--|-----|          |0110_011_000_sss_sss (s is not equal to 0)   [BNE.S <label>]
  2262:             //JBEQ.L <label>                                  |A|012346|-|--*--|-----|          |0110_011_000_000_110-0100111011111001-{address}      [BNE.S (*)+8;JMP <label>]
  2263:             //JBNEQ.L <label>                                 |A|012346|-|--*--|-----|          |0110_011_000_000_110-0100111011111001-{address}      [BNE.S (*)+8;JMP <label>]
  2264:             //JBNNE.L <label>                                 |A|012346|-|--*--|-----|          |0110_011_000_000_110-0100111011111001-{address}      [BNE.S (*)+8;JMP <label>]
  2265:             //JBNNZ.L <label>                                 |A|012346|-|--*--|-----|          |0110_011_000_000_110-0100111011111001-{address}      [BNE.S (*)+8;JMP <label>]
  2266:             //JBNZ.L <label>                                  |A|012346|-|--*--|-----|          |0110_011_000_000_110-0100111011111001-{address}      [BNE.S (*)+8;JMP <label>]
  2267:             //JBNZE.L <label>                                 |A|012346|-|--*--|-----|          |0110_011_000_000_110-0100111011111001-{address}      [BNE.S (*)+8;JMP <label>]
  2268:             //JBZE.L <label>                                  |A|012346|-|--*--|-----|          |0110_011_000_000_110-0100111011111001-{address}      [BNE.S (*)+8;JMP <label>]
  2269:           case 0b0110_011_000:
  2270:             irpBnesw ();
  2271:             break irpSwitch;
  2272: 
  2273:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2274:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2275:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2276:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2277:             //BNE.S <label>                                   |-|012346|-|--*--|-----|          |0110_011_001_sss_sss
  2278:             //BNEQ.S <label>                                  |A|012346|-|--*--|-----|          |0110_011_001_sss_sss [BNE.S <label>]
  2279:             //BNZ.S <label>                                   |A|012346|-|--*--|-----|          |0110_011_001_sss_sss [BNE.S <label>]
  2280:             //BNZE.S <label>                                  |A|012346|-|--*--|-----|          |0110_011_001_sss_sss [BNE.S <label>]
  2281:             //JBNE.S <label>                                  |A|012346|-|--*--|-----|          |0110_011_001_sss_sss [BNE.S <label>]
  2282:             //JBNEQ.S <label>                                 |A|012346|-|--*--|-----|          |0110_011_001_sss_sss [BNE.S <label>]
  2283:             //JBNZ.S <label>                                  |A|012346|-|--*--|-----|          |0110_011_001_sss_sss [BNE.S <label>]
  2284:             //JBNZE.S <label>                                 |A|012346|-|--*--|-----|          |0110_011_001_sss_sss [BNE.S <label>]
  2285:           case 0b0110_011_001:
  2286:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2287:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2288:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2289:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2290:             //BNE.S <label>                                   |-|012346|-|--*--|-----|          |0110_011_010_sss_sss
  2291:             //BNEQ.S <label>                                  |A|012346|-|--*--|-----|          |0110_011_010_sss_sss [BNE.S <label>]
  2292:             //BNZ.S <label>                                   |A|012346|-|--*--|-----|          |0110_011_010_sss_sss [BNE.S <label>]
  2293:             //BNZE.S <label>                                  |A|012346|-|--*--|-----|          |0110_011_010_sss_sss [BNE.S <label>]
  2294:             //JBNE.S <label>                                  |A|012346|-|--*--|-----|          |0110_011_010_sss_sss [BNE.S <label>]
  2295:             //JBNEQ.S <label>                                 |A|012346|-|--*--|-----|          |0110_011_010_sss_sss [BNE.S <label>]
  2296:             //JBNZ.S <label>                                  |A|012346|-|--*--|-----|          |0110_011_010_sss_sss [BNE.S <label>]
  2297:             //JBNZE.S <label>                                 |A|012346|-|--*--|-----|          |0110_011_010_sss_sss [BNE.S <label>]
  2298:           case 0b0110_011_010:
  2299:             irpBnes ();
  2300:             break irpSwitch;
  2301: 
  2302:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2303:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2304:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2305:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2306:             //BNE.S <label>                                   |-|--2346|-|--*--|-----|          |0110_011_011_sss_sss (s is not equal to 63)
  2307:             //BNEQ.S <label>                                  |A|--2346|-|--*--|-----|          |0110_011_011_sss_sss (s is not equal to 63)  [BNE.S <label>]
  2308:             //BNZ.S <label>                                   |A|--2346|-|--*--|-----|          |0110_011_011_sss_sss (s is not equal to 63)  [BNE.S <label>]
  2309:             //BNZE.S <label>                                  |A|--2346|-|--*--|-----|          |0110_011_011_sss_sss (s is not equal to 63)  [BNE.S <label>]
  2310:             //JBNE.S <label>                                  |A|--2346|-|--*--|-----|          |0110_011_011_sss_sss (s is not equal to 63)  [BNE.S <label>]
  2311:             //JBNEQ.S <label>                                 |A|--2346|-|--*--|-----|          |0110_011_011_sss_sss (s is not equal to 63)  [BNE.S <label>]
  2312:             //JBNZ.S <label>                                  |A|--2346|-|--*--|-----|          |0110_011_011_sss_sss (s is not equal to 63)  [BNE.S <label>]
  2313:             //JBNZE.S <label>                                 |A|--2346|-|--*--|-----|          |0110_011_011_sss_sss (s is not equal to 63)  [BNE.S <label>]
  2314:             //BNE.L <label>                                   |-|--2346|-|--*--|-----|          |0110_011_011_111_111-{offset}
  2315:             //BNEQ.L <label>                                  |A|--2346|-|--*--|-----|          |0110_011_011_111_111-{offset}        [BNE.L <label>]
  2316:             //BNZ.L <label>                                   |A|--2346|-|--*--|-----|          |0110_011_011_111_111-{offset}        [BNE.L <label>]
  2317:             //BNZE.L <label>                                  |A|--2346|-|--*--|-----|          |0110_011_011_111_111-{offset}        [BNE.L <label>]
  2318:           case 0b0110_011_011:
  2319:             irpBnesl ();
  2320:             break irpSwitch;
  2321: 
  2322:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2323:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2324:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2325:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2326:             //BEQ.W <label>                                   |-|012346|-|--*--|-----|          |0110_011_100_000_000-{offset}
  2327:             //BNNE.W <label>                                  |A|012346|-|--*--|-----|          |0110_011_100_000_000-{offset}        [BEQ.W <label>]
  2328:             //BNNZ.W <label>                                  |A|012346|-|--*--|-----|          |0110_011_100_000_000-{offset}        [BEQ.W <label>]
  2329:             //BZE.W <label>                                   |A|012346|-|--*--|-----|          |0110_011_100_000_000-{offset}        [BEQ.W <label>]
  2330:             //JBEQ.W <label>                                  |A|012346|-|--*--|-----|          |0110_011_100_000_000-{offset}        [BEQ.W <label>]
  2331:             //JBNNE.W <label>                                 |A|012346|-|--*--|-----|          |0110_011_100_000_000-{offset}        [BEQ.W <label>]
  2332:             //JBNNZ.W <label>                                 |A|012346|-|--*--|-----|          |0110_011_100_000_000-{offset}        [BEQ.W <label>]
  2333:             //JBZE.W <label>                                  |A|012346|-|--*--|-----|          |0110_011_100_000_000-{offset}        [BEQ.W <label>]
  2334:             //BEQ.S <label>                                   |-|012346|-|--*--|-----|          |0110_011_100_sss_sss (s is not equal to 0)
  2335:             //BNNE.S <label>                                  |A|012346|-|--*--|-----|          |0110_011_100_sss_sss (s is not equal to 0)   [BEQ.S <label>]
  2336:             //BNNZ.S <label>                                  |A|012346|-|--*--|-----|          |0110_011_100_sss_sss (s is not equal to 0)   [BEQ.S <label>]
  2337:             //BZE.S <label>                                   |A|012346|-|--*--|-----|          |0110_011_100_sss_sss (s is not equal to 0)   [BEQ.S <label>]
  2338:             //JBEQ.S <label>                                  |A|012346|-|--*--|-----|          |0110_011_100_sss_sss (s is not equal to 0)   [BEQ.S <label>]
  2339:             //JBNNE.S <label>                                 |A|012346|-|--*--|-----|          |0110_011_100_sss_sss (s is not equal to 0)   [BEQ.S <label>]
  2340:             //JBNNZ.S <label>                                 |A|012346|-|--*--|-----|          |0110_011_100_sss_sss (s is not equal to 0)   [BEQ.S <label>]
  2341:             //JBZE.S <label>                                  |A|012346|-|--*--|-----|          |0110_011_100_sss_sss (s is not equal to 0)   [BEQ.S <label>]
  2342:             //JBNE.L <label>                                  |A|012346|-|--*--|-----|          |0110_011_100_000_110-0100111011111001-{address}      [BEQ.S (*)+8;JMP <label>]
  2343:           case 0b0110_011_100:
  2344:             irpBeqsw ();
  2345:             break irpSwitch;
  2346: 
  2347:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2348:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2349:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2350:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2351:             //BEQ.S <label>                                   |-|012346|-|--*--|-----|          |0110_011_101_sss_sss
  2352:             //BNNE.S <label>                                  |A|012346|-|--*--|-----|          |0110_011_101_sss_sss [BEQ.S <label>]
  2353:             //BNNZ.S <label>                                  |A|012346|-|--*--|-----|          |0110_011_101_sss_sss [BEQ.S <label>]
  2354:             //BZE.S <label>                                   |A|012346|-|--*--|-----|          |0110_011_101_sss_sss [BEQ.S <label>]
  2355:             //JBEQ.S <label>                                  |A|012346|-|--*--|-----|          |0110_011_101_sss_sss [BEQ.S <label>]
  2356:             //JBNNE.S <label>                                 |A|012346|-|--*--|-----|          |0110_011_101_sss_sss [BEQ.S <label>]
  2357:             //JBNNZ.S <label>                                 |A|012346|-|--*--|-----|          |0110_011_101_sss_sss [BEQ.S <label>]
  2358:             //JBZE.S <label>                                  |A|012346|-|--*--|-----|          |0110_011_101_sss_sss [BEQ.S <label>]
  2359:           case 0b0110_011_101:
  2360:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2361:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2362:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2363:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2364:             //BEQ.S <label>                                   |-|012346|-|--*--|-----|          |0110_011_110_sss_sss
  2365:             //BNNE.S <label>                                  |A|012346|-|--*--|-----|          |0110_011_110_sss_sss [BEQ.S <label>]
  2366:             //BNNZ.S <label>                                  |A|012346|-|--*--|-----|          |0110_011_110_sss_sss [BEQ.S <label>]
  2367:             //BZE.S <label>                                   |A|012346|-|--*--|-----|          |0110_011_110_sss_sss [BEQ.S <label>]
  2368:             //JBEQ.S <label>                                  |A|012346|-|--*--|-----|          |0110_011_110_sss_sss [BEQ.S <label>]
  2369:             //JBNNE.S <label>                                 |A|012346|-|--*--|-----|          |0110_011_110_sss_sss [BEQ.S <label>]
  2370:             //JBNNZ.S <label>                                 |A|012346|-|--*--|-----|          |0110_011_110_sss_sss [BEQ.S <label>]
  2371:             //JBZE.S <label>                                  |A|012346|-|--*--|-----|          |0110_011_110_sss_sss [BEQ.S <label>]
  2372:           case 0b0110_011_110:
  2373:             irpBeqs ();
  2374:             break irpSwitch;
  2375: 
  2376:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2377:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2378:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2379:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2380:             //BEQ.S <label>                                   |-|--2346|-|--*--|-----|          |0110_011_111_sss_sss (s is not equal to 63)
  2381:             //BNNE.S <label>                                  |A|--2346|-|--*--|-----|          |0110_011_111_sss_sss (s is not equal to 63)  [BEQ.S <label>]
  2382:             //BNNZ.S <label>                                  |A|--2346|-|--*--|-----|          |0110_011_111_sss_sss (s is not equal to 63)  [BEQ.S <label>]
  2383:             //BZE.S <label>                                   |A|--2346|-|--*--|-----|          |0110_011_111_sss_sss (s is not equal to 63)  [BEQ.S <label>]
  2384:             //JBEQ.S <label>                                  |A|--2346|-|--*--|-----|          |0110_011_111_sss_sss (s is not equal to 63)  [BEQ.S <label>]
  2385:             //JBNNE.S <label>                                 |A|--2346|-|--*--|-----|          |0110_011_111_sss_sss (s is not equal to 63)  [BEQ.S <label>]
  2386:             //JBNNZ.S <label>                                 |A|--2346|-|--*--|-----|          |0110_011_111_sss_sss (s is not equal to 63)  [BEQ.S <label>]
  2387:             //JBZE.S <label>                                  |A|--2346|-|--*--|-----|          |0110_011_111_sss_sss (s is not equal to 63)  [BEQ.S <label>]
  2388:             //BEQ.L <label>                                   |-|--2346|-|--*--|-----|          |0110_011_111_111_111-{offset}
  2389:             //BNNE.L <label>                                  |A|--2346|-|--*--|-----|          |0110_011_111_111_111-{offset}        [BEQ.L <label>]
  2390:             //BNNZ.L <label>                                  |A|--2346|-|--*--|-----|          |0110_011_111_111_111-{offset}        [BEQ.L <label>]
  2391:             //BZE.L <label>                                   |A|--2346|-|--*--|-----|          |0110_011_111_111_111-{offset}        [BEQ.L <label>]
  2392:           case 0b0110_011_111:
  2393:             irpBeqsl ();
  2394:             break irpSwitch;
  2395: 
  2396:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2397:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2398:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2399:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2400:             //BVC.W <label>                                   |-|012346|-|---*-|-----|          |0110_100_000_000_000-{offset}
  2401:             //BNVS.W <label>                                  |A|012346|-|---*-|-----|          |0110_100_000_000_000-{offset}        [BVC.W <label>]
  2402:             //JBNVS.W <label>                                 |A|012346|-|---*-|-----|          |0110_100_000_000_000-{offset}        [BVC.W <label>]
  2403:             //JBVC.W <label>                                  |A|012346|-|---*-|-----|          |0110_100_000_000_000-{offset}        [BVC.W <label>]
  2404:             //BVC.S <label>                                   |-|012346|-|---*-|-----|          |0110_100_000_sss_sss (s is not equal to 0)
  2405:             //BNVS.S <label>                                  |A|012346|-|---*-|-----|          |0110_100_000_sss_sss (s is not equal to 0)   [BVC.S <label>]
  2406:             //JBNVS.S <label>                                 |A|012346|-|---*-|-----|          |0110_100_000_sss_sss (s is not equal to 0)   [BVC.S <label>]
  2407:             //JBVC.S <label>                                  |A|012346|-|---*-|-----|          |0110_100_000_sss_sss (s is not equal to 0)   [BVC.S <label>]
  2408:             //JBNVC.L <label>                                 |A|012346|-|---*-|-----|          |0110_100_000_000_110-0100111011111001-{address}      [BVC.S (*)+8;JMP <label>]
  2409:             //JBVS.L <label>                                  |A|012346|-|---*-|-----|          |0110_100_000_000_110-0100111011111001-{address}      [BVC.S (*)+8;JMP <label>]
  2410:           case 0b0110_100_000:
  2411:             irpBvcsw ();
  2412:             break irpSwitch;
  2413: 
  2414:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2415:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2416:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2417:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2418:             //BVC.S <label>                                   |-|012346|-|---*-|-----|          |0110_100_001_sss_sss
  2419:             //BNVS.S <label>                                  |A|012346|-|---*-|-----|          |0110_100_001_sss_sss [BVC.S <label>]
  2420:             //JBNVS.S <label>                                 |A|012346|-|---*-|-----|          |0110_100_001_sss_sss [BVC.S <label>]
  2421:             //JBVC.S <label>                                  |A|012346|-|---*-|-----|          |0110_100_001_sss_sss [BVC.S <label>]
  2422:           case 0b0110_100_001:
  2423:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2424:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2425:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2426:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2427:             //BVC.S <label>                                   |-|012346|-|---*-|-----|          |0110_100_010_sss_sss
  2428:             //BNVS.S <label>                                  |A|012346|-|---*-|-----|          |0110_100_010_sss_sss [BVC.S <label>]
  2429:             //JBNVS.S <label>                                 |A|012346|-|---*-|-----|          |0110_100_010_sss_sss [BVC.S <label>]
  2430:             //JBVC.S <label>                                  |A|012346|-|---*-|-----|          |0110_100_010_sss_sss [BVC.S <label>]
  2431:           case 0b0110_100_010:
  2432:             irpBvcs ();
  2433:             break irpSwitch;
  2434: 
  2435:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2436:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2437:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2438:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2439:             //BVC.S <label>                                   |-|--2346|-|---*-|-----|          |0110_100_011_sss_sss (s is not equal to 63)
  2440:             //BNVS.S <label>                                  |A|--2346|-|---*-|-----|          |0110_100_011_sss_sss (s is not equal to 63)  [BVC.S <label>]
  2441:             //JBNVS.S <label>                                 |A|--2346|-|---*-|-----|          |0110_100_011_sss_sss (s is not equal to 63)  [BVC.S <label>]
  2442:             //JBVC.S <label>                                  |A|--2346|-|---*-|-----|          |0110_100_011_sss_sss (s is not equal to 63)  [BVC.S <label>]
  2443:             //BVC.L <label>                                   |-|--2346|-|---*-|-----|          |0110_100_011_111_111-{offset}
  2444:             //BNVS.L <label>                                  |A|--2346|-|---*-|-----|          |0110_100_011_111_111-{offset}        [BVC.L <label>]
  2445:           case 0b0110_100_011:
  2446:             irpBvcsl ();
  2447:             break irpSwitch;
  2448: 
  2449:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2450:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2451:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2452:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2453:             //BVS.W <label>                                   |-|012346|-|---*-|-----|          |0110_100_100_000_000-{offset}
  2454:             //BNVC.W <label>                                  |A|012346|-|---*-|-----|          |0110_100_100_000_000-{offset}        [BVS.W <label>]
  2455:             //JBNVC.W <label>                                 |A|012346|-|---*-|-----|          |0110_100_100_000_000-{offset}        [BVS.W <label>]
  2456:             //JBVS.W <label>                                  |A|012346|-|---*-|-----|          |0110_100_100_000_000-{offset}        [BVS.W <label>]
  2457:             //BVS.S <label>                                   |-|012346|-|---*-|-----|          |0110_100_100_sss_sss (s is not equal to 0)
  2458:             //BNVC.S <label>                                  |A|012346|-|---*-|-----|          |0110_100_100_sss_sss (s is not equal to 0)   [BVS.S <label>]
  2459:             //JBNVC.S <label>                                 |A|012346|-|---*-|-----|          |0110_100_100_sss_sss (s is not equal to 0)   [BVS.S <label>]
  2460:             //JBVS.S <label>                                  |A|012346|-|---*-|-----|          |0110_100_100_sss_sss (s is not equal to 0)   [BVS.S <label>]
  2461:             //JBNVS.L <label>                                 |A|012346|-|---*-|-----|          |0110_100_100_000_110-0100111011111001-{address}      [BVS.S (*)+8;JMP <label>]
  2462:             //JBVC.L <label>                                  |A|012346|-|---*-|-----|          |0110_100_100_000_110-0100111011111001-{address}      [BVS.S (*)+8;JMP <label>]
  2463:           case 0b0110_100_100:
  2464:             irpBvssw ();
  2465:             break irpSwitch;
  2466: 
  2467:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2468:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2469:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2470:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2471:             //BVS.S <label>                                   |-|012346|-|---*-|-----|          |0110_100_101_sss_sss
  2472:             //BNVC.S <label>                                  |A|012346|-|---*-|-----|          |0110_100_101_sss_sss [BVS.S <label>]
  2473:             //JBNVC.S <label>                                 |A|012346|-|---*-|-----|          |0110_100_101_sss_sss [BVS.S <label>]
  2474:             //JBVS.S <label>                                  |A|012346|-|---*-|-----|          |0110_100_101_sss_sss [BVS.S <label>]
  2475:           case 0b0110_100_101:
  2476:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2477:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2478:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2479:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2480:             //BVS.S <label>                                   |-|012346|-|---*-|-----|          |0110_100_110_sss_sss
  2481:             //BNVC.S <label>                                  |A|012346|-|---*-|-----|          |0110_100_110_sss_sss [BVS.S <label>]
  2482:             //JBNVC.S <label>                                 |A|012346|-|---*-|-----|          |0110_100_110_sss_sss [BVS.S <label>]
  2483:             //JBVS.S <label>                                  |A|012346|-|---*-|-----|          |0110_100_110_sss_sss [BVS.S <label>]
  2484:           case 0b0110_100_110:
  2485:             irpBvss ();
  2486:             break irpSwitch;
  2487: 
  2488:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2489:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2490:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2491:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2492:             //BVS.S <label>                                   |-|--2346|-|---*-|-----|          |0110_100_111_sss_sss (s is not equal to 63)
  2493:             //BNVC.S <label>                                  |A|--2346|-|---*-|-----|          |0110_100_111_sss_sss (s is not equal to 63)  [BVS.S <label>]
  2494:             //JBNVC.S <label>                                 |A|--2346|-|---*-|-----|          |0110_100_111_sss_sss (s is not equal to 63)  [BVS.S <label>]
  2495:             //JBVS.S <label>                                  |A|--2346|-|---*-|-----|          |0110_100_111_sss_sss (s is not equal to 63)  [BVS.S <label>]
  2496:             //BVS.L <label>                                   |-|--2346|-|---*-|-----|          |0110_100_111_111_111-{offset}
  2497:             //BNVC.L <label>                                  |A|--2346|-|---*-|-----|          |0110_100_111_111_111-{offset}        [BVS.L <label>]
  2498:           case 0b0110_100_111:
  2499:             irpBvssl ();
  2500:             break irpSwitch;
  2501: 
  2502:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2503:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2504:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2505:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2506:             //BPL.W <label>                                   |-|012346|-|-*---|-----|          |0110_101_000_000_000-{offset}
  2507:             //BNMI.W <label>                                  |A|012346|-|-*---|-----|          |0110_101_000_000_000-{offset}        [BPL.W <label>]
  2508:             //JBNMI.W <label>                                 |A|012346|-|-*---|-----|          |0110_101_000_000_000-{offset}        [BPL.W <label>]
  2509:             //JBPL.W <label>                                  |A|012346|-|-*---|-----|          |0110_101_000_000_000-{offset}        [BPL.W <label>]
  2510:             //BPL.S <label>                                   |-|012346|-|-*---|-----|          |0110_101_000_sss_sss (s is not equal to 0)
  2511:             //BNMI.S <label>                                  |A|012346|-|-*---|-----|          |0110_101_000_sss_sss (s is not equal to 0)   [BPL.S <label>]
  2512:             //JBNMI.S <label>                                 |A|012346|-|-*---|-----|          |0110_101_000_sss_sss (s is not equal to 0)   [BPL.S <label>]
  2513:             //JBPL.S <label>                                  |A|012346|-|-*---|-----|          |0110_101_000_sss_sss (s is not equal to 0)   [BPL.S <label>]
  2514:             //JBMI.L <label>                                  |A|012346|-|-*---|-----|          |0110_101_000_000_110-0100111011111001-{address}      [BPL.S (*)+8;JMP <label>]
  2515:             //JBNPL.L <label>                                 |A|012346|-|-*---|-----|          |0110_101_000_000_110-0100111011111001-{address}      [BPL.S (*)+8;JMP <label>]
  2516:           case 0b0110_101_000:
  2517:             irpBplsw ();
  2518:             break irpSwitch;
  2519: 
  2520:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2521:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2522:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2523:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2524:             //BPL.S <label>                                   |-|012346|-|-*---|-----|          |0110_101_001_sss_sss
  2525:             //BNMI.S <label>                                  |A|012346|-|-*---|-----|          |0110_101_001_sss_sss [BPL.S <label>]
  2526:             //JBNMI.S <label>                                 |A|012346|-|-*---|-----|          |0110_101_001_sss_sss [BPL.S <label>]
  2527:             //JBPL.S <label>                                  |A|012346|-|-*---|-----|          |0110_101_001_sss_sss [BPL.S <label>]
  2528:           case 0b0110_101_001:
  2529:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2530:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2531:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2532:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2533:             //BPL.S <label>                                   |-|012346|-|-*---|-----|          |0110_101_010_sss_sss
  2534:             //BNMI.S <label>                                  |A|012346|-|-*---|-----|          |0110_101_010_sss_sss [BPL.S <label>]
  2535:             //JBNMI.S <label>                                 |A|012346|-|-*---|-----|          |0110_101_010_sss_sss [BPL.S <label>]
  2536:             //JBPL.S <label>                                  |A|012346|-|-*---|-----|          |0110_101_010_sss_sss [BPL.S <label>]
  2537:           case 0b0110_101_010:
  2538:             irpBpls ();
  2539:             break irpSwitch;
  2540: 
  2541:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2542:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2543:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2544:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2545:             //BPL.S <label>                                   |-|--2346|-|-*---|-----|          |0110_101_011_sss_sss (s is not equal to 63)
  2546:             //BNMI.S <label>                                  |A|--2346|-|-*---|-----|          |0110_101_011_sss_sss (s is not equal to 63)  [BPL.S <label>]
  2547:             //JBNMI.S <label>                                 |A|--2346|-|-*---|-----|          |0110_101_011_sss_sss (s is not equal to 63)  [BPL.S <label>]
  2548:             //JBPL.S <label>                                  |A|--2346|-|-*---|-----|          |0110_101_011_sss_sss (s is not equal to 63)  [BPL.S <label>]
  2549:             //BPL.L <label>                                   |-|--2346|-|-*---|-----|          |0110_101_011_111_111-{offset}
  2550:             //BNMI.L <label>                                  |A|--2346|-|-*---|-----|          |0110_101_011_111_111-{offset}        [BPL.L <label>]
  2551:           case 0b0110_101_011:
  2552:             irpBplsl ();
  2553:             break irpSwitch;
  2554: 
  2555:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2556:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2557:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2558:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2559:             //BMI.W <label>                                   |-|012346|-|-*---|-----|          |0110_101_100_000_000-{offset}
  2560:             //BNPL.W <label>                                  |A|012346|-|-*---|-----|          |0110_101_100_000_000-{offset}        [BMI.W <label>]
  2561:             //JBMI.W <label>                                  |A|012346|-|-*---|-----|          |0110_101_100_000_000-{offset}        [BMI.W <label>]
  2562:             //JBNPL.W <label>                                 |A|012346|-|-*---|-----|          |0110_101_100_000_000-{offset}        [BMI.W <label>]
  2563:             //BMI.S <label>                                   |-|012346|-|-*---|-----|          |0110_101_100_sss_sss (s is not equal to 0)
  2564:             //BNPL.S <label>                                  |A|012346|-|-*---|-----|          |0110_101_100_sss_sss (s is not equal to 0)   [BMI.S <label>]
  2565:             //JBMI.S <label>                                  |A|012346|-|-*---|-----|          |0110_101_100_sss_sss (s is not equal to 0)   [BMI.S <label>]
  2566:             //JBNPL.S <label>                                 |A|012346|-|-*---|-----|          |0110_101_100_sss_sss (s is not equal to 0)   [BMI.S <label>]
  2567:             //JBNMI.L <label>                                 |A|012346|-|-*---|-----|          |0110_101_100_000_110-0100111011111001-{address}      [BMI.S (*)+8;JMP <label>]
  2568:             //JBPL.L <label>                                  |A|012346|-|-*---|-----|          |0110_101_100_000_110-0100111011111001-{address}      [BMI.S (*)+8;JMP <label>]
  2569:           case 0b0110_101_100:
  2570:             irpBmisw ();
  2571:             break irpSwitch;
  2572: 
  2573:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2574:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2575:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2576:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2577:             //BMI.S <label>                                   |-|012346|-|-*---|-----|          |0110_101_101_sss_sss
  2578:             //BNPL.S <label>                                  |A|012346|-|-*---|-----|          |0110_101_101_sss_sss [BMI.S <label>]
  2579:             //JBMI.S <label>                                  |A|012346|-|-*---|-----|          |0110_101_101_sss_sss [BMI.S <label>]
  2580:             //JBNPL.S <label>                                 |A|012346|-|-*---|-----|          |0110_101_101_sss_sss [BMI.S <label>]
  2581:           case 0b0110_101_101:
  2582:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2583:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2584:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2585:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2586:             //BMI.S <label>                                   |-|012346|-|-*---|-----|          |0110_101_110_sss_sss
  2587:             //BNPL.S <label>                                  |A|012346|-|-*---|-----|          |0110_101_110_sss_sss [BMI.S <label>]
  2588:             //JBMI.S <label>                                  |A|012346|-|-*---|-----|          |0110_101_110_sss_sss [BMI.S <label>]
  2589:             //JBNPL.S <label>                                 |A|012346|-|-*---|-----|          |0110_101_110_sss_sss [BMI.S <label>]
  2590:           case 0b0110_101_110:
  2591:             irpBmis ();
  2592:             break irpSwitch;
  2593: 
  2594:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2595:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2596:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2597:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2598:             //BMI.S <label>                                   |-|--2346|-|-*---|-----|          |0110_101_111_sss_sss (s is not equal to 63)
  2599:             //BNPL.S <label>                                  |A|--2346|-|-*---|-----|          |0110_101_111_sss_sss (s is not equal to 63)  [BMI.S <label>]
  2600:             //JBMI.S <label>                                  |A|--2346|-|-*---|-----|          |0110_101_111_sss_sss (s is not equal to 63)  [BMI.S <label>]
  2601:             //JBNPL.S <label>                                 |A|--2346|-|-*---|-----|          |0110_101_111_sss_sss (s is not equal to 63)  [BMI.S <label>]
  2602:             //BMI.L <label>                                   |-|--2346|-|-*---|-----|          |0110_101_111_111_111-{offset}
  2603:             //BNPL.L <label>                                  |A|--2346|-|-*---|-----|          |0110_101_111_111_111-{offset}        [BMI.L <label>]
  2604:           case 0b0110_101_111:
  2605:             irpBmisl ();
  2606:             break irpSwitch;
  2607: 
  2608:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2609:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2610:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2611:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2612:             //BGE.W <label>                                   |-|012346|-|-*-*-|-----|          |0110_110_000_000_000-{offset}
  2613:             //BNLT.W <label>                                  |A|012346|-|-*-*-|-----|          |0110_110_000_000_000-{offset}        [BGE.W <label>]
  2614:             //JBGE.W <label>                                  |A|012346|-|-*-*-|-----|          |0110_110_000_000_000-{offset}        [BGE.W <label>]
  2615:             //JBNLT.W <label>                                 |A|012346|-|-*-*-|-----|          |0110_110_000_000_000-{offset}        [BGE.W <label>]
  2616:             //BGE.S <label>                                   |-|012346|-|-*-*-|-----|          |0110_110_000_sss_sss (s is not equal to 0)
  2617:             //BNLT.S <label>                                  |A|012346|-|-*-*-|-----|          |0110_110_000_sss_sss (s is not equal to 0)   [BGE.S <label>]
  2618:             //JBGE.S <label>                                  |A|012346|-|-*-*-|-----|          |0110_110_000_sss_sss (s is not equal to 0)   [BGE.S <label>]
  2619:             //JBNLT.S <label>                                 |A|012346|-|-*-*-|-----|          |0110_110_000_sss_sss (s is not equal to 0)   [BGE.S <label>]
  2620:             //JBLT.L <label>                                  |A|012346|-|-*-*-|-----|          |0110_110_000_000_110-0100111011111001-{address}      [BGE.S (*)+8;JMP <label>]
  2621:             //JBNGE.L <label>                                 |A|012346|-|-*-*-|-----|          |0110_110_000_000_110-0100111011111001-{address}      [BGE.S (*)+8;JMP <label>]
  2622:           case 0b0110_110_000:
  2623:             irpBgesw ();
  2624:             break irpSwitch;
  2625: 
  2626:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2627:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2628:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2629:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2630:             //BGE.S <label>                                   |-|012346|-|-*-*-|-----|          |0110_110_001_sss_sss
  2631:             //BNLT.S <label>                                  |A|012346|-|-*-*-|-----|          |0110_110_001_sss_sss [BGE.S <label>]
  2632:             //JBGE.S <label>                                  |A|012346|-|-*-*-|-----|          |0110_110_001_sss_sss [BGE.S <label>]
  2633:             //JBNLT.S <label>                                 |A|012346|-|-*-*-|-----|          |0110_110_001_sss_sss [BGE.S <label>]
  2634:           case 0b0110_110_001:
  2635:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2636:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2637:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2638:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2639:             //BGE.S <label>                                   |-|012346|-|-*-*-|-----|          |0110_110_010_sss_sss
  2640:             //BNLT.S <label>                                  |A|012346|-|-*-*-|-----|          |0110_110_010_sss_sss [BGE.S <label>]
  2641:             //JBGE.S <label>                                  |A|012346|-|-*-*-|-----|          |0110_110_010_sss_sss [BGE.S <label>]
  2642:             //JBNLT.S <label>                                 |A|012346|-|-*-*-|-----|          |0110_110_010_sss_sss [BGE.S <label>]
  2643:           case 0b0110_110_010:
  2644:             irpBges ();
  2645:             break irpSwitch;
  2646: 
  2647:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2648:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2649:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2650:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2651:             //BGE.S <label>                                   |-|--2346|-|-*-*-|-----|          |0110_110_011_sss_sss (s is not equal to 63)
  2652:             //BNLT.S <label>                                  |A|--2346|-|-*-*-|-----|          |0110_110_011_sss_sss (s is not equal to 63)  [BGE.S <label>]
  2653:             //JBGE.S <label>                                  |A|--2346|-|-*-*-|-----|          |0110_110_011_sss_sss (s is not equal to 63)  [BGE.S <label>]
  2654:             //JBNLT.S <label>                                 |A|--2346|-|-*-*-|-----|          |0110_110_011_sss_sss (s is not equal to 63)  [BGE.S <label>]
  2655:             //BGE.L <label>                                   |-|--2346|-|-*-*-|-----|          |0110_110_011_111_111-{offset}
  2656:             //BNLT.L <label>                                  |A|--2346|-|-*-*-|-----|          |0110_110_011_111_111-{offset}        [BGE.L <label>]
  2657:           case 0b0110_110_011:
  2658:             irpBgesl ();
  2659:             break irpSwitch;
  2660: 
  2661:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2662:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2663:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2664:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2665:             //BLT.W <label>                                   |-|012346|-|-*-*-|-----|          |0110_110_100_000_000-{offset}
  2666:             //BNGE.W <label>                                  |A|012346|-|-*-*-|-----|          |0110_110_100_000_000-{offset}        [BLT.W <label>]
  2667:             //JBLT.W <label>                                  |A|012346|-|-*-*-|-----|          |0110_110_100_000_000-{offset}        [BLT.W <label>]
  2668:             //JBNGE.W <label>                                 |A|012346|-|-*-*-|-----|          |0110_110_100_000_000-{offset}        [BLT.W <label>]
  2669:             //BLT.S <label>                                   |-|012346|-|-*-*-|-----|          |0110_110_100_sss_sss (s is not equal to 0)
  2670:             //BNGE.S <label>                                  |A|012346|-|-*-*-|-----|          |0110_110_100_sss_sss (s is not equal to 0)   [BLT.S <label>]
  2671:             //JBLT.S <label>                                  |A|012346|-|-*-*-|-----|          |0110_110_100_sss_sss (s is not equal to 0)   [BLT.S <label>]
  2672:             //JBNGE.S <label>                                 |A|012346|-|-*-*-|-----|          |0110_110_100_sss_sss (s is not equal to 0)   [BLT.S <label>]
  2673:             //JBGE.L <label>                                  |A|012346|-|-*-*-|-----|          |0110_110_100_000_110-0100111011111001-{address}      [BLT.S (*)+8;JMP <label>]
  2674:             //JBNLT.L <label>                                 |A|012346|-|-*-*-|-----|          |0110_110_100_000_110-0100111011111001-{address}      [BLT.S (*)+8;JMP <label>]
  2675:           case 0b0110_110_100:
  2676:             irpBltsw ();
  2677:             break irpSwitch;
  2678: 
  2679:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2680:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2681:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2682:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2683:             //BLT.S <label>                                   |-|012346|-|-*-*-|-----|          |0110_110_101_sss_sss
  2684:             //BNGE.S <label>                                  |A|012346|-|-*-*-|-----|          |0110_110_101_sss_sss [BLT.S <label>]
  2685:             //JBLT.S <label>                                  |A|012346|-|-*-*-|-----|          |0110_110_101_sss_sss [BLT.S <label>]
  2686:             //JBNGE.S <label>                                 |A|012346|-|-*-*-|-----|          |0110_110_101_sss_sss [BLT.S <label>]
  2687:           case 0b0110_110_101:
  2688:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2689:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2690:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2691:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2692:             //BLT.S <label>                                   |-|012346|-|-*-*-|-----|          |0110_110_110_sss_sss
  2693:             //BNGE.S <label>                                  |A|012346|-|-*-*-|-----|          |0110_110_110_sss_sss [BLT.S <label>]
  2694:             //JBLT.S <label>                                  |A|012346|-|-*-*-|-----|          |0110_110_110_sss_sss [BLT.S <label>]
  2695:             //JBNGE.S <label>                                 |A|012346|-|-*-*-|-----|          |0110_110_110_sss_sss [BLT.S <label>]
  2696:           case 0b0110_110_110:
  2697:             irpBlts ();
  2698:             break irpSwitch;
  2699: 
  2700:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2701:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2702:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2703:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2704:             //BLT.S <label>                                   |-|--2346|-|-*-*-|-----|          |0110_110_111_sss_sss (s is not equal to 63)
  2705:             //BNGE.S <label>                                  |A|--2346|-|-*-*-|-----|          |0110_110_111_sss_sss (s is not equal to 63)  [BLT.S <label>]
  2706:             //JBLT.S <label>                                  |A|--2346|-|-*-*-|-----|          |0110_110_111_sss_sss (s is not equal to 63)  [BLT.S <label>]
  2707:             //JBNGE.S <label>                                 |A|--2346|-|-*-*-|-----|          |0110_110_111_sss_sss (s is not equal to 63)  [BLT.S <label>]
  2708:             //BLT.L <label>                                   |-|--2346|-|-*-*-|-----|          |0110_110_111_111_111-{offset}
  2709:             //BNGE.L <label>                                  |A|--2346|-|-*-*-|-----|          |0110_110_111_111_111-{offset}        [BLT.L <label>]
  2710:           case 0b0110_110_111:
  2711:             irpBltsl ();
  2712:             break irpSwitch;
  2713: 
  2714:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2715:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2716:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2717:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2718:             //BGT.W <label>                                   |-|012346|-|-***-|-----|          |0110_111_000_000_000-{offset}
  2719:             //BNLE.W <label>                                  |A|012346|-|-***-|-----|          |0110_111_000_000_000-{offset}        [BGT.W <label>]
  2720:             //JBGT.W <label>                                  |A|012346|-|-***-|-----|          |0110_111_000_000_000-{offset}        [BGT.W <label>]
  2721:             //JBNLE.W <label>                                 |A|012346|-|-***-|-----|          |0110_111_000_000_000-{offset}        [BGT.W <label>]
  2722:             //BGT.S <label>                                   |-|012346|-|-***-|-----|          |0110_111_000_sss_sss (s is not equal to 0)
  2723:             //BNLE.S <label>                                  |A|012346|-|-***-|-----|          |0110_111_000_sss_sss (s is not equal to 0)   [BGT.S <label>]
  2724:             //JBGT.S <label>                                  |A|012346|-|-***-|-----|          |0110_111_000_sss_sss (s is not equal to 0)   [BGT.S <label>]
  2725:             //JBNLE.S <label>                                 |A|012346|-|-***-|-----|          |0110_111_000_sss_sss (s is not equal to 0)   [BGT.S <label>]
  2726:             //JBLE.L <label>                                  |A|012346|-|-***-|-----|          |0110_111_000_000_110-0100111011111001-{address}      [BGT.S (*)+8;JMP <label>]
  2727:             //JBNGT.L <label>                                 |A|012346|-|-***-|-----|          |0110_111_000_000_110-0100111011111001-{address}      [BGT.S (*)+8;JMP <label>]
  2728:           case 0b0110_111_000:
  2729:             irpBgtsw ();
  2730:             break irpSwitch;
  2731: 
  2732:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2733:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2734:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2735:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2736:             //BGT.S <label>                                   |-|012346|-|-***-|-----|          |0110_111_001_sss_sss
  2737:             //BNLE.S <label>                                  |A|012346|-|-***-|-----|          |0110_111_001_sss_sss [BGT.S <label>]
  2738:             //JBGT.S <label>                                  |A|012346|-|-***-|-----|          |0110_111_001_sss_sss [BGT.S <label>]
  2739:             //JBNLE.S <label>                                 |A|012346|-|-***-|-----|          |0110_111_001_sss_sss [BGT.S <label>]
  2740:           case 0b0110_111_001:
  2741:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2742:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2743:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2744:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2745:             //BGT.S <label>                                   |-|012346|-|-***-|-----|          |0110_111_010_sss_sss
  2746:             //BNLE.S <label>                                  |A|012346|-|-***-|-----|          |0110_111_010_sss_sss [BGT.S <label>]
  2747:             //JBGT.S <label>                                  |A|012346|-|-***-|-----|          |0110_111_010_sss_sss [BGT.S <label>]
  2748:             //JBNLE.S <label>                                 |A|012346|-|-***-|-----|          |0110_111_010_sss_sss [BGT.S <label>]
  2749:           case 0b0110_111_010:
  2750:             irpBgts ();
  2751:             break irpSwitch;
  2752: 
  2753:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2754:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2755:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2756:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2757:             //BGT.S <label>                                   |-|--2346|-|-***-|-----|          |0110_111_011_sss_sss (s is not equal to 63)
  2758:             //BNLE.S <label>                                  |A|--2346|-|-***-|-----|          |0110_111_011_sss_sss (s is not equal to 63)  [BGT.S <label>]
  2759:             //JBGT.S <label>                                  |A|--2346|-|-***-|-----|          |0110_111_011_sss_sss (s is not equal to 63)  [BGT.S <label>]
  2760:             //JBNLE.S <label>                                 |A|--2346|-|-***-|-----|          |0110_111_011_sss_sss (s is not equal to 63)  [BGT.S <label>]
  2761:             //BGT.L <label>                                   |-|--2346|-|-***-|-----|          |0110_111_011_111_111-{offset}
  2762:             //BNLE.L <label>                                  |A|--2346|-|-***-|-----|          |0110_111_011_111_111-{offset}        [BGT.L <label>]
  2763:           case 0b0110_111_011:
  2764:             irpBgtsl ();
  2765:             break irpSwitch;
  2766: 
  2767:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2768:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2769:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2770:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2771:             //BLE.W <label>                                   |-|012346|-|-***-|-----|          |0110_111_100_000_000-{offset}
  2772:             //BNGT.W <label>                                  |A|012346|-|-***-|-----|          |0110_111_100_000_000-{offset}        [BLE.W <label>]
  2773:             //JBLE.W <label>                                  |A|012346|-|-***-|-----|          |0110_111_100_000_000-{offset}        [BLE.W <label>]
  2774:             //JBNGT.W <label>                                 |A|012346|-|-***-|-----|          |0110_111_100_000_000-{offset}        [BLE.W <label>]
  2775:             //BLE.S <label>                                   |-|012346|-|-***-|-----|          |0110_111_100_sss_sss (s is not equal to 0)
  2776:             //BNGT.S <label>                                  |A|012346|-|-***-|-----|          |0110_111_100_sss_sss (s is not equal to 0)   [BLE.S <label>]
  2777:             //JBLE.S <label>                                  |A|012346|-|-***-|-----|          |0110_111_100_sss_sss (s is not equal to 0)   [BLE.S <label>]
  2778:             //JBNGT.S <label>                                 |A|012346|-|-***-|-----|          |0110_111_100_sss_sss (s is not equal to 0)   [BLE.S <label>]
  2779:             //JBGT.L <label>                                  |A|012346|-|-***-|-----|          |0110_111_100_000_110-0100111011111001-{address}      [BLE.S (*)+8;JMP <label>]
  2780:             //JBNLE.L <label>                                 |A|012346|-|-***-|-----|          |0110_111_100_000_110-0100111011111001-{address}      [BLE.S (*)+8;JMP <label>]
  2781:           case 0b0110_111_100:
  2782:             irpBlesw ();
  2783:             break irpSwitch;
  2784: 
  2785:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2786:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2787:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2788:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2789:             //BLE.S <label>                                   |-|012346|-|-***-|-----|          |0110_111_101_sss_sss
  2790:             //BNGT.S <label>                                  |A|012346|-|-***-|-----|          |0110_111_101_sss_sss [BLE.S <label>]
  2791:             //JBLE.S <label>                                  |A|012346|-|-***-|-----|          |0110_111_101_sss_sss [BLE.S <label>]
  2792:             //JBNGT.S <label>                                 |A|012346|-|-***-|-----|          |0110_111_101_sss_sss [BLE.S <label>]
  2793:           case 0b0110_111_101:
  2794:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2795:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2796:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2797:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2798:             //BLE.S <label>                                   |-|012346|-|-***-|-----|          |0110_111_110_sss_sss
  2799:             //BNGT.S <label>                                  |A|012346|-|-***-|-----|          |0110_111_110_sss_sss [BLE.S <label>]
  2800:             //JBLE.S <label>                                  |A|012346|-|-***-|-----|          |0110_111_110_sss_sss [BLE.S <label>]
  2801:             //JBNGT.S <label>                                 |A|012346|-|-***-|-----|          |0110_111_110_sss_sss [BLE.S <label>]
  2802:           case 0b0110_111_110:
  2803:             irpBles ();
  2804:             break irpSwitch;
  2805: 
  2806:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2807:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2808:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2809:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2810:             //BLE.S <label>                                   |-|--2346|-|-***-|-----|          |0110_111_111_sss_sss (s is not equal to 63)
  2811:             //BNGT.S <label>                                  |A|--2346|-|-***-|-----|          |0110_111_111_sss_sss (s is not equal to 63)  [BLE.S <label>]
  2812:             //JBLE.S <label>                                  |A|--2346|-|-***-|-----|          |0110_111_111_sss_sss (s is not equal to 63)  [BLE.S <label>]
  2813:             //JBNGT.S <label>                                 |A|--2346|-|-***-|-----|          |0110_111_111_sss_sss (s is not equal to 63)  [BLE.S <label>]
  2814:             //BLE.L <label>                                   |-|--2346|-|-***-|-----|          |0110_111_111_111_111-{offset}
  2815:             //BNGT.L <label>                                  |A|--2346|-|-***-|-----|          |0110_111_111_111_111-{offset}        [BLE.L <label>]
  2816:           case 0b0110_111_111:
  2817:             irpBlesl ();
  2818:             break irpSwitch;
  2819: 
  2820:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2821:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2822:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2823:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2824:             //IOCS <name>                                     |A|012346|-|UUUUU|UUUUU|          |0111_000_0dd_ddd_ddd-0100111001001111        [MOVEQ.L #<data>,D0;TRAP #15]
  2825:             //MOVEQ.L #<data>,Dq                              |-|012346|-|-UUUU|-**00|          |0111_qqq_0dd_ddd_ddd
  2826:           case 0b0111_000_000:
  2827:           case 0b0111_000_001:
  2828:           case 0b0111_000_010:
  2829:           case 0b0111_000_011:
  2830:           case 0b0111_001_000:
  2831:           case 0b0111_001_001:
  2832:           case 0b0111_001_010:
  2833:           case 0b0111_001_011:
  2834:           case 0b0111_010_000:
  2835:           case 0b0111_010_001:
  2836:           case 0b0111_010_010:
  2837:           case 0b0111_010_011:
  2838:           case 0b0111_011_000:
  2839:           case 0b0111_011_001:
  2840:           case 0b0111_011_010:
  2841:           case 0b0111_011_011:
  2842:           case 0b0111_100_000:
  2843:           case 0b0111_100_001:
  2844:           case 0b0111_100_010:
  2845:           case 0b0111_100_011:
  2846:           case 0b0111_101_000:
  2847:           case 0b0111_101_001:
  2848:           case 0b0111_101_010:
  2849:           case 0b0111_101_011:
  2850:           case 0b0111_110_000:
  2851:           case 0b0111_110_001:
  2852:           case 0b0111_110_010:
  2853:           case 0b0111_110_011:
  2854:           case 0b0111_111_000:
  2855:           case 0b0111_111_001:
  2856:           case 0b0111_111_010:
  2857:           case 0b0111_111_011:
  2858:             irpMoveq ();
  2859:             break irpSwitch;
  2860: 
  2861:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2862:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2863:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2864:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2865:             //MVS.B <ea>,Dq                                   |-|------|-|-UUUU|-**00|D M+-WXZPI|0111_qqq_100_mmm_rrr (ISA_B)
  2866:           case 0b0111_000_100:
  2867:           case 0b0111_001_100:
  2868:           case 0b0111_010_100:
  2869:           case 0b0111_011_100:
  2870:           case 0b0111_100_100:
  2871:           case 0b0111_101_100:
  2872:           case 0b0111_110_100:
  2873:           case 0b0111_111_100:
  2874:             irpMvsByte ();
  2875:             break irpSwitch;
  2876: 
  2877:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2878:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2879:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2880:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2881:             //MVS.W <ea>,Dq                                   |-|------|-|-UUUU|-**00|D M+-WXZPI|0111_qqq_101_mmm_rrr (ISA_B)
  2882:           case 0b0111_000_101:
  2883:           case 0b0111_001_101:
  2884:           case 0b0111_010_101:
  2885:           case 0b0111_011_101:
  2886:           case 0b0111_100_101:
  2887:           case 0b0111_101_101:
  2888:           case 0b0111_110_101:
  2889:           case 0b0111_111_101:
  2890:             irpMvsWord ();
  2891:             break irpSwitch;
  2892: 
  2893:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2894:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2895:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2896:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2897:             //MVZ.B <ea>,Dq                                   |-|------|-|-UUUU|-0*00|D M+-WXZPI|0111_qqq_110_mmm_rrr (ISA_B)
  2898:           case 0b0111_000_110:
  2899:           case 0b0111_001_110:
  2900:           case 0b0111_010_110:
  2901:           case 0b0111_011_110:
  2902:           case 0b0111_100_110:
  2903:           case 0b0111_101_110:
  2904:           case 0b0111_110_110:
  2905:           case 0b0111_111_110:
  2906:             irpMvzByte ();
  2907:             break irpSwitch;
  2908: 
  2909:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2910:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2911:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2912:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2913:             //MVZ.W <ea>,Dq                                   |-|------|-|-UUUU|-0*00|D M+-WXZPI|0111_qqq_111_mmm_rrr (ISA_B)
  2914:           case 0b0111_000_111:
  2915:           case 0b0111_001_111:
  2916:           case 0b0111_010_111:
  2917:           case 0b0111_011_111:
  2918:           case 0b0111_100_111:
  2919:           case 0b0111_101_111:
  2920:           case 0b0111_110_111:
  2921:           case 0b0111_111_111:
  2922:             irpMvzWord ();
  2923:             break irpSwitch;
  2924: 
  2925:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2926:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2927:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2928:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2929:             //OR.B <ea>,Dq                                    |-|012346|-|-UUUU|-**00|D M+-WXZPI|1000_qqq_000_mmm_rrr
  2930:           case 0b1000_000_000:
  2931:           case 0b1000_001_000:
  2932:           case 0b1000_010_000:
  2933:           case 0b1000_011_000:
  2934:           case 0b1000_100_000:
  2935:           case 0b1000_101_000:
  2936:           case 0b1000_110_000:
  2937:           case 0b1000_111_000:
  2938:             irpOrToRegByte ();
  2939:             break irpSwitch;
  2940: 
  2941:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2942:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2943:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2944:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2945:             //OR.W <ea>,Dq                                    |-|012346|-|-UUUU|-**00|D M+-WXZPI|1000_qqq_001_mmm_rrr
  2946:           case 0b1000_000_001:
  2947:           case 0b1000_001_001:
  2948:           case 0b1000_010_001:
  2949:           case 0b1000_011_001:
  2950:           case 0b1000_100_001:
  2951:           case 0b1000_101_001:
  2952:           case 0b1000_110_001:
  2953:           case 0b1000_111_001:
  2954:             irpOrToRegWord ();
  2955:             break irpSwitch;
  2956: 
  2957:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2958:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2959:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2960:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2961:             //OR.L <ea>,Dq                                    |-|012346|-|-UUUU|-**00|D M+-WXZPI|1000_qqq_010_mmm_rrr
  2962:           case 0b1000_000_010:
  2963:           case 0b1000_001_010:
  2964:           case 0b1000_010_010:
  2965:           case 0b1000_011_010:
  2966:           case 0b1000_100_010:
  2967:           case 0b1000_101_010:
  2968:           case 0b1000_110_010:
  2969:           case 0b1000_111_010:
  2970:             irpOrToRegLong ();
  2971:             break irpSwitch;
  2972: 
  2973:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2974:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2975:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2976:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2977:             //DIVU.W <ea>,Dq                                  |-|012346|-|-UUUU|-***0|D M+-WXZPI|1000_qqq_011_mmm_rrr
  2978:           case 0b1000_000_011:
  2979:           case 0b1000_001_011:
  2980:           case 0b1000_010_011:
  2981:           case 0b1000_011_011:
  2982:           case 0b1000_100_011:
  2983:           case 0b1000_101_011:
  2984:           case 0b1000_110_011:
  2985:           case 0b1000_111_011:
  2986:             irpDivuWord ();
  2987:             break irpSwitch;
  2988: 
  2989:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2990:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2991:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2992:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2993:             //SBCD.B Dr,Dq                                    |-|012346|-|UUUUU|*U*U*|          |1000_qqq_100_000_rrr
  2994:             //SBCD.B -(Ar),-(Aq)                              |-|012346|-|UUUUU|*U*U*|          |1000_qqq_100_001_rrr
  2995:             //OR.B Dq,<ea>                                    |-|012346|-|-UUUU|-**00|  M+-WXZ  |1000_qqq_100_mmm_rrr
  2996:           case 0b1000_000_100:
  2997:           case 0b1000_001_100:
  2998:           case 0b1000_010_100:
  2999:           case 0b1000_011_100:
  3000:           case 0b1000_100_100:
  3001:           case 0b1000_101_100:
  3002:           case 0b1000_110_100:
  3003:           case 0b1000_111_100:
  3004:             irpOrToMemByte ();
  3005:             break irpSwitch;
  3006: 
  3007:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3008:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  3009:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  3010:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3011:             //PACK Dr,Dq,#<data>                              |-|--2346|-|-----|-----|          |1000_qqq_101_000_rrr-{data}
  3012:             //PACK -(Ar),-(Aq),#<data>                        |-|--2346|-|-----|-----|          |1000_qqq_101_001_rrr-{data}
  3013:             //OR.W Dq,<ea>                                    |-|012346|-|-UUUU|-**00|  M+-WXZ  |1000_qqq_101_mmm_rrr
  3014:           case 0b1000_000_101:
  3015:           case 0b1000_001_101:
  3016:           case 0b1000_010_101:
  3017:           case 0b1000_011_101:
  3018:           case 0b1000_100_101:
  3019:           case 0b1000_101_101:
  3020:           case 0b1000_110_101:
  3021:           case 0b1000_111_101:
  3022:             irpOrToMemWord ();
  3023:             break irpSwitch;
  3024: 
  3025:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3026:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  3027:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  3028:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3029:             //UNPK Dr,Dq,#<data>                              |-|--2346|-|-----|-----|          |1000_qqq_110_000_rrr-{data}
  3030:             //UNPK -(Ar),-(Aq),#<data>                        |-|--2346|-|-----|-----|          |1000_qqq_110_001_rrr-{data}
  3031:             //OR.L Dq,<ea>                                    |-|012346|-|-UUUU|-**00|  M+-WXZ  |1000_qqq_110_mmm_rrr
  3032:           case 0b1000_000_110:
  3033:           case 0b1000_001_110:
  3034:           case 0b1000_010_110:
  3035:           case 0b1000_011_110:
  3036:           case 0b1000_100_110:
  3037:           case 0b1000_101_110:
  3038:           case 0b1000_110_110:
  3039:           case 0b1000_111_110:
  3040:             irpOrToMemLong ();
  3041:             break irpSwitch;
  3042: 
  3043:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3044:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  3045:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  3046:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3047:             //DIVS.W <ea>,Dq                                  |-|012346|-|-UUUU|-***0|D M+-WXZPI|1000_qqq_111_mmm_rrr
  3048:           case 0b1000_000_111:
  3049:           case 0b1000_001_111:
  3050:           case 0b1000_010_111:
  3051:           case 0b1000_011_111:
  3052:           case 0b1000_100_111:
  3053:           case 0b1000_101_111:
  3054:           case 0b1000_110_111:
  3055:           case 0b1000_111_111:
  3056:             irpDivsWord ();
  3057:             break irpSwitch;
  3058: 
  3059:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3060:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  3061:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  3062:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3063:             //SUB.B <ea>,Dq                                   |-|012346|-|UUUUU|*****|D M+-WXZPI|1001_qqq_000_mmm_rrr
  3064:           case 0b1001_000_000:
  3065:           case 0b1001_001_000:
  3066:           case 0b1001_010_000:
  3067:           case 0b1001_011_000:
  3068:           case 0b1001_100_000:
  3069:           case 0b1001_101_000:
  3070:           case 0b1001_110_000:
  3071:           case 0b1001_111_000:
  3072:             irpSubToRegByte ();
  3073:             break irpSwitch;
  3074: 
  3075:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3076:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  3077:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  3078:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3079:             //SUB.W <ea>,Dq                                   |-|012346|-|UUUUU|*****|DAM+-WXZPI|1001_qqq_001_mmm_rrr
  3080:           case 0b1001_000_001:
  3081:           case 0b1001_001_001:
  3082:           case 0b1001_010_001:
  3083:           case 0b1001_011_001:
  3084:           case 0b1001_100_001:
  3085:           case 0b1001_101_001:
  3086:           case 0b1001_110_001:
  3087:           case 0b1001_111_001:
  3088:             irpSubToRegWord ();
  3089:             break irpSwitch;
  3090: 
  3091:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3092:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  3093:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  3094:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3095:             //SUB.L <ea>,Dq                                   |-|012346|-|UUUUU|*****|DAM+-WXZPI|1001_qqq_010_mmm_rrr
  3096:           case 0b1001_000_010:
  3097:           case 0b1001_001_010:
  3098:           case 0b1001_010_010:
  3099:           case 0b1001_011_010:
  3100:           case 0b1001_100_010:
  3101:           case 0b1001_101_010:
  3102:           case 0b1001_110_010:
  3103:           case 0b1001_111_010:
  3104:             irpSubToRegLong ();
  3105:             break irpSwitch;
  3106: 
  3107:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3108:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  3109:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  3110:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3111:             //SUBA.W <ea>,Aq                                  |-|012346|-|-----|-----|DAM+-WXZPI|1001_qqq_011_mmm_rrr
  3112:             //SUB.W <ea>,Aq                                   |A|012346|-|-----|-----|DAM+-WXZPI|1001_qqq_011_mmm_rrr [SUBA.W <ea>,Aq]
  3113:             //CLR.W Ar                                        |A|012346|-|-----|-----| A        |1001_rrr_011_001_rrr [SUBA.W Ar,Ar]
  3114:           case 0b1001_000_011:
  3115:           case 0b1001_001_011:
  3116:           case 0b1001_010_011:
  3117:           case 0b1001_011_011:
  3118:           case 0b1001_100_011:
  3119:           case 0b1001_101_011:
  3120:           case 0b1001_110_011:
  3121:           case 0b1001_111_011:
  3122:             irpSubaWord ();
  3123:             break irpSwitch;
  3124: 
  3125:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3126:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  3127:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  3128:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3129:             //SUBX.B Dr,Dq                                    |-|012346|-|*UUUU|*****|          |1001_qqq_100_000_rrr
  3130:             //SUBX.B -(Ar),-(Aq)                              |-|012346|-|*UUUU|*****|          |1001_qqq_100_001_rrr
  3131:             //SUB.B Dq,<ea>                                   |-|012346|-|UUUUU|*****|  M+-WXZ  |1001_qqq_100_mmm_rrr
  3132:           case 0b1001_000_100:
  3133:           case 0b1001_001_100:
  3134:           case 0b1001_010_100:
  3135:           case 0b1001_011_100:
  3136:           case 0b1001_100_100:
  3137:           case 0b1001_101_100:
  3138:           case 0b1001_110_100:
  3139:           case 0b1001_111_100:
  3140:             irpSubToMemByte ();
  3141:             break irpSwitch;
  3142: 
  3143:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3144:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  3145:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  3146:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3147:             //SUBX.W Dr,Dq                                    |-|012346|-|*UUUU|*****|          |1001_qqq_101_000_rrr
  3148:             //SUBX.W -(Ar),-(Aq)                              |-|012346|-|*UUUU|*****|          |1001_qqq_101_001_rrr
  3149:             //SUB.W Dq,<ea>                                   |-|012346|-|UUUUU|*****|  M+-WXZ  |1001_qqq_101_mmm_rrr
  3150:           case 0b1001_000_101:
  3151:           case 0b1001_001_101:
  3152:           case 0b1001_010_101:
  3153:           case 0b1001_011_101:
  3154:           case 0b1001_100_101:
  3155:           case 0b1001_101_101:
  3156:           case 0b1001_110_101:
  3157:           case 0b1001_111_101:
  3158:             irpSubToMemWord ();
  3159:             break irpSwitch;
  3160: 
  3161:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3162:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  3163:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  3164:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3165:             //SUBX.L Dr,Dq                                    |-|012346|-|*UUUU|*****|          |1001_qqq_110_000_rrr
  3166:             //SUBX.L -(Ar),-(Aq)                              |-|012346|-|*UUUU|*****|          |1001_qqq_110_001_rrr
  3167:             //SUB.L Dq,<ea>                                   |-|012346|-|UUUUU|*****|  M+-WXZ  |1001_qqq_110_mmm_rrr
  3168:           case 0b1001_000_110:
  3169:           case 0b1001_001_110:
  3170:           case 0b1001_010_110:
  3171:           case 0b1001_011_110:
  3172:           case 0b1001_100_110:
  3173:           case 0b1001_101_110:
  3174:           case 0b1001_110_110:
  3175:           case 0b1001_111_110:
  3176:             irpSubToMemLong ();
  3177:             break irpSwitch;
  3178: 
  3179:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3180:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  3181:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  3182:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3183:             //SUBA.L <ea>,Aq                                  |-|012346|-|-----|-----|DAM+-WXZPI|1001_qqq_111_mmm_rrr
  3184:             //SUB.L <ea>,Aq                                   |A|012346|-|-----|-----|DAM+-WXZPI|1001_qqq_111_mmm_rrr [SUBA.L <ea>,Aq]
  3185:             //CLR.L Ar                                        |A|012346|-|-----|-----| A        |1001_rrr_111_001_rrr [SUBA.L Ar,Ar]
  3186:           case 0b1001_000_111:
  3187:           case 0b1001_001_111:
  3188:           case 0b1001_010_111:
  3189:           case 0b1001_011_111:
  3190:           case 0b1001_100_111:
  3191:           case 0b1001_101_111:
  3192:           case 0b1001_110_111:
  3193:           case 0b1001_111_111:
  3194:             irpSubaLong ();
  3195:             break irpSwitch;
  3196: 
  3197:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3198:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  3199:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  3200:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3201:             //SXCALL <name>                                   |A|012346|-|UUUUU|*****|          |1010_0dd_ddd_ddd_ddd [ALINE #<data>]
  3202:           case 0b1010_000_000:
  3203:           case 0b1010_000_001:
  3204:           case 0b1010_000_010:
  3205:           case 0b1010_000_011:
  3206:           case 0b1010_000_100:
  3207:           case 0b1010_000_101:
  3208:           case 0b1010_000_110:
  3209:           case 0b1010_000_111:
  3210:           case 0b1010_001_000:
  3211:           case 0b1010_001_001:
  3212:           case 0b1010_001_010:
  3213:           case 0b1010_001_011:
  3214:           case 0b1010_001_100:
  3215:           case 0b1010_001_101:
  3216:           case 0b1010_001_110:
  3217:           case 0b1010_001_111:
  3218:           case 0b1010_010_000:
  3219:           case 0b1010_010_001:
  3220:           case 0b1010_010_010:
  3221:           case 0b1010_010_011:
  3222:           case 0b1010_010_100:
  3223:           case 0b1010_010_101:
  3224:           case 0b1010_010_110:
  3225:           case 0b1010_010_111:
  3226:           case 0b1010_011_000:
  3227:           case 0b1010_011_001:
  3228:           case 0b1010_011_010:
  3229:           case 0b1010_011_011:
  3230:           case 0b1010_011_100:
  3231:           case 0b1010_011_101:
  3232:           case 0b1010_011_110:
  3233:           case 0b1010_011_111:
  3234:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3235:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  3236:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  3237:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3238:             //ALINE #<data>                                   |-|012346|-|UUUUU|*****|          |1010_ddd_ddd_ddd_ddd (line 1010 emulator)
  3239:           case 0b1010_100_000:
  3240:           case 0b1010_100_001:
  3241:           case 0b1010_100_010:
  3242:           case 0b1010_100_011:
  3243:           case 0b1010_100_100:
  3244:           case 0b1010_100_101:
  3245:           case 0b1010_100_110:
  3246:           case 0b1010_100_111:
  3247:           case 0b1010_101_000:
  3248:           case 0b1010_101_001:
  3249:           case 0b1010_101_010:
  3250:           case 0b1010_101_011:
  3251:           case 0b1010_101_100:
  3252:           case 0b1010_101_101:
  3253:           case 0b1010_101_110:
  3254:           case 0b1010_101_111:
  3255:           case 0b1010_110_000:
  3256:           case 0b1010_110_001:
  3257:           case 0b1010_110_010:
  3258:           case 0b1010_110_011:
  3259:           case 0b1010_110_100:
  3260:           case 0b1010_110_101:
  3261:           case 0b1010_110_110:
  3262:           case 0b1010_110_111:
  3263:           case 0b1010_111_000:
  3264:           case 0b1010_111_001:
  3265:           case 0b1010_111_010:
  3266:           case 0b1010_111_011:
  3267:           case 0b1010_111_100:
  3268:           case 0b1010_111_101:
  3269:           case 0b1010_111_110:
  3270:           case 0b1010_111_111:
  3271:             irpAline ();
  3272:             break irpSwitch;
  3273: 
  3274:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3275:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  3276:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  3277:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3278:             //CMP.B <ea>,Dq                                   |-|012346|-|-UUUU|-****|D M+-WXZPI|1011_qqq_000_mmm_rrr
  3279:           case 0b1011_000_000:
  3280:           case 0b1011_001_000:
  3281:           case 0b1011_010_000:
  3282:           case 0b1011_011_000:
  3283:           case 0b1011_100_000:
  3284:           case 0b1011_101_000:
  3285:           case 0b1011_110_000:
  3286:           case 0b1011_111_000:
  3287:             irpCmpByte ();
  3288:             break irpSwitch;
  3289: 
  3290:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3291:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  3292:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  3293:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3294:             //CMP.W <ea>,Dq                                   |-|012346|-|-UUUU|-****|DAM+-WXZPI|1011_qqq_001_mmm_rrr
  3295:           case 0b1011_000_001:
  3296:           case 0b1011_001_001:
  3297:           case 0b1011_010_001:
  3298:           case 0b1011_011_001:
  3299:           case 0b1011_100_001:
  3300:           case 0b1011_101_001:
  3301:           case 0b1011_110_001:
  3302:           case 0b1011_111_001:
  3303:             irpCmpWord ();
  3304:             break irpSwitch;
  3305: 
  3306:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3307:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  3308:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  3309:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3310:             //CMP.L <ea>,Dq                                   |-|012346|-|-UUUU|-****|DAM+-WXZPI|1011_qqq_010_mmm_rrr
  3311:           case 0b1011_000_010:
  3312:           case 0b1011_001_010:
  3313:           case 0b1011_010_010:
  3314:           case 0b1011_011_010:
  3315:           case 0b1011_100_010:
  3316:           case 0b1011_101_010:
  3317:           case 0b1011_110_010:
  3318:           case 0b1011_111_010:
  3319:             irpCmpLong ();
  3320:             break irpSwitch;
  3321: 
  3322:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3323:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  3324:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  3325:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3326:             //CMPA.W <ea>,Aq                                  |-|012346|-|-UUUU|-****|DAM+-WXZPI|1011_qqq_011_mmm_rrr
  3327:             //CMP.W <ea>,Aq                                   |A|012346|-|-UUUU|-****|DAM+-WXZPI|1011_qqq_011_mmm_rrr [CMPA.W <ea>,Aq]
  3328:           case 0b1011_000_011:
  3329:           case 0b1011_001_011:
  3330:           case 0b1011_010_011:
  3331:           case 0b1011_011_011:
  3332:           case 0b1011_100_011:
  3333:           case 0b1011_101_011:
  3334:           case 0b1011_110_011:
  3335:           case 0b1011_111_011:
  3336:             irpCmpaWord ();
  3337:             break irpSwitch;
  3338: 
  3339:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3340:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  3341:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  3342:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3343:             //EOR.B Dq,<ea>                                   |-|012346|-|-UUUU|-**00|D M+-WXZ  |1011_qqq_100_mmm_rrr
  3344:             //CMPM.B (Ar)+,(Aq)+                              |-|012346|-|-UUUU|-****|          |1011_qqq_100_001_rrr
  3345:           case 0b1011_000_100:
  3346:           case 0b1011_001_100:
  3347:           case 0b1011_010_100:
  3348:           case 0b1011_011_100:
  3349:           case 0b1011_100_100:
  3350:           case 0b1011_101_100:
  3351:           case 0b1011_110_100:
  3352:           case 0b1011_111_100:
  3353:             irpEorByte ();
  3354:             break irpSwitch;
  3355: 
  3356:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3357:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  3358:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  3359:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3360:             //EOR.W Dq,<ea>                                   |-|012346|-|-UUUU|-**00|D M+-WXZ  |1011_qqq_101_mmm_rrr
  3361:             //CMPM.W (Ar)+,(Aq)+                              |-|012346|-|-UUUU|-****|          |1011_qqq_101_001_rrr
  3362:           case 0b1011_000_101:
  3363:           case 0b1011_001_101:
  3364:           case 0b1011_010_101:
  3365:           case 0b1011_011_101:
  3366:           case 0b1011_100_101:
  3367:           case 0b1011_101_101:
  3368:           case 0b1011_110_101:
  3369:           case 0b1011_111_101:
  3370:             irpEorWord ();
  3371:             break irpSwitch;
  3372: 
  3373:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3374:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  3375:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  3376:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3377:             //EOR.L Dq,<ea>                                   |-|012346|-|-UUUU|-**00|D M+-WXZ  |1011_qqq_110_mmm_rrr
  3378:             //CMPM.L (Ar)+,(Aq)+                              |-|012346|-|-UUUU|-****|          |1011_qqq_110_001_rrr
  3379:           case 0b1011_000_110:
  3380:           case 0b1011_001_110:
  3381:           case 0b1011_010_110:
  3382:           case 0b1011_011_110:
  3383:           case 0b1011_100_110:
  3384:           case 0b1011_101_110:
  3385:           case 0b1011_110_110:
  3386:           case 0b1011_111_110:
  3387:             irpEorLong ();
  3388:             break irpSwitch;
  3389: 
  3390:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3391:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  3392:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  3393:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3394:             //CMPA.L <ea>,Aq                                  |-|012346|-|-UUUU|-****|DAM+-WXZPI|1011_qqq_111_mmm_rrr
  3395:             //CMP.L <ea>,Aq                                   |A|012346|-|-UUUU|-****|DAM+-WXZPI|1011_qqq_111_mmm_rrr [CMPA.L <ea>,Aq]
  3396:           case 0b1011_000_111:
  3397:           case 0b1011_001_111:
  3398:           case 0b1011_010_111:
  3399:           case 0b1011_011_111:
  3400:           case 0b1011_100_111:
  3401:           case 0b1011_101_111:
  3402:           case 0b1011_110_111:
  3403:           case 0b1011_111_111:
  3404:             irpCmpaLong ();
  3405:             break irpSwitch;
  3406: 
  3407:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3408:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  3409:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  3410:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3411:             //AND.B <ea>,Dq                                   |-|012346|-|-UUUU|-**00|D M+-WXZPI|1100_qqq_000_mmm_rrr
  3412:           case 0b1100_000_000:
  3413:           case 0b1100_001_000:
  3414:           case 0b1100_010_000:
  3415:           case 0b1100_011_000:
  3416:           case 0b1100_100_000:
  3417:           case 0b1100_101_000:
  3418:           case 0b1100_110_000:
  3419:           case 0b1100_111_000:
  3420:             irpAndToRegByte ();
  3421:             break irpSwitch;
  3422: 
  3423:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3424:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  3425:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  3426:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3427:             //AND.W <ea>,Dq                                   |-|012346|-|-UUUU|-**00|D M+-WXZPI|1100_qqq_001_mmm_rrr
  3428:           case 0b1100_000_001:
  3429:           case 0b1100_001_001:
  3430:           case 0b1100_010_001:
  3431:           case 0b1100_011_001:
  3432:           case 0b1100_100_001:
  3433:           case 0b1100_101_001:
  3434:           case 0b1100_110_001:
  3435:           case 0b1100_111_001:
  3436:             irpAndToRegWord ();
  3437:             break irpSwitch;
  3438: 
  3439:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3440:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  3441:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  3442:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3443:             //AND.L <ea>,Dq                                   |-|012346|-|-UUUU|-**00|D M+-WXZPI|1100_qqq_010_mmm_rrr
  3444:           case 0b1100_000_010:
  3445:           case 0b1100_001_010:
  3446:           case 0b1100_010_010:
  3447:           case 0b1100_011_010:
  3448:           case 0b1100_100_010:
  3449:           case 0b1100_101_010:
  3450:           case 0b1100_110_010:
  3451:           case 0b1100_111_010:
  3452:             irpAndToRegLong ();
  3453:             break irpSwitch;
  3454: 
  3455:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3456:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  3457:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  3458:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3459:             //MULU.W <ea>,Dq                                  |-|012346|-|-UUUU|-***0|D M+-WXZPI|1100_qqq_011_mmm_rrr
  3460:           case 0b1100_000_011:
  3461:           case 0b1100_001_011:
  3462:           case 0b1100_010_011:
  3463:           case 0b1100_011_011:
  3464:           case 0b1100_100_011:
  3465:           case 0b1100_101_011:
  3466:           case 0b1100_110_011:
  3467:           case 0b1100_111_011:
  3468:             irpMuluWord ();
  3469:             break irpSwitch;
  3470: 
  3471:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3472:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  3473:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  3474:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3475:             //ABCD.B Dr,Dq                                    |-|012346|-|UUUUU|*U*U*|          |1100_qqq_100_000_rrr
  3476:             //ABCD.B -(Ar),-(Aq)                              |-|012346|-|UUUUU|*U*U*|          |1100_qqq_100_001_rrr
  3477:             //AND.B Dq,<ea>                                   |-|012346|-|-UUUU|-**00|  M+-WXZ  |1100_qqq_100_mmm_rrr
  3478:           case 0b1100_000_100:
  3479:           case 0b1100_001_100:
  3480:           case 0b1100_010_100:
  3481:           case 0b1100_011_100:
  3482:           case 0b1100_100_100:
  3483:           case 0b1100_101_100:
  3484:           case 0b1100_110_100:
  3485:           case 0b1100_111_100:
  3486:             irpAndToMemByte ();
  3487:             break irpSwitch;
  3488: 
  3489:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3490:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  3491:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  3492:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3493:             //EXG.L Dq,Dr                                     |-|012346|-|-----|-----|          |1100_qqq_101_000_rrr
  3494:             //EXG.L Aq,Ar                                     |-|012346|-|-----|-----|          |1100_qqq_101_001_rrr
  3495:             //AND.W Dq,<ea>                                   |-|012346|-|-UUUU|-**00|  M+-WXZ  |1100_qqq_101_mmm_rrr
  3496:           case 0b1100_000_101:
  3497:           case 0b1100_001_101:
  3498:           case 0b1100_010_101:
  3499:           case 0b1100_011_101:
  3500:           case 0b1100_100_101:
  3501:           case 0b1100_101_101:
  3502:           case 0b1100_110_101:
  3503:           case 0b1100_111_101:
  3504:             irpAndToMemWord ();
  3505:             break irpSwitch;
  3506: 
  3507:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3508:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  3509:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  3510:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3511:             //EXG.L Dq,Ar                                     |-|012346|-|-----|-----|          |1100_qqq_110_001_rrr
  3512:             //AND.L Dq,<ea>                                   |-|012346|-|-UUUU|-**00|  M+-WXZ  |1100_qqq_110_mmm_rrr
  3513:           case 0b1100_000_110:
  3514:           case 0b1100_001_110:
  3515:           case 0b1100_010_110:
  3516:           case 0b1100_011_110:
  3517:           case 0b1100_100_110:
  3518:           case 0b1100_101_110:
  3519:           case 0b1100_110_110:
  3520:           case 0b1100_111_110:
  3521:             irpAndToMemLong ();
  3522:             break irpSwitch;
  3523: 
  3524:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3525:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  3526:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  3527:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3528:             //MULS.W <ea>,Dq                                  |-|012346|-|-UUUU|-***0|D M+-WXZPI|1100_qqq_111_mmm_rrr
  3529:           case 0b1100_000_111:
  3530:           case 0b1100_001_111:
  3531:           case 0b1100_010_111:
  3532:           case 0b1100_011_111:
  3533:           case 0b1100_100_111:
  3534:           case 0b1100_101_111:
  3535:           case 0b1100_110_111:
  3536:           case 0b1100_111_111:
  3537:             irpMulsWord ();
  3538:             break irpSwitch;
  3539: 
  3540:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3541:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  3542:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  3543:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3544:             //ADD.B <ea>,Dq                                   |-|012346|-|UUUUU|*****|D M+-WXZPI|1101_qqq_000_mmm_rrr
  3545:           case 0b1101_000_000:
  3546:           case 0b1101_001_000:
  3547:           case 0b1101_010_000:
  3548:           case 0b1101_011_000:
  3549:           case 0b1101_100_000:
  3550:           case 0b1101_101_000:
  3551:           case 0b1101_110_000:
  3552:           case 0b1101_111_000:
  3553:             irpAddToRegByte ();
  3554:             break irpSwitch;
  3555: 
  3556:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3557:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  3558:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  3559:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3560:             //ADD.W <ea>,Dq                                   |-|012346|-|UUUUU|*****|DAM+-WXZPI|1101_qqq_001_mmm_rrr
  3561:           case 0b1101_000_001:
  3562:           case 0b1101_001_001:
  3563:           case 0b1101_010_001:
  3564:           case 0b1101_011_001:
  3565:           case 0b1101_100_001:
  3566:           case 0b1101_101_001:
  3567:           case 0b1101_110_001:
  3568:           case 0b1101_111_001:
  3569:             irpAddToRegWord ();
  3570:             break irpSwitch;
  3571: 
  3572:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3573:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  3574:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  3575:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3576:             //ADD.L <ea>,Dq                                   |-|012346|-|UUUUU|*****|DAM+-WXZPI|1101_qqq_010_mmm_rrr
  3577:           case 0b1101_000_010:
  3578:           case 0b1101_001_010:
  3579:           case 0b1101_010_010:
  3580:           case 0b1101_011_010:
  3581:           case 0b1101_100_010:
  3582:           case 0b1101_101_010:
  3583:           case 0b1101_110_010:
  3584:           case 0b1101_111_010:
  3585:             irpAddToRegLong ();
  3586:             break irpSwitch;
  3587: 
  3588:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3589:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  3590:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  3591:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3592:             //ADDA.W <ea>,Aq                                  |-|012346|-|-----|-----|DAM+-WXZPI|1101_qqq_011_mmm_rrr
  3593:             //ADD.W <ea>,Aq                                   |A|012346|-|-----|-----|DAM+-WXZPI|1101_qqq_011_mmm_rrr [ADDA.W <ea>,Aq]
  3594:           case 0b1101_000_011:
  3595:           case 0b1101_001_011:
  3596:           case 0b1101_010_011:
  3597:           case 0b1101_011_011:
  3598:           case 0b1101_100_011:
  3599:           case 0b1101_101_011:
  3600:           case 0b1101_110_011:
  3601:           case 0b1101_111_011:
  3602:             irpAddaWord ();
  3603:             break irpSwitch;
  3604: 
  3605:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3606:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  3607:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  3608:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3609:             //ADDX.B Dr,Dq                                    |-|012346|-|*UUUU|*****|          |1101_qqq_100_000_rrr
  3610:             //ADDX.B -(Ar),-(Aq)                              |-|012346|-|*UUUU|*****|          |1101_qqq_100_001_rrr
  3611:             //ADD.B Dq,<ea>                                   |-|012346|-|UUUUU|*****|  M+-WXZ  |1101_qqq_100_mmm_rrr
  3612:           case 0b1101_000_100:
  3613:           case 0b1101_001_100:
  3614:           case 0b1101_010_100:
  3615:           case 0b1101_011_100:
  3616:           case 0b1101_100_100:
  3617:           case 0b1101_101_100:
  3618:           case 0b1101_110_100:
  3619:           case 0b1101_111_100:
  3620:             irpAddToMemByte ();
  3621:             break irpSwitch;
  3622: 
  3623:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3624:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  3625:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  3626:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3627:             //ADDX.W Dr,Dq                                    |-|012346|-|*UUUU|*****|          |1101_qqq_101_000_rrr
  3628:             //ADDX.W -(Ar),-(Aq)                              |-|012346|-|*UUUU|*****|          |1101_qqq_101_001_rrr
  3629:             //ADD.W Dq,<ea>                                   |-|012346|-|UUUUU|*****|  M+-WXZ  |1101_qqq_101_mmm_rrr
  3630:           case 0b1101_000_101:
  3631:           case 0b1101_001_101:
  3632:           case 0b1101_010_101:
  3633:           case 0b1101_011_101:
  3634:           case 0b1101_100_101:
  3635:           case 0b1101_101_101:
  3636:           case 0b1101_110_101:
  3637:           case 0b1101_111_101:
  3638:             irpAddToMemWord ();
  3639:             break irpSwitch;
  3640: 
  3641:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3642:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  3643:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  3644:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3645:             //ADDX.L Dr,Dq                                    |-|012346|-|*UUUU|*****|          |1101_qqq_110_000_rrr
  3646:             //ADDX.L -(Ar),-(Aq)                              |-|012346|-|*UUUU|*****|          |1101_qqq_110_001_rrr
  3647:             //ADD.L Dq,<ea>                                   |-|012346|-|UUUUU|*****|  M+-WXZ  |1101_qqq_110_mmm_rrr
  3648:           case 0b1101_000_110:
  3649:           case 0b1101_001_110:
  3650:           case 0b1101_010_110:
  3651:           case 0b1101_011_110:
  3652:           case 0b1101_100_110:
  3653:           case 0b1101_101_110:
  3654:           case 0b1101_110_110:
  3655:           case 0b1101_111_110:
  3656:             irpAddToMemLong ();
  3657:             break irpSwitch;
  3658: 
  3659:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3660:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  3661:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  3662:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3663:             //ADDA.L <ea>,Aq                                  |-|012346|-|-----|-----|DAM+-WXZPI|1101_qqq_111_mmm_rrr
  3664:             //ADD.L <ea>,Aq                                   |A|012346|-|-----|-----|DAM+-WXZPI|1101_qqq_111_mmm_rrr [ADDA.L <ea>,Aq]
  3665:           case 0b1101_000_111:
  3666:           case 0b1101_001_111:
  3667:           case 0b1101_010_111:
  3668:           case 0b1101_011_111:
  3669:           case 0b1101_100_111:
  3670:           case 0b1101_101_111:
  3671:           case 0b1101_110_111:
  3672:           case 0b1101_111_111:
  3673:             irpAddaLong ();
  3674:             break irpSwitch;
  3675: 
  3676:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3677:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  3678:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  3679:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3680:             //ASR.B #<data>,Dr                                |-|012346|-|UUUUU|***0*|          |1110_qqq_000_000_rrr
  3681:             //LSR.B #<data>,Dr                                |-|012346|-|UUUUU|***0*|          |1110_qqq_000_001_rrr
  3682:             //ROXR.B #<data>,Dr                               |-|012346|-|*UUUU|***0*|          |1110_qqq_000_010_rrr
  3683:             //ROR.B #<data>,Dr                                |-|012346|-|-UUUU|-**0*|          |1110_qqq_000_011_rrr
  3684:             //ASR.B Dq,Dr                                     |-|012346|-|UUUUU|***0*|          |1110_qqq_000_100_rrr
  3685:             //LSR.B Dq,Dr                                     |-|012346|-|UUUUU|***0*|          |1110_qqq_000_101_rrr
  3686:             //ROXR.B Dq,Dr                                    |-|012346|-|*UUUU|***0*|          |1110_qqq_000_110_rrr
  3687:             //ROR.B Dq,Dr                                     |-|012346|-|-UUUU|-**0*|          |1110_qqq_000_111_rrr
  3688:             //ASR.B Dr                                        |A|012346|-|UUUUU|***0*|          |1110_001_000_000_rrr [ASR.B #1,Dr]
  3689:             //LSR.B Dr                                        |A|012346|-|UUUUU|***0*|          |1110_001_000_001_rrr [LSR.B #1,Dr]
  3690:             //ROXR.B Dr                                       |A|012346|-|*UUUU|***0*|          |1110_001_000_010_rrr [ROXR.B #1,Dr]
  3691:             //ROR.B Dr                                        |A|012346|-|-UUUU|-**0*|          |1110_001_000_011_rrr [ROR.B #1,Dr]
  3692:           case 0b1110_000_000:
  3693:           case 0b1110_001_000:
  3694:           case 0b1110_010_000:
  3695:           case 0b1110_011_000:
  3696:           case 0b1110_100_000:
  3697:           case 0b1110_101_000:
  3698:           case 0b1110_110_000:
  3699:           case 0b1110_111_000:
  3700:             irpXxrToRegByte ();
  3701:             break irpSwitch;
  3702: 
  3703:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3704:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  3705:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  3706:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3707:             //ASR.W #<data>,Dr                                |-|012346|-|UUUUU|***0*|          |1110_qqq_001_000_rrr
  3708:             //LSR.W #<data>,Dr                                |-|012346|-|UUUUU|***0*|          |1110_qqq_001_001_rrr
  3709:             //ROXR.W #<data>,Dr                               |-|012346|-|*UUUU|***0*|          |1110_qqq_001_010_rrr
  3710:             //ROR.W #<data>,Dr                                |-|012346|-|-UUUU|-**0*|          |1110_qqq_001_011_rrr
  3711:             //ASR.W Dq,Dr                                     |-|012346|-|UUUUU|***0*|          |1110_qqq_001_100_rrr
  3712:             //LSR.W Dq,Dr                                     |-|012346|-|UUUUU|***0*|          |1110_qqq_001_101_rrr
  3713:             //ROXR.W Dq,Dr                                    |-|012346|-|*UUUU|***0*|          |1110_qqq_001_110_rrr
  3714:             //ROR.W Dq,Dr                                     |-|012346|-|-UUUU|-**0*|          |1110_qqq_001_111_rrr
  3715:             //ASR.W Dr                                        |A|012346|-|UUUUU|***0*|          |1110_001_001_000_rrr [ASR.W #1,Dr]
  3716:             //LSR.W Dr                                        |A|012346|-|UUUUU|***0*|          |1110_001_001_001_rrr [LSR.W #1,Dr]
  3717:             //ROXR.W Dr                                       |A|012346|-|*UUUU|***0*|          |1110_001_001_010_rrr [ROXR.W #1,Dr]
  3718:             //ROR.W Dr                                        |A|012346|-|-UUUU|-**0*|          |1110_001_001_011_rrr [ROR.W #1,Dr]
  3719:           case 0b1110_000_001:
  3720:           case 0b1110_001_001:
  3721:           case 0b1110_010_001:
  3722:           case 0b1110_011_001:
  3723:           case 0b1110_100_001:
  3724:           case 0b1110_101_001:
  3725:           case 0b1110_110_001:
  3726:           case 0b1110_111_001:
  3727:             irpXxrToRegWord ();
  3728:             break irpSwitch;
  3729: 
  3730:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3731:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  3732:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  3733:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3734:             //ASR.L #<data>,Dr                                |-|012346|-|UUUUU|***0*|          |1110_qqq_010_000_rrr
  3735:             //LSR.L #<data>,Dr                                |-|012346|-|UUUUU|***0*|          |1110_qqq_010_001_rrr
  3736:             //ROXR.L #<data>,Dr                               |-|012346|-|*UUUU|***0*|          |1110_qqq_010_010_rrr
  3737:             //ROR.L #<data>,Dr                                |-|012346|-|-UUUU|-**0*|          |1110_qqq_010_011_rrr
  3738:             //ASR.L Dq,Dr                                     |-|012346|-|UUUUU|***0*|          |1110_qqq_010_100_rrr
  3739:             //LSR.L Dq,Dr                                     |-|012346|-|UUUUU|***0*|          |1110_qqq_010_101_rrr
  3740:             //ROXR.L Dq,Dr                                    |-|012346|-|*UUUU|***0*|          |1110_qqq_010_110_rrr
  3741:             //ROR.L Dq,Dr                                     |-|012346|-|-UUUU|-**0*|          |1110_qqq_010_111_rrr
  3742:             //ASR.L Dr                                        |A|012346|-|UUUUU|***0*|          |1110_001_010_000_rrr [ASR.L #1,Dr]
  3743:             //LSR.L Dr                                        |A|012346|-|UUUUU|***0*|          |1110_001_010_001_rrr [LSR.L #1,Dr]
  3744:             //ROXR.L Dr                                       |A|012346|-|*UUUU|***0*|          |1110_001_010_010_rrr [ROXR.L #1,Dr]
  3745:             //ROR.L Dr                                        |A|012346|-|-UUUU|-**0*|          |1110_001_010_011_rrr [ROR.L #1,Dr]
  3746:           case 0b1110_000_010:
  3747:           case 0b1110_001_010:
  3748:           case 0b1110_010_010:
  3749:           case 0b1110_011_010:
  3750:           case 0b1110_100_010:
  3751:           case 0b1110_101_010:
  3752:           case 0b1110_110_010:
  3753:           case 0b1110_111_010:
  3754:             irpXxrToRegLong ();
  3755:             break irpSwitch;
  3756: 
  3757:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3758:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  3759:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  3760:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3761:             //ASR.W <ea>                                      |-|012346|-|UUUUU|***0*|  M+-WXZ  |1110_000_011_mmm_rrr
  3762:           case 0b1110_000_011:
  3763:             irpAsrToMem ();
  3764:             break irpSwitch;
  3765: 
  3766:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3767:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  3768:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  3769:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3770:             //ASL.B #<data>,Dr                                |-|012346|-|UUUUU|*****|          |1110_qqq_100_000_rrr
  3771:             //LSL.B #<data>,Dr                                |-|012346|-|UUUUU|***0*|          |1110_qqq_100_001_rrr
  3772:             //ROXL.B #<data>,Dr                               |-|012346|-|*UUUU|***0*|          |1110_qqq_100_010_rrr
  3773:             //ROL.B #<data>,Dr                                |-|012346|-|-UUUU|-**0*|          |1110_qqq_100_011_rrr
  3774:             //ASL.B Dq,Dr                                     |-|012346|-|UUUUU|*****|          |1110_qqq_100_100_rrr
  3775:             //LSL.B Dq,Dr                                     |-|012346|-|UUUUU|***0*|          |1110_qqq_100_101_rrr
  3776:             //ROXL.B Dq,Dr                                    |-|012346|-|*UUUU|***0*|          |1110_qqq_100_110_rrr
  3777:             //ROL.B Dq,Dr                                     |-|012346|-|-UUUU|-**0*|          |1110_qqq_100_111_rrr
  3778:             //ASL.B Dr                                        |A|012346|-|UUUUU|*****|          |1110_001_100_000_rrr [ASL.B #1,Dr]
  3779:             //LSL.B Dr                                        |A|012346|-|UUUUU|***0*|          |1110_001_100_001_rrr [LSL.B #1,Dr]
  3780:             //ROXL.B Dr                                       |A|012346|-|*UUUU|***0*|          |1110_001_100_010_rrr [ROXL.B #1,Dr]
  3781:             //ROL.B Dr                                        |A|012346|-|-UUUU|-**0*|          |1110_001_100_011_rrr [ROL.B #1,Dr]
  3782:           case 0b1110_000_100:
  3783:           case 0b1110_001_100:
  3784:           case 0b1110_010_100:
  3785:           case 0b1110_011_100:
  3786:           case 0b1110_100_100:
  3787:           case 0b1110_101_100:
  3788:           case 0b1110_110_100:
  3789:           case 0b1110_111_100:
  3790:             irpXxlToRegByte ();
  3791:             break irpSwitch;
  3792: 
  3793:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3794:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  3795:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  3796:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3797:             //ASL.W #<data>,Dr                                |-|012346|-|UUUUU|*****|          |1110_qqq_101_000_rrr
  3798:             //LSL.W #<data>,Dr                                |-|012346|-|UUUUU|***0*|          |1110_qqq_101_001_rrr
  3799:             //ROXL.W #<data>,Dr                               |-|012346|-|*UUUU|***0*|          |1110_qqq_101_010_rrr
  3800:             //ROL.W #<data>,Dr                                |-|012346|-|-UUUU|-**0*|          |1110_qqq_101_011_rrr
  3801:             //ASL.W Dq,Dr                                     |-|012346|-|UUUUU|*****|          |1110_qqq_101_100_rrr
  3802:             //LSL.W Dq,Dr                                     |-|012346|-|UUUUU|***0*|          |1110_qqq_101_101_rrr
  3803:             //ROXL.W Dq,Dr                                    |-|012346|-|*UUUU|***0*|          |1110_qqq_101_110_rrr
  3804:             //ROL.W Dq,Dr                                     |-|012346|-|-UUUU|-**0*|          |1110_qqq_101_111_rrr
  3805:             //ASL.W Dr                                        |A|012346|-|UUUUU|*****|          |1110_001_101_000_rrr [ASL.W #1,Dr]
  3806:             //LSL.W Dr                                        |A|012346|-|UUUUU|***0*|          |1110_001_101_001_rrr [LSL.W #1,Dr]
  3807:             //ROXL.W Dr                                       |A|012346|-|*UUUU|***0*|          |1110_001_101_010_rrr [ROXL.W #1,Dr]
  3808:             //ROL.W Dr                                        |A|012346|-|-UUUU|-**0*|          |1110_001_101_011_rrr [ROL.W #1,Dr]
  3809:           case 0b1110_000_101:
  3810:           case 0b1110_001_101:
  3811:           case 0b1110_010_101:
  3812:           case 0b1110_011_101:
  3813:           case 0b1110_100_101:
  3814:           case 0b1110_101_101:
  3815:           case 0b1110_110_101:
  3816:           case 0b1110_111_101:
  3817:             irpXxlToRegWord ();
  3818:             break irpSwitch;
  3819: 
  3820:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3821:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  3822:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  3823:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3824:             //ASL.L #<data>,Dr                                |-|012346|-|UUUUU|*****|          |1110_qqq_110_000_rrr
  3825:             //LSL.L #<data>,Dr                                |-|012346|-|UUUUU|***0*|          |1110_qqq_110_001_rrr
  3826:             //ROXL.L #<data>,Dr                               |-|012346|-|*UUUU|***0*|          |1110_qqq_110_010_rrr
  3827:             //ROL.L #<data>,Dr                                |-|012346|-|-UUUU|-**0*|          |1110_qqq_110_011_rrr
  3828:             //ASL.L Dq,Dr                                     |-|012346|-|UUUUU|*****|          |1110_qqq_110_100_rrr
  3829:             //LSL.L Dq,Dr                                     |-|012346|-|UUUUU|***0*|          |1110_qqq_110_101_rrr
  3830:             //ROXL.L Dq,Dr                                    |-|012346|-|*UUUU|***0*|          |1110_qqq_110_110_rrr
  3831:             //ROL.L Dq,Dr                                     |-|012346|-|-UUUU|-**0*|          |1110_qqq_110_111_rrr
  3832:             //ASL.L Dr                                        |A|012346|-|UUUUU|*****|          |1110_001_110_000_rrr [ASL.L #1,Dr]
  3833:             //LSL.L Dr                                        |A|012346|-|UUUUU|***0*|          |1110_001_110_001_rrr [LSL.L #1,Dr]
  3834:             //ROXL.L Dr                                       |A|012346|-|*UUUU|***0*|          |1110_001_110_010_rrr [ROXL.L #1,Dr]
  3835:             //ROL.L Dr                                        |A|012346|-|-UUUU|-**0*|          |1110_001_110_011_rrr [ROL.L #1,Dr]
  3836:           case 0b1110_000_110:
  3837:           case 0b1110_001_110:
  3838:           case 0b1110_010_110:
  3839:           case 0b1110_011_110:
  3840:           case 0b1110_100_110:
  3841:           case 0b1110_101_110:
  3842:           case 0b1110_110_110:
  3843:           case 0b1110_111_110:
  3844:             irpXxlToRegLong ();
  3845:             break irpSwitch;
  3846: 
  3847:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3848:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  3849:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  3850:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3851:             //ASL.W <ea>                                      |-|012346|-|UUUUU|*****|  M+-WXZ  |1110_000_111_mmm_rrr
  3852:           case 0b1110_000_111:
  3853:             irpAslToMem ();
  3854:             break irpSwitch;
  3855: 
  3856:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3857:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  3858:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  3859:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3860:             //LSR.W <ea>                                      |-|012346|-|UUUUU|*0*0*|  M+-WXZ  |1110_001_011_mmm_rrr
  3861:           case 0b1110_001_011:
  3862:             irpLsrToMem ();
  3863:             break irpSwitch;
  3864: 
  3865:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3866:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  3867:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  3868:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3869:             //LSL.W <ea>                                      |-|012346|-|UUUUU|***0*|  M+-WXZ  |1110_001_111_mmm_rrr
  3870:           case 0b1110_001_111:
  3871:             irpLslToMem ();
  3872:             break irpSwitch;
  3873: 
  3874:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3875:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  3876:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  3877:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3878:             //ROXR.W <ea>                                     |-|012346|-|*UUUU|***0*|  M+-WXZ  |1110_010_011_mmm_rrr
  3879:           case 0b1110_010_011:
  3880:             irpRoxrToMem ();
  3881:             break irpSwitch;
  3882: 
  3883:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3884:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  3885:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  3886:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3887:             //ROXL.W <ea>                                     |-|012346|-|*UUUU|***0*|  M+-WXZ  |1110_010_111_mmm_rrr
  3888:           case 0b1110_010_111:
  3889:             irpRoxlToMem ();
  3890:             break irpSwitch;
  3891: 
  3892:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3893:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  3894:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  3895:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3896:             //ROR.W <ea>                                      |-|012346|-|-UUUU|-**0*|  M+-WXZ  |1110_011_011_mmm_rrr
  3897:           case 0b1110_011_011:
  3898:             irpRorToMem ();
  3899:             break irpSwitch;
  3900: 
  3901:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3902:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  3903:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  3904:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3905:             //ROL.W <ea>                                      |-|012346|-|-UUUU|-**0*|  M+-WXZ  |1110_011_111_mmm_rrr
  3906:           case 0b1110_011_111:
  3907:             irpRolToMem ();
  3908:             break irpSwitch;
  3909: 
  3910:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3911:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  3912:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  3913:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3914:             //BFTST <ea>{#o:#w}                               |-|--2346|-|-UUUU|-**00|D M  WXZP |1110_100_011_mmm_rrr-00000ooooo0wwwww
  3915:             //BFTST <ea>{#o:Dw}                               |-|--2346|-|-UUUU|-**00|D M  WXZP |1110_100_011_mmm_rrr-00000ooooo100www
  3916:             //BFTST <ea>{Do:#w}                               |-|--2346|-|-UUUU|-**00|D M  WXZP |1110_100_011_mmm_rrr-0000100ooo0wwwww
  3917:             //BFTST <ea>{Do:Dw}                               |-|--2346|-|-UUUU|-**00|D M  WXZP |1110_100_011_mmm_rrr-0000100ooo100www
  3918:           case 0b1110_100_011:
  3919:             irpBftst ();
  3920:             break irpSwitch;
  3921: 
  3922:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3923:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  3924:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  3925:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3926:             //BFEXTU <ea>{#o:#w},Dn                           |-|--2346|-|-UUUU|-**00|D M  WXZP |1110_100_111_mmm_rrr-0nnn0ooooo0wwwww
  3927:             //BFEXTU <ea>{#o:Dw},Dn                           |-|--2346|-|-UUUU|-**00|D M  WXZP |1110_100_111_mmm_rrr-0nnn0ooooo100www
  3928:             //BFEXTU <ea>{Do:#w},Dn                           |-|--2346|-|-UUUU|-**00|D M  WXZP |1110_100_111_mmm_rrr-0nnn100ooo0wwwww
  3929:             //BFEXTU <ea>{Do:Dw},Dn                           |-|--2346|-|-UUUU|-**00|D M  WXZP |1110_100_111_mmm_rrr-0nnn100ooo100www
  3930:           case 0b1110_100_111:
  3931:             irpBfextu ();
  3932:             break irpSwitch;
  3933: 
  3934:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3935:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  3936:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  3937:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3938:             //BFCHG <ea>{#o:#w}                               |-|--2346|-|-UUUU|-**00|D M  WXZ  |1110_101_011_mmm_rrr-00000ooooo0wwwww
  3939:             //BFCHG <ea>{#o:Dw}                               |-|--2346|-|-UUUU|-**00|D M  WXZ  |1110_101_011_mmm_rrr-00000ooooo100www
  3940:             //BFCHG <ea>{Do:#w}                               |-|--2346|-|-UUUU|-**00|D M  WXZ  |1110_101_011_mmm_rrr-0000100ooo0wwwww
  3941:             //BFCHG <ea>{Do:Dw}                               |-|--2346|-|-UUUU|-**00|D M  WXZ  |1110_101_011_mmm_rrr-0000100ooo100www
  3942:           case 0b1110_101_011:
  3943:             irpBfchg ();
  3944:             break irpSwitch;
  3945: 
  3946:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3947:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  3948:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  3949:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3950:             //BFEXTS <ea>{#o:#w},Dn                           |-|--2346|-|-UUUU|-**00|D M  WXZP |1110_101_111_mmm_rrr-0nnn0ooooo0wwwww
  3951:             //BFEXTS <ea>{#o:Dw},Dn                           |-|--2346|-|-UUUU|-**00|D M  WXZP |1110_101_111_mmm_rrr-0nnn0ooooo100www
  3952:             //BFEXTS <ea>{Do:#w},Dn                           |-|--2346|-|-UUUU|-**00|D M  WXZP |1110_101_111_mmm_rrr-0nnn100ooo0wwwww
  3953:             //BFEXTS <ea>{Do:Dw},Dn                           |-|--2346|-|-UUUU|-**00|D M  WXZP |1110_101_111_mmm_rrr-0nnn100ooo100www
  3954:           case 0b1110_101_111:
  3955:             irpBfexts ();
  3956:             break irpSwitch;
  3957: 
  3958:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3959:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  3960:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  3961:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3962:             //BFCLR <ea>{#o:#w}                               |-|--2346|-|-UUUU|-**00|D M  WXZ  |1110_110_011_mmm_rrr-00000ooooo0wwwww
  3963:             //BFCLR <ea>{#o:Dw}                               |-|--2346|-|-UUUU|-**00|D M  WXZ  |1110_110_011_mmm_rrr-00000ooooo100www
  3964:             //BFCLR <ea>{Do:#w}                               |-|--2346|-|-UUUU|-**00|D M  WXZ  |1110_110_011_mmm_rrr-0000100ooo0wwwww
  3965:             //BFCLR <ea>{Do:Dw}                               |-|--2346|-|-UUUU|-**00|D M  WXZ  |1110_110_011_mmm_rrr-0000100ooo100www
  3966:           case 0b1110_110_011:
  3967:             irpBfclr ();
  3968:             break irpSwitch;
  3969: 
  3970:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3971:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  3972:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  3973:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3974:             //BFFFO <ea>{#o:#w},Dn                            |-|--2346|-|-UUUU|-**00|D M  WXZP |1110_110_111_mmm_rrr-0nnn0ooooo0wwwww
  3975:             //BFFFO <ea>{#o:Dw},Dn                            |-|--2346|-|-UUUU|-**00|D M  WXZP |1110_110_111_mmm_rrr-0nnn0ooooo100www
  3976:             //BFFFO <ea>{Do:#w},Dn                            |-|--2346|-|-UUUU|-**00|D M  WXZP |1110_110_111_mmm_rrr-0nnn100ooo0wwwww
  3977:             //BFFFO <ea>{Do:Dw},Dn                            |-|--2346|-|-UUUU|-**00|D M  WXZP |1110_110_111_mmm_rrr-0nnn100ooo100www
  3978:           case 0b1110_110_111:
  3979:             irpBfffo ();
  3980:             break irpSwitch;
  3981: 
  3982:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3983:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  3984:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  3985:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3986:             //BFSET <ea>{#o:#w}                               |-|--2346|-|-UUUU|-**00|D M  WXZ  |1110_111_011_mmm_rrr-00000ooooo0wwwww
  3987:             //BFSET <ea>{#o:Dw}                               |-|--2346|-|-UUUU|-**00|D M  WXZ  |1110_111_011_mmm_rrr-00000ooooo100www
  3988:             //BFSET <ea>{Do:#w}                               |-|--2346|-|-UUUU|-**00|D M  WXZ  |1110_111_011_mmm_rrr-0000100ooo0wwwww
  3989:             //BFSET <ea>{Do:Dw}                               |-|--2346|-|-UUUU|-**00|D M  WXZ  |1110_111_011_mmm_rrr-0000100ooo100www
  3990:           case 0b1110_111_011:
  3991:             irpBfset ();
  3992:             break irpSwitch;
  3993: 
  3994:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3995:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  3996:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  3997:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3998:             //BFINS Dn,<ea>{#o:#w}                            |-|--2346|-|-UUUU|-**00|D M  WXZ  |1110_111_111_mmm_rrr-0nnn0ooooo0wwwww
  3999:             //BFINS Dn,<ea>{#o:Dw}                            |-|--2346|-|-UUUU|-**00|D M  WXZ  |1110_111_111_mmm_rrr-0nnn0ooooo100www
  4000:             //BFINS Dn,<ea>{Do:#w}                            |-|--2346|-|-UUUU|-**00|D M  WXZ  |1110_111_111_mmm_rrr-0nnn100ooo0wwwww
  4001:             //BFINS Dn,<ea>{Do:Dw}                            |-|--2346|-|-UUUU|-**00|D M  WXZ  |1110_111_111_mmm_rrr-0nnn100ooo100www
  4002:           case 0b1110_111_111:
  4003:             irpBfins ();
  4004:             break irpSwitch;
  4005: 
  4006:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  4007:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  4008:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  4009:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  4010:             //FTST.X FPm                                      |-|--CC46|-|-----|-----|          |1111_001_000_000_000-000mmm0000111010
  4011:             //FMOVE.X FPm,FPn                                 |-|--CC46|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0000000
  4012:             //FINT.X FPm,FPn                                  |-|--CCS6|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0000001
  4013:             //FSINH.X FPm,FPn                                 |-|--CCSS|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0000010
  4014:             //FINTRZ.X FPm,FPn                                |-|--CCS6|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0000011
  4015:             //FSQRT.X FPm,FPn                                 |-|--CC46|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0000100
  4016:             //FLOGNP1.X FPm,FPn                               |-|--CCSS|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0000110
  4017:             //FETOXM1.X FPm,FPn                               |-|--CCSS|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0001000
  4018:             //FTANH.X FPm,FPn                                 |-|--CCSS|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0001001
  4019:             //FATAN.X FPm,FPn                                 |-|--CCSS|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0001010
  4020:             //FASIN.X FPm,FPn                                 |-|--CCSS|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0001100
  4021:             //FATANH.X FPm,FPn                                |-|--CCSS|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0001101
  4022:             //FSIN.X FPm,FPn                                  |-|--CCSS|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0001110
  4023:             //FTAN.X FPm,FPn                                  |-|--CCSS|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0001111
  4024:             //FETOX.X FPm,FPn                                 |-|--CCSS|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0010000
  4025:             //FTWOTOX.X FPm,FPn                               |-|--CCSS|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0010001
  4026:             //FTENTOX.X FPm,FPn                               |-|--CCSS|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0010010
  4027:             //FLOGN.X FPm,FPn                                 |-|--CCSS|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0010100
  4028:             //FLOG10.X FPm,FPn                                |-|--CCSS|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0010101
  4029:             //FLOG2.X FPm,FPn                                 |-|--CCSS|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0010110
  4030:             //FABS.X FPm,FPn                                  |-|--CC46|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0011000
  4031:             //FCOSH.X FPm,FPn                                 |-|--CCSS|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0011001
  4032:             //FNEG.X FPm,FPn                                  |-|--CC46|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0011010
  4033:             //FACOS.X FPm,FPn                                 |-|--CCSS|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0011100
  4034:             //FCOS.X FPm,FPn                                  |-|--CCSS|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0011101
  4035:             //FGETEXP.X FPm,FPn                               |-|--CCSS|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0011110
  4036:             //FGETMAN.X FPm,FPn                               |-|--CCSS|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0011111
  4037:             //FDIV.X FPm,FPn                                  |-|--CC46|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0100000
  4038:             //FMOD.X FPm,FPn                                  |-|--CCSS|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0100001
  4039:             //FADD.X FPm,FPn                                  |-|--CC46|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0100010
  4040:             //FMUL.X FPm,FPn                                  |-|--CC46|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0100011
  4041:             //FSGLDIV.X FPm,FPn                               |-|--CCS6|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0100100
  4042:             //FREM.X FPm,FPn                                  |-|--CCSS|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0100101
  4043:             //FSCALE.X FPm,FPn                                |-|--CCSS|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0100110
  4044:             //FSGLMUL.X FPm,FPn                               |-|--CCS6|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0100111
  4045:             //FSUB.X FPm,FPn                                  |-|--CC46|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0101000
  4046:             //FCMP.X FPm,FPn                                  |-|--CC46|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0111000
  4047:             //FSMOVE.X FPm,FPn                                |-|----46|-|-----|-----|          |1111_001_000_000_000-000mmmnnn1000000
  4048:             //FSSQRT.X FPm,FPn                                |-|----46|-|-----|-----|          |1111_001_000_000_000-000mmmnnn1000001
  4049:             //FDMOVE.X FPm,FPn                                |-|----46|-|-----|-----|          |1111_001_000_000_000-000mmmnnn1000100
  4050:             //FDSQRT.X FPm,FPn                                |-|----46|-|-----|-----|          |1111_001_000_000_000-000mmmnnn1000101
  4051:             //FSABS.X FPm,FPn                                 |-|----46|-|-----|-----|          |1111_001_000_000_000-000mmmnnn1011000
  4052:             //FSNEG.X FPm,FPn                                 |-|----46|-|-----|-----|          |1111_001_000_000_000-000mmmnnn1011010
  4053:             //FDABS.X FPm,FPn                                 |-|----46|-|-----|-----|          |1111_001_000_000_000-000mmmnnn1011100
  4054:             //FDNEG.X FPm,FPn                                 |-|----46|-|-----|-----|          |1111_001_000_000_000-000mmmnnn1011110
  4055:             //FSDIV.X FPm,FPn                                 |-|----46|-|-----|-----|          |1111_001_000_000_000-000mmmnnn1100000
  4056:             //FSADD.X FPm,FPn                                 |-|----46|-|-----|-----|          |1111_001_000_000_000-000mmmnnn1100010
  4057:             //FSMUL.X FPm,FPn                                 |-|----46|-|-----|-----|          |1111_001_000_000_000-000mmmnnn1100011
  4058:             //FDDIV.X FPm,FPn                                 |-|----46|-|-----|-----|          |1111_001_000_000_000-000mmmnnn1100100
  4059:             //FDADD.X FPm,FPn                                 |-|----46|-|-----|-----|          |1111_001_000_000_000-000mmmnnn1100110
  4060:             //FDMUL.X FPm,FPn                                 |-|----46|-|-----|-----|          |1111_001_000_000_000-000mmmnnn1100111
  4061:             //FSSUB.X FPm,FPn                                 |-|----46|-|-----|-----|          |1111_001_000_000_000-000mmmnnn1101000
  4062:             //FDSUB.X FPm,FPn                                 |-|----46|-|-----|-----|          |1111_001_000_000_000-000mmmnnn1101100
  4063:             //FSINCOS.X FPm,FPc:FPs                           |-|--CCSS|-|-----|-----|          |1111_001_000_000_000-000mmmsss0110ccc
  4064:             //FMOVECR.X #ccc,FPn                              |-|--CCSS|-|-----|-----|          |1111_001_000_000_000-010111nnn0cccccc
  4065:             //FMOVE.L FPn,<ea>                                |-|--CC46|-|-----|-----|D M+-WXZ  |1111_001_000_mmm_rrr-011000nnn0000000
  4066:             //FMOVE.S FPn,<ea>                                |-|--CC46|-|-----|-----|D M+-WXZ  |1111_001_000_mmm_rrr-011001nnn0000000
  4067:             //FMOVE.W FPn,<ea>                                |-|--CC46|-|-----|-----|D M+-WXZ  |1111_001_000_mmm_rrr-011100nnn0000000
  4068:             //FMOVE.B FPn,<ea>                                |-|--CC46|-|-----|-----|D M+-WXZ  |1111_001_000_mmm_rrr-011110nnn0000000
  4069:             //FMOVE.L FPIAR,<ea>                              |-|--CC46|-|-----|-----|DAM+-WXZ  |1111_001_000_mmm_rrr-1010010000000000
  4070:             //FMOVEM.L FPIAR,<ea>                             |-|--CC46|-|-----|-----|DAM+-WXZ  |1111_001_000_mmm_rrr-1010010000000000
  4071:             //FMOVE.L FPSR,<ea>                               |-|--CC46|-|-----|-----|D M+-WXZ  |1111_001_000_mmm_rrr-1010100000000000
  4072:             //FMOVEM.L FPSR,<ea>                              |-|--CC46|-|-----|-----|D M+-WXZ  |1111_001_000_mmm_rrr-1010100000000000
  4073:             //FMOVE.L FPCR,<ea>                               |-|--CC46|-|-----|-----|D M+-WXZ  |1111_001_000_mmm_rrr-1011000000000000
  4074:             //FMOVEM.L FPCR,<ea>                              |-|--CC46|-|-----|-----|D M+-WXZ  |1111_001_000_mmm_rrr-1011000000000000
  4075:             //FTST.L <ea>                                     |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-0100000000111010
  4076:             //FMOVE.L <ea>,FPn                                |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0000000
  4077:             //FINT.L <ea>,FPn                                 |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0000001
  4078:             //FSINH.L <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0000010
  4079:             //FINTRZ.L <ea>,FPn                               |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0000011
  4080:             //FSQRT.L <ea>,FPn                                |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0000100
  4081:             //FLOGNP1.L <ea>,FPn                              |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0000110
  4082:             //FETOXM1.L <ea>,FPn                              |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0001000
  4083:             //FTANH.L <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0001001
  4084:             //FATAN.L <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0001010
  4085:             //FASIN.L <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0001100
  4086:             //FATANH.L <ea>,FPn                               |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0001101
  4087:             //FSIN.L <ea>,FPn                                 |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0001110
  4088:             //FTAN.L <ea>,FPn                                 |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0001111
  4089:             //FETOX.L <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0010000
  4090:             //FTWOTOX.L <ea>,FPn                              |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0010001
  4091:             //FTENTOX.L <ea>,FPn                              |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0010010
  4092:             //FLOGN.L <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0010100
  4093:             //FLOG10.L <ea>,FPn                               |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0010101
  4094:             //FLOG2.L <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0010110
  4095:             //FABS.L <ea>,FPn                                 |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0011000
  4096:             //FCOSH.L <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0011001
  4097:             //FNEG.L <ea>,FPn                                 |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0011010
  4098:             //FACOS.L <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0011100
  4099:             //FCOS.L <ea>,FPn                                 |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0011101
  4100:             //FGETEXP.L <ea>,FPn                              |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0011110
  4101:             //FGETMAN.L <ea>,FPn                              |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0011111
  4102:             //FDIV.L <ea>,FPn                                 |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0100000
  4103:             //FMOD.L <ea>,FPn                                 |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0100001
  4104:             //FADD.L <ea>,FPn                                 |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0100010
  4105:             //FMUL.L <ea>,FPn                                 |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0100011
  4106:             //FSGLDIV.L <ea>,FPn                              |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0100100
  4107:             //FREM.L <ea>,FPn                                 |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0100101
  4108:             //FSCALE.L <ea>,FPn                               |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0100110
  4109:             //FSGLMUL.L <ea>,FPn                              |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0100111
  4110:             //FSUB.L <ea>,FPn                                 |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0101000
  4111:             //FCMP.L <ea>,FPn                                 |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0111000
  4112:             //FSMOVE.L <ea>,FPn                               |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn1000000
  4113:             //FSSQRT.L <ea>,FPn                               |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn1000001
  4114:             //FDMOVE.L <ea>,FPn                               |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn1000100
  4115:             //FDSQRT.L <ea>,FPn                               |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn1000101
  4116:             //FSABS.L <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn1011000
  4117:             //FSNEG.L <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn1011010
  4118:             //FDABS.L <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn1011100
  4119:             //FDNEG.L <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn1011110
  4120:             //FSDIV.L <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn1100000
  4121:             //FSADD.L <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn1100010
  4122:             //FSMUL.L <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn1100011
  4123:             //FDDIV.L <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn1100100
  4124:             //FDADD.L <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn1100110
  4125:             //FDMUL.L <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn1100111
  4126:             //FSSUB.L <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn1101000
  4127:             //FDSUB.L <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn1101100
  4128:             //FSINCOS.L <ea>,FPc:FPs                          |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000sss0110ccc
  4129:             //FTST.S <ea>                                     |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-0100010000111010
  4130:             //FMOVE.S <ea>,FPn                                |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0000000
  4131:             //FINT.S <ea>,FPn                                 |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0000001
  4132:             //FSINH.S <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0000010
  4133:             //FINTRZ.S <ea>,FPn                               |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0000011
  4134:             //FSQRT.S <ea>,FPn                                |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0000100
  4135:             //FLOGNP1.S <ea>,FPn                              |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0000110
  4136:             //FETOXM1.S <ea>,FPn                              |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0001000
  4137:             //FTANH.S <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0001001
  4138:             //FATAN.S <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0001010
  4139:             //FASIN.S <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0001100
  4140:             //FATANH.S <ea>,FPn                               |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0001101
  4141:             //FSIN.S <ea>,FPn                                 |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0001110
  4142:             //FTAN.S <ea>,FPn                                 |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0001111
  4143:             //FETOX.S <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0010000
  4144:             //FTWOTOX.S <ea>,FPn                              |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0010001
  4145:             //FTENTOX.S <ea>,FPn                              |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0010010
  4146:             //FLOGN.S <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0010100
  4147:             //FLOG10.S <ea>,FPn                               |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0010101
  4148:             //FLOG2.S <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0010110
  4149:             //FABS.S <ea>,FPn                                 |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0011000
  4150:             //FCOSH.S <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0011001
  4151:             //FNEG.S <ea>,FPn                                 |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0011010
  4152:             //FACOS.S <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0011100
  4153:             //FCOS.S <ea>,FPn                                 |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0011101
  4154:             //FGETEXP.S <ea>,FPn                              |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0011110
  4155:             //FGETMAN.S <ea>,FPn                              |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0011111
  4156:             //FDIV.S <ea>,FPn                                 |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0100000
  4157:             //FMOD.S <ea>,FPn                                 |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0100001
  4158:             //FADD.S <ea>,FPn                                 |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0100010
  4159:             //FMUL.S <ea>,FPn                                 |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0100011
  4160:             //FSGLDIV.S <ea>,FPn                              |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0100100
  4161:             //FREM.S <ea>,FPn                                 |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0100101
  4162:             //FSCALE.S <ea>,FPn                               |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0100110
  4163:             //FSGLMUL.S <ea>,FPn                              |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0100111
  4164:             //FSUB.S <ea>,FPn                                 |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0101000
  4165:             //FCMP.S <ea>,FPn                                 |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0111000
  4166:             //FSMOVE.S <ea>,FPn                               |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn1000000
  4167:             //FSSQRT.S <ea>,FPn                               |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn1000001
  4168:             //FDMOVE.S <ea>,FPn                               |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn1000100
  4169:             //FDSQRT.S <ea>,FPn                               |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn1000101
  4170:             //FSABS.S <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn1011000
  4171:             //FSNEG.S <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn1011010
  4172:             //FDABS.S <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn1011100
  4173:             //FDNEG.S <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn1011110
  4174:             //FSDIV.S <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn1100000
  4175:             //FSADD.S <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn1100010
  4176:             //FSMUL.S <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn1100011
  4177:             //FDDIV.S <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn1100100
  4178:             //FDADD.S <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn1100110
  4179:             //FDMUL.S <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn1100111
  4180:             //FSSUB.S <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn1101000
  4181:             //FDSUB.S <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn1101100
  4182:             //FSINCOS.S <ea>,FPc:FPs                          |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001sss0110ccc
  4183:             //FTST.W <ea>                                     |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-0101000000111010
  4184:             //FMOVE.W <ea>,FPn                                |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0000000
  4185:             //FINT.W <ea>,FPn                                 |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0000001
  4186:             //FSINH.W <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0000010
  4187:             //FINTRZ.W <ea>,FPn                               |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0000011
  4188:             //FSQRT.W <ea>,FPn                                |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0000100
  4189:             //FLOGNP1.W <ea>,FPn                              |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0000110
  4190:             //FETOXM1.W <ea>,FPn                              |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0001000
  4191:             //FTANH.W <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0001001
  4192:             //FATAN.W <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0001010
  4193:             //FASIN.W <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0001100
  4194:             //FATANH.W <ea>,FPn                               |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0001101
  4195:             //FSIN.W <ea>,FPn                                 |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0001110
  4196:             //FTAN.W <ea>,FPn                                 |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0001111
  4197:             //FETOX.W <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0010000
  4198:             //FTWOTOX.W <ea>,FPn                              |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0010001
  4199:             //FTENTOX.W <ea>,FPn                              |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0010010
  4200:             //FLOGN.W <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0010100
  4201:             //FLOG10.W <ea>,FPn                               |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0010101
  4202:             //FLOG2.W <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0010110
  4203:             //FABS.W <ea>,FPn                                 |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0011000
  4204:             //FCOSH.W <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0011001
  4205:             //FNEG.W <ea>,FPn                                 |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0011010
  4206:             //FACOS.W <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0011100
  4207:             //FCOS.W <ea>,FPn                                 |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0011101
  4208:             //FGETEXP.W <ea>,FPn                              |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0011110
  4209:             //FGETMAN.W <ea>,FPn                              |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0011111
  4210:             //FDIV.W <ea>,FPn                                 |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0100000
  4211:             //FMOD.W <ea>,FPn                                 |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0100001
  4212:             //FADD.W <ea>,FPn                                 |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0100010
  4213:             //FMUL.W <ea>,FPn                                 |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0100011
  4214:             //FSGLDIV.W <ea>,FPn                              |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0100100
  4215:             //FREM.W <ea>,FPn                                 |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0100101
  4216:             //FSCALE.W <ea>,FPn                               |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0100110
  4217:             //FSGLMUL.W <ea>,FPn                              |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0100111
  4218:             //FSUB.W <ea>,FPn                                 |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0101000
  4219:             //FCMP.W <ea>,FPn                                 |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0111000
  4220:             //FSMOVE.W <ea>,FPn                               |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn1000000
  4221:             //FSSQRT.W <ea>,FPn                               |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn1000001
  4222:             //FDMOVE.W <ea>,FPn                               |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn1000100
  4223:             //FDSQRT.W <ea>,FPn                               |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn1000101
  4224:             //FSABS.W <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn1011000
  4225:             //FSNEG.W <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn1011010
  4226:             //FDABS.W <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn1011100
  4227:             //FDNEG.W <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn1011110
  4228:             //FSDIV.W <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn1100000
  4229:             //FSADD.W <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn1100010
  4230:             //FSMUL.W <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn1100011
  4231:             //FDDIV.W <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn1100100
  4232:             //FDADD.W <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn1100110
  4233:             //FDMUL.W <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn1100111
  4234:             //FSSUB.W <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn1101000
  4235:             //FDSUB.W <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn1101100
  4236:             //FSINCOS.W <ea>,FPc:FPs                          |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100sss0110ccc
  4237:             //FTST.B <ea>                                     |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-0101100000111010
  4238:             //FMOVE.B <ea>,FPn                                |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0000000
  4239:             //FINT.B <ea>,FPn                                 |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0000001
  4240:             //FSINH.B <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0000010
  4241:             //FINTRZ.B <ea>,FPn                               |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0000011
  4242:             //FSQRT.B <ea>,FPn                                |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0000100
  4243:             //FLOGNP1.B <ea>,FPn                              |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0000110
  4244:             //FETOXM1.B <ea>,FPn                              |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0001000
  4245:             //FTANH.B <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0001001
  4246:             //FATAN.B <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0001010
  4247:             //FASIN.B <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0001100
  4248:             //FATANH.B <ea>,FPn                               |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0001101
  4249:             //FSIN.B <ea>,FPn                                 |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0001110
  4250:             //FTAN.B <ea>,FPn                                 |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0001111
  4251:             //FETOX.B <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0010000
  4252:             //FTWOTOX.B <ea>,FPn                              |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0010001
  4253:             //FTENTOX.B <ea>,FPn                              |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0010010
  4254:             //FLOGN.B <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0010100
  4255:             //FLOG10.B <ea>,FPn                               |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0010101
  4256:             //FLOG2.B <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0010110
  4257:             //FABS.B <ea>,FPn                                 |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0011000
  4258:             //FCOSH.B <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0011001
  4259:             //FNEG.B <ea>,FPn                                 |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0011010
  4260:             //FACOS.B <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0011100
  4261:             //FCOS.B <ea>,FPn                                 |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0011101
  4262:             //FGETEXP.B <ea>,FPn                              |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0011110
  4263:             //FGETMAN.B <ea>,FPn                              |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0011111
  4264:             //FDIV.B <ea>,FPn                                 |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0100000
  4265:             //FMOD.B <ea>,FPn                                 |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0100001
  4266:             //FADD.B <ea>,FPn                                 |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0100010
  4267:             //FMUL.B <ea>,FPn                                 |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0100011
  4268:             //FSGLDIV.B <ea>,FPn                              |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0100100
  4269:             //FREM.B <ea>,FPn                                 |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0100101
  4270:             //FSCALE.B <ea>,FPn                               |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0100110
  4271:             //FSGLMUL.B <ea>,FPn                              |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0100111
  4272:             //FSUB.B <ea>,FPn                                 |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0101000
  4273:             //FCMP.B <ea>,FPn                                 |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0111000
  4274:             //FSMOVE.B <ea>,FPn                               |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn1000000
  4275:             //FSSQRT.B <ea>,FPn                               |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn1000001
  4276:             //FDMOVE.B <ea>,FPn                               |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn1000100
  4277:             //FDSQRT.B <ea>,FPn                               |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn1000101
  4278:             //FSABS.B <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn1011000
  4279:             //FSNEG.B <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn1011010
  4280:             //FDABS.B <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn1011100
  4281:             //FDNEG.B <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn1011110
  4282:             //FSDIV.B <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn1100000
  4283:             //FSADD.B <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn1100010
  4284:             //FSMUL.B <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn1100011
  4285:             //FDDIV.B <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn1100100
  4286:             //FDADD.B <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn1100110
  4287:             //FDMUL.B <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn1100111
  4288:             //FSSUB.B <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn1101000
  4289:             //FDSUB.B <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn1101100
  4290:             //FSINCOS.B <ea>,FPc:FPs                          |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110sss0110ccc
  4291:             //FMOVE.L <ea>,FPIAR                              |-|--CC46|-|-----|-----|DAM+-WXZPI|1111_001_000_mmm_rrr-1000010000000000
  4292:             //FMOVEM.L <ea>,FPIAR                             |-|--CC46|-|-----|-----|DAM+-WXZPI|1111_001_000_mmm_rrr-1000010000000000
  4293:             //FMOVE.L <ea>,FPSR                               |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-1000100000000000
  4294:             //FMOVEM.L <ea>,FPSR                              |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-1000100000000000
  4295:             //FMOVE.L <ea>,FPCR                               |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-1001000000000000
  4296:             //FMOVEM.L <ea>,FPCR                              |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-1001000000000000
  4297:             //FMOVE.X FPn,<ea>                                |-|--CC46|-|-----|-----|  M+-WXZ  |1111_001_000_mmm_rrr-011010nnn0000000
  4298:             //FMOVE.P FPn,<ea>{#k}                            |-|--CCSS|-|-----|-----|  M+-WXZ  |1111_001_000_mmm_rrr-011011nnnkkkkkkk
  4299:             //FMOVE.D FPn,<ea>                                |-|--CC46|-|-----|-----|  M+-WXZ  |1111_001_000_mmm_rrr-011101nnn0000000
  4300:             //FMOVE.P FPn,<ea>{Dk}                            |-|--CCSS|-|-----|-----|  M+-WXZ  |1111_001_000_mmm_rrr-011111nnnkkk0000
  4301:             //FMOVEM.L FPSR/FPIAR,<ea>                        |-|--CC46|-|-----|-----|  M+-WXZ  |1111_001_000_mmm_rrr-1010110000000000
  4302:             //FMOVEM.L FPCR/FPIAR,<ea>                        |-|--CC46|-|-----|-----|  M+-WXZ  |1111_001_000_mmm_rrr-1011010000000000
  4303:             //FMOVEM.L FPCR/FPSR,<ea>                         |-|--CC46|-|-----|-----|  M+-WXZ  |1111_001_000_mmm_rrr-1011100000000000
  4304:             //FMOVEM.L FPCR/FPSR/FPIAR,<ea>                   |-|--CC46|-|-----|-----|  M+-WXZ  |1111_001_000_mmm_rrr-1011110000000000
  4305:             //FMOVEM.X #<data>,<ea>                           |-|--CC46|-|-----|-----|  M  WXZ  |1111_001_000_mmm_rrr-11110000dddddddd
  4306:             //FMOVEM.X <list>,<ea>                            |-|--CC46|-|-----|-----|  M  WXZ  |1111_001_000_mmm_rrr-11110000llllllll
  4307:             //FMOVEM.X Dl,<ea>                                |-|--CC4S|-|-----|-----|  M  WXZ  |1111_001_000_mmm_rrr-111110000lll0000
  4308:             //FMOVEM.L <ea>,FPSR/FPIAR                        |-|--CC46|-|-----|-----|  M+-WXZP |1111_001_000_mmm_rrr-1000110000000000
  4309:             //FMOVEM.L <ea>,FPCR/FPIAR                        |-|--CC46|-|-----|-----|  M+-WXZP |1111_001_000_mmm_rrr-1001010000000000
  4310:             //FMOVEM.L <ea>,FPCR/FPSR                         |-|--CC46|-|-----|-----|  M+-WXZP |1111_001_000_mmm_rrr-1001100000000000
  4311:             //FMOVEM.L <ea>,FPCR/FPSR/FPIAR                   |-|--CC46|-|-----|-----|  M+-WXZP |1111_001_000_mmm_rrr-1001110000000000
  4312:             //FMOVEM.X <ea>,#<data>                           |-|--CC46|-|-----|-----|  M+ WXZP |1111_001_000_mmm_rrr-11010000dddddddd
  4313:             //FMOVEM.X <ea>,<list>                            |-|--CC46|-|-----|-----|  M+ WXZP |1111_001_000_mmm_rrr-11010000llllllll
  4314:             //FMOVEM.X <ea>,Dl                                |-|--CC4S|-|-----|-----|  M+ WXZP |1111_001_000_mmm_rrr-110110000lll0000
  4315:             //FTST.X <ea>                                     |-|--CC46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-0100100000111010
  4316:             //FMOVE.X <ea>,FPn                                |-|--CC46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0000000
  4317:             //FINT.X <ea>,FPn                                 |-|--CCS6|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0000001
  4318:             //FSINH.X <ea>,FPn                                |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0000010
  4319:             //FINTRZ.X <ea>,FPn                               |-|--CCS6|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0000011
  4320:             //FSQRT.X <ea>,FPn                                |-|--CC46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0000100
  4321:             //FLOGNP1.X <ea>,FPn                              |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0000110
  4322:             //FETOXM1.X <ea>,FPn                              |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0001000
  4323:             //FTANH.X <ea>,FPn                                |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0001001
  4324:             //FATAN.X <ea>,FPn                                |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0001010
  4325:             //FASIN.X <ea>,FPn                                |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0001100
  4326:             //FATANH.X <ea>,FPn                               |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0001101
  4327:             //FSIN.X <ea>,FPn                                 |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0001110
  4328:             //FTAN.X <ea>,FPn                                 |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0001111
  4329:             //FETOX.X <ea>,FPn                                |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0010000
  4330:             //FTWOTOX.X <ea>,FPn                              |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0010001
  4331:             //FTENTOX.X <ea>,FPn                              |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0010010
  4332:             //FLOGN.X <ea>,FPn                                |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0010100
  4333:             //FLOG10.X <ea>,FPn                               |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0010101
  4334:             //FLOG2.X <ea>,FPn                                |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0010110
  4335:             //FABS.X <ea>,FPn                                 |-|--CC46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0011000
  4336:             //FCOSH.X <ea>,FPn                                |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0011001
  4337:             //FNEG.X <ea>,FPn                                 |-|--CC46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0011010
  4338:             //FACOS.X <ea>,FPn                                |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0011100
  4339:             //FCOS.X <ea>,FPn                                 |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0011101
  4340:             //FGETEXP.X <ea>,FPn                              |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0011110
  4341:             //FGETMAN.X <ea>,FPn                              |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0011111
  4342:             //FDIV.X <ea>,FPn                                 |-|--CC46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0100000
  4343:             //FMOD.X <ea>,FPn                                 |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0100001
  4344:             //FADD.X <ea>,FPn                                 |-|--CC46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0100010
  4345:             //FMUL.X <ea>,FPn                                 |-|--CC46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0100011
  4346:             //FSGLDIV.X <ea>,FPn                              |-|--CCS6|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0100100
  4347:             //FREM.X <ea>,FPn                                 |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0100101
  4348:             //FSCALE.X <ea>,FPn                               |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0100110
  4349:             //FSGLMUL.X <ea>,FPn                              |-|--CCS6|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0100111
  4350:             //FSUB.X <ea>,FPn                                 |-|--CC46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0101000
  4351:             //FCMP.X <ea>,FPn                                 |-|--CC46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0111000
  4352:             //FSMOVE.X <ea>,FPn                               |-|----46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn1000000
  4353:             //FSSQRT.X <ea>,FPn                               |-|----46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn1000001
  4354:             //FDMOVE.X <ea>,FPn                               |-|----46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn1000100
  4355:             //FDSQRT.X <ea>,FPn                               |-|----46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn1000101
  4356:             //FSABS.X <ea>,FPn                                |-|----46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn1011000
  4357:             //FSNEG.X <ea>,FPn                                |-|----46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn1011010
  4358:             //FDABS.X <ea>,FPn                                |-|----46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn1011100
  4359:             //FDNEG.X <ea>,FPn                                |-|----46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn1011110
  4360:             //FSDIV.X <ea>,FPn                                |-|----46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn1100000
  4361:             //FSADD.X <ea>,FPn                                |-|----46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn1100010
  4362:             //FSMUL.X <ea>,FPn                                |-|----46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn1100011
  4363:             //FDDIV.X <ea>,FPn                                |-|----46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn1100100
  4364:             //FDADD.X <ea>,FPn                                |-|----46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn1100110
  4365:             //FDMUL.X <ea>,FPn                                |-|----46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn1100111
  4366:             //FSSUB.X <ea>,FPn                                |-|----46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn1101000
  4367:             //FDSUB.X <ea>,FPn                                |-|----46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn1101100
  4368:             //FSINCOS.X <ea>,FPc:FPs                          |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010sss0110ccc
  4369:             //FTST.P <ea>                                     |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-0100110000111010
  4370:             //FMOVE.P <ea>,FPn                                |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0000000
  4371:             //FINT.P <ea>,FPn                                 |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0000001
  4372:             //FSINH.P <ea>,FPn                                |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0000010
  4373:             //FINTRZ.P <ea>,FPn                               |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0000011
  4374:             //FSQRT.P <ea>,FPn                                |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0000100
  4375:             //FLOGNP1.P <ea>,FPn                              |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0000110
  4376:             //FETOXM1.P <ea>,FPn                              |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0001000
  4377:             //FTANH.P <ea>,FPn                                |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0001001
  4378:             //FATAN.P <ea>,FPn                                |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0001010
  4379:             //FASIN.P <ea>,FPn                                |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0001100
  4380:             //FATANH.P <ea>,FPn                               |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0001101
  4381:             //FSIN.P <ea>,FPn                                 |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0001110
  4382:             //FTAN.P <ea>,FPn                                 |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0001111
  4383:             //FETOX.P <ea>,FPn                                |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0010000
  4384:             //FTWOTOX.P <ea>,FPn                              |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0010001
  4385:             //FTENTOX.P <ea>,FPn                              |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0010010
  4386:             //FLOGN.P <ea>,FPn                                |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0010100
  4387:             //FLOG10.P <ea>,FPn                               |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0010101
  4388:             //FLOG2.P <ea>,FPn                                |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0010110
  4389:             //FABS.P <ea>,FPn                                 |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0011000
  4390:             //FCOSH.P <ea>,FPn                                |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0011001
  4391:             //FNEG.P <ea>,FPn                                 |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0011010
  4392:             //FACOS.P <ea>,FPn                                |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0011100
  4393:             //FCOS.P <ea>,FPn                                 |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0011101
  4394:             //FGETEXP.P <ea>,FPn                              |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0011110
  4395:             //FGETMAN.P <ea>,FPn                              |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0011111
  4396:             //FDIV.P <ea>,FPn                                 |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0100000
  4397:             //FMOD.P <ea>,FPn                                 |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0100001
  4398:             //FADD.P <ea>,FPn                                 |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0100010
  4399:             //FMUL.P <ea>,FPn                                 |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0100011
  4400:             //FSGLDIV.P <ea>,FPn                              |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0100100
  4401:             //FREM.P <ea>,FPn                                 |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0100101
  4402:             //FSCALE.P <ea>,FPn                               |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0100110
  4403:             //FSGLMUL.P <ea>,FPn                              |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0100111
  4404:             //FSUB.P <ea>,FPn                                 |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0101000
  4405:             //FCMP.P <ea>,FPn                                 |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0111000
  4406:             //FSMOVE.P <ea>,FPn                               |-|----SS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn1000000
  4407:             //FSSQRT.P <ea>,FPn                               |-|----SS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn1000001
  4408:             //FDMOVE.P <ea>,FPn                               |-|----SS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn1000100
  4409:             //FDSQRT.P <ea>,FPn                               |-|----SS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn1000101
  4410:             //FSABS.P <ea>,FPn                                |-|----SS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn1011000
  4411:             //FSNEG.P <ea>,FPn                                |-|----SS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn1011010
  4412:             //FDABS.P <ea>,FPn                                |-|----SS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn1011100
  4413:             //FDNEG.P <ea>,FPn                                |-|----SS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn1011110
  4414:             //FSDIV.P <ea>,FPn                                |-|----SS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn1100000
  4415:             //FSADD.P <ea>,FPn                                |-|----SS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn1100010
  4416:             //FSMUL.P <ea>,FPn                                |-|----SS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn1100011
  4417:             //FDDIV.P <ea>,FPn                                |-|----SS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn1100100
  4418:             //FDADD.P <ea>,FPn                                |-|----SS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn1100110
  4419:             //FDMUL.P <ea>,FPn                                |-|----SS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn1100111
  4420:             //FSSUB.P <ea>,FPn                                |-|----SS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn1101000
  4421:             //FDSUB.P <ea>,FPn                                |-|----SS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn1101100
  4422:             //FSINCOS.P <ea>,FPc:FPs                          |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011sss0110ccc
  4423:             //FTST.D <ea>                                     |-|--CC46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-0101010000111010
  4424:             //FMOVE.D <ea>,FPn                                |-|--CC46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0000000
  4425:             //FINT.D <ea>,FPn                                 |-|--CCS6|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0000001
  4426:             //FSINH.D <ea>,FPn                                |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0000010
  4427:             //FINTRZ.D <ea>,FPn                               |-|--CCS6|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0000011
  4428:             //FSQRT.D <ea>,FPn                                |-|--CC46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0000100
  4429:             //FLOGNP1.D <ea>,FPn                              |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0000110
  4430:             //FETOXM1.D <ea>,FPn                              |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0001000
  4431:             //FTANH.D <ea>,FPn                                |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0001001
  4432:             //FATAN.D <ea>,FPn                                |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0001010
  4433:             //FASIN.D <ea>,FPn                                |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0001100
  4434:             //FATANH.D <ea>,FPn                               |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0001101
  4435:             //FSIN.D <ea>,FPn                                 |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0001110
  4436:             //FTAN.D <ea>,FPn                                 |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0001111
  4437:             //FETOX.D <ea>,FPn                                |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0010000
  4438:             //FTWOTOX.D <ea>,FPn                              |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0010001
  4439:             //FTENTOX.D <ea>,FPn                              |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0010010
  4440:             //FLOGN.D <ea>,FPn                                |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0010100
  4441:             //FLOG10.D <ea>,FPn                               |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0010101
  4442:             //FLOG2.D <ea>,FPn                                |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0010110
  4443:             //FABS.D <ea>,FPn                                 |-|--CC46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0011000
  4444:             //FCOSH.D <ea>,FPn                                |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0011001
  4445:             //FNEG.D <ea>,FPn                                 |-|--CC46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0011010
  4446:             //FACOS.D <ea>,FPn                                |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0011100
  4447:             //FCOS.D <ea>,FPn                                 |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0011101
  4448:             //FGETEXP.D <ea>,FPn                              |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0011110
  4449:             //FGETMAN.D <ea>,FPn                              |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0011111
  4450:             //FDIV.D <ea>,FPn                                 |-|--CC46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0100000
  4451:             //FMOD.D <ea>,FPn                                 |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0100001
  4452:             //FADD.D <ea>,FPn                                 |-|--CC46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0100010
  4453:             //FMUL.D <ea>,FPn                                 |-|--CC46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0100011
  4454:             //FSGLDIV.D <ea>,FPn                              |-|--CCS6|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0100100
  4455:             //FREM.D <ea>,FPn                                 |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0100101
  4456:             //FSCALE.D <ea>,FPn                               |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0100110
  4457:             //FSGLMUL.D <ea>,FPn                              |-|--CCS6|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0100111
  4458:             //FSUB.D <ea>,FPn                                 |-|--CC46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0101000
  4459:             //FCMP.D <ea>,FPn                                 |-|--CC46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0111000
  4460:             //FSMOVE.D <ea>,FPn                               |-|----46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn1000000
  4461:             //FSSQRT.D <ea>,FPn                               |-|----46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn1000001
  4462:             //FDMOVE.D <ea>,FPn                               |-|----46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn1000100
  4463:             //FDSQRT.D <ea>,FPn                               |-|----46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn1000101
  4464:             //FSABS.D <ea>,FPn                                |-|----46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn1011000
  4465:             //FSNEG.D <ea>,FPn                                |-|----46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn1011010
  4466:             //FDABS.D <ea>,FPn                                |-|----46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn1011100
  4467:             //FDNEG.D <ea>,FPn                                |-|----46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn1011110
  4468:             //FSDIV.D <ea>,FPn                                |-|----46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn1100000
  4469:             //FSADD.D <ea>,FPn                                |-|----46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn1100010
  4470:             //FSMUL.D <ea>,FPn                                |-|----46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn1100011
  4471:             //FDDIV.D <ea>,FPn                                |-|----46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn1100100
  4472:             //FDADD.D <ea>,FPn                                |-|----46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn1100110
  4473:             //FDMUL.D <ea>,FPn                                |-|----46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn1100111
  4474:             //FSSUB.D <ea>,FPn                                |-|----46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn1101000
  4475:             //FDSUB.D <ea>,FPn                                |-|----46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn1101100
  4476:             //FSINCOS.D <ea>,FPc:FPs                          |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101sss0110ccc
  4477:             //FMOVEM.X #<data>,-(Ar)                          |-|--CC46|-|-----|-----|    -     |1111_001_000_100_rrr-11100000dddddddd
  4478:             //FMOVEM.X <list>,-(Ar)                           |-|--CC46|-|-----|-----|    -     |1111_001_000_100_rrr-11100000llllllll
  4479:             //FMOVEM.X Dl,-(Ar)                               |-|--CC4S|-|-----|-----|    -     |1111_001_000_100_rrr-111010000lll0000
  4480:             //FMOVEM.L #<data>,#<data>,FPSR/FPIAR             |-|--CC4S|-|-----|-----|         I|1111_001_000_111_100-1000110000000000-{data}
  4481:             //FMOVEM.L #<data>,#<data>,FPCR/FPIAR             |-|--CC4S|-|-----|-----|         I|1111_001_000_111_100-1001010000000000-{data}
  4482:             //FMOVEM.L #<data>,#<data>,FPCR/FPSR              |-|--CC4S|-|-----|-----|         I|1111_001_000_111_100-1001100000000000-{data}
  4483:             //FMOVEM.L #<data>,#<data>,#<data>,FPCR/FPSR/FPIAR|-|--CC4S|-|-----|-----|         I|1111_001_000_111_100-1001110000000000-{data}
  4484:           case 0b1111_001_000:
  4485:             irpFgen ();
  4486:             break irpSwitch;
  4487: 
  4488:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  4489:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  4490:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  4491:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  4492:             //FSF.B <ea>                                      |-|--CC4S|-|-----|-----|D M+-WXZ  |1111_001_001_mmm_rrr-0000000000000000
  4493:             //FSEQ.B <ea>                                     |-|--CC4S|-|-----|-----|D M+-WXZ  |1111_001_001_mmm_rrr-0000000000000001
  4494:             //FSOGT.B <ea>                                    |-|--CC4S|-|-----|-----|D M+-WXZ  |1111_001_001_mmm_rrr-0000000000000010
  4495:             //FSOGE.B <ea>                                    |-|--CC4S|-|-----|-----|D M+-WXZ  |1111_001_001_mmm_rrr-0000000000000011
  4496:             //FSOLT.B <ea>                                    |-|--CC4S|-|-----|-----|D M+-WXZ  |1111_001_001_mmm_rrr-0000000000000100
  4497:             //FSOLE.B <ea>                                    |-|--CC4S|-|-----|-----|D M+-WXZ  |1111_001_001_mmm_rrr-0000000000000101
  4498:             //FSOGL.B <ea>                                    |-|--CC4S|-|-----|-----|D M+-WXZ  |1111_001_001_mmm_rrr-0000000000000110
  4499:             //FSOR.B <ea>                                     |-|--CC4S|-|-----|-----|D M+-WXZ  |1111_001_001_mmm_rrr-0000000000000111
  4500:             //FSUN.B <ea>                                     |-|--CC4S|-|-----|-----|D M+-WXZ  |1111_001_001_mmm_rrr-0000000000001000
  4501:             //FSUEQ.B <ea>                                    |-|--CC4S|-|-----|-----|D M+-WXZ  |1111_001_001_mmm_rrr-0000000000001001
  4502:             //FSUGT.B <ea>                                    |-|--CC4S|-|-----|-----|D M+-WXZ  |1111_001_001_mmm_rrr-0000000000001010
  4503:             //FSUGE.B <ea>                                    |-|--CC4S|-|-----|-----|D M+-WXZ  |1111_001_001_mmm_rrr-0000000000001011
  4504:             //FSULT.B <ea>                                    |-|--CC4S|-|-----|-----|D M+-WXZ  |1111_001_001_mmm_rrr-0000000000001100
  4505:             //FSULE.B <ea>                                    |-|--CC4S|-|-----|-----|D M+-WXZ  |1111_001_001_mmm_rrr-0000000000001101
  4506:             //FSNE.B <ea>                                     |-|--CC4S|-|-----|-----|D M+-WXZ  |1111_001_001_mmm_rrr-0000000000001110
  4507:             //FST.B <ea>                                      |-|--CC4S|-|-----|-----|D M+-WXZ  |1111_001_001_mmm_rrr-0000000000001111
  4508:             //FSSF.B <ea>                                     |-|--CC4S|-|-----|-----|D M+-WXZ  |1111_001_001_mmm_rrr-0000000000010000
  4509:             //FSSEQ.B <ea>                                    |-|--CC4S|-|-----|-----|D M+-WXZ  |1111_001_001_mmm_rrr-0000000000010001
  4510:             //FSGT.B <ea>                                     |-|--CC4S|-|-----|-----|D M+-WXZ  |1111_001_001_mmm_rrr-0000000000010010
  4511:             //FSGE.B <ea>                                     |-|--CC4S|-|-----|-----|D M+-WXZ  |1111_001_001_mmm_rrr-0000000000010011
  4512:             //FSLT.B <ea>                                     |-|--CC4S|-|-----|-----|D M+-WXZ  |1111_001_001_mmm_rrr-0000000000010100
  4513:             //FSLE.B <ea>                                     |-|--CC4S|-|-----|-----|D M+-WXZ  |1111_001_001_mmm_rrr-0000000000010101
  4514:             //FSGL.B <ea>                                     |-|--CC4S|-|-----|-----|D M+-WXZ  |1111_001_001_mmm_rrr-0000000000010110
  4515:             //FSGLE.B <ea>                                    |-|--CC4S|-|-----|-----|D M+-WXZ  |1111_001_001_mmm_rrr-0000000000010111
  4516:             //FSNGLE.B <ea>                                   |-|--CC4S|-|-----|-----|D M+-WXZ  |1111_001_001_mmm_rrr-0000000000011000
  4517:             //FSNGL.B <ea>                                    |-|--CC4S|-|-----|-----|D M+-WXZ  |1111_001_001_mmm_rrr-0000000000011001
  4518:             //FSNLE.B <ea>                                    |-|--CC4S|-|-----|-----|D M+-WXZ  |1111_001_001_mmm_rrr-0000000000011010
  4519:             //FSNLT.B <ea>                                    |-|--CC4S|-|-----|-----|D M+-WXZ  |1111_001_001_mmm_rrr-0000000000011011
  4520:             //FSNGE.B <ea>                                    |-|--CC4S|-|-----|-----|D M+-WXZ  |1111_001_001_mmm_rrr-0000000000011100
  4521:             //FSNGT.B <ea>                                    |-|--CC4S|-|-----|-----|D M+-WXZ  |1111_001_001_mmm_rrr-0000000000011101
  4522:             //FSSNE.B <ea>                                    |-|--CC4S|-|-----|-----|D M+-WXZ  |1111_001_001_mmm_rrr-0000000000011110
  4523:             //FSST.B <ea>                                     |-|--CC4S|-|-----|-----|D M+-WXZ  |1111_001_001_mmm_rrr-0000000000011111
  4524:             //FDBF Dr,<label>                                 |-|--CC4S|-|-----|-----|          |1111_001_001_001_rrr-0000000000000000-{offset}
  4525:             //FDBRA Dr,<label>                                |A|--CC4S|-|-----|-----|          |1111_001_001_001_rrr-0000000000000000-{offset}       [FDBF Dr,<label>]
  4526:             //FDBEQ Dr,<label>                                |-|--CC4S|-|-----|-----|          |1111_001_001_001_rrr-0000000000000001-{offset}
  4527:             //FDBOGT Dr,<label>                               |-|--CC4S|-|-----|-----|          |1111_001_001_001_rrr-0000000000000010-{offset}
  4528:             //FDBOGE Dr,<label>                               |-|--CC4S|-|-----|-----|          |1111_001_001_001_rrr-0000000000000011-{offset}
  4529:             //FDBOLT Dr,<label>                               |-|--CC4S|-|-----|-----|          |1111_001_001_001_rrr-0000000000000100-{offset}
  4530:             //FDBOLE Dr,<label>                               |-|--CC4S|-|-----|-----|          |1111_001_001_001_rrr-0000000000000101-{offset}
  4531:             //FDBOGL Dr,<label>                               |-|--CC4S|-|-----|-----|          |1111_001_001_001_rrr-0000000000000110-{offset}
  4532:             //FDBOR Dr,<label>                                |-|--CC4S|-|-----|-----|          |1111_001_001_001_rrr-0000000000000111-{offset}
  4533:             //FDBUN Dr,<label>                                |-|--CC4S|-|-----|-----|          |1111_001_001_001_rrr-0000000000001000-{offset}
  4534:             //FDBUEQ Dr,<label>                               |-|--CC4S|-|-----|-----|          |1111_001_001_001_rrr-0000000000001001-{offset}
  4535:             //FDBUGT Dr,<label>                               |-|--CC4S|-|-----|-----|          |1111_001_001_001_rrr-0000000000001010-{offset}
  4536:             //FDBUGE Dr,<label>                               |-|--CC4S|-|-----|-----|          |1111_001_001_001_rrr-0000000000001011-{offset}
  4537:             //FDBULT Dr,<label>                               |-|--CC4S|-|-----|-----|          |1111_001_001_001_rrr-0000000000001100-{offset}
  4538:             //FDBULE Dr,<label>                               |-|--CC4S|-|-----|-----|          |1111_001_001_001_rrr-0000000000001101-{offset}
  4539:             //FDBNE Dr,<label>                                |-|--CC4S|-|-----|-----|          |1111_001_001_001_rrr-0000000000001110-{offset}
  4540:             //FDBT Dr,<label>                                 |-|--CC4S|-|-----|-----|          |1111_001_001_001_rrr-0000000000001111-{offset}
  4541:             //FDBSF Dr,<label>                                |-|--CC4S|-|-----|-----|          |1111_001_001_001_rrr-0000000000010000-{offset}
  4542:             //FDBSEQ Dr,<label>                               |-|--CC4S|-|-----|-----|          |1111_001_001_001_rrr-0000000000010001-{offset}
  4543:             //FDBGT Dr,<label>                                |-|--CC4S|-|-----|-----|          |1111_001_001_001_rrr-0000000000010010-{offset}
  4544:             //FDBGE Dr,<label>                                |-|--CC4S|-|-----|-----|          |1111_001_001_001_rrr-0000000000010011-{offset}
  4545:             //FDBLT Dr,<label>                                |-|--CC4S|-|-----|-----|          |1111_001_001_001_rrr-0000000000010100-{offset}
  4546:             //FDBLE Dr,<label>                                |-|--CC4S|-|-----|-----|          |1111_001_001_001_rrr-0000000000010101-{offset}
  4547:             //FDBGL Dr,<label>                                |-|--CC4S|-|-----|-----|          |1111_001_001_001_rrr-0000000000010110-{offset}
  4548:             //FDBGLE Dr,<label>                               |-|--CC4S|-|-----|-----|          |1111_001_001_001_rrr-0000000000010111-{offset}
  4549:             //FDBNGLE Dr,<label>                              |-|--CC4S|-|-----|-----|          |1111_001_001_001_rrr-0000000000011000-{offset}
  4550:             //FDBNGL Dr,<label>                               |-|--CC4S|-|-----|-----|          |1111_001_001_001_rrr-0000000000011001-{offset}
  4551:             //FDBNLE Dr,<label>                               |-|--CC4S|-|-----|-----|          |1111_001_001_001_rrr-0000000000011010-{offset}
  4552:             //FDBNLT Dr,<label>                               |-|--CC4S|-|-----|-----|          |1111_001_001_001_rrr-0000000000011011-{offset}
  4553:             //FDBNGE Dr,<label>                               |-|--CC4S|-|-----|-----|          |1111_001_001_001_rrr-0000000000011100-{offset}
  4554:             //FDBNGT Dr,<label>                               |-|--CC4S|-|-----|-----|          |1111_001_001_001_rrr-0000000000011101-{offset}
  4555:             //FDBSNE Dr,<label>                               |-|--CC4S|-|-----|-----|          |1111_001_001_001_rrr-0000000000011110-{offset}
  4556:             //FDBST Dr,<label>                                |-|--CC4S|-|-----|-----|          |1111_001_001_001_rrr-0000000000011111-{offset}
  4557:             //FTRAPF.W #<data>                                |-|--CC4S|-|-----|-----|          |1111_001_001_111_010-0000000000000000-{data}
  4558:             //FTRAPEQ.W #<data>                               |-|--CC4S|-|-----|-----|          |1111_001_001_111_010-0000000000000001-{data}
  4559:             //FTRAPOGT.W #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_010-0000000000000010-{data}
  4560:             //FTRAPOGE.W #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_010-0000000000000011-{data}
  4561:             //FTRAPOLT.W #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_010-0000000000000100-{data}
  4562:             //FTRAPOLE.W #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_010-0000000000000101-{data}
  4563:             //FTRAPOGL.W #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_010-0000000000000110-{data}
  4564:             //FTRAPOR.W #<data>                               |-|--CC4S|-|-----|-----|          |1111_001_001_111_010-0000000000000111-{data}
  4565:             //FTRAPUN.W #<data>                               |-|--CC4S|-|-----|-----|          |1111_001_001_111_010-0000000000001000-{data}
  4566:             //FTRAPUEQ.W #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_010-0000000000001001-{data}
  4567:             //FTRAPUGT.W #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_010-0000000000001010-{data}
  4568:             //FTRAPUGE.W #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_010-0000000000001011-{data}
  4569:             //FTRAPULT.W #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_010-0000000000001100-{data}
  4570:             //FTRAPULE.W #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_010-0000000000001101-{data}
  4571:             //FTRAPNE.W #<data>                               |-|--CC4S|-|-----|-----|          |1111_001_001_111_010-0000000000001110-{data}
  4572:             //FTRAPT.W #<data>                                |-|--CC4S|-|-----|-----|          |1111_001_001_111_010-0000000000001111-{data}
  4573:             //FTRAPSF.W #<data>                               |-|--CC4S|-|-----|-----|          |1111_001_001_111_010-0000000000010000-{data}
  4574:             //FTRAPSEQ.W #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_010-0000000000010001-{data}
  4575:             //FTRAPGT.W #<data>                               |-|--CC4S|-|-----|-----|          |1111_001_001_111_010-0000000000010010-{data}
  4576:             //FTRAPGE.W #<data>                               |-|--CC4S|-|-----|-----|          |1111_001_001_111_010-0000000000010011-{data}
  4577:             //FTRAPLT.W #<data>                               |-|--CC4S|-|-----|-----|          |1111_001_001_111_010-0000000000010100-{data}
  4578:             //FTRAPLE.W #<data>                               |-|--CC4S|-|-----|-----|          |1111_001_001_111_010-0000000000010101-{data}
  4579:             //FTRAPGL.W #<data>                               |-|--CC4S|-|-----|-----|          |1111_001_001_111_010-0000000000010110-{data}
  4580:             //FTRAPGLE.W #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_010-0000000000010111-{data}
  4581:             //FTRAPNGLE.W #<data>                             |-|--CC4S|-|-----|-----|          |1111_001_001_111_010-0000000000011000-{data}
  4582:             //FTRAPNGL.W #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_010-0000000000011001-{data}
  4583:             //FTRAPNLE.W #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_010-0000000000011010-{data}
  4584:             //FTRAPNLT.W #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_010-0000000000011011-{data}
  4585:             //FTRAPNGE.W #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_010-0000000000011100-{data}
  4586:             //FTRAPNGT.W #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_010-0000000000011101-{data}
  4587:             //FTRAPSNE.W #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_010-0000000000011110-{data}
  4588:             //FTRAPST.W #<data>                               |-|--CC4S|-|-----|-----|          |1111_001_001_111_010-0000000000011111-{data}
  4589:             //FTRAPF.L #<data>                                |-|--CC4S|-|-----|-----|          |1111_001_001_111_011-0000000000000000-{data}
  4590:             //FTRAPEQ.L #<data>                               |-|--CC4S|-|-----|-----|          |1111_001_001_111_011-0000000000000001-{data}
  4591:             //FTRAPOGT.L #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_011-0000000000000010-{data}
  4592:             //FTRAPOGE.L #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_011-0000000000000011-{data}
  4593:             //FTRAPOLT.L #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_011-0000000000000100-{data}
  4594:             //FTRAPOLE.L #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_011-0000000000000101-{data}
  4595:             //FTRAPOGL.L #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_011-0000000000000110-{data}
  4596:             //FTRAPOR.L #<data>                               |-|--CC4S|-|-----|-----|          |1111_001_001_111_011-0000000000000111-{data}
  4597:             //FTRAPUN.L #<data>                               |-|--CC4S|-|-----|-----|          |1111_001_001_111_011-0000000000001000-{data}
  4598:             //FTRAPUEQ.L #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_011-0000000000001001-{data}
  4599:             //FTRAPUGT.L #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_011-0000000000001010-{data}
  4600:             //FTRAPUGE.L #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_011-0000000000001011-{data}
  4601:             //FTRAPULT.L #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_011-0000000000001100-{data}
  4602:             //FTRAPULE.L #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_011-0000000000001101-{data}
  4603:             //FTRAPNE.L #<data>                               |-|--CC4S|-|-----|-----|          |1111_001_001_111_011-0000000000001110-{data}
  4604:             //FTRAPT.L #<data>                                |-|--CC4S|-|-----|-----|          |1111_001_001_111_011-0000000000001111-{data}
  4605:             //FTRAPSF.L #<data>                               |-|--CC4S|-|-----|-----|          |1111_001_001_111_011-0000000000010000-{data}
  4606:             //FTRAPSEQ.L #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_011-0000000000010001-{data}
  4607:             //FTRAPGT.L #<data>                               |-|--CC4S|-|-----|-----|          |1111_001_001_111_011-0000000000010010-{data}
  4608:             //FTRAPGE.L #<data>                               |-|--CC4S|-|-----|-----|          |1111_001_001_111_011-0000000000010011-{data}
  4609:             //FTRAPLT.L #<data>                               |-|--CC4S|-|-----|-----|          |1111_001_001_111_011-0000000000010100-{data}
  4610:             //FTRAPLE.L #<data>                               |-|--CC4S|-|-----|-----|          |1111_001_001_111_011-0000000000010101-{data}
  4611:             //FTRAPGL.L #<data>                               |-|--CC4S|-|-----|-----|          |1111_001_001_111_011-0000000000010110-{data}
  4612:             //FTRAPGLE.L #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_011-0000000000010111-{data}
  4613:             //FTRAPNGLE.L #<data>                             |-|--CC4S|-|-----|-----|          |1111_001_001_111_011-0000000000011000-{data}
  4614:             //FTRAPNGL.L #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_011-0000000000011001-{data}
  4615:             //FTRAPNLE.L #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_011-0000000000011010-{data}
  4616:             //FTRAPNLT.L #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_011-0000000000011011-{data}
  4617:             //FTRAPNGE.L #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_011-0000000000011100-{data}
  4618:             //FTRAPNGT.L #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_011-0000000000011101-{data}
  4619:             //FTRAPSNE.L #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_011-0000000000011110-{data}
  4620:             //FTRAPST.L #<data>                               |-|--CC4S|-|-----|-----|          |1111_001_001_111_011-0000000000011111-{data}
  4621:             //FTRAPF                                          |-|--CC4S|-|-----|-----|          |1111_001_001_111_100-0000000000000000
  4622:             //FTRAPEQ                                         |-|--CC4S|-|-----|-----|          |1111_001_001_111_100-0000000000000001
  4623:             //FTRAPOGT                                        |-|--CC4S|-|-----|-----|          |1111_001_001_111_100-0000000000000010
  4624:             //FTRAPOGE                                        |-|--CC4S|-|-----|-----|          |1111_001_001_111_100-0000000000000011
  4625:             //FTRAPOLT                                        |-|--CC4S|-|-----|-----|          |1111_001_001_111_100-0000000000000100
  4626:             //FTRAPOLE                                        |-|--CC4S|-|-----|-----|          |1111_001_001_111_100-0000000000000101
  4627:             //FTRAPOGL                                        |-|--CC4S|-|-----|-----|          |1111_001_001_111_100-0000000000000110
  4628:             //FTRAPOR                                         |-|--CC4S|-|-----|-----|          |1111_001_001_111_100-0000000000000111
  4629:             //FTRAPUN                                         |-|--CC4S|-|-----|-----|          |1111_001_001_111_100-0000000000001000
  4630:             //FTRAPUEQ                                        |-|--CC4S|-|-----|-----|          |1111_001_001_111_100-0000000000001001
  4631:             //FTRAPUGT                                        |-|--CC4S|-|-----|-----|          |1111_001_001_111_100-0000000000001010
  4632:             //FTRAPUGE                                        |-|--CC4S|-|-----|-----|          |1111_001_001_111_100-0000000000001011
  4633:             //FTRAPULT                                        |-|--CC4S|-|-----|-----|          |1111_001_001_111_100-0000000000001100
  4634:             //FTRAPULE                                        |-|--CC4S|-|-----|-----|          |1111_001_001_111_100-0000000000001101
  4635:             //FTRAPNE                                         |-|--CC4S|-|-----|-----|          |1111_001_001_111_100-0000000000001110
  4636:             //FTRAPT                                          |-|--CC4S|-|-----|-----|          |1111_001_001_111_100-0000000000001111
  4637:             //FTRAPSF                                         |-|--CC4S|-|-----|-----|          |1111_001_001_111_100-0000000000010000
  4638:             //FTRAPSEQ                                        |-|--CC4S|-|-----|-----|          |1111_001_001_111_100-0000000000010001
  4639:             //FTRAPGT                                         |-|--CC4S|-|-----|-----|          |1111_001_001_111_100-0000000000010010
  4640:             //FTRAPGE                                         |-|--CC4S|-|-----|-----|          |1111_001_001_111_100-0000000000010011
  4641:             //FTRAPLT                                         |-|--CC4S|-|-----|-----|          |1111_001_001_111_100-0000000000010100
  4642:             //FTRAPLE                                         |-|--CC4S|-|-----|-----|          |1111_001_001_111_100-0000000000010101
  4643:             //FTRAPGL                                         |-|--CC4S|-|-----|-----|          |1111_001_001_111_100-0000000000010110
  4644:             //FTRAPGLE                                        |-|--CC4S|-|-----|-----|          |1111_001_001_111_100-0000000000010111
  4645:             //FTRAPNGLE                                       |-|--CC4S|-|-----|-----|          |1111_001_001_111_100-0000000000011000
  4646:             //FTRAPNGL                                        |-|--CC4S|-|-----|-----|          |1111_001_001_111_100-0000000000011001
  4647:             //FTRAPNLE                                        |-|--CC4S|-|-----|-----|          |1111_001_001_111_100-0000000000011010
  4648:             //FTRAPNLT                                        |-|--CC4S|-|-----|-----|          |1111_001_001_111_100-0000000000011011
  4649:             //FTRAPNGE                                        |-|--CC4S|-|-----|-----|          |1111_001_001_111_100-0000000000011100
  4650:             //FTRAPNGT                                        |-|--CC4S|-|-----|-----|          |1111_001_001_111_100-0000000000011101
  4651:             //FTRAPSNE                                        |-|--CC4S|-|-----|-----|          |1111_001_001_111_100-0000000000011110
  4652:             //FTRAPST                                         |-|--CC4S|-|-----|-----|          |1111_001_001_111_100-0000000000011111
  4653:           case 0b1111_001_001:
  4654:             irpFscc ();
  4655:             break irpSwitch;
  4656: 
  4657:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  4658:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  4659:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  4660:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  4661:             //FNOP                                            |A|--CC46|-|-----|-----|          |1111_001_010_000_000-0000000000000000        [FBF.W (*)+2]
  4662:             //FBF.W <label>                                   |-|--CC46|-|-----|-----|          |1111_001_010_000_000-{offset}
  4663:             //FBEQ.W <label>                                  |-|--CC46|-|-----|-----|          |1111_001_010_000_001-{offset}
  4664:             //FBOGT.W <label>                                 |-|--CC46|-|-----|-----|          |1111_001_010_000_010-{offset}
  4665:             //FBOGE.W <label>                                 |-|--CC46|-|-----|-----|          |1111_001_010_000_011-{offset}
  4666:             //FBOLT.W <label>                                 |-|--CC46|-|-----|-----|          |1111_001_010_000_100-{offset}
  4667:             //FBOLE.W <label>                                 |-|--CC46|-|-----|-----|          |1111_001_010_000_101-{offset}
  4668:             //FBOGL.W <label>                                 |-|--CC46|-|-----|-----|          |1111_001_010_000_110-{offset}
  4669:             //FBOR.W <label>                                  |-|--CC46|-|-----|-----|          |1111_001_010_000_111-{offset}
  4670:             //FBUN.W <label>                                  |-|--CC46|-|-----|-----|          |1111_001_010_001_000-{offset}
  4671:             //FBUEQ.W <label>                                 |-|--CC46|-|-----|-----|          |1111_001_010_001_001-{offset}
  4672:             //FBUGT.W <label>                                 |-|--CC46|-|-----|-----|          |1111_001_010_001_010-{offset}
  4673:             //FBUGE.W <label>                                 |-|--CC46|-|-----|-----|          |1111_001_010_001_011-{offset}
  4674:             //FBULT.W <label>                                 |-|--CC46|-|-----|-----|          |1111_001_010_001_100-{offset}
  4675:             //FBULE.W <label>                                 |-|--CC46|-|-----|-----|          |1111_001_010_001_101-{offset}
  4676:             //FBNE.W <label>                                  |-|--CC46|-|-----|-----|          |1111_001_010_001_110-{offset}
  4677:             //FBT.W <label>                                   |-|--CC46|-|-----|-----|          |1111_001_010_001_111-{offset}
  4678:             //FBRA.W <label>                                  |A|--CC46|-|-----|-----|          |1111_001_010_001_111-{offset}        [FBT.W <label>]
  4679:             //FBSF.W <label>                                  |-|--CC46|-|-----|-----|          |1111_001_010_010_000-{offset}
  4680:             //FBSEQ.W <label>                                 |-|--CC46|-|-----|-----|          |1111_001_010_010_001-{offset}
  4681:             //FBGT.W <label>                                  |-|--CC46|-|-----|-----|          |1111_001_010_010_010-{offset}
  4682:             //FBGE.W <label>                                  |-|--CC46|-|-----|-----|          |1111_001_010_010_011-{offset}
  4683:             //FBLT.W <label>                                  |-|--CC46|-|-----|-----|          |1111_001_010_010_100-{offset}
  4684:             //FBLE.W <label>                                  |-|--CC46|-|-----|-----|          |1111_001_010_010_101-{offset}
  4685:             //FBGL.W <label>                                  |-|--CC46|-|-----|-----|          |1111_001_010_010_110-{offset}
  4686:             //FBGLE.W <label>                                 |-|--CC46|-|-----|-----|          |1111_001_010_010_111-{offset}
  4687:             //FBNGLE.W <label>                                |-|--CC46|-|-----|-----|          |1111_001_010_011_000-{offset}
  4688:             //FBNGL.W <label>                                 |-|--CC46|-|-----|-----|          |1111_001_010_011_001-{offset}
  4689:             //FBNLE.W <label>                                 |-|--CC46|-|-----|-----|          |1111_001_010_011_010-{offset}
  4690:             //FBNLT.W <label>                                 |-|--CC46|-|-----|-----|          |1111_001_010_011_011-{offset}
  4691:             //FBNGE.W <label>                                 |-|--CC46|-|-----|-----|          |1111_001_010_011_100-{offset}
  4692:             //FBNGT.W <label>                                 |-|--CC46|-|-----|-----|          |1111_001_010_011_101-{offset}
  4693:             //FBSNE.W <label>                                 |-|--CC46|-|-----|-----|          |1111_001_010_011_110-{offset}
  4694:             //FBST.W <label>                                  |-|--CC46|-|-----|-----|          |1111_001_010_011_111-{offset}
  4695:           case 0b1111_001_010:
  4696:             irpFbccWord ();
  4697:             break irpSwitch;
  4698: 
  4699:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  4700:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  4701:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  4702:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  4703:             //FBF.L <label>                                   |-|--CC46|-|-----|-----|          |1111_001_011_000_000-{offset}
  4704:             //FBEQ.L <label>                                  |-|--CC46|-|-----|-----|          |1111_001_011_000_001-{offset}
  4705:             //FBOGT.L <label>                                 |-|--CC46|-|-----|-----|          |1111_001_011_000_010-{offset}
  4706:             //FBOGE.L <label>                                 |-|--CC46|-|-----|-----|          |1111_001_011_000_011-{offset}
  4707:             //FBOLT.L <label>                                 |-|--CC46|-|-----|-----|          |1111_001_011_000_100-{offset}
  4708:             //FBOLE.L <label>                                 |-|--CC46|-|-----|-----|          |1111_001_011_000_101-{offset}
  4709:             //FBOGL.L <label>                                 |-|--CC46|-|-----|-----|          |1111_001_011_000_110-{offset}
  4710:             //FBOR.L <label>                                  |-|--CC46|-|-----|-----|          |1111_001_011_000_111-{offset}
  4711:             //FBUN.L <label>                                  |-|--CC46|-|-----|-----|          |1111_001_011_001_000-{offset}
  4712:             //FBUEQ.L <label>                                 |-|--CC46|-|-----|-----|          |1111_001_011_001_001-{offset}
  4713:             //FBUGT.L <label>                                 |-|--CC46|-|-----|-----|          |1111_001_011_001_010-{offset}
  4714:             //FBUGE.L <label>                                 |-|--CC46|-|-----|-----|          |1111_001_011_001_011-{offset}
  4715:             //FBULT.L <label>                                 |-|--CC46|-|-----|-----|          |1111_001_011_001_100-{offset}
  4716:             //FBULE.L <label>                                 |-|--CC46|-|-----|-----|          |1111_001_011_001_101-{offset}
  4717:             //FBNE.L <label>                                  |-|--CC46|-|-----|-----|          |1111_001_011_001_110-{offset}
  4718:             //FBT.L <label>                                   |-|--CC46|-|-----|-----|          |1111_001_011_001_111-{offset}
  4719:             //FBRA.L <label>                                  |A|--CC46|-|-----|-----|          |1111_001_011_001_111-{offset}        [FBT.L <label>]
  4720:             //FBSF.L <label>                                  |-|--CC46|-|-----|-----|          |1111_001_011_010_000-{offset}
  4721:             //FBSEQ.L <label>                                 |-|--CC46|-|-----|-----|          |1111_001_011_010_001-{offset}
  4722:             //FBGT.L <label>                                  |-|--CC46|-|-----|-----|          |1111_001_011_010_010-{offset}
  4723:             //FBGE.L <label>                                  |-|--CC46|-|-----|-----|          |1111_001_011_010_011-{offset}
  4724:             //FBLT.L <label>                                  |-|--CC46|-|-----|-----|          |1111_001_011_010_100-{offset}
  4725:             //FBLE.L <label>                                  |-|--CC46|-|-----|-----|          |1111_001_011_010_101-{offset}
  4726:             //FBGL.L <label>                                  |-|--CC46|-|-----|-----|          |1111_001_011_010_110-{offset}
  4727:             //FBGLE.L <label>                                 |-|--CC46|-|-----|-----|          |1111_001_011_010_111-{offset}
  4728:             //FBNGLE.L <label>                                |-|--CC46|-|-----|-----|          |1111_001_011_011_000-{offset}
  4729:             //FBNGL.L <label>                                 |-|--CC46|-|-----|-----|          |1111_001_011_011_001-{offset}
  4730:             //FBNLE.L <label>                                 |-|--CC46|-|-----|-----|          |1111_001_011_011_010-{offset}
  4731:             //FBNLT.L <label>                                 |-|--CC46|-|-----|-----|          |1111_001_011_011_011-{offset}
  4732:             //FBNGE.L <label>                                 |-|--CC46|-|-----|-----|          |1111_001_011_011_100-{offset}
  4733:             //FBNGT.L <label>                                 |-|--CC46|-|-----|-----|          |1111_001_011_011_101-{offset}
  4734:             //FBSNE.L <label>                                 |-|--CC46|-|-----|-----|          |1111_001_011_011_110-{offset}
  4735:             //FBST.L <label>                                  |-|--CC46|-|-----|-----|          |1111_001_011_011_111-{offset}
  4736:           case 0b1111_001_011:
  4737:             irpFbccLong ();
  4738:             break irpSwitch;
  4739: 
  4740:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  4741:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  4742:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  4743:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  4744:             //FSAVE <ea>                                      |-|--CC46|P|-----|-----|  M -WXZ  |1111_001_100_mmm_rrr
  4745:           case 0b1111_001_100:
  4746:             irpFsave ();
  4747:             break irpSwitch;
  4748: 
  4749:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  4750:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  4751:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  4752:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  4753:             //FRESTORE <ea>                                   |-|--CC46|P|-----|-----|  M+ WXZP |1111_001_101_mmm_rrr
  4754:           case 0b1111_001_101:
  4755:             irpFrestore ();
  4756:             break irpSwitch;
  4757: 
  4758:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  4759:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  4760:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  4761:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  4762:             //CINVL NC,(Ar)                                   |-|----46|P|-----|-----|          |1111_010_000_001_rrr
  4763:             //CINVP NC,(Ar)                                   |-|----46|P|-----|-----|          |1111_010_000_010_rrr
  4764:             //CINVA NC                                        |-|----46|P|-----|-----|          |1111_010_000_011_000
  4765:             //CPUSHL NC,(Ar)                                  |-|----46|P|-----|-----|          |1111_010_000_101_rrr
  4766:             //CPUSHP NC,(Ar)                                  |-|----46|P|-----|-----|          |1111_010_000_110_rrr
  4767:             //CPUSHA NC                                       |-|----46|P|-----|-----|          |1111_010_000_111_000
  4768:           case 0b1111_010_000:
  4769:             irpCinvCpushNC ();
  4770:             break irpSwitch;
  4771: 
  4772:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  4773:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  4774:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  4775:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  4776:             //CINVL DC,(Ar)                                   |-|----46|P|-----|-----|          |1111_010_001_001_rrr
  4777:             //CINVP DC,(Ar)                                   |-|----46|P|-----|-----|          |1111_010_001_010_rrr
  4778:             //CINVA DC                                        |-|----46|P|-----|-----|          |1111_010_001_011_000
  4779:             //CPUSHL DC,(Ar)                                  |-|----46|P|-----|-----|          |1111_010_001_101_rrr
  4780:             //CPUSHP DC,(Ar)                                  |-|----46|P|-----|-----|          |1111_010_001_110_rrr
  4781:             //CPUSHA DC                                       |-|----46|P|-----|-----|          |1111_010_001_111_000
  4782:           case 0b1111_010_001:
  4783:             irpCinvCpushDC ();
  4784:             break irpSwitch;
  4785: 
  4786:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  4787:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  4788:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  4789:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  4790:             //CINVL IC,(Ar)                                   |-|----46|P|-----|-----|          |1111_010_010_001_rrr
  4791:             //CINVP IC,(Ar)                                   |-|----46|P|-----|-----|          |1111_010_010_010_rrr
  4792:             //CINVA IC                                        |-|----46|P|-----|-----|          |1111_010_010_011_000
  4793:             //CPUSHL IC,(Ar)                                  |-|----46|P|-----|-----|          |1111_010_010_101_rrr
  4794:             //CPUSHP IC,(Ar)                                  |-|----46|P|-----|-----|          |1111_010_010_110_rrr
  4795:             //CPUSHA IC                                       |-|----46|P|-----|-----|          |1111_010_010_111_000
  4796:           case 0b1111_010_010:
  4797:             irpCinvCpushIC ();
  4798:             break irpSwitch;
  4799: 
  4800:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  4801:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  4802:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  4803:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  4804:             //CINVL BC,(Ar)                                   |-|----46|P|-----|-----|          |1111_010_011_001_rrr
  4805:             //CINVP BC,(Ar)                                   |-|----46|P|-----|-----|          |1111_010_011_010_rrr
  4806:             //CINVA BC                                        |-|----46|P|-----|-----|          |1111_010_011_011_000
  4807:             //CPUSHL BC,(Ar)                                  |-|----46|P|-----|-----|          |1111_010_011_101_rrr
  4808:             //CPUSHP BC,(Ar)                                  |-|----46|P|-----|-----|          |1111_010_011_110_rrr
  4809:             //CPUSHA BC                                       |-|----46|P|-----|-----|          |1111_010_011_111_000
  4810:           case 0b1111_010_011:
  4811:             irpCinvCpushBC ();
  4812:             break irpSwitch;
  4813: 
  4814:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  4815:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  4816:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  4817:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  4818:             //PFLUSHN (Ar)                                    |-|----46|P|-----|-----|          |1111_010_100_000_rrr
  4819:             //PFLUSH (Ar)                                     |-|----46|P|-----|-----|          |1111_010_100_001_rrr
  4820:             //PFLUSHAN                                        |-|----46|P|-----|-----|          |1111_010_100_010_000
  4821:             //PFLUSHA                                         |-|----46|P|-----|-----|          |1111_010_100_011_000
  4822:           case 0b1111_010_100:
  4823:             irpPflush ();
  4824:             break irpSwitch;
  4825: 
  4826:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  4827:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  4828:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  4829:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  4830:             //PLPAW (Ar)                                      |-|-----6|P|-----|-----|          |1111_010_110_001_rrr
  4831:           case 0b1111_010_110:
  4832:             irpPlpaw ();
  4833:             break irpSwitch;
  4834: 
  4835:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  4836:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  4837:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  4838:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  4839:             //PLPAR (Ar)                                      |-|-----6|P|-----|-----|          |1111_010_111_001_rrr
  4840:           case 0b1111_010_111:
  4841:             irpPlpar ();
  4842:             break irpSwitch;
  4843: 
  4844:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  4845:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  4846:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  4847:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  4848:             //MOVE16 (Ar)+,xxx.L                              |-|----46|-|-----|-----|          |1111_011_000_000_rrr-{address}
  4849:             //MOVE16 xxx.L,(Ar)+                              |-|----46|-|-----|-----|          |1111_011_000_001_rrr-{address}
  4850:             //MOVE16 (Ar),xxx.L                               |-|----46|-|-----|-----|          |1111_011_000_010_rrr-{address}
  4851:             //MOVE16 xxx.L,(Ar)                               |-|----46|-|-----|-----|          |1111_011_000_011_rrr-{address}
  4852:             //MOVE16 (Ar)+,(An)+                              |-|----46|-|-----|-----|          |1111_011_000_100_rrr-1nnn000000000000
  4853:           case 0b1111_011_000:
  4854:             irpMove16 ();
  4855:             break irpSwitch;
  4856: 
  4857:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  4858:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  4859:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  4860:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  4861:             //LPSTOP.W #<data>                                |-|-----6|P|-----|-----|          |1111_100_000_000_000-0000000111000000-{data}
  4862:           case 0b1111_100_000:
  4863:             irpLpstop ();
  4864:             break irpSwitch;
  4865: 
  4866:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  4867:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  4868:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  4869:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  4870:             //FPACK <data>                                    |A|012346|-|UUUUU|*****|          |1111_111_0dd_ddd_ddd [FLINE #<data>]
  4871:           case 0b1111_111_000:
  4872:           case 0b1111_111_001:
  4873:           case 0b1111_111_010:
  4874:           case 0b1111_111_011:
  4875:             irpFpack ();
  4876:             break irpSwitch;
  4877: 
  4878:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  4879:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  4880:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  4881:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  4882:             //DOS <data>                                      |A|012346|-|UUUUU|UUUUU|          |1111_111_1dd_ddd_ddd [FLINE #<data>]
  4883:           case 0b1111_111_100:
  4884:           case 0b1111_111_101:
  4885:           case 0b1111_111_110:
  4886:           case 0b1111_111_111:
  4887:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  4888:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  4889:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  4890:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  4891:             //FLINE #<data>                                   |-|012346|-|UUUUU|UUUUU|          |1111_ddd_ddd_ddd_ddd (line 1111 emulator)
  4892:           case 0b1111_000_000:
  4893:           case 0b1111_000_001:
  4894:           case 0b1111_000_010:
  4895:           case 0b1111_000_011:
  4896:           case 0b1111_000_100:
  4897:           case 0b1111_000_101:
  4898:           case 0b1111_000_110:
  4899:           case 0b1111_000_111:
  4900:           case 0b1111_001_110:
  4901:           case 0b1111_001_111:
  4902:           case 0b1111_010_101:
  4903:           case 0b1111_011_001:
  4904:           case 0b1111_011_010:
  4905:           case 0b1111_011_011:
  4906:           case 0b1111_011_100:
  4907:           case 0b1111_011_101:
  4908:           case 0b1111_011_110:
  4909:           case 0b1111_011_111:
  4910:           case 0b1111_100_001:
  4911:           case 0b1111_100_010:
  4912:           case 0b1111_100_011:
  4913:           case 0b1111_100_100:
  4914:           case 0b1111_100_101:
  4915:           case 0b1111_100_110:
  4916:           case 0b1111_100_111:
  4917:           case 0b1111_101_000:
  4918:           case 0b1111_101_001:
  4919:           case 0b1111_101_010:
  4920:           case 0b1111_101_011:
  4921:           case 0b1111_101_100:
  4922:           case 0b1111_101_101:
  4923:           case 0b1111_101_110:
  4924:           case 0b1111_101_111:
  4925:           case 0b1111_110_000:
  4926:           case 0b1111_110_001:
  4927:           case 0b1111_110_010:
  4928:           case 0b1111_110_011:
  4929:           case 0b1111_110_100:
  4930:           case 0b1111_110_101:
  4931:           case 0b1111_110_110:
  4932:           case 0b1111_110_111:
  4933:             irpFline ();
  4934:             break irpSwitch;
  4935: 
  4936:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  4937:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  4938:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  4939:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  4940:             //HFSBOOT                                         |-|012346|-|-----|-----|          |0100_111_000_000_000
  4941:             //HFSINST                                         |-|012346|-|-----|-----|          |0100_111_000_000_001
  4942:             //HFSSTR                                          |-|012346|-|-----|-----|          |0100_111_000_000_010
  4943:             //HFSINT                                          |-|012346|-|-----|-----|          |0100_111_000_000_011
  4944:             //EMXNOP                                          |-|012346|-|-----|-----|          |0100_111_000_000_100
  4945:           case 0b0100_111_000:
  4946:             irpEmx ();
  4947:             break;
  4948: 
  4949:           default:
  4950:             irpIllegal ();
  4951: 
  4952:           }  //switch XEiJ.regOC >>> 6
  4953: 
  4954:           //トレース例外
  4955:           //  命令実行前にsrのTビットがセットされていたとき命令実行後にトレース例外が発生する
  4956:           //  トレース例外の発動は命令の機能拡張であり、他の例外処理で命令が中断されたときはトレース例外は発生しない
  4957:           //  命令例外はトレース例外の前に、割り込み例外はトレース例外の後に処理される
  4958:           //  未実装命令のエミュレーションルーチンはrteの直前にsrのTビットを復元することで未実装命令が1個の命令としてトレースされたように見せる
  4959:           //    ;DOSコールの終了
  4960:           //    ~008616:
  4961:           //            btst.b  #$07,(sp)
  4962:           //            bne.s   ~00861E
  4963:           //            rte
  4964:           //    ~00861E:
  4965:           //            ori.w   #$8000,sr
  4966:           //            rte
  4967:           if (XEiJ.mpuTraceFlag != 0) {  //命令実行前にsrのTビットがセットされていた
  4968:             irpExceptionFormat2 (M68kException.M6E_TRACE << 2, XEiJ.regPC, XEiJ.regPC0);  //pcは次の命令
  4969:           }
  4970:           //クロックをカウントアップする
  4971:           //  オペランドをアクセスした時点ではまだXEiJ.mpuClockTimeが更新されていないのでXEiJ.mpuClockTime<xxxClock
  4972:           //  xxxTickを呼び出すときはXEiJ.mpuClockTime>=xxxClock
  4973:           XEiJ.mpuClockTime += XEiJ.mpuModifiedUnit * XEiJ.mpuCycleCount;
  4974:           //デバイスを呼び出す
  4975:           TickerQueue.tkqRun (XEiJ.mpuClockTime);
  4976:           //割り込みを受け付ける
  4977:           if ((t = XEiJ.mpuIMR & XEiJ.mpuIRR) != 0) {  //マスクされているレベルよりも高くて受け付けていない割り込みがあるとき
  4978:             if (XEiJ.MPU_INTERRUPT_SWITCH) {
  4979:               switch (t) {
  4980:               case 0b00000001:
  4981:               case 0b00000011:
  4982:               case 0b00000101:
  4983:               case 0b00000111:
  4984:               case 0b00001001:
  4985:               case 0b00001011:
  4986:               case 0b00001101:
  4987:               case 0b00001111:
  4988:               case 0b00010001:
  4989:               case 0b00010011:
  4990:               case 0b00010101:
  4991:               case 0b00010111:
  4992:               case 0b00011001:
  4993:               case 0b00011011:
  4994:               case 0b00011101:
  4995:               case 0b00011111:
  4996:               case 0b00100001:
  4997:               case 0b00100011:
  4998:               case 0b00100101:
  4999:               case 0b00100111:
  5000:               case 0b00101001:
  5001:               case 0b00101011:
  5002:               case 0b00101101:
  5003:               case 0b00101111:
  5004:               case 0b00110001:
  5005:               case 0b00110011:
  5006:               case 0b00110101:
  5007:               case 0b00110111:
  5008:               case 0b00111001:
  5009:               case 0b00111011:
  5010:               case 0b00111101:
  5011:               case 0b00111111:
  5012:               case 0b01000001:
  5013:               case 0b01000011:
  5014:               case 0b01000101:
  5015:               case 0b01000111:
  5016:               case 0b01001001:
  5017:               case 0b01001011:
  5018:               case 0b01001101:
  5019:               case 0b01001111:
  5020:               case 0b01010001:
  5021:               case 0b01010011:
  5022:               case 0b01010101:
  5023:               case 0b01010111:
  5024:               case 0b01011001:
  5025:               case 0b01011011:
  5026:               case 0b01011101:
  5027:               case 0b01011111:
  5028:               case 0b01100001:
  5029:               case 0b01100011:
  5030:               case 0b01100101:
  5031:               case 0b01100111:
  5032:               case 0b01101001:
  5033:               case 0b01101011:
  5034:               case 0b01101101:
  5035:               case 0b01101111:
  5036:               case 0b01110001:
  5037:               case 0b01110011:
  5038:               case 0b01110101:
  5039:               case 0b01110111:
  5040:               case 0b01111001:
  5041:               case 0b01111011:
  5042:               case 0b01111101:
  5043:               case 0b01111111:
  5044:               case 0b10000001:
  5045:               case 0b10000011:
  5046:               case 0b10000101:
  5047:               case 0b10000111:
  5048:               case 0b10001001:
  5049:               case 0b10001011:
  5050:               case 0b10001101:
  5051:               case 0b10001111:
  5052:               case 0b10010001:
  5053:               case 0b10010011:
  5054:               case 0b10010101:
  5055:               case 0b10010111:
  5056:               case 0b10011001:
  5057:               case 0b10011011:
  5058:               case 0b10011101:
  5059:               case 0b10011111:
  5060:               case 0b10100001:
  5061:               case 0b10100011:
  5062:               case 0b10100101:
  5063:               case 0b10100111:
  5064:               case 0b10101001:
  5065:               case 0b10101011:
  5066:               case 0b10101101:
  5067:               case 0b10101111:
  5068:               case 0b10110001:
  5069:               case 0b10110011:
  5070:               case 0b10110101:
  5071:               case 0b10110111:
  5072:               case 0b10111001:
  5073:               case 0b10111011:
  5074:               case 0b10111101:
  5075:               case 0b10111111:
  5076:               case 0b11000001:
  5077:               case 0b11000011:
  5078:               case 0b11000101:
  5079:               case 0b11000111:
  5080:               case 0b11001001:
  5081:               case 0b11001011:
  5082:               case 0b11001101:
  5083:               case 0b11001111:
  5084:               case 0b11010001:
  5085:               case 0b11010011:
  5086:               case 0b11010101:
  5087:               case 0b11010111:
  5088:               case 0b11011001:
  5089:               case 0b11011011:
  5090:               case 0b11011101:
  5091:               case 0b11011111:
  5092:               case 0b11100001:
  5093:               case 0b11100011:
  5094:               case 0b11100101:
  5095:               case 0b11100111:
  5096:               case 0b11101001:
  5097:               case 0b11101011:
  5098:               case 0b11101101:
  5099:               case 0b11101111:
  5100:               case 0b11110001:
  5101:               case 0b11110011:
  5102:               case 0b11110101:
  5103:               case 0b11110111:
  5104:               case 0b11111001:
  5105:               case 0b11111011:
  5106:               case 0b11111101:
  5107:               case 0b11111111:
  5108:                 //レベル7
  5109:                 XEiJ.mpuIRR &= ~XEiJ.MPU_SYS_INTERRUPT_MASK;  //割り込みを受け付ける
  5110:                 if ((t = XEiJ.sysAcknowledge ()) != 0) {  //デバイスにベクタ番号を要求して割り込み処理中の状態になったとき
  5111:                   irpInterrupt (t << 2, XEiJ.MPU_SYS_INTERRUPT_LEVEL);  //割り込み処理を開始する
  5112:                 }
  5113:                 break;
  5114:               case 0b00000010:
  5115:               case 0b00000110:
  5116:               case 0b00001010:
  5117:               case 0b00001110:
  5118:               case 0b00010010:
  5119:               case 0b00010110:
  5120:               case 0b00011010:
  5121:               case 0b00011110:
  5122:               case 0b00100010:
  5123:               case 0b00100110:
  5124:               case 0b00101010:
  5125:               case 0b00101110:
  5126:               case 0b00110010:
  5127:               case 0b00110110:
  5128:               case 0b00111010:
  5129:               case 0b00111110:
  5130:               case 0b01000010:
  5131:               case 0b01000110:
  5132:               case 0b01001010:
  5133:               case 0b01001110:
  5134:               case 0b01010010:
  5135:               case 0b01010110:
  5136:               case 0b01011010:
  5137:               case 0b01011110:
  5138:               case 0b01100010:
  5139:               case 0b01100110:
  5140:               case 0b01101010:
  5141:               case 0b01101110:
  5142:               case 0b01110010:
  5143:               case 0b01110110:
  5144:               case 0b01111010:
  5145:               case 0b01111110:
  5146:               case 0b10000010:
  5147:               case 0b10000110:
  5148:               case 0b10001010:
  5149:               case 0b10001110:
  5150:               case 0b10010010:
  5151:               case 0b10010110:
  5152:               case 0b10011010:
  5153:               case 0b10011110:
  5154:               case 0b10100010:
  5155:               case 0b10100110:
  5156:               case 0b10101010:
  5157:               case 0b10101110:
  5158:               case 0b10110010:
  5159:               case 0b10110110:
  5160:               case 0b10111010:
  5161:               case 0b10111110:
  5162:               case 0b11000010:
  5163:               case 0b11000110:
  5164:               case 0b11001010:
  5165:               case 0b11001110:
  5166:               case 0b11010010:
  5167:               case 0b11010110:
  5168:               case 0b11011010:
  5169:               case 0b11011110:
  5170:               case 0b11100010:
  5171:               case 0b11100110:
  5172:               case 0b11101010:
  5173:               case 0b11101110:
  5174:               case 0b11110010:
  5175:               case 0b11110110:
  5176:               case 0b11111010:
  5177:               case 0b11111110:
  5178:                 //レベル6
  5179:                 XEiJ.mpuIRR &= ~XEiJ.MPU_MFP_INTERRUPT_MASK;  //割り込みを受け付ける
  5180:                 if ((t = MC68901.mfpAcknowledge ()) != 0) {  //デバイスにベクタ番号を要求して割り込み処理中の状態になったとき
  5181:                   irpInterrupt (t << 2, XEiJ.MPU_MFP_INTERRUPT_LEVEL);  //割り込み処理を開始する
  5182:                 }
  5183:                 break;
  5184:               case 0b00000100:
  5185:               case 0b00001100:
  5186:               case 0b00010100:
  5187:               case 0b00011100:
  5188:               case 0b00100100:
  5189:               case 0b00101100:
  5190:               case 0b00110100:
  5191:               case 0b00111100:
  5192:               case 0b01000100:
  5193:               case 0b01001100:
  5194:               case 0b01010100:
  5195:               case 0b01011100:
  5196:               case 0b01100100:
  5197:               case 0b01101100:
  5198:               case 0b01110100:
  5199:               case 0b01111100:
  5200:               case 0b10000100:
  5201:               case 0b10001100:
  5202:               case 0b10010100:
  5203:               case 0b10011100:
  5204:               case 0b10100100:
  5205:               case 0b10101100:
  5206:               case 0b10110100:
  5207:               case 0b10111100:
  5208:               case 0b11000100:
  5209:               case 0b11001100:
  5210:               case 0b11010100:
  5211:               case 0b11011100:
  5212:               case 0b11100100:
  5213:               case 0b11101100:
  5214:               case 0b11110100:
  5215:               case 0b11111100:
  5216:                 //レベル5
  5217:                 XEiJ.mpuIRR &= ~XEiJ.MPU_SCC_INTERRUPT_MASK;  //割り込みを受け付ける
  5218:                 if ((t = Z8530.sccAcknowledge ()) != 0) {  //デバイスにベクタ番号を要求して割り込み処理中の状態になったとき
  5219:                   irpInterrupt (t << 2, XEiJ.MPU_SCC_INTERRUPT_LEVEL);  //割り込み処理を開始する
  5220:                 }
  5221:                 break;
  5222:               case 0b00010000:
  5223:               case 0b00110000:
  5224:               case 0b01010000:
  5225:               case 0b01110000:
  5226:               case 0b10010000:
  5227:               case 0b10110000:
  5228:               case 0b11010000:
  5229:               case 0b11110000:
  5230:                 //レベル3
  5231:                 XEiJ.mpuIRR &= ~XEiJ.MPU_DMA_INTERRUPT_MASK;  //割り込みを受け付ける
  5232:                 if ((t = HD63450.dmaAcknowledge ()) != 0) {  //デバイスにベクタ番号を要求して割り込み処理中の状態になったとき
  5233:                   irpInterrupt (t << 2, XEiJ.MPU_DMA_INTERRUPT_LEVEL);  //割り込み処理を開始する
  5234:                 }
  5235:                 break;
  5236:               case 0b00100000:
  5237:               case 0b01100000:
  5238:               case 0b10100000:
  5239:               case 0b11100000:
  5240:                 //レベル2
  5241:                 XEiJ.mpuIRR &= ~XEiJ.MPU_EB2_INTERRUPT_MASK;  //割り込みを受け付ける
  5242:                 if ((t = XEiJ.eb2Acknowledge ()) != 0) {  //デバイスにベクタ番号を要求して割り込み処理中の状態になったとき
  5243:                   irpInterrupt (t << 2, XEiJ.MPU_EB2_INTERRUPT_LEVEL);  //割り込み処理を開始する
  5244:                 }
  5245:                 break;
  5246:               case 0b01000000:
  5247:               case 0b11000000:
  5248:                 //レベル1
  5249:                 XEiJ.mpuIRR &= ~XEiJ.MPU_IOI_INTERRUPT_MASK;  //割り込みを受け付ける
  5250:                 if ((t = IOInterrupt.ioiAcknowledge ()) != 0) {  //デバイスにベクタ番号を要求して割り込み処理中の状態になったとき
  5251:                   irpInterrupt (t << 2, XEiJ.MPU_IOI_INTERRUPT_LEVEL);  //割り込み処理を開始する
  5252:                 }
  5253:                 break;
  5254:               }
  5255:             } else {
  5256:               t &= -t;
  5257:               //  x&=-xはxの最下位の1のビットだけを残す演算
  5258:               //  すなわちマスクされているレベルよりも高くて受け付けていない割り込みの中で最高レベルの割り込みのビットだけが残る
  5259:               //  最高レベルの割り込みのビットしか残っていないので、割り込みの有無をレベルの高い順ではなく使用頻度の高い順に調べられる
  5260:               //  MFPやDMAの割り込みがかかる度にそれより優先度の高いインタラプトスイッチが押されていないかどうかを確かめる必要がない
  5261:               if (t == XEiJ.MPU_MFP_INTERRUPT_MASK) {
  5262:                 XEiJ.mpuIRR &= ~XEiJ.MPU_MFP_INTERRUPT_MASK;  //割り込みを受け付ける
  5263:                 if ((t = MC68901.mfpAcknowledge ()) != 0) {  //デバイスにベクタ番号を要求して割り込み処理中の状態になったとき
  5264:                   irpInterrupt (t << 2, XEiJ.MPU_MFP_INTERRUPT_LEVEL);  //割り込み処理を開始する
  5265:                 }
  5266:               } else if (t == XEiJ.MPU_DMA_INTERRUPT_MASK) {
  5267:                 XEiJ.mpuIRR &= ~XEiJ.MPU_DMA_INTERRUPT_MASK;  //割り込みを受け付ける
  5268:                 if ((t = HD63450.dmaAcknowledge ()) != 0) {  //デバイスにベクタ番号を要求して割り込み処理中の状態になったとき
  5269:                   irpInterrupt (t << 2, XEiJ.MPU_DMA_INTERRUPT_LEVEL);  //割り込み処理を開始する
  5270:                 }
  5271:               } else if (t == XEiJ.MPU_SCC_INTERRUPT_MASK) {
  5272:                 XEiJ.mpuIRR &= ~XEiJ.MPU_SCC_INTERRUPT_MASK;  //割り込みを受け付ける
  5273:                 if ((t = Z8530.sccAcknowledge ()) != 0) {  //デバイスにベクタ番号を要求して割り込み処理中の状態になったとき
  5274:                   irpInterrupt (t << 2, XEiJ.MPU_SCC_INTERRUPT_LEVEL);  //割り込み処理を開始する
  5275:                 }
  5276:               } else if (t == XEiJ.MPU_IOI_INTERRUPT_MASK) {
  5277:                 XEiJ.mpuIRR &= ~XEiJ.MPU_IOI_INTERRUPT_MASK;  //割り込みを受け付ける
  5278:                 if ((t = IOInterrupt.ioiAcknowledge ()) != 0) {  //デバイスにベクタ番号を要求して割り込み処理中の状態になったとき
  5279:                   irpInterrupt (t << 2, XEiJ.MPU_IOI_INTERRUPT_LEVEL);  //割り込み処理を開始する
  5280:                 }
  5281:               } else if (t == XEiJ.MPU_EB2_INTERRUPT_MASK) {
  5282:                 XEiJ.mpuIRR &= ~XEiJ.MPU_EB2_INTERRUPT_MASK;  //割り込みを受け付ける
  5283:                 if ((t = XEiJ.eb2Acknowledge ()) != 0) {  //デバイスにベクタ番号を要求して割り込み処理中の状態になったとき
  5284:                   irpInterrupt (t << 2, XEiJ.MPU_EB2_INTERRUPT_LEVEL);  //割り込み処理を開始する
  5285:                 }
  5286:               } else if (t == XEiJ.MPU_SYS_INTERRUPT_MASK) {
  5287:                 XEiJ.mpuIRR &= ~XEiJ.MPU_SYS_INTERRUPT_MASK;  //割り込みを受け付ける
  5288:                 if ((t = XEiJ.sysAcknowledge ()) != 0) {  //デバイスにベクタ番号を要求して割り込み処理中の状態になったとき
  5289:                   irpInterrupt (t << 2, XEiJ.MPU_SYS_INTERRUPT_LEVEL);  //割り込み処理を開始する
  5290:                 }
  5291:               }
  5292:             }
  5293:           }  //if t!=0
  5294:           if (MC68901.MFP_DELAYED_INTERRUPT) {
  5295:             XEiJ.mpuIRR |= XEiJ.mpuDIRR;  //遅延割り込み要求
  5296:             XEiJ.mpuDIRR = 0;
  5297:           }
  5298:         }  //命令ループ
  5299:       } catch (M68kException e) {
  5300:         if (M68kException.m6eNumber < 0) {  //命令ブレークポイントによる停止
  5301:           XEiJ.regPC = XEiJ.regPC0;
  5302:           XEiJ.mpuStop1 (null);  //"Instruction Break Point"
  5303:           break errorLoop;
  5304:         }
  5305:         //例外処理
  5306:         //  ここで処理するのはベクタ番号が2~63の例外に限る
  5307:         //  例外処理のサイクル数はACCESS_FAULTとADDRESS_ERROR以外は19になっているので必要ならば補正してからthrowする
  5308:         //  使用頻度が高いと思われる例外はインライン展開するのでここには来ない
  5309:         //  セーブされるpcは以下の例外は命令の先頭、これ以外は次の命令
  5310:         //     2  ACCESS_FAULT
  5311:         //     3  ADDRESS_ERROR
  5312:         //     4  ILLEGAL_INSTRUCTION
  5313:         //     8  PRIVILEGE_VIOLATION
  5314:         //    10  LINE_1010_EMULATOR
  5315:         //    11  LINE_1111_EMULATOR
  5316:         //    14  FORMAT_ERROR
  5317:         //    48  FP_BRANCH_SET_UNORDERED
  5318:         //    60  UNIMPLEMENTED_EFFECTIVE
  5319:         //    61  UNIMPLEMENTED_INSTRUCTION
  5320:         //              111111111122222222223333333333444444444455555555556666
  5321:         //    0123456789012345678901234567890123456789012345678901234567890123
  5322:         if (0b0011100010110010000000000000000000000000000000001000000000001100L << M68kException.m6eNumber < 0L) {
  5323:           XEiJ.regPC = XEiJ.regPC0;  //セーブされるpcは命令の先頭
  5324:           //アドレスレジスタを巻き戻す
  5325:           //  A7を含むのでユーザモードのときはスーパーバイザモードに移行する前に巻き戻すこと
  5326:           for (int arr = 8; M68kException.m6eIncremented != 0L; arr++) {
  5327:             XEiJ.regRn[arr] -= (byte) M68kException.m6eIncremented;
  5328:             M68kException.m6eIncremented = M68kException.m6eIncremented + 0x80L >> 8;
  5329:           }
  5330:         }
  5331:         //FSLWのTTRを設定する
  5332:         //  透過変換でアドレス変換キャッシュがヒットしてバスエラーが発生したときFSLWのTTRが設定されていない
  5333:         if ((M68kException.m6eFSLW & (M68kException.M6E_FSLW_BUS_ERROR_ON_READ | M68kException.M6E_FSLW_BUS_ERROR_ON_WRITE)) != 0) {  //バスエラーのとき
  5334:           if (((M68kException.m6eFSLW & M68kException.M6E_FSLW_TM_SUPERVISOR) != 0 ?
  5335:                (M68kException.m6eFSLW & M68kException.M6E_FSLW_TM_CODE) != 0 ? mmuSuperCodeTransparent : mmuSuperDataTransparent :
  5336:                (M68kException.m6eFSLW & M68kException.M6E_FSLW_TM_CODE) != 0 ? mmuUserCodeTransparent : mmuUserDataTransparent)[M68kException.m6eAddress >>> 24] != 0) {  //透過変換
  5337:             M68kException.m6eFSLW |= M68kException.M6E_FSLW_TRANSPARENT;
  5338:           }
  5339:         }
  5340:         if (M68kException.M6E_DEBUG_ERROR) {
  5341:           System.out.println (M68kException.m6eToString6 ());  //srを表示するのでsrを更新する前に呼び出すこと
  5342:         }
  5343:         try {
  5344:           int save_sr = XEiJ.regSRT1 | XEiJ.regSRS | XEiJ.regSRM | XEiJ.regSRI | XEiJ.regCCR;
  5345:           XEiJ.regSRT1 = XEiJ.regSRT0 = 0;  //srのTビットを消す
  5346:           int sp;
  5347:           if (XEiJ.regSRS != 0) {  //スーパーバイザモード
  5348:             sp = XEiJ.regRn[15];
  5349:           } else {  //ユーザモード
  5350:             XEiJ.regSRS = XEiJ.REG_SR_S;  //スーパーバイザモードへ移行する
  5351:             XEiJ.mpuUSP = XEiJ.regRn[15];  //USPを保存
  5352:             sp = XEiJ.mpuISP;  //SSPを復元
  5353:             if (DataBreakPoint.DBP_ON) {
  5354:               DataBreakPoint.dbpMemoryMap = DataBreakPoint.dbpSuperMap;  //スーパーバイザメモリマップに切り替える
  5355:             } else {
  5356:               XEiJ.busMemoryMap = XEiJ.busSuperMap;  //スーパーバイザメモリマップに切り替える
  5357:             }
  5358:             if (InstructionBreakPoint.IBP_ON) {
  5359:               InstructionBreakPoint.ibpOp1MemoryMap = InstructionBreakPoint.ibpOp1SuperMap;
  5360:             }
  5361:           }
  5362:           //以下はスーパーバイザモード
  5363:           XEiJ.mpuClockTime += XEiJ.mpuModifiedUnit * 19;
  5364:           //  同じオフセットで異なるフォーマットになるものはここでは処理できない
  5365:           if (M68kException.m6eNumber == M68kException.M6E_ACCESS_FAULT) {
  5366:             //ホストファイルシステムのデバイスコマンドを強制終了させる
  5367:             HFS.hfsState = HFS.HFS_STATE_IDLE;
  5368:             //FORMAT $4の例外スタックフレームを作る
  5369:             XEiJ.regRn[15] = sp -= 16;
  5370:             mmuWriteLongData (sp + 12, M68kException.m6eFSLW, 1);  //15-12:フォルトステータスロングワード(FSLW)
  5371:             mmuWriteLongData (sp + 8, M68kException.m6eAddress, 1);  //11-8:フォルトアドレス
  5372:             mmuWriteWordData (sp + 6, 0x4000 | M68kException.M6E_ACCESS_FAULT << 2, 1);  //7-6:フォーマットとベクタオフセット
  5373:             //                   111111111122222222223333333333444444444455555555556666
  5374:             //         0123456789012345678901234567890123456789012345678901234567890123
  5375:           } else if (0b0001011101000000000000000000000000000000000000000000000000000000L << M68kException.m6eNumber < 0L) {
  5376:             //FORMAT $2の例外スタックフレームを作る
  5377:             XEiJ.regRn[15] = sp -= 12;
  5378:             mmuWriteLongData (sp + 8, M68kException.m6eAddress, 1);  //11-8:命令アドレス
  5379:             mmuWriteWordData (sp + 6, 0x2000 | M68kException.m6eNumber << 2, 1);  //7-6:フォーマットとベクタオフセット
  5380:           } else {
  5381:             //FORMAT $0の例外スタックフレームを作る
  5382:             XEiJ.regRn[15] = sp -= 8;
  5383:             mmuWriteWordData (sp + 6, M68kException.m6eNumber << 2, 1);  //7-6:フォーマットとベクタオフセット
  5384:           }
  5385:           mmuWriteLongData (sp + 2, XEiJ.regPC, 1);  //5-2:プログラムカウンタ
  5386:           mmuWriteWordData (sp, save_sr, 1);  //1-0:ステータスレジスタ
  5387:           irpSetPC (mmuReadLongFour (XEiJ.mpuVBR + (M68kException.m6eNumber << 2), 1));  //例外ベクタを取り出してジャンプする
  5388:           if (XEiJ.dbgStopOnError) {  //エラーで停止する場合
  5389:             if (XEiJ.dbgDoStopOnError ()) {
  5390:               break errorLoop;
  5391:             }
  5392:           }
  5393:         } catch (M68kException ee) {  //ダブルバスフォルト
  5394:           XEiJ.dbgDoubleBusFault ();
  5395:           break errorLoop;
  5396:         }
  5397:       }  //catch M68kException
  5398:     }  //例外ループ
  5399: 
  5400:     //  通常
  5401:     //    pc0  最後に実行した命令
  5402:     //    pc  次に実行する命令
  5403:     //  バスエラー、アドレスエラー、不当命令、特権違反で停止したとき
  5404:     //    pc0  エラーを発生させた命令
  5405:     //    pc  例外処理ルーチンの先頭
  5406:     //  ダブルバスフォルトで停止したとき
  5407:     //    pc0  エラーを発生させた命令
  5408:     //    pc  エラーを発生させた命令
  5409:     //  命令ブレークポイントで停止したとき
  5410:     //    pc0  命令ブレークポイントが設定された、次に実行する命令
  5411:     //    pc  命令ブレークポイントが設定された、次に実行する命令
  5412:     //  データブレークポイントで停止したとき
  5413:     //    pc0  データを書き換えた、最後に実行した命令
  5414:     //    pc  次に実行する命令
  5415: 
  5416:     //分岐ログに停止レコードを記録する
  5417:     if (BranchLog.BLG_ON) {
  5418:       //BranchLog.blgStop ();
  5419:       int i = (char) BranchLog.blgNewestRecord << BranchLog.BLG_RECORD_SHIFT;
  5420:       BranchLog.blgArray[i] = BranchLog.blgHead | BranchLog.blgSuper;
  5421:       BranchLog.blgArray[i + 1] = XEiJ.regPC;  //次に実行する命令
  5422:     }
  5423: 
  5424:   }  //mpuCore()
  5425: 
  5426: 
  5427: 
  5428:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  5429:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  5430:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  5431:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  5432:   //ORI.B #<data>,<ea>                              |-|012346|-|-UUUU|-**00|D M+-WXZ  |0000_000_000_mmm_rrr-{data}
  5433:   //OR.B #<data>,<ea>                               |A|012346|-|-UUUU|-**00|  M+-WXZ  |0000_000_000_mmm_rrr-{data}  [ORI.B #<data>,<ea>]
  5434:   //ORI.B #<data>,CCR                               |-|012346|-|*****|*****|          |0000_000_000_111_100-{data}
  5435:   public static void irpOriByte () throws M68kException {
  5436:     int ea = XEiJ.regOC & 63;
  5437:     int z = mmuReadByteSignExword ((XEiJ.regPC += 2) - 1, XEiJ.regSRS);  //pcbs
  5438:     if (ea < XEiJ.EA_AR) {  //ORI.B #<data>,Dr
  5439:       if (XEiJ.DBG_ORI_BYTE_ZERO_D0) {
  5440:         if (z == 0 && ea == 0 && XEiJ.dbgOriByteZeroD0) {  //ORI.B #$00,D0
  5441:           M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION;
  5442:           throw M68kException.m6eSignal;
  5443:         }
  5444:       }
  5445:       XEiJ.mpuCycleCount++;
  5446:       z = XEiJ.regRn[ea] |= 255 & z;  //0拡張してからOR
  5447:       XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & z];  //ccr_tst_byte
  5448:     } else if (ea == XEiJ.EA_IM) {  //ORI.B #<data>,CCR
  5449:       XEiJ.mpuCycleCount++;
  5450:       XEiJ.regCCR |= XEiJ.REG_CCR_MASK & z;
  5451:     } else {  //ORI.B #<data>,<mem>
  5452:       XEiJ.mpuCycleCount++;
  5453:       int a = efaMltByte (ea);
  5454:       mmuWriteByteData (a, z |= mmuModifyByteSignData (a, XEiJ.regSRS), XEiJ.regSRS);
  5455:       XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & z];  //ccr_tst_byte
  5456:     }
  5457:   }  //irpOriByte
  5458: 
  5459:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  5460:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  5461:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  5462:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  5463:   //ORI.W #<data>,<ea>                              |-|012346|-|-UUUU|-**00|D M+-WXZ  |0000_000_001_mmm_rrr-{data}
  5464:   //OR.W #<data>,<ea>                               |A|012346|-|-UUUU|-**00|  M+-WXZ  |0000_000_001_mmm_rrr-{data}  [ORI.W #<data>,<ea>]
  5465:   //ORI.W #<data>,SR                                |-|012346|P|*****|*****|          |0000_000_001_111_100-{data}
  5466:   public static void irpOriWord () throws M68kException {
  5467:     int ea = XEiJ.regOC & 63;
  5468:     if (ea < XEiJ.EA_AR) {  //ORI.W #<data>,Dr
  5469:       int z = mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);  //pcws
  5470:       XEiJ.mpuCycleCount++;
  5471:       z = XEiJ.regRn[ea] |= (char) z;  //0拡張してからOR
  5472:       XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (char) z - 1 >> 31 & XEiJ.REG_CCR_Z | ((short) z < 0 ? XEiJ.REG_CCR_N : 0);  //ccr_tst_word
  5473:     } else if (ea == XEiJ.EA_IM) {  //ORI.W #<data>,SR
  5474:       if (XEiJ.regSRS == 0) {  //ユーザモードのとき
  5475:         M68kException.m6eNumber = M68kException.M6E_PRIVILEGE_VIOLATION;
  5476:         throw M68kException.m6eSignal;
  5477:       }
  5478:       //以下はスーパーバイザモード
  5479:       XEiJ.mpuCycleCount += 5;
  5480:       irpSetSR (XEiJ.regSRT1 | XEiJ.regSRS | XEiJ.regSRM | XEiJ.regSRI | XEiJ.regCCR | mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, 1));  //pcws。特権違反チェックが先
  5481:     } else {  //ORI.W #<data>,<mem>
  5482:       int z = mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);  //pcws
  5483:       XEiJ.mpuCycleCount++;
  5484:       int a = efaMltWord (ea);
  5485:       mmuWriteWordData (a, z |= mmuModifyWordSignData (a, XEiJ.regSRS), XEiJ.regSRS);
  5486:       XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (char) z - 1 >> 31 & XEiJ.REG_CCR_Z | ((short) z < 0 ? XEiJ.REG_CCR_N : 0);  //ccr_tst_word
  5487:     }
  5488:   }  //irpOriWord
  5489: 
  5490:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  5491:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  5492:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  5493:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  5494:   //ORI.L #<data>,<ea>                              |-|012346|-|-UUUU|-**00|D M+-WXZ  |0000_000_010_mmm_rrr-{data}
  5495:   //OR.L #<data>,<ea>                               |A|012346|-|-UUUU|-**00|  M+-WXZ  |0000_000_010_mmm_rrr-{data}  [ORI.L #<data>,<ea>]
  5496:   public static void irpOriLong () throws M68kException {
  5497:     int ea = XEiJ.regOC & 63;
  5498:     int y = mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS);  //pcls
  5499:     int z;
  5500:     if (ea < XEiJ.EA_AR) {  //ORI.L #<data>,Dr
  5501:       XEiJ.mpuCycleCount++;
  5502:       z = XEiJ.regRn[ea] |= y;
  5503:     } else {  //ORI.L #<data>,<mem>
  5504:       XEiJ.mpuCycleCount++;
  5505:       int a = efaMltLong (ea);
  5506:       mmuWriteLongData (a, z = mmuModifyLongData (a, XEiJ.regSRS) | y, XEiJ.regSRS);
  5507:     }
  5508:     XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X);  //ccr_tst
  5509:   }  //irpOriLong
  5510: 
  5511:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  5512:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  5513:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  5514:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  5515:   //BITREV.L Dr                                     |-|------|-|-----|-----|D         |0000_000_011_000_rrr (ISA_C)
  5516:   //CMP2.B <ea>,Rn                                  |-|--234S|-|-UUUU|-U*U*|  M  WXZP |0000_000_011_mmm_rrr-rnnn000000000000
  5517:   //CHK2.B <ea>,Rn                                  |-|--234S|-|-UUUU|-U*U*|  M  WXZP |0000_000_011_mmm_rrr-rnnn100000000000
  5518:   //
  5519:   //BITREV.L Dr
  5520:   //  Drのビットの並びを逆順にする。CCRは変化しない
  5521:   //
  5522:   //CHK2.B <ea>,Rn
  5523:   //  <ea>から下限と上限をリードしてRnが範囲内か調べる
  5524:   //  CHK2.B <ea>,Anは下限と上限をそれぞれロングに符号拡張してロングで比較する
  5525:   //  Rnが下限または上限と等しいときZをセットする
  5526:   //  Rnが範囲外のときCをセットする。このときCHK instruction例外が発生する
  5527:   //  060ISPのソースは注釈に誤りが多いので注釈ではなくコードを参考にする
  5528:   //  CCR
  5529:   //    X  変化しない
  5530:   //    N  変化しない(M68000PRMでは未定義)
  5531:   //    Z  Rn-LB==0||Rn-LB==UB-LB
  5532:   //    V  変化しない(M68000PRMでは未定義)
  5533:   //    C  Rn-LB>UB-LB(符号なし比較)
  5534:   //
  5535:   //CMP2.B <ea>,Rn
  5536:   //  <ea>から下限と上限をリードしてRnが範囲内か調べる
  5537:   //  CMP2.B <ea>,Anは下限と上限をそれぞれロングに符号拡張してロングで比較する
  5538:   //  Rnが下限または上限と等しいときZをセットする
  5539:   //  Rnが範囲外のときCをセットする
  5540:   //  060ISPのソースは注釈に誤りが多いので注釈ではなくコードを参考にする
  5541:   //  CCR
  5542:   //    X  変化しない
  5543:   //    N  変化しない(M68000PRMでは未定義)
  5544:   //    Z  Rn-LB==0||Rn-LB==UB-LB
  5545:   //    V  変化しない(M68000PRMでは未定義)
  5546:   //    C  Rn-LB>UB-LB(符号なし比較)
  5547:   public static void irpCmp2Chk2Byte () throws M68kException {
  5548:     int ea = XEiJ.regOC & 63;
  5549:     if (ea < XEiJ.EA_AR) {  //BITREV.L Dr
  5550:       XEiJ.mpuCycleCount++;
  5551:       int x = XEiJ.regRn[ea];
  5552:       XEiJ.regRn[ea] = XEiJ.MPU_BITREV_TABLE_0[x & 2047] | XEiJ.MPU_BITREV_TABLE_1[x << 10 >>> 21] | XEiJ.MPU_BITREV_TABLE_2[x >>> 22];
  5553:     } else {  //CMP2/CHK2.B <ea>,Rn
  5554:       M68kException.m6eNumber = M68kException.M6E_UNIMPLEMENTED_INSTRUCTION;
  5555:       throw M68kException.m6eSignal;
  5556:     }
  5557:   }  //irpCmp2Chk2Byte
  5558: 
  5559:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  5560:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  5561:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  5562:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  5563:   //BTST.L Dq,Dr                                    |-|012346|-|--U--|--*--|D         |0000_qqq_100_000_rrr
  5564:   //MOVEP.W (d16,Ar),Dq                             |-|01234S|-|-----|-----|          |0000_qqq_100_001_rrr-{data}
  5565:   //BTST.B Dq,<ea>                                  |-|012346|-|--U--|--*--|  M+-WXZPI|0000_qqq_100_mmm_rrr
  5566:   public static void irpBtstReg () throws M68kException {
  5567:     int ea = XEiJ.regOC & 63;
  5568:     int qqq = XEiJ.regOC >> 9;  //qqq
  5569:     if (ea >> 3 == XEiJ.MMM_AR) {  //MOVEP.W (d16,Ar),Dq
  5570:       M68kException.m6eNumber = M68kException.M6E_UNIMPLEMENTED_INSTRUCTION;
  5571:       throw M68kException.m6eSignal;
  5572:     } else {  //BTST.L Dq,Dr/<ea>
  5573:       int y = XEiJ.regRn[qqq];
  5574:       if (ea < XEiJ.EA_AR) {  //BTST.L Dq,Dr
  5575:         XEiJ.mpuCycleCount++;
  5576:         XEiJ.regCCR = XEiJ.regCCR & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_N | XEiJ.REG_CCR_V | XEiJ.REG_CCR_C) | (~XEiJ.regRn[ea] >>> y & 1) << 2;  //ccr_btst。intのシフトは5bitでマスクされるので&31を省略
  5577:       } else {  //BTST.B Dq,<ea>
  5578:         XEiJ.mpuCycleCount++;
  5579:         XEiJ.regCCR = XEiJ.regCCR & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_N | XEiJ.REG_CCR_V | XEiJ.REG_CCR_C) | (~(ea == XEiJ.EA_IM ? mmuReadByteSignExword ((XEiJ.regPC += 2) - 1, XEiJ.regSRS) : mmuReadByteSignData (efaAnyByte (ea), XEiJ.regSRS)) >>> (y & 7) & 1) << 2;  //ccr_btst。pcbs。イミディエイトを分離
  5580:       }
  5581:     }
  5582:   }  //irpBtstReg
  5583: 
  5584:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  5585:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  5586:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  5587:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  5588:   //BCHG.L Dq,Dr                                    |-|012346|-|--U--|--*--|D         |0000_qqq_101_000_rrr
  5589:   //MOVEP.L (d16,Ar),Dq                             |-|01234S|-|-----|-----|          |0000_qqq_101_001_rrr-{data}
  5590:   //BCHG.B Dq,<ea>                                  |-|012346|-|--U--|--*--|  M+-WXZ  |0000_qqq_101_mmm_rrr
  5591:   public static void irpBchgReg () throws M68kException {
  5592:     int ea = XEiJ.regOC & 63;
  5593:     int qqq = XEiJ.regOC >> 9;  //qqq
  5594:     if (ea >> 3 == XEiJ.MMM_AR) {  //MOVEP.L (d16,Ar),Dq
  5595:       M68kException.m6eNumber = M68kException.M6E_UNIMPLEMENTED_INSTRUCTION;
  5596:       throw M68kException.m6eSignal;
  5597:     } else {  //BCHG.L Dq,Dr/<ea>
  5598:       int x;
  5599:       int y = XEiJ.regRn[qqq];
  5600:       if (ea < XEiJ.EA_AR) {  //BCHG.L Dq,Dr
  5601:         XEiJ.mpuCycleCount++;
  5602:         XEiJ.regRn[ea] = (x = XEiJ.regRn[ea]) ^ (y = 1 << y);  //intのシフトは5bitでマスクされるので1<<(y&0x1f)の&0x1fを省略
  5603:       } else {  //BCHG.B Dq,<ea>
  5604:         XEiJ.mpuCycleCount++;
  5605:         int a = efaMltByte (ea);
  5606:         mmuWriteByteData (a, (x = mmuModifyByteSignData (a, XEiJ.regSRS)) ^ (y = 1 << (y & 7)), XEiJ.regSRS);
  5607:       }
  5608:       XEiJ.regCCR = XEiJ.regCCR & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_N | XEiJ.REG_CCR_V | XEiJ.REG_CCR_C) | (x & y) - 1 >>> 31 << 2;  //ccr_btst
  5609:     }
  5610:   }  //irpBchgReg
  5611: 
  5612:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  5613:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  5614:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  5615:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  5616:   //BCLR.L Dq,Dr                                    |-|012346|-|--U--|--*--|D         |0000_qqq_110_000_rrr
  5617:   //MOVEP.W Dq,(d16,Ar)                             |-|01234S|-|-----|-----|          |0000_qqq_110_001_rrr-{data}
  5618:   //BCLR.B Dq,<ea>                                  |-|012346|-|--U--|--*--|  M+-WXZ  |0000_qqq_110_mmm_rrr
  5619:   public static void irpBclrReg () throws M68kException {
  5620:     int ea = XEiJ.regOC & 63;
  5621:     int y = XEiJ.regRn[XEiJ.regOC >> 9];  //qqq
  5622:     if (ea >> 3 == XEiJ.MMM_AR) {  //MOVEP.W Dq,(d16,Ar)
  5623:       M68kException.m6eNumber = M68kException.M6E_UNIMPLEMENTED_INSTRUCTION;
  5624:       throw M68kException.m6eSignal;
  5625:     } else {  //BCLR.L Dq,Dr/<ea>
  5626:       int x;
  5627:       if (ea < XEiJ.EA_AR) {  //BCLR.L Dq,Dr
  5628:         XEiJ.mpuCycleCount++;
  5629:         XEiJ.regRn[ea] = (x = XEiJ.regRn[ea]) & ~(y = 1 << y);  //intのシフトは5bitでマスクされるので1<<(y&0x1f)の&0x1fを省略
  5630:       } else {  //BCLR.B Dq,<ea>
  5631:         XEiJ.mpuCycleCount++;
  5632:         int a = efaMltByte (ea);
  5633:         mmuWriteByteData (a, (x = mmuModifyByteSignData (a, XEiJ.regSRS)) & ~(y = 1 << (y & 7)), XEiJ.regSRS);
  5634:       }
  5635:       XEiJ.regCCR = XEiJ.regCCR & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_N | XEiJ.REG_CCR_V | XEiJ.REG_CCR_C) | (x & y) - 1 >>> 31 << 2;  //ccr_btst
  5636:     }
  5637:   }  //irpBclrReg
  5638: 
  5639:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  5640:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  5641:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  5642:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  5643:   //BSET.L Dq,Dr                                    |-|012346|-|--U--|--*--|D         |0000_qqq_111_000_rrr
  5644:   //MOVEP.L Dq,(d16,Ar)                             |-|01234S|-|-----|-----|          |0000_qqq_111_001_rrr-{data}
  5645:   //BSET.B Dq,<ea>                                  |-|012346|-|--U--|--*--|  M+-WXZ  |0000_qqq_111_mmm_rrr
  5646:   public static void irpBsetReg () throws M68kException {
  5647:     int ea = XEiJ.regOC & 63;
  5648:     int y = XEiJ.regRn[XEiJ.regOC >> 9];  //qqq
  5649:     if (ea >> 3 == XEiJ.MMM_AR) {  //MOVEP.L Dq,(d16,Ar)
  5650:       M68kException.m6eNumber = M68kException.M6E_UNIMPLEMENTED_INSTRUCTION;
  5651:       throw M68kException.m6eSignal;
  5652:     } else {  //BSET.L Dq,Dr/<ea>
  5653:       int x;
  5654:       if (ea < XEiJ.EA_AR) {  //BSET.L Dq,Dr
  5655:         XEiJ.mpuCycleCount++;
  5656:         XEiJ.regRn[ea] = (x = XEiJ.regRn[ea]) | (y = 1 << y);  //intのシフトは5bitでマスクされるので1<<(y&0x1f)の&0x1fを省略
  5657:       } else {  //BSET.B Dq,<ea>
  5658:         XEiJ.mpuCycleCount++;
  5659:         int a = efaMltByte (ea);
  5660:         mmuWriteByteData (a, (x = mmuModifyByteSignData (a, XEiJ.regSRS)) | (y = 1 << (y & 7)), XEiJ.regSRS);
  5661:       }
  5662:       XEiJ.regCCR = XEiJ.regCCR & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_N | XEiJ.REG_CCR_V | XEiJ.REG_CCR_C) | (x & y) - 1 >>> 31 << 2;  //ccr_btst
  5663:     }
  5664:   }  //irpBsetReg
  5665: 
  5666:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  5667:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  5668:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  5669:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  5670:   //ANDI.B #<data>,<ea>                             |-|012346|-|-UUUU|-**00|D M+-WXZ  |0000_001_000_mmm_rrr-{data}
  5671:   //AND.B #<data>,<ea>                              |A|012346|-|-UUUU|-**00|  M+-WXZ  |0000_001_000_mmm_rrr-{data}  [ANDI.B #<data>,<ea>]
  5672:   //ANDI.B #<data>,CCR                              |-|012346|-|*****|*****|          |0000_001_000_111_100-{data}
  5673:   public static void irpAndiByte () throws M68kException {
  5674:     int ea = XEiJ.regOC & 63;
  5675:     int z = mmuReadByteSignExword ((XEiJ.regPC += 2) - 1, XEiJ.regSRS);  //pcbs
  5676:     if (ea < XEiJ.EA_AR) {  //ANDI.B #<data>,Dr
  5677:       XEiJ.mpuCycleCount++;
  5678:       z = XEiJ.regRn[ea] &= ~255 | z;  //1拡張してからAND
  5679:       XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & z];  //ccr_tst_byte
  5680:     } else if (ea == XEiJ.EA_IM) {  //ANDI.B #<data>,CCR
  5681:       XEiJ.mpuCycleCount++;
  5682:       XEiJ.regCCR &= z;
  5683:     } else {  //ANDI.B #<data>,<mem>
  5684:       XEiJ.mpuCycleCount++;
  5685:       int a = efaMltByte (ea);
  5686:       mmuWriteByteData (a, z &= mmuModifyByteSignData (a, XEiJ.regSRS), XEiJ.regSRS);
  5687:       XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & z];  //ccr_tst_byte
  5688:     }
  5689:   }  //irpAndiByte
  5690: 
  5691:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  5692:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  5693:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  5694:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  5695:   //ANDI.W #<data>,<ea>                             |-|012346|-|-UUUU|-**00|D M+-WXZ  |0000_001_001_mmm_rrr-{data}
  5696:   //AND.W #<data>,<ea>                              |A|012346|-|-UUUU|-**00|  M+-WXZ  |0000_001_001_mmm_rrr-{data}  [ANDI.W #<data>,<ea>]
  5697:   //ANDI.W #<data>,SR                               |-|012346|P|*****|*****|          |0000_001_001_111_100-{data}
  5698:   public static void irpAndiWord () throws M68kException {
  5699:     int ea = XEiJ.regOC & 63;
  5700:     if (ea < XEiJ.EA_AR) {  //ANDI.W #<data>,Dr
  5701:       int z = mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);  //pcws
  5702:       XEiJ.mpuCycleCount++;
  5703:       z = XEiJ.regRn[ea] &= ~65535 | z;  //1拡張してからAND
  5704:       XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (char) z - 1 >> 31 & XEiJ.REG_CCR_Z | ((short) z < 0 ? XEiJ.REG_CCR_N : 0);  //ccr_tst_word
  5705:     } else if (ea == XEiJ.EA_IM) {  //ANDI.W #<data>,SR
  5706:       if (XEiJ.regSRS == 0) {  //ユーザモードのとき
  5707:         M68kException.m6eNumber = M68kException.M6E_PRIVILEGE_VIOLATION;
  5708:         throw M68kException.m6eSignal;
  5709:       }
  5710:       //以下はスーパーバイザモード
  5711:       XEiJ.mpuCycleCount += 12;
  5712:       irpSetSR ((XEiJ.regSRT1 | XEiJ.regSRS | XEiJ.regSRM | XEiJ.regSRI | XEiJ.regCCR) & mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, 1));  //pcws。特権違反チェックが先
  5713:     } else {  //ANDI.W #<data>,<mem>
  5714:       int z = mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);  //pcws
  5715:       XEiJ.mpuCycleCount++;
  5716:       int a = efaMltWord (ea);
  5717:       mmuWriteWordData (a, z &= mmuModifyWordSignData (a, XEiJ.regSRS), XEiJ.regSRS);
  5718:       XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (char) z - 1 >> 31 & XEiJ.REG_CCR_Z | ((short) z < 0 ? XEiJ.REG_CCR_N : 0);  //ccr_tst_word
  5719:     }
  5720:   }  //irpAndiWord
  5721: 
  5722:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  5723:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  5724:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  5725:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  5726:   //ANDI.L #<data>,<ea>                             |-|012346|-|-UUUU|-**00|D M+-WXZ  |0000_001_010_mmm_rrr-{data}
  5727:   //AND.L #<data>,<ea>                              |A|012346|-|-UUUU|-**00|  M+-WXZ  |0000_001_010_mmm_rrr-{data}  [ANDI.L #<data>,<ea>]
  5728:   public static void irpAndiLong () throws M68kException {
  5729:     int ea = XEiJ.regOC & 63;
  5730:     int y = mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS);  //pcls
  5731:     int z;
  5732:     if (ea < XEiJ.EA_AR) {  //ANDI.L #<data>,Dr
  5733:       XEiJ.mpuCycleCount++;
  5734:       z = XEiJ.regRn[ea] &= y;
  5735:     } else {  //ANDI.L #<data>,<mem>
  5736:       XEiJ.mpuCycleCount++;
  5737:       int a = efaMltLong (ea);
  5738:       mmuWriteLongData (a, z = mmuModifyLongData (a, XEiJ.regSRS) & y, XEiJ.regSRS);
  5739:     }
  5740:     XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X);  //ccr_tst
  5741:   }  //irpAndiLong
  5742: 
  5743:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  5744:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  5745:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  5746:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  5747:   //BYTEREV.L Dr                                    |-|------|-|-----|-----|D         |0000_001_011_000_rrr (ISA_C)
  5748:   //CMP2.W <ea>,Rn                                  |-|--234S|-|-UUUU|-U*U*|  M  WXZP |0000_001_011_mmm_rrr-rnnn000000000000
  5749:   //CHK2.W <ea>,Rn                                  |-|--234S|-|-UUUU|-U*U*|  M  WXZP |0000_001_011_mmm_rrr-rnnn100000000000
  5750:   //
  5751:   //BYTEREV.L Dr
  5752:   //  Drのバイトの並びを逆順にする。CCRは変化しない
  5753:   //
  5754:   //CHK2.W <ea>,Rn
  5755:   //  <ea>から下限と上限をリードしてRnが範囲内か調べる
  5756:   //  CHK2.W <ea>,Anは下限と上限をそれぞれロングに符号拡張してロングで比較する
  5757:   //  Rnが下限または上限と等しいときZをセットする
  5758:   //  Rnが範囲外のときCをセットする。このときCHK instruction例外が発生する
  5759:   //  060ISPのソースは注釈に誤りが多いので注釈ではなくコードを参考にする
  5760:   //  CCR
  5761:   //    X  変化しない
  5762:   //    N  変化しない(M68000PRMでは未定義)
  5763:   //    Z  Rn-LB==0||Rn-LB==UB-LB
  5764:   //    V  変化しない(M68000PRMでは未定義)
  5765:   //    C  Rn-LB>UB-LB(符号なし比較)
  5766:   //
  5767:   //CMP2.W <ea>,Rn
  5768:   //  <ea>から下限と上限をリードしてRnが範囲内か調べる
  5769:   //  CMP2.W <ea>,Anは下限と上限をそれぞれロングに符号拡張してロングで比較する
  5770:   //  Rnが下限または上限と等しいときZをセットする
  5771:   //  Rnが範囲外のときCをセットする
  5772:   //  060ISPのソースは注釈に誤りが多いので注釈ではなくコードを参考にする
  5773:   //  CCR
  5774:   //    X  変化しない
  5775:   //    N  変化しない(M68000PRMでは未定義)
  5776:   //    Z  Rn-LB==0||Rn-LB==UB-LB
  5777:   //    V  変化しない(M68000PRMでは未定義)
  5778:   //    C  Rn-LB>UB-LB(符号なし比較)
  5779:   public static void irpCmp2Chk2Word () throws M68kException {
  5780:     int ea = XEiJ.regOC & 63;
  5781:     if (ea < XEiJ.EA_AR) {  //BYTEREV.L Dr
  5782:       XEiJ.mpuCycleCount++;
  5783:       XEiJ.regRn[ea] = Integer.reverseBytes (XEiJ.regRn[ea]);
  5784:     } else {  //CMP2/CHK2.W <ea>,Rn
  5785:       M68kException.m6eNumber = M68kException.M6E_UNIMPLEMENTED_INSTRUCTION;
  5786:       throw M68kException.m6eSignal;
  5787:     }
  5788:   }  //irpCmp2Chk2Word
  5789: 
  5790:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  5791:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  5792:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  5793:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  5794:   //SUBI.B #<data>,<ea>                             |-|012346|-|UUUUU|*****|D M+-WXZ  |0000_010_000_mmm_rrr-{data}
  5795:   //SUB.B #<data>,<ea>                              |A|012346|-|UUUUU|*****|  M+-WXZ  |0000_010_000_mmm_rrr-{data}  [SUBI.B #<data>,<ea>]
  5796:   public static void irpSubiByte () throws M68kException {
  5797:     int ea = XEiJ.regOC & 63;
  5798:     int x;
  5799:     int y = mmuReadByteSignExword ((XEiJ.regPC += 2) - 1, XEiJ.regSRS);  //pcbs
  5800:     int z;
  5801:     if (ea < XEiJ.EA_AR) {  //SUBI.B #<data>,Dr
  5802:       XEiJ.mpuCycleCount++;
  5803:       z = (byte) (XEiJ.regRn[ea] = ~0xff & (x = XEiJ.regRn[ea]) | 0xff & (x = (byte) x) - y);
  5804:     } else {  //SUBI.B #<data>,<mem>
  5805:       XEiJ.mpuCycleCount++;
  5806:       int a = efaMltByte (ea);
  5807:       mmuWriteByteData (a, z = (byte) ((x = mmuModifyByteSignData (a, XEiJ.regSRS)) - y), XEiJ.regSRS);
  5808:     }
  5809:     XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) |
  5810:            ((x ^ y) & (x ^ z)) >>> 31 << 1 |
  5811:            (x & (y ^ z) ^ (y | z)) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C));  //ccr_sub
  5812:   }  //irpSubiByte
  5813: 
  5814:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  5815:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  5816:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  5817:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  5818:   //SUBI.W #<data>,<ea>                             |-|012346|-|UUUUU|*****|D M+-WXZ  |0000_010_001_mmm_rrr-{data}
  5819:   //SUB.W #<data>,<ea>                              |A|012346|-|UUUUU|*****|  M+-WXZ  |0000_010_001_mmm_rrr-{data}  [SUBI.W #<data>,<ea>]
  5820:   public static void irpSubiWord () throws M68kException {
  5821:     int ea = XEiJ.regOC & 63;
  5822:     int x;
  5823:     int y = mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);  //pcws
  5824:     int z;
  5825:     if (ea < XEiJ.EA_AR) {  //SUBI.W #<data>,Dr
  5826:       XEiJ.mpuCycleCount++;
  5827:       z = (short) (XEiJ.regRn[ea] = ~0xffff & (x = XEiJ.regRn[ea]) | (char) ((x = (short) x) - y));
  5828:     } else {  //SUBI.W #<data>,<mem>
  5829:       XEiJ.mpuCycleCount++;
  5830:       int a = efaMltWord (ea);
  5831:       mmuWriteWordData (a, z = (short) ((x = mmuModifyWordSignData (a, XEiJ.regSRS)) - y), XEiJ.regSRS);
  5832:     }
  5833:     XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) |
  5834:            ((x ^ y) & (x ^ z)) >>> 31 << 1 |
  5835:            (x & (y ^ z) ^ (y | z)) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C));  //ccr_sub
  5836:   }  //irpSubiWord
  5837: 
  5838:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  5839:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  5840:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  5841:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  5842:   //SUBI.L #<data>,<ea>                             |-|012346|-|UUUUU|*****|D M+-WXZ  |0000_010_010_mmm_rrr-{data}
  5843:   //SUB.L #<data>,<ea>                              |A|012346|-|UUUUU|*****|  M+-WXZ  |0000_010_010_mmm_rrr-{data}  [SUBI.L #<data>,<ea>]
  5844:   public static void irpSubiLong () throws M68kException {
  5845:     int ea = XEiJ.regOC & 63;
  5846:     int x;
  5847:     int y = mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS);  //pcls
  5848:     int z;
  5849:     if (ea < XEiJ.EA_AR) {  //SUBI.L #<data>,Dr
  5850:       XEiJ.mpuCycleCount++;
  5851:       XEiJ.regRn[ea] = z = (x = XEiJ.regRn[ea]) - y;
  5852:     } else {  //SUBI.L #<data>,<mem>
  5853:       XEiJ.mpuCycleCount++;
  5854:       int a = efaMltLong (ea);
  5855:       mmuWriteLongData (a, z = (x = mmuModifyLongData (a, XEiJ.regSRS)) - y, XEiJ.regSRS);
  5856:     }
  5857:     XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) |
  5858:            ((x ^ y) & (x ^ z)) >>> 31 << 1 |
  5859:            (x & (y ^ z) ^ (y | z)) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C));  //ccr_sub
  5860:   }  //irpSubiLong
  5861: 
  5862:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  5863:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  5864:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  5865:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  5866:   //FF1.L Dr                                        |-|------|-|-UUUU|-**00|D         |0000_010_011_000_rrr (ISA_C)
  5867:   //CMP2.L <ea>,Rn                                  |-|--234S|-|-UUUU|-U*U*|  M  WXZP |0000_010_011_mmm_rrr-rnnn000000000000
  5868:   //CHK2.L <ea>,Rn                                  |-|--234S|-|-UUUU|-U*U*|  M  WXZP |0000_010_011_mmm_rrr-rnnn100000000000
  5869:   //
  5870:   //CHK2.L <ea>,Rn
  5871:   //  <ea>から下限と上限をリードしてRnが範囲内か調べる
  5872:   //  Rnが下限または上限と等しいときZをセットする
  5873:   //  Rnが範囲外のときCをセットする。このときCHK instruction例外が発生する
  5874:   //  060ISPのソースは注釈に誤りが多いので注釈ではなくコードを参考にする
  5875:   //  CCR
  5876:   //    X  変化しない
  5877:   //    N  変化しない(M68000PRMでは未定義)
  5878:   //    Z  Rn-LB==0||Rn-LB==UB-LB
  5879:   //    V  変化しない(M68000PRMでは未定義)
  5880:   //    C  Rn-LB>UB-LB(符号なし比較)
  5881:   //
  5882:   //CMP2.L <ea>,Rn
  5883:   //  <ea>から下限と上限をリードしてRnが範囲内か調べる
  5884:   //  Rnが下限または上限と等しいときZをセットする
  5885:   //  Rnが範囲外のときCをセットする
  5886:   //  060ISPのソースは注釈に誤りが多いので注釈ではなくコードを参考にする
  5887:   //  CCR
  5888:   //    X  変化しない
  5889:   //    N  変化しない(M68000PRMでは未定義)
  5890:   //    Z  Rn-LB==0||Rn-LB==UB-LB
  5891:   //    V  変化しない(M68000PRMでは未定義)
  5892:   //    C  Rn-LB>UB-LB(符号なし比較)
  5893:   //
  5894:   //FF1.L Dr
  5895:   //  Drの最上位の1のbit31からのオフセットをDrに格納する
  5896:   //  Drが0のときは32になる
  5897:   public static void irpCmp2Chk2Long () throws M68kException {
  5898:     int ea = XEiJ.regOC & 63;
  5899:     if (ea < XEiJ.EA_AR) {  //FF1.L Dr
  5900:       XEiJ.mpuCycleCount++;
  5901:       int z = XEiJ.regRn[ea];
  5902:       XEiJ.regRn[ea] = Integer.numberOfLeadingZeros (z);
  5903:       XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X);  //ccr_tst
  5904:     } else {  //CMP2/CHK2.L <ea>,Rn
  5905:       M68kException.m6eNumber = M68kException.M6E_UNIMPLEMENTED_INSTRUCTION;
  5906:       throw M68kException.m6eSignal;
  5907:     }
  5908:   }  //irpCmp2Chk2Long
  5909: 
  5910:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  5911:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  5912:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  5913:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  5914:   //ADDI.B #<data>,<ea>                             |-|012346|-|UUUUU|*****|D M+-WXZ  |0000_011_000_mmm_rrr-{data}
  5915:   public static void irpAddiByte () throws M68kException {
  5916:     int ea = XEiJ.regOC & 63;
  5917:     int x;
  5918:     int y = mmuReadByteSignExword ((XEiJ.regPC += 2) - 1, XEiJ.regSRS);  //pcbs
  5919:     int z;
  5920:     if (ea < XEiJ.EA_AR) {  //ADDI.B #<data>,Dr
  5921:       XEiJ.mpuCycleCount++;
  5922:       z = (byte) (XEiJ.regRn[ea] = ~0xff & (x = XEiJ.regRn[ea]) | 0xff & (x = (byte) x) + y);
  5923:     } else {  //ADDI.B #<data>,<mem>
  5924:       XEiJ.mpuCycleCount++;
  5925:       int a = efaMltByte (ea);
  5926:       mmuWriteByteData (a, z = (byte) ((x = mmuModifyByteSignData (a, XEiJ.regSRS)) + y), XEiJ.regSRS);
  5927:     }
  5928:     XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) |
  5929:            ((x ^ z) & (y ^ z)) >>> 31 << 1 |
  5930:            ((x | y) ^ (x ^ y) & z) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C));  //ccr_add
  5931:   }  //irpAddiByte
  5932: 
  5933:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  5934:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  5935:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  5936:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  5937:   //ADDI.W #<data>,<ea>                             |-|012346|-|UUUUU|*****|D M+-WXZ  |0000_011_001_mmm_rrr-{data}
  5938:   public static void irpAddiWord () throws M68kException {
  5939:     int ea = XEiJ.regOC & 63;
  5940:     int x;
  5941:     int y = mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);  //pcws
  5942:     int z;
  5943:     if (ea < XEiJ.EA_AR) {  //ADDI.W #<data>,Dr
  5944:       XEiJ.mpuCycleCount++;
  5945:       z = (short) (XEiJ.regRn[ea] = ~0xffff & (x = XEiJ.regRn[ea]) | (char) ((x = (short) x) + y));
  5946:     } else {  //ADDI.W #<data>,<mem>
  5947:       XEiJ.mpuCycleCount++;
  5948:       int a = efaMltWord (ea);
  5949:       mmuWriteWordData (a, z = (short) ((x = mmuModifyWordSignData (a, XEiJ.regSRS)) + y), XEiJ.regSRS);
  5950:     }
  5951:     XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) |
  5952:            ((x ^ z) & (y ^ z)) >>> 31 << 1 |
  5953:            ((x | y) ^ (x ^ y) & z) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C));  //ccr_add
  5954:   }  //irpAddiWord
  5955: 
  5956:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  5957:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  5958:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  5959:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  5960:   //ADDI.L #<data>,<ea>                             |-|012346|-|UUUUU|*****|D M+-WXZ  |0000_011_010_mmm_rrr-{data}
  5961:   public static void irpAddiLong () throws M68kException {
  5962:     int ea = XEiJ.regOC & 63;
  5963:     int x;
  5964:     int y = mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS);  //pcls
  5965:     int z;
  5966:     if (ea < XEiJ.EA_AR) {  //ADDI.L #<data>,Dr
  5967:       XEiJ.mpuCycleCount++;
  5968:       XEiJ.regRn[ea] = z = (x = XEiJ.regRn[ea]) + y;
  5969:     } else {  //ADDI.L #<data>,<mem>
  5970:       XEiJ.mpuCycleCount++;
  5971:       int a = efaMltLong (ea);
  5972:       mmuWriteLongData (a, z = (x = mmuModifyLongData (a, XEiJ.regSRS)) + y, XEiJ.regSRS);
  5973:     }
  5974:     XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) |
  5975:            ((x ^ z) & (y ^ z)) >>> 31 << 1 |
  5976:            ((x | y) ^ (x ^ y) & z) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C));  //ccr_add
  5977:   }  //irpAddiLong
  5978: 
  5979:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  5980:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  5981:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  5982:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  5983:   //BTST.L #<data>,Dr                               |-|012346|-|--U--|--*--|D         |0000_100_000_000_rrr-{data}
  5984:   //BTST.B #<data>,<ea>                             |-|012346|-|--U--|--*--|  M+-WXZP |0000_100_000_mmm_rrr-{data}
  5985:   public static void irpBtstImm () throws M68kException {
  5986:     int ea = XEiJ.regOC & 63;
  5987:     int y = mmuReadByteSignExword ((XEiJ.regPC += 2) - 1, XEiJ.regSRS);  //pcbs
  5988:     if (ea < XEiJ.EA_AR) {  //BTST.L #<data>,Dr
  5989:       XEiJ.mpuCycleCount++;
  5990:       XEiJ.regCCR = XEiJ.regCCR & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_N | XEiJ.REG_CCR_V | XEiJ.REG_CCR_C) | (~XEiJ.regRn[ea] >>> y & 1) << 2;  //ccr_btst。intのシフトは5bitでマスクされるので&31を省略
  5991:     } else {  //BTST.B #<data>,<ea>
  5992:       XEiJ.mpuCycleCount++;
  5993:       XEiJ.regCCR = XEiJ.regCCR & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_N | XEiJ.REG_CCR_V | XEiJ.REG_CCR_C) | (~mmuReadByteSignData (efaMemByte (ea), XEiJ.regSRS) >>> (y & 7) & 1) << 2;  //ccr_btst
  5994:     }
  5995:   }  //irpBtstImm
  5996: 
  5997:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  5998:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  5999:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  6000:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  6001:   //BCHG.L #<data>,Dr                               |-|012346|-|--U--|--*--|D         |0000_100_001_000_rrr-{data}
  6002:   //BCHG.B #<data>,<ea>                             |-|012346|-|--U--|--*--|  M+-WXZ  |0000_100_001_mmm_rrr-{data}
  6003:   public static void irpBchgImm () throws M68kException {
  6004:     int ea = XEiJ.regOC & 63;
  6005:     int x;
  6006:     int y = mmuReadByteSignExword ((XEiJ.regPC += 2) - 1, XEiJ.regSRS);  //pcbs
  6007:     if (ea < XEiJ.EA_AR) {  //BCHG.L #<data>,Dr
  6008:       XEiJ.mpuCycleCount++;
  6009:       XEiJ.regRn[ea] = (x = XEiJ.regRn[ea]) ^ (y = 1 << y);  //intのシフトは5bitでマスクされるので1<<(y&0x1f)の&0x1fを省略
  6010:     } else {  //BCHG.B #<data>,<ea>
  6011:       XEiJ.mpuCycleCount++;
  6012:       int a = efaMltByte (ea);
  6013:       mmuWriteByteData (a, (x = mmuModifyByteSignData (a, XEiJ.regSRS)) ^ (y = 1 << (y & 7)), XEiJ.regSRS);
  6014:     }
  6015:     XEiJ.regCCR = XEiJ.regCCR & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_N | XEiJ.REG_CCR_V | XEiJ.REG_CCR_C) | (x & y) - 1 >>> 31 << 2;  //ccr_btst
  6016:   }  //irpBchgImm
  6017: 
  6018:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  6019:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  6020:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  6021:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  6022:   //BCLR.L #<data>,Dr                               |-|012346|-|--U--|--*--|D         |0000_100_010_000_rrr-{data}
  6023:   //BCLR.B #<data>,<ea>                             |-|012346|-|--U--|--*--|  M+-WXZ  |0000_100_010_mmm_rrr-{data}
  6024:   public static void irpBclrImm () throws M68kException {
  6025:     int ea = XEiJ.regOC & 63;
  6026:     int x;
  6027:     int y = mmuReadByteSignExword ((XEiJ.regPC += 2) - 1, XEiJ.regSRS);  //pcbs
  6028:     if (ea < XEiJ.EA_AR) {  //BCLR.L #<data>,Dr
  6029:       XEiJ.mpuCycleCount++;
  6030:       XEiJ.regRn[ea] = (x = XEiJ.regRn[ea]) & ~(y = 1 << y);  //intのシフトは5bitでマスクされるので1<<(y&0x1f)の&0x1fを省略
  6031:     } else {  //BCLR.B #<data>,<ea>
  6032:       XEiJ.mpuCycleCount++;
  6033:       int a = efaMltByte (ea);
  6034:       mmuWriteByteData (a, (x = mmuModifyByteSignData (a, XEiJ.regSRS)) & ~(y = 1 << (y & 7)), XEiJ.regSRS);
  6035:     }
  6036:     XEiJ.regCCR = XEiJ.regCCR & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_N | XEiJ.REG_CCR_V | XEiJ.REG_CCR_C) | (x & y) - 1 >>> 31 << 2;  //ccr_btst
  6037:   }  //irpBclrImm
  6038: 
  6039:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  6040:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  6041:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  6042:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  6043:   //BSET.L #<data>,Dr                               |-|012346|-|--U--|--*--|D         |0000_100_011_000_rrr-{data}
  6044:   //BSET.B #<data>,<ea>                             |-|012346|-|--U--|--*--|  M+-WXZ  |0000_100_011_mmm_rrr-{data}
  6045:   public static void irpBsetImm () throws M68kException {
  6046:     int ea = XEiJ.regOC & 63;
  6047:     int x;
  6048:     int y = mmuReadByteSignExword ((XEiJ.regPC += 2) - 1, XEiJ.regSRS);  //pcbs
  6049:     if (ea < XEiJ.EA_AR) {  //BSET.L #<data>,Dr
  6050:       XEiJ.mpuCycleCount++;
  6051:       XEiJ.regRn[ea] = (x = XEiJ.regRn[ea]) | (y = 1 << y);  //intのシフトは5bitでマスクされるので1<<(y&0x1f)の&0x1fを省略
  6052:     } else {  //BSET.B #<data>,<ea>
  6053:       XEiJ.mpuCycleCount++;
  6054:       int a = efaMltByte (ea);
  6055:       mmuWriteByteData (a, (x = mmuModifyByteSignData (a, XEiJ.regSRS)) | (y = 1 << (y & 7)), XEiJ.regSRS);
  6056:     }
  6057:     XEiJ.regCCR = XEiJ.regCCR & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_N | XEiJ.REG_CCR_V | XEiJ.REG_CCR_C) | (x & y) - 1 >>> 31 << 2;  //ccr_btst
  6058:   }  //irpBsetImm
  6059: 
  6060:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  6061:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  6062:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  6063:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  6064:   //EORI.B #<data>,<ea>                             |-|012346|-|-UUUU|-**00|D M+-WXZ  |0000_101_000_mmm_rrr-{data}
  6065:   //EOR.B #<data>,<ea>                              |A|012346|-|-UUUU|-**00|D M+-WXZ  |0000_101_000_mmm_rrr-{data}  [EORI.B #<data>,<ea>]
  6066:   //EORI.B #<data>,CCR                              |-|012346|-|*****|*****|          |0000_101_000_111_100-{data}
  6067:   public static void irpEoriByte () throws M68kException {
  6068:     int ea = XEiJ.regOC & 63;
  6069:     int z = mmuReadByteSignExword ((XEiJ.regPC += 2) - 1, XEiJ.regSRS);  //pcbs
  6070:     if (ea < XEiJ.EA_AR) {  //EORI.B #<data>,Dr
  6071:       XEiJ.mpuCycleCount++;
  6072:       z = XEiJ.regRn[ea] ^= 255 & z;  //0拡張してからEOR
  6073:       XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & z];  //ccr_tst_byte
  6074:     } else if (ea == XEiJ.EA_IM) {  //EORI.B #<data>,CCR
  6075:       XEiJ.mpuCycleCount++;
  6076:       XEiJ.regCCR ^= XEiJ.REG_CCR_MASK & z;
  6077:     } else {  //EORI.B #<data>,<mem>
  6078:       XEiJ.mpuCycleCount++;
  6079:       int a = efaMltByte (ea);
  6080:       mmuWriteByteData (a, z ^= mmuModifyByteSignData (a, XEiJ.regSRS), XEiJ.regSRS);
  6081:       XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & z];  //ccr_tst_byte
  6082:     }
  6083:   }  //irpEoriByte
  6084: 
  6085:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  6086:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  6087:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  6088:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  6089:   //EORI.W #<data>,<ea>                             |-|012346|-|-UUUU|-**00|D M+-WXZ  |0000_101_001_mmm_rrr-{data}
  6090:   //EOR.W #<data>,<ea>                              |A|012346|-|-UUUU|-**00|D M+-WXZ  |0000_101_001_mmm_rrr-{data}  [EORI.W #<data>,<ea>]
  6091:   //EORI.W #<data>,SR                               |-|012346|P|*****|*****|          |0000_101_001_111_100-{data}
  6092:   public static void irpEoriWord () throws M68kException {
  6093:     int ea = XEiJ.regOC & 63;
  6094:     if (ea < XEiJ.EA_AR) {  //EORI.W #<data>,Dr
  6095:       int z = mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);  //pcws
  6096:       XEiJ.mpuCycleCount++;
  6097:       z = XEiJ.regRn[ea] ^= (char) z;  //0拡張してからEOR
  6098:       XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (char) z - 1 >> 31 & XEiJ.REG_CCR_Z | ((short) z < 0 ? XEiJ.REG_CCR_N : 0);  //ccr_tst_word
  6099:     } else if (ea == XEiJ.EA_IM) {  //EORI.W #<data>,SR
  6100:       if (XEiJ.regSRS == 0) {  //ユーザモードのとき
  6101:         M68kException.m6eNumber = M68kException.M6E_PRIVILEGE_VIOLATION;
  6102:         throw M68kException.m6eSignal;
  6103:       }
  6104:       //以下はスーパーバイザモード
  6105:       XEiJ.mpuCycleCount += 12;
  6106:       irpSetSR ((XEiJ.regSRT1 | XEiJ.regSRS | XEiJ.regSRM | XEiJ.regSRI | XEiJ.regCCR) ^ mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, 1));  //pcws。特権違反チェックが先
  6107:     } else {  //EORI.W #<data>,<mem>
  6108:       int z = mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);  //pcws
  6109:       XEiJ.mpuCycleCount++;
  6110:       int a = efaMltWord (ea);
  6111:       mmuWriteWordData (a, z ^= mmuModifyWordSignData (a, XEiJ.regSRS), XEiJ.regSRS);
  6112:       XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (char) z - 1 >> 31 & XEiJ.REG_CCR_Z | ((short) z < 0 ? XEiJ.REG_CCR_N : 0);  //ccr_tst_word
  6113:     }
  6114:   }  //irpEoriWord
  6115: 
  6116:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  6117:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  6118:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  6119:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  6120:   //EORI.L #<data>,<ea>                             |-|012346|-|-UUUU|-**00|D M+-WXZ  |0000_101_010_mmm_rrr-{data}
  6121:   //EOR.L #<data>,<ea>                              |A|012346|-|-UUUU|-**00|D M+-WXZ  |0000_101_010_mmm_rrr-{data}  [EORI.L #<data>,<ea>]
  6122:   public static void irpEoriLong () throws M68kException {
  6123:     int ea = XEiJ.regOC & 63;
  6124:     int y = mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS);  //pcls
  6125:     int z;
  6126:     if (ea < XEiJ.EA_AR) {  //EORI.L #<data>,Dr
  6127:       XEiJ.mpuCycleCount++;
  6128:       z = XEiJ.regRn[ea] ^= y;
  6129:     } else {  //EORI.L #<data>,<mem>
  6130:       XEiJ.mpuCycleCount++;
  6131:       int a = efaMltLong (ea);
  6132:       mmuWriteLongData (a, z = mmuModifyLongData (a, XEiJ.regSRS) ^ y, XEiJ.regSRS);
  6133:     }
  6134:     XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X);  //ccr_tst
  6135:   }  //irpEoriLong
  6136: 
  6137:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  6138:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  6139:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  6140:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  6141:   //CAS.B Dc,Du,<ea>                                |-|--2346|-|-UUUU|-****|  M+-WXZ  |0000_101_011_mmm_rrr-0000000uuu000ccc
  6142:   public static void irpCasByte () throws M68kException {
  6143:     int w = mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);  //pcwz。拡張ワード
  6144:     if ((w & ~0b0000_000_111_000_111) != 0) {
  6145:       M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION;
  6146:       throw M68kException.m6eSignal;
  6147:     }
  6148:     int c = w & 7;
  6149:     int y = (byte) XEiJ.regRn[c];  //y=Dc
  6150:     int a = efaMltByte (XEiJ.regOC & 63);
  6151:     int x = mmuReadByteSignData (a, XEiJ.regSRS);  //x=<ea>
  6152:     int z = (byte) (x - y);  //z=<ea>-Dc
  6153:     XEiJ.regCCR = (XEiJ.regCCR & XEiJ.REG_CCR_X |
  6154:                    (z < 0 ? XEiJ.REG_CCR_N : 0) |
  6155:                    (z == 0 ? XEiJ.REG_CCR_Z : 0) |
  6156:                    ((x ^ y) & (x ^ z)) >>> 31 << 1 |
  6157:                    (x & (y ^ z) ^ (y | z)) >>> 31);  //ccr_cmp
  6158:     if (z == 0) {  //<ea>==Dc
  6159:       XEiJ.mpuCycleCount += 19;
  6160:       mmuWriteByteData (a, XEiJ.regRn[w >> 6], XEiJ.regSRS);  //Du→<ea>
  6161:     } else {  //<ea>!=Dc
  6162:       XEiJ.mpuCycleCount += 19;
  6163:       XEiJ.regRn[c] = ~0xff & XEiJ.regRn[c] | 0xff & x;  //<ea>→Dc
  6164:     }
  6165:   }  //irpCasByte
  6166: 
  6167:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  6168:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  6169:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  6170:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  6171:   //CMPI.B #<data>,<ea>                             |-|--2346|-|-UUUU|-****|D M+-WXZP |0000_110_000_mmm_rrr-{data}
  6172:   //CMP.B #<data>,<ea>                              |A|--2346|-|-UUUU|-****|  M+-WXZP |0000_110_000_mmm_rrr-{data}  [CMPI.B #<data>,<ea>]
  6173:   public static void irpCmpiByte () throws M68kException {
  6174:     XEiJ.mpuCycleCount++;
  6175:     int ea = XEiJ.regOC & 63;
  6176:     int x;
  6177:     int y = mmuReadByteSignExword ((XEiJ.regPC += 2) - 1, XEiJ.regSRS);  //pcbs
  6178:     int z = (byte) ((x = ea < XEiJ.EA_AR ? (byte) XEiJ.regRn[ea] : mmuReadByteSignData (efaMemByte (ea), XEiJ.regSRS)) - y);  //アドレッシングモードに注意
  6179:     XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) |
  6180:            ((x ^ y) & (x ^ z)) >>> 31 << 1 |
  6181:            (x & (y ^ z) ^ (y | z)) >>> 31);  //ccr_cmp
  6182:   }  //irpCmpiByte
  6183: 
  6184:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  6185:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  6186:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  6187:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  6188:   //CMPI.W #<data>,<ea>                             |-|--2346|-|-UUUU|-****|D M+-WXZP |0000_110_001_mmm_rrr-{data}
  6189:   //CMP.W #<data>,<ea>                              |A|--2346|-|-UUUU|-****|  M+-WXZP |0000_110_001_mmm_rrr-{data}  [CMPI.W #<data>,<ea>]
  6190:   public static void irpCmpiWord () throws M68kException {
  6191:     XEiJ.mpuCycleCount++;
  6192:     int ea = XEiJ.regOC & 63;
  6193:     int x;
  6194:     int y = mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);  //pcws
  6195:     int z = (short) ((x = ea < XEiJ.EA_AR ? (short) XEiJ.regRn[ea] : mmuReadWordSignData (efaMemWord (ea), XEiJ.regSRS)) - y);  //アドレッシングモードに注意
  6196:     XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) |
  6197:            ((x ^ y) & (x ^ z)) >>> 31 << 1 |
  6198:            (x & (y ^ z) ^ (y | z)) >>> 31);  //ccr_cmp
  6199:   }  //irpCmpiWord
  6200: 
  6201:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  6202:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  6203:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  6204:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  6205:   //CMPI.L #<data>,<ea>                             |-|--2346|-|-UUUU|-****|D M+-WXZP |0000_110_010_mmm_rrr-{data}
  6206:   //CMP.L #<data>,<ea>                              |A|--2346|-|-UUUU|-****|  M+-WXZP |0000_110_010_mmm_rrr-{data}  [CMPI.L #<data>,<ea>]
  6207:   public static void irpCmpiLong () throws M68kException {
  6208:     int ea = XEiJ.regOC & 63;
  6209:     int x;
  6210:     int y = mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS);  //pcls
  6211:     int z;
  6212:     if (ea < XEiJ.EA_AR) {  //CMPI.L #<data>,Dr
  6213:       XEiJ.mpuCycleCount++;
  6214:       z = (x = XEiJ.regRn[ea]) - y;
  6215:     } else {  //CMPI.L #<data>,<mem>
  6216:       XEiJ.mpuCycleCount++;
  6217:       z = (x = mmuReadLongData (efaMemLong (ea), XEiJ.regSRS)) - y;  //アドレッシングモードに注意
  6218:     }
  6219:     XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) |
  6220:            ((x ^ y) & (x ^ z)) >>> 31 << 1 |
  6221:            (x & (y ^ z) ^ (y | z)) >>> 31);  //ccr_cmp
  6222:   }  //irpCmpiLong
  6223: 
  6224:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  6225:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  6226:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  6227:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  6228:   //CAS.W Dc,Du,<ea>                                |-|--2346|-|-UUUU|-****|  M+-WXZ  |0000_110_011_mmm_rrr-0000000uuu000ccc        (68060 software emulate misaligned <ea>)
  6229:   //CAS2.W Dc1:Dc2,Du1:Du2,(Rn1):(Rn2)              |-|--234S|-|-UUUU|-****|          |0000_110_011_111_100-rnnn000uuu000ccc(1)-rnnn_000_uuu_000_ccc(2)
  6230:   public static void irpCasWord () throws M68kException {
  6231:     int ea = XEiJ.regOC & 63;
  6232:     if (ea == XEiJ.EA_IM) {  //CAS2.W Dc1:Dc2,Du1:Du2,(Rn1):(Rn2)
  6233:       M68kException.m6eNumber = M68kException.M6E_UNIMPLEMENTED_INSTRUCTION;
  6234:       throw M68kException.m6eSignal;
  6235:     } else {  //CAS.W Dc,Du,<ea>
  6236:       int w = mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);  //pcwz
  6237:       if ((w & ~0b0000_000_111_000_111) != 0) {
  6238:         M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION;
  6239:         throw M68kException.m6eSignal;
  6240:       }
  6241:       int a = efaMltWord (ea);  //a=ea
  6242:       if ((a & 1) != 0) {  //misaligned <ea>
  6243:         M68kException.m6eNumber = M68kException.M6E_UNIMPLEMENTED_INSTRUCTION;
  6244:         throw M68kException.m6eSignal;
  6245:       }
  6246:       int c = w & 7;
  6247:       int y = (short) XEiJ.regRn[c];  //y=Dc
  6248:       int x = mmuReadWordSignData (a, XEiJ.regSRS);  //x=<ea>
  6249:       int z = (short) (x - y);  //z=<ea>-Dc
  6250:       XEiJ.regCCR = (XEiJ.regCCR & XEiJ.REG_CCR_X |
  6251:                      (z < 0 ? XEiJ.REG_CCR_N : 0) |
  6252:                      (z == 0 ? XEiJ.REG_CCR_Z : 0) |
  6253:                      ((x ^ y) & (x ^ z)) >>> 31 << 1 |
  6254:                      (x & (y ^ z) ^ (y | z)) >>> 31);  //ccr_cmp
  6255:       if (z == 0) {  //<ea>==Dc
  6256:         XEiJ.mpuCycleCount += 19;
  6257:         mmuWriteWordData (a, XEiJ.regRn[w >> 6], XEiJ.regSRS);  //Du→<ea>
  6258:       } else {  //<ea>!=Dc
  6259:         XEiJ.mpuCycleCount += 19;
  6260:         XEiJ.regRn[c] = ~0xffff & XEiJ.regRn[c] | (char) x;  //<ea>→Dc
  6261:       }
  6262:     }
  6263:   }  //irpCasWord
  6264: 
  6265:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  6266:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  6267:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  6268:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  6269:   //MOVES.B <ea>,Rn                                 |-|-12346|P|-----|-----|  M+-WXZ  |0000_111_000_mmm_rrr-rnnn000000000000
  6270:   //MOVES.B Rn,<ea>                                 |-|-12346|P|-----|-----|  M+-WXZ  |0000_111_000_mmm_rrr-rnnn100000000000
  6271:   //
  6272:   //MOVES.B <ea>,Rn
  6273:   //  MOVES.B <ea>,DnはDnの最下位バイトだけ更新する
  6274:   //  MOVES.B <ea>,Anはバイトデータをロングに符号拡張してAnの全体を更新する
  6275:   //  SFC=1,2,5,6はアドレス変換あり、SFC=0,3,4はアドレス変換なし、
  6276:   //  SFC=7はCPU空間なのでコプロセッサが割り当てられている領域以外はバスエラーになる
  6277:   //
  6278:   //MOVES.B Rn,<ea>
  6279:   //  DFC=1,2,5,6はアドレス変換あり、DFC=0,3,4はアドレス変換なし、
  6280:   //  DFC=7はCPU空間なのでコプロセッサが割り当てられている領域以外はバスエラーになる
  6281:   public static void irpMovesByte () throws M68kException {
  6282:     int w = mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);  //pcwz
  6283:     if (w << -11 != 0) {
  6284:       M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION;
  6285:       throw M68kException.m6eSignal;
  6286:     }
  6287:     if (XEiJ.regSRS == 0) {  //ユーザモードのとき
  6288:       M68kException.m6eNumber = M68kException.M6E_PRIVILEGE_VIOLATION;
  6289:       throw M68kException.m6eSignal;
  6290:     }
  6291:     //以下はスーパーバイザモード
  6292:     XEiJ.mpuCycleCount++;
  6293:     int a = efaMltByte (XEiJ.regOC & 63);
  6294:     int n = w >>> 12;  //n
  6295:     if (w << 31 - 11 >= 0) {  //MOVES.B <ea>,Rn。リード
  6296:       boolean supervisor = (0b10011111 << 24 << XEiJ.mpuSFC) < 0;
  6297:       boolean instruction = (0b00101010 << 24 << XEiJ.mpuSFC) < 0;
  6298:       MemoryMappedDevice[] mm = (DataBreakPoint.DBP_ON ?
  6299:                                  supervisor ? DataBreakPoint.dbpSuperMap : DataBreakPoint.dbpUserMap :
  6300:                                  supervisor ? XEiJ.busSuperMap : XEiJ.busUserMap);
  6301:       int z;
  6302:       //    01234567
  6303:       if (0b01100110 << 24 << XEiJ.mpuSFC < 0) {  //SFC=1,2,5,6。アドレス変換あり
  6304:         M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_READ | M68kException.M6E_FSLW_SIZE_BYTE | XEiJ.mpuSFC << 16;
  6305:         int pa = (supervisor ?
  6306:                   instruction ? mmuTranslateReadSuperCode (a) : mmuTranslateReadSuperData (a) :
  6307:                   instruction ? mmuTranslateReadUserCode (a) : mmuTranslateReadUserData (a));
  6308:         //z = XEiJ.busRbz (pa);
  6309:         z = mm[pa >>> XEiJ.BUS_PAGE_BITS].mmdRbz (pa);
  6310:       } else if (XEiJ.mpuSFC != 7) {  //SFC=0,3,4。アドレス変換なし
  6311:         M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_READ | M68kException.M6E_FSLW_SIZE_BYTE | XEiJ.mpuSFC << 16;
  6312:         //z = XEiJ.busRbz (a);
  6313:         z = mm[a >>> XEiJ.BUS_PAGE_BITS].mmdRbz (a);
  6314:       } else {  //SFC=7。CPU空間
  6315:         if (0x00022000 <= a && a <= 0x0002201f) {  //コプロセッサID=1
  6316:           z = XEiJ.fpuMotherboardCoprocessor.cirReadByteZero (a);
  6317:         } else {
  6318:           M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_READ | M68kException.M6E_FSLW_SIZE_BYTE | XEiJ.mpuSFC << 16 | M68kException.M6E_FSLW_BUS_ERROR_ON_READ;
  6319:           M68kException.m6eNumber = M68kException.M6E_ACCESS_FAULT;
  6320:           M68kException.m6eAddress = a;
  6321:           M68kException.m6eDirection = XEiJ.MPU_WR_READ;
  6322:           M68kException.m6eSize = XEiJ.MPU_SS_BYTE;
  6323:           throw M68kException.m6eSignal;
  6324:         }
  6325:       }
  6326:       if (n < 8) {  //MOVES.B <ea>,Dn
  6327:         XEiJ.regRn[n] = XEiJ.regRn[n] & ~255 | z;
  6328:       } else {  //MOVES.B <ea>,An
  6329:         XEiJ.regRn[n] = (byte) z;
  6330:       }
  6331:       if (MMU_DEBUG_COMMAND) {
  6332:         System.out.printf ("%08x movesReadByte(%d,0x%08x)=0x%02x\n", XEiJ.regPC0, XEiJ.mpuSFC, a, XEiJ.regRn[n] & 255);
  6333:       }
  6334:     } else {  //MOVES.B Rn,<ea>。ライト
  6335:       if (MMU_DEBUG_COMMAND) {
  6336:         System.out.printf ("%08x movesWriteByte(%d,0x%08x,0x%02x)\n", XEiJ.regPC0, XEiJ.mpuDFC, a, XEiJ.regRn[n] & 255);
  6337:       }
  6338:       boolean supervisor = (0b10011111 << 24 << XEiJ.mpuDFC) < 0;
  6339:       boolean instruction = (0b00101010 << 24 << XEiJ.mpuDFC) < 0;
  6340:       MemoryMappedDevice mm[] = (DataBreakPoint.DBP_ON ?
  6341:                                  supervisor ? DataBreakPoint.dbpSuperMap : DataBreakPoint.dbpUserMap :
  6342:                                  supervisor ? XEiJ.busSuperMap : XEiJ.busUserMap);
  6343:       int z = XEiJ.regRn[n];
  6344:       //    01234567
  6345:       if (0b01100110 << 24 << XEiJ.mpuDFC < 0) {  //DFC=1,2,5,6。アドレス変換あり
  6346:         M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_WRITE | M68kException.M6E_FSLW_SIZE_BYTE | XEiJ.mpuDFC << 16;
  6347:         int pa = (supervisor ?
  6348:                   instruction ? mmuTranslateWriteSuperCode (a) : mmuTranslateWriteSuperData (a) :
  6349:                   instruction ? mmuTranslateWriteUserCode (a) : mmuTranslateWriteUserData (a));
  6350:         //XEiJ.busWb (pa, z);
  6351:         mm[pa >>> XEiJ.BUS_PAGE_BITS].mmdWb (pa, z);
  6352:       } else if (XEiJ.mpuDFC != 7) {  //DFC=0,3,4。アドレス変換なし
  6353:         M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_WRITE | M68kException.M6E_FSLW_SIZE_BYTE | XEiJ.mpuDFC << 16;
  6354:         //XEiJ.busWb (a, z);
  6355:         mm[a >>> XEiJ.BUS_PAGE_BITS].mmdWb (a, z);
  6356:       } else {  //DFC=7。CPU空間
  6357:         if (0x00022000 <= a && a <= 0x0002201f) {  //コプロセッサID=1
  6358:           XEiJ.fpuMotherboardCoprocessor.cirWriteByte (a, z);
  6359:         } else {
  6360:           M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_WRITE | M68kException.M6E_FSLW_SIZE_BYTE | XEiJ.mpuDFC << 16 | M68kException.M6E_FSLW_BUS_ERROR_ON_WRITE;
  6361:           M68kException.m6eNumber = M68kException.M6E_ACCESS_FAULT;
  6362:           M68kException.m6eAddress = a;
  6363:           M68kException.m6eDirection = XEiJ.MPU_WR_WRITE;
  6364:           M68kException.m6eSize = XEiJ.MPU_SS_BYTE;
  6365:           throw M68kException.m6eSignal;
  6366:         }
  6367:       }
  6368:     }
  6369:   }  //irpMovesByte
  6370: 
  6371:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  6372:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  6373:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  6374:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  6375:   //MOVES.W <ea>,Rn                                 |-|-12346|P|-----|-----|  M+-WXZ  |0000_111_001_mmm_rrr-rnnn000000000000
  6376:   //MOVES.W Rn,<ea>                                 |-|-12346|P|-----|-----|  M+-WXZ  |0000_111_001_mmm_rrr-rnnn100000000000
  6377:   //
  6378:   //MOVES.W <ea>,Rn
  6379:   //  MOVES.W <ea>,DnはDnの下位ワードだけ更新する
  6380:   //  MOVES.W <ea>,Anはワードデータをロングに符号拡張してAnの全体を更新する
  6381:   //  SFC=1,2,5,6はアドレス変換あり、SFC=0,3,4はアドレス変換なし、
  6382:   //  SFC=7はCPU空間なのでコプロセッサが割り当てられている領域以外はバスエラーになる
  6383:   //
  6384:   //MOVES.W Rn,<ea>
  6385:   //  DFC=1,2,5,6はアドレス変換あり、DFC=0,3,4はアドレス変換なし、
  6386:   //  DFC=7はCPU空間なのでコプロセッサが割り当てられている領域以外はバスエラーになる
  6387:   public static void irpMovesWord () throws M68kException {
  6388:     int w = mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);  //pcwz
  6389:     if (w << -11 != 0) {
  6390:       M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION;
  6391:       throw M68kException.m6eSignal;
  6392:     }
  6393:     if (XEiJ.regSRS == 0) {  //ユーザモードのとき
  6394:       M68kException.m6eNumber = M68kException.M6E_PRIVILEGE_VIOLATION;
  6395:       throw M68kException.m6eSignal;
  6396:     }
  6397:     //以下はスーパーバイザモード
  6398:     XEiJ.mpuCycleCount++;
  6399:     int a = efaMltWord (XEiJ.regOC & 63);
  6400:     int n = w >>> 12;  //n
  6401:     if (w << 31 - 11 >= 0) {  //MOVES.W <ea>,Rn。リード
  6402:       boolean supervisor = (0b10011111 << 24 << XEiJ.mpuSFC) < 0;
  6403:       boolean instruction = (0b00101010 << 24 << XEiJ.mpuSFC) < 0;
  6404:       MemoryMappedDevice[] mm = (DataBreakPoint.DBP_ON ?
  6405:                                  supervisor ? DataBreakPoint.dbpSuperMap : DataBreakPoint.dbpUserMap :
  6406:                                  supervisor ? XEiJ.busSuperMap : XEiJ.busUserMap);
  6407:       int z;
  6408:       //    01234567
  6409:       if (0b01100110 << 24 << XEiJ.mpuSFC < 0) {  //SFC=1,2,5,6。アドレス変換あり
  6410:         if ((a & 1) == 0) {  //偶数
  6411:           M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_READ | M68kException.M6E_FSLW_SIZE_WORD | XEiJ.mpuSFC << 16;
  6412:           int pa = (supervisor ?
  6413:                     instruction ? mmuTranslateReadSuperCode (a) : mmuTranslateReadSuperData (a) :
  6414:                     instruction ? mmuTranslateReadUserCode (a) : mmuTranslateReadUserData (a));
  6415:           //z = XEiJ.busRwze (pa);
  6416:           z = mm[pa >>> XEiJ.BUS_PAGE_BITS].mmdRwz (pa);
  6417:         } else {  //奇数
  6418:           M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_READ | M68kException.M6E_FSLW_SIZE_WORD | XEiJ.mpuSFC << 16;
  6419:           int pa = (supervisor ?
  6420:                     instruction ? mmuTranslateReadSuperCode (a) : mmuTranslateReadSuperData (a) :
  6421:                     instruction ? mmuTranslateReadUserCode (a) : mmuTranslateReadUserData (a));
  6422:           //z = XEiJ.busRbz (pa) << 8;
  6423:           z = mm[pa >>> XEiJ.BUS_PAGE_BITS].mmdRbz (pa) << 8;
  6424:           M68kException.m6eFSLW ^= M68kException.M6E_FSLW_IOMA_FIRST ^ M68kException.M6E_FSLW_IOMA_SECOND;
  6425:           pa = (supervisor ?
  6426:                 instruction ? mmuTranslateReadSuperCode (a + 1) : mmuTranslateReadSuperData (a + 1) :
  6427:                 instruction ? mmuTranslateReadUserCode (a + 1) : mmuTranslateReadUserData (a + 1));
  6428:           //z |= XEiJ.busRbz (pa);
  6429:           z |= mm[pa >>> XEiJ.BUS_PAGE_BITS].mmdRbz (pa);
  6430:         }
  6431:       } else if (XEiJ.mpuSFC != 7) {  //SFC=0,3,4。アドレス変換なし
  6432:         if ((a & 1) == 0) {  //偶数
  6433:           M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_READ | M68kException.M6E_FSLW_SIZE_WORD | XEiJ.mpuSFC << 16;
  6434:           //z = XEiJ.busRwze (a);
  6435:           z = mm[a >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a);
  6436:         } else {  //奇数
  6437:           M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_READ | M68kException.M6E_FSLW_SIZE_WORD | XEiJ.mpuSFC << 16;
  6438:           //z = XEiJ.busRbz (a) << 8;
  6439:           z = mm[a >>> XEiJ.BUS_PAGE_BITS].mmdRbz (a) << 8;
  6440:           M68kException.m6eFSLW ^= M68kException.M6E_FSLW_IOMA_FIRST ^ M68kException.M6E_FSLW_IOMA_SECOND;
  6441:           a++;
  6442:           //z |= XEiJ.busRbz (a);
  6443:           z |= mm[a >>> XEiJ.BUS_PAGE_BITS].mmdRbz (a);
  6444:         }
  6445:       } else {  //SFC=7。CPU空間
  6446:         if (0x00022000 <= a && a <= 0x0002201f) {  //コプロセッサID=1
  6447:           z = XEiJ.fpuMotherboardCoprocessor.cirReadWordZero (a);
  6448:         } else {
  6449:           M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_READ | M68kException.M6E_FSLW_SIZE_WORD | XEiJ.mpuSFC << 16 | M68kException.M6E_FSLW_BUS_ERROR_ON_READ;
  6450:           M68kException.m6eNumber = M68kException.M6E_ACCESS_FAULT;
  6451:           M68kException.m6eAddress = a;
  6452:           M68kException.m6eDirection = XEiJ.MPU_WR_READ;
  6453:           M68kException.m6eSize = XEiJ.MPU_SS_WORD;
  6454:           throw M68kException.m6eSignal;
  6455:         }
  6456:       }
  6457:       if (n < 8) {  //MOVES.W <ea>,Dn
  6458:         XEiJ.regRn[n] = XEiJ.regRn[n] & ~65535 | z;
  6459:       } else {  //MOVES.W <ea>,An
  6460:         XEiJ.regRn[n] = (short) z;
  6461:       }
  6462:       if (MMU_DEBUG_COMMAND) {
  6463:         System.out.printf ("%08x movesReadWord(%d,0x%08x)=0x%04x\n", XEiJ.regPC0, XEiJ.mpuSFC, a, XEiJ.regRn[n] & 65535);
  6464:       }
  6465:     } else {  //MOVES.W Rn,<ea>。ライト
  6466:       if (MMU_DEBUG_COMMAND) {
  6467:         System.out.printf ("%08x movesWriteWord(%d,0x%08x,0x%04x)\n", XEiJ.regPC0, XEiJ.mpuDFC, a, XEiJ.regRn[n] & 65535);
  6468:       }
  6469:       boolean supervisor = (0b10011111 << 24 << XEiJ.mpuDFC) < 0;
  6470:       boolean instruction = (0b00101010 << 24 << XEiJ.mpuDFC) < 0;
  6471:       MemoryMappedDevice[] mm = (DataBreakPoint.DBP_ON ?
  6472:                                  supervisor ? DataBreakPoint.dbpSuperMap : DataBreakPoint.dbpUserMap :
  6473:                                  supervisor ? XEiJ.busSuperMap : XEiJ.busUserMap);
  6474:       int z = XEiJ.regRn[n];
  6475:       //    01234567
  6476:       if (0b01100110 << 24 << XEiJ.mpuDFC < 0) {  //DFC=1,2,5,6。アドレス変換あり
  6477:         if ((a & 1) == 0) {  //偶数
  6478:           M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_WRITE | M68kException.M6E_FSLW_SIZE_WORD | XEiJ.mpuDFC << 16;
  6479:           int pa = (supervisor ?
  6480:                     instruction ? mmuTranslateWriteSuperCode (a) : mmuTranslateWriteSuperData (a) :
  6481:                     instruction ? mmuTranslateWriteUserCode (a) : mmuTranslateWriteUserData (a));
  6482:           //XEiJ.busWwe (pa, z);
  6483:           mm[pa >>> XEiJ.BUS_PAGE_BITS].mmdWw (pa, z);
  6484:         } else {  //奇数
  6485:           M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_WRITE | M68kException.M6E_FSLW_SIZE_WORD | XEiJ.mpuDFC << 16;
  6486:           int pa = (supervisor ?
  6487:                     instruction ? mmuTranslateWriteSuperCode (a) : mmuTranslateWriteSuperData (a) :
  6488:                     instruction ? mmuTranslateWriteUserCode (a) : mmuTranslateWriteUserData (a));
  6489:           //XEiJ.busWb (pa, z >> 8);
  6490:           mm[pa >>> XEiJ.BUS_PAGE_BITS].mmdWb (pa, z >> 8);
  6491:           M68kException.m6eFSLW ^= M68kException.M6E_FSLW_IOMA_FIRST ^ M68kException.M6E_FSLW_IOMA_SECOND;
  6492:           pa = (supervisor ?
  6493:                 instruction ? mmuTranslateWriteSuperCode (a + 1) : mmuTranslateWriteSuperData (a + 1) :
  6494:                 instruction ? mmuTranslateWriteUserCode (a + 1) : mmuTranslateWriteUserData (a + 1));
  6495:           //XEiJ.busWb (pa, z);
  6496:           mm[pa >>> XEiJ.BUS_PAGE_BITS].mmdWb (pa, z);
  6497:         }
  6498:       } else if (XEiJ.mpuDFC != 7) {  //DFC=0,3,4。アドレス変換なし
  6499:         if ((a & 1) == 0) {  //偶数
  6500:           M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_WRITE | M68kException.M6E_FSLW_SIZE_WORD | XEiJ.mpuDFC << 16;
  6501:           //XEiJ.busWwe (a, z);
  6502:           mm[a >>> XEiJ.BUS_PAGE_BITS].mmdWw (a, z);
  6503:         } else {  //奇数
  6504:           M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_WRITE | M68kException.M6E_FSLW_SIZE_WORD | XEiJ.mpuDFC << 16;
  6505:           //XEiJ.busWb (a, z >> 8);
  6506:           mm[a >>> XEiJ.BUS_PAGE_BITS].mmdWb (a, z >> 8);
  6507:           M68kException.m6eFSLW ^= M68kException.M6E_FSLW_IOMA_FIRST ^ M68kException.M6E_FSLW_IOMA_SECOND;
  6508:           a++;
  6509:           //XEiJ.busWb (a, z);
  6510:           mm[a >>> XEiJ.BUS_PAGE_BITS].mmdWb (a, z);
  6511:         }
  6512:       } else {  //DFC=7。CPU空間
  6513:         if (0x00022000 <= a && a <= 0x0002201f) {  //コプロセッサID=1
  6514:           XEiJ.fpuMotherboardCoprocessor.cirWriteWord (a, z);
  6515:         } else {
  6516:           M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_WRITE | M68kException.M6E_FSLW_SIZE_WORD | XEiJ.mpuDFC << 16 | M68kException.M6E_FSLW_BUS_ERROR_ON_WRITE;
  6517:           M68kException.m6eNumber = M68kException.M6E_ACCESS_FAULT;
  6518:           M68kException.m6eAddress = a;
  6519:           M68kException.m6eDirection = XEiJ.MPU_WR_WRITE;
  6520:           M68kException.m6eSize = XEiJ.MPU_SS_WORD;
  6521:           throw M68kException.m6eSignal;
  6522:         }
  6523:       }
  6524:     }
  6525:   }  //irpMovesWord
  6526: 
  6527:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  6528:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  6529:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  6530:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  6531:   //MOVES.L <ea>,Rn                                 |-|-12346|P|-----|-----|  M+-WXZ  |0000_111_010_mmm_rrr-rnnn000000000000
  6532:   //MOVES.L Rn,<ea>                                 |-|-12346|P|-----|-----|  M+-WXZ  |0000_111_010_mmm_rrr-rnnn100000000000
  6533:   //
  6534:   //MOVES.L <ea>,Rn
  6535:   //  SFC=1,2,5,6はアドレス変換あり、SFC=0,3,4はアドレス変換なし、
  6536:   //  SFC=7はCPU空間なのでコプロセッサが割り当てられている領域以外はバスエラーになる
  6537:   //
  6538:   //MOVES.L Rn,<ea>
  6539:   //  DFC=1,2,5,6はアドレス変換あり、DFC=0,3,4はアドレス変換なし、
  6540:   //  DFC=7はCPU空間なのでコプロセッサが割り当てられている領域以外はバスエラーになる
  6541:   public static void irpMovesLong () throws M68kException {
  6542:     int w = mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);  //pcwz
  6543:     if (w << -11 != 0) {
  6544:       M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION;
  6545:       throw M68kException.m6eSignal;
  6546:     }
  6547:     if (XEiJ.regSRS == 0) {  //ユーザモードのとき
  6548:       M68kException.m6eNumber = M68kException.M6E_PRIVILEGE_VIOLATION;
  6549:       throw M68kException.m6eSignal;
  6550:     }
  6551:     //以下はスーパーバイザモード
  6552:     XEiJ.mpuCycleCount++;
  6553:     int a = efaMltLong (XEiJ.regOC & 63);
  6554:     int n = w >>> 12;  //n
  6555:     if (w << 31 - 11 >= 0) {  //MOVES.L <ea>,Rn。リード
  6556:       boolean supervisor = (0b10011111 << 24 << XEiJ.mpuSFC) < 0;
  6557:       boolean instruction = (0b00101010 << 24 << XEiJ.mpuSFC) < 0;
  6558:       MemoryMappedDevice[] mm = (DataBreakPoint.DBP_ON ?
  6559:                                  supervisor ? DataBreakPoint.dbpSuperMap : DataBreakPoint.dbpUserMap :
  6560:                                  supervisor ? XEiJ.busSuperMap : XEiJ.busUserMap);
  6561:       int z;
  6562:       //    01234567
  6563:       if (0b01100110 << 24 << XEiJ.mpuSFC < 0) {  //SFC=1,2,5,6。アドレス変換あり
  6564:         if ((a & 3) == 0) {  //4の倍数
  6565:           M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_READ | M68kException.M6E_FSLW_SIZE_LONG | XEiJ.mpuSFC << 16;
  6566:           int pa = (supervisor ?
  6567:                     instruction ? mmuTranslateReadSuperCode (a) : mmuTranslateReadSuperData (a) :
  6568:                     instruction ? mmuTranslateReadUserCode (a) : mmuTranslateReadUserData (a));
  6569:           //z = XEiJ.busRlsf (pa);
  6570:           z = mm[pa >>> XEiJ.BUS_PAGE_BITS].mmdRls (pa);
  6571:         } else if ((a & 1) == 0) {  //4の倍数+2
  6572:           M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_READ | M68kException.M6E_FSLW_SIZE_LONG | XEiJ.mpuSFC << 16;
  6573:           int pa = (supervisor ?
  6574:                     instruction ? mmuTranslateReadSuperCode (a) : mmuTranslateReadSuperData (a) :
  6575:                     instruction ? mmuTranslateReadUserCode (a) : mmuTranslateReadUserData (a));
  6576:           //z = XEiJ.busRwse (pa) << 16;
  6577:           z = mm[pa >>> XEiJ.BUS_PAGE_BITS].mmdRws (pa) << 16;
  6578:           M68kException.m6eFSLW ^= M68kException.M6E_FSLW_IOMA_FIRST ^ M68kException.M6E_FSLW_IOMA_SECOND;
  6579:           pa = (supervisor ?
  6580:                 instruction ? mmuTranslateReadSuperCode (a + 2) : mmuTranslateReadSuperData (a + 2) :
  6581:                 instruction ? mmuTranslateReadUserCode (a + 2) : mmuTranslateReadUserData (a + 2));
  6582:           //z |= XEiJ.busRwze (pa);
  6583:           z |= mm[pa >>> XEiJ.BUS_PAGE_BITS].mmdRwz (pa);
  6584:         } else {  //奇数
  6585:           M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_READ | M68kException.M6E_FSLW_SIZE_LONG | XEiJ.mpuSFC << 16;
  6586:           int pa = (supervisor ?
  6587:                     instruction ? mmuTranslateReadSuperCode (a) : mmuTranslateReadSuperData (a) :
  6588:                     instruction ? mmuTranslateReadUserCode (a) : mmuTranslateReadUserData (a));
  6589:           //z = XEiJ.busRbs (pa) << 24;
  6590:           z = mm[pa >>> XEiJ.BUS_PAGE_BITS].mmdRbs (pa) << 24;
  6591:           M68kException.m6eFSLW ^= M68kException.M6E_FSLW_IOMA_FIRST ^ M68kException.M6E_FSLW_IOMA_SECOND;
  6592:           pa = (supervisor ?
  6593:                 instruction ? mmuTranslateReadSuperCode (a + 1) : mmuTranslateReadSuperData (a + 1) :
  6594:                 instruction ? mmuTranslateReadUserCode (a + 1) : mmuTranslateReadUserData (a + 1));
  6595:           //z |= XEiJ.busRwze (pa) << 8;
  6596:           z |= mm[pa >>> XEiJ.BUS_PAGE_BITS].mmdRwz (pa) << 8;
  6597:           pa = (supervisor ?
  6598:                 instruction ? mmuTranslateReadSuperCode (a + 3) : mmuTranslateReadSuperData (a + 3) :
  6599:                 instruction ? mmuTranslateReadUserCode (a + 3) : mmuTranslateReadUserData (a + 3));
  6600:           //z |= XEiJ.busRbz (pa);
  6601:           z |= mm[pa >>> XEiJ.BUS_PAGE_BITS].mmdRbz (pa);
  6602:         }
  6603:       } else if (XEiJ.mpuSFC != 7) {  //SFC=0,3,4。アドレス変換なし
  6604:         if ((a & 3) == 0) {  //4の倍数
  6605:           M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_READ | M68kException.M6E_FSLW_SIZE_LONG | XEiJ.mpuSFC << 16;
  6606:           //z = XEiJ.busRlsf (a);
  6607:           z = mm[a >>> XEiJ.BUS_PAGE_BITS].mmdRls (a);
  6608:         } else if ((a & 1) == 0) {  //4の倍数+2
  6609:           M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_READ | M68kException.M6E_FSLW_SIZE_LONG | XEiJ.mpuSFC << 16;
  6610:           //z = XEiJ.busRwse (a) << 16;
  6611:           z = mm[a >>> XEiJ.BUS_PAGE_BITS].mmdRws (a) << 16;
  6612:           M68kException.m6eFSLW ^= M68kException.M6E_FSLW_IOMA_FIRST ^ M68kException.M6E_FSLW_IOMA_SECOND;
  6613:           a += 2;
  6614:           //z |= XEiJ.busRwze (a);
  6615:           z |= mm[a >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a);
  6616:         } else {  //奇数
  6617:           M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_READ | M68kException.M6E_FSLW_SIZE_LONG | XEiJ.mpuSFC << 16;
  6618:           //z = XEiJ.busRbs (a) << 24;
  6619:           z = mm[a >>> XEiJ.BUS_PAGE_BITS].mmdRbs (a) << 24;
  6620:           M68kException.m6eFSLW ^= M68kException.M6E_FSLW_IOMA_FIRST ^ M68kException.M6E_FSLW_IOMA_SECOND;
  6621:           a++;
  6622:           //z |= XEiJ.busRwze (a) << 8;
  6623:           z |= mm[a >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a) << 8;
  6624:           a += 2;
  6625:           //z |= XEiJ.busRbz (a);
  6626:           z |= mm[a >>> XEiJ.BUS_PAGE_BITS].mmdRbz (a);
  6627:         }
  6628:       } else {  //SFC=7。CPU空間
  6629:         if (0x00022000 <= a && a <= 0x0002201f) {  //コプロセッサID=1
  6630:           z = XEiJ.fpuMotherboardCoprocessor.cirReadLong (a);
  6631:         } else {
  6632:           M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_READ | M68kException.M6E_FSLW_SIZE_LONG | XEiJ.mpuSFC << 16 | M68kException.M6E_FSLW_BUS_ERROR_ON_READ;
  6633:           M68kException.m6eNumber = M68kException.M6E_ACCESS_FAULT;
  6634:           M68kException.m6eAddress = a;
  6635:           M68kException.m6eDirection = XEiJ.MPU_WR_READ;
  6636:           M68kException.m6eSize = XEiJ.MPU_SS_LONG;
  6637:           throw M68kException.m6eSignal;
  6638:         }
  6639:       }
  6640:       XEiJ.regRn[n] = z;
  6641:       if (MMU_DEBUG_COMMAND) {
  6642:         System.out.printf ("%08x movesReadLong(%d,0x%08x)=0x%08x\n", XEiJ.regPC0, XEiJ.mpuSFC, a, XEiJ.regRn[n]);
  6643:       }
  6644:     } else {  //MOVES.L Rn,<ea>。ライト
  6645:       if (MMU_DEBUG_COMMAND) {
  6646:         System.out.printf ("%08x movesWriteLong(%d,0x%08x,0x%08x)\n", XEiJ.regPC0, XEiJ.mpuDFC, a, XEiJ.regRn[n]);
  6647:       }
  6648:       boolean supervisor = (0b10011111 << 24 << XEiJ.mpuDFC) < 0;
  6649:       boolean instruction = (0b00101010 << 24 << XEiJ.mpuDFC) < 0;
  6650:       MemoryMappedDevice[] mm = (DataBreakPoint.DBP_ON ?
  6651:                                  supervisor ? DataBreakPoint.dbpSuperMap : DataBreakPoint.dbpUserMap :
  6652:                                  supervisor ? XEiJ.busSuperMap : XEiJ.busUserMap);
  6653:       int z = XEiJ.regRn[n];
  6654:       //    01234567
  6655:       if (0b01100110 << 24 << XEiJ.mpuDFC < 0) {  //DFC=1,2,5,6。アドレス変換あり
  6656:         if ((a & 3) == 0) {  //4の倍数
  6657:           M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_WRITE | M68kException.M6E_FSLW_SIZE_LONG | XEiJ.mpuDFC << 16;
  6658:           int pa = (supervisor ?
  6659:                     instruction ? mmuTranslateWriteSuperCode (a) : mmuTranslateWriteSuperData (a) :
  6660:                     instruction ? mmuTranslateWriteUserCode (a) : mmuTranslateWriteUserData (a));
  6661:           //XEiJ.busWlf (pa, z);
  6662:           mm[pa >>> XEiJ.BUS_PAGE_BITS].mmdWl (pa, z);
  6663:         } else if ((a & 1) == 0) {  //4の倍数+2
  6664:           M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_WRITE | M68kException.M6E_FSLW_SIZE_LONG | XEiJ.mpuDFC << 16;
  6665:           int pa = (supervisor ?
  6666:                     instruction ? mmuTranslateWriteSuperCode (a) : mmuTranslateWriteSuperData (a) :
  6667:                     instruction ? mmuTranslateWriteUserCode (a) : mmuTranslateWriteUserData (a));
  6668:           //XEiJ.busWwe (pa, z >> 16);
  6669:           mm[pa >>> XEiJ.BUS_PAGE_BITS].mmdWw (pa, z >> 16);
  6670:           M68kException.m6eFSLW ^= M68kException.M6E_FSLW_IOMA_FIRST ^ M68kException.M6E_FSLW_IOMA_SECOND;
  6671:           pa = (supervisor ?
  6672:                 instruction ? mmuTranslateWriteSuperCode (a + 2) : mmuTranslateWriteSuperData (a + 2) :
  6673:                 instruction ? mmuTranslateWriteUserCode (a + 2) : mmuTranslateWriteUserData (a + 2));
  6674:           //XEiJ.busWwe (pa, z);
  6675:           mm[pa >>> XEiJ.BUS_PAGE_BITS].mmdWw (pa, z);
  6676:         } else {  //奇数
  6677:           M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_WRITE | M68kException.M6E_FSLW_SIZE_LONG | XEiJ.mpuDFC << 16;
  6678:           int pa = (supervisor ?
  6679:                     instruction ? mmuTranslateWriteSuperCode (a) : mmuTranslateWriteSuperData (a) :
  6680:                     instruction ? mmuTranslateWriteUserCode (a) : mmuTranslateWriteUserData (a));
  6681:           //XEiJ.busWb (pa, z >> 24);
  6682:           mm[pa >>> XEiJ.BUS_PAGE_BITS].mmdWb (pa, z >> 24);
  6683:           M68kException.m6eFSLW ^= M68kException.M6E_FSLW_IOMA_FIRST ^ M68kException.M6E_FSLW_IOMA_SECOND;
  6684:           pa = (supervisor ?
  6685:                 instruction ? mmuTranslateWriteSuperCode (a + 1) : mmuTranslateWriteSuperData (a + 1) :
  6686:                 instruction ? mmuTranslateWriteUserCode (a + 1) : mmuTranslateWriteUserData (a + 1));
  6687:           //XEiJ.busWwe (pa, z >> 8);
  6688:           mm[pa >>> XEiJ.BUS_PAGE_BITS].mmdWw (pa, z >> 8);
  6689:           pa = (supervisor ?
  6690:                 instruction ? mmuTranslateWriteSuperCode (a + 3) : mmuTranslateWriteSuperData (a + 3) :
  6691:                 instruction ? mmuTranslateWriteUserCode (a + 3) : mmuTranslateWriteUserData (a + 3));
  6692:           //XEiJ.busWb (pa, z);
  6693:           mm[pa >>> XEiJ.BUS_PAGE_BITS].mmdWb (pa, z);
  6694:         }
  6695:       } else if (XEiJ.mpuDFC != 7) {  //DFC=0,3,4。アドレス変換なし
  6696:         if ((a & 3) == 0) {  //4の倍数
  6697:           M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_WRITE | M68kException.M6E_FSLW_SIZE_LONG | XEiJ.mpuDFC << 16;
  6698:           //XEiJ.busWlf (a, z);
  6699:           mm[a >>> XEiJ.BUS_PAGE_BITS].mmdWl (a, z);
  6700:         } else if ((a & 1) == 0) {  //4の倍数+2
  6701:           M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_WRITE | M68kException.M6E_FSLW_SIZE_LONG | XEiJ.mpuDFC << 16;
  6702:           //XEiJ.busWwe (a, z >> 16);
  6703:           mm[a >>> XEiJ.BUS_PAGE_BITS].mmdWw (a, z >> 16);
  6704:           M68kException.m6eFSLW ^= M68kException.M6E_FSLW_IOMA_FIRST ^ M68kException.M6E_FSLW_IOMA_SECOND;
  6705:           a += 2;
  6706:           //XEiJ.busWwe (a, z);
  6707:           mm[a >>> XEiJ.BUS_PAGE_BITS].mmdWw (a, z);
  6708:         } else {  //奇数
  6709:           M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_WRITE | M68kException.M6E_FSLW_SIZE_LONG | XEiJ.mpuDFC << 16;
  6710:           //XEiJ.busWb (a, z >> 24);
  6711:           mm[a >>> XEiJ.BUS_PAGE_BITS].mmdWb (a, z >> 24);
  6712:           M68kException.m6eFSLW ^= M68kException.M6E_FSLW_IOMA_FIRST ^ M68kException.M6E_FSLW_IOMA_SECOND;
  6713:           a++;
  6714:           //XEiJ.busWwe (a, z >> 8);
  6715:           mm[a >>> XEiJ.BUS_PAGE_BITS].mmdWw (a, z >> 8);
  6716:           a += 2;
  6717:           //XEiJ.busWb (a, z);
  6718:           mm[a >>> XEiJ.BUS_PAGE_BITS].mmdWb (a, z);
  6719:         }
  6720:       } else {  //DFC=7。CPU空間
  6721:         if (0x00022000 <= a && a <= 0x0002201f) {  //コプロセッサID=1
  6722:           XEiJ.fpuMotherboardCoprocessor.cirWriteLong (a, z);
  6723:         } else {
  6724:           M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_WRITE | M68kException.M6E_FSLW_SIZE_LONG | XEiJ.mpuDFC << 16 | M68kException.M6E_FSLW_BUS_ERROR_ON_WRITE;
  6725:           M68kException.m6eNumber = M68kException.M6E_ACCESS_FAULT;
  6726:           M68kException.m6eAddress = a;
  6727:           M68kException.m6eDirection = XEiJ.MPU_WR_WRITE;
  6728:           M68kException.m6eSize = XEiJ.MPU_SS_LONG;
  6729:           throw M68kException.m6eSignal;
  6730:         }
  6731:       }
  6732:     }
  6733:   }  //irpMovesLong
  6734: 
  6735:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  6736:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  6737:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  6738:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  6739:   //CAS.L Dc,Du,<ea>                                |-|--2346|-|-UUUU|-****|  M+-WXZ  |0000_111_011_mmm_rrr-0000000uuu000ccc        (68060 software emulate misaligned <ea>)
  6740:   //CAS2.L Dc1:Dc2,Du1:Du2,(Rn1):(Rn2)              |-|--234S|-|-UUUU|-****|          |0000_111_011_111_100-rnnn000uuu000ccc(1)-rnnn_000_uuu_000_ccc(2)
  6741:   public static void irpCasLong () throws M68kException {
  6742:     int ea = XEiJ.regOC & 63;
  6743:     if (ea == XEiJ.EA_IM) {  //CAS2.L Dc1:Dc2,Du1:Du2,(Rn1):(Rn2)
  6744:       M68kException.m6eNumber = M68kException.M6E_UNIMPLEMENTED_INSTRUCTION;
  6745:       throw M68kException.m6eSignal;
  6746:     } else {  //CAS.L Dc,Du,<ea>
  6747:       int w = mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);  //pcwz
  6748:       if ((w & ~0b0000_000_111_000_111) != 0) {
  6749:         M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION;
  6750:         throw M68kException.m6eSignal;
  6751:       }
  6752:       int a = efaMltLong (ea);  //a=ea
  6753:       if ((a & 1) != 0) {  //misaligned <ea>
  6754:         M68kException.m6eNumber = M68kException.M6E_UNIMPLEMENTED_INSTRUCTION;
  6755:         throw M68kException.m6eSignal;
  6756:       }
  6757:       int c = w & 7;
  6758:       int y = XEiJ.regRn[c];  //y=Dc
  6759:       int x = mmuReadLongData (a, XEiJ.regSRS);  //x=<ea>
  6760:       int z = x - y;  //z=<ea>-Dc
  6761:       XEiJ.regCCR = (XEiJ.regCCR & XEiJ.REG_CCR_X |
  6762:                      (z < 0 ? XEiJ.REG_CCR_N : 0) |
  6763:                      (z == 0 ? XEiJ.REG_CCR_Z : 0) |
  6764:                      ((x ^ y) & (x ^ z)) >>> 31 << 1 |
  6765:                      (x & (y ^ z) ^ (y | z)) >>> 31);  //ccr_cmp
  6766:       if (z == 0) {  //<ea>==Dc
  6767:         XEiJ.mpuCycleCount += 19;
  6768:         mmuWriteLongData (a, XEiJ.regRn[w >> 6], XEiJ.regSRS);  //Du→<ea>
  6769:       } else {  //<ea>!=Dc
  6770:         XEiJ.mpuCycleCount += 19;
  6771:         XEiJ.regRn[c] = x;  //<ea>→Dc
  6772:       }
  6773:     }
  6774:   }  //irpCasLong
  6775: 
  6776:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  6777:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  6778:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  6779:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  6780:   //MOVE.B <ea>,Dq                                  |-|012346|-|-UUUU|-**00|D M+-WXZPI|0001_qqq_000_mmm_rrr
  6781:   public static void irpMoveToDRByte () throws M68kException {
  6782:     XEiJ.mpuCycleCount++;
  6783:     int ea = XEiJ.regOC & 63;
  6784:     int qqq = XEiJ.regOC >> 9 & 7;
  6785:     int z = ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadByteSignExword ((XEiJ.regPC += 2) - 1, XEiJ.regSRS) : mmuReadByteSignData (efaAnyByte (ea), XEiJ.regSRS);  //pcbs。イミディエイトを分離
  6786:     XEiJ.regRn[qqq] = ~255 & XEiJ.regRn[qqq] | 255 & z;
  6787:     XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & z];  //ccr_tst_byte
  6788:   }  //irpMoveToDRByte
  6789: 
  6790:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  6791:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  6792:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  6793:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  6794:   //MOVE.B <ea>,(Aq)                                |-|012346|-|-UUUU|-**00|D M+-WXZPI|0001_qqq_010_mmm_rrr
  6795:   public static void irpMoveToMMByte () throws M68kException {
  6796:     XEiJ.mpuCycleCount++;
  6797:     int ea = XEiJ.regOC & 63;
  6798:     int z = ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadByteSignExword ((XEiJ.regPC += 2) - 1, XEiJ.regSRS) : mmuReadByteSignData (efaAnyByte (ea), XEiJ.regSRS);  //pcbs。イミディエイトを分離。ここでAqが変化する可能性があることに注意
  6799:     mmuWriteByteData (XEiJ.regRn[XEiJ.regOC >> 9], z, XEiJ.regSRS);  //1qqq=aqq
  6800:     XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & z];  //ccr_tst_byte
  6801:   }  //irpMoveToMMByte
  6802: 
  6803:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  6804:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  6805:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  6806:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  6807:   //MOVE.B <ea>,(Aq)+                               |-|012346|-|-UUUU|-**00|D M+-WXZPI|0001_qqq_011_mmm_rrr
  6808:   public static void irpMoveToMPByte () throws M68kException {
  6809:     XEiJ.mpuCycleCount++;
  6810:     int ea = XEiJ.regOC & 63;
  6811:     int aqq = XEiJ.regOC >> 9;  //1qqq=aqq
  6812:     int z = ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadByteSignExword ((XEiJ.regPC += 2) - 1, XEiJ.regSRS) : mmuReadByteSignData (efaAnyByte (ea), XEiJ.regSRS);  //pcbs。イミディエイトを分離。ここでAqが変化する可能性があることに注意
  6813:     int a = XEiJ.regRn[aqq];
  6814:     if (aqq < 15) {
  6815:       M68kException.m6eIncremented += 1L << (aqq << 3);  //longのシフトカウントは6bitでマスクされる
  6816:       XEiJ.regRn[aqq] = a + 1;
  6817:     } else {
  6818:       M68kException.m6eIncremented += 2L << (7 << 3);
  6819:       XEiJ.regRn[15] = a + 2;
  6820:     }
  6821:     mmuWriteByteData (a, z, XEiJ.regSRS);
  6822:     XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & z];  //ccr_tst_byte
  6823:   }  //irpMoveToMPByte
  6824: 
  6825:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  6826:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  6827:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  6828:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  6829:   //MOVE.B <ea>,-(Aq)                               |-|012346|-|-UUUU|-**00|D M+-WXZPI|0001_qqq_100_mmm_rrr
  6830:   public static void irpMoveToMNByte () throws M68kException {
  6831:     XEiJ.mpuCycleCount++;
  6832:     int ea = XEiJ.regOC & 63;
  6833:     int aqq = XEiJ.regOC >> 9;  //1qqq=aqq
  6834:     int z = ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadByteSignExword ((XEiJ.regPC += 2) - 1, XEiJ.regSRS) : mmuReadByteSignData (efaAnyByte (ea), XEiJ.regSRS);  //pcbs。イミディエイトを分離。ここでAqが変化する可能性があることに注意
  6835:     int a;
  6836:     if (aqq < 15) {
  6837:       M68kException.m6eIncremented -= 1L << (aqq << 3);  //longのシフトカウントは6bitでマスクされる
  6838:       a = --XEiJ.regRn[aqq];
  6839:     } else {
  6840:       M68kException.m6eIncremented -= 2L << (7 << 3);
  6841:       a = XEiJ.regRn[15] -= 2;
  6842:     }
  6843:     mmuWriteByteData (a, z, XEiJ.regSRS);
  6844:     XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & z];  //ccr_tst_byte
  6845:   }  //irpMoveToMNByte
  6846: 
  6847:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  6848:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  6849:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  6850:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  6851:   //MOVE.B <ea>,(d16,Aq)                            |-|012346|-|-UUUU|-**00|D M+-WXZPI|0001_qqq_101_mmm_rrr
  6852:   public static void irpMoveToMWByte () throws M68kException {
  6853:     XEiJ.mpuCycleCount++;
  6854:     int ea = XEiJ.regOC & 63;
  6855:     int aqq = XEiJ.regOC >> 9;  //1qqq=aqq
  6856:     int z = ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadByteSignExword ((XEiJ.regPC += 2) - 1, XEiJ.regSRS) : mmuReadByteSignData (efaAnyByte (ea), XEiJ.regSRS);  //pcbs。イミディエイトを分離。ここでAqが変化する可能性があることに注意
  6857:     mmuWriteByteData (XEiJ.regRn[aqq]  //ベースレジスタ
  6858:                       + mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS),  //pcws。ワードディスプレースメント
  6859:                       z, XEiJ.regSRS);
  6860:     XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & z];  //ccr_tst_byte
  6861:   }  //irpMoveToMWByte
  6862: 
  6863:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  6864:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  6865:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  6866:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  6867:   //MOVE.B <ea>,(d8,Aq,Rn.wl)                       |-|012346|-|-UUUU|-**00|D M+-WXZPI|0001_qqq_110_mmm_rrr
  6868:   public static void irpMoveToMXByte () throws M68kException {
  6869:     XEiJ.mpuCycleCount++;
  6870:     int ea = XEiJ.regOC & 63;
  6871:     int aqq = XEiJ.regOC >> 9;  //1qqq=aqq
  6872:     int z = ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadByteSignExword ((XEiJ.regPC += 2) - 1, XEiJ.regSRS) : mmuReadByteSignData (efaAnyByte (ea), XEiJ.regSRS);  //pcbs。イミディエイトを分離。ここでAqが変化する可能性があることに注意
  6873:     int w = mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);  //pcwz。拡張ワード
  6874:     int t = (((~w & 0x0180) == 0 ? 0 :  //ベースレジスタサプレス
  6875:               XEiJ.regRn[aqq])  //ベースレジスタ
  6876:              + (w << 31 - 8 >= 0 ? (byte) w :  //バイトディスプレースメント
  6877:                 w << 31 - 5 >= 0 ? 0 :  //ヌルベースディスプレースメント
  6878:                 w << 31 - 4 >= 0 ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) :  //pcws。ワードベースディスプレースメント
  6879:                 mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS)));  //pcls。ロングベースディスプレースメント
  6880:     int x = ((~w & 0x0140) == 0 ? 0 :  //インデックスサプレス
  6881:              (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] :  //ワードインデックス
  6882:               XEiJ.regRn[w >> 12])  //ロングインデックス
  6883:              << (w >> 9 & 3));  //スケールファクタ。ワードインデックスのときは符号拡張してから掛ける
  6884:     mmuWriteByteData ((w & 0x0103) <= 0x0100 ? t + x :  //メモリ間接なし
  6885:                       ((XEiJ.TEST_BIT_2_SHIFT ? w << 31 - 2 >= 0 : (w & 4) == 0) ? mmuReadLongData (t + x, XEiJ.regSRS) :  //プリインデックス
  6886:                        mmuReadLongData (t, XEiJ.regSRS) + x)  //ポストインデックス
  6887:                       + ((XEiJ.TEST_BIT_1_SHIFT ? w << 31 - 1 >= 0 : (w & 2) == 0) ? 0 :  //ヌルアウタディスプレースメント
  6888:                          (XEiJ.TEST_BIT_0_SHIFT ? w << 31 - 0 >= 0 : (w & 1) == 0) ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) :  //pcws。ワードアウタディスプレースメント
  6889:                          mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS)),  //pcls。ロングアウタディスプレースメント
  6890:                       z, XEiJ.regSRS);
  6891:     XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & z];  //ccr_tst_byte
  6892:   }  //irpMoveToMXByte
  6893: 
  6894:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  6895:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  6896:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  6897:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  6898:   //MOVE.B <ea>,(xxx).W                             |-|012346|-|-UUUU|-**00|D M+-WXZPI|0001_000_111_mmm_rrr
  6899:   public static void irpMoveToZWByte () throws M68kException {
  6900:     XEiJ.mpuCycleCount++;
  6901:     int ea = XEiJ.regOC & 63;
  6902:     int z = ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadByteSignExword ((XEiJ.regPC += 2) - 1, XEiJ.regSRS) : mmuReadByteSignData (efaAnyByte (ea), XEiJ.regSRS);  //pcbs。イミディエイトを分離
  6903:     mmuWriteByteData (mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS),  //pcws
  6904:                       z, XEiJ.regSRS);
  6905:     XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & z];  //ccr_tst_byte
  6906:   }  //irpMoveToZWByte
  6907: 
  6908:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  6909:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  6910:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  6911:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  6912:   //MOVE.B <ea>,(xxx).L                             |-|012346|-|-UUUU|-**00|D M+-WXZPI|0001_001_111_mmm_rrr
  6913:   public static void irpMoveToZLByte () throws M68kException {
  6914:     XEiJ.mpuCycleCount++;
  6915:     int ea = XEiJ.regOC & 63;
  6916:     int z = ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadByteSignExword ((XEiJ.regPC += 2) - 1, XEiJ.regSRS) : mmuReadByteSignData (efaAnyByte (ea), XEiJ.regSRS);  //pcbs。イミディエイトを分離
  6917:     mmuWriteByteData (mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS),  //pcls
  6918:                       z, XEiJ.regSRS);
  6919:     XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & z];  //ccr_tst_byte
  6920:   }  //irpMoveToZLByte
  6921: 
  6922:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  6923:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  6924:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  6925:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  6926:   //MOVE.L <ea>,Dq                                  |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0010_qqq_000_mmm_rrr
  6927:   public static void irpMoveToDRLong () throws M68kException {
  6928:     XEiJ.mpuCycleCount++;
  6929:     int ea = XEiJ.regOC & 63;
  6930:     int z;
  6931:     XEiJ.regRn[XEiJ.regOC >> 9 & 7] = z = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS) : mmuReadLongData (efaAnyLong (ea), XEiJ.regSRS);  //pcls。イミディエイトを分離。このr[ea]はデータレジスタまたはアドレスレジスタ
  6932:     XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X);  //ccr_tst
  6933:   }  //irpMoveToDRLong
  6934: 
  6935:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  6936:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  6937:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  6938:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  6939:   //MOVEA.L <ea>,Aq                                 |-|012346|-|-----|-----|DAM+-WXZPI|0010_qqq_001_mmm_rrr
  6940:   //MOVE.L <ea>,Aq                                  |A|012346|-|-----|-----|DAM+-WXZPI|0010_qqq_001_mmm_rrr [MOVEA.L <ea>,Aq]
  6941:   public static void irpMoveaLong () throws M68kException {
  6942:     XEiJ.mpuCycleCount++;
  6943:     int ea = XEiJ.regOC & 63;
  6944:     XEiJ.regRn[(XEiJ.regOC >> 9) - (16 - 8)] = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS) : mmuReadLongData (efaAnyLong (ea), XEiJ.regSRS);  //pcls。イミディエイトを分離。このr[ea]はデータレジスタまたはアドレスレジスタ。右辺でAqが変化する可能性があることに注意
  6945:   }  //irpMoveaLong
  6946: 
  6947:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  6948:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  6949:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  6950:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  6951:   //MOVE.L <ea>,(Aq)                                |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0010_qqq_010_mmm_rrr
  6952:   public static void irpMoveToMMLong () throws M68kException {
  6953:     XEiJ.mpuCycleCount++;
  6954:     int ea = XEiJ.regOC & 63;
  6955:     int z = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS) : mmuReadLongData (efaAnyLong (ea), XEiJ.regSRS);  //pcls。イミディエイトを分離。このr[ea]はデータレジスタまたはアドレスレジスタ。ここでAqが変化する可能性があることに注意
  6956:     mmuWriteLongData (XEiJ.regRn[(XEiJ.regOC >> 9) - (16 - 8)], z, XEiJ.regSRS);
  6957:     XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X);  //ccr_tst
  6958:   }  //irpMoveToMMLong
  6959: 
  6960:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  6961:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  6962:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  6963:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  6964:   //MOVE.L <ea>,(Aq)+                               |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0010_qqq_011_mmm_rrr
  6965:   public static void irpMoveToMPLong () throws M68kException {
  6966:     XEiJ.mpuCycleCount++;
  6967:     int ea = XEiJ.regOC & 63;
  6968:     int z = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS) : mmuReadLongData (efaAnyLong (ea), XEiJ.regSRS);  //pcls。イミディエイトを分離。このr[ea]はデータレジスタまたはアドレスレジスタ。ここでAqが変化する可能性があることに注意
  6969:     int aqq = (XEiJ.regOC >> 9) - (16 - 8);
  6970:     M68kException.m6eIncremented += 4L << (aqq << 3);  //longのシフトカウントは6bitでマスクされる
  6971:     mmuWriteLongData ((XEiJ.regRn[aqq] += 4) - 4, z, XEiJ.regSRS);
  6972:     XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X);  //ccr_tst
  6973:   }  //irpMoveToMPLong
  6974: 
  6975:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  6976:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  6977:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  6978:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  6979:   //MOVE.L <ea>,-(Aq)                               |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0010_qqq_100_mmm_rrr
  6980:   public static void irpMoveToMNLong () throws M68kException {
  6981:     XEiJ.mpuCycleCount++;
  6982:     int ea = XEiJ.regOC & 63;
  6983:     int z = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS) : mmuReadLongData (efaAnyLong (ea), XEiJ.regSRS);  //pcls。イミディエイトを分離。このr[ea]はデータレジスタまたはアドレスレジスタ。ここでAqが変化する可能性があることに注意
  6984:     int aqq = (XEiJ.regOC >> 9) - (16 - 8);
  6985:     M68kException.m6eIncremented -= 4L << (aqq << 3);  //longのシフトカウントは6bitでマスクされる
  6986:     mmuWriteLongData ((XEiJ.regRn[aqq] -= 4), z, XEiJ.regSRS);
  6987:     XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X);  //ccr_tst
  6988:   }  //irpMoveToMNLong
  6989: 
  6990:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  6991:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  6992:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  6993:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  6994:   //MOVE.L <ea>,(d16,Aq)                            |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0010_qqq_101_mmm_rrr
  6995:   public static void irpMoveToMWLong () throws M68kException {
  6996:     XEiJ.mpuCycleCount++;
  6997:     int ea = XEiJ.regOC & 63;
  6998:     int z = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS) : mmuReadLongData (efaAnyLong (ea), XEiJ.regSRS);  //pcls。イミディエイトを分離。このr[ea]はデータレジスタまたはアドレスレジスタ。ここでAqが変化する可能性があることに注意
  6999:     mmuWriteLongData (XEiJ.regRn[(XEiJ.regOC >> 9) - (16 - 8)]  //ベースレジスタ
  7000:            + mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS),  //pcws。ワードディスプレースメント
  7001:            z, XEiJ.regSRS);
  7002:     XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X);  //ccr_tst
  7003:   }  //irpMoveToMWLong
  7004: 
  7005:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7006:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  7007:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  7008:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7009:   //MOVE.L <ea>,(d8,Aq,Rn.wl)                       |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0010_qqq_110_mmm_rrr
  7010:   public static void irpMoveToMXLong () throws M68kException {
  7011:     XEiJ.mpuCycleCount++;
  7012:     int ea = XEiJ.regOC & 63;
  7013:     int aqq = (XEiJ.regOC >> 9) - (16 - 8);
  7014:     int z = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS) : mmuReadLongData (efaAnyLong (ea), XEiJ.regSRS);  //pcls。イミディエイトを分離。このr[ea]はデータレジスタまたはアドレスレジスタ。ここでAqが変化する可能性があることに注意
  7015:     int w = mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);  //pcwz。拡張ワード
  7016:     int t = (((~w & 0x0180) == 0 ? 0 :  //ベースレジスタサプレス
  7017:               XEiJ.regRn[aqq])  //ベースレジスタ
  7018:              + (w << 31 - 8 >= 0 ? (byte) w :  //バイトディスプレースメント
  7019:                 w << 31 - 5 >= 0 ? 0 :  //ヌルベースディスプレースメント
  7020:                 w << 31 - 4 >= 0 ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) :  //pcws。ワードベースディスプレースメント
  7021:                 mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS)));  //pcls。ロングベースディスプレースメント
  7022:     int x = ((~w & 0x0140) == 0 ? 0 :  //インデックスサプレス
  7023:              (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] :  //ワードインデックス
  7024:               XEiJ.regRn[w >> 12])  //ロングインデックス
  7025:              << (w >> 9 & 3));  //スケールファクタ。ワードインデックスのときは符号拡張してから掛ける
  7026:     mmuWriteLongData ((w & 0x0103) <= 0x0100 ? t + x :  //メモリ間接なし
  7027:            ((XEiJ.TEST_BIT_2_SHIFT ? w << 31 - 2 >= 0 : (w & 4) == 0) ? mmuReadLongData (t + x, XEiJ.regSRS) :  //プリインデックス
  7028:             mmuReadLongData (t, XEiJ.regSRS) + x)  //ポストインデックス
  7029:            + ((XEiJ.TEST_BIT_1_SHIFT ? w << 31 - 1 >= 0 : (w & 2) == 0) ? 0 :  //ヌルアウタディスプレースメント
  7030:               (XEiJ.TEST_BIT_0_SHIFT ? w << 31 - 0 >= 0 : (w & 1) == 0) ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) :  //pcws。ワードアウタディスプレースメント
  7031:               mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS)),  //pcls。ロングアウタディスプレースメント
  7032:            z, XEiJ.regSRS);
  7033:     XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X);  //ccr_tst
  7034:   }  //irpMoveToMXLong
  7035: 
  7036:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7037:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  7038:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  7039:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7040:   //MOVE.L <ea>,(xxx).W                             |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0010_000_111_mmm_rrr
  7041:   public static void irpMoveToZWLong () throws M68kException {
  7042:     XEiJ.mpuCycleCount++;
  7043:     int ea = XEiJ.regOC & 63;
  7044:     int z = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS) : mmuReadLongData (efaAnyLong (ea), XEiJ.regSRS);  //pcls。イミディエイトを分離。このr[ea]はデータレジスタまたはアドレスレジスタ
  7045:     mmuWriteLongData (mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS),  //pcws
  7046:            z, XEiJ.regSRS);
  7047:     XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X);  //ccr_tst
  7048:   }  //irpMoveToZWLong
  7049: 
  7050:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7051:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  7052:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  7053:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7054:   //MOVE.L <ea>,(xxx).L                             |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0010_001_111_mmm_rrr
  7055:   public static void irpMoveToZLLong () throws M68kException {
  7056:     XEiJ.mpuCycleCount++;
  7057:     int ea = XEiJ.regOC & 63;
  7058:     int z = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS) : mmuReadLongData (efaAnyLong (ea), XEiJ.regSRS);  //pcls。イミディエイトを分離。このr[ea]はデータレジスタまたはアドレスレジスタ
  7059:     mmuWriteLongData (mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS),  //pcls
  7060:            z, XEiJ.regSRS);
  7061:     XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X);  //ccr_tst
  7062:   }  //irpMoveToZLLong
  7063: 
  7064:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7065:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  7066:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  7067:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7068:   //MOVE.W <ea>,Dq                                  |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0011_qqq_000_mmm_rrr
  7069:   public static void irpMoveToDRWord () throws M68kException {
  7070:     XEiJ.mpuCycleCount++;
  7071:     int ea = XEiJ.regOC & 63;
  7072:     int qqq = XEiJ.regOC >> 9 & 7;
  7073:     int z = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) : mmuReadWordSignData (efaAnyWord (ea), XEiJ.regSRS);  //pcws。イミディエイトを分離。このr[ea]はデータレジスタまたはアドレスレジスタ
  7074:     XEiJ.regRn[qqq] = ~65535 & XEiJ.regRn[qqq] | (char) z;
  7075:     XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (char) z - 1 >> 31 & XEiJ.REG_CCR_Z | ((short) z < 0 ? XEiJ.REG_CCR_N : 0);  //ccr_tst_word
  7076:   }  //irpMoveToDRWord
  7077: 
  7078:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7079:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  7080:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  7081:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7082:   //MOVEA.W <ea>,Aq                                 |-|012346|-|-----|-----|DAM+-WXZPI|0011_qqq_001_mmm_rrr
  7083:   //MOVE.W <ea>,Aq                                  |A|012346|-|-----|-----|DAM+-WXZPI|0011_qqq_001_mmm_rrr [MOVEA.W <ea>,Aq]
  7084:   //
  7085:   //MOVEA.W <ea>,Aq
  7086:   //  ワードデータをロングに符号拡張してAqの全体を更新する
  7087:   public static void irpMoveaWord () throws M68kException {
  7088:     XEiJ.mpuCycleCount++;
  7089:     int ea = XEiJ.regOC & 63;
  7090:     XEiJ.regRn[XEiJ.regOC >> 9 & 15] = ea < XEiJ.EA_MM ? (short) XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) : mmuReadWordSignData (efaAnyWord (ea), XEiJ.regSRS);  //符号拡張して32bit全部書き換える。pcws。イミディエイトを分離。このr[ea]はデータレジスタまたはアドレスレジスタ。右辺でAqが変化する可能性があることに注意
  7091:   }  //irpMoveaWord
  7092: 
  7093:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7094:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  7095:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  7096:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7097:   //MOVE.W <ea>,(Aq)                                |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0011_qqq_010_mmm_rrr
  7098:   public static void irpMoveToMMWord () throws M68kException {
  7099:     XEiJ.mpuCycleCount++;
  7100:     int ea = XEiJ.regOC & 63;
  7101:     int z = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) : mmuReadWordSignData (efaAnyWord (ea), XEiJ.regSRS);  //pcws。イミディエイトを分離。このr[ea]はデータレジスタまたはアドレスレジスタ。ここでAqが変化する可能性があることに注意
  7102:     mmuWriteWordData (XEiJ.regRn[XEiJ.regOC >> 9 & 15], z, XEiJ.regSRS);
  7103:     XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (char) z - 1 >> 31 & XEiJ.REG_CCR_Z | ((short) z < 0 ? XEiJ.REG_CCR_N : 0);  //ccr_tst_word
  7104:   }  //irpMoveToMMWord
  7105: 
  7106:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7107:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  7108:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  7109:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7110:   //MOVE.W <ea>,(Aq)+                               |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0011_qqq_011_mmm_rrr
  7111:   public static void irpMoveToMPWord () throws M68kException {
  7112:     XEiJ.mpuCycleCount++;
  7113:     int ea = XEiJ.regOC & 63;
  7114:     int z = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) : mmuReadWordSignData (efaAnyWord (ea), XEiJ.regSRS);  //このr[ea]はデータレジスタまたはアドレスレジスタ。pcws。イミディエイトを分離。ここでAqが変化する可能性があることに注意
  7115:     int aqq = XEiJ.regOC >> 9 & 15;
  7116:     M68kException.m6eIncremented += 2L << (aqq << 3);  //longのシフトカウントは6bitでマスクされる
  7117:     mmuWriteWordData ((XEiJ.regRn[aqq] += 2) - 2, z, XEiJ.regSRS);
  7118:     XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (char) z - 1 >> 31 & XEiJ.REG_CCR_Z | ((short) z < 0 ? XEiJ.REG_CCR_N : 0);  //ccr_tst_word
  7119:   }  //irpMoveToMPWord
  7120: 
  7121:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7122:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  7123:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  7124:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7125:   //MOVE.W <ea>,-(Aq)                               |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0011_qqq_100_mmm_rrr
  7126:   public static void irpMoveToMNWord () throws M68kException {
  7127:     XEiJ.mpuCycleCount++;
  7128:     int ea = XEiJ.regOC & 63;
  7129:     int z = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) : mmuReadWordSignData (efaAnyWord (ea), XEiJ.regSRS);  //このr[ea]はデータレジスタまたはアドレスレジスタ。pcws。イミディエイトを分離。ここでAqが変化する可能性があることに注意
  7130:     int aqq = XEiJ.regOC >> 9 & 15;
  7131:     M68kException.m6eIncremented -= 2L << (aqq << 3);  //longのシフトカウントは6bitでマスクされる
  7132:     mmuWriteWordData ((XEiJ.regRn[aqq] -= 2), z, XEiJ.regSRS);
  7133:     XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (char) z - 1 >> 31 & XEiJ.REG_CCR_Z | ((short) z < 0 ? XEiJ.REG_CCR_N : 0);  //ccr_tst_word
  7134:   }  //irpMoveToMNWord
  7135: 
  7136:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7137:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  7138:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  7139:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7140:   //MOVE.W <ea>,(d16,Aq)                            |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0011_qqq_101_mmm_rrr
  7141:   public static void irpMoveToMWWord () throws M68kException {
  7142:     XEiJ.mpuCycleCount++;
  7143:     int ea = XEiJ.regOC & 63;
  7144:     int aqq = XEiJ.regOC >> 9 & 15;
  7145:     int z = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) : mmuReadWordSignData (efaAnyWord (ea), XEiJ.regSRS);  //このr[ea]はデータレジスタまたはアドレスレジスタ。pcws。イミディエイトを分離。ここでAqが変化する可能性があることに注意
  7146:     mmuWriteWordData (XEiJ.regRn[aqq]  //ベースレジスタ
  7147:            + mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS),  //pcws。ワードディスプレースメント
  7148:            z, XEiJ.regSRS);
  7149:     XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (char) z - 1 >> 31 & XEiJ.REG_CCR_Z | ((short) z < 0 ? XEiJ.REG_CCR_N : 0);  //ccr_tst_word
  7150:   }  //irpMoveToMWWord
  7151: 
  7152:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7153:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  7154:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  7155:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7156:   //MOVE.W <ea>,(d8,Aq,Rn.wl)                       |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0011_qqq_110_mmm_rrr
  7157:   public static void irpMoveToMXWord () throws M68kException {
  7158:     XEiJ.mpuCycleCount++;
  7159:     int ea = XEiJ.regOC & 63;
  7160:     int aqq = XEiJ.regOC >> 9 & 15;
  7161:     int z = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) : mmuReadWordSignData (efaAnyWord (ea), XEiJ.regSRS);  //このr[ea]はデータレジスタまたはアドレスレジスタ。pcws。イミディエイトを分離。ここでAqが変化する可能性があることに注意
  7162:     int w = mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);  //pcwz。拡張ワード
  7163:     int t = (((~w & 0x0180) == 0 ? 0 :  //ベースレジスタサプレス
  7164:               XEiJ.regRn[aqq])  //ベースレジスタ
  7165:              + (w << 31 - 8 >= 0 ? (byte) w :  //バイトディスプレースメント
  7166:                 w << 31 - 5 >= 0 ? 0 :  //ヌルベースディスプレースメント
  7167:                 w << 31 - 4 >= 0 ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) :  //pcws。ワードベースディスプレースメント
  7168:                 mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS)));  //pcls。ロングベースディスプレースメント
  7169:     int x = ((~w & 0x0140) == 0 ? 0 :  //インデックスサプレス
  7170:              (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] :  //ワードインデックス
  7171:               XEiJ.regRn[w >> 12])  //ロングインデックス
  7172:              << (w >> 9 & 3));  //スケールファクタ。ワードインデックスのときは符号拡張してから掛ける
  7173:     mmuWriteWordData ((w & 0x0103) <= 0x0100 ? t + x :  //メモリ間接なし
  7174:            ((XEiJ.TEST_BIT_2_SHIFT ? w << 31 - 2 >= 0 : (w & 4) == 0) ? mmuReadLongData (t + x, XEiJ.regSRS) :  //プリインデックス
  7175:             mmuReadLongData (t, XEiJ.regSRS) + x)  //ポストインデックス
  7176:            + ((XEiJ.TEST_BIT_1_SHIFT ? w << 31 - 1 >= 0 : (w & 2) == 0) ? 0 :  //ヌルアウタディスプレースメント
  7177:               (XEiJ.TEST_BIT_0_SHIFT ? w << 31 - 0 >= 0 : (w & 1) == 0) ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) :  //pcws。ワードアウタディスプレースメント
  7178:               mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS)),  //pcls。ロングアウタディスプレースメント
  7179:            z, XEiJ.regSRS);
  7180:     XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (char) z - 1 >> 31 & XEiJ.REG_CCR_Z | ((short) z < 0 ? XEiJ.REG_CCR_N : 0);  //ccr_tst_word
  7181:   }  //irpMoveToMXWord
  7182: 
  7183:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7184:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  7185:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  7186:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7187:   //MOVE.W <ea>,(xxx).W                             |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0011_000_111_mmm_rrr
  7188:   public static void irpMoveToZWWord () throws M68kException {
  7189:     XEiJ.mpuCycleCount++;
  7190:     int ea = XEiJ.regOC & 63;
  7191:     int z = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) : mmuReadWordSignData (efaAnyWord (ea), XEiJ.regSRS);  //このr[ea]はデータレジスタまたはアドレスレジスタ。pcws。イミディエイトを分離
  7192:     mmuWriteWordData (mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS),  //pcws
  7193:            z, XEiJ.regSRS);
  7194:     XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (char) z - 1 >> 31 & XEiJ.REG_CCR_Z | ((short) z < 0 ? XEiJ.REG_CCR_N : 0);  //ccr_tst_word
  7195:   }  //irpMoveToZWWord
  7196: 
  7197:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7198:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  7199:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  7200:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7201:   //MOVE.W <ea>,(xxx).L                             |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0011_001_111_mmm_rrr
  7202:   public static void irpMoveToZLWord () throws M68kException {
  7203:     XEiJ.mpuCycleCount++;
  7204:     int ea = XEiJ.regOC & 63;
  7205:     int z = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) : mmuReadWordSignData (efaAnyWord (ea), XEiJ.regSRS);  //このr[ea]はデータレジスタまたはアドレスレジスタ。pcws。イミディエイトを分離
  7206:     mmuWriteWordData (mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS),  //pcls
  7207:            z, XEiJ.regSRS);
  7208:     XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (char) z - 1 >> 31 & XEiJ.REG_CCR_Z | ((short) z < 0 ? XEiJ.REG_CCR_N : 0);  //ccr_tst_word
  7209:   }  //irpMoveToZLWord
  7210: 
  7211:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7212:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  7213:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  7214:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7215:   //NEGX.B <ea>                                     |-|012346|-|*UUUU|*****|D M+-WXZ  |0100_000_000_mmm_rrr
  7216:   public static void irpNegxByte () throws M68kException {
  7217:     int ea = XEiJ.regOC & 63;
  7218:     int y;
  7219:     int z;
  7220:     if (ea < XEiJ.EA_AR) {  //NEGX.B Dr
  7221:       XEiJ.mpuCycleCount++;
  7222:       z = (byte) (XEiJ.regRn[ea] = ~0xff & (y = XEiJ.regRn[ea]) | 0xff & -(y = (byte) y) - (XEiJ.regCCR >> 4));  //Xの左側はすべて0なのでCCR_X&を省略
  7223:     } else {  //NEGX.B <mem>
  7224:       XEiJ.mpuCycleCount++;
  7225:       int a = efaMltByte (ea);
  7226:       mmuWriteByteData (a, z = (byte) (-(y = mmuModifyByteSignData (a, XEiJ.regSRS)) - (XEiJ.regCCR >> 4)), XEiJ.regSRS);  //Xの左側はすべて0なのでCCR_X&を省略
  7227:     }
  7228:     XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_Z : 0) |
  7229:            (y & z) >>> 31 << 1 |
  7230:            (y | z) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C));  //ccr_negx
  7231:   }  //irpNegxByte
  7232: 
  7233:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7234:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  7235:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  7236:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7237:   //NEGX.W <ea>                                     |-|012346|-|*UUUU|*****|D M+-WXZ  |0100_000_001_mmm_rrr
  7238:   public static void irpNegxWord () throws M68kException {
  7239:     int ea = XEiJ.regOC & 63;
  7240:     int y;
  7241:     int z;
  7242:     if (ea < XEiJ.EA_AR) {  //NEGX.W Dr
  7243:       XEiJ.mpuCycleCount++;
  7244:       z = (short) (XEiJ.regRn[ea] = ~0xffff & (y = XEiJ.regRn[ea]) | (char) (-(y = (short) y) - (XEiJ.regCCR >> 4)));  //Xの左側はすべて0なのでCCR_X&を省略
  7245:     } else {  //NEGX.W <mem>
  7246:       XEiJ.mpuCycleCount++;
  7247:       int a = efaMltWord (ea);
  7248:       mmuWriteWordData (a, z = (short) (-(y = mmuModifyWordSignData (a, XEiJ.regSRS)) - (XEiJ.regCCR >> 4)), XEiJ.regSRS);  //Xの左側はすべて0なのでCCR_X&を省略
  7249:     }
  7250:     XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_Z : 0) |
  7251:            (y & z) >>> 31 << 1 |
  7252:            (y | z) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C));  //ccr_negx
  7253:   }  //irpNegxWord
  7254: 
  7255:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7256:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  7257:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  7258:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7259:   //NEGX.L <ea>                                     |-|012346|-|*UUUU|*****|D M+-WXZ  |0100_000_010_mmm_rrr
  7260:   public static void irpNegxLong () throws M68kException {
  7261:     int ea = XEiJ.regOC & 63;
  7262:     int y;
  7263:     int z;
  7264:     if (ea < XEiJ.EA_AR) {  //NEGX.L Dr
  7265:       XEiJ.mpuCycleCount++;
  7266:       XEiJ.regRn[ea] = z = -(y = XEiJ.regRn[ea]) - (XEiJ.regCCR >> 4);  //Xの左側はすべて0なのでCCR_X&を省略
  7267:     } else {  //NEGX.L <mem>
  7268:       XEiJ.mpuCycleCount++;
  7269:       int a = efaMltLong (ea);
  7270:       mmuWriteLongData (a, z = -(y = mmuModifyLongData (a, XEiJ.regSRS)) - (XEiJ.regCCR >> 4), XEiJ.regSRS);  //Xの左側はすべて0なのでCCR_X&を省略
  7271:     }
  7272:     XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_Z : 0) |
  7273:            (y & z) >>> 31 << 1 |
  7274:            (y | z) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C));  //ccr_negx
  7275:   }  //irpNegxLong
  7276: 
  7277:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7278:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  7279:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  7280:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7281:   //MOVE.W SR,<ea>                                  |-|-12346|P|*****|-----|D M+-WXZ  |0100_000_011_mmm_rrr
  7282:   public static void irpMoveFromSR () throws M68kException {
  7283:     //MC68010以上では特権命令
  7284:     if (XEiJ.regSRS == 0) {  //ユーザモードのとき
  7285:       M68kException.m6eNumber = M68kException.M6E_PRIVILEGE_VIOLATION;
  7286:       throw M68kException.m6eSignal;
  7287:     }
  7288:     //以下はスーパーバイザモード
  7289:     int ea = XEiJ.regOC & 63;
  7290:     if (ea < XEiJ.EA_AR) {  //MOVE.W SR,Dr
  7291:       XEiJ.mpuCycleCount++;
  7292:       XEiJ.regRn[ea] = ~0xffff & XEiJ.regRn[ea] | XEiJ.regSRT1 | XEiJ.regSRS | XEiJ.regSRM | XEiJ.regSRI | XEiJ.regCCR;
  7293:     } else {  //MOVE.W SR,<mem>
  7294:       XEiJ.mpuCycleCount++;
  7295:       mmuWriteWordData (efaMltWord (ea), XEiJ.regSRT1 | XEiJ.regSRS | XEiJ.regSRM | XEiJ.regSRI | XEiJ.regCCR, 1);
  7296:     }
  7297:   }  //irpMoveFromSR
  7298: 
  7299:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7300:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  7301:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  7302:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7303:   //CHK.L <ea>,Dq                                   |-|--2346|-|-UUUU|-*UUU|D M+-WXZPI|0100_qqq_100_mmm_rrr
  7304:   public static void irpChkLong () throws M68kException {
  7305:     XEiJ.mpuCycleCount += 2;
  7306:     int ea = XEiJ.regOC & 63;
  7307:     int x = ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS) : mmuReadLongData (efaAnyLong (ea), XEiJ.regSRS);  //pcls。イミディエイトを分離
  7308:     int y = XEiJ.regRn[XEiJ.regOC >> 9 & 7];
  7309:     int z = x - y;
  7310:     XEiJ.regCCR = (XEiJ.regCCR & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z | XEiJ.REG_CCR_V | XEiJ.REG_CCR_C) |
  7311:                    (y < 0 ? XEiJ.REG_CCR_N : 0));
  7312:     if (y < 0 || x < y) {
  7313:       XEiJ.mpuCycleCount += 20 - 19;
  7314:       M68kException.m6eAddress = XEiJ.regPC0;  //アドレスは命令の先頭
  7315:       M68kException.m6eNumber = M68kException.M6E_CHK_INSTRUCTION;
  7316:       throw M68kException.m6eSignal;
  7317:     }
  7318:   }  //irpChkLong
  7319: 
  7320:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7321:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  7322:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  7323:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7324:   //CHK.W <ea>,Dq                                   |-|012346|-|-UUUU|-*UUU|D M+-WXZPI|0100_qqq_110_mmm_rrr
  7325:   public static void irpChkWord () throws M68kException {
  7326:     XEiJ.mpuCycleCount += 2;
  7327:     int ea = XEiJ.regOC & 63;
  7328:     int x = ea < XEiJ.EA_AR ? (short) XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) : mmuReadWordSignData (efaAnyWord (ea), XEiJ.regSRS);  //pcws。イミディエイトを分離
  7329:     int y = (short) XEiJ.regRn[XEiJ.regOC >> 9 & 7];
  7330:     int z = (short) (x - y);
  7331:     XEiJ.regCCR = (XEiJ.regCCR & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z | XEiJ.REG_CCR_V | XEiJ.REG_CCR_C) |
  7332:                    (y < 0 ? XEiJ.REG_CCR_N : 0));
  7333:     if (y < 0 || x < y) {
  7334:       XEiJ.mpuCycleCount += 20 - 19;
  7335:       M68kException.m6eAddress = XEiJ.regPC0;  //アドレスは命令の先頭
  7336:       M68kException.m6eNumber = M68kException.M6E_CHK_INSTRUCTION;
  7337:       throw M68kException.m6eSignal;
  7338:     }
  7339:   }  //irpChkWord
  7340: 
  7341:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7342:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  7343:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  7344:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7345:   //LEA.L <ea>,Aq                                   |-|012346|-|-----|-----|  M  WXZP |0100_qqq_111_mmm_rrr
  7346:   //EXTB.L Dr                                       |-|--2346|-|-UUUU|-**00|D         |0100_100_111_000_rrr
  7347:   public static void irpLea () throws M68kException {
  7348:     int ea = XEiJ.regOC & 63;
  7349:     if (ea < XEiJ.EA_AR) {  //EXTB.L Dr
  7350:       XEiJ.mpuCycleCount++;
  7351:       int z;
  7352:       XEiJ.regRn[ea] = z = (byte) XEiJ.regRn[ea];
  7353:       XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X);  //ccr_tst
  7354:     } else {  //LEA.L <ea>,Aq
  7355:       XEiJ.mpuCycleCount++;
  7356:       XEiJ.regRn[(XEiJ.regOC >> 9) - (32 - 8)] = efaLeaPea (ea);
  7357:     }
  7358:   }  //irpLea
  7359: 
  7360:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7361:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  7362:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  7363:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7364:   //CLR.B <ea>                                      |-|012346|-|-UUUU|-0100|D M+-WXZ  |0100_001_000_mmm_rrr (68000 and 68008 read before clear)
  7365:   public static void irpClrByte () throws M68kException {
  7366:     int ea = XEiJ.regOC & 63;
  7367:     if (ea < XEiJ.EA_AR) {  //CLR.B Dr
  7368:       XEiJ.mpuCycleCount++;
  7369:       XEiJ.regRn[ea] &= ~0xff;
  7370:     } else {  //CLR.B <mem>
  7371:       XEiJ.mpuCycleCount++;
  7372:       mmuWriteByteData (efaMltByte (ea), 0, XEiJ.regSRS);
  7373:     }
  7374:     XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z;  //ccr_clr
  7375:   }  //irpClrByte
  7376: 
  7377:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7378:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  7379:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  7380:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7381:   //CLR.W <ea>                                      |-|012346|-|-UUUU|-0100|D M+-WXZ  |0100_001_001_mmm_rrr (68000 and 68008 read before clear)
  7382:   public static void irpClrWord () throws M68kException {
  7383:     int ea = XEiJ.regOC & 63;
  7384:     if (ea < XEiJ.EA_AR) {  //CLR.W Dr
  7385:       XEiJ.mpuCycleCount++;
  7386:       XEiJ.regRn[ea] &= ~0xffff;
  7387:     } else {  //CLR.W <mem>
  7388:       XEiJ.mpuCycleCount++;
  7389:       mmuWriteWordData (efaMltWord (ea), 0, XEiJ.regSRS);
  7390:     }
  7391:     XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z;  //ccr_clr
  7392:   }  //irpClrWord
  7393: 
  7394:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7395:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  7396:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  7397:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7398:   //CLR.L <ea>                                      |-|012346|-|-UUUU|-0100|D M+-WXZ  |0100_001_010_mmm_rrr (68000 and 68008 read before clear)
  7399:   public static void irpClrLong () throws M68kException {
  7400:     int ea = XEiJ.regOC & 63;
  7401:     if (ea < XEiJ.EA_AR) {  //CLR.L Dr
  7402:       XEiJ.mpuCycleCount++;
  7403:       XEiJ.regRn[ea] = 0;
  7404:     } else {  //CLR.L <mem>
  7405:       XEiJ.mpuCycleCount++;
  7406:       mmuWriteLongData (efaMltLong (ea), 0, XEiJ.regSRS);
  7407:     }
  7408:     XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z;  //ccr_clr
  7409:   }  //irpClrLong
  7410: 
  7411:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7412:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  7413:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  7414:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7415:   //MOVE.W CCR,<ea>                                 |-|-12346|-|*****|-----|D M+-WXZ  |0100_001_011_mmm_rrr
  7416:   public static void irpMoveFromCCR () throws M68kException {
  7417:     int ea = XEiJ.regOC & 63;
  7418:     if (ea < XEiJ.EA_AR) {  //MOVE.W CCR,Dr
  7419:       XEiJ.mpuCycleCount++;
  7420:       XEiJ.regRn[ea] = ~0xffff & XEiJ.regRn[ea] | XEiJ.regCCR;
  7421:     } else {  //MOVE.W CCR,<mem>
  7422:       XEiJ.mpuCycleCount++;
  7423:       mmuWriteWordData (efaMltWord (ea), XEiJ.regCCR, XEiJ.regSRS);
  7424:     }
  7425:   }  //irpMoveFromCCR
  7426: 
  7427:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7428:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  7429:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  7430:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7431:   //NEG.B <ea>                                      |-|012346|-|UUUUU|*****|D M+-WXZ  |0100_010_000_mmm_rrr
  7432:   public static void irpNegByte () throws M68kException {
  7433:     int ea = XEiJ.regOC & 63;
  7434:     int y;
  7435:     int z;
  7436:     if (ea < XEiJ.EA_AR) {  //NEG.B Dr
  7437:       XEiJ.mpuCycleCount++;
  7438:       z = (byte) (XEiJ.regRn[ea] = ~0xff & (y = XEiJ.regRn[ea]) | 0xff & -(y = (byte) y));
  7439:     } else {  //NEG.B <mem>
  7440:       XEiJ.mpuCycleCount++;
  7441:       int a = efaMltByte (ea);
  7442:       mmuWriteByteData (a, z = (byte) -(y = mmuModifyByteSignData (a, XEiJ.regSRS)), XEiJ.regSRS);
  7443:     }
  7444:     XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) |
  7445:            (y & z) >>> 31 << 1 |
  7446:            (y | z) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C));  //ccr_neg
  7447:   }  //irpNegByte
  7448: 
  7449:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7450:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  7451:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  7452:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7453:   //NEG.W <ea>                                      |-|012346|-|UUUUU|*****|D M+-WXZ  |0100_010_001_mmm_rrr
  7454:   public static void irpNegWord () throws M68kException {
  7455:     int ea = XEiJ.regOC & 63;
  7456:     int y;
  7457:     int z;
  7458:     if (ea < XEiJ.EA_AR) {  //NEG.W Dr
  7459:       XEiJ.mpuCycleCount++;
  7460:       z = (short) (XEiJ.regRn[ea] = ~0xffff & (y = XEiJ.regRn[ea]) | (char) -(y = (short) y));
  7461:     } else {  //NEG.W <mem>
  7462:       XEiJ.mpuCycleCount++;
  7463:       int a = efaMltWord (ea);
  7464:       mmuWriteWordData (a, z = (short) -(y = mmuModifyWordSignData (a, XEiJ.regSRS)), XEiJ.regSRS);
  7465:     }
  7466:     XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) |
  7467:            (y & z) >>> 31 << 1 |
  7468:            (y | z) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C));  //ccr_neg
  7469:   }  //irpNegWord
  7470: 
  7471:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7472:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  7473:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  7474:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7475:   //NEG.L <ea>                                      |-|012346|-|UUUUU|*****|D M+-WXZ  |0100_010_010_mmm_rrr
  7476:   public static void irpNegLong () throws M68kException {
  7477:     int ea = XEiJ.regOC & 63;
  7478:     int y;
  7479:     int z;
  7480:     if (ea < XEiJ.EA_AR) {  //NEG.L Dr
  7481:       XEiJ.mpuCycleCount++;
  7482:       XEiJ.regRn[ea] = z = -(y = XEiJ.regRn[ea]);
  7483:     } else {  //NEG.L <mem>
  7484:       XEiJ.mpuCycleCount++;
  7485:       int a = efaMltLong (ea);
  7486:       mmuWriteLongData (a, z = -(y = mmuModifyLongData (a, XEiJ.regSRS)), XEiJ.regSRS);
  7487:     }
  7488:     XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) |
  7489:            (y & z) >>> 31 << 1 |
  7490:            (y | z) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C));  //ccr_neg
  7491:   }  //irpNegLong
  7492: 
  7493:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7494:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  7495:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  7496:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7497:   //MOVE.W <ea>,CCR                                 |-|012346|-|UUUUU|*****|D M+-WXZPI|0100_010_011_mmm_rrr
  7498:   public static void irpMoveToCCR () throws M68kException {
  7499:     XEiJ.mpuCycleCount++;
  7500:     int ea = XEiJ.regOC & 63;
  7501:     XEiJ.regCCR = XEiJ.REG_CCR_MASK & (ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) : mmuReadWordSignData (efaAnyWord (ea), XEiJ.regSRS));  //pcws。イミディエイトを分離
  7502:   }  //irpMoveToCCR
  7503: 
  7504:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7505:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  7506:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  7507:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7508:   //NOT.B <ea>                                      |-|012346|-|-UUUU|-**00|D M+-WXZ  |0100_011_000_mmm_rrr
  7509:   public static void irpNotByte () throws M68kException {
  7510:     int ea = XEiJ.regOC & 63;
  7511:     int z;
  7512:     if (ea < XEiJ.EA_AR) {  //NOT.B Dr
  7513:       XEiJ.mpuCycleCount++;
  7514:       z = XEiJ.regRn[ea] ^= 255;  //0拡張してからEOR
  7515:     } else {  //NOT.B <mem>
  7516:       XEiJ.mpuCycleCount++;
  7517:       int a = efaMltByte (ea);
  7518:       mmuWriteByteData (a, z = ~mmuModifyByteSignData (a, XEiJ.regSRS), XEiJ.regSRS);
  7519:     }
  7520:     XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & z];  //ccr_tst_byte
  7521:   }  //irpNotByte
  7522: 
  7523:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7524:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  7525:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  7526:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7527:   //NOT.W <ea>                                      |-|012346|-|-UUUU|-**00|D M+-WXZ  |0100_011_001_mmm_rrr
  7528:   public static void irpNotWord () throws M68kException {
  7529:     int ea = XEiJ.regOC & 63;
  7530:     int z;
  7531:     if (ea < XEiJ.EA_AR) {  //NOT.W Dr
  7532:       XEiJ.mpuCycleCount++;
  7533:       z = XEiJ.regRn[ea] ^= 65535;  //0拡張してからEOR
  7534:     } else {  //NOT.W <mem>
  7535:       XEiJ.mpuCycleCount++;
  7536:       int a = efaMltWord (ea);
  7537:       mmuWriteWordData (a, z = ~mmuModifyWordSignData (a, XEiJ.regSRS), XEiJ.regSRS);
  7538:     }
  7539:     XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (char) z - 1 >> 31 & XEiJ.REG_CCR_Z | ((short) z < 0 ? XEiJ.REG_CCR_N : 0);  //ccr_tst_word
  7540:   }  //irpNotWord
  7541: 
  7542:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7543:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  7544:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  7545:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7546:   //NOT.L <ea>                                      |-|012346|-|-UUUU|-**00|D M+-WXZ  |0100_011_010_mmm_rrr
  7547:   public static void irpNotLong () throws M68kException {
  7548:     int ea = XEiJ.regOC & 63;
  7549:     int z;
  7550:     if (ea < XEiJ.EA_AR) {  //NOT.L Dr
  7551:       XEiJ.mpuCycleCount++;
  7552:       z = XEiJ.regRn[ea] ^= 0xffffffff;
  7553:     } else {  //NOT.L <mem>
  7554:       XEiJ.mpuCycleCount++;
  7555:       int a = efaMltLong (ea);
  7556:       mmuWriteLongData (a, z = ~mmuModifyLongData (a, XEiJ.regSRS), XEiJ.regSRS);
  7557:     }
  7558:     XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X);  //ccr_tst
  7559:   }  //irpNotLong
  7560: 
  7561:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7562:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  7563:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  7564:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7565:   //MOVE.W <ea>,SR                                  |-|012346|P|UUUUU|*****|D M+-WXZPI|0100_011_011_mmm_rrr
  7566:   public static void irpMoveToSR () throws M68kException {
  7567:     if (XEiJ.regSRS == 0) {  //ユーザモードのとき
  7568:       M68kException.m6eNumber = M68kException.M6E_PRIVILEGE_VIOLATION;
  7569:       throw M68kException.m6eSignal;
  7570:     }
  7571:     //以下はスーパーバイザモード
  7572:     XEiJ.mpuCycleCount += 12;
  7573:     int ea = XEiJ.regOC & 63;
  7574:     irpSetSR (ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, 1) : mmuReadWordZeroData (efaAnyWord (ea), 1));  //特権違反チェックが先。pcwz。イミディエイトを分離
  7575:   }  //irpMoveToSR
  7576: 
  7577:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7578:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  7579:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  7580:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7581:   //NBCD.B <ea>                                     |-|012346|-|UUUUU|*U*U*|D M+-WXZ  |0100_100_000_mmm_rrr
  7582:   //LINK.L Ar,#<data>                               |-|--2346|-|-----|-----|          |0100_100_000_001_rrr-{data}
  7583:   //
  7584:   //LINK.L Ar,#<data>
  7585:   //  PEA.L (Ar);MOVEA.L A7,Ar;ADDA.L #<data>,A7と同じ
  7586:   //  LINK.L A7,#<data>はA7をデクリメントする前の値がプッシュされ、A7に#<data>が加算される
  7587:   public static void irpNbcd () throws M68kException {
  7588:     int ea = XEiJ.regOC & 63;
  7589:     if (ea < XEiJ.EA_AR) {  //NBCD.B Dr
  7590:       XEiJ.mpuCycleCount++;
  7591:       XEiJ.regRn[ea] = ~0xff & XEiJ.regRn[ea] | irpSbcd (0, XEiJ.regRn[ea]);
  7592:     } else if (ea < XEiJ.EA_MM) {  //LINK.L Ar,#<data>
  7593:       XEiJ.mpuCycleCount += 2;
  7594:       int o = mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS);  //pcls
  7595:       int arr = XEiJ.regOC - (0b0100_100_000_001_000 - 8);
  7596:       //評価順序に注意。LINK.L A7,#<data>のときプッシュするのはA7をデクリメントする前の値。wl(r[15]-=4,r[8+rrr])は不可
  7597:       int a = XEiJ.regRn[arr];
  7598:       M68kException.m6eIncremented -= 4L << (7 << 3);
  7599:       int sp = XEiJ.regRn[15] -= 4;
  7600:       mmuWriteLongData (sp, a, XEiJ.regSRS);  //pushl
  7601:       XEiJ.regRn[arr] = sp;
  7602:       XEiJ.regRn[15] = sp + o;
  7603:     } else {  //NBCD.B <mem>
  7604:       XEiJ.mpuCycleCount++;
  7605:       int a = efaMltByte (ea);
  7606:       mmuWriteByteData (a, irpSbcd (0, mmuModifyByteSignData (a, XEiJ.regSRS)), XEiJ.regSRS);
  7607:     }
  7608:   }  //irpNbcd
  7609: 
  7610:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7611:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  7612:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  7613:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7614:   //SWAP.W Dr                                       |-|012346|-|-UUUU|-**00|D         |0100_100_001_000_rrr
  7615:   //BKPT #<data>                                    |-|-12346|-|-----|-----|          |0100_100_001_001_ddd
  7616:   //PEA.L <ea>                                      |-|012346|-|-----|-----|  M  WXZP |0100_100_001_mmm_rrr
  7617:   public static void irpPea () throws M68kException {
  7618:     int ea = XEiJ.regOC & 63;
  7619:     if (ea < XEiJ.EA_AR) {  //SWAP.W Dr
  7620:       XEiJ.mpuCycleCount++;
  7621:       int x;
  7622:       int z;
  7623:       XEiJ.regRn[ea] = z = (x = XEiJ.regRn[ea]) << 16 | x >>> 16;
  7624:       //上位ワードと下位ワードを入れ替えた後のDrをロングでテストする
  7625:       XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X);  //ccr_tst
  7626:     } else {  //PEA.L <ea>
  7627:       XEiJ.mpuCycleCount++;
  7628:       //評価順序に注意。実効アドレスを求めてからspをデクリメントすること
  7629:       int a = efaLeaPea (ea);  //BKPT #<data>はここでillegal instructionになる
  7630:       M68kException.m6eIncremented -= 4L << (7 << 3);
  7631:       mmuWriteLongData (XEiJ.regRn[15] -= 4, a, XEiJ.regSRS);
  7632:     }
  7633:   }  //irpPea
  7634: 
  7635:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7636:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  7637:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  7638:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7639:   //EXT.W Dr                                        |-|012346|-|-UUUU|-**00|D         |0100_100_010_000_rrr
  7640:   //MOVEM.W <list>,<ea>                             |-|012346|-|-----|-----|  M -WXZ  |0100_100_010_mmm_rrr-llllllllllllllll
  7641:   public static void irpMovemToMemWord () throws M68kException {
  7642:     int ea = XEiJ.regOC & 63;
  7643:     if (ea < XEiJ.EA_AR) {  //EXT.W Dr
  7644:       XEiJ.mpuCycleCount++;
  7645:       int z;
  7646:       XEiJ.regRn[ea] = ~0xffff & (z = XEiJ.regRn[ea]) | (char) (z = (byte) z);
  7647:       XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X);  //ccr_tst
  7648:     } else {  //MOVEM.W <list>,<ea>
  7649:       int l = mmuReadWordZeroExword (XEiJ.regPC, XEiJ.regSRS);  //pcwze。レジスタリスト。ゼロ拡張
  7650:       XEiJ.regPC += 2;
  7651:       if (ea >> 3 == XEiJ.MMM_MN) {  //-(Ar)
  7652:         //MOVEM.wl <list>,-(Ar)で<list>にArが含まれているとき、000/010は命令開始時のArを、020/030/040/060は命令開始時のAr-オペレーションサイズをメモリに書き込む
  7653:         //転送するレジスタが0個のときArは変化しない
  7654:         int arr = ea - (XEiJ.EA_MN - 8);
  7655:         M68kException.m6eIncremented -= 2L << (arr << 3);  //longのシフトカウントは6bitでマスクされる
  7656:         int a = XEiJ.regRn[arr];
  7657:         XEiJ.regRn[arr] = a - 2;
  7658:         int t = a;
  7659:         if (XEiJ.IRP_MOVEM_EXPAND) {  //16回展開する
  7660:           if ((l & 0x0001) != 0) {
  7661:             mmuWriteWordData (a -= 2, XEiJ.regRn[15], XEiJ.regSRS);
  7662:           }
  7663:           if ((l & 0x0002) != 0) {
  7664:             mmuWriteWordData (a -= 2, XEiJ.regRn[14], XEiJ.regSRS);
  7665:           }
  7666:           if ((l & 0x0004) != 0) {
  7667:             mmuWriteWordData (a -= 2, XEiJ.regRn[13], XEiJ.regSRS);
  7668:           }
  7669:           if ((l & 0x0008) != 0) {
  7670:             mmuWriteWordData (a -= 2, XEiJ.regRn[12], XEiJ.regSRS);
  7671:           }
  7672:           if ((l & 0x0010) != 0) {
  7673:             mmuWriteWordData (a -= 2, XEiJ.regRn[11], XEiJ.regSRS);
  7674:           }
  7675:           if ((l & 0x0020) != 0) {
  7676:             mmuWriteWordData (a -= 2, XEiJ.regRn[10], XEiJ.regSRS);
  7677:           }
  7678:           if ((l & 0x0040) != 0) {
  7679:             mmuWriteWordData (a -= 2, XEiJ.regRn[ 9], XEiJ.regSRS);
  7680:           }
  7681:           if ((byte) l < 0) {  //(l & 0x0080) != 0
  7682:             mmuWriteWordData (a -= 2, XEiJ.regRn[ 8], XEiJ.regSRS);
  7683:           }
  7684:           if ((l & 0x0100) != 0) {
  7685:             mmuWriteWordData (a -= 2, XEiJ.regRn[ 7], XEiJ.regSRS);
  7686:           }
  7687:           if ((l & 0x0200) != 0) {
  7688:             mmuWriteWordData (a -= 2, XEiJ.regRn[ 6], XEiJ.regSRS);
  7689:           }
  7690:           if ((l & 0x0400) != 0) {
  7691:             mmuWriteWordData (a -= 2, XEiJ.regRn[ 5], XEiJ.regSRS);
  7692:           }
  7693:           if ((l & 0x0800) != 0) {
  7694:             mmuWriteWordData (a -= 2, XEiJ.regRn[ 4], XEiJ.regSRS);
  7695:           }
  7696:           if ((l & 0x1000) != 0) {
  7697:             mmuWriteWordData (a -= 2, XEiJ.regRn[ 3], XEiJ.regSRS);
  7698:           }
  7699:           if ((l & 0x2000) != 0) {
  7700:             mmuWriteWordData (a -= 2, XEiJ.regRn[ 2], XEiJ.regSRS);
  7701:           }
  7702:           if ((l & 0x4000) != 0) {
  7703:             mmuWriteWordData (a -= 2, XEiJ.regRn[ 1], XEiJ.regSRS);
  7704:           }
  7705:           if ((short) l < 0) {  //(l & 0x8000) != 0
  7706:             mmuWriteWordData (a -= 2, XEiJ.regRn[ 0], XEiJ.regSRS);
  7707:           }
  7708:         } else if (XEiJ.IRP_MOVEM_LOOP) {  //16回ループする。コンパイラが展開する
  7709:           for (int i = 15; i >= 0; i--) {
  7710:             if ((l & 0x8000 >>> i) != 0) {
  7711:               mmuWriteWordData (a -= 2, XEiJ.regRn[i], XEiJ.regSRS);
  7712:             }
  7713:           }
  7714:         } else if (XEiJ.IRP_MOVEM_SHIFT_LEFT) {  //0になるまで左にシフトする
  7715:           l = XEiJ.MPU_BITREV_TABLE_0[l & 2047] | XEiJ.MPU_BITREV_TABLE_1[l << 10 >>> 21];  //Integer.reverse(l)
  7716:           for (int i = 15; l != 0; i--, l <<= 1) {
  7717:             if (l < 0) {
  7718:               mmuWriteWordData (a -= 2, XEiJ.regRn[i], XEiJ.regSRS);
  7719:             }
  7720:           }
  7721:         } else if (XEiJ.IRP_MOVEM_SHIFT_RIGHT) {  //0になるまで右にシフトする
  7722:           for (int i = 15; l != 0; i--, l >>>= 1) {
  7723:             if ((l & 1) != 0) {
  7724:               mmuWriteWordData (a -= 2, XEiJ.regRn[i], XEiJ.regSRS);
  7725:             }
  7726:           }
  7727:         } else if (XEiJ.IRP_MOVEM_ZEROS) {  //Integer.numberOfTrailingZerosを使う
  7728:           for (int i = 15; l != 0; ) {
  7729:             int k = Integer.numberOfTrailingZeros (l);
  7730:             mmuWriteWordData (a -= 2, XEiJ.regRn[i -= k], XEiJ.regSRS);
  7731:             l = l >>> k & ~1;
  7732:           }
  7733:         }
  7734:         M68kException.m6eIncremented += 2L << (arr << 3);  //元に戻しておく。longのシフトカウントは6bitでマスクされる
  7735:         XEiJ.regRn[arr] = a;
  7736:         XEiJ.mpuCycleCount += t - a >> 1;  //2バイト/個→1サイクル/個
  7737:       } else {  //-(Ar)以外
  7738:         int a = efaCltWord (ea);
  7739:         int t = a;
  7740:         if (XEiJ.IRP_MOVEM_EXPAND) {  //16回展開する
  7741:           if ((l & 0x0001) != 0) {
  7742:             mmuWriteWordData (a, XEiJ.regRn[ 0], XEiJ.regSRS);
  7743:             a += 2;
  7744:           }
  7745:           if ((l & 0x0002) != 0) {
  7746:             mmuWriteWordData (a, XEiJ.regRn[ 1], XEiJ.regSRS);
  7747:             a += 2;
  7748:           }
  7749:           if ((l & 0x0004) != 0) {
  7750:             mmuWriteWordData (a, XEiJ.regRn[ 2], XEiJ.regSRS);
  7751:             a += 2;
  7752:           }
  7753:           if ((l & 0x0008) != 0) {
  7754:             mmuWriteWordData (a, XEiJ.regRn[ 3], XEiJ.regSRS);
  7755:             a += 2;
  7756:           }
  7757:           if ((l & 0x0010) != 0) {
  7758:             mmuWriteWordData (a, XEiJ.regRn[ 4], XEiJ.regSRS);
  7759:             a += 2;
  7760:           }
  7761:           if ((l & 0x0020) != 0) {
  7762:             mmuWriteWordData (a, XEiJ.regRn[ 5], XEiJ.regSRS);
  7763:             a += 2;
  7764:           }
  7765:           if ((l & 0x0040) != 0) {
  7766:             mmuWriteWordData (a, XEiJ.regRn[ 6], XEiJ.regSRS);
  7767:             a += 2;
  7768:           }
  7769:           if ((byte) l < 0) {  //(l & 0x0080) != 0
  7770:             mmuWriteWordData (a, XEiJ.regRn[ 7], XEiJ.regSRS);
  7771:             a += 2;
  7772:           }
  7773:           if ((l & 0x0100) != 0) {
  7774:             mmuWriteWordData (a, XEiJ.regRn[ 8], XEiJ.regSRS);
  7775:             a += 2;
  7776:           }
  7777:           if ((l & 0x0200) != 0) {
  7778:             mmuWriteWordData (a, XEiJ.regRn[ 9], XEiJ.regSRS);
  7779:             a += 2;
  7780:           }
  7781:           if ((l & 0x0400) != 0) {
  7782:             mmuWriteWordData (a, XEiJ.regRn[10], XEiJ.regSRS);
  7783:             a += 2;
  7784:           }
  7785:           if ((l & 0x0800) != 0) {
  7786:             mmuWriteWordData (a, XEiJ.regRn[11], XEiJ.regSRS);
  7787:             a += 2;
  7788:           }
  7789:           if ((l & 0x1000) != 0) {
  7790:             mmuWriteWordData (a, XEiJ.regRn[12], XEiJ.regSRS);
  7791:             a += 2;
  7792:           }
  7793:           if ((l & 0x2000) != 0) {
  7794:             mmuWriteWordData (a, XEiJ.regRn[13], XEiJ.regSRS);
  7795:             a += 2;
  7796:           }
  7797:           if ((l & 0x4000) != 0) {
  7798:             mmuWriteWordData (a, XEiJ.regRn[14], XEiJ.regSRS);
  7799:             a += 2;
  7800:           }
  7801:           if ((short) l < 0) {  //(l & 0x8000) != 0
  7802:             mmuWriteWordData (a, XEiJ.regRn[15], XEiJ.regSRS);
  7803:             a += 2;
  7804:           }
  7805:         } else if (XEiJ.IRP_MOVEM_LOOP) {  //16回ループする。コンパイラが展開する
  7806:           for (int i = 0; i <= 15; i++) {
  7807:             if ((l & 0x0001 << i) != 0) {
  7808:               mmuWriteWordData (a, XEiJ.regRn[i], XEiJ.regSRS);
  7809:               a += 2;
  7810:             }
  7811:           }
  7812:         } else if (XEiJ.IRP_MOVEM_SHIFT_LEFT) {  //0になるまで左にシフトする
  7813:           l = XEiJ.MPU_BITREV_TABLE_0[l & 2047] | XEiJ.MPU_BITREV_TABLE_1[l << 10 >>> 21];  //Integer.reverse(l)
  7814:           for (int i = 0; l != 0; i++, l <<= 1) {
  7815:             if (l < 0) {
  7816:               mmuWriteWordData (a, XEiJ.regRn[i], XEiJ.regSRS);
  7817:               a += 2;
  7818:             }
  7819:           }
  7820:         } else if (XEiJ.IRP_MOVEM_SHIFT_RIGHT) {  //0になるまで右にシフトする
  7821:           for (int i = 0; l != 0; i++, l >>>= 1) {
  7822:             if ((l & 1) != 0) {
  7823:               mmuWriteWordData (a, XEiJ.regRn[i], XEiJ.regSRS);
  7824:               a += 2;
  7825:             }
  7826:           }
  7827:         } else if (XEiJ.IRP_MOVEM_ZEROS) {  //Integer.numberOfTrailingZerosを使う
  7828:           for (int i = 0; l != 0; ) {
  7829:             int k = Integer.numberOfTrailingZeros (l);
  7830:             mmuWriteWordData (a, XEiJ.regRn[i += k], XEiJ.regSRS);
  7831:             a += 2;
  7832:             l = l >>> k & ~1;
  7833:           }
  7834:         }
  7835:         XEiJ.mpuCycleCount += a - t >> 1;  //2バイト/個→1サイクル/個
  7836:       }
  7837:     }
  7838:   }  //irpMovemToMemWord
  7839: 
  7840:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7841:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  7842:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  7843:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7844:   //EXT.L Dr                                        |-|012346|-|-UUUU|-**00|D         |0100_100_011_000_rrr
  7845:   //MOVEM.L <list>,<ea>                             |-|012346|-|-----|-----|  M -WXZ  |0100_100_011_mmm_rrr-llllllllllllllll
  7846:   public static void irpMovemToMemLong () throws M68kException {
  7847:     int ea = XEiJ.regOC & 63;
  7848:     if (ea < XEiJ.EA_AR) {  //EXT.L Dr
  7849:       XEiJ.mpuCycleCount++;
  7850:       int z;
  7851:       XEiJ.regRn[ea] = z = (short) XEiJ.regRn[ea];
  7852:       XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X);  //ccr_tst
  7853:     } else {  //MOVEM.L <list>,<ea>
  7854:       int l = mmuReadWordZeroExword (XEiJ.regPC, XEiJ.regSRS);  //pcwze。レジスタリスト。ゼロ拡張
  7855:       XEiJ.regPC += 2;
  7856:       if (ea >> 3 == XEiJ.MMM_MN) {  //-(Ar)
  7857:         //MOVEM.wl <list>,-(Ar)で<list>にArが含まれているとき、000/010は命令開始時のArを、020/030/040/060は命令開始時のAr-オペレーションサイズをメモリに書き込む
  7858:         //転送するレジスタが0個のときArは変化しない
  7859:         int arr = ea - (XEiJ.EA_MN - 8);
  7860:         M68kException.m6eIncremented -= 4L << (arr << 3);  //longのシフトカウントは6bitでマスクされる
  7861:         int a = XEiJ.regRn[arr];
  7862:         XEiJ.regRn[arr] = a - 4;
  7863:         int t = a;
  7864:         if (XEiJ.IRP_MOVEM_EXPAND) {  //16回展開する
  7865:           if ((l & 0x0001) != 0) {
  7866:             mmuWriteLongData (a -= 4, XEiJ.regRn[15], XEiJ.regSRS);
  7867:           }
  7868:           if ((l & 0x0002) != 0) {
  7869:             mmuWriteLongData (a -= 4, XEiJ.regRn[14], XEiJ.regSRS);
  7870:           }
  7871:           if ((l & 0x0004) != 0) {
  7872:             mmuWriteLongData (a -= 4, XEiJ.regRn[13], XEiJ.regSRS);
  7873:           }
  7874:           if ((l & 0x0008) != 0) {
  7875:             mmuWriteLongData (a -= 4, XEiJ.regRn[12], XEiJ.regSRS);
  7876:           }
  7877:           if ((l & 0x0010) != 0) {
  7878:             mmuWriteLongData (a -= 4, XEiJ.regRn[11], XEiJ.regSRS);
  7879:           }
  7880:           if ((l & 0x0020) != 0) {
  7881:             mmuWriteLongData (a -= 4, XEiJ.regRn[10], XEiJ.regSRS);
  7882:           }
  7883:           if ((l & 0x0040) != 0) {
  7884:             mmuWriteLongData (a -= 4, XEiJ.regRn[ 9], XEiJ.regSRS);
  7885:           }
  7886:           if ((byte) l < 0) {  //(l & 0x0080) != 0
  7887:             mmuWriteLongData (a -= 4, XEiJ.regRn[ 8], XEiJ.regSRS);
  7888:           }
  7889:           if ((l & 0x0100) != 0) {
  7890:             mmuWriteLongData (a -= 4, XEiJ.regRn[ 7], XEiJ.regSRS);
  7891:           }
  7892:           if ((l & 0x0200) != 0) {
  7893:             mmuWriteLongData (a -= 4, XEiJ.regRn[ 6], XEiJ.regSRS);
  7894:           }
  7895:           if ((l & 0x0400) != 0) {
  7896:             mmuWriteLongData (a -= 4, XEiJ.regRn[ 5], XEiJ.regSRS);
  7897:           }
  7898:           if ((l & 0x0800) != 0) {
  7899:             mmuWriteLongData (a -= 4, XEiJ.regRn[ 4], XEiJ.regSRS);
  7900:           }
  7901:           if ((l & 0x1000) != 0) {
  7902:             mmuWriteLongData (a -= 4, XEiJ.regRn[ 3], XEiJ.regSRS);
  7903:           }
  7904:           if ((l & 0x2000) != 0) {
  7905:             mmuWriteLongData (a -= 4, XEiJ.regRn[ 2], XEiJ.regSRS);
  7906:           }
  7907:           if ((l & 0x4000) != 0) {
  7908:             mmuWriteLongData (a -= 4, XEiJ.regRn[ 1], XEiJ.regSRS);
  7909:           }
  7910:           if ((short) l < 0) {  //(l & 0x8000) != 0
  7911:             mmuWriteLongData (a -= 4, XEiJ.regRn[ 0], XEiJ.regSRS);
  7912:           }
  7913:         } else if (XEiJ.IRP_MOVEM_LOOP) {  //16回ループする。コンパイラが展開する
  7914:           for (int i = 15; i >= 0; i--) {
  7915:             if ((l & 0x8000 >>> i) != 0) {
  7916:               mmuWriteLongData (a -= 4, XEiJ.regRn[i], XEiJ.regSRS);
  7917:             }
  7918:           }
  7919:         } else if (XEiJ.IRP_MOVEM_SHIFT_LEFT) {  //0になるまで左にシフトする
  7920:           l = XEiJ.MPU_BITREV_TABLE_0[l & 2047] | XEiJ.MPU_BITREV_TABLE_1[l << 10 >>> 21];  //Integer.reverse(l)
  7921:           for (int i = 15; l != 0; i--, l <<= 1) {
  7922:             if (l < 0) {
  7923:               mmuWriteLongData (a -= 4, XEiJ.regRn[i], XEiJ.regSRS);
  7924:             }
  7925:           }
  7926:         } else if (XEiJ.IRP_MOVEM_SHIFT_RIGHT) {  //0になるまで右にシフトする
  7927:           for (int i = 15; l != 0; i--, l >>>= 1) {
  7928:             if ((l & 1) != 0) {
  7929:               mmuWriteLongData (a -= 4, XEiJ.regRn[i], XEiJ.regSRS);
  7930:             }
  7931:           }
  7932:         } else if (XEiJ.IRP_MOVEM_ZEROS) {  //Integer.numberOfTrailingZerosを使う
  7933:           for (int i = 15; l != 0; ) {
  7934:             int k = Integer.numberOfTrailingZeros (l);
  7935:             mmuWriteLongData (a -= 4, XEiJ.regRn[i -= k], XEiJ.regSRS);
  7936:             l = l >>> k & ~1;
  7937:           }
  7938:         }
  7939:         M68kException.m6eIncremented += 4L << (arr << 3);  //元に戻しておく。longのシフトカウントは6bitでマスクされる
  7940:         XEiJ.regRn[arr] = a;
  7941:         XEiJ.mpuCycleCount += t - a >> 2;  //4バイト/個→1サイクル/個
  7942:       } else {  //-(Ar)以外
  7943:         int a = efaCltLong (ea);
  7944:         int t = a;
  7945:         if (XEiJ.IRP_MOVEM_EXPAND) {  //16回展開する
  7946:           if ((l & 0x0001) != 0) {
  7947:             mmuWriteLongData (a, XEiJ.regRn[ 0], XEiJ.regSRS);
  7948:             a += 4;
  7949:           }
  7950:           if ((l & 0x0002) != 0) {
  7951:             mmuWriteLongData (a, XEiJ.regRn[ 1], XEiJ.regSRS);
  7952:             a += 4;
  7953:           }
  7954:           if ((l & 0x0004) != 0) {
  7955:             mmuWriteLongData (a, XEiJ.regRn[ 2], XEiJ.regSRS);
  7956:             a += 4;
  7957:           }
  7958:           if ((l & 0x0008) != 0) {
  7959:             mmuWriteLongData (a, XEiJ.regRn[ 3], XEiJ.regSRS);
  7960:             a += 4;
  7961:           }
  7962:           if ((l & 0x0010) != 0) {
  7963:             mmuWriteLongData (a, XEiJ.regRn[ 4], XEiJ.regSRS);
  7964:             a += 4;
  7965:           }
  7966:           if ((l & 0x0020) != 0) {
  7967:             mmuWriteLongData (a, XEiJ.regRn[ 5], XEiJ.regSRS);
  7968:             a += 4;
  7969:           }
  7970:           if ((l & 0x0040) != 0) {
  7971:             mmuWriteLongData (a, XEiJ.regRn[ 6], XEiJ.regSRS);
  7972:             a += 4;
  7973:           }
  7974:           if ((byte) l < 0) {  //(l & 0x0080) != 0
  7975:             mmuWriteLongData (a, XEiJ.regRn[ 7], XEiJ.regSRS);
  7976:             a += 4;
  7977:           }
  7978:           if ((l & 0x0100) != 0) {
  7979:             mmuWriteLongData (a, XEiJ.regRn[ 8], XEiJ.regSRS);
  7980:             a += 4;
  7981:           }
  7982:           if ((l & 0x0200) != 0) {
  7983:             mmuWriteLongData (a, XEiJ.regRn[ 9], XEiJ.regSRS);
  7984:             a += 4;
  7985:           }
  7986:           if ((l & 0x0400) != 0) {
  7987:             mmuWriteLongData (a, XEiJ.regRn[10], XEiJ.regSRS);
  7988:             a += 4;
  7989:           }
  7990:           if ((l & 0x0800) != 0) {
  7991:             mmuWriteLongData (a, XEiJ.regRn[11], XEiJ.regSRS);
  7992:             a += 4;
  7993:           }
  7994:           if ((l & 0x1000) != 0) {
  7995:             mmuWriteLongData (a, XEiJ.regRn[12], XEiJ.regSRS);
  7996:             a += 4;
  7997:           }
  7998:           if ((l & 0x2000) != 0) {
  7999:             mmuWriteLongData (a, XEiJ.regRn[13], XEiJ.regSRS);
  8000:             a += 4;
  8001:           }
  8002:           if ((l & 0x4000) != 0) {
  8003:             mmuWriteLongData (a, XEiJ.regRn[14], XEiJ.regSRS);
  8004:             a += 4;
  8005:           }
  8006:           if ((short) l < 0) {  //(l & 0x8000) != 0
  8007:             mmuWriteLongData (a, XEiJ.regRn[15], XEiJ.regSRS);
  8008:             a += 4;
  8009:           }
  8010:         } else if (XEiJ.IRP_MOVEM_LOOP) {  //16回ループする。コンパイラが展開する
  8011:           for (int i = 0; i <= 15; i++) {
  8012:             if ((l & 0x0001 << i) != 0) {
  8013:               mmuWriteLongData (a, XEiJ.regRn[i], XEiJ.regSRS);
  8014:               a += 4;
  8015:             }
  8016:           }
  8017:         } else if (XEiJ.IRP_MOVEM_SHIFT_LEFT) {  //0になるまで左にシフトする
  8018:           l = XEiJ.MPU_BITREV_TABLE_0[l & 2047] | XEiJ.MPU_BITREV_TABLE_1[l << 10 >>> 21];  //Integer.reverse(l)
  8019:           for (int i = 0; l != 0; i++, l <<= 1) {
  8020:             if (l < 0) {
  8021:               mmuWriteLongData (a, XEiJ.regRn[i], XEiJ.regSRS);
  8022:               a += 4;
  8023:             }
  8024:           }
  8025:         } else if (XEiJ.IRP_MOVEM_SHIFT_RIGHT) {  //0になるまで右にシフトする
  8026:           for (int i = 0; l != 0; i++, l >>>= 1) {
  8027:             if ((l & 1) != 0) {
  8028:               mmuWriteLongData (a, XEiJ.regRn[i], XEiJ.regSRS);
  8029:               a += 4;
  8030:             }
  8031:           }
  8032:         } else if (XEiJ.IRP_MOVEM_ZEROS) {  //Integer.numberOfTrailingZerosを使う
  8033:           for (int i = 0; l != 0; ) {
  8034:             int k = Integer.numberOfTrailingZeros (l);
  8035:             mmuWriteLongData (a, XEiJ.regRn[i += k], XEiJ.regSRS);
  8036:             a += 4;
  8037:             l = l >>> k & ~1;
  8038:           }
  8039:         }
  8040:         XEiJ.mpuCycleCount += a - t >> 2;  //4バイト/個→1サイクル/個
  8041:       }
  8042:     }
  8043:   }  //irpMovemToMemLong
  8044: 
  8045:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  8046:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  8047:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  8048:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  8049:   //TST.B <ea>                                      |-|012346|-|-UUUU|-**00|D M+-WXZ  |0100_101_000_mmm_rrr
  8050:   //TST.B <ea>                                      |-|--2346|-|-UUUU|-**00|        PI|0100_101_000_mmm_rrr
  8051:   public static void irpTstByte () throws M68kException {
  8052:     XEiJ.mpuCycleCount++;
  8053:     int ea = XEiJ.regOC & 63;
  8054:     XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & (ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadByteSignExword ((XEiJ.regPC += 2) - 1, XEiJ.regSRS) : mmuReadByteSignData (efaAnyByte (ea), XEiJ.regSRS))];  //ccr_tst_byte。pcbs。イミディエイトを分離。アドレッシングモードに注意
  8055:   }  //irpTstByte
  8056: 
  8057:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  8058:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  8059:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  8060:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  8061:   //TST.W <ea>                                      |-|012346|-|-UUUU|-**00|D M+-WXZ  |0100_101_001_mmm_rrr
  8062:   //TST.W <ea>                                      |-|--2346|-|-UUUU|-**00| A      PI|0100_101_001_mmm_rrr
  8063:   public static void irpTstWord () throws M68kException {
  8064:     XEiJ.mpuCycleCount++;
  8065:     int ea = XEiJ.regOC & 63;
  8066:     int z = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) : mmuReadWordSignData (efaAnyWord (ea), XEiJ.regSRS);  //pcws。イミディエイトを分離。アドレッシングモードに注意。このr[ea]はデータレジスタまたはアドレスレジスタ
  8067:     XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (char) z - 1 >> 31 & XEiJ.REG_CCR_Z | ((short) z < 0 ? XEiJ.REG_CCR_N : 0);  //ccr_tst_word
  8068:   }  //irpTstWord
  8069: 
  8070:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  8071:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  8072:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  8073:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  8074:   //TST.L <ea>                                      |-|012346|-|-UUUU|-**00|D M+-WXZ  |0100_101_010_mmm_rrr
  8075:   //TST.L <ea>                                      |-|--2346|-|-UUUU|-**00| A      PI|0100_101_010_mmm_rrr
  8076:   public static void irpTstLong () throws M68kException {
  8077:     XEiJ.mpuCycleCount++;
  8078:     int ea = XEiJ.regOC & 63;
  8079:     int z = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS) : mmuReadLongData (efaAnyLong (ea), XEiJ.regSRS);  //pcls。イミディエイトを分離。アドレッシングモードに注意。このr[ea]はデータレジスタまたはアドレスレジスタ
  8080:     XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X);  //ccr_tst
  8081:   }  //irpTstLong
  8082: 
  8083:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  8084:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  8085:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  8086:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  8087:   //TAS.B <ea>                                      |-|012346|-|-UUUU|-**00|D M+-WXZ  |0100_101_011_mmm_rrr
  8088:   //ILLEGAL                                         |-|012346|-|-----|-----|          |0100_101_011_111_100
  8089:   public static void irpTas () throws M68kException {
  8090:     int ea = XEiJ.regOC & 63;
  8091:     int z;
  8092:     if (ea < XEiJ.EA_AR) {  //TAS.B Dr
  8093:       XEiJ.mpuCycleCount++;
  8094:       XEiJ.regRn[ea] = 0x80 | (z = XEiJ.regRn[ea]);
  8095:     } else {  //TAS.B <mem>
  8096:       XEiJ.mpuCycleCount += 17;
  8097:       int a = efaMltByte (ea);
  8098:       mmuWriteByteData (a, 0x80 | (z = mmuModifyByteSignData (a, XEiJ.regSRS)), XEiJ.regSRS);
  8099:     }
  8100:     XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & z];  //ccr_tst_byte
  8101:   }  //irpTas
  8102: 
  8103:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  8104:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  8105:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  8106:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  8107:   //MULU.L <ea>,Dl                                  |-|--2346|-|-UUUU|-***0|D M+-WXZPI|0100_110_000_mmm_rrr-0lll000000000hhh        (h is not used)
  8108:   //MULU.L <ea>,Dh:Dl                               |-|--234S|-|-UUUU|-***0|D M+-WXZPI|0100_110_000_mmm_rrr-0lll010000000hhh        (if h=l then result is not defined)
  8109:   //MULS.L <ea>,Dl                                  |-|--2346|-|-UUUU|-***0|D M+-WXZPI|0100_110_000_mmm_rrr-0lll100000000hhh        (h is not used)
  8110:   //MULS.L <ea>,Dh:Dl                               |-|--234S|-|-UUUU|-***0|D M+-WXZPI|0100_110_000_mmm_rrr-0lll110000000hhh        (if h=l then result is not defined)
  8111:   public static void irpMuluMulsLong () throws M68kException {
  8112:     int w = mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);  //pcwz。拡張ワード
  8113:     if ((w & ~0b0111_110_000_000_111) != 0) {
  8114:       M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION;
  8115:       throw M68kException.m6eSignal;
  8116:     }
  8117:     if ((w & 0b0000_010_000_000_000) != 0) {  //64bit積
  8118:       M68kException.m6eNumber = M68kException.M6E_UNIMPLEMENTED_INSTRUCTION;
  8119:       throw M68kException.m6eSignal;
  8120:     }
  8121:     //32bit積
  8122:     int s = w & 0b0000_100_000_000_000;  //0=MULU,1=MULS
  8123:     int l = w >> 12;  //被乗数,積
  8124:     XEiJ.mpuCycleCount += 2;
  8125:     int ea = XEiJ.regOC & 63;
  8126:     long yy = (long) (ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS) : mmuReadLongData (efaAnyLong (ea), XEiJ.regSRS));  //pcls。イミディエイトを分離
  8127:     long xx = (long) XEiJ.regRn[l];
  8128:     if (s == 0) {  //MULU
  8129:       long zz = (0xffffffffL & xx) * (0xffffffffL & yy);
  8130:       int z = XEiJ.regRn[l] = (int) zz;
  8131:       XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | (zz >>> 32 != 0L ? XEiJ.REG_CCR_V : 0);
  8132:     } else {  //MULS
  8133:       long zz = xx * yy;
  8134:       int z = XEiJ.regRn[l] = (int) zz;
  8135:       XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | (z != zz ? XEiJ.REG_CCR_V : 0);
  8136:     }
  8137:   }  //irpMuluMulsLong
  8138: 
  8139:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  8140:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  8141:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  8142:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  8143:   //DIVU.L <ea>,Dq                                  |-|--2346|-|-UUUU|-***0|D M+-WXZPI|0100_110_001_mmm_rrr-0qqq000000000qqq
  8144:   //DIVUL.L <ea>,Dr:Dq                              |-|--2346|-|-UUUU|-***0|D M+-WXZPI|0100_110_001_mmm_rrr-0qqq000000000rrr        (q is not equal to r)
  8145:   //DIVU.L <ea>,Dr:Dq                               |-|--234S|-|-UUUU|-***0|D M+-WXZPI|0100_110_001_mmm_rrr-0qqq010000000rrr        (q is not equal to r)
  8146:   //DIVS.L <ea>,Dq                                  |-|--2346|-|-UUUU|-***0|D M+-WXZPI|0100_110_001_mmm_rrr-0qqq100000000qqq
  8147:   //DIVSL.L <ea>,Dr:Dq                              |-|--2346|-|-UUUU|-***0|D M+-WXZPI|0100_110_001_mmm_rrr-0qqq100000000rrr        (q is not equal to r)
  8148:   //DIVS.L <ea>,Dr:Dq                               |-|--234S|-|-UUUU|-***0|D M+-WXZPI|0100_110_001_mmm_rrr-0qqq110000000rrr        (q is not equal to r)
  8149:   //
  8150:   //DIVS.L <ea>,Dq
  8151:   //  32bit被除数Dq/32bit除数<ea>→32bit商Dq
  8152:   //
  8153:   //DIVS.L <ea>,Dr:Dq
  8154:   //  64bit被除数Dr:Dq/32bit除数<ea>→32bit余りDr:32bit商Dq
  8155:   //  M68000PRMでDIVS.Lのアドレッシングモードがデータ可変と書かれているのはデータの間違い
  8156:   //
  8157:   //DIVSL.L <ea>,Dr:Dq
  8158:   //  32bit被除数Dq/32bit除数<ea>→32bit余りDr:32bit商Dq
  8159:   //
  8160:   //DIVU.L <ea>,Dq
  8161:   //  32bit被除数Dq/32bit除数<ea>→32bit商Dq
  8162:   //
  8163:   //DIVU.L <ea>,Dr:Dq
  8164:   //  64bit被除数Dr:Dq/32bit除数<ea>→32bit余りDr:32bit商Dq
  8165:   //
  8166:   //DIVUL.L <ea>,Dr:Dq
  8167:   //  32bit被除数Dq/32bit除数<ea>→32bit余りDr:32bit商Dq
  8168:   public static void irpDivuDivsLong () throws M68kException {
  8169:     int w = mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);  //pcwz。拡張ワード
  8170:     if ((w & ~0b0111_110_000_000_111) != 0) {
  8171:       M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION;
  8172:       throw M68kException.m6eSignal;
  8173:     }
  8174:     if ((w & 0b0000_010_000_000_000) != 0) {  //64bit被除数
  8175:       M68kException.m6eNumber = M68kException.M6E_UNIMPLEMENTED_INSTRUCTION;
  8176:       throw M68kException.m6eSignal;
  8177:     }
  8178:     //32bit被除数
  8179:     int s = w & 0b0000_100_000_000_000;  //0=DIVU,1=DIVS
  8180:     int h = w & 7;  //余り
  8181:     int l = w >> 12;  //被除数,商
  8182:     int ea = XEiJ.regOC & 63;
  8183:     int y = ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS) : mmuReadLongData (efaAnyLong (ea), XEiJ.regSRS);  //除数。pcls。イミディエイトを分離
  8184:     if (s == 0) {  //符号なし。DIVU.L <ea>,*
  8185:       XEiJ.mpuCycleCount += 38;  //最大
  8186:       long yy = (long) y & 0xffffffffL;  //除数
  8187:       if (y == 0) {  //ゼロ除算
  8188:         XEiJ.regCCR = (XEiJ.regCCR & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_N | XEiJ.REG_CCR_Z | XEiJ.REG_CCR_V)  //XとNとZとVは変化しない
  8189:                        );  //Cは常にクリア
  8190:         XEiJ.mpuCycleCount += 38 - 34;
  8191:         M68kException.m6eAddress = XEiJ.regPC0;  //アドレスは命令の先頭
  8192:         M68kException.m6eNumber = M68kException.M6E_DIVIDE_BY_ZERO;
  8193:         throw M68kException.m6eSignal;
  8194:       }  //if ゼロ除算
  8195:       long xx = (long) XEiJ.regRn[l] & 0xffffffffL;  //被除数
  8196:       long zz = (long) ((double) xx / (double) yy);  //double→intのキャストは飽和変換で0xffffffff/0x00000001が0x7fffffffになってしまうのでdouble→longとする
  8197:       int z = XEiJ.regRn[l] = (int) zz;  //商
  8198:       if (h != l) {
  8199:         XEiJ.regRn[h] = (int) (xx - yy * zz);  //余り
  8200:       }
  8201:       XEiJ.regCCR = (XEiJ.regCCR & XEiJ.REG_CCR_X |  //Xは変化しない
  8202:                      (z < 0 ? XEiJ.REG_CCR_N : 0) |  //Nは商が負のときセット、さもなくばクリア
  8203:                      (z == 0 ? XEiJ.REG_CCR_Z : 0)  //Zは商が0のときセット、さもなくばクリア
  8204:                      );  //VとCは常にクリア
  8205:     } else {  //符号あり。DIVS.L <ea>,*
  8206:       XEiJ.mpuCycleCount += 38;  //最大
  8207:       long yy = (long) y;  //除数
  8208:       if (y == 0) {  //ゼロ除算
  8209:         XEiJ.regCCR = (XEiJ.regCCR & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_N | XEiJ.REG_CCR_Z | XEiJ.REG_CCR_V)  //XとNとZとVは変化しない
  8210:                        );  //Cは常にクリア
  8211:         XEiJ.mpuCycleCount += 38 - 34;
  8212:         M68kException.m6eAddress = XEiJ.regPC0;  //アドレスは命令の先頭
  8213:         M68kException.m6eNumber = M68kException.M6E_DIVIDE_BY_ZERO;
  8214:         throw M68kException.m6eSignal;
  8215:       }  //if ゼロ除算
  8216:       long xx = (long) XEiJ.regRn[l];  //被除数
  8217:       long zz = xx / yy;  //商
  8218:       if ((int) zz != zz) {  //オーバーフローあり
  8219:         //Dqは変化しない
  8220:         XEiJ.regCCR = (XEiJ.regCCR & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_N | XEiJ.REG_CCR_Z) |  //XとNとZは変化しない
  8221:                        XEiJ.REG_CCR_V  //Vは常にセット
  8222:                        );  //Cは常にクリア
  8223:       } else {  //オーバーフローなし
  8224:         int z = XEiJ.regRn[l] = (int) zz;  //商
  8225:         if (h != l) {  //DIVSL.L <ea>,Dr:Dq
  8226:           XEiJ.regRn[h] = (int) (xx - yy * zz);  //余り
  8227:         }
  8228:         XEiJ.regCCR = (XEiJ.regCCR & XEiJ.REG_CCR_X |  //Xは変化しない
  8229:                        (z < 0 ? XEiJ.REG_CCR_N : 0) |  //Nは商が負のときセット、さもなくばクリア
  8230:                        (z == 0 ? XEiJ.REG_CCR_Z : 0)  //Zは商が0のときセット、さもなくばクリア
  8231:                        );  //VとCは常にクリア
  8232:       }  //if オーバーフローあり/オーバーフローなし
  8233:     }  //if 符号なし/符号あり
  8234:   }  //irpDivuDivsLong
  8235: 
  8236:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  8237:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  8238:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  8239:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  8240:   //SATS.L Dr                                       |-|------|-|-UUUU|-**00|D         |0100_110_010_000_rrr (ISA_B)
  8241:   //MOVEM.W <ea>,<list>                             |-|012346|-|-----|-----|  M+ WXZP |0100_110_010_mmm_rrr-llllllllllllllll
  8242:   //
  8243:   //SATS.L Dr
  8244:   //  VがセットされていたらDrを符号が逆で絶対値が最大の値にする(直前のDrに対する演算を飽和演算にする)
  8245:   public static void irpMovemToRegWord () throws M68kException {
  8246:     int ea = XEiJ.regOC & 63;
  8247:     if (ea < XEiJ.EA_AR) {  //SATS.L Dr
  8248:       XEiJ.mpuCycleCount++;
  8249:       int z = XEiJ.regRn[ea];
  8250:       if (XEiJ.TEST_BIT_1_SHIFT ? XEiJ.regCCR << 31 - 1 < 0 : (XEiJ.regCCR & XEiJ.REG_CCR_V) != 0) {  //Vがセットされているとき
  8251:         XEiJ.regRn[ea] = z = z >> 31 ^ 0x80000000;  //符号が逆で絶対値が最大の値にする
  8252:       }
  8253:       XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X);  //ccr_tst
  8254:     } else {  //MOVEM.W <ea>,<list>
  8255:       int l = mmuReadWordZeroExword (XEiJ.regPC, XEiJ.regSRS);  //pcwze。レジスタリスト。ゼロ拡張
  8256:       XEiJ.regPC += 2;
  8257:       int arr, a;
  8258:       if (ea >> 3 == XEiJ.MMM_MP) {  //(Ar)+
  8259:         arr = ea - (XEiJ.EA_MP - 8);
  8260:         a = XEiJ.regRn[arr];
  8261:       } else {  //(Ar)+以外
  8262:         arr = 16;
  8263:         a = efaCntWord (ea);
  8264:       }
  8265:       int t = a;
  8266:       if (XEiJ.IRP_MOVEM_EXPAND) {  //16回展開する
  8267:         if ((l & 0x0001) != 0) {
  8268:           XEiJ.regRn[ 0] = mmuReadWordSignData (a, XEiJ.regSRS);  //データレジスタも符号拡張して32bit全部書き換える
  8269:           a += 2;
  8270:         }
  8271:         if ((l & 0x0002) != 0) {
  8272:           XEiJ.regRn[ 1] = mmuReadWordSignData (a, XEiJ.regSRS);  //データレジスタも符号拡張して32bit全部書き換える
  8273:           a += 2;
  8274:         }
  8275:         if ((l & 0x0004) != 0) {
  8276:           XEiJ.regRn[ 2] = mmuReadWordSignData (a, XEiJ.regSRS);  //データレジスタも符号拡張して32bit全部書き換える
  8277:           a += 2;
  8278:         }
  8279:         if ((l & 0x0008) != 0) {
  8280:           XEiJ.regRn[ 3] = mmuReadWordSignData (a, XEiJ.regSRS);  //データレジスタも符号拡張して32bit全部書き換える
  8281:           a += 2;
  8282:         }
  8283:         if ((l & 0x0010) != 0) {
  8284:           XEiJ.regRn[ 4] = mmuReadWordSignData (a, XEiJ.regSRS);  //データレジスタも符号拡張して32bit全部書き換える
  8285:           a += 2;
  8286:         }
  8287:         if ((l & 0x0020) != 0) {
  8288:           XEiJ.regRn[ 5] = mmuReadWordSignData (a, XEiJ.regSRS);  //データレジスタも符号拡張して32bit全部書き換える
  8289:           a += 2;
  8290:         }
  8291:         if ((l & 0x0040) != 0) {
  8292:           XEiJ.regRn[ 6] = mmuReadWordSignData (a, XEiJ.regSRS);  //データレジスタも符号拡張して32bit全部書き換える
  8293:           a += 2;
  8294:         }
  8295:         if ((byte) l < 0) {  //(l & 0x0080) != 0
  8296:           XEiJ.regRn[ 7] = mmuReadWordSignData (a, XEiJ.regSRS);  //データレジスタも符号拡張して32bit全部書き換える
  8297:           a += 2;
  8298:         }
  8299:         if ((l & 0x0100) != 0) {
  8300:           XEiJ.regRn[ 8] = mmuReadWordSignData (a, XEiJ.regSRS);  //符号拡張して32bit全部書き換える
  8301:           a += 2;
  8302:         }
  8303:         if ((l & 0x0200) != 0) {
  8304:           XEiJ.regRn[ 9] = mmuReadWordSignData (a, XEiJ.regSRS);  //符号拡張して32bit全部書き換える
  8305:           a += 2;
  8306:         }
  8307:         if ((l & 0x0400) != 0) {
  8308:           XEiJ.regRn[10] = mmuReadWordSignData (a, XEiJ.regSRS);  //符号拡張して32bit全部書き換える
  8309:           a += 2;
  8310:         }
  8311:         if ((l & 0x0800) != 0) {
  8312:           XEiJ.regRn[11] = mmuReadWordSignData (a, XEiJ.regSRS);  //符号拡張して32bit全部書き換える
  8313:           a += 2;
  8314:         }
  8315:         if ((l & 0x1000) != 0) {
  8316:           XEiJ.regRn[12] = mmuReadWordSignData (a, XEiJ.regSRS);  //符号拡張して32bit全部書き換える
  8317:           a += 2;
  8318:         }
  8319:         if ((l & 0x2000) != 0) {
  8320:           XEiJ.regRn[13] = mmuReadWordSignData (a, XEiJ.regSRS);  //符号拡張して32bit全部書き換える
  8321:           a += 2;
  8322:         }
  8323:         if ((l & 0x4000) != 0) {
  8324:           XEiJ.regRn[14] = mmuReadWordSignData (a, XEiJ.regSRS);  //符号拡張して32bit全部書き換える
  8325:           a += 2;
  8326:         }
  8327:         if ((short) l < 0) {  //(l & 0x8000) != 0
  8328:           XEiJ.regRn[15] = mmuReadWordSignData (a, XEiJ.regSRS);  //符号拡張して32bit全部書き換える
  8329:           a += 2;
  8330:         }
  8331:       } else if (XEiJ.IRP_MOVEM_LOOP) {  //16回ループする。コンパイラが展開する
  8332:         for (int i = 0; i <= 15; i++) {
  8333:           if ((l & 0x0001 << i) != 0) {
  8334:             XEiJ.regRn[i] = mmuReadWordSignData (a, XEiJ.regSRS);  //(データレジスタも)符号拡張して32bit全部書き換える
  8335:             a += 2;
  8336:           }
  8337:         }
  8338:       } else if (XEiJ.IRP_MOVEM_SHIFT_LEFT) {  //0になるまで左にシフトする
  8339:         l = XEiJ.MPU_BITREV_TABLE_0[l & 2047] | XEiJ.MPU_BITREV_TABLE_1[l << 10 >>> 21];  //Integer.reverse(l)
  8340:         for (int i = 0; l != 0; i++, l <<= 1) {
  8341:           if (l < 0) {
  8342:             XEiJ.regRn[i] = mmuReadWordSignData (a, XEiJ.regSRS);  //(データレジスタも)符号拡張して32bit全部書き換える
  8343:             a += 2;
  8344:           }
  8345:         }
  8346:       } else if (XEiJ.IRP_MOVEM_SHIFT_RIGHT) {  //0になるまで右にシフトする
  8347:         for (int i = 0; l != 0; i++, l >>>= 1) {
  8348:           if ((l & 1) != 0) {
  8349:             XEiJ.regRn[i] = mmuReadWordSignData (a, XEiJ.regSRS);  //(データレジスタも)符号拡張して32bit全部書き換える
  8350:             a += 2;
  8351:           }
  8352:         }
  8353:       } else if (XEiJ.IRP_MOVEM_ZEROS) {  //Integer.numberOfTrailingZerosを使う
  8354:         for (int i = 0; l != 0; ) {
  8355:           int k = Integer.numberOfTrailingZeros (l);
  8356:           XEiJ.regRn[i += k] = mmuReadWordSignData (a, XEiJ.regSRS);  //(データレジスタも)符号拡張して32bit全部書き換える
  8357:           a += 2;
  8358:           l = l >>> k & ~1;
  8359:         }
  8360:       }
  8361:       //MOVEM.W (Ar)+,<list>で<list>にArが含まれているとき、メモリから読み出したデータを捨ててArをインクリメントする
  8362:       XEiJ.regRn[arr] = a;
  8363:       XEiJ.mpuCycleCount += a - t >> 1;  //2バイト/個→1サイクル/個
  8364:     }
  8365:   }  //irpMovemToRegWord
  8366: 
  8367:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  8368:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  8369:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  8370:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  8371:   //MOVEM.L <ea>,<list>                             |-|012346|-|-----|-----|  M+ WXZP |0100_110_011_mmm_rrr-llllllllllllllll
  8372:   public static void irpMovemToRegLong () throws M68kException {
  8373:     int ea = XEiJ.regOC & 63;
  8374:     {
  8375:       int l = mmuReadWordZeroExword (XEiJ.regPC, XEiJ.regSRS);  //pcwze。レジスタリスト。ゼロ拡張
  8376:       XEiJ.regPC += 2;
  8377:       int arr, a;
  8378:       if (ea >> 3 == XEiJ.MMM_MP) {  //(Ar)+
  8379:         arr = ea - (XEiJ.EA_MP - 8);
  8380:         a = XEiJ.regRn[arr];
  8381:       } else {  //(Ar)+以外
  8382:         arr = 16;
  8383:         a = efaCntLong (ea);
  8384:       }
  8385:       int t = a;
  8386:       if (XEiJ.IRP_MOVEM_EXPAND) {  //16回展開する
  8387:         if ((l & 0x0001) != 0) {
  8388:           XEiJ.regRn[ 0] = mmuReadLongData (a, XEiJ.regSRS);
  8389:           a += 4;
  8390:         }
  8391:         if ((l & 0x0002) != 0) {
  8392:           XEiJ.regRn[ 1] = mmuReadLongData (a, XEiJ.regSRS);
  8393:           a += 4;
  8394:         }
  8395:         if ((l & 0x0004) != 0) {
  8396:           XEiJ.regRn[ 2] = mmuReadLongData (a, XEiJ.regSRS);
  8397:           a += 4;
  8398:         }
  8399:         if ((l & 0x0008) != 0) {
  8400:           XEiJ.regRn[ 3] = mmuReadLongData (a, XEiJ.regSRS);
  8401:           a += 4;
  8402:         }
  8403:         if ((l & 0x0010) != 0) {
  8404:           XEiJ.regRn[ 4] = mmuReadLongData (a, XEiJ.regSRS);
  8405:           a += 4;
  8406:         }
  8407:         if ((l & 0x0020) != 0) {
  8408:           XEiJ.regRn[ 5] = mmuReadLongData (a, XEiJ.regSRS);
  8409:           a += 4;
  8410:         }
  8411:         if ((l & 0x0040) != 0) {
  8412:           XEiJ.regRn[ 6] = mmuReadLongData (a, XEiJ.regSRS);
  8413:           a += 4;
  8414:         }
  8415:         if ((byte) l < 0) {  //(l & 0x0080) != 0
  8416:           XEiJ.regRn[ 7] = mmuReadLongData (a, XEiJ.regSRS);
  8417:           a += 4;
  8418:         }
  8419:         if ((l & 0x0100) != 0) {
  8420:           XEiJ.regRn[ 8] = mmuReadLongData (a, XEiJ.regSRS);
  8421:           a += 4;
  8422:         }
  8423:         if ((l & 0x0200) != 0) {
  8424:           XEiJ.regRn[ 9] = mmuReadLongData (a, XEiJ.regSRS);
  8425:           a += 4;
  8426:         }
  8427:         if ((l & 0x0400) != 0) {
  8428:           XEiJ.regRn[10] = mmuReadLongData (a, XEiJ.regSRS);
  8429:           a += 4;
  8430:         }
  8431:         if ((l & 0x0800) != 0) {
  8432:           XEiJ.regRn[11] = mmuReadLongData (a, XEiJ.regSRS);
  8433:           a += 4;
  8434:         }
  8435:         if ((l & 0x1000) != 0) {
  8436:           XEiJ.regRn[12] = mmuReadLongData (a, XEiJ.regSRS);
  8437:           a += 4;
  8438:         }
  8439:         if ((l & 0x2000) != 0) {
  8440:           XEiJ.regRn[13] = mmuReadLongData (a, XEiJ.regSRS);
  8441:           a += 4;
  8442:         }
  8443:         if ((l & 0x4000) != 0) {
  8444:           XEiJ.regRn[14] = mmuReadLongData (a, XEiJ.regSRS);
  8445:           a += 4;
  8446:         }
  8447:         if ((short) l < 0) {  //(l & 0x8000) != 0
  8448:           XEiJ.regRn[15] = mmuReadLongData (a, XEiJ.regSRS);
  8449:           a += 4;
  8450:         }
  8451:       } else if (XEiJ.IRP_MOVEM_LOOP) {  //16回ループする。コンパイラが展開する
  8452:         for (int i = 0; i <= 15; i++) {
  8453:           if ((l & 0x0001 << i) != 0) {
  8454:             XEiJ.regRn[i] = mmuReadLongData (a, XEiJ.regSRS);
  8455:             a += 4;
  8456:           }
  8457:         }
  8458:       } else if (XEiJ.IRP_MOVEM_SHIFT_LEFT) {  //0になるまで左にシフトする
  8459:         l = XEiJ.MPU_BITREV_TABLE_0[l & 2047] | XEiJ.MPU_BITREV_TABLE_1[l << 10 >>> 21];  //Integer.reverse(l)
  8460:         for (int i = 0; l != 0; i++, l <<= 1) {
  8461:           if (l < 0) {
  8462:             XEiJ.regRn[i] = mmuReadLongData (a, XEiJ.regSRS);
  8463:             a += 4;
  8464:           }
  8465:         }
  8466:       } else if (XEiJ.IRP_MOVEM_SHIFT_RIGHT) {  //0になるまで右にシフトする
  8467:         for (int i = 0; l != 0; i++, l >>>= 1) {
  8468:           if ((l & 1) != 0) {
  8469:             XEiJ.regRn[i] = mmuReadLongData (a, XEiJ.regSRS);
  8470:             a += 4;
  8471:           }
  8472:         }
  8473:       } else if (XEiJ.IRP_MOVEM_ZEROS) {  //Integer.numberOfTrailingZerosを使う
  8474:         for (int i = 0; l != 0; ) {
  8475:           int k = Integer.numberOfTrailingZeros (l);
  8476:           XEiJ.regRn[i += k] = mmuReadLongData (a, XEiJ.regSRS);
  8477:           a += 4;
  8478:           l = l >>> k & ~1;
  8479:         }
  8480:       }
  8481:       //MOVEM.L (Ar)+,<list>で<list>にArが含まれているとき、メモリから読み出したデータを捨ててArをインクリメントする
  8482:       XEiJ.regRn[arr] = a;
  8483:       XEiJ.mpuCycleCount += a - t >> 2;  //4バイト/個→1サイクル/個
  8484:     }
  8485:   }  //irpMovemToRegLong
  8486: 
  8487:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  8488:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  8489:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  8490:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  8491:   //TRAP #<vector>                                  |-|012346|-|-----|-----|          |0100_111_001_00v_vvv
  8492:   public static void irpTrap () throws M68kException {
  8493:     irpExceptionFormat0 (XEiJ.regOC - (0b0100_111_001_000_000 - M68kException.M6E_TRAP_0_INSTRUCTION_VECTOR) << 2, XEiJ.regPC);  //pcは次の命令
  8494:   }  //irpTrap
  8495:   public static void irpTrap15 () throws M68kException {
  8496:     if ((XEiJ.regRn[0] & 255) == 0x8e) {  //IOCS _BOOTINF
  8497:       MainMemory.mmrCheckHuman ();
  8498:     }
  8499:     irpExceptionFormat0 (M68kException.M6E_TRAP_15_INSTRUCTION_VECTOR << 2, XEiJ.regPC);  //pcは次の命令
  8500:   }  //irpTrap15
  8501: 
  8502:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  8503:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  8504:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  8505:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  8506:   //LINK.W Ar,#<data>                               |-|012346|-|-----|-----|          |0100_111_001_010_rrr-{data}
  8507:   //
  8508:   //LINK.W Ar,#<data>
  8509:   //  PEA.L (Ar);MOVEA.L A7,Ar;ADDA.W #<data>,A7と同じ
  8510:   //  LINK.W A7,#<data>はA7をデクリメントする前の値がプッシュされ、A7に#<data>が加算される
  8511:   public static void irpLinkWord () throws M68kException {
  8512:     XEiJ.mpuCycleCount++;
  8513:     int o = mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);  //pcws
  8514:     int arr = XEiJ.regOC - (0b0100_111_001_010_000 - 8);
  8515:     //評価順序に注意。LINK.W A7,#<data>のときプッシュするのはA7をデクリメントする前の値。wl(r[15]-=4,r[8+rrr])は不可
  8516:     int a = XEiJ.regRn[arr];
  8517:     M68kException.m6eIncremented -= 4L << (7 << 3);
  8518:     int sp = XEiJ.regRn[15] -= 4;
  8519:     mmuWriteLongData (sp, a, XEiJ.regSRS);  //pushl
  8520:     XEiJ.regRn[arr] = sp;
  8521:     XEiJ.regRn[15] = sp + o;
  8522:   }  //irpLinkWord
  8523: 
  8524:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  8525:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  8526:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  8527:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  8528:   //UNLK Ar                                         |-|012346|-|-----|-----|          |0100_111_001_011_rrr
  8529:   //
  8530:   //UNLK Ar
  8531:   //  MOVEA.L Ar,A7;MOVEA.L (A7)+,Arと同じ
  8532:   //  UNLK A7はMOVEA.L A7,A7;MOVEA.L (A7)+,A7すなわちMOVEA.L (A7),A7と同じ
  8533:   //  ソースオペランドのポストインクリメントはデスティネーションオペランドが評価される前に完了しているとみなされる
  8534:   //    例えばMOVE.L (A0)+,(A0)+はMOVE.L (A0),(4,A0);ADDQ.L #8,A0と同じ
  8535:   //    MOVEA.L (A0)+,A0はポストインクリメントされたA0が(A0)から読み出された値で上書きされるのでMOVEA.L (A0),A0と同じ
  8536:   //  M68000PRMにUNLK Anの動作はAn→SP;(SP)→An;SP+4→SPだと書かれているがこれはn=7の場合に当てはまらない
  8537:   //  余談だが68040の初期のマスクセットはUNLK A7を実行すると固まるらしい
  8538:   public static void irpUnlk () throws M68kException {
  8539:     XEiJ.mpuCycleCount += 2;
  8540:     int arr = XEiJ.regOC - (0b0100_111_001_011_000 - 8);
  8541:     //評価順序に注意
  8542:     int sp = XEiJ.regRn[arr];
  8543:     //  UNLK ArはMOVEA.L Ar,A7;MOVEA.L (A7)+,Arと同じ
  8544:     //  (A7)+がページフォルトになってリトライするとき
  8545:     //    Arはまだ更新されておらず、リトライでMOVEA.L Ar,A7が再実行されるので、A7を巻き戻す必要はない
  8546:     M68kException.m6eIncremented += 4L << (7 << 3);  //UNLK A7でページフォルトが発生したときA7が増えすぎないようにする
  8547:     XEiJ.regRn[15] = sp + 4;
  8548:     XEiJ.regRn[arr] = mmuReadLongData (sp, XEiJ.regSRS);  //popls
  8549:   }  //irpUnlk
  8550: 
  8551:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  8552:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  8553:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  8554:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  8555:   //MOVE.L Ar,USP                                   |-|012346|P|-----|-----|          |0100_111_001_100_rrr
  8556:   public static void irpMoveToUsp () throws M68kException {
  8557:     if (XEiJ.regSRS == 0) {  //ユーザモードのとき
  8558:       M68kException.m6eNumber = M68kException.M6E_PRIVILEGE_VIOLATION;
  8559:       throw M68kException.m6eSignal;
  8560:     }
  8561:     //以下はスーパーバイザモード
  8562:     XEiJ.mpuCycleCount += 2;
  8563:     XEiJ.mpuUSP = XEiJ.regRn[XEiJ.regOC - (0b0100_111_001_100_000 - 8)];
  8564:   }  //irpMoveToUsp
  8565: 
  8566:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  8567:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  8568:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  8569:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  8570:   //MOVE.L USP,Ar                                   |-|012346|P|-----|-----|          |0100_111_001_101_rrr
  8571:   public static void irpMoveFromUsp () throws M68kException {
  8572:     if (XEiJ.regSRS == 0) {  //ユーザモードのとき
  8573:       M68kException.m6eNumber = M68kException.M6E_PRIVILEGE_VIOLATION;
  8574:       throw M68kException.m6eSignal;
  8575:     }
  8576:     //以下はスーパーバイザモード
  8577:     XEiJ.mpuCycleCount++;
  8578:     XEiJ.regRn[XEiJ.regOC - (0b0100_111_001_101_000 - 8)] = XEiJ.mpuUSP;
  8579:   }  //irpMoveFromUsp
  8580: 
  8581:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  8582:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  8583:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  8584:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  8585:   //RESET                                           |-|012346|P|-----|-----|          |0100_111_001_110_000
  8586:   public static void irpReset () throws M68kException {
  8587:     if (XEiJ.regSRS == 0) {  //ユーザモードのとき
  8588:       M68kException.m6eNumber = M68kException.M6E_PRIVILEGE_VIOLATION;
  8589:       throw M68kException.m6eSignal;
  8590:     }
  8591:     //以下はスーパーバイザモード
  8592:     XEiJ.mpuCycleCount += 45;
  8593:     XEiJ.irpReset ();
  8594:   }  //irpReset
  8595: 
  8596:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  8597:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  8598:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  8599:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  8600:   //NOP                                             |-|012346|-|-----|-----|          |0100_111_001_110_001
  8601:   public static void irpNop () throws M68kException {
  8602:     XEiJ.mpuCycleCount += 9;
  8603:     //何もしない
  8604:   }  //irpNop
  8605: 
  8606:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  8607:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  8608:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  8609:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  8610:   //STOP #<data>                                    |-|012346|P|UUUUU|*****|          |0100_111_001_110_010-{data}
  8611:   //
  8612:   //STOP #<data>
  8613:   //    1. #<data>をsrに設定する
  8614:   //    2. pcを進める
  8615:   //    3. 以下のいずれかの条件が成立するまで停止する
  8616:   //      3a. トレース
  8617:   //      3b. マスクされているレベルよりも高い割り込み要求
  8618:   //      3c. リセット
  8619:   //  コアと一緒にデバイスを止めるわけにいかないので、ここでは条件が成立するまで同じ命令を繰り返すループ命令として実装する
  8620:   public static void irpStop () throws M68kException {
  8621:     if (XEiJ.regSRS == 0) {  //ユーザモードのとき
  8622:       M68kException.m6eNumber = M68kException.M6E_PRIVILEGE_VIOLATION;
  8623:       throw M68kException.m6eSignal;
  8624:     }
  8625:     //以下はスーパーバイザモード
  8626:     XEiJ.mpuCycleCount++;
  8627:     irpSetSR (mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, 1));  //pcws。特権違反チェックが先
  8628:     if (XEiJ.mpuTraceFlag == 0) {  //トレースまたはマスクされているレベルよりも高い割り込み要求がない
  8629:       XEiJ.regPC = XEiJ.regPC0;  //ループ
  8630:       //任意の負荷率を100%に設定しているときSTOP命令が軽すぎると動作周波数が大きくなりすぎて割り込みがかかったとき次に進めなくなる
  8631:       //負荷率の計算にSTOP命令で止まっていた時間を含めないことにする
  8632:       XEiJ.mpuClockTime += XEiJ.TMR_FREQ * 4 / 1000000;  //4μs。50MHzのとき200clk
  8633:       XEiJ.mpuLastNano += 4000L;
  8634:     }
  8635:   }  //irpStop
  8636: 
  8637:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  8638:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  8639:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  8640:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  8641:   //RTE                                             |-|012346|P|UUUUU|*****|          |0100_111_001_110_011
  8642:   public static void irpRte () throws M68kException {
  8643:     if (XEiJ.regSRS == 0) {  //ユーザモードのとき
  8644:       M68kException.m6eNumber = M68kException.M6E_PRIVILEGE_VIOLATION;
  8645:       throw M68kException.m6eSignal;
  8646:     }
  8647:     //以下はスーパーバイザモード
  8648:     XEiJ.mpuCycleCount += 17;
  8649:     int sp = XEiJ.regRn[15];
  8650:     int newSR = mmuReadWordZeroData (sp, 1);  //popwz
  8651:     int newPC = mmuReadLongData (sp + 2, 1);  //popls
  8652:     int format = mmuReadWordZeroData (sp + 6, 1) >> 12;
  8653:     if (format == 0) {  //010,020,030,040,060
  8654:       XEiJ.regRn[15] = sp + 8;
  8655:     } else if (format == 2 ||  //020,030,040,060
  8656:                format == 3) {  //040,060
  8657:       XEiJ.regRn[15] = sp + 12;
  8658:     } else if (format == 4) {  //060
  8659:       XEiJ.regRn[15] = sp + 16;
  8660:     } else {
  8661:       M68kException.m6eNumber = M68kException.M6E_FORMAT_ERROR;
  8662:       throw M68kException.m6eSignal;
  8663:     }
  8664:     //irpSetSRでモードが切り替わる場合があるのでその前にr[15]を更新しておくこと
  8665:     irpSetSR (newSR);  //ここでユーザモードに戻る場合がある。特権違反チェックが先
  8666:     irpSetPC (newPC);  //分岐ログが新しいsrを使う。順序に注意。ここでアドレスエラーが発生する場合がある
  8667:   }  //irpRte
  8668: 
  8669:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  8670:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  8671:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  8672:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  8673:   //RTD #<data>                                     |-|-12346|-|-----|-----|          |0100_111_001_110_100-{data}
  8674:   public static void irpRtd () throws M68kException {
  8675:     XEiJ.mpuCycleCount += 7;
  8676:     int sp = XEiJ.regRn[15];
  8677:     int o = mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);  //pcws
  8678:     irpSetPC (mmuReadLongData (sp, XEiJ.regSRS));  //popls
  8679:     XEiJ.regRn[15] = sp + 4 + o;
  8680:   }  //irpRtd
  8681: 
  8682:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  8683:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  8684:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  8685:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  8686:   //RTS                                             |-|012346|-|-----|-----|          |0100_111_001_110_101
  8687:   public static void irpRts () throws M68kException {
  8688:     XEiJ.mpuCycleCount += 7;
  8689:     int sp = XEiJ.regRn[15];
  8690:     irpSetPC (mmuReadLongData (sp, XEiJ.regSRS));  //popls
  8691:     XEiJ.regRn[15] = sp + 4;
  8692:   }  //irpRts
  8693: 
  8694:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  8695:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  8696:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  8697:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  8698:   //TRAPV                                           |-|012346|-|---*-|-----|          |0100_111_001_110_110
  8699:   public static void irpTrapv () throws M68kException {
  8700:     if (XEiJ.TEST_BIT_1_SHIFT ? XEiJ.regCCR << 31 - 1 >= 0 : (XEiJ.regCCR & XEiJ.REG_CCR_V) == 0) {  //通過
  8701:       XEiJ.mpuCycleCount++;
  8702:     } else {
  8703:       M68kException.m6eAddress = XEiJ.regPC0;  //アドレスは命令の先頭
  8704:       M68kException.m6eNumber = M68kException.M6E_TRAPV_INSTRUCTION;
  8705:       throw M68kException.m6eSignal;
  8706:     }
  8707:   }  //irpTrapv
  8708: 
  8709:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  8710:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  8711:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  8712:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  8713:   //RTR                                             |-|012346|-|UUUUU|*****|          |0100_111_001_110_111
  8714:   public static void irpRtr () throws M68kException {
  8715:     XEiJ.mpuCycleCount += 8;
  8716:     int sp = XEiJ.regRn[15];
  8717:     int w = mmuReadWordZeroData (sp, XEiJ.regSRS);  //popwz
  8718:     irpSetPC (mmuReadLongData (sp + 2, XEiJ.regSRS));  //popls
  8719:     XEiJ.regCCR = XEiJ.REG_CCR_MASK & w;
  8720:     XEiJ.regRn[15] = sp + 6;
  8721:   }  //irpRtr
  8722: 
  8723:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  8724:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  8725:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  8726:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  8727:   //MOVEC.L Rc,Rn                                   |-|-12346|P|-----|-----|          |0100_111_001_111_010-rnnncccccccccccc
  8728:   public static void irpMovecFromControl () throws M68kException {
  8729:     if (XEiJ.regSRS == 0) {  //ユーザモードのとき
  8730:       M68kException.m6eNumber = M68kException.M6E_PRIVILEGE_VIOLATION;
  8731:       throw M68kException.m6eSignal;
  8732:     }
  8733:     //以下はスーパーバイザモード
  8734:     int w = mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, 1);  //pcwz。拡張ワード
  8735:     switch (w & 0x0fff) {
  8736:     case 0x000:  //SFC
  8737:       XEiJ.mpuCycleCount += 12;
  8738:       XEiJ.regRn[w >> 12] = XEiJ.mpuSFC;
  8739:       break;
  8740:     case 0x001:  //DFC
  8741:       XEiJ.mpuCycleCount += 12;
  8742:       XEiJ.regRn[w >> 12] = XEiJ.mpuDFC;
  8743:       break;
  8744:     case 0x002:  //CACR
  8745:       XEiJ.mpuCycleCount += 15;
  8746:       XEiJ.regRn[w >> 12] = XEiJ.mpuCACR & 0xf880e000;  //CABCとCUBCのリードは常に0
  8747:       break;
  8748:     case 0x003:  //TCR
  8749:       XEiJ.mpuCycleCount += 15;
  8750:       XEiJ.regRn[w >> 12] = mmuGetTCR ();
  8751:       break;
  8752:     case 0x004:  //ITT0
  8753:       XEiJ.mpuCycleCount += 15;
  8754:       XEiJ.regRn[w >> 12] = mmuGetITT0 ();
  8755:       break;
  8756:     case 0x005:  //ITT1
  8757:       XEiJ.mpuCycleCount += 15;
  8758:       XEiJ.regRn[w >> 12] = mmuGetITT1 ();
  8759:       break;
  8760:     case 0x006:  //DTT0
  8761:       XEiJ.mpuCycleCount += 15;
  8762:       XEiJ.regRn[w >> 12] = mmuGetDTT0 ();
  8763:       break;
  8764:     case 0x007:  //DTT1
  8765:       XEiJ.mpuCycleCount += 15;
  8766:       XEiJ.regRn[w >> 12] = mmuGetDTT1 ();
  8767:       break;
  8768:     case 0x008:  //BUSCR
  8769:       XEiJ.mpuCycleCount += 15;
  8770:       XEiJ.regRn[w >> 12] = XEiJ.mpuBUSCR;
  8771:       break;
  8772:     case 0x800:  //USP
  8773:       XEiJ.mpuCycleCount += 12;
  8774:       XEiJ.regRn[w >> 12] = XEiJ.mpuUSP;
  8775:       break;
  8776:     case 0x801:  //VBR
  8777:       XEiJ.mpuCycleCount += 12;
  8778:       XEiJ.regRn[w >> 12] = XEiJ.mpuVBR;
  8779:       break;
  8780:     case 0x806:  //URP
  8781:       XEiJ.mpuCycleCount += 15;
  8782:       XEiJ.regRn[w >> 12] = mmuGetURP ();;
  8783:       break;
  8784:     case 0x807:  //SRP
  8785:       XEiJ.mpuCycleCount += 15;
  8786:       XEiJ.regRn[w >> 12] = mmuGetSRP ();;
  8787:       break;
  8788:     case 0x808:  //PCR
  8789:       XEiJ.mpuCycleCount += 12;
  8790:       XEiJ.regRn[w >> 12] = XEiJ.mpuPCR;
  8791:       break;
  8792:     default:
  8793:       M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION;
  8794:       throw M68kException.m6eSignal;
  8795:     }
  8796:   }  //irpMovecFromControl
  8797: 
  8798:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  8799:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  8800:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  8801:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  8802:   //MOVEC.L Rn,Rc                                   |-|-12346|P|-----|-----|          |0100_111_001_111_011-rnnncccccccccccc
  8803:   public static void irpMovecToControl () throws M68kException {
  8804:     if (XEiJ.regSRS == 0) {  //ユーザモードのとき
  8805:       M68kException.m6eNumber = M68kException.M6E_PRIVILEGE_VIOLATION;
  8806:       throw M68kException.m6eSignal;
  8807:     }
  8808:     //以下はスーパーバイザモード
  8809:     int w = mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, 1);  //pcwz。拡張ワード
  8810:     int d = XEiJ.regRn[w >> 12];
  8811:     switch (w & 0x0fff) {
  8812:     case 0x000:  //SFC
  8813:       XEiJ.mpuCycleCount += 11;
  8814:       XEiJ.mpuSFC = d & 0x00000007;
  8815:       break;
  8816:     case 0x001:  //DFC
  8817:       XEiJ.mpuCycleCount += 11;
  8818:       XEiJ.mpuDFC = d & 0x00000007;
  8819:       break;
  8820:     case 0x002:  //CACR
  8821:       //  CACR
  8822:       //   31  30  29  28  27 26 25 24   23   22   21 20 19 18 17 16   15  14  13 12 11 10 9 8  7 6 5 4 3 2 1 0
  8823:       //  EDC NAD ESB DPI FOC  0  0  0  EBC CABC CUBC  0  0  0  0  0  EIC NAI FIC  0  0  0 0 0  0 0 0 0 0 0 0 0
  8824:       //    bit31  EDC   Enable Data Cache
  8825:       //                 データキャッシュ有効
  8826:       //                 4ウェイセットアソシアティブ。16バイト/ライン*128ライン/セット*4セット=8KB
  8827:       //    bit30  NAD   No Allocate Mode (Data Cache)
  8828:       //                 データキャッシュでミスしても新しいキャッシュラインをアロケートしない
  8829:       //    bit29  ESB   Enable Store Buffer
  8830:       //                 ストアバッファ有効
  8831:       //                 ライトスルーおよびキャッシュ禁止インプリサイスのページの書き込みを4エントリ(16バイト)のFIFOバッファで遅延させる
  8832:       //                 例えば4の倍数のアドレスから始まる4バイトに連続して書き込むと1回のロングの書き込みにまとめられる
  8833:       //    bit28  DPI   Disable CPUSH Invalidation
  8834:       //                 CPUSHでプッシュされたキャッシュラインを無効化しない
  8835:       //    bit27  FOC   1/2 Cache Operation Mode Enable (Data Cache)
  8836:       //                 データキャッシュを1/2キャッシュモードにする
  8837:       //    bit23  EBC   Enable Branch Cache
  8838:       //                 分岐キャッシュ有効
  8839:       //                 256エントリの分岐キャッシュを用いて分岐予測を行う
  8840:       //                 正しく予測された分岐は前後の命令に隠れて実質0サイクルで実行される
  8841:       //                   MC68060は最大3個の命令(1個の分岐命令と2個の整数命令)を1サイクルで実行できる
  8842:       //                   MC68000(10MHz)とMC68060(50MHz)の処理速度の比は局所的に100倍を超えることがある
  8843:       //    bit22  CABC  Clear All Entries in the Branch Cache
  8844:       //                 分岐キャッシュのすべてのエントリをクリアする
  8845:       //                 分岐命令以外の場所で分岐キャッシュがヒットしてしまったときに発生する分岐予測エラーから復帰するときに使う
  8846:       //                 CABCはライトオンリーでリードは常に0
  8847:       //    bit21  CUBC  Clear All User Entries in the Branch Cache
  8848:       //                 分岐キャッシュのすべてのユーザエントリをクリアする
  8849:       //                 CUBCはライトオンリーでリードは常に0
  8850:       //    bit15  EIC   Enable Instruction Cache
  8851:       //                 命令キャッシュ有効
  8852:       //                 4ウェイセットアソシアティブ。16バイト/ライン*128ライン/セット*4セット=8KB
  8853:       //    bit14  NAI   No Allocate Mode (Instruction Cache)
  8854:       //                 命令キャッシュでミスしても新しいキャッシュラインをアロケートしない
  8855:       //    bit13  FIC   1/2 Cache Operation Mode Enable (Instruction Cache)
  8856:       //                 命令キャッシュを1/2キャッシュモードにする
  8857:       //! 非対応
  8858:       XEiJ.mpuCycleCount += 14;
  8859:       XEiJ.mpuCACR = d & 0xf8e0e000;  //CABCとCUBCは保存しておいてリードするときにマスクする
  8860:       {
  8861:         boolean cacheOn = (XEiJ.mpuCACR & 0x80008000) != 0;
  8862:         if (XEiJ.mpuCacheOn != cacheOn) {
  8863:           XEiJ.mpuCacheOn = cacheOn;
  8864:           XEiJ.mpuSetWait ();
  8865:         }
  8866:       }
  8867:       break;
  8868:     case 0x003:  //TCR
  8869:       //  TCR
  8870:       //  31 30 29 28 27 26 25 24  23 22 21 20 19 18 17 16  15 14  13  12   11   10 9 8  7 6   5 4 3 2 1 0
  8871:       //   0  0  0  0  0  0  0  0   0  0  0  0  0  0  0  0   E  P NAD NAI FOTC FITC DCO  DUO DWO DCI DUI 0
  8872:       //  bit15   E     Enable
  8873:       //  bit14   P     Page Size
  8874:       //  bit13   NAD   No Allocate Mode (Data ATC)
  8875:       //  bit12   NAI   No Allocate Mode (Instruction ATC)
  8876:       //  bit11   FOTC  1/2-Cache Mode (Data ATC)
  8877:       //  bit10   FITC  1/2-Cache Mode (Instruction ATC)
  8878:       //  bit9-8  DCO   Default Cache Mode (Data Cache)
  8879:       //  bit7-6  DUO   Default UPA bits (Data Cache)
  8880:       //  bit5    DWO   Default Write Protect (Data Cache)
  8881:       //  bit4-3  DCI   Default Cache Mode (Instruction Cache)
  8882:       //  bit2-1  DUI   Default UPA bits (Instruction Cache)
  8883:       //MMUを参照
  8884:       XEiJ.mpuCycleCount += 14;
  8885:       mmuSetTCR (d);
  8886:       break;
  8887:     case 0x004:  //ITT0
  8888:       XEiJ.mpuCycleCount += 14;
  8889:       mmuSetITT0 (d);
  8890:       break;
  8891:     case 0x005:  //ITT1
  8892:       XEiJ.mpuCycleCount += 14;
  8893:       mmuSetITT1 (d);
  8894:       break;
  8895:     case 0x006:  //DTT0
  8896:       XEiJ.mpuCycleCount += 14;
  8897:       mmuSetDTT0 (d);
  8898:       break;
  8899:     case 0x007:  //DTT1
  8900:       XEiJ.mpuCycleCount += 14;
  8901:       mmuSetDTT1 (d);
  8902:       break;
  8903:     case 0x008:  //BUSCR
  8904:       XEiJ.mpuCycleCount += 14;
  8905:       XEiJ.mpuBUSCR = d & 0xf0000000;
  8906:       break;
  8907:     case 0x800:  //USP
  8908:       XEiJ.mpuCycleCount += 11;
  8909:       XEiJ.mpuUSP = d;
  8910:       break;
  8911:     case 0x801:  //VBR
  8912:       XEiJ.mpuCycleCount += 11;
  8913:       XEiJ.mpuVBR = d & -4;  //4の倍数でないと困る
  8914:       break;
  8915:     case 0x806:  //URP
  8916:       XEiJ.mpuCycleCount += 14;
  8917:       mmuSetURP (d);
  8918:       break;
  8919:     case 0x807:  //SRP
  8920:       XEiJ.mpuCycleCount += 14;
  8921:       mmuSetSRP (d);
  8922:       break;
  8923:     case 0x808:  //PCR
  8924:       //  PCR
  8925:       //  31 30 29 28 27 26 25 24  23 22 21 20 19 18 17 16  15 14 13 12 11 10 9 8       7 6 5 4 3 2   1   0
  8926:       //   0  0  0  0  0  1  0  0   0  0  1  1  0  0  0  0     Revision Number     EDEBUG  Reserved DFP ESS
  8927:       //  bit31-16  Identification   0x0430
  8928:       //  bit15-8   Revision Number  1=F43G,5=G65V,6=E41J。偽物もあるらしい
  8929:       //  bit7      EDEBUG           Enable Debug Features
  8930:       //  bit6-2    Reserved
  8931:       //  bit1      DFP              Disable Floating-Point Unit。浮動小数点ユニット無効
  8932:       //  bit0      ESS              Enable Superscalar Dispatch。スーパースカラ有効
  8933:       XEiJ.mpuCycleCount += 11;
  8934:       XEiJ.mpuPCR = 0x04300000 | XEiJ.MPU_060_REV << 8 | d & 0x00000083;
  8935:       break;
  8936:     default:
  8937:       M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION;
  8938:       throw M68kException.m6eSignal;
  8939:     }
  8940:   }  //irpMovecToControl
  8941: 
  8942:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  8943:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  8944:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  8945:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  8946:   //JSR <ea>                                        |-|012346|-|-----|-----|  M  WXZP |0100_111_010_mmm_rrr
  8947:   //JBSR.L <label>                                  |A|012346|-|-----|-----|          |0100_111_010_111_001-{address}       [JSR <label>]
  8948:   public static void irpJsr () throws M68kException {
  8949:     XEiJ.mpuCycleCount++;
  8950:     //評価順序に注意。実効アドレスを求めてからspをデクリメントすること
  8951:     int a = efaJmpJsr (XEiJ.regOC & 63);
  8952:     M68kException.m6eIncremented -= 4L << (7 << 3);
  8953:     mmuWriteLongData (XEiJ.regRn[15] -= 4, XEiJ.regPC, XEiJ.regSRS);  //pushl
  8954:     irpSetPC (a);
  8955:   }  //irpJsr
  8956: 
  8957:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  8958:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  8959:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  8960:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  8961:   //JMP <ea>                                        |-|012346|-|-----|-----|  M  WXZP |0100_111_011_mmm_rrr
  8962:   //JBRA.L <label>                                  |A|012346|-|-----|-----|          |0100_111_011_111_001-{address}       [JMP <label>]
  8963:   public static void irpJmp () throws M68kException {
  8964:     XEiJ.mpuCycleCount++;  //0clkにしない
  8965:     irpSetPC (efaJmpJsr (XEiJ.regOC & 63));
  8966:   }  //irpJmp
  8967: 
  8968:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  8969:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  8970:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  8971:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  8972:   //ADDQ.B #<data>,<ea>                             |-|012346|-|UUUUU|*****|D M+-WXZ  |0101_qqq_000_mmm_rrr
  8973:   //INC.B <ea>                                      |A|012346|-|UUUUU|*****|D M+-WXZ  |0101_001_000_mmm_rrr [ADDQ.B #1,<ea>]
  8974:   public static void irpAddqByte () throws M68kException {
  8975:     int ea = XEiJ.regOC & 63;
  8976:     int x;
  8977:     int y = ((XEiJ.regOC >> 9) - 1 & 7) + 1;  //qqq==0?8:qqq
  8978:     int z;
  8979:     if (ea < XEiJ.EA_AR) {  //ADDQ.B #<data>,Dr
  8980:       XEiJ.mpuCycleCount++;
  8981:       z = (byte) (XEiJ.regRn[ea] = ~0xff & (x = XEiJ.regRn[ea]) | 0xff & (x = (byte) x) + y);
  8982:     } else {  //ADDQ.B #<data>,<mem>
  8983:       XEiJ.mpuCycleCount++;
  8984:       int a = efaMltByte (ea);
  8985:       mmuWriteByteData (a, z = (byte) ((x = mmuModifyByteSignData (a, XEiJ.regSRS)) + y), XEiJ.regSRS);
  8986:     }
  8987:     XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) |
  8988:            (~x & z) >>> 31 << 1 |
  8989:            (x & ~z) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C));  //ccr_addq
  8990:   }  //irpAddqByte
  8991: 
  8992:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  8993:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  8994:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  8995:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  8996:   //ADDQ.W #<data>,<ea>                             |-|012346|-|UUUUU|*****|D M+-WXZ  |0101_qqq_001_mmm_rrr
  8997:   //ADDQ.W #<data>,Ar                               |-|012346|-|-----|-----| A        |0101_qqq_001_001_rrr
  8998:   //INC.W <ea>                                      |A|012346|-|UUUUU|*****|D M+-WXZ  |0101_001_001_mmm_rrr [ADDQ.W #1,<ea>]
  8999:   //INC.W Ar                                        |A|012346|-|-----|-----| A        |0101_001_001_001_rrr [ADDQ.W #1,Ar]
  9000:   //
  9001:   //ADDQ.W #<data>,Ar
  9002:   //  ソースを符号拡張してロングで加算する
  9003:   public static void irpAddqWord () throws M68kException {
  9004:     int ea = XEiJ.regOC & 63;
  9005:     int y = ((XEiJ.regOC >> 9) - 1 & 7) + 1;  //qqq==0?8:qqq
  9006:     if (ea >> 3 == XEiJ.MMM_AR) {  //ADDQ.W #<data>,Ar
  9007:       XEiJ.mpuCycleCount++;
  9008:       XEiJ.regRn[ea] += y;  //ロングで計算する。このr[ea]はアドレスレジスタ
  9009:       //ccrは操作しない
  9010:     } else {
  9011:       int x;
  9012:       int z;
  9013:       if (ea < XEiJ.EA_AR) {  //ADDQ.W #<data>,Dr
  9014:         XEiJ.mpuCycleCount++;
  9015:         z = (short) (XEiJ.regRn[ea] = ~0xffff & (x = XEiJ.regRn[ea]) | (char) ((x = (short) x) + y));
  9016:       } else {  //ADDQ.W #<data>,<mem>
  9017:         XEiJ.mpuCycleCount++;
  9018:         int a = efaMltWord (ea);
  9019:         mmuWriteWordData (a, z = (short) ((x = mmuModifyWordSignData (a, XEiJ.regSRS)) + y), XEiJ.regSRS);
  9020:       }
  9021:       XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) |
  9022:              (~x & z) >>> 31 << 1 |
  9023:              (x & ~z) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C));  //ccr_addq
  9024:     }
  9025:   }  //irpAddqWord
  9026: 
  9027:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  9028:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  9029:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  9030:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  9031:   //ADDQ.L #<data>,<ea>                             |-|012346|-|UUUUU|*****|D M+-WXZ  |0101_qqq_010_mmm_rrr
  9032:   //ADDQ.L #<data>,Ar                               |-|012346|-|-----|-----| A        |0101_qqq_010_001_rrr
  9033:   //INC.L <ea>                                      |A|012346|-|UUUUU|*****|D M+-WXZ  |0101_001_010_mmm_rrr [ADDQ.L #1,<ea>]
  9034:   //INC.L Ar                                        |A|012346|-|-----|-----| A        |0101_001_010_001_rrr [ADDQ.L #1,Ar]
  9035:   public static void irpAddqLong () throws M68kException {
  9036:     int ea = XEiJ.regOC & 63;
  9037:     int y = ((XEiJ.regOC >> 9) - 1 & 7) + 1;  //qqq==0?8:qqq
  9038:     if (ea >> 3 == XEiJ.MMM_AR) {  //ADDQ.L #<data>,Ar
  9039:       XEiJ.mpuCycleCount++;
  9040:       XEiJ.regRn[ea] += y;  //このr[ea]はアドレスレジスタ
  9041:       //ccrは操作しない
  9042:     } else {
  9043:       int x;
  9044:       int z;
  9045:       if (ea < XEiJ.EA_AR) {  //ADDQ.L #<data>,Dr
  9046:         XEiJ.mpuCycleCount++;
  9047:         XEiJ.regRn[ea] = z = (x = XEiJ.regRn[ea]) + y;
  9048:       } else {  //ADDQ.L #<data>,<mem>
  9049:         XEiJ.mpuCycleCount++;
  9050:         int a = efaMltLong (ea);
  9051:         mmuWriteLongData (a, z = (x = mmuModifyLongData (a, XEiJ.regSRS)) + y, XEiJ.regSRS);
  9052:       }
  9053:       XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) |
  9054:              (~x & z) >>> 31 << 1 |
  9055:              (x & ~z) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C));  //ccr_addq
  9056:     }
  9057:   }  //irpAddqLong
  9058: 
  9059:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  9060:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  9061:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  9062:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  9063:   //ST.B <ea>                                       |-|012346|-|-----|-----|D M+-WXZ  |0101_000_011_mmm_rrr
  9064:   //SNF.B <ea>                                      |A|012346|-|-----|-----|D M+-WXZ  |0101_000_011_mmm_rrr [ST.B <ea>]
  9065:   //DBT.W Dr,<label>                                |-|012346|-|-----|-----|          |0101_000_011_001_rrr-{offset}
  9066:   //DBNF.W Dr,<label>                               |A|012346|-|-----|-----|          |0101_000_011_001_rrr-{offset}        [DBT.W Dr,<label>]
  9067:   //TRAPT.W #<data>                                 |-|--2346|-|-----|-----|          |0101_000_011_111_010-{data}
  9068:   //TPNF.W #<data>                                  |A|--2346|-|-----|-----|          |0101_000_011_111_010-{data}  [TRAPT.W #<data>]
  9069:   //TPT.W #<data>                                   |A|--2346|-|-----|-----|          |0101_000_011_111_010-{data}  [TRAPT.W #<data>]
  9070:   //TRAPNF.W #<data>                                |A|--2346|-|-----|-----|          |0101_000_011_111_010-{data}  [TRAPT.W #<data>]
  9071:   //TRAPT.L #<data>                                 |-|--2346|-|-----|-----|          |0101_000_011_111_011-{data}
  9072:   //TPNF.L #<data>                                  |A|--2346|-|-----|-----|          |0101_000_011_111_011-{data}  [TRAPT.L #<data>]
  9073:   //TPT.L #<data>                                   |A|--2346|-|-----|-----|          |0101_000_011_111_011-{data}  [TRAPT.L #<data>]
  9074:   //TRAPNF.L #<data>                                |A|--2346|-|-----|-----|          |0101_000_011_111_011-{data}  [TRAPT.L #<data>]
  9075:   //TRAPT                                           |-|--2346|-|-----|-----|          |0101_000_011_111_100
  9076:   //TPNF                                            |A|--2346|-|-----|-----|          |0101_000_011_111_100 [TRAPT]
  9077:   //TPT                                             |A|--2346|-|-----|-----|          |0101_000_011_111_100 [TRAPT]
  9078:   //TRAPNF                                          |A|--2346|-|-----|-----|          |0101_000_011_111_100 [TRAPT]
  9079:   public static void irpSt () throws M68kException {
  9080:     int ea = XEiJ.regOC & 63;
  9081:     //DBT.W Dr,<label>よりもST.B Drを優先する
  9082:     if (ea < XEiJ.EA_AR) {  //ST.B Dr
  9083:       XEiJ.mpuCycleCount++;
  9084:       XEiJ.regRn[ea] |= 0xff;
  9085:     } else if (ea < XEiJ.EA_MM) {  //DBT.W Dr,<label>
  9086:       int t = XEiJ.regPC;  //pc0+2
  9087:       XEiJ.regPC = t + 2;  //pc0+4
  9088:       t += mmuReadWordSignExword (t, XEiJ.regSRS);  //pc0+2+16bitディスプレースメント
  9089:       if ((t & 1) != 0) {  //分岐先のアドレスが奇数
  9090:         //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ
  9091:         irpBccAddressError (t);
  9092:       }
  9093:       //条件が成立しているので通過
  9094:       XEiJ.mpuCycleCount += 2;
  9095:     } else if ((XEiJ.EAM_PW | XEiJ.EAM_PX | XEiJ.EAM_IM) << ea < 0L) {  //TRAPT.W/TRAPT.L/TRAPT
  9096:       XEiJ.regPC += (ea & 3) + (ea & 1);  //111_010→2,111_011→4,111_100→0
  9097:       //条件が成立しているのでTRAPする
  9098:       M68kException.m6eAddress = XEiJ.regPC0;  //アドレスは命令の先頭
  9099:       M68kException.m6eNumber = M68kException.M6E_TRAPV_INSTRUCTION;
  9100:       throw M68kException.m6eSignal;
  9101:     } else {  //ST.B <mem>
  9102:       XEiJ.mpuCycleCount++;
  9103:       mmuWriteByteData (efaMltByte (ea), 0xff, XEiJ.regSRS);
  9104:     }
  9105:   }  //irpSt
  9106: 
  9107:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  9108:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  9109:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  9110:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  9111:   //SUBQ.B #<data>,<ea>                             |-|012346|-|UUUUU|*****|D M+-WXZ  |0101_qqq_100_mmm_rrr
  9112:   //DEC.B <ea>                                      |A|012346|-|UUUUU|*****|D M+-WXZ  |0101_001_100_mmm_rrr [SUBQ.B #1,<ea>]
  9113:   public static void irpSubqByte () throws M68kException {
  9114:     int ea = XEiJ.regOC & 63;
  9115:     int x;
  9116:     int y = ((XEiJ.regOC >> 9) - 1 & 7) + 1;  //qqq==0?8:qqq
  9117:     int z;
  9118:     if (ea < XEiJ.EA_AR) {  //SUBQ.B #<data>,Dr
  9119:       XEiJ.mpuCycleCount++;
  9120:       z = (byte) (XEiJ.regRn[ea] = ~0xff & (x = XEiJ.regRn[ea]) | 0xff & (x = (byte) x) - y);
  9121:     } else {  //SUBQ.B #<data>,<mem>
  9122:       XEiJ.mpuCycleCount++;
  9123:       int a = efaMltByte (ea);
  9124:       mmuWriteByteData (a, z = (byte) ((x = mmuModifyByteSignData (a, XEiJ.regSRS)) - y), XEiJ.regSRS);
  9125:     }
  9126:     XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) |
  9127:            (x & ~z) >>> 31 << 1 |
  9128:            (~x & z) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C));  //ccr_subq
  9129:   }  //irpSubqByte
  9130: 
  9131:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  9132:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  9133:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  9134:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  9135:   //SUBQ.W #<data>,<ea>                             |-|012346|-|UUUUU|*****|D M+-WXZ  |0101_qqq_101_mmm_rrr
  9136:   //SUBQ.W #<data>,Ar                               |-|012346|-|-----|-----| A        |0101_qqq_101_001_rrr
  9137:   //DEC.W <ea>                                      |A|012346|-|UUUUU|*****|D M+-WXZ  |0101_001_101_mmm_rrr [SUBQ.W #1,<ea>]
  9138:   //DEC.W Ar                                        |A|012346|-|-----|-----| A        |0101_001_101_001_rrr [SUBQ.W #1,Ar]
  9139:   //
  9140:   //SUBQ.W #<data>,Ar
  9141:   //  ソースを符号拡張してロングで減算する
  9142:   public static void irpSubqWord () throws M68kException {
  9143:     int ea = XEiJ.regOC & 63;
  9144:     int y = ((XEiJ.regOC >> 9) - 1 & 7) + 1;  //qqq==0?8:qqq
  9145:     if (ea >> 3 == XEiJ.MMM_AR) {  //SUBQ.W #<data>,Ar
  9146:       XEiJ.mpuCycleCount++;
  9147:       XEiJ.regRn[ea] -= y;  //ロングで計算する。このr[ea]はアドレスレジスタ
  9148:       //ccrは操作しない
  9149:     } else {
  9150:       int x;
  9151:       int z;
  9152:       if (ea < XEiJ.EA_AR) {  //SUBQ.W #<data>,Dr
  9153:         XEiJ.mpuCycleCount++;
  9154:         z = (short) (XEiJ.regRn[ea] = ~0xffff & (x = XEiJ.regRn[ea]) | (char) ((x = (short) x) - y));
  9155:       } else {  //SUBQ.W #<data>,<mem>
  9156:         XEiJ.mpuCycleCount++;
  9157:         int a = efaMltWord (ea);
  9158:         mmuWriteWordData (a, z = (short) ((x = mmuModifyWordSignData (a, XEiJ.regSRS)) - y), XEiJ.regSRS);
  9159:       }
  9160:       XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) |
  9161:              (x & ~z) >>> 31 << 1 |
  9162:              (~x & z) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C));  //ccr_subq
  9163:     }
  9164:   }  //irpSubqWord
  9165: 
  9166:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  9167:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  9168:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  9169:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  9170:   //SUBQ.L #<data>,<ea>                             |-|012346|-|UUUUU|*****|D M+-WXZ  |0101_qqq_110_mmm_rrr
  9171:   //SUBQ.L #<data>,Ar                               |-|012346|-|-----|-----| A        |0101_qqq_110_001_rrr
  9172:   //DEC.L <ea>                                      |A|012346|-|UUUUU|*****|D M+-WXZ  |0101_001_110_mmm_rrr [SUBQ.L #1,<ea>]
  9173:   //DEC.L Ar                                        |A|012346|-|-----|-----| A        |0101_001_110_001_rrr [SUBQ.L #1,Ar]
  9174:   public static void irpSubqLong () throws M68kException {
  9175:     int ea = XEiJ.regOC & 63;
  9176:     int y = ((XEiJ.regOC >> 9) - 1 & 7) + 1;  //qqq==0?8:qqq
  9177:     if (ea >> 3 == XEiJ.MMM_AR) {  //SUBQ.L #<data>,Ar
  9178:       XEiJ.mpuCycleCount++;
  9179:       XEiJ.regRn[ea] -= y;  //このr[ea]はアドレスレジスタ
  9180:       //ccrは操作しない
  9181:     } else {
  9182:       int x;
  9183:       int z;
  9184:       if (ea < XEiJ.EA_AR) {  //SUBQ.L #<data>,Dr
  9185:         XEiJ.mpuCycleCount++;
  9186:         XEiJ.regRn[ea] = z = (x = XEiJ.regRn[ea]) - y;
  9187:       } else {  //SUBQ.L #<data>,<mem>
  9188:         XEiJ.mpuCycleCount++;
  9189:         int a = efaMltLong (ea);
  9190:         mmuWriteLongData (a, z = (x = mmuModifyLongData (a, XEiJ.regSRS)) - y, XEiJ.regSRS);
  9191:       }
  9192:       XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) |
  9193:              (x & ~z) >>> 31 << 1 |
  9194:              (~x & z) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C));  //ccr_subq
  9195:     }
  9196:   }  //irpSubqLong
  9197: 
  9198:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  9199:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  9200:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  9201:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  9202:   //SF.B <ea>                                       |-|012346|-|-----|-----|D M+-WXZ  |0101_000_111_mmm_rrr
  9203:   //SNT.B <ea>                                      |A|012346|-|-----|-----|D M+-WXZ  |0101_000_111_mmm_rrr [SF.B <ea>]
  9204:   //DBF.W Dr,<label>                                |-|012346|-|-----|-----|          |0101_000_111_001_rrr-{offset}
  9205:   //DBNT.W Dr,<label>                               |A|012346|-|-----|-----|          |0101_000_111_001_rrr-{offset}        [DBF.W Dr,<label>]
  9206:   //DBRA.W Dr,<label>                               |A|012346|-|-----|-----|          |0101_000_111_001_rrr-{offset}        [DBF.W Dr,<label>]
  9207:   //TRAPF.W #<data>                                 |-|--2346|-|-----|-----|          |0101_000_111_111_010-{data}
  9208:   //TPF.W #<data>                                   |A|--2346|-|-----|-----|          |0101_000_111_111_010-{data}  [TRAPF.W #<data>]
  9209:   //TPNT.W #<data>                                  |A|--2346|-|-----|-----|          |0101_000_111_111_010-{data}  [TRAPF.W #<data>]
  9210:   //TRAPNT.W #<data>                                |A|--2346|-|-----|-----|          |0101_000_111_111_010-{data}  [TRAPF.W #<data>]
  9211:   //TRAPF.L #<data>                                 |-|--2346|-|-----|-----|          |0101_000_111_111_011-{data}
  9212:   //TPF.L #<data>                                   |A|--2346|-|-----|-----|          |0101_000_111_111_011-{data}  [TRAPF.L #<data>]
  9213:   //TPNT.L #<data>                                  |A|--2346|-|-----|-----|          |0101_000_111_111_011-{data}  [TRAPF.L #<data>]
  9214:   //TRAPNT.L #<data>                                |A|--2346|-|-----|-----|          |0101_000_111_111_011-{data}  [TRAPF.L #<data>]
  9215:   //TRAPF                                           |-|--2346|-|-----|-----|          |0101_000_111_111_100
  9216:   //TPF                                             |A|--2346|-|-----|-----|          |0101_000_111_111_100 [TRAPF]
  9217:   //TPNT                                            |A|--2346|-|-----|-----|          |0101_000_111_111_100 [TRAPF]
  9218:   //TRAPNT                                          |A|--2346|-|-----|-----|          |0101_000_111_111_100 [TRAPF]
  9219:   public static void irpSf () throws M68kException {
  9220:     int ea = XEiJ.regOC & 63;
  9221:     //DBRA.W Dr,<label>よりもSF.B Drを優先する
  9222:     if (ea < XEiJ.EA_AR) {  //SF.B Dr
  9223:       XEiJ.mpuCycleCount++;
  9224:       XEiJ.regRn[ea] &= ~0xff;
  9225:     } else if (ea < XEiJ.EA_MM) {  //DBRA.W Dr,<label>
  9226:       int t = XEiJ.regPC;  //pc0+2
  9227:       XEiJ.regPC = t + 2;  //pc0+4
  9228:       t += mmuReadWordSignExword (t, XEiJ.regSRS);  //pc0+2+16bitディスプレースメント
  9229:       if ((t & 1) != 0) {  //分岐先のアドレスが奇数
  9230:         //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ
  9231:         irpBccAddressError (t);
  9232:       }
  9233:       //条件が成立していないのでデクリメント
  9234:       int rrr = XEiJ.regOC & 7;
  9235:       int s = XEiJ.regRn[rrr];
  9236:       if ((short) s == 0) {  //Drの下位16bitが0なので通過
  9237:         XEiJ.mpuCycleCount += 2;
  9238:         XEiJ.regRn[rrr] = s + 65535;
  9239:       } else {  //Drの下位16bitが0でないので分岐
  9240:         XEiJ.mpuCycleCount++;
  9241:         XEiJ.regRn[rrr] = s - 1;  //下位16bitが0でないので上位16bitは変化しない
  9242:         irpSetPC (t);
  9243:       }
  9244:     } else if ((XEiJ.EAM_PW | XEiJ.EAM_PX | XEiJ.EAM_IM) << ea < 0L) {  //TRAPF.W/TRAPF.L/TRAPF
  9245:       XEiJ.regPC += (ea & 3) + (ea & 1);  //111_010→2,111_011→4,111_100→0
  9246:       //条件が成立していないのでTRAPしない
  9247:       XEiJ.mpuCycleCount++;
  9248:     } else {  //SF.B <mem>
  9249:       XEiJ.mpuCycleCount++;
  9250:       mmuWriteByteData (efaMltByte (ea), 0x00, XEiJ.regSRS);
  9251:     }
  9252:   }  //irpSf
  9253: 
  9254:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  9255:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  9256:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  9257:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  9258:   //SHI.B <ea>                                      |-|012346|-|--*-*|-----|D M+-WXZ  |0101_001_011_mmm_rrr
  9259:   //SNLS.B <ea>                                     |A|012346|-|--*-*|-----|D M+-WXZ  |0101_001_011_mmm_rrr [SHI.B <ea>]
  9260:   //DBHI.W Dr,<label>                               |-|012346|-|--*-*|-----|          |0101_001_011_001_rrr-{offset}
  9261:   //DBNLS.W Dr,<label>                              |A|012346|-|--*-*|-----|          |0101_001_011_001_rrr-{offset}        [DBHI.W Dr,<label>]
  9262:   //TRAPHI.W #<data>                                |-|--2346|-|--*-*|-----|          |0101_001_011_111_010-{data}
  9263:   //TPHI.W #<data>                                  |A|--2346|-|--*-*|-----|          |0101_001_011_111_010-{data}  [TRAPHI.W #<data>]
  9264:   //TPNLS.W #<data>                                 |A|--2346|-|--*-*|-----|          |0101_001_011_111_010-{data}  [TRAPHI.W #<data>]
  9265:   //TRAPNLS.W #<data>                               |A|--2346|-|--*-*|-----|          |0101_001_011_111_010-{data}  [TRAPHI.W #<data>]
  9266:   //TRAPHI.L #<data>                                |-|--2346|-|--*-*|-----|          |0101_001_011_111_011-{data}
  9267:   //TPHI.L #<data>                                  |A|--2346|-|--*-*|-----|          |0101_001_011_111_011-{data}  [TRAPHI.L #<data>]
  9268:   //TPNLS.L #<data>                                 |A|--2346|-|--*-*|-----|          |0101_001_011_111_011-{data}  [TRAPHI.L #<data>]
  9269:   //TRAPNLS.L #<data>                               |A|--2346|-|--*-*|-----|          |0101_001_011_111_011-{data}  [TRAPHI.L #<data>]
  9270:   //TRAPHI                                          |-|--2346|-|--*-*|-----|          |0101_001_011_111_100
  9271:   //TPHI                                            |A|--2346|-|--*-*|-----|          |0101_001_011_111_100 [TRAPHI]
  9272:   //TPNLS                                           |A|--2346|-|--*-*|-----|          |0101_001_011_111_100 [TRAPHI]
  9273:   //TRAPNLS                                         |A|--2346|-|--*-*|-----|          |0101_001_011_111_100 [TRAPHI]
  9274:   public static void irpShi () throws M68kException {
  9275:     int ea = XEiJ.regOC & 63;
  9276:     if (ea >> 3 == XEiJ.MMM_AR) {  //DBHI.W Dr,<label>
  9277:       int t = XEiJ.regPC;  //pc0+2
  9278:       XEiJ.regPC = t + 2;  //pc0+4
  9279:       t += mmuReadWordSignExword (t, XEiJ.regSRS);  //pc0+2+16bitディスプレースメント
  9280:       if ((t & 1) != 0) {  //分岐先のアドレスが奇数
  9281:         //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ
  9282:         irpBccAddressError (t);
  9283:       }
  9284:       if (XEiJ.MPU_CC_HI << XEiJ.regCCR < 0) {  //条件が成立しているので通過
  9285:         XEiJ.mpuCycleCount += 2;
  9286:       } else {  //条件が成立していないのでデクリメント
  9287:         int rrr = XEiJ.regOC & 7;
  9288:         int s = XEiJ.regRn[rrr];
  9289:         if ((short) s == 0) {  //Drの下位16bitが0なので通過
  9290:           XEiJ.mpuCycleCount += 2;
  9291:           XEiJ.regRn[rrr] = s + 65535;
  9292:         } else {  //Drの下位16bitが0でないので分岐
  9293:           XEiJ.mpuCycleCount++;
  9294:           XEiJ.regRn[rrr] = s - 1;  //下位16bitが0でないので上位16bitは変化しない
  9295:           irpSetPC (t);
  9296:         }
  9297:       }
  9298:     } else if (ea < XEiJ.EA_AR) {  //SHI.B Dr
  9299:       if (XEiJ.MPU_CC_HI << XEiJ.regCCR < 0) {  //セット
  9300:         XEiJ.mpuCycleCount++;
  9301:         XEiJ.regRn[ea] |= 0xff;
  9302:       } else {  //クリア
  9303:         XEiJ.mpuCycleCount++;
  9304:         XEiJ.regRn[ea] &= ~0xff;
  9305:       }
  9306:     } else if ((XEiJ.EAM_PW | XEiJ.EAM_PX | XEiJ.EAM_IM) << ea < 0L) {  //TRAPHI.W/TRAPHI.L/TRAPHI
  9307:       XEiJ.regPC += (ea & 3) + (ea & 1);  //111_010→2,111_011→4,111_100→0
  9308:       if (XEiJ.MPU_CC_HI << XEiJ.regCCR < 0) {
  9309:         //条件が成立しているのでTRAPする
  9310:         M68kException.m6eAddress = XEiJ.regPC0;  //アドレスは命令の先頭
  9311:         M68kException.m6eNumber = M68kException.M6E_TRAPV_INSTRUCTION;
  9312:         throw M68kException.m6eSignal;
  9313:       } else {
  9314:         //条件が成立していないのでTRAPしない
  9315:         XEiJ.mpuCycleCount++;
  9316:       }
  9317:     } else {  //SHI.B <mem>
  9318:       XEiJ.mpuCycleCount++;
  9319:       mmuWriteByteData (efaMltByte (ea), XEiJ.MPU_CC_HI << XEiJ.regCCR >> 31, XEiJ.regSRS);
  9320:     }
  9321:   }  //irpShi
  9322: 
  9323:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  9324:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  9325:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  9326:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  9327:   //SLS.B <ea>                                      |-|012346|-|--*-*|-----|D M+-WXZ  |0101_001_111_mmm_rrr
  9328:   //SNHI.B <ea>                                     |A|012346|-|--*-*|-----|D M+-WXZ  |0101_001_111_mmm_rrr [SLS.B <ea>]
  9329:   //DBLS.W Dr,<label>                               |-|012346|-|--*-*|-----|          |0101_001_111_001_rrr-{offset}
  9330:   //DBNHI.W Dr,<label>                              |A|012346|-|--*-*|-----|          |0101_001_111_001_rrr-{offset}        [DBLS.W Dr,<label>]
  9331:   //TRAPLS.W #<data>                                |-|--2346|-|--*-*|-----|          |0101_001_111_111_010-{data}
  9332:   //TPLS.W #<data>                                  |A|--2346|-|--*-*|-----|          |0101_001_111_111_010-{data}  [TRAPLS.W #<data>]
  9333:   //TPNHI.W #<data>                                 |A|--2346|-|--*-*|-----|          |0101_001_111_111_010-{data}  [TRAPLS.W #<data>]
  9334:   //TRAPNHI.W #<data>                               |A|--2346|-|--*-*|-----|          |0101_001_111_111_010-{data}  [TRAPLS.W #<data>]
  9335:   //TRAPLS.L #<data>                                |-|--2346|-|--*-*|-----|          |0101_001_111_111_011-{data}
  9336:   //TPLS.L #<data>                                  |A|--2346|-|--*-*|-----|          |0101_001_111_111_011-{data}  [TRAPLS.L #<data>]
  9337:   //TPNHI.L #<data>                                 |A|--2346|-|--*-*|-----|          |0101_001_111_111_011-{data}  [TRAPLS.L #<data>]
  9338:   //TRAPNHI.L #<data>                               |A|--2346|-|--*-*|-----|          |0101_001_111_111_011-{data}  [TRAPLS.L #<data>]
  9339:   //TRAPLS                                          |-|--2346|-|--*-*|-----|          |0101_001_111_111_100
  9340:   //TPLS                                            |A|--2346|-|--*-*|-----|          |0101_001_111_111_100 [TRAPLS]
  9341:   //TPNHI                                           |A|--2346|-|--*-*|-----|          |0101_001_111_111_100 [TRAPLS]
  9342:   //TRAPNHI                                         |A|--2346|-|--*-*|-----|          |0101_001_111_111_100 [TRAPLS]
  9343:   public static void irpSls () throws M68kException {
  9344:     int ea = XEiJ.regOC & 63;
  9345:     if (ea >> 3 == XEiJ.MMM_AR) {  //DBLS.W Dr,<label>
  9346:       int t = XEiJ.regPC;  //pc0+2
  9347:       XEiJ.regPC = t + 2;  //pc0+4
  9348:       t += mmuReadWordSignExword (t, XEiJ.regSRS);  //pc0+2+16bitディスプレースメント
  9349:       if ((t & 1) != 0) {  //分岐先のアドレスが奇数
  9350:         //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ
  9351:         irpBccAddressError (t);
  9352:       }
  9353:       if (XEiJ.MPU_CC_LS << XEiJ.regCCR < 0) {  //条件が成立しているので通過
  9354:         XEiJ.mpuCycleCount += 2;
  9355:       } else {  //条件が成立していないのでデクリメント
  9356:         int rrr = XEiJ.regOC & 7;
  9357:         int s = XEiJ.regRn[rrr];
  9358:         if ((short) s == 0) {  //Drの下位16bitが0なので通過
  9359:           XEiJ.mpuCycleCount += 2;
  9360:           XEiJ.regRn[rrr] = s + 65535;
  9361:         } else {  //Drの下位16bitが0でないので分岐
  9362:           XEiJ.mpuCycleCount++;
  9363:           XEiJ.regRn[rrr] = s - 1;  //下位16bitが0でないので上位16bitは変化しない
  9364:           irpSetPC (t);
  9365:         }
  9366:       }
  9367:     } else if (ea < XEiJ.EA_AR) {  //SLS.B Dr
  9368:       if (XEiJ.MPU_CC_LS << XEiJ.regCCR < 0) {  //セット
  9369:         XEiJ.mpuCycleCount++;
  9370:         XEiJ.regRn[ea] |= 0xff;
  9371:       } else {  //クリア
  9372:         XEiJ.mpuCycleCount++;
  9373:         XEiJ.regRn[ea] &= ~0xff;
  9374:       }
  9375:     } else if ((XEiJ.EAM_PW | XEiJ.EAM_PX | XEiJ.EAM_IM) << ea < 0L) {  //TRAPLS.W/TRAPLS.L/TRAPLS
  9376:       XEiJ.regPC += (ea & 3) + (ea & 1);  //111_010→2,111_011→4,111_100→0
  9377:       if (XEiJ.MPU_CC_LS << XEiJ.regCCR < 0) {
  9378:         //条件が成立しているのでTRAPする
  9379:         M68kException.m6eAddress = XEiJ.regPC0;  //アドレスは命令の先頭
  9380:         M68kException.m6eNumber = M68kException.M6E_TRAPV_INSTRUCTION;
  9381:         throw M68kException.m6eSignal;
  9382:       } else {
  9383:         //条件が成立していないのでTRAPしない
  9384:         XEiJ.mpuCycleCount++;
  9385:       }
  9386:     } else {  //SLS.B <mem>
  9387:       XEiJ.mpuCycleCount++;
  9388:       mmuWriteByteData (efaMltByte (ea), XEiJ.MPU_CC_LS << XEiJ.regCCR >> 31, XEiJ.regSRS);
  9389:     }
  9390:   }  //irpSls
  9391: 
  9392:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  9393:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  9394:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  9395:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  9396:   //SCC.B <ea>                                      |-|012346|-|----*|-----|D M+-WXZ  |0101_010_011_mmm_rrr
  9397:   //SHS.B <ea>                                      |A|012346|-|----*|-----|D M+-WXZ  |0101_010_011_mmm_rrr [SCC.B <ea>]
  9398:   //SNCS.B <ea>                                     |A|012346|-|----*|-----|D M+-WXZ  |0101_010_011_mmm_rrr [SCC.B <ea>]
  9399:   //SNLO.B <ea>                                     |A|012346|-|----*|-----|D M+-WXZ  |0101_010_011_mmm_rrr [SCC.B <ea>]
  9400:   //DBCC.W Dr,<label>                               |-|012346|-|----*|-----|          |0101_010_011_001_rrr-{offset}
  9401:   //DBHS.W Dr,<label>                               |A|012346|-|----*|-----|          |0101_010_011_001_rrr-{offset}        [DBCC.W Dr,<label>]
  9402:   //DBNCS.W Dr,<label>                              |A|012346|-|----*|-----|          |0101_010_011_001_rrr-{offset}        [DBCC.W Dr,<label>]
  9403:   //DBNLO.W Dr,<label>                              |A|012346|-|----*|-----|          |0101_010_011_001_rrr-{offset}        [DBCC.W Dr,<label>]
  9404:   //TRAPCC.W #<data>                                |-|--2346|-|----*|-----|          |0101_010_011_111_010-{data}
  9405:   //TPCC.W #<data>                                  |A|--2346|-|----*|-----|          |0101_010_011_111_010-{data}  [TRAPCC.W #<data>]
  9406:   //TPHS.W #<data>                                  |A|--2346|-|----*|-----|          |0101_010_011_111_010-{data}  [TRAPCC.W #<data>]
  9407:   //TPNCS.W #<data>                                 |A|--2346|-|----*|-----|          |0101_010_011_111_010-{data}  [TRAPCC.W #<data>]
  9408:   //TPNLO.W #<data>                                 |A|--2346|-|----*|-----|          |0101_010_011_111_010-{data}  [TRAPCC.W #<data>]
  9409:   //TRAPHS.W #<data>                                |A|--2346|-|----*|-----|          |0101_010_011_111_010-{data}  [TRAPCC.W #<data>]
  9410:   //TRAPNCS.W #<data>                               |A|--2346|-|----*|-----|          |0101_010_011_111_010-{data}  [TRAPCC.W #<data>]
  9411:   //TRAPNLO.W #<data>                               |A|--2346|-|----*|-----|          |0101_010_011_111_010-{data}  [TRAPCC.W #<data>]
  9412:   //TRAPCC.L #<data>                                |-|--2346|-|----*|-----|          |0101_010_011_111_011-{data}
  9413:   //TPCC.L #<data>                                  |A|--2346|-|----*|-----|          |0101_010_011_111_011-{data}  [TRAPCC.L #<data>]
  9414:   //TPHS.L #<data>                                  |A|--2346|-|----*|-----|          |0101_010_011_111_011-{data}  [TRAPCC.L #<data>]
  9415:   //TPNCS.L #<data>                                 |A|--2346|-|----*|-----|          |0101_010_011_111_011-{data}  [TRAPCC.L #<data>]
  9416:   //TPNLO.L #<data>                                 |A|--2346|-|----*|-----|          |0101_010_011_111_011-{data}  [TRAPCC.L #<data>]
  9417:   //TRAPHS.L #<data>                                |A|--2346|-|----*|-----|          |0101_010_011_111_011-{data}  [TRAPCC.L #<data>]
  9418:   //TRAPNCS.L #<data>                               |A|--2346|-|----*|-----|          |0101_010_011_111_011-{data}  [TRAPCC.L #<data>]
  9419:   //TRAPNLO.L #<data>                               |A|--2346|-|----*|-----|          |0101_010_011_111_011-{data}  [TRAPCC.L #<data>]
  9420:   //TRAPCC                                          |-|--2346|-|----*|-----|          |0101_010_011_111_100
  9421:   //TPCC                                            |A|--2346|-|----*|-----|          |0101_010_011_111_100 [TRAPCC]
  9422:   //TPHS                                            |A|--2346|-|----*|-----|          |0101_010_011_111_100 [TRAPCC]
  9423:   //TPNCS                                           |A|--2346|-|----*|-----|          |0101_010_011_111_100 [TRAPCC]
  9424:   //TPNLO                                           |A|--2346|-|----*|-----|          |0101_010_011_111_100 [TRAPCC]
  9425:   //TRAPHS                                          |A|--2346|-|----*|-----|          |0101_010_011_111_100 [TRAPCC]
  9426:   //TRAPNCS                                         |A|--2346|-|----*|-----|          |0101_010_011_111_100 [TRAPCC]
  9427:   //TRAPNLO                                         |A|--2346|-|----*|-----|          |0101_010_011_111_100 [TRAPCC]
  9428:   public static void irpShs () throws M68kException {
  9429:     int ea = XEiJ.regOC & 63;
  9430:     if (ea >> 3 == XEiJ.MMM_AR) {  //DBHS.W Dr,<label>
  9431:       int t = XEiJ.regPC;  //pc0+2
  9432:       XEiJ.regPC = t + 2;  //pc0+4
  9433:       t += mmuReadWordSignExword (t, XEiJ.regSRS);  //pc0+2+16bitディスプレースメント
  9434:       if ((t & 1) != 0) {  //分岐先のアドレスが奇数
  9435:         //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ
  9436:         irpBccAddressError (t);
  9437:       }
  9438:       if (XEiJ.MPU_CC_HS << XEiJ.regCCR < 0) {  //条件が成立しているので通過
  9439:         XEiJ.mpuCycleCount += 2;
  9440:       } else {  //条件が成立していないのでデクリメント
  9441:         int rrr = XEiJ.regOC & 7;
  9442:         int s = XEiJ.regRn[rrr];
  9443:         if ((short) s == 0) {  //Drの下位16bitが0なので通過
  9444:           XEiJ.mpuCycleCount += 2;
  9445:           XEiJ.regRn[rrr] = s + 65535;
  9446:         } else {  //Drの下位16bitが0でないので分岐
  9447:           XEiJ.mpuCycleCount++;
  9448:           XEiJ.regRn[rrr] = s - 1;  //下位16bitが0でないので上位16bitは変化しない
  9449:           irpSetPC (t);
  9450:         }
  9451:       }
  9452:     } else if (ea < XEiJ.EA_AR) {  //SHS.B Dr
  9453:       if (XEiJ.MPU_CC_HS << XEiJ.regCCR < 0) {  //セット
  9454:         XEiJ.mpuCycleCount++;
  9455:         XEiJ.regRn[ea] |= 0xff;
  9456:       } else {  //クリア
  9457:         XEiJ.mpuCycleCount++;
  9458:         XEiJ.regRn[ea] &= ~0xff;
  9459:       }
  9460:     } else if ((XEiJ.EAM_PW | XEiJ.EAM_PX | XEiJ.EAM_IM) << ea < 0L) {  //TRAPHS.W/TRAPHS.L/TRAPHS
  9461:       XEiJ.regPC += (ea & 3) + (ea & 1);  //111_010→2,111_011→4,111_100→0
  9462:       if (XEiJ.MPU_CC_HS << XEiJ.regCCR < 0) {
  9463:         //条件が成立しているのでTRAPする
  9464:         M68kException.m6eAddress = XEiJ.regPC0;  //アドレスは命令の先頭
  9465:         M68kException.m6eNumber = M68kException.M6E_TRAPV_INSTRUCTION;
  9466:         throw M68kException.m6eSignal;
  9467:       } else {
  9468:         //条件が成立していないのでTRAPしない
  9469:         XEiJ.mpuCycleCount++;
  9470:       }
  9471:     } else {  //SHS.B <mem>
  9472:       XEiJ.mpuCycleCount++;
  9473:       mmuWriteByteData (efaMltByte (ea), XEiJ.MPU_CC_HS << XEiJ.regCCR >> 31, XEiJ.regSRS);
  9474:     }
  9475:   }  //irpShs
  9476: 
  9477:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  9478:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  9479:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  9480:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  9481:   //SCS.B <ea>                                      |-|012346|-|----*|-----|D M+-WXZ  |0101_010_111_mmm_rrr
  9482:   //SLO.B <ea>                                      |A|012346|-|----*|-----|D M+-WXZ  |0101_010_111_mmm_rrr [SCS.B <ea>]
  9483:   //SNCC.B <ea>                                     |A|012346|-|----*|-----|D M+-WXZ  |0101_010_111_mmm_rrr [SCS.B <ea>]
  9484:   //SNHS.B <ea>                                     |A|012346|-|----*|-----|D M+-WXZ  |0101_010_111_mmm_rrr [SCS.B <ea>]
  9485:   //DBCS.W Dr,<label>                               |-|012346|-|----*|-----|          |0101_010_111_001_rrr-{offset}
  9486:   //DBLO.W Dr,<label>                               |A|012346|-|----*|-----|          |0101_010_111_001_rrr-{offset}        [DBCS.W Dr,<label>]
  9487:   //DBNCC.W Dr,<label>                              |A|012346|-|----*|-----|          |0101_010_111_001_rrr-{offset}        [DBCS.W Dr,<label>]
  9488:   //DBNHS.W Dr,<label>                              |A|012346|-|----*|-----|          |0101_010_111_001_rrr-{offset}        [DBCS.W Dr,<label>]
  9489:   //TRAPCS.W #<data>                                |-|--2346|-|----*|-----|          |0101_010_111_111_010-{data}
  9490:   //TPCS.W #<data>                                  |A|--2346|-|----*|-----|          |0101_010_111_111_010-{data}  [TRAPCS.W #<data>]
  9491:   //TPLO.W #<data>                                  |A|--2346|-|----*|-----|          |0101_010_111_111_010-{data}  [TRAPCS.W #<data>]
  9492:   //TPNCC.W #<data>                                 |A|--2346|-|----*|-----|          |0101_010_111_111_010-{data}  [TRAPCS.W #<data>]
  9493:   //TPNHS.W #<data>                                 |A|--2346|-|----*|-----|          |0101_010_111_111_010-{data}  [TRAPCS.W #<data>]
  9494:   //TRAPLO.W #<data>                                |A|--2346|-|----*|-----|          |0101_010_111_111_010-{data}  [TRAPCS.W #<data>]
  9495:   //TRAPNCC.W #<data>                               |A|--2346|-|----*|-----|          |0101_010_111_111_010-{data}  [TRAPCS.W #<data>]
  9496:   //TRAPNHS.W #<data>                               |A|--2346|-|----*|-----|          |0101_010_111_111_010-{data}  [TRAPCS.W #<data>]
  9497:   //TRAPCS.L #<data>                                |-|--2346|-|----*|-----|          |0101_010_111_111_011-{data}
  9498:   //TPCS.L #<data>                                  |A|--2346|-|----*|-----|          |0101_010_111_111_011-{data}  [TRAPCS.L #<data>]
  9499:   //TPLO.L #<data>                                  |A|--2346|-|----*|-----|          |0101_010_111_111_011-{data}  [TRAPCS.L #<data>]
  9500:   //TPNCC.L #<data>                                 |A|--2346|-|----*|-----|          |0101_010_111_111_011-{data}  [TRAPCS.L #<data>]
  9501:   //TPNHS.L #<data>                                 |A|--2346|-|----*|-----|          |0101_010_111_111_011-{data}  [TRAPCS.L #<data>]
  9502:   //TRAPLO.L #<data>                                |A|--2346|-|----*|-----|          |0101_010_111_111_011-{data}  [TRAPCS.L #<data>]
  9503:   //TRAPNCC.L #<data>                               |A|--2346|-|----*|-----|          |0101_010_111_111_011-{data}  [TRAPCS.L #<data>]
  9504:   //TRAPNHS.L #<data>                               |A|--2346|-|----*|-----|          |0101_010_111_111_011-{data}  [TRAPCS.L #<data>]
  9505:   //TRAPCS                                          |-|--2346|-|----*|-----|          |0101_010_111_111_100
  9506:   //TPCS                                            |A|--2346|-|----*|-----|          |0101_010_111_111_100 [TRAPCS]
  9507:   //TPLO                                            |A|--2346|-|----*|-----|          |0101_010_111_111_100 [TRAPCS]
  9508:   //TPNCC                                           |A|--2346|-|----*|-----|          |0101_010_111_111_100 [TRAPCS]
  9509:   //TPNHS                                           |A|--2346|-|----*|-----|          |0101_010_111_111_100 [TRAPCS]
  9510:   //TRAPLO                                          |A|--2346|-|----*|-----|          |0101_010_111_111_100 [TRAPCS]
  9511:   //TRAPNCC                                         |A|--2346|-|----*|-----|          |0101_010_111_111_100 [TRAPCS]
  9512:   //TRAPNHS                                         |A|--2346|-|----*|-----|          |0101_010_111_111_100 [TRAPCS]
  9513:   public static void irpSlo () throws M68kException {
  9514:     int ea = XEiJ.regOC & 63;
  9515:     if (ea >> 3 == XEiJ.MMM_AR) {  //DBLO.W Dr,<label>
  9516:       int t = XEiJ.regPC;  //pc0+2
  9517:       XEiJ.regPC = t + 2;  //pc0+4
  9518:       t += mmuReadWordSignExword (t, XEiJ.regSRS);  //pc0+2+16bitディスプレースメント
  9519:       if ((t & 1) != 0) {  //分岐先のアドレスが奇数
  9520:         //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ
  9521:         irpBccAddressError (t);
  9522:       }
  9523:       if (XEiJ.MPU_CC_LO << XEiJ.regCCR < 0) {  //条件が成立しているので通過
  9524:         XEiJ.mpuCycleCount += 2;
  9525:       } else {  //条件が成立していないのでデクリメント
  9526:         int rrr = XEiJ.regOC & 7;
  9527:         int s = XEiJ.regRn[rrr];
  9528:         if ((short) s == 0) {  //Drの下位16bitが0なので通過
  9529:           XEiJ.mpuCycleCount += 2;
  9530:           XEiJ.regRn[rrr] = s + 65535;
  9531:         } else {  //Drの下位16bitが0でないので分岐
  9532:           XEiJ.mpuCycleCount++;
  9533:           XEiJ.regRn[rrr] = s - 1;  //下位16bitが0でないので上位16bitは変化しない
  9534:           irpSetPC (t);
  9535:         }
  9536:       }
  9537:     } else if (ea < XEiJ.EA_AR) {  //SLO.B Dr
  9538:       if (XEiJ.MPU_CC_LO << XEiJ.regCCR < 0) {  //セット
  9539:         XEiJ.mpuCycleCount++;
  9540:         XEiJ.regRn[ea] |= 0xff;
  9541:       } else {  //クリア
  9542:         XEiJ.mpuCycleCount++;
  9543:         XEiJ.regRn[ea] &= ~0xff;
  9544:       }
  9545:     } else if ((XEiJ.EAM_PW | XEiJ.EAM_PX | XEiJ.EAM_IM) << ea < 0L) {  //TRAPLO.W/TRAPLO.L/TRAPLO
  9546:       XEiJ.regPC += (ea & 3) + (ea & 1);  //111_010→2,111_011→4,111_100→0
  9547:       if (XEiJ.MPU_CC_LO << XEiJ.regCCR < 0) {
  9548:         //条件が成立しているのでTRAPする
  9549:         M68kException.m6eAddress = XEiJ.regPC0;  //アドレスは命令の先頭
  9550:         M68kException.m6eNumber = M68kException.M6E_TRAPV_INSTRUCTION;
  9551:         throw M68kException.m6eSignal;
  9552:       } else {
  9553:         //条件が成立していないのでTRAPしない
  9554:         XEiJ.mpuCycleCount++;
  9555:       }
  9556:     } else {  //SLO.B <mem>
  9557:       XEiJ.mpuCycleCount++;
  9558:       mmuWriteByteData (efaMltByte (ea), XEiJ.MPU_CC_LO << XEiJ.regCCR >> 31, XEiJ.regSRS);
  9559:     }
  9560:   }  //irpSlo
  9561: 
  9562:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  9563:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  9564:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  9565:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  9566:   //SNE.B <ea>                                      |-|012346|-|--*--|-----|D M+-WXZ  |0101_011_011_mmm_rrr
  9567:   //SNEQ.B <ea>                                     |A|012346|-|--*--|-----|D M+-WXZ  |0101_011_011_mmm_rrr [SNE.B <ea>]
  9568:   //SNZ.B <ea>                                      |A|012346|-|--*--|-----|D M+-WXZ  |0101_011_011_mmm_rrr [SNE.B <ea>]
  9569:   //SNZE.B <ea>                                     |A|012346|-|--*--|-----|D M+-WXZ  |0101_011_011_mmm_rrr [SNE.B <ea>]
  9570:   //DBNE.W Dr,<label>                               |-|012346|-|--*--|-----|          |0101_011_011_001_rrr-{offset}
  9571:   //DBNEQ.W Dr,<label>                              |A|012346|-|--*--|-----|          |0101_011_011_001_rrr-{offset}        [DBNE.W Dr,<label>]
  9572:   //DBNZ.W Dr,<label>                               |A|012346|-|--*--|-----|          |0101_011_011_001_rrr-{offset}        [DBNE.W Dr,<label>]
  9573:   //DBNZE.W Dr,<label>                              |A|012346|-|--*--|-----|          |0101_011_011_001_rrr-{offset}        [DBNE.W Dr,<label>]
  9574:   //TRAPNE.W #<data>                                |-|--2346|-|--*--|-----|          |0101_011_011_111_010-{data}
  9575:   //TPNE.W #<data>                                  |A|--2346|-|--*--|-----|          |0101_011_011_111_010-{data}  [TRAPNE.W #<data>]
  9576:   //TPNEQ.W #<data>                                 |A|--2346|-|--*--|-----|          |0101_011_011_111_010-{data}  [TRAPNE.W #<data>]
  9577:   //TPNZ.W #<data>                                  |A|--2346|-|--*--|-----|          |0101_011_011_111_010-{data}  [TRAPNE.W #<data>]
  9578:   //TPNZE.W #<data>                                 |A|--2346|-|--*--|-----|          |0101_011_011_111_010-{data}  [TRAPNE.W #<data>]
  9579:   //TRAPNEQ.W #<data>                               |A|--2346|-|--*--|-----|          |0101_011_011_111_010-{data}  [TRAPNE.W #<data>]
  9580:   //TRAPNZ.W #<data>                                |A|--2346|-|--*--|-----|          |0101_011_011_111_010-{data}  [TRAPNE.W #<data>]
  9581:   //TRAPNZE.W #<data>                               |A|--2346|-|--*--|-----|          |0101_011_011_111_010-{data}  [TRAPNE.W #<data>]
  9582:   //TRAPNE.L #<data>                                |-|--2346|-|--*--|-----|          |0101_011_011_111_011-{data}
  9583:   //TPNE.L #<data>                                  |A|--2346|-|--*--|-----|          |0101_011_011_111_011-{data}  [TRAPNE.L #<data>]
  9584:   //TPNEQ.L #<data>                                 |A|--2346|-|--*--|-----|          |0101_011_011_111_011-{data}  [TRAPNE.L #<data>]
  9585:   //TPNZ.L #<data>                                  |A|--2346|-|--*--|-----|          |0101_011_011_111_011-{data}  [TRAPNE.L #<data>]
  9586:   //TPNZE.L #<data>                                 |A|--2346|-|--*--|-----|          |0101_011_011_111_011-{data}  [TRAPNE.L #<data>]
  9587:   //TRAPNEQ.L #<data>                               |A|--2346|-|--*--|-----|          |0101_011_011_111_011-{data}  [TRAPNE.L #<data>]
  9588:   //TRAPNZ.L #<data>                                |A|--2346|-|--*--|-----|          |0101_011_011_111_011-{data}  [TRAPNE.L #<data>]
  9589:   //TRAPNZE.L #<data>                               |A|--2346|-|--*--|-----|          |0101_011_011_111_011-{data}  [TRAPNE.L #<data>]
  9590:   //TRAPNE                                          |-|--2346|-|--*--|-----|          |0101_011_011_111_100
  9591:   //TPNE                                            |A|--2346|-|--*--|-----|          |0101_011_011_111_100 [TRAPNE]
  9592:   //TPNEQ                                           |A|--2346|-|--*--|-----|          |0101_011_011_111_100 [TRAPNE]
  9593:   //TPNZ                                            |A|--2346|-|--*--|-----|          |0101_011_011_111_100 [TRAPNE]
  9594:   //TPNZE                                           |A|--2346|-|--*--|-----|          |0101_011_011_111_100 [TRAPNE]
  9595:   //TRAPNEQ                                         |A|--2346|-|--*--|-----|          |0101_011_011_111_100 [TRAPNE]
  9596:   //TRAPNZ                                          |A|--2346|-|--*--|-----|          |0101_011_011_111_100 [TRAPNE]
  9597:   //TRAPNZE                                         |A|--2346|-|--*--|-----|          |0101_011_011_111_100 [TRAPNE]
  9598:   public static void irpSne () throws M68kException {
  9599:     int ea = XEiJ.regOC & 63;
  9600:     if (ea >> 3 == XEiJ.MMM_AR) {  //DBNE.W Dr,<label>
  9601:       int t = XEiJ.regPC;  //pc0+2
  9602:       XEiJ.regPC = t + 2;  //pc0+4
  9603:       t += mmuReadWordSignExword (t, XEiJ.regSRS);  //pc0+2+16bitディスプレースメント
  9604:       if ((t & 1) != 0) {  //分岐先のアドレスが奇数
  9605:         //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ
  9606:         irpBccAddressError (t);
  9607:       }
  9608:       if (XEiJ.MPU_CC_NE << XEiJ.regCCR < 0) {  //条件が成立しているので通過
  9609:         XEiJ.mpuCycleCount += 2;
  9610:       } else {  //条件が成立していないのでデクリメント
  9611:         int rrr = XEiJ.regOC & 7;
  9612:         int s = XEiJ.regRn[rrr];
  9613:         if ((short) s == 0) {  //Drの下位16bitが0なので通過
  9614:           XEiJ.mpuCycleCount += 2;
  9615:           XEiJ.regRn[rrr] = s + 65535;
  9616:         } else {  //Drの下位16bitが0でないので分岐
  9617:           XEiJ.mpuCycleCount++;
  9618:           XEiJ.regRn[rrr] = s - 1;  //下位16bitが0でないので上位16bitは変化しない
  9619:           irpSetPC (t);
  9620:         }
  9621:       }
  9622:     } else if (ea < XEiJ.EA_AR) {  //SNE.B Dr
  9623:       if (XEiJ.MPU_CC_NE << XEiJ.regCCR < 0) {  //セット
  9624:         XEiJ.mpuCycleCount++;
  9625:         XEiJ.regRn[ea] |= 0xff;
  9626:       } else {  //クリア
  9627:         XEiJ.mpuCycleCount++;
  9628:         XEiJ.regRn[ea] &= ~0xff;
  9629:       }
  9630:     } else if ((XEiJ.EAM_PW | XEiJ.EAM_PX | XEiJ.EAM_IM) << ea < 0L) {  //TRAPNE.W/TRAPNE.L/TRAPNE
  9631:       XEiJ.regPC += (ea & 3) + (ea & 1);  //111_010→2,111_011→4,111_100→0
  9632:       if (XEiJ.MPU_CC_NE << XEiJ.regCCR < 0) {
  9633:         //条件が成立しているのでTRAPする
  9634:         M68kException.m6eAddress = XEiJ.regPC0;  //アドレスは命令の先頭
  9635:         M68kException.m6eNumber = M68kException.M6E_TRAPV_INSTRUCTION;
  9636:         throw M68kException.m6eSignal;
  9637:       } else {
  9638:         //条件が成立していないのでTRAPしない
  9639:         XEiJ.mpuCycleCount++;
  9640:       }
  9641:     } else {  //SNE.B <mem>
  9642:       XEiJ.mpuCycleCount++;
  9643:       mmuWriteByteData (efaMltByte (ea), XEiJ.MPU_CC_NE << XEiJ.regCCR >> 31, XEiJ.regSRS);
  9644:     }
  9645:   }  //irpSne
  9646: 
  9647:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  9648:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  9649:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  9650:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  9651:   //SEQ.B <ea>                                      |-|012346|-|--*--|-----|D M+-WXZ  |0101_011_111_mmm_rrr
  9652:   //SNNE.B <ea>                                     |A|012346|-|--*--|-----|D M+-WXZ  |0101_011_111_mmm_rrr [SEQ.B <ea>]
  9653:   //SNNZ.B <ea>                                     |A|012346|-|--*--|-----|D M+-WXZ  |0101_011_111_mmm_rrr [SEQ.B <ea>]
  9654:   //SZE.B <ea>                                      |A|012346|-|--*--|-----|D M+-WXZ  |0101_011_111_mmm_rrr [SEQ.B <ea>]
  9655:   //DBEQ.W Dr,<label>                               |-|012346|-|--*--|-----|          |0101_011_111_001_rrr-{offset}
  9656:   //DBNNE.W Dr,<label>                              |A|012346|-|--*--|-----|          |0101_011_111_001_rrr-{offset}        [DBEQ.W Dr,<label>]
  9657:   //DBNNZ.W Dr,<label>                              |A|012346|-|--*--|-----|          |0101_011_111_001_rrr-{offset}        [DBEQ.W Dr,<label>]
  9658:   //DBZE.W Dr,<label>                               |A|012346|-|--*--|-----|          |0101_011_111_001_rrr-{offset}        [DBEQ.W Dr,<label>]
  9659:   //TRAPEQ.W #<data>                                |-|--2346|-|--*--|-----|          |0101_011_111_111_010-{data}
  9660:   //TPEQ.W #<data>                                  |A|--2346|-|--*--|-----|          |0101_011_111_111_010-{data}  [TRAPEQ.W #<data>]
  9661:   //TPNNE.W #<data>                                 |A|--2346|-|--*--|-----|          |0101_011_111_111_010-{data}  [TRAPEQ.W #<data>]
  9662:   //TPNNZ.W #<data>                                 |A|--2346|-|--*--|-----|          |0101_011_111_111_010-{data}  [TRAPEQ.W #<data>]
  9663:   //TPZE.W #<data>                                  |A|--2346|-|--*--|-----|          |0101_011_111_111_010-{data}  [TRAPEQ.W #<data>]
  9664:   //TRAPNNE.W #<data>                               |A|--2346|-|--*--|-----|          |0101_011_111_111_010-{data}  [TRAPEQ.W #<data>]
  9665:   //TRAPNNZ.W #<data>                               |A|--2346|-|--*--|-----|          |0101_011_111_111_010-{data}  [TRAPEQ.W #<data>]
  9666:   //TRAPZE.W #<data>                                |A|--2346|-|--*--|-----|          |0101_011_111_111_010-{data}  [TRAPEQ.W #<data>]
  9667:   //TRAPEQ.L #<data>                                |-|--2346|-|--*--|-----|          |0101_011_111_111_011-{data}
  9668:   //TPEQ.L #<data>                                  |A|--2346|-|--*--|-----|          |0101_011_111_111_011-{data}  [TRAPEQ.L #<data>]
  9669:   //TPNNE.L #<data>                                 |A|--2346|-|--*--|-----|          |0101_011_111_111_011-{data}  [TRAPEQ.L #<data>]
  9670:   //TPNNZ.L #<data>                                 |A|--2346|-|--*--|-----|          |0101_011_111_111_011-{data}  [TRAPEQ.L #<data>]
  9671:   //TPZE.L #<data>                                  |A|--2346|-|--*--|-----|          |0101_011_111_111_011-{data}  [TRAPEQ.L #<data>]
  9672:   //TRAPNNE.L #<data>                               |A|--2346|-|--*--|-----|          |0101_011_111_111_011-{data}  [TRAPEQ.L #<data>]
  9673:   //TRAPNNZ.L #<data>                               |A|--2346|-|--*--|-----|          |0101_011_111_111_011-{data}  [TRAPEQ.L #<data>]
  9674:   //TRAPZE.L #<data>                                |A|--2346|-|--*--|-----|          |0101_011_111_111_011-{data}  [TRAPEQ.L #<data>]
  9675:   //TRAPEQ                                          |-|--2346|-|--*--|-----|          |0101_011_111_111_100
  9676:   //TPEQ                                            |A|--2346|-|--*--|-----|          |0101_011_111_111_100 [TRAPEQ]
  9677:   //TPNNE                                           |A|--2346|-|--*--|-----|          |0101_011_111_111_100 [TRAPEQ]
  9678:   //TPNNZ                                           |A|--2346|-|--*--|-----|          |0101_011_111_111_100 [TRAPEQ]
  9679:   //TPZE                                            |A|--2346|-|--*--|-----|          |0101_011_111_111_100 [TRAPEQ]
  9680:   //TRAPNNE                                         |A|--2346|-|--*--|-----|          |0101_011_111_111_100 [TRAPEQ]
  9681:   //TRAPNNZ                                         |A|--2346|-|--*--|-----|          |0101_011_111_111_100 [TRAPEQ]
  9682:   //TRAPZE                                          |A|--2346|-|--*--|-----|          |0101_011_111_111_100 [TRAPEQ]
  9683:   public static void irpSeq () throws M68kException {
  9684:     int ea = XEiJ.regOC & 63;
  9685:     if (ea >> 3 == XEiJ.MMM_AR) {  //DBEQ.W Dr,<label>
  9686:       int t = XEiJ.regPC;  //pc0+2
  9687:       XEiJ.regPC = t + 2;  //pc0+4
  9688:       t += mmuReadWordSignExword (t, XEiJ.regSRS);  //pc0+2+16bitディスプレースメント
  9689:       if ((t & 1) != 0) {  //分岐先のアドレスが奇数
  9690:         //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ
  9691:         irpBccAddressError (t);
  9692:       }
  9693:       if (XEiJ.MPU_CC_EQ << XEiJ.regCCR < 0) {  //条件が成立しているので通過
  9694:         XEiJ.mpuCycleCount += 2;
  9695:       } else {  //条件が成立していないのでデクリメント
  9696:         int rrr = XEiJ.regOC & 7;
  9697:         int s = XEiJ.regRn[rrr];
  9698:         if ((short) s == 0) {  //Drの下位16bitが0なので通過
  9699:           XEiJ.mpuCycleCount += 2;
  9700:           XEiJ.regRn[rrr] = s + 65535;
  9701:         } else {  //Drの下位16bitが0でないので分岐
  9702:           XEiJ.mpuCycleCount++;
  9703:           XEiJ.regRn[rrr] = s - 1;  //下位16bitが0でないので上位16bitは変化しない
  9704:           irpSetPC (t);
  9705:         }
  9706:       }
  9707:     } else if (ea < XEiJ.EA_AR) {  //SEQ.B Dr
  9708:       if (XEiJ.MPU_CC_EQ << XEiJ.regCCR < 0) {  //セット
  9709:         XEiJ.mpuCycleCount++;
  9710:         XEiJ.regRn[ea] |= 0xff;
  9711:       } else {  //クリア
  9712:         XEiJ.mpuCycleCount++;
  9713:         XEiJ.regRn[ea] &= ~0xff;
  9714:       }
  9715:     } else if ((XEiJ.EAM_PW | XEiJ.EAM_PX | XEiJ.EAM_IM) << ea < 0L) {  //TRAPEQ.W/TRAPEQ.L/TRAPEQ
  9716:       XEiJ.regPC += (ea & 3) + (ea & 1);  //111_010→2,111_011→4,111_100→0
  9717:       if (XEiJ.MPU_CC_EQ << XEiJ.regCCR < 0) {
  9718:         //条件が成立しているのでTRAPする
  9719:         M68kException.m6eAddress = XEiJ.regPC0;  //アドレスは命令の先頭
  9720:         M68kException.m6eNumber = M68kException.M6E_TRAPV_INSTRUCTION;
  9721:         throw M68kException.m6eSignal;
  9722:       } else {
  9723:         //条件が成立していないのでTRAPしない
  9724:         XEiJ.mpuCycleCount++;
  9725:       }
  9726:     } else {  //SEQ.B <mem>
  9727:       XEiJ.mpuCycleCount++;
  9728:       mmuWriteByteData (efaMltByte (ea), XEiJ.MPU_CC_EQ << XEiJ.regCCR >> 31, XEiJ.regSRS);
  9729:     }
  9730:   }  //irpSeq
  9731: 
  9732:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  9733:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  9734:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  9735:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  9736:   //SVC.B <ea>                                      |-|012346|-|---*-|-----|D M+-WXZ  |0101_100_011_mmm_rrr
  9737:   //SNVS.B <ea>                                     |A|012346|-|---*-|-----|D M+-WXZ  |0101_100_011_mmm_rrr [SVC.B <ea>]
  9738:   //DBVC.W Dr,<label>                               |-|012346|-|---*-|-----|          |0101_100_011_001_rrr-{offset}
  9739:   //DBNVS.W Dr,<label>                              |A|012346|-|---*-|-----|          |0101_100_011_001_rrr-{offset}        [DBVC.W Dr,<label>]
  9740:   //TRAPVC.W #<data>                                |-|--2346|-|---*-|-----|          |0101_100_011_111_010-{data}
  9741:   //TPNVS.W #<data>                                 |A|--2346|-|---*-|-----|          |0101_100_011_111_010-{data}  [TRAPVC.W #<data>]
  9742:   //TPVC.W #<data>                                  |A|--2346|-|---*-|-----|          |0101_100_011_111_010-{data}  [TRAPVC.W #<data>]
  9743:   //TRAPNVS.W #<data>                               |A|--2346|-|---*-|-----|          |0101_100_011_111_010-{data}  [TRAPVC.W #<data>]
  9744:   //TRAPVC.L #<data>                                |-|--2346|-|---*-|-----|          |0101_100_011_111_011-{data}
  9745:   //TPNVS.L #<data>                                 |A|--2346|-|---*-|-----|          |0101_100_011_111_011-{data}  [TRAPVC.L #<data>]
  9746:   //TPVC.L #<data>                                  |A|--2346|-|---*-|-----|          |0101_100_011_111_011-{data}  [TRAPVC.L #<data>]
  9747:   //TRAPNVS.L #<data>                               |A|--2346|-|---*-|-----|          |0101_100_011_111_011-{data}  [TRAPVC.L #<data>]
  9748:   //TRAPVC                                          |-|--2346|-|---*-|-----|          |0101_100_011_111_100
  9749:   //TPNVS                                           |A|--2346|-|---*-|-----|          |0101_100_011_111_100 [TRAPVC]
  9750:   //TPVC                                            |A|--2346|-|---*-|-----|          |0101_100_011_111_100 [TRAPVC]
  9751:   //TRAPNVS                                         |A|--2346|-|---*-|-----|          |0101_100_011_111_100 [TRAPVC]
  9752:   public static void irpSvc () throws M68kException {
  9753:     int ea = XEiJ.regOC & 63;
  9754:     if (ea >> 3 == XEiJ.MMM_AR) {  //DBVC.W Dr,<label>
  9755:       int t = XEiJ.regPC;  //pc0+2
  9756:       XEiJ.regPC = t + 2;  //pc0+4
  9757:       t += mmuReadWordSignExword (t, XEiJ.regSRS);  //pc0+2+16bitディスプレースメント
  9758:       if ((t & 1) != 0) {  //分岐先のアドレスが奇数
  9759:         //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ
  9760:         irpBccAddressError (t);
  9761:       }
  9762:       if (XEiJ.MPU_CC_VC << XEiJ.regCCR < 0) {  //条件が成立しているので通過
  9763:         XEiJ.mpuCycleCount += 2;
  9764:       } else {  //条件が成立していないのでデクリメント
  9765:         int rrr = XEiJ.regOC & 7;
  9766:         int s = XEiJ.regRn[rrr];
  9767:         if ((short) s == 0) {  //Drの下位16bitが0なので通過
  9768:           XEiJ.mpuCycleCount += 2;
  9769:           XEiJ.regRn[rrr] = s + 65535;
  9770:         } else {  //Drの下位16bitが0でないので分岐
  9771:           XEiJ.mpuCycleCount++;
  9772:           XEiJ.regRn[rrr] = s - 1;  //下位16bitが0でないので上位16bitは変化しない
  9773:           irpSetPC (t);
  9774:         }
  9775:       }
  9776:     } else if (ea < XEiJ.EA_AR) {  //SVC.B Dr
  9777:       if (XEiJ.MPU_CC_VC << XEiJ.regCCR < 0) {  //セット
  9778:         XEiJ.mpuCycleCount++;
  9779:         XEiJ.regRn[ea] |= 0xff;
  9780:       } else {  //クリア
  9781:         XEiJ.mpuCycleCount++;
  9782:         XEiJ.regRn[ea] &= ~0xff;
  9783:       }
  9784:     } else if ((XEiJ.EAM_PW | XEiJ.EAM_PX | XEiJ.EAM_IM) << ea < 0L) {  //TRAPVC.W/TRAPVC.L/TRAPVC
  9785:       XEiJ.regPC += (ea & 3) + (ea & 1);  //111_010→2,111_011→4,111_100→0
  9786:       if (XEiJ.MPU_CC_VC << XEiJ.regCCR < 0) {
  9787:         //条件が成立しているのでTRAPする
  9788:         M68kException.m6eAddress = XEiJ.regPC0;  //アドレスは命令の先頭
  9789:         M68kException.m6eNumber = M68kException.M6E_TRAPV_INSTRUCTION;
  9790:         throw M68kException.m6eSignal;
  9791:       } else {
  9792:         //条件が成立していないのでTRAPしない
  9793:         XEiJ.mpuCycleCount++;
  9794:       }
  9795:     } else {  //SVC.B <mem>
  9796:       XEiJ.mpuCycleCount++;
  9797:       mmuWriteByteData (efaMltByte (ea), XEiJ.MPU_CC_VC << XEiJ.regCCR >> 31, XEiJ.regSRS);
  9798:     }
  9799:   }  //irpSvc
  9800: 
  9801:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  9802:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  9803:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  9804:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  9805:   //SVS.B <ea>                                      |-|012346|-|---*-|-----|D M+-WXZ  |0101_100_111_mmm_rrr
  9806:   //SNVC.B <ea>                                     |A|012346|-|---*-|-----|D M+-WXZ  |0101_100_111_mmm_rrr [SVS.B <ea>]
  9807:   //DBVS.W Dr,<label>                               |-|012346|-|---*-|-----|          |0101_100_111_001_rrr-{offset}
  9808:   //DBNVC.W Dr,<label>                              |A|012346|-|---*-|-----|          |0101_100_111_001_rrr-{offset}        [DBVS.W Dr,<label>]
  9809:   //TRAPVS.W #<data>                                |-|--2346|-|---*-|-----|          |0101_100_111_111_010-{data}
  9810:   //TPNVC.W #<data>                                 |A|--2346|-|---*-|-----|          |0101_100_111_111_010-{data}  [TRAPVS.W #<data>]
  9811:   //TPVS.W #<data>                                  |A|--2346|-|---*-|-----|          |0101_100_111_111_010-{data}  [TRAPVS.W #<data>]
  9812:   //TRAPNVC.W #<data>                               |A|--2346|-|---*-|-----|          |0101_100_111_111_010-{data}  [TRAPVS.W #<data>]
  9813:   //TRAPVS.L #<data>                                |-|--2346|-|---*-|-----|          |0101_100_111_111_011-{data}
  9814:   //TPNVC.L #<data>                                 |A|--2346|-|---*-|-----|          |0101_100_111_111_011-{data}  [TRAPVS.L #<data>]
  9815:   //TPVS.L #<data>                                  |A|--2346|-|---*-|-----|          |0101_100_111_111_011-{data}  [TRAPVS.L #<data>]
  9816:   //TRAPNVC.L #<data>                               |A|--2346|-|---*-|-----|          |0101_100_111_111_011-{data}  [TRAPVS.L #<data>]
  9817:   //TRAPVS                                          |-|--2346|-|---*-|-----|          |0101_100_111_111_100
  9818:   //TPNVC                                           |A|--2346|-|---*-|-----|          |0101_100_111_111_100 [TRAPVS]
  9819:   //TPVS                                            |A|--2346|-|---*-|-----|          |0101_100_111_111_100 [TRAPVS]
  9820:   //TRAPNVC                                         |A|--2346|-|---*-|-----|          |0101_100_111_111_100 [TRAPVS]
  9821:   public static void irpSvs () throws M68kException {
  9822:     int ea = XEiJ.regOC & 63;
  9823:     if (ea >> 3 == XEiJ.MMM_AR) {  //DBVS.W Dr,<label>
  9824:       int t = XEiJ.regPC;  //pc0+2
  9825:       XEiJ.regPC = t + 2;  //pc0+4
  9826:       t += mmuReadWordSignExword (t, XEiJ.regSRS);  //pc0+2+16bitディスプレースメント
  9827:       if ((t & 1) != 0) {  //分岐先のアドレスが奇数
  9828:         //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ
  9829:         irpBccAddressError (t);
  9830:       }
  9831:       if (XEiJ.MPU_CC_VS << XEiJ.regCCR < 0) {  //条件が成立しているので通過
  9832:         XEiJ.mpuCycleCount += 2;
  9833:       } else {  //条件が成立していないのでデクリメント
  9834:         int rrr = XEiJ.regOC & 7;
  9835:         int s = XEiJ.regRn[rrr];
  9836:         if ((short) s == 0) {  //Drの下位16bitが0なので通過
  9837:           XEiJ.mpuCycleCount += 2;
  9838:           XEiJ.regRn[rrr] = s + 65535;
  9839:         } else {  //Drの下位16bitが0でないので分岐
  9840:           XEiJ.mpuCycleCount++;
  9841:           XEiJ.regRn[rrr] = s - 1;  //下位16bitが0でないので上位16bitは変化しない
  9842:           irpSetPC (t);
  9843:         }
  9844:       }
  9845:     } else if (ea < XEiJ.EA_AR) {  //SVS.B Dr
  9846:       if (XEiJ.MPU_CC_VS << XEiJ.regCCR < 0) {  //セット
  9847:         XEiJ.mpuCycleCount++;
  9848:         XEiJ.regRn[ea] |= 0xff;
  9849:       } else {  //クリア
  9850:         XEiJ.mpuCycleCount++;
  9851:         XEiJ.regRn[ea] &= ~0xff;
  9852:       }
  9853:     } else if ((XEiJ.EAM_PW | XEiJ.EAM_PX | XEiJ.EAM_IM) << ea < 0L) {  //TRAPVS.W/TRAPVS.L/TRAPVS
  9854:       XEiJ.regPC += (ea & 3) + (ea & 1);  //111_010→2,111_011→4,111_100→0
  9855:       if (XEiJ.MPU_CC_VS << XEiJ.regCCR < 0) {
  9856:         //条件が成立しているのでTRAPする
  9857:         M68kException.m6eAddress = XEiJ.regPC0;  //アドレスは命令の先頭
  9858:         M68kException.m6eNumber = M68kException.M6E_TRAPV_INSTRUCTION;
  9859:         throw M68kException.m6eSignal;
  9860:       } else {
  9861:         //条件が成立していないのでTRAPしない
  9862:         XEiJ.mpuCycleCount++;
  9863:       }
  9864:     } else {  //SVS.B <mem>
  9865:       XEiJ.mpuCycleCount++;
  9866:       mmuWriteByteData (efaMltByte (ea), XEiJ.MPU_CC_VS << XEiJ.regCCR >> 31, XEiJ.regSRS);
  9867:     }
  9868:   }  //irpSvs
  9869: 
  9870:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  9871:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  9872:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  9873:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  9874:   //SPL.B <ea>                                      |-|012346|-|-*---|-----|D M+-WXZ  |0101_101_011_mmm_rrr
  9875:   //SNMI.B <ea>                                     |A|012346|-|-*---|-----|D M+-WXZ  |0101_101_011_mmm_rrr [SPL.B <ea>]
  9876:   //DBPL.W Dr,<label>                               |-|012346|-|-*---|-----|          |0101_101_011_001_rrr-{offset}
  9877:   //DBNMI.W Dr,<label>                              |A|012346|-|-*---|-----|          |0101_101_011_001_rrr-{offset}        [DBPL.W Dr,<label>]
  9878:   //TRAPPL.W #<data>                                |-|--2346|-|-*---|-----|          |0101_101_011_111_010-{data}
  9879:   //TPNMI.W #<data>                                 |A|--2346|-|-*---|-----|          |0101_101_011_111_010-{data}  [TRAPPL.W #<data>]
  9880:   //TPPL.W #<data>                                  |A|--2346|-|-*---|-----|          |0101_101_011_111_010-{data}  [TRAPPL.W #<data>]
  9881:   //TRAPNMI.W #<data>                               |A|--2346|-|-*---|-----|          |0101_101_011_111_010-{data}  [TRAPPL.W #<data>]
  9882:   //TRAPPL.L #<data>                                |-|--2346|-|-*---|-----|          |0101_101_011_111_011-{data}
  9883:   //TPNMI.L #<data>                                 |A|--2346|-|-*---|-----|          |0101_101_011_111_011-{data}  [TRAPPL.L #<data>]
  9884:   //TPPL.L #<data>                                  |A|--2346|-|-*---|-----|          |0101_101_011_111_011-{data}  [TRAPPL.L #<data>]
  9885:   //TRAPNMI.L #<data>                               |A|--2346|-|-*---|-----|          |0101_101_011_111_011-{data}  [TRAPPL.L #<data>]
  9886:   //TRAPPL                                          |-|--2346|-|-*---|-----|          |0101_101_011_111_100
  9887:   //TPNMI                                           |A|--2346|-|-*---|-----|          |0101_101_011_111_100 [TRAPPL]
  9888:   //TPPL                                            |A|--2346|-|-*---|-----|          |0101_101_011_111_100 [TRAPPL]
  9889:   //TRAPNMI                                         |A|--2346|-|-*---|-----|          |0101_101_011_111_100 [TRAPPL]
  9890:   public static void irpSpl () throws M68kException {
  9891:     int ea = XEiJ.regOC & 63;
  9892:     if (ea >> 3 == XEiJ.MMM_AR) {  //DBPL.W Dr,<label>
  9893:       int t = XEiJ.regPC;  //pc0+2
  9894:       XEiJ.regPC = t + 2;  //pc0+4
  9895:       t += mmuReadWordSignExword (t, XEiJ.regSRS);  //pc0+2+16bitディスプレースメント
  9896:       if ((t & 1) != 0) {  //分岐先のアドレスが奇数
  9897:         //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ
  9898:         irpBccAddressError (t);
  9899:       }
  9900:       if (XEiJ.MPU_CC_PL << XEiJ.regCCR < 0) {  //条件が成立しているので通過
  9901:         XEiJ.mpuCycleCount += 2;
  9902:       } else {  //条件が成立していないのでデクリメント
  9903:         int rrr = XEiJ.regOC & 7;
  9904:         int s = XEiJ.regRn[rrr];
  9905:         if ((short) s == 0) {  //Drの下位16bitが0なので通過
  9906:           XEiJ.mpuCycleCount += 2;
  9907:           XEiJ.regRn[rrr] = s + 65535;
  9908:         } else {  //Drの下位16bitが0でないので分岐
  9909:           XEiJ.mpuCycleCount++;
  9910:           XEiJ.regRn[rrr] = s - 1;  //下位16bitが0でないので上位16bitは変化しない
  9911:           irpSetPC (t);
  9912:         }
  9913:       }
  9914:     } else if (ea < XEiJ.EA_AR) {  //SPL.B Dr
  9915:       if (XEiJ.MPU_CC_PL << XEiJ.regCCR < 0) {  //セット
  9916:         XEiJ.mpuCycleCount++;
  9917:         XEiJ.regRn[ea] |= 0xff;
  9918:       } else {  //クリア
  9919:         XEiJ.mpuCycleCount++;
  9920:         XEiJ.regRn[ea] &= ~0xff;
  9921:       }
  9922:     } else if ((XEiJ.EAM_PW | XEiJ.EAM_PX | XEiJ.EAM_IM) << ea < 0L) {  //TRAPPL.W/TRAPPL.L/TRAPPL
  9923:       XEiJ.regPC += (ea & 3) + (ea & 1);  //111_010→2,111_011→4,111_100→0
  9924:       if (XEiJ.MPU_CC_PL << XEiJ.regCCR < 0) {
  9925:         //条件が成立しているのでTRAPする
  9926:         M68kException.m6eAddress = XEiJ.regPC0;  //アドレスは命令の先頭
  9927:         M68kException.m6eNumber = M68kException.M6E_TRAPV_INSTRUCTION;
  9928:         throw M68kException.m6eSignal;
  9929:       } else {
  9930:         //条件が成立していないのでTRAPしない
  9931:         XEiJ.mpuCycleCount++;
  9932:       }
  9933:     } else {  //SPL.B <mem>
  9934:       XEiJ.mpuCycleCount++;
  9935:       mmuWriteByteData (efaMltByte (ea), XEiJ.MPU_CC_PL << XEiJ.regCCR >> 31, XEiJ.regSRS);
  9936:     }
  9937:   }  //irpSpl
  9938: 
  9939:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  9940:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  9941:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  9942:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  9943:   //SMI.B <ea>                                      |-|012346|-|-*---|-----|D M+-WXZ  |0101_101_111_mmm_rrr
  9944:   //SNPL.B <ea>                                     |A|012346|-|-*---|-----|D M+-WXZ  |0101_101_111_mmm_rrr [SMI.B <ea>]
  9945:   //DBMI.W Dr,<label>                               |-|012346|-|-*---|-----|          |0101_101_111_001_rrr-{offset}
  9946:   //DBNPL.W Dr,<label>                              |A|012346|-|-*---|-----|          |0101_101_111_001_rrr-{offset}        [DBMI.W Dr,<label>]
  9947:   //TRAPMI.W #<data>                                |-|--2346|-|-*---|-----|          |0101_101_111_111_010-{data}
  9948:   //TPMI.W #<data>                                  |A|--2346|-|-*---|-----|          |0101_101_111_111_010-{data}  [TRAPMI.W #<data>]
  9949:   //TPNPL.W #<data>                                 |A|--2346|-|-*---|-----|          |0101_101_111_111_010-{data}  [TRAPMI.W #<data>]
  9950:   //TRAPNPL.W #<data>                               |A|--2346|-|-*---|-----|          |0101_101_111_111_010-{data}  [TRAPMI.W #<data>]
  9951:   //TRAPMI.L #<data>                                |-|--2346|-|-*---|-----|          |0101_101_111_111_011-{data}
  9952:   //TPMI.L #<data>                                  |A|--2346|-|-*---|-----|          |0101_101_111_111_011-{data}  [TRAPMI.L #<data>]
  9953:   //TPNPL.L #<data>                                 |A|--2346|-|-*---|-----|          |0101_101_111_111_011-{data}  [TRAPMI.L #<data>]
  9954:   //TRAPNPL.L #<data>                               |A|--2346|-|-*---|-----|          |0101_101_111_111_011-{data}  [TRAPMI.L #<data>]
  9955:   //TRAPMI                                          |-|--2346|-|-*---|-----|          |0101_101_111_111_100
  9956:   //TPMI                                            |A|--2346|-|-*---|-----|          |0101_101_111_111_100 [TRAPMI]
  9957:   //TPNPL                                           |A|--2346|-|-*---|-----|          |0101_101_111_111_100 [TRAPMI]
  9958:   //TRAPNPL                                         |A|--2346|-|-*---|-----|          |0101_101_111_111_100 [TRAPMI]
  9959:   public static void irpSmi () throws M68kException {
  9960:     int ea = XEiJ.regOC & 63;
  9961:     if (ea >> 3 == XEiJ.MMM_AR) {  //DBMI.W Dr,<label>
  9962:       int t = XEiJ.regPC;  //pc0+2
  9963:       XEiJ.regPC = t + 2;  //pc0+4
  9964:       t += mmuReadWordSignExword (t, XEiJ.regSRS);  //pc0+2+16bitディスプレースメント
  9965:       if ((t & 1) != 0) {  //分岐先のアドレスが奇数
  9966:         //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ
  9967:         irpBccAddressError (t);
  9968:       }
  9969:       if (XEiJ.MPU_CC_MI << XEiJ.regCCR < 0) {  //条件が成立しているので通過
  9970:         XEiJ.mpuCycleCount += 2;
  9971:       } else {  //条件が成立していないのでデクリメント
  9972:         int rrr = XEiJ.regOC & 7;
  9973:         int s = XEiJ.regRn[rrr];
  9974:         if ((short) s == 0) {  //Drの下位16bitが0なので通過
  9975:           XEiJ.mpuCycleCount += 2;
  9976:           XEiJ.regRn[rrr] = s + 65535;
  9977:         } else {  //Drの下位16bitが0でないので分岐
  9978:           XEiJ.mpuCycleCount++;
  9979:           XEiJ.regRn[rrr] = s - 1;  //下位16bitが0でないので上位16bitは変化しない
  9980:           irpSetPC (t);
  9981:         }
  9982:       }
  9983:     } else if (ea < XEiJ.EA_AR) {  //SMI.B Dr
  9984:       if (XEiJ.MPU_CC_MI << XEiJ.regCCR < 0) {  //セット
  9985:         XEiJ.mpuCycleCount++;
  9986:         XEiJ.regRn[ea] |= 0xff;
  9987:       } else {  //クリア
  9988:         XEiJ.mpuCycleCount++;
  9989:         XEiJ.regRn[ea] &= ~0xff;
  9990:       }
  9991:     } else if ((XEiJ.EAM_PW | XEiJ.EAM_PX | XEiJ.EAM_IM) << ea < 0L) {  //TRAPMI.W/TRAPMI.L/TRAPMI
  9992:       XEiJ.regPC += (ea & 3) + (ea & 1);  //111_010→2,111_011→4,111_100→0
  9993:       if (XEiJ.MPU_CC_MI << XEiJ.regCCR < 0) {
  9994:         //条件が成立しているのでTRAPする
  9995:         M68kException.m6eAddress = XEiJ.regPC0;  //アドレスは命令の先頭
  9996:         M68kException.m6eNumber = M68kException.M6E_TRAPV_INSTRUCTION;
  9997:         throw M68kException.m6eSignal;
  9998:       } else {
  9999:         //条件が成立していないのでTRAPしない
 10000:         XEiJ.mpuCycleCount++;
 10001:       }
 10002:     } else {  //SMI.B <mem>
 10003:       XEiJ.mpuCycleCount++;
 10004:       mmuWriteByteData (efaMltByte (ea), XEiJ.MPU_CC_MI << XEiJ.regCCR >> 31, XEiJ.regSRS);
 10005:     }
 10006:   }  //irpSmi
 10007: 
 10008:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10009:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 10010:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 10011:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10012:   //SGE.B <ea>                                      |-|012346|-|-*-*-|-----|D M+-WXZ  |0101_110_011_mmm_rrr
 10013:   //SNLT.B <ea>                                     |A|012346|-|-*-*-|-----|D M+-WXZ  |0101_110_011_mmm_rrr [SGE.B <ea>]
 10014:   //DBGE.W Dr,<label>                               |-|012346|-|-*-*-|-----|          |0101_110_011_001_rrr-{offset}
 10015:   //DBNLT.W Dr,<label>                              |A|012346|-|-*-*-|-----|          |0101_110_011_001_rrr-{offset}        [DBGE.W Dr,<label>]
 10016:   //TRAPGE.W #<data>                                |-|--2346|-|-*-*-|-----|          |0101_110_011_111_010-{data}
 10017:   //TPGE.W #<data>                                  |A|--2346|-|-*-*-|-----|          |0101_110_011_111_010-{data}  [TRAPGE.W #<data>]
 10018:   //TPNLT.W #<data>                                 |A|--2346|-|-*-*-|-----|          |0101_110_011_111_010-{data}  [TRAPGE.W #<data>]
 10019:   //TRAPNLT.W #<data>                               |A|--2346|-|-*-*-|-----|          |0101_110_011_111_010-{data}  [TRAPGE.W #<data>]
 10020:   //TRAPGE.L #<data>                                |-|--2346|-|-*-*-|-----|          |0101_110_011_111_011-{data}
 10021:   //TPGE.L #<data>                                  |A|--2346|-|-*-*-|-----|          |0101_110_011_111_011-{data}  [TRAPGE.L #<data>]
 10022:   //TPNLT.L #<data>                                 |A|--2346|-|-*-*-|-----|          |0101_110_011_111_011-{data}  [TRAPGE.L #<data>]
 10023:   //TRAPNLT.L #<data>                               |A|--2346|-|-*-*-|-----|          |0101_110_011_111_011-{data}  [TRAPGE.L #<data>]
 10024:   //TRAPGE                                          |-|--2346|-|-*-*-|-----|          |0101_110_011_111_100
 10025:   //TPGE                                            |A|--2346|-|-*-*-|-----|          |0101_110_011_111_100 [TRAPGE]
 10026:   //TPNLT                                           |A|--2346|-|-*-*-|-----|          |0101_110_011_111_100 [TRAPGE]
 10027:   //TRAPNLT                                         |A|--2346|-|-*-*-|-----|          |0101_110_011_111_100 [TRAPGE]
 10028:   public static void irpSge () throws M68kException {
 10029:     int ea = XEiJ.regOC & 63;
 10030:     if (ea >> 3 == XEiJ.MMM_AR) {  //DBGE.W Dr,<label>
 10031:       int t = XEiJ.regPC;  //pc0+2
 10032:       XEiJ.regPC = t + 2;  //pc0+4
 10033:       t += mmuReadWordSignExword (t, XEiJ.regSRS);  //pc0+2+16bitディスプレースメント
 10034:       if ((t & 1) != 0) {  //分岐先のアドレスが奇数
 10035:         //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ
 10036:         irpBccAddressError (t);
 10037:       }
 10038:       if (XEiJ.MPU_CC_GE << XEiJ.regCCR < 0) {  //条件が成立しているので通過
 10039:         XEiJ.mpuCycleCount += 2;
 10040:       } else {  //条件が成立していないのでデクリメント
 10041:         int rrr = XEiJ.regOC & 7;
 10042:         int s = XEiJ.regRn[rrr];
 10043:         if ((short) s == 0) {  //Drの下位16bitが0なので通過
 10044:           XEiJ.mpuCycleCount += 2;
 10045:           XEiJ.regRn[rrr] = s + 65535;
 10046:         } else {  //Drの下位16bitが0でないので分岐
 10047:           XEiJ.mpuCycleCount++;
 10048:           XEiJ.regRn[rrr] = s - 1;  //下位16bitが0でないので上位16bitは変化しない
 10049:           irpSetPC (t);
 10050:         }
 10051:       }
 10052:     } else if (ea < XEiJ.EA_AR) {  //SGE.B Dr
 10053:       if (XEiJ.MPU_CC_GE << XEiJ.regCCR < 0) {  //セット
 10054:         XEiJ.mpuCycleCount++;
 10055:         XEiJ.regRn[ea] |= 0xff;
 10056:       } else {  //クリア
 10057:         XEiJ.mpuCycleCount++;
 10058:         XEiJ.regRn[ea] &= ~0xff;
 10059:       }
 10060:     } else if ((XEiJ.EAM_PW | XEiJ.EAM_PX | XEiJ.EAM_IM) << ea < 0L) {  //TRAPGE.W/TRAPGE.L/TRAPGE
 10061:       XEiJ.regPC += (ea & 3) + (ea & 1);  //111_010→2,111_011→4,111_100→0
 10062:       if (XEiJ.MPU_CC_GE << XEiJ.regCCR < 0) {
 10063:         //条件が成立しているのでTRAPする
 10064:         M68kException.m6eAddress = XEiJ.regPC0;  //アドレスは命令の先頭
 10065:         M68kException.m6eNumber = M68kException.M6E_TRAPV_INSTRUCTION;
 10066:         throw M68kException.m6eSignal;
 10067:       } else {
 10068:         //条件が成立していないのでTRAPしない
 10069:         XEiJ.mpuCycleCount++;
 10070:       }
 10071:     } else {  //SGE.B <mem>
 10072:       XEiJ.mpuCycleCount++;
 10073:       mmuWriteByteData (efaMltByte (ea), XEiJ.MPU_CC_GE << XEiJ.regCCR >> 31, XEiJ.regSRS);
 10074:     }
 10075:   }  //irpSge
 10076: 
 10077:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10078:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 10079:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 10080:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10081:   //SLT.B <ea>                                      |-|012346|-|-*-*-|-----|D M+-WXZ  |0101_110_111_mmm_rrr
 10082:   //SNGE.B <ea>                                     |A|012346|-|-*-*-|-----|D M+-WXZ  |0101_110_111_mmm_rrr [SLT.B <ea>]
 10083:   //DBLT.W Dr,<label>                               |-|012346|-|-*-*-|-----|          |0101_110_111_001_rrr-{offset}
 10084:   //DBNGE.W Dr,<label>                              |A|012346|-|-*-*-|-----|          |0101_110_111_001_rrr-{offset}        [DBLT.W Dr,<label>]
 10085:   //TRAPLT.W #<data>                                |-|--2346|-|-*-*-|-----|          |0101_110_111_111_010-{data}
 10086:   //TPLT.W #<data>                                  |A|--2346|-|-*-*-|-----|          |0101_110_111_111_010-{data}  [TRAPLT.W #<data>]
 10087:   //TPNGE.W #<data>                                 |A|--2346|-|-*-*-|-----|          |0101_110_111_111_010-{data}  [TRAPLT.W #<data>]
 10088:   //TRAPNGE.W #<data>                               |A|--2346|-|-*-*-|-----|          |0101_110_111_111_010-{data}  [TRAPLT.W #<data>]
 10089:   //TRAPLT.L #<data>                                |-|--2346|-|-*-*-|-----|          |0101_110_111_111_011-{data}
 10090:   //TPLT.L #<data>                                  |A|--2346|-|-*-*-|-----|          |0101_110_111_111_011-{data}  [TRAPLT.L #<data>]
 10091:   //TPNGE.L #<data>                                 |A|--2346|-|-*-*-|-----|          |0101_110_111_111_011-{data}  [TRAPLT.L #<data>]
 10092:   //TRAPNGE.L #<data>                               |A|--2346|-|-*-*-|-----|          |0101_110_111_111_011-{data}  [TRAPLT.L #<data>]
 10093:   //TRAPLT                                          |-|--2346|-|-*-*-|-----|          |0101_110_111_111_100
 10094:   //TPLT                                            |A|--2346|-|-*-*-|-----|          |0101_110_111_111_100 [TRAPLT]
 10095:   //TPNGE                                           |A|--2346|-|-*-*-|-----|          |0101_110_111_111_100 [TRAPLT]
 10096:   //TRAPNGE                                         |A|--2346|-|-*-*-|-----|          |0101_110_111_111_100 [TRAPLT]
 10097:   public static void irpSlt () throws M68kException {
 10098:     int ea = XEiJ.regOC & 63;
 10099:     if (ea >> 3 == XEiJ.MMM_AR) {  //DBLT.W Dr,<label>
 10100:       int t = XEiJ.regPC;  //pc0+2
 10101:       XEiJ.regPC = t + 2;  //pc0+4
 10102:       t += mmuReadWordSignExword (t, XEiJ.regSRS);  //pc0+2+16bitディスプレースメント
 10103:       if ((t & 1) != 0) {  //分岐先のアドレスが奇数
 10104:         //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ
 10105:         irpBccAddressError (t);
 10106:       }
 10107:       if (XEiJ.MPU_CC_LT << XEiJ.regCCR < 0) {  //条件が成立しているので通過
 10108:         XEiJ.mpuCycleCount += 2;
 10109:       } else {  //条件が成立していないのでデクリメント
 10110:         int rrr = XEiJ.regOC & 7;
 10111:         int s = XEiJ.regRn[rrr];
 10112:         if ((short) s == 0) {  //Drの下位16bitが0なので通過
 10113:           XEiJ.mpuCycleCount += 2;
 10114:           XEiJ.regRn[rrr] = s + 65535;
 10115:         } else {  //Drの下位16bitが0でないので分岐
 10116:           XEiJ.mpuCycleCount++;
 10117:           XEiJ.regRn[rrr] = s - 1;  //下位16bitが0でないので上位16bitは変化しない
 10118:           irpSetPC (t);
 10119:         }
 10120:       }
 10121:     } else if (ea < XEiJ.EA_AR) {  //SLT.B Dr
 10122:       if (XEiJ.MPU_CC_LT << XEiJ.regCCR < 0) {  //セット
 10123:         XEiJ.mpuCycleCount++;
 10124:         XEiJ.regRn[ea] |= 0xff;
 10125:       } else {  //クリア
 10126:         XEiJ.mpuCycleCount++;
 10127:         XEiJ.regRn[ea] &= ~0xff;
 10128:       }
 10129:     } else if ((XEiJ.EAM_PW | XEiJ.EAM_PX | XEiJ.EAM_IM) << ea < 0L) {  //TRAPLT.W/TRAPLT.L/TRAPLT
 10130:       XEiJ.regPC += (ea & 3) + (ea & 1);  //111_010→2,111_011→4,111_100→0
 10131:       if (XEiJ.MPU_CC_LT << XEiJ.regCCR < 0) {
 10132:         //条件が成立しているのでTRAPする
 10133:         M68kException.m6eAddress = XEiJ.regPC0;  //アドレスは命令の先頭
 10134:         M68kException.m6eNumber = M68kException.M6E_TRAPV_INSTRUCTION;
 10135:         throw M68kException.m6eSignal;
 10136:       } else {
 10137:         //条件が成立していないのでTRAPしない
 10138:         XEiJ.mpuCycleCount++;
 10139:       }
 10140:     } else {  //SLT.B <mem>
 10141:       XEiJ.mpuCycleCount++;
 10142:       mmuWriteByteData (efaMltByte (ea), XEiJ.MPU_CC_LT << XEiJ.regCCR >> 31, XEiJ.regSRS);
 10143:     }
 10144:   }  //irpSlt
 10145: 
 10146:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10147:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 10148:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 10149:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10150:   //SGT.B <ea>                                      |-|012346|-|-***-|-----|D M+-WXZ  |0101_111_011_mmm_rrr
 10151:   //SNLE.B <ea>                                     |A|012346|-|-***-|-----|D M+-WXZ  |0101_111_011_mmm_rrr [SGT.B <ea>]
 10152:   //DBGT.W Dr,<label>                               |-|012346|-|-***-|-----|          |0101_111_011_001_rrr-{offset}
 10153:   //DBNLE.W Dr,<label>                              |A|012346|-|-***-|-----|          |0101_111_011_001_rrr-{offset}        [DBGT.W Dr,<label>]
 10154:   //TRAPGT.W #<data>                                |-|--2346|-|-***-|-----|          |0101_111_011_111_010-{data}
 10155:   //TPGT.W #<data>                                  |A|--2346|-|-***-|-----|          |0101_111_011_111_010-{data}  [TRAPGT.W #<data>]
 10156:   //TPNLE.W #<data>                                 |A|--2346|-|-***-|-----|          |0101_111_011_111_010-{data}  [TRAPGT.W #<data>]
 10157:   //TRAPNLE.W #<data>                               |A|--2346|-|-***-|-----|          |0101_111_011_111_010-{data}  [TRAPGT.W #<data>]
 10158:   //TRAPGT.L #<data>                                |-|--2346|-|-***-|-----|          |0101_111_011_111_011-{data}
 10159:   //TPGT.L #<data>                                  |A|--2346|-|-***-|-----|          |0101_111_011_111_011-{data}  [TRAPGT.L #<data>]
 10160:   //TPNLE.L #<data>                                 |A|--2346|-|-***-|-----|          |0101_111_011_111_011-{data}  [TRAPGT.L #<data>]
 10161:   //TRAPNLE.L #<data>                               |A|--2346|-|-***-|-----|          |0101_111_011_111_011-{data}  [TRAPGT.L #<data>]
 10162:   //TRAPGT                                          |-|--2346|-|-***-|-----|          |0101_111_011_111_100
 10163:   //TPGT                                            |A|--2346|-|-***-|-----|          |0101_111_011_111_100 [TRAPGT]
 10164:   //TPNLE                                           |A|--2346|-|-***-|-----|          |0101_111_011_111_100 [TRAPGT]
 10165:   //TRAPNLE                                         |A|--2346|-|-***-|-----|          |0101_111_011_111_100 [TRAPGT]
 10166:   public static void irpSgt () throws M68kException {
 10167:     int ea = XEiJ.regOC & 63;
 10168:     if (ea >> 3 == XEiJ.MMM_AR) {  //DBGT.W Dr,<label>
 10169:       int t = XEiJ.regPC;  //pc0+2
 10170:       XEiJ.regPC = t + 2;  //pc0+4
 10171:       t += mmuReadWordSignExword (t, XEiJ.regSRS);  //pc0+2+16bitディスプレースメント
 10172:       if ((t & 1) != 0) {  //分岐先のアドレスが奇数
 10173:         //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ
 10174:         irpBccAddressError (t);
 10175:       }
 10176:       if (XEiJ.MPU_CC_GT << XEiJ.regCCR < 0) {  //条件が成立しているので通過
 10177:         XEiJ.mpuCycleCount += 2;
 10178:       } else {  //条件が成立していないのでデクリメント
 10179:         int rrr = XEiJ.regOC & 7;
 10180:         int s = XEiJ.regRn[rrr];
 10181:         if ((short) s == 0) {  //Drの下位16bitが0なので通過
 10182:           XEiJ.mpuCycleCount += 2;
 10183:           XEiJ.regRn[rrr] = s + 65535;
 10184:         } else {  //Drの下位16bitが0でないので分岐
 10185:           XEiJ.mpuCycleCount++;
 10186:           XEiJ.regRn[rrr] = s - 1;  //下位16bitが0でないので上位16bitは変化しない
 10187:           irpSetPC (t);
 10188:         }
 10189:       }
 10190:     } else if (ea < XEiJ.EA_AR) {  //SGT.B Dr
 10191:       if (XEiJ.MPU_CC_GT << XEiJ.regCCR < 0) {  //セット
 10192:         XEiJ.mpuCycleCount++;
 10193:         XEiJ.regRn[ea] |= 0xff;
 10194:       } else {  //クリア
 10195:         XEiJ.mpuCycleCount++;
 10196:         XEiJ.regRn[ea] &= ~0xff;
 10197:       }
 10198:     } else if ((XEiJ.EAM_PW | XEiJ.EAM_PX | XEiJ.EAM_IM) << ea < 0L) {  //TRAPGT.W/TRAPGT.L/TRAPGT
 10199:       XEiJ.regPC += (ea & 3) + (ea & 1);  //111_010→2,111_011→4,111_100→0
 10200:       if (XEiJ.MPU_CC_GT << XEiJ.regCCR < 0) {
 10201:         //条件が成立しているのでTRAPする
 10202:         M68kException.m6eAddress = XEiJ.regPC0;  //アドレスは命令の先頭
 10203:         M68kException.m6eNumber = M68kException.M6E_TRAPV_INSTRUCTION;
 10204:         throw M68kException.m6eSignal;
 10205:       } else {
 10206:         //条件が成立していないのでTRAPしない
 10207:         XEiJ.mpuCycleCount++;
 10208:       }
 10209:     } else {  //SGT.B <mem>
 10210:       XEiJ.mpuCycleCount++;
 10211:       mmuWriteByteData (efaMltByte (ea), XEiJ.MPU_CC_GT << XEiJ.regCCR >> 31, XEiJ.regSRS);
 10212:     }
 10213:   }  //irpSgt
 10214: 
 10215:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10216:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 10217:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 10218:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10219:   //SLE.B <ea>                                      |-|012346|-|-***-|-----|D M+-WXZ  |0101_111_111_mmm_rrr
 10220:   //SNGT.B <ea>                                     |A|012346|-|-***-|-----|D M+-WXZ  |0101_111_111_mmm_rrr [SLE.B <ea>]
 10221:   //DBLE.W Dr,<label>                               |-|012346|-|-***-|-----|          |0101_111_111_001_rrr-{offset}
 10222:   //DBNGT.W Dr,<label>                              |A|012346|-|-***-|-----|          |0101_111_111_001_rrr-{offset}        [DBLE.W Dr,<label>]
 10223:   //TRAPLE.W #<data>                                |-|--2346|-|-***-|-----|          |0101_111_111_111_010-{data}
 10224:   //TPLE.W #<data>                                  |A|--2346|-|-***-|-----|          |0101_111_111_111_010-{data}  [TRAPLE.W #<data>]
 10225:   //TPNGT.W #<data>                                 |A|--2346|-|-***-|-----|          |0101_111_111_111_010-{data}  [TRAPLE.W #<data>]
 10226:   //TRAPNGT.W #<data>                               |A|--2346|-|-***-|-----|          |0101_111_111_111_010-{data}  [TRAPLE.W #<data>]
 10227:   //TRAPLE.L #<data>                                |-|--2346|-|-***-|-----|          |0101_111_111_111_011-{data}
 10228:   //TPLE.L #<data>                                  |A|--2346|-|-***-|-----|          |0101_111_111_111_011-{data}  [TRAPLE.L #<data>]
 10229:   //TPNGT.L #<data>                                 |A|--2346|-|-***-|-----|          |0101_111_111_111_011-{data}  [TRAPLE.L #<data>]
 10230:   //TRAPNGT.L #<data>                               |A|--2346|-|-***-|-----|          |0101_111_111_111_011-{data}  [TRAPLE.L #<data>]
 10231:   //TRAPLE                                          |-|--2346|-|-***-|-----|          |0101_111_111_111_100
 10232:   //TPLE                                            |A|--2346|-|-***-|-----|          |0101_111_111_111_100 [TRAPLE]
 10233:   //TPNGT                                           |A|--2346|-|-***-|-----|          |0101_111_111_111_100 [TRAPLE]
 10234:   //TRAPNGT                                         |A|--2346|-|-***-|-----|          |0101_111_111_111_100 [TRAPLE]
 10235:   public static void irpSle () throws M68kException {
 10236:     int ea = XEiJ.regOC & 63;
 10237:     if (ea >> 3 == XEiJ.MMM_AR) {  //DBLE.W Dr,<label>
 10238:       int t = XEiJ.regPC;  //pc0+2
 10239:       XEiJ.regPC = t + 2;  //pc0+4
 10240:       t += mmuReadWordSignExword (t, XEiJ.regSRS);  //pc0+2+16bitディスプレースメント
 10241:       if ((t & 1) != 0) {  //分岐先のアドレスが奇数
 10242:         //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ
 10243:         irpBccAddressError (t);
 10244:       }
 10245:       if (XEiJ.MPU_CC_LE << XEiJ.regCCR < 0) {  //条件が成立しているので通過
 10246:         XEiJ.mpuCycleCount += 2;
 10247:       } else {  //条件が成立していないのでデクリメント
 10248:         int rrr = XEiJ.regOC & 7;
 10249:         int s = XEiJ.regRn[rrr];
 10250:         if ((short) s == 0) {  //Drの下位16bitが0なので通過
 10251:           XEiJ.mpuCycleCount += 2;
 10252:           XEiJ.regRn[rrr] = s + 65535;
 10253:         } else {  //Drの下位16bitが0でないので分岐
 10254:           XEiJ.mpuCycleCount++;
 10255:           XEiJ.regRn[rrr] = s - 1;  //下位16bitが0でないので上位16bitは変化しない
 10256:           irpSetPC (t);
 10257:         }
 10258:       }
 10259:     } else if (ea < XEiJ.EA_AR) {  //SLE.B Dr
 10260:       if (XEiJ.MPU_CC_LE << XEiJ.regCCR < 0) {  //セット
 10261:         XEiJ.mpuCycleCount++;
 10262:         XEiJ.regRn[ea] |= 0xff;
 10263:       } else {  //クリア
 10264:         XEiJ.mpuCycleCount++;
 10265:         XEiJ.regRn[ea] &= ~0xff;
 10266:       }
 10267:     } else if ((XEiJ.EAM_PW | XEiJ.EAM_PX | XEiJ.EAM_IM) << ea < 0L) {  //TRAPLE.W/TRAPLE.L/TRAPLE
 10268:       XEiJ.regPC += (ea & 3) + (ea & 1);  //111_010→2,111_011→4,111_100→0
 10269:       if (XEiJ.MPU_CC_LE << XEiJ.regCCR < 0) {
 10270:         //条件が成立しているのでTRAPする
 10271:         M68kException.m6eAddress = XEiJ.regPC0;  //アドレスは命令の先頭
 10272:         M68kException.m6eNumber = M68kException.M6E_TRAPV_INSTRUCTION;
 10273:         throw M68kException.m6eSignal;
 10274:       } else {
 10275:         //条件が成立していないのでTRAPしない
 10276:         XEiJ.mpuCycleCount++;
 10277:       }
 10278:     } else {  //SLE.B <mem>
 10279:       XEiJ.mpuCycleCount++;
 10280:       mmuWriteByteData (efaMltByte (ea), XEiJ.MPU_CC_LE << XEiJ.regCCR >> 31, XEiJ.regSRS);
 10281:     }
 10282:   }  //irpSle
 10283: 
 10284:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10285:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 10286:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 10287:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10288:   //BRA.W <label>                                   |-|012346|-|-----|-----|          |0110_000_000_000_000-{offset}
 10289:   //JBRA.W <label>                                  |A|012346|-|-----|-----|          |0110_000_000_000_000-{offset}        [BRA.W <label>]
 10290:   //BRA.S <label>                                   |-|012346|-|-----|-----|          |0110_000_000_sss_sss (s is not equal to 0)
 10291:   //JBRA.S <label>                                  |A|012346|-|-----|-----|          |0110_000_000_sss_sss (s is not equal to 0)   [BRA.S <label>]
 10292:   public static void irpBrasw () throws M68kException {
 10293:     XEiJ.mpuCycleCount++;  //0clkにしない
 10294:     int t = XEiJ.regPC;  //pc0+2
 10295:     int s = (byte) XEiJ.regOC;  //オフセット
 10296:     if (s == 0) {  //BRA.W
 10297:       XEiJ.regPC = t + 2;
 10298:       s = mmuReadWordSignExword (t, XEiJ.regSRS);  //pcws
 10299:     }
 10300:     irpSetPC (t + s);  //pc0+2+オフセット
 10301:   }  //irpBrasw
 10302: 
 10303:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10304:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 10305:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 10306:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10307:   //BRA.S <label>                                   |-|012346|-|-----|-----|          |0110_000_001_sss_sss
 10308:   //JBRA.S <label>                                  |A|012346|-|-----|-----|          |0110_000_001_sss_sss [BRA.S <label>]
 10309:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10310:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 10311:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 10312:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10313:   //BRA.S <label>                                   |-|012346|-|-----|-----|          |0110_000_010_sss_sss
 10314:   //JBRA.S <label>                                  |A|012346|-|-----|-----|          |0110_000_010_sss_sss [BRA.S <label>]
 10315:   public static void irpBras () throws M68kException {
 10316:     XEiJ.mpuCycleCount++;  //0clkにしない
 10317:     irpSetPC (XEiJ.regPC + (byte) XEiJ.regOC);  //pc0+2+オフセット
 10318:   }  //irpBras
 10319: 
 10320:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10321:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 10322:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 10323:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10324:   //BRA.S <label>                                   |-|--2346|-|-----|-----|          |0110_000_011_sss_sss (s is not equal to 63)
 10325:   //JBRA.S <label>                                  |A|--2346|-|-----|-----|          |0110_000_011_sss_sss (s is not equal to 63)  [BRA.S <label>]
 10326:   //BRA.L <label>                                   |-|--2346|-|-----|-----|          |0110_000_011_111_111-{offset}
 10327:   public static void irpBrasl () throws M68kException {
 10328:     XEiJ.mpuCycleCount++;  //0clkにしない
 10329:     int t = XEiJ.regPC;  //pc0+2
 10330:     int s = (byte) XEiJ.regOC;  //オフセット
 10331:     if (s == -1) {  //BRA.L
 10332:       XEiJ.regPC = t + 4;
 10333:       s = mmuReadLongExword (t, XEiJ.regSRS);  //pcls
 10334:     }
 10335:     irpSetPC (t + s);  //pc0+2+オフセット
 10336:   }  //irpBrasl
 10337: 
 10338:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10339:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 10340:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 10341:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10342:   //BSR.W <label>                                   |-|012346|-|-----|-----|          |0110_000_100_000_000-{offset}
 10343:   //JBSR.W <label>                                  |A|012346|-|-----|-----|          |0110_000_100_000_000-{offset}        [BSR.W <label>]
 10344:   //BSR.S <label>                                   |-|012346|-|-----|-----|          |0110_000_100_sss_sss (s is not equal to 0)
 10345:   //JBSR.S <label>                                  |A|012346|-|-----|-----|          |0110_000_100_sss_sss (s is not equal to 0)   [BSR.S <label>]
 10346:   public static void irpBsrsw () throws M68kException {
 10347:     XEiJ.mpuCycleCount++;
 10348:     int t = XEiJ.regPC;  //pc0+2
 10349:     int s = (byte) XEiJ.regOC;  //オフセット
 10350:     if (s == 0) {  //BSR.W
 10351:       XEiJ.regPC = t + 2;
 10352:       s = mmuReadWordSignExword (t, XEiJ.regSRS);  //pcws
 10353:     }
 10354:     M68kException.m6eIncremented -= 4L << (7 << 3);
 10355:     mmuWriteLongData (XEiJ.regRn[15] -= 4, XEiJ.regPC, XEiJ.regSRS);  //pushl
 10356:     irpSetPC (t + s);  //pc0+2+オフセット
 10357:   }  //irpBsrsw
 10358: 
 10359:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10360:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 10361:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 10362:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10363:   //BSR.S <label>                                   |-|012346|-|-----|-----|          |0110_000_101_sss_sss
 10364:   //JBSR.S <label>                                  |A|012346|-|-----|-----|          |0110_000_101_sss_sss [BSR.S <label>]
 10365:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10366:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 10367:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 10368:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10369:   //BSR.S <label>                                   |-|012346|-|-----|-----|          |0110_000_110_sss_sss
 10370:   //JBSR.S <label>                                  |A|012346|-|-----|-----|          |0110_000_110_sss_sss [BSR.S <label>]
 10371:   public static void irpBsrs () throws M68kException {
 10372:     XEiJ.mpuCycleCount++;
 10373:     M68kException.m6eIncremented -= 4L << (7 << 3);
 10374:     mmuWriteLongData (XEiJ.regRn[15] -= 4, XEiJ.regPC, XEiJ.regSRS);  //pushl
 10375:     irpSetPC (XEiJ.regPC + (byte) XEiJ.regOC);  //pc0+2+オフセット
 10376:   }  //irpBsrs
 10377: 
 10378:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10379:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 10380:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 10381:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10382:   //BSR.S <label>                                   |-|--2346|-|-----|-----|          |0110_000_111_sss_sss (s is not equal to 63)
 10383:   //JBSR.S <label>                                  |A|--2346|-|-----|-----|          |0110_000_111_sss_sss (s is not equal to 63)  [BSR.S <label>]
 10384:   //BSR.L <label>                                   |-|--2346|-|-----|-----|          |0110_000_111_111_111-{offset}
 10385:   public static void irpBsrsl () throws M68kException {
 10386:     XEiJ.mpuCycleCount++;
 10387:     int t = XEiJ.regPC;  //pc0+2
 10388:     int s = (byte) XEiJ.regOC;  //オフセット
 10389:     if (s == -1) {  //BSR.L
 10390:       XEiJ.regPC = t + 4;
 10391:       s = mmuReadLongExword (t, XEiJ.regSRS);  //pcls
 10392:     }
 10393:     M68kException.m6eIncremented -= 4L << (7 << 3);
 10394:     mmuWriteLongData (XEiJ.regRn[15] -= 4, XEiJ.regPC, XEiJ.regSRS);  //pushl
 10395:     irpSetPC (t + s);  //pc0+2+オフセット
 10396:   }  //irpBsrsl
 10397: 
 10398:   //irpBccAddressError (int t)
 10399:   public static void irpBccAddressError (int t) throws M68kException {
 10400:     M68kException.m6eNumber = M68kException.M6E_ADDRESS_ERROR;
 10401:     M68kException.m6eAddress = t & -2;  //偶数にする
 10402:     M68kException.m6eDirection = XEiJ.MPU_WR_READ;
 10403:     M68kException.m6eSize = XEiJ.MPU_SS_WORD;
 10404:     throw M68kException.m6eSignal;
 10405:   }
 10406: 
 10407:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10408:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 10409:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 10410:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10411:   //BHI.W <label>                                   |-|012346|-|--*-*|-----|          |0110_001_000_000_000-{offset}
 10412:   //BNLS.W <label>                                  |A|012346|-|--*-*|-----|          |0110_001_000_000_000-{offset}        [BHI.W <label>]
 10413:   //JBHI.W <label>                                  |A|012346|-|--*-*|-----|          |0110_001_000_000_000-{offset}        [BHI.W <label>]
 10414:   //JBNLS.W <label>                                 |A|012346|-|--*-*|-----|          |0110_001_000_000_000-{offset}        [BHI.W <label>]
 10415:   //BHI.S <label>                                   |-|012346|-|--*-*|-----|          |0110_001_000_sss_sss (s is not equal to 0)
 10416:   //BNLS.S <label>                                  |A|012346|-|--*-*|-----|          |0110_001_000_sss_sss (s is not equal to 0)   [BHI.S <label>]
 10417:   //JBHI.S <label>                                  |A|012346|-|--*-*|-----|          |0110_001_000_sss_sss (s is not equal to 0)   [BHI.S <label>]
 10418:   //JBNLS.S <label>                                 |A|012346|-|--*-*|-----|          |0110_001_000_sss_sss (s is not equal to 0)   [BHI.S <label>]
 10419:   //JBLS.L <label>                                  |A|012346|-|--*-*|-----|          |0110_001_000_000_110-0100111011111001-{address}      [BHI.S (*)+8;JMP <label>]
 10420:   //JBNHI.L <label>                                 |A|012346|-|--*-*|-----|          |0110_001_000_000_110-0100111011111001-{address}      [BHI.S (*)+8;JMP <label>]
 10421:   public static void irpBhisw () throws M68kException {
 10422:     XEiJ.mpuCycleCount++;
 10423:     int t = XEiJ.regPC;  //pc0+2
 10424:     int s = (byte) XEiJ.regOC;  //8bitディスプレースメント
 10425:     if (s == 0) {  //Bcc.W
 10426:       XEiJ.regPC = t + 2;  //pc0+4
 10427:       s = mmuReadWordSignExword (t, XEiJ.regSRS);  //16bitディスプレースメント
 10428:     }
 10429:     t += s;  //pc0+2+ディスプレースメント
 10430:     if ((t & 1) != 0) {  //分岐先のアドレスが奇数
 10431:       //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ
 10432:       irpBccAddressError (t);
 10433:     }
 10434:     if (XEiJ.MPU_CC_HI << XEiJ.regCCR < 0) {  //分岐する
 10435:       irpSetPC (t);
 10436:     }
 10437:   }  //irpBhisw
 10438: 
 10439:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10440:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 10441:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 10442:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10443:   //BHI.S <label>                                   |-|012346|-|--*-*|-----|          |0110_001_001_sss_sss
 10444:   //BNLS.S <label>                                  |A|012346|-|--*-*|-----|          |0110_001_001_sss_sss [BHI.S <label>]
 10445:   //JBHI.S <label>                                  |A|012346|-|--*-*|-----|          |0110_001_001_sss_sss [BHI.S <label>]
 10446:   //JBNLS.S <label>                                 |A|012346|-|--*-*|-----|          |0110_001_001_sss_sss [BHI.S <label>]
 10447:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10448:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 10449:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 10450:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10451:   //BHI.S <label>                                   |-|012346|-|--*-*|-----|          |0110_001_010_sss_sss
 10452:   //BNLS.S <label>                                  |A|012346|-|--*-*|-----|          |0110_001_010_sss_sss [BHI.S <label>]
 10453:   //JBHI.S <label>                                  |A|012346|-|--*-*|-----|          |0110_001_010_sss_sss [BHI.S <label>]
 10454:   //JBNLS.S <label>                                 |A|012346|-|--*-*|-----|          |0110_001_010_sss_sss [BHI.S <label>]
 10455:   public static void irpBhis () throws M68kException {
 10456:     XEiJ.mpuCycleCount++;
 10457:     int t = XEiJ.regPC;  //pc0+2
 10458:     int s = (byte) XEiJ.regOC;  //8bitディスプレースメント
 10459:     t += s;  //pc0+2+ディスプレースメント
 10460:     if ((t & 1) != 0) {  //分岐先のアドレスが奇数
 10461:       //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ
 10462:       irpBccAddressError (t);
 10463:     }
 10464:     if (XEiJ.MPU_CC_HI << XEiJ.regCCR < 0) {  //分岐する
 10465:       irpSetPC (t);
 10466:     }
 10467:   }  //irpBhis
 10468: 
 10469:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10470:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 10471:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 10472:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10473:   //BHI.S <label>                                   |-|--2346|-|--*-*|-----|          |0110_001_011_sss_sss (s is not equal to 63)
 10474:   //BNLS.S <label>                                  |A|--2346|-|--*-*|-----|          |0110_001_011_sss_sss (s is not equal to 63)  [BHI.S <label>]
 10475:   //JBHI.S <label>                                  |A|--2346|-|--*-*|-----|          |0110_001_011_sss_sss (s is not equal to 63)  [BHI.S <label>]
 10476:   //JBNLS.S <label>                                 |A|--2346|-|--*-*|-----|          |0110_001_011_sss_sss (s is not equal to 63)  [BHI.S <label>]
 10477:   //BHI.L <label>                                   |-|--2346|-|--*-*|-----|          |0110_001_011_111_111-{offset}
 10478:   //BNLS.L <label>                                  |A|--2346|-|--*-*|-----|          |0110_001_011_111_111-{offset}        [BHI.L <label>]
 10479:   public static void irpBhisl () throws M68kException {
 10480:     XEiJ.mpuCycleCount++;
 10481:     int t = XEiJ.regPC;  //pc0+2
 10482:     int s = (byte) XEiJ.regOC;  //8bitディスプレースメント
 10483:     if (s == -1) {  //Bcc.L
 10484:       XEiJ.regPC = t + 4;  //pc0+6
 10485:       s = mmuReadLongExword (t, XEiJ.regSRS);  //32bitディスプレースメント
 10486:     }
 10487:     t += s;  //pc0+2+ディスプレースメント
 10488:     if ((t & 1) != 0) {  //分岐先のアドレスが奇数
 10489:       //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ
 10490:       irpBccAddressError (t);
 10491:     }
 10492:     if (XEiJ.MPU_CC_HI << XEiJ.regCCR < 0) {  //分岐する
 10493:       irpSetPC (t);
 10494:     }
 10495:   }  //irpBhisl
 10496: 
 10497:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10498:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 10499:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 10500:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10501:   //BLS.W <label>                                   |-|012346|-|--*-*|-----|          |0110_001_100_000_000-{offset}
 10502:   //BNHI.W <label>                                  |A|012346|-|--*-*|-----|          |0110_001_100_000_000-{offset}        [BLS.W <label>]
 10503:   //JBLS.W <label>                                  |A|012346|-|--*-*|-----|          |0110_001_100_000_000-{offset}        [BLS.W <label>]
 10504:   //JBNHI.W <label>                                 |A|012346|-|--*-*|-----|          |0110_001_100_000_000-{offset}        [BLS.W <label>]
 10505:   //BLS.S <label>                                   |-|012346|-|--*-*|-----|          |0110_001_100_sss_sss (s is not equal to 0)
 10506:   //BNHI.S <label>                                  |A|012346|-|--*-*|-----|          |0110_001_100_sss_sss (s is not equal to 0)   [BLS.S <label>]
 10507:   //JBLS.S <label>                                  |A|012346|-|--*-*|-----|          |0110_001_100_sss_sss (s is not equal to 0)   [BLS.S <label>]
 10508:   //JBNHI.S <label>                                 |A|012346|-|--*-*|-----|          |0110_001_100_sss_sss (s is not equal to 0)   [BLS.S <label>]
 10509:   //JBHI.L <label>                                  |A|012346|-|--*-*|-----|          |0110_001_100_000_110-0100111011111001-{address}      [BLS.S (*)+8;JMP <label>]
 10510:   //JBNLS.L <label>                                 |A|012346|-|--*-*|-----|          |0110_001_100_000_110-0100111011111001-{address}      [BLS.S (*)+8;JMP <label>]
 10511:   public static void irpBlssw () throws M68kException {
 10512:     XEiJ.mpuCycleCount++;
 10513:     int t = XEiJ.regPC;  //pc0+2
 10514:     int s = (byte) XEiJ.regOC;  //8bitディスプレースメント
 10515:     if (s == 0) {  //Bcc.W
 10516:       XEiJ.regPC = t + 2;  //pc0+4
 10517:       s = mmuReadWordSignExword (t, XEiJ.regSRS);  //16bitディスプレースメント
 10518:     }
 10519:     t += s;  //pc0+2+ディスプレースメント
 10520:     if ((t & 1) != 0) {  //分岐先のアドレスが奇数
 10521:       //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ
 10522:       irpBccAddressError (t);
 10523:     }
 10524:     if (XEiJ.MPU_CC_LS << XEiJ.regCCR < 0) {  //分岐する
 10525:       irpSetPC (t);
 10526:     }
 10527:   }  //irpBlssw
 10528: 
 10529:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10530:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 10531:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 10532:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10533:   //BLS.S <label>                                   |-|012346|-|--*-*|-----|          |0110_001_101_sss_sss
 10534:   //BNHI.S <label>                                  |A|012346|-|--*-*|-----|          |0110_001_101_sss_sss [BLS.S <label>]
 10535:   //JBLS.S <label>                                  |A|012346|-|--*-*|-----|          |0110_001_101_sss_sss [BLS.S <label>]
 10536:   //JBNHI.S <label>                                 |A|012346|-|--*-*|-----|          |0110_001_101_sss_sss [BLS.S <label>]
 10537:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10538:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 10539:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 10540:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10541:   //BLS.S <label>                                   |-|012346|-|--*-*|-----|          |0110_001_110_sss_sss
 10542:   //BNHI.S <label>                                  |A|012346|-|--*-*|-----|          |0110_001_110_sss_sss [BLS.S <label>]
 10543:   //JBLS.S <label>                                  |A|012346|-|--*-*|-----|          |0110_001_110_sss_sss [BLS.S <label>]
 10544:   //JBNHI.S <label>                                 |A|012346|-|--*-*|-----|          |0110_001_110_sss_sss [BLS.S <label>]
 10545:   public static void irpBlss () throws M68kException {
 10546:     XEiJ.mpuCycleCount++;
 10547:     int t = XEiJ.regPC;  //pc0+2
 10548:     int s = (byte) XEiJ.regOC;  //8bitディスプレースメント
 10549:     t += s;  //pc0+2+ディスプレースメント
 10550:     if ((t & 1) != 0) {  //分岐先のアドレスが奇数
 10551:       //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ
 10552:       irpBccAddressError (t);
 10553:     }
 10554:     if (XEiJ.MPU_CC_LS << XEiJ.regCCR < 0) {  //分岐する
 10555:       irpSetPC (t);
 10556:     }
 10557:   }  //irpBlss
 10558: 
 10559:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10560:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 10561:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 10562:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10563:   //BLS.S <label>                                   |-|--2346|-|--*-*|-----|          |0110_001_111_sss_sss (s is not equal to 63)
 10564:   //BNHI.S <label>                                  |A|--2346|-|--*-*|-----|          |0110_001_111_sss_sss (s is not equal to 63)  [BLS.S <label>]
 10565:   //JBLS.S <label>                                  |A|--2346|-|--*-*|-----|          |0110_001_111_sss_sss (s is not equal to 63)  [BLS.S <label>]
 10566:   //JBNHI.S <label>                                 |A|--2346|-|--*-*|-----|          |0110_001_111_sss_sss (s is not equal to 63)  [BLS.S <label>]
 10567:   //BLS.L <label>                                   |-|--2346|-|--*-*|-----|          |0110_001_111_111_111-{offset}
 10568:   //BNHI.L <label>                                  |A|--2346|-|--*-*|-----|          |0110_001_111_111_111-{offset}        [BLS.L <label>]
 10569:   public static void irpBlssl () throws M68kException {
 10570:     XEiJ.mpuCycleCount++;
 10571:     int t = XEiJ.regPC;  //pc0+2
 10572:     int s = (byte) XEiJ.regOC;  //8bitディスプレースメント
 10573:     if (s == -1) {  //Bcc.L
 10574:       XEiJ.regPC = t + 4;  //pc0+6
 10575:       s = mmuReadLongExword (t, XEiJ.regSRS);  //32bitディスプレースメント
 10576:     }
 10577:     t += s;  //pc0+2+ディスプレースメント
 10578:     if ((t & 1) != 0) {  //分岐先のアドレスが奇数
 10579:       //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ
 10580:       irpBccAddressError (t);
 10581:     }
 10582:     if (XEiJ.MPU_CC_LS << XEiJ.regCCR < 0) {  //分岐する
 10583:       irpSetPC (t);
 10584:     }
 10585:   }  //irpBlssl
 10586: 
 10587:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10588:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 10589:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 10590:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10591:   //BCC.W <label>                                   |-|012346|-|----*|-----|          |0110_010_000_000_000-{offset}
 10592:   //BHS.W <label>                                   |A|012346|-|----*|-----|          |0110_010_000_000_000-{offset}        [BCC.W <label>]
 10593:   //BNCS.W <label>                                  |A|012346|-|----*|-----|          |0110_010_000_000_000-{offset}        [BCC.W <label>]
 10594:   //BNLO.W <label>                                  |A|012346|-|----*|-----|          |0110_010_000_000_000-{offset}        [BCC.W <label>]
 10595:   //JBCC.W <label>                                  |A|012346|-|----*|-----|          |0110_010_000_000_000-{offset}        [BCC.W <label>]
 10596:   //JBHS.W <label>                                  |A|012346|-|----*|-----|          |0110_010_000_000_000-{offset}        [BCC.W <label>]
 10597:   //JBNCS.W <label>                                 |A|012346|-|----*|-----|          |0110_010_000_000_000-{offset}        [BCC.W <label>]
 10598:   //JBNLO.W <label>                                 |A|012346|-|----*|-----|          |0110_010_000_000_000-{offset}        [BCC.W <label>]
 10599:   //BCC.S <label>                                   |-|012346|-|----*|-----|          |0110_010_000_sss_sss (s is not equal to 0)
 10600:   //BHS.S <label>                                   |A|012346|-|----*|-----|          |0110_010_000_sss_sss (s is not equal to 0)   [BCC.S <label>]
 10601:   //BNCS.S <label>                                  |A|012346|-|----*|-----|          |0110_010_000_sss_sss (s is not equal to 0)   [BCC.S <label>]
 10602:   //BNLO.S <label>                                  |A|012346|-|----*|-----|          |0110_010_000_sss_sss (s is not equal to 0)   [BCC.S <label>]
 10603:   //JBCC.S <label>                                  |A|012346|-|----*|-----|          |0110_010_000_sss_sss (s is not equal to 0)   [BCC.S <label>]
 10604:   //JBHS.S <label>                                  |A|012346|-|----*|-----|          |0110_010_000_sss_sss (s is not equal to 0)   [BCC.S <label>]
 10605:   //JBNCS.S <label>                                 |A|012346|-|----*|-----|          |0110_010_000_sss_sss (s is not equal to 0)   [BCC.S <label>]
 10606:   //JBNLO.S <label>                                 |A|012346|-|----*|-----|          |0110_010_000_sss_sss (s is not equal to 0)   [BCC.S <label>]
 10607:   //JBCS.L <label>                                  |A|012346|-|----*|-----|          |0110_010_000_000_110-0100111011111001-{address}      [BCC.S (*)+8;JMP <label>]
 10608:   //JBLO.L <label>                                  |A|012346|-|----*|-----|          |0110_010_000_000_110-0100111011111001-{address}      [BCC.S (*)+8;JMP <label>]
 10609:   //JBNCC.L <label>                                 |A|012346|-|----*|-----|          |0110_010_000_000_110-0100111011111001-{address}      [BCC.S (*)+8;JMP <label>]
 10610:   //JBNHS.L <label>                                 |A|012346|-|----*|-----|          |0110_010_000_000_110-0100111011111001-{address}      [BCC.S (*)+8;JMP <label>]
 10611:   public static void irpBhssw () throws M68kException {
 10612:     XEiJ.mpuCycleCount++;
 10613:     int t = XEiJ.regPC;  //pc0+2
 10614:     int s = (byte) XEiJ.regOC;  //8bitディスプレースメント
 10615:     if (s == 0) {  //Bcc.W
 10616:       XEiJ.regPC = t + 2;  //pc0+4
 10617:       s = mmuReadWordSignExword (t, XEiJ.regSRS);  //16bitディスプレースメント
 10618:     }
 10619:     t += s;  //pc0+2+ディスプレースメント
 10620:     if ((t & 1) != 0) {  //分岐先のアドレスが奇数
 10621:       //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ
 10622:       irpBccAddressError (t);
 10623:     }
 10624:     if (XEiJ.MPU_CC_HS << XEiJ.regCCR < 0) {  //分岐する
 10625:       irpSetPC (t);
 10626:     }
 10627:   }  //irpBhssw
 10628: 
 10629:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10630:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 10631:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 10632:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10633:   //BCC.S <label>                                   |-|012346|-|----*|-----|          |0110_010_001_sss_sss
 10634:   //BHS.S <label>                                   |A|012346|-|----*|-----|          |0110_010_001_sss_sss [BCC.S <label>]
 10635:   //BNCS.S <label>                                  |A|012346|-|----*|-----|          |0110_010_001_sss_sss [BCC.S <label>]
 10636:   //BNLO.S <label>                                  |A|012346|-|----*|-----|          |0110_010_001_sss_sss [BCC.S <label>]
 10637:   //JBCC.S <label>                                  |A|012346|-|----*|-----|          |0110_010_001_sss_sss [BCC.S <label>]
 10638:   //JBHS.S <label>                                  |A|012346|-|----*|-----|          |0110_010_001_sss_sss [BCC.S <label>]
 10639:   //JBNCS.S <label>                                 |A|012346|-|----*|-----|          |0110_010_001_sss_sss [BCC.S <label>]
 10640:   //JBNLO.S <label>                                 |A|012346|-|----*|-----|          |0110_010_001_sss_sss [BCC.S <label>]
 10641:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10642:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 10643:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 10644:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10645:   //BCC.S <label>                                   |-|012346|-|----*|-----|          |0110_010_010_sss_sss
 10646:   //BHS.S <label>                                   |A|012346|-|----*|-----|          |0110_010_010_sss_sss [BCC.S <label>]
 10647:   //BNCS.S <label>                                  |A|012346|-|----*|-----|          |0110_010_010_sss_sss [BCC.S <label>]
 10648:   //BNLO.S <label>                                  |A|012346|-|----*|-----|          |0110_010_010_sss_sss [BCC.S <label>]
 10649:   //JBCC.S <label>                                  |A|012346|-|----*|-----|          |0110_010_010_sss_sss [BCC.S <label>]
 10650:   //JBHS.S <label>                                  |A|012346|-|----*|-----|          |0110_010_010_sss_sss [BCC.S <label>]
 10651:   //JBNCS.S <label>                                 |A|012346|-|----*|-----|          |0110_010_010_sss_sss [BCC.S <label>]
 10652:   //JBNLO.S <label>                                 |A|012346|-|----*|-----|          |0110_010_010_sss_sss [BCC.S <label>]
 10653:   public static void irpBhss () throws M68kException {
 10654:     XEiJ.mpuCycleCount++;
 10655:     int t = XEiJ.regPC;  //pc0+2
 10656:     int s = (byte) XEiJ.regOC;  //8bitディスプレースメント
 10657:     t += s;  //pc0+2+ディスプレースメント
 10658:     if ((t & 1) != 0) {  //分岐先のアドレスが奇数
 10659:       //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ
 10660:       irpBccAddressError (t);
 10661:     }
 10662:     if (XEiJ.MPU_CC_HS << XEiJ.regCCR < 0) {  //分岐する
 10663:       irpSetPC (t);
 10664:     }
 10665:   }  //irpBhss
 10666: 
 10667:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10668:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 10669:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 10670:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10671:   //BCC.S <label>                                   |-|--2346|-|----*|-----|          |0110_010_011_sss_sss (s is not equal to 63)
 10672:   //BHS.S <label>                                   |A|--2346|-|----*|-----|          |0110_010_011_sss_sss (s is not equal to 63)  [BCC.S <label>]
 10673:   //BNCS.S <label>                                  |A|--2346|-|----*|-----|          |0110_010_011_sss_sss (s is not equal to 63)  [BCC.S <label>]
 10674:   //BNLO.S <label>                                  |A|--2346|-|----*|-----|          |0110_010_011_sss_sss (s is not equal to 63)  [BCC.S <label>]
 10675:   //JBCC.S <label>                                  |A|--2346|-|----*|-----|          |0110_010_011_sss_sss (s is not equal to 63)  [BCC.S <label>]
 10676:   //JBHS.S <label>                                  |A|--2346|-|----*|-----|          |0110_010_011_sss_sss (s is not equal to 63)  [BCC.S <label>]
 10677:   //JBNCS.S <label>                                 |A|--2346|-|----*|-----|          |0110_010_011_sss_sss (s is not equal to 63)  [BCC.S <label>]
 10678:   //JBNLO.S <label>                                 |A|--2346|-|----*|-----|          |0110_010_011_sss_sss (s is not equal to 63)  [BCC.S <label>]
 10679:   //BCC.L <label>                                   |-|--2346|-|----*|-----|          |0110_010_011_111_111-{offset}
 10680:   //BHS.L <label>                                   |A|--2346|-|----*|-----|          |0110_010_011_111_111-{offset}        [BCC.L <label>]
 10681:   //BNCS.L <label>                                  |A|--2346|-|----*|-----|          |0110_010_011_111_111-{offset}        [BCC.L <label>]
 10682:   //BNLO.L <label>                                  |A|--2346|-|----*|-----|          |0110_010_011_111_111-{offset}        [BCC.L <label>]
 10683:   public static void irpBhssl () throws M68kException {
 10684:     XEiJ.mpuCycleCount++;
 10685:     int t = XEiJ.regPC;  //pc0+2
 10686:     int s = (byte) XEiJ.regOC;  //8bitディスプレースメント
 10687:     if (s == -1) {  //Bcc.L
 10688:       XEiJ.regPC = t + 4;  //pc0+6
 10689:       s = mmuReadLongExword (t, XEiJ.regSRS);  //32bitディスプレースメント
 10690:     }
 10691:     t += s;  //pc0+2+ディスプレースメント
 10692:     if ((t & 1) != 0) {  //分岐先のアドレスが奇数
 10693:       //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ
 10694:       irpBccAddressError (t);
 10695:     }
 10696:     if (XEiJ.MPU_CC_HS << XEiJ.regCCR < 0) {  //分岐する
 10697:       irpSetPC (t);
 10698:     }
 10699:   }  //irpBhssl
 10700: 
 10701:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10702:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 10703:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 10704:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10705:   //BCS.W <label>                                   |-|012346|-|----*|-----|          |0110_010_100_000_000-{offset}
 10706:   //BLO.W <label>                                   |A|012346|-|----*|-----|          |0110_010_100_000_000-{offset}        [BCS.W <label>]
 10707:   //BNCC.W <label>                                  |A|012346|-|----*|-----|          |0110_010_100_000_000-{offset}        [BCS.W <label>]
 10708:   //BNHS.W <label>                                  |A|012346|-|----*|-----|          |0110_010_100_000_000-{offset}        [BCS.W <label>]
 10709:   //JBCS.W <label>                                  |A|012346|-|----*|-----|          |0110_010_100_000_000-{offset}        [BCS.W <label>]
 10710:   //JBLO.W <label>                                  |A|012346|-|----*|-----|          |0110_010_100_000_000-{offset}        [BCS.W <label>]
 10711:   //JBNCC.W <label>                                 |A|012346|-|----*|-----|          |0110_010_100_000_000-{offset}        [BCS.W <label>]
 10712:   //JBNHS.W <label>                                 |A|012346|-|----*|-----|          |0110_010_100_000_000-{offset}        [BCS.W <label>]
 10713:   //BCS.S <label>                                   |-|012346|-|----*|-----|          |0110_010_100_sss_sss (s is not equal to 0)
 10714:   //BLO.S <label>                                   |A|012346|-|----*|-----|          |0110_010_100_sss_sss (s is not equal to 0)   [BCS.S <label>]
 10715:   //BNCC.S <label>                                  |A|012346|-|----*|-----|          |0110_010_100_sss_sss (s is not equal to 0)   [BCS.S <label>]
 10716:   //BNHS.S <label>                                  |A|012346|-|----*|-----|          |0110_010_100_sss_sss (s is not equal to 0)   [BCS.S <label>]
 10717:   //JBCS.S <label>                                  |A|012346|-|----*|-----|          |0110_010_100_sss_sss (s is not equal to 0)   [BCS.S <label>]
 10718:   //JBLO.S <label>                                  |A|012346|-|----*|-----|          |0110_010_100_sss_sss (s is not equal to 0)   [BCS.S <label>]
 10719:   //JBNCC.S <label>                                 |A|012346|-|----*|-----|          |0110_010_100_sss_sss (s is not equal to 0)   [BCS.S <label>]
 10720:   //JBNHS.S <label>                                 |A|012346|-|----*|-----|          |0110_010_100_sss_sss (s is not equal to 0)   [BCS.S <label>]
 10721:   //JBCC.L <label>                                  |A|012346|-|----*|-----|          |0110_010_100_000_110-0100111011111001-{address}      [BCS.S (*)+8;JMP <label>]
 10722:   //JBHS.L <label>                                  |A|012346|-|----*|-----|          |0110_010_100_000_110-0100111011111001-{address}      [BCS.S (*)+8;JMP <label>]
 10723:   //JBNCS.L <label>                                 |A|012346|-|----*|-----|          |0110_010_100_000_110-0100111011111001-{address}      [BCS.S (*)+8;JMP <label>]
 10724:   //JBNLO.L <label>                                 |A|012346|-|----*|-----|          |0110_010_100_000_110-0100111011111001-{address}      [BCS.S (*)+8;JMP <label>]
 10725:   public static void irpBlosw () throws M68kException {
 10726:     XEiJ.mpuCycleCount++;
 10727:     int t = XEiJ.regPC;  //pc0+2
 10728:     int s = (byte) XEiJ.regOC;  //8bitディスプレースメント
 10729:     if (s == 0) {  //Bcc.W
 10730:       XEiJ.regPC = t + 2;  //pc0+4
 10731:       s = mmuReadWordSignExword (t, XEiJ.regSRS);  //16bitディスプレースメント
 10732:     }
 10733:     t += s;  //pc0+2+ディスプレースメント
 10734:     if ((t & 1) != 0) {  //分岐先のアドレスが奇数
 10735:       //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ
 10736:       irpBccAddressError (t);
 10737:     }
 10738:     if (XEiJ.MPU_CC_LO << XEiJ.regCCR < 0) {  //分岐する
 10739:       irpSetPC (t);
 10740:     }
 10741:   }  //irpBlosw
 10742: 
 10743:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10744:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 10745:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 10746:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10747:   //BCS.S <label>                                   |-|012346|-|----*|-----|          |0110_010_101_sss_sss
 10748:   //BLO.S <label>                                   |A|012346|-|----*|-----|          |0110_010_101_sss_sss [BCS.S <label>]
 10749:   //BNCC.S <label>                                  |A|012346|-|----*|-----|          |0110_010_101_sss_sss [BCS.S <label>]
 10750:   //BNHS.S <label>                                  |A|012346|-|----*|-----|          |0110_010_101_sss_sss [BCS.S <label>]
 10751:   //JBCS.S <label>                                  |A|012346|-|----*|-----|          |0110_010_101_sss_sss [BCS.S <label>]
 10752:   //JBLO.S <label>                                  |A|012346|-|----*|-----|          |0110_010_101_sss_sss [BCS.S <label>]
 10753:   //JBNCC.S <label>                                 |A|012346|-|----*|-----|          |0110_010_101_sss_sss [BCS.S <label>]
 10754:   //JBNHS.S <label>                                 |A|012346|-|----*|-----|          |0110_010_101_sss_sss [BCS.S <label>]
 10755:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10756:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 10757:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 10758:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10759:   //BCS.S <label>                                   |-|012346|-|----*|-----|          |0110_010_110_sss_sss
 10760:   //BLO.S <label>                                   |A|012346|-|----*|-----|          |0110_010_110_sss_sss [BCS.S <label>]
 10761:   //BNCC.S <label>                                  |A|012346|-|----*|-----|          |0110_010_110_sss_sss [BCS.S <label>]
 10762:   //BNHS.S <label>                                  |A|012346|-|----*|-----|          |0110_010_110_sss_sss [BCS.S <label>]
 10763:   //JBCS.S <label>                                  |A|012346|-|----*|-----|          |0110_010_110_sss_sss [BCS.S <label>]
 10764:   //JBLO.S <label>                                  |A|012346|-|----*|-----|          |0110_010_110_sss_sss [BCS.S <label>]
 10765:   //JBNCC.S <label>                                 |A|012346|-|----*|-----|          |0110_010_110_sss_sss [BCS.S <label>]
 10766:   //JBNHS.S <label>                                 |A|012346|-|----*|-----|          |0110_010_110_sss_sss [BCS.S <label>]
 10767:   public static void irpBlos () throws M68kException {
 10768:     XEiJ.mpuCycleCount++;
 10769:     int t = XEiJ.regPC;  //pc0+2
 10770:     int s = (byte) XEiJ.regOC;  //8bitディスプレースメント
 10771:     t += s;  //pc0+2+ディスプレースメント
 10772:     if ((t & 1) != 0) {  //分岐先のアドレスが奇数
 10773:       //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ
 10774:       irpBccAddressError (t);
 10775:     }
 10776:     if (XEiJ.MPU_CC_LO << XEiJ.regCCR < 0) {  //分岐する
 10777:       irpSetPC (t);
 10778:     }
 10779:   }  //irpBlos
 10780: 
 10781:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10782:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 10783:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 10784:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10785:   //BCS.S <label>                                   |-|--2346|-|----*|-----|          |0110_010_111_sss_sss (s is not equal to 63)
 10786:   //BLO.S <label>                                   |A|--2346|-|----*|-----|          |0110_010_111_sss_sss (s is not equal to 63)  [BCS.S <label>]
 10787:   //BNCC.S <label>                                  |A|--2346|-|----*|-----|          |0110_010_111_sss_sss (s is not equal to 63)  [BCS.S <label>]
 10788:   //BNHS.S <label>                                  |A|--2346|-|----*|-----|          |0110_010_111_sss_sss (s is not equal to 63)  [BCS.S <label>]
 10789:   //JBCS.S <label>                                  |A|--2346|-|----*|-----|          |0110_010_111_sss_sss (s is not equal to 63)  [BCS.S <label>]
 10790:   //JBLO.S <label>                                  |A|--2346|-|----*|-----|          |0110_010_111_sss_sss (s is not equal to 63)  [BCS.S <label>]
 10791:   //JBNCC.S <label>                                 |A|--2346|-|----*|-----|          |0110_010_111_sss_sss (s is not equal to 63)  [BCS.S <label>]
 10792:   //JBNHS.S <label>                                 |A|--2346|-|----*|-----|          |0110_010_111_sss_sss (s is not equal to 63)  [BCS.S <label>]
 10793:   //BCS.L <label>                                   |-|--2346|-|----*|-----|          |0110_010_111_111_111-{offset}
 10794:   //BLO.L <label>                                   |A|--2346|-|----*|-----|          |0110_010_111_111_111-{offset}        [BCS.L <label>]
 10795:   //BNCC.L <label>                                  |A|--2346|-|----*|-----|          |0110_010_111_111_111-{offset}        [BCS.L <label>]
 10796:   //BNHS.L <label>                                  |A|--2346|-|----*|-----|          |0110_010_111_111_111-{offset}        [BCS.L <label>]
 10797:   public static void irpBlosl () throws M68kException {
 10798:     XEiJ.mpuCycleCount++;
 10799:     int t = XEiJ.regPC;  //pc0+2
 10800:     int s = (byte) XEiJ.regOC;  //8bitディスプレースメント
 10801:     if (s == -1) {  //Bcc.L
 10802:       XEiJ.regPC = t + 4;  //pc0+6
 10803:       s = mmuReadLongExword (t, XEiJ.regSRS);  //32bitディスプレースメント
 10804:     }
 10805:     t += s;  //pc0+2+ディスプレースメント
 10806:     if ((t & 1) != 0) {  //分岐先のアドレスが奇数
 10807:       //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ
 10808:       irpBccAddressError (t);
 10809:     }
 10810:     if (XEiJ.MPU_CC_LO << XEiJ.regCCR < 0) {  //分岐する
 10811:       irpSetPC (t);
 10812:     }
 10813:   }  //irpBlosl
 10814: 
 10815:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10816:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 10817:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 10818:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10819:   //BNE.W <label>                                   |-|012346|-|--*--|-----|          |0110_011_000_000_000-{offset}
 10820:   //BNEQ.W <label>                                  |A|012346|-|--*--|-----|          |0110_011_000_000_000-{offset}        [BNE.W <label>]
 10821:   //BNZ.W <label>                                   |A|012346|-|--*--|-----|          |0110_011_000_000_000-{offset}        [BNE.W <label>]
 10822:   //BNZE.W <label>                                  |A|012346|-|--*--|-----|          |0110_011_000_000_000-{offset}        [BNE.W <label>]
 10823:   //JBNE.W <label>                                  |A|012346|-|--*--|-----|          |0110_011_000_000_000-{offset}        [BNE.W <label>]
 10824:   //JBNEQ.W <label>                                 |A|012346|-|--*--|-----|          |0110_011_000_000_000-{offset}        [BNE.W <label>]
 10825:   //JBNZ.W <label>                                  |A|012346|-|--*--|-----|          |0110_011_000_000_000-{offset}        [BNE.W <label>]
 10826:   //JBNZE.W <label>                                 |A|012346|-|--*--|-----|          |0110_011_000_000_000-{offset}        [BNE.W <label>]
 10827:   //BNE.S <label>                                   |-|012346|-|--*--|-----|          |0110_011_000_sss_sss (s is not equal to 0)
 10828:   //BNEQ.S <label>                                  |A|012346|-|--*--|-----|          |0110_011_000_sss_sss (s is not equal to 0)   [BNE.S <label>]
 10829:   //BNZ.S <label>                                   |A|012346|-|--*--|-----|          |0110_011_000_sss_sss (s is not equal to 0)   [BNE.S <label>]
 10830:   //BNZE.S <label>                                  |A|012346|-|--*--|-----|          |0110_011_000_sss_sss (s is not equal to 0)   [BNE.S <label>]
 10831:   //JBNE.S <label>                                  |A|012346|-|--*--|-----|          |0110_011_000_sss_sss (s is not equal to 0)   [BNE.S <label>]
 10832:   //JBNEQ.S <label>                                 |A|012346|-|--*--|-----|          |0110_011_000_sss_sss (s is not equal to 0)   [BNE.S <label>]
 10833:   //JBNZ.S <label>                                  |A|012346|-|--*--|-----|          |0110_011_000_sss_sss (s is not equal to 0)   [BNE.S <label>]
 10834:   //JBNZE.S <label>                                 |A|012346|-|--*--|-----|          |0110_011_000_sss_sss (s is not equal to 0)   [BNE.S <label>]
 10835:   //JBEQ.L <label>                                  |A|012346|-|--*--|-----|          |0110_011_000_000_110-0100111011111001-{address}      [BNE.S (*)+8;JMP <label>]
 10836:   //JBNEQ.L <label>                                 |A|012346|-|--*--|-----|          |0110_011_000_000_110-0100111011111001-{address}      [BNE.S (*)+8;JMP <label>]
 10837:   //JBNNE.L <label>                                 |A|012346|-|--*--|-----|          |0110_011_000_000_110-0100111011111001-{address}      [BNE.S (*)+8;JMP <label>]
 10838:   //JBNNZ.L <label>                                 |A|012346|-|--*--|-----|          |0110_011_000_000_110-0100111011111001-{address}      [BNE.S (*)+8;JMP <label>]
 10839:   //JBNZ.L <label>                                  |A|012346|-|--*--|-----|          |0110_011_000_000_110-0100111011111001-{address}      [BNE.S (*)+8;JMP <label>]
 10840:   //JBNZE.L <label>                                 |A|012346|-|--*--|-----|          |0110_011_000_000_110-0100111011111001-{address}      [BNE.S (*)+8;JMP <label>]
 10841:   //JBZE.L <label>                                  |A|012346|-|--*--|-----|          |0110_011_000_000_110-0100111011111001-{address}      [BNE.S (*)+8;JMP <label>]
 10842:   public static void irpBnesw () throws M68kException {
 10843:     XEiJ.mpuCycleCount++;
 10844:     int t = XEiJ.regPC;  //pc0+2
 10845:     int s = (byte) XEiJ.regOC;  //8bitディスプレースメント
 10846:     if (s == 0) {  //Bcc.W
 10847:       XEiJ.regPC = t + 2;  //pc0+4
 10848:       s = mmuReadWordSignExword (t, XEiJ.regSRS);  //16bitディスプレースメント
 10849:     }
 10850:     t += s;  //pc0+2+ディスプレースメント
 10851:     if ((t & 1) != 0) {  //分岐先のアドレスが奇数
 10852:       //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ
 10853:       irpBccAddressError (t);
 10854:     }
 10855:     if (XEiJ.MPU_CC_NE << XEiJ.regCCR < 0) {  //分岐する
 10856:       irpSetPC (t);
 10857:     }
 10858:   }  //irpBnesw
 10859: 
 10860:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10861:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 10862:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 10863:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10864:   //BNE.S <label>                                   |-|012346|-|--*--|-----|          |0110_011_001_sss_sss
 10865:   //BNEQ.S <label>                                  |A|012346|-|--*--|-----|          |0110_011_001_sss_sss [BNE.S <label>]
 10866:   //BNZ.S <label>                                   |A|012346|-|--*--|-----|          |0110_011_001_sss_sss [BNE.S <label>]
 10867:   //BNZE.S <label>                                  |A|012346|-|--*--|-----|          |0110_011_001_sss_sss [BNE.S <label>]
 10868:   //JBNE.S <label>                                  |A|012346|-|--*--|-----|          |0110_011_001_sss_sss [BNE.S <label>]
 10869:   //JBNEQ.S <label>                                 |A|012346|-|--*--|-----|          |0110_011_001_sss_sss [BNE.S <label>]
 10870:   //JBNZ.S <label>                                  |A|012346|-|--*--|-----|          |0110_011_001_sss_sss [BNE.S <label>]
 10871:   //JBNZE.S <label>                                 |A|012346|-|--*--|-----|          |0110_011_001_sss_sss [BNE.S <label>]
 10872:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10873:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 10874:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 10875:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10876:   //BNE.S <label>                                   |-|012346|-|--*--|-----|          |0110_011_010_sss_sss
 10877:   //BNEQ.S <label>                                  |A|012346|-|--*--|-----|          |0110_011_010_sss_sss [BNE.S <label>]
 10878:   //BNZ.S <label>                                   |A|012346|-|--*--|-----|          |0110_011_010_sss_sss [BNE.S <label>]
 10879:   //BNZE.S <label>                                  |A|012346|-|--*--|-----|          |0110_011_010_sss_sss [BNE.S <label>]
 10880:   //JBNE.S <label>                                  |A|012346|-|--*--|-----|          |0110_011_010_sss_sss [BNE.S <label>]
 10881:   //JBNEQ.S <label>                                 |A|012346|-|--*--|-----|          |0110_011_010_sss_sss [BNE.S <label>]
 10882:   //JBNZ.S <label>                                  |A|012346|-|--*--|-----|          |0110_011_010_sss_sss [BNE.S <label>]
 10883:   //JBNZE.S <label>                                 |A|012346|-|--*--|-----|          |0110_011_010_sss_sss [BNE.S <label>]
 10884:   public static void irpBnes () throws M68kException {
 10885:     XEiJ.mpuCycleCount++;
 10886:     int t = XEiJ.regPC;  //pc0+2
 10887:     int s = (byte) XEiJ.regOC;  //8bitディスプレースメント
 10888:     t += s;  //pc0+2+ディスプレースメント
 10889:     if ((t & 1) != 0) {  //分岐先のアドレスが奇数
 10890:       //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ
 10891:       irpBccAddressError (t);
 10892:     }
 10893:     if (XEiJ.MPU_CC_NE << XEiJ.regCCR < 0) {  //分岐する
 10894:       irpSetPC (t);
 10895:     }
 10896:   }  //irpBnes
 10897: 
 10898:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10899:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 10900:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 10901:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10902:   //BNE.S <label>                                   |-|--2346|-|--*--|-----|          |0110_011_011_sss_sss (s is not equal to 63)
 10903:   //BNEQ.S <label>                                  |A|--2346|-|--*--|-----|          |0110_011_011_sss_sss (s is not equal to 63)  [BNE.S <label>]
 10904:   //BNZ.S <label>                                   |A|--2346|-|--*--|-----|          |0110_011_011_sss_sss (s is not equal to 63)  [BNE.S <label>]
 10905:   //BNZE.S <label>                                  |A|--2346|-|--*--|-----|          |0110_011_011_sss_sss (s is not equal to 63)  [BNE.S <label>]
 10906:   //JBNE.S <label>                                  |A|--2346|-|--*--|-----|          |0110_011_011_sss_sss (s is not equal to 63)  [BNE.S <label>]
 10907:   //JBNEQ.S <label>                                 |A|--2346|-|--*--|-----|          |0110_011_011_sss_sss (s is not equal to 63)  [BNE.S <label>]
 10908:   //JBNZ.S <label>                                  |A|--2346|-|--*--|-----|          |0110_011_011_sss_sss (s is not equal to 63)  [BNE.S <label>]
 10909:   //JBNZE.S <label>                                 |A|--2346|-|--*--|-----|          |0110_011_011_sss_sss (s is not equal to 63)  [BNE.S <label>]
 10910:   //BNE.L <label>                                   |-|--2346|-|--*--|-----|          |0110_011_011_111_111-{offset}
 10911:   //BNEQ.L <label>                                  |A|--2346|-|--*--|-----|          |0110_011_011_111_111-{offset}        [BNE.L <label>]
 10912:   //BNZ.L <label>                                   |A|--2346|-|--*--|-----|          |0110_011_011_111_111-{offset}        [BNE.L <label>]
 10913:   //BNZE.L <label>                                  |A|--2346|-|--*--|-----|          |0110_011_011_111_111-{offset}        [BNE.L <label>]
 10914:   public static void irpBnesl () throws M68kException {
 10915:     XEiJ.mpuCycleCount++;
 10916:     int t = XEiJ.regPC;  //pc0+2
 10917:     int s = (byte) XEiJ.regOC;  //8bitディスプレースメント
 10918:     if (s == -1) {  //Bcc.L
 10919:       XEiJ.regPC = t + 4;  //pc0+6
 10920:       s = mmuReadLongExword (t, XEiJ.regSRS);  //32bitディスプレースメント
 10921:     }
 10922:     t += s;  //pc0+2+ディスプレースメント
 10923:     if ((t & 1) != 0) {  //分岐先のアドレスが奇数
 10924:       //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ
 10925:       irpBccAddressError (t);
 10926:     }
 10927:     if (XEiJ.MPU_CC_NE << XEiJ.regCCR < 0) {  //分岐する
 10928:       irpSetPC (t);
 10929:     }
 10930:   }  //irpBnesl
 10931: 
 10932:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10933:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 10934:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 10935:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10936:   //BEQ.W <label>                                   |-|012346|-|--*--|-----|          |0110_011_100_000_000-{offset}
 10937:   //BNNE.W <label>                                  |A|012346|-|--*--|-----|          |0110_011_100_000_000-{offset}        [BEQ.W <label>]
 10938:   //BNNZ.W <label>                                  |A|012346|-|--*--|-----|          |0110_011_100_000_000-{offset}        [BEQ.W <label>]
 10939:   //BZE.W <label>                                   |A|012346|-|--*--|-----|          |0110_011_100_000_000-{offset}        [BEQ.W <label>]
 10940:   //JBEQ.W <label>                                  |A|012346|-|--*--|-----|          |0110_011_100_000_000-{offset}        [BEQ.W <label>]
 10941:   //JBNNE.W <label>                                 |A|012346|-|--*--|-----|          |0110_011_100_000_000-{offset}        [BEQ.W <label>]
 10942:   //JBNNZ.W <label>                                 |A|012346|-|--*--|-----|          |0110_011_100_000_000-{offset}        [BEQ.W <label>]
 10943:   //JBZE.W <label>                                  |A|012346|-|--*--|-----|          |0110_011_100_000_000-{offset}        [BEQ.W <label>]
 10944:   //BEQ.S <label>                                   |-|012346|-|--*--|-----|          |0110_011_100_sss_sss (s is not equal to 0)
 10945:   //BNNE.S <label>                                  |A|012346|-|--*--|-----|          |0110_011_100_sss_sss (s is not equal to 0)   [BEQ.S <label>]
 10946:   //BNNZ.S <label>                                  |A|012346|-|--*--|-----|          |0110_011_100_sss_sss (s is not equal to 0)   [BEQ.S <label>]
 10947:   //BZE.S <label>                                   |A|012346|-|--*--|-----|          |0110_011_100_sss_sss (s is not equal to 0)   [BEQ.S <label>]
 10948:   //JBEQ.S <label>                                  |A|012346|-|--*--|-----|          |0110_011_100_sss_sss (s is not equal to 0)   [BEQ.S <label>]
 10949:   //JBNNE.S <label>                                 |A|012346|-|--*--|-----|          |0110_011_100_sss_sss (s is not equal to 0)   [BEQ.S <label>]
 10950:   //JBNNZ.S <label>                                 |A|012346|-|--*--|-----|          |0110_011_100_sss_sss (s is not equal to 0)   [BEQ.S <label>]
 10951:   //JBZE.S <label>                                  |A|012346|-|--*--|-----|          |0110_011_100_sss_sss (s is not equal to 0)   [BEQ.S <label>]
 10952:   //JBNE.L <label>                                  |A|012346|-|--*--|-----|          |0110_011_100_000_110-0100111011111001-{address}      [BEQ.S (*)+8;JMP <label>]
 10953:   public static void irpBeqsw () throws M68kException {
 10954:     XEiJ.mpuCycleCount++;
 10955:     int t = XEiJ.regPC;  //pc0+2
 10956:     int s = (byte) XEiJ.regOC;  //8bitディスプレースメント
 10957:     if (s == 0) {  //Bcc.W
 10958:       XEiJ.regPC = t + 2;  //pc0+4
 10959:       s = mmuReadWordSignExword (t, XEiJ.regSRS);  //16bitディスプレースメント
 10960:     }
 10961:     t += s;  //pc0+2+ディスプレースメント
 10962:     if ((t & 1) != 0) {  //分岐先のアドレスが奇数
 10963:       //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ
 10964:       irpBccAddressError (t);
 10965:     }
 10966:     if (XEiJ.MPU_CC_EQ << XEiJ.regCCR < 0) {  //分岐する
 10967:       irpSetPC (t);
 10968:     }
 10969:   }  //irpBeqsw
 10970: 
 10971:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10972:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 10973:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 10974:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10975:   //BEQ.S <label>                                   |-|012346|-|--*--|-----|          |0110_011_101_sss_sss
 10976:   //BNNE.S <label>                                  |A|012346|-|--*--|-----|          |0110_011_101_sss_sss [BEQ.S <label>]
 10977:   //BNNZ.S <label>                                  |A|012346|-|--*--|-----|          |0110_011_101_sss_sss [BEQ.S <label>]
 10978:   //BZE.S <label>                                   |A|012346|-|--*--|-----|          |0110_011_101_sss_sss [BEQ.S <label>]
 10979:   //JBEQ.S <label>                                  |A|012346|-|--*--|-----|          |0110_011_101_sss_sss [BEQ.S <label>]
 10980:   //JBNNE.S <label>                                 |A|012346|-|--*--|-----|          |0110_011_101_sss_sss [BEQ.S <label>]
 10981:   //JBNNZ.S <label>                                 |A|012346|-|--*--|-----|          |0110_011_101_sss_sss [BEQ.S <label>]
 10982:   //JBZE.S <label>                                  |A|012346|-|--*--|-----|          |0110_011_101_sss_sss [BEQ.S <label>]
 10983:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10984:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 10985:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 10986:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10987:   //BEQ.S <label>                                   |-|012346|-|--*--|-----|          |0110_011_110_sss_sss
 10988:   //BNNE.S <label>                                  |A|012346|-|--*--|-----|          |0110_011_110_sss_sss [BEQ.S <label>]
 10989:   //BNNZ.S <label>                                  |A|012346|-|--*--|-----|          |0110_011_110_sss_sss [BEQ.S <label>]
 10990:   //BZE.S <label>                                   |A|012346|-|--*--|-----|          |0110_011_110_sss_sss [BEQ.S <label>]
 10991:   //JBEQ.S <label>                                  |A|012346|-|--*--|-----|          |0110_011_110_sss_sss [BEQ.S <label>]
 10992:   //JBNNE.S <label>                                 |A|012346|-|--*--|-----|          |0110_011_110_sss_sss [BEQ.S <label>]
 10993:   //JBNNZ.S <label>                                 |A|012346|-|--*--|-----|          |0110_011_110_sss_sss [BEQ.S <label>]
 10994:   //JBZE.S <label>                                  |A|012346|-|--*--|-----|          |0110_011_110_sss_sss [BEQ.S <label>]
 10995:   public static void irpBeqs () throws M68kException {
 10996:     XEiJ.mpuCycleCount++;
 10997:     int t = XEiJ.regPC;  //pc0+2
 10998:     int s = (byte) XEiJ.regOC;  //8bitディスプレースメント
 10999:     t += s;  //pc0+2+ディスプレースメント
 11000:     if ((t & 1) != 0) {  //分岐先のアドレスが奇数
 11001:       //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ
 11002:       irpBccAddressError (t);
 11003:     }
 11004:     if (XEiJ.MPU_CC_EQ << XEiJ.regCCR < 0) {  //分岐する
 11005:       irpSetPC (t);
 11006:     }
 11007:   }  //irpBeqs
 11008: 
 11009:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11010:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 11011:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 11012:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11013:   //BEQ.S <label>                                   |-|--2346|-|--*--|-----|          |0110_011_111_sss_sss (s is not equal to 63)
 11014:   //BNNE.S <label>                                  |A|--2346|-|--*--|-----|          |0110_011_111_sss_sss (s is not equal to 63)  [BEQ.S <label>]
 11015:   //BNNZ.S <label>                                  |A|--2346|-|--*--|-----|          |0110_011_111_sss_sss (s is not equal to 63)  [BEQ.S <label>]
 11016:   //BZE.S <label>                                   |A|--2346|-|--*--|-----|          |0110_011_111_sss_sss (s is not equal to 63)  [BEQ.S <label>]
 11017:   //JBEQ.S <label>                                  |A|--2346|-|--*--|-----|          |0110_011_111_sss_sss (s is not equal to 63)  [BEQ.S <label>]
 11018:   //JBNNE.S <label>                                 |A|--2346|-|--*--|-----|          |0110_011_111_sss_sss (s is not equal to 63)  [BEQ.S <label>]
 11019:   //JBNNZ.S <label>                                 |A|--2346|-|--*--|-----|          |0110_011_111_sss_sss (s is not equal to 63)  [BEQ.S <label>]
 11020:   //JBZE.S <label>                                  |A|--2346|-|--*--|-----|          |0110_011_111_sss_sss (s is not equal to 63)  [BEQ.S <label>]
 11021:   //BEQ.L <label>                                   |-|--2346|-|--*--|-----|          |0110_011_111_111_111-{offset}
 11022:   //BNNE.L <label>                                  |A|--2346|-|--*--|-----|          |0110_011_111_111_111-{offset}        [BEQ.L <label>]
 11023:   //BNNZ.L <label>                                  |A|--2346|-|--*--|-----|          |0110_011_111_111_111-{offset}        [BEQ.L <label>]
 11024:   //BZE.L <label>                                   |A|--2346|-|--*--|-----|          |0110_011_111_111_111-{offset}        [BEQ.L <label>]
 11025:   public static void irpBeqsl () throws M68kException {
 11026:     XEiJ.mpuCycleCount++;
 11027:     int t = XEiJ.regPC;  //pc0+2
 11028:     int s = (byte) XEiJ.regOC;  //8bitディスプレースメント
 11029:     if (s == -1) {  //Bcc.L
 11030:       XEiJ.regPC = t + 4;  //pc0+6
 11031:       s = mmuReadLongExword (t, XEiJ.regSRS);  //32bitディスプレースメント
 11032:     }
 11033:     t += s;  //pc0+2+ディスプレースメント
 11034:     if ((t & 1) != 0) {  //分岐先のアドレスが奇数
 11035:       //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ
 11036:       irpBccAddressError (t);
 11037:     }
 11038:     if (XEiJ.MPU_CC_EQ << XEiJ.regCCR < 0) {  //分岐する
 11039:       irpSetPC (t);
 11040:     }
 11041:   }  //irpBeqsl
 11042: 
 11043:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11044:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 11045:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 11046:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11047:   //BVC.W <label>                                   |-|012346|-|---*-|-----|          |0110_100_000_000_000-{offset}
 11048:   //BNVS.W <label>                                  |A|012346|-|---*-|-----|          |0110_100_000_000_000-{offset}        [BVC.W <label>]
 11049:   //JBNVS.W <label>                                 |A|012346|-|---*-|-----|          |0110_100_000_000_000-{offset}        [BVC.W <label>]
 11050:   //JBVC.W <label>                                  |A|012346|-|---*-|-----|          |0110_100_000_000_000-{offset}        [BVC.W <label>]
 11051:   //BVC.S <label>                                   |-|012346|-|---*-|-----|          |0110_100_000_sss_sss (s is not equal to 0)
 11052:   //BNVS.S <label>                                  |A|012346|-|---*-|-----|          |0110_100_000_sss_sss (s is not equal to 0)   [BVC.S <label>]
 11053:   //JBNVS.S <label>                                 |A|012346|-|---*-|-----|          |0110_100_000_sss_sss (s is not equal to 0)   [BVC.S <label>]
 11054:   //JBVC.S <label>                                  |A|012346|-|---*-|-----|          |0110_100_000_sss_sss (s is not equal to 0)   [BVC.S <label>]
 11055:   //JBNVC.L <label>                                 |A|012346|-|---*-|-----|          |0110_100_000_000_110-0100111011111001-{address}      [BVC.S (*)+8;JMP <label>]
 11056:   //JBVS.L <label>                                  |A|012346|-|---*-|-----|          |0110_100_000_000_110-0100111011111001-{address}      [BVC.S (*)+8;JMP <label>]
 11057:   public static void irpBvcsw () throws M68kException {
 11058:     XEiJ.mpuCycleCount++;
 11059:     int t = XEiJ.regPC;  //pc0+2
 11060:     int s = (byte) XEiJ.regOC;  //8bitディスプレースメント
 11061:     if (s == 0) {  //Bcc.W
 11062:       XEiJ.regPC = t + 2;  //pc0+4
 11063:       s = mmuReadWordSignExword (t, XEiJ.regSRS);  //16bitディスプレースメント
 11064:     }
 11065:     t += s;  //pc0+2+ディスプレースメント
 11066:     if ((t & 1) != 0) {  //分岐先のアドレスが奇数
 11067:       //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ
 11068:       irpBccAddressError (t);
 11069:     }
 11070:     if (XEiJ.MPU_CC_VC << XEiJ.regCCR < 0) {  //分岐する
 11071:       irpSetPC (t);
 11072:     }
 11073:   }  //irpBvcsw
 11074: 
 11075:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11076:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 11077:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 11078:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11079:   //BVC.S <label>                                   |-|012346|-|---*-|-----|          |0110_100_001_sss_sss
 11080:   //BNVS.S <label>                                  |A|012346|-|---*-|-----|          |0110_100_001_sss_sss [BVC.S <label>]
 11081:   //JBNVS.S <label>                                 |A|012346|-|---*-|-----|          |0110_100_001_sss_sss [BVC.S <label>]
 11082:   //JBVC.S <label>                                  |A|012346|-|---*-|-----|          |0110_100_001_sss_sss [BVC.S <label>]
 11083:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11084:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 11085:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 11086:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11087:   //BVC.S <label>                                   |-|012346|-|---*-|-----|          |0110_100_010_sss_sss
 11088:   //BNVS.S <label>                                  |A|012346|-|---*-|-----|          |0110_100_010_sss_sss [BVC.S <label>]
 11089:   //JBNVS.S <label>                                 |A|012346|-|---*-|-----|          |0110_100_010_sss_sss [BVC.S <label>]
 11090:   //JBVC.S <label>                                  |A|012346|-|---*-|-----|          |0110_100_010_sss_sss [BVC.S <label>]
 11091:   public static void irpBvcs () throws M68kException {
 11092:     XEiJ.mpuCycleCount++;
 11093:     int t = XEiJ.regPC;  //pc0+2
 11094:     int s = (byte) XEiJ.regOC;  //8bitディスプレースメント
 11095:     t += s;  //pc0+2+ディスプレースメント
 11096:     if ((t & 1) != 0) {  //分岐先のアドレスが奇数
 11097:       //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ
 11098:       irpBccAddressError (t);
 11099:     }
 11100:     if (XEiJ.MPU_CC_VC << XEiJ.regCCR < 0) {  //分岐する
 11101:       irpSetPC (t);
 11102:     }
 11103:   }  //irpBvcs
 11104: 
 11105:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11106:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 11107:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 11108:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11109:   //BVC.S <label>                                   |-|--2346|-|---*-|-----|          |0110_100_011_sss_sss (s is not equal to 63)
 11110:   //BNVS.S <label>                                  |A|--2346|-|---*-|-----|          |0110_100_011_sss_sss (s is not equal to 63)  [BVC.S <label>]
 11111:   //JBNVS.S <label>                                 |A|--2346|-|---*-|-----|          |0110_100_011_sss_sss (s is not equal to 63)  [BVC.S <label>]
 11112:   //JBVC.S <label>                                  |A|--2346|-|---*-|-----|          |0110_100_011_sss_sss (s is not equal to 63)  [BVC.S <label>]
 11113:   //BVC.L <label>                                   |-|--2346|-|---*-|-----|          |0110_100_011_111_111-{offset}
 11114:   //BNVS.L <label>                                  |A|--2346|-|---*-|-----|          |0110_100_011_111_111-{offset}        [BVC.L <label>]
 11115:   public static void irpBvcsl () throws M68kException {
 11116:     XEiJ.mpuCycleCount++;
 11117:     int t = XEiJ.regPC;  //pc0+2
 11118:     int s = (byte) XEiJ.regOC;  //8bitディスプレースメント
 11119:     if (s == -1) {  //Bcc.L
 11120:       XEiJ.regPC = t + 4;  //pc0+6
 11121:       s = mmuReadLongExword (t, XEiJ.regSRS);  //32bitディスプレースメント
 11122:     }
 11123:     t += s;  //pc0+2+ディスプレースメント
 11124:     if ((t & 1) != 0) {  //分岐先のアドレスが奇数
 11125:       //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ
 11126:       irpBccAddressError (t);
 11127:     }
 11128:     if (XEiJ.MPU_CC_VC << XEiJ.regCCR < 0) {  //分岐する
 11129:       irpSetPC (t);
 11130:     }
 11131:   }  //irpBvcsl
 11132: 
 11133:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11134:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 11135:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 11136:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11137:   //BVS.W <label>                                   |-|012346|-|---*-|-----|          |0110_100_100_000_000-{offset}
 11138:   //BNVC.W <label>                                  |A|012346|-|---*-|-----|          |0110_100_100_000_000-{offset}        [BVS.W <label>]
 11139:   //JBNVC.W <label>                                 |A|012346|-|---*-|-----|          |0110_100_100_000_000-{offset}        [BVS.W <label>]
 11140:   //JBVS.W <label>                                  |A|012346|-|---*-|-----|          |0110_100_100_000_000-{offset}        [BVS.W <label>]
 11141:   //BVS.S <label>                                   |-|012346|-|---*-|-----|          |0110_100_100_sss_sss (s is not equal to 0)
 11142:   //BNVC.S <label>                                  |A|012346|-|---*-|-----|          |0110_100_100_sss_sss (s is not equal to 0)   [BVS.S <label>]
 11143:   //JBNVC.S <label>                                 |A|012346|-|---*-|-----|          |0110_100_100_sss_sss (s is not equal to 0)   [BVS.S <label>]
 11144:   //JBVS.S <label>                                  |A|012346|-|---*-|-----|          |0110_100_100_sss_sss (s is not equal to 0)   [BVS.S <label>]
 11145:   //JBNVS.L <label>                                 |A|012346|-|---*-|-----|          |0110_100_100_000_110-0100111011111001-{address}      [BVS.S (*)+8;JMP <label>]
 11146:   //JBVC.L <label>                                  |A|012346|-|---*-|-----|          |0110_100_100_000_110-0100111011111001-{address}      [BVS.S (*)+8;JMP <label>]
 11147:   public static void irpBvssw () throws M68kException {
 11148:     XEiJ.mpuCycleCount++;
 11149:     int t = XEiJ.regPC;  //pc0+2
 11150:     int s = (byte) XEiJ.regOC;  //8bitディスプレースメント
 11151:     if (s == 0) {  //Bcc.W
 11152:       XEiJ.regPC = t + 2;  //pc0+4
 11153:       s = mmuReadWordSignExword (t, XEiJ.regSRS);  //16bitディスプレースメント
 11154:     }
 11155:     t += s;  //pc0+2+ディスプレースメント
 11156:     if ((t & 1) != 0) {  //分岐先のアドレスが奇数
 11157:       //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ
 11158:       irpBccAddressError (t);
 11159:     }
 11160:     if (XEiJ.MPU_CC_VS << XEiJ.regCCR < 0) {  //分岐する
 11161:       irpSetPC (t);
 11162:     }
 11163:   }  //irpBvssw
 11164: 
 11165:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11166:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 11167:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 11168:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11169:   //BVS.S <label>                                   |-|012346|-|---*-|-----|          |0110_100_101_sss_sss
 11170:   //BNVC.S <label>                                  |A|012346|-|---*-|-----|          |0110_100_101_sss_sss [BVS.S <label>]
 11171:   //JBNVC.S <label>                                 |A|012346|-|---*-|-----|          |0110_100_101_sss_sss [BVS.S <label>]
 11172:   //JBVS.S <label>                                  |A|012346|-|---*-|-----|          |0110_100_101_sss_sss [BVS.S <label>]
 11173:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11174:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 11175:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 11176:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11177:   //BVS.S <label>                                   |-|012346|-|---*-|-----|          |0110_100_110_sss_sss
 11178:   //BNVC.S <label>                                  |A|012346|-|---*-|-----|          |0110_100_110_sss_sss [BVS.S <label>]
 11179:   //JBNVC.S <label>                                 |A|012346|-|---*-|-----|          |0110_100_110_sss_sss [BVS.S <label>]
 11180:   //JBVS.S <label>                                  |A|012346|-|---*-|-----|          |0110_100_110_sss_sss [BVS.S <label>]
 11181:   public static void irpBvss () throws M68kException {
 11182:     XEiJ.mpuCycleCount++;
 11183:     int t = XEiJ.regPC;  //pc0+2
 11184:     int s = (byte) XEiJ.regOC;  //8bitディスプレースメント
 11185:     t += s;  //pc0+2+ディスプレースメント
 11186:     if ((t & 1) != 0) {  //分岐先のアドレスが奇数
 11187:       //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ
 11188:       irpBccAddressError (t);
 11189:     }
 11190:     if (XEiJ.MPU_CC_VS << XEiJ.regCCR < 0) {  //分岐する
 11191:       irpSetPC (t);
 11192:     }
 11193:   }  //irpBvss
 11194: 
 11195:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11196:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 11197:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 11198:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11199:   //BVS.S <label>                                   |-|--2346|-|---*-|-----|          |0110_100_111_sss_sss (s is not equal to 63)
 11200:   //BNVC.S <label>                                  |A|--2346|-|---*-|-----|          |0110_100_111_sss_sss (s is not equal to 63)  [BVS.S <label>]
 11201:   //JBNVC.S <label>                                 |A|--2346|-|---*-|-----|          |0110_100_111_sss_sss (s is not equal to 63)  [BVS.S <label>]
 11202:   //JBVS.S <label>                                  |A|--2346|-|---*-|-----|          |0110_100_111_sss_sss (s is not equal to 63)  [BVS.S <label>]
 11203:   //BVS.L <label>                                   |-|--2346|-|---*-|-----|          |0110_100_111_111_111-{offset}
 11204:   //BNVC.L <label>                                  |A|--2346|-|---*-|-----|          |0110_100_111_111_111-{offset}        [BVS.L <label>]
 11205:   public static void irpBvssl () throws M68kException {
 11206:     XEiJ.mpuCycleCount++;
 11207:     int t = XEiJ.regPC;  //pc0+2
 11208:     int s = (byte) XEiJ.regOC;  //8bitディスプレースメント
 11209:     if (s == -1) {  //Bcc.L
 11210:       XEiJ.regPC = t + 4;  //pc0+6
 11211:       s = mmuReadLongExword (t, XEiJ.regSRS);  //32bitディスプレースメント
 11212:     }
 11213:     t += s;  //pc0+2+ディスプレースメント
 11214:     if ((t & 1) != 0) {  //分岐先のアドレスが奇数
 11215:       //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ
 11216:       irpBccAddressError (t);
 11217:     }
 11218:     if (XEiJ.MPU_CC_VS << XEiJ.regCCR < 0) {  //分岐する
 11219:       irpSetPC (t);
 11220:     }
 11221:   }  //irpBvssl
 11222: 
 11223:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11224:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 11225:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 11226:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11227:   //BPL.W <label>                                   |-|012346|-|-*---|-----|          |0110_101_000_000_000-{offset}
 11228:   //BNMI.W <label>                                  |A|012346|-|-*---|-----|          |0110_101_000_000_000-{offset}        [BPL.W <label>]
 11229:   //JBNMI.W <label>                                 |A|012346|-|-*---|-----|          |0110_101_000_000_000-{offset}        [BPL.W <label>]
 11230:   //JBPL.W <label>                                  |A|012346|-|-*---|-----|          |0110_101_000_000_000-{offset}        [BPL.W <label>]
 11231:   //BPL.S <label>                                   |-|012346|-|-*---|-----|          |0110_101_000_sss_sss (s is not equal to 0)
 11232:   //BNMI.S <label>                                  |A|012346|-|-*---|-----|          |0110_101_000_sss_sss (s is not equal to 0)   [BPL.S <label>]
 11233:   //JBNMI.S <label>                                 |A|012346|-|-*---|-----|          |0110_101_000_sss_sss (s is not equal to 0)   [BPL.S <label>]
 11234:   //JBPL.S <label>                                  |A|012346|-|-*---|-----|          |0110_101_000_sss_sss (s is not equal to 0)   [BPL.S <label>]
 11235:   //JBMI.L <label>                                  |A|012346|-|-*---|-----|          |0110_101_000_000_110-0100111011111001-{address}      [BPL.S (*)+8;JMP <label>]
 11236:   //JBNPL.L <label>                                 |A|012346|-|-*---|-----|          |0110_101_000_000_110-0100111011111001-{address}      [BPL.S (*)+8;JMP <label>]
 11237:   public static void irpBplsw () throws M68kException {
 11238:     XEiJ.mpuCycleCount++;
 11239:     int t = XEiJ.regPC;  //pc0+2
 11240:     int s = (byte) XEiJ.regOC;  //8bitディスプレースメント
 11241:     if (s == 0) {  //Bcc.W
 11242:       XEiJ.regPC = t + 2;  //pc0+4
 11243:       s = mmuReadWordSignExword (t, XEiJ.regSRS);  //16bitディスプレースメント
 11244:     }
 11245:     t += s;  //pc0+2+ディスプレースメント
 11246:     if ((t & 1) != 0) {  //分岐先のアドレスが奇数
 11247:       //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ
 11248:       irpBccAddressError (t);
 11249:     }
 11250:     if (XEiJ.MPU_CC_PL << XEiJ.regCCR < 0) {  //分岐する
 11251:       irpSetPC (t);
 11252:     }
 11253:   }  //irpBplsw
 11254: 
 11255:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11256:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 11257:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 11258:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11259:   //BPL.S <label>                                   |-|012346|-|-*---|-----|          |0110_101_001_sss_sss
 11260:   //BNMI.S <label>                                  |A|012346|-|-*---|-----|          |0110_101_001_sss_sss [BPL.S <label>]
 11261:   //JBNMI.S <label>                                 |A|012346|-|-*---|-----|          |0110_101_001_sss_sss [BPL.S <label>]
 11262:   //JBPL.S <label>                                  |A|012346|-|-*---|-----|          |0110_101_001_sss_sss [BPL.S <label>]
 11263:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11264:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 11265:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 11266:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11267:   //BPL.S <label>                                   |-|012346|-|-*---|-----|          |0110_101_010_sss_sss
 11268:   //BNMI.S <label>                                  |A|012346|-|-*---|-----|          |0110_101_010_sss_sss [BPL.S <label>]
 11269:   //JBNMI.S <label>                                 |A|012346|-|-*---|-----|          |0110_101_010_sss_sss [BPL.S <label>]
 11270:   //JBPL.S <label>                                  |A|012346|-|-*---|-----|          |0110_101_010_sss_sss [BPL.S <label>]
 11271:   public static void irpBpls () throws M68kException {
 11272:     XEiJ.mpuCycleCount++;
 11273:     int t = XEiJ.regPC;  //pc0+2
 11274:     int s = (byte) XEiJ.regOC;  //8bitディスプレースメント
 11275:     t += s;  //pc0+2+ディスプレースメント
 11276:     if ((t & 1) != 0) {  //分岐先のアドレスが奇数
 11277:       //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ
 11278:       irpBccAddressError (t);
 11279:     }
 11280:     if (XEiJ.MPU_CC_PL << XEiJ.regCCR < 0) {  //分岐する
 11281:       irpSetPC (t);
 11282:     }
 11283:   }  //irpBpls
 11284: 
 11285:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11286:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 11287:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 11288:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11289:   //BPL.S <label>                                   |-|--2346|-|-*---|-----|          |0110_101_011_sss_sss (s is not equal to 63)
 11290:   //BNMI.S <label>                                  |A|--2346|-|-*---|-----|          |0110_101_011_sss_sss (s is not equal to 63)  [BPL.S <label>]
 11291:   //JBNMI.S <label>                                 |A|--2346|-|-*---|-----|          |0110_101_011_sss_sss (s is not equal to 63)  [BPL.S <label>]
 11292:   //JBPL.S <label>                                  |A|--2346|-|-*---|-----|          |0110_101_011_sss_sss (s is not equal to 63)  [BPL.S <label>]
 11293:   //BPL.L <label>                                   |-|--2346|-|-*---|-----|          |0110_101_011_111_111-{offset}
 11294:   //BNMI.L <label>                                  |A|--2346|-|-*---|-----|          |0110_101_011_111_111-{offset}        [BPL.L <label>]
 11295:   public static void irpBplsl () throws M68kException {
 11296:     XEiJ.mpuCycleCount++;
 11297:     int t = XEiJ.regPC;  //pc0+2
 11298:     int s = (byte) XEiJ.regOC;  //8bitディスプレースメント
 11299:     if (s == -1) {  //Bcc.L
 11300:       XEiJ.regPC = t + 4;  //pc0+6
 11301:       s = mmuReadLongExword (t, XEiJ.regSRS);  //32bitディスプレースメント
 11302:     }
 11303:     t += s;  //pc0+2+ディスプレースメント
 11304:     if ((t & 1) != 0) {  //分岐先のアドレスが奇数
 11305:       //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ
 11306:       irpBccAddressError (t);
 11307:     }
 11308:     if (XEiJ.MPU_CC_PL << XEiJ.regCCR < 0) {  //分岐する
 11309:       irpSetPC (t);
 11310:     }
 11311:   }  //irpBplsl
 11312: 
 11313:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11314:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 11315:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 11316:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11317:   //BMI.W <label>                                   |-|012346|-|-*---|-----|          |0110_101_100_000_000-{offset}
 11318:   //BNPL.W <label>                                  |A|012346|-|-*---|-----|          |0110_101_100_000_000-{offset}        [BMI.W <label>]
 11319:   //JBMI.W <label>                                  |A|012346|-|-*---|-----|          |0110_101_100_000_000-{offset}        [BMI.W <label>]
 11320:   //JBNPL.W <label>                                 |A|012346|-|-*---|-----|          |0110_101_100_000_000-{offset}        [BMI.W <label>]
 11321:   //BMI.S <label>                                   |-|012346|-|-*---|-----|          |0110_101_100_sss_sss (s is not equal to 0)
 11322:   //BNPL.S <label>                                  |A|012346|-|-*---|-----|          |0110_101_100_sss_sss (s is not equal to 0)   [BMI.S <label>]
 11323:   //JBMI.S <label>                                  |A|012346|-|-*---|-----|          |0110_101_100_sss_sss (s is not equal to 0)   [BMI.S <label>]
 11324:   //JBNPL.S <label>                                 |A|012346|-|-*---|-----|          |0110_101_100_sss_sss (s is not equal to 0)   [BMI.S <label>]
 11325:   //JBNMI.L <label>                                 |A|012346|-|-*---|-----|          |0110_101_100_000_110-0100111011111001-{address}      [BMI.S (*)+8;JMP <label>]
 11326:   //JBPL.L <label>                                  |A|012346|-|-*---|-----|          |0110_101_100_000_110-0100111011111001-{address}      [BMI.S (*)+8;JMP <label>]
 11327:   public static void irpBmisw () throws M68kException {
 11328:     XEiJ.mpuCycleCount++;
 11329:     int t = XEiJ.regPC;  //pc0+2
 11330:     int s = (byte) XEiJ.regOC;  //8bitディスプレースメント
 11331:     if (s == 0) {  //Bcc.W
 11332:       XEiJ.regPC = t + 2;  //pc0+4
 11333:       s = mmuReadWordSignExword (t, XEiJ.regSRS);  //16bitディスプレースメント
 11334:     }
 11335:     t += s;  //pc0+2+ディスプレースメント
 11336:     if ((t & 1) != 0) {  //分岐先のアドレスが奇数
 11337:       //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ
 11338:       irpBccAddressError (t);
 11339:     }
 11340:     if (XEiJ.MPU_CC_MI << XEiJ.regCCR < 0) {  //分岐する
 11341:       irpSetPC (t);
 11342:     }
 11343:   }  //irpBmisw
 11344: 
 11345:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11346:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 11347:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 11348:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11349:   //BMI.S <label>                                   |-|012346|-|-*---|-----|          |0110_101_101_sss_sss
 11350:   //BNPL.S <label>                                  |A|012346|-|-*---|-----|          |0110_101_101_sss_sss [BMI.S <label>]
 11351:   //JBMI.S <label>                                  |A|012346|-|-*---|-----|          |0110_101_101_sss_sss [BMI.S <label>]
 11352:   //JBNPL.S <label>                                 |A|012346|-|-*---|-----|          |0110_101_101_sss_sss [BMI.S <label>]
 11353:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11354:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 11355:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 11356:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11357:   //BMI.S <label>                                   |-|012346|-|-*---|-----|          |0110_101_110_sss_sss
 11358:   //BNPL.S <label>                                  |A|012346|-|-*---|-----|          |0110_101_110_sss_sss [BMI.S <label>]
 11359:   //JBMI.S <label>                                  |A|012346|-|-*---|-----|          |0110_101_110_sss_sss [BMI.S <label>]
 11360:   //JBNPL.S <label>                                 |A|012346|-|-*---|-----|          |0110_101_110_sss_sss [BMI.S <label>]
 11361:   public static void irpBmis () throws M68kException {
 11362:     XEiJ.mpuCycleCount++;
 11363:     int t = XEiJ.regPC;  //pc0+2
 11364:     int s = (byte) XEiJ.regOC;  //8bitディスプレースメント
 11365:     t += s;  //pc0+2+ディスプレースメント
 11366:     if ((t & 1) != 0) {  //分岐先のアドレスが奇数
 11367:       //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ
 11368:       irpBccAddressError (t);
 11369:     }
 11370:     if (XEiJ.MPU_CC_MI << XEiJ.regCCR < 0) {  //分岐する
 11371:       irpSetPC (t);
 11372:     }
 11373:   }  //irpBmis
 11374: 
 11375:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11376:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 11377:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 11378:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11379:   //BMI.S <label>                                   |-|--2346|-|-*---|-----|          |0110_101_111_sss_sss (s is not equal to 63)
 11380:   //BNPL.S <label>                                  |A|--2346|-|-*---|-----|          |0110_101_111_sss_sss (s is not equal to 63)  [BMI.S <label>]
 11381:   //JBMI.S <label>                                  |A|--2346|-|-*---|-----|          |0110_101_111_sss_sss (s is not equal to 63)  [BMI.S <label>]
 11382:   //JBNPL.S <label>                                 |A|--2346|-|-*---|-----|          |0110_101_111_sss_sss (s is not equal to 63)  [BMI.S <label>]
 11383:   //BMI.L <label>                                   |-|--2346|-|-*---|-----|          |0110_101_111_111_111-{offset}
 11384:   //BNPL.L <label>                                  |A|--2346|-|-*---|-----|          |0110_101_111_111_111-{offset}        [BMI.L <label>]
 11385:   public static void irpBmisl () throws M68kException {
 11386:     XEiJ.mpuCycleCount++;
 11387:     int t = XEiJ.regPC;  //pc0+2
 11388:     int s = (byte) XEiJ.regOC;  //8bitディスプレースメント
 11389:     if (s == -1) {  //Bcc.L
 11390:       XEiJ.regPC = t + 4;  //pc0+6
 11391:       s = mmuReadLongExword (t, XEiJ.regSRS);  //32bitディスプレースメント
 11392:     }
 11393:     t += s;  //pc0+2+ディスプレースメント
 11394:     if ((t & 1) != 0) {  //分岐先のアドレスが奇数
 11395:       //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ
 11396:       irpBccAddressError (t);
 11397:     }
 11398:     if (XEiJ.MPU_CC_MI << XEiJ.regCCR < 0) {  //分岐する
 11399:       irpSetPC (t);
 11400:     }
 11401:   }  //irpBmisl
 11402: 
 11403:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11404:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 11405:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 11406:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11407:   //BGE.W <label>                                   |-|012346|-|-*-*-|-----|          |0110_110_000_000_000-{offset}
 11408:   //BNLT.W <label>                                  |A|012346|-|-*-*-|-----|          |0110_110_000_000_000-{offset}        [BGE.W <label>]
 11409:   //JBGE.W <label>                                  |A|012346|-|-*-*-|-----|          |0110_110_000_000_000-{offset}        [BGE.W <label>]
 11410:   //JBNLT.W <label>                                 |A|012346|-|-*-*-|-----|          |0110_110_000_000_000-{offset}        [BGE.W <label>]
 11411:   //BGE.S <label>                                   |-|012346|-|-*-*-|-----|          |0110_110_000_sss_sss (s is not equal to 0)
 11412:   //BNLT.S <label>                                  |A|012346|-|-*-*-|-----|          |0110_110_000_sss_sss (s is not equal to 0)   [BGE.S <label>]
 11413:   //JBGE.S <label>                                  |A|012346|-|-*-*-|-----|          |0110_110_000_sss_sss (s is not equal to 0)   [BGE.S <label>]
 11414:   //JBNLT.S <label>                                 |A|012346|-|-*-*-|-----|          |0110_110_000_sss_sss (s is not equal to 0)   [BGE.S <label>]
 11415:   //JBLT.L <label>                                  |A|012346|-|-*-*-|-----|          |0110_110_000_000_110-0100111011111001-{address}      [BGE.S (*)+8;JMP <label>]
 11416:   //JBNGE.L <label>                                 |A|012346|-|-*-*-|-----|          |0110_110_000_000_110-0100111011111001-{address}      [BGE.S (*)+8;JMP <label>]
 11417:   public static void irpBgesw () throws M68kException {
 11418:     XEiJ.mpuCycleCount++;
 11419:     int t = XEiJ.regPC;  //pc0+2
 11420:     int s = (byte) XEiJ.regOC;  //8bitディスプレースメント
 11421:     if (s == 0) {  //Bcc.W
 11422:       XEiJ.regPC = t + 2;  //pc0+4
 11423:       s = mmuReadWordSignExword (t, XEiJ.regSRS);  //16bitディスプレースメント
 11424:     }
 11425:     t += s;  //pc0+2+ディスプレースメント
 11426:     if ((t & 1) != 0) {  //分岐先のアドレスが奇数
 11427:       //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ
 11428:       irpBccAddressError (t);
 11429:     }
 11430:     if (XEiJ.MPU_CC_GE << XEiJ.regCCR < 0) {  //分岐する
 11431:       irpSetPC (t);
 11432:     }
 11433:   }  //irpBgesw
 11434: 
 11435:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11436:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 11437:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 11438:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11439:   //BGE.S <label>                                   |-|012346|-|-*-*-|-----|          |0110_110_001_sss_sss
 11440:   //BNLT.S <label>                                  |A|012346|-|-*-*-|-----|          |0110_110_001_sss_sss [BGE.S <label>]
 11441:   //JBGE.S <label>                                  |A|012346|-|-*-*-|-----|          |0110_110_001_sss_sss [BGE.S <label>]
 11442:   //JBNLT.S <label>                                 |A|012346|-|-*-*-|-----|          |0110_110_001_sss_sss [BGE.S <label>]
 11443:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11444:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 11445:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 11446:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11447:   //BGE.S <label>                                   |-|012346|-|-*-*-|-----|          |0110_110_010_sss_sss
 11448:   //BNLT.S <label>                                  |A|012346|-|-*-*-|-----|          |0110_110_010_sss_sss [BGE.S <label>]
 11449:   //JBGE.S <label>                                  |A|012346|-|-*-*-|-----|          |0110_110_010_sss_sss [BGE.S <label>]
 11450:   //JBNLT.S <label>                                 |A|012346|-|-*-*-|-----|          |0110_110_010_sss_sss [BGE.S <label>]
 11451:   public static void irpBges () throws M68kException {
 11452:     XEiJ.mpuCycleCount++;
 11453:     int t = XEiJ.regPC;  //pc0+2
 11454:     int s = (byte) XEiJ.regOC;  //8bitディスプレースメント
 11455:     t += s;  //pc0+2+ディスプレースメント
 11456:     if ((t & 1) != 0) {  //分岐先のアドレスが奇数
 11457:       //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ
 11458:       irpBccAddressError (t);
 11459:     }
 11460:     if (XEiJ.MPU_CC_GE << XEiJ.regCCR < 0) {  //分岐する
 11461:       irpSetPC (t);
 11462:     }
 11463:   }  //irpBges
 11464: 
 11465:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11466:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 11467:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 11468:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11469:   //BGE.S <label>                                   |-|--2346|-|-*-*-|-----|          |0110_110_011_sss_sss (s is not equal to 63)
 11470:   //BNLT.S <label>                                  |A|--2346|-|-*-*-|-----|          |0110_110_011_sss_sss (s is not equal to 63)  [BGE.S <label>]
 11471:   //JBGE.S <label>                                  |A|--2346|-|-*-*-|-----|          |0110_110_011_sss_sss (s is not equal to 63)  [BGE.S <label>]
 11472:   //JBNLT.S <label>                                 |A|--2346|-|-*-*-|-----|          |0110_110_011_sss_sss (s is not equal to 63)  [BGE.S <label>]
 11473:   //BGE.L <label>                                   |-|--2346|-|-*-*-|-----|          |0110_110_011_111_111-{offset}
 11474:   //BNLT.L <label>                                  |A|--2346|-|-*-*-|-----|          |0110_110_011_111_111-{offset}        [BGE.L <label>]
 11475:   public static void irpBgesl () throws M68kException {
 11476:     XEiJ.mpuCycleCount++;
 11477:     int t = XEiJ.regPC;  //pc0+2
 11478:     int s = (byte) XEiJ.regOC;  //8bitディスプレースメント
 11479:     if (s == -1) {  //Bcc.L
 11480:       XEiJ.regPC = t + 4;  //pc0+6
 11481:       s = mmuReadLongExword (t, XEiJ.regSRS);  //32bitディスプレースメント
 11482:     }
 11483:     t += s;  //pc0+2+ディスプレースメント
 11484:     if ((t & 1) != 0) {  //分岐先のアドレスが奇数
 11485:       //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ
 11486:       irpBccAddressError (t);
 11487:     }
 11488:     if (XEiJ.MPU_CC_GE << XEiJ.regCCR < 0) {  //分岐する
 11489:       irpSetPC (t);
 11490:     }
 11491:   }  //irpBgesl
 11492: 
 11493:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11494:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 11495:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 11496:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11497:   //BLT.W <label>                                   |-|012346|-|-*-*-|-----|          |0110_110_100_000_000-{offset}
 11498:   //BNGE.W <label>                                  |A|012346|-|-*-*-|-----|          |0110_110_100_000_000-{offset}        [BLT.W <label>]
 11499:   //JBLT.W <label>                                  |A|012346|-|-*-*-|-----|          |0110_110_100_000_000-{offset}        [BLT.W <label>]
 11500:   //JBNGE.W <label>                                 |A|012346|-|-*-*-|-----|          |0110_110_100_000_000-{offset}        [BLT.W <label>]
 11501:   //BLT.S <label>                                   |-|012346|-|-*-*-|-----|          |0110_110_100_sss_sss (s is not equal to 0)
 11502:   //BNGE.S <label>                                  |A|012346|-|-*-*-|-----|          |0110_110_100_sss_sss (s is not equal to 0)   [BLT.S <label>]
 11503:   //JBLT.S <label>                                  |A|012346|-|-*-*-|-----|          |0110_110_100_sss_sss (s is not equal to 0)   [BLT.S <label>]
 11504:   //JBNGE.S <label>                                 |A|012346|-|-*-*-|-----|          |0110_110_100_sss_sss (s is not equal to 0)   [BLT.S <label>]
 11505:   //JBGE.L <label>                                  |A|012346|-|-*-*-|-----|          |0110_110_100_000_110-0100111011111001-{address}      [BLT.S (*)+8;JMP <label>]
 11506:   //JBNLT.L <label>                                 |A|012346|-|-*-*-|-----|          |0110_110_100_000_110-0100111011111001-{address}      [BLT.S (*)+8;JMP <label>]
 11507:   public static void irpBltsw () throws M68kException {
 11508:     XEiJ.mpuCycleCount++;
 11509:     int t = XEiJ.regPC;  //pc0+2
 11510:     int s = (byte) XEiJ.regOC;  //8bitディスプレースメント
 11511:     if (s == 0) {  //Bcc.W
 11512:       XEiJ.regPC = t + 2;  //pc0+4
 11513:       s = mmuReadWordSignExword (t, XEiJ.regSRS);  //16bitディスプレースメント
 11514:     }
 11515:     t += s;  //pc0+2+ディスプレースメント
 11516:     if ((t & 1) != 0) {  //分岐先のアドレスが奇数
 11517:       //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ
 11518:       irpBccAddressError (t);
 11519:     }
 11520:     if (XEiJ.MPU_CC_LT << XEiJ.regCCR < 0) {  //分岐する
 11521:       irpSetPC (t);
 11522:     }
 11523:   }  //irpBltsw
 11524: 
 11525:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11526:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 11527:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 11528:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11529:   //BLT.S <label>                                   |-|012346|-|-*-*-|-----|          |0110_110_101_sss_sss
 11530:   //BNGE.S <label>                                  |A|012346|-|-*-*-|-----|          |0110_110_101_sss_sss [BLT.S <label>]
 11531:   //JBLT.S <label>                                  |A|012346|-|-*-*-|-----|          |0110_110_101_sss_sss [BLT.S <label>]
 11532:   //JBNGE.S <label>                                 |A|012346|-|-*-*-|-----|          |0110_110_101_sss_sss [BLT.S <label>]
 11533:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11534:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 11535:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 11536:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11537:   //BLT.S <label>                                   |-|012346|-|-*-*-|-----|          |0110_110_110_sss_sss
 11538:   //BNGE.S <label>                                  |A|012346|-|-*-*-|-----|          |0110_110_110_sss_sss [BLT.S <label>]
 11539:   //JBLT.S <label>                                  |A|012346|-|-*-*-|-----|          |0110_110_110_sss_sss [BLT.S <label>]
 11540:   //JBNGE.S <label>                                 |A|012346|-|-*-*-|-----|          |0110_110_110_sss_sss [BLT.S <label>]
 11541:   public static void irpBlts () throws M68kException {
 11542:     XEiJ.mpuCycleCount++;
 11543:     int t = XEiJ.regPC;  //pc0+2
 11544:     int s = (byte) XEiJ.regOC;  //8bitディスプレースメント
 11545:     t += s;  //pc0+2+ディスプレースメント
 11546:     if ((t & 1) != 0) {  //分岐先のアドレスが奇数
 11547:       //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ
 11548:       irpBccAddressError (t);
 11549:     }
 11550:     if (XEiJ.MPU_CC_LT << XEiJ.regCCR < 0) {  //分岐する
 11551:       irpSetPC (t);
 11552:     }
 11553:   }  //irpBlts
 11554: 
 11555:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11556:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 11557:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 11558:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11559:   //BLT.S <label>                                   |-|--2346|-|-*-*-|-----|          |0110_110_111_sss_sss (s is not equal to 63)
 11560:   //BNGE.S <label>                                  |A|--2346|-|-*-*-|-----|          |0110_110_111_sss_sss (s is not equal to 63)  [BLT.S <label>]
 11561:   //JBLT.S <label>                                  |A|--2346|-|-*-*-|-----|          |0110_110_111_sss_sss (s is not equal to 63)  [BLT.S <label>]
 11562:   //JBNGE.S <label>                                 |A|--2346|-|-*-*-|-----|          |0110_110_111_sss_sss (s is not equal to 63)  [BLT.S <label>]
 11563:   //BLT.L <label>                                   |-|--2346|-|-*-*-|-----|          |0110_110_111_111_111-{offset}
 11564:   //BNGE.L <label>                                  |A|--2346|-|-*-*-|-----|          |0110_110_111_111_111-{offset}        [BLT.L <label>]
 11565:   public static void irpBltsl () throws M68kException {
 11566:     XEiJ.mpuCycleCount++;
 11567:     int t = XEiJ.regPC;  //pc0+2
 11568:     int s = (byte) XEiJ.regOC;  //8bitディスプレースメント
 11569:     if (s == -1) {  //Bcc.L
 11570:       XEiJ.regPC = t + 4;  //pc0+6
 11571:       s = mmuReadLongExword (t, XEiJ.regSRS);  //32bitディスプレースメント
 11572:     }
 11573:     t += s;  //pc0+2+ディスプレースメント
 11574:     if ((t & 1) != 0) {  //分岐先のアドレスが奇数
 11575:       //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ
 11576:       irpBccAddressError (t);
 11577:     }
 11578:     if (XEiJ.MPU_CC_LT << XEiJ.regCCR < 0) {  //分岐する
 11579:       irpSetPC (t);
 11580:     }
 11581:   }  //irpBltsl
 11582: 
 11583:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11584:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 11585:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 11586:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11587:   //BGT.W <label>                                   |-|012346|-|-***-|-----|          |0110_111_000_000_000-{offset}
 11588:   //BNLE.W <label>                                  |A|012346|-|-***-|-----|          |0110_111_000_000_000-{offset}        [BGT.W <label>]
 11589:   //JBGT.W <label>                                  |A|012346|-|-***-|-----|          |0110_111_000_000_000-{offset}        [BGT.W <label>]
 11590:   //JBNLE.W <label>                                 |A|012346|-|-***-|-----|          |0110_111_000_000_000-{offset}        [BGT.W <label>]
 11591:   //BGT.S <label>                                   |-|012346|-|-***-|-----|          |0110_111_000_sss_sss (s is not equal to 0)
 11592:   //BNLE.S <label>                                  |A|012346|-|-***-|-----|          |0110_111_000_sss_sss (s is not equal to 0)   [BGT.S <label>]
 11593:   //JBGT.S <label>                                  |A|012346|-|-***-|-----|          |0110_111_000_sss_sss (s is not equal to 0)   [BGT.S <label>]
 11594:   //JBNLE.S <label>                                 |A|012346|-|-***-|-----|          |0110_111_000_sss_sss (s is not equal to 0)   [BGT.S <label>]
 11595:   //JBLE.L <label>                                  |A|012346|-|-***-|-----|          |0110_111_000_000_110-0100111011111001-{address}      [BGT.S (*)+8;JMP <label>]
 11596:   //JBNGT.L <label>                                 |A|012346|-|-***-|-----|          |0110_111_000_000_110-0100111011111001-{address}      [BGT.S (*)+8;JMP <label>]
 11597:   public static void irpBgtsw () throws M68kException {
 11598:     XEiJ.mpuCycleCount++;
 11599:     int t = XEiJ.regPC;  //pc0+2
 11600:     int s = (byte) XEiJ.regOC;  //8bitディスプレースメント
 11601:     if (s == 0) {  //Bcc.W
 11602:       XEiJ.regPC = t + 2;  //pc0+4
 11603:       s = mmuReadWordSignExword (t, XEiJ.regSRS);  //16bitディスプレースメント
 11604:     }
 11605:     t += s;  //pc0+2+ディスプレースメント
 11606:     if ((t & 1) != 0) {  //分岐先のアドレスが奇数
 11607:       //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ
 11608:       irpBccAddressError (t);
 11609:     }
 11610:     if (XEiJ.MPU_CC_GT << XEiJ.regCCR < 0) {  //分岐する
 11611:       irpSetPC (t);
 11612:     }
 11613:   }  //irpBgtsw
 11614: 
 11615:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11616:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 11617:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 11618:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11619:   //BGT.S <label>                                   |-|012346|-|-***-|-----|          |0110_111_001_sss_sss
 11620:   //BNLE.S <label>                                  |A|012346|-|-***-|-----|          |0110_111_001_sss_sss [BGT.S <label>]
 11621:   //JBGT.S <label>                                  |A|012346|-|-***-|-----|          |0110_111_001_sss_sss [BGT.S <label>]
 11622:   //JBNLE.S <label>                                 |A|012346|-|-***-|-----|          |0110_111_001_sss_sss [BGT.S <label>]
 11623:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11624:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 11625:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 11626:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11627:   //BGT.S <label>                                   |-|012346|-|-***-|-----|          |0110_111_010_sss_sss
 11628:   //BNLE.S <label>                                  |A|012346|-|-***-|-----|          |0110_111_010_sss_sss [BGT.S <label>]
 11629:   //JBGT.S <label>                                  |A|012346|-|-***-|-----|          |0110_111_010_sss_sss [BGT.S <label>]
 11630:   //JBNLE.S <label>                                 |A|012346|-|-***-|-----|          |0110_111_010_sss_sss [BGT.S <label>]
 11631:   public static void irpBgts () throws M68kException {
 11632:     XEiJ.mpuCycleCount++;
 11633:     int t = XEiJ.regPC;  //pc0+2
 11634:     int s = (byte) XEiJ.regOC;  //8bitディスプレースメント
 11635:     t += s;  //pc0+2+ディスプレースメント
 11636:     if ((t & 1) != 0) {  //分岐先のアドレスが奇数
 11637:       //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ
 11638:       irpBccAddressError (t);
 11639:     }
 11640:     if (XEiJ.MPU_CC_GT << XEiJ.regCCR < 0) {  //分岐する
 11641:       irpSetPC (t);
 11642:     }
 11643:   }  //irpBgts
 11644: 
 11645:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11646:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 11647:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 11648:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11649:   //BGT.S <label>                                   |-|--2346|-|-***-|-----|          |0110_111_011_sss_sss (s is not equal to 63)
 11650:   //BNLE.S <label>                                  |A|--2346|-|-***-|-----|          |0110_111_011_sss_sss (s is not equal to 63)  [BGT.S <label>]
 11651:   //JBGT.S <label>                                  |A|--2346|-|-***-|-----|          |0110_111_011_sss_sss (s is not equal to 63)  [BGT.S <label>]
 11652:   //JBNLE.S <label>                                 |A|--2346|-|-***-|-----|          |0110_111_011_sss_sss (s is not equal to 63)  [BGT.S <label>]
 11653:   //BGT.L <label>                                   |-|--2346|-|-***-|-----|          |0110_111_011_111_111-{offset}
 11654:   //BNLE.L <label>                                  |A|--2346|-|-***-|-----|          |0110_111_011_111_111-{offset}        [BGT.L <label>]
 11655:   public static void irpBgtsl () throws M68kException {
 11656:     XEiJ.mpuCycleCount++;
 11657:     int t = XEiJ.regPC;  //pc0+2
 11658:     int s = (byte) XEiJ.regOC;  //8bitディスプレースメント
 11659:     if (s == -1) {  //Bcc.L
 11660:       XEiJ.regPC = t + 4;  //pc0+6
 11661:       s = mmuReadLongExword (t, XEiJ.regSRS);  //32bitディスプレースメント
 11662:     }
 11663:     t += s;  //pc0+2+ディスプレースメント
 11664:     if ((t & 1) != 0) {  //分岐先のアドレスが奇数
 11665:       //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ
 11666:       irpBccAddressError (t);
 11667:     }
 11668:     if (XEiJ.MPU_CC_GT << XEiJ.regCCR < 0) {  //分岐する
 11669:       irpSetPC (t);
 11670:     }
 11671:   }  //irpBgtsl
 11672: 
 11673:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11674:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 11675:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 11676:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11677:   //BLE.W <label>                                   |-|012346|-|-***-|-----|          |0110_111_100_000_000-{offset}
 11678:   //BNGT.W <label>                                  |A|012346|-|-***-|-----|          |0110_111_100_000_000-{offset}        [BLE.W <label>]
 11679:   //JBLE.W <label>                                  |A|012346|-|-***-|-----|          |0110_111_100_000_000-{offset}        [BLE.W <label>]
 11680:   //JBNGT.W <label>                                 |A|012346|-|-***-|-----|          |0110_111_100_000_000-{offset}        [BLE.W <label>]
 11681:   //BLE.S <label>                                   |-|012346|-|-***-|-----|          |0110_111_100_sss_sss (s is not equal to 0)
 11682:   //BNGT.S <label>                                  |A|012346|-|-***-|-----|          |0110_111_100_sss_sss (s is not equal to 0)   [BLE.S <label>]
 11683:   //JBLE.S <label>                                  |A|012346|-|-***-|-----|          |0110_111_100_sss_sss (s is not equal to 0)   [BLE.S <label>]
 11684:   //JBNGT.S <label>                                 |A|012346|-|-***-|-----|          |0110_111_100_sss_sss (s is not equal to 0)   [BLE.S <label>]
 11685:   //JBGT.L <label>                                  |A|012346|-|-***-|-----|          |0110_111_100_000_110-0100111011111001-{address}      [BLE.S (*)+8;JMP <label>]
 11686:   //JBNLE.L <label>                                 |A|012346|-|-***-|-----|          |0110_111_100_000_110-0100111011111001-{address}      [BLE.S (*)+8;JMP <label>]
 11687:   public static void irpBlesw () throws M68kException {
 11688:     XEiJ.mpuCycleCount++;
 11689:     int t = XEiJ.regPC;  //pc0+2
 11690:     int s = (byte) XEiJ.regOC;  //8bitディスプレースメント
 11691:     if (s == 0) {  //Bcc.W
 11692:       XEiJ.regPC = t + 2;  //pc0+4
 11693:       s = mmuReadWordSignExword (t, XEiJ.regSRS);  //16bitディスプレースメント
 11694:     }
 11695:     t += s;  //pc0+2+ディスプレースメント
 11696:     if ((t & 1) != 0) {  //分岐先のアドレスが奇数
 11697:       //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ
 11698:       irpBccAddressError (t);
 11699:     }
 11700:     if (XEiJ.MPU_CC_LE << XEiJ.regCCR < 0) {  //分岐する
 11701:       irpSetPC (t);
 11702:     }
 11703:   }  //irpBlesw
 11704: 
 11705:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11706:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 11707:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 11708:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11709:   //BLE.S <label>                                   |-|012346|-|-***-|-----|          |0110_111_101_sss_sss
 11710:   //BNGT.S <label>                                  |A|012346|-|-***-|-----|          |0110_111_101_sss_sss [BLE.S <label>]
 11711:   //JBLE.S <label>                                  |A|012346|-|-***-|-----|          |0110_111_101_sss_sss [BLE.S <label>]
 11712:   //JBNGT.S <label>                                 |A|012346|-|-***-|-----|          |0110_111_101_sss_sss [BLE.S <label>]
 11713:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11714:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 11715:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 11716:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11717:   //BLE.S <label>                                   |-|012346|-|-***-|-----|          |0110_111_110_sss_sss
 11718:   //BNGT.S <label>                                  |A|012346|-|-***-|-----|          |0110_111_110_sss_sss [BLE.S <label>]
 11719:   //JBLE.S <label>                                  |A|012346|-|-***-|-----|          |0110_111_110_sss_sss [BLE.S <label>]
 11720:   //JBNGT.S <label>                                 |A|012346|-|-***-|-----|          |0110_111_110_sss_sss [BLE.S <label>]
 11721:   public static void irpBles () throws M68kException {
 11722:     XEiJ.mpuCycleCount++;
 11723:     int t = XEiJ.regPC;  //pc0+2
 11724:     int s = (byte) XEiJ.regOC;  //8bitディスプレースメント
 11725:     t += s;  //pc0+2+ディスプレースメント
 11726:     if ((t & 1) != 0) {  //分岐先のアドレスが奇数
 11727:       //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ
 11728:       irpBccAddressError (t);
 11729:     }
 11730:     if (XEiJ.MPU_CC_LE << XEiJ.regCCR < 0) {  //分岐する
 11731:       irpSetPC (t);
 11732:     }
 11733:   }  //irpBles
 11734: 
 11735:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11736:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 11737:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 11738:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11739:   //BLE.S <label>                                   |-|--2346|-|-***-|-----|          |0110_111_111_sss_sss (s is not equal to 63)
 11740:   //BNGT.S <label>                                  |A|--2346|-|-***-|-----|          |0110_111_111_sss_sss (s is not equal to 63)  [BLE.S <label>]
 11741:   //JBLE.S <label>                                  |A|--2346|-|-***-|-----|          |0110_111_111_sss_sss (s is not equal to 63)  [BLE.S <label>]
 11742:   //JBNGT.S <label>                                 |A|--2346|-|-***-|-----|          |0110_111_111_sss_sss (s is not equal to 63)  [BLE.S <label>]
 11743:   //BLE.L <label>                                   |-|--2346|-|-***-|-----|          |0110_111_111_111_111-{offset}
 11744:   //BNGT.L <label>                                  |A|--2346|-|-***-|-----|          |0110_111_111_111_111-{offset}        [BLE.L <label>]
 11745:   public static void irpBlesl () throws M68kException {
 11746:     XEiJ.mpuCycleCount++;
 11747:     int t = XEiJ.regPC;  //pc0+2
 11748:     int s = (byte) XEiJ.regOC;  //8bitディスプレースメント
 11749:     if (s == -1) {  //Bcc.L
 11750:       XEiJ.regPC = t + 4;  //pc0+6
 11751:       s = mmuReadLongExword (t, XEiJ.regSRS);  //32bitディスプレースメント
 11752:     }
 11753:     t += s;  //pc0+2+ディスプレースメント
 11754:     if ((t & 1) != 0) {  //分岐先のアドレスが奇数
 11755:       //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ
 11756:       irpBccAddressError (t);
 11757:     }
 11758:     if (XEiJ.MPU_CC_LE << XEiJ.regCCR < 0) {  //分岐する
 11759:       irpSetPC (t);
 11760:     }
 11761:   }  //irpBlesl
 11762: 
 11763:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11764:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 11765:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 11766:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11767:   //IOCS <name>                                     |A|012346|-|UUUUU|UUUUU|          |0111_000_0dd_ddd_ddd-0100111001001111        [MOVEQ.L #<data>,D0;TRAP #15]
 11768:   //MOVEQ.L #<data>,Dq                              |-|012346|-|-UUUU|-**00|          |0111_qqq_0dd_ddd_ddd
 11769:   public static void irpMoveq () throws M68kException {
 11770:     XEiJ.mpuCycleCount++;
 11771:     int z;
 11772:     XEiJ.regRn[XEiJ.regOC >> 9 & 7] = z = (byte) XEiJ.regOC;
 11773:     XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X);  //ccr_tst
 11774:   }  //irpMoveq
 11775: 
 11776:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11777:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 11778:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 11779:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11780:   //MVS.B <ea>,Dq                                   |-|------|-|-UUUU|-**00|D M+-WXZPI|0111_qqq_100_mmm_rrr (ISA_B)
 11781:   //
 11782:   //MVS.B <ea>,Dq
 11783:   //  バイトデータをロングに符号拡張してDqの全体を更新する
 11784:   public static void irpMvsByte () throws M68kException {
 11785:     XEiJ.mpuCycleCount++;
 11786:     int ea = XEiJ.regOC & 63;
 11787:     int z;
 11788:     XEiJ.regRn[XEiJ.regOC >> 9 & 7] = z = ea < XEiJ.EA_AR ? (byte) XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadByteSignExword ((XEiJ.regPC += 2) - 1, XEiJ.regSRS) : mmuReadByteSignData (efaAnyByte (ea), XEiJ.regSRS);  //pcbs。イミディエイトを分離
 11789:     XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X);  //ccr_tst
 11790:   }  //irpMvsByte
 11791: 
 11792:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11793:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 11794:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 11795:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11796:   //MVS.W <ea>,Dq                                   |-|------|-|-UUUU|-**00|D M+-WXZPI|0111_qqq_101_mmm_rrr (ISA_B)
 11797:   //
 11798:   //MVS.W <ea>,Dq
 11799:   //  ワードデータをロングに符号拡張してDqの全体を更新する
 11800:   public static void irpMvsWord () throws M68kException {
 11801:     XEiJ.mpuCycleCount++;
 11802:     int ea = XEiJ.regOC & 63;
 11803:     int z;
 11804:     XEiJ.regRn[XEiJ.regOC >> 9 & 7] = z = ea < XEiJ.EA_AR ? (short) XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) : mmuReadWordSignData (efaAnyWord (ea), XEiJ.regSRS);  //pcws。イミディエイトを分離
 11805:     XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X);  //ccr_tst
 11806:   }  //irpMvsWord
 11807: 
 11808:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11809:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 11810:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 11811:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11812:   //MVZ.B <ea>,Dq                                   |-|------|-|-UUUU|-0*00|D M+-WXZPI|0111_qqq_110_mmm_rrr (ISA_B)
 11813:   //
 11814:   //MVZ.B <ea>,Dq
 11815:   //  バイトデータをロングにゼロ拡張してDqの全体を更新する
 11816:   public static void irpMvzByte () throws M68kException {
 11817:     XEiJ.mpuCycleCount++;
 11818:     int ea = XEiJ.regOC & 63;
 11819:     int z;
 11820:     XEiJ.regRn[XEiJ.regOC >> 9 & 7] = z = ea < XEiJ.EA_AR ? 0xff & XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadByteZeroExword ((XEiJ.regPC += 2) - 1, XEiJ.regSRS) : mmuReadByteZeroData (efaAnyByte (ea), XEiJ.regSRS);  //pcbz。イミディエイトを分離
 11821:     XEiJ.regCCR = XEiJ.REG_CCR_X & XEiJ.regCCR | (z == 0 ? XEiJ.REG_CCR_Z : 0);
 11822:   }  //irpMvzByte
 11823: 
 11824:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11825:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 11826:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 11827:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11828:   //MVZ.W <ea>,Dq                                   |-|------|-|-UUUU|-0*00|D M+-WXZPI|0111_qqq_111_mmm_rrr (ISA_B)
 11829:   //
 11830:   //MVZ.W <ea>,Dq
 11831:   //  ワードデータをロングにゼロ拡張してDqの全体を更新する
 11832:   public static void irpMvzWord () throws M68kException {
 11833:     XEiJ.mpuCycleCount++;
 11834:     int ea = XEiJ.regOC & 63;
 11835:     int z;
 11836:     XEiJ.regRn[XEiJ.regOC >> 9 & 7] = z = ea < XEiJ.EA_AR ? (char) XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) : mmuReadWordZeroData (efaAnyWord (ea), XEiJ.regSRS);  //pcwz。イミディエイトを分離
 11837:     XEiJ.regCCR = XEiJ.REG_CCR_X & XEiJ.regCCR | (z == 0 ? XEiJ.REG_CCR_Z : 0);
 11838:   }  //irpMvzWord
 11839: 
 11840:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11841:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 11842:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 11843:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11844:   //OR.B <ea>,Dq                                    |-|012346|-|-UUUU|-**00|D M+-WXZPI|1000_qqq_000_mmm_rrr
 11845:   public static void irpOrToRegByte () throws M68kException {
 11846:     XEiJ.mpuCycleCount++;
 11847:     int ea = XEiJ.regOC & 63;
 11848:     XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & (XEiJ.regRn[XEiJ.regOC >> 9 & 7] |= 255 & (ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadByteSignExword ((XEiJ.regPC += 2) - 1, XEiJ.regSRS) : mmuReadByteSignData (efaAnyByte (ea), XEiJ.regSRS)))];  //ccr_tst_byte。pcbs。イミディエイトを分離。0拡張してからOR
 11849:   }  //irpOrToRegByte
 11850: 
 11851:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11852:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 11853:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 11854:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11855:   //OR.W <ea>,Dq                                    |-|012346|-|-UUUU|-**00|D M+-WXZPI|1000_qqq_001_mmm_rrr
 11856:   public static void irpOrToRegWord () throws M68kException {
 11857:     XEiJ.mpuCycleCount++;
 11858:     int ea = XEiJ.regOC & 63;
 11859:     int z = (short) (XEiJ.regRn[XEiJ.regOC >> 9 & 7] |= ea < XEiJ.EA_AR ? (char) XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) : mmuReadWordZeroData (efaAnyWord (ea), XEiJ.regSRS));  //pcwz。イミディエイトを分離。0拡張してからOR
 11860:     XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X);  //ccr_tst
 11861:   }  //irpOrToRegWord
 11862: 
 11863:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11864:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 11865:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 11866:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11867:   //OR.L <ea>,Dq                                    |-|012346|-|-UUUU|-**00|D M+-WXZPI|1000_qqq_010_mmm_rrr
 11868:   public static void irpOrToRegLong () throws M68kException {
 11869:     int ea = XEiJ.regOC & 63;
 11870:     int z = XEiJ.regRn[XEiJ.regOC >> 9 & 7] |= ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS) : mmuReadLongData (efaAnyLong (ea), XEiJ.regSRS);  //pcls。イミディエイトを分離
 11871:     XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X);  //ccr_tst
 11872:   }  //irpOrToRegLong
 11873: 
 11874:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11875:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 11876:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 11877:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11878:   //DIVU.W <ea>,Dq                                  |-|012346|-|-UUUU|-***0|D M+-WXZPI|1000_qqq_011_mmm_rrr
 11879:   //
 11880:   //DIVU.W <ea>,Dq
 11881:   //  M68000PRMでDIVU.Wのオーバーフローの条件が16bit符号あり整数と書かれているのは16bit符号なし整数の間違い
 11882:   public static void irpDivuWord () throws M68kException {
 11883:     //  X  変化しない
 11884:     //  N  ゼロ除算またはオーバーフローのとき不定。商が負のときセット。それ以外はクリア
 11885:     //  Z  ゼロ除算またはオーバーフローのとき不定。商が0のときセット。それ以外はクリア
 11886:     //  V  ゼロ除算のとき不定。オーバーフローのときセット。それ以外はクリア
 11887:     //  C  常にクリア
 11888:     XEiJ.mpuCycleCount += 22;  //最大
 11889:     int ea = XEiJ.regOC & 63;
 11890:     int qqq = XEiJ.regOC >> 9 & 7;
 11891:     int y = ea < XEiJ.EA_AR ? (char) XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) : mmuReadWordZeroData (efaAnyWord (ea), XEiJ.regSRS);  //除数。pcwz。イミディエイトを分離
 11892:     int x = XEiJ.regRn[qqq];  //被除数
 11893:     if (y == 0) {  //ゼロ除算
 11894:       //Dqは変化しない
 11895:       XEiJ.regCCR = (XEiJ.regCCR & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_N | XEiJ.REG_CCR_Z | XEiJ.REG_CCR_V)  //XとNとZとVは変化しない
 11896:                      );  //Cは常にクリア
 11897:       M68kException.m6eAddress = XEiJ.regPC0;  //アドレスは命令の先頭
 11898:       M68kException.m6eNumber = M68kException.M6E_DIVIDE_BY_ZERO;
 11899:       throw M68kException.m6eSignal;
 11900:     }
 11901:     //無理にintで符号なし除算をやろうとするよりもdoubleにキャストしてから割ったほうが速い
 11902:     //  intの除算をdoubleの除算器で行うプロセッサならばなおさら
 11903:     //被除数を符号なし32ビットとみなすためlongを経由してdoubleに変換する
 11904:     //doubleからlongやintへのキャストは小数点以下が切り捨てられ、オーバーフローは表現できる絶対値最大の値になる
 11905:     //doubleから直接intに戻しているので0xffffffff/0x0001=0xffffffffが絶対値最大の0x7fffffffになってしまうが、
 11906:     //DIVU.Wではオーバーフローになることに変わりはないのでよいことにする
 11907:     //  符号なし32ビットの0xffffffffにしたいときは戻すときもlongを経由すればよい
 11908:     int z = (int) ((double) ((long) x & 0xffffffffL) / (double) y);  //商
 11909:     if (z >>> 16 != 0) {  //オーバーフローあり
 11910:       //Dqは変化しない
 11911:       XEiJ.regCCR = (XEiJ.regCCR & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_N | XEiJ.REG_CCR_Z) |  //XとNとZは変化しない
 11912:                      XEiJ.REG_CCR_V  //Vは常にセット
 11913:                      );  //Cは常にクリア
 11914:     } else {  //オーバーフローなし
 11915:       XEiJ.regRn[qqq] = x - y * z << 16 | z;  //余り<<16|商
 11916:       z = (short) z;
 11917:       XEiJ.regCCR = (XEiJ.regCCR & XEiJ.REG_CCR_X |  //Xは変化しない
 11918:                      (z < 0 ? XEiJ.REG_CCR_N : 0) |  //Nは商が負のときセット、さもなくばクリア
 11919:                      (z == 0 ? XEiJ.REG_CCR_Z : 0)  //Zは商が0のときセット、さもなくばクリア
 11920:                      //Vは常にクリア
 11921:                      );  //Cは常にクリア
 11922:     }  //if オーバーフローあり/オーバーフローなし
 11923:   }  //irpDivuWord
 11924: 
 11925:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11926:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 11927:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 11928:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11929:   //SBCD.B Dr,Dq                                    |-|012346|-|UUUUU|*U*U*|          |1000_qqq_100_000_rrr
 11930:   //SBCD.B -(Ar),-(Aq)                              |-|012346|-|UUUUU|*U*U*|          |1000_qqq_100_001_rrr
 11931:   //OR.B Dq,<ea>                                    |-|012346|-|-UUUU|-**00|  M+-WXZ  |1000_qqq_100_mmm_rrr
 11932:   public static void irpOrToMemByte () throws M68kException {
 11933:     int ea = XEiJ.regOC & 63;
 11934:     if (ea >= XEiJ.EA_MM) {  //OR.B Dq,<ea>
 11935:       XEiJ.mpuCycleCount++;
 11936:       int a = efaMltByte (ea);
 11937:       int z = XEiJ.regRn[XEiJ.regOC >> 9 & 7] | mmuReadByteSignData (a, XEiJ.regSRS);
 11938:       mmuWriteByteData (a, z, XEiJ.regSRS);
 11939:       XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & z];  //ccr_tst_byte
 11940:     } else if (ea < XEiJ.EA_AR) {  //SBCD.B Dr,Dq
 11941:       int qqq = XEiJ.regOC >> 9 & 7;
 11942:       XEiJ.mpuCycleCount++;
 11943:       int x;
 11944:       XEiJ.regRn[qqq] = ~0xff & (x = XEiJ.regRn[qqq]) | irpSbcd (x, XEiJ.regRn[ea]);
 11945:     } else {  //SBCD.B -(Ar),-(Aq)
 11946:       XEiJ.mpuCycleCount += 2;
 11947:       M68kException.m6eIncremented -= 1L << (ea << 3);
 11948:       int a = --XEiJ.regRn[ea];  //このr[ea]はアドレスレジスタ
 11949:       int y = mmuReadByteZeroData (a, XEiJ.regSRS);
 11950:       int aqq = (XEiJ.regOC >> 9) - (64 - 8);
 11951:       M68kException.m6eIncremented -= 1L << (aqq << 3);
 11952:       a = --XEiJ.regRn[aqq];
 11953:       mmuWriteByteData (a, irpSbcd (mmuModifyByteZeroData (a, XEiJ.regSRS), y), XEiJ.regSRS);
 11954:     }
 11955:   }  //irpOrToMemByte
 11956: 
 11957:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11958:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 11959:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 11960:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11961:   //PACK Dr,Dq,#<data>                              |-|--2346|-|-----|-----|          |1000_qqq_101_000_rrr-{data}
 11962:   //PACK -(Ar),-(Aq),#<data>                        |-|--2346|-|-----|-----|          |1000_qqq_101_001_rrr-{data}
 11963:   //OR.W Dq,<ea>                                    |-|012346|-|-UUUU|-**00|  M+-WXZ  |1000_qqq_101_mmm_rrr
 11964:   //
 11965:   //PACK Dr,Dq,#<data>
 11966:   //PACK -(Ar),-(Aq),#<data>
 11967:   //  PACK/UNPKは第1オペランドのソースと第2オペランドのデスティネーションのサイズが違う。パックされていない方がワードでされている方がバイト
 11968:   //  10の位を4ビット右または左にシフトする。第3オペランドの補正値はワードでパックされていない方に加算する。CCRは変化しない
 11969:   public static void irpOrToMemWord () throws M68kException {
 11970:     int ea = XEiJ.regOC & 63;
 11971:     if (ea >= XEiJ.EA_MM) {  //OR.W Dq,<ea>
 11972:       XEiJ.mpuCycleCount++;
 11973:       int a = efaMltWord (ea);
 11974:       int z;
 11975:       mmuWriteWordData (a, z = XEiJ.regRn[XEiJ.regOC >> 9 & 7] | mmuModifyWordSignData (a, XEiJ.regSRS), XEiJ.regSRS);
 11976:       XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (char) z - 1 >> 31 & XEiJ.REG_CCR_Z | ((short) z < 0 ? XEiJ.REG_CCR_N : 0);  //ccr_tst_word
 11977:     } else if (ea < XEiJ.EA_AR) {  //PACK Dr,Dq,#<data>
 11978:       XEiJ.mpuCycleCount += 2;
 11979:       int qqq = XEiJ.regOC >> 9 & 7;
 11980:       int t = XEiJ.regRn[ea] + mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);  //pcws
 11981:       XEiJ.regRn[qqq] = ~0xff & XEiJ.regRn[qqq] | t >> 4 & 0xf0 | t & 15;
 11982:     } else {  //PACK -(Ar),-(Aq),#<data>
 11983:       int o = mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);  //pcws
 11984:       M68kException.m6eIncremented -= 2L << (ea << 3);
 11985:       int a = XEiJ.regRn[ea] -= 2;
 11986:       int t = mmuReadWordSignData (a, XEiJ.regSRS) + o;  //020以上なのでアドレスエラーは出ない
 11987:       int aqq = (XEiJ.regOC >> 9) - (64 - 8);
 11988:       M68kException.m6eIncremented -= 1L << (aqq << 3);
 11989:       a = --XEiJ.regRn[aqq];
 11990:       mmuWriteByteData (a, t >> 4 & 0xf0 | t & 15, XEiJ.regSRS);
 11991:     }
 11992:   }  //irpOrToMemWord
 11993: 
 11994:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11995:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 11996:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 11997:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11998:   //UNPK Dr,Dq,#<data>                              |-|--2346|-|-----|-----|          |1000_qqq_110_000_rrr-{data}
 11999:   //UNPK -(Ar),-(Aq),#<data>                        |-|--2346|-|-----|-----|          |1000_qqq_110_001_rrr-{data}
 12000:   //OR.L Dq,<ea>                                    |-|012346|-|-UUUU|-**00|  M+-WXZ  |1000_qqq_110_mmm_rrr
 12001:   //
 12002:   //UNPK Dr,Dq,#<data>
 12003:   //UNPK -(Ar),-(Aq),#<data>
 12004:   //  PACK/UNPKは第1オペランドのソースと第2オペランドのデスティネーションのサイズが違う。パックされていない方がワードでされている方がバイト
 12005:   //  10の位を4ビット右または左にシフトする。第3オペランドの補正値はワードでパックされていない方に加算する。CCRは変化しない
 12006:   public static void irpOrToMemLong () throws M68kException {
 12007:     int ea = XEiJ.regOC & 63;
 12008:     if (ea >= XEiJ.EA_MM) {  //OR.L Dq,<ea>
 12009:       XEiJ.mpuCycleCount++;
 12010:       int a = efaMltLong (ea);
 12011:       int z;
 12012:       mmuWriteLongData (a, z = XEiJ.regRn[XEiJ.regOC >> 9 & 7] | mmuModifyLongData (a, XEiJ.regSRS), XEiJ.regSRS);
 12013:       XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X);  //ccr_tst
 12014:     } else if (ea < XEiJ.EA_AR) {  //UNPK Dr,Dq,#<data>
 12015:       int qqq = XEiJ.regOC >> 9 & 7;
 12016:       int t = XEiJ.regRn[ea];
 12017:       XEiJ.regRn[qqq] = ~0xffff & XEiJ.regRn[qqq] | (char) ((t << 4 & 0x0f00 | t & 15) + mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS));  //pcws
 12018:     } else {  //UNPK -(Ar),-(Aq),#<data>
 12019:       int o = mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);  //pcws
 12020:       M68kException.m6eIncremented -= 1L << (ea << 3);
 12021:       int a = --XEiJ.regRn[ea];
 12022:       int t = mmuReadByteSignData (a, XEiJ.regSRS);
 12023:       int aqq = (XEiJ.regOC >> 9) - (64 - 8);
 12024:       M68kException.m6eIncremented -= 2L << (aqq << 3);
 12025:       a = XEiJ.regRn[aqq] -= 2;
 12026:       mmuWriteWordData (a, (t << 4 & 0x0f00 | t & 15) + o, XEiJ.regSRS);  //020以上なのでアドレスエラーは出ない
 12027:     }
 12028:   }  //irpOrToMemLong
 12029: 
 12030:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12031:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 12032:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 12033:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12034:   //DIVS.W <ea>,Dq                                  |-|012346|-|-UUUU|-***0|D M+-WXZPI|1000_qqq_111_mmm_rrr
 12035:   //
 12036:   //DIVS.W <ea>,Dq
 12037:   //  DIVSの余りの符号は被除数と一致
 12038:   //  M68000PRMでDIVS.Wのアドレッシングモードがデータ可変と書かれているのはデータの間違い
 12039:   public static void irpDivsWord () throws M68kException {
 12040:     //  X  変化しない
 12041:     //  N  ゼロ除算またはオーバーフローのとき不定。商が負のときセット。それ以外はクリア
 12042:     //  Z  ゼロ除算またはオーバーフローのとき不定。商が0のときセット。それ以外はクリア
 12043:     //  V  ゼロ除算のとき不定。オーバーフローのときセット。それ以外はクリア
 12044:     //  C  常にクリア
 12045:     //divsの余りの符号は被除数と一致
 12046:     //Javaの除算演算子の挙動
 12047:     //   10 /  3 ==  3   10 %  3 ==  1   10 =  3 *  3 +  1
 12048:     //   10 / -3 == -3   10 % -3 ==  1   10 = -3 * -3 +  1
 12049:     //  -10 /  3 == -3  -10 %  3 == -1  -10 =  3 * -3 + -1
 12050:     //  -10 / -3 ==  3  -10 % -3 == -1  -10 = -3 *  3 + -1
 12051:     XEiJ.mpuCycleCount += 22;  //最大
 12052:     int ea = XEiJ.regOC & 63;
 12053:     int qqq = XEiJ.regOC >> 9 & 7;
 12054:     int y = ea < XEiJ.EA_AR ? (short) XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) : mmuReadWordSignData (efaAnyWord (ea), XEiJ.regSRS);  //除数。pcws。イミディエイトを分離
 12055:     int x = XEiJ.regRn[qqq];  //被除数
 12056:     if (y == 0) {  //ゼロ除算
 12057:       //Dqは変化しない
 12058:       XEiJ.regCCR = (XEiJ.regCCR & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_N | XEiJ.REG_CCR_Z | XEiJ.REG_CCR_V)  //XとNとZとVは変化しない
 12059:                      );  //Cは常にクリア
 12060:       M68kException.m6eAddress = XEiJ.regPC0;  //アドレスは命令の先頭
 12061:       M68kException.m6eNumber = M68kException.M6E_DIVIDE_BY_ZERO;
 12062:       throw M68kException.m6eSignal;
 12063:     }
 12064:     int z = x / y;  //商
 12065:     if ((short) z != z) {  //オーバーフローあり
 12066:       //Dqは変化しない
 12067:       XEiJ.regCCR = (XEiJ.regCCR & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_N | XEiJ.REG_CCR_Z) |  //XとNとZは変化しない
 12068:                      XEiJ.REG_CCR_V  //Vは常にセット
 12069:                      );  //Cは常にクリア
 12070:     } else {  //オーバーフローなし
 12071:       XEiJ.regRn[qqq] = x - y * z << 16 | (char) z;  //Dqは余り<<16|商&$ffff
 12072:       XEiJ.regCCR = (XEiJ.regCCR & XEiJ.REG_CCR_X |  //Xは変化しない
 12073:                      (z < 0 ? XEiJ.REG_CCR_N : 0) |  //Nは商が負のときセット、さもなくばクリア
 12074:                      (z == 0 ? XEiJ.REG_CCR_Z : 0)  //Zは商が0のときセット、さもなくばクリア
 12075:                      //Vは常にクリア
 12076:                      );  //Cは常にクリア
 12077:     }
 12078:   }  //irpDivsWord
 12079: 
 12080:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12081:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 12082:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 12083:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12084:   //SUB.B <ea>,Dq                                   |-|012346|-|UUUUU|*****|D M+-WXZPI|1001_qqq_000_mmm_rrr
 12085:   public static void irpSubToRegByte () throws M68kException {
 12086:     XEiJ.mpuCycleCount++;
 12087:     int ea = XEiJ.regOC & 63;
 12088:     int qqq = XEiJ.regOC >> 9 & 7;
 12089:     int x, y, z;
 12090:     y = ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadByteSignExword ((XEiJ.regPC += 2) - 1, XEiJ.regSRS) : mmuReadByteSignData (efaAnyByte (ea), XEiJ.regSRS);  //pcbs。イミディエイトを分離
 12091:     x = XEiJ.regRn[qqq];
 12092:     z = x - y;
 12093:     XEiJ.regRn[qqq] = ~255 & x | 255 & z;
 12094:     XEiJ.regCCR = (XEiJ.MPU_TSTB_TABLE[255 & z] |
 12095:            ((x ^ y) & (x ^ z)) >> 6 & XEiJ.REG_CCR_V |
 12096:            (byte) (x & (y ^ z) ^ (y | z)) >> 7 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C));  //ccr_sub_byte
 12097:   }  //irpSubToRegByte
 12098: 
 12099:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12100:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 12101:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 12102:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12103:   //SUB.W <ea>,Dq                                   |-|012346|-|UUUUU|*****|DAM+-WXZPI|1001_qqq_001_mmm_rrr
 12104:   public static void irpSubToRegWord () throws M68kException {
 12105:     XEiJ.mpuCycleCount++;
 12106:     int ea = XEiJ.regOC & 63;
 12107:     int qqq = XEiJ.regOC >> 9 & 7;
 12108:     int x, y, z;
 12109:     y = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) : mmuReadWordSignData (efaAnyWord (ea), XEiJ.regSRS);  //このr[ea]はデータレジスタまたはアドレスレジスタ。pcws。イミディエイトを分離
 12110:     x = XEiJ.regRn[qqq];
 12111:     z = x - y;
 12112:     XEiJ.regRn[qqq] = ~65535 & x | (char) z;
 12113:     XEiJ.regCCR = (z >> 12 & XEiJ.REG_CCR_N | (char) z - 1 >> 14 & XEiJ.REG_CCR_Z |
 12114:            ((x ^ y) & (x ^ z)) >> 14 & XEiJ.REG_CCR_V |
 12115:            (short) (x & (y ^ z) ^ (y | z)) >> 15 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C));  //ccr_sub_word
 12116:   }  //irpSubToRegWord
 12117: 
 12118:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12119:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 12120:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 12121:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12122:   //SUB.L <ea>,Dq                                   |-|012346|-|UUUUU|*****|DAM+-WXZPI|1001_qqq_010_mmm_rrr
 12123:   public static void irpSubToRegLong () throws M68kException {
 12124:     int ea = XEiJ.regOC & 63;
 12125:     int qqq = XEiJ.regOC >> 9 & 7;
 12126:     XEiJ.mpuCycleCount++;
 12127:     int x, y, z;
 12128:     y = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS) : mmuReadLongData (efaAnyLong (ea), XEiJ.regSRS);  //このr[ea]はデータレジスタまたはアドレスレジスタ。pcls。イミディエイトを分離
 12129:     x = XEiJ.regRn[qqq];
 12130:     z = x - y;
 12131:     XEiJ.regRn[qqq] = z;
 12132:     XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) |
 12133:            ((x ^ y) & (x ^ z)) >> 30 & XEiJ.REG_CCR_V |
 12134:            (x & (y ^ z) ^ (y | z)) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C));  //ccr_sub
 12135:   }  //irpSubToRegLong
 12136: 
 12137:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12138:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 12139:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 12140:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12141:   //SUBA.W <ea>,Aq                                  |-|012346|-|-----|-----|DAM+-WXZPI|1001_qqq_011_mmm_rrr
 12142:   //SUB.W <ea>,Aq                                   |A|012346|-|-----|-----|DAM+-WXZPI|1001_qqq_011_mmm_rrr [SUBA.W <ea>,Aq]
 12143:   //CLR.W Ar                                        |A|012346|-|-----|-----| A        |1001_rrr_011_001_rrr [SUBA.W Ar,Ar]
 12144:   //
 12145:   //SUBA.W <ea>,Aq
 12146:   //  ソースを符号拡張してロングで減算する
 12147:   public static void irpSubaWord () throws M68kException {
 12148:     XEiJ.mpuCycleCount++;
 12149:     int ea = XEiJ.regOC & 63;
 12150:     int z = ea < XEiJ.EA_MM ? (short) XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) : mmuReadWordSignData (efaAnyWord (ea), XEiJ.regSRS);  //このr[ea]はデータレジスタまたはアドレスレジスタ。pcws。イミディエイトを分離。ここでAqが変化する可能性があることに注意
 12151:     XEiJ.regRn[XEiJ.regOC >> 9 & 15] -= z;  //r[op >> 9 & 15] -= ea < XEiJ.EA_MM ? (short) r[ea] : rws (efaAnyWord (ea));は不可
 12152:     //ccrは変化しない
 12153:   }  //irpSubaWord
 12154: 
 12155:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12156:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 12157:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 12158:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12159:   //SUBX.B Dr,Dq                                    |-|012346|-|*UUUU|*****|          |1001_qqq_100_000_rrr
 12160:   //SUBX.B -(Ar),-(Aq)                              |-|012346|-|*UUUU|*****|          |1001_qqq_100_001_rrr
 12161:   //SUB.B Dq,<ea>                                   |-|012346|-|UUUUU|*****|  M+-WXZ  |1001_qqq_100_mmm_rrr
 12162:   public static void irpSubToMemByte () throws M68kException {
 12163:     int ea = XEiJ.regOC & 63;
 12164:     int a, x, y, z;
 12165:     if (ea < XEiJ.EA_MM) {
 12166:       if (ea < XEiJ.EA_AR) {  //SUBX.B Dr,Dq
 12167:         int qqq = XEiJ.regOC >> 9 & 7;
 12168:         XEiJ.mpuCycleCount++;
 12169:         y = XEiJ.regRn[ea];
 12170:         x = XEiJ.regRn[qqq];
 12171:         z = x - y - (XEiJ.regCCR >> 4);  //Xの左側はすべて0なのでCCR_X&を省略
 12172:         XEiJ.regRn[qqq] = ~255 & x | 255 & z;
 12173:       } else {  //SUBX.B -(Ar),-(Aq)
 12174:         XEiJ.mpuCycleCount += 2;
 12175:         M68kException.m6eIncremented -= 1L << (ea << 3);
 12176:         a = --XEiJ.regRn[ea];
 12177:         y = mmuReadByteSignData (a, XEiJ.regSRS);  //このr[ea]はアドレスレジスタ
 12178:         int aqq = XEiJ.regOC >> 9 & 15;  //1qqq=aqq
 12179:         M68kException.m6eIncremented -= 1L << (aqq << 3);
 12180:         a = --XEiJ.regRn[aqq];
 12181:         x = mmuModifyByteSignData (a, XEiJ.regSRS);
 12182:         z = x - y - (XEiJ.regCCR >> 4);  //Xの左側はすべて0なのでCCR_X&を省略
 12183:         mmuWriteByteData (a, z, XEiJ.regSRS);
 12184:       }
 12185:       XEiJ.regCCR = (z >> 4 & XEiJ.REG_CCR_N | (255 & z) - 1 >> 6 & XEiJ.regCCR & XEiJ.REG_CCR_Z |  //SUBXはZをクリアすることはあるがセットすることはない
 12186:              ((x ^ y) & (x ^ z)) >> 6 & XEiJ.REG_CCR_V |
 12187:              (byte) (x & (y ^ z) ^ (y | z)) >> 7 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C));  //ccr_subx_byte
 12188:     } else {  //SUB.B Dq,<ea>
 12189:       XEiJ.mpuCycleCount++;
 12190:       y = XEiJ.regRn[XEiJ.regOC >> 9 & 7];
 12191:       a = efaMltByte (ea);
 12192:       x = mmuModifyByteSignData (a, XEiJ.regSRS);
 12193:       z = x - y;
 12194:       mmuWriteByteData (a, z, XEiJ.regSRS);
 12195:       XEiJ.regCCR = (XEiJ.MPU_TSTB_TABLE[255 & z] |
 12196:              ((x ^ y) & (x ^ z)) >> 6 & XEiJ.REG_CCR_V |
 12197:              (byte) (x & (y ^ z) ^ (y | z)) >> 7 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C));  //ccr_sub_byte
 12198:     }
 12199:   }  //irpSubToMemByte
 12200: 
 12201:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12202:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 12203:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 12204:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12205:   //SUBX.W Dr,Dq                                    |-|012346|-|*UUUU|*****|          |1001_qqq_101_000_rrr
 12206:   //SUBX.W -(Ar),-(Aq)                              |-|012346|-|*UUUU|*****|          |1001_qqq_101_001_rrr
 12207:   //SUB.W Dq,<ea>                                   |-|012346|-|UUUUU|*****|  M+-WXZ  |1001_qqq_101_mmm_rrr
 12208:   public static void irpSubToMemWord () throws M68kException {
 12209:     int ea = XEiJ.regOC & 63;
 12210:     int a, x, y, z;
 12211:     if (ea < XEiJ.EA_MM) {
 12212:       if (ea < XEiJ.EA_AR) {  //SUBX.W Dr,Dq
 12213:         int qqq = XEiJ.regOC >> 9 & 7;
 12214:         XEiJ.mpuCycleCount++;
 12215:         y = XEiJ.regRn[ea];
 12216:         x = XEiJ.regRn[qqq];
 12217:         z = x - y - (XEiJ.regCCR >> 4);  //Xの左側はすべて0なのでCCR_X&を省略
 12218:         XEiJ.regRn[qqq] = ~65535 & x | (char) z;
 12219:       } else {  //SUBX.W -(Ar),-(Aq)
 12220:         XEiJ.mpuCycleCount += 2;
 12221:         M68kException.m6eIncremented -= 2L << (ea << 3);
 12222:         a = XEiJ.regRn[ea] -= 2;
 12223:         y = mmuReadWordSignData (a, XEiJ.regSRS);  //このr[ea]はアドレスレジスタ
 12224:         int aqq = XEiJ.regOC >> 9 & 15;
 12225:         M68kException.m6eIncremented -= 2L << (aqq << 3);
 12226:         a = XEiJ.regRn[aqq] -= 2;
 12227:         x = mmuModifyWordSignData (a, XEiJ.regSRS);
 12228:         z = x - y - (XEiJ.regCCR >> 4);  //Xの左側はすべて0なのでCCR_X&を省略
 12229:         mmuWriteWordData (a, z, XEiJ.regSRS);
 12230:       }
 12231:       XEiJ.regCCR = (z >> 12 & XEiJ.REG_CCR_N | (char) z - 1 >> 14 & XEiJ.regCCR & XEiJ.REG_CCR_Z |  //ADDXはZをクリアすることはあるがセットすることはない
 12232:              ((x ^ y) & (x ^ z)) >> 14 & XEiJ.REG_CCR_V |
 12233:              (short) (x & (y ^ z) ^ (y | z)) >> 15 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C));  //ccr_subx_word
 12234:     } else {  //SUB.W Dq,<ea>
 12235:       XEiJ.mpuCycleCount++;
 12236:       y = (short) XEiJ.regRn[XEiJ.regOC >> 9 & 7];
 12237:       a = efaMltWord (ea);
 12238:       x = mmuModifyWordSignData (a, XEiJ.regSRS);
 12239:       z = x - y;
 12240:       mmuWriteWordData (a, z, XEiJ.regSRS);
 12241:       XEiJ.regCCR = (z >> 12 & XEiJ.REG_CCR_N | (char) z - 1 >> 14 & XEiJ.REG_CCR_Z |
 12242:              ((x ^ y) & (x ^ z)) >> 14 & XEiJ.REG_CCR_V |
 12243:              (short) (x & (y ^ z) ^ (y | z)) >> 15 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C));  //ccr_sub_word
 12244:     }
 12245:   }  //irpSubToMemWord
 12246: 
 12247:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12248:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 12249:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 12250:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12251:   //SUBX.L Dr,Dq                                    |-|012346|-|*UUUU|*****|          |1001_qqq_110_000_rrr
 12252:   //SUBX.L -(Ar),-(Aq)                              |-|012346|-|*UUUU|*****|          |1001_qqq_110_001_rrr
 12253:   //SUB.L Dq,<ea>                                   |-|012346|-|UUUUU|*****|  M+-WXZ  |1001_qqq_110_mmm_rrr
 12254:   public static void irpSubToMemLong () throws M68kException {
 12255:     int ea = XEiJ.regOC & 63;
 12256:     if (ea < XEiJ.EA_MM) {
 12257:       int x;
 12258:       int y;
 12259:       int z;
 12260:       if (ea < XEiJ.EA_AR) {  //SUBX.L Dr,Dq
 12261:         int qqq = XEiJ.regOC >> 9 & 7;
 12262:         XEiJ.mpuCycleCount++;
 12263:         XEiJ.regRn[qqq] = z = (x = XEiJ.regRn[qqq]) - (y = XEiJ.regRn[ea]) - (XEiJ.regCCR >> 4);  //Xの左側はすべて0なのでCCR_X&を省略
 12264:       } else {  //SUBX.L -(Ar),-(Aq)
 12265:         XEiJ.mpuCycleCount += 2;
 12266:         M68kException.m6eIncremented -= 4L << (ea << 3);
 12267:         int a = XEiJ.regRn[ea] -= 4;  //このr[ea]はアドレスレジスタ
 12268:         y = mmuReadLongData (a, XEiJ.regSRS);
 12269:         int aqq = XEiJ.regOC >> 9 & 15;
 12270:         M68kException.m6eIncremented -= 4L << (aqq << 3);
 12271:         a = XEiJ.regRn[aqq] -= 4;
 12272:         mmuWriteLongData (a, z = (x = mmuModifyLongData (a, XEiJ.regSRS)) - y - (XEiJ.regCCR >> 4), XEiJ.regSRS);  //Xの左側はすべて0なのでCCR_X&を省略
 12273:       }
 12274:       XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_Z : 0) |
 12275:              ((x ^ y) & (x ^ z)) >>> 31 << 1 |
 12276:              (x & (y ^ z) ^ (y | z)) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C));  //ccr_subx
 12277:     } else {  //SUB.L Dq,<ea>
 12278:       XEiJ.mpuCycleCount++;
 12279:       int a = efaMltLong (ea);
 12280:       int x;
 12281:       int y;
 12282:       int z;
 12283:       mmuWriteLongData (a, z = (x = mmuModifyLongData (a, XEiJ.regSRS)) - (y = XEiJ.regRn[XEiJ.regOC >> 9 & 7]), XEiJ.regSRS);
 12284:       XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) |
 12285:              ((x ^ y) & (x ^ z)) >>> 31 << 1 |
 12286:              (x & (y ^ z) ^ (y | z)) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C));  //ccr_sub
 12287:     }
 12288:   }  //irpSubToMemLong
 12289: 
 12290:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12291:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 12292:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 12293:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12294:   //SUBA.L <ea>,Aq                                  |-|012346|-|-----|-----|DAM+-WXZPI|1001_qqq_111_mmm_rrr
 12295:   //SUB.L <ea>,Aq                                   |A|012346|-|-----|-----|DAM+-WXZPI|1001_qqq_111_mmm_rrr [SUBA.L <ea>,Aq]
 12296:   //CLR.L Ar                                        |A|012346|-|-----|-----| A        |1001_rrr_111_001_rrr [SUBA.L Ar,Ar]
 12297:   public static void irpSubaLong () throws M68kException {
 12298:     int ea = XEiJ.regOC & 63;
 12299:     XEiJ.mpuCycleCount++;
 12300:     int z = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS) : mmuReadLongData (efaAnyLong (ea), XEiJ.regSRS);  //このr[ea]はデータレジスタまたはアドレスレジスタ。pcls。イミディエイトを分離。ここでAqが変化する可能性があることに注意
 12301:     XEiJ.regRn[XEiJ.regOC >> 9 & 15] -= z;  //r[op >> 9 & 15] -= ea < XEiJ.EA_MM ? r[ea] : rls (efaAnyLong (ea));は不可
 12302:     //ccrは変化しない
 12303:   }  //irpSubaLong
 12304: 
 12305:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12306:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 12307:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 12308:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12309:   //SXCALL <name>                                   |A|012346|-|UUUUU|*****|          |1010_0dd_ddd_ddd_ddd [ALINE #<data>]
 12310:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12311:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 12312:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 12313:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12314:   //ALINE #<data>                                   |-|012346|-|UUUUU|*****|          |1010_ddd_ddd_ddd_ddd (line 1010 emulator)
 12315:   public static void irpAline () throws M68kException {
 12316:     irpExceptionFormat0 (M68kException.M6E_LINE_1010_EMULATOR << 2, XEiJ.regPC0);  //pcは命令の先頭
 12317:   }  //irpAline
 12318: 
 12319:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12320:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 12321:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 12322:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12323:   //CMP.B <ea>,Dq                                   |-|012346|-|-UUUU|-****|D M+-WXZPI|1011_qqq_000_mmm_rrr
 12324:   public static void irpCmpByte () throws M68kException {
 12325:     XEiJ.mpuCycleCount++;
 12326:     int ea = XEiJ.regOC & 63;
 12327:     int x;
 12328:     int y;
 12329:     int z = (byte) ((x = (byte) XEiJ.regRn[XEiJ.regOC >> 9 & 7]) - (y = ea < XEiJ.EA_AR ? (byte) XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadByteSignExword ((XEiJ.regPC += 2) - 1, XEiJ.regSRS) : mmuReadByteSignData (efaAnyByte (ea), XEiJ.regSRS)));  //pcbs。イミディエイトを分離
 12330:     XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) |
 12331:            ((x ^ y) & (x ^ z)) >>> 31 << 1 |
 12332:            (x & (y ^ z) ^ (y | z)) >>> 31);  //ccr_cmp
 12333:   }  //irpCmpByte
 12334: 
 12335:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12336:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 12337:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 12338:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12339:   //CMP.W <ea>,Dq                                   |-|012346|-|-UUUU|-****|DAM+-WXZPI|1011_qqq_001_mmm_rrr
 12340:   public static void irpCmpWord () throws M68kException {
 12341:     XEiJ.mpuCycleCount++;
 12342:     int ea = XEiJ.regOC & 63;
 12343:     int x;
 12344:     int y;
 12345:     int z = (short) ((x = (short) XEiJ.regRn[XEiJ.regOC >> 9 & 7]) - (y = ea < XEiJ.EA_MM ? (short) XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) : mmuReadWordSignData (efaAnyWord (ea), XEiJ.regSRS)));  //このr[ea]はデータレジスタまたはアドレスレジスタ。pcws。イミディエイトを分離
 12346:     XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) |
 12347:            ((x ^ y) & (x ^ z)) >>> 31 << 1 |
 12348:            (x & (y ^ z) ^ (y | z)) >>> 31);  //ccr_cmp
 12349:   }  //irpCmpWord
 12350: 
 12351:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12352:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 12353:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 12354:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12355:   //CMP.L <ea>,Dq                                   |-|012346|-|-UUUU|-****|DAM+-WXZPI|1011_qqq_010_mmm_rrr
 12356:   public static void irpCmpLong () throws M68kException {
 12357:     XEiJ.mpuCycleCount++;
 12358:     int ea = XEiJ.regOC & 63;
 12359:     int x;
 12360:     int y;
 12361:     int z = (x = XEiJ.regRn[XEiJ.regOC >> 9 & 7]) - (y = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS) : mmuReadLongData (efaAnyLong (ea), XEiJ.regSRS));  //このr[ea]はデータレジスタまたはアドレスレジスタ。pcls。イミディエイトを分離
 12362:     XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) |
 12363:            ((x ^ y) & (x ^ z)) >>> 31 << 1 |
 12364:            (x & (y ^ z) ^ (y | z)) >>> 31);  //ccr_cmp
 12365:   }  //irpCmpLong
 12366: 
 12367:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12368:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 12369:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 12370:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12371:   //CMPA.W <ea>,Aq                                  |-|012346|-|-UUUU|-****|DAM+-WXZPI|1011_qqq_011_mmm_rrr
 12372:   //CMP.W <ea>,Aq                                   |A|012346|-|-UUUU|-****|DAM+-WXZPI|1011_qqq_011_mmm_rrr [CMPA.W <ea>,Aq]
 12373:   //
 12374:   //CMPA.W <ea>,Aq
 12375:   //  ソースを符号拡張してロングで比較する
 12376:   public static void irpCmpaWord () throws M68kException {
 12377:     XEiJ.mpuCycleCount++;
 12378:     int ea = XEiJ.regOC & 63;
 12379:     //ソースを符号拡張してからロングで比較する
 12380:     int y = ea < XEiJ.EA_MM ? (short) XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) : mmuReadWordSignData (efaAnyWord (ea), XEiJ.regSRS);  //このr[ea]はデータレジスタまたはアドレスレジスタ。pcws。イミディエイトを分離。ここでAqが変化する可能性があることに注意
 12381:     int x;
 12382:     int z = (x = XEiJ.regRn[XEiJ.regOC >> 9 & 15]) - y;
 12383:     XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) |
 12384:            ((x ^ y) & (x ^ z)) >>> 31 << 1 |
 12385:            (x & (y ^ z) ^ (y | z)) >>> 31);  //ccr_cmp
 12386:   }  //irpCmpaWord
 12387: 
 12388:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12389:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 12390:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 12391:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12392:   //EOR.B Dq,<ea>                                   |-|012346|-|-UUUU|-**00|D M+-WXZ  |1011_qqq_100_mmm_rrr
 12393:   //CMPM.B (Ar)+,(Aq)+                              |-|012346|-|-UUUU|-****|          |1011_qqq_100_001_rrr
 12394:   public static void irpEorByte () throws M68kException {
 12395:     int ea = XEiJ.regOC & 63;
 12396:     if (ea >> 3 == XEiJ.MMM_AR) {  //CMPM.B (Ar)+,(Aq)+
 12397:       XEiJ.mpuCycleCount += 2;
 12398:       M68kException.m6eIncremented += 1L << (ea << 3);
 12399:       int a = XEiJ.regRn[ea]++;  //このr[ea]はアドレスレジスタ
 12400:       int y = mmuReadByteSignData (a, XEiJ.regSRS);
 12401:       int x;
 12402:       int aqq = XEiJ.regOC >> 9 & 15;
 12403:       M68kException.m6eIncremented += 1L << (aqq << 3);
 12404:       a = XEiJ.regRn[aqq]++;
 12405:       int z = (byte) ((x = mmuReadByteSignData (a, XEiJ.regSRS)) - y);
 12406:       XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) |
 12407:              ((x ^ y) & (x ^ z)) >>> 31 << 1 |
 12408:              (x & (y ^ z) ^ (y | z)) >>> 31);  //ccr_cmp
 12409:     } else {
 12410:       int qqq = XEiJ.regOC >> 9 & 7;
 12411:       int z;
 12412:       if (ea < XEiJ.EA_AR) {  //EOR.B Dq,Dr
 12413:         XEiJ.mpuCycleCount++;
 12414:         z = XEiJ.regRn[ea] ^= 255 & XEiJ.regRn[qqq];  //0拡張してからEOR
 12415:       } else {  //EOR.B Dq,<mem>
 12416:         XEiJ.mpuCycleCount++;
 12417:         int a = efaMltByte (ea);
 12418:         mmuWriteByteData (a, z = XEiJ.regRn[qqq] ^ mmuModifyByteSignData (a, XEiJ.regSRS), XEiJ.regSRS);
 12419:       }
 12420:       XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & z];  //ccr_tst_byte
 12421:     }
 12422:   }  //irpEorByte
 12423: 
 12424:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12425:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 12426:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 12427:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12428:   //EOR.W Dq,<ea>                                   |-|012346|-|-UUUU|-**00|D M+-WXZ  |1011_qqq_101_mmm_rrr
 12429:   //CMPM.W (Ar)+,(Aq)+                              |-|012346|-|-UUUU|-****|          |1011_qqq_101_001_rrr
 12430:   public static void irpEorWord () throws M68kException {
 12431:     int ea = XEiJ.regOC & 63;
 12432:     int rrr = XEiJ.regOC & 7;
 12433:     int mmm = ea >> 3;
 12434:     if (mmm == XEiJ.MMM_AR) {  //CMPM.W (Ar)+,(Aq)+
 12435:       XEiJ.mpuCycleCount += 2;
 12436:       M68kException.m6eIncremented += 2L << (ea << 3);
 12437:       int a = (XEiJ.regRn[ea] += 2) - 2;  //このr[ea]はアドレスレジスタ
 12438:       int y = mmuReadWordSignData (a, XEiJ.regSRS);
 12439:       int x;
 12440:       int aqq = XEiJ.regOC >> 9 & 15;
 12441:       M68kException.m6eIncremented += 2L << (aqq << 3);
 12442:       a = (XEiJ.regRn[aqq] += 2) - 2;
 12443:       int z = (short) ((x = mmuReadWordSignData (a, XEiJ.regSRS)) - y);
 12444:       XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) |
 12445:              ((x ^ y) & (x ^ z)) >>> 31 << 1 |
 12446:              (x & (y ^ z) ^ (y | z)) >>> 31);  //ccr_cmp
 12447:     } else {
 12448:       int qqq = XEiJ.regOC >> 9 & 7;
 12449:       int z;
 12450:       if (ea < XEiJ.EA_AR) {  //EOR.W Dq,Dr
 12451:         XEiJ.mpuCycleCount++;
 12452:         z = XEiJ.regRn[rrr] ^= (char) XEiJ.regRn[qqq];  //0拡張してからEOR
 12453:       } else {  //EOR.W Dq,<mem>
 12454:         XEiJ.mpuCycleCount++;
 12455:         int a = efaMltWord (ea);
 12456:         mmuWriteWordData (a, z = XEiJ.regRn[qqq] ^ mmuModifyWordSignData (a, XEiJ.regSRS), XEiJ.regSRS);
 12457:       }
 12458:       XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (char) z - 1 >> 31 & XEiJ.REG_CCR_Z | ((short) z < 0 ? XEiJ.REG_CCR_N : 0);  //ccr_tst_word
 12459:     }
 12460:   }  //irpEorWord
 12461: 
 12462:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12463:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 12464:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 12465:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12466:   //EOR.L Dq,<ea>                                   |-|012346|-|-UUUU|-**00|D M+-WXZ  |1011_qqq_110_mmm_rrr
 12467:   //CMPM.L (Ar)+,(Aq)+                              |-|012346|-|-UUUU|-****|          |1011_qqq_110_001_rrr
 12468:   public static void irpEorLong () throws M68kException {
 12469:     int ea = XEiJ.regOC & 63;
 12470:     if (ea >> 3 == XEiJ.MMM_AR) {  //CMPM.L (Ar)+,(Aq)+
 12471:       XEiJ.mpuCycleCount += 2;
 12472:       M68kException.m6eIncremented += 4L << (ea << 3);
 12473:       int a = (XEiJ.regRn[ea] += 4) - 4;  //このr[ea]はアドレスレジスタ
 12474:       int y = mmuReadLongData (a, XEiJ.regSRS);
 12475:       int x;
 12476:       int aqq = XEiJ.regOC >> 9 & 15;
 12477:       M68kException.m6eIncremented += 4L << (aqq << 3);
 12478:       a = (XEiJ.regRn[aqq] += 4) - 4;
 12479:       int z = (x = mmuReadLongData (a, XEiJ.regSRS)) - y;
 12480:       XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) |
 12481:              ((x ^ y) & (x ^ z)) >>> 31 << 1 |
 12482:              (x & (y ^ z) ^ (y | z)) >>> 31);  //ccr_cmp
 12483:     } else {
 12484:       int qqq = XEiJ.regOC >> 9 & 7;
 12485:       int z;
 12486:       if (ea < XEiJ.EA_AR) {  //EOR.L Dq,Dr
 12487:         XEiJ.mpuCycleCount++;
 12488:         XEiJ.regRn[ea] = z = XEiJ.regRn[ea] ^ XEiJ.regRn[qqq];
 12489:       } else {  //EOR.L Dq,<mem>
 12490:         XEiJ.mpuCycleCount++;
 12491:         int a = efaMltLong (ea);
 12492:         mmuWriteLongData (a, z = mmuModifyLongData (a, XEiJ.regSRS) ^ XEiJ.regRn[qqq], XEiJ.regSRS);
 12493:       }
 12494:       XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X);  //ccr_tst
 12495:     }
 12496:   }  //irpEorLong
 12497: 
 12498:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12499:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 12500:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 12501:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12502:   //CMPA.L <ea>,Aq                                  |-|012346|-|-UUUU|-****|DAM+-WXZPI|1011_qqq_111_mmm_rrr
 12503:   //CMP.L <ea>,Aq                                   |A|012346|-|-UUUU|-****|DAM+-WXZPI|1011_qqq_111_mmm_rrr [CMPA.L <ea>,Aq]
 12504:   public static void irpCmpaLong () throws M68kException {
 12505:     XEiJ.mpuCycleCount++;
 12506:     int ea = XEiJ.regOC & 63;
 12507:     int y = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS) : mmuReadLongData (efaAnyLong (ea), XEiJ.regSRS);  //このr[ea]はデータレジスタまたはアドレスレジスタ。pcls。イミディエイトを分離。ここでAqが変化する可能性があることに注意
 12508:     int x;
 12509:     int z = (x = XEiJ.regRn[XEiJ.regOC >> 9 & 15]) - y;
 12510:     XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) |
 12511:            ((x ^ y) & (x ^ z)) >>> 31 << 1 |
 12512:            (x & (y ^ z) ^ (y | z)) >>> 31);  //ccr_cmp
 12513:   }  //irpCmpaLong
 12514: 
 12515:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12516:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 12517:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 12518:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12519:   //AND.B <ea>,Dq                                   |-|012346|-|-UUUU|-**00|D M+-WXZPI|1100_qqq_000_mmm_rrr
 12520:   public static void irpAndToRegByte () throws M68kException {
 12521:     XEiJ.mpuCycleCount++;
 12522:     int ea = XEiJ.regOC & 63;
 12523:     XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & (XEiJ.regRn[XEiJ.regOC >> 9 & 7] &= ~255 | (ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadByteSignExword ((XEiJ.regPC += 2) - 1, XEiJ.regSRS) : mmuReadByteSignData (efaAnyByte (ea), XEiJ.regSRS)))];  //ccr_tst_byte。pcbs。イミディエイトを分離。1拡張してからAND
 12524:   }  //irpAndToRegByte
 12525: 
 12526:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12527:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 12528:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 12529:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12530:   //AND.W <ea>,Dq                                   |-|012346|-|-UUUU|-**00|D M+-WXZPI|1100_qqq_001_mmm_rrr
 12531:   public static void irpAndToRegWord () throws M68kException {
 12532:     XEiJ.mpuCycleCount++;
 12533:     int ea = XEiJ.regOC & 63;
 12534:     int z = XEiJ.regRn[XEiJ.regOC >> 9 & 7] &= ~65535 | (ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) : mmuReadWordSignData (efaAnyWord (ea), XEiJ.regSRS));  //pcws。イミディエイトを分離。1拡張してからAND
 12535:     XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (char) z - 1 >> 31 & XEiJ.REG_CCR_Z | ((short) z < 0 ? XEiJ.REG_CCR_N : 0);  //ccr_tst_word
 12536:   }  //irpAndToRegWord
 12537: 
 12538:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12539:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 12540:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 12541:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12542:   //AND.L <ea>,Dq                                   |-|012346|-|-UUUU|-**00|D M+-WXZPI|1100_qqq_010_mmm_rrr
 12543:   public static void irpAndToRegLong () throws M68kException {
 12544:     XEiJ.mpuCycleCount++;
 12545:     int ea = XEiJ.regOC & 63;
 12546:     int z = XEiJ.regRn[XEiJ.regOC >> 9 & 7] &= ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS) : mmuReadLongData (efaAnyLong (ea), XEiJ.regSRS);  //pcls。イミディエイトを分離
 12547:     XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X);  //ccr_tst
 12548:   }  //irpAndToRegLong
 12549: 
 12550:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12551:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 12552:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 12553:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12554:   //MULU.W <ea>,Dq                                  |-|012346|-|-UUUU|-***0|D M+-WXZPI|1100_qqq_011_mmm_rrr
 12555:   public static void irpMuluWord () throws M68kException {
 12556:     XEiJ.mpuCycleCount += 2;
 12557:     int ea = XEiJ.regOC & 63;
 12558:     int qqq = XEiJ.regOC >> 9 & 7;
 12559:     int y = ea < XEiJ.EA_AR ? (char) XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) : mmuReadWordZeroData (efaAnyWord (ea), XEiJ.regSRS);  //pcwz。イミディエイトを分離
 12560:     int z;
 12561:     XEiJ.regRn[qqq] = z = (char) XEiJ.regRn[qqq] * y;  //積の下位32ビット。オーバーフローは無視
 12562:     XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X);  //ccr_tst
 12563:   }  //irpMuluWord
 12564: 
 12565:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12566:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 12567:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 12568:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12569:   //ABCD.B Dr,Dq                                    |-|012346|-|UUUUU|*U*U*|          |1100_qqq_100_000_rrr
 12570:   //ABCD.B -(Ar),-(Aq)                              |-|012346|-|UUUUU|*U*U*|          |1100_qqq_100_001_rrr
 12571:   //AND.B Dq,<ea>                                   |-|012346|-|-UUUU|-**00|  M+-WXZ  |1100_qqq_100_mmm_rrr
 12572:   public static void irpAndToMemByte () throws M68kException {
 12573:     int ea = XEiJ.regOC & 63;
 12574:     if (ea >= XEiJ.EA_MM) {  //AND.B Dq,<ea>
 12575:       XEiJ.mpuCycleCount++;
 12576:       int a = efaMltByte (ea);
 12577:       int z = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & mmuModifyByteSignData (a, XEiJ.regSRS);
 12578:       mmuWriteByteData (a, z, XEiJ.regSRS);
 12579:       XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & z];  //ccr_tst_byte
 12580:     } else if (ea < XEiJ.EA_AR) {  //ABCD.B Dr,Dq
 12581:       int qqq = XEiJ.regOC >> 9 & 7;
 12582:       XEiJ.mpuCycleCount++;
 12583:       XEiJ.regRn[qqq] = ~0xff & XEiJ.regRn[qqq] | irpAbcd (XEiJ.regRn[qqq], XEiJ.regRn[ea]);
 12584:     } else {  //ABCD.B -(Ar),-(Aq)
 12585:       XEiJ.mpuCycleCount += 2;
 12586:       M68kException.m6eIncremented -= 1L << (ea << 3);
 12587:       int a = --XEiJ.regRn[ea];  //このr[ea]はアドレスレジスタ
 12588:       int y = mmuReadByteZeroData (a, XEiJ.regSRS);
 12589:       int aqq = (XEiJ.regOC >> 9) - (96 - 8);
 12590:       M68kException.m6eIncremented -= 1L << (aqq << 3);
 12591:       a = --XEiJ.regRn[aqq];
 12592:       mmuWriteByteData (a, irpAbcd (mmuModifyByteZeroData (a, XEiJ.regSRS), y), XEiJ.regSRS);
 12593:     }
 12594:   }  //irpAndToMemByte
 12595: 
 12596:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12597:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 12598:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 12599:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12600:   //EXG.L Dq,Dr                                     |-|012346|-|-----|-----|          |1100_qqq_101_000_rrr
 12601:   //EXG.L Aq,Ar                                     |-|012346|-|-----|-----|          |1100_qqq_101_001_rrr
 12602:   //AND.W Dq,<ea>                                   |-|012346|-|-UUUU|-**00|  M+-WXZ  |1100_qqq_101_mmm_rrr
 12603:   public static void irpAndToMemWord () throws M68kException {
 12604:     int ea = XEiJ.regOC & 63;
 12605:     if (ea < XEiJ.EA_MM) {  //EXG
 12606:       XEiJ.mpuCycleCount++;
 12607:       if (ea < XEiJ.EA_AR) {  //EXG.L Dq,Dr
 12608:         int qqq = XEiJ.regOC >> 9 & 7;
 12609:         int t = XEiJ.regRn[qqq];
 12610:         XEiJ.regRn[qqq] = XEiJ.regRn[ea];
 12611:         XEiJ.regRn[ea] = t;
 12612:       } else {  //EXG.L Aq,Ar
 12613:         int aqq = (XEiJ.regOC >> 9) - (96 - 8);
 12614:         int t = XEiJ.regRn[aqq];
 12615:         XEiJ.regRn[aqq] = XEiJ.regRn[ea];  //このr[ea]アドレスレジスタ
 12616:         XEiJ.regRn[ea] = t;  //このr[ea]はアドレスレジスタ
 12617:       }
 12618:     } else {  //AND.W Dq,<ea>
 12619:       XEiJ.mpuCycleCount++;
 12620:       int a = efaMltWord (ea);
 12621:       int z = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & mmuModifyWordSignData (a, XEiJ.regSRS);
 12622:       mmuWriteWordData (a, z, XEiJ.regSRS);
 12623:       XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (char) z - 1 >> 31 & XEiJ.REG_CCR_Z | ((short) z < 0 ? XEiJ.REG_CCR_N : 0);  //ccr_tst_word
 12624:     }
 12625:   }  //irpAndToMemWord
 12626: 
 12627:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12628:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 12629:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 12630:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12631:   //EXG.L Dq,Ar                                     |-|012346|-|-----|-----|          |1100_qqq_110_001_rrr
 12632:   //AND.L Dq,<ea>                                   |-|012346|-|-UUUU|-**00|  M+-WXZ  |1100_qqq_110_mmm_rrr
 12633:   public static void irpAndToMemLong () throws M68kException {
 12634:     int ea = XEiJ.regOC & 63;
 12635:     int qqq = XEiJ.regOC >> 9 & 7;
 12636:     if (ea >> 3 == XEiJ.MMM_AR) {  //EXG.L Dq,Ar
 12637:       XEiJ.mpuCycleCount++;
 12638:       int t = XEiJ.regRn[qqq];
 12639:       XEiJ.regRn[qqq] = XEiJ.regRn[ea];  //このr[ea]はアドレスレジスタ
 12640:       XEiJ.regRn[ea] = t;  //このr[ea]はアドレスレジスタ
 12641:     } else {  //AND.L Dq,<ea>
 12642:       XEiJ.mpuCycleCount++;
 12643:       int a = efaMltLong (ea);
 12644:       int z;
 12645:       mmuWriteLongData (a, z = mmuModifyLongData (a, XEiJ.regSRS) & XEiJ.regRn[qqq], XEiJ.regSRS);
 12646:       XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X);  //ccr_tst
 12647:     }
 12648:   }  //irpAndToMemLong
 12649: 
 12650:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12651:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 12652:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 12653:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12654:   //MULS.W <ea>,Dq                                  |-|012346|-|-UUUU|-***0|D M+-WXZPI|1100_qqq_111_mmm_rrr
 12655:   public static void irpMulsWord () throws M68kException {
 12656:     XEiJ.mpuCycleCount += 2;
 12657:     int ea = XEiJ.regOC & 63;
 12658:     int qqq = XEiJ.regOC >> 9 & 7;
 12659:     int y = ea < XEiJ.EA_AR ? (short) XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) : mmuReadWordSignData (efaAnyWord (ea), XEiJ.regSRS);  //pcws。イミディエイトを分離
 12660:     int z;
 12661:     XEiJ.regRn[qqq] = z = (short) XEiJ.regRn[qqq] * y;  //積の下位32ビット。オーバーフローは無視
 12662:     XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X);  //ccr_tst
 12663:   }  //irpMulsWord
 12664: 
 12665:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12666:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 12667:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 12668:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12669:   //ADD.B <ea>,Dq                                   |-|012346|-|UUUUU|*****|D M+-WXZPI|1101_qqq_000_mmm_rrr
 12670:   public static void irpAddToRegByte () throws M68kException {
 12671:     XEiJ.mpuCycleCount++;
 12672:     int ea = XEiJ.regOC & 63;
 12673:     int qqq = XEiJ.regOC >> 9 & 7;
 12674:     int x, y, z;
 12675:     y = ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadByteSignExword ((XEiJ.regPC += 2) - 1, XEiJ.regSRS) : mmuReadByteSignData (efaAnyByte (ea), XEiJ.regSRS);  //pcbs。イミディエイトを分離
 12676:     x = XEiJ.regRn[qqq];
 12677:     z = x + y;
 12678:     XEiJ.regRn[qqq] = ~255 & x | 255 & z;
 12679:     XEiJ.regCCR = (XEiJ.MPU_TSTB_TABLE[255 & z] |
 12680:            ((x ^ z) & (y ^ z)) >> 6 & XEiJ.REG_CCR_V |
 12681:            (byte) ((x | y) ^ (x ^ y) & z) >> 7 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C));  //ccr_add_byte
 12682:   }  //irpAddToRegByte
 12683: 
 12684:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12685:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 12686:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 12687:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12688:   //ADD.W <ea>,Dq                                   |-|012346|-|UUUUU|*****|DAM+-WXZPI|1101_qqq_001_mmm_rrr
 12689:   public static void irpAddToRegWord () throws M68kException {
 12690:     XEiJ.mpuCycleCount++;
 12691:     int ea = XEiJ.regOC & 63;
 12692:     int qqq = XEiJ.regOC >> 9 & 7;
 12693:     int x, y, z;
 12694:     y = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) : mmuReadWordSignData (efaAnyWord (ea), XEiJ.regSRS);  //このr[ea]はデータレジスタまたはアドレスレジスタ。pcws。イミディエイトを分離
 12695:     x = XEiJ.regRn[qqq];
 12696:     z = x + y;
 12697:     XEiJ.regRn[qqq] = ~65535 & x | (char) z;
 12698:     XEiJ.regCCR = (z >> 12 & XEiJ.REG_CCR_N | (char) z - 1 >> 14 & XEiJ.REG_CCR_Z |
 12699:            ((x ^ z) & (y ^ z)) >> 14 & XEiJ.REG_CCR_V |
 12700:            (short) ((x | y) ^ (x ^ y) & z) >> 15 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C));  //ccr_add_word
 12701:   }  //irpAddToRegWord
 12702: 
 12703:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12704:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 12705:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 12706:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12707:   //ADD.L <ea>,Dq                                   |-|012346|-|UUUUU|*****|DAM+-WXZPI|1101_qqq_010_mmm_rrr
 12708:   public static void irpAddToRegLong () throws M68kException {
 12709:     XEiJ.mpuCycleCount++;
 12710:     int ea = XEiJ.regOC & 63;
 12711:     int qqq = XEiJ.regOC >> 9 & 7;
 12712:     int x, y, z;
 12713:     y = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS) : mmuReadLongData (efaAnyLong (ea), XEiJ.regSRS);  //このr[ea]はデータレジスタまたはアドレスレジスタ。pcls。イミディエイトを分離
 12714:     x = XEiJ.regRn[qqq];
 12715:     z = x + y;
 12716:     XEiJ.regRn[qqq] = z;
 12717:     XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) |
 12718:            ((x ^ z) & (y ^ z)) >> 30 & XEiJ.REG_CCR_V |
 12719:            ((x | y) ^ (x ^ y) & z) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C));  //ccr_add
 12720:   }  //irpAddToRegLong
 12721: 
 12722:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12723:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 12724:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 12725:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12726:   //ADDA.W <ea>,Aq                                  |-|012346|-|-----|-----|DAM+-WXZPI|1101_qqq_011_mmm_rrr
 12727:   //ADD.W <ea>,Aq                                   |A|012346|-|-----|-----|DAM+-WXZPI|1101_qqq_011_mmm_rrr [ADDA.W <ea>,Aq]
 12728:   //
 12729:   //ADDA.W <ea>,Aq
 12730:   //  ソースを符号拡張してロングで加算する
 12731:   public static void irpAddaWord () throws M68kException {
 12732:     XEiJ.mpuCycleCount++;
 12733:     int ea = XEiJ.regOC & 63;
 12734:     int z = ea < XEiJ.EA_MM ? (short) XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) : mmuReadWordSignData (efaAnyWord (ea), XEiJ.regSRS);  //このr[ea]はデータレジスタまたはアドレスレジスタ。pcws。イミディエイトを分離。ここでAqが変化する可能性があることに注意
 12735:     XEiJ.regRn[XEiJ.regOC >> 9 & 15] += z;  //r[op >> 9 & 15] += ea < XEiJ.EA_MM ? (short) r[ea] : rws (efaAnyWord (ea));は不可
 12736:     //ccrは変化しない
 12737:   }  //irpAddaWord
 12738: 
 12739:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12740:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 12741:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 12742:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12743:   //ADDX.B Dr,Dq                                    |-|012346|-|*UUUU|*****|          |1101_qqq_100_000_rrr
 12744:   //ADDX.B -(Ar),-(Aq)                              |-|012346|-|*UUUU|*****|          |1101_qqq_100_001_rrr
 12745:   //ADD.B Dq,<ea>                                   |-|012346|-|UUUUU|*****|  M+-WXZ  |1101_qqq_100_mmm_rrr
 12746:   public static void irpAddToMemByte () throws M68kException {
 12747:     int ea = XEiJ.regOC & 63;
 12748:     int a, x, y, z;
 12749:     if (ea < XEiJ.EA_MM) {
 12750:       if (ea < XEiJ.EA_AR) {  //ADDX.B Dr,Dq
 12751:         int qqq = XEiJ.regOC >> 9 & 7;
 12752:         XEiJ.mpuCycleCount++;
 12753:         y = XEiJ.regRn[ea];
 12754:         x = XEiJ.regRn[qqq];
 12755:         z = x + y + (XEiJ.regCCR >> 4);  //Xの左側はすべて0なのでCCR_X&を省略
 12756:         XEiJ.regRn[qqq] = ~255 & x | 255 & z;
 12757:       } else {  //ADDX.B -(Ar),-(Aq)
 12758:         XEiJ.mpuCycleCount += 2;
 12759:         M68kException.m6eIncremented -= 1L << (ea << 3);
 12760:         a = --XEiJ.regRn[ea];  //このr[ea]はアドレスレジスタ
 12761:         y = mmuReadByteSignData (a, XEiJ.regSRS);
 12762:         int aqq = XEiJ.regOC >> 9 & 15;  //1qqq=aqq
 12763:         M68kException.m6eIncremented -= 1L << (aqq << 3);
 12764:         a = --XEiJ.regRn[aqq];
 12765:         x = mmuModifyByteSignData (a, XEiJ.regSRS);
 12766:         z = x + y + (XEiJ.regCCR >> 4);  //Xの左側はすべて0なのでCCR_X&を省略
 12767:         mmuWriteByteData (a, z, XEiJ.regSRS);
 12768:       }
 12769:       XEiJ.regCCR = (z >> 4 & XEiJ.REG_CCR_N | (255 & z) - 1 >> 6 & XEiJ.regCCR & XEiJ.REG_CCR_Z |  //ADDXはZをクリアすることはあるがセットすることはない
 12770:              ((x ^ z) & (y ^ z)) >> 6 & XEiJ.REG_CCR_V |
 12771:              (byte) ((x | y) ^ (x ^ y) & z) >> 7 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C));  //ccr_addx_byte
 12772:     } else {  //ADD.B Dq,<ea>
 12773:       XEiJ.mpuCycleCount++;
 12774:       y = XEiJ.regRn[XEiJ.regOC >> 9 & 7];
 12775:       a = efaMltByte (ea);
 12776:       x = mmuModifyByteSignData (a, XEiJ.regSRS);
 12777:       z = x + y;
 12778:       mmuWriteByteData (a, z, XEiJ.regSRS);
 12779:       XEiJ.regCCR = (XEiJ.MPU_TSTB_TABLE[255 & z] |
 12780:              ((x ^ z) & (y ^ z)) >> 6 & XEiJ.REG_CCR_V |
 12781:              (byte) ((x | y) ^ (x ^ y) & z) >> 7 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C));  //ccr_add_byte
 12782:     }
 12783:   }  //irpAddToMemByte
 12784: 
 12785:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12786:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 12787:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 12788:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12789:   //ADDX.W Dr,Dq                                    |-|012346|-|*UUUU|*****|          |1101_qqq_101_000_rrr
 12790:   //ADDX.W -(Ar),-(Aq)                              |-|012346|-|*UUUU|*****|          |1101_qqq_101_001_rrr
 12791:   //ADD.W Dq,<ea>                                   |-|012346|-|UUUUU|*****|  M+-WXZ  |1101_qqq_101_mmm_rrr
 12792:   public static void irpAddToMemWord () throws M68kException {
 12793:     int ea = XEiJ.regOC & 63;
 12794:     int a, x, y, z;
 12795:     if (ea < XEiJ.EA_MM) {
 12796:       if (ea < XEiJ.EA_AR) {  //ADDX.W Dr,Dq
 12797:         int qqq = XEiJ.regOC >> 9 & 7;
 12798:         XEiJ.mpuCycleCount++;
 12799:         y = XEiJ.regRn[ea];
 12800:         x = XEiJ.regRn[qqq];
 12801:         z = x + y + (XEiJ.regCCR >> 4);  //Xの左側はすべて0なのでCCR_X&を省略
 12802:         XEiJ.regRn[qqq] = ~65535 & x | (char) z;
 12803:       } else {  //ADDX.W -(Ar),-(Aq)
 12804:         XEiJ.mpuCycleCount += 2;
 12805:         M68kException.m6eIncremented -= 2L << (ea << 3);
 12806:         a = XEiJ.regRn[ea] -= 2;  //このr[ea]はアドレスレジスタ
 12807:         y = mmuReadWordSignData (a, XEiJ.regSRS);
 12808:         int aqq = XEiJ.regOC >> 9 & 15;
 12809:         M68kException.m6eIncremented -= 2L << (aqq << 3);
 12810:         a = XEiJ.regRn[aqq] -= 2;
 12811:         x = mmuModifyWordSignData (a, XEiJ.regSRS);
 12812:         z = x + y + (XEiJ.regCCR >> 4);  //Xの左側はすべて0なのでCCR_X&を省略
 12813:         mmuWriteWordData (a, z, XEiJ.regSRS);
 12814:       }
 12815:       XEiJ.regCCR = (z >> 12 & XEiJ.REG_CCR_N | (char) z - 1 >> 14 & XEiJ.regCCR & XEiJ.REG_CCR_Z |  //ADDXはZをクリアすることはあるがセットすることはない
 12816:              ((x ^ z) & (y ^ z)) >> 14 & XEiJ.REG_CCR_V |
 12817:              (short) ((x | y) ^ (x ^ y) & z) >> 15 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C));  //ccr_addx_word
 12818:     } else {  //ADD.W Dq,<ea>
 12819:       XEiJ.mpuCycleCount++;
 12820:       a = efaMltWord (ea);
 12821:       y = XEiJ.regRn[XEiJ.regOC >> 9 & 7];
 12822:       x = mmuModifyWordSignData (a, XEiJ.regSRS);
 12823:       z = x + y;
 12824:       mmuWriteWordData (a, z, XEiJ.regSRS);
 12825:       XEiJ.regCCR = (z >> 12 & XEiJ.REG_CCR_N | (char) z - 1 >> 14 & XEiJ.REG_CCR_Z |
 12826:              ((x ^ z) & (y ^ z)) >> 14 & XEiJ.REG_CCR_V |
 12827:              (short) ((x | y) ^ (x ^ y) & z) >> 15 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C));  //ccr_add_word
 12828:     }
 12829:   }  //irpAddToMemWord
 12830: 
 12831:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12832:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 12833:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 12834:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12835:   //ADDX.L Dr,Dq                                    |-|012346|-|*UUUU|*****|          |1101_qqq_110_000_rrr
 12836:   //ADDX.L -(Ar),-(Aq)                              |-|012346|-|*UUUU|*****|          |1101_qqq_110_001_rrr
 12837:   //ADD.L Dq,<ea>                                   |-|012346|-|UUUUU|*****|  M+-WXZ  |1101_qqq_110_mmm_rrr
 12838:   public static void irpAddToMemLong () throws M68kException {
 12839:     int ea = XEiJ.regOC & 63;
 12840:     if (ea < XEiJ.EA_MM) {
 12841:       int x;
 12842:       int y;
 12843:       int z;
 12844:       if (ea < XEiJ.EA_AR) {  //ADDX.L Dr,Dq
 12845:         int qqq = XEiJ.regOC >> 9 & 7;
 12846:         XEiJ.mpuCycleCount++;
 12847:         XEiJ.regRn[qqq] = z = (x = XEiJ.regRn[qqq]) + (y = XEiJ.regRn[ea]) + (XEiJ.regCCR >> 4);  //Xの左側はすべて0なのでCCR_X&を省略
 12848:       } else {  //ADDX.L -(Ar),-(Aq)
 12849:         XEiJ.mpuCycleCount += 2;
 12850:         M68kException.m6eIncremented -= 4L << (ea << 3);
 12851:         int a = XEiJ.regRn[ea] -= 4;  //このr[ea]はアドレスレジスタ
 12852:         y = mmuReadLongData (a, XEiJ.regSRS);
 12853:         int aqq = XEiJ.regOC >> 9 & 15;
 12854:         M68kException.m6eIncremented -= 4L << (aqq << 3);
 12855:         a = XEiJ.regRn[aqq] -= 4;
 12856:         mmuWriteLongData (a, z = (x = mmuModifyLongData (a, XEiJ.regSRS)) + y + (XEiJ.regCCR >> 4), XEiJ.regSRS);  //Xの左側はすべて0なのでCCR_X&を省略
 12857:       }
 12858:       XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_Z : 0) |
 12859:              ((x ^ z) & (y ^ z)) >>> 31 << 1 |
 12860:              ((x | y) ^ (x ^ y) & z) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C));  //ccr_addx
 12861:     } else {  //ADD.L Dq,<ea>
 12862:       XEiJ.mpuCycleCount++;
 12863:       int a = efaMltLong (ea);
 12864:       int x;
 12865:       int y;
 12866:       int z;
 12867:       mmuWriteLongData (a, z = (x = mmuModifyLongData (a, XEiJ.regSRS)) + (y = XEiJ.regRn[XEiJ.regOC >> 9 & 7]), XEiJ.regSRS);
 12868:       XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) |
 12869:              ((x ^ z) & (y ^ z)) >>> 31 << 1 |
 12870:              ((x | y) ^ (x ^ y) & z) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C));  //ccr_add
 12871:     }
 12872:   }  //irpAddToMemLong
 12873: 
 12874:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12875:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 12876:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 12877:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12878:   //ADDA.L <ea>,Aq                                  |-|012346|-|-----|-----|DAM+-WXZPI|1101_qqq_111_mmm_rrr
 12879:   //ADD.L <ea>,Aq                                   |A|012346|-|-----|-----|DAM+-WXZPI|1101_qqq_111_mmm_rrr [ADDA.L <ea>,Aq]
 12880:   public static void irpAddaLong () throws M68kException {
 12881:     int ea = XEiJ.regOC & 63;
 12882:     XEiJ.mpuCycleCount++;
 12883:     int z = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS) : mmuReadLongData (efaAnyLong (ea), XEiJ.regSRS);  //このr[ea]はデータレジスタまたはアドレスレジスタ。pcls。イミディエイトを分離。ここでAqが変化する可能性があることに注意
 12884:     XEiJ.regRn[XEiJ.regOC >> 9 & 15] += z;  //r[op >> 9 & 15] += ea < XEiJ.EA_MM ? r[ea] : rls (efaAnyLong (ea));は不可
 12885:     //ccrは変化しない
 12886:   }  //irpAddaLong
 12887: 
 12888:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12889:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 12890:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 12891:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12892:   //ASR.B #<data>,Dr                                |-|012346|-|UUUUU|***0*|          |1110_qqq_000_000_rrr
 12893:   //LSR.B #<data>,Dr                                |-|012346|-|UUUUU|***0*|          |1110_qqq_000_001_rrr
 12894:   //ROXR.B #<data>,Dr                               |-|012346|-|*UUUU|***0*|          |1110_qqq_000_010_rrr
 12895:   //ROR.B #<data>,Dr                                |-|012346|-|-UUUU|-**0*|          |1110_qqq_000_011_rrr
 12896:   //ASR.B Dq,Dr                                     |-|012346|-|UUUUU|***0*|          |1110_qqq_000_100_rrr
 12897:   //LSR.B Dq,Dr                                     |-|012346|-|UUUUU|***0*|          |1110_qqq_000_101_rrr
 12898:   //ROXR.B Dq,Dr                                    |-|012346|-|*UUUU|***0*|          |1110_qqq_000_110_rrr
 12899:   //ROR.B Dq,Dr                                     |-|012346|-|-UUUU|-**0*|          |1110_qqq_000_111_rrr
 12900:   //ASR.B Dr                                        |A|012346|-|UUUUU|***0*|          |1110_001_000_000_rrr [ASR.B #1,Dr]
 12901:   //LSR.B Dr                                        |A|012346|-|UUUUU|***0*|          |1110_001_000_001_rrr [LSR.B #1,Dr]
 12902:   //ROXR.B Dr                                       |A|012346|-|*UUUU|***0*|          |1110_001_000_010_rrr [ROXR.B #1,Dr]
 12903:   //ROR.B Dr                                        |A|012346|-|-UUUU|-**0*|          |1110_001_000_011_rrr [ROR.B #1,Dr]
 12904:   //
 12905:   //ASR.B #<data>,Dr
 12906:   //ASR.B Dq,Dr
 12907:   //  算術右シフトバイト
 12908:   //       ........................アイウエオカキク XNZVC
 12909:   //     0 ........................アイウエオカキク Xア*00 Z=アイウエオカキク==0
 12910:   //     1 ........................アアイウエオカキ クア*0ク Z=アイウエオカキ==0
 12911:   //     2 ........................アアアイウエオカ キア*0キ Z=アイウエオカ==0
 12912:   //     3 ........................アアアアイウエオ カア*0カ Z=アイウエオ==0
 12913:   //     4 ........................アアアアアイウエ オア*0オ Z=アイウエ==0
 12914:   //     5 ........................アアアアアアイウ エア*0エ Z=アイウ==0
 12915:   //     6 ........................アアアアアアアイ ウア*0ウ Z=アイ==0
 12916:   //     7 ........................アアアアアアアア イア*0イ Z=ア==0
 12917:   //     8 ........................アアアアアアアア アア*0ア Z=ア==0
 12918:   //  CCR
 12919:   //    X  countが0のとき変化しない。他は最後に押し出されたビット
 12920:   //    N  結果の最上位ビット
 12921:   //    Z  結果が0のときセット。他はクリア
 12922:   //    V  常にクリア
 12923:   //    C  countが0のときクリア。他は最後に押し出されたビット
 12924:   //
 12925:   //LSR.B #<data>,Dr
 12926:   //LSR.B Dq,Dr
 12927:   //  論理右シフトバイト
 12928:   //       ........................アイウエオカキク XNZVC
 12929:   //     0 ........................アイウエオカキク Xア*00 Z=アイウエオカキク==0
 12930:   //     1 ........................0アイウエオカキ ク0*0ク Z=アイウエオカキ==0
 12931:   //     2 ........................00アイウエオカ キ0*0キ Z=アイウエオカ==0
 12932:   //     3 ........................000アイウエオ カ0*0カ Z=アイウエオ==0
 12933:   //     4 ........................0000アイウエ オ0*0オ Z=アイウエ==0
 12934:   //     5 ........................00000アイウ エ0*0エ Z=アイウ==0
 12935:   //     6 ........................000000アイ ウ0*0ウ Z=アイ==0
 12936:   //     7 ........................0000000ア イ0*0イ Z=ア==0
 12937:   //     8 ........................00000000 ア010ア
 12938:   //     9 ........................00000000 00100
 12939:   //  CCR
 12940:   //    X  countが0のとき変化しない。他は最後に押し出されたビット
 12941:   //    N  結果の最上位ビット
 12942:   //    Z  結果が0のときセット。他はクリア
 12943:   //    V  常にクリア
 12944:   //    C  countが0のときクリア。他は最後に押し出されたビット
 12945:   //
 12946:   //ROR.B #<data>,Dr
 12947:   //ROR.B Dq,Dr
 12948:   //  右ローテートバイト
 12949:   //       ........................アイウエオカキク XNZVC
 12950:   //     0 ........................アイウエオカキク Xア*00 Z=アイウエオカキク==0
 12951:   //     1 ........................クアイウエオカキ Xク*0ク Z=アイウエオカキク==0
 12952:   //     :
 12953:   //     7 ........................イウエオカキクア Xイ*0イ Z=アイウエオカキク==0
 12954:   //     8 ........................アイウエオカキク Xア*0ア Z=アイウエオカキク==0
 12955:   //  CCR
 12956:   //    X  常に変化しない
 12957:   //    N  結果の最上位ビット
 12958:   //    Z  結果が0のときセット。他はクリア
 12959:   //    V  常にクリア
 12960:   //    C  countが0のときクリア。他は結果の最上位ビット
 12961:   //
 12962:   //ROXR.B #<data>,Dr
 12963:   //ROXR.B Dq,Dr
 12964:   //  拡張右ローテートバイト
 12965:   //       ........................アイウエオカキク XNZVC
 12966:   //     0 ........................アイウエオカキク Xア*0X Z=アイウエオカキク==0
 12967:   //     1 ........................Xアイウエオカキ クX*0ク Z=アイウエオカキX==0
 12968:   //     2 ........................クXアイウエオカ キク*0キ Z=アイウエオカクX==0
 12969:   //     3 ........................キクXアイウエオ カキ*0カ Z=アイウエオキクX==0
 12970:   //     4 ........................カキクXアイウエ オカ*0オ Z=アイウエカキクX==0
 12971:   //     5 ........................オカキクXアイウ エオ*0エ Z=アイウオカキクX==0
 12972:   //     6 ........................エオカキクXアイ ウエ*0ウ Z=アイエオカキクX==0
 12973:   //     7 ........................ウエオカキクXア イウ*0イ Z=アウエオカキクX==0
 12974:   //     8 ........................イウエオカキクX アイ*0ア Z=イウエオカキクX==0
 12975:   //     9 ........................アイウエオカキク Xア*0X Z=アイウエオカキク==0
 12976:   //  CCR
 12977:   //    X  countが0のとき変化しない。他は最後に押し出されたビット
 12978:   //    N  結果の最上位ビット
 12979:   //    Z  結果が0のときセット。他はクリア
 12980:   //    V  常にクリア
 12981:   //    C  countが0のときXのコピー。他は最後に押し出されたビット
 12982:   public static void irpXxrToRegByte () throws M68kException {
 12983:     int rrr;
 12984:     int x = XEiJ.regRn[rrr = XEiJ.regOC & 7];
 12985:     int y;
 12986:     int z;
 12987:     int t;
 12988:     XEiJ.mpuCycleCount++;
 12989:     switch (XEiJ.regOC >> 3 & 0b111_000 >> 3) {
 12990:     case 0b000_000 >> 3:  //ASR.B #<data>,Dr
 12991:       y = (XEiJ.regOC >> 9) - 1 & 7;  //y=data-1=1-1~8-1
 12992:       XEiJ.regRn[rrr] = ~0xff & x | 0xff & (z = (t = (byte) x >> y) >> 1);
 12993:       XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | -(t & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C);  //XとCは最後に押し出されたビット
 12994:       break;
 12995:     case 0b001_000 >> 3:  //LSR.B #<data>,Dr
 12996:       y = (XEiJ.regOC >> 9) - 1 & 7;  //y=data-1=1-1~8-1
 12997:       XEiJ.regRn[rrr] = ~0xff & x | (z = (t = (0xff & x) >>> y) >>> 1);
 12998:       XEiJ.regCCR = (z == 0 ? XEiJ.REG_CCR_Z : 0) | -(t & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C);  //XとCは最後に押し出されたビット
 12999:       break;
 13000:     case 0b010_000 >> 3:  //ROXR.B #<data>,Dr
 13001:       y = (XEiJ.regOC >> 9) - 1 & 7;  //y=data-1=1-1~8-1
 13002:       z = (XEiJ.regCCR & XEiJ.REG_CCR_X) << 7 - 4 | (0xff & x) >>> 1;
 13003:       if (y == 1 - 1) {  //y=data-1=1-1
 13004:         t = x;
 13005:       } else {  //y=data-1=2-1~8-1
 13006:         z = x << 9 - 1 - y | (t = z >>> y - (2 - 1)) >>> 1;
 13007:       }
 13008:       XEiJ.regRn[rrr] = ~0xff & x | 0xff & (z = (byte) z);
 13009:       XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | -(t & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C);  //XとCは最後に押し出されたビット
 13010:       break;
 13011:     case 0b011_000 >> 3:  //ROR.B #<data>,Dr
 13012:       y = XEiJ.regOC >> 9 & 7;  //y=data&7
 13013:       XEiJ.regRn[rrr] = ~0xff & x | 0xff & (z = (byte) (x << 8 - y | (0xff & x) >>> y));
 13014:       XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | z >>> 7 & 1;  //Xは変化しない。Cは結果の最上位ビット
 13015:       break;
 13016:     case 0b100_000 >> 3:  //ASR.B Dq,Dr
 13017:       y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63;  //y=0~63。Javaのシフト演算子は5ビットでマスクされることに注意
 13018:       if (y == 0) {  //y=data=0
 13019:         z = (byte) x;
 13020:         t = XEiJ.regCCR & XEiJ.REG_CCR_X;  //Xは変化しない。Cはクリア
 13021:       } else {  //y=data=1~63
 13022:         XEiJ.regRn[rrr] = ~0xff & x | 0xff & (z = (t = (byte) x >> (y <= 8 ? y - 1 : 7)) >> 1);
 13023:         t = -(t & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C);  //XとCは最後に押し出されたビット
 13024:       }
 13025:       XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | t;
 13026:       break;
 13027:     case 0b101_000 >> 3:  //LSR.B Dq,Dr
 13028:       y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63;  //y=0~63。Javaのシフト演算子は5ビットでマスクされることに注意
 13029:       if (y == 0) {  //y=data=0
 13030:         z = (byte) x;
 13031:         XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (z < 0 ? XEiJ.REG_CCR_N : z == 0 ? XEiJ.REG_CCR_Z : 0);  //Xは変化しない。Cはクリア
 13032:       } else {  //y=data=1~63
 13033:         XEiJ.regRn[rrr] = ~0xff & x | (z = (t = y <= 8 ? (0xff & x) >>> y - 1 : 0) >>> 1);
 13034:         XEiJ.regCCR = (z == 0 ? XEiJ.REG_CCR_Z : 0) | -(t & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C);  //XとCは最後に押し出されたビット
 13035:       }
 13036:       break;
 13037:     case 0b110_000 >> 3:  //ROXR.B Dq,Dr
 13038:       y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63;  //y=0~63。Javaのシフト演算子は5ビットでマスクされることに注意
 13039:       //y %= 9;
 13040:       y = (y & 7) - (y >> 3);  //y=data=-7~7
 13041:       y += y >> 3 & 9;  //y=data=0~8
 13042:       if (y == 0) {  //y=data=0
 13043:         z = (byte) x;
 13044:         t = -(XEiJ.regCCR >> 4 & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C);  //Xは変化しない。CはXのコピー
 13045:       } else {  //y=data=1~8
 13046:         z = (XEiJ.regCCR & XEiJ.REG_CCR_X) << 7 - 4 | (0xff & x) >>> 1;
 13047:         if (y == 1) {  //y=data=1
 13048:           t = x;  //Cは最後に押し出されたビット
 13049:         } else {  //y=data=2~8
 13050:           z = x << 9 - y | (t = z >>> y - 2) >>> 1;
 13051:         }
 13052:         XEiJ.regRn[rrr] = ~0xff & x | 0xff & (z = (byte) z);
 13053:         t = -(t & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C);  //XとCは最後に押し出されたビット
 13054:       }
 13055:       XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | t;
 13056:       break;
 13057:     case 0b111_000 >> 3:  //ROR.B Dq,Dr
 13058:     default:
 13059:       y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63;  //y=0~63。Javaのシフト演算子は5ビットでマスクされることに注意
 13060:       if (y == 0) {
 13061:         z = (byte) x;
 13062:         t = 0;  //Cはクリア
 13063:       } else {
 13064:         y &= 7;  //y=data=0~7
 13065:         XEiJ.regRn[rrr] = ~0xff & x | 0xff & (z = (byte) (x << 8 - y | (0xff & x) >>> y));
 13066:         t = z >>> 7 & 1;  //Cは結果の最上位ビット
 13067:       }
 13068:       XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | t;  //Xは変化しない
 13069:     }
 13070:   }  //irpXxrToRegByte
 13071: 
 13072:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 13073:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 13074:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 13075:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 13076:   //ASR.W #<data>,Dr                                |-|012346|-|UUUUU|***0*|          |1110_qqq_001_000_rrr
 13077:   //LSR.W #<data>,Dr                                |-|012346|-|UUUUU|***0*|          |1110_qqq_001_001_rrr
 13078:   //ROXR.W #<data>,Dr                               |-|012346|-|*UUUU|***0*|          |1110_qqq_001_010_rrr
 13079:   //ROR.W #<data>,Dr                                |-|012346|-|-UUUU|-**0*|          |1110_qqq_001_011_rrr
 13080:   //ASR.W Dq,Dr                                     |-|012346|-|UUUUU|***0*|          |1110_qqq_001_100_rrr
 13081:   //LSR.W Dq,Dr                                     |-|012346|-|UUUUU|***0*|          |1110_qqq_001_101_rrr
 13082:   //ROXR.W Dq,Dr                                    |-|012346|-|*UUUU|***0*|          |1110_qqq_001_110_rrr
 13083:   //ROR.W Dq,Dr                                     |-|012346|-|-UUUU|-**0*|          |1110_qqq_001_111_rrr
 13084:   //ASR.W Dr                                        |A|012346|-|UUUUU|***0*|          |1110_001_001_000_rrr [ASR.W #1,Dr]
 13085:   //LSR.W Dr                                        |A|012346|-|UUUUU|***0*|          |1110_001_001_001_rrr [LSR.W #1,Dr]
 13086:   //ROXR.W Dr                                       |A|012346|-|*UUUU|***0*|          |1110_001_001_010_rrr [ROXR.W #1,Dr]
 13087:   //ROR.W Dr                                        |A|012346|-|-UUUU|-**0*|          |1110_001_001_011_rrr [ROR.W #1,Dr]
 13088:   //
 13089:   //ASR.W #<data>,Dr
 13090:   //ASR.W Dq,Dr
 13091:   //ASR.W <ea>
 13092:   //  算術右シフトワード
 13093:   //       ................アイウエオカキクケコサシスセソタ XNZVC
 13094:   //     0 ................アイウエオカキクケコサシスセソタ Xア*00 Z=アイウエオカキクケコサシスセソタ==0
 13095:   //     1 ................アアイウエオカキクケコサシスセソ タア*0タ Z=アイウエオカキクケコサシスセソ==0
 13096:   //     :
 13097:   //    15 ................アアアアアアアアアアアアアアアア イア*0イ Z=ア==0
 13098:   //    16 ................アアアアアアアアアアアアアアアア アア*0ア Z=ア==0
 13099:   //  CCR
 13100:   //    X  countが0のとき変化しない。他は最後に押し出されたビット
 13101:   //    N  結果の最上位ビット
 13102:   //    Z  結果が0のときセット。他はクリア
 13103:   //    V  常にクリア
 13104:   //    C  countが0のときクリア。他は最後に押し出されたビット
 13105:   //
 13106:   //LSR.W #<data>,Dr
 13107:   //LSR.W Dq,Dr
 13108:   //LSR.W <ea>
 13109:   //  論理右シフトワード
 13110:   //       ................アイウエオカキクケコサシスセソタ XNZVC
 13111:   //     0 ................アイウエオカキクケコサシスセソタ Xア*00 Z=アイウエオカキクケコサシスセソタ==0
 13112:   //     1 ................0アイウエオカキクケコサシスセソ タ0*0タ Z=アイウエオカキクケコサシスセソ==0
 13113:   //     :
 13114:   //    15 ................000000000000000ア イ0*0イ Z=ア==0
 13115:   //    16 ................0000000000000000 ア010ア
 13116:   //    17 ................0000000000000000 00100
 13117:   //  CCR
 13118:   //    X  countが0のとき変化しない。他は最後に押し出されたビット
 13119:   //    N  結果の最上位ビット
 13120:   //    Z  結果が0のときセット。他はクリア
 13121:   //    V  常にクリア
 13122:   //    C  countが0のときクリア。他は最後に押し出されたビット
 13123:   //
 13124:   //ROR.W #<data>,Dr
 13125:   //ROR.W Dq,Dr
 13126:   //ROR.W <ea>
 13127:   //  右ローテートワード
 13128:   //       ................アイウエオカキクケコサシスセソタ XNZVC
 13129:   //     0 ................アイウエオカキクケコサシスセソタ Xア*00 Z=アイウエオカキクケコサシスセソタ==0
 13130:   //     1 ................タアイウエオカキクケコサシスセソ Xタ*0タ Z=アイウエオカキクケコサシスセソタ==0
 13131:   //     :
 13132:   //    15 ................イウエオカキクケコサシスセソタア Xイ*0イ Z=アイウエオカキクケコサシスセソタ==0
 13133:   //    16 ................アイウエオカキクケコサシスセソタ Xア*0ア Z=アイウエオカキクケコサシスセソタ==0
 13134:   //  CCR
 13135:   //    X  常に変化しない
 13136:   //    N  結果の最上位ビット
 13137:   //    Z  結果が0のときセット。他はクリア
 13138:   //    V  常にクリア
 13139:   //    C  countが0のときクリア。他は結果の最上位ビット
 13140:   //
 13141:   //ROXR.W #<data>,Dr
 13142:   //ROXR.W Dq,Dr
 13143:   //ROXR.W <ea>
 13144:   //  拡張右ローテートワード
 13145:   //       ................アイウエオカキクケコサシスセソタ XNZVC
 13146:   //     0 ................アイウエオカキクケコサシスセソタ Xア*0X Z=アイウエオカキクケコサシスセソタ==0
 13147:   //     1 ................Xアイウエオカキクケコサシスセソ タX*0タ Z=アイウエオカキクケコサシスセソX==0
 13148:   //     2 ................タXアイウエオカキクケコサシスセ ソタ*0ソ Z=アイウエオカキクケコサシスセタX==0
 13149:   //     :
 13150:   //    15 ................ウエオカキクケコサシスセソタXア イウ*0イ Z=アウエオカキクケコサシスセソタX==0
 13151:   //    16 ................イウエオカキクケコサシスセソタX アイ*0ア Z=イウエオカキクケコサシスセソタX==0
 13152:   //    17 ................アイウエオカキクケコサシスセソタ Xア*0X Z=アイウエオカキクケコサシスセソタ==0
 13153:   //  CCR
 13154:   //    X  countが0のとき変化しない。他は最後に押し出されたビット
 13155:   //    N  結果の最上位ビット
 13156:   //    Z  結果が0のときセット。他はクリア
 13157:   //    V  常にクリア
 13158:   //    C  countが0のときXのコピー。他は最後に押し出されたビット
 13159:   public static void irpXxrToRegWord () throws M68kException {
 13160:     int rrr;
 13161:     int x = XEiJ.regRn[rrr = XEiJ.regOC & 7];
 13162:     int y;
 13163:     int z;
 13164:     int t;
 13165:     XEiJ.mpuCycleCount++;
 13166:     switch (XEiJ.regOC >> 3 & 0b111_000 >> 3) {
 13167:     case 0b000_000 >> 3:  //ASR.W #<data>,Dr
 13168:       y = (XEiJ.regOC >> 9) - 1 & 7;  //y=data-1=1-1~8-1
 13169:       XEiJ.regRn[rrr] = ~0xffff & x | (char) (z = (t = (short) x >> y) >> 1);
 13170:       XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | -(t & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C);  //XとCは最後に押し出されたビット
 13171:       break;
 13172:     case 0b001_000 >> 3:  //LSR.W #<data>,Dr
 13173:       y = (XEiJ.regOC >> 9) - 1 & 7;  //y=data-1=1-1~8-1
 13174:       XEiJ.regRn[rrr] = ~0xffff & x | (z = (t = (char) x >>> y) >>> 1);
 13175:       XEiJ.regCCR = (z == 0 ? XEiJ.REG_CCR_Z : 0) | -(t & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C);  //XとCは最後に押し出されたビット
 13176:       break;
 13177:     case 0b010_000 >> 3:  //ROXR.W #<data>,Dr
 13178:       y = (XEiJ.regOC >> 9) - 1 & 7;  //y=data-1=1-1~8-1
 13179:       z = (XEiJ.regCCR & XEiJ.REG_CCR_X) << 15 - 4 | (char) x >>> 1;
 13180:       if (y == 1 - 1) {  //y=data-1=1-1
 13181:         t = x;
 13182:       } else {  //y=data-1=2-1~8-1
 13183:         z = x << 17 - 1 - y | (t = z >>> y - (2 - 1)) >>> 1;
 13184:       }
 13185:       XEiJ.regRn[rrr] = ~0xffff & x | (char) (z = (short) z);
 13186:       XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | -(t & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C);  //XとCは最後に押し出されたビット
 13187:       break;
 13188:     case 0b011_000 >> 3:  //ROR.W #<data>,Dr
 13189:       y = (XEiJ.regOC >> 9) - 1 & 7;  //y=data-1=1-1~8-1
 13190:       XEiJ.regRn[rrr] = ~0xffff & x | (char) (z = (short) (x << 16 - 1 - y | (char) x >>> y + 1));
 13191:       XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | z >>> 15 & 1;  //Xは変化しない。Cは結果の最上位ビット
 13192:       break;
 13193:     case 0b100_000 >> 3:  //ASR.W Dq,Dr
 13194:       y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63;  //y=0~63。Javaのシフト演算子は5ビットでマスクされることに注意
 13195:       if (y == 0) {  //y=data=0
 13196:         z = (short) x;
 13197:         t = XEiJ.regCCR & XEiJ.REG_CCR_X;  //Xは変化しない。Cはクリア
 13198:       } else {  //y=data=1~63
 13199:         XEiJ.regRn[rrr] = ~0xffff & x | (char) (z = (t = (short) x >> (y <= 16 ? y - 1 : 15)) >> 1);
 13200:         t = -(t & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C);  //XとCは最後に押し出されたビット
 13201:       }
 13202:       XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | t;
 13203:       break;
 13204:     case 0b101_000 >> 3:  //LSR.W Dq,Dr
 13205:       y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63;  //y=0~63。Javaのシフト演算子は5ビットでマスクされることに注意
 13206:       if (y == 0) {  //y=data=0
 13207:         z = (short) x;
 13208:         XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (z < 0 ? XEiJ.REG_CCR_N : z == 0 ? XEiJ.REG_CCR_Z : 0);  //Xは変化しない。Cはクリア
 13209:       } else {  //y=data=1~63
 13210:         XEiJ.regRn[rrr] = ~0xffff & x | (z = (t = y <= 16 ? (char) x >>> y - 1 : 0) >>> 1);
 13211:         XEiJ.regCCR = (z == 0 ? XEiJ.REG_CCR_Z : 0) | -(t & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C);  //XとCは最後に押し出されたビット
 13212:       }
 13213:       break;
 13214:     case 0b110_000 >> 3:  //ROXR.W Dq,Dr
 13215:       y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63;  //y=0~63。Javaのシフト演算子は5ビットでマスクされることに注意
 13216:       //y %= 17;
 13217:       y = (y & 15) - (y >> 4);  //y=data=-3~15
 13218:       y += y >> 4 & 17;  //y=data=0~16
 13219:       if (y == 0) {  //y=data=0
 13220:         z = (short) x;
 13221:         t = -(XEiJ.regCCR >> 4 & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C);  //Xは変化しない。CはXのコピー
 13222:       } else {  //y=data=1~16
 13223:         z = (XEiJ.regCCR & XEiJ.REG_CCR_X) << 15 - 4 | (char) x >>> 1;
 13224:         if (y == 1) {  //y=data=1
 13225:           t = x;  //Cは最後に押し出されたビット
 13226:         } else {  //y=data=2~16
 13227:           z = x << 17 - y | (t = z >>> y - 2) >>> 1;
 13228:         }
 13229:         XEiJ.regRn[rrr] = ~0xffff & x | (char) (z = (short) z);
 13230:         t = -(t & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C);  //XとCは最後に押し出されたビット
 13231:       }
 13232:       XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | t;
 13233:       break;
 13234:     case 0b111_000 >> 3:  //ROR.W Dq,Dr
 13235:     default:
 13236:       y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63;  //y=0~63。Javaのシフト演算子は5ビットでマスクされることに注意
 13237:       if (y == 0) {
 13238:         z = (short) x;
 13239:         t = 0;  //Cはクリア
 13240:       } else {
 13241:         y &= 15;  //y=data=0~15
 13242:         XEiJ.regRn[rrr] = ~0xffff & x | (char) (z = (short) (x << 16 - y | (char) x >>> y));
 13243:         t = z >>> 15 & 1;  //Cは結果の最上位ビット
 13244:       }
 13245:       XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | t;  //Xは変化しない
 13246:     }
 13247:   }  //irpXxrToRegWord
 13248: 
 13249:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 13250:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 13251:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 13252:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 13253:   //ASR.L #<data>,Dr                                |-|012346|-|UUUUU|***0*|          |1110_qqq_010_000_rrr
 13254:   //LSR.L #<data>,Dr                                |-|012346|-|UUUUU|***0*|          |1110_qqq_010_001_rrr
 13255:   //ROXR.L #<data>,Dr                               |-|012346|-|*UUUU|***0*|          |1110_qqq_010_010_rrr
 13256:   //ROR.L #<data>,Dr                                |-|012346|-|-UUUU|-**0*|          |1110_qqq_010_011_rrr
 13257:   //ASR.L Dq,Dr                                     |-|012346|-|UUUUU|***0*|          |1110_qqq_010_100_rrr
 13258:   //LSR.L Dq,Dr                                     |-|012346|-|UUUUU|***0*|          |1110_qqq_010_101_rrr
 13259:   //ROXR.L Dq,Dr                                    |-|012346|-|*UUUU|***0*|          |1110_qqq_010_110_rrr
 13260:   //ROR.L Dq,Dr                                     |-|012346|-|-UUUU|-**0*|          |1110_qqq_010_111_rrr
 13261:   //ASR.L Dr                                        |A|012346|-|UUUUU|***0*|          |1110_001_010_000_rrr [ASR.L #1,Dr]
 13262:   //LSR.L Dr                                        |A|012346|-|UUUUU|***0*|          |1110_001_010_001_rrr [LSR.L #1,Dr]
 13263:   //ROXR.L Dr                                       |A|012346|-|*UUUU|***0*|          |1110_001_010_010_rrr [ROXR.L #1,Dr]
 13264:   //ROR.L Dr                                        |A|012346|-|-UUUU|-**0*|          |1110_001_010_011_rrr [ROR.L #1,Dr]
 13265:   //
 13266:   //ASR.L #<data>,Dr
 13267:   //ASR.L Dq,Dr
 13268:   //  算術右シフトロング
 13269:   //       アイウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマミ XNZVC
 13270:   //     0 アイウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマミ Xア*00 Z=アイウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマミ==0
 13271:   //     1 アアイウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマ ミア*0ミ Z=アイウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマ==0
 13272:   //     :
 13273:   //    31 アアアアアアアアアアアアアアアアアアアアアアアアアアアアアアアア イア*0イ Z=ア==0
 13274:   //    32 アアアアアアアアアアアアアアアアアアアアアアアアアアアアアアアア アア*0ア Z=ア==0
 13275:   //  CCR
 13276:   //    X  countが0のとき変化しない。他は最後に押し出されたビット
 13277:   //    N  結果の最上位ビット
 13278:   //    Z  結果が0のときセット。他はクリア
 13279:   //    V  常にクリア
 13280:   //    C  countが0のときクリア。他は最後に押し出されたビット
 13281:   //
 13282:   //LSR.L #<data>,Dr
 13283:   //LSR.L Dq,Dr
 13284:   //  論理右シフトロング
 13285:   //       アイウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマミ XNZVC
 13286:   //     0 アイウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマミ Xア*00 Z=アイウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマミ==0
 13287:   //     1 0アイウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマ ミ0*0ミ Z=アイウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマ==0
 13288:   //     :
 13289:   //    31 0000000000000000000000000000000ア イ0*0イ Z=ア==0
 13290:   //    32 00000000000000000000000000000000 ア010ア
 13291:   //    33 00000000000000000000000000000000 00100
 13292:   //  CCR
 13293:   //    X  countが0のとき変化しない。他は最後に押し出されたビット
 13294:   //    N  結果の最上位ビット
 13295:   //    Z  結果が0のときセット。他はクリア
 13296:   //    V  常にクリア
 13297:   //    C  countが0のときクリア。他は最後に押し出されたビット
 13298:   //
 13299:   //ROR.L #<data>,Dr
 13300:   //ROR.L Dq,Dr
 13301:   //  右ローテートロング
 13302:   //       アイウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマミ XNZVC
 13303:   //     0 アイウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマミ Xア*00 Z=アイウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマミ==0
 13304:   //     1 ミアイウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマ Xミ*0ミ Z=アイウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマミ==0
 13305:   //     :
 13306:   //    31 イウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマミア Xイ*0イ Z=アイウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマミ==0
 13307:   //    32 アイウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマミ Xア*0ア Z=アイウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマミ==0
 13308:   //  CCR
 13309:   //    X  常に変化しない
 13310:   //    N  結果の最上位ビット
 13311:   //    Z  結果が0のときセット。他はクリア
 13312:   //    V  常にクリア
 13313:   //    C  countが0のときクリア。他は結果の最上位ビット
 13314:   //
 13315:   //ROXR.L #<data>,Dr
 13316:   //ROXR.L Dq,Dr
 13317:   //  拡張右ローテートロング
 13318:   //       アイウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマミ XNZVC
 13319:   //     0 アイウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマミ Xア*0X Z=アイウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマミ==0
 13320:   //     1 Xアイウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマ ミX*0ミ Z=アイウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマX==0
 13321:   //     2 ミXアイウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホ マミ*0マ Z=アイウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホミX==0
 13322:   //     :
 13323:   //    31 ウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマミXア イウ*0イ Z=アウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマミX==0
 13324:   //    32 イウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマミX アイ*0ア Z=イウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマミX==0
 13325:   //    33 アイウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマミ Xア*0X Z=アイウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマミ==0
 13326:   //  CCR
 13327:   //    X  countが0のとき変化しない。他は最後に押し出されたビット
 13328:   //    N  結果の最上位ビット
 13329:   //    Z  結果が0のときセット。他はクリア
 13330:   //    V  常にクリア
 13331:   //    C  countが0のときXのコピー。他は最後に押し出されたビット
 13332:   public static void irpXxrToRegLong () throws M68kException {
 13333:     int rrr;
 13334:     int x = XEiJ.regRn[rrr = XEiJ.regOC & 7];
 13335:     int y;
 13336:     int z;
 13337:     int t;
 13338:     XEiJ.mpuCycleCount++;
 13339:     switch (XEiJ.regOC >> 3 & 0b111_000 >> 3) {
 13340:     case 0b000_000 >> 3:  //ASR.L #<data>,Dr
 13341:       y = (XEiJ.regOC >> 9) - 1 & 7;  //y=data-1=1-1~8-1
 13342:       XEiJ.regRn[rrr] = z = (t = x >> y) >> 1;
 13343:       XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | -(t & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C);  //XとCは最後に押し出されたビット
 13344:       break;
 13345:     case 0b001_000 >> 3:  //LSR.L #<data>,Dr
 13346:       y = (XEiJ.regOC >> 9) - 1 & 7;  //y=data-1=1-1~8-1
 13347:       XEiJ.regRn[rrr] = z = (t = x >>> y) >>> 1;
 13348:       XEiJ.regCCR = (z == 0 ? XEiJ.REG_CCR_Z : 0) | -(t & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C);  //XとCは最後に押し出されたビット
 13349:       break;
 13350:     case 0b010_000 >> 3:  //ROXR.L #<data>,Dr
 13351:       y = (XEiJ.regOC >> 9) - 1 & 7;  //y=data-1=1-1~8-1
 13352:       z = (XEiJ.regCCR & XEiJ.REG_CCR_X) << 31 - 4 | x >>> 1;
 13353:       if (y == 1 - 1) {  //y=data-1=1-1
 13354:         t = x;
 13355:       } else {  //y=data-1=2-1~8-1
 13356:         z = x << -y | (t = z >>> y - (2 - 1)) >>> 1;  //Javaのシフト演算子は5ビットでマスクされるので33-1-yを-yに省略
 13357:       }
 13358:       XEiJ.regRn[rrr] = z;
 13359:       XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | -(t & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C);  //XとCは最後に押し出されたビット
 13360:       break;
 13361:     case 0b011_000 >> 3:  //ROR.L #<data>,Dr
 13362:       y = (XEiJ.regOC >> 9) - 1 & 7;  //y=data-1=1-1~8-1
 13363:       XEiJ.regRn[rrr] = z = x << ~y | x >>> y + 1;  //Javaのシフト演算子は5ビットでマスクされるので32-1-yを~yに省略
 13364:       XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | z >>> 31;  //Xは変化しない。Cは結果の最上位ビット
 13365:       break;
 13366:     case 0b100_000 >> 3:  //ASR.L Dq,Dr
 13367:       y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63;  //y=0~63。Javaのシフト演算子は5ビットでマスクされることに注意
 13368:       if (y == 0) {  //y=data=0
 13369:         z = x;
 13370:         t = XEiJ.regCCR & XEiJ.REG_CCR_X;  //Xは変化しない。Cはクリア
 13371:       } else {  //y=data=1~63
 13372:         XEiJ.regRn[rrr] = z = (t = x >> (y <= 32 ? y - 1 : 31)) >> 1;
 13373:         t = -(t & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C);  //XとCは最後に押し出されたビット
 13374:       }
 13375:       XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | t;
 13376:       break;
 13377:     case 0b101_000 >> 3:  //LSR.L Dq,Dr
 13378:       y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63;  //y=0~63。Javaのシフト演算子は5ビットでマスクされることに注意
 13379:       if (y == 0) {  //y=data=0
 13380:         z = x;
 13381:         XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (z < 0 ? XEiJ.REG_CCR_N : z == 0 ? XEiJ.REG_CCR_Z : 0);  //Xは変化しない。Cはクリア
 13382:       } else {  //y=data=1~63
 13383:         XEiJ.regRn[rrr] = z = (t = y <= 32 ? x >>> y - 1 : 0) >>> 1;
 13384:         XEiJ.regCCR = (z == 0 ? XEiJ.REG_CCR_Z : 0) | -(t & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C);  //XとCは最後に押し出されたビット
 13385:       }
 13386:       break;
 13387:     case 0b110_000 >> 3:  //ROXR.L Dq,Dr
 13388:       y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63;  //y=0~63。Javaのシフト演算子は5ビットでマスクされることに注意
 13389:       //y %= 33;
 13390:       y -= 32 - y >> 6 & 33;  //y=data=0~32
 13391:       if (y == 0) {  //y=data=0
 13392:         z = x;
 13393:         t = -(XEiJ.regCCR >> 4 & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C);  //Xは変化しない。CはXのコピー
 13394:       } else {  //y=data=1~32
 13395:         z = (XEiJ.regCCR & XEiJ.REG_CCR_X) << 31 - 4 | x >>> 1;
 13396:         if (y == 1) {  //y=data=1
 13397:           t = x;  //Cは最後に押し出されたビット
 13398:         } else {  //y=data=2~32
 13399:           z = x << 33 - y | (t = z >>> y - 2) >>> 1;
 13400:         }
 13401:         XEiJ.regRn[rrr] = z;
 13402:         t = -(t & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C);  //XとCは最後に押し出されたビット
 13403:       }
 13404:       XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | t;
 13405:       break;
 13406:     case 0b111_000 >> 3:  //ROR.L Dq,Dr
 13407:     default:
 13408:       y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63;  //y=0~63。Javaのシフト演算子は5ビットでマスクされることに注意
 13409:       if (y == 0) {
 13410:         z = x;
 13411:         t = 0;  //Cはクリア
 13412:       } else {
 13413:         y &= 31;  //y=data=0~31
 13414:         XEiJ.regRn[rrr] = z = x << -y | x >>> y;  //Javaのシフト演算子は5ビットでマスクされるので32-yを-yに省略。y=32のときx|xになるが問題ない
 13415:         t = z >>> 31;  //Cは結果の最上位ビット
 13416:       }
 13417:       XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | t;  //Xは変化しない
 13418:     }
 13419:   }  //irpXxrToRegLong
 13420: 
 13421:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 13422:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 13423:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 13424:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 13425:   //ASR.W <ea>                                      |-|012346|-|UUUUU|***0*|  M+-WXZ  |1110_000_011_mmm_rrr
 13426:   //
 13427:   //ASR.W #<data>,Dr
 13428:   //ASR.W Dq,Dr
 13429:   //ASR.W <ea>
 13430:   //  算術右シフトワード
 13431:   //       ................アイウエオカキクケコサシスセソタ XNZVC
 13432:   //     0 ................アイウエオカキクケコサシスセソタ Xア*00 Z=アイウエオカキクケコサシスセソタ==0
 13433:   //     1 ................アアイウエオカキクケコサシスセソ タア*0タ Z=アイウエオカキクケコサシスセソ==0
 13434:   //     :
 13435:   //    15 ................アアアアアアアアアアアアアアアア イア*0イ Z=ア==0
 13436:   //    16 ................アアアアアアアアアアアアアアアア アア*0ア Z=ア==0
 13437:   //  CCR
 13438:   //    X  countが0のとき変化しない。他は最後に押し出されたビット
 13439:   //    N  結果の最上位ビット
 13440:   //    Z  結果が0のときセット。他はクリア
 13441:   //    V  常にクリア
 13442:   //    C  countが0のときクリア。他は最後に押し出されたビット
 13443:   public static void irpAsrToMem () throws M68kException {
 13444:     XEiJ.mpuCycleCount++;
 13445:     int ea = XEiJ.regOC & 63;
 13446:     int a = efaMltWord (ea);
 13447:     int x = mmuModifyWordSignData (a, XEiJ.regSRS);
 13448:     int z = x >> 1;
 13449:     mmuWriteWordData (a, z, XEiJ.regSRS);
 13450:     XEiJ.regCCR = ((z < 0 ? XEiJ.REG_CCR_N : 0) |
 13451:                    (z == 0 ? XEiJ.REG_CCR_Z : 0) |
 13452:                    -(x & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C));  //XとCは最後に押し出されたビット
 13453:   }  //irpAsrToMem
 13454: 
 13455:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 13456:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 13457:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 13458:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 13459:   //ASL.B #<data>,Dr                                |-|012346|-|UUUUU|*****|          |1110_qqq_100_000_rrr
 13460:   //LSL.B #<data>,Dr                                |-|012346|-|UUUUU|***0*|          |1110_qqq_100_001_rrr
 13461:   //ROXL.B #<data>,Dr                               |-|012346|-|*UUUU|***0*|          |1110_qqq_100_010_rrr
 13462:   //ROL.B #<data>,Dr                                |-|012346|-|-UUUU|-**0*|          |1110_qqq_100_011_rrr
 13463:   //ASL.B Dq,Dr                                     |-|012346|-|UUUUU|*****|          |1110_qqq_100_100_rrr
 13464:   //LSL.B Dq,Dr                                     |-|012346|-|UUUUU|***0*|          |1110_qqq_100_101_rrr
 13465:   //ROXL.B Dq,Dr                                    |-|012346|-|*UUUU|***0*|          |1110_qqq_100_110_rrr
 13466:   //ROL.B Dq,Dr                                     |-|012346|-|-UUUU|-**0*|          |1110_qqq_100_111_rrr
 13467:   //ASL.B Dr                                        |A|012346|-|UUUUU|*****|          |1110_001_100_000_rrr [ASL.B #1,Dr]
 13468:   //LSL.B Dr                                        |A|012346|-|UUUUU|***0*|          |1110_001_100_001_rrr [LSL.B #1,Dr]
 13469:   //ROXL.B Dr                                       |A|012346|-|*UUUU|***0*|          |1110_001_100_010_rrr [ROXL.B #1,Dr]
 13470:   //ROL.B Dr                                        |A|012346|-|-UUUU|-**0*|          |1110_001_100_011_rrr [ROL.B #1,Dr]
 13471:   //
 13472:   //ASL.B #<data>,Dr
 13473:   //ASL.B Dq,Dr
 13474:   //  算術左シフトバイト
 13475:   //       ........................アイウエオカキク XNZVC
 13476:   //     0 ........................アイウエオカキク Xア*00 Z=アイウエオカキク==0
 13477:   //     1 ........................イウエオカキク0 アイ**ア Z=イウエオカキク==0,V=アイ!=0/-1
 13478:   //     :
 13479:   //     7 ........................ク0000000 キク**キ Z=ク==0,V=アイウエオカキク!=0/-1
 13480:   //     8 ........................00000000 ク01*ク V=アイウエオカキク!=0
 13481:   //     9 ........................00000000 001*0 V=アイウエオカキク!=0
 13482:   //  CCR
 13483:   //    X  countが0のとき変化しない。他は最後に押し出されたビット
 13484:   //    N  結果の最上位ビット
 13485:   //    Z  結果が0のときセット。他はクリア
 13486:   //    V  ASRで元に戻せないときセット。他はクリア
 13487:   //    C  countが0のときクリア。他は最後に押し出されたビット
 13488:   //
 13489:   //LSL.B #<data>,Dr
 13490:   //LSL.B Dq,Dr
 13491:   //  論理左シフトバイト
 13492:   //       ........................アイウエオカキク XNZVC
 13493:   //     0 ........................アイウエオカキク Xア*00 Z=アイウエオカキク==0
 13494:   //     1 ........................イウエオカキク0 アイ*0ア Z=イウエオカキク==0
 13495:   //     :
 13496:   //     7 ........................ク0000000 キク*0キ Z=ク==0
 13497:   //     8 ........................00000000 ク010ク
 13498:   //     9 ........................00000000 00100
 13499:   //  CCR
 13500:   //    X  countが0のとき変化しない。他は最後に押し出されたビット
 13501:   //    N  結果の最上位ビット
 13502:   //    Z  結果が0のときセット。他はクリア
 13503:   //    V  常にクリア
 13504:   //    C  countが0のときクリア。他は最後に押し出されたビット
 13505:   //
 13506:   //ROL.B #<data>,Dr
 13507:   //ROL.B Dq,Dr
 13508:   //  左ローテートバイト
 13509:   //       ........................アイウエオカキク XNZVC
 13510:   //     0 ........................アイウエオカキク Xア*00 Z=アイウエオカキク==0
 13511:   //     1 ........................イウエオカキクア Xイ*0ア Z=アイウエオカキク==0
 13512:   //     :
 13513:   //     7 ........................クアイウエオカキ Xク*0キ Z=アイウエオカキク==0
 13514:   //     8 ........................アイウエオカキク Xア*0ク Z=アイウエオカキク==0
 13515:   //  CCR
 13516:   //    X  常に変化しない
 13517:   //    N  結果の最上位ビット
 13518:   //    Z  結果が0のときセット。他はクリア
 13519:   //    V  常にクリア
 13520:   //    C  countが0のときクリア。他は結果の最下位ビット
 13521:   //
 13522:   //ROXL.B #<data>,Dr
 13523:   //ROXL.B Dq,Dr
 13524:   //  拡張左ローテートバイト
 13525:   //       ........................アイウエオカキク XNZVC
 13526:   //     0 ........................アイウエオカキク Xア*0X Z=アイウエオカキク==0
 13527:   //     1 ........................イウエオカキクX アイ*0ア Z=イウエオカキクX==0
 13528:   //     2 ........................ウエオカキクXア イウ*0イ Z=アウエオカキクX==0
 13529:   //     :
 13530:   //     7 ........................クXアイウエオカ キク*0キ Z=アイウエオカクX==0
 13531:   //     8 ........................Xアイウエオカキ クX*0ク Z=アイウエオカキX==0
 13532:   //     9 ........................アイウエオカキク Xア*0X Z=アイウエオカキク==0
 13533:   //  CCR
 13534:   //    X  countが0のとき変化しない。他は最後に押し出されたビット
 13535:   //    N  結果の最上位ビット
 13536:   //    Z  結果が0のときセット。他はクリア
 13537:   //    V  常にクリア
 13538:   //    C  countが0のときXのコピー。他は最後に押し出されたビット
 13539:   public static void irpXxlToRegByte () throws M68kException {
 13540:     int rrr;
 13541:     int x = XEiJ.regRn[rrr = XEiJ.regOC & 7];
 13542:     int y;
 13543:     int z;
 13544:     int t;
 13545:     XEiJ.mpuCycleCount++;
 13546:     switch (XEiJ.regOC >> 3 & 0b111_000 >> 3) {
 13547:     case 0b000_000 >> 3:  //ASL.B #<data>,Dr
 13548:       y = (XEiJ.regOC >> 9) - 1 & 7;  //y=data-1=1-1~8-1
 13549:       XEiJ.regRn[rrr] = ~0xff & x | 0xff & (z = (byte) ((t = x << y) << 1));
 13550:       XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | (z >> y + 1 != (byte) x ? XEiJ.REG_CCR_V : 0) | (byte) t >> 7 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C);  //VはASRで元に戻せないときセット。XとCは最後に押し出されたビット
 13551:       break;
 13552:     case 0b001_000 >> 3:  //LSL.B #<data>,Dr
 13553:       y = (XEiJ.regOC >> 9) - 1 & 7;  //y=data-1=1-1~8-1
 13554:       XEiJ.regRn[rrr] = ~0xff & x | 0xff & (z = (byte) ((t = x << y) << 1));
 13555:       XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | (byte) t >> 7 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C);  //XとCは最後に押し出されたビット
 13556:       break;
 13557:     case 0b010_000 >> 3:  //ROXL.B #<data>,Dr
 13558:       y = (XEiJ.regOC >> 9) - 1 & 7;  //y=data-1=1-1~8-1
 13559:       z = x << 1 | XEiJ.regCCR >> 4 & 1;
 13560:       if (y == 1 - 1) {  //y=data-1=1-1
 13561:         t = x;
 13562:       } else {  //y=data-1=2-1~8-1
 13563:         z = (t = z << y - (2 - 1)) << 1 | (0xff & x) >>> 9 - 1 - y;
 13564:       }
 13565:       XEiJ.regRn[rrr] = ~0xff & x | 0xff & (z = (byte) z);
 13566:       XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | (byte) t >> 7 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C);  //XとCは最後に押し出されたビット
 13567:       break;
 13568:     case 0b011_000 >> 3:  //ROL.B #<data>,Dr
 13569:       y = XEiJ.regOC >> 9 & 7;  //y=data&7
 13570:       XEiJ.regRn[rrr] = ~0xff & x | 0xff & (z = (byte) (x << y | (0xff & x) >>> 8 - y));
 13571:       XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | z & 1;  //Xは変化しない。Cは結果の最下位ビット
 13572:       break;
 13573:     case 0b100_000 >> 3:  //ASL.B Dq,Dr
 13574:       y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63;  //y=0~63。Javaのシフト演算子は5ビットでマスクされることに注意
 13575:       if (y <= 7) {  //y=data=0~7
 13576:         if (y == 0) {  //y=data=0
 13577:           z = (byte) x;
 13578:           t = XEiJ.regCCR & XEiJ.REG_CCR_X;  //Xは変化しない。VとCはクリア
 13579:         } else {  //y=data=1~7
 13580:           XEiJ.regRn[rrr] = ~0xff & x | 0xff & (z = (byte) ((t = x << y - 1) << 1));
 13581:           t = (z >> y != (byte) x ? XEiJ.REG_CCR_V : 0) | (byte) t >> 7 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C);  //VはASRで元に戻せないときセット。XとCは最後に押し出されたビット
 13582:         }
 13583:         XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | t;
 13584:       } else {  //y=data=8~63
 13585:         XEiJ.regRn[rrr] = ~0xff & x;
 13586:         XEiJ.regCCR = XEiJ.REG_CCR_Z | ((byte) x != 0 ? XEiJ.REG_CCR_V : 0) | (y == 8 ? -(x & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C) : 0);
 13587:       }
 13588:       break;
 13589:     case 0b101_000 >> 3:  //LSL.B Dq,Dr
 13590:       y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63;  //y=0~63。Javaのシフト演算子は5ビットでマスクされることに注意
 13591:       if (y == 0) {  //y=data=0
 13592:         z = (byte) x;
 13593:         t = XEiJ.regCCR & XEiJ.REG_CCR_X;  //Xは変化しない。Cはクリア
 13594:       } else {  //y=data=1~63
 13595:         XEiJ.regRn[rrr] = ~0xff & x | 0xff & (z = (byte) ((t = y <= 8 ? x << y - 1 : 0) << 1));
 13596:         t = (byte) t >> 7 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C);  //XとCは最後に押し出されたビット
 13597:       }
 13598:       XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | t;
 13599:       break;
 13600:     case 0b110_000 >> 3:  //ROXL.B Dq,Dr
 13601:       y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63;  //y=0~63。Javaのシフト演算子は5ビットでマスクされることに注意
 13602:       //y %= 9;
 13603:       y = (y & 7) - (y >> 3);  //y=data=-7~7
 13604:       y += y >> 3 & 9;  //y=data=0~8
 13605:       if (y == 0) {  //y=data=0
 13606:         z = (byte) x;
 13607:         t = -(XEiJ.regCCR >> 4 & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C);  //Xは変化しない。CはXのコピー
 13608:       } else {  //y=data=1~8
 13609:         z = x << 1 | XEiJ.regCCR >> 4 & 1;
 13610:         if (y == 1) {  //y=data=1
 13611:           t = x;  //Cは最後に押し出されたビット
 13612:         } else {  //y=data=2~8
 13613:           z = (t = z << y - 2) << 1 | (0xff & x) >>> 9 - y;
 13614:         }
 13615:         XEiJ.regRn[rrr] = ~0xff & x | 0xff & (z = (byte) z);
 13616:         t = (byte) t >> 7 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C);  //XとCは最後に押し出されたビット
 13617:       }
 13618:       XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | t;
 13619:       break;
 13620:     case 0b111_000 >> 3:  //ROL.B Dq,Dr
 13621:     default:
 13622:       y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63;  //y=0~63。Javaのシフト演算子は5ビットでマスクされることに注意
 13623:       if (y == 0) {
 13624:         z = (byte) x;
 13625:         t = 0;  //Cはクリア
 13626:       } else {
 13627:         y &= 7;  //y=data=0~7
 13628:         XEiJ.regRn[rrr] = ~0xff & x | 0xff & (z = (byte) (x << y | (0xff & x) >>> 8 - y));
 13629:         t = z & 1;  //Cは結果の最下位ビット
 13630:       }
 13631:       XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | t;  //Xは変化しない
 13632:     }
 13633:   }  //irpXxlToRegByte
 13634: 
 13635:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 13636:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 13637:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 13638:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 13639:   //ASL.W #<data>,Dr                                |-|012346|-|UUUUU|*****|          |1110_qqq_101_000_rrr
 13640:   //LSL.W #<data>,Dr                                |-|012346|-|UUUUU|***0*|          |1110_qqq_101_001_rrr
 13641:   //ROXL.W #<data>,Dr                               |-|012346|-|*UUUU|***0*|          |1110_qqq_101_010_rrr
 13642:   //ROL.W #<data>,Dr                                |-|012346|-|-UUUU|-**0*|          |1110_qqq_101_011_rrr
 13643:   //ASL.W Dq,Dr                                     |-|012346|-|UUUUU|*****|          |1110_qqq_101_100_rrr
 13644:   //LSL.W Dq,Dr                                     |-|012346|-|UUUUU|***0*|          |1110_qqq_101_101_rrr
 13645:   //ROXL.W Dq,Dr                                    |-|012346|-|*UUUU|***0*|          |1110_qqq_101_110_rrr
 13646:   //ROL.W Dq,Dr                                     |-|012346|-|-UUUU|-**0*|          |1110_qqq_101_111_rrr
 13647:   //ASL.W Dr                                        |A|012346|-|UUUUU|*****|          |1110_001_101_000_rrr [ASL.W #1,Dr]
 13648:   //LSL.W Dr                                        |A|012346|-|UUUUU|***0*|          |1110_001_101_001_rrr [LSL.W #1,Dr]
 13649:   //ROXL.W Dr                                       |A|012346|-|*UUUU|***0*|          |1110_001_101_010_rrr [ROXL.W #1,Dr]
 13650:   //ROL.W Dr                                        |A|012346|-|-UUUU|-**0*|          |1110_001_101_011_rrr [ROL.W #1,Dr]
 13651:   //
 13652:   //ASL.W #<data>,Dr
 13653:   //ASL.W Dq,Dr
 13654:   //ASL.W <ea>
 13655:   //  算術左シフトワード
 13656:   //       ................アイウエオカキクケコサシスセソタ XNZVC
 13657:   //     0 ................アイウエオカキクケコサシスセソタ Xア*00 Z=アイウエオカキクケコサシスセソタ==0
 13658:   //     1 ................イウエオカキクケコサシスセソタ0 アイ**ア Z=イウエオカキクケコサシスセソタ==0,V=アイ!=0/-1
 13659:   //     :
 13660:   //    15 ................タ000000000000000 ソタ**ソ Z=タ==0,V=アイウエオカキクケコサシスセソタ!=0/-1
 13661:   //    16 ................0000000000000000 タ01*タ V=アイウエオカキクケコサシスセソタ!=0
 13662:   //    17 ................0000000000000000 001*0 V=アイウエオカキクケコサシスセソタ!=0
 13663:   //  CCR
 13664:   //    X  countが0のとき変化しない。他は最後に押し出されたビット
 13665:   //    N  結果の最上位ビット
 13666:   //    Z  結果が0のときセット。他はクリア
 13667:   //    V  ASRで元に戻せないときセット。他はクリア
 13668:   //    C  countが0のときクリア。他は最後に押し出されたビット
 13669:   //
 13670:   //LSL.W #<data>,Dr
 13671:   //LSL.W Dq,Dr
 13672:   //LSL.W <ea>
 13673:   //  論理左シフトワード
 13674:   //       ................アイウエオカキクケコサシスセソタ XNZVC
 13675:   //     0 ................アイウエオカキクケコサシスセソタ Xア*00 Z=アイウエオカキクケコサシスセソタ==0
 13676:   //     1 ................イウエオカキクケコサシスセソタ0 アイ*0ア Z=イウエオカキクケコサシスセソタ==0
 13677:   //     :
 13678:   //    15 ................タ000000000000000 ソタ*0ソ Z=タ==0
 13679:   //    16 ................0000000000000000 タ010タ
 13680:   //    17 ................0000000000000000 00100
 13681:   //  CCR
 13682:   //    X  countが0のとき変化しない。他は最後に押し出されたビット
 13683:   //    N  結果の最上位ビット
 13684:   //    Z  結果が0のときセット。他はクリア
 13685:   //    V  常にクリア
 13686:   //    C  countが0のときクリア。他は最後に押し出されたビット
 13687:   //
 13688:   //ROL.W #<data>,Dr
 13689:   //ROL.W Dq,Dr
 13690:   //ROL.W <ea>
 13691:   //  左ローテートワード
 13692:   //       ................アイウエオカキクケコサシスセソタ XNZVC
 13693:   //     0 ................アイウエオカキクケコサシスセソタ Xア*00 Z=アイウエオカキクケコサシスセソタ==0
 13694:   //     1 ................イウエオカキクケコサシスセソタア Xイ*0ア Z=アイウエオカキクケコサシスセソタ==0
 13695:   //     :
 13696:   //    15 ................タアイウエオカキクケコサシスセソ Xタ*0ソ Z=アイウエオカキクケコサシスセソタ==0
 13697:   //    16 ................アイウエオカキクケコサシスセソタ Xア*0タ Z=アイウエオカキクケコサシスセソタ==0
 13698:   //  CCR
 13699:   //    X  常に変化しない
 13700:   //    N  結果の最上位ビット
 13701:   //    Z  結果が0のときセット。他はクリア
 13702:   //    V  常にクリア
 13703:   //    C  countが0のときクリア。他は結果の最下位ビット
 13704:   //
 13705:   //ROXL.W #<data>,Dr
 13706:   //ROXL.W Dq,Dr
 13707:   //ROXL.W <ea>
 13708:   //  拡張左ローテートワード
 13709:   //       ................アイウエオカキクケコサシスセソタ XNZVC
 13710:   //     0 ................アイウエオカキクケコサシスセソタ Xア*0X Z=アイウエオカキクケコサシスセソタ==0
 13711:   //     1 ................イウエオカキクケコサシスセソタX アイ*0ア Z=イウエオカキクケコサシスセソタX==0
 13712:   //     2 ................ウエオカキクケコサシスセソタXア イウ*0イ Z=アウエオカキクケコサシスセソタX==0
 13713:   //     :
 13714:   //    15 ................タXアイウエオカキクケコサシスセ ソタ*0ソ Z=アイウエオカキクケコサシスセタX==0
 13715:   //    16 ................Xアイウエオカキクケコサシスセソ タX*0タ Z=アイウエオカキクケコサシスセソX==0
 13716:   //    17 ................アイウエオカキクケコサシスセソタ Xア*0X Z=アイウエオカキクケコサシスセソタ==0
 13717:   //  CCR
 13718:   //    X  countが0のとき変化しない。他は最後に押し出されたビット
 13719:   //    N  結果の最上位ビット
 13720:   //    Z  結果が0のときセット。他はクリア
 13721:   //    V  常にクリア
 13722:   //    C  countが0のときXのコピー。他は最後に押し出されたビット
 13723:   public static void irpXxlToRegWord () throws M68kException {
 13724:     int rrr;
 13725:     int x = XEiJ.regRn[rrr = XEiJ.regOC & 7];
 13726:     int y;
 13727:     int z;
 13728:     int t;
 13729:     XEiJ.mpuCycleCount++;
 13730:     switch (XEiJ.regOC >> 3 & 0b111_000 >> 3) {
 13731:     case 0b000_000 >> 3:  //ASL.W #<data>,Dr
 13732:       y = (XEiJ.regOC >> 9) - 1 & 7;  //y=data-1=1-1~8-1
 13733:       XEiJ.regRn[rrr] = ~0xffff & x | (char) (z = (short) ((t = x << y) << 1));
 13734:       XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | (z >> y + 1 != (short) x ? XEiJ.REG_CCR_V : 0) | (short) t >> 15 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C);  //VはASRで元に戻せないときセット。XとCは最後に押し出されたビット
 13735:       break;
 13736:     case 0b001_000 >> 3:  //LSL.W #<data>,Dr
 13737:       y = (XEiJ.regOC >> 9) - 1 & 7;  //y=data-1=1-1~8-1
 13738:       XEiJ.regRn[rrr] = ~0xffff & x | (char) (z = (short) ((t = x << y) << 1));
 13739:       XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | (short) t >> 15 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C);  //XとCは最後に押し出されたビット
 13740:       break;
 13741:     case 0b010_000 >> 3:  //ROXL.W #<data>,Dr
 13742:       y = (XEiJ.regOC >> 9) - 1 & 7;  //y=data-1=1-1~8-1
 13743:       z = x << 1 | XEiJ.regCCR >> 4 & 1;
 13744:       if (y == 1 - 1) {  //y=data-1=1-1
 13745:         t = x;
 13746:       } else {  //y=data-1=2-1~8-1
 13747:         z = (t = z << y - (2 - 1)) << 1 | (char) x >>> 17 - 1 - y;
 13748:       }
 13749:       XEiJ.regRn[rrr] = ~0xffff & x | (char) (z = (short) z);
 13750:       XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | (short) t >> 15 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C);  //XとCは最後に押し出されたビット
 13751:       break;
 13752:     case 0b011_000 >> 3:  //ROL.W #<data>,Dr
 13753:       y = (XEiJ.regOC >> 9) - 1 & 7;  //y=data-1=1-1~8-1
 13754:       XEiJ.regRn[rrr] = ~0xffff & x | (char) (z = (short) (x << y + 1 | (char) x >>> 16 - 1 - y));
 13755:       XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | z & 1;  //Xは変化しない。Cは結果の最下位ビット
 13756:       break;
 13757:     case 0b100_000 >> 3:  //ASL.W Dq,Dr
 13758:       y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63;  //y=0~63。Javaのシフト演算子は5ビットでマスクされることに注意
 13759:       if (y <= 15) {  //y=data=0~15
 13760:         if (y == 0) {  //y=data=0
 13761:           z = (short) x;
 13762:           t = XEiJ.regCCR & XEiJ.REG_CCR_X;  //Xは変化しない。VとCはクリア
 13763:         } else {  //y=data=1~15
 13764:           XEiJ.regRn[rrr] = ~0xffff & x | (char) (z = (short) ((t = x << y - 1) << 1));
 13765:           t = (z >> y != (short) x ? XEiJ.REG_CCR_V : 0) | (short) t >> 15 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C);  //VはASRで元に戻せないときセット。XとCは最後に押し出されたビット
 13766:         }
 13767:         XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | t;
 13768:       } else {  //y=data=16~63
 13769:         XEiJ.regRn[rrr] = ~0xffff & x;
 13770:         XEiJ.regCCR = XEiJ.REG_CCR_Z | ((short) x != 0 ? XEiJ.REG_CCR_V : 0) | (y == 16 ? -(x & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C) : 0);
 13771:       }
 13772:       break;
 13773:     case 0b101_000 >> 3:  //LSL.W Dq,Dr
 13774:       y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63;  //y=0~63。Javaのシフト演算子は5ビットでマスクされることに注意
 13775:       if (y == 0) {  //y=data=0
 13776:         z = (short) x;
 13777:         t = XEiJ.regCCR & XEiJ.REG_CCR_X;  //Xは変化しない。Cはクリア
 13778:       } else {  //y=data=1~63
 13779:         XEiJ.regRn[rrr] = ~0xffff & x | (char) (z = (short) ((t = y <= 16 ? x << y - 1 : 0) << 1));
 13780:         t = (short) t >> 15 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C);  //XとCは最後に押し出されたビット
 13781:       }
 13782:       XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | t;
 13783:       break;
 13784:     case 0b110_000 >> 3:  //ROXL.W Dq,Dr
 13785:       y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63;  //y=0~63。Javaのシフト演算子は5ビットでマスクされることに注意
 13786:       //y %= 17;
 13787:       y = (y & 15) - (y >> 4);  //y=data=-3~15
 13788:       y += y >> 4 & 17;  //y=data=0~16
 13789:       if (y == 0) {  //y=data=0
 13790:         z = (short) x;
 13791:         t = -(XEiJ.regCCR >> 4 & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C);  //Xは変化しない。CはXのコピー
 13792:       } else {  //y=data=1~16
 13793:         z = x << 1 | XEiJ.regCCR >> 4 & 1;
 13794:         if (y == 1) {  //y=data=1
 13795:           t = x;  //Cは最後に押し出されたビット
 13796:         } else {  //y=data=2~16
 13797:           z = (t = z << y - 2) << 1 | (char) x >>> 17 - y;
 13798:         }
 13799:         XEiJ.regRn[rrr] = ~0xffff & x | (char) (z = (short) z);
 13800:         t = (short) t >> 15 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C);  //XとCは最後に押し出されたビット
 13801:       }
 13802:       XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | t;
 13803:       break;
 13804:     case 0b111_000 >> 3:  //ROL.W Dq,Dr
 13805:     default:
 13806:       y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63;  //y=0~63。Javaのシフト演算子は5ビットでマスクされることに注意
 13807:       if (y == 0) {
 13808:         z = (short) x;
 13809:         t = 0;  //Cはクリア
 13810:       } else {
 13811:         y &= 15;  //y=data=0~15
 13812:         XEiJ.regRn[rrr] = ~0xffff & x | (char) (z = (short) (x << y | (char) x >>> 16 - y));
 13813:         t = z & 1;  //Cは結果の最下位ビット
 13814:       }
 13815:       XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | t;  //Xは変化しない
 13816:     }
 13817:   }  //irpXxlToRegWord
 13818: 
 13819:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 13820:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 13821:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 13822:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 13823:   //ASL.L #<data>,Dr                                |-|012346|-|UUUUU|*****|          |1110_qqq_110_000_rrr
 13824:   //LSL.L #<data>,Dr                                |-|012346|-|UUUUU|***0*|          |1110_qqq_110_001_rrr
 13825:   //ROXL.L #<data>,Dr                               |-|012346|-|*UUUU|***0*|          |1110_qqq_110_010_rrr
 13826:   //ROL.L #<data>,Dr                                |-|012346|-|-UUUU|-**0*|          |1110_qqq_110_011_rrr
 13827:   //ASL.L Dq,Dr                                     |-|012346|-|UUUUU|*****|          |1110_qqq_110_100_rrr
 13828:   //LSL.L Dq,Dr                                     |-|012346|-|UUUUU|***0*|          |1110_qqq_110_101_rrr
 13829:   //ROXL.L Dq,Dr                                    |-|012346|-|*UUUU|***0*|          |1110_qqq_110_110_rrr
 13830:   //ROL.L Dq,Dr                                     |-|012346|-|-UUUU|-**0*|          |1110_qqq_110_111_rrr
 13831:   //ASL.L Dr                                        |A|012346|-|UUUUU|*****|          |1110_001_110_000_rrr [ASL.L #1,Dr]
 13832:   //LSL.L Dr                                        |A|012346|-|UUUUU|***0*|          |1110_001_110_001_rrr [LSL.L #1,Dr]
 13833:   //ROXL.L Dr                                       |A|012346|-|*UUUU|***0*|          |1110_001_110_010_rrr [ROXL.L #1,Dr]
 13834:   //ROL.L Dr                                        |A|012346|-|-UUUU|-**0*|          |1110_001_110_011_rrr [ROL.L #1,Dr]
 13835:   //
 13836:   //ASL.L #<data>,Dr
 13837:   //ASL.L Dq,Dr
 13838:   //  算術左シフトロング
 13839:   //       アイウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマミ XNZVC
 13840:   //     0 アイウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマミ Xア**0 Z=アイウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマミ==0
 13841:   //     1 イウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマミ0 アイ**ア Z=イウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマミ==0,V=アイ!=0/-1
 13842:   //     :
 13843:   //    31 ミ0000000000000000000000000000000 マミ**マ Z=ミ==0,V=アイウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマミ!=0/-1
 13844:   //    32 00000000000000000000000000000000 ミ01*ミ V=アイウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマミ!=0
 13845:   //    33 00000000000000000000000000000000 001*0 V=アイウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマミ!=0
 13846:   //  CCR
 13847:   //    X  countが0のとき変化しない。他は最後に押し出されたビット
 13848:   //    N  結果の最上位ビット
 13849:   //    Z  結果が0のときセット。他はクリア
 13850:   //    V  ASRで元に戻せないときセット。他はクリア
 13851:   //    C  countが0のときクリア。他は最後に押し出されたビット
 13852:   //
 13853:   //LSL.L #<data>,Dr
 13854:   //LSL.L Dq,Dr
 13855:   //  論理左シフトロング
 13856:   //       アイウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマミ XNZVC
 13857:   //     0 アイウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマミ Xア*00 Z=アイウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマミ==0
 13858:   //     1 イウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマミ0 アイ*0ア Z=イウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマミ==0
 13859:   //     :
 13860:   //    31 ミ0000000000000000000000000000000 マミ*0マ Z=ミ==0
 13861:   //    32 00000000000000000000000000000000 ミ010ミ
 13862:   //    33 00000000000000000000000000000000 00100
 13863:   //  CCR
 13864:   //    X  countが0のとき変化しない。他は最後に押し出されたビット
 13865:   //    N  結果の最上位ビット
 13866:   //    Z  結果が0のときセット。他はクリア
 13867:   //    V  常にクリア
 13868:   //    C  countが0のときクリア。他は最後に押し出されたビット
 13869:   //
 13870:   //ROL.L #<data>,Dr
 13871:   //ROL.L Dq,Dr
 13872:   //  左ローテートロング
 13873:   //       アイウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマミ XNZVC
 13874:   //     0 アイウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマミ Xア*00 Z=アイウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマミ==0
 13875:   //     1 イウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマミア Xイ*0ア Z=アイウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマミ==0
 13876:   //     :
 13877:   //    31 ミアイウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマ Xミ*0マ Z=アイウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマミ==0
 13878:   //    32 アイウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマミ Xア*0ミ Z=アイウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマミ==0
 13879:   //  CCR
 13880:   //    X  常に変化しない
 13881:   //    N  結果の最上位ビット
 13882:   //    Z  結果が0のときセット。他はクリア
 13883:   //    V  常にクリア
 13884:   //    C  countが0のときクリア。他は結果の最下位ビット
 13885:   //
 13886:   //ROXL.L #<data>,Dr
 13887:   //ROXL.L Dq,Dr
 13888:   //  拡張左ローテートロング
 13889:   //       アイウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマミ XNZVC
 13890:   //     0 アイウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマミ Xア*0X Z=アイウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマミ==0
 13891:   //     1 イウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマミX アイ*0ア Z=イウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマミX==0
 13892:   //     2 ウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマミXア イウ*0イ Z=アウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマミX==0
 13893:   //     :
 13894:   //    31 ミXアイウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホ マミ*0マ Z=アイウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホミX==0
 13895:   //    32 Xアイウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマ ミX*0ミ Z=アイウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマX==0
 13896:   //    33 アイウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマミ Xア*0X Z=アイウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマミ==0
 13897:   //  CCR
 13898:   //    X  countが0のとき変化しない。他は最後に押し出されたビット
 13899:   //    N  結果の最上位ビット
 13900:   //    Z  結果が0のときセット。他はクリア
 13901:   //    V  常にクリア
 13902:   //    C  countが0のときXのコピー。他は最後に押し出されたビット
 13903:   public static void irpXxlToRegLong () throws M68kException {
 13904:     int rrr;
 13905:     int x = XEiJ.regRn[rrr = XEiJ.regOC & 7];
 13906:     int y;
 13907:     int z;
 13908:     int t;
 13909:     XEiJ.mpuCycleCount++;
 13910:     switch (XEiJ.regOC >> 3 & 0b111_000 >> 3) {
 13911:     case 0b000_000 >> 3:  //ASL.L #<data>,Dr
 13912:       y = (XEiJ.regOC >> 9) - 1 & 7;  //y=data-1=1-1~8-1
 13913:       XEiJ.regRn[rrr] = z = (t = x << y) << 1;
 13914:       XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | (z >> y + 1 != x ? XEiJ.REG_CCR_V : 0) | t >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C);  //VはASRで元に戻せないときセット。XとCは最後に押し出されたビット
 13915:       break;
 13916:     case 0b001_000 >> 3:  //LSL.L #<data>,Dr
 13917:       y = (XEiJ.regOC >> 9) - 1 & 7;  //y=data-1=1-1~8-1
 13918:       XEiJ.regRn[rrr] = z = (t = x << y) << 1;
 13919:       XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | t >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C);  //XとCは最後に押し出されたビット
 13920:       break;
 13921:     case 0b010_000 >> 3:  //ROXL.L #<data>,Dr
 13922:       y = (XEiJ.regOC >> 9) - 1 & 7;  //y=data-1=1-1~8-1
 13923:       z = x << 1 | XEiJ.regCCR >> 4 & 1;
 13924:       if (y == 1 - 1) {  //y=data-1=1-1
 13925:         t = x;
 13926:       } else {  //y=data-1=2-1~8-1
 13927:         z = (t = z << y - (2 - 1)) << 1 | x >>> -y;  //Javaのシフト演算子は5ビットでマスクされるので33-1-yを-yに省略
 13928:       }
 13929:       XEiJ.regRn[rrr] = z;
 13930:       XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | t >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C);  //XとCは最後に押し出されたビット
 13931:       break;
 13932:     case 0b011_000 >> 3:  //ROL.L #<data>,Dr
 13933:       y = (XEiJ.regOC >> 9) - 1 & 7;  //y=data-1=1-1~8-1
 13934:       XEiJ.regRn[rrr] = z = x << y + 1 | x >>> ~y;  //Javaのシフト演算子は5ビットでマスクされるので32-1-yを~yに省略
 13935:       XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | z & 1;  //Xは変化しない。Cは結果の最下位ビット
 13936:       break;
 13937:     case 0b100_000 >> 3:  //ASL.L Dq,Dr
 13938:       y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63;  //y=0~63。Javaのシフト演算子は5ビットでマスクされることに注意
 13939:       if (y <= 31) {  //y=data=0~31
 13940:         if (y == 0) {  //y=data=0
 13941:           z = x;
 13942:           t = XEiJ.regCCR & XEiJ.REG_CCR_X;  //Xは変化しない。VとCはクリア
 13943:         } else {  //y=data=1~31
 13944:           XEiJ.regRn[rrr] = z = (t = x << y - 1) << 1;
 13945:           t = (z >> y != x ? XEiJ.REG_CCR_V : 0) | t >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C);  //VはASRで元に戻せないときセット。XとCは最後に押し出されたビット
 13946:         }
 13947:         XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | t;
 13948:       } else {  //y=data=32~63
 13949:         XEiJ.regRn[rrr] = 0;
 13950:         XEiJ.regCCR = XEiJ.REG_CCR_Z | (x != 0 ? XEiJ.REG_CCR_V : 0) | (y == 32 ? -(x & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C) : 0);
 13951:       }
 13952:       break;
 13953:     case 0b101_000 >> 3:  //LSL.L Dq,Dr
 13954:       y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63;  //y=0~63。Javaのシフト演算子は5ビットでマスクされることに注意
 13955:       if (y == 0) {  //y=data=0
 13956:         z = x;
 13957:         t = XEiJ.regCCR & XEiJ.REG_CCR_X;  //Xは変化しない。Cはクリア
 13958:       } else {  //y=data=1~63
 13959:         XEiJ.regRn[rrr] = z = (t = y <= 32 ? x << y - 1 : 0) << 1;
 13960:         t = t >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C);  //XとCは最後に押し出されたビット
 13961:       }
 13962:       XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | t;
 13963:       break;
 13964:     case 0b110_000 >> 3:  //ROXL.L Dq,Dr
 13965:       y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63;  //y=0~63。Javaのシフト演算子は5ビットでマスクされることに注意
 13966:       //y %= 33;
 13967:       y -= 32 - y >> 6 & 33;  //y=data=0~32
 13968:       if (y == 0) {  //y=data=0
 13969:         z = x;
 13970:         t = -(XEiJ.regCCR >> 4 & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C);  //Xは変化しない。CはXのコピー
 13971:       } else {  //y=data=1~32
 13972:         z = x << 1 | XEiJ.regCCR >> 4 & 1;
 13973:         if (y == 1) {  //y=data=1
 13974:           t = x;  //Cは最後に押し出されたビット
 13975:         } else {  //y=data=2~32
 13976:           z = (t = z << y - 2) << 1 | x >>> 33 - y;
 13977:         }
 13978:         XEiJ.regRn[rrr] = z;
 13979:         t = t >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C);  //XとCは最後に押し出されたビット
 13980:       }
 13981:       XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | t;
 13982:       break;
 13983:     case 0b111_000 >> 3:  //ROL.L Dq,Dr
 13984:     default:
 13985:       y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63;  //y=0~63。Javaのシフト演算子は5ビットでマスクされることに注意
 13986:       if (y == 0) {
 13987:         z = x;
 13988:         t = 0;  //Cはクリア
 13989:       } else {
 13990:         XEiJ.regRn[rrr] = z = x << y | x >>> -y;  //Javaのシフト演算子は5ビットでマスクされるのでy&31をyに、32-(y&31)を-yに省略。y=32のときx|xになるが問題ない
 13991:         t = z & 1;
 13992:       }
 13993:       XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | t;  //Xは変化しない
 13994:     }
 13995:   }  //irpXxlToRegLong
 13996: 
 13997:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 13998:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 13999:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 14000:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 14001:   //ASL.W <ea>                                      |-|012346|-|UUUUU|*****|  M+-WXZ  |1110_000_111_mmm_rrr
 14002:   //
 14003:   //ASL.W #<data>,Dr
 14004:   //ASL.W Dq,Dr
 14005:   //ASL.W <ea>
 14006:   //  算術左シフトワード
 14007:   //       ................アイウエオカキクケコサシスセソタ XNZVC
 14008:   //     0 ................アイウエオカキクケコサシスセソタ Xア*00 Z=アイウエオカキクケコサシスセソタ==0
 14009:   //     1 ................イウエオカキクケコサシスセソタ0 アイ**ア Z=イウエオカキクケコサシスセソタ==0,V=アイ!=0/-1
 14010:   //     :
 14011:   //    15 ................タ000000000000000 ソタ**ソ Z=タ==0,V=アイウエオカキクケコサシスセソタ!=0/-1
 14012:   //    16 ................0000000000000000 タ01*タ V=アイウエオカキクケコサシスセソタ!=0
 14013:   //    17 ................0000000000000000 001*0 V=アイウエオカキクケコサシスセソタ!=0
 14014:   //  CCR
 14015:   //    X  countが0のとき変化しない。他は最後に押し出されたビット
 14016:   //    N  結果の最上位ビット
 14017:   //    Z  結果が0のときセット。他はクリア
 14018:   //    V  ASRで元に戻せないときセット。他はクリア
 14019:   //    C  countが0のときクリア。他は最後に押し出されたビット
 14020:   public static void irpAslToMem () throws M68kException {
 14021:     XEiJ.mpuCycleCount++;
 14022:     int ea = XEiJ.regOC & 63;
 14023:     int a = efaMltWord (ea);
 14024:     int x = mmuModifyWordSignData (a, XEiJ.regSRS);
 14025:     int z = (short) (x << 1);
 14026:     mmuWriteWordData (a, z, XEiJ.regSRS);
 14027:     XEiJ.regCCR = ((z < 0 ? XEiJ.REG_CCR_N : 0) |
 14028:                    (z == 0 ? XEiJ.REG_CCR_Z : 0) |
 14029:                    (x ^ z) >>> 31 << 1 |  //Vは最上位ビットが変化したときセット
 14030:                    x >> 15 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C));  //XとCは最後に押し出されたビット
 14031:   }  //irpAslToMem
 14032: 
 14033:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 14034:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 14035:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 14036:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 14037:   //LSR.W <ea>                                      |-|012346|-|UUUUU|*0*0*|  M+-WXZ  |1110_001_011_mmm_rrr
 14038:   //
 14039:   //LSR.W #<data>,Dr
 14040:   //LSR.W Dq,Dr
 14041:   //LSR.W <ea>
 14042:   //  論理右シフトワード
 14043:   //       ................アイウエオカキクケコサシスセソタ XNZVC
 14044:   //     0 ................アイウエオカキクケコサシスセソタ Xア*00 Z=アイウエオカキクケコサシスセソタ==0
 14045:   //     1 ................0アイウエオカキクケコサシスセソ タ0*0タ Z=アイウエオカキクケコサシスセソ==0
 14046:   //     :
 14047:   //    15 ................000000000000000ア イ0*0イ Z=ア==0
 14048:   //    16 ................0000000000000000 ア010ア
 14049:   //    17 ................0000000000000000 00100
 14050:   //  CCR
 14051:   //    X  countが0のとき変化しない。他は最後に押し出されたビット
 14052:   //    N  結果の最上位ビット
 14053:   //    Z  結果が0のときセット。他はクリア
 14054:   //    V  常にクリア
 14055:   //    C  countが0のときクリア。他は最後に押し出されたビット
 14056:   public static void irpLsrToMem () throws M68kException {
 14057:     XEiJ.mpuCycleCount++;
 14058:     int ea = XEiJ.regOC & 63;
 14059:     int a = efaMltWord (ea);
 14060:     int x = mmuModifyWordZeroData (a, XEiJ.regSRS);
 14061:     int z = x >>> 1;
 14062:     mmuWriteWordData (a, z, XEiJ.regSRS);
 14063:     XEiJ.regCCR = ((z == 0 ? XEiJ.REG_CCR_Z : 0) |
 14064:                    -(x & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C));  //XとCは最後に押し出されたビット
 14065:   }  //irpLsrToMem
 14066: 
 14067:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 14068:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 14069:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 14070:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 14071:   //LSL.W <ea>                                      |-|012346|-|UUUUU|***0*|  M+-WXZ  |1110_001_111_mmm_rrr
 14072:   //
 14073:   //LSL.W #<data>,Dr
 14074:   //LSL.W Dq,Dr
 14075:   //LSL.W <ea>
 14076:   //  論理左シフトワード
 14077:   //       ................アイウエオカキクケコサシスセソタ XNZVC
 14078:   //     0 ................アイウエオカキクケコサシスセソタ Xア*00 Z=アイウエオカキクケコサシスセソタ==0
 14079:   //     1 ................イウエオカキクケコサシスセソタ0 アイ*0ア Z=イウエオカキクケコサシスセソタ==0
 14080:   //     :
 14081:   //    15 ................タ000000000000000 ソタ*0ソ Z=タ==0
 14082:   //    16 ................0000000000000000 タ010タ
 14083:   //    17 ................0000000000000000 00100
 14084:   //  CCR
 14085:   //    X  countが0のとき変化しない。他は最後に押し出されたビット
 14086:   //    N  結果の最上位ビット
 14087:   //    Z  結果が0のときセット。他はクリア
 14088:   //    V  常にクリア
 14089:   //    C  countが0のときクリア。他は最後に押し出されたビット
 14090:   public static void irpLslToMem () throws M68kException {
 14091:     XEiJ.mpuCycleCount++;
 14092:     int ea = XEiJ.regOC & 63;
 14093:     int a = efaMltWord (ea);
 14094:     int x = mmuModifyWordSignData (a, XEiJ.regSRS);
 14095:     int z = (short) (x << 1);
 14096:     mmuWriteWordData (a, z, XEiJ.regSRS);
 14097:     XEiJ.regCCR = ((z < 0 ? XEiJ.REG_CCR_N : 0) |
 14098:                    (z == 0 ? XEiJ.REG_CCR_Z : 0) |
 14099:                    x >> 15 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C));  //XとCは最後に押し出されたビット
 14100:   }  //irpLslToMem
 14101: 
 14102:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 14103:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 14104:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 14105:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 14106:   //ROXR.W <ea>                                     |-|012346|-|*UUUU|***0*|  M+-WXZ  |1110_010_011_mmm_rrr
 14107:   //
 14108:   //ROXR.W #<data>,Dr
 14109:   //ROXR.W Dq,Dr
 14110:   //ROXR.W <ea>
 14111:   //  拡張右ローテートワード
 14112:   //       ................アイウエオカキクケコサシスセソタ XNZVC
 14113:   //     0 ................アイウエオカキクケコサシスセソタ Xア*0X Z=アイウエオカキクケコサシスセソタ==0
 14114:   //     1 ................Xアイウエオカキクケコサシスセソ タX*0タ Z=アイウエオカキクケコサシスセソX==0
 14115:   //     2 ................タXアイウエオカキクケコサシスセ ソタ*0ソ Z=アイウエオカキクケコサシスセタX==0
 14116:   //     :
 14117:   //    15 ................ウエオカキクケコサシスセソタXア イウ*0イ Z=アウエオカキクケコサシスセソタX==0
 14118:   //    16 ................イウエオカキクケコサシスセソタX アイ*0ア Z=イウエオカキクケコサシスセソタX==0
 14119:   //    17 ................アイウエオカキクケコサシスセソタ Xア*0X Z=アイウエオカキクケコサシスセソタ==0
 14120:   //  CCR
 14121:   //    X  countが0のとき変化しない。他は最後に押し出されたビット
 14122:   //    N  結果の最上位ビット
 14123:   //    Z  結果が0のときセット。他はクリア
 14124:   //    V  常にクリア
 14125:   //    C  countが0のときXのコピー。他は最後に押し出されたビット
 14126:   public static void irpRoxrToMem () throws M68kException {
 14127:     XEiJ.mpuCycleCount++;
 14128:     int ea = XEiJ.regOC & 63;
 14129:     int a = efaMltWord (ea);
 14130:     int x = mmuModifyWordZeroData (a, XEiJ.regSRS);
 14131:     int z = -(XEiJ.regCCR & XEiJ.REG_CCR_X) << 15 - 4 | x >>> 1;
 14132:     mmuWriteWordData (a, z, XEiJ.regSRS);
 14133:     XEiJ.regCCR = ((z < 0 ? XEiJ.REG_CCR_N : 0) |
 14134:                    (z == 0 ? XEiJ.REG_CCR_Z : 0) |
 14135:                    -(x & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C));  //XとCは最後に押し出されたビット
 14136:   }  //irpRoxrToMem
 14137: 
 14138:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 14139:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 14140:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 14141:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 14142:   //ROXL.W <ea>                                     |-|012346|-|*UUUU|***0*|  M+-WXZ  |1110_010_111_mmm_rrr
 14143:   //
 14144:   //ROXL.W #<data>,Dr
 14145:   //ROXL.W Dq,Dr
 14146:   //ROXL.W <ea>
 14147:   //  拡張左ローテートワード
 14148:   //       ................アイウエオカキクケコサシスセソタ XNZVC
 14149:   //     0 ................アイウエオカキクケコサシスセソタ Xア*0X Z=アイウエオカキクケコサシスセソタ==0
 14150:   //     1 ................イウエオカキクケコサシスセソタX アイ*0ア Z=イウエオカキクケコサシスセソタX==0
 14151:   //     2 ................ウエオカキクケコサシスセソタXア イウ*0イ Z=アウエオカキクケコサシスセソタX==0
 14152:   //     :
 14153:   //    15 ................タXアイウエオカキクケコサシスセ ソタ*0ソ Z=アイウエオカキクケコサシスセタX==0
 14154:   //    16 ................Xアイウエオカキクケコサシスセソ タX*0タ Z=アイウエオカキクケコサシスセソX==0
 14155:   //    17 ................アイウエオカキクケコサシスセソタ Xア*0X Z=アイウエオカキクケコサシスセソタ==0
 14156:   //  CCR
 14157:   //    X  countが0のとき変化しない。他は最後に押し出されたビット
 14158:   //    N  結果の最上位ビット
 14159:   //    Z  結果が0のときセット。他はクリア
 14160:   //    V  常にクリア
 14161:   //    C  countが0のときXのコピー。他は最後に押し出されたビット
 14162:   public static void irpRoxlToMem () throws M68kException {
 14163:     XEiJ.mpuCycleCount++;
 14164:     int ea = XEiJ.regOC & 63;
 14165:     int a = efaMltWord (ea);
 14166:     int x = mmuModifyWordSignData (a, XEiJ.regSRS);
 14167:     int z = (short) (x << 1 | XEiJ.regCCR >> 4 & 1);
 14168:     mmuWriteWordData (a, z, XEiJ.regSRS);
 14169:     XEiJ.regCCR = ((z < 0 ? XEiJ.REG_CCR_N : 0) |
 14170:                    (z == 0 ? XEiJ.REG_CCR_Z : 0) |
 14171:                    x >> 15 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C));  //XとCは最後に押し出されたビット
 14172:   }  //irpRoxlToMem
 14173: 
 14174:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 14175:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 14176:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 14177:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 14178:   //ROR.W <ea>                                      |-|012346|-|-UUUU|-**0*|  M+-WXZ  |1110_011_011_mmm_rrr
 14179:   //
 14180:   //ROR.W #<data>,Dr
 14181:   //ROR.W Dq,Dr
 14182:   //ROR.W <ea>
 14183:   //  右ローテートワード
 14184:   //       ................アイウエオカキクケコサシスセソタ XNZVC
 14185:   //     0 ................アイウエオカキクケコサシスセソタ Xア*00 Z=アイウエオカキクケコサシスセソタ==0
 14186:   //     1 ................タアイウエオカキクケコサシスセソ Xタ*0タ Z=アイウエオカキクケコサシスセソタ==0
 14187:   //     :
 14188:   //    15 ................イウエオカキクケコサシスセソタア Xイ*0イ Z=アイウエオカキクケコサシスセソタ==0
 14189:   //    16 ................アイウエオカキクケコサシスセソタ Xア*0ア Z=アイウエオカキクケコサシスセソタ==0
 14190:   //  CCR
 14191:   //    X  常に変化しない
 14192:   //    N  結果の最上位ビット
 14193:   //    Z  結果が0のときセット。他はクリア
 14194:   //    V  常にクリア
 14195:   //    C  countが0のときクリア。他は結果の最上位ビット
 14196:   public static void irpRorToMem () throws M68kException {
 14197:     XEiJ.mpuCycleCount++;
 14198:     int ea = XEiJ.regOC & 63;
 14199:     int a = efaMltWord (ea);
 14200:     int x = mmuModifyWordZeroData (a, XEiJ.regSRS);
 14201:     int z = (short) (x << 15 | x >>> 1);
 14202:     mmuWriteWordData (a, z, XEiJ.regSRS);
 14203:     XEiJ.regCCR = (XEiJ.regCCR & XEiJ.REG_CCR_X |  //Xは変化しない
 14204:                    (z < 0 ? XEiJ.REG_CCR_N : 0) |
 14205:                    (z == 0 ? XEiJ.REG_CCR_Z : 0) |
 14206:                    z >>> 31);  //Cは結果の最上位ビット
 14207:   }  //irpRorToMem
 14208: 
 14209:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 14210:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 14211:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 14212:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 14213:   //ROL.W <ea>                                      |-|012346|-|-UUUU|-**0*|  M+-WXZ  |1110_011_111_mmm_rrr
 14214:   //
 14215:   //ROL.W #<data>,Dr
 14216:   //ROL.W Dq,Dr
 14217:   //ROL.W <ea>
 14218:   //  左ローテートワード
 14219:   //       ................アイウエオカキクケコサシスセソタ XNZVC
 14220:   //     0 ................アイウエオカキクケコサシスセソタ Xア*00 Z=アイウエオカキクケコサシスセソタ==0
 14221:   //     1 ................イウエオカキクケコサシスセソタア Xイ*0ア Z=アイウエオカキクケコサシスセソタ==0
 14222:   //     :
 14223:   //    15 ................タアイウエオカキクケコサシスセソ Xタ*0ソ Z=アイウエオカキクケコサシスセソタ==0
 14224:   //    16 ................アイウエオカキクケコサシスセソタ Xア*0タ Z=アイウエオカキクケコサシスセソタ==0
 14225:   //  CCR
 14226:   //    X  常に変化しない
 14227:   //    N  結果の最上位ビット
 14228:   //    Z  結果が0のときセット。他はクリア
 14229:   //    V  常にクリア
 14230:   //    C  countが0のときクリア。他は結果の最下位ビット
 14231:   public static void irpRolToMem () throws M68kException {
 14232:     XEiJ.mpuCycleCount++;
 14233:     int ea = XEiJ.regOC & 63;
 14234:     int a = efaMltWord (ea);
 14235:     int x = mmuModifyWordZeroData (a, XEiJ.regSRS);
 14236:     int z = (short) (x << 1 | x >>> 15);
 14237:     mmuWriteWordData (a, z, XEiJ.regSRS);
 14238:     XEiJ.regCCR = (XEiJ.regCCR & XEiJ.REG_CCR_X |  //Xは変化しない
 14239:                    (z < 0 ? XEiJ.REG_CCR_N : 0) |
 14240:                    (z == 0 ? XEiJ.REG_CCR_Z : 0) |
 14241:                    z & 1);  //Cは結果の最下位ビット
 14242:   }  //irpRolToMem
 14243: 
 14244:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 14245:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 14246:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 14247:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 14248:   //BFTST <ea>{#o:#w}                               |-|--2346|-|-UUUU|-**00|D M  WXZP |1110_100_011_mmm_rrr-00000ooooo0wwwww
 14249:   //BFTST <ea>{#o:Dw}                               |-|--2346|-|-UUUU|-**00|D M  WXZP |1110_100_011_mmm_rrr-00000ooooo100www
 14250:   //BFTST <ea>{Do:#w}                               |-|--2346|-|-UUUU|-**00|D M  WXZP |1110_100_011_mmm_rrr-0000100ooo0wwwww
 14251:   //BFTST <ea>{Do:Dw}                               |-|--2346|-|-UUUU|-**00|D M  WXZP |1110_100_011_mmm_rrr-0000100ooo100www
 14252:   public static void irpBftst () throws M68kException {
 14253:     int w = mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);  //pcwz。拡張ワード
 14254:     if ((w & ~0b0000_111_111_111_111) != 0 ||
 14255:         (w & 0b0000_111_111_000_000) > 0b0000_100_111_000_000 ||
 14256:         (w & 0b0000_000_000_111_111) > 0b0000_000_000_100_111) {
 14257:       M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION;
 14258:       throw M68kException.m6eSignal;
 14259:     }
 14260:     int o = w << 31 - 11 >= 0 ? w >> 6 & 31 : XEiJ.regRn[w >> 6 & 7];  //o=offset
 14261:     w = -(w << 31 - 5 >= 0 ? w : XEiJ.regRn[w & 7]) & 31;  //w=32-width。1<=width<=32なので0<=32-width<=31
 14262:     XEiJ.mpuCycleCount += 6;
 14263:     int ea = XEiJ.regOC & 63;
 14264:     int z;
 14265:     if (ea < XEiJ.EA_AR) {  //BFTST Dr{~}
 14266:       z = XEiJ.regRn[ea];
 14267:       z = z << o | z >>> -o;  //下位からはみ出したフィールドは上位に戻る
 14268:     } else {  //BFTST <mem>{~}
 14269:       int a = efaCntLong (ea) + (o >> 3);  //フィールドの最上位ビットを含むバイトのアドレス
 14270:       o &= 7;
 14271:       z = 31 - w + o >> 3;  //フィールドが跨ぐバイト境界の数。0~4
 14272:       z = (z == 0 ? mmuReadByteSignData (a, XEiJ.regSRS) << 24 + o :  //不要なバイトにアクセスしない
 14273:            z == 1 ? mmuReadWordSignData (a, XEiJ.regSRS) << 16 + o :  //020以上なのでアドレスエラーは出ない
 14274:            z == 2 ? (mmuReadWordSignData (a, XEiJ.regSRS) << 8 | mmuReadByteZeroData (a + 2, XEiJ.regSRS)) << 8 + o :
 14275:            z == 3 ? mmuReadLongData (a, XEiJ.regSRS) << o :
 14276:            mmuReadLongData (a, XEiJ.regSRS) << o | mmuReadByteZeroData (a + 4, XEiJ.regSRS) >>> 8 - o);
 14277:     }
 14278:     z >>= w;  //符号拡張。下位のゴミを消す
 14279:     XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X);  //ccr_tst
 14280:   }  //irpBftst
 14281: 
 14282:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 14283:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 14284:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 14285:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 14286:   //BFEXTU <ea>{#o:#w},Dn                           |-|--2346|-|-UUUU|-**00|D M  WXZP |1110_100_111_mmm_rrr-0nnn0ooooo0wwwww
 14287:   //BFEXTU <ea>{#o:Dw},Dn                           |-|--2346|-|-UUUU|-**00|D M  WXZP |1110_100_111_mmm_rrr-0nnn0ooooo100www
 14288:   //BFEXTU <ea>{Do:#w},Dn                           |-|--2346|-|-UUUU|-**00|D M  WXZP |1110_100_111_mmm_rrr-0nnn100ooo0wwwww
 14289:   //BFEXTU <ea>{Do:Dw},Dn                           |-|--2346|-|-UUUU|-**00|D M  WXZP |1110_100_111_mmm_rrr-0nnn100ooo100www
 14290:   public static void irpBfextu () throws M68kException {
 14291:     int w = mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);  //pcwz。拡張ワード
 14292:     if ((w & ~0b0111_111_111_111_111) != 0 ||
 14293:         (w & 0b0000_111_111_000_000) > 0b0000_100_111_000_000 ||
 14294:         (w & 0b0000_000_000_111_111) > 0b0000_000_000_100_111) {
 14295:       M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION;
 14296:       throw M68kException.m6eSignal;
 14297:     }
 14298:     int n = w >> 12;
 14299:     int o = w << 31 - 11 >= 0 ? w >> 6 & 31 : XEiJ.regRn[w >> 6 & 7];  //o=offset
 14300:     w = -(w << 31 - 5 >= 0 ? w : XEiJ.regRn[w & 7]) & 31;  //w=32-width。1<=width<=32なので0<=32-width<=31
 14301:     XEiJ.mpuCycleCount += 6;
 14302:     int ea = XEiJ.regOC & 63;
 14303:     int z;
 14304:     if (ea < XEiJ.EA_AR) {  //BFEXTU Dr{~}
 14305:       z = XEiJ.regRn[ea];
 14306:       z = z << o | z >>> -o;  //下位からはみ出したフィールドは上位に戻る
 14307:     } else {  //BFEXTU <mem>{~}
 14308:       int a = efaCntLong (ea) + (o >> 3);
 14309:       o &= 7;
 14310:       z = 31 - w + o >> 3;
 14311:       z = (z == 0 ? mmuReadByteSignData (a, XEiJ.regSRS) << 24 + o :  //不要なバイトにアクセスしない
 14312:            z == 1 ? mmuReadWordSignData (a, XEiJ.regSRS) << 16 + o :  //020以上なのでアドレスエラーは出ない
 14313:            z == 2 ? (mmuReadWordSignData (a, XEiJ.regSRS) << 8 | mmuReadByteZeroData (a + 2, XEiJ.regSRS)) << 8 + o :
 14314:            z == 3 ? mmuReadLongData (a, XEiJ.regSRS) << o :
 14315:            mmuReadLongData (a, XEiJ.regSRS) << o | mmuReadByteZeroData (a + 4, XEiJ.regSRS) >>> 8 - o);
 14316:     }
 14317:     XEiJ.regRn[n] = z >>> w;  //ゼロ拡張
 14318:     z >>= w;  //符号拡張。下位のゴミを消す
 14319:     XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X);  //ccr_tst
 14320:   }  //irpBfextu
 14321: 
 14322:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 14323:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 14324:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 14325:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 14326:   //BFCHG <ea>{#o:#w}                               |-|--2346|-|-UUUU|-**00|D M  WXZ  |1110_101_011_mmm_rrr-00000ooooo0wwwww
 14327:   //BFCHG <ea>{#o:Dw}                               |-|--2346|-|-UUUU|-**00|D M  WXZ  |1110_101_011_mmm_rrr-00000ooooo100www
 14328:   //BFCHG <ea>{Do:#w}                               |-|--2346|-|-UUUU|-**00|D M  WXZ  |1110_101_011_mmm_rrr-0000100ooo0wwwww
 14329:   //BFCHG <ea>{Do:Dw}                               |-|--2346|-|-UUUU|-**00|D M  WXZ  |1110_101_011_mmm_rrr-0000100ooo100www
 14330:   public static void irpBfchg () throws M68kException {
 14331:     int w = mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);  //pcwz。拡張ワード
 14332:     if ((w & ~0b0000_111_111_111_111) != 0 ||
 14333:         (w & 0b0000_111_111_000_000) > 0b0000_100_111_000_000 ||
 14334:         (w & 0b0000_000_000_111_111) > 0b0000_000_000_100_111) {
 14335:       M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION;
 14336:       throw M68kException.m6eSignal;
 14337:     }
 14338:     int o = w << 31 - 11 >= 0 ? w >> 6 & 31 : XEiJ.regRn[w >> 6 & 7];  //o=offset
 14339:     w = -(w << 31 - 5 >= 0 ? w : XEiJ.regRn[w & 7]) & 31;  //w=32-width。1<=width<=32なので0<=32-width<=31
 14340:     XEiJ.mpuCycleCount += 8;
 14341:     int ea = XEiJ.regOC & 63;
 14342:     int z;
 14343:     if (ea < XEiJ.EA_AR) {  //BFCHG Dr{~}
 14344:       z = XEiJ.regRn[ea];
 14345:       z = z << o | z >>> -o;  //下位からはみ出したフィールドは上位に戻る
 14346:       int t = z ^ -1 << w;  //フィールドの幅だけ反転する
 14347:       XEiJ.regRn[ea] = t << -o | t >>> o;
 14348:     } else {  //BFCHG <mem>{~}
 14349:       int a = efaCltLong (ea) + (o >> 3);  //フィールドの最上位ビットを含むバイトのアドレス
 14350:       o &= 7;
 14351:       z = 31 - w + o >> 3;  //フィールドが跨ぐバイト境界の数。0~4
 14352:       if (z == 0) {
 14353:         //  <ea>{2,5}  o=2,w=32-5=27                        <ea>  --abcde-
 14354:         int t = mmuModifyByteSignData (a, XEiJ.regSRS) << 24;                     //          t  --abcde- 00000000 00000000 00000000  不要なバイトにアクセスしない
 14355:         z = t << o;                                //          z  abcde-00 00000000 00000000 00000000
 14356:         //                                         //      -1<<w  11111000 00000000 00000000 00000000
 14357:         //                                         //  -1<<w>>>o  00111110 00000000 00000000 00000000
 14358:         //                                         //t^-1<<w>>>o  --ABCDE- 00000000 00000000 00000000
 14359:         mmuWriteByteData (a, (t ^ -1 << w >>> o) >>> 24, XEiJ.regSRS);        //       <ea>  --ABCDE-
 14360:       } else if (z == 1) {
 14361:         //  <ea>{7,5}  o=7,w=32-5=27                        <ea>  -------a bcde----
 14362:         int t = mmuModifyWordSignData (a, XEiJ.regSRS) << 16;                     //          t  -------a bcde---- 00000000 00000000  020以上なのでアドレスエラーは出ない
 14363:         z = t << o;                                //          z  abcde--- -0000000 00000000 00000000
 14364:         //                                         //      -1<<w  11111000 00000000 00000000 00000000
 14365:         //                                         //  -1<<w>>>o  00000001 11110000 00000000 00000000
 14366:         //                                         //t^-1<<w>>>o  -------A BCDE---- 00000000 00000000
 14367:         mmuWriteWordData (a, (t ^ -1 << w >>> o) >>> 16, XEiJ.regSRS);       //       <ea>  -------A BCDE----
 14368:       } else if (z == 2) {
 14369:         //  <ea>{7,12}  o=7,w=32-12=20                      <ea>  -------a bcdefghi jkl-----
 14370:         int t = mmuModifyWordSignData (a, XEiJ.regSRS) << 16 | mmuModifyByteZeroData (a + 2, XEiJ.regSRS) << 8;  //          t  -------a bcdefghi jkl----- 00000000
 14371:         z = t << o;                                //          z  abcdefgh ijkl---- -0000000 00000000
 14372:         //                                         //      -1<<w  11111111 11110000 00000000 00000000
 14373:         //                                         //  -1<<w>>>o  00000001 11111111 11100000 00000000
 14374:         t ^= -1 << w >>> o;                        //          t  -------A BCDEFGHI JKL----- 00000000
 14375:         mmuWriteWordData (a, t >>> 16, XEiJ.regSRS);                         //       <ea>  -------A BCDEFGHI jkl-----
 14376:         mmuWriteByteData (a + 2, t >>> 8, XEiJ.regSRS);                       //       <ea>  -------A BCDEFGHI JKL-----
 14377:       } else if (z == 3) {
 14378:         //  <ea>{7,19}  o=7,w=32-19=13                      <ea>  -------a bcdefghi jklmnopq rs------
 14379:         int t = mmuModifyLongData (a, XEiJ.regSRS);                           //          t  -------a bcdefghi jklmnopq rs------
 14380:         z = t << o;                                //          z  abcdefgh ijklmnop qrs----- -0000000
 14381:         //                                         //      -1<<w  11111111 11111111 11100000 00000000
 14382:         //                                         //  -1<<w>>>o  00000001 11111111 11111111 11000000
 14383:         mmuWriteLongData (a, t ^ -1 << w >>> o, XEiJ.regSRS);                //       <ea>  -------A BCDEFGHI JKLMNOPQ RS------
 14384:       } else {
 14385:         //  <ea>{7,26}  o=7,w=32-26=6                       <ea>  -------a bcdefghi jklmnopq rstuvwxy z-------
 14386:         int t = mmuModifyLongData (a, XEiJ.regSRS);                           //          t  -------a bcdefghi jklmnopq rstuvwxy
 14387:         z = t << o;                                //          z  abcdefgh ijklmnop qrstuvwx y0000000
 14388:         //                                                -1>>>o  00000001 11111111 11111111 11111111
 14389:         mmuWriteLongData (a, t ^ -1 >>> o, XEiJ.regSRS);                     //       <ea>  -------A BCDEFGHI JKLMNOPQ RSTUVWXY
 14390:         t = mmuModifyByteZeroData (a + 4, XEiJ.regSRS);                           //          t  00000000 00000000 00000000 z-------
 14391:         //                                         //    t>>>8-o  00000000 00000000 00000000 0z------
 14392:         z |= t >>> 8 - o;                          //          z  abcdefgh ijklmnop qrstuvwx yz------
 14393:         //                                         //  -1<<8-o+w  11111111 11111111 11111111 10000000
 14394:         mmuWriteByteData (a + 4, t ^ -1 << 8 - o + w, XEiJ.regSRS);           //       <ea>  -------A BCDEFGHI JKLMNOPQ RSTUVWXY Z-------
 14395:       }
 14396:     }
 14397:     z >>= w;  //符号拡張。下位のゴミを消す
 14398:     XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X);  //ccr_tst
 14399:   }  //irpBfchg
 14400: 
 14401:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 14402:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 14403:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 14404:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 14405:   //BFEXTS <ea>{#o:#w},Dn                           |-|--2346|-|-UUUU|-**00|D M  WXZP |1110_101_111_mmm_rrr-0nnn0ooooo0wwwww
 14406:   //BFEXTS <ea>{#o:Dw},Dn                           |-|--2346|-|-UUUU|-**00|D M  WXZP |1110_101_111_mmm_rrr-0nnn0ooooo100www
 14407:   //BFEXTS <ea>{Do:#w},Dn                           |-|--2346|-|-UUUU|-**00|D M  WXZP |1110_101_111_mmm_rrr-0nnn100ooo0wwwww
 14408:   //BFEXTS <ea>{Do:Dw},Dn                           |-|--2346|-|-UUUU|-**00|D M  WXZP |1110_101_111_mmm_rrr-0nnn100ooo100www
 14409:   public static void irpBfexts () throws M68kException {
 14410:     int w = mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);  //pcwz。拡張ワード
 14411:     if ((w & ~0b0111_111_111_111_111) != 0 ||
 14412:         (w & 0b0000_111_111_000_000) > 0b0000_100_111_000_000 ||
 14413:         (w & 0b0000_000_000_111_111) > 0b0000_000_000_100_111) {
 14414:       M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION;
 14415:       throw M68kException.m6eSignal;
 14416:     }
 14417:     int n = w >> 12;
 14418:     int o = w << 31 - 11 >= 0 ? w >> 6 & 31 : XEiJ.regRn[w >> 6 & 7];  //o=offset
 14419:     w = -(w << 31 - 5 >= 0 ? w : XEiJ.regRn[w & 7]) & 31;  //w=32-width。1<=width<=32なので0<=32-width<=31
 14420:     XEiJ.mpuCycleCount += 6;
 14421:     int ea = XEiJ.regOC & 63;
 14422:     int z;
 14423:     if (ea < XEiJ.EA_AR) {  //BFEXTS Dr{~}
 14424:       z = XEiJ.regRn[ea];
 14425:       z = z << o | z >>> -o;  //下位からはみ出したフィールドは上位に戻る
 14426:     } else {  //BFEXTS <mem>{~}
 14427:       int a = efaCntLong (ea) + (o >> 3);  //フィールドの最上位ビットを含むバイトのアドレス
 14428:       o &= 7;
 14429:       z = 31 - w + o >> 3;  //フィールドが跨ぐバイト境界の数。0~4
 14430:       z = (z == 0 ? mmuReadByteSignData (a, XEiJ.regSRS) << 24 + o :  //不要なバイトにアクセスしない
 14431:            z == 1 ? mmuReadWordSignData (a, XEiJ.regSRS) << 16 + o :  //020以上なのでアドレスエラーは出ない
 14432:            z == 2 ? (mmuReadWordSignData (a, XEiJ.regSRS) << 8 | mmuReadByteZeroData (a + 2, XEiJ.regSRS)) << 8 + o :
 14433:            z == 3 ? mmuReadLongData (a, XEiJ.regSRS) << o :
 14434:            mmuReadLongData (a, XEiJ.regSRS) << o | mmuReadByteZeroData (a + 4, XEiJ.regSRS) >>> 8 - o);
 14435:     }
 14436:     XEiJ.regRn[n] = z >>= w;  //符号拡張。下位のゴミを消す
 14437:     XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X);  //ccr_tst
 14438:   }  //irpBfexts
 14439: 
 14440:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 14441:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 14442:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 14443:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 14444:   //BFCLR <ea>{#o:#w}                               |-|--2346|-|-UUUU|-**00|D M  WXZ  |1110_110_011_mmm_rrr-00000ooooo0wwwww
 14445:   //BFCLR <ea>{#o:Dw}                               |-|--2346|-|-UUUU|-**00|D M  WXZ  |1110_110_011_mmm_rrr-00000ooooo100www
 14446:   //BFCLR <ea>{Do:#w}                               |-|--2346|-|-UUUU|-**00|D M  WXZ  |1110_110_011_mmm_rrr-0000100ooo0wwwww
 14447:   //BFCLR <ea>{Do:Dw}                               |-|--2346|-|-UUUU|-**00|D M  WXZ  |1110_110_011_mmm_rrr-0000100ooo100www
 14448:   public static void irpBfclr () throws M68kException {
 14449:     int w = mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);  //pcwz。拡張ワード
 14450:     if ((w & ~0b0000_111_111_111_111) != 0 ||
 14451:         (w & 0b0000_111_111_000_000) > 0b0000_100_111_000_000 ||
 14452:         (w & 0b0000_000_000_111_111) > 0b0000_000_000_100_111) {
 14453:       M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION;
 14454:       throw M68kException.m6eSignal;
 14455:     }
 14456:     int o = w << 31 - 11 >= 0 ? w >> 6 & 31 : XEiJ.regRn[w >> 6 & 7];  //o=offset
 14457:     w = -(w << 31 - 5 >= 0 ? w : XEiJ.regRn[w & 7]) & 31;  //w=32-width。1<=width<=32なので0<=32-width<=31
 14458:     XEiJ.mpuCycleCount += 8;
 14459:     int ea = XEiJ.regOC & 63;
 14460:     int z;
 14461:     if (ea < XEiJ.EA_AR) {  //BFCLR Dr{~}
 14462:       z = XEiJ.regRn[ea];
 14463:       z = z << o | z >>> -o;  //下位からはみ出したフィールドは上位に戻る
 14464:       int t = z & ~(-1 << w);  //フィールドの幅だけ0を並べる
 14465:       XEiJ.regRn[ea] = t << -o | t >>> o;
 14466:     } else {  //BFCLR <mem>{~}
 14467:       int a = efaCltLong (ea) + (o >> 3);  //フィールドの最上位ビットを含むバイトのアドレス
 14468:       o &= 7;
 14469:       z = 31 - w + o >> 3;  //フィールドが跨ぐバイト境界の数。0~4
 14470:       if (z == 0) {
 14471:         //  <ea>{2,5}  o=2,w=32-5=27                        <ea>  --abcde-
 14472:         int t = mmuModifyByteSignData (a, XEiJ.regSRS) << 24;                     //          t  --abcde- 00000000 00000000 00000000  不要なバイトにアクセスしない
 14473:         z = t << o;                                //          z  abcde-00 00000000 00000000 00000000
 14474:         //                                         //      -1<<w  11111000 00000000 00000000 00000000
 14475:         //                                         //  -1<<w>>>o  00111110 00000000 00000000 00000000
 14476:         //                                        //~(-1<<w>>>o)  11000001 11111111 11111111 11111111
 14477:         //                                      //t&~(-1<<w>>>o)  --00000- 00000000 00000000 00000000
 14478:         mmuWriteByteData (a, (t & ~(-1 << w >>> o)) >>> 24, XEiJ.regSRS);     //       <ea>  --00000-
 14479:       } else if (z == 1) {
 14480:         //  <ea>{7,5}  o=7,w=32-5=27                        <ea>  -------a bcde----
 14481:         int t = mmuModifyWordSignData (a, XEiJ.regSRS) << 16;                     //          t  -------a bcde---- 00000000 00000000  020以上なのでアドレスエラーは出ない
 14482:         z = t << o;                                //          z  abcde--- -0000000 00000000 00000000
 14483:         //                                         //      -1<<w  11111000 00000000 00000000 00000000
 14484:         //                                         //  -1<<w>>>o  00000001 11110000 00000000 00000000
 14485:         //                                        //~(-1<<w>>>o)  11111110 00001111 11111111 11111111
 14486:         //                                      //t&~(-1<<w>>>o)  -------0 0000---- 00000000 00000000
 14487:         mmuWriteWordData (a, (t & ~(-1 << w >>> o)) >>> 16, XEiJ.regSRS);    //       <ea>  -------0 0000----
 14488:       } else if (z == 2) {
 14489:         //  <ea>{7,12}  o=7,w=32-12=20                      <ea>  -------a bcdefghi jkl-----
 14490:         int t = mmuModifyWordSignData (a, XEiJ.regSRS) << 16 | mmuModifyByteZeroData (a + 2, XEiJ.regSRS) << 8;  //          t  -------a bcdefghi jkl----- 00000000
 14491:         z = t << o;                                //          z  abcdefgh ijkl---- -0000000 00000000
 14492:         //                                         //      -1<<w  11111111 11110000 00000000 00000000
 14493:         //                                         //  -1<<w>>>o  00000001 11111111 11100000 00000000
 14494:         //                                        //~(-1<<w>>>o)  11111110 00000000 00011111 11111111
 14495:         t &= ~(-1 << w >>> o);                     //          t  -------0 00000000 000----- 00000000
 14496:         mmuWriteWordData (a, t >>> 16, XEiJ.regSRS);                         //       <ea>  -------0 00000000 jkl-----
 14497:         mmuWriteByteData (a + 2, t >>> 8, XEiJ.regSRS);                       //       <ea>  -------0 00000000 000-----
 14498:       } else if (z == 3) {
 14499:         //  <ea>{7,19}  o=7,w=32-19=13                      <ea>  -------a bcdefghi jklmnopq rs------
 14500:         int t = mmuModifyLongData (a, XEiJ.regSRS);                           //          t  -------a bcdefghi jklmnopq rs------
 14501:         z = t << o;                                //          z  abcdefgh ijklmnop qrs----- -0000000
 14502:         //                                         //      -1<<w  11111111 11111111 11100000 00000000
 14503:         //                                         //  -1<<w>>>o  00000001 11111111 11111111 11000000
 14504:         //                                        //~(-1<<w>>>o)  11111110 00000000 00000000 00111111
 14505:         mmuWriteLongData (a, t & ~(-1 << w >>> o), XEiJ.regSRS);             //       <ea>  -------0 00000000 00000000 00------
 14506:       } else {
 14507:         //  <ea>{7,26}  o=7,w=32-26=6                       <ea>  -------a bcdefghi jklmnopq rstuvwxy z-------
 14508:         int t = mmuModifyLongData (a, XEiJ.regSRS);                           //          t  -------a bcdefghi jklmnopq rstuvwxy
 14509:         z = t << o;                                //          z  abcdefgh ijklmnop qrstuvwx y0000000
 14510:         //                                                -1>>>o  00000001 11111111 11111111 11111111
 14511:         //                                             ~(-1>>>o)  11111110 00000000 00000000 00000000
 14512:         mmuWriteLongData (a, t & ~(-1 >>> o), XEiJ.regSRS);                  //       <ea>  -------0 00000000 00000000 00000000
 14513:         t = mmuModifyByteZeroData (a + 4, XEiJ.regSRS);                           //          t  00000000 00000000 00000000 z-------
 14514:         //                                         //    t>>>8-o  00000000 00000000 00000000 0z------
 14515:         z |= t >>> 8 - o;                          //          z  abcdefgh ijklmnop qrstuvwx yz------
 14516:         //                                         //  -1<<8-o+w  11111111 11111111 11111111 10000000
 14517:         //                                        //~(-1<<8-o+w)  00000000 00000000 00000000 01111111
 14518:         mmuWriteByteData (a + 4, t & ~(-1 << 8 - o + w), XEiJ.regSRS);        //       <ea>  -------0 00000000 00000000 00000000 0-------
 14519:       }
 14520:     }
 14521:     z >>= w;  //符号拡張。下位のゴミを消す
 14522:     XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X);  //ccr_tst
 14523:   }  //irpBfclr
 14524: 
 14525:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 14526:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 14527:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 14528:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 14529:   //BFFFO <ea>{#o:#w},Dn                            |-|--2346|-|-UUUU|-**00|D M  WXZP |1110_110_111_mmm_rrr-0nnn0ooooo0wwwww
 14530:   //BFFFO <ea>{#o:Dw},Dn                            |-|--2346|-|-UUUU|-**00|D M  WXZP |1110_110_111_mmm_rrr-0nnn0ooooo100www
 14531:   //BFFFO <ea>{Do:#w},Dn                            |-|--2346|-|-UUUU|-**00|D M  WXZP |1110_110_111_mmm_rrr-0nnn100ooo0wwwww
 14532:   //BFFFO <ea>{Do:Dw},Dn                            |-|--2346|-|-UUUU|-**00|D M  WXZP |1110_110_111_mmm_rrr-0nnn100ooo100www
 14533:   public static void irpBfffo () throws M68kException {
 14534:     int w = mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);  //pcwz。拡張ワード
 14535:     if ((w & ~0b0111_111_111_111_111) != 0 ||
 14536:         (w & 0b0000_111_111_000_000) > 0b0000_100_111_000_000 ||
 14537:         (w & 0b0000_000_000_111_111) > 0b0000_000_000_100_111) {
 14538:       M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION;
 14539:       throw M68kException.m6eSignal;
 14540:     }
 14541:     int n = w >> 12;
 14542:     int o = w << 31 - 11 >= 0 ? w >> 6 & 31 : XEiJ.regRn[w >> 6 & 7];  //o=offset
 14543:     w = -(w << 31 - 5 >= 0 ? w : XEiJ.regRn[w & 7]) & 31;  //w=32-width。1<=width<=32なので0<=32-width<=31
 14544:     XEiJ.mpuCycleCount += 9;
 14545:     int ea = XEiJ.regOC & 63;
 14546:     int z;
 14547:     if (ea < XEiJ.EA_AR) {  //BFFFO Dr{~}
 14548:       z = XEiJ.regRn[ea];
 14549:       z = z << o | z >>> -o;  //下位からはみ出したフィールドは上位に戻る
 14550:     } else {  //BFFFO <mem>{~}
 14551:       int a = efaCntLong (ea) + (o >> 3);  //フィールドの最上位ビットを含むバイトのアドレス
 14552:       int o7 = o & 7;
 14553:       z = 31 - w + o7 >> 3;  //フィールドが跨ぐバイト境界の数。0~4
 14554:       z = (z == 0 ? mmuReadByteSignData (a, XEiJ.regSRS) << 24 + o7 :  //不要なバイトにアクセスしない
 14555:            z == 1 ? mmuReadWordSignData (a, XEiJ.regSRS) << 16 + o7 :  //020以上なのでアドレスエラーは出ない
 14556:            z == 2 ? (mmuReadWordSignData (a, XEiJ.regSRS) << 8 | mmuReadByteZeroData (a + 2, XEiJ.regSRS)) << 8 + o7 :
 14557:            z == 3 ? mmuReadLongData (a, XEiJ.regSRS) << o7 :
 14558:            mmuReadLongData (a, XEiJ.regSRS) << o7 | mmuReadByteZeroData (a + 4, XEiJ.regSRS) >>> 8 - o7);
 14559:     }
 14560:     if (true) {
 14561:       XEiJ.regRn[n] = Integer.numberOfLeadingZeros (z >>> w) - w + o;  //ゼロ拡張してから1のビットを探す。見つからないときはoffset+widthになる
 14562:     } else {
 14563:       int t = z >>> w;
 14564:       if (t == 0) {
 14565:         XEiJ.regRn[n] = 32 - w + o;
 14566:       } else {
 14567:         int k = -(t >>> 16) >> 16 & 16;
 14568:         k += -(t >>> k + 8) >> 8 & 8;
 14569:         k += -(t >>> k + 4) >> 4 & 4;
 14570:         //     bit3  1  1  1  1  1  1  1  1  0  0  0  0  0  0  0  0
 14571:         //     bit2  1  1  1  1  0  0  0  0  1  1  1  1  0  0  0  0
 14572:         //     bit1  1  1  0  0  1  1  0  0  1  1  0  0  1  1  0  0
 14573:         //     bit0  1  0  1  0  1  0  1  0  1  0  1  0  1  0  1  0
 14574:         XEiJ.regRn[n] = ((0b11_11_11_11_11_11_11_11_10_10_10_10_01_01_00_00 >>> (t >>> k << 1)) & 3) + k - w + o;  //intのシフトカウントは下位5bitだけが使用される
 14575:       }
 14576:     }
 14577:     z >>= w;  //符号拡張。下位のゴミを消す
 14578:     XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X);  //ccr_tst
 14579:   }  //irpBfffo
 14580: 
 14581:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 14582:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 14583:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 14584:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 14585:   //BFSET <ea>{#o:#w}                               |-|--2346|-|-UUUU|-**00|D M  WXZ  |1110_111_011_mmm_rrr-00000ooooo0wwwww
 14586:   //BFSET <ea>{#o:Dw}                               |-|--2346|-|-UUUU|-**00|D M  WXZ  |1110_111_011_mmm_rrr-00000ooooo100www
 14587:   //BFSET <ea>{Do:#w}                               |-|--2346|-|-UUUU|-**00|D M  WXZ  |1110_111_011_mmm_rrr-0000100ooo0wwwww
 14588:   //BFSET <ea>{Do:Dw}                               |-|--2346|-|-UUUU|-**00|D M  WXZ  |1110_111_011_mmm_rrr-0000100ooo100www
 14589:   public static void irpBfset () throws M68kException {
 14590:     int w = mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);  //pcwz。拡張ワード
 14591:     if ((w & ~0b0000_111_111_111_111) != 0 ||
 14592:         (w & 0b0000_111_111_000_000) > 0b0000_100_111_000_000 ||
 14593:         (w & 0b0000_000_000_111_111) > 0b0000_000_000_100_111) {
 14594:       M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION;
 14595:       throw M68kException.m6eSignal;
 14596:     }
 14597:     int o = w << 31 - 11 >= 0 ? w >> 6 & 31 : XEiJ.regRn[w >> 6 & 7];  //o=offset
 14598:     w = -(w << 31 - 5 >= 0 ? w : XEiJ.regRn[w & 7]) & 31;  //w=32-width。1<=width<=32なので0<=32-width<=31
 14599:     XEiJ.mpuCycleCount += 8;
 14600:     int ea = XEiJ.regOC & 63;
 14601:     int z;
 14602:     if (ea < XEiJ.EA_AR) {  //BFSET Dr{~}
 14603:       z = XEiJ.regRn[ea];
 14604:       z = z << o | z >>> -o;  //下位からはみ出したフィールドは上位に戻る
 14605:       int t = z | -1 << w;  //フィールドの幅だけ1を並べる
 14606:       XEiJ.regRn[ea] = t << -o | t >>> o;
 14607:     } else {  //BFSET <mem>{~}
 14608:       int a = efaCltLong (ea) + (o >> 3);  //フィールドの最上位ビットを含むバイトのアドレス
 14609:       o &= 7;
 14610:       z = 31 - w + o >> 3;  //フィールドが跨ぐバイト境界の数。0~4
 14611:       if (z == 0) {
 14612:         //  <ea>{2,5}  o=2,w=32-5=27                        <ea>  --abcde-
 14613:         int t = mmuModifyByteSignData (a, XEiJ.regSRS) << 24;                     //          t  --abcde- 00000000 00000000 00000000  不要なバイトにアクセスしない
 14614:         z = t << o;                                //          z  abcde-00 00000000 00000000 00000000
 14615:         //                                         //      -1<<w  11111000 00000000 00000000 00000000
 14616:         //                                         //  -1<<w>>>o  00111110 00000000 00000000 00000000
 14617:         //                                         //t|-1<<w>>>o  --11111- 00000000 00000000 00000000
 14618:         mmuWriteByteData (a, (t | -1 << w >>> o) >>> 24, XEiJ.regSRS);        //       <ea>  --11111-
 14619:       } else if (z == 1) {
 14620:         //  <ea>{7,5}  o=7,w=32-5=27                        <ea>  -------a bcde----
 14621:         int t = mmuModifyWordSignData (a, XEiJ.regSRS) << 16;                     //          t  -------a bcde---- 00000000 00000000  020以上なのでアドレスエラーは出ない
 14622:         z = t << o;                                //          z  abcde--- -0000000 00000000 00000000
 14623:         //                                         //      -1<<w  11111000 00000000 00000000 00000000
 14624:         //                                         //  -1<<w>>>o  00000001 11110000 00000000 00000000
 14625:         //                                         //t|-1<<w>>>o  -------1 1111---- 00000000 00000000
 14626:         mmuWriteWordData (a, (t | -1 << w >>> o) >>> 16, XEiJ.regSRS);       //       <ea>  -------1 1111----
 14627:       } else if (z == 2) {
 14628:         //  <ea>{7,12}  o=7,w=32-12=20                      <ea>  -------a bcdefghi jkl-----
 14629:         int t = mmuModifyWordSignData (a, XEiJ.regSRS) << 16 | mmuModifyByteZeroData (a + 2, XEiJ.regSRS) << 8;  //          t  -------a bcdefghi jkl----- 00000000
 14630:         z = t << o;                                //          z  abcdefgh ijkl---- -0000000 00000000
 14631:         //                                         //      -1<<w  11111111 11110000 00000000 00000000
 14632:         //                                         //  -1<<w>>>o  00000001 11111111 11100000 00000000
 14633:         t |= -1 << w >>> o;                        //          t  -------1 11111111 111----- 00000000
 14634:         mmuWriteWordData (a, t >>> 16, XEiJ.regSRS);                         //       <ea>  -------1 11111111 jkl-----
 14635:         mmuWriteByteData (a + 2, t >>> 8, XEiJ.regSRS);                       //       <ea>  -------1 11111111 111-----
 14636:       } else if (z == 3) {
 14637:         //  <ea>{7,19}  o=7,w=32-19=13                      <ea>  -------a bcdefghi jklmnopq rs------
 14638:         int t = mmuModifyLongData (a, XEiJ.regSRS);                           //          t  -------a bcdefghi jklmnopq rs------
 14639:         z = t << o;                                //          z  abcdefgh ijklmnop qrs----- -0000000
 14640:         //                                         //      -1<<w  11111111 11111111 11100000 00000000
 14641:         //                                         //  -1<<w>>>o  00000001 11111111 11111111 11000000
 14642:         mmuWriteLongData (a, t | -1 << w >>> o, XEiJ.regSRS);                //       <ea>  -------1 11111111 11111111 11------
 14643:       } else {
 14644:         //  <ea>{7,26}  o=7,w=32-26=6                       <ea>  -------a bcdefghi jklmnopq rstuvwxy z-------
 14645:         int t = mmuModifyLongData (a, XEiJ.regSRS);                           //          t  -------a bcdefghi jklmnopq rstuvwxy
 14646:         z = t << o;                                //          z  abcdefgh ijklmnop qrstuvwx y0000000
 14647:         //                                                -1>>>o  00000001 11111111 11111111 11111111
 14648:         mmuWriteLongData (a, t | -1 >>> o, XEiJ.regSRS);                     //       <ea>  -------1 11111111 11111111 11111111
 14649:         t = mmuModifyByteZeroData (a + 4, XEiJ.regSRS);                           //          t  00000000 00000000 00000000 z-------
 14650:         //                                         //    t>>>8-o  00000000 00000000 00000000 0z------
 14651:         z |= t >>> 8 - o;                          //          z  abcdefgh ijklmnop qrstuvwx yz------
 14652:         //                                         //  -1<<8-o+w  11111111 11111111 11111111 10000000
 14653:         mmuWriteByteData (a + 4, t | -1 << 8 - o + w, XEiJ.regSRS);           //       <ea>  -------1 11111111 11111111 11111111 1-------
 14654:       }
 14655:     }
 14656:     z >>= w;  //符号拡張。下位のゴミを消す
 14657:     XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X);  //ccr_tst
 14658:   }  //irpBfset
 14659: 
 14660:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 14661:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 14662:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 14663:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 14664:   //BFINS Dn,<ea>{#o:#w}                            |-|--2346|-|-UUUU|-**00|D M  WXZ  |1110_111_111_mmm_rrr-0nnn0ooooo0wwwww
 14665:   //BFINS Dn,<ea>{#o:Dw}                            |-|--2346|-|-UUUU|-**00|D M  WXZ  |1110_111_111_mmm_rrr-0nnn0ooooo100www
 14666:   //BFINS Dn,<ea>{Do:#w}                            |-|--2346|-|-UUUU|-**00|D M  WXZ  |1110_111_111_mmm_rrr-0nnn100ooo0wwwww
 14667:   //BFINS Dn,<ea>{Do:Dw}                            |-|--2346|-|-UUUU|-**00|D M  WXZ  |1110_111_111_mmm_rrr-0nnn100ooo100www
 14668:   public static void irpBfins () throws M68kException {
 14669:     int w = mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);  //pcwz。拡張ワード
 14670:     if ((w & ~0b0111_111_111_111_111) != 0 ||
 14671:         (w & 0b0000_111_111_000_000) > 0b0000_100_111_000_000 ||
 14672:         (w & 0b0000_000_000_111_111) > 0b0000_000_000_100_111) {
 14673:       M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION;
 14674:       throw M68kException.m6eSignal;
 14675:     }
 14676:     int n = w >> 12;
 14677:     int o = w << 31 - 11 >= 0 ? w >> 6 & 31 : XEiJ.regRn[w >> 6 & 7];  //o=offset
 14678:     w = -(w << 31 - 5 >= 0 ? w : XEiJ.regRn[w & 7]) & 31;  //w=32-width。1<=width<=32なので0<=32-width<=31
 14679:     XEiJ.mpuCycleCount += 6;
 14680:     int ea = XEiJ.regOC & 63;
 14681:     int z = XEiJ.regRn[n] << w;  //z=Dn<<-width
 14682:     if (ea < XEiJ.EA_AR) {  //BFINS Dn,Dr{~}
 14683:       //  Dr{30,5}  o=30,w=32-5=27                          t=Dr  cde----- -------- -------- ------ab
 14684:       //                                                    t<<o  ab000000 00000000 00000000 00000000
 14685:       //                                                  t>>>-o  00cde--- -------- -------- --------
 14686:       //                                             t<<o|t>>>-o  abcde--- -------- -------- --------
 14687:       //                                                   -1<<w  11111000 00000000 00000000 00000000
 14688:       //                                                ~(-1<<w)  00000111 11111111 11111111 11111111
 14689:       //                                  (t<<o|t>>>-o)&~(-1<<w)  00000--- -------- -------- --------
 14690:       //                                                    r[n]  -------- -------- -------- ---ABCDE
 14691:       //                                               z=r[n]<<w  ABCDE000 00000000 00000000 00000000
 14692:       //                              t=(t<<o|t>>>-o)&~(-1<<w)|z  ABCDE--- -------- -------- --------
 14693:       //                                                   t<<-o  CDE----- -------- -------- ------00
 14694:       //                                                   t>>>o  00000000 00000000 00000000 000000AB
 14695:       //                                             t<<-o|t>>>o  CDE----- -------- -------- ------AB
 14696:       int t = XEiJ.regRn[ea];
 14697:       t = (t << o | t >>> -o) & ~(-1 << w) | z;
 14698:       XEiJ.regRn[ea] = t << -o | t >>> o;
 14699:     } else {  //BFINS Dn,<mem>{~}
 14700:       int a = efaCltLong (ea) + (o >> 3);  //フィールドの最上位ビットを含むバイトのアドレス
 14701:       o &= 7;
 14702:       n = 31 - w + o >> 3;  //フィールドが跨ぐバイト境界の数。0~4
 14703:       if (n == 0) {
 14704:         //  <ea>{2,5}  o=2,w=32-5=27                        <ea>  --abcde-
 14705:         //                                         XEiJ.busRbs(a)<<24  --abcde- 00000000 00000000 00000000
 14706:         //                                                 -1<<w  11111000 00000000 00000000 00000000
 14707:         //                                             -1<<w>>>o  00111110 00000000 00000000 00000000
 14708:         //                                          ~(-1<<w>>>o)  11000001 11111111 11111111 11111111
 14709:         //                            XEiJ.busRbs(a)<<24&~(-1<<w>>>o)  --00000- 00000000 00000000 00000000
 14710:         //                                                  r[n]  -------- -------- -------- ---ABCDE
 14711:         //                                             z=r[n]<<w  ABCDE000 00000000 00000000 00000000
 14712:         //                                                 z>>>o  00ABCDE0 00000000 00000000 00000000
 14713:         //                      XEiJ.busRbs(a)<<24&~(-1<<w>>>o)|z>>>o  --ABCDE- 00000000 00000000 00000000
 14714:         mmuWriteByteData (a, (mmuModifyByteSignData (a, XEiJ.regSRS) << 24 & ~(-1 << w >>> o) | z >>> o) >>> 24, XEiJ.regSRS);
 14715:       } else if (n == 1) {
 14716:         //  <ea>{3,11}  o=3,w=32-11=21                      <ea>  ---abcde fghijk--
 14717:         //                                            rws(a)<<16  ---abcde fghijk-- 00000000 00000000
 14718:         //                                                 -1<<w  11111111 11100000 00000000 00000000
 14719:         //                                             -1<<w>>>o  00011111 11111100 00000000 00000000
 14720:         //                                          ~(-1<<w>>>o)  11100000 00000011 11111111 11111111
 14721:         //                               rws(a)<<16&~(-1<<w>>>o)  ---00000 000000-- 00000000 00000000
 14722:         //                                                  r[n]  -------- -------- -----ABC DEFGHIJK
 14723:         //                                             z=r[n]<<w  ABCDEFGH IJK00000 00000000 00000000
 14724:         //                                                 z>>>o  000ABCDE FGHIJK00 00000000 00000000
 14725:         //                         rws(a)<<16&~(-1<<w>>>o)|z>>>o  ---ABCDE FGHIJK-- 00000000 00000000
 14726:         mmuWriteWordData (a, (mmuModifyWordSignData (a, XEiJ.regSRS) << 16 & ~(-1 << w >>> o) | z >>> o) >>> 16, XEiJ.regSRS);
 14727:       } else if (n == 2) {
 14728:         //  <ea>{4,17}  o=4,w=32-17=15                      <ea>  ----abcd efghijkl mnopq---
 14729:         //                                rws(a)<<16|rbz(a+2)<<8  ----abcd efghijkl mnopq--- 00000000
 14730:         //                                                 -1<<w  11111111 11111111 10000000 00000000
 14731:         //                                             -1<<w>>>o  00001111 11111111 11111000 00000000
 14732:         //                                          ~(-1<<w>>>o)  11110000 00000000 00000111 11111111
 14733:         //                 (rws(a)<<16|rbz(a+2)<<8)&~(-1<<w>>>o)  ----0000 00000000 00000--- 00000000
 14734:         //                                                  r[n]  -------- -------A BCDEFGHI JKLMNOPQ
 14735:         //                                             z=r[n]<<w  ABCDEFGH IJKLMNOP Q0000000 00000000
 14736:         //                                                 z>>>o  0000ABCD EFGHIJKL MNOPQ000 00000000
 14737:         //           (rws(a)<<16|rbz(a+2)<<8)&~(-1<<w>>>o)|z>>>o  ----ABCD EFGHIJKL MNOPQ--- 00000000
 14738:         int t = (mmuModifyWordSignData (a, XEiJ.regSRS) << 16 | mmuModifyByteZeroData (a + 2, XEiJ.regSRS) << 8) & ~(-1 << w >>> o) | z >>> o;
 14739:         mmuWriteWordData (a, t >>> 16, XEiJ.regSRS);
 14740:         mmuWriteByteData (a + 2, t >>> 8, XEiJ.regSRS);
 14741:       } else if (n == 3) {
 14742:         //  <ea>{5,23}  o=5,w=32-23=9                       <ea>  -----abc defghijk lmnopqrs tuvw----
 14743:         //                                                rls(a)  -----abc defghijk lmnopqrs tuvw----
 14744:         //                                                 -1<<w  11111111 11111111 11111110 00000000
 14745:         //                                             -1<<w>>>o  00000111 11111111 11111111 11110000
 14746:         //                                          ~(-1<<w>>>o)  11111000 00000000 00000000 00001111
 14747:         //                                   rls(a)&~(-1<<w>>>o)  -----000 00000000 00000000 0000----
 14748:         //                                                  r[n]  -------- -ABCDEFG HIJKLMNO PQRSTUVW
 14749:         //                                             z=r[n]<<w  ABCDEFGH IJKLMNOP QRSTUVW0 00000000
 14750:         //                                                 z>>>o  00000ABC DEFGHIJK LMNOPQRS TUVW0000
 14751:         //                             rls(a)&~(-1<<w>>>o)|z>>>o  -----ABC DEFGHIJK LMNOPQRS TUVW----
 14752:         mmuWriteLongData (a, mmuModifyLongData (a, XEiJ.regSRS) & ~(-1 << w >>> o) | z >>> o, XEiJ.regSRS);
 14753:       } else {
 14754:         //  <ea>{6,29}  o=6,w=32-29=3                       <ea>  ------ab cdefghij klmnopqr stuvwxyz abc-----
 14755:         //                                                rls(a)  ------ab cdefghij klmnopqr stuvwxyz
 14756:         //                                                -1>>>o  00000011 11111111 11111111 11111111
 14757:         //                                             ~(-1>>>o)  11111100 00000000 00000000 00000000
 14758:         //                                      rls(a)&~(-1>>>o)  ------00 00000000 00000000 00000000
 14759:         //                                                  r[n]  ---ABCDE FGHIJKLM NOPQRSTU VWXYZABC
 14760:         //                                             z=r[n]<<w  ABCDEFGH IJKLMNOP QRSTUVWX YZABC000
 14761:         //                                                 z>>>o  000000AB CDEFGHIJ KLMNOPQR STUVWXYZ
 14762:         //                                rls(a)&~(-1>>>o)|z>>>o  ------AB CDEFGHIJ KLMNOPQR STUVWXYZ
 14763:         mmuWriteLongData (a, mmuModifyLongData (a, XEiJ.regSRS) & ~(-1 >>> o) | z >>> o, XEiJ.regSRS);
 14764:         //                                              rbz(a+4)  00000000 00000000 00000000 abc-----
 14765:         //                                             -1<<8-o+w  11111111 11111111 11111111 11100000
 14766:         //                                          ~(-1<<8-o+w)  00000000 00000000 00000000 00011111
 14767:         //                                 rbz(a+4)&~(-1<<8-o+w)  00000000 00000000 00000000 000-----
 14768:         //                                                z<<8-o  CDEFGHIJ KLMNOPQR STUVWXYZ ABC00000
 14769:         //                          rbz(a+4)&~(-1<<8-o+w)|z<<8-o  CDEFGHIJ KLMNOPQR STUVWXYZ ABC-----
 14770:         mmuWriteByteData (a + 4, mmuModifyByteZeroData (a + 4, XEiJ.regSRS) & ~(-1 << 8 - o + w) | z << 8 - o, XEiJ.regSRS);
 14771:       }
 14772:     }
 14773:     //zは上位に寄ったままだが下位の空きは0なのでそのままテストする
 14774:     XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X);  //ccr_tst
 14775:   }  //irpBfins
 14776: 
 14777:   //浮動小数点例外
 14778:   //  48  BSUN   FP分岐または比較不能状態でのセット
 14779:   //  49  INEX   FP不正確な結果
 14780:   //  50  DZ     FPゼロによる除算
 14781:   //  51  UNFL   FPアンダーフロー
 14782:   //  52  OPERR  FPオペランドエラー
 14783:   //  53  OVFL   FPオーバーフロー
 14784:   //  54  SNAN   FPシグナリングNAN
 14785:   //  55         FP未実装データ型
 14786:   //FPSRのビットオフセット→例外ベクタ番号
 14787: /*
 14788:   public static final int[] FP_OFFSET_TO_NUMBER = {
 14789:     0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 14790:     48,  //16  15  BSUN   48  BSUN   FP分岐または比較不能状態でのセット
 14791:     54,  //17  14  SNAN   54  SNAN   FPシグナリングNAN
 14792:     52,  //18  13  OPERR  52  OPERR  FPオペランドエラー
 14793:     53,  //19  12  OVFL   53  OVFL   FPオーバーフロー
 14794:     51,  //20  11  UNFL   51  UNFL   FPアンダーフロー
 14795:     50,  //21  10  DZ     50  DZ     FPゼロによる除算
 14796:     49,  //22   9  INEX2  49  INEX   FP不正確な結果
 14797:     49,  //23   8  INEX1  49  INEX   FP不正確な結果
 14798:     0, 0, 0, 0, 0, 0, 0, 0,
 14799:   };
 14800: */
 14801:   public static final byte[] FP_OFFSET_TO_NUMBER = "\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\00006453211\0\0\0\0\0\0\0\0".getBytes (XEiJ.ISO_8859_1);
 14802: 
 14803:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 14804:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 14805:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 14806:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 14807:   //FTST.X FPm                                      |-|--CC46|-|-----|-----|          |1111_001_000_000_000-000mmm0000111010
 14808:   //FMOVE.X FPm,FPn                                 |-|--CC46|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0000000
 14809:   //FINT.X FPm,FPn                                  |-|--CCS6|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0000001
 14810:   //FSINH.X FPm,FPn                                 |-|--CCSS|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0000010
 14811:   //FINTRZ.X FPm,FPn                                |-|--CCS6|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0000011
 14812:   //FSQRT.X FPm,FPn                                 |-|--CC46|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0000100
 14813:   //FLOGNP1.X FPm,FPn                               |-|--CCSS|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0000110
 14814:   //FETOXM1.X FPm,FPn                               |-|--CCSS|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0001000
 14815:   //FTANH.X FPm,FPn                                 |-|--CCSS|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0001001
 14816:   //FATAN.X FPm,FPn                                 |-|--CCSS|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0001010
 14817:   //FASIN.X FPm,FPn                                 |-|--CCSS|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0001100
 14818:   //FATANH.X FPm,FPn                                |-|--CCSS|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0001101
 14819:   //FSIN.X FPm,FPn                                  |-|--CCSS|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0001110
 14820:   //FTAN.X FPm,FPn                                  |-|--CCSS|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0001111
 14821:   //FETOX.X FPm,FPn                                 |-|--CCSS|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0010000
 14822:   //FTWOTOX.X FPm,FPn                               |-|--CCSS|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0010001
 14823:   //FTENTOX.X FPm,FPn                               |-|--CCSS|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0010010
 14824:   //FLOGN.X FPm,FPn                                 |-|--CCSS|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0010100
 14825:   //FLOG10.X FPm,FPn                                |-|--CCSS|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0010101
 14826:   //FLOG2.X FPm,FPn                                 |-|--CCSS|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0010110
 14827:   //FABS.X FPm,FPn                                  |-|--CC46|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0011000
 14828:   //FCOSH.X FPm,FPn                                 |-|--CCSS|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0011001
 14829:   //FNEG.X FPm,FPn                                  |-|--CC46|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0011010
 14830:   //FACOS.X FPm,FPn                                 |-|--CCSS|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0011100
 14831:   //FCOS.X FPm,FPn                                  |-|--CCSS|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0011101
 14832:   //FGETEXP.X FPm,FPn                               |-|--CCSS|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0011110
 14833:   //FGETMAN.X FPm,FPn                               |-|--CCSS|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0011111
 14834:   //FDIV.X FPm,FPn                                  |-|--CC46|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0100000
 14835:   //FMOD.X FPm,FPn                                  |-|--CCSS|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0100001
 14836:   //FADD.X FPm,FPn                                  |-|--CC46|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0100010
 14837:   //FMUL.X FPm,FPn                                  |-|--CC46|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0100011
 14838:   //FSGLDIV.X FPm,FPn                               |-|--CCS6|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0100100
 14839:   //FREM.X FPm,FPn                                  |-|--CCSS|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0100101
 14840:   //FSCALE.X FPm,FPn                                |-|--CCSS|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0100110
 14841:   //FSGLMUL.X FPm,FPn                               |-|--CCS6|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0100111
 14842:   //FSUB.X FPm,FPn                                  |-|--CC46|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0101000
 14843:   //FCMP.X FPm,FPn                                  |-|--CC46|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0111000
 14844:   //FSMOVE.X FPm,FPn                                |-|----46|-|-----|-----|          |1111_001_000_000_000-000mmmnnn1000000
 14845:   //FSSQRT.X FPm,FPn                                |-|----46|-|-----|-----|          |1111_001_000_000_000-000mmmnnn1000001
 14846:   //FDMOVE.X FPm,FPn                                |-|----46|-|-----|-----|          |1111_001_000_000_000-000mmmnnn1000100
 14847:   //FDSQRT.X FPm,FPn                                |-|----46|-|-----|-----|          |1111_001_000_000_000-000mmmnnn1000101
 14848:   //FSABS.X FPm,FPn                                 |-|----46|-|-----|-----|          |1111_001_000_000_000-000mmmnnn1011000
 14849:   //FSNEG.X FPm,FPn                                 |-|----46|-|-----|-----|          |1111_001_000_000_000-000mmmnnn1011010
 14850:   //FDABS.X FPm,FPn                                 |-|----46|-|-----|-----|          |1111_001_000_000_000-000mmmnnn1011100
 14851:   //FDNEG.X FPm,FPn                                 |-|----46|-|-----|-----|          |1111_001_000_000_000-000mmmnnn1011110
 14852:   //FSDIV.X FPm,FPn                                 |-|----46|-|-----|-----|          |1111_001_000_000_000-000mmmnnn1100000
 14853:   //FSADD.X FPm,FPn                                 |-|----46|-|-----|-----|          |1111_001_000_000_000-000mmmnnn1100010
 14854:   //FSMUL.X FPm,FPn                                 |-|----46|-|-----|-----|          |1111_001_000_000_000-000mmmnnn1100011
 14855:   //FDDIV.X FPm,FPn                                 |-|----46|-|-----|-----|          |1111_001_000_000_000-000mmmnnn1100100
 14856:   //FDADD.X FPm,FPn                                 |-|----46|-|-----|-----|          |1111_001_000_000_000-000mmmnnn1100110
 14857:   //FDMUL.X FPm,FPn                                 |-|----46|-|-----|-----|          |1111_001_000_000_000-000mmmnnn1100111
 14858:   //FSSUB.X FPm,FPn                                 |-|----46|-|-----|-----|          |1111_001_000_000_000-000mmmnnn1101000
 14859:   //FDSUB.X FPm,FPn                                 |-|----46|-|-----|-----|          |1111_001_000_000_000-000mmmnnn1101100
 14860:   //FSINCOS.X FPm,FPc:FPs                           |-|--CCSS|-|-----|-----|          |1111_001_000_000_000-000mmmsss0110ccc
 14861:   //FMOVECR.X #ccc,FPn                              |-|--CCSS|-|-----|-----|          |1111_001_000_000_000-010111nnn0cccccc
 14862:   //FMOVE.L FPn,<ea>                                |-|--CC46|-|-----|-----|D M+-WXZ  |1111_001_000_mmm_rrr-011000nnn0000000
 14863:   //FMOVE.S FPn,<ea>                                |-|--CC46|-|-----|-----|D M+-WXZ  |1111_001_000_mmm_rrr-011001nnn0000000
 14864:   //FMOVE.W FPn,<ea>                                |-|--CC46|-|-----|-----|D M+-WXZ  |1111_001_000_mmm_rrr-011100nnn0000000
 14865:   //FMOVE.B FPn,<ea>                                |-|--CC46|-|-----|-----|D M+-WXZ  |1111_001_000_mmm_rrr-011110nnn0000000
 14866:   //FMOVE.L FPIAR,<ea>                              |-|--CC46|-|-----|-----|DAM+-WXZ  |1111_001_000_mmm_rrr-1010010000000000
 14867:   //FMOVEM.L FPIAR,<ea>                             |-|--CC46|-|-----|-----|DAM+-WXZ  |1111_001_000_mmm_rrr-1010010000000000
 14868:   //FMOVE.L FPSR,<ea>                               |-|--CC46|-|-----|-----|D M+-WXZ  |1111_001_000_mmm_rrr-1010100000000000
 14869:   //FMOVEM.L FPSR,<ea>                              |-|--CC46|-|-----|-----|D M+-WXZ  |1111_001_000_mmm_rrr-1010100000000000
 14870:   //FMOVE.L FPCR,<ea>                               |-|--CC46|-|-----|-----|D M+-WXZ  |1111_001_000_mmm_rrr-1011000000000000
 14871:   //FMOVEM.L FPCR,<ea>                              |-|--CC46|-|-----|-----|D M+-WXZ  |1111_001_000_mmm_rrr-1011000000000000
 14872:   //FTST.L <ea>                                     |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-0100000000111010
 14873:   //FMOVE.L <ea>,FPn                                |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0000000
 14874:   //FINT.L <ea>,FPn                                 |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0000001
 14875:   //FSINH.L <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0000010
 14876:   //FINTRZ.L <ea>,FPn                               |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0000011
 14877:   //FSQRT.L <ea>,FPn                                |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0000100
 14878:   //FLOGNP1.L <ea>,FPn                              |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0000110
 14879:   //FETOXM1.L <ea>,FPn                              |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0001000
 14880:   //FTANH.L <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0001001
 14881:   //FATAN.L <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0001010
 14882:   //FASIN.L <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0001100
 14883:   //FATANH.L <ea>,FPn                               |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0001101
 14884:   //FSIN.L <ea>,FPn                                 |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0001110
 14885:   //FTAN.L <ea>,FPn                                 |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0001111
 14886:   //FETOX.L <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0010000
 14887:   //FTWOTOX.L <ea>,FPn                              |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0010001
 14888:   //FTENTOX.L <ea>,FPn                              |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0010010
 14889:   //FLOGN.L <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0010100
 14890:   //FLOG10.L <ea>,FPn                               |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0010101
 14891:   //FLOG2.L <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0010110
 14892:   //FABS.L <ea>,FPn                                 |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0011000
 14893:   //FCOSH.L <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0011001
 14894:   //FNEG.L <ea>,FPn                                 |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0011010
 14895:   //FACOS.L <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0011100
 14896:   //FCOS.L <ea>,FPn                                 |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0011101
 14897:   //FGETEXP.L <ea>,FPn                              |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0011110
 14898:   //FGETMAN.L <ea>,FPn                              |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0011111
 14899:   //FDIV.L <ea>,FPn                                 |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0100000
 14900:   //FMOD.L <ea>,FPn                                 |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0100001
 14901:   //FADD.L <ea>,FPn                                 |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0100010
 14902:   //FMUL.L <ea>,FPn                                 |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0100011
 14903:   //FSGLDIV.L <ea>,FPn                              |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0100100
 14904:   //FREM.L <ea>,FPn                                 |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0100101
 14905:   //FSCALE.L <ea>,FPn                               |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0100110
 14906:   //FSGLMUL.L <ea>,FPn                              |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0100111
 14907:   //FSUB.L <ea>,FPn                                 |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0101000
 14908:   //FCMP.L <ea>,FPn                                 |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0111000
 14909:   //FSMOVE.L <ea>,FPn                               |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn1000000
 14910:   //FSSQRT.L <ea>,FPn                               |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn1000001
 14911:   //FDMOVE.L <ea>,FPn                               |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn1000100
 14912:   //FDSQRT.L <ea>,FPn                               |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn1000101
 14913:   //FSABS.L <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn1011000
 14914:   //FSNEG.L <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn1011010
 14915:   //FDABS.L <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn1011100
 14916:   //FDNEG.L <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn1011110
 14917:   //FSDIV.L <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn1100000
 14918:   //FSADD.L <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn1100010
 14919:   //FSMUL.L <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn1100011
 14920:   //FDDIV.L <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn1100100
 14921:   //FDADD.L <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn1100110
 14922:   //FDMUL.L <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn1100111
 14923:   //FSSUB.L <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn1101000
 14924:   //FDSUB.L <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn1101100
 14925:   //FSINCOS.L <ea>,FPc:FPs                          |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000sss0110ccc
 14926:   //FTST.S <ea>                                     |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-0100010000111010
 14927:   //FMOVE.S <ea>,FPn                                |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0000000
 14928:   //FINT.S <ea>,FPn                                 |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0000001
 14929:   //FSINH.S <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0000010
 14930:   //FINTRZ.S <ea>,FPn                               |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0000011
 14931:   //FSQRT.S <ea>,FPn                                |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0000100
 14932:   //FLOGNP1.S <ea>,FPn                              |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0000110
 14933:   //FETOXM1.S <ea>,FPn                              |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0001000
 14934:   //FTANH.S <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0001001
 14935:   //FATAN.S <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0001010
 14936:   //FASIN.S <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0001100
 14937:   //FATANH.S <ea>,FPn                               |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0001101
 14938:   //FSIN.S <ea>,FPn                                 |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0001110
 14939:   //FTAN.S <ea>,FPn                                 |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0001111
 14940:   //FETOX.S <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0010000
 14941:   //FTWOTOX.S <ea>,FPn                              |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0010001
 14942:   //FTENTOX.S <ea>,FPn                              |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0010010
 14943:   //FLOGN.S <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0010100
 14944:   //FLOG10.S <ea>,FPn                               |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0010101
 14945:   //FLOG2.S <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0010110
 14946:   //FABS.S <ea>,FPn                                 |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0011000
 14947:   //FCOSH.S <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0011001
 14948:   //FNEG.S <ea>,FPn                                 |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0011010
 14949:   //FACOS.S <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0011100
 14950:   //FCOS.S <ea>,FPn                                 |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0011101
 14951:   //FGETEXP.S <ea>,FPn                              |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0011110
 14952:   //FGETMAN.S <ea>,FPn                              |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0011111
 14953:   //FDIV.S <ea>,FPn                                 |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0100000
 14954:   //FMOD.S <ea>,FPn                                 |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0100001
 14955:   //FADD.S <ea>,FPn                                 |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0100010
 14956:   //FMUL.S <ea>,FPn                                 |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0100011
 14957:   //FSGLDIV.S <ea>,FPn                              |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0100100
 14958:   //FREM.S <ea>,FPn                                 |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0100101
 14959:   //FSCALE.S <ea>,FPn                               |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0100110
 14960:   //FSGLMUL.S <ea>,FPn                              |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0100111
 14961:   //FSUB.S <ea>,FPn                                 |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0101000
 14962:   //FCMP.S <ea>,FPn                                 |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0111000
 14963:   //FSMOVE.S <ea>,FPn                               |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn1000000
 14964:   //FSSQRT.S <ea>,FPn                               |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn1000001
 14965:   //FDMOVE.S <ea>,FPn                               |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn1000100
 14966:   //FDSQRT.S <ea>,FPn                               |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn1000101
 14967:   //FSABS.S <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn1011000
 14968:   //FSNEG.S <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn1011010
 14969:   //FDABS.S <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn1011100
 14970:   //FDNEG.S <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn1011110
 14971:   //FSDIV.S <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn1100000
 14972:   //FSADD.S <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn1100010
 14973:   //FSMUL.S <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn1100011
 14974:   //FDDIV.S <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn1100100
 14975:   //FDADD.S <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn1100110
 14976:   //FDMUL.S <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn1100111
 14977:   //FSSUB.S <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn1101000
 14978:   //FDSUB.S <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn1101100
 14979:   //FSINCOS.S <ea>,FPc:FPs                          |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001sss0110ccc
 14980:   //FTST.W <ea>                                     |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-0101000000111010
 14981:   //FMOVE.W <ea>,FPn                                |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0000000
 14982:   //FINT.W <ea>,FPn                                 |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0000001
 14983:   //FSINH.W <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0000010
 14984:   //FINTRZ.W <ea>,FPn                               |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0000011
 14985:   //FSQRT.W <ea>,FPn                                |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0000100
 14986:   //FLOGNP1.W <ea>,FPn                              |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0000110
 14987:   //FETOXM1.W <ea>,FPn                              |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0001000
 14988:   //FTANH.W <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0001001
 14989:   //FATAN.W <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0001010
 14990:   //FASIN.W <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0001100
 14991:   //FATANH.W <ea>,FPn                               |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0001101
 14992:   //FSIN.W <ea>,FPn                                 |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0001110
 14993:   //FTAN.W <ea>,FPn                                 |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0001111
 14994:   //FETOX.W <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0010000
 14995:   //FTWOTOX.W <ea>,FPn                              |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0010001
 14996:   //FTENTOX.W <ea>,FPn                              |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0010010
 14997:   //FLOGN.W <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0010100
 14998:   //FLOG10.W <ea>,FPn                               |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0010101
 14999:   //FLOG2.W <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0010110
 15000:   //FABS.W <ea>,FPn                                 |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0011000
 15001:   //FCOSH.W <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0011001
 15002:   //FNEG.W <ea>,FPn                                 |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0011010
 15003:   //FACOS.W <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0011100
 15004:   //FCOS.W <ea>,FPn                                 |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0011101
 15005:   //FGETEXP.W <ea>,FPn                              |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0011110
 15006:   //FGETMAN.W <ea>,FPn                              |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0011111
 15007:   //FDIV.W <ea>,FPn                                 |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0100000
 15008:   //FMOD.W <ea>,FPn                                 |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0100001
 15009:   //FADD.W <ea>,FPn                                 |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0100010
 15010:   //FMUL.W <ea>,FPn                                 |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0100011
 15011:   //FSGLDIV.W <ea>,FPn                              |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0100100
 15012:   //FREM.W <ea>,FPn                                 |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0100101
 15013:   //FSCALE.W <ea>,FPn                               |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0100110
 15014:   //FSGLMUL.W <ea>,FPn                              |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0100111
 15015:   //FSUB.W <ea>,FPn                                 |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0101000
 15016:   //FCMP.W <ea>,FPn                                 |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0111000
 15017:   //FSMOVE.W <ea>,FPn                               |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn1000000
 15018:   //FSSQRT.W <ea>,FPn                               |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn1000001
 15019:   //FDMOVE.W <ea>,FPn                               |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn1000100
 15020:   //FDSQRT.W <ea>,FPn                               |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn1000101
 15021:   //FSABS.W <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn1011000
 15022:   //FSNEG.W <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn1011010
 15023:   //FDABS.W <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn1011100
 15024:   //FDNEG.W <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn1011110
 15025:   //FSDIV.W <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn1100000
 15026:   //FSADD.W <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn1100010
 15027:   //FSMUL.W <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn1100011
 15028:   //FDDIV.W <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn1100100
 15029:   //FDADD.W <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn1100110
 15030:   //FDMUL.W <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn1100111
 15031:   //FSSUB.W <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn1101000
 15032:   //FDSUB.W <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn1101100
 15033:   //FSINCOS.W <ea>,FPc:FPs                          |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100sss0110ccc
 15034:   //FTST.B <ea>                                     |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-0101100000111010
 15035:   //FMOVE.B <ea>,FPn                                |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0000000
 15036:   //FINT.B <ea>,FPn                                 |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0000001
 15037:   //FSINH.B <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0000010
 15038:   //FINTRZ.B <ea>,FPn                               |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0000011
 15039:   //FSQRT.B <ea>,FPn                                |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0000100
 15040:   //FLOGNP1.B <ea>,FPn                              |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0000110
 15041:   //FETOXM1.B <ea>,FPn                              |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0001000
 15042:   //FTANH.B <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0001001
 15043:   //FATAN.B <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0001010
 15044:   //FASIN.B <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0001100
 15045:   //FATANH.B <ea>,FPn                               |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0001101
 15046:   //FSIN.B <ea>,FPn                                 |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0001110
 15047:   //FTAN.B <ea>,FPn                                 |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0001111
 15048:   //FETOX.B <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0010000
 15049:   //FTWOTOX.B <ea>,FPn                              |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0010001
 15050:   //FTENTOX.B <ea>,FPn                              |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0010010
 15051:   //FLOGN.B <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0010100
 15052:   //FLOG10.B <ea>,FPn                               |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0010101
 15053:   //FLOG2.B <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0010110
 15054:   //FABS.B <ea>,FPn                                 |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0011000
 15055:   //FCOSH.B <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0011001
 15056:   //FNEG.B <ea>,FPn                                 |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0011010
 15057:   //FACOS.B <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0011100
 15058:   //FCOS.B <ea>,FPn                                 |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0011101
 15059:   //FGETEXP.B <ea>,FPn                              |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0011110
 15060:   //FGETMAN.B <ea>,FPn                              |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0011111
 15061:   //FDIV.B <ea>,FPn                                 |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0100000
 15062:   //FMOD.B <ea>,FPn                                 |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0100001
 15063:   //FADD.B <ea>,FPn                                 |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0100010
 15064:   //FMUL.B <ea>,FPn                                 |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0100011
 15065:   //FSGLDIV.B <ea>,FPn                              |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0100100
 15066:   //FREM.B <ea>,FPn                                 |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0100101
 15067:   //FSCALE.B <ea>,FPn                               |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0100110
 15068:   //FSGLMUL.B <ea>,FPn                              |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0100111
 15069:   //FSUB.B <ea>,FPn                                 |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0101000
 15070:   //FCMP.B <ea>,FPn                                 |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0111000
 15071:   //FSMOVE.B <ea>,FPn                               |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn1000000
 15072:   //FSSQRT.B <ea>,FPn                               |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn1000001
 15073:   //FDMOVE.B <ea>,FPn                               |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn1000100
 15074:   //FDSQRT.B <ea>,FPn                               |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn1000101
 15075:   //FSABS.B <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn1011000
 15076:   //FSNEG.B <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn1011010
 15077:   //FDABS.B <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn1011100
 15078:   //FDNEG.B <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn1011110
 15079:   //FSDIV.B <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn1100000
 15080:   //FSADD.B <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn1100010
 15081:   //FSMUL.B <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn1100011
 15082:   //FDDIV.B <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn1100100
 15083:   //FDADD.B <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn1100110
 15084:   //FDMUL.B <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn1100111
 15085:   //FSSUB.B <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn1101000
 15086:   //FDSUB.B <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn1101100
 15087:   //FSINCOS.B <ea>,FPc:FPs                          |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110sss0110ccc
 15088:   //FMOVE.L <ea>,FPIAR                              |-|--CC46|-|-----|-----|DAM+-WXZPI|1111_001_000_mmm_rrr-1000010000000000
 15089:   //FMOVEM.L <ea>,FPIAR                             |-|--CC46|-|-----|-----|DAM+-WXZPI|1111_001_000_mmm_rrr-1000010000000000
 15090:   //FMOVE.L <ea>,FPSR                               |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-1000100000000000
 15091:   //FMOVEM.L <ea>,FPSR                              |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-1000100000000000
 15092:   //FMOVE.L <ea>,FPCR                               |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-1001000000000000
 15093:   //FMOVEM.L <ea>,FPCR                              |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-1001000000000000
 15094:   //FMOVE.X FPn,<ea>                                |-|--CC46|-|-----|-----|  M+-WXZ  |1111_001_000_mmm_rrr-011010nnn0000000
 15095:   //FMOVE.P FPn,<ea>{#k}                            |-|--CCSS|-|-----|-----|  M+-WXZ  |1111_001_000_mmm_rrr-011011nnnkkkkkkk
 15096:   //FMOVE.D FPn,<ea>                                |-|--CC46|-|-----|-----|  M+-WXZ  |1111_001_000_mmm_rrr-011101nnn0000000
 15097:   //FMOVE.P FPn,<ea>{Dk}                            |-|--CCSS|-|-----|-----|  M+-WXZ  |1111_001_000_mmm_rrr-011111nnnkkk0000
 15098:   //FMOVEM.L FPSR/FPIAR,<ea>                        |-|--CC46|-|-----|-----|  M+-WXZ  |1111_001_000_mmm_rrr-1010110000000000
 15099:   //FMOVEM.L FPCR/FPIAR,<ea>                        |-|--CC46|-|-----|-----|  M+-WXZ  |1111_001_000_mmm_rrr-1011010000000000
 15100:   //FMOVEM.L FPCR/FPSR,<ea>                         |-|--CC46|-|-----|-----|  M+-WXZ  |1111_001_000_mmm_rrr-1011100000000000
 15101:   //FMOVEM.L FPCR/FPSR/FPIAR,<ea>                   |-|--CC46|-|-----|-----|  M+-WXZ  |1111_001_000_mmm_rrr-1011110000000000
 15102:   //FMOVEM.X #<data>,<ea>                           |-|--CC46|-|-----|-----|  M  WXZ  |1111_001_000_mmm_rrr-11110000dddddddd
 15103:   //FMOVEM.X <list>,<ea>                            |-|--CC46|-|-----|-----|  M  WXZ  |1111_001_000_mmm_rrr-11110000llllllll
 15104:   //FMOVEM.X Dl,<ea>                                |-|--CC4S|-|-----|-----|  M  WXZ  |1111_001_000_mmm_rrr-111110000lll0000
 15105:   //FMOVEM.L <ea>,FPSR/FPIAR                        |-|--CC46|-|-----|-----|  M+-WXZP |1111_001_000_mmm_rrr-1000110000000000
 15106:   //FMOVEM.L <ea>,FPCR/FPIAR                        |-|--CC46|-|-----|-----|  M+-WXZP |1111_001_000_mmm_rrr-1001010000000000
 15107:   //FMOVEM.L <ea>,FPCR/FPSR                         |-|--CC46|-|-----|-----|  M+-WXZP |1111_001_000_mmm_rrr-1001100000000000
 15108:   //FMOVEM.L <ea>,FPCR/FPSR/FPIAR                   |-|--CC46|-|-----|-----|  M+-WXZP |1111_001_000_mmm_rrr-1001110000000000
 15109:   //FMOVEM.X <ea>,#<data>                           |-|--CC46|-|-----|-----|  M+ WXZP |1111_001_000_mmm_rrr-11010000dddddddd
 15110:   //FMOVEM.X <ea>,<list>                            |-|--CC46|-|-----|-----|  M+ WXZP |1111_001_000_mmm_rrr-11010000llllllll
 15111:   //FMOVEM.X <ea>,Dl                                |-|--CC4S|-|-----|-----|  M+ WXZP |1111_001_000_mmm_rrr-110110000lll0000
 15112:   //FTST.X <ea>                                     |-|--CC46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-0100100000111010
 15113:   //FMOVE.X <ea>,FPn                                |-|--CC46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0000000
 15114:   //FINT.X <ea>,FPn                                 |-|--CCS6|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0000001
 15115:   //FSINH.X <ea>,FPn                                |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0000010
 15116:   //FINTRZ.X <ea>,FPn                               |-|--CCS6|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0000011
 15117:   //FSQRT.X <ea>,FPn                                |-|--CC46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0000100
 15118:   //FLOGNP1.X <ea>,FPn                              |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0000110
 15119:   //FETOXM1.X <ea>,FPn                              |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0001000
 15120:   //FTANH.X <ea>,FPn                                |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0001001
 15121:   //FATAN.X <ea>,FPn                                |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0001010
 15122:   //FASIN.X <ea>,FPn                                |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0001100
 15123:   //FATANH.X <ea>,FPn                               |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0001101
 15124:   //FSIN.X <ea>,FPn                                 |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0001110
 15125:   //FTAN.X <ea>,FPn                                 |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0001111
 15126:   //FETOX.X <ea>,FPn                                |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0010000
 15127:   //FTWOTOX.X <ea>,FPn                              |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0010001
 15128:   //FTENTOX.X <ea>,FPn                              |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0010010
 15129:   //FLOGN.X <ea>,FPn                                |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0010100
 15130:   //FLOG10.X <ea>,FPn                               |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0010101
 15131:   //FLOG2.X <ea>,FPn                                |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0010110
 15132:   //FABS.X <ea>,FPn                                 |-|--CC46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0011000
 15133:   //FCOSH.X <ea>,FPn                                |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0011001
 15134:   //FNEG.X <ea>,FPn                                 |-|--CC46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0011010
 15135:   //FACOS.X <ea>,FPn                                |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0011100
 15136:   //FCOS.X <ea>,FPn                                 |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0011101
 15137:   //FGETEXP.X <ea>,FPn                              |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0011110
 15138:   //FGETMAN.X <ea>,FPn                              |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0011111
 15139:   //FDIV.X <ea>,FPn                                 |-|--CC46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0100000
 15140:   //FMOD.X <ea>,FPn                                 |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0100001
 15141:   //FADD.X <ea>,FPn                                 |-|--CC46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0100010
 15142:   //FMUL.X <ea>,FPn                                 |-|--CC46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0100011
 15143:   //FSGLDIV.X <ea>,FPn                              |-|--CCS6|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0100100
 15144:   //FREM.X <ea>,FPn                                 |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0100101
 15145:   //FSCALE.X <ea>,FPn                               |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0100110
 15146:   //FSGLMUL.X <ea>,FPn                              |-|--CCS6|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0100111
 15147:   //FSUB.X <ea>,FPn                                 |-|--CC46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0101000
 15148:   //FCMP.X <ea>,FPn                                 |-|--CC46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0111000
 15149:   //FSMOVE.X <ea>,FPn                               |-|----46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn1000000
 15150:   //FSSQRT.X <ea>,FPn                               |-|----46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn1000001
 15151:   //FDMOVE.X <ea>,FPn                               |-|----46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn1000100
 15152:   //FDSQRT.X <ea>,FPn                               |-|----46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn1000101
 15153:   //FSABS.X <ea>,FPn                                |-|----46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn1011000
 15154:   //FSNEG.X <ea>,FPn                                |-|----46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn1011010
 15155:   //FDABS.X <ea>,FPn                                |-|----46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn1011100
 15156:   //FDNEG.X <ea>,FPn                                |-|----46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn1011110
 15157:   //FSDIV.X <ea>,FPn                                |-|----46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn1100000
 15158:   //FSADD.X <ea>,FPn                                |-|----46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn1100010
 15159:   //FSMUL.X <ea>,FPn                                |-|----46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn1100011
 15160:   //FDDIV.X <ea>,FPn                                |-|----46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn1100100
 15161:   //FDADD.X <ea>,FPn                                |-|----46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn1100110
 15162:   //FDMUL.X <ea>,FPn                                |-|----46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn1100111
 15163:   //FSSUB.X <ea>,FPn                                |-|----46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn1101000
 15164:   //FDSUB.X <ea>,FPn                                |-|----46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn1101100
 15165:   //FSINCOS.X <ea>,FPc:FPs                          |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010sss0110ccc
 15166:   //FTST.P <ea>                                     |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-0100110000111010
 15167:   //FMOVE.P <ea>,FPn                                |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0000000
 15168:   //FINT.P <ea>,FPn                                 |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0000001
 15169:   //FSINH.P <ea>,FPn                                |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0000010
 15170:   //FINTRZ.P <ea>,FPn                               |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0000011
 15171:   //FSQRT.P <ea>,FPn                                |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0000100
 15172:   //FLOGNP1.P <ea>,FPn                              |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0000110
 15173:   //FETOXM1.P <ea>,FPn                              |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0001000
 15174:   //FTANH.P <ea>,FPn                                |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0001001
 15175:   //FATAN.P <ea>,FPn                                |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0001010
 15176:   //FASIN.P <ea>,FPn                                |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0001100
 15177:   //FATANH.P <ea>,FPn                               |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0001101
 15178:   //FSIN.P <ea>,FPn                                 |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0001110
 15179:   //FTAN.P <ea>,FPn                                 |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0001111
 15180:   //FETOX.P <ea>,FPn                                |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0010000
 15181:   //FTWOTOX.P <ea>,FPn                              |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0010001
 15182:   //FTENTOX.P <ea>,FPn                              |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0010010
 15183:   //FLOGN.P <ea>,FPn                                |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0010100
 15184:   //FLOG10.P <ea>,FPn                               |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0010101
 15185:   //FLOG2.P <ea>,FPn                                |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0010110
 15186:   //FABS.P <ea>,FPn                                 |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0011000
 15187:   //FCOSH.P <ea>,FPn                                |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0011001
 15188:   //FNEG.P <ea>,FPn                                 |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0011010
 15189:   //FACOS.P <ea>,FPn                                |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0011100
 15190:   //FCOS.P <ea>,FPn                                 |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0011101
 15191:   //FGETEXP.P <ea>,FPn                              |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0011110
 15192:   //FGETMAN.P <ea>,FPn                              |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0011111
 15193:   //FDIV.P <ea>,FPn                                 |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0100000
 15194:   //FMOD.P <ea>,FPn                                 |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0100001
 15195:   //FADD.P <ea>,FPn                                 |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0100010
 15196:   //FMUL.P <ea>,FPn                                 |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0100011
 15197:   //FSGLDIV.P <ea>,FPn                              |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0100100
 15198:   //FREM.P <ea>,FPn                                 |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0100101
 15199:   //FSCALE.P <ea>,FPn                               |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0100110
 15200:   //FSGLMUL.P <ea>,FPn                              |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0100111
 15201:   //FSUB.P <ea>,FPn                                 |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0101000
 15202:   //FCMP.P <ea>,FPn                                 |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0111000
 15203:   //FSMOVE.P <ea>,FPn                               |-|----SS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn1000000
 15204:   //FSSQRT.P <ea>,FPn                               |-|----SS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn1000001
 15205:   //FDMOVE.P <ea>,FPn                               |-|----SS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn1000100
 15206:   //FDSQRT.P <ea>,FPn                               |-|----SS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn1000101
 15207:   //FSABS.P <ea>,FPn                                |-|----SS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn1011000
 15208:   //FSNEG.P <ea>,FPn                                |-|----SS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn1011010
 15209:   //FDABS.P <ea>,FPn                                |-|----SS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn1011100
 15210:   //FDNEG.P <ea>,FPn                                |-|----SS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn1011110
 15211:   //FSDIV.P <ea>,FPn                                |-|----SS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn1100000
 15212:   //FSADD.P <ea>,FPn                                |-|----SS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn1100010
 15213:   //FSMUL.P <ea>,FPn                                |-|----SS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn1100011
 15214:   //FDDIV.P <ea>,FPn                                |-|----SS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn1100100
 15215:   //FDADD.P <ea>,FPn                                |-|----SS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn1100110
 15216:   //FDMUL.P <ea>,FPn                                |-|----SS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn1100111
 15217:   //FSSUB.P <ea>,FPn                                |-|----SS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn1101000
 15218:   //FDSUB.P <ea>,FPn                                |-|----SS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn1101100
 15219:   //FSINCOS.P <ea>,FPc:FPs                          |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011sss0110ccc
 15220:   //FTST.D <ea>                                     |-|--CC46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-0101010000111010
 15221:   //FMOVE.D <ea>,FPn                                |-|--CC46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0000000
 15222:   //FINT.D <ea>,FPn                                 |-|--CCS6|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0000001
 15223:   //FSINH.D <ea>,FPn                                |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0000010
 15224:   //FINTRZ.D <ea>,FPn                               |-|--CCS6|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0000011
 15225:   //FSQRT.D <ea>,FPn                                |-|--CC46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0000100
 15226:   //FLOGNP1.D <ea>,FPn                              |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0000110
 15227:   //FETOXM1.D <ea>,FPn                              |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0001000
 15228:   //FTANH.D <ea>,FPn                                |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0001001
 15229:   //FATAN.D <ea>,FPn                                |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0001010
 15230:   //FASIN.D <ea>,FPn                                |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0001100
 15231:   //FATANH.D <ea>,FPn                               |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0001101
 15232:   //FSIN.D <ea>,FPn                                 |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0001110
 15233:   //FTAN.D <ea>,FPn                                 |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0001111
 15234:   //FETOX.D <ea>,FPn                                |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0010000
 15235:   //FTWOTOX.D <ea>,FPn                              |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0010001
 15236:   //FTENTOX.D <ea>,FPn                              |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0010010
 15237:   //FLOGN.D <ea>,FPn                                |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0010100
 15238:   //FLOG10.D <ea>,FPn                               |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0010101
 15239:   //FLOG2.D <ea>,FPn                                |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0010110
 15240:   //FABS.D <ea>,FPn                                 |-|--CC46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0011000
 15241:   //FCOSH.D <ea>,FPn                                |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0011001
 15242:   //FNEG.D <ea>,FPn                                 |-|--CC46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0011010
 15243:   //FACOS.D <ea>,FPn                                |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0011100
 15244:   //FCOS.D <ea>,FPn                                 |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0011101
 15245:   //FGETEXP.D <ea>,FPn                              |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0011110
 15246:   //FGETMAN.D <ea>,FPn                              |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0011111
 15247:   //FDIV.D <ea>,FPn                                 |-|--CC46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0100000
 15248:   //FMOD.D <ea>,FPn                                 |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0100001
 15249:   //FADD.D <ea>,FPn                                 |-|--CC46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0100010
 15250:   //FMUL.D <ea>,FPn                                 |-|--CC46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0100011
 15251:   //FSGLDIV.D <ea>,FPn                              |-|--CCS6|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0100100
 15252:   //FREM.D <ea>,FPn                                 |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0100101
 15253:   //FSCALE.D <ea>,FPn                               |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0100110
 15254:   //FSGLMUL.D <ea>,FPn                              |-|--CCS6|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0100111
 15255:   //FSUB.D <ea>,FPn                                 |-|--CC46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0101000
 15256:   //FCMP.D <ea>,FPn                                 |-|--CC46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0111000
 15257:   //FSMOVE.D <ea>,FPn                               |-|----46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn1000000
 15258:   //FSSQRT.D <ea>,FPn                               |-|----46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn1000001
 15259:   //FDMOVE.D <ea>,FPn                               |-|----46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn1000100
 15260:   //FDSQRT.D <ea>,FPn                               |-|----46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn1000101
 15261:   //FSABS.D <ea>,FPn                                |-|----46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn1011000
 15262:   //FSNEG.D <ea>,FPn                                |-|----46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn1011010
 15263:   //FDABS.D <ea>,FPn                                |-|----46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn1011100
 15264:   //FDNEG.D <ea>,FPn                                |-|----46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn1011110
 15265:   //FSDIV.D <ea>,FPn                                |-|----46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn1100000
 15266:   //FSADD.D <ea>,FPn                                |-|----46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn1100010
 15267:   //FSMUL.D <ea>,FPn                                |-|----46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn1100011
 15268:   //FDDIV.D <ea>,FPn                                |-|----46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn1100100
 15269:   //FDADD.D <ea>,FPn                                |-|----46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn1100110
 15270:   //FDMUL.D <ea>,FPn                                |-|----46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn1100111
 15271:   //FSSUB.D <ea>,FPn                                |-|----46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn1101000
 15272:   //FDSUB.D <ea>,FPn                                |-|----46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn1101100
 15273:   //FSINCOS.D <ea>,FPc:FPs                          |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101sss0110ccc
 15274:   //FMOVEM.X #<data>,-(Ar)                          |-|--CC46|-|-----|-----|    -     |1111_001_000_100_rrr-11100000dddddddd
 15275:   //FMOVEM.X <list>,-(Ar)                           |-|--CC46|-|-----|-----|    -     |1111_001_000_100_rrr-11100000llllllll
 15276:   //FMOVEM.X Dl,-(Ar)                               |-|--CC4S|-|-----|-----|    -     |1111_001_000_100_rrr-111010000lll0000
 15277:   //FMOVEM.L #<data>,#<data>,FPSR/FPIAR             |-|--CC4S|-|-----|-----|         I|1111_001_000_111_100-1000110000000000-{data}
 15278:   //FMOVEM.L #<data>,#<data>,FPCR/FPIAR             |-|--CC4S|-|-----|-----|         I|1111_001_000_111_100-1001010000000000-{data}
 15279:   //FMOVEM.L #<data>,#<data>,FPCR/FPSR              |-|--CC4S|-|-----|-----|         I|1111_001_000_111_100-1001100000000000-{data}
 15280:   //FMOVEM.L #<data>,#<data>,#<data>,FPCR/FPSR/FPIAR|-|--CC4S|-|-----|-----|         I|1111_001_000_111_100-1001110000000000-{data}
 15281:   @SuppressWarnings ("fallthrough") public static void irpFgen () throws M68kException {
 15282:   fgen: {
 15283:     if (XEiJ.currentMPU == Model.MPU_MC68LC060) {
 15284:       irpFline ();
 15285:       break fgen;
 15286:     }
 15287:     XEiJ.mpuCycleCount++;
 15288:     int ea = XEiJ.regOC & 63;
 15289:     int a = XEiJ.regPC;
 15290:     XEiJ.regPC = a + 2;
 15291:     int w = mmuReadWordZeroExword (a, XEiJ.regSRS);  //pcwz。拡張ワード
 15292:     int m = w >> 10 & 7;
 15293:     int n = w >> 7 & 7;
 15294:     int c = w & 0x7f;
 15295:     XEiJ.fpuBox.epbSetRoundingPrec (XEiJ.fpuBox.epbFpcr >> 6 & 3);  //丸め桁数
 15296:     XEiJ.fpuBox.epbSetRoundingMode (XEiJ.fpuBox.epbFpcr >> 4 & 3);  //丸めモード
 15297:     a = 0;  //実効アドレス
 15298:     //XEiJ.fpuBox.epbExceptionStatusWord = 0;
 15299: 
 15300: 
 15301:     switch (w >> 13) {
 15302: 
 15303: 
 15304:     case 0b010:  //$4xxx-$5xxx: Fop.* <ea>,FPn
 15305:       XEiJ.fpuBox.epbFpsr &= 0x00ff00ff;
 15306:       XEiJ.fpuBox.epbFpiar = XEiJ.regPC0;  //FPIARはFMOVEM/FMOVE FPcr/FSAVE/FRESTORE以外の命令で例外が発生しなくても更新される
 15307: 
 15308:       switch (m) {
 15309: 
 15310:       case 0b000:  //$40xx-$43xx: Fop.L <ea>,FPn
 15311:         {
 15312:           XEiJ.mpuCycleCount += 3;
 15313:           int i;
 15314:           if (ea < XEiJ.EA_AR) {  //Dr
 15315:             XEiJ.mpuCycleCount += 2;
 15316:             //a = 0;
 15317:             i = XEiJ.regRn[ea];
 15318:           } else if (ea == XEiJ.EA_IM) {  //#<data>
 15319:             a = XEiJ.regPC;
 15320:             XEiJ.regPC = a + 4;
 15321:             i = mmuReadLongExword (a, XEiJ.regSRS);  //pcls
 15322:           } else {  //Dr,#<data>以外
 15323:             a = efaAnyLong (ea);
 15324:             i = mmuReadLongData (a, XEiJ.regSRS);
 15325:           }
 15326:           XEiJ.fpuFPn[m = EFPBox.EPB_SRC_TMP].seti (i);
 15327:         }
 15328:         break;
 15329: 
 15330:       case 0b001:  //$44xx-$47xx: Fop.S <ea>,FPn
 15331:         {
 15332:           int i;
 15333:           if (ea < XEiJ.EA_AR) {  //Dr
 15334:             XEiJ.mpuCycleCount += 2;
 15335:             //a = 0;
 15336:             i = XEiJ.regRn[ea];
 15337:           } else if (ea == XEiJ.EA_IM) {  //#<data>
 15338:             a = XEiJ.regPC;
 15339:             XEiJ.regPC = a + 4;
 15340:             i = mmuReadLongExword (a, XEiJ.regSRS);  //pcls
 15341:           } else {  //Dr,#<data>以外
 15342:             a = efaAnyLong (ea);
 15343:             i = mmuReadLongData (a, XEiJ.regSRS);
 15344:           }
 15345:           XEiJ.fpuFPn[m = EFPBox.EPB_SRC_TMP].setf0 (i);
 15346:         }
 15347:         break;
 15348: 
 15349:       case 0b010:  //$48xx-$4Bxx: Fop.X <ea>,FPn
 15350:         {
 15351:           int i;
 15352:           long l;
 15353:           if (ea == XEiJ.EA_IM) {  //#<data>
 15354:             if (!XEiJ.fpuBox.epbIsFullSpec ()) {  //12バイトのイミディエイト
 15355:               irpExceptionFormat0 (M68kException.M6E_UNIMPLEMENTED_EFFECTIVE << 2, XEiJ.regPC0);  //pcは命令の先頭
 15356:               break fgen;
 15357:             }
 15358:             a = XEiJ.regPC;
 15359:             XEiJ.regPC = a + 12;
 15360:             i = mmuReadLongExword (a, XEiJ.regSRS);
 15361:             l = mmuReadQuadExword (a + 4, XEiJ.regSRS);
 15362:           } else {  //#<data>以外
 15363:             a = efaAnyExtd (ea);
 15364:             i = mmuReadLongData (a, XEiJ.regSRS);
 15365:             l = mmuReadQuadSecond (a + 4, XEiJ.regSRS);
 15366:           }
 15367:           if (XEiJ.fpuBox.epbIsTriple ()) {  //三倍精度
 15368:             XEiJ.fpuFPn[m = EFPBox.EPB_SRC_TMP].sety012 (i, l);
 15369:           } else {  //拡張精度
 15370:             XEiJ.fpuFPn[m = EFPBox.EPB_SRC_TMP].setx012 (i, l);
 15371:           }
 15372:         }
 15373:         break;
 15374: 
 15375:       case 0b011:  //$4Cxx-$4Fxx: Fop.P <ea>,FPn
 15376:         {
 15377:           int i;
 15378:           long l;
 15379:           if (ea == XEiJ.EA_IM) {  //#<data>
 15380:             if (!XEiJ.fpuBox.epbIsFullSpec ()) {  //12バイトのイミディエイト
 15381:               irpExceptionFormat0 (M68kException.M6E_UNIMPLEMENTED_EFFECTIVE << 2, XEiJ.regPC0);  //pcは命令の先頭
 15382:               break fgen;
 15383:             }
 15384:             a = XEiJ.regPC;
 15385:             XEiJ.regPC = a + 12;
 15386:             i = mmuReadLongExword (a, XEiJ.regSRS);
 15387:             l = mmuReadQuadExword (a + 4, XEiJ.regSRS);
 15388:           } else {  //#<data>以外
 15389:             a = efaAnyExtd (ea);
 15390:             i = mmuReadLongData (a, XEiJ.regSRS);
 15391:             l = mmuReadQuadSecond (a + 4, XEiJ.regSRS);
 15392:           }
 15393:           if (!XEiJ.fpuBox.epbIsFullSpec ()) {  //パックトデシマル
 15394:             XEiJ.fpuBox.epbExceptionStatusWord = 0xe000 | M68kException.M6E_FP_UNSUPPORTED_DATA_TYPE & 7;
 15395:             irpExceptionFormat2 (M68kException.M6E_FP_UNSUPPORTED_DATA_TYPE << 2, XEiJ.regPC, a);  //pcは次の命令,アドレスはソースオペランド
 15396:             break fgen;
 15397:           }
 15398:           XEiJ.fpuFPn[m = EFPBox.EPB_SRC_TMP].setp012 (i, l);
 15399:         }
 15400:         break;
 15401: 
 15402:       case 0b100:  //$50xx-$53xx: Fop.W <ea>,FPn
 15403:         {
 15404:           XEiJ.mpuCycleCount += 3;
 15405:           int i;
 15406:           if (ea < XEiJ.EA_AR) {  //Dr
 15407:             XEiJ.mpuCycleCount += 2;
 15408:             //a = 0;
 15409:             i = (short) XEiJ.regRn[ea];
 15410:           } else if (ea == XEiJ.EA_IM) {  //#<data>
 15411:             a = XEiJ.regPC;
 15412:             XEiJ.regPC = a + 2;
 15413:             i = mmuReadWordSignExword (a, XEiJ.regSRS);  //pcws
 15414:           } else {  //Dr,#<data>以外
 15415:             a = efaAnyWord (ea);
 15416:             i = mmuReadWordSignData (a, XEiJ.regSRS);
 15417:           }
 15418:           XEiJ.fpuFPn[m = EFPBox.EPB_SRC_TMP].seti (i);
 15419:         }
 15420:         break;
 15421: 
 15422:       case 0b101:  //$54xx-$57xx: Fop.D <ea>,FPn
 15423:         {
 15424:           long l;
 15425:           if (ea == XEiJ.EA_IM) {  //#<data>
 15426:             a = XEiJ.regPC;
 15427:             XEiJ.regPC = a + 8;
 15428:             l = mmuReadQuadExword (a, XEiJ.regSRS);
 15429:           } else {  //#<data>以外
 15430:             a = efaAnyQuad (ea);
 15431:             l = mmuReadQuadData (a, XEiJ.regSRS);
 15432:           }
 15433:           XEiJ.fpuFPn[m = EFPBox.EPB_SRC_TMP].setd01 (l);
 15434:         }
 15435:         break;
 15436: 
 15437:       case 0b110:  //$58xx-$5Bxx: Fop.B <ea>,FPn
 15438:         {
 15439:           XEiJ.mpuCycleCount += 3;
 15440:           int i;
 15441:           if (ea < XEiJ.EA_AR) {  //Dr
 15442:             XEiJ.mpuCycleCount += 2;
 15443:             //a = 0;
 15444:             i = (byte) XEiJ.regRn[ea];
 15445:           } else if (ea == XEiJ.EA_IM) {  //#<data>
 15446:             a = XEiJ.regPC;
 15447:             XEiJ.regPC = a + 2;
 15448:             i = mmuReadByteSignExword (a + 1, XEiJ.regSRS);  //pcbs
 15449:           } else {  //Dr,#<data>以外
 15450:             a = efaAnyByte (ea);
 15451:             i = mmuReadByteSignData (a, XEiJ.regSRS);
 15452:           }
 15453:           XEiJ.fpuFPn[m = EFPBox.EPB_SRC_TMP].seti (i);
 15454:         }
 15455:         break;
 15456: 
 15457:       case 0b111:  //$5Cxx-$5Fxx: FMOVECR.X #ccc,FPn
 15458:       default:
 15459:         if (!XEiJ.fpuBox.epbIsFullSpec ()) {
 15460:           irpExceptionFormat2 (M68kException.M6E_FP_UNIMPLEMENTED_INSTRUCTION << 2, XEiJ.regPC, M68kException.M6E_FP_UNIMPLEMENTED_INSTRUCTION << 2);  //pcは次の命令,アドレスはベクタオフセット
 15461:           break fgen;
 15462:         }
 15463:         if (0x40 <= c) {
 15464:           //マニュアルにはFMOVECRの命令フォーマットのROMオフセットが7bitあるように書かれているが実際は6bit
 15465:           //MC68882で0x40以上を指定すると命令実行前例外のF-Line Emulator(レスポンス$1C0B)が返る
 15466:           XEiJ.regPC = XEiJ.regPC0 + 2;  //拡張ワードを読まなかったことにする
 15467:           irpFline ();
 15468:           break fgen;
 15469:         }
 15470:         if (false) {
 15471:           m = EFPBox.EPB_CONST_START + c;  //定数
 15472:           c = 0;  //FMOVE
 15473:         } else {
 15474:           //FMOVECR
 15475:           XEiJ.fpuBox.epbFmovecr (XEiJ.fpuFPn[n], c);
 15476:           //FPSRのAEXCを設定する
 15477:           XEiJ.fpuBox.epbFpsr |= XEiJ.FPU_FPSR_EXC_TO_AEXC[XEiJ.fpuBox.epbFpsr >> 8 & 255];
 15478:           //浮動小数点命令実行後例外 floating-point post-instruction exception
 15479:           if (irpFPPostInstruction (a)) {
 15480:             break fgen;
 15481:           }
 15482:           break fgen;
 15483:         }
 15484: 
 15485:       }
 15486:       //浮動小数点命令実行前例外 floating-point pre-instruction exception
 15487:       if (irpFPPreInstruction ()) {
 15488:         break fgen;
 15489:       }
 15490:       //Fop.X <ea>,FPn → Fop.X FP[EFPBox.EPB_SRC_TMP],FPn
 15491:       //FMOVECR.X #ccc,FPn → FMOVE.X FPc,FPn
 15492: 
 15493: 
 15494:       //fallthrough
 15495:     case 0b000:  //$0xxx-$1xxx: Fop.X FPm,FPn
 15496:       if (w >> 13 == 0) {
 15497:         XEiJ.fpuBox.epbFpsr &= 0x00ff00ff;
 15498:       }
 15499:       //Fop.* <ea>,FPnのときFPIARは設定済み
 15500:       XEiJ.fpuBox.epbFpiar = XEiJ.regPC0;  //FPIARはFMOVEM/FMOVE FPcr/FSAVE/FRESTORE以外の命令で例外が発生しなくても更新される
 15501: 
 15502:       switch (c) {
 15503: 
 15504:       case 0b000_0000:  //$xx00: FMOVE.* *m,FPn
 15505:         //  BSUN   常にクリア
 15506:         //  SNAN   引数がシグナリングNaNのときセット、それ以外はクリア
 15507:         //  OPERR  常にクリア
 15508:         //  OVFL   常にクリア
 15509:         //  UNFL   結果が非正規化数のときセット、それ以外はクリア
 15510:         //  DZ     常にクリア
 15511:         //  INEX2  結果に誤差があるときセット、それ以外はクリア
 15512:         //  INEX1  引数がpackedで正確に変換できないときセット、それ以外はクリア
 15513:         XEiJ.fpuFPn[n].sete (XEiJ.fpuFPn[m]).finish ();
 15514:         break;
 15515: 
 15516:       case 0b000_0001:  //$xx01: FINT.* *m,FPn
 15517:         //  BSUN   常にクリア
 15518:         //  SNAN   引数がシグナリングNaNのときセット、それ以外はクリア
 15519:         //  OPERR  常にクリア
 15520:         //  OVFL   常にクリア
 15521:         //         正規化数の最大値は整数なので丸めても大きくなることはない
 15522:         //  UNFL   常にクリア
 15523:         //         結果は整数なので非正規化数にはならない
 15524:         //  DZ     常にクリア
 15525:         //  INEX2  結果に誤差があるときセット、それ以外はクリア
 15526:         //  INEX1  引数がpackedで正確に変換できないときセット、それ以外はクリア
 15527:         XEiJ.mpuCycleCount += 2;
 15528:         //  FINTはsingleとdoubleの丸め処理を行わない
 15529:         XEiJ.fpuBox.epbSetRoundingPrec (EFPBox.EPB_PREC_EXD);
 15530:         XEiJ.fpuFPn[n].round (XEiJ.fpuFPn[m], XEiJ.fpuBox.epbRoundingMode);
 15531:         break;
 15532: 
 15533:       case 0b000_0010:  //$xx02: FSINH.* *m,FPn
 15534:         //  BSUN   常にクリア
 15535:         //  SNAN   引数がシグナリングNaNのときセット、それ以外はクリア
 15536:         //  OPERR  常にクリア
 15537:         //  OVFL   オーバーフローしたときセット、それ以外はクリア
 15538:         //  UNFL   結果が非正規化数のときセット、それ以外はクリア
 15539:         //  DZ     常にクリア
 15540:         //  INEX2  結果に誤差があるときセット、それ以外はクリア
 15541:         //  INEX1  引数がpackedで正確に変換できないときセット、それ以外はクリア
 15542:         if (!XEiJ.fpuBox.epbIsFullSpec ()) {
 15543:           irpExceptionFormat2 (M68kException.M6E_FP_UNIMPLEMENTED_INSTRUCTION << 2, XEiJ.regPC, a);  //pcは次の命令,アドレスは実効アドレス
 15544:           break fgen;
 15545:         }
 15546:         XEiJ.fpuFPn[n].sinh (XEiJ.fpuFPn[m]);
 15547:         break;
 15548: 
 15549:       case 0b000_0011:  //$xx03: FINTRZ.* *m,FPn
 15550:         //  BSUN   常にクリア
 15551:         //  SNAN   引数がシグナリングNaNのときセット、それ以外はクリア
 15552:         //  OPERR  常にクリア
 15553:         //  OVFL   常にクリア
 15554:         //  UNFL   常にクリア
 15555:         //         結果は整数なので非正規化数にはならない
 15556:         //  DZ     常にクリア
 15557:         //  INEX2  結果に誤差があるときセット、それ以外はクリア
 15558:         //  INEX1  引数がpackedで正確に変換できないときセット、それ以外はクリア
 15559:         XEiJ.mpuCycleCount += 2;
 15560:         //  FINTRZはsingleとdoubleの丸め処理を行わない
 15561:         XEiJ.fpuBox.epbSetRoundingPrec (EFPBox.EPB_PREC_EXD);
 15562:         XEiJ.fpuFPn[n].trunc (XEiJ.fpuFPn[m]);
 15563:         break;
 15564: 
 15565:       case 0b000_0100:  //$xx04: FSQRT.* *m,FPn
 15566:       case 0b000_0101:  //$xx05: FSQRT.* *m,FPn (MC68882)
 15567:         //  BSUN   常にクリア
 15568:         //  SNAN   引数がシグナリングNaNのときセット、それ以外はクリア
 15569:         //  OPERR  引数が-0を除く負数のときセット、それ以外はクリア
 15570:         //  OVFL   常にクリア
 15571:         //         1よりも大きい数は小さくなるので溢れることはない
 15572:         //  UNFL   常にクリア
 15573:         //         非正規化数の平方根は正規化数なので結果が非正規化数になることはない
 15574:         //  DZ     常にクリア
 15575:         //  INEX2  結果に誤差があるときセット、それ以外はクリア
 15576:         //  INEX1  引数がpackedで正確に変換できないときセット、それ以外はクリア
 15577:         XEiJ.mpuCycleCount += 67;
 15578:         XEiJ.fpuFPn[n].sqrt (XEiJ.fpuFPn[m]);
 15579:         break;
 15580: 
 15581:       case 0b000_0110:  //$xx06: FLOGNP1.* *m,FPn
 15582:       case 0b000_0111:  //$xx07: FLOGNP1.* *m,FPn (MC68882)
 15583:         //  BSUN   常にクリア
 15584:         //  SNAN   引数がシグナリングNaNのときセット、それ以外はクリア
 15585:         //  OPERR  引数が-1よりも小さいときセット、それ以外はクリア
 15586:         //  OVFL   常にクリア
 15587:         //         log(1+0)=0,log(1+x)<=xなので結果が引数よりも大きくなることはない
 15588:         //  UNFL   結果が非正規化数のときセット、それ以外はクリア
 15589:         //  DZ     引数が-1のときセット、それ以外はクリア
 15590:         //  INEX2  結果に誤差があるときセット、それ以外はクリア
 15591:         //  INEX1  引数がpackedで正確に変換できないときセット、それ以外はクリア
 15592:         if (!XEiJ.fpuBox.epbIsFullSpec ()) {
 15593:           irpExceptionFormat2 (M68kException.M6E_FP_UNIMPLEMENTED_INSTRUCTION << 2, XEiJ.regPC, a);  //pcは次の命令,アドレスは実効アドレス
 15594:           break fgen;
 15595:         }
 15596:         XEiJ.fpuFPn[n].log1p (XEiJ.fpuFPn[m]);
 15597:         break;
 15598: 
 15599:       case 0b000_1000:  //$xx08: FETOXM1.* *m,FPn
 15600:         //  BSUN   常にクリア
 15601:         //  SNAN   引数がシグナリングNaNのときセット、それ以外はクリア
 15602:         //  OPERR  常にクリア
 15603:         //  OVFL   オーバーフローしたときセット、それ以外はクリア
 15604:         //  UNFL   結果が非正規化数のときセット、それ以外はクリア
 15605:         //  DZ     常にクリア
 15606:         //  INEX2  結果に誤差があるときセット、それ以外はクリア
 15607:         //  INEX1  引数がpackedで正確に変換できないときセット、それ以外はクリア
 15608:         if (!XEiJ.fpuBox.epbIsFullSpec ()) {
 15609:           irpExceptionFormat2 (M68kException.M6E_FP_UNIMPLEMENTED_INSTRUCTION << 2, XEiJ.regPC, a);  //pcは次の命令,アドレスは実効アドレス
 15610:           break fgen;
 15611:         }
 15612:         XEiJ.fpuFPn[n].expm1 (XEiJ.fpuFPn[m]);
 15613:         break;
 15614: 
 15615:       case 0b000_1001:  //$xx09: FTANH.* *m,FPn
 15616:         //  BSUN   常にクリア
 15617:         //  SNAN   引数がシグナリングNaNのときセット、それ以外はクリア
 15618:         //  OPERR  常にクリア
 15619:         //  OVFL   常にクリア
 15620:         //  UNFL   結果が非正規化数のときセット、それ以外はクリア
 15621:         //  DZ     常にクリア
 15622:         //  INEX2  結果に誤差があるときセット、それ以外はクリア
 15623:         //  INEX1  引数がpackedで正確に変換できないときセット、それ以外はクリア
 15624:         if (!XEiJ.fpuBox.epbIsFullSpec ()) {
 15625:           irpExceptionFormat2 (M68kException.M6E_FP_UNIMPLEMENTED_INSTRUCTION << 2, XEiJ.regPC, a);  //pcは次の命令,アドレスは実効アドレス
 15626:           break fgen;
 15627:         }
 15628:         XEiJ.fpuFPn[n].tanh (XEiJ.fpuFPn[m]);
 15629:         break;
 15630: 
 15631:       case 0b000_1010:  //$xx0A: FATAN.* *m,FPn
 15632:       case 0b000_1011:  //$xx0B: FATAN.* *m,FPn (MC68882)
 15633:         //  BSUN   常にクリア
 15634:         //  SNAN   引数がシグナリングNaNのときセット、それ以外はクリア
 15635:         //  OPERR  常にクリア
 15636:         //  OVFL   常にクリア
 15637:         //  UNFL   結果が非正規化数のときセット、それ以外はクリア
 15638:         //  DZ     常にクリア
 15639:         //  INEX2  結果に誤差があるときセット、それ以外はクリア
 15640:         //  INEX1  引数がpackedで正確に変換できないときセット、それ以外はクリア
 15641:         if (!XEiJ.fpuBox.epbIsFullSpec ()) {
 15642:           irpExceptionFormat2 (M68kException.M6E_FP_UNIMPLEMENTED_INSTRUCTION << 2, XEiJ.regPC, a);  //pcは次の命令,アドレスは実効アドレス
 15643:           break fgen;
 15644:         }
 15645:         XEiJ.fpuFPn[n].atan (XEiJ.fpuFPn[m]);
 15646:         break;
 15647: 
 15648:       case 0b000_1100:  //$xx0C: FASIN.* *m,FPn
 15649:         //  BSUN   常にクリア
 15650:         //  SNAN   引数がシグナリングNaNのときセット、それ以外はクリア
 15651:         //  OPERR  引数の絶対値が1よりも大きいときセット、それ以外はクリア
 15652:         //  OVFL   常にクリア
 15653:         //  UNFL   結果が非正規化数のときセット、それ以外はクリア
 15654:         //  DZ     常にクリア
 15655:         //  INEX2  結果に誤差があるときセット、それ以外はクリア
 15656:         //  INEX1  引数がpackedで正確に変換できないときセット、それ以外はクリア
 15657:         if (!XEiJ.fpuBox.epbIsFullSpec ()) {
 15658:           irpExceptionFormat2 (M68kException.M6E_FP_UNIMPLEMENTED_INSTRUCTION << 2, XEiJ.regPC, a);  //pcは次の命令,アドレスは実効アドレス
 15659:           break fgen;
 15660:         }
 15661:         XEiJ.fpuFPn[n].asin (XEiJ.fpuFPn[m]);
 15662:         break;
 15663: 
 15664:       case 0b000_1101:  //$xx0D: FATANH.* *m,FPn
 15665:         //  BSUN   常にクリア
 15666:         //  SNAN   引数がシグナリングNaNのときセット、それ以外はクリア
 15667:         //  OPERR  引数の絶対値が1よりも大きいときセット、それ以外はクリア
 15668:         //  OVFL   常にクリア
 15669:         //         1のとき無限大なのだから1の近くでオーバーフローしそうに思えるがatanh(1-2^-80)≒28.07くらい
 15670:         //  UNFL   結果が非正規化数のときセット、それ以外はクリア
 15671:         //  DZ     引数の絶対値が1のときセット、それ以外はクリア
 15672:         //  INEX2  結果に誤差があるときセット、それ以外はクリア
 15673:         //  INEX1  引数がpackedで正確に変換できないときセット、それ以外はクリア
 15674:         if (!XEiJ.fpuBox.epbIsFullSpec ()) {
 15675:           irpExceptionFormat2 (M68kException.M6E_FP_UNIMPLEMENTED_INSTRUCTION << 2, XEiJ.regPC, a);  //pcは次の命令,アドレスは実効アドレス
 15676:           break fgen;
 15677:         }
 15678:         XEiJ.fpuFPn[n].atanh (XEiJ.fpuFPn[m]);
 15679:         break;
 15680: 
 15681:       case 0b000_1110:  //$xx0E: FSIN.* *m,FPn
 15682:         //  BSUN   常にクリア
 15683:         //  SNAN   引数がシグナリングNaNのときセット、それ以外はクリア
 15684:         //  OPERR  引数が無限大のときセット、それ以外はクリア
 15685:         //  OVFL   常にクリア
 15686:         //  UNFL   結果が非正規化数のときセット、それ以外はクリア
 15687:         //  DZ     常にクリア
 15688:         //  INEX2  結果に誤差があるときセット、それ以外はクリア
 15689:         //  INEX1  引数がpackedで正確に変換できないときセット、それ以外はクリア
 15690:         if (!XEiJ.fpuBox.epbIsFullSpec ()) {
 15691:           irpExceptionFormat2 (M68kException.M6E_FP_UNIMPLEMENTED_INSTRUCTION << 2, XEiJ.regPC, a);  //pcは次の命令,アドレスは実効アドレス
 15692:           break fgen;
 15693:         }
 15694:         XEiJ.fpuFPn[n].sin (XEiJ.fpuFPn[m]);
 15695:         break;
 15696: 
 15697:       case 0b000_1111:  //$xx0F: FTAN.* *m,FPn
 15698:         //  BSUN   常にクリア
 15699:         //  SNAN   引数がシグナリングNaNのときセット、それ以外はクリア
 15700:         //  OPERR  引数が無限大のときセット、それ以外はクリア
 15701:         //  OVFL   オーバーフローしたときセット、それ以外はクリア
 15702:         //  UNFL   結果が非正規化数のときセット、それ以外はクリア
 15703:         //  DZ     常にクリア
 15704:         //         cos(x)=0を満たすxは正確に表現できないのだからsin(x)/cos(x)がゼロ除算になるのはおかしい
 15705:         //  INEX2  結果に誤差があるときセット、それ以外はクリア
 15706:         //  INEX1  引数がpackedで正確に変換できないときセット、それ以外はクリア
 15707:         if (!XEiJ.fpuBox.epbIsFullSpec ()) {
 15708:           irpExceptionFormat2 (M68kException.M6E_FP_UNIMPLEMENTED_INSTRUCTION << 2, XEiJ.regPC, a);  //pcは次の命令,アドレスは実効アドレス
 15709:           break fgen;
 15710:         }
 15711:         XEiJ.fpuFPn[n].tan (XEiJ.fpuFPn[m]);
 15712:         break;
 15713: 
 15714:       case 0b001_0000:  //$xx10: FETOX.* *m,FPn
 15715:         //  BSUN   常にクリア
 15716:         //  SNAN   引数がシグナリングNaNのときセット、それ以外はクリア
 15717:         //  OPERR  常にクリア
 15718:         //  OVFL   オーバーフローしたときセット、それ以外はクリア
 15719:         //  UNFL   結果が非正規化数のときセット、それ以外はクリア
 15720:         //  DZ     常にクリア
 15721:         //  INEX2  結果に誤差があるときセット、それ以外はクリア
 15722:         //  INEX1  引数がpackedで正確に変換できないときセット、それ以外はクリア
 15723:         if (!XEiJ.fpuBox.epbIsFullSpec ()) {
 15724:           irpExceptionFormat2 (M68kException.M6E_FP_UNIMPLEMENTED_INSTRUCTION << 2, XEiJ.regPC, a);  //pcは次の命令,アドレスは実効アドレス
 15725:           break fgen;
 15726:         }
 15727:         XEiJ.fpuFPn[n].exp (XEiJ.fpuFPn[m]);
 15728:         break;
 15729: 
 15730:       case 0b001_0001:  //$xx11: FTWOTOX.* *m,FPn
 15731:         //  BSUN   常にクリア
 15732:         //  SNAN   引数がシグナリングNaNのときセット、それ以外はクリア
 15733:         //  OPERR  常にクリア
 15734:         //  OVFL   オーバーフローしたときセット、それ以外はクリア
 15735:         //  UNFL   結果が非正規化数のときセット、それ以外はクリア
 15736:         //  DZ     常にクリア
 15737:         //  INEX2  結果に誤差があるときセット、それ以外はクリア
 15738:         //  INEX1  引数がpackedで正確に変換できないときセット、それ以外はクリア
 15739:         if (!XEiJ.fpuBox.epbIsFullSpec ()) {
 15740:           irpExceptionFormat2 (M68kException.M6E_FP_UNIMPLEMENTED_INSTRUCTION << 2, XEiJ.regPC, a);  //pcは次の命令,アドレスは実効アドレス
 15741:           break fgen;
 15742:         }
 15743:         XEiJ.fpuFPn[n].exp2 (XEiJ.fpuFPn[m]);
 15744:         break;
 15745: 
 15746:       case 0b001_0010:  //$xx12: FTENTOX.* *m,FPn
 15747:       case 0b001_0011:  //$xx13: FTENTOX.* *m,FPn (MC68882)
 15748:         //  BSUN   常にクリア
 15749:         //  SNAN   引数がシグナリングNaNのときセット、それ以外はクリア
 15750:         //  OPERR  常にクリア
 15751:         //  OVFL   オーバーフローしたときセット、それ以外はクリア
 15752:         //  UNFL   結果が非正規化数のときセット、それ以外はクリア
 15753:         //  DZ     常にクリア
 15754:         //  INEX2  結果に誤差があるときセット、それ以外はクリア
 15755:         //  INEX1  引数がpackedで正確に変換できないときセット、それ以外はクリア
 15756:         if (!XEiJ.fpuBox.epbIsFullSpec ()) {
 15757:           irpExceptionFormat2 (M68kException.M6E_FP_UNIMPLEMENTED_INSTRUCTION << 2, XEiJ.regPC, a);  //pcは次の命令,アドレスは実効アドレス
 15758:           break fgen;
 15759:         }
 15760:         XEiJ.fpuFPn[n].exp10 (XEiJ.fpuFPn[m]);
 15761:         break;
 15762: 
 15763:       case 0b001_0100:  //$xx14: FLOGN.* *m,FPn
 15764:         //  BSUN   常にクリア
 15765:         //  SNAN   引数がシグナリングNaNのときセット、それ以外はクリア
 15766:         //  OPERR  引数が0よりも小さいときセット、それ以外はクリア
 15767:         //  OVFL   常にクリア
 15768:         //         log(1)=0,log(x)<=x-1なので結果が引数よりも大きくなることはない
 15769:         //  UNFL   常にクリア
 15770:         //         log(1+2^-80)≒2^-80
 15771:         //  DZ     引数がゼロのときセット、それ以外はクリア
 15772:         //  INEX2  結果に誤差があるときセット、それ以外はクリア
 15773:         //  INEX1  引数がpackedで正確に変換できないときセット、それ以外はクリア
 15774:         if (!XEiJ.fpuBox.epbIsFullSpec ()) {
 15775:           irpExceptionFormat2 (M68kException.M6E_FP_UNIMPLEMENTED_INSTRUCTION << 2, XEiJ.regPC, a);  //pcは次の命令,アドレスは実効アドレス
 15776:           break fgen;
 15777:         }
 15778:         XEiJ.fpuFPn[n].log (XEiJ.fpuFPn[m]);
 15779:         break;
 15780: 
 15781:       case 0b001_0101:  //$xx15: FLOG10.* *m,FPn
 15782:         //  BSUN   常にクリア
 15783:         //  SNAN   引数がシグナリングNaNのときセット、それ以外はクリア
 15784:         //  OPERR  引数が0よりも小さいときセット、それ以外はクリア
 15785:         //  OVFL   常にクリア
 15786:         //  UNFL   常にクリア
 15787:         //  DZ     引数がゼロのときセット、それ以外はクリア
 15788:         //  INEX2  結果に誤差があるときセット、それ以外はクリア
 15789:         //  INEX1  引数がpackedで正確に変換できないときセット、それ以外はクリア
 15790:         if (!XEiJ.fpuBox.epbIsFullSpec ()) {
 15791:           irpExceptionFormat2 (M68kException.M6E_FP_UNIMPLEMENTED_INSTRUCTION << 2, XEiJ.regPC, a);  //pcは次の命令,アドレスは実効アドレス
 15792:           break fgen;
 15793:         }
 15794:         XEiJ.fpuFPn[n].log10 (XEiJ.fpuFPn[m]);
 15795:         break;
 15796: 
 15797:       case 0b001_0110:  //$xx16: FLOG2.* *m,FPn
 15798:       case 0b001_0111:  //$xx17: FLOG2.* *m,FPn (MC68882)
 15799:         //  BSUN   常にクリア
 15800:         //  SNAN   引数がシグナリングNaNのときセット、それ以外はクリア
 15801:         //  OPERR  引数が0よりも小さいときセット、それ以外はクリア
 15802:         //  OVFL   常にクリア
 15803:         //  UNFL   常にクリア
 15804:         //  DZ     引数がゼロのときセット、それ以外はクリア
 15805:         //  INEX2  結果に誤差があるときセット、それ以外はクリア
 15806:         //  INEX1  引数がpackedで正確に変換できないときセット、それ以外はクリア
 15807:         if (!XEiJ.fpuBox.epbIsFullSpec ()) {
 15808:           irpExceptionFormat2 (M68kException.M6E_FP_UNIMPLEMENTED_INSTRUCTION << 2, XEiJ.regPC, a);  //pcは次の命令,アドレスは実効アドレス
 15809:           break fgen;
 15810:         }
 15811:         XEiJ.fpuFPn[n].log2 (XEiJ.fpuFPn[m]);
 15812:         break;
 15813: 
 15814:       case 0b001_1000:  //$xx18: FABS.* *m,FPn
 15815:         //  BSUN   常にクリア
 15816:         //  SNAN   引数がシグナリングNaNのときセット、それ以外はクリア
 15817:         //  OPERR  常にクリア
 15818:         //  OVFL   常にクリア
 15819:         //  UNFL   結果が非正規化数のときセット、それ以外はクリア
 15820:         //  DZ     常にクリア
 15821:         //  INEX2  常にクリア
 15822:         //  INEX1  引数がpackedで正確に変換できないときセット、それ以外はクリア
 15823:         XEiJ.fpuFPn[n].abs (XEiJ.fpuFPn[m]);
 15824:         break;
 15825: 
 15826:       case 0b001_1001:  //$xx19: FCOSH.* *m,FPn
 15827:         //  BSUN   常にクリア
 15828:         //  SNAN   引数がシグナリングNaNのときセット、それ以外はクリア
 15829:         //  OPERR  常にクリア
 15830:         //  OVFL   オーバーフローしたときセット、それ以外はクリア
 15831:         //  UNFL   常にクリア
 15832:         //  DZ     常にクリア
 15833:         //  INEX2  結果に誤差があるときセット、それ以外はクリア
 15834:         //  INEX1  引数がpackedで正確に変換できないときセット、それ以外はクリア
 15835:         if (!XEiJ.fpuBox.epbIsFullSpec ()) {
 15836:           irpExceptionFormat2 (M68kException.M6E_FP_UNIMPLEMENTED_INSTRUCTION << 2, XEiJ.regPC, a);  //pcは次の命令,アドレスは実効アドレス
 15837:           break fgen;
 15838:         }
 15839:         XEiJ.fpuFPn[n].cosh (XEiJ.fpuFPn[m]);
 15840:         break;
 15841: 
 15842:       case 0b001_1010:  //$xx1A: FNEG.* *m,FPn
 15843:       case 0b001_1011:  //$xx1B: FNEG.* *m,FPn (MC68882)
 15844:         //  BSUN   常にクリア
 15845:         //  SNAN   引数がシグナリングNaNのときセット、それ以外はクリア
 15846:         //  OPERR  常にクリア
 15847:         //  OVFL   常にクリア
 15848:         //  UNFL   結果が非正規化数のときセット、それ以外はクリア
 15849:         //  DZ     常にクリア
 15850:         //  INEX2  常にクリア
 15851:         //  INEX1  引数がpackedで正確に変換できないときセット、それ以外はクリア
 15852:         XEiJ.fpuFPn[n].neg (XEiJ.fpuFPn[m]);
 15853:         break;
 15854: 
 15855:       case 0b001_1100:  //$xx1C: FACOS.* *m,FPn
 15856:         //  BSUN   常にクリア
 15857:         //  SNAN   引数がシグナリングNaNのときセット、それ以外はクリア
 15858:         //  OPERR  引数の絶対値が1よりも大きいときセット、それ以外はクリア
 15859:         //  OVFL   常にクリア
 15860:         //  UNFL   常にクリア
 15861:         //         acos(1-ulp(1))はulp(1)よりも大きい
 15862:         //  DZ     常にクリア
 15863:         //  INEX2  結果に誤差があるときセット、それ以外はクリア
 15864:         //         おそらくセットされないのはacos(1)=0だけ
 15865:         //  INEX1  引数がpackedで正確に変換できないときセット、それ以外はクリア
 15866:         if (!XEiJ.fpuBox.epbIsFullSpec ()) {
 15867:           irpExceptionFormat2 (M68kException.M6E_FP_UNIMPLEMENTED_INSTRUCTION << 2, XEiJ.regPC, a);  //pcは次の命令,アドレスは実効アドレス
 15868:           break fgen;
 15869:         }
 15870:         XEiJ.fpuFPn[n].acos (XEiJ.fpuFPn[m]);
 15871:         break;
 15872: 
 15873:       case 0b001_1101:  //$xx1D: FCOS.* *m,FPn
 15874:         //  BSUN   常にクリア
 15875:         //  SNAN   引数がシグナリングNaNのときセット、それ以外はクリア
 15876:         //  OPERR  引数が無限大のときセット、それ以外はクリア
 15877:         //  OVFL   常にクリア
 15878:         //  UNFL   常にクリア
 15879:         //         cos(x)=0を満たすxは正確に表現できず、cos(pi/2)とcos(3*pi/2)が正規化数になってしまう
 15880:         //  DZ     常にクリア
 15881:         //  INEX2  結果に誤差があるときセット、それ以外はクリア
 15882:         //  INEX1  引数がpackedで正確に変換できないときセット、それ以外はクリア
 15883:         if (!XEiJ.fpuBox.epbIsFullSpec ()) {
 15884:           irpExceptionFormat2 (M68kException.M6E_FP_UNIMPLEMENTED_INSTRUCTION << 2, XEiJ.regPC, a);  //pcは次の命令,アドレスは実効アドレス
 15885:           break fgen;
 15886:         }
 15887:         XEiJ.fpuFPn[n].cos (XEiJ.fpuFPn[m]);
 15888:         break;
 15889: 
 15890:       case 0b001_1110:  //$xx1E: FGETEXP.* *m,FPn
 15891:         //  BSUN   常にクリア
 15892:         //  SNAN   引数がシグナリングNaNのときセット、それ以外はクリア
 15893:         //  OPERR  引数が無限大のときセット、それ以外はクリア
 15894:         //  OVFL   常にクリア
 15895:         //  UNFL   常にクリア
 15896:         //  DZ     常にクリア
 15897:         //  INEX2  常にクリア
 15898:         //  INEX1  引数がpackedで正確に変換できないときセット、それ以外はクリア
 15899:         if (!XEiJ.fpuBox.epbIsFullSpec ()) {
 15900:           irpExceptionFormat2 (M68kException.M6E_FP_UNIMPLEMENTED_INSTRUCTION << 2, XEiJ.regPC, a);  //pcは次の命令,アドレスは実効アドレス
 15901:           break fgen;
 15902:         }
 15903:         XEiJ.fpuFPn[n].getexp (XEiJ.fpuFPn[m]);
 15904:         break;
 15905: 
 15906:       case 0b001_1111:  //$xx1F: FGETMAN.* *m,FPn
 15907:         //  BSUN   常にクリア
 15908:         //  SNAN   引数がシグナリングNaNのときセット、それ以外はクリア
 15909:         //  OPERR  引数が無限大のときセット、それ以外はクリア
 15910:         //  OVFL   常にクリア
 15911:         //  UNFL   常にクリア
 15912:         //  DZ     常にクリア
 15913:         //  INEX2  常にクリア
 15914:         //  INEX1  引数がpackedで正確に変換できないときセット、それ以外はクリア
 15915:         if (!XEiJ.fpuBox.epbIsFullSpec ()) {
 15916:           irpExceptionFormat2 (M68kException.M6E_FP_UNIMPLEMENTED_INSTRUCTION << 2, XEiJ.regPC, a);  //pcは次の命令,アドレスは実効アドレス
 15917:           break fgen;
 15918:         }
 15919:         XEiJ.fpuFPn[n].getman (XEiJ.fpuFPn[m]);
 15920:         break;
 15921: 
 15922:       case 0b010_0000:  //$xx20: FDIV.* *m,FPn
 15923:         //  BSUN   常にクリア
 15924:         //  SNAN   引数がシグナリングNaNのときセット、それ以外はクリア
 15925:         //  OPERR  引数が両方ゼロまたは両方無限大のときセット、それ以外はクリア
 15926:         //  OVFL   オーバーフローしたときセット、それ以外はクリア
 15927:         //  UNFL   結果が非正規化数のときセット、それ以外はクリア
 15928:         //  DZ     被除数がゼロ、無限大、NaN以外で除数がゼロのときセット、それ以外はクリア
 15929:         //  INEX2  結果に誤差があるときセット、それ以外はクリア
 15930:         //  INEX1  引数がpackedで正確に変換できないときセット、それ以外はクリア
 15931:         XEiJ.mpuCycleCount += 36;
 15932:         XEiJ.fpuFPn[n].div (XEiJ.fpuFPn[m]);
 15933:         break;
 15934: 
 15935:       case 0b010_0001:  //$xx21: FMOD.* *m,FPn
 15936:         //  BSUN   常にクリア
 15937:         //  SNAN   引数がシグナリングNaNのときセット、それ以外はクリア
 15938:         //  OPERR  除数がゼロまたは被除数が無限大のときセット、それ以外はクリア
 15939:         //  OVFL   常にクリア
 15940:         //  UNFL   結果が非正規化数のときセット、それ以外はクリア
 15941:         //  DZ     常にクリア
 15942:         //         除数がゼロのとき結果は無限大ではなくNaNでありゼロ除算にはならない
 15943:         //  INEX2  結果に誤差があるときセット、それ以外はクリア
 15944:         //  INEX1  引数がpackedで正確に変換できないときセット、それ以外はクリア
 15945:         //  FPSRのquotient byteに符号付き商の下位7bitが入る
 15946:         if (!XEiJ.fpuBox.epbIsFullSpec ()) {
 15947:           irpExceptionFormat2 (M68kException.M6E_FP_UNIMPLEMENTED_INSTRUCTION << 2, XEiJ.regPC, a);  //pcは次の命令,アドレスは実効アドレス
 15948:           break fgen;
 15949:         }
 15950:         XEiJ.fpuFPn[n].rem (XEiJ.fpuFPn[m]);
 15951:         break;
 15952: 
 15953:       case 0b010_0010:  //$xx22: FADD.* *m,FPn
 15954:         //  BSUN   常にクリア
 15955:         //  SNAN   引数がシグナリングNaNのときセット、それ以外はクリア
 15956:         //  OPERR  引数が両方無限大で符号が異なるときセット、それ以外はクリア
 15957:         //  OVFL   オーバーフローしたときセット、それ以外はクリア
 15958:         //  UNFL   結果が非正規化数のときセット、それ以外はクリア
 15959:         //  DZ     常にクリア
 15960:         //  INEX2  結果に誤差があるときセット、それ以外はクリア
 15961:         //  INEX1  引数がpackedで正確に変換できないときセット、それ以外はクリア
 15962:         XEiJ.mpuCycleCount += 2;
 15963:         XEiJ.fpuFPn[n].add (XEiJ.fpuFPn[m]);
 15964:         break;
 15965: 
 15966:       case 0b010_0011:  //$xx23: FMUL.* *m,FPn
 15967:         //  BSUN   常にクリア
 15968:         //  SNAN   引数がシグナリングNaNのときセット、それ以外はクリア
 15969:         //  OPERR  引数の一方がゼロで他方が無限大のときセット、それ以外はクリア
 15970:         //  OVFL   オーバーフローしたときセット、それ以外はクリア
 15971:         //  UNFL   結果が非正規化数のときセット、それ以外はクリア
 15972:         //  DZ     常にクリア
 15973:         //  INEX2  結果に誤差があるときセット、それ以外はクリア
 15974:         //  INEX1  引数がpackedで正確に変換できないときセット、それ以外はクリア
 15975:         XEiJ.mpuCycleCount += 2;
 15976:         XEiJ.fpuFPn[n].mul (XEiJ.fpuFPn[m]);
 15977:         break;
 15978: 
 15979:       case 0b010_0100:  //$xx24: FSGLDIV.* *m,FPn
 15980:         //  BSUN   常にクリア
 15981:         //  SNAN   引数がシグナリングNaNのときセット、それ以外はクリア
 15982:         //  OPERR  引数が両方ゼロまたは両方無限大のときセット、それ以外はクリア
 15983:         //  OVFL   オーバーフローしたときセット、それ以外はクリア
 15984:         //  UNFL   結果が非正規化数のときセット、それ以外はクリア
 15985:         //  DZ     被除数がゼロ、無限大、NaN以外で除数がゼロのときセット、それ以外はクリア
 15986:         //  INEX2  結果に誤差があるときセット、それ以外はクリア
 15987:         //  INEX1  引数がpackedで正確に変換できないときセット、それ以外はクリア
 15988:         XEiJ.mpuCycleCount += 36;
 15989:         XEiJ.fpuBox.epbSetRoundingPrec (EFPBox.EPB_PREC_XSG);
 15990:         XEiJ.fpuFPn[n].div (XEiJ.fpuFPn[m]);
 15991:         break;
 15992: 
 15993:       case 0b010_0101:  //$xx25: FREM.* *m,FPn
 15994:         //  BSUN   常にクリア
 15995:         //  SNAN   引数がシグナリングNaNのときセット、それ以外はクリア
 15996:         //  OPERR  除数がゼロまたは被除数が無限大のときセット、それ以外はクリア
 15997:         //  OVFL   常にクリア
 15998:         //  UNFL   結果が非正規化数のときセット、それ以外はクリア
 15999:         //  DZ     常にクリア
 16000:         //         除数がゼロのとき結果は無限大ではなくNaNでありゼロ除算にはならない
 16001:         //  INEX2  結果に誤差があるときセット、それ以外はクリア
 16002:         //         マニュアルにClearedと書いてあるのは間違い
 16003:         //         除数が無限大で被除数をそのまま返す場合でもサイズが減ればアンダーフローや不正確な結果になることはマニュアルにも書かれている
 16004:         //  INEX1  引数がpackedで正確に変換できないときセット、それ以外はクリア
 16005:         //  FPSRのquotient byteに符号付き商の下位7bitが入る
 16006:         if (!XEiJ.fpuBox.epbIsFullSpec ()) {
 16007:           irpExceptionFormat2 (M68kException.M6E_FP_UNIMPLEMENTED_INSTRUCTION << 2, XEiJ.regPC, a);  //pcは次の命令,アドレスは実効アドレス
 16008:           break fgen;
 16009:         }
 16010:         XEiJ.fpuFPn[n].ieeerem (XEiJ.fpuFPn[m]);
 16011:         break;
 16012: 
 16013:       case 0b010_0110:  //$xx26: FSCALE.* *m,FPn
 16014:         //  BSUN   常にクリア
 16015:         //  SNAN   引数がシグナリングNaNのときセット、それ以外はクリア
 16016:         //  OPERR  引数が無限大のときセット、それ以外はクリア
 16017:         //  OVFL   オーバーフローしたときセット、それ以外はクリア
 16018:         //  UNFL   結果が非正規化数のときセット、それ以外はクリア
 16019:         //  DZ     常にクリア
 16020:         //  INEX2  常にクリア
 16021:         //  INEX1  引数がpackedで正確に変換できないときセット、それ以外はクリア
 16022:         if (!XEiJ.fpuBox.epbIsFullSpec ()) {
 16023:           irpExceptionFormat2 (M68kException.M6E_FP_UNIMPLEMENTED_INSTRUCTION << 2, XEiJ.regPC, a);  //pcは次の命令,アドレスは実効アドレス
 16024:           break fgen;
 16025:         }
 16026:         //! 本来はソースが整数のとき浮動小数点数を経由しないが、これは経由してしまっている。結果は同じだが効率が悪い
 16027:         XEiJ.fpuFPn[n].scale (XEiJ.fpuFPn[m]);
 16028:         break;
 16029: 
 16030:       case 0b010_0111:  //$xx27: FSGLMUL.* *m,FPn
 16031:         //  BSUN   常にクリア
 16032:         //  SNAN   引数がシグナリングNaNのときセット、それ以外はクリア
 16033:         //  OPERR  引数の一方がゼロで他方が無限大のときセット、それ以外はクリア
 16034:         //  OVFL   オーバーフローしたときセット、それ以外はクリア
 16035:         //  UNFL   結果が非正規化数のときセット、それ以外はクリア
 16036:         //  DZ     常にクリア
 16037:         //  INEX2  結果に誤差があるときセット、それ以外はクリア
 16038:         //  INEX1  引数がpackedで正確に変換できないときセット、それ以外はクリア
 16039:         XEiJ.mpuCycleCount += 2;
 16040:         {
 16041:           //引数を24bitに切り捨てるときX2をセットしない
 16042:           int sr = XEiJ.fpuBox.epbFpsr;
 16043:           XEiJ.fpuFPn[EFPBox.EPB_SRC_TMP].roundmanf (XEiJ.fpuFPn[m], EFPBox.EPB_MODE_RZ);
 16044:           XEiJ.fpuFPn[EFPBox.EPB_DST_TMP].roundmanf (XEiJ.fpuFPn[n], EFPBox.EPB_MODE_RZ);
 16045:           XEiJ.fpuBox.epbFpsr = sr;
 16046:         }
 16047:         XEiJ.fpuBox.epbSetRoundingPrec (EFPBox.EPB_PREC_XSG);
 16048:         XEiJ.fpuFPn[n].mul (XEiJ.fpuFPn[EFPBox.EPB_DST_TMP], XEiJ.fpuFPn[EFPBox.EPB_SRC_TMP]);
 16049:         break;
 16050: 
 16051:       case 0b010_1000:  //$xx28: FSUB.* *m,FPn
 16052:       case 0b010_1001:  //$xx29: FSUB.* *m,FPn (MC68882)
 16053:       case 0b010_1010:  //$xx2A: FSUB.* *m,FPn (MC68882)
 16054:       case 0b010_1011:  //$xx2B: FSUB.* *m,FPn (MC68882)
 16055:       case 0b010_1100:  //$xx2C: FSUB.* *m,FPn (MC68882)
 16056:       case 0b010_1101:  //$xx2D: FSUB.* *m,FPn (MC68882)
 16057:       case 0b010_1110:  //$xx2E: FSUB.* *m,FPn (MC68882)
 16058:       case 0b010_1111:  //$xx2F: FSUB.* *m,FPn (MC68882)
 16059:         //  BSUN   常にクリア
 16060:         //  SNAN   引数がシグナリングNaNのときセット、それ以外はクリア
 16061:         //  OPERR  引数が両方無限大で符号が同じときセット、それ以外はクリア
 16062:         //  OVFL   オーバーフローしたときセット、それ以外はクリア
 16063:         //  UNFL   結果が非正規化数のときセット、それ以外はクリア
 16064:         //  DZ     常にクリア
 16065:         //  INEX2  結果に誤差があるときセット、それ以外はクリア
 16066:         //  INEX1  引数がpackedで正確に変換できないときセット、それ以外はクリア
 16067:         XEiJ.mpuCycleCount += 2;
 16068:         XEiJ.fpuFPn[n].sub (XEiJ.fpuFPn[m]);
 16069:         break;
 16070: 
 16071:       case 0b011_0000:  //$xx30: FSINCOS.* *m,FP0:FPn (c=0,s=n)
 16072:       case 0b011_0001:  //$xx31: FSINCOS.* *m,FP1:FPn (c=1,s=n)
 16073:       case 0b011_0010:  //$xx32: FSINCOS.* *m,FP2:FPn (c=2,s=n)
 16074:       case 0b011_0011:  //$xx33: FSINCOS.* *m,FP3:FPn (c=3,s=n)
 16075:       case 0b011_0100:  //$xx34: FSINCOS.* *m,FP4:FPn (c=4,s=n)
 16076:       case 0b011_0101:  //$xx35: FSINCOS.* *m,FP5:FPn (c=5,s=n)
 16077:       case 0b011_0110:  //$xx36: FSINCOS.* *m,FP6:FPn (c=6,s=n)
 16078:       case 0b011_0111:  //$xx37: FSINCOS.* *m,FP7:FPn (c=7,s=n)
 16079:         //  BSUN   常にクリア
 16080:         //  SNAN   引数がシグナリングNaNのときセット、それ以外はクリア
 16081:         //  OPERR  引数が無限大のときセット、それ以外はクリア
 16082:         //  OVFL   常にクリア
 16083:         //  UNFL   sin(x)の結果が非正規化数のときセット、それ以外はクリア
 16084:         //         cos(x)の結果は非正規化数にならない
 16085:         //  DZ     常にクリア
 16086:         //  INEX2  結果に誤差があるときセット、それ以外はクリア
 16087:         //  INEX1  引数がpackedで正確に変換できないときセット、それ以外はクリア
 16088:         if (!XEiJ.fpuBox.epbIsFullSpec ()) {
 16089:           irpExceptionFormat2 (M68kException.M6E_FP_UNIMPLEMENTED_INSTRUCTION << 2, XEiJ.regPC, a);  //pcは次の命令,アドレスは実効アドレス
 16090:           break fgen;
 16091:         }
 16092:         c &= 7;
 16093:         //m==EFPBox.EPB_SRC_TMP||m==n||m==cの場合があることに注意する
 16094:         XEiJ.fpuFPn[EFPBox.EPB_SRC_TMP].sete (XEiJ.fpuFPn[m]);
 16095:         XEiJ.fpuFPn[c].cos (XEiJ.fpuFPn[EFPBox.EPB_SRC_TMP]);
 16096:         XEiJ.fpuFPn[n].sin (XEiJ.fpuFPn[EFPBox.EPB_SRC_TMP]);
 16097:         break;
 16098: 
 16099:       case 0b011_1000:  //$xx38: FCMP.* *m,FPn
 16100:       case 0b011_1001:  //$xx39: FCMP.* *m,FPn (MC68882)
 16101:       case 0b011_1100:  //$xx3C: FCMP.* *m,FPn (MC68882)  コマンドワードの不連続箇所に注意
 16102:       case 0b011_1101:  //$xx3D: FCMP.* *m,FPn (MC68882)
 16103:         //  BSUN   常にクリア
 16104:         //  SNAN   引数がシグナリングNaNのときセット、それ以外はクリア
 16105:         //  OPERR  常にクリア
 16106:         //  OVFL   常にクリア
 16107:         //  UNFL   常にクリア
 16108:         //  DZ     常にクリア
 16109:         //  INEX2  常にクリア
 16110:         //  INEX1  引数がpackedで正確に変換できないときセット、それ以外はクリア
 16111:         //  FCMPはinfinityを常にクリアする
 16112:         //  efp.compareTo(x,y)を使う
 16113:         //    efp.compareTo(x,y)はefp.sub(x,y)よりも速い
 16114:         //    efp.sub(x,y)はINEX2をセットしてしまう
 16115:         //  efp.compareTo(x,y)は-0<+0だがFCMPは-0==+0なのでこれだけ調節する
 16116:         {
 16117:           int xf = XEiJ.fpuFPn[n].flg;
 16118:           int yf = XEiJ.fpuFPn[m].flg;
 16119:           if ((xf | yf) << 3 < 0) {  //どちらかがNaN
 16120:             //XEiJ.fpuFPn[EFPBox.EPB_DST_TMP].setnan ();
 16121:             XEiJ.fpuFPn[EFPBox.EPB_DST_TMP].flg = EFPBox.N;
 16122:           } else {
 16123:             int i = ((xf & yf) << 1 < 0 ? 0 :  //両方±0
 16124:                      XEiJ.fpuFPn[n].compareTo (XEiJ.fpuFPn[m]));  //-Inf==-Inf<-x<-0<+0<+x<+Inf==+Inf<NaN==NaN
 16125:             if (i == 0) {
 16126:               if (xf < 0) {
 16127:                 //XEiJ.fpuFPn[EFPBox.EPB_DST_TMP].negset0 ();
 16128:                 XEiJ.fpuFPn[EFPBox.EPB_DST_TMP].flg = EFPBox.M | EFPBox.Z;
 16129:               } else {
 16130:                 //XEiJ.fpuFPn[EFPBox.EPB_DST_TMP].set0 ();
 16131:                 XEiJ.fpuFPn[EFPBox.EPB_DST_TMP].flg = EFPBox.P | EFPBox.Z;
 16132:               }
 16133:             } else if (i < 0) {
 16134:               XEiJ.fpuFPn[EFPBox.EPB_DST_TMP].negset1 ();
 16135:             } else {
 16136:               XEiJ.fpuFPn[EFPBox.EPB_DST_TMP].set1 ();
 16137:             }
 16138:           }
 16139:           n = EFPBox.EPB_DST_TMP;
 16140:         }
 16141:         break;
 16142: 
 16143:       case 0b011_1010:  //$xx3A: FTST.* *m
 16144:       case 0b011_1011:  //$xx3B: FTST.* *m (MC68882)
 16145:       case 0b011_1110:  //$xx3E: FTST.* *m (MC68882)  コマンドワードの不連続箇所に注意
 16146:       case 0b011_1111:  //$xx3F: FTST.* *m (MC68882)
 16147:         //  BSUN   常にクリア
 16148:         //  SNAN   引数がシグナリングNaNのときセット、それ以外はクリア
 16149:         //  OPERR  常にクリア
 16150:         //  OVFL   常にクリア
 16151:         //  UNFL   常にクリア
 16152:         //  DZ     常にクリア
 16153:         //  INEX2  常にクリア
 16154:         //  INEX1  引数がpackedで正確に変換できないときセット、それ以外はクリア
 16155:         //  ソースオペランドをダミーのデスティネーションオペランドにコピーしてテストする
 16156:         //  デスティネーションオペランドは変化しない
 16157:         //  デスティネーションオペランドにはFP0が指定される場合が多いがFP0である必要はない
 16158:         XEiJ.fpuFPn[EFPBox.EPB_DST_TMP].sete (XEiJ.fpuFPn[m]);
 16159:         n = EFPBox.EPB_DST_TMP;
 16160:         break;
 16161: 
 16162:       case 0b100_0000:  //$xx40: FSMOVE.* *m,FPn
 16163:         //  BSUN   常にクリア
 16164:         //  SNAN   引数がシグナリングNaNのときセット、それ以外はクリア
 16165:         //  OPERR  常にクリア
 16166:         //  OVFL   常にクリア
 16167:         //  UNFL   結果が非正規化数のときセット、それ以外はクリア
 16168:         //  DZ     常にクリア
 16169:         //  INEX2  結果に誤差があるときセット、それ以外はクリア
 16170:         //  INEX1  引数がpackedで正確に変換できないときセット、それ以外はクリア
 16171:         XEiJ.fpuBox.epbSetRoundingPrec (EFPBox.EPB_PREC_SGL);
 16172:         XEiJ.fpuFPn[n].sete (XEiJ.fpuFPn[m]).finish ();
 16173:         break;
 16174: 
 16175:       case 0b100_0001:  //$xx41: FSSQRT.* *m,FPn
 16176:         //  BSUN   常にクリア
 16177:         //  SNAN   引数がシグナリングNaNのときセット、それ以外はクリア
 16178:         //  OPERR  引数が-0を除く負数のときセット、それ以外はクリア
 16179:         //  OVFL   常にクリア
 16180:         //  UNFL   常にクリア
 16181:         //  DZ     常にクリア
 16182:         //  INEX2  結果に誤差があるときセット、それ以外はクリア
 16183:         //  INEX1  引数がpackedで正確に変換できないときセット、それ以外はクリア
 16184:         XEiJ.mpuCycleCount += 67;
 16185:         XEiJ.fpuBox.epbSetRoundingPrec (EFPBox.EPB_PREC_SGL);
 16186:         XEiJ.fpuFPn[n].sqrt (XEiJ.fpuFPn[m]);
 16187:         break;
 16188: 
 16189:         //case 0b100_0010:  //$xx42:
 16190:         //case 0b100_0011:  //$xx43:
 16191: 
 16192:       case 0b100_0100:  //$xx44: FDMOVE.* *m,FPn
 16193:         //  BSUN   常にクリア
 16194:         //  SNAN   引数がシグナリングNaNのときセット、それ以外はクリア
 16195:         //  OPERR  常にクリア
 16196:         //  OVFL   常にクリア
 16197:         //  UNFL   結果が非正規化数のときセット、それ以外はクリア
 16198:         //  DZ     常にクリア
 16199:         //  INEX2  結果に誤差があるときセット、それ以外はクリア
 16200:         //  INEX1  引数がpackedで正確に変換できないときセット、それ以外はクリア
 16201:         XEiJ.fpuBox.epbSetRoundingPrec (EFPBox.EPB_PREC_DBL);
 16202:         XEiJ.fpuFPn[n].sete (XEiJ.fpuFPn[m]).finish ();
 16203:         break;
 16204: 
 16205:       case 0b100_0101:  //$xx45: FDSQRT.* *m,FPn
 16206:         //  BSUN   常にクリア
 16207:         //  SNAN   引数がシグナリングNaNのときセット、それ以外はクリア
 16208:         //  OPERR  引数が-0を除く負数のときセット、それ以外はクリア
 16209:         //  OVFL   常にクリア
 16210:         //  UNFL   常にクリア
 16211:         //  DZ     常にクリア
 16212:         //  INEX2  結果に誤差があるときセット、それ以外はクリア
 16213:         //  INEX1  引数がpackedで正確に変換できないときセット、それ以外はクリア
 16214:         XEiJ.mpuCycleCount += 67;
 16215:         XEiJ.fpuBox.epbSetRoundingPrec (EFPBox.EPB_PREC_DBL);
 16216:         XEiJ.fpuFPn[n].sqrt (XEiJ.fpuFPn[m]);
 16217:         break;
 16218: 
 16219:         //case 0b100_0110:  //$xx46:
 16220:         //case 0b100_0111:  //$xx47:
 16221:         //case 0b100_1000:  //$xx48:
 16222:         //case 0b100_1001:  //$xx49:
 16223:         //case 0b100_1010:  //$xx4A:
 16224:         //case 0b100_1011:  //$xx4B:
 16225:         //case 0b100_1100:  //$xx4C:
 16226:         //case 0b100_1101:  //$xx4D:
 16227:         //case 0b100_1110:  //$xx4E:
 16228:         //case 0b100_1111:  //$xx4F:
 16229:         //case 0b101_0000:  //$xx50:
 16230:         //case 0b101_0001:  //$xx51:
 16231:         //case 0b101_0010:  //$xx52:
 16232:         //case 0b101_0011:  //$xx53:
 16233:         //case 0b101_0100:  //$xx54:
 16234:         //case 0b101_0101:  //$xx55:
 16235:         //case 0b101_0110:  //$xx56:
 16236:         //case 0b101_0111:  //$xx57:
 16237: 
 16238:       case 0b101_1000:  //$xx58: FSABS.* *m,FPn
 16239:         //  BSUN   常にクリア
 16240:         //  SNAN   引数がシグナリングNaNのときセット、それ以外はクリア
 16241:         //  OPERR  常にクリア
 16242:         //  OVFL   常にクリア
 16243:         //  UNFL   結果が非正規化数のときセット、それ以外はクリア
 16244:         //  DZ     常にクリア
 16245:         //  INEX2  常にクリア
 16246:         //  INEX1  引数がpackedで正確に変換できないときセット、それ以外はクリア
 16247:         XEiJ.fpuBox.epbSetRoundingPrec (EFPBox.EPB_PREC_SGL);
 16248:         XEiJ.fpuFPn[n].abs (XEiJ.fpuFPn[m]);
 16249:         break;
 16250: 
 16251:         //case 0b101_1001:  //$xx59:
 16252: 
 16253:       case 0b101_1010:  //$xx5A: FSNEG.* *m,FPn
 16254:         //  BSUN   常にクリア
 16255:         //  SNAN   引数がシグナリングNaNのときセット、それ以外はクリア
 16256:         //  OPERR  常にクリア
 16257:         //  OVFL   常にクリア
 16258:         //  UNFL   結果が非正規化数のときセット、それ以外はクリア
 16259:         //  DZ     常にクリア
 16260:         //  INEX2  常にクリア
 16261:         //  INEX1  引数がpackedで正確に変換できないときセット、それ以外はクリア
 16262:         XEiJ.fpuBox.epbSetRoundingPrec (EFPBox.EPB_PREC_SGL);
 16263:         XEiJ.fpuFPn[n].neg (XEiJ.fpuFPn[m]);
 16264:         break;
 16265: 
 16266:         //case 0b101_1011:  //$xx5B:
 16267: 
 16268:       case 0b101_1100:  //$xx5C: FDABS.* *m,FPn
 16269:         //  BSUN   常にクリア
 16270:         //  SNAN   引数がシグナリングNaNのときセット、それ以外はクリア
 16271:         //  OPERR  常にクリア
 16272:         //  OVFL   常にクリア
 16273:         //  UNFL   結果が非正規化数のときセット、それ以外はクリア
 16274:         //  DZ     常にクリア
 16275:         //  INEX2  常にクリア
 16276:         //  INEX1  引数がpackedで正確に変換できないときセット、それ以外はクリア
 16277:         XEiJ.fpuBox.epbSetRoundingPrec (EFPBox.EPB_PREC_DBL);
 16278:         XEiJ.fpuFPn[n].abs (XEiJ.fpuFPn[m]);
 16279:         break;
 16280: 
 16281:         //case 0b101_1101:  //$xx5D:
 16282: 
 16283:       case 0b101_1110:  //$xx5E: FDNEG.* *m,FPn
 16284:         //  BSUN   常にクリア
 16285:         //  SNAN   引数がシグナリングNaNのときセット、それ以外はクリア
 16286:         //  OPERR  常にクリア
 16287:         //  OVFL   常にクリア
 16288:         //  UNFL   結果が非正規化数のときセット、それ以外はクリア
 16289:         //  DZ     常にクリア
 16290:         //  INEX2  常にクリア
 16291:         //  INEX1  引数がpackedで正確に変換できないときセット、それ以外はクリア
 16292:         XEiJ.fpuBox.epbSetRoundingPrec (EFPBox.EPB_PREC_DBL);
 16293:         XEiJ.fpuFPn[n].neg (XEiJ.fpuFPn[m]);
 16294:         break;
 16295: 
 16296:         //case 0b101_1111:  //$xx5F:
 16297: 
 16298:       case 0b110_0000:  //$xx60: FSDIV.* *m,FPn
 16299:         //  BSUN   常にクリア
 16300:         //  SNAN   引数がシグナリングNaNのときセット、それ以外はクリア
 16301:         //  OPERR  引数が両方ゼロまたは両方無限大のときセット、それ以外はクリア
 16302:         //  OVFL   オーバーフローしたときセット、それ以外はクリア
 16303:         //  UNFL   結果が非正規化数のときセット、それ以外はクリア
 16304:         //  DZ     被除数がゼロ、無限大、NaN以外で除数がゼロのときセット、それ以外はクリア
 16305:         //  INEX2  結果に誤差があるときセット、それ以外はクリア
 16306:         //  INEX1  引数がpackedで正確に変換できないときセット、それ以外はクリア
 16307:         XEiJ.mpuCycleCount += 36;
 16308:         XEiJ.fpuBox.epbSetRoundingPrec (EFPBox.EPB_PREC_SGL);
 16309:         XEiJ.fpuFPn[n].div (XEiJ.fpuFPn[m]);
 16310:         break;
 16311: 
 16312:         //case 0b110_0001:  //$xx61:
 16313: 
 16314:       case 0b110_0010:  //$xx62: FSADD.* *m,FPn
 16315:         //  BSUN   常にクリア
 16316:         //  SNAN   引数がシグナリングNaNのときセット、それ以外はクリア
 16317:         //  OPERR  引数が両方無限大で符号が異なるときセット、それ以外はクリア
 16318:         //  OVFL   オーバーフローしたときセット、それ以外はクリア
 16319:         //  UNFL   結果が非正規化数のときセット、それ以外はクリア
 16320:         //  DZ     常にクリア
 16321:         //  INEX2  結果に誤差があるときセット、それ以外はクリア
 16322:         //  INEX1  引数がpackedで正確に変換できないときセット、それ以外はクリア
 16323:         XEiJ.mpuCycleCount += 2;
 16324:         XEiJ.fpuBox.epbSetRoundingPrec (EFPBox.EPB_PREC_SGL);
 16325:         XEiJ.fpuFPn[n].add (XEiJ.fpuFPn[m]);
 16326:         break;
 16327: 
 16328:       case 0b110_0011:  //$xx63: FSMUL.* *m,FPn
 16329:         //  BSUN   常にクリア
 16330:         //  SNAN   引数がシグナリングNaNのときセット、それ以外はクリア
 16331:         //  OPERR  引数の一方がゼロで他方が無限大のときセット、それ以外はクリア
 16332:         //  OVFL   オーバーフローしたときセット、それ以外はクリア
 16333:         //  UNFL   結果が非正規化数のときセット、それ以外はクリア
 16334:         //  DZ     常にクリア
 16335:         //  INEX2  結果に誤差があるときセット、それ以外はクリア
 16336:         //  INEX1  引数がpackedで正確に変換できないときセット、それ以外はクリア
 16337:         XEiJ.mpuCycleCount += 2;
 16338:         XEiJ.fpuBox.epbSetRoundingPrec (EFPBox.EPB_PREC_SGL);
 16339:         XEiJ.fpuFPn[n].mul (XEiJ.fpuFPn[m]);
 16340:         break;
 16341: 
 16342:       case 0b110_0100:  //$xx64: FDDIV.* *m,FPn
 16343:         //  BSUN   常にクリア
 16344:         //  SNAN   引数がシグナリングNaNのときセット、それ以外はクリア
 16345:         //  OPERR  引数が両方ゼロまたは両方無限大のときセット、それ以外はクリア
 16346:         //  OVFL   オーバーフローしたときセット、それ以外はクリア
 16347:         //  UNFL   結果が非正規化数のときセット、それ以外はクリア
 16348:         //  DZ     被除数がゼロ、無限大、NaN以外で除数がゼロのときセット、それ以外はクリア
 16349:         //  INEX2  結果に誤差があるときセット、それ以外はクリア
 16350:         //  INEX1  引数がpackedで正確に変換できないときセット、それ以外はクリア
 16351:         XEiJ.mpuCycleCount += 36;
 16352:         XEiJ.fpuBox.epbSetRoundingPrec (EFPBox.EPB_PREC_DBL);
 16353:         XEiJ.fpuFPn[n].div (XEiJ.fpuFPn[m]);
 16354:         break;
 16355: 
 16356:         //case 0b110_0101:  //$xx65:
 16357: 
 16358:       case 0b110_0110:  //$xx66: FDADD.* *m,FPn
 16359:         //  BSUN   常にクリア
 16360:         //  SNAN   引数がシグナリングNaNのときセット、それ以外はクリア
 16361:         //  OPERR  引数が両方無限大で符号が異なるときセット、それ以外はクリア
 16362:         //  OVFL   オーバーフローしたときセット、それ以外はクリア
 16363:         //  UNFL   結果が非正規化数のときセット、それ以外はクリア
 16364:         //  DZ     常にクリア
 16365:         //  INEX2  結果に誤差があるときセット、それ以外はクリア
 16366:         //  INEX1  引数がpackedで正確に変換できないときセット、それ以外はクリア
 16367:         XEiJ.mpuCycleCount += 2;
 16368:         XEiJ.fpuBox.epbSetRoundingPrec (EFPBox.EPB_PREC_DBL);
 16369:         XEiJ.fpuFPn[n].add (XEiJ.fpuFPn[m]);
 16370:         break;
 16371: 
 16372:       case 0b110_0111:  //$xx67: FDMUL.* *m,FPn
 16373:         //  BSUN   常にクリア
 16374:         //  SNAN   引数がシグナリングNaNのときセット、それ以外はクリア
 16375:         //  OPERR  引数の一方がゼロで他方が無限大のときセット、それ以外はクリア
 16376:         //  OVFL   オーバーフローしたときセット、それ以外はクリア
 16377:         //  UNFL   結果が非正規化数のときセット、それ以外はクリア
 16378:         //  DZ     常にクリア
 16379:         //  INEX2  結果に誤差があるときセット、それ以外はクリア
 16380:         //  INEX1  引数がpackedで正確に変換できないときセット、それ以外はクリア
 16381:         XEiJ.mpuCycleCount += 2;
 16382:         XEiJ.fpuBox.epbSetRoundingPrec (EFPBox.EPB_PREC_DBL);
 16383:         XEiJ.fpuFPn[n].mul (XEiJ.fpuFPn[m]);
 16384:         break;
 16385: 
 16386:       case 0b110_1000:  //$xx68: FSSUB.* *m,FPn
 16387:         //  BSUN   常にクリア
 16388:         //  SNAN   引数がシグナリングNaNのときセット、それ以外はクリア
 16389:         //  OPERR  引数が両方無限大で符号が同じときセット、それ以外はクリア
 16390:         //  OVFL   オーバーフローしたときセット、それ以外はクリア
 16391:         //  UNFL   結果が非正規化数のときセット、それ以外はクリア
 16392:         //  DZ     常にクリア
 16393:         //  INEX2  結果に誤差があるときセット、それ以外はクリア
 16394:         //  INEX1  引数がpackedで正確に変換できないときセット、それ以外はクリア
 16395:         XEiJ.mpuCycleCount += 2;
 16396:         XEiJ.fpuBox.epbSetRoundingPrec (EFPBox.EPB_PREC_SGL);
 16397:         XEiJ.fpuFPn[n].sub (XEiJ.fpuFPn[m]);
 16398:         break;
 16399: 
 16400:         //case 0b110_1001:  //$xx69:
 16401:         //case 0b110_1010:  //$xx6A:
 16402:         //case 0b110_1011:  //$xx6B:
 16403: 
 16404:       case 0b110_1100:  //$xx6C: FDSUB.* *m,FPn
 16405:         //  BSUN   常にクリア
 16406:         //  SNAN   引数がシグナリングNaNのときセット、それ以外はクリア
 16407:         //  OPERR  引数が両方無限大で符号が同じときセット、それ以外はクリア
 16408:         //  OVFL   オーバーフローしたときセット、それ以外はクリア
 16409:         //  UNFL   結果が非正規化数のときセット、それ以外はクリア
 16410:         //  DZ     常にクリア
 16411:         //  INEX2  結果に誤差があるときセット、それ以外はクリア
 16412:         //  INEX1  引数がpackedで正確に変換できないときセット、それ以外はクリア
 16413:         XEiJ.mpuCycleCount += 2;
 16414:         XEiJ.fpuBox.epbSetRoundingPrec (EFPBox.EPB_PREC_DBL);
 16415:         XEiJ.fpuFPn[n].sub (XEiJ.fpuFPn[m]);
 16416:         break;
 16417: 
 16418:         //case 0b110_1101:  //$xx6D:
 16419:         //case 0b110_1110:  //$xx6E:
 16420:         //case 0b110_1111:  //$xx6F:
 16421: 
 16422:       case 0b111_0000:  //$xx70: FLGAMMA *m,FPn
 16423:         if (EFPBox.EPB_EXTRA_OPERATION) {
 16424:           XEiJ.fpuFPn[n].lgamma (XEiJ.fpuFPn[m]);
 16425:           break;
 16426:         } else {
 16427:           XEiJ.regPC = XEiJ.regPC0 + 2;  //拡張ワードを読まなかったことにする
 16428:           irpFline ();
 16429:           break fgen;
 16430:         }
 16431: 
 16432:       case 0b111_0001:  //$xx71: FTGAMMA *m,FPn
 16433:         if (EFPBox.EPB_EXTRA_OPERATION) {
 16434:           XEiJ.fpuFPn[n].tgamma (XEiJ.fpuFPn[m]);
 16435:           break;
 16436:         } else {
 16437:           XEiJ.regPC = XEiJ.regPC0 + 2;  //拡張ワードを読まなかったことにする
 16438:           irpFline ();
 16439:           break fgen;
 16440:         }
 16441: 
 16442:         //case 0b111_0010:  //$xx72:
 16443:         //case 0b111_0011:  //$xx73:
 16444:         //case 0b111_0100:  //$xx74:
 16445:         //case 0b111_0101:  //$xx75:
 16446:         //case 0b111_0110:  //$xx76:
 16447:         //case 0b111_0111:  //$xx77:
 16448:         //case 0b111_1000:  //$xx78:
 16449:         //case 0b111_1001:  //$xx79:
 16450:         //case 0b111_1010:  //$xx7A:
 16451:         //case 0b111_1011:  //$xx7B:
 16452:         //case 0b111_1100:  //$xx7C:
 16453:         //case 0b111_1101:  //$xx7D:
 16454:         //case 0b111_1110:  //$xx7E:
 16455:         //case 0b111_1111:  //$xx7F:
 16456: 
 16457:       default:  //未定義
 16458:         XEiJ.regPC = XEiJ.regPC0 + 2;  //拡張ワードを読まなかったことにする
 16459:         irpFline ();
 16460:         break fgen;
 16461:       }
 16462:       //FPSRのFPCCを設定する
 16463:       XEiJ.fpuBox.epbFpsr |= XEiJ.fpuFPn[n].flg >>> 4;
 16464:       //FPSRのAEXCを設定する
 16465:       XEiJ.fpuBox.epbFpsr |= XEiJ.FPU_FPSR_EXC_TO_AEXC[XEiJ.fpuBox.epbFpsr >> 8 & 255];
 16466:       //浮動小数点命令実行後例外 floating-point post-instruction exception
 16467:       if (irpFPPostInstruction (a)) {
 16468:         break fgen;
 16469:       }
 16470:       break fgen;
 16471: 
 16472: 
 16473:     case 0b011:  //$6xxx-$7xxx: FMOVE.* FPn,<ea>
 16474:       //  BSUN   常にクリア
 16475:       //  SNAN   引数がシグナリングNaNのときセット、それ以外はクリア
 16476:       //  OPERR  byte,word,longで無限大または指定されたサイズに収まらないとき、packedでk-factorが17よりも大きいか指数部が3桁に収まらないときセット、それ以外はクリア
 16477:       //  OVFL   packedではなくてオーバーフローしたときセット、それ以外はクリア
 16478:       //  UNFL   packedではなくて結果が非正規化数のときセット、それ以外はクリア
 16479:       //  DZ     常にクリア
 16480:       //  INEX2  結果に誤差があるときセット、それ以外はクリア
 16481:       //  INEX1  常にクリア
 16482:       XEiJ.fpuBox.epbFpsr &= 0xffff00ff;  //FMOVE.* FPn,<ea>でFPSRのコンディションコードバイトは変化しない
 16483:       XEiJ.fpuBox.epbFpiar = XEiJ.regPC0;  //FPIARはFMOVEM/FMOVE FPcr/FSAVE/FRESTORE以外の命令で例外が発生しなくても更新される
 16484: 
 16485:       switch (m) {
 16486: 
 16487:       case 0b000:  //$60xx-$63xx: FMOVE.L FPn,<ea>
 16488:         {
 16489:           int i = XEiJ.fpuFPn[n].geti (XEiJ.fpuBox.epbRoundingMode);
 16490:           if (ea < XEiJ.EA_AR) {  //Dr。Ar不可
 16491:             XEiJ.regRn[ea] = i;
 16492:           } else {  //Dr以外
 16493:             a = efaMltLong (ea);
 16494:             mmuWriteLongData (a, i, XEiJ.regSRS);
 16495:           }
 16496:         }
 16497:         break;
 16498: 
 16499:       case 0b001:  //$64xx-$67xx: FMOVE.S FPn,<ea>
 16500:         {
 16501:           int i = XEiJ.fpuFPn[n].getf0 (XEiJ.fpuBox.epbRoundingMode);
 16502:           if (ea < XEiJ.EA_AR) {  //Dr。Ar不可
 16503:             XEiJ.regRn[ea] = i;
 16504:           } else {  //Dr以外
 16505:             a = efaMltLong (ea);
 16506:             mmuWriteLongData (a, i, XEiJ.regSRS);
 16507:           }
 16508:         }
 16509:         break;
 16510: 
 16511:       case 0b010:  //$68xx-$6Bxx: FMOVE.X FPn,<ea>
 16512:         {
 16513:           byte[] b = new byte[12];
 16514:           if (XEiJ.fpuBox.epbIsTriple ()) {  //三倍精度
 16515:             XEiJ.fpuFPn[n].gety012 (b, 0, XEiJ.fpuBox.epbRoundingMode);
 16516:           } else {  //拡張精度
 16517:             XEiJ.fpuFPn[n].getx012 (b, 0, XEiJ.fpuBox.epbRoundingMode);
 16518:           }
 16519:           a = efaMltExtd (ea);
 16520:           mmuWriteByteArray (a, b, 0, 12, XEiJ.regSRS);
 16521:         }
 16522:         break;
 16523: 
 16524:       case 0b011:  //$6Cxx-$6Fxx: FMOVE.P FPn,<ea>{#k}
 16525:         {
 16526:           a = efaMltExtd (ea);
 16527:           if (!XEiJ.fpuBox.epbIsFullSpec ()) {  //パックトデシマル
 16528:             XEiJ.fpuBox.epbExceptionStatusWord = 0xe000 | M68kException.M6E_FP_UNSUPPORTED_DATA_TYPE & 7;
 16529:             irpExceptionFormat3 (M68kException.M6E_FP_UNSUPPORTED_DATA_TYPE << 2, XEiJ.regPC, a);  //pcは次の命令,アドレスはデスティネーションオペランド
 16530:             break fgen;
 16531:           }
 16532:           byte[] b = new byte[12];
 16533:           XEiJ.fpuFPn[n].getp012 (b, 0, w);  //k-factor付き
 16534:           mmuWriteByteArray (a, b, 0, 12, XEiJ.regSRS);
 16535:         }
 16536:         break;
 16537: 
 16538:       case 0b100:  //$70xx-$73xx: FMOVE.W FPn,<ea>
 16539:         {
 16540:           int i = XEiJ.fpuFPn[n].gets (XEiJ.fpuBox.epbRoundingMode);
 16541:           if (ea < XEiJ.EA_AR) {  //Dr。Ar不可
 16542:             XEiJ.regRn[ea] = XEiJ.regRn[ea] & ~65535 | (char) i;
 16543:           } else {  //Dr以外
 16544:             a = efaMltWord (ea);
 16545:             mmuWriteWordData (a, i, XEiJ.regSRS);
 16546:           }
 16547:         }
 16548:         break;
 16549: 
 16550:       case 0b101:  //$74xx-$77xx: FMOVE.D FPn,<ea>
 16551:         {
 16552:           long l = XEiJ.fpuFPn[n].getd01 (XEiJ.fpuBox.epbRoundingMode);
 16553:           a = efaMltQuad (ea);
 16554:           mmuWriteQuadData (a, l, XEiJ.regSRS);
 16555:         }
 16556:         break;
 16557: 
 16558:       case 0b110:  //$78xx-$7Bxx: FMOVE.B FPn,<ea>
 16559:         {
 16560:           int i = XEiJ.fpuFPn[n].getb (XEiJ.fpuBox.epbRoundingMode);
 16561:           if (ea < XEiJ.EA_AR) {  //Dr。Ar不可
 16562:             XEiJ.regRn[ea] = XEiJ.regRn[ea] & ~255 | i & 255;
 16563:           } else {  //Dr以外
 16564:             a = efaMltByte (ea);
 16565:             mmuWriteByteData (a, i, XEiJ.regSRS);
 16566:           }
 16567:         }
 16568:         break;
 16569: 
 16570:       case 0b111:  //$7Cxx-$7Fxx: FMOVE.P FPn,<ea>{Dl}
 16571:       default:
 16572:         {
 16573:           a = efaMltExtd (ea);
 16574:           if (!XEiJ.fpuBox.epbIsFullSpec ()) {  //パックトデシマル
 16575:             XEiJ.fpuBox.epbExceptionStatusWord = 0xe000 | M68kException.M6E_FP_UNSUPPORTED_DATA_TYPE & 7;
 16576:             irpExceptionFormat3 (M68kException.M6E_FP_UNSUPPORTED_DATA_TYPE << 2, XEiJ.regPC, a);  //pcは次の命令,アドレスはデスティネーションオペランド
 16577:             break fgen;
 16578:           }
 16579:           byte[] b = new byte[12];
 16580:           XEiJ.fpuFPn[n].getp012 (b, 0, XEiJ.regRn[w >> 4 & 7]);  //k-factor付き
 16581:           mmuWriteByteArray (a, b, 0, 12, XEiJ.regSRS);
 16582:         }
 16583:       }
 16584:       //FPSRのAEXCを設定する
 16585:       XEiJ.fpuBox.epbFpsr |= XEiJ.FPU_FPSR_EXC_TO_AEXC[XEiJ.fpuBox.epbFpsr >> 8 & 255];
 16586:       //浮動小数点命令実行後例外 floating-point post-instruction exception
 16587:       if (irpFPPostInstruction (a)) {
 16588:         break fgen;
 16589:       }
 16590:       break fgen;
 16591: 
 16592: 
 16593:     case 0b100:  //$8xxx-$9xxx: FMOVEM.L <ea>,FPCR/FPSR/FPIAR
 16594:       XEiJ.mpuCycleCount += 6;
 16595:       //  FMOVEM命令は例外を発生させずFPCR/FPSR/FPIARも(デスティネーションに書かれたもの以外)変化しない
 16596:       //  格納順序はFPCRが下位アドレス(連結したとき上位),FPIARが上位アドレス(連結したとき下位)
 16597: 
 16598:       switch (m) {
 16599: 
 16600:       case 0b000:  //$8000: FMOVE.L <ea>,<>
 16601:         //  レジスタを1個も指定しないとFPIARが指定されたものとみなされる
 16602: 
 16603:       case 0b001:  //$8400: FMOVE.L <ea>,FPIAR
 16604:         {
 16605:           int i;
 16606:           if (ea < XEiJ.EA_MM) {  //Dr,Ar。Ar可
 16607:             //a = 0;
 16608:             i = XEiJ.regRn[ea];
 16609:           } else if (ea == XEiJ.EA_IM) {  //#<data>
 16610:             a = XEiJ.regPC;
 16611:             XEiJ.regPC = a + 4;
 16612:             i = mmuReadLongExword (a, XEiJ.regSRS);  //pcls
 16613:           } else {  //Dr,Ar,#<data>以外
 16614:             a = efaAnyLong (ea);
 16615:             i = mmuReadLongData (a, XEiJ.regSRS);
 16616:           }
 16617:           XEiJ.fpuBox.epbFpiar = i;
 16618:         }
 16619:         break;
 16620: 
 16621:       case 0b010:  //$8800: FMOVE.L <ea>,FPSR
 16622:         {
 16623:           int i;
 16624:           if (ea < XEiJ.EA_AR) {  //Dr。Ar不可
 16625:             //a = 0;
 16626:             i = XEiJ.regRn[ea];
 16627:           } else if (ea == XEiJ.EA_IM) {  //#<data>
 16628:             a = XEiJ.regPC;
 16629:             XEiJ.regPC = a + 4;
 16630:             i = mmuReadLongExword (a, XEiJ.regSRS);  //pcls
 16631:           } else {  //Dr,#<data>以外
 16632:             a = efaAnyLong (ea);
 16633:             i = mmuReadLongData (a, XEiJ.regSRS);
 16634:           }
 16635:           XEiJ.fpuBox.epbFpsr = i & EFPBox.EPB_FPSR_ALL;
 16636:           //  fmove.lでfpsrのEXCに書き込んだだけではAEXCは更新されない
 16637:           //  fmove.lでfpsrに0x0000ff00を書き込んですぐに読み出しても0x0000ff00のまま
 16638:         }
 16639:         break;
 16640: 
 16641:       case 0b011:  //$8C00: FMOVEM.L <ea>,FPSR/FPIAR
 16642:         {
 16643:           long l;
 16644:           if (ea == XEiJ.EA_IM) {  //#<data>
 16645:             if (!XEiJ.fpuBox.epbIsFullSpec ()) {  //8バイトのイミディエイト
 16646:               irpExceptionFormat0 (M68kException.M6E_UNIMPLEMENTED_EFFECTIVE << 2, XEiJ.regPC0);  //pcは命令の先頭
 16647:               break fgen;
 16648:             }
 16649:             a = XEiJ.regPC;
 16650:             XEiJ.regPC = a + 8;
 16651:             l = mmuReadQuadExword (a, XEiJ.regSRS);
 16652:           } else {  //#<data>以外
 16653:             a = efaAnyQuad (ea);
 16654:             l = mmuReadQuadData (a, XEiJ.regSRS);
 16655:           }
 16656:           XEiJ.fpuBox.epbFpsr = (int) (l >>> 32) & EFPBox.EPB_FPSR_ALL;
 16657:           XEiJ.fpuBox.epbFpiar = (int) l;
 16658:         }
 16659:         break;
 16660: 
 16661:       case 0b100:  //$9000: FMOVE.L <ea>,FPCR
 16662:         {
 16663:           int i;
 16664:           if (ea < XEiJ.EA_AR) {  //Dr。Ar不可
 16665:             a = 0;
 16666:             i = XEiJ.regRn[ea];
 16667:           } else if (ea == XEiJ.EA_IM) {  //#<data>
 16668:             a = XEiJ.regPC;
 16669:             XEiJ.regPC = a + 4;
 16670:             i = mmuReadLongExword (a, XEiJ.regSRS);  //pcls
 16671:           } else {  //Dr,#<data>以外
 16672:             a = efaAnyLong (ea);
 16673:             i = mmuReadLongData (a, XEiJ.regSRS);
 16674:           }
 16675:           XEiJ.fpuBox.epbFpcr = i & EFPBox.EPB_FPCR_ALL;
 16676:         }
 16677:         break;
 16678: 
 16679:       case 0b101:  //$9400: FMOVEM.L <ea>,FPCR/FPIAR
 16680:         {
 16681:           long l;
 16682:           if (ea == XEiJ.EA_IM) {  //#<data>
 16683:             if (!XEiJ.fpuBox.epbIsFullSpec ()) {  //8バイトのイミディエイト
 16684:               irpExceptionFormat0 (M68kException.M6E_UNIMPLEMENTED_EFFECTIVE << 2, XEiJ.regPC0);  //pcは命令の先頭
 16685:               break fgen;
 16686:             }
 16687:             a = XEiJ.regPC;
 16688:             XEiJ.regPC = a + 8;
 16689:             l = mmuReadQuadExword (a, XEiJ.regSRS);
 16690:           } else {  //#<data>以外
 16691:             a = efaAnyQuad (ea);
 16692:             l = mmuReadQuadData (a, XEiJ.regSRS);
 16693:           }
 16694:           XEiJ.fpuBox.epbFpcr = (int) (l >>> 32) & EFPBox.EPB_FPCR_ALL;
 16695:           XEiJ.fpuBox.epbFpiar = (int) l;
 16696:         }
 16697:         break;
 16698: 
 16699:       case 0b110:  //$9800: FMOVEM.L <ea>,FPCR/FPSR
 16700:         {
 16701:           long l;
 16702:           if (ea == XEiJ.EA_IM) {  //#<data>
 16703:             if (!XEiJ.fpuBox.epbIsFullSpec ()) {  //8バイトのイミディエイト
 16704:               irpExceptionFormat0 (M68kException.M6E_UNIMPLEMENTED_EFFECTIVE << 2, XEiJ.regPC0);  //pcは命令の先頭
 16705:               break fgen;
 16706:             }
 16707:             a = XEiJ.regPC;
 16708:             XEiJ.regPC = a + 8;
 16709:             l = mmuReadQuadExword (a, XEiJ.regSRS);
 16710:           } else {  //#<data>以外
 16711:             a = efaAnyQuad (ea);
 16712:             l = mmuReadQuadData (a, XEiJ.regSRS);
 16713:           }
 16714:           XEiJ.fpuBox.epbFpcr = (int) (l >>> 32) & EFPBox.EPB_FPCR_ALL;
 16715:           XEiJ.fpuBox.epbFpsr = (int) l & EFPBox.EPB_FPSR_ALL;
 16716:         }
 16717:         break;
 16718: 
 16719:       case 0b111:  //$9C00: FMOVEM.L <ea>,FPCR/FPSR/FPIAR
 16720:       default:
 16721:         {
 16722:           int i;
 16723:           long l;
 16724:           if (ea == XEiJ.EA_IM) {  //#<data>
 16725:             if (!XEiJ.fpuBox.epbIsFullSpec ()) {  //12バイトのイミディエイト
 16726:               irpExceptionFormat0 (M68kException.M6E_UNIMPLEMENTED_EFFECTIVE << 2, XEiJ.regPC0);  //pcは命令の先頭
 16727:               break fgen;
 16728:             }
 16729:             a = XEiJ.regPC;
 16730:             XEiJ.regPC = a + 12;
 16731:             i = mmuReadLongExword (a, XEiJ.regSRS);
 16732:             l = mmuReadQuadExword (a + 4, XEiJ.regSRS);
 16733:           } else {  //#<data>以外
 16734:             a = efaAnyExtd (ea);
 16735:             i = mmuReadLongData (a, XEiJ.regSRS);
 16736:             l = mmuReadQuadSecond (a + 4, XEiJ.regSRS);
 16737:           }
 16738:           XEiJ.fpuBox.epbFpcr = i & EFPBox.EPB_FPCR_ALL;
 16739:           XEiJ.fpuBox.epbFpsr = (int) (l >>> 32) & EFPBox.EPB_FPSR_ALL;
 16740:           XEiJ.fpuBox.epbFpiar = (int) l;
 16741:         }
 16742:         break;
 16743:       }
 16744:       break fgen;
 16745: 
 16746: 
 16747:     case 0b101:  //$Axxx-$Bxxx: FMOVEM.L FPCR/FPSR/FPIAR,<ea>
 16748:       //  FMOVEM命令は例外を発生させずFPCR/FPSR/FPIARも(デスティネーションに書かれたもの以外)変化しない
 16749:       XEiJ.mpuCycleCount += 4;
 16750: 
 16751:       switch (m) {
 16752: 
 16753:       case 0b000:  //$A000: FMOVE.L <>,<ea>
 16754:         //  レジスタを1個も指定しないとFPIARが指定されたものとみなされる
 16755: 
 16756:       case 0b001:  //$A400: FMOVE.L FPIAR,<ea>
 16757:         {
 16758:           int i = XEiJ.fpuBox.epbFpiar;
 16759:           if (ea < XEiJ.EA_MM) {  //Dr,Ar。Ar可
 16760:             //a = 0;
 16761:             XEiJ.regRn[ea] = i;
 16762:           } else {  //Dr,Ar以外
 16763:             a = efaMltLong (ea);
 16764:             mmuWriteLongData (a, i, XEiJ.regSRS);
 16765:           }
 16766:         }
 16767:         break;
 16768: 
 16769:       case 0b010:  //$A800: FMOVE.L FPSR,<ea>
 16770:         {
 16771:           int i = XEiJ.fpuBox.epbFpsr;
 16772:           if (ea < XEiJ.EA_AR) {  //Dr。Ar不可
 16773:             //a = 0;
 16774:             XEiJ.regRn[ea] = i;
 16775:           } else {  //Dr以外
 16776:             a = efaMltLong (ea);
 16777:             mmuWriteLongData (a, i, XEiJ.regSRS);
 16778:           }
 16779:         }
 16780:         break;
 16781: 
 16782:       case 0b011:  //$AC00: FMOVEM.L FPSR/FPIAR,<ea>
 16783:         {
 16784:           long l = (long) XEiJ.fpuBox.epbFpsr << 32 | XEiJ.fpuBox.epbFpiar & 0xffffffffL;
 16785:           a = efaMltQuad (ea);
 16786:           mmuWriteQuadData (a, l, XEiJ.regSRS);
 16787:         }
 16788:         break;
 16789: 
 16790:       case 0b100:  //$B000: FMOVE.L FPCR,<ea>
 16791:         {
 16792:           int i = XEiJ.fpuBox.epbFpcr;
 16793:           if (ea < XEiJ.EA_AR) {  //Dr。Ar不可
 16794:             //a = 0;
 16795:             XEiJ.regRn[ea] = i;
 16796:           } else {  //Dr以外
 16797:             a = efaMltLong (ea);
 16798:             mmuWriteLongData (a, i, XEiJ.regSRS);
 16799:           }
 16800:         }
 16801:         break;
 16802: 
 16803:       case 0b101:  //$B400: FMOVEM.L FPCR/FPIAR,<ea>
 16804:         {
 16805:           long l = (long) XEiJ.fpuBox.epbFpcr << 32 | XEiJ.fpuBox.epbFpiar & 0xffffffffL;
 16806:           a = efaMltQuad (ea);
 16807:           mmuWriteQuadData (a, l, XEiJ.regSRS);
 16808:         }
 16809:         break;
 16810: 
 16811:       case 0b110:  //$B800: FMOVEM.L FPCR/FPSR,<ea>
 16812:         {
 16813:           long l = (long) XEiJ.fpuBox.epbFpcr << 32 | XEiJ.fpuBox.epbFpsr & 0xffffffffL;
 16814:           a = efaMltQuad (ea);
 16815:           mmuWriteQuadData (a, l, XEiJ.regSRS);
 16816:         }
 16817:         break;
 16818: 
 16819:       case 0b111:  //$BC00: FMOVEM.L FPCR/FPSR/FPIAR,<ea>
 16820:       default:
 16821:         {
 16822:           int i = XEiJ.fpuBox.epbFpcr;
 16823:           long l = (long) XEiJ.fpuBox.epbFpsr << 32 | XEiJ.fpuBox.epbFpiar & 0xffffffffL;
 16824:           a = efaMltExtd (ea);
 16825:           mmuWriteLongData (a, i, XEiJ.regSRS);
 16826:           mmuWriteQuadSecond (a + 4, l, XEiJ.regSRS);
 16827:         }
 16828:         break;
 16829:       }
 16830:       break fgen;
 16831: 
 16832: 
 16833:     case 0b110:  //$Cxxx-$Dxxx: FMOVEM.X <ea>,<list>
 16834:       //  FMOVEM命令は例外を発生させずFPCR/FPSR/FPIARも(デスティネーションに書かれたもの以外)変化しない
 16835:       {
 16836:         if ((m & 2) != 0 && !XEiJ.fpuBox.epbIsFullSpec ()) {  //動的レジスタリスト
 16837:           irpExceptionFormat0 (M68kException.M6E_UNIMPLEMENTED_EFFECTIVE << 2, XEiJ.regPC0);  //pcは命令の先頭
 16838:           break fgen;
 16839:         }
 16840:         byte[] b = new byte[12];
 16841:         int list = ((m & 2) == 0 ? w : XEiJ.regRn[w >> 4 & 7]) << 24;
 16842:         if (ea >> 3 == XEiJ.MMM_MP) {  //(Ar)+
 16843:           int arr = XEiJ.regOC & 7 | 8;
 16844:           a = XEiJ.regRn[arr];
 16845:           for (n = 0; list != 0; n++, list <<= 1) {
 16846:             if (list < 0) {
 16847:               XEiJ.mpuCycleCount += 3;
 16848:               mmuReadByteArray (a, b, 0, 12, XEiJ.regSRS);
 16849:               if (XEiJ.fpuBox.epbIsTriple ()) {  //三倍精度
 16850:                 XEiJ.fpuFPn[n].sety012 (b, 0);
 16851:               } else {  //拡張精度
 16852:                 XEiJ.fpuFPn[n].setx012 (b, 0);
 16853:               }
 16854:               a += 12;
 16855:             }
 16856:           }
 16857:           XEiJ.regRn[arr] = a;
 16858:         } else {  //(Ar)+以外
 16859:           a = efaCntLong (ea);
 16860:           for (n = 0; list != 0; n++, list <<= 1) {
 16861:             if (list < 0) {
 16862:               XEiJ.mpuCycleCount += 3;
 16863:               mmuReadByteArray (a, b, 0, 12, XEiJ.regSRS);
 16864:               if (XEiJ.fpuBox.epbIsTriple ()) {  //三倍精度
 16865:                 XEiJ.fpuFPn[n].sety012 (b, 0);
 16866:               } else {  //拡張精度
 16867:                 XEiJ.fpuFPn[n].setx012 (b, 0);
 16868:               }
 16869:               a += 12;
 16870:             }
 16871:           }
 16872:         }
 16873:       }
 16874:       break fgen;
 16875: 
 16876: 
 16877:     case 0b111:  //$Exxx-$Fxxx: FMOVEM.X <list>,<ea>
 16878:       //  FMOVEM命令は例外を発生させずFPCR/FPSR/FPIARも(デスティネーションに書かれたもの以外)変化しない
 16879:       {
 16880:         if ((m & 2) != 0 && !XEiJ.fpuBox.epbIsFullSpec ()) {  //動的レジスタリスト
 16881:           irpExceptionFormat0 (M68kException.M6E_UNIMPLEMENTED_EFFECTIVE << 2, XEiJ.regPC0);  //pcは命令の先頭
 16882:           break fgen;
 16883:         }
 16884:         byte[] b = new byte[12];
 16885:         int list = ((m & 2) == 0 ? w : XEiJ.regRn[w >> 4 & 7]) << 24;
 16886:         if (ea >> 3 == XEiJ.MMM_MN) {  //-(Ar)
 16887:           int arr = XEiJ.regOC & 7 | 8;
 16888:           a = XEiJ.regRn[arr];
 16889:           for (n = 7; list != 0; n--, list <<= 1) {
 16890:             if (list < 0) {
 16891:               XEiJ.mpuCycleCount += 3;
 16892:               a -= 12;
 16893:               if (XEiJ.fpuBox.epbIsTriple ()) {  //三倍精度
 16894:                 XEiJ.fpuFPn[n].gety012 (b, 0, XEiJ.fpuBox.epbRoundingMode);
 16895:               } else {  //拡張精度
 16896:                 XEiJ.fpuFPn[n].getx012 (b, 0, XEiJ.fpuBox.epbRoundingMode);
 16897:               }
 16898:               mmuWriteByteArray (a, b, 0, 12, XEiJ.regSRS);
 16899:             }
 16900:           }
 16901:           XEiJ.regRn[arr] = a;
 16902:         } else {  //-(Ar)以外
 16903:           a = efaCltLong (ea);
 16904:           for (n = 0; list != 0; n++, list <<= 1) {
 16905:             if (list < 0) {
 16906:               XEiJ.mpuCycleCount += 3;
 16907:               if (XEiJ.fpuBox.epbIsTriple ()) {  //三倍精度
 16908:                 XEiJ.fpuFPn[n].gety012 (b, 0, XEiJ.fpuBox.epbRoundingMode);
 16909:               } else {  //拡張精度
 16910:                 XEiJ.fpuFPn[n].getx012 (b, 0, XEiJ.fpuBox.epbRoundingMode);
 16911:               }
 16912:               mmuWriteByteArray (a, b, 0, 12, XEiJ.regSRS);
 16913:               a += 12;
 16914:             }
 16915:           }
 16916:         }
 16917:       }
 16918:       break fgen;
 16919: 
 16920: 
 16921:     case 0b001:  //$2xxx-$3xxx: 未定義
 16922:     default:  //未定義
 16923:       XEiJ.fpuBox.epbFpiar = XEiJ.regPC0;  //FPIARはFMOVEM/FMOVE FPcr/FSAVE/FRESTORE以外の命令で例外が発生しなくても更新される
 16924:       XEiJ.regPC = XEiJ.regPC0 + 2;  //拡張ワードを読まなかったことにする
 16925:       irpFline ();
 16926:       break fgen;
 16927:     }
 16928:   }  //fgen
 16929:   }  //irpFgen
 16930: 
 16931: 
 16932:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 16933:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 16934:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 16935:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 16936:   //FSF.B <ea>                                      |-|--CC4S|-|-----|-----|D M+-WXZ  |1111_001_001_mmm_rrr-0000000000000000
 16937:   //FSEQ.B <ea>                                     |-|--CC4S|-|-----|-----|D M+-WXZ  |1111_001_001_mmm_rrr-0000000000000001
 16938:   //FSOGT.B <ea>                                    |-|--CC4S|-|-----|-----|D M+-WXZ  |1111_001_001_mmm_rrr-0000000000000010
 16939:   //FSOGE.B <ea>                                    |-|--CC4S|-|-----|-----|D M+-WXZ  |1111_001_001_mmm_rrr-0000000000000011
 16940:   //FSOLT.B <ea>                                    |-|--CC4S|-|-----|-----|D M+-WXZ  |1111_001_001_mmm_rrr-0000000000000100
 16941:   //FSOLE.B <ea>                                    |-|--CC4S|-|-----|-----|D M+-WXZ  |1111_001_001_mmm_rrr-0000000000000101
 16942:   //FSOGL.B <ea>                                    |-|--CC4S|-|-----|-----|D M+-WXZ  |1111_001_001_mmm_rrr-0000000000000110
 16943:   //FSOR.B <ea>                                     |-|--CC4S|-|-----|-----|D M+-WXZ  |1111_001_001_mmm_rrr-0000000000000111
 16944:   //FSUN.B <ea>                                     |-|--CC4S|-|-----|-----|D M+-WXZ  |1111_001_001_mmm_rrr-0000000000001000
 16945:   //FSUEQ.B <ea>                                    |-|--CC4S|-|-----|-----|D M+-WXZ  |1111_001_001_mmm_rrr-0000000000001001
 16946:   //FSUGT.B <ea>                                    |-|--CC4S|-|-----|-----|D M+-WXZ  |1111_001_001_mmm_rrr-0000000000001010
 16947:   //FSUGE.B <ea>                                    |-|--CC4S|-|-----|-----|D M+-WXZ  |1111_001_001_mmm_rrr-0000000000001011
 16948:   //FSULT.B <ea>                                    |-|--CC4S|-|-----|-----|D M+-WXZ  |1111_001_001_mmm_rrr-0000000000001100
 16949:   //FSULE.B <ea>                                    |-|--CC4S|-|-----|-----|D M+-WXZ  |1111_001_001_mmm_rrr-0000000000001101
 16950:   //FSNE.B <ea>                                     |-|--CC4S|-|-----|-----|D M+-WXZ  |1111_001_001_mmm_rrr-0000000000001110
 16951:   //FST.B <ea>                                      |-|--CC4S|-|-----|-----|D M+-WXZ  |1111_001_001_mmm_rrr-0000000000001111
 16952:   //FSSF.B <ea>                                     |-|--CC4S|-|-----|-----|D M+-WXZ  |1111_001_001_mmm_rrr-0000000000010000
 16953:   //FSSEQ.B <ea>                                    |-|--CC4S|-|-----|-----|D M+-WXZ  |1111_001_001_mmm_rrr-0000000000010001
 16954:   //FSGT.B <ea>                                     |-|--CC4S|-|-----|-----|D M+-WXZ  |1111_001_001_mmm_rrr-0000000000010010
 16955:   //FSGE.B <ea>                                     |-|--CC4S|-|-----|-----|D M+-WXZ  |1111_001_001_mmm_rrr-0000000000010011
 16956:   //FSLT.B <ea>                                     |-|--CC4S|-|-----|-----|D M+-WXZ  |1111_001_001_mmm_rrr-0000000000010100
 16957:   //FSLE.B <ea>                                     |-|--CC4S|-|-----|-----|D M+-WXZ  |1111_001_001_mmm_rrr-0000000000010101
 16958:   //FSGL.B <ea>                                     |-|--CC4S|-|-----|-----|D M+-WXZ  |1111_001_001_mmm_rrr-0000000000010110
 16959:   //FSGLE.B <ea>                                    |-|--CC4S|-|-----|-----|D M+-WXZ  |1111_001_001_mmm_rrr-0000000000010111
 16960:   //FSNGLE.B <ea>                                   |-|--CC4S|-|-----|-----|D M+-WXZ  |1111_001_001_mmm_rrr-0000000000011000
 16961:   //FSNGL.B <ea>                                    |-|--CC4S|-|-----|-----|D M+-WXZ  |1111_001_001_mmm_rrr-0000000000011001
 16962:   //FSNLE.B <ea>                                    |-|--CC4S|-|-----|-----|D M+-WXZ  |1111_001_001_mmm_rrr-0000000000011010
 16963:   //FSNLT.B <ea>                                    |-|--CC4S|-|-----|-----|D M+-WXZ  |1111_001_001_mmm_rrr-0000000000011011
 16964:   //FSNGE.B <ea>                                    |-|--CC4S|-|-----|-----|D M+-WXZ  |1111_001_001_mmm_rrr-0000000000011100
 16965:   //FSNGT.B <ea>                                    |-|--CC4S|-|-----|-----|D M+-WXZ  |1111_001_001_mmm_rrr-0000000000011101
 16966:   //FSSNE.B <ea>                                    |-|--CC4S|-|-----|-----|D M+-WXZ  |1111_001_001_mmm_rrr-0000000000011110
 16967:   //FSST.B <ea>                                     |-|--CC4S|-|-----|-----|D M+-WXZ  |1111_001_001_mmm_rrr-0000000000011111
 16968:   //FDBF Dr,<label>                                 |-|--CC4S|-|-----|-----|          |1111_001_001_001_rrr-0000000000000000-{offset}
 16969:   //FDBRA Dr,<label>                                |A|--CC4S|-|-----|-----|          |1111_001_001_001_rrr-0000000000000000-{offset}       [FDBF Dr,<label>]
 16970:   //FDBEQ Dr,<label>                                |-|--CC4S|-|-----|-----|          |1111_001_001_001_rrr-0000000000000001-{offset}
 16971:   //FDBOGT Dr,<label>                               |-|--CC4S|-|-----|-----|          |1111_001_001_001_rrr-0000000000000010-{offset}
 16972:   //FDBOGE Dr,<label>                               |-|--CC4S|-|-----|-----|          |1111_001_001_001_rrr-0000000000000011-{offset}
 16973:   //FDBOLT Dr,<label>                               |-|--CC4S|-|-----|-----|          |1111_001_001_001_rrr-0000000000000100-{offset}
 16974:   //FDBOLE Dr,<label>                               |-|--CC4S|-|-----|-----|          |1111_001_001_001_rrr-0000000000000101-{offset}
 16975:   //FDBOGL Dr,<label>                               |-|--CC4S|-|-----|-----|          |1111_001_001_001_rrr-0000000000000110-{offset}
 16976:   //FDBOR Dr,<label>                                |-|--CC4S|-|-----|-----|          |1111_001_001_001_rrr-0000000000000111-{offset}
 16977:   //FDBUN Dr,<label>                                |-|--CC4S|-|-----|-----|          |1111_001_001_001_rrr-0000000000001000-{offset}
 16978:   //FDBUEQ Dr,<label>                               |-|--CC4S|-|-----|-----|          |1111_001_001_001_rrr-0000000000001001-{offset}
 16979:   //FDBUGT Dr,<label>                               |-|--CC4S|-|-----|-----|          |1111_001_001_001_rrr-0000000000001010-{offset}
 16980:   //FDBUGE Dr,<label>                               |-|--CC4S|-|-----|-----|          |1111_001_001_001_rrr-0000000000001011-{offset}
 16981:   //FDBULT Dr,<label>                               |-|--CC4S|-|-----|-----|          |1111_001_001_001_rrr-0000000000001100-{offset}
 16982:   //FDBULE Dr,<label>                               |-|--CC4S|-|-----|-----|          |1111_001_001_001_rrr-0000000000001101-{offset}
 16983:   //FDBNE Dr,<label>                                |-|--CC4S|-|-----|-----|          |1111_001_001_001_rrr-0000000000001110-{offset}
 16984:   //FDBT Dr,<label>                                 |-|--CC4S|-|-----|-----|          |1111_001_001_001_rrr-0000000000001111-{offset}
 16985:   //FDBSF Dr,<label>                                |-|--CC4S|-|-----|-----|          |1111_001_001_001_rrr-0000000000010000-{offset}
 16986:   //FDBSEQ Dr,<label>                               |-|--CC4S|-|-----|-----|          |1111_001_001_001_rrr-0000000000010001-{offset}
 16987:   //FDBGT Dr,<label>                                |-|--CC4S|-|-----|-----|          |1111_001_001_001_rrr-0000000000010010-{offset}
 16988:   //FDBGE Dr,<label>                                |-|--CC4S|-|-----|-----|          |1111_001_001_001_rrr-0000000000010011-{offset}
 16989:   //FDBLT Dr,<label>                                |-|--CC4S|-|-----|-----|          |1111_001_001_001_rrr-0000000000010100-{offset}
 16990:   //FDBLE Dr,<label>                                |-|--CC4S|-|-----|-----|          |1111_001_001_001_rrr-0000000000010101-{offset}
 16991:   //FDBGL Dr,<label>                                |-|--CC4S|-|-----|-----|          |1111_001_001_001_rrr-0000000000010110-{offset}
 16992:   //FDBGLE Dr,<label>                               |-|--CC4S|-|-----|-----|          |1111_001_001_001_rrr-0000000000010111-{offset}
 16993:   //FDBNGLE Dr,<label>                              |-|--CC4S|-|-----|-----|          |1111_001_001_001_rrr-0000000000011000-{offset}
 16994:   //FDBNGL Dr,<label>                               |-|--CC4S|-|-----|-----|          |1111_001_001_001_rrr-0000000000011001-{offset}
 16995:   //FDBNLE Dr,<label>                               |-|--CC4S|-|-----|-----|          |1111_001_001_001_rrr-0000000000011010-{offset}
 16996:   //FDBNLT Dr,<label>                               |-|--CC4S|-|-----|-----|          |1111_001_001_001_rrr-0000000000011011-{offset}
 16997:   //FDBNGE Dr,<label>                               |-|--CC4S|-|-----|-----|          |1111_001_001_001_rrr-0000000000011100-{offset}
 16998:   //FDBNGT Dr,<label>                               |-|--CC4S|-|-----|-----|          |1111_001_001_001_rrr-0000000000011101-{offset}
 16999:   //FDBSNE Dr,<label>                               |-|--CC4S|-|-----|-----|          |1111_001_001_001_rrr-0000000000011110-{offset}
 17000:   //FDBST Dr,<label>                                |-|--CC4S|-|-----|-----|          |1111_001_001_001_rrr-0000000000011111-{offset}
 17001:   //FTRAPF.W #<data>                                |-|--CC4S|-|-----|-----|          |1111_001_001_111_010-0000000000000000-{data}
 17002:   //FTRAPEQ.W #<data>                               |-|--CC4S|-|-----|-----|          |1111_001_001_111_010-0000000000000001-{data}
 17003:   //FTRAPOGT.W #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_010-0000000000000010-{data}
 17004:   //FTRAPOGE.W #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_010-0000000000000011-{data}
 17005:   //FTRAPOLT.W #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_010-0000000000000100-{data}
 17006:   //FTRAPOLE.W #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_010-0000000000000101-{data}
 17007:   //FTRAPOGL.W #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_010-0000000000000110-{data}
 17008:   //FTRAPOR.W #<data>                               |-|--CC4S|-|-----|-----|          |1111_001_001_111_010-0000000000000111-{data}
 17009:   //FTRAPUN.W #<data>                               |-|--CC4S|-|-----|-----|          |1111_001_001_111_010-0000000000001000-{data}
 17010:   //FTRAPUEQ.W #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_010-0000000000001001-{data}
 17011:   //FTRAPUGT.W #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_010-0000000000001010-{data}
 17012:   //FTRAPUGE.W #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_010-0000000000001011-{data}
 17013:   //FTRAPULT.W #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_010-0000000000001100-{data}
 17014:   //FTRAPULE.W #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_010-0000000000001101-{data}
 17015:   //FTRAPNE.W #<data>                               |-|--CC4S|-|-----|-----|          |1111_001_001_111_010-0000000000001110-{data}
 17016:   //FTRAPT.W #<data>                                |-|--CC4S|-|-----|-----|          |1111_001_001_111_010-0000000000001111-{data}
 17017:   //FTRAPSF.W #<data>                               |-|--CC4S|-|-----|-----|          |1111_001_001_111_010-0000000000010000-{data}
 17018:   //FTRAPSEQ.W #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_010-0000000000010001-{data}
 17019:   //FTRAPGT.W #<data>                               |-|--CC4S|-|-----|-----|          |1111_001_001_111_010-0000000000010010-{data}
 17020:   //FTRAPGE.W #<data>                               |-|--CC4S|-|-----|-----|          |1111_001_001_111_010-0000000000010011-{data}
 17021:   //FTRAPLT.W #<data>                               |-|--CC4S|-|-----|-----|          |1111_001_001_111_010-0000000000010100-{data}
 17022:   //FTRAPLE.W #<data>                               |-|--CC4S|-|-----|-----|          |1111_001_001_111_010-0000000000010101-{data}
 17023:   //FTRAPGL.W #<data>                               |-|--CC4S|-|-----|-----|          |1111_001_001_111_010-0000000000010110-{data}
 17024:   //FTRAPGLE.W #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_010-0000000000010111-{data}
 17025:   //FTRAPNGLE.W #<data>                             |-|--CC4S|-|-----|-----|          |1111_001_001_111_010-0000000000011000-{data}
 17026:   //FTRAPNGL.W #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_010-0000000000011001-{data}
 17027:   //FTRAPNLE.W #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_010-0000000000011010-{data}
 17028:   //FTRAPNLT.W #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_010-0000000000011011-{data}
 17029:   //FTRAPNGE.W #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_010-0000000000011100-{data}
 17030:   //FTRAPNGT.W #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_010-0000000000011101-{data}
 17031:   //FTRAPSNE.W #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_010-0000000000011110-{data}
 17032:   //FTRAPST.W #<data>                               |-|--CC4S|-|-----|-----|          |1111_001_001_111_010-0000000000011111-{data}
 17033:   //FTRAPF.L #<data>                                |-|--CC4S|-|-----|-----|          |1111_001_001_111_011-0000000000000000-{data}
 17034:   //FTRAPEQ.L #<data>                               |-|--CC4S|-|-----|-----|          |1111_001_001_111_011-0000000000000001-{data}
 17035:   //FTRAPOGT.L #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_011-0000000000000010-{data}
 17036:   //FTRAPOGE.L #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_011-0000000000000011-{data}
 17037:   //FTRAPOLT.L #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_011-0000000000000100-{data}
 17038:   //FTRAPOLE.L #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_011-0000000000000101-{data}
 17039:   //FTRAPOGL.L #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_011-0000000000000110-{data}
 17040:   //FTRAPOR.L #<data>                               |-|--CC4S|-|-----|-----|          |1111_001_001_111_011-0000000000000111-{data}
 17041:   //FTRAPUN.L #<data>                               |-|--CC4S|-|-----|-----|          |1111_001_001_111_011-0000000000001000-{data}
 17042:   //FTRAPUEQ.L #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_011-0000000000001001-{data}
 17043:   //FTRAPUGT.L #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_011-0000000000001010-{data}
 17044:   //FTRAPUGE.L #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_011-0000000000001011-{data}
 17045:   //FTRAPULT.L #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_011-0000000000001100-{data}
 17046:   //FTRAPULE.L #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_011-0000000000001101-{data}
 17047:   //FTRAPNE.L #<data>                               |-|--CC4S|-|-----|-----|          |1111_001_001_111_011-0000000000001110-{data}
 17048:   //FTRAPT.L #<data>                                |-|--CC4S|-|-----|-----|          |1111_001_001_111_011-0000000000001111-{data}
 17049:   //FTRAPSF.L #<data>                               |-|--CC4S|-|-----|-----|          |1111_001_001_111_011-0000000000010000-{data}
 17050:   //FTRAPSEQ.L #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_011-0000000000010001-{data}
 17051:   //FTRAPGT.L #<data>                               |-|--CC4S|-|-----|-----|          |1111_001_001_111_011-0000000000010010-{data}
 17052:   //FTRAPGE.L #<data>                               |-|--CC4S|-|-----|-----|          |1111_001_001_111_011-0000000000010011-{data}
 17053:   //FTRAPLT.L #<data>                               |-|--CC4S|-|-----|-----|          |1111_001_001_111_011-0000000000010100-{data}
 17054:   //FTRAPLE.L #<data>                               |-|--CC4S|-|-----|-----|          |1111_001_001_111_011-0000000000010101-{data}
 17055:   //FTRAPGL.L #<data>                               |-|--CC4S|-|-----|-----|          |1111_001_001_111_011-0000000000010110-{data}
 17056:   //FTRAPGLE.L #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_011-0000000000010111-{data}
 17057:   //FTRAPNGLE.L #<data>                             |-|--CC4S|-|-----|-----|          |1111_001_001_111_011-0000000000011000-{data}
 17058:   //FTRAPNGL.L #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_011-0000000000011001-{data}
 17059:   //FTRAPNLE.L #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_011-0000000000011010-{data}
 17060:   //FTRAPNLT.L #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_011-0000000000011011-{data}
 17061:   //FTRAPNGE.L #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_011-0000000000011100-{data}
 17062:   //FTRAPNGT.L #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_011-0000000000011101-{data}
 17063:   //FTRAPSNE.L #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_011-0000000000011110-{data}
 17064:   //FTRAPST.L #<data>                               |-|--CC4S|-|-----|-----|          |1111_001_001_111_011-0000000000011111-{data}
 17065:   //FTRAPF                                          |-|--CC4S|-|-----|-----|          |1111_001_001_111_100-0000000000000000
 17066:   //FTRAPEQ                                         |-|--CC4S|-|-----|-----|          |1111_001_001_111_100-0000000000000001
 17067:   //FTRAPOGT                                        |-|--CC4S|-|-----|-----|          |1111_001_001_111_100-0000000000000010
 17068:   //FTRAPOGE                                        |-|--CC4S|-|-----|-----|          |1111_001_001_111_100-0000000000000011
 17069:   //FTRAPOLT                                        |-|--CC4S|-|-----|-----|          |1111_001_001_111_100-0000000000000100
 17070:   //FTRAPOLE                                        |-|--CC4S|-|-----|-----|          |1111_001_001_111_100-0000000000000101
 17071:   //FTRAPOGL                                        |-|--CC4S|-|-----|-----|          |1111_001_001_111_100-0000000000000110
 17072:   //FTRAPOR                                         |-|--CC4S|-|-----|-----|          |1111_001_001_111_100-0000000000000111
 17073:   //FTRAPUN                                         |-|--CC4S|-|-----|-----|          |1111_001_001_111_100-0000000000001000
 17074:   //FTRAPUEQ                                        |-|--CC4S|-|-----|-----|          |1111_001_001_111_100-0000000000001001
 17075:   //FTRAPUGT                                        |-|--CC4S|-|-----|-----|          |1111_001_001_111_100-0000000000001010
 17076:   //FTRAPUGE                                        |-|--CC4S|-|-----|-----|          |1111_001_001_111_100-0000000000001011
 17077:   //FTRAPULT                                        |-|--CC4S|-|-----|-----|          |1111_001_001_111_100-0000000000001100
 17078:   //FTRAPULE                                        |-|--CC4S|-|-----|-----|          |1111_001_001_111_100-0000000000001101
 17079:   //FTRAPNE                                         |-|--CC4S|-|-----|-----|          |1111_001_001_111_100-0000000000001110
 17080:   //FTRAPT                                          |-|--CC4S|-|-----|-----|          |1111_001_001_111_100-0000000000001111
 17081:   //FTRAPSF                                         |-|--CC4S|-|-----|-----|          |1111_001_001_111_100-0000000000010000
 17082:   //FTRAPSEQ                                        |-|--CC4S|-|-----|-----|          |1111_001_001_111_100-0000000000010001
 17083:   //FTRAPGT                                         |-|--CC4S|-|-----|-----|          |1111_001_001_111_100-0000000000010010
 17084:   //FTRAPGE                                         |-|--CC4S|-|-----|-----|          |1111_001_001_111_100-0000000000010011
 17085:   //FTRAPLT                                         |-|--CC4S|-|-----|-----|          |1111_001_001_111_100-0000000000010100
 17086:   //FTRAPLE                                         |-|--CC4S|-|-----|-----|          |1111_001_001_111_100-0000000000010101
 17087:   //FTRAPGL                                         |-|--CC4S|-|-----|-----|          |1111_001_001_111_100-0000000000010110
 17088:   //FTRAPGLE                                        |-|--CC4S|-|-----|-----|          |1111_001_001_111_100-0000000000010111
 17089:   //FTRAPNGLE                                       |-|--CC4S|-|-----|-----|          |1111_001_001_111_100-0000000000011000
 17090:   //FTRAPNGL                                        |-|--CC4S|-|-----|-----|          |1111_001_001_111_100-0000000000011001
 17091:   //FTRAPNLE                                        |-|--CC4S|-|-----|-----|          |1111_001_001_111_100-0000000000011010
 17092:   //FTRAPNLT                                        |-|--CC4S|-|-----|-----|          |1111_001_001_111_100-0000000000011011
 17093:   //FTRAPNGE                                        |-|--CC4S|-|-----|-----|          |1111_001_001_111_100-0000000000011100
 17094:   //FTRAPNGT                                        |-|--CC4S|-|-----|-----|          |1111_001_001_111_100-0000000000011101
 17095:   //FTRAPSNE                                        |-|--CC4S|-|-----|-----|          |1111_001_001_111_100-0000000000011110
 17096:   //FTRAPST                                         |-|--CC4S|-|-----|-----|          |1111_001_001_111_100-0000000000011111
 17097:   public static void irpFscc () throws M68kException {
 17098:   fscc: {
 17099:     //XEiJ.fpuBox.epbExceptionStatusWord = 0;
 17100:     if (XEiJ.currentMPU == Model.MPU_MC68LC060) {
 17101:       irpFline ();
 17102:       break fscc;
 17103:     }
 17104:     XEiJ.fpuBox.epbFpiar = XEiJ.regPC0;  //FPIARはFMOVEM/FMOVE FPcr/FSAVE/FRESTORE以外の命令で例外が発生しなくても更新される
 17105:     int w = mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);  //pcwz。拡張ワード
 17106:     if ((w & 0b010000) != 0 && (XEiJ.fpuBox.epbFpsr & XEiJ.FPU_FPSR_NAN) != 0) {  //IEEEノンアウェアテストでNANがセットされているとき
 17107:       XEiJ.fpuBox.epbFpsr |= XEiJ.FPU_FPSR_EXC_BSUN;  //BSUNをセット
 17108:       XEiJ.fpuBox.epbFpsr |= XEiJ.FPU_FPSR_EXC_TO_AEXC[XEiJ.fpuBox.epbFpsr >> 8 & 255];
 17109:       if ((XEiJ.fpuBox.epbFpcr & XEiJ.FPU_FPCR_BSUN) != 0) {  //BSUN例外許可
 17110:         XEiJ.fpuBox.epbExceptionStatusWord = 0xe000 | M68kException.M6E_FP_BRANCH_SET_UNORDERED & 7;
 17111:         irpExceptionFormat0 (M68kException.M6E_FP_BRANCH_SET_UNORDERED << 2, XEiJ.regPC0);  //pcは命令の先頭
 17112:         break fscc;
 17113:       }
 17114:     }
 17115:     int ea = XEiJ.regOC & 63;
 17116:     if (ea < XEiJ.EA_AR) {  //FScc.B Dr
 17117:       if (!XEiJ.fpuBox.epbIsFullSpec ()) {
 17118:         irpExceptionFormat2 (M68kException.M6E_FP_UNIMPLEMENTED_INSTRUCTION << 2, XEiJ.regPC, 0);  //pcは次の命令,アドレスは実効アドレス
 17119:         break fscc;
 17120:       }
 17121:       if (XEiJ.FPU_CCMAP_060[(w & 63) << 4 | XEiJ.fpuBox.epbFpsr >> 24 & 15]) {  //セット
 17122:         XEiJ.mpuCycleCount++;
 17123:         XEiJ.regRn[ea] |= 0xff;
 17124:       } else {  //クリア
 17125:         XEiJ.mpuCycleCount++;
 17126:         XEiJ.regRn[ea] &= ~0xff;
 17127:       }
 17128:     } else if (ea < XEiJ.EA_MM) {  //FDBcc Dr,<label>
 17129:       if (!XEiJ.fpuBox.epbIsFullSpec ()) {
 17130:         XEiJ.regPC += 2;  //オフセットを読み飛ばす
 17131:         irpExceptionFormat2 (M68kException.M6E_FP_UNIMPLEMENTED_INSTRUCTION << 2, XEiJ.regPC, 0);  //pcは次の命令,アドレスは実効アドレス
 17132:         break fscc;
 17133:       }
 17134:       if (XEiJ.FPU_CCMAP_060[(w & 63) << 4 | XEiJ.fpuBox.epbFpsr >> 24 & 15]) {  //条件が成立しているので通過
 17135:         XEiJ.mpuCycleCount += 2;
 17136:         XEiJ.regPC += 2;  //オフセットを読み飛ばす
 17137:       } else {
 17138:         int rrr = XEiJ.regOC & 7;
 17139:         int t = XEiJ.regRn[rrr];
 17140:         if ((short) t == 0) {  //Drの下位16bitが0なので通過
 17141:           XEiJ.mpuCycleCount += 2;
 17142:           XEiJ.regRn[rrr] = t + 65535;
 17143:           XEiJ.regPC += 2;  //オフセットを読み飛ばす
 17144:         } else {  //Drの下位16bitが0でないのでジャンプ
 17145:           XEiJ.mpuCycleCount++;
 17146:           XEiJ.regRn[rrr] = t - 1;  //下位16bitが0でないので上位16bitは変化しない
 17147:           irpSetPC (XEiJ.regPC + mmuReadWordSignExword (XEiJ.regPC, XEiJ.regSRS));  //pc==pc0+2
 17148:         }
 17149:       }
 17150:     } else if (ea < XEiJ.EA_PW) {  //FScc.B <mem>
 17151:       int a = efaMltByte (ea);
 17152:       if (!XEiJ.fpuBox.epbIsFullSpec ()) {
 17153:         irpExceptionFormat2 (M68kException.M6E_FP_UNIMPLEMENTED_INSTRUCTION << 2, XEiJ.regPC, a);  //pcは次の命令,アドレスは実効アドレス
 17154:         break fscc;
 17155:       }
 17156:       XEiJ.mpuCycleCount++;
 17157:       mmuWriteByteData (a, XEiJ.FPU_CCMAP_060[(w & 63) << 4 | XEiJ.fpuBox.epbFpsr >> 24 & 15] ? 0xff : 0x00, XEiJ.regSRS);
 17158:     } else if (ea <= XEiJ.EA_IM) {  //FTRAPcc.W/FTRAPcc.L/FTRAPcc
 17159:       XEiJ.regPC += (ea & 3) + (ea & 1);  //111_010→2,111_011→4,111_100→0
 17160:       if (!XEiJ.fpuBox.epbIsFullSpec ()) {
 17161:         irpExceptionFormat2 (M68kException.M6E_FP_UNIMPLEMENTED_INSTRUCTION << 2, XEiJ.regPC, 0);  //pcは次の命令,アドレスは実効アドレス
 17162:         break fscc;
 17163:       }
 17164:       if (!XEiJ.FPU_CCMAP_060[(w & 63) << 4 | XEiJ.fpuBox.epbFpsr >> 24 & 15]) {  //通過
 17165:         XEiJ.mpuCycleCount += 2;
 17166:       } else {
 17167:         M68kException.m6eAddress = XEiJ.regPC0;  //アドレスは命令の先頭
 17168:         M68kException.m6eNumber = M68kException.M6E_TRAPV_INSTRUCTION;
 17169:         throw M68kException.m6eSignal;
 17170:       }
 17171:     } else {
 17172:       XEiJ.regPC = XEiJ.regPC0 + 2;  //拡張ワードを読まなかったことにする
 17173:       irpFline ();
 17174:       break fscc;
 17175:     }
 17176:   }  //fscc
 17177:   }  //irpFscc
 17178: 
 17179:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 17180:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 17181:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 17182:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 17183:   //FNOP                                            |A|--CC46|-|-----|-----|          |1111_001_010_000_000-0000000000000000        [FBF.W (*)+2]
 17184:   //FBF.W <label>                                   |-|--CC46|-|-----|-----|          |1111_001_010_000_000-{offset}
 17185:   //FBEQ.W <label>                                  |-|--CC46|-|-----|-----|          |1111_001_010_000_001-{offset}
 17186:   //FBOGT.W <label>                                 |-|--CC46|-|-----|-----|          |1111_001_010_000_010-{offset}
 17187:   //FBOGE.W <label>                                 |-|--CC46|-|-----|-----|          |1111_001_010_000_011-{offset}
 17188:   //FBOLT.W <label>                                 |-|--CC46|-|-----|-----|          |1111_001_010_000_100-{offset}
 17189:   //FBOLE.W <label>                                 |-|--CC46|-|-----|-----|          |1111_001_010_000_101-{offset}
 17190:   //FBOGL.W <label>                                 |-|--CC46|-|-----|-----|          |1111_001_010_000_110-{offset}
 17191:   //FBOR.W <label>                                  |-|--CC46|-|-----|-----|          |1111_001_010_000_111-{offset}
 17192:   //FBUN.W <label>                                  |-|--CC46|-|-----|-----|          |1111_001_010_001_000-{offset}
 17193:   //FBUEQ.W <label>                                 |-|--CC46|-|-----|-----|          |1111_001_010_001_001-{offset}
 17194:   //FBUGT.W <label>                                 |-|--CC46|-|-----|-----|          |1111_001_010_001_010-{offset}
 17195:   //FBUGE.W <label>                                 |-|--CC46|-|-----|-----|          |1111_001_010_001_011-{offset}
 17196:   //FBULT.W <label>                                 |-|--CC46|-|-----|-----|          |1111_001_010_001_100-{offset}
 17197:   //FBULE.W <label>                                 |-|--CC46|-|-----|-----|          |1111_001_010_001_101-{offset}
 17198:   //FBNE.W <label>                                  |-|--CC46|-|-----|-----|          |1111_001_010_001_110-{offset}
 17199:   //FBT.W <label>                                   |-|--CC46|-|-----|-----|          |1111_001_010_001_111-{offset}
 17200:   //FBRA.W <label>                                  |A|--CC46|-|-----|-----|          |1111_001_010_001_111-{offset}        [FBT.W <label>]
 17201:   //FBSF.W <label>                                  |-|--CC46|-|-----|-----|          |1111_001_010_010_000-{offset}
 17202:   //FBSEQ.W <label>                                 |-|--CC46|-|-----|-----|          |1111_001_010_010_001-{offset}
 17203:   //FBGT.W <label>                                  |-|--CC46|-|-----|-----|          |1111_001_010_010_010-{offset}
 17204:   //FBGE.W <label>                                  |-|--CC46|-|-----|-----|          |1111_001_010_010_011-{offset}
 17205:   //FBLT.W <label>                                  |-|--CC46|-|-----|-----|          |1111_001_010_010_100-{offset}
 17206:   //FBLE.W <label>                                  |-|--CC46|-|-----|-----|          |1111_001_010_010_101-{offset}
 17207:   //FBGL.W <label>                                  |-|--CC46|-|-----|-----|          |1111_001_010_010_110-{offset}
 17208:   //FBGLE.W <label>                                 |-|--CC46|-|-----|-----|          |1111_001_010_010_111-{offset}
 17209:   //FBNGLE.W <label>                                |-|--CC46|-|-----|-----|          |1111_001_010_011_000-{offset}
 17210:   //FBNGL.W <label>                                 |-|--CC46|-|-----|-----|          |1111_001_010_011_001-{offset}
 17211:   //FBNLE.W <label>                                 |-|--CC46|-|-----|-----|          |1111_001_010_011_010-{offset}
 17212:   //FBNLT.W <label>                                 |-|--CC46|-|-----|-----|          |1111_001_010_011_011-{offset}
 17213:   //FBNGE.W <label>                                 |-|--CC46|-|-----|-----|          |1111_001_010_011_100-{offset}
 17214:   //FBNGT.W <label>                                 |-|--CC46|-|-----|-----|          |1111_001_010_011_101-{offset}
 17215:   //FBSNE.W <label>                                 |-|--CC46|-|-----|-----|          |1111_001_010_011_110-{offset}
 17216:   //FBST.W <label>                                  |-|--CC46|-|-----|-----|          |1111_001_010_011_111-{offset}
 17217:   public static void irpFbccWord () throws M68kException {
 17218:   fbcc: {
 17219:     //XEiJ.fpuBox.epbExceptionStatusWord = 0;
 17220:     if (XEiJ.currentMPU == Model.MPU_MC68LC060) {
 17221:       irpFline ();
 17222:       break fbcc;
 17223:     }
 17224:     XEiJ.fpuBox.epbFpiar = XEiJ.regPC0;  //FPIARはFMOVEM/FMOVE FPcr/FSAVE/FRESTORE以外の命令で例外が発生しなくても更新される
 17225:     if ((XEiJ.regOC & 0b010000) != 0 && (XEiJ.fpuBox.epbFpsr & XEiJ.FPU_FPSR_NAN) != 0) {  //IEEEノンアウェアテストでNANがセットされているとき
 17226:       XEiJ.fpuBox.epbFpsr |= XEiJ.FPU_FPSR_EXC_BSUN;  //BSUNをセット
 17227:       XEiJ.fpuBox.epbFpsr |= XEiJ.FPU_FPSR_EXC_TO_AEXC[XEiJ.fpuBox.epbFpsr >> 8 & 255];
 17228:       if ((XEiJ.fpuBox.epbFpcr & XEiJ.FPU_FPCR_BSUN) != 0) {  //BSUN例外許可
 17229:         XEiJ.fpuBox.epbExceptionStatusWord = 0xe000 | M68kException.M6E_FP_BRANCH_SET_UNORDERED & 7;
 17230:         irpExceptionFormat0 (M68kException.M6E_FP_BRANCH_SET_UNORDERED << 2, XEiJ.regPC0);  //pcは命令の先頭
 17231:         break fbcc;
 17232:       }
 17233:     }
 17234:     XEiJ.mpuCycleCount++;
 17235:     int t = XEiJ.regPC;  //pc0+2
 17236:     XEiJ.regPC = t + 2;  //pc0+4
 17237:     t += mmuReadWordSignExword (t, XEiJ.regSRS);  //pc0+2+16bitディスプレースメント
 17238:     if ((t & 1) != 0) {  //分岐先のアドレスが奇数
 17239:       //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ
 17240:       irpBccAddressError (t);
 17241:     }
 17242:     if (XEiJ.FPU_CCMAP_060[(XEiJ.regOC & 63) << 4 | XEiJ.fpuBox.epbFpsr >> 24 & 15]) {  //分岐する
 17243:       irpSetPC (t);
 17244:     }
 17245:   }  //fbcc
 17246:   }  //irpFbccWord
 17247: 
 17248:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 17249:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 17250:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 17251:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 17252:   //FBF.L <label>                                   |-|--CC46|-|-----|-----|          |1111_001_011_000_000-{offset}
 17253:   //FBEQ.L <label>                                  |-|--CC46|-|-----|-----|          |1111_001_011_000_001-{offset}
 17254:   //FBOGT.L <label>                                 |-|--CC46|-|-----|-----|          |1111_001_011_000_010-{offset}
 17255:   //FBOGE.L <label>                                 |-|--CC46|-|-----|-----|          |1111_001_011_000_011-{offset}
 17256:   //FBOLT.L <label>                                 |-|--CC46|-|-----|-----|          |1111_001_011_000_100-{offset}
 17257:   //FBOLE.L <label>                                 |-|--CC46|-|-----|-----|          |1111_001_011_000_101-{offset}
 17258:   //FBOGL.L <label>                                 |-|--CC46|-|-----|-----|          |1111_001_011_000_110-{offset}
 17259:   //FBOR.L <label>                                  |-|--CC46|-|-----|-----|          |1111_001_011_000_111-{offset}
 17260:   //FBUN.L <label>                                  |-|--CC46|-|-----|-----|          |1111_001_011_001_000-{offset}
 17261:   //FBUEQ.L <label>                                 |-|--CC46|-|-----|-----|          |1111_001_011_001_001-{offset}
 17262:   //FBUGT.L <label>                                 |-|--CC46|-|-----|-----|          |1111_001_011_001_010-{offset}
 17263:   //FBUGE.L <label>                                 |-|--CC46|-|-----|-----|          |1111_001_011_001_011-{offset}
 17264:   //FBULT.L <label>                                 |-|--CC46|-|-----|-----|          |1111_001_011_001_100-{offset}
 17265:   //FBULE.L <label>                                 |-|--CC46|-|-----|-----|          |1111_001_011_001_101-{offset}
 17266:   //FBNE.L <label>                                  |-|--CC46|-|-----|-----|          |1111_001_011_001_110-{offset}
 17267:   //FBT.L <label>                                   |-|--CC46|-|-----|-----|          |1111_001_011_001_111-{offset}
 17268:   //FBRA.L <label>                                  |A|--CC46|-|-----|-----|          |1111_001_011_001_111-{offset}        [FBT.L <label>]
 17269:   //FBSF.L <label>                                  |-|--CC46|-|-----|-----|          |1111_001_011_010_000-{offset}
 17270:   //FBSEQ.L <label>                                 |-|--CC46|-|-----|-----|          |1111_001_011_010_001-{offset}
 17271:   //FBGT.L <label>                                  |-|--CC46|-|-----|-----|          |1111_001_011_010_010-{offset}
 17272:   //FBGE.L <label>                                  |-|--CC46|-|-----|-----|          |1111_001_011_010_011-{offset}
 17273:   //FBLT.L <label>                                  |-|--CC46|-|-----|-----|          |1111_001_011_010_100-{offset}
 17274:   //FBLE.L <label>                                  |-|--CC46|-|-----|-----|          |1111_001_011_010_101-{offset}
 17275:   //FBGL.L <label>                                  |-|--CC46|-|-----|-----|          |1111_001_011_010_110-{offset}
 17276:   //FBGLE.L <label>                                 |-|--CC46|-|-----|-----|          |1111_001_011_010_111-{offset}
 17277:   //FBNGLE.L <label>                                |-|--CC46|-|-----|-----|          |1111_001_011_011_000-{offset}
 17278:   //FBNGL.L <label>                                 |-|--CC46|-|-----|-----|          |1111_001_011_011_001-{offset}
 17279:   //FBNLE.L <label>                                 |-|--CC46|-|-----|-----|          |1111_001_011_011_010-{offset}
 17280:   //FBNLT.L <label>                                 |-|--CC46|-|-----|-----|          |1111_001_011_011_011-{offset}
 17281:   //FBNGE.L <label>                                 |-|--CC46|-|-----|-----|          |1111_001_011_011_100-{offset}
 17282:   //FBNGT.L <label>                                 |-|--CC46|-|-----|-----|          |1111_001_011_011_101-{offset}
 17283:   //FBSNE.L <label>                                 |-|--CC46|-|-----|-----|          |1111_001_011_011_110-{offset}
 17284:   //FBST.L <label>                                  |-|--CC46|-|-----|-----|          |1111_001_011_011_111-{offset}
 17285:   public static void irpFbccLong () throws M68kException {
 17286:   fbcc: {
 17287:     //XEiJ.fpuBox.epbExceptionStatusWord = 0;
 17288:     if (XEiJ.currentMPU == Model.MPU_MC68LC060) {
 17289:       irpFline ();
 17290:       break fbcc;
 17291:     }
 17292:     XEiJ.fpuBox.epbFpiar = XEiJ.regPC0;  //FPIARはFMOVEM/FMOVE FPcr/FSAVE/FRESTORE以外の命令で例外が発生しなくても更新される
 17293:     if ((XEiJ.regOC & 0b010000) != 0 && (XEiJ.fpuBox.epbFpsr & XEiJ.FPU_FPSR_NAN) != 0) {  //IEEEノンアウェアテストでNANがセットされているとき
 17294:       XEiJ.fpuBox.epbFpsr |= XEiJ.FPU_FPSR_EXC_BSUN;  //BSUNをセット
 17295:       XEiJ.fpuBox.epbFpsr |= XEiJ.FPU_FPSR_EXC_TO_AEXC[XEiJ.fpuBox.epbFpsr >> 8 & 255];
 17296:       if ((XEiJ.fpuBox.epbFpcr & XEiJ.FPU_FPCR_BSUN) != 0) {  //BSUN例外許可
 17297:         XEiJ.fpuBox.epbExceptionStatusWord = 0xe000 | M68kException.M6E_FP_BRANCH_SET_UNORDERED & 7;
 17298:         irpExceptionFormat0 (M68kException.M6E_FP_BRANCH_SET_UNORDERED << 2, XEiJ.regPC0);  //pcは命令の先頭
 17299:         break fbcc;
 17300:       }
 17301:     }
 17302:     XEiJ.mpuCycleCount++;
 17303:     int t = XEiJ.regPC;  //pc0+2
 17304:     XEiJ.regPC = t + 4;  //pc0+6
 17305:     t += mmuReadLongExword (t, XEiJ.regSRS);  //pc0+2+32bitディスプレースメント
 17306:     if ((t & 1) != 0) {  //分岐先のアドレスが奇数
 17307:       //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ
 17308:       irpBccAddressError (t);
 17309:     }
 17310:     if (XEiJ.FPU_CCMAP_060[(XEiJ.regOC & 63) << 4 | XEiJ.fpuBox.epbFpsr >> 24 & 15]) {  //分岐する
 17311:       irpSetPC (t);
 17312:     }
 17313:   }  //fbcc
 17314:   }  //irpFbccLong
 17315: 
 17316:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 17317:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 17318:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 17319:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 17320:   //FSAVE <ea>                                      |-|--CC46|P|-----|-----|  M -WXZ  |1111_001_100_mmm_rrr
 17321:   public static void irpFsave () throws M68kException {
 17322:     if (XEiJ.currentMPU == Model.MPU_MC68LC060) {
 17323:       irpFline ();
 17324:       return;
 17325:     }
 17326:     if (XEiJ.regSRS == 0) {  //ユーザモードのとき
 17327:       M68kException.m6eNumber = M68kException.M6E_PRIVILEGE_VIOLATION;
 17328:       throw M68kException.m6eSignal;
 17329:     }
 17330:     //以下はスーパーバイザモード
 17331:     XEiJ.mpuCycleCount += 3;
 17332:     int ea = XEiJ.regOC & 63;
 17333:     int a;
 17334:     if (ea >> 3 == XEiJ.MMM_MN) {  //-(Ar)
 17335:       int arr = XEiJ.regOC & 7 | 8;
 17336:       M68kException.m6eIncremented -= 12L << (arr << 3);
 17337:       a = XEiJ.regRn[arr] -= 12;
 17338:     } else {  //-(Ar)以外
 17339:       a = efaCltWord (ea);
 17340:     }
 17341:     if (XEiJ.fpuBox.epbExceptionStatusWord == 0) {  //例外なし
 17342:       mmuWriteLongData (a, 0x00006000, 1);  //アイドルフレーム
 17343:       mmuWriteQuadSecond (a + 4, 0L, 1);
 17344:     } else {  //例外あり
 17345:       mmuWriteLongData (a, XEiJ.fpuBox.epbExceptionOperandExponent | XEiJ.fpuBox.epbExceptionStatusWord, 1);  //例外フレーム
 17346:       mmuWriteQuadSecond (a + 4, XEiJ.fpuBox.epbExceptionOperandMantissa, 1);
 17347:       XEiJ.fpuBox.epbExceptionStatusWord = 0;
 17348:     }
 17349:   }  //irpFsave
 17350: 
 17351:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 17352:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 17353:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 17354:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 17355:   //FRESTORE <ea>                                   |-|--CC46|P|-----|-----|  M+ WXZP |1111_001_101_mmm_rrr
 17356:   public static void irpFrestore () throws M68kException {
 17357:     if (XEiJ.currentMPU == Model.MPU_MC68LC060) {
 17358:       irpFline ();
 17359:       return;
 17360:     }
 17361:     if (XEiJ.regSRS == 0) {  //ユーザモードのとき
 17362:       M68kException.m6eNumber = M68kException.M6E_PRIVILEGE_VIOLATION;
 17363:       throw M68kException.m6eSignal;
 17364:     }
 17365:     //以下はスーパーバイザモード
 17366:     XEiJ.mpuCycleCount += 6;
 17367:     int ea = XEiJ.regOC & 63;
 17368:     int a;
 17369:     if (ea >> 3 == XEiJ.MMM_MP) {  //(Ar)+
 17370:       int arr = XEiJ.regOC & 7 | 8;
 17371:       M68kException.m6eIncremented += 12L << (arr << 3);
 17372:       a = XEiJ.regRn[arr] += 12;
 17373:     } else {  //(Ar)+以外
 17374:       a = efaCntWord (ea);
 17375:     }
 17376:     int i = mmuReadLongData (a, 1);
 17377:     long l = mmuReadQuadData (a + 4, 1);
 17378:     if ((i & 0xff00) == 0xe000) {  //例外フレーム
 17379:       //例外ハンドラが0xe0xxを0x60xxに変更してFRESTOREする場合がある
 17380:       XEiJ.fpuBox.epbExceptionStatusWord = (char) i;
 17381:       XEiJ.fpuBox.epbExceptionOperandExponent = i & 0xffff0000;
 17382:       XEiJ.fpuBox.epbExceptionOperandMantissa = l;
 17383:     } else {
 17384:       XEiJ.fpuBox.epbExceptionStatusWord = 0;
 17385:       XEiJ.fpuBox.epbExceptionOperandExponent = 0;
 17386:       XEiJ.fpuBox.epbExceptionOperandMantissa = 0x0000000000000000L;
 17387:     }
 17388:     //FPSRのAEXCをクリアする
 17389:     XEiJ.fpuBox.epbFpsr = 0;
 17390:     //FPIARをクリアする
 17391:     XEiJ.fpuBox.epbFpiar = 0;
 17392:   }  //irpFrestore
 17393: 
 17394:   //irpFPPreInstruction ()
 17395:   //  浮動小数点命令実行前例外 floating-point pre-instruction exception
 17396:   //  優先順位はBSUN>SNAN>OPERR>OVFL>UNFL>DZ>INEX2/INEX1
 17397:   //  複数の例外が同時に発生したときは最上位の例外ハンドラだけが呼び出される
 17398:   //  浮動小数点例外ハンドラは自分よりも下位の浮動小数点例外が発生していないか確認しなければならない
 17399:   public static boolean irpFPPreInstruction () throws M68kException {
 17400:     int mask = XEiJ.fpuBox.epbFpcr & XEiJ.fpuBox.epbFpsr & 0x0000ff00;
 17401:     if (mask == 0) {
 17402:       return false;
 17403:     }
 17404:     int number = FP_OFFSET_TO_NUMBER[Integer.numberOfLeadingZeros (mask)];
 17405:     XEiJ.fpuBox.epbExceptionStatusWord = 0xe000 | number & 7;
 17406:     irpExceptionFormat0 (number << 2, XEiJ.regPC0);  //pcは命令の先頭
 17407:     return true;
 17408:   }  //irpFPPreInstruction()
 17409: 
 17410:   //irpFPPostInstruction (a)
 17411:   //  浮動小数点命令実行後例外 floating-point post-instruction exception
 17412:   //  優先順位はBSUN>SNAN>OPERR>OVFL>UNFL>DZ>INEX2/INEX1
 17413:   //  複数の例外が同時に発生したときは最上位の例外ハンドラだけが呼び出される
 17414:   //  浮動小数点例外ハンドラは自分よりも下位の浮動小数点例外が発生していないか確認しなければならない
 17415:   public static boolean irpFPPostInstruction (int a) throws M68kException {
 17416:     int mask = XEiJ.fpuBox.epbFpcr & XEiJ.fpuBox.epbFpsr & 0x0000ff00;
 17417:     if (mask == 0) {
 17418:       return false;
 17419:     }
 17420:     int number = FP_OFFSET_TO_NUMBER[Integer.numberOfLeadingZeros (mask)];
 17421:     XEiJ.fpuBox.epbExceptionStatusWord = 0xe000 | number & 7;
 17422:     irpExceptionFormat3 (number << 2, XEiJ.regPC, a);  //pcは次の命令,アドレスはデスティネーションオペランド
 17423:     return true;
 17424:   }  //irpFPPostInstruction(int)
 17425: 
 17426:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 17427:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 17428:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 17429:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 17430:   //CINVL NC,(Ar)                                   |-|----46|P|-----|-----|          |1111_010_000_001_rrr
 17431:   //CINVP NC,(Ar)                                   |-|----46|P|-----|-----|          |1111_010_000_010_rrr
 17432:   //CINVA NC                                        |-|----46|P|-----|-----|          |1111_010_000_011_000
 17433:   //CPUSHL NC,(Ar)                                  |-|----46|P|-----|-----|          |1111_010_000_101_rrr
 17434:   //CPUSHP NC,(Ar)                                  |-|----46|P|-----|-----|          |1111_010_000_110_rrr
 17435:   //CPUSHA NC                                       |-|----46|P|-----|-----|          |1111_010_000_111_000
 17436:   public static void irpCinvCpushNC () throws M68kException {
 17437:     if (XEiJ.regSRS == 0) {  //ユーザモードのとき
 17438:       M68kException.m6eNumber = M68kException.M6E_PRIVILEGE_VIOLATION;
 17439:       throw M68kException.m6eSignal;
 17440:     }
 17441:     //以下はスーパーバイザモード
 17442:     XEiJ.mpuCycleCount++;
 17443:   }  //irpCinvCpushNC
 17444: 
 17445:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 17446:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 17447:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 17448:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 17449:   //CINVL DC,(Ar)                                   |-|----46|P|-----|-----|          |1111_010_001_001_rrr
 17450:   //CINVP DC,(Ar)                                   |-|----46|P|-----|-----|          |1111_010_001_010_rrr
 17451:   //CINVA DC                                        |-|----46|P|-----|-----|          |1111_010_001_011_000
 17452:   //CPUSHL DC,(Ar)                                  |-|----46|P|-----|-----|          |1111_010_001_101_rrr
 17453:   //CPUSHP DC,(Ar)                                  |-|----46|P|-----|-----|          |1111_010_001_110_rrr
 17454:   //CPUSHA DC                                       |-|----46|P|-----|-----|          |1111_010_001_111_000
 17455:   public static void irpCinvCpushDC () throws M68kException {
 17456:     if (XEiJ.regSRS == 0) {  //ユーザモードのとき
 17457:       M68kException.m6eNumber = M68kException.M6E_PRIVILEGE_VIOLATION;
 17458:       throw M68kException.m6eSignal;
 17459:     }
 17460:     //以下はスーパーバイザモード
 17461:     XEiJ.mpuCycleCount++;
 17462:   }  //irpCinvCpushDC
 17463: 
 17464:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 17465:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 17466:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 17467:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 17468:   //CINVL IC,(Ar)                                   |-|----46|P|-----|-----|          |1111_010_010_001_rrr
 17469:   //CINVP IC,(Ar)                                   |-|----46|P|-----|-----|          |1111_010_010_010_rrr
 17470:   //CINVA IC                                        |-|----46|P|-----|-----|          |1111_010_010_011_000
 17471:   //CPUSHL IC,(Ar)                                  |-|----46|P|-----|-----|          |1111_010_010_101_rrr
 17472:   //CPUSHP IC,(Ar)                                  |-|----46|P|-----|-----|          |1111_010_010_110_rrr
 17473:   //CPUSHA IC                                       |-|----46|P|-----|-----|          |1111_010_010_111_000
 17474:   public static void irpCinvCpushIC () throws M68kException {
 17475:     if (XEiJ.regSRS == 0) {  //ユーザモードのとき
 17476:       M68kException.m6eNumber = M68kException.M6E_PRIVILEGE_VIOLATION;
 17477:       throw M68kException.m6eSignal;
 17478:     }
 17479:     //以下はスーパーバイザモード
 17480:     XEiJ.mpuCycleCount++;
 17481:   }  //irpCinvCpushIC
 17482: 
 17483:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 17484:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 17485:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 17486:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 17487:   //CINVL BC,(Ar)                                   |-|----46|P|-----|-----|          |1111_010_011_001_rrr
 17488:   //CINVP BC,(Ar)                                   |-|----46|P|-----|-----|          |1111_010_011_010_rrr
 17489:   //CINVA BC                                        |-|----46|P|-----|-----|          |1111_010_011_011_000
 17490:   //CPUSHL BC,(Ar)                                  |-|----46|P|-----|-----|          |1111_010_011_101_rrr
 17491:   //CPUSHP BC,(Ar)                                  |-|----46|P|-----|-----|          |1111_010_011_110_rrr
 17492:   //CPUSHA BC                                       |-|----46|P|-----|-----|          |1111_010_011_111_000
 17493:   public static void irpCinvCpushBC () throws M68kException {
 17494:     if (XEiJ.regSRS == 0) {  //ユーザモードのとき
 17495:       M68kException.m6eNumber = M68kException.M6E_PRIVILEGE_VIOLATION;
 17496:       throw M68kException.m6eSignal;
 17497:     }
 17498:     //以下はスーパーバイザモード
 17499:     XEiJ.mpuCycleCount++;
 17500:   }  //irpCinvCpushBC
 17501: 
 17502:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 17503:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 17504:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 17505:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 17506:   //PFLUSHN (Ar)                                    |-|----46|P|-----|-----|          |1111_010_100_000_rrr
 17507:   //PFLUSH (Ar)                                     |-|----46|P|-----|-----|          |1111_010_100_001_rrr
 17508:   //PFLUSHAN                                        |-|----46|P|-----|-----|          |1111_010_100_010_000
 17509:   //PFLUSHA                                         |-|----46|P|-----|-----|          |1111_010_100_011_000
 17510:   public static void irpPflush () throws M68kException {
 17511:     if (XEiJ.regSRS == 0) {  //ユーザモードのとき
 17512:       M68kException.m6eNumber = M68kException.M6E_PRIVILEGE_VIOLATION;
 17513:       throw M68kException.m6eSignal;
 17514:     }
 17515:     //以下はスーパーバイザモード
 17516:     if (XEiJ.regOC <= 0b1111_010_100_000_111) {  //PFLUSHN (An)
 17517:       XEiJ.mpuCycleCount += 18;
 17518:       mmuInvalidateNonGlobalCache (XEiJ.regRn[XEiJ.regOC - (0b1111_010_100_000_000 - 8)]);
 17519:     } else if (XEiJ.regOC <= 0b1111_010_100_001_111) {  //PFLUSH (An)
 17520:       XEiJ.mpuCycleCount += 18;
 17521:       mmuInvalidateCache (XEiJ.regRn[XEiJ.regOC - (0b1111_010_100_001_000 - 8)]);
 17522:     } else if (XEiJ.regOC == 0b1111_010_100_010_000) {  //PFLUSHAN
 17523:       XEiJ.mpuCycleCount += 33;
 17524:       mmuInvalidateAllNonGlobalCache ();
 17525:     } else if (XEiJ.regOC == 0b1111_010_100_011_000) {  //PFLUSHA
 17526:       XEiJ.mpuCycleCount += 33;
 17527:       mmuInvalidateAllCache ();
 17528:     } else {
 17529:       M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION;
 17530:       throw M68kException.m6eSignal;
 17531:     }
 17532:   }  //irpPflush
 17533: 
 17534:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 17535:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 17536:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 17537:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 17538:   //PLPAW (Ar)                                      |-|-----6|P|-----|-----|          |1111_010_110_001_rrr
 17539:   public static void irpPlpaw () throws M68kException {
 17540:     if (XEiJ.regSRS == 0) {  //ユーザモードのとき
 17541:       M68kException.m6eNumber = M68kException.M6E_PRIVILEGE_VIOLATION;
 17542:       throw M68kException.m6eSignal;
 17543:     }
 17544:     //以下はスーパーバイザモード
 17545:     XEiJ.mpuCycleCount += 15;
 17546:     int ann = XEiJ.regOC - (0b1111_010_110_001_000 - 8);  //8+nnn
 17547:     XEiJ.regRn[ann] = mmuLoadPhysicalAddressWrite (XEiJ.regRn[ann]);
 17548:   }  //irpPlpaw
 17549: 
 17550:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 17551:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 17552:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 17553:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 17554:   //PLPAR (Ar)                                      |-|-----6|P|-----|-----|          |1111_010_111_001_rrr
 17555:   //
 17556:   //PLPAR (Ar)
 17557:   //  ReadだがSFCではなくDFCを使う
 17558:   public static void irpPlpar () throws M68kException {
 17559:     if (XEiJ.regSRS == 0) {  //ユーザモードのとき
 17560:       M68kException.m6eNumber = M68kException.M6E_PRIVILEGE_VIOLATION;
 17561:       throw M68kException.m6eSignal;
 17562:     }
 17563:     //以下はスーパーバイザモード
 17564:     XEiJ.mpuCycleCount += 15;
 17565:     int ann = XEiJ.regOC - (0b1111_010_111_001_000 - 8);  //8+nnn
 17566:     XEiJ.regRn[ann] = mmuLoadPhysicalAddressRead (XEiJ.regRn[ann]);
 17567:   }  //irpPlpar
 17568: 
 17569:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 17570:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 17571:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 17572:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 17573:   //MOVE16 (Ar)+,xxx.L                              |-|----46|-|-----|-----|          |1111_011_000_000_rrr-{address}
 17574:   //MOVE16 xxx.L,(Ar)+                              |-|----46|-|-----|-----|          |1111_011_000_001_rrr-{address}
 17575:   //MOVE16 (Ar),xxx.L                               |-|----46|-|-----|-----|          |1111_011_000_010_rrr-{address}
 17576:   //MOVE16 xxx.L,(Ar)                               |-|----46|-|-----|-----|          |1111_011_000_011_rrr-{address}
 17577:   //MOVE16 (Ar)+,(An)+                              |-|----46|-|-----|-----|          |1111_011_000_100_rrr-1nnn000000000000
 17578:   //
 17579:   //MOVE16 (Ar)+,xxx.L
 17580:   //MOVE16 xxx.L,(Ar)+
 17581:   //MOVE16 (Ar),xxx.L
 17582:   //MOVE16 xxx.L,(Ar)
 17583:   //MOVE16 (Ar)+,(An)+
 17584:   //  アドレスの下位4bitは無視される
 17585:   //  ポストインクリメントで16増えるとき下位4bitは変化しない
 17586:   //  r==nのときMOVE16 (Ar)+,(Ar)+はMOVE16 (Ar),(Ar)+のような動作になる。データは動かずArは16だけ増える(M68060UM 1-21)
 17587:   public static void irpMove16 () throws M68kException {
 17588:     if (XEiJ.regOC <= 0b1111_011_000_011_111) {  //どちらかがxxx.L
 17589:       XEiJ.mpuCycleCount += 18;
 17590:       int arr = XEiJ.regOC - (0b1111_011_000_000_000 - 8);  //8+rrr
 17591:       int a = XEiJ.regRn[arr] & -16;
 17592:       int x = mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS) & -16;  //pcls
 17593:       if ((XEiJ.regOC & 0b001_000) == 0) {  //(Ar)→xxx.L
 17594:         long l = mmuReadQuadData (a, XEiJ.regSRS);
 17595:         long m = mmuReadQuadSecond (a + 8, XEiJ.regSRS);
 17596:         mmuWriteQuadData (x, l, XEiJ.regSRS);
 17597:         mmuWriteQuadSecond (x + 8, m, XEiJ.regSRS);
 17598:       } else {  //xxx.L→(An)
 17599:         long l = mmuReadQuadData (x, XEiJ.regSRS);
 17600:         long m = mmuReadQuadSecond (x + 8, XEiJ.regSRS);
 17601:         mmuWriteQuadData (a, l, XEiJ.regSRS);
 17602:         mmuWriteQuadSecond (a + 8, m, XEiJ.regSRS);
 17603:       }
 17604:       if ((XEiJ.regOC & 0b010_000) == 0) {  //(Ar)+
 17605:         XEiJ.regRn[arr] += 16;  //aはマスクされているのでa+16は不可
 17606:       }
 17607:     } else if (XEiJ.regOC <= 0b1111_011_000_100_111) {
 17608:       int w = mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);  //pcwz
 17609:       if ((w & 0b1000111111111111) == 0b1000000000000000) {  //MOVE16 (Ar)+,(As)+
 17610:         XEiJ.mpuCycleCount += 18;
 17611:         int arr = XEiJ.regOC - (0b1111_011_000_100_000 - 8);  //8+rrr
 17612:         int a = XEiJ.regRn[arr] & -16;
 17613:         int ass = w >> 12;  //8+sss
 17614:         int x = XEiJ.regRn[ass] & -16;
 17615:         long l = mmuReadQuadData (a, XEiJ.regSRS);
 17616:         long m = mmuReadQuadSecond (a + 8, XEiJ.regSRS);
 17617:         mmuWriteQuadData (x, l, XEiJ.regSRS);
 17618:         mmuWriteQuadSecond (x + 8, m, XEiJ.regSRS);
 17619:         XEiJ.regRn[arr] += 16;  //aはマスクされているのでa+16は不可
 17620:         if (arr != ass) {
 17621:           XEiJ.regRn[ass] += 16;  //xはマスクされているのでx+16は不可
 17622:         }
 17623:       } else {
 17624:         M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION;
 17625:         throw M68kException.m6eSignal;
 17626:       }
 17627:     } else {
 17628:       M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION;
 17629:       throw M68kException.m6eSignal;
 17630:     }
 17631:   }  //irpMove16
 17632: 
 17633:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 17634:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 17635:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 17636:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 17637:   //LPSTOP.W #<data>                                |-|-----6|P|-----|-----|          |1111_100_000_000_000-0000000111000000-{data}
 17638:   public static void irpLpstop () throws M68kException {
 17639:     if (XEiJ.regSRS == 0) {  //ユーザモードのとき
 17640:       M68kException.m6eNumber = M68kException.M6E_PRIVILEGE_VIOLATION;
 17641:       throw M68kException.m6eSignal;
 17642:     }
 17643:     //以下はスーパーバイザモード
 17644:     //!!! 非対応
 17645:   }  //irpLpstop
 17646: 
 17647:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 17648:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 17649:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 17650:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 17651:   //FPACK <data>                                    |A|012346|-|UUUUU|*****|          |1111_111_0dd_ddd_ddd [FLINE #<data>]
 17652:   public static void irpFpack () throws M68kException {
 17653:     if (!MainMemory.mmrFEfuncActivated) {
 17654:       irpFline ();
 17655:       return;
 17656:     }
 17657:     StringBuilder sb;
 17658:     int a0;
 17659:     if (FEFunction.FPK_DEBUG_TRACE) {
 17660:       sb = new StringBuilder ();
 17661:       String name = Disassembler.DIS_FPACK_NAME[XEiJ.regOC & 255];
 17662:       if (name.length () == 0) {
 17663:         XEiJ.fmtHex4 (sb.append ('$'), XEiJ.regOC);
 17664:       } else {
 17665:         sb.append (name);
 17666:       }
 17667:       sb.append ('\n');
 17668:       XEiJ.fmtHex8 (XEiJ.fmtHex8 (XEiJ.fmtHex8 (XEiJ.fmtHex8 (sb.append ("  D0="), XEiJ.regRn[0]).append (" D1="), XEiJ.regRn[1]).append (" D2="), XEiJ.regRn[2]).append (" D3="), XEiJ.regRn[3]);
 17669:       a0 = XEiJ.regRn[8];
 17670:       MainMemory.mmrRstr (sb.append (" (A0)=\""), a0, MainMemory.mmrStrlen (a0, 20)).append ("\"\n");
 17671:     }
 17672:     XEiJ.mpuCycleCount += FEFunction.FPK_CLOCK;  //一律にFEFunction.FPK_CLOCKサイクルかかることにする
 17673:     switch (XEiJ.regOC & 255) {
 17674:     case 0x00: FEFunction.fpkLMUL (); break;
 17675:     case 0x01: FEFunction.fpkLDIV (); break;
 17676:     case 0x02: FEFunction.fpkLMOD (); break;
 17677:       //case 0x03: break;
 17678:     case 0x04: FEFunction.fpkUMUL (); break;
 17679:     case 0x05: FEFunction.fpkUDIV (); break;
 17680:     case 0x06: FEFunction.fpkUMOD (); break;
 17681:       //case 0x07: break;
 17682:     case 0x08: FEFunction.fpkIMUL (); break;
 17683:     case 0x09: FEFunction.fpkIDIV (); break;
 17684:       //case 0x0a: break;
 17685:       //case 0x0b: break;
 17686:     case 0x0c: FEFunction.fpkRANDOMIZE (); break;
 17687:     case 0x0d: FEFunction.fpkSRAND (); break;
 17688:     case 0x0e: FEFunction.fpkRAND (); break;
 17689:       //case 0x0f: break;
 17690:     case 0x10: fpkSTOL (); break;
 17691:     case 0x11: fpkLTOS (); break;
 17692:     case 0x12: fpkSTOH (); break;
 17693:     case 0x13: fpkHTOS (); break;
 17694:     case 0x14: fpkSTOO (); break;
 17695:     case 0x15: fpkOTOS (); break;
 17696:     case 0x16: fpkSTOB (); break;
 17697:     case 0x17: fpkBTOS (); break;
 17698:     case 0x18: fpkIUSING (); break;
 17699:       //case 0x19: break;
 17700:     case 0x1a: FEFunction.fpkLTOD (); break;
 17701:     case 0x1b: FEFunction.fpkDTOL (); break;
 17702:     case 0x1c: FEFunction.fpkLTOF (); break;
 17703:     case 0x1d: FEFunction.fpkFTOL (); break;
 17704:     case 0x1e: FEFunction.fpkFTOD (); break;
 17705:     case 0x1f: FEFunction.fpkDTOF (); break;
 17706:     case 0x20: fpkVAL (); break;
 17707:     case 0x21: fpkUSING (); break;
 17708:     case 0x22: fpkSTOD (); break;
 17709:     case 0x23: fpkDTOS (); break;
 17710:     case 0x24: fpkECVT (); break;
 17711:     case 0x25: fpkFCVT (); break;
 17712:     case 0x26: fpkGCVT (); break;
 17713:       //case 0x27: break;
 17714:     case 0x28: FEFunction.fpkDTST (); break;
 17715:     case 0x29: FEFunction.fpkDCMP (); break;
 17716:     case 0x2a: FEFunction.fpkDNEG (); break;
 17717:     case 0x2b: FEFunction.fpkDADD (); break;
 17718:     case 0x2c: FEFunction.fpkDSUB (); break;
 17719:     case 0x2d: FEFunction.fpkDMUL (); break;
 17720:     case 0x2e: FEFunction.fpkDDIV (); break;
 17721:     case 0x2f: FEFunction.fpkDMOD (); break;
 17722:     case 0x30: FEFunction.fpkDABS (); break;
 17723:     case 0x31: FEFunction.fpkDCEIL (); break;
 17724:     case 0x32: FEFunction.fpkDFIX (); break;
 17725:     case 0x33: FEFunction.fpkDFLOOR (); break;
 17726:     case 0x34: FEFunction.fpkDFRAC (); break;
 17727:     case 0x35: FEFunction.fpkDSGN (); break;
 17728:     case 0x36: FEFunction.fpkSIN (); break;
 17729:     case 0x37: FEFunction.fpkCOS (); break;
 17730:     case 0x38: FEFunction.fpkTAN (); break;
 17731:     case 0x39: FEFunction.fpkATAN (); break;
 17732:     case 0x3a: FEFunction.fpkLOG (); break;
 17733:     case 0x3b: FEFunction.fpkEXP (); break;
 17734:     case 0x3c: FEFunction.fpkSQR (); break;
 17735:     case 0x3d: FEFunction.fpkPI (); break;
 17736:     case 0x3e: FEFunction.fpkNPI (); break;
 17737:     case 0x3f: FEFunction.fpkPOWER (); break;
 17738:     case 0x40: FEFunction.fpkRND (); break;
 17739:     case 0x41: FEFunction.fpkSINH (); break;
 17740:     case 0x42: FEFunction.fpkCOSH (); break;
 17741:     case 0x43: FEFunction.fpkTANH (); break;
 17742:     case 0x44: FEFunction.fpkATANH (); break;
 17743:     case 0x45: FEFunction.fpkASIN (); break;
 17744:     case 0x46: FEFunction.fpkACOS (); break;
 17745:     case 0x47: FEFunction.fpkLOG10 (); break;
 17746:     case 0x48: FEFunction.fpkLOG2 (); break;
 17747:     case 0x49: FEFunction.fpkDFREXP (); break;
 17748:     case 0x4a: FEFunction.fpkDLDEXP (); break;
 17749:     case 0x4b: FEFunction.fpkDADDONE (); break;
 17750:     case 0x4c: FEFunction.fpkDSUBONE (); break;
 17751:     case 0x4d: FEFunction.fpkDDIVTWO (); break;
 17752:     case 0x4e: FEFunction.fpkDIEECNV (); break;
 17753:     case 0x4f: FEFunction.fpkIEEDCNV (); break;
 17754:     case 0x50: fpkFVAL (); break;
 17755:     case 0x51: FEFunction.fpkFUSING (); break;
 17756:     case 0x52: FEFunction.fpkSTOF (); break;
 17757:     case 0x53: FEFunction.fpkFTOS (); break;
 17758:     case 0x54: FEFunction.fpkFECVT (); break;
 17759:     case 0x55: FEFunction.fpkFFCVT (); break;
 17760:     case 0x56: FEFunction.fpkFGCVT (); break;
 17761:       //case 0x57: break;
 17762:     case 0x58: FEFunction.fpkFTST (); break;
 17763:     case 0x59: FEFunction.fpkFCMP (); break;
 17764:     case 0x5a: FEFunction.fpkFNEG (); break;
 17765:     case 0x5b: FEFunction.fpkFADD (); break;
 17766:     case 0x5c: FEFunction.fpkFSUB (); break;
 17767:     case 0x5d: FEFunction.fpkFMUL (); break;
 17768:     case 0x5e: FEFunction.fpkFDIV (); break;
 17769:     case 0x5f: FEFunction.fpkFMOD (); break;
 17770:     case 0x60: FEFunction.fpkFABS (); break;
 17771:     case 0x61: FEFunction.fpkFCEIL (); break;
 17772:     case 0x62: FEFunction.fpkFFIX (); break;
 17773:     case 0x63: FEFunction.fpkFFLOOR (); break;
 17774:     case 0x64: FEFunction.fpkFFRAC (); break;
 17775:     case 0x65: FEFunction.fpkFSGN (); break;
 17776:     case 0x66: FEFunction.fpkFSIN (); break;
 17777:     case 0x67: FEFunction.fpkFCOS (); break;
 17778:     case 0x68: FEFunction.fpkFTAN (); break;
 17779:     case 0x69: FEFunction.fpkFATAN (); break;
 17780:     case 0x6a: FEFunction.fpkFLOG (); break;
 17781:     case 0x6b: FEFunction.fpkFEXP (); break;
 17782:     case 0x6c: FEFunction.fpkFSQR (); break;
 17783:     case 0x6d: FEFunction.fpkFPI (); break;
 17784:     case 0x6e: FEFunction.fpkFNPI (); break;
 17785:     case 0x6f: FEFunction.fpkFPOWER (); break;
 17786:     case 0x70: FEFunction.fpkFRND (); break;
 17787:     case 0x71: FEFunction.fpkFSINH (); break;
 17788:     case 0x72: FEFunction.fpkFCOSH (); break;
 17789:     case 0x73: FEFunction.fpkFTANH (); break;
 17790:     case 0x74: FEFunction.fpkFATANH (); break;
 17791:     case 0x75: FEFunction.fpkFASIN (); break;
 17792:     case 0x76: FEFunction.fpkFACOS (); break;
 17793:     case 0x77: FEFunction.fpkFLOG10 (); break;
 17794:     case 0x78: FEFunction.fpkFLOG2 (); break;
 17795:     case 0x79: FEFunction.fpkFFREXP (); break;
 17796:     case 0x7a: FEFunction.fpkFLDEXP (); break;
 17797:     case 0x7b: FEFunction.fpkFADDONE (); break;
 17798:     case 0x7c: FEFunction.fpkFSUBONE (); break;
 17799:     case 0x7d: FEFunction.fpkFDIVTWO (); break;
 17800:     case 0x7e: FEFunction.fpkFIEECNV (); break;
 17801:     case 0x7f: FEFunction.fpkIEEFCNV (); break;
 17802:       //case 0x80: break;
 17803:       //case 0x81: break;
 17804:       //case 0x82: break;
 17805:       //case 0x83: break;
 17806:       //case 0x84: break;
 17807:       //case 0x85: break;
 17808:       //case 0x86: break;
 17809:       //case 0x87: break;
 17810:       //case 0x88: break;
 17811:       //case 0x89: break;
 17812:       //case 0x8a: break;
 17813:       //case 0x8b: break;
 17814:       //case 0x8c: break;
 17815:       //case 0x8d: break;
 17816:       //case 0x8e: break;
 17817:       //case 0x8f: break;
 17818:       //case 0x90: break;
 17819:       //case 0x91: break;
 17820:       //case 0x92: break;
 17821:       //case 0x93: break;
 17822:       //case 0x94: break;
 17823:       //case 0x95: break;
 17824:       //case 0x96: break;
 17825:       //case 0x97: break;
 17826:       //case 0x98: break;
 17827:       //case 0x99: break;
 17828:       //case 0x9a: break;
 17829:       //case 0x9b: break;
 17830:       //case 0x9c: break;
 17831:       //case 0x9d: break;
 17832:       //case 0x9e: break;
 17833:       //case 0x9f: break;
 17834:       //case 0xa0: break;
 17835:       //case 0xa1: break;
 17836:       //case 0xa2: break;
 17837:       //case 0xa3: break;
 17838:       //case 0xa4: break;
 17839:       //case 0xa5: break;
 17840:       //case 0xa6: break;
 17841:       //case 0xa7: break;
 17842:       //case 0xa8: break;
 17843:       //case 0xa9: break;
 17844:       //case 0xaa: break;
 17845:       //case 0xab: break;
 17846:       //case 0xac: break;
 17847:       //case 0xad: break;
 17848:       //case 0xae: break;
 17849:       //case 0xaf: break;
 17850:       //case 0xb0: break;
 17851:       //case 0xb1: break;
 17852:       //case 0xb2: break;
 17853:       //case 0xb3: break;
 17854:       //case 0xb4: break;
 17855:       //case 0xb5: break;
 17856:       //case 0xb6: break;
 17857:       //case 0xb7: break;
 17858:       //case 0xb8: break;
 17859:       //case 0xb9: break;
 17860:       //case 0xba: break;
 17861:       //case 0xbb: break;
 17862:       //case 0xbc: break;
 17863:       //case 0xbd: break;
 17864:       //case 0xbe: break;
 17865:       //case 0xbf: break;
 17866:       //case 0xc0: break;
 17867:       //case 0xc1: break;
 17868:       //case 0xc2: break;
 17869:       //case 0xc3: break;
 17870:       //case 0xc4: break;
 17871:       //case 0xc5: break;
 17872:       //case 0xc6: break;
 17873:       //case 0xc7: break;
 17874:       //case 0xc8: break;
 17875:       //case 0xc9: break;
 17876:       //case 0xca: break;
 17877:       //case 0xcb: break;
 17878:       //case 0xcc: break;
 17879:       //case 0xcd: break;
 17880:       //case 0xce: break;
 17881:       //case 0xcf: break;
 17882:       //case 0xd0: break;
 17883:       //case 0xd1: break;
 17884:       //case 0xd2: break;
 17885:       //case 0xd3: break;
 17886:       //case 0xd4: break;
 17887:       //case 0xd5: break;
 17888:       //case 0xd6: break;
 17889:       //case 0xd7: break;
 17890:       //case 0xd8: break;
 17891:       //case 0xd9: break;
 17892:       //case 0xda: break;
 17893:       //case 0xdb: break;
 17894:       //case 0xdc: break;
 17895:       //case 0xdd: break;
 17896:       //case 0xde: break;
 17897:       //case 0xdf: break;
 17898:     case 0xe0: fpkCLMUL (); break;
 17899:     case 0xe1: fpkCLDIV (); break;
 17900:     case 0xe2: fpkCLMOD (); break;
 17901:     case 0xe3: fpkCUMUL (); break;
 17902:     case 0xe4: fpkCUDIV (); break;
 17903:     case 0xe5: fpkCUMOD (); break;
 17904:     case 0xe6: fpkCLTOD (); break;
 17905:     case 0xe7: fpkCDTOL (); break;
 17906:     case 0xe8: fpkCLTOF (); break;
 17907:     case 0xe9: fpkCFTOL (); break;
 17908:     case 0xea: fpkCFTOD (); break;
 17909:     case 0xeb: fpkCDTOF (); break;
 17910:     case 0xec: fpkCDCMP (); break;
 17911:     case 0xed: fpkCDADD (); break;
 17912:     case 0xee: fpkCDSUB (); break;
 17913:     case 0xef: fpkCDMUL (); break;
 17914:     case 0xf0: fpkCDDIV (); break;
 17915:     case 0xf1: fpkCDMOD (); break;
 17916:     case 0xf2: fpkCFCMP (); break;
 17917:     case 0xf3: fpkCFADD (); break;
 17918:     case 0xf4: fpkCFSUB (); break;
 17919:     case 0xf5: fpkCFMUL (); break;
 17920:     case 0xf6: fpkCFDIV (); break;
 17921:     case 0xf7: fpkCFMOD (); break;
 17922:     case 0xf8: fpkCDTST (); break;
 17923:     case 0xf9: fpkCFTST (); break;
 17924:     case 0xfa: fpkCDINC (); break;
 17925:     case 0xfb: fpkCFINC (); break;
 17926:     case 0xfc: fpkCDDEC (); break;
 17927:     case 0xfd: fpkCFDEC (); break;
 17928:     case 0xfe: FEFunction.fpkFEVARG (); break;
 17929:     //case 0xff: FEFunction.fpkFEVECS (); break;  //FLOATn.Xに処理させる
 17930:     default:
 17931:       XEiJ.mpuCycleCount -= FEFunction.FPK_CLOCK;  //戻す
 17932:       irpFline ();
 17933:     }
 17934:     if (FEFunction.FPK_DEBUG_TRACE) {
 17935:       int i = sb.length ();
 17936:       XEiJ.fmtHex8 (XEiJ.fmtHex8 (XEiJ.fmtHex8 (XEiJ.fmtHex8 (sb.append ("  D0="), XEiJ.regRn[0]).append (" D1="), XEiJ.regRn[1]).append (" D2="), XEiJ.regRn[2]).append (" D3="), XEiJ.regRn[3]);
 17937:       int l = MainMemory.mmrStrlen (a0, 20);
 17938:       sb.append (" (A0)=\"");
 17939:       i = sb.length () - i;
 17940:       MainMemory.mmrRstr (sb, a0, l).append ("\"\n");
 17941:       if (a0 <= XEiJ.regRn[8] && XEiJ.regRn[8] <= a0 + l) {
 17942:         for (i += sb.length () + XEiJ.regRn[8] - a0; sb.length () < i; ) {
 17943:           sb.append (' ');
 17944:         }
 17945:         sb.append ('^');
 17946:       }
 17947:       System.out.println (sb.toString ());
 17948:     }
 17949:   }  //irpFpack
 17950: 
 17951:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 17952:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 17953:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 17954:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 17955:   //DOS <data>                                      |A|012346|-|UUUUU|UUUUU|          |1111_111_1dd_ddd_ddd [FLINE #<data>]
 17956:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 17957:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 17958:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 17959:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 17960:   //FLINE #<data>                                   |-|012346|-|UUUUU|UUUUU|          |1111_ddd_ddd_ddd_ddd (line 1111 emulator)
 17961:   public static void irpFline () throws M68kException {
 17962:     irpExceptionFormat0 (M68kException.M6E_LINE_1111_EMULATOR << 2, XEiJ.regPC0);  //pcは命令の先頭
 17963:   }  //irpFline
 17964: 
 17965:   //irpIllegal ()
 17966:   //  オペコードの上位10bitで分類されなかった未実装命令
 17967:   //  命令実行回数をカウントするために分けてある
 17968:   //  0x4afcのILLEGAL命令はTASに分類されて未実装実効アドレスで処理されるのでここには来ない
 17969:   public static void irpIllegal () throws M68kException {
 17970:     if (true) {
 17971:       M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION;
 17972:       throw M68kException.m6eSignal;
 17973:     }
 17974:   }  //irpIllegal
 17975: 
 17976:   //z = irpAbcd (x, y)
 17977:   //  ABCD
 17978:   public static int irpAbcd (int x, int y) {
 17979:     int c = XEiJ.regCCR >> 4;
 17980:     int t = (x & 0xff) + (y & 0xff) + c;  //仮の結果
 17981:     int z = t;  //結果
 17982:     if (0x0a <= (x & 0x0f) + (y & 0x0f) + c) {  //ハーフキャリー
 17983:       z += 0x10 - 0x0a;
 17984:     }
 17985:     //XとCはキャリーがあるときセット、さもなくばクリア
 17986:     if (0xa0 <= z) {  //キャリー
 17987:       z += 0x100 - 0xa0;
 17988:       XEiJ.regCCR |= XEiJ.REG_CCR_X | XEiJ.REG_CCR_C;
 17989:     } else {
 17990:       XEiJ.regCCR &= ~(XEiJ.REG_CCR_X | XEiJ.REG_CCR_C);
 17991:     }
 17992:     //Zは結果が0でないときクリア、さもなくば変化しない
 17993:     z &= 0xff;
 17994:     if (z != 0x00) {
 17995:       XEiJ.regCCR &= ~XEiJ.REG_CCR_Z;
 17996:     }
 17997:     if (false) {
 17998:       //000/030のときNは結果の最上位ビット
 17999:       if ((z & 0x80) != 0) {
 18000:         XEiJ.regCCR |= XEiJ.REG_CCR_N;
 18001:       } else {
 18002:         XEiJ.regCCR &= ~XEiJ.REG_CCR_N;
 18003:       }
 18004:       //000のときVは補正値の加算でオーバーフローしたときセット、さもなくばクリア
 18005:       int a = z - t;  //補正値
 18006:       if ((((t ^ z) & (a ^ z)) & 0x80) != 0) {
 18007:         XEiJ.regCCR |= XEiJ.REG_CCR_V;
 18008:       } else {
 18009:         XEiJ.regCCR &= ~XEiJ.REG_CCR_V;
 18010:       }
 18011:     } else if (false) {
 18012:       //000/030のときNは結果の最上位ビット
 18013:       if ((z & 0x80) != 0) {
 18014:         XEiJ.regCCR |= XEiJ.REG_CCR_N;
 18015:       } else {
 18016:         XEiJ.regCCR &= ~XEiJ.REG_CCR_N;
 18017:       }
 18018:       //030のときVはクリア
 18019:       XEiJ.regCCR &= ~XEiJ.REG_CCR_V;
 18020:     } else {
 18021:       //060のときNとVは変化しない
 18022:     }
 18023:     return z;
 18024:   }  //irpAbcd
 18025: 
 18026:   //z = irpSbcd (x, y)
 18027:   //  SBCD
 18028:   public static int irpSbcd (int x, int y) {
 18029:     int b = XEiJ.regCCR >> 4;
 18030:     int t = (x & 0xff) - (y & 0xff) - b;  //仮の結果
 18031:     int z = t;  //結果
 18032:     if ((x & 0x0f) - (y & 0x0f) - b < 0) {  //ハーフボロー
 18033:       z -= 0x10 - 0x0a;
 18034:     }
 18035:     //XとCはボローがあるときセット、さもなくばクリア
 18036:     if (z < 0) {  //ボロー
 18037:       if (t < 0) {
 18038:         z -= 0x100 - 0xa0;
 18039:       }
 18040:       XEiJ.regCCR |= XEiJ.REG_CCR_X | XEiJ.REG_CCR_C;
 18041:     } else {
 18042:       XEiJ.regCCR &= ~(XEiJ.REG_CCR_X | XEiJ.REG_CCR_C);
 18043:     }
 18044:     //Zは結果が0でないときクリア、さもなくば変化しない
 18045:     z &= 0xff;
 18046:     if (z != 0x00) {
 18047:       XEiJ.regCCR &= ~XEiJ.REG_CCR_Z;
 18048:     }
 18049:     if (false) {
 18050:       //000/030のときNは結果の最上位ビット
 18051:       if ((z & 0x80) != 0) {
 18052:         XEiJ.regCCR |= XEiJ.REG_CCR_N;
 18053:       } else {
 18054:         XEiJ.regCCR &= ~XEiJ.REG_CCR_N;
 18055:       }
 18056:       //000のときVは補正値の減算でオーバーフローしたときセット、さもなくばクリア
 18057:       int a = t - z;  //補正値
 18058:       if ((((t & (a ^ z)) ^ (a | z)) & 0x80) != 0) {
 18059:         XEiJ.regCCR |= XEiJ.REG_CCR_V;
 18060:       } else {
 18061:         XEiJ.regCCR &= ~XEiJ.REG_CCR_V;
 18062:       }
 18063:     } else if (false) {
 18064:       //000/030のときNは結果の最上位ビット
 18065:       if ((z & 0x80) != 0) {
 18066:         XEiJ.regCCR |= XEiJ.REG_CCR_N;
 18067:       } else {
 18068:         XEiJ.regCCR &= ~XEiJ.REG_CCR_N;
 18069:       }
 18070:       //030のときVはクリア
 18071:       XEiJ.regCCR &= ~XEiJ.REG_CCR_V;
 18072:     } else {
 18073:       //060のときNとVは変化しない
 18074:     }
 18075:     return z;
 18076:   }  //irpSbcd
 18077: 
 18078: 
 18079: 
 18080:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 18081:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 18082:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 18083:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 18084:   //HFSBOOT                                         |-|012346|-|-----|-----|          |0100_111_000_000_000
 18085:   //HFSINST                                         |-|012346|-|-----|-----|          |0100_111_000_000_001
 18086:   //HFSSTR                                          |-|012346|-|-----|-----|          |0100_111_000_000_010
 18087:   //HFSINT                                          |-|012346|-|-----|-----|          |0100_111_000_000_011
 18088:   //EMXNOP                                          |-|012346|-|-----|-----|          |0100_111_000_000_100
 18089:   //  エミュレータ拡張命令
 18090:   public static void irpEmx () throws M68kException {
 18091:     switch (XEiJ.regOC & 63) {
 18092:     case XEiJ.EMX_OPCODE_HFSBOOT & 63:
 18093:       XEiJ.mpuCycleCount += 19;
 18094:       if (HFS.hfsIPLBoot ()) {
 18095:         //JMP $6800.W
 18096:         irpSetPC (0x00006800);
 18097:       }
 18098:       break;
 18099:     case XEiJ.EMX_OPCODE_HFSINST & 63:
 18100:       XEiJ.mpuCycleCount += 19;
 18101:       HFS.hfsInstall ();
 18102:       break;
 18103:     case XEiJ.EMX_OPCODE_HFSSTR & 63:
 18104:       XEiJ.mpuCycleCount += 19;
 18105:       HFS.hfsStrategy ();
 18106:       break;
 18107:     case XEiJ.EMX_OPCODE_HFSINT & 63:
 18108:       XEiJ.mpuCycleCount += 19;
 18109:       //XEiJ.mpuClockTime += TMR_FREQ / 100000L;  //0.01ms
 18110:       if (HFS.hfsInterrupt ()) {
 18111:         //WAIT
 18112:         XEiJ.mpuTraceFlag = 0;  //トレース例外を発生させない
 18113:         XEiJ.regPC = XEiJ.regPC0;  //ループ
 18114:         XEiJ.mpuClockTime += XEiJ.TMR_FREQ * 4 / 1000000;  //4μs。10MHzのとき40clk
 18115:         XEiJ.mpuLastNano += 4000L;
 18116:       }
 18117:       break;
 18118:     case XEiJ.EMX_OPCODE_EMXNOP & 63:
 18119:       XEiJ.emxNop ();
 18120:       break;
 18121:     default:
 18122:       M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION;
 18123:       throw M68kException.m6eSignal;
 18124:     }
 18125:   }  //irpEmx
 18126: 
 18127: 
 18128: 
 18129:   //irpSetPC (a)
 18130:   //  pcへデータを書き込む
 18131:   //  奇数のときはアドレスエラーが発生する
 18132:   public static void irpSetPC (int a) throws M68kException {
 18133:     if (XEiJ.TEST_BIT_0_SHIFT ? a << 31 - 0 < 0 : (a & 1) != 0) {
 18134:       M68kException.m6eNumber = M68kException.M6E_ADDRESS_ERROR;
 18135:       M68kException.m6eAddress = a & -2;  //アドレスを偶数にする
 18136:       M68kException.m6eDirection = XEiJ.MPU_WR_READ;
 18137:       M68kException.m6eSize = XEiJ.MPU_SS_LONG;
 18138:       throw M68kException.m6eSignal;
 18139:     }
 18140:     if (BranchLog.BLG_ON) {
 18141:       //BranchLog.blgJump (a);  //分岐ログに分岐レコードを追加する
 18142:       if (BranchLog.blgPrevHeadSuper != (BranchLog.blgHead | BranchLog.blgSuper) || BranchLog.blgPrevTail != XEiJ.regPC0) {  //前回のレコードと異なるとき
 18143:         int i = (char) BranchLog.blgNewestRecord++ << BranchLog.BLG_RECORD_SHIFT;
 18144:         BranchLog.blgArray[i] = BranchLog.blgPrevHeadSuper = BranchLog.blgHead | BranchLog.blgSuper;
 18145:         BranchLog.blgArray[i + 1] = BranchLog.blgPrevTail = XEiJ.regPC0;
 18146:       }
 18147:       BranchLog.blgHead = XEiJ.regPC = a;
 18148:       BranchLog.blgSuper = XEiJ.regSRS >>> 13;
 18149:     } else {
 18150:       XEiJ.regPC = a;
 18151:     }
 18152:   }  //irpSetPC
 18153: 
 18154:   //irpSetSR (newSr)
 18155:   //  srへデータを書き込む
 18156:   //  ori to sr/andi to sr/eori to sr/move to sr/stop/rteで使用される
 18157:   //  スーパーバイザモードになっていることを確認してから呼び出すこと
 18158:   //  rteではr[15]が指すアドレスからsrとpcを取り出してr[15]を更新してから呼び出すこと
 18159:   //  スーパーバイザモード→ユーザモードのときは移行のための処理を行う
 18160:   //  新しい割り込みマスクレベルよりも高い割り込み処理の終了をデバイスに通知する
 18161:   public static void irpSetSR (int newSr) {
 18162:     XEiJ.regSRT1 = XEiJ.REG_SR_T1 & newSr;
 18163:     XEiJ.regSRM = XEiJ.REG_SR_M & newSr;
 18164:     if ((XEiJ.regSRS = XEiJ.REG_SR_S & newSr) == 0) {  //スーパーバイザモード→ユーザモード
 18165:       XEiJ.mpuISP = XEiJ.regRn[15];  //SSPを保存
 18166:       XEiJ.regRn[15] = XEiJ.mpuUSP;  //USPを復元
 18167:       if (DataBreakPoint.DBP_ON) {
 18168:         DataBreakPoint.dbpMemoryMap = DataBreakPoint.dbpUserMap;  //ユーザメモリマップに切り替える
 18169:       } else {
 18170:         XEiJ.busMemoryMap = XEiJ.busUserMap;  //ユーザメモリマップに切り替える
 18171:       }
 18172:       if (InstructionBreakPoint.IBP_ON) {
 18173:         InstructionBreakPoint.ibpOp1MemoryMap = InstructionBreakPoint.ibpOp1UserMap;
 18174:       }
 18175:     }
 18176:     int t = (XEiJ.mpuIMR = 0x7f >> ((XEiJ.regSRI = XEiJ.REG_SR_I & newSr) >> 8)) & XEiJ.mpuISR;  //XEiJ.mpuISRで1→0とするビット
 18177:     if (t != 0) {  //終了する割り込みがあるとき
 18178:       XEiJ.mpuISR ^= t;
 18179:       //デバイスに割り込み処理の終了を通知する
 18180:       if (t == XEiJ.MPU_MFP_INTERRUPT_MASK) {  //MFPのみ
 18181:         MC68901.mfpDone ();
 18182:       } else if (t == XEiJ.MPU_DMA_INTERRUPT_MASK) {  //DMAのみ
 18183:         HD63450.dmaDone ();
 18184:       } else if (t == XEiJ.MPU_SCC_INTERRUPT_MASK) {  //SCCのみ
 18185:         Z8530.sccDone ();
 18186:       } else if (t == XEiJ.MPU_IOI_INTERRUPT_MASK) {  //IOIのみ
 18187:         IOInterrupt.ioiDone ();
 18188:       } else if (t == XEiJ.MPU_EB2_INTERRUPT_MASK) {  //EB2のみ
 18189:         XEiJ.eb2Done ();
 18190:       } else {  //SYSのみまたは複数
 18191:         if (XEiJ.TEST_BIT_1_SHIFT ? t << 24 + XEiJ.MPU_MFP_INTERRUPT_LEVEL < 0 : (t & XEiJ.MPU_MFP_INTERRUPT_MASK) != 0) {
 18192:           MC68901.mfpDone ();
 18193:         }
 18194:         if (t << 24 + XEiJ.MPU_DMA_INTERRUPT_LEVEL < 0) {  //(t & XEiJ.MPU_DMA_INTERRUPT_MASK) != 0
 18195:           HD63450.dmaDone ();
 18196:         }
 18197:         if (XEiJ.TEST_BIT_2_SHIFT ? t << 24 + XEiJ.MPU_SCC_INTERRUPT_LEVEL < 0 : (t & XEiJ.MPU_SCC_INTERRUPT_MASK) != 0) {
 18198:           Z8530.sccDone ();
 18199:         }
 18200:         if (t << 24 + XEiJ.MPU_IOI_INTERRUPT_LEVEL < 0) {  //(t & XEiJ.MPU_IOI_INTERRUPT_MASK) != 0
 18201:           IOInterrupt.ioiDone ();
 18202:         }
 18203:         if (t << 24 + XEiJ.MPU_EB2_INTERRUPT_LEVEL < 0) {  //(t & XEiJ.MPU_EB2_INTERRUPT_MASK) != 0
 18204:           XEiJ.eb2Done ();
 18205:         }
 18206:         if (XEiJ.TEST_BIT_0_SHIFT ? t << 24 + XEiJ.MPU_SYS_INTERRUPT_LEVEL < 0 : (t & XEiJ.MPU_SYS_INTERRUPT_MASK) != 0) {
 18207:           XEiJ.sysDone ();
 18208:         }
 18209:       }
 18210:     }
 18211:     XEiJ.mpuIMR |= ~XEiJ.mpuISR & XEiJ.MPU_SYS_INTERRUPT_MASK;  //割り込みマスクレベルが7のときレベル7割り込みの処理中でなければレベル7割り込みを許可する
 18212:     XEiJ.regCCR = XEiJ.REG_CCR_MASK & newSr;
 18213:   }  //irpSetSR
 18214: 
 18215:   //irpInterrupt (offset, level)
 18216:   //  割り込み処理を開始する
 18217:   public static void irpInterrupt (int offset, int level) throws M68kException {
 18218:     if (XEiJ.regOC == 0b0100_111_001_110_010) {  //最後に実行した命令はSTOP命令
 18219:       XEiJ.regPC = XEiJ.regPC0 + 4;  //次の命令に進む
 18220:     }
 18221:     XEiJ.mpuClockTime += XEiJ.mpuModifiedUnit * 19;
 18222:     int save_sr = XEiJ.regSRT1 | XEiJ.regSRS | XEiJ.regSRM | XEiJ.regSRI | XEiJ.regCCR;
 18223:     XEiJ.regSRI = level << 8;  //割り込みマスクを要求されたレベルに変更する
 18224:     XEiJ.mpuIMR = 0x7f >> level;
 18225:     XEiJ.mpuISR |= 0x80 >> level;
 18226:     XEiJ.regSRT1 = XEiJ.mpuTraceFlag = 0;  //srのTビットを消す
 18227:     int sp;
 18228:     if (XEiJ.regSRS != 0) {  //スーパーバイザモード
 18229:       sp = XEiJ.regRn[15];
 18230:     } else {  //ユーザモード
 18231:       XEiJ.regSRS = XEiJ.REG_SR_S;  //スーパーバイザモードへ移行する
 18232:       XEiJ.mpuUSP = XEiJ.regRn[15];  //USPを保存
 18233:       sp = XEiJ.mpuISP;  //SSPを復元
 18234:       if (DataBreakPoint.DBP_ON) {
 18235:         DataBreakPoint.dbpMemoryMap = DataBreakPoint.dbpSuperMap;  //スーパーバイザメモリマップに切り替える
 18236:       } else {
 18237:         XEiJ.busMemoryMap = XEiJ.busSuperMap;  //スーパーバイザメモリマップに切り替える
 18238:       }
 18239:       if (InstructionBreakPoint.IBP_ON) {
 18240:         InstructionBreakPoint.ibpOp1MemoryMap = InstructionBreakPoint.ibpOp1SuperMap;
 18241:       }
 18242:     }
 18243:     //以下はスーパーバイザモード
 18244:     XEiJ.regRn[15] = sp -= 8;
 18245:     mmuWriteWordData (sp + 6, offset, 1);  //7-6:フォーマットとベクタオフセット
 18246:     mmuWriteLongData (sp + 2, XEiJ.regPC, 1);  //5-2:プログラムカウンタ
 18247:     mmuWriteWordData (sp, save_sr, 1);  //1-0:ステータスレジスタ
 18248:     //if (XEiJ.regSRM != 0) {  //マスタモードのとき
 18249:     XEiJ.regSRM = 0;  //割り込みモードへ移行する
 18250:     //}
 18251:     if (BranchLog.BLG_ON) {
 18252:       XEiJ.regPC0 = XEiJ.regPC;  //rteによる割り込み終了と同時に次の割り込みを受け付けたとき間でpc0を更新しないと2番目の分岐レコードの終了アドレスが1番目と同じになっておかしな分岐レコードができてしまう
 18253:     }
 18254:     irpSetPC (mmuReadLongFour (XEiJ.mpuVBR + offset, 1));  //例外ベクタを取り出してジャンプする
 18255:   }  //irpInterrupt
 18256: 
 18257:   //irpExceptionFormat0 (offset, save_pc)
 18258:   //  例外処理を開始する
 18259:   //  スタックへのプッシュ、ベクタの取り出し、ジャンプのいずれかでバスエラーまたはアドレスエラーが発生する場合がある
 18260:   public static void irpExceptionFormat0 (int offset, int save_pc) throws M68kException {
 18261:     XEiJ.mpuCycleCount += 19;
 18262:     int save_sr = XEiJ.regSRT1 | XEiJ.regSRS | XEiJ.regSRM | XEiJ.regSRI | XEiJ.regCCR;
 18263:     XEiJ.regSRT1 = XEiJ.mpuTraceFlag = 0;  //srのTビットを消す
 18264:     int sp;
 18265:     if (XEiJ.regSRS != 0) {  //スーパーバイザモード
 18266:       sp = XEiJ.regRn[15];
 18267:     } else {  //ユーザモード
 18268:       XEiJ.regSRS = XEiJ.REG_SR_S;  //スーパーバイザモードへ移行する
 18269:       XEiJ.mpuUSP = XEiJ.regRn[15];  //USPを保存
 18270:       sp = XEiJ.mpuISP;  //SSPを復元
 18271:       if (DataBreakPoint.DBP_ON) {
 18272:         DataBreakPoint.dbpMemoryMap = DataBreakPoint.dbpSuperMap;  //スーパーバイザメモリマップに切り替える
 18273:       } else {
 18274:         XEiJ.busMemoryMap = XEiJ.busSuperMap;  //スーパーバイザメモリマップに切り替える
 18275:       }
 18276:       if (InstructionBreakPoint.IBP_ON) {
 18277:         InstructionBreakPoint.ibpOp1MemoryMap = InstructionBreakPoint.ibpOp1SuperMap;
 18278:       }
 18279:     }
 18280:     //以下はスーパーバイザモード
 18281:     XEiJ.regRn[15] = sp -= 8;
 18282:     mmuWriteWordData (sp + 6, offset, 1);  //7-6:フォーマットとベクタオフセット
 18283:     mmuWriteLongData (sp + 2, save_pc, 1);  //5-2:プログラムカウンタ
 18284:     mmuWriteWordData (sp, save_sr, 1);  //1-0:ステータスレジスタ
 18285:     irpSetPC (mmuReadLongFour (XEiJ.mpuVBR + offset, 1));  //例外ベクタを取り出してジャンプする
 18286:   }  //irpExceptionFormat0
 18287: 
 18288:   //irpExceptionFormat2 (offset, save_pc, address)
 18289:   //  例外処理を開始する
 18290:   //  スタックへのプッシュ、ベクタの取り出し、ジャンプのいずれかでバスエラーまたはアドレスエラーが発生する場合がある
 18291:   public static void irpExceptionFormat2 (int offset, int save_pc, int address) throws M68kException {
 18292:     XEiJ.mpuCycleCount += 19;
 18293:     int save_sr = XEiJ.regSRT1 | XEiJ.regSRS | XEiJ.regSRM | XEiJ.regSRI | XEiJ.regCCR;
 18294:     XEiJ.regSRT1 = XEiJ.mpuTraceFlag = 0;  //srのTビットを消す
 18295:     int sp;
 18296:     if (XEiJ.regSRS != 0) {  //スーパーバイザモード
 18297:       sp = XEiJ.regRn[15];
 18298:     } else {  //ユーザモード
 18299:       XEiJ.regSRS = XEiJ.REG_SR_S;  //スーパーバイザモードへ移行する
 18300:       XEiJ.mpuUSP = XEiJ.regRn[15];  //USPを保存
 18301:       sp = XEiJ.mpuISP;  //SSPを復元
 18302:       if (DataBreakPoint.DBP_ON) {
 18303:         DataBreakPoint.dbpMemoryMap = DataBreakPoint.dbpSuperMap;  //スーパーバイザメモリマップに切り替える
 18304:       } else {
 18305:         XEiJ.busMemoryMap = XEiJ.busSuperMap;  //スーパーバイザメモリマップに切り替える
 18306:       }
 18307:       if (InstructionBreakPoint.IBP_ON) {
 18308:         InstructionBreakPoint.ibpOp1MemoryMap = InstructionBreakPoint.ibpOp1SuperMap;
 18309:       }
 18310:     }
 18311:     //以下はスーパーバイザモード
 18312:     XEiJ.regRn[15] = sp -= 12;
 18313:     mmuWriteLongData (sp + 8, address, 1);  //11-8:アドレス
 18314:     mmuWriteWordData (sp + 6, 0x2000 | offset, 1);  //7-6:フォーマットとベクタオフセット
 18315:     mmuWriteLongData (sp + 2, save_pc, 1);  //5-2:プログラムカウンタ
 18316:     mmuWriteWordData (sp, save_sr, 1);  //1-0:ステータスレジスタ
 18317:     irpSetPC (mmuReadLongFour (XEiJ.mpuVBR + offset, 1));  //例外ベクタを取り出してジャンプする
 18318:   }  //irpExceptionFormat2
 18319: 
 18320:   //irpExceptionFormat3 (offset, save_pc, address)
 18321:   //  例外処理を開始する
 18322:   //  スタックへのプッシュ、ベクタの取り出し、ジャンプのいずれかでバスエラーまたはアドレスエラーが発生する場合がある
 18323:   public static void irpExceptionFormat3 (int offset, int save_pc, int address) throws M68kException {
 18324:     XEiJ.mpuCycleCount += 19;
 18325:     int save_sr = XEiJ.regSRT1 | XEiJ.regSRS | XEiJ.regSRM | XEiJ.regSRI | XEiJ.regCCR;
 18326:     XEiJ.regSRT1 = XEiJ.mpuTraceFlag = 0;  //srのTビットを消す
 18327:     int sp;
 18328:     if (XEiJ.regSRS != 0) {  //スーパーバイザモード
 18329:       sp = XEiJ.regRn[15];
 18330:     } else {  //ユーザモード
 18331:       XEiJ.regSRS = XEiJ.REG_SR_S;  //スーパーバイザモードへ移行する
 18332:       XEiJ.mpuUSP = XEiJ.regRn[15];  //USPを保存
 18333:       sp = XEiJ.mpuISP;  //SSPを復元
 18334:       if (DataBreakPoint.DBP_ON) {
 18335:         DataBreakPoint.dbpMemoryMap = DataBreakPoint.dbpSuperMap;  //スーパーバイザメモリマップに切り替える
 18336:       } else {
 18337:         XEiJ.busMemoryMap = XEiJ.busSuperMap;  //スーパーバイザメモリマップに切り替える
 18338:       }
 18339:       if (InstructionBreakPoint.IBP_ON) {
 18340:         InstructionBreakPoint.ibpOp1MemoryMap = InstructionBreakPoint.ibpOp1SuperMap;
 18341:       }
 18342:     }
 18343:     //以下はスーパーバイザモード
 18344:     XEiJ.regRn[15] = sp -= 12;
 18345:     mmuWriteLongData (sp + 8, address, 1);  //11-8:実効アドレス
 18346:     mmuWriteWordData (sp + 6, 0x3000 | offset, 1);  //7-6:フォーマットとベクタオフセット
 18347:     mmuWriteLongData (sp + 2, save_pc, 1);  //5-2:プログラムカウンタ
 18348:     mmuWriteWordData (sp, save_sr, 1);  //1-0:ステータスレジスタ
 18349:     irpSetPC (mmuReadLongFour (XEiJ.mpuVBR + offset, 1));  //例外ベクタを取り出してジャンプする
 18350:   }  //irpExceptionFormat3
 18351: 
 18352: 
 18353: 
 18354:   //a = efaAnyByte (ea)  //|  M+-WXZPI|
 18355:   //  任意のモードのバイトオペランドの実効アドレスを求める
 18356:   //  (A7)+と-(A7)はA7を奇偶に関わらず2変化させ、跨いだワードの上位バイト(アドレスの小さい方)を参照する
 18357:   //  #<data>はオペコードに続くワードの下位バイトを参照する。上位バイトは不定なので参照してはならない
 18358:   @SuppressWarnings ("fallthrough") public static int efaAnyByte (int ea) throws M68kException {
 18359:     int t, w, x;
 18360:     switch (ea) {
 18361:     case 0b010_000:  //(A0)
 18362:       if (XEiJ.EFA_SEPARATE_AR) {
 18363:         return XEiJ.regRn[ 8];
 18364:       }
 18365:       //fallthrough
 18366:     case 0b010_001:  //(A1)
 18367:       if (XEiJ.EFA_SEPARATE_AR) {
 18368:         return XEiJ.regRn[ 9];
 18369:       }
 18370:       //fallthrough
 18371:     case 0b010_010:  //(A2)
 18372:       if (XEiJ.EFA_SEPARATE_AR) {
 18373:         return XEiJ.regRn[10];
 18374:       }
 18375:       //fallthrough
 18376:     case 0b010_011:  //(A3)
 18377:       if (XEiJ.EFA_SEPARATE_AR) {
 18378:         return XEiJ.regRn[11];
 18379:       }
 18380:       //fallthrough
 18381:     case 0b010_100:  //(A4)
 18382:       if (XEiJ.EFA_SEPARATE_AR) {
 18383:         return XEiJ.regRn[12];
 18384:       }
 18385:       //fallthrough
 18386:     case 0b010_101:  //(A5)
 18387:       if (XEiJ.EFA_SEPARATE_AR) {
 18388:         return XEiJ.regRn[13];
 18389:       }
 18390:       //fallthrough
 18391:     case 0b010_110:  //(A6)
 18392:       if (XEiJ.EFA_SEPARATE_AR) {
 18393:         return XEiJ.regRn[14];
 18394:       }
 18395:       //fallthrough
 18396:     case 0b010_111:  //(A7)
 18397:       if (XEiJ.EFA_SEPARATE_AR) {
 18398:         return XEiJ.regRn[15];
 18399:       } else {
 18400:         return XEiJ.regRn[ea - (0b010_000 - 8)];
 18401:       }
 18402:     case 0b011_000:  //(A0)+
 18403:       if (XEiJ.EFA_SEPARATE_AR) {
 18404:         M68kException.m6eIncremented += 1L << (0 << 3);
 18405:         return XEiJ.regRn[ 8]++;
 18406:       }
 18407:       //fallthrough
 18408:     case 0b011_001:  //(A1)+
 18409:       if (XEiJ.EFA_SEPARATE_AR) {
 18410:         M68kException.m6eIncremented += 1L << (1 << 3);
 18411:         return XEiJ.regRn[ 9]++;
 18412:       }
 18413:       //fallthrough
 18414:     case 0b011_010:  //(A2)+
 18415:       if (XEiJ.EFA_SEPARATE_AR) {
 18416:         M68kException.m6eIncremented += 1L << (2 << 3);
 18417:         return XEiJ.regRn[10]++;
 18418:       }
 18419:       //fallthrough
 18420:     case 0b011_011:  //(A3)+
 18421:       if (XEiJ.EFA_SEPARATE_AR) {
 18422:         M68kException.m6eIncremented += 1L << (3 << 3);
 18423:         return XEiJ.regRn[11]++;
 18424:       }
 18425:       //fallthrough
 18426:     case 0b011_100:  //(A4)+
 18427:       if (XEiJ.EFA_SEPARATE_AR) {
 18428:         M68kException.m6eIncremented += 1L << (4 << 3);
 18429:         return XEiJ.regRn[12]++;
 18430:       }
 18431:       //fallthrough
 18432:     case 0b011_101:  //(A5)+
 18433:       if (XEiJ.EFA_SEPARATE_AR) {
 18434:         M68kException.m6eIncremented += 1L << (5 << 3);
 18435:         return XEiJ.regRn[13]++;
 18436:       }
 18437:       //fallthrough
 18438:     case 0b011_110:  //(A6)+
 18439:       if (XEiJ.EFA_SEPARATE_AR) {
 18440:         M68kException.m6eIncremented += 1L << (6 << 3);
 18441:         return XEiJ.regRn[14]++;
 18442:       } else {
 18443:         M68kException.m6eIncremented += 1L << ((ea & 7) << 3);
 18444:         return XEiJ.regRn[ea - (0b011_000 - 8)]++;
 18445:       }
 18446:     case 0b011_111:  //(A7)+
 18447:       M68kException.m6eIncremented += 2L << (7 << 3);
 18448:       return (XEiJ.regRn[15] += 2) - 2;
 18449:     case 0b100_000:  //-(A0)
 18450:       if (XEiJ.EFA_SEPARATE_AR) {
 18451:         M68kException.m6eIncremented -= 1L << (0 << 3);
 18452:         return --XEiJ.regRn[ 8];
 18453:       }
 18454:       //fallthrough
 18455:     case 0b100_001:  //-(A1)
 18456:       if (XEiJ.EFA_SEPARATE_AR) {
 18457:         M68kException.m6eIncremented -= 1L << (1 << 3);
 18458:         return --XEiJ.regRn[ 9];
 18459:       }
 18460:       //fallthrough
 18461:     case 0b100_010:  //-(A2)
 18462:       if (XEiJ.EFA_SEPARATE_AR) {
 18463:         M68kException.m6eIncremented -= 1L << (2 << 3);
 18464:         return --XEiJ.regRn[10];
 18465:       }
 18466:       //fallthrough
 18467:     case 0b100_011:  //-(A3)
 18468:       if (XEiJ.EFA_SEPARATE_AR) {
 18469:         M68kException.m6eIncremented -= 1L << (3 << 3);
 18470:         return --XEiJ.regRn[11];
 18471:       }
 18472:       //fallthrough
 18473:     case 0b100_100:  //-(A4)
 18474:       if (XEiJ.EFA_SEPARATE_AR) {
 18475:         M68kException.m6eIncremented -= 1L << (4 << 3);
 18476:         return --XEiJ.regRn[12];
 18477:       }
 18478:       //fallthrough
 18479:     case 0b100_101:  //-(A5)
 18480:       if (XEiJ.EFA_SEPARATE_AR) {
 18481:         M68kException.m6eIncremented -= 1L << (5 << 3);
 18482:         return --XEiJ.regRn[13];
 18483:       }
 18484:       //fallthrough
 18485:     case 0b100_110:  //-(A6)
 18486:       if (XEiJ.EFA_SEPARATE_AR) {
 18487:         M68kException.m6eIncremented -= 1L << (6 << 3);
 18488:         return --XEiJ.regRn[14];
 18489:       } else {
 18490:         M68kException.m6eIncremented -= 1L << ((ea & 7) << 3);
 18491:         return --XEiJ.regRn[ea - (0b100_000 - 8)];
 18492:       }
 18493:     case 0b100_111:  //-(A7)
 18494:       M68kException.m6eIncremented -= 2L << (7 << 3);
 18495:       return XEiJ.regRn[15] -= 2;
 18496:     case 0b101_000:  //(d16,A0)
 18497:     case 0b101_001:  //(d16,A1)
 18498:     case 0b101_010:  //(d16,A2)
 18499:     case 0b101_011:  //(d16,A3)
 18500:     case 0b101_100:  //(d16,A4)
 18501:     case 0b101_101:  //(d16,A5)
 18502:     case 0b101_110:  //(d16,A6)
 18503:     case 0b101_111:  //(d16,A7)
 18504:       if (XEiJ.MPU_COMPOUND_POSTINCREMENT) {
 18505:         return (XEiJ.regRn[ea - (0b101_000 - 8)]  //ベースレジスタ
 18506:                 + mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS));  //pcws。ワードディスプレースメント
 18507:       } else {
 18508:         t = XEiJ.regPC;
 18509:         XEiJ.regPC = t + 2;
 18510:         return (XEiJ.regRn[ea - (0b101_000 - 8)]  //ベースレジスタ
 18511:                 + mmuReadWordSignExword (t, XEiJ.regSRS));  //pcws。ワードディスプレースメント
 18512:       }
 18513:     case 0b110_000:  //(d8,A0,Rn.wl)
 18514:     case 0b110_001:  //(d8,A1,Rn.wl)
 18515:     case 0b110_010:  //(d8,A2,Rn.wl)
 18516:     case 0b110_011:  //(d8,A3,Rn.wl)
 18517:     case 0b110_100:  //(d8,A4,Rn.wl)
 18518:     case 0b110_101:  //(d8,A5,Rn.wl)
 18519:     case 0b110_110:  //(d8,A6,Rn.wl)
 18520:     case 0b110_111:  //(d8,A7,Rn.wl)
 18521:       if (XEiJ.MPU_COMPOUND_POSTINCREMENT) {
 18522:         w = mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);  //pcwz。拡張ワード
 18523:       } else {
 18524:         w = XEiJ.regPC;
 18525:         XEiJ.regPC = w + 2;
 18526:         w = mmuReadWordZeroExword (w, XEiJ.regSRS);  //pcwz。拡張ワード
 18527:       }
 18528:       if (w << 31 - 8 < 0) {  //フルフォーマット
 18529:         XEiJ.mpuCycleCount += w << -2 == 0 ? 1 : 3;  //メモリ間接なし:メモリ間接あり
 18530:       }
 18531:       t = (((~w & 0x0180) == 0 ? 0 :  //ベースレジスタサプレス
 18532:             XEiJ.regRn[ea - (0b110_000 - 8)])  //ベースレジスタ
 18533:            + (w << 31 - 8 >= 0 ? (byte) w :  //バイトディスプレースメント
 18534:               w << 31 - 5 >= 0 ? 0 :  //ヌルベースディスプレースメント
 18535:               w << 31 - 4 >= 0 ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) :  //pcws。ワードベースディスプレースメント
 18536:               mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS)));  //pcls。ロングベースディスプレースメント
 18537:       x = ((~w & 0x0140) == 0 ? 0 :  //インデックスサプレス
 18538:            (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] :  //ワードインデックス
 18539:             XEiJ.regRn[w >> 12])  //ロングインデックス
 18540:            << (w >> 9 & 3));  //スケールファクタ。ワードインデックスのときは符号拡張してから掛ける
 18541:       return ((w & 0x0103) <= 0x0100 ? t + x :  //メモリ間接なし
 18542:               ((XEiJ.TEST_BIT_2_SHIFT ? w << 31 - 2 >= 0 : (w & 4) == 0) ? mmuReadLongData (t + x, XEiJ.regSRS) :  //プリインデックス
 18543:                mmuReadLongData (t, XEiJ.regSRS) + x)  //ポストインデックス
 18544:               + ((XEiJ.TEST_BIT_1_SHIFT ? w << 31 - 1 >= 0 : (w & 2) == 0) ? 0 :  //ヌルアウタディスプレースメント
 18545:                  (XEiJ.TEST_BIT_0_SHIFT ? w << 31 - 0 >= 0 : (w & 1) == 0) ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) :  //pcws。ワードアウタディスプレースメント
 18546:                  mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS)));  //pcls。ロングアウタディスプレースメント
 18547:     case 0b111_000:  //(xxx).W
 18548:       return mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);  //pcws
 18549:     case 0b111_001:  //(xxx).L
 18550:       return mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS);  //pcls
 18551:     case 0b111_010:  //(d16,PC)
 18552:       t = XEiJ.regPC;
 18553:       XEiJ.regPC = t + 2;
 18554:       return (t  //ベースレジスタ
 18555:               + mmuReadWordSignExword (t, XEiJ.regSRS));  //pcws。ワードディスプレースメント
 18556:     case 0b111_011:  //(d8,PC,Rn.wl)
 18557:       t = XEiJ.regPC;
 18558:       XEiJ.regPC = t + 2;
 18559:       w = mmuReadWordZeroExword (t, XEiJ.regSRS);  //pcwz。拡張ワード
 18560:       if (w << 31 - 8 < 0) {  //フルフォーマット
 18561:         XEiJ.mpuCycleCount += w << -2 == 0 ? 1 : 3;  //メモリ間接なし:メモリ間接あり
 18562:       }
 18563:       t = (((~w & 0x0180) == 0 ? 0 :  //ベースレジスタサプレス
 18564:             t)  //ベースレジスタ
 18565:            + (w << 31 - 8 >= 0 ? (byte) w :  //バイトディスプレースメント
 18566:               w << 31 - 5 >= 0 ? 0 :  //ヌルベースディスプレースメント
 18567:               w << 31 - 4 >= 0 ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) :  //pcws。ワードベースディスプレースメント
 18568:               mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS)));  //pcls。ロングベースディスプレースメント
 18569:       x = ((~w & 0x0140) == 0 ? 0 :  //インデックスサプレス
 18570:            (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] :  //ワードインデックス
 18571:             XEiJ.regRn[w >> 12])  //ロングインデックス
 18572:            << (w >> 9 & 3));  //スケールファクタ。ワードインデックスのときは符号拡張してから掛ける
 18573:       return ((w & 0x0103) <= 0x0100 ? t + x :  //メモリ間接なし
 18574:               ((XEiJ.TEST_BIT_2_SHIFT ? w << 31 - 2 >= 0 : (w & 4) == 0) ? mmuReadLongData (t + x, XEiJ.regSRS) :  //プリインデックス
 18575:                mmuReadLongData (t, XEiJ.regSRS) + x)  //ポストインデックス
 18576:               + ((XEiJ.TEST_BIT_1_SHIFT ? w << 31 - 1 >= 0 : (w & 2) == 0) ? 0 :  //ヌルアウタディスプレースメント
 18577:                  (XEiJ.TEST_BIT_0_SHIFT ? w << 31 - 0 >= 0 : (w & 1) == 0) ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) :  //pcws。ワードアウタディスプレースメント
 18578:                  mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS)));  //pcls。ロングアウタディスプレースメント
 18579:     case 0b111_100:  //#<data>
 18580:       if (XEiJ.MPU_COMPOUND_POSTINCREMENT) {
 18581:         return (XEiJ.regPC += 2) - 1;  //下位バイト
 18582:       } else {
 18583:         t = XEiJ.regPC;
 18584:         XEiJ.regPC = t + 2;
 18585:         return t + 1;  //下位バイト
 18586:       }
 18587:     }  //switch
 18588:     M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION;
 18589:     throw M68kException.m6eSignal;
 18590:   }  //efaAnyByte
 18591: 
 18592:   //a = efaMemByte (ea)  //|  M+-WXZP |
 18593:   //  メモリモードのバイトオペランドの実効アドレスを求める
 18594:   //  efaAnyByteとの違いは#<data>がないこと
 18595:   @SuppressWarnings ("fallthrough") public static int efaMemByte (int ea) throws M68kException {
 18596:     int t, w, x;
 18597:     switch (ea) {
 18598:     case 0b010_000:  //(A0)
 18599:       if (XEiJ.EFA_SEPARATE_AR) {
 18600:         return XEiJ.regRn[ 8];
 18601:       }
 18602:       //fallthrough
 18603:     case 0b010_001:  //(A1)
 18604:       if (XEiJ.EFA_SEPARATE_AR) {
 18605:         return XEiJ.regRn[ 9];
 18606:       }
 18607:       //fallthrough
 18608:     case 0b010_010:  //(A2)
 18609:       if (XEiJ.EFA_SEPARATE_AR) {
 18610:         return XEiJ.regRn[10];
 18611:       }
 18612:       //fallthrough
 18613:     case 0b010_011:  //(A3)
 18614:       if (XEiJ.EFA_SEPARATE_AR) {
 18615:         return XEiJ.regRn[11];
 18616:       }
 18617:       //fallthrough
 18618:     case 0b010_100:  //(A4)
 18619:       if (XEiJ.EFA_SEPARATE_AR) {
 18620:         return XEiJ.regRn[12];
 18621:       }
 18622:       //fallthrough
 18623:     case 0b010_101:  //(A5)
 18624:       if (XEiJ.EFA_SEPARATE_AR) {
 18625:         return XEiJ.regRn[13];
 18626:       }
 18627:       //fallthrough
 18628:     case 0b010_110:  //(A6)
 18629:       if (XEiJ.EFA_SEPARATE_AR) {
 18630:         return XEiJ.regRn[14];
 18631:       }
 18632:       //fallthrough
 18633:     case 0b010_111:  //(A7)
 18634:       if (XEiJ.EFA_SEPARATE_AR) {
 18635:         return XEiJ.regRn[15];
 18636:       } else {
 18637:         return XEiJ.regRn[ea - (0b010_000 - 8)];
 18638:       }
 18639:     case 0b011_000:  //(A0)+
 18640:       if (XEiJ.EFA_SEPARATE_AR) {
 18641:         M68kException.m6eIncremented += 1L << (0 << 3);
 18642:         return XEiJ.regRn[ 8]++;
 18643:       }
 18644:       //fallthrough
 18645:     case 0b011_001:  //(A1)+
 18646:       if (XEiJ.EFA_SEPARATE_AR) {
 18647:         M68kException.m6eIncremented += 1L << (1 << 3);
 18648:         return XEiJ.regRn[ 9]++;
 18649:       }
 18650:       //fallthrough
 18651:     case 0b011_010:  //(A2)+
 18652:       if (XEiJ.EFA_SEPARATE_AR) {
 18653:         M68kException.m6eIncremented += 1L << (2 << 3);
 18654:         return XEiJ.regRn[10]++;
 18655:       }
 18656:       //fallthrough
 18657:     case 0b011_011:  //(A3)+
 18658:       if (XEiJ.EFA_SEPARATE_AR) {
 18659:         M68kException.m6eIncremented += 1L << (3 << 3);
 18660:         return XEiJ.regRn[11]++;
 18661:       }
 18662:       //fallthrough
 18663:     case 0b011_100:  //(A4)+
 18664:       if (XEiJ.EFA_SEPARATE_AR) {
 18665:         M68kException.m6eIncremented += 1L << (4 << 3);
 18666:         return XEiJ.regRn[12]++;
 18667:       }
 18668:       //fallthrough
 18669:     case 0b011_101:  //(A5)+
 18670:       if (XEiJ.EFA_SEPARATE_AR) {
 18671:         M68kException.m6eIncremented += 1L << (5 << 3);
 18672:         return XEiJ.regRn[13]++;
 18673:       }
 18674:       //fallthrough
 18675:     case 0b011_110:  //(A6)+
 18676:       if (XEiJ.EFA_SEPARATE_AR) {
 18677:         M68kException.m6eIncremented += 1L << (6 << 3);
 18678:         return XEiJ.regRn[14]++;
 18679:       } else {
 18680:         M68kException.m6eIncremented += 1L << ((ea & 7) << 3);
 18681:         return XEiJ.regRn[ea - (0b011_000 - 8)]++;
 18682:       }
 18683:     case 0b011_111:  //(A7)+
 18684:       M68kException.m6eIncremented += 2L << (7 << 3);
 18685:       return (XEiJ.regRn[15] += 2) - 2;
 18686:     case 0b100_000:  //-(A0)
 18687:       if (XEiJ.EFA_SEPARATE_AR) {
 18688:         M68kException.m6eIncremented -= 1L << (0 << 3);
 18689:         return --XEiJ.regRn[ 8];
 18690:       }
 18691:       //fallthrough
 18692:     case 0b100_001:  //-(A1)
 18693:       if (XEiJ.EFA_SEPARATE_AR) {
 18694:         M68kException.m6eIncremented -= 1L << (1 << 3);
 18695:         return --XEiJ.regRn[ 9];
 18696:       }
 18697:       //fallthrough
 18698:     case 0b100_010:  //-(A2)
 18699:       if (XEiJ.EFA_SEPARATE_AR) {
 18700:         M68kException.m6eIncremented -= 1L << (2 << 3);
 18701:         return --XEiJ.regRn[10];
 18702:       }
 18703:       //fallthrough
 18704:     case 0b100_011:  //-(A3)
 18705:       if (XEiJ.EFA_SEPARATE_AR) {
 18706:         M68kException.m6eIncremented -= 1L << (3 << 3);
 18707:         return --XEiJ.regRn[11];
 18708:       }
 18709:       //fallthrough
 18710:     case 0b100_100:  //-(A4)
 18711:       if (XEiJ.EFA_SEPARATE_AR) {
 18712:         M68kException.m6eIncremented -= 1L << (4 << 3);
 18713:         return --XEiJ.regRn[12];
 18714:       }
 18715:       //fallthrough
 18716:     case 0b100_101:  //-(A5)
 18717:       if (XEiJ.EFA_SEPARATE_AR) {
 18718:         M68kException.m6eIncremented -= 1L << (5 << 3);
 18719:         return --XEiJ.regRn[13];
 18720:       }
 18721:       //fallthrough
 18722:     case 0b100_110:  //-(A6)
 18723:       if (XEiJ.EFA_SEPARATE_AR) {
 18724:         M68kException.m6eIncremented -= 1L << (6 << 3);
 18725:         return --XEiJ.regRn[14];
 18726:       } else {
 18727:         M68kException.m6eIncremented -= 1L << ((ea & 7) << 3);
 18728:         return --XEiJ.regRn[ea - (0b100_000 - 8)];
 18729:       }
 18730:     case 0b100_111:  //-(A7)
 18731:       M68kException.m6eIncremented -= 2L << (7 << 3);
 18732:       return XEiJ.regRn[15] -= 2;
 18733:     case 0b101_000:  //(d16,A0)
 18734:     case 0b101_001:  //(d16,A1)
 18735:     case 0b101_010:  //(d16,A2)
 18736:     case 0b101_011:  //(d16,A3)
 18737:     case 0b101_100:  //(d16,A4)
 18738:     case 0b101_101:  //(d16,A5)
 18739:     case 0b101_110:  //(d16,A6)
 18740:     case 0b101_111:  //(d16,A7)
 18741:       if (XEiJ.MPU_COMPOUND_POSTINCREMENT) {
 18742:         return (XEiJ.regRn[ea - (0b101_000 - 8)]  //ベースレジスタ
 18743:                 + mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS));  //pcws。ワードディスプレースメント
 18744:       } else {
 18745:         t = XEiJ.regPC;
 18746:         XEiJ.regPC = t + 2;
 18747:         return (XEiJ.regRn[ea - (0b101_000 - 8)]  //ベースレジスタ
 18748:                 + mmuReadWordSignExword (t, XEiJ.regSRS));  //pcws。ワードディスプレースメント
 18749:       }
 18750:     case 0b110_000:  //(d8,A0,Rn.wl)
 18751:     case 0b110_001:  //(d8,A1,Rn.wl)
 18752:     case 0b110_010:  //(d8,A2,Rn.wl)
 18753:     case 0b110_011:  //(d8,A3,Rn.wl)
 18754:     case 0b110_100:  //(d8,A4,Rn.wl)
 18755:     case 0b110_101:  //(d8,A5,Rn.wl)
 18756:     case 0b110_110:  //(d8,A6,Rn.wl)
 18757:     case 0b110_111:  //(d8,A7,Rn.wl)
 18758:       if (XEiJ.MPU_COMPOUND_POSTINCREMENT) {
 18759:         w = mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);  //pcwz。拡張ワード
 18760:       } else {
 18761:         w = XEiJ.regPC;
 18762:         XEiJ.regPC = w + 2;
 18763:         w = mmuReadWordZeroExword (w, XEiJ.regSRS);  //pcwz。拡張ワード
 18764:       }
 18765:       if (w << 31 - 8 < 0) {  //フルフォーマット
 18766:         XEiJ.mpuCycleCount += w << -2 == 0 ? 1 : 3;  //メモリ間接なし:メモリ間接あり
 18767:       }
 18768:       t = (((~w & 0x0180) == 0 ? 0 :  //ベースレジスタサプレス
 18769:             XEiJ.regRn[ea - (0b110_000 - 8)])  //ベースレジスタ
 18770:            + (w << 31 - 8 >= 0 ? (byte) w :  //バイトディスプレースメント
 18771:               w << 31 - 5 >= 0 ? 0 :  //ヌルベースディスプレースメント
 18772:               w << 31 - 4 >= 0 ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) :  //pcws。ワードベースディスプレースメント
 18773:               mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS)));  //pcls。ロングベースディスプレースメント
 18774:       x = ((~w & 0x0140) == 0 ? 0 :  //インデックスサプレス
 18775:            (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] :  //ワードインデックス
 18776:             XEiJ.regRn[w >> 12])  //ロングインデックス
 18777:            << (w >> 9 & 3));  //スケールファクタ。ワードインデックスのときは符号拡張してから掛ける
 18778:       return ((w & 0x0103) <= 0x0100 ? t + x :  //メモリ間接なし
 18779:               ((XEiJ.TEST_BIT_2_SHIFT ? w << 31 - 2 >= 0 : (w & 4) == 0) ? mmuReadLongData (t + x, XEiJ.regSRS) :  //プリインデックス
 18780:                mmuReadLongData (t, XEiJ.regSRS) + x)  //ポストインデックス
 18781:               + ((XEiJ.TEST_BIT_1_SHIFT ? w << 31 - 1 >= 0 : (w & 2) == 0) ? 0 :  //ヌルアウタディスプレースメント
 18782:                  (XEiJ.TEST_BIT_0_SHIFT ? w << 31 - 0 >= 0 : (w & 1) == 0) ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) :  //pcws。ワードアウタディスプレースメント
 18783:                  mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS)));  //pcls。ロングアウタディスプレースメント
 18784:     case 0b111_000:  //(xxx).W
 18785:       return mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);  //pcws
 18786:     case 0b111_001:  //(xxx).L
 18787:       return mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS);  //pcls
 18788:     case 0b111_010:  //(d16,PC)
 18789:       t = XEiJ.regPC;
 18790:       XEiJ.regPC = t + 2;
 18791:       return (t  //ベースレジスタ
 18792:               + mmuReadWordSignExword (t, XEiJ.regSRS));  //pcws。ワードディスプレースメント
 18793:     case 0b111_011:  //(d8,PC,Rn.wl)
 18794:       t = XEiJ.regPC;
 18795:       XEiJ.regPC = t + 2;
 18796:       w = mmuReadWordZeroExword (t, XEiJ.regSRS);  //pcwz。拡張ワード
 18797:       if (w << 31 - 8 < 0) {  //フルフォーマット
 18798:         XEiJ.mpuCycleCount += w << -2 == 0 ? 1 : 3;  //メモリ間接なし:メモリ間接あり
 18799:       }
 18800:       t = (((~w & 0x0180) == 0 ? 0 :  //ベースレジスタサプレス
 18801:             t)  //ベースレジスタ
 18802:            + (w << 31 - 8 >= 0 ? (byte) w :  //バイトディスプレースメント
 18803:               w << 31 - 5 >= 0 ? 0 :  //ヌルベースディスプレースメント
 18804:               w << 31 - 4 >= 0 ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) :  //pcws。ワードベースディスプレースメント
 18805:               mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS)));  //pcls。ロングベースディスプレースメント
 18806:       x = ((~w & 0x0140) == 0 ? 0 :  //インデックスサプレス
 18807:            (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] :  //ワードインデックス
 18808:             XEiJ.regRn[w >> 12])  //ロングインデックス
 18809:            << (w >> 9 & 3));  //スケールファクタ。ワードインデックスのときは符号拡張してから掛ける
 18810:       return ((w & 0x0103) <= 0x0100 ? t + x :  //メモリ間接なし
 18811:               ((XEiJ.TEST_BIT_2_SHIFT ? w << 31 - 2 >= 0 : (w & 4) == 0) ? mmuReadLongData (t + x, XEiJ.regSRS) :  //プリインデックス
 18812:                mmuReadLongData (t, XEiJ.regSRS) + x)  //ポストインデックス
 18813:               + ((XEiJ.TEST_BIT_1_SHIFT ? w << 31 - 1 >= 0 : (w & 2) == 0) ? 0 :  //ヌルアウタディスプレースメント
 18814:                  (XEiJ.TEST_BIT_0_SHIFT ? w << 31 - 0 >= 0 : (w & 1) == 0) ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) :  //pcws。ワードアウタディスプレースメント
 18815:                  mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS)));  //pcls。ロングアウタディスプレースメント
 18816:     }  //switch
 18817:     M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION;
 18818:     throw M68kException.m6eSignal;
 18819:   }  //efaMemByte
 18820: 
 18821:   //a = efaMltByte (ea)  //|  M+-WXZ  |
 18822:   //  メモリ可変モードのバイトオペランドの実効アドレスを求める
 18823:   //  efaMemByteとの違いは(d16,PC)と(d8,PC,Rn.wl)がないこと
 18824:   @SuppressWarnings ("fallthrough") public static int efaMltByte (int ea) throws M68kException {
 18825:     int t, w, x;
 18826:     switch (ea) {
 18827:     case 0b010_000:  //(A0)
 18828:       if (XEiJ.EFA_SEPARATE_AR) {
 18829:         return XEiJ.regRn[ 8];
 18830:       }
 18831:       //fallthrough
 18832:     case 0b010_001:  //(A1)
 18833:       if (XEiJ.EFA_SEPARATE_AR) {
 18834:         return XEiJ.regRn[ 9];
 18835:       }
 18836:       //fallthrough
 18837:     case 0b010_010:  //(A2)
 18838:       if (XEiJ.EFA_SEPARATE_AR) {
 18839:         return XEiJ.regRn[10];
 18840:       }
 18841:       //fallthrough
 18842:     case 0b010_011:  //(A3)
 18843:       if (XEiJ.EFA_SEPARATE_AR) {
 18844:         return XEiJ.regRn[11];
 18845:       }
 18846:       //fallthrough
 18847:     case 0b010_100:  //(A4)
 18848:       if (XEiJ.EFA_SEPARATE_AR) {
 18849:         return XEiJ.regRn[12];
 18850:       }
 18851:       //fallthrough
 18852:     case 0b010_101:  //(A5)
 18853:       if (XEiJ.EFA_SEPARATE_AR) {
 18854:         return XEiJ.regRn[13];
 18855:       }
 18856:       //fallthrough
 18857:     case 0b010_110:  //(A6)
 18858:       if (XEiJ.EFA_SEPARATE_AR) {
 18859:         return XEiJ.regRn[14];
 18860:       }
 18861:       //fallthrough
 18862:     case 0b010_111:  //(A7)
 18863:       if (XEiJ.EFA_SEPARATE_AR) {
 18864:         return XEiJ.regRn[15];
 18865:       } else {
 18866:         return XEiJ.regRn[ea - (0b010_000 - 8)];
 18867:       }
 18868:     case 0b011_000:  //(A0)+
 18869:       if (XEiJ.EFA_SEPARATE_AR) {
 18870:         M68kException.m6eIncremented += 1L << (0 << 3);
 18871:         return XEiJ.regRn[ 8]++;
 18872:       }
 18873:       //fallthrough
 18874:     case 0b011_001:  //(A1)+
 18875:       if (XEiJ.EFA_SEPARATE_AR) {
 18876:         M68kException.m6eIncremented += 1L << (1 << 3);
 18877:         return XEiJ.regRn[ 9]++;
 18878:       }
 18879:       //fallthrough
 18880:     case 0b011_010:  //(A2)+
 18881:       if (XEiJ.EFA_SEPARATE_AR) {
 18882:         M68kException.m6eIncremented += 1L << (2 << 3);
 18883:         return XEiJ.regRn[10]++;
 18884:       }
 18885:       //fallthrough
 18886:     case 0b011_011:  //(A3)+
 18887:       if (XEiJ.EFA_SEPARATE_AR) {
 18888:         M68kException.m6eIncremented += 1L << (3 << 3);
 18889:         return XEiJ.regRn[11]++;
 18890:       }
 18891:       //fallthrough
 18892:     case 0b011_100:  //(A4)+
 18893:       if (XEiJ.EFA_SEPARATE_AR) {
 18894:         M68kException.m6eIncremented += 1L << (4 << 3);
 18895:         return XEiJ.regRn[12]++;
 18896:       }
 18897:       //fallthrough
 18898:     case 0b011_101:  //(A5)+
 18899:       if (XEiJ.EFA_SEPARATE_AR) {
 18900:         M68kException.m6eIncremented += 1L << (5 << 3);
 18901:         return XEiJ.regRn[13]++;
 18902:       }
 18903:       //fallthrough
 18904:     case 0b011_110:  //(A6)+
 18905:       if (XEiJ.EFA_SEPARATE_AR) {
 18906:         M68kException.m6eIncremented += 1L << (6 << 3);
 18907:         return XEiJ.regRn[14]++;
 18908:       } else {
 18909:         M68kException.m6eIncremented += 1L << ((ea & 7) << 3);
 18910:         return XEiJ.regRn[ea - (0b011_000 - 8)]++;
 18911:       }
 18912:     case 0b011_111:  //(A7)+
 18913:       M68kException.m6eIncremented += 2L << (7 << 3);
 18914:       return (XEiJ.regRn[15] += 2) - 2;
 18915:     case 0b100_000:  //-(A0)
 18916:       if (XEiJ.EFA_SEPARATE_AR) {
 18917:         M68kException.m6eIncremented -= 1L << (0 << 3);
 18918:         return --XEiJ.regRn[ 8];
 18919:       }
 18920:       //fallthrough
 18921:     case 0b100_001:  //-(A1)
 18922:       if (XEiJ.EFA_SEPARATE_AR) {
 18923:         M68kException.m6eIncremented -= 1L << (1 << 3);
 18924:         return --XEiJ.regRn[ 9];
 18925:       }
 18926:       //fallthrough
 18927:     case 0b100_010:  //-(A2)
 18928:       if (XEiJ.EFA_SEPARATE_AR) {
 18929:         M68kException.m6eIncremented -= 1L << (2 << 3);
 18930:         return --XEiJ.regRn[10];
 18931:       }
 18932:       //fallthrough
 18933:     case 0b100_011:  //-(A3)
 18934:       if (XEiJ.EFA_SEPARATE_AR) {
 18935:         M68kException.m6eIncremented -= 1L << (3 << 3);
 18936:         return --XEiJ.regRn[11];
 18937:       }
 18938:       //fallthrough
 18939:     case 0b100_100:  //-(A4)
 18940:       if (XEiJ.EFA_SEPARATE_AR) {
 18941:         M68kException.m6eIncremented -= 1L << (4 << 3);
 18942:         return --XEiJ.regRn[12];
 18943:       }
 18944:       //fallthrough
 18945:     case 0b100_101:  //-(A5)
 18946:       if (XEiJ.EFA_SEPARATE_AR) {
 18947:         M68kException.m6eIncremented -= 1L << (5 << 3);
 18948:         return --XEiJ.regRn[13];
 18949:       }
 18950:       //fallthrough
 18951:     case 0b100_110:  //-(A6)
 18952:       if (XEiJ.EFA_SEPARATE_AR) {
 18953:         M68kException.m6eIncremented -= 1L << (6 << 3);
 18954:         return --XEiJ.regRn[14];
 18955:       } else {
 18956:         M68kException.m6eIncremented -= 1L << ((ea & 7) << 3);
 18957:         return --XEiJ.regRn[ea - (0b100_000 - 8)];
 18958:       }
 18959:     case 0b100_111:  //-(A7)
 18960:       M68kException.m6eIncremented -= 2L << (7 << 3);
 18961:       return XEiJ.regRn[15] -= 2;
 18962:     case 0b101_000:  //(d16,A0)
 18963:     case 0b101_001:  //(d16,A1)
 18964:     case 0b101_010:  //(d16,A2)
 18965:     case 0b101_011:  //(d16,A3)
 18966:     case 0b101_100:  //(d16,A4)
 18967:     case 0b101_101:  //(d16,A5)
 18968:     case 0b101_110:  //(d16,A6)
 18969:     case 0b101_111:  //(d16,A7)
 18970:       if (XEiJ.MPU_COMPOUND_POSTINCREMENT) {
 18971:         return (XEiJ.regRn[ea - (0b101_000 - 8)]  //ベースレジスタ
 18972:                 + mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS));  //pcws。ワードディスプレースメント
 18973:       } else {
 18974:         t = XEiJ.regPC;
 18975:         XEiJ.regPC = t + 2;
 18976:         return (XEiJ.regRn[ea - (0b101_000 - 8)]  //ベースレジスタ
 18977:                 + mmuReadWordSignExword (t, XEiJ.regSRS));  //pcws。ワードディスプレースメント
 18978:       }
 18979:     case 0b110_000:  //(d8,A0,Rn.wl)
 18980:     case 0b110_001:  //(d8,A1,Rn.wl)
 18981:     case 0b110_010:  //(d8,A2,Rn.wl)
 18982:     case 0b110_011:  //(d8,A3,Rn.wl)
 18983:     case 0b110_100:  //(d8,A4,Rn.wl)
 18984:     case 0b110_101:  //(d8,A5,Rn.wl)
 18985:     case 0b110_110:  //(d8,A6,Rn.wl)
 18986:     case 0b110_111:  //(d8,A7,Rn.wl)
 18987:       if (XEiJ.MPU_COMPOUND_POSTINCREMENT) {
 18988:         w = mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);  //pcwz。拡張ワード
 18989:       } else {
 18990:         w = XEiJ.regPC;
 18991:         XEiJ.regPC = w + 2;
 18992:         w = mmuReadWordZeroExword (w, XEiJ.regSRS);  //pcwz。拡張ワード
 18993:       }
 18994:       if (w << 31 - 8 < 0) {  //フルフォーマット
 18995:         XEiJ.mpuCycleCount += w << -2 == 0 ? 1 : 3;  //メモリ間接なし:メモリ間接あり
 18996:       }
 18997:       t = (((~w & 0x0180) == 0 ? 0 :  //ベースレジスタサプレス
 18998:             XEiJ.regRn[ea - (0b110_000 - 8)])  //ベースレジスタ
 18999:            + (w << 31 - 8 >= 0 ? (byte) w :  //バイトディスプレースメント
 19000:               w << 31 - 5 >= 0 ? 0 :  //ヌルベースディスプレースメント
 19001:               w << 31 - 4 >= 0 ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) :  //pcws。ワードベースディスプレースメント
 19002:               mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS)));  //pcls。ロングベースディスプレースメント
 19003:       x = ((~w & 0x0140) == 0 ? 0 :  //インデックスサプレス
 19004:            (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] :  //ワードインデックス
 19005:             XEiJ.regRn[w >> 12])  //ロングインデックス
 19006:            << (w >> 9 & 3));  //スケールファクタ。ワードインデックスのときは符号拡張してから掛ける
 19007:       return ((w & 0x0103) <= 0x0100 ? t + x :  //メモリ間接なし
 19008:               ((XEiJ.TEST_BIT_2_SHIFT ? w << 31 - 2 >= 0 : (w & 4) == 0) ? mmuReadLongData (t + x, XEiJ.regSRS) :  //プリインデックス
 19009:                mmuReadLongData (t, XEiJ.regSRS) + x)  //ポストインデックス
 19010:               + ((XEiJ.TEST_BIT_1_SHIFT ? w << 31 - 1 >= 0 : (w & 2) == 0) ? 0 :  //ヌルアウタディスプレースメント
 19011:                  (XEiJ.TEST_BIT_0_SHIFT ? w << 31 - 0 >= 0 : (w & 1) == 0) ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) :  //pcws。ワードアウタディスプレースメント
 19012:                  mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS)));  //pcls。ロングアウタディスプレースメント
 19013:     case 0b111_000:  //(xxx).W
 19014:       return mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);  //pcws
 19015:     case 0b111_001:  //(xxx).L
 19016:       return mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS);  //pcls
 19017:     }  //switch
 19018:     M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION;
 19019:     throw M68kException.m6eSignal;
 19020:   }  //efaMltByte
 19021: 
 19022:   //a = efaCntByte (ea)  //|  M  WXZP |
 19023:   //  制御モードのロングオペランドの実効アドレスを求める
 19024:   //  efaMemByteとの違いは(Ar)+と-(Ar)がないこと
 19025:   @SuppressWarnings ("fallthrough") public static int efaCntByte (int ea) throws M68kException {
 19026:     int t, w, x;
 19027:     switch (ea) {
 19028:     case 0b010_000:  //(A0)
 19029:       if (XEiJ.EFA_SEPARATE_AR) {
 19030:         return XEiJ.regRn[ 8];
 19031:       }
 19032:       //fallthrough
 19033:     case 0b010_001:  //(A1)
 19034:       if (XEiJ.EFA_SEPARATE_AR) {
 19035:         return XEiJ.regRn[ 9];
 19036:       }
 19037:       //fallthrough
 19038:     case 0b010_010:  //(A2)
 19039:       if (XEiJ.EFA_SEPARATE_AR) {
 19040:         return XEiJ.regRn[10];
 19041:       }
 19042:       //fallthrough
 19043:     case 0b010_011:  //(A3)
 19044:       if (XEiJ.EFA_SEPARATE_AR) {
 19045:         return XEiJ.regRn[11];
 19046:       }
 19047:       //fallthrough
 19048:     case 0b010_100:  //(A4)
 19049:       if (XEiJ.EFA_SEPARATE_AR) {
 19050:         return XEiJ.regRn[12];
 19051:       }
 19052:       //fallthrough
 19053:     case 0b010_101:  //(A5)
 19054:       if (XEiJ.EFA_SEPARATE_AR) {
 19055:         return XEiJ.regRn[13];
 19056:       }
 19057:       //fallthrough
 19058:     case 0b010_110:  //(A6)
 19059:       if (XEiJ.EFA_SEPARATE_AR) {
 19060:         return XEiJ.regRn[14];
 19061:       }
 19062:       //fallthrough
 19063:     case 0b010_111:  //(A7)
 19064:       if (XEiJ.EFA_SEPARATE_AR) {
 19065:         return XEiJ.regRn[15];
 19066:       } else {
 19067:         return XEiJ.regRn[ea - (0b010_000 - 8)];
 19068:       }
 19069:     case 0b101_000:  //(d16,A0)
 19070:     case 0b101_001:  //(d16,A1)
 19071:     case 0b101_010:  //(d16,A2)
 19072:     case 0b101_011:  //(d16,A3)
 19073:     case 0b101_100:  //(d16,A4)
 19074:     case 0b101_101:  //(d16,A5)
 19075:     case 0b101_110:  //(d16,A6)
 19076:     case 0b101_111:  //(d16,A7)
 19077:       if (XEiJ.MPU_COMPOUND_POSTINCREMENT) {
 19078:         return (XEiJ.regRn[ea - (0b101_000 - 8)]  //ベースレジスタ
 19079:                 + mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS));  //pcws。ワードディスプレースメント
 19080:       } else {
 19081:         t = XEiJ.regPC;
 19082:         XEiJ.regPC = t + 2;
 19083:         return (XEiJ.regRn[ea - (0b101_000 - 8)]  //ベースレジスタ
 19084:                 + mmuReadWordSignExword (t, XEiJ.regSRS));  //pcws。ワードディスプレースメント
 19085:       }
 19086:     case 0b110_000:  //(d8,A0,Rn.wl)
 19087:     case 0b110_001:  //(d8,A1,Rn.wl)
 19088:     case 0b110_010:  //(d8,A2,Rn.wl)
 19089:     case 0b110_011:  //(d8,A3,Rn.wl)
 19090:     case 0b110_100:  //(d8,A4,Rn.wl)
 19091:     case 0b110_101:  //(d8,A5,Rn.wl)
 19092:     case 0b110_110:  //(d8,A6,Rn.wl)
 19093:     case 0b110_111:  //(d8,A7,Rn.wl)
 19094:       if (XEiJ.MPU_COMPOUND_POSTINCREMENT) {
 19095:         w = mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);  //pcwz。拡張ワード
 19096:       } else {
 19097:         w = XEiJ.regPC;
 19098:         XEiJ.regPC = w + 2;
 19099:         w = mmuReadWordZeroExword (w, XEiJ.regSRS);  //pcwz。拡張ワード
 19100:       }
 19101:       if (w << 31 - 8 < 0) {  //フルフォーマット
 19102:         XEiJ.mpuCycleCount += w << -2 == 0 ? 1 : 3;  //メモリ間接なし:メモリ間接あり
 19103:       }
 19104:       t = (((~w & 0x0180) == 0 ? 0 :  //ベースレジスタサプレス
 19105:             XEiJ.regRn[ea - (0b110_000 - 8)])  //ベースレジスタ
 19106:            + (w << 31 - 8 >= 0 ? (byte) w :  //バイトディスプレースメント
 19107:               w << 31 - 5 >= 0 ? 0 :  //ヌルベースディスプレースメント
 19108:               w << 31 - 4 >= 0 ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) :  //pcws。ワードベースディスプレースメント
 19109:               mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS)));  //pcls。ロングベースディスプレースメント
 19110:       x = ((~w & 0x0140) == 0 ? 0 :  //インデックスサプレス
 19111:            (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] :  //ワードインデックス
 19112:             XEiJ.regRn[w >> 12])  //ロングインデックス
 19113:            << (w >> 9 & 3));  //スケールファクタ。ワードインデックスのときは符号拡張してから掛ける
 19114:       return ((w & 0x0103) <= 0x0100 ? t + x :  //メモリ間接なし
 19115:               ((XEiJ.TEST_BIT_2_SHIFT ? w << 31 - 2 >= 0 : (w & 4) == 0) ? mmuReadLongData (t + x, XEiJ.regSRS) :  //プリインデックス
 19116:                mmuReadLongData (t, XEiJ.regSRS) + x)  //ポストインデックス
 19117:               + ((XEiJ.TEST_BIT_1_SHIFT ? w << 31 - 1 >= 0 : (w & 2) == 0) ? 0 :  //ヌルアウタディスプレースメント
 19118:                  (XEiJ.TEST_BIT_0_SHIFT ? w << 31 - 0 >= 0 : (w & 1) == 0) ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) :  //pcws。ワードアウタディスプレースメント
 19119:                  mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS)));  //pcls。ロングアウタディスプレースメント
 19120:     case 0b111_000:  //(xxx).W
 19121:       return mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);  //pcws
 19122:     case 0b111_001:  //(xxx).L
 19123:       return mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS);  //pcls
 19124:     case 0b111_010:  //(d16,PC)
 19125:       t = XEiJ.regPC;
 19126:       XEiJ.regPC = t + 2;
 19127:       return (t  //ベースレジスタ
 19128:               + mmuReadWordSignExword (t, XEiJ.regSRS));  //pcws。ワードディスプレースメント
 19129:     case 0b111_011:  //(d8,PC,Rn.wl)
 19130:       t = XEiJ.regPC;
 19131:       XEiJ.regPC = t + 2;
 19132:       w = mmuReadWordZeroExword (t, XEiJ.regSRS);  //pcwz。拡張ワード
 19133:       if (w << 31 - 8 < 0) {  //フルフォーマット
 19134:         XEiJ.mpuCycleCount += w << -2 == 0 ? 1 : 3;  //メモリ間接なし:メモリ間接あり
 19135:       }
 19136:       t = (((~w & 0x0180) == 0 ? 0 :  //ベースレジスタサプレス
 19137:             t)  //ベースレジスタ
 19138:            + (w << 31 - 8 >= 0 ? (byte) w :  //バイトディスプレースメント
 19139:               w << 31 - 5 >= 0 ? 0 :  //ヌルベースディスプレースメント
 19140:               w << 31 - 4 >= 0 ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) :  //pcws。ワードベースディスプレースメント
 19141:               mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS)));  //pcls。ロングベースディスプレースメント
 19142:       x = ((~w & 0x0140) == 0 ? 0 :  //インデックスサプレス
 19143:            (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] :  //ワードインデックス
 19144:             XEiJ.regRn[w >> 12])  //ロングインデックス
 19145:            << (w >> 9 & 3));  //スケールファクタ。ワードインデックスのときは符号拡張してから掛ける
 19146:       return ((w & 0x0103) <= 0x0100 ? t + x :  //メモリ間接なし
 19147:               ((XEiJ.TEST_BIT_2_SHIFT ? w << 31 - 2 >= 0 : (w & 4) == 0) ? mmuReadLongData (t + x, XEiJ.regSRS) :  //プリインデックス
 19148:                mmuReadLongData (t, XEiJ.regSRS) + x)  //ポストインデックス
 19149:               + ((XEiJ.TEST_BIT_1_SHIFT ? w << 31 - 1 >= 0 : (w & 2) == 0) ? 0 :  //ヌルアウタディスプレースメント
 19150:                  (XEiJ.TEST_BIT_0_SHIFT ? w << 31 - 0 >= 0 : (w & 1) == 0) ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) :  //pcws。ワードアウタディスプレースメント
 19151:                  mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS)));  //pcls。ロングアウタディスプレースメント
 19152:     }  //switch
 19153:     M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION;
 19154:     throw M68kException.m6eSignal;
 19155:   }  //efaCntByte
 19156: 
 19157:   //a = efaAnyWord (ea)  //|  M+-WXZPI|
 19158:   //  任意のモードのワードオペランドの実効アドレスを求める
 19159:   //  efaAnyByteとの違いは(Ar)+と-(Ar)がArを2変化させることと、(A7)+と-(A7)と#<data>の特別な動作がないこと
 19160:   @SuppressWarnings ("fallthrough") public static int efaAnyWord (int ea) throws M68kException {
 19161:     int t, w, x;
 19162:     switch (ea) {
 19163:     case 0b010_000:  //(A0)
 19164:       if (XEiJ.EFA_SEPARATE_AR) {
 19165:         return XEiJ.regRn[ 8];
 19166:       }
 19167:       //fallthrough
 19168:     case 0b010_001:  //(A1)
 19169:       if (XEiJ.EFA_SEPARATE_AR) {
 19170:         return XEiJ.regRn[ 9];
 19171:       }
 19172:       //fallthrough
 19173:     case 0b010_010:  //(A2)
 19174:       if (XEiJ.EFA_SEPARATE_AR) {
 19175:         return XEiJ.regRn[10];
 19176:       }
 19177:       //fallthrough
 19178:     case 0b010_011:  //(A3)
 19179:       if (XEiJ.EFA_SEPARATE_AR) {
 19180:         return XEiJ.regRn[11];
 19181:       }
 19182:       //fallthrough
 19183:     case 0b010_100:  //(A4)
 19184:       if (XEiJ.EFA_SEPARATE_AR) {
 19185:         return XEiJ.regRn[12];
 19186:       }
 19187:       //fallthrough
 19188:     case 0b010_101:  //(A5)
 19189:       if (XEiJ.EFA_SEPARATE_AR) {
 19190:         return XEiJ.regRn[13];
 19191:       }
 19192:       //fallthrough
 19193:     case 0b010_110:  //(A6)
 19194:       if (XEiJ.EFA_SEPARATE_AR) {
 19195:         return XEiJ.regRn[14];
 19196:       }
 19197:       //fallthrough
 19198:     case 0b010_111:  //(A7)
 19199:       if (XEiJ.EFA_SEPARATE_AR) {
 19200:         return XEiJ.regRn[15];
 19201:       } else {
 19202:         return XEiJ.regRn[ea - (0b010_000 - 8)];
 19203:       }
 19204:     case 0b011_000:  //(A0)+
 19205:       if (XEiJ.EFA_SEPARATE_AR) {
 19206:         M68kException.m6eIncremented += 2L << (0 << 3);
 19207:         return (XEiJ.regRn[ 8] += 2) - 2;
 19208:       }
 19209:       //fallthrough
 19210:     case 0b011_001:  //(A1)+
 19211:       if (XEiJ.EFA_SEPARATE_AR) {
 19212:         M68kException.m6eIncremented += 2L << (1 << 3);
 19213:         return (XEiJ.regRn[ 9] += 2) - 2;
 19214:       }
 19215:       //fallthrough
 19216:     case 0b011_010:  //(A2)+
 19217:       if (XEiJ.EFA_SEPARATE_AR) {
 19218:         M68kException.m6eIncremented += 2L << (2 << 3);
 19219:         return (XEiJ.regRn[10] += 2) - 2;
 19220:       }
 19221:       //fallthrough
 19222:     case 0b011_011:  //(A3)+
 19223:       if (XEiJ.EFA_SEPARATE_AR) {
 19224:         M68kException.m6eIncremented += 2L << (3 << 3);
 19225:         return (XEiJ.regRn[11] += 2) - 2;
 19226:       }
 19227:       //fallthrough
 19228:     case 0b011_100:  //(A4)+
 19229:       if (XEiJ.EFA_SEPARATE_AR) {
 19230:         M68kException.m6eIncremented += 2L << (4 << 3);
 19231:         return (XEiJ.regRn[12] += 2) - 2;
 19232:       }
 19233:       //fallthrough
 19234:     case 0b011_101:  //(A5)+
 19235:       if (XEiJ.EFA_SEPARATE_AR) {
 19236:         M68kException.m6eIncremented += 2L << (5 << 3);
 19237:         return (XEiJ.regRn[13] += 2) - 2;
 19238:       }
 19239:       //fallthrough
 19240:     case 0b011_110:  //(A6)+
 19241:       if (XEiJ.EFA_SEPARATE_AR) {
 19242:         M68kException.m6eIncremented += 2L << (6 << 3);
 19243:         return (XEiJ.regRn[14] += 2) - 2;
 19244:       }
 19245:       //fallthrough
 19246:     case 0b011_111:  //(A7)+
 19247:       if (XEiJ.EFA_SEPARATE_AR) {
 19248:         M68kException.m6eIncremented += 2L << (7 << 3);
 19249:         return (XEiJ.regRn[15] += 2) - 2;
 19250:       } else {
 19251:         M68kException.m6eIncremented += 2L << ((ea & 7) << 3);
 19252:         return (XEiJ.regRn[ea - (0b011_000 - 8)] += 2) - 2;
 19253:       }
 19254:     case 0b100_000:  //-(A0)
 19255:       if (XEiJ.EFA_SEPARATE_AR) {
 19256:         M68kException.m6eIncremented -= 2L << (0 << 3);
 19257:         return XEiJ.regRn[ 8] -= 2;
 19258:       }
 19259:       //fallthrough
 19260:     case 0b100_001:  //-(A1)
 19261:       if (XEiJ.EFA_SEPARATE_AR) {
 19262:         M68kException.m6eIncremented -= 2L << (1 << 3);
 19263:         return XEiJ.regRn[ 9] -= 2;
 19264:       }
 19265:       //fallthrough
 19266:     case 0b100_010:  //-(A2)
 19267:       if (XEiJ.EFA_SEPARATE_AR) {
 19268:         M68kException.m6eIncremented -= 2L << (2 << 3);
 19269:         return XEiJ.regRn[10] -= 2;
 19270:       }
 19271:       //fallthrough
 19272:     case 0b100_011:  //-(A3)
 19273:       if (XEiJ.EFA_SEPARATE_AR) {
 19274:         M68kException.m6eIncremented -= 2L << (3 << 3);
 19275:         return XEiJ.regRn[11] -= 2;
 19276:       }
 19277:       //fallthrough
 19278:     case 0b100_100:  //-(A4)
 19279:       if (XEiJ.EFA_SEPARATE_AR) {
 19280:         M68kException.m6eIncremented -= 2L << (4 << 3);
 19281:         return XEiJ.regRn[12] -= 2;
 19282:       }
 19283:       //fallthrough
 19284:     case 0b100_101:  //-(A5)
 19285:       if (XEiJ.EFA_SEPARATE_AR) {
 19286:         M68kException.m6eIncremented -= 2L << (5 << 3);
 19287:         return XEiJ.regRn[13] -= 2;
 19288:       }
 19289:       //fallthrough
 19290:     case 0b100_110:  //-(A6)
 19291:       if (XEiJ.EFA_SEPARATE_AR) {
 19292:         M68kException.m6eIncremented -= 2L << (6 << 3);
 19293:         return XEiJ.regRn[14] -= 2;
 19294:       }
 19295:       //fallthrough
 19296:     case 0b100_111:  //-(A7)
 19297:       if (XEiJ.EFA_SEPARATE_AR) {
 19298:         M68kException.m6eIncremented -= 2L << (7 << 3);
 19299:         return XEiJ.regRn[15] -= 2;
 19300:       } else {
 19301:         M68kException.m6eIncremented -= 2L << ((ea & 7) << 3);
 19302:         return XEiJ.regRn[ea - (0b100_000 - 8)] -= 2;
 19303:       }
 19304:     case 0b101_000:  //(d16,A0)
 19305:     case 0b101_001:  //(d16,A1)
 19306:     case 0b101_010:  //(d16,A2)
 19307:     case 0b101_011:  //(d16,A3)
 19308:     case 0b101_100:  //(d16,A4)
 19309:     case 0b101_101:  //(d16,A5)
 19310:     case 0b101_110:  //(d16,A6)
 19311:     case 0b101_111:  //(d16,A7)
 19312:       if (XEiJ.MPU_COMPOUND_POSTINCREMENT) {
 19313:         return (XEiJ.regRn[ea - (0b101_000 - 8)]  //ベースレジスタ
 19314:                 + mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS));  //pcws。ワードディスプレースメント
 19315:       } else {
 19316:         t = XEiJ.regPC;
 19317:         XEiJ.regPC = t + 2;
 19318:         return (XEiJ.regRn[ea - (0b101_000 - 8)]  //ベースレジスタ
 19319:                 + mmuReadWordSignExword (t, XEiJ.regSRS));  //pcws。ワードディスプレースメント
 19320:       }
 19321:     case 0b110_000:  //(d8,A0,Rn.wl)
 19322:     case 0b110_001:  //(d8,A1,Rn.wl)
 19323:     case 0b110_010:  //(d8,A2,Rn.wl)
 19324:     case 0b110_011:  //(d8,A3,Rn.wl)
 19325:     case 0b110_100:  //(d8,A4,Rn.wl)
 19326:     case 0b110_101:  //(d8,A5,Rn.wl)
 19327:     case 0b110_110:  //(d8,A6,Rn.wl)
 19328:     case 0b110_111:  //(d8,A7,Rn.wl)
 19329:       if (XEiJ.MPU_COMPOUND_POSTINCREMENT) {
 19330:         w = mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);  //pcwz。拡張ワード
 19331:       } else {
 19332:         w = XEiJ.regPC;
 19333:         XEiJ.regPC = w + 2;
 19334:         w = mmuReadWordZeroExword (w, XEiJ.regSRS);  //pcwz。拡張ワード
 19335:       }
 19336:       if (w << 31 - 8 < 0) {  //フルフォーマット
 19337:         XEiJ.mpuCycleCount += w << -2 == 0 ? 1 : 3;  //メモリ間接なし:メモリ間接あり
 19338:       }
 19339:       t = (((~w & 0x0180) == 0 ? 0 :  //ベースレジスタサプレス
 19340:             XEiJ.regRn[ea - (0b110_000 - 8)])  //ベースレジスタ
 19341:            + (w << 31 - 8 >= 0 ? (byte) w :  //バイトディスプレースメント
 19342:               w << 31 - 5 >= 0 ? 0 :  //ヌルベースディスプレースメント
 19343:               w << 31 - 4 >= 0 ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) :  //pcws。ワードベースディスプレースメント
 19344:               mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS)));  //pcls。ロングベースディスプレースメント
 19345:       x = ((~w & 0x0140) == 0 ? 0 :  //インデックスサプレス
 19346:            (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] :  //ワードインデックス
 19347:             XEiJ.regRn[w >> 12])  //ロングインデックス
 19348:            << (w >> 9 & 3));  //スケールファクタ。ワードインデックスのときは符号拡張してから掛ける
 19349:       return ((w & 0x0103) <= 0x0100 ? t + x :  //メモリ間接なし
 19350:               ((XEiJ.TEST_BIT_2_SHIFT ? w << 31 - 2 >= 0 : (w & 4) == 0) ? mmuReadLongData (t + x, XEiJ.regSRS) :  //プリインデックス
 19351:                mmuReadLongData (t, XEiJ.regSRS) + x)  //ポストインデックス
 19352:               + ((XEiJ.TEST_BIT_1_SHIFT ? w << 31 - 1 >= 0 : (w & 2) == 0) ? 0 :  //ヌルアウタディスプレースメント
 19353:                  (XEiJ.TEST_BIT_0_SHIFT ? w << 31 - 0 >= 0 : (w & 1) == 0) ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) :  //pcws。ワードアウタディスプレースメント
 19354:                  mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS)));  //pcls。ロングアウタディスプレースメント
 19355:     case 0b111_000:  //(xxx).W
 19356:       return mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);  //pcws
 19357:     case 0b111_001:  //(xxx).L
 19358:       return mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS);  //pcls
 19359:     case 0b111_010:  //(d16,PC)
 19360:       t = XEiJ.regPC;
 19361:       XEiJ.regPC = t + 2;
 19362:       return (t  //ベースレジスタ
 19363:               + mmuReadWordSignExword (t, XEiJ.regSRS));  //pcws。ワードディスプレースメント
 19364:     case 0b111_011:  //(d8,PC,Rn.wl)
 19365:       t = XEiJ.regPC;
 19366:       XEiJ.regPC = t + 2;
 19367:       w = mmuReadWordZeroExword (t, XEiJ.regSRS);  //pcwz。拡張ワード
 19368:       if (w << 31 - 8 < 0) {  //フルフォーマット
 19369:         XEiJ.mpuCycleCount += w << -2 == 0 ? 1 : 3;  //メモリ間接なし:メモリ間接あり
 19370:       }
 19371:       t = (((~w & 0x0180) == 0 ? 0 :  //ベースレジスタサプレス
 19372:             t)  //ベースレジスタ
 19373:            + (w << 31 - 8 >= 0 ? (byte) w :  //バイトディスプレースメント
 19374:               w << 31 - 5 >= 0 ? 0 :  //ヌルベースディスプレースメント
 19375:               w << 31 - 4 >= 0 ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) :  //pcws。ワードベースディスプレースメント
 19376:               mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS)));  //pcls。ロングベースディスプレースメント
 19377:       x = ((~w & 0x0140) == 0 ? 0 :  //インデックスサプレス
 19378:            (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] :  //ワードインデックス
 19379:             XEiJ.regRn[w >> 12])  //ロングインデックス
 19380:            << (w >> 9 & 3));  //スケールファクタ。ワードインデックスのときは符号拡張してから掛ける
 19381:       return ((w & 0x0103) <= 0x0100 ? t + x :  //メモリ間接なし
 19382:               ((XEiJ.TEST_BIT_2_SHIFT ? w << 31 - 2 >= 0 : (w & 4) == 0) ? mmuReadLongData (t + x, XEiJ.regSRS) :  //プリインデックス
 19383:                mmuReadLongData (t, XEiJ.regSRS) + x)  //ポストインデックス
 19384:               + ((XEiJ.TEST_BIT_1_SHIFT ? w << 31 - 1 >= 0 : (w & 2) == 0) ? 0 :  //ヌルアウタディスプレースメント
 19385:                  (XEiJ.TEST_BIT_0_SHIFT ? w << 31 - 0 >= 0 : (w & 1) == 0) ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) :  //pcws。ワードアウタディスプレースメント
 19386:                  mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS)));  //pcls。ロングアウタディスプレースメント
 19387:     case 0b111_100:  //#<data>
 19388:       if (XEiJ.MPU_COMPOUND_POSTINCREMENT) {
 19389:         return (XEiJ.regPC += 2) - 2;
 19390:       } else {
 19391:         t = XEiJ.regPC;
 19392:         XEiJ.regPC = t + 2;
 19393:         return t;
 19394:       }
 19395:     }  //switch
 19396:     M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION;
 19397:     throw M68kException.m6eSignal;
 19398:   }  //efaAnyWord
 19399: 
 19400:   //a = efaMemWord (ea)  //|  M+-WXZP |
 19401:   //  メモリモードのワードオペランドの実効アドレスを求める
 19402:   //  efaAnyWordとの違いは#<data>がないこと
 19403:   @SuppressWarnings ("fallthrough") public static int efaMemWord (int ea) throws M68kException {
 19404:     int t, w, x;
 19405:     switch (ea) {
 19406:     case 0b010_000:  //(A0)
 19407:       if (XEiJ.EFA_SEPARATE_AR) {
 19408:         return XEiJ.regRn[ 8];
 19409:       }
 19410:       //fallthrough
 19411:     case 0b010_001:  //(A1)
 19412:       if (XEiJ.EFA_SEPARATE_AR) {
 19413:         return XEiJ.regRn[ 9];
 19414:       }
 19415:       //fallthrough
 19416:     case 0b010_010:  //(A2)
 19417:       if (XEiJ.EFA_SEPARATE_AR) {
 19418:         return XEiJ.regRn[10];
 19419:       }
 19420:       //fallthrough
 19421:     case 0b010_011:  //(A3)
 19422:       if (XEiJ.EFA_SEPARATE_AR) {
 19423:         return XEiJ.regRn[11];
 19424:       }
 19425:       //fallthrough
 19426:     case 0b010_100:  //(A4)
 19427:       if (XEiJ.EFA_SEPARATE_AR) {
 19428:         return XEiJ.regRn[12];
 19429:       }
 19430:       //fallthrough
 19431:     case 0b010_101:  //(A5)
 19432:       if (XEiJ.EFA_SEPARATE_AR) {
 19433:         return XEiJ.regRn[13];
 19434:       }
 19435:       //fallthrough
 19436:     case 0b010_110:  //(A6)
 19437:       if (XEiJ.EFA_SEPARATE_AR) {
 19438:         return XEiJ.regRn[14];
 19439:       }
 19440:       //fallthrough
 19441:     case 0b010_111:  //(A7)
 19442:       if (XEiJ.EFA_SEPARATE_AR) {
 19443:         return XEiJ.regRn[15];
 19444:       } else {
 19445:         return XEiJ.regRn[ea - (0b010_000 - 8)];
 19446:       }
 19447:     case 0b011_000:  //(A0)+
 19448:       if (XEiJ.EFA_SEPARATE_AR) {
 19449:         M68kException.m6eIncremented += 2L << (0 << 3);
 19450:         return (XEiJ.regRn[ 8] += 2) - 2;
 19451:       }
 19452:       //fallthrough
 19453:     case 0b011_001:  //(A1)+
 19454:       if (XEiJ.EFA_SEPARATE_AR) {
 19455:         M68kException.m6eIncremented += 2L << (1 << 3);
 19456:         return (XEiJ.regRn[ 9] += 2) - 2;
 19457:       }
 19458:       //fallthrough
 19459:     case 0b011_010:  //(A2)+
 19460:       if (XEiJ.EFA_SEPARATE_AR) {
 19461:         M68kException.m6eIncremented += 2L << (2 << 3);
 19462:         return (XEiJ.regRn[10] += 2) - 2;
 19463:       }
 19464:       //fallthrough
 19465:     case 0b011_011:  //(A3)+
 19466:       if (XEiJ.EFA_SEPARATE_AR) {
 19467:         M68kException.m6eIncremented += 2L << (3 << 3);
 19468:         return (XEiJ.regRn[11] += 2) - 2;
 19469:       }
 19470:       //fallthrough
 19471:     case 0b011_100:  //(A4)+
 19472:       if (XEiJ.EFA_SEPARATE_AR) {
 19473:         M68kException.m6eIncremented += 2L << (4 << 3);
 19474:         return (XEiJ.regRn[12] += 2) - 2;
 19475:       }
 19476:       //fallthrough
 19477:     case 0b011_101:  //(A5)+
 19478:       if (XEiJ.EFA_SEPARATE_AR) {
 19479:         M68kException.m6eIncremented += 2L << (5 << 3);
 19480:         return (XEiJ.regRn[13] += 2) - 2;
 19481:       }
 19482:       //fallthrough
 19483:     case 0b011_110:  //(A6)+
 19484:       if (XEiJ.EFA_SEPARATE_AR) {
 19485:         M68kException.m6eIncremented += 2L << (6 << 3);
 19486:         return (XEiJ.regRn[14] += 2) - 2;
 19487:       }
 19488:       //fallthrough
 19489:     case 0b011_111:  //(A7)+
 19490:       if (XEiJ.EFA_SEPARATE_AR) {
 19491:         M68kException.m6eIncremented += 2L << (7 << 3);
 19492:         return (XEiJ.regRn[15] += 2) - 2;
 19493:       } else {
 19494:         M68kException.m6eIncremented += 2L << ((ea & 7) << 3);
 19495:         return (XEiJ.regRn[ea - (0b011_000 - 8)] += 2) - 2;
 19496:       }
 19497:     case 0b100_000:  //-(A0)
 19498:       if (XEiJ.EFA_SEPARATE_AR) {
 19499:         M68kException.m6eIncremented -= 2L << (0 << 3);
 19500:         return XEiJ.regRn[ 8] -= 2;
 19501:       }
 19502:       //fallthrough
 19503:     case 0b100_001:  //-(A1)
 19504:       if (XEiJ.EFA_SEPARATE_AR) {
 19505:         M68kException.m6eIncremented -= 2L << (1 << 3);
 19506:         return XEiJ.regRn[ 9] -= 2;
 19507:       }
 19508:       //fallthrough
 19509:     case 0b100_010:  //-(A2)
 19510:       if (XEiJ.EFA_SEPARATE_AR) {
 19511:         M68kException.m6eIncremented -= 2L << (2 << 3);
 19512:         return XEiJ.regRn[10] -= 2;
 19513:       }
 19514:       //fallthrough
 19515:     case 0b100_011:  //-(A3)
 19516:       if (XEiJ.EFA_SEPARATE_AR) {
 19517:         M68kException.m6eIncremented -= 2L << (3 << 3);
 19518:         return XEiJ.regRn[11] -= 2;
 19519:       }
 19520:       //fallthrough
 19521:     case 0b100_100:  //-(A4)
 19522:       if (XEiJ.EFA_SEPARATE_AR) {
 19523:         M68kException.m6eIncremented -= 2L << (4 << 3);
 19524:         return XEiJ.regRn[12] -= 2;
 19525:       }
 19526:       //fallthrough
 19527:     case 0b100_101:  //-(A5)
 19528:       if (XEiJ.EFA_SEPARATE_AR) {
 19529:         M68kException.m6eIncremented -= 2L << (5 << 3);
 19530:         return XEiJ.regRn[13] -= 2;
 19531:       }
 19532:       //fallthrough
 19533:     case 0b100_110:  //-(A6)
 19534:       if (XEiJ.EFA_SEPARATE_AR) {
 19535:         M68kException.m6eIncremented -= 2L << (6 << 3);
 19536:         return XEiJ.regRn[14] -= 2;
 19537:       }
 19538:       //fallthrough
 19539:     case 0b100_111:  //-(A7)
 19540:       if (XEiJ.EFA_SEPARATE_AR) {
 19541:         M68kException.m6eIncremented -= 2L << (7 << 3);
 19542:         return XEiJ.regRn[15] -= 2;
 19543:       } else {
 19544:         M68kException.m6eIncremented -= 2L << ((ea & 7) << 3);
 19545:         return XEiJ.regRn[ea - (0b100_000 - 8)] -= 2;
 19546:       }
 19547:     case 0b101_000:  //(d16,A0)
 19548:     case 0b101_001:  //(d16,A1)
 19549:     case 0b101_010:  //(d16,A2)
 19550:     case 0b101_011:  //(d16,A3)
 19551:     case 0b101_100:  //(d16,A4)
 19552:     case 0b101_101:  //(d16,A5)
 19553:     case 0b101_110:  //(d16,A6)
 19554:     case 0b101_111:  //(d16,A7)
 19555:       if (XEiJ.MPU_COMPOUND_POSTINCREMENT) {
 19556:         return (XEiJ.regRn[ea - (0b101_000 - 8)]  //ベースレジスタ
 19557:                 + mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS));  //pcws。ワードディスプレースメント
 19558:       } else {
 19559:         t = XEiJ.regPC;
 19560:         XEiJ.regPC = t + 2;
 19561:         return (XEiJ.regRn[ea - (0b101_000 - 8)]  //ベースレジスタ
 19562:                 + mmuReadWordSignExword (t, XEiJ.regSRS));  //pcws。ワードディスプレースメント
 19563:       }
 19564:     case 0b110_000:  //(d8,A0,Rn.wl)
 19565:     case 0b110_001:  //(d8,A1,Rn.wl)
 19566:     case 0b110_010:  //(d8,A2,Rn.wl)
 19567:     case 0b110_011:  //(d8,A3,Rn.wl)
 19568:     case 0b110_100:  //(d8,A4,Rn.wl)
 19569:     case 0b110_101:  //(d8,A5,Rn.wl)
 19570:     case 0b110_110:  //(d8,A6,Rn.wl)
 19571:     case 0b110_111:  //(d8,A7,Rn.wl)
 19572:       if (XEiJ.MPU_COMPOUND_POSTINCREMENT) {
 19573:         w = mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);  //pcwz。拡張ワード
 19574:       } else {
 19575:         w = XEiJ.regPC;
 19576:         XEiJ.regPC = w + 2;
 19577:         w = mmuReadWordZeroExword (w, XEiJ.regSRS);  //pcwz。拡張ワード
 19578:       }
 19579:       if (w << 31 - 8 < 0) {  //フルフォーマット
 19580:         XEiJ.mpuCycleCount += w << -2 == 0 ? 1 : 3;  //メモリ間接なし:メモリ間接あり
 19581:       }
 19582:       t = (((~w & 0x0180) == 0 ? 0 :  //ベースレジスタサプレス
 19583:             XEiJ.regRn[ea - (0b110_000 - 8)])  //ベースレジスタ
 19584:            + (w << 31 - 8 >= 0 ? (byte) w :  //バイトディスプレースメント
 19585:               w << 31 - 5 >= 0 ? 0 :  //ヌルベースディスプレースメント
 19586:               w << 31 - 4 >= 0 ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) :  //pcws。ワードベースディスプレースメント
 19587:               mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS)));  //pcls。ロングベースディスプレースメント
 19588:       x = ((~w & 0x0140) == 0 ? 0 :  //インデックスサプレス
 19589:            (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] :  //ワードインデックス
 19590:             XEiJ.regRn[w >> 12])  //ロングインデックス
 19591:            << (w >> 9 & 3));  //スケールファクタ。ワードインデックスのときは符号拡張してから掛ける
 19592:       return ((w & 0x0103) <= 0x0100 ? t + x :  //メモリ間接なし
 19593:               ((XEiJ.TEST_BIT_2_SHIFT ? w << 31 - 2 >= 0 : (w & 4) == 0) ? mmuReadLongData (t + x, XEiJ.regSRS) :  //プリインデックス
 19594:                mmuReadLongData (t, XEiJ.regSRS) + x)  //ポストインデックス
 19595:               + ((XEiJ.TEST_BIT_1_SHIFT ? w << 31 - 1 >= 0 : (w & 2) == 0) ? 0 :  //ヌルアウタディスプレースメント
 19596:                  (XEiJ.TEST_BIT_0_SHIFT ? w << 31 - 0 >= 0 : (w & 1) == 0) ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) :  //pcws。ワードアウタディスプレースメント
 19597:                  mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS)));  //pcls。ロングアウタディスプレースメント
 19598:     case 0b111_000:  //(xxx).W
 19599:       return mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);  //pcws
 19600:     case 0b111_001:  //(xxx).L
 19601:       return mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS);  //pcls
 19602:     case 0b111_010:  //(d16,PC)
 19603:       t = XEiJ.regPC;
 19604:       XEiJ.regPC = t + 2;
 19605:       return (t  //ベースレジスタ
 19606:               + mmuReadWordSignExword (t, XEiJ.regSRS));  //pcws。ワードディスプレースメント
 19607:     case 0b111_011:  //(d8,PC,Rn.wl)
 19608:       t = XEiJ.regPC;
 19609:       XEiJ.regPC = t + 2;
 19610:       w = mmuReadWordZeroExword (t, XEiJ.regSRS);  //pcwz。拡張ワード
 19611:       if (w << 31 - 8 < 0) {  //フルフォーマット
 19612:         XEiJ.mpuCycleCount += w << -2 == 0 ? 1 : 3;  //メモリ間接なし:メモリ間接あり
 19613:       }
 19614:       t = (((~w & 0x0180) == 0 ? 0 :  //ベースレジスタサプレス
 19615:             t)  //ベースレジスタ
 19616:            + (w << 31 - 8 >= 0 ? (byte) w :  //バイトディスプレースメント
 19617:               w << 31 - 5 >= 0 ? 0 :  //ヌルベースディスプレースメント
 19618:               w << 31 - 4 >= 0 ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) :  //pcws。ワードベースディスプレースメント
 19619:               mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS)));  //pcls。ロングベースディスプレースメント
 19620:       x = ((~w & 0x0140) == 0 ? 0 :  //インデックスサプレス
 19621:            (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] :  //ワードインデックス
 19622:             XEiJ.regRn[w >> 12])  //ロングインデックス
 19623:            << (w >> 9 & 3));  //スケールファクタ。ワードインデックスのときは符号拡張してから掛ける
 19624:       return ((w & 0x0103) <= 0x0100 ? t + x :  //メモリ間接なし
 19625:               ((XEiJ.TEST_BIT_2_SHIFT ? w << 31 - 2 >= 0 : (w & 4) == 0) ? mmuReadLongData (t + x, XEiJ.regSRS) :  //プリインデックス
 19626:                mmuReadLongData (t, XEiJ.regSRS) + x)  //ポストインデックス
 19627:               + ((XEiJ.TEST_BIT_1_SHIFT ? w << 31 - 1 >= 0 : (w & 2) == 0) ? 0 :  //ヌルアウタディスプレースメント
 19628:                  (XEiJ.TEST_BIT_0_SHIFT ? w << 31 - 0 >= 0 : (w & 1) == 0) ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) :  //pcws。ワードアウタディスプレースメント
 19629:                  mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS)));  //pcls。ロングアウタディスプレースメント
 19630:     }  //switch
 19631:     M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION;
 19632:     throw M68kException.m6eSignal;
 19633:   }  //efaMemWord
 19634: 
 19635:   //a = efaMltWord (ea)  //|  M+-WXZ  |
 19636:   //  メモリ可変モードのワードオペランドの実効アドレスを求める
 19637:   //  efaMemWordとの違いは(d16,PC)と(d8,PC,Rn.wl)がないこと
 19638:   @SuppressWarnings ("fallthrough") public static int efaMltWord (int ea) throws M68kException {
 19639:     int t, w, x;
 19640:     switch (ea) {
 19641:     case 0b010_000:  //(A0)
 19642:       if (XEiJ.EFA_SEPARATE_AR) {
 19643:         return XEiJ.regRn[ 8];
 19644:       }
 19645:       //fallthrough
 19646:     case 0b010_001:  //(A1)
 19647:       if (XEiJ.EFA_SEPARATE_AR) {
 19648:         return XEiJ.regRn[ 9];
 19649:       }
 19650:       //fallthrough
 19651:     case 0b010_010:  //(A2)
 19652:       if (XEiJ.EFA_SEPARATE_AR) {
 19653:         return XEiJ.regRn[10];
 19654:       }
 19655:       //fallthrough
 19656:     case 0b010_011:  //(A3)
 19657:       if (XEiJ.EFA_SEPARATE_AR) {
 19658:         return XEiJ.regRn[11];
 19659:       }
 19660:       //fallthrough
 19661:     case 0b010_100:  //(A4)
 19662:       if (XEiJ.EFA_SEPARATE_AR) {
 19663:         return XEiJ.regRn[12];
 19664:       }
 19665:       //fallthrough
 19666:     case 0b010_101:  //(A5)
 19667:       if (XEiJ.EFA_SEPARATE_AR) {
 19668:         return XEiJ.regRn[13];
 19669:       }
 19670:       //fallthrough
 19671:     case 0b010_110:  //(A6)
 19672:       if (XEiJ.EFA_SEPARATE_AR) {
 19673:         return XEiJ.regRn[14];
 19674:       }
 19675:       //fallthrough
 19676:     case 0b010_111:  //(A7)
 19677:       if (XEiJ.EFA_SEPARATE_AR) {
 19678:         return XEiJ.regRn[15];
 19679:       } else {
 19680:         return XEiJ.regRn[ea - (0b010_000 - 8)];
 19681:       }
 19682:     case 0b011_000:  //(A0)+
 19683:       if (XEiJ.EFA_SEPARATE_AR) {
 19684:         M68kException.m6eIncremented += 2L << (0 << 3);
 19685:         return (XEiJ.regRn[ 8] += 2) - 2;
 19686:       }
 19687:       //fallthrough
 19688:     case 0b011_001:  //(A1)+
 19689:       if (XEiJ.EFA_SEPARATE_AR) {
 19690:         M68kException.m6eIncremented += 2L << (1 << 3);
 19691:         return (XEiJ.regRn[ 9] += 2) - 2;
 19692:       }
 19693:       //fallthrough
 19694:     case 0b011_010:  //(A2)+
 19695:       if (XEiJ.EFA_SEPARATE_AR) {
 19696:         M68kException.m6eIncremented += 2L << (2 << 3);
 19697:         return (XEiJ.regRn[10] += 2) - 2;
 19698:       }
 19699:       //fallthrough
 19700:     case 0b011_011:  //(A3)+
 19701:       if (XEiJ.EFA_SEPARATE_AR) {
 19702:         M68kException.m6eIncremented += 2L << (3 << 3);
 19703:         return (XEiJ.regRn[11] += 2) - 2;
 19704:       }
 19705:       //fallthrough
 19706:     case 0b011_100:  //(A4)+
 19707:       if (XEiJ.EFA_SEPARATE_AR) {
 19708:         M68kException.m6eIncremented += 2L << (4 << 3);
 19709:         return (XEiJ.regRn[12] += 2) - 2;
 19710:       }
 19711:       //fallthrough
 19712:     case 0b011_101:  //(A5)+
 19713:       if (XEiJ.EFA_SEPARATE_AR) {
 19714:         M68kException.m6eIncremented += 2L << (5 << 3);
 19715:         return (XEiJ.regRn[13] += 2) - 2;
 19716:       }
 19717:       //fallthrough
 19718:     case 0b011_110:  //(A6)+
 19719:       if (XEiJ.EFA_SEPARATE_AR) {
 19720:         M68kException.m6eIncremented += 2L << (6 << 3);
 19721:         return (XEiJ.regRn[14] += 2) - 2;
 19722:       }
 19723:       //fallthrough
 19724:     case 0b011_111:  //(A7)+
 19725:       if (XEiJ.EFA_SEPARATE_AR) {
 19726:         M68kException.m6eIncremented += 2L << (7 << 3);
 19727:         return (XEiJ.regRn[15] += 2) - 2;
 19728:       } else {
 19729:         M68kException.m6eIncremented += 2L << ((ea & 7) << 3);
 19730:         return (XEiJ.regRn[ea - (0b011_000 - 8)] += 2) - 2;
 19731:       }
 19732:     case 0b100_000:  //-(A0)
 19733:       if (XEiJ.EFA_SEPARATE_AR) {
 19734:         M68kException.m6eIncremented -= 2L << (0 << 3);
 19735:         return XEiJ.regRn[ 8] -= 2;
 19736:       }
 19737:       //fallthrough
 19738:     case 0b100_001:  //-(A1)
 19739:       if (XEiJ.EFA_SEPARATE_AR) {
 19740:         M68kException.m6eIncremented -= 2L << (1 << 3);
 19741:         return XEiJ.regRn[ 9] -= 2;
 19742:       }
 19743:       //fallthrough
 19744:     case 0b100_010:  //-(A2)
 19745:       if (XEiJ.EFA_SEPARATE_AR) {
 19746:         M68kException.m6eIncremented -= 2L << (2 << 3);
 19747:         return XEiJ.regRn[10] -= 2;
 19748:       }
 19749:       //fallthrough
 19750:     case 0b100_011:  //-(A3)
 19751:       if (XEiJ.EFA_SEPARATE_AR) {
 19752:         M68kException.m6eIncremented -= 2L << (3 << 3);
 19753:         return XEiJ.regRn[11] -= 2;
 19754:       }
 19755:       //fallthrough
 19756:     case 0b100_100:  //-(A4)
 19757:       if (XEiJ.EFA_SEPARATE_AR) {
 19758:         M68kException.m6eIncremented -= 2L << (4 << 3);
 19759:         return XEiJ.regRn[12] -= 2;
 19760:       }
 19761:       //fallthrough
 19762:     case 0b100_101:  //-(A5)
 19763:       if (XEiJ.EFA_SEPARATE_AR) {
 19764:         M68kException.m6eIncremented -= 2L << (5 << 3);
 19765:         return XEiJ.regRn[13] -= 2;
 19766:       }
 19767:       //fallthrough
 19768:     case 0b100_110:  //-(A6)
 19769:       if (XEiJ.EFA_SEPARATE_AR) {
 19770:         M68kException.m6eIncremented -= 2L << (6 << 3);
 19771:         return XEiJ.regRn[14] -= 2;
 19772:       }
 19773:       //fallthrough
 19774:     case 0b100_111:  //-(A7)
 19775:       if (XEiJ.EFA_SEPARATE_AR) {
 19776:         M68kException.m6eIncremented -= 2L << (7 << 3);
 19777:         return XEiJ.regRn[15] -= 2;
 19778:       } else {
 19779:         M68kException.m6eIncremented -= 2L << ((ea & 7) << 3);
 19780:         return XEiJ.regRn[ea - (0b100_000 - 8)] -= 2;
 19781:       }
 19782:     case 0b101_000:  //(d16,A0)
 19783:     case 0b101_001:  //(d16,A1)
 19784:     case 0b101_010:  //(d16,A2)
 19785:     case 0b101_011:  //(d16,A3)
 19786:     case 0b101_100:  //(d16,A4)
 19787:     case 0b101_101:  //(d16,A5)
 19788:     case 0b101_110:  //(d16,A6)
 19789:     case 0b101_111:  //(d16,A7)
 19790:       if (XEiJ.MPU_COMPOUND_POSTINCREMENT) {
 19791:         return (XEiJ.regRn[ea - (0b101_000 - 8)]  //ベースレジスタ
 19792:                 + mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS));  //pcws。ワードディスプレースメント
 19793:       } else {
 19794:         t = XEiJ.regPC;
 19795:         XEiJ.regPC = t + 2;
 19796:         return (XEiJ.regRn[ea - (0b101_000 - 8)]  //ベースレジスタ
 19797:                 + mmuReadWordSignExword (t, XEiJ.regSRS));  //pcws。ワードディスプレースメント
 19798:       }
 19799:     case 0b110_000:  //(d8,A0,Rn.wl)
 19800:     case 0b110_001:  //(d8,A1,Rn.wl)
 19801:     case 0b110_010:  //(d8,A2,Rn.wl)
 19802:     case 0b110_011:  //(d8,A3,Rn.wl)
 19803:     case 0b110_100:  //(d8,A4,Rn.wl)
 19804:     case 0b110_101:  //(d8,A5,Rn.wl)
 19805:     case 0b110_110:  //(d8,A6,Rn.wl)
 19806:     case 0b110_111:  //(d8,A7,Rn.wl)
 19807:       if (XEiJ.MPU_COMPOUND_POSTINCREMENT) {
 19808:         w = mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);  //pcwz。拡張ワード
 19809:       } else {
 19810:         w = XEiJ.regPC;
 19811:         XEiJ.regPC = w + 2;
 19812:         w = mmuReadWordZeroExword (w, XEiJ.regSRS);  //pcwz。拡張ワード
 19813:       }
 19814:       if (w << 31 - 8 < 0) {  //フルフォーマット
 19815:         XEiJ.mpuCycleCount += w << -2 == 0 ? 1 : 3;  //メモリ間接なし:メモリ間接あり
 19816:       }
 19817:       t = (((~w & 0x0180) == 0 ? 0 :  //ベースレジスタサプレス
 19818:             XEiJ.regRn[ea - (0b110_000 - 8)])  //ベースレジスタ
 19819:            + (w << 31 - 8 >= 0 ? (byte) w :  //バイトディスプレースメント
 19820:               w << 31 - 5 >= 0 ? 0 :  //ヌルベースディスプレースメント
 19821:               w << 31 - 4 >= 0 ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) :  //pcws。ワードベースディスプレースメント
 19822:               mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS)));  //pcls。ロングベースディスプレースメント
 19823:       x = ((~w & 0x0140) == 0 ? 0 :  //インデックスサプレス
 19824:            (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] :  //ワードインデックス
 19825:             XEiJ.regRn[w >> 12])  //ロングインデックス
 19826:            << (w >> 9 & 3));  //スケールファクタ。ワードインデックスのときは符号拡張してから掛ける
 19827:       return ((w & 0x0103) <= 0x0100 ? t + x :  //メモリ間接なし
 19828:               ((XEiJ.TEST_BIT_2_SHIFT ? w << 31 - 2 >= 0 : (w & 4) == 0) ? mmuReadLongData (t + x, XEiJ.regSRS) :  //プリインデックス
 19829:                mmuReadLongData (t, XEiJ.regSRS) + x)  //ポストインデックス
 19830:               + ((XEiJ.TEST_BIT_1_SHIFT ? w << 31 - 1 >= 0 : (w & 2) == 0) ? 0 :  //ヌルアウタディスプレースメント
 19831:                  (XEiJ.TEST_BIT_0_SHIFT ? w << 31 - 0 >= 0 : (w & 1) == 0) ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) :  //pcws。ワードアウタディスプレースメント
 19832:                  mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS)));  //pcls。ロングアウタディスプレースメント
 19833:     case 0b111_000:  //(xxx).W
 19834:       return mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);  //pcws
 19835:     case 0b111_001:  //(xxx).L
 19836:       return mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS);  //pcls
 19837:     }  //switch
 19838:     M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION;
 19839:     throw M68kException.m6eSignal;
 19840:   }  //efaMltWord
 19841: 
 19842:   //a = efaCntWord (ea)  //|  M  WXZP |
 19843:   //  制御モードのワードオペランドの実効アドレスを求める
 19844:   //  efaMemWordとの違いは(Ar)+と-(Ar)がないこと
 19845:   @SuppressWarnings ("fallthrough") public static int efaCntWord (int ea) throws M68kException {
 19846:     int t, w, x;
 19847:     switch (ea) {
 19848:     case 0b010_000:  //(A0)
 19849:       if (XEiJ.EFA_SEPARATE_AR) {
 19850:         return XEiJ.regRn[ 8];
 19851:       }
 19852:       //fallthrough
 19853:     case 0b010_001:  //(A1)
 19854:       if (XEiJ.EFA_SEPARATE_AR) {
 19855:         return XEiJ.regRn[ 9];
 19856:       }
 19857:       //fallthrough
 19858:     case 0b010_010:  //(A2)
 19859:       if (XEiJ.EFA_SEPARATE_AR) {
 19860:         return XEiJ.regRn[10];
 19861:       }
 19862:       //fallthrough
 19863:     case 0b010_011:  //(A3)
 19864:       if (XEiJ.EFA_SEPARATE_AR) {
 19865:         return XEiJ.regRn[11];
 19866:       }
 19867:       //fallthrough
 19868:     case 0b010_100:  //(A4)
 19869:       if (XEiJ.EFA_SEPARATE_AR) {
 19870:         return XEiJ.regRn[12];
 19871:       }
 19872:       //fallthrough
 19873:     case 0b010_101:  //(A5)
 19874:       if (XEiJ.EFA_SEPARATE_AR) {
 19875:         return XEiJ.regRn[13];
 19876:       }
 19877:       //fallthrough
 19878:     case 0b010_110:  //(A6)
 19879:       if (XEiJ.EFA_SEPARATE_AR) {
 19880:         return XEiJ.regRn[14];
 19881:       }
 19882:       //fallthrough
 19883:     case 0b010_111:  //(A7)
 19884:       if (XEiJ.EFA_SEPARATE_AR) {
 19885:         return XEiJ.regRn[15];
 19886:       } else {
 19887:         return XEiJ.regRn[ea - (0b010_000 - 8)];
 19888:       }
 19889:     case 0b101_000:  //(d16,A0)
 19890:     case 0b101_001:  //(d16,A1)
 19891:     case 0b101_010:  //(d16,A2)
 19892:     case 0b101_011:  //(d16,A3)
 19893:     case 0b101_100:  //(d16,A4)
 19894:     case 0b101_101:  //(d16,A5)
 19895:     case 0b101_110:  //(d16,A6)
 19896:     case 0b101_111:  //(d16,A7)
 19897:       if (XEiJ.MPU_COMPOUND_POSTINCREMENT) {
 19898:         return (XEiJ.regRn[ea - (0b101_000 - 8)]  //ベースレジスタ
 19899:                 + mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS));  //pcws。ワードディスプレースメント
 19900:       } else {
 19901:         t = XEiJ.regPC;
 19902:         XEiJ.regPC = t + 2;
 19903:         return (XEiJ.regRn[ea - (0b101_000 - 8)]  //ベースレジスタ
 19904:                 + mmuReadWordSignExword (t, XEiJ.regSRS));  //pcws。ワードディスプレースメント
 19905:       }
 19906:     case 0b110_000:  //(d8,A0,Rn.wl)
 19907:     case 0b110_001:  //(d8,A1,Rn.wl)
 19908:     case 0b110_010:  //(d8,A2,Rn.wl)
 19909:     case 0b110_011:  //(d8,A3,Rn.wl)
 19910:     case 0b110_100:  //(d8,A4,Rn.wl)
 19911:     case 0b110_101:  //(d8,A5,Rn.wl)
 19912:     case 0b110_110:  //(d8,A6,Rn.wl)
 19913:     case 0b110_111:  //(d8,A7,Rn.wl)
 19914:       if (XEiJ.MPU_COMPOUND_POSTINCREMENT) {
 19915:         w = mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);  //pcwz。拡張ワード
 19916:       } else {
 19917:         w = XEiJ.regPC;
 19918:         XEiJ.regPC = w + 2;
 19919:         w = mmuReadWordZeroExword (w, XEiJ.regSRS);  //pcwz。拡張ワード
 19920:       }
 19921:       if (w << 31 - 8 < 0) {  //フルフォーマット
 19922:         XEiJ.mpuCycleCount += w << -2 == 0 ? 1 : 3;  //メモリ間接なし:メモリ間接あり
 19923:       }
 19924:       t = (((~w & 0x0180) == 0 ? 0 :  //ベースレジスタサプレス
 19925:             XEiJ.regRn[ea - (0b110_000 - 8)])  //ベースレジスタ
 19926:            + (w << 31 - 8 >= 0 ? (byte) w :  //バイトディスプレースメント
 19927:               w << 31 - 5 >= 0 ? 0 :  //ヌルベースディスプレースメント
 19928:               w << 31 - 4 >= 0 ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) :  //pcws。ワードベースディスプレースメント
 19929:               mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS)));  //pcls。ロングベースディスプレースメント
 19930:       x = ((~w & 0x0140) == 0 ? 0 :  //インデックスサプレス
 19931:            (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] :  //ワードインデックス
 19932:             XEiJ.regRn[w >> 12])  //ロングインデックス
 19933:            << (w >> 9 & 3));  //スケールファクタ。ワードインデックスのときは符号拡張してから掛ける
 19934:       return ((w & 0x0103) <= 0x0100 ? t + x :  //メモリ間接なし
 19935:               ((XEiJ.TEST_BIT_2_SHIFT ? w << 31 - 2 >= 0 : (w & 4) == 0) ? mmuReadLongData (t + x, XEiJ.regSRS) :  //プリインデックス
 19936:                mmuReadLongData (t, XEiJ.regSRS) + x)  //ポストインデックス
 19937:               + ((XEiJ.TEST_BIT_1_SHIFT ? w << 31 - 1 >= 0 : (w & 2) == 0) ? 0 :  //ヌルアウタディスプレースメント
 19938:                  (XEiJ.TEST_BIT_0_SHIFT ? w << 31 - 0 >= 0 : (w & 1) == 0) ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) :  //pcws。ワードアウタディスプレースメント
 19939:                  mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS)));  //pcls。ロングアウタディスプレースメント
 19940:     case 0b111_000:  //(xxx).W
 19941:       return mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);  //pcws
 19942:     case 0b111_001:  //(xxx).L
 19943:       return mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS);  //pcls
 19944:     case 0b111_010:  //(d16,PC)
 19945:       t = XEiJ.regPC;
 19946:       XEiJ.regPC = t + 2;
 19947:       return (t  //ベースレジスタ
 19948:               + mmuReadWordSignExword (t, XEiJ.regSRS));  //pcws。ワードディスプレースメント
 19949:     case 0b111_011:  //(d8,PC,Rn.wl)
 19950:       t = XEiJ.regPC;
 19951:       XEiJ.regPC = t + 2;
 19952:       w = mmuReadWordZeroExword (t, XEiJ.regSRS);  //pcwz。拡張ワード
 19953:       if (w << 31 - 8 < 0) {  //フルフォーマット
 19954:         XEiJ.mpuCycleCount += w << -2 == 0 ? 1 : 3;  //メモリ間接なし:メモリ間接あり
 19955:       }
 19956:       t = (((~w & 0x0180) == 0 ? 0 :  //ベースレジスタサプレス
 19957:             t)  //ベースレジスタ
 19958:            + (w << 31 - 8 >= 0 ? (byte) w :  //バイトディスプレースメント
 19959:               w << 31 - 5 >= 0 ? 0 :  //ヌルベースディスプレースメント
 19960:               w << 31 - 4 >= 0 ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) :  //pcws。ワードベースディスプレースメント
 19961:               mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS)));  //pcls。ロングベースディスプレースメント
 19962:       x = ((~w & 0x0140) == 0 ? 0 :  //インデックスサプレス
 19963:            (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] :  //ワードインデックス
 19964:             XEiJ.regRn[w >> 12])  //ロングインデックス
 19965:            << (w >> 9 & 3));  //スケールファクタ。ワードインデックスのときは符号拡張してから掛ける
 19966:       return ((w & 0x0103) <= 0x0100 ? t + x :  //メモリ間接なし
 19967:               ((XEiJ.TEST_BIT_2_SHIFT ? w << 31 - 2 >= 0 : (w & 4) == 0) ? mmuReadLongData (t + x, XEiJ.regSRS) :  //プリインデックス
 19968:                mmuReadLongData (t, XEiJ.regSRS) + x)  //ポストインデックス
 19969:               + ((XEiJ.TEST_BIT_1_SHIFT ? w << 31 - 1 >= 0 : (w & 2) == 0) ? 0 :  //ヌルアウタディスプレースメント
 19970:                  (XEiJ.TEST_BIT_0_SHIFT ? w << 31 - 0 >= 0 : (w & 1) == 0) ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) :  //pcws。ワードアウタディスプレースメント
 19971:                  mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS)));  //pcls。ロングアウタディスプレースメント
 19972:     }  //switch
 19973:     M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION;
 19974:     throw M68kException.m6eSignal;
 19975:   }  //efaCntWord
 19976: 
 19977:   //a = efaCltWord (ea)  //|  M  WXZ  |
 19978:   //  制御可変モードのワードオペランドの実効アドレスを求める
 19979:   //  efaCntWordとの違いは(d16,PC)と(d8,PC,Rn.wl)がないこと
 19980:   @SuppressWarnings ("fallthrough") public static int efaCltWord (int ea) throws M68kException {
 19981:     int t, w, x;
 19982:     switch (ea) {
 19983:     case 0b010_000:  //(A0)
 19984:       if (XEiJ.EFA_SEPARATE_AR) {
 19985:         return XEiJ.regRn[ 8];
 19986:       }
 19987:       //fallthrough
 19988:     case 0b010_001:  //(A1)
 19989:       if (XEiJ.EFA_SEPARATE_AR) {
 19990:         return XEiJ.regRn[ 9];
 19991:       }
 19992:       //fallthrough
 19993:     case 0b010_010:  //(A2)
 19994:       if (XEiJ.EFA_SEPARATE_AR) {
 19995:         return XEiJ.regRn[10];
 19996:       }
 19997:       //fallthrough
 19998:     case 0b010_011:  //(A3)
 19999:       if (XEiJ.EFA_SEPARATE_AR) {
 20000:         return XEiJ.regRn[11];
 20001:       }
 20002:       //fallthrough
 20003:     case 0b010_100:  //(A4)
 20004:       if (XEiJ.EFA_SEPARATE_AR) {
 20005:         return XEiJ.regRn[12];
 20006:       }
 20007:       //fallthrough
 20008:     case 0b010_101:  //(A5)
 20009:       if (XEiJ.EFA_SEPARATE_AR) {
 20010:         return XEiJ.regRn[13];
 20011:       }
 20012:       //fallthrough
 20013:     case 0b010_110:  //(A6)
 20014:       if (XEiJ.EFA_SEPARATE_AR) {
 20015:         return XEiJ.regRn[14];
 20016:       }
 20017:       //fallthrough
 20018:     case 0b010_111:  //(A7)
 20019:       if (XEiJ.EFA_SEPARATE_AR) {
 20020:         return XEiJ.regRn[15];
 20021:       } else {
 20022:         return XEiJ.regRn[ea - (0b010_000 - 8)];
 20023:       }
 20024:     case 0b101_000:  //(d16,A0)
 20025:     case 0b101_001:  //(d16,A1)
 20026:     case 0b101_010:  //(d16,A2)
 20027:     case 0b101_011:  //(d16,A3)
 20028:     case 0b101_100:  //(d16,A4)
 20029:     case 0b101_101:  //(d16,A5)
 20030:     case 0b101_110:  //(d16,A6)
 20031:     case 0b101_111:  //(d16,A7)
 20032:       if (XEiJ.MPU_COMPOUND_POSTINCREMENT) {
 20033:         return (XEiJ.regRn[ea - (0b101_000 - 8)]  //ベースレジスタ
 20034:                 + mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS));  //pcws。ワードディスプレースメント
 20035:       } else {
 20036:         t = XEiJ.regPC;
 20037:         XEiJ.regPC = t + 2;
 20038:         return (XEiJ.regRn[ea - (0b101_000 - 8)]  //ベースレジスタ
 20039:                 + mmuReadWordSignExword (t, XEiJ.regSRS));  //pcws。ワードディスプレースメント
 20040:       }
 20041:     case 0b110_000:  //(d8,A0,Rn.wl)
 20042:     case 0b110_001:  //(d8,A1,Rn.wl)
 20043:     case 0b110_010:  //(d8,A2,Rn.wl)
 20044:     case 0b110_011:  //(d8,A3,Rn.wl)
 20045:     case 0b110_100:  //(d8,A4,Rn.wl)
 20046:     case 0b110_101:  //(d8,A5,Rn.wl)
 20047:     case 0b110_110:  //(d8,A6,Rn.wl)
 20048:     case 0b110_111:  //(d8,A7,Rn.wl)
 20049:       if (XEiJ.MPU_COMPOUND_POSTINCREMENT) {
 20050:         w = mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);  //pcwz。拡張ワード
 20051:       } else {
 20052:         w = XEiJ.regPC;
 20053:         XEiJ.regPC = w + 2;
 20054:         w = mmuReadWordZeroExword (w, XEiJ.regSRS);  //pcwz。拡張ワード
 20055:       }
 20056:       if (w << 31 - 8 < 0) {  //フルフォーマット
 20057:         XEiJ.mpuCycleCount += w << -2 == 0 ? 1 : 3;  //メモリ間接なし:メモリ間接あり
 20058:       }
 20059:       t = (((~w & 0x0180) == 0 ? 0 :  //ベースレジスタサプレス
 20060:             XEiJ.regRn[ea - (0b110_000 - 8)])  //ベースレジスタ
 20061:            + (w << 31 - 8 >= 0 ? (byte) w :  //バイトディスプレースメント
 20062:               w << 31 - 5 >= 0 ? 0 :  //ヌルベースディスプレースメント
 20063:               w << 31 - 4 >= 0 ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) :  //pcws。ワードベースディスプレースメント
 20064:               mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS)));  //pcls。ロングベースディスプレースメント
 20065:       x = ((~w & 0x0140) == 0 ? 0 :  //インデックスサプレス
 20066:            (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] :  //ワードインデックス
 20067:             XEiJ.regRn[w >> 12])  //ロングインデックス
 20068:            << (w >> 9 & 3));  //スケールファクタ。ワードインデックスのときは符号拡張してから掛ける
 20069:       return ((w & 0x0103) <= 0x0100 ? t + x :  //メモリ間接なし
 20070:               ((XEiJ.TEST_BIT_2_SHIFT ? w << 31 - 2 >= 0 : (w & 4) == 0) ? mmuReadLongData (t + x, XEiJ.regSRS) :  //プリインデックス
 20071:                mmuReadLongData (t, XEiJ.regSRS) + x)  //ポストインデックス
 20072:               + ((XEiJ.TEST_BIT_1_SHIFT ? w << 31 - 1 >= 0 : (w & 2) == 0) ? 0 :  //ヌルアウタディスプレースメント
 20073:                  (XEiJ.TEST_BIT_0_SHIFT ? w << 31 - 0 >= 0 : (w & 1) == 0) ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) :  //pcws。ワードアウタディスプレースメント
 20074:                  mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS)));  //pcls。ロングアウタディスプレースメント
 20075:     case 0b111_000:  //(xxx).W
 20076:       return mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);  //pcws
 20077:     case 0b111_001:  //(xxx).L
 20078:       return mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS);  //pcls
 20079:     }  //switch
 20080:     M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION;
 20081:     throw M68kException.m6eSignal;
 20082:   }  //efaCltWord
 20083: 
 20084:   //a = efaAnyLong (ea)  //|  M+-WXZPI|
 20085:   //  任意のモードのロングオペランドの実効アドレスを求める
 20086:   //  efaAnyWordとの違いは(Ar)+と-(Ar)がArを4変化させることと、#<data>がPCを4変化させることと、
 20087:   //  オペランドのアクセスが1ワード増える分の4サイクルが追加されていること
 20088:   @SuppressWarnings ("fallthrough") public static int efaAnyLong (int ea) throws M68kException {
 20089:     int t, w, x;
 20090:     switch (ea) {
 20091:     case 0b010_000:  //(A0)
 20092:       if (XEiJ.EFA_SEPARATE_AR) {
 20093:         return XEiJ.regRn[ 8];
 20094:       }
 20095:       //fallthrough
 20096:     case 0b010_001:  //(A1)
 20097:       if (XEiJ.EFA_SEPARATE_AR) {
 20098:         return XEiJ.regRn[ 9];
 20099:       }
 20100:       //fallthrough
 20101:     case 0b010_010:  //(A2)
 20102:       if (XEiJ.EFA_SEPARATE_AR) {
 20103:         return XEiJ.regRn[10];
 20104:       }
 20105:       //fallthrough
 20106:     case 0b010_011:  //(A3)
 20107:       if (XEiJ.EFA_SEPARATE_AR) {
 20108:         return XEiJ.regRn[11];
 20109:       }
 20110:       //fallthrough
 20111:     case 0b010_100:  //(A4)
 20112:       if (XEiJ.EFA_SEPARATE_AR) {
 20113:         return XEiJ.regRn[12];
 20114:       }
 20115:       //fallthrough
 20116:     case 0b010_101:  //(A5)
 20117:       if (XEiJ.EFA_SEPARATE_AR) {
 20118:         return XEiJ.regRn[13];
 20119:       }
 20120:       //fallthrough
 20121:     case 0b010_110:  //(A6)
 20122:       if (XEiJ.EFA_SEPARATE_AR) {
 20123:         return XEiJ.regRn[14];
 20124:       }
 20125:       //fallthrough
 20126:     case 0b010_111:  //(A7)
 20127:       if (XEiJ.EFA_SEPARATE_AR) {
 20128:         return XEiJ.regRn[15];
 20129:       } else {
 20130:         return XEiJ.regRn[ea - (0b010_000 - 8)];
 20131:       }
 20132:     case 0b011_000:  //(A0)+
 20133:       if (XEiJ.EFA_SEPARATE_AR) {
 20134:         M68kException.m6eIncremented += 4L << (0 << 3);
 20135:         return (XEiJ.regRn[ 8] += 4) - 4;
 20136:       }
 20137:       //fallthrough
 20138:     case 0b011_001:  //(A1)+
 20139:       if (XEiJ.EFA_SEPARATE_AR) {
 20140:         M68kException.m6eIncremented += 4L << (1 << 3);
 20141:         return (XEiJ.regRn[ 9] += 4) - 4;
 20142:       }
 20143:       //fallthrough
 20144:     case 0b011_010:  //(A2)+
 20145:       if (XEiJ.EFA_SEPARATE_AR) {
 20146:         M68kException.m6eIncremented += 4L << (2 << 3);
 20147:         return (XEiJ.regRn[10] += 4) - 4;
 20148:       }
 20149:       //fallthrough
 20150:     case 0b011_011:  //(A3)+
 20151:       if (XEiJ.EFA_SEPARATE_AR) {
 20152:         M68kException.m6eIncremented += 4L << (3 << 3);
 20153:         return (XEiJ.regRn[11] += 4) - 4;
 20154:       }
 20155:       //fallthrough
 20156:     case 0b011_100:  //(A4)+
 20157:       if (XEiJ.EFA_SEPARATE_AR) {
 20158:         M68kException.m6eIncremented += 4L << (4 << 3);
 20159:         return (XEiJ.regRn[12] += 4) - 4;
 20160:       }
 20161:       //fallthrough
 20162:     case 0b011_101:  //(A5)+
 20163:       if (XEiJ.EFA_SEPARATE_AR) {
 20164:         M68kException.m6eIncremented += 4L << (5 << 3);
 20165:         return (XEiJ.regRn[13] += 4) - 4;
 20166:       }
 20167:       //fallthrough
 20168:     case 0b011_110:  //(A6)+
 20169:       if (XEiJ.EFA_SEPARATE_AR) {
 20170:         M68kException.m6eIncremented += 4L << (6 << 3);
 20171:         return (XEiJ.regRn[14] += 4) - 4;
 20172:       }
 20173:       //fallthrough
 20174:     case 0b011_111:  //(A7)+
 20175:       if (XEiJ.EFA_SEPARATE_AR) {
 20176:         M68kException.m6eIncremented += 4L << (7 << 3);
 20177:         return (XEiJ.regRn[15] += 4) - 4;
 20178:       } else {
 20179:         M68kException.m6eIncremented += 4L << ((ea & 7) << 3);
 20180:         return (XEiJ.regRn[ea - (0b011_000 - 8)] += 4) - 4;
 20181:       }
 20182:     case 0b100_000:  //-(A0)
 20183:       if (XEiJ.EFA_SEPARATE_AR) {
 20184:         M68kException.m6eIncremented -= 4L << (0 << 3);
 20185:         return XEiJ.regRn[ 8] -= 4;
 20186:       }
 20187:       //fallthrough
 20188:     case 0b100_001:  //-(A1)
 20189:       if (XEiJ.EFA_SEPARATE_AR) {
 20190:         M68kException.m6eIncremented -= 4L << (1 << 3);
 20191:         return XEiJ.regRn[ 9] -= 4;
 20192:       }
 20193:       //fallthrough
 20194:     case 0b100_010:  //-(A2)
 20195:       if (XEiJ.EFA_SEPARATE_AR) {
 20196:         M68kException.m6eIncremented -= 4L << (2 << 3);
 20197:         return XEiJ.regRn[10] -= 4;
 20198:       }
 20199:       //fallthrough
 20200:     case 0b100_011:  //-(A3)
 20201:       if (XEiJ.EFA_SEPARATE_AR) {
 20202:         M68kException.m6eIncremented -= 4L << (3 << 3);
 20203:         return XEiJ.regRn[11] -= 4;
 20204:       }
 20205:       //fallthrough
 20206:     case 0b100_100:  //-(A4)
 20207:       if (XEiJ.EFA_SEPARATE_AR) {
 20208:         M68kException.m6eIncremented -= 4L << (4 << 3);
 20209:         return XEiJ.regRn[12] -= 4;
 20210:       }
 20211:       //fallthrough
 20212:     case 0b100_101:  //-(A5)
 20213:       if (XEiJ.EFA_SEPARATE_AR) {
 20214:         M68kException.m6eIncremented -= 4L << (5 << 3);
 20215:         return XEiJ.regRn[13] -= 4;
 20216:       }
 20217:       //fallthrough
 20218:     case 0b100_110:  //-(A6)
 20219:       if (XEiJ.EFA_SEPARATE_AR) {
 20220:         M68kException.m6eIncremented -= 4L << (6 << 3);
 20221:         return XEiJ.regRn[14] -= 4;
 20222:       }
 20223:       //fallthrough
 20224:     case 0b100_111:  //-(A7)
 20225:       if (XEiJ.EFA_SEPARATE_AR) {
 20226:         M68kException.m6eIncremented -= 4L << (7 << 3);
 20227:         return XEiJ.regRn[15] -= 4;
 20228:       } else {
 20229:         M68kException.m6eIncremented -= 4L << ((ea & 7) << 3);
 20230:         return XEiJ.regRn[ea - (0b100_000 - 8)] -= 4;
 20231:       }
 20232:     case 0b101_000:  //(d16,A0)
 20233:     case 0b101_001:  //(d16,A1)
 20234:     case 0b101_010:  //(d16,A2)
 20235:     case 0b101_011:  //(d16,A3)
 20236:     case 0b101_100:  //(d16,A4)
 20237:     case 0b101_101:  //(d16,A5)
 20238:     case 0b101_110:  //(d16,A6)
 20239:     case 0b101_111:  //(d16,A7)
 20240:       if (XEiJ.MPU_COMPOUND_POSTINCREMENT) {
 20241:         return (XEiJ.regRn[ea - (0b101_000 - 8)]  //ベースレジスタ
 20242:                 + mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS));  //pcws。ワードディスプレースメント
 20243:       } else {
 20244:         t = XEiJ.regPC;
 20245:         XEiJ.regPC = t + 2;
 20246:         return (XEiJ.regRn[ea - (0b101_000 - 8)]  //ベースレジスタ
 20247:                 + mmuReadWordSignExword (t, XEiJ.regSRS));  //pcws。ワードディスプレースメント
 20248:       }
 20249:     case 0b110_000:  //(d8,A0,Rn.wl)
 20250:     case 0b110_001:  //(d8,A1,Rn.wl)
 20251:     case 0b110_010:  //(d8,A2,Rn.wl)
 20252:     case 0b110_011:  //(d8,A3,Rn.wl)
 20253:     case 0b110_100:  //(d8,A4,Rn.wl)
 20254:     case 0b110_101:  //(d8,A5,Rn.wl)
 20255:     case 0b110_110:  //(d8,A6,Rn.wl)
 20256:     case 0b110_111:  //(d8,A7,Rn.wl)
 20257:       if (XEiJ.MPU_COMPOUND_POSTINCREMENT) {
 20258:         w = mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);  //pcwz。拡張ワード
 20259:       } else {
 20260:         w = XEiJ.regPC;
 20261:         XEiJ.regPC = w + 2;
 20262:         w = mmuReadWordZeroExword (w, XEiJ.regSRS);  //pcwz。拡張ワード
 20263:       }
 20264:       if (w << 31 - 8 < 0) {  //フルフォーマット
 20265:         XEiJ.mpuCycleCount += w << -2 == 0 ? 1 : 3;  //メモリ間接なし:メモリ間接あり
 20266:       }
 20267:       t = (((~w & 0x0180) == 0 ? 0 :  //ベースレジスタサプレス
 20268:             XEiJ.regRn[ea - (0b110_000 - 8)])  //ベースレジスタ
 20269:            + (w << 31 - 8 >= 0 ? (byte) w :  //バイトディスプレースメント
 20270:               w << 31 - 5 >= 0 ? 0 :  //ヌルベースディスプレースメント
 20271:               w << 31 - 4 >= 0 ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) :  //pcws。ワードベースディスプレースメント
 20272:               mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS)));  //pcls。ロングベースディスプレースメント
 20273:       x = ((~w & 0x0140) == 0 ? 0 :  //インデックスサプレス
 20274:            (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] :  //ワードインデックス
 20275:             XEiJ.regRn[w >> 12])  //ロングインデックス
 20276:            << (w >> 9 & 3));  //スケールファクタ。ワードインデックスのときは符号拡張してから掛ける
 20277:       return ((w & 0x0103) <= 0x0100 ? t + x :  //メモリ間接なし
 20278:               ((XEiJ.TEST_BIT_2_SHIFT ? w << 31 - 2 >= 0 : (w & 4) == 0) ? mmuReadLongData (t + x, XEiJ.regSRS) :  //プリインデックス
 20279:                mmuReadLongData (t, XEiJ.regSRS) + x)  //ポストインデックス
 20280:               + ((XEiJ.TEST_BIT_1_SHIFT ? w << 31 - 1 >= 0 : (w & 2) == 0) ? 0 :  //ヌルアウタディスプレースメント
 20281:                  (XEiJ.TEST_BIT_0_SHIFT ? w << 31 - 0 >= 0 : (w & 1) == 0) ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) :  //pcws。ワードアウタディスプレースメント
 20282:                  mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS)));  //pcls。ロングアウタディスプレースメント
 20283:     case 0b111_000:  //(xxx).W
 20284:       return mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);  //pcws
 20285:     case 0b111_001:  //(xxx).L
 20286:       return mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS);  //pcls
 20287:     case 0b111_010:  //(d16,PC)
 20288:       t = XEiJ.regPC;
 20289:       XEiJ.regPC = t + 2;
 20290:       return (t  //ベースレジスタ
 20291:               + mmuReadWordSignExword (t, XEiJ.regSRS));  //pcws。ワードディスプレースメント
 20292:     case 0b111_011:  //(d8,PC,Rn.wl)
 20293:       t = XEiJ.regPC;
 20294:       XEiJ.regPC = t + 2;
 20295:       w = mmuReadWordZeroExword (t, XEiJ.regSRS);  //pcwz。拡張ワード
 20296:       if (w << 31 - 8 < 0) {  //フルフォーマット
 20297:         XEiJ.mpuCycleCount += w << -2 == 0 ? 1 : 3;  //メモリ間接なし:メモリ間接あり
 20298:       }
 20299:       t = (((~w & 0x0180) == 0 ? 0 :  //ベースレジスタサプレス
 20300:             t)  //ベースレジスタ
 20301:            + (w << 31 - 8 >= 0 ? (byte) w :  //バイトディスプレースメント
 20302:               w << 31 - 5 >= 0 ? 0 :  //ヌルベースディスプレースメント
 20303:               w << 31 - 4 >= 0 ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) :  //pcws。ワードベースディスプレースメント
 20304:               mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS)));  //pcls。ロングベースディスプレースメント
 20305:       x = ((~w & 0x0140) == 0 ? 0 :  //インデックスサプレス
 20306:            (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] :  //ワードインデックス
 20307:             XEiJ.regRn[w >> 12])  //ロングインデックス
 20308:            << (w >> 9 & 3));  //スケールファクタ。ワードインデックスのときは符号拡張してから掛ける
 20309:       return ((w & 0x0103) <= 0x0100 ? t + x :  //メモリ間接なし
 20310:               ((XEiJ.TEST_BIT_2_SHIFT ? w << 31 - 2 >= 0 : (w & 4) == 0) ? mmuReadLongData (t + x, XEiJ.regSRS) :  //プリインデックス
 20311:                mmuReadLongData (t, XEiJ.regSRS) + x)  //ポストインデックス
 20312:               + ((XEiJ.TEST_BIT_1_SHIFT ? w << 31 - 1 >= 0 : (w & 2) == 0) ? 0 :  //ヌルアウタディスプレースメント
 20313:                  (XEiJ.TEST_BIT_0_SHIFT ? w << 31 - 0 >= 0 : (w & 1) == 0) ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) :  //pcws。ワードアウタディスプレースメント
 20314:                  mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS)));  //pcls。ロングアウタディスプレースメント
 20315:     case 0b111_100:  //#<data>
 20316:       if (XEiJ.MPU_COMPOUND_POSTINCREMENT) {
 20317:         return (XEiJ.regPC += 4) - 4;
 20318:       } else {
 20319:         t = XEiJ.regPC;
 20320:         XEiJ.regPC = t + 4;
 20321:         return t;
 20322:       }
 20323:     }  //switch
 20324:     M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION;
 20325:     throw M68kException.m6eSignal;
 20326:   }  //efaAnyLong
 20327: 
 20328:   //a = efaMemLong (ea)  //|  M+-WXZP |
 20329:   //  メモリモードのロングオペランドの実効アドレスを求める
 20330:   //  efaAnyLongとの違いは#<data>がないこと
 20331:   @SuppressWarnings ("fallthrough") public static int efaMemLong (int ea) throws M68kException {
 20332:     int t, w, x;
 20333:     switch (ea) {
 20334:     case 0b010_000:  //(A0)
 20335:       if (XEiJ.EFA_SEPARATE_AR) {
 20336:         return XEiJ.regRn[ 8];
 20337:       }
 20338:       //fallthrough
 20339:     case 0b010_001:  //(A1)
 20340:       if (XEiJ.EFA_SEPARATE_AR) {
 20341:         return XEiJ.regRn[ 9];
 20342:       }
 20343:       //fallthrough
 20344:     case 0b010_010:  //(A2)
 20345:       if (XEiJ.EFA_SEPARATE_AR) {
 20346:         return XEiJ.regRn[10];
 20347:       }
 20348:       //fallthrough
 20349:     case 0b010_011:  //(A3)
 20350:       if (XEiJ.EFA_SEPARATE_AR) {
 20351:         return XEiJ.regRn[11];
 20352:       }
 20353:       //fallthrough
 20354:     case 0b010_100:  //(A4)
 20355:       if (XEiJ.EFA_SEPARATE_AR) {
 20356:         return XEiJ.regRn[12];
 20357:       }
 20358:       //fallthrough
 20359:     case 0b010_101:  //(A5)
 20360:       if (XEiJ.EFA_SEPARATE_AR) {
 20361:         return XEiJ.regRn[13];
 20362:       }
 20363:       //fallthrough
 20364:     case 0b010_110:  //(A6)
 20365:       if (XEiJ.EFA_SEPARATE_AR) {
 20366:         return XEiJ.regRn[14];
 20367:       }
 20368:       //fallthrough
 20369:     case 0b010_111:  //(A7)
 20370:       if (XEiJ.EFA_SEPARATE_AR) {
 20371:         return XEiJ.regRn[15];
 20372:       } else {
 20373:         return XEiJ.regRn[ea - (0b010_000 - 8)];
 20374:       }
 20375:     case 0b011_000:  //(A0)+
 20376:       if (XEiJ.EFA_SEPARATE_AR) {
 20377:         M68kException.m6eIncremented += 4L << (0 << 3);
 20378:         return (XEiJ.regRn[ 8] += 4) - 4;
 20379:       }
 20380:       //fallthrough
 20381:     case 0b011_001:  //(A1)+
 20382:       if (XEiJ.EFA_SEPARATE_AR) {
 20383:         M68kException.m6eIncremented += 4L << (1 << 3);
 20384:         return (XEiJ.regRn[ 9] += 4) - 4;
 20385:       }
 20386:       //fallthrough
 20387:     case 0b011_010:  //(A2)+
 20388:       if (XEiJ.EFA_SEPARATE_AR) {
 20389:         M68kException.m6eIncremented += 4L << (2 << 3);
 20390:         return (XEiJ.regRn[10] += 4) - 4;
 20391:       }
 20392:       //fallthrough
 20393:     case 0b011_011:  //(A3)+
 20394:       if (XEiJ.EFA_SEPARATE_AR) {
 20395:         M68kException.m6eIncremented += 4L << (3 << 3);
 20396:         return (XEiJ.regRn[11] += 4) - 4;
 20397:       }
 20398:       //fallthrough
 20399:     case 0b011_100:  //(A4)+
 20400:       if (XEiJ.EFA_SEPARATE_AR) {
 20401:         M68kException.m6eIncremented += 4L << (4 << 3);
 20402:         return (XEiJ.regRn[12] += 4) - 4;
 20403:       }
 20404:       //fallthrough
 20405:     case 0b011_101:  //(A5)+
 20406:       if (XEiJ.EFA_SEPARATE_AR) {
 20407:         M68kException.m6eIncremented += 4L << (5 << 3);
 20408:         return (XEiJ.regRn[13] += 4) - 4;
 20409:       }
 20410:       //fallthrough
 20411:     case 0b011_110:  //(A6)+
 20412:       if (XEiJ.EFA_SEPARATE_AR) {
 20413:         M68kException.m6eIncremented += 4L << (6 << 3);
 20414:         return (XEiJ.regRn[14] += 4) - 4;
 20415:       }
 20416:       //fallthrough
 20417:     case 0b011_111:  //(A7)+
 20418:       if (XEiJ.EFA_SEPARATE_AR) {
 20419:         M68kException.m6eIncremented += 4L << (7 << 3);
 20420:         return (XEiJ.regRn[15] += 4) - 4;
 20421:       } else {
 20422:         M68kException.m6eIncremented += 4L << ((ea & 7) << 3);
 20423:         return (XEiJ.regRn[ea - (0b011_000 - 8)] += 4) - 4;
 20424:       }
 20425:     case 0b100_000:  //-(A0)
 20426:       if (XEiJ.EFA_SEPARATE_AR) {
 20427:         M68kException.m6eIncremented -= 4L << (0 << 3);
 20428:         return XEiJ.regRn[ 8] -= 4;
 20429:       }
 20430:       //fallthrough
 20431:     case 0b100_001:  //-(A1)
 20432:       if (XEiJ.EFA_SEPARATE_AR) {
 20433:         M68kException.m6eIncremented -= 4L << (1 << 3);
 20434:         return XEiJ.regRn[ 9] -= 4;
 20435:       }
 20436:       //fallthrough
 20437:     case 0b100_010:  //-(A2)
 20438:       if (XEiJ.EFA_SEPARATE_AR) {
 20439:         M68kException.m6eIncremented -= 4L << (2 << 3);
 20440:         return XEiJ.regRn[10] -= 4;
 20441:       }
 20442:       //fallthrough
 20443:     case 0b100_011:  //-(A3)
 20444:       if (XEiJ.EFA_SEPARATE_AR) {
 20445:         M68kException.m6eIncremented -= 4L << (3 << 3);
 20446:         return XEiJ.regRn[11] -= 4;
 20447:       }
 20448:       //fallthrough
 20449:     case 0b100_100:  //-(A4)
 20450:       if (XEiJ.EFA_SEPARATE_AR) {
 20451:         M68kException.m6eIncremented -= 4L << (4 << 3);
 20452:         return XEiJ.regRn[12] -= 4;
 20453:       }
 20454:       //fallthrough
 20455:     case 0b100_101:  //-(A5)
 20456:       if (XEiJ.EFA_SEPARATE_AR) {
 20457:         M68kException.m6eIncremented -= 4L << (5 << 3);
 20458:         return XEiJ.regRn[13] -= 4;
 20459:       }
 20460:       //fallthrough
 20461:     case 0b100_110:  //-(A6)
 20462:       if (XEiJ.EFA_SEPARATE_AR) {
 20463:         M68kException.m6eIncremented -= 4L << (6 << 3);
 20464:         return XEiJ.regRn[14] -= 4;
 20465:       }
 20466:       //fallthrough
 20467:     case 0b100_111:  //-(A7)
 20468:       if (XEiJ.EFA_SEPARATE_AR) {
 20469:         M68kException.m6eIncremented -= 4L << (7 << 3);
 20470:         return XEiJ.regRn[15] -= 4;
 20471:       } else {
 20472:         M68kException.m6eIncremented -= 4L << ((ea & 7) << 3);
 20473:         return XEiJ.regRn[ea - (0b100_000 - 8)] -= 4;
 20474:       }
 20475:     case 0b101_000:  //(d16,A0)
 20476:     case 0b101_001:  //(d16,A1)
 20477:     case 0b101_010:  //(d16,A2)
 20478:     case 0b101_011:  //(d16,A3)
 20479:     case 0b101_100:  //(d16,A4)
 20480:     case 0b101_101:  //(d16,A5)
 20481:     case 0b101_110:  //(d16,A6)
 20482:     case 0b101_111:  //(d16,A7)
 20483:       if (XEiJ.MPU_COMPOUND_POSTINCREMENT) {
 20484:         return (XEiJ.regRn[ea - (0b101_000 - 8)]  //ベースレジスタ
 20485:                 + mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS));  //pcws。ワードディスプレースメント
 20486:       } else {
 20487:         t = XEiJ.regPC;
 20488:         XEiJ.regPC = t + 2;
 20489:         return (XEiJ.regRn[ea - (0b101_000 - 8)]  //ベースレジスタ
 20490:                 + mmuReadWordSignExword (t, XEiJ.regSRS));  //pcws。ワードディスプレースメント
 20491:       }
 20492:     case 0b110_000:  //(d8,A0,Rn.wl)
 20493:     case 0b110_001:  //(d8,A1,Rn.wl)
 20494:     case 0b110_010:  //(d8,A2,Rn.wl)
 20495:     case 0b110_011:  //(d8,A3,Rn.wl)
 20496:     case 0b110_100:  //(d8,A4,Rn.wl)
 20497:     case 0b110_101:  //(d8,A5,Rn.wl)
 20498:     case 0b110_110:  //(d8,A6,Rn.wl)
 20499:     case 0b110_111:  //(d8,A7,Rn.wl)
 20500:       if (XEiJ.MPU_COMPOUND_POSTINCREMENT) {
 20501:         w = mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);  //pcwz。拡張ワード
 20502:       } else {
 20503:         w = XEiJ.regPC;
 20504:         XEiJ.regPC = w + 2;
 20505:         w = mmuReadWordZeroExword (w, XEiJ.regSRS);  //pcwz。拡張ワード
 20506:       }
 20507:       if (w << 31 - 8 < 0) {  //フルフォーマット
 20508:         XEiJ.mpuCycleCount += w << -2 == 0 ? 1 : 3;  //メモリ間接なし:メモリ間接あり
 20509:       }
 20510:       t = (((~w & 0x0180) == 0 ? 0 :  //ベースレジスタサプレス
 20511:             XEiJ.regRn[ea - (0b110_000 - 8)])  //ベースレジスタ
 20512:            + (w << 31 - 8 >= 0 ? (byte) w :  //バイトディスプレースメント
 20513:               w << 31 - 5 >= 0 ? 0 :  //ヌルベースディスプレースメント
 20514:               w << 31 - 4 >= 0 ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) :  //pcws。ワードベースディスプレースメント
 20515:               mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS)));  //pcls。ロングベースディスプレースメント
 20516:       x = ((~w & 0x0140) == 0 ? 0 :  //インデックスサプレス
 20517:            (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] :  //ワードインデックス
 20518:             XEiJ.regRn[w >> 12])  //ロングインデックス
 20519:            << (w >> 9 & 3));  //スケールファクタ。ワードインデックスのときは符号拡張してから掛ける
 20520:       return ((w & 0x0103) <= 0x0100 ? t + x :  //メモリ間接なし
 20521:               ((XEiJ.TEST_BIT_2_SHIFT ? w << 31 - 2 >= 0 : (w & 4) == 0) ? mmuReadLongData (t + x, XEiJ.regSRS) :  //プリインデックス
 20522:                mmuReadLongData (t, XEiJ.regSRS) + x)  //ポストインデックス
 20523:               + ((XEiJ.TEST_BIT_1_SHIFT ? w << 31 - 1 >= 0 : (w & 2) == 0) ? 0 :  //ヌルアウタディスプレースメント
 20524:                  (XEiJ.TEST_BIT_0_SHIFT ? w << 31 - 0 >= 0 : (w & 1) == 0) ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) :  //pcws。ワードアウタディスプレースメント
 20525:                  mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS)));  //pcls。ロングアウタディスプレースメント
 20526:     case 0b111_000:  //(xxx).W
 20527:       return mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);  //pcws
 20528:     case 0b111_001:  //(xxx).L
 20529:       return mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS);  //pcls
 20530:     case 0b111_010:  //(d16,PC)
 20531:       t = XEiJ.regPC;
 20532:       XEiJ.regPC = t + 2;
 20533:       return (t  //ベースレジスタ
 20534:               + mmuReadWordSignExword (t, XEiJ.regSRS));  //pcws。ワードディスプレースメント
 20535:     case 0b111_011:  //(d8,PC,Rn.wl)
 20536:       t = XEiJ.regPC;
 20537:       XEiJ.regPC = t + 2;
 20538:       w = mmuReadWordZeroExword (t, XEiJ.regSRS);  //pcwz。拡張ワード
 20539:       if (w << 31 - 8 < 0) {  //フルフォーマット
 20540:         XEiJ.mpuCycleCount += w << -2 == 0 ? 1 : 3;  //メモリ間接なし:メモリ間接あり
 20541:       }
 20542:       t = (((~w & 0x0180) == 0 ? 0 :  //ベースレジスタサプレス
 20543:             t)  //ベースレジスタ
 20544:            + (w << 31 - 8 >= 0 ? (byte) w :  //バイトディスプレースメント
 20545:               w << 31 - 5 >= 0 ? 0 :  //ヌルベースディスプレースメント
 20546:               w << 31 - 4 >= 0 ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) :  //pcws。ワードベースディスプレースメント
 20547:               mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS)));  //pcls。ロングベースディスプレースメント
 20548:       x = ((~w & 0x0140) == 0 ? 0 :  //インデックスサプレス
 20549:            (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] :  //ワードインデックス
 20550:             XEiJ.regRn[w >> 12])  //ロングインデックス
 20551:            << (w >> 9 & 3));  //スケールファクタ。ワードインデックスのときは符号拡張してから掛ける
 20552:       return ((w & 0x0103) <= 0x0100 ? t + x :  //メモリ間接なし
 20553:               ((XEiJ.TEST_BIT_2_SHIFT ? w << 31 - 2 >= 0 : (w & 4) == 0) ? mmuReadLongData (t + x, XEiJ.regSRS) :  //プリインデックス
 20554:                mmuReadLongData (t, XEiJ.regSRS) + x)  //ポストインデックス
 20555:               + ((XEiJ.TEST_BIT_1_SHIFT ? w << 31 - 1 >= 0 : (w & 2) == 0) ? 0 :  //ヌルアウタディスプレースメント
 20556:                  (XEiJ.TEST_BIT_0_SHIFT ? w << 31 - 0 >= 0 : (w & 1) == 0) ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) :  //pcws。ワードアウタディスプレースメント
 20557:                  mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS)));  //pcls。ロングアウタディスプレースメント
 20558:     }  //switch
 20559:     M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION;
 20560:     throw M68kException.m6eSignal;
 20561:   }  //efaMemLong
 20562: 
 20563:   //a = efaMltLong (ea)  //|  M+-WXZ  |
 20564:   //  メモリ可変モードのロングオペランドの実効アドレスを求める
 20565:   //  efaMemLongとの違いは(d16,PC)と(d8,PC,Rn.wl)がないこと
 20566:   @SuppressWarnings ("fallthrough") public static int efaMltLong (int ea) throws M68kException {
 20567:     int t, w, x;
 20568:     switch (ea) {
 20569:     case 0b010_000:  //(A0)
 20570:       if (XEiJ.EFA_SEPARATE_AR) {
 20571:         return XEiJ.regRn[ 8];
 20572:       }
 20573:       //fallthrough
 20574:     case 0b010_001:  //(A1)
 20575:       if (XEiJ.EFA_SEPARATE_AR) {
 20576:         return XEiJ.regRn[ 9];
 20577:       }
 20578:       //fallthrough
 20579:     case 0b010_010:  //(A2)
 20580:       if (XEiJ.EFA_SEPARATE_AR) {
 20581:         return XEiJ.regRn[10];
 20582:       }
 20583:       //fallthrough
 20584:     case 0b010_011:  //(A3)
 20585:       if (XEiJ.EFA_SEPARATE_AR) {
 20586:         return XEiJ.regRn[11];
 20587:       }
 20588:       //fallthrough
 20589:     case 0b010_100:  //(A4)
 20590:       if (XEiJ.EFA_SEPARATE_AR) {
 20591:         return XEiJ.regRn[12];
 20592:       }
 20593:       //fallthrough
 20594:     case 0b010_101:  //(A5)
 20595:       if (XEiJ.EFA_SEPARATE_AR) {
 20596:         return XEiJ.regRn[13];
 20597:       }
 20598:       //fallthrough
 20599:     case 0b010_110:  //(A6)
 20600:       if (XEiJ.EFA_SEPARATE_AR) {
 20601:         return XEiJ.regRn[14];
 20602:       }
 20603:       //fallthrough
 20604:     case 0b010_111:  //(A7)
 20605:       if (XEiJ.EFA_SEPARATE_AR) {
 20606:         return XEiJ.regRn[15];
 20607:       } else {
 20608:         return XEiJ.regRn[ea - (0b010_000 - 8)];
 20609:       }
 20610:     case 0b011_000:  //(A0)+
 20611:       if (XEiJ.EFA_SEPARATE_AR) {
 20612:         M68kException.m6eIncremented += 4L << (0 << 3);
 20613:         return (XEiJ.regRn[ 8] += 4) - 4;
 20614:       }
 20615:       //fallthrough
 20616:     case 0b011_001:  //(A1)+
 20617:       if (XEiJ.EFA_SEPARATE_AR) {
 20618:         M68kException.m6eIncremented += 4L << (1 << 3);
 20619:         return (XEiJ.regRn[ 9] += 4) - 4;
 20620:       }
 20621:       //fallthrough
 20622:     case 0b011_010:  //(A2)+
 20623:       if (XEiJ.EFA_SEPARATE_AR) {
 20624:         M68kException.m6eIncremented += 4L << (2 << 3);
 20625:         return (XEiJ.regRn[10] += 4) - 4;
 20626:       }
 20627:       //fallthrough
 20628:     case 0b011_011:  //(A3)+
 20629:       if (XEiJ.EFA_SEPARATE_AR) {
 20630:         M68kException.m6eIncremented += 4L << (3 << 3);
 20631:         return (XEiJ.regRn[11] += 4) - 4;
 20632:       }
 20633:       //fallthrough
 20634:     case 0b011_100:  //(A4)+
 20635:       if (XEiJ.EFA_SEPARATE_AR) {
 20636:         M68kException.m6eIncremented += 4L << (4 << 3);
 20637:         return (XEiJ.regRn[12] += 4) - 4;
 20638:       }
 20639:       //fallthrough
 20640:     case 0b011_101:  //(A5)+
 20641:       if (XEiJ.EFA_SEPARATE_AR) {
 20642:         M68kException.m6eIncremented += 4L << (5 << 3);
 20643:         return (XEiJ.regRn[13] += 4) - 4;
 20644:       }
 20645:       //fallthrough
 20646:     case 0b011_110:  //(A6)+
 20647:       if (XEiJ.EFA_SEPARATE_AR) {
 20648:         M68kException.m6eIncremented += 4L << (6 << 3);
 20649:         return (XEiJ.regRn[14] += 4) - 4;
 20650:       }
 20651:       //fallthrough
 20652:     case 0b011_111:  //(A7)+
 20653:       if (XEiJ.EFA_SEPARATE_AR) {
 20654:         M68kException.m6eIncremented += 4L << (7 << 3);
 20655:         return (XEiJ.regRn[15] += 4) - 4;
 20656:       } else {
 20657:         M68kException.m6eIncremented += 4L << ((ea & 7) << 3);
 20658:         return (XEiJ.regRn[ea - (0b011_000 - 8)] += 4) - 4;
 20659:       }
 20660:     case 0b100_000:  //-(A0)
 20661:       if (XEiJ.EFA_SEPARATE_AR) {
 20662:         M68kException.m6eIncremented -= 4L << (0 << 3);
 20663:         return XEiJ.regRn[ 8] -= 4;
 20664:       }
 20665:       //fallthrough
 20666:     case 0b100_001:  //-(A1)
 20667:       if (XEiJ.EFA_SEPARATE_AR) {
 20668:         M68kException.m6eIncremented -= 4L << (1 << 3);
 20669:         return XEiJ.regRn[ 9] -= 4;
 20670:       }
 20671:       //fallthrough
 20672:     case 0b100_010:  //-(A2)
 20673:       if (XEiJ.EFA_SEPARATE_AR) {
 20674:         M68kException.m6eIncremented -= 4L << (2 << 3);
 20675:         return XEiJ.regRn[10] -= 4;
 20676:       }
 20677:       //fallthrough
 20678:     case 0b100_011:  //-(A3)
 20679:       if (XEiJ.EFA_SEPARATE_AR) {
 20680:         M68kException.m6eIncremented -= 4L << (3 << 3);
 20681:         return XEiJ.regRn[11] -= 4;
 20682:       }
 20683:       //fallthrough
 20684:     case 0b100_100:  //-(A4)
 20685:       if (XEiJ.EFA_SEPARATE_AR) {
 20686:         M68kException.m6eIncremented -= 4L << (4 << 3);
 20687:         return XEiJ.regRn[12] -= 4;
 20688:       }
 20689:       //fallthrough
 20690:     case 0b100_101:  //-(A5)
 20691:       if (XEiJ.EFA_SEPARATE_AR) {
 20692:         M68kException.m6eIncremented -= 4L << (5 << 3);
 20693:         return XEiJ.regRn[13] -= 4;
 20694:       }
 20695:       //fallthrough
 20696:     case 0b100_110:  //-(A6)
 20697:       if (XEiJ.EFA_SEPARATE_AR) {
 20698:         M68kException.m6eIncremented -= 4L << (6 << 3);
 20699:         return XEiJ.regRn[14] -= 4;
 20700:       }
 20701:       //fallthrough
 20702:     case 0b100_111:  //-(A7)
 20703:       if (XEiJ.EFA_SEPARATE_AR) {
 20704:         M68kException.m6eIncremented -= 4L << (7 << 3);
 20705:         return XEiJ.regRn[15] -= 4;
 20706:       } else {
 20707:         M68kException.m6eIncremented -= 4L << ((ea & 7) << 3);
 20708:         return XEiJ.regRn[ea - (0b100_000 - 8)] -= 4;
 20709:       }
 20710:     case 0b101_000:  //(d16,A0)
 20711:     case 0b101_001:  //(d16,A1)
 20712:     case 0b101_010:  //(d16,A2)
 20713:     case 0b101_011:  //(d16,A3)
 20714:     case 0b101_100:  //(d16,A4)
 20715:     case 0b101_101:  //(d16,A5)
 20716:     case 0b101_110:  //(d16,A6)
 20717:     case 0b101_111:  //(d16,A7)
 20718:       if (XEiJ.MPU_COMPOUND_POSTINCREMENT) {
 20719:         return (XEiJ.regRn[ea - (0b101_000 - 8)]  //ベースレジスタ
 20720:                 + mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS));  //pcws。ワードディスプレースメント
 20721:       } else {
 20722:         t = XEiJ.regPC;
 20723:         XEiJ.regPC = t + 2;
 20724:         return (XEiJ.regRn[ea - (0b101_000 - 8)]  //ベースレジスタ
 20725:                 + mmuReadWordSignExword (t, XEiJ.regSRS));  //pcws。ワードディスプレースメント
 20726:       }
 20727:     case 0b110_000:  //(d8,A0,Rn.wl)
 20728:     case 0b110_001:  //(d8,A1,Rn.wl)
 20729:     case 0b110_010:  //(d8,A2,Rn.wl)
 20730:     case 0b110_011:  //(d8,A3,Rn.wl)
 20731:     case 0b110_100:  //(d8,A4,Rn.wl)
 20732:     case 0b110_101:  //(d8,A5,Rn.wl)
 20733:     case 0b110_110:  //(d8,A6,Rn.wl)
 20734:     case 0b110_111:  //(d8,A7,Rn.wl)
 20735:       if (XEiJ.MPU_COMPOUND_POSTINCREMENT) {
 20736:         w = mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);  //pcwz。拡張ワード
 20737:       } else {
 20738:         w = XEiJ.regPC;
 20739:         XEiJ.regPC = w + 2;
 20740:         w = mmuReadWordZeroExword (w, XEiJ.regSRS);  //pcwz。拡張ワード
 20741:       }
 20742:       if (w << 31 - 8 < 0) {  //フルフォーマット
 20743:         XEiJ.mpuCycleCount += w << -2 == 0 ? 1 : 3;  //メモリ間接なし:メモリ間接あり
 20744:       }
 20745:       t = (((~w & 0x0180) == 0 ? 0 :  //ベースレジスタサプレス
 20746:             XEiJ.regRn[ea - (0b110_000 - 8)])  //ベースレジスタ
 20747:            + (w << 31 - 8 >= 0 ? (byte) w :  //バイトディスプレースメント
 20748:               w << 31 - 5 >= 0 ? 0 :  //ヌルベースディスプレースメント
 20749:               w << 31 - 4 >= 0 ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) :  //pcws。ワードベースディスプレースメント
 20750:               mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS)));  //pcls。ロングベースディスプレースメント
 20751:       x = ((~w & 0x0140) == 0 ? 0 :  //インデックスサプレス
 20752:            (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] :  //ワードインデックス
 20753:             XEiJ.regRn[w >> 12])  //ロングインデックス
 20754:            << (w >> 9 & 3));  //スケールファクタ。ワードインデックスのときは符号拡張してから掛ける
 20755:       return ((w & 0x0103) <= 0x0100 ? t + x :  //メモリ間接なし
 20756:               ((XEiJ.TEST_BIT_2_SHIFT ? w << 31 - 2 >= 0 : (w & 4) == 0) ? mmuReadLongData (t + x, XEiJ.regSRS) :  //プリインデックス
 20757:                mmuReadLongData (t, XEiJ.regSRS) + x)  //ポストインデックス
 20758:               + ((XEiJ.TEST_BIT_1_SHIFT ? w << 31 - 1 >= 0 : (w & 2) == 0) ? 0 :  //ヌルアウタディスプレースメント
 20759:                  (XEiJ.TEST_BIT_0_SHIFT ? w << 31 - 0 >= 0 : (w & 1) == 0) ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) :  //pcws。ワードアウタディスプレースメント
 20760:                  mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS)));  //pcls。ロングアウタディスプレースメント
 20761:     case 0b111_000:  //(xxx).W
 20762:       return mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);  //pcws
 20763:     case 0b111_001:  //(xxx).L
 20764:       return mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS);  //pcls
 20765:     }  //switch
 20766:     M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION;
 20767:     throw M68kException.m6eSignal;
 20768:   }  //efaMltLong
 20769: 
 20770:   //a = efaCntLong (ea)  //|  M  WXZP |
 20771:   //  制御モードのロングオペランドの実効アドレスを求める
 20772:   //  efaMemLongとの違いは(Ar)+と-(Ar)がないこと
 20773:   @SuppressWarnings ("fallthrough") public static int efaCntLong (int ea) throws M68kException {
 20774:     int t, w, x;
 20775:     switch (ea) {
 20776:     case 0b010_000:  //(A0)
 20777:       if (XEiJ.EFA_SEPARATE_AR) {
 20778:         return XEiJ.regRn[ 8];
 20779:       }
 20780:       //fallthrough
 20781:     case 0b010_001:  //(A1)
 20782:       if (XEiJ.EFA_SEPARATE_AR) {
 20783:         return XEiJ.regRn[ 9];
 20784:       }
 20785:       //fallthrough
 20786:     case 0b010_010:  //(A2)
 20787:       if (XEiJ.EFA_SEPARATE_AR) {
 20788:         return XEiJ.regRn[10];
 20789:       }
 20790:       //fallthrough
 20791:     case 0b010_011:  //(A3)
 20792:       if (XEiJ.EFA_SEPARATE_AR) {
 20793:         return XEiJ.regRn[11];
 20794:       }
 20795:       //fallthrough
 20796:     case 0b010_100:  //(A4)
 20797:       if (XEiJ.EFA_SEPARATE_AR) {
 20798:         return XEiJ.regRn[12];
 20799:       }
 20800:       //fallthrough
 20801:     case 0b010_101:  //(A5)
 20802:       if (XEiJ.EFA_SEPARATE_AR) {
 20803:         return XEiJ.regRn[13];
 20804:       }
 20805:       //fallthrough
 20806:     case 0b010_110:  //(A6)
 20807:       if (XEiJ.EFA_SEPARATE_AR) {
 20808:         return XEiJ.regRn[14];
 20809:       }
 20810:       //fallthrough
 20811:     case 0b010_111:  //(A7)
 20812:       if (XEiJ.EFA_SEPARATE_AR) {
 20813:         return XEiJ.regRn[15];
 20814:       } else {
 20815:         return XEiJ.regRn[ea - (0b010_000 - 8)];
 20816:       }
 20817:     case 0b101_000:  //(d16,A0)
 20818:     case 0b101_001:  //(d16,A1)
 20819:     case 0b101_010:  //(d16,A2)
 20820:     case 0b101_011:  //(d16,A3)
 20821:     case 0b101_100:  //(d16,A4)
 20822:     case 0b101_101:  //(d16,A5)
 20823:     case 0b101_110:  //(d16,A6)
 20824:     case 0b101_111:  //(d16,A7)
 20825:       if (XEiJ.MPU_COMPOUND_POSTINCREMENT) {
 20826:         return (XEiJ.regRn[ea - (0b101_000 - 8)]  //ベースレジスタ
 20827:                 + mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS));  //pcws。ワードディスプレースメント
 20828:       } else {
 20829:         t = XEiJ.regPC;
 20830:         XEiJ.regPC = t + 2;
 20831:         return (XEiJ.regRn[ea - (0b101_000 - 8)]  //ベースレジスタ
 20832:                 + mmuReadWordSignExword (t, XEiJ.regSRS));  //pcws。ワードディスプレースメント
 20833:       }
 20834:     case 0b110_000:  //(d8,A0,Rn.wl)
 20835:     case 0b110_001:  //(d8,A1,Rn.wl)
 20836:     case 0b110_010:  //(d8,A2,Rn.wl)
 20837:     case 0b110_011:  //(d8,A3,Rn.wl)
 20838:     case 0b110_100:  //(d8,A4,Rn.wl)
 20839:     case 0b110_101:  //(d8,A5,Rn.wl)
 20840:     case 0b110_110:  //(d8,A6,Rn.wl)
 20841:     case 0b110_111:  //(d8,A7,Rn.wl)
 20842:       if (XEiJ.MPU_COMPOUND_POSTINCREMENT) {
 20843:         w = mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);  //pcwz。拡張ワード
 20844:       } else {
 20845:         w = XEiJ.regPC;
 20846:         XEiJ.regPC = w + 2;
 20847:         w = mmuReadWordZeroExword (w, XEiJ.regSRS);  //pcwz。拡張ワード
 20848:       }
 20849:       if (w << 31 - 8 < 0) {  //フルフォーマット
 20850:         XEiJ.mpuCycleCount += w << -2 == 0 ? 1 : 3;  //メモリ間接なし:メモリ間接あり
 20851:       }
 20852:       t = (((~w & 0x0180) == 0 ? 0 :  //ベースレジスタサプレス
 20853:             XEiJ.regRn[ea - (0b110_000 - 8)])  //ベースレジスタ
 20854:            + (w << 31 - 8 >= 0 ? (byte) w :  //バイトディスプレースメント
 20855:               w << 31 - 5 >= 0 ? 0 :  //ヌルベースディスプレースメント
 20856:               w << 31 - 4 >= 0 ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) :  //pcws。ワードベースディスプレースメント
 20857:               mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS)));  //pcls。ロングベースディスプレースメント
 20858:       x = ((~w & 0x0140) == 0 ? 0 :  //インデックスサプレス
 20859:            (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] :  //ワードインデックス
 20860:             XEiJ.regRn[w >> 12])  //ロングインデックス
 20861:            << (w >> 9 & 3));  //スケールファクタ。ワードインデックスのときは符号拡張してから掛ける
 20862:       return ((w & 0x0103) <= 0x0100 ? t + x :  //メモリ間接なし
 20863:               ((XEiJ.TEST_BIT_2_SHIFT ? w << 31 - 2 >= 0 : (w & 4) == 0) ? mmuReadLongData (t + x, XEiJ.regSRS) :  //プリインデックス
 20864:                mmuReadLongData (t, XEiJ.regSRS) + x)  //ポストインデックス
 20865:               + ((XEiJ.TEST_BIT_1_SHIFT ? w << 31 - 1 >= 0 : (w & 2) == 0) ? 0 :  //ヌルアウタディスプレースメント
 20866:                  (XEiJ.TEST_BIT_0_SHIFT ? w << 31 - 0 >= 0 : (w & 1) == 0) ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) :  //pcws。ワードアウタディスプレースメント
 20867:                  mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS)));  //pcls。ロングアウタディスプレースメント
 20868:     case 0b111_000:  //(xxx).W
 20869:       return mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);  //pcws
 20870:     case 0b111_001:  //(xxx).L
 20871:       return mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS);  //pcls
 20872:     case 0b111_010:  //(d16,PC)
 20873:       t = XEiJ.regPC;
 20874:       XEiJ.regPC = t + 2;
 20875:       return (t  //ベースレジスタ
 20876:               + mmuReadWordSignExword (t, XEiJ.regSRS));  //pcws。ワードディスプレースメント
 20877:     case 0b111_011:  //(d8,PC,Rn.wl)
 20878:       t = XEiJ.regPC;
 20879:       XEiJ.regPC = t + 2;
 20880:       w = mmuReadWordZeroExword (t, XEiJ.regSRS);  //pcwz。拡張ワード
 20881:       if (w << 31 - 8 < 0) {  //フルフォーマット
 20882:         XEiJ.mpuCycleCount += w << -2 == 0 ? 1 : 3;  //メモリ間接なし:メモリ間接あり
 20883:       }
 20884:       t = (((~w & 0x0180) == 0 ? 0 :  //ベースレジスタサプレス
 20885:             t)  //ベースレジスタ
 20886:            + (w << 31 - 8 >= 0 ? (byte) w :  //バイトディスプレースメント
 20887:               w << 31 - 5 >= 0 ? 0 :  //ヌルベースディスプレースメント
 20888:               w << 31 - 4 >= 0 ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) :  //pcws。ワードベースディスプレースメント
 20889:               mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS)));  //pcls。ロングベースディスプレースメント
 20890:       x = ((~w & 0x0140) == 0 ? 0 :  //インデックスサプレス
 20891:            (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] :  //ワードインデックス
 20892:             XEiJ.regRn[w >> 12])  //ロングインデックス
 20893:            << (w >> 9 & 3));  //スケールファクタ。ワードインデックスのときは符号拡張してから掛ける
 20894:       return ((w & 0x0103) <= 0x0100 ? t + x :  //メモリ間接なし
 20895:               ((XEiJ.TEST_BIT_2_SHIFT ? w << 31 - 2 >= 0 : (w & 4) == 0) ? mmuReadLongData (t + x, XEiJ.regSRS) :  //プリインデックス
 20896:                mmuReadLongData (t, XEiJ.regSRS) + x)  //ポストインデックス
 20897:               + ((XEiJ.TEST_BIT_1_SHIFT ? w << 31 - 1 >= 0 : (w & 2) == 0) ? 0 :  //ヌルアウタディスプレースメント
 20898:                  (XEiJ.TEST_BIT_0_SHIFT ? w << 31 - 0 >= 0 : (w & 1) == 0) ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) :  //pcws。ワードアウタディスプレースメント
 20899:                  mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS)));  //pcls。ロングアウタディスプレースメント
 20900:     }  //switch
 20901:     M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION;
 20902:     throw M68kException.m6eSignal;
 20903:   }  //efaCntLong
 20904: 
 20905:   //a = efaCltLong (ea)  //|  M  WXZ  |
 20906:   //  制御可変モードのワードオペランドの実効アドレスを求める
 20907:   //  efaCntLongとの違いは(d16,PC)と(d8,PC,Rn.wl)がないこと
 20908:   @SuppressWarnings ("fallthrough") public static int efaCltLong (int ea) throws M68kException {
 20909:     int t, w, x;
 20910:     switch (ea) {
 20911:     case 0b010_000:  //(A0)
 20912:       if (XEiJ.EFA_SEPARATE_AR) {
 20913:         return XEiJ.regRn[ 8];
 20914:       }
 20915:       //fallthrough
 20916:     case 0b010_001:  //(A1)
 20917:       if (XEiJ.EFA_SEPARATE_AR) {
 20918:         return XEiJ.regRn[ 9];
 20919:       }
 20920:       //fallthrough
 20921:     case 0b010_010:  //(A2)
 20922:       if (XEiJ.EFA_SEPARATE_AR) {
 20923:         return XEiJ.regRn[10];
 20924:       }
 20925:       //fallthrough
 20926:     case 0b010_011:  //(A3)
 20927:       if (XEiJ.EFA_SEPARATE_AR) {
 20928:         return XEiJ.regRn[11];
 20929:       }
 20930:       //fallthrough
 20931:     case 0b010_100:  //(A4)
 20932:       if (XEiJ.EFA_SEPARATE_AR) {
 20933:         return XEiJ.regRn[12];
 20934:       }
 20935:       //fallthrough
 20936:     case 0b010_101:  //(A5)
 20937:       if (XEiJ.EFA_SEPARATE_AR) {
 20938:         return XEiJ.regRn[13];
 20939:       }
 20940:       //fallthrough
 20941:     case 0b010_110:  //(A6)
 20942:       if (XEiJ.EFA_SEPARATE_AR) {
 20943:         return XEiJ.regRn[14];
 20944:       }
 20945:       //fallthrough
 20946:     case 0b010_111:  //(A7)
 20947:       if (XEiJ.EFA_SEPARATE_AR) {
 20948:         return XEiJ.regRn[15];
 20949:       } else {
 20950:         return XEiJ.regRn[ea - (0b010_000 - 8)];
 20951:       }
 20952:     case 0b101_000:  //(d16,A0)
 20953:     case 0b101_001:  //(d16,A1)
 20954:     case 0b101_010:  //(d16,A2)
 20955:     case 0b101_011:  //(d16,A3)
 20956:     case 0b101_100:  //(d16,A4)
 20957:     case 0b101_101:  //(d16,A5)
 20958:     case 0b101_110:  //(d16,A6)
 20959:     case 0b101_111:  //(d16,A7)
 20960:       if (XEiJ.MPU_COMPOUND_POSTINCREMENT) {
 20961:         return (XEiJ.regRn[ea - (0b101_000 - 8)]  //ベースレジスタ
 20962:                 + mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS));  //pcws。ワードディスプレースメント
 20963:       } else {
 20964:         t = XEiJ.regPC;
 20965:         XEiJ.regPC = t + 2;
 20966:         return (XEiJ.regRn[ea - (0b101_000 - 8)]  //ベースレジスタ
 20967:                 + mmuReadWordSignExword (t, XEiJ.regSRS));  //pcws。ワードディスプレースメント
 20968:       }
 20969:     case 0b110_000:  //(d8,A0,Rn.wl)
 20970:     case 0b110_001:  //(d8,A1,Rn.wl)
 20971:     case 0b110_010:  //(d8,A2,Rn.wl)
 20972:     case 0b110_011:  //(d8,A3,Rn.wl)
 20973:     case 0b110_100:  //(d8,A4,Rn.wl)
 20974:     case 0b110_101:  //(d8,A5,Rn.wl)
 20975:     case 0b110_110:  //(d8,A6,Rn.wl)
 20976:     case 0b110_111:  //(d8,A7,Rn.wl)
 20977:       if (XEiJ.MPU_COMPOUND_POSTINCREMENT) {
 20978:         w = mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);  //pcwz。拡張ワード
 20979:       } else {
 20980:         w = XEiJ.regPC;
 20981:         XEiJ.regPC = w + 2;
 20982:         w = mmuReadWordZeroExword (w, XEiJ.regSRS);  //pcwz。拡張ワード
 20983:       }
 20984:       if (w << 31 - 8 < 0) {  //フルフォーマット
 20985:         XEiJ.mpuCycleCount += w << -2 == 0 ? 1 : 3;  //メモリ間接なし:メモリ間接あり
 20986:       }
 20987:       t = (((~w & 0x0180) == 0 ? 0 :  //ベースレジスタサプレス
 20988:             XEiJ.regRn[ea - (0b110_000 - 8)])  //ベースレジスタ
 20989:            + (w << 31 - 8 >= 0 ? (byte) w :  //バイトディスプレースメント
 20990:               w << 31 - 5 >= 0 ? 0 :  //ヌルベースディスプレースメント
 20991:               w << 31 - 4 >= 0 ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) :  //pcws。ワードベースディスプレースメント
 20992:               mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS)));  //pcls。ロングベースディスプレースメント
 20993:       x = ((~w & 0x0140) == 0 ? 0 :  //インデックスサプレス
 20994:            (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] :  //ワードインデックス
 20995:             XEiJ.regRn[w >> 12])  //ロングインデックス
 20996:            << (w >> 9 & 3));  //スケールファクタ。ワードインデックスのときは符号拡張してから掛ける
 20997:       return ((w & 0x0103) <= 0x0100 ? t + x :  //メモリ間接なし
 20998:               ((XEiJ.TEST_BIT_2_SHIFT ? w << 31 - 2 >= 0 : (w & 4) == 0) ? mmuReadLongData (t + x, XEiJ.regSRS) :  //プリインデックス
 20999:                mmuReadLongData (t, XEiJ.regSRS) + x)  //ポストインデックス
 21000:               + ((XEiJ.TEST_BIT_1_SHIFT ? w << 31 - 1 >= 0 : (w & 2) == 0) ? 0 :  //ヌルアウタディスプレースメント
 21001:                  (XEiJ.TEST_BIT_0_SHIFT ? w << 31 - 0 >= 0 : (w & 1) == 0) ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) :  //pcws。ワードアウタディスプレースメント
 21002:                  mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS)));  //pcls。ロングアウタディスプレースメント
 21003:     case 0b111_000:  //(xxx).W
 21004:       return mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);  //pcws
 21005:     case 0b111_001:  //(xxx).L
 21006:       return mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS);  //pcls
 21007:     }  //switch
 21008:     M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION;
 21009:     throw M68kException.m6eSignal;
 21010:   }  //efaCltLong
 21011: 
 21012:   //a = efaAnyQuad (ea)  //|  M+-WXZPI|
 21013:   //  任意のモードのクワッドオペランドの実効アドレスを求める
 21014:   //  efaAnyLongとの違いは(Ar)+と-(Ar)がArを8変化させることと、#<data>がPCを8変化させることと、
 21015:   //  オペランドのアクセスが2ワード増える分の8サイクルが追加されていること
 21016:   @SuppressWarnings ("fallthrough") public static int efaAnyQuad (int ea) throws M68kException {
 21017:     int t, w, x;
 21018:     switch (ea) {
 21019:     case 0b010_000:  //(A0)
 21020:       if (XEiJ.EFA_SEPARATE_AR) {
 21021:         return XEiJ.regRn[ 8];
 21022:       }
 21023:       //fallthrough
 21024:     case 0b010_001:  //(A1)
 21025:       if (XEiJ.EFA_SEPARATE_AR) {
 21026:         return XEiJ.regRn[ 9];
 21027:       }
 21028:       //fallthrough
 21029:     case 0b010_010:  //(A2)
 21030:       if (XEiJ.EFA_SEPARATE_AR) {
 21031:         return XEiJ.regRn[10];
 21032:       }
 21033:       //fallthrough
 21034:     case 0b010_011:  //(A3)
 21035:       if (XEiJ.EFA_SEPARATE_AR) {
 21036:         return XEiJ.regRn[11];
 21037:       }
 21038:       //fallthrough
 21039:     case 0b010_100:  //(A4)
 21040:       if (XEiJ.EFA_SEPARATE_AR) {
 21041:         return XEiJ.regRn[12];
 21042:       }
 21043:       //fallthrough
 21044:     case 0b010_101:  //(A5)
 21045:       if (XEiJ.EFA_SEPARATE_AR) {
 21046:         return XEiJ.regRn[13];
 21047:       }
 21048:       //fallthrough
 21049:     case 0b010_110:  //(A6)
 21050:       if (XEiJ.EFA_SEPARATE_AR) {
 21051:         return XEiJ.regRn[14];
 21052:       }
 21053:       //fallthrough
 21054:     case 0b010_111:  //(A7)
 21055:       if (XEiJ.EFA_SEPARATE_AR) {
 21056:         return XEiJ.regRn[15];
 21057:       } else {
 21058:         return XEiJ.regRn[ea - (0b010_000 - 8)];
 21059:       }
 21060:     case 0b011_000:  //(A0)+
 21061:       if (XEiJ.EFA_SEPARATE_AR) {
 21062:         M68kException.m6eIncremented += 8L << (0 << 3);
 21063:         return (XEiJ.regRn[ 8] += 8) - 8;
 21064:       }
 21065:       //fallthrough
 21066:     case 0b011_001:  //(A1)+
 21067:       if (XEiJ.EFA_SEPARATE_AR) {
 21068:         M68kException.m6eIncremented += 8L << (1 << 3);
 21069:         return (XEiJ.regRn[ 9] += 8) - 8;
 21070:       }
 21071:       //fallthrough
 21072:     case 0b011_010:  //(A2)+
 21073:       if (XEiJ.EFA_SEPARATE_AR) {
 21074:         M68kException.m6eIncremented += 8L << (2 << 3);
 21075:         return (XEiJ.regRn[10] += 8) - 8;
 21076:       }
 21077:       //fallthrough
 21078:     case 0b011_011:  //(A3)+
 21079:       if (XEiJ.EFA_SEPARATE_AR) {
 21080:         M68kException.m6eIncremented += 8L << (3 << 3);
 21081:         return (XEiJ.regRn[11] += 8) - 8;
 21082:       }
 21083:       //fallthrough
 21084:     case 0b011_100:  //(A4)+
 21085:       if (XEiJ.EFA_SEPARATE_AR) {
 21086:         M68kException.m6eIncremented += 8L << (4 << 3);
 21087:         return (XEiJ.regRn[12] += 8) - 8;
 21088:       }
 21089:       //fallthrough
 21090:     case 0b011_101:  //(A5)+
 21091:       if (XEiJ.EFA_SEPARATE_AR) {
 21092:         M68kException.m6eIncremented += 8L << (5 << 3);
 21093:         return (XEiJ.regRn[13] += 8) - 8;
 21094:       }
 21095:       //fallthrough
 21096:     case 0b011_110:  //(A6)+
 21097:       if (XEiJ.EFA_SEPARATE_AR) {
 21098:         M68kException.m6eIncremented += 8L << (6 << 3);
 21099:         return (XEiJ.regRn[14] += 8) - 8;
 21100:       }
 21101:       //fallthrough
 21102:     case 0b011_111:  //(A7)+
 21103:       if (XEiJ.EFA_SEPARATE_AR) {
 21104:         M68kException.m6eIncremented += 8L << (7 << 3);
 21105:         return (XEiJ.regRn[15] += 8) - 8;
 21106:       } else {
 21107:         M68kException.m6eIncremented += 8L << ((ea & 7) << 3);
 21108:         return (XEiJ.regRn[ea - (0b011_000 - 8)] += 8) - 8;
 21109:       }
 21110:     case 0b100_000:  //-(A0)
 21111:       if (XEiJ.EFA_SEPARATE_AR) {
 21112:         M68kException.m6eIncremented -= 8L << (0 << 3);
 21113:         return XEiJ.regRn[ 8] -= 8;
 21114:       }
 21115:       //fallthrough
 21116:     case 0b100_001:  //-(A1)
 21117:       if (XEiJ.EFA_SEPARATE_AR) {
 21118:         M68kException.m6eIncremented -= 8L << (1 << 3);
 21119:         return XEiJ.regRn[ 9] -= 8;
 21120:       }
 21121:       //fallthrough
 21122:     case 0b100_010:  //-(A2)
 21123:       if (XEiJ.EFA_SEPARATE_AR) {
 21124:         M68kException.m6eIncremented -= 8L << (2 << 3);
 21125:         return XEiJ.regRn[10] -= 8;
 21126:       }
 21127:       //fallthrough
 21128:     case 0b100_011:  //-(A3)
 21129:       if (XEiJ.EFA_SEPARATE_AR) {
 21130:         M68kException.m6eIncremented -= 8L << (3 << 3);
 21131:         return XEiJ.regRn[11] -= 8;
 21132:       }
 21133:       //fallthrough
 21134:     case 0b100_100:  //-(A4)
 21135:       if (XEiJ.EFA_SEPARATE_AR) {
 21136:         M68kException.m6eIncremented -= 8L << (4 << 3);
 21137:         return XEiJ.regRn[12] -= 8;
 21138:       }
 21139:       //fallthrough
 21140:     case 0b100_101:  //-(A5)
 21141:       if (XEiJ.EFA_SEPARATE_AR) {
 21142:         M68kException.m6eIncremented -= 8L << (5 << 3);
 21143:         return XEiJ.regRn[13] -= 8;
 21144:       }
 21145:       //fallthrough
 21146:     case 0b100_110:  //-(A6)
 21147:       if (XEiJ.EFA_SEPARATE_AR) {
 21148:         M68kException.m6eIncremented -= 8L << (6 << 3);
 21149:         return XEiJ.regRn[14] -= 8;
 21150:       }
 21151:       //fallthrough
 21152:     case 0b100_111:  //-(A7)
 21153:       if (XEiJ.EFA_SEPARATE_AR) {
 21154:         M68kException.m6eIncremented -= 8L << (7 << 3);
 21155:         return XEiJ.regRn[15] -= 8;
 21156:       } else {
 21157:         M68kException.m6eIncremented -= 8L << ((ea & 7) << 3);
 21158:         return XEiJ.regRn[ea - (0b100_000 - 8)] -= 8;
 21159:       }
 21160:     case 0b101_000:  //(d16,A0)
 21161:     case 0b101_001:  //(d16,A1)
 21162:     case 0b101_010:  //(d16,A2)
 21163:     case 0b101_011:  //(d16,A3)
 21164:     case 0b101_100:  //(d16,A4)
 21165:     case 0b101_101:  //(d16,A5)
 21166:     case 0b101_110:  //(d16,A6)
 21167:     case 0b101_111:  //(d16,A7)
 21168:       if (XEiJ.MPU_COMPOUND_POSTINCREMENT) {
 21169:         return (XEiJ.regRn[ea - (0b101_000 - 8)]  //ベースレジスタ
 21170:                 + mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS));  //pcws。ワードディスプレースメント
 21171:       } else {
 21172:         t = XEiJ.regPC;
 21173:         XEiJ.regPC = t + 2;
 21174:         return (XEiJ.regRn[ea - (0b101_000 - 8)]  //ベースレジスタ
 21175:                 + mmuReadWordSignExword (t, XEiJ.regSRS));  //pcws。ワードディスプレースメント
 21176:       }
 21177:     case 0b110_000:  //(d8,A0,Rn.wl)
 21178:     case 0b110_001:  //(d8,A1,Rn.wl)
 21179:     case 0b110_010:  //(d8,A2,Rn.wl)
 21180:     case 0b110_011:  //(d8,A3,Rn.wl)
 21181:     case 0b110_100:  //(d8,A4,Rn.wl)
 21182:     case 0b110_101:  //(d8,A5,Rn.wl)
 21183:     case 0b110_110:  //(d8,A6,Rn.wl)
 21184:     case 0b110_111:  //(d8,A7,Rn.wl)
 21185:       if (XEiJ.MPU_COMPOUND_POSTINCREMENT) {
 21186:         w = mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);  //pcwz。拡張ワード
 21187:       } else {
 21188:         w = XEiJ.regPC;
 21189:         XEiJ.regPC = w + 2;
 21190:         w = mmuReadWordZeroExword (w, XEiJ.regSRS);  //pcwz。拡張ワード
 21191:       }
 21192:       if (w << 31 - 8 < 0) {  //フルフォーマット
 21193:         XEiJ.mpuCycleCount += w << -2 == 0 ? 1 : 3;  //メモリ間接なし:メモリ間接あり
 21194:       }
 21195:       t = (((~w & 0x0180) == 0 ? 0 :  //ベースレジスタサプレス
 21196:             XEiJ.regRn[ea - (0b110_000 - 8)])  //ベースレジスタ
 21197:            + (w << 31 - 8 >= 0 ? (byte) w :  //バイトディスプレースメント
 21198:               w << 31 - 5 >= 0 ? 0 :  //ヌルベースディスプレースメント
 21199:               w << 31 - 4 >= 0 ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) :  //pcws。ワードベースディスプレースメント
 21200:               mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS)));  //pcls。ロングベースディスプレースメント
 21201:       x = ((~w & 0x0140) == 0 ? 0 :  //インデックスサプレス
 21202:            (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] :  //ワードインデックス
 21203:             XEiJ.regRn[w >> 12])  //ロングインデックス
 21204:            << (w >> 9 & 3));  //スケールファクタ。ワードインデックスのときは符号拡張してから掛ける
 21205:       return ((w & 0x0103) <= 0x0100 ? t + x :  //メモリ間接なし
 21206:               ((XEiJ.TEST_BIT_2_SHIFT ? w << 31 - 2 >= 0 : (w & 4) == 0) ? mmuReadLongData (t + x, XEiJ.regSRS) :  //プリインデックス
 21207:                mmuReadLongData (t, XEiJ.regSRS) + x)  //ポストインデックス
 21208:               + ((XEiJ.TEST_BIT_1_SHIFT ? w << 31 - 1 >= 0 : (w & 2) == 0) ? 0 :  //ヌルアウタディスプレースメント
 21209:                  (XEiJ.TEST_BIT_0_SHIFT ? w << 31 - 0 >= 0 : (w & 1) == 0) ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) :  //pcws。ワードアウタディスプレースメント
 21210:                  mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS)));  //pcls。ロングアウタディスプレースメント
 21211:     case 0b111_000:  //(xxx).W
 21212:       return mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);  //pcws
 21213:     case 0b111_001:  //(xxx).L
 21214:       return mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS);  //pcls
 21215:     case 0b111_010:  //(d16,PC)
 21216:       t = XEiJ.regPC;
 21217:       XEiJ.regPC = t + 2;
 21218:       return (t  //ベースレジスタ
 21219:               + mmuReadWordSignExword (t, XEiJ.regSRS));  //pcws。ワードディスプレースメント
 21220:     case 0b111_011:  //(d8,PC,Rn.wl)
 21221:       t = XEiJ.regPC;
 21222:       XEiJ.regPC = t + 2;
 21223:       w = mmuReadWordZeroExword (t, XEiJ.regSRS);  //pcwz。拡張ワード
 21224:       if (w << 31 - 8 < 0) {  //フルフォーマット
 21225:         XEiJ.mpuCycleCount += w << -2 == 0 ? 1 : 3;  //メモリ間接なし:メモリ間接あり
 21226:       }
 21227:       t = (((~w & 0x0180) == 0 ? 0 :  //ベースレジスタサプレス
 21228:             t)  //ベースレジスタ
 21229:            + (w << 31 - 8 >= 0 ? (byte) w :  //バイトディスプレースメント
 21230:               w << 31 - 5 >= 0 ? 0 :  //ヌルベースディスプレースメント
 21231:               w << 31 - 4 >= 0 ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) :  //pcws。ワードベースディスプレースメント
 21232:               mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS)));  //pcls。ロングベースディスプレースメント
 21233:       x = ((~w & 0x0140) == 0 ? 0 :  //インデックスサプレス
 21234:            (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] :  //ワードインデックス
 21235:             XEiJ.regRn[w >> 12])  //ロングインデックス
 21236:            << (w >> 9 & 3));  //スケールファクタ。ワードインデックスのときは符号拡張してから掛ける
 21237:       return ((w & 0x0103) <= 0x0100 ? t + x :  //メモリ間接なし
 21238:               ((XEiJ.TEST_BIT_2_SHIFT ? w << 31 - 2 >= 0 : (w & 4) == 0) ? mmuReadLongData (t + x, XEiJ.regSRS) :  //プリインデックス
 21239:                mmuReadLongData (t, XEiJ.regSRS) + x)  //ポストインデックス
 21240:               + ((XEiJ.TEST_BIT_1_SHIFT ? w << 31 - 1 >= 0 : (w & 2) == 0) ? 0 :  //ヌルアウタディスプレースメント
 21241:                  (XEiJ.TEST_BIT_0_SHIFT ? w << 31 - 0 >= 0 : (w & 1) == 0) ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) :  //pcws。ワードアウタディスプレースメント
 21242:                  mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS)));  //pcls。ロングアウタディスプレースメント
 21243:     case 0b111_100:  //#<data>
 21244:       if (XEiJ.MPU_COMPOUND_POSTINCREMENT) {
 21245:         return (XEiJ.regPC += 8) - 8;
 21246:       } else {
 21247:         t = XEiJ.regPC;
 21248:         XEiJ.regPC = t + 8;
 21249:         return t;
 21250:       }
 21251:     }  //switch
 21252:     M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION;
 21253:     throw M68kException.m6eSignal;
 21254:   }  //efaAnyQuad
 21255: 
 21256:   //a = efaMltQuad (ea)  //|  M+-WXZ  |
 21257:   //  メモリ可変モードのクワッドオペランドの実効アドレスを求める
 21258:   //  efaMltLongとの違いは(Ar)+と-(Ar)がArを8変化させることと、#<data>がPCを8変化させることと、
 21259:   //  オペランドのアクセスが2ワード増える分の8サイクルが追加されていること
 21260:   @SuppressWarnings ("fallthrough") public static int efaMltQuad (int ea) throws M68kException {
 21261:     int t, w, x;
 21262:     switch (ea) {
 21263:     case 0b010_000:  //(A0)
 21264:       if (XEiJ.EFA_SEPARATE_AR) {
 21265:         return XEiJ.regRn[ 8];
 21266:       }
 21267:       //fallthrough
 21268:     case 0b010_001:  //(A1)
 21269:       if (XEiJ.EFA_SEPARATE_AR) {
 21270:         return XEiJ.regRn[ 9];
 21271:       }
 21272:       //fallthrough
 21273:     case 0b010_010:  //(A2)
 21274:       if (XEiJ.EFA_SEPARATE_AR) {
 21275:         return XEiJ.regRn[10];
 21276:       }
 21277:       //fallthrough
 21278:     case 0b010_011:  //(A3)
 21279:       if (XEiJ.EFA_SEPARATE_AR) {
 21280:         return XEiJ.regRn[11];
 21281:       }
 21282:       //fallthrough
 21283:     case 0b010_100:  //(A4)
 21284:       if (XEiJ.EFA_SEPARATE_AR) {
 21285:         return XEiJ.regRn[12];
 21286:       }
 21287:       //fallthrough
 21288:     case 0b010_101:  //(A5)
 21289:       if (XEiJ.EFA_SEPARATE_AR) {
 21290:         return XEiJ.regRn[13];
 21291:       }
 21292:       //fallthrough
 21293:     case 0b010_110:  //(A6)
 21294:       if (XEiJ.EFA_SEPARATE_AR) {
 21295:         return XEiJ.regRn[14];
 21296:       }
 21297:       //fallthrough
 21298:     case 0b010_111:  //(A7)
 21299:       if (XEiJ.EFA_SEPARATE_AR) {
 21300:         return XEiJ.regRn[15];
 21301:       } else {
 21302:         return XEiJ.regRn[ea - (0b010_000 - 8)];
 21303:       }
 21304:     case 0b011_000:  //(A0)+
 21305:       if (XEiJ.EFA_SEPARATE_AR) {
 21306:         M68kException.m6eIncremented += 8L << (0 << 3);
 21307:         return (XEiJ.regRn[ 8] += 8) - 8;
 21308:       }
 21309:       //fallthrough
 21310:     case 0b011_001:  //(A1)+
 21311:       if (XEiJ.EFA_SEPARATE_AR) {
 21312:         M68kException.m6eIncremented += 8L << (1 << 3);
 21313:         return (XEiJ.regRn[ 9] += 8) - 8;
 21314:       }
 21315:       //fallthrough
 21316:     case 0b011_010:  //(A2)+
 21317:       if (XEiJ.EFA_SEPARATE_AR) {
 21318:         M68kException.m6eIncremented += 8L << (2 << 3);
 21319:         return (XEiJ.regRn[10] += 8) - 8;
 21320:       }
 21321:       //fallthrough
 21322:     case 0b011_011:  //(A3)+
 21323:       if (XEiJ.EFA_SEPARATE_AR) {
 21324:         M68kException.m6eIncremented += 8L << (3 << 3);
 21325:         return (XEiJ.regRn[11] += 8) - 8;
 21326:       }
 21327:       //fallthrough
 21328:     case 0b011_100:  //(A4)+
 21329:       if (XEiJ.EFA_SEPARATE_AR) {
 21330:         M68kException.m6eIncremented += 8L << (4 << 3);
 21331:         return (XEiJ.regRn[12] += 8) - 8;
 21332:       }
 21333:       //fallthrough
 21334:     case 0b011_101:  //(A5)+
 21335:       if (XEiJ.EFA_SEPARATE_AR) {
 21336:         M68kException.m6eIncremented += 8L << (5 << 3);
 21337:         return (XEiJ.regRn[13] += 8) - 8;
 21338:       }
 21339:       //fallthrough
 21340:     case 0b011_110:  //(A6)+
 21341:       if (XEiJ.EFA_SEPARATE_AR) {
 21342:         M68kException.m6eIncremented += 8L << (6 << 3);
 21343:         return (XEiJ.regRn[14] += 8) - 8;
 21344:       }
 21345:       //fallthrough
 21346:     case 0b011_111:  //(A7)+
 21347:       if (XEiJ.EFA_SEPARATE_AR) {
 21348:         M68kException.m6eIncremented += 8L << (7 << 3);
 21349:         return (XEiJ.regRn[15] += 8) - 8;
 21350:       } else {
 21351:         M68kException.m6eIncremented += 8L << ((ea & 7) << 3);
 21352:         return (XEiJ.regRn[ea - (0b011_000 - 8)] += 8) - 8;
 21353:       }
 21354:     case 0b100_000:  //-(A0)
 21355:       if (XEiJ.EFA_SEPARATE_AR) {
 21356:         M68kException.m6eIncremented -= 8L << (0 << 3);
 21357:         return XEiJ.regRn[ 8] -= 8;
 21358:       }
 21359:       //fallthrough
 21360:     case 0b100_001:  //-(A1)
 21361:       if (XEiJ.EFA_SEPARATE_AR) {
 21362:         M68kException.m6eIncremented -= 8L << (1 << 3);
 21363:         return XEiJ.regRn[ 9] -= 8;
 21364:       }
 21365:       //fallthrough
 21366:     case 0b100_010:  //-(A2)
 21367:       if (XEiJ.EFA_SEPARATE_AR) {
 21368:         M68kException.m6eIncremented -= 8L << (2 << 3);
 21369:         return XEiJ.regRn[10] -= 8;
 21370:       }
 21371:       //fallthrough
 21372:     case 0b100_011:  //-(A3)
 21373:       if (XEiJ.EFA_SEPARATE_AR) {
 21374:         M68kException.m6eIncremented -= 8L << (3 << 3);
 21375:         return XEiJ.regRn[11] -= 8;
 21376:       }
 21377:       //fallthrough
 21378:     case 0b100_100:  //-(A4)
 21379:       if (XEiJ.EFA_SEPARATE_AR) {
 21380:         M68kException.m6eIncremented -= 8L << (4 << 3);
 21381:         return XEiJ.regRn[12] -= 8;
 21382:       }
 21383:       //fallthrough
 21384:     case 0b100_101:  //-(A5)
 21385:       if (XEiJ.EFA_SEPARATE_AR) {
 21386:         M68kException.m6eIncremented -= 8L << (5 << 3);
 21387:         return XEiJ.regRn[13] -= 8;
 21388:       }
 21389:       //fallthrough
 21390:     case 0b100_110:  //-(A6)
 21391:       if (XEiJ.EFA_SEPARATE_AR) {
 21392:         M68kException.m6eIncremented -= 8L << (6 << 3);
 21393:         return XEiJ.regRn[14] -= 8;
 21394:       }
 21395:       //fallthrough
 21396:     case 0b100_111:  //-(A7)
 21397:       if (XEiJ.EFA_SEPARATE_AR) {
 21398:         M68kException.m6eIncremented -= 8L << (7 << 3);
 21399:         return XEiJ.regRn[15] -= 8;
 21400:       } else {
 21401:         M68kException.m6eIncremented -= 8L << ((ea & 7) << 3);
 21402:         return XEiJ.regRn[ea - (0b100_000 - 8)] -= 8;
 21403:       }
 21404:     case 0b101_000:  //(d16,A0)
 21405:     case 0b101_001:  //(d16,A1)
 21406:     case 0b101_010:  //(d16,A2)
 21407:     case 0b101_011:  //(d16,A3)
 21408:     case 0b101_100:  //(d16,A4)
 21409:     case 0b101_101:  //(d16,A5)
 21410:     case 0b101_110:  //(d16,A6)
 21411:     case 0b101_111:  //(d16,A7)
 21412:       if (XEiJ.MPU_COMPOUND_POSTINCREMENT) {
 21413:         return (XEiJ.regRn[ea - (0b101_000 - 8)]  //ベースレジスタ
 21414:                 + mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS));  //pcws。ワードディスプレースメント
 21415:       } else {
 21416:         t = XEiJ.regPC;
 21417:         XEiJ.regPC = t + 2;
 21418:         return (XEiJ.regRn[ea - (0b101_000 - 8)]  //ベースレジスタ
 21419:                 + mmuReadWordSignExword (t, XEiJ.regSRS));  //pcws。ワードディスプレースメント
 21420:       }
 21421:     case 0b110_000:  //(d8,A0,Rn.wl)
 21422:     case 0b110_001:  //(d8,A1,Rn.wl)
 21423:     case 0b110_010:  //(d8,A2,Rn.wl)
 21424:     case 0b110_011:  //(d8,A3,Rn.wl)
 21425:     case 0b110_100:  //(d8,A4,Rn.wl)
 21426:     case 0b110_101:  //(d8,A5,Rn.wl)
 21427:     case 0b110_110:  //(d8,A6,Rn.wl)
 21428:     case 0b110_111:  //(d8,A7,Rn.wl)
 21429:       if (XEiJ.MPU_COMPOUND_POSTINCREMENT) {
 21430:         w = mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);  //pcwz。拡張ワード
 21431:       } else {
 21432:         w = XEiJ.regPC;
 21433:         XEiJ.regPC = w + 2;
 21434:         w = mmuReadWordZeroExword (w, XEiJ.regSRS);  //pcwz。拡張ワード
 21435:       }
 21436:       if (w << 31 - 8 < 0) {  //フルフォーマット
 21437:         XEiJ.mpuCycleCount += w << -2 == 0 ? 1 : 3;  //メモリ間接なし:メモリ間接あり
 21438:       }
 21439:       t = (((~w & 0x0180) == 0 ? 0 :  //ベースレジスタサプレス
 21440:             XEiJ.regRn[ea - (0b110_000 - 8)])  //ベースレジスタ
 21441:            + (w << 31 - 8 >= 0 ? (byte) w :  //バイトディスプレースメント
 21442:               w << 31 - 5 >= 0 ? 0 :  //ヌルベースディスプレースメント
 21443:               w << 31 - 4 >= 0 ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) :  //pcws。ワードベースディスプレースメント
 21444:               mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS)));  //pcls。ロングベースディスプレースメント
 21445:       x = ((~w & 0x0140) == 0 ? 0 :  //インデックスサプレス
 21446:            (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] :  //ワードインデックス
 21447:             XEiJ.regRn[w >> 12])  //ロングインデックス
 21448:            << (w >> 9 & 3));  //スケールファクタ。ワードインデックスのときは符号拡張してから掛ける
 21449:       return ((w & 0x0103) <= 0x0100 ? t + x :  //メモリ間接なし
 21450:               ((XEiJ.TEST_BIT_2_SHIFT ? w << 31 - 2 >= 0 : (w & 4) == 0) ? mmuReadLongData (t + x, XEiJ.regSRS) :  //プリインデックス
 21451:                mmuReadLongData (t, XEiJ.regSRS) + x)  //ポストインデックス
 21452:               + ((XEiJ.TEST_BIT_1_SHIFT ? w << 31 - 1 >= 0 : (w & 2) == 0) ? 0 :  //ヌルアウタディスプレースメント
 21453:                  (XEiJ.TEST_BIT_0_SHIFT ? w << 31 - 0 >= 0 : (w & 1) == 0) ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) :  //pcws。ワードアウタディスプレースメント
 21454:                  mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS)));  //pcls。ロングアウタディスプレースメント
 21455:     case 0b111_000:  //(xxx).W
 21456:       return mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);  //pcws
 21457:     case 0b111_001:  //(xxx).L
 21458:       return mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS);  //pcls
 21459:     }  //switch
 21460:     M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION;
 21461:     throw M68kException.m6eSignal;
 21462:   }  //efaMltQuad
 21463: 
 21464:   //a = efaAnyExtd (ea)  //|  M+-WXZPI|
 21465:   //  任意のモードのエクステンデッドオペランドの実効アドレスを求める
 21466:   //  efaAnyQuadとの違いは(Ar)+と-(Ar)がArを12変化させることと、#<data>がPCを12変化させることと、
 21467:   //  オペランドのアクセスが2ワード増える分の8サイクルが追加されていること
 21468:   @SuppressWarnings ("fallthrough") public static int efaAnyExtd (int ea) throws M68kException {
 21469:     int t, w, x;
 21470:     switch (ea) {
 21471:     case 0b010_000:  //(A0)
 21472:       if (XEiJ.EFA_SEPARATE_AR) {
 21473:         return XEiJ.regRn[ 8];
 21474:       }
 21475:       //fallthrough
 21476:     case 0b010_001:  //(A1)
 21477:       if (XEiJ.EFA_SEPARATE_AR) {
 21478:         return XEiJ.regRn[ 9];
 21479:       }
 21480:       //fallthrough
 21481:     case 0b010_010:  //(A2)
 21482:       if (XEiJ.EFA_SEPARATE_AR) {
 21483:         return XEiJ.regRn[10];
 21484:       }
 21485:       //fallthrough
 21486:     case 0b010_011:  //(A3)
 21487:       if (XEiJ.EFA_SEPARATE_AR) {
 21488:         return XEiJ.regRn[11];
 21489:       }
 21490:       //fallthrough
 21491:     case 0b010_100:  //(A4)
 21492:       if (XEiJ.EFA_SEPARATE_AR) {
 21493:         return XEiJ.regRn[12];
 21494:       }
 21495:       //fallthrough
 21496:     case 0b010_101:  //(A5)
 21497:       if (XEiJ.EFA_SEPARATE_AR) {
 21498:         return XEiJ.regRn[13];
 21499:       }
 21500:       //fallthrough
 21501:     case 0b010_110:  //(A6)
 21502:       if (XEiJ.EFA_SEPARATE_AR) {
 21503:         return XEiJ.regRn[14];
 21504:       }
 21505:       //fallthrough
 21506:     case 0b010_111:  //(A7)
 21507:       if (XEiJ.EFA_SEPARATE_AR) {
 21508:         return XEiJ.regRn[15];
 21509:       } else {
 21510:         return XEiJ.regRn[ea - (0b010_000 - 8)];
 21511:       }
 21512:     case 0b011_000:  //(A0)+
 21513:       if (XEiJ.EFA_SEPARATE_AR) {
 21514:         M68kException.m6eIncremented += 12L << (0 << 3);
 21515:         return (XEiJ.regRn[ 8] += 12) - 12;
 21516:       }
 21517:       //fallthrough
 21518:     case 0b011_001:  //(A1)+
 21519:       if (XEiJ.EFA_SEPARATE_AR) {
 21520:         M68kException.m6eIncremented += 12L << (1 << 3);
 21521:         return (XEiJ.regRn[ 9] += 12) - 12;
 21522:       }
 21523:       //fallthrough
 21524:     case 0b011_010:  //(A2)+
 21525:       if (XEiJ.EFA_SEPARATE_AR) {
 21526:         M68kException.m6eIncremented += 12L << (2 << 3);
 21527:         return (XEiJ.regRn[10] += 12) - 12;
 21528:       }
 21529:       //fallthrough
 21530:     case 0b011_011:  //(A3)+
 21531:       if (XEiJ.EFA_SEPARATE_AR) {
 21532:         M68kException.m6eIncremented += 12L << (3 << 3);
 21533:         return (XEiJ.regRn[11] += 12) - 12;
 21534:       }
 21535:       //fallthrough
 21536:     case 0b011_100:  //(A4)+
 21537:       if (XEiJ.EFA_SEPARATE_AR) {
 21538:         M68kException.m6eIncremented += 12L << (4 << 3);
 21539:         return (XEiJ.regRn[12] += 12) - 12;
 21540:       }
 21541:       //fallthrough
 21542:     case 0b011_101:  //(A5)+
 21543:       if (XEiJ.EFA_SEPARATE_AR) {
 21544:         M68kException.m6eIncremented += 12L << (5 << 3);
 21545:         return (XEiJ.regRn[13] += 12) - 12;
 21546:       }
 21547:       //fallthrough
 21548:     case 0b011_110:  //(A6)+
 21549:       if (XEiJ.EFA_SEPARATE_AR) {
 21550:         M68kException.m6eIncremented += 12L << (6 << 3);
 21551:         return (XEiJ.regRn[14] += 12) - 12;
 21552:       }
 21553:       //fallthrough
 21554:     case 0b011_111:  //(A7)+
 21555:       if (XEiJ.EFA_SEPARATE_AR) {
 21556:         M68kException.m6eIncremented += 12L << (7 << 3);
 21557:         return (XEiJ.regRn[15] += 12) - 12;
 21558:       } else {
 21559:         M68kException.m6eIncremented += 12L << ((ea & 7) << 3);
 21560:         return (XEiJ.regRn[ea - (0b011_000 - 8)] += 12) - 12;
 21561:       }
 21562:     case 0b100_000:  //-(A0)
 21563:       if (XEiJ.EFA_SEPARATE_AR) {
 21564:         M68kException.m6eIncremented -= 12L << (0 << 3);
 21565:         return XEiJ.regRn[ 8] -= 12;
 21566:       }
 21567:       //fallthrough
 21568:     case 0b100_001:  //-(A1)
 21569:       if (XEiJ.EFA_SEPARATE_AR) {
 21570:         M68kException.m6eIncremented -= 12L << (1 << 3);
 21571:         return XEiJ.regRn[ 9] -= 12;
 21572:       }
 21573:       //fallthrough
 21574:     case 0b100_010:  //-(A2)
 21575:       if (XEiJ.EFA_SEPARATE_AR) {
 21576:         M68kException.m6eIncremented -= 12L << (2 << 3);
 21577:         return XEiJ.regRn[10] -= 12;
 21578:       }
 21579:       //fallthrough
 21580:     case 0b100_011:  //-(A3)
 21581:       if (XEiJ.EFA_SEPARATE_AR) {
 21582:         M68kException.m6eIncremented -= 12L << (3 << 3);
 21583:         return XEiJ.regRn[11] -= 12;
 21584:       }
 21585:       //fallthrough
 21586:     case 0b100_100:  //-(A4)
 21587:       if (XEiJ.EFA_SEPARATE_AR) {
 21588:         M68kException.m6eIncremented -= 12L << (4 << 3);
 21589:         return XEiJ.regRn[12] -= 12;
 21590:       }
 21591:       //fallthrough
 21592:     case 0b100_101:  //-(A5)
 21593:       if (XEiJ.EFA_SEPARATE_AR) {
 21594:         M68kException.m6eIncremented -= 12L << (5 << 3);
 21595:         return XEiJ.regRn[13] -= 12;
 21596:       }
 21597:       //fallthrough
 21598:     case 0b100_110:  //-(A6)
 21599:       if (XEiJ.EFA_SEPARATE_AR) {
 21600:         M68kException.m6eIncremented -= 12L << (6 << 3);
 21601:         return XEiJ.regRn[14] -= 12;
 21602:       }
 21603:       //fallthrough
 21604:     case 0b100_111:  //-(A7)
 21605:       if (XEiJ.EFA_SEPARATE_AR) {
 21606:         M68kException.m6eIncremented -= 12L << (7 << 3);
 21607:         return XEiJ.regRn[15] -= 12;
 21608:       } else {
 21609:         M68kException.m6eIncremented -= 12L << ((ea & 7) << 3);
 21610:         return XEiJ.regRn[ea - (0b100_000 - 8)] -= 12;
 21611:       }
 21612:     case 0b101_000:  //(d16,A0)
 21613:     case 0b101_001:  //(d16,A1)
 21614:     case 0b101_010:  //(d16,A2)
 21615:     case 0b101_011:  //(d16,A3)
 21616:     case 0b101_100:  //(d16,A4)
 21617:     case 0b101_101:  //(d16,A5)
 21618:     case 0b101_110:  //(d16,A6)
 21619:     case 0b101_111:  //(d16,A7)
 21620:       if (XEiJ.MPU_COMPOUND_POSTINCREMENT) {
 21621:         return (XEiJ.regRn[ea - (0b101_000 - 8)]  //ベースレジスタ
 21622:                 + mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS));  //pcws。ワードディスプレースメント
 21623:       } else {
 21624:         t = XEiJ.regPC;
 21625:         XEiJ.regPC = t + 2;
 21626:         return (XEiJ.regRn[ea - (0b101_000 - 8)]  //ベースレジスタ
 21627:                 + mmuReadWordSignExword (t, XEiJ.regSRS));  //pcws。ワードディスプレースメント
 21628:       }
 21629:     case 0b110_000:  //(d8,A0,Rn.wl)
 21630:     case 0b110_001:  //(d8,A1,Rn.wl)
 21631:     case 0b110_010:  //(d8,A2,Rn.wl)
 21632:     case 0b110_011:  //(d8,A3,Rn.wl)
 21633:     case 0b110_100:  //(d8,A4,Rn.wl)
 21634:     case 0b110_101:  //(d8,A5,Rn.wl)
 21635:     case 0b110_110:  //(d8,A6,Rn.wl)
 21636:     case 0b110_111:  //(d8,A7,Rn.wl)
 21637:       if (XEiJ.MPU_COMPOUND_POSTINCREMENT) {
 21638:         w = mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);  //pcwz。拡張ワード
 21639:       } else {
 21640:         w = XEiJ.regPC;
 21641:         XEiJ.regPC = w + 2;
 21642:         w = mmuReadWordZeroExword (w, XEiJ.regSRS);  //pcwz。拡張ワード
 21643:       }
 21644:       if (w << 31 - 8 < 0) {  //フルフォーマット
 21645:         XEiJ.mpuCycleCount += w << -2 == 0 ? 1 : 3;  //メモリ間接なし:メモリ間接あり
 21646:       }
 21647:       t = (((~w & 0x0180) == 0 ? 0 :  //ベースレジスタサプレス
 21648:             XEiJ.regRn[ea - (0b110_000 - 8)])  //ベースレジスタ
 21649:            + (w << 31 - 8 >= 0 ? (byte) w :  //バイトディスプレースメント
 21650:               w << 31 - 5 >= 0 ? 0 :  //ヌルベースディスプレースメント
 21651:               w << 31 - 4 >= 0 ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) :  //pcws。ワードベースディスプレースメント
 21652:               mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS)));  //pcls。ロングベースディスプレースメント
 21653:       x = ((~w & 0x0140) == 0 ? 0 :  //インデックスサプレス
 21654:            (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] :  //ワードインデックス
 21655:             XEiJ.regRn[w >> 12])  //ロングインデックス
 21656:            << (w >> 9 & 3));  //スケールファクタ。ワードインデックスのときは符号拡張してから掛ける
 21657:       return ((w & 0x0103) <= 0x0100 ? t + x :  //メモリ間接なし
 21658:               ((XEiJ.TEST_BIT_2_SHIFT ? w << 31 - 2 >= 0 : (w & 4) == 0) ? mmuReadLongData (t + x, XEiJ.regSRS) :  //プリインデックス
 21659:                mmuReadLongData (t, XEiJ.regSRS) + x)  //ポストインデックス
 21660:               + ((XEiJ.TEST_BIT_1_SHIFT ? w << 31 - 1 >= 0 : (w & 2) == 0) ? 0 :  //ヌルアウタディスプレースメント
 21661:                  (XEiJ.TEST_BIT_0_SHIFT ? w << 31 - 0 >= 0 : (w & 1) == 0) ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) :  //pcws。ワードアウタディスプレースメント
 21662:                  mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS)));  //pcls。ロングアウタディスプレースメント
 21663:     case 0b111_000:  //(xxx).W
 21664:       return mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);  //pcws
 21665:     case 0b111_001:  //(xxx).L
 21666:       return mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS);  //pcls
 21667:     case 0b111_010:  //(d16,PC)
 21668:       t = XEiJ.regPC;
 21669:       XEiJ.regPC = t + 2;
 21670:       return (t  //ベースレジスタ
 21671:               + mmuReadWordSignExword (t, XEiJ.regSRS));  //pcws。ワードディスプレースメント
 21672:     case 0b111_011:  //(d8,PC,Rn.wl)
 21673:       t = XEiJ.regPC;
 21674:       XEiJ.regPC = t + 2;
 21675:       w = mmuReadWordZeroExword (t, XEiJ.regSRS);  //pcwz。拡張ワード
 21676:       if (w << 31 - 8 < 0) {  //フルフォーマット
 21677:         XEiJ.mpuCycleCount += w << -2 == 0 ? 1 : 3;  //メモリ間接なし:メモリ間接あり
 21678:       }
 21679:       t = (((~w & 0x0180) == 0 ? 0 :  //ベースレジスタサプレス
 21680:             t)  //ベースレジスタ
 21681:            + (w << 31 - 8 >= 0 ? (byte) w :  //バイトディスプレースメント
 21682:               w << 31 - 5 >= 0 ? 0 :  //ヌルベースディスプレースメント
 21683:               w << 31 - 4 >= 0 ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) :  //pcws。ワードベースディスプレースメント
 21684:               mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS)));  //pcls。ロングベースディスプレースメント
 21685:       x = ((~w & 0x0140) == 0 ? 0 :  //インデックスサプレス
 21686:            (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] :  //ワードインデックス
 21687:             XEiJ.regRn[w >> 12])  //ロングインデックス
 21688:            << (w >> 9 & 3));  //スケールファクタ。ワードインデックスのときは符号拡張してから掛ける
 21689:       return ((w & 0x0103) <= 0x0100 ? t + x :  //メモリ間接なし
 21690:               ((XEiJ.TEST_BIT_2_SHIFT ? w << 31 - 2 >= 0 : (w & 4) == 0) ? mmuReadLongData (t + x, XEiJ.regSRS) :  //プリインデックス
 21691:                mmuReadLongData (t, XEiJ.regSRS) + x)  //ポストインデックス
 21692:               + ((XEiJ.TEST_BIT_1_SHIFT ? w << 31 - 1 >= 0 : (w & 2) == 0) ? 0 :  //ヌルアウタディスプレースメント
 21693:                  (XEiJ.TEST_BIT_0_SHIFT ? w << 31 - 0 >= 0 : (w & 1) == 0) ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) :  //pcws。ワードアウタディスプレースメント
 21694:                  mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS)));  //pcls。ロングアウタディスプレースメント
 21695:     case 0b111_100:  //#<data>
 21696:       if (XEiJ.MPU_COMPOUND_POSTINCREMENT) {
 21697:         return (XEiJ.regPC += 12) - 12;
 21698:       } else {
 21699:         t = XEiJ.regPC;
 21700:         XEiJ.regPC = t + 12;
 21701:         return t;
 21702:       }
 21703:     }  //switch
 21704:     M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION;
 21705:     throw M68kException.m6eSignal;
 21706:   }  //efaAnyExtd
 21707: 
 21708:   //a = efaMltExtd (ea)  //|  M+-WXZ  |
 21709:   //  メモリ可変モードのエクステンデッドオペランドの実効アドレスを求める
 21710:   //  efaMltQuadとの違いは(Ar)+と-(Ar)がArを12変化させることと、#<data>がPCを12変化させることと、
 21711:   //  オペランドのアクセスが2ワード増える分の8サイクルが追加されていること
 21712:   @SuppressWarnings ("fallthrough") public static int efaMltExtd (int ea) throws M68kException {
 21713:     int t, w, x;
 21714:     switch (ea) {
 21715:     case 0b010_000:  //(A0)
 21716:       if (XEiJ.EFA_SEPARATE_AR) {
 21717:         return XEiJ.regRn[ 8];
 21718:       }
 21719:       //fallthrough
 21720:     case 0b010_001:  //(A1)
 21721:       if (XEiJ.EFA_SEPARATE_AR) {
 21722:         return XEiJ.regRn[ 9];
 21723:       }
 21724:       //fallthrough
 21725:     case 0b010_010:  //(A2)
 21726:       if (XEiJ.EFA_SEPARATE_AR) {
 21727:         return XEiJ.regRn[10];
 21728:       }
 21729:       //fallthrough
 21730:     case 0b010_011:  //(A3)
 21731:       if (XEiJ.EFA_SEPARATE_AR) {
 21732:         return XEiJ.regRn[11];
 21733:       }
 21734:       //fallthrough
 21735:     case 0b010_100:  //(A4)
 21736:       if (XEiJ.EFA_SEPARATE_AR) {
 21737:         return XEiJ.regRn[12];
 21738:       }
 21739:       //fallthrough
 21740:     case 0b010_101:  //(A5)
 21741:       if (XEiJ.EFA_SEPARATE_AR) {
 21742:         return XEiJ.regRn[13];
 21743:       }
 21744:       //fallthrough
 21745:     case 0b010_110:  //(A6)
 21746:       if (XEiJ.EFA_SEPARATE_AR) {
 21747:         return XEiJ.regRn[14];
 21748:       }
 21749:       //fallthrough
 21750:     case 0b010_111:  //(A7)
 21751:       if (XEiJ.EFA_SEPARATE_AR) {
 21752:         return XEiJ.regRn[15];
 21753:       } else {
 21754:         return XEiJ.regRn[ea - (0b010_000 - 8)];
 21755:       }
 21756:     case 0b011_000:  //(A0)+
 21757:       if (XEiJ.EFA_SEPARATE_AR) {
 21758:         M68kException.m6eIncremented += 12L << (0 << 3);
 21759:         return (XEiJ.regRn[ 8] += 12) - 12;
 21760:       }
 21761:       //fallthrough
 21762:     case 0b011_001:  //(A1)+
 21763:       if (XEiJ.EFA_SEPARATE_AR) {
 21764:         M68kException.m6eIncremented += 12L << (1 << 3);
 21765:         return (XEiJ.regRn[ 9] += 12) - 12;
 21766:       }
 21767:       //fallthrough
 21768:     case 0b011_010:  //(A2)+
 21769:       if (XEiJ.EFA_SEPARATE_AR) {
 21770:         M68kException.m6eIncremented += 12L << (2 << 3);
 21771:         return (XEiJ.regRn[10] += 12) - 12;
 21772:       }
 21773:       //fallthrough
 21774:     case 0b011_011:  //(A3)+
 21775:       if (XEiJ.EFA_SEPARATE_AR) {
 21776:         M68kException.m6eIncremented += 12L << (3 << 3);
 21777:         return (XEiJ.regRn[11] += 12) - 12;
 21778:       }
 21779:       //fallthrough
 21780:     case 0b011_100:  //(A4)+
 21781:       if (XEiJ.EFA_SEPARATE_AR) {
 21782:         M68kException.m6eIncremented += 12L << (4 << 3);
 21783:         return (XEiJ.regRn[12] += 12) - 12;
 21784:       }
 21785:       //fallthrough
 21786:     case 0b011_101:  //(A5)+
 21787:       if (XEiJ.EFA_SEPARATE_AR) {
 21788:         M68kException.m6eIncremented += 12L << (5 << 3);
 21789:         return (XEiJ.regRn[13] += 12) - 12;
 21790:       }
 21791:       //fallthrough
 21792:     case 0b011_110:  //(A6)+
 21793:       if (XEiJ.EFA_SEPARATE_AR) {
 21794:         M68kException.m6eIncremented += 12L << (6 << 3);
 21795:         return (XEiJ.regRn[14] += 12) - 12;
 21796:       }
 21797:       //fallthrough
 21798:     case 0b011_111:  //(A7)+
 21799:       if (XEiJ.EFA_SEPARATE_AR) {
 21800:         M68kException.m6eIncremented += 12L << (7 << 3);
 21801:         return (XEiJ.regRn[15] += 12) - 12;
 21802:       } else {
 21803:         M68kException.m6eIncremented += 12L << ((ea & 7) << 3);
 21804:         return (XEiJ.regRn[ea - (0b011_000 - 8)] += 12) - 12;
 21805:       }
 21806:     case 0b100_000:  //-(A0)
 21807:       if (XEiJ.EFA_SEPARATE_AR) {
 21808:         M68kException.m6eIncremented -= 12L << (0 << 3);
 21809:         return XEiJ.regRn[ 8] -= 12;
 21810:       }
 21811:       //fallthrough
 21812:     case 0b100_001:  //-(A1)
 21813:       if (XEiJ.EFA_SEPARATE_AR) {
 21814:         M68kException.m6eIncremented -= 12L << (1 << 3);
 21815:         return XEiJ.regRn[ 9] -= 12;
 21816:       }
 21817:       //fallthrough
 21818:     case 0b100_010:  //-(A2)
 21819:       if (XEiJ.EFA_SEPARATE_AR) {
 21820:         M68kException.m6eIncremented -= 12L << (2 << 3);
 21821:         return XEiJ.regRn[10] -= 12;
 21822:       }
 21823:       //fallthrough
 21824:     case 0b100_011:  //-(A3)
 21825:       if (XEiJ.EFA_SEPARATE_AR) {
 21826:         M68kException.m6eIncremented -= 12L << (3 << 3);
 21827:         return XEiJ.regRn[11] -= 12;
 21828:       }
 21829:       //fallthrough
 21830:     case 0b100_100:  //-(A4)
 21831:       if (XEiJ.EFA_SEPARATE_AR) {
 21832:         M68kException.m6eIncremented -= 12L << (4 << 3);
 21833:         return XEiJ.regRn[12] -= 12;
 21834:       }
 21835:       //fallthrough
 21836:     case 0b100_101:  //-(A5)
 21837:       if (XEiJ.EFA_SEPARATE_AR) {
 21838:         M68kException.m6eIncremented -= 12L << (5 << 3);
 21839:         return XEiJ.regRn[13] -= 12;
 21840:       }
 21841:       //fallthrough
 21842:     case 0b100_110:  //-(A6)
 21843:       if (XEiJ.EFA_SEPARATE_AR) {
 21844:         M68kException.m6eIncremented -= 12L << (6 << 3);
 21845:         return XEiJ.regRn[14] -= 12;
 21846:       }
 21847:       //fallthrough
 21848:     case 0b100_111:  //-(A7)
 21849:       if (XEiJ.EFA_SEPARATE_AR) {
 21850:         M68kException.m6eIncremented -= 12L << (7 << 3);
 21851:         return XEiJ.regRn[15] -= 12;
 21852:       } else {
 21853:         M68kException.m6eIncremented -= 12L << ((ea & 7) << 3);
 21854:         return XEiJ.regRn[ea - (0b100_000 - 8)] -= 12;
 21855:       }
 21856:     case 0b101_000:  //(d16,A0)
 21857:     case 0b101_001:  //(d16,A1)
 21858:     case 0b101_010:  //(d16,A2)
 21859:     case 0b101_011:  //(d16,A3)
 21860:     case 0b101_100:  //(d16,A4)
 21861:     case 0b101_101:  //(d16,A5)
 21862:     case 0b101_110:  //(d16,A6)
 21863:     case 0b101_111:  //(d16,A7)
 21864:       if (XEiJ.MPU_COMPOUND_POSTINCREMENT) {
 21865:         return (XEiJ.regRn[ea - (0b101_000 - 8)]  //ベースレジスタ
 21866:                 + mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS));  //pcws。ワードディスプレースメント
 21867:       } else {
 21868:         t = XEiJ.regPC;
 21869:         XEiJ.regPC = t + 2;
 21870:         return (XEiJ.regRn[ea - (0b101_000 - 8)]  //ベースレジスタ
 21871:                 + mmuReadWordSignExword (t, XEiJ.regSRS));  //pcws。ワードディスプレースメント
 21872:       }
 21873:     case 0b110_000:  //(d8,A0,Rn.wl)
 21874:     case 0b110_001:  //(d8,A1,Rn.wl)
 21875:     case 0b110_010:  //(d8,A2,Rn.wl)
 21876:     case 0b110_011:  //(d8,A3,Rn.wl)
 21877:     case 0b110_100:  //(d8,A4,Rn.wl)
 21878:     case 0b110_101:  //(d8,A5,Rn.wl)
 21879:     case 0b110_110:  //(d8,A6,Rn.wl)
 21880:     case 0b110_111:  //(d8,A7,Rn.wl)
 21881:       if (XEiJ.MPU_COMPOUND_POSTINCREMENT) {
 21882:         w = mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);  //pcwz。拡張ワード
 21883:       } else {
 21884:         w = XEiJ.regPC;
 21885:         XEiJ.regPC = w + 2;
 21886:         w = mmuReadWordZeroExword (w, XEiJ.regSRS);  //pcwz。拡張ワード
 21887:       }
 21888:       if (w << 31 - 8 < 0) {  //フルフォーマット
 21889:         XEiJ.mpuCycleCount += w << -2 == 0 ? 1 : 3;  //メモリ間接なし:メモリ間接あり
 21890:       }
 21891:       t = (((~w & 0x0180) == 0 ? 0 :  //ベースレジスタサプレス
 21892:             XEiJ.regRn[ea - (0b110_000 - 8)])  //ベースレジスタ
 21893:            + (w << 31 - 8 >= 0 ? (byte) w :  //バイトディスプレースメント
 21894:               w << 31 - 5 >= 0 ? 0 :  //ヌルベースディスプレースメント
 21895:               w << 31 - 4 >= 0 ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) :  //pcws。ワードベースディスプレースメント
 21896:               mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS)));  //pcls。ロングベースディスプレースメント
 21897:       x = ((~w & 0x0140) == 0 ? 0 :  //インデックスサプレス
 21898:            (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] :  //ワードインデックス
 21899:             XEiJ.regRn[w >> 12])  //ロングインデックス
 21900:            << (w >> 9 & 3));  //スケールファクタ。ワードインデックスのときは符号拡張してから掛ける
 21901:       return ((w & 0x0103) <= 0x0100 ? t + x :  //メモリ間接なし
 21902:               ((XEiJ.TEST_BIT_2_SHIFT ? w << 31 - 2 >= 0 : (w & 4) == 0) ? mmuReadLongData (t + x, XEiJ.regSRS) :  //プリインデックス
 21903:                mmuReadLongData (t, XEiJ.regSRS) + x)  //ポストインデックス
 21904:               + ((XEiJ.TEST_BIT_1_SHIFT ? w << 31 - 1 >= 0 : (w & 2) == 0) ? 0 :  //ヌルアウタディスプレースメント
 21905:                  (XEiJ.TEST_BIT_0_SHIFT ? w << 31 - 0 >= 0 : (w & 1) == 0) ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) :  //pcws。ワードアウタディスプレースメント
 21906:                  mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS)));  //pcls。ロングアウタディスプレースメント
 21907:     case 0b111_000:  //(xxx).W
 21908:       return mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);  //pcws
 21909:     case 0b111_001:  //(xxx).L
 21910:       return mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS);  //pcls
 21911:     }  //switch
 21912:     M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION;
 21913:     throw M68kException.m6eSignal;
 21914:   }  //efaMltExtd
 21915: 
 21916:   //a = efaLeaPea (ea)  //|  M  WXZP |
 21917:   //  LEA命令とPEA命令のオペランドの実効アドレスを求める
 21918:   //  efaCntWordとの違いはサイクル数のみ
 21919:   //  LEA命令のベースサイクル数4を含んでいるのでLEA命令ではベースサイクル数を加えなくてよい
 21920:   //  PEA命令のベースサイクル数は12-4=8
 21921:   @SuppressWarnings ("fallthrough") public static int efaLeaPea (int ea) throws M68kException {
 21922:     int t, w, x;
 21923:     switch (ea) {
 21924:     case 0b010_000:  //(A0)
 21925:       if (XEiJ.EFA_SEPARATE_AR) {
 21926:         return XEiJ.regRn[ 8];
 21927:       }
 21928:       //fallthrough
 21929:     case 0b010_001:  //(A1)
 21930:       if (XEiJ.EFA_SEPARATE_AR) {
 21931:         return XEiJ.regRn[ 9];
 21932:       }
 21933:       //fallthrough
 21934:     case 0b010_010:  //(A2)
 21935:       if (XEiJ.EFA_SEPARATE_AR) {
 21936:         return XEiJ.regRn[10];
 21937:       }
 21938:       //fallthrough
 21939:     case 0b010_011:  //(A3)
 21940:       if (XEiJ.EFA_SEPARATE_AR) {
 21941:         return XEiJ.regRn[11];
 21942:       }
 21943:       //fallthrough
 21944:     case 0b010_100:  //(A4)
 21945:       if (XEiJ.EFA_SEPARATE_AR) {
 21946:         return XEiJ.regRn[12];
 21947:       }
 21948:       //fallthrough
 21949:     case 0b010_101:  //(A5)
 21950:       if (XEiJ.EFA_SEPARATE_AR) {
 21951:         return XEiJ.regRn[13];
 21952:       }
 21953:       //fallthrough
 21954:     case 0b010_110:  //(A6)
 21955:       if (XEiJ.EFA_SEPARATE_AR) {
 21956:         return XEiJ.regRn[14];
 21957:       }
 21958:       //fallthrough
 21959:     case 0b010_111:  //(A7)
 21960:       if (XEiJ.EFA_SEPARATE_AR) {
 21961:         return XEiJ.regRn[15];
 21962:       } else {
 21963:         return XEiJ.regRn[ea - (0b010_000 - 8)];
 21964:       }
 21965:     case 0b101_000:  //(d16,A0)
 21966:     case 0b101_001:  //(d16,A1)
 21967:     case 0b101_010:  //(d16,A2)
 21968:     case 0b101_011:  //(d16,A3)
 21969:     case 0b101_100:  //(d16,A4)
 21970:     case 0b101_101:  //(d16,A5)
 21971:     case 0b101_110:  //(d16,A6)
 21972:     case 0b101_111:  //(d16,A7)
 21973:       if (XEiJ.MPU_COMPOUND_POSTINCREMENT) {
 21974:         return (XEiJ.regRn[ea - (0b101_000 - 8)]  //ベースレジスタ
 21975:                 + mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS));  //pcws。ワードディスプレースメント
 21976:       } else {
 21977:         t = XEiJ.regPC;
 21978:         XEiJ.regPC = t + 2;
 21979:         return (XEiJ.regRn[ea - (0b101_000 - 8)]  //ベースレジスタ
 21980:                 + mmuReadWordSignExword (t, XEiJ.regSRS));  //pcws。ワードディスプレースメント
 21981:       }
 21982:     case 0b110_000:  //(d8,A0,Rn.wl)
 21983:     case 0b110_001:  //(d8,A1,Rn.wl)
 21984:     case 0b110_010:  //(d8,A2,Rn.wl)
 21985:     case 0b110_011:  //(d8,A3,Rn.wl)
 21986:     case 0b110_100:  //(d8,A4,Rn.wl)
 21987:     case 0b110_101:  //(d8,A5,Rn.wl)
 21988:     case 0b110_110:  //(d8,A6,Rn.wl)
 21989:     case 0b110_111:  //(d8,A7,Rn.wl)
 21990:       if (XEiJ.MPU_COMPOUND_POSTINCREMENT) {
 21991:         w = mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);  //pcwz。拡張ワード
 21992:       } else {
 21993:         w = XEiJ.regPC;
 21994:         XEiJ.regPC = w + 2;
 21995:         w = mmuReadWordZeroExword (w, XEiJ.regSRS);  //pcwz。拡張ワード
 21996:       }
 21997:       if (w << 31 - 8 < 0) {  //フルフォーマット
 21998:         XEiJ.mpuCycleCount += w << -2 == 0 ? 1 : 3;  //メモリ間接なし:メモリ間接あり
 21999:       }
 22000:       t = (((~w & 0x0180) == 0 ? 0 :  //ベースレジスタサプレス
 22001:             XEiJ.regRn[ea - (0b110_000 - 8)])  //ベースレジスタ
 22002:            + (w << 31 - 8 >= 0 ? (byte) w :  //バイトディスプレースメント
 22003:               w << 31 - 5 >= 0 ? 0 :  //ヌルベースディスプレースメント
 22004:               w << 31 - 4 >= 0 ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) :  //pcws。ワードベースディスプレースメント
 22005:               mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS)));  //pcls。ロングベースディスプレースメント
 22006:       x = ((~w & 0x0140) == 0 ? 0 :  //インデックスサプレス
 22007:            (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] :  //ワードインデックス
 22008:             XEiJ.regRn[w >> 12])  //ロングインデックス
 22009:            << (w >> 9 & 3));  //スケールファクタ。ワードインデックスのときは符号拡張してから掛ける
 22010:       return ((w & 0x0103) <= 0x0100 ? t + x :  //メモリ間接なし
 22011:               ((XEiJ.TEST_BIT_2_SHIFT ? w << 31 - 2 >= 0 : (w & 4) == 0) ? mmuReadLongData (t + x, XEiJ.regSRS) :  //プリインデックス
 22012:                mmuReadLongData (t, XEiJ.regSRS) + x)  //ポストインデックス
 22013:               + ((XEiJ.TEST_BIT_1_SHIFT ? w << 31 - 1 >= 0 : (w & 2) == 0) ? 0 :  //ヌルアウタディスプレースメント
 22014:                  (XEiJ.TEST_BIT_0_SHIFT ? w << 31 - 0 >= 0 : (w & 1) == 0) ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) :  //pcws。ワードアウタディスプレースメント
 22015:                  mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS)));  //pcls。ロングアウタディスプレースメント
 22016:     case 0b111_000:  //(xxx).W
 22017:       return mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);  //pcws
 22018:     case 0b111_001:  //(xxx).L
 22019:       return mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS);  //pcls
 22020:     case 0b111_010:  //(d16,PC)
 22021:       t = XEiJ.regPC;
 22022:       XEiJ.regPC = t + 2;
 22023:       return (t  //ベースレジスタ
 22024:               + mmuReadWordSignExword (t, XEiJ.regSRS));  //pcws。ワードディスプレースメント
 22025:     case 0b111_011:  //(d8,PC,Rn.wl)
 22026:       t = XEiJ.regPC;
 22027:       XEiJ.regPC = t + 2;
 22028:       w = mmuReadWordZeroExword (t, XEiJ.regSRS);  //pcwz。拡張ワード
 22029:       if (w << 31 - 8 < 0) {  //フルフォーマット
 22030:         XEiJ.mpuCycleCount += w << -2 == 0 ? 1 : 3;  //メモリ間接なし:メモリ間接あり
 22031:       }
 22032:       t = (((~w & 0x0180) == 0 ? 0 :  //ベースレジスタサプレス
 22033:             t)  //ベースレジスタ
 22034:            + (w << 31 - 8 >= 0 ? (byte) w :  //バイトディスプレースメント
 22035:               w << 31 - 5 >= 0 ? 0 :  //ヌルベースディスプレースメント
 22036:               w << 31 - 4 >= 0 ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) :  //pcws。ワードベースディスプレースメント
 22037:               mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS)));  //pcls。ロングベースディスプレースメント
 22038:       x = ((~w & 0x0140) == 0 ? 0 :  //インデックスサプレス
 22039:            (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] :  //ワードインデックス
 22040:             XEiJ.regRn[w >> 12])  //ロングインデックス
 22041:            << (w >> 9 & 3));  //スケールファクタ。ワードインデックスのときは符号拡張してから掛ける
 22042:       return ((w & 0x0103) <= 0x0100 ? t + x :  //メモリ間接なし
 22043:               ((XEiJ.TEST_BIT_2_SHIFT ? w << 31 - 2 >= 0 : (w & 4) == 0) ? mmuReadLongData (t + x, XEiJ.regSRS) :  //プリインデックス
 22044:                mmuReadLongData (t, XEiJ.regSRS) + x)  //ポストインデックス
 22045:               + ((XEiJ.TEST_BIT_1_SHIFT ? w << 31 - 1 >= 0 : (w & 2) == 0) ? 0 :  //ヌルアウタディスプレースメント
 22046:                  (XEiJ.TEST_BIT_0_SHIFT ? w << 31 - 0 >= 0 : (w & 1) == 0) ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) :  //pcws。ワードアウタディスプレースメント
 22047:                  mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS)));  //pcls。ロングアウタディスプレースメント
 22048:     }  //switch
 22049:     M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION;
 22050:     throw M68kException.m6eSignal;
 22051:   }  //efaLeaPea
 22052: 
 22053:   //a = efaJmpJsr (ea)  //|  M  WXZP |
 22054:   //  JMP命令とJSR命令のオペランドの実効アドレスを求める
 22055:   //  efaCntWordとの違いはサイクル数のみ
 22056:   //  JMP命令のベースサイクル数8を含んでいるのでJMP命令ではベースサイクル数を加えなくてよい
 22057:   //  JSR命令のベースサイクル数は16-8=8
 22058:   @SuppressWarnings ("fallthrough") public static int efaJmpJsr (int ea) throws M68kException {
 22059:     int t, w, x;
 22060:     switch (ea) {
 22061:     case 0b010_000:  //(A0)
 22062:       if (XEiJ.EFA_SEPARATE_AR) {
 22063:         return XEiJ.regRn[ 8];
 22064:       }
 22065:       //fallthrough
 22066:     case 0b010_001:  //(A1)
 22067:       if (XEiJ.EFA_SEPARATE_AR) {
 22068:         return XEiJ.regRn[ 9];
 22069:       }
 22070:       //fallthrough
 22071:     case 0b010_010:  //(A2)
 22072:       if (XEiJ.EFA_SEPARATE_AR) {
 22073:         return XEiJ.regRn[10];
 22074:       }
 22075:       //fallthrough
 22076:     case 0b010_011:  //(A3)
 22077:       if (XEiJ.EFA_SEPARATE_AR) {
 22078:         return XEiJ.regRn[11];
 22079:       }
 22080:       //fallthrough
 22081:     case 0b010_100:  //(A4)
 22082:       if (XEiJ.EFA_SEPARATE_AR) {
 22083:         return XEiJ.regRn[12];
 22084:       }
 22085:       //fallthrough
 22086:     case 0b010_101:  //(A5)
 22087:       if (XEiJ.EFA_SEPARATE_AR) {
 22088:         return XEiJ.regRn[13];
 22089:       }
 22090:       //fallthrough
 22091:     case 0b010_110:  //(A6)
 22092:       if (XEiJ.EFA_SEPARATE_AR) {
 22093:         return XEiJ.regRn[14];
 22094:       }
 22095:       //fallthrough
 22096:     case 0b010_111:  //(A7)
 22097:       if (XEiJ.EFA_SEPARATE_AR) {
 22098:         return XEiJ.regRn[15];
 22099:       } else {
 22100:         return XEiJ.regRn[ea - (0b010_000 - 8)];
 22101:       }
 22102:     case 0b101_000:  //(d16,A0)
 22103:     case 0b101_001:  //(d16,A1)
 22104:     case 0b101_010:  //(d16,A2)
 22105:     case 0b101_011:  //(d16,A3)
 22106:     case 0b101_100:  //(d16,A4)
 22107:     case 0b101_101:  //(d16,A5)
 22108:     case 0b101_110:  //(d16,A6)
 22109:     case 0b101_111:  //(d16,A7)
 22110:       if (XEiJ.MPU_COMPOUND_POSTINCREMENT) {
 22111:         return (XEiJ.regRn[ea - (0b101_000 - 8)]  //ベースレジスタ
 22112:                 + mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS));  //pcws。ワードディスプレースメント
 22113:       } else {
 22114:         t = XEiJ.regPC;
 22115:         XEiJ.regPC = t + 2;
 22116:         return (XEiJ.regRn[ea - (0b101_000 - 8)]  //ベースレジスタ
 22117:                 + mmuReadWordSignExword (t, XEiJ.regSRS));  //pcws。ワードディスプレースメント
 22118:       }
 22119:     case 0b110_000:  //(d8,A0,Rn.wl)
 22120:     case 0b110_001:  //(d8,A1,Rn.wl)
 22121:     case 0b110_010:  //(d8,A2,Rn.wl)
 22122:     case 0b110_011:  //(d8,A3,Rn.wl)
 22123:     case 0b110_100:  //(d8,A4,Rn.wl)
 22124:     case 0b110_101:  //(d8,A5,Rn.wl)
 22125:     case 0b110_110:  //(d8,A6,Rn.wl)
 22126:     case 0b110_111:  //(d8,A7,Rn.wl)
 22127:       if (XEiJ.MPU_COMPOUND_POSTINCREMENT) {
 22128:         w = mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);  //pcwz。拡張ワード
 22129:       } else {
 22130:         w = XEiJ.regPC;
 22131:         XEiJ.regPC = w + 2;
 22132:         w = mmuReadWordZeroExword (w, XEiJ.regSRS);  //pcwz。拡張ワード
 22133:       }
 22134:       if (w << 31 - 8 < 0) {  //フルフォーマット
 22135:         XEiJ.mpuCycleCount += w << -2 == 0 ? 1 : 3;  //メモリ間接なし:メモリ間接あり
 22136:       }
 22137:       t = (((~w & 0x0180) == 0 ? 0 :  //ベースレジスタサプレス
 22138:             XEiJ.regRn[ea - (0b110_000 - 8)])  //ベースレジスタ
 22139:            + (w << 31 - 8 >= 0 ? (byte) w :  //バイトディスプレースメント
 22140:               w << 31 - 5 >= 0 ? 0 :  //ヌルベースディスプレースメント
 22141:               w << 31 - 4 >= 0 ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) :  //pcws。ワードベースディスプレースメント
 22142:               mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS)));  //pcls。ロングベースディスプレースメント
 22143:       x = ((~w & 0x0140) == 0 ? 0 :  //インデックスサプレス
 22144:            (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] :  //ワードインデックス
 22145:             XEiJ.regRn[w >> 12])  //ロングインデックス
 22146:            << (w >> 9 & 3));  //スケールファクタ。ワードインデックスのときは符号拡張してから掛ける
 22147:       return ((w & 0x0103) <= 0x0100 ? t + x :  //メモリ間接なし
 22148:               ((XEiJ.TEST_BIT_2_SHIFT ? w << 31 - 2 >= 0 : (w & 4) == 0) ? mmuReadLongData (t + x, XEiJ.regSRS) :  //プリインデックス
 22149:                mmuReadLongData (t, XEiJ.regSRS) + x)  //ポストインデックス
 22150:               + ((XEiJ.TEST_BIT_1_SHIFT ? w << 31 - 1 >= 0 : (w & 2) == 0) ? 0 :  //ヌルアウタディスプレースメント
 22151:                  (XEiJ.TEST_BIT_0_SHIFT ? w << 31 - 0 >= 0 : (w & 1) == 0) ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) :  //pcws。ワードアウタディスプレースメント
 22152:                  mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS)));  //pcls。ロングアウタディスプレースメント
 22153:     case 0b111_000:  //(xxx).W
 22154:       return mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);  //pcws
 22155:     case 0b111_001:  //(xxx).L
 22156:       return mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS);  //pcls
 22157:     case 0b111_010:  //(d16,PC)
 22158:       t = XEiJ.regPC;
 22159:       XEiJ.regPC = t + 2;
 22160:       return (t  //ベースレジスタ
 22161:               + mmuReadWordSignExword (t, XEiJ.regSRS));  //pcws。ワードディスプレースメント
 22162:     case 0b111_011:  //(d8,PC,Rn.wl)
 22163:       t = XEiJ.regPC;
 22164:       XEiJ.regPC = t + 2;
 22165:       w = mmuReadWordZeroExword (t, XEiJ.regSRS);  //pcwz。拡張ワード
 22166:       if (w << 31 - 8 < 0) {  //フルフォーマット
 22167:         XEiJ.mpuCycleCount += w << -2 == 0 ? 1 : 3;  //メモリ間接なし:メモリ間接あり
 22168:       }
 22169:       t = (((~w & 0x0180) == 0 ? 0 :  //ベースレジスタサプレス
 22170:             t)  //ベースレジスタ
 22171:            + (w << 31 - 8 >= 0 ? (byte) w :  //バイトディスプレースメント
 22172:               w << 31 - 5 >= 0 ? 0 :  //ヌルベースディスプレースメント
 22173:               w << 31 - 4 >= 0 ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) :  //pcws。ワードベースディスプレースメント
 22174:               mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS)));  //pcls。ロングベースディスプレースメント
 22175:       x = ((~w & 0x0140) == 0 ? 0 :  //インデックスサプレス
 22176:            (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] :  //ワードインデックス
 22177:             XEiJ.regRn[w >> 12])  //ロングインデックス
 22178:            << (w >> 9 & 3));  //スケールファクタ。ワードインデックスのときは符号拡張してから掛ける
 22179:       return ((w & 0x0103) <= 0x0100 ? t + x :  //メモリ間接なし
 22180:               ((XEiJ.TEST_BIT_2_SHIFT ? w << 31 - 2 >= 0 : (w & 4) == 0) ? mmuReadLongData (t + x, XEiJ.regSRS) :  //プリインデックス
 22181:                mmuReadLongData (t, XEiJ.regSRS) + x)  //ポストインデックス
 22182:               + ((XEiJ.TEST_BIT_1_SHIFT ? w << 31 - 1 >= 0 : (w & 2) == 0) ? 0 :  //ヌルアウタディスプレースメント
 22183:                  (XEiJ.TEST_BIT_0_SHIFT ? w << 31 - 0 >= 0 : (w & 1) == 0) ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) :  //pcws。ワードアウタディスプレースメント
 22184:                  mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS)));  //pcls。ロングアウタディスプレースメント
 22185:     }  //switch
 22186:     M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION;
 22187:     throw M68kException.m6eSignal;
 22188:   }  //efaJmpJsr
 22189: 
 22190: 
 22191: 
 22192:   //fpkSTOL ()
 22193:   //  $FE10  __STOL
 22194:   //  10進数の文字列を32bit符号あり整数に変換する
 22195:   //  /^[ \t]*[-+]?[0-9]+/
 22196:   //  先頭の'\t'と' 'を読み飛ばす
 22197:   //  <a0.l:10進数の文字列の先頭
 22198:   //  >d0.l:32bit符号あり整数
 22199:   //  >a0.l:10進数の文字列の直後('\0'とは限らない)
 22200:   //  >ccr:0=エラーなし,CCR_N|CCR_C=文法エラー,CCR_V|CCR_C=オーバーフロー
 22201:   public static void fpkSTOL () throws M68kException {
 22202:     int a = XEiJ.regRn[8];  //a0
 22203:     int c = mmuReadByteZeroData (a, 1);
 22204:     while (c == ' ' || c == '\t') {
 22205:       c = mmuReadByteZeroData (++a, 1);
 22206:     }
 22207:     int n = '7';  //'7'=正,'8'=負
 22208:     if (c == '-') {  //負
 22209:       n = '8';
 22210:       c = mmuReadByteZeroData (++a, 1);
 22211:     } else if (c == '+') {  //正
 22212:       c = mmuReadByteZeroData (++a, 1);
 22213:     }
 22214:     if (!('0' <= c && c <= '9')) {  //数字が1つもない
 22215:       XEiJ.regRn[8] = a;  //a0
 22216:       XEiJ.regCCR = XEiJ.REG_CCR_N | XEiJ.REG_CCR_C;
 22217:       return;
 22218:     }
 22219:     int x = c - '0';  //値
 22220:     for (c = mmuReadByteZeroData (++a, 1); '0' <= c && c <= '9'; c = mmuReadByteZeroData (++a, 1)) {
 22221:       if (214748364 < x || x == 214748364 && n < c) {  //正のとき2147483647、負のとき2147483648より大きくなるときオーバーフロー
 22222:         XEiJ.regRn[8] = a;  //a0
 22223:         XEiJ.regCCR = XEiJ.REG_CCR_V | XEiJ.REG_CCR_C;
 22224:         return;
 22225:       }
 22226:       x = x * 10 + (c - '0');
 22227:     }
 22228:     if (n != '7') {  //負
 22229:       x = -x;
 22230:     }
 22231:     XEiJ.regRn[0] = x;  //d0
 22232:     XEiJ.regRn[8] = a;  //a0
 22233:     XEiJ.regCCR = 0;
 22234:   }  //fpkSTOL()
 22235: 
 22236:   //fpkLTOS ()
 22237:   //  $FE11  __LTOS
 22238:   //  32bit符号あり整数を10進数の文字列に変換する
 22239:   //  /^-?[1-9][0-9]*$/
 22240:   //  <d0.l:32bit符号あり整数
 22241:   //  <a0.l:文字列バッファの先頭
 22242:   //  >a0.l:10進数の文字列の直後('\0'の位置)
 22243:   public static void fpkLTOS () throws M68kException {
 22244:     int x = XEiJ.regRn[0];  //d0
 22245:     int a = XEiJ.regRn[8];  //a0
 22246:     if (x < 0) {  //負
 22247:       mmuWriteByteData (a++, '-', 1);
 22248:       x = -x;
 22249:     }
 22250:     long t = XEiJ.fmtBcd12 (0xffffffffL & x);  //符号は取り除いてあるがx=0x80000000の場合があるので(long)xは不可
 22251:     XEiJ.regRn[8] = a += Math.max (1, 67 - Long.numberOfLeadingZeros (t) >> 2);  //a0
 22252:     mmuWriteByteData (a, 0, 1);
 22253:     do {
 22254:       mmuWriteByteData (--a, '0' | (int) t & 15, 1);
 22255:     } while ((t >>>= 4) != 0L);
 22256:   }  //fpkLTOS()
 22257: 
 22258:   //fpkSTOH ()
 22259:   //  $FE12  __STOH
 22260:   //  16進数の文字列を32bit符号なし整数に変換する
 22261:   //  /^[0-9A-Fa-f]+/
 22262:   //  <a0.l:16進数の文字列の先頭
 22263:   //  >d0.l:32bit符号なし整数
 22264:   //  >a0.l:16進数の文字列の直後('\0'とは限らない)
 22265:   //  >ccr:0=エラーなし,CCR_N|CCR_C=文法エラー,CCR_V|CCR_C=オーバーフロー
 22266:   public static void fpkSTOH () throws M68kException {
 22267:     int a = XEiJ.regRn[8];  //a0
 22268:     int c = mmuReadByteZeroData (a, 1);
 22269:     if (!('0' <= c && c <= '9' || 'A' <= c && c <= 'F' || 'a' <= c && c <= 'f')) {  //数字が1つもない
 22270:       XEiJ.regRn[8] = a;  //a0
 22271:       XEiJ.regCCR = XEiJ.REG_CCR_N | XEiJ.REG_CCR_C;
 22272:       return;
 22273:     }
 22274:     int x = c <= '9' ? c - '0' : c <= 'F' ? c - ('A' - 10) : c - ('a' - 10);  //値
 22275:     for (c = mmuReadByteZeroData (++a, 1); '0' <= c && c <= '9' || 'A' <= c && c <= 'F' || 'a' <= c && c <= 'f'; c = mmuReadByteZeroData (++a, 1)) {
 22276:       if (0x0fffffff < x) {  //0xffffffffより大きくなるときオーバーフロー
 22277:         XEiJ.regRn[8] = a;  //a0
 22278:         XEiJ.regCCR = XEiJ.REG_CCR_V | XEiJ.REG_CCR_C;
 22279:         return;
 22280:       }
 22281:       x = x << 4 | (c <= '9' ? c - '0' : c <= 'F' ? c - ('A' - 10) : c - ('a' - 10));
 22282:     }
 22283:     XEiJ.regRn[0] = x;  //d0
 22284:     XEiJ.regRn[8] = a;  //a0
 22285:     XEiJ.regCCR = 0;
 22286:   }  //fpkSTOH()
 22287: 
 22288:   //fpkHTOS ()
 22289:   //  $FE13  __HTOS
 22290:   //  32bit符号なし整数を16進数の文字列に変換する
 22291:   //  /^[1-9A-F][0-9A-F]*$/
 22292:   //  <d0.l:32bit符号なし整数
 22293:   //  <a0.l:文字列バッファの先頭
 22294:   //  >a0.l:16進数の文字列の直後('\0'の位置)
 22295:   public static void fpkHTOS () throws M68kException {
 22296:     int x = XEiJ.regRn[0];  //d0
 22297:     int a = XEiJ.regRn[8] += Math.max (1, 35 - Integer.numberOfLeadingZeros (x) >> 2);  //a0
 22298:     mmuWriteByteData (a, 0, 1);
 22299:     do {
 22300:       int t = x & 15;
 22301:       //     t             00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f
 22302:       //   9-t             09 08 07 06 05 04 03 02 01 00 ff fe fd fc fb fa
 22303:       //   9-t>>4          00 00 00 00 00 00 00 00 00 00 ff ff ff ff ff ff
 22304:       //   9-t>>4&7        00 00 00 00 00 00 00 00 00 00 07 07 07 07 07 07
 22305:       //   9-t>>4&7|48     30 30 30 30 30 30 30 30 30 30 37 37 37 37 37 37
 22306:       //  (9-t>>4&7|48)+t  30 31 32 33 34 35 36 37 38 39 41 42 43 44 45 46
 22307:       //                    0  1  2  3  4  5  6  7  8  9  A  B  C  D  E  F
 22308:       mmuWriteByteData (--a, (9 - t >> 4 & 7 | 48) + t, 1);
 22309:     } while ((x >>>= 4) != 0);
 22310:   }  //fpkHTOS()
 22311: 
 22312:   //fpkSTOO ()
 22313:   //  $FE14  __STOO
 22314:   //  8進数の文字列を32bit符号なし整数に変換する
 22315:   //  /^[0-7]+/
 22316:   //  <a0.l:8進数の文字列の先頭
 22317:   //  >d0.l:32bit符号なし整数
 22318:   //  >a0.l:8進数の文字列の直後('\0'とは限らない)
 22319:   //  >ccr:0=エラーなし,CCR_N|CCR_C=文法エラー,CCR_V|CCR_C=オーバーフロー
 22320:   public static void fpkSTOO () throws M68kException {
 22321:     int a = XEiJ.regRn[8];  //a0
 22322:     int c = mmuReadByteZeroData (a, 1);
 22323:     if (!('0' <= c && c <= '7')) {  //数字が1つもない
 22324:       XEiJ.regRn[8] = a;  //a0
 22325:       XEiJ.regCCR = XEiJ.REG_CCR_N | XEiJ.REG_CCR_C;
 22326:       return;
 22327:     }
 22328:     int x = c - '0';  //値
 22329:     for (c = mmuReadByteZeroData (++a, 1); '0' <= c && c <= '7'; c = mmuReadByteZeroData (++a, 1)) {
 22330:       if (0x1fffffff < x) {  //0xffffffffより大きくなるときオーバーフロー
 22331:         XEiJ.regRn[8] = a;  //a0
 22332:         XEiJ.regCCR = XEiJ.REG_CCR_V | XEiJ.REG_CCR_C;
 22333:         return;
 22334:       }
 22335:       x = x << 3 | c & 7;
 22336:     }
 22337:     XEiJ.regRn[0] = x;  //d0
 22338:     XEiJ.regRn[8] = a;  //a0
 22339:     XEiJ.regCCR = 0;
 22340:   }  //fpkSTOO()
 22341: 
 22342:   //fpkOTOS ()
 22343:   //  $FE15  __OTOS
 22344:   //  32bit符号なし整数を8進数の文字列に変換する
 22345:   //  /^[1-7][0-7]*$/
 22346:   //  <d0.l:32bit符号なし整数
 22347:   //  <a0.l:文字列バッファの先頭
 22348:   //  >a0.l:8進数の文字列の直後('\0'の位置)
 22349:   public static void fpkOTOS () throws M68kException {
 22350:     int x = XEiJ.regRn[0];  //d0
 22351:     //perl optdiv.pl 34 3
 22352:     //  x/3==x*43>>>7 (0<=x<=127) [34*43==1462]
 22353:     int a = XEiJ.regRn[8] += Math.max (1, (34 - Integer.numberOfLeadingZeros (x)) * 43 >>> 7);  //a0
 22354:     mmuWriteByteData (a, 0, 1);
 22355:     do {
 22356:       mmuWriteByteData (--a, '0' | x & 7, 1);
 22357:     } while ((x >>>= 3) != 0);
 22358:   }  //fpkOTOS()
 22359: 
 22360:   //fpkSTOB ()
 22361:   //  $FE16  __STOB
 22362:   //  2進数の文字列を32bit符号なし整数に変換する
 22363:   //  /^[01]+/
 22364:   //  <a0.l:2進数の文字列の先頭
 22365:   //  >d0.l:32bit符号なし整数
 22366:   //  >a0.l:2進数の文字列の直後('\0'とは限らない)
 22367:   //  >ccr:0=エラーなし,CCR_N|CCR_C=文法エラー,CCR_V|CCR_C=オーバーフロー
 22368:   public static void fpkSTOB () throws M68kException {
 22369:     int a = XEiJ.regRn[8];  //a0
 22370:     int c = mmuReadByteZeroData (a, 1);
 22371:     if (!('0' <= c && c <= '1')) {  //数字が1つもない
 22372:       XEiJ.regRn[8] = a;  //a0
 22373:       XEiJ.regCCR = XEiJ.REG_CCR_N | XEiJ.REG_CCR_C;
 22374:       return;
 22375:     }
 22376:     int x = c - '0';  //値
 22377:     for (c = mmuReadByteZeroData (++a, 1); '0' <= c && c <= '1'; c = mmuReadByteZeroData (++a, 1)) {
 22378:       if (x < 0) {  //オーバーフロー
 22379:         XEiJ.regRn[8] = a;  //a0
 22380:         XEiJ.regCCR = XEiJ.REG_CCR_V | XEiJ.REG_CCR_C;
 22381:         return;
 22382:       }
 22383:       x = x << 1 | c & 1;
 22384:     }
 22385:     XEiJ.regRn[0] = x;  //d0
 22386:     XEiJ.regRn[8] = a;  //a0
 22387:     XEiJ.regCCR = 0;
 22388:   }  //fpkSTOB()
 22389: 
 22390:   //fpkBTOS ()
 22391:   //  $FE17  __BTOS
 22392:   //  32bit符号なし整数を2進数の文字列に変換する
 22393:   //  /^1[01]*$/
 22394:   //  <d0.l:32bit符号なし整数
 22395:   //  <a0.l:文字列バッファの先頭
 22396:   //  >a0.l:2進数の文字列の直後('\0'の位置)
 22397:   public static void fpkBTOS () throws M68kException {
 22398:     int x = XEiJ.regRn[0];  //d0
 22399:     int a = XEiJ.regRn[8] += Math.max (1, 32 - Integer.numberOfLeadingZeros (x));  //a0
 22400:     mmuWriteByteData (a, 0, 1);
 22401:     do {
 22402:       mmuWriteByteData (--a, '0' | x & 1, 1);
 22403:     } while ((x >>>= 1) != 0);
 22404:   }  //fpkBTOS()
 22405: 
 22406:   //fpkIUSING ()
 22407:   //  $FE18  __IUSING
 22408:   //  32bit符号あり整数を文字数を指定して右詰めで10進数の文字列に変換する
 22409:   //  /^ *-?[1-9][0-9]*$/
 22410:   //  <d0.l:32bit符号あり整数
 22411:   //  <d1.b:文字数
 22412:   //  <a0.l:文字列バッファの先頭
 22413:   //  >a0.l:10進数の文字列の直後('\0'の位置)
 22414:   public static void fpkIUSING () throws M68kException {
 22415:     int x = XEiJ.regRn[0];  //d0
 22416:     int n = 0;  //符号の文字数
 22417:     if (x < 0) {  //負
 22418:       n = 1;
 22419:       x = -x;
 22420:     }
 22421:     long t = XEiJ.fmtBcd12 (0xffffffffL & x);  //符号は取り除いてあるがx=0x80000000の場合があるので(long)xは不可
 22422:     int l = n + Math.max (1, 67 - Long.numberOfLeadingZeros (t) >> 2);  //符号を含めた文字数
 22423:     int a = XEiJ.regRn[8];  //a0
 22424:     for (int i = (XEiJ.regRn[1] & 255) - l; i > 0; i--) {
 22425:       mmuWriteByteData (a++, ' ', 1);
 22426:     }
 22427:     XEiJ.regRn[8] = a += l;  //a0
 22428:     mmuWriteByteData (a, 0, 1);
 22429:     do {
 22430:       mmuWriteByteData (--a, '0' | (int) t & 15, 1);
 22431:     } while ((t >>>= 4) != 0L);
 22432:     if (n != 0) {
 22433:       mmuWriteByteData (--a, '-', 1);
 22434:     }
 22435:   }  //fpkIUSING()
 22436: 
 22437:   //fpkVAL ()
 22438:   //  $FE20  __VAL
 22439:   //  文字列を64bit浮動小数点数に変換する
 22440:   //  先頭の'\t'と' 'を読み飛ばす
 22441:   //  "&B"または"&b"で始まっているときは続きを2進数とみなして__STOBで32bit符号なし整数に変換してから__LTODで64bit浮動小数点数に変換する
 22442:   //  "&O"または"&o"で始まっているときは続きを8進数とみなして__STOOで32bit符号なし整数に変換してから__LTODで64bit浮動小数点数に変換する
 22443:   //  "&H"または"&h"で始まっているときは続きを16進数とみなして__STOHで32bit符号なし整数に変換してから__LTODで64bit浮動小数点数に変換する
 22444:   //  それ以外は__STODと同じ
 22445:   //  <a0.l:文字列の先頭
 22446:   //  >d0d1.d:64bit浮動小数点数
 22447:   //  >d2.l:(先頭が'&'でないとき)65535=64bit浮動小数点数をオーバーフローなしでintに変換できる,0=それ以外
 22448:   //  >d3.l:(先頭が'&'でないとき)d2.l==65535のとき64bit浮動小数点数をintに変換した値
 22449:   //  >a0.l:変換された文字列の直後('\0'とは限らない)
 22450:   //  >ccr:0=エラーなし,CCR_N|CCR_C=文法エラー,CCR_V|CCR_C=オーバーフロー
 22451:   public static void fpkVAL () throws M68kException {
 22452:     int a = XEiJ.regRn[8];  //a0
 22453:     //先頭の空白を読み飛ばす
 22454:     int c = mmuReadByteSignData (a++, 1);
 22455:     while (c == ' ' || c == '\t') {
 22456:       c = mmuReadByteSignData (a++, 1);
 22457:     }
 22458:     if (c == '&') {  //&B,&O,&H
 22459:       c = mmuReadByteSignData (a++, 1) & 0xdf;
 22460:       XEiJ.regRn[8] = a;  //&?の直後
 22461:       if (c == 'B') {
 22462:         fpkSTOB ();
 22463:         FEFunction.fpkLTOD ();
 22464:       } else if (c == 'O') {
 22465:         fpkSTOO ();
 22466:         FEFunction.fpkLTOD ();
 22467:       } else if (c == 'H') {
 22468:         fpkSTOH ();
 22469:         FEFunction.fpkLTOD ();
 22470:       } else {
 22471:         XEiJ.regCCR = XEiJ.REG_CCR_N | XEiJ.REG_CCR_C;  //文法エラー
 22472:       }
 22473:     } else {  //&B,&O,&H以外
 22474:       fpkSTOD ();
 22475:     }
 22476:   }  //fpkVAL()
 22477: 
 22478:   //fpkUSING ()
 22479:   //  $FE21  __USING
 22480:   //  64bit浮動小数点数をアトリビュートを指定して文字列に変換する
 22481:   //  メモ
 22482:   //    bit1の'\\'とbit4の'+'を両方指定したときは'\\'が右側。先頭に"+\\"を付ける
 22483:   //    bit1の'\\'とbit2の','とbit4の'+'は整数部の桁数が足りないとき数字を右にずらして押し込まれる
 22484:   //    bit3で指数形式を指示しなければ指数部が極端に大きくても極端に小さくても指数形式にならない
 22485:   //    bit3で指数形式を指定したときbit1の'\\'とbit2の','は無効
 22486:   //    bit4とbit5とbit6はbit4>bit5>bit6の順位で1つだけ有効
 22487:   //    有効数字は14桁で15桁目以降はすべて0
 22488:   //    FLOAT2.Xは整数部の0でない最初の数字から256文字目までで打ち切られてしまう
 22489:   //    整数部の桁数に余裕があれば左側の空白は出力されるので文字列の全体が常に256バイトに収まるわけではない
 22490:   //      using 1234.5 5 0 0    " 1235."
 22491:   //      using 1234.5 5 1 0    " 1234.5"
 22492:   //      using 1234.5 5 2 0    " 1234.50"
 22493:   //      using 1234.5 6 2 1    "**1234.50"
 22494:   //      using 1234.5 6 2 2    " \\1234.50"
 22495:   //      using 1234.5 6 2 3    "*\\1234.50"
 22496:   //      using 1234.5 6 2 4    " 1,234.50"
 22497:   //      using 1234.5 4 2 4    "1,234.50"
 22498:   //      using 1234.5 4 2 5    "1,234.50"
 22499:   //      using 1234.5 4 2 6    "\\1,234.50"
 22500:   //      using 1234.5 4 2 7    "\\1,234.50"
 22501:   //      using 1234.5 4 2 16   "+1234.50"
 22502:   //      using 1234.5 4 2 22   "+\\1,234.50"
 22503:   //      using 1234.5 4 2 32   "1234.50+"
 22504:   //      using 1234.5 4 2 48   "+1234.50"
 22505:   //      using 1234.5 4 2 64   "1234.50 "
 22506:   //      using 1234.5 4 2 80   "+1234.50"
 22507:   //      using 1234.5 4 2 96   "1234.50+"
 22508:   //      using 12345678901234567890 10 1 0      "12345678901235000000.0"
 22509:   //      using 12345678901234567890e+10 10 1 0  "123456789012350000000000000000.0"
 22510:   //      using 0.3333 0 0 0    "."
 22511:   //      using 0.6666 0 0 0    "1."
 22512:   //      using 0.6666 0 3 0    ".667"
 22513:   //      using 0.6666 3 0 0    "  1."
 22514:   //      using 0.3333 0 0 2    "\\."
 22515:   //      using 0.3333 0 0 16   "+."
 22516:   //      using 0.3333 0 0 18   "+\\."
 22517:   //      using 1e-10 3 3 0     "  0.000"
 22518:   //    指数形式の出力は不可解で本来の動作ではないように思えるが、
 22519:   //    X-BASICのprint using命令が使っているのでFLOAT2.Xに合わせておいた方がよさそう
 22520:   //      print using "###.##";1.23         "  1.23"         整数部の桁数は3
 22521:   //      print using "+##.##";1.23         " +1.23"         整数部の桁数は3←
 22522:   //      print using "###.##^^^^^";1.23    " 12.30E-001"    整数部の桁数は3
 22523:   //      print using "+##.##^^^^^";1.23    "+12.30E-001"    整数部の桁数は2←
 22524:   //    FLOAT2.Xでは#NANと#INFは4桁の整数のように出力される。末尾に小数点が付くが小数部には何も出力されない
 22525:   //      using -#INF 7 3 23     "*-\\#,INF."
 22526:   //    FLOAT2.Xで#NANと#INFを指数形式にするとさらに不可解。これはバグと言ってよいと思う
 22527:   //      using #INF 10 10 8      " #INFE-005"
 22528:   //    ここでは#NANと#INFは整数部と小数点と小数部と指数部の全体を使って右寄せにする
 22529:   //  <d0d1.d:64bit浮動小数点数
 22530:   //  <d2.l:整数部の桁数
 22531:   //  <d3.l:小数部の桁数
 22532:   //  <d4.l:アトリビュート
 22533:   //    bit0  左側を'*'で埋める
 22534:   //    bit1  先頭に'\\'を付ける
 22535:   //    bit2  整数部を3桁毎に','で区切る
 22536:   //    bit3  指数形式
 22537:   //    bit4  先頭に符号('+'または'-')を付ける
 22538:   //    bit5  末尾に符号('+'または'-')を付ける
 22539:   //    bit6  末尾に符号(' 'または'-')を付ける
 22540:   //  <a0.l:文字列バッファの先頭
 22541:   //  a0は変化しない
 22542:   public static void fpkUSING () throws M68kException {
 22543:     fpkUSINGSub ((long) XEiJ.regRn[0] << 32 | 0xffffffffL & XEiJ.regRn[1]);  //64bit浮動小数点数
 22544:   }  //fpkUSING()
 22545:   public static void fpkUSINGSub (long l) throws M68kException {
 22546:     int len1 = Math.max (0, XEiJ.regRn[2]);  //整数部の桁数
 22547:     int len2 = Math.max (0, XEiJ.regRn[3]);  //小数部の桁数
 22548:     int attr = XEiJ.regRn[4];  //アトリビュート
 22549:     int a = XEiJ.regRn[8];  //文字列バッファの先頭
 22550:     boolean exp = (attr & 8) != 0;  //true=指数形式
 22551:     int spc = (attr & 1) != 0 ? '*' : ' ';  //先頭の空白を充填する文字
 22552:     int yen = (attr & 2) != 0 ? '\\' : 0;  //先頭の'\\'
 22553:     int cmm = !exp && (attr & 4) != 0 ? ',' : 0;  //3桁毎に入れる','
 22554:     //符号
 22555:     int sgn1 = 0;  //先頭の符号
 22556:     int sgn2 = 0;  //末尾の符号
 22557:     if (l < 0L) {  //負
 22558:       if ((attr & 32 + 64) == 0) {  //末尾に符号を付けない
 22559:         sgn1 = '-';  //先頭の符号
 22560:       } else {  //末尾に符号を付ける
 22561:         sgn2 = '-';  //末尾の符号
 22562:       }
 22563:       l &= 0x7fffffffffffffffL;  //符号bitを消しておく
 22564:     } else {  //正
 22565:       if ((attr & 16) != 0) {  //先頭に符号('+'または'-')を付ける
 22566:         sgn1 = '+';
 22567:       } else if ((attr & 16 + 32) == 32) {  //末尾に符号('+'または'-')を付ける
 22568:         sgn2 = '+';
 22569:       } else if ((attr & 16 + 32 + 64) == 64) {  //末尾に符号(' 'または'-')を付ける
 22570:         sgn2 = ' ';
 22571:       }
 22572:     }
 22573:     double x = Double.longBitsToDouble (l);  //絶対値
 22574:     int e = (int) (l >>> 52) - 1023;  //指数部。ゲタ0。符号bitは消してあるのでマスクは不要
 22575:     l &= 0x000fffffffffffffL;  //仮数部の小数部。正規化数のとき整数部の1が付いていないことに注意
 22576:     //±0,±Inf,NaN
 22577:     if (e == -1023) {  //±0,非正規化数
 22578:       if (l == 0L) {  //±0
 22579:         for (int i = len1 - ((sgn1 != 0 ? 1 : 0) +  //先頭の符号
 22580:                              (yen != 0 ? 1 : 0) +  //'\\'
 22581:                              1  //数字
 22582:                              ); 0 < i; i--) {
 22583:           mmuWriteByteData (a++, spc, 1);  //空白
 22584:         }
 22585:         if (sgn1 != 0) {
 22586:           mmuWriteByteData (a++, sgn1, 1);  //先頭の符号
 22587:         }
 22588:         if (yen != 0) {
 22589:           mmuWriteByteData (a++, yen, 1);  //'\\'
 22590:         }
 22591:         if (0 < len1) {
 22592:           mmuWriteByteData (a++, '0', 1);  //整数部
 22593:         }
 22594:         mmuWriteByteData (a++, '.', 1);  //小数点
 22595:         for (; 0 < len2; len2--) {
 22596:           mmuWriteByteData (a++, '0', 1);  //小数部
 22597:         }
 22598:         mmuWriteByteData (a, '\0', 1);
 22599:         return;
 22600:       }
 22601:       e -= Long.numberOfLeadingZeros (l) - 12;  //非正規化数の指数部を補正する
 22602:     } else if (e == 1024) {  //±Inf,NaN
 22603:       for (int i = len1 + 1 + len2 + (exp ? 5 : 0) -  //整数部と小数点と小数部と指数部の全体を使って右寄せにする
 22604:            ((sgn1 != 0 ? 1 : 0) +  //先頭の符号
 22605:             (yen != 0 ? 1 : 0) +  //'\\'
 22606:             4  //文字
 22607:             ); 0 < i; i--) {
 22608:         mmuWriteByteData (a++, spc, 1);  //空白
 22609:       }
 22610:       if (sgn1 != 0) {
 22611:         mmuWriteByteData (a++, sgn1, 1);  //先頭の符号
 22612:       }
 22613:       if (yen != 0) {
 22614:         mmuWriteByteData (a++, yen, 1);  //'\\'
 22615:       }
 22616:       mmuWriteByteData (a++, '#', 1);
 22617:       if (l == 0L) {  //±Inf
 22618:         mmuWriteByteData (a++, 'I', 1);
 22619:         mmuWriteByteData (a++, 'N', 1);
 22620:         mmuWriteByteData (a++, 'F', 1);
 22621:       } else {  //NaN
 22622:         mmuWriteByteData (a++, 'N', 1);
 22623:         mmuWriteByteData (a++, 'A', 1);
 22624:         mmuWriteByteData (a++, 'N', 1);
 22625:       }
 22626:       mmuWriteByteData (a, '\0', 1);
 22627:       return;
 22628:     }
 22629:     //10進数で表現したときの指数部を求める
 22630:     //  10^e<=x<10^(e+1)となるeを求める
 22631:     e = (int) Math.floor ((double) e * 0.30102999566398119521373889472);  //log10(2)
 22632:     //10^-eを掛けて1<=x<10にする
 22633:     //  非正規化数の最小値から正規化数の最大値まで処理できなければならない
 22634:     //  10^-eを計算してからまとめて掛ける方法はxが非正規化数のとき10^-eがオーバーフローしてしまうので不可
 22635:     //    doubleは非正規化数の逆数を表現できない
 22636:     if (0 < e) {  //10<=x
 22637:       x *= FEFunction.FPK_TEN_M16QR[e & 15];
 22638:       if (16 <= e) {
 22639:         x *= FEFunction.FPK_TEN_M16QR[16 + (e >> 4 & 15)];
 22640:         if (256 <= e) {
 22641:           x *= FEFunction.FPK_TEN_M16QR[33];  //FEFunction.FPK_TEN_M16QR[32 + (e >> 8)]
 22642:         }
 22643:       }
 22644:     } else if (e < 0) {  //x<1
 22645:       x *= FEFunction.FPK_TEN_P16QR[-e & 15];
 22646:       if (e <= -16) {
 22647:         x *= FEFunction.FPK_TEN_P16QR[16 + (-e >> 4 & 15)];
 22648:         if (e <= -256) {
 22649:           x *= FEFunction.FPK_TEN_P16QR[33];  //FEFunction.FPK_TEN_P16QR[32 + (-e >> 8)]
 22650:         }
 22651:       }
 22652:     }
 22653:     //整数部2桁、小数部16桁の10進数に変換する
 22654:     //  1<=x<10なのでw[1]が先頭になるはずだが誤差で前後にずれる可能性がある
 22655:     int[] w = new int[18];
 22656:     {
 22657:       int d = (int) x;
 22658:       int t = XEiJ.FMT_BCD4[d];
 22659:       w[0] = t >> 4;
 22660:       w[1] = t      & 15;
 22661:       for (int i = 2; i < 18; i += 4) {
 22662:         //xを10000倍して整数部dを引くことで小数部を残すが、このとき情報落ちが発生して誤差が蓄積する
 22663:         //Double-Doubleの乗算の要領で10000倍を正確に行い、誤差の蓄積を回避する
 22664:         //x = (x - (double) d) * 10000.0;
 22665:         double xh = x * 0x8000001p0;
 22666:         xh += x - xh;  //xの上半分
 22667:         x = (xh - (double) d) * 10000.0 + (x - xh) * 10000.0;
 22668:         d = (int) x;
 22669:         t = XEiJ.FMT_BCD4[d];
 22670:         w[i    ] = t >> 12;
 22671:         w[i + 1] = t >>  8 & 15;
 22672:         w[i + 2] = t >>  4 & 15;
 22673:         w[i + 3] = t       & 15;
 22674:       }
 22675:     }
 22676:     //先頭の位置を確認する
 22677:     //  w[h]が先頭(0でない最初の数字)の位置
 22678:     int h = w[0] != 0 ? 0 : w[1] != 0 ? 1 : 2;
 22679:     //14+1桁目を四捨五入する
 22680:     int o = h + 14;  //w[o]は四捨五入する桁の位置。w[]の範囲内
 22681:     if (5 <= w[o]) {
 22682:       int i = o;
 22683:       while (10 <= ++w[--i]) {
 22684:         w[i] = 0;
 22685:       }
 22686:       if (i < h) {  //先頭から繰り上がった。このとき新しい先頭は1でそれ以外はすべて0
 22687:         h--;  //先頭を左にずらす
 22688:         o--;  //末尾を左にずらす
 22689:       }
 22690:     }
 22691:     //先頭の位置に応じて指数部を更新する
 22692:     //  w[h]が整数部、w[h+1..13]が小数部。10^eの小数点はw[h]の右側。整数部の桁数はe+1桁
 22693:     e -= h - 1;
 22694:     //整数部の桁数を調節する
 22695:     int ee = !exp ? e : Math.max (0, sgn1 != 0 || sgn2 != 0 ? len1 : len1 - 1) - 1;  //整数部の桁数-1。整数部の桁数はee+1桁。指数部はe-ee
 22696:     //小数点以下len2+1桁目が先頭から14+1桁目よりも左側にあるときその桁で改めて四捨五入する
 22697:     //  あらかじめ14+1桁目で四捨五入しておかないと、
 22698:     //  1.5の5を四捨五入しなければならないときに誤差で1.499…になったまま4を四捨五入しようとして失敗することがある
 22699:     int s = h + ee + 1 + len2;  //w[s]は小数点以下len2+1桁目の位置。w.length<=sの場合があることに注意
 22700:     if (s < o) {
 22701:       o = s;  //w[o]は四捨五入する桁の位置。o<0の場合があることに注意
 22702:       if (0 <= o && 5 <= w[o]) {
 22703:         int i = o;
 22704:         while (10 <= ++w[--i]) {
 22705:           w[i] = 0;
 22706:         }
 22707:         if (i < h) {  //先頭から繰り上がった。このとき新しい先頭は1でそれ以外はすべて0
 22708:           h--;  //先頭を左にずらす
 22709:           if (!exp) {  //指数形式でないとき
 22710:             ee++;  //左に1桁伸ばす。全体の桁数が1桁増える
 22711:           } else {  //指数形式のとき
 22712:             e++;  //指数部を1増やす
 22713:             o--;  //末尾を左にずらす。全体の桁数は変わらない
 22714:           }
 22715:         }
 22716:       }
 22717:     }
 22718:     //文字列に変換する
 22719:     if (0 <= ee) {  //1<=x
 22720:       for (int i = len1 - ((sgn1 != 0 ? 1 : 0) +  //先頭の符号
 22721:                            (yen != 0 ? 1 : 0) +  //'\\'
 22722:                            (cmm != 0 ? ee / 3 : 0) +  //','
 22723:                            ee + 1  //数字
 22724:                            ); 0 < i; i--) {
 22725:         mmuWriteByteData (a++, spc, 1);  //空白
 22726:       }
 22727:       if (sgn1 != 0) {
 22728:         mmuWriteByteData (a++, sgn1, 1);  //先頭の符号
 22729:       }
 22730:       if (yen != 0) {
 22731:         mmuWriteByteData (a++, yen, 1);  //'\\'
 22732:       }
 22733:       for (int i = ee; 0 <= i; i--) {
 22734:         mmuWriteByteData (a++, h < o ? '0' + w[h] : '0', 1);  //整数部
 22735:         h++;
 22736:         if (cmm != 0 && 0 < i && i % 3 == 0) {
 22737:           mmuWriteByteData (a++, cmm, 1);  //','
 22738:         }
 22739:       }
 22740:       mmuWriteByteData (a++, '.', 1);  //小数点
 22741:       for (; 0 < len2; len2--) {
 22742:         mmuWriteByteData (a++, h < o ? '0' + w[h] : '0', 1);  //小数部
 22743:         h++;
 22744:       }
 22745:     } else {  //x<1
 22746:       for (int i = len1 - ((sgn1 != 0 ? 1 : 0) +  //先頭の符号
 22747:                            (yen != 0 ? 1 : 0) +  //'\\'
 22748:                            1  //数字
 22749:                            ); 0 < i; i--) {
 22750:         mmuWriteByteData (a++, spc, 1);  //空白
 22751:       }
 22752:       if (sgn1 != 0) {
 22753:         mmuWriteByteData (a++, sgn1, 1);  //先頭の符号
 22754:       }
 22755:       if (yen != 0) {
 22756:         mmuWriteByteData (a++, yen, 1);  //'\\'
 22757:       }
 22758:       if (0 < len1) {
 22759:         mmuWriteByteData (a++, '0', 1);  //整数部
 22760:       }
 22761:       mmuWriteByteData (a++, '.', 1);  //小数点
 22762:       for (int i = -1 - ee; 0 < len2 && 0 < i; len2--, i--) {
 22763:         mmuWriteByteData (a++, '0', 1);  //小数部の先頭の0の並び
 22764:       }
 22765:       for (; 0 < len2; len2--) {
 22766:         mmuWriteByteData (a++, h < o ? '0' + w[h] : '0', 1);  //小数部
 22767:         h++;
 22768:       }
 22769:     }
 22770:     if (exp) {
 22771:       e -= ee;
 22772:       mmuWriteByteData (a++, 'E', 1);  //指数部の始まり
 22773:       if (0 <= e) {
 22774:         mmuWriteByteData (a++, '+', 1);  //指数部の正符号。省略しない
 22775:       } else {
 22776:         mmuWriteByteData (a++, '-', 1);  //指数部の負符号
 22777:         e = -e;
 22778:       }
 22779:       e = XEiJ.FMT_BCD4[e];
 22780:       mmuWriteByteData (a++, '0' + (e >> 8     ), 1);  //指数部の100の位。0でも省略しない
 22781:       mmuWriteByteData (a++, '0' + (e >> 4 & 15), 1);  //指数部の10の位
 22782:       mmuWriteByteData (a++, '0' + (e      & 15), 1);  //指数部の1の位
 22783:     }
 22784:     if (sgn2 != 0) {
 22785:       mmuWriteByteData (a++, sgn2, 1);  //末尾の符号
 22786:     }
 22787:     mmuWriteByteData (a, '\0', 1);
 22788:   }  //fpkUSINGSub6(long)
 22789: 
 22790:   //fpkSTOD ()
 22791:   //  $FE22  __STOD
 22792:   //  文字列を64bit浮動小数点数に変換する
 22793:   //  先頭の'\t'と' 'を読み飛ばす
 22794:   //  "#INF"は無限大、"#NAN"は非数とみなす
 22795:   //  バグ
 22796:   //    FLOAT2.X 2.02/2.03は誤差が大きい
 22797:   //      "1.7976931348623E+308"=0x7fefffffffffffb0が0x7fefffffffffffb3になる
 22798:   //      "1.5707963267949"=0x3ff921fb54442d28が0x3ff921fb54442d26になる
 22799:   //      "4.9406564584125E-324"(非正規化数の最小値よりもわずかに大きい)がエラーになる
 22800:   //    FLOAT2.X 2.02/2.03は"-0"が+0になる
 22801:   //    FLOAT4.X 1.02は"-0"が+0になる(実機で確認済み)
 22802:   //    FLOAT2.X 2.02/2.03は"-#INF"が+Infになる
 22803:   //      print val("-#INF")で再現できる
 22804:   //      '-'を符号として解釈しておきながら結果の無限大に符号を付けるのを忘れている
 22805:   //    FLOAT2.X 2.02/2.03は".#INF"が+Infになる
 22806:   //      print val(".#INF")で再現できる
 22807:   //    FLOAT4.X 1.02は"#NAN","#INF","-#INF"を読み取ったときa0が文字列の直後ではなく最後の文字を指している
 22808:   //  <a0.l:文字列の先頭
 22809:   //  >d0d1.d:64bit浮動小数点数
 22810:   //  >d2.l:65535=64bit浮動小数点数をオーバーフローなしでintに変換できる,0=それ以外
 22811:   //  >d3.l:d2.l==65535のとき64bit浮動小数点数をintに変換した値
 22812:   //  >a0.l:変換された文字列の直後('\0'とは限らない)
 22813:   //  >ccr:0=エラーなし,CCR_N|CCR_C=文法エラー,CCR_V|CCR_C=オーバーフロー
 22814:   public static void fpkSTOD () throws M68kException {
 22815:     long l = Double.doubleToLongBits (fpkSTODSub ());
 22816:     if (FEFunction.FPK_FPCP_NAN && l == 0x7ff8000000000000L) {
 22817:       l = 0x7fffffffffffffffL;
 22818:     }
 22819:     XEiJ.regRn[0] = (int) (l >> 32);  //d0
 22820:     XEiJ.regRn[1] = (int) l;  //d1
 22821:   }  //fpkSTOD()
 22822:   public static double fpkSTODSub () throws M68kException {
 22823:     int a = XEiJ.regRn[8];  //a0
 22824:     //先頭の空白を読み飛ばす
 22825:     int c = mmuReadByteSignData (a, 1);
 22826:     while (c == ' ' || c == '\t') {
 22827:       c = mmuReadByteSignData (++a, 1);
 22828:     }
 22829:     //符号を読み取る
 22830:     double s = 1.0;  //仮数部の符号
 22831:     if (c == '+') {
 22832:       c = mmuReadByteSignData (++a, 1);
 22833:     } else if (c == '-') {
 22834:       s = -s;
 22835:       c = mmuReadByteSignData (++a, 1);
 22836:     }
 22837:     //#NANと#INFを処理する
 22838:     if (c == '#') {
 22839:       c = mmuReadByteSignData (a + 1, 1);
 22840:       if (c == 'N' || c == 'I') {  //小文字は不可
 22841:         c = c << 8 | mmuReadByteZeroData (a + 2, 1);
 22842:         if (c == ('N' << 8 | 'A') || c == ('I' << 8 | 'N')) {
 22843:           c = c << 8 | mmuReadByteZeroData (a + 3, 1);
 22844:           if (c == ('N' << 16 | 'A' << 8 | 'N') || c == ('I' << 16 | 'N' << 8 | 'F')) {
 22845:             XEiJ.regRn[2] = 0;  //d2
 22846:             XEiJ.regRn[3] = 0;  //d3
 22847:             XEiJ.regRn[8] = a + 4;  //a0。"#NAN"または"#INF"のときだけ直後まで進める。それ以外は'#'の位置で止める
 22848:             XEiJ.regCCR = 0;  //エラーなし。"#INF"はオーバーフローとみなされない
 22849:             return c == ('N' << 16 | 'A' << 8 | 'N') ? Double.NaN : s * Double.POSITIVE_INFINITY;
 22850:           }
 22851:         }
 22852:       }
 22853:       XEiJ.regRn[8] = a;  //a0。'#'の位置で止める
 22854:       XEiJ.regCCR = XEiJ.REG_CCR_N | XEiJ.REG_CCR_C;  //文法エラー
 22855:       return 0.0;
 22856:     }  //if c=='#'
 22857:     //仮数部を読み取る
 22858:     //  数字を1000個並べてからe-1000などと書いてあるとき途中でオーバーフローすると困るので、
 22859:     //  多すぎる数字の並びは先頭の有効数字だけ読み取って残りは桁数だけ数えて読み飛ばす
 22860:     long u = 0L;  //仮数部
 22861:     int n = 0;  //0以外の最初の数字から数えて何桁目か
 22862:     int e = 1;  //-小数部の桁数。1=整数部
 22863:     if (c == '.') {  //仮数部の先頭が小数点
 22864:       e = 0;  //小数部開始
 22865:       c = mmuReadByteSignData (++a, 1);
 22866:     }
 22867:     if (c < '0' || '9' < c) {  //仮数部に数字がない
 22868:       XEiJ.regRn[8] = a;  //a0
 22869:       XEiJ.regCCR = XEiJ.REG_CCR_N | XEiJ.REG_CCR_C;  //文法エラー
 22870:       return 0.0;
 22871:     }
 22872:     double x = 0.0;
 22873:     do {
 22874:       if (0 < n || '0' < c) {  //0以外
 22875:         n++;  //0以外の最初の数字から数えて何桁目か
 22876:       }
 22877:       if (e <= 0 && n <= 18) {  //小数部で18桁目まで
 22878:         e--;  //-小数部の桁数
 22879:       }
 22880:       if (0 < n && n <= 18) {  //1桁目から18桁目まで
 22881:         u = u * 10L + (long) (c - '0');
 22882:       }
 22883:       c = mmuReadByteSignData (++a, 1);
 22884:       if (0 < e && c == '.') {  //整数部で小数点が出てきた
 22885:         e = 0;  //小数部開始
 22886:         c = mmuReadByteSignData (++a, 1);
 22887:       }
 22888:     } while ('0' <= c && c <= '9');
 22889:     if (0 < e) {  //小数点が出てこなかった
 22890:       e = 18 < n ? n - 18 : 0;  //整数部を読み飛ばした桁数が(-小数部の桁数)
 22891:     }
 22892:     //  1<=u<10^18  整数なので誤差はない
 22893:     //  0<e   小数点がなくて整数部が19桁以上あって末尾を読み飛ばした
 22894:     //  e==0  小数点がなくて整数部が18桁以内で末尾を読み飛ばさなかった
 22895:     //        小数点があって小数点で終わっていた
 22896:     //  e<0   小数点があって小数部が1桁以上あった
 22897:     //指数部を読み取る
 22898:     if (c == 'E' || c == 'e') {
 22899:       c = mmuReadByteSignData (++a, 1);
 22900:       int t = 1;  //指数部の符号
 22901:       if (c == '+') {
 22902:         c = mmuReadByteSignData (++a, 1);
 22903:       } else if (c == '-') {
 22904:         t = -t;
 22905:         c = mmuReadByteSignData (++a, 1);
 22906:       }
 22907:       if (c < '0' || '9' < c) {  //指数部に数字がない
 22908:         XEiJ.regRn[8] = a;  //a0
 22909:         XEiJ.regCCR = XEiJ.REG_CCR_N | XEiJ.REG_CCR_C;  //文法エラー
 22910:         return 0.0;
 22911:       }
 22912:       while (c == '0') {  //先頭の0を読み飛ばす
 22913:         c = mmuReadByteSignData (++a, 1);
 22914:       }
 22915:       int p = 0;
 22916:       for (int j = 0; '0' <= c && c <= '9' && j < 9; j++) {  //0以外の数字が出てきてから最大で9桁目まで読み取る。Human68kの環境では数字を1GBも並べることはできないのでオーバーフローの判定には9桁あれば十分
 22917:         p = p * 10 + (c - '0');
 22918:         c = mmuReadByteSignData (++a, 1);
 22919:       }
 22920:       e += t * p;
 22921:     }
 22922:     //符号と仮数部と指数部を合わせる
 22923:     //  x=s*x*10^e
 22924:     //  1<=u<10^18なのでeが範囲を大きく外れている場合を先に除外する
 22925:     if (e < -350) {
 22926:       XEiJ.regRn[2] = 65535;  //d2。-1ではない
 22927:       XEiJ.regRn[3] = 0;  //d3
 22928:       XEiJ.regRn[8] = a;  //a0
 22929:       XEiJ.regCCR = 0;  //エラーなし。アンダーフローはエラーとみなされない
 22930:       return s < 0.0 ? -0.0 : 0.0;
 22931:     }
 22932:     if (350 < e) {
 22933:       XEiJ.regRn[2] = 0;  //d2
 22934:       XEiJ.regRn[3] = 0;  //d3
 22935:       XEiJ.regRn[8] = a;  //a0
 22936:       XEiJ.regCCR = XEiJ.REG_CCR_V | XEiJ.REG_CCR_C;  //オーバーフロー
 22937:       return s * Double.POSITIVE_INFINITY;
 22938:     }
 22939:     if (true) {
 22940:       QFP xx = new QFP (s < 0.0 ? -u : u);  //符号と仮数部
 22941:       if (0 < e) {
 22942:         xx.mul (QFP.QFP_TEN_P16QR[e & 15]);
 22943:         if (16 <= e) {
 22944:           xx.mul (QFP.QFP_TEN_P16QR[16 + (e >> 4 & 15)]);
 22945:           if (256 <= e) {
 22946:             xx.mul (QFP.QFP_TEN_P16QR[33]);
 22947:           }
 22948:         }
 22949:       } else if (e < 0) {
 22950:         xx.mul (QFP.QFP_TEN_M16QR[-e & 15]);
 22951:         if (e <= -16) {
 22952:           xx.mul (QFP.QFP_TEN_M16QR[16 + (-e >> 4 & 15)]);
 22953:           if (e <= -256) {
 22954:             xx.mul (QFP.QFP_TEN_M16QR[33]);
 22955:           }
 22956:         }
 22957:       }
 22958:       x = xx.getd ();
 22959:     } else {
 22960:       x = s * (double) u;  //符号と仮数部
 22961:       if (0 < e) {
 22962:         x *= FEFunction.FPK_TEN_P16QR[e & 15];
 22963:         if (16 <= e) {
 22964:           x *= FEFunction.FPK_TEN_P16QR[16 + (e >> 4 & 15)];
 22965:           if (256 <= e) {
 22966:             x *= FEFunction.FPK_TEN_P16QR[33];  //FEFunction.FPK_TEN_P16QR[32 + (e >> 8)]
 22967:           }
 22968:         }
 22969:       } else if (e < 0) {
 22970:         x /= FEFunction.FPK_TEN_P16QR[-e & 15];
 22971:         if (e <= -16) {
 22972:           x /= FEFunction.FPK_TEN_P16QR[16 + (-e >> 4 & 15)];
 22973:           if (e <= -256) {
 22974:             x /= FEFunction.FPK_TEN_P16QR[33];  //FEFunction.FPK_TEN_P16QR[32 + (-e >> 8)]
 22975:           }
 22976:         }
 22977:       }
 22978:     }
 22979:     if (Double.isInfinite (x)) {
 22980:       XEiJ.regRn[8] = a;  //a0
 22981:       XEiJ.regCCR = XEiJ.REG_CCR_V | XEiJ.REG_CCR_C;  //オーバーフロー
 22982:       return x;
 22983:     }
 22984:     //  アンダーフローで0になっている場合がある
 22985:     if (x == (double) ((int) x)) {  //intで表現できる。+0.0==-0.0==0なので±0.0を含む
 22986:       XEiJ.regRn[2] = 65535;  //d2。-1ではない
 22987:       XEiJ.regRn[3] = (int) x;  //d3
 22988:     } else {  //intで表現できない
 22989:       XEiJ.regRn[2] = 0;  //d2
 22990:       XEiJ.regRn[3] = 0;  //d3
 22991:     }
 22992:     XEiJ.regRn[8] = a;  //a0
 22993:     XEiJ.regCCR = 0;  //エラーなし
 22994:     return x;
 22995:   }  //fpkSTODSub()
 22996: 
 22997:   //fpkDTOS ()
 22998:   //  $FE23  __DTOS
 22999:   //  64bit浮動小数点数を文字列に変換する
 23000:   //  無限大は"#INF"、非数は"#NAN"になる
 23001:   //  指数形式の境目
 23002:   //    x<10^-4または10^14<=xのとき指数形式にする
 23003:   //    FLOAT2.X/FLOAT4.Xの場合
 23004:   //      3f2fffffffffff47  2.4414062499999E-004
 23005:   //      3f2fffffffffff48  0.000244140625
 23006:   //      42d6bcc41e8fffdf  99999999999999
 23007:   //      42d6bcc41e8fffe0  1E+014
 23008:   //  <d0d1.d:64bit浮動小数点数
 23009:   //  <a0.l:文字列バッファの先頭
 23010:   //  >a0.l:末尾の'\0'の位置
 23011:   public static void fpkDTOS () throws M68kException {
 23012:     fpkDTOSSub ((long) XEiJ.regRn[0] << 32 | 0xffffffffL & XEiJ.regRn[1]);  //64bit浮動小数点数
 23013:   }  //fpkDTOS()
 23014:   public static void fpkDTOSSub (long l) throws M68kException {
 23015:     final int len3 = 14;
 23016:     int a = XEiJ.regRn[8];  //文字列バッファの先頭
 23017:     //符号と指数部の処理
 23018:     //  ±0,±Inf,NaNはここで除外する
 23019:     if (l < 0L) {
 23020:       mmuWriteByteData (a++, '-', 1);  //負符号
 23021:       l &= 0x7fffffffffffffffL;  //符号bitを消しておく
 23022:     }
 23023:     double x = Double.longBitsToDouble (l);  //絶対値
 23024:     int e = (int) (l >>> 52) - 1023;  //指数部。ゲタ0。符号bitは消してあるのでマスクは不要
 23025:     l &= 0x000fffffffffffffL;  //仮数部の小数部。正規化数のとき整数部の1が付いていないことに注意
 23026:     if (e == -1023) {  //±0,非正規化数
 23027:       if (l == 0L) {  //±0
 23028:         mmuWriteByteData (a++, '0', 1);  //0
 23029:         mmuWriteByteData (a, '\0', 1);
 23030:         XEiJ.regRn[8] = a;  //末尾の'\0'の位置
 23031:         return;
 23032:       }
 23033:       e -= Long.numberOfLeadingZeros (l) - 12;  //非正規化数の指数部を補正する
 23034:     } else if (e == 1024) {  //±Inf,NaN
 23035:       mmuWriteByteData (a++, '#', 1);
 23036:       if (l == 0L) {  //±Inf
 23037:         mmuWriteByteData (a++, 'I', 1);
 23038:         mmuWriteByteData (a++, 'N', 1);
 23039:         mmuWriteByteData (a++, 'F', 1);
 23040:       } else {  //NaN
 23041:         mmuWriteByteData (a++, 'N', 1);
 23042:         mmuWriteByteData (a++, 'A', 1);
 23043:         mmuWriteByteData (a++, 'N', 1);
 23044:       }
 23045:       mmuWriteByteData (a, '\0', 1);
 23046:       XEiJ.regRn[8] = a;  //末尾の'\0'の位置
 23047:       return;
 23048:     }
 23049:     //10進数で表現したときの指数部を求める
 23050:     //  10^e<=x<10^(e+1)となるeを求める
 23051:     e = (int) Math.floor ((double) e * 0.30102999566398119521373889472);  //log10(2)
 23052:     //10^-eを掛けて1<=x<10にする
 23053:     //  非正規化数の最小値から正規化数の最大値まで処理できなければならない
 23054:     //  10^-eを計算してからまとめて掛ける方法はxが非正規化数のとき10^-eがオーバーフローしてしまうので不可
 23055:     //    doubleは非正規化数の逆数を表現できない
 23056:     if (0 < e) {  //10<=x
 23057:       x *= FEFunction.FPK_TEN_M16QR[e & 15];
 23058:       if (16 <= e) {
 23059:         x *= FEFunction.FPK_TEN_M16QR[16 + (e >> 4 & 15)];
 23060:         if (256 <= e) {
 23061:           x *= FEFunction.FPK_TEN_M16QR[33];  //FEFunction.FPK_TEN_M16QR[32 + (e >> 8)]
 23062:         }
 23063:       }
 23064:     } else if (e < 0) {  //x<1
 23065:       x *= FEFunction.FPK_TEN_P16QR[-e & 15];
 23066:       if (e <= -16) {
 23067:         x *= FEFunction.FPK_TEN_P16QR[16 + (-e >> 4 & 15)];
 23068:         if (e <= -256) {
 23069:           x *= FEFunction.FPK_TEN_P16QR[33];  //FEFunction.FPK_TEN_P16QR[32 + (-e >> 8)]
 23070:         }
 23071:       }
 23072:     }
 23073:     //整数部2桁、小数部16桁の10進数に変換する
 23074:     //  1<=x<10なのでw[1]が先頭になるはずだが誤差で前後にずれる可能性がある
 23075:     int[] w = new int[18];
 23076:     {
 23077:       int d = (int) x;
 23078:       int t = XEiJ.FMT_BCD4[d];
 23079:       w[0] = t >> 4;
 23080:       w[1] = t      & 15;
 23081:       for (int i = 2; i < 18; i += 4) {
 23082:         //xを10000倍して整数部dを引くことで小数部を残すが、このとき情報落ちが発生して誤差が蓄積する
 23083:         //Double-Doubleの乗算の要領で10000倍を正確に行い、誤差の蓄積を回避する
 23084:         //x = (x - (double) d) * 10000.0;
 23085:         double xh = x * 0x8000001p0;
 23086:         xh += x - xh;  //xの上半分
 23087:         x = (xh - (double) d) * 10000.0 + (x - xh) * 10000.0;
 23088:         d = (int) x;
 23089:         t = XEiJ.FMT_BCD4[d];
 23090:         w[i    ] = t >> 12;
 23091:         w[i + 1] = t >>  8 & 15;
 23092:         w[i + 2] = t >>  4 & 15;
 23093:         w[i + 3] = t       & 15;
 23094:       }
 23095:     }
 23096:     //先頭の位置を確認する
 23097:     //  w[h]が先頭(0でない最初の数字)の位置
 23098:     int h = w[0] != 0 ? 0 : w[1] != 0 ? 1 : 2;
 23099:     //14+1桁目を四捨五入する
 23100:     int o = h + 14;  //w[o]は四捨五入する桁の位置。w[]の範囲内
 23101:     if (5 <= w[o]) {
 23102:       int i = o;
 23103:       while (10 <= ++w[--i]) {
 23104:         w[i] = 0;
 23105:       }
 23106:       if (i < h) {  //先頭から繰り上がった。このとき新しい先頭は1でそれ以外はすべて0
 23107:         h--;  //先頭を左にずらす
 23108:         o--;  //末尾を左にずらす
 23109:       }
 23110:     }
 23111:     //先頭の位置に応じて指数部を更新する
 23112:     //  w[h]が整数部、w[h+1..o-1]が小数部。10^eの小数点はw[h]の右側。整数部の桁数はe+1桁
 23113:     e -= h - 1;
 23114:     //末尾の位置を確認する
 23115:     //  w[o-1]が末尾(0でない最後の数字)の位置
 23116:     while (w[o - 1] == 0) {  //全体は0ではないので必ず止まる。小数点よりも左側で止まる場合があることに注意
 23117:       o--;
 23118:     }
 23119:     //指数形式にするかどうか選択して文字列に変換する
 23120:     if (0 <= e && e < len3) {  //1<=x<10^len3。指数形式にしない
 23121:       do {
 23122:         mmuWriteByteData (a++, '0' + w[h++], 1);  //整数部。末尾の位置に関係なく1の位まで書く
 23123:       } while (0 <= --e);
 23124:       if (h < o) {  //小数部がある
 23125:         mmuWriteByteData (a++, '.', 1);  //小数部があるときだけ小数点を書く
 23126:         do {
 23127:           mmuWriteByteData (a++, '0' + w[h++], 1);  //小数部
 23128:         } while (h < o);
 23129:       }
 23130:     } else if (-4 <= e && e < 0) {  //10^-4<=x<1。指数形式にしない
 23131:       mmuWriteByteData (a++, '0', 1);  //整数部の0
 23132:       mmuWriteByteData (a++, '.', 1);  //小数点
 23133:       while (++e < 0) {
 23134:         mmuWriteByteData (a++, '0', 1);  //小数部の先頭の0の並び
 23135:       }
 23136:       do {
 23137:         mmuWriteByteData (a++, '0' + w[h++], 1);  //小数部
 23138:       } while (h < o);
 23139:     } else {  //x<10^-4または10^len3<=x。指数形式にする
 23140:       mmuWriteByteData (a++, '0' + w[h++], 1);  //整数部
 23141:       if (h < o) {  //小数部がある
 23142:         mmuWriteByteData (a++, '.', 1);  //小数部があるときだけ小数点を書く
 23143:         do {
 23144:           mmuWriteByteData (a++, '0' + w[h++], 1);  //小数部
 23145:         } while (h < o);
 23146:       }
 23147:       mmuWriteByteData (a++, 'E', 1);  //指数部の始まり
 23148:       if (0 <= e) {
 23149:         mmuWriteByteData (a++, '+', 1);  //指数部の正符号。省略しない
 23150:       } else {
 23151:         mmuWriteByteData (a++, '-', 1);  //指数部の負符号
 23152:         e = -e;
 23153:       }
 23154:       e = XEiJ.FMT_BCD4[e];
 23155:       mmuWriteByteData (a++, '0' + (e >> 8     ), 1);  //指数部の100の位。0でも省略しない
 23156:       mmuWriteByteData (a++, '0' + (e >> 4 & 15), 1);  //指数部の10の位
 23157:       mmuWriteByteData (a++, '0' + (e      & 15), 1);  //指数部の1の位
 23158:     }
 23159:     mmuWriteByteData (a, '\0', 1);
 23160:     XEiJ.regRn[8] = a;  //末尾の'\0'の位置
 23161:   }  //fpkDTOSSub6()
 23162: 
 23163:   //fpkECVT ()
 23164:   //  $FE24  __ECVT
 23165:   //  64bit浮動小数点数を全体の桁数を指定して文字列に変換する
 23166:   //  文字列に書くのは仮数部の数字のみ
 23167:   //  符号と小数点と指数部は文字列に書かず、小数点の位置と符号をレジスタに入れて返す
 23168:   //  桁数は255桁まで指定できるが、有効桁数は14桁まで
 23169:   //    有効桁数の次の桁で絶対値を四捨五入する
 23170:   //    15桁以上を指定しても14桁に丸められ、15桁目以降はすべて'0'になる
 23171:   //  無限大は"#INF"、非数は"#NAN"に変換する
 23172:   //    "#INF"と"#NAN"のとき小数点の位置は4になる
 23173:   //    "#INF"と"#NAN"で3桁以下のときは途中で打ち切る
 23174:   //    メモ
 23175:   //      FLOATn.Xは"#INF"と"#NAN"で1桁~3桁のとき文字列が"$","$0","$00"になってしまう
 23176:   //      文字数が少なすぎて"#INF"や"#NAN"が入り切らないのは仕方がないが、
 23177:   //      無意味な"$00"という文字列になるのは数字ではない文字列を四捨五入しようとするバグが原因
 23178:   //      例えば3桁のときは4桁目の'F'または'N'が'5'以上なので繰り上げて上の位をインクリメントする
 23179:   //      'N'+1='O'または'A'+1='B'が'9'よりも大きいので'0'を上書きして繰り上げて上の位をインクリメントする
 23180:   //      'I'+1='J'または'N'+1='O'も'9'よりも大きいので'0'を上書きして繰り上げて上の位をインクリメントする
 23181:   //      '#'+1='$'は'9'以下なので"$00"になる
 23182:   //      X-BASICでint i2,i3:print ecvt(val("#INF"),3,i2,i3)とすると再現できる
 23183:   //    "#INF"と"#NAN"で5桁以上のときは5桁目以降はすべて'\0'になる
 23184:   //    メモ
 23185:   //      FLOATn.Xは"#NAN"と"#INF"で15桁以上のとき5桁目から14桁目までは'\0'だが15桁目以降に'0'が書き込まれる
 23186:   //      通常は5桁目の'\0'で文字列は終了していると見なされるので実害はないが気持ち悪い
 23187:   //  メモ
 23188:   //    FLOAT2.X 2.02/2.03は0のとき小数点の位置が0になる
 23189:   //    FLOAT4.X 1.02は0のとき小数点の位置が1になる
 23190:   //    ここでは1にしている
 23191:   //  <d0d1.d:64bit浮動小数点数
 23192:   //  <d2.l:全体の桁数
 23193:   //  <a0.l:文字列バッファの先頭。末尾に'\0'を書き込むので桁数+1バイト必要
 23194:   //  >d0.l:先頭から小数点の位置までのオフセット
 23195:   //  >d1.l:符号(0=+,1=-)
 23196:   //  a0.lは変化しない
 23197:   public static void fpkECVT () throws M68kException {
 23198:     fpkECVTSub ((long) XEiJ.regRn[0] << 32 | 0xffffffffL & XEiJ.regRn[1]);  //64bit浮動小数点数
 23199:   }  //fpkECVT()
 23200:   public static void fpkECVTSub (long l) throws M68kException {
 23201:     int len3 = Math.max (0, XEiJ.regRn[2]);  //全体の桁数
 23202:     int a = XEiJ.regRn[8];  //文字列バッファの先頭
 23203:     int b = a + len3;  //文字列バッファの末尾+1。'\0'を書き込む位置
 23204:     //符号と指数部の処理
 23205:     //  ±0,±Inf,NaNはここで除外する
 23206:     if (0L <= l) {
 23207:       XEiJ.regRn[1] = 0;  //正符号
 23208:     } else {
 23209:       XEiJ.regRn[1] = 1;  //負符号
 23210:       l &= 0x7fffffffffffffffL;  //符号bitを消しておく
 23211:     }
 23212:     double x = Double.longBitsToDouble (l);  //絶対値
 23213:     int e = (int) (l >>> 52) - 1023;  //指数部。ゲタ0。符号bitは消してあるのでマスクは不要
 23214:     l &= 0x000fffffffffffffL;  //仮数部の小数部。正規化数のとき整数部の1が付いていないことに注意
 23215:     if (e == -1023) {  //±0,非正規化数
 23216:       if (l == 0L) {  //±0
 23217:         //指定された全体の桁数だけ'0'を並べる
 23218:         while (a < b) {
 23219:           mmuWriteByteData (a++, '0', 1);
 23220:         }
 23221:         mmuWriteByteData (a, '\0', 1);
 23222:         XEiJ.regRn[0] = 1;  //小数点の位置
 23223:         return;
 23224:       }
 23225:       e -= Long.numberOfLeadingZeros (l) - 12;  //非正規化数の指数部を補正する
 23226:     } else if (e == 1024) {  //±Inf,NaN
 23227:       for (int s = l != 0L ? '#' | 'N' << 8 | 'A' << 16 | 'N' << 24 : '#' | 'I' << 8 | 'N' << 16 | 'F' << 24; a < b && s != 0; s >>>= 8) {
 23228:         mmuWriteByteData (a++, s, 1);
 23229:       }
 23230:       while (a < b) {
 23231:         mmuWriteByteData (a++, '\0', 1);  //残りは'\0'
 23232:       }
 23233:       mmuWriteByteData (a, '\0', 1);
 23234:       XEiJ.regRn[0] = 4;  //小数点の位置
 23235:       return;
 23236:     }
 23237:     //10進数で表現したときの指数部を求める
 23238:     //  10^e<=x<10^(e+1)となるeを求める
 23239:     e = (int) Math.floor ((double) e * 0.30102999566398119521373889472);  //log10(2)
 23240:     //10^-eを掛けて1<=x<10にする
 23241:     //  非正規化数の最小値から正規化数の最大値まで処理できなければならない
 23242:     //  10^-eを計算してからまとめて掛ける方法はxが非正規化数のとき10^-eがオーバーフローしてしまうので不可
 23243:     //    doubleは非正規化数の逆数を表現できない
 23244:     if (0 < e) {  //10<=x
 23245:       x *= FEFunction.FPK_TEN_M16QR[e & 15];
 23246:       if (16 <= e) {
 23247:         x *= FEFunction.FPK_TEN_M16QR[16 + (e >> 4 & 15)];
 23248:         if (256 <= e) {
 23249:           x *= FEFunction.FPK_TEN_M16QR[33];  //FEFunction.FPK_TEN_M16QR[32 + (e >> 8)]
 23250:         }
 23251:       }
 23252:     } else if (e < 0) {  //x<1
 23253:       x *= FEFunction.FPK_TEN_P16QR[-e & 15];
 23254:       if (e <= -16) {
 23255:         x *= FEFunction.FPK_TEN_P16QR[16 + (-e >> 4 & 15)];
 23256:         if (e <= -256) {
 23257:           x *= FEFunction.FPK_TEN_P16QR[33];  //FEFunction.FPK_TEN_P16QR[32 + (-e >> 8)]
 23258:         }
 23259:       }
 23260:     }
 23261:     //整数部2桁、小数部16桁の10進数に変換する
 23262:     //  1<=x<10なのでw[1]が先頭になるはずだが誤差で前後にずれる可能性がある
 23263:     int[] w = new int[18];
 23264:     {
 23265:       int d = (int) x;
 23266:       int t = XEiJ.FMT_BCD4[d];
 23267:       w[0] = t >> 4;
 23268:       w[1] = t      & 15;
 23269:       for (int i = 2; i < 18; i += 4) {
 23270:         //xを10000倍して整数部dを引くことで小数部を残すが、このとき情報落ちが発生して誤差が蓄積する
 23271:         //Double-Doubleの乗算の要領で10000倍を正確に行い、誤差の蓄積を回避する
 23272:         //x = (x - (double) d) * 10000.0;
 23273:         double xh = x * 0x8000001p0;
 23274:         xh += x - xh;  //xの上半分
 23275:         x = (xh - (double) d) * 10000.0 + (x - xh) * 10000.0;
 23276:         d = (int) x;
 23277:         t = XEiJ.FMT_BCD4[d];
 23278:         w[i    ] = t >> 12;
 23279:         w[i + 1] = t >>  8 & 15;
 23280:         w[i + 2] = t >>  4 & 15;
 23281:         w[i + 3] = t       & 15;
 23282:       }
 23283:     }
 23284:     //先頭の位置を確認する
 23285:     //  w[h]が先頭(0でない最初の数字)の位置
 23286:     int h = w[0] != 0 ? 0 : w[1] != 0 ? 1 : 2;
 23287:     //14+1桁目を四捨五入する
 23288:     int o = h + 14;  //w[o]は四捨五入する桁の位置。w[]の範囲内
 23289:     if (5 <= w[o]) {
 23290:       int i = o;
 23291:       while (10 <= ++w[--i]) {
 23292:         w[i] = 0;
 23293:       }
 23294:       if (i < h) {  //先頭から繰り上がった。このとき新しい先頭は1でそれ以外はすべて0
 23295:         h--;  //先頭を左にずらす
 23296:         o--;  //末尾を左にずらす
 23297:       }
 23298:     }
 23299:     //先頭の位置に応じて指数部を更新する
 23300:     //  w[h]が整数部、w[h+1..o-1]が小数部。10^eの小数点はw[h]の右側。整数部の桁数はe+1桁
 23301:     e -= h - 1;
 23302:     //先頭からlen3+1桁目が先頭から14+1桁目よりも左側にあるときその桁で改めて四捨五入する
 23303:     //  あらかじめ14+1桁目で四捨五入しておかないと、
 23304:     //  1.5の5を四捨五入しなければならないときに誤差で1.499…になったまま4を四捨五入しようとして失敗することがある
 23305:     int s = h + len3;  //w[s]は先頭からlen3+1桁目の位置。w.length<=sの場合があることに注意
 23306:     if (s < o) {
 23307:       o = s;  //w[o]は四捨五入する桁の位置。o<0の場合があることに注意
 23308:       if (0 <= o && 5 <= w[o]) {
 23309:         int i = o;
 23310:         while (10 <= ++w[--i]) {
 23311:           w[i] = 0;
 23312:         }
 23313:         if (i < h) {  //先頭から繰り上がった。このとき新しい先頭は1でそれ以外はすべて0
 23314:           h--;  //先頭を左にずらす
 23315:           o--;  //末尾を左にずらす
 23316:           e++;  //指数部を1増やす
 23317:         }
 23318:       }
 23319:     }
 23320:     //文字列に変換する
 23321:     while (a < b && h < o) {
 23322:       mmuWriteByteData (a++, '0' + w[h++], 1);  //有効数字
 23323:     }
 23324:     while (a < b) {
 23325:       mmuWriteByteData (a++, '0', 1);  //残りは'0'
 23326:     }
 23327:     mmuWriteByteData (a, '\0', 1);
 23328:     XEiJ.regRn[0] = e + 1;  //小数点の位置
 23329:   }  //fpkECVTSub6()
 23330: 
 23331:   //fpkFCVT ()
 23332:   //  $FE25  __FCVT
 23333:   //  64bit浮動小数点数を小数点以下の桁数を指定して文字列に変換する
 23334:   //  メモ
 23335:   //    小数点の位置がpのとき[p]の左側に小数点がある
 23336:   //    全体の桁数が制限されないので指数部が大きいとき整数部が収まるサイズのバッファが必要
 23337:   //    0または1以上のとき
 23338:   //      整数部と小数点以下の指定された桁数までを小数部の0を省略せずに出力する
 23339:   //      整数部と小数点以下の指定された桁数が合わせて14桁を超えるときは15桁目が四捨五入されて15桁目以降は0になる
 23340:   //      小数点の位置は整数部の桁数に等しい
 23341:   //      print fcvt(0#,4,i2,i3),i2,i3
 23342:   //      0000     0       0
 23343:   //      print fcvt(2e+12/3#,4,i2,i3),i2,i3
 23344:   //      6666666666666700         12      0
 23345:   //                 ↑
 23346:   //    1未満のとき
 23347:   //      小数点以下の桁数の範囲内を先頭の0を省略して出力する
 23348:   //      小数点以下の桁数の範囲内がすべて0のときは""になる
 23349:   //      小数点の位置は指数部+1に等しい
 23350:   //      print fcvt(0.01,3,i2,i3),i2,i3                0.010
 23351:   //      10      -1       0                              <~~
 23352:   //      print fcvt(0.001,3,i2,i3),i2,i3               0.001
 23353:   //      1       -2       0                              <<~
 23354:   //      print fcvt(0.0001,3,i2,i3),i2,i3              0.0001
 23355:   //              -3       0                              <<<
 23356:   //      print fcvt(0.00001,3,i2,i3),i2,i3             0.00001
 23357:   //              -4       0                              <<<<
 23358:   //    #INFと#NAN
 23359:   //      小数点以下の桁数の指定に関係なく4文字出力して小数点の位置4を返す
 23360:   //      print fcvt(val("#INF"),2,i2,i3),i2,i3
 23361:   //      #INF     4       0
 23362:   //      print fcvt(val("#INF"),6,i2,i3),i2,i3
 23363:   //      #INF     4       0
 23364:   //  バグ
 23365:   //    FLOAT4.X 1.02は結果が整数部が大きいとき255文字で打ち切られる
 23366:   //    FLOAT4.X 1.02はFCVT(±0)の整数部が0桁ではなく1桁になる
 23367:   //  <d0d1.d:64bit浮動小数点数
 23368:   //  <d2.l:小数点以下の桁数
 23369:   //  <a0.l:文字列バッファの先頭
 23370:   //  >d0.l:先頭から小数点の位置までのオフセット
 23371:   //  >d1.l:符号(0=+,1=-)
 23372:   public static void fpkFCVT () throws M68kException {
 23373:     fpkFCVTSub ((long) XEiJ.regRn[0] << 32 | 0xffffffffL & XEiJ.regRn[1]);  //64bit浮動小数点数
 23374:   }  //fpkFCVT()
 23375:   public static void fpkFCVTSub (long l) throws M68kException {
 23376:     int len2 = Math.max (0, XEiJ.regRn[2]);  //小数部の桁数
 23377:     int a = XEiJ.regRn[8];  //文字列バッファの先頭
 23378:     //符号と指数部の処理
 23379:     //  ±0,±Inf,NaNはここで除外する
 23380:     if (0L <= l) {
 23381:       XEiJ.regRn[1] = 0;  //正符号
 23382:     } else {
 23383:       XEiJ.regRn[1] = 1;  //負符号
 23384:       l &= 0x7fffffffffffffffL;  //符号bitを消しておく
 23385:     }
 23386:     double x = Double.longBitsToDouble (l);  //絶対値
 23387:     int e = (int) (l >>> 52) - 1023;  //指数部。ゲタ0。符号bitは消してあるのでマスクは不要
 23388:     l &= 0x000fffffffffffffL;  //仮数部の小数部。正規化数のとき整数部の1が付いていないことに注意
 23389:     if (e == -1023) {  //±0,非正規化数
 23390:       if (l == 0L) {  //±0
 23391:         //指定された小数点以下の桁数だけ'0'を並べる
 23392:         while (len2-- > 0) {
 23393:           mmuWriteByteData (a++, '0', 1);
 23394:         }
 23395:         mmuWriteByteData (a, '\0', 1);
 23396:         XEiJ.regRn[0] = 0;  //小数点の位置
 23397:         return;
 23398:       }
 23399:       e -= Long.numberOfLeadingZeros (l) - 12;  //非正規化数の指数部を補正する
 23400:     } else if (e == 1024) {  //±Inf,NaN
 23401:       mmuWriteByteData (a++, '#', 1);
 23402:       if (l == 0L) {  //±Inf
 23403:         mmuWriteByteData (a++, 'I', 1);
 23404:         mmuWriteByteData (a++, 'N', 1);
 23405:         mmuWriteByteData (a++, 'F', 1);
 23406:       } else {  //NaN
 23407:         mmuWriteByteData (a++, 'N', 1);
 23408:         mmuWriteByteData (a++, 'A', 1);
 23409:         mmuWriteByteData (a++, 'N', 1);
 23410:       }
 23411:       mmuWriteByteData (a, '\0', 1);
 23412:       XEiJ.regRn[0] = 4;  //小数点の位置
 23413:       return;
 23414:     }
 23415:     //10進数で表現したときの指数部を求める
 23416:     //  10^e<=x<10^(e+1)となるeを求める
 23417:     e = (int) Math.floor ((double) e * 0.30102999566398119521373889472);  //log10(2)
 23418:     //10^-eを掛けて1<=x<10にする
 23419:     //  非正規化数の最小値から正規化数の最大値まで処理できなければならない
 23420:     //  10^-eを計算してからまとめて掛ける方法はxが非正規化数のとき10^-eがオーバーフローしてしまうので不可
 23421:     //    doubleは非正規化数の逆数を表現できない
 23422:     if (0 < e) {  //10<=x
 23423:       x *= FEFunction.FPK_TEN_M16QR[e & 15];
 23424:       if (16 <= e) {
 23425:         x *= FEFunction.FPK_TEN_M16QR[16 + (e >> 4 & 15)];
 23426:         if (256 <= e) {
 23427:           x *= FEFunction.FPK_TEN_M16QR[33];  //FEFunction.FPK_TEN_M16QR[32 + (e >> 8)]
 23428:         }
 23429:       }
 23430:     } else if (e < 0) {  //x<1
 23431:       x *= FEFunction.FPK_TEN_P16QR[-e & 15];
 23432:       if (e <= -16) {
 23433:         x *= FEFunction.FPK_TEN_P16QR[16 + (-e >> 4 & 15)];
 23434:         if (e <= -256) {
 23435:           x *= FEFunction.FPK_TEN_P16QR[33];  //FEFunction.FPK_TEN_P16QR[32 + (-e >> 8)]
 23436:         }
 23437:       }
 23438:     }
 23439:     //整数部2桁、小数部16桁の10進数に変換する
 23440:     //  1<=x<10なのでw[1]が先頭になるはずだが誤差で前後にずれる可能性がある
 23441:     int[] w = new int[18];
 23442:     {
 23443:       int d = (int) x;
 23444:       int t = XEiJ.FMT_BCD4[d];
 23445:       w[0] = t >> 4;
 23446:       w[1] = t      & 15;
 23447:       for (int i = 2; i < 18; i += 4) {
 23448:         //xを10000倍して整数部dを引くことで小数部を残すが、このとき情報落ちが発生して誤差が蓄積する
 23449:         //Double-Doubleの乗算の要領で10000倍を正確に行い、誤差の蓄積を回避する
 23450:         //x = (x - (double) d) * 10000.0;
 23451:         double xh = x * 0x8000001p0;
 23452:         xh += x - xh;  //xの上半分
 23453:         x = (xh - (double) d) * 10000.0 + (x - xh) * 10000.0;
 23454:         d = (int) x;
 23455:         t = XEiJ.FMT_BCD4[d];
 23456:         w[i    ] = t >> 12;
 23457:         w[i + 1] = t >>  8 & 15;
 23458:         w[i + 2] = t >>  4 & 15;
 23459:         w[i + 3] = t       & 15;
 23460:       }
 23461:     }
 23462:     //先頭の位置を確認する
 23463:     //  w[h]が先頭(0でない最初の数字)の位置
 23464:     int h = w[0] != 0 ? 0 : w[1] != 0 ? 1 : 2;
 23465:     //14+1桁目を四捨五入する
 23466:     int o = h + 14;  //w[o]は四捨五入する桁の位置。w[]の範囲内
 23467:     if (5 <= w[o]) {
 23468:       int i = o;
 23469:       while (10 <= ++w[--i]) {
 23470:         w[i] = 0;
 23471:       }
 23472:       if (i < h) {  //先頭から繰り上がった。このとき新しい先頭は1でそれ以外はすべて0
 23473:         h--;  //先頭を左にずらす
 23474:         o--;  //末尾を左にずらす
 23475:       }
 23476:     }
 23477:     //先頭の位置に応じて指数部を更新する
 23478:     //  w[h]が整数部、w[h+1..o-1]が小数部。10^eの小数点はw[h]の右側。整数部の桁数はe+1桁
 23479:     e -= h - 1;
 23480:     //小数点以下len2+1桁目が先頭から14+1桁目よりも左側にあるときその桁で改めて四捨五入する
 23481:     //  あらかじめ14+1桁目で四捨五入しておかないと、
 23482:     //  1.5の5を四捨五入しなければならないときに誤差で1.499…になったまま4を四捨五入しようとして失敗することがある
 23483:     int s = h + e + 1 + len2;  //w[s]は小数点以下len2+1桁目の位置。w.length<=sの場合があることに注意
 23484:     if (s < o) {
 23485:       o = s;  //w[o]は四捨五入する桁の位置。o<0の場合があることに注意
 23486:       if (0 <= o && 5 <= w[o]) {
 23487:         int i = o;
 23488:         while (10 <= ++w[--i]) {
 23489:           w[i] = 0;
 23490:         }
 23491:         if (i < h) {  //先頭から繰り上がった。このとき新しい先頭は1でそれ以外はすべて0
 23492:           h--;  //先頭を左にずらす
 23493:           o--;  //末尾を左にずらす
 23494:           e++;  //指数部を1増やす
 23495:         }
 23496:       }
 23497:     }
 23498:     //文字列に変換する
 23499:     while (h < o) {
 23500:       mmuWriteByteData (a++, '0' + w[h++], 1);  //有効数字
 23501:     }
 23502:     while (h++ < s) {
 23503:       mmuWriteByteData (a++, '0', 1);  //残りは'0'
 23504:     }
 23505:     mmuWriteByteData (a, '\0', 1);
 23506:     XEiJ.regRn[0] = e + 1;  //小数点の位置
 23507:   }  //fpkFCVTSub6()
 23508: 
 23509:   //fpkGCVT ()
 23510:   //  $FE26  __GCVT
 23511:   //  64bit浮動小数点数を全体の桁数を指定して文字列に変換する
 23512:   //  指定された桁数で表現できないときは指数表現になる
 23513:   //  メモ
 23514:   //    print gcvt(1e-1,10)
 23515:   //    0.1
 23516:   //    print gcvt(1e-8,10)
 23517:   //    0.00000001
 23518:   //    print gcvt(1.5e-8,10)
 23519:   //    1.5E-008
 23520:   //    print gcvt(1e-9,10)
 23521:   //    1.E-009                 小数点はあるが小数部がない
 23522:   //    print gcvt(2e-1/3#,10)
 23523:   //    6.666666667E-002
 23524:   //    print gcvt(2e+0/3#,10)
 23525:   //    0.6666666667
 23526:   //    print gcvt(2e+1/3#,10)
 23527:   //    6.666666667
 23528:   //    print gcvt(2e+9/3#,10)
 23529:   //    666666666.7
 23530:   //    print gcvt(2e+10/3#,10)
 23531:   //    6666666667
 23532:   //    print gcvt(2e+11/3#,10)
 23533:   //    6.666666667E+010
 23534:   //    print gcvt(0#,4)
 23535:   //    0.
 23536:   //    print gcvt(val("#INF"),4)
 23537:   //    #INF
 23538:   //    print gcvt(val("#INF"),3)
 23539:   //    $.E+003
 23540:   //    print gcvt(val("#INF"),2)
 23541:   //    $.E+003
 23542:   //    print gcvt(val("#INF"),1)
 23543:   //    $.E+003
 23544:   //    FLOAT2.XのGCVTは小数部がなくても桁数の範囲内であれば小数点を書く
 23545:   //    桁数ちょうどのときは小数点も指数部も付かないので、整数でないことを明確にするために小数点を書いているとも言い難い
 23546:   //    ここでは#NANと#INF以外は小数部がなくても小数点を書くことにする
 23547:   //  バグ
 23548:   //    FLOAT2.X 2.02/2.03は#NANと#INFにも小数点を付ける
 23549:   //    FLOAT2.X 2.02/2.03は#NANと#INFのとき桁数が足りないと指数形式にしようとして文字列が壊れる
 23550:   //    FLOAT4.X 1.02は#NANと#INFにも小数点を付ける
 23551:   //    FLOAT4.X 1.02は桁数の少ない整数には小数点を付けて桁数ちょうどの整数には小数点も指数部も付けない
 23552:   //  <d0d1.d:64bit浮動小数点数
 23553:   //  <d2.b:全体の桁数
 23554:   //  <a0.l:文字列バッファの先頭
 23555:   //  >a0.l:末尾の'\0'の位置
 23556:   public static void fpkGCVT () throws M68kException {
 23557:     fpkGCVTSub ((long) XEiJ.regRn[0] << 32 | 0xffffffffL & XEiJ.regRn[1]);  //64bit浮動小数点数
 23558:   }  //fpkGCVT()
 23559:   public static void fpkGCVTSub (long l) throws M68kException {
 23560:     int len3 = Math.max (0, XEiJ.regRn[2]);  //全体の桁数
 23561:     int a = XEiJ.regRn[8];  //文字列バッファの先頭
 23562:     //符号と指数部の処理
 23563:     //  ±0,±Inf,NaNはここで除外する
 23564:     if (l < 0L) {
 23565:       mmuWriteByteData (a++, '-', 1);  //負符号
 23566:       l &= 0x7fffffffffffffffL;  //符号bitを消しておく
 23567:     }
 23568:     double x = Double.longBitsToDouble (l);  //絶対値
 23569:     int e = (int) (l >>> 52) - 1023;  //指数部。ゲタ0。符号bitは消してあるのでマスクは不要
 23570:     l &= 0x000fffffffffffffL;  //仮数部の小数部。正規化数のとき整数部の1が付いていないことに注意
 23571:     if (e == -1023) {  //±0,非正規化数
 23572:       if (l == 0L) {  //±0
 23573:         mmuWriteByteData (a++, '0', 1);  //0
 23574:         mmuWriteByteData (a++, '.', 1);  //小数点
 23575:         mmuWriteByteData (a, '\0', 1);
 23576:         XEiJ.regRn[8] = a;  //末尾の'\0'の位置
 23577:         return;
 23578:       }
 23579:       e -= Long.numberOfLeadingZeros (l) - 12;  //非正規化数の指数部を補正する
 23580:     } else if (e == 1024) {  //±Inf,NaN
 23581:       mmuWriteByteData (a++, '#', 1);
 23582:       if (l == 0L) {  //±Inf
 23583:         mmuWriteByteData (a++, 'I', 1);
 23584:         mmuWriteByteData (a++, 'N', 1);
 23585:         mmuWriteByteData (a++, 'F', 1);
 23586:       } else {  //NaN
 23587:         mmuWriteByteData (a++, 'N', 1);
 23588:         mmuWriteByteData (a++, 'A', 1);
 23589:         mmuWriteByteData (a++, 'N', 1);
 23590:       }
 23591:       mmuWriteByteData (a, '\0', 1);
 23592:       XEiJ.regRn[8] = a;  //末尾の'\0'の位置
 23593:       return;
 23594:     }
 23595:     //10進数で表現したときの指数部を求める
 23596:     //  10^e<=x<10^(e+1)となるeを求める
 23597:     e = (int) Math.floor ((double) e * 0.30102999566398119521373889472);  //log10(2)
 23598:     //10^-eを掛けて1<=x<10にする
 23599:     //  非正規化数の最小値から正規化数の最大値まで処理できなければならない
 23600:     //  10^-eを計算してからまとめて掛ける方法はxが非正規化数のとき10^-eがオーバーフローしてしまうので不可
 23601:     //    doubleは非正規化数の逆数を表現できない
 23602:     if (0 < e) {  //10<=x
 23603:       x *= FEFunction.FPK_TEN_M16QR[e & 15];
 23604:       if (16 <= e) {
 23605:         x *= FEFunction.FPK_TEN_M16QR[16 + (e >> 4 & 15)];
 23606:         if (256 <= e) {
 23607:           x *= FEFunction.FPK_TEN_M16QR[33];  //FEFunction.FPK_TEN_M16QR[32 + (e >> 8)]
 23608:         }
 23609:       }
 23610:     } else if (e < 0) {  //x<1
 23611:       x *= FEFunction.FPK_TEN_P16QR[-e & 15];
 23612:       if (e <= -16) {
 23613:         x *= FEFunction.FPK_TEN_P16QR[16 + (-e >> 4 & 15)];
 23614:         if (e <= -256) {
 23615:           x *= FEFunction.FPK_TEN_P16QR[33];  //FEFunction.FPK_TEN_P16QR[32 + (-e >> 8)]
 23616:         }
 23617:       }
 23618:     }
 23619:     //整数部2桁、小数部16桁の10進数に変換する
 23620:     //  1<=x<10なのでw[1]が先頭になるはずだが誤差で前後にずれる可能性がある
 23621:     int[] w = new int[18];
 23622:     {
 23623:       int d = (int) x;
 23624:       int t = XEiJ.FMT_BCD4[d];
 23625:       w[0] = t >> 4;
 23626:       w[1] = t      & 15;
 23627:       for (int i = 2; i < 18; i += 4) {
 23628:         //xを10000倍して整数部dを引くことで小数部を残すが、このとき情報落ちが発生して誤差が蓄積する
 23629:         //Double-Doubleの乗算の要領で10000倍を正確に行い、誤差の蓄積を回避する
 23630:         //x = (x - (double) d) * 10000.0;
 23631:         double xh = x * 0x8000001p0;
 23632:         xh += x - xh;  //xの上半分
 23633:         x = (xh - (double) d) * 10000.0 + (x - xh) * 10000.0;
 23634:         d = (int) x;
 23635:         t = XEiJ.FMT_BCD4[d];
 23636:         w[i    ] = t >> 12;
 23637:         w[i + 1] = t >>  8 & 15;
 23638:         w[i + 2] = t >>  4 & 15;
 23639:         w[i + 3] = t       & 15;
 23640:       }
 23641:     }
 23642:     //先頭の位置を確認する
 23643:     //  w[h]が先頭(0でない最初の数字)の位置
 23644:     int h = w[0] != 0 ? 0 : w[1] != 0 ? 1 : 2;
 23645:     //14+1桁目を四捨五入する
 23646:     int o = h + 14;  //w[o]は四捨五入する桁の位置。w[]の範囲内
 23647:     if (5 <= w[o]) {
 23648:       int i = o;
 23649:       while (10 <= ++w[--i]) {
 23650:         w[i] = 0;
 23651:       }
 23652:       if (i < h) {  //先頭から繰り上がった。このとき新しい先頭は1でそれ以外はすべて0
 23653:         h--;  //先頭を左にずらす
 23654:         o--;  //末尾を左にずらす
 23655:       }
 23656:     }
 23657:     //先頭の位置に応じて指数部を更新する
 23658:     //  w[h]が整数部、w[h+1..o-1]が小数部。10^eの小数点はw[h]の右側。整数部の桁数はe+1桁
 23659:     e -= h - 1;
 23660:     //先頭からlen3+1桁目が先頭から14+1桁目よりも左側にあるときその桁で改めて四捨五入する
 23661:     //  あらかじめ14+1桁目で四捨五入しておかないと、
 23662:     //  1.5の5を四捨五入しなければならないときに誤差で1.499…になったまま4を四捨五入しようとして失敗することがある
 23663:     int s = h + len3;  //w[s]は先頭からlen3+1桁目の位置。w.length<=sの場合があることに注意
 23664:     if (s < o) {
 23665:       o = s;  //w[o]は四捨五入する桁の位置。o<0の場合があることに注意
 23666:       if (0 <= o && 5 <= w[o]) {
 23667:         int i = o;
 23668:         while (10 <= ++w[--i]) {
 23669:           w[i] = 0;
 23670:         }
 23671:         if (i < h) {  //先頭から繰り上がった。このとき新しい先頭は1でそれ以外はすべて0
 23672:           h--;  //先頭を左にずらす
 23673:           o--;  //末尾を左にずらす
 23674:           e++;  //指数部を1増やす
 23675:         }
 23676:       }
 23677:     }
 23678:     //末尾の位置を確認する
 23679:     //  w[o-1]が末尾(0でない最後の数字)の位置
 23680:     while (w[o - 1] == 0) {  //全体は0ではないので必ず止まる。小数点よりも左側で止まる場合があることに注意
 23681:       o--;
 23682:     }
 23683:     //指数形式にするかどうか選択して文字列に変換する
 23684:     if (0 <= e && e < len3) {  //1<=x<10^len3。指数形式にしない
 23685:       do {
 23686:         mmuWriteByteData (a++, '0' + w[h++], 1);  //整数部。末尾の位置に関係なく1の位まで書く
 23687:       } while (0 <= --e);
 23688:       mmuWriteByteData (a++, '.', 1);  //小数部がなくても小数点を書く
 23689:       while (h < o) {
 23690:         mmuWriteByteData (a++, '0' + w[h++], 1);  //小数部
 23691:       }
 23692:     } else if (-4 <= e && e < 0) {  //10^-4<=x<1。指数形式にしない
 23693:       mmuWriteByteData (a++, '0', 1);  //整数部の0
 23694:       mmuWriteByteData (a++, '.', 1);  //小数点
 23695:       while (++e < 0) {
 23696:         mmuWriteByteData (a++, '0', 1);  //小数部の先頭の0の並び
 23697:       }
 23698:       while (h < o) {
 23699:         mmuWriteByteData (a++, '0' + w[h++], 1);  //小数部
 23700:       }
 23701:     } else {  //x<10^-4または10^len3<=x。指数形式にする
 23702:       mmuWriteByteData (a++, '0' + w[h++], 1);  //整数部
 23703:       mmuWriteByteData (a++, '.', 1);  //小数部がなくても小数点を書く
 23704:       while (h < o) {
 23705:         mmuWriteByteData (a++, '0' + w[h++], 1);  //小数部
 23706:       }
 23707:       mmuWriteByteData (a++, 'E', 1);  //指数部の始まり
 23708:       if (0 <= e) {
 23709:         mmuWriteByteData (a++, '+', 1);  //指数部の正符号。省略しない
 23710:       } else {
 23711:         mmuWriteByteData (a++, '-', 1);  //指数部の負符号
 23712:         e = -e;
 23713:       }
 23714:       e = XEiJ.FMT_BCD4[e];
 23715:       mmuWriteByteData (a++, '0' + (e >> 8     ), 1);  //指数部の100の位。0でも省略しない
 23716:       mmuWriteByteData (a++, '0' + (e >> 4 & 15), 1);  //指数部の10の位
 23717:       mmuWriteByteData (a++, '0' + (e      & 15), 1);  //指数部の1の位
 23718:     }
 23719:     mmuWriteByteData (a, '\0', 1);
 23720:     XEiJ.regRn[8] = a;  //末尾の'\0'の位置
 23721:   }  //fpkGCVTSub6()
 23722: 
 23723:   //fpkFVAL ()
 23724:   //  $FE50  __FVAL
 23725:   //  文字列を32bit浮動小数点数に変換する
 23726:   //  __VALとほぼ同じ
 23727:   //  <a0.l:文字列の先頭
 23728:   //  >d0.s:32bit浮動小数点数
 23729:   //  >d2.l:(先頭が'&'でないとき)65535=32bit浮動小数点数をオーバーフローなしでintに変換できる,0=それ以外
 23730:   //  >d3.l:(先頭が'&'でないとき)d2.l==65535のとき32bit浮動小数点数をintに変換した値
 23731:   //  >a0.l:変換された文字列の直後('\0'とは限らない)
 23732:   //  >ccr:0=エラーなし,CCR_N|CCR_C=文法エラー,CCR_V|CCR_C=オーバーフロー
 23733:   public static void fpkFVAL () throws M68kException {
 23734:     int a = XEiJ.regRn[8];  //a0
 23735:     //先頭の空白を読み飛ばす
 23736:     int c = mmuReadByteSignData (a++, 1);
 23737:     while (c == ' ' || c == '\t') {
 23738:       c = mmuReadByteSignData (a++, 1);
 23739:     }
 23740:     if (c == '&') {  //&B,&O,&H
 23741:       c = mmuReadByteSignData (a++, 1) & 0xdf;
 23742:       XEiJ.regRn[8] = a;  //&?の直後
 23743:       if (c == 'B') {
 23744:         fpkSTOB ();
 23745:         FEFunction.fpkLTOF ();
 23746:       } else if (c == 'O') {
 23747:         fpkSTOO ();
 23748:         FEFunction.fpkLTOF ();
 23749:       } else if (c == 'H') {
 23750:         fpkSTOH ();
 23751:         FEFunction.fpkLTOF ();
 23752:       } else {
 23753:         XEiJ.regCCR = XEiJ.REG_CCR_N | XEiJ.REG_CCR_C;  //文法エラー
 23754:       }
 23755:     } else {  //&B,&O,&H以外
 23756:       FEFunction.fpkSTOF ();
 23757:     }
 23758:   }  //fpkFVAL()
 23759: 
 23760:   //fpkCLMUL ()
 23761:   //  $FEE0  __CLMUL
 23762:   //  32bit符号あり整数乗算
 23763:   //  <(a7).l:32bit符号あり整数。被乗数x
 23764:   //  <4(a7).l:32bit符号あり整数。乗数y
 23765:   //  >(a7).l:32bit符号あり整数。積x*y。オーバーフローのときは不定
 23766:   //  >ccr:cs=オーバーフロー。C以外は不定
 23767:   public static void fpkCLMUL () throws M68kException {
 23768:     int a7 = XEiJ.regRn[15];
 23769:     long l = (long) mmuReadLongData (a7, 1) * (long) mmuReadLongData (a7 + 4, 1);
 23770:     int h = (int) l;
 23771:     mmuWriteLongData (a7, h, 1);  //オーバーフローのときは積の下位32bit
 23772:     XEiJ.regCCR = (long) h == l ? 0 : XEiJ.REG_CCR_C;
 23773:   }  //fpkCLMUL()
 23774: 
 23775:   //fpkCLDIV ()
 23776:   //  $FEE1  __CLDIV
 23777:   //  32bit符号あり整数除算
 23778:   //  <(a7).l:32bit符号あり整数。被除数x
 23779:   //  <4(a7).l:32bit符号あり整数。除数y
 23780:   //  >(a7).l:32bit符号あり整数。商x/y。ゼロ除算のときは不定
 23781:   //  >ccr:cs=ゼロ除算。C以外は不定
 23782:   public static void fpkCLDIV () throws M68kException {
 23783:     int a7 = XEiJ.regRn[15];
 23784:     int h = mmuReadLongData (a7 + 4, 1);
 23785:     if (h == 0) {
 23786:       //(a7).lは変化しない
 23787:       XEiJ.regCCR = XEiJ.REG_CCR_C;
 23788:     } else {
 23789:       mmuWriteLongData (a7, mmuReadLongData (a7, 1) / h, 1);
 23790:       XEiJ.regCCR = 0;
 23791:     }
 23792:   }  //fpkCLDIV()
 23793: 
 23794:   //fpkCLMOD ()
 23795:   //  $FEE2  __CLMOD
 23796:   //  32bit符号あり整数剰余算
 23797:   //  <(a7).l:32bit符号あり整数。被除数x
 23798:   //  <4(a7).l:32bit符号あり整数。除数y
 23799:   //  >(a7).l:32bit符号あり整数。余りx%y。ゼロ除算のときは不定
 23800:   //  >ccr:cs=ゼロ除算。C以外は不定
 23801:   public static void fpkCLMOD () throws M68kException {
 23802:     int a7 = XEiJ.regRn[15];
 23803:     int h = mmuReadLongData (a7 + 4, 1);
 23804:     if (h == 0) {
 23805:       //(a7).lは変化しない
 23806:       XEiJ.regCCR = XEiJ.REG_CCR_C;
 23807:     } else {
 23808:       mmuWriteLongData (a7, mmuReadLongData (a7, 1) % h, 1);
 23809:       XEiJ.regCCR = 0;
 23810:     }
 23811:   }  //fpkCLMOD()
 23812: 
 23813:   //fpkCUMUL ()
 23814:   //  $FEE3  __CUMUL
 23815:   //  32bit符号なし整数乗算
 23816:   //  <(a7).l:32bit符号なし整数。被乗数x
 23817:   //  <4(a7).l:32bit符号なし整数。乗数y
 23818:   //  >(a7).l:32bit符号なし整数。積x*y。オーバーフローのときは不定
 23819:   //  >ccr:cs=オーバーフロー。C以外は不定
 23820:   public static void fpkCUMUL () throws M68kException {
 23821:     int a7 = XEiJ.regRn[15];
 23822:     long l = (0xffffffffL & mmuReadLongData (a7, 1)) * (0xffffffffL & mmuReadLongData (a7 + 4, 1));
 23823:     int h = (int) l;
 23824:     mmuWriteLongData (a7, h, 1);
 23825:     XEiJ.regCCR = (0xffffffffL & h) == l ? 0 : XEiJ.REG_CCR_C;
 23826:   }  //fpkCUMUL()
 23827: 
 23828:   //fpkCUDIV ()
 23829:   //  $FEE4  __CUDIV
 23830:   //  32bit符号なし整数除算
 23831:   //  <(a7).l:32bit符号なし整数。被除数x
 23832:   //  <4(a7).l:32bit符号なし整数。除数y
 23833:   //  >(a7).l:32bit符号なし整数。商x/y。ゼロ除算のときは不定
 23834:   //  >ccr:cs=ゼロ除算。C以外は不定
 23835:   public static void fpkCUDIV () throws M68kException {
 23836:     int a7 = XEiJ.regRn[15];
 23837:     int h = mmuReadLongData (a7 + 4, 1);
 23838:     if (h == 0) {
 23839:       //(a7).lは変化しない
 23840:       XEiJ.regCCR = XEiJ.REG_CCR_C;
 23841:     } else {
 23842:       mmuWriteLongData (a7, (int) ((0xffffffffL & mmuReadLongData (a7, 1)) / (0xffffffffL & h)), 1);
 23843:       XEiJ.regCCR = 0;
 23844:     }
 23845:   }  //fpkCUDIV()
 23846: 
 23847:   //fpkCUMOD ()
 23848:   //  $FEE5  __CUMOD
 23849:   //  32bit符号なし整数剰余算
 23850:   //  <(a7).l:32bit符号なし整数。被除数x
 23851:   //  <4(a7).l:32bit符号なし整数。除数y
 23852:   //  >(a7).l:32bit符号なし整数。余りx%y。ゼロ除算のときは不定
 23853:   //  >ccr:cs=ゼロ除算。C以外は不定
 23854:   public static void fpkCUMOD () throws M68kException {
 23855:     int a7 = XEiJ.regRn[15];
 23856:     int h = mmuReadLongData (a7 + 4, 1);
 23857:     if (h == 0) {
 23858:       //(a7).lは変化しない
 23859:       XEiJ.regCCR = XEiJ.REG_CCR_C;
 23860:     } else {
 23861:       mmuWriteLongData (a7, (int) ((0xffffffffL & mmuReadLongData (a7, 1)) % (0xffffffffL & h)), 1);
 23862:       XEiJ.regCCR = 0;
 23863:     }
 23864:   }  //fpkCUMOD()
 23865: 
 23866:   //fpkCLTOD ()
 23867:   //  $FEE6  __CLTOD
 23868:   //  32bit符号あり整数を64bit浮動小数点数に変換する
 23869:   //  <(a7).l:32bit符号あり整数。x
 23870:   //  >(a7).d:64bit浮動小数点数。(double)x
 23871:   public static void fpkCLTOD () throws M68kException {
 23872:     //int→double→[long]→[int,int]
 23873:     int a7 = XEiJ.regRn[15];
 23874:     long l = Double.doubleToLongBits ((double) mmuReadLongData (a7, 1));
 23875:     mmuWriteLongData (a7, (int) (l >>> 32), 1);
 23876:     mmuWriteLongData (a7 + 4, (int) l, 1);
 23877:   }  //fpkCLTOD()
 23878: 
 23879:   //fpkCDTOL ()
 23880:   //  $FEE7  __CDTOL
 23881:   //  64bit浮動小数点数を32bit符号あり整数に変換する
 23882:   //  <(a7).d:64bit浮動小数点数。x
 23883:   //  >(a7).l:32bit符号あり整数。(int)x
 23884:   //  >ccr:cs=オーバーフロー。C以外は不定
 23885:   public static void fpkCDTOL () throws M68kException {
 23886:     //[int,int]→[long]→double→int
 23887:     int a7 = XEiJ.regRn[15];
 23888:     double d = Double.longBitsToDouble ((long) mmuReadLongData (a7, 1) << 32 | 0xffffffffL & mmuReadLongData (a7 + 4, 1));
 23889:     mmuWriteLongData (a7, (int) d, 1);  //オーバーフローのときは最小値または最大値
 23890:     XEiJ.regCCR = (double) Integer.MIN_VALUE - 1.0 < d && d < (double) Integer.MAX_VALUE + 1.0 ? 0 : XEiJ.REG_CCR_C;  //NaN,±Infはエラー
 23891:   }  //fpkCDTOL()
 23892: 
 23893:   //fpkCLTOF ()
 23894:   //  $FEE8  __CLTOF
 23895:   //  32bit符号あり整数を32bit浮動小数点数に変換する
 23896:   //  <(a7).l:32bit符号あり整数。x
 23897:   //  >(a7).s:32bit浮動小数点数。(float)x
 23898:   public static void fpkCLTOF () throws M68kException {
 23899:     //int→float→[int]
 23900:     int a7 = XEiJ.regRn[15];
 23901:     mmuWriteLongData (a7, Float.floatToIntBits ((float) mmuReadLongData (a7, 1)), 1);
 23902:   }  //fpkCLTOF()
 23903: 
 23904:   //fpkCFTOL ()
 23905:   //  $FEE9  __CFTOL
 23906:   //  32bit浮動小数点数を32bit符号あり整数に変換する
 23907:   //  <(a7).s:32bit浮動小数点数。x
 23908:   //  >(a7).l:32bit符号あり整数。(int)x
 23909:   //  >ccr:cs=オーバーフロー。C以外は不定
 23910:   public static void fpkCFTOL () throws M68kException {
 23911:     //[int]→float→int
 23912:     int a7 = XEiJ.regRn[15];
 23913:     float f = Float.intBitsToFloat (mmuReadLongData (a7, 1));
 23914:     mmuWriteLongData (a7, (int) f, 1);
 23915:     XEiJ.regCCR = (float) Integer.MIN_VALUE - 1.0F < f && f < (float) Integer.MAX_VALUE + 1.0F ? 0 : XEiJ.REG_CCR_C;  //NaN,±Infはエラー
 23916:   }  //fpkCFTOL()
 23917: 
 23918:   //fpkCFTOD ()
 23919:   //  $FEEA  __CFTOD
 23920:   //  32bit浮動小数点数を64bit浮動小数点数に変換する
 23921:   //  <(a7).s:32bit浮動小数点数。x
 23922:   //  >(a7).d:64bit浮動小数点数。(double)x
 23923:   public static void fpkCFTOD () throws M68kException {
 23924:     //[int]→float→double→[long]→[int,int]
 23925:     int a7 = XEiJ.regRn[15];
 23926:     long l = Double.doubleToLongBits ((double) Float.intBitsToFloat (mmuReadLongData (a7, 1)));
 23927:     if (FEFunction.FPK_FPCP_NAN && l == 0x7ff8000000000000L) {
 23928:       l = 0x7fffffffffffffffL;
 23929:     }
 23930:     mmuWriteLongData (a7, (int) (l >>> 32), 1);
 23931:     mmuWriteLongData (a7 + 4, (int) l, 1);
 23932:   }  //fpkCFTOD()
 23933: 
 23934:   //fpkCDTOF ()
 23935:   //  $FEEB  __CDTOF
 23936:   //  64bit浮動小数点数を32bit浮動小数点数に変換する
 23937:   //  <(a7).d:64bit浮動小数点数。x
 23938:   //  >(a7).s:32bit浮動小数点数。(float)x
 23939:   //  >ccr:cs=オーバーフロー。C以外は不定
 23940:   public static void fpkCDTOF () throws M68kException {
 23941:     //[int,int]→[long]→double→float→[int]
 23942:     int a7 = XEiJ.regRn[15];
 23943:     double d = Double.longBitsToDouble ((long) mmuReadLongData (a7, 1) << 32 | 0xffffffffL & mmuReadLongData (a7 + 4, 1));
 23944:     int h = Float.floatToIntBits ((float) d);
 23945:     if (FEFunction.FPK_FPCP_NAN && h == 0x7fc00000) {
 23946:       h = 0x7fffffff;
 23947:     }
 23948:     mmuWriteLongData (a7, h, 1);
 23949:     XEiJ.regCCR = (Double.isNaN (d) || Double.isInfinite (d) ||
 23950:            Math.abs (d) < (double) Float.MAX_VALUE + 0.5 * (double) Math.ulp (Float.MAX_VALUE) ? 0 : XEiJ.REG_CCR_C);  //アンダーフローはエラーなし
 23951:   }  //fpkCDTOF()
 23952: 
 23953:   //fpkCDCMP ()
 23954:   //  $FEEC  __CDCMP
 23955:   //  64bit浮動小数点数の比較
 23956:   //  x<=>y
 23957:   //  <(a7).d:64bit浮動小数点数。x
 23958:   //  <8(a7).d:64bit浮動小数点数。y
 23959:   //  >ccr:lt=x<y,eq=x==y,gt=x>y
 23960:   public static void fpkCDCMP () throws M68kException {
 23961:     //([int,int]→[long]→double)<=>([int,int]→[long]→double)
 23962:     int a7 = XEiJ.regRn[15];
 23963:     double xd = Double.longBitsToDouble ((long) mmuReadLongData (a7, 1) << 32 | 0xffffffffL & mmuReadLongData (a7 + 4, 1));
 23964:     double yd = Double.longBitsToDouble ((long) mmuReadLongData (a7 + 8, 1) << 32 | 0xffffffffL & mmuReadLongData (a7 + 12, 1));
 23965:     XEiJ.regCCR = xd < yd ? XEiJ.REG_CCR_N | XEiJ.REG_CCR_C : xd == yd ? XEiJ.REG_CCR_Z : 0;  //どちらかがNaNのときは0
 23966:   }  //fpkCDCMP()
 23967: 
 23968:   //fpkCDADD ()
 23969:   //  $FEED  __CDADD
 23970:   //  64bit浮動小数点数の加算
 23971:   //  <(a7).d:64bit浮動小数点数。被加算数x
 23972:   //  <8(a7).d:64bit浮動小数点数。加算数y
 23973:   //  >(a7).d:64bit浮動小数点数。和x+y
 23974:   //  >ccr:0=エラーなし,CCR_C=アンダーフロー,CCR_V|CCR_C=オーバーフロー
 23975:   public static void fpkCDADD () throws M68kException {
 23976:     //([int,int]→[long]→double)+([int,int]→[long]→double)→[long]→[int,int]
 23977:     int a7 = XEiJ.regRn[15];
 23978:     double xd = Double.longBitsToDouble ((long) mmuReadLongData (a7, 1) << 32 | 0xffffffffL & mmuReadLongData (a7 + 4, 1));
 23979:     double yd = Double.longBitsToDouble ((long) mmuReadLongData (a7 + 8, 1) << 32 | 0xffffffffL & mmuReadLongData (a7 + 12, 1));
 23980:     double zd = xd + yd;
 23981:     long l = Double.doubleToLongBits (zd);
 23982:     if (FEFunction.FPK_FPCP_NAN && l == 0x7ff8000000000000L) {
 23983:       l = 0x7fffffffffffffffL;
 23984:     }
 23985:     mmuWriteLongData (a7, (int) (l >>> 32), 1);
 23986:     mmuWriteLongData (a7 + 4, (int) l, 1);
 23987:     XEiJ.regCCR = (Double.isNaN (xd) || Double.isNaN (yd) ? 0 :  //引数がNaN
 23988:            Double.isNaN (zd) ? XEiJ.REG_CCR_C :  //引数がNaNでないのに結果がNaNのときはエラー。(+Inf)+(-Inf)=NaN
 23989:            Double.isInfinite (xd) || Double.isInfinite (yd) ? 0 :  //引数が±Inf
 23990:            Double.isInfinite (zd) ? XEiJ.REG_CCR_V | XEiJ.REG_CCR_C :  //引数が±Infでないのに結果が±Infのときはオーバーフロー
 23991:            0);
 23992:   }  //fpkCDADD()
 23993: 
 23994:   //fpkCDSUB ()
 23995:   //  $FEEE  __CDSUB
 23996:   //  64bit浮動小数点数の減算
 23997:   //  <(a7).d:64bit浮動小数点数。被減算数x
 23998:   //  <8(a7).d:64bit浮動小数点数。減算数y
 23999:   //  >(a7).d:64bit浮動小数点数。差x-y
 24000:   //  >ccr:cs=エラー,vs=オーバーフロー
 24001:   public static void fpkCDSUB () throws M68kException {
 24002:     //([int,int]→[long]→double)-([int,int]→[long]→double)→[long]→[int,int]
 24003:     int a7 = XEiJ.regRn[15];
 24004:     double xd = Double.longBitsToDouble ((long) mmuReadLongData (a7, 1) << 32 | 0xffffffffL & mmuReadLongData (a7 + 4, 1));
 24005:     double yd = Double.longBitsToDouble ((long) mmuReadLongData (a7 + 8, 1) << 32 | 0xffffffffL & mmuReadLongData (a7 + 12, 1));
 24006:     double zd = xd - yd;
 24007:     long l = Double.doubleToLongBits (zd);
 24008:     if (FEFunction.FPK_FPCP_NAN && l == 0x7ff8000000000000L) {
 24009:       l = 0x7fffffffffffffffL;
 24010:     }
 24011:     mmuWriteLongData (a7, (int) (l >>> 32), 1);
 24012:     mmuWriteLongData (a7 + 4, (int) l, 1);
 24013:     XEiJ.regCCR = (Double.isNaN (xd) || Double.isNaN (yd) ? 0 :  //引数がNaN
 24014:            Double.isNaN (zd) ? XEiJ.REG_CCR_C :  //引数がNaNでないのに結果がNaNのときはエラー。(+Inf)-(+Inf)=NaN
 24015:            Double.isInfinite (xd) || Double.isInfinite (yd) ? 0 :  //引数が±Inf
 24016:            Double.isInfinite (zd) ? XEiJ.REG_CCR_V | XEiJ.REG_CCR_C :  //引数が±Infでないのに結果が±Infのときはオーバーフロー
 24017:            0);
 24018:   }  //fpkCDSUB()
 24019: 
 24020:   //fpkCDMUL ()
 24021:   //  $FEEF  __CDMUL
 24022:   //  64bit浮動小数点数の乗算
 24023:   //  <(a7).d:64bit浮動小数点数。被乗数x
 24024:   //  <8(a7).d:64bit浮動小数点数。乗数y
 24025:   //  >(a7).d:64bit浮動小数点数。積x*y
 24026:   //  >ccr:cs=エラー,vs=オーバーフロー
 24027:   public static void fpkCDMUL () throws M68kException {
 24028:     //([int,int]→[long]→double)*([int,int]→[long]→double)→[long]→[int,int]
 24029:     int a7 = XEiJ.regRn[15];
 24030:     double xd = Double.longBitsToDouble ((long) mmuReadLongData (a7, 1) << 32 | 0xffffffffL & mmuReadLongData (a7 + 4, 1));
 24031:     double yd = Double.longBitsToDouble ((long) mmuReadLongData (a7 + 8, 1) << 32 | 0xffffffffL & mmuReadLongData (a7 + 12, 1));
 24032:     double zd = xd * yd;
 24033:     long l = Double.doubleToLongBits (zd);
 24034:     if (FEFunction.FPK_FPCP_NAN && l == 0x7ff8000000000000L) {
 24035:       l = 0x7fffffffffffffffL;
 24036:     }
 24037:     mmuWriteLongData (a7, (int) (l >>> 32), 1);
 24038:     mmuWriteLongData (a7 + 4, (int) l, 1);
 24039:     XEiJ.regCCR = (Double.isNaN (xd) || Double.isNaN (yd) ? 0 :  //引数がNaN
 24040:            Double.isNaN (zd) ? XEiJ.REG_CCR_C :  //引数がNaNでないのに結果がNaNのときはエラー。(±0)*(±Inf)=NaN
 24041:            Double.isInfinite (xd) || Double.isInfinite (yd) ? 0 :  //引数が±Inf
 24042:            Double.isInfinite (zd) ? XEiJ.REG_CCR_V | XEiJ.REG_CCR_C :  //引数が±Infでないのに結果が±Infのときはオーバーフロー
 24043:            0);
 24044:   }  //fpkCDMUL()
 24045: 
 24046:   //fpkCDDIV ()
 24047:   //  $FEF0  __CDDIV
 24048:   //  64bit浮動小数点数の除算
 24049:   //  <(a7).d:64bit浮動小数点数。被除数x
 24050:   //  <8(a7).d:64bit浮動小数点数。除数y
 24051:   //  >(a7).d:64bit浮動小数点数。商x/y。ゼロ除算のときは不定
 24052:   //  >ccr:cs=エラー,eq=ゼロ除算,vs=オーバーフロー
 24053:   public static void fpkCDDIV () throws M68kException {
 24054:     //([int,int]→[long]→double)/([int,int]→[long]→double)→[long]→[int,int]
 24055:     int a7 = XEiJ.regRn[15];
 24056:     double xd = Double.longBitsToDouble ((long) mmuReadLongData (a7, 1) << 32 | 0xffffffffL & mmuReadLongData (a7 + 4, 1));
 24057:     double yd = Double.longBitsToDouble ((long) mmuReadLongData (a7 + 8, 1) << 32 | 0xffffffffL & mmuReadLongData (a7 + 12, 1));
 24058:     double zd = xd / yd;
 24059:     long l = Double.doubleToLongBits (zd);
 24060:     if (FEFunction.FPK_FPCP_NAN && l == 0x7ff8000000000000L) {
 24061:       l = 0x7fffffffffffffffL;
 24062:     }
 24063:     mmuWriteLongData (a7, (int) (l >>> 32), 1);
 24064:     mmuWriteLongData (a7 + 4, (int) l, 1);
 24065:     XEiJ.regCCR = (Double.isNaN (xd) || Double.isNaN (yd) ? 0 :  //引数がNaN
 24066:            Double.isNaN (zd) ? XEiJ.REG_CCR_C :  //引数がNaNでないのに結果がNaNのときはエラー。(±0)/(±0)=NaN
 24067:            Double.isInfinite (xd) || Double.isInfinite (yd) ? 0 :  //引数が±Inf。(±Inf)/(±0)=(±Inf)
 24068:            yd == 0.0 ? XEiJ.REG_CCR_Z | XEiJ.REG_CCR_C :  //除数が±0のときはゼロ除算
 24069:            Double.isInfinite (zd) ? XEiJ.REG_CCR_V | XEiJ.REG_CCR_C :  //引数が±Infでないのに結果が±Infのときはオーバーフロー
 24070:            0);
 24071:   }  //fpkCDDIV()
 24072: 
 24073:   //fpkCDMOD ()
 24074:   //  $FEF1  __CDMOD
 24075:   //  64bit浮動小数点数の剰余算
 24076:   //  <(a7).d:64bit浮動小数点数。被除数x
 24077:   //  <8(a7).d:64bit浮動小数点数。除数y
 24078:   //  >(a7).d:64bit浮動小数点数。余りx%y。ゼロ除算のときは不定
 24079:   //  >ccr:cs=エラー,eq=ゼロ除算
 24080:   public static void fpkCDMOD () throws M68kException {
 24081:     //([int,int]→[long]→double)%([int,int]→[long]→double)→[long]→[int,int]
 24082:     int a7 = XEiJ.regRn[15];
 24083:     double xd = Double.longBitsToDouble ((long) mmuReadLongData (a7, 1) << 32 | 0xffffffffL & mmuReadLongData (a7 + 4, 1));
 24084:     double yd = Double.longBitsToDouble ((long) mmuReadLongData (a7 + 8, 1) << 32 | 0xffffffffL & mmuReadLongData (a7 + 12, 1));
 24085:     double zd = xd % yd;
 24086:     long l = Double.doubleToLongBits (zd);
 24087:     if (FEFunction.FPK_FPCP_NAN && l == 0x7ff8000000000000L) {
 24088:       l = 0x7fffffffffffffffL;
 24089:     }
 24090:     mmuWriteLongData (a7, (int) (l >>> 32), 1);
 24091:     mmuWriteLongData (a7 + 4, (int) l, 1);
 24092:     XEiJ.regCCR = (Double.isNaN (xd) || Double.isNaN (yd) ? 0 :  //引数がNaN
 24093:            yd == 0.0 ? XEiJ.REG_CCR_Z | XEiJ.REG_CCR_C :  //除数が0のときはゼロ除算。(±Inf)%(±0)=NaN, x%(±0)=(±Inf)
 24094:            Double.isNaN (zd) ? XEiJ.REG_CCR_C :  //引数がNaNでないのに結果がNaNのときはエラー。(±Inf)%y=NaN
 24095:            Double.isInfinite (xd) || Double.isInfinite (yd) ? 0 :  //引数が±Inf
 24096:            Double.isInfinite (zd) ? XEiJ.REG_CCR_V | XEiJ.REG_CCR_C :  //引数が±Infでないのに結果が±Infのときはオーバーフロー
 24097:            0);
 24098:   }  //fpkCDMOD()
 24099: 
 24100:   //fpkCFCMP ()
 24101:   //  $FEF2  __CFCMP
 24102:   //  32bit浮動小数点数の比較
 24103:   //  x<=>y
 24104:   //  <(a7).s:32bit浮動小数点数。x
 24105:   //  <(a7).s:32bit浮動小数点数。y
 24106:   //  >ccr:lt=x<y,eq=x==y,gt=x>y
 24107:   public static void fpkCFCMP () throws M68kException {
 24108:     //([int]→float)<=>([int]→float)
 24109:     int a7 = XEiJ.regRn[15];
 24110:     float xf = Float.intBitsToFloat (mmuReadLongData (a7, 1));
 24111:     float yf = Float.intBitsToFloat (mmuReadLongData (a7 + 4, 1));
 24112:     XEiJ.regCCR = xf < yf ? XEiJ.REG_CCR_N | XEiJ.REG_CCR_C : xf == yf ? XEiJ.REG_CCR_Z : 0;  //どちらかがNaNのときは0
 24113:   }  //fpkCFCMP()
 24114: 
 24115:   //fpkCFADD ()
 24116:   //  $FEF3  __CFADD
 24117:   //  32bit浮動小数点数の加算
 24118:   //  <(a7).s:32bit浮動小数点数。被加算数x
 24119:   //  <4(a7).s:32bit浮動小数点数。加算数y
 24120:   //  >(a7).s:32bit浮動小数点数。和x+y
 24121:   //  >ccr:cs=エラー,vs=オーバーフロー
 24122:   public static void fpkCFADD () throws M68kException {
 24123:     //([int]→float)+([int]→float)→[int]
 24124:     int a7 = XEiJ.regRn[15];
 24125:     float xf = Float.intBitsToFloat (mmuReadLongData (a7, 1));
 24126:     float yf = Float.intBitsToFloat (mmuReadLongData (a7 + 4, 1));
 24127:     float zf = xf + yf;
 24128:     int h = Float.floatToIntBits (zf);
 24129:     if (FEFunction.FPK_FPCP_NAN && h == 0x7fc00000) {
 24130:       h = 0x7fffffff;
 24131:     }
 24132:     mmuWriteLongData (a7, h, 1);
 24133:     XEiJ.regCCR = (Float.isNaN (xf) || Float.isNaN (yf) ? 0 :  //引数がNaN
 24134:            Float.isNaN (zf) ? XEiJ.REG_CCR_C :  //引数がNaNでないのに結果がNaNのときはエラー。(+Inf)+(-Inf)=NaN
 24135:            Float.isInfinite (xf) || Float.isInfinite (yf) ? 0 :  //引数が±Inf
 24136:            Float.isInfinite (zf) ? XEiJ.REG_CCR_V | XEiJ.REG_CCR_C :  //引数が±Infでないのに結果が±Infのときはオーバーフロー
 24137:            0);
 24138:   }  //fpkCFADD()
 24139: 
 24140:   //fpkCFSUB ()
 24141:   //  $FEF4  __CFSUB
 24142:   //  32bit浮動小数点数の減算
 24143:   //  <(a7).s:32bit浮動小数点数。被減算数x
 24144:   //  <4(a7).s:32bit浮動小数点数。減算数y
 24145:   //  >(a7).s:32bit浮動小数点数。差x-y
 24146:   //  >ccr:cs=エラー,vs=オーバーフロー
 24147:   public static void fpkCFSUB () throws M68kException {
 24148:     //([int]→float)-([int]→float)→[int]
 24149:     int a7 = XEiJ.regRn[15];
 24150:     float xf = Float.intBitsToFloat (mmuReadLongData (a7, 1));
 24151:     float yf = Float.intBitsToFloat (mmuReadLongData (a7 + 4, 1));
 24152:     float zf = xf - yf;
 24153:     int h = Float.floatToIntBits (zf);
 24154:     if (FEFunction.FPK_FPCP_NAN && h == 0x7fc00000) {
 24155:       h = 0x7fffffff;
 24156:     }
 24157:     mmuWriteLongData (a7, h, 1);
 24158:     XEiJ.regCCR = (Float.isNaN (xf) || Float.isNaN (yf) ? 0 :  //引数がNaN
 24159:            Float.isNaN (zf) ? XEiJ.REG_CCR_C :  //引数がNaNでないのに結果がNaNのときはエラー。(+Inf)-(+Inf)=NaN
 24160:            Float.isInfinite (xf) || Float.isInfinite (yf) ? 0 :  //引数が±Inf
 24161:            Float.isInfinite (zf) ? XEiJ.REG_CCR_V | XEiJ.REG_CCR_C :  //引数が±Infでないのに結果が±Infのときはオーバーフロー
 24162:            0);
 24163:   }  //fpkCFSUB()
 24164: 
 24165:   //fpkCFMUL ()
 24166:   //  $FEF5  __CFMUL
 24167:   //  32bit浮動小数点数の乗算
 24168:   //  <(a7).s:32bit浮動小数点数。被乗数x
 24169:   //  <4(a7).s:32bit浮動小数点数。乗数y
 24170:   //  >(a7).s:32bit浮動小数点数。積x*y
 24171:   //  >ccr:0=エラーなし,CCR_C=アンダーフロー,CCR_V|CCR_C=オーバーフロー
 24172:   public static void fpkCFMUL () throws M68kException {
 24173:     //([int]→float)*([int]→float)→[int]
 24174:     int a7 = XEiJ.regRn[15];
 24175:     float xf = Float.intBitsToFloat (mmuReadLongData (a7, 1));
 24176:     float yf = Float.intBitsToFloat (mmuReadLongData (a7 + 4, 1));
 24177:     float zf = xf * yf;
 24178:     int h = Float.floatToIntBits (zf);
 24179:     if (FEFunction.FPK_FPCP_NAN && h == 0x7fc00000) {
 24180:       h = 0x7fffffff;
 24181:     }
 24182:     mmuWriteLongData (a7, h, 1);
 24183:     XEiJ.regCCR = (Float.isNaN (xf) || Float.isNaN (yf) ? 0 :  //引数がNaN
 24184:            Float.isNaN (zf) ? XEiJ.REG_CCR_C :  //引数がNaNでないのに結果がNaNのときはエラー。(±0)*(±Inf)=NaN
 24185:            Float.isInfinite (xf) || Float.isInfinite (yf) ? 0 :  //引数が±Inf
 24186:            Float.isInfinite (zf) ? XEiJ.REG_CCR_V | XEiJ.REG_CCR_C :  //引数が±Infでないのに結果が±Infのときはオーバーフロー
 24187:            0);
 24188:   }  //fpkCFMUL()
 24189: 
 24190:   //fpkCFDIV ()
 24191:   //  $FEF6  __CFDIV
 24192:   //  32bit浮動小数点数の除算
 24193:   //  <(a7).s:32bit浮動小数点数。被除数x
 24194:   //  <4(a7).s:32bit浮動小数点数。除数y
 24195:   //  >(a7).s:32bit浮動小数点数。商x/y。ゼロ除算のときは不定
 24196:   //  >ccr:cs=エラー,eq=ゼロ除算,vs=オーバーフロー
 24197:   public static void fpkCFDIV () throws M68kException {
 24198:     //([int]→float)/([int]→float)→[int]
 24199:     int a7 = XEiJ.regRn[15];
 24200:     float xf = Float.intBitsToFloat (mmuReadLongData (a7, 1));
 24201:     float yf = Float.intBitsToFloat (mmuReadLongData (a7 + 4, 1));
 24202:     float zf = xf / yf;
 24203:     int h = Float.floatToIntBits (zf);
 24204:     if (FEFunction.FPK_FPCP_NAN && h == 0x7fc00000) {
 24205:       h = 0x7fffffff;
 24206:     }
 24207:     mmuWriteLongData (a7, h, 1);
 24208:     XEiJ.regCCR = (Float.isNaN (xf) || Float.isNaN (yf) ? 0 :  //引数がNaN
 24209:            Float.isNaN (zf) ? XEiJ.REG_CCR_C :  //引数がNaNでないのに結果がNaNのときはエラー。(±0)/(±0)=NaN
 24210:            Float.isInfinite (xf) || Float.isInfinite (yf) ? 0 :  //引数が±Inf。(±Inf)/(±0)=(±Inf)
 24211:            yf == 0.0F ? XEiJ.REG_CCR_Z | XEiJ.REG_CCR_C :  //除数が±0のときはゼロ除算
 24212:            Float.isInfinite (zf) ? XEiJ.REG_CCR_V | XEiJ.REG_CCR_C :  //引数が±Infでないのに結果が±Infのときはオーバーフロー
 24213:            0);
 24214:   }  //fpkCFDIV()
 24215: 
 24216:   //fpkCFMOD ()
 24217:   //  $FEF7  __CFMOD
 24218:   //  32bit浮動小数点数の剰余算
 24219:   //  <(a7).s:32bit浮動小数点数。被除数x
 24220:   //  <4(a7).s:32bit浮動小数点数。除数y
 24221:   //  >(a7).s:32bit浮動小数点数。余りx%y。ゼロ除算のときは不定
 24222:   //  >ccr:cs=エラー,eq=ゼロ除算
 24223:   public static void fpkCFMOD () throws M68kException {
 24224:     //([int]→float)%([int]→float)→[int]
 24225:     int a7 = XEiJ.regRn[15];
 24226:     float xf = Float.intBitsToFloat (mmuReadLongData (a7, 1));
 24227:     float yf = Float.intBitsToFloat (mmuReadLongData (a7 + 4, 1));
 24228:     float zf = xf % yf;
 24229:     int h = Float.floatToIntBits (zf);
 24230:     if (FEFunction.FPK_FPCP_NAN && h == 0x7fc00000) {
 24231:       h = 0x7fffffff;
 24232:     }
 24233:     mmuWriteLongData (a7, h, 1);
 24234:     XEiJ.regCCR = (Float.isNaN (xf) || Float.isNaN (yf) ? 0 :  //引数がNaN
 24235:            yf == 0.0F ? XEiJ.REG_CCR_Z | XEiJ.REG_CCR_C :  //除数が0のときはゼロ除算。(±Inf)%(±0)=NaN, x%(±0)=(±Inf)
 24236:            Float.isNaN (zf) ? XEiJ.REG_CCR_C :  //引数がNaNでないのに結果がNaNのときはエラー。(±Inf)%y=NaN
 24237:            Float.isInfinite (xf) || Float.isInfinite (yf) ? 0 :  //引数が±Inf
 24238:            Float.isInfinite (zf) ? XEiJ.REG_CCR_V | XEiJ.REG_CCR_C :  //引数が±Infでないのに結果が±Infのときはオーバーフロー
 24239:            0);
 24240:   }  //fpkCFMOD()
 24241: 
 24242:   //fpkCDTST ()
 24243:   //  $FEF8  __CDTST
 24244:   //  64bit浮動小数点数と0の比較
 24245:   //  x<=>0
 24246:   //  <(a7).d:64bit浮動小数点数。x
 24247:   //  >ccr:lt=x<0,eq=x==0,gt=x>0
 24248:   public static void fpkCDTST () throws M68kException {
 24249:     if (true) {
 24250:       int a7 = XEiJ.regRn[15];
 24251:       long l = (long) mmuReadLongData (a7, 1) << 32 | 0xffffffffL & mmuReadLongData (a7 + 4, 1);
 24252:       XEiJ.regCCR = l << 1 == 0L ? XEiJ.REG_CCR_Z : 0L <= l ? 0 : XEiJ.REG_CCR_N;  //NaNのときは0
 24253:     } else {
 24254:       //[int,int]→[long]→double
 24255:       int a7 = XEiJ.regRn[15];
 24256:       double d = Double.longBitsToDouble ((long) mmuReadLongData (a7, 1) << 32 | 0xffffffffL & mmuReadLongData (a7 + 4, 1));
 24257:       XEiJ.regCCR = d < 0.0 ? XEiJ.REG_CCR_N : d == 0.0 ? XEiJ.REG_CCR_Z : 0;  //NaNのときは0
 24258:     }
 24259:   }  //fpkCDTST()
 24260: 
 24261:   //fpkCFTST ()
 24262:   //  $FEF9  __CFTST
 24263:   //  32bit浮動小数点数と0の比較
 24264:   //  x<=>0
 24265:   //  <(a7).s:32bit浮動小数点数。x
 24266:   //  >ccr:lt=x<0,eq=x==0,gt=x>0
 24267:   public static void fpkCFTST () throws M68kException {
 24268:     //[int]→float
 24269:     if (true) {
 24270:       int h = mmuReadLongData (XEiJ.regRn[15], 1);
 24271:       XEiJ.regCCR = h << 1 == 0 ? XEiJ.REG_CCR_Z : 0 <= h ? 0 : XEiJ.REG_CCR_N;  //NaNのときは0
 24272:     } else {
 24273:       //([int]→float)<=>0
 24274:       float f = Float.intBitsToFloat (mmuReadLongData (XEiJ.regRn[15], 1));
 24275:       XEiJ.regCCR = f < 0.0F ? XEiJ.REG_CCR_N : f == 0.0F ? XEiJ.REG_CCR_Z : 0;  //NaNのときは0
 24276:     }
 24277:   }  //fpkCFTST()
 24278: 
 24279:   //fpkCDINC ()
 24280:   //  $FEFA  __CDINC
 24281:   //  64bit浮動小数点数に1を加える
 24282:   //  <(a7).d:64bit浮動小数点数。x
 24283:   //  >(a7).d:64bit浮動小数点数。x+1
 24284:   public static void fpkCDINC () throws M68kException {
 24285:     //([int,int]→[long]→double)+1→[long]→[int,int]
 24286:     int a7 = XEiJ.regRn[15];
 24287:     double xd = Double.longBitsToDouble ((long) mmuReadLongData (a7, 1) << 32 | 0xffffffffL & mmuReadLongData (a7 + 4, 1));
 24288:     double zd = xd + 1.0;
 24289:     long l = Double.doubleToLongBits (zd);
 24290:     if (FEFunction.FPK_FPCP_NAN && l == 0x7ff8000000000000L) {
 24291:       l = 0x7fffffffffffffffL;
 24292:     }
 24293:     mmuWriteLongData (a7, (int) (l >>> 32), 1);
 24294:     mmuWriteLongData (a7 + 4, (int) l, 1);
 24295:     XEiJ.regCCR = Double.isInfinite (zd) && !Double.isInfinite (xd) ? XEiJ.REG_CCR_V | XEiJ.REG_CCR_C : 0;  //結果が±Infだが引数が±Infでないときはオーバーフロー
 24296:   }  //fpkCDINC()
 24297: 
 24298:   //fpkCFINC ()
 24299:   //  $FEFB  __CFINC
 24300:   //  32bit浮動小数点数に1を加える
 24301:   //  <(a7).s:32bit浮動小数点数。x
 24302:   //  >(a7).s:32bit浮動小数点数。x+1
 24303:   public static void fpkCFINC () throws M68kException {
 24304:     //([int]→float)+1→[int]
 24305:     int a7 = XEiJ.regRn[15];
 24306:     float xf = Float.intBitsToFloat (mmuReadLongData (a7, 1));
 24307:     float zf = xf + 1.0F;
 24308:     int h = Float.floatToIntBits (zf);
 24309:     if (FEFunction.FPK_FPCP_NAN && h == 0x7fc00000) {
 24310:       h = 0x7fffffff;
 24311:     }
 24312:     mmuWriteLongData (a7, h, 1);
 24313:     XEiJ.regCCR = Double.isInfinite (zf) && !Float.isInfinite (xf) ? XEiJ.REG_CCR_V | XEiJ.REG_CCR_C : 0;  //結果が±Infだが引数が±Infでないときはオーバーフロー
 24314:   }  //fpkCFINC()
 24315: 
 24316:   //fpkCDDEC ()
 24317:   //  $FEFC  __CDDEC
 24318:   //  64bit浮動小数点数から1を引く
 24319:   //  <(a7).d:64bit浮動小数点数。x
 24320:   //  >(a7).d:64bit浮動小数点数。x-1
 24321:   public static void fpkCDDEC () throws M68kException {
 24322:     //([int,int]→[long]→double)-1→[long]→[int,int]
 24323:     int a7 = XEiJ.regRn[15];
 24324:     double xd = Double.longBitsToDouble ((long) mmuReadLongData (a7, 1) << 32 | 0xffffffffL & mmuReadLongData (a7 + 4, 1));
 24325:     double zd = xd - 1.0;
 24326:     long l = Double.doubleToLongBits (zd);
 24327:     if (FEFunction.FPK_FPCP_NAN && l == 0x7ff8000000000000L) {
 24328:       l = 0x7fffffffffffffffL;
 24329:     }
 24330:     mmuWriteLongData (a7, (int) (l >>> 32), 1);
 24331:     mmuWriteLongData (a7 + 4, (int) l, 1);
 24332:     XEiJ.regCCR = Double.isInfinite (zd) && !Double.isInfinite (xd) ? XEiJ.REG_CCR_V | XEiJ.REG_CCR_C : 0;  //結果が±Infだが引数が±Infでないときはオーバーフロー
 24333:   }  //fpkCDDEC()
 24334: 
 24335:   //fpkCFDEC ()
 24336:   //  $FEFD  __CFDEC
 24337:   //  32bit浮動小数点数から1を引く
 24338:   //  <(a7).s:32bit浮動小数点数。x
 24339:   //  >(a7).s:32bit浮動小数点数。x-1
 24340:   public static void fpkCFDEC () throws M68kException {
 24341:     //([int]→float)-1→[int]
 24342:     int a7 = XEiJ.regRn[15];
 24343:     float xf = Float.intBitsToFloat (mmuReadLongData (a7, 1));
 24344:     float zf = xf - 1.0F;
 24345:     int h = Float.floatToIntBits (zf);
 24346:     if (FEFunction.FPK_FPCP_NAN && h == 0x7fc00000) {
 24347:       h = 0x7fffffff;
 24348:     }
 24349:     mmuWriteLongData (a7, h, 1);
 24350:     XEiJ.regCCR = Double.isInfinite (zf) && !Float.isInfinite (xf) ? XEiJ.REG_CCR_V | XEiJ.REG_CCR_C : 0;  //結果が±Infだが引数が±Infでないときはオーバーフロー
 24351:   }  //fpkCFDEC()
 24352: 
 24353: 
 24354: 
 24355:   //========================================================================================
 24356:   //$$MMU メモリ管理ユニット
 24357: 
 24358:   public static final boolean MMU_DEBUG_COMMAND = false;
 24359:   public static final boolean MMU_DEBUG_TRANSLATION = false;
 24360:   public static final boolean MMU_NOT_ALLOCATE_CACHE = false;  //true=アドレス変換キャッシュをアロケートしない
 24361: 
 24362:   //--------------------------------------------------------------------------------
 24363:   //論理アドレスと物理アドレス
 24364:   //
 24365:   //  ページサイズが4KBの場合
 24366:   //              ┌──  7 ──┬──  7 ──┬── 6──┬─────12─────┐
 24367:   //               31          2524          1817        1211                     0
 24368:   //              ┏━━━━━━┯━━━━━━┯━━━━━┯━━━━━━━━━━━┓
 24369:   //        論理  ┃   ルート   │  ポインタ  │  ページ  │        ページ        ┃
 24370:   //      アドレス┃インデックス│インデックス インデックス       オフセット      ┃
 24371:   //              ┗━━↓━━━┷━━↓━━━┷━━↓━━┷━━━━━↓━━━━━┛
 24372:   //          ┌────┘            │            └────┐      └──────┐
 24373:   //          │    ルートテーブル    │   ポインタテーブル   │    ページテーブル  │
 24374:   //        ┌┼→┏━━━━━━━┓┌┼→┏━━━━━━━┓┌┼→┏━━━━━━━┓│
 24375:   //        ││ 0┃              ┃││ 0┃              ┃││ 0┃              ┃│
 24376:   //        ││  ┃              ┃││  ┃              ┃│└→┠───────┨│
 24377:   //        │└→┠───────┨││  ┃              ┃│    ┃    ページ    ┃│
 24378:   //      ルート  ┃    ルート    ┃│└→┠───────┨│┌─←ディスクリプタ┃│
 24379:   //     ポインタ ┃ディスクリプタ→┘    ┃   ポインタ   ┃││  ┠───────┨│
 24380:   //              ┠───────┨      ┃ディスクリプタ→┘│63┃              ┃│
 24381:   //              ┃              ┃      ┠───────┨  │  ┗━━━━━━━┛│
 24382:   //           127┃              ┃   127┃              ┃  │                    │
 24383:   //              ┗━━━━━━━┛      ┗━━━━━━━┛  │                    │
 24384:   //                                  ┌───────────┘      ┌──────┘
 24385:   //              ┏━━━━━━━━━↓━━━━━━━━━┯━━━━━↓━━━━━┓
 24386:   //        物理  ┃              物理ページ              │        ページ        ┃
 24387:   //      アドレス┃               アドレス               │      オフセット      ┃
 24388:   //              ┗━━━━━━━━━━━━━━━━━━━┷━━━━━━━━━━━┛
 24389:   //               31                                    1211                     0
 24390:   //              └─────────20─────────┴─────12─────┘
 24391:   //
 24392:   //  ページサイズが8KBの場合
 24393:   //              ┌──  7 ──┬──  7 ──┬─  5 ─┬───── 13 ─────┐
 24394:   //               31          2524          1817      1312                       0
 24395:   //              ┏━━━━━━┯━━━━━━┯━━━━┯━━━━━━━━━━━━┓
 24396:   //        論理  ┃   ルート   │  ポインタ  │ ページ │         ページ         ┃
 24397:   //      アドレス┃インデックス│インデックスインデックス       オフセット       ┃
 24398:   //              ┗━━↓━━━┷━━↓━━━┷━━↓━┷━━━━━━↓━━━━━┛
 24399:   //          ┌────┘            │            └────┐      └──────┐
 24400:   //          │    ルートテーブル    │   ポインタテーブル   │    ページテーブル  │
 24401:   //        ┌┼→┏━━━━━━━┓┌┼→┏━━━━━━━┓┌┼→┏━━━━━━━┓│
 24402:   //        ││ 0┃              ┃││ 0┃              ┃││ 0┃              ┃│
 24403:   //        ││  ┃              ┃││  ┃              ┃│└→┠───────┨│
 24404:   //        │└→┠───────┨││  ┃              ┃│    ┃    ページ    ┃│
 24405:   //      ルート  ┃    ルート    ┃│└→┠───────┨│┌─←ディスクリプタ┃│
 24406:   //     ポインタ ┃ディスクリプタ→┘    ┃   ポインタ   ┃││  ┠───────┨│
 24407:   //              ┠───────┨      ┃ディスクリプタ→┘│31┃              ┃│
 24408:   //              ┃              ┃      ┠───────┨  │  ┗━━━━━━━┛│
 24409:   //           127┃              ┃   127┃              ┃  │                    │
 24410:   //              ┗━━━━━━━┛      ┗━━━━━━━┛  │                    │
 24411:   //                                  ┌───────────┘      ┌──────┘
 24412:   //              ┏━━━━━━━━━↓━━━━━━━━┯━━━━━━↓━━━━━┓
 24413:   //        物理  ┃             物理ページ             │         ページ         ┃
 24414:   //      アドレス┃              アドレス              │       オフセット       ┃
 24415:   //              ┗━━━━━━━━━━━━━━━━━━┷━━━━━━━━━━━━┛
 24416:   //               31                                  1312                       0
 24417:   //              └──────── 19 ────────┴───── 13 ─────┘
 24418:   //
 24419:   public static final int MMU_ROOT_INDEX_BIT0       = 25;
 24420:   public static final int MMU_POINTER_INDEX_BIT0    = 18;
 24421:   public static final int MMU_PAGE_INDEX_BIT0_4KB   = 12;
 24422:   public static final int MMU_PAGE_INDEX_BIT0_8KB   = 13;
 24423:   public static final int MMU_PAGE_SIZE_4KB         = 1 << MMU_PAGE_INDEX_BIT0_4KB;
 24424:   public static final int MMU_PAGE_SIZE_8KB         = 1 << MMU_PAGE_INDEX_BIT0_8KB;
 24425:   //                                                    33222222_22221111_111111
 24426:   //                                                    10987654_32109876_54321098_76543210
 24427:   public static final int MMU_ROOT_INDEX_MASK       = 0b11111110_00000000_00000000_00000000;
 24428:   public static final int MMU_POINTER_INDEX_MASK    = 0b00000001_11111100_00000000_00000000;
 24429:   public static final int MMU_PAGE_INDEX_MASK_4KB   = 0b00000000_00000011_11110000_00000000;
 24430:   public static final int MMU_PAGE_INDEX_MASK_8KB   = 0b00000000_00000011_11100000_00000000;
 24431:   public static final int MMU_PAGE_OFFSET_MASK_4KB  = 0b00000000_00000000_00001111_11111111;
 24432:   public static final int MMU_PAGE_OFFSET_MASK_8KB  = 0b00000000_00000000_00011111_11111111;
 24433:   public static final int MMU_PAGE_ADDRESS_MASK_4KB = 0b11111111_11111111_11110000_00000000;
 24434:   public static final int MMU_PAGE_ADDRESS_MASK_8KB = 0b11111111_11111111_11100000_00000000;
 24435: 
 24436:   //--------------------------------------------------------------------------------
 24437:   //透過変換レジスタ
 24438:   //
 24439:   //  DTT0  データ透過変換レジスタ0
 24440:   //  DTT1  データ透過変換レジスタ1
 24441:   //  ITT0  命令透過変換レジスタ0
 24442:   //  ITT1  命令透過変換レジスタ1
 24443:   //      31  30  29  28  27  26  25  24  23  22  21  20  19  18  17  16  15  14  13  12  11  10   9   8   7   6   5   4   3   2   1   0
 24444:   //    ┏━━━━━━━━━━━━━━━┯━━━━━━━━━━━━━━━┯━┯━┯━┯━━━━━┯━┯━┯━┯━━━┯━━━┯━┯━━━┓
 24445:   //    ┃      論理アドレスベース      │      論理アドレスマスク      │ E│IS│US│     0    │U1│U0│ 0│  CM  │   0  │ W│   0  ┃
 24446:   //    ┗━━━━━━━━━━━━━━━┷━━━━━━━━━━━━━━━┷━┷━┷━┷━━━━━┷━┷━┷━┷━━━┷━━━┷━┷━━━┛
 24447:   public static final int MMU_TTR_BASE            = 255 << 24;  //x  Logical Address Base
 24448:   public static final int MMU_TTR_MASK            = 255 << 16;  //x  Logical Address Mask
 24449:   public static final int MMU_TTR_ENABLE          =   1 << 15;  //x  E   Enable
 24450:   public static final int MMU_TTR_IGNORE_FC2      =   1 << 14;  //x  IS  Ignore FC2 when matching
 24451:   public static final int MMU_TTR_USER_SUPERVISOR =   1 << 13;  //x  US  User or Supervisor when IS=0
 24452:   public static final int MMU_TTR_US_USER         =   0 << 13;  //         Match only if FC2=0 (user mode access)
 24453:   public static final int MMU_TTR_US_SUPERVISOR   =   1 << 13;  //         Match only if FC2=1 (supervisor mode access)
 24454:   public static final int MMU_TTR_WRITE_PROTECT   =   1 <<  2;  //x  W   Write Protect
 24455:   public static int mmuDTT0;  //DTT0
 24456:   public static int mmuDTT1;  //DTT1
 24457:   public static int mmuITT0;  //ITT0
 24458:   public static int mmuITT1;  //ITT1
 24459:   //  透過変換マップ
 24460:   //    インデックス
 24461:   //      a >>> 24
 24462:   //    値
 24463:   //      -1  透過変換あり,ライトプロテクトあり → リードのときアドレス変換なし、ライトのときアクセスフォルト
 24464:   //       0  透過変換なし                      → アドレス変換あり
 24465:   //       1  透過変換あり,ライトプロテクトなし → アドレス変換なし
 24466:   public static int[] mmuUserDataTransparent;  //ユーザデータ透過変換マップ
 24467:   public static int[] mmuUserCodeTransparent;  //ユーザ命令透過変換マップ
 24468:   public static int[] mmuSuperDataTransparent;  //スーパーバイザデータ透過変換マップ
 24469:   public static int[] mmuSuperCodeTransparent;  //スーパーバイザ命令透過変換マップ
 24470:   public static int[] mmuUserDataDifference;  //ユーザデータ透過変換差分マップ
 24471:   public static int[] mmuUserCodeDifference;  //ユーザ命令透過変換差分マップ
 24472:   public static int[] mmuSuperDataDifference;  //スーパーバイザデータ透過変換差分マップ
 24473:   public static int[] mmuSuperCodeDifference;  //スーパーバイザ命令透過変換差分マップ
 24474: 
 24475:   //d = mmuGetDTT0 ()
 24476:   //  DTT0を読む
 24477:   public static int mmuGetDTT0 () {
 24478:     return mmuDTT0;
 24479:   }  //mmuGetDTT0()
 24480: 
 24481:   //d = mmuGetDTT1 ()
 24482:   //  DTT1を読む
 24483:   public static int mmuGetDTT1 () {
 24484:     return mmuDTT1;
 24485:   }  //mmuGetDTT1()
 24486: 
 24487:   //d = mmuGetITT0 ()
 24488:   //  ITT0を読む
 24489:   public static int mmuGetITT0 () {
 24490:     return mmuITT0;
 24491:   }  //mmuGetITT0()
 24492: 
 24493:   //d = mmuGetITT1 ()
 24494:   //  ITT1を読む
 24495:   public static int mmuGetITT1 () {
 24496:     return mmuITT1;
 24497:   }  //mmuGetITT1()
 24498: 
 24499:   //mmuSetDTT0 (d)
 24500:   //  DTT0に書く
 24501:   public static void mmuSetDTT0 (int d) {
 24502:     mmuSetDataTransparent (d, mmuDTT1);
 24503:     if (MMU_DEBUG_COMMAND) {
 24504:       System.out.printf ("%08x mmuSetDTT0(0x%08x)\n", XEiJ.regPC0, mmuDTT0);
 24505:     }
 24506:   }  //mmuSetDTT0(int)
 24507: 
 24508:   //mmuSetDTT1 (d)
 24509:   //  DTT1に書く
 24510:   public static void mmuSetDTT1 (int d) {
 24511:     mmuSetDataTransparent (mmuDTT0, d);
 24512:     if (MMU_DEBUG_COMMAND) {
 24513:       System.out.printf ("%08x mmuSetDTT1(0x%08x)\n", XEiJ.regPC0, mmuDTT1);
 24514:     }
 24515:   }  //mmuSetDTT1(int)
 24516: 
 24517:   //mmuSetDataTransparent (d0, d1)
 24518:   //  DTT0,DTT1に書く
 24519:   //  データ透過変換マップを更新する
 24520:   //  DTT0とDTT1の両方がヒットするときDTT0を用いるため、DTT1の変換を展開してからDTT0の変換を上書きする
 24521:   //  DTT1でライトプロテクトされていてもDTT0でライトプロテクトされていなければ書き込める
 24522:   public static void mmuSetDataTransparent (int d0, int d1) {
 24523:     mmuDTT0 = d0 & 0xffffe364;
 24524:     mmuDTT1 = d1 & 0xffffe364;
 24525:     //透過変換マップと透過変換差分マップを入れ換える
 24526:     {
 24527:       int[] t = mmuUserDataDifference;
 24528:       mmuUserDataDifference = mmuUserDataTransparent;
 24529:       mmuUserDataTransparent = t;
 24530:       t = mmuSuperDataDifference;
 24531:       mmuSuperDataDifference = mmuSuperDataTransparent;
 24532:       mmuSuperDataTransparent = t;
 24533:     }
 24534:     //透過変換マップを構築する
 24535:     Arrays.fill (mmuUserDataTransparent, 0);  //透過変換なし
 24536:     Arrays.fill (mmuSuperDataTransparent, 0);  //透過変換なし
 24537:     if ((short) mmuDTT1 < 0) {  //(mmuDTT1 & MMU_TTR_ENABLE) != 0。有効
 24538:       int mask = ~mmuDTT1 >>> 16 & 255;
 24539:       int base = mmuDTT1 >>> 24 & mask;
 24540:       int writeProtect = (mmuDTT1 & MMU_TTR_WRITE_PROTECT) != 0 ? -1 : 1;  //-1=ライトプロテクトあり,1=ライトプロテクトなし
 24541:       if ((mmuDTT1 & MMU_TTR_IGNORE_FC2) != 0 ||
 24542:           (mmuDTT1 & MMU_TTR_USER_SUPERVISOR) == MMU_TTR_US_USER) {  //ユーザモードで有効
 24543:         for (int block = 0; block < 256; block++) {
 24544:           //if (((block << 24 ^ mmuDTT1) & ~mmuDTT1 << 8) >>> 24 == 0) {
 24545:           if ((block & mask) == base) {
 24546:             mmuUserDataTransparent[block] = writeProtect;
 24547:           }
 24548:         }
 24549:       }
 24550:       if ((mmuDTT1 & MMU_TTR_IGNORE_FC2) != 0 ||
 24551:           (mmuDTT1 & MMU_TTR_USER_SUPERVISOR) == MMU_TTR_US_SUPERVISOR) {  //スーパーバイザモードで有効
 24552:         for (int block = 0; block < 256; block++) {
 24553:           //if (((block << 24 ^ mmuDTT1) & ~mmuDTT1 << 8) >>> 24 == 0) {
 24554:           if ((block & mask) == base) {
 24555:             mmuSuperDataTransparent[block] = writeProtect;
 24556:           }
 24557:         }
 24558:       }
 24559:     }
 24560:     if ((short) mmuDTT0 < 0) {  //(mmuDTT0 & MMU_TTR_ENABLE) != 0。有効
 24561:       int mask = ~mmuDTT0 >>> 16 & 255;
 24562:       int base = mmuDTT0 >>> 24 & mask;
 24563:       int writeProtect = (mmuDTT0 & MMU_TTR_WRITE_PROTECT) != 0 ? -1 : 1;  //-1=ライトプロテクトあり,1=ライトプロテクトなし
 24564:       if ((mmuDTT0 & MMU_TTR_IGNORE_FC2) != 0 ||
 24565:           (mmuDTT0 & MMU_TTR_USER_SUPERVISOR) == MMU_TTR_US_USER) {  //ユーザモードで有効
 24566:         for (int block = 0; block < 256; block++) {
 24567:           //if (((block << 24 ^ mmuDTT0) & ~mmuDTT0 << 8) >>> 24 == 0) {
 24568:           if ((block & mask) == base) {
 24569:             mmuUserDataTransparent[block] = writeProtect;
 24570:           }
 24571:         }
 24572:       }
 24573:       if ((mmuDTT0 & MMU_TTR_IGNORE_FC2) != 0 ||
 24574:           (mmuDTT0 & MMU_TTR_USER_SUPERVISOR) == MMU_TTR_US_SUPERVISOR) {  //スーパーバイザモードで有効
 24575:         for (int block = 0; block < 256; block++) {
 24576:           //if (((block << 24 ^ mmuDTT0) & ~mmuDTT0 << 8) >>> 24 == 0) {
 24577:           if ((block & mask) == base) {
 24578:             mmuSuperDataTransparent[block] = writeProtect;
 24579:           }
 24580:         }
 24581:       }
 24582:     }
 24583:     //透過変換差分マップを作る
 24584:     int difference = 0;
 24585:     for (int block = 0; block < 256; block++) {
 24586:       difference |= mmuUserDataDifference[block] -= mmuUserDataTransparent[block];
 24587:       difference |= mmuSuperDataDifference[block] -= mmuSuperDataTransparent[block];
 24588:     }
 24589:     //透過変換の状態が変化したブロックのエントリを無効化する
 24590:     if (difference != 0) {
 24591:       for (int i = 0; i < 4 * MMU_CACHE_WAYS * MMU_HASH_SIZE; i += 4) {
 24592:         int logicalPage = mmuUserDataCache[i];
 24593:         if (logicalPage != 1 &&  //有効なエントリで
 24594:             mmuUserDataDifference[logicalPage >>> 24] != 0) {  //透過変換の状態が変化した
 24595:           mmuUserDataCache[i] = mmuUserDataCache[i + 1] = mmuUserDataCache[i + 2] = mmuUserDataCache[i + 3] = 1;  //無効化する
 24596:         }
 24597:         logicalPage = mmuSuperDataCache[i];
 24598:         if (logicalPage != 1 &&  //有効なエントリで
 24599:             mmuSuperDataDifference[logicalPage >>> 24] != 0) {  //透過変換の状態が変化した
 24600:           mmuSuperDataCache[i] = mmuSuperDataCache[i + 1] = mmuSuperDataCache[i + 2] = mmuSuperDataCache[i + 3] = 1;  //無効化する
 24601:         }
 24602:       }
 24603:     }
 24604:   }  //mmuSetDataTransparent(int,int)
 24605: 
 24606:   //mmuSetITT0 (d)
 24607:   //  ITT0に書く
 24608:   public static void mmuSetITT0 (int d) {
 24609:     mmuSetCodeTransparent (d, mmuITT1);
 24610:     if (MMU_DEBUG_COMMAND) {
 24611:       System.out.printf ("%08x mmuSetITT0(0x%08x)\n", XEiJ.regPC0, mmuITT0);
 24612:     }
 24613:   }  //mmuSetITT0(int)
 24614: 
 24615:   //mmuSetITT1 (d)
 24616:   //  ITT1に書く
 24617:   public static void mmuSetITT1 (int d) {
 24618:     mmuSetCodeTransparent (mmuITT0, d);
 24619:     if (MMU_DEBUG_COMMAND) {
 24620:       System.out.printf ("%08x mmuSetITT1(0x%08x)\n", XEiJ.regPC0, mmuITT1);
 24621:     }
 24622:   }  //mmuSetITT1(int)
 24623: 
 24624:   //mmuSetCodeTransparent (d0, d1)
 24625:   //  ITT0,ITT1に書く
 24626:   //  命令透過変換マップを更新する
 24627:   //  ITT0とITT1の両方がヒットするときITT0を用いるため、ITT1の変換を展開してからITT0の変換を上書きする
 24628:   public static void mmuSetCodeTransparent (int d0, int d1) {
 24629:     mmuITT0 = d0 & 0xffffe364;
 24630:     mmuITT1 = d1 & 0xffffe364;
 24631:     //透過変換マップと透過変換差分マップを入れ換える
 24632:     {
 24633:       int[] t = mmuUserCodeDifference;
 24634:       mmuUserCodeDifference = mmuUserCodeTransparent;
 24635:       mmuUserCodeTransparent = t;
 24636:       t = mmuSuperCodeDifference;
 24637:       mmuSuperCodeDifference = mmuSuperCodeTransparent;
 24638:       mmuSuperCodeTransparent = t;
 24639:     }
 24640:     //透過変換マップを構築する
 24641:     Arrays.fill (mmuUserCodeTransparent, 0);  //透過変換なし
 24642:     Arrays.fill (mmuSuperCodeTransparent, 0);  //透過変換なし
 24643:     if ((short) mmuITT1 < 0) {  //(mmuITT1 & MMU_TTR_ENABLE) != 0。有効
 24644:       int mask = ~mmuITT1 >>> 16 & 255;
 24645:       int base = mmuITT1 >>> 24 & mask;
 24646:       int writeProtect = (mmuITT1 & MMU_TTR_WRITE_PROTECT) != 0 ? -1 : 1;  //-1=ライトプロテクトあり,1=ライトプロテクトなし
 24647:       if ((mmuITT1 & MMU_TTR_IGNORE_FC2) != 0 ||
 24648:           (mmuITT1 & MMU_TTR_USER_SUPERVISOR) == MMU_TTR_US_USER) {  //ユーザモードで有効
 24649:         for (int block = 0; block < 256; block++) {
 24650:           //if (((block << 24 ^ mmuITT1) & ~mmuITT1 << 8) >>> 24 == 0) {
 24651:           if ((block & mask) == base) {
 24652:             mmuUserCodeTransparent[block] = writeProtect;
 24653:           }
 24654:         }
 24655:       }
 24656:       if ((mmuITT1 & MMU_TTR_IGNORE_FC2) != 0 ||
 24657:           (mmuITT1 & MMU_TTR_USER_SUPERVISOR) == MMU_TTR_US_SUPERVISOR) {  //スーパーバイザモードで有効
 24658:         for (int block = 0; block < 256; block++) {
 24659:           //if (((block << 24 ^ mmuITT1) & ~mmuITT1 << 8) >>> 24 == 0) {
 24660:           if ((block & mask) == base) {
 24661:             mmuSuperCodeTransparent[block] = writeProtect;
 24662:           }
 24663:         }
 24664:       }
 24665:     }
 24666:     if ((short) mmuITT0 < 0) {  //(mmuITT0 & MMU_TTR_ENABLE) != 0。有効
 24667:       int mask = ~mmuITT0 >>> 16 & 255;
 24668:       int base = mmuITT0 >>> 24 & mask;
 24669:       int writeProtect = (mmuITT0 & MMU_TTR_WRITE_PROTECT) != 0 ? -1 : 1;  //-1=ライトプロテクトあり,1=ライトプロテクトなし
 24670:       if ((mmuITT0 & MMU_TTR_IGNORE_FC2) != 0 ||
 24671:           (mmuITT0 & MMU_TTR_USER_SUPERVISOR) == MMU_TTR_US_USER) {  //ユーザモードで有効
 24672:         for (int block = 0; block < 256; block++) {
 24673:           //if (((block << 24 ^ mmuITT0) & ~mmuITT0 << 8) >>> 24 == 0) {
 24674:           if ((block & mask) == base) {
 24675:             mmuUserCodeTransparent[block] = writeProtect;
 24676:           }
 24677:         }
 24678:       }
 24679:       if ((mmuITT0 & MMU_TTR_IGNORE_FC2) != 0 ||
 24680:           (mmuITT0 & MMU_TTR_USER_SUPERVISOR) == MMU_TTR_US_SUPERVISOR) {  //スーパーバイザモードで有効
 24681:         for (int block = 0; block < 256; block++) {
 24682:           //if (((block << 24 ^ mmuITT0) & ~mmuITT0 << 8) >>> 24 == 0) {
 24683:           if ((block & mask) == base) {
 24684:             mmuSuperCodeTransparent[block] = writeProtect;
 24685:           }
 24686:         }
 24687:       }
 24688:     }
 24689:     //透過変換差分マップを作る
 24690:     int difference = 0;
 24691:     for (int block = 0; block < 256; block++) {
 24692:       difference |= mmuUserCodeDifference[block] -= mmuUserCodeTransparent[block];
 24693:       difference |= mmuSuperCodeDifference[block] -= mmuSuperCodeTransparent[block];
 24694:     }
 24695:     //透過変換の状態が変化したブロックのエントリを無効化する
 24696:     if (difference != 0) {
 24697:       for (int i = 0; i < 4 * MMU_CACHE_WAYS * MMU_HASH_SIZE; i += 4) {
 24698:         int logicalPage = mmuUserCodeCache[i];
 24699:         if (logicalPage != 1 &&  //有効なエントリで
 24700:             mmuUserCodeDifference[logicalPage >>> 24] != 0) {  //透過変換の状態が変化した
 24701:           mmuUserCodeCache[i] = mmuUserCodeCache[i + 1] = mmuUserCodeCache[i + 2] = mmuUserCodeCache[i + 3] = 1;  //無効化する
 24702:         }
 24703:         logicalPage = mmuSuperCodeCache[i];
 24704:         if (logicalPage != 1 &&  //有効なエントリで
 24705:             mmuSuperCodeDifference[logicalPage >>> 24] != 0) {  //透過変換の状態が変化した
 24706:           mmuSuperCodeCache[i] = mmuSuperCodeCache[i + 1] = mmuSuperCodeCache[i + 2] = mmuSuperCodeCache[i + 3] = 1;  //無効化する
 24707:         }
 24708:       }
 24709:     }
 24710:   }  //mmuSetCodeTransparent(int,int)
 24711: 
 24712:   //--------------------------------------------------------------------------------
 24713:   //変換制御レジスタ
 24714:   //
 24715:   //  TCR  変換制御レジスタ
 24716:   //      31  30  29  28  27  26  25  24  23  22  21  20  19  18  17  16  15  14  13  12  11  10   9   8   7   6   5   4   3   2   1   0
 24717:   //    ┏━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━┯━┯━┯━┯━┯━┯━┯━━━┯━━━┯━┯━━━┯━━━┯━┓
 24718:   //    ┃                               0                              │ E│ P NAD NAI FOTC FITC  DCO │  DUO │DWO   DCI │  DUI │ 0┃
 24719:   //    ┗━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━┷━┷━┷━┷━┷━┷━┷━━━┷━━━┷━┷━━━┷━━━┷━┛
 24720:   public static final int MMU_TCR_ENABLE    = 1 << 15;  //x  E     Enable
 24721:   public static final int MMU_TCR_PAGE_SIZE = 1 << 14;  //x  P     Page Size
 24722:   public static final int MMU_TCR_P_4KB     = 0 << 14;  //           4KB
 24723:   public static final int MMU_TCR_P_8KB     = 1 << 14;  //           8KB
 24724:   public static final int MMU_TCR_NAD       = 1 << 13;  //x  NAD   No Allocate Mode (Data ATC)。データATCはヒットするが更新されない
 24725:   public static final int MMU_TCR_NAI       = 1 << 12;  //x  NAI   No Allocate Mode (Instruction ATC)。命令ATCはヒットするが更新されない
 24726:   public static final int MMU_TCR_FOTC      = 1 << 11;  //   FOTC  1/2-Cache Mode (Data ATC)。データATCは0=64エントリ,1=32エントリ
 24727:   public static final int MMU_TCR_FITC      = 1 << 10;  //   FITC  1/2-Cache Mode (Instruction ATC)。命令ATCは0=64エントリ,1=32エントリ
 24728:   public static final int MMU_TCR_DCO       = 3 <<  8;  //   DCO   Default Cache Mode (Data Cache)。デフォルトデータキャッシュモード
 24729:   public static final int MMU_TCR_DUO       = 3 <<  6;  //   DUO   Default UPA bits (Data Cache)。デフォルトデータUPA
 24730:   public static final int MMU_TCR_DWO       = 1 <<  5;  //   DWO   Default Write Protect (Data Cache)。デフォルトライトプロテクト
 24731:   public static final int MMU_TCR_DCI       = 3 <<  3;  //   DCI   Default Cache Mode (Instruction Cache)。デフォルト命令キャッシュモード
 24732:   public static final int MMU_TCR_DUI       = 3 <<  1;  //   DUI   Default UPA bits (Instruction Cache)。デフォルト命令UPA
 24733:   public static int mmuTCR;  //TCR
 24734:   public static boolean mmuEnabled;  //true=アドレス変換有効
 24735:   public static boolean mmu4KB;  //false=8KB,true=4KB
 24736:   public static boolean mmuNotAllocateData;  //true=データアドレス変換キャッシュをアロケートしない
 24737:   public static boolean mmuNotAllocateCode;  //true=命令アドレス変換キャッシュをアロケートしない
 24738:   public static int mmuPageSize;  //ページサイズ
 24739:   public static int mmuPageAddressMask;  //ページアドレスのマスク
 24740:   public static int mmuPageOffsetMask;  //ページオフセットのマスク
 24741:   public static int mmuPageIndexMask;  //ページインデックスのマスク
 24742:   public static int mmuPageIndexBit2;  //ページインデックスのbit番号-2
 24743:   public static int mmuPageTableMask;  //ページテーブルの先頭アドレスのマスク
 24744: 
 24745:   //d = mmuGetTCR ()
 24746:   //  TCRを読む
 24747:   public static int mmuGetTCR () {
 24748:     return mmuTCR;
 24749:   }  //mmuGetTCR()
 24750: 
 24751:   //mmuSetTCR (d)
 24752:   //  TCRに書く
 24753:   public static void mmuSetTCR (int d) {
 24754:     mmuInvalidateAllCache ();  //高速化のためアドレス変換していないときもキャッシュに乗せているので、アドレス変換を有効にしたときキャッシュを初期化する必要がある
 24755:     mmuTCR = d & 0x0000fffe;
 24756:     mmuEnabled = (short) d < 0;  //(d & MMU_TCR_ENABLE) != 0
 24757:     mmu4KB = (d & MMU_TCR_PAGE_SIZE) == MMU_TCR_P_4KB;
 24758:     mmuNotAllocateData = (d & MMU_TCR_NAD) != 0;
 24759:     mmuNotAllocateCode = (d & MMU_TCR_NAI) != 0;
 24760:     if (mmu4KB) {  //4KB
 24761:       mmuPageSize = MMU_PAGE_SIZE_4KB;
 24762:       mmuPageAddressMask = MMU_PAGE_ADDRESS_MASK_4KB;
 24763:       mmuPageOffsetMask = MMU_PAGE_OFFSET_MASK_4KB;
 24764:       mmuPageIndexMask = MMU_PAGE_INDEX_MASK_4KB;
 24765:       mmuPageIndexBit2 = MMU_PAGE_INDEX_BIT0_4KB - 2;
 24766:       mmuPageTableMask = MMU_DESCRIPTOR_PAGE_TABLE_ADDRESS_4KB;
 24767:     } else {  //8KB
 24768:       mmuPageSize = MMU_PAGE_SIZE_8KB;
 24769:       mmuPageAddressMask = MMU_PAGE_ADDRESS_MASK_8KB;
 24770:       mmuPageOffsetMask = MMU_PAGE_OFFSET_MASK_8KB;
 24771:       mmuPageIndexMask = MMU_PAGE_INDEX_MASK_8KB;
 24772:       mmuPageIndexBit2 = MMU_PAGE_INDEX_BIT0_8KB - 2;
 24773:       mmuPageTableMask = MMU_DESCRIPTOR_PAGE_TABLE_ADDRESS_8KB;
 24774:     }
 24775:     if (MMU_DEBUG_COMMAND) {
 24776:       System.out.printf ("%08x mmuSetTCR(0x%08x)\n", XEiJ.regPC0, mmuTCR);
 24777:       System.out.printf ("  mmuEnabled=%b\n", mmuEnabled);
 24778:       System.out.printf ("  mmu4KB=%b\n", mmu4KB);
 24779:       System.out.printf ("  mmuPageSize=0x%08x\n", mmuPageSize);
 24780:       System.out.printf ("  mmuPageAddressMask=0x%08x\n", mmuPageAddressMask);
 24781:       System.out.printf ("  mmuPageOffsetMask=0x%08x\n", mmuPageOffsetMask);
 24782:       System.out.printf ("  mmuPageIndexMask=0x%08x\n", mmuPageIndexMask);
 24783:       System.out.printf ("  mmuPageIndexBit2=%d\n", mmuPageIndexBit2);
 24784:       System.out.printf ("  mmuPageTableMask=%d\n", mmuPageTableMask);
 24785:     }
 24786:   }  //mmuSetTCR(int)
 24787: 
 24788:   //--------------------------------------------------------------------------------
 24789:   //アドレス変換テーブル
 24790: 
 24791:   //  URP  ユーザルートポインタ
 24792:   //  SRP  スーパーバイザルートポインタ
 24793:   //      31  30  29  28  27  26  25  24  23  22  21  20  19  18  17  16  15  14  13  12  11  10   9   8   7   6   5   4   3   2   1   0
 24794:   //    ┏━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━┯━━━━━━━━━━━━━━━━━┓
 24795:   //    ┃                                  ルートテーブルアドレス                                  │                 0                ┃
 24796:   //    ┗━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━┷━━━━━━━━━━━━━━━━━┛
 24797:   public static int mmuURP;  //URP
 24798:   public static int mmuSRP;  //SRP
 24799: 
 24800:   //d = mmuGetURP ()
 24801:   //  URPを読む
 24802:   public static int mmuGetURP () {
 24803:     return mmuURP;
 24804:   }  //mmuGetURP()
 24805: 
 24806:   //d = mmuGetSRP ()
 24807:   //  SRPを読む
 24808:   public static int mmuGetSRP () {
 24809:     return mmuSRP;
 24810:   }  //mmuGetSRP()
 24811: 
 24812:   //mmuSetURP (d)
 24813:   //  URPに書く
 24814:   public static void mmuSetURP (int d) throws M68kException {
 24815:     mmuURP = d &= 0xfffffe00;
 24816:     Arrays.fill (mmuUserDataCache, 1);
 24817:     Arrays.fill (mmuUserCodeCache, 1);
 24818:     if (MMU_DEBUG_COMMAND) {
 24819:       System.out.printf ("%08x mmuSetURP(0x%08x)\n", XEiJ.regPC0, mmuURP);
 24820:     }
 24821:     if (RootPointerList.RTL_ON) {
 24822:       RootPointerList.rtlSetRootPointer (d, false);
 24823:     }
 24824:   }  //mmuSetURP(int)
 24825: 
 24826:   //mmuSetSRP (d)
 24827:   //  SRPに書く
 24828:   public static void mmuSetSRP (int d) {
 24829:     mmuSRP = d &= 0xfffffe00;
 24830:     Arrays.fill (mmuSuperDataCache, 1);
 24831:     Arrays.fill (mmuSuperCodeCache, 1);
 24832:     if (MMU_DEBUG_COMMAND) {
 24833:       System.out.printf ("%08x mmuSetSRP(0x%08x)\n", XEiJ.regPC0, mmuSRP);
 24834:     }
 24835:     if (RootPointerList.RTL_ON) {
 24836:       RootPointerList.rtlSetRootPointer (d, true);
 24837:     }
 24838:   }  //mmuSetSRP(int)
 24839: 
 24840:   //  ディスクリプタ
 24841:   //
 24842:   //    ルートテーブルディスクリプタ
 24843:   //      31  30  29  28  27  26  25  24  23  22  21  20  19  18  17  16  15  14  13  12  11  10   9   8   7   6   5   4   3   2   1   0
 24844:   //    ┏━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━┯━━━━━━━━━┯━┯━┯━━━┓
 24845:   //    ┃                                 ポインタテーブルアドレス                                 │         X        │ U│ W│  UDT ┃
 24846:   //    ┗━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━┷━━━━━━━━━┷━┷━┷━━━┛
 24847:   //
 24848:   //    4KBポインタテーブルディスクリプタ
 24849:   //      31  30  29  28  27  26  25  24  23  22  21  20  19  18  17  16  15  14  13  12  11  10   9   8   7   6   5   4   3   2   1   0
 24850:   //    ┏━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━┯━━━┯━┯━┯━━━┓
 24851:   //    ┃                                        ページテーブルアドレス                                        │   X  │ U│ W│  UDT ┃
 24852:   //    ┗━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━┷━━━┷━┷━┷━━━┛
 24853:   //
 24854:   //    8KBポインタテーブルディスクリプタ
 24855:   //      31  30  29  28  27  26  25  24  23  22  21  20  19  18  17  16  15  14  13  12  11  10   9   8   7   6   5   4   3   2   1   0
 24856:   //    ┏━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━┯━┯━┯━┯━━━┓
 24857:   //    ┃                                          ページテーブルアドレス                                          │ X│ U│ W│  UDT ┃
 24858:   //    ┗━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━┷━┷━┷━┷━━━┛
 24859:   //
 24860:   //    4KBページテーブルディスクリプタ
 24861:   //      31  30  29  28  27  26  25  24  23  22  21  20  19  18  17  16  15  14  13  12  11  10   9   8   7   6   5   4   3   2   1   0
 24862:   //    ┏━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━┯━┯━┯━┯━┯━┯━━━┯━┯━┯━┯━━━┓
 24863:   //    ┃                              物理ページアドレス                              │UR│ G│U1│U0│ S│  CM  │ M│ U│ W│  PDT ┃
 24864:   //    ┗━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━┷━┷━┷━┷━┷━┷━━━┷━┷━┷━┷━━━┛
 24865:   //
 24866:   //    8KBページテーブルディスクリプタ
 24867:   //      31  30  29  28  27  26  25  24  23  22  21  20  19  18  17  16  15  14  13  12  11  10   9   8   7   6   5   4   3   2   1   0
 24868:   //    ┏━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━┯━┯━┯━┯━┯━┯━┯━━━┯━┯━┯━┯━━━┓
 24869:   //    ┃                            物理ページアドレス                            │UR│UR│ G│U1│U0│ S│  CM  │ M│ U│ W│  PDT ┃
 24870:   //    ┗━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━┷━┷━┷━┷━┷━┷━┷━━━┷━┷━┷━┷━━━┛
 24871:   //
 24872:   //    間接ページテーブルディスクリプタ
 24873:   //      31  30  29  28  27  26  25  24  23  22  21  20  19  18  17  16  15  14  13  12  11  10   9   8   7   6   5   4   3   2   1   0
 24874:   //    ┏━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━┯━━━┓
 24875:   //    ┃                                             ページディスクリプタアドレス                                             │  PDT ┃
 24876:   //    ┗━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━┷━━━┛
 24877:   public static final int MMU_DESCRIPTOR_POINTER_TABLE_ADDRESS  = -1 <<  9;  //x  Pointer Table Address
 24878:   public static final int MMU_DESCRIPTOR_PAGE_TABLE_ADDRESS_4KB = -1 <<  6;  //x  Page Table Address (4KB)
 24879:   public static final int MMU_DESCRIPTOR_PAGE_TABLE_ADDRESS_8KB = -1 <<  5;  //x  Page Table Address (8KB)
 24880:   public static final int MMU_DESCRIPTOR_GLOBAL                 =  1 << 10;  //x  G    Global
 24881:   public static final int MMU_DESCRIPTOR_SUPERVISOR_PROTECTED   =  1 <<  7;  //x  S    Supervisor Protected
 24882:   public static final int MMU_DESCRIPTOR_MODIFIED               =  1 <<  4;  //x  M    Modified
 24883:   public static final int MMU_DESCRIPTOR_USED                   =  1 <<  3;  //x  U    Used
 24884:   public static final int MMU_DESCRIPTOR_WRITE_PROTECTED        =  1 <<  2;  //x  W    Write Protected
 24885:   public static final int MMU_DESCRIPTOR_UDT                    =  2 <<  0;  //x  UDT  Upper Level Descriptor Type
 24886:   public static final int MMU_DESCRIPTOR_PDT                    =  3 <<  0;  //x  PDT  Page Descriptor Type
 24887:   public static final int MMU_DESCRIPTOR_TYPE_INVALID           =  0 <<  0;  //          Invalid
 24888:   public static final int MMU_DESCRIPTOR_TYPE_INDIRECT          =  2 <<  0;  //          Indirect
 24889:   public static final int MMU_DESCRIPTOR_INDIRECT_ADDRESS       = -1 <<  2;  //x  Descriptor Address
 24890: 
 24891:   //--------------------------------------------------------------------------------
 24892:   //アドレス変換キャッシュ
 24893:   //
 24894:   //  構造
 24895:   //    ユーザモード
 24896:   //      ライン0
 24897:   //        エントリ0
 24898:   //          [0]  論理ページアドレス。リード用。1=無効
 24899:   //          [1]  論理ページアドレス。ライト用。修正済みかつライトプロテクトされていないときだけ有効。1=無効
 24900:   //          [2]  物理ページアドレス。1=無効
 24901:   //          [3]  グローバルフラグ。-1=Global,0=NonGlobal,1=無効
 24902:   //        エントリ1
 24903:   //        エントリ2
 24904:   //        エントリ3
 24905:   //      ライン1
 24906:   //          :
 24907:   //      ライン63
 24908:   //    スーパーバイザモード
 24909:   //      ライン0
 24910:   //        エントリ0
 24911:   //          [0]  論理ページアドレス。リード用。1=無効
 24912:   //          [1]  論理ページアドレス。ライト用。修正済みかつライトプロテクトされていないときだけ有効。1=無効
 24913:   //          [2]  物理ページアドレス。1=無効
 24914:   //          [3]  グローバルフラグ。-1=Global,0=NonGlobal,1=無効
 24915:   //        エントリ1
 24916:   //        エントリ2
 24917:   //        エントリ3
 24918:   //      ライン1
 24919:   //          :
 24920:   //      ライン63
 24921:   //
 24922:   //  ハッシュ関数
 24923:   //    次の関数で32bitの論理ページアドレスを6bitのライン番号に変換する
 24924:   //      a * 0x5efc103f >>> 26
 24925:   //    32bitの中に幅6bit以内で6bitまでセットする組み合わせは1+1+2+4+8+16+32*27=896通りあるが、
 24926:   //    それらをa*x>>>26で0~63になるべく均一に分散させる係数を2^32通りの中から探して以下の24個を得た
 24927:   //      0x5efbf041  0x5efc0fc1  0x5efc103f  0x5f03efc1  0x5f03f03f  0x5f040fbf
 24928:   //      0x60fbf041  0x60fc0fc1  0x60fc103f  0x6103efc1  0x6103f03f  0x61040fbf
 24929:   //      0x9efbf041  0x9efc0fc1  0x9efc103f  0x9f03efc1  0x9f03f03f  0x9f040fbf
 24930:   //      0xa0fbf041  0xa0fc0fc1  0xa0fc103f  0xa103efc1  0xa103f03f  0xa1040fbf
 24931:   //    この中で(0..63)<<12と(0..63)<<13がそれぞれすべて分離するのは
 24932:   //      0x5efc103f
 24933:   //      0x60fc103f
 24934:   //      0x9efc103f
 24935:   //      0xa0fc103f
 24936:   //    この4個はほぼ同じパターンなので0x5efc103fを係数として用いることにする
 24937:   //      perl -e "for$x(0x5efc103f){printf'  //        0x%x%c',$x,10;for$b(7..15){@c=(0)x64;for$n(0..63){$a=$n<<$b;$c[$a*$x>>26&63]++;}printf'  //        %2d %s%c',$b,join('',@c),10;}}"
 24938:   //      0x5efc103f
 24939:   //       7 2111111111111111111111111111111101111111111111111111111111111111
 24940:   //       8 1111111111111111111111111111111111111111111111111111111111111111
 24941:   //       9 1111111111111111111111111111111111111111111111111111111111111111
 24942:   //      10 1111111111111111111111111111111111111111111111111111111111111111
 24943:   //      11 1111111111111111111111111111111111111111111111111111111111111111
 24944:   //      12 1111111111111111111111111111111111111111111111111111111111111111
 24945:   //      13 1111111111111111111111111111111111111111111111111111111111111111
 24946:   //      14 1111111111111111111111111111111111111111111111111111111111111111
 24947:   //      15 2011111111111111111111111111111111111111111111111111111111111111
 24948:   //    ページサイズが2^8=256バイトから2^14=16384バイトまで、それぞれ先頭の64ページがすべて異なるハッシュ値を持つことがわかる
 24949:   //
 24950:   //  1wayセットアソシアティブ
 24951:   //    ハッシュ値が衝突したときの速度低下を抑えるため4waysにしてみたが効果がなさそうなので1wayに戻してある
 24952:   //    ハッシュ関数を工夫してあるので4waysにしてもほとんどの場合は1番目でヒットするか4番目まですべてミスするかのどちらかになる
 24953:   //    1wayを4waysにするとミスしたときの条件分岐が1回から4回に増えてテーブルサーチの開始が遅れる
 24954:   //    2ways以上では参照するときに1番目に比較するエントリとアロケートするときに押し出すエントリを適切に選択するための仕組みが必要
 24955:   //
 24956:   //  LRU(least recently used)方式(2ways以上の場合)
 24957:   //    アロケートはラインの中で最も古いエントリを切り捨てて最も新しいエントリを追加する方法で行う
 24958:   //    アドレス変換キャッシュは最も新しいエントリが繰り返しアクセスされる場合が多く、ハッシュ関数で十分に分散させられているので、
 24959:   //    ここではエントリを常に新しい順にソートしておく方法を用いる
 24960:   //    2番目以降のエントリがヒットしたときエントリを並べ替えなければならないので遅くなるが、1番目のヒット率が十分に高ければ問題ない
 24961:   //
 24962:   //  グローバルフラグ
 24963:   //    関連する命令
 24964:   //      PFLUSHA       アドレス変換キャッシュのすべてのエントリを無効化する
 24965:   //      PFLUSHAN      アドレス変換キャッシュのNonGlobalなエントリを無効化する
 24966:   //      PFLUSH (An)   アドレス変換キャッシュの、DFC=1またはDFC=2ならばユーザモード、DFC=5またはDFC=6ならばスーパーバイザモードの、
 24967:   //                    論理ページアドレスがAnのエントリを無効化する
 24968:   //      PFLUSHN (An)  アドレス変換キャッシュの、DFC=1またはDFC=2ならばユーザモード、DFC=5またはDFC=6ならばスーパーバイザモードの、
 24969:   //                    論理ページアドレスがAnかつNonGlobalのエントリを無効化する
 24970:   //    グローバルフラグはこれらの命令の動作を変更する以外の機能を持たない
 24971:   //
 24972:   public static final int MMU_HASH_BITS = 6;
 24973:   public static final int MMU_HASH_SIZE = 1 << MMU_HASH_BITS;
 24974:   public static final int MMU_HASH_COEFF = 0x5efc103f;  //ハッシュ関数の係数
 24975:   public static final int MMU_CACHE_WAYS = 1;  //1=1way,4=4waysセットアソシアティブ
 24976:   public static final int[] mmuUserDataCache = new int[4 * MMU_CACHE_WAYS * MMU_HASH_SIZE];
 24977:   public static final int[] mmuUserCodeCache = new int[4 * MMU_CACHE_WAYS * MMU_HASH_SIZE];
 24978:   public static final int[] mmuSuperDataCache = new int[4 * MMU_CACHE_WAYS * MMU_HASH_SIZE];
 24979:   public static final int[] mmuSuperCodeCache = new int[4 * MMU_CACHE_WAYS * MMU_HASH_SIZE];
 24980: 
 24981:   //mmuInvalidateAllCache ()
 24982:   //  PFLUSHA
 24983:   //  アドレス変換キャッシュのすべてのエントリを無効化する
 24984:   public static void mmuInvalidateAllCache () {
 24985:     Arrays.fill (mmuUserDataCache, 1);
 24986:     Arrays.fill (mmuUserCodeCache, 1);
 24987:     Arrays.fill (mmuSuperDataCache, 1);
 24988:     Arrays.fill (mmuSuperCodeCache, 1);
 24989:   }  //mmuInvalidateAllCache()
 24990: 
 24991:   //mmuInvalidateAllNonGlobalCache ()
 24992:   //  PFLUSHAN
 24993:   //  アドレス変換キャッシュのNonGlobalなエントリを無効化する
 24994:   public static void mmuInvalidateAllNonGlobalCache () {
 24995:     for (int i = 0; i < 4 * MMU_CACHE_WAYS * MMU_HASH_SIZE; i += 4) {
 24996:       if (mmuUserDataCache[i + 3] == 0) {  //エントリが有効かつNonGlobal
 24997:         mmuUserDataCache[i] = mmuUserDataCache[i + 1] = mmuUserDataCache[i + 2] = mmuUserDataCache[i + 3] = 1;
 24998:       }
 24999:       if (mmuUserCodeCache[i + 3] == 0) {  //エントリが有効かつNonGlobal
 25000:         mmuUserCodeCache[i] = mmuUserCodeCache[i + 1] = mmuUserCodeCache[i + 2] = mmuUserCodeCache[i + 3] = 1;
 25001:       }
 25002:       if (mmuSuperDataCache[i + 3] == 0) {  //エントリが有効かつNonGlobal
 25003:         mmuSuperDataCache[i] = mmuSuperDataCache[i + 1] = mmuSuperDataCache[i + 2] = mmuSuperDataCache[i + 3] = 1;
 25004:       }
 25005:       if (mmuSuperCodeCache[i + 3] == 0) {  //エントリが有効かつNonGlobal
 25006:         mmuSuperCodeCache[i] = mmuSuperCodeCache[i + 1] = mmuSuperCodeCache[i + 2] = mmuSuperCodeCache[i + 3] = 1;
 25007:       }
 25008:     }
 25009:   }  //mmuInvalidateAllNonGlobalCache()
 25010: 
 25011:   //mmuInvalidateCache (a)
 25012:   //  PFLUSH (An)
 25013:   //  アドレス変換キャッシュの、DFC=1またはDFC=2ならばユーザモード、DFC=5またはDFC=6ならばスーパーバイザモードの、
 25014:   //  論理ページアドレスがAnのエントリを無効化する
 25015:   public static void mmuInvalidateCache (int a) {
 25016:     int logicalPage = a & mmuPageAddressMask;
 25017:     boolean supervisor = (0b10011111 << 24 << XEiJ.mpuDFC) < 0;
 25018:     boolean instruction = (0b00101010 << 24 << XEiJ.mpuDFC) < 0;
 25019:     int[] cache = (supervisor ?
 25020:                    instruction ? mmuSuperCodeCache : mmuSuperDataCache :
 25021:                    instruction ? mmuUserCodeCache : mmuUserDataCache);
 25022:     int head = (logicalPage * MMU_HASH_COEFF >>> -MMU_HASH_BITS) * (4 * MMU_CACHE_WAYS);  //先頭のエントリ
 25023:     if (MMU_CACHE_WAYS == 1) {  //1way
 25024:       if (cache[head] == logicalPage) {  //エントリが有効かつ論理ページアドレスがAn
 25025:         cache[head] = cache[head + 1] = cache[head + 2] = cache[head + 3] = 1;  //末尾を空ける
 25026:         return;
 25027:       }
 25028:     } else {  //2ways以上
 25029:       int tail = head + (4 * MMU_CACHE_WAYS - 4);  //末尾のエントリ
 25030:       for (int i = head; i <= tail; i += 4) {
 25031:         if (cache[i] == logicalPage) {  //エントリが有効かつ論理ページアドレスがAn
 25032:           for (int j = i; j < tail; j += 4) {  //後ろを詰める
 25033:             cache[j    ] = cache[j + 4];
 25034:             cache[j + 1] = cache[j + 5];
 25035:             cache[j + 2] = cache[j + 6];
 25036:             cache[j + 3] = cache[j + 7];
 25037:           }
 25038:           cache[tail] = cache[tail + 1] = cache[tail + 2] = cache[tail + 3] = 1;  //末尾を空ける
 25039:           return;
 25040:         }
 25041:       }
 25042:     }
 25043:   }  //mmuInvalidateCache(int)
 25044: 
 25045:   //mmuInvalidateNonGlobalCache (a)
 25046:   //  PFLUSHN (An)
 25047:   //  アドレス変換キャッシュの、DFC=1またはDFC=2ならばユーザモード、DFC=5またはDFC=6ならばスーパーバイザモードの、
 25048:   //  論理ページアドレスがAnかつNonGlobalのエントリを無効化する
 25049:   public static void mmuInvalidateNonGlobalCache (int a) {
 25050:     int logicalPage = a & mmuPageAddressMask;
 25051:     boolean supervisor = (0b10011111 << 24 << XEiJ.mpuDFC) < 0;
 25052:     boolean instruction = (0b00101010 << 24 << XEiJ.mpuDFC) < 0;
 25053:     int[] cache = (supervisor ?
 25054:                    instruction ? mmuSuperCodeCache : mmuSuperDataCache :
 25055:                    instruction ? mmuUserCodeCache : mmuUserDataCache);
 25056:     int head = (logicalPage * MMU_HASH_COEFF >>> -MMU_HASH_BITS) * (4 * MMU_CACHE_WAYS);  //先頭のエントリ
 25057:     if (MMU_CACHE_WAYS == 1) {  //1way
 25058:       if (cache[head] == logicalPage) {  //エントリが有効かつ論理ページアドレスがAn
 25059:         if (cache[head + 3] == 0) {  //エントリが有効かつNonGlobal
 25060:           cache[head] = cache[head + 1] = cache[head + 2] = cache[head + 3] = 1;  //末尾を空ける
 25061:         }
 25062:         return;  //論理ページアドレスがAnのエントリは1つだけなのでそれがNonGlobalでなければ何もしないで終了する
 25063:       }
 25064:     } else {  //2ways以上
 25065:       int tail = head + (4 * MMU_CACHE_WAYS - 4);  //末尾のエントリ
 25066:       for (int i = head; i <= tail; i += 4) {
 25067:         if (cache[i] == logicalPage) {  //エントリが有効かつ論理ページアドレスがAn
 25068:           if (cache[i + 3] == 0) {  //エントリが有効かつNonGlobal
 25069:             for (int j = i; j < tail; j += 4) {  //後ろを詰める
 25070:               cache[j    ] = cache[j + 4];
 25071:               cache[j + 1] = cache[j + 5];
 25072:               cache[j + 2] = cache[j + 6];
 25073:               cache[j + 3] = cache[j + 7];
 25074:             }
 25075:             cache[tail] = cache[tail + 1] = cache[tail + 2] = cache[tail + 3] = 1;  //末尾を空ける
 25076:           }
 25077:           return;  //論理ページアドレスがAnのエントリは1つだけなのでそれがNonGlobalでなければ何もしないで終了する
 25078:         }
 25079:       }
 25080:     }
 25081:   }  //mmuInvalidateNonGlobalCache(int)
 25082: 
 25083:   //--------------------------------------------------------------------------------
 25084:   //初期化
 25085: 
 25086:   //mmuInit ()
 25087:   //  初期化
 25088:   public static void mmuInit () {
 25089:     mmuUserDataTransparent = new int[256];
 25090:     mmuUserCodeTransparent = new int[256];
 25091:     mmuSuperDataTransparent = new int[256];
 25092:     mmuSuperCodeTransparent = new int[256];
 25093:     mmuUserDataDifference = new int[256];
 25094:     mmuUserCodeDifference = new int[256];
 25095:     mmuSuperDataDifference = new int[256];
 25096:     mmuSuperCodeDifference = new int[256];
 25097:     mmuReset ();
 25098:   }  //mmuInit()
 25099: 
 25100:   //mmuReset ()
 25101:   //  リセット
 25102:   public static void mmuReset () {
 25103:     mmuSetDataTransparent (0, 0);
 25104:     mmuSetCodeTransparent (0, 0);
 25105:     mmuSetTCR (0);
 25106:   }  //mmuReset()
 25107: 
 25108:   //--------------------------------------------------------------------------------
 25109:   //バスアクセス
 25110:   //
 25111:   //    ByteSign  byte  バイト符号拡張
 25112:   //    ByteZero  int   バイトゼロ拡張
 25113:   //    WordSign  int   ワード符号拡張
 25114:   //    WordZero  int   ワードゼロ拡張
 25115:   //    Long      int   ロング
 25116:   //    Quad      long  クワッド
 25117:   //
 25118:   //    Data    データ  1  先頭
 25119:   //    Second  データ  1  2番目
 25120:   //    Even    データ  2  先頭
 25121:   //    Four    データ  4  先頭
 25122:   //    Code    コード  2  先頭
 25123:   //    Opword  コード  2  先頭(命令ワード)
 25124:   //    Exword  コード  2  2番目(拡張ワード)
 25125:   //
 25126:   //  バイト
 25127:   //       0   1   2   3   4   5   6   7   8   9  10  11  12  13  14  15
 25128:   //    ┳━┯━┯━┯━┳━┯━┯━┯━┳━┯━┯━┯━┳━┯━┯━┯━┳
 25129:   //    ┃  │  │  │  ┃  │  │  │  ┃  │  │  │  ┃  │  │  │  ┃
 25130:   //    ┻━┷━┷━┷━┻━┷━┷━┷━┻━┷━┷━┷━┻━┷━┷━┷━┻
 25131:   //    ┏━┓
 25132:   //    ┃ B┃
 25133:   //    ┗━┛
 25134:   //        0
 25135:   //
 25136:   //  ワード
 25137:   //    偶数
 25138:   //       0   1   2   3   4   5   6   7   8   9  10  11  12  13  14  15
 25139:   //    ┳━┯━┯━┯━┳━┯━┯━┯━┳━┯━┯━┯━┳━┯━┯━┯━┳
 25140:   //    ┃  │  │  │  ┃  │  │  │  ┃  │  │  │  ┃  │  │  │  ┃
 25141:   //    ┻━┷━┷━┷━┻━┷━┷━┷━┻━┷━┷━┷━┻━┷━┷━┷━┻
 25142:   //    ┏━━━┓
 25143:   //    ┃   W  ┃
 25144:   //    ┗━━━┛
 25145:   //            0
 25146:   //    奇数
 25147:   //      -1   0   1   2   3   4   5   6   7   8   9  10  11  12  13  14
 25148:   //    ┳━┯━┯━┯━┳━┯━┯━┯━┳━┯━┯━┯━┳━┯━┯━┯━┳
 25149:   //    ┃  │  │  │  ┃  │  │  │  ┃  │  │  │  ┃  │  │  │  ┃
 25150:   //    ┻━┷━┷━┷━┻━┷━┷━┷━┻━┷━┷━┷━┻━┷━┷━┷━┻
 25151:   //        ┏━┳━┓
 25152:   //        ┃ B┃ B┃
 25153:   //        ┗━┻━┛
 25154:   //            8   0
 25155:   //
 25156:   //  ロング
 25157:   //    4の倍数
 25158:   //       0   1   2   3   4   5   6   7   8   9  10  11  12  13  14  15
 25159:   //    ┳━┯━┯━┯━┳━┯━┯━┯━┳━┯━┯━┯━┳━┯━┯━┯━┳
 25160:   //    ┃  │  │  │  ┃  │  │  │  ┃  │  │  │  ┃  │  │  │  ┃
 25161:   //    ┻━┷━┷━┷━┻━┷━┷━┷━┻━┷━┷━┷━┻━┷━┷━┷━┻
 25162:   //    ┏━━━━━━━┓
 25163:   //    ┃       L      ┃
 25164:   //    ┗━━━━━━━┛
 25165:   //                    0
 25166:   //    4の倍数+1
 25167:   //      -1   0   1   2   3   4   5   6   7   8   9  10  11  12  13  14
 25168:   //    ┳━┯━┯━┯━┳━┯━┯━┯━┳━┯━┯━┯━┳━┯━┯━┯━┳
 25169:   //    ┃  │  │  │  ┃  │  │  │  ┃  │  │  │  ┃  │  │  │  ┃
 25170:   //    ┻━┷━┷━┷━┻━┷━┷━┷━┻━┷━┷━┷━┻━┷━┷━┷━┻
 25171:   //        ┏━┳━━━┳━┓
 25172:   //        ┃ B┃   W  ┃ B┃
 25173:   //        ┗━┻━━━┻━┛
 25174:   //           24       8   0
 25175:   //    4の倍数+2
 25176:   //      -2  -1   0   1   2   3   4   5   6   7   8   9  10  11  12  13
 25177:   //    ┳━┯━┯━┯━┳━┯━┯━┯━┳━┯━┯━┯━┳━┯━┯━┯━┳
 25178:   //    ┃  │  │  │  ┃  │  │  │  ┃  │  │  │  ┃  │  │  │  ┃
 25179:   //    ┻━┷━┷━┷━┻━┷━┷━┷━┻━┷━┷━┷━┻━┷━┷━┷━┻
 25180:   //            ┏━━━┳━━━┓
 25181:   //            ┃   W  ┃   W  ┃
 25182:   //            ┗━━━┻━━━┛
 25183:   //                   16       0
 25184:   //    4の倍数+3
 25185:   //      -3  -2  -1   0   1   2   3   4   5   6   7   8   9  10  11  12
 25186:   //    ┳━┯━┯━┯━┳━┯━┯━┯━┳━┯━┯━┯━┳━┯━┯━┯━┳
 25187:   //    ┃  │  │  │  ┃  │  │  │  ┃  │  │  │  ┃  │  │  │  ┃
 25188:   //    ┻━┷━┷━┷━┻━┷━┷━┷━┻━┷━┷━┷━┻━┷━┷━┷━┻
 25189:   //                ┏━┳━━━┳━┓
 25190:   //                ┃ B┃   W  ┃ B┃
 25191:   //                ┗━┻━━━┻━┛
 25192:   //                   24       8   0
 25193:   //
 25194:   //  クワッド
 25195:   //    4の倍数
 25196:   //       0   1   2   3   4   5   6   7   8   9  10  11  12  13  14  15
 25197:   //    ┳━┯━┯━┯━┳━┯━┯━┯━┳━┯━┯━┯━┳━┯━┯━┯━┳
 25198:   //    ┃  │  │  │  ┃  │  │  │  ┃  │  │  │  ┃  │  │  │  ┃
 25199:   //    ┻━┷━┷━┷━┻━┷━┷━┷━┻━┷━┷━┷━┻━┷━┷━┷━┻
 25200:   //    ┏━━━━━━━┳━━━━━━━┓
 25201:   //    ┃       L      ┃       L      ┃
 25202:   //    ┗━━━━━━━┻━━━━━━━┛
 25203:   //                   32               0
 25204:   //    4の倍数+1
 25205:   //      -1   0   1   2   3   4   5   6   7   8   9  10  11  12  13  14
 25206:   //    ┳━┯━┯━┯━┳━┯━┯━┯━┳━┯━┯━┯━┳━┯━┯━┯━┳
 25207:   //    ┃  │  │  │  ┃  │  │  │  ┃  │  │  │  ┃  │  │  │  ┃
 25208:   //    ┻━┷━┷━┷━┻━┷━┷━┷━┻━┷━┷━┷━┻━┷━┷━┷━┻
 25209:   //        ┏━┳━━━┳━━━━━━━┳━┓
 25210:   //        ┃ B┃   W  ┃       L      ┃ B┃
 25211:   //        ┗━┻━━━┻━━━━━━━┻━┛
 25212:   //           56      40               8   0
 25213:   //    4の倍数+2
 25214:   //      -2  -1   0   1   2   3   4   5   6   7   8   9  10  11  12  13
 25215:   //    ┳━┯━┯━┯━┳━┯━┯━┯━┳━┯━┯━┯━┳━┯━┯━┯━┳
 25216:   //    ┃  │  │  │  ┃  │  │  │  ┃  │  │  │  ┃  │  │  │  ┃
 25217:   //    ┻━┷━┷━┷━┻━┷━┷━┷━┻━┷━┷━┷━┻━┷━┷━┷━┻
 25218:   //            ┏━━━┳━━━━━━━┳━━━┓
 25219:   //            ┃   W  ┃       L      ┃   W  ┃
 25220:   //            ┗━━━┻━━━━━━━┻━━━┛
 25221:   //                   48              16       0
 25222:   //    4の倍数+3
 25223:   //      -3  -2  -1   0   1   2   3   4   5   6   7   8   9  10  11  12
 25224:   //    ┳━┯━┯━┯━┳━┯━┯━┯━┳━┯━┯━┯━┳━┯━┯━┯━┳
 25225:   //    ┃  │  │  │  ┃  │  │  │  ┃  │  │  │  ┃  │  │  │  ┃
 25226:   //    ┻━┷━┷━┷━┻━┷━┷━┷━┻━┷━┷━┷━┻━┷━┷━┷━┻
 25227:   //                ┏━┳━━━━━━━┳━━━┳━┓
 25228:   //                ┃ B┃       L      ┃   W  ┃ B┃
 25229:   //                ┗━┻━━━━━━━┻━━━┻━┛
 25230:   //                   56              24       8   0
 25231:   //
 25232: 
 25233:   //--------------------------------------------------------------------------------
 25234:   //ピーク
 25235:   //  デバッガ用
 25236:   //  エラーや副作用なしでリードする
 25237:   //  アドレス変換はピーク
 25238:   //  ページフォルトやバスエラーのときは-1をキャストした値を返す
 25239: 
 25240:   //d = mmuPeekByteSign (a, f)
 25241:   //  ピークバイト符号拡張
 25242:   public static byte mmuPeekByteSign (int a, int f) {
 25243:     f = f == -1 ? XEiJ.regSRS != 0 ? 5 : 1 : f & 7;
 25244:     MemoryMappedDevice[] mm = (DataBreakPoint.DBP_ON ?
 25245:                                (f & 4) != 0 ? DataBreakPoint.dbpSuperMap : DataBreakPoint.dbpUserMap :
 25246:                                (f & 4) != 0 ? XEiJ.busSuperMap : XEiJ.busUserMap);
 25247:     //    01234567
 25248:     if (0b01100110 << 24 << f < 0) {  //SFC=1,2,5,6。アドレス変換あり
 25249:       int a0 = mmuTranslatePeek (a, f & 4, f & 2);
 25250:       return (a ^ a0) != 1 ? mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdPbs (a0) : -1;
 25251:     } else if (f != 7) {  //SFC=0,3,4。アドレス変換なし
 25252:       return mm[a >>> XEiJ.BUS_PAGE_BITS].mmdPbs (a);
 25253:     } else {
 25254:       return -1;
 25255:     }
 25256:   }  //mmuPeekByteSign(int,int)
 25257: 
 25258:   //d = mmuPeekByteSignData (a, supervisor)
 25259:   //  ピークバイト符号拡張(データ)
 25260:   public static byte mmuPeekByteSignData (int a, int supervisor) {
 25261:     MemoryMappedDevice[] mm = supervisor != 0 ? DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap : DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap;
 25262:     int a0 = mmuTranslatePeek (a, supervisor, 0);
 25263:     return (a ^ a0) == 1 ? -1 : mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdPbs (a0);
 25264:   }  //mmuPeekByteSignData(int,int)
 25265: 
 25266:   //d = mmuPeekByteSignCode (a, supervisor)
 25267:   //  ピークバイト符号拡張(コード)
 25268:   public static byte mmuPeekByteSignCode (int a, int supervisor) {
 25269:     MemoryMappedDevice[] mm = supervisor != 0 ? DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap : DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap;
 25270:     int a0 = mmuTranslatePeek (a, supervisor, 1);
 25271:     return (a ^ a0) == 1 ? -1 : mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdPbs (a0);
 25272:   }  //mmuPeekByteSignCode(int,int)
 25273: 
 25274:   //d = mmuPeekByteZeroData (a, supervisor)
 25275:   //  ピークバイトゼロ拡張(データ)
 25276:   public static int mmuPeekByteZeroData (int a, int supervisor) {
 25277:     MemoryMappedDevice[] mm = supervisor != 0 ? DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap : DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap;
 25278:     int a0 = mmuTranslatePeek (a, supervisor, 0);
 25279:     return (a ^ a0) == 1 ? 255 : mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdPbz (a0);
 25280:   }  //mmuPeekByteZeroData(int,int)
 25281: 
 25282:   //d = mmuPeekByteZeroCode (a, supervisor)
 25283:   //  ピークバイトゼロ拡張(コード)
 25284:   public static int mmuPeekByteZeroCode (int a, int supervisor) {
 25285:     MemoryMappedDevice[] mm = supervisor != 0 ? DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap : DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap;
 25286:     int a0 = mmuTranslatePeek (a, supervisor, 1);
 25287:     return (a ^ a0) == 1 ? 255 : mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdPbz (a0);
 25288:   }  //mmuPeekByteZeroCode(int,int)
 25289: 
 25290:   //d = mmuPeekWordSign (a, f)
 25291:   //  ピークワード符号拡張
 25292:   public static int mmuPeekWordSign (int a, int f) {
 25293:     f = f == -1 ? XEiJ.regSRS != 0 ? 5 : 1 : f & 7;
 25294:     MemoryMappedDevice[] mm = (DataBreakPoint.DBP_ON ?
 25295:                                (f & 4) != 0 ? DataBreakPoint.dbpSuperMap : DataBreakPoint.dbpUserMap :
 25296:                                (f & 4) != 0 ? XEiJ.busSuperMap : XEiJ.busUserMap);
 25297:     //    01234567
 25298:     if (0b01100110 << 24 << f < 0) {  //SFC=1,2,5,6。アドレス変換あり
 25299:       int a0 = mmuTranslatePeek (a, f & 4, f & 2);
 25300:       if ((a & 1) == 0) {  //偶数
 25301:         return (a ^ a0) != 1 ? mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdPws (a0) : -1;
 25302:       } else {  //奇数
 25303:         int a1 = mmuTranslatePeek (a + 1, f & 4, f & 2);
 25304:         return (((a     ^ a0) != 1 ? mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdPbs (a0) :  -1) << 8 |
 25305:                 ((a + 1 ^ a1) != 1 ? mm[a1 >>> XEiJ.BUS_PAGE_BITS].mmdPbz (a1) : 255));
 25306:       }
 25307:     } else if (f != 7) {  //SFC=0,3,4。アドレス変換なし
 25308:       if ((a & 1) == 0) {  //偶数
 25309:         return mm[a >>> XEiJ.BUS_PAGE_BITS].mmdPws (a);
 25310:       } else {  //奇数
 25311:         return (mm[a     >>> XEiJ.BUS_PAGE_BITS].mmdPbs (a    ) << 8 |
 25312:                 mm[a + 1 >>> XEiJ.BUS_PAGE_BITS].mmdPbz (a + 1));
 25313:       }
 25314:     } else {
 25315:       return -1;
 25316:     }
 25317:   }  //mmuPeekWordSign(int,int)
 25318: 
 25319:   //d = mmuPeekWordSignData (a, supervisor)
 25320:   //  ピークワード符号拡張(データ)
 25321:   public static int mmuPeekWordSignData (int a, int supervisor) {
 25322:     MemoryMappedDevice[] mm = supervisor != 0 ? DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap : DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap;
 25323:     int a0 = mmuTranslatePeek (a, supervisor, 0);  //a+1が必要なので上書き不可
 25324:     if ((a & 1) == 0) {  //偶数
 25325:       return (a0 & 1) != 0 ? -1 : mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdPws (a0);
 25326:     } else {  //奇数
 25327:       int a1 = mmuTranslatePeek (a + 1, supervisor, 0);
 25328:       return (((a0 & 1) == 0 ?  -1 : mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdPbs (a0)) << 8 |
 25329:               ((a1 & 1) != 0 ? 255 : mm[a1 >>> XEiJ.BUS_PAGE_BITS].mmdPbz (a1)));
 25330:     }
 25331:   }  //mmuPeekWordSignData(int,int)
 25332: 
 25333:   //d = mmuPeekWordSignEven (a, supervisor)
 25334:   //  ピークワード符号拡張(偶数)
 25335:   public static int mmuPeekWordSignEven (int a, int supervisor) {
 25336:     MemoryMappedDevice[] mm = supervisor != 0 ? DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap : DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap;
 25337:     a = mmuTranslatePeek (a, supervisor, 0);
 25338:     return (a & 1) != 0 ? -1 : mm[a >>> XEiJ.BUS_PAGE_BITS].mmdPws (a);
 25339:   }  //mmuPeekWordSignEven(int,int)
 25340: 
 25341:   //d = mmuPeekWordSignCode (a, supervisor)
 25342:   //  ピークワード符号拡張(コード)
 25343:   public static int mmuPeekWordSignCode (int a, int supervisor) {
 25344:     MemoryMappedDevice[] mm = supervisor != 0 ? DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap : DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap;
 25345:     a = mmuTranslatePeek (a, supervisor, 1);
 25346:     return (a & 1) != 0 ? -1 : mm[a >>> XEiJ.BUS_PAGE_BITS].mmdPws (a);
 25347:   }  //mmuPeekWordSignCode(int,int)
 25348: 
 25349:   //d = mmuPeekWordZeroData (a, supervisor)
 25350:   //  ピークワードゼロ拡張(データ)
 25351:   public static int mmuPeekWordZeroData (int a, int supervisor) {
 25352:     MemoryMappedDevice[] mm = supervisor != 0 ? DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap : DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap;
 25353:     int a0 = mmuTranslatePeek (a, supervisor, 0);  //a+1が必要なので上書き不可
 25354:     if ((a & 1) == 0) {  //偶数
 25355:       return (a0 & 1) != 0 ? 65535 : mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdPwz (a0);
 25356:     } else {  //奇数
 25357:       int a1 = mmuTranslatePeek (a + 1, supervisor, 0);
 25358:       return (((a0 & 1) == 0 ? 255 : mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdPbz (a0)) << 8 |
 25359:               ((a1 & 1) != 0 ? 255 : mm[a1 >>> XEiJ.BUS_PAGE_BITS].mmdPbz (a1)));
 25360:     }
 25361:   }  //mmuPeekWordZeroData(int,int)
 25362: 
 25363:   //d = mmuPeekWordZeroEven (a, supervisor)
 25364:   //  ピークワードゼロ拡張(偶数)
 25365:   public static int mmuPeekWordZeroEven (int a, int supervisor) {
 25366:     MemoryMappedDevice[] mm = supervisor != 0 ? DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap : DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap;
 25367:     a = mmuTranslatePeek (a, supervisor, 0);
 25368:     return (a & 1) != 0 ? 65535 : mm[a >>> XEiJ.BUS_PAGE_BITS].mmdPwz (a);
 25369:   }  //mmuPeekWordZeroEven(int,int)
 25370: 
 25371:   //d = mmuPeekWordZeroCode (a, supervisor)
 25372:   //  ピークワードゼロ拡張(コード)
 25373:   public static int mmuPeekWordZeroCode (int a, int supervisor) {
 25374:     MemoryMappedDevice[] mm = supervisor != 0 ? DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap : DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap;
 25375:     a = mmuTranslatePeek (a, supervisor, 1);
 25376:     return (a & 1) != 0 ? 65535 : mm[a >>> XEiJ.BUS_PAGE_BITS].mmdPwz (a);
 25377:   }  //mmuPeekWordZeroCode(int,int)
 25378: 
 25379:   //d = mmuPeekLong (a, f)
 25380:   //  ピークロング
 25381:   public static int mmuPeekLong (int a, int f) {
 25382:     f = f == -1 ? XEiJ.regSRS != 0 ? 5 : 1 : f & 7;
 25383:     MemoryMappedDevice[] mm = (DataBreakPoint.DBP_ON ?
 25384:                                (f & 4) != 0 ? DataBreakPoint.dbpSuperMap : DataBreakPoint.dbpUserMap :
 25385:                                (f & 4) != 0 ? XEiJ.busSuperMap : XEiJ.busUserMap);
 25386:     //    01234567
 25387:     if (0b01100110 << 24 << f < 0) {  //SFC=1,2,5,6。アドレス変換あり
 25388:       int a0 = mmuTranslatePeek (a, f & 4, f & 2);
 25389:       if ((a & 3) == 0) {  //4の倍数
 25390:         return (a ^ a0) != 1 ? mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdPls (a0) : -1;
 25391:       } else if ((a & 1) == 0) {  //4の倍数ではない偶数
 25392:         int a2 = mmuTranslatePeek (a + 2, f & 4, f & 2);
 25393:         return (((a     ^ a0) != 1 ? mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdPws (a0) :    -1) << 16 |
 25394:                 ((a + 2 ^ a2) != 1 ? mm[a2 >>> XEiJ.BUS_PAGE_BITS].mmdPwz (a2) : 65535));
 25395:       } else {  //奇数
 25396:         int a1 = mmuTranslatePeek (a + 1, f & 4, f & 2);
 25397:         int a3 = mmuTranslatePeek (a + 3, f & 4, f & 2);
 25398:         return (((a     ^ a0) != 1 ? mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdPbs (a0) :    -1) << 24 |
 25399:                 ((a + 1 ^ a1) != 1 ? mm[a1 >>> XEiJ.BUS_PAGE_BITS].mmdPwz (a1) : 65535) <<  8 |
 25400:                 ((a + 3 ^ a3) != 1 ? mm[a3 >>> XEiJ.BUS_PAGE_BITS].mmdPbz (a3) :   255));
 25401:       }
 25402:     } else if (f != 7) {  //SFC=0,3,4。アドレス変換なし
 25403:       if ((a & 3) == 0) {  //4の倍数
 25404:         return mm[a >>> XEiJ.BUS_PAGE_BITS].mmdPls (a);
 25405:       } else if ((a & 1) == 0) {  //4の倍数ではない偶数
 25406:         return (mm[a     >>> XEiJ.BUS_PAGE_BITS].mmdPws (a    ) << 16 |
 25407:                 mm[a + 2 >>> XEiJ.BUS_PAGE_BITS].mmdPwz (a + 2));
 25408:       } else {  //奇数
 25409:         return (mm[a     >>> XEiJ.BUS_PAGE_BITS].mmdPbs (a    ) << 24 |
 25410:                 mm[a + 1 >>> XEiJ.BUS_PAGE_BITS].mmdPwz (a + 1) <<  8 |
 25411:                 mm[a + 3 >>> XEiJ.BUS_PAGE_BITS].mmdPbz (a + 3));
 25412:       }
 25413:     } else {
 25414:       return -1;
 25415:     }
 25416:   }  //mmuPeekLong(int,int)
 25417: 
 25418:   //d = mmuPeekLongData (a, supervisor)
 25419:   //  ピークロング(データ)
 25420:   public static int mmuPeekLongData (int a, int supervisor) {
 25421:     MemoryMappedDevice[] mm = supervisor != 0 ? DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap : DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap;
 25422:     int a0 = mmuTranslatePeek (a, supervisor, 0);  //a+1,a+2,a+3が必要なので上書き不可
 25423:     if ((a & 3) == 0) {  //4の倍数
 25424:       return (a0 & 1) != 0 ? -1 : mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdPls (a0);
 25425:     } else if ((a & 1) == 0) {  //4の倍数+2
 25426:       int a2 = mmuTranslatePeek (a + 2, supervisor, 0);
 25427:       return (((a0 & 1) != 0 ?    -1 : mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdPws (a0)) << 16 |
 25428:               ((a2 & 1) != 0 ? 65535 : mm[a2 >>> XEiJ.BUS_PAGE_BITS].mmdPwz (a2)));
 25429:     } else {  //奇数
 25430:       int a1 = mmuTranslatePeek (a + 1, supervisor, 0);
 25431:       int a3 = mmuTranslatePeek (a + 3, supervisor, 0);
 25432:       return (((a0 & 1) == 0 ?    -1 : mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdPbs (a0)) << 24 |
 25433:               ((a1 & 1) != 0 ? 65535 : mm[a1 >>> XEiJ.BUS_PAGE_BITS].mmdPwz (a1)) << 16 |
 25434:               ((a3 & 1) != 0 ?   255 : mm[a3 >>> XEiJ.BUS_PAGE_BITS].mmdPbz (a3)));
 25435:     }
 25436:   }  //mmuPeekLongData(int,int)
 25437: 
 25438:   //d = mmuPeekLongEven (a, supervisor)
 25439:   //  ピークロング(偶数)
 25440:   public static int mmuPeekLongEven (int a, int supervisor) {
 25441:     MemoryMappedDevice[] mm = supervisor != 0 ? DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap : DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap;
 25442:     int a0 = mmuTranslatePeek (a, supervisor, 0);  //a+2が必要なので上書き不可
 25443:     if ((a & 2) == 0) {  //4の倍数
 25444:       return (a0 & 1) != 0 ? -1 : mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdPls (a0);
 25445:     } else {  //4の倍数+2
 25446:       int a2 = mmuTranslatePeek (a + 2, supervisor, 0);
 25447:       return (((a0 & 1) != 0 ?    -1 : mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdPws (a0)) << 16 |
 25448:               ((a2 & 1) != 0 ? 65535 : mm[a2 >>> XEiJ.BUS_PAGE_BITS].mmdPwz (a2)));
 25449:     }
 25450:   }  //mmuPeekLongEven(int,int)
 25451: 
 25452:   //d = mmuPeekLongFour (a, supervisor)
 25453:   //  ピークロング(4の倍数)
 25454:   public static int mmuPeekLongFour (int a, int supervisor) {
 25455:     MemoryMappedDevice[] mm = supervisor != 0 ? DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap : DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap;
 25456:     a = mmuTranslatePeek (a, supervisor, 0);
 25457:     return (a & 1) != 0 ? -1 : mm[a >>> XEiJ.BUS_PAGE_BITS].mmdPls (a);
 25458:   }  //mmuPeekLongFour(int,int)
 25459: 
 25460:   //d = mmuPeekLongCode (a, supervisor)
 25461:   //  ピークロング(コード)
 25462:   public static int mmuPeekLongCode (int a, int supervisor) {
 25463:     MemoryMappedDevice[] mm = supervisor != 0 ? DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap : DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap;
 25464:     int a0 = mmuTranslatePeek (a, supervisor, 1);  //a+2が必要なので上書き不可
 25465:     if ((a & 2) == 0) {  //4の倍数
 25466:       return (a0 & 1) != 0 ? -1 : mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdPls (a0);
 25467:     } else {  //4の倍数+2
 25468:       int a2 = mmuTranslatePeek (a + 2, supervisor, 1);
 25469:       return (((a0 & 1) != 0 ?    -1 : mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdPws (a0)) << 16 |
 25470:               ((a2 & 1) != 0 ? 65535 : mm[a2 >>> XEiJ.BUS_PAGE_BITS].mmdPwz (a2)));
 25471:     }
 25472:   }  //mmuPeekLongCode(int,int)
 25473: 
 25474:   //d = mmuPeekQuad (a, f)
 25475:   //  ピーククワッド
 25476:   public static long mmuPeekQuad (int a, int f) {
 25477:     return (long) mmuPeekLong (a, f) << 32 | mmuPeekLong (a + 4, f) & 0xffffffffL;
 25478:   }  //mmuPeekQuad(int,int)
 25479: 
 25480:   //d = mmuPeekQuadData (a, supervisor)
 25481:   //  ピーククワッド(データ)
 25482:   public static long mmuPeekQuadData (int a, int supervisor) {
 25483:     MemoryMappedDevice[] mm = supervisor != 0 ? DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap : DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap;
 25484:     int a0 = mmuTranslatePeek (a, supervisor, 0);  //a+1,a+2,a+3,a+4,a+5,a+6,a+7が必要なので上書き不可
 25485:     if ((a & 3) == 0) {  //4の倍数
 25486:       int a4 = mmuTranslatePeek (a + 4, supervisor, 0);  //4の倍数
 25487:       return ((long) ((a0 & 1) != 0 ? -1 : mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdPls (a0)) << 32 |
 25488:               (long) ((a4 & 1) != 0 ? -1 : mm[a4 >>> XEiJ.BUS_PAGE_BITS].mmdPls (a4)) & 0x00000000ffffffffL);
 25489:     } else if ((a & 1) == 0) {  //4の倍数+2
 25490:       int a2 = mmuTranslatePeek (a + 2, supervisor, 0);  //4の倍数
 25491:       int a6 = mmuTranslatePeek (a + 6, supervisor, 0);  //4の倍数
 25492:       return ((long) ((a0 & 1) != 0 ?    -1 : mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdPws (a0)) << 48 |
 25493:               (long) ((a2 & 1) != 0 ?    -1 : mm[a2 >>> XEiJ.BUS_PAGE_BITS].mmdPls (a2)) << 16 & 0x0000ffffffff0000L |
 25494:               (long) ((a6 & 1) != 0 ? 65535 : mm[a6 >>> XEiJ.BUS_PAGE_BITS].mmdPwz (a6)));
 25495:     } else if ((a & 3) == 1) {  //4の倍数+1
 25496:       int a1 = mmuTranslatePeek (a + 1, supervisor, 0);  //4の倍数+2
 25497:       int a3 = mmuTranslatePeek (a + 3, supervisor, 0);  //4の倍数
 25498:       int a7 = mmuTranslatePeek (a + 7, supervisor, 0);  //4の倍数
 25499:       return ((long) ((a0 & 1) != 0 ?    -1 : mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdPbs (a0)) << 56 |
 25500:               (long) ((a1 & 1) != 0 ? 65535 : mm[a1 >>> XEiJ.BUS_PAGE_BITS].mmdPwz (a1)) << 40 |
 25501:               (long) ((a3 & 1) != 0 ?    -1 : mm[a3 >>> XEiJ.BUS_PAGE_BITS].mmdPls (a3)) <<  8 & 0x000000ffffffff00L |
 25502:               (long) ((a7 & 1) != 0 ?   255 : mm[a7 >>> XEiJ.BUS_PAGE_BITS].mmdPbz (a7)));
 25503:     } else {  //4の倍数+3
 25504:       int a1 = mmuTranslatePeek (a + 1, supervisor, 0);  //4の倍数
 25505:       int a5 = mmuTranslatePeek (a + 5, supervisor, 0);  //4の倍数
 25506:       int a7 = mmuTranslatePeek (a + 7, supervisor, 0);  //4の倍数+2
 25507:       return ((long) ((a0 & 1) != 0 ?    -1 : mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdPbs (a0)) << 56 |
 25508:               (long) ((a1 & 1) != 0 ?    -1 : mm[a1 >>> XEiJ.BUS_PAGE_BITS].mmdPls (a1)) << 24 & 0x00ffffffff000000L |
 25509:               (long) ((a5 & 1) != 0 ? 65535 : mm[a5 >>> XEiJ.BUS_PAGE_BITS].mmdPwz (a5)) <<  8 |
 25510:               (long) ((a7 & 1) != 0 ?   255 : mm[a7 >>> XEiJ.BUS_PAGE_BITS].mmdPbz (a7)));
 25511:     }
 25512:   }  //mmuPeekQuadData(int,int)
 25513: 
 25514:   //d = mmuPeekQuadEven (a, supervisor)
 25515:   //  ピーククワッド(偶数)
 25516:   public static long mmuPeekQuadEven (int a, int supervisor) {
 25517:     MemoryMappedDevice[] mm = supervisor != 0 ? DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap : DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap;
 25518:     int a0 = mmuTranslatePeek (a, supervisor, 0);  //a+2,a+4,a+6が必要なので上書き不可
 25519:     if ((a & 2) == 0) {  //4の倍数
 25520:       int a4 = mmuTranslatePeek (a + 4, supervisor, 0);  //4の倍数
 25521:       return ((long) ((a0 & 1) != 0 ? -1 : mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdPls (a0)) << 32 |
 25522:               (long) ((a4 & 1) != 0 ? -1 : mm[a4 >>> XEiJ.BUS_PAGE_BITS].mmdPls (a4)) & 0x00000000ffffffffL);
 25523:     } else {  //4の倍数+2
 25524:       int a2 = mmuTranslatePeek (a + 2, supervisor, 0);  //4の倍数
 25525:       int a6 = mmuTranslatePeek (a + 6, supervisor, 0);  //4の倍数
 25526:       return ((long) ((a0 & 1) != 0 ?    -1 : mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdPws (a0)) << 48 |
 25527:               (long) ((a2 & 1) != 0 ?    -1 : mm[a2 >>> XEiJ.BUS_PAGE_BITS].mmdPls (a2)) << 16 & 0x0000ffffffff0000L |
 25528:               (long) ((a6 & 1) != 0 ? 65535 : mm[a6 >>> XEiJ.BUS_PAGE_BITS].mmdPwz (a6)));
 25529:     }
 25530:   }  //mmuPeekQuadEven(int,int)
 25531: 
 25532:   //d = mmuPeekQuadFour (a, supervisor)
 25533:   //  ピーククワッド(4の倍数)
 25534:   public static long mmuPeekQuadFour (int a, int supervisor) {
 25535:     MemoryMappedDevice[] mm = supervisor != 0 ? DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap : DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap;
 25536:     int a0 = mmuTranslatePeek (a    , supervisor, 0);  //4の倍数。a+4が必要なので上書き不可
 25537:     int a4 = mmuTranslatePeek (a + 4, supervisor, 0);  //4の倍数
 25538:     return ((long) ((a0 & 1) != 0 ? -1 : mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdPls (a0)) << 32 |
 25539:             (long) ((a4 & 1) != 0 ? -1 : mm[a4 >>> XEiJ.BUS_PAGE_BITS].mmdPls (a4)) & 0x00000000ffffffffL);
 25540:   }  //mmuPeekQuadFour(int,int)
 25541: 
 25542:   //d = mmuPeekQuadCode (a, supervisor)
 25543:   //  ピーククワッド(コード)
 25544:   public static long mmuPeekQuadCode (int a, int supervisor) {
 25545:     MemoryMappedDevice[] mm = supervisor != 0 ? DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap : DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap;
 25546:     int a0 = mmuTranslatePeek (a, supervisor, 1);  //a+2,a+4,a+6が必要なので上書き不可
 25547:     if ((a & 2) == 0) {  //4の倍数
 25548:       int a4 = mmuTranslatePeek (a + 4, supervisor, 1);
 25549:       return ((long) ((a0 & 1) != 0 ? -1 : mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdPls (a0)) << 32 |
 25550:               (long) ((a4 & 1) != 0 ? -1 : mm[a4 >>> XEiJ.BUS_PAGE_BITS].mmdPls (a4)) & 0x00000000ffffffffL);
 25551:     } else {  //4の倍数+2
 25552:       int a2 = mmuTranslatePeek (a + 2, supervisor, 1);  //4の倍数
 25553:       int a6 = mmuTranslatePeek (a + 6, supervisor, 1);  //4の倍数
 25554:       return ((long) ((a0 & 1) != 0 ?    -1 : mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdPws (a0)) << 48 |
 25555:               (long) ((a2 & 1) != 0 ?    -1 : mm[a2 >>> XEiJ.BUS_PAGE_BITS].mmdPls (a2)) << 16 & 0x0000ffffffff0000L |
 25556:               (long) ((a6 & 1) != 0 ? 65535 : mm[a6 >>> XEiJ.BUS_PAGE_BITS].mmdPwz (a6)));
 25557:     }
 25558:   }  //mmuPeekQuadCode(int,int)
 25559: 
 25560:   //mmuPeekExtended (a, b, f)
 25561:   //  ピークエクステンデッド
 25562:   public static void mmuPeekExtended (int a, byte[] b, int f) {
 25563:     for (int i = 0; i < 12; i++) {
 25564:       b[i] = mmuPeekByteSign (a + i, f);
 25565:     }
 25566:   }  //mmuPeekExtended(int,int,byte[])
 25567: 
 25568:   //len = mmuPeekStrlen (a, l)
 25569:   public static int mmuPeekStrlen (int a, int l, int supervisor) {
 25570:     for (int i = 0; i < l; i++) {
 25571:       if (mmuPeekByteZeroData (a + i, supervisor) == 0) {
 25572:         return i;
 25573:       }
 25574:     }
 25575:     return l;
 25576:   }  //mmuPeekStrlen(int,int,int)
 25577: 
 25578:   //bool = mmuPeekEquals (a, str)
 25579:   //  アドレスaから始まるSJISの文字列とstrをSJISに変換してエスケープシーケンスを展開した文字列を比較する
 25580:   //  終端の\0まで比較するときはstrに\0を含めること
 25581:   //  \x??で任意のSJISの文字を書ける
 25582:   //  SJISに変換できない文字は'※'とみなす
 25583:   //  スーパーバイザモード比較する
 25584:   public static boolean mmuPeekEquals (int a, String str) {
 25585:     int len = str.length ();
 25586:     for (int i = 0; i < len; i++) {
 25587:       int c = str.charAt (i);
 25588:       if (c == '\\') {  //エスケープシーケンス。SJIS変換を省略する
 25589:         int d = i + 1 < len ? str.charAt (i + 1) : -1;  //2文字目
 25590:         if ((d & -4) == '0') {  // \[0-3][0-7]{0,2}
 25591:           c = d & 7;
 25592:           d = i + 2 < len ? str.charAt (i + 2) : -1;  //3文字目
 25593:           if ((d & -8) == '0') {
 25594:             c = c << 3 | (d & 7);
 25595:             d = i + 3 < len ? str.charAt (i + 3) : -1;  //4文字目
 25596:             if ((d & -8) == '0') {
 25597:               c = c << 3 | (d & 7);
 25598:               i++;  //4文字
 25599:             }
 25600:             i++;  //3文字
 25601:           }
 25602:           i++;  //2文字
 25603:         } else if ((d & -4) == '4') {  // \[4-7][0-7]?
 25604:           c = d & 7;
 25605:           d = i + 2 < len ? str.charAt (i + 2) : -1;  //3文字目
 25606:           if ((d & -8) == '0') {
 25607:             c = c << 3 | (d & 7);
 25608:             i++;  //3文字
 25609:           }
 25610:           i++;  //2文字
 25611:         } else if (d == 'b') {  // \b
 25612:           c = 0x08;  //BS
 25613:           i++;  //2文字
 25614:         } else if (d == 't') {  // \t
 25615:           c = 0x09;  //HT
 25616:           i++;  //2文字
 25617:         } else if (d == 'n') {  // \n
 25618:           c = 0x0a;  //LF
 25619:           i++;  //2文字
 25620:         } else if (d == 'v') {  // \v
 25621:           c = 0x0b;  //VT
 25622:           i++;  //2文字
 25623:         } else if (d == 'f') {  // \f
 25624:           c = 0x0c;  //FF
 25625:           i++;  //2文字
 25626:         } else if (d == 'r') {  // \r
 25627:           c = 0x0d;  //CR
 25628:           i++;  //2文字
 25629:         } else if (d == 'x' &&
 25630:                    i + 3 < len &&
 25631:                    CharacterCode.chrIsXdigit (str.charAt (i + 2)) &&
 25632:                    CharacterCode.chrIsXdigit (str.charAt (i + 3))) {  // \x[0-9A-Fa-f]{2}
 25633:           c = (CharacterCode.chrDigit (str.charAt (i + 2)) << 4 |
 25634:                CharacterCode.chrDigit (str.charAt (i + 3)));
 25635:           i += 3;  //4文字
 25636:         } else if ('!' <= d && d <= '~') {
 25637:           c = d;
 25638:           i++;  //2文字
 25639:         }
 25640:         if (mmuPeekByteZeroData (a++, 1) != c) {
 25641:           return false;
 25642:         }
 25643:       } else {  //エスケープシーケンス以外
 25644:         int s = CharacterCode.chrCharToSJIS[c];
 25645:         if (s == 0 && c != 0) {
 25646:           s = 0x81a6;  //'※'
 25647:         }
 25648:         if (s >> 8 != 0) {  //2バイトコード
 25649:           if (mmuPeekByteZeroData (a++, 1) != s >> 8) {
 25650:             return false;
 25651:           }
 25652:         }
 25653:         if (mmuPeekByteZeroData (a++, 1) != (s & 0xff)) {
 25654:           return false;
 25655:         }
 25656:       }
 25657:     }  //for
 25658:     return true;
 25659:   }  //mmuPeekEquals
 25660: 
 25661:   //s = mmuPeekStringL (a, l, supervisor)
 25662:   //sb = mmuPeekStringL (sb, a, l, supervisor)
 25663:   //  ピークストリング(長さ指定)
 25664:   //  文字列を読み出す
 25665:   //  対応する文字がないときは'.'または'※'になる
 25666:   //  制御コードは'.'になる
 25667:   public static String mmuPeekStringL (int a, int l, int supervisor) {
 25668:     return mmuPeekStringL (new StringBuilder (), a, l, supervisor).toString ();
 25669:   }  //mmuPeekStringL(int,int,int)
 25670:   public static StringBuilder mmuPeekStringL (StringBuilder sb, int a, int l, int supervisor) {
 25671:     for (int i = 0; i < l; i++) {
 25672:       int s = mmuPeekByteZeroData (a + i, supervisor);
 25673:       char c;
 25674:       if (0x81 <= s && s <= 0x9f || 0xe0 <= s && s <= 0xef) {  //SJISの2バイトコードの1バイト目
 25675:         int t = i + 1 < l ? mmuPeekByteZeroData (a + i + 1, supervisor) : 0;
 25676:         if (0x40 <= t && t != 0x7f && t <= 0xfc) {  //SJISの2バイトコードの2バイト目
 25677:           c = CharacterCode.chrSJISToChar[s << 8 | t];  //2バイトで変換する
 25678:           if (c == 0) {  //対応する文字がない
 25679:             c = '※';
 25680:           }
 25681:           i++;
 25682:         } else {  //SJISの2バイトコードの2バイト目ではない
 25683:           c = '.';  //SJISの2バイトコードの1バイト目ではなかった
 25684:         }
 25685:       } else {  //SJISの2バイトコードの1バイト目ではない
 25686:         c = CharacterCode.chrSJISToChar[s];  //1バイトで変換する
 25687:         if (c < 0x20 || c == 0x7f) {  //対応する文字がないまたは制御コード
 25688:           c = '.';
 25689:         }
 25690:       }
 25691:       sb.append (c);
 25692:     }
 25693:     return sb;
 25694:   }  //mmuPeekString(StringBuilder,int,int,int)
 25695: 
 25696:   //s = mmuPeekStringZ (a, f)
 25697:   //sb = mmuPeekStringZ (sb, a, f)
 25698:   //  ピークストリング
 25699:   //  文字列をSJISからUTF-16に変換しながらメモリから読み出す
 25700:   //  '\0'の手前まで読み出す
 25701:   //  UTF-16に変換できない文字は'\ufffd'になる
 25702:   public static String mmuPeekStringZ (int a, int f) {
 25703:     return mmuPeekStringZ (new StringBuilder (), a, f).toString ();
 25704:   }  //mmuPeekStringZ(int,int)
 25705:   public static StringBuilder mmuPeekStringZ (StringBuilder sb, int a, int f) {
 25706:     for (;;) {
 25707:       int s = mmuPeekByteSign (a++, f) & 255;
 25708:       if (s == 0) {
 25709:         break;
 25710:       }
 25711:       int u;
 25712:       if (0x81 <= s && s <= 0x9f || 0xe0 <= s && s <= 0xef) {  //SJISの2バイトコードの1バイト目
 25713:         int t = mmuPeekByteSign (a++, f) & 255;
 25714:         if (t == 0) {
 25715:           sb.append ('\ufffd');
 25716:           break;
 25717:         }
 25718:         if (0x40 <= t && t != 0x7f && t <= 0xfc) {  //SJISの2バイトコードの2バイト目
 25719:           t |= s << 8;
 25720:           u = CharacterCode.chrSJISToChar[t];  //2バイトで変換する
 25721:           if (u == 0) {  //変換できない
 25722:             u = 0xfffd;
 25723:           }
 25724:         } else {  //SJISの2バイトコードの2バイト目ではない
 25725:           u = 0xfffd;
 25726:         }
 25727:       } else {  //SJISの2バイトコードの1バイト目ではない
 25728:         u = CharacterCode.chrSJISToChar[s];  //1バイトで変換する
 25729:         if (u == 0) {  //変換できない
 25730:           u = 0xfffd;
 25731:         }
 25732:       }
 25733:       sb.append ((char) u);
 25734:     }
 25735:     return sb;
 25736:   }  //mmuPeekStringZ(StringBuilder,int,int)
 25737: 
 25738:   //--------------------------------------------------------------------------------
 25739:   //リード
 25740:   //  アドレス変換はリード
 25741:   //  FSLWのRead and WriteはRead
 25742: 
 25743:   //d = mmuReadByteSignData (a, supervisor)
 25744:   //  リードバイト符号拡張(データ)
 25745:   public static byte mmuReadByteSignData (int a, int supervisor) throws M68kException {
 25746:     if (supervisor != 0) {  //スーパーバイザモード
 25747:       M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_READ | M68kException.M6E_FSLW_SIZE_BYTE | M68kException.M6E_FSLW_TM_SUPER_DATA;
 25748:       int a0 = mmuTranslateReadSuperData (a);
 25749:       return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRbs (a0);
 25750:     } else {  //ユーザモード
 25751:       M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_READ | M68kException.M6E_FSLW_SIZE_BYTE | M68kException.M6E_FSLW_TM_USER_DATA;
 25752:       int a0 = mmuTranslateReadUserData (a);
 25753:       return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRbs (a0);
 25754:     }
 25755:   }  //mmuReadByteSignData(int,int)
 25756: 
 25757:   //d = mmuReadByteZeroData (a, supervisor)
 25758:   //  リードバイトゼロ拡張(データ)
 25759:   public static int mmuReadByteZeroData (int a, int supervisor) throws M68kException {
 25760:     if (supervisor != 0) {  //スーパーバイザモード
 25761:       M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_READ | M68kException.M6E_FSLW_SIZE_BYTE | M68kException.M6E_FSLW_TM_SUPER_DATA;
 25762:       int a0 = mmuTranslateReadSuperData (a);
 25763:       return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRbz (a0);
 25764:     } else {  //ユーザモード
 25765:       M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_READ | M68kException.M6E_FSLW_SIZE_BYTE | M68kException.M6E_FSLW_TM_USER_DATA;
 25766:       int a0 = mmuTranslateReadUserData (a);
 25767:       return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRbz (a0);
 25768:     }
 25769:   }  //mmuReadByteZeroData(int,int)
 25770: 
 25771:   //d = mmuReadByteSignExword (a, supervisor)
 25772:   //  リードバイト符号拡張(拡張ワード)
 25773:   public static byte mmuReadByteSignExword (int a, int supervisor) throws M68kException {
 25774:     if (supervisor != 0) {  //スーパーバイザモード
 25775:       M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_EXWORD | M68kException.M6E_FSLW_RW_READ | M68kException.M6E_FSLW_SIZE_BYTE | M68kException.M6E_FSLW_TM_SUPER_CODE;
 25776:       int a0 = mmuTranslateReadSuperCode (a);
 25777:       return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRbs (a0);
 25778:     } else {  //ユーザモード
 25779:       M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_EXWORD | M68kException.M6E_FSLW_RW_READ | M68kException.M6E_FSLW_SIZE_BYTE | M68kException.M6E_FSLW_TM_USER_CODE;
 25780:       int a0 = mmuTranslateReadUserCode (a);
 25781:       return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRbs (a0);
 25782:     }
 25783:   }  //mmuReadByteSignExword(int,int)
 25784: 
 25785:   //d = mmuReadByteZeroExword (a, supervisor)
 25786:   //  リードバイトゼロ拡張(拡張ワード)
 25787:   public static int mmuReadByteZeroExword (int a, int supervisor) throws M68kException {
 25788:     if (supervisor != 0) {  //スーパーバイザモード
 25789:       M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_EXWORD | M68kException.M6E_FSLW_RW_READ | M68kException.M6E_FSLW_SIZE_BYTE | M68kException.M6E_FSLW_TM_SUPER_CODE;
 25790:       int a0 = mmuTranslateReadSuperCode (a);
 25791:       return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRbz (a0);
 25792:     } else {  //ユーザモード
 25793:       M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_EXWORD | M68kException.M6E_FSLW_RW_READ | M68kException.M6E_FSLW_SIZE_BYTE | M68kException.M6E_FSLW_TM_USER_CODE;
 25794:       int a0 = mmuTranslateReadUserCode (a);
 25795:       return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRbz (a0);
 25796:     }
 25797:   }  //mmuReadByteZeroExword(int,int)
 25798: 
 25799:   //d = mmuReadWordSignData (a, supervisor)
 25800:   //  リードワード符号拡張(データ)
 25801:   public static int mmuReadWordSignData (int a, int supervisor) throws M68kException {
 25802:     if (supervisor != 0) {  //スーパーバイザモード
 25803:       M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_READ | M68kException.M6E_FSLW_SIZE_WORD | M68kException.M6E_FSLW_TM_SUPER_DATA;
 25804:       int a0 = mmuTranslateReadSuperData (a);  //a+1が必要なので上書き不可
 25805:       if ((a & 1) == 0) {  //偶数
 25806:         return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRws (a0);
 25807:       } else {  //奇数
 25808:         int d0 = (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRbs (a0);
 25809:         M68kException.m6eFSLW ^= M68kException.M6E_FSLW_IOMA_FIRST ^ M68kException.M6E_FSLW_IOMA_SECOND;
 25810:         int a1 = mmuTranslateReadSuperData (a + 1);  //偶数
 25811:         return (d0 << 8 |
 25812:                 (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a1 >>> XEiJ.BUS_PAGE_BITS].mmdRbz (a1));
 25813:       }
 25814:     } else {  //ユーザモード
 25815:       M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_READ | M68kException.M6E_FSLW_SIZE_WORD | M68kException.M6E_FSLW_TM_USER_DATA;
 25816:       int a0 = mmuTranslateReadUserData (a);  //a+1が必要なので上書き不可
 25817:       if ((a & 1) == 0) {  //偶数
 25818:         return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRws (a0);
 25819:       } else {  //奇数
 25820:         int d0 = (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRbs (a0);
 25821:         M68kException.m6eFSLW ^= M68kException.M6E_FSLW_IOMA_FIRST ^ M68kException.M6E_FSLW_IOMA_SECOND;
 25822:         int a1 = mmuTranslateReadUserData (a + 1);  //偶数
 25823:         return (d0 << 8 |
 25824:                 (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a1 >>> XEiJ.BUS_PAGE_BITS].mmdRbz (a1));
 25825:       }
 25826:     }
 25827:   }  //mmuReadWordSignData(int,int)
 25828: 
 25829:   //d = mmuReadWordZeroData (a, supervisor)
 25830:   //  リードワードゼロ拡張(データ)
 25831:   public static int mmuReadWordZeroData (int a, int supervisor) throws M68kException {
 25832:     if (supervisor != 0) {  //スーパーバイザモード
 25833:       M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_READ | M68kException.M6E_FSLW_SIZE_WORD | M68kException.M6E_FSLW_TM_SUPER_DATA;
 25834:       int a0 = mmuTranslateReadSuperData (a);  //a+1が必要なので上書き不可
 25835:       if ((a & 1) == 0) {  //偶数
 25836:         return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a0);
 25837:       } else {  //奇数
 25838:         int d0 = (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRbz (a0);
 25839:         M68kException.m6eFSLW ^= M68kException.M6E_FSLW_IOMA_FIRST ^ M68kException.M6E_FSLW_IOMA_SECOND;
 25840:         int a1 = mmuTranslateReadSuperData (a + 1);  //偶数
 25841:         return (d0 << 8 |
 25842:                 (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a1 >>> XEiJ.BUS_PAGE_BITS].mmdRbz (a1));
 25843:       }
 25844:     } else {  //ユーザモード
 25845:       M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_READ | M68kException.M6E_FSLW_SIZE_WORD | M68kException.M6E_FSLW_TM_USER_DATA;
 25846:       int a0 = mmuTranslateReadUserData (a);  //a+1が必要なので上書き不可
 25847:       if ((a & 1) == 0) {  //偶数
 25848:         return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a0);
 25849:       } else {  //奇数
 25850:         int d0 = (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRbz (a0);
 25851:         M68kException.m6eFSLW ^= M68kException.M6E_FSLW_IOMA_FIRST ^ M68kException.M6E_FSLW_IOMA_SECOND;
 25852:         int a1 = mmuTranslateReadUserData (a + 1);  //偶数
 25853:         return (d0 << 8 |
 25854:                 (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a1 >>> XEiJ.BUS_PAGE_BITS].mmdRbz (a1));
 25855:       }
 25856:     }
 25857:   }  //mmuReadWordZeroData(int,int)
 25858: 
 25859:   //d = mmuReadWordSignEven (a, supervisor)
 25860:   //  リードワード符号拡張(偶数)
 25861:   public static int mmuReadWordSignEven (int a, int supervisor) throws M68kException {
 25862:     if (supervisor != 0) {  //スーパーバイザモード
 25863:       M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_READ | M68kException.M6E_FSLW_SIZE_WORD | M68kException.M6E_FSLW_TM_SUPER_DATA;
 25864:       a = mmuTranslateReadSuperData (a);
 25865:       return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a >>> XEiJ.BUS_PAGE_BITS].mmdRws (a);
 25866:     } else {  //ユーザモード
 25867:       M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_READ | M68kException.M6E_FSLW_SIZE_WORD | M68kException.M6E_FSLW_TM_USER_DATA;
 25868:       a = mmuTranslateReadUserData (a);
 25869:       return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a >>> XEiJ.BUS_PAGE_BITS].mmdRws (a);
 25870:     }
 25871:   }  //mmuReadWordSignEven(int,int)
 25872: 
 25873:   //d = mmuReadWordZeroEven (a, supervisor)
 25874:   //  リードワードゼロ拡張(偶数)
 25875:   public static int mmuReadWordZeroEven (int a, int supervisor) throws M68kException {
 25876:     if (supervisor != 0) {  //スーパーバイザモード
 25877:       M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_READ | M68kException.M6E_FSLW_SIZE_WORD | M68kException.M6E_FSLW_TM_SUPER_DATA;
 25878:       a = mmuTranslateReadSuperData (a);
 25879:       return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a);
 25880:     } else {  //ユーザモード
 25881:       M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_READ | M68kException.M6E_FSLW_SIZE_WORD | M68kException.M6E_FSLW_TM_USER_DATA;
 25882:       a = mmuTranslateReadUserData (a);
 25883:       return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a);
 25884:     }
 25885:   }  //mmuReadWordZeroEven(int,int)
 25886: 
 25887:   //d = mmuReadWordSignExword (a, supervisor)
 25888:   //  リードワード符号拡張(拡張ワード)
 25889:   public static int mmuReadWordSignExword (int a, int supervisor) throws M68kException {
 25890:     if (supervisor != 0) {  //スーパーバイザモード
 25891:       M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_EXWORD | M68kException.M6E_FSLW_RW_READ | M68kException.M6E_FSLW_SIZE_WORD | M68kException.M6E_FSLW_TM_SUPER_CODE;
 25892:       a = mmuTranslateReadSuperCode (a);
 25893:       return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a >>> XEiJ.BUS_PAGE_BITS].mmdRws (a);
 25894:     } else {  //ユーザモード
 25895:       M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_EXWORD | M68kException.M6E_FSLW_RW_READ | M68kException.M6E_FSLW_SIZE_WORD | M68kException.M6E_FSLW_TM_USER_CODE;
 25896:       a = mmuTranslateReadUserCode (a);
 25897:       return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a >>> XEiJ.BUS_PAGE_BITS].mmdRws (a);
 25898:     }
 25899:   }  //mmuReadWordSignExword(int,int)
 25900: 
 25901:   //d = mmuReadWordZeroExword (a, supervisor)
 25902:   //  リードワードゼロ拡張(拡張ワード)
 25903:   public static int mmuReadWordZeroExword (int a, int supervisor) throws M68kException {
 25904:     if (supervisor != 0) {  //スーパーバイザモード
 25905:       M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_EXWORD | M68kException.M6E_FSLW_RW_READ | M68kException.M6E_FSLW_SIZE_WORD | M68kException.M6E_FSLW_TM_SUPER_CODE;
 25906:       a = mmuTranslateReadSuperCode (a);
 25907:       return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a);
 25908:     } else {  //ユーザモード
 25909:       M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_EXWORD | M68kException.M6E_FSLW_RW_READ | M68kException.M6E_FSLW_SIZE_WORD | M68kException.M6E_FSLW_TM_USER_CODE;
 25910:       a = mmuTranslateReadUserCode (a);
 25911:       return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a);
 25912:     }
 25913:   }  //mmuReadWordZeroExword(int,int)
 25914: 
 25915:   //d = mmuReadWordSignOpword (a, supervisor)
 25916:   //  リードワード符号拡張(命令ワード)
 25917:   public static int mmuReadWordSignOpword (int a, int supervisor) throws M68kException {
 25918:     if (supervisor != 0) {  //スーパーバイザモード
 25919:       M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_OPWORD | M68kException.M6E_FSLW_RW_READ | M68kException.M6E_FSLW_SIZE_WORD | M68kException.M6E_FSLW_TM_SUPER_CODE;
 25920:       a = mmuTranslateReadSuperCode (a);
 25921:       return (InstructionBreakPoint.IBP_ON ? InstructionBreakPoint.ibpOp1SuperMap : DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a >>> XEiJ.BUS_PAGE_BITS].mmdRws (a);
 25922:     } else {  //ユーザモード
 25923:       M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_OPWORD | M68kException.M6E_FSLW_RW_READ | M68kException.M6E_FSLW_SIZE_WORD | M68kException.M6E_FSLW_TM_USER_CODE;
 25924:       a = mmuTranslateReadUserCode (a);
 25925:       return (InstructionBreakPoint.IBP_ON ? InstructionBreakPoint.ibpOp1UserMap : DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a >>> XEiJ.BUS_PAGE_BITS].mmdRws (a);
 25926:     }
 25927:   }  //mmuReadWordSignOpword(int,int)
 25928: 
 25929:   //d = mmuReadWordZeroOpword (a, supervisor)
 25930:   //  リードワードゼロ拡張(命令ワード)
 25931:   public static int mmuReadWordZeroOpword (int a, int supervisor) throws M68kException {
 25932:     if (supervisor != 0) {  //スーパーバイザモード
 25933:       M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_OPWORD | M68kException.M6E_FSLW_RW_READ | M68kException.M6E_FSLW_SIZE_WORD | M68kException.M6E_FSLW_TM_SUPER_CODE;
 25934:       a = mmuTranslateReadSuperCode (a);
 25935:       return (InstructionBreakPoint.IBP_ON ? InstructionBreakPoint.ibpOp1SuperMap : DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a);
 25936:     } else {  //ユーザモード
 25937:       M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_OPWORD | M68kException.M6E_FSLW_RW_READ | M68kException.M6E_FSLW_SIZE_WORD | M68kException.M6E_FSLW_TM_USER_CODE;
 25938:       a = mmuTranslateReadUserCode (a);
 25939:       return (InstructionBreakPoint.IBP_ON ? InstructionBreakPoint.ibpOp1UserMap : DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a);
 25940:     }
 25941:   }  //mmuReadWordZeroOpword(int,int)
 25942: 
 25943:   //d = mmuReadLongData (a, supervisor)
 25944:   //  リードロング(データ)
 25945:   public static int mmuReadLongData (int a, int supervisor) throws M68kException {
 25946:     if (supervisor != 0) {  //スーパーバイザモード
 25947:       M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_READ | M68kException.M6E_FSLW_SIZE_LONG | M68kException.M6E_FSLW_TM_SUPER_DATA;
 25948:       int a0 = mmuTranslateReadSuperData (a);  //a+1,a+2,a+3が必要なので上書き不可
 25949:       if ((a & 3) == 0) {  //4の倍数
 25950:         return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRls (a0);
 25951:       } else if ((a & 1) == 0) {  //4の倍数+2
 25952:         int d0 = (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRws (a0);
 25953:         M68kException.m6eFSLW ^= M68kException.M6E_FSLW_IOMA_FIRST ^ M68kException.M6E_FSLW_IOMA_SECOND;
 25954:         int a2 = mmuTranslateReadSuperData (a + 2);  //偶数
 25955:         return (d0 << 16 |
 25956:                 (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a2 >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a2));
 25957:       } else {  //奇数
 25958:         int d0 = (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRbs (a0);
 25959:         M68kException.m6eFSLW ^= M68kException.M6E_FSLW_IOMA_FIRST ^ M68kException.M6E_FSLW_IOMA_SECOND;
 25960:         int a1 = mmuTranslateReadSuperData (a + 1);  //偶数
 25961:         int a3 = mmuTranslateReadSuperData (a + 3);  //偶数
 25962:         return (d0 << 24 |
 25963:                 (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a1 >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a1) << 8 |
 25964:                 (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a3 >>> XEiJ.BUS_PAGE_BITS].mmdRbz (a3));
 25965:       }
 25966:     } else {  //ユーザモード
 25967:       M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_READ | M68kException.M6E_FSLW_SIZE_LONG | M68kException.M6E_FSLW_TM_USER_DATA;
 25968:       int a0 = mmuTranslateReadUserData (a);  //a+1,a+2,a+3が必要なので上書き不可
 25969:       if ((a & 3) == 0) {  //4の倍数
 25970:         return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRls (a0);
 25971:       } else if ((a & 1) == 0) {  //4の倍数+2
 25972:         int d0 = (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRws (a0);
 25973:         M68kException.m6eFSLW ^= M68kException.M6E_FSLW_IOMA_FIRST ^ M68kException.M6E_FSLW_IOMA_SECOND;
 25974:         int a2 = mmuTranslateReadUserData (a + 2);  //偶数
 25975:         return (d0 << 16 |
 25976:                 (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a2 >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a2));
 25977:       } else {  //奇数
 25978:         int d0 = (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRbs (a0);
 25979:         M68kException.m6eFSLW ^= M68kException.M6E_FSLW_IOMA_FIRST ^ M68kException.M6E_FSLW_IOMA_SECOND;
 25980:         int a1 = mmuTranslateReadUserData (a + 1);  //偶数
 25981:         int a3 = mmuTranslateReadUserData (a + 3);  //偶数
 25982:         return (d0 << 24 |
 25983:                 (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a1 >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a1) << 8 |
 25984:                 (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a3 >>> XEiJ.BUS_PAGE_BITS].mmdRbz (a3));
 25985:       }
 25986:     }
 25987:   }  //mmuReadLongData(int,int)
 25988: 
 25989:   //d = mmuReadLongEven (a, supervisor)
 25990:   //  リードロング(偶数)
 25991:   public static int mmuReadLongEven (int a, int supervisor) throws M68kException {
 25992:     if (supervisor != 0) {  //スーパーバイザモード
 25993:       M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_READ | M68kException.M6E_FSLW_SIZE_LONG | M68kException.M6E_FSLW_TM_SUPER_DATA;
 25994:       int a0 = mmuTranslateReadSuperData (a);  //a+2が必要なので上書き不可
 25995:       if ((a & 2) == 0) {  //4の倍数
 25996:         return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRls (a0);
 25997:       } else {  //4の倍数+2
 25998:         int d0 = (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRws (a0);
 25999:         M68kException.m6eFSLW ^= M68kException.M6E_FSLW_IOMA_FIRST ^ M68kException.M6E_FSLW_IOMA_SECOND;
 26000:         int a2 = mmuTranslateReadSuperData (a + 2);  //偶数
 26001:         return (d0 << 16 |
 26002:                 (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a2 >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a2));
 26003:       }
 26004:     } else {  //ユーザモード
 26005:       M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_READ | M68kException.M6E_FSLW_SIZE_LONG | M68kException.M6E_FSLW_TM_USER_DATA;
 26006:       int a0 = mmuTranslateReadUserData (a);  //a+2が必要なので上書き不可
 26007:       if ((a & 2) == 0) {  //4の倍数
 26008:         return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRls (a0);
 26009:       } else {  //4の倍数+2
 26010:         int d0 = (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRws (a0);
 26011:         M68kException.m6eFSLW ^= M68kException.M6E_FSLW_IOMA_FIRST ^ M68kException.M6E_FSLW_IOMA_SECOND;
 26012:         int a2 = mmuTranslateReadUserData (a + 2);  //偶数
 26013:         return (d0 << 16 |
 26014:                 (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a2 >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a2));
 26015:       }
 26016:     }
 26017:   }  //mmuReadLongEven(int,int)
 26018: 
 26019:   //d = mmuReadLongExword (a, supervisor)
 26020:   //  リードロング(拡張ワード)
 26021:   public static int mmuReadLongExword (int a, int supervisor) throws M68kException {
 26022:     if (supervisor != 0) {  //スーパーバイザモード
 26023:       M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_EXWORD | M68kException.M6E_FSLW_RW_READ | M68kException.M6E_FSLW_SIZE_LONG | M68kException.M6E_FSLW_TM_SUPER_CODE;
 26024:       int a0 = mmuTranslateReadSuperData (a);  //a+2が必要なので上書き不可
 26025:       if ((a & 2) == 0) {  //4の倍数
 26026:         return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRls (a0);
 26027:       } else {  //4の倍数+2
 26028:         int a2 = mmuTranslateReadSuperData (a + 2);  //偶数
 26029:         return ((DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRws (a0) << 16 |
 26030:                 (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a2 >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a2));
 26031:       }
 26032:     } else {  //ユーザモード
 26033:       M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_EXWORD | M68kException.M6E_FSLW_RW_READ | M68kException.M6E_FSLW_SIZE_LONG | M68kException.M6E_FSLW_TM_USER_CODE;
 26034:       int a0 = mmuTranslateReadUserData (a);  //a+2が必要なので上書き不可
 26035:       if ((a & 2) == 0) {  //4の倍数
 26036:         return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRls (a0);
 26037:       } else {  //4の倍数+2
 26038:         int a2 = mmuTranslateReadUserData (a + 2);  //偶数
 26039:         return ((DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRws (a0) << 16 |
 26040:                 (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a2 >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a2));
 26041:       }
 26042:     }
 26043:   }  //mmuReadLongExword(int,int)
 26044: 
 26045:   //d = mmuReadLongFour (a, supervisor)
 26046:   //  リードロング(4の倍数)
 26047:   public static int mmuReadLongFour (int a, int supervisor) throws M68kException {
 26048:     if (supervisor != 0) {  //スーパーバイザモード
 26049:       M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_READ | M68kException.M6E_FSLW_SIZE_LONG | M68kException.M6E_FSLW_TM_SUPER_DATA;
 26050:       a = mmuTranslateReadSuperData (a);
 26051:       return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a >>> XEiJ.BUS_PAGE_BITS].mmdRls (a);
 26052:     } else {  //ユーザモード
 26053:       M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_READ | M68kException.M6E_FSLW_SIZE_LONG | M68kException.M6E_FSLW_TM_USER_DATA;
 26054:       a = mmuTranslateReadUserData (a);
 26055:       return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a >>> XEiJ.BUS_PAGE_BITS].mmdRls (a);
 26056:     }
 26057:   }  //mmuReadLongFour(int,int)
 26058: 
 26059:   //l = mmuReadQuadData (a, supervisor)
 26060:   //  リードクワッド(データ)
 26061:   public static long mmuReadQuadData (int a, int supervisor) throws M68kException {
 26062:     if (supervisor != 0) {  //スーパーバイザモード
 26063:       M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_READ | M68kException.M6E_FSLW_SIZE_QUAD | M68kException.M6E_FSLW_TM_SUPER_DATA;
 26064:       int a0 = mmuTranslateReadSuperData (a);  //a+1,a+2,a+3,a+4,a+5,a+6,a+7が必要なので上書き不可
 26065:       if ((a & 3) == 0) {  //4の倍数
 26066:         int a4 = mmuTranslateReadSuperData (a + 4);  //4の倍数
 26067:         return ((long) (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRls (a0) << 32 |
 26068:                 (long) (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a4 >>> XEiJ.BUS_PAGE_BITS].mmdRls (a4) & 0x00000000ffffffffL);
 26069:       } else if ((a & 1) == 0) {  //4の倍数+2
 26070:         int d0 = (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRws (a0);
 26071:         M68kException.m6eFSLW ^= M68kException.M6E_FSLW_IOMA_FIRST ^ M68kException.M6E_FSLW_IOMA_SECOND;
 26072:         int a2 = mmuTranslateReadSuperData (a + 2);  //4の倍数
 26073:         int a6 = mmuTranslateReadSuperData (a + 6);  //4の倍数
 26074:         return ((long) d0 << 48 |
 26075:                 (long) (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a2 >>> XEiJ.BUS_PAGE_BITS].mmdRls (a2) << 16 & 0x0000ffffffff0000L |
 26076:                 (long) (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a6 >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a6));
 26077:       } else if ((a & 3) == 1) {  //4の倍数+1
 26078:         int d0 = (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRbs (a0);
 26079:         M68kException.m6eFSLW ^= M68kException.M6E_FSLW_IOMA_FIRST ^ M68kException.M6E_FSLW_IOMA_SECOND;
 26080:         int a1 = mmuTranslateReadSuperData (a + 1);  //4の倍数+2
 26081:         int a3 = mmuTranslateReadSuperData (a + 3);  //4の倍数
 26082:         int a7 = mmuTranslateReadSuperData (a + 7);  //4の倍数
 26083:         return ((long) d0 << 56 |
 26084:                 (long) (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a1 >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a1) << 40 |
 26085:                 (long) (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a3 >>> XEiJ.BUS_PAGE_BITS].mmdRls (a3) << 8 & 0x000000ffffffff00L |
 26086:                 (long) (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a7 >>> XEiJ.BUS_PAGE_BITS].mmdRbz (a7));
 26087:       } else {  //  //4の倍数+3
 26088:         int d0 = (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRbs (a0);
 26089:         M68kException.m6eFSLW ^= M68kException.M6E_FSLW_IOMA_FIRST ^ M68kException.M6E_FSLW_IOMA_SECOND;
 26090:         int a1 = mmuTranslateReadSuperData (a + 1);  //4の倍数
 26091:         int a5 = mmuTranslateReadSuperData (a + 5);  //4の倍数
 26092:         int a7 = mmuTranslateReadSuperData (a + 7);  //4の倍数+2
 26093:         return ((long) d0 << 56 |
 26094:                 (long) (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a1 >>> XEiJ.BUS_PAGE_BITS].mmdRls (a1) << 24 & 0x00ffffffff000000L |
 26095:                 (long) (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a5 >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a5) << 8 |
 26096:                 (long) (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a7 >>> XEiJ.BUS_PAGE_BITS].mmdRbz (a7));
 26097:       }
 26098:     } else {  //ユーザモード
 26099:       M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_READ | M68kException.M6E_FSLW_SIZE_QUAD | M68kException.M6E_FSLW_TM_USER_DATA;
 26100:       int a0 = mmuTranslateReadUserData (a);  //a+1,a+2,a+3,a+4,a+5,a+6,a+7が必要なので上書き不可
 26101:       if ((a & 3) == 0) {  //4の倍数
 26102:         int a4 = mmuTranslateReadUserData (a + 4);  //4の倍数
 26103:         return ((long) (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRls (a0) << 32 |
 26104:                 (long) (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a4 >>> XEiJ.BUS_PAGE_BITS].mmdRls (a4) & 0x00000000ffffffffL);
 26105:       } else if ((a & 1) == 0) {  //4の倍数+2
 26106:         int d0 = (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRws (a0);
 26107:         M68kException.m6eFSLW ^= M68kException.M6E_FSLW_IOMA_FIRST ^ M68kException.M6E_FSLW_IOMA_SECOND;
 26108:         int a2 = mmuTranslateReadUserData (a + 2);  //4の倍数
 26109:         int a6 = mmuTranslateReadUserData (a + 6);  //4の倍数
 26110:         return ((long) d0 << 48 |
 26111:                 (long) (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a2 >>> XEiJ.BUS_PAGE_BITS].mmdRls (a2) << 16 & 0x0000ffffffff0000L |
 26112:                 (long) (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a6 >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a6));
 26113:       } else if ((a & 3) == 1) {  //4の倍数+1
 26114:         int d0 = (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRbs (a0);
 26115:         M68kException.m6eFSLW ^= M68kException.M6E_FSLW_IOMA_FIRST ^ M68kException.M6E_FSLW_IOMA_SECOND;
 26116:         int a1 = mmuTranslateReadUserData (a + 1);  //4の倍数+2
 26117:         int a3 = mmuTranslateReadUserData (a + 3);  //4の倍数
 26118:         int a7 = mmuTranslateReadUserData (a + 7);  //4の倍数
 26119:         return ((long) d0 << 56 |
 26120:                 (long) (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a1 >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a1) << 40 |
 26121:                 (long) (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a3 >>> XEiJ.BUS_PAGE_BITS].mmdRls (a3) << 8 & 0x000000ffffffff00L |
 26122:                 (long) (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a7 >>> XEiJ.BUS_PAGE_BITS].mmdRbz (a7));
 26123:       } else {  //  //4の倍数+3
 26124:         int d0 = (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRbs (a0);
 26125:         M68kException.m6eFSLW ^= M68kException.M6E_FSLW_IOMA_FIRST ^ M68kException.M6E_FSLW_IOMA_SECOND;
 26126:         int a1 = mmuTranslateReadUserData (a + 1);  //4の倍数
 26127:         int a5 = mmuTranslateReadUserData (a + 5);  //4の倍数
 26128:         int a7 = mmuTranslateReadUserData (a + 7);  //4の倍数+2
 26129:         return ((long) d0 << 56 |
 26130:                 (long) (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a1 >>> XEiJ.BUS_PAGE_BITS].mmdRls (a1) << 24 & 0x00ffffffff000000L |
 26131:                 (long) (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a5 >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a5) << 8 |
 26132:                 (long) (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a7 >>> XEiJ.BUS_PAGE_BITS].mmdRbz (a7));
 26133:       }
 26134:     }
 26135:   }  //mmuReadQuadData(int,int)
 26136: 
 26137:   //l = mmuReadQuadSecond (a, supervisor)
 26138:   //  リードクワッド(2番目)
 26139:   //  エクステンデッドとラインの2番目で使う
 26140:   public static long mmuReadQuadSecond (int a, int supervisor) throws M68kException {
 26141:     if (supervisor != 0) {  //スーパーバイザモード
 26142:       M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_SECOND | M68kException.M6E_FSLW_RW_READ | M68kException.M6E_FSLW_SIZE_QUAD | M68kException.M6E_FSLW_TM_SUPER_DATA;
 26143:       int a0 = mmuTranslateReadSuperData (a);  //a+1,a+2,a+3,a+4,a+5,a+6,a+7が必要なので上書き不可
 26144:       if ((a & 3) == 0) {  //4の倍数
 26145:         int a4 = mmuTranslateReadSuperData (a + 4);  //4の倍数
 26146:         return ((long) (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRls (a0) << 32 |
 26147:                 (long) (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a4 >>> XEiJ.BUS_PAGE_BITS].mmdRls (a4) & 0x00000000ffffffffL);
 26148:       } else if ((a & 1) == 0) {  //4の倍数+2
 26149:         int a2 = mmuTranslateReadSuperData (a + 2);  //4の倍数
 26150:         int a6 = mmuTranslateReadSuperData (a + 6);  //4の倍数
 26151:         return ((long) (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRws (a0) << 48 |
 26152:                 (long) (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a2 >>> XEiJ.BUS_PAGE_BITS].mmdRls (a2) << 16 & 0x0000ffffffff0000L |
 26153:                 (long) (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a6 >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a6));
 26154:       } else if ((a & 3) == 1) {  //4の倍数+1
 26155:         int a1 = mmuTranslateReadSuperData (a + 1);  //4の倍数+2
 26156:         int a3 = mmuTranslateReadSuperData (a + 3);  //4の倍数
 26157:         int a7 = mmuTranslateReadSuperData (a + 7);  //4の倍数
 26158:         return ((long) (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRbs (a0) << 56 |
 26159:                 (long) (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a1 >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a1) << 40 |
 26160:                 (long) (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a3 >>> XEiJ.BUS_PAGE_BITS].mmdRls (a3) << 8 & 0x000000ffffffff00L |
 26161:                 (long) (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a7 >>> XEiJ.BUS_PAGE_BITS].mmdRbz (a7));
 26162:       } else {  //  //4の倍数+3
 26163:         int a1 = mmuTranslateReadSuperData (a + 1);  //4の倍数
 26164:         int a5 = mmuTranslateReadSuperData (a + 5);  //4の倍数
 26165:         int a7 = mmuTranslateReadSuperData (a + 7);  //4の倍数+2
 26166:         return ((long) (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRbs (a0) << 56 |
 26167:                 (long) (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a1 >>> XEiJ.BUS_PAGE_BITS].mmdRls (a1) << 24 & 0x00ffffffff000000L |
 26168:                 (long) (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a5 >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a5) << 8 |
 26169:                 (long) (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a7 >>> XEiJ.BUS_PAGE_BITS].mmdRbz (a7));
 26170:       }
 26171:     } else {  //ユーザモード
 26172:       M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_SECOND | M68kException.M6E_FSLW_RW_READ | M68kException.M6E_FSLW_SIZE_QUAD | M68kException.M6E_FSLW_TM_USER_DATA;
 26173:       int a0 = mmuTranslateReadUserData (a);  //a+1,a+2,a+3,a+4,a+5,a+6,a+7が必要なので上書き不可
 26174:       if ((a & 3) == 0) {  //4の倍数
 26175:         int a4 = mmuTranslateReadUserData (a + 4);  //4の倍数
 26176:         return ((long) (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRls (a0) << 32 |
 26177:                 (long) (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a4 >>> XEiJ.BUS_PAGE_BITS].mmdRls (a4) & 0x00000000ffffffffL);
 26178:       } else if ((a & 1) == 0) {  //4の倍数+2
 26179:         int a2 = mmuTranslateReadUserData (a + 2);  //4の倍数
 26180:         int a6 = mmuTranslateReadUserData (a + 6);  //4の倍数
 26181:         return ((long) (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRws (a0) << 48 |
 26182:                 (long) (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a2 >>> XEiJ.BUS_PAGE_BITS].mmdRls (a2) << 16 & 0x0000ffffffff0000L |
 26183:                 (long) (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a6 >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a6));
 26184:       } else if ((a & 3) == 1) {  //4の倍数+1
 26185:         int a1 = mmuTranslateReadUserData (a + 1);  //4の倍数+2
 26186:         int a3 = mmuTranslateReadUserData (a + 3);  //4の倍数
 26187:         int a7 = mmuTranslateReadUserData (a + 7);  //4の倍数
 26188:         return ((long) (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRbs (a0) << 56 |
 26189:                 (long) (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a1 >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a1) << 40 |
 26190:                 (long) (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a3 >>> XEiJ.BUS_PAGE_BITS].mmdRls (a3) << 8 & 0x000000ffffffff00L |
 26191:                 (long) (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a7 >>> XEiJ.BUS_PAGE_BITS].mmdRbz (a7));
 26192:       } else {  //  //4の倍数+3
 26193:         int a1 = mmuTranslateReadUserData (a + 1);  //4の倍数
 26194:         int a5 = mmuTranslateReadUserData (a + 5);  //4の倍数
 26195:         int a7 = mmuTranslateReadUserData (a + 7);  //4の倍数+2
 26196:         return ((long) (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRbs (a0) << 56 |
 26197:                 (long) (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a1 >>> XEiJ.BUS_PAGE_BITS].mmdRls (a1) << 24 & 0x00ffffffff000000L |
 26198:                 (long) (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a5 >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a5) << 8 |
 26199:                 (long) (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a7 >>> XEiJ.BUS_PAGE_BITS].mmdRbz (a7));
 26200:       }
 26201:     }
 26202:   }  //mmuReadQuadSecond(int,int)
 26203: 
 26204:   //l = mmuReadQuadExword (a, supervisor)
 26205:   //  リードクワッド(拡張ワード)
 26206:   //  イミディエイトで使う
 26207:   public static long mmuReadQuadExword (int a, int supervisor) throws M68kException {
 26208:     if (supervisor != 0) {  //スーパーバイザモード
 26209:       M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_EXWORD | M68kException.M6E_FSLW_RW_READ | M68kException.M6E_FSLW_SIZE_QUAD | M68kException.M6E_FSLW_TM_SUPER_CODE;
 26210:       int a0 = mmuTranslateReadSuperData (a);  //a+2,a+4,a+6が必要なので上書き不可
 26211:       if ((a & 2) == 0) {  //4の倍数
 26212:         int a4 = mmuTranslateReadSuperData (a + 4);  //4の倍数
 26213:         return ((long) (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRls (a0) << 32 |
 26214:                 (long) (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a4 >>> XEiJ.BUS_PAGE_BITS].mmdRls (a4) & 0x00000000ffffffffL);
 26215:       } else {  //4の倍数+2
 26216:         int a2 = mmuTranslateReadSuperData (a + 2);  //4の倍数
 26217:         int a6 = mmuTranslateReadSuperData (a + 6);  //4の倍数
 26218:         return ((long) (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRws (a0) << 48 |
 26219:                 (long) (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a2 >>> XEiJ.BUS_PAGE_BITS].mmdRls (a2) << 16 & 0x0000ffffffff0000L |
 26220:                 (long) (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a6 >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a6));
 26221:       }
 26222:     } else {  //ユーザモード
 26223:       M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_EXWORD | M68kException.M6E_FSLW_RW_READ | M68kException.M6E_FSLW_SIZE_QUAD | M68kException.M6E_FSLW_TM_USER_CODE;
 26224:       int a0 = mmuTranslateReadUserData (a);  //a+2,a+4,a+6が必要なので上書き不可
 26225:       if ((a & 2) == 0) {  //4の倍数
 26226:         int a4 = mmuTranslateReadUserData (a + 4);  //4の倍数
 26227:         return ((long) (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRls (a0) << 32 |
 26228:                 (long) (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a4 >>> XEiJ.BUS_PAGE_BITS].mmdRls (a4) & 0x00000000ffffffffL);
 26229:       } else {  //4の倍数+2
 26230:         int a2 = mmuTranslateReadUserData (a + 2);  //4の倍数
 26231:         int a6 = mmuTranslateReadUserData (a + 6);  //4の倍数
 26232:         return ((long) (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRws (a0) << 48 |
 26233:                 (long) (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a2 >>> XEiJ.BUS_PAGE_BITS].mmdRls (a2) << 16 & 0x0000ffffffff0000L |
 26234:                 (long) (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a6 >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a6));
 26235:       }
 26236:     }
 26237:   }  //mmuReadQuadExword(int,int)
 26238: 
 26239:   //mmuReadByteArray (address, array, offset, length, supervisor)
 26240:   //  リードバイト配列
 26241:   public static void mmuReadByteArray (int address, byte[] array, int offset, int length, int supervisor) throws M68kException {
 26242:     if (false) {  //1バイトずつアドレス変換する
 26243:       for (int index = 0; index < length; index++) {
 26244:         array[offset + index] = mmuReadByteSignData (address + index, supervisor);
 26245:       }
 26246:     } else {  //1ページずつアドレス変換する
 26247:       int pageSize = Math.min (XEiJ.BUS_PAGE_SIZE, mmuPageSize);
 26248:       if (supervisor != 0) {  //スーパーバイザモード
 26249:         if (false) {  //1バイトずつ転送する
 26250:           M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_READ | M68kException.M6E_FSLW_SIZE_BYTE | M68kException.M6E_FSLW_TM_SUPER_DATA;
 26251:         }
 26252:         MemoryMappedDevice[] mm = DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap;
 26253:         while (0 < length) {
 26254:           int l = Math.min (pageSize - (address & (pageSize - 1)), length);  //今回転送する長さ
 26255:           int t = mmuTranslateReadSuperData (address);
 26256:           MemoryMappedDevice d = mm[t >>> XEiJ.BUS_PAGE_BITS];
 26257:           if (false) {  //1バイトずつ転送する
 26258:             for (int i = 0; i < l; i++) {
 26259:               array[offset + i] = d.mmdRbs (t + i);
 26260:             }
 26261:           } else {  //4バイトずつ転送する。ウェイトサイクルを減らす
 26262:             int o = offset;
 26263:             int z = t + l;
 26264:             if ((t & 1) != 0 && t < z) {  //2n+1で残り1以上。1バイト転送する
 26265:               M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_READ | M68kException.M6E_FSLW_SIZE_BYTE | M68kException.M6E_FSLW_TM_SUPER_DATA;
 26266:               array[o++] = d.mmdRbs (t++);
 26267:             }
 26268:             if ((t & 2) != 0 && t + 1 < z) {  //4n+2で残り2以上。2バイト転送する
 26269:               M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_READ | M68kException.M6E_FSLW_SIZE_WORD | M68kException.M6E_FSLW_TM_SUPER_DATA;
 26270:               int x = d.mmdRws (t);
 26271:               array[o    ] = (byte) (x >> 8);
 26272:               array[o + 1] = (byte)  x;
 26273:               t += 2;
 26274:               o += 2;
 26275:             }
 26276:             if (t + 3 < z) {  //4nで残り4以上。4バイトずつ転送する
 26277:               M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_READ | M68kException.M6E_FSLW_SIZE_LONG | M68kException.M6E_FSLW_TM_SUPER_DATA;
 26278:               do {
 26279:                 int x = d.mmdRls (t);
 26280:                 array[o    ] = (byte) (x >> 24);
 26281:                 array[o + 1] = (byte) (x >> 16);
 26282:                 array[o + 2] = (byte) (x >>  8);
 26283:                 array[o + 3] = (byte)  x;
 26284:                 t += 4;
 26285:                 o += 4;
 26286:               } while (t + 3 < z);
 26287:             }
 26288:             if (t + 1 < z) {  //4nで残り2または3。2バイト転送する
 26289:               M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_READ | M68kException.M6E_FSLW_SIZE_WORD | M68kException.M6E_FSLW_TM_SUPER_DATA;
 26290:               int x = d.mmdRws (t);
 26291:               array[o    ] = (byte) (x >> 8);
 26292:               array[o + 1] = (byte)  x;
 26293:               t += 2;
 26294:               o += 2;
 26295:             }
 26296:             if (t < z) {  //4nで残り1。1バイト転送する
 26297:               M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_READ | M68kException.M6E_FSLW_SIZE_BYTE | M68kException.M6E_FSLW_TM_SUPER_DATA;
 26298:               array[o++] = d.mmdRbs (t++);
 26299:             }
 26300:           }  //if 1バイトずつ/4バイトずつ
 26301:           address += l;
 26302:           offset += l;
 26303:           length -= l;
 26304:         }  //while 0<length
 26305:       } else {  //ユーザモード
 26306:         if (false) {  //1バイトずつ転送する
 26307:           M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_READ | M68kException.M6E_FSLW_SIZE_BYTE | M68kException.M6E_FSLW_TM_USER_DATA;
 26308:         }
 26309:         MemoryMappedDevice[] mm = DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap;
 26310:         while (0 < length) {
 26311:           int l = Math.min (pageSize - (address & (pageSize - 1)), length);  //今回転送する長さ
 26312:           int t = mmuTranslateReadUserData (address);
 26313:           MemoryMappedDevice d = mm[t >>> XEiJ.BUS_PAGE_BITS];
 26314:           if (false) {  //1バイトずつ転送する
 26315:             for (int i = 0; i < l; i++) {
 26316:               array[offset + i] = d.mmdRbs (t + i);
 26317:             }
 26318:           } else {  //4バイトずつ転送する。ウェイトサイクルを減らす
 26319:             int o = offset;
 26320:             int z = t + l;
 26321:             if ((t & 1) != 0 && t < z) {  //2n+1で残り1以上。1バイト転送する
 26322:               M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_READ | M68kException.M6E_FSLW_SIZE_BYTE | M68kException.M6E_FSLW_TM_USER_DATA;
 26323:               array[o++] = d.mmdRbs (t++);
 26324:             }
 26325:             if ((t & 2) != 0 && t + 1 < z) {  //4n+2で残り2以上。2バイト転送する
 26326:               M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_READ | M68kException.M6E_FSLW_SIZE_WORD | M68kException.M6E_FSLW_TM_USER_DATA;
 26327:               int x = d.mmdRws (t);
 26328:               array[o    ] = (byte) (x >> 8);
 26329:               array[o + 1] = (byte)  x;
 26330:               t += 2;
 26331:               o += 2;
 26332:             }
 26333:             if (t + 3 < z) {  //4nで残り4以上。4バイトずつ転送する
 26334:               M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_READ | M68kException.M6E_FSLW_SIZE_LONG | M68kException.M6E_FSLW_TM_USER_DATA;
 26335:               do {
 26336:                 int x = d.mmdRls (t);
 26337:                 array[o    ] = (byte) (x >> 24);
 26338:                 array[o + 1] = (byte) (x >> 16);
 26339:                 array[o + 2] = (byte) (x >>  8);
 26340:                 array[o + 3] = (byte)  x;
 26341:                 t += 4;
 26342:                 o += 4;
 26343:               } while (t + 3 < z);
 26344:             }
 26345:             if (t + 1 < z) {  //4nで残り2または3。2バイト転送する
 26346:               M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_READ | M68kException.M6E_FSLW_SIZE_WORD | M68kException.M6E_FSLW_TM_USER_DATA;
 26347:               int x = d.mmdRws (t);
 26348:               array[o    ] = (byte) (x >> 8);
 26349:               array[o + 1] = (byte)  x;
 26350:               t += 2;
 26351:               o += 2;
 26352:             }
 26353:             if (t < z) {  //4nで残り1。1バイト転送する
 26354:               M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_READ | M68kException.M6E_FSLW_SIZE_BYTE | M68kException.M6E_FSLW_TM_USER_DATA;
 26355:               array[o++] = d.mmdRbs (t++);
 26356:             }
 26357:           }  //if 1バイトずつ/4バイトずつ
 26358:           address += l;
 26359:           offset += l;
 26360:           length -= l;
 26361:         }  //while 0<length
 26362:       }  //if スーパーバイザモード/ユーザモード
 26363:     }  //if 1バイトずつ/1ページずつ
 26364:   }  //mmuReadByteArray(int,byte[],int,int,int)
 26365: 
 26366:   //--------------------------------------------------------------------------------
 26367:   //リードモディファイライトのリード
 26368:   //  アドレス変換はライト
 26369:   //  FSLWのRead and WriteはRead-Modify-Write
 26370: 
 26371:   //d = mmuModifyByteSignData (a, supervisor)
 26372:   //  リードモディファイライトのリードバイト符号拡張(データ)
 26373:   public static byte mmuModifyByteSignData (int a, int supervisor) throws M68kException {
 26374:     if (supervisor != 0) {  //スーパーバイザモード
 26375:       M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_MODIFY | M68kException.M6E_FSLW_SIZE_BYTE | M68kException.M6E_FSLW_TM_SUPER_DATA;
 26376:       int a0 = mmuTranslateWriteSuperData (a);
 26377:       return (a ^ a0) == 1 ? -1 : (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRbs (a0);
 26378:     } else {  //ユーザモード
 26379:       M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_MODIFY | M68kException.M6E_FSLW_SIZE_BYTE | M68kException.M6E_FSLW_TM_USER_DATA;
 26380:       int a0 = mmuTranslateWriteUserData (a);
 26381:       return (a ^ a0) == 1 ? -1 : (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRbs (a0);
 26382:     }
 26383:   }  //mmuModifyByteSignData(int,int)
 26384: 
 26385:   //d = mmuModifyByteZeroData (a, supervisor)
 26386:   //  リードモディファイライトのリードバイトゼロ拡張(データ)
 26387:   public static int mmuModifyByteZeroData (int a, int supervisor) throws M68kException {
 26388:     if (supervisor != 0) {  //スーパーバイザモード
 26389:       M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_MODIFY | M68kException.M6E_FSLW_SIZE_BYTE | M68kException.M6E_FSLW_TM_SUPER_DATA;
 26390:       int a0 = mmuTranslateWriteSuperData (a);
 26391:       return (a ^ a0) == 1 ? 255 : (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRbz (a0);
 26392:     } else {  //ユーザモード
 26393:       M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_MODIFY | M68kException.M6E_FSLW_SIZE_BYTE | M68kException.M6E_FSLW_TM_USER_DATA;
 26394:       int a0 = mmuTranslateWriteUserData (a);
 26395:       return (a ^ a0) == 1 ? 255 : (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRbz (a0);
 26396:     }
 26397:   }  //mmuModifyByteZeroData(int,int)
 26398: 
 26399:   //d = mmuModifyWordSignData (a, supervisor)
 26400:   //  リードモディファイライトのリードワード符号拡張(データ)
 26401:   public static int mmuModifyWordSignData (int a, int supervisor) throws M68kException {
 26402:     if (supervisor != 0) {  //スーパーバイザモード
 26403:       M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_MODIFY | M68kException.M6E_FSLW_SIZE_WORD | M68kException.M6E_FSLW_TM_SUPER_DATA;
 26404:       int a0 = mmuTranslateWriteSuperData (a);  //a+1が必要なので上書き不可
 26405:       if ((a & 1) == 0) {  //偶数
 26406:         return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRws (a0);
 26407:       } else {  //奇数
 26408:         int d0 = (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRbs (a0);
 26409:         M68kException.m6eFSLW ^= M68kException.M6E_FSLW_IOMA_FIRST ^ M68kException.M6E_FSLW_IOMA_SECOND;
 26410:         int a1 = mmuTranslateWriteSuperData (a + 1);  //偶数
 26411:         return (d0 << 8 |
 26412:                 (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a1 >>> XEiJ.BUS_PAGE_BITS].mmdRbz (a1));
 26413:       }
 26414:     } else {  //ユーザモード
 26415:       M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_MODIFY | M68kException.M6E_FSLW_SIZE_WORD | M68kException.M6E_FSLW_TM_USER_DATA;
 26416:       int a0 = mmuTranslateWriteUserData (a);  //a+1が必要なので上書き不可
 26417:       if ((a & 1) == 0) {  //偶数
 26418:         return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRws (a0);
 26419:       } else {  //奇数
 26420:         int d0 = (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRbs (a0);
 26421:         M68kException.m6eFSLW ^= M68kException.M6E_FSLW_IOMA_FIRST ^ M68kException.M6E_FSLW_IOMA_SECOND;
 26422:         int a1 = mmuTranslateWriteUserData (a + 1);  //偶数
 26423:         return (d0 << 8 |
 26424:                 (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a1 >>> XEiJ.BUS_PAGE_BITS].mmdRbz (a1));
 26425:       }
 26426:     }
 26427:   }  //mmuModifyWordSignData(int,int)
 26428: 
 26429:   //d = mmuModifyWordZeroData (a, supervisor)
 26430:   //  リードモディファイライトのリードワードゼロ拡張(データ)
 26431:   public static int mmuModifyWordZeroData (int a, int supervisor) throws M68kException {
 26432:     if (supervisor != 0) {  //スーパーバイザモード
 26433:       M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_MODIFY | M68kException.M6E_FSLW_SIZE_WORD | M68kException.M6E_FSLW_TM_SUPER_DATA;
 26434:       int a0 = mmuTranslateWriteSuperData (a);  //a+1が必要なので上書き不可
 26435:       if ((a & 1) == 0) {  //偶数
 26436:         return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a0);
 26437:       } else {  //奇数
 26438:         int d0 = (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRbz (a0);
 26439:         M68kException.m6eFSLW ^= M68kException.M6E_FSLW_IOMA_FIRST ^ M68kException.M6E_FSLW_IOMA_SECOND;
 26440:         int a1 = mmuTranslateWriteSuperData (a + 1);  //偶数
 26441:         return (d0 << 8 |
 26442:                 (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a1 >>> XEiJ.BUS_PAGE_BITS].mmdRbz (a1));
 26443:       }
 26444:     } else {  //ユーザモード
 26445:       M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_MODIFY | M68kException.M6E_FSLW_SIZE_WORD | M68kException.M6E_FSLW_TM_USER_DATA;
 26446:       int a0 = mmuTranslateWriteUserData (a);  //a+1が必要なので上書き不可
 26447:       if ((a & 1) == 0) {  //偶数
 26448:         return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a0);
 26449:       } else {  //奇数
 26450:         int d0 = (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRbz (a0);
 26451:         M68kException.m6eFSLW ^= M68kException.M6E_FSLW_IOMA_FIRST ^ M68kException.M6E_FSLW_IOMA_SECOND;
 26452:         int a1 = mmuTranslateWriteUserData (a + 1);  //偶数
 26453:         return (d0 << 8 |
 26454:                 (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a1 >>> XEiJ.BUS_PAGE_BITS].mmdRbz (a1));
 26455:       }
 26456:     }
 26457:   }  //mmuModifyWordZeroData(int,int)
 26458: 
 26459:   //d = mmuModifyWordSignEven (a, supervisor)
 26460:   //  リードモディファイライトのリードワード符号拡張(偶数)
 26461:   public static int mmuModifyWordSignEven (int a, int supervisor) throws M68kException {
 26462:     if (supervisor != 0) {  //スーパーバイザモード
 26463:       M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_MODIFY | M68kException.M6E_FSLW_SIZE_WORD | M68kException.M6E_FSLW_TM_SUPER_DATA;
 26464:       a = mmuTranslateWriteSuperData (a);
 26465:       return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a >>> XEiJ.BUS_PAGE_BITS].mmdRws (a);
 26466:     } else {  //ユーザモード
 26467:       M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_MODIFY | M68kException.M6E_FSLW_SIZE_WORD | M68kException.M6E_FSLW_TM_USER_DATA;
 26468:       a = mmuTranslateWriteUserData (a);
 26469:       return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a >>> XEiJ.BUS_PAGE_BITS].mmdRws (a);
 26470:     }
 26471:   }  //mmuModifyWordSignEven(int,int)
 26472: 
 26473:   //d = mmuModifyWordZeroEven (a, supervisor)
 26474:   //  リードモディファイライトのリードワードゼロ拡張(偶数)
 26475:   public static int mmuModifyWordZeroEven (int a, int supervisor) throws M68kException {
 26476:     if (supervisor != 0) {  //スーパーバイザモード
 26477:       M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_MODIFY | M68kException.M6E_FSLW_SIZE_WORD | M68kException.M6E_FSLW_TM_SUPER_DATA;
 26478:       a = mmuTranslateWriteSuperData (a);
 26479:       return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a);
 26480:     } else {  //ユーザモード
 26481:       M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_MODIFY | M68kException.M6E_FSLW_SIZE_WORD | M68kException.M6E_FSLW_TM_USER_DATA;
 26482:       a = mmuTranslateWriteUserData (a);
 26483:       return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a);
 26484:     }
 26485:   }  //mmuModifyWordZeroEven(int,int)
 26486: 
 26487:   //d = mmuModifyLongData (a, supervisor)
 26488:   //  リードモディファイライトのリードロング(データ)
 26489:   public static int mmuModifyLongData (int a, int supervisor) throws M68kException {
 26490:     if (supervisor != 0) {  //スーパーバイザモード
 26491:       M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_MODIFY | M68kException.M6E_FSLW_SIZE_LONG | M68kException.M6E_FSLW_TM_SUPER_DATA;
 26492:       int a0 = mmuTranslateWriteSuperData (a);  //a+1,a+2,a+3が必要なので上書き不可
 26493:       if ((a & 3) == 0) {  //4の倍数
 26494:         return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRls (a0);
 26495:       } else if ((a & 1) == 0) {  //4の倍数+2
 26496:         int d0 = (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRws (a0);
 26497:         M68kException.m6eFSLW ^= M68kException.M6E_FSLW_IOMA_FIRST ^ M68kException.M6E_FSLW_IOMA_SECOND;
 26498:         int a2 = mmuTranslateWriteSuperData (a + 2);  //偶数
 26499:         return (d0 << 16 |
 26500:                 (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a2 >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a2));
 26501:       } else {  //奇数
 26502:         int d0 = (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRbs (a0);
 26503:         M68kException.m6eFSLW ^= M68kException.M6E_FSLW_IOMA_FIRST ^ M68kException.M6E_FSLW_IOMA_SECOND;
 26504:         int a1 = mmuTranslateWriteSuperData (a + 1);  //偶数
 26505:         int a3 = mmuTranslateWriteSuperData (a + 3);  //偶数
 26506:         return (d0 << 24 |
 26507:                 (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a1 >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a1) << 8 |
 26508:                 (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a3 >>> XEiJ.BUS_PAGE_BITS].mmdRbz (a3));
 26509:       }
 26510:     } else {  //ユーザモード
 26511:       M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_MODIFY | M68kException.M6E_FSLW_SIZE_LONG | M68kException.M6E_FSLW_TM_USER_DATA;
 26512:       int a0 = mmuTranslateWriteUserData (a);  //a+1,a+2,a+3が必要なので上書き不可
 26513:       if ((a & 3) == 0) {  //4の倍数
 26514:         return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRls (a0);
 26515:       } else if ((a & 1) == 0) {  //4の倍数+2
 26516:         int d0 = (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRws (a0);
 26517:         M68kException.m6eFSLW ^= M68kException.M6E_FSLW_IOMA_FIRST ^ M68kException.M6E_FSLW_IOMA_SECOND;
 26518:         int a2 = mmuTranslateWriteUserData (a + 2);  //偶数
 26519:         return (d0 << 16 |
 26520:                 (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a2 >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a2));
 26521:       } else {  //奇数
 26522:         int d0 = (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRbs (a0);
 26523:         M68kException.m6eFSLW ^= M68kException.M6E_FSLW_IOMA_FIRST ^ M68kException.M6E_FSLW_IOMA_SECOND;
 26524:         int a1 = mmuTranslateWriteUserData (a + 1);  //偶数
 26525:         int a3 = mmuTranslateWriteUserData (a + 3);  //偶数
 26526:         return (d0 << 24 |
 26527:                 (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a1 >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a1) << 8 |
 26528:                 (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a3 >>> XEiJ.BUS_PAGE_BITS].mmdRbz (a3));
 26529:       }
 26530:     }
 26531:   }  //mmuModifyLongData(int,int)
 26532: 
 26533:   //d = mmuModifyLongEven (a, supervisor)
 26534:   //  リードモディファイライトのリードロング(偶数)
 26535:   public static int mmuModifyLongEven (int a, int supervisor) throws M68kException {
 26536:     if (supervisor != 0) {  //スーパーバイザモード
 26537:       M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_MODIFY | M68kException.M6E_FSLW_SIZE_LONG | M68kException.M6E_FSLW_TM_SUPER_DATA;
 26538:       int a0 = mmuTranslateWriteSuperData (a);  //a+2が必要なので上書き不可
 26539:       if ((a & 2) == 0) {  //4の倍数
 26540:         return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRls (a0);
 26541:       } else {  //4の倍数+2
 26542:         int d0 = (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRws (a0);
 26543:         M68kException.m6eFSLW ^= M68kException.M6E_FSLW_IOMA_FIRST ^ M68kException.M6E_FSLW_IOMA_SECOND;
 26544:         int a2 = mmuTranslateWriteSuperData (a + 2);  //偶数
 26545:         return (d0 << 16 |
 26546:                 (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a2 >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a2));
 26547:       }
 26548:     } else {  //ユーザモード
 26549:       M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_MODIFY | M68kException.M6E_FSLW_SIZE_LONG | M68kException.M6E_FSLW_TM_USER_DATA;
 26550:       int a0 = mmuTranslateWriteUserData (a);  //a+2が必要なので上書き不可
 26551:       if ((a & 2) == 0) {  //4の倍数
 26552:         return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRls (a0);
 26553:       } else {  //4の倍数+2
 26554:         int d0 = (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRws (a0);
 26555:         M68kException.m6eFSLW ^= M68kException.M6E_FSLW_IOMA_FIRST ^ M68kException.M6E_FSLW_IOMA_SECOND;
 26556:         int a2 = mmuTranslateWriteUserData (a + 2);  //偶数
 26557:         return (d0 << 16 |
 26558:                 (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a2 >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a2));
 26559:       }
 26560:     }
 26561:   }  //mmuModifyLongEven(int,int)
 26562: 
 26563:   //d = mmuModifyLongFour (a, supervisor)
 26564:   //  リードモディファイライトのリードロング(4の倍数)
 26565:   public static int mmuModifyLongFour (int a, int supervisor) throws M68kException {
 26566:     if (supervisor != 0) {  //スーパーバイザモード
 26567:       M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_MODIFY | M68kException.M6E_FSLW_SIZE_LONG | M68kException.M6E_FSLW_TM_SUPER_DATA;
 26568:       a = mmuTranslateWriteSuperData (a);
 26569:       return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a >>> XEiJ.BUS_PAGE_BITS].mmdRls (a);
 26570:     } else {  //ユーザモード
 26571:       M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_MODIFY | M68kException.M6E_FSLW_SIZE_LONG | M68kException.M6E_FSLW_TM_USER_DATA;
 26572:       a = mmuTranslateWriteUserData (a);
 26573:       return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a >>> XEiJ.BUS_PAGE_BITS].mmdRls (a);
 26574:     }
 26575:   }  //mmuModifyLongFour(int,int)
 26576: 
 26577:   //--------------------------------------------------------------------------------
 26578:   //ポーク
 26579:   //  デバッガ用
 26580:   //  エラーや副作用なしでライトする
 26581: 
 26582:   //mmuPokeByte (a, x, f)
 26583:   //  ポークバイト
 26584:   public static void mmuPokeByte (int a, int x, int f) {
 26585:     f = f == -1 ? XEiJ.regSRS != 0 ? 5 : 1 : f & 7;
 26586:     MemoryMappedDevice[] mm = (DataBreakPoint.DBP_ON ?
 26587:                                (f & 4) != 0 ? DataBreakPoint.dbpSuperMap : DataBreakPoint.dbpUserMap :
 26588:                                (f & 4) != 0 ? XEiJ.busSuperMap : XEiJ.busUserMap);
 26589:     //    01234567
 26590:     if (0b01100110 << 24 << f < 0) {  //DFC=1,2,5,6。アドレス変換あり
 26591:       int a0 = mmuTranslatePeek (a, f & 4, f & 2);
 26592:       if ((a ^ a0) != 1) {
 26593:         mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdVb (a0, x);
 26594:       }
 26595:     } else if (f != 7) {  //DFC=0,3,4。アドレス変換なし
 26596:       mm[a >>> XEiJ.BUS_PAGE_BITS].mmdVb (a, x);
 26597:     }
 26598:   }  //mmuPokeByte(int,int,int)
 26599: 
 26600:   //mmuPokeByteData (a, d, supervisor)
 26601:   //  ポークバイト(データ)
 26602:   public static void mmuPokeByteData (int a, int d, int supervisor) {
 26603:     MemoryMappedDevice[] mm = supervisor != 0 ? DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap : DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap;
 26604:     int a0 = mmuTranslatePeek (a, supervisor, 0);
 26605:     if ((a ^ a0) != 1) {
 26606:       //mm[a >>> XEiJ.BUS_PAGE_BITS].mmdVb (a0, d);
 26607:       XEiJ.busVb (a0, d);
 26608:     }
 26609:   }  //mmuPokeByteData(int,int,int)
 26610: 
 26611:   //mmuPokeWord (a, x, f)
 26612:   //  ポークワード
 26613:   public static void mmuPokeWord (int a, int x, int f) {
 26614:     f = f == -1 ? XEiJ.regSRS != 0 ? 5 : 1 : f & 7;
 26615:     MemoryMappedDevice[] mm = (DataBreakPoint.DBP_ON ?
 26616:                                (f & 4) != 0 ? DataBreakPoint.dbpSuperMap : DataBreakPoint.dbpUserMap :
 26617:                                (f & 4) != 0 ? XEiJ.busSuperMap : XEiJ.busUserMap);
 26618:     //    01234567
 26619:     if (0b01100110 << 24 << f < 0) {  //DFC=1,2,5,6。アドレス変換あり
 26620:       int a0 = mmuTranslatePeek (a, f & 4, f & 2);
 26621:       if ((a & 1) == 0) {  //偶数
 26622:         if ((a ^ a0) != 1) {
 26623:           mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdVw (a0, x);
 26624:         }
 26625:       } else {  //奇数
 26626:         int a1 = mmuTranslatePeek (a + 1, f & 4, f & 2);
 26627:         if ((a     ^ a0) != 1) {
 26628:           mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdVb (a0, x >> 8);
 26629:         }
 26630:         if ((a + 1 ^ a1) != 1) {
 26631:           mm[a1 >>> XEiJ.BUS_PAGE_BITS].mmdVb (a1, x     );
 26632:         }
 26633:       }
 26634:     } else if (f != 7) {  //DFC=0,3,4。アドレス変換なし
 26635:       if ((a & 1) == 0) {  //偶数
 26636:         mm[a >>> XEiJ.BUS_PAGE_BITS].mmdVw (a, x);
 26637:       } else {  //奇数
 26638:         mm[a     >>> XEiJ.BUS_PAGE_BITS].mmdVb (a    , x >> 8);
 26639:         mm[a + 1 >>> XEiJ.BUS_PAGE_BITS].mmdVb (a + 1, x     );
 26640:       }
 26641:     }
 26642:   }  //mmuPokeWord(int,int,int)
 26643: 
 26644:   //mmuPokeWordData (a, d, supervisor)
 26645:   //  ポークワード(データ)
 26646:   public static void mmuPokeWordData (int a, int d, int supervisor) {
 26647:     mmuPokeByteData (a, d >> 8, supervisor);
 26648:     mmuPokeByteData (a + 1, d, supervisor);
 26649:   }  //mmuPokeWordData(int,int,int)
 26650: 
 26651:   //mmuPokeLong (a, x, f)
 26652:   //  ポークロング
 26653:   public static void mmuPokeLong (int a, int x, int f) {
 26654:     f = f == -1 ? XEiJ.regSRS != 0 ? 5 : 1 : f & 7;
 26655:     MemoryMappedDevice[] mm = (DataBreakPoint.DBP_ON ?
 26656:                                (f & 4) != 0 ? DataBreakPoint.dbpSuperMap : DataBreakPoint.dbpUserMap :
 26657:                                (f & 4) != 0 ? XEiJ.busSuperMap : XEiJ.busUserMap);
 26658:     //    01234567
 26659:     if (0b01100110 << 24 << f < 0) {  //DFC=1,2,5,6。アドレス変換あり
 26660:       int a0 = mmuTranslatePeek (a, f & 4, f & 2);
 26661:       if ((a & 3) == 0) {  //4の倍数
 26662:         if ((a ^ a0) != 1) {
 26663:           mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdVl (a0, x);
 26664:         }
 26665:       } else if ((a & 1) == 0) {  //4の倍数ではない偶数
 26666:         int a2 = mmuTranslatePeek (a + 2, f & 4, f & 2);
 26667:         if ((a     ^ a0) != 1) {
 26668:           mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdVw (a0, x >> 16);
 26669:         }
 26670:         if ((a + 2 ^ a2) != 1) {
 26671:           mm[a2 >>> XEiJ.BUS_PAGE_BITS].mmdVw (a2, x);
 26672:         }
 26673:       } else {  //奇数
 26674:         int a1 = mmuTranslatePeek (a + 1, f & 4, f & 2);
 26675:         int a3 = mmuTranslatePeek (a + 3, f & 4, f & 2);
 26676:         if ((a     ^ a0) != 1) {
 26677:           mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdVb (a0, x >> 24);
 26678:         }
 26679:         if ((a + 1 ^ a1) != 1) {
 26680:           mm[a1 >>> XEiJ.BUS_PAGE_BITS].mmdVw (a1, x >>  8);
 26681:         }
 26682:         if ((a + 3 ^ a3) != 1) {
 26683:           mm[a3 >>> XEiJ.BUS_PAGE_BITS].mmdVb (a3, x);
 26684:         }
 26685:       }
 26686:     } else if (f != 7) {  //DFC=0,3,4。アドレス変換なし
 26687:       if ((a & 3) == 0) {  //4の倍数
 26688:         mm[a >>> XEiJ.BUS_PAGE_BITS].mmdVl (a, x);
 26689:       } else if ((a & 1) == 0) {  //4の倍数ではない偶数
 26690:         mm[a     >>> XEiJ.BUS_PAGE_BITS].mmdVw (a    , x >> 16);
 26691:         mm[a + 2 >>> XEiJ.BUS_PAGE_BITS].mmdVw (a + 2, x      );
 26692:       } else {  //奇数
 26693:         mm[a     >>> XEiJ.BUS_PAGE_BITS].mmdVb (a,     x >> 24);
 26694:         mm[a + 1 >>> XEiJ.BUS_PAGE_BITS].mmdVw (a + 1, x >>  8);
 26695:         mm[a + 3 >>> XEiJ.BUS_PAGE_BITS].mmdVb (a + 3, x      );
 26696:       }
 26697:     }
 26698:   }  //mmuPokeLong(int,int,int)
 26699: 
 26700:   //mmuPokeLongData (a, d, supervisor)
 26701:   //  ポークロング(データ)
 26702:   public static void mmuPokeLongData (int a, int d, int supervisor) {
 26703:     mmuPokeByteData (a, d >> 24, supervisor);
 26704:     mmuPokeByteData (a + 1, d >> 16, supervisor);
 26705:     mmuPokeByteData (a + 2, d >> 8, supervisor);
 26706:     mmuPokeByteData (a + 3, d, supervisor);
 26707:   }  //mmuPokeLongData(int,int,int)
 26708: 
 26709:   //mmuPokeQuad (a, x, f)
 26710:   //  ポーククワッド
 26711:   public static void mmuPokeQuad (int a, long x, int f) {
 26712:     mmuPokeLong (a    , (int) (x >> 32), f);
 26713:     mmuPokeLong (a + 4, (int)  x       , f);
 26714:   }  //mmuPokeQuad(int,long,int)
 26715: 
 26716:   //mmuPokeExtended (a, b, f)
 26717:   public static void mmuPokeExtended (int a, byte[] b, int f) {
 26718:     for (int i = 0; i < 12; i++) {
 26719:       mmuPokeByte (a + i, b[i], f);
 26720:     }
 26721:   }  //mmuPokeQuad(int,long,int)
 26722: 
 26723:   //a = mmuPokeStringZ (a, str, f)
 26724:   //  ポークストリング
 26725:   //  文字列をUTF-16からSJISに変換しながらメモリに書き込む
 26726:   //  文字列に'\0'が含まれるときはその手前まで書き込む
 26727:   //  SJISに変換できない文字は'※'になる
 26728:   //  最後に'\0'を書き込む
 26729:   //  '\0'を含まない書き込んだ文字列を返す
 26730:   public static String mmuPokeStringZ (int a, String str, int f) {
 26731:     StringBuilder sb = new StringBuilder ();
 26732:     int l = str.length ();
 26733:     for (int i = 0; i < l; i++) {
 26734:       int u = str.charAt (i);
 26735:       if (u == '\0') {
 26736:         break;
 26737:       }
 26738:       int s = CharacterCode.chrCharToSJIS[u];  //SJISに変換する
 26739:       if (s == 0) {  //変換できない
 26740:         s = 0x81a6;  //'※'
 26741:       }
 26742:       if (s >> 8 != 0) {
 26743:         mmuPokeByte (a++, s >> 8, f);
 26744:       }
 26745:       mmuPokeByte (a++, s, f);
 26746:       u = CharacterCode.chrSJISToChar[s];  //UTF-16に変換する
 26747:       if (u == 0) {  //変換できない
 26748:         u = 0xfffd;
 26749:       }
 26750:       sb.append ((char) u);
 26751:     }
 26752:     mmuPokeByte (a, 0, f);  //'\0'
 26753:     return sb.toString ();
 26754:   }  //mmuPokeStringZ(int,String,int)
 26755: 
 26756:   //--------------------------------------------------------------------------------
 26757:   //ライト
 26758:   //  アドレス変換はライト
 26759:   //  FSLWのRead and WriteはWrite
 26760: 
 26761:   //mmuWriteByteData (a, d, supervisor)
 26762:   //  ライトバイト符号拡張(データ)
 26763:   public static void mmuWriteByteData (int a, int d, int supervisor) throws M68kException {
 26764:     if (supervisor != 0) {  //スーパーバイザモード
 26765:       M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_WRITE | M68kException.M6E_FSLW_SIZE_BYTE | M68kException.M6E_FSLW_TM_SUPER_DATA;
 26766:       int t = mmuTranslateWriteSuperData (a);
 26767:       (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWb (t, d);
 26768:     } else {  //ユーザモード
 26769:       M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_WRITE | M68kException.M6E_FSLW_SIZE_BYTE | M68kException.M6E_FSLW_TM_USER_DATA;
 26770:       int t = mmuTranslateWriteUserData (a);
 26771:       (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWb (t, d);
 26772:     }
 26773:   }  //mmuWriteByteData(int,int,int)
 26774: 
 26775:   //mmuWriteWordData (a, d, supervisor)
 26776:   //  ライトワード符号拡張(データ)
 26777:   public static void mmuWriteWordData (int a, int d, int supervisor) throws M68kException {
 26778:     if (supervisor != 0) {  //スーパーバイザモード
 26779:       M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_WRITE | M68kException.M6E_FSLW_SIZE_WORD | M68kException.M6E_FSLW_TM_SUPER_DATA;
 26780:       int t = mmuTranslateWriteSuperData (a);  //a+1が必要なので上書き不可
 26781:       if ((a & 1) == 0) {  //偶数
 26782:         (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWw (t, d);
 26783:       } else {  //奇数
 26784:         (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWb (t, d >> 8);
 26785:         M68kException.m6eFSLW ^= M68kException.M6E_FSLW_IOMA_FIRST ^ M68kException.M6E_FSLW_IOMA_SECOND;
 26786:         t = mmuTranslateWriteSuperData (a + 1);  //偶数
 26787:         (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWb (t, d);
 26788:       }
 26789:     } else {  //ユーザモード
 26790:       M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_WRITE | M68kException.M6E_FSLW_SIZE_WORD | M68kException.M6E_FSLW_TM_USER_DATA;
 26791:       int t = mmuTranslateWriteUserData (a);  //a+1が必要なので上書き不可
 26792:       if ((a & 1) == 0) {  //偶数
 26793:         (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWw (t, d);
 26794:       } else {  //奇数
 26795:         (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWb (t, d >> 8);
 26796:         M68kException.m6eFSLW ^= M68kException.M6E_FSLW_IOMA_FIRST ^ M68kException.M6E_FSLW_IOMA_SECOND;
 26797:         t = mmuTranslateWriteUserData (a + 1);  //偶数
 26798:         (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWb (t, d);
 26799:       }
 26800:     }
 26801:   }  //mmuWriteWordData(int,int,int)
 26802: 
 26803:   //mmuWriteWordEven (a, d, supervisor)
 26804:   //  ライトワード符号拡張(偶数)
 26805:   public static void mmuWriteWordEven (int a, int d, int supervisor) throws M68kException {
 26806:     if (supervisor != 0) {  //スーパーバイザモード
 26807:       M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_WRITE | M68kException.M6E_FSLW_SIZE_WORD | M68kException.M6E_FSLW_TM_SUPER_DATA;
 26808:       a = mmuTranslateWriteSuperData (a);
 26809:       (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a >>> XEiJ.BUS_PAGE_BITS].mmdWw (a, d);
 26810:     } else {  //ユーザモード
 26811:       M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_WRITE | M68kException.M6E_FSLW_SIZE_WORD | M68kException.M6E_FSLW_TM_USER_DATA;
 26812:       a = mmuTranslateWriteUserData (a);
 26813:       (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a >>> XEiJ.BUS_PAGE_BITS].mmdWw (a, d);
 26814:     }
 26815:   }  //mmuWriteWordEven(int,int,int)
 26816: 
 26817:   //mmuWriteLongData (a, d, supervisor)
 26818:   //  ライトロング(データ)
 26819:   public static void mmuWriteLongData (int a, int d, int supervisor) throws M68kException {
 26820:     if (supervisor != 0) {  //スーパーバイザモード
 26821:       M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_WRITE | M68kException.M6E_FSLW_SIZE_LONG | M68kException.M6E_FSLW_TM_SUPER_DATA;
 26822:       int t = mmuTranslateWriteSuperData (a);  //a+1,a+2,a+3が必要なので上書き不可
 26823:       if ((a & 3) == 0) {  //4の倍数
 26824:         (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWl (t, d);
 26825:       } else if ((a & 1) == 0) {  //4の倍数+2
 26826:         (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWw (t, d >> 16);
 26827:         M68kException.m6eFSLW ^= M68kException.M6E_FSLW_IOMA_FIRST ^ M68kException.M6E_FSLW_IOMA_SECOND;
 26828:         t = mmuTranslateWriteSuperData (a + 2);  //偶数
 26829:         (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWw (t, d);
 26830:       } else {  //奇数
 26831:         (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWb (t, d >> 24);
 26832:         M68kException.m6eFSLW ^= M68kException.M6E_FSLW_IOMA_FIRST ^ M68kException.M6E_FSLW_IOMA_SECOND;
 26833:         t = mmuTranslateWriteSuperData (a + 1);  //偶数
 26834:         (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWw (t, d >> 8);
 26835:         t = mmuTranslateWriteSuperData (a + 3);  //偶数
 26836:         (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWb (t, d);
 26837:       }
 26838:     } else {  //ユーザモード
 26839:       M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_WRITE | M68kException.M6E_FSLW_SIZE_LONG | M68kException.M6E_FSLW_TM_USER_DATA;
 26840:       int t = mmuTranslateWriteUserData (a);  //a+1,a+2,a+3が必要なので上書き不可
 26841:       if ((a & 3) == 0) {  //4の倍数
 26842:         (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWl (t, d);
 26843:       } else if ((a & 1) == 0) {  //4の倍数+2
 26844:         (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWw (t, d >> 16);
 26845:         M68kException.m6eFSLW ^= M68kException.M6E_FSLW_IOMA_FIRST ^ M68kException.M6E_FSLW_IOMA_SECOND;
 26846:         t = mmuTranslateWriteUserData (a + 2);  //偶数
 26847:         (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWw (t, d);
 26848:       } else {  //奇数
 26849:         (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWb (t, d >> 24);
 26850:         M68kException.m6eFSLW ^= M68kException.M6E_FSLW_IOMA_FIRST ^ M68kException.M6E_FSLW_IOMA_SECOND;
 26851:         t = mmuTranslateWriteUserData (a + 1);  //偶数
 26852:         (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWw (t, d >> 8);
 26853:         t = mmuTranslateWriteUserData (a + 3);  //偶数
 26854:         (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWb (t, d);
 26855:       }
 26856:     }
 26857:   }  //mmuWriteLongData(int,int,int)
 26858: 
 26859:   //mmuWriteLongEven (a, d, supervisor)
 26860:   //  ライトロング(偶数)
 26861:   public static void mmuWriteLongEven (int a, int d, int supervisor) throws M68kException {
 26862:     if (supervisor != 0) {  //スーパーバイザモード
 26863:       M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_WRITE | M68kException.M6E_FSLW_SIZE_LONG | M68kException.M6E_FSLW_TM_SUPER_DATA;
 26864:       int t = mmuTranslateWriteSuperData (a);  //a+2が必要なので上書き不可
 26865:       if ((a & 2) == 0) {  //4の倍数
 26866:         (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWl (t, d);
 26867:       } else {  //4の倍数+2
 26868:         (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWw (t, d >> 16);
 26869:         M68kException.m6eFSLW ^= M68kException.M6E_FSLW_IOMA_FIRST ^ M68kException.M6E_FSLW_IOMA_SECOND;
 26870:         t = mmuTranslateWriteSuperData (a + 2);  //偶数
 26871:         (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWw (t, d);
 26872:       }
 26873:     } else {  //ユーザモード
 26874:       M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_WRITE | M68kException.M6E_FSLW_SIZE_LONG | M68kException.M6E_FSLW_TM_USER_DATA;
 26875:       int t = mmuTranslateWriteUserData (a);  //a+2が必要なので上書き不可
 26876:       if ((a & 2) == 0) {  //4の倍数
 26877:         (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWl (t, d);
 26878:       } else {  //4の倍数+2
 26879:         (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWw (t, d >> 16);
 26880:         M68kException.m6eFSLW ^= M68kException.M6E_FSLW_IOMA_FIRST ^ M68kException.M6E_FSLW_IOMA_SECOND;
 26881:         t = mmuTranslateWriteUserData (a + 2);  //偶数
 26882:         (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWw (t, d);
 26883:       }
 26884:     }
 26885:   }  //mmuWriteLongEven(int,int,int)
 26886: 
 26887:   //mmuWriteLongFour (a, d, supervisor)
 26888:   //  ライトロング(4の倍数)
 26889:   public static void mmuWriteLongFour (int a, int d, int supervisor) throws M68kException {
 26890:     if (supervisor != 0) {  //スーパーバイザモード
 26891:       M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_WRITE | M68kException.M6E_FSLW_SIZE_LONG | M68kException.M6E_FSLW_TM_SUPER_DATA;
 26892:       a = mmuTranslateWriteSuperData (a);
 26893:       (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a >>> XEiJ.BUS_PAGE_BITS].mmdWl (a, d);
 26894:     } else {  //ユーザモード
 26895:       M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_WRITE | M68kException.M6E_FSLW_SIZE_LONG | M68kException.M6E_FSLW_TM_USER_DATA;
 26896:       a = mmuTranslateWriteUserData (a);
 26897:       (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a >>> XEiJ.BUS_PAGE_BITS].mmdWl (a, d);
 26898:     }
 26899:   }  //mmuWriteLongFour(int,int,int)
 26900: 
 26901:   //mmuWriteQuadData (a, d, supervisor)
 26902:   //  ライトクワッド(データ)
 26903:   public static void mmuWriteQuadData (int a, long d, int supervisor) throws M68kException {
 26904:     if (supervisor != 0) {  //スーパーバイザモード
 26905:       M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_WRITE | M68kException.M6E_FSLW_SIZE_QUAD | M68kException.M6E_FSLW_TM_SUPER_DATA;
 26906:       int t = mmuTranslateWriteSuperData (a);  //a+1,a+2,a+3,a+4,a+5,a+6,a+7が必要なので上書き不可
 26907:       if ((a & 3) == 0) {  //4の倍数
 26908:         (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWl (t, (int) (d >> 32));
 26909:         t = mmuTranslateWriteSuperData (a + 4);  //4の倍数
 26910:         (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWl (t, (int) d);
 26911:       } else if ((a & 1) == 0) {  //4の倍数+2
 26912:         (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWw (t, (int) (d >> 48));
 26913:         M68kException.m6eFSLW ^= M68kException.M6E_FSLW_IOMA_FIRST ^ M68kException.M6E_FSLW_IOMA_SECOND;
 26914:         t = mmuTranslateWriteSuperData (a + 2);  //4の倍数
 26915:         (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWl (t, (int) (d >> 16));
 26916:         t = mmuTranslateWriteSuperData (a + 6);  //4の倍数
 26917:         (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWw (t, (int) d);
 26918:       } else if ((a & 3) == 1) {  //4の倍数+1
 26919:         (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWb (t, (int) (d >> 56));
 26920:         M68kException.m6eFSLW ^= M68kException.M6E_FSLW_IOMA_FIRST ^ M68kException.M6E_FSLW_IOMA_SECOND;
 26921:         t = mmuTranslateWriteSuperData (a + 1);  //4の倍数+2
 26922:         (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWw (t, (int) (d >> 40));
 26923:         t = mmuTranslateWriteSuperData (a + 3);  //4の倍数
 26924:         (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWl (t, (int) (d >> 8));
 26925:         t = mmuTranslateWriteSuperData (a + 7);  //4の倍数
 26926:         (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWb (t, (int) d);
 26927:       } else {  //  //4の倍数+3
 26928:         (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWb (t, (int) (d >> 56));
 26929:         M68kException.m6eFSLW ^= M68kException.M6E_FSLW_IOMA_FIRST ^ M68kException.M6E_FSLW_IOMA_SECOND;
 26930:         t = mmuTranslateWriteSuperData (a + 1);  //4の倍数
 26931:         (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWl (t, (int) (d >> 24));
 26932:         t = mmuTranslateWriteSuperData (a + 5);  //4の倍数
 26933:         (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWw (t, (int) (d >> 8));
 26934:         t = mmuTranslateWriteSuperData (a + 7);  //4の倍数+2
 26935:         (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWb (t, (int) d);
 26936:       }
 26937:     } else {  //ユーザモード
 26938:       M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_WRITE | M68kException.M6E_FSLW_SIZE_QUAD | M68kException.M6E_FSLW_TM_USER_DATA;
 26939:       int t = mmuTranslateWriteUserData (a);  //a+1,a+2,a+3,a+4,a+5,a+6,a+7が必要なので上書き不可
 26940:       if ((a & 3) == 0) {  //4の倍数
 26941:         (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWl (t, (int) (d >> 32));
 26942:         t = mmuTranslateWriteUserData (a + 4);  //4の倍数
 26943:         (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWl (t, (int) d);
 26944:       } else if ((a & 1) == 0) {  //4の倍数+2
 26945:         (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWw (t, (int) (d >> 48));
 26946:         M68kException.m6eFSLW ^= M68kException.M6E_FSLW_IOMA_FIRST ^ M68kException.M6E_FSLW_IOMA_SECOND;
 26947:         t = mmuTranslateWriteUserData (a + 2);  //4の倍数
 26948:         (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWl (t, (int) (d >> 16));
 26949:         t = mmuTranslateWriteUserData (a + 6);  //4の倍数
 26950:         (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWw (t, (int) d);
 26951:       } else if ((a & 3) == 1) {  //4の倍数+1
 26952:         (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWb (t, (int) (d >> 56));
 26953:         M68kException.m6eFSLW ^= M68kException.M6E_FSLW_IOMA_FIRST ^ M68kException.M6E_FSLW_IOMA_SECOND;
 26954:         t = mmuTranslateWriteUserData (a + 1);  //4の倍数+2
 26955:         (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWw (t, (int) (d >> 40));
 26956:         t = mmuTranslateWriteUserData (a + 3);  //4の倍数
 26957:         (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWl (t, (int) (d >> 8));
 26958:         t = mmuTranslateWriteUserData (a + 7);  //4の倍数
 26959:         (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWb (t, (int) d);
 26960:       } else {  //  //4の倍数+3
 26961:         (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWb (t, (int) (d >> 56));
 26962:         M68kException.m6eFSLW ^= M68kException.M6E_FSLW_IOMA_FIRST ^ M68kException.M6E_FSLW_IOMA_SECOND;
 26963:         t = mmuTranslateWriteUserData (a + 1);  //4の倍数
 26964:         (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWl (t, (int) (d >> 24));
 26965:         t = mmuTranslateWriteUserData (a + 5);  //4の倍数
 26966:         (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWw (t, (int) (d >> 8));
 26967:         t = mmuTranslateWriteUserData (a + 7);  //4の倍数+2
 26968:         (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWb (t, (int) d);
 26969:       }
 26970:     }
 26971:   }  //mmuWriteQuadData(int,long,int)
 26972: 
 26973:   //mmuWriteQuadSecond (a, d, supervisor)
 26974:   //  ライトクワッド(2番目)
 26975:   //  エクステンデッドとラインの2番目で使う
 26976:   public static void mmuWriteQuadSecond (int a, long d, int supervisor) throws M68kException {
 26977:     if (supervisor != 0) {  //スーパーバイザモード
 26978:       M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_SECOND | M68kException.M6E_FSLW_RW_WRITE | M68kException.M6E_FSLW_SIZE_QUAD | M68kException.M6E_FSLW_TM_SUPER_DATA;
 26979:       int t = mmuTranslateWriteSuperData (a);  //a+1,a+2,a+3,a+4,a+5,a+6,a+7が必要なので上書き不可
 26980:       if ((a & 3) == 0) {  //4の倍数
 26981:         (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWl (t, (int) (d >> 32));
 26982:         t = mmuTranslateWriteSuperData (a + 4);  //4の倍数
 26983:         (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWl (t, (int) d);
 26984:       } else if ((a & 1) == 0) {  //4の倍数+2
 26985:         (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWw (t, (int) (d >> 48));
 26986:         t = mmuTranslateWriteSuperData (a + 2);  //4の倍数
 26987:         (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWl (t, (int) (d >> 16));
 26988:         t = mmuTranslateWriteSuperData (a + 6);  //4の倍数
 26989:         (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWw (t, (int) d);
 26990:       } else if ((a & 3) == 1) {  //4の倍数+1
 26991:         (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWb (t, (int) (d >> 56));
 26992:         t = mmuTranslateWriteSuperData (a + 1);  //4の倍数+2
 26993:         (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWw (t, (int) (d >> 40));
 26994:         t = mmuTranslateWriteSuperData (a + 3);  //4の倍数
 26995:         (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWl (t, (int) (d >> 8));
 26996:         t = mmuTranslateWriteSuperData (a + 7);  //4の倍数
 26997:         (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWb (t, (int) d);
 26998:       } else {  //  //4の倍数+3
 26999:         (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWb (t, (int) (d >> 56));
 27000:         t = mmuTranslateWriteSuperData (a + 1);  //4の倍数
 27001:         (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWl (t, (int) (d >> 24));
 27002:         t = mmuTranslateWriteSuperData (a + 5);  //4の倍数
 27003:         (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWw (t, (int) (d >> 8));
 27004:         t = mmuTranslateWriteSuperData (a + 7);  //4の倍数+2
 27005:         (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWb (t, (int) d);
 27006:       }
 27007:     } else {  //ユーザモード
 27008:       M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_SECOND | M68kException.M6E_FSLW_RW_WRITE | M68kException.M6E_FSLW_SIZE_QUAD | M68kException.M6E_FSLW_TM_USER_DATA;
 27009:       int t = mmuTranslateWriteUserData (a);  //a+1,a+2,a+3,a+4,a+5,a+6,a+7が必要なので上書き不可
 27010:       if ((a & 3) == 0) {  //4の倍数
 27011:         (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWl (t, (int) (d >> 32));
 27012:         t = mmuTranslateWriteUserData (a + 4);  //4の倍数
 27013:         (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWl (t, (int) d);
 27014:       } else if ((a & 1) == 0) {  //4の倍数+2
 27015:         (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWw (t, (int) (d >> 48));
 27016:         t = mmuTranslateWriteUserData (a + 2);  //4の倍数
 27017:         (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWl (t, (int) (d >> 16));
 27018:         t = mmuTranslateWriteUserData (a + 6);  //4の倍数
 27019:         (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWw (t, (int) d);
 27020:       } else if ((a & 3) == 1) {  //4の倍数+1
 27021:         (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWb (t, (int) (d >> 56));
 27022:         t = mmuTranslateWriteUserData (a + 1);  //4の倍数+2
 27023:         (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWw (t, (int) (d >> 40));
 27024:         t = mmuTranslateWriteUserData (a + 3);  //4の倍数
 27025:         (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWl (t, (int) (d >> 8));
 27026:         t = mmuTranslateWriteUserData (a + 7);  //4の倍数
 27027:         (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWb (t, (int) d);
 27028:       } else {  //  //4の倍数+3
 27029:         (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWb (t, (int) (d >> 56));
 27030:         t = mmuTranslateWriteUserData (a + 1);  //4の倍数
 27031:         (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWl (t, (int) (d >> 24));
 27032:         t = mmuTranslateWriteUserData (a + 5);  //4の倍数
 27033:         (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWw (t, (int) (d >> 8));
 27034:         t = mmuTranslateWriteUserData (a + 7);  //4の倍数+2
 27035:         (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWb (t, (int) d);
 27036:       }
 27037:     }
 27038:   }  //mmuWriteQuadSecond(int,int,int)
 27039: 
 27040:   //mmuWriteByteArray (address, array, offset, length, supervisor)
 27041:   //  ライトバイト配列
 27042:   public static void mmuWriteByteArray (int address, byte[] array, int offset, int length, int supervisor) throws M68kException {
 27043:     if (false) {  //1バイトずつアドレス変換する
 27044:       for (int index = 0; index < length; index++) {
 27045:         mmuWriteByteData (address + index, array[offset + index], supervisor);
 27046:       }
 27047:     } else {  //1ページずつアドレス変換する
 27048:       int pageSize = Math.min (XEiJ.BUS_PAGE_SIZE, mmuPageSize);
 27049:       if (supervisor != 0) {  //スーパーバイザモード
 27050:         if (false) {  //1バイトずつ転送する
 27051:           M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_WRITE | M68kException.M6E_FSLW_SIZE_BYTE | M68kException.M6E_FSLW_TM_SUPER_DATA;
 27052:         }
 27053:         MemoryMappedDevice[] mm = DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap;
 27054:         while (0 < length) {
 27055:           int l = Math.min (pageSize - (address & (pageSize - 1)), length);  //今回転送する長さ
 27056:           int t = mmuTranslateWriteSuperData (address);
 27057:           MemoryMappedDevice d = mm[t >>> XEiJ.BUS_PAGE_BITS];
 27058:           if (false) {  //1バイトずつ転送する
 27059:             for (int i = 0; i < l; i++) {
 27060:               d.mmdWb (t + i, array[offset + i]);
 27061:             }
 27062:           } else {  //4バイトずつ転送する。ウェイトサイクルを減らす
 27063:             int o = offset;
 27064:             int z = t + l;
 27065:             if ((t & 1) != 0 && t < z) {  //2n+1で残り1以上。1バイト転送する
 27066:               M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_WRITE | M68kException.M6E_FSLW_SIZE_BYTE | M68kException.M6E_FSLW_TM_SUPER_DATA;
 27067:               d.mmdWb (t++, array[o++]);
 27068:             }
 27069:             if ((t & 2) != 0 && t + 1 < z) {  //4n+2で残り2以上。2バイト転送する
 27070:               M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_WRITE | M68kException.M6E_FSLW_SIZE_WORD | M68kException.M6E_FSLW_TM_SUPER_DATA;
 27071:               d.mmdWw (t,
 27072:                        (array[o    ]      ) <<  8 |
 27073:                        (array[o + 1] & 255));
 27074:               t += 2;
 27075:               o += 2;
 27076:             }
 27077:             if (t + 3 < z) {  //4nで残り4以上。4バイトずつ転送する
 27078:               M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_WRITE | M68kException.M6E_FSLW_SIZE_LONG | M68kException.M6E_FSLW_TM_SUPER_DATA;
 27079:               do {
 27080:                 d.mmdWl (t,
 27081:                          (array[o    ]      ) << 24 |
 27082:                          (array[o + 1] & 255) << 16 |
 27083:                          (array[o + 2] & 255) <<  8 |
 27084:                          (array[o + 3] & 255));
 27085:                 t += 4;
 27086:                 o += 4;
 27087:               } while (t + 3 < z);
 27088:             }
 27089:             if (t + 1 < z) {  //4nで残り2または3。2バイト転送する
 27090:               M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_WRITE | M68kException.M6E_FSLW_SIZE_WORD | M68kException.M6E_FSLW_TM_SUPER_DATA;
 27091:               d.mmdWw (t,
 27092:                        (array[o    ]      ) <<  8 |
 27093:                        (array[o + 1] & 255));
 27094:               t += 2;
 27095:               o += 2;
 27096:             }
 27097:             if (t < z) {  //4nで残り1。1バイト転送する
 27098:               M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_WRITE | M68kException.M6E_FSLW_SIZE_BYTE | M68kException.M6E_FSLW_TM_SUPER_DATA;
 27099:               d.mmdWb (t++, array[o++]);
 27100:             }
 27101:           }  //if 1バイトずつ/4バイトずつ
 27102:           address += l;
 27103:           offset += l;
 27104:           length -= l;
 27105:         }  //while 0<length
 27106:       } else {  //ユーザモード
 27107:         if (false) {  //1バイトずつ転送する
 27108:           M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_WRITE | M68kException.M6E_FSLW_SIZE_BYTE | M68kException.M6E_FSLW_TM_USER_DATA;
 27109:         }
 27110:         MemoryMappedDevice[] mm = DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap;
 27111:         while (0 < length) {
 27112:           int l = Math.min (pageSize - (address & (pageSize - 1)), length);  //今回転送する長さ
 27113:           int t = mmuTranslateWriteUserData (address);
 27114:           MemoryMappedDevice d = mm[t >>> XEiJ.BUS_PAGE_BITS];
 27115:           if (false) {  //1バイトずつ転送する
 27116:             for (int i = 0; i < l; i++) {
 27117:               d.mmdWb (t + i, array[offset + i]);
 27118:             }
 27119:           } else {  //4バイトずつ転送する。ウェイトサイクルを減らす
 27120:             int o = offset;
 27121:             int z = t + l;
 27122:             if ((t & 1) != 0 && t < z) {  //2n+1で残り1以上。1バイト転送する
 27123:               M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_WRITE | M68kException.M6E_FSLW_SIZE_BYTE | M68kException.M6E_FSLW_TM_USER_DATA;
 27124:               d.mmdWb (t++, array[o++]);
 27125:             }
 27126:             if ((t & 2) != 0 && t + 1 < z) {  //4n+2で残り2以上。2バイト転送する
 27127:               M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_WRITE | M68kException.M6E_FSLW_SIZE_WORD | M68kException.M6E_FSLW_TM_USER_DATA;
 27128:               d.mmdWw (t,
 27129:                        (array[o    ]      ) <<  8 |
 27130:                        (array[o + 1] & 255));
 27131:               t += 2;
 27132:               o += 2;
 27133:             }
 27134:             if (t + 3 < z) {  //4nで残り4以上。4バイトずつ転送する
 27135:               M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_WRITE | M68kException.M6E_FSLW_SIZE_LONG | M68kException.M6E_FSLW_TM_USER_DATA;
 27136:               do {
 27137:                 d.mmdWl (t,
 27138:                          (array[o    ]      ) << 24 |
 27139:                          (array[o + 1] & 255) << 16 |
 27140:                          (array[o + 2] & 255) <<  8 |
 27141:                          (array[o + 3] & 255));
 27142:                 t += 4;
 27143:                 o += 4;
 27144:               } while (t + 3 < z);
 27145:             }
 27146:             if (t + 1 < z) {  //4nで残り2または3。2バイト転送する
 27147:               M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_WRITE | M68kException.M6E_FSLW_SIZE_WORD | M68kException.M6E_FSLW_TM_USER_DATA;
 27148:               d.mmdWw (t,
 27149:                        (array[o    ]      ) <<  8 |
 27150:                        (array[o + 1] & 255));
 27151:               t += 2;
 27152:               o += 2;
 27153:             }
 27154:             if (t < z) {  //4nで残り1。1バイト転送する
 27155:               M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_WRITE | M68kException.M6E_FSLW_SIZE_BYTE | M68kException.M6E_FSLW_TM_USER_DATA;
 27156:               d.mmdWb (t++, array[o++]);
 27157:             }
 27158:           }  //if 1バイトずつ/4バイトずつ
 27159:           address += l;
 27160:           offset += l;
 27161:           length -= l;
 27162:         }  //while 0<length
 27163:       }  //if スーパーバイザモード/ユーザモード
 27164:     }  //if 1バイトずつ/1ページずつ
 27165:   }  //mmuWriteByteArray(int,byte[],int,int,int)
 27166: 
 27167:   //--------------------------------------------------------------------------------
 27168:   //アドレス変換
 27169: 
 27170:   //pa = mmuLoadPhysicalAddressRead (a)
 27171:   //  PLPAR (An)
 27172:   //  DFCに従って論理アドレスを物理アドレスに変換する(リードアクセス)
 27173:   //    DFC  1=ユーザデータ,2=ユーザ命令,5=スーパーバイザデータ,6=スーパーバイザ命令
 27174:   //    pa   物理アドレス
 27175:   //    a    論理アドレス
 27176:   public static int mmuLoadPhysicalAddressRead (int a) throws M68kException {
 27177:     M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_READ | M68kException.M6E_FSLW_SIZE_BYTE | XEiJ.mpuDFC << 16;
 27178:     return ((0b10011111 << 24 << XEiJ.mpuDFC) < 0 ?
 27179:             (0b00101010 << 24 << XEiJ.mpuDFC) < 0 ? mmuTranslateReadSuperCode (a) : mmuTranslateReadSuperData (a) :
 27180:             (0b00101010 << 24 << XEiJ.mpuDFC) < 0 ? mmuTranslateReadUserCode (a) : mmuTranslateReadUserData (a));
 27181:   }  //mmuLoadPhysicalAddressRead(int)
 27182: 
 27183:   //pa = mmuLoadPhysicalAddressWrite (a)
 27184:   //  PLPAW (An)
 27185:   //  DFCに従って論理アドレスを物理アドレスに変換する(ライトアクセス)
 27186:   //    DFC  1=ユーザデータ,2=ユーザ命令,5=スーパーバイザデータ,6=スーパーバイザ命令
 27187:   //    pa   物理アドレス
 27188:   //    a    論理アドレス
 27189:   public static int mmuLoadPhysicalAddressWrite (int a) throws M68kException {
 27190:     M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_WRITE | M68kException.M6E_FSLW_SIZE_BYTE | XEiJ.mpuDFC << 16;
 27191:     return ((0b10011111 << 24 << XEiJ.mpuDFC) < 0 ?
 27192:             (0b00101010 << 24 << XEiJ.mpuDFC) < 0 ? mmuTranslateWriteSuperCode (a) : mmuTranslateWriteSuperData (a) :
 27193:             (0b00101010 << 24 << XEiJ.mpuDFC) < 0 ? mmuTranslateWriteUserCode (a) : mmuTranslateWriteUserData (a));
 27194:   }  //mmuLoadPhysicalAddressWrite(int)
 27195: 
 27196:   //pa = mmuTranslateReadUserData (a)
 27197:   //  アドレス変換を行う(リードユーザデータ)
 27198:   //    pa  物理アドレス
 27199:   //    a   論理アドレス
 27200:   //  M68kException.m6eFSLWのMA,RW,SIZE,TM,IOをセットしてから呼び出すこと
 27201:   public static int mmuTranslateReadUserData (int a) throws M68kException {
 27202:     int logicalPage = a & mmuPageAddressMask;  //論理ページアドレス
 27203:     int head = (logicalPage * MMU_HASH_COEFF >>> -MMU_HASH_BITS) * (4 * MMU_CACHE_WAYS);  //先頭のエントリ
 27204:     if (mmuUserDataCache[head] == logicalPage) {  //リード用の論理ページアドレスと一致した
 27205:       return mmuUserDataCache[head + 2] | (a & mmuPageOffsetMask);  //物理ページアドレスとページオフセットを連結する
 27206:     }
 27207:     if (MMU_CACHE_WAYS >= 2) {  //2ways以上
 27208:       int tail = head + (4 * MMU_CACHE_WAYS - 4);  //末尾のエントリ
 27209:       for (int i = head + 4; i <= tail; i += 4) {
 27210:         if (mmuUserDataCache[i] == logicalPage) {  //リード用の論理ページアドレスと一致した
 27211:           //int logicalRead  = mmuUserDataCache[i    ];
 27212:           int logicalWrite = mmuUserDataCache[i + 1];
 27213:           int physicalPage = mmuUserDataCache[i + 2];
 27214:           int globalFlag   = mmuUserDataCache[i + 3];
 27215:           for (; i > head; i -= 4) {
 27216:             mmuUserDataCache[i    ] = mmuUserDataCache[i - 4];
 27217:             mmuUserDataCache[i + 1] = mmuUserDataCache[i - 3];
 27218:             mmuUserDataCache[i + 2] = mmuUserDataCache[i - 2];
 27219:             mmuUserDataCache[i + 3] = mmuUserDataCache[i - 1];
 27220:           }
 27221:           mmuUserDataCache[i    ] = logicalPage;  //logicalRead
 27222:           mmuUserDataCache[i + 1] = logicalWrite;
 27223:           mmuUserDataCache[i + 2] = physicalPage;
 27224:           mmuUserDataCache[i + 3] = globalFlag;
 27225:           return physicalPage | (a & mmuPageOffsetMask);  //物理ページアドレスとページオフセットを連結する
 27226:         }
 27227:       }  //for i
 27228:     }
 27229:     return mmuTranslateCommon (a, false, false, false);
 27230:   }  //mmuTranslateReadUserData(int)
 27231: 
 27232:   //pa = mmuTranslateReadUserCode (a)
 27233:   //  アドレス変換を行う(リードユーザコード)
 27234:   //    pa  物理アドレス
 27235:   //    a   論理アドレス
 27236:   //  M68kException.m6eFSLWのMA,RW,SIZE,TM,IOをセットしてから呼び出すこと
 27237:   public static int mmuTranslateReadUserCode (int a) throws M68kException {
 27238:     int logicalPage = a & mmuPageAddressMask;  //論理ページアドレス
 27239:     int head = (logicalPage * MMU_HASH_COEFF >>> -MMU_HASH_BITS) * (4 * MMU_CACHE_WAYS);  //先頭のエントリ
 27240:     if (mmuUserCodeCache[head] == logicalPage) {  //リード用の論理ページアドレスと一致した
 27241:       return mmuUserCodeCache[head + 2] | (a & mmuPageOffsetMask);  //物理ページアドレスとページオフセットを連結する
 27242:     }
 27243:     if (MMU_CACHE_WAYS >= 2) {  //2ways以上
 27244:       int tail = head + (4 * MMU_CACHE_WAYS - 4);  //末尾のエントリ
 27245:       for (int i = head + 4; i <= tail; i += 4) {
 27246:         if (mmuUserCodeCache[i] == logicalPage) {  //リード用の論理ページアドレスと一致した
 27247:           //int logicalRead  = mmuUserCodeCache[i    ];
 27248:           int logicalWrite = mmuUserCodeCache[i + 1];
 27249:           int physicalPage = mmuUserCodeCache[i + 2];
 27250:           int globalFlag   = mmuUserCodeCache[i + 3];
 27251:           for (; i > head; i -= 4) {
 27252:             mmuUserCodeCache[i    ] = mmuUserCodeCache[i - 4];
 27253:             mmuUserCodeCache[i + 1] = mmuUserCodeCache[i - 3];
 27254:             mmuUserCodeCache[i + 2] = mmuUserCodeCache[i - 2];
 27255:             mmuUserCodeCache[i + 3] = mmuUserCodeCache[i - 1];
 27256:           }
 27257:           mmuUserCodeCache[head    ] = logicalPage;  //logicalRead
 27258:           mmuUserCodeCache[head + 1] = logicalWrite;
 27259:           mmuUserCodeCache[head + 2] = physicalPage;
 27260:           mmuUserCodeCache[head + 3] = globalFlag;
 27261:           return physicalPage | (a & mmuPageOffsetMask);  //物理ページアドレスとページオフセットを連結する
 27262:         }
 27263:       }  //for i
 27264:     }
 27265:     return mmuTranslateCommon (a, false, false, true);
 27266:   }  //mmuTranslateReadUserCode(int)
 27267: 
 27268:   //pa = mmuTranslateReadSuperData (a)
 27269:   //  アドレス変換を行う(リードスーパーバイザデータ)
 27270:   //    pa  物理アドレス
 27271:   //    a   論理アドレス
 27272:   //  M68kException.m6eFSLWのMA,RW,SIZE,TM,IOをセットしてから呼び出すこと
 27273:   public static int mmuTranslateReadSuperData (int a) throws M68kException {
 27274:     int logicalPage = a & mmuPageAddressMask;  //論理ページアドレス
 27275:     int head = (logicalPage * MMU_HASH_COEFF >>> -MMU_HASH_BITS) * (4 * MMU_CACHE_WAYS);  //先頭のエントリ
 27276:     if (mmuSuperDataCache[head] == logicalPage) {  //リード用の論理ページアドレスと一致した
 27277:       return mmuSuperDataCache[head + 2] | (a & mmuPageOffsetMask);  //物理ページアドレスとページオフセットを連結する
 27278:     }
 27279:     if (MMU_CACHE_WAYS >= 2) {  //2ways以上
 27280:       int tail = head + (4 * MMU_CACHE_WAYS - 4);  //末尾のエントリ
 27281:       for (int i = head + 4; i <= tail; i += 4) {
 27282:         if (mmuSuperDataCache[i] == logicalPage) {  //リード用の論理ページアドレスと一致した
 27283:           //int logicalRead  = mmuSuperDataCache[i    ];
 27284:           int logicalWrite = mmuSuperDataCache[i + 1];
 27285:           int physicalPage = mmuSuperDataCache[i + 2];
 27286:           int globalFlag   = mmuSuperDataCache[i + 3];
 27287:           for (; i > head; i -= 4) {
 27288:             mmuSuperDataCache[i    ] = mmuSuperDataCache[i - 4];
 27289:             mmuSuperDataCache[i + 1] = mmuSuperDataCache[i - 3];
 27290:             mmuSuperDataCache[i + 2] = mmuSuperDataCache[i - 2];
 27291:             mmuSuperDataCache[i + 3] = mmuSuperDataCache[i - 1];
 27292:           }
 27293:           mmuSuperDataCache[i    ] = logicalPage;  //logicalRead
 27294:           mmuSuperDataCache[i + 1] = logicalWrite;
 27295:           mmuSuperDataCache[i + 2] = physicalPage;
 27296:           mmuSuperDataCache[i + 3] = globalFlag;
 27297:           return physicalPage | (a & mmuPageOffsetMask);  //物理ページアドレスとページオフセットを連結する
 27298:         }
 27299:       }  //for i
 27300:     }
 27301:     return mmuTranslateCommon (a, false, true, false);
 27302:   }  //mmuTranslateReadSuperData(int)
 27303: 
 27304:   //pa = mmuTranslateReadSuperCode (a)
 27305:   //  アドレス変換を行う(リードスーパーバイザコード)
 27306:   //    pa  物理アドレス
 27307:   //    a   論理アドレス
 27308:   //  M68kException.m6eFSLWのMA,RW,SIZE,TM,IOをセットしてから呼び出すこと
 27309:   public static int mmuTranslateReadSuperCode (int a) throws M68kException {
 27310:     int logicalPage = a & mmuPageAddressMask;  //論理ページアドレス
 27311:     int head = (logicalPage * MMU_HASH_COEFF >>> -MMU_HASH_BITS) * (4 * MMU_CACHE_WAYS);  //先頭のエントリ
 27312:     if (mmuSuperCodeCache[head] == logicalPage) {  //リード用の論理ページアドレスと一致した
 27313:       return mmuSuperCodeCache[head + 2] | (a & mmuPageOffsetMask);  //物理ページアドレスとページオフセットを連結する
 27314:     }
 27315:     if (MMU_CACHE_WAYS >= 2) {  //2ways以上
 27316:       int tail = head + (4 * MMU_CACHE_WAYS - 4);  //末尾のエントリ
 27317:       for (int i = head + 4; i <= tail; i += 4) {
 27318:         if (mmuSuperCodeCache[i] == logicalPage) {  //リード用の論理ページアドレスと一致した
 27319:           //int logicalRead  = mmuSuperCodeCache[i    ];
 27320:           int logicalWrite = mmuSuperCodeCache[i + 1];
 27321:           int physicalPage = mmuSuperCodeCache[i + 2];
 27322:           int globalFlag   = mmuSuperCodeCache[i + 3];
 27323:           for (; i > head; i -= 4) {
 27324:             mmuSuperCodeCache[i    ] = mmuSuperCodeCache[i - 4];
 27325:             mmuSuperCodeCache[i + 1] = mmuSuperCodeCache[i - 3];
 27326:             mmuSuperCodeCache[i + 2] = mmuSuperCodeCache[i - 2];
 27327:             mmuSuperCodeCache[i + 3] = mmuSuperCodeCache[i - 1];
 27328:           }
 27329:           mmuSuperCodeCache[head    ] = logicalPage;  //logicalRead
 27330:           mmuSuperCodeCache[head + 1] = logicalWrite;
 27331:           mmuSuperCodeCache[head + 2] = physicalPage;
 27332:           mmuSuperCodeCache[head + 3] = globalFlag;
 27333:           return physicalPage | (a & mmuPageOffsetMask);  //物理ページアドレスとページオフセットを連結する
 27334:         }
 27335:       }  //for i
 27336:     }
 27337:     return mmuTranslateCommon (a, false, true, true);
 27338:   }  //mmuTranslateReadSuperCode(int)
 27339: 
 27340:   //pa = mmuTranslateWriteUserData (a)
 27341:   //  アドレス変換を行う(ライトユーザデータ)
 27342:   //    pa  物理アドレス
 27343:   //    a   論理アドレス
 27344:   //  M68kException.m6eFSLWのMA,RW,SIZE,TM,IOをセットしてから呼び出すこと
 27345:   public static int mmuTranslateWriteUserData (int a) throws M68kException {
 27346:     int logicalPage = a & mmuPageAddressMask;  //論理ページアドレス
 27347:     int head = (logicalPage * MMU_HASH_COEFF >>> -MMU_HASH_BITS) * (4 * MMU_CACHE_WAYS);  //先頭のエントリ
 27348:     if (mmuUserDataCache[head + 1] == logicalPage) {  //ライト用の論理ページアドレスと一致した
 27349:       return mmuUserDataCache[head + 2] | (a & mmuPageOffsetMask);  //物理ページアドレスとページオフセットを連結する
 27350:     }
 27351:     if (MMU_CACHE_WAYS >= 2) {  //2ways以上
 27352:       int tail = head + (4 * MMU_CACHE_WAYS - 4);  //末尾のエントリ
 27353:       for (int i = head + 4; i <= tail; i += 4) {
 27354:         if (mmuUserDataCache[i + 1] == logicalPage) {  //ライト用の論理ページアドレスと一致した
 27355:           int logicalRead  = mmuUserDataCache[i    ];
 27356:           //int logicalWrite = mmuUserDataCache[i + 1];
 27357:           int physicalPage = mmuUserDataCache[i + 2];
 27358:           int globalFlag   = mmuUserDataCache[i + 3];
 27359:           for (; i > head; i -= 4) {
 27360:             mmuUserDataCache[i    ] = mmuUserDataCache[i - 4];
 27361:             mmuUserDataCache[i + 1] = mmuUserDataCache[i - 3];
 27362:             mmuUserDataCache[i + 2] = mmuUserDataCache[i - 2];
 27363:             mmuUserDataCache[i + 3] = mmuUserDataCache[i - 1];
 27364:           }
 27365:           mmuUserDataCache[i    ] = logicalRead;
 27366:           mmuUserDataCache[i + 1] = logicalPage;  //logicalWrite
 27367:           mmuUserDataCache[i + 2] = physicalPage;
 27368:           mmuUserDataCache[i + 3] = globalFlag;
 27369:           return physicalPage | (a & mmuPageOffsetMask);  //物理ページアドレスとページオフセットを連結する
 27370:         }
 27371:       }  //for i
 27372:     }
 27373:     return mmuTranslateCommon (a, true, false, false);
 27374:   }  //mmuTranslateWriteUserData(int)
 27375: 
 27376:   //pa = mmuTranslateWriteUserCode (a)
 27377:   //  アドレス変換を行う(ライトユーザコード)
 27378:   //    pa  物理アドレス
 27379:   //    a   論理アドレス
 27380:   //  M68kException.m6eFSLWのMA,RW,SIZE,TM,IOをセットしてから呼び出すこと
 27381:   public static int mmuTranslateWriteUserCode (int a) throws M68kException {
 27382:     int logicalPage = a & mmuPageAddressMask;  //論理ページアドレス
 27383:     int head = (logicalPage * MMU_HASH_COEFF >>> -MMU_HASH_BITS) * (4 * MMU_CACHE_WAYS);  //先頭のエントリ
 27384:     if (mmuUserCodeCache[head + 1] == logicalPage) {  //ライト用の論理ページアドレスと一致した
 27385:       return mmuUserCodeCache[head + 2] | (a & mmuPageOffsetMask);  //物理ページアドレスとページオフセットを連結する
 27386:     }
 27387:     if (MMU_CACHE_WAYS >= 2) {  //2ways以上
 27388:       int tail = head + (4 * MMU_CACHE_WAYS - 4);  //末尾のエントリ
 27389:       for (int i = head + 4; i <= tail; i += 4) {
 27390:         if (mmuUserCodeCache[i + 1] == logicalPage) {  //ライト用の論理ページアドレスと一致した
 27391:           int logicalRead  = mmuUserCodeCache[i    ];
 27392:           //int logicalWrite = mmuUserCodeCache[i + 1];
 27393:           int physicalPage = mmuUserCodeCache[i + 2];
 27394:           int globalFlag   = mmuUserCodeCache[i + 3];
 27395:           for (; i > head; i -= 4) {
 27396:             mmuUserCodeCache[i    ] = mmuUserCodeCache[i - 4];
 27397:             mmuUserCodeCache[i + 1] = mmuUserCodeCache[i - 3];
 27398:             mmuUserCodeCache[i + 2] = mmuUserCodeCache[i - 2];
 27399:             mmuUserCodeCache[i + 3] = mmuUserCodeCache[i - 1];
 27400:           }
 27401:           mmuUserCodeCache[head    ] = logicalRead;
 27402:           mmuUserCodeCache[head + 1] = logicalPage;  //logicalWrite
 27403:           mmuUserCodeCache[head + 2] = physicalPage;
 27404:           mmuUserCodeCache[head + 3] = globalFlag;
 27405:           return physicalPage | (a & mmuPageOffsetMask);  //物理ページアドレスとページオフセットを連結する
 27406:         }
 27407:       }  //for i
 27408:     }
 27409:     return mmuTranslateCommon (a, true, false, true);
 27410:   }  //mmuTranslateWriteUserCode(int)
 27411: 
 27412:   //pa = mmuTranslateWriteSuperData (a)
 27413:   //  アドレス変換を行う(ライトスーパーバイザデータ)
 27414:   //    pa  物理アドレス
 27415:   //    a   論理アドレス
 27416:   //  M68kException.m6eFSLWのMA,RW,SIZE,TM,IOをセットしてから呼び出すこと
 27417:   public static int mmuTranslateWriteSuperData (int a) throws M68kException {
 27418:     int logicalPage = a & mmuPageAddressMask;  //論理ページアドレス
 27419:     int head = (logicalPage * MMU_HASH_COEFF >>> -MMU_HASH_BITS) * (4 * MMU_CACHE_WAYS);  //先頭のエントリ
 27420:     if (mmuSuperDataCache[head + 1] == logicalPage) {  //ライト用の論理ページアドレスと一致した
 27421:       return mmuSuperDataCache[head + 2] | (a & mmuPageOffsetMask);  //物理ページアドレスとページオフセットを連結する
 27422:     }
 27423:     if (MMU_CACHE_WAYS >= 2) {  //2ways以上
 27424:       int tail = head + (4 * MMU_CACHE_WAYS - 4);  //末尾のエントリ
 27425:       for (int i = head + 4; i <= tail; i += 4) {
 27426:         if (mmuSuperDataCache[i + 1] == logicalPage) {  //ライト用の論理ページアドレスと一致した
 27427:           int logicalRead  = mmuSuperDataCache[i    ];
 27428:           //int logicalWrite = mmuSuperDataCache[i + 1];
 27429:           int physicalPage = mmuSuperDataCache[i + 2];
 27430:           int globalFlag   = mmuSuperDataCache[i + 3];
 27431:           for (; i > head; i -= 4) {
 27432:             mmuSuperDataCache[i    ] = mmuSuperDataCache[i - 4];
 27433:             mmuSuperDataCache[i + 1] = mmuSuperDataCache[i - 3];
 27434:             mmuSuperDataCache[i + 2] = mmuSuperDataCache[i - 2];
 27435:             mmuSuperDataCache[i + 3] = mmuSuperDataCache[i - 1];
 27436:           }
 27437:           mmuSuperDataCache[i    ] = logicalRead;
 27438:           mmuSuperDataCache[i + 1] = logicalPage;  //logicalWrite
 27439:           mmuSuperDataCache[i + 2] = physicalPage;
 27440:           mmuSuperDataCache[i + 3] = globalFlag;
 27441:           return physicalPage | (a & mmuPageOffsetMask);  //物理ページアドレスとページオフセットを連結する
 27442:         }
 27443:       }  //for i
 27444:     }
 27445:     return mmuTranslateCommon (a, true, true, false);
 27446:   }  //mmuTranslateWriteSuperData(int)
 27447: 
 27448:   //pa = mmuTranslateWriteSuperCode (a)
 27449:   //  アドレス変換を行う(ライトスーパーバイザコード)
 27450:   //    pa  物理アドレス
 27451:   //    a   論理アドレス
 27452:   //  M68kException.m6eFSLWのMA,RW,SIZE,TM,IOをセットしてから呼び出すこと
 27453:   public static int mmuTranslateWriteSuperCode (int a) throws M68kException {
 27454:     int logicalPage = a & mmuPageAddressMask;  //論理ページアドレス
 27455:     int head = (logicalPage * MMU_HASH_COEFF >>> -MMU_HASH_BITS) * (4 * MMU_CACHE_WAYS);  //先頭のエントリ
 27456:     if (mmuSuperCodeCache[head + 1] == logicalPage) {  //ライト用の論理ページアドレスと一致した
 27457:       return mmuSuperCodeCache[head + 2] | (a & mmuPageOffsetMask);  //物理ページアドレスとページオフセットを連結する
 27458:     }
 27459:     if (MMU_CACHE_WAYS >= 2) {  //2ways以上
 27460:       int tail = head + (4 * MMU_CACHE_WAYS - 4);  //末尾のエントリ
 27461:       for (int i = head + 4; i <= tail; i += 4) {
 27462:         if (mmuSuperCodeCache[i + 1] == logicalPage) {  //ライト用の論理ページアドレスと一致した
 27463:           int logicalRead  = mmuSuperCodeCache[i    ];
 27464:           //int logicalWrite = mmuSuperCodeCache[i + 1];
 27465:           int physicalPage = mmuSuperCodeCache[i + 2];
 27466:           int globalFlag   = mmuSuperCodeCache[i + 3];
 27467:           for (; i > head; i -= 4) {
 27468:             mmuSuperCodeCache[i    ] = mmuSuperCodeCache[i - 4];
 27469:             mmuSuperCodeCache[i + 1] = mmuSuperCodeCache[i - 3];
 27470:             mmuSuperCodeCache[i + 2] = mmuSuperCodeCache[i - 2];
 27471:             mmuSuperCodeCache[i + 3] = mmuSuperCodeCache[i - 1];
 27472:           }
 27473:           mmuSuperCodeCache[head    ] = logicalRead;
 27474:           mmuSuperCodeCache[head + 1] = logicalPage;  //logicalWrite
 27475:           mmuSuperCodeCache[head + 2] = physicalPage;
 27476:           mmuSuperCodeCache[head + 3] = globalFlag;
 27477:           return physicalPage | (a & mmuPageOffsetMask);  //物理ページアドレスとページオフセットを連結する
 27478:         }
 27479:       }  //for i
 27480:     }
 27481:     return mmuTranslateCommon (a, true, true, true);
 27482:   }  //mmuTranslateWriteSuperCode(int)
 27483: 
 27484:   //pa = mmuTranslateCommon (a, write, supervisor, instruction)
 27485:   //  透過変換とテーブルサーチを行い、アドレス変換キャッシュ更新する
 27486:   //  アドレス変換キャッシュがミスしたときに呼び出す
 27487:   //    pa           物理アドレス
 27488:   //    a            論理アドレス
 27489:   //    write        true=ライト,false=リード
 27490:   //    supervisor   true=スーパーバイザ,false=ユーザ。通常はXEiJ.regSRS!=0、PLPAR/PLPAWでは(XEiJ.mpuDFC&4)!=0
 27491:   //    instruction  true=命令,false=データ。通常は命令フェッチまたは拡張ワードのときtrue、PLPAR/PLPAWでは(XEiJ.mpuDFC&2)!=0
 27492:   //  M68kException.m6eFSLWのMA,RW,SIZE,TM,IOをセットしてから呼び出すこと
 27493:   public static int mmuTranslateCommon (int a, boolean write, boolean supervisor, boolean instruction) throws M68kException {
 27494:     if (MMU_DEBUG_TRANSLATION) {
 27495:       System.out.printf ("%08x mmuTranslateCommon(0x%08x,%b,%b,%b)", XEiJ.regPC0, a, write, supervisor, instruction);
 27496:     }
 27497:     int logicalPage = a & mmuPageAddressMask;  //リード用の論理ページアドレス
 27498:     int logicalWrite;  //ライト用の論理ページアドレス
 27499:     int physicalPage;  //物理ページアドレス
 27500:     int globalFlag;  //グローバルフラグ。-1=Global,0=NonGlobal
 27501:     int pa;  //物理アドレス
 27502:     //透過変換
 27503:     //  透過変換はスーパーバイザモードかどうかを条件にすることができる(しないこともできる)
 27504:     //    条件が合わなければヒットしないだけで、スーパーバイザプロテクトのアクセスフォルトになならない
 27505:     //  透過変換をアドレス変換キャッシュに乗せる場合
 27506:     //    アドレス変換キャッシュがヒットしてバスエラーが発生したとき
 27507:     //      透過変換かどうかを再確認してFSLWのTTRをセットしなければならない
 27508:     //    透過変換レジスタが操作されたとき
 27509:     //      OFF→ONの領域だけでなくON→OFFの領域もフラッシュしなければならない
 27510:     //      透過変換レジスタを頻繁に操作されると重くなるかも知れない
 27511:     int tt = (supervisor ?
 27512:               instruction ? mmuSuperCodeTransparent : mmuSuperDataTransparent :
 27513:               instruction ? mmuUserCodeTransparent : mmuUserDataTransparent)[a >>> 24];
 27514:     if (tt != 0) {  //透過変換あり
 27515:       M68kException.m6eFSLW |= M68kException.M6E_FSLW_TRANSPARENT;
 27516:       if (write &&  //ライトで
 27517:           tt < 0) {  //透過変換によるライトプロテクト
 27518:         if (MMU_DEBUG_TRANSLATION) {
 27519:           System.out.printf (" write protected by transparent translation\n", a);
 27520:         }
 27521:         M68kException.m6eFSLW |= M68kException.M6E_FSLW_WRITE_PROTECT;
 27522:         M68kException.m6eNumber = M68kException.M6E_ACCESS_FAULT;
 27523:         M68kException.m6eAddress = a;
 27524:         throw M68kException.m6eSignal;
 27525:       }
 27526:       logicalWrite = logicalPage;  //ライト用の論理ページアドレス
 27527:       physicalPage = logicalPage;  //物理ページアドレス
 27528:       globalFlag = -1;  //グローバルフラグ。-1=Global,0=NonGlobal
 27529:       pa = a;
 27530:       if (MMU_DEBUG_TRANSLATION) {
 27531:         System.out.printf ("=0x%08x (transparent translation)\n", pa);
 27532:       }
 27533:     } else if (mmuEnabled) {  //透過変換なし、アドレス変換あり
 27534:       //テーブルサーチ
 27535:       //  スーパーバイザプロテクトまたはライトプロテクトで停止したときディスクリプタの使用済みフラグはセットされない
 27536:       //  リードモディファイライトはライトでアロケートするのでリードする前にライトプロテクトに引っかかる
 27537:       //    例えばROMの内容をインクリメントしようとしたときライトだけでなくリードも行われない
 27538:       M68kException.m6eFSLW |= M68kException.M6E_FSLW_TABLE_SEARCH;
 27539:       //ルートテーブル
 27540:       int rootDescriptorAddress = (supervisor ? mmuSRP : mmuURP) + ((a & MMU_ROOT_INDEX_MASK) >>> MMU_ROOT_INDEX_BIT0 - 2);  //ルートテーブルディスクリプタのアドレス
 27541:       MemoryMappedDevice rootDescriptorDevice = (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[rootDescriptorAddress >>> XEiJ.BUS_PAGE_BITS];
 27542:       int rootDescriptor = rootDescriptorDevice.mmdRls (rootDescriptorAddress);  //ルートテーブルディスクリプタ
 27543:       if ((rootDescriptor & MMU_DESCRIPTOR_UDT) == MMU_DESCRIPTOR_TYPE_INVALID) {  //ディスクリプタが無効のとき
 27544:         if (MMU_DEBUG_TRANSLATION) {
 27545:           System.out.printf (" invalid root descriptor 0x%08x at 0x%08x\n", rootDescriptor, rootDescriptorAddress);
 27546:         }
 27547:         M68kException.m6eFSLW ^= M68kException.M6E_FSLW_TABLE_SEARCH ^ M68kException.M6E_FSLW_ROOT_DESCRIPTOR;
 27548:         M68kException.m6eNumber = M68kException.M6E_ACCESS_FAULT;
 27549:         M68kException.m6eAddress = a;
 27550:         throw M68kException.m6eSignal;
 27551:       }
 27552:       if (write &&  //ライトで
 27553:           (rootDescriptor & MMU_DESCRIPTOR_WRITE_PROTECTED) != 0) {  //ライトプロテクトされているとき
 27554:         if (MMU_DEBUG_TRANSLATION) {
 27555:           System.out.printf (" write protected by root descriptor 0x%08x at 0x%08x\n", rootDescriptor, rootDescriptorAddress);
 27556:         }
 27557:         M68kException.m6eFSLW ^= M68kException.M6E_FSLW_TABLE_SEARCH ^ M68kException.M6E_FSLW_WRITE_PROTECT;
 27558:         M68kException.m6eNumber = M68kException.M6E_ACCESS_FAULT;
 27559:         M68kException.m6eAddress = a;
 27560:         throw M68kException.m6eSignal;
 27561:       }
 27562:       if ((rootDescriptor & MMU_DESCRIPTOR_USED) == 0) {  //ディスクリプタが未使用のとき
 27563:         rootDescriptor |= MMU_DESCRIPTOR_USED;  //使用済み
 27564:         rootDescriptorDevice.mmdWl (rootDescriptorAddress, rootDescriptor);
 27565:       }
 27566:       //ポインタテーブル
 27567:       int pointerDescriptorAddress = (rootDescriptor & MMU_DESCRIPTOR_POINTER_TABLE_ADDRESS) + ((a & MMU_POINTER_INDEX_MASK) >>> MMU_POINTER_INDEX_BIT0 - 2);  //ポインタテーブルディスクリプタのアドレス
 27568:       MemoryMappedDevice pointerDescriptorDevice = (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[pointerDescriptorAddress >>> XEiJ.BUS_PAGE_BITS];
 27569:       int pointerDescriptor = pointerDescriptorDevice.mmdRls (pointerDescriptorAddress);  //ポインタテーブルディスクリプタ
 27570:       if ((pointerDescriptor & MMU_DESCRIPTOR_UDT) == MMU_DESCRIPTOR_TYPE_INVALID) {  //ディスクリプタが無効のとき
 27571:         if (MMU_DEBUG_TRANSLATION) {
 27572:           System.out.printf (" invalid pointer descriptor 0x%08x at 0x%08x\n", pointerDescriptor, pointerDescriptorAddress);
 27573:         }
 27574:         M68kException.m6eFSLW ^= M68kException.M6E_FSLW_TABLE_SEARCH ^ M68kException.M6E_FSLW_POINTER_DESCRIPTOR;
 27575:         M68kException.m6eNumber = M68kException.M6E_ACCESS_FAULT;
 27576:         M68kException.m6eAddress = a;
 27577:         throw M68kException.m6eSignal;
 27578:       }
 27579:       if (write &&  //ライトで
 27580:           (pointerDescriptor & MMU_DESCRIPTOR_WRITE_PROTECTED) != 0) {  //ライトプロテクトされているとき
 27581:         if (MMU_DEBUG_TRANSLATION) {
 27582:           System.out.printf (" write protected by pointer descriptor 0x%08x at 0x%08x\n", pointerDescriptor, pointerDescriptorAddress);
 27583:         }
 27584:         M68kException.m6eFSLW ^= M68kException.M6E_FSLW_TABLE_SEARCH ^ M68kException.M6E_FSLW_WRITE_PROTECT;
 27585:         M68kException.m6eNumber = M68kException.M6E_ACCESS_FAULT;
 27586:         M68kException.m6eAddress = a;
 27587:         throw M68kException.m6eSignal;
 27588:       }
 27589:       if ((pointerDescriptor & MMU_DESCRIPTOR_USED) == 0) {  //ディスクリプタが未使用のとき
 27590:         pointerDescriptor |= MMU_DESCRIPTOR_USED;  //使用済み
 27591:         pointerDescriptorDevice.mmdWl (pointerDescriptorAddress, pointerDescriptor);
 27592:       }
 27593:       //ページテーブル
 27594:       int pageDescriptorAddress = (pointerDescriptor & mmuPageTableMask) + ((a & mmuPageIndexMask) >>> mmuPageIndexBit2);  //ページテーブルディスクリプタのアドレス
 27595:       MemoryMappedDevice pageDescriptorDevice = (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[pageDescriptorAddress >>> XEiJ.BUS_PAGE_BITS];
 27596:       int pageDescriptor = pageDescriptorDevice.mmdRls (pageDescriptorAddress);  //ページテーブルディスクリプタ
 27597:       if ((pageDescriptor & MMU_DESCRIPTOR_PDT) == MMU_DESCRIPTOR_TYPE_INVALID) {  //ディスクリプタが無効のとき
 27598:         if (MMU_DEBUG_TRANSLATION) {
 27599:           System.out.printf (" invalid page descriptor 0x%08x at 0x%08x\n", pageDescriptor, pageDescriptorAddress);
 27600:         }
 27601:         M68kException.m6eFSLW ^= M68kException.M6E_FSLW_TABLE_SEARCH ^ M68kException.M6E_FSLW_PAGE_FAULT;
 27602:         M68kException.m6eNumber = M68kException.M6E_ACCESS_FAULT;
 27603:         M68kException.m6eAddress = a;
 27604:         throw M68kException.m6eSignal;
 27605:       }
 27606:       if ((pageDescriptor & MMU_DESCRIPTOR_PDT) == MMU_DESCRIPTOR_TYPE_INDIRECT) {  //ディスクリプタが間接のとき
 27607:         pageDescriptorAddress = pageDescriptor & MMU_DESCRIPTOR_INDIRECT_ADDRESS;  //ページテーブルディスクリプタのアドレス
 27608:         pageDescriptorDevice = (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[pageDescriptorAddress >>> XEiJ.BUS_PAGE_BITS];
 27609:         pageDescriptor = pageDescriptorDevice.mmdRls (pageDescriptorAddress);  //ページテーブルディスクリプタ
 27610:         if ((pageDescriptor & MMU_DESCRIPTOR_PDT) == MMU_DESCRIPTOR_TYPE_INVALID) {  //ディスクリプタが無効のとき
 27611:           if (MMU_DEBUG_TRANSLATION) {
 27612:             System.out.printf (" invalid page descriptor 0x%08x at 0x%08x\n", pageDescriptor, pageDescriptorAddress);
 27613:           }
 27614:           M68kException.m6eFSLW ^= M68kException.M6E_FSLW_TABLE_SEARCH ^ M68kException.M6E_FSLW_PAGE_FAULT;
 27615:           M68kException.m6eNumber = M68kException.M6E_ACCESS_FAULT;
 27616:           M68kException.m6eAddress = a;
 27617:           throw M68kException.m6eSignal;
 27618:         }
 27619:         if ((pageDescriptor & MMU_DESCRIPTOR_PDT) == MMU_DESCRIPTOR_TYPE_INDIRECT) {  //ディスクリプタが二重間接のとき
 27620:           if (MMU_DEBUG_TRANSLATION) {
 27621:             System.out.printf (" indirect page descriptor 0x%08x at 0x%08x\n", pageDescriptor, pageDescriptorAddress);
 27622:           }
 27623:           M68kException.m6eFSLW ^= M68kException.M6E_FSLW_TABLE_SEARCH ^ M68kException.M6E_FSLW_INDIRECT_LEVEL;
 27624:           M68kException.m6eNumber = M68kException.M6E_ACCESS_FAULT;
 27625:           M68kException.m6eAddress = a;
 27626:           throw M68kException.m6eSignal;
 27627:         }
 27628:       }
 27629:       if (!supervisor &&  //ユーザモードで
 27630:           (pageDescriptor & MMU_DESCRIPTOR_SUPERVISOR_PROTECTED) != 0) {  //スーパーバイザプロテクトされているとき
 27631:         if (MMU_DEBUG_TRANSLATION) {
 27632:           System.out.printf (" supervisor protected by page descriptor 0x%08x at 0x%08x\n", pageDescriptor, pageDescriptorAddress);
 27633:         }
 27634:         M68kException.m6eFSLW ^= M68kException.M6E_FSLW_TABLE_SEARCH ^ M68kException.M6E_FSLW_SUPERVISOR_PROTECT;
 27635:         M68kException.m6eNumber = M68kException.M6E_ACCESS_FAULT;
 27636:         M68kException.m6eAddress = a;
 27637:         throw M68kException.m6eSignal;
 27638:       }
 27639:       if (write &&  //ライトで
 27640:           (pageDescriptor & MMU_DESCRIPTOR_WRITE_PROTECTED) != 0) {  //ライトプロテクトされているとき
 27641:         if (MMU_DEBUG_TRANSLATION) {
 27642:           System.out.printf (" write protected by page descriptor 0x%08x at 0x%08x\n", pageDescriptor, pageDescriptorAddress);
 27643:         }
 27644:         M68kException.m6eFSLW ^= M68kException.M6E_FSLW_TABLE_SEARCH ^ M68kException.M6E_FSLW_WRITE_PROTECT;
 27645:         M68kException.m6eNumber = M68kException.M6E_ACCESS_FAULT;
 27646:         M68kException.m6eAddress = a;
 27647:         throw M68kException.m6eSignal;
 27648:       }
 27649:       if ((pageDescriptor & MMU_DESCRIPTOR_USED) == 0) {  //ディスクリプタが未使用のとき
 27650:         pageDescriptor |= MMU_DESCRIPTOR_USED;  //使用済みにする
 27651:         pageDescriptorDevice.mmdWl (pageDescriptorAddress, pageDescriptor);
 27652:       }
 27653:       if (write &&  //ライトで
 27654:           (pageDescriptor & MMU_DESCRIPTOR_MODIFIED) == 0) {  //修正済みでないとき
 27655:         pageDescriptor |= MMU_DESCRIPTOR_MODIFIED;  //修正済みにする
 27656:         pageDescriptorDevice.mmdWl (pageDescriptorAddress, pageDescriptor);
 27657:       }
 27658:       //テーブルサーチ終了
 27659:       M68kException.m6eFSLW &= ~M68kException.M6E_FSLW_TABLE_SEARCH;
 27660:       //logicalWrite = (pageDescriptor & (MMU_DESCRIPTOR_MODIFIED | MMU_DESCRIPTOR_WRITE_PROTECTED)) == MMU_DESCRIPTOR_MODIFIED ? logicalPage : 1;  //ライト用の論理ページアドレス。修正済みかつライトプロテクトされていないときだけ有効
 27661:       logicalWrite = (pageDescriptor & MMU_DESCRIPTOR_WRITE_PROTECTED) == 0 ? logicalPage : 1;  //ライト用の論理ページアドレス。ライトプロテクトされていないときだけ有効
 27662:       physicalPage = pageDescriptor & mmuPageAddressMask;  //物理ページアドレス
 27663:       globalFlag = (pageDescriptor & MMU_DESCRIPTOR_GLOBAL) != 0 ? -1 : 0;  //グローバルフラグ。-1=Global,0=NonGlobal
 27664:       pa = physicalPage | a & mmuPageOffsetMask;  //物理ページアドレスとページオフセットを連結する
 27665:       if (MMU_DEBUG_TRANSLATION) {
 27666:         System.out.printf ("=0x%08x (table search)\n", pa);
 27667:         System.out.printf ("  rootTable=0x%08x\n", supervisor ? mmuSRP : mmuURP);
 27668:         System.out.printf ("  rootIndex=0x%08x\n", (a & MMU_ROOT_INDEX_MASK) >>> MMU_ROOT_INDEX_BIT0);
 27669:         System.out.printf ("  rootDescriptorAddress=0x%08x\n", rootDescriptorAddress);
 27670:         System.out.printf ("  rootDescriptor=0x%08x\n", rootDescriptor);
 27671:         System.out.printf ("  pointerTable=0x%08x\n", rootDescriptor & MMU_DESCRIPTOR_POINTER_TABLE_ADDRESS);
 27672:         System.out.printf ("  pointerIndex=0x%08x\n", (a & MMU_POINTER_INDEX_MASK) >>> MMU_POINTER_INDEX_BIT0);
 27673:         System.out.printf ("  pointerDescriptorAddress=0x%08x\n", pointerDescriptorAddress);
 27674:         System.out.printf ("  pointerDescriptor=0x%08x\n", pointerDescriptor);
 27675:         System.out.printf ("  pageTable=0x%08x\n", pointerDescriptor & mmuPageTableMask);
 27676:         System.out.printf ("  pageIndex=0x%08x\n", (a & mmuPageIndexMask) >>> mmuPageIndexBit2 + 2);
 27677:         System.out.printf ("  pageDescriptorAddress=0x%08x\n", pageDescriptorAddress);
 27678:         System.out.printf ("  pageDescriptor=0x%08x\n", pageDescriptor);
 27679:       }
 27680:     } else {  //透過変換なし、アドレス変換なし
 27681:       logicalWrite = logicalPage;  //ライト用の論理ページアドレス
 27682:       physicalPage = logicalPage;  //物理ページアドレス
 27683:       globalFlag = -1;  //グローバルフラグ。-1=Global,0=NonGlobal
 27684:       pa = a;
 27685:       if (MMU_DEBUG_TRANSLATION) {
 27686:         System.out.printf ("=0x%08x (no translation)\n", pa);
 27687:       }
 27688:     }
 27689:     if (!(MMU_NOT_ALLOCATE_CACHE ||
 27690:           (instruction ? mmuNotAllocateCode : mmuNotAllocateData))) {
 27691:       //アドレス変換キャッシュを更新する
 27692:       //  同じ論理ページアドレスのエントリが存在する場合
 27693:       //    (リードでアロケートしたとき修正済みでなかったためライトでアロケートしなかった場合)
 27694:       //    同じ論理ページアドレスのエントリよりも前にあるエントリを後ろにずらす
 27695:       //    空いた先頭のエントリに上書きする
 27696:       //  同じ論理ページアドレスのエントリが存在しない場合
 27697:       //    末尾以外のエントリを後ろにずらす
 27698:       //    空いた先頭のエントリに上書きする
 27699:       int[] cache = (supervisor ?
 27700:                      instruction ? mmuSuperCodeCache : mmuSuperDataCache :
 27701:                      instruction ? mmuUserCodeCache : mmuUserDataCache);
 27702:       int head = (logicalPage * MMU_HASH_COEFF >>> -MMU_HASH_BITS) * (4 * MMU_CACHE_WAYS);  //先頭のエントリ
 27703:       if (MMU_CACHE_WAYS >= 2) {  //2ways以上のとき
 27704:         int tail = head + (4 * MMU_CACHE_WAYS - 4);  //末尾のエントリ→捨てるエントリ
 27705:         if (write) {  //ライトのとき
 27706:           for (int i = head; i < tail; i += 4) {
 27707:             if (cache[i] == logicalPage) {  //リードでアロケートされていた
 27708:               tail = i;
 27709:               break;
 27710:             }
 27711:           }
 27712:         }
 27713:         //  捨てるエントリよりも前にあるエントリを後ろにずらす
 27714:         for (; tail > head; tail -= 4) {
 27715:           cache[tail    ] = cache[tail - 4];
 27716:           cache[tail + 1] = cache[tail - 3];
 27717:           cache[tail + 2] = cache[tail - 2];
 27718:           cache[tail + 3] = cache[tail - 1];
 27719:         }
 27720:       }
 27721:       //  先頭のエントリに上書きする
 27722:       cache[head    ] = logicalPage;  //リード用の論理ページアドレス
 27723:       cache[head + 1] = logicalWrite;  //ライト用の論理ページアドレス
 27724:       cache[head + 2] = physicalPage;  //物理ページアドレス
 27725:       cache[head + 3] = globalFlag;  //グローバルフラグ
 27726:       if (MMU_DEBUG_TRANSLATION) {
 27727:         System.out.printf ("  ATC[%d]={0x%08x,0x%08x,0x%08x,%d}\n",
 27728:                            head / (4 * MMU_CACHE_WAYS), logicalPage, logicalWrite, physicalPage, globalFlag);
 27729:       }
 27730:     }
 27731:     return pa;
 27732:   }  //mmuTranslateCommon(int,boolean,boolean,boolean)
 27733: 
 27734:   public static int mmuPeekFlags;
 27735: 
 27736:   //pa = mmuTranslatePeek (a, supervisor, instruction) {
 27737:   //  アドレス変換を行う(デバッガ用、例外なし、テーブル更新なし)
 27738:   //    pa           物理アドレス。a^1=エラー
 27739:   //    a            論理アドレス
 27740:   //    supervisor   0=ユーザ,0以外=スーパーバイザ。通常はXEiJ.regSRS、PLPAR/PLPAWではXEiJ.mpuDFC&4
 27741:   //    instruction  0=データ,0以外=命令。通常は命令フェッチまたは拡張ワードのとき1、PLPAR/PLPAWではXEiJ.mpuDFC&2
 27742:   public static int mmuTranslatePeek (int a, int supervisor, int instruction) {
 27743:     //透過変換の確認
 27744:     //  透過変換はスーパーバイザモードかどうかを条件にすることができる(しないこともできる)
 27745:     //  透過変換にスーパーバイザプロテクトの機能はない
 27746:     {
 27747:       int[] tta = new int[2];
 27748:       if (instruction != 0) {
 27749:         tta[0] = mmuITT0;
 27750:         tta[1] = mmuITT1;
 27751:       } else {
 27752:         tta[0] = mmuDTT0;
 27753:         tta[1] = mmuDTT1;
 27754:       }
 27755:       for (int i = 0; i < 2; i++) {
 27756:         int ttr = tta[i];
 27757:         if ((ttr & 0x8000) != 0 &&  //Enable
 27758:             ((ttr & 0x4000) != 0 || ((ttr & 0x2000) != 0) == (supervisor != 0)) &&
 27759:             ((a ^ ttr) & ~ttr << 8) >>> 24 == 0) {
 27760:           mmuPeekFlags = ttr & MMU_TTR_WRITE_PROTECT;
 27761:           return a;
 27762:         }
 27763:       }
 27764:     }
 27765:     //透過変換なし
 27766:     if (!mmuEnabled) {  //アドレス変換なし
 27767:       mmuPeekFlags = 0;
 27768:       return a;
 27769:     }
 27770:     //アドレス変換あり
 27771:     int logicalPage = a & mmuPageAddressMask;  //論理ページアドレス
 27772:     //テーブルサーチ開始
 27773:     //  スーパーバイザプロテクトまたはライトプロテクトで停止したときディスクリプタの使用済みフラグはセットされない
 27774:     //  リードモディファイライトはライトでアロケートするのでリードする前にライトプロテクトに引っかかる
 27775:     //    例えばROMの内容をインクリメントしようとしたときライトだけでなくリードも行われない
 27776:     //ルートテーブル
 27777:     int rootDescriptorAddress = (supervisor != 0 ? mmuSRP : mmuURP) + ((a & MMU_ROOT_INDEX_MASK) >>> MMU_ROOT_INDEX_BIT0 - 2);  //ルートテーブルディスクリプタのアドレス
 27778:     int rootDescriptor = XEiJ.busPlsf (rootDescriptorAddress);  //ルートテーブルディスクリプタ
 27779:     if ((rootDescriptor & MMU_DESCRIPTOR_UDT) == MMU_DESCRIPTOR_TYPE_INVALID) {  //ディスクリプタが無効のとき
 27780:       return a ^ 1;
 27781:     }
 27782:     //ポインタテーブル
 27783:     int pointerDescriptorAddress = (rootDescriptor & MMU_DESCRIPTOR_POINTER_TABLE_ADDRESS) + ((a & MMU_POINTER_INDEX_MASK) >>> MMU_POINTER_INDEX_BIT0 - 2);  //ポインタテーブルディスクリプタのアドレス
 27784:     int pointerDescriptor = XEiJ.busPlsf (pointerDescriptorAddress);  //ポインタテーブルディスクリプタ
 27785:     if ((pointerDescriptor & MMU_DESCRIPTOR_UDT) == MMU_DESCRIPTOR_TYPE_INVALID) {  //ディスクリプタが無効のとき
 27786:       return a ^ 1;
 27787:     }
 27788:     //ページテーブル
 27789:     int pageDescriptorAddress = (pointerDescriptor & mmuPageTableMask) + ((a & mmuPageIndexMask) >>> mmuPageIndexBit2);  //ページテーブルディスクリプタのアドレス
 27790:     int pageDescriptor = XEiJ.busPlsf (pageDescriptorAddress);  //ページテーブルディスクリプタ
 27791:     if ((pageDescriptor & MMU_DESCRIPTOR_PDT) == MMU_DESCRIPTOR_TYPE_INVALID) {  //ディスクリプタが無効のとき
 27792:       return a ^ 1;
 27793:     }
 27794:     if ((pageDescriptor & MMU_DESCRIPTOR_PDT) == MMU_DESCRIPTOR_TYPE_INDIRECT) {  //ディスクリプタが間接のとき
 27795:       pageDescriptorAddress = pageDescriptor & MMU_DESCRIPTOR_INDIRECT_ADDRESS;  //ページテーブルディスクリプタのアドレス
 27796:       pageDescriptor = XEiJ.busPlsf (pageDescriptorAddress);  //ページテーブルディスクリプタ
 27797:       if ((pageDescriptor & MMU_DESCRIPTOR_PDT) == MMU_DESCRIPTOR_TYPE_INVALID) {  //ディスクリプタが無効のとき
 27798:         return a ^ 1;
 27799:       }
 27800:       if ((pageDescriptor & MMU_DESCRIPTOR_PDT) == MMU_DESCRIPTOR_TYPE_INDIRECT) {  //ディスクリプタが二重間接のとき
 27801:         return a ^ 1;
 27802:       }
 27803:     }
 27804:     if (supervisor == 0 &&  //ユーザモードで
 27805:         (pageDescriptor & MMU_DESCRIPTOR_SUPERVISOR_PROTECTED) != 0) {  //スーパーバイザプロテクトされているとき
 27806:       return a ^ 1;
 27807:     }
 27808:     int physicalPage = pageDescriptor & mmuPageAddressMask;  //物理ページアドレス
 27809:     //テーブルサーチ終了
 27810:     mmuPeekFlags = pageDescriptor & (MMU_DESCRIPTOR_SUPERVISOR_PROTECTED |
 27811:                                      MMU_DESCRIPTOR_MODIFIED |
 27812:                                      MMU_DESCRIPTOR_USED |
 27813:                                      MMU_DESCRIPTOR_WRITE_PROTECTED);
 27814:     return physicalPage | a & mmuPageOffsetMask;  //物理ページアドレスとページオフセットを連結する
 27815:   }  //mmuTranslatePeek(int,int,int)
 27816: 
 27817: 
 27818: 
 27819: }  //class MC68060
 27820: 
 27821: 
 27822: