1: //======================================================================================== 2: // MC68060.java 3: // en:MC68060 core 4: // ja:MC68060コア 5: // Copyright (C) 2003-2025 Makoto Kamada 6: // 7: // This file is part of the XEiJ (X68000 Emulator in Java). 8: // You can use, modify and redistribute the XEiJ if the conditions are met. 9: // Read the XEiJ License for more details. 10: // https://stdkmd.net/xeij/ 11: //======================================================================================== 12: 13: package xeij; 14: 15: import java.lang.*; //Boolean,Character,Class,Comparable,Double,Exception,Float,IllegalArgumentException,Integer,Long,Math,Number,Object,Runnable,SecurityException,String,StringBuilder,System 16: import java.util.*; //ArrayList,Arrays,Calendar,GregorianCalendar,HashMap,Map,Map.Entry,Timer,TimerTask,TreeMap 17: 18: public class MC68060 { 19: 20: public static void mpuCore () { 21: 22: //例外ループ 23: // 別のメソッドで検出された例外を命令ループの外側でcatchすることで命令ループを高速化する 24: errorLoop: 25: while (XEiJ.mpuClockTime < XEiJ.mpuClockLimit) { 26: try { 27: //命令ループ 28: while (XEiJ.mpuClockTime < XEiJ.mpuClockLimit) { 29: int t; 30: //命令を実行する 31: m60Incremented = 0L; //アドレスレジスタの増分 32: XEiJ.mpuTraceFlag = XEiJ.regSRT1; //命令実行前のsrT1 33: XEiJ.mpuCycleCount = 0; //第1オペコードからROMのアクセスウエイトを有効にする。命令のサイクル数はすべてXEiJ.mpuCycleCount+=～で加えること 34: XEiJ.regPC0 = t = m60Address = XEiJ.regPC; //命令の先頭アドレス 35: XEiJ.regPC = t + 2; 36: //XEiJ.regOC = mmuReadWordZeroOpword (t, XEiJ.regSRS); //第1オペコード。必ずゼロ拡張すること。pcに奇数が入っていることはないのでアドレスエラーのチェックを省略する 37: if (XEiJ.regSRS != 0) { //スーパーバイザモード 38: m60FSLW = M60_FSLW_IOMA_OPWORD | M60_FSLW_RW_READ | M60_FSLW_SIZE_WORD | M60_FSLW_TM_SUPER_CODE; 39: t = mmuTranslateReadSuperCode (t); 40: XEiJ.regOC = (InstructionBreakPoint.IBP_ON ? InstructionBreakPoint.ibpOp1SuperMap : DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdRwz (t); 41: } else { //ユーザモード 42: m60FSLW = M60_FSLW_IOMA_OPWORD | M60_FSLW_RW_READ | M60_FSLW_SIZE_WORD | M60_FSLW_TM_USER_CODE; 43: t = mmuTranslateReadUserCode (t); 44: XEiJ.regOC = (InstructionBreakPoint.IBP_ON ? InstructionBreakPoint.ibpOp1UserMap : DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdRwz (t); 45: } 46: 47: //命令の処理 48: // 第1オペコードの上位10ビットで分岐する 49: irpSwitch: 50: switch (XEiJ.regOC >>> 6) { //第1オペコードの上位10ビット。XEiJ.regOCはゼロ拡張されているので0b1111_111_111&を省略 51: 52: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 53: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 54: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 55: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 56: //ORI.B #<data>,<ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |0000_000_000_mmm_rrr-{data} 57: //OR.B #<data>,<ea> |A|012346|-|-UUUU|-**00| M+-WXZ |0000_000_000_mmm_rrr-{data} [ORI.B #<data>,<ea>] 58: //ORI.B #<data>,CCR |-|012346|-|*****|*****| |0000_000_000_111_100-{data} 59: case 0b0000_000_000: 60: irpOriByte (); 61: break irpSwitch; 62: 63: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 64: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 65: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 66: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 67: //ORI.W #<data>,<ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |0000_000_001_mmm_rrr-{data} 68: //OR.W #<data>,<ea> |A|012346|-|-UUUU|-**00| M+-WXZ |0000_000_001_mmm_rrr-{data} [ORI.W #<data>,<ea>] 69: //ORI.W #<data>,SR |-|012346|P|*****|*****| |0000_000_001_111_100-{data} 70: case 0b0000_000_001: 71: irpOriWord (); 72: break irpSwitch; 73: 74: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 75: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 76: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 77: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 78: //ORI.L #<data>,<ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |0000_000_010_mmm_rrr-{data} 79: //OR.L #<data>,<ea> |A|012346|-|-UUUU|-**00| M+-WXZ |0000_000_010_mmm_rrr-{data} [ORI.L #<data>,<ea>] 80: case 0b0000_000_010: 81: irpOriLong (); 82: break irpSwitch; 83: 84: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 85: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 86: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 87: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 88: //BITREV.L Dr |-|------|-|-----|-----|D |0000_000_011_000_rrr (ISA_C) 89: //CMP2.B <ea>,Rn |-|--234S|-|-UUUU|-U*U*| M WXZP |0000_000_011_mmm_rrr-rnnn000000000000 90: //CHK2.B <ea>,Rn |-|--234S|-|-UUUU|-U*U*| M WXZP |0000_000_011_mmm_rrr-rnnn100000000000 91: case 0b0000_000_011: 92: irpCmp2Chk2Byte (); 93: break irpSwitch; 94: 95: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 96: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 97: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 98: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 99: //BTST.L Dq,Dr |-|012346|-|--U--|--*--|D |0000_qqq_100_000_rrr 100: //MOVEP.W (d16,Ar),Dq |-|01234S|-|-----|-----| |0000_qqq_100_001_rrr-{data} 101: //BTST.B Dq,<ea> |-|012346|-|--U--|--*--| M+-WXZPI|0000_qqq_100_mmm_rrr 102: case 0b0000_000_100: 103: case 0b0000_001_100: 104: case 0b0000_010_100: 105: case 0b0000_011_100: 106: case 0b0000_100_100: 107: case 0b0000_101_100: 108: case 0b0000_110_100: 109: case 0b0000_111_100: 110: irpBtstReg (); 111: break irpSwitch; 112: 113: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 114: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 115: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 116: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 117: //BCHG.L Dq,Dr |-|012346|-|--U--|--*--|D |0000_qqq_101_000_rrr 118: //MOVEP.L (d16,Ar),Dq |-|01234S|-|-----|-----| |0000_qqq_101_001_rrr-{data} 119: //BCHG.B Dq,<ea> |-|012346|-|--U--|--*--| M+-WXZ |0000_qqq_101_mmm_rrr 120: case 0b0000_000_101: 121: case 0b0000_001_101: 122: case 0b0000_010_101: 123: case 0b0000_011_101: 124: case 0b0000_100_101: 125: case 0b0000_101_101: 126: case 0b0000_110_101: 127: case 0b0000_111_101: 128: irpBchgReg (); 129: break irpSwitch; 130: 131: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 132: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 133: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 134: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 135: //BCLR.L Dq,Dr |-|012346|-|--U--|--*--|D |0000_qqq_110_000_rrr 136: //MOVEP.W Dq,(d16,Ar) |-|01234S|-|-----|-----| |0000_qqq_110_001_rrr-{data} 137: //BCLR.B Dq,<ea> |-|012346|-|--U--|--*--| M+-WXZ |0000_qqq_110_mmm_rrr 138: case 0b0000_000_110: 139: case 0b0000_001_110: 140: case 0b0000_010_110: 141: case 0b0000_011_110: 142: case 0b0000_100_110: 143: case 0b0000_101_110: 144: case 0b0000_110_110: 145: case 0b0000_111_110: 146: irpBclrReg (); 147: break irpSwitch; 148: 149: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 150: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 151: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 152: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 153: //BSET.L Dq,Dr |-|012346|-|--U--|--*--|D |0000_qqq_111_000_rrr 154: //MOVEP.L Dq,(d16,Ar) |-|01234S|-|-----|-----| |0000_qqq_111_001_rrr-{data} 155: //BSET.B Dq,<ea> |-|012346|-|--U--|--*--| M+-WXZ |0000_qqq_111_mmm_rrr 156: case 0b0000_000_111: 157: case 0b0000_001_111: 158: case 0b0000_010_111: 159: case 0b0000_011_111: 160: case 0b0000_100_111: 161: case 0b0000_101_111: 162: case 0b0000_110_111: 163: case 0b0000_111_111: 164: irpBsetReg (); 165: break irpSwitch; 166: 167: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 168: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 169: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 170: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 171: //ANDI.B #<data>,<ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |0000_001_000_mmm_rrr-{data} 172: //AND.B #<data>,<ea> |A|012346|-|-UUUU|-**00| M+-WXZ |0000_001_000_mmm_rrr-{data} [ANDI.B #<data>,<ea>] 173: //ANDI.B #<data>,CCR |-|012346|-|*****|*****| |0000_001_000_111_100-{data} 174: case 0b0000_001_000: 175: irpAndiByte (); 176: break irpSwitch; 177: 178: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 179: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 180: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 181: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 182: //ANDI.W #<data>,<ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |0000_001_001_mmm_rrr-{data} 183: //AND.W #<data>,<ea> |A|012346|-|-UUUU|-**00| M+-WXZ |0000_001_001_mmm_rrr-{data} [ANDI.W #<data>,<ea>] 184: //ANDI.W #<data>,SR |-|012346|P|*****|*****| |0000_001_001_111_100-{data} 185: case 0b0000_001_001: 186: irpAndiWord (); 187: break irpSwitch; 188: 189: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 190: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 191: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 192: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 193: //ANDI.L #<data>,<ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |0000_001_010_mmm_rrr-{data} 194: //AND.L #<data>,<ea> |A|012346|-|-UUUU|-**00| M+-WXZ |0000_001_010_mmm_rrr-{data} [ANDI.L #<data>,<ea>] 195: case 0b0000_001_010: 196: irpAndiLong (); 197: break irpSwitch; 198: 199: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 200: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 201: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 202: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 203: //BYTEREV.L Dr |-|------|-|-----|-----|D |0000_001_011_000_rrr (ISA_C) 204: //CMP2.W <ea>,Rn |-|--234S|-|-UUUU|-U*U*| M WXZP |0000_001_011_mmm_rrr-rnnn000000000000 205: //CHK2.W <ea>,Rn |-|--234S|-|-UUUU|-U*U*| M WXZP |0000_001_011_mmm_rrr-rnnn100000000000 206: case 0b0000_001_011: 207: irpCmp2Chk2Word (); 208: break irpSwitch; 209: 210: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 211: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 212: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 213: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 214: //SUBI.B #<data>,<ea> |-|012346|-|UUUUU|*****|D M+-WXZ |0000_010_000_mmm_rrr-{data} 215: //SUB.B #<data>,<ea> |A|012346|-|UUUUU|*****| M+-WXZ |0000_010_000_mmm_rrr-{data} [SUBI.B #<data>,<ea>] 216: case 0b0000_010_000: 217: irpSubiByte (); 218: break irpSwitch; 219: 220: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 221: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 222: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 223: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 224: //SUBI.W #<data>,<ea> |-|012346|-|UUUUU|*****|D M+-WXZ |0000_010_001_mmm_rrr-{data} 225: //SUB.W #<data>,<ea> |A|012346|-|UUUUU|*****| M+-WXZ |0000_010_001_mmm_rrr-{data} [SUBI.W #<data>,<ea>] 226: case 0b0000_010_001: 227: irpSubiWord (); 228: break irpSwitch; 229: 230: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 231: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 232: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 233: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 234: //SUBI.L #<data>,<ea> |-|012346|-|UUUUU|*****|D M+-WXZ |0000_010_010_mmm_rrr-{data} 235: //SUB.L #<data>,<ea> |A|012346|-|UUUUU|*****| M+-WXZ |0000_010_010_mmm_rrr-{data} [SUBI.L #<data>,<ea>] 236: case 0b0000_010_010: 237: irpSubiLong (); 238: break irpSwitch; 239: 240: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 241: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 242: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 243: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 244: //FF1.L Dr |-|------|-|-UUUU|-**00|D |0000_010_011_000_rrr (ISA_C) 245: //CMP2.L <ea>,Rn |-|--234S|-|-UUUU|-U*U*| M WXZP |0000_010_011_mmm_rrr-rnnn000000000000 246: //CHK2.L <ea>,Rn |-|--234S|-|-UUUU|-U*U*| M WXZP |0000_010_011_mmm_rrr-rnnn100000000000 247: case 0b0000_010_011: 248: irpCmp2Chk2Long (); 249: break irpSwitch; 250: 251: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 252: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 253: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 254: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 255: //ADDI.B #<data>,<ea> |-|012346|-|UUUUU|*****|D M+-WXZ |0000_011_000_mmm_rrr-{data} 256: case 0b0000_011_000: 257: irpAddiByte (); 258: break irpSwitch; 259: 260: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 261: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 262: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 263: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 264: //ADDI.W #<data>,<ea> |-|012346|-|UUUUU|*****|D M+-WXZ |0000_011_001_mmm_rrr-{data} 265: case 0b0000_011_001: 266: irpAddiWord (); 267: break irpSwitch; 268: 269: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 270: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 271: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 272: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 273: //ADDI.L #<data>,<ea> |-|012346|-|UUUUU|*****|D M+-WXZ |0000_011_010_mmm_rrr-{data} 274: case 0b0000_011_010: 275: irpAddiLong (); 276: break irpSwitch; 277: 278: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 279: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 280: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 281: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 282: //BTST.L #<data>,Dr |-|012346|-|--U--|--*--|D |0000_100_000_000_rrr-{data} 283: //BTST.B #<data>,<ea> |-|012346|-|--U--|--*--| M+-WXZP |0000_100_000_mmm_rrr-{data} 284: case 0b0000_100_000: 285: irpBtstImm (); 286: break irpSwitch; 287: 288: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 289: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 290: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 291: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 292: //BCHG.L #<data>,Dr |-|012346|-|--U--|--*--|D |0000_100_001_000_rrr-{data} 293: //BCHG.B #<data>,<ea> |-|012346|-|--U--|--*--| M+-WXZ |0000_100_001_mmm_rrr-{data} 294: case 0b0000_100_001: 295: irpBchgImm (); 296: break irpSwitch; 297: 298: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 299: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 300: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 301: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 302: //BCLR.L #<data>,Dr |-|012346|-|--U--|--*--|D |0000_100_010_000_rrr-{data} 303: //BCLR.B #<data>,<ea> |-|012346|-|--U--|--*--| M+-WXZ |0000_100_010_mmm_rrr-{data} 304: case 0b0000_100_010: 305: irpBclrImm (); 306: break irpSwitch; 307: 308: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 309: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 310: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 311: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 312: //BSET.L #<data>,Dr |-|012346|-|--U--|--*--|D |0000_100_011_000_rrr-{data} 313: //BSET.B #<data>,<ea> |-|012346|-|--U--|--*--| M+-WXZ |0000_100_011_mmm_rrr-{data} 314: case 0b0000_100_011: 315: irpBsetImm (); 316: break irpSwitch; 317: 318: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 319: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 320: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 321: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 322: //EORI.B #<data>,<ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |0000_101_000_mmm_rrr-{data} 323: //EOR.B #<data>,<ea> |A|012346|-|-UUUU|-**00|D M+-WXZ |0000_101_000_mmm_rrr-{data} [EORI.B #<data>,<ea>] 324: //EORI.B #<data>,CCR |-|012346|-|*****|*****| |0000_101_000_111_100-{data} 325: case 0b0000_101_000: 326: irpEoriByte (); 327: break irpSwitch; 328: 329: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 330: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 331: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 332: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 333: //EORI.W #<data>,<ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |0000_101_001_mmm_rrr-{data} 334: //EOR.W #<data>,<ea> |A|012346|-|-UUUU|-**00|D M+-WXZ |0000_101_001_mmm_rrr-{data} [EORI.W #<data>,<ea>] 335: //EORI.W #<data>,SR |-|012346|P|*****|*****| |0000_101_001_111_100-{data} 336: case 0b0000_101_001: 337: irpEoriWord (); 338: break irpSwitch; 339: 340: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 341: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 342: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 343: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 344: //EORI.L #<data>,<ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |0000_101_010_mmm_rrr-{data} 345: //EOR.L #<data>,<ea> |A|012346|-|-UUUU|-**00|D M+-WXZ |0000_101_010_mmm_rrr-{data} [EORI.L #<data>,<ea>] 346: case 0b0000_101_010: 347: irpEoriLong (); 348: break irpSwitch; 349: 350: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 351: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 352: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 353: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 354: //CAS.B Dc,Du,<ea> |-|--2346|-|-UUUU|-****| M+-WXZ |0000_101_011_mmm_rrr-0000000uuu000ccc 355: case 0b0000_101_011: 356: irpCasByte (); 357: break irpSwitch; 358: 359: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 360: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 361: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 362: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 363: //CMPI.B #<data>,<ea> |-|--2346|-|-UUUU|-****|D M+-WXZP |0000_110_000_mmm_rrr-{data} 364: //CMP.B #<data>,<ea> |A|--2346|-|-UUUU|-****| M+-WXZP |0000_110_000_mmm_rrr-{data} [CMPI.B #<data>,<ea>] 365: case 0b0000_110_000: 366: irpCmpiByte (); 367: break irpSwitch; 368: 369: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 370: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 371: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 372: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 373: //CMPI.W #<data>,<ea> |-|--2346|-|-UUUU|-****|D M+-WXZP |0000_110_001_mmm_rrr-{data} 374: //CMP.W #<data>,<ea> |A|--2346|-|-UUUU|-****| M+-WXZP |0000_110_001_mmm_rrr-{data} [CMPI.W #<data>,<ea>] 375: case 0b0000_110_001: 376: irpCmpiWord (); 377: break irpSwitch; 378: 379: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 380: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 381: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 382: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 383: //CMPI.L #<data>,<ea> |-|--2346|-|-UUUU|-****|D M+-WXZP |0000_110_010_mmm_rrr-{data} 384: //CMP.L #<data>,<ea> |A|--2346|-|-UUUU|-****| M+-WXZP |0000_110_010_mmm_rrr-{data} [CMPI.L #<data>,<ea>] 385: case 0b0000_110_010: 386: irpCmpiLong (); 387: break irpSwitch; 388: 389: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 390: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 391: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 392: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 393: //CAS.W Dc,Du,<ea> |-|--2346|-|-UUUU|-****| M+-WXZ |0000_110_011_mmm_rrr-0000000uuu000ccc (68060 software emulate misaligned <ea>) 394: //CAS2.W Dc1:Dc2,Du1:Du2,(Rn1):(Rn2) |-|--234S|-|-UUUU|-****| |0000_110_011_111_100-rnnn000uuu000ccc(1)-rnnn_000_uuu_000_ccc(2) 395: case 0b0000_110_011: 396: irpCasWord (); 397: break irpSwitch; 398: 399: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 400: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 401: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 402: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 403: //MOVES.B <ea>,Rn |-|-12346|P|-----|-----| M+-WXZ |0000_111_000_mmm_rrr-rnnn000000000000 404: //MOVES.B Rn,<ea> |-|-12346|P|-----|-----| M+-WXZ |0000_111_000_mmm_rrr-rnnn100000000000 405: case 0b0000_111_000: 406: irpMovesByte (); 407: break irpSwitch; 408: 409: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 410: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 411: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 412: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 413: //MOVES.W <ea>,Rn |-|-12346|P|-----|-----| M+-WXZ |0000_111_001_mmm_rrr-rnnn000000000000 414: //MOVES.W Rn,<ea> |-|-12346|P|-----|-----| M+-WXZ |0000_111_001_mmm_rrr-rnnn100000000000 415: case 0b0000_111_001: 416: irpMovesWord (); 417: break irpSwitch; 418: 419: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 420: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 421: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 422: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 423: //MOVES.L <ea>,Rn |-|-12346|P|-----|-----| M+-WXZ |0000_111_010_mmm_rrr-rnnn000000000000 424: //MOVES.L Rn,<ea> |-|-12346|P|-----|-----| M+-WXZ |0000_111_010_mmm_rrr-rnnn100000000000 425: case 0b0000_111_010: 426: irpMovesLong (); 427: break irpSwitch; 428: 429: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 430: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 431: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 432: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 433: //CAS.L Dc,Du,<ea> |-|--2346|-|-UUUU|-****| M+-WXZ |0000_111_011_mmm_rrr-0000000uuu000ccc (68060 software emulate misaligned <ea>) 434: //CAS2.L Dc1:Dc2,Du1:Du2,(Rn1):(Rn2) |-|--234S|-|-UUUU|-****| |0000_111_011_111_100-rnnn000uuu000ccc(1)-rnnn_000_uuu_000_ccc(2) 435: case 0b0000_111_011: 436: irpCasLong (); 437: break irpSwitch; 438: 439: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 440: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 441: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 442: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 443: //MOVE.B <ea>,Dq |-|012346|-|-UUUU|-**00|D M+-WXZPI|0001_qqq_000_mmm_rrr 444: case 0b0001_000_000: 445: case 0b0001_001_000: 446: case 0b0001_010_000: 447: case 0b0001_011_000: 448: case 0b0001_100_000: 449: case 0b0001_101_000: 450: case 0b0001_110_000: 451: case 0b0001_111_000: 452: irpMoveToDRByte (); 453: break irpSwitch; 454: 455: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 456: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 457: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 458: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 459: //MOVE.B <ea>,(Aq) |-|012346|-|-UUUU|-**00|D M+-WXZPI|0001_qqq_010_mmm_rrr 460: case 0b0001_000_010: 461: case 0b0001_001_010: 462: case 0b0001_010_010: 463: case 0b0001_011_010: 464: case 0b0001_100_010: 465: case 0b0001_101_010: 466: case 0b0001_110_010: 467: case 0b0001_111_010: 468: irpMoveToMMByte (); 469: break irpSwitch; 470: 471: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 472: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 473: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 474: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 475: //MOVE.B <ea>,(Aq)+ |-|012346|-|-UUUU|-**00|D M+-WXZPI|0001_qqq_011_mmm_rrr 476: case 0b0001_000_011: 477: case 0b0001_001_011: 478: case 0b0001_010_011: 479: case 0b0001_011_011: 480: case 0b0001_100_011: 481: case 0b0001_101_011: 482: case 0b0001_110_011: 483: case 0b0001_111_011: 484: irpMoveToMPByte (); 485: break irpSwitch; 486: 487: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 488: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 489: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 490: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 491: //MOVE.B <ea>,-(Aq) |-|012346|-|-UUUU|-**00|D M+-WXZPI|0001_qqq_100_mmm_rrr 492: case 0b0001_000_100: 493: case 0b0001_001_100: 494: case 0b0001_010_100: 495: case 0b0001_011_100: 496: case 0b0001_100_100: 497: case 0b0001_101_100: 498: case 0b0001_110_100: 499: case 0b0001_111_100: 500: irpMoveToMNByte (); 501: break irpSwitch; 502: 503: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 504: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 505: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 506: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 507: //MOVE.B <ea>,(d16,Aq) |-|012346|-|-UUUU|-**00|D M+-WXZPI|0001_qqq_101_mmm_rrr 508: case 0b0001_000_101: 509: case 0b0001_001_101: 510: case 0b0001_010_101: 511: case 0b0001_011_101: 512: case 0b0001_100_101: 513: case 0b0001_101_101: 514: case 0b0001_110_101: 515: case 0b0001_111_101: 516: irpMoveToMWByte (); 517: break irpSwitch; 518: 519: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 520: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 521: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 522: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 523: //MOVE.B <ea>,(d8,Aq,Rn.wl) |-|012346|-|-UUUU|-**00|D M+-WXZPI|0001_qqq_110_mmm_rrr 524: case 0b0001_000_110: 525: case 0b0001_001_110: 526: case 0b0001_010_110: 527: case 0b0001_011_110: 528: case 0b0001_100_110: 529: case 0b0001_101_110: 530: case 0b0001_110_110: 531: case 0b0001_111_110: 532: irpMoveToMXByte (); 533: break irpSwitch; 534: 535: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 536: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 537: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 538: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 539: //MOVE.B <ea>,(xxx).W |-|012346|-|-UUUU|-**00|D M+-WXZPI|0001_000_111_mmm_rrr 540: case 0b0001_000_111: 541: irpMoveToZWByte (); 542: break irpSwitch; 543: 544: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 545: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 546: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 547: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 548: //MOVE.B <ea>,(xxx).L |-|012346|-|-UUUU|-**00|D M+-WXZPI|0001_001_111_mmm_rrr 549: case 0b0001_001_111: 550: irpMoveToZLByte (); 551: break irpSwitch; 552: 553: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 554: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 555: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 556: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 557: //MOVE.L <ea>,Dq |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0010_qqq_000_mmm_rrr 558: case 0b0010_000_000: 559: case 0b0010_001_000: 560: case 0b0010_010_000: 561: case 0b0010_011_000: 562: case 0b0010_100_000: 563: case 0b0010_101_000: 564: case 0b0010_110_000: 565: case 0b0010_111_000: 566: irpMoveToDRLong (); 567: break irpSwitch; 568: 569: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 570: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 571: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 572: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 573: //MOVEA.L <ea>,Aq |-|012346|-|-----|-----|DAM+-WXZPI|0010_qqq_001_mmm_rrr 574: //MOVE.L <ea>,Aq |A|012346|-|-----|-----|DAM+-WXZPI|0010_qqq_001_mmm_rrr [MOVEA.L <ea>,Aq] 575: case 0b0010_000_001: 576: case 0b0010_001_001: 577: case 0b0010_010_001: 578: case 0b0010_011_001: 579: case 0b0010_100_001: 580: case 0b0010_101_001: 581: case 0b0010_110_001: 582: case 0b0010_111_001: 583: irpMoveaLong (); 584: break irpSwitch; 585: 586: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 587: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 588: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 589: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 590: //MOVE.L <ea>,(Aq) |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0010_qqq_010_mmm_rrr 591: case 0b0010_000_010: 592: case 0b0010_001_010: 593: case 0b0010_010_010: 594: case 0b0010_011_010: 595: case 0b0010_100_010: 596: case 0b0010_101_010: 597: case 0b0010_110_010: 598: case 0b0010_111_010: 599: irpMoveToMMLong (); 600: break irpSwitch; 601: 602: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 603: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 604: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 605: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 606: //MOVE.L <ea>,(Aq)+ |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0010_qqq_011_mmm_rrr 607: case 0b0010_000_011: 608: case 0b0010_001_011: 609: case 0b0010_010_011: 610: case 0b0010_011_011: 611: case 0b0010_100_011: 612: case 0b0010_101_011: 613: case 0b0010_110_011: 614: case 0b0010_111_011: 615: irpMoveToMPLong (); 616: break irpSwitch; 617: 618: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 619: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 620: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 621: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 622: //MOVE.L <ea>,-(Aq) |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0010_qqq_100_mmm_rrr 623: case 0b0010_000_100: 624: case 0b0010_001_100: 625: case 0b0010_010_100: 626: case 0b0010_011_100: 627: case 0b0010_100_100: 628: case 0b0010_101_100: 629: case 0b0010_110_100: 630: case 0b0010_111_100: 631: irpMoveToMNLong (); 632: break irpSwitch; 633: 634: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 635: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 636: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 637: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 638: //MOVE.L <ea>,(d16,Aq) |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0010_qqq_101_mmm_rrr 639: case 0b0010_000_101: 640: case 0b0010_001_101: 641: case 0b0010_010_101: 642: case 0b0010_011_101: 643: case 0b0010_100_101: 644: case 0b0010_101_101: 645: case 0b0010_110_101: 646: case 0b0010_111_101: 647: irpMoveToMWLong (); 648: break irpSwitch; 649: 650: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 651: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 652: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 653: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 654: //MOVE.L <ea>,(d8,Aq,Rn.wl) |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0010_qqq_110_mmm_rrr 655: case 0b0010_000_110: 656: case 0b0010_001_110: 657: case 0b0010_010_110: 658: case 0b0010_011_110: 659: case 0b0010_100_110: 660: case 0b0010_101_110: 661: case 0b0010_110_110: 662: case 0b0010_111_110: 663: irpMoveToMXLong (); 664: break irpSwitch; 665: 666: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 667: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 668: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 669: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 670: //MOVE.L <ea>,(xxx).W |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0010_000_111_mmm_rrr 671: case 0b0010_000_111: 672: irpMoveToZWLong (); 673: break irpSwitch; 674: 675: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 676: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 677: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 678: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 679: //MOVE.L <ea>,(xxx).L |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0010_001_111_mmm_rrr 680: case 0b0010_001_111: 681: irpMoveToZLLong (); 682: break irpSwitch; 683: 684: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 685: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 686: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 687: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 688: //MOVE.W <ea>,Dq |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0011_qqq_000_mmm_rrr 689: case 0b0011_000_000: 690: case 0b0011_001_000: 691: case 0b0011_010_000: 692: case 0b0011_011_000: 693: case 0b0011_100_000: 694: case 0b0011_101_000: 695: case 0b0011_110_000: 696: case 0b0011_111_000: 697: irpMoveToDRWord (); 698: break irpSwitch; 699: 700: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 701: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 702: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 703: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 704: //MOVEA.W <ea>,Aq |-|012346|-|-----|-----|DAM+-WXZPI|0011_qqq_001_mmm_rrr 705: //MOVE.W <ea>,Aq |A|012346|-|-----|-----|DAM+-WXZPI|0011_qqq_001_mmm_rrr [MOVEA.W <ea>,Aq] 706: case 0b0011_000_001: 707: case 0b0011_001_001: 708: case 0b0011_010_001: 709: case 0b0011_011_001: 710: case 0b0011_100_001: 711: case 0b0011_101_001: 712: case 0b0011_110_001: 713: case 0b0011_111_001: 714: irpMoveaWord (); 715: break irpSwitch; 716: 717: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 718: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 719: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 720: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 721: //MOVE.W <ea>,(Aq) |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0011_qqq_010_mmm_rrr 722: case 0b0011_000_010: 723: case 0b0011_001_010: 724: case 0b0011_010_010: 725: case 0b0011_011_010: 726: case 0b0011_100_010: 727: case 0b0011_101_010: 728: case 0b0011_110_010: 729: case 0b0011_111_010: 730: irpMoveToMMWord (); 731: break irpSwitch; 732: 733: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 734: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 735: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 736: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 737: //MOVE.W <ea>,(Aq)+ |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0011_qqq_011_mmm_rrr 738: case 0b0011_000_011: 739: case 0b0011_001_011: 740: case 0b0011_010_011: 741: case 0b0011_011_011: 742: case 0b0011_100_011: 743: case 0b0011_101_011: 744: case 0b0011_110_011: 745: case 0b0011_111_011: 746: irpMoveToMPWord (); 747: break irpSwitch; 748: 749: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 750: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 751: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 752: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 753: //MOVE.W <ea>,-(Aq) |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0011_qqq_100_mmm_rrr 754: case 0b0011_000_100: 755: case 0b0011_001_100: 756: case 0b0011_010_100: 757: case 0b0011_011_100: 758: case 0b0011_100_100: 759: case 0b0011_101_100: 760: case 0b0011_110_100: 761: case 0b0011_111_100: 762: irpMoveToMNWord (); 763: break irpSwitch; 764: 765: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 766: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 767: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 768: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 769: //MOVE.W <ea>,(d16,Aq) |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0011_qqq_101_mmm_rrr 770: case 0b0011_000_101: 771: case 0b0011_001_101: 772: case 0b0011_010_101: 773: case 0b0011_011_101: 774: case 0b0011_100_101: 775: case 0b0011_101_101: 776: case 0b0011_110_101: 777: case 0b0011_111_101: 778: irpMoveToMWWord (); 779: break irpSwitch; 780: 781: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 782: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 783: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 784: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 785: //MOVE.W <ea>,(d8,Aq,Rn.wl) |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0011_qqq_110_mmm_rrr 786: case 0b0011_000_110: 787: case 0b0011_001_110: 788: case 0b0011_010_110: 789: case 0b0011_011_110: 790: case 0b0011_100_110: 791: case 0b0011_101_110: 792: case 0b0011_110_110: 793: case 0b0011_111_110: 794: irpMoveToMXWord (); 795: break irpSwitch; 796: 797: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 798: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 799: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 800: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 801: //MOVE.W <ea>,(xxx).W |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0011_000_111_mmm_rrr 802: case 0b0011_000_111: 803: irpMoveToZWWord (); 804: break irpSwitch; 805: 806: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 807: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 808: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 809: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 810: //MOVE.W <ea>,(xxx).L |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0011_001_111_mmm_rrr 811: case 0b0011_001_111: 812: irpMoveToZLWord (); 813: break irpSwitch; 814: 815: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 816: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 817: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 818: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 819: //NEGX.B <ea> |-|012346|-|*UUUU|*****|D M+-WXZ |0100_000_000_mmm_rrr 820: case 0b0100_000_000: 821: irpNegxByte (); 822: break irpSwitch; 823: 824: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 825: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 826: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 827: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 828: //NEGX.W <ea> |-|012346|-|*UUUU|*****|D M+-WXZ |0100_000_001_mmm_rrr 829: case 0b0100_000_001: 830: irpNegxWord (); 831: break irpSwitch; 832: 833: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 834: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 835: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 836: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 837: //NEGX.L <ea> |-|012346|-|*UUUU|*****|D M+-WXZ |0100_000_010_mmm_rrr 838: case 0b0100_000_010: 839: irpNegxLong (); 840: break irpSwitch; 841: 842: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 843: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 844: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 845: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 846: //MOVE.W SR,<ea> |-|-12346|P|*****|-----|D M+-WXZ |0100_000_011_mmm_rrr 847: case 0b0100_000_011: 848: irpMoveFromSR (); 849: break irpSwitch; 850: 851: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 852: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 853: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 854: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 855: //CHK.L <ea>,Dq |-|--2346|-|-UUUU|-*UUU|D M+-WXZPI|0100_qqq_100_mmm_rrr 856: case 0b0100_000_100: 857: case 0b0100_001_100: 858: case 0b0100_010_100: 859: case 0b0100_011_100: 860: case 0b0100_100_100: 861: case 0b0100_101_100: 862: case 0b0100_110_100: 863: case 0b0100_111_100: 864: irpChkLong (); 865: break irpSwitch; 866: 867: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 868: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 869: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 870: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 871: //CHK.W <ea>,Dq |-|012346|-|-UUUU|-*UUU|D M+-WXZPI|0100_qqq_110_mmm_rrr 872: case 0b0100_000_110: 873: case 0b0100_001_110: 874: case 0b0100_010_110: 875: case 0b0100_011_110: 876: case 0b0100_100_110: 877: case 0b0100_101_110: 878: case 0b0100_110_110: 879: case 0b0100_111_110: 880: irpChkWord (); 881: break irpSwitch; 882: 883: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 884: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 885: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 886: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 887: //LEA.L <ea>,Aq |-|012346|-|-----|-----| M WXZP |0100_qqq_111_mmm_rrr 888: //EXTB.L Dr |-|--2346|-|-UUUU|-**00|D |0100_100_111_000_rrr 889: case 0b0100_000_111: 890: case 0b0100_001_111: 891: case 0b0100_010_111: 892: case 0b0100_011_111: 893: case 0b0100_100_111: 894: case 0b0100_101_111: 895: case 0b0100_110_111: 896: case 0b0100_111_111: 897: irpLea (); 898: break irpSwitch; 899: 900: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 901: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 902: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 903: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 904: //CLR.B <ea> |-|012346|-|-UUUU|-0100|D M+-WXZ |0100_001_000_mmm_rrr (68000 and 68008 read before clear) 905: case 0b0100_001_000: 906: irpClrByte (); 907: break irpSwitch; 908: 909: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 910: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 911: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 912: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 913: //CLR.W <ea> |-|012346|-|-UUUU|-0100|D M+-WXZ |0100_001_001_mmm_rrr (68000 and 68008 read before clear) 914: case 0b0100_001_001: 915: irpClrWord (); 916: break irpSwitch; 917: 918: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 919: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 920: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 921: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 922: //CLR.L <ea> |-|012346|-|-UUUU|-0100|D M+-WXZ |0100_001_010_mmm_rrr (68000 and 68008 read before clear) 923: case 0b0100_001_010: 924: irpClrLong (); 925: break irpSwitch; 926: 927: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 928: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 929: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 930: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 931: //MOVE.W CCR,<ea> |-|-12346|-|*****|-----|D M+-WXZ |0100_001_011_mmm_rrr 932: case 0b0100_001_011: 933: irpMoveFromCCR (); 934: break irpSwitch; 935: 936: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 937: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 938: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 939: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 940: //NEG.B <ea> |-|012346|-|UUUUU|*****|D M+-WXZ |0100_010_000_mmm_rrr 941: case 0b0100_010_000: 942: irpNegByte (); 943: break irpSwitch; 944: 945: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 946: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 947: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 948: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 949: //NEG.W <ea> |-|012346|-|UUUUU|*****|D M+-WXZ |0100_010_001_mmm_rrr 950: case 0b0100_010_001: 951: irpNegWord (); 952: break irpSwitch; 953: 954: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 955: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 956: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 957: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 958: //NEG.L <ea> |-|012346|-|UUUUU|*****|D M+-WXZ |0100_010_010_mmm_rrr 959: case 0b0100_010_010: 960: irpNegLong (); 961: break irpSwitch; 962: 963: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 964: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 965: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 966: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 967: //MOVE.W <ea>,CCR |-|012346|-|UUUUU|*****|D M+-WXZPI|0100_010_011_mmm_rrr 968: case 0b0100_010_011: 969: irpMoveToCCR (); 970: break irpSwitch; 971: 972: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 973: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 974: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 975: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 976: //NOT.B <ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |0100_011_000_mmm_rrr 977: case 0b0100_011_000: 978: irpNotByte (); 979: break irpSwitch; 980: 981: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 982: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 983: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 984: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 985: //NOT.W <ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |0100_011_001_mmm_rrr 986: case 0b0100_011_001: 987: irpNotWord (); 988: break irpSwitch; 989: 990: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 991: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 992: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 993: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 994: //NOT.L <ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |0100_011_010_mmm_rrr 995: case 0b0100_011_010: 996: irpNotLong (); 997: break irpSwitch; 998: 999: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1000: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1001: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1002: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1003: //MOVE.W <ea>,SR |-|012346|P|UUUUU|*****|D M+-WXZPI|0100_011_011_mmm_rrr 1004: case 0b0100_011_011: 1005: irpMoveToSR (); 1006: break irpSwitch; 1007: 1008: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1009: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1010: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1011: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1012: //NBCD.B <ea> |-|012346|-|UUUUU|*U*U*|D M+-WXZ |0100_100_000_mmm_rrr 1013: //LINK.L Ar,#<data> |-|--2346|-|-----|-----| |0100_100_000_001_rrr-{data} 1014: case 0b0100_100_000: 1015: irpNbcd (); 1016: break irpSwitch; 1017: 1018: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1019: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1020: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1021: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1022: //SWAP.W Dr |-|012346|-|-UUUU|-**00|D |0100_100_001_000_rrr 1023: //BKPT #<data> |-|-12346|-|-----|-----| |0100_100_001_001_ddd 1024: //PEA.L <ea> |-|012346|-|-----|-----| M WXZP |0100_100_001_mmm_rrr 1025: case 0b0100_100_001: 1026: irpPea (); 1027: break irpSwitch; 1028: 1029: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1030: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1031: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1032: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1033: //EXT.W Dr |-|012346|-|-UUUU|-**00|D |0100_100_010_000_rrr 1034: //MOVEM.W <list>,<ea> |-|012346|-|-----|-----| M -WXZ |0100_100_010_mmm_rrr-llllllllllllllll 1035: case 0b0100_100_010: 1036: irpMovemToMemWord (); 1037: break irpSwitch; 1038: 1039: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1040: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1041: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1042: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1043: //EXT.L Dr |-|012346|-|-UUUU|-**00|D |0100_100_011_000_rrr 1044: //MOVEM.L <list>,<ea> |-|012346|-|-----|-----| M -WXZ |0100_100_011_mmm_rrr-llllllllllllllll 1045: case 0b0100_100_011: 1046: irpMovemToMemLong (); 1047: break irpSwitch; 1048: 1049: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1050: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1051: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1052: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1053: //TST.B <ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |0100_101_000_mmm_rrr 1054: //TST.B <ea> |-|--2346|-|-UUUU|-**00| PI|0100_101_000_mmm_rrr 1055: case 0b0100_101_000: 1056: irpTstByte (); 1057: break irpSwitch; 1058: 1059: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1060: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1061: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1062: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1063: //TST.W <ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |0100_101_001_mmm_rrr 1064: //TST.W <ea> |-|--2346|-|-UUUU|-**00| A PI|0100_101_001_mmm_rrr 1065: case 0b0100_101_001: 1066: irpTstWord (); 1067: break irpSwitch; 1068: 1069: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1070: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1071: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1072: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1073: //TST.L <ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |0100_101_010_mmm_rrr 1074: //TST.L <ea> |-|--2346|-|-UUUU|-**00| A PI|0100_101_010_mmm_rrr 1075: case 0b0100_101_010: 1076: irpTstLong (); 1077: break irpSwitch; 1078: 1079: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1080: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1081: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1082: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1083: //TAS.B <ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |0100_101_011_mmm_rrr 1084: //ILLEGAL |-|012346|-|-----|-----| |0100_101_011_111_100 1085: case 0b0100_101_011: 1086: irpTas (); 1087: break irpSwitch; 1088: 1089: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1090: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1091: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1092: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1093: //MULU.L <ea>,Dl |-|--2346|-|-UUUU|-***0|D M+-WXZPI|0100_110_000_mmm_rrr-0lll000000000hhh (h is not used) 1094: //MULU.L <ea>,Dh:Dl |-|--234S|-|-UUUU|-***0|D M+-WXZPI|0100_110_000_mmm_rrr-0lll010000000hhh (if h=l then result is not defined) 1095: //MULS.L <ea>,Dl |-|--2346|-|-UUUU|-***0|D M+-WXZPI|0100_110_000_mmm_rrr-0lll100000000hhh (h is not used) 1096: //MULS.L <ea>,Dh:Dl |-|--234S|-|-UUUU|-***0|D M+-WXZPI|0100_110_000_mmm_rrr-0lll110000000hhh (if h=l then result is not defined) 1097: case 0b0100_110_000: 1098: irpMuluMulsLong (); 1099: break irpSwitch; 1100: 1101: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1102: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1103: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1104: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1105: //DIVU.L <ea>,Dq |-|--2346|-|-UUUU|-***0|D M+-WXZPI|0100_110_001_mmm_rrr-0qqq000000000qqq 1106: //DIVUL.L <ea>,Dr:Dq |-|--2346|-|-UUUU|-***0|D M+-WXZPI|0100_110_001_mmm_rrr-0qqq000000000rrr (q is not equal to r) 1107: //DIVU.L <ea>,Dr:Dq |-|--234S|-|-UUUU|-***0|D M+-WXZPI|0100_110_001_mmm_rrr-0qqq010000000rrr (q is not equal to r) 1108: //DIVS.L <ea>,Dq |-|--2346|-|-UUUU|-***0|D M+-WXZPI|0100_110_001_mmm_rrr-0qqq100000000qqq 1109: //DIVSL.L <ea>,Dr:Dq |-|--2346|-|-UUUU|-***0|D M+-WXZPI|0100_110_001_mmm_rrr-0qqq100000000rrr (q is not equal to r) 1110: //DIVS.L <ea>,Dr:Dq |-|--234S|-|-UUUU|-***0|D M+-WXZPI|0100_110_001_mmm_rrr-0qqq110000000rrr (q is not equal to r) 1111: case 0b0100_110_001: 1112: irpDivuDivsLong (); 1113: break irpSwitch; 1114: 1115: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1116: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1117: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1118: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1119: //SATS.L Dr |-|------|-|-UUUU|-**00|D |0100_110_010_000_rrr (ISA_B) 1120: //MOVEM.W <ea>,<list> |-|012346|-|-----|-----| M+ WXZP |0100_110_010_mmm_rrr-llllllllllllllll 1121: case 0b0100_110_010: 1122: irpMovemToRegWord (); 1123: break irpSwitch; 1124: 1125: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1126: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1127: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1128: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1129: //MOVEM.L <ea>,<list> |-|012346|-|-----|-----| M+ WXZP |0100_110_011_mmm_rrr-llllllllllllllll 1130: case 0b0100_110_011: 1131: irpMovemToRegLong (); 1132: break irpSwitch; 1133: 1134: case 0b0100_111_001: 1135: switch (XEiJ.regOC & 0b111_111) { 1136: 1137: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1138: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1139: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1140: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1141: //TRAP #<vector> |-|012346|-|-----|-----| |0100_111_001_00v_vvv 1142: case 0b000_000: 1143: case 0b000_001: 1144: case 0b000_010: 1145: case 0b000_011: 1146: case 0b000_100: 1147: case 0b000_101: 1148: case 0b000_110: 1149: case 0b000_111: 1150: case 0b001_000: 1151: case 0b001_001: 1152: case 0b001_010: 1153: case 0b001_011: 1154: case 0b001_100: 1155: case 0b001_101: 1156: case 0b001_110: 1157: irpTrap (); 1158: break irpSwitch; 1159: case 0b001_111: 1160: irpTrap15 (); 1161: break irpSwitch; 1162: 1163: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1164: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1165: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1166: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1167: //LINK.W Ar,#<data> |-|012346|-|-----|-----| |0100_111_001_010_rrr-{data} 1168: case 0b010_000: 1169: case 0b010_001: 1170: case 0b010_010: 1171: case 0b010_011: 1172: case 0b010_100: 1173: case 0b010_101: 1174: case 0b010_110: 1175: case 0b010_111: 1176: irpLinkWord (); 1177: break irpSwitch; 1178: 1179: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1180: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1181: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1182: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1183: //UNLK Ar |-|012346|-|-----|-----| |0100_111_001_011_rrr 1184: case 0b011_000: 1185: case 0b011_001: 1186: case 0b011_010: 1187: case 0b011_011: 1188: case 0b011_100: 1189: case 0b011_101: 1190: case 0b011_110: 1191: case 0b011_111: 1192: irpUnlk (); 1193: break irpSwitch; 1194: 1195: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1196: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1197: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1198: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1199: //MOVE.L Ar,USP |-|012346|P|-----|-----| |0100_111_001_100_rrr 1200: case 0b100_000: 1201: case 0b100_001: 1202: case 0b100_010: 1203: case 0b100_011: 1204: case 0b100_100: 1205: case 0b100_101: 1206: case 0b100_110: 1207: case 0b100_111: 1208: irpMoveToUsp (); 1209: break irpSwitch; 1210: 1211: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1212: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1213: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1214: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1215: //MOVE.L USP,Ar |-|012346|P|-----|-----| |0100_111_001_101_rrr 1216: case 0b101_000: 1217: case 0b101_001: 1218: case 0b101_010: 1219: case 0b101_011: 1220: case 0b101_100: 1221: case 0b101_101: 1222: case 0b101_110: 1223: case 0b101_111: 1224: irpMoveFromUsp (); 1225: break irpSwitch; 1226: 1227: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1228: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1229: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1230: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1231: //RESET |-|012346|P|-----|-----| |0100_111_001_110_000 1232: case 0b110_000: 1233: irpReset (); 1234: break irpSwitch; 1235: 1236: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1237: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1238: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1239: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1240: //NOP |-|012346|-|-----|-----| |0100_111_001_110_001 1241: case 0b110_001: 1242: irpNop (); 1243: break irpSwitch; 1244: 1245: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1246: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1247: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1248: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1249: //STOP #<data> |-|012346|P|UUUUU|*****| |0100_111_001_110_010-{data} 1250: case 0b110_010: 1251: irpStop (); 1252: break irpSwitch; 1253: 1254: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1255: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1256: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1257: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1258: //RTE |-|012346|P|UUUUU|*****| |0100_111_001_110_011 1259: case 0b110_011: 1260: irpRte (); 1261: break irpSwitch; 1262: 1263: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1264: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1265: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1266: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1267: //RTD #<data> |-|-12346|-|-----|-----| |0100_111_001_110_100-{data} 1268: case 0b110_100: 1269: irpRtd (); 1270: break irpSwitch; 1271: 1272: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1273: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1274: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1275: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1276: //RTS |-|012346|-|-----|-----| |0100_111_001_110_101 1277: case 0b110_101: 1278: irpRts (); 1279: break irpSwitch; 1280: 1281: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1282: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1283: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1284: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1285: //TRAPV |-|012346|-|---*-|-----| |0100_111_001_110_110 1286: case 0b110_110: 1287: irpTrapv (); 1288: break irpSwitch; 1289: 1290: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1291: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1292: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1293: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1294: //RTR |-|012346|-|UUUUU|*****| |0100_111_001_110_111 1295: case 0b110_111: 1296: irpRtr (); 1297: break irpSwitch; 1298: 1299: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1300: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1301: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1302: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1303: //MOVEC.L Rc,Rn |-|-12346|P|-----|-----| |0100_111_001_111_010-rnnncccccccccccc 1304: case 0b111_010: 1305: irpMovecFromControl (); 1306: break irpSwitch; 1307: 1308: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1309: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1310: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1311: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1312: //MOVEC.L Rn,Rc |-|-12346|P|-----|-----| |0100_111_001_111_011-rnnncccccccccccc 1313: case 0b111_011: 1314: irpMovecToControl (); 1315: break irpSwitch; 1316: 1317: default: 1318: irpIllegal (); 1319: 1320: } //switch XEiJ.regOC & 0b111_111 1321: break irpSwitch; 1322: 1323: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1324: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1325: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1326: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1327: //JSR <ea> |-|012346|-|-----|-----| M WXZP |0100_111_010_mmm_rrr 1328: //JBSR.L <label> |A|012346|-|-----|-----| |0100_111_010_111_001-{address} [JSR <label>] 1329: case 0b0100_111_010: 1330: irpJsr (); 1331: break irpSwitch; 1332: 1333: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1334: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1335: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1336: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1337: //JMP <ea> |-|012346|-|-----|-----| M WXZP |0100_111_011_mmm_rrr 1338: //JBRA.L <label> |A|012346|-|-----|-----| |0100_111_011_111_001-{address} [JMP <label>] 1339: case 0b0100_111_011: 1340: irpJmp (); 1341: break irpSwitch; 1342: 1343: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1344: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1345: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1346: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1347: //ADDQ.B #<data>,<ea> |-|012346|-|UUUUU|*****|D M+-WXZ |0101_qqq_000_mmm_rrr 1348: //INC.B <ea> |A|012346|-|UUUUU|*****|D M+-WXZ |0101_001_000_mmm_rrr [ADDQ.B #1,<ea>] 1349: case 0b0101_000_000: 1350: case 0b0101_001_000: 1351: case 0b0101_010_000: 1352: case 0b0101_011_000: 1353: case 0b0101_100_000: 1354: case 0b0101_101_000: 1355: case 0b0101_110_000: 1356: case 0b0101_111_000: 1357: irpAddqByte (); 1358: break irpSwitch; 1359: 1360: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1361: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1362: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1363: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1364: //ADDQ.W #<data>,<ea> |-|012346|-|UUUUU|*****|D M+-WXZ |0101_qqq_001_mmm_rrr 1365: //ADDQ.W #<data>,Ar |-|012346|-|-----|-----| A |0101_qqq_001_001_rrr 1366: //INC.W <ea> |A|012346|-|UUUUU|*****|D M+-WXZ |0101_001_001_mmm_rrr [ADDQ.W #1,<ea>] 1367: //INC.W Ar |A|012346|-|-----|-----| A |0101_001_001_001_rrr [ADDQ.W #1,Ar] 1368: case 0b0101_000_001: 1369: case 0b0101_001_001: 1370: case 0b0101_010_001: 1371: case 0b0101_011_001: 1372: case 0b0101_100_001: 1373: case 0b0101_101_001: 1374: case 0b0101_110_001: 1375: case 0b0101_111_001: 1376: irpAddqWord (); 1377: break irpSwitch; 1378: 1379: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1380: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1381: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1382: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1383: //ADDQ.L #<data>,<ea> |-|012346|-|UUUUU|*****|D M+-WXZ |0101_qqq_010_mmm_rrr 1384: //ADDQ.L #<data>,Ar |-|012346|-|-----|-----| A |0101_qqq_010_001_rrr 1385: //INC.L <ea> |A|012346|-|UUUUU|*****|D M+-WXZ |0101_001_010_mmm_rrr [ADDQ.L #1,<ea>] 1386: //INC.L Ar |A|012346|-|-----|-----| A |0101_001_010_001_rrr [ADDQ.L #1,Ar] 1387: case 0b0101_000_010: 1388: case 0b0101_001_010: 1389: case 0b0101_010_010: 1390: case 0b0101_011_010: 1391: case 0b0101_100_010: 1392: case 0b0101_101_010: 1393: case 0b0101_110_010: 1394: case 0b0101_111_010: 1395: irpAddqLong (); 1396: break irpSwitch; 1397: 1398: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1399: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1400: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1401: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1402: //ST.B <ea> |-|012346|-|-----|-----|D M+-WXZ |0101_000_011_mmm_rrr 1403: //SNF.B <ea> |A|012346|-|-----|-----|D M+-WXZ |0101_000_011_mmm_rrr [ST.B <ea>] 1404: //DBT.W Dr,<label> |-|012346|-|-----|-----| |0101_000_011_001_rrr-{offset} 1405: //DBNF.W Dr,<label> |A|012346|-|-----|-----| |0101_000_011_001_rrr-{offset} [DBT.W Dr,<label>] 1406: //TRAPT.W #<data> |-|--2346|-|-----|-----| |0101_000_011_111_010-{data} 1407: //TPNF.W #<data> |A|--2346|-|-----|-----| |0101_000_011_111_010-{data} [TRAPT.W #<data>] 1408: //TPT.W #<data> |A|--2346|-|-----|-----| |0101_000_011_111_010-{data} [TRAPT.W #<data>] 1409: //TRAPNF.W #<data> |A|--2346|-|-----|-----| |0101_000_011_111_010-{data} [TRAPT.W #<data>] 1410: //TRAPT.L #<data> |-|--2346|-|-----|-----| |0101_000_011_111_011-{data} 1411: //TPNF.L #<data> |A|--2346|-|-----|-----| |0101_000_011_111_011-{data} [TRAPT.L #<data>] 1412: //TPT.L #<data> |A|--2346|-|-----|-----| |0101_000_011_111_011-{data} [TRAPT.L #<data>] 1413: //TRAPNF.L #<data> |A|--2346|-|-----|-----| |0101_000_011_111_011-{data} [TRAPT.L #<data>] 1414: //TRAPT |-|--2346|-|-----|-----| |0101_000_011_111_100 1415: //TPNF |A|--2346|-|-----|-----| |0101_000_011_111_100 [TRAPT] 1416: //TPT |A|--2346|-|-----|-----| |0101_000_011_111_100 [TRAPT] 1417: //TRAPNF |A|--2346|-|-----|-----| |0101_000_011_111_100 [TRAPT] 1418: case 0b0101_000_011: 1419: irpSt (); 1420: break irpSwitch; 1421: 1422: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1423: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1424: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1425: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1426: //SUBQ.B #<data>,<ea> |-|012346|-|UUUUU|*****|D M+-WXZ |0101_qqq_100_mmm_rrr 1427: //DEC.B <ea> |A|012346|-|UUUUU|*****|D M+-WXZ |0101_001_100_mmm_rrr [SUBQ.B #1,<ea>] 1428: case 0b0101_000_100: 1429: case 0b0101_001_100: 1430: case 0b0101_010_100: 1431: case 0b0101_011_100: 1432: case 0b0101_100_100: 1433: case 0b0101_101_100: 1434: case 0b0101_110_100: 1435: case 0b0101_111_100: 1436: irpSubqByte (); 1437: break irpSwitch; 1438: 1439: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1440: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1441: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1442: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1443: //SUBQ.W #<data>,<ea> |-|012346|-|UUUUU|*****|D M+-WXZ |0101_qqq_101_mmm_rrr 1444: //SUBQ.W #<data>,Ar |-|012346|-|-----|-----| A |0101_qqq_101_001_rrr 1445: //DEC.W <ea> |A|012346|-|UUUUU|*****|D M+-WXZ |0101_001_101_mmm_rrr [SUBQ.W #1,<ea>] 1446: //DEC.W Ar |A|012346|-|-----|-----| A |0101_001_101_001_rrr [SUBQ.W #1,Ar] 1447: case 0b0101_000_101: 1448: case 0b0101_001_101: 1449: case 0b0101_010_101: 1450: case 0b0101_011_101: 1451: case 0b0101_100_101: 1452: case 0b0101_101_101: 1453: case 0b0101_110_101: 1454: case 0b0101_111_101: 1455: irpSubqWord (); 1456: break irpSwitch; 1457: 1458: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1459: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1460: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1461: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1462: //SUBQ.L #<data>,<ea> |-|012346|-|UUUUU|*****|D M+-WXZ |0101_qqq_110_mmm_rrr 1463: //SUBQ.L #<data>,Ar |-|012346|-|-----|-----| A |0101_qqq_110_001_rrr 1464: //DEC.L <ea> |A|012346|-|UUUUU|*****|D M+-WXZ |0101_001_110_mmm_rrr [SUBQ.L #1,<ea>] 1465: //DEC.L Ar |A|012346|-|-----|-----| A |0101_001_110_001_rrr [SUBQ.L #1,Ar] 1466: case 0b0101_000_110: 1467: case 0b0101_001_110: 1468: case 0b0101_010_110: 1469: case 0b0101_011_110: 1470: case 0b0101_100_110: 1471: case 0b0101_101_110: 1472: case 0b0101_110_110: 1473: case 0b0101_111_110: 1474: irpSubqLong (); 1475: break irpSwitch; 1476: 1477: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1478: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1479: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1480: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1481: //SF.B <ea> |-|012346|-|-----|-----|D M+-WXZ |0101_000_111_mmm_rrr 1482: //SNT.B <ea> |A|012346|-|-----|-----|D M+-WXZ |0101_000_111_mmm_rrr [SF.B <ea>] 1483: //DBF.W Dr,<label> |-|012346|-|-----|-----| |0101_000_111_001_rrr-{offset} 1484: //DBNT.W Dr,<label> |A|012346|-|-----|-----| |0101_000_111_001_rrr-{offset} [DBF.W Dr,<label>] 1485: //DBRA.W Dr,<label> |A|012346|-|-----|-----| |0101_000_111_001_rrr-{offset} [DBF.W Dr,<label>] 1486: //TRAPF.W #<data> |-|--2346|-|-----|-----| |0101_000_111_111_010-{data} 1487: //TPF.W #<data> |A|--2346|-|-----|-----| |0101_000_111_111_010-{data} [TRAPF.W #<data>] 1488: //TPNT.W #<data> |A|--2346|-|-----|-----| |0101_000_111_111_010-{data} [TRAPF.W #<data>] 1489: //TRAPNT.W #<data> |A|--2346|-|-----|-----| |0101_000_111_111_010-{data} [TRAPF.W #<data>] 1490: //TRAPF.L #<data> |-|--2346|-|-----|-----| |0101_000_111_111_011-{data} 1491: //TPF.L #<data> |A|--2346|-|-----|-----| |0101_000_111_111_011-{data} [TRAPF.L #<data>] 1492: //TPNT.L #<data> |A|--2346|-|-----|-----| |0101_000_111_111_011-{data} [TRAPF.L #<data>] 1493: //TRAPNT.L #<data> |A|--2346|-|-----|-----| |0101_000_111_111_011-{data} [TRAPF.L #<data>] 1494: //TRAPF |-|--2346|-|-----|-----| |0101_000_111_111_100 1495: //TPF |A|--2346|-|-----|-----| |0101_000_111_111_100 [TRAPF] 1496: //TPNT |A|--2346|-|-----|-----| |0101_000_111_111_100 [TRAPF] 1497: //TRAPNT |A|--2346|-|-----|-----| |0101_000_111_111_100 [TRAPF] 1498: case 0b0101_000_111: 1499: irpSf (); 1500: break irpSwitch; 1501: 1502: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1503: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1504: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1505: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1506: //SHI.B <ea> |-|012346|-|--*-*|-----|D M+-WXZ |0101_001_011_mmm_rrr 1507: //SNLS.B <ea> |A|012346|-|--*-*|-----|D M+-WXZ |0101_001_011_mmm_rrr [SHI.B <ea>] 1508: //DBHI.W Dr,<label> |-|012346|-|--*-*|-----| |0101_001_011_001_rrr-{offset} 1509: //DBNLS.W Dr,<label> |A|012346|-|--*-*|-----| |0101_001_011_001_rrr-{offset} [DBHI.W Dr,<label>] 1510: //TRAPHI.W #<data> |-|--2346|-|--*-*|-----| |0101_001_011_111_010-{data} 1511: //TPHI.W #<data> |A|--2346|-|--*-*|-----| |0101_001_011_111_010-{data} [TRAPHI.W #<data>] 1512: //TPNLS.W #<data> |A|--2346|-|--*-*|-----| |0101_001_011_111_010-{data} [TRAPHI.W #<data>] 1513: //TRAPNLS.W #<data> |A|--2346|-|--*-*|-----| |0101_001_011_111_010-{data} [TRAPHI.W #<data>] 1514: //TRAPHI.L #<data> |-|--2346|-|--*-*|-----| |0101_001_011_111_011-{data} 1515: //TPHI.L #<data> |A|--2346|-|--*-*|-----| |0101_001_011_111_011-{data} [TRAPHI.L #<data>] 1516: //TPNLS.L #<data> |A|--2346|-|--*-*|-----| |0101_001_011_111_011-{data} [TRAPHI.L #<data>] 1517: //TRAPNLS.L #<data> |A|--2346|-|--*-*|-----| |0101_001_011_111_011-{data} [TRAPHI.L #<data>] 1518: //TRAPHI |-|--2346|-|--*-*|-----| |0101_001_011_111_100 1519: //TPHI |A|--2346|-|--*-*|-----| |0101_001_011_111_100 [TRAPHI] 1520: //TPNLS |A|--2346|-|--*-*|-----| |0101_001_011_111_100 [TRAPHI] 1521: //TRAPNLS |A|--2346|-|--*-*|-----| |0101_001_011_111_100 [TRAPHI] 1522: case 0b0101_001_011: 1523: irpShi (); 1524: break irpSwitch; 1525: 1526: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1527: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1528: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1529: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1530: //SLS.B <ea> |-|012346|-|--*-*|-----|D M+-WXZ |0101_001_111_mmm_rrr 1531: //SNHI.B <ea> |A|012346|-|--*-*|-----|D M+-WXZ |0101_001_111_mmm_rrr [SLS.B <ea>] 1532: //DBLS.W Dr,<label> |-|012346|-|--*-*|-----| |0101_001_111_001_rrr-{offset} 1533: //DBNHI.W Dr,<label> |A|012346|-|--*-*|-----| |0101_001_111_001_rrr-{offset} [DBLS.W Dr,<label>] 1534: //TRAPLS.W #<data> |-|--2346|-|--*-*|-----| |0101_001_111_111_010-{data} 1535: //TPLS.W #<data> |A|--2346|-|--*-*|-----| |0101_001_111_111_010-{data} 1536: //TPNHI.W #<data> |A|--2346|-|--*-*|-----| |0101_001_111_111_010-{data} [TRAPLS.W #<data>] 1537: //TRAPNHI.W #<data> |A|--2346|-|--*-*|-----| |0101_001_111_111_010-{data} [TRAPLS.W #<data>] 1538: //TRAPLS.L #<data> |-|--2346|-|--*-*|-----| |0101_001_111_111_011-{data} 1539: //TPLS.L #<data> |A|--2346|-|--*-*|-----| |0101_001_111_111_011-{data} 1540: //TPNHI.L #<data> |A|--2346|-|--*-*|-----| |0101_001_111_111_011-{data} [TRAPLS.L #<data>] 1541: //TRAPNHI.L #<data> |A|--2346|-|--*-*|-----| |0101_001_111_111_011-{data} [TRAPLS.L #<data>] 1542: //TRAPLS |-|--2346|-|--*-*|-----| |0101_001_111_111_100 1543: //TPLS |A|--2346|-|--*-*|-----| |0101_001_111_111_100 [TRAPLS] 1544: //TPNHI |A|--2346|-|--*-*|-----| |0101_001_111_111_100 [TRAPLS] 1545: //TRAPNHI |A|--2346|-|--*-*|-----| |0101_001_111_111_100 [TRAPLS] 1546: case 0b0101_001_111: 1547: irpSls (); 1548: break irpSwitch; 1549: 1550: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1551: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1552: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1553: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1554: //SCC.B <ea> |-|012346|-|----*|-----|D M+-WXZ |0101_010_011_mmm_rrr 1555: //SHS.B <ea> |A|012346|-|----*|-----|D M+-WXZ |0101_010_011_mmm_rrr [SCC.B <ea>] 1556: //SNCS.B <ea> |A|012346|-|----*|-----|D M+-WXZ |0101_010_011_mmm_rrr [SCC.B <ea>] 1557: //SNLO.B <ea> |A|012346|-|----*|-----|D M+-WXZ |0101_010_011_mmm_rrr [SCC.B <ea>] 1558: //DBCC.W Dr,<label> |-|012346|-|----*|-----| |0101_010_011_001_rrr-{offset} 1559: //DBHS.W Dr,<label> |A|012346|-|----*|-----| |0101_010_011_001_rrr-{offset} [DBCC.W Dr,<label>] 1560: //DBNCS.W Dr,<label> |A|012346|-|----*|-----| |0101_010_011_001_rrr-{offset} [DBCC.W Dr,<label>] 1561: //DBNLO.W Dr,<label> |A|012346|-|----*|-----| |0101_010_011_001_rrr-{offset} [DBCC.W Dr,<label>] 1562: //TRAPCC.W #<data> |-|--2346|-|----*|-----| |0101_010_011_111_010-{data} 1563: //TPCC.W #<data> |A|--2346|-|----*|-----| |0101_010_011_111_010-{data} [TRAPCC.W #<data>] 1564: //TPHS.W #<data> |A|--2346|-|----*|-----| |0101_010_011_111_010-{data} [TRAPCC.W #<data>] 1565: //TPNCS.W #<data> |A|--2346|-|----*|-----| |0101_010_011_111_010-{data} [TRAPCC.W #<data>] 1566: //TPNLO.W #<data> |A|--2346|-|----*|-----| |0101_010_011_111_010-{data} [TRAPCC.W #<data>] 1567: //TRAPHS.W #<data> |A|--2346|-|----*|-----| |0101_010_011_111_010-{data} [TRAPCC.W #<data>] 1568: //TRAPNCS.W #<data> |A|--2346|-|----*|-----| |0101_010_011_111_010-{data} [TRAPCC.W #<data>] 1569: //TRAPNLO.W #<data> |A|--2346|-|----*|-----| |0101_010_011_111_010-{data} [TRAPCC.W #<data>] 1570: //TRAPCC.L #<data> |-|--2346|-|----*|-----| |0101_010_011_111_011-{data} 1571: //TPCC.L #<data> |A|--2346|-|----*|-----| |0101_010_011_111_011-{data} [TRAPCC.L #<data>] 1572: //TPHS.L #<data> |A|--2346|-|----*|-----| |0101_010_011_111_011-{data} [TRAPCC.L #<data>] 1573: //TPNCS.L #<data> |A|--2346|-|----*|-----| |0101_010_011_111_011-{data} [TRAPCC.L #<data>] 1574: //TPNLO.L #<data> |A|--2346|-|----*|-----| |0101_010_011_111_011-{data} [TRAPCC.L #<data>] 1575: //TRAPHS.L #<data> |A|--2346|-|----*|-----| |0101_010_011_111_011-{data} [TRAPCC.L #<data>] 1576: //TRAPNCS.L #<data> |A|--2346|-|----*|-----| |0101_010_011_111_011-{data} [TRAPCC.L #<data>] 1577: //TRAPNLO.L #<data> |A|--2346|-|----*|-----| |0101_010_011_111_011-{data} [TRAPCC.L #<data>] 1578: //TRAPCC |-|--2346|-|----*|-----| |0101_010_011_111_100 1579: //TPCC |A|--2346|-|----*|-----| |0101_010_011_111_100 [TRAPCC] 1580: //TPHS |A|--2346|-|----*|-----| |0101_010_011_111_100 [TRAPCC] 1581: //TPNCS |A|--2346|-|----*|-----| |0101_010_011_111_100 [TRAPCC] 1582: //TPNLO |A|--2346|-|----*|-----| |0101_010_011_111_100 [TRAPCC] 1583: //TRAPHS |A|--2346|-|----*|-----| |0101_010_011_111_100 [TRAPCC] 1584: //TRAPNCS |A|--2346|-|----*|-----| |0101_010_011_111_100 [TRAPCC] 1585: //TRAPNLO |A|--2346|-|----*|-----| |0101_010_011_111_100 [TRAPCC] 1586: case 0b0101_010_011: 1587: irpShs (); 1588: break irpSwitch; 1589: 1590: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1591: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1592: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1593: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1594: //SCS.B <ea> |-|012346|-|----*|-----|D M+-WXZ |0101_010_111_mmm_rrr 1595: //SLO.B <ea> |A|012346|-|----*|-----|D M+-WXZ |0101_010_111_mmm_rrr [SCS.B <ea>] 1596: //SNCC.B <ea> |A|012346|-|----*|-----|D M+-WXZ |0101_010_111_mmm_rrr [SCS.B <ea>] 1597: //SNHS.B <ea> |A|012346|-|----*|-----|D M+-WXZ |0101_010_111_mmm_rrr [SCS.B <ea>] 1598: //DBCS.W Dr,<label> |-|012346|-|----*|-----| |0101_010_111_001_rrr-{offset} 1599: //DBLO.W Dr,<label> |A|012346|-|----*|-----| |0101_010_111_001_rrr-{offset} [DBCS.W Dr,<label>] 1600: //DBNCC.W Dr,<label> |A|012346|-|----*|-----| |0101_010_111_001_rrr-{offset} [DBCS.W Dr,<label>] 1601: //DBNHS.W Dr,<label> |A|012346|-|----*|-----| |0101_010_111_001_rrr-{offset} [DBCS.W Dr,<label>] 1602: //TRAPCS.W #<data> |-|--2346|-|----*|-----| |0101_010_111_111_010-{data} 1603: //TPCS.W #<data> |A|--2346|-|----*|-----| |0101_010_111_111_010-{data} [TRAPCS.W #<data>] 1604: //TPLO.W #<data> |A|--2346|-|----*|-----| |0101_010_111_111_010-{data} [TRAPCS.W #<data>] 1605: //TPNCC.W #<data> |A|--2346|-|----*|-----| |0101_010_111_111_010-{data} [TRAPCS.W #<data>] 1606: //TPNHS.W #<data> |A|--2346|-|----*|-----| |0101_010_111_111_010-{data} [TRAPCS.W #<data>] 1607: //TRAPLO.W #<data> |A|--2346|-|----*|-----| |0101_010_111_111_010-{data} [TRAPCS.W #<data>] 1608: //TRAPNCC.W #<data> |A|--2346|-|----*|-----| |0101_010_111_111_010-{data} [TRAPCS.W #<data>] 1609: //TRAPNHS.W #<data> |A|--2346|-|----*|-----| |0101_010_111_111_010-{data} [TRAPCS.W #<data>] 1610: //TRAPCS.L #<data> |-|--2346|-|----*|-----| |0101_010_111_111_011-{data} 1611: //TPCS.L #<data> |A|--2346|-|----*|-----| |0101_010_111_111_011-{data} [TRAPCS.L #<data>] 1612: //TPLO.L #<data> |A|--2346|-|----*|-----| |0101_010_111_111_011-{data} [TRAPCS.L #<data>] 1613: //TPNCC.L #<data> |A|--2346|-|----*|-----| |0101_010_111_111_011-{data} [TRAPCS.L #<data>] 1614: //TPNHS.L #<data> |A|--2346|-|----*|-----| |0101_010_111_111_011-{data} [TRAPCS.L #<data>] 1615: //TRAPLO.L #<data> |A|--2346|-|----*|-----| |0101_010_111_111_011-{data} [TRAPCS.L #<data>] 1616: //TRAPNCC.L #<data> |A|--2346|-|----*|-----| |0101_010_111_111_011-{data} [TRAPCS.L #<data>] 1617: //TRAPNHS.L #<data> |A|--2346|-|----*|-----| |0101_010_111_111_011-{data} [TRAPCS.L #<data>] 1618: //TRAPCS |-|--2346|-|----*|-----| |0101_010_111_111_100 1619: //TPCS |A|--2346|-|----*|-----| |0101_010_111_111_100 [TRAPCS] 1620: //TPLO |A|--2346|-|----*|-----| |0101_010_111_111_100 [TRAPCS] 1621: //TPNCC |A|--2346|-|----*|-----| |0101_010_111_111_100 [TRAPCS] 1622: //TPNHS |A|--2346|-|----*|-----| |0101_010_111_111_100 [TRAPCS] 1623: //TRAPLO |A|--2346|-|----*|-----| |0101_010_111_111_100 [TRAPCS] 1624: //TRAPNCC |A|--2346|-|----*|-----| |0101_010_111_111_100 [TRAPCS] 1625: //TRAPNHS |A|--2346|-|----*|-----| |0101_010_111_111_100 [TRAPCS] 1626: case 0b0101_010_111: 1627: irpSlo (); 1628: break irpSwitch; 1629: 1630: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1631: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1632: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1633: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1634: //SNE.B <ea> |-|012346|-|--*--|-----|D M+-WXZ |0101_011_011_mmm_rrr 1635: //SNEQ.B <ea> |A|012346|-|--*--|-----|D M+-WXZ |0101_011_011_mmm_rrr [SNE.B <ea>] 1636: //SNZ.B <ea> |A|012346|-|--*--|-----|D M+-WXZ |0101_011_011_mmm_rrr [SNE.B <ea>] 1637: //SNZE.B <ea> |A|012346|-|--*--|-----|D M+-WXZ |0101_011_011_mmm_rrr [SNE.B <ea>] 1638: //DBNE.W Dr,<label> |-|012346|-|--*--|-----| |0101_011_011_001_rrr-{offset} 1639: //DBNEQ.W Dr,<label> |A|012346|-|--*--|-----| |0101_011_011_001_rrr-{offset} [DBNE.W Dr,<label>] 1640: //DBNZ.W Dr,<label> |A|012346|-|--*--|-----| |0101_011_011_001_rrr-{offset} [DBNE.W Dr,<label>] 1641: //DBNZE.W Dr,<label> |A|012346|-|--*--|-----| |0101_011_011_001_rrr-{offset} [DBNE.W Dr,<label>] 1642: //TRAPNE.W #<data> |-|--2346|-|--*--|-----| |0101_011_011_111_010-{data} 1643: //TPNE.W #<data> |A|--2346|-|--*--|-----| |0101_011_011_111_010-{data} [TRAPNE.W #<data>] 1644: //TPNEQ.W #<data> |A|--2346|-|--*--|-----| |0101_011_011_111_010-{data} [TRAPNE.W #<data>] 1645: //TPNZ.W #<data> |A|--2346|-|--*--|-----| |0101_011_011_111_010-{data} [TRAPNE.W #<data>] 1646: //TPNZE.W #<data> |A|--2346|-|--*--|-----| |0101_011_011_111_010-{data} [TRAPNE.W #<data>] 1647: //TRAPNEQ.W #<data> |A|--2346|-|--*--|-----| |0101_011_011_111_010-{data} [TRAPNE.W #<data>] 1648: //TRAPNZ.W #<data> |A|--2346|-|--*--|-----| |0101_011_011_111_010-{data} [TRAPNE.W #<data>] 1649: //TRAPNZE.W #<data> |A|--2346|-|--*--|-----| |0101_011_011_111_010-{data} [TRAPNE.W #<data>] 1650: //TRAPNE.L #<data> |-|--2346|-|--*--|-----| |0101_011_011_111_011-{data} 1651: //TPNE.L #<data> |A|--2346|-|--*--|-----| |0101_011_011_111_011-{data} [TRAPNE.L #<data>] 1652: //TPNEQ.L #<data> |A|--2346|-|--*--|-----| |0101_011_011_111_011-{data} [TRAPNE.L #<data>] 1653: //TPNZ.L #<data> |A|--2346|-|--*--|-----| |0101_011_011_111_011-{data} [TRAPNE.L #<data>] 1654: //TPNZE.L #<data> |A|--2346|-|--*--|-----| |0101_011_011_111_011-{data} [TRAPNE.L #<data>] 1655: //TRAPNEQ.L #<data> |A|--2346|-|--*--|-----| |0101_011_011_111_011-{data} [TRAPNE.L #<data>] 1656: //TRAPNZ.L #<data> |A|--2346|-|--*--|-----| |0101_011_011_111_011-{data} [TRAPNE.L #<data>] 1657: //TRAPNZE.L #<data> |A|--2346|-|--*--|-----| |0101_011_011_111_011-{data} [TRAPNE.L #<data>] 1658: //TRAPNE |-|--2346|-|--*--|-----| |0101_011_011_111_100 1659: //TPNE |A|--2346|-|--*--|-----| |0101_011_011_111_100 [TRAPNE] 1660: //TPNEQ |A|--2346|-|--*--|-----| |0101_011_011_111_100 [TRAPNE] 1661: //TPNZ |A|--2346|-|--*--|-----| |0101_011_011_111_100 [TRAPNE] 1662: //TPNZE |A|--2346|-|--*--|-----| |0101_011_011_111_100 [TRAPNE] 1663: //TRAPNEQ |A|--2346|-|--*--|-----| |0101_011_011_111_100 [TRAPNE] 1664: //TRAPNZ |A|--2346|-|--*--|-----| |0101_011_011_111_100 [TRAPNE] 1665: //TRAPNZE |A|--2346|-|--*--|-----| |0101_011_011_111_100 [TRAPNE] 1666: case 0b0101_011_011: 1667: irpSne (); 1668: break irpSwitch; 1669: 1670: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1671: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1672: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1673: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1674: //SEQ.B <ea> |-|012346|-|--*--|-----|D M+-WXZ |0101_011_111_mmm_rrr 1675: //SNNE.B <ea> |A|012346|-|--*--|-----|D M+-WXZ |0101_011_111_mmm_rrr [SEQ.B <ea>] 1676: //SNNZ.B <ea> |A|012346|-|--*--|-----|D M+-WXZ |0101_011_111_mmm_rrr [SEQ.B <ea>] 1677: //SZE.B <ea> |A|012346|-|--*--|-----|D M+-WXZ |0101_011_111_mmm_rrr [SEQ.B <ea>] 1678: //DBEQ.W Dr,<label> |-|012346|-|--*--|-----| |0101_011_111_001_rrr-{offset} 1679: //DBNNE.W Dr,<label> |A|012346|-|--*--|-----| |0101_011_111_001_rrr-{offset} [DBEQ.W Dr,<label>] 1680: //DBNNZ.W Dr,<label> |A|012346|-|--*--|-----| |0101_011_111_001_rrr-{offset} [DBEQ.W Dr,<label>] 1681: //DBZE.W Dr,<label> |A|012346|-|--*--|-----| |0101_011_111_001_rrr-{offset} [DBEQ.W Dr,<label>] 1682: //TRAPEQ.W #<data> |-|--2346|-|--*--|-----| |0101_011_111_111_010-{data} 1683: //TPEQ.W #<data> |A|--2346|-|--*--|-----| |0101_011_111_111_010-{data} [TRAPEQ.W #<data>] 1684: //TPNNE.W #<data> |A|--2346|-|--*--|-----| |0101_011_111_111_010-{data} [TRAPEQ.W #<data>] 1685: //TPNNZ.W #<data> |A|--2346|-|--*--|-----| |0101_011_111_111_010-{data} [TRAPEQ.W #<data>] 1686: //TPZE.W #<data> |A|--2346|-|--*--|-----| |0101_011_111_111_010-{data} [TRAPEQ.W #<data>] 1687: //TRAPNNE.W #<data> |A|--2346|-|--*--|-----| |0101_011_111_111_010-{data} [TRAPEQ.W #<data>] 1688: //TRAPNNZ.W #<data> |A|--2346|-|--*--|-----| |0101_011_111_111_010-{data} [TRAPEQ.W #<data>] 1689: //TRAPZE.W #<data> |A|--2346|-|--*--|-----| |0101_011_111_111_010-{data} [TRAPEQ.W #<data>] 1690: //TRAPEQ.L #<data> |-|--2346|-|--*--|-----| |0101_011_111_111_011-{data} 1691: //TPEQ.L #<data> |A|--2346|-|--*--|-----| |0101_011_111_111_011-{data} [TRAPEQ.L #<data>] 1692: //TPNNE.L #<data> |A|--2346|-|--*--|-----| |0101_011_111_111_011-{data} [TRAPEQ.L #<data>] 1693: //TPNNZ.L #<data> |A|--2346|-|--*--|-----| |0101_011_111_111_011-{data} [TRAPEQ.L #<data>] 1694: //TPZE.L #<data> |A|--2346|-|--*--|-----| |0101_011_111_111_011-{data} [TRAPEQ.L #<data>] 1695: //TRAPNNE.L #<data> |A|--2346|-|--*--|-----| |0101_011_111_111_011-{data} [TRAPEQ.L #<data>] 1696: //TRAPNNZ.L #<data> |A|--2346|-|--*--|-----| |0101_011_111_111_011-{data} [TRAPEQ.L #<data>] 1697: //TRAPZE.L #<data> |A|--2346|-|--*--|-----| |0101_011_111_111_011-{data} [TRAPEQ.L #<data>] 1698: //TRAPEQ |-|--2346|-|--*--|-----| |0101_011_111_111_100 1699: //TPEQ |A|--2346|-|--*--|-----| |0101_011_111_111_100 [TRAPEQ] 1700: //TPNNE |A|--2346|-|--*--|-----| |0101_011_111_111_100 [TRAPEQ] 1701: //TPNNZ |A|--2346|-|--*--|-----| |0101_011_111_111_100 [TRAPEQ] 1702: //TPZE |A|--2346|-|--*--|-----| |0101_011_111_111_100 [TRAPEQ] 1703: //TRAPNNE |A|--2346|-|--*--|-----| |0101_011_111_111_100 [TRAPEQ] 1704: //TRAPNNZ |A|--2346|-|--*--|-----| |0101_011_111_111_100 [TRAPEQ] 1705: //TRAPZE |A|--2346|-|--*--|-----| |0101_011_111_111_100 [TRAPEQ] 1706: case 0b0101_011_111: 1707: irpSeq (); 1708: break irpSwitch; 1709: 1710: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1711: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1712: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1713: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1714: //SVC.B <ea> |-|012346|-|---*-|-----|D M+-WXZ |0101_100_011_mmm_rrr 1715: //SNVS.B <ea> |A|012346|-|---*-|-----|D M+-WXZ |0101_100_011_mmm_rrr [SVC.B <ea>] 1716: //DBVC.W Dr,<label> |-|012346|-|---*-|-----| |0101_100_011_001_rrr-{offset} 1717: //DBNVS.W Dr,<label> |A|012346|-|---*-|-----| |0101_100_011_001_rrr-{offset} [DBVC.W Dr,<label>] 1718: //TRAPVC.W #<data> |-|--2346|-|---*-|-----| |0101_100_011_111_010-{data} 1719: //TPNVS.W #<data> |A|--2346|-|---*-|-----| |0101_100_011_111_010-{data} [TRAPVC.W #<data>] 1720: //TPVC.W #<data> |A|--2346|-|---*-|-----| |0101_100_011_111_010-{data} [TRAPVC.W #<data>] 1721: //TRAPNVS.W #<data> |A|--2346|-|---*-|-----| |0101_100_011_111_010-{data} [TRAPVC.W #<data>] 1722: //TRAPVC.L #<data> |-|--2346|-|---*-|-----| |0101_100_011_111_011-{data} 1723: //TPNVS.L #<data> |A|--2346|-|---*-|-----| |0101_100_011_111_011-{data} [TRAPVC.L #<data>] 1724: //TPVC.L #<data> |A|--2346|-|---*-|-----| |0101_100_011_111_011-{data} [TRAPVC.L #<data>] 1725: //TRAPNVS.L #<data> |A|--2346|-|---*-|-----| |0101_100_011_111_011-{data} [TRAPVC.L #<data>] 1726: //TRAPVC |-|--2346|-|---*-|-----| |0101_100_011_111_100 1727: //TPNVS |A|--2346|-|---*-|-----| |0101_100_011_111_100 [TRAPVC] 1728: //TPVC |A|--2346|-|---*-|-----| |0101_100_011_111_100 [TRAPVC] 1729: //TRAPNVS |A|--2346|-|---*-|-----| |0101_100_011_111_100 [TRAPVC] 1730: case 0b0101_100_011: 1731: irpSvc (); 1732: break irpSwitch; 1733: 1734: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1735: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1736: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1737: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1738: //SVS.B <ea> |-|012346|-|---*-|-----|D M+-WXZ |0101_100_111_mmm_rrr 1739: //SNVC.B <ea> |A|012346|-|---*-|-----|D M+-WXZ |0101_100_111_mmm_rrr [SVS.B <ea>] 1740: //DBVS.W Dr,<label> |-|012346|-|---*-|-----| |0101_100_111_001_rrr-{offset} 1741: //DBNVC.W Dr,<label> |A|012346|-|---*-|-----| |0101_100_111_001_rrr-{offset} [DBVS.W Dr,<label>] 1742: //TRAPVS.W #<data> |-|--2346|-|---*-|-----| |0101_100_111_111_010-{data} 1743: //TPNVC.W #<data> |A|--2346|-|---*-|-----| |0101_100_111_111_010-{data} [TRAPVS.W #<data>] 1744: //TPVS.W #<data> |A|--2346|-|---*-|-----| |0101_100_111_111_010-{data} [TRAPVS.W #<data>] 1745: //TRAPNVC.W #<data> |A|--2346|-|---*-|-----| |0101_100_111_111_010-{data} [TRAPVS.W #<data>] 1746: //TRAPVS.L #<data> |-|--2346|-|---*-|-----| |0101_100_111_111_011-{data} 1747: //TPNVC.L #<data> |A|--2346|-|---*-|-----| |0101_100_111_111_011-{data} [TRAPVS.L #<data>] 1748: //TPVS.L #<data> |A|--2346|-|---*-|-----| |0101_100_111_111_011-{data} [TRAPVS.L #<data>] 1749: //TRAPNVC.L #<data> |A|--2346|-|---*-|-----| |0101_100_111_111_011-{data} [TRAPVS.L #<data>] 1750: //TRAPVS |-|--2346|-|---*-|-----| |0101_100_111_111_100 1751: //TPNVC |A|--2346|-|---*-|-----| |0101_100_111_111_100 [TRAPVS] 1752: //TPVS |A|--2346|-|---*-|-----| |0101_100_111_111_100 [TRAPVS] 1753: //TRAPNVC |A|--2346|-|---*-|-----| |0101_100_111_111_100 [TRAPVS] 1754: case 0b0101_100_111: 1755: irpSvs (); 1756: break irpSwitch; 1757: 1758: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1759: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1760: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1761: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1762: //SPL.B <ea> |-|012346|-|-*---|-----|D M+-WXZ |0101_101_011_mmm_rrr 1763: //SNMI.B <ea> |A|012346|-|-*---|-----|D M+-WXZ |0101_101_011_mmm_rrr [SPL.B <ea>] 1764: //DBPL.W Dr,<label> |-|012346|-|-*---|-----| |0101_101_011_001_rrr-{offset} 1765: //DBNMI.W Dr,<label> |A|012346|-|-*---|-----| |0101_101_011_001_rrr-{offset} [DBPL.W Dr,<label>] 1766: //TRAPPL.W #<data> |-|--2346|-|-*---|-----| |0101_101_011_111_010-{data} 1767: //TPNMI.W #<data> |A|--2346|-|-*---|-----| |0101_101_011_111_010-{data} [TRAPPL.W #<data>] 1768: //TPPL.W #<data> |A|--2346|-|-*---|-----| |0101_101_011_111_010-{data} [TRAPPL.W #<data>] 1769: //TRAPNMI.W #<data> |A|--2346|-|-*---|-----| |0101_101_011_111_010-{data} [TRAPPL.W #<data>] 1770: //TRAPPL.L #<data> |-|--2346|-|-*---|-----| |0101_101_011_111_011-{data} 1771: //TPNMI.L #<data> |A|--2346|-|-*---|-----| |0101_101_011_111_011-{data} [TRAPPL.L #<data>] 1772: //TPPL.L #<data> |A|--2346|-|-*---|-----| |0101_101_011_111_011-{data} [TRAPPL.L #<data>] 1773: //TRAPNMI.L #<data> |A|--2346|-|-*---|-----| |0101_101_011_111_011-{data} [TRAPPL.L #<data>] 1774: //TRAPPL |-|--2346|-|-*---|-----| |0101_101_011_111_100 1775: //TPNMI |A|--2346|-|-*---|-----| |0101_101_011_111_100 [TRAPPL] 1776: //TPPL |A|--2346|-|-*---|-----| |0101_101_011_111_100 [TRAPPL] 1777: //TRAPNMI |A|--2346|-|-*---|-----| |0101_101_011_111_100 [TRAPPL] 1778: case 0b0101_101_011: 1779: irpSpl (); 1780: break irpSwitch; 1781: 1782: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1783: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1784: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1785: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1786: //SMI.B <ea> |-|012346|-|-*---|-----|D M+-WXZ |0101_101_111_mmm_rrr 1787: //SNPL.B <ea> |A|012346|-|-*---|-----|D M+-WXZ |0101_101_111_mmm_rrr [SMI.B <ea>] 1788: //DBMI.W Dr,<label> |-|012346|-|-*---|-----| |0101_101_111_001_rrr-{offset} 1789: //DBNPL.W Dr,<label> |A|012346|-|-*---|-----| |0101_101_111_001_rrr-{offset} [DBMI.W Dr,<label>] 1790: //TRAPMI.W #<data> |-|--2346|-|-*---|-----| |0101_101_111_111_010-{data} 1791: //TPMI.W #<data> |A|--2346|-|-*---|-----| |0101_101_111_111_010-{data} [TRAPMI.W #<data>] 1792: //TPNPL.W #<data> |A|--2346|-|-*---|-----| |0101_101_111_111_010-{data} [TRAPMI.W #<data>] 1793: //TRAPNPL.W #<data> |A|--2346|-|-*---|-----| |0101_101_111_111_010-{data} [TRAPMI.W #<data>] 1794: //TRAPMI.L #<data> |-|--2346|-|-*---|-----| |0101_101_111_111_011-{data} 1795: //TPMI.L #<data> |A|--2346|-|-*---|-----| |0101_101_111_111_011-{data} [TRAPMI.L #<data>] 1796: //TPNPL.L #<data> |A|--2346|-|-*---|-----| |0101_101_111_111_011-{data} [TRAPMI.L #<data>] 1797: //TRAPNPL.L #<data> |A|--2346|-|-*---|-----| |0101_101_111_111_011-{data} [TRAPMI.L #<data>] 1798: //TRAPMI |-|--2346|-|-*---|-----| |0101_101_111_111_100 1799: //TPMI |A|--2346|-|-*---|-----| |0101_101_111_111_100 [TRAPMI] 1800: //TPNPL |A|--2346|-|-*---|-----| |0101_101_111_111_100 [TRAPMI] 1801: //TRAPNPL |A|--2346|-|-*---|-----| |0101_101_111_111_100 [TRAPMI] 1802: case 0b0101_101_111: 1803: irpSmi (); 1804: break irpSwitch; 1805: 1806: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1807: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1808: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1809: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1810: //SGE.B <ea> |-|012346|-|-*-*-|-----|D M+-WXZ |0101_110_011_mmm_rrr 1811: //SNLT.B <ea> |A|012346|-|-*-*-|-----|D M+-WXZ |0101_110_011_mmm_rrr [SGE.B <ea>] 1812: //DBGE.W Dr,<label> |-|012346|-|-*-*-|-----| |0101_110_011_001_rrr-{offset} 1813: //DBNLT.W Dr,<label> |A|012346|-|-*-*-|-----| |0101_110_011_001_rrr-{offset} [DBGE.W Dr,<label>] 1814: //TRAPGE.W #<data> |-|--2346|-|-*-*-|-----| |0101_110_011_111_010-{data} 1815: //TPGE.W #<data> |A|--2346|-|-*-*-|-----| |0101_110_011_111_010-{data} [TRAPGE.W #<data>] 1816: //TPNLT.W #<data> |A|--2346|-|-*-*-|-----| |0101_110_011_111_010-{data} [TRAPGE.W #<data>] 1817: //TRAPNLT.W #<data> |A|--2346|-|-*-*-|-----| |0101_110_011_111_010-{data} [TRAPGE.W #<data>] 1818: //TRAPGE.L #<data> |-|--2346|-|-*-*-|-----| |0101_110_011_111_011-{data} 1819: //TPGE.L #<data> |A|--2346|-|-*-*-|-----| |0101_110_011_111_011-{data} [TRAPGE.L #<data>] 1820: //TPNLT.L #<data> |A|--2346|-|-*-*-|-----| |0101_110_011_111_011-{data} [TRAPGE.L #<data>] 1821: //TRAPNLT.L #<data> |A|--2346|-|-*-*-|-----| |0101_110_011_111_011-{data} [TRAPGE.L #<data>] 1822: //TRAPGE |-|--2346|-|-*-*-|-----| |0101_110_011_111_100 1823: //TPGE |A|--2346|-|-*-*-|-----| |0101_110_011_111_100 [TRAPGE] 1824: //TPNLT |A|--2346|-|-*-*-|-----| |0101_110_011_111_100 [TRAPGE] 1825: //TRAPNLT |A|--2346|-|-*-*-|-----| |0101_110_011_111_100 [TRAPGE] 1826: case 0b0101_110_011: 1827: irpSge (); 1828: break irpSwitch; 1829: 1830: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1831: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1832: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1833: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1834: //SLT.B <ea> |-|012346|-|-*-*-|-----|D M+-WXZ |0101_110_111_mmm_rrr 1835: //SNGE.B <ea> |A|012346|-|-*-*-|-----|D M+-WXZ |0101_110_111_mmm_rrr [SLT.B <ea>] 1836: //DBLT.W Dr,<label> |-|012346|-|-*-*-|-----| |0101_110_111_001_rrr-{offset} 1837: //DBNGE.W Dr,<label> |A|012346|-|-*-*-|-----| |0101_110_111_001_rrr-{offset} [DBLT.W Dr,<label>] 1838: //TRAPLT.W #<data> |-|--2346|-|-*-*-|-----| |0101_110_111_111_010-{data} 1839: //TPLT.W #<data> |A|--2346|-|-*-*-|-----| |0101_110_111_111_010-{data} [TRAPLT.W #<data>] 1840: //TPNGE.W #<data> |A|--2346|-|-*-*-|-----| |0101_110_111_111_010-{data} [TRAPLT.W #<data>] 1841: //TRAPNGE.W #<data> |A|--2346|-|-*-*-|-----| |0101_110_111_111_010-{data} [TRAPLT.W #<data>] 1842: //TRAPLT.L #<data> |-|--2346|-|-*-*-|-----| |0101_110_111_111_011-{data} 1843: //TPLT.L #<data> |A|--2346|-|-*-*-|-----| |0101_110_111_111_011-{data} [TRAPLT.L #<data>] 1844: //TPNGE.L #<data> |A|--2346|-|-*-*-|-----| |0101_110_111_111_011-{data} [TRAPLT.L #<data>] 1845: //TRAPNGE.L #<data> |A|--2346|-|-*-*-|-----| |0101_110_111_111_011-{data} [TRAPLT.L #<data>] 1846: //TRAPLT |-|--2346|-|-*-*-|-----| |0101_110_111_111_100 1847: //TPLT |A|--2346|-|-*-*-|-----| |0101_110_111_111_100 [TRAPLT] 1848: //TPNGE |A|--2346|-|-*-*-|-----| |0101_110_111_111_100 [TRAPLT] 1849: //TRAPNGE |A|--2346|-|-*-*-|-----| |0101_110_111_111_100 [TRAPLT] 1850: case 0b0101_110_111: 1851: irpSlt (); 1852: break irpSwitch; 1853: 1854: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1855: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1856: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1857: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1858: //SGT.B <ea> |-|012346|-|-***-|-----|D M+-WXZ |0101_111_011_mmm_rrr 1859: //SNLE.B <ea> |A|012346|-|-***-|-----|D M+-WXZ |0101_111_011_mmm_rrr [SGT.B <ea>] 1860: //DBGT.W Dr,<label> |-|012346|-|-***-|-----| |0101_111_011_001_rrr-{offset} 1861: //DBNLE.W Dr,<label> |A|012346|-|-***-|-----| |0101_111_011_001_rrr-{offset} [DBGT.W Dr,<label>] 1862: //TRAPGT.W #<data> |-|--2346|-|-***-|-----| |0101_111_011_111_010-{data} 1863: //TPGT.W #<data> |A|--2346|-|-***-|-----| |0101_111_011_111_010-{data} [TRAPGT.W #<data>] 1864: //TPNLE.W #<data> |A|--2346|-|-***-|-----| |0101_111_011_111_010-{data} [TRAPGT.W #<data>] 1865: //TRAPNLE.W #<data> |A|--2346|-|-***-|-----| |0101_111_011_111_010-{data} [TRAPGT.W #<data>] 1866: //TRAPGT.L #<data> |-|--2346|-|-***-|-----| |0101_111_011_111_011-{data} 1867: //TPGT.L #<data> |A|--2346|-|-***-|-----| |0101_111_011_111_011-{data} [TRAPGT.L #<data>] 1868: //TPNLE.L #<data> |A|--2346|-|-***-|-----| |0101_111_011_111_011-{data} [TRAPGT.L #<data>] 1869: //TRAPNLE.L #<data> |A|--2346|-|-***-|-----| |0101_111_011_111_011-{data} [TRAPGT.L #<data>] 1870: //TRAPGT |-|--2346|-|-***-|-----| |0101_111_011_111_100 1871: //TPGT |A|--2346|-|-***-|-----| |0101_111_011_111_100 [TRAPGT] 1872: //TPNLE |A|--2346|-|-***-|-----| |0101_111_011_111_100 [TRAPGT] 1873: //TRAPNLE |A|--2346|-|-***-|-----| |0101_111_011_111_100 [TRAPGT] 1874: case 0b0101_111_011: 1875: irpSgt (); 1876: break irpSwitch; 1877: 1878: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1879: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1880: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1881: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1882: //SLE.B <ea> |-|012346|-|-***-|-----|D M+-WXZ |0101_111_111_mmm_rrr 1883: //SNGT.B <ea> |A|012346|-|-***-|-----|D M+-WXZ |0101_111_111_mmm_rrr [SLE.B <ea>] 1884: //DBLE.W Dr,<label> |-|012346|-|-***-|-----| |0101_111_111_001_rrr-{offset} 1885: //DBNGT.W Dr,<label> |A|012346|-|-***-|-----| |0101_111_111_001_rrr-{offset} [DBLE.W Dr,<label>] 1886: //TRAPLE.W #<data> |-|--2346|-|-***-|-----| |0101_111_111_111_010-{data} 1887: //TPLE.W #<data> |A|--2346|-|-***-|-----| |0101_111_111_111_010-{data} [TRAPLE.W #<data>] 1888: //TPNGT.W #<data> |A|--2346|-|-***-|-----| |0101_111_111_111_010-{data} [TRAPLE.W #<data>] 1889: //TRAPNGT.W #<data> |A|--2346|-|-***-|-----| |0101_111_111_111_010-{data} [TRAPLE.W #<data>] 1890: //TRAPLE.L #<data> |-|--2346|-|-***-|-----| |0101_111_111_111_011-{data} 1891: //TPLE.L #<data> |A|--2346|-|-***-|-----| |0101_111_111_111_011-{data} [TRAPLE.L #<data>] 1892: //TPNGT.L #<data> |A|--2346|-|-***-|-----| |0101_111_111_111_011-{data} [TRAPLE.L #<data>] 1893: //TRAPNGT.L #<data> |A|--2346|-|-***-|-----| |0101_111_111_111_011-{data} [TRAPLE.L #<data>] 1894: //TRAPLE |-|--2346|-|-***-|-----| |0101_111_111_111_100 1895: //TPLE |A|--2346|-|-***-|-----| |0101_111_111_111_100 [TRAPLE] 1896: //TPNGT |A|--2346|-|-***-|-----| |0101_111_111_111_100 [TRAPLE] 1897: //TRAPNGT |A|--2346|-|-***-|-----| |0101_111_111_111_100 [TRAPLE] 1898: case 0b0101_111_111: 1899: irpSle (); 1900: break irpSwitch; 1901: 1902: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1903: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1904: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1905: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1906: //BRA.W <label> |-|012346|-|-----|-----| |0110_000_000_000_000-{offset} 1907: //JBRA.W <label> |A|012346|-|-----|-----| |0110_000_000_000_000-{offset} [BRA.W <label>] 1908: //BRA.S <label> |-|012346|-|-----|-----| |0110_000_000_sss_sss (s is not equal to 0) 1909: //JBRA.S <label> |A|012346|-|-----|-----| |0110_000_000_sss_sss (s is not equal to 0) [BRA.S <label>] 1910: case 0b0110_000_000: 1911: irpBrasw (); 1912: break irpSwitch; 1913: 1914: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1915: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1916: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1917: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1918: //BRA.S <label> |-|012346|-|-----|-----| |0110_000_001_sss_sss 1919: //JBRA.S <label> |A|012346|-|-----|-----| |0110_000_001_sss_sss [BRA.S <label>] 1920: case 0b0110_000_001: 1921: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1922: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1923: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1924: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1925: //BRA.S <label> |-|012346|-|-----|-----| |0110_000_010_sss_sss 1926: //JBRA.S <label> |A|012346|-|-----|-----| |0110_000_010_sss_sss [BRA.S <label>] 1927: case 0b0110_000_010: 1928: irpBras (); 1929: break irpSwitch; 1930: 1931: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1932: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1933: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1934: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1935: //BRA.S <label> |-|--2346|-|-----|-----| |0110_000_011_sss_sss (s is not equal to 63) 1936: //JBRA.S <label> |A|--2346|-|-----|-----| |0110_000_011_sss_sss (s is not equal to 63) [BRA.S <label>] 1937: //BRA.L <label> |-|--2346|-|-----|-----| |0110_000_011_111_111-{offset} 1938: case 0b0110_000_011: 1939: irpBrasl (); 1940: break irpSwitch; 1941: 1942: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1943: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1944: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1945: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1946: //BSR.W <label> |-|012346|-|-----|-----| |0110_000_100_000_000-{offset} 1947: //JBSR.W <label> |A|012346|-|-----|-----| |0110_000_100_000_000-{offset} [BSR.W <label>] 1948: //BSR.S <label> |-|012346|-|-----|-----| |0110_000_100_sss_sss (s is not equal to 0) 1949: //JBSR.S <label> |A|012346|-|-----|-----| |0110_000_100_sss_sss (s is not equal to 0) [BSR.S <label>] 1950: case 0b0110_000_100: 1951: irpBsrsw (); 1952: break irpSwitch; 1953: 1954: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1955: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1956: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1957: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1958: //BSR.S <label> |-|012346|-|-----|-----| |0110_000_101_sss_sss 1959: //JBSR.S <label> |A|012346|-|-----|-----| |0110_000_101_sss_sss [BSR.S <label>] 1960: case 0b0110_000_101: 1961: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1962: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1963: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1964: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1965: //BSR.S <label> |-|012346|-|-----|-----| |0110_000_110_sss_sss 1966: //JBSR.S <label> |A|012346|-|-----|-----| |0110_000_110_sss_sss [BSR.S <label>] 1967: case 0b0110_000_110: 1968: irpBsrs (); 1969: break irpSwitch; 1970: 1971: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1972: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1973: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1974: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1975: //BSR.S <label> |-|--2346|-|-----|-----| |0110_000_111_sss_sss (s is not equal to 63) 1976: //JBSR.S <label> |A|--2346|-|-----|-----| |0110_000_111_sss_sss (s is not equal to 63) [BSR.S <label>] 1977: //BSR.L <label> |-|--2346|-|-----|-----| |0110_000_111_111_111-{offset} 1978: case 0b0110_000_111: 1979: irpBsrsl (); 1980: break irpSwitch; 1981: 1982: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1983: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1984: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1985: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1986: //BHI.W <label> |-|012346|-|--*-*|-----| |0110_001_000_000_000-{offset} 1987: //BNLS.W <label> |A|012346|-|--*-*|-----| |0110_001_000_000_000-{offset} [BHI.W <label>] 1988: //JBHI.W <label> |A|012346|-|--*-*|-----| |0110_001_000_000_000-{offset} [BHI.W <label>] 1989: //JBNLS.W <label> |A|012346|-|--*-*|-----| |0110_001_000_000_000-{offset} [BHI.W <label>] 1990: //BHI.S <label> |-|012346|-|--*-*|-----| |0110_001_000_sss_sss (s is not equal to 0) 1991: //BNLS.S <label> |A|012346|-|--*-*|-----| |0110_001_000_sss_sss (s is not equal to 0) [BHI.S <label>] 1992: //JBHI.S <label> |A|012346|-|--*-*|-----| |0110_001_000_sss_sss (s is not equal to 0) [BHI.S <label>] 1993: //JBNLS.S <label> |A|012346|-|--*-*|-----| |0110_001_000_sss_sss (s is not equal to 0) [BHI.S <label>] 1994: //JBLS.L <label> |A|012346|-|--*-*|-----| |0110_001_000_000_110-0100111011111001-{address} [BHI.S (*)+8;JMP <label>] 1995: //JBNHI.L <label> |A|012346|-|--*-*|-----| |0110_001_000_000_110-0100111011111001-{address} [BHI.S (*)+8;JMP <label>] 1996: case 0b0110_001_000: 1997: irpBhisw (); 1998: break irpSwitch; 1999: 2000: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2001: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2002: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2003: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2004: //BHI.S <label> |-|012346|-|--*-*|-----| |0110_001_001_sss_sss 2005: //BNLS.S <label> |A|012346|-|--*-*|-----| |0110_001_001_sss_sss [BHI.S <label>] 2006: //JBHI.S <label> |A|012346|-|--*-*|-----| |0110_001_001_sss_sss [BHI.S <label>] 2007: //JBNLS.S <label> |A|012346|-|--*-*|-----| |0110_001_001_sss_sss [BHI.S <label>] 2008: case 0b0110_001_001: 2009: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2010: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2011: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2012: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2013: //BHI.S <label> |-|012346|-|--*-*|-----| |0110_001_010_sss_sss 2014: //BNLS.S <label> |A|012346|-|--*-*|-----| |0110_001_010_sss_sss [BHI.S <label>] 2015: //JBHI.S <label> |A|012346|-|--*-*|-----| |0110_001_010_sss_sss [BHI.S <label>] 2016: //JBNLS.S <label> |A|012346|-|--*-*|-----| |0110_001_010_sss_sss [BHI.S <label>] 2017: case 0b0110_001_010: 2018: irpBhis (); 2019: break irpSwitch; 2020: 2021: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2022: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2023: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2024: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2025: //BHI.S <label> |-|--2346|-|--*-*|-----| |0110_001_011_sss_sss (s is not equal to 63) 2026: //BNLS.S <label> |A|--2346|-|--*-*|-----| |0110_001_011_sss_sss (s is not equal to 63) [BHI.S <label>] 2027: //JBHI.S <label> |A|--2346|-|--*-*|-----| |0110_001_011_sss_sss (s is not equal to 63) [BHI.S <label>] 2028: //JBNLS.S <label> |A|--2346|-|--*-*|-----| |0110_001_011_sss_sss (s is not equal to 63) [BHI.S <label>] 2029: //BHI.L <label> |-|--2346|-|--*-*|-----| |0110_001_011_111_111-{offset} 2030: //BNLS.L <label> |A|--2346|-|--*-*|-----| |0110_001_011_111_111-{offset} [BHI.L <label>] 2031: case 0b0110_001_011: 2032: irpBhisl (); 2033: break irpSwitch; 2034: 2035: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2036: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2037: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2038: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2039: //BLS.W <label> |-|012346|-|--*-*|-----| |0110_001_100_000_000-{offset} 2040: //BNHI.W <label> |A|012346|-|--*-*|-----| |0110_001_100_000_000-{offset} [BLS.W <label>] 2041: //JBLS.W <label> |A|012346|-|--*-*|-----| |0110_001_100_000_000-{offset} [BLS.W <label>] 2042: //JBNHI.W <label> |A|012346|-|--*-*|-----| |0110_001_100_000_000-{offset} [BLS.W <label>] 2043: //BLS.S <label> |-|012346|-|--*-*|-----| |0110_001_100_sss_sss (s is not equal to 0) 2044: //BNHI.S <label> |A|012346|-|--*-*|-----| |0110_001_100_sss_sss (s is not equal to 0) [BLS.S <label>] 2045: //JBLS.S <label> |A|012346|-|--*-*|-----| |0110_001_100_sss_sss (s is not equal to 0) [BLS.S <label>] 2046: //JBNHI.S <label> |A|012346|-|--*-*|-----| |0110_001_100_sss_sss (s is not equal to 0) [BLS.S <label>] 2047: //JBHI.L <label> |A|012346|-|--*-*|-----| |0110_001_100_000_110-0100111011111001-{address} [BLS.S (*)+8;JMP <label>] 2048: //JBNLS.L <label> |A|012346|-|--*-*|-----| |0110_001_100_000_110-0100111011111001-{address} [BLS.S (*)+8;JMP <label>] 2049: case 0b0110_001_100: 2050: irpBlssw (); 2051: break irpSwitch; 2052: 2053: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2054: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2055: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2056: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2057: //BLS.S <label> |-|012346|-|--*-*|-----| |0110_001_101_sss_sss 2058: //BNHI.S <label> |A|012346|-|--*-*|-----| |0110_001_101_sss_sss [BLS.S <label>] 2059: //JBLS.S <label> |A|012346|-|--*-*|-----| |0110_001_101_sss_sss [BLS.S <label>] 2060: //JBNHI.S <label> |A|012346|-|--*-*|-----| |0110_001_101_sss_sss [BLS.S <label>] 2061: case 0b0110_001_101: 2062: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2063: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2064: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2065: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2066: //BLS.S <label> |-|012346|-|--*-*|-----| |0110_001_110_sss_sss 2067: //BNHI.S <label> |A|012346|-|--*-*|-----| |0110_001_110_sss_sss [BLS.S <label>] 2068: //JBLS.S <label> |A|012346|-|--*-*|-----| |0110_001_110_sss_sss [BLS.S <label>] 2069: //JBNHI.S <label> |A|012346|-|--*-*|-----| |0110_001_110_sss_sss [BLS.S <label>] 2070: case 0b0110_001_110: 2071: irpBlss (); 2072: break irpSwitch; 2073: 2074: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2075: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2076: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2077: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2078: //BLS.S <label> |-|--2346|-|--*-*|-----| |0110_001_111_sss_sss (s is not equal to 63) 2079: //BNHI.S <label> |A|--2346|-|--*-*|-----| |0110_001_111_sss_sss (s is not equal to 63) [BLS.S <label>] 2080: //JBLS.S <label> |A|--2346|-|--*-*|-----| |0110_001_111_sss_sss (s is not equal to 63) [BLS.S <label>] 2081: //JBNHI.S <label> |A|--2346|-|--*-*|-----| |0110_001_111_sss_sss (s is not equal to 63) [BLS.S <label>] 2082: //BLS.L <label> |-|--2346|-|--*-*|-----| |0110_001_111_111_111-{offset} 2083: //BNHI.L <label> |A|--2346|-|--*-*|-----| |0110_001_111_111_111-{offset} [BLS.L <label>] 2084: case 0b0110_001_111: 2085: irpBlssl (); 2086: break irpSwitch; 2087: 2088: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2089: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2090: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2091: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2092: //BCC.W <label> |-|012346|-|----*|-----| |0110_010_000_000_000-{offset} 2093: //BHS.W <label> |A|012346|-|----*|-----| |0110_010_000_000_000-{offset} [BCC.W <label>] 2094: //BNCS.W <label> |A|012346|-|----*|-----| |0110_010_000_000_000-{offset} [BCC.W <label>] 2095: //BNLO.W <label> |A|012346|-|----*|-----| |0110_010_000_000_000-{offset} [BCC.W <label>] 2096: //JBCC.W <label> |A|012346|-|----*|-----| |0110_010_000_000_000-{offset} [BCC.W <label>] 2097: //JBHS.W <label> |A|012346|-|----*|-----| |0110_010_000_000_000-{offset} [BCC.W <label>] 2098: //JBNCS.W <label> |A|012346|-|----*|-----| |0110_010_000_000_000-{offset} [BCC.W <label>] 2099: //JBNLO.W <label> |A|012346|-|----*|-----| |0110_010_000_000_000-{offset} [BCC.W <label>] 2100: //BCC.S <label> |-|012346|-|----*|-----| |0110_010_000_sss_sss (s is not equal to 0) 2101: //BHS.S <label> |A|012346|-|----*|-----| |0110_010_000_sss_sss (s is not equal to 0) [BCC.S <label>] 2102: //BNCS.S <label> |A|012346|-|----*|-----| |0110_010_000_sss_sss (s is not equal to 0) [BCC.S <label>] 2103: //BNLO.S <label> |A|012346|-|----*|-----| |0110_010_000_sss_sss (s is not equal to 0) [BCC.S <label>] 2104: //JBCC.S <label> |A|012346|-|----*|-----| |0110_010_000_sss_sss (s is not equal to 0) [BCC.S <label>] 2105: //JBHS.S <label> |A|012346|-|----*|-----| |0110_010_000_sss_sss (s is not equal to 0) [BCC.S <label>] 2106: //JBNCS.S <label> |A|012346|-|----*|-----| |0110_010_000_sss_sss (s is not equal to 0) [BCC.S <label>] 2107: //JBNLO.S <label> |A|012346|-|----*|-----| |0110_010_000_sss_sss (s is not equal to 0) [BCC.S <label>] 2108: //JBCS.L <label> |A|012346|-|----*|-----| |0110_010_000_000_110-0100111011111001-{address} [BCC.S (*)+8;JMP <label>] 2109: //JBLO.L <label> |A|012346|-|----*|-----| |0110_010_000_000_110-0100111011111001-{address} [BCC.S (*)+8;JMP <label>] 2110: //JBNCC.L <label> |A|012346|-|----*|-----| |0110_010_000_000_110-0100111011111001-{address} [BCC.S (*)+8;JMP <label>] 2111: //JBNHS.L <label> |A|012346|-|----*|-----| |0110_010_000_000_110-0100111011111001-{address} [BCC.S (*)+8;JMP <label>] 2112: case 0b0110_010_000: 2113: irpBhssw (); 2114: break irpSwitch; 2115: 2116: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2117: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2118: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2119: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2120: //BCC.S <label> |-|012346|-|----*|-----| |0110_010_001_sss_sss 2121: //BHS.S <label> |A|012346|-|----*|-----| |0110_010_001_sss_sss [BCC.S <label>] 2122: //BNCS.S <label> |A|012346|-|----*|-----| |0110_010_001_sss_sss [BCC.S <label>] 2123: //BNLO.S <label> |A|012346|-|----*|-----| |0110_010_001_sss_sss [BCC.S <label>] 2124: //JBCC.S <label> |A|012346|-|----*|-----| |0110_010_001_sss_sss [BCC.S <label>] 2125: //JBHS.S <label> |A|012346|-|----*|-----| |0110_010_001_sss_sss [BCC.S <label>] 2126: //JBNCS.S <label> |A|012346|-|----*|-----| |0110_010_001_sss_sss [BCC.S <label>] 2127: //JBNLO.S <label> |A|012346|-|----*|-----| |0110_010_001_sss_sss [BCC.S <label>] 2128: case 0b0110_010_001: 2129: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2130: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2131: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2132: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2133: //BCC.S <label> |-|012346|-|----*|-----| |0110_010_010_sss_sss 2134: //BHS.S <label> |A|012346|-|----*|-----| |0110_010_010_sss_sss [BCC.S <label>] 2135: //BNCS.S <label> |A|012346|-|----*|-----| |0110_010_010_sss_sss [BCC.S <label>] 2136: //BNLO.S <label> |A|012346|-|----*|-----| |0110_010_010_sss_sss [BCC.S <label>] 2137: //JBCC.S <label> |A|012346|-|----*|-----| |0110_010_010_sss_sss [BCC.S <label>] 2138: //JBHS.S <label> |A|012346|-|----*|-----| |0110_010_010_sss_sss [BCC.S <label>] 2139: //JBNCS.S <label> |A|012346|-|----*|-----| |0110_010_010_sss_sss [BCC.S <label>] 2140: //JBNLO.S <label> |A|012346|-|----*|-----| |0110_010_010_sss_sss [BCC.S <label>] 2141: case 0b0110_010_010: 2142: irpBhss (); 2143: break irpSwitch; 2144: 2145: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2146: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2147: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2148: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2149: //BCC.S <label> |-|--2346|-|----*|-----| |0110_010_011_sss_sss (s is not equal to 63) 2150: //BHS.S <label> |A|--2346|-|----*|-----| |0110_010_011_sss_sss (s is not equal to 63) [BCC.S <label>] 2151: //BNCS.S <label> |A|--2346|-|----*|-----| |0110_010_011_sss_sss (s is not equal to 63) [BCC.S <label>] 2152: //BNLO.S <label> |A|--2346|-|----*|-----| |0110_010_011_sss_sss (s is not equal to 63) [BCC.S <label>] 2153: //JBCC.S <label> |A|--2346|-|----*|-----| |0110_010_011_sss_sss (s is not equal to 63) [BCC.S <label>] 2154: //JBHS.S <label> |A|--2346|-|----*|-----| |0110_010_011_sss_sss (s is not equal to 63) [BCC.S <label>] 2155: //JBNCS.S <label> |A|--2346|-|----*|-----| |0110_010_011_sss_sss (s is not equal to 63) [BCC.S <label>] 2156: //JBNLO.S <label> |A|--2346|-|----*|-----| |0110_010_011_sss_sss (s is not equal to 63) [BCC.S <label>] 2157: //BCC.L <label> |-|--2346|-|----*|-----| |0110_010_011_111_111-{offset} 2158: //BHS.L <label> |A|--2346|-|----*|-----| |0110_010_011_111_111-{offset} [BCC.L <label>] 2159: //BNCS.L <label> |A|--2346|-|----*|-----| |0110_010_011_111_111-{offset} [BCC.L <label>] 2160: //BNLO.L <label> |A|--2346|-|----*|-----| |0110_010_011_111_111-{offset} [BCC.L <label>] 2161: case 0b0110_010_011: 2162: irpBhssl (); 2163: break irpSwitch; 2164: 2165: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2166: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2167: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2168: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2169: //BCS.W <label> |-|012346|-|----*|-----| |0110_010_100_000_000-{offset} 2170: //BLO.W <label> |A|012346|-|----*|-----| |0110_010_100_000_000-{offset} [BCS.W <label>] 2171: //BNCC.W <label> |A|012346|-|----*|-----| |0110_010_100_000_000-{offset} [BCS.W <label>] 2172: //BNHS.W <label> |A|012346|-|----*|-----| |0110_010_100_000_000-{offset} [BCS.W <label>] 2173: //JBCS.W <label> |A|012346|-|----*|-----| |0110_010_100_000_000-{offset} [BCS.W <label>] 2174: //JBLO.W <label> |A|012346|-|----*|-----| |0110_010_100_000_000-{offset} [BCS.W <label>] 2175: //JBNCC.W <label> |A|012346|-|----*|-----| |0110_010_100_000_000-{offset} [BCS.W <label>] 2176: //JBNHS.W <label> |A|012346|-|----*|-----| |0110_010_100_000_000-{offset} [BCS.W <label>] 2177: //BCS.S <label> |-|012346|-|----*|-----| |0110_010_100_sss_sss (s is not equal to 0) 2178: //BLO.S <label> |A|012346|-|----*|-----| |0110_010_100_sss_sss (s is not equal to 0) [BCS.S <label>] 2179: //BNCC.S <label> |A|012346|-|----*|-----| |0110_010_100_sss_sss (s is not equal to 0) [BCS.S <label>] 2180: //BNHS.S <label> |A|012346|-|----*|-----| |0110_010_100_sss_sss (s is not equal to 0) [BCS.S <label>] 2181: //JBCS.S <label> |A|012346|-|----*|-----| |0110_010_100_sss_sss (s is not equal to 0) [BCS.S <label>] 2182: //JBLO.S <label> |A|012346|-|----*|-----| |0110_010_100_sss_sss (s is not equal to 0) [BCS.S <label>] 2183: //JBNCC.S <label> |A|012346|-|----*|-----| |0110_010_100_sss_sss (s is not equal to 0) [BCS.S <label>] 2184: //JBNHS.S <label> |A|012346|-|----*|-----| |0110_010_100_sss_sss (s is not equal to 0) [BCS.S <label>] 2185: //JBCC.L <label> |A|012346|-|----*|-----| |0110_010_100_000_110-0100111011111001-{address} [BCS.S (*)+8;JMP <label>] 2186: //JBHS.L <label> |A|012346|-|----*|-----| |0110_010_100_000_110-0100111011111001-{address} [BCS.S (*)+8;JMP <label>] 2187: //JBNCS.L <label> |A|012346|-|----*|-----| |0110_010_100_000_110-0100111011111001-{address} [BCS.S (*)+8;JMP <label>] 2188: //JBNLO.L <label> |A|012346|-|----*|-----| |0110_010_100_000_110-0100111011111001-{address} [BCS.S (*)+8;JMP <label>] 2189: case 0b0110_010_100: 2190: irpBlosw (); 2191: break irpSwitch; 2192: 2193: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2194: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2195: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2196: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2197: //BCS.S <label> |-|012346|-|----*|-----| |0110_010_101_sss_sss 2198: //BLO.S <label> |A|012346|-|----*|-----| |0110_010_101_sss_sss [BCS.S <label>] 2199: //BNCC.S <label> |A|012346|-|----*|-----| |0110_010_101_sss_sss [BCS.S <label>] 2200: //BNHS.S <label> |A|012346|-|----*|-----| |0110_010_101_sss_sss [BCS.S <label>] 2201: //JBCS.S <label> |A|012346|-|----*|-----| |0110_010_101_sss_sss [BCS.S <label>] 2202: //JBLO.S <label> |A|012346|-|----*|-----| |0110_010_101_sss_sss [BCS.S <label>] 2203: //JBNCC.S <label> |A|012346|-|----*|-----| |0110_010_101_sss_sss [BCS.S <label>] 2204: //JBNHS.S <label> |A|012346|-|----*|-----| |0110_010_101_sss_sss [BCS.S <label>] 2205: case 0b0110_010_101: 2206: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2207: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2208: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2209: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2210: //BCS.S <label> |-|012346|-|----*|-----| |0110_010_110_sss_sss 2211: //BLO.S <label> |A|012346|-|----*|-----| |0110_010_110_sss_sss [BCS.S <label>] 2212: //BNCC.S <label> |A|012346|-|----*|-----| |0110_010_110_sss_sss [BCS.S <label>] 2213: //BNHS.S <label> |A|012346|-|----*|-----| |0110_010_110_sss_sss [BCS.S <label>] 2214: //JBCS.S <label> |A|012346|-|----*|-----| |0110_010_110_sss_sss [BCS.S <label>] 2215: //JBLO.S <label> |A|012346|-|----*|-----| |0110_010_110_sss_sss [BCS.S <label>] 2216: //JBNCC.S <label> |A|012346|-|----*|-----| |0110_010_110_sss_sss [BCS.S <label>] 2217: //JBNHS.S <label> |A|012346|-|----*|-----| |0110_010_110_sss_sss [BCS.S <label>] 2218: case 0b0110_010_110: 2219: irpBlos (); 2220: break irpSwitch; 2221: 2222: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2223: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2224: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2225: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2226: //BCS.S <label> |-|--2346|-|----*|-----| |0110_010_111_sss_sss (s is not equal to 63) 2227: //BLO.S <label> |A|--2346|-|----*|-----| |0110_010_111_sss_sss (s is not equal to 63) [BCS.S <label>] 2228: //BNCC.S <label> |A|--2346|-|----*|-----| |0110_010_111_sss_sss (s is not equal to 63) [BCS.S <label>] 2229: //BNHS.S <label> |A|--2346|-|----*|-----| |0110_010_111_sss_sss (s is not equal to 63) [BCS.S <label>] 2230: //JBCS.S <label> |A|--2346|-|----*|-----| |0110_010_111_sss_sss (s is not equal to 63) [BCS.S <label>] 2231: //JBLO.S <label> |A|--2346|-|----*|-----| |0110_010_111_sss_sss (s is not equal to 63) [BCS.S <label>] 2232: //JBNCC.S <label> |A|--2346|-|----*|-----| |0110_010_111_sss_sss (s is not equal to 63) [BCS.S <label>] 2233: //JBNHS.S <label> |A|--2346|-|----*|-----| |0110_010_111_sss_sss (s is not equal to 63) [BCS.S <label>] 2234: //BCS.L <label> |-|--2346|-|----*|-----| |0110_010_111_111_111-{offset} 2235: //BLO.L <label> |A|--2346|-|----*|-----| |0110_010_111_111_111-{offset} [BCS.L <label>] 2236: //BNCC.L <label> |A|--2346|-|----*|-----| |0110_010_111_111_111-{offset} [BCS.L <label>] 2237: //BNHS.L <label> |A|--2346|-|----*|-----| |0110_010_111_111_111-{offset} [BCS.L <label>] 2238: case 0b0110_010_111: 2239: irpBlosl (); 2240: break irpSwitch; 2241: 2242: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2243: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2244: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2245: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2246: //BNE.W <label> |-|012346|-|--*--|-----| |0110_011_000_000_000-{offset} 2247: //BNEQ.W <label> |A|012346|-|--*--|-----| |0110_011_000_000_000-{offset} [BNE.W <label>] 2248: //BNZ.W <label> |A|012346|-|--*--|-----| |0110_011_000_000_000-{offset} [BNE.W <label>] 2249: //BNZE.W <label> |A|012346|-|--*--|-----| |0110_011_000_000_000-{offset} [BNE.W <label>] 2250: //JBNE.W <label> |A|012346|-|--*--|-----| |0110_011_000_000_000-{offset} [BNE.W <label>] 2251: //JBNEQ.W <label> |A|012346|-|--*--|-----| |0110_011_000_000_000-{offset} [BNE.W <label>] 2252: //JBNZ.W <label> |A|012346|-|--*--|-----| |0110_011_000_000_000-{offset} [BNE.W <label>] 2253: //JBNZE.W <label> |A|012346|-|--*--|-----| |0110_011_000_000_000-{offset} [BNE.W <label>] 2254: //BNE.S <label> |-|012346|-|--*--|-----| |0110_011_000_sss_sss (s is not equal to 0) 2255: //BNEQ.S <label> |A|012346|-|--*--|-----| |0110_011_000_sss_sss (s is not equal to 0) [BNE.S <label>] 2256: //BNZ.S <label> |A|012346|-|--*--|-----| |0110_011_000_sss_sss (s is not equal to 0) [BNE.S <label>] 2257: //BNZE.S <label> |A|012346|-|--*--|-----| |0110_011_000_sss_sss (s is not equal to 0) [BNE.S <label>] 2258: //JBNE.S <label> |A|012346|-|--*--|-----| |0110_011_000_sss_sss (s is not equal to 0) [BNE.S <label>] 2259: //JBNEQ.S <label> |A|012346|-|--*--|-----| |0110_011_000_sss_sss (s is not equal to 0) [BNE.S <label>] 2260: //JBNZ.S <label> |A|012346|-|--*--|-----| |0110_011_000_sss_sss (s is not equal to 0) [BNE.S <label>] 2261: //JBNZE.S <label> |A|012346|-|--*--|-----| |0110_011_000_sss_sss (s is not equal to 0) [BNE.S <label>] 2262: //JBEQ.L <label> |A|012346|-|--*--|-----| |0110_011_000_000_110-0100111011111001-{address} [BNE.S (*)+8;JMP <label>] 2263: //JBNEQ.L <label> |A|012346|-|--*--|-----| |0110_011_000_000_110-0100111011111001-{address} [BNE.S (*)+8;JMP <label>] 2264: //JBNNE.L <label> |A|012346|-|--*--|-----| |0110_011_000_000_110-0100111011111001-{address} [BNE.S (*)+8;JMP <label>] 2265: //JBNNZ.L <label> |A|012346|-|--*--|-----| |0110_011_000_000_110-0100111011111001-{address} [BNE.S (*)+8;JMP <label>] 2266: //JBNZ.L <label> |A|012346|-|--*--|-----| |0110_011_000_000_110-0100111011111001-{address} [BNE.S (*)+8;JMP <label>] 2267: //JBNZE.L <label> |A|012346|-|--*--|-----| |0110_011_000_000_110-0100111011111001-{address} [BNE.S (*)+8;JMP <label>] 2268: //JBZE.L <label> |A|012346|-|--*--|-----| |0110_011_000_000_110-0100111011111001-{address} [BNE.S (*)+8;JMP <label>] 2269: case 0b0110_011_000: 2270: irpBnesw (); 2271: break irpSwitch; 2272: 2273: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2274: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2275: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2276: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2277: //BNE.S <label> |-|012346|-|--*--|-----| |0110_011_001_sss_sss 2278: //BNEQ.S <label> |A|012346|-|--*--|-----| |0110_011_001_sss_sss [BNE.S <label>] 2279: //BNZ.S <label> |A|012346|-|--*--|-----| |0110_011_001_sss_sss [BNE.S <label>] 2280: //BNZE.S <label> |A|012346|-|--*--|-----| |0110_011_001_sss_sss [BNE.S <label>] 2281: //JBNE.S <label> |A|012346|-|--*--|-----| |0110_011_001_sss_sss [BNE.S <label>] 2282: //JBNEQ.S <label> |A|012346|-|--*--|-----| |0110_011_001_sss_sss [BNE.S <label>] 2283: //JBNZ.S <label> |A|012346|-|--*--|-----| |0110_011_001_sss_sss [BNE.S <label>] 2284: //JBNZE.S <label> |A|012346|-|--*--|-----| |0110_011_001_sss_sss [BNE.S <label>] 2285: case 0b0110_011_001: 2286: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2287: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2288: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2289: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2290: //BNE.S <label> |-|012346|-|--*--|-----| |0110_011_010_sss_sss 2291: //BNEQ.S <label> |A|012346|-|--*--|-----| |0110_011_010_sss_sss [BNE.S <label>] 2292: //BNZ.S <label> |A|012346|-|--*--|-----| |0110_011_010_sss_sss [BNE.S <label>] 2293: //BNZE.S <label> |A|012346|-|--*--|-----| |0110_011_010_sss_sss [BNE.S <label>] 2294: //JBNE.S <label> |A|012346|-|--*--|-----| |0110_011_010_sss_sss [BNE.S <label>] 2295: //JBNEQ.S <label> |A|012346|-|--*--|-----| |0110_011_010_sss_sss [BNE.S <label>] 2296: //JBNZ.S <label> |A|012346|-|--*--|-----| |0110_011_010_sss_sss [BNE.S <label>] 2297: //JBNZE.S <label> |A|012346|-|--*--|-----| |0110_011_010_sss_sss [BNE.S <label>] 2298: case 0b0110_011_010: 2299: irpBnes (); 2300: break irpSwitch; 2301: 2302: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2303: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2304: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2305: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2306: //BNE.S <label> |-|--2346|-|--*--|-----| |0110_011_011_sss_sss (s is not equal to 63) 2307: //BNEQ.S <label> |A|--2346|-|--*--|-----| |0110_011_011_sss_sss (s is not equal to 63) [BNE.S <label>] 2308: //BNZ.S <label> |A|--2346|-|--*--|-----| |0110_011_011_sss_sss (s is not equal to 63) [BNE.S <label>] 2309: //BNZE.S <label> |A|--2346|-|--*--|-----| |0110_011_011_sss_sss (s is not equal to 63) [BNE.S <label>] 2310: //JBNE.S <label> |A|--2346|-|--*--|-----| |0110_011_011_sss_sss (s is not equal to 63) [BNE.S <label>] 2311: //JBNEQ.S <label> |A|--2346|-|--*--|-----| |0110_011_011_sss_sss (s is not equal to 63) [BNE.S <label>] 2312: //JBNZ.S <label> |A|--2346|-|--*--|-----| |0110_011_011_sss_sss (s is not equal to 63) [BNE.S <label>] 2313: //JBNZE.S <label> |A|--2346|-|--*--|-----| |0110_011_011_sss_sss (s is not equal to 63) [BNE.S <label>] 2314: //BNE.L <label> |-|--2346|-|--*--|-----| |0110_011_011_111_111-{offset} 2315: //BNEQ.L <label> |A|--2346|-|--*--|-----| |0110_011_011_111_111-{offset} [BNE.L <label>] 2316: //BNZ.L <label> |A|--2346|-|--*--|-----| |0110_011_011_111_111-{offset} [BNE.L <label>] 2317: //BNZE.L <label> |A|--2346|-|--*--|-----| |0110_011_011_111_111-{offset} [BNE.L <label>] 2318: case 0b0110_011_011: 2319: irpBnesl (); 2320: break irpSwitch; 2321: 2322: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2323: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2324: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2325: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2326: //BEQ.W <label> |-|012346|-|--*--|-----| |0110_011_100_000_000-{offset} 2327: //BNNE.W <label> |A|012346|-|--*--|-----| |0110_011_100_000_000-{offset} [BEQ.W <label>] 2328: //BNNZ.W <label> |A|012346|-|--*--|-----| |0110_011_100_000_000-{offset} [BEQ.W <label>] 2329: //BZE.W <label> |A|012346|-|--*--|-----| |0110_011_100_000_000-{offset} [BEQ.W <label>] 2330: //JBEQ.W <label> |A|012346|-|--*--|-----| |0110_011_100_000_000-{offset} [BEQ.W <label>] 2331: //JBNNE.W <label> |A|012346|-|--*--|-----| |0110_011_100_000_000-{offset} [BEQ.W <label>] 2332: //JBNNZ.W <label> |A|012346|-|--*--|-----| |0110_011_100_000_000-{offset} [BEQ.W <label>] 2333: //JBZE.W <label> |A|012346|-|--*--|-----| |0110_011_100_000_000-{offset} [BEQ.W <label>] 2334: //BEQ.S <label> |-|012346|-|--*--|-----| |0110_011_100_sss_sss (s is not equal to 0) 2335: //BNNE.S <label> |A|012346|-|--*--|-----| |0110_011_100_sss_sss (s is not equal to 0) [BEQ.S <label>] 2336: //BNNZ.S <label> |A|012346|-|--*--|-----| |0110_011_100_sss_sss (s is not equal to 0) [BEQ.S <label>] 2337: //BZE.S <label> |A|012346|-|--*--|-----| |0110_011_100_sss_sss (s is not equal to 0) [BEQ.S <label>] 2338: //JBEQ.S <label> |A|012346|-|--*--|-----| |0110_011_100_sss_sss (s is not equal to 0) [BEQ.S <label>] 2339: //JBNNE.S <label> |A|012346|-|--*--|-----| |0110_011_100_sss_sss (s is not equal to 0) [BEQ.S <label>] 2340: //JBNNZ.S <label> |A|012346|-|--*--|-----| |0110_011_100_sss_sss (s is not equal to 0) [BEQ.S <label>] 2341: //JBZE.S <label> |A|012346|-|--*--|-----| |0110_011_100_sss_sss (s is not equal to 0) [BEQ.S <label>] 2342: //JBNE.L <label> |A|012346|-|--*--|-----| |0110_011_100_000_110-0100111011111001-{address} [BEQ.S (*)+8;JMP <label>] 2343: case 0b0110_011_100: 2344: irpBeqsw (); 2345: break irpSwitch; 2346: 2347: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2348: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2349: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2350: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2351: //BEQ.S <label> |-|012346|-|--*--|-----| |0110_011_101_sss_sss 2352: //BNNE.S <label> |A|012346|-|--*--|-----| |0110_011_101_sss_sss [BEQ.S <label>] 2353: //BNNZ.S <label> |A|012346|-|--*--|-----| |0110_011_101_sss_sss [BEQ.S <label>] 2354: //BZE.S <label> |A|012346|-|--*--|-----| |0110_011_101_sss_sss [BEQ.S <label>] 2355: //JBEQ.S <label> |A|012346|-|--*--|-----| |0110_011_101_sss_sss [BEQ.S <label>] 2356: //JBNNE.S <label> |A|012346|-|--*--|-----| |0110_011_101_sss_sss [BEQ.S <label>] 2357: //JBNNZ.S <label> |A|012346|-|--*--|-----| |0110_011_101_sss_sss [BEQ.S <label>] 2358: //JBZE.S <label> |A|012346|-|--*--|-----| |0110_011_101_sss_sss [BEQ.S <label>] 2359: case 0b0110_011_101: 2360: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2361: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2362: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2363: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2364: //BEQ.S <label> |-|012346|-|--*--|-----| |0110_011_110_sss_sss 2365: //BNNE.S <label> |A|012346|-|--*--|-----| |0110_011_110_sss_sss [BEQ.S <label>] 2366: //BNNZ.S <label> |A|012346|-|--*--|-----| |0110_011_110_sss_sss [BEQ.S <label>] 2367: //BZE.S <label> |A|012346|-|--*--|-----| |0110_011_110_sss_sss [BEQ.S <label>] 2368: //JBEQ.S <label> |A|012346|-|--*--|-----| |0110_011_110_sss_sss [BEQ.S <label>] 2369: //JBNNE.S <label> |A|012346|-|--*--|-----| |0110_011_110_sss_sss [BEQ.S <label>] 2370: //JBNNZ.S <label> |A|012346|-|--*--|-----| |0110_011_110_sss_sss [BEQ.S <label>] 2371: //JBZE.S <label> |A|012346|-|--*--|-----| |0110_011_110_sss_sss [BEQ.S <label>] 2372: case 0b0110_011_110: 2373: irpBeqs (); 2374: break irpSwitch; 2375: 2376: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2377: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2378: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2379: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2380: //BEQ.S <label> |-|--2346|-|--*--|-----| |0110_011_111_sss_sss (s is not equal to 63) 2381: //BNNE.S <label> |A|--2346|-|--*--|-----| |0110_011_111_sss_sss (s is not equal to 63) [BEQ.S <label>] 2382: //BNNZ.S <label> |A|--2346|-|--*--|-----| |0110_011_111_sss_sss (s is not equal to 63) [BEQ.S <label>] 2383: //BZE.S <label> |A|--2346|-|--*--|-----| |0110_011_111_sss_sss (s is not equal to 63) [BEQ.S <label>] 2384: //JBEQ.S <label> |A|--2346|-|--*--|-----| |0110_011_111_sss_sss (s is not equal to 63) [BEQ.S <label>] 2385: //JBNNE.S <label> |A|--2346|-|--*--|-----| |0110_011_111_sss_sss (s is not equal to 63) [BEQ.S <label>] 2386: //JBNNZ.S <label> |A|--2346|-|--*--|-----| |0110_011_111_sss_sss (s is not equal to 63) [BEQ.S <label>] 2387: //JBZE.S <label> |A|--2346|-|--*--|-----| |0110_011_111_sss_sss (s is not equal to 63) [BEQ.S <label>] 2388: //BEQ.L <label> |-|--2346|-|--*--|-----| |0110_011_111_111_111-{offset} 2389: //BNNE.L <label> |A|--2346|-|--*--|-----| |0110_011_111_111_111-{offset} [BEQ.L <label>] 2390: //BNNZ.L <label> |A|--2346|-|--*--|-----| |0110_011_111_111_111-{offset} [BEQ.L <label>] 2391: //BZE.L <label> |A|--2346|-|--*--|-----| |0110_011_111_111_111-{offset} [BEQ.L <label>] 2392: case 0b0110_011_111: 2393: irpBeqsl (); 2394: break irpSwitch; 2395: 2396: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2397: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2398: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2399: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2400: //BVC.W <label> |-|012346|-|---*-|-----| |0110_100_000_000_000-{offset} 2401: //BNVS.W <label> |A|012346|-|---*-|-----| |0110_100_000_000_000-{offset} [BVC.W <label>] 2402: //JBNVS.W <label> |A|012346|-|---*-|-----| |0110_100_000_000_000-{offset} [BVC.W <label>] 2403: //JBVC.W <label> |A|012346|-|---*-|-----| |0110_100_000_000_000-{offset} [BVC.W <label>] 2404: //BVC.S <label> |-|012346|-|---*-|-----| |0110_100_000_sss_sss (s is not equal to 0) 2405: //BNVS.S <label> |A|012346|-|---*-|-----| |0110_100_000_sss_sss (s is not equal to 0) [BVC.S <label>] 2406: //JBNVS.S <label> |A|012346|-|---*-|-----| |0110_100_000_sss_sss (s is not equal to 0) [BVC.S <label>] 2407: //JBVC.S <label> |A|012346|-|---*-|-----| |0110_100_000_sss_sss (s is not equal to 0) [BVC.S <label>] 2408: //JBNVC.L <label> |A|012346|-|---*-|-----| |0110_100_000_000_110-0100111011111001-{address} [BVC.S (*)+8;JMP <label>] 2409: //JBVS.L <label> |A|012346|-|---*-|-----| |0110_100_000_000_110-0100111011111001-{address} [BVC.S (*)+8;JMP <label>] 2410: case 0b0110_100_000: 2411: irpBvcsw (); 2412: break irpSwitch; 2413: 2414: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2415: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2416: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2417: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2418: //BVC.S <label> |-|012346|-|---*-|-----| |0110_100_001_sss_sss 2419: //BNVS.S <label> |A|012346|-|---*-|-----| |0110_100_001_sss_sss [BVC.S <label>] 2420: //JBNVS.S <label> |A|012346|-|---*-|-----| |0110_100_001_sss_sss [BVC.S <label>] 2421: //JBVC.S <label> |A|012346|-|---*-|-----| |0110_100_001_sss_sss [BVC.S <label>] 2422: case 0b0110_100_001: 2423: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2424: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2425: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2426: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2427: //BVC.S <label> |-|012346|-|---*-|-----| |0110_100_010_sss_sss 2428: //BNVS.S <label> |A|012346|-|---*-|-----| |0110_100_010_sss_sss [BVC.S <label>] 2429: //JBNVS.S <label> |A|012346|-|---*-|-----| |0110_100_010_sss_sss [BVC.S <label>] 2430: //JBVC.S <label> |A|012346|-|---*-|-----| |0110_100_010_sss_sss [BVC.S <label>] 2431: case 0b0110_100_010: 2432: irpBvcs (); 2433: break irpSwitch; 2434: 2435: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2436: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2437: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2438: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2439: //BVC.S <label> |-|--2346|-|---*-|-----| |0110_100_011_sss_sss (s is not equal to 63) 2440: //BNVS.S <label> |A|--2346|-|---*-|-----| |0110_100_011_sss_sss (s is not equal to 63) [BVC.S <label>] 2441: //JBNVS.S <label> |A|--2346|-|---*-|-----| |0110_100_011_sss_sss (s is not equal to 63) [BVC.S <label>] 2442: //JBVC.S <label> |A|--2346|-|---*-|-----| |0110_100_011_sss_sss (s is not equal to 63) [BVC.S <label>] 2443: //BVC.L <label> |-|--2346|-|---*-|-----| |0110_100_011_111_111-{offset} 2444: //BNVS.L <label> |A|--2346|-|---*-|-----| |0110_100_011_111_111-{offset} [BVC.L <label>] 2445: case 0b0110_100_011: 2446: irpBvcsl (); 2447: break irpSwitch; 2448: 2449: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2450: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2451: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2452: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2453: //BVS.W <label> |-|012346|-|---*-|-----| |0110_100_100_000_000-{offset} 2454: //BNVC.W <label> |A|012346|-|---*-|-----| |0110_100_100_000_000-{offset} [BVS.W <label>] 2455: //JBNVC.W <label> |A|012346|-|---*-|-----| |0110_100_100_000_000-{offset} [BVS.W <label>] 2456: //JBVS.W <label> |A|012346|-|---*-|-----| |0110_100_100_000_000-{offset} [BVS.W <label>] 2457: //BVS.S <label> |-|012346|-|---*-|-----| |0110_100_100_sss_sss (s is not equal to 0) 2458: //BNVC.S <label> |A|012346|-|---*-|-----| |0110_100_100_sss_sss (s is not equal to 0) [BVS.S <label>] 2459: //JBNVC.S <label> |A|012346|-|---*-|-----| |0110_100_100_sss_sss (s is not equal to 0) [BVS.S <label>] 2460: //JBVS.S <label> |A|012346|-|---*-|-----| |0110_100_100_sss_sss (s is not equal to 0) [BVS.S <label>] 2461: //JBNVS.L <label> |A|012346|-|---*-|-----| |0110_100_100_000_110-0100111011111001-{address} [BVS.S (*)+8;JMP <label>] 2462: //JBVC.L <label> |A|012346|-|---*-|-----| |0110_100_100_000_110-0100111011111001-{address} [BVS.S (*)+8;JMP <label>] 2463: case 0b0110_100_100: 2464: irpBvssw (); 2465: break irpSwitch; 2466: 2467: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2468: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2469: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2470: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2471: //BVS.S <label> |-|012346|-|---*-|-----| |0110_100_101_sss_sss 2472: //BNVC.S <label> |A|012346|-|---*-|-----| |0110_100_101_sss_sss [BVS.S <label>] 2473: //JBNVC.S <label> |A|012346|-|---*-|-----| |0110_100_101_sss_sss [BVS.S <label>] 2474: //JBVS.S <label> |A|012346|-|---*-|-----| |0110_100_101_sss_sss [BVS.S <label>] 2475: case 0b0110_100_101: 2476: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2477: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2478: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2479: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2480: //BVS.S <label> |-|012346|-|---*-|-----| |0110_100_110_sss_sss 2481: //BNVC.S <label> |A|012346|-|---*-|-----| |0110_100_110_sss_sss [BVS.S <label>] 2482: //JBNVC.S <label> |A|012346|-|---*-|-----| |0110_100_110_sss_sss [BVS.S <label>] 2483: //JBVS.S <label> |A|012346|-|---*-|-----| |0110_100_110_sss_sss [BVS.S <label>] 2484: case 0b0110_100_110: 2485: irpBvss (); 2486: break irpSwitch; 2487: 2488: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2489: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2490: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2491: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2492: //BVS.S <label> |-|--2346|-|---*-|-----| |0110_100_111_sss_sss (s is not equal to 63) 2493: //BNVC.S <label> |A|--2346|-|---*-|-----| |0110_100_111_sss_sss (s is not equal to 63) [BVS.S <label>] 2494: //JBNVC.S <label> |A|--2346|-|---*-|-----| |0110_100_111_sss_sss (s is not equal to 63) [BVS.S <label>] 2495: //JBVS.S <label> |A|--2346|-|---*-|-----| |0110_100_111_sss_sss (s is not equal to 63) [BVS.S <label>] 2496: //BVS.L <label> |-|--2346|-|---*-|-----| |0110_100_111_111_111-{offset} 2497: //BNVC.L <label> |A|--2346|-|---*-|-----| |0110_100_111_111_111-{offset} [BVS.L <label>] 2498: case 0b0110_100_111: 2499: irpBvssl (); 2500: break irpSwitch; 2501: 2502: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2503: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2504: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2505: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2506: //BPL.W <label> |-|012346|-|-*---|-----| |0110_101_000_000_000-{offset} 2507: //BNMI.W <label> |A|012346|-|-*---|-----| |0110_101_000_000_000-{offset} [BPL.W <label>] 2508: //JBNMI.W <label> |A|012346|-|-*---|-----| |0110_101_000_000_000-{offset} [BPL.W <label>] 2509: //JBPL.W <label> |A|012346|-|-*---|-----| |0110_101_000_000_000-{offset} [BPL.W <label>] 2510: //BPL.S <label> |-|012346|-|-*---|-----| |0110_101_000_sss_sss (s is not equal to 0) 2511: //BNMI.S <label> |A|012346|-|-*---|-----| |0110_101_000_sss_sss (s is not equal to 0) [BPL.S <label>] 2512: //JBNMI.S <label> |A|012346|-|-*---|-----| |0110_101_000_sss_sss (s is not equal to 0) [BPL.S <label>] 2513: //JBPL.S <label> |A|012346|-|-*---|-----| |0110_101_000_sss_sss (s is not equal to 0) [BPL.S <label>] 2514: //JBMI.L <label> |A|012346|-|-*---|-----| |0110_101_000_000_110-0100111011111001-{address} [BPL.S (*)+8;JMP <label>] 2515: //JBNPL.L <label> |A|012346|-|-*---|-----| |0110_101_000_000_110-0100111011111001-{address} [BPL.S (*)+8;JMP <label>] 2516: case 0b0110_101_000: 2517: irpBplsw (); 2518: break irpSwitch; 2519: 2520: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2521: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2522: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2523: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2524: //BPL.S <label> |-|012346|-|-*---|-----| |0110_101_001_sss_sss 2525: //BNMI.S <label> |A|012346|-|-*---|-----| |0110_101_001_sss_sss [BPL.S <label>] 2526: //JBNMI.S <label> |A|012346|-|-*---|-----| |0110_101_001_sss_sss [BPL.S <label>] 2527: //JBPL.S <label> |A|012346|-|-*---|-----| |0110_101_001_sss_sss [BPL.S <label>] 2528: case 0b0110_101_001: 2529: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2530: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2531: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2532: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2533: //BPL.S <label> |-|012346|-|-*---|-----| |0110_101_010_sss_sss 2534: //BNMI.S <label> |A|012346|-|-*---|-----| |0110_101_010_sss_sss [BPL.S <label>] 2535: //JBNMI.S <label> |A|012346|-|-*---|-----| |0110_101_010_sss_sss [BPL.S <label>] 2536: //JBPL.S <label> |A|012346|-|-*---|-----| |0110_101_010_sss_sss [BPL.S <label>] 2537: case 0b0110_101_010: 2538: irpBpls (); 2539: break irpSwitch; 2540: 2541: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2542: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2543: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2544: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2545: //BPL.S <label> |-|--2346|-|-*---|-----| |0110_101_011_sss_sss (s is not equal to 63) 2546: //BNMI.S <label> |A|--2346|-|-*---|-----| |0110_101_011_sss_sss (s is not equal to 63) [BPL.S <label>] 2547: //JBNMI.S <label> |A|--2346|-|-*---|-----| |0110_101_011_sss_sss (s is not equal to 63) [BPL.S <label>] 2548: //JBPL.S <label> |A|--2346|-|-*---|-----| |0110_101_011_sss_sss (s is not equal to 63) [BPL.S <label>] 2549: //BPL.L <label> |-|--2346|-|-*---|-----| |0110_101_011_111_111-{offset} 2550: //BNMI.L <label> |A|--2346|-|-*---|-----| |0110_101_011_111_111-{offset} [BPL.L <label>] 2551: case 0b0110_101_011: 2552: irpBplsl (); 2553: break irpSwitch; 2554: 2555: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2556: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2557: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2558: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2559: //BMI.W <label> |-|012346|-|-*---|-----| |0110_101_100_000_000-{offset} 2560: //BNPL.W <label> |A|012346|-|-*---|-----| |0110_101_100_000_000-{offset} [BMI.W <label>] 2561: //JBMI.W <label> |A|012346|-|-*---|-----| |0110_101_100_000_000-{offset} [BMI.W <label>] 2562: //JBNPL.W <label> |A|012346|-|-*---|-----| |0110_101_100_000_000-{offset} [BMI.W <label>] 2563: //BMI.S <label> |-|012346|-|-*---|-----| |0110_101_100_sss_sss (s is not equal to 0) 2564: //BNPL.S <label> |A|012346|-|-*---|-----| |0110_101_100_sss_sss (s is not equal to 0) [BMI.S <label>] 2565: //JBMI.S <label> |A|012346|-|-*---|-----| |0110_101_100_sss_sss (s is not equal to 0) [BMI.S <label>] 2566: //JBNPL.S <label> |A|012346|-|-*---|-----| |0110_101_100_sss_sss (s is not equal to 0) [BMI.S <label>] 2567: //JBNMI.L <label> |A|012346|-|-*---|-----| |0110_101_100_000_110-0100111011111001-{address} [BMI.S (*)+8;JMP <label>] 2568: //JBPL.L <label> |A|012346|-|-*---|-----| |0110_101_100_000_110-0100111011111001-{address} [BMI.S (*)+8;JMP <label>] 2569: case 0b0110_101_100: 2570: irpBmisw (); 2571: break irpSwitch; 2572: 2573: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2574: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2575: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2576: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2577: //BMI.S <label> |-|012346|-|-*---|-----| |0110_101_101_sss_sss 2578: //BNPL.S <label> |A|012346|-|-*---|-----| |0110_101_101_sss_sss [BMI.S <label>] 2579: //JBMI.S <label> |A|012346|-|-*---|-----| |0110_101_101_sss_sss [BMI.S <label>] 2580: //JBNPL.S <label> |A|012346|-|-*---|-----| |0110_101_101_sss_sss [BMI.S <label>] 2581: case 0b0110_101_101: 2582: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2583: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2584: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2585: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2586: //BMI.S <label> |-|012346|-|-*---|-----| |0110_101_110_sss_sss 2587: //BNPL.S <label> |A|012346|-|-*---|-----| |0110_101_110_sss_sss [BMI.S <label>] 2588: //JBMI.S <label> |A|012346|-|-*---|-----| |0110_101_110_sss_sss [BMI.S <label>] 2589: //JBNPL.S <label> |A|012346|-|-*---|-----| |0110_101_110_sss_sss [BMI.S <label>] 2590: case 0b0110_101_110: 2591: irpBmis (); 2592: break irpSwitch; 2593: 2594: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2595: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2596: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2597: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2598: //BMI.S <label> |-|--2346|-|-*---|-----| |0110_101_111_sss_sss (s is not equal to 63) 2599: //BNPL.S <label> |A|--2346|-|-*---|-----| |0110_101_111_sss_sss (s is not equal to 63) [BMI.S <label>] 2600: //JBMI.S <label> |A|--2346|-|-*---|-----| |0110_101_111_sss_sss (s is not equal to 63) [BMI.S <label>] 2601: //JBNPL.S <label> |A|--2346|-|-*---|-----| |0110_101_111_sss_sss (s is not equal to 63) [BMI.S <label>] 2602: //BMI.L <label> |-|--2346|-|-*---|-----| |0110_101_111_111_111-{offset} 2603: //BNPL.L <label> |A|--2346|-|-*---|-----| |0110_101_111_111_111-{offset} [BMI.L <label>] 2604: case 0b0110_101_111: 2605: irpBmisl (); 2606: break irpSwitch; 2607: 2608: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2609: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2610: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2611: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2612: //BGE.W <label> |-|012346|-|-*-*-|-----| |0110_110_000_000_000-{offset} 2613: //BNLT.W <label> |A|012346|-|-*-*-|-----| |0110_110_000_000_000-{offset} [BGE.W <label>] 2614: //JBGE.W <label> |A|012346|-|-*-*-|-----| |0110_110_000_000_000-{offset} [BGE.W <label>] 2615: //JBNLT.W <label> |A|012346|-|-*-*-|-----| |0110_110_000_000_000-{offset} [BGE.W <label>] 2616: //BGE.S <label> |-|012346|-|-*-*-|-----| |0110_110_000_sss_sss (s is not equal to 0) 2617: //BNLT.S <label> |A|012346|-|-*-*-|-----| |0110_110_000_sss_sss (s is not equal to 0) [BGE.S <label>] 2618: //JBGE.S <label> |A|012346|-|-*-*-|-----| |0110_110_000_sss_sss (s is not equal to 0) [BGE.S <label>] 2619: //JBNLT.S <label> |A|012346|-|-*-*-|-----| |0110_110_000_sss_sss (s is not equal to 0) [BGE.S <label>] 2620: //JBLT.L <label> |A|012346|-|-*-*-|-----| |0110_110_000_000_110-0100111011111001-{address} [BGE.S (*)+8;JMP <label>] 2621: //JBNGE.L <label> |A|012346|-|-*-*-|-----| |0110_110_000_000_110-0100111011111001-{address} [BGE.S (*)+8;JMP <label>] 2622: case 0b0110_110_000: 2623: irpBgesw (); 2624: break irpSwitch; 2625: 2626: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2627: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2628: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2629: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2630: //BGE.S <label> |-|012346|-|-*-*-|-----| |0110_110_001_sss_sss 2631: //BNLT.S <label> |A|012346|-|-*-*-|-----| |0110_110_001_sss_sss [BGE.S <label>] 2632: //JBGE.S <label> |A|012346|-|-*-*-|-----| |0110_110_001_sss_sss [BGE.S <label>] 2633: //JBNLT.S <label> |A|012346|-|-*-*-|-----| |0110_110_001_sss_sss [BGE.S <label>] 2634: case 0b0110_110_001: 2635: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2636: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2637: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2638: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2639: //BGE.S <label> |-|012346|-|-*-*-|-----| |0110_110_010_sss_sss 2640: //BNLT.S <label> |A|012346|-|-*-*-|-----| |0110_110_010_sss_sss [BGE.S <label>] 2641: //JBGE.S <label> |A|012346|-|-*-*-|-----| |0110_110_010_sss_sss [BGE.S <label>] 2642: //JBNLT.S <label> |A|012346|-|-*-*-|-----| |0110_110_010_sss_sss [BGE.S <label>] 2643: case 0b0110_110_010: 2644: irpBges (); 2645: break irpSwitch; 2646: 2647: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2648: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2649: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2650: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2651: //BGE.S <label> |-|--2346|-|-*-*-|-----| |0110_110_011_sss_sss (s is not equal to 63) 2652: //BNLT.S <label> |A|--2346|-|-*-*-|-----| |0110_110_011_sss_sss (s is not equal to 63) [BGE.S <label>] 2653: //JBGE.S <label> |A|--2346|-|-*-*-|-----| |0110_110_011_sss_sss (s is not equal to 63) [BGE.S <label>] 2654: //JBNLT.S <label> |A|--2346|-|-*-*-|-----| |0110_110_011_sss_sss (s is not equal to 63) [BGE.S <label>] 2655: //BGE.L <label> |-|--2346|-|-*-*-|-----| |0110_110_011_111_111-{offset} 2656: //BNLT.L <label> |A|--2346|-|-*-*-|-----| |0110_110_011_111_111-{offset} [BGE.L <label>] 2657: case 0b0110_110_011: 2658: irpBgesl (); 2659: break irpSwitch; 2660: 2661: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2662: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2663: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2664: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2665: //BLT.W <label> |-|012346|-|-*-*-|-----| |0110_110_100_000_000-{offset} 2666: //BNGE.W <label> |A|012346|-|-*-*-|-----| |0110_110_100_000_000-{offset} [BLT.W <label>] 2667: //JBLT.W <label> |A|012346|-|-*-*-|-----| |0110_110_100_000_000-{offset} [BLT.W <label>] 2668: //JBNGE.W <label> |A|012346|-|-*-*-|-----| |0110_110_100_000_000-{offset} [BLT.W <label>] 2669: //BLT.S <label> |-|012346|-|-*-*-|-----| |0110_110_100_sss_sss (s is not equal to 0) 2670: //BNGE.S <label> |A|012346|-|-*-*-|-----| |0110_110_100_sss_sss (s is not equal to 0) [BLT.S <label>] 2671: //JBLT.S <label> |A|012346|-|-*-*-|-----| |0110_110_100_sss_sss (s is not equal to 0) [BLT.S <label>] 2672: //JBNGE.S <label> |A|012346|-|-*-*-|-----| |0110_110_100_sss_sss (s is not equal to 0) [BLT.S <label>] 2673: //JBGE.L <label> |A|012346|-|-*-*-|-----| |0110_110_100_000_110-0100111011111001-{address} [BLT.S (*)+8;JMP <label>] 2674: //JBNLT.L <label> |A|012346|-|-*-*-|-----| |0110_110_100_000_110-0100111011111001-{address} [BLT.S (*)+8;JMP <label>] 2675: case 0b0110_110_100: 2676: irpBltsw (); 2677: break irpSwitch; 2678: 2679: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2680: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2681: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2682: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2683: //BLT.S <label> |-|012346|-|-*-*-|-----| |0110_110_101_sss_sss 2684: //BNGE.S <label> |A|012346|-|-*-*-|-----| |0110_110_101_sss_sss [BLT.S <label>] 2685: //JBLT.S <label> |A|012346|-|-*-*-|-----| |0110_110_101_sss_sss [BLT.S <label>] 2686: //JBNGE.S <label> |A|012346|-|-*-*-|-----| |0110_110_101_sss_sss [BLT.S <label>] 2687: case 0b0110_110_101: 2688: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2689: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2690: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2691: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2692: //BLT.S <label> |-|012346|-|-*-*-|-----| |0110_110_110_sss_sss 2693: //BNGE.S <label> |A|012346|-|-*-*-|-----| |0110_110_110_sss_sss [BLT.S <label>] 2694: //JBLT.S <label> |A|012346|-|-*-*-|-----| |0110_110_110_sss_sss [BLT.S <label>] 2695: //JBNGE.S <label> |A|012346|-|-*-*-|-----| |0110_110_110_sss_sss [BLT.S <label>] 2696: case 0b0110_110_110: 2697: irpBlts (); 2698: break irpSwitch; 2699: 2700: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2701: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2702: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2703: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2704: //BLT.S <label> |-|--2346|-|-*-*-|-----| |0110_110_111_sss_sss (s is not equal to 63) 2705: //BNGE.S <label> |A|--2346|-|-*-*-|-----| |0110_110_111_sss_sss (s is not equal to 63) [BLT.S <label>] 2706: //JBLT.S <label> |A|--2346|-|-*-*-|-----| |0110_110_111_sss_sss (s is not equal to 63) [BLT.S <label>] 2707: //JBNGE.S <label> |A|--2346|-|-*-*-|-----| |0110_110_111_sss_sss (s is not equal to 63) [BLT.S <label>] 2708: //BLT.L <label> |-|--2346|-|-*-*-|-----| |0110_110_111_111_111-{offset} 2709: //BNGE.L <label> |A|--2346|-|-*-*-|-----| |0110_110_111_111_111-{offset} [BLT.L <label>] 2710: case 0b0110_110_111: 2711: irpBltsl (); 2712: break irpSwitch; 2713: 2714: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2715: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2716: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2717: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2718: //BGT.W <label> |-|012346|-|-***-|-----| |0110_111_000_000_000-{offset} 2719: //BNLE.W <label> |A|012346|-|-***-|-----| |0110_111_000_000_000-{offset} [BGT.W <label>] 2720: //JBGT.W <label> |A|012346|-|-***-|-----| |0110_111_000_000_000-{offset} [BGT.W <label>] 2721: //JBNLE.W <label> |A|012346|-|-***-|-----| |0110_111_000_000_000-{offset} [BGT.W <label>] 2722: //BGT.S <label> |-|012346|-|-***-|-----| |0110_111_000_sss_sss (s is not equal to 0) 2723: //BNLE.S <label> |A|012346|-|-***-|-----| |0110_111_000_sss_sss (s is not equal to 0) [BGT.S <label>] 2724: //JBGT.S <label> |A|012346|-|-***-|-----| |0110_111_000_sss_sss (s is not equal to 0) [BGT.S <label>] 2725: //JBNLE.S <label> |A|012346|-|-***-|-----| |0110_111_000_sss_sss (s is not equal to 0) [BGT.S <label>] 2726: //JBLE.L <label> |A|012346|-|-***-|-----| |0110_111_000_000_110-0100111011111001-{address} [BGT.S (*)+8;JMP <label>] 2727: //JBNGT.L <label> |A|012346|-|-***-|-----| |0110_111_000_000_110-0100111011111001-{address} [BGT.S (*)+8;JMP <label>] 2728: case 0b0110_111_000: 2729: irpBgtsw (); 2730: break irpSwitch; 2731: 2732: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2733: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2734: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2735: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2736: //BGT.S <label> |-|012346|-|-***-|-----| |0110_111_001_sss_sss 2737: //BNLE.S <label> |A|012346|-|-***-|-----| |0110_111_001_sss_sss [BGT.S <label>] 2738: //JBGT.S <label> |A|012346|-|-***-|-----| |0110_111_001_sss_sss [BGT.S <label>] 2739: //JBNLE.S <label> |A|012346|-|-***-|-----| |0110_111_001_sss_sss [BGT.S <label>] 2740: case 0b0110_111_001: 2741: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2742: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2743: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2744: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2745: //BGT.S <label> |-|012346|-|-***-|-----| |0110_111_010_sss_sss 2746: //BNLE.S <label> |A|012346|-|-***-|-----| |0110_111_010_sss_sss [BGT.S <label>] 2747: //JBGT.S <label> |A|012346|-|-***-|-----| |0110_111_010_sss_sss [BGT.S <label>] 2748: //JBNLE.S <label> |A|012346|-|-***-|-----| |0110_111_010_sss_sss [BGT.S <label>] 2749: case 0b0110_111_010: 2750: irpBgts (); 2751: break irpSwitch; 2752: 2753: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2754: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2755: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2756: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2757: //BGT.S <label> |-|--2346|-|-***-|-----| |0110_111_011_sss_sss (s is not equal to 63) 2758: //BNLE.S <label> |A|--2346|-|-***-|-----| |0110_111_011_sss_sss (s is not equal to 63) [BGT.S <label>] 2759: //JBGT.S <label> |A|--2346|-|-***-|-----| |0110_111_011_sss_sss (s is not equal to 63) [BGT.S <label>] 2760: //JBNLE.S <label> |A|--2346|-|-***-|-----| |0110_111_011_sss_sss (s is not equal to 63) [BGT.S <label>] 2761: //BGT.L <label> |-|--2346|-|-***-|-----| |0110_111_011_111_111-{offset} 2762: //BNLE.L <label> |A|--2346|-|-***-|-----| |0110_111_011_111_111-{offset} [BGT.L <label>] 2763: case 0b0110_111_011: 2764: irpBgtsl (); 2765: break irpSwitch; 2766: 2767: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2768: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2769: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2770: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2771: //BLE.W <label> |-|012346|-|-***-|-----| |0110_111_100_000_000-{offset} 2772: //BNGT.W <label> |A|012346|-|-***-|-----| |0110_111_100_000_000-{offset} [BLE.W <label>] 2773: //JBLE.W <label> |A|012346|-|-***-|-----| |0110_111_100_000_000-{offset} [BLE.W <label>] 2774: //JBNGT.W <label> |A|012346|-|-***-|-----| |0110_111_100_000_000-{offset} [BLE.W <label>] 2775: //BLE.S <label> |-|012346|-|-***-|-----| |0110_111_100_sss_sss (s is not equal to 0) 2776: //BNGT.S <label> |A|012346|-|-***-|-----| |0110_111_100_sss_sss (s is not equal to 0) [BLE.S <label>] 2777: //JBLE.S <label> |A|012346|-|-***-|-----| |0110_111_100_sss_sss (s is not equal to 0) [BLE.S <label>] 2778: //JBNGT.S <label> |A|012346|-|-***-|-----| |0110_111_100_sss_sss (s is not equal to 0) [BLE.S <label>] 2779: //JBGT.L <label> |A|012346|-|-***-|-----| |0110_111_100_000_110-0100111011111001-{address} [BLE.S (*)+8;JMP <label>] 2780: //JBNLE.L <label> |A|012346|-|-***-|-----| |0110_111_100_000_110-0100111011111001-{address} [BLE.S (*)+8;JMP <label>] 2781: case 0b0110_111_100: 2782: irpBlesw (); 2783: break irpSwitch; 2784: 2785: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2786: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2787: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2788: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2789: //BLE.S <label> |-|012346|-|-***-|-----| |0110_111_101_sss_sss 2790: //BNGT.S <label> |A|012346|-|-***-|-----| |0110_111_101_sss_sss [BLE.S <label>] 2791: //JBLE.S <label> |A|012346|-|-***-|-----| |0110_111_101_sss_sss [BLE.S <label>] 2792: //JBNGT.S <label> |A|012346|-|-***-|-----| |0110_111_101_sss_sss [BLE.S <label>] 2793: case 0b0110_111_101: 2794: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2795: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2796: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2797: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2798: //BLE.S <label> |-|012346|-|-***-|-----| |0110_111_110_sss_sss 2799: //BNGT.S <label> |A|012346|-|-***-|-----| |0110_111_110_sss_sss [BLE.S <label>] 2800: //JBLE.S <label> |A|012346|-|-***-|-----| |0110_111_110_sss_sss [BLE.S <label>] 2801: //JBNGT.S <label> |A|012346|-|-***-|-----| |0110_111_110_sss_sss [BLE.S <label>] 2802: case 0b0110_111_110: 2803: irpBles (); 2804: break irpSwitch; 2805: 2806: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2807: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2808: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2809: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2810: //BLE.S <label> |-|--2346|-|-***-|-----| |0110_111_111_sss_sss (s is not equal to 63) 2811: //BNGT.S <label> |A|--2346|-|-***-|-----| |0110_111_111_sss_sss (s is not equal to 63) [BLE.S <label>] 2812: //JBLE.S <label> |A|--2346|-|-***-|-----| |0110_111_111_sss_sss (s is not equal to 63) [BLE.S <label>] 2813: //JBNGT.S <label> |A|--2346|-|-***-|-----| |0110_111_111_sss_sss (s is not equal to 63) [BLE.S <label>] 2814: //BLE.L <label> |-|--2346|-|-***-|-----| |0110_111_111_111_111-{offset} 2815: //BNGT.L <label> |A|--2346|-|-***-|-----| |0110_111_111_111_111-{offset} [BLE.L <label>] 2816: case 0b0110_111_111: 2817: irpBlesl (); 2818: break irpSwitch; 2819: 2820: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2821: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2822: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2823: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2824: //IOCS <name> |A|012346|-|UUUUU|UUUUU| |0111_000_0dd_ddd_ddd-0100111001001111 [MOVEQ.L #<data>,D0;TRAP #15] 2825: //MOVEQ.L #<data>,Dq |-|012346|-|-UUUU|-**00| |0111_qqq_0dd_ddd_ddd 2826: case 0b0111_000_000: 2827: case 0b0111_000_001: 2828: case 0b0111_000_010: 2829: case 0b0111_000_011: 2830: case 0b0111_001_000: 2831: case 0b0111_001_001: 2832: case 0b0111_001_010: 2833: case 0b0111_001_011: 2834: case 0b0111_010_000: 2835: case 0b0111_010_001: 2836: case 0b0111_010_010: 2837: case 0b0111_010_011: 2838: case 0b0111_011_000: 2839: case 0b0111_011_001: 2840: case 0b0111_011_010: 2841: case 0b0111_011_011: 2842: case 0b0111_100_000: 2843: case 0b0111_100_001: 2844: case 0b0111_100_010: 2845: case 0b0111_100_011: 2846: case 0b0111_101_000: 2847: case 0b0111_101_001: 2848: case 0b0111_101_010: 2849: case 0b0111_101_011: 2850: case 0b0111_110_000: 2851: case 0b0111_110_001: 2852: case 0b0111_110_010: 2853: case 0b0111_110_011: 2854: case 0b0111_111_000: 2855: case 0b0111_111_001: 2856: case 0b0111_111_010: 2857: case 0b0111_111_011: 2858: irpMoveq (); 2859: break irpSwitch; 2860: 2861: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2862: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2863: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2864: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2865: //MVS.B <ea>,Dq |-|------|-|-UUUU|-**00|D M+-WXZPI|0111_qqq_100_mmm_rrr (ISA_B) 2866: case 0b0111_000_100: 2867: case 0b0111_001_100: 2868: case 0b0111_010_100: 2869: case 0b0111_011_100: 2870: case 0b0111_100_100: 2871: case 0b0111_101_100: 2872: case 0b0111_110_100: 2873: case 0b0111_111_100: 2874: irpMvsByte (); 2875: break irpSwitch; 2876: 2877: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2878: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2879: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2880: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2881: //MVS.W <ea>,Dq |-|------|-|-UUUU|-**00|D M+-WXZPI|0111_qqq_101_mmm_rrr (ISA_B) 2882: case 0b0111_000_101: 2883: case 0b0111_001_101: 2884: case 0b0111_010_101: 2885: case 0b0111_011_101: 2886: case 0b0111_100_101: 2887: case 0b0111_101_101: 2888: case 0b0111_110_101: 2889: case 0b0111_111_101: 2890: irpMvsWord (); 2891: break irpSwitch; 2892: 2893: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2894: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2895: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2896: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2897: //MVZ.B <ea>,Dq |-|------|-|-UUUU|-0*00|D M+-WXZPI|0111_qqq_110_mmm_rrr (ISA_B) 2898: case 0b0111_000_110: 2899: case 0b0111_001_110: 2900: case 0b0111_010_110: 2901: case 0b0111_011_110: 2902: case 0b0111_100_110: 2903: case 0b0111_101_110: 2904: case 0b0111_110_110: 2905: case 0b0111_111_110: 2906: irpMvzByte (); 2907: break irpSwitch; 2908: 2909: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2910: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2911: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2912: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2913: //MVZ.W <ea>,Dq |-|------|-|-UUUU|-0*00|D M+-WXZPI|0111_qqq_111_mmm_rrr (ISA_B) 2914: case 0b0111_000_111: 2915: case 0b0111_001_111: 2916: case 0b0111_010_111: 2917: case 0b0111_011_111: 2918: case 0b0111_100_111: 2919: case 0b0111_101_111: 2920: case 0b0111_110_111: 2921: case 0b0111_111_111: 2922: irpMvzWord (); 2923: break irpSwitch; 2924: 2925: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2926: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2927: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2928: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2929: //OR.B <ea>,Dq |-|012346|-|-UUUU|-**00|D M+-WXZPI|1000_qqq_000_mmm_rrr 2930: case 0b1000_000_000: 2931: case 0b1000_001_000: 2932: case 0b1000_010_000: 2933: case 0b1000_011_000: 2934: case 0b1000_100_000: 2935: case 0b1000_101_000: 2936: case 0b1000_110_000: 2937: case 0b1000_111_000: 2938: irpOrToRegByte (); 2939: break irpSwitch; 2940: 2941: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2942: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2943: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2944: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2945: //OR.W <ea>,Dq |-|012346|-|-UUUU|-**00|D M+-WXZPI|1000_qqq_001_mmm_rrr 2946: case 0b1000_000_001: 2947: case 0b1000_001_001: 2948: case 0b1000_010_001: 2949: case 0b1000_011_001: 2950: case 0b1000_100_001: 2951: case 0b1000_101_001: 2952: case 0b1000_110_001: 2953: case 0b1000_111_001: 2954: irpOrToRegWord (); 2955: break irpSwitch; 2956: 2957: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2958: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2959: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2960: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2961: //OR.L <ea>,Dq |-|012346|-|-UUUU|-**00|D M+-WXZPI|1000_qqq_010_mmm_rrr 2962: case 0b1000_000_010: 2963: case 0b1000_001_010: 2964: case 0b1000_010_010: 2965: case 0b1000_011_010: 2966: case 0b1000_100_010: 2967: case 0b1000_101_010: 2968: case 0b1000_110_010: 2969: case 0b1000_111_010: 2970: irpOrToRegLong (); 2971: break irpSwitch; 2972: 2973: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2974: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2975: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2976: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2977: //DIVU.W <ea>,Dq |-|012346|-|-UUUU|-***0|D M+-WXZPI|1000_qqq_011_mmm_rrr 2978: case 0b1000_000_011: 2979: case 0b1000_001_011: 2980: case 0b1000_010_011: 2981: case 0b1000_011_011: 2982: case 0b1000_100_011: 2983: case 0b1000_101_011: 2984: case 0b1000_110_011: 2985: case 0b1000_111_011: 2986: irpDivuWord (); 2987: break irpSwitch; 2988: 2989: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2990: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2991: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2992: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2993: //SBCD.B Dr,Dq |-|012346|-|UUUUU|*U*U*| |1000_qqq_100_000_rrr 2994: //SBCD.B -(Ar),-(Aq) |-|012346|-|UUUUU|*U*U*| |1000_qqq_100_001_rrr 2995: //OR.B Dq,<ea> |-|012346|-|-UUUU|-**00| M+-WXZ |1000_qqq_100_mmm_rrr 2996: case 0b1000_000_100: 2997: case 0b1000_001_100: 2998: case 0b1000_010_100: 2999: case 0b1000_011_100: 3000: case 0b1000_100_100: 3001: case 0b1000_101_100: 3002: case 0b1000_110_100: 3003: case 0b1000_111_100: 3004: irpOrToMemByte (); 3005: break irpSwitch; 3006: 3007: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3008: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3009: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3010: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3011: //PACK Dr,Dq,#<data> |-|--2346|-|-----|-----| |1000_qqq_101_000_rrr-{data} 3012: //PACK -(Ar),-(Aq),#<data> |-|--2346|-|-----|-----| |1000_qqq_101_001_rrr-{data} 3013: //OR.W Dq,<ea> |-|012346|-|-UUUU|-**00| M+-WXZ |1000_qqq_101_mmm_rrr 3014: case 0b1000_000_101: 3015: case 0b1000_001_101: 3016: case 0b1000_010_101: 3017: case 0b1000_011_101: 3018: case 0b1000_100_101: 3019: case 0b1000_101_101: 3020: case 0b1000_110_101: 3021: case 0b1000_111_101: 3022: irpOrToMemWord (); 3023: break irpSwitch; 3024: 3025: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3026: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3027: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3028: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3029: //UNPK Dr,Dq,#<data> |-|--2346|-|-----|-----| |1000_qqq_110_000_rrr-{data} 3030: //UNPK -(Ar),-(Aq),#<data> |-|--2346|-|-----|-----| |1000_qqq_110_001_rrr-{data} 3031: //OR.L Dq,<ea> |-|012346|-|-UUUU|-**00| M+-WXZ |1000_qqq_110_mmm_rrr 3032: case 0b1000_000_110: 3033: case 0b1000_001_110: 3034: case 0b1000_010_110: 3035: case 0b1000_011_110: 3036: case 0b1000_100_110: 3037: case 0b1000_101_110: 3038: case 0b1000_110_110: 3039: case 0b1000_111_110: 3040: irpOrToMemLong (); 3041: break irpSwitch; 3042: 3043: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3044: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3045: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3046: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3047: //DIVS.W <ea>,Dq |-|012346|-|-UUUU|-***0|D M+-WXZPI|1000_qqq_111_mmm_rrr 3048: case 0b1000_000_111: 3049: case 0b1000_001_111: 3050: case 0b1000_010_111: 3051: case 0b1000_011_111: 3052: case 0b1000_100_111: 3053: case 0b1000_101_111: 3054: case 0b1000_110_111: 3055: case 0b1000_111_111: 3056: irpDivsWord (); 3057: break irpSwitch; 3058: 3059: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3060: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3061: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3062: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3063: //SUB.B <ea>,Dq |-|012346|-|UUUUU|*****|D M+-WXZPI|1001_qqq_000_mmm_rrr 3064: case 0b1001_000_000: 3065: case 0b1001_001_000: 3066: case 0b1001_010_000: 3067: case 0b1001_011_000: 3068: case 0b1001_100_000: 3069: case 0b1001_101_000: 3070: case 0b1001_110_000: 3071: case 0b1001_111_000: 3072: irpSubToRegByte (); 3073: break irpSwitch; 3074: 3075: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3076: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3077: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3078: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3079: //SUB.W <ea>,Dq |-|012346|-|UUUUU|*****|DAM+-WXZPI|1001_qqq_001_mmm_rrr 3080: case 0b1001_000_001: 3081: case 0b1001_001_001: 3082: case 0b1001_010_001: 3083: case 0b1001_011_001: 3084: case 0b1001_100_001: 3085: case 0b1001_101_001: 3086: case 0b1001_110_001: 3087: case 0b1001_111_001: 3088: irpSubToRegWord (); 3089: break irpSwitch; 3090: 3091: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3092: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3093: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3094: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3095: //SUB.L <ea>,Dq |-|012346|-|UUUUU|*****|DAM+-WXZPI|1001_qqq_010_mmm_rrr 3096: case 0b1001_000_010: 3097: case 0b1001_001_010: 3098: case 0b1001_010_010: 3099: case 0b1001_011_010: 3100: case 0b1001_100_010: 3101: case 0b1001_101_010: 3102: case 0b1001_110_010: 3103: case 0b1001_111_010: 3104: irpSubToRegLong (); 3105: break irpSwitch; 3106: 3107: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3108: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3109: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3110: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3111: //SUBA.W <ea>,Aq |-|012346|-|-----|-----|DAM+-WXZPI|1001_qqq_011_mmm_rrr 3112: //SUB.W <ea>,Aq |A|012346|-|-----|-----|DAM+-WXZPI|1001_qqq_011_mmm_rrr [SUBA.W <ea>,Aq] 3113: //CLR.W Ar |A|012346|-|-----|-----| A |1001_rrr_011_001_rrr [SUBA.W Ar,Ar] 3114: case 0b1001_000_011: 3115: case 0b1001_001_011: 3116: case 0b1001_010_011: 3117: case 0b1001_011_011: 3118: case 0b1001_100_011: 3119: case 0b1001_101_011: 3120: case 0b1001_110_011: 3121: case 0b1001_111_011: 3122: irpSubaWord (); 3123: break irpSwitch; 3124: 3125: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3126: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3127: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3128: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3129: //SUBX.B Dr,Dq |-|012346|-|*UUUU|*****| |1001_qqq_100_000_rrr 3130: //SUBX.B -(Ar),-(Aq) |-|012346|-|*UUUU|*****| |1001_qqq_100_001_rrr 3131: //SUB.B Dq,<ea> |-|012346|-|UUUUU|*****| M+-WXZ |1001_qqq_100_mmm_rrr 3132: case 0b1001_000_100: 3133: case 0b1001_001_100: 3134: case 0b1001_010_100: 3135: case 0b1001_011_100: 3136: case 0b1001_100_100: 3137: case 0b1001_101_100: 3138: case 0b1001_110_100: 3139: case 0b1001_111_100: 3140: irpSubToMemByte (); 3141: break irpSwitch; 3142: 3143: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3144: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3145: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3146: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3147: //SUBX.W Dr,Dq |-|012346|-|*UUUU|*****| |1001_qqq_101_000_rrr 3148: //SUBX.W -(Ar),-(Aq) |-|012346|-|*UUUU|*****| |1001_qqq_101_001_rrr 3149: //SUB.W Dq,<ea> |-|012346|-|UUUUU|*****| M+-WXZ |1001_qqq_101_mmm_rrr 3150: case 0b1001_000_101: 3151: case 0b1001_001_101: 3152: case 0b1001_010_101: 3153: case 0b1001_011_101: 3154: case 0b1001_100_101: 3155: case 0b1001_101_101: 3156: case 0b1001_110_101: 3157: case 0b1001_111_101: 3158: irpSubToMemWord (); 3159: break irpSwitch; 3160: 3161: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3162: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3163: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3164: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3165: //SUBX.L Dr,Dq |-|012346|-|*UUUU|*****| |1001_qqq_110_000_rrr 3166: //SUBX.L -(Ar),-(Aq) |-|012346|-|*UUUU|*****| |1001_qqq_110_001_rrr 3167: //SUB.L Dq,<ea> |-|012346|-|UUUUU|*****| M+-WXZ |1001_qqq_110_mmm_rrr 3168: case 0b1001_000_110: 3169: case 0b1001_001_110: 3170: case 0b1001_010_110: 3171: case 0b1001_011_110: 3172: case 0b1001_100_110: 3173: case 0b1001_101_110: 3174: case 0b1001_110_110: 3175: case 0b1001_111_110: 3176: irpSubToMemLong (); 3177: break irpSwitch; 3178: 3179: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3180: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3181: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3182: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3183: //SUBA.L <ea>,Aq |-|012346|-|-----|-----|DAM+-WXZPI|1001_qqq_111_mmm_rrr 3184: //SUB.L <ea>,Aq |A|012346|-|-----|-----|DAM+-WXZPI|1001_qqq_111_mmm_rrr [SUBA.L <ea>,Aq] 3185: //CLR.L Ar |A|012346|-|-----|-----| A |1001_rrr_111_001_rrr [SUBA.L Ar,Ar] 3186: case 0b1001_000_111: 3187: case 0b1001_001_111: 3188: case 0b1001_010_111: 3189: case 0b1001_011_111: 3190: case 0b1001_100_111: 3191: case 0b1001_101_111: 3192: case 0b1001_110_111: 3193: case 0b1001_111_111: 3194: irpSubaLong (); 3195: break irpSwitch; 3196: 3197: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3198: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3199: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3200: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3201: //SXCALL <name> |A|012346|-|UUUUU|*****| |1010_0dd_ddd_ddd_ddd [ALINE #<data>] 3202: case 0b1010_000_000: 3203: case 0b1010_000_001: 3204: case 0b1010_000_010: 3205: case 0b1010_000_011: 3206: case 0b1010_000_100: 3207: case 0b1010_000_101: 3208: case 0b1010_000_110: 3209: case 0b1010_000_111: 3210: case 0b1010_001_000: 3211: case 0b1010_001_001: 3212: case 0b1010_001_010: 3213: case 0b1010_001_011: 3214: case 0b1010_001_100: 3215: case 0b1010_001_101: 3216: case 0b1010_001_110: 3217: case 0b1010_001_111: 3218: case 0b1010_010_000: 3219: case 0b1010_010_001: 3220: case 0b1010_010_010: 3221: case 0b1010_010_011: 3222: case 0b1010_010_100: 3223: case 0b1010_010_101: 3224: case 0b1010_010_110: 3225: case 0b1010_010_111: 3226: case 0b1010_011_000: 3227: case 0b1010_011_001: 3228: case 0b1010_011_010: 3229: case 0b1010_011_011: 3230: case 0b1010_011_100: 3231: case 0b1010_011_101: 3232: case 0b1010_011_110: 3233: case 0b1010_011_111: 3234: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3235: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3236: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3237: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3238: //ALINE #<data> |-|012346|-|UUUUU|*****| |1010_ddd_ddd_ddd_ddd (line 1010 emulator) 3239: case 0b1010_100_000: 3240: case 0b1010_100_001: 3241: case 0b1010_100_010: 3242: case 0b1010_100_011: 3243: case 0b1010_100_100: 3244: case 0b1010_100_101: 3245: case 0b1010_100_110: 3246: case 0b1010_100_111: 3247: case 0b1010_101_000: 3248: case 0b1010_101_001: 3249: case 0b1010_101_010: 3250: case 0b1010_101_011: 3251: case 0b1010_101_100: 3252: case 0b1010_101_101: 3253: case 0b1010_101_110: 3254: case 0b1010_101_111: 3255: case 0b1010_110_000: 3256: case 0b1010_110_001: 3257: case 0b1010_110_010: 3258: case 0b1010_110_011: 3259: case 0b1010_110_100: 3260: case 0b1010_110_101: 3261: case 0b1010_110_110: 3262: case 0b1010_110_111: 3263: case 0b1010_111_000: 3264: case 0b1010_111_001: 3265: case 0b1010_111_010: 3266: case 0b1010_111_011: 3267: case 0b1010_111_100: 3268: case 0b1010_111_101: 3269: case 0b1010_111_110: 3270: case 0b1010_111_111: 3271: irpAline (); 3272: break irpSwitch; 3273: 3274: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3275: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3276: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3277: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3278: //CMP.B <ea>,Dq |-|012346|-|-UUUU|-****|D M+-WXZPI|1011_qqq_000_mmm_rrr 3279: case 0b1011_000_000: 3280: case 0b1011_001_000: 3281: case 0b1011_010_000: 3282: case 0b1011_011_000: 3283: case 0b1011_100_000: 3284: case 0b1011_101_000: 3285: case 0b1011_110_000: 3286: case 0b1011_111_000: 3287: irpCmpByte (); 3288: break irpSwitch; 3289: 3290: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3291: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3292: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3293: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3294: //CMP.W <ea>,Dq |-|012346|-|-UUUU|-****|DAM+-WXZPI|1011_qqq_001_mmm_rrr 3295: case 0b1011_000_001: 3296: case 0b1011_001_001: 3297: case 0b1011_010_001: 3298: case 0b1011_011_001: 3299: case 0b1011_100_001: 3300: case 0b1011_101_001: 3301: case 0b1011_110_001: 3302: case 0b1011_111_001: 3303: irpCmpWord (); 3304: break irpSwitch; 3305: 3306: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3307: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3308: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3309: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3310: //CMP.L <ea>,Dq |-|012346|-|-UUUU|-****|DAM+-WXZPI|1011_qqq_010_mmm_rrr 3311: case 0b1011_000_010: 3312: case 0b1011_001_010: 3313: case 0b1011_010_010: 3314: case 0b1011_011_010: 3315: case 0b1011_100_010: 3316: case 0b1011_101_010: 3317: case 0b1011_110_010: 3318: case 0b1011_111_010: 3319: irpCmpLong (); 3320: break irpSwitch; 3321: 3322: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3323: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3324: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3325: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3326: //CMPA.W <ea>,Aq |-|012346|-|-UUUU|-****|DAM+-WXZPI|1011_qqq_011_mmm_rrr 3327: //CMP.W <ea>,Aq |A|012346|-|-UUUU|-****|DAM+-WXZPI|1011_qqq_011_mmm_rrr [CMPA.W <ea>,Aq] 3328: case 0b1011_000_011: 3329: case 0b1011_001_011: 3330: case 0b1011_010_011: 3331: case 0b1011_011_011: 3332: case 0b1011_100_011: 3333: case 0b1011_101_011: 3334: case 0b1011_110_011: 3335: case 0b1011_111_011: 3336: irpCmpaWord (); 3337: break irpSwitch; 3338: 3339: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3340: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3341: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3342: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3343: //EOR.B Dq,<ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |1011_qqq_100_mmm_rrr 3344: //CMPM.B (Ar)+,(Aq)+ |-|012346|-|-UUUU|-****| |1011_qqq_100_001_rrr 3345: case 0b1011_000_100: 3346: case 0b1011_001_100: 3347: case 0b1011_010_100: 3348: case 0b1011_011_100: 3349: case 0b1011_100_100: 3350: case 0b1011_101_100: 3351: case 0b1011_110_100: 3352: case 0b1011_111_100: 3353: irpEorByte (); 3354: break irpSwitch; 3355: 3356: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3357: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3358: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3359: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3360: //EOR.W Dq,<ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |1011_qqq_101_mmm_rrr 3361: //CMPM.W (Ar)+,(Aq)+ |-|012346|-|-UUUU|-****| |1011_qqq_101_001_rrr 3362: case 0b1011_000_101: 3363: case 0b1011_001_101: 3364: case 0b1011_010_101: 3365: case 0b1011_011_101: 3366: case 0b1011_100_101: 3367: case 0b1011_101_101: 3368: case 0b1011_110_101: 3369: case 0b1011_111_101: 3370: irpEorWord (); 3371: break irpSwitch; 3372: 3373: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3374: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3375: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3376: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3377: //EOR.L Dq,<ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |1011_qqq_110_mmm_rrr 3378: //CMPM.L (Ar)+,(Aq)+ |-|012346|-|-UUUU|-****| |1011_qqq_110_001_rrr 3379: case 0b1011_000_110: 3380: case 0b1011_001_110: 3381: case 0b1011_010_110: 3382: case 0b1011_011_110: 3383: case 0b1011_100_110: 3384: case 0b1011_101_110: 3385: case 0b1011_110_110: 3386: case 0b1011_111_110: 3387: irpEorLong (); 3388: break irpSwitch; 3389: 3390: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3391: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3392: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3393: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3394: //CMPA.L <ea>,Aq |-|012346|-|-UUUU|-****|DAM+-WXZPI|1011_qqq_111_mmm_rrr 3395: //CMP.L <ea>,Aq |A|012346|-|-UUUU|-****|DAM+-WXZPI|1011_qqq_111_mmm_rrr [CMPA.L <ea>,Aq] 3396: case 0b1011_000_111: 3397: case 0b1011_001_111: 3398: case 0b1011_010_111: 3399: case 0b1011_011_111: 3400: case 0b1011_100_111: 3401: case 0b1011_101_111: 3402: case 0b1011_110_111: 3403: case 0b1011_111_111: 3404: irpCmpaLong (); 3405: break irpSwitch; 3406: 3407: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3408: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3409: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3410: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3411: //AND.B <ea>,Dq |-|012346|-|-UUUU|-**00|D M+-WXZPI|1100_qqq_000_mmm_rrr 3412: case 0b1100_000_000: 3413: case 0b1100_001_000: 3414: case 0b1100_010_000: 3415: case 0b1100_011_000: 3416: case 0b1100_100_000: 3417: case 0b1100_101_000: 3418: case 0b1100_110_000: 3419: case 0b1100_111_000: 3420: irpAndToRegByte (); 3421: break irpSwitch; 3422: 3423: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3424: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3425: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3426: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3427: //AND.W <ea>,Dq |-|012346|-|-UUUU|-**00|D M+-WXZPI|1100_qqq_001_mmm_rrr 3428: case 0b1100_000_001: 3429: case 0b1100_001_001: 3430: case 0b1100_010_001: 3431: case 0b1100_011_001: 3432: case 0b1100_100_001: 3433: case 0b1100_101_001: 3434: case 0b1100_110_001: 3435: case 0b1100_111_001: 3436: irpAndToRegWord (); 3437: break irpSwitch; 3438: 3439: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3440: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3441: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3442: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3443: //AND.L <ea>,Dq |-|012346|-|-UUUU|-**00|D M+-WXZPI|1100_qqq_010_mmm_rrr 3444: case 0b1100_000_010: 3445: case 0b1100_001_010: 3446: case 0b1100_010_010: 3447: case 0b1100_011_010: 3448: case 0b1100_100_010: 3449: case 0b1100_101_010: 3450: case 0b1100_110_010: 3451: case 0b1100_111_010: 3452: irpAndToRegLong (); 3453: break irpSwitch; 3454: 3455: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3456: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3457: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3458: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3459: //MULU.W <ea>,Dq |-|012346|-|-UUUU|-***0|D M+-WXZPI|1100_qqq_011_mmm_rrr 3460: case 0b1100_000_011: 3461: case 0b1100_001_011: 3462: case 0b1100_010_011: 3463: case 0b1100_011_011: 3464: case 0b1100_100_011: 3465: case 0b1100_101_011: 3466: case 0b1100_110_011: 3467: case 0b1100_111_011: 3468: irpMuluWord (); 3469: break irpSwitch; 3470: 3471: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3472: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3473: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3474: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3475: //ABCD.B Dr,Dq |-|012346|-|UUUUU|*U*U*| |1100_qqq_100_000_rrr 3476: //ABCD.B -(Ar),-(Aq) |-|012346|-|UUUUU|*U*U*| |1100_qqq_100_001_rrr 3477: //AND.B Dq,<ea> |-|012346|-|-UUUU|-**00| M+-WXZ |1100_qqq_100_mmm_rrr 3478: case 0b1100_000_100: 3479: case 0b1100_001_100: 3480: case 0b1100_010_100: 3481: case 0b1100_011_100: 3482: case 0b1100_100_100: 3483: case 0b1100_101_100: 3484: case 0b1100_110_100: 3485: case 0b1100_111_100: 3486: irpAndToMemByte (); 3487: break irpSwitch; 3488: 3489: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3490: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3491: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3492: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3493: //EXG.L Dq,Dr |-|012346|-|-----|-----| |1100_qqq_101_000_rrr 3494: //EXG.L Aq,Ar |-|012346|-|-----|-----| |1100_qqq_101_001_rrr 3495: //AND.W Dq,<ea> |-|012346|-|-UUUU|-**00| M+-WXZ |1100_qqq_101_mmm_rrr 3496: case 0b1100_000_101: 3497: case 0b1100_001_101: 3498: case 0b1100_010_101: 3499: case 0b1100_011_101: 3500: case 0b1100_100_101: 3501: case 0b1100_101_101: 3502: case 0b1100_110_101: 3503: case 0b1100_111_101: 3504: irpAndToMemWord (); 3505: break irpSwitch; 3506: 3507: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3508: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3509: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3510: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3511: //EXG.L Dq,Ar |-|012346|-|-----|-----| |1100_qqq_110_001_rrr 3512: //AND.L Dq,<ea> |-|012346|-|-UUUU|-**00| M+-WXZ |1100_qqq_110_mmm_rrr 3513: case 0b1100_000_110: 3514: case 0b1100_001_110: 3515: case 0b1100_010_110: 3516: case 0b1100_011_110: 3517: case 0b1100_100_110: 3518: case 0b1100_101_110: 3519: case 0b1100_110_110: 3520: case 0b1100_111_110: 3521: irpAndToMemLong (); 3522: break irpSwitch; 3523: 3524: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3525: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3526: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3527: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3528: //MULS.W <ea>,Dq |-|012346|-|-UUUU|-***0|D M+-WXZPI|1100_qqq_111_mmm_rrr 3529: case 0b1100_000_111: 3530: case 0b1100_001_111: 3531: case 0b1100_010_111: 3532: case 0b1100_011_111: 3533: case 0b1100_100_111: 3534: case 0b1100_101_111: 3535: case 0b1100_110_111: 3536: case 0b1100_111_111: 3537: irpMulsWord (); 3538: break irpSwitch; 3539: 3540: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3541: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3542: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3543: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3544: //ADD.B <ea>,Dq |-|012346|-|UUUUU|*****|D M+-WXZPI|1101_qqq_000_mmm_rrr 3545: case 0b1101_000_000: 3546: case 0b1101_001_000: 3547: case 0b1101_010_000: 3548: case 0b1101_011_000: 3549: case 0b1101_100_000: 3550: case 0b1101_101_000: 3551: case 0b1101_110_000: 3552: case 0b1101_111_000: 3553: irpAddToRegByte (); 3554: break irpSwitch; 3555: 3556: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3557: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3558: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3559: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3560: //ADD.W <ea>,Dq |-|012346|-|UUUUU|*****|DAM+-WXZPI|1101_qqq_001_mmm_rrr 3561: case 0b1101_000_001: 3562: case 0b1101_001_001: 3563: case 0b1101_010_001: 3564: case 0b1101_011_001: 3565: case 0b1101_100_001: 3566: case 0b1101_101_001: 3567: case 0b1101_110_001: 3568: case 0b1101_111_001: 3569: irpAddToRegWord (); 3570: break irpSwitch; 3571: 3572: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3573: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3574: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3575: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3576: //ADD.L <ea>,Dq |-|012346|-|UUUUU|*****|DAM+-WXZPI|1101_qqq_010_mmm_rrr 3577: case 0b1101_000_010: 3578: case 0b1101_001_010: 3579: case 0b1101_010_010: 3580: case 0b1101_011_010: 3581: case 0b1101_100_010: 3582: case 0b1101_101_010: 3583: case 0b1101_110_010: 3584: case 0b1101_111_010: 3585: irpAddToRegLong (); 3586: break irpSwitch; 3587: 3588: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3589: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3590: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3591: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3592: //ADDA.W <ea>,Aq |-|012346|-|-----|-----|DAM+-WXZPI|1101_qqq_011_mmm_rrr 3593: //ADD.W <ea>,Aq |A|012346|-|-----|-----|DAM+-WXZPI|1101_qqq_011_mmm_rrr [ADDA.W <ea>,Aq] 3594: case 0b1101_000_011: 3595: case 0b1101_001_011: 3596: case 0b1101_010_011: 3597: case 0b1101_011_011: 3598: case 0b1101_100_011: 3599: case 0b1101_101_011: 3600: case 0b1101_110_011: 3601: case 0b1101_111_011: 3602: irpAddaWord (); 3603: break irpSwitch; 3604: 3605: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3606: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3607: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3608: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3609: //ADDX.B Dr,Dq |-|012346|-|*UUUU|*****| |1101_qqq_100_000_rrr 3610: //ADDX.B -(Ar),-(Aq) |-|012346|-|*UUUU|*****| |1101_qqq_100_001_rrr 3611: //ADD.B Dq,<ea> |-|012346|-|UUUUU|*****| M+-WXZ |1101_qqq_100_mmm_rrr 3612: case 0b1101_000_100: 3613: case 0b1101_001_100: 3614: case 0b1101_010_100: 3615: case 0b1101_011_100: 3616: case 0b1101_100_100: 3617: case 0b1101_101_100: 3618: case 0b1101_110_100: 3619: case 0b1101_111_100: 3620: irpAddToMemByte (); 3621: break irpSwitch; 3622: 3623: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3624: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3625: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3626: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3627: //ADDX.W Dr,Dq |-|012346|-|*UUUU|*****| |1101_qqq_101_000_rrr 3628: //ADDX.W -(Ar),-(Aq) |-|012346|-|*UUUU|*****| |1101_qqq_101_001_rrr 3629: //ADD.W Dq,<ea> |-|012346|-|UUUUU|*****| M+-WXZ |1101_qqq_101_mmm_rrr 3630: case 0b1101_000_101: 3631: case 0b1101_001_101: 3632: case 0b1101_010_101: 3633: case 0b1101_011_101: 3634: case 0b1101_100_101: 3635: case 0b1101_101_101: 3636: case 0b1101_110_101: 3637: case 0b1101_111_101: 3638: irpAddToMemWord (); 3639: break irpSwitch; 3640: 3641: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3642: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3643: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3644: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3645: //ADDX.L Dr,Dq |-|012346|-|*UUUU|*****| |1101_qqq_110_000_rrr 3646: //ADDX.L -(Ar),-(Aq) |-|012346|-|*UUUU|*****| |1101_qqq_110_001_rrr 3647: //ADD.L Dq,<ea> |-|012346|-|UUUUU|*****| M+-WXZ |1101_qqq_110_mmm_rrr 3648: case 0b1101_000_110: 3649: case 0b1101_001_110: 3650: case 0b1101_010_110: 3651: case 0b1101_011_110: 3652: case 0b1101_100_110: 3653: case 0b1101_101_110: 3654: case 0b1101_110_110: 3655: case 0b1101_111_110: 3656: irpAddToMemLong (); 3657: break irpSwitch; 3658: 3659: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3660: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3661: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3662: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3663: //ADDA.L <ea>,Aq |-|012346|-|-----|-----|DAM+-WXZPI|1101_qqq_111_mmm_rrr 3664: //ADD.L <ea>,Aq |A|012346|-|-----|-----|DAM+-WXZPI|1101_qqq_111_mmm_rrr [ADDA.L <ea>,Aq] 3665: case 0b1101_000_111: 3666: case 0b1101_001_111: 3667: case 0b1101_010_111: 3668: case 0b1101_011_111: 3669: case 0b1101_100_111: 3670: case 0b1101_101_111: 3671: case 0b1101_110_111: 3672: case 0b1101_111_111: 3673: irpAddaLong (); 3674: break irpSwitch; 3675: 3676: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3677: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3678: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3679: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3680: //ASR.B #<data>,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_000_000_rrr 3681: //LSR.B #<data>,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_000_001_rrr 3682: //ROXR.B #<data>,Dr |-|012346|-|*UUUU|***0*| |1110_qqq_000_010_rrr 3683: //ROR.B #<data>,Dr |-|012346|-|-UUUU|-**0*| |1110_qqq_000_011_rrr 3684: //ASR.B Dq,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_000_100_rrr 3685: //LSR.B Dq,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_000_101_rrr 3686: //ROXR.B Dq,Dr |-|012346|-|*UUUU|***0*| |1110_qqq_000_110_rrr 3687: //ROR.B Dq,Dr |-|012346|-|-UUUU|-**0*| |1110_qqq_000_111_rrr 3688: //ASR.B Dr |A|012346|-|UUUUU|***0*| |1110_001_000_000_rrr [ASR.B #1,Dr] 3689: //LSR.B Dr |A|012346|-|UUUUU|***0*| |1110_001_000_001_rrr [LSR.B #1,Dr] 3690: //ROXR.B Dr |A|012346|-|*UUUU|***0*| |1110_001_000_010_rrr [ROXR.B #1,Dr] 3691: //ROR.B Dr |A|012346|-|-UUUU|-**0*| |1110_001_000_011_rrr [ROR.B #1,Dr] 3692: case 0b1110_000_000: 3693: case 0b1110_001_000: 3694: case 0b1110_010_000: 3695: case 0b1110_011_000: 3696: case 0b1110_100_000: 3697: case 0b1110_101_000: 3698: case 0b1110_110_000: 3699: case 0b1110_111_000: 3700: irpXxrToRegByte (); 3701: break irpSwitch; 3702: 3703: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3704: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3705: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3706: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3707: //ASR.W #<data>,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_001_000_rrr 3708: //LSR.W #<data>,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_001_001_rrr 3709: //ROXR.W #<data>,Dr |-|012346|-|*UUUU|***0*| |1110_qqq_001_010_rrr 3710: //ROR.W #<data>,Dr |-|012346|-|-UUUU|-**0*| |1110_qqq_001_011_rrr 3711: //ASR.W Dq,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_001_100_rrr 3712: //LSR.W Dq,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_001_101_rrr 3713: //ROXR.W Dq,Dr |-|012346|-|*UUUU|***0*| |1110_qqq_001_110_rrr 3714: //ROR.W Dq,Dr |-|012346|-|-UUUU|-**0*| |1110_qqq_001_111_rrr 3715: //ASR.W Dr |A|012346|-|UUUUU|***0*| |1110_001_001_000_rrr [ASR.W #1,Dr] 3716: //LSR.W Dr |A|012346|-|UUUUU|***0*| |1110_001_001_001_rrr [LSR.W #1,Dr] 3717: //ROXR.W Dr |A|012346|-|*UUUU|***0*| |1110_001_001_010_rrr [ROXR.W #1,Dr] 3718: //ROR.W Dr |A|012346|-|-UUUU|-**0*| |1110_001_001_011_rrr [ROR.W #1,Dr] 3719: case 0b1110_000_001: 3720: case 0b1110_001_001: 3721: case 0b1110_010_001: 3722: case 0b1110_011_001: 3723: case 0b1110_100_001: 3724: case 0b1110_101_001: 3725: case 0b1110_110_001: 3726: case 0b1110_111_001: 3727: irpXxrToRegWord (); 3728: break irpSwitch; 3729: 3730: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3731: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3732: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3733: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3734: //ASR.L #<data>,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_010_000_rrr 3735: //LSR.L #<data>,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_010_001_rrr 3736: //ROXR.L #<data>,Dr |-|012346|-|*UUUU|***0*| |1110_qqq_010_010_rrr 3737: //ROR.L #<data>,Dr |-|012346|-|-UUUU|-**0*| |1110_qqq_010_011_rrr 3738: //ASR.L Dq,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_010_100_rrr 3739: //LSR.L Dq,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_010_101_rrr 3740: //ROXR.L Dq,Dr |-|012346|-|*UUUU|***0*| |1110_qqq_010_110_rrr 3741: //ROR.L Dq,Dr |-|012346|-|-UUUU|-**0*| |1110_qqq_010_111_rrr 3742: //ASR.L Dr |A|012346|-|UUUUU|***0*| |1110_001_010_000_rrr [ASR.L #1,Dr] 3743: //LSR.L Dr |A|012346|-|UUUUU|***0*| |1110_001_010_001_rrr [LSR.L #1,Dr] 3744: //ROXR.L Dr |A|012346|-|*UUUU|***0*| |1110_001_010_010_rrr [ROXR.L #1,Dr] 3745: //ROR.L Dr |A|012346|-|-UUUU|-**0*| |1110_001_010_011_rrr [ROR.L #1,Dr] 3746: case 0b1110_000_010: 3747: case 0b1110_001_010: 3748: case 0b1110_010_010: 3749: case 0b1110_011_010: 3750: case 0b1110_100_010: 3751: case 0b1110_101_010: 3752: case 0b1110_110_010: 3753: case 0b1110_111_010: 3754: irpXxrToRegLong (); 3755: break irpSwitch; 3756: 3757: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3758: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3759: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3760: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3761: //ASR.W <ea> |-|012346|-|UUUUU|***0*| M+-WXZ |1110_000_011_mmm_rrr 3762: case 0b1110_000_011: 3763: irpAsrToMem (); 3764: break irpSwitch; 3765: 3766: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3767: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3768: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3769: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3770: //ASL.B #<data>,Dr |-|012346|-|UUUUU|*****| |1110_qqq_100_000_rrr 3771: //LSL.B #<data>,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_100_001_rrr 3772: //ROXL.B #<data>,Dr |-|012346|-|*UUUU|***0*| |1110_qqq_100_010_rrr 3773: //ROL.B #<data>,Dr |-|012346|-|-UUUU|-**0*| |1110_qqq_100_011_rrr 3774: //ASL.B Dq,Dr |-|012346|-|UUUUU|*****| |1110_qqq_100_100_rrr 3775: //LSL.B Dq,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_100_101_rrr 3776: //ROXL.B Dq,Dr |-|012346|-|*UUUU|***0*| |1110_qqq_100_110_rrr 3777: //ROL.B Dq,Dr |-|012346|-|-UUUU|-**0*| |1110_qqq_100_111_rrr 3778: //ASL.B Dr |A|012346|-|UUUUU|*****| |1110_001_100_000_rrr [ASL.B #1,Dr] 3779: //LSL.B Dr |A|012346|-|UUUUU|***0*| |1110_001_100_001_rrr [LSL.B #1,Dr] 3780: //ROXL.B Dr |A|012346|-|*UUUU|***0*| |1110_001_100_010_rrr [ROXL.B #1,Dr] 3781: //ROL.B Dr |A|012346|-|-UUUU|-**0*| |1110_001_100_011_rrr [ROL.B #1,Dr] 3782: case 0b1110_000_100: 3783: case 0b1110_001_100: 3784: case 0b1110_010_100: 3785: case 0b1110_011_100: 3786: case 0b1110_100_100: 3787: case 0b1110_101_100: 3788: case 0b1110_110_100: 3789: case 0b1110_111_100: 3790: irpXxlToRegByte (); 3791: break irpSwitch; 3792: 3793: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3794: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3795: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3796: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3797: //ASL.W #<data>,Dr |-|012346|-|UUUUU|*****| |1110_qqq_101_000_rrr 3798: //LSL.W #<data>,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_101_001_rrr 3799: //ROXL.W #<data>,Dr |-|012346|-|*UUUU|***0*| |1110_qqq_101_010_rrr 3800: //ROL.W #<data>,Dr |-|012346|-|-UUUU|-**0*| |1110_qqq_101_011_rrr 3801: //ASL.W Dq,Dr |-|012346|-|UUUUU|*****| |1110_qqq_101_100_rrr 3802: //LSL.W Dq,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_101_101_rrr 3803: //ROXL.W Dq,Dr |-|012346|-|*UUUU|***0*| |1110_qqq_101_110_rrr 3804: //ROL.W Dq,Dr |-|012346|-|-UUUU|-**0*| |1110_qqq_101_111_rrr 3805: //ASL.W Dr |A|012346|-|UUUUU|*****| |1110_001_101_000_rrr [ASL.W #1,Dr] 3806: //LSL.W Dr |A|012346|-|UUUUU|***0*| |1110_001_101_001_rrr [LSL.W #1,Dr] 3807: //ROXL.W Dr |A|012346|-|*UUUU|***0*| |1110_001_101_010_rrr [ROXL.W #1,Dr] 3808: //ROL.W Dr |A|012346|-|-UUUU|-**0*| |1110_001_101_011_rrr [ROL.W #1,Dr] 3809: case 0b1110_000_101: 3810: case 0b1110_001_101: 3811: case 0b1110_010_101: 3812: case 0b1110_011_101: 3813: case 0b1110_100_101: 3814: case 0b1110_101_101: 3815: case 0b1110_110_101: 3816: case 0b1110_111_101: 3817: irpXxlToRegWord (); 3818: break irpSwitch; 3819: 3820: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3821: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3822: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3823: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3824: //ASL.L #<data>,Dr |-|012346|-|UUUUU|*****| |1110_qqq_110_000_rrr 3825: //LSL.L #<data>,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_110_001_rrr 3826: //ROXL.L #<data>,Dr |-|012346|-|*UUUU|***0*| |1110_qqq_110_010_rrr 3827: //ROL.L #<data>,Dr |-|012346|-|-UUUU|-**0*| |1110_qqq_110_011_rrr 3828: //ASL.L Dq,Dr |-|012346|-|UUUUU|*****| |1110_qqq_110_100_rrr 3829: //LSL.L Dq,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_110_101_rrr 3830: //ROXL.L Dq,Dr |-|012346|-|*UUUU|***0*| |1110_qqq_110_110_rrr 3831: //ROL.L Dq,Dr |-|012346|-|-UUUU|-**0*| |1110_qqq_110_111_rrr 3832: //ASL.L Dr |A|012346|-|UUUUU|*****| |1110_001_110_000_rrr [ASL.L #1,Dr] 3833: //LSL.L Dr |A|012346|-|UUUUU|***0*| |1110_001_110_001_rrr [LSL.L #1,Dr] 3834: //ROXL.L Dr |A|012346|-|*UUUU|***0*| |1110_001_110_010_rrr [ROXL.L #1,Dr] 3835: //ROL.L Dr |A|012346|-|-UUUU|-**0*| |1110_001_110_011_rrr [ROL.L #1,Dr] 3836: case 0b1110_000_110: 3837: case 0b1110_001_110: 3838: case 0b1110_010_110: 3839: case 0b1110_011_110: 3840: case 0b1110_100_110: 3841: case 0b1110_101_110: 3842: case 0b1110_110_110: 3843: case 0b1110_111_110: 3844: irpXxlToRegLong (); 3845: break irpSwitch; 3846: 3847: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3848: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3849: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3850: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3851: //ASL.W <ea> |-|012346|-|UUUUU|*****| M+-WXZ |1110_000_111_mmm_rrr 3852: case 0b1110_000_111: 3853: irpAslToMem (); 3854: break irpSwitch; 3855: 3856: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3857: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3858: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3859: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3860: //LSR.W <ea> |-|012346|-|UUUUU|*0*0*| M+-WXZ |1110_001_011_mmm_rrr 3861: case 0b1110_001_011: 3862: irpLsrToMem (); 3863: break irpSwitch; 3864: 3865: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3866: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3867: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3868: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3869: //LSL.W <ea> |-|012346|-|UUUUU|***0*| M+-WXZ |1110_001_111_mmm_rrr 3870: case 0b1110_001_111: 3871: irpLslToMem (); 3872: break irpSwitch; 3873: 3874: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3875: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3876: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3877: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3878: //ROXR.W <ea> |-|012346|-|*UUUU|***0*| M+-WXZ |1110_010_011_mmm_rrr 3879: case 0b1110_010_011: 3880: irpRoxrToMem (); 3881: break irpSwitch; 3882: 3883: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3884: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3885: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3886: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3887: //ROXL.W <ea> |-|012346|-|*UUUU|***0*| M+-WXZ |1110_010_111_mmm_rrr 3888: case 0b1110_010_111: 3889: irpRoxlToMem (); 3890: break irpSwitch; 3891: 3892: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3893: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3894: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3895: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3896: //ROR.W <ea> |-|012346|-|-UUUU|-**0*| M+-WXZ |1110_011_011_mmm_rrr 3897: case 0b1110_011_011: 3898: irpRorToMem (); 3899: break irpSwitch; 3900: 3901: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3902: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3903: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3904: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3905: //ROL.W <ea> |-|012346|-|-UUUU|-**0*| M+-WXZ |1110_011_111_mmm_rrr 3906: case 0b1110_011_111: 3907: irpRolToMem (); 3908: break irpSwitch; 3909: 3910: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3911: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3912: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3913: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3914: //BFTST <ea>{#o:#w} |-|--2346|-|-UUUU|-**00|D M WXZP |1110_100_011_mmm_rrr-00000ooooo0wwwww 3915: //BFTST <ea>{#o:Dw} |-|--2346|-|-UUUU|-**00|D M WXZP |1110_100_011_mmm_rrr-00000ooooo100www 3916: //BFTST <ea>{Do:#w} |-|--2346|-|-UUUU|-**00|D M WXZP |1110_100_011_mmm_rrr-0000100ooo0wwwww 3917: //BFTST <ea>{Do:Dw} |-|--2346|-|-UUUU|-**00|D M WXZP |1110_100_011_mmm_rrr-0000100ooo100www 3918: case 0b1110_100_011: 3919: irpBftst (); 3920: break irpSwitch; 3921: 3922: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3923: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3924: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3925: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3926: //BFEXTU <ea>{#o:#w},Dn |-|--2346|-|-UUUU|-**00|D M WXZP |1110_100_111_mmm_rrr-0nnn0ooooo0wwwww 3927: //BFEXTU <ea>{#o:Dw},Dn |-|--2346|-|-UUUU|-**00|D M WXZP |1110_100_111_mmm_rrr-0nnn0ooooo100www 3928: //BFEXTU <ea>{Do:#w},Dn |-|--2346|-|-UUUU|-**00|D M WXZP |1110_100_111_mmm_rrr-0nnn100ooo0wwwww 3929: //BFEXTU <ea>{Do:Dw},Dn |-|--2346|-|-UUUU|-**00|D M WXZP |1110_100_111_mmm_rrr-0nnn100ooo100www 3930: case 0b1110_100_111: 3931: irpBfextu (); 3932: break irpSwitch; 3933: 3934: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3935: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3936: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3937: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3938: //BFCHG <ea>{#o:#w} |-|--2346|-|-UUUU|-**00|D M WXZ |1110_101_011_mmm_rrr-00000ooooo0wwwww 3939: //BFCHG <ea>{#o:Dw} |-|--2346|-|-UUUU|-**00|D M WXZ |1110_101_011_mmm_rrr-00000ooooo100www 3940: //BFCHG <ea>{Do:#w} |-|--2346|-|-UUUU|-**00|D M WXZ |1110_101_011_mmm_rrr-0000100ooo0wwwww 3941: //BFCHG <ea>{Do:Dw} |-|--2346|-|-UUUU|-**00|D M WXZ |1110_101_011_mmm_rrr-0000100ooo100www 3942: case 0b1110_101_011: 3943: irpBfchg (); 3944: break irpSwitch; 3945: 3946: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3947: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3948: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3949: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3950: //BFEXTS <ea>{#o:#w},Dn |-|--2346|-|-UUUU|-**00|D M WXZP |1110_101_111_mmm_rrr-0nnn0ooooo0wwwww 3951: //BFEXTS <ea>{#o:Dw},Dn |-|--2346|-|-UUUU|-**00|D M WXZP |1110_101_111_mmm_rrr-0nnn0ooooo100www 3952: //BFEXTS <ea>{Do:#w},Dn |-|--2346|-|-UUUU|-**00|D M WXZP |1110_101_111_mmm_rrr-0nnn100ooo0wwwww 3953: //BFEXTS <ea>{Do:Dw},Dn |-|--2346|-|-UUUU|-**00|D M WXZP |1110_101_111_mmm_rrr-0nnn100ooo100www 3954: case 0b1110_101_111: 3955: irpBfexts (); 3956: break irpSwitch; 3957: 3958: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3959: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3960: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3961: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3962: //BFCLR <ea>{#o:#w} |-|--2346|-|-UUUU|-**00|D M WXZ |1110_110_011_mmm_rrr-00000ooooo0wwwww 3963: //BFCLR <ea>{#o:Dw} |-|--2346|-|-UUUU|-**00|D M WXZ |1110_110_011_mmm_rrr-00000ooooo100www 3964: //BFCLR <ea>{Do:#w} |-|--2346|-|-UUUU|-**00|D M WXZ |1110_110_011_mmm_rrr-0000100ooo0wwwww 3965: //BFCLR <ea>{Do:Dw} |-|--2346|-|-UUUU|-**00|D M WXZ |1110_110_011_mmm_rrr-0000100ooo100www 3966: case 0b1110_110_011: 3967: irpBfclr (); 3968: break irpSwitch; 3969: 3970: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3971: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3972: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3973: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3974: //BFFFO <ea>{#o:#w},Dn |-|--2346|-|-UUUU|-**00|D M WXZP |1110_110_111_mmm_rrr-0nnn0ooooo0wwwww 3975: //BFFFO <ea>{#o:Dw},Dn |-|--2346|-|-UUUU|-**00|D M WXZP |1110_110_111_mmm_rrr-0nnn0ooooo100www 3976: //BFFFO <ea>{Do:#w},Dn |-|--2346|-|-UUUU|-**00|D M WXZP |1110_110_111_mmm_rrr-0nnn100ooo0wwwww 3977: //BFFFO <ea>{Do:Dw},Dn |-|--2346|-|-UUUU|-**00|D M WXZP |1110_110_111_mmm_rrr-0nnn100ooo100www 3978: case 0b1110_110_111: 3979: irpBfffo (); 3980: break irpSwitch; 3981: 3982: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3983: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3984: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3985: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3986: //BFSET <ea>{#o:#w} |-|--2346|-|-UUUU|-**00|D M WXZ |1110_111_011_mmm_rrr-00000ooooo0wwwww 3987: //BFSET <ea>{#o:Dw} |-|--2346|-|-UUUU|-**00|D M WXZ |1110_111_011_mmm_rrr-00000ooooo100www 3988: //BFSET <ea>{Do:#w} |-|--2346|-|-UUUU|-**00|D M WXZ |1110_111_011_mmm_rrr-0000100ooo0wwwww 3989: //BFSET <ea>{Do:Dw} |-|--2346|-|-UUUU|-**00|D M WXZ |1110_111_011_mmm_rrr-0000100ooo100www 3990: case 0b1110_111_011: 3991: irpBfset (); 3992: break irpSwitch; 3993: 3994: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3995: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3996: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3997: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3998: //BFINS Dn,<ea>{#o:#w} |-|--2346|-|-UUUU|-**00|D M WXZ |1110_111_111_mmm_rrr-0nnn0ooooo0wwwww 3999: //BFINS Dn,<ea>{#o:Dw} |-|--2346|-|-UUUU|-**00|D M WXZ |1110_111_111_mmm_rrr-0nnn0ooooo100www 4000: //BFINS Dn,<ea>{Do:#w} |-|--2346|-|-UUUU|-**00|D M WXZ |1110_111_111_mmm_rrr-0nnn100ooo0wwwww 4001: //BFINS Dn,<ea>{Do:Dw} |-|--2346|-|-UUUU|-**00|D M WXZ |1110_111_111_mmm_rrr-0nnn100ooo100www 4002: case 0b1110_111_111: 4003: irpBfins (); 4004: break irpSwitch; 4005: 4006: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 4007: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 4008: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 4009: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 4010: //FTST.X FPm |-|--CC46|-|-----|-----| |1111_001_000_000_000-000mmm0000111010 4011: //FMOVE.X FPm,FPn |-|--CC46|-|-----|-----| |1111_001_000_000_000-000mmmnnn0000000 4012: //FINT.X FPm,FPn |-|--CCS6|-|-----|-----| |1111_001_000_000_000-000mmmnnn0000001 4013: //FSINH.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0000010 4014: //FINTRZ.X FPm,FPn |-|--CCS6|-|-----|-----| |1111_001_000_000_000-000mmmnnn0000011 4015: //FSQRT.X FPm,FPn |-|--CC46|-|-----|-----| |1111_001_000_000_000-000mmmnnn0000100 4016: //FLOGNP1.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0000110 4017: //FETOXM1.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0001000 4018: //FTANH.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0001001 4019: //FATAN.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0001010 4020: //FASIN.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0001100 4021: //FATANH.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0001101 4022: //FSIN.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0001110 4023: //FTAN.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0001111 4024: //FETOX.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0010000 4025: //FTWOTOX.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0010001 4026: //FTENTOX.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0010010 4027: //FLOGN.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0010100 4028: //FLOG10.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0010101 4029: //FLOG2.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0010110 4030: //FABS.X FPm,FPn |-|--CC46|-|-----|-----| |1111_001_000_000_000-000mmmnnn0011000 4031: //FCOSH.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0011001 4032: //FNEG.X FPm,FPn |-|--CC46|-|-----|-----| |1111_001_000_000_000-000mmmnnn0011010 4033: //FACOS.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0011100 4034: //FCOS.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0011101 4035: //FGETEXP.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0011110 4036: //FGETMAN.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0011111 4037: //FDIV.X FPm,FPn |-|--CC46|-|-----|-----| |1111_001_000_000_000-000mmmnnn0100000 4038: //FMOD.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0100001 4039: //FADD.X FPm,FPn |-|--CC46|-|-----|-----| |1111_001_000_000_000-000mmmnnn0100010 4040: //FMUL.X FPm,FPn |-|--CC46|-|-----|-----| |1111_001_000_000_000-000mmmnnn0100011 4041: //FSGLDIV.X FPm,FPn |-|--CCS6|-|-----|-----| |1111_001_000_000_000-000mmmnnn0100100 4042: //FREM.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0100101 4043: //FSCALE.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0100110 4044: //FSGLMUL.X FPm,FPn |-|--CCS6|-|-----|-----| |1111_001_000_000_000-000mmmnnn0100111 4045: //FSUB.X FPm,FPn |-|--CC46|-|-----|-----| |1111_001_000_000_000-000mmmnnn0101000 4046: //FCMP.X FPm,FPn |-|--CC46|-|-----|-----| |1111_001_000_000_000-000mmmnnn0111000 4047: //FSMOVE.X FPm,FPn |-|----46|-|-----|-----| |1111_001_000_000_000-000mmmnnn1000000 4048: //FSSQRT.X FPm,FPn |-|----46|-|-----|-----| |1111_001_000_000_000-000mmmnnn1000001 4049: //FDMOVE.X FPm,FPn |-|----46|-|-----|-----| |1111_001_000_000_000-000mmmnnn1000100 4050: //FDSQRT.X FPm,FPn |-|----46|-|-----|-----| |1111_001_000_000_000-000mmmnnn1000101 4051: //FSABS.X FPm,FPn |-|----46|-|-----|-----| |1111_001_000_000_000-000mmmnnn1011000 4052: //FSNEG.X FPm,FPn |-|----46|-|-----|-----| |1111_001_000_000_000-000mmmnnn1011010 4053: //FDABS.X FPm,FPn |-|----46|-|-----|-----| |1111_001_000_000_000-000mmmnnn1011100 4054: //FDNEG.X FPm,FPn |-|----46|-|-----|-----| |1111_001_000_000_000-000mmmnnn1011110 4055: //FSDIV.X FPm,FPn |-|----46|-|-----|-----| |1111_001_000_000_000-000mmmnnn1100000 4056: //FSADD.X FPm,FPn |-|----46|-|-----|-----| |1111_001_000_000_000-000mmmnnn1100010 4057: //FSMUL.X FPm,FPn |-|----46|-|-----|-----| |1111_001_000_000_000-000mmmnnn1100011 4058: //FDDIV.X FPm,FPn |-|----46|-|-----|-----| |1111_001_000_000_000-000mmmnnn1100100 4059: //FDADD.X FPm,FPn |-|----46|-|-----|-----| |1111_001_000_000_000-000mmmnnn1100110 4060: //FDMUL.X FPm,FPn |-|----46|-|-----|-----| |1111_001_000_000_000-000mmmnnn1100111 4061: //FSSUB.X FPm,FPn |-|----46|-|-----|-----| |1111_001_000_000_000-000mmmnnn1101000 4062: //FDSUB.X FPm,FPn |-|----46|-|-----|-----| |1111_001_000_000_000-000mmmnnn1101100 4063: //FSINCOS.X FPm,FPc:FPs |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmsss0110ccc 4064: //FMOVECR.X #ccc,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-010111nnn0cccccc 4065: //FMOVE.L FPn,<ea> |-|--CC46|-|-----|-----|D M+-WXZ |1111_001_000_mmm_rrr-011000nnn0000000 4066: //FMOVE.S FPn,<ea> |-|--CC46|-|-----|-----|D M+-WXZ |1111_001_000_mmm_rrr-011001nnn0000000 4067: //FMOVE.W FPn,<ea> |-|--CC46|-|-----|-----|D M+-WXZ |1111_001_000_mmm_rrr-011100nnn0000000 4068: //FMOVE.B FPn,<ea> |-|--CC46|-|-----|-----|D M+-WXZ |1111_001_000_mmm_rrr-011110nnn0000000 4069: //FMOVE.L FPIAR,<ea> |-|--CC46|-|-----|-----|DAM+-WXZ |1111_001_000_mmm_rrr-1010010000000000 4070: //FMOVEM.L FPIAR,<ea> |-|--CC46|-|-----|-----|DAM+-WXZ |1111_001_000_mmm_rrr-1010010000000000 4071: //FMOVE.L FPSR,<ea> |-|--CC46|-|-----|-----|D M+-WXZ |1111_001_000_mmm_rrr-1010100000000000 4072: //FMOVEM.L FPSR,<ea> |-|--CC46|-|-----|-----|D M+-WXZ |1111_001_000_mmm_rrr-1010100000000000 4073: //FMOVE.L FPCR,<ea> |-|--CC46|-|-----|-----|D M+-WXZ |1111_001_000_mmm_rrr-1011000000000000 4074: //FMOVEM.L FPCR,<ea> |-|--CC46|-|-----|-----|D M+-WXZ |1111_001_000_mmm_rrr-1011000000000000 4075: //FTST.L <ea> |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-0100000000111010 4076: //FMOVE.L <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0000000 4077: //FINT.L <ea>,FPn |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0000001 4078: //FSINH.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0000010 4079: //FINTRZ.L <ea>,FPn |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0000011 4080: //FSQRT.L <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0000100 4081: //FLOGNP1.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0000110 4082: //FETOXM1.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0001000 4083: //FTANH.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0001001 4084: //FATAN.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0001010 4085: //FASIN.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0001100 4086: //FATANH.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0001101 4087: //FSIN.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0001110 4088: //FTAN.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0001111 4089: //FETOX.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0010000 4090: //FTWOTOX.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0010001 4091: //FTENTOX.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0010010 4092: //FLOGN.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0010100 4093: //FLOG10.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0010101 4094: //FLOG2.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0010110 4095: //FABS.L <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0011000 4096: //FCOSH.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0011001 4097: //FNEG.L <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0011010 4098: //FACOS.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0011100 4099: //FCOS.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0011101 4100: //FGETEXP.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0011110 4101: //FGETMAN.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0011111 4102: //FDIV.L <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0100000 4103: //FMOD.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0100001 4104: //FADD.L <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0100010 4105: //FMUL.L <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0100011 4106: //FSGLDIV.L <ea>,FPn |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0100100 4107: //FREM.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0100101 4108: //FSCALE.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0100110 4109: //FSGLMUL.L <ea>,FPn |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0100111 4110: //FSUB.L <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0101000 4111: //FCMP.L <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0111000 4112: //FSMOVE.L <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn1000000 4113: //FSSQRT.L <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn1000001 4114: //FDMOVE.L <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn1000100 4115: //FDSQRT.L <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn1000101 4116: //FSABS.L <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn1011000 4117: //FSNEG.L <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn1011010 4118: //FDABS.L <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn1011100 4119: //FDNEG.L <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn1011110 4120: //FSDIV.L <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn1100000 4121: //FSADD.L <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn1100010 4122: //FSMUL.L <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn1100011 4123: //FDDIV.L <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn1100100 4124: //FDADD.L <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn1100110 4125: //FDMUL.L <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn1100111 4126: //FSSUB.L <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn1101000 4127: //FDSUB.L <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn1101100 4128: //FSINCOS.L <ea>,FPc:FPs |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000sss0110ccc 4129: //FTST.S <ea> |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-0100010000111010 4130: //FMOVE.S <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0000000 4131: //FINT.S <ea>,FPn |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0000001 4132: //FSINH.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0000010 4133: //FINTRZ.S <ea>,FPn |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0000011 4134: //FSQRT.S <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0000100 4135: //FLOGNP1.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0000110 4136: //FETOXM1.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0001000 4137: //FTANH.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0001001 4138: //FATAN.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0001010 4139: //FASIN.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0001100 4140: //FATANH.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0001101 4141: //FSIN.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0001110 4142: //FTAN.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0001111 4143: //FETOX.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0010000 4144: //FTWOTOX.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0010001 4145: //FTENTOX.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0010010 4146: //FLOGN.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0010100 4147: //FLOG10.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0010101 4148: //FLOG2.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0010110 4149: //FABS.S <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0011000 4150: //FCOSH.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0011001 4151: //FNEG.S <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0011010 4152: //FACOS.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0011100 4153: //FCOS.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0011101 4154: //FGETEXP.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0011110 4155: //FGETMAN.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0011111 4156: //FDIV.S <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0100000 4157: //FMOD.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0100001 4158: //FADD.S <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0100010 4159: //FMUL.S <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0100011 4160: //FSGLDIV.S <ea>,FPn |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0100100 4161: //FREM.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0100101 4162: //FSCALE.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0100110 4163: //FSGLMUL.S <ea>,FPn |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0100111 4164: //FSUB.S <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0101000 4165: //FCMP.S <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0111000 4166: //FSMOVE.S <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn1000000 4167: //FSSQRT.S <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn1000001 4168: //FDMOVE.S <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn1000100 4169: //FDSQRT.S <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn1000101 4170: //FSABS.S <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn1011000 4171: //FSNEG.S <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn1011010 4172: //FDABS.S <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn1011100 4173: //FDNEG.S <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn1011110 4174: //FSDIV.S <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn1100000 4175: //FSADD.S <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn1100010 4176: //FSMUL.S <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn1100011 4177: //FDDIV.S <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn1100100 4178: //FDADD.S <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn1100110 4179: //FDMUL.S <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn1100111 4180: //FSSUB.S <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn1101000 4181: //FDSUB.S <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn1101100 4182: //FSINCOS.S <ea>,FPc:FPs |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001sss0110ccc 4183: //FTST.W <ea> |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-0101000000111010 4184: //FMOVE.W <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0000000 4185: //FINT.W <ea>,FPn |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0000001 4186: //FSINH.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0000010 4187: //FINTRZ.W <ea>,FPn |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0000011 4188: //FSQRT.W <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0000100 4189: //FLOGNP1.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0000110 4190: //FETOXM1.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0001000 4191: //FTANH.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0001001 4192: //FATAN.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0001010 4193: //FASIN.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0001100 4194: //FATANH.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0001101 4195: //FSIN.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0001110 4196: //FTAN.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0001111 4197: //FETOX.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0010000 4198: //FTWOTOX.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0010001 4199: //FTENTOX.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0010010 4200: //FLOGN.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0010100 4201: //FLOG10.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0010101 4202: //FLOG2.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0010110 4203: //FABS.W <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0011000 4204: //FCOSH.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0011001 4205: //FNEG.W <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0011010 4206: //FACOS.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0011100 4207: //FCOS.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0011101 4208: //FGETEXP.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0011110 4209: //FGETMAN.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0011111 4210: //FDIV.W <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0100000 4211: //FMOD.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0100001 4212: //FADD.W <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0100010 4213: //FMUL.W <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0100011 4214: //FSGLDIV.W <ea>,FPn |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0100100 4215: //FREM.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0100101 4216: //FSCALE.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0100110 4217: //FSGLMUL.W <ea>,FPn |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0100111 4218: //FSUB.W <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0101000 4219: //FCMP.W <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0111000 4220: //FSMOVE.W <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn1000000 4221: //FSSQRT.W <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn1000001 4222: //FDMOVE.W <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn1000100 4223: //FDSQRT.W <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn1000101 4224: //FSABS.W <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn1011000 4225: //FSNEG.W <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn1011010 4226: //FDABS.W <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn1011100 4227: //FDNEG.W <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn1011110 4228: //FSDIV.W <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn1100000 4229: //FSADD.W <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn1100010 4230: //FSMUL.W <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn1100011 4231: //FDDIV.W <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn1100100 4232: //FDADD.W <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn1100110 4233: //FDMUL.W <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn1100111 4234: //FSSUB.W <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn1101000 4235: //FDSUB.W <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn1101100 4236: //FSINCOS.W <ea>,FPc:FPs |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100sss0110ccc 4237: //FTST.B <ea> |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-0101100000111010 4238: //FMOVE.B <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0000000 4239: //FINT.B <ea>,FPn |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0000001 4240: //FSINH.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0000010 4241: //FINTRZ.B <ea>,FPn |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0000011 4242: //FSQRT.B <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0000100 4243: //FLOGNP1.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0000110 4244: //FETOXM1.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0001000 4245: //FTANH.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0001001 4246: //FATAN.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0001010 4247: //FASIN.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0001100 4248: //FATANH.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0001101 4249: //FSIN.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0001110 4250: //FTAN.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0001111 4251: //FETOX.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0010000 4252: //FTWOTOX.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0010001 4253: //FTENTOX.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0010010 4254: //FLOGN.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0010100 4255: //FLOG10.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0010101 4256: //FLOG2.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0010110 4257: //FABS.B <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0011000 4258: //FCOSH.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0011001 4259: //FNEG.B <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0011010 4260: //FACOS.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0011100 4261: //FCOS.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0011101 4262: //FGETEXP.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0011110 4263: //FGETMAN.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0011111 4264: //FDIV.B <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0100000 4265: //FMOD.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0100001 4266: //FADD.B <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0100010 4267: //FMUL.B <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0100011 4268: //FSGLDIV.B <ea>,FPn |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0100100 4269: //FREM.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0100101 4270: //FSCALE.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0100110 4271: //FSGLMUL.B <ea>,FPn |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0100111 4272: //FSUB.B <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0101000 4273: //FCMP.B <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0111000 4274: //FSMOVE.B <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn1000000 4275: //FSSQRT.B <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn1000001 4276: //FDMOVE.B <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn1000100 4277: //FDSQRT.B <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn1000101 4278: //FSABS.B <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn1011000 4279: //FSNEG.B <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn1011010 4280: //FDABS.B <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn1011100 4281: //FDNEG.B <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn1011110 4282: //FSDIV.B <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn1100000 4283: //FSADD.B <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn1100010 4284: //FSMUL.B <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn1100011 4285: //FDDIV.B <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn1100100 4286: //FDADD.B <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn1100110 4287: //FDMUL.B <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn1100111 4288: //FSSUB.B <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn1101000 4289: //FDSUB.B <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn1101100 4290: //FSINCOS.B <ea>,FPc:FPs |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110sss0110ccc 4291: //FMOVE.L <ea>,FPIAR |-|--CC46|-|-----|-----|DAM+-WXZPI|1111_001_000_mmm_rrr-1000010000000000 4292: //FMOVEM.L <ea>,FPIAR |-|--CC46|-|-----|-----|DAM+-WXZPI|1111_001_000_mmm_rrr-1000010000000000 4293: //FMOVE.L <ea>,FPSR |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-1000100000000000 4294: //FMOVEM.L <ea>,FPSR |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-1000100000000000 4295: //FMOVE.L <ea>,FPCR |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-1001000000000000 4296: //FMOVEM.L <ea>,FPCR |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-1001000000000000 4297: //FMOVE.X FPn,<ea> |-|--CC46|-|-----|-----| M+-WXZ |1111_001_000_mmm_rrr-011010nnn0000000 4298: //FMOVE.P FPn,<ea>{#k} |-|--CCSS|-|-----|-----| M+-WXZ |1111_001_000_mmm_rrr-011011nnnkkkkkkk 4299: //FMOVE.D FPn,<ea> |-|--CC46|-|-----|-----| M+-WXZ |1111_001_000_mmm_rrr-011101nnn0000000 4300: //FMOVE.P FPn,<ea>{Dk} |-|--CCSS|-|-----|-----| M+-WXZ |1111_001_000_mmm_rrr-011111nnnkkk0000 4301: //FMOVEM.L FPSR/FPIAR,<ea> |-|--CC46|-|-----|-----| M+-WXZ |1111_001_000_mmm_rrr-1010110000000000 4302: //FMOVEM.L FPCR/FPIAR,<ea> |-|--CC46|-|-----|-----| M+-WXZ |1111_001_000_mmm_rrr-1011010000000000 4303: //FMOVEM.L FPCR/FPSR,<ea> |-|--CC46|-|-----|-----| M+-WXZ |1111_001_000_mmm_rrr-1011100000000000 4304: //FMOVEM.L FPCR/FPSR/FPIAR,<ea> |-|--CC46|-|-----|-----| M+-WXZ |1111_001_000_mmm_rrr-1011110000000000 4305: //FMOVEM.X #<data>,<ea> |-|--CC46|-|-----|-----| M WXZ |1111_001_000_mmm_rrr-11110000dddddddd 4306: //FMOVEM.X <list>,<ea> |-|--CC46|-|-----|-----| M WXZ |1111_001_000_mmm_rrr-11110000llllllll 4307: //FMOVEM.X Dl,<ea> |-|--CC4S|-|-----|-----| M WXZ |1111_001_000_mmm_rrr-111110000lll0000 4308: //FMOVEM.L <ea>,FPSR/FPIAR |-|--CC46|-|-----|-----| M+-WXZP |1111_001_000_mmm_rrr-1000110000000000 4309: //FMOVEM.L <ea>,FPCR/FPIAR |-|--CC46|-|-----|-----| M+-WXZP |1111_001_000_mmm_rrr-1001010000000000 4310: //FMOVEM.L <ea>,FPCR/FPSR |-|--CC46|-|-----|-----| M+-WXZP |1111_001_000_mmm_rrr-1001100000000000 4311: //FMOVEM.L <ea>,FPCR/FPSR/FPIAR |-|--CC46|-|-----|-----| M+-WXZP |1111_001_000_mmm_rrr-1001110000000000 4312: //FMOVEM.X <ea>,#<data> |-|--CC46|-|-----|-----| M+ WXZP |1111_001_000_mmm_rrr-11010000dddddddd 4313: //FMOVEM.X <ea>,<list> |-|--CC46|-|-----|-----| M+ WXZP |1111_001_000_mmm_rrr-11010000llllllll 4314: //FMOVEM.X <ea>,Dl |-|--CC4S|-|-----|-----| M+ WXZP |1111_001_000_mmm_rrr-110110000lll0000 4315: //FTST.X <ea> |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-0100100000111010 4316: //FMOVE.X <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0000000 4317: //FINT.X <ea>,FPn |-|--CCS6|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0000001 4318: //FSINH.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0000010 4319: //FINTRZ.X <ea>,FPn |-|--CCS6|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0000011 4320: //FSQRT.X <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0000100 4321: //FLOGNP1.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0000110 4322: //FETOXM1.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0001000 4323: //FTANH.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0001001 4324: //FATAN.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0001010 4325: //FASIN.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0001100 4326: //FATANH.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0001101 4327: //FSIN.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0001110 4328: //FTAN.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0001111 4329: //FETOX.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0010000 4330: //FTWOTOX.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0010001 4331: //FTENTOX.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0010010 4332: //FLOGN.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0010100 4333: //FLOG10.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0010101 4334: //FLOG2.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0010110 4335: //FABS.X <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0011000 4336: //FCOSH.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0011001 4337: //FNEG.X <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0011010 4338: //FACOS.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0011100 4339: //FCOS.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0011101 4340: //FGETEXP.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0011110 4341: //FGETMAN.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0011111 4342: //FDIV.X <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0100000 4343: //FMOD.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0100001 4344: //FADD.X <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0100010 4345: //FMUL.X <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0100011 4346: //FSGLDIV.X <ea>,FPn |-|--CCS6|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0100100 4347: //FREM.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0100101 4348: //FSCALE.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0100110 4349: //FSGLMUL.X <ea>,FPn |-|--CCS6|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0100111 4350: //FSUB.X <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0101000 4351: //FCMP.X <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0111000 4352: //FSMOVE.X <ea>,FPn |-|----46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn1000000 4353: //FSSQRT.X <ea>,FPn |-|----46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn1000001 4354: //FDMOVE.X <ea>,FPn |-|----46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn1000100 4355: //FDSQRT.X <ea>,FPn |-|----46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn1000101 4356: //FSABS.X <ea>,FPn |-|----46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn1011000 4357: //FSNEG.X <ea>,FPn |-|----46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn1011010 4358: //FDABS.X <ea>,FPn |-|----46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn1011100 4359: //FDNEG.X <ea>,FPn |-|----46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn1011110 4360: //FSDIV.X <ea>,FPn |-|----46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn1100000 4361: //FSADD.X <ea>,FPn |-|----46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn1100010 4362: //FSMUL.X <ea>,FPn |-|----46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn1100011 4363: //FDDIV.X <ea>,FPn |-|----46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn1100100 4364: //FDADD.X <ea>,FPn |-|----46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn1100110 4365: //FDMUL.X <ea>,FPn |-|----46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn1100111 4366: //FSSUB.X <ea>,FPn |-|----46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn1101000 4367: //FDSUB.X <ea>,FPn |-|----46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn1101100 4368: //FSINCOS.X <ea>,FPc:FPs |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010sss0110ccc 4369: //FTST.P <ea> |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-0100110000111010 4370: //FMOVE.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0000000 4371: //FINT.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0000001 4372: //FSINH.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0000010 4373: //FINTRZ.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0000011 4374: //FSQRT.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0000100 4375: //FLOGNP1.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0000110 4376: //FETOXM1.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0001000 4377: //FTANH.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0001001 4378: //FATAN.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0001010 4379: //FASIN.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0001100 4380: //FATANH.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0001101 4381: //FSIN.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0001110 4382: //FTAN.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0001111 4383: //FETOX.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0010000 4384: //FTWOTOX.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0010001 4385: //FTENTOX.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0010010 4386: //FLOGN.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0010100 4387: //FLOG10.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0010101 4388: //FLOG2.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0010110 4389: //FABS.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0011000 4390: //FCOSH.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0011001 4391: //FNEG.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0011010 4392: //FACOS.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0011100 4393: //FCOS.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0011101 4394: //FGETEXP.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0011110 4395: //FGETMAN.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0011111 4396: //FDIV.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0100000 4397: //FMOD.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0100001 4398: //FADD.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0100010 4399: //FMUL.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0100011 4400: //FSGLDIV.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0100100 4401: //FREM.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0100101 4402: //FSCALE.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0100110 4403: //FSGLMUL.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0100111 4404: //FSUB.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0101000 4405: //FCMP.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0111000 4406: //FSMOVE.P <ea>,FPn |-|----SS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn1000000 4407: //FSSQRT.P <ea>,FPn |-|----SS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn1000001 4408: //FDMOVE.P <ea>,FPn |-|----SS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn1000100 4409: //FDSQRT.P <ea>,FPn |-|----SS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn1000101 4410: //FSABS.P <ea>,FPn |-|----SS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn1011000 4411: //FSNEG.P <ea>,FPn |-|----SS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn1011010 4412: //FDABS.P <ea>,FPn |-|----SS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn1011100 4413: //FDNEG.P <ea>,FPn |-|----SS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn1011110 4414: //FSDIV.P <ea>,FPn |-|----SS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn1100000 4415: //FSADD.P <ea>,FPn |-|----SS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn1100010 4416: //FSMUL.P <ea>,FPn |-|----SS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn1100011 4417: //FDDIV.P <ea>,FPn |-|----SS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn1100100 4418: //FDADD.P <ea>,FPn |-|----SS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn1100110 4419: //FDMUL.P <ea>,FPn |-|----SS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn1100111 4420: //FSSUB.P <ea>,FPn |-|----SS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn1101000 4421: //FDSUB.P <ea>,FPn |-|----SS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn1101100 4422: //FSINCOS.P <ea>,FPc:FPs |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011sss0110ccc 4423: //FTST.D <ea> |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-0101010000111010 4424: //FMOVE.D <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0000000 4425: //FINT.D <ea>,FPn |-|--CCS6|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0000001 4426: //FSINH.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0000010 4427: //FINTRZ.D <ea>,FPn |-|--CCS6|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0000011 4428: //FSQRT.D <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0000100 4429: //FLOGNP1.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0000110 4430: //FETOXM1.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0001000 4431: //FTANH.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0001001 4432: //FATAN.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0001010 4433: //FASIN.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0001100 4434: //FATANH.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0001101 4435: //FSIN.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0001110 4436: //FTAN.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0001111 4437: //FETOX.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0010000 4438: //FTWOTOX.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0010001 4439: //FTENTOX.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0010010 4440: //FLOGN.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0010100 4441: //FLOG10.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0010101 4442: //FLOG2.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0010110 4443: //FABS.D <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0011000 4444: //FCOSH.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0011001 4445: //FNEG.D <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0011010 4446: //FACOS.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0011100 4447: //FCOS.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0011101 4448: //FGETEXP.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0011110 4449: //FGETMAN.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0011111 4450: //FDIV.D <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0100000 4451: //FMOD.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0100001 4452: //FADD.D <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0100010 4453: //FMUL.D <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0100011 4454: //FSGLDIV.D <ea>,FPn |-|--CCS6|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0100100 4455: //FREM.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0100101 4456: //FSCALE.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0100110 4457: //FSGLMUL.D <ea>,FPn |-|--CCS6|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0100111 4458: //FSUB.D <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0101000 4459: //FCMP.D <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0111000 4460: //FSMOVE.D <ea>,FPn |-|----46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn1000000 4461: //FSSQRT.D <ea>,FPn |-|----46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn1000001 4462: //FDMOVE.D <ea>,FPn |-|----46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn1000100 4463: //FDSQRT.D <ea>,FPn |-|----46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn1000101 4464: //FSABS.D <ea>,FPn |-|----46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn1011000 4465: //FSNEG.D <ea>,FPn |-|----46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn1011010 4466: //FDABS.D <ea>,FPn |-|----46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn1011100 4467: //FDNEG.D <ea>,FPn |-|----46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn1011110 4468: //FSDIV.D <ea>,FPn |-|----46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn1100000 4469: //FSADD.D <ea>,FPn |-|----46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn1100010 4470: //FSMUL.D <ea>,FPn |-|----46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn1100011 4471: //FDDIV.D <ea>,FPn |-|----46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn1100100 4472: //FDADD.D <ea>,FPn |-|----46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn1100110 4473: //FDMUL.D <ea>,FPn |-|----46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn1100111 4474: //FSSUB.D <ea>,FPn |-|----46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn1101000 4475: //FDSUB.D <ea>,FPn |-|----46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn1101100 4476: //FSINCOS.D <ea>,FPc:FPs |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101sss0110ccc 4477: //FMOVEM.X #<data>,-(Ar) |-|--CC46|-|-----|-----| - |1111_001_000_100_rrr-11100000dddddddd 4478: //FMOVEM.X <list>,-(Ar) |-|--CC46|-|-----|-----| - |1111_001_000_100_rrr-11100000llllllll 4479: //FMOVEM.X Dl,-(Ar) |-|--CC4S|-|-----|-----| - |1111_001_000_100_rrr-111010000lll0000 4480: //FMOVEM.L #<data>,#<data>,FPSR/FPIAR |-|--CC4S|-|-----|-----| I|1111_001_000_111_100-1000110000000000-{data} 4481: //FMOVEM.L #<data>,#<data>,FPCR/FPIAR |-|--CC4S|-|-----|-----| I|1111_001_000_111_100-1001010000000000-{data} 4482: //FMOVEM.L #<data>,#<data>,FPCR/FPSR |-|--CC4S|-|-----|-----| I|1111_001_000_111_100-1001100000000000-{data} 4483: //FMOVEM.L #<data>,#<data>,#<data>,FPCR/FPSR/FPIAR|-|--CC4S|-|-----|-----| I|1111_001_000_111_100-1001110000000000-{data} 4484: case 0b1111_001_000: 4485: irpFgen (); 4486: break irpSwitch; 4487: 4488: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 4489: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 4490: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 4491: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 4492: //FSF.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000000000 4493: //FSEQ.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000000001 4494: //FSOGT.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000000010 4495: //FSOGE.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000000011 4496: //FSOLT.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000000100 4497: //FSOLE.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000000101 4498: //FSOGL.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000000110 4499: //FSOR.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000000111 4500: //FSUN.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000001000 4501: //FSUEQ.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000001001 4502: //FSUGT.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000001010 4503: //FSUGE.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000001011 4504: //FSULT.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000001100 4505: //FSULE.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000001101 4506: //FSNE.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000001110 4507: //FST.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000001111 4508: //FSSF.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000010000 4509: //FSSEQ.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000010001 4510: //FSGT.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000010010 4511: //FSGE.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000010011 4512: //FSLT.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000010100 4513: //FSLE.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000010101 4514: //FSGL.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000010110 4515: //FSGLE.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000010111 4516: //FSNGLE.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000011000 4517: //FSNGL.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000011001 4518: //FSNLE.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000011010 4519: //FSNLT.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000011011 4520: //FSNGE.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000011100 4521: //FSNGT.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000011101 4522: //FSSNE.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000011110 4523: //FSST.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000011111 4524: //FDBF Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000000000-{offset} 4525: //FDBRA Dr,<label> |A|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000000000-{offset} [FDBF Dr,<label>] 4526: //FDBEQ Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000000001-{offset} 4527: //FDBOGT Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000000010-{offset} 4528: //FDBOGE Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000000011-{offset} 4529: //FDBOLT Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000000100-{offset} 4530: //FDBOLE Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000000101-{offset} 4531: //FDBOGL Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000000110-{offset} 4532: //FDBOR Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000000111-{offset} 4533: //FDBUN Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000001000-{offset} 4534: //FDBUEQ Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000001001-{offset} 4535: //FDBUGT Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000001010-{offset} 4536: //FDBUGE Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000001011-{offset} 4537: //FDBULT Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000001100-{offset} 4538: //FDBULE Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000001101-{offset} 4539: //FDBNE Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000001110-{offset} 4540: //FDBT Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000001111-{offset} 4541: //FDBSF Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000010000-{offset} 4542: //FDBSEQ Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000010001-{offset} 4543: //FDBGT Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000010010-{offset} 4544: //FDBGE Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000010011-{offset} 4545: //FDBLT Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000010100-{offset} 4546: //FDBLE Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000010101-{offset} 4547: //FDBGL Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000010110-{offset} 4548: //FDBGLE Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000010111-{offset} 4549: //FDBNGLE Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000011000-{offset} 4550: //FDBNGL Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000011001-{offset} 4551: //FDBNLE Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000011010-{offset} 4552: //FDBNLT Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000011011-{offset} 4553: //FDBNGE Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000011100-{offset} 4554: //FDBNGT Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000011101-{offset} 4555: //FDBSNE Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000011110-{offset} 4556: //FDBST Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000011111-{offset} 4557: //FTRAPF.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000000000-{data} 4558: //FTRAPEQ.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000000001-{data} 4559: //FTRAPOGT.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000000010-{data} 4560: //FTRAPOGE.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000000011-{data} 4561: //FTRAPOLT.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000000100-{data} 4562: //FTRAPOLE.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000000101-{data} 4563: //FTRAPOGL.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000000110-{data} 4564: //FTRAPOR.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000000111-{data} 4565: //FTRAPUN.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000001000-{data} 4566: //FTRAPUEQ.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000001001-{data} 4567: //FTRAPUGT.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000001010-{data} 4568: //FTRAPUGE.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000001011-{data} 4569: //FTRAPULT.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000001100-{data} 4570: //FTRAPULE.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000001101-{data} 4571: //FTRAPNE.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000001110-{data} 4572: //FTRAPT.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000001111-{data} 4573: //FTRAPSF.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000010000-{data} 4574: //FTRAPSEQ.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000010001-{data} 4575: //FTRAPGT.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000010010-{data} 4576: //FTRAPGE.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000010011-{data} 4577: //FTRAPLT.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000010100-{data} 4578: //FTRAPLE.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000010101-{data} 4579: //FTRAPGL.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000010110-{data} 4580: //FTRAPGLE.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000010111-{data} 4581: //FTRAPNGLE.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000011000-{data} 4582: //FTRAPNGL.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000011001-{data} 4583: //FTRAPNLE.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000011010-{data} 4584: //FTRAPNLT.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000011011-{data} 4585: //FTRAPNGE.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000011100-{data} 4586: //FTRAPNGT.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000011101-{data} 4587: //FTRAPSNE.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000011110-{data} 4588: //FTRAPST.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000011111-{data} 4589: //FTRAPF.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000000000-{data} 4590: //FTRAPEQ.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000000001-{data} 4591: //FTRAPOGT.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000000010-{data} 4592: //FTRAPOGE.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000000011-{data} 4593: //FTRAPOLT.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000000100-{data} 4594: //FTRAPOLE.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000000101-{data} 4595: //FTRAPOGL.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000000110-{data} 4596: //FTRAPOR.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000000111-{data} 4597: //FTRAPUN.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000001000-{data} 4598: //FTRAPUEQ.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000001001-{data} 4599: //FTRAPUGT.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000001010-{data} 4600: //FTRAPUGE.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000001011-{data} 4601: //FTRAPULT.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000001100-{data} 4602: //FTRAPULE.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000001101-{data} 4603: //FTRAPNE.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000001110-{data} 4604: //FTRAPT.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000001111-{data} 4605: //FTRAPSF.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000010000-{data} 4606: //FTRAPSEQ.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000010001-{data} 4607: //FTRAPGT.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000010010-{data} 4608: //FTRAPGE.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000010011-{data} 4609: //FTRAPLT.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000010100-{data} 4610: //FTRAPLE.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000010101-{data} 4611: //FTRAPGL.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000010110-{data} 4612: //FTRAPGLE.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000010111-{data} 4613: //FTRAPNGLE.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000011000-{data} 4614: //FTRAPNGL.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000011001-{data} 4615: //FTRAPNLE.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000011010-{data} 4616: //FTRAPNLT.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000011011-{data} 4617: //FTRAPNGE.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000011100-{data} 4618: //FTRAPNGT.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000011101-{data} 4619: //FTRAPSNE.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000011110-{data} 4620: //FTRAPST.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000011111-{data} 4621: //FTRAPF |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000000000 4622: //FTRAPEQ |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000000001 4623: //FTRAPOGT |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000000010 4624: //FTRAPOGE |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000000011 4625: //FTRAPOLT |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000000100 4626: //FTRAPOLE |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000000101 4627: //FTRAPOGL |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000000110 4628: //FTRAPOR |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000000111 4629: //FTRAPUN |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000001000 4630: //FTRAPUEQ |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000001001 4631: //FTRAPUGT |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000001010 4632: //FTRAPUGE |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000001011 4633: //FTRAPULT |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000001100 4634: //FTRAPULE |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000001101 4635: //FTRAPNE |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000001110 4636: //FTRAPT |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000001111 4637: //FTRAPSF |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000010000 4638: //FTRAPSEQ |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000010001 4639: //FTRAPGT |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000010010 4640: //FTRAPGE |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000010011 4641: //FTRAPLT |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000010100 4642: //FTRAPLE |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000010101 4643: //FTRAPGL |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000010110 4644: //FTRAPGLE |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000010111 4645: //FTRAPNGLE |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000011000 4646: //FTRAPNGL |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000011001 4647: //FTRAPNLE |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000011010 4648: //FTRAPNLT |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000011011 4649: //FTRAPNGE |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000011100 4650: //FTRAPNGT |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000011101 4651: //FTRAPSNE |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000011110 4652: //FTRAPST |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000011111 4653: case 0b1111_001_001: 4654: irpFscc (); 4655: break irpSwitch; 4656: 4657: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 4658: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 4659: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 4660: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 4661: //FNOP |A|--CC46|-|-----|-----| |1111_001_010_000_000-0000000000000000 [FBF.W (*)+2] 4662: //FBF.W <label> |-|--CC46|-|-----|-----| |1111_001_010_000_000-{offset} 4663: //FBEQ.W <label> |-|--CC46|-|-----|-----| |1111_001_010_000_001-{offset} 4664: //FBOGT.W <label> |-|--CC46|-|-----|-----| |1111_001_010_000_010-{offset} 4665: //FBOGE.W <label> |-|--CC46|-|-----|-----| |1111_001_010_000_011-{offset} 4666: //FBOLT.W <label> |-|--CC46|-|-----|-----| |1111_001_010_000_100-{offset} 4667: //FBOLE.W <label> |-|--CC46|-|-----|-----| |1111_001_010_000_101-{offset} 4668: //FBOGL.W <label> |-|--CC46|-|-----|-----| |1111_001_010_000_110-{offset} 4669: //FBOR.W <label> |-|--CC46|-|-----|-----| |1111_001_010_000_111-{offset} 4670: //FBUN.W <label> |-|--CC46|-|-----|-----| |1111_001_010_001_000-{offset} 4671: //FBUEQ.W <label> |-|--CC46|-|-----|-----| |1111_001_010_001_001-{offset} 4672: //FBUGT.W <label> |-|--CC46|-|-----|-----| |1111_001_010_001_010-{offset} 4673: //FBUGE.W <label> |-|--CC46|-|-----|-----| |1111_001_010_001_011-{offset} 4674: //FBULT.W <label> |-|--CC46|-|-----|-----| |1111_001_010_001_100-{offset} 4675: //FBULE.W <label> |-|--CC46|-|-----|-----| |1111_001_010_001_101-{offset} 4676: //FBNE.W <label> |-|--CC46|-|-----|-----| |1111_001_010_001_110-{offset} 4677: //FBT.W <label> |-|--CC46|-|-----|-----| |1111_001_010_001_111-{offset} 4678: //FBRA.W <label> |A|--CC46|-|-----|-----| |1111_001_010_001_111-{offset} [FBT.W <label>] 4679: //FBSF.W <label> |-|--CC46|-|-----|-----| |1111_001_010_010_000-{offset} 4680: //FBSEQ.W <label> |-|--CC46|-|-----|-----| |1111_001_010_010_001-{offset} 4681: //FBGT.W <label> |-|--CC46|-|-----|-----| |1111_001_010_010_010-{offset} 4682: //FBGE.W <label> |-|--CC46|-|-----|-----| |1111_001_010_010_011-{offset} 4683: //FBLT.W <label> |-|--CC46|-|-----|-----| |1111_001_010_010_100-{offset} 4684: //FBLE.W <label> |-|--CC46|-|-----|-----| |1111_001_010_010_101-{offset} 4685: //FBGL.W <label> |-|--CC46|-|-----|-----| |1111_001_010_010_110-{offset} 4686: //FBGLE.W <label> |-|--CC46|-|-----|-----| |1111_001_010_010_111-{offset} 4687: //FBNGLE.W <label> |-|--CC46|-|-----|-----| |1111_001_010_011_000-{offset} 4688: //FBNGL.W <label> |-|--CC46|-|-----|-----| |1111_001_010_011_001-{offset} 4689: //FBNLE.W <label> |-|--CC46|-|-----|-----| |1111_001_010_011_010-{offset} 4690: //FBNLT.W <label> |-|--CC46|-|-----|-----| |1111_001_010_011_011-{offset} 4691: //FBNGE.W <label> |-|--CC46|-|-----|-----| |1111_001_010_011_100-{offset} 4692: //FBNGT.W <label> |-|--CC46|-|-----|-----| |1111_001_010_011_101-{offset} 4693: //FBSNE.W <label> |-|--CC46|-|-----|-----| |1111_001_010_011_110-{offset} 4694: //FBST.W <label> |-|--CC46|-|-----|-----| |1111_001_010_011_111-{offset} 4695: case 0b1111_001_010: 4696: irpFbccWord (); 4697: break irpSwitch; 4698: 4699: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 4700: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 4701: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 4702: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 4703: //FBF.L <label> |-|--CC46|-|-----|-----| |1111_001_011_000_000-{offset} 4704: //FBEQ.L <label> |-|--CC46|-|-----|-----| |1111_001_011_000_001-{offset} 4705: //FBOGT.L <label> |-|--CC46|-|-----|-----| |1111_001_011_000_010-{offset} 4706: //FBOGE.L <label> |-|--CC46|-|-----|-----| |1111_001_011_000_011-{offset} 4707: //FBOLT.L <label> |-|--CC46|-|-----|-----| |1111_001_011_000_100-{offset} 4708: //FBOLE.L <label> |-|--CC46|-|-----|-----| |1111_001_011_000_101-{offset} 4709: //FBOGL.L <label> |-|--CC46|-|-----|-----| |1111_001_011_000_110-{offset} 4710: //FBOR.L <label> |-|--CC46|-|-----|-----| |1111_001_011_000_111-{offset} 4711: //FBUN.L <label> |-|--CC46|-|-----|-----| |1111_001_011_001_000-{offset} 4712: //FBUEQ.L <label> |-|--CC46|-|-----|-----| |1111_001_011_001_001-{offset} 4713: //FBUGT.L <label> |-|--CC46|-|-----|-----| |1111_001_011_001_010-{offset} 4714: //FBUGE.L <label> |-|--CC46|-|-----|-----| |1111_001_011_001_011-{offset} 4715: //FBULT.L <label> |-|--CC46|-|-----|-----| |1111_001_011_001_100-{offset} 4716: //FBULE.L <label> |-|--CC46|-|-----|-----| |1111_001_011_001_101-{offset} 4717: //FBNE.L <label> |-|--CC46|-|-----|-----| |1111_001_011_001_110-{offset} 4718: //FBT.L <label> |-|--CC46|-|-----|-----| |1111_001_011_001_111-{offset} 4719: //FBRA.L <label> |A|--CC46|-|-----|-----| |1111_001_011_001_111-{offset} [FBT.L <label>] 4720: //FBSF.L <label> |-|--CC46|-|-----|-----| |1111_001_011_010_000-{offset} 4721: //FBSEQ.L <label> |-|--CC46|-|-----|-----| |1111_001_011_010_001-{offset} 4722: //FBGT.L <label> |-|--CC46|-|-----|-----| |1111_001_011_010_010-{offset} 4723: //FBGE.L <label> |-|--CC46|-|-----|-----| |1111_001_011_010_011-{offset} 4724: //FBLT.L <label> |-|--CC46|-|-----|-----| |1111_001_011_010_100-{offset} 4725: //FBLE.L <label> |-|--CC46|-|-----|-----| |1111_001_011_010_101-{offset} 4726: //FBGL.L <label> |-|--CC46|-|-----|-----| |1111_001_011_010_110-{offset} 4727: //FBGLE.L <label> |-|--CC46|-|-----|-----| |1111_001_011_010_111-{offset} 4728: //FBNGLE.L <label> |-|--CC46|-|-----|-----| |1111_001_011_011_000-{offset} 4729: //FBNGL.L <label> |-|--CC46|-|-----|-----| |1111_001_011_011_001-{offset} 4730: //FBNLE.L <label> |-|--CC46|-|-----|-----| |1111_001_011_011_010-{offset} 4731: //FBNLT.L <label> |-|--CC46|-|-----|-----| |1111_001_011_011_011-{offset} 4732: //FBNGE.L <label> |-|--CC46|-|-----|-----| |1111_001_011_011_100-{offset} 4733: //FBNGT.L <label> |-|--CC46|-|-----|-----| |1111_001_011_011_101-{offset} 4734: //FBSNE.L <label> |-|--CC46|-|-----|-----| |1111_001_011_011_110-{offset} 4735: //FBST.L <label> |-|--CC46|-|-----|-----| |1111_001_011_011_111-{offset} 4736: case 0b1111_001_011: 4737: irpFbccLong (); 4738: break irpSwitch; 4739: 4740: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 4741: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 4742: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 4743: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 4744: //FSAVE <ea> |-|--CC46|P|-----|-----| M -WXZ |1111_001_100_mmm_rrr 4745: case 0b1111_001_100: 4746: irpFsave (); 4747: break irpSwitch; 4748: 4749: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 4750: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 4751: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 4752: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 4753: //FRESTORE <ea> |-|--CC46|P|-----|-----| M+ WXZP |1111_001_101_mmm_rrr 4754: case 0b1111_001_101: 4755: irpFrestore (); 4756: break irpSwitch; 4757: 4758: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 4759: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 4760: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 4761: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 4762: //CINVL NC,(Ar) |-|----46|P|-----|-----| |1111_010_000_001_rrr 4763: //CINVP NC,(Ar) |-|----46|P|-----|-----| |1111_010_000_010_rrr 4764: //CINVA NC |-|----46|P|-----|-----| |1111_010_000_011_000 4765: //CPUSHL NC,(Ar) |-|----46|P|-----|-----| |1111_010_000_101_rrr 4766: //CPUSHP NC,(Ar) |-|----46|P|-----|-----| |1111_010_000_110_rrr 4767: //CPUSHA NC |-|----46|P|-----|-----| |1111_010_000_111_000 4768: case 0b1111_010_000: 4769: irpCinvCpushNC (); 4770: break irpSwitch; 4771: 4772: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 4773: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 4774: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 4775: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 4776: //CINVL DC,(Ar) |-|----46|P|-----|-----| |1111_010_001_001_rrr 4777: //CINVP DC,(Ar) |-|----46|P|-----|-----| |1111_010_001_010_rrr 4778: //CINVA DC |-|----46|P|-----|-----| |1111_010_001_011_000 4779: //CPUSHL DC,(Ar) |-|----46|P|-----|-----| |1111_010_001_101_rrr 4780: //CPUSHP DC,(Ar) |-|----46|P|-----|-----| |1111_010_001_110_rrr 4781: //CPUSHA DC |-|----46|P|-----|-----| |1111_010_001_111_000 4782: case 0b1111_010_001: 4783: irpCinvCpushDC (); 4784: break irpSwitch; 4785: 4786: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 4787: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 4788: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 4789: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 4790: //CINVL IC,(Ar) |-|----46|P|-----|-----| |1111_010_010_001_rrr 4791: //CINVP IC,(Ar) |-|----46|P|-----|-----| |1111_010_010_010_rrr 4792: //CINVA IC |-|----46|P|-----|-----| |1111_010_010_011_000 4793: //CPUSHL IC,(Ar) |-|----46|P|-----|-----| |1111_010_010_101_rrr 4794: //CPUSHP IC,(Ar) |-|----46|P|-----|-----| |1111_010_010_110_rrr 4795: //CPUSHA IC |-|----46|P|-----|-----| |1111_010_010_111_000 4796: case 0b1111_010_010: 4797: irpCinvCpushIC (); 4798: break irpSwitch; 4799: 4800: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 4801: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 4802: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 4803: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 4804: //CINVL BC,(Ar) |-|----46|P|-----|-----| |1111_010_011_001_rrr 4805: //CINVP BC,(Ar) |-|----46|P|-----|-----| |1111_010_011_010_rrr 4806: //CINVA BC |-|----46|P|-----|-----| |1111_010_011_011_000 4807: //CPUSHL BC,(Ar) |-|----46|P|-----|-----| |1111_010_011_101_rrr 4808: //CPUSHP BC,(Ar) |-|----46|P|-----|-----| |1111_010_011_110_rrr 4809: //CPUSHA BC |-|----46|P|-----|-----| |1111_010_011_111_000 4810: case 0b1111_010_011: 4811: irpCinvCpushBC (); 4812: break irpSwitch; 4813: 4814: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 4815: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 4816: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 4817: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 4818: //PFLUSHN (Ar) |-|----46|P|-----|-----| |1111_010_100_000_rrr 4819: //PFLUSH (Ar) |-|----46|P|-----|-----| |1111_010_100_001_rrr 4820: //PFLUSHAN |-|----46|P|-----|-----| |1111_010_100_010_000 4821: //PFLUSHA |-|----46|P|-----|-----| |1111_010_100_011_000 4822: case 0b1111_010_100: 4823: irpPflush (); 4824: break irpSwitch; 4825: 4826: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 4827: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 4828: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 4829: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 4830: //PLPAW (Ar) |-|-----6|P|-----|-----| |1111_010_110_001_rrr 4831: case 0b1111_010_110: 4832: irpPlpaw (); 4833: break irpSwitch; 4834: 4835: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 4836: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 4837: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 4838: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 4839: //PLPAR (Ar) |-|-----6|P|-----|-----| |1111_010_111_001_rrr 4840: case 0b1111_010_111: 4841: irpPlpar (); 4842: break irpSwitch; 4843: 4844: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 4845: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 4846: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 4847: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 4848: //MOVE16 (Ar)+,xxx.L |-|----46|-|-----|-----| |1111_011_000_000_rrr-{address} 4849: //MOVE16 xxx.L,(Ar)+ |-|----46|-|-----|-----| |1111_011_000_001_rrr-{address} 4850: //MOVE16 (Ar),xxx.L |-|----46|-|-----|-----| |1111_011_000_010_rrr-{address} 4851: //MOVE16 xxx.L,(Ar) |-|----46|-|-----|-----| |1111_011_000_011_rrr-{address} 4852: //MOVE16 (Ar)+,(An)+ |-|----46|-|-----|-----| |1111_011_000_100_rrr-1nnn000000000000 4853: case 0b1111_011_000: 4854: irpMove16 (); 4855: break irpSwitch; 4856: 4857: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 4858: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 4859: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 4860: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 4861: //LPSTOP.W #<data> |-|-----6|P|-----|-----| |1111_100_000_000_000-0000000111000000-{data} 4862: case 0b1111_100_000: 4863: irpLpstop (); 4864: break irpSwitch; 4865: 4866: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 4867: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 4868: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 4869: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 4870: //FPACK <data> |A|012346|-|UUUUU|*****| |1111_111_0dd_ddd_ddd [FLINE #<data>] 4871: case 0b1111_111_000: 4872: case 0b1111_111_001: 4873: case 0b1111_111_010: 4874: case 0b1111_111_011: 4875: irpFpack (); 4876: break irpSwitch; 4877: 4878: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 4879: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 4880: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 4881: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 4882: //DOS <data> |A|012346|-|UUUUU|UUUUU| |1111_111_1dd_ddd_ddd [FLINE #<data>] 4883: case 0b1111_111_100: 4884: case 0b1111_111_101: 4885: case 0b1111_111_110: 4886: case 0b1111_111_111: 4887: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 4888: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 4889: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 4890: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 4891: //FLINE #<data> |-|012346|-|UUUUU|UUUUU| |1111_ddd_ddd_ddd_ddd (line 1111 emulator) 4892: case 0b1111_000_000: 4893: case 0b1111_000_001: 4894: case 0b1111_000_010: 4895: case 0b1111_000_011: 4896: case 0b1111_000_100: 4897: case 0b1111_000_101: 4898: case 0b1111_000_110: 4899: case 0b1111_000_111: 4900: case 0b1111_001_110: 4901: case 0b1111_001_111: 4902: case 0b1111_010_101: 4903: case 0b1111_011_001: 4904: case 0b1111_011_010: 4905: case 0b1111_011_011: 4906: case 0b1111_011_100: 4907: case 0b1111_011_101: 4908: case 0b1111_011_110: 4909: case 0b1111_011_111: 4910: case 0b1111_100_001: 4911: case 0b1111_100_010: 4912: case 0b1111_100_011: 4913: case 0b1111_100_100: 4914: case 0b1111_100_101: 4915: case 0b1111_100_110: 4916: case 0b1111_100_111: 4917: case 0b1111_101_000: 4918: case 0b1111_101_001: 4919: case 0b1111_101_010: 4920: case 0b1111_101_011: 4921: case 0b1111_101_100: 4922: case 0b1111_101_101: 4923: case 0b1111_101_110: 4924: case 0b1111_101_111: 4925: case 0b1111_110_000: 4926: case 0b1111_110_001: 4927: case 0b1111_110_010: 4928: case 0b1111_110_011: 4929: case 0b1111_110_100: 4930: case 0b1111_110_101: 4931: case 0b1111_110_110: 4932: case 0b1111_110_111: 4933: irpFline (); 4934: break irpSwitch; 4935: 4936: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 4937: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 4938: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 4939: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 4940: //HFSBOOT |-|012346|-|-----|-----| |0100_111_000_000_000 4941: //HFSINST |-|012346|-|-----|-----| |0100_111_000_000_001 4942: //HFSSTR |-|012346|-|-----|-----| |0100_111_000_000_010 4943: //HFSINT |-|012346|-|-----|-----| |0100_111_000_000_011 4944: //EMXNOP |-|012346|-|-----|-----| |0100_111_000_000_100 4945: case 0b0100_111_000: 4946: irpEmx (); 4947: break; 4948: 4949: default: 4950: irpIllegal (); 4951: 4952: } //switch XEiJ.regOC >>> 6 4953: 4954: //トレース例外 4955: // 命令実行前にsrのTビットがセットされていたとき命令実行後にトレース例外が発生する 4956: // トレース例外の発動は命令の機能拡張であり、他の例外処理で命令が中断されたときはトレース例外は発生しない 4957: // 命令例外はトレース例外の前に、割り込み例外はトレース例外の後に処理される 4958: // 未実装命令のエミュレーションルーチンはrteの直前にsrのTビットを復元することで未実装命令が1個の命令としてトレースされたように見せる 4959: // ;DOSコールの終了 4960: // ~008616: 4961: // btst.b #$07,(sp) 4962: // bne.s ~00861E 4963: // rte 4964: // ~00861E: 4965: // ori.w #$8000,sr 4966: // rte 4967: if (XEiJ.mpuTraceFlag != 0) { //命令実行前にsrのTビットがセットされていた 4968: irpExceptionFormat2 (M68kException.M6E_TRACE << 2, XEiJ.regPC, XEiJ.regPC0); //pcは次の命令 4969: } 4970: //クロックをカウントアップする 4971: // オペランドをアクセスした時点ではまだXEiJ.mpuClockTimeが更新されていないのでXEiJ.mpuClockTime<xxxClock 4972: // xxxTickを呼び出すときはXEiJ.mpuClockTime>=xxxClock 4973: XEiJ.mpuClockTime += XEiJ.mpuModifiedUnit * XEiJ.mpuCycleCount; 4974: //デバイスを呼び出す 4975: TickerQueue.tkqRun (XEiJ.mpuClockTime); 4976: //割り込みを受け付ける 4977: if ((t = XEiJ.mpuIMR & XEiJ.mpuIRR) != 0) { //マスクされているレベルよりも高くて受け付けていない割り込みがあるとき 4978: if (XEiJ.MPU_INTERRUPT_SWITCH) { 4979: switch (t) { 4980: case 0b00000001: 4981: case 0b00000011: 4982: case 0b00000101: 4983: case 0b00000111: 4984: case 0b00001001: 4985: case 0b00001011: 4986: case 0b00001101: 4987: case 0b00001111: 4988: case 0b00010001: 4989: case 0b00010011: 4990: case 0b00010101: 4991: case 0b00010111: 4992: case 0b00011001: 4993: case 0b00011011: 4994: case 0b00011101: 4995: case 0b00011111: 4996: case 0b00100001: 4997: case 0b00100011: 4998: case 0b00100101: 4999: case 0b00100111: 5000: case 0b00101001: 5001: case 0b00101011: 5002: case 0b00101101: 5003: case 0b00101111: 5004: case 0b00110001: 5005: case 0b00110011: 5006: case 0b00110101: 5007: case 0b00110111: 5008: case 0b00111001: 5009: case 0b00111011: 5010: case 0b00111101: 5011: case 0b00111111: 5012: case 0b01000001: 5013: case 0b01000011: 5014: case 0b01000101: 5015: case 0b01000111: 5016: case 0b01001001: 5017: case 0b01001011: 5018: case 0b01001101: 5019: case 0b01001111: 5020: case 0b01010001: 5021: case 0b01010011: 5022: case 0b01010101: 5023: case 0b01010111: 5024: case 0b01011001: 5025: case 0b01011011: 5026: case 0b01011101: 5027: case 0b01011111: 5028: case 0b01100001: 5029: case 0b01100011: 5030: case 0b01100101: 5031: case 0b01100111: 5032: case 0b01101001: 5033: case 0b01101011: 5034: case 0b01101101: 5035: case 0b01101111: 5036: case 0b01110001: 5037: case 0b01110011: 5038: case 0b01110101: 5039: case 0b01110111: 5040: case 0b01111001: 5041: case 0b01111011: 5042: case 0b01111101: 5043: case 0b01111111: 5044: case 0b10000001: 5045: case 0b10000011: 5046: case 0b10000101: 5047: case 0b10000111: 5048: case 0b10001001: 5049: case 0b10001011: 5050: case 0b10001101: 5051: case 0b10001111: 5052: case 0b10010001: 5053: case 0b10010011: 5054: case 0b10010101: 5055: case 0b10010111: 5056: case 0b10011001: 5057: case 0b10011011: 5058: case 0b10011101: 5059: case 0b10011111: 5060: case 0b10100001: 5061: case 0b10100011: 5062: case 0b10100101: 5063: case 0b10100111: 5064: case 0b10101001: 5065: case 0b10101011: 5066: case 0b10101101: 5067: case 0b10101111: 5068: case 0b10110001: 5069: case 0b10110011: 5070: case 0b10110101: 5071: case 0b10110111: 5072: case 0b10111001: 5073: case 0b10111011: 5074: case 0b10111101: 5075: case 0b10111111: 5076: case 0b11000001: 5077: case 0b11000011: 5078: case 0b11000101: 5079: case 0b11000111: 5080: case 0b11001001: 5081: case 0b11001011: 5082: case 0b11001101: 5083: case 0b11001111: 5084: case 0b11010001: 5085: case 0b11010011: 5086: case 0b11010101: 5087: case 0b11010111: 5088: case 0b11011001: 5089: case 0b11011011: 5090: case 0b11011101: 5091: case 0b11011111: 5092: case 0b11100001: 5093: case 0b11100011: 5094: case 0b11100101: 5095: case 0b11100111: 5096: case 0b11101001: 5097: case 0b11101011: 5098: case 0b11101101: 5099: case 0b11101111: 5100: case 0b11110001: 5101: case 0b11110011: 5102: case 0b11110101: 5103: case 0b11110111: 5104: case 0b11111001: 5105: case 0b11111011: 5106: case 0b11111101: 5107: case 0b11111111: 5108: //レベル7 5109: XEiJ.mpuIRR &= ~XEiJ.MPU_SYS_INTERRUPT_MASK; //割り込みを受け付ける 5110: if ((t = XEiJ.sysAcknowledge ()) != 0) { //デバイスにベクタ番号を要求して割り込み処理中の状態になったとき 5111: irpInterrupt (t << 2, XEiJ.MPU_SYS_INTERRUPT_LEVEL); //割り込み処理を開始する 5112: } 5113: break; 5114: case 0b00000010: 5115: case 0b00000110: 5116: case 0b00001010: 5117: case 0b00001110: 5118: case 0b00010010: 5119: case 0b00010110: 5120: case 0b00011010: 5121: case 0b00011110: 5122: case 0b00100010: 5123: case 0b00100110: 5124: case 0b00101010: 5125: case 0b00101110: 5126: case 0b00110010: 5127: case 0b00110110: 5128: case 0b00111010: 5129: case 0b00111110: 5130: case 0b01000010: 5131: case 0b01000110: 5132: case 0b01001010: 5133: case 0b01001110: 5134: case 0b01010010: 5135: case 0b01010110: 5136: case 0b01011010: 5137: case 0b01011110: 5138: case 0b01100010: 5139: case 0b01100110: 5140: case 0b01101010: 5141: case 0b01101110: 5142: case 0b01110010: 5143: case 0b01110110: 5144: case 0b01111010: 5145: case 0b01111110: 5146: case 0b10000010: 5147: case 0b10000110: 5148: case 0b10001010: 5149: case 0b10001110: 5150: case 0b10010010: 5151: case 0b10010110: 5152: case 0b10011010: 5153: case 0b10011110: 5154: case 0b10100010: 5155: case 0b10100110: 5156: case 0b10101010: 5157: case 0b10101110: 5158: case 0b10110010: 5159: case 0b10110110: 5160: case 0b10111010: 5161: case 0b10111110: 5162: case 0b11000010: 5163: case 0b11000110: 5164: case 0b11001010: 5165: case 0b11001110: 5166: case 0b11010010: 5167: case 0b11010110: 5168: case 0b11011010: 5169: case 0b11011110: 5170: case 0b11100010: 5171: case 0b11100110: 5172: case 0b11101010: 5173: case 0b11101110: 5174: case 0b11110010: 5175: case 0b11110110: 5176: case 0b11111010: 5177: case 0b11111110: 5178: //レベル6 5179: XEiJ.mpuIRR &= ~XEiJ.MPU_MFP_INTERRUPT_MASK; //割り込みを受け付ける 5180: if ((t = MC68901.mfpAcknowledge ()) != 0) { //デバイスにベクタ番号を要求して割り込み処理中の状態になったとき 5181: irpInterrupt (t << 2, XEiJ.MPU_MFP_INTERRUPT_LEVEL); //割り込み処理を開始する 5182: } 5183: break; 5184: case 0b00000100: 5185: case 0b00001100: 5186: case 0b00010100: 5187: case 0b00011100: 5188: case 0b00100100: 5189: case 0b00101100: 5190: case 0b00110100: 5191: case 0b00111100: 5192: case 0b01000100: 5193: case 0b01001100: 5194: case 0b01010100: 5195: case 0b01011100: 5196: case 0b01100100: 5197: case 0b01101100: 5198: case 0b01110100: 5199: case 0b01111100: 5200: case 0b10000100: 5201: case 0b10001100: 5202: case 0b10010100: 5203: case 0b10011100: 5204: case 0b10100100: 5205: case 0b10101100: 5206: case 0b10110100: 5207: case 0b10111100: 5208: case 0b11000100: 5209: case 0b11001100: 5210: case 0b11010100: 5211: case 0b11011100: 5212: case 0b11100100: 5213: case 0b11101100: 5214: case 0b11110100: 5215: case 0b11111100: 5216: //レベル5 5217: XEiJ.mpuIRR &= ~XEiJ.MPU_SCC_INTERRUPT_MASK; //割り込みを受け付ける 5218: if ((t = Z8530.sccAcknowledge ()) != 0) { //デバイスにベクタ番号を要求して割り込み処理中の状態になったとき 5219: irpInterrupt (t << 2, XEiJ.MPU_SCC_INTERRUPT_LEVEL); //割り込み処理を開始する 5220: } 5221: break; 5222: case 0b00010000: 5223: case 0b00110000: 5224: case 0b01010000: 5225: case 0b01110000: 5226: case 0b10010000: 5227: case 0b10110000: 5228: case 0b11010000: 5229: case 0b11110000: 5230: //レベル3 5231: XEiJ.mpuIRR &= ~XEiJ.MPU_DMA_INTERRUPT_MASK; //割り込みを受け付ける 5232: if ((t = HD63450.dmaAcknowledge ()) != 0) { //デバイスにベクタ番号を要求して割り込み処理中の状態になったとき 5233: irpInterrupt (t << 2, XEiJ.MPU_DMA_INTERRUPT_LEVEL); //割り込み処理を開始する 5234: } 5235: break; 5236: case 0b00100000: 5237: case 0b01100000: 5238: case 0b10100000: 5239: case 0b11100000: 5240: //レベル2 5241: XEiJ.mpuIRR &= ~XEiJ.MPU_EB2_INTERRUPT_MASK; //割り込みを受け付ける 5242: if ((t = XEiJ.eb2Acknowledge ()) != 0) { //デバイスにベクタ番号を要求して割り込み処理中の状態になったとき 5243: irpInterrupt (t << 2, XEiJ.MPU_EB2_INTERRUPT_LEVEL); //割り込み処理を開始する 5244: } 5245: break; 5246: case 0b01000000: 5247: case 0b11000000: 5248: //レベル1 5249: XEiJ.mpuIRR &= ~XEiJ.MPU_IOI_INTERRUPT_MASK; //割り込みを受け付ける 5250: if ((t = IOInterrupt.ioiAcknowledge ()) != 0) { //デバイスにベクタ番号を要求して割り込み処理中の状態になったとき 5251: irpInterrupt (t << 2, XEiJ.MPU_IOI_INTERRUPT_LEVEL); //割り込み処理を開始する 5252: } 5253: break; 5254: } 5255: } else { 5256: t &= -t; 5257: // x&=-xはxの最下位の1のビットだけを残す演算 5258: // すなわちマスクされているレベルよりも高くて受け付けていない割り込みの中で最高レベルの割り込みのビットだけが残る 5259: // 最高レベルの割り込みのビットしか残っていないので、割り込みの有無をレベルの高い順ではなく使用頻度の高い順に調べられる 5260: // MFPやDMAの割り込みがかかる度にそれより優先度の高いインタラプトスイッチが押されていないかどうかを確かめる必要がない 5261: if (t == XEiJ.MPU_MFP_INTERRUPT_MASK) { 5262: XEiJ.mpuIRR &= ~XEiJ.MPU_MFP_INTERRUPT_MASK; //割り込みを受け付ける 5263: if ((t = MC68901.mfpAcknowledge ()) != 0) { //デバイスにベクタ番号を要求して割り込み処理中の状態になったとき 5264: irpInterrupt (t << 2, XEiJ.MPU_MFP_INTERRUPT_LEVEL); //割り込み処理を開始する 5265: } 5266: } else if (t == XEiJ.MPU_DMA_INTERRUPT_MASK) { 5267: XEiJ.mpuIRR &= ~XEiJ.MPU_DMA_INTERRUPT_MASK; //割り込みを受け付ける 5268: if ((t = HD63450.dmaAcknowledge ()) != 0) { //デバイスにベクタ番号を要求して割り込み処理中の状態になったとき 5269: irpInterrupt (t << 2, XEiJ.MPU_DMA_INTERRUPT_LEVEL); //割り込み処理を開始する 5270: } 5271: } else if (t == XEiJ.MPU_SCC_INTERRUPT_MASK) { 5272: XEiJ.mpuIRR &= ~XEiJ.MPU_SCC_INTERRUPT_MASK; //割り込みを受け付ける 5273: if ((t = Z8530.sccAcknowledge ()) != 0) { //デバイスにベクタ番号を要求して割り込み処理中の状態になったとき 5274: irpInterrupt (t << 2, XEiJ.MPU_SCC_INTERRUPT_LEVEL); //割り込み処理を開始する 5275: } 5276: } else if (t == XEiJ.MPU_IOI_INTERRUPT_MASK) { 5277: XEiJ.mpuIRR &= ~XEiJ.MPU_IOI_INTERRUPT_MASK; //割り込みを受け付ける 5278: if ((t = IOInterrupt.ioiAcknowledge ()) != 0) { //デバイスにベクタ番号を要求して割り込み処理中の状態になったとき 5279: irpInterrupt (t << 2, XEiJ.MPU_IOI_INTERRUPT_LEVEL); //割り込み処理を開始する 5280: } 5281: } else if (t == XEiJ.MPU_EB2_INTERRUPT_MASK) { 5282: XEiJ.mpuIRR &= ~XEiJ.MPU_EB2_INTERRUPT_MASK; //割り込みを受け付ける 5283: if ((t = XEiJ.eb2Acknowledge ()) != 0) { //デバイスにベクタ番号を要求して割り込み処理中の状態になったとき 5284: irpInterrupt (t << 2, XEiJ.MPU_EB2_INTERRUPT_LEVEL); //割り込み処理を開始する 5285: } 5286: } else if (t == XEiJ.MPU_SYS_INTERRUPT_MASK) { 5287: XEiJ.mpuIRR &= ~XEiJ.MPU_SYS_INTERRUPT_MASK; //割り込みを受け付ける 5288: if ((t = XEiJ.sysAcknowledge ()) != 0) { //デバイスにベクタ番号を要求して割り込み処理中の状態になったとき 5289: irpInterrupt (t << 2, XEiJ.MPU_SYS_INTERRUPT_LEVEL); //割り込み処理を開始する 5290: } 5291: } 5292: } 5293: } //if t!=0 5294: if (MC68901.MFP_DELAYED_INTERRUPT) { 5295: XEiJ.mpuIRR |= XEiJ.mpuDIRR; //遅延割り込み要求 5296: XEiJ.mpuDIRR = 0; 5297: } 5298: } //命令ループ 5299: } catch (M68kException e) { 5300: if (CAT_ON) { 5301: catMove16End (); 5302: } 5303: if (M68kException.m6eNumber == M68kException.M6E_WAIT_EXCEPTION) { //待機例外 5304: if (irpWaitException ()) { 5305: continue; 5306: } else { 5307: break errorLoop; 5308: } 5309: } 5310: if (M68kException.m6eNumber == M68kException.M6E_INSTRUCTION_BREAK_POINT) { //命令ブレークポイントによる停止 5311: XEiJ.regPC = XEiJ.regPC0; 5312: XEiJ.mpuStop1 (null); //"Instruction Break Point" 5313: break errorLoop; 5314: } 5315: //例外処理 5316: // ここで処理するのはベクタ番号が2～63の例外に限る 5317: // 例外処理のサイクル数はACCESS_FAULTとADDRESS_ERROR以外は19になっているので必要ならば補正してからthrowする 5318: // 使用頻度が高いと思われる例外はインライン展開するのでここには来ない 5319: // セーブされるpcは以下の例外は命令の先頭、これ以外は次の命令 5320: // 2 ACCESS_FAULT 5321: // 3 ADDRESS_ERROR 5322: // 4 ILLEGAL_INSTRUCTION 5323: // 8 PRIVILEGE_VIOLATION 5324: // 10 LINE_1010_EMULATOR 5325: // 11 LINE_1111_EMULATOR 5326: // 14 FORMAT_ERROR 5327: // 48 FP_BRANCH_SET_UNORDERED 5328: // 60 UNIMPLEMENTED_EFFECTIVE 5329: // 61 UNIMPLEMENTED_INSTRUCTION 5330: // 111111111122222222223333333333444444444455555555556666 5331: // 0123456789012345678901234567890123456789012345678901234567890123 5332: if (0b0011100010110010000000000000000000000000000000001000000000001100L << M68kException.m6eNumber < 0L) { 5333: XEiJ.regPC = XEiJ.regPC0; //セーブされるpcは命令の先頭 5334: //アドレスレジスタを巻き戻す 5335: // A7を含むのでユーザモードのときはスーパーバイザモードに移行する前に巻き戻すこと 5336: for (int arr = 8; m60Incremented != 0L; arr++) { 5337: XEiJ.regRn[arr] -= (byte) m60Incremented; 5338: m60Incremented = (m60Incremented + 0x80L) >> 8; 5339: } 5340: } 5341: //FSLWのTTRを設定する 5342: // 透過変換でアドレス変換キャッシュがヒットしてバスエラーが発生したときFSLWのTTRが設定されていない 5343: //!!! SECONDのときFIRSTと同じページか確認していない。ページフォルトのときは次のページだがバスエラーのときは同じページかもしれない 5344: if ((m60FSLW & (M60_FSLW_BUS_ERROR_ON_READ | M60_FSLW_BUS_ERROR_ON_WRITE)) != 0) { //バスエラーのとき 5345: if (((m60FSLW & M60_FSLW_TM_SUPERVISOR) != 0 ? 5346: (m60FSLW & M60_FSLW_TM_CODE) != 0 ? mmuSuperCodeTransparent : mmuSuperDataTransparent : 5347: (m60FSLW & M60_FSLW_TM_CODE) != 0 ? mmuUserCodeTransparent : mmuUserDataTransparent) 5348: [m60Address >>> 24] != 0) { //透過変換 5349: m60FSLW |= M60_FSLW_TRANSPARENT; 5350: } 5351: } 5352: if (false) { 5353: System.out.println (m60ErrorToString ()); //srを表示するのでsrを更新する前に呼び出すこと 5354: } 5355: try { 5356: int save_sr = XEiJ.regSRT1 | XEiJ.regSRS | XEiJ.regSRM | XEiJ.regSRI | XEiJ.regCCR; 5357: XEiJ.regSRT1 = XEiJ.mpuTraceFlag = 0; //srのTビットを消す 5358: int sp; 5359: if (XEiJ.regSRS != 0) { //スーパーバイザモード 5360: sp = XEiJ.regRn[15]; 5361: } else { //ユーザモード 5362: XEiJ.regSRS = XEiJ.REG_SR_S; //スーパーバイザモードへ移行する 5363: XEiJ.mpuUSP = XEiJ.regRn[15]; //USPを保存 5364: sp = XEiJ.mpuISP; //SSPを復元 5365: if (DataBreakPoint.DBP_ON) { 5366: DataBreakPoint.dbpMemoryMap = DataBreakPoint.dbpSuperMap; //スーパーバイザメモリマップに切り替える 5367: } else { 5368: XEiJ.busMemoryMap = XEiJ.busSuperMap; //スーパーバイザメモリマップに切り替える 5369: } 5370: if (InstructionBreakPoint.IBP_ON) { 5371: InstructionBreakPoint.ibpOp1MemoryMap = InstructionBreakPoint.ibpOp1SuperMap; 5372: } 5373: } 5374: //以下はスーパーバイザモード 5375: XEiJ.mpuClockTime += XEiJ.mpuModifiedUnit * 19; 5376: // 同じオフセットで異なるフォーマットになるものはここでは処理できない 5377: if (M68kException.m6eNumber == M68kException.M6E_ACCESS_FAULT) { 5378: //ホストファイルシステムのデバイスコマンドを強制終了させる 5379: HFS.hfsState = HFS.HFS_STATE_IDLE; 5380: //FORMAT $4の例外スタックフレームを作る 5381: XEiJ.regRn[15] = sp -= 16; 5382: mmuWriteLongData (sp + 12, m60FSLW, 1); //15-12:フォルトステータスロングワード(FSLW) 5383: mmuWriteLongData (sp + 8, m60Address, 1); //11-8:フォルトアドレス 5384: mmuWriteWordData (sp + 6, 0x4000 | M68kException.M6E_ACCESS_FAULT << 2, 1); //7-6:フォーマットとベクタオフセット 5385: // 111111111122222222223333333333444444444455555555556666 5386: // 0123456789012345678901234567890123456789012345678901234567890123 5387: } else if (0b0001011101000000000000000000000000000000000000000000000000000000L << M68kException.m6eNumber < 0L) { 5388: //FORMAT $2の例外スタックフレームを作る 5389: XEiJ.regRn[15] = sp -= 12; 5390: mmuWriteLongData (sp + 8, m60Address, 1); //11-8:命令アドレス 5391: mmuWriteWordData (sp + 6, 0x2000 | M68kException.m6eNumber << 2, 1); //7-6:フォーマットとベクタオフセット 5392: } else { 5393: //FORMAT $0の例外スタックフレームを作る 5394: XEiJ.regRn[15] = sp -= 8; 5395: mmuWriteWordData (sp + 6, M68kException.m6eNumber << 2, 1); //7-6:フォーマットとベクタオフセット 5396: } 5397: mmuWriteLongData (sp + 2, XEiJ.regPC, 1); //5-2:プログラムカウンタ 5398: mmuWriteWordData (sp, save_sr, 1); //1-0:ステータスレジスタ 5399: irpSetPC (mmuReadLongFour (XEiJ.mpuVBR + (M68kException.m6eNumber << 2), 1)); //例外ベクタを取り出してジャンプする 5400: if (XEiJ.dbgStopOnError) { //エラーで停止する場合 5401: if (XEiJ.dbgDoStopOnError ()) { 5402: break errorLoop; 5403: } 5404: } 5405: } catch (M68kException ee) { //ダブルバスフォルト 5406: XEiJ.dbgDoubleBusFault (); 5407: break errorLoop; 5408: } 5409: } //catch M68kException 5410: } //例外ループ 5411: 5412: // 通常 5413: // pc0 最後に実行した命令 5414: // pc 次に実行する命令 5415: // バスエラー、アドレスエラー、不当命令、特権違反で停止したとき 5416: // pc0 エラーを発生させた命令 5417: // pc 例外処理ルーチンの先頭 5418: // ダブルバスフォルトで停止したとき 5419: // pc0 エラーを発生させた命令 5420: // pc エラーを発生させた命令 5421: // 命令ブレークポイントで停止したとき 5422: // pc0 命令ブレークポイントが設定された、次に実行する命令 5423: // pc 命令ブレークポイントが設定された、次に実行する命令 5424: // データブレークポイントで停止したとき 5425: // pc0 データを書き換えた、最後に実行した命令 5426: // pc 次に実行する命令 5427: 5428: //分岐ログに停止レコードを記録する 5429: if (BranchLog.BLG_ON) { 5430: BranchLog.blgStop (); 5431: } 5432: 5433: } //mpuCore() 5434: 5435: 5436: 5437: //cont = irpWaitException () 5438: // 待機例外をキャッチしたとき 5439: public static boolean irpWaitException () { 5440: XEiJ.regPC = XEiJ.regPC0; //PCを巻き戻す 5441: XEiJ.regRn[8 + (XEiJ.regOC & 7)] += WaitInstruction.REWIND_AR[XEiJ.regOC >> 3]; //(Ar)+|-(Ar)で変化したArを巻き戻す 5442: try { 5443: //トレース例外を処理する 5444: if (XEiJ.mpuTraceFlag != 0) { //命令実行前にsrのTビットがセットされていた 5445: irpExceptionFormat2 (M68kException.M6E_TRACE << 2, XEiJ.regPC, XEiJ.regPC0); //pcは次の命令 5446: } 5447: //デバイスを呼び出す 5448: TickerQueue.tkqRun (XEiJ.mpuClockTime); 5449: //割り込みを受け付ける 5450: int t; 5451: if ((t = XEiJ.mpuIMR & XEiJ.mpuIRR) != 0) { //マスクされているレベルよりも高くて受け付けていない割り込みがあるとき 5452: t &= -t; 5453: // x&=-xはxの最下位の1のビットだけを残す演算 5454: // すなわちマスクされているレベルよりも高くて受け付けていない割り込みの中で最高レベルの割り込みのビットだけが残る 5455: // 最高レベルの割り込みのビットしか残っていないので、割り込みの有無をレベルの高い順ではなく使用頻度の高い順に調べられる 5456: // MFPやDMAの割り込みがかかる度にそれより優先度の高いインタラプトスイッチが押されていないかどうかを確かめる必要がない 5457: if (t == XEiJ.MPU_MFP_INTERRUPT_MASK) { 5458: XEiJ.mpuIRR &= ~XEiJ.MPU_MFP_INTERRUPT_MASK; //割り込みを受け付ける 5459: if ((t = MC68901.mfpAcknowledge ()) != 0) { //デバイスにベクタ番号を要求して割り込み処理中の状態になったとき 5460: irpInterrupt (t << 2, XEiJ.MPU_MFP_INTERRUPT_LEVEL); //割り込み処理を開始する 5461: } 5462: } else if (t == XEiJ.MPU_DMA_INTERRUPT_MASK) { 5463: XEiJ.mpuIRR &= ~XEiJ.MPU_DMA_INTERRUPT_MASK; //割り込みを受け付ける 5464: if ((t = HD63450.dmaAcknowledge ()) != 0) { //デバイスにベクタ番号を要求して割り込み処理中の状態になったとき 5465: irpInterrupt (t << 2, XEiJ.MPU_DMA_INTERRUPT_LEVEL); //割り込み処理を開始する 5466: } 5467: } else if (t == XEiJ.MPU_SCC_INTERRUPT_MASK) { 5468: XEiJ.mpuIRR &= ~XEiJ.MPU_SCC_INTERRUPT_MASK; //割り込みを受け付ける 5469: if ((t = Z8530.sccAcknowledge ()) != 0) { //デバイスにベクタ番号を要求して割り込み処理中の状態になったとき 5470: irpInterrupt (t << 2, XEiJ.MPU_SCC_INTERRUPT_LEVEL); //割り込み処理を開始する 5471: } 5472: } else if (t == XEiJ.MPU_IOI_INTERRUPT_MASK) { 5473: XEiJ.mpuIRR &= ~XEiJ.MPU_IOI_INTERRUPT_MASK; //割り込みを受け付ける 5474: if ((t = IOInterrupt.ioiAcknowledge ()) != 0) { //デバイスにベクタ番号を要求して割り込み処理中の状態になったとき 5475: irpInterrupt (t << 2, XEiJ.MPU_IOI_INTERRUPT_LEVEL); //割り込み処理を開始する 5476: } 5477: } else if (t == XEiJ.MPU_EB2_INTERRUPT_MASK) { 5478: XEiJ.mpuIRR &= ~XEiJ.MPU_EB2_INTERRUPT_MASK; //割り込みを受け付ける 5479: if ((t = XEiJ.eb2Acknowledge ()) != 0) { //デバイスにベクタ番号を要求して割り込み処理中の状態になったとき 5480: irpInterrupt (t << 2, XEiJ.MPU_EB2_INTERRUPT_LEVEL); //割り込み処理を開始する 5481: } 5482: } else if (t == XEiJ.MPU_SYS_INTERRUPT_MASK) { 5483: XEiJ.mpuIRR &= ~XEiJ.MPU_SYS_INTERRUPT_MASK; //割り込みを受け付ける 5484: if ((t = XEiJ.sysAcknowledge ()) != 0) { //デバイスにベクタ番号を要求して割り込み処理中の状態になったとき 5485: irpInterrupt (t << 2, XEiJ.MPU_SYS_INTERRUPT_LEVEL); //割り込み処理を開始する 5486: } 5487: } 5488: } //if t!=0 5489: if (MC68901.MFP_DELAYED_INTERRUPT) { 5490: XEiJ.mpuIRR |= XEiJ.mpuDIRR; //遅延割り込み要求 5491: XEiJ.mpuDIRR = 0; 5492: } 5493: } catch (M68kException e) { 5494: //!!! 待機例外処理中のバスエラーの処理は省略 5495: XEiJ.dbgDoubleBusFault (); 5496: return false; 5497: } //catch M68kException 5498: return true; 5499: } //irpWaitException 5500: 5501: 5502: 5503: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 5504: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 5505: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 5506: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 5507: //ORI.B #<data>,<ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |0000_000_000_mmm_rrr-{data} 5508: //OR.B #<data>,<ea> |A|012346|-|-UUUU|-**00| M+-WXZ |0000_000_000_mmm_rrr-{data} [ORI.B #<data>,<ea>] 5509: //ORI.B #<data>,CCR |-|012346|-|*****|*****| |0000_000_000_111_100-{data} 5510: public static void irpOriByte () throws M68kException { 5511: int ea = XEiJ.regOC & 63; 5512: int z = mmuReadByteSignExword ((XEiJ.regPC += 2) - 1, XEiJ.regSRS); //pcbs 5513: if (ea < XEiJ.EA_AR) { //ORI.B #<data>,Dr 5514: if (XEiJ.DBG_ORI_BYTE_ZERO_D0) { 5515: if (z == 0 && ea == 0 && XEiJ.dbgOriByteZeroD0) { //ORI.B #$00,D0 5516: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 5517: throw M68kException.m6eSignal; 5518: } 5519: } 5520: XEiJ.mpuCycleCount++; 5521: z = XEiJ.regRn[ea] |= 255 & z; //0拡張してからOR 5522: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & z]; //ccr_tst_byte 5523: } else if (ea == XEiJ.EA_IM) { //ORI.B #<data>,CCR 5524: XEiJ.mpuCycleCount++; 5525: XEiJ.regCCR |= XEiJ.REG_CCR_MASK & z; 5526: } else { //ORI.B #<data>,<mem> 5527: XEiJ.mpuCycleCount++; 5528: int a = efaMltByte (ea); 5529: mmuWriteByteData (a, z |= mmuModifyByteSignData (a, XEiJ.regSRS), XEiJ.regSRS); 5530: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & z]; //ccr_tst_byte 5531: } 5532: } //irpOriByte 5533: 5534: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 5535: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 5536: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 5537: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 5538: //ORI.W #<data>,<ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |0000_000_001_mmm_rrr-{data} 5539: //OR.W #<data>,<ea> |A|012346|-|-UUUU|-**00| M+-WXZ |0000_000_001_mmm_rrr-{data} [ORI.W #<data>,<ea>] 5540: //ORI.W #<data>,SR |-|012346|P|*****|*****| |0000_000_001_111_100-{data} 5541: public static void irpOriWord () throws M68kException { 5542: int ea = XEiJ.regOC & 63; 5543: if (ea < XEiJ.EA_AR) { //ORI.W #<data>,Dr 5544: int z = mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); //pcws 5545: XEiJ.mpuCycleCount++; 5546: z = XEiJ.regRn[ea] |= (char) z; //0拡張してからOR 5547: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (char) z - 1 >> 31 & XEiJ.REG_CCR_Z | ((short) z < 0 ? XEiJ.REG_CCR_N : 0); //ccr_tst_word 5548: } else if (ea == XEiJ.EA_IM) { //ORI.W #<data>,SR 5549: if (XEiJ.regSRS == 0) { //ユーザモードのとき 5550: M68kException.m6eNumber = M68kException.M6E_PRIVILEGE_VIOLATION; 5551: throw M68kException.m6eSignal; 5552: } 5553: //以下はスーパーバイザモード 5554: XEiJ.mpuCycleCount += 5; 5555: irpSetSR (XEiJ.regSRT1 | XEiJ.regSRS | XEiJ.regSRM | XEiJ.regSRI | XEiJ.regCCR | mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, 1)); //pcws。特権違反チェックが先 5556: } else { //ORI.W #<data>,<mem> 5557: int z = mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); //pcws 5558: XEiJ.mpuCycleCount++; 5559: int a = efaMltWord (ea); 5560: mmuWriteWordData (a, z |= mmuModifyWordSignData (a, XEiJ.regSRS), XEiJ.regSRS); 5561: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (char) z - 1 >> 31 & XEiJ.REG_CCR_Z | ((short) z < 0 ? XEiJ.REG_CCR_N : 0); //ccr_tst_word 5562: } 5563: } //irpOriWord 5564: 5565: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 5566: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 5567: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 5568: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 5569: //ORI.L #<data>,<ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |0000_000_010_mmm_rrr-{data} 5570: //OR.L #<data>,<ea> |A|012346|-|-UUUU|-**00| M+-WXZ |0000_000_010_mmm_rrr-{data} [ORI.L #<data>,<ea>] 5571: public static void irpOriLong () throws M68kException { 5572: int ea = XEiJ.regOC & 63; 5573: int y = mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS); //pcls 5574: int z; 5575: if (ea < XEiJ.EA_AR) { //ORI.L #<data>,Dr 5576: XEiJ.mpuCycleCount++; 5577: z = XEiJ.regRn[ea] |= y; 5578: } else { //ORI.L #<data>,<mem> 5579: XEiJ.mpuCycleCount++; 5580: int a = efaMltLong (ea); 5581: mmuWriteLongData (a, z = mmuModifyLongData (a, XEiJ.regSRS) | y, XEiJ.regSRS); 5582: } 5583: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 5584: } //irpOriLong 5585: 5586: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 5587: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 5588: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 5589: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 5590: //BITREV.L Dr |-|------|-|-----|-----|D |0000_000_011_000_rrr (ISA_C) 5591: //CMP2.B <ea>,Rn |-|--234S|-|-UUUU|-U*U*| M WXZP |0000_000_011_mmm_rrr-rnnn000000000000 5592: //CHK2.B <ea>,Rn |-|--234S|-|-UUUU|-U*U*| M WXZP |0000_000_011_mmm_rrr-rnnn100000000000 5593: // 5594: //BITREV.L Dr 5595: // Drのビットの並びを逆順にする。CCRは変化しない 5596: // 5597: //CHK2.B <ea>,Rn 5598: // <ea>から下限と上限をリードしてRnが範囲内か調べる 5599: // CHK2.B <ea>,Anは下限と上限をそれぞれロングに符号拡張してロングで比較する 5600: // Rnが下限または上限と等しいときZをセットする 5601: // Rnが範囲外のときCをセットする。このときCHK instruction例外が発生する 5602: // 060ISPのソースは注釈に誤りが多いので注釈ではなくコードを参考にする 5603: // CCR 5604: // X 変化しない 5605: // N 変化しない(M68000PRMでは未定義) 5606: // Z Rn-LB==0||Rn-LB==UB-LB 5607: // V 変化しない(M68000PRMでは未定義) 5608: // C Rn-LB>UB-LB(符号なし比較) 5609: // 5610: //CMP2.B <ea>,Rn 5611: // <ea>から下限と上限をリードしてRnが範囲内か調べる 5612: // CMP2.B <ea>,Anは下限と上限をそれぞれロングに符号拡張してロングで比較する 5613: // Rnが下限または上限と等しいときZをセットする 5614: // Rnが範囲外のときCをセットする 5615: // 060ISPのソースは注釈に誤りが多いので注釈ではなくコードを参考にする 5616: // CCR 5617: // X 変化しない 5618: // N 変化しない(M68000PRMでは未定義) 5619: // Z Rn-LB==0||Rn-LB==UB-LB 5620: // V 変化しない(M68000PRMでは未定義) 5621: // C Rn-LB>UB-LB(符号なし比較) 5622: public static void irpCmp2Chk2Byte () throws M68kException { 5623: int ea = XEiJ.regOC & 63; 5624: if (ea < XEiJ.EA_AR) { //BITREV.L Dr 5625: XEiJ.mpuCycleCount++; 5626: int x = XEiJ.regRn[ea]; 5627: XEiJ.regRn[ea] = XEiJ.MPU_BITREV_TABLE_0[x & 2047] | XEiJ.MPU_BITREV_TABLE_1[x << 10 >>> 21] | XEiJ.MPU_BITREV_TABLE_2[x >>> 22]; 5628: } else { //CMP2/CHK2.B <ea>,Rn 5629: M68kException.m6eNumber = M68kException.M6E_UNIMPLEMENTED_INSTRUCTION; 5630: throw M68kException.m6eSignal; 5631: } 5632: } //irpCmp2Chk2Byte 5633: 5634: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 5635: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 5636: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 5637: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 5638: //BTST.L Dq,Dr |-|012346|-|--U--|--*--|D |0000_qqq_100_000_rrr 5639: //MOVEP.W (d16,Ar),Dq |-|01234S|-|-----|-----| |0000_qqq_100_001_rrr-{data} 5640: //BTST.B Dq,<ea> |-|012346|-|--U--|--*--| M+-WXZPI|0000_qqq_100_mmm_rrr 5641: public static void irpBtstReg () throws M68kException { 5642: int ea = XEiJ.regOC & 63; 5643: int qqq = XEiJ.regOC >> 9; //qqq 5644: if (ea >> 3 == XEiJ.MMM_AR) { //MOVEP.W (d16,Ar),Dq 5645: M68kException.m6eNumber = M68kException.M6E_UNIMPLEMENTED_INSTRUCTION; 5646: throw M68kException.m6eSignal; 5647: } else { //BTST.L Dq,Dr/<ea> 5648: int y = XEiJ.regRn[qqq]; 5649: if (ea < XEiJ.EA_AR) { //BTST.L Dq,Dr 5650: XEiJ.mpuCycleCount++; 5651: XEiJ.regCCR = XEiJ.regCCR & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_N | XEiJ.REG_CCR_V | XEiJ.REG_CCR_C) | (~XEiJ.regRn[ea] >>> y & 1) << 2; //ccr_btst。intのシフトは5bitでマスクされるので&31を省略 5652: } else { //BTST.B Dq,<ea> 5653: XEiJ.mpuCycleCount++; 5654: XEiJ.regCCR = XEiJ.regCCR & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_N | XEiJ.REG_CCR_V | XEiJ.REG_CCR_C) | (~(ea == XEiJ.EA_IM ? mmuReadByteSignExword ((XEiJ.regPC += 2) - 1, XEiJ.regSRS) : mmuReadByteSignData (efaAnyByte (ea), XEiJ.regSRS)) >>> (y & 7) & 1) << 2; //ccr_btst。pcbs。イミディエイトを分離 5655: } 5656: } 5657: } //irpBtstReg 5658: 5659: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 5660: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 5661: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 5662: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 5663: //BCHG.L Dq,Dr |-|012346|-|--U--|--*--|D |0000_qqq_101_000_rrr 5664: //MOVEP.L (d16,Ar),Dq |-|01234S|-|-----|-----| |0000_qqq_101_001_rrr-{data} 5665: //BCHG.B Dq,<ea> |-|012346|-|--U--|--*--| M+-WXZ |0000_qqq_101_mmm_rrr 5666: public static void irpBchgReg () throws M68kException { 5667: int ea = XEiJ.regOC & 63; 5668: int qqq = XEiJ.regOC >> 9; //qqq 5669: if (ea >> 3 == XEiJ.MMM_AR) { //MOVEP.L (d16,Ar),Dq 5670: M68kException.m6eNumber = M68kException.M6E_UNIMPLEMENTED_INSTRUCTION; 5671: throw M68kException.m6eSignal; 5672: } else { //BCHG.L Dq,Dr/<ea> 5673: int x; 5674: int y = XEiJ.regRn[qqq]; 5675: if (ea < XEiJ.EA_AR) { //BCHG.L Dq,Dr 5676: XEiJ.mpuCycleCount++; 5677: XEiJ.regRn[ea] = (x = XEiJ.regRn[ea]) ^ (y = 1 << y); //intのシフトは5bitでマスクされるので1<<(y&0x1f)の&0x1fを省略 5678: } else { //BCHG.B Dq,<ea> 5679: XEiJ.mpuCycleCount++; 5680: int a = efaMltByte (ea); 5681: mmuWriteByteData (a, (x = mmuModifyByteSignData (a, XEiJ.regSRS)) ^ (y = 1 << (y & 7)), XEiJ.regSRS); 5682: } 5683: XEiJ.regCCR = XEiJ.regCCR & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_N | XEiJ.REG_CCR_V | XEiJ.REG_CCR_C) | (x & y) - 1 >>> 31 << 2; //ccr_btst 5684: } 5685: } //irpBchgReg 5686: 5687: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 5688: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 5689: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 5690: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 5691: //BCLR.L Dq,Dr |-|012346|-|--U--|--*--|D |0000_qqq_110_000_rrr 5692: //MOVEP.W Dq,(d16,Ar) |-|01234S|-|-----|-----| |0000_qqq_110_001_rrr-{data} 5693: //BCLR.B Dq,<ea> |-|012346|-|--U--|--*--| M+-WXZ |0000_qqq_110_mmm_rrr 5694: public static void irpBclrReg () throws M68kException { 5695: int ea = XEiJ.regOC & 63; 5696: int y = XEiJ.regRn[XEiJ.regOC >> 9]; //qqq 5697: if (ea >> 3 == XEiJ.MMM_AR) { //MOVEP.W Dq,(d16,Ar) 5698: M68kException.m6eNumber = M68kException.M6E_UNIMPLEMENTED_INSTRUCTION; 5699: throw M68kException.m6eSignal; 5700: } else { //BCLR.L Dq,Dr/<ea> 5701: int x; 5702: if (ea < XEiJ.EA_AR) { //BCLR.L Dq,Dr 5703: XEiJ.mpuCycleCount++; 5704: XEiJ.regRn[ea] = (x = XEiJ.regRn[ea]) & ~(y = 1 << y); //intのシフトは5bitでマスクされるので1<<(y&0x1f)の&0x1fを省略 5705: } else { //BCLR.B Dq,<ea> 5706: XEiJ.mpuCycleCount++; 5707: int a = efaMltByte (ea); 5708: mmuWriteByteData (a, (x = mmuModifyByteSignData (a, XEiJ.regSRS)) & ~(y = 1 << (y & 7)), XEiJ.regSRS); 5709: } 5710: XEiJ.regCCR = XEiJ.regCCR & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_N | XEiJ.REG_CCR_V | XEiJ.REG_CCR_C) | (x & y) - 1 >>> 31 << 2; //ccr_btst 5711: } 5712: } //irpBclrReg 5713: 5714: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 5715: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 5716: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 5717: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 5718: //BSET.L Dq,Dr |-|012346|-|--U--|--*--|D |0000_qqq_111_000_rrr 5719: //MOVEP.L Dq,(d16,Ar) |-|01234S|-|-----|-----| |0000_qqq_111_001_rrr-{data} 5720: //BSET.B Dq,<ea> |-|012346|-|--U--|--*--| M+-WXZ |0000_qqq_111_mmm_rrr 5721: public static void irpBsetReg () throws M68kException { 5722: int ea = XEiJ.regOC & 63; 5723: int y = XEiJ.regRn[XEiJ.regOC >> 9]; //qqq 5724: if (ea >> 3 == XEiJ.MMM_AR) { //MOVEP.L Dq,(d16,Ar) 5725: M68kException.m6eNumber = M68kException.M6E_UNIMPLEMENTED_INSTRUCTION; 5726: throw M68kException.m6eSignal; 5727: } else { //BSET.L Dq,Dr/<ea> 5728: int x; 5729: if (ea < XEiJ.EA_AR) { //BSET.L Dq,Dr 5730: XEiJ.mpuCycleCount++; 5731: XEiJ.regRn[ea] = (x = XEiJ.regRn[ea]) | (y = 1 << y); //intのシフトは5bitでマスクされるので1<<(y&0x1f)の&0x1fを省略 5732: } else { //BSET.B Dq,<ea> 5733: XEiJ.mpuCycleCount++; 5734: int a = efaMltByte (ea); 5735: mmuWriteByteData (a, (x = mmuModifyByteSignData (a, XEiJ.regSRS)) | (y = 1 << (y & 7)), XEiJ.regSRS); 5736: } 5737: XEiJ.regCCR = XEiJ.regCCR & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_N | XEiJ.REG_CCR_V | XEiJ.REG_CCR_C) | (x & y) - 1 >>> 31 << 2; //ccr_btst 5738: } 5739: } //irpBsetReg 5740: 5741: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 5742: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 5743: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 5744: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 5745: //ANDI.B #<data>,<ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |0000_001_000_mmm_rrr-{data} 5746: //AND.B #<data>,<ea> |A|012346|-|-UUUU|-**00| M+-WXZ |0000_001_000_mmm_rrr-{data} [ANDI.B #<data>,<ea>] 5747: //ANDI.B #<data>,CCR |-|012346|-|*****|*****| |0000_001_000_111_100-{data} 5748: public static void irpAndiByte () throws M68kException { 5749: int ea = XEiJ.regOC & 63; 5750: int z = mmuReadByteSignExword ((XEiJ.regPC += 2) - 1, XEiJ.regSRS); //pcbs 5751: if (ea < XEiJ.EA_AR) { //ANDI.B #<data>,Dr 5752: XEiJ.mpuCycleCount++; 5753: z = XEiJ.regRn[ea] &= ~255 | z; //1拡張してからAND 5754: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & z]; //ccr_tst_byte 5755: } else if (ea == XEiJ.EA_IM) { //ANDI.B #<data>,CCR 5756: XEiJ.mpuCycleCount++; 5757: XEiJ.regCCR &= z; 5758: } else { //ANDI.B #<data>,<mem> 5759: XEiJ.mpuCycleCount++; 5760: int a = efaMltByte (ea); 5761: mmuWriteByteData (a, z &= mmuModifyByteSignData (a, XEiJ.regSRS), XEiJ.regSRS); 5762: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & z]; //ccr_tst_byte 5763: } 5764: } //irpAndiByte 5765: 5766: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 5767: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 5768: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 5769: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 5770: //ANDI.W #<data>,<ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |0000_001_001_mmm_rrr-{data} 5771: //AND.W #<data>,<ea> |A|012346|-|-UUUU|-**00| M+-WXZ |0000_001_001_mmm_rrr-{data} [ANDI.W #<data>,<ea>] 5772: //ANDI.W #<data>,SR |-|012346|P|*****|*****| |0000_001_001_111_100-{data} 5773: public static void irpAndiWord () throws M68kException { 5774: int ea = XEiJ.regOC & 63; 5775: if (ea < XEiJ.EA_AR) { //ANDI.W #<data>,Dr 5776: int z = mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); //pcws 5777: XEiJ.mpuCycleCount++; 5778: z = XEiJ.regRn[ea] &= ~65535 | z; //1拡張してからAND 5779: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (char) z - 1 >> 31 & XEiJ.REG_CCR_Z | ((short) z < 0 ? XEiJ.REG_CCR_N : 0); //ccr_tst_word 5780: } else if (ea == XEiJ.EA_IM) { //ANDI.W #<data>,SR 5781: if (XEiJ.regSRS == 0) { //ユーザモードのとき 5782: M68kException.m6eNumber = M68kException.M6E_PRIVILEGE_VIOLATION; 5783: throw M68kException.m6eSignal; 5784: } 5785: //以下はスーパーバイザモード 5786: XEiJ.mpuCycleCount += 12; 5787: irpSetSR ((XEiJ.regSRT1 | XEiJ.regSRS | XEiJ.regSRM | XEiJ.regSRI | XEiJ.regCCR) & mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, 1)); //pcws。特権違反チェックが先 5788: } else { //ANDI.W #<data>,<mem> 5789: int z = mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); //pcws 5790: XEiJ.mpuCycleCount++; 5791: int a = efaMltWord (ea); 5792: mmuWriteWordData (a, z &= mmuModifyWordSignData (a, XEiJ.regSRS), XEiJ.regSRS); 5793: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (char) z - 1 >> 31 & XEiJ.REG_CCR_Z | ((short) z < 0 ? XEiJ.REG_CCR_N : 0); //ccr_tst_word 5794: } 5795: } //irpAndiWord 5796: 5797: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 5798: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 5799: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 5800: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 5801: //ANDI.L #<data>,<ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |0000_001_010_mmm_rrr-{data} 5802: //AND.L #<data>,<ea> |A|012346|-|-UUUU|-**00| M+-WXZ |0000_001_010_mmm_rrr-{data} [ANDI.L #<data>,<ea>] 5803: public static void irpAndiLong () throws M68kException { 5804: int ea = XEiJ.regOC & 63; 5805: int y = mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS); //pcls 5806: int z; 5807: if (ea < XEiJ.EA_AR) { //ANDI.L #<data>,Dr 5808: XEiJ.mpuCycleCount++; 5809: z = XEiJ.regRn[ea] &= y; 5810: } else { //ANDI.L #<data>,<mem> 5811: XEiJ.mpuCycleCount++; 5812: int a = efaMltLong (ea); 5813: mmuWriteLongData (a, z = mmuModifyLongData (a, XEiJ.regSRS) & y, XEiJ.regSRS); 5814: } 5815: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 5816: } //irpAndiLong 5817: 5818: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 5819: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 5820: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 5821: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 5822: //BYTEREV.L Dr |-|------|-|-----|-----|D |0000_001_011_000_rrr (ISA_C) 5823: //CMP2.W <ea>,Rn |-|--234S|-|-UUUU|-U*U*| M WXZP |0000_001_011_mmm_rrr-rnnn000000000000 5824: //CHK2.W <ea>,Rn |-|--234S|-|-UUUU|-U*U*| M WXZP |0000_001_011_mmm_rrr-rnnn100000000000 5825: // 5826: //BYTEREV.L Dr 5827: // Drのバイトの並びを逆順にする。CCRは変化しない 5828: // 5829: //CHK2.W <ea>,Rn 5830: // <ea>から下限と上限をリードしてRnが範囲内か調べる 5831: // CHK2.W <ea>,Anは下限と上限をそれぞれロングに符号拡張してロングで比較する 5832: // Rnが下限または上限と等しいときZをセットする 5833: // Rnが範囲外のときCをセットする。このときCHK instruction例外が発生する 5834: // 060ISPのソースは注釈に誤りが多いので注釈ではなくコードを参考にする 5835: // CCR 5836: // X 変化しない 5837: // N 変化しない(M68000PRMでは未定義) 5838: // Z Rn-LB==0||Rn-LB==UB-LB 5839: // V 変化しない(M68000PRMでは未定義) 5840: // C Rn-LB>UB-LB(符号なし比較) 5841: // 5842: //CMP2.W <ea>,Rn 5843: // <ea>から下限と上限をリードしてRnが範囲内か調べる 5844: // CMP2.W <ea>,Anは下限と上限をそれぞれロングに符号拡張してロングで比較する 5845: // Rnが下限または上限と等しいときZをセットする 5846: // Rnが範囲外のときCをセットする 5847: // 060ISPのソースは注釈に誤りが多いので注釈ではなくコードを参考にする 5848: // CCR 5849: // X 変化しない 5850: // N 変化しない(M68000PRMでは未定義) 5851: // Z Rn-LB==0||Rn-LB==UB-LB 5852: // V 変化しない(M68000PRMでは未定義) 5853: // C Rn-LB>UB-LB(符号なし比較) 5854: public static void irpCmp2Chk2Word () throws M68kException { 5855: int ea = XEiJ.regOC & 63; 5856: if (ea < XEiJ.EA_AR) { //BYTEREV.L Dr 5857: XEiJ.mpuCycleCount++; 5858: XEiJ.regRn[ea] = Integer.reverseBytes (XEiJ.regRn[ea]); 5859: } else { //CMP2/CHK2.W <ea>,Rn 5860: M68kException.m6eNumber = M68kException.M6E_UNIMPLEMENTED_INSTRUCTION; 5861: throw M68kException.m6eSignal; 5862: } 5863: } //irpCmp2Chk2Word 5864: 5865: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 5866: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 5867: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 5868: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 5869: //SUBI.B #<data>,<ea> |-|012346|-|UUUUU|*****|D M+-WXZ |0000_010_000_mmm_rrr-{data} 5870: //SUB.B #<data>,<ea> |A|012346|-|UUUUU|*****| M+-WXZ |0000_010_000_mmm_rrr-{data} [SUBI.B #<data>,<ea>] 5871: public static void irpSubiByte () throws M68kException { 5872: int ea = XEiJ.regOC & 63; 5873: int x; 5874: int y = mmuReadByteSignExword ((XEiJ.regPC += 2) - 1, XEiJ.regSRS); //pcbs 5875: int z; 5876: if (ea < XEiJ.EA_AR) { //SUBI.B #<data>,Dr 5877: XEiJ.mpuCycleCount++; 5878: z = (byte) (XEiJ.regRn[ea] = ~0xff & (x = XEiJ.regRn[ea]) | 0xff & (x = (byte) x) - y); 5879: } else { //SUBI.B #<data>,<mem> 5880: XEiJ.mpuCycleCount++; 5881: int a = efaMltByte (ea); 5882: mmuWriteByteData (a, z = (byte) ((x = mmuModifyByteSignData (a, XEiJ.regSRS)) - y), XEiJ.regSRS); 5883: } 5884: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | 5885: ((x ^ y) & (x ^ z)) >>> 31 << 1 | 5886: (x & (y ^ z) ^ (y | z)) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_sub 5887: } //irpSubiByte 5888: 5889: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 5890: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 5891: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 5892: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 5893: //SUBI.W #<data>,<ea> |-|012346|-|UUUUU|*****|D M+-WXZ |0000_010_001_mmm_rrr-{data} 5894: //SUB.W #<data>,<ea> |A|012346|-|UUUUU|*****| M+-WXZ |0000_010_001_mmm_rrr-{data} [SUBI.W #<data>,<ea>] 5895: public static void irpSubiWord () throws M68kException { 5896: int ea = XEiJ.regOC & 63; 5897: int x; 5898: int y = mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); //pcws 5899: int z; 5900: if (ea < XEiJ.EA_AR) { //SUBI.W #<data>,Dr 5901: XEiJ.mpuCycleCount++; 5902: z = (short) (XEiJ.regRn[ea] = ~0xffff & (x = XEiJ.regRn[ea]) | (char) ((x = (short) x) - y)); 5903: } else { //SUBI.W #<data>,<mem> 5904: XEiJ.mpuCycleCount++; 5905: int a = efaMltWord (ea); 5906: mmuWriteWordData (a, z = (short) ((x = mmuModifyWordSignData (a, XEiJ.regSRS)) - y), XEiJ.regSRS); 5907: } 5908: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | 5909: ((x ^ y) & (x ^ z)) >>> 31 << 1 | 5910: (x & (y ^ z) ^ (y | z)) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_sub 5911: } //irpSubiWord 5912: 5913: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 5914: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 5915: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 5916: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 5917: //SUBI.L #<data>,<ea> |-|012346|-|UUUUU|*****|D M+-WXZ |0000_010_010_mmm_rrr-{data} 5918: //SUB.L #<data>,<ea> |A|012346|-|UUUUU|*****| M+-WXZ |0000_010_010_mmm_rrr-{data} [SUBI.L #<data>,<ea>] 5919: public static void irpSubiLong () throws M68kException { 5920: int ea = XEiJ.regOC & 63; 5921: int x; 5922: int y = mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS); //pcls 5923: int z; 5924: if (ea < XEiJ.EA_AR) { //SUBI.L #<data>,Dr 5925: XEiJ.mpuCycleCount++; 5926: XEiJ.regRn[ea] = z = (x = XEiJ.regRn[ea]) - y; 5927: } else { //SUBI.L #<data>,<mem> 5928: XEiJ.mpuCycleCount++; 5929: int a = efaMltLong (ea); 5930: mmuWriteLongData (a, z = (x = mmuModifyLongData (a, XEiJ.regSRS)) - y, XEiJ.regSRS); 5931: } 5932: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | 5933: ((x ^ y) & (x ^ z)) >>> 31 << 1 | 5934: (x & (y ^ z) ^ (y | z)) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_sub 5935: } //irpSubiLong 5936: 5937: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 5938: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 5939: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 5940: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 5941: //FF1.L Dr |-|------|-|-UUUU|-**00|D |0000_010_011_000_rrr (ISA_C) 5942: //CMP2.L <ea>,Rn |-|--234S|-|-UUUU|-U*U*| M WXZP |0000_010_011_mmm_rrr-rnnn000000000000 5943: //CHK2.L <ea>,Rn |-|--234S|-|-UUUU|-U*U*| M WXZP |0000_010_011_mmm_rrr-rnnn100000000000 5944: // 5945: //CHK2.L <ea>,Rn 5946: // <ea>から下限と上限をリードしてRnが範囲内か調べる 5947: // Rnが下限または上限と等しいときZをセットする 5948: // Rnが範囲外のときCをセットする。このときCHK instruction例外が発生する 5949: // 060ISPのソースは注釈に誤りが多いので注釈ではなくコードを参考にする 5950: // CCR 5951: // X 変化しない 5952: // N 変化しない(M68000PRMでは未定義) 5953: // Z Rn-LB==0||Rn-LB==UB-LB 5954: // V 変化しない(M68000PRMでは未定義) 5955: // C Rn-LB>UB-LB(符号なし比較) 5956: // 5957: //CMP2.L <ea>,Rn 5958: // <ea>から下限と上限をリードしてRnが範囲内か調べる 5959: // Rnが下限または上限と等しいときZをセットする 5960: // Rnが範囲外のときCをセットする 5961: // 060ISPのソースは注釈に誤りが多いので注釈ではなくコードを参考にする 5962: // CCR 5963: // X 変化しない 5964: // N 変化しない(M68000PRMでは未定義) 5965: // Z Rn-LB==0||Rn-LB==UB-LB 5966: // V 変化しない(M68000PRMでは未定義) 5967: // C Rn-LB>UB-LB(符号なし比較) 5968: // 5969: //FF1.L Dr 5970: // Drの最上位の1のbit31からのオフセットをDrに格納する 5971: // Drが0のときは32になる 5972: public static void irpCmp2Chk2Long () throws M68kException { 5973: int ea = XEiJ.regOC & 63; 5974: if (ea < XEiJ.EA_AR) { //FF1.L Dr 5975: XEiJ.mpuCycleCount++; 5976: int z = XEiJ.regRn[ea]; 5977: XEiJ.regRn[ea] = Integer.numberOfLeadingZeros (z); 5978: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 5979: } else { //CMP2/CHK2.L <ea>,Rn 5980: M68kException.m6eNumber = M68kException.M6E_UNIMPLEMENTED_INSTRUCTION; 5981: throw M68kException.m6eSignal; 5982: } 5983: } //irpCmp2Chk2Long 5984: 5985: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 5986: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 5987: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 5988: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 5989: //ADDI.B #<data>,<ea> |-|012346|-|UUUUU|*****|D M+-WXZ |0000_011_000_mmm_rrr-{data} 5990: public static void irpAddiByte () throws M68kException { 5991: int ea = XEiJ.regOC & 63; 5992: int x; 5993: int y = mmuReadByteSignExword ((XEiJ.regPC += 2) - 1, XEiJ.regSRS); //pcbs 5994: int z; 5995: if (ea < XEiJ.EA_AR) { //ADDI.B #<data>,Dr 5996: XEiJ.mpuCycleCount++; 5997: z = (byte) (XEiJ.regRn[ea] = ~0xff & (x = XEiJ.regRn[ea]) | 0xff & (x = (byte) x) + y); 5998: } else { //ADDI.B #<data>,<mem> 5999: XEiJ.mpuCycleCount++; 6000: int a = efaMltByte (ea); 6001: mmuWriteByteData (a, z = (byte) ((x = mmuModifyByteSignData (a, XEiJ.regSRS)) + y), XEiJ.regSRS); 6002: } 6003: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | 6004: ((x ^ z) & (y ^ z)) >>> 31 << 1 | 6005: ((x | y) ^ (x ^ y) & z) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_add 6006: } //irpAddiByte 6007: 6008: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6009: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 6010: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 6011: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6012: //ADDI.W #<data>,<ea> |-|012346|-|UUUUU|*****|D M+-WXZ |0000_011_001_mmm_rrr-{data} 6013: public static void irpAddiWord () throws M68kException { 6014: int ea = XEiJ.regOC & 63; 6015: int x; 6016: int y = mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); //pcws 6017: int z; 6018: if (ea < XEiJ.EA_AR) { //ADDI.W #<data>,Dr 6019: XEiJ.mpuCycleCount++; 6020: z = (short) (XEiJ.regRn[ea] = ~0xffff & (x = XEiJ.regRn[ea]) | (char) ((x = (short) x) + y)); 6021: } else { //ADDI.W #<data>,<mem> 6022: XEiJ.mpuCycleCount++; 6023: int a = efaMltWord (ea); 6024: mmuWriteWordData (a, z = (short) ((x = mmuModifyWordSignData (a, XEiJ.regSRS)) + y), XEiJ.regSRS); 6025: } 6026: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | 6027: ((x ^ z) & (y ^ z)) >>> 31 << 1 | 6028: ((x | y) ^ (x ^ y) & z) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_add 6029: } //irpAddiWord 6030: 6031: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6032: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 6033: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 6034: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6035: //ADDI.L #<data>,<ea> |-|012346|-|UUUUU|*****|D M+-WXZ |0000_011_010_mmm_rrr-{data} 6036: public static void irpAddiLong () throws M68kException { 6037: int ea = XEiJ.regOC & 63; 6038: int x; 6039: int y = mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS); //pcls 6040: int z; 6041: if (ea < XEiJ.EA_AR) { //ADDI.L #<data>,Dr 6042: XEiJ.mpuCycleCount++; 6043: XEiJ.regRn[ea] = z = (x = XEiJ.regRn[ea]) + y; 6044: } else { //ADDI.L #<data>,<mem> 6045: XEiJ.mpuCycleCount++; 6046: int a = efaMltLong (ea); 6047: mmuWriteLongData (a, z = (x = mmuModifyLongData (a, XEiJ.regSRS)) + y, XEiJ.regSRS); 6048: } 6049: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | 6050: ((x ^ z) & (y ^ z)) >>> 31 << 1 | 6051: ((x | y) ^ (x ^ y) & z) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_add 6052: } //irpAddiLong 6053: 6054: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6055: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 6056: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 6057: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6058: //BTST.L #<data>,Dr |-|012346|-|--U--|--*--|D |0000_100_000_000_rrr-{data} 6059: //BTST.B #<data>,<ea> |-|012346|-|--U--|--*--| M+-WXZP |0000_100_000_mmm_rrr-{data} 6060: public static void irpBtstImm () throws M68kException { 6061: int ea = XEiJ.regOC & 63; 6062: int y = mmuReadByteSignExword ((XEiJ.regPC += 2) - 1, XEiJ.regSRS); //pcbs 6063: if (ea < XEiJ.EA_AR) { //BTST.L #<data>,Dr 6064: XEiJ.mpuCycleCount++; 6065: XEiJ.regCCR = XEiJ.regCCR & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_N | XEiJ.REG_CCR_V | XEiJ.REG_CCR_C) | (~XEiJ.regRn[ea] >>> y & 1) << 2; //ccr_btst。intのシフトは5bitでマスクされるので&31を省略 6066: } else { //BTST.B #<data>,<ea> 6067: XEiJ.mpuCycleCount++; 6068: XEiJ.regCCR = XEiJ.regCCR & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_N | XEiJ.REG_CCR_V | XEiJ.REG_CCR_C) | (~mmuReadByteSignData (efaMemByte (ea), XEiJ.regSRS) >>> (y & 7) & 1) << 2; //ccr_btst 6069: } 6070: } //irpBtstImm 6071: 6072: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6073: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 6074: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 6075: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6076: //BCHG.L #<data>,Dr |-|012346|-|--U--|--*--|D |0000_100_001_000_rrr-{data} 6077: //BCHG.B #<data>,<ea> |-|012346|-|--U--|--*--| M+-WXZ |0000_100_001_mmm_rrr-{data} 6078: public static void irpBchgImm () throws M68kException { 6079: int ea = XEiJ.regOC & 63; 6080: int x; 6081: int y = mmuReadByteSignExword ((XEiJ.regPC += 2) - 1, XEiJ.regSRS); //pcbs 6082: if (ea < XEiJ.EA_AR) { //BCHG.L #<data>,Dr 6083: XEiJ.mpuCycleCount++; 6084: XEiJ.regRn[ea] = (x = XEiJ.regRn[ea]) ^ (y = 1 << y); //intのシフトは5bitでマスクされるので1<<(y&0x1f)の&0x1fを省略 6085: } else { //BCHG.B #<data>,<ea> 6086: XEiJ.mpuCycleCount++; 6087: int a = efaMltByte (ea); 6088: mmuWriteByteData (a, (x = mmuModifyByteSignData (a, XEiJ.regSRS)) ^ (y = 1 << (y & 7)), XEiJ.regSRS); 6089: } 6090: XEiJ.regCCR = XEiJ.regCCR & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_N | XEiJ.REG_CCR_V | XEiJ.REG_CCR_C) | (x & y) - 1 >>> 31 << 2; //ccr_btst 6091: } //irpBchgImm 6092: 6093: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6094: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 6095: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 6096: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6097: //BCLR.L #<data>,Dr |-|012346|-|--U--|--*--|D |0000_100_010_000_rrr-{data} 6098: //BCLR.B #<data>,<ea> |-|012346|-|--U--|--*--| M+-WXZ |0000_100_010_mmm_rrr-{data} 6099: public static void irpBclrImm () throws M68kException { 6100: int ea = XEiJ.regOC & 63; 6101: int x; 6102: int y = mmuReadByteSignExword ((XEiJ.regPC += 2) - 1, XEiJ.regSRS); //pcbs 6103: if (ea < XEiJ.EA_AR) { //BCLR.L #<data>,Dr 6104: XEiJ.mpuCycleCount++; 6105: XEiJ.regRn[ea] = (x = XEiJ.regRn[ea]) & ~(y = 1 << y); //intのシフトは5bitでマスクされるので1<<(y&0x1f)の&0x1fを省略 6106: } else { //BCLR.B #<data>,<ea> 6107: XEiJ.mpuCycleCount++; 6108: int a = efaMltByte (ea); 6109: mmuWriteByteData (a, (x = mmuModifyByteSignData (a, XEiJ.regSRS)) & ~(y = 1 << (y & 7)), XEiJ.regSRS); 6110: } 6111: XEiJ.regCCR = XEiJ.regCCR & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_N | XEiJ.REG_CCR_V | XEiJ.REG_CCR_C) | (x & y) - 1 >>> 31 << 2; //ccr_btst 6112: } //irpBclrImm 6113: 6114: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6115: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 6116: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 6117: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6118: //BSET.L #<data>,Dr |-|012346|-|--U--|--*--|D |0000_100_011_000_rrr-{data} 6119: //BSET.B #<data>,<ea> |-|012346|-|--U--|--*--| M+-WXZ |0000_100_011_mmm_rrr-{data} 6120: public static void irpBsetImm () throws M68kException { 6121: int ea = XEiJ.regOC & 63; 6122: int x; 6123: int y = mmuReadByteSignExword ((XEiJ.regPC += 2) - 1, XEiJ.regSRS); //pcbs 6124: if (ea < XEiJ.EA_AR) { //BSET.L #<data>,Dr 6125: XEiJ.mpuCycleCount++; 6126: XEiJ.regRn[ea] = (x = XEiJ.regRn[ea]) | (y = 1 << y); //intのシフトは5bitでマスクされるので1<<(y&0x1f)の&0x1fを省略 6127: } else { //BSET.B #<data>,<ea> 6128: XEiJ.mpuCycleCount++; 6129: int a = efaMltByte (ea); 6130: mmuWriteByteData (a, (x = mmuModifyByteSignData (a, XEiJ.regSRS)) | (y = 1 << (y & 7)), XEiJ.regSRS); 6131: } 6132: XEiJ.regCCR = XEiJ.regCCR & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_N | XEiJ.REG_CCR_V | XEiJ.REG_CCR_C) | (x & y) - 1 >>> 31 << 2; //ccr_btst 6133: } //irpBsetImm 6134: 6135: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6136: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 6137: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 6138: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6139: //EORI.B #<data>,<ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |0000_101_000_mmm_rrr-{data} 6140: //EOR.B #<data>,<ea> |A|012346|-|-UUUU|-**00|D M+-WXZ |0000_101_000_mmm_rrr-{data} [EORI.B #<data>,<ea>] 6141: //EORI.B #<data>,CCR |-|012346|-|*****|*****| |0000_101_000_111_100-{data} 6142: public static void irpEoriByte () throws M68kException { 6143: int ea = XEiJ.regOC & 63; 6144: int z = mmuReadByteSignExword ((XEiJ.regPC += 2) - 1, XEiJ.regSRS); //pcbs 6145: if (ea < XEiJ.EA_AR) { //EORI.B #<data>,Dr 6146: XEiJ.mpuCycleCount++; 6147: z = XEiJ.regRn[ea] ^= 255 & z; //0拡張してからEOR 6148: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & z]; //ccr_tst_byte 6149: } else if (ea == XEiJ.EA_IM) { //EORI.B #<data>,CCR 6150: XEiJ.mpuCycleCount++; 6151: XEiJ.regCCR ^= XEiJ.REG_CCR_MASK & z; 6152: } else { //EORI.B #<data>,<mem> 6153: XEiJ.mpuCycleCount++; 6154: int a = efaMltByte (ea); 6155: mmuWriteByteData (a, z ^= mmuModifyByteSignData (a, XEiJ.regSRS), XEiJ.regSRS); 6156: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & z]; //ccr_tst_byte 6157: } 6158: } //irpEoriByte 6159: 6160: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6161: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 6162: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 6163: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6164: //EORI.W #<data>,<ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |0000_101_001_mmm_rrr-{data} 6165: //EOR.W #<data>,<ea> |A|012346|-|-UUUU|-**00|D M+-WXZ |0000_101_001_mmm_rrr-{data} [EORI.W #<data>,<ea>] 6166: //EORI.W #<data>,SR |-|012346|P|*****|*****| |0000_101_001_111_100-{data} 6167: public static void irpEoriWord () throws M68kException { 6168: int ea = XEiJ.regOC & 63; 6169: if (ea < XEiJ.EA_AR) { //EORI.W #<data>,Dr 6170: int z = mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); //pcws 6171: XEiJ.mpuCycleCount++; 6172: z = XEiJ.regRn[ea] ^= (char) z; //0拡張してからEOR 6173: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (char) z - 1 >> 31 & XEiJ.REG_CCR_Z | ((short) z < 0 ? XEiJ.REG_CCR_N : 0); //ccr_tst_word 6174: } else if (ea == XEiJ.EA_IM) { //EORI.W #<data>,SR 6175: if (XEiJ.regSRS == 0) { //ユーザモードのとき 6176: M68kException.m6eNumber = M68kException.M6E_PRIVILEGE_VIOLATION; 6177: throw M68kException.m6eSignal; 6178: } 6179: //以下はスーパーバイザモード 6180: XEiJ.mpuCycleCount += 12; 6181: irpSetSR ((XEiJ.regSRT1 | XEiJ.regSRS | XEiJ.regSRM | XEiJ.regSRI | XEiJ.regCCR) ^ mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, 1)); //pcws。特権違反チェックが先 6182: } else { //EORI.W #<data>,<mem> 6183: int z = mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); //pcws 6184: XEiJ.mpuCycleCount++; 6185: int a = efaMltWord (ea); 6186: mmuWriteWordData (a, z ^= mmuModifyWordSignData (a, XEiJ.regSRS), XEiJ.regSRS); 6187: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (char) z - 1 >> 31 & XEiJ.REG_CCR_Z | ((short) z < 0 ? XEiJ.REG_CCR_N : 0); //ccr_tst_word 6188: } 6189: } //irpEoriWord 6190: 6191: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6192: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 6193: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 6194: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6195: //EORI.L #<data>,<ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |0000_101_010_mmm_rrr-{data} 6196: //EOR.L #<data>,<ea> |A|012346|-|-UUUU|-**00|D M+-WXZ |0000_101_010_mmm_rrr-{data} [EORI.L #<data>,<ea>] 6197: public static void irpEoriLong () throws M68kException { 6198: int ea = XEiJ.regOC & 63; 6199: int y = mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS); //pcls 6200: int z; 6201: if (ea < XEiJ.EA_AR) { //EORI.L #<data>,Dr 6202: XEiJ.mpuCycleCount++; 6203: z = XEiJ.regRn[ea] ^= y; 6204: } else { //EORI.L #<data>,<mem> 6205: XEiJ.mpuCycleCount++; 6206: int a = efaMltLong (ea); 6207: mmuWriteLongData (a, z = mmuModifyLongData (a, XEiJ.regSRS) ^ y, XEiJ.regSRS); 6208: } 6209: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 6210: } //irpEoriLong 6211: 6212: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6213: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 6214: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 6215: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6216: //CAS.B Dc,Du,<ea> |-|--2346|-|-UUUU|-****| M+-WXZ |0000_101_011_mmm_rrr-0000000uuu000ccc 6217: public static void irpCasByte () throws M68kException { 6218: int w = mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); //pcwz。拡張ワード 6219: if ((w & ~0b0000_000_111_000_111) != 0) { 6220: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 6221: throw M68kException.m6eSignal; 6222: } 6223: int c = w & 7; 6224: int y = (byte) XEiJ.regRn[c]; //y=Dc 6225: int a = efaMltByte (XEiJ.regOC & 63); 6226: int x = mmuReadByteSignData (a, XEiJ.regSRS); //x=<ea> 6227: int z = (byte) (x - y); //z=<ea>-Dc 6228: XEiJ.regCCR = (XEiJ.regCCR & XEiJ.REG_CCR_X | 6229: (z < 0 ? XEiJ.REG_CCR_N : 0) | 6230: (z == 0 ? XEiJ.REG_CCR_Z : 0) | 6231: ((x ^ y) & (x ^ z)) >>> 31 << 1 | 6232: (x & (y ^ z) ^ (y | z)) >>> 31); //ccr_cmp 6233: if (z == 0) { //<ea>==Dc 6234: XEiJ.mpuCycleCount += 19; 6235: mmuWriteByteData (a, XEiJ.regRn[w >> 6], XEiJ.regSRS); //Du→<ea> 6236: } else { //<ea>!=Dc 6237: XEiJ.mpuCycleCount += 19; 6238: XEiJ.regRn[c] = ~0xff & XEiJ.regRn[c] | 0xff & x; //<ea>→Dc 6239: } 6240: } //irpCasByte 6241: 6242: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6243: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 6244: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 6245: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6246: //CMPI.B #<data>,<ea> |-|--2346|-|-UUUU|-****|D M+-WXZP |0000_110_000_mmm_rrr-{data} 6247: //CMP.B #<data>,<ea> |A|--2346|-|-UUUU|-****| M+-WXZP |0000_110_000_mmm_rrr-{data} [CMPI.B #<data>,<ea>] 6248: public static void irpCmpiByte () throws M68kException { 6249: XEiJ.mpuCycleCount++; 6250: int ea = XEiJ.regOC & 63; 6251: int x; 6252: int y = mmuReadByteSignExword ((XEiJ.regPC += 2) - 1, XEiJ.regSRS); //pcbs 6253: int z = (byte) ((x = ea < XEiJ.EA_AR ? (byte) XEiJ.regRn[ea] : mmuReadByteSignData (efaMemByte (ea), XEiJ.regSRS)) - y); //アドレッシングモードに注意 6254: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | 6255: ((x ^ y) & (x ^ z)) >>> 31 << 1 | 6256: (x & (y ^ z) ^ (y | z)) >>> 31); //ccr_cmp 6257: } //irpCmpiByte 6258: 6259: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6260: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 6261: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 6262: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6263: //CMPI.W #<data>,<ea> |-|--2346|-|-UUUU|-****|D M+-WXZP |0000_110_001_mmm_rrr-{data} 6264: //CMP.W #<data>,<ea> |A|--2346|-|-UUUU|-****| M+-WXZP |0000_110_001_mmm_rrr-{data} [CMPI.W #<data>,<ea>] 6265: public static void irpCmpiWord () throws M68kException { 6266: XEiJ.mpuCycleCount++; 6267: int ea = XEiJ.regOC & 63; 6268: int x; 6269: int y = mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); //pcws 6270: int z = (short) ((x = ea < XEiJ.EA_AR ? (short) XEiJ.regRn[ea] : mmuReadWordSignData (efaMemWord (ea), XEiJ.regSRS)) - y); //アドレッシングモードに注意 6271: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | 6272: ((x ^ y) & (x ^ z)) >>> 31 << 1 | 6273: (x & (y ^ z) ^ (y | z)) >>> 31); //ccr_cmp 6274: } //irpCmpiWord 6275: 6276: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6277: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 6278: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 6279: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6280: //CMPI.L #<data>,<ea> |-|--2346|-|-UUUU|-****|D M+-WXZP |0000_110_010_mmm_rrr-{data} 6281: //CMP.L #<data>,<ea> |A|--2346|-|-UUUU|-****| M+-WXZP |0000_110_010_mmm_rrr-{data} [CMPI.L #<data>,<ea>] 6282: public static void irpCmpiLong () throws M68kException { 6283: int ea = XEiJ.regOC & 63; 6284: int x; 6285: int y = mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS); //pcls 6286: int z; 6287: if (ea < XEiJ.EA_AR) { //CMPI.L #<data>,Dr 6288: XEiJ.mpuCycleCount++; 6289: z = (x = XEiJ.regRn[ea]) - y; 6290: } else { //CMPI.L #<data>,<mem> 6291: XEiJ.mpuCycleCount++; 6292: z = (x = mmuReadLongData (efaMemLong (ea), XEiJ.regSRS)) - y; //アドレッシングモードに注意 6293: } 6294: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | 6295: ((x ^ y) & (x ^ z)) >>> 31 << 1 | 6296: (x & (y ^ z) ^ (y | z)) >>> 31); //ccr_cmp 6297: } //irpCmpiLong 6298: 6299: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6300: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 6301: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 6302: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6303: //CAS.W Dc,Du,<ea> |-|--2346|-|-UUUU|-****| M+-WXZ |0000_110_011_mmm_rrr-0000000uuu000ccc (68060 software emulate misaligned <ea>) 6304: //CAS2.W Dc1:Dc2,Du1:Du2,(Rn1):(Rn2) |-|--234S|-|-UUUU|-****| |0000_110_011_111_100-rnnn000uuu000ccc(1)-rnnn_000_uuu_000_ccc(2) 6305: public static void irpCasWord () throws M68kException { 6306: int ea = XEiJ.regOC & 63; 6307: if (ea == XEiJ.EA_IM) { //CAS2.W Dc1:Dc2,Du1:Du2,(Rn1):(Rn2) 6308: M68kException.m6eNumber = M68kException.M6E_UNIMPLEMENTED_INSTRUCTION; 6309: throw M68kException.m6eSignal; 6310: } else { //CAS.W Dc,Du,<ea> 6311: int w = mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); //pcwz 6312: if ((w & ~0b0000_000_111_000_111) != 0) { 6313: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 6314: throw M68kException.m6eSignal; 6315: } 6316: int a = efaMltWord (ea); //a=ea 6317: if ((a & 1) != 0) { //misaligned <ea> 6318: M68kException.m6eNumber = M68kException.M6E_UNIMPLEMENTED_INSTRUCTION; 6319: throw M68kException.m6eSignal; 6320: } 6321: int c = w & 7; 6322: int y = (short) XEiJ.regRn[c]; //y=Dc 6323: int x = mmuReadWordSignData (a, XEiJ.regSRS); //x=<ea> 6324: int z = (short) (x - y); //z=<ea>-Dc 6325: XEiJ.regCCR = (XEiJ.regCCR & XEiJ.REG_CCR_X | 6326: (z < 0 ? XEiJ.REG_CCR_N : 0) | 6327: (z == 0 ? XEiJ.REG_CCR_Z : 0) | 6328: ((x ^ y) & (x ^ z)) >>> 31 << 1 | 6329: (x & (y ^ z) ^ (y | z)) >>> 31); //ccr_cmp 6330: if (z == 0) { //<ea>==Dc 6331: XEiJ.mpuCycleCount += 19; 6332: mmuWriteWordData (a, XEiJ.regRn[w >> 6], XEiJ.regSRS); //Du→<ea> 6333: } else { //<ea>!=Dc 6334: XEiJ.mpuCycleCount += 19; 6335: XEiJ.regRn[c] = ~0xffff & XEiJ.regRn[c] | (char) x; //<ea>→Dc 6336: } 6337: } 6338: } //irpCasWord 6339: 6340: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6341: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 6342: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 6343: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6344: //MOVES.B <ea>,Rn |-|-12346|P|-----|-----| M+-WXZ |0000_111_000_mmm_rrr-rnnn000000000000 6345: //MOVES.B Rn,<ea> |-|-12346|P|-----|-----| M+-WXZ |0000_111_000_mmm_rrr-rnnn100000000000 6346: // 6347: //MOVES.B <ea>,Rn 6348: // MOVES.B <ea>,DnはDnの最下位バイトだけ更新する 6349: // MOVES.B <ea>,Anはバイトデータをロングに符号拡張してAnの全体を更新する 6350: // SFC=1,2,5,6はアドレス変換あり、SFC=0,3,4はアドレス変換なし、 6351: // SFC=7はCPU空間なのでコプロセッサが割り当てられている領域以外はバスエラーになる 6352: // 6353: //MOVES.B Rn,<ea> 6354: // DFC=1,2,5,6はアドレス変換あり、DFC=0,3,4はアドレス変換なし、 6355: // DFC=7はCPU空間なのでコプロセッサが割り当てられている領域以外はバスエラーになる 6356: public static void irpMovesByte () throws M68kException { 6357: int w = mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); //pcwz 6358: if (w << -11 != 0) { 6359: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 6360: throw M68kException.m6eSignal; 6361: } 6362: if (XEiJ.regSRS == 0) { //ユーザモードのとき 6363: M68kException.m6eNumber = M68kException.M6E_PRIVILEGE_VIOLATION; 6364: throw M68kException.m6eSignal; 6365: } 6366: //以下はスーパーバイザモード 6367: XEiJ.mpuCycleCount++; 6368: int a = efaMltByte (XEiJ.regOC & 63); 6369: int n = w >>> 12; //n 6370: if (w << 31 - 11 >= 0) { //MOVES.B <ea>,Rn。リード 6371: boolean supervisor = (0b10011111 << 24 << XEiJ.mpuSFC) < 0; 6372: boolean instruction = (0b00101010 << 24 << XEiJ.mpuSFC) < 0; 6373: MemoryMappedDevice[] mm = (DataBreakPoint.DBP_ON ? 6374: supervisor ? DataBreakPoint.dbpSuperMap : DataBreakPoint.dbpUserMap : 6375: supervisor ? XEiJ.busSuperMap : XEiJ.busUserMap); 6376: int z; 6377: // 01234567 6378: if (0b01100110 << 24 << XEiJ.mpuSFC < 0) { //SFC=1,2,5,6。アドレス変換あり 6379: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_READ | M60_FSLW_SIZE_BYTE | XEiJ.mpuSFC << 16; 6380: int pa = (supervisor ? 6381: instruction ? mmuTranslateReadSuperCode (a) : mmuTranslateReadSuperData (a) : 6382: instruction ? mmuTranslateReadUserCode (a) : mmuTranslateReadUserData (a)); 6383: //z = XEiJ.busRbz (pa); 6384: z = mm[pa >>> XEiJ.BUS_PAGE_BITS].mmdRbz (pa); 6385: } else if (XEiJ.mpuSFC != 7) { //SFC=0,3,4。アドレス変換なし 6386: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_READ | M60_FSLW_SIZE_BYTE | XEiJ.mpuSFC << 16; 6387: //z = XEiJ.busRbz (a); 6388: z = mm[a >>> XEiJ.BUS_PAGE_BITS].mmdRbz (a); 6389: } else { //SFC=7。CPU空間 6390: if (0x00022000 <= a && a <= 0x0002201f) { //コプロセッサID=1 6391: z = XEiJ.fpuMotherboardCoprocessor.cirReadByteZero (a); 6392: } else { 6393: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_READ | M60_FSLW_SIZE_BYTE | XEiJ.mpuSFC << 16 | M60_FSLW_BUS_ERROR_ON_READ; 6394: M68kException.m6eNumber = M68kException.M6E_ACCESS_FAULT; 6395: M68kException.m6eAddress = a; 6396: M68kException.m6eDirection = XEiJ.MPU_WR_READ; 6397: M68kException.m6eSize = XEiJ.MPU_SS_BYTE; 6398: throw M68kException.m6eSignal; 6399: } 6400: } 6401: if (n < 8) { //MOVES.B <ea>,Dn 6402: XEiJ.regRn[n] = XEiJ.regRn[n] & ~255 | z; 6403: } else { //MOVES.B <ea>,An 6404: XEiJ.regRn[n] = (byte) z; 6405: } 6406: if (MMU_DEBUG_COMMAND) { 6407: System.out.printf ("%08x movesReadByte(%d,0x%08x)=0x%02x\n", XEiJ.regPC0, XEiJ.mpuSFC, a, XEiJ.regRn[n] & 255); 6408: } 6409: } else { //MOVES.B Rn,<ea>。ライト 6410: if (MMU_DEBUG_COMMAND) { 6411: System.out.printf ("%08x movesWriteByte(%d,0x%08x,0x%02x)\n", XEiJ.regPC0, XEiJ.mpuDFC, a, XEiJ.regRn[n] & 255); 6412: } 6413: boolean supervisor = (0b10011111 << 24 << XEiJ.mpuDFC) < 0; 6414: boolean instruction = (0b00101010 << 24 << XEiJ.mpuDFC) < 0; 6415: MemoryMappedDevice mm[] = (DataBreakPoint.DBP_ON ? 6416: supervisor ? DataBreakPoint.dbpSuperMap : DataBreakPoint.dbpUserMap : 6417: supervisor ? XEiJ.busSuperMap : XEiJ.busUserMap); 6418: int z = XEiJ.regRn[n]; 6419: // 01234567 6420: if (0b01100110 << 24 << XEiJ.mpuDFC < 0) { //DFC=1,2,5,6。アドレス変換あり 6421: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_BYTE | XEiJ.mpuDFC << 16; 6422: int pa = (supervisor ? 6423: instruction ? mmuTranslateWriteSuperCode (a) : mmuTranslateWriteSuperData (a) : 6424: instruction ? mmuTranslateWriteUserCode (a) : mmuTranslateWriteUserData (a)); 6425: //XEiJ.busWb (pa, z); 6426: mm[pa >>> XEiJ.BUS_PAGE_BITS].mmdWb (pa, z); 6427: } else if (XEiJ.mpuDFC != 7) { //DFC=0,3,4。アドレス変換なし 6428: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_BYTE | XEiJ.mpuDFC << 16; 6429: //XEiJ.busWb (a, z); 6430: mm[a >>> XEiJ.BUS_PAGE_BITS].mmdWb (a, z); 6431: } else { //DFC=7。CPU空間 6432: if (0x00022000 <= a && a <= 0x0002201f) { //コプロセッサID=1 6433: XEiJ.fpuMotherboardCoprocessor.cirWriteByte (a, z); 6434: } else { 6435: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_BYTE | XEiJ.mpuDFC << 16 | M60_FSLW_BUS_ERROR_ON_WRITE; 6436: M68kException.m6eNumber = M68kException.M6E_ACCESS_FAULT; 6437: M68kException.m6eAddress = a; 6438: M68kException.m6eDirection = XEiJ.MPU_WR_WRITE; 6439: M68kException.m6eSize = XEiJ.MPU_SS_BYTE; 6440: throw M68kException.m6eSignal; 6441: } 6442: } 6443: } 6444: } //irpMovesByte 6445: 6446: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6447: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 6448: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 6449: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6450: //MOVES.W <ea>,Rn |-|-12346|P|-----|-----| M+-WXZ |0000_111_001_mmm_rrr-rnnn000000000000 6451: //MOVES.W Rn,<ea> |-|-12346|P|-----|-----| M+-WXZ |0000_111_001_mmm_rrr-rnnn100000000000 6452: // 6453: //MOVES.W <ea>,Rn 6454: // MOVES.W <ea>,DnはDnの下位ワードだけ更新する 6455: // MOVES.W <ea>,Anはワードデータをロングに符号拡張してAnの全体を更新する 6456: // SFC=1,2,5,6はアドレス変換あり、SFC=0,3,4はアドレス変換なし、 6457: // SFC=7はCPU空間なのでコプロセッサが割り当てられている領域以外はバスエラーになる 6458: // 6459: //MOVES.W Rn,<ea> 6460: // DFC=1,2,5,6はアドレス変換あり、DFC=0,3,4はアドレス変換なし、 6461: // DFC=7はCPU空間なのでコプロセッサが割り当てられている領域以外はバスエラーになる 6462: public static void irpMovesWord () throws M68kException { 6463: int w = mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); //pcwz 6464: if (w << -11 != 0) { 6465: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 6466: throw M68kException.m6eSignal; 6467: } 6468: if (XEiJ.regSRS == 0) { //ユーザモードのとき 6469: M68kException.m6eNumber = M68kException.M6E_PRIVILEGE_VIOLATION; 6470: throw M68kException.m6eSignal; 6471: } 6472: //以下はスーパーバイザモード 6473: XEiJ.mpuCycleCount++; 6474: int a = efaMltWord (XEiJ.regOC & 63); 6475: int n = w >>> 12; //n 6476: if (w << 31 - 11 >= 0) { //MOVES.W <ea>,Rn。リード 6477: boolean supervisor = (0b10011111 << 24 << XEiJ.mpuSFC) < 0; 6478: boolean instruction = (0b00101010 << 24 << XEiJ.mpuSFC) < 0; 6479: MemoryMappedDevice[] mm = (DataBreakPoint.DBP_ON ? 6480: supervisor ? DataBreakPoint.dbpSuperMap : DataBreakPoint.dbpUserMap : 6481: supervisor ? XEiJ.busSuperMap : XEiJ.busUserMap); 6482: int z; 6483: // 01234567 6484: if (0b01100110 << 24 << XEiJ.mpuSFC < 0) { //SFC=1,2,5,6。アドレス変換あり 6485: if ((a & 1) == 0) { //偶数 6486: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_READ | M60_FSLW_SIZE_WORD | XEiJ.mpuSFC << 16; 6487: int pa = (supervisor ? 6488: instruction ? mmuTranslateReadSuperCode (a) : mmuTranslateReadSuperData (a) : 6489: instruction ? mmuTranslateReadUserCode (a) : mmuTranslateReadUserData (a)); 6490: //z = XEiJ.busRwze (pa); 6491: z = mm[pa >>> XEiJ.BUS_PAGE_BITS].mmdRwz (pa); 6492: } else { //奇数 6493: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_READ | M60_FSLW_SIZE_WORD | XEiJ.mpuSFC << 16; 6494: int pa = (supervisor ? 6495: instruction ? mmuTranslateReadSuperCode (a) : mmuTranslateReadSuperData (a) : 6496: instruction ? mmuTranslateReadUserCode (a) : mmuTranslateReadUserData (a)); 6497: //z = XEiJ.busRbz (pa) << 8; 6498: z = mm[pa >>> XEiJ.BUS_PAGE_BITS].mmdRbz (pa) << 8; 6499: m60FSLW ^= M60_FSLW_IOMA_FIRST ^ M60_FSLW_IOMA_SECOND; 6500: pa = (supervisor ? 6501: instruction ? mmuTranslateReadSuperCode (a + 1) : mmuTranslateReadSuperData (a + 1) : 6502: instruction ? mmuTranslateReadUserCode (a + 1) : mmuTranslateReadUserData (a + 1)); 6503: //z |= XEiJ.busRbz (pa); 6504: z |= mm[pa >>> XEiJ.BUS_PAGE_BITS].mmdRbz (pa); 6505: } 6506: } else if (XEiJ.mpuSFC != 7) { //SFC=0,3,4。アドレス変換なし 6507: if ((a & 1) == 0) { //偶数 6508: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_READ | M60_FSLW_SIZE_WORD | XEiJ.mpuSFC << 16; 6509: //z = XEiJ.busRwze (a); 6510: z = mm[a >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a); 6511: } else { //奇数 6512: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_READ | M60_FSLW_SIZE_WORD | XEiJ.mpuSFC << 16; 6513: //z = XEiJ.busRbz (a) << 8; 6514: z = mm[a >>> XEiJ.BUS_PAGE_BITS].mmdRbz (a) << 8; 6515: m60FSLW ^= M60_FSLW_IOMA_FIRST ^ M60_FSLW_IOMA_SECOND; 6516: a++; 6517: //z |= XEiJ.busRbz (a); 6518: z |= mm[a >>> XEiJ.BUS_PAGE_BITS].mmdRbz (a); 6519: } 6520: } else { //SFC=7。CPU空間 6521: if (0x00022000 <= a && a <= 0x0002201f) { //コプロセッサID=1 6522: z = XEiJ.fpuMotherboardCoprocessor.cirReadWordZero (a); 6523: } else { 6524: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_READ | M60_FSLW_SIZE_WORD | XEiJ.mpuSFC << 16 | M60_FSLW_BUS_ERROR_ON_READ; 6525: M68kException.m6eNumber = M68kException.M6E_ACCESS_FAULT; 6526: M68kException.m6eAddress = a; 6527: M68kException.m6eDirection = XEiJ.MPU_WR_READ; 6528: M68kException.m6eSize = XEiJ.MPU_SS_WORD; 6529: throw M68kException.m6eSignal; 6530: } 6531: } 6532: if (n < 8) { //MOVES.W <ea>,Dn 6533: XEiJ.regRn[n] = XEiJ.regRn[n] & ~65535 | z; 6534: } else { //MOVES.W <ea>,An 6535: XEiJ.regRn[n] = (short) z; 6536: } 6537: if (MMU_DEBUG_COMMAND) { 6538: System.out.printf ("%08x movesReadWord(%d,0x%08x)=0x%04x\n", XEiJ.regPC0, XEiJ.mpuSFC, a, XEiJ.regRn[n] & 65535); 6539: } 6540: } else { //MOVES.W Rn,<ea>。ライト 6541: if (MMU_DEBUG_COMMAND) { 6542: System.out.printf ("%08x movesWriteWord(%d,0x%08x,0x%04x)\n", XEiJ.regPC0, XEiJ.mpuDFC, a, XEiJ.regRn[n] & 65535); 6543: } 6544: boolean supervisor = (0b10011111 << 24 << XEiJ.mpuDFC) < 0; 6545: boolean instruction = (0b00101010 << 24 << XEiJ.mpuDFC) < 0; 6546: MemoryMappedDevice[] mm = (DataBreakPoint.DBP_ON ? 6547: supervisor ? DataBreakPoint.dbpSuperMap : DataBreakPoint.dbpUserMap : 6548: supervisor ? XEiJ.busSuperMap : XEiJ.busUserMap); 6549: int z = XEiJ.regRn[n]; 6550: // 01234567 6551: if (0b01100110 << 24 << XEiJ.mpuDFC < 0) { //DFC=1,2,5,6。アドレス変換あり 6552: if ((a & 1) == 0) { //偶数 6553: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_WORD | XEiJ.mpuDFC << 16; 6554: int pa = (supervisor ? 6555: instruction ? mmuTranslateWriteSuperCode (a) : mmuTranslateWriteSuperData (a) : 6556: instruction ? mmuTranslateWriteUserCode (a) : mmuTranslateWriteUserData (a)); 6557: //XEiJ.busWwe (pa, z); 6558: mm[pa >>> XEiJ.BUS_PAGE_BITS].mmdWw (pa, z); 6559: } else { //奇数 6560: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_WORD | XEiJ.mpuDFC << 16; 6561: int pa = (supervisor ? 6562: instruction ? mmuTranslateWriteSuperCode (a) : mmuTranslateWriteSuperData (a) : 6563: instruction ? mmuTranslateWriteUserCode (a) : mmuTranslateWriteUserData (a)); 6564: //XEiJ.busWb (pa, z >> 8); 6565: mm[pa >>> XEiJ.BUS_PAGE_BITS].mmdWb (pa, z >> 8); 6566: m60FSLW ^= M60_FSLW_IOMA_FIRST ^ M60_FSLW_IOMA_SECOND; 6567: pa = (supervisor ? 6568: instruction ? mmuTranslateWriteSuperCode (a + 1) : mmuTranslateWriteSuperData (a + 1) : 6569: instruction ? mmuTranslateWriteUserCode (a + 1) : mmuTranslateWriteUserData (a + 1)); 6570: //XEiJ.busWb (pa, z); 6571: mm[pa >>> XEiJ.BUS_PAGE_BITS].mmdWb (pa, z); 6572: } 6573: } else if (XEiJ.mpuDFC != 7) { //DFC=0,3,4。アドレス変換なし 6574: if ((a & 1) == 0) { //偶数 6575: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_WORD | XEiJ.mpuDFC << 16; 6576: //XEiJ.busWwe (a, z); 6577: mm[a >>> XEiJ.BUS_PAGE_BITS].mmdWw (a, z); 6578: } else { //奇数 6579: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_WORD | XEiJ.mpuDFC << 16; 6580: //XEiJ.busWb (a, z >> 8); 6581: mm[a >>> XEiJ.BUS_PAGE_BITS].mmdWb (a, z >> 8); 6582: m60FSLW ^= M60_FSLW_IOMA_FIRST ^ M60_FSLW_IOMA_SECOND; 6583: a++; 6584: //XEiJ.busWb (a, z); 6585: mm[a >>> XEiJ.BUS_PAGE_BITS].mmdWb (a, z); 6586: } 6587: } else { //DFC=7。CPU空間 6588: if (0x00022000 <= a && a <= 0x0002201f) { //コプロセッサID=1 6589: XEiJ.fpuMotherboardCoprocessor.cirWriteWord (a, z); 6590: } else { 6591: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_WORD | XEiJ.mpuDFC << 16 | M60_FSLW_BUS_ERROR_ON_WRITE; 6592: M68kException.m6eNumber = M68kException.M6E_ACCESS_FAULT; 6593: M68kException.m6eAddress = a; 6594: M68kException.m6eDirection = XEiJ.MPU_WR_WRITE; 6595: M68kException.m6eSize = XEiJ.MPU_SS_WORD; 6596: throw M68kException.m6eSignal; 6597: } 6598: } 6599: } 6600: } //irpMovesWord 6601: 6602: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6603: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 6604: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 6605: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6606: //MOVES.L <ea>,Rn |-|-12346|P|-----|-----| M+-WXZ |0000_111_010_mmm_rrr-rnnn000000000000 6607: //MOVES.L Rn,<ea> |-|-12346|P|-----|-----| M+-WXZ |0000_111_010_mmm_rrr-rnnn100000000000 6608: // 6609: //MOVES.L <ea>,Rn 6610: // SFC=1,2,5,6はアドレス変換あり、SFC=0,3,4はアドレス変換なし、 6611: // SFC=7はCPU空間なのでコプロセッサが割り当てられている領域以外はバスエラーになる 6612: // 6613: //MOVES.L Rn,<ea> 6614: // DFC=1,2,5,6はアドレス変換あり、DFC=0,3,4はアドレス変換なし、 6615: // DFC=7はCPU空間なのでコプロセッサが割り当てられている領域以外はバスエラーになる 6616: public static void irpMovesLong () throws M68kException { 6617: int w = mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); //pcwz 6618: if (w << -11 != 0) { 6619: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 6620: throw M68kException.m6eSignal; 6621: } 6622: if (XEiJ.regSRS == 0) { //ユーザモードのとき 6623: M68kException.m6eNumber = M68kException.M6E_PRIVILEGE_VIOLATION; 6624: throw M68kException.m6eSignal; 6625: } 6626: //以下はスーパーバイザモード 6627: XEiJ.mpuCycleCount++; 6628: int a = efaMltLong (XEiJ.regOC & 63); 6629: int n = w >>> 12; //n 6630: if (w << 31 - 11 >= 0) { //MOVES.L <ea>,Rn。リード 6631: boolean supervisor = (0b10011111 << 24 << XEiJ.mpuSFC) < 0; 6632: boolean instruction = (0b00101010 << 24 << XEiJ.mpuSFC) < 0; 6633: MemoryMappedDevice[] mm = (DataBreakPoint.DBP_ON ? 6634: supervisor ? DataBreakPoint.dbpSuperMap : DataBreakPoint.dbpUserMap : 6635: supervisor ? XEiJ.busSuperMap : XEiJ.busUserMap); 6636: int z; 6637: // 01234567 6638: if (0b01100110 << 24 << XEiJ.mpuSFC < 0) { //SFC=1,2,5,6。アドレス変換あり 6639: if ((a & 3) == 0) { //4の倍数 6640: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_READ | M60_FSLW_SIZE_LONG | XEiJ.mpuSFC << 16; 6641: int pa = (supervisor ? 6642: instruction ? mmuTranslateReadSuperCode (a) : mmuTranslateReadSuperData (a) : 6643: instruction ? mmuTranslateReadUserCode (a) : mmuTranslateReadUserData (a)); 6644: //z = XEiJ.busRlsf (pa); 6645: z = mm[pa >>> XEiJ.BUS_PAGE_BITS].mmdRls (pa); 6646: } else if ((a & 1) == 0) { //4の倍数+2 6647: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_READ | M60_FSLW_SIZE_LONG | XEiJ.mpuSFC << 16; 6648: int pa = (supervisor ? 6649: instruction ? mmuTranslateReadSuperCode (a) : mmuTranslateReadSuperData (a) : 6650: instruction ? mmuTranslateReadUserCode (a) : mmuTranslateReadUserData (a)); 6651: //z = XEiJ.busRwse (pa) << 16; 6652: z = mm[pa >>> XEiJ.BUS_PAGE_BITS].mmdRws (pa) << 16; 6653: m60FSLW ^= M60_FSLW_IOMA_FIRST ^ M60_FSLW_IOMA_SECOND; 6654: pa = (supervisor ? 6655: instruction ? mmuTranslateReadSuperCode (a + 2) : mmuTranslateReadSuperData (a + 2) : 6656: instruction ? mmuTranslateReadUserCode (a + 2) : mmuTranslateReadUserData (a + 2)); 6657: //z |= XEiJ.busRwze (pa); 6658: z |= mm[pa >>> XEiJ.BUS_PAGE_BITS].mmdRwz (pa); 6659: } else { //奇数 6660: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_READ | M60_FSLW_SIZE_LONG | XEiJ.mpuSFC << 16; 6661: int pa = (supervisor ? 6662: instruction ? mmuTranslateReadSuperCode (a) : mmuTranslateReadSuperData (a) : 6663: instruction ? mmuTranslateReadUserCode (a) : mmuTranslateReadUserData (a)); 6664: //z = XEiJ.busRbs (pa) << 24; 6665: z = mm[pa >>> XEiJ.BUS_PAGE_BITS].mmdRbs (pa) << 24; 6666: m60FSLW ^= M60_FSLW_IOMA_FIRST ^ M60_FSLW_IOMA_SECOND; 6667: pa = (supervisor ? 6668: instruction ? mmuTranslateReadSuperCode (a + 1) : mmuTranslateReadSuperData (a + 1) : 6669: instruction ? mmuTranslateReadUserCode (a + 1) : mmuTranslateReadUserData (a + 1)); 6670: //z |= XEiJ.busRwze (pa) << 8; 6671: z |= mm[pa >>> XEiJ.BUS_PAGE_BITS].mmdRwz (pa) << 8; 6672: pa = (supervisor ? 6673: instruction ? mmuTranslateReadSuperCode (a + 3) : mmuTranslateReadSuperData (a + 3) : 6674: instruction ? mmuTranslateReadUserCode (a + 3) : mmuTranslateReadUserData (a + 3)); 6675: //z |= XEiJ.busRbz (pa); 6676: z |= mm[pa >>> XEiJ.BUS_PAGE_BITS].mmdRbz (pa); 6677: } 6678: } else if (XEiJ.mpuSFC != 7) { //SFC=0,3,4。アドレス変換なし 6679: if ((a & 3) == 0) { //4の倍数 6680: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_READ | M60_FSLW_SIZE_LONG | XEiJ.mpuSFC << 16; 6681: //z = XEiJ.busRlsf (a); 6682: z = mm[a >>> XEiJ.BUS_PAGE_BITS].mmdRls (a); 6683: } else if ((a & 1) == 0) { //4の倍数+2 6684: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_READ | M60_FSLW_SIZE_LONG | XEiJ.mpuSFC << 16; 6685: //z = XEiJ.busRwse (a) << 16; 6686: z = mm[a >>> XEiJ.BUS_PAGE_BITS].mmdRws (a) << 16; 6687: m60FSLW ^= M60_FSLW_IOMA_FIRST ^ M60_FSLW_IOMA_SECOND; 6688: a += 2; 6689: //z |= XEiJ.busRwze (a); 6690: z |= mm[a >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a); 6691: } else { //奇数 6692: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_READ | M60_FSLW_SIZE_LONG | XEiJ.mpuSFC << 16; 6693: //z = XEiJ.busRbs (a) << 24; 6694: z = mm[a >>> XEiJ.BUS_PAGE_BITS].mmdRbs (a) << 24; 6695: m60FSLW ^= M60_FSLW_IOMA_FIRST ^ M60_FSLW_IOMA_SECOND; 6696: a++; 6697: //z |= XEiJ.busRwze (a) << 8; 6698: z |= mm[a >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a) << 8; 6699: a += 2; 6700: //z |= XEiJ.busRbz (a); 6701: z |= mm[a >>> XEiJ.BUS_PAGE_BITS].mmdRbz (a); 6702: } 6703: } else { //SFC=7。CPU空間 6704: if (0x00022000 <= a && a <= 0x0002201f) { //コプロセッサID=1 6705: z = XEiJ.fpuMotherboardCoprocessor.cirReadLong (a); 6706: } else { 6707: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_READ | M60_FSLW_SIZE_LONG | XEiJ.mpuSFC << 16 | M60_FSLW_BUS_ERROR_ON_READ; 6708: M68kException.m6eNumber = M68kException.M6E_ACCESS_FAULT; 6709: M68kException.m6eAddress = a; 6710: M68kException.m6eDirection = XEiJ.MPU_WR_READ; 6711: M68kException.m6eSize = XEiJ.MPU_SS_LONG; 6712: throw M68kException.m6eSignal; 6713: } 6714: } 6715: XEiJ.regRn[n] = z; 6716: if (MMU_DEBUG_COMMAND) { 6717: System.out.printf ("%08x movesReadLong(%d,0x%08x)=0x%08x\n", XEiJ.regPC0, XEiJ.mpuSFC, a, XEiJ.regRn[n]); 6718: } 6719: } else { //MOVES.L Rn,<ea>。ライト 6720: if (MMU_DEBUG_COMMAND) { 6721: System.out.printf ("%08x movesWriteLong(%d,0x%08x,0x%08x)\n", XEiJ.regPC0, XEiJ.mpuDFC, a, XEiJ.regRn[n]); 6722: } 6723: boolean supervisor = (0b10011111 << 24 << XEiJ.mpuDFC) < 0; 6724: boolean instruction = (0b00101010 << 24 << XEiJ.mpuDFC) < 0; 6725: MemoryMappedDevice[] mm = (DataBreakPoint.DBP_ON ? 6726: supervisor ? DataBreakPoint.dbpSuperMap : DataBreakPoint.dbpUserMap : 6727: supervisor ? XEiJ.busSuperMap : XEiJ.busUserMap); 6728: int z = XEiJ.regRn[n]; 6729: // 01234567 6730: if (0b01100110 << 24 << XEiJ.mpuDFC < 0) { //DFC=1,2,5,6。アドレス変換あり 6731: if ((a & 3) == 0) { //4の倍数 6732: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_LONG | XEiJ.mpuDFC << 16; 6733: int pa = (supervisor ? 6734: instruction ? mmuTranslateWriteSuperCode (a) : mmuTranslateWriteSuperData (a) : 6735: instruction ? mmuTranslateWriteUserCode (a) : mmuTranslateWriteUserData (a)); 6736: //XEiJ.busWlf (pa, z); 6737: mm[pa >>> XEiJ.BUS_PAGE_BITS].mmdWl (pa, z); 6738: } else if ((a & 1) == 0) { //4の倍数+2 6739: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_LONG | XEiJ.mpuDFC << 16; 6740: int pa = (supervisor ? 6741: instruction ? mmuTranslateWriteSuperCode (a) : mmuTranslateWriteSuperData (a) : 6742: instruction ? mmuTranslateWriteUserCode (a) : mmuTranslateWriteUserData (a)); 6743: //XEiJ.busWwe (pa, z >> 16); 6744: mm[pa >>> XEiJ.BUS_PAGE_BITS].mmdWw (pa, z >> 16); 6745: m60FSLW ^= M60_FSLW_IOMA_FIRST ^ M60_FSLW_IOMA_SECOND; 6746: pa = (supervisor ? 6747: instruction ? mmuTranslateWriteSuperCode (a + 2) : mmuTranslateWriteSuperData (a + 2) : 6748: instruction ? mmuTranslateWriteUserCode (a + 2) : mmuTranslateWriteUserData (a + 2)); 6749: //XEiJ.busWwe (pa, z); 6750: mm[pa >>> XEiJ.BUS_PAGE_BITS].mmdWw (pa, z); 6751: } else { //奇数 6752: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_LONG | XEiJ.mpuDFC << 16; 6753: int pa = (supervisor ? 6754: instruction ? mmuTranslateWriteSuperCode (a) : mmuTranslateWriteSuperData (a) : 6755: instruction ? mmuTranslateWriteUserCode (a) : mmuTranslateWriteUserData (a)); 6756: //XEiJ.busWb (pa, z >> 24); 6757: mm[pa >>> XEiJ.BUS_PAGE_BITS].mmdWb (pa, z >> 24); 6758: m60FSLW ^= M60_FSLW_IOMA_FIRST ^ M60_FSLW_IOMA_SECOND; 6759: pa = (supervisor ? 6760: instruction ? mmuTranslateWriteSuperCode (a + 1) : mmuTranslateWriteSuperData (a + 1) : 6761: instruction ? mmuTranslateWriteUserCode (a + 1) : mmuTranslateWriteUserData (a + 1)); 6762: //XEiJ.busWwe (pa, z >> 8); 6763: mm[pa >>> XEiJ.BUS_PAGE_BITS].mmdWw (pa, z >> 8); 6764: pa = (supervisor ? 6765: instruction ? mmuTranslateWriteSuperCode (a + 3) : mmuTranslateWriteSuperData (a + 3) : 6766: instruction ? mmuTranslateWriteUserCode (a + 3) : mmuTranslateWriteUserData (a + 3)); 6767: //XEiJ.busWb (pa, z); 6768: mm[pa >>> XEiJ.BUS_PAGE_BITS].mmdWb (pa, z); 6769: } 6770: } else if (XEiJ.mpuDFC != 7) { //DFC=0,3,4。アドレス変換なし 6771: if ((a & 3) == 0) { //4の倍数 6772: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_LONG | XEiJ.mpuDFC << 16; 6773: //XEiJ.busWlf (a, z); 6774: mm[a >>> XEiJ.BUS_PAGE_BITS].mmdWl (a, z); 6775: } else if ((a & 1) == 0) { //4の倍数+2 6776: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_LONG | XEiJ.mpuDFC << 16; 6777: //XEiJ.busWwe (a, z >> 16); 6778: mm[a >>> XEiJ.BUS_PAGE_BITS].mmdWw (a, z >> 16); 6779: m60FSLW ^= M60_FSLW_IOMA_FIRST ^ M60_FSLW_IOMA_SECOND; 6780: a += 2; 6781: //XEiJ.busWwe (a, z); 6782: mm[a >>> XEiJ.BUS_PAGE_BITS].mmdWw (a, z); 6783: } else { //奇数 6784: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_LONG | XEiJ.mpuDFC << 16; 6785: //XEiJ.busWb (a, z >> 24); 6786: mm[a >>> XEiJ.BUS_PAGE_BITS].mmdWb (a, z >> 24); 6787: m60FSLW ^= M60_FSLW_IOMA_FIRST ^ M60_FSLW_IOMA_SECOND; 6788: a++; 6789: //XEiJ.busWwe (a, z >> 8); 6790: mm[a >>> XEiJ.BUS_PAGE_BITS].mmdWw (a, z >> 8); 6791: a += 2; 6792: //XEiJ.busWb (a, z); 6793: mm[a >>> XEiJ.BUS_PAGE_BITS].mmdWb (a, z); 6794: } 6795: } else { //DFC=7。CPU空間 6796: if (0x00022000 <= a && a <= 0x0002201f) { //コプロセッサID=1 6797: XEiJ.fpuMotherboardCoprocessor.cirWriteLong (a, z); 6798: } else { 6799: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_LONG | XEiJ.mpuDFC << 16 | M60_FSLW_BUS_ERROR_ON_WRITE; 6800: M68kException.m6eNumber = M68kException.M6E_ACCESS_FAULT; 6801: M68kException.m6eAddress = a; 6802: M68kException.m6eDirection = XEiJ.MPU_WR_WRITE; 6803: M68kException.m6eSize = XEiJ.MPU_SS_LONG; 6804: throw M68kException.m6eSignal; 6805: } 6806: } 6807: } 6808: } //irpMovesLong 6809: 6810: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6811: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 6812: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 6813: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6814: //CAS.L Dc,Du,<ea> |-|--2346|-|-UUUU|-****| M+-WXZ |0000_111_011_mmm_rrr-0000000uuu000ccc (68060 software emulate misaligned <ea>) 6815: //CAS2.L Dc1:Dc2,Du1:Du2,(Rn1):(Rn2) |-|--234S|-|-UUUU|-****| |0000_111_011_111_100-rnnn000uuu000ccc(1)-rnnn_000_uuu_000_ccc(2) 6816: public static void irpCasLong () throws M68kException { 6817: int ea = XEiJ.regOC & 63; 6818: if (ea == XEiJ.EA_IM) { //CAS2.L Dc1:Dc2,Du1:Du2,(Rn1):(Rn2) 6819: M68kException.m6eNumber = M68kException.M6E_UNIMPLEMENTED_INSTRUCTION; 6820: throw M68kException.m6eSignal; 6821: } else { //CAS.L Dc,Du,<ea> 6822: int w = mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); //pcwz 6823: if ((w & ~0b0000_000_111_000_111) != 0) { 6824: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 6825: throw M68kException.m6eSignal; 6826: } 6827: int a = efaMltLong (ea); //a=ea 6828: if ((a & 1) != 0) { //misaligned <ea> 6829: M68kException.m6eNumber = M68kException.M6E_UNIMPLEMENTED_INSTRUCTION; 6830: throw M68kException.m6eSignal; 6831: } 6832: int c = w & 7; 6833: int y = XEiJ.regRn[c]; //y=Dc 6834: int x = mmuReadLongData (a, XEiJ.regSRS); //x=<ea> 6835: int z = x - y; //z=<ea>-Dc 6836: XEiJ.regCCR = (XEiJ.regCCR & XEiJ.REG_CCR_X | 6837: (z < 0 ? XEiJ.REG_CCR_N : 0) | 6838: (z == 0 ? XEiJ.REG_CCR_Z : 0) | 6839: ((x ^ y) & (x ^ z)) >>> 31 << 1 | 6840: (x & (y ^ z) ^ (y | z)) >>> 31); //ccr_cmp 6841: if (z == 0) { //<ea>==Dc 6842: XEiJ.mpuCycleCount += 19; 6843: mmuWriteLongData (a, XEiJ.regRn[w >> 6], XEiJ.regSRS); //Du→<ea> 6844: } else { //<ea>!=Dc 6845: XEiJ.mpuCycleCount += 19; 6846: XEiJ.regRn[c] = x; //<ea>→Dc 6847: } 6848: } 6849: } //irpCasLong 6850: 6851: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6852: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 6853: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 6854: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6855: //MOVE.B <ea>,Dq |-|012346|-|-UUUU|-**00|D M+-WXZPI|0001_qqq_000_mmm_rrr 6856: public static void irpMoveToDRByte () throws M68kException { 6857: XEiJ.mpuCycleCount++; 6858: int ea = XEiJ.regOC & 63; 6859: int qqq = XEiJ.regOC >> 9 & 7; 6860: int z = ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadByteSignExword ((XEiJ.regPC += 2) - 1, XEiJ.regSRS) : mmuReadByteSignData (efaAnyByte (ea), XEiJ.regSRS); //pcbs。イミディエイトを分離 6861: XEiJ.regRn[qqq] = ~255 & XEiJ.regRn[qqq] | 255 & z; 6862: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & z]; //ccr_tst_byte 6863: } //irpMoveToDRByte 6864: 6865: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6866: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 6867: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 6868: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6869: //MOVE.B <ea>,(Aq) |-|012346|-|-UUUU|-**00|D M+-WXZPI|0001_qqq_010_mmm_rrr 6870: public static void irpMoveToMMByte () throws M68kException { 6871: XEiJ.mpuCycleCount++; 6872: int ea = XEiJ.regOC & 63; 6873: int z = ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadByteSignExword ((XEiJ.regPC += 2) - 1, XEiJ.regSRS) : mmuReadByteSignData (efaAnyByte (ea), XEiJ.regSRS); //pcbs。イミディエイトを分離。ここでAqが変化する可能性があることに注意 6874: int aqq = (XEiJ.regOC >> 9) - (0b0001_000 - 8); 6875: int a = m60Address = XEiJ.regRn[aqq]; 6876: mmuWriteByteData (a, z, XEiJ.regSRS); 6877: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & z]; //ccr_tst_byte 6878: } //irpMoveToMMByte 6879: 6880: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6881: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 6882: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 6883: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6884: //MOVE.B <ea>,(Aq)+ |-|012346|-|-UUUU|-**00|D M+-WXZPI|0001_qqq_011_mmm_rrr 6885: public static void irpMoveToMPByte () throws M68kException { 6886: XEiJ.mpuCycleCount++; 6887: int ea = XEiJ.regOC & 63; 6888: int z = ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadByteSignExword ((XEiJ.regPC += 2) - 1, XEiJ.regSRS) : mmuReadByteSignData (efaAnyByte (ea), XEiJ.regSRS); //pcbs。イミディエイトを分離。ここでAqが変化する可能性があることに注意 6889: int aqq = (XEiJ.regOC >> 9) - (0b0001_000 - 8); 6890: int a; 6891: if (aqq < 15) { 6892: m60Incremented += 1L << (aqq << 3); //longのシフトカウントは6bitでマスクされる 6893: a = m60Address = XEiJ.regRn[aqq]++; 6894: } else { 6895: m60Incremented += 2L << (7 << 3); 6896: a = m60Address = (XEiJ.regRn[15] += 2) - 2; 6897: } 6898: mmuWriteByteData (a, z, XEiJ.regSRS); 6899: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & z]; //ccr_tst_byte 6900: } //irpMoveToMPByte 6901: 6902: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6903: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 6904: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 6905: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6906: //MOVE.B <ea>,-(Aq) |-|012346|-|-UUUU|-**00|D M+-WXZPI|0001_qqq_100_mmm_rrr 6907: public static void irpMoveToMNByte () throws M68kException { 6908: XEiJ.mpuCycleCount++; 6909: int ea = XEiJ.regOC & 63; 6910: int z = ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadByteSignExword ((XEiJ.regPC += 2) - 1, XEiJ.regSRS) : mmuReadByteSignData (efaAnyByte (ea), XEiJ.regSRS); //pcbs。イミディエイトを分離。ここでAqが変化する可能性があることに注意 6911: int aqq = (XEiJ.regOC >> 9) - (0b0001_000 - 8); 6912: int a; 6913: if (aqq < 15) { 6914: m60Incremented -= 1L << (aqq << 3); //longのシフトカウントは6bitでマスクされる 6915: a = m60Address = --XEiJ.regRn[aqq]; 6916: } else { 6917: m60Incremented -= 2L << (7 << 3); 6918: a = m60Address = XEiJ.regRn[15] -= 2; 6919: } 6920: mmuWriteByteData (a, z, XEiJ.regSRS); 6921: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & z]; //ccr_tst_byte 6922: } //irpMoveToMNByte 6923: 6924: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6925: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 6926: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 6927: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6928: //MOVE.B <ea>,(d16,Aq) |-|012346|-|-UUUU|-**00|D M+-WXZPI|0001_qqq_101_mmm_rrr 6929: public static void irpMoveToMWByte () throws M68kException { 6930: XEiJ.mpuCycleCount++; 6931: int ea = XEiJ.regOC & 63; 6932: int z = ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadByteSignExword ((XEiJ.regPC += 2) - 1, XEiJ.regSRS) : mmuReadByteSignData (efaAnyByte (ea), XEiJ.regSRS); //pcbs。イミディエイトを分離。ここでAqが変化する可能性があることに注意 6933: int aqq = (XEiJ.regOC >> 9) - (0b0001_000 - 8); 6934: int t = XEiJ.regRn[aqq]; //ベースレジスタ 6935: int a = m60Address = t + mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); //ワードディスプレースメント 6936: mmuWriteByteData (a, z, XEiJ.regSRS); 6937: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & z]; //ccr_tst_byte 6938: } //irpMoveToMWByte 6939: 6940: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6941: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 6942: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 6943: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6944: //MOVE.B <ea>,(d8,Aq,Rn.wl) |-|012346|-|-UUUU|-**00|D M+-WXZPI|0001_qqq_110_mmm_rrr 6945: public static void irpMoveToMXByte () throws M68kException { 6946: XEiJ.mpuCycleCount++; 6947: int ea = XEiJ.regOC & 63; 6948: int z = ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadByteSignExword ((XEiJ.regPC += 2) - 1, XEiJ.regSRS) : mmuReadByteSignData (efaAnyByte (ea), XEiJ.regSRS); //pcbs。イミディエイトを分離。ここでAqが変化する可能性があることに注意 6949: int aqq = (XEiJ.regOC >> 9) - (0b0001_000 - 8); 6950: int a; 6951: int t = XEiJ.regRn[aqq]; //ベースレジスタ 6952: int w = mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); //拡張ワード 6953: if ((0x0100 & w) == 0) { //ブリーフフォーマット 6954: a = m60Address = 6955: (t //ベースレジスタ 6956: + (byte) w //バイトディスプレースメント 6957: + (((0x0800 & w) == 0 ? (short) XEiJ.regRn[w >> 12] : //ワードインデックス 6958: XEiJ.regRn[w >> 12]) //ロングインデックス 6959: << ((0x0600 & w) >> 9))); //スケールファクタ 6960: } else { //フルフォーマット 6961: XEiJ.mpuCycleCount += ((0x0003 & w) == 0 ? 1 : //インダイレクトなし 6962: 3); //インダイレクトあり 6963: t = (((0x0080 & w) != 0 ? 0 : //ベースレジスタなし 6964: t) + //ベースレジスタあり 6965: ((0x0020 & w) == 0 ? 0 : //ベースディスプレースメントなし 6966: (0x0010 & w) == 0 ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) : //ワードベースディスプレースメント 6967: mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS))); //ロングベースディスプレースメント 6968: int x = ((0x0040 & w) != 0 ? 0 : //インデックスなし 6969: ((0x0800 & w) == 0 ? (short) XEiJ.regRn[w >> 12] : //ワードインデックス 6970: XEiJ.regRn[w >> 12]) //ロングインデックス 6971: << ((0x0600 & w) >> 9)); //スケールファクタ 6972: a = m60Address = 6973: ((0x0003 & w) == 0 ? t + x : //インダイレクトなし 6974: (((0x0004 & w) == 0 ? mmuReadLongData (m60Address = t + x, XEiJ.regSRS) : //プリインデックス 6975: mmuReadLongData (m60Address = t, XEiJ.regSRS) + x) //ポストインデックス 6976: + ((0x0002 & w) == 0 ? 0 : //アウタディスプレースメントなし 6977: (0x0001 & w) == 0 ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) : //ワードアウタディスプレースメント 6978: mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS)))); //ロングアウタディスプレースメント 6979: } 6980: mmuWriteByteData (a, z, XEiJ.regSRS); 6981: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & z]; //ccr_tst_byte 6982: } //irpMoveToMXByte 6983: 6984: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6985: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 6986: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 6987: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6988: //MOVE.B <ea>,(xxx).W |-|012346|-|-UUUU|-**00|D M+-WXZPI|0001_000_111_mmm_rrr 6989: public static void irpMoveToZWByte () throws M68kException { 6990: XEiJ.mpuCycleCount++; 6991: int ea = XEiJ.regOC & 63; 6992: int z = ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadByteSignExword ((XEiJ.regPC += 2) - 1, XEiJ.regSRS) : mmuReadByteSignData (efaAnyByte (ea), XEiJ.regSRS); //pcbs。イミディエイトを分離 6993: int a = m60Address = mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); 6994: mmuWriteByteData (a, z, XEiJ.regSRS); 6995: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & z]; //ccr_tst_byte 6996: } //irpMoveToZWByte 6997: 6998: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6999: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7000: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7001: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7002: //MOVE.B <ea>,(xxx).L |-|012346|-|-UUUU|-**00|D M+-WXZPI|0001_001_111_mmm_rrr 7003: public static void irpMoveToZLByte () throws M68kException { 7004: XEiJ.mpuCycleCount++; 7005: int ea = XEiJ.regOC & 63; 7006: int z = ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadByteSignExword ((XEiJ.regPC += 2) - 1, XEiJ.regSRS) : mmuReadByteSignData (efaAnyByte (ea), XEiJ.regSRS); //pcbs。イミディエイトを分離 7007: int a = m60Address = mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS); 7008: mmuWriteByteData (a, z, XEiJ.regSRS); 7009: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & z]; //ccr_tst_byte 7010: } //irpMoveToZLByte 7011: 7012: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7013: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7014: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7015: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7016: //MOVE.L <ea>,Dq |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0010_qqq_000_mmm_rrr 7017: public static void irpMoveToDRLong () throws M68kException { 7018: XEiJ.mpuCycleCount++; 7019: int ea = XEiJ.regOC & 63; 7020: int z; 7021: XEiJ.regRn[XEiJ.regOC >> 9 & 7] = z = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS) : mmuReadLongData (efaAnyLong (ea), XEiJ.regSRS); //pcls。イミディエイトを分離。このr[ea]はデータレジスタまたはアドレスレジスタ 7022: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 7023: } //irpMoveToDRLong 7024: 7025: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7026: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7027: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7028: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7029: //MOVEA.L <ea>,Aq |-|012346|-|-----|-----|DAM+-WXZPI|0010_qqq_001_mmm_rrr 7030: //MOVE.L <ea>,Aq |A|012346|-|-----|-----|DAM+-WXZPI|0010_qqq_001_mmm_rrr [MOVEA.L <ea>,Aq] 7031: public static void irpMoveaLong () throws M68kException { 7032: XEiJ.mpuCycleCount++; 7033: int ea = XEiJ.regOC & 63; 7034: XEiJ.regRn[(XEiJ.regOC >> 9) - (16 - 8)] = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS) : mmuReadLongData (efaAnyLong (ea), XEiJ.regSRS); //pcls。イミディエイトを分離。このr[ea]はデータレジスタまたはアドレスレジスタ。右辺でAqが変化する可能性があることに注意 7035: } //irpMoveaLong 7036: 7037: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7038: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7039: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7040: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7041: //MOVE.L <ea>,(Aq) |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0010_qqq_010_mmm_rrr 7042: public static void irpMoveToMMLong () throws M68kException { 7043: XEiJ.mpuCycleCount++; 7044: int ea = XEiJ.regOC & 63; 7045: int z = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS) : mmuReadLongData (efaAnyLong (ea), XEiJ.regSRS); //pcls。イミディエイトを分離。このr[ea]はデータレジスタまたはアドレスレジスタ。ここでAqが変化する可能性があることに注意 7046: int aqq = (XEiJ.regOC >> 9) - (0b0010_000 - 8); 7047: int a = m60Address = XEiJ.regRn[aqq]; 7048: mmuWriteLongData (a, z, XEiJ.regSRS); 7049: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 7050: } //irpMoveToMMLong 7051: 7052: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7053: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7054: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7055: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7056: //MOVE.L <ea>,(Aq)+ |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0010_qqq_011_mmm_rrr 7057: public static void irpMoveToMPLong () throws M68kException { 7058: XEiJ.mpuCycleCount++; 7059: int ea = XEiJ.regOC & 63; 7060: int z = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS) : mmuReadLongData (efaAnyLong (ea), XEiJ.regSRS); //pcls。イミディエイトを分離。このr[ea]はデータレジスタまたはアドレスレジスタ。ここでAqが変化する可能性があることに注意 7061: int aqq = (XEiJ.regOC >> 9) - (0b0010_000 - 8); 7062: m60Incremented += 4L << (aqq << 3); //longのシフトカウントは6bitでマスクされる 7063: int a = m60Address = (XEiJ.regRn[aqq] += 4) - 4; 7064: mmuWriteLongData (a, z, XEiJ.regSRS); 7065: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 7066: } //irpMoveToMPLong 7067: 7068: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7069: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7070: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7071: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7072: //MOVE.L <ea>,-(Aq) |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0010_qqq_100_mmm_rrr 7073: public static void irpMoveToMNLong () throws M68kException { 7074: XEiJ.mpuCycleCount++; 7075: int ea = XEiJ.regOC & 63; 7076: int z = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS) : mmuReadLongData (efaAnyLong (ea), XEiJ.regSRS); //pcls。イミディエイトを分離。このr[ea]はデータレジスタまたはアドレスレジスタ。ここでAqが変化する可能性があることに注意 7077: int aqq = (XEiJ.regOC >> 9) - (0b0010_000 - 8); 7078: m60Incremented -= 4L << (aqq << 3); //longのシフトカウントは6bitでマスクされる 7079: int a = m60Address = XEiJ.regRn[aqq] -= 4; 7080: mmuWriteLongData (a, z, XEiJ.regSRS); 7081: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 7082: } //irpMoveToMNLong 7083: 7084: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7085: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7086: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7087: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7088: //MOVE.L <ea>,(d16,Aq) |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0010_qqq_101_mmm_rrr 7089: public static void irpMoveToMWLong () throws M68kException { 7090: XEiJ.mpuCycleCount++; 7091: int ea = XEiJ.regOC & 63; 7092: int z = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS) : mmuReadLongData (efaAnyLong (ea), XEiJ.regSRS); //pcls。イミディエイトを分離。このr[ea]はデータレジスタまたはアドレスレジスタ。ここでAqが変化する可能性があることに注意 7093: int aqq = (XEiJ.regOC >> 9) - (0b0010_000 - 8); 7094: int t = XEiJ.regRn[aqq]; //ベースレジスタ 7095: int a = m60Address = t + mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); //ワードディスプレースメント 7096: mmuWriteLongData (a, z, XEiJ.regSRS); 7097: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 7098: } //irpMoveToMWLong 7099: 7100: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7101: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7102: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7103: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7104: //MOVE.L <ea>,(d8,Aq,Rn.wl) |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0010_qqq_110_mmm_rrr 7105: public static void irpMoveToMXLong () throws M68kException { 7106: XEiJ.mpuCycleCount++; 7107: int ea = XEiJ.regOC & 63; 7108: int z = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS) : mmuReadLongData (efaAnyLong (ea), XEiJ.regSRS); //pcls。イミディエイトを分離。このr[ea]はデータレジスタまたはアドレスレジスタ。ここでAqが変化する可能性があることに注意 7109: int aqq = (XEiJ.regOC >> 9) - (0b0010_000 - 8); 7110: int t = XEiJ.regRn[aqq]; //ベースレジスタ 7111: int w = mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); //拡張ワード 7112: int a; 7113: if ((0x0100 & w) == 0) { //ブリーフフォーマット 7114: a = m60Address = 7115: (t //ベースレジスタ 7116: + (byte) w //バイトディスプレースメント 7117: + (((0x0800 & w) == 0 ? (short) XEiJ.regRn[w >> 12] : //ワードインデックス 7118: XEiJ.regRn[w >> 12]) //ロングインデックス 7119: << ((0x0600 & w) >> 9))); //スケールファクタ 7120: } else { //フルフォーマット 7121: XEiJ.mpuCycleCount += ((0x0003 & w) == 0 ? 1 : //インダイレクトなし 7122: 3); //インダイレクトあり 7123: t = (((0x0080 & w) != 0 ? 0 : //ベースレジスタなし 7124: t) + //ベースレジスタあり 7125: ((0x0020 & w) == 0 ? 0 : //ベースディスプレースメントなし 7126: (0x0010 & w) == 0 ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) : //ワードベースディスプレースメント 7127: mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS))); //ロングベースディスプレースメント 7128: int x = ((0x0040 & w) != 0 ? 0 : //インデックスなし 7129: ((0x0800 & w) == 0 ? (short) XEiJ.regRn[w >> 12] : //ワードインデックス 7130: XEiJ.regRn[w >> 12]) //ロングインデックス 7131: << ((0x0600 & w) >> 9)); //スケールファクタ 7132: a = m60Address = 7133: ((0x0003 & w) == 0 ? t + x : //インダイレクトなし 7134: (((0x0004 & w) == 0 ? mmuReadLongData (m60Address = t + x, XEiJ.regSRS) : //プリインデックス 7135: mmuReadLongData (m60Address = t, XEiJ.regSRS) + x) //ポストインデックス 7136: + ((0x0002 & w) == 0 ? 0 : //アウタディスプレースメントなし 7137: (0x0001 & w) == 0 ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) : //ワードアウタディスプレースメント 7138: mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS)))); //ロングアウタディスプレースメント 7139: } 7140: mmuWriteLongData (a, z, XEiJ.regSRS); 7141: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 7142: } //irpMoveToMXLong 7143: 7144: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7145: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7146: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7147: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7148: //MOVE.L <ea>,(xxx).W |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0010_000_111_mmm_rrr 7149: public static void irpMoveToZWLong () throws M68kException { 7150: XEiJ.mpuCycleCount++; 7151: int ea = XEiJ.regOC & 63; 7152: int z = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS) : mmuReadLongData (efaAnyLong (ea), XEiJ.regSRS); //pcls。イミディエイトを分離。このr[ea]はデータレジスタまたはアドレスレジスタ 7153: int a = m60Address = mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); 7154: mmuWriteLongData (a, z, XEiJ.regSRS); 7155: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 7156: } //irpMoveToZWLong 7157: 7158: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7159: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7160: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7161: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7162: //MOVE.L <ea>,(xxx).L |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0010_001_111_mmm_rrr 7163: public static void irpMoveToZLLong () throws M68kException { 7164: XEiJ.mpuCycleCount++; 7165: int ea = XEiJ.regOC & 63; 7166: int z = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS) : mmuReadLongData (efaAnyLong (ea), XEiJ.regSRS); //pcls。イミディエイトを分離。このr[ea]はデータレジスタまたはアドレスレジスタ 7167: int a = m60Address = mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS); 7168: mmuWriteLongData (a, z, XEiJ.regSRS); 7169: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 7170: } //irpMoveToZLLong 7171: 7172: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7173: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7174: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7175: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7176: //MOVE.W <ea>,Dq |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0011_qqq_000_mmm_rrr 7177: public static void irpMoveToDRWord () throws M68kException { 7178: XEiJ.mpuCycleCount++; 7179: int ea = XEiJ.regOC & 63; 7180: int qqq = XEiJ.regOC >> 9 & 7; 7181: int z = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) : mmuReadWordSignData (efaAnyWord (ea), XEiJ.regSRS); //pcws。イミディエイトを分離。このr[ea]はデータレジスタまたはアドレスレジスタ 7182: XEiJ.regRn[qqq] = ~65535 & XEiJ.regRn[qqq] | (char) z; 7183: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (char) z - 1 >> 31 & XEiJ.REG_CCR_Z | ((short) z < 0 ? XEiJ.REG_CCR_N : 0); //ccr_tst_word 7184: } //irpMoveToDRWord 7185: 7186: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7187: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7188: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7189: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7190: //MOVEA.W <ea>,Aq |-|012346|-|-----|-----|DAM+-WXZPI|0011_qqq_001_mmm_rrr 7191: //MOVE.W <ea>,Aq |A|012346|-|-----|-----|DAM+-WXZPI|0011_qqq_001_mmm_rrr [MOVEA.W <ea>,Aq] 7192: // 7193: //MOVEA.W <ea>,Aq 7194: // ワードデータをロングに符号拡張してAqの全体を更新する 7195: public static void irpMoveaWord () throws M68kException { 7196: XEiJ.mpuCycleCount++; 7197: int ea = XEiJ.regOC & 63; 7198: XEiJ.regRn[XEiJ.regOC >> 9 & 15] = ea < XEiJ.EA_MM ? (short) XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) : mmuReadWordSignData (efaAnyWord (ea), XEiJ.regSRS); //符号拡張して32bit全部書き換える。pcws。イミディエイトを分離。このr[ea]はデータレジスタまたはアドレスレジスタ。右辺でAqが変化する可能性があることに注意 7199: } //irpMoveaWord 7200: 7201: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7202: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7203: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7204: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7205: //MOVE.W <ea>,(Aq) |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0011_qqq_010_mmm_rrr 7206: public static void irpMoveToMMWord () throws M68kException { 7207: XEiJ.mpuCycleCount++; 7208: int ea = XEiJ.regOC & 63; 7209: int z = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) : mmuReadWordSignData (efaAnyWord (ea), XEiJ.regSRS); //pcws。イミディエイトを分離。このr[ea]はデータレジスタまたはアドレスレジスタ。ここでAqが変化する可能性があることに注意 7210: int aqq = (XEiJ.regOC >> 9) - (0b0011_000 - 8); 7211: int a = m60Address = XEiJ.regRn[aqq]; 7212: mmuWriteWordData (a, z, XEiJ.regSRS); 7213: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (char) z - 1 >> 31 & XEiJ.REG_CCR_Z | ((short) z < 0 ? XEiJ.REG_CCR_N : 0); //ccr_tst_word 7214: } //irpMoveToMMWord 7215: 7216: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7217: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7218: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7219: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7220: //MOVE.W <ea>,(Aq)+ |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0011_qqq_011_mmm_rrr 7221: public static void irpMoveToMPWord () throws M68kException { 7222: XEiJ.mpuCycleCount++; 7223: int ea = XEiJ.regOC & 63; 7224: int z = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) : mmuReadWordSignData (efaAnyWord (ea), XEiJ.regSRS); //このr[ea]はデータレジスタまたはアドレスレジスタ。pcws。イミディエイトを分離。ここでAqが変化する可能性があることに注意 7225: int aqq = (XEiJ.regOC >> 9) - (0b0011_000 - 8); 7226: m60Incremented += 2L << (aqq << 3); //longのシフトカウントは6bitでマスクされる 7227: int a = m60Address = (XEiJ.regRn[aqq] += 2) - 2; 7228: mmuWriteWordData (a, z, XEiJ.regSRS); 7229: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (char) z - 1 >> 31 & XEiJ.REG_CCR_Z | ((short) z < 0 ? XEiJ.REG_CCR_N : 0); //ccr_tst_word 7230: } //irpMoveToMPWord 7231: 7232: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7233: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7234: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7235: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7236: //MOVE.W <ea>,-(Aq) |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0011_qqq_100_mmm_rrr 7237: public static void irpMoveToMNWord () throws M68kException { 7238: XEiJ.mpuCycleCount++; 7239: int ea = XEiJ.regOC & 63; 7240: int z = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) : mmuReadWordSignData (efaAnyWord (ea), XEiJ.regSRS); //このr[ea]はデータレジスタまたはアドレスレジスタ。pcws。イミディエイトを分離。ここでAqが変化する可能性があることに注意 7241: int aqq = (XEiJ.regOC >> 9) - (0b0011_000 - 8); 7242: m60Incremented -= 2L << (aqq << 3); //longのシフトカウントは6bitでマスクされる 7243: int a = m60Address = XEiJ.regRn[aqq] -= 2; 7244: mmuWriteWordData (a, z, XEiJ.regSRS); 7245: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (char) z - 1 >> 31 & XEiJ.REG_CCR_Z | ((short) z < 0 ? XEiJ.REG_CCR_N : 0); //ccr_tst_word 7246: } //irpMoveToMNWord 7247: 7248: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7249: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7250: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7251: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7252: //MOVE.W <ea>,(d16,Aq) |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0011_qqq_101_mmm_rrr 7253: public static void irpMoveToMWWord () throws M68kException { 7254: XEiJ.mpuCycleCount++; 7255: int ea = XEiJ.regOC & 63; 7256: int z = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) : mmuReadWordSignData (efaAnyWord (ea), XEiJ.regSRS); //このr[ea]はデータレジスタまたはアドレスレジスタ。pcws。イミディエイトを分離。ここでAqが変化する可能性があることに注意 7257: int aqq = (XEiJ.regOC >> 9) - (0b0011_000 - 8); 7258: int t = XEiJ.regRn[aqq]; //ベースレジスタ 7259: int a = m60Address = t + mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); //ワードディスプレースメント 7260: mmuWriteWordData (a, z, XEiJ.regSRS); 7261: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (char) z - 1 >> 31 & XEiJ.REG_CCR_Z | ((short) z < 0 ? XEiJ.REG_CCR_N : 0); //ccr_tst_word 7262: } //irpMoveToMWWord 7263: 7264: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7265: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7266: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7267: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7268: //MOVE.W <ea>,(d8,Aq,Rn.wl) |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0011_qqq_110_mmm_rrr 7269: public static void irpMoveToMXWord () throws M68kException { 7270: XEiJ.mpuCycleCount++; 7271: int ea = XEiJ.regOC & 63; 7272: int z = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) : mmuReadWordSignData (efaAnyWord (ea), XEiJ.regSRS); //このr[ea]はデータレジスタまたはアドレスレジスタ。pcws。イミディエイトを分離。ここでAqが変化する可能性があることに注意 7273: int aqq = (XEiJ.regOC >> 9) - (0b0011_000 - 8); 7274: int t = XEiJ.regRn[aqq]; //ベースレジスタ 7275: int w = mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); //拡張ワード 7276: int a; 7277: if ((0x0100 & w) == 0) { //ブリーフフォーマット 7278: a = m60Address = 7279: (t //ベースレジスタ 7280: + (byte) w //バイトディスプレースメント 7281: + (((0x0800 & w) == 0 ? (short) XEiJ.regRn[w >> 12] : //ワードインデックス 7282: XEiJ.regRn[w >> 12]) //ロングインデックス 7283: << ((0x0600 & w) >> 9))); //スケールファクタ 7284: } else { //フルフォーマット 7285: XEiJ.mpuCycleCount += ((0x0003 & w) == 0 ? 1 : //インダイレクトなし 7286: 3); //インダイレクトあり 7287: t = (((0x0080 & w) != 0 ? 0 : //ベースレジスタなし 7288: t) + //ベースレジスタあり 7289: ((0x0020 & w) == 0 ? 0 : //ベースディスプレースメントなし 7290: (0x0010 & w) == 0 ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) : //ワードベースディスプレースメント 7291: mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS))); //ロングベースディスプレースメント 7292: int x = ((0x0040 & w) != 0 ? 0 : //インデックスなし 7293: ((0x0800 & w) == 0 ? (short) XEiJ.regRn[w >> 12] : //ワードインデックス 7294: XEiJ.regRn[w >> 12]) //ロングインデックス 7295: << ((0x0600 & w) >> 9)); //スケールファクタ 7296: a = m60Address = 7297: ((0x0003 & w) == 0 ? t + x : //インダイレクトなし 7298: (((0x0004 & w) == 0 ? mmuReadLongData (m60Address = t + x, XEiJ.regSRS) : //プリインデックス 7299: mmuReadLongData (m60Address = t, XEiJ.regSRS) + x) //ポストインデックス 7300: + ((0x0002 & w) == 0 ? 0 : //アウタディスプレースメントなし 7301: (0x0001 & w) == 0 ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) : //ワードアウタディスプレースメント 7302: mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS)))); //ロングアウタディスプレースメント 7303: } 7304: mmuWriteWordData (a, z, XEiJ.regSRS); 7305: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (char) z - 1 >> 31 & XEiJ.REG_CCR_Z | ((short) z < 0 ? XEiJ.REG_CCR_N : 0); //ccr_tst_word 7306: } //irpMoveToMXWord 7307: 7308: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7309: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7310: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7311: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7312: //MOVE.W <ea>,(xxx).W |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0011_000_111_mmm_rrr 7313: public static void irpMoveToZWWord () throws M68kException { 7314: XEiJ.mpuCycleCount++; 7315: int ea = XEiJ.regOC & 63; 7316: int z = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) : mmuReadWordSignData (efaAnyWord (ea), XEiJ.regSRS); //このr[ea]はデータレジスタまたはアドレスレジスタ。pcws。イミディエイトを分離 7317: int a = m60Address = mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); 7318: mmuWriteWordData (a, z, XEiJ.regSRS); 7319: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (char) z - 1 >> 31 & XEiJ.REG_CCR_Z | ((short) z < 0 ? XEiJ.REG_CCR_N : 0); //ccr_tst_word 7320: } //irpMoveToZWWord 7321: 7322: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7323: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7324: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7325: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7326: //MOVE.W <ea>,(xxx).L |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0011_001_111_mmm_rrr 7327: public static void irpMoveToZLWord () throws M68kException { 7328: XEiJ.mpuCycleCount++; 7329: int ea = XEiJ.regOC & 63; 7330: int z = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) : mmuReadWordSignData (efaAnyWord (ea), XEiJ.regSRS); //このr[ea]はデータレジスタまたはアドレスレジスタ。pcws。イミディエイトを分離 7331: int a = m60Address = mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS); 7332: mmuWriteWordData (a, z, XEiJ.regSRS); 7333: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (char) z - 1 >> 31 & XEiJ.REG_CCR_Z | ((short) z < 0 ? XEiJ.REG_CCR_N : 0); //ccr_tst_word 7334: } //irpMoveToZLWord 7335: 7336: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7337: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7338: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7339: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7340: //NEGX.B <ea> |-|012346|-|*UUUU|*****|D M+-WXZ |0100_000_000_mmm_rrr 7341: public static void irpNegxByte () throws M68kException { 7342: int ea = XEiJ.regOC & 63; 7343: int y; 7344: int z; 7345: if (ea < XEiJ.EA_AR) { //NEGX.B Dr 7346: XEiJ.mpuCycleCount++; 7347: z = (byte) (XEiJ.regRn[ea] = ~0xff & (y = XEiJ.regRn[ea]) | 0xff & -(y = (byte) y) - (XEiJ.regCCR >> 4)); //Xの左側はすべて0なのでCCR_X&を省略 7348: } else { //NEGX.B <mem> 7349: XEiJ.mpuCycleCount++; 7350: int a = efaMltByte (ea); 7351: mmuWriteByteData (a, z = (byte) (-(y = mmuModifyByteSignData (a, XEiJ.regSRS)) - (XEiJ.regCCR >> 4)), XEiJ.regSRS); //Xの左側はすべて0なのでCCR_X&を省略 7352: } 7353: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_Z : 0) | 7354: (y & z) >>> 31 << 1 | 7355: (y | z) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_negx 7356: } //irpNegxByte 7357: 7358: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7359: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7360: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7361: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7362: //NEGX.W <ea> |-|012346|-|*UUUU|*****|D M+-WXZ |0100_000_001_mmm_rrr 7363: public static void irpNegxWord () throws M68kException { 7364: int ea = XEiJ.regOC & 63; 7365: int y; 7366: int z; 7367: if (ea < XEiJ.EA_AR) { //NEGX.W Dr 7368: XEiJ.mpuCycleCount++; 7369: z = (short) (XEiJ.regRn[ea] = ~0xffff & (y = XEiJ.regRn[ea]) | (char) (-(y = (short) y) - (XEiJ.regCCR >> 4))); //Xの左側はすべて0なのでCCR_X&を省略 7370: } else { //NEGX.W <mem> 7371: XEiJ.mpuCycleCount++; 7372: int a = efaMltWord (ea); 7373: mmuWriteWordData (a, z = (short) (-(y = mmuModifyWordSignData (a, XEiJ.regSRS)) - (XEiJ.regCCR >> 4)), XEiJ.regSRS); //Xの左側はすべて0なのでCCR_X&を省略 7374: } 7375: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_Z : 0) | 7376: (y & z) >>> 31 << 1 | 7377: (y | z) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_negx 7378: } //irpNegxWord 7379: 7380: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7381: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7382: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7383: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7384: //NEGX.L <ea> |-|012346|-|*UUUU|*****|D M+-WXZ |0100_000_010_mmm_rrr 7385: public static void irpNegxLong () throws M68kException { 7386: int ea = XEiJ.regOC & 63; 7387: int y; 7388: int z; 7389: if (ea < XEiJ.EA_AR) { //NEGX.L Dr 7390: XEiJ.mpuCycleCount++; 7391: XEiJ.regRn[ea] = z = -(y = XEiJ.regRn[ea]) - (XEiJ.regCCR >> 4); //Xの左側はすべて0なのでCCR_X&を省略 7392: } else { //NEGX.L <mem> 7393: XEiJ.mpuCycleCount++; 7394: int a = efaMltLong (ea); 7395: mmuWriteLongData (a, z = -(y = mmuModifyLongData (a, XEiJ.regSRS)) - (XEiJ.regCCR >> 4), XEiJ.regSRS); //Xの左側はすべて0なのでCCR_X&を省略 7396: } 7397: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_Z : 0) | 7398: (y & z) >>> 31 << 1 | 7399: (y | z) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_negx 7400: } //irpNegxLong 7401: 7402: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7403: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7404: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7405: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7406: //MOVE.W SR,<ea> |-|-12346|P|*****|-----|D M+-WXZ |0100_000_011_mmm_rrr 7407: public static void irpMoveFromSR () throws M68kException { 7408: //MC68010以上では特権命令 7409: if (XEiJ.regSRS == 0) { //ユーザモードのとき 7410: M68kException.m6eNumber = M68kException.M6E_PRIVILEGE_VIOLATION; 7411: throw M68kException.m6eSignal; 7412: } 7413: //以下はスーパーバイザモード 7414: int ea = XEiJ.regOC & 63; 7415: if (ea < XEiJ.EA_AR) { //MOVE.W SR,Dr 7416: XEiJ.mpuCycleCount++; 7417: XEiJ.regRn[ea] = ~0xffff & XEiJ.regRn[ea] | XEiJ.regSRT1 | XEiJ.regSRS | XEiJ.regSRM | XEiJ.regSRI | XEiJ.regCCR; 7418: } else { //MOVE.W SR,<mem> 7419: XEiJ.mpuCycleCount++; 7420: mmuWriteWordData (efaMltWord (ea), XEiJ.regSRT1 | XEiJ.regSRS | XEiJ.regSRM | XEiJ.regSRI | XEiJ.regCCR, 1); 7421: } 7422: } //irpMoveFromSR 7423: 7424: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7425: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7426: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7427: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7428: //CHK.L <ea>,Dq |-|--2346|-|-UUUU|-*UUU|D M+-WXZPI|0100_qqq_100_mmm_rrr 7429: public static void irpChkLong () throws M68kException { 7430: XEiJ.mpuCycleCount += 2; 7431: int ea = XEiJ.regOC & 63; 7432: int x = ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS) : mmuReadLongData (efaAnyLong (ea), XEiJ.regSRS); //pcls。イミディエイトを分離 7433: int y = XEiJ.regRn[XEiJ.regOC >> 9 & 7]; 7434: int z = x - y; 7435: XEiJ.regCCR = (XEiJ.regCCR & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z | XEiJ.REG_CCR_V | XEiJ.REG_CCR_C) | 7436: (y < 0 ? XEiJ.REG_CCR_N : 0)); 7437: if (y < 0 || x < y) { 7438: XEiJ.mpuCycleCount += 20 - 19; 7439: m60Address = XEiJ.regPC0; //アドレスは命令の先頭 7440: M68kException.m6eNumber = M68kException.M6E_CHK_INSTRUCTION; 7441: throw M68kException.m6eSignal; 7442: } 7443: } //irpChkLong 7444: 7445: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7446: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7447: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7448: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7449: //CHK.W <ea>,Dq |-|012346|-|-UUUU|-*UUU|D M+-WXZPI|0100_qqq_110_mmm_rrr 7450: public static void irpChkWord () throws M68kException { 7451: XEiJ.mpuCycleCount += 2; 7452: int ea = XEiJ.regOC & 63; 7453: int x = ea < XEiJ.EA_AR ? (short) XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) : mmuReadWordSignData (efaAnyWord (ea), XEiJ.regSRS); //pcws。イミディエイトを分離 7454: int y = (short) XEiJ.regRn[XEiJ.regOC >> 9 & 7]; 7455: int z = (short) (x - y); 7456: XEiJ.regCCR = (XEiJ.regCCR & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z | XEiJ.REG_CCR_V | XEiJ.REG_CCR_C) | 7457: (y < 0 ? XEiJ.REG_CCR_N : 0)); 7458: if (y < 0 || x < y) { 7459: XEiJ.mpuCycleCount += 20 - 19; 7460: m60Address = XEiJ.regPC0; //アドレスは命令の先頭 7461: M68kException.m6eNumber = M68kException.M6E_CHK_INSTRUCTION; 7462: throw M68kException.m6eSignal; 7463: } 7464: } //irpChkWord 7465: 7466: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7467: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7468: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7469: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7470: //LEA.L <ea>,Aq |-|012346|-|-----|-----| M WXZP |0100_qqq_111_mmm_rrr 7471: //EXTB.L Dr |-|--2346|-|-UUUU|-**00|D |0100_100_111_000_rrr 7472: public static void irpLea () throws M68kException { 7473: int ea = XEiJ.regOC & 63; 7474: if (ea < XEiJ.EA_AR) { //EXTB.L Dr 7475: XEiJ.mpuCycleCount++; 7476: int z; 7477: XEiJ.regRn[ea] = z = (byte) XEiJ.regRn[ea]; 7478: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 7479: } else { //LEA.L <ea>,Aq 7480: XEiJ.mpuCycleCount++; 7481: XEiJ.regRn[(XEiJ.regOC >> 9) - (32 - 8)] = efaLeaPea (ea); 7482: } 7483: } //irpLea 7484: 7485: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7486: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7487: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7488: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7489: //CLR.B <ea> |-|012346|-|-UUUU|-0100|D M+-WXZ |0100_001_000_mmm_rrr (68000 and 68008 read before clear) 7490: public static void irpClrByte () throws M68kException { 7491: int ea = XEiJ.regOC & 63; 7492: if (ea < XEiJ.EA_AR) { //CLR.B Dr 7493: XEiJ.mpuCycleCount++; 7494: XEiJ.regRn[ea] &= ~0xff; 7495: } else { //CLR.B <mem> 7496: XEiJ.mpuCycleCount++; 7497: mmuWriteByteData (efaMltByte (ea), 0, XEiJ.regSRS); 7498: } 7499: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z; //ccr_clr 7500: } //irpClrByte 7501: 7502: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7503: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7504: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7505: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7506: //CLR.W <ea> |-|012346|-|-UUUU|-0100|D M+-WXZ |0100_001_001_mmm_rrr (68000 and 68008 read before clear) 7507: public static void irpClrWord () throws M68kException { 7508: int ea = XEiJ.regOC & 63; 7509: if (ea < XEiJ.EA_AR) { //CLR.W Dr 7510: XEiJ.mpuCycleCount++; 7511: XEiJ.regRn[ea] &= ~0xffff; 7512: } else { //CLR.W <mem> 7513: XEiJ.mpuCycleCount++; 7514: mmuWriteWordData (efaMltWord (ea), 0, XEiJ.regSRS); 7515: } 7516: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z; //ccr_clr 7517: } //irpClrWord 7518: 7519: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7520: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7521: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7522: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7523: //CLR.L <ea> |-|012346|-|-UUUU|-0100|D M+-WXZ |0100_001_010_mmm_rrr (68000 and 68008 read before clear) 7524: public static void irpClrLong () throws M68kException { 7525: int ea = XEiJ.regOC & 63; 7526: if (ea < XEiJ.EA_AR) { //CLR.L Dr 7527: XEiJ.mpuCycleCount++; 7528: XEiJ.regRn[ea] = 0; 7529: } else { //CLR.L <mem> 7530: XEiJ.mpuCycleCount++; 7531: mmuWriteLongData (efaMltLong (ea), 0, XEiJ.regSRS); 7532: } 7533: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z; //ccr_clr 7534: } //irpClrLong 7535: 7536: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7537: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7538: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7539: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7540: //MOVE.W CCR,<ea> |-|-12346|-|*****|-----|D M+-WXZ |0100_001_011_mmm_rrr 7541: public static void irpMoveFromCCR () throws M68kException { 7542: int ea = XEiJ.regOC & 63; 7543: if (ea < XEiJ.EA_AR) { //MOVE.W CCR,Dr 7544: XEiJ.mpuCycleCount++; 7545: XEiJ.regRn[ea] = ~0xffff & XEiJ.regRn[ea] | XEiJ.regCCR; 7546: } else { //MOVE.W CCR,<mem> 7547: XEiJ.mpuCycleCount++; 7548: mmuWriteWordData (efaMltWord (ea), XEiJ.regCCR, XEiJ.regSRS); 7549: } 7550: } //irpMoveFromCCR 7551: 7552: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7553: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7554: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7555: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7556: //NEG.B <ea> |-|012346|-|UUUUU|*****|D M+-WXZ |0100_010_000_mmm_rrr 7557: public static void irpNegByte () throws M68kException { 7558: int ea = XEiJ.regOC & 63; 7559: int y; 7560: int z; 7561: if (ea < XEiJ.EA_AR) { //NEG.B Dr 7562: XEiJ.mpuCycleCount++; 7563: z = (byte) (XEiJ.regRn[ea] = ~0xff & (y = XEiJ.regRn[ea]) | 0xff & -(y = (byte) y)); 7564: } else { //NEG.B <mem> 7565: XEiJ.mpuCycleCount++; 7566: int a = efaMltByte (ea); 7567: mmuWriteByteData (a, z = (byte) -(y = mmuModifyByteSignData (a, XEiJ.regSRS)), XEiJ.regSRS); 7568: } 7569: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | 7570: (y & z) >>> 31 << 1 | 7571: (y | z) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_neg 7572: } //irpNegByte 7573: 7574: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7575: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7576: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7577: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7578: //NEG.W <ea> |-|012346|-|UUUUU|*****|D M+-WXZ |0100_010_001_mmm_rrr 7579: public static void irpNegWord () throws M68kException { 7580: int ea = XEiJ.regOC & 63; 7581: int y; 7582: int z; 7583: if (ea < XEiJ.EA_AR) { //NEG.W Dr 7584: XEiJ.mpuCycleCount++; 7585: z = (short) (XEiJ.regRn[ea] = ~0xffff & (y = XEiJ.regRn[ea]) | (char) -(y = (short) y)); 7586: } else { //NEG.W <mem> 7587: XEiJ.mpuCycleCount++; 7588: int a = efaMltWord (ea); 7589: mmuWriteWordData (a, z = (short) -(y = mmuModifyWordSignData (a, XEiJ.regSRS)), XEiJ.regSRS); 7590: } 7591: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | 7592: (y & z) >>> 31 << 1 | 7593: (y | z) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_neg 7594: } //irpNegWord 7595: 7596: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7597: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7598: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7599: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7600: //NEG.L <ea> |-|012346|-|UUUUU|*****|D M+-WXZ |0100_010_010_mmm_rrr 7601: public static void irpNegLong () throws M68kException { 7602: int ea = XEiJ.regOC & 63; 7603: int y; 7604: int z; 7605: if (ea < XEiJ.EA_AR) { //NEG.L Dr 7606: XEiJ.mpuCycleCount++; 7607: XEiJ.regRn[ea] = z = -(y = XEiJ.regRn[ea]); 7608: } else { //NEG.L <mem> 7609: XEiJ.mpuCycleCount++; 7610: int a = efaMltLong (ea); 7611: mmuWriteLongData (a, z = -(y = mmuModifyLongData (a, XEiJ.regSRS)), XEiJ.regSRS); 7612: } 7613: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | 7614: (y & z) >>> 31 << 1 | 7615: (y | z) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_neg 7616: } //irpNegLong 7617: 7618: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7619: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7620: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7621: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7622: //MOVE.W <ea>,CCR |-|012346|-|UUUUU|*****|D M+-WXZPI|0100_010_011_mmm_rrr 7623: public static void irpMoveToCCR () throws M68kException { 7624: XEiJ.mpuCycleCount++; 7625: int ea = XEiJ.regOC & 63; 7626: XEiJ.regCCR = XEiJ.REG_CCR_MASK & (ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) : mmuReadWordSignData (efaAnyWord (ea), XEiJ.regSRS)); //pcws。イミディエイトを分離 7627: } //irpMoveToCCR 7628: 7629: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7630: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7631: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7632: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7633: //NOT.B <ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |0100_011_000_mmm_rrr 7634: public static void irpNotByte () throws M68kException { 7635: int ea = XEiJ.regOC & 63; 7636: int z; 7637: if (ea < XEiJ.EA_AR) { //NOT.B Dr 7638: XEiJ.mpuCycleCount++; 7639: z = XEiJ.regRn[ea] ^= 255; //0拡張してからEOR 7640: } else { //NOT.B <mem> 7641: XEiJ.mpuCycleCount++; 7642: int a = efaMltByte (ea); 7643: mmuWriteByteData (a, z = ~mmuModifyByteSignData (a, XEiJ.regSRS), XEiJ.regSRS); 7644: } 7645: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & z]; //ccr_tst_byte 7646: } //irpNotByte 7647: 7648: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7649: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7650: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7651: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7652: //NOT.W <ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |0100_011_001_mmm_rrr 7653: public static void irpNotWord () throws M68kException { 7654: int ea = XEiJ.regOC & 63; 7655: int z; 7656: if (ea < XEiJ.EA_AR) { //NOT.W Dr 7657: XEiJ.mpuCycleCount++; 7658: z = XEiJ.regRn[ea] ^= 65535; //0拡張してからEOR 7659: } else { //NOT.W <mem> 7660: XEiJ.mpuCycleCount++; 7661: int a = efaMltWord (ea); 7662: mmuWriteWordData (a, z = ~mmuModifyWordSignData (a, XEiJ.regSRS), XEiJ.regSRS); 7663: } 7664: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (char) z - 1 >> 31 & XEiJ.REG_CCR_Z | ((short) z < 0 ? XEiJ.REG_CCR_N : 0); //ccr_tst_word 7665: } //irpNotWord 7666: 7667: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7668: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7669: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7670: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7671: //NOT.L <ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |0100_011_010_mmm_rrr 7672: public static void irpNotLong () throws M68kException { 7673: int ea = XEiJ.regOC & 63; 7674: int z; 7675: if (ea < XEiJ.EA_AR) { //NOT.L Dr 7676: XEiJ.mpuCycleCount++; 7677: z = XEiJ.regRn[ea] ^= 0xffffffff; 7678: } else { //NOT.L <mem> 7679: XEiJ.mpuCycleCount++; 7680: int a = efaMltLong (ea); 7681: mmuWriteLongData (a, z = ~mmuModifyLongData (a, XEiJ.regSRS), XEiJ.regSRS); 7682: } 7683: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 7684: } //irpNotLong 7685: 7686: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7687: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7688: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7689: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7690: //MOVE.W <ea>,SR |-|012346|P|UUUUU|*****|D M+-WXZPI|0100_011_011_mmm_rrr 7691: public static void irpMoveToSR () throws M68kException { 7692: if (XEiJ.regSRS == 0) { //ユーザモードのとき 7693: M68kException.m6eNumber = M68kException.M6E_PRIVILEGE_VIOLATION; 7694: throw M68kException.m6eSignal; 7695: } 7696: //以下はスーパーバイザモード 7697: XEiJ.mpuCycleCount += 12; 7698: int ea = XEiJ.regOC & 63; 7699: irpSetSR (ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, 1) : mmuReadWordZeroData (efaAnyWord (ea), 1)); //特権違反チェックが先。pcwz。イミディエイトを分離 7700: } //irpMoveToSR 7701: 7702: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7703: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7704: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7705: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7706: //NBCD.B <ea> |-|012346|-|UUUUU|*U*U*|D M+-WXZ |0100_100_000_mmm_rrr 7707: //LINK.L Ar,#<data> |-|--2346|-|-----|-----| |0100_100_000_001_rrr-{data} 7708: // 7709: //LINK.L Ar,#<data> 7710: // PEA.L (Ar);MOVEA.L A7,Ar;ADDA.L #<data>,A7と同じ 7711: // LINK.L A7,#<data>はA7をデクリメントする前の値がプッシュされ、A7に#<data>が加算される 7712: public static void irpNbcd () throws M68kException { 7713: int ea = XEiJ.regOC & 63; 7714: if (ea < XEiJ.EA_AR) { //NBCD.B Dr 7715: XEiJ.mpuCycleCount++; 7716: XEiJ.regRn[ea] = ~0xff & XEiJ.regRn[ea] | irpSbcd (0, XEiJ.regRn[ea]); 7717: } else if (ea < XEiJ.EA_MM) { //LINK.L Ar,#<data> 7718: XEiJ.mpuCycleCount += 2; 7719: int o = mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS); //pcls 7720: int arr = XEiJ.regOC - (0b0100_100_000_001_000 - 8); 7721: //評価順序に注意。LINK.L A7,#<data>のときプッシュするのはA7をデクリメントする前の値。wl(r[15]-=4,r[8+rrr])は不可 7722: int a = XEiJ.regRn[arr]; 7723: m60Incremented -= 4L << (7 << 3); 7724: int sp = m60Address = XEiJ.regRn[15] -= 4; 7725: mmuWriteLongData (sp, a, XEiJ.regSRS); //pushl 7726: XEiJ.regRn[arr] = sp; 7727: XEiJ.regRn[15] = sp + o; 7728: } else { //NBCD.B <mem> 7729: XEiJ.mpuCycleCount++; 7730: int a = efaMltByte (ea); 7731: mmuWriteByteData (a, irpSbcd (0, mmuModifyByteSignData (a, XEiJ.regSRS)), XEiJ.regSRS); 7732: } 7733: } //irpNbcd 7734: 7735: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7736: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7737: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7738: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7739: //SWAP.W Dr |-|012346|-|-UUUU|-**00|D |0100_100_001_000_rrr 7740: //BKPT #<data> |-|-12346|-|-----|-----| |0100_100_001_001_ddd 7741: //PEA.L <ea> |-|012346|-|-----|-----| M WXZP |0100_100_001_mmm_rrr 7742: public static void irpPea () throws M68kException { 7743: int ea = XEiJ.regOC & 63; 7744: if (ea < XEiJ.EA_AR) { //SWAP.W Dr 7745: XEiJ.mpuCycleCount++; 7746: int x; 7747: int z; 7748: XEiJ.regRn[ea] = z = (x = XEiJ.regRn[ea]) << 16 | x >>> 16; 7749: //上位ワードと下位ワードを入れ替えた後のDrをロングでテストする 7750: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 7751: } else { //PEA.L <ea> 7752: XEiJ.mpuCycleCount++; 7753: //評価順序に注意。実効アドレスを求めてからspをデクリメントすること 7754: int a = efaLeaPea (ea); //BKPT #<data>はここでillegal instructionになる 7755: m60Incremented -= 4L << (7 << 3); 7756: int sp = m60Address = XEiJ.regRn[15] -= 4; 7757: mmuWriteLongData (sp, a, XEiJ.regSRS); 7758: } 7759: } //irpPea 7760: 7761: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7762: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7763: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7764: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7765: //EXT.W Dr |-|012346|-|-UUUU|-**00|D |0100_100_010_000_rrr 7766: //MOVEM.W <list>,<ea> |-|012346|-|-----|-----| M -WXZ |0100_100_010_mmm_rrr-llllllllllllllll 7767: public static void irpMovemToMemWord () throws M68kException { 7768: int ea = XEiJ.regOC & 63; 7769: if (ea < XEiJ.EA_AR) { //EXT.W Dr 7770: XEiJ.mpuCycleCount++; 7771: int z; 7772: XEiJ.regRn[ea] = ~0xffff & (z = XEiJ.regRn[ea]) | (char) (z = (byte) z); 7773: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 7774: } else { //MOVEM.W <list>,<ea> 7775: int l = mmuReadWordZeroExword (XEiJ.regPC, XEiJ.regSRS); //pcwze。レジスタリスト。ゼロ拡張 7776: XEiJ.regPC += 2; 7777: if (ea >> 3 == XEiJ.MMM_MN) { //-(Ar) 7778: //MOVEM.wl <list>,-(Ar)で<list>にArが含まれているとき、000/010は命令開始時のArを、020/030/040/060は命令開始時のAr-オペレーションサイズをメモリに書き込む 7779: //転送するレジスタが0個のときArは変化しない 7780: int arr = ea - (XEiJ.EA_MN - 8); 7781: m60Incremented -= 2L << (arr << 3); //longのシフトカウントは6bitでマスクされる 7782: int a = m60Address = XEiJ.regRn[arr]; 7783: XEiJ.regRn[arr] = a - 2; 7784: int t = a; 7785: if (XEiJ.IRP_MOVEM_EXPAND) { //16回展開する 7786: if ((l & 0x0001) != 0) { 7787: mmuWriteWordData (m60Address = a -= 2, XEiJ.regRn[15], XEiJ.regSRS); 7788: } 7789: if ((l & 0x0002) != 0) { 7790: mmuWriteWordData (m60Address = a -= 2, XEiJ.regRn[14], XEiJ.regSRS); 7791: } 7792: if ((l & 0x0004) != 0) { 7793: mmuWriteWordData (m60Address = a -= 2, XEiJ.regRn[13], XEiJ.regSRS); 7794: } 7795: if ((l & 0x0008) != 0) { 7796: mmuWriteWordData (m60Address = a -= 2, XEiJ.regRn[12], XEiJ.regSRS); 7797: } 7798: if ((l & 0x0010) != 0) { 7799: mmuWriteWordData (m60Address = a -= 2, XEiJ.regRn[11], XEiJ.regSRS); 7800: } 7801: if ((l & 0x0020) != 0) { 7802: mmuWriteWordData (m60Address = a -= 2, XEiJ.regRn[10], XEiJ.regSRS); 7803: } 7804: if ((l & 0x0040) != 0) { 7805: mmuWriteWordData (m60Address = a -= 2, XEiJ.regRn[ 9], XEiJ.regSRS); 7806: } 7807: if ((byte) l < 0) { //(l & 0x0080) != 0 7808: mmuWriteWordData (m60Address = a -= 2, XEiJ.regRn[ 8], XEiJ.regSRS); 7809: } 7810: if ((l & 0x0100) != 0) { 7811: mmuWriteWordData (m60Address = a -= 2, XEiJ.regRn[ 7], XEiJ.regSRS); 7812: } 7813: if ((l & 0x0200) != 0) { 7814: mmuWriteWordData (m60Address = a -= 2, XEiJ.regRn[ 6], XEiJ.regSRS); 7815: } 7816: if ((l & 0x0400) != 0) { 7817: mmuWriteWordData (m60Address = a -= 2, XEiJ.regRn[ 5], XEiJ.regSRS); 7818: } 7819: if ((l & 0x0800) != 0) { 7820: mmuWriteWordData (m60Address = a -= 2, XEiJ.regRn[ 4], XEiJ.regSRS); 7821: } 7822: if ((l & 0x1000) != 0) { 7823: mmuWriteWordData (m60Address = a -= 2, XEiJ.regRn[ 3], XEiJ.regSRS); 7824: } 7825: if ((l & 0x2000) != 0) { 7826: mmuWriteWordData (m60Address = a -= 2, XEiJ.regRn[ 2], XEiJ.regSRS); 7827: } 7828: if ((l & 0x4000) != 0) { 7829: mmuWriteWordData (m60Address = a -= 2, XEiJ.regRn[ 1], XEiJ.regSRS); 7830: } 7831: if ((short) l < 0) { //(l & 0x8000) != 0 7832: mmuWriteWordData (m60Address = a -= 2, XEiJ.regRn[ 0], XEiJ.regSRS); 7833: } 7834: } else if (XEiJ.IRP_MOVEM_LOOP) { //16回ループする。コンパイラが展開する 7835: for (int i = 15; i >= 0; i--) { 7836: if ((l & 0x8000 >>> i) != 0) { 7837: mmuWriteWordData (m60Address = a -= 2, XEiJ.regRn[i], XEiJ.regSRS); 7838: } 7839: } 7840: } else if (XEiJ.IRP_MOVEM_SHIFT_LEFT) { //0になるまで左にシフトする 7841: l = XEiJ.MPU_BITREV_TABLE_0[l & 2047] | XEiJ.MPU_BITREV_TABLE_1[l << 10 >>> 21]; //Integer.reverse(l) 7842: for (int i = 15; l != 0; i--, l <<= 1) { 7843: if (l < 0) { 7844: mmuWriteWordData (m60Address = a -= 2, XEiJ.regRn[i], XEiJ.regSRS); 7845: } 7846: } 7847: } else if (XEiJ.IRP_MOVEM_SHIFT_RIGHT) { //0になるまで右にシフトする 7848: for (int i = 15; l != 0; i--, l >>>= 1) { 7849: if ((l & 1) != 0) { 7850: mmuWriteWordData (m60Address = a -= 2, XEiJ.regRn[i], XEiJ.regSRS); 7851: } 7852: } 7853: } else if (XEiJ.IRP_MOVEM_ZEROS) { //Integer.numberOfTrailingZerosを使う 7854: for (int i = 15; l != 0; ) { 7855: int k = Integer.numberOfTrailingZeros (l); 7856: mmuWriteWordData (m60Address = a -= 2, XEiJ.regRn[i -= k], XEiJ.regSRS); 7857: l = l >>> k & ~1; 7858: } 7859: } 7860: m60Incremented += 2L << (arr << 3); //元に戻しておく。longのシフトカウントは6bitでマスクされる 7861: XEiJ.regRn[arr] = a; 7862: XEiJ.mpuCycleCount += t - a >> 1; //2バイト/個→1サイクル/個 7863: } else { //-(Ar)以外 7864: int a = efaCltWord (ea); 7865: int t = a; 7866: if (XEiJ.IRP_MOVEM_EXPAND) { //16回展開する 7867: if ((l & 0x0001) != 0) { 7868: mmuWriteWordData (m60Address = a, XEiJ.regRn[ 0], XEiJ.regSRS); 7869: a += 2; 7870: } 7871: if ((l & 0x0002) != 0) { 7872: mmuWriteWordData (m60Address = a, XEiJ.regRn[ 1], XEiJ.regSRS); 7873: a += 2; 7874: } 7875: if ((l & 0x0004) != 0) { 7876: mmuWriteWordData (m60Address = a, XEiJ.regRn[ 2], XEiJ.regSRS); 7877: a += 2; 7878: } 7879: if ((l & 0x0008) != 0) { 7880: mmuWriteWordData (m60Address = a, XEiJ.regRn[ 3], XEiJ.regSRS); 7881: a += 2; 7882: } 7883: if ((l & 0x0010) != 0) { 7884: mmuWriteWordData (m60Address = a, XEiJ.regRn[ 4], XEiJ.regSRS); 7885: a += 2; 7886: } 7887: if ((l & 0x0020) != 0) { 7888: mmuWriteWordData (m60Address = a, XEiJ.regRn[ 5], XEiJ.regSRS); 7889: a += 2; 7890: } 7891: if ((l & 0x0040) != 0) { 7892: mmuWriteWordData (m60Address = a, XEiJ.regRn[ 6], XEiJ.regSRS); 7893: a += 2; 7894: } 7895: if ((byte) l < 0) { //(l & 0x0080) != 0 7896: mmuWriteWordData (m60Address = a, XEiJ.regRn[ 7], XEiJ.regSRS); 7897: a += 2; 7898: } 7899: if ((l & 0x0100) != 0) { 7900: mmuWriteWordData (m60Address = a, XEiJ.regRn[ 8], XEiJ.regSRS); 7901: a += 2; 7902: } 7903: if ((l & 0x0200) != 0) { 7904: mmuWriteWordData (m60Address = a, XEiJ.regRn[ 9], XEiJ.regSRS); 7905: a += 2; 7906: } 7907: if ((l & 0x0400) != 0) { 7908: mmuWriteWordData (m60Address = a, XEiJ.regRn[10], XEiJ.regSRS); 7909: a += 2; 7910: } 7911: if ((l & 0x0800) != 0) { 7912: mmuWriteWordData (m60Address = a, XEiJ.regRn[11], XEiJ.regSRS); 7913: a += 2; 7914: } 7915: if ((l & 0x1000) != 0) { 7916: mmuWriteWordData (m60Address = a, XEiJ.regRn[12], XEiJ.regSRS); 7917: a += 2; 7918: } 7919: if ((l & 0x2000) != 0) { 7920: mmuWriteWordData (m60Address = a, XEiJ.regRn[13], XEiJ.regSRS); 7921: a += 2; 7922: } 7923: if ((l & 0x4000) != 0) { 7924: mmuWriteWordData (m60Address = a, XEiJ.regRn[14], XEiJ.regSRS); 7925: a += 2; 7926: } 7927: if ((short) l < 0) { //(l & 0x8000) != 0 7928: mmuWriteWordData (m60Address = a, XEiJ.regRn[15], XEiJ.regSRS); 7929: a += 2; 7930: } 7931: } else if (XEiJ.IRP_MOVEM_LOOP) { //16回ループする。コンパイラが展開する 7932: for (int i = 0; i <= 15; i++) { 7933: if ((l & 0x0001 << i) != 0) { 7934: mmuWriteWordData (m60Address = a, XEiJ.regRn[i], XEiJ.regSRS); 7935: a += 2; 7936: } 7937: } 7938: } else if (XEiJ.IRP_MOVEM_SHIFT_LEFT) { //0になるまで左にシフトする 7939: l = XEiJ.MPU_BITREV_TABLE_0[l & 2047] | XEiJ.MPU_BITREV_TABLE_1[l << 10 >>> 21]; //Integer.reverse(l) 7940: for (int i = 0; l != 0; i++, l <<= 1) { 7941: if (l < 0) { 7942: mmuWriteWordData (m60Address = a, XEiJ.regRn[i], XEiJ.regSRS); 7943: a += 2; 7944: } 7945: } 7946: } else if (XEiJ.IRP_MOVEM_SHIFT_RIGHT) { //0になるまで右にシフトする 7947: for (int i = 0; l != 0; i++, l >>>= 1) { 7948: if ((l & 1) != 0) { 7949: mmuWriteWordData (m60Address = a, XEiJ.regRn[i], XEiJ.regSRS); 7950: a += 2; 7951: } 7952: } 7953: } else if (XEiJ.IRP_MOVEM_ZEROS) { //Integer.numberOfTrailingZerosを使う 7954: for (int i = 0; l != 0; ) { 7955: int k = Integer.numberOfTrailingZeros (l); 7956: mmuWriteWordData (m60Address = a, XEiJ.regRn[i += k], XEiJ.regSRS); 7957: a += 2; 7958: l = l >>> k & ~1; 7959: } 7960: } 7961: XEiJ.mpuCycleCount += a - t >> 1; //2バイト/個→1サイクル/個 7962: } 7963: } 7964: } //irpMovemToMemWord 7965: 7966: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7967: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7968: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7969: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7970: //EXT.L Dr |-|012346|-|-UUUU|-**00|D |0100_100_011_000_rrr 7971: //MOVEM.L <list>,<ea> |-|012346|-|-----|-----| M -WXZ |0100_100_011_mmm_rrr-llllllllllllllll 7972: public static void irpMovemToMemLong () throws M68kException { 7973: int ea = XEiJ.regOC & 63; 7974: if (ea < XEiJ.EA_AR) { //EXT.L Dr 7975: XEiJ.mpuCycleCount++; 7976: int z; 7977: XEiJ.regRn[ea] = z = (short) XEiJ.regRn[ea]; 7978: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 7979: } else { //MOVEM.L <list>,<ea> 7980: int l = mmuReadWordZeroExword (XEiJ.regPC, XEiJ.regSRS); //pcwze。レジスタリスト。ゼロ拡張 7981: XEiJ.regPC += 2; 7982: if (ea >> 3 == XEiJ.MMM_MN) { //-(Ar) 7983: //MOVEM.wl <list>,-(Ar)で<list>にArが含まれているとき、000/010は命令開始時のArを、020/030/040/060は命令開始時のAr-オペレーションサイズをメモリに書き込む 7984: //転送するレジスタが0個のときArは変化しない 7985: int arr = ea - (XEiJ.EA_MN - 8); 7986: m60Incremented -= 4L << (arr << 3); //longのシフトカウントは6bitでマスクされる 7987: int a = m60Address = XEiJ.regRn[arr]; 7988: XEiJ.regRn[arr] = a - 4; 7989: int t = a; 7990: if (XEiJ.IRP_MOVEM_EXPAND) { //16回展開する 7991: if ((l & 0x0001) != 0) { 7992: mmuWriteLongData (m60Address = a -= 4, XEiJ.regRn[15], XEiJ.regSRS); 7993: } 7994: if ((l & 0x0002) != 0) { 7995: mmuWriteLongData (m60Address = a -= 4, XEiJ.regRn[14], XEiJ.regSRS); 7996: } 7997: if ((l & 0x0004) != 0) { 7998: mmuWriteLongData (m60Address = a -= 4, XEiJ.regRn[13], XEiJ.regSRS); 7999: } 8000: if ((l & 0x0008) != 0) { 8001: mmuWriteLongData (m60Address = a -= 4, XEiJ.regRn[12], XEiJ.regSRS); 8002: } 8003: if ((l & 0x0010) != 0) { 8004: mmuWriteLongData (m60Address = a -= 4, XEiJ.regRn[11], XEiJ.regSRS); 8005: } 8006: if ((l & 0x0020) != 0) { 8007: mmuWriteLongData (m60Address = a -= 4, XEiJ.regRn[10], XEiJ.regSRS); 8008: } 8009: if ((l & 0x0040) != 0) { 8010: mmuWriteLongData (m60Address = a -= 4, XEiJ.regRn[ 9], XEiJ.regSRS); 8011: } 8012: if ((byte) l < 0) { //(l & 0x0080) != 0 8013: mmuWriteLongData (m60Address = a -= 4, XEiJ.regRn[ 8], XEiJ.regSRS); 8014: } 8015: if ((l & 0x0100) != 0) { 8016: mmuWriteLongData (m60Address = a -= 4, XEiJ.regRn[ 7], XEiJ.regSRS); 8017: } 8018: if ((l & 0x0200) != 0) { 8019: mmuWriteLongData (m60Address = a -= 4, XEiJ.regRn[ 6], XEiJ.regSRS); 8020: } 8021: if ((l & 0x0400) != 0) { 8022: mmuWriteLongData (m60Address = a -= 4, XEiJ.regRn[ 5], XEiJ.regSRS); 8023: } 8024: if ((l & 0x0800) != 0) { 8025: mmuWriteLongData (m60Address = a -= 4, XEiJ.regRn[ 4], XEiJ.regSRS); 8026: } 8027: if ((l & 0x1000) != 0) { 8028: mmuWriteLongData (m60Address = a -= 4, XEiJ.regRn[ 3], XEiJ.regSRS); 8029: } 8030: if ((l & 0x2000) != 0) { 8031: mmuWriteLongData (m60Address = a -= 4, XEiJ.regRn[ 2], XEiJ.regSRS); 8032: } 8033: if ((l & 0x4000) != 0) { 8034: mmuWriteLongData (m60Address = a -= 4, XEiJ.regRn[ 1], XEiJ.regSRS); 8035: } 8036: if ((short) l < 0) { //(l & 0x8000) != 0 8037: mmuWriteLongData (m60Address = a -= 4, XEiJ.regRn[ 0], XEiJ.regSRS); 8038: } 8039: } else if (XEiJ.IRP_MOVEM_LOOP) { //16回ループする。コンパイラが展開する 8040: for (int i = 15; i >= 0; i--) { 8041: if ((l & 0x8000 >>> i) != 0) { 8042: mmuWriteLongData (m60Address = a -= 4, XEiJ.regRn[i], XEiJ.regSRS); 8043: } 8044: } 8045: } else if (XEiJ.IRP_MOVEM_SHIFT_LEFT) { //0になるまで左にシフトする 8046: l = XEiJ.MPU_BITREV_TABLE_0[l & 2047] | XEiJ.MPU_BITREV_TABLE_1[l << 10 >>> 21]; //Integer.reverse(l) 8047: for (int i = 15; l != 0; i--, l <<= 1) { 8048: if (l < 0) { 8049: mmuWriteLongData (m60Address = a -= 4, XEiJ.regRn[i], XEiJ.regSRS); 8050: } 8051: } 8052: } else if (XEiJ.IRP_MOVEM_SHIFT_RIGHT) { //0になるまで右にシフトする 8053: for (int i = 15; l != 0; i--, l >>>= 1) { 8054: if ((l & 1) != 0) { 8055: mmuWriteLongData (m60Address = a -= 4, XEiJ.regRn[i], XEiJ.regSRS); 8056: } 8057: } 8058: } else if (XEiJ.IRP_MOVEM_ZEROS) { //Integer.numberOfTrailingZerosを使う 8059: for (int i = 15; l != 0; ) { 8060: int k = Integer.numberOfTrailingZeros (l); 8061: mmuWriteLongData (m60Address = a -= 4, XEiJ.regRn[i -= k], XEiJ.regSRS); 8062: l = l >>> k & ~1; 8063: } 8064: } 8065: m60Incremented += 4L << (arr << 3); //元に戻しておく。longのシフトカウントは6bitでマスクされる 8066: XEiJ.regRn[arr] = a; 8067: XEiJ.mpuCycleCount += t - a >> 2; //4バイト/個→1サイクル/個 8068: } else { //-(Ar)以外 8069: int a = efaCltLong (ea); 8070: int t = a; 8071: if (XEiJ.IRP_MOVEM_EXPAND) { //16回展開する 8072: if ((l & 0x0001) != 0) { 8073: mmuWriteLongData (m60Address = a, XEiJ.regRn[ 0], XEiJ.regSRS); 8074: a += 4; 8075: } 8076: if ((l & 0x0002) != 0) { 8077: mmuWriteLongData (m60Address = a, XEiJ.regRn[ 1], XEiJ.regSRS); 8078: a += 4; 8079: } 8080: if ((l & 0x0004) != 0) { 8081: mmuWriteLongData (m60Address = a, XEiJ.regRn[ 2], XEiJ.regSRS); 8082: a += 4; 8083: } 8084: if ((l & 0x0008) != 0) { 8085: mmuWriteLongData (m60Address = a, XEiJ.regRn[ 3], XEiJ.regSRS); 8086: a += 4; 8087: } 8088: if ((l & 0x0010) != 0) { 8089: mmuWriteLongData (m60Address = a, XEiJ.regRn[ 4], XEiJ.regSRS); 8090: a += 4; 8091: } 8092: if ((l & 0x0020) != 0) { 8093: mmuWriteLongData (m60Address = a, XEiJ.regRn[ 5], XEiJ.regSRS); 8094: a += 4; 8095: } 8096: if ((l & 0x0040) != 0) { 8097: mmuWriteLongData (m60Address = a, XEiJ.regRn[ 6], XEiJ.regSRS); 8098: a += 4; 8099: } 8100: if ((byte) l < 0) { //(l & 0x0080) != 0 8101: mmuWriteLongData (m60Address = a, XEiJ.regRn[ 7], XEiJ.regSRS); 8102: a += 4; 8103: } 8104: if ((l & 0x0100) != 0) { 8105: mmuWriteLongData (m60Address = a, XEiJ.regRn[ 8], XEiJ.regSRS); 8106: a += 4; 8107: } 8108: if ((l & 0x0200) != 0) { 8109: mmuWriteLongData (m60Address = a, XEiJ.regRn[ 9], XEiJ.regSRS); 8110: a += 4; 8111: } 8112: if ((l & 0x0400) != 0) { 8113: mmuWriteLongData (m60Address = a, XEiJ.regRn[10], XEiJ.regSRS); 8114: a += 4; 8115: } 8116: if ((l & 0x0800) != 0) { 8117: mmuWriteLongData (m60Address = a, XEiJ.regRn[11], XEiJ.regSRS); 8118: a += 4; 8119: } 8120: if ((l & 0x1000) != 0) { 8121: mmuWriteLongData (m60Address = a, XEiJ.regRn[12], XEiJ.regSRS); 8122: a += 4; 8123: } 8124: if ((l & 0x2000) != 0) { 8125: mmuWriteLongData (m60Address = a, XEiJ.regRn[13], XEiJ.regSRS); 8126: a += 4; 8127: } 8128: if ((l & 0x4000) != 0) { 8129: mmuWriteLongData (m60Address = a, XEiJ.regRn[14], XEiJ.regSRS); 8130: a += 4; 8131: } 8132: if ((short) l < 0) { //(l & 0x8000) != 0 8133: mmuWriteLongData (m60Address = a, XEiJ.regRn[15], XEiJ.regSRS); 8134: a += 4; 8135: } 8136: } else if (XEiJ.IRP_MOVEM_LOOP) { //16回ループする。コンパイラが展開する 8137: for (int i = 0; i <= 15; i++) { 8138: if ((l & 0x0001 << i) != 0) { 8139: mmuWriteLongData (m60Address = a, XEiJ.regRn[i], XEiJ.regSRS); 8140: a += 4; 8141: } 8142: } 8143: } else if (XEiJ.IRP_MOVEM_SHIFT_LEFT) { //0になるまで左にシフトする 8144: l = XEiJ.MPU_BITREV_TABLE_0[l & 2047] | XEiJ.MPU_BITREV_TABLE_1[l << 10 >>> 21]; //Integer.reverse(l) 8145: for (int i = 0; l != 0; i++, l <<= 1) { 8146: if (l < 0) { 8147: mmuWriteLongData (m60Address = a, XEiJ.regRn[i], XEiJ.regSRS); 8148: a += 4; 8149: } 8150: } 8151: } else if (XEiJ.IRP_MOVEM_SHIFT_RIGHT) { //0になるまで右にシフトする 8152: for (int i = 0; l != 0; i++, l >>>= 1) { 8153: if ((l & 1) != 0) { 8154: mmuWriteLongData (m60Address = a, XEiJ.regRn[i], XEiJ.regSRS); 8155: a += 4; 8156: } 8157: } 8158: } else if (XEiJ.IRP_MOVEM_ZEROS) { //Integer.numberOfTrailingZerosを使う 8159: for (int i = 0; l != 0; ) { 8160: int k = Integer.numberOfTrailingZeros (l); 8161: mmuWriteLongData (m60Address = a, XEiJ.regRn[i += k], XEiJ.regSRS); 8162: a += 4; 8163: l = l >>> k & ~1; 8164: } 8165: } 8166: XEiJ.mpuCycleCount += a - t >> 2; //4バイト/個→1サイクル/個 8167: } 8168: } 8169: } //irpMovemToMemLong 8170: 8171: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8172: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 8173: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 8174: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8175: //TST.B <ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |0100_101_000_mmm_rrr 8176: //TST.B <ea> |-|--2346|-|-UUUU|-**00| PI|0100_101_000_mmm_rrr 8177: public static void irpTstByte () throws M68kException { 8178: XEiJ.mpuCycleCount++; 8179: int ea = XEiJ.regOC & 63; 8180: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & (ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadByteSignExword ((XEiJ.regPC += 2) - 1, XEiJ.regSRS) : mmuReadByteSignData (efaAnyByte (ea), XEiJ.regSRS))]; //ccr_tst_byte。pcbs。イミディエイトを分離。アドレッシングモードに注意 8181: } //irpTstByte 8182: 8183: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8184: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 8185: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 8186: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8187: //TST.W <ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |0100_101_001_mmm_rrr 8188: //TST.W <ea> |-|--2346|-|-UUUU|-**00| A PI|0100_101_001_mmm_rrr 8189: public static void irpTstWord () throws M68kException { 8190: XEiJ.mpuCycleCount++; 8191: int ea = XEiJ.regOC & 63; 8192: int z = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) : mmuReadWordSignData (efaAnyWord (ea), XEiJ.regSRS); //pcws。イミディエイトを分離。アドレッシングモードに注意。このr[ea]はデータレジスタまたはアドレスレジスタ 8193: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (char) z - 1 >> 31 & XEiJ.REG_CCR_Z | ((short) z < 0 ? XEiJ.REG_CCR_N : 0); //ccr_tst_word 8194: } //irpTstWord 8195: 8196: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8197: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 8198: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 8199: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8200: //TST.L <ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |0100_101_010_mmm_rrr 8201: //TST.L <ea> |-|--2346|-|-UUUU|-**00| A PI|0100_101_010_mmm_rrr 8202: public static void irpTstLong () throws M68kException { 8203: XEiJ.mpuCycleCount++; 8204: int ea = XEiJ.regOC & 63; 8205: int z = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS) : mmuReadLongData (efaAnyLong (ea), XEiJ.regSRS); //pcls。イミディエイトを分離。アドレッシングモードに注意。このr[ea]はデータレジスタまたはアドレスレジスタ 8206: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 8207: } //irpTstLong 8208: 8209: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8210: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 8211: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 8212: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8213: //TAS.B <ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |0100_101_011_mmm_rrr 8214: //ILLEGAL |-|012346|-|-----|-----| |0100_101_011_111_100 8215: public static void irpTas () throws M68kException { 8216: int ea = XEiJ.regOC & 63; 8217: int z; 8218: if (ea < XEiJ.EA_AR) { //TAS.B Dr 8219: XEiJ.mpuCycleCount++; 8220: XEiJ.regRn[ea] = 0x80 | (z = XEiJ.regRn[ea]); 8221: } else { //TAS.B <mem> 8222: XEiJ.mpuCycleCount += 17; 8223: int a = efaMltByte (ea); 8224: mmuWriteByteData (a, 0x80 | (z = mmuModifyByteSignData (a, XEiJ.regSRS)), XEiJ.regSRS); 8225: } 8226: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & z]; //ccr_tst_byte 8227: } //irpTas 8228: 8229: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8230: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 8231: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 8232: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8233: //MULU.L <ea>,Dl |-|--2346|-|-UUUU|-***0|D M+-WXZPI|0100_110_000_mmm_rrr-0lll000000000hhh (h is not used) 8234: //MULU.L <ea>,Dh:Dl |-|--234S|-|-UUUU|-***0|D M+-WXZPI|0100_110_000_mmm_rrr-0lll010000000hhh (if h=l then result is not defined) 8235: //MULS.L <ea>,Dl |-|--2346|-|-UUUU|-***0|D M+-WXZPI|0100_110_000_mmm_rrr-0lll100000000hhh (h is not used) 8236: //MULS.L <ea>,Dh:Dl |-|--234S|-|-UUUU|-***0|D M+-WXZPI|0100_110_000_mmm_rrr-0lll110000000hhh (if h=l then result is not defined) 8237: public static void irpMuluMulsLong () throws M68kException { 8238: int w = mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); //pcwz。拡張ワード 8239: if ((w & ~0b0111_110_000_000_111) != 0) { 8240: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 8241: throw M68kException.m6eSignal; 8242: } 8243: if ((w & 0b0000_010_000_000_000) != 0) { //64bit積 8244: M68kException.m6eNumber = M68kException.M6E_UNIMPLEMENTED_INSTRUCTION; 8245: throw M68kException.m6eSignal; 8246: } 8247: //32bit積 8248: int s = w & 0b0000_100_000_000_000; //0=MULU,1=MULS 8249: int l = w >> 12; //被乗数,積 8250: XEiJ.mpuCycleCount += 2; 8251: int ea = XEiJ.regOC & 63; 8252: long yy = (long) (ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS) : mmuReadLongData (efaAnyLong (ea), XEiJ.regSRS)); //pcls。イミディエイトを分離 8253: long xx = (long) XEiJ.regRn[l]; 8254: if (s == 0) { //MULU 8255: long zz = (0xffffffffL & xx) * (0xffffffffL & yy); 8256: int z = XEiJ.regRn[l] = (int) zz; 8257: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | (zz >>> 32 != 0L ? XEiJ.REG_CCR_V : 0); 8258: } else { //MULS 8259: long zz = xx * yy; 8260: int z = XEiJ.regRn[l] = (int) zz; 8261: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | (z != zz ? XEiJ.REG_CCR_V : 0); 8262: } 8263: } //irpMuluMulsLong 8264: 8265: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8266: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 8267: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 8268: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8269: //DIVU.L <ea>,Dq |-|--2346|-|-UUUU|-***0|D M+-WXZPI|0100_110_001_mmm_rrr-0qqq000000000qqq 8270: //DIVUL.L <ea>,Dr:Dq |-|--2346|-|-UUUU|-***0|D M+-WXZPI|0100_110_001_mmm_rrr-0qqq000000000rrr (q is not equal to r) 8271: //DIVU.L <ea>,Dr:Dq |-|--234S|-|-UUUU|-***0|D M+-WXZPI|0100_110_001_mmm_rrr-0qqq010000000rrr (q is not equal to r) 8272: //DIVS.L <ea>,Dq |-|--2346|-|-UUUU|-***0|D M+-WXZPI|0100_110_001_mmm_rrr-0qqq100000000qqq 8273: //DIVSL.L <ea>,Dr:Dq |-|--2346|-|-UUUU|-***0|D M+-WXZPI|0100_110_001_mmm_rrr-0qqq100000000rrr (q is not equal to r) 8274: //DIVS.L <ea>,Dr:Dq |-|--234S|-|-UUUU|-***0|D M+-WXZPI|0100_110_001_mmm_rrr-0qqq110000000rrr (q is not equal to r) 8275: // 8276: //DIVS.L <ea>,Dq 8277: // 32bit被除数Dq/32bit除数<ea>→32bit商Dq 8278: // 8279: //DIVS.L <ea>,Dr:Dq 8280: // 64bit被除数Dr:Dq/32bit除数<ea>→32bit余りDr:32bit商Dq 8281: // M68000PRMでDIVS.Lのアドレッシングモードがデータ可変と書かれているのはデータの間違い 8282: // 8283: //DIVSL.L <ea>,Dr:Dq 8284: // 32bit被除数Dq/32bit除数<ea>→32bit余りDr:32bit商Dq 8285: // 8286: //DIVU.L <ea>,Dq 8287: // 32bit被除数Dq/32bit除数<ea>→32bit商Dq 8288: // 8289: //DIVU.L <ea>,Dr:Dq 8290: // 64bit被除数Dr:Dq/32bit除数<ea>→32bit余りDr:32bit商Dq 8291: // 8292: //DIVUL.L <ea>,Dr:Dq 8293: // 32bit被除数Dq/32bit除数<ea>→32bit余りDr:32bit商Dq 8294: public static void irpDivuDivsLong () throws M68kException { 8295: int w = mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); //pcwz。拡張ワード 8296: if ((w & ~0b0111_110_000_000_111) != 0) { 8297: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 8298: throw M68kException.m6eSignal; 8299: } 8300: if ((w & 0b0000_010_000_000_000) != 0) { //64bit被除数 8301: M68kException.m6eNumber = M68kException.M6E_UNIMPLEMENTED_INSTRUCTION; 8302: throw M68kException.m6eSignal; 8303: } 8304: //32bit被除数 8305: int s = w & 0b0000_100_000_000_000; //0=DIVU,1=DIVS 8306: int h = w & 7; //余り 8307: int l = w >> 12; //被除数,商 8308: int ea = XEiJ.regOC & 63; 8309: int y = ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS) : mmuReadLongData (efaAnyLong (ea), XEiJ.regSRS); //除数。pcls。イミディエイトを分離 8310: if (s == 0) { //符号なし。DIVU.L <ea>,* 8311: XEiJ.mpuCycleCount += 38; //最大 8312: long yy = (long) y & 0xffffffffL; //除数 8313: if (y == 0) { //ゼロ除算 8314: XEiJ.regCCR = (XEiJ.regCCR & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_N | XEiJ.REG_CCR_Z | XEiJ.REG_CCR_V) //XとNとZとVは変化しない 8315: ); //Cは常にクリア 8316: XEiJ.mpuCycleCount += 38 - 34; 8317: m60Address = XEiJ.regPC0; //アドレスは命令の先頭 8318: M68kException.m6eNumber = M68kException.M6E_DIVIDE_BY_ZERO; 8319: throw M68kException.m6eSignal; 8320: } //if ゼロ除算 8321: long xx = (long) XEiJ.regRn[l] & 0xffffffffL; //被除数 8322: long zz = (long) ((double) xx / (double) yy); //double→intのキャストは飽和変換で0xffffffff/0x00000001が0x7fffffffになってしまうのでdouble→longとする 8323: int z = XEiJ.regRn[l] = (int) zz; //商 8324: if (h != l) { 8325: XEiJ.regRn[h] = (int) (xx - yy * zz); //余り 8326: } 8327: XEiJ.regCCR = (XEiJ.regCCR & XEiJ.REG_CCR_X | //Xは変化しない 8328: (z < 0 ? XEiJ.REG_CCR_N : 0) | //Nは商が負のときセット、さもなくばクリア 8329: (z == 0 ? XEiJ.REG_CCR_Z : 0) //Zは商が0のときセット、さもなくばクリア 8330: ); //VとCは常にクリア 8331: } else { //符号あり。DIVS.L <ea>,* 8332: XEiJ.mpuCycleCount += 38; //最大 8333: long yy = (long) y; //除数 8334: if (y == 0) { //ゼロ除算 8335: XEiJ.regCCR = (XEiJ.regCCR & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_N | XEiJ.REG_CCR_Z | XEiJ.REG_CCR_V) //XとNとZとVは変化しない 8336: ); //Cは常にクリア 8337: XEiJ.mpuCycleCount += 38 - 34; 8338: m60Address = XEiJ.regPC0; //アドレスは命令の先頭 8339: M68kException.m6eNumber = M68kException.M6E_DIVIDE_BY_ZERO; 8340: throw M68kException.m6eSignal; 8341: } //if ゼロ除算 8342: long xx = (long) XEiJ.regRn[l]; //被除数 8343: long zz = xx / yy; //商 8344: if ((int) zz != zz) { //オーバーフローあり 8345: //Dqは変化しない 8346: XEiJ.regCCR = (XEiJ.regCCR & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_N | XEiJ.REG_CCR_Z) | //XとNとZは変化しない 8347: XEiJ.REG_CCR_V //Vは常にセット 8348: ); //Cは常にクリア 8349: } else { //オーバーフローなし 8350: int z = XEiJ.regRn[l] = (int) zz; //商 8351: if (h != l) { //DIVSL.L <ea>,Dr:Dq 8352: XEiJ.regRn[h] = (int) (xx - yy * zz); //余り 8353: } 8354: XEiJ.regCCR = (XEiJ.regCCR & XEiJ.REG_CCR_X | //Xは変化しない 8355: (z < 0 ? XEiJ.REG_CCR_N : 0) | //Nは商が負のときセット、さもなくばクリア 8356: (z == 0 ? XEiJ.REG_CCR_Z : 0) //Zは商が0のときセット、さもなくばクリア 8357: ); //VとCは常にクリア 8358: } //if オーバーフローあり/オーバーフローなし 8359: } //if 符号なし/符号あり 8360: } //irpDivuDivsLong 8361: 8362: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8363: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 8364: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 8365: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8366: //SATS.L Dr |-|------|-|-UUUU|-**00|D |0100_110_010_000_rrr (ISA_B) 8367: //MOVEM.W <ea>,<list> |-|012346|-|-----|-----| M+ WXZP |0100_110_010_mmm_rrr-llllllllllllllll 8368: // 8369: //SATS.L Dr 8370: // VがセットされていたらDrを符号が逆で絶対値が最大の値にする(直前のDrに対する演算を飽和演算にする) 8371: public static void irpMovemToRegWord () throws M68kException { 8372: int ea = XEiJ.regOC & 63; 8373: if (ea < XEiJ.EA_AR) { //SATS.L Dr 8374: XEiJ.mpuCycleCount++; 8375: int z = XEiJ.regRn[ea]; 8376: if (XEiJ.TEST_BIT_1_SHIFT ? XEiJ.regCCR << 31 - 1 < 0 : (XEiJ.regCCR & XEiJ.REG_CCR_V) != 0) { //Vがセットされているとき 8377: XEiJ.regRn[ea] = z = z >> 31 ^ 0x80000000; //符号が逆で絶対値が最大の値にする 8378: } 8379: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 8380: } else { //MOVEM.W <ea>,<list> 8381: int l = mmuReadWordZeroExword (XEiJ.regPC, XEiJ.regSRS); //pcwze。レジスタリスト。ゼロ拡張 8382: XEiJ.regPC += 2; 8383: int arr, a; 8384: if (ea >> 3 == XEiJ.MMM_MP) { //(Ar)+ 8385: arr = ea - (XEiJ.EA_MP - 8); 8386: a = m60Address = XEiJ.regRn[arr]; 8387: } else { //(Ar)+以外 8388: arr = 16; 8389: a = efaCntWord (ea); 8390: } 8391: int t = a; 8392: if (XEiJ.IRP_MOVEM_EXPAND) { //16回展開する 8393: if ((l & 0x0001) != 0) { 8394: XEiJ.regRn[ 0] = mmuReadWordSignData (m60Address = a, XEiJ.regSRS); //データレジスタも符号拡張して32bit全部書き換える 8395: a += 2; 8396: } 8397: if ((l & 0x0002) != 0) { 8398: XEiJ.regRn[ 1] = mmuReadWordSignData (m60Address = a, XEiJ.regSRS); //データレジスタも符号拡張して32bit全部書き換える 8399: a += 2; 8400: } 8401: if ((l & 0x0004) != 0) { 8402: XEiJ.regRn[ 2] = mmuReadWordSignData (m60Address = a, XEiJ.regSRS); //データレジスタも符号拡張して32bit全部書き換える 8403: a += 2; 8404: } 8405: if ((l & 0x0008) != 0) { 8406: XEiJ.regRn[ 3] = mmuReadWordSignData (m60Address = a, XEiJ.regSRS); //データレジスタも符号拡張して32bit全部書き換える 8407: a += 2; 8408: } 8409: if ((l & 0x0010) != 0) { 8410: XEiJ.regRn[ 4] = mmuReadWordSignData (m60Address = a, XEiJ.regSRS); //データレジスタも符号拡張して32bit全部書き換える 8411: a += 2; 8412: } 8413: if ((l & 0x0020) != 0) { 8414: XEiJ.regRn[ 5] = mmuReadWordSignData (m60Address = a, XEiJ.regSRS); //データレジスタも符号拡張して32bit全部書き換える 8415: a += 2; 8416: } 8417: if ((l & 0x0040) != 0) { 8418: XEiJ.regRn[ 6] = mmuReadWordSignData (m60Address = a, XEiJ.regSRS); //データレジスタも符号拡張して32bit全部書き換える 8419: a += 2; 8420: } 8421: if ((byte) l < 0) { //(l & 0x0080) != 0 8422: XEiJ.regRn[ 7] = mmuReadWordSignData (m60Address = a, XEiJ.regSRS); //データレジスタも符号拡張して32bit全部書き換える 8423: a += 2; 8424: } 8425: if ((l & 0x0100) != 0) { 8426: XEiJ.regRn[ 8] = mmuReadWordSignData (m60Address = a, XEiJ.regSRS); //符号拡張して32bit全部書き換える 8427: a += 2; 8428: } 8429: if ((l & 0x0200) != 0) { 8430: XEiJ.regRn[ 9] = mmuReadWordSignData (m60Address = a, XEiJ.regSRS); //符号拡張して32bit全部書き換える 8431: a += 2; 8432: } 8433: if ((l & 0x0400) != 0) { 8434: XEiJ.regRn[10] = mmuReadWordSignData (m60Address = a, XEiJ.regSRS); //符号拡張して32bit全部書き換える 8435: a += 2; 8436: } 8437: if ((l & 0x0800) != 0) { 8438: XEiJ.regRn[11] = mmuReadWordSignData (m60Address = a, XEiJ.regSRS); //符号拡張して32bit全部書き換える 8439: a += 2; 8440: } 8441: if ((l & 0x1000) != 0) { 8442: XEiJ.regRn[12] = mmuReadWordSignData (m60Address = a, XEiJ.regSRS); //符号拡張して32bit全部書き換える 8443: a += 2; 8444: } 8445: if ((l & 0x2000) != 0) { 8446: XEiJ.regRn[13] = mmuReadWordSignData (m60Address = a, XEiJ.regSRS); //符号拡張して32bit全部書き換える 8447: a += 2; 8448: } 8449: if ((l & 0x4000) != 0) { 8450: XEiJ.regRn[14] = mmuReadWordSignData (m60Address = a, XEiJ.regSRS); //符号拡張して32bit全部書き換える 8451: a += 2; 8452: } 8453: if ((short) l < 0) { //(l & 0x8000) != 0 8454: XEiJ.regRn[15] = mmuReadWordSignData (m60Address = a, XEiJ.regSRS); //符号拡張して32bit全部書き換える 8455: a += 2; 8456: } 8457: } else if (XEiJ.IRP_MOVEM_LOOP) { //16回ループする。コンパイラが展開する 8458: for (int i = 0; i <= 15; i++) { 8459: if ((l & 0x0001 << i) != 0) { 8460: XEiJ.regRn[i] = mmuReadWordSignData (m60Address = a, XEiJ.regSRS); //(データレジスタも)符号拡張して32bit全部書き換える 8461: a += 2; 8462: } 8463: } 8464: } else if (XEiJ.IRP_MOVEM_SHIFT_LEFT) { //0になるまで左にシフトする 8465: l = XEiJ.MPU_BITREV_TABLE_0[l & 2047] | XEiJ.MPU_BITREV_TABLE_1[l << 10 >>> 21]; //Integer.reverse(l) 8466: for (int i = 0; l != 0; i++, l <<= 1) { 8467: if (l < 0) { 8468: XEiJ.regRn[i] = mmuReadWordSignData (m60Address = a, XEiJ.regSRS); //(データレジスタも)符号拡張して32bit全部書き換える 8469: a += 2; 8470: } 8471: } 8472: } else if (XEiJ.IRP_MOVEM_SHIFT_RIGHT) { //0になるまで右にシフトする 8473: for (int i = 0; l != 0; i++, l >>>= 1) { 8474: if ((l & 1) != 0) { 8475: XEiJ.regRn[i] = mmuReadWordSignData (m60Address = a, XEiJ.regSRS); //(データレジスタも)符号拡張して32bit全部書き換える 8476: a += 2; 8477: } 8478: } 8479: } else if (XEiJ.IRP_MOVEM_ZEROS) { //Integer.numberOfTrailingZerosを使う 8480: for (int i = 0; l != 0; ) { 8481: int k = Integer.numberOfTrailingZeros (l); 8482: XEiJ.regRn[i += k] = mmuReadWordSignData (m60Address = a, XEiJ.regSRS); //(データレジスタも)符号拡張して32bit全部書き換える 8483: a += 2; 8484: l = l >>> k & ~1; 8485: } 8486: } 8487: //MOVEM.W (Ar)+,<list>で<list>にArが含まれているとき、メモリから読み出したデータを捨ててArをインクリメントする 8488: XEiJ.regRn[arr] = a; 8489: XEiJ.mpuCycleCount += a - t >> 1; //2バイト/個→1サイクル/個 8490: } 8491: } //irpMovemToRegWord 8492: 8493: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8494: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 8495: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 8496: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8497: //MOVEM.L <ea>,<list> |-|012346|-|-----|-----| M+ WXZP |0100_110_011_mmm_rrr-llllllllllllllll 8498: public static void irpMovemToRegLong () throws M68kException { 8499: int ea = XEiJ.regOC & 63; 8500: { 8501: int l = mmuReadWordZeroExword (XEiJ.regPC, XEiJ.regSRS); //pcwze。レジスタリスト。ゼロ拡張 8502: XEiJ.regPC += 2; 8503: int arr, a; 8504: if (ea >> 3 == XEiJ.MMM_MP) { //(Ar)+ 8505: arr = ea - (XEiJ.EA_MP - 8); 8506: a = m60Address = XEiJ.regRn[arr]; 8507: } else { //(Ar)+以外 8508: arr = 16; 8509: a = efaCntLong (ea); 8510: } 8511: int t = a; 8512: if (XEiJ.IRP_MOVEM_EXPAND) { //16回展開する 8513: if ((l & 0x0001) != 0) { 8514: XEiJ.regRn[ 0] = mmuReadLongData (m60Address = a, XEiJ.regSRS); 8515: a += 4; 8516: } 8517: if ((l & 0x0002) != 0) { 8518: XEiJ.regRn[ 1] = mmuReadLongData (m60Address = a, XEiJ.regSRS); 8519: a += 4; 8520: } 8521: if ((l & 0x0004) != 0) { 8522: XEiJ.regRn[ 2] = mmuReadLongData (m60Address = a, XEiJ.regSRS); 8523: a += 4; 8524: } 8525: if ((l & 0x0008) != 0) { 8526: XEiJ.regRn[ 3] = mmuReadLongData (m60Address = a, XEiJ.regSRS); 8527: a += 4; 8528: } 8529: if ((l & 0x0010) != 0) { 8530: XEiJ.regRn[ 4] = mmuReadLongData (m60Address = a, XEiJ.regSRS); 8531: a += 4; 8532: } 8533: if ((l & 0x0020) != 0) { 8534: XEiJ.regRn[ 5] = mmuReadLongData (m60Address = a, XEiJ.regSRS); 8535: a += 4; 8536: } 8537: if ((l & 0x0040) != 0) { 8538: XEiJ.regRn[ 6] = mmuReadLongData (m60Address = a, XEiJ.regSRS); 8539: a += 4; 8540: } 8541: if ((byte) l < 0) { //(l & 0x0080) != 0 8542: XEiJ.regRn[ 7] = mmuReadLongData (m60Address = a, XEiJ.regSRS); 8543: a += 4; 8544: } 8545: if ((l & 0x0100) != 0) { 8546: XEiJ.regRn[ 8] = mmuReadLongData (m60Address = a, XEiJ.regSRS); 8547: a += 4; 8548: } 8549: if ((l & 0x0200) != 0) { 8550: XEiJ.regRn[ 9] = mmuReadLongData (m60Address = a, XEiJ.regSRS); 8551: a += 4; 8552: } 8553: if ((l & 0x0400) != 0) { 8554: XEiJ.regRn[10] = mmuReadLongData (m60Address = a, XEiJ.regSRS); 8555: a += 4; 8556: } 8557: if ((l & 0x0800) != 0) { 8558: XEiJ.regRn[11] = mmuReadLongData (m60Address = a, XEiJ.regSRS); 8559: a += 4; 8560: } 8561: if ((l & 0x1000) != 0) { 8562: XEiJ.regRn[12] = mmuReadLongData (m60Address = a, XEiJ.regSRS); 8563: a += 4; 8564: } 8565: if ((l & 0x2000) != 0) { 8566: XEiJ.regRn[13] = mmuReadLongData (m60Address = a, XEiJ.regSRS); 8567: a += 4; 8568: } 8569: if ((l & 0x4000) != 0) { 8570: XEiJ.regRn[14] = mmuReadLongData (m60Address = a, XEiJ.regSRS); 8571: a += 4; 8572: } 8573: if ((short) l < 0) { //(l & 0x8000) != 0 8574: XEiJ.regRn[15] = mmuReadLongData (m60Address = a, XEiJ.regSRS); 8575: a += 4; 8576: } 8577: } else if (XEiJ.IRP_MOVEM_LOOP) { //16回ループする。コンパイラが展開する 8578: for (int i = 0; i <= 15; i++) { 8579: if ((l & 0x0001 << i) != 0) { 8580: XEiJ.regRn[i] = mmuReadLongData (m60Address = a, XEiJ.regSRS); 8581: a += 4; 8582: } 8583: } 8584: } else if (XEiJ.IRP_MOVEM_SHIFT_LEFT) { //0になるまで左にシフトする 8585: l = XEiJ.MPU_BITREV_TABLE_0[l & 2047] | XEiJ.MPU_BITREV_TABLE_1[l << 10 >>> 21]; //Integer.reverse(l) 8586: for (int i = 0; l != 0; i++, l <<= 1) { 8587: if (l < 0) { 8588: XEiJ.regRn[i] = mmuReadLongData (m60Address = a, XEiJ.regSRS); 8589: a += 4; 8590: } 8591: } 8592: } else if (XEiJ.IRP_MOVEM_SHIFT_RIGHT) { //0になるまで右にシフトする 8593: for (int i = 0; l != 0; i++, l >>>= 1) { 8594: if ((l & 1) != 0) { 8595: XEiJ.regRn[i] = mmuReadLongData (m60Address = a, XEiJ.regSRS); 8596: a += 4; 8597: } 8598: } 8599: } else if (XEiJ.IRP_MOVEM_ZEROS) { //Integer.numberOfTrailingZerosを使う 8600: for (int i = 0; l != 0; ) { 8601: int k = Integer.numberOfTrailingZeros (l); 8602: XEiJ.regRn[i += k] = mmuReadLongData (m60Address = a, XEiJ.regSRS); 8603: a += 4; 8604: l = l >>> k & ~1; 8605: } 8606: } 8607: //MOVEM.L (Ar)+,<list>で<list>にArが含まれているとき、メモリから読み出したデータを捨ててArをインクリメントする 8608: XEiJ.regRn[arr] = a; 8609: XEiJ.mpuCycleCount += a - t >> 2; //4バイト/個→1サイクル/個 8610: } 8611: } //irpMovemToRegLong 8612: 8613: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8614: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 8615: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 8616: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8617: //TRAP #<vector> |-|012346|-|-----|-----| |0100_111_001_00v_vvv 8618: public static void irpTrap () throws M68kException { 8619: irpExceptionFormat0 (XEiJ.regOC - (0b0100_111_001_000_000 - M68kException.M6E_TRAP_0_INSTRUCTION_VECTOR) << 2, XEiJ.regPC); //pcは次の命令 8620: } //irpTrap 8621: public static void irpTrap15 () throws M68kException { 8622: if ((XEiJ.regRn[0] & 255) == 0x8e) { //IOCS _BOOTINF 8623: MainMemory.mmrCheckHuman (); 8624: } 8625: irpExceptionFormat0 (M68kException.M6E_TRAP_15_INSTRUCTION_VECTOR << 2, XEiJ.regPC); //pcは次の命令 8626: } //irpTrap15 8627: 8628: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8629: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 8630: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 8631: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8632: //LINK.W Ar,#<data> |-|012346|-|-----|-----| |0100_111_001_010_rrr-{data} 8633: // 8634: //LINK.W Ar,#<data> 8635: // PEA.L (Ar);MOVEA.L A7,Ar;ADDA.W #<data>,A7と同じ 8636: // LINK.W A7,#<data>はA7をデクリメントする前の値がプッシュされ、A7に#<data>が加算される 8637: public static void irpLinkWord () throws M68kException { 8638: XEiJ.mpuCycleCount++; 8639: int o = mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); //pcws 8640: int arr = XEiJ.regOC - (0b0100_111_001_010_000 - 8); 8641: //評価順序に注意。LINK.W A7,#<data>のときプッシュするのはA7をデクリメントする前の値。wl(r[15]-=4,r[8+rrr])は不可 8642: int a = XEiJ.regRn[arr]; 8643: m60Incremented -= 4L << (7 << 3); 8644: int sp = m60Address = XEiJ.regRn[15] -= 4; 8645: mmuWriteLongData (sp, a, XEiJ.regSRS); //pushl 8646: XEiJ.regRn[arr] = sp; 8647: XEiJ.regRn[15] = sp + o; 8648: } //irpLinkWord 8649: 8650: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8651: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 8652: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 8653: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8654: //UNLK Ar |-|012346|-|-----|-----| |0100_111_001_011_rrr 8655: // 8656: //UNLK Ar 8657: // MOVEA.L Ar,A7;MOVEA.L (A7)+,Arと同じ 8658: // UNLK A7はMOVEA.L A7,A7;MOVEA.L (A7)+,A7すなわちMOVEA.L (A7),A7と同じ 8659: // ソースオペランドのポストインクリメントはデスティネーションオペランドが評価される前に完了しているとみなされる 8660: // 例えばMOVE.L (A0)+,(A0)+はMOVE.L (A0),(4,A0);ADDQ.L #8,A0と同じ 8661: // MOVEA.L (A0)+,A0はポストインクリメントされたA0が(A0)から読み出された値で上書きされるのでMOVEA.L (A0),A0と同じ 8662: // M68000PRMにUNLK Anの動作はAn→SP;(SP)→An;SP+4→SPだと書かれているがこれはn=7の場合に当てはまらない 8663: // 余談だが68040の初期のマスクセットはUNLK A7を実行すると固まるらしい 8664: public static void irpUnlk () throws M68kException { 8665: XEiJ.mpuCycleCount += 2; 8666: int arr = XEiJ.regOC - (0b0100_111_001_011_000 - 8); 8667: //評価順序に注意 8668: int sp = XEiJ.regRn[arr]; 8669: // UNLK ArはMOVEA.L Ar,A7;MOVEA.L (A7)+,Arと同じ 8670: // (A7)+がページフォルトになってリトライするとき 8671: // Arはまだ更新されておらず、リトライでMOVEA.L Ar,A7が再実行されるので、A7を巻き戻す必要はない 8672: m60Incremented += 4L << (7 << 3); //UNLK A7でページフォルトが発生したときA7が増えすぎないようにする 8673: XEiJ.regRn[15] = sp + 4; 8674: XEiJ.regRn[arr] = mmuReadLongData (m60Address = sp, XEiJ.regSRS); //popls 8675: } //irpUnlk 8676: 8677: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8678: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 8679: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 8680: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8681: //MOVE.L Ar,USP |-|012346|P|-----|-----| |0100_111_001_100_rrr 8682: public static void irpMoveToUsp () throws M68kException { 8683: if (XEiJ.regSRS == 0) { //ユーザモードのとき 8684: M68kException.m6eNumber = M68kException.M6E_PRIVILEGE_VIOLATION; 8685: throw M68kException.m6eSignal; 8686: } 8687: //以下はスーパーバイザモード 8688: XEiJ.mpuCycleCount += 2; 8689: XEiJ.mpuUSP = XEiJ.regRn[XEiJ.regOC - (0b0100_111_001_100_000 - 8)]; 8690: } //irpMoveToUsp 8691: 8692: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8693: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 8694: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 8695: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8696: //MOVE.L USP,Ar |-|012346|P|-----|-----| |0100_111_001_101_rrr 8697: public static void irpMoveFromUsp () throws M68kException { 8698: if (XEiJ.regSRS == 0) { //ユーザモードのとき 8699: M68kException.m6eNumber = M68kException.M6E_PRIVILEGE_VIOLATION; 8700: throw M68kException.m6eSignal; 8701: } 8702: //以下はスーパーバイザモード 8703: XEiJ.mpuCycleCount++; 8704: XEiJ.regRn[XEiJ.regOC - (0b0100_111_001_101_000 - 8)] = XEiJ.mpuUSP; 8705: } //irpMoveFromUsp 8706: 8707: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8708: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 8709: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 8710: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8711: //RESET |-|012346|P|-----|-----| |0100_111_001_110_000 8712: public static void irpReset () throws M68kException { 8713: if (XEiJ.regSRS == 0) { //ユーザモードのとき 8714: M68kException.m6eNumber = M68kException.M6E_PRIVILEGE_VIOLATION; 8715: throw M68kException.m6eSignal; 8716: } 8717: //以下はスーパーバイザモード 8718: XEiJ.mpuCycleCount += 45; 8719: XEiJ.irpReset (); 8720: } //irpReset 8721: 8722: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8723: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 8724: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 8725: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8726: //NOP |-|012346|-|-----|-----| |0100_111_001_110_001 8727: public static void irpNop () throws M68kException { 8728: XEiJ.mpuCycleCount += 9; 8729: //何もしない 8730: } //irpNop 8731: 8732: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8733: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 8734: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 8735: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8736: //STOP #<data> |-|012346|P|UUUUU|*****| |0100_111_001_110_010-{data} 8737: // 8738: //STOP #<data> 8739: // 1. #<data>をsrに設定する 8740: // 2. pcを進める 8741: // 3. 以下のいずれかの条件が成立するまで停止する 8742: // 3a. トレース 8743: // 3b. マスクされているレベルよりも高い割り込み要求 8744: // 3c. リセット 8745: // コアと一緒にデバイスを止めるわけにいかないので、ここでは条件が成立するまで同じ命令を繰り返すループ命令として実装する 8746: public static void irpStop () throws M68kException { 8747: if (XEiJ.regSRS == 0) { //ユーザモードのとき 8748: M68kException.m6eNumber = M68kException.M6E_PRIVILEGE_VIOLATION; 8749: throw M68kException.m6eSignal; 8750: } 8751: //以下はスーパーバイザモード 8752: XEiJ.mpuCycleCount++; 8753: irpSetSR (mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, 1)); //pcws。特権違反チェックが先 8754: if (XEiJ.mpuTraceFlag == 0) { //トレースまたはマスクされているレベルよりも高い割り込み要求がない 8755: XEiJ.regPC = XEiJ.regPC0; //ループ 8756: //任意の負荷率を100%に設定しているときSTOP命令が軽すぎると動作周波数が大きくなりすぎて割り込みがかかったとき次に進めなくなる 8757: //負荷率の計算にSTOP命令で止まっていた時間を含めないことにする 8758: XEiJ.mpuClockTime += XEiJ.TMR_FREQ * 4 / 1000000; //4μs。50MHzのとき200clk 8759: XEiJ.mpuLastNano += 4000L; 8760: } 8761: } //irpStop 8762: 8763: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8764: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 8765: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 8766: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8767: //RTE |-|012346|P|UUUUU|*****| |0100_111_001_110_011 8768: public static void irpRte () throws M68kException { 8769: if (XEiJ.regSRS == 0) { //ユーザモードのとき 8770: M68kException.m6eNumber = M68kException.M6E_PRIVILEGE_VIOLATION; 8771: throw M68kException.m6eSignal; 8772: } 8773: //以下はスーパーバイザモード 8774: XEiJ.mpuCycleCount += 17; 8775: int sp = XEiJ.regRn[15]; 8776: int newSR = mmuReadWordZeroData (m60Address = sp, 1); //popwz 8777: int newPC = mmuReadLongData (m60Address = sp + 2, 1); //popls 8778: int format = mmuReadWordZeroData (m60Address = sp + 6, 1) >> 12; 8779: if (format == 0) { //010,020,030,040,060 8780: m60Incremented += 8L << (7 << 3); 8781: XEiJ.regRn[15] = sp + 8; 8782: } else if (format == 2 || //020,030,040,060 8783: format == 3) { //040,060 8784: m60Incremented += 12L << (7 << 3); 8785: XEiJ.regRn[15] = sp + 12; 8786: } else if (format == 4) { //060 8787: m60Incremented += 16L << (7 << 3); 8788: XEiJ.regRn[15] = sp + 16; 8789: } else { 8790: M68kException.m6eNumber = M68kException.M6E_FORMAT_ERROR; 8791: throw M68kException.m6eSignal; 8792: } 8793: //irpSetSRでモードが切り替わる場合があるのでその前にr[15]を更新しておくこと 8794: irpSetSR (newSR); //ここでユーザモードに戻る場合がある。特権違反チェックが先 8795: irpSetPC (newPC); //分岐ログが新しいsrを使う。順序に注意。ここでアドレスエラーが発生する場合がある 8796: } //irpRte 8797: 8798: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8799: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 8800: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 8801: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8802: //RTD #<data> |-|-12346|-|-----|-----| |0100_111_001_110_100-{data} 8803: public static void irpRtd () throws M68kException { 8804: XEiJ.mpuCycleCount += 7; 8805: int sp = XEiJ.regRn[15]; 8806: int o = mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); //pcws 8807: int pc = mmuReadLongData (m60Address = sp, XEiJ.regSRS); //popls 8808: m60Incremented += 4L << (7 << 3); 8809: XEiJ.regRn[15] = sp + 4 + o; 8810: irpSetPC (pc); 8811: } //irpRtd 8812: 8813: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8814: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 8815: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 8816: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8817: //RTS |-|012346|-|-----|-----| |0100_111_001_110_101 8818: public static void irpRts () throws M68kException { 8819: XEiJ.mpuCycleCount += 7; 8820: int sp = XEiJ.regRn[15]; 8821: int pc = mmuReadLongData (m60Address = sp, XEiJ.regSRS); //popls 8822: m60Incremented += 4L << (7 << 3); 8823: XEiJ.regRn[15] = sp + 4; 8824: irpSetPC (pc); 8825: } //irpRts 8826: 8827: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8828: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 8829: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 8830: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8831: //TRAPV |-|012346|-|---*-|-----| |0100_111_001_110_110 8832: public static void irpTrapv () throws M68kException { 8833: if (XEiJ.TEST_BIT_1_SHIFT ? XEiJ.regCCR << 31 - 1 >= 0 : (XEiJ.regCCR & XEiJ.REG_CCR_V) == 0) { //通過 8834: XEiJ.mpuCycleCount++; 8835: } else { 8836: m60Address = XEiJ.regPC0; //アドレスは命令の先頭 8837: M68kException.m6eNumber = M68kException.M6E_TRAPV_INSTRUCTION; 8838: throw M68kException.m6eSignal; 8839: } 8840: } //irpTrapv 8841: 8842: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8843: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 8844: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 8845: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8846: //RTR |-|012346|-|UUUUU|*****| |0100_111_001_110_111 8847: public static void irpRtr () throws M68kException { 8848: XEiJ.mpuCycleCount += 8; 8849: int sp = XEiJ.regRn[15]; 8850: int w = mmuReadWordZeroData (m60Address = sp, XEiJ.regSRS); //popwz 8851: int pc = mmuReadLongData (m60Address = sp + 2, XEiJ.regSRS); //popls 8852: XEiJ.regCCR = XEiJ.REG_CCR_MASK & w; 8853: m60Incremented += 6L << (7 << 3); 8854: XEiJ.regRn[15] = sp + 6; 8855: irpSetPC (pc); 8856: } //irpRtr 8857: 8858: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8859: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 8860: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 8861: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8862: //MOVEC.L Rc,Rn |-|-12346|P|-----|-----| |0100_111_001_111_010-rnnncccccccccccc 8863: public static void irpMovecFromControl () throws M68kException { 8864: if (XEiJ.regSRS == 0) { //ユーザモードのとき 8865: M68kException.m6eNumber = M68kException.M6E_PRIVILEGE_VIOLATION; 8866: throw M68kException.m6eSignal; 8867: } 8868: //以下はスーパーバイザモード 8869: int w = mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, 1); //pcwz。拡張ワード 8870: switch (w & 0x0fff) { 8871: case 0x000: //SFC 8872: XEiJ.mpuCycleCount += 12; 8873: XEiJ.regRn[w >> 12] = XEiJ.mpuSFC; 8874: break; 8875: case 0x001: //DFC 8876: XEiJ.mpuCycleCount += 12; 8877: XEiJ.regRn[w >> 12] = XEiJ.mpuDFC; 8878: break; 8879: case 0x002: //CACR 8880: XEiJ.mpuCycleCount += 15; 8881: XEiJ.regRn[w >> 12] = XEiJ.mpuCACR & 0xf880e000; //CABCとCUBCのリードは常に0 8882: break; 8883: case 0x003: //TCR 8884: XEiJ.mpuCycleCount += 15; 8885: XEiJ.regRn[w >> 12] = mmuGetTCR (); 8886: break; 8887: case 0x004: //ITT0 8888: XEiJ.mpuCycleCount += 15; 8889: XEiJ.regRn[w >> 12] = mmuGetITT0 (); 8890: break; 8891: case 0x005: //ITT1 8892: XEiJ.mpuCycleCount += 15; 8893: XEiJ.regRn[w >> 12] = mmuGetITT1 (); 8894: break; 8895: case 0x006: //DTT0 8896: XEiJ.mpuCycleCount += 15; 8897: XEiJ.regRn[w >> 12] = mmuGetDTT0 (); 8898: break; 8899: case 0x007: //DTT1 8900: XEiJ.mpuCycleCount += 15; 8901: XEiJ.regRn[w >> 12] = mmuGetDTT1 (); 8902: break; 8903: case 0x008: //BUSCR 8904: XEiJ.mpuCycleCount += 15; 8905: XEiJ.regRn[w >> 12] = XEiJ.mpuBUSCR; 8906: break; 8907: case 0x800: //USP 8908: XEiJ.mpuCycleCount += 12; 8909: XEiJ.regRn[w >> 12] = XEiJ.mpuUSP; 8910: break; 8911: case 0x801: //VBR 8912: XEiJ.mpuCycleCount += 12; 8913: XEiJ.regRn[w >> 12] = XEiJ.mpuVBR; 8914: break; 8915: case 0x806: //URP 8916: XEiJ.mpuCycleCount += 15; 8917: XEiJ.regRn[w >> 12] = mmuGetURP ();; 8918: break; 8919: case 0x807: //SRP 8920: XEiJ.mpuCycleCount += 15; 8921: XEiJ.regRn[w >> 12] = mmuGetSRP ();; 8922: break; 8923: case 0x808: //PCR 8924: XEiJ.mpuCycleCount += 12; 8925: XEiJ.regRn[w >> 12] = XEiJ.mpuPCR; 8926: break; 8927: default: 8928: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 8929: throw M68kException.m6eSignal; 8930: } 8931: } //irpMovecFromControl 8932: 8933: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8934: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 8935: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 8936: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8937: //MOVEC.L Rn,Rc |-|-12346|P|-----|-----| |0100_111_001_111_011-rnnncccccccccccc 8938: public static void irpMovecToControl () throws M68kException { 8939: if (XEiJ.regSRS == 0) { //ユーザモードのとき 8940: M68kException.m6eNumber = M68kException.M6E_PRIVILEGE_VIOLATION; 8941: throw M68kException.m6eSignal; 8942: } 8943: //以下はスーパーバイザモード 8944: int w = mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, 1); //pcwz。拡張ワード 8945: int d = XEiJ.regRn[w >> 12]; 8946: switch (w & 0x0fff) { 8947: case 0x000: //SFC 8948: XEiJ.mpuCycleCount += 11; 8949: XEiJ.mpuSFC = d & 0x00000007; 8950: break; 8951: case 0x001: //DFC 8952: XEiJ.mpuCycleCount += 11; 8953: XEiJ.mpuDFC = d & 0x00000007; 8954: break; 8955: case 0x002: //CACR 8956: // CACR 8957: // 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 8958: // EDC NAD ESB DPI FOC 0 0 0 EBC CABC CUBC 0 0 0 0 0 EIC NAI FIC 0 0 0 0 0 0 0 0 0 0 0 0 0 8959: // bit31 EDC Enable Data Cache 8960: // データキャッシュ有効 8961: // 4ウェイセットアソシアティブ。16バイト/ライン*128ライン/セット*4セット=8KB 8962: // bit30 NAD No Allocate Mode (Data Cache) 8963: // データキャッシュでミスしても新しいキャッシュラインをアロケートしない 8964: // bit29 ESB Enable Store Buffer 8965: // ストアバッファ有効 8966: // ライトスルーおよびキャッシュ禁止インプリサイスのページの書き込みを4エントリ(16バイト)のFIFOバッファで遅延させる 8967: // 例えば4の倍数のアドレスから始まる4バイトに連続して書き込むと1回のロングの書き込みにまとめられる 8968: // bit28 DPI Disable CPUSH Invalidation 8969: // CPUSHでプッシュされたキャッシュラインを無効化しない 8970: // bit27 FOC 1/2 Cache Operation Mode Enable (Data Cache) 8971: // データキャッシュを1/2キャッシュモードにする 8972: // bit23 EBC Enable Branch Cache 8973: // 分岐キャッシュ有効 8974: // 256エントリの分岐キャッシュを用いて分岐予測を行う 8975: // 正しく予測された分岐は前後の命令に隠れて実質0サイクルで実行される 8976: // MC68060は最大3個の命令(1個の分岐命令と2個の整数命令)を1サイクルで実行できる 8977: // MC68000(10MHz)とMC68060(50MHz)の処理速度の比は局所的に100倍を超えることがある 8978: // bit22 CABC Clear All Entries in the Branch Cache 8979: // 分岐キャッシュのすべてのエントリをクリアする 8980: // 分岐命令以外の場所で分岐キャッシュがヒットしてしまったときに発生する分岐予測エラーから復帰するときに使う 8981: // CABCはライトオンリーでリードは常に0 8982: // bit21 CUBC Clear All User Entries in the Branch Cache 8983: // 分岐キャッシュのすべてのユーザエントリをクリアする 8984: // CUBCはライトオンリーでリードは常に0 8985: // bit15 EIC Enable Instruction Cache 8986: // 命令キャッシュ有効 8987: // 4ウェイセットアソシアティブ。16バイト/ライン*128ライン/セット*4セット=8KB 8988: // bit14 NAI No Allocate Mode (Instruction Cache) 8989: // 命令キャッシュでミスしても新しいキャッシュラインをアロケートしない 8990: // bit13 FIC 1/2 Cache Operation Mode Enable (Instruction Cache) 8991: // 命令キャッシュを1/2キャッシュモードにする 8992: //! 非対応 8993: XEiJ.mpuCycleCount += 14; 8994: XEiJ.mpuCACR = d & 0xf8e0e000; //CABCとCUBCは保存しておいてリードするときにマスクする 8995: { 8996: boolean cacheOn = (XEiJ.mpuCACR & 0x80008000) != 0; 8997: if (XEiJ.mpuCacheOn != cacheOn) { 8998: XEiJ.mpuCacheOn = cacheOn; 8999: XEiJ.mpuSetWait (); 9000: } 9001: } 9002: break; 9003: case 0x003: //TCR 9004: // TCR 9005: // 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 9006: // 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 E P NAD NAI FOTC FITC DCO DUO DWO DCI DUI 0 9007: // bit15 E Enable 9008: // bit14 P Page Size 9009: // bit13 NAD No Allocate Mode (Data ATC) 9010: // bit12 NAI No Allocate Mode (Instruction ATC) 9011: // bit11 FOTC 1/2-Cache Mode (Data ATC) 9012: // bit10 FITC 1/2-Cache Mode (Instruction ATC) 9013: // bit9-8 DCO Default Cache Mode (Data Cache) 9014: // bit7-6 DUO Default UPA bits (Data Cache) 9015: // bit5 DWO Default Write Protect (Data Cache) 9016: // bit4-3 DCI Default Cache Mode (Instruction Cache) 9017: // bit2-1 DUI Default UPA bits (Instruction Cache) 9018: //MMUを参照 9019: XEiJ.mpuCycleCount += 14; 9020: mmuSetTCR (d); 9021: break; 9022: case 0x004: //ITT0 9023: XEiJ.mpuCycleCount += 14; 9024: mmuSetITT0 (d); 9025: break; 9026: case 0x005: //ITT1 9027: XEiJ.mpuCycleCount += 14; 9028: mmuSetITT1 (d); 9029: break; 9030: case 0x006: //DTT0 9031: XEiJ.mpuCycleCount += 14; 9032: mmuSetDTT0 (d); 9033: break; 9034: case 0x007: //DTT1 9035: XEiJ.mpuCycleCount += 14; 9036: mmuSetDTT1 (d); 9037: break; 9038: case 0x008: //BUSCR 9039: XEiJ.mpuCycleCount += 14; 9040: XEiJ.mpuBUSCR = d & 0xf0000000; 9041: break; 9042: case 0x800: //USP 9043: XEiJ.mpuCycleCount += 11; 9044: XEiJ.mpuUSP = d; 9045: break; 9046: case 0x801: //VBR 9047: XEiJ.mpuCycleCount += 11; 9048: XEiJ.mpuVBR = d & -4; //4の倍数でないと困る 9049: break; 9050: case 0x806: //URP 9051: XEiJ.mpuCycleCount += 14; 9052: mmuSetURP (d); 9053: break; 9054: case 0x807: //SRP 9055: XEiJ.mpuCycleCount += 14; 9056: mmuSetSRP (d); 9057: break; 9058: case 0x808: //PCR 9059: // PCR 9060: // 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 9061: // 0 0 0 0 0 1 0 0 0 0 1 1 0 0 0 0 Revision Number EDEBUG Reserved DFP ESS 9062: // bit31-16 Identification 0x0430 9063: // bit15-8 Revision Number 1=F43G,5=G65V,6=E41J。偽物もあるらしい 9064: // bit7 EDEBUG Enable Debug Features 9065: // bit6-2 Reserved 9066: // bit1 DFP Disable Floating-Point Unit。浮動小数点ユニット無効 9067: // bit0 ESS Enable Superscalar Dispatch。スーパースカラ有効 9068: XEiJ.mpuCycleCount += 11; 9069: XEiJ.mpuPCR = 0x04300000 | XEiJ.MPU_060_REV << 8 | d & 0x00000083; 9070: break; 9071: default: 9072: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 9073: throw M68kException.m6eSignal; 9074: } 9075: } //irpMovecToControl 9076: 9077: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9078: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 9079: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 9080: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9081: //JSR <ea> |-|012346|-|-----|-----| M WXZP |0100_111_010_mmm_rrr 9082: //JBSR.L <label> |A|012346|-|-----|-----| |0100_111_010_111_001-{address} [JSR <label>] 9083: public static void irpJsr () throws M68kException { 9084: XEiJ.mpuCycleCount++; 9085: //評価順序に注意。実効アドレスを求めてからspをデクリメントすること 9086: int a = efaJmpJsr (XEiJ.regOC & 63); 9087: m60Incremented -= 4L << (7 << 3); 9088: int sp = m60Address = XEiJ.regRn[15] -= 4; 9089: mmuWriteLongData (sp, XEiJ.regPC, XEiJ.regSRS); //pushl 9090: irpSetPC (a); 9091: } //irpJsr 9092: 9093: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9094: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 9095: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 9096: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9097: //JMP <ea> |-|012346|-|-----|-----| M WXZP |0100_111_011_mmm_rrr 9098: //JBRA.L <label> |A|012346|-|-----|-----| |0100_111_011_111_001-{address} [JMP <label>] 9099: public static void irpJmp () throws M68kException { 9100: XEiJ.mpuCycleCount++; //0clkにしない 9101: irpSetPC (efaJmpJsr (XEiJ.regOC & 63)); 9102: } //irpJmp 9103: 9104: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9105: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 9106: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 9107: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9108: //ADDQ.B #<data>,<ea> |-|012346|-|UUUUU|*****|D M+-WXZ |0101_qqq_000_mmm_rrr 9109: //INC.B <ea> |A|012346|-|UUUUU|*****|D M+-WXZ |0101_001_000_mmm_rrr [ADDQ.B #1,<ea>] 9110: public static void irpAddqByte () throws M68kException { 9111: int ea = XEiJ.regOC & 63; 9112: int x; 9113: int y = ((XEiJ.regOC >> 9) - 1 & 7) + 1; //qqq==0?8:qqq 9114: int z; 9115: if (ea < XEiJ.EA_AR) { //ADDQ.B #<data>,Dr 9116: XEiJ.mpuCycleCount++; 9117: z = (byte) (XEiJ.regRn[ea] = ~0xff & (x = XEiJ.regRn[ea]) | 0xff & (x = (byte) x) + y); 9118: } else { //ADDQ.B #<data>,<mem> 9119: XEiJ.mpuCycleCount++; 9120: int a = efaMltByte (ea); 9121: mmuWriteByteData (a, z = (byte) ((x = mmuModifyByteSignData (a, XEiJ.regSRS)) + y), XEiJ.regSRS); 9122: } 9123: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | 9124: (~x & z) >>> 31 << 1 | 9125: (x & ~z) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_addq 9126: } //irpAddqByte 9127: 9128: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9129: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 9130: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 9131: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9132: //ADDQ.W #<data>,<ea> |-|012346|-|UUUUU|*****|D M+-WXZ |0101_qqq_001_mmm_rrr 9133: //ADDQ.W #<data>,Ar |-|012346|-|-----|-----| A |0101_qqq_001_001_rrr 9134: //INC.W <ea> |A|012346|-|UUUUU|*****|D M+-WXZ |0101_001_001_mmm_rrr [ADDQ.W #1,<ea>] 9135: //INC.W Ar |A|012346|-|-----|-----| A |0101_001_001_001_rrr [ADDQ.W #1,Ar] 9136: // 9137: //ADDQ.W #<data>,Ar 9138: // ソースを符号拡張してロングで加算する 9139: public static void irpAddqWord () throws M68kException { 9140: int ea = XEiJ.regOC & 63; 9141: int y = ((XEiJ.regOC >> 9) - 1 & 7) + 1; //qqq==0?8:qqq 9142: if (ea >> 3 == XEiJ.MMM_AR) { //ADDQ.W #<data>,Ar 9143: XEiJ.mpuCycleCount++; 9144: XEiJ.regRn[ea] += y; //ロングで計算する。このr[ea]はアドレスレジスタ 9145: //ccrは操作しない 9146: } else { 9147: int x; 9148: int z; 9149: if (ea < XEiJ.EA_AR) { //ADDQ.W #<data>,Dr 9150: XEiJ.mpuCycleCount++; 9151: z = (short) (XEiJ.regRn[ea] = ~0xffff & (x = XEiJ.regRn[ea]) | (char) ((x = (short) x) + y)); 9152: } else { //ADDQ.W #<data>,<mem> 9153: XEiJ.mpuCycleCount++; 9154: int a = efaMltWord (ea); 9155: mmuWriteWordData (a, z = (short) ((x = mmuModifyWordSignData (a, XEiJ.regSRS)) + y), XEiJ.regSRS); 9156: } 9157: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | 9158: (~x & z) >>> 31 << 1 | 9159: (x & ~z) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_addq 9160: } 9161: } //irpAddqWord 9162: 9163: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9164: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 9165: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 9166: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9167: //ADDQ.L #<data>,<ea> |-|012346|-|UUUUU|*****|D M+-WXZ |0101_qqq_010_mmm_rrr 9168: //ADDQ.L #<data>,Ar |-|012346|-|-----|-----| A |0101_qqq_010_001_rrr 9169: //INC.L <ea> |A|012346|-|UUUUU|*****|D M+-WXZ |0101_001_010_mmm_rrr [ADDQ.L #1,<ea>] 9170: //INC.L Ar |A|012346|-|-----|-----| A |0101_001_010_001_rrr [ADDQ.L #1,Ar] 9171: public static void irpAddqLong () throws M68kException { 9172: int ea = XEiJ.regOC & 63; 9173: int y = ((XEiJ.regOC >> 9) - 1 & 7) + 1; //qqq==0?8:qqq 9174: if (ea >> 3 == XEiJ.MMM_AR) { //ADDQ.L #<data>,Ar 9175: XEiJ.mpuCycleCount++; 9176: XEiJ.regRn[ea] += y; //このr[ea]はアドレスレジスタ 9177: //ccrは操作しない 9178: } else { 9179: int x; 9180: int z; 9181: if (ea < XEiJ.EA_AR) { //ADDQ.L #<data>,Dr 9182: XEiJ.mpuCycleCount++; 9183: XEiJ.regRn[ea] = z = (x = XEiJ.regRn[ea]) + y; 9184: } else { //ADDQ.L #<data>,<mem> 9185: XEiJ.mpuCycleCount++; 9186: int a = efaMltLong (ea); 9187: mmuWriteLongData (a, z = (x = mmuModifyLongData (a, XEiJ.regSRS)) + y, XEiJ.regSRS); 9188: } 9189: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | 9190: (~x & z) >>> 31 << 1 | 9191: (x & ~z) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_addq 9192: } 9193: } //irpAddqLong 9194: 9195: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9196: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 9197: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 9198: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9199: //ST.B <ea> |-|012346|-|-----|-----|D M+-WXZ |0101_000_011_mmm_rrr 9200: //SNF.B <ea> |A|012346|-|-----|-----|D M+-WXZ |0101_000_011_mmm_rrr [ST.B <ea>] 9201: //DBT.W Dr,<label> |-|012346|-|-----|-----| |0101_000_011_001_rrr-{offset} 9202: //DBNF.W Dr,<label> |A|012346|-|-----|-----| |0101_000_011_001_rrr-{offset} [DBT.W Dr,<label>] 9203: //TRAPT.W #<data> |-|--2346|-|-----|-----| |0101_000_011_111_010-{data} 9204: //TPNF.W #<data> |A|--2346|-|-----|-----| |0101_000_011_111_010-{data} [TRAPT.W #<data>] 9205: //TPT.W #<data> |A|--2346|-|-----|-----| |0101_000_011_111_010-{data} [TRAPT.W #<data>] 9206: //TRAPNF.W #<data> |A|--2346|-|-----|-----| |0101_000_011_111_010-{data} [TRAPT.W #<data>] 9207: //TRAPT.L #<data> |-|--2346|-|-----|-----| |0101_000_011_111_011-{data} 9208: //TPNF.L #<data> |A|--2346|-|-----|-----| |0101_000_011_111_011-{data} [TRAPT.L #<data>] 9209: //TPT.L #<data> |A|--2346|-|-----|-----| |0101_000_011_111_011-{data} [TRAPT.L #<data>] 9210: //TRAPNF.L #<data> |A|--2346|-|-----|-----| |0101_000_011_111_011-{data} [TRAPT.L #<data>] 9211: //TRAPT |-|--2346|-|-----|-----| |0101_000_011_111_100 9212: //TPNF |A|--2346|-|-----|-----| |0101_000_011_111_100 [TRAPT] 9213: //TPT |A|--2346|-|-----|-----| |0101_000_011_111_100 [TRAPT] 9214: //TRAPNF |A|--2346|-|-----|-----| |0101_000_011_111_100 [TRAPT] 9215: public static void irpSt () throws M68kException { 9216: int ea = XEiJ.regOC & 63; 9217: //DBT.W Dr,<label>よりもST.B Drを優先する 9218: if (ea < XEiJ.EA_AR) { //ST.B Dr 9219: XEiJ.mpuCycleCount++; 9220: XEiJ.regRn[ea] |= 0xff; 9221: } else if (ea < XEiJ.EA_MM) { //DBT.W Dr,<label> 9222: int t = XEiJ.regPC; //pc0+2 9223: XEiJ.regPC = t + 2; //pc0+4 9224: t += mmuReadWordSignExword (t, XEiJ.regSRS); //pc0+2+16bitディスプレースメント 9225: if ((t & 1) != 0) { //分岐先のアドレスが奇数 9226: //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ 9227: irpBccAddressError (t); 9228: } 9229: //条件が成立しているので通過 9230: XEiJ.mpuCycleCount += 2; 9231: } else if ((XEiJ.EAM_PW | XEiJ.EAM_PX | XEiJ.EAM_IM) << ea < 0L) { //TRAPT.W/TRAPT.L/TRAPT 9232: if (ea == 072) { //.W 9233: mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); 9234: } else if (ea == 073) { //.L 9235: mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS); 9236: } 9237: //条件が成立しているのでTRAPする 9238: m60Address = XEiJ.regPC0; //アドレスは命令の先頭 9239: M68kException.m6eNumber = M68kException.M6E_TRAPV_INSTRUCTION; 9240: throw M68kException.m6eSignal; 9241: } else { //ST.B <mem> 9242: XEiJ.mpuCycleCount++; 9243: mmuWriteByteData (efaMltByte (ea), 0xff, XEiJ.regSRS); 9244: } 9245: } //irpSt 9246: 9247: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9248: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 9249: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 9250: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9251: //SUBQ.B #<data>,<ea> |-|012346|-|UUUUU|*****|D M+-WXZ |0101_qqq_100_mmm_rrr 9252: //DEC.B <ea> |A|012346|-|UUUUU|*****|D M+-WXZ |0101_001_100_mmm_rrr [SUBQ.B #1,<ea>] 9253: public static void irpSubqByte () throws M68kException { 9254: int ea = XEiJ.regOC & 63; 9255: int x; 9256: int y = ((XEiJ.regOC >> 9) - 1 & 7) + 1; //qqq==0?8:qqq 9257: int z; 9258: if (ea < XEiJ.EA_AR) { //SUBQ.B #<data>,Dr 9259: XEiJ.mpuCycleCount++; 9260: z = (byte) (XEiJ.regRn[ea] = ~0xff & (x = XEiJ.regRn[ea]) | 0xff & (x = (byte) x) - y); 9261: } else { //SUBQ.B #<data>,<mem> 9262: XEiJ.mpuCycleCount++; 9263: int a = efaMltByte (ea); 9264: mmuWriteByteData (a, z = (byte) ((x = mmuModifyByteSignData (a, XEiJ.regSRS)) - y), XEiJ.regSRS); 9265: } 9266: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | 9267: (x & ~z) >>> 31 << 1 | 9268: (~x & z) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_subq 9269: } //irpSubqByte 9270: 9271: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9272: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 9273: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 9274: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9275: //SUBQ.W #<data>,<ea> |-|012346|-|UUUUU|*****|D M+-WXZ |0101_qqq_101_mmm_rrr 9276: //SUBQ.W #<data>,Ar |-|012346|-|-----|-----| A |0101_qqq_101_001_rrr 9277: //DEC.W <ea> |A|012346|-|UUUUU|*****|D M+-WXZ |0101_001_101_mmm_rrr [SUBQ.W #1,<ea>] 9278: //DEC.W Ar |A|012346|-|-----|-----| A |0101_001_101_001_rrr [SUBQ.W #1,Ar] 9279: // 9280: //SUBQ.W #<data>,Ar 9281: // ソースを符号拡張してロングで減算する 9282: public static void irpSubqWord () throws M68kException { 9283: int ea = XEiJ.regOC & 63; 9284: int y = ((XEiJ.regOC >> 9) - 1 & 7) + 1; //qqq==0?8:qqq 9285: if (ea >> 3 == XEiJ.MMM_AR) { //SUBQ.W #<data>,Ar 9286: XEiJ.mpuCycleCount++; 9287: XEiJ.regRn[ea] -= y; //ロングで計算する。このr[ea]はアドレスレジスタ 9288: //ccrは操作しない 9289: } else { 9290: int x; 9291: int z; 9292: if (ea < XEiJ.EA_AR) { //SUBQ.W #<data>,Dr 9293: XEiJ.mpuCycleCount++; 9294: z = (short) (XEiJ.regRn[ea] = ~0xffff & (x = XEiJ.regRn[ea]) | (char) ((x = (short) x) - y)); 9295: } else { //SUBQ.W #<data>,<mem> 9296: XEiJ.mpuCycleCount++; 9297: int a = efaMltWord (ea); 9298: mmuWriteWordData (a, z = (short) ((x = mmuModifyWordSignData (a, XEiJ.regSRS)) - y), XEiJ.regSRS); 9299: } 9300: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | 9301: (x & ~z) >>> 31 << 1 | 9302: (~x & z) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_subq 9303: } 9304: } //irpSubqWord 9305: 9306: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9307: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 9308: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 9309: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9310: //SUBQ.L #<data>,<ea> |-|012346|-|UUUUU|*****|D M+-WXZ |0101_qqq_110_mmm_rrr 9311: //SUBQ.L #<data>,Ar |-|012346|-|-----|-----| A |0101_qqq_110_001_rrr 9312: //DEC.L <ea> |A|012346|-|UUUUU|*****|D M+-WXZ |0101_001_110_mmm_rrr [SUBQ.L #1,<ea>] 9313: //DEC.L Ar |A|012346|-|-----|-----| A |0101_001_110_001_rrr [SUBQ.L #1,Ar] 9314: public static void irpSubqLong () throws M68kException { 9315: int ea = XEiJ.regOC & 63; 9316: int y = ((XEiJ.regOC >> 9) - 1 & 7) + 1; //qqq==0?8:qqq 9317: if (ea >> 3 == XEiJ.MMM_AR) { //SUBQ.L #<data>,Ar 9318: XEiJ.mpuCycleCount++; 9319: XEiJ.regRn[ea] -= y; //このr[ea]はアドレスレジスタ 9320: //ccrは操作しない 9321: } else { 9322: int x; 9323: int z; 9324: if (ea < XEiJ.EA_AR) { //SUBQ.L #<data>,Dr 9325: XEiJ.mpuCycleCount++; 9326: XEiJ.regRn[ea] = z = (x = XEiJ.regRn[ea]) - y; 9327: } else { //SUBQ.L #<data>,<mem> 9328: XEiJ.mpuCycleCount++; 9329: int a = efaMltLong (ea); 9330: mmuWriteLongData (a, z = (x = mmuModifyLongData (a, XEiJ.regSRS)) - y, XEiJ.regSRS); 9331: } 9332: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | 9333: (x & ~z) >>> 31 << 1 | 9334: (~x & z) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_subq 9335: } 9336: } //irpSubqLong 9337: 9338: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9339: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 9340: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 9341: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9342: //SF.B <ea> |-|012346|-|-----|-----|D M+-WXZ |0101_000_111_mmm_rrr 9343: //SNT.B <ea> |A|012346|-|-----|-----|D M+-WXZ |0101_000_111_mmm_rrr [SF.B <ea>] 9344: //DBF.W Dr,<label> |-|012346|-|-----|-----| |0101_000_111_001_rrr-{offset} 9345: //DBNT.W Dr,<label> |A|012346|-|-----|-----| |0101_000_111_001_rrr-{offset} [DBF.W Dr,<label>] 9346: //DBRA.W Dr,<label> |A|012346|-|-----|-----| |0101_000_111_001_rrr-{offset} [DBF.W Dr,<label>] 9347: //TRAPF.W #<data> |-|--2346|-|-----|-----| |0101_000_111_111_010-{data} 9348: //TPF.W #<data> |A|--2346|-|-----|-----| |0101_000_111_111_010-{data} [TRAPF.W #<data>] 9349: //TPNT.W #<data> |A|--2346|-|-----|-----| |0101_000_111_111_010-{data} [TRAPF.W #<data>] 9350: //TRAPNT.W #<data> |A|--2346|-|-----|-----| |0101_000_111_111_010-{data} [TRAPF.W #<data>] 9351: //TRAPF.L #<data> |-|--2346|-|-----|-----| |0101_000_111_111_011-{data} 9352: //TPF.L #<data> |A|--2346|-|-----|-----| |0101_000_111_111_011-{data} [TRAPF.L #<data>] 9353: //TPNT.L #<data> |A|--2346|-|-----|-----| |0101_000_111_111_011-{data} [TRAPF.L #<data>] 9354: //TRAPNT.L #<data> |A|--2346|-|-----|-----| |0101_000_111_111_011-{data} [TRAPF.L #<data>] 9355: //TRAPF |-|--2346|-|-----|-----| |0101_000_111_111_100 9356: //TPF |A|--2346|-|-----|-----| |0101_000_111_111_100 [TRAPF] 9357: //TPNT |A|--2346|-|-----|-----| |0101_000_111_111_100 [TRAPF] 9358: //TRAPNT |A|--2346|-|-----|-----| |0101_000_111_111_100 [TRAPF] 9359: public static void irpSf () throws M68kException { 9360: int ea = XEiJ.regOC & 63; 9361: //DBRA.W Dr,<label>よりもSF.B Drを優先する 9362: if (ea < XEiJ.EA_AR) { //SF.B Dr 9363: XEiJ.mpuCycleCount++; 9364: XEiJ.regRn[ea] &= ~0xff; 9365: } else if (ea < XEiJ.EA_MM) { //DBRA.W Dr,<label> 9366: int t = XEiJ.regPC; //pc0+2 9367: XEiJ.regPC = t + 2; //pc0+4 9368: t += mmuReadWordSignExword (t, XEiJ.regSRS); //pc0+2+16bitディスプレースメント 9369: if ((t & 1) != 0) { //分岐先のアドレスが奇数 9370: //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ 9371: irpBccAddressError (t); 9372: } 9373: //条件が成立していないのでデクリメント 9374: int rrr = XEiJ.regOC & 7; 9375: int s = XEiJ.regRn[rrr]; 9376: if ((short) s == 0) { //Drの下位16bitが0なので通過 9377: XEiJ.mpuCycleCount += 2; 9378: XEiJ.regRn[rrr] = s + 65535; 9379: } else { //Drの下位16bitが0でないので分岐 9380: XEiJ.mpuCycleCount++; 9381: XEiJ.regRn[rrr] = s - 1; //下位16bitが0でないので上位16bitは変化しない 9382: irpSetPC (t); 9383: } 9384: } else if ((XEiJ.EAM_PW | XEiJ.EAM_PX | XEiJ.EAM_IM) << ea < 0L) { //TRAPF.W/TRAPF.L/TRAPF 9385: if (ea == 072) { //.W 9386: mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); 9387: } else if (ea == 073) { //.L 9388: mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS); 9389: } 9390: //条件が成立していないのでTRAPしない 9391: XEiJ.mpuCycleCount++; 9392: } else { //SF.B <mem> 9393: XEiJ.mpuCycleCount++; 9394: mmuWriteByteData (efaMltByte (ea), 0x00, XEiJ.regSRS); 9395: } 9396: } //irpSf 9397: 9398: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9399: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 9400: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 9401: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9402: //SHI.B <ea> |-|012346|-|--*-*|-----|D M+-WXZ |0101_001_011_mmm_rrr 9403: //SNLS.B <ea> |A|012346|-|--*-*|-----|D M+-WXZ |0101_001_011_mmm_rrr [SHI.B <ea>] 9404: //DBHI.W Dr,<label> |-|012346|-|--*-*|-----| |0101_001_011_001_rrr-{offset} 9405: //DBNLS.W Dr,<label> |A|012346|-|--*-*|-----| |0101_001_011_001_rrr-{offset} [DBHI.W Dr,<label>] 9406: //TRAPHI.W #<data> |-|--2346|-|--*-*|-----| |0101_001_011_111_010-{data} 9407: //TPHI.W #<data> |A|--2346|-|--*-*|-----| |0101_001_011_111_010-{data} [TRAPHI.W #<data>] 9408: //TPNLS.W #<data> |A|--2346|-|--*-*|-----| |0101_001_011_111_010-{data} [TRAPHI.W #<data>] 9409: //TRAPNLS.W #<data> |A|--2346|-|--*-*|-----| |0101_001_011_111_010-{data} [TRAPHI.W #<data>] 9410: //TRAPHI.L #<data> |-|--2346|-|--*-*|-----| |0101_001_011_111_011-{data} 9411: //TPHI.L #<data> |A|--2346|-|--*-*|-----| |0101_001_011_111_011-{data} [TRAPHI.L #<data>] 9412: //TPNLS.L #<data> |A|--2346|-|--*-*|-----| |0101_001_011_111_011-{data} [TRAPHI.L #<data>] 9413: //TRAPNLS.L #<data> |A|--2346|-|--*-*|-----| |0101_001_011_111_011-{data} [TRAPHI.L #<data>] 9414: //TRAPHI |-|--2346|-|--*-*|-----| |0101_001_011_111_100 9415: //TPHI |A|--2346|-|--*-*|-----| |0101_001_011_111_100 [TRAPHI] 9416: //TPNLS |A|--2346|-|--*-*|-----| |0101_001_011_111_100 [TRAPHI] 9417: //TRAPNLS |A|--2346|-|--*-*|-----| |0101_001_011_111_100 [TRAPHI] 9418: public static void irpShi () throws M68kException { 9419: int ea = XEiJ.regOC & 63; 9420: if (ea >> 3 == XEiJ.MMM_AR) { //DBHI.W Dr,<label> 9421: int t = XEiJ.regPC; //pc0+2 9422: XEiJ.regPC = t + 2; //pc0+4 9423: t += mmuReadWordSignExword (t, XEiJ.regSRS); //pc0+2+16bitディスプレースメント 9424: if ((t & 1) != 0) { //分岐先のアドレスが奇数 9425: //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ 9426: irpBccAddressError (t); 9427: } 9428: if (XEiJ.MPU_CC_HI << XEiJ.regCCR < 0) { //条件が成立しているので通過 9429: XEiJ.mpuCycleCount += 2; 9430: } else { //条件が成立していないのでデクリメント 9431: int rrr = XEiJ.regOC & 7; 9432: int s = XEiJ.regRn[rrr]; 9433: if ((short) s == 0) { //Drの下位16bitが0なので通過 9434: XEiJ.mpuCycleCount += 2; 9435: XEiJ.regRn[rrr] = s + 65535; 9436: } else { //Drの下位16bitが0でないので分岐 9437: XEiJ.mpuCycleCount++; 9438: XEiJ.regRn[rrr] = s - 1; //下位16bitが0でないので上位16bitは変化しない 9439: irpSetPC (t); 9440: } 9441: } 9442: } else if (ea < XEiJ.EA_AR) { //SHI.B Dr 9443: if (XEiJ.MPU_CC_HI << XEiJ.regCCR < 0) { //セット 9444: XEiJ.mpuCycleCount++; 9445: XEiJ.regRn[ea] |= 0xff; 9446: } else { //クリア 9447: XEiJ.mpuCycleCount++; 9448: XEiJ.regRn[ea] &= ~0xff; 9449: } 9450: } else if ((XEiJ.EAM_PW | XEiJ.EAM_PX | XEiJ.EAM_IM) << ea < 0L) { //TRAPHI.W/TRAPHI.L/TRAPHI 9451: if (ea == 072) { //.W 9452: mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); 9453: } else if (ea == 073) { //.L 9454: mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS); 9455: } 9456: if (XEiJ.MPU_CC_HI << XEiJ.regCCR < 0) { 9457: //条件が成立しているのでTRAPする 9458: m60Address = XEiJ.regPC0; //アドレスは命令の先頭 9459: M68kException.m6eNumber = M68kException.M6E_TRAPV_INSTRUCTION; 9460: throw M68kException.m6eSignal; 9461: } else { 9462: //条件が成立していないのでTRAPしない 9463: XEiJ.mpuCycleCount++; 9464: } 9465: } else { //SHI.B <mem> 9466: XEiJ.mpuCycleCount++; 9467: mmuWriteByteData (efaMltByte (ea), XEiJ.MPU_CC_HI << XEiJ.regCCR >> 31, XEiJ.regSRS); 9468: } 9469: } //irpShi 9470: 9471: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9472: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 9473: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 9474: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9475: //SLS.B <ea> |-|012346|-|--*-*|-----|D M+-WXZ |0101_001_111_mmm_rrr 9476: //SNHI.B <ea> |A|012346|-|--*-*|-----|D M+-WXZ |0101_001_111_mmm_rrr [SLS.B <ea>] 9477: //DBLS.W Dr,<label> |-|012346|-|--*-*|-----| |0101_001_111_001_rrr-{offset} 9478: //DBNHI.W Dr,<label> |A|012346|-|--*-*|-----| |0101_001_111_001_rrr-{offset} [DBLS.W Dr,<label>] 9479: //TRAPLS.W #<data> |-|--2346|-|--*-*|-----| |0101_001_111_111_010-{data} 9480: //TPLS.W #<data> |A|--2346|-|--*-*|-----| |0101_001_111_111_010-{data} [TRAPLS.W #<data>] 9481: //TPNHI.W #<data> |A|--2346|-|--*-*|-----| |0101_001_111_111_010-{data} [TRAPLS.W #<data>] 9482: //TRAPNHI.W #<data> |A|--2346|-|--*-*|-----| |0101_001_111_111_010-{data} [TRAPLS.W #<data>] 9483: //TRAPLS.L #<data> |-|--2346|-|--*-*|-----| |0101_001_111_111_011-{data} 9484: //TPLS.L #<data> |A|--2346|-|--*-*|-----| |0101_001_111_111_011-{data} [TRAPLS.L #<data>] 9485: //TPNHI.L #<data> |A|--2346|-|--*-*|-----| |0101_001_111_111_011-{data} [TRAPLS.L #<data>] 9486: //TRAPNHI.L #<data> |A|--2346|-|--*-*|-----| |0101_001_111_111_011-{data} [TRAPLS.L #<data>] 9487: //TRAPLS |-|--2346|-|--*-*|-----| |0101_001_111_111_100 9488: //TPLS |A|--2346|-|--*-*|-----| |0101_001_111_111_100 [TRAPLS] 9489: //TPNHI |A|--2346|-|--*-*|-----| |0101_001_111_111_100 [TRAPLS] 9490: //TRAPNHI |A|--2346|-|--*-*|-----| |0101_001_111_111_100 [TRAPLS] 9491: public static void irpSls () throws M68kException { 9492: int ea = XEiJ.regOC & 63; 9493: if (ea >> 3 == XEiJ.MMM_AR) { //DBLS.W Dr,<label> 9494: int t = XEiJ.regPC; //pc0+2 9495: XEiJ.regPC = t + 2; //pc0+4 9496: t += mmuReadWordSignExword (t, XEiJ.regSRS); //pc0+2+16bitディスプレースメント 9497: if ((t & 1) != 0) { //分岐先のアドレスが奇数 9498: //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ 9499: irpBccAddressError (t); 9500: } 9501: if (XEiJ.MPU_CC_LS << XEiJ.regCCR < 0) { //条件が成立しているので通過 9502: XEiJ.mpuCycleCount += 2; 9503: } else { //条件が成立していないのでデクリメント 9504: int rrr = XEiJ.regOC & 7; 9505: int s = XEiJ.regRn[rrr]; 9506: if ((short) s == 0) { //Drの下位16bitが0なので通過 9507: XEiJ.mpuCycleCount += 2; 9508: XEiJ.regRn[rrr] = s + 65535; 9509: } else { //Drの下位16bitが0でないので分岐 9510: XEiJ.mpuCycleCount++; 9511: XEiJ.regRn[rrr] = s - 1; //下位16bitが0でないので上位16bitは変化しない 9512: irpSetPC (t); 9513: } 9514: } 9515: } else if (ea < XEiJ.EA_AR) { //SLS.B Dr 9516: if (XEiJ.MPU_CC_LS << XEiJ.regCCR < 0) { //セット 9517: XEiJ.mpuCycleCount++; 9518: XEiJ.regRn[ea] |= 0xff; 9519: } else { //クリア 9520: XEiJ.mpuCycleCount++; 9521: XEiJ.regRn[ea] &= ~0xff; 9522: } 9523: } else if ((XEiJ.EAM_PW | XEiJ.EAM_PX | XEiJ.EAM_IM) << ea < 0L) { //TRAPLS.W/TRAPLS.L/TRAPLS 9524: if (ea == 072) { //.W 9525: mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); 9526: } else if (ea == 073) { //.L 9527: mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS); 9528: } 9529: if (XEiJ.MPU_CC_LS << XEiJ.regCCR < 0) { 9530: //条件が成立しているのでTRAPする 9531: m60Address = XEiJ.regPC0; //アドレスは命令の先頭 9532: M68kException.m6eNumber = M68kException.M6E_TRAPV_INSTRUCTION; 9533: throw M68kException.m6eSignal; 9534: } else { 9535: //条件が成立していないのでTRAPしない 9536: XEiJ.mpuCycleCount++; 9537: } 9538: } else { //SLS.B <mem> 9539: XEiJ.mpuCycleCount++; 9540: mmuWriteByteData (efaMltByte (ea), XEiJ.MPU_CC_LS << XEiJ.regCCR >> 31, XEiJ.regSRS); 9541: } 9542: } //irpSls 9543: 9544: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9545: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 9546: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 9547: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9548: //SCC.B <ea> |-|012346|-|----*|-----|D M+-WXZ |0101_010_011_mmm_rrr 9549: //SHS.B <ea> |A|012346|-|----*|-----|D M+-WXZ |0101_010_011_mmm_rrr [SCC.B <ea>] 9550: //SNCS.B <ea> |A|012346|-|----*|-----|D M+-WXZ |0101_010_011_mmm_rrr [SCC.B <ea>] 9551: //SNLO.B <ea> |A|012346|-|----*|-----|D M+-WXZ |0101_010_011_mmm_rrr [SCC.B <ea>] 9552: //DBCC.W Dr,<label> |-|012346|-|----*|-----| |0101_010_011_001_rrr-{offset} 9553: //DBHS.W Dr,<label> |A|012346|-|----*|-----| |0101_010_011_001_rrr-{offset} [DBCC.W Dr,<label>] 9554: //DBNCS.W Dr,<label> |A|012346|-|----*|-----| |0101_010_011_001_rrr-{offset} [DBCC.W Dr,<label>] 9555: //DBNLO.W Dr,<label> |A|012346|-|----*|-----| |0101_010_011_001_rrr-{offset} [DBCC.W Dr,<label>] 9556: //TRAPCC.W #<data> |-|--2346|-|----*|-----| |0101_010_011_111_010-{data} 9557: //TPCC.W #<data> |A|--2346|-|----*|-----| |0101_010_011_111_010-{data} [TRAPCC.W #<data>] 9558: //TPHS.W #<data> |A|--2346|-|----*|-----| |0101_010_011_111_010-{data} [TRAPCC.W #<data>] 9559: //TPNCS.W #<data> |A|--2346|-|----*|-----| |0101_010_011_111_010-{data} [TRAPCC.W #<data>] 9560: //TPNLO.W #<data> |A|--2346|-|----*|-----| |0101_010_011_111_010-{data} [TRAPCC.W #<data>] 9561: //TRAPHS.W #<data> |A|--2346|-|----*|-----| |0101_010_011_111_010-{data} [TRAPCC.W #<data>] 9562: //TRAPNCS.W #<data> |A|--2346|-|----*|-----| |0101_010_011_111_010-{data} [TRAPCC.W #<data>] 9563: //TRAPNLO.W #<data> |A|--2346|-|----*|-----| |0101_010_011_111_010-{data} [TRAPCC.W #<data>] 9564: //TRAPCC.L #<data> |-|--2346|-|----*|-----| |0101_010_011_111_011-{data} 9565: //TPCC.L #<data> |A|--2346|-|----*|-----| |0101_010_011_111_011-{data} [TRAPCC.L #<data>] 9566: //TPHS.L #<data> |A|--2346|-|----*|-----| |0101_010_011_111_011-{data} [TRAPCC.L #<data>] 9567: //TPNCS.L #<data> |A|--2346|-|----*|-----| |0101_010_011_111_011-{data} [TRAPCC.L #<data>] 9568: //TPNLO.L #<data> |A|--2346|-|----*|-----| |0101_010_011_111_011-{data} [TRAPCC.L #<data>] 9569: //TRAPHS.L #<data> |A|--2346|-|----*|-----| |0101_010_011_111_011-{data} [TRAPCC.L #<data>] 9570: //TRAPNCS.L #<data> |A|--2346|-|----*|-----| |0101_010_011_111_011-{data} [TRAPCC.L #<data>] 9571: //TRAPNLO.L #<data> |A|--2346|-|----*|-----| |0101_010_011_111_011-{data} [TRAPCC.L #<data>] 9572: //TRAPCC |-|--2346|-|----*|-----| |0101_010_011_111_100 9573: //TPCC |A|--2346|-|----*|-----| |0101_010_011_111_100 [TRAPCC] 9574: //TPHS |A|--2346|-|----*|-----| |0101_010_011_111_100 [TRAPCC] 9575: //TPNCS |A|--2346|-|----*|-----| |0101_010_011_111_100 [TRAPCC] 9576: //TPNLO |A|--2346|-|----*|-----| |0101_010_011_111_100 [TRAPCC] 9577: //TRAPHS |A|--2346|-|----*|-----| |0101_010_011_111_100 [TRAPCC] 9578: //TRAPNCS |A|--2346|-|----*|-----| |0101_010_011_111_100 [TRAPCC] 9579: //TRAPNLO |A|--2346|-|----*|-----| |0101_010_011_111_100 [TRAPCC] 9580: public static void irpShs () throws M68kException { 9581: int ea = XEiJ.regOC & 63; 9582: if (ea >> 3 == XEiJ.MMM_AR) { //DBHS.W Dr,<label> 9583: int t = XEiJ.regPC; //pc0+2 9584: XEiJ.regPC = t + 2; //pc0+4 9585: t += mmuReadWordSignExword (t, XEiJ.regSRS); //pc0+2+16bitディスプレースメント 9586: if ((t & 1) != 0) { //分岐先のアドレスが奇数 9587: //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ 9588: irpBccAddressError (t); 9589: } 9590: if (XEiJ.MPU_CC_HS << XEiJ.regCCR < 0) { //条件が成立しているので通過 9591: XEiJ.mpuCycleCount += 2; 9592: } else { //条件が成立していないのでデクリメント 9593: int rrr = XEiJ.regOC & 7; 9594: int s = XEiJ.regRn[rrr]; 9595: if ((short) s == 0) { //Drの下位16bitが0なので通過 9596: XEiJ.mpuCycleCount += 2; 9597: XEiJ.regRn[rrr] = s + 65535; 9598: } else { //Drの下位16bitが0でないので分岐 9599: XEiJ.mpuCycleCount++; 9600: XEiJ.regRn[rrr] = s - 1; //下位16bitが0でないので上位16bitは変化しない 9601: irpSetPC (t); 9602: } 9603: } 9604: } else if (ea < XEiJ.EA_AR) { //SHS.B Dr 9605: if (XEiJ.MPU_CC_HS << XEiJ.regCCR < 0) { //セット 9606: XEiJ.mpuCycleCount++; 9607: XEiJ.regRn[ea] |= 0xff; 9608: } else { //クリア 9609: XEiJ.mpuCycleCount++; 9610: XEiJ.regRn[ea] &= ~0xff; 9611: } 9612: } else if ((XEiJ.EAM_PW | XEiJ.EAM_PX | XEiJ.EAM_IM) << ea < 0L) { //TRAPHS.W/TRAPHS.L/TRAPHS 9613: if (ea == 072) { //.W 9614: mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); 9615: } else if (ea == 073) { //.L 9616: mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS); 9617: } 9618: if (XEiJ.MPU_CC_HS << XEiJ.regCCR < 0) { 9619: //条件が成立しているのでTRAPする 9620: m60Address = XEiJ.regPC0; //アドレスは命令の先頭 9621: M68kException.m6eNumber = M68kException.M6E_TRAPV_INSTRUCTION; 9622: throw M68kException.m6eSignal; 9623: } else { 9624: //条件が成立していないのでTRAPしない 9625: XEiJ.mpuCycleCount++; 9626: } 9627: } else { //SHS.B <mem> 9628: XEiJ.mpuCycleCount++; 9629: mmuWriteByteData (efaMltByte (ea), XEiJ.MPU_CC_HS << XEiJ.regCCR >> 31, XEiJ.regSRS); 9630: } 9631: } //irpShs 9632: 9633: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9634: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 9635: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 9636: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9637: //SCS.B <ea> |-|012346|-|----*|-----|D M+-WXZ |0101_010_111_mmm_rrr 9638: //SLO.B <ea> |A|012346|-|----*|-----|D M+-WXZ |0101_010_111_mmm_rrr [SCS.B <ea>] 9639: //SNCC.B <ea> |A|012346|-|----*|-----|D M+-WXZ |0101_010_111_mmm_rrr [SCS.B <ea>] 9640: //SNHS.B <ea> |A|012346|-|----*|-----|D M+-WXZ |0101_010_111_mmm_rrr [SCS.B <ea>] 9641: //DBCS.W Dr,<label> |-|012346|-|----*|-----| |0101_010_111_001_rrr-{offset} 9642: //DBLO.W Dr,<label> |A|012346|-|----*|-----| |0101_010_111_001_rrr-{offset} [DBCS.W Dr,<label>] 9643: //DBNCC.W Dr,<label> |A|012346|-|----*|-----| |0101_010_111_001_rrr-{offset} [DBCS.W Dr,<label>] 9644: //DBNHS.W Dr,<label> |A|012346|-|----*|-----| |0101_010_111_001_rrr-{offset} [DBCS.W Dr,<label>] 9645: //TRAPCS.W #<data> |-|--2346|-|----*|-----| |0101_010_111_111_010-{data} 9646: //TPCS.W #<data> |A|--2346|-|----*|-----| |0101_010_111_111_010-{data} [TRAPCS.W #<data>] 9647: //TPLO.W #<data> |A|--2346|-|----*|-----| |0101_010_111_111_010-{data} [TRAPCS.W #<data>] 9648: //TPNCC.W #<data> |A|--2346|-|----*|-----| |0101_010_111_111_010-{data} [TRAPCS.W #<data>] 9649: //TPNHS.W #<data> |A|--2346|-|----*|-----| |0101_010_111_111_010-{data} [TRAPCS.W #<data>] 9650: //TRAPLO.W #<data> |A|--2346|-|----*|-----| |0101_010_111_111_010-{data} [TRAPCS.W #<data>] 9651: //TRAPNCC.W #<data> |A|--2346|-|----*|-----| |0101_010_111_111_010-{data} [TRAPCS.W #<data>] 9652: //TRAPNHS.W #<data> |A|--2346|-|----*|-----| |0101_010_111_111_010-{data} [TRAPCS.W #<data>] 9653: //TRAPCS.L #<data> |-|--2346|-|----*|-----| |0101_010_111_111_011-{data} 9654: //TPCS.L #<data> |A|--2346|-|----*|-----| |0101_010_111_111_011-{data} [TRAPCS.L #<data>] 9655: //TPLO.L #<data> |A|--2346|-|----*|-----| |0101_010_111_111_011-{data} [TRAPCS.L #<data>] 9656: //TPNCC.L #<data> |A|--2346|-|----*|-----| |0101_010_111_111_011-{data} [TRAPCS.L #<data>] 9657: //TPNHS.L #<data> |A|--2346|-|----*|-----| |0101_010_111_111_011-{data} [TRAPCS.L #<data>] 9658: //TRAPLO.L #<data> |A|--2346|-|----*|-----| |0101_010_111_111_011-{data} [TRAPCS.L #<data>] 9659: //TRAPNCC.L #<data> |A|--2346|-|----*|-----| |0101_010_111_111_011-{data} [TRAPCS.L #<data>] 9660: //TRAPNHS.L #<data> |A|--2346|-|----*|-----| |0101_010_111_111_011-{data} [TRAPCS.L #<data>] 9661: //TRAPCS |-|--2346|-|----*|-----| |0101_010_111_111_100 9662: //TPCS |A|--2346|-|----*|-----| |0101_010_111_111_100 [TRAPCS] 9663: //TPLO |A|--2346|-|----*|-----| |0101_010_111_111_100 [TRAPCS] 9664: //TPNCC |A|--2346|-|----*|-----| |0101_010_111_111_100 [TRAPCS] 9665: //TPNHS |A|--2346|-|----*|-----| |0101_010_111_111_100 [TRAPCS] 9666: //TRAPLO |A|--2346|-|----*|-----| |0101_010_111_111_100 [TRAPCS] 9667: //TRAPNCC |A|--2346|-|----*|-----| |0101_010_111_111_100 [TRAPCS] 9668: //TRAPNHS |A|--2346|-|----*|-----| |0101_010_111_111_100 [TRAPCS] 9669: public static void irpSlo () throws M68kException { 9670: int ea = XEiJ.regOC & 63; 9671: if (ea >> 3 == XEiJ.MMM_AR) { //DBLO.W Dr,<label> 9672: int t = XEiJ.regPC; //pc0+2 9673: XEiJ.regPC = t + 2; //pc0+4 9674: t += mmuReadWordSignExword (t, XEiJ.regSRS); //pc0+2+16bitディスプレースメント 9675: if ((t & 1) != 0) { //分岐先のアドレスが奇数 9676: //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ 9677: irpBccAddressError (t); 9678: } 9679: if (XEiJ.MPU_CC_LO << XEiJ.regCCR < 0) { //条件が成立しているので通過 9680: XEiJ.mpuCycleCount += 2; 9681: } else { //条件が成立していないのでデクリメント 9682: int rrr = XEiJ.regOC & 7; 9683: int s = XEiJ.regRn[rrr]; 9684: if ((short) s == 0) { //Drの下位16bitが0なので通過 9685: XEiJ.mpuCycleCount += 2; 9686: XEiJ.regRn[rrr] = s + 65535; 9687: } else { //Drの下位16bitが0でないので分岐 9688: XEiJ.mpuCycleCount++; 9689: XEiJ.regRn[rrr] = s - 1; //下位16bitが0でないので上位16bitは変化しない 9690: irpSetPC (t); 9691: } 9692: } 9693: } else if (ea < XEiJ.EA_AR) { //SLO.B Dr 9694: if (XEiJ.MPU_CC_LO << XEiJ.regCCR < 0) { //セット 9695: XEiJ.mpuCycleCount++; 9696: XEiJ.regRn[ea] |= 0xff; 9697: } else { //クリア 9698: XEiJ.mpuCycleCount++; 9699: XEiJ.regRn[ea] &= ~0xff; 9700: } 9701: } else if ((XEiJ.EAM_PW | XEiJ.EAM_PX | XEiJ.EAM_IM) << ea < 0L) { //TRAPLO.W/TRAPLO.L/TRAPLO 9702: if (ea == 072) { //.W 9703: mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); 9704: } else if (ea == 073) { //.L 9705: mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS); 9706: } 9707: if (XEiJ.MPU_CC_LO << XEiJ.regCCR < 0) { 9708: //条件が成立しているのでTRAPする 9709: m60Address = XEiJ.regPC0; //アドレスは命令の先頭 9710: M68kException.m6eNumber = M68kException.M6E_TRAPV_INSTRUCTION; 9711: throw M68kException.m6eSignal; 9712: } else { 9713: //条件が成立していないのでTRAPしない 9714: XEiJ.mpuCycleCount++; 9715: } 9716: } else { //SLO.B <mem> 9717: XEiJ.mpuCycleCount++; 9718: mmuWriteByteData (efaMltByte (ea), XEiJ.MPU_CC_LO << XEiJ.regCCR >> 31, XEiJ.regSRS); 9719: } 9720: } //irpSlo 9721: 9722: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9723: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 9724: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 9725: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9726: //SNE.B <ea> |-|012346|-|--*--|-----|D M+-WXZ |0101_011_011_mmm_rrr 9727: //SNEQ.B <ea> |A|012346|-|--*--|-----|D M+-WXZ |0101_011_011_mmm_rrr [SNE.B <ea>] 9728: //SNZ.B <ea> |A|012346|-|--*--|-----|D M+-WXZ |0101_011_011_mmm_rrr [SNE.B <ea>] 9729: //SNZE.B <ea> |A|012346|-|--*--|-----|D M+-WXZ |0101_011_011_mmm_rrr [SNE.B <ea>] 9730: //DBNE.W Dr,<label> |-|012346|-|--*--|-----| |0101_011_011_001_rrr-{offset} 9731: //DBNEQ.W Dr,<label> |A|012346|-|--*--|-----| |0101_011_011_001_rrr-{offset} [DBNE.W Dr,<label>] 9732: //DBNZ.W Dr,<label> |A|012346|-|--*--|-----| |0101_011_011_001_rrr-{offset} [DBNE.W Dr,<label>] 9733: //DBNZE.W Dr,<label> |A|012346|-|--*--|-----| |0101_011_011_001_rrr-{offset} [DBNE.W Dr,<label>] 9734: //TRAPNE.W #<data> |-|--2346|-|--*--|-----| |0101_011_011_111_010-{data} 9735: //TPNE.W #<data> |A|--2346|-|--*--|-----| |0101_011_011_111_010-{data} [TRAPNE.W #<data>] 9736: //TPNEQ.W #<data> |A|--2346|-|--*--|-----| |0101_011_011_111_010-{data} [TRAPNE.W #<data>] 9737: //TPNZ.W #<data> |A|--2346|-|--*--|-----| |0101_011_011_111_010-{data} [TRAPNE.W #<data>] 9738: //TPNZE.W #<data> |A|--2346|-|--*--|-----| |0101_011_011_111_010-{data} [TRAPNE.W #<data>] 9739: //TRAPNEQ.W #<data> |A|--2346|-|--*--|-----| |0101_011_011_111_010-{data} [TRAPNE.W #<data>] 9740: //TRAPNZ.W #<data> |A|--2346|-|--*--|-----| |0101_011_011_111_010-{data} [TRAPNE.W #<data>] 9741: //TRAPNZE.W #<data> |A|--2346|-|--*--|-----| |0101_011_011_111_010-{data} [TRAPNE.W #<data>] 9742: //TRAPNE.L #<data> |-|--2346|-|--*--|-----| |0101_011_011_111_011-{data} 9743: //TPNE.L #<data> |A|--2346|-|--*--|-----| |0101_011_011_111_011-{data} [TRAPNE.L #<data>] 9744: //TPNEQ.L #<data> |A|--2346|-|--*--|-----| |0101_011_011_111_011-{data} [TRAPNE.L #<data>] 9745: //TPNZ.L #<data> |A|--2346|-|--*--|-----| |0101_011_011_111_011-{data} [TRAPNE.L #<data>] 9746: //TPNZE.L #<data> |A|--2346|-|--*--|-----| |0101_011_011_111_011-{data} [TRAPNE.L #<data>] 9747: //TRAPNEQ.L #<data> |A|--2346|-|--*--|-----| |0101_011_011_111_011-{data} [TRAPNE.L #<data>] 9748: //TRAPNZ.L #<data> |A|--2346|-|--*--|-----| |0101_011_011_111_011-{data} [TRAPNE.L #<data>] 9749: //TRAPNZE.L #<data> |A|--2346|-|--*--|-----| |0101_011_011_111_011-{data} [TRAPNE.L #<data>] 9750: //TRAPNE |-|--2346|-|--*--|-----| |0101_011_011_111_100 9751: //TPNE |A|--2346|-|--*--|-----| |0101_011_011_111_100 [TRAPNE] 9752: //TPNEQ |A|--2346|-|--*--|-----| |0101_011_011_111_100 [TRAPNE] 9753: //TPNZ |A|--2346|-|--*--|-----| |0101_011_011_111_100 [TRAPNE] 9754: //TPNZE |A|--2346|-|--*--|-----| |0101_011_011_111_100 [TRAPNE] 9755: //TRAPNEQ |A|--2346|-|--*--|-----| |0101_011_011_111_100 [TRAPNE] 9756: //TRAPNZ |A|--2346|-|--*--|-----| |0101_011_011_111_100 [TRAPNE] 9757: //TRAPNZE |A|--2346|-|--*--|-----| |0101_011_011_111_100 [TRAPNE] 9758: public static void irpSne () throws M68kException { 9759: int ea = XEiJ.regOC & 63; 9760: if (ea >> 3 == XEiJ.MMM_AR) { //DBNE.W Dr,<label> 9761: int t = XEiJ.regPC; //pc0+2 9762: XEiJ.regPC = t + 2; //pc0+4 9763: t += mmuReadWordSignExword (t, XEiJ.regSRS); //pc0+2+16bitディスプレースメント 9764: if ((t & 1) != 0) { //分岐先のアドレスが奇数 9765: //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ 9766: irpBccAddressError (t); 9767: } 9768: if (XEiJ.MPU_CC_NE << XEiJ.regCCR < 0) { //条件が成立しているので通過 9769: XEiJ.mpuCycleCount += 2; 9770: } else { //条件が成立していないのでデクリメント 9771: int rrr = XEiJ.regOC & 7; 9772: int s = XEiJ.regRn[rrr]; 9773: if ((short) s == 0) { //Drの下位16bitが0なので通過 9774: XEiJ.mpuCycleCount += 2; 9775: XEiJ.regRn[rrr] = s + 65535; 9776: } else { //Drの下位16bitが0でないので分岐 9777: XEiJ.mpuCycleCount++; 9778: XEiJ.regRn[rrr] = s - 1; //下位16bitが0でないので上位16bitは変化しない 9779: irpSetPC (t); 9780: } 9781: } 9782: } else if (ea < XEiJ.EA_AR) { //SNE.B Dr 9783: if (XEiJ.MPU_CC_NE << XEiJ.regCCR < 0) { //セット 9784: XEiJ.mpuCycleCount++; 9785: XEiJ.regRn[ea] |= 0xff; 9786: } else { //クリア 9787: XEiJ.mpuCycleCount++; 9788: XEiJ.regRn[ea] &= ~0xff; 9789: } 9790: } else if ((XEiJ.EAM_PW | XEiJ.EAM_PX | XEiJ.EAM_IM) << ea < 0L) { //TRAPNE.W/TRAPNE.L/TRAPNE 9791: if (ea == 072) { //.W 9792: mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); 9793: } else if (ea == 073) { //.L 9794: mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS); 9795: } 9796: if (XEiJ.MPU_CC_NE << XEiJ.regCCR < 0) { 9797: //条件が成立しているのでTRAPする 9798: m60Address = XEiJ.regPC0; //アドレスは命令の先頭 9799: M68kException.m6eNumber = M68kException.M6E_TRAPV_INSTRUCTION; 9800: throw M68kException.m6eSignal; 9801: } else { 9802: //条件が成立していないのでTRAPしない 9803: XEiJ.mpuCycleCount++; 9804: } 9805: } else { //SNE.B <mem> 9806: XEiJ.mpuCycleCount++; 9807: mmuWriteByteData (efaMltByte (ea), XEiJ.MPU_CC_NE << XEiJ.regCCR >> 31, XEiJ.regSRS); 9808: } 9809: } //irpSne 9810: 9811: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9812: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 9813: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 9814: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9815: //SEQ.B <ea> |-|012346|-|--*--|-----|D M+-WXZ |0101_011_111_mmm_rrr 9816: //SNNE.B <ea> |A|012346|-|--*--|-----|D M+-WXZ |0101_011_111_mmm_rrr [SEQ.B <ea>] 9817: //SNNZ.B <ea> |A|012346|-|--*--|-----|D M+-WXZ |0101_011_111_mmm_rrr [SEQ.B <ea>] 9818: //SZE.B <ea> |A|012346|-|--*--|-----|D M+-WXZ |0101_011_111_mmm_rrr [SEQ.B <ea>] 9819: //DBEQ.W Dr,<label> |-|012346|-|--*--|-----| |0101_011_111_001_rrr-{offset} 9820: //DBNNE.W Dr,<label> |A|012346|-|--*--|-----| |0101_011_111_001_rrr-{offset} [DBEQ.W Dr,<label>] 9821: //DBNNZ.W Dr,<label> |A|012346|-|--*--|-----| |0101_011_111_001_rrr-{offset} [DBEQ.W Dr,<label>] 9822: //DBZE.W Dr,<label> |A|012346|-|--*--|-----| |0101_011_111_001_rrr-{offset} [DBEQ.W Dr,<label>] 9823: //TRAPEQ.W #<data> |-|--2346|-|--*--|-----| |0101_011_111_111_010-{data} 9824: //TPEQ.W #<data> |A|--2346|-|--*--|-----| |0101_011_111_111_010-{data} [TRAPEQ.W #<data>] 9825: //TPNNE.W #<data> |A|--2346|-|--*--|-----| |0101_011_111_111_010-{data} [TRAPEQ.W #<data>] 9826: //TPNNZ.W #<data> |A|--2346|-|--*--|-----| |0101_011_111_111_010-{data} [TRAPEQ.W #<data>] 9827: //TPZE.W #<data> |A|--2346|-|--*--|-----| |0101_011_111_111_010-{data} [TRAPEQ.W #<data>] 9828: //TRAPNNE.W #<data> |A|--2346|-|--*--|-----| |0101_011_111_111_010-{data} [TRAPEQ.W #<data>] 9829: //TRAPNNZ.W #<data> |A|--2346|-|--*--|-----| |0101_011_111_111_010-{data} [TRAPEQ.W #<data>] 9830: //TRAPZE.W #<data> |A|--2346|-|--*--|-----| |0101_011_111_111_010-{data} [TRAPEQ.W #<data>] 9831: //TRAPEQ.L #<data> |-|--2346|-|--*--|-----| |0101_011_111_111_011-{data} 9832: //TPEQ.L #<data> |A|--2346|-|--*--|-----| |0101_011_111_111_011-{data} [TRAPEQ.L #<data>] 9833: //TPNNE.L #<data> |A|--2346|-|--*--|-----| |0101_011_111_111_011-{data} [TRAPEQ.L #<data>] 9834: //TPNNZ.L #<data> |A|--2346|-|--*--|-----| |0101_011_111_111_011-{data} [TRAPEQ.L #<data>] 9835: //TPZE.L #<data> |A|--2346|-|--*--|-----| |0101_011_111_111_011-{data} [TRAPEQ.L #<data>] 9836: //TRAPNNE.L #<data> |A|--2346|-|--*--|-----| |0101_011_111_111_011-{data} [TRAPEQ.L #<data>] 9837: //TRAPNNZ.L #<data> |A|--2346|-|--*--|-----| |0101_011_111_111_011-{data} [TRAPEQ.L #<data>] 9838: //TRAPZE.L #<data> |A|--2346|-|--*--|-----| |0101_011_111_111_011-{data} [TRAPEQ.L #<data>] 9839: //TRAPEQ |-|--2346|-|--*--|-----| |0101_011_111_111_100 9840: //TPEQ |A|--2346|-|--*--|-----| |0101_011_111_111_100 [TRAPEQ] 9841: //TPNNE |A|--2346|-|--*--|-----| |0101_011_111_111_100 [TRAPEQ] 9842: //TPNNZ |A|--2346|-|--*--|-----| |0101_011_111_111_100 [TRAPEQ] 9843: //TPZE |A|--2346|-|--*--|-----| |0101_011_111_111_100 [TRAPEQ] 9844: //TRAPNNE |A|--2346|-|--*--|-----| |0101_011_111_111_100 [TRAPEQ] 9845: //TRAPNNZ |A|--2346|-|--*--|-----| |0101_011_111_111_100 [TRAPEQ] 9846: //TRAPZE |A|--2346|-|--*--|-----| |0101_011_111_111_100 [TRAPEQ] 9847: public static void irpSeq () throws M68kException { 9848: int ea = XEiJ.regOC & 63; 9849: if (ea >> 3 == XEiJ.MMM_AR) { //DBEQ.W Dr,<label> 9850: int t = XEiJ.regPC; //pc0+2 9851: XEiJ.regPC = t + 2; //pc0+4 9852: t += mmuReadWordSignExword (t, XEiJ.regSRS); //pc0+2+16bitディスプレースメント 9853: if ((t & 1) != 0) { //分岐先のアドレスが奇数 9854: //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ 9855: irpBccAddressError (t); 9856: } 9857: if (XEiJ.MPU_CC_EQ << XEiJ.regCCR < 0) { //条件が成立しているので通過 9858: XEiJ.mpuCycleCount += 2; 9859: } else { //条件が成立していないのでデクリメント 9860: int rrr = XEiJ.regOC & 7; 9861: int s = XEiJ.regRn[rrr]; 9862: if ((short) s == 0) { //Drの下位16bitが0なので通過 9863: XEiJ.mpuCycleCount += 2; 9864: XEiJ.regRn[rrr] = s + 65535; 9865: } else { //Drの下位16bitが0でないので分岐 9866: XEiJ.mpuCycleCount++; 9867: XEiJ.regRn[rrr] = s - 1; //下位16bitが0でないので上位16bitは変化しない 9868: irpSetPC (t); 9869: } 9870: } 9871: } else if (ea < XEiJ.EA_AR) { //SEQ.B Dr 9872: if (XEiJ.MPU_CC_EQ << XEiJ.regCCR < 0) { //セット 9873: XEiJ.mpuCycleCount++; 9874: XEiJ.regRn[ea] |= 0xff; 9875: } else { //クリア 9876: XEiJ.mpuCycleCount++; 9877: XEiJ.regRn[ea] &= ~0xff; 9878: } 9879: } else if ((XEiJ.EAM_PW | XEiJ.EAM_PX | XEiJ.EAM_IM) << ea < 0L) { //TRAPEQ.W/TRAPEQ.L/TRAPEQ 9880: if (ea == 072) { //.W 9881: mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); 9882: } else if (ea == 073) { //.L 9883: mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS); 9884: } 9885: if (XEiJ.MPU_CC_EQ << XEiJ.regCCR < 0) { 9886: //条件が成立しているのでTRAPする 9887: m60Address = XEiJ.regPC0; //アドレスは命令の先頭 9888: M68kException.m6eNumber = M68kException.M6E_TRAPV_INSTRUCTION; 9889: throw M68kException.m6eSignal; 9890: } else { 9891: //条件が成立していないのでTRAPしない 9892: XEiJ.mpuCycleCount++; 9893: } 9894: } else { //SEQ.B <mem> 9895: XEiJ.mpuCycleCount++; 9896: mmuWriteByteData (efaMltByte (ea), XEiJ.MPU_CC_EQ << XEiJ.regCCR >> 31, XEiJ.regSRS); 9897: } 9898: } //irpSeq 9899: 9900: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9901: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 9902: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 9903: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9904: //SVC.B <ea> |-|012346|-|---*-|-----|D M+-WXZ |0101_100_011_mmm_rrr 9905: //SNVS.B <ea> |A|012346|-|---*-|-----|D M+-WXZ |0101_100_011_mmm_rrr [SVC.B <ea>] 9906: //DBVC.W Dr,<label> |-|012346|-|---*-|-----| |0101_100_011_001_rrr-{offset} 9907: //DBNVS.W Dr,<label> |A|012346|-|---*-|-----| |0101_100_011_001_rrr-{offset} [DBVC.W Dr,<label>] 9908: //TRAPVC.W #<data> |-|--2346|-|---*-|-----| |0101_100_011_111_010-{data} 9909: //TPNVS.W #<data> |A|--2346|-|---*-|-----| |0101_100_011_111_010-{data} [TRAPVC.W #<data>] 9910: //TPVC.W #<data> |A|--2346|-|---*-|-----| |0101_100_011_111_010-{data} [TRAPVC.W #<data>] 9911: //TRAPNVS.W #<data> |A|--2346|-|---*-|-----| |0101_100_011_111_010-{data} [TRAPVC.W #<data>] 9912: //TRAPVC.L #<data> |-|--2346|-|---*-|-----| |0101_100_011_111_011-{data} 9913: //TPNVS.L #<data> |A|--2346|-|---*-|-----| |0101_100_011_111_011-{data} [TRAPVC.L #<data>] 9914: //TPVC.L #<data> |A|--2346|-|---*-|-----| |0101_100_011_111_011-{data} [TRAPVC.L #<data>] 9915: //TRAPNVS.L #<data> |A|--2346|-|---*-|-----| |0101_100_011_111_011-{data} [TRAPVC.L #<data>] 9916: //TRAPVC |-|--2346|-|---*-|-----| |0101_100_011_111_100 9917: //TPNVS |A|--2346|-|---*-|-----| |0101_100_011_111_100 [TRAPVC] 9918: //TPVC |A|--2346|-|---*-|-----| |0101_100_011_111_100 [TRAPVC] 9919: //TRAPNVS |A|--2346|-|---*-|-----| |0101_100_011_111_100 [TRAPVC] 9920: public static void irpSvc () throws M68kException { 9921: int ea = XEiJ.regOC & 63; 9922: if (ea >> 3 == XEiJ.MMM_AR) { //DBVC.W Dr,<label> 9923: int t = XEiJ.regPC; //pc0+2 9924: XEiJ.regPC = t + 2; //pc0+4 9925: t += mmuReadWordSignExword (t, XEiJ.regSRS); //pc0+2+16bitディスプレースメント 9926: if ((t & 1) != 0) { //分岐先のアドレスが奇数 9927: //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ 9928: irpBccAddressError (t); 9929: } 9930: if (XEiJ.MPU_CC_VC << XEiJ.regCCR < 0) { //条件が成立しているので通過 9931: XEiJ.mpuCycleCount += 2; 9932: } else { //条件が成立していないのでデクリメント 9933: int rrr = XEiJ.regOC & 7; 9934: int s = XEiJ.regRn[rrr]; 9935: if ((short) s == 0) { //Drの下位16bitが0なので通過 9936: XEiJ.mpuCycleCount += 2; 9937: XEiJ.regRn[rrr] = s + 65535; 9938: } else { //Drの下位16bitが0でないので分岐 9939: XEiJ.mpuCycleCount++; 9940: XEiJ.regRn[rrr] = s - 1; //下位16bitが0でないので上位16bitは変化しない 9941: irpSetPC (t); 9942: } 9943: } 9944: } else if (ea < XEiJ.EA_AR) { //SVC.B Dr 9945: if (XEiJ.MPU_CC_VC << XEiJ.regCCR < 0) { //セット 9946: XEiJ.mpuCycleCount++; 9947: XEiJ.regRn[ea] |= 0xff; 9948: } else { //クリア 9949: XEiJ.mpuCycleCount++; 9950: XEiJ.regRn[ea] &= ~0xff; 9951: } 9952: } else if ((XEiJ.EAM_PW | XEiJ.EAM_PX | XEiJ.EAM_IM) << ea < 0L) { //TRAPVC.W/TRAPVC.L/TRAPVC 9953: if (ea == 072) { //.W 9954: mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); 9955: } else if (ea == 073) { //.L 9956: mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS); 9957: } 9958: if (XEiJ.MPU_CC_VC << XEiJ.regCCR < 0) { 9959: //条件が成立しているのでTRAPする 9960: m60Address = XEiJ.regPC0; //アドレスは命令の先頭 9961: M68kException.m6eNumber = M68kException.M6E_TRAPV_INSTRUCTION; 9962: throw M68kException.m6eSignal; 9963: } else { 9964: //条件が成立していないのでTRAPしない 9965: XEiJ.mpuCycleCount++; 9966: } 9967: } else { //SVC.B <mem> 9968: XEiJ.mpuCycleCount++; 9969: mmuWriteByteData (efaMltByte (ea), XEiJ.MPU_CC_VC << XEiJ.regCCR >> 31, XEiJ.regSRS); 9970: } 9971: } //irpSvc 9972: 9973: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9974: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 9975: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 9976: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9977: //SVS.B <ea> |-|012346|-|---*-|-----|D M+-WXZ |0101_100_111_mmm_rrr 9978: //SNVC.B <ea> |A|012346|-|---*-|-----|D M+-WXZ |0101_100_111_mmm_rrr [SVS.B <ea>] 9979: //DBVS.W Dr,<label> |-|012346|-|---*-|-----| |0101_100_111_001_rrr-{offset} 9980: //DBNVC.W Dr,<label> |A|012346|-|---*-|-----| |0101_100_111_001_rrr-{offset} [DBVS.W Dr,<label>] 9981: //TRAPVS.W #<data> |-|--2346|-|---*-|-----| |0101_100_111_111_010-{data} 9982: //TPNVC.W #<data> |A|--2346|-|---*-|-----| |0101_100_111_111_010-{data} [TRAPVS.W #<data>] 9983: //TPVS.W #<data> |A|--2346|-|---*-|-----| |0101_100_111_111_010-{data} [TRAPVS.W #<data>] 9984: //TRAPNVC.W #<data> |A|--2346|-|---*-|-----| |0101_100_111_111_010-{data} [TRAPVS.W #<data>] 9985: //TRAPVS.L #<data> |-|--2346|-|---*-|-----| |0101_100_111_111_011-{data} 9986: //TPNVC.L #<data> |A|--2346|-|---*-|-----| |0101_100_111_111_011-{data} [TRAPVS.L #<data>] 9987: //TPVS.L #<data> |A|--2346|-|---*-|-----| |0101_100_111_111_011-{data} [TRAPVS.L #<data>] 9988: //TRAPNVC.L #<data> |A|--2346|-|---*-|-----| |0101_100_111_111_011-{data} [TRAPVS.L #<data>] 9989: //TRAPVS |-|--2346|-|---*-|-----| |0101_100_111_111_100 9990: //TPNVC |A|--2346|-|---*-|-----| |0101_100_111_111_100 [TRAPVS] 9991: //TPVS |A|--2346|-|---*-|-----| |0101_100_111_111_100 [TRAPVS] 9992: //TRAPNVC |A|--2346|-|---*-|-----| |0101_100_111_111_100 [TRAPVS] 9993: public static void irpSvs () throws M68kException { 9994: int ea = XEiJ.regOC & 63; 9995: if (ea >> 3 == XEiJ.MMM_AR) { //DBVS.W Dr,<label> 9996: int t = XEiJ.regPC; //pc0+2 9997: XEiJ.regPC = t + 2; //pc0+4 9998: t += mmuReadWordSignExword (t, XEiJ.regSRS); //pc0+2+16bitディスプレースメント 9999: if ((t & 1) != 0) { //分岐先のアドレスが奇数 10000: //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ 10001: irpBccAddressError (t); 10002: } 10003: if (XEiJ.MPU_CC_VS << XEiJ.regCCR < 0) { //条件が成立しているので通過 10004: XEiJ.mpuCycleCount += 2; 10005: } else { //条件が成立していないのでデクリメント 10006: int rrr = XEiJ.regOC & 7; 10007: int s = XEiJ.regRn[rrr]; 10008: if ((short) s == 0) { //Drの下位16bitが0なので通過 10009: XEiJ.mpuCycleCount += 2; 10010: XEiJ.regRn[rrr] = s + 65535; 10011: } else { //Drの下位16bitが0でないので分岐 10012: XEiJ.mpuCycleCount++; 10013: XEiJ.regRn[rrr] = s - 1; //下位16bitが0でないので上位16bitは変化しない 10014: irpSetPC (t); 10015: } 10016: } 10017: } else if (ea < XEiJ.EA_AR) { //SVS.B Dr 10018: if (XEiJ.MPU_CC_VS << XEiJ.regCCR < 0) { //セット 10019: XEiJ.mpuCycleCount++; 10020: XEiJ.regRn[ea] |= 0xff; 10021: } else { //クリア 10022: XEiJ.mpuCycleCount++; 10023: XEiJ.regRn[ea] &= ~0xff; 10024: } 10025: } else if ((XEiJ.EAM_PW | XEiJ.EAM_PX | XEiJ.EAM_IM) << ea < 0L) { //TRAPVS.W/TRAPVS.L/TRAPVS 10026: if (ea == 072) { //.W 10027: mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); 10028: } else if (ea == 073) { //.L 10029: mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS); 10030: } 10031: if (XEiJ.MPU_CC_VS << XEiJ.regCCR < 0) { 10032: //条件が成立しているのでTRAPする 10033: m60Address = XEiJ.regPC0; //アドレスは命令の先頭 10034: M68kException.m6eNumber = M68kException.M6E_TRAPV_INSTRUCTION; 10035: throw M68kException.m6eSignal; 10036: } else { 10037: //条件が成立していないのでTRAPしない 10038: XEiJ.mpuCycleCount++; 10039: } 10040: } else { //SVS.B <mem> 10041: XEiJ.mpuCycleCount++; 10042: mmuWriteByteData (efaMltByte (ea), XEiJ.MPU_CC_VS << XEiJ.regCCR >> 31, XEiJ.regSRS); 10043: } 10044: } //irpSvs 10045: 10046: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10047: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 10048: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 10049: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10050: //SPL.B <ea> |-|012346|-|-*---|-----|D M+-WXZ |0101_101_011_mmm_rrr 10051: //SNMI.B <ea> |A|012346|-|-*---|-----|D M+-WXZ |0101_101_011_mmm_rrr [SPL.B <ea>] 10052: //DBPL.W Dr,<label> |-|012346|-|-*---|-----| |0101_101_011_001_rrr-{offset} 10053: //DBNMI.W Dr,<label> |A|012346|-|-*---|-----| |0101_101_011_001_rrr-{offset} [DBPL.W Dr,<label>] 10054: //TRAPPL.W #<data> |-|--2346|-|-*---|-----| |0101_101_011_111_010-{data} 10055: //TPNMI.W #<data> |A|--2346|-|-*---|-----| |0101_101_011_111_010-{data} [TRAPPL.W #<data>] 10056: //TPPL.W #<data> |A|--2346|-|-*---|-----| |0101_101_011_111_010-{data} [TRAPPL.W #<data>] 10057: //TRAPNMI.W #<data> |A|--2346|-|-*---|-----| |0101_101_011_111_010-{data} [TRAPPL.W #<data>] 10058: //TRAPPL.L #<data> |-|--2346|-|-*---|-----| |0101_101_011_111_011-{data} 10059: //TPNMI.L #<data> |A|--2346|-|-*---|-----| |0101_101_011_111_011-{data} [TRAPPL.L #<data>] 10060: //TPPL.L #<data> |A|--2346|-|-*---|-----| |0101_101_011_111_011-{data} [TRAPPL.L #<data>] 10061: //TRAPNMI.L #<data> |A|--2346|-|-*---|-----| |0101_101_011_111_011-{data} [TRAPPL.L #<data>] 10062: //TRAPPL |-|--2346|-|-*---|-----| |0101_101_011_111_100 10063: //TPNMI |A|--2346|-|-*---|-----| |0101_101_011_111_100 [TRAPPL] 10064: //TPPL |A|--2346|-|-*---|-----| |0101_101_011_111_100 [TRAPPL] 10065: //TRAPNMI |A|--2346|-|-*---|-----| |0101_101_011_111_100 [TRAPPL] 10066: public static void irpSpl () throws M68kException { 10067: int ea = XEiJ.regOC & 63; 10068: if (ea >> 3 == XEiJ.MMM_AR) { //DBPL.W Dr,<label> 10069: int t = XEiJ.regPC; //pc0+2 10070: XEiJ.regPC = t + 2; //pc0+4 10071: t += mmuReadWordSignExword (t, XEiJ.regSRS); //pc0+2+16bitディスプレースメント 10072: if ((t & 1) != 0) { //分岐先のアドレスが奇数 10073: //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ 10074: irpBccAddressError (t); 10075: } 10076: if (XEiJ.MPU_CC_PL << XEiJ.regCCR < 0) { //条件が成立しているので通過 10077: XEiJ.mpuCycleCount += 2; 10078: } else { //条件が成立していないのでデクリメント 10079: int rrr = XEiJ.regOC & 7; 10080: int s = XEiJ.regRn[rrr]; 10081: if ((short) s == 0) { //Drの下位16bitが0なので通過 10082: XEiJ.mpuCycleCount += 2; 10083: XEiJ.regRn[rrr] = s + 65535; 10084: } else { //Drの下位16bitが0でないので分岐 10085: XEiJ.mpuCycleCount++; 10086: XEiJ.regRn[rrr] = s - 1; //下位16bitが0でないので上位16bitは変化しない 10087: irpSetPC (t); 10088: } 10089: } 10090: } else if (ea < XEiJ.EA_AR) { //SPL.B Dr 10091: if (XEiJ.MPU_CC_PL << XEiJ.regCCR < 0) { //セット 10092: XEiJ.mpuCycleCount++; 10093: XEiJ.regRn[ea] |= 0xff; 10094: } else { //クリア 10095: XEiJ.mpuCycleCount++; 10096: XEiJ.regRn[ea] &= ~0xff; 10097: } 10098: } else if ((XEiJ.EAM_PW | XEiJ.EAM_PX | XEiJ.EAM_IM) << ea < 0L) { //TRAPPL.W/TRAPPL.L/TRAPPL 10099: if (ea == 072) { //.W 10100: mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); 10101: } else if (ea == 073) { //.L 10102: mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS); 10103: } 10104: if (XEiJ.MPU_CC_PL << XEiJ.regCCR < 0) { 10105: //条件が成立しているのでTRAPする 10106: m60Address = XEiJ.regPC0; //アドレスは命令の先頭 10107: M68kException.m6eNumber = M68kException.M6E_TRAPV_INSTRUCTION; 10108: throw M68kException.m6eSignal; 10109: } else { 10110: //条件が成立していないのでTRAPしない 10111: XEiJ.mpuCycleCount++; 10112: } 10113: } else { //SPL.B <mem> 10114: XEiJ.mpuCycleCount++; 10115: mmuWriteByteData (efaMltByte (ea), XEiJ.MPU_CC_PL << XEiJ.regCCR >> 31, XEiJ.regSRS); 10116: } 10117: } //irpSpl 10118: 10119: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10120: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 10121: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 10122: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10123: //SMI.B <ea> |-|012346|-|-*---|-----|D M+-WXZ |0101_101_111_mmm_rrr 10124: //SNPL.B <ea> |A|012346|-|-*---|-----|D M+-WXZ |0101_101_111_mmm_rrr [SMI.B <ea>] 10125: //DBMI.W Dr,<label> |-|012346|-|-*---|-----| |0101_101_111_001_rrr-{offset} 10126: //DBNPL.W Dr,<label> |A|012346|-|-*---|-----| |0101_101_111_001_rrr-{offset} [DBMI.W Dr,<label>] 10127: //TRAPMI.W #<data> |-|--2346|-|-*---|-----| |0101_101_111_111_010-{data} 10128: //TPMI.W #<data> |A|--2346|-|-*---|-----| |0101_101_111_111_010-{data} [TRAPMI.W #<data>] 10129: //TPNPL.W #<data> |A|--2346|-|-*---|-----| |0101_101_111_111_010-{data} [TRAPMI.W #<data>] 10130: //TRAPNPL.W #<data> |A|--2346|-|-*---|-----| |0101_101_111_111_010-{data} [TRAPMI.W #<data>] 10131: //TRAPMI.L #<data> |-|--2346|-|-*---|-----| |0101_101_111_111_011-{data} 10132: //TPMI.L #<data> |A|--2346|-|-*---|-----| |0101_101_111_111_011-{data} [TRAPMI.L #<data>] 10133: //TPNPL.L #<data> |A|--2346|-|-*---|-----| |0101_101_111_111_011-{data} [TRAPMI.L #<data>] 10134: //TRAPNPL.L #<data> |A|--2346|-|-*---|-----| |0101_101_111_111_011-{data} [TRAPMI.L #<data>] 10135: //TRAPMI |-|--2346|-|-*---|-----| |0101_101_111_111_100 10136: //TPMI |A|--2346|-|-*---|-----| |0101_101_111_111_100 [TRAPMI] 10137: //TPNPL |A|--2346|-|-*---|-----| |0101_101_111_111_100 [TRAPMI] 10138: //TRAPNPL |A|--2346|-|-*---|-----| |0101_101_111_111_100 [TRAPMI] 10139: public static void irpSmi () throws M68kException { 10140: int ea = XEiJ.regOC & 63; 10141: if (ea >> 3 == XEiJ.MMM_AR) { //DBMI.W Dr,<label> 10142: int t = XEiJ.regPC; //pc0+2 10143: XEiJ.regPC = t + 2; //pc0+4 10144: t += mmuReadWordSignExword (t, XEiJ.regSRS); //pc0+2+16bitディスプレースメント 10145: if ((t & 1) != 0) { //分岐先のアドレスが奇数 10146: //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ 10147: irpBccAddressError (t); 10148: } 10149: if (XEiJ.MPU_CC_MI << XEiJ.regCCR < 0) { //条件が成立しているので通過 10150: XEiJ.mpuCycleCount += 2; 10151: } else { //条件が成立していないのでデクリメント 10152: int rrr = XEiJ.regOC & 7; 10153: int s = XEiJ.regRn[rrr]; 10154: if ((short) s == 0) { //Drの下位16bitが0なので通過 10155: XEiJ.mpuCycleCount += 2; 10156: XEiJ.regRn[rrr] = s + 65535; 10157: } else { //Drの下位16bitが0でないので分岐 10158: XEiJ.mpuCycleCount++; 10159: XEiJ.regRn[rrr] = s - 1; //下位16bitが0でないので上位16bitは変化しない 10160: irpSetPC (t); 10161: } 10162: } 10163: } else if (ea < XEiJ.EA_AR) { //SMI.B Dr 10164: if (XEiJ.MPU_CC_MI << XEiJ.regCCR < 0) { //セット 10165: XEiJ.mpuCycleCount++; 10166: XEiJ.regRn[ea] |= 0xff; 10167: } else { //クリア 10168: XEiJ.mpuCycleCount++; 10169: XEiJ.regRn[ea] &= ~0xff; 10170: } 10171: } else if ((XEiJ.EAM_PW | XEiJ.EAM_PX | XEiJ.EAM_IM) << ea < 0L) { //TRAPMI.W/TRAPMI.L/TRAPMI 10172: if (ea == 072) { //.W 10173: mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); 10174: } else if (ea == 073) { //.L 10175: mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS); 10176: } 10177: if (XEiJ.MPU_CC_MI << XEiJ.regCCR < 0) { 10178: //条件が成立しているのでTRAPする 10179: m60Address = XEiJ.regPC0; //アドレスは命令の先頭 10180: M68kException.m6eNumber = M68kException.M6E_TRAPV_INSTRUCTION; 10181: throw M68kException.m6eSignal; 10182: } else { 10183: //条件が成立していないのでTRAPしない 10184: XEiJ.mpuCycleCount++; 10185: } 10186: } else { //SMI.B <mem> 10187: XEiJ.mpuCycleCount++; 10188: mmuWriteByteData (efaMltByte (ea), XEiJ.MPU_CC_MI << XEiJ.regCCR >> 31, XEiJ.regSRS); 10189: } 10190: } //irpSmi 10191: 10192: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10193: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 10194: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 10195: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10196: //SGE.B <ea> |-|012346|-|-*-*-|-----|D M+-WXZ |0101_110_011_mmm_rrr 10197: //SNLT.B <ea> |A|012346|-|-*-*-|-----|D M+-WXZ |0101_110_011_mmm_rrr [SGE.B <ea>] 10198: //DBGE.W Dr,<label> |-|012346|-|-*-*-|-----| |0101_110_011_001_rrr-{offset} 10199: //DBNLT.W Dr,<label> |A|012346|-|-*-*-|-----| |0101_110_011_001_rrr-{offset} [DBGE.W Dr,<label>] 10200: //TRAPGE.W #<data> |-|--2346|-|-*-*-|-----| |0101_110_011_111_010-{data} 10201: //TPGE.W #<data> |A|--2346|-|-*-*-|-----| |0101_110_011_111_010-{data} [TRAPGE.W #<data>] 10202: //TPNLT.W #<data> |A|--2346|-|-*-*-|-----| |0101_110_011_111_010-{data} [TRAPGE.W #<data>] 10203: //TRAPNLT.W #<data> |A|--2346|-|-*-*-|-----| |0101_110_011_111_010-{data} [TRAPGE.W #<data>] 10204: //TRAPGE.L #<data> |-|--2346|-|-*-*-|-----| |0101_110_011_111_011-{data} 10205: //TPGE.L #<data> |A|--2346|-|-*-*-|-----| |0101_110_011_111_011-{data} [TRAPGE.L #<data>] 10206: //TPNLT.L #<data> |A|--2346|-|-*-*-|-----| |0101_110_011_111_011-{data} [TRAPGE.L #<data>] 10207: //TRAPNLT.L #<data> |A|--2346|-|-*-*-|-----| |0101_110_011_111_011-{data} [TRAPGE.L #<data>] 10208: //TRAPGE |-|--2346|-|-*-*-|-----| |0101_110_011_111_100 10209: //TPGE |A|--2346|-|-*-*-|-----| |0101_110_011_111_100 [TRAPGE] 10210: //TPNLT |A|--2346|-|-*-*-|-----| |0101_110_011_111_100 [TRAPGE] 10211: //TRAPNLT |A|--2346|-|-*-*-|-----| |0101_110_011_111_100 [TRAPGE] 10212: public static void irpSge () throws M68kException { 10213: int ea = XEiJ.regOC & 63; 10214: if (ea >> 3 == XEiJ.MMM_AR) { //DBGE.W Dr,<label> 10215: int t = XEiJ.regPC; //pc0+2 10216: XEiJ.regPC = t + 2; //pc0+4 10217: t += mmuReadWordSignExword (t, XEiJ.regSRS); //pc0+2+16bitディスプレースメント 10218: if ((t & 1) != 0) { //分岐先のアドレスが奇数 10219: //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ 10220: irpBccAddressError (t); 10221: } 10222: if (XEiJ.MPU_CC_GE << XEiJ.regCCR < 0) { //条件が成立しているので通過 10223: XEiJ.mpuCycleCount += 2; 10224: } else { //条件が成立していないのでデクリメント 10225: int rrr = XEiJ.regOC & 7; 10226: int s = XEiJ.regRn[rrr]; 10227: if ((short) s == 0) { //Drの下位16bitが0なので通過 10228: XEiJ.mpuCycleCount += 2; 10229: XEiJ.regRn[rrr] = s + 65535; 10230: } else { //Drの下位16bitが0でないので分岐 10231: XEiJ.mpuCycleCount++; 10232: XEiJ.regRn[rrr] = s - 1; //下位16bitが0でないので上位16bitは変化しない 10233: irpSetPC (t); 10234: } 10235: } 10236: } else if (ea < XEiJ.EA_AR) { //SGE.B Dr 10237: if (XEiJ.MPU_CC_GE << XEiJ.regCCR < 0) { //セット 10238: XEiJ.mpuCycleCount++; 10239: XEiJ.regRn[ea] |= 0xff; 10240: } else { //クリア 10241: XEiJ.mpuCycleCount++; 10242: XEiJ.regRn[ea] &= ~0xff; 10243: } 10244: } else if ((XEiJ.EAM_PW | XEiJ.EAM_PX | XEiJ.EAM_IM) << ea < 0L) { //TRAPGE.W/TRAPGE.L/TRAPGE 10245: if (ea == 072) { //.W 10246: mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); 10247: } else if (ea == 073) { //.L 10248: mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS); 10249: } 10250: if (XEiJ.MPU_CC_GE << XEiJ.regCCR < 0) { 10251: //条件が成立しているのでTRAPする 10252: m60Address = XEiJ.regPC0; //アドレスは命令の先頭 10253: M68kException.m6eNumber = M68kException.M6E_TRAPV_INSTRUCTION; 10254: throw M68kException.m6eSignal; 10255: } else { 10256: //条件が成立していないのでTRAPしない 10257: XEiJ.mpuCycleCount++; 10258: } 10259: } else { //SGE.B <mem> 10260: XEiJ.mpuCycleCount++; 10261: mmuWriteByteData (efaMltByte (ea), XEiJ.MPU_CC_GE << XEiJ.regCCR >> 31, XEiJ.regSRS); 10262: } 10263: } //irpSge 10264: 10265: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10266: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 10267: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 10268: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10269: //SLT.B <ea> |-|012346|-|-*-*-|-----|D M+-WXZ |0101_110_111_mmm_rrr 10270: //SNGE.B <ea> |A|012346|-|-*-*-|-----|D M+-WXZ |0101_110_111_mmm_rrr [SLT.B <ea>] 10271: //DBLT.W Dr,<label> |-|012346|-|-*-*-|-----| |0101_110_111_001_rrr-{offset} 10272: //DBNGE.W Dr,<label> |A|012346|-|-*-*-|-----| |0101_110_111_001_rrr-{offset} [DBLT.W Dr,<label>] 10273: //TRAPLT.W #<data> |-|--2346|-|-*-*-|-----| |0101_110_111_111_010-{data} 10274: //TPLT.W #<data> |A|--2346|-|-*-*-|-----| |0101_110_111_111_010-{data} [TRAPLT.W #<data>] 10275: //TPNGE.W #<data> |A|--2346|-|-*-*-|-----| |0101_110_111_111_010-{data} [TRAPLT.W #<data>] 10276: //TRAPNGE.W #<data> |A|--2346|-|-*-*-|-----| |0101_110_111_111_010-{data} [TRAPLT.W #<data>] 10277: //TRAPLT.L #<data> |-|--2346|-|-*-*-|-----| |0101_110_111_111_011-{data} 10278: //TPLT.L #<data> |A|--2346|-|-*-*-|-----| |0101_110_111_111_011-{data} [TRAPLT.L #<data>] 10279: //TPNGE.L #<data> |A|--2346|-|-*-*-|-----| |0101_110_111_111_011-{data} [TRAPLT.L #<data>] 10280: //TRAPNGE.L #<data> |A|--2346|-|-*-*-|-----| |0101_110_111_111_011-{data} [TRAPLT.L #<data>] 10281: //TRAPLT |-|--2346|-|-*-*-|-----| |0101_110_111_111_100 10282: //TPLT |A|--2346|-|-*-*-|-----| |0101_110_111_111_100 [TRAPLT] 10283: //TPNGE |A|--2346|-|-*-*-|-----| |0101_110_111_111_100 [TRAPLT] 10284: //TRAPNGE |A|--2346|-|-*-*-|-----| |0101_110_111_111_100 [TRAPLT] 10285: public static void irpSlt () throws M68kException { 10286: int ea = XEiJ.regOC & 63; 10287: if (ea >> 3 == XEiJ.MMM_AR) { //DBLT.W Dr,<label> 10288: int t = XEiJ.regPC; //pc0+2 10289: XEiJ.regPC = t + 2; //pc0+4 10290: t += mmuReadWordSignExword (t, XEiJ.regSRS); //pc0+2+16bitディスプレースメント 10291: if ((t & 1) != 0) { //分岐先のアドレスが奇数 10292: //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ 10293: irpBccAddressError (t); 10294: } 10295: if (XEiJ.MPU_CC_LT << XEiJ.regCCR < 0) { //条件が成立しているので通過 10296: XEiJ.mpuCycleCount += 2; 10297: } else { //条件が成立していないのでデクリメント 10298: int rrr = XEiJ.regOC & 7; 10299: int s = XEiJ.regRn[rrr]; 10300: if ((short) s == 0) { //Drの下位16bitが0なので通過 10301: XEiJ.mpuCycleCount += 2; 10302: XEiJ.regRn[rrr] = s + 65535; 10303: } else { //Drの下位16bitが0でないので分岐 10304: XEiJ.mpuCycleCount++; 10305: XEiJ.regRn[rrr] = s - 1; //下位16bitが0でないので上位16bitは変化しない 10306: irpSetPC (t); 10307: } 10308: } 10309: } else if (ea < XEiJ.EA_AR) { //SLT.B Dr 10310: if (XEiJ.MPU_CC_LT << XEiJ.regCCR < 0) { //セット 10311: XEiJ.mpuCycleCount++; 10312: XEiJ.regRn[ea] |= 0xff; 10313: } else { //クリア 10314: XEiJ.mpuCycleCount++; 10315: XEiJ.regRn[ea] &= ~0xff; 10316: } 10317: } else if ((XEiJ.EAM_PW | XEiJ.EAM_PX | XEiJ.EAM_IM) << ea < 0L) { //TRAPLT.W/TRAPLT.L/TRAPLT 10318: if (ea == 072) { //.W 10319: mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); 10320: } else if (ea == 073) { //.L 10321: mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS); 10322: } 10323: if (XEiJ.MPU_CC_LT << XEiJ.regCCR < 0) { 10324: //条件が成立しているのでTRAPする 10325: m60Address = XEiJ.regPC0; //アドレスは命令の先頭 10326: M68kException.m6eNumber = M68kException.M6E_TRAPV_INSTRUCTION; 10327: throw M68kException.m6eSignal; 10328: } else { 10329: //条件が成立していないのでTRAPしない 10330: XEiJ.mpuCycleCount++; 10331: } 10332: } else { //SLT.B <mem> 10333: XEiJ.mpuCycleCount++; 10334: mmuWriteByteData (efaMltByte (ea), XEiJ.MPU_CC_LT << XEiJ.regCCR >> 31, XEiJ.regSRS); 10335: } 10336: } //irpSlt 10337: 10338: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10339: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 10340: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 10341: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10342: //SGT.B <ea> |-|012346|-|-***-|-----|D M+-WXZ |0101_111_011_mmm_rrr 10343: //SNLE.B <ea> |A|012346|-|-***-|-----|D M+-WXZ |0101_111_011_mmm_rrr [SGT.B <ea>] 10344: //DBGT.W Dr,<label> |-|012346|-|-***-|-----| |0101_111_011_001_rrr-{offset} 10345: //DBNLE.W Dr,<label> |A|012346|-|-***-|-----| |0101_111_011_001_rrr-{offset} [DBGT.W Dr,<label>] 10346: //TRAPGT.W #<data> |-|--2346|-|-***-|-----| |0101_111_011_111_010-{data} 10347: //TPGT.W #<data> |A|--2346|-|-***-|-----| |0101_111_011_111_010-{data} [TRAPGT.W #<data>] 10348: //TPNLE.W #<data> |A|--2346|-|-***-|-----| |0101_111_011_111_010-{data} [TRAPGT.W #<data>] 10349: //TRAPNLE.W #<data> |A|--2346|-|-***-|-----| |0101_111_011_111_010-{data} [TRAPGT.W #<data>] 10350: //TRAPGT.L #<data> |-|--2346|-|-***-|-----| |0101_111_011_111_011-{data} 10351: //TPGT.L #<data> |A|--2346|-|-***-|-----| |0101_111_011_111_011-{data} [TRAPGT.L #<data>] 10352: //TPNLE.L #<data> |A|--2346|-|-***-|-----| |0101_111_011_111_011-{data} [TRAPGT.L #<data>] 10353: //TRAPNLE.L #<data> |A|--2346|-|-***-|-----| |0101_111_011_111_011-{data} [TRAPGT.L #<data>] 10354: //TRAPGT |-|--2346|-|-***-|-----| |0101_111_011_111_100 10355: //TPGT |A|--2346|-|-***-|-----| |0101_111_011_111_100 [TRAPGT] 10356: //TPNLE |A|--2346|-|-***-|-----| |0101_111_011_111_100 [TRAPGT] 10357: //TRAPNLE |A|--2346|-|-***-|-----| |0101_111_011_111_100 [TRAPGT] 10358: public static void irpSgt () throws M68kException { 10359: int ea = XEiJ.regOC & 63; 10360: if (ea >> 3 == XEiJ.MMM_AR) { //DBGT.W Dr,<label> 10361: int t = XEiJ.regPC; //pc0+2 10362: XEiJ.regPC = t + 2; //pc0+4 10363: t += mmuReadWordSignExword (t, XEiJ.regSRS); //pc0+2+16bitディスプレースメント 10364: if ((t & 1) != 0) { //分岐先のアドレスが奇数 10365: //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ 10366: irpBccAddressError (t); 10367: } 10368: if (XEiJ.MPU_CC_GT << XEiJ.regCCR < 0) { //条件が成立しているので通過 10369: XEiJ.mpuCycleCount += 2; 10370: } else { //条件が成立していないのでデクリメント 10371: int rrr = XEiJ.regOC & 7; 10372: int s = XEiJ.regRn[rrr]; 10373: if ((short) s == 0) { //Drの下位16bitが0なので通過 10374: XEiJ.mpuCycleCount += 2; 10375: XEiJ.regRn[rrr] = s + 65535; 10376: } else { //Drの下位16bitが0でないので分岐 10377: XEiJ.mpuCycleCount++; 10378: XEiJ.regRn[rrr] = s - 1; //下位16bitが0でないので上位16bitは変化しない 10379: irpSetPC (t); 10380: } 10381: } 10382: } else if (ea < XEiJ.EA_AR) { //SGT.B Dr 10383: if (XEiJ.MPU_CC_GT << XEiJ.regCCR < 0) { //セット 10384: XEiJ.mpuCycleCount++; 10385: XEiJ.regRn[ea] |= 0xff; 10386: } else { //クリア 10387: XEiJ.mpuCycleCount++; 10388: XEiJ.regRn[ea] &= ~0xff; 10389: } 10390: } else if ((XEiJ.EAM_PW | XEiJ.EAM_PX | XEiJ.EAM_IM) << ea < 0L) { //TRAPGT.W/TRAPGT.L/TRAPGT 10391: if (ea == 072) { //.W 10392: mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); 10393: } else if (ea == 073) { //.L 10394: mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS); 10395: } 10396: if (XEiJ.MPU_CC_GT << XEiJ.regCCR < 0) { 10397: //条件が成立しているのでTRAPする 10398: m60Address = XEiJ.regPC0; //アドレスは命令の先頭 10399: M68kException.m6eNumber = M68kException.M6E_TRAPV_INSTRUCTION; 10400: throw M68kException.m6eSignal; 10401: } else { 10402: //条件が成立していないのでTRAPしない 10403: XEiJ.mpuCycleCount++; 10404: } 10405: } else { //SGT.B <mem> 10406: XEiJ.mpuCycleCount++; 10407: mmuWriteByteData (efaMltByte (ea), XEiJ.MPU_CC_GT << XEiJ.regCCR >> 31, XEiJ.regSRS); 10408: } 10409: } //irpSgt 10410: 10411: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10412: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 10413: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 10414: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10415: //SLE.B <ea> |-|012346|-|-***-|-----|D M+-WXZ |0101_111_111_mmm_rrr 10416: //SNGT.B <ea> |A|012346|-|-***-|-----|D M+-WXZ |0101_111_111_mmm_rrr [SLE.B <ea>] 10417: //DBLE.W Dr,<label> |-|012346|-|-***-|-----| |0101_111_111_001_rrr-{offset} 10418: //DBNGT.W Dr,<label> |A|012346|-|-***-|-----| |0101_111_111_001_rrr-{offset} [DBLE.W Dr,<label>] 10419: //TRAPLE.W #<data> |-|--2346|-|-***-|-----| |0101_111_111_111_010-{data} 10420: //TPLE.W #<data> |A|--2346|-|-***-|-----| |0101_111_111_111_010-{data} [TRAPLE.W #<data>] 10421: //TPNGT.W #<data> |A|--2346|-|-***-|-----| |0101_111_111_111_010-{data} [TRAPLE.W #<data>] 10422: //TRAPNGT.W #<data> |A|--2346|-|-***-|-----| |0101_111_111_111_010-{data} [TRAPLE.W #<data>] 10423: //TRAPLE.L #<data> |-|--2346|-|-***-|-----| |0101_111_111_111_011-{data} 10424: //TPLE.L #<data> |A|--2346|-|-***-|-----| |0101_111_111_111_011-{data} [TRAPLE.L #<data>] 10425: //TPNGT.L #<data> |A|--2346|-|-***-|-----| |0101_111_111_111_011-{data} [TRAPLE.L #<data>] 10426: //TRAPNGT.L #<data> |A|--2346|-|-***-|-----| |0101_111_111_111_011-{data} [TRAPLE.L #<data>] 10427: //TRAPLE |-|--2346|-|-***-|-----| |0101_111_111_111_100 10428: //TPLE |A|--2346|-|-***-|-----| |0101_111_111_111_100 [TRAPLE] 10429: //TPNGT |A|--2346|-|-***-|-----| |0101_111_111_111_100 [TRAPLE] 10430: //TRAPNGT |A|--2346|-|-***-|-----| |0101_111_111_111_100 [TRAPLE] 10431: public static void irpSle () throws M68kException { 10432: int ea = XEiJ.regOC & 63; 10433: if (ea >> 3 == XEiJ.MMM_AR) { //DBLE.W Dr,<label> 10434: int t = XEiJ.regPC; //pc0+2 10435: XEiJ.regPC = t + 2; //pc0+4 10436: t += mmuReadWordSignExword (t, XEiJ.regSRS); //pc0+2+16bitディスプレースメント 10437: if ((t & 1) != 0) { //分岐先のアドレスが奇数 10438: //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ 10439: irpBccAddressError (t); 10440: } 10441: if (XEiJ.MPU_CC_LE << XEiJ.regCCR < 0) { //条件が成立しているので通過 10442: XEiJ.mpuCycleCount += 2; 10443: } else { //条件が成立していないのでデクリメント 10444: int rrr = XEiJ.regOC & 7; 10445: int s = XEiJ.regRn[rrr]; 10446: if ((short) s == 0) { //Drの下位16bitが0なので通過 10447: XEiJ.mpuCycleCount += 2; 10448: XEiJ.regRn[rrr] = s + 65535; 10449: } else { //Drの下位16bitが0でないので分岐 10450: XEiJ.mpuCycleCount++; 10451: XEiJ.regRn[rrr] = s - 1; //下位16bitが0でないので上位16bitは変化しない 10452: irpSetPC (t); 10453: } 10454: } 10455: } else if (ea < XEiJ.EA_AR) { //SLE.B Dr 10456: if (XEiJ.MPU_CC_LE << XEiJ.regCCR < 0) { //セット 10457: XEiJ.mpuCycleCount++; 10458: XEiJ.regRn[ea] |= 0xff; 10459: } else { //クリア 10460: XEiJ.mpuCycleCount++; 10461: XEiJ.regRn[ea] &= ~0xff; 10462: } 10463: } else if ((XEiJ.EAM_PW | XEiJ.EAM_PX | XEiJ.EAM_IM) << ea < 0L) { //TRAPLE.W/TRAPLE.L/TRAPLE 10464: if (ea == 072) { //.W 10465: mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); 10466: } else if (ea == 073) { //.L 10467: mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS); 10468: } 10469: if (XEiJ.MPU_CC_LE << XEiJ.regCCR < 0) { 10470: //条件が成立しているのでTRAPする 10471: m60Address = XEiJ.regPC0; //アドレスは命令の先頭 10472: M68kException.m6eNumber = M68kException.M6E_TRAPV_INSTRUCTION; 10473: throw M68kException.m6eSignal; 10474: } else { 10475: //条件が成立していないのでTRAPしない 10476: XEiJ.mpuCycleCount++; 10477: } 10478: } else { //SLE.B <mem> 10479: XEiJ.mpuCycleCount++; 10480: mmuWriteByteData (efaMltByte (ea), XEiJ.MPU_CC_LE << XEiJ.regCCR >> 31, XEiJ.regSRS); 10481: } 10482: } //irpSle 10483: 10484: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10485: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 10486: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 10487: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10488: //BRA.W <label> |-|012346|-|-----|-----| |0110_000_000_000_000-{offset} 10489: //JBRA.W <label> |A|012346|-|-----|-----| |0110_000_000_000_000-{offset} [BRA.W <label>] 10490: //BRA.S <label> |-|012346|-|-----|-----| |0110_000_000_sss_sss (s is not equal to 0) 10491: //JBRA.S <label> |A|012346|-|-----|-----| |0110_000_000_sss_sss (s is not equal to 0) [BRA.S <label>] 10492: public static void irpBrasw () throws M68kException { 10493: XEiJ.mpuCycleCount++; //0clkにしない 10494: int t = XEiJ.regPC; //pc0+2 10495: int s = (byte) XEiJ.regOC; //オフセット 10496: if (s == 0) { //BRA.W 10497: XEiJ.regPC = t + 2; 10498: s = mmuReadWordSignExword (t, XEiJ.regSRS); //pcws 10499: } 10500: irpSetPC (t + s); //pc0+2+オフセット 10501: } //irpBrasw 10502: 10503: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10504: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 10505: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 10506: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10507: //BRA.S <label> |-|012346|-|-----|-----| |0110_000_001_sss_sss 10508: //JBRA.S <label> |A|012346|-|-----|-----| |0110_000_001_sss_sss [BRA.S <label>] 10509: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10510: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 10511: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 10512: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10513: //BRA.S <label> |-|012346|-|-----|-----| |0110_000_010_sss_sss 10514: //JBRA.S <label> |A|012346|-|-----|-----| |0110_000_010_sss_sss [BRA.S <label>] 10515: public static void irpBras () throws M68kException { 10516: XEiJ.mpuCycleCount++; //0clkにしない 10517: irpSetPC (XEiJ.regPC + (byte) XEiJ.regOC); //pc0+2+オフセット 10518: } //irpBras 10519: 10520: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10521: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 10522: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 10523: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10524: //BRA.S <label> |-|--2346|-|-----|-----| |0110_000_011_sss_sss (s is not equal to 63) 10525: //JBRA.S <label> |A|--2346|-|-----|-----| |0110_000_011_sss_sss (s is not equal to 63) [BRA.S <label>] 10526: //BRA.L <label> |-|--2346|-|-----|-----| |0110_000_011_111_111-{offset} 10527: public static void irpBrasl () throws M68kException { 10528: XEiJ.mpuCycleCount++; //0clkにしない 10529: int t = XEiJ.regPC; //pc0+2 10530: int s = (byte) XEiJ.regOC; //オフセット 10531: if (s == -1) { //BRA.L 10532: XEiJ.regPC = t + 4; 10533: s = mmuReadLongExword (t, XEiJ.regSRS); //pcls 10534: } 10535: irpSetPC (t + s); //pc0+2+オフセット 10536: } //irpBrasl 10537: 10538: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10539: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 10540: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 10541: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10542: //BSR.W <label> |-|012346|-|-----|-----| |0110_000_100_000_000-{offset} 10543: //JBSR.W <label> |A|012346|-|-----|-----| |0110_000_100_000_000-{offset} [BSR.W <label>] 10544: //BSR.S <label> |-|012346|-|-----|-----| |0110_000_100_sss_sss (s is not equal to 0) 10545: //JBSR.S <label> |A|012346|-|-----|-----| |0110_000_100_sss_sss (s is not equal to 0) [BSR.S <label>] 10546: public static void irpBsrsw () throws M68kException { 10547: XEiJ.mpuCycleCount++; 10548: int t = XEiJ.regPC; //pc0+2 10549: int s = (byte) XEiJ.regOC; //オフセット 10550: if (s == 0) { //BSR.W 10551: XEiJ.regPC = t + 2; 10552: s = mmuReadWordSignExword (t, XEiJ.regSRS); //pcws 10553: } 10554: m60Incremented -= 4L << (7 << 3); 10555: int sp = m60Address = XEiJ.regRn[15] -= 4; 10556: mmuWriteLongData (sp, XEiJ.regPC, XEiJ.regSRS); //pushl 10557: irpSetPC (t + s); //pc0+2+オフセット 10558: } //irpBsrsw 10559: 10560: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10561: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 10562: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 10563: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10564: //BSR.S <label> |-|012346|-|-----|-----| |0110_000_101_sss_sss 10565: //JBSR.S <label> |A|012346|-|-----|-----| |0110_000_101_sss_sss [BSR.S <label>] 10566: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10567: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 10568: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 10569: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10570: //BSR.S <label> |-|012346|-|-----|-----| |0110_000_110_sss_sss 10571: //JBSR.S <label> |A|012346|-|-----|-----| |0110_000_110_sss_sss [BSR.S <label>] 10572: public static void irpBsrs () throws M68kException { 10573: XEiJ.mpuCycleCount++; 10574: m60Incremented -= 4L << (7 << 3); 10575: int sp = m60Address = XEiJ.regRn[15] -= 4; 10576: mmuWriteLongData (sp, XEiJ.regPC, XEiJ.regSRS); //pushl 10577: irpSetPC (XEiJ.regPC + (byte) XEiJ.regOC); //pc0+2+オフセット 10578: } //irpBsrs 10579: 10580: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10581: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 10582: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 10583: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10584: //BSR.S <label> |-|--2346|-|-----|-----| |0110_000_111_sss_sss (s is not equal to 63) 10585: //JBSR.S <label> |A|--2346|-|-----|-----| |0110_000_111_sss_sss (s is not equal to 63) [BSR.S <label>] 10586: //BSR.L <label> |-|--2346|-|-----|-----| |0110_000_111_111_111-{offset} 10587: public static void irpBsrsl () throws M68kException { 10588: XEiJ.mpuCycleCount++; 10589: int t = XEiJ.regPC; //pc0+2 10590: int s = (byte) XEiJ.regOC; //オフセット 10591: if (s == -1) { //BSR.L 10592: XEiJ.regPC = t + 4; 10593: s = mmuReadLongExword (t, XEiJ.regSRS); //pcls 10594: } 10595: m60Incremented -= 4L << (7 << 3); 10596: int sp = m60Address = XEiJ.regRn[15] -= 4; 10597: mmuWriteLongData (sp, XEiJ.regPC, XEiJ.regSRS); //pushl 10598: irpSetPC (t + s); //pc0+2+オフセット 10599: } //irpBsrsl 10600: 10601: //irpBccAddressError (int t) 10602: public static void irpBccAddressError (int t) throws M68kException { 10603: M68kException.m6eNumber = M68kException.M6E_ADDRESS_ERROR; 10604: m60Address = t & -2; //偶数にする 10605: M68kException.m6eDirection = XEiJ.MPU_WR_READ; 10606: M68kException.m6eSize = XEiJ.MPU_SS_WORD; 10607: throw M68kException.m6eSignal; 10608: } 10609: 10610: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10611: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 10612: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 10613: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10614: //BHI.W <label> |-|012346|-|--*-*|-----| |0110_001_000_000_000-{offset} 10615: //BNLS.W <label> |A|012346|-|--*-*|-----| |0110_001_000_000_000-{offset} [BHI.W <label>] 10616: //JBHI.W <label> |A|012346|-|--*-*|-----| |0110_001_000_000_000-{offset} [BHI.W <label>] 10617: //JBNLS.W <label> |A|012346|-|--*-*|-----| |0110_001_000_000_000-{offset} [BHI.W <label>] 10618: //BHI.S <label> |-|012346|-|--*-*|-----| |0110_001_000_sss_sss (s is not equal to 0) 10619: //BNLS.S <label> |A|012346|-|--*-*|-----| |0110_001_000_sss_sss (s is not equal to 0) [BHI.S <label>] 10620: //JBHI.S <label> |A|012346|-|--*-*|-----| |0110_001_000_sss_sss (s is not equal to 0) [BHI.S <label>] 10621: //JBNLS.S <label> |A|012346|-|--*-*|-----| |0110_001_000_sss_sss (s is not equal to 0) [BHI.S <label>] 10622: //JBLS.L <label> |A|012346|-|--*-*|-----| |0110_001_000_000_110-0100111011111001-{address} [BHI.S (*)+8;JMP <label>] 10623: //JBNHI.L <label> |A|012346|-|--*-*|-----| |0110_001_000_000_110-0100111011111001-{address} [BHI.S (*)+8;JMP <label>] 10624: public static void irpBhisw () throws M68kException { 10625: XEiJ.mpuCycleCount++; 10626: int t = XEiJ.regPC; //pc0+2 10627: int s = (byte) XEiJ.regOC; //8bitディスプレースメント 10628: if (s == 0) { //Bcc.W 10629: XEiJ.regPC = t + 2; //pc0+4 10630: s = mmuReadWordSignExword (t, XEiJ.regSRS); //16bitディスプレースメント 10631: } 10632: t += s; //pc0+2+ディスプレースメント 10633: if ((t & 1) != 0) { //分岐先のアドレスが奇数 10634: //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ 10635: irpBccAddressError (t); 10636: } 10637: if (XEiJ.MPU_CC_HI << XEiJ.regCCR < 0) { //分岐する 10638: irpSetPC (t); 10639: } 10640: } //irpBhisw 10641: 10642: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10643: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 10644: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 10645: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10646: //BHI.S <label> |-|012346|-|--*-*|-----| |0110_001_001_sss_sss 10647: //BNLS.S <label> |A|012346|-|--*-*|-----| |0110_001_001_sss_sss [BHI.S <label>] 10648: //JBHI.S <label> |A|012346|-|--*-*|-----| |0110_001_001_sss_sss [BHI.S <label>] 10649: //JBNLS.S <label> |A|012346|-|--*-*|-----| |0110_001_001_sss_sss [BHI.S <label>] 10650: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10651: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 10652: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 10653: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10654: //BHI.S <label> |-|012346|-|--*-*|-----| |0110_001_010_sss_sss 10655: //BNLS.S <label> |A|012346|-|--*-*|-----| |0110_001_010_sss_sss [BHI.S <label>] 10656: //JBHI.S <label> |A|012346|-|--*-*|-----| |0110_001_010_sss_sss [BHI.S <label>] 10657: //JBNLS.S <label> |A|012346|-|--*-*|-----| |0110_001_010_sss_sss [BHI.S <label>] 10658: public static void irpBhis () throws M68kException { 10659: XEiJ.mpuCycleCount++; 10660: int t = XEiJ.regPC; //pc0+2 10661: int s = (byte) XEiJ.regOC; //8bitディスプレースメント 10662: t += s; //pc0+2+ディスプレースメント 10663: if ((t & 1) != 0) { //分岐先のアドレスが奇数 10664: //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ 10665: irpBccAddressError (t); 10666: } 10667: if (XEiJ.MPU_CC_HI << XEiJ.regCCR < 0) { //分岐する 10668: irpSetPC (t); 10669: } 10670: } //irpBhis 10671: 10672: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10673: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 10674: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 10675: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10676: //BHI.S <label> |-|--2346|-|--*-*|-----| |0110_001_011_sss_sss (s is not equal to 63) 10677: //BNLS.S <label> |A|--2346|-|--*-*|-----| |0110_001_011_sss_sss (s is not equal to 63) [BHI.S <label>] 10678: //JBHI.S <label> |A|--2346|-|--*-*|-----| |0110_001_011_sss_sss (s is not equal to 63) [BHI.S <label>] 10679: //JBNLS.S <label> |A|--2346|-|--*-*|-----| |0110_001_011_sss_sss (s is not equal to 63) [BHI.S <label>] 10680: //BHI.L <label> |-|--2346|-|--*-*|-----| |0110_001_011_111_111-{offset} 10681: //BNLS.L <label> |A|--2346|-|--*-*|-----| |0110_001_011_111_111-{offset} [BHI.L <label>] 10682: public static void irpBhisl () throws M68kException { 10683: XEiJ.mpuCycleCount++; 10684: int t = XEiJ.regPC; //pc0+2 10685: int s = (byte) XEiJ.regOC; //8bitディスプレースメント 10686: if (s == -1) { //Bcc.L 10687: XEiJ.regPC = t + 4; //pc0+6 10688: s = mmuReadLongExword (t, XEiJ.regSRS); //32bitディスプレースメント 10689: } 10690: t += s; //pc0+2+ディスプレースメント 10691: if ((t & 1) != 0) { //分岐先のアドレスが奇数 10692: //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ 10693: irpBccAddressError (t); 10694: } 10695: if (XEiJ.MPU_CC_HI << XEiJ.regCCR < 0) { //分岐する 10696: irpSetPC (t); 10697: } 10698: } //irpBhisl 10699: 10700: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10701: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 10702: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 10703: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10704: //BLS.W <label> |-|012346|-|--*-*|-----| |0110_001_100_000_000-{offset} 10705: //BNHI.W <label> |A|012346|-|--*-*|-----| |0110_001_100_000_000-{offset} [BLS.W <label>] 10706: //JBLS.W <label> |A|012346|-|--*-*|-----| |0110_001_100_000_000-{offset} [BLS.W <label>] 10707: //JBNHI.W <label> |A|012346|-|--*-*|-----| |0110_001_100_000_000-{offset} [BLS.W <label>] 10708: //BLS.S <label> |-|012346|-|--*-*|-----| |0110_001_100_sss_sss (s is not equal to 0) 10709: //BNHI.S <label> |A|012346|-|--*-*|-----| |0110_001_100_sss_sss (s is not equal to 0) [BLS.S <label>] 10710: //JBLS.S <label> |A|012346|-|--*-*|-----| |0110_001_100_sss_sss (s is not equal to 0) [BLS.S <label>] 10711: //JBNHI.S <label> |A|012346|-|--*-*|-----| |0110_001_100_sss_sss (s is not equal to 0) [BLS.S <label>] 10712: //JBHI.L <label> |A|012346|-|--*-*|-----| |0110_001_100_000_110-0100111011111001-{address} [BLS.S (*)+8;JMP <label>] 10713: //JBNLS.L <label> |A|012346|-|--*-*|-----| |0110_001_100_000_110-0100111011111001-{address} [BLS.S (*)+8;JMP <label>] 10714: public static void irpBlssw () throws M68kException { 10715: XEiJ.mpuCycleCount++; 10716: int t = XEiJ.regPC; //pc0+2 10717: int s = (byte) XEiJ.regOC; //8bitディスプレースメント 10718: if (s == 0) { //Bcc.W 10719: XEiJ.regPC = t + 2; //pc0+4 10720: s = mmuReadWordSignExword (t, XEiJ.regSRS); //16bitディスプレースメント 10721: } 10722: t += s; //pc0+2+ディスプレースメント 10723: if ((t & 1) != 0) { //分岐先のアドレスが奇数 10724: //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ 10725: irpBccAddressError (t); 10726: } 10727: if (XEiJ.MPU_CC_LS << XEiJ.regCCR < 0) { //分岐する 10728: irpSetPC (t); 10729: } 10730: } //irpBlssw 10731: 10732: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10733: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 10734: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 10735: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10736: //BLS.S <label> |-|012346|-|--*-*|-----| |0110_001_101_sss_sss 10737: //BNHI.S <label> |A|012346|-|--*-*|-----| |0110_001_101_sss_sss [BLS.S <label>] 10738: //JBLS.S <label> |A|012346|-|--*-*|-----| |0110_001_101_sss_sss [BLS.S <label>] 10739: //JBNHI.S <label> |A|012346|-|--*-*|-----| |0110_001_101_sss_sss [BLS.S <label>] 10740: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10741: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 10742: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 10743: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10744: //BLS.S <label> |-|012346|-|--*-*|-----| |0110_001_110_sss_sss 10745: //BNHI.S <label> |A|012346|-|--*-*|-----| |0110_001_110_sss_sss [BLS.S <label>] 10746: //JBLS.S <label> |A|012346|-|--*-*|-----| |0110_001_110_sss_sss [BLS.S <label>] 10747: //JBNHI.S <label> |A|012346|-|--*-*|-----| |0110_001_110_sss_sss [BLS.S <label>] 10748: public static void irpBlss () throws M68kException { 10749: XEiJ.mpuCycleCount++; 10750: int t = XEiJ.regPC; //pc0+2 10751: int s = (byte) XEiJ.regOC; //8bitディスプレースメント 10752: t += s; //pc0+2+ディスプレースメント 10753: if ((t & 1) != 0) { //分岐先のアドレスが奇数 10754: //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ 10755: irpBccAddressError (t); 10756: } 10757: if (XEiJ.MPU_CC_LS << XEiJ.regCCR < 0) { //分岐する 10758: irpSetPC (t); 10759: } 10760: } //irpBlss 10761: 10762: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10763: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 10764: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 10765: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10766: //BLS.S <label> |-|--2346|-|--*-*|-----| |0110_001_111_sss_sss (s is not equal to 63) 10767: //BNHI.S <label> |A|--2346|-|--*-*|-----| |0110_001_111_sss_sss (s is not equal to 63) [BLS.S <label>] 10768: //JBLS.S <label> |A|--2346|-|--*-*|-----| |0110_001_111_sss_sss (s is not equal to 63) [BLS.S <label>] 10769: //JBNHI.S <label> |A|--2346|-|--*-*|-----| |0110_001_111_sss_sss (s is not equal to 63) [BLS.S <label>] 10770: //BLS.L <label> |-|--2346|-|--*-*|-----| |0110_001_111_111_111-{offset} 10771: //BNHI.L <label> |A|--2346|-|--*-*|-----| |0110_001_111_111_111-{offset} [BLS.L <label>] 10772: public static void irpBlssl () throws M68kException { 10773: XEiJ.mpuCycleCount++; 10774: int t = XEiJ.regPC; //pc0+2 10775: int s = (byte) XEiJ.regOC; //8bitディスプレースメント 10776: if (s == -1) { //Bcc.L 10777: XEiJ.regPC = t + 4; //pc0+6 10778: s = mmuReadLongExword (t, XEiJ.regSRS); //32bitディスプレースメント 10779: } 10780: t += s; //pc0+2+ディスプレースメント 10781: if ((t & 1) != 0) { //分岐先のアドレスが奇数 10782: //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ 10783: irpBccAddressError (t); 10784: } 10785: if (XEiJ.MPU_CC_LS << XEiJ.regCCR < 0) { //分岐する 10786: irpSetPC (t); 10787: } 10788: } //irpBlssl 10789: 10790: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10791: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 10792: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 10793: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10794: //BCC.W <label> |-|012346|-|----*|-----| |0110_010_000_000_000-{offset} 10795: //BHS.W <label> |A|012346|-|----*|-----| |0110_010_000_000_000-{offset} [BCC.W <label>] 10796: //BNCS.W <label> |A|012346|-|----*|-----| |0110_010_000_000_000-{offset} [BCC.W <label>] 10797: //BNLO.W <label> |A|012346|-|----*|-----| |0110_010_000_000_000-{offset} [BCC.W <label>] 10798: //JBCC.W <label> |A|012346|-|----*|-----| |0110_010_000_000_000-{offset} [BCC.W <label>] 10799: //JBHS.W <label> |A|012346|-|----*|-----| |0110_010_000_000_000-{offset} [BCC.W <label>] 10800: //JBNCS.W <label> |A|012346|-|----*|-----| |0110_010_000_000_000-{offset} [BCC.W <label>] 10801: //JBNLO.W <label> |A|012346|-|----*|-----| |0110_010_000_000_000-{offset} [BCC.W <label>] 10802: //BCC.S <label> |-|012346|-|----*|-----| |0110_010_000_sss_sss (s is not equal to 0) 10803: //BHS.S <label> |A|012346|-|----*|-----| |0110_010_000_sss_sss (s is not equal to 0) [BCC.S <label>] 10804: //BNCS.S <label> |A|012346|-|----*|-----| |0110_010_000_sss_sss (s is not equal to 0) [BCC.S <label>] 10805: //BNLO.S <label> |A|012346|-|----*|-----| |0110_010_000_sss_sss (s is not equal to 0) [BCC.S <label>] 10806: //JBCC.S <label> |A|012346|-|----*|-----| |0110_010_000_sss_sss (s is not equal to 0) [BCC.S <label>] 10807: //JBHS.S <label> |A|012346|-|----*|-----| |0110_010_000_sss_sss (s is not equal to 0) [BCC.S <label>] 10808: //JBNCS.S <label> |A|012346|-|----*|-----| |0110_010_000_sss_sss (s is not equal to 0) [BCC.S <label>] 10809: //JBNLO.S <label> |A|012346|-|----*|-----| |0110_010_000_sss_sss (s is not equal to 0) [BCC.S <label>] 10810: //JBCS.L <label> |A|012346|-|----*|-----| |0110_010_000_000_110-0100111011111001-{address} [BCC.S (*)+8;JMP <label>] 10811: //JBLO.L <label> |A|012346|-|----*|-----| |0110_010_000_000_110-0100111011111001-{address} [BCC.S (*)+8;JMP <label>] 10812: //JBNCC.L <label> |A|012346|-|----*|-----| |0110_010_000_000_110-0100111011111001-{address} [BCC.S (*)+8;JMP <label>] 10813: //JBNHS.L <label> |A|012346|-|----*|-----| |0110_010_000_000_110-0100111011111001-{address} [BCC.S (*)+8;JMP <label>] 10814: public static void irpBhssw () throws M68kException { 10815: XEiJ.mpuCycleCount++; 10816: int t = XEiJ.regPC; //pc0+2 10817: int s = (byte) XEiJ.regOC; //8bitディスプレースメント 10818: if (s == 0) { //Bcc.W 10819: XEiJ.regPC = t + 2; //pc0+4 10820: s = mmuReadWordSignExword (t, XEiJ.regSRS); //16bitディスプレースメント 10821: } 10822: t += s; //pc0+2+ディスプレースメント 10823: if ((t & 1) != 0) { //分岐先のアドレスが奇数 10824: //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ 10825: irpBccAddressError (t); 10826: } 10827: if (XEiJ.MPU_CC_HS << XEiJ.regCCR < 0) { //分岐する 10828: irpSetPC (t); 10829: } 10830: } //irpBhssw 10831: 10832: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10833: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 10834: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 10835: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10836: //BCC.S <label> |-|012346|-|----*|-----| |0110_010_001_sss_sss 10837: //BHS.S <label> |A|012346|-|----*|-----| |0110_010_001_sss_sss [BCC.S <label>] 10838: //BNCS.S <label> |A|012346|-|----*|-----| |0110_010_001_sss_sss [BCC.S <label>] 10839: //BNLO.S <label> |A|012346|-|----*|-----| |0110_010_001_sss_sss [BCC.S <label>] 10840: //JBCC.S <label> |A|012346|-|----*|-----| |0110_010_001_sss_sss [BCC.S <label>] 10841: //JBHS.S <label> |A|012346|-|----*|-----| |0110_010_001_sss_sss [BCC.S <label>] 10842: //JBNCS.S <label> |A|012346|-|----*|-----| |0110_010_001_sss_sss [BCC.S <label>] 10843: //JBNLO.S <label> |A|012346|-|----*|-----| |0110_010_001_sss_sss [BCC.S <label>] 10844: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10845: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 10846: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 10847: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10848: //BCC.S <label> |-|012346|-|----*|-----| |0110_010_010_sss_sss 10849: //BHS.S <label> |A|012346|-|----*|-----| |0110_010_010_sss_sss [BCC.S <label>] 10850: //BNCS.S <label> |A|012346|-|----*|-----| |0110_010_010_sss_sss [BCC.S <label>] 10851: //BNLO.S <label> |A|012346|-|----*|-----| |0110_010_010_sss_sss [BCC.S <label>] 10852: //JBCC.S <label> |A|012346|-|----*|-----| |0110_010_010_sss_sss [BCC.S <label>] 10853: //JBHS.S <label> |A|012346|-|----*|-----| |0110_010_010_sss_sss [BCC.S <label>] 10854: //JBNCS.S <label> |A|012346|-|----*|-----| |0110_010_010_sss_sss [BCC.S <label>] 10855: //JBNLO.S <label> |A|012346|-|----*|-----| |0110_010_010_sss_sss [BCC.S <label>] 10856: public static void irpBhss () throws M68kException { 10857: XEiJ.mpuCycleCount++; 10858: int t = XEiJ.regPC; //pc0+2 10859: int s = (byte) XEiJ.regOC; //8bitディスプレースメント 10860: t += s; //pc0+2+ディスプレースメント 10861: if ((t & 1) != 0) { //分岐先のアドレスが奇数 10862: //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ 10863: irpBccAddressError (t); 10864: } 10865: if (XEiJ.MPU_CC_HS << XEiJ.regCCR < 0) { //分岐する 10866: irpSetPC (t); 10867: } 10868: } //irpBhss 10869: 10870: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10871: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 10872: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 10873: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10874: //BCC.S <label> |-|--2346|-|----*|-----| |0110_010_011_sss_sss (s is not equal to 63) 10875: //BHS.S <label> |A|--2346|-|----*|-----| |0110_010_011_sss_sss (s is not equal to 63) [BCC.S <label>] 10876: //BNCS.S <label> |A|--2346|-|----*|-----| |0110_010_011_sss_sss (s is not equal to 63) [BCC.S <label>] 10877: //BNLO.S <label> |A|--2346|-|----*|-----| |0110_010_011_sss_sss (s is not equal to 63) [BCC.S <label>] 10878: //JBCC.S <label> |A|--2346|-|----*|-----| |0110_010_011_sss_sss (s is not equal to 63) [BCC.S <label>] 10879: //JBHS.S <label> |A|--2346|-|----*|-----| |0110_010_011_sss_sss (s is not equal to 63) [BCC.S <label>] 10880: //JBNCS.S <label> |A|--2346|-|----*|-----| |0110_010_011_sss_sss (s is not equal to 63) [BCC.S <label>] 10881: //JBNLO.S <label> |A|--2346|-|----*|-----| |0110_010_011_sss_sss (s is not equal to 63) [BCC.S <label>] 10882: //BCC.L <label> |-|--2346|-|----*|-----| |0110_010_011_111_111-{offset} 10883: //BHS.L <label> |A|--2346|-|----*|-----| |0110_010_011_111_111-{offset} [BCC.L <label>] 10884: //BNCS.L <label> |A|--2346|-|----*|-----| |0110_010_011_111_111-{offset} [BCC.L <label>] 10885: //BNLO.L <label> |A|--2346|-|----*|-----| |0110_010_011_111_111-{offset} [BCC.L <label>] 10886: public static void irpBhssl () throws M68kException { 10887: XEiJ.mpuCycleCount++; 10888: int t = XEiJ.regPC; //pc0+2 10889: int s = (byte) XEiJ.regOC; //8bitディスプレースメント 10890: if (s == -1) { //Bcc.L 10891: XEiJ.regPC = t + 4; //pc0+6 10892: s = mmuReadLongExword (t, XEiJ.regSRS); //32bitディスプレースメント 10893: } 10894: t += s; //pc0+2+ディスプレースメント 10895: if ((t & 1) != 0) { //分岐先のアドレスが奇数 10896: //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ 10897: irpBccAddressError (t); 10898: } 10899: if (XEiJ.MPU_CC_HS << XEiJ.regCCR < 0) { //分岐する 10900: irpSetPC (t); 10901: } 10902: } //irpBhssl 10903: 10904: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10905: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 10906: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 10907: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10908: //BCS.W <label> |-|012346|-|----*|-----| |0110_010_100_000_000-{offset} 10909: //BLO.W <label> |A|012346|-|----*|-----| |0110_010_100_000_000-{offset} [BCS.W <label>] 10910: //BNCC.W <label> |A|012346|-|----*|-----| |0110_010_100_000_000-{offset} [BCS.W <label>] 10911: //BNHS.W <label> |A|012346|-|----*|-----| |0110_010_100_000_000-{offset} [BCS.W <label>] 10912: //JBCS.W <label> |A|012346|-|----*|-----| |0110_010_100_000_000-{offset} [BCS.W <label>] 10913: //JBLO.W <label> |A|012346|-|----*|-----| |0110_010_100_000_000-{offset} [BCS.W <label>] 10914: //JBNCC.W <label> |A|012346|-|----*|-----| |0110_010_100_000_000-{offset} [BCS.W <label>] 10915: //JBNHS.W <label> |A|012346|-|----*|-----| |0110_010_100_000_000-{offset} [BCS.W <label>] 10916: //BCS.S <label> |-|012346|-|----*|-----| |0110_010_100_sss_sss (s is not equal to 0) 10917: //BLO.S <label> |A|012346|-|----*|-----| |0110_010_100_sss_sss (s is not equal to 0) [BCS.S <label>] 10918: //BNCC.S <label> |A|012346|-|----*|-----| |0110_010_100_sss_sss (s is not equal to 0) [BCS.S <label>] 10919: //BNHS.S <label> |A|012346|-|----*|-----| |0110_010_100_sss_sss (s is not equal to 0) [BCS.S <label>] 10920: //JBCS.S <label> |A|012346|-|----*|-----| |0110_010_100_sss_sss (s is not equal to 0) [BCS.S <label>] 10921: //JBLO.S <label> |A|012346|-|----*|-----| |0110_010_100_sss_sss (s is not equal to 0) [BCS.S <label>] 10922: //JBNCC.S <label> |A|012346|-|----*|-----| |0110_010_100_sss_sss (s is not equal to 0) [BCS.S <label>] 10923: //JBNHS.S <label> |A|012346|-|----*|-----| |0110_010_100_sss_sss (s is not equal to 0) [BCS.S <label>] 10924: //JBCC.L <label> |A|012346|-|----*|-----| |0110_010_100_000_110-0100111011111001-{address} [BCS.S (*)+8;JMP <label>] 10925: //JBHS.L <label> |A|012346|-|----*|-----| |0110_010_100_000_110-0100111011111001-{address} [BCS.S (*)+8;JMP <label>] 10926: //JBNCS.L <label> |A|012346|-|----*|-----| |0110_010_100_000_110-0100111011111001-{address} [BCS.S (*)+8;JMP <label>] 10927: //JBNLO.L <label> |A|012346|-|----*|-----| |0110_010_100_000_110-0100111011111001-{address} [BCS.S (*)+8;JMP <label>] 10928: public static void irpBlosw () throws M68kException { 10929: XEiJ.mpuCycleCount++; 10930: int t = XEiJ.regPC; //pc0+2 10931: int s = (byte) XEiJ.regOC; //8bitディスプレースメント 10932: if (s == 0) { //Bcc.W 10933: XEiJ.regPC = t + 2; //pc0+4 10934: s = mmuReadWordSignExword (t, XEiJ.regSRS); //16bitディスプレースメント 10935: } 10936: t += s; //pc0+2+ディスプレースメント 10937: if ((t & 1) != 0) { //分岐先のアドレスが奇数 10938: //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ 10939: irpBccAddressError (t); 10940: } 10941: if (XEiJ.MPU_CC_LO << XEiJ.regCCR < 0) { //分岐する 10942: irpSetPC (t); 10943: } 10944: } //irpBlosw 10945: 10946: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10947: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 10948: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 10949: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10950: //BCS.S <label> |-|012346|-|----*|-----| |0110_010_101_sss_sss 10951: //BLO.S <label> |A|012346|-|----*|-----| |0110_010_101_sss_sss [BCS.S <label>] 10952: //BNCC.S <label> |A|012346|-|----*|-----| |0110_010_101_sss_sss [BCS.S <label>] 10953: //BNHS.S <label> |A|012346|-|----*|-----| |0110_010_101_sss_sss [BCS.S <label>] 10954: //JBCS.S <label> |A|012346|-|----*|-----| |0110_010_101_sss_sss [BCS.S <label>] 10955: //JBLO.S <label> |A|012346|-|----*|-----| |0110_010_101_sss_sss [BCS.S <label>] 10956: //JBNCC.S <label> |A|012346|-|----*|-----| |0110_010_101_sss_sss [BCS.S <label>] 10957: //JBNHS.S <label> |A|012346|-|----*|-----| |0110_010_101_sss_sss [BCS.S <label>] 10958: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10959: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 10960: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 10961: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10962: //BCS.S <label> |-|012346|-|----*|-----| |0110_010_110_sss_sss 10963: //BLO.S <label> |A|012346|-|----*|-----| |0110_010_110_sss_sss [BCS.S <label>] 10964: //BNCC.S <label> |A|012346|-|----*|-----| |0110_010_110_sss_sss [BCS.S <label>] 10965: //BNHS.S <label> |A|012346|-|----*|-----| |0110_010_110_sss_sss [BCS.S <label>] 10966: //JBCS.S <label> |A|012346|-|----*|-----| |0110_010_110_sss_sss [BCS.S <label>] 10967: //JBLO.S <label> |A|012346|-|----*|-----| |0110_010_110_sss_sss [BCS.S <label>] 10968: //JBNCC.S <label> |A|012346|-|----*|-----| |0110_010_110_sss_sss [BCS.S <label>] 10969: //JBNHS.S <label> |A|012346|-|----*|-----| |0110_010_110_sss_sss [BCS.S <label>] 10970: public static void irpBlos () throws M68kException { 10971: XEiJ.mpuCycleCount++; 10972: int t = XEiJ.regPC; //pc0+2 10973: int s = (byte) XEiJ.regOC; //8bitディスプレースメント 10974: t += s; //pc0+2+ディスプレースメント 10975: if ((t & 1) != 0) { //分岐先のアドレスが奇数 10976: //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ 10977: irpBccAddressError (t); 10978: } 10979: if (XEiJ.MPU_CC_LO << XEiJ.regCCR < 0) { //分岐する 10980: irpSetPC (t); 10981: } 10982: } //irpBlos 10983: 10984: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10985: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 10986: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 10987: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10988: //BCS.S <label> |-|--2346|-|----*|-----| |0110_010_111_sss_sss (s is not equal to 63) 10989: //BLO.S <label> |A|--2346|-|----*|-----| |0110_010_111_sss_sss (s is not equal to 63) [BCS.S <label>] 10990: //BNCC.S <label> |A|--2346|-|----*|-----| |0110_010_111_sss_sss (s is not equal to 63) [BCS.S <label>] 10991: //BNHS.S <label> |A|--2346|-|----*|-----| |0110_010_111_sss_sss (s is not equal to 63) [BCS.S <label>] 10992: //JBCS.S <label> |A|--2346|-|----*|-----| |0110_010_111_sss_sss (s is not equal to 63) [BCS.S <label>] 10993: //JBLO.S <label> |A|--2346|-|----*|-----| |0110_010_111_sss_sss (s is not equal to 63) [BCS.S <label>] 10994: //JBNCC.S <label> |A|--2346|-|----*|-----| |0110_010_111_sss_sss (s is not equal to 63) [BCS.S <label>] 10995: //JBNHS.S <label> |A|--2346|-|----*|-----| |0110_010_111_sss_sss (s is not equal to 63) [BCS.S <label>] 10996: //BCS.L <label> |-|--2346|-|----*|-----| |0110_010_111_111_111-{offset} 10997: //BLO.L <label> |A|--2346|-|----*|-----| |0110_010_111_111_111-{offset} [BCS.L <label>] 10998: //BNCC.L <label> |A|--2346|-|----*|-----| |0110_010_111_111_111-{offset} [BCS.L <label>] 10999: //BNHS.L <label> |A|--2346|-|----*|-----| |0110_010_111_111_111-{offset} [BCS.L <label>] 11000: public static void irpBlosl () throws M68kException { 11001: XEiJ.mpuCycleCount++; 11002: int t = XEiJ.regPC; //pc0+2 11003: int s = (byte) XEiJ.regOC; //8bitディスプレースメント 11004: if (s == -1) { //Bcc.L 11005: XEiJ.regPC = t + 4; //pc0+6 11006: s = mmuReadLongExword (t, XEiJ.regSRS); //32bitディスプレースメント 11007: } 11008: t += s; //pc0+2+ディスプレースメント 11009: if ((t & 1) != 0) { //分岐先のアドレスが奇数 11010: //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ 11011: irpBccAddressError (t); 11012: } 11013: if (XEiJ.MPU_CC_LO << XEiJ.regCCR < 0) { //分岐する 11014: irpSetPC (t); 11015: } 11016: } //irpBlosl 11017: 11018: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11019: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11020: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11021: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11022: //BNE.W <label> |-|012346|-|--*--|-----| |0110_011_000_000_000-{offset} 11023: //BNEQ.W <label> |A|012346|-|--*--|-----| |0110_011_000_000_000-{offset} [BNE.W <label>] 11024: //BNZ.W <label> |A|012346|-|--*--|-----| |0110_011_000_000_000-{offset} [BNE.W <label>] 11025: //BNZE.W <label> |A|012346|-|--*--|-----| |0110_011_000_000_000-{offset} [BNE.W <label>] 11026: //JBNE.W <label> |A|012346|-|--*--|-----| |0110_011_000_000_000-{offset} [BNE.W <label>] 11027: //JBNEQ.W <label> |A|012346|-|--*--|-----| |0110_011_000_000_000-{offset} [BNE.W <label>] 11028: //JBNZ.W <label> |A|012346|-|--*--|-----| |0110_011_000_000_000-{offset} [BNE.W <label>] 11029: //JBNZE.W <label> |A|012346|-|--*--|-----| |0110_011_000_000_000-{offset} [BNE.W <label>] 11030: //BNE.S <label> |-|012346|-|--*--|-----| |0110_011_000_sss_sss (s is not equal to 0) 11031: //BNEQ.S <label> |A|012346|-|--*--|-----| |0110_011_000_sss_sss (s is not equal to 0) [BNE.S <label>] 11032: //BNZ.S <label> |A|012346|-|--*--|-----| |0110_011_000_sss_sss (s is not equal to 0) [BNE.S <label>] 11033: //BNZE.S <label> |A|012346|-|--*--|-----| |0110_011_000_sss_sss (s is not equal to 0) [BNE.S <label>] 11034: //JBNE.S <label> |A|012346|-|--*--|-----| |0110_011_000_sss_sss (s is not equal to 0) [BNE.S <label>] 11035: //JBNEQ.S <label> |A|012346|-|--*--|-----| |0110_011_000_sss_sss (s is not equal to 0) [BNE.S <label>] 11036: //JBNZ.S <label> |A|012346|-|--*--|-----| |0110_011_000_sss_sss (s is not equal to 0) [BNE.S <label>] 11037: //JBNZE.S <label> |A|012346|-|--*--|-----| |0110_011_000_sss_sss (s is not equal to 0) [BNE.S <label>] 11038: //JBEQ.L <label> |A|012346|-|--*--|-----| |0110_011_000_000_110-0100111011111001-{address} [BNE.S (*)+8;JMP <label>] 11039: //JBNEQ.L <label> |A|012346|-|--*--|-----| |0110_011_000_000_110-0100111011111001-{address} [BNE.S (*)+8;JMP <label>] 11040: //JBNNE.L <label> |A|012346|-|--*--|-----| |0110_011_000_000_110-0100111011111001-{address} [BNE.S (*)+8;JMP <label>] 11041: //JBNNZ.L <label> |A|012346|-|--*--|-----| |0110_011_000_000_110-0100111011111001-{address} [BNE.S (*)+8;JMP <label>] 11042: //JBNZ.L <label> |A|012346|-|--*--|-----| |0110_011_000_000_110-0100111011111001-{address} [BNE.S (*)+8;JMP <label>] 11043: //JBNZE.L <label> |A|012346|-|--*--|-----| |0110_011_000_000_110-0100111011111001-{address} [BNE.S (*)+8;JMP <label>] 11044: //JBZE.L <label> |A|012346|-|--*--|-----| |0110_011_000_000_110-0100111011111001-{address} [BNE.S (*)+8;JMP <label>] 11045: public static void irpBnesw () throws M68kException { 11046: XEiJ.mpuCycleCount++; 11047: int t = XEiJ.regPC; //pc0+2 11048: int s = (byte) XEiJ.regOC; //8bitディスプレースメント 11049: if (s == 0) { //Bcc.W 11050: XEiJ.regPC = t + 2; //pc0+4 11051: s = mmuReadWordSignExword (t, XEiJ.regSRS); //16bitディスプレースメント 11052: } 11053: t += s; //pc0+2+ディスプレースメント 11054: if ((t & 1) != 0) { //分岐先のアドレスが奇数 11055: //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ 11056: irpBccAddressError (t); 11057: } 11058: if (XEiJ.MPU_CC_NE << XEiJ.regCCR < 0) { //分岐する 11059: irpSetPC (t); 11060: } 11061: } //irpBnesw 11062: 11063: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11064: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11065: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11066: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11067: //BNE.S <label> |-|012346|-|--*--|-----| |0110_011_001_sss_sss 11068: //BNEQ.S <label> |A|012346|-|--*--|-----| |0110_011_001_sss_sss [BNE.S <label>] 11069: //BNZ.S <label> |A|012346|-|--*--|-----| |0110_011_001_sss_sss [BNE.S <label>] 11070: //BNZE.S <label> |A|012346|-|--*--|-----| |0110_011_001_sss_sss [BNE.S <label>] 11071: //JBNE.S <label> |A|012346|-|--*--|-----| |0110_011_001_sss_sss [BNE.S <label>] 11072: //JBNEQ.S <label> |A|012346|-|--*--|-----| |0110_011_001_sss_sss [BNE.S <label>] 11073: //JBNZ.S <label> |A|012346|-|--*--|-----| |0110_011_001_sss_sss [BNE.S <label>] 11074: //JBNZE.S <label> |A|012346|-|--*--|-----| |0110_011_001_sss_sss [BNE.S <label>] 11075: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11076: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11077: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11078: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11079: //BNE.S <label> |-|012346|-|--*--|-----| |0110_011_010_sss_sss 11080: //BNEQ.S <label> |A|012346|-|--*--|-----| |0110_011_010_sss_sss [BNE.S <label>] 11081: //BNZ.S <label> |A|012346|-|--*--|-----| |0110_011_010_sss_sss [BNE.S <label>] 11082: //BNZE.S <label> |A|012346|-|--*--|-----| |0110_011_010_sss_sss [BNE.S <label>] 11083: //JBNE.S <label> |A|012346|-|--*--|-----| |0110_011_010_sss_sss [BNE.S <label>] 11084: //JBNEQ.S <label> |A|012346|-|--*--|-----| |0110_011_010_sss_sss [BNE.S <label>] 11085: //JBNZ.S <label> |A|012346|-|--*--|-----| |0110_011_010_sss_sss [BNE.S <label>] 11086: //JBNZE.S <label> |A|012346|-|--*--|-----| |0110_011_010_sss_sss [BNE.S <label>] 11087: public static void irpBnes () throws M68kException { 11088: XEiJ.mpuCycleCount++; 11089: int t = XEiJ.regPC; //pc0+2 11090: int s = (byte) XEiJ.regOC; //8bitディスプレースメント 11091: t += s; //pc0+2+ディスプレースメント 11092: if ((t & 1) != 0) { //分岐先のアドレスが奇数 11093: //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ 11094: irpBccAddressError (t); 11095: } 11096: if (XEiJ.MPU_CC_NE << XEiJ.regCCR < 0) { //分岐する 11097: irpSetPC (t); 11098: } 11099: } //irpBnes 11100: 11101: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11102: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11103: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11104: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11105: //BNE.S <label> |-|--2346|-|--*--|-----| |0110_011_011_sss_sss (s is not equal to 63) 11106: //BNEQ.S <label> |A|--2346|-|--*--|-----| |0110_011_011_sss_sss (s is not equal to 63) [BNE.S <label>] 11107: //BNZ.S <label> |A|--2346|-|--*--|-----| |0110_011_011_sss_sss (s is not equal to 63) [BNE.S <label>] 11108: //BNZE.S <label> |A|--2346|-|--*--|-----| |0110_011_011_sss_sss (s is not equal to 63) [BNE.S <label>] 11109: //JBNE.S <label> |A|--2346|-|--*--|-----| |0110_011_011_sss_sss (s is not equal to 63) [BNE.S <label>] 11110: //JBNEQ.S <label> |A|--2346|-|--*--|-----| |0110_011_011_sss_sss (s is not equal to 63) [BNE.S <label>] 11111: //JBNZ.S <label> |A|--2346|-|--*--|-----| |0110_011_011_sss_sss (s is not equal to 63) [BNE.S <label>] 11112: //JBNZE.S <label> |A|--2346|-|--*--|-----| |0110_011_011_sss_sss (s is not equal to 63) [BNE.S <label>] 11113: //BNE.L <label> |-|--2346|-|--*--|-----| |0110_011_011_111_111-{offset} 11114: //BNEQ.L <label> |A|--2346|-|--*--|-----| |0110_011_011_111_111-{offset} [BNE.L <label>] 11115: //BNZ.L <label> |A|--2346|-|--*--|-----| |0110_011_011_111_111-{offset} [BNE.L <label>] 11116: //BNZE.L <label> |A|--2346|-|--*--|-----| |0110_011_011_111_111-{offset} [BNE.L <label>] 11117: public static void irpBnesl () throws M68kException { 11118: XEiJ.mpuCycleCount++; 11119: int t = XEiJ.regPC; //pc0+2 11120: int s = (byte) XEiJ.regOC; //8bitディスプレースメント 11121: if (s == -1) { //Bcc.L 11122: XEiJ.regPC = t + 4; //pc0+6 11123: s = mmuReadLongExword (t, XEiJ.regSRS); //32bitディスプレースメント 11124: } 11125: t += s; //pc0+2+ディスプレースメント 11126: if ((t & 1) != 0) { //分岐先のアドレスが奇数 11127: //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ 11128: irpBccAddressError (t); 11129: } 11130: if (XEiJ.MPU_CC_NE << XEiJ.regCCR < 0) { //分岐する 11131: irpSetPC (t); 11132: } 11133: } //irpBnesl 11134: 11135: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11136: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11137: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11138: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11139: //BEQ.W <label> |-|012346|-|--*--|-----| |0110_011_100_000_000-{offset} 11140: //BNNE.W <label> |A|012346|-|--*--|-----| |0110_011_100_000_000-{offset} [BEQ.W <label>] 11141: //BNNZ.W <label> |A|012346|-|--*--|-----| |0110_011_100_000_000-{offset} [BEQ.W <label>] 11142: //BZE.W <label> |A|012346|-|--*--|-----| |0110_011_100_000_000-{offset} [BEQ.W <label>] 11143: //JBEQ.W <label> |A|012346|-|--*--|-----| |0110_011_100_000_000-{offset} [BEQ.W <label>] 11144: //JBNNE.W <label> |A|012346|-|--*--|-----| |0110_011_100_000_000-{offset} [BEQ.W <label>] 11145: //JBNNZ.W <label> |A|012346|-|--*--|-----| |0110_011_100_000_000-{offset} [BEQ.W <label>] 11146: //JBZE.W <label> |A|012346|-|--*--|-----| |0110_011_100_000_000-{offset} [BEQ.W <label>] 11147: //BEQ.S <label> |-|012346|-|--*--|-----| |0110_011_100_sss_sss (s is not equal to 0) 11148: //BNNE.S <label> |A|012346|-|--*--|-----| |0110_011_100_sss_sss (s is not equal to 0) [BEQ.S <label>] 11149: //BNNZ.S <label> |A|012346|-|--*--|-----| |0110_011_100_sss_sss (s is not equal to 0) [BEQ.S <label>] 11150: //BZE.S <label> |A|012346|-|--*--|-----| |0110_011_100_sss_sss (s is not equal to 0) [BEQ.S <label>] 11151: //JBEQ.S <label> |A|012346|-|--*--|-----| |0110_011_100_sss_sss (s is not equal to 0) [BEQ.S <label>] 11152: //JBNNE.S <label> |A|012346|-|--*--|-----| |0110_011_100_sss_sss (s is not equal to 0) [BEQ.S <label>] 11153: //JBNNZ.S <label> |A|012346|-|--*--|-----| |0110_011_100_sss_sss (s is not equal to 0) [BEQ.S <label>] 11154: //JBZE.S <label> |A|012346|-|--*--|-----| |0110_011_100_sss_sss (s is not equal to 0) [BEQ.S <label>] 11155: //JBNE.L <label> |A|012346|-|--*--|-----| |0110_011_100_000_110-0100111011111001-{address} [BEQ.S (*)+8;JMP <label>] 11156: public static void irpBeqsw () throws M68kException { 11157: XEiJ.mpuCycleCount++; 11158: int t = XEiJ.regPC; //pc0+2 11159: int s = (byte) XEiJ.regOC; //8bitディスプレースメント 11160: if (s == 0) { //Bcc.W 11161: XEiJ.regPC = t + 2; //pc0+4 11162: s = mmuReadWordSignExword (t, XEiJ.regSRS); //16bitディスプレースメント 11163: } 11164: t += s; //pc0+2+ディスプレースメント 11165: if ((t & 1) != 0) { //分岐先のアドレスが奇数 11166: //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ 11167: irpBccAddressError (t); 11168: } 11169: if (XEiJ.MPU_CC_EQ << XEiJ.regCCR < 0) { //分岐する 11170: irpSetPC (t); 11171: } 11172: } //irpBeqsw 11173: 11174: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11175: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11176: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11177: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11178: //BEQ.S <label> |-|012346|-|--*--|-----| |0110_011_101_sss_sss 11179: //BNNE.S <label> |A|012346|-|--*--|-----| |0110_011_101_sss_sss [BEQ.S <label>] 11180: //BNNZ.S <label> |A|012346|-|--*--|-----| |0110_011_101_sss_sss [BEQ.S <label>] 11181: //BZE.S <label> |A|012346|-|--*--|-----| |0110_011_101_sss_sss [BEQ.S <label>] 11182: //JBEQ.S <label> |A|012346|-|--*--|-----| |0110_011_101_sss_sss [BEQ.S <label>] 11183: //JBNNE.S <label> |A|012346|-|--*--|-----| |0110_011_101_sss_sss [BEQ.S <label>] 11184: //JBNNZ.S <label> |A|012346|-|--*--|-----| |0110_011_101_sss_sss [BEQ.S <label>] 11185: //JBZE.S <label> |A|012346|-|--*--|-----| |0110_011_101_sss_sss [BEQ.S <label>] 11186: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11187: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11188: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11189: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11190: //BEQ.S <label> |-|012346|-|--*--|-----| |0110_011_110_sss_sss 11191: //BNNE.S <label> |A|012346|-|--*--|-----| |0110_011_110_sss_sss [BEQ.S <label>] 11192: //BNNZ.S <label> |A|012346|-|--*--|-----| |0110_011_110_sss_sss [BEQ.S <label>] 11193: //BZE.S <label> |A|012346|-|--*--|-----| |0110_011_110_sss_sss [BEQ.S <label>] 11194: //JBEQ.S <label> |A|012346|-|--*--|-----| |0110_011_110_sss_sss [BEQ.S <label>] 11195: //JBNNE.S <label> |A|012346|-|--*--|-----| |0110_011_110_sss_sss [BEQ.S <label>] 11196: //JBNNZ.S <label> |A|012346|-|--*--|-----| |0110_011_110_sss_sss [BEQ.S <label>] 11197: //JBZE.S <label> |A|012346|-|--*--|-----| |0110_011_110_sss_sss [BEQ.S <label>] 11198: public static void irpBeqs () throws M68kException { 11199: XEiJ.mpuCycleCount++; 11200: int t = XEiJ.regPC; //pc0+2 11201: int s = (byte) XEiJ.regOC; //8bitディスプレースメント 11202: t += s; //pc0+2+ディスプレースメント 11203: if ((t & 1) != 0) { //分岐先のアドレスが奇数 11204: //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ 11205: irpBccAddressError (t); 11206: } 11207: if (XEiJ.MPU_CC_EQ << XEiJ.regCCR < 0) { //分岐する 11208: irpSetPC (t); 11209: } 11210: } //irpBeqs 11211: 11212: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11213: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11214: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11215: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11216: //BEQ.S <label> |-|--2346|-|--*--|-----| |0110_011_111_sss_sss (s is not equal to 63) 11217: //BNNE.S <label> |A|--2346|-|--*--|-----| |0110_011_111_sss_sss (s is not equal to 63) [BEQ.S <label>] 11218: //BNNZ.S <label> |A|--2346|-|--*--|-----| |0110_011_111_sss_sss (s is not equal to 63) [BEQ.S <label>] 11219: //BZE.S <label> |A|--2346|-|--*--|-----| |0110_011_111_sss_sss (s is not equal to 63) [BEQ.S <label>] 11220: //JBEQ.S <label> |A|--2346|-|--*--|-----| |0110_011_111_sss_sss (s is not equal to 63) [BEQ.S <label>] 11221: //JBNNE.S <label> |A|--2346|-|--*--|-----| |0110_011_111_sss_sss (s is not equal to 63) [BEQ.S <label>] 11222: //JBNNZ.S <label> |A|--2346|-|--*--|-----| |0110_011_111_sss_sss (s is not equal to 63) [BEQ.S <label>] 11223: //JBZE.S <label> |A|--2346|-|--*--|-----| |0110_011_111_sss_sss (s is not equal to 63) [BEQ.S <label>] 11224: //BEQ.L <label> |-|--2346|-|--*--|-----| |0110_011_111_111_111-{offset} 11225: //BNNE.L <label> |A|--2346|-|--*--|-----| |0110_011_111_111_111-{offset} [BEQ.L <label>] 11226: //BNNZ.L <label> |A|--2346|-|--*--|-----| |0110_011_111_111_111-{offset} [BEQ.L <label>] 11227: //BZE.L <label> |A|--2346|-|--*--|-----| |0110_011_111_111_111-{offset} [BEQ.L <label>] 11228: public static void irpBeqsl () throws M68kException { 11229: XEiJ.mpuCycleCount++; 11230: int t = XEiJ.regPC; //pc0+2 11231: int s = (byte) XEiJ.regOC; //8bitディスプレースメント 11232: if (s == -1) { //Bcc.L 11233: XEiJ.regPC = t + 4; //pc0+6 11234: s = mmuReadLongExword (t, XEiJ.regSRS); //32bitディスプレースメント 11235: } 11236: t += s; //pc0+2+ディスプレースメント 11237: if ((t & 1) != 0) { //分岐先のアドレスが奇数 11238: //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ 11239: irpBccAddressError (t); 11240: } 11241: if (XEiJ.MPU_CC_EQ << XEiJ.regCCR < 0) { //分岐する 11242: irpSetPC (t); 11243: } 11244: } //irpBeqsl 11245: 11246: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11247: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11248: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11249: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11250: //BVC.W <label> |-|012346|-|---*-|-----| |0110_100_000_000_000-{offset} 11251: //BNVS.W <label> |A|012346|-|---*-|-----| |0110_100_000_000_000-{offset} [BVC.W <label>] 11252: //JBNVS.W <label> |A|012346|-|---*-|-----| |0110_100_000_000_000-{offset} [BVC.W <label>] 11253: //JBVC.W <label> |A|012346|-|---*-|-----| |0110_100_000_000_000-{offset} [BVC.W <label>] 11254: //BVC.S <label> |-|012346|-|---*-|-----| |0110_100_000_sss_sss (s is not equal to 0) 11255: //BNVS.S <label> |A|012346|-|---*-|-----| |0110_100_000_sss_sss (s is not equal to 0) [BVC.S <label>] 11256: //JBNVS.S <label> |A|012346|-|---*-|-----| |0110_100_000_sss_sss (s is not equal to 0) [BVC.S <label>] 11257: //JBVC.S <label> |A|012346|-|---*-|-----| |0110_100_000_sss_sss (s is not equal to 0) [BVC.S <label>] 11258: //JBNVC.L <label> |A|012346|-|---*-|-----| |0110_100_000_000_110-0100111011111001-{address} [BVC.S (*)+8;JMP <label>] 11259: //JBVS.L <label> |A|012346|-|---*-|-----| |0110_100_000_000_110-0100111011111001-{address} [BVC.S (*)+8;JMP <label>] 11260: public static void irpBvcsw () throws M68kException { 11261: XEiJ.mpuCycleCount++; 11262: int t = XEiJ.regPC; //pc0+2 11263: int s = (byte) XEiJ.regOC; //8bitディスプレースメント 11264: if (s == 0) { //Bcc.W 11265: XEiJ.regPC = t + 2; //pc0+4 11266: s = mmuReadWordSignExword (t, XEiJ.regSRS); //16bitディスプレースメント 11267: } 11268: t += s; //pc0+2+ディスプレースメント 11269: if ((t & 1) != 0) { //分岐先のアドレスが奇数 11270: //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ 11271: irpBccAddressError (t); 11272: } 11273: if (XEiJ.MPU_CC_VC << XEiJ.regCCR < 0) { //分岐する 11274: irpSetPC (t); 11275: } 11276: } //irpBvcsw 11277: 11278: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11279: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11280: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11281: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11282: //BVC.S <label> |-|012346|-|---*-|-----| |0110_100_001_sss_sss 11283: //BNVS.S <label> |A|012346|-|---*-|-----| |0110_100_001_sss_sss [BVC.S <label>] 11284: //JBNVS.S <label> |A|012346|-|---*-|-----| |0110_100_001_sss_sss [BVC.S <label>] 11285: //JBVC.S <label> |A|012346|-|---*-|-----| |0110_100_001_sss_sss [BVC.S <label>] 11286: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11287: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11288: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11289: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11290: //BVC.S <label> |-|012346|-|---*-|-----| |0110_100_010_sss_sss 11291: //BNVS.S <label> |A|012346|-|---*-|-----| |0110_100_010_sss_sss [BVC.S <label>] 11292: //JBNVS.S <label> |A|012346|-|---*-|-----| |0110_100_010_sss_sss [BVC.S <label>] 11293: //JBVC.S <label> |A|012346|-|---*-|-----| |0110_100_010_sss_sss [BVC.S <label>] 11294: public static void irpBvcs () throws M68kException { 11295: XEiJ.mpuCycleCount++; 11296: int t = XEiJ.regPC; //pc0+2 11297: int s = (byte) XEiJ.regOC; //8bitディスプレースメント 11298: t += s; //pc0+2+ディスプレースメント 11299: if ((t & 1) != 0) { //分岐先のアドレスが奇数 11300: //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ 11301: irpBccAddressError (t); 11302: } 11303: if (XEiJ.MPU_CC_VC << XEiJ.regCCR < 0) { //分岐する 11304: irpSetPC (t); 11305: } 11306: } //irpBvcs 11307: 11308: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11309: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11310: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11311: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11312: //BVC.S <label> |-|--2346|-|---*-|-----| |0110_100_011_sss_sss (s is not equal to 63) 11313: //BNVS.S <label> |A|--2346|-|---*-|-----| |0110_100_011_sss_sss (s is not equal to 63) [BVC.S <label>] 11314: //JBNVS.S <label> |A|--2346|-|---*-|-----| |0110_100_011_sss_sss (s is not equal to 63) [BVC.S <label>] 11315: //JBVC.S <label> |A|--2346|-|---*-|-----| |0110_100_011_sss_sss (s is not equal to 63) [BVC.S <label>] 11316: //BVC.L <label> |-|--2346|-|---*-|-----| |0110_100_011_111_111-{offset} 11317: //BNVS.L <label> |A|--2346|-|---*-|-----| |0110_100_011_111_111-{offset} [BVC.L <label>] 11318: public static void irpBvcsl () throws M68kException { 11319: XEiJ.mpuCycleCount++; 11320: int t = XEiJ.regPC; //pc0+2 11321: int s = (byte) XEiJ.regOC; //8bitディスプレースメント 11322: if (s == -1) { //Bcc.L 11323: XEiJ.regPC = t + 4; //pc0+6 11324: s = mmuReadLongExword (t, XEiJ.regSRS); //32bitディスプレースメント 11325: } 11326: t += s; //pc0+2+ディスプレースメント 11327: if ((t & 1) != 0) { //分岐先のアドレスが奇数 11328: //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ 11329: irpBccAddressError (t); 11330: } 11331: if (XEiJ.MPU_CC_VC << XEiJ.regCCR < 0) { //分岐する 11332: irpSetPC (t); 11333: } 11334: } //irpBvcsl 11335: 11336: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11337: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11338: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11339: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11340: //BVS.W <label> |-|012346|-|---*-|-----| |0110_100_100_000_000-{offset} 11341: //BNVC.W <label> |A|012346|-|---*-|-----| |0110_100_100_000_000-{offset} [BVS.W <label>] 11342: //JBNVC.W <label> |A|012346|-|---*-|-----| |0110_100_100_000_000-{offset} [BVS.W <label>] 11343: //JBVS.W <label> |A|012346|-|---*-|-----| |0110_100_100_000_000-{offset} [BVS.W <label>] 11344: //BVS.S <label> |-|012346|-|---*-|-----| |0110_100_100_sss_sss (s is not equal to 0) 11345: //BNVC.S <label> |A|012346|-|---*-|-----| |0110_100_100_sss_sss (s is not equal to 0) [BVS.S <label>] 11346: //JBNVC.S <label> |A|012346|-|---*-|-----| |0110_100_100_sss_sss (s is not equal to 0) [BVS.S <label>] 11347: //JBVS.S <label> |A|012346|-|---*-|-----| |0110_100_100_sss_sss (s is not equal to 0) [BVS.S <label>] 11348: //JBNVS.L <label> |A|012346|-|---*-|-----| |0110_100_100_000_110-0100111011111001-{address} [BVS.S (*)+8;JMP <label>] 11349: //JBVC.L <label> |A|012346|-|---*-|-----| |0110_100_100_000_110-0100111011111001-{address} [BVS.S (*)+8;JMP <label>] 11350: public static void irpBvssw () throws M68kException { 11351: XEiJ.mpuCycleCount++; 11352: int t = XEiJ.regPC; //pc0+2 11353: int s = (byte) XEiJ.regOC; //8bitディスプレースメント 11354: if (s == 0) { //Bcc.W 11355: XEiJ.regPC = t + 2; //pc0+4 11356: s = mmuReadWordSignExword (t, XEiJ.regSRS); //16bitディスプレースメント 11357: } 11358: t += s; //pc0+2+ディスプレースメント 11359: if ((t & 1) != 0) { //分岐先のアドレスが奇数 11360: //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ 11361: irpBccAddressError (t); 11362: } 11363: if (XEiJ.MPU_CC_VS << XEiJ.regCCR < 0) { //分岐する 11364: irpSetPC (t); 11365: } 11366: } //irpBvssw 11367: 11368: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11369: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11370: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11371: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11372: //BVS.S <label> |-|012346|-|---*-|-----| |0110_100_101_sss_sss 11373: //BNVC.S <label> |A|012346|-|---*-|-----| |0110_100_101_sss_sss [BVS.S <label>] 11374: //JBNVC.S <label> |A|012346|-|---*-|-----| |0110_100_101_sss_sss [BVS.S <label>] 11375: //JBVS.S <label> |A|012346|-|---*-|-----| |0110_100_101_sss_sss [BVS.S <label>] 11376: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11377: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11378: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11379: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11380: //BVS.S <label> |-|012346|-|---*-|-----| |0110_100_110_sss_sss 11381: //BNVC.S <label> |A|012346|-|---*-|-----| |0110_100_110_sss_sss [BVS.S <label>] 11382: //JBNVC.S <label> |A|012346|-|---*-|-----| |0110_100_110_sss_sss [BVS.S <label>] 11383: //JBVS.S <label> |A|012346|-|---*-|-----| |0110_100_110_sss_sss [BVS.S <label>] 11384: public static void irpBvss () throws M68kException { 11385: XEiJ.mpuCycleCount++; 11386: int t = XEiJ.regPC; //pc0+2 11387: int s = (byte) XEiJ.regOC; //8bitディスプレースメント 11388: t += s; //pc0+2+ディスプレースメント 11389: if ((t & 1) != 0) { //分岐先のアドレスが奇数 11390: //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ 11391: irpBccAddressError (t); 11392: } 11393: if (XEiJ.MPU_CC_VS << XEiJ.regCCR < 0) { //分岐する 11394: irpSetPC (t); 11395: } 11396: } //irpBvss 11397: 11398: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11399: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11400: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11401: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11402: //BVS.S <label> |-|--2346|-|---*-|-----| |0110_100_111_sss_sss (s is not equal to 63) 11403: //BNVC.S <label> |A|--2346|-|---*-|-----| |0110_100_111_sss_sss (s is not equal to 63) [BVS.S <label>] 11404: //JBNVC.S <label> |A|--2346|-|---*-|-----| |0110_100_111_sss_sss (s is not equal to 63) [BVS.S <label>] 11405: //JBVS.S <label> |A|--2346|-|---*-|-----| |0110_100_111_sss_sss (s is not equal to 63) [BVS.S <label>] 11406: //BVS.L <label> |-|--2346|-|---*-|-----| |0110_100_111_111_111-{offset} 11407: //BNVC.L <label> |A|--2346|-|---*-|-----| |0110_100_111_111_111-{offset} [BVS.L <label>] 11408: public static void irpBvssl () throws M68kException { 11409: XEiJ.mpuCycleCount++; 11410: int t = XEiJ.regPC; //pc0+2 11411: int s = (byte) XEiJ.regOC; //8bitディスプレースメント 11412: if (s == -1) { //Bcc.L 11413: XEiJ.regPC = t + 4; //pc0+6 11414: s = mmuReadLongExword (t, XEiJ.regSRS); //32bitディスプレースメント 11415: } 11416: t += s; //pc0+2+ディスプレースメント 11417: if ((t & 1) != 0) { //分岐先のアドレスが奇数 11418: //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ 11419: irpBccAddressError (t); 11420: } 11421: if (XEiJ.MPU_CC_VS << XEiJ.regCCR < 0) { //分岐する 11422: irpSetPC (t); 11423: } 11424: } //irpBvssl 11425: 11426: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11427: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11428: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11429: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11430: //BPL.W <label> |-|012346|-|-*---|-----| |0110_101_000_000_000-{offset} 11431: //BNMI.W <label> |A|012346|-|-*---|-----| |0110_101_000_000_000-{offset} [BPL.W <label>] 11432: //JBNMI.W <label> |A|012346|-|-*---|-----| |0110_101_000_000_000-{offset} [BPL.W <label>] 11433: //JBPL.W <label> |A|012346|-|-*---|-----| |0110_101_000_000_000-{offset} [BPL.W <label>] 11434: //BPL.S <label> |-|012346|-|-*---|-----| |0110_101_000_sss_sss (s is not equal to 0) 11435: //BNMI.S <label> |A|012346|-|-*---|-----| |0110_101_000_sss_sss (s is not equal to 0) [BPL.S <label>] 11436: //JBNMI.S <label> |A|012346|-|-*---|-----| |0110_101_000_sss_sss (s is not equal to 0) [BPL.S <label>] 11437: //JBPL.S <label> |A|012346|-|-*---|-----| |0110_101_000_sss_sss (s is not equal to 0) [BPL.S <label>] 11438: //JBMI.L <label> |A|012346|-|-*---|-----| |0110_101_000_000_110-0100111011111001-{address} [BPL.S (*)+8;JMP <label>] 11439: //JBNPL.L <label> |A|012346|-|-*---|-----| |0110_101_000_000_110-0100111011111001-{address} [BPL.S (*)+8;JMP <label>] 11440: public static void irpBplsw () throws M68kException { 11441: XEiJ.mpuCycleCount++; 11442: int t = XEiJ.regPC; //pc0+2 11443: int s = (byte) XEiJ.regOC; //8bitディスプレースメント 11444: if (s == 0) { //Bcc.W 11445: XEiJ.regPC = t + 2; //pc0+4 11446: s = mmuReadWordSignExword (t, XEiJ.regSRS); //16bitディスプレースメント 11447: } 11448: t += s; //pc0+2+ディスプレースメント 11449: if ((t & 1) != 0) { //分岐先のアドレスが奇数 11450: //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ 11451: irpBccAddressError (t); 11452: } 11453: if (XEiJ.MPU_CC_PL << XEiJ.regCCR < 0) { //分岐する 11454: irpSetPC (t); 11455: } 11456: } //irpBplsw 11457: 11458: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11459: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11460: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11461: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11462: //BPL.S <label> |-|012346|-|-*---|-----| |0110_101_001_sss_sss 11463: //BNMI.S <label> |A|012346|-|-*---|-----| |0110_101_001_sss_sss [BPL.S <label>] 11464: //JBNMI.S <label> |A|012346|-|-*---|-----| |0110_101_001_sss_sss [BPL.S <label>] 11465: //JBPL.S <label> |A|012346|-|-*---|-----| |0110_101_001_sss_sss [BPL.S <label>] 11466: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11467: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11468: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11469: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11470: //BPL.S <label> |-|012346|-|-*---|-----| |0110_101_010_sss_sss 11471: //BNMI.S <label> |A|012346|-|-*---|-----| |0110_101_010_sss_sss [BPL.S <label>] 11472: //JBNMI.S <label> |A|012346|-|-*---|-----| |0110_101_010_sss_sss [BPL.S <label>] 11473: //JBPL.S <label> |A|012346|-|-*---|-----| |0110_101_010_sss_sss [BPL.S <label>] 11474: public static void irpBpls () throws M68kException { 11475: XEiJ.mpuCycleCount++; 11476: int t = XEiJ.regPC; //pc0+2 11477: int s = (byte) XEiJ.regOC; //8bitディスプレースメント 11478: t += s; //pc0+2+ディスプレースメント 11479: if ((t & 1) != 0) { //分岐先のアドレスが奇数 11480: //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ 11481: irpBccAddressError (t); 11482: } 11483: if (XEiJ.MPU_CC_PL << XEiJ.regCCR < 0) { //分岐する 11484: irpSetPC (t); 11485: } 11486: } //irpBpls 11487: 11488: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11489: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11490: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11491: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11492: //BPL.S <label> |-|--2346|-|-*---|-----| |0110_101_011_sss_sss (s is not equal to 63) 11493: //BNMI.S <label> |A|--2346|-|-*---|-----| |0110_101_011_sss_sss (s is not equal to 63) [BPL.S <label>] 11494: //JBNMI.S <label> |A|--2346|-|-*---|-----| |0110_101_011_sss_sss (s is not equal to 63) [BPL.S <label>] 11495: //JBPL.S <label> |A|--2346|-|-*---|-----| |0110_101_011_sss_sss (s is not equal to 63) [BPL.S <label>] 11496: //BPL.L <label> |-|--2346|-|-*---|-----| |0110_101_011_111_111-{offset} 11497: //BNMI.L <label> |A|--2346|-|-*---|-----| |0110_101_011_111_111-{offset} [BPL.L <label>] 11498: public static void irpBplsl () throws M68kException { 11499: XEiJ.mpuCycleCount++; 11500: int t = XEiJ.regPC; //pc0+2 11501: int s = (byte) XEiJ.regOC; //8bitディスプレースメント 11502: if (s == -1) { //Bcc.L 11503: XEiJ.regPC = t + 4; //pc0+6 11504: s = mmuReadLongExword (t, XEiJ.regSRS); //32bitディスプレースメント 11505: } 11506: t += s; //pc0+2+ディスプレースメント 11507: if ((t & 1) != 0) { //分岐先のアドレスが奇数 11508: //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ 11509: irpBccAddressError (t); 11510: } 11511: if (XEiJ.MPU_CC_PL << XEiJ.regCCR < 0) { //分岐する 11512: irpSetPC (t); 11513: } 11514: } //irpBplsl 11515: 11516: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11517: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11518: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11519: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11520: //BMI.W <label> |-|012346|-|-*---|-----| |0110_101_100_000_000-{offset} 11521: //BNPL.W <label> |A|012346|-|-*---|-----| |0110_101_100_000_000-{offset} [BMI.W <label>] 11522: //JBMI.W <label> |A|012346|-|-*---|-----| |0110_101_100_000_000-{offset} [BMI.W <label>] 11523: //JBNPL.W <label> |A|012346|-|-*---|-----| |0110_101_100_000_000-{offset} [BMI.W <label>] 11524: //BMI.S <label> |-|012346|-|-*---|-----| |0110_101_100_sss_sss (s is not equal to 0) 11525: //BNPL.S <label> |A|012346|-|-*---|-----| |0110_101_100_sss_sss (s is not equal to 0) [BMI.S <label>] 11526: //JBMI.S <label> |A|012346|-|-*---|-----| |0110_101_100_sss_sss (s is not equal to 0) [BMI.S <label>] 11527: //JBNPL.S <label> |A|012346|-|-*---|-----| |0110_101_100_sss_sss (s is not equal to 0) [BMI.S <label>] 11528: //JBNMI.L <label> |A|012346|-|-*---|-----| |0110_101_100_000_110-0100111011111001-{address} [BMI.S (*)+8;JMP <label>] 11529: //JBPL.L <label> |A|012346|-|-*---|-----| |0110_101_100_000_110-0100111011111001-{address} [BMI.S (*)+8;JMP <label>] 11530: public static void irpBmisw () throws M68kException { 11531: XEiJ.mpuCycleCount++; 11532: int t = XEiJ.regPC; //pc0+2 11533: int s = (byte) XEiJ.regOC; //8bitディスプレースメント 11534: if (s == 0) { //Bcc.W 11535: XEiJ.regPC = t + 2; //pc0+4 11536: s = mmuReadWordSignExword (t, XEiJ.regSRS); //16bitディスプレースメント 11537: } 11538: t += s; //pc0+2+ディスプレースメント 11539: if ((t & 1) != 0) { //分岐先のアドレスが奇数 11540: //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ 11541: irpBccAddressError (t); 11542: } 11543: if (XEiJ.MPU_CC_MI << XEiJ.regCCR < 0) { //分岐する 11544: irpSetPC (t); 11545: } 11546: } //irpBmisw 11547: 11548: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11549: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11550: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11551: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11552: //BMI.S <label> |-|012346|-|-*---|-----| |0110_101_101_sss_sss 11553: //BNPL.S <label> |A|012346|-|-*---|-----| |0110_101_101_sss_sss [BMI.S <label>] 11554: //JBMI.S <label> |A|012346|-|-*---|-----| |0110_101_101_sss_sss [BMI.S <label>] 11555: //JBNPL.S <label> |A|012346|-|-*---|-----| |0110_101_101_sss_sss [BMI.S <label>] 11556: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11557: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11558: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11559: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11560: //BMI.S <label> |-|012346|-|-*---|-----| |0110_101_110_sss_sss 11561: //BNPL.S <label> |A|012346|-|-*---|-----| |0110_101_110_sss_sss [BMI.S <label>] 11562: //JBMI.S <label> |A|012346|-|-*---|-----| |0110_101_110_sss_sss [BMI.S <label>] 11563: //JBNPL.S <label> |A|012346|-|-*---|-----| |0110_101_110_sss_sss [BMI.S <label>] 11564: public static void irpBmis () throws M68kException { 11565: XEiJ.mpuCycleCount++; 11566: int t = XEiJ.regPC; //pc0+2 11567: int s = (byte) XEiJ.regOC; //8bitディスプレースメント 11568: t += s; //pc0+2+ディスプレースメント 11569: if ((t & 1) != 0) { //分岐先のアドレスが奇数 11570: //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ 11571: irpBccAddressError (t); 11572: } 11573: if (XEiJ.MPU_CC_MI << XEiJ.regCCR < 0) { //分岐する 11574: irpSetPC (t); 11575: } 11576: } //irpBmis 11577: 11578: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11579: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11580: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11581: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11582: //BMI.S <label> |-|--2346|-|-*---|-----| |0110_101_111_sss_sss (s is not equal to 63) 11583: //BNPL.S <label> |A|--2346|-|-*---|-----| |0110_101_111_sss_sss (s is not equal to 63) [BMI.S <label>] 11584: //JBMI.S <label> |A|--2346|-|-*---|-----| |0110_101_111_sss_sss (s is not equal to 63) [BMI.S <label>] 11585: //JBNPL.S <label> |A|--2346|-|-*---|-----| |0110_101_111_sss_sss (s is not equal to 63) [BMI.S <label>] 11586: //BMI.L <label> |-|--2346|-|-*---|-----| |0110_101_111_111_111-{offset} 11587: //BNPL.L <label> |A|--2346|-|-*---|-----| |0110_101_111_111_111-{offset} [BMI.L <label>] 11588: public static void irpBmisl () throws M68kException { 11589: XEiJ.mpuCycleCount++; 11590: int t = XEiJ.regPC; //pc0+2 11591: int s = (byte) XEiJ.regOC; //8bitディスプレースメント 11592: if (s == -1) { //Bcc.L 11593: XEiJ.regPC = t + 4; //pc0+6 11594: s = mmuReadLongExword (t, XEiJ.regSRS); //32bitディスプレースメント 11595: } 11596: t += s; //pc0+2+ディスプレースメント 11597: if ((t & 1) != 0) { //分岐先のアドレスが奇数 11598: //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ 11599: irpBccAddressError (t); 11600: } 11601: if (XEiJ.MPU_CC_MI << XEiJ.regCCR < 0) { //分岐する 11602: irpSetPC (t); 11603: } 11604: } //irpBmisl 11605: 11606: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11607: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11608: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11609: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11610: //BGE.W <label> |-|012346|-|-*-*-|-----| |0110_110_000_000_000-{offset} 11611: //BNLT.W <label> |A|012346|-|-*-*-|-----| |0110_110_000_000_000-{offset} [BGE.W <label>] 11612: //JBGE.W <label> |A|012346|-|-*-*-|-----| |0110_110_000_000_000-{offset} [BGE.W <label>] 11613: //JBNLT.W <label> |A|012346|-|-*-*-|-----| |0110_110_000_000_000-{offset} [BGE.W <label>] 11614: //BGE.S <label> |-|012346|-|-*-*-|-----| |0110_110_000_sss_sss (s is not equal to 0) 11615: //BNLT.S <label> |A|012346|-|-*-*-|-----| |0110_110_000_sss_sss (s is not equal to 0) [BGE.S <label>] 11616: //JBGE.S <label> |A|012346|-|-*-*-|-----| |0110_110_000_sss_sss (s is not equal to 0) [BGE.S <label>] 11617: //JBNLT.S <label> |A|012346|-|-*-*-|-----| |0110_110_000_sss_sss (s is not equal to 0) [BGE.S <label>] 11618: //JBLT.L <label> |A|012346|-|-*-*-|-----| |0110_110_000_000_110-0100111011111001-{address} [BGE.S (*)+8;JMP <label>] 11619: //JBNGE.L <label> |A|012346|-|-*-*-|-----| |0110_110_000_000_110-0100111011111001-{address} [BGE.S (*)+8;JMP <label>] 11620: public static void irpBgesw () throws M68kException { 11621: XEiJ.mpuCycleCount++; 11622: int t = XEiJ.regPC; //pc0+2 11623: int s = (byte) XEiJ.regOC; //8bitディスプレースメント 11624: if (s == 0) { //Bcc.W 11625: XEiJ.regPC = t + 2; //pc0+4 11626: s = mmuReadWordSignExword (t, XEiJ.regSRS); //16bitディスプレースメント 11627: } 11628: t += s; //pc0+2+ディスプレースメント 11629: if ((t & 1) != 0) { //分岐先のアドレスが奇数 11630: //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ 11631: irpBccAddressError (t); 11632: } 11633: if (XEiJ.MPU_CC_GE << XEiJ.regCCR < 0) { //分岐する 11634: irpSetPC (t); 11635: } 11636: } //irpBgesw 11637: 11638: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11639: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11640: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11641: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11642: //BGE.S <label> |-|012346|-|-*-*-|-----| |0110_110_001_sss_sss 11643: //BNLT.S <label> |A|012346|-|-*-*-|-----| |0110_110_001_sss_sss [BGE.S <label>] 11644: //JBGE.S <label> |A|012346|-|-*-*-|-----| |0110_110_001_sss_sss [BGE.S <label>] 11645: //JBNLT.S <label> |A|012346|-|-*-*-|-----| |0110_110_001_sss_sss [BGE.S <label>] 11646: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11647: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11648: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11649: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11650: //BGE.S <label> |-|012346|-|-*-*-|-----| |0110_110_010_sss_sss 11651: //BNLT.S <label> |A|012346|-|-*-*-|-----| |0110_110_010_sss_sss [BGE.S <label>] 11652: //JBGE.S <label> |A|012346|-|-*-*-|-----| |0110_110_010_sss_sss [BGE.S <label>] 11653: //JBNLT.S <label> |A|012346|-|-*-*-|-----| |0110_110_010_sss_sss [BGE.S <label>] 11654: public static void irpBges () throws M68kException { 11655: XEiJ.mpuCycleCount++; 11656: int t = XEiJ.regPC; //pc0+2 11657: int s = (byte) XEiJ.regOC; //8bitディスプレースメント 11658: t += s; //pc0+2+ディスプレースメント 11659: if ((t & 1) != 0) { //分岐先のアドレスが奇数 11660: //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ 11661: irpBccAddressError (t); 11662: } 11663: if (XEiJ.MPU_CC_GE << XEiJ.regCCR < 0) { //分岐する 11664: irpSetPC (t); 11665: } 11666: } //irpBges 11667: 11668: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11669: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11670: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11671: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11672: //BGE.S <label> |-|--2346|-|-*-*-|-----| |0110_110_011_sss_sss (s is not equal to 63) 11673: //BNLT.S <label> |A|--2346|-|-*-*-|-----| |0110_110_011_sss_sss (s is not equal to 63) [BGE.S <label>] 11674: //JBGE.S <label> |A|--2346|-|-*-*-|-----| |0110_110_011_sss_sss (s is not equal to 63) [BGE.S <label>] 11675: //JBNLT.S <label> |A|--2346|-|-*-*-|-----| |0110_110_011_sss_sss (s is not equal to 63) [BGE.S <label>] 11676: //BGE.L <label> |-|--2346|-|-*-*-|-----| |0110_110_011_111_111-{offset} 11677: //BNLT.L <label> |A|--2346|-|-*-*-|-----| |0110_110_011_111_111-{offset} [BGE.L <label>] 11678: public static void irpBgesl () throws M68kException { 11679: XEiJ.mpuCycleCount++; 11680: int t = XEiJ.regPC; //pc0+2 11681: int s = (byte) XEiJ.regOC; //8bitディスプレースメント 11682: if (s == -1) { //Bcc.L 11683: XEiJ.regPC = t + 4; //pc0+6 11684: s = mmuReadLongExword (t, XEiJ.regSRS); //32bitディスプレースメント 11685: } 11686: t += s; //pc0+2+ディスプレースメント 11687: if ((t & 1) != 0) { //分岐先のアドレスが奇数 11688: //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ 11689: irpBccAddressError (t); 11690: } 11691: if (XEiJ.MPU_CC_GE << XEiJ.regCCR < 0) { //分岐する 11692: irpSetPC (t); 11693: } 11694: } //irpBgesl 11695: 11696: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11697: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11698: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11699: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11700: //BLT.W <label> |-|012346|-|-*-*-|-----| |0110_110_100_000_000-{offset} 11701: //BNGE.W <label> |A|012346|-|-*-*-|-----| |0110_110_100_000_000-{offset} [BLT.W <label>] 11702: //JBLT.W <label> |A|012346|-|-*-*-|-----| |0110_110_100_000_000-{offset} [BLT.W <label>] 11703: //JBNGE.W <label> |A|012346|-|-*-*-|-----| |0110_110_100_000_000-{offset} [BLT.W <label>] 11704: //BLT.S <label> |-|012346|-|-*-*-|-----| |0110_110_100_sss_sss (s is not equal to 0) 11705: //BNGE.S <label> |A|012346|-|-*-*-|-----| |0110_110_100_sss_sss (s is not equal to 0) [BLT.S <label>] 11706: //JBLT.S <label> |A|012346|-|-*-*-|-----| |0110_110_100_sss_sss (s is not equal to 0) [BLT.S <label>] 11707: //JBNGE.S <label> |A|012346|-|-*-*-|-----| |0110_110_100_sss_sss (s is not equal to 0) [BLT.S <label>] 11708: //JBGE.L <label> |A|012346|-|-*-*-|-----| |0110_110_100_000_110-0100111011111001-{address} [BLT.S (*)+8;JMP <label>] 11709: //JBNLT.L <label> |A|012346|-|-*-*-|-----| |0110_110_100_000_110-0100111011111001-{address} [BLT.S (*)+8;JMP <label>] 11710: public static void irpBltsw () throws M68kException { 11711: XEiJ.mpuCycleCount++; 11712: int t = XEiJ.regPC; //pc0+2 11713: int s = (byte) XEiJ.regOC; //8bitディスプレースメント 11714: if (s == 0) { //Bcc.W 11715: XEiJ.regPC = t + 2; //pc0+4 11716: s = mmuReadWordSignExword (t, XEiJ.regSRS); //16bitディスプレースメント 11717: } 11718: t += s; //pc0+2+ディスプレースメント 11719: if ((t & 1) != 0) { //分岐先のアドレスが奇数 11720: //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ 11721: irpBccAddressError (t); 11722: } 11723: if (XEiJ.MPU_CC_LT << XEiJ.regCCR < 0) { //分岐する 11724: irpSetPC (t); 11725: } 11726: } //irpBltsw 11727: 11728: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11729: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11730: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11731: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11732: //BLT.S <label> |-|012346|-|-*-*-|-----| |0110_110_101_sss_sss 11733: //BNGE.S <label> |A|012346|-|-*-*-|-----| |0110_110_101_sss_sss [BLT.S <label>] 11734: //JBLT.S <label> |A|012346|-|-*-*-|-----| |0110_110_101_sss_sss [BLT.S <label>] 11735: //JBNGE.S <label> |A|012346|-|-*-*-|-----| |0110_110_101_sss_sss [BLT.S <label>] 11736: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11737: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11738: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11739: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11740: //BLT.S <label> |-|012346|-|-*-*-|-----| |0110_110_110_sss_sss 11741: //BNGE.S <label> |A|012346|-|-*-*-|-----| |0110_110_110_sss_sss [BLT.S <label>] 11742: //JBLT.S <label> |A|012346|-|-*-*-|-----| |0110_110_110_sss_sss [BLT.S <label>] 11743: //JBNGE.S <label> |A|012346|-|-*-*-|-----| |0110_110_110_sss_sss [BLT.S <label>] 11744: public static void irpBlts () throws M68kException { 11745: XEiJ.mpuCycleCount++; 11746: int t = XEiJ.regPC; //pc0+2 11747: int s = (byte) XEiJ.regOC; //8bitディスプレースメント 11748: t += s; //pc0+2+ディスプレースメント 11749: if ((t & 1) != 0) { //分岐先のアドレスが奇数 11750: //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ 11751: irpBccAddressError (t); 11752: } 11753: if (XEiJ.MPU_CC_LT << XEiJ.regCCR < 0) { //分岐する 11754: irpSetPC (t); 11755: } 11756: } //irpBlts 11757: 11758: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11759: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11760: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11761: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11762: //BLT.S <label> |-|--2346|-|-*-*-|-----| |0110_110_111_sss_sss (s is not equal to 63) 11763: //BNGE.S <label> |A|--2346|-|-*-*-|-----| |0110_110_111_sss_sss (s is not equal to 63) [BLT.S <label>] 11764: //JBLT.S <label> |A|--2346|-|-*-*-|-----| |0110_110_111_sss_sss (s is not equal to 63) [BLT.S <label>] 11765: //JBNGE.S <label> |A|--2346|-|-*-*-|-----| |0110_110_111_sss_sss (s is not equal to 63) [BLT.S <label>] 11766: //BLT.L <label> |-|--2346|-|-*-*-|-----| |0110_110_111_111_111-{offset} 11767: //BNGE.L <label> |A|--2346|-|-*-*-|-----| |0110_110_111_111_111-{offset} [BLT.L <label>] 11768: public static void irpBltsl () throws M68kException { 11769: XEiJ.mpuCycleCount++; 11770: int t = XEiJ.regPC; //pc0+2 11771: int s = (byte) XEiJ.regOC; //8bitディスプレースメント 11772: if (s == -1) { //Bcc.L 11773: XEiJ.regPC = t + 4; //pc0+6 11774: s = mmuReadLongExword (t, XEiJ.regSRS); //32bitディスプレースメント 11775: } 11776: t += s; //pc0+2+ディスプレースメント 11777: if ((t & 1) != 0) { //分岐先のアドレスが奇数 11778: //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ 11779: irpBccAddressError (t); 11780: } 11781: if (XEiJ.MPU_CC_LT << XEiJ.regCCR < 0) { //分岐する 11782: irpSetPC (t); 11783: } 11784: } //irpBltsl 11785: 11786: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11787: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11788: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11789: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11790: //BGT.W <label> |-|012346|-|-***-|-----| |0110_111_000_000_000-{offset} 11791: //BNLE.W <label> |A|012346|-|-***-|-----| |0110_111_000_000_000-{offset} [BGT.W <label>] 11792: //JBGT.W <label> |A|012346|-|-***-|-----| |0110_111_000_000_000-{offset} [BGT.W <label>] 11793: //JBNLE.W <label> |A|012346|-|-***-|-----| |0110_111_000_000_000-{offset} [BGT.W <label>] 11794: //BGT.S <label> |-|012346|-|-***-|-----| |0110_111_000_sss_sss (s is not equal to 0) 11795: //BNLE.S <label> |A|012346|-|-***-|-----| |0110_111_000_sss_sss (s is not equal to 0) [BGT.S <label>] 11796: //JBGT.S <label> |A|012346|-|-***-|-----| |0110_111_000_sss_sss (s is not equal to 0) [BGT.S <label>] 11797: //JBNLE.S <label> |A|012346|-|-***-|-----| |0110_111_000_sss_sss (s is not equal to 0) [BGT.S <label>] 11798: //JBLE.L <label> |A|012346|-|-***-|-----| |0110_111_000_000_110-0100111011111001-{address} [BGT.S (*)+8;JMP <label>] 11799: //JBNGT.L <label> |A|012346|-|-***-|-----| |0110_111_000_000_110-0100111011111001-{address} [BGT.S (*)+8;JMP <label>] 11800: public static void irpBgtsw () throws M68kException { 11801: XEiJ.mpuCycleCount++; 11802: int t = XEiJ.regPC; //pc0+2 11803: int s = (byte) XEiJ.regOC; //8bitディスプレースメント 11804: if (s == 0) { //Bcc.W 11805: XEiJ.regPC = t + 2; //pc0+4 11806: s = mmuReadWordSignExword (t, XEiJ.regSRS); //16bitディスプレースメント 11807: } 11808: t += s; //pc0+2+ディスプレースメント 11809: if ((t & 1) != 0) { //分岐先のアドレスが奇数 11810: //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ 11811: irpBccAddressError (t); 11812: } 11813: if (XEiJ.MPU_CC_GT << XEiJ.regCCR < 0) { //分岐する 11814: irpSetPC (t); 11815: } 11816: } //irpBgtsw 11817: 11818: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11819: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11820: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11821: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11822: //BGT.S <label> |-|012346|-|-***-|-----| |0110_111_001_sss_sss 11823: //BNLE.S <label> |A|012346|-|-***-|-----| |0110_111_001_sss_sss [BGT.S <label>] 11824: //JBGT.S <label> |A|012346|-|-***-|-----| |0110_111_001_sss_sss [BGT.S <label>] 11825: //JBNLE.S <label> |A|012346|-|-***-|-----| |0110_111_001_sss_sss [BGT.S <label>] 11826: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11827: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11828: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11829: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11830: //BGT.S <label> |-|012346|-|-***-|-----| |0110_111_010_sss_sss 11831: //BNLE.S <label> |A|012346|-|-***-|-----| |0110_111_010_sss_sss [BGT.S <label>] 11832: //JBGT.S <label> |A|012346|-|-***-|-----| |0110_111_010_sss_sss [BGT.S <label>] 11833: //JBNLE.S <label> |A|012346|-|-***-|-----| |0110_111_010_sss_sss [BGT.S <label>] 11834: public static void irpBgts () throws M68kException { 11835: XEiJ.mpuCycleCount++; 11836: int t = XEiJ.regPC; //pc0+2 11837: int s = (byte) XEiJ.regOC; //8bitディスプレースメント 11838: t += s; //pc0+2+ディスプレースメント 11839: if ((t & 1) != 0) { //分岐先のアドレスが奇数 11840: //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ 11841: irpBccAddressError (t); 11842: } 11843: if (XEiJ.MPU_CC_GT << XEiJ.regCCR < 0) { //分岐する 11844: irpSetPC (t); 11845: } 11846: } //irpBgts 11847: 11848: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11849: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11850: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11851: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11852: //BGT.S <label> |-|--2346|-|-***-|-----| |0110_111_011_sss_sss (s is not equal to 63) 11853: //BNLE.S <label> |A|--2346|-|-***-|-----| |0110_111_011_sss_sss (s is not equal to 63) [BGT.S <label>] 11854: //JBGT.S <label> |A|--2346|-|-***-|-----| |0110_111_011_sss_sss (s is not equal to 63) [BGT.S <label>] 11855: //JBNLE.S <label> |A|--2346|-|-***-|-----| |0110_111_011_sss_sss (s is not equal to 63) [BGT.S <label>] 11856: //BGT.L <label> |-|--2346|-|-***-|-----| |0110_111_011_111_111-{offset} 11857: //BNLE.L <label> |A|--2346|-|-***-|-----| |0110_111_011_111_111-{offset} [BGT.L <label>] 11858: public static void irpBgtsl () throws M68kException { 11859: XEiJ.mpuCycleCount++; 11860: int t = XEiJ.regPC; //pc0+2 11861: int s = (byte) XEiJ.regOC; //8bitディスプレースメント 11862: if (s == -1) { //Bcc.L 11863: XEiJ.regPC = t + 4; //pc0+6 11864: s = mmuReadLongExword (t, XEiJ.regSRS); //32bitディスプレースメント 11865: } 11866: t += s; //pc0+2+ディスプレースメント 11867: if ((t & 1) != 0) { //分岐先のアドレスが奇数 11868: //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ 11869: irpBccAddressError (t); 11870: } 11871: if (XEiJ.MPU_CC_GT << XEiJ.regCCR < 0) { //分岐する 11872: irpSetPC (t); 11873: } 11874: } //irpBgtsl 11875: 11876: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11877: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11878: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11879: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11880: //BLE.W <label> |-|012346|-|-***-|-----| |0110_111_100_000_000-{offset} 11881: //BNGT.W <label> |A|012346|-|-***-|-----| |0110_111_100_000_000-{offset} [BLE.W <label>] 11882: //JBLE.W <label> |A|012346|-|-***-|-----| |0110_111_100_000_000-{offset} [BLE.W <label>] 11883: //JBNGT.W <label> |A|012346|-|-***-|-----| |0110_111_100_000_000-{offset} [BLE.W <label>] 11884: //BLE.S <label> |-|012346|-|-***-|-----| |0110_111_100_sss_sss (s is not equal to 0) 11885: //BNGT.S <label> |A|012346|-|-***-|-----| |0110_111_100_sss_sss (s is not equal to 0) [BLE.S <label>] 11886: //JBLE.S <label> |A|012346|-|-***-|-----| |0110_111_100_sss_sss (s is not equal to 0) [BLE.S <label>] 11887: //JBNGT.S <label> |A|012346|-|-***-|-----| |0110_111_100_sss_sss (s is not equal to 0) [BLE.S <label>] 11888: //JBGT.L <label> |A|012346|-|-***-|-----| |0110_111_100_000_110-0100111011111001-{address} [BLE.S (*)+8;JMP <label>] 11889: //JBNLE.L <label> |A|012346|-|-***-|-----| |0110_111_100_000_110-0100111011111001-{address} [BLE.S (*)+8;JMP <label>] 11890: public static void irpBlesw () throws M68kException { 11891: XEiJ.mpuCycleCount++; 11892: int t = XEiJ.regPC; //pc0+2 11893: int s = (byte) XEiJ.regOC; //8bitディスプレースメント 11894: if (s == 0) { //Bcc.W 11895: XEiJ.regPC = t + 2; //pc0+4 11896: s = mmuReadWordSignExword (t, XEiJ.regSRS); //16bitディスプレースメント 11897: } 11898: t += s; //pc0+2+ディスプレースメント 11899: if ((t & 1) != 0) { //分岐先のアドレスが奇数 11900: //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ 11901: irpBccAddressError (t); 11902: } 11903: if (XEiJ.MPU_CC_LE << XEiJ.regCCR < 0) { //分岐する 11904: irpSetPC (t); 11905: } 11906: } //irpBlesw 11907: 11908: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11909: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11910: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11911: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11912: //BLE.S <label> |-|012346|-|-***-|-----| |0110_111_101_sss_sss 11913: //BNGT.S <label> |A|012346|-|-***-|-----| |0110_111_101_sss_sss [BLE.S <label>] 11914: //JBLE.S <label> |A|012346|-|-***-|-----| |0110_111_101_sss_sss [BLE.S <label>] 11915: //JBNGT.S <label> |A|012346|-|-***-|-----| |0110_111_101_sss_sss [BLE.S <label>] 11916: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11917: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11918: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11919: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11920: //BLE.S <label> |-|012346|-|-***-|-----| |0110_111_110_sss_sss 11921: //BNGT.S <label> |A|012346|-|-***-|-----| |0110_111_110_sss_sss [BLE.S <label>] 11922: //JBLE.S <label> |A|012346|-|-***-|-----| |0110_111_110_sss_sss [BLE.S <label>] 11923: //JBNGT.S <label> |A|012346|-|-***-|-----| |0110_111_110_sss_sss [BLE.S <label>] 11924: public static void irpBles () throws M68kException { 11925: XEiJ.mpuCycleCount++; 11926: int t = XEiJ.regPC; //pc0+2 11927: int s = (byte) XEiJ.regOC; //8bitディスプレースメント 11928: t += s; //pc0+2+ディスプレースメント 11929: if ((t & 1) != 0) { //分岐先のアドレスが奇数 11930: //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ 11931: irpBccAddressError (t); 11932: } 11933: if (XEiJ.MPU_CC_LE << XEiJ.regCCR < 0) { //分岐する 11934: irpSetPC (t); 11935: } 11936: } //irpBles 11937: 11938: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11939: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11940: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11941: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11942: //BLE.S <label> |-|--2346|-|-***-|-----| |0110_111_111_sss_sss (s is not equal to 63) 11943: //BNGT.S <label> |A|--2346|-|-***-|-----| |0110_111_111_sss_sss (s is not equal to 63) [BLE.S <label>] 11944: //JBLE.S <label> |A|--2346|-|-***-|-----| |0110_111_111_sss_sss (s is not equal to 63) [BLE.S <label>] 11945: //JBNGT.S <label> |A|--2346|-|-***-|-----| |0110_111_111_sss_sss (s is not equal to 63) [BLE.S <label>] 11946: //BLE.L <label> |-|--2346|-|-***-|-----| |0110_111_111_111_111-{offset} 11947: //BNGT.L <label> |A|--2346|-|-***-|-----| |0110_111_111_111_111-{offset} [BLE.L <label>] 11948: public static void irpBlesl () throws M68kException { 11949: XEiJ.mpuCycleCount++; 11950: int t = XEiJ.regPC; //pc0+2 11951: int s = (byte) XEiJ.regOC; //8bitディスプレースメント 11952: if (s == -1) { //Bcc.L 11953: XEiJ.regPC = t + 4; //pc0+6 11954: s = mmuReadLongExword (t, XEiJ.regSRS); //32bitディスプレースメント 11955: } 11956: t += s; //pc0+2+ディスプレースメント 11957: if ((t & 1) != 0) { //分岐先のアドレスが奇数 11958: //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ 11959: irpBccAddressError (t); 11960: } 11961: if (XEiJ.MPU_CC_LE << XEiJ.regCCR < 0) { //分岐する 11962: irpSetPC (t); 11963: } 11964: } //irpBlesl 11965: 11966: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11967: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11968: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11969: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11970: //IOCS <name> |A|012346|-|UUUUU|UUUUU| |0111_000_0dd_ddd_ddd-0100111001001111 [MOVEQ.L #<data>,D0;TRAP #15] 11971: //MOVEQ.L #<data>,Dq |-|012346|-|-UUUU|-**00| |0111_qqq_0dd_ddd_ddd 11972: public static void irpMoveq () throws M68kException { 11973: XEiJ.mpuCycleCount++; 11974: int z; 11975: XEiJ.regRn[XEiJ.regOC >> 9 & 7] = z = (byte) XEiJ.regOC; 11976: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 11977: } //irpMoveq 11978: 11979: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11980: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11981: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11982: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11983: //MVS.B <ea>,Dq |-|------|-|-UUUU|-**00|D M+-WXZPI|0111_qqq_100_mmm_rrr (ISA_B) 11984: // 11985: //MVS.B <ea>,Dq 11986: // バイトデータをロングに符号拡張してDqの全体を更新する 11987: public static void irpMvsByte () throws M68kException { 11988: XEiJ.mpuCycleCount++; 11989: int ea = XEiJ.regOC & 63; 11990: int z; 11991: XEiJ.regRn[XEiJ.regOC >> 9 & 7] = z = ea < XEiJ.EA_AR ? (byte) XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadByteSignExword ((XEiJ.regPC += 2) - 1, XEiJ.regSRS) : mmuReadByteSignData (efaAnyByte (ea), XEiJ.regSRS); //pcbs。イミディエイトを分離 11992: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 11993: } //irpMvsByte 11994: 11995: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11996: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11997: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11998: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11999: //MVS.W <ea>,Dq |-|------|-|-UUUU|-**00|D M+-WXZPI|0111_qqq_101_mmm_rrr (ISA_B) 12000: // 12001: //MVS.W <ea>,Dq 12002: // ワードデータをロングに符号拡張してDqの全体を更新する 12003: public static void irpMvsWord () throws M68kException { 12004: XEiJ.mpuCycleCount++; 12005: int ea = XEiJ.regOC & 63; 12006: int z; 12007: XEiJ.regRn[XEiJ.regOC >> 9 & 7] = z = ea < XEiJ.EA_AR ? (short) XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) : mmuReadWordSignData (efaAnyWord (ea), XEiJ.regSRS); //pcws。イミディエイトを分離 12008: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 12009: } //irpMvsWord 12010: 12011: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12012: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12013: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12014: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12015: //MVZ.B <ea>,Dq |-|------|-|-UUUU|-0*00|D M+-WXZPI|0111_qqq_110_mmm_rrr (ISA_B) 12016: // 12017: //MVZ.B <ea>,Dq 12018: // バイトデータをロングにゼロ拡張してDqの全体を更新する 12019: public static void irpMvzByte () throws M68kException { 12020: XEiJ.mpuCycleCount++; 12021: int ea = XEiJ.regOC & 63; 12022: int z; 12023: XEiJ.regRn[XEiJ.regOC >> 9 & 7] = z = ea < XEiJ.EA_AR ? 0xff & XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadByteZeroExword ((XEiJ.regPC += 2) - 1, XEiJ.regSRS) : mmuReadByteZeroData (efaAnyByte (ea), XEiJ.regSRS); //pcbz。イミディエイトを分離 12024: XEiJ.regCCR = XEiJ.REG_CCR_X & XEiJ.regCCR | (z == 0 ? XEiJ.REG_CCR_Z : 0); 12025: } //irpMvzByte 12026: 12027: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12028: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12029: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12030: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12031: //MVZ.W <ea>,Dq |-|------|-|-UUUU|-0*00|D M+-WXZPI|0111_qqq_111_mmm_rrr (ISA_B) 12032: // 12033: //MVZ.W <ea>,Dq 12034: // ワードデータをロングにゼロ拡張してDqの全体を更新する 12035: public static void irpMvzWord () throws M68kException { 12036: XEiJ.mpuCycleCount++; 12037: int ea = XEiJ.regOC & 63; 12038: int z; 12039: XEiJ.regRn[XEiJ.regOC >> 9 & 7] = z = ea < XEiJ.EA_AR ? (char) XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) : mmuReadWordZeroData (efaAnyWord (ea), XEiJ.regSRS); //pcwz。イミディエイトを分離 12040: XEiJ.regCCR = XEiJ.REG_CCR_X & XEiJ.regCCR | (z == 0 ? XEiJ.REG_CCR_Z : 0); 12041: } //irpMvzWord 12042: 12043: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12044: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12045: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12046: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12047: //OR.B <ea>,Dq |-|012346|-|-UUUU|-**00|D M+-WXZPI|1000_qqq_000_mmm_rrr 12048: public static void irpOrToRegByte () throws M68kException { 12049: XEiJ.mpuCycleCount++; 12050: int ea = XEiJ.regOC & 63; 12051: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & (XEiJ.regRn[XEiJ.regOC >> 9 & 7] |= 255 & (ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadByteSignExword ((XEiJ.regPC += 2) - 1, XEiJ.regSRS) : mmuReadByteSignData (efaAnyByte (ea), XEiJ.regSRS)))]; //ccr_tst_byte。pcbs。イミディエイトを分離。0拡張してからOR 12052: } //irpOrToRegByte 12053: 12054: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12055: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12056: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12057: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12058: //OR.W <ea>,Dq |-|012346|-|-UUUU|-**00|D M+-WXZPI|1000_qqq_001_mmm_rrr 12059: public static void irpOrToRegWord () throws M68kException { 12060: XEiJ.mpuCycleCount++; 12061: int ea = XEiJ.regOC & 63; 12062: int z = (short) (XEiJ.regRn[XEiJ.regOC >> 9 & 7] |= ea < XEiJ.EA_AR ? (char) XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) : mmuReadWordZeroData (efaAnyWord (ea), XEiJ.regSRS)); //pcwz。イミディエイトを分離。0拡張してからOR 12063: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 12064: } //irpOrToRegWord 12065: 12066: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12067: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12068: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12069: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12070: //OR.L <ea>,Dq |-|012346|-|-UUUU|-**00|D M+-WXZPI|1000_qqq_010_mmm_rrr 12071: public static void irpOrToRegLong () throws M68kException { 12072: int ea = XEiJ.regOC & 63; 12073: int z = XEiJ.regRn[XEiJ.regOC >> 9 & 7] |= ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS) : mmuReadLongData (efaAnyLong (ea), XEiJ.regSRS); //pcls。イミディエイトを分離 12074: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 12075: } //irpOrToRegLong 12076: 12077: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12078: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12079: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12080: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12081: //DIVU.W <ea>,Dq |-|012346|-|-UUUU|-***0|D M+-WXZPI|1000_qqq_011_mmm_rrr 12082: // 12083: //DIVU.W <ea>,Dq 12084: // M68000PRMでDIVU.Wのオーバーフローの条件が16bit符号あり整数と書かれているのは16bit符号なし整数の間違い 12085: public static void irpDivuWord () throws M68kException { 12086: // X 変化しない 12087: // N ゼロ除算またはオーバーフローのとき不定。商が負のときセット。それ以外はクリア 12088: // Z ゼロ除算またはオーバーフローのとき不定。商が0のときセット。それ以外はクリア 12089: // V ゼロ除算のとき不定。オーバーフローのときセット。それ以外はクリア 12090: // C 常にクリア 12091: XEiJ.mpuCycleCount += 22; //最大 12092: int ea = XEiJ.regOC & 63; 12093: int qqq = XEiJ.regOC >> 9 & 7; 12094: int y = ea < XEiJ.EA_AR ? (char) XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) : mmuReadWordZeroData (efaAnyWord (ea), XEiJ.regSRS); //除数。pcwz。イミディエイトを分離 12095: int x = XEiJ.regRn[qqq]; //被除数 12096: if (y == 0) { //ゼロ除算 12097: //Dqは変化しない 12098: XEiJ.regCCR = (XEiJ.regCCR & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_N | XEiJ.REG_CCR_Z | XEiJ.REG_CCR_V) //XとNとZとVは変化しない 12099: ); //Cは常にクリア 12100: m60Address = XEiJ.regPC0; //アドレスは命令の先頭 12101: M68kException.m6eNumber = M68kException.M6E_DIVIDE_BY_ZERO; 12102: throw M68kException.m6eSignal; 12103: } 12104: //無理にintで符号なし除算をやろうとするよりもdoubleにキャストしてから割ったほうが速い 12105: // intの除算をdoubleの除算器で行うプロセッサならばなおさら 12106: //被除数を符号なし32ビットとみなすためlongを経由してdoubleに変換する 12107: //doubleからlongやintへのキャストは小数点以下が切り捨てられ、オーバーフローは表現できる絶対値最大の値になる 12108: //doubleから直接intに戻しているので0xffffffff/0x0001=0xffffffffが絶対値最大の0x7fffffffになってしまうが、 12109: //DIVU.Wではオーバーフローになることに変わりはないのでよいことにする 12110: // 符号なし32ビットの0xffffffffにしたいときは戻すときもlongを経由すればよい 12111: int z = (int) ((double) ((long) x & 0xffffffffL) / (double) y); //商 12112: if (z >>> 16 != 0) { //オーバーフローあり 12113: //Dqは変化しない 12114: XEiJ.regCCR = (XEiJ.regCCR & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_N | XEiJ.REG_CCR_Z) | //XとNとZは変化しない 12115: XEiJ.REG_CCR_V //Vは常にセット 12116: ); //Cは常にクリア 12117: } else { //オーバーフローなし 12118: XEiJ.regRn[qqq] = x - y * z << 16 | z; //余り<<16|商 12119: z = (short) z; 12120: XEiJ.regCCR = (XEiJ.regCCR & XEiJ.REG_CCR_X | //Xは変化しない 12121: (z < 0 ? XEiJ.REG_CCR_N : 0) | //Nは商が負のときセット、さもなくばクリア 12122: (z == 0 ? XEiJ.REG_CCR_Z : 0) //Zは商が0のときセット、さもなくばクリア 12123: //Vは常にクリア 12124: ); //Cは常にクリア 12125: } //if オーバーフローあり/オーバーフローなし 12126: } //irpDivuWord 12127: 12128: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12129: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12130: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12131: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12132: //SBCD.B Dr,Dq |-|012346|-|UUUUU|*U*U*| |1000_qqq_100_000_rrr 12133: //SBCD.B -(Ar),-(Aq) |-|012346|-|UUUUU|*U*U*| |1000_qqq_100_001_rrr 12134: //OR.B Dq,<ea> |-|012346|-|-UUUU|-**00| M+-WXZ |1000_qqq_100_mmm_rrr 12135: public static void irpOrToMemByte () throws M68kException { 12136: int ea = XEiJ.regOC & 63; 12137: if (ea >= XEiJ.EA_MM) { //OR.B Dq,<ea> 12138: XEiJ.mpuCycleCount++; 12139: int a = efaMltByte (ea); 12140: int z = XEiJ.regRn[XEiJ.regOC >> 9 & 7] | mmuReadByteSignData (a, XEiJ.regSRS); 12141: mmuWriteByteData (a, z, XEiJ.regSRS); 12142: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & z]; //ccr_tst_byte 12143: } else if (ea < XEiJ.EA_AR) { //SBCD.B Dr,Dq 12144: int qqq = XEiJ.regOC >> 9 & 7; 12145: XEiJ.mpuCycleCount++; 12146: int x; 12147: XEiJ.regRn[qqq] = ~0xff & (x = XEiJ.regRn[qqq]) | irpSbcd (x, XEiJ.regRn[ea]); 12148: } else { //SBCD.B -(Ar),-(Aq) 12149: XEiJ.mpuCycleCount += 2; 12150: m60Incremented -= 1L << (ea << 3); 12151: int a = m60Address = --XEiJ.regRn[ea]; //このr[ea]はアドレスレジスタ 12152: int y = mmuReadByteZeroData (a, XEiJ.regSRS); 12153: int aqq = (XEiJ.regOC >> 9) - (64 - 8); 12154: m60Incremented -= 1L << (aqq << 3); 12155: a = m60Address = --XEiJ.regRn[aqq]; 12156: mmuWriteByteData (a, irpSbcd (mmuModifyByteZeroData (a, XEiJ.regSRS), y), XEiJ.regSRS); 12157: } 12158: } //irpOrToMemByte 12159: 12160: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12161: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12162: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12163: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12164: //PACK Dr,Dq,#<data> |-|--2346|-|-----|-----| |1000_qqq_101_000_rrr-{data} 12165: //PACK -(Ar),-(Aq),#<data> |-|--2346|-|-----|-----| |1000_qqq_101_001_rrr-{data} 12166: //OR.W Dq,<ea> |-|012346|-|-UUUU|-**00| M+-WXZ |1000_qqq_101_mmm_rrr 12167: // 12168: //PACK Dr,Dq,#<data> 12169: //PACK -(Ar),-(Aq),#<data> 12170: // PACK/UNPKは第1オペランドのソースと第2オペランドのデスティネーションのサイズが違う。パックされていない方がワードでされている方がバイト 12171: // 10の位を4ビット右または左にシフトする。第3オペランドの補正値はワードでパックされていない方に加算する。CCRは変化しない 12172: public static void irpOrToMemWord () throws M68kException { 12173: int ea = XEiJ.regOC & 63; 12174: if (ea >= XEiJ.EA_MM) { //OR.W Dq,<ea> 12175: XEiJ.mpuCycleCount++; 12176: int a = efaMltWord (ea); 12177: int z; 12178: mmuWriteWordData (a, z = XEiJ.regRn[XEiJ.regOC >> 9 & 7] | mmuModifyWordSignData (a, XEiJ.regSRS), XEiJ.regSRS); 12179: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (char) z - 1 >> 31 & XEiJ.REG_CCR_Z | ((short) z < 0 ? XEiJ.REG_CCR_N : 0); //ccr_tst_word 12180: } else if (ea < XEiJ.EA_AR) { //PACK Dr,Dq,#<data> 12181: XEiJ.mpuCycleCount += 2; 12182: int qqq = XEiJ.regOC >> 9 & 7; 12183: int t = XEiJ.regRn[ea] + mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); //pcws 12184: XEiJ.regRn[qqq] = ~0xff & XEiJ.regRn[qqq] | t >> 4 & 0xf0 | t & 15; 12185: } else { //PACK -(Ar),-(Aq),#<data> 12186: int o = mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); //pcws 12187: m60Incremented -= 2L << (ea << 3); 12188: int a = m60Address = XEiJ.regRn[ea] -= 2; 12189: int t = mmuReadWordSignData (a, XEiJ.regSRS) + o; //020以上なのでアドレスエラーは出ない 12190: int aqq = (XEiJ.regOC >> 9) - (64 - 8); 12191: m60Incremented -= 1L << (aqq << 3); 12192: a = m60Address = --XEiJ.regRn[aqq]; 12193: mmuWriteByteData (a, t >> 4 & 0xf0 | t & 15, XEiJ.regSRS); 12194: } 12195: } //irpOrToMemWord 12196: 12197: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12198: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12199: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12200: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12201: //UNPK Dr,Dq,#<data> |-|--2346|-|-----|-----| |1000_qqq_110_000_rrr-{data} 12202: //UNPK -(Ar),-(Aq),#<data> |-|--2346|-|-----|-----| |1000_qqq_110_001_rrr-{data} 12203: //OR.L Dq,<ea> |-|012346|-|-UUUU|-**00| M+-WXZ |1000_qqq_110_mmm_rrr 12204: // 12205: //UNPK Dr,Dq,#<data> 12206: //UNPK -(Ar),-(Aq),#<data> 12207: // PACK/UNPKは第1オペランドのソースと第2オペランドのデスティネーションのサイズが違う。パックされていない方がワードでされている方がバイト 12208: // 10の位を4ビット右または左にシフトする。第3オペランドの補正値はワードでパックされていない方に加算する。CCRは変化しない 12209: public static void irpOrToMemLong () throws M68kException { 12210: int ea = XEiJ.regOC & 63; 12211: if (ea >= XEiJ.EA_MM) { //OR.L Dq,<ea> 12212: XEiJ.mpuCycleCount++; 12213: int a = efaMltLong (ea); 12214: int z; 12215: mmuWriteLongData (a, z = XEiJ.regRn[XEiJ.regOC >> 9 & 7] | mmuModifyLongData (a, XEiJ.regSRS), XEiJ.regSRS); 12216: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 12217: } else if (ea < XEiJ.EA_AR) { //UNPK Dr,Dq,#<data> 12218: int qqq = XEiJ.regOC >> 9 & 7; 12219: int t = XEiJ.regRn[ea]; 12220: XEiJ.regRn[qqq] = ~0xffff & XEiJ.regRn[qqq] | (char) ((t << 4 & 0x0f00 | t & 15) + mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS)); //pcws 12221: } else { //UNPK -(Ar),-(Aq),#<data> 12222: int o = mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); //pcws 12223: m60Incremented -= 1L << (ea << 3); 12224: int a = m60Address = --XEiJ.regRn[ea]; 12225: int t = mmuReadByteSignData (a, XEiJ.regSRS); 12226: int aqq = (XEiJ.regOC >> 9) - (64 - 8); 12227: m60Incremented -= 2L << (aqq << 3); 12228: a = m60Address = XEiJ.regRn[aqq] -= 2; 12229: mmuWriteWordData (a, (t << 4 & 0x0f00 | t & 15) + o, XEiJ.regSRS); //020以上なのでアドレスエラーは出ない 12230: } 12231: } //irpOrToMemLong 12232: 12233: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12234: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12235: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12236: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12237: //DIVS.W <ea>,Dq |-|012346|-|-UUUU|-***0|D M+-WXZPI|1000_qqq_111_mmm_rrr 12238: // 12239: //DIVS.W <ea>,Dq 12240: // DIVSの余りの符号は被除数と一致 12241: // M68000PRMでDIVS.Wのアドレッシングモードがデータ可変と書かれているのはデータの間違い 12242: public static void irpDivsWord () throws M68kException { 12243: // X 変化しない 12244: // N ゼロ除算またはオーバーフローのとき不定。商が負のときセット。それ以外はクリア 12245: // Z ゼロ除算またはオーバーフローのとき不定。商が0のときセット。それ以外はクリア 12246: // V ゼロ除算のとき不定。オーバーフローのときセット。それ以外はクリア 12247: // C 常にクリア 12248: //divsの余りの符号は被除数と一致 12249: //Javaの除算演算子の挙動 12250: // 10 / 3 == 3 10 % 3 == 1 10 = 3 * 3 + 1 12251: // 10 / -3 == -3 10 % -3 == 1 10 = -3 * -3 + 1 12252: // -10 / 3 == -3 -10 % 3 == -1 -10 = 3 * -3 + -1 12253: // -10 / -3 == 3 -10 % -3 == -1 -10 = -3 * 3 + -1 12254: XEiJ.mpuCycleCount += 22; //最大 12255: int ea = XEiJ.regOC & 63; 12256: int qqq = XEiJ.regOC >> 9 & 7; 12257: int y = ea < XEiJ.EA_AR ? (short) XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) : mmuReadWordSignData (efaAnyWord (ea), XEiJ.regSRS); //除数。pcws。イミディエイトを分離 12258: int x = XEiJ.regRn[qqq]; //被除数 12259: if (y == 0) { //ゼロ除算 12260: //Dqは変化しない 12261: XEiJ.regCCR = (XEiJ.regCCR & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_N | XEiJ.REG_CCR_Z | XEiJ.REG_CCR_V) //XとNとZとVは変化しない 12262: ); //Cは常にクリア 12263: m60Address = XEiJ.regPC0; //アドレスは命令の先頭 12264: M68kException.m6eNumber = M68kException.M6E_DIVIDE_BY_ZERO; 12265: throw M68kException.m6eSignal; 12266: } 12267: int z = x / y; //商 12268: if ((short) z != z) { //オーバーフローあり 12269: //Dqは変化しない 12270: XEiJ.regCCR = (XEiJ.regCCR & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_N | XEiJ.REG_CCR_Z) | //XとNとZは変化しない 12271: XEiJ.REG_CCR_V //Vは常にセット 12272: ); //Cは常にクリア 12273: } else { //オーバーフローなし 12274: XEiJ.regRn[qqq] = x - y * z << 16 | (char) z; //Dqは余り<<16|商&$ffff 12275: XEiJ.regCCR = (XEiJ.regCCR & XEiJ.REG_CCR_X | //Xは変化しない 12276: (z < 0 ? XEiJ.REG_CCR_N : 0) | //Nは商が負のときセット、さもなくばクリア 12277: (z == 0 ? XEiJ.REG_CCR_Z : 0) //Zは商が0のときセット、さもなくばクリア 12278: //Vは常にクリア 12279: ); //Cは常にクリア 12280: } 12281: } //irpDivsWord 12282: 12283: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12284: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12285: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12286: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12287: //SUB.B <ea>,Dq |-|012346|-|UUUUU|*****|D M+-WXZPI|1001_qqq_000_mmm_rrr 12288: public static void irpSubToRegByte () throws M68kException { 12289: XEiJ.mpuCycleCount++; 12290: int ea = XEiJ.regOC & 63; 12291: int qqq = XEiJ.regOC >> 9 & 7; 12292: int x, y, z; 12293: y = ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadByteSignExword ((XEiJ.regPC += 2) - 1, XEiJ.regSRS) : mmuReadByteSignData (efaAnyByte (ea), XEiJ.regSRS); //pcbs。イミディエイトを分離 12294: x = XEiJ.regRn[qqq]; 12295: z = x - y; 12296: XEiJ.regRn[qqq] = ~255 & x | 255 & z; 12297: XEiJ.regCCR = (XEiJ.MPU_TSTB_TABLE[255 & z] | 12298: ((x ^ y) & (x ^ z)) >> 6 & XEiJ.REG_CCR_V | 12299: (byte) (x & (y ^ z) ^ (y | z)) >> 7 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_sub_byte 12300: } //irpSubToRegByte 12301: 12302: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12303: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12304: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12305: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12306: //SUB.W <ea>,Dq |-|012346|-|UUUUU|*****|DAM+-WXZPI|1001_qqq_001_mmm_rrr 12307: public static void irpSubToRegWord () throws M68kException { 12308: XEiJ.mpuCycleCount++; 12309: int ea = XEiJ.regOC & 63; 12310: int qqq = XEiJ.regOC >> 9 & 7; 12311: int x, y, z; 12312: y = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) : mmuReadWordSignData (efaAnyWord (ea), XEiJ.regSRS); //このr[ea]はデータレジスタまたはアドレスレジスタ。pcws。イミディエイトを分離 12313: x = XEiJ.regRn[qqq]; 12314: z = x - y; 12315: XEiJ.regRn[qqq] = ~65535 & x | (char) z; 12316: XEiJ.regCCR = (z >> 12 & XEiJ.REG_CCR_N | (char) z - 1 >> 14 & XEiJ.REG_CCR_Z | 12317: ((x ^ y) & (x ^ z)) >> 14 & XEiJ.REG_CCR_V | 12318: (short) (x & (y ^ z) ^ (y | z)) >> 15 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_sub_word 12319: } //irpSubToRegWord 12320: 12321: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12322: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12323: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12324: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12325: //SUB.L <ea>,Dq |-|012346|-|UUUUU|*****|DAM+-WXZPI|1001_qqq_010_mmm_rrr 12326: public static void irpSubToRegLong () throws M68kException { 12327: int ea = XEiJ.regOC & 63; 12328: int qqq = XEiJ.regOC >> 9 & 7; 12329: XEiJ.mpuCycleCount++; 12330: int x, y, z; 12331: y = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS) : mmuReadLongData (efaAnyLong (ea), XEiJ.regSRS); //このr[ea]はデータレジスタまたはアドレスレジスタ。pcls。イミディエイトを分離 12332: x = XEiJ.regRn[qqq]; 12333: z = x - y; 12334: XEiJ.regRn[qqq] = z; 12335: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | 12336: ((x ^ y) & (x ^ z)) >> 30 & XEiJ.REG_CCR_V | 12337: (x & (y ^ z) ^ (y | z)) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_sub 12338: } //irpSubToRegLong 12339: 12340: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12341: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12342: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12343: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12344: //SUBA.W <ea>,Aq |-|012346|-|-----|-----|DAM+-WXZPI|1001_qqq_011_mmm_rrr 12345: //SUB.W <ea>,Aq |A|012346|-|-----|-----|DAM+-WXZPI|1001_qqq_011_mmm_rrr [SUBA.W <ea>,Aq] 12346: //CLR.W Ar |A|012346|-|-----|-----| A |1001_rrr_011_001_rrr [SUBA.W Ar,Ar] 12347: // 12348: //SUBA.W <ea>,Aq 12349: // ソースを符号拡張してロングで減算する 12350: public static void irpSubaWord () throws M68kException { 12351: XEiJ.mpuCycleCount++; 12352: int ea = XEiJ.regOC & 63; 12353: //ADDA/CMPA/SUBA.wl <ea>,Aqで<ea>が(Ar)+,-(Ar)でAr==Aqのとき1サイクル追加 12354: if (XEiJ.EA_MP <= ea && ea < XEiJ.EA_MW && 12355: (ea & 7) == ((XEiJ.regOC >> 9) & 7)) { 12356: XEiJ.mpuCycleCount++; 12357: } 12358: int z = ea < XEiJ.EA_MM ? (short) XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) : mmuReadWordSignData (efaAnyWord (ea), XEiJ.regSRS); //このr[ea]はデータレジスタまたはアドレスレジスタ。pcws。イミディエイトを分離。ここでAqが変化する可能性があることに注意 12359: XEiJ.regRn[XEiJ.regOC >> 9 & 15] -= z; //r[op >> 9 & 15] -= ea < XEiJ.EA_MM ? (short) r[ea] : rws (efaAnyWord (ea));は不可 12360: //ccrは変化しない 12361: } //irpSubaWord 12362: 12363: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12364: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12365: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12366: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12367: //SUBX.B Dr,Dq |-|012346|-|*UUUU|*****| |1001_qqq_100_000_rrr 12368: //SUBX.B -(Ar),-(Aq) |-|012346|-|*UUUU|*****| |1001_qqq_100_001_rrr 12369: //SUB.B Dq,<ea> |-|012346|-|UUUUU|*****| M+-WXZ |1001_qqq_100_mmm_rrr 12370: public static void irpSubToMemByte () throws M68kException { 12371: int ea = XEiJ.regOC & 63; 12372: int a, x, y, z; 12373: if (ea < XEiJ.EA_MM) { 12374: if (ea < XEiJ.EA_AR) { //SUBX.B Dr,Dq 12375: int qqq = XEiJ.regOC >> 9 & 7; 12376: XEiJ.mpuCycleCount++; 12377: y = XEiJ.regRn[ea]; 12378: x = XEiJ.regRn[qqq]; 12379: z = x - y - (XEiJ.regCCR >> 4); //Xの左側はすべて0なのでCCR_X&を省略 12380: XEiJ.regRn[qqq] = ~255 & x | 255 & z; 12381: } else { //SUBX.B -(Ar),-(Aq) 12382: XEiJ.mpuCycleCount += 2; 12383: m60Incremented -= 1L << (ea << 3); 12384: a = m60Address = --XEiJ.regRn[ea]; 12385: y = mmuReadByteSignData (a, XEiJ.regSRS); //このr[ea]はアドレスレジスタ 12386: int aqq = XEiJ.regOC >> 9 & 15; //1qqq=aqq 12387: m60Incremented -= 1L << (aqq << 3); 12388: a = m60Address = --XEiJ.regRn[aqq]; 12389: x = mmuModifyByteSignData (a, XEiJ.regSRS); 12390: z = x - y - (XEiJ.regCCR >> 4); //Xの左側はすべて0なのでCCR_X&を省略 12391: mmuWriteByteData (a, z, XEiJ.regSRS); 12392: } 12393: XEiJ.regCCR = (z >> 4 & XEiJ.REG_CCR_N | (255 & z) - 1 >> 6 & XEiJ.regCCR & XEiJ.REG_CCR_Z | //SUBXはZをクリアすることはあるがセットすることはない 12394: ((x ^ y) & (x ^ z)) >> 6 & XEiJ.REG_CCR_V | 12395: (byte) (x & (y ^ z) ^ (y | z)) >> 7 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_subx_byte 12396: } else { //SUB.B Dq,<ea> 12397: XEiJ.mpuCycleCount++; 12398: y = XEiJ.regRn[XEiJ.regOC >> 9 & 7]; 12399: a = efaMltByte (ea); 12400: x = mmuModifyByteSignData (a, XEiJ.regSRS); 12401: z = x - y; 12402: mmuWriteByteData (a, z, XEiJ.regSRS); 12403: XEiJ.regCCR = (XEiJ.MPU_TSTB_TABLE[255 & z] | 12404: ((x ^ y) & (x ^ z)) >> 6 & XEiJ.REG_CCR_V | 12405: (byte) (x & (y ^ z) ^ (y | z)) >> 7 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_sub_byte 12406: } 12407: } //irpSubToMemByte 12408: 12409: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12410: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12411: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12412: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12413: //SUBX.W Dr,Dq |-|012346|-|*UUUU|*****| |1001_qqq_101_000_rrr 12414: //SUBX.W -(Ar),-(Aq) |-|012346|-|*UUUU|*****| |1001_qqq_101_001_rrr 12415: //SUB.W Dq,<ea> |-|012346|-|UUUUU|*****| M+-WXZ |1001_qqq_101_mmm_rrr 12416: public static void irpSubToMemWord () throws M68kException { 12417: int ea = XEiJ.regOC & 63; 12418: int a, x, y, z; 12419: if (ea < XEiJ.EA_MM) { 12420: if (ea < XEiJ.EA_AR) { //SUBX.W Dr,Dq 12421: int qqq = XEiJ.regOC >> 9 & 7; 12422: XEiJ.mpuCycleCount++; 12423: y = XEiJ.regRn[ea]; 12424: x = XEiJ.regRn[qqq]; 12425: z = x - y - (XEiJ.regCCR >> 4); //Xの左側はすべて0なのでCCR_X&を省略 12426: XEiJ.regRn[qqq] = ~65535 & x | (char) z; 12427: } else { //SUBX.W -(Ar),-(Aq) 12428: XEiJ.mpuCycleCount += 2; 12429: m60Incremented -= 2L << (ea << 3); 12430: a = m60Address = XEiJ.regRn[ea] -= 2; 12431: y = mmuReadWordSignData (a, XEiJ.regSRS); //このr[ea]はアドレスレジスタ 12432: int aqq = XEiJ.regOC >> 9 & 15; 12433: m60Incremented -= 2L << (aqq << 3); 12434: a = m60Address = XEiJ.regRn[aqq] -= 2; 12435: x = mmuModifyWordSignData (a, XEiJ.regSRS); 12436: z = x - y - (XEiJ.regCCR >> 4); //Xの左側はすべて0なのでCCR_X&を省略 12437: mmuWriteWordData (a, z, XEiJ.regSRS); 12438: } 12439: XEiJ.regCCR = (z >> 12 & XEiJ.REG_CCR_N | (char) z - 1 >> 14 & XEiJ.regCCR & XEiJ.REG_CCR_Z | //ADDXはZをクリアすることはあるがセットすることはない 12440: ((x ^ y) & (x ^ z)) >> 14 & XEiJ.REG_CCR_V | 12441: (short) (x & (y ^ z) ^ (y | z)) >> 15 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_subx_word 12442: } else { //SUB.W Dq,<ea> 12443: XEiJ.mpuCycleCount++; 12444: y = (short) XEiJ.regRn[XEiJ.regOC >> 9 & 7]; 12445: a = efaMltWord (ea); 12446: x = mmuModifyWordSignData (a, XEiJ.regSRS); 12447: z = x - y; 12448: mmuWriteWordData (a, z, XEiJ.regSRS); 12449: XEiJ.regCCR = (z >> 12 & XEiJ.REG_CCR_N | (char) z - 1 >> 14 & XEiJ.REG_CCR_Z | 12450: ((x ^ y) & (x ^ z)) >> 14 & XEiJ.REG_CCR_V | 12451: (short) (x & (y ^ z) ^ (y | z)) >> 15 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_sub_word 12452: } 12453: } //irpSubToMemWord 12454: 12455: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12456: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12457: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12458: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12459: //SUBX.L Dr,Dq |-|012346|-|*UUUU|*****| |1001_qqq_110_000_rrr 12460: //SUBX.L -(Ar),-(Aq) |-|012346|-|*UUUU|*****| |1001_qqq_110_001_rrr 12461: //SUB.L Dq,<ea> |-|012346|-|UUUUU|*****| M+-WXZ |1001_qqq_110_mmm_rrr 12462: public static void irpSubToMemLong () throws M68kException { 12463: int ea = XEiJ.regOC & 63; 12464: if (ea < XEiJ.EA_MM) { 12465: int x; 12466: int y; 12467: int z; 12468: if (ea < XEiJ.EA_AR) { //SUBX.L Dr,Dq 12469: int qqq = XEiJ.regOC >> 9 & 7; 12470: XEiJ.mpuCycleCount++; 12471: XEiJ.regRn[qqq] = z = (x = XEiJ.regRn[qqq]) - (y = XEiJ.regRn[ea]) - (XEiJ.regCCR >> 4); //Xの左側はすべて0なのでCCR_X&を省略 12472: } else { //SUBX.L -(Ar),-(Aq) 12473: XEiJ.mpuCycleCount += 2; 12474: m60Incremented -= 4L << (ea << 3); 12475: int a = m60Address = XEiJ.regRn[ea] -= 4; //このr[ea]はアドレスレジスタ 12476: y = mmuReadLongData (a, XEiJ.regSRS); 12477: int aqq = XEiJ.regOC >> 9 & 15; 12478: m60Incremented -= 4L << (aqq << 3); 12479: a = m60Address = XEiJ.regRn[aqq] -= 4; 12480: mmuWriteLongData (a, z = (x = mmuModifyLongData (a, XEiJ.regSRS)) - y - (XEiJ.regCCR >> 4), XEiJ.regSRS); //Xの左側はすべて0なのでCCR_X&を省略 12481: } 12482: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_Z : 0) | 12483: ((x ^ y) & (x ^ z)) >>> 31 << 1 | 12484: (x & (y ^ z) ^ (y | z)) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_subx 12485: } else { //SUB.L Dq,<ea> 12486: XEiJ.mpuCycleCount++; 12487: int a = efaMltLong (ea); 12488: int x; 12489: int y; 12490: int z; 12491: mmuWriteLongData (a, z = (x = mmuModifyLongData (a, XEiJ.regSRS)) - (y = XEiJ.regRn[XEiJ.regOC >> 9 & 7]), XEiJ.regSRS); 12492: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | 12493: ((x ^ y) & (x ^ z)) >>> 31 << 1 | 12494: (x & (y ^ z) ^ (y | z)) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_sub 12495: } 12496: } //irpSubToMemLong 12497: 12498: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12499: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12500: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12501: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12502: //SUBA.L <ea>,Aq |-|012346|-|-----|-----|DAM+-WXZPI|1001_qqq_111_mmm_rrr 12503: //SUB.L <ea>,Aq |A|012346|-|-----|-----|DAM+-WXZPI|1001_qqq_111_mmm_rrr [SUBA.L <ea>,Aq] 12504: //CLR.L Ar |A|012346|-|-----|-----| A |1001_rrr_111_001_rrr [SUBA.L Ar,Ar] 12505: public static void irpSubaLong () throws M68kException { 12506: int ea = XEiJ.regOC & 63; 12507: XEiJ.mpuCycleCount++; 12508: //ADDA/CMPA/SUBA.wl <ea>,Aqで<ea>が(Ar)+,-(Ar)でAr==Aqのとき1サイクル追加 12509: if (XEiJ.EA_MP <= ea && ea < XEiJ.EA_MW && 12510: (ea & 7) == ((XEiJ.regOC >> 9) & 7)) { 12511: XEiJ.mpuCycleCount++; 12512: } 12513: int z = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS) : mmuReadLongData (efaAnyLong (ea), XEiJ.regSRS); //このr[ea]はデータレジスタまたはアドレスレジスタ。pcls。イミディエイトを分離。ここでAqが変化する可能性があることに注意 12514: XEiJ.regRn[XEiJ.regOC >> 9 & 15] -= z; //r[op >> 9 & 15] -= ea < XEiJ.EA_MM ? r[ea] : rls (efaAnyLong (ea));は不可 12515: //ccrは変化しない 12516: } //irpSubaLong 12517: 12518: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12519: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12520: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12521: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12522: //SXCALL <name> |A|012346|-|UUUUU|*****| |1010_0dd_ddd_ddd_ddd [ALINE #<data>] 12523: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12524: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12525: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12526: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12527: //ALINE #<data> |-|012346|-|UUUUU|*****| |1010_ddd_ddd_ddd_ddd (line 1010 emulator) 12528: public static void irpAline () throws M68kException { 12529: irpExceptionFormat0 (M68kException.M6E_LINE_1010_EMULATOR << 2, XEiJ.regPC0); //pcは命令の先頭 12530: } //irpAline 12531: 12532: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12533: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12534: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12535: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12536: //CMP.B <ea>,Dq |-|012346|-|-UUUU|-****|D M+-WXZPI|1011_qqq_000_mmm_rrr 12537: public static void irpCmpByte () throws M68kException { 12538: XEiJ.mpuCycleCount++; 12539: int ea = XEiJ.regOC & 63; 12540: int x; 12541: int y; 12542: int z = (byte) ((x = (byte) XEiJ.regRn[XEiJ.regOC >> 9 & 7]) - (y = ea < XEiJ.EA_AR ? (byte) XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadByteSignExword ((XEiJ.regPC += 2) - 1, XEiJ.regSRS) : mmuReadByteSignData (efaAnyByte (ea), XEiJ.regSRS))); //pcbs。イミディエイトを分離 12543: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | 12544: ((x ^ y) & (x ^ z)) >>> 31 << 1 | 12545: (x & (y ^ z) ^ (y | z)) >>> 31); //ccr_cmp 12546: } //irpCmpByte 12547: 12548: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12549: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12550: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12551: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12552: //CMP.W <ea>,Dq |-|012346|-|-UUUU|-****|DAM+-WXZPI|1011_qqq_001_mmm_rrr 12553: public static void irpCmpWord () throws M68kException { 12554: XEiJ.mpuCycleCount++; 12555: int ea = XEiJ.regOC & 63; 12556: int x; 12557: int y; 12558: int z = (short) ((x = (short) XEiJ.regRn[XEiJ.regOC >> 9 & 7]) - (y = ea < XEiJ.EA_MM ? (short) XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) : mmuReadWordSignData (efaAnyWord (ea), XEiJ.regSRS))); //このr[ea]はデータレジスタまたはアドレスレジスタ。pcws。イミディエイトを分離 12559: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | 12560: ((x ^ y) & (x ^ z)) >>> 31 << 1 | 12561: (x & (y ^ z) ^ (y | z)) >>> 31); //ccr_cmp 12562: } //irpCmpWord 12563: 12564: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12565: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12566: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12567: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12568: //CMP.L <ea>,Dq |-|012346|-|-UUUU|-****|DAM+-WXZPI|1011_qqq_010_mmm_rrr 12569: public static void irpCmpLong () throws M68kException { 12570: XEiJ.mpuCycleCount++; 12571: int ea = XEiJ.regOC & 63; 12572: int x; 12573: int y; 12574: int z = (x = XEiJ.regRn[XEiJ.regOC >> 9 & 7]) - (y = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS) : mmuReadLongData (efaAnyLong (ea), XEiJ.regSRS)); //このr[ea]はデータレジスタまたはアドレスレジスタ。pcls。イミディエイトを分離 12575: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | 12576: ((x ^ y) & (x ^ z)) >>> 31 << 1 | 12577: (x & (y ^ z) ^ (y | z)) >>> 31); //ccr_cmp 12578: } //irpCmpLong 12579: 12580: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12581: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12582: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12583: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12584: //CMPA.W <ea>,Aq |-|012346|-|-UUUU|-****|DAM+-WXZPI|1011_qqq_011_mmm_rrr 12585: //CMP.W <ea>,Aq |A|012346|-|-UUUU|-****|DAM+-WXZPI|1011_qqq_011_mmm_rrr [CMPA.W <ea>,Aq] 12586: // 12587: //CMPA.W <ea>,Aq 12588: // ソースを符号拡張してロングで比較する 12589: public static void irpCmpaWord () throws M68kException { 12590: XEiJ.mpuCycleCount++; 12591: int ea = XEiJ.regOC & 63; 12592: //ADDA/CMPA/SUBA.wl <ea>,Aqで<ea>が(Ar)+,-(Ar)でAr==Aqのとき1サイクル追加 12593: if (XEiJ.EA_MP <= ea && ea < XEiJ.EA_MW && 12594: (ea & 7) == ((XEiJ.regOC >> 9) & 7)) { 12595: XEiJ.mpuCycleCount++; 12596: } 12597: //ソースを符号拡張してからロングで比較する 12598: int y = ea < XEiJ.EA_MM ? (short) XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) : mmuReadWordSignData (efaAnyWord (ea), XEiJ.regSRS); //このr[ea]はデータレジスタまたはアドレスレジスタ。pcws。イミディエイトを分離。ここでAqが変化する可能性があることに注意 12599: int x; 12600: int z = (x = XEiJ.regRn[XEiJ.regOC >> 9 & 15]) - y; 12601: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | 12602: ((x ^ y) & (x ^ z)) >>> 31 << 1 | 12603: (x & (y ^ z) ^ (y | z)) >>> 31); //ccr_cmp 12604: } //irpCmpaWord 12605: 12606: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12607: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12608: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12609: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12610: //EOR.B Dq,<ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |1011_qqq_100_mmm_rrr 12611: //CMPM.B (Ar)+,(Aq)+ |-|012346|-|-UUUU|-****| |1011_qqq_100_001_rrr 12612: public static void irpEorByte () throws M68kException { 12613: int ea = XEiJ.regOC & 63; 12614: if (ea >> 3 == XEiJ.MMM_AR) { //CMPM.B (Ar)+,(Aq)+ 12615: XEiJ.mpuCycleCount += 2; 12616: m60Incremented += 1L << (ea << 3); 12617: int a = m60Address = XEiJ.regRn[ea]++; //このr[ea]はアドレスレジスタ 12618: int y = mmuReadByteSignData (a, XEiJ.regSRS); 12619: int x; 12620: int aqq = XEiJ.regOC >> 9 & 15; 12621: m60Incremented += 1L << (aqq << 3); 12622: a = m60Address = XEiJ.regRn[aqq]++; 12623: int z = (byte) ((x = mmuReadByteSignData (a, XEiJ.regSRS)) - y); 12624: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | 12625: ((x ^ y) & (x ^ z)) >>> 31 << 1 | 12626: (x & (y ^ z) ^ (y | z)) >>> 31); //ccr_cmp 12627: } else { 12628: int qqq = XEiJ.regOC >> 9 & 7; 12629: int z; 12630: if (ea < XEiJ.EA_AR) { //EOR.B Dq,Dr 12631: XEiJ.mpuCycleCount++; 12632: z = XEiJ.regRn[ea] ^= 255 & XEiJ.regRn[qqq]; //0拡張してからEOR 12633: } else { //EOR.B Dq,<mem> 12634: XEiJ.mpuCycleCount++; 12635: int a = efaMltByte (ea); 12636: mmuWriteByteData (a, z = XEiJ.regRn[qqq] ^ mmuModifyByteSignData (a, XEiJ.regSRS), XEiJ.regSRS); 12637: } 12638: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & z]; //ccr_tst_byte 12639: } 12640: } //irpEorByte 12641: 12642: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12643: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12644: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12645: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12646: //EOR.W Dq,<ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |1011_qqq_101_mmm_rrr 12647: //CMPM.W (Ar)+,(Aq)+ |-|012346|-|-UUUU|-****| |1011_qqq_101_001_rrr 12648: public static void irpEorWord () throws M68kException { 12649: int ea = XEiJ.regOC & 63; 12650: int rrr = XEiJ.regOC & 7; 12651: int mmm = ea >> 3; 12652: if (mmm == XEiJ.MMM_AR) { //CMPM.W (Ar)+,(Aq)+ 12653: XEiJ.mpuCycleCount += 2; 12654: m60Incremented += 2L << (ea << 3); 12655: int a = m60Address = (XEiJ.regRn[ea] += 2) - 2; //このr[ea]はアドレスレジスタ 12656: int y = mmuReadWordSignData (a, XEiJ.regSRS); 12657: int x; 12658: int aqq = XEiJ.regOC >> 9 & 15; 12659: m60Incremented += 2L << (aqq << 3); 12660: a = m60Address = (XEiJ.regRn[aqq] += 2) - 2; 12661: int z = (short) ((x = mmuReadWordSignData (a, XEiJ.regSRS)) - y); 12662: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | 12663: ((x ^ y) & (x ^ z)) >>> 31 << 1 | 12664: (x & (y ^ z) ^ (y | z)) >>> 31); //ccr_cmp 12665: } else { 12666: int qqq = XEiJ.regOC >> 9 & 7; 12667: int z; 12668: if (ea < XEiJ.EA_AR) { //EOR.W Dq,Dr 12669: XEiJ.mpuCycleCount++; 12670: z = XEiJ.regRn[rrr] ^= (char) XEiJ.regRn[qqq]; //0拡張してからEOR 12671: } else { //EOR.W Dq,<mem> 12672: XEiJ.mpuCycleCount++; 12673: int a = efaMltWord (ea); 12674: mmuWriteWordData (a, z = XEiJ.regRn[qqq] ^ mmuModifyWordSignData (a, XEiJ.regSRS), XEiJ.regSRS); 12675: } 12676: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (char) z - 1 >> 31 & XEiJ.REG_CCR_Z | ((short) z < 0 ? XEiJ.REG_CCR_N : 0); //ccr_tst_word 12677: } 12678: } //irpEorWord 12679: 12680: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12681: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12682: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12683: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12684: //EOR.L Dq,<ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |1011_qqq_110_mmm_rrr 12685: //CMPM.L (Ar)+,(Aq)+ |-|012346|-|-UUUU|-****| |1011_qqq_110_001_rrr 12686: public static void irpEorLong () throws M68kException { 12687: int ea = XEiJ.regOC & 63; 12688: if (ea >> 3 == XEiJ.MMM_AR) { //CMPM.L (Ar)+,(Aq)+ 12689: XEiJ.mpuCycleCount += 2; 12690: m60Incremented += 4L << (ea << 3); 12691: int a = m60Address = (XEiJ.regRn[ea] += 4) - 4; //このr[ea]はアドレスレジスタ 12692: int y = mmuReadLongData (a, XEiJ.regSRS); 12693: int x; 12694: int aqq = XEiJ.regOC >> 9 & 15; 12695: m60Incremented += 4L << (aqq << 3); 12696: a = m60Address = (XEiJ.regRn[aqq] += 4) - 4; 12697: int z = (x = mmuReadLongData (a, XEiJ.regSRS)) - y; 12698: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | 12699: ((x ^ y) & (x ^ z)) >>> 31 << 1 | 12700: (x & (y ^ z) ^ (y | z)) >>> 31); //ccr_cmp 12701: } else { 12702: int qqq = XEiJ.regOC >> 9 & 7; 12703: int z; 12704: if (ea < XEiJ.EA_AR) { //EOR.L Dq,Dr 12705: XEiJ.mpuCycleCount++; 12706: XEiJ.regRn[ea] = z = XEiJ.regRn[ea] ^ XEiJ.regRn[qqq]; 12707: } else { //EOR.L Dq,<mem> 12708: XEiJ.mpuCycleCount++; 12709: int a = efaMltLong (ea); 12710: mmuWriteLongData (a, z = mmuModifyLongData (a, XEiJ.regSRS) ^ XEiJ.regRn[qqq], XEiJ.regSRS); 12711: } 12712: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 12713: } 12714: } //irpEorLong 12715: 12716: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12717: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12718: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12719: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12720: //CMPA.L <ea>,Aq |-|012346|-|-UUUU|-****|DAM+-WXZPI|1011_qqq_111_mmm_rrr 12721: //CMP.L <ea>,Aq |A|012346|-|-UUUU|-****|DAM+-WXZPI|1011_qqq_111_mmm_rrr [CMPA.L <ea>,Aq] 12722: public static void irpCmpaLong () throws M68kException { 12723: XEiJ.mpuCycleCount++; 12724: int ea = XEiJ.regOC & 63; 12725: //ADDA/CMPA/SUBA.wl <ea>,Aqで<ea>が(Ar)+,-(Ar)でAr==Aqのとき1サイクル追加 12726: if (XEiJ.EA_MP <= ea && ea < XEiJ.EA_MW && 12727: (ea & 7) == ((XEiJ.regOC >> 9) & 7)) { 12728: XEiJ.mpuCycleCount++; 12729: } 12730: int y = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS) : mmuReadLongData (efaAnyLong (ea), XEiJ.regSRS); //このr[ea]はデータレジスタまたはアドレスレジスタ。pcls。イミディエイトを分離。ここでAqが変化する可能性があることに注意 12731: int x; 12732: int z = (x = XEiJ.regRn[XEiJ.regOC >> 9 & 15]) - y; 12733: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | 12734: ((x ^ y) & (x ^ z)) >>> 31 << 1 | 12735: (x & (y ^ z) ^ (y | z)) >>> 31); //ccr_cmp 12736: } //irpCmpaLong 12737: 12738: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12739: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12740: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12741: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12742: //AND.B <ea>,Dq |-|012346|-|-UUUU|-**00|D M+-WXZPI|1100_qqq_000_mmm_rrr 12743: public static void irpAndToRegByte () throws M68kException { 12744: XEiJ.mpuCycleCount++; 12745: int ea = XEiJ.regOC & 63; 12746: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & (XEiJ.regRn[XEiJ.regOC >> 9 & 7] &= ~255 | (ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadByteSignExword ((XEiJ.regPC += 2) - 1, XEiJ.regSRS) : mmuReadByteSignData (efaAnyByte (ea), XEiJ.regSRS)))]; //ccr_tst_byte。pcbs。イミディエイトを分離。1拡張してからAND 12747: } //irpAndToRegByte 12748: 12749: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12750: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12751: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12752: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12753: //AND.W <ea>,Dq |-|012346|-|-UUUU|-**00|D M+-WXZPI|1100_qqq_001_mmm_rrr 12754: public static void irpAndToRegWord () throws M68kException { 12755: XEiJ.mpuCycleCount++; 12756: int ea = XEiJ.regOC & 63; 12757: int z = XEiJ.regRn[XEiJ.regOC >> 9 & 7] &= ~65535 | (ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) : mmuReadWordSignData (efaAnyWord (ea), XEiJ.regSRS)); //pcws。イミディエイトを分離。1拡張してからAND 12758: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (char) z - 1 >> 31 & XEiJ.REG_CCR_Z | ((short) z < 0 ? XEiJ.REG_CCR_N : 0); //ccr_tst_word 12759: } //irpAndToRegWord 12760: 12761: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12762: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12763: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12764: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12765: //AND.L <ea>,Dq |-|012346|-|-UUUU|-**00|D M+-WXZPI|1100_qqq_010_mmm_rrr 12766: public static void irpAndToRegLong () throws M68kException { 12767: XEiJ.mpuCycleCount++; 12768: int ea = XEiJ.regOC & 63; 12769: int z = XEiJ.regRn[XEiJ.regOC >> 9 & 7] &= ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS) : mmuReadLongData (efaAnyLong (ea), XEiJ.regSRS); //pcls。イミディエイトを分離 12770: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 12771: } //irpAndToRegLong 12772: 12773: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12774: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12775: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12776: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12777: //MULU.W <ea>,Dq |-|012346|-|-UUUU|-***0|D M+-WXZPI|1100_qqq_011_mmm_rrr 12778: public static void irpMuluWord () throws M68kException { 12779: XEiJ.mpuCycleCount += 2; 12780: int ea = XEiJ.regOC & 63; 12781: int qqq = XEiJ.regOC >> 9 & 7; 12782: int y = ea < XEiJ.EA_AR ? (char) XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) : mmuReadWordZeroData (efaAnyWord (ea), XEiJ.regSRS); //pcwz。イミディエイトを分離 12783: int z; 12784: XEiJ.regRn[qqq] = z = (char) XEiJ.regRn[qqq] * y; //積の下位32ビット。オーバーフローは無視 12785: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 12786: } //irpMuluWord 12787: 12788: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12789: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12790: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12791: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12792: //ABCD.B Dr,Dq |-|012346|-|UUUUU|*U*U*| |1100_qqq_100_000_rrr 12793: //ABCD.B -(Ar),-(Aq) |-|012346|-|UUUUU|*U*U*| |1100_qqq_100_001_rrr 12794: //AND.B Dq,<ea> |-|012346|-|-UUUU|-**00| M+-WXZ |1100_qqq_100_mmm_rrr 12795: public static void irpAndToMemByte () throws M68kException { 12796: int ea = XEiJ.regOC & 63; 12797: if (ea >= XEiJ.EA_MM) { //AND.B Dq,<ea> 12798: XEiJ.mpuCycleCount++; 12799: int a = efaMltByte (ea); 12800: int z = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & mmuModifyByteSignData (a, XEiJ.regSRS); 12801: mmuWriteByteData (a, z, XEiJ.regSRS); 12802: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & z]; //ccr_tst_byte 12803: } else if (ea < XEiJ.EA_AR) { //ABCD.B Dr,Dq 12804: int qqq = XEiJ.regOC >> 9 & 7; 12805: XEiJ.mpuCycleCount++; 12806: XEiJ.regRn[qqq] = ~0xff & XEiJ.regRn[qqq] | irpAbcd (XEiJ.regRn[qqq], XEiJ.regRn[ea]); 12807: } else { //ABCD.B -(Ar),-(Aq) 12808: XEiJ.mpuCycleCount += 2; 12809: m60Incremented -= 1L << (ea << 3); 12810: int a = m60Address = --XEiJ.regRn[ea]; //このr[ea]はアドレスレジスタ 12811: int y = mmuReadByteZeroData (a, XEiJ.regSRS); 12812: int aqq = (XEiJ.regOC >> 9) - (96 - 8); 12813: m60Incremented -= 1L << (aqq << 3); 12814: a = m60Address = --XEiJ.regRn[aqq]; 12815: mmuWriteByteData (a, irpAbcd (mmuModifyByteZeroData (a, XEiJ.regSRS), y), XEiJ.regSRS); 12816: } 12817: } //irpAndToMemByte 12818: 12819: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12820: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12821: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12822: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12823: //EXG.L Dq,Dr |-|012346|-|-----|-----| |1100_qqq_101_000_rrr 12824: //EXG.L Aq,Ar |-|012346|-|-----|-----| |1100_qqq_101_001_rrr 12825: //AND.W Dq,<ea> |-|012346|-|-UUUU|-**00| M+-WXZ |1100_qqq_101_mmm_rrr 12826: public static void irpAndToMemWord () throws M68kException { 12827: int ea = XEiJ.regOC & 63; 12828: if (ea < XEiJ.EA_MM) { //EXG 12829: XEiJ.mpuCycleCount++; 12830: if (ea < XEiJ.EA_AR) { //EXG.L Dq,Dr 12831: int qqq = XEiJ.regOC >> 9 & 7; 12832: int t = XEiJ.regRn[qqq]; 12833: XEiJ.regRn[qqq] = XEiJ.regRn[ea]; 12834: XEiJ.regRn[ea] = t; 12835: } else { //EXG.L Aq,Ar 12836: int aqq = (XEiJ.regOC >> 9) - (96 - 8); 12837: int t = XEiJ.regRn[aqq]; 12838: XEiJ.regRn[aqq] = XEiJ.regRn[ea]; //このr[ea]アドレスレジスタ 12839: XEiJ.regRn[ea] = t; //このr[ea]はアドレスレジスタ 12840: } 12841: } else { //AND.W Dq,<ea> 12842: XEiJ.mpuCycleCount++; 12843: int a = efaMltWord (ea); 12844: int z = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & mmuModifyWordSignData (a, XEiJ.regSRS); 12845: mmuWriteWordData (a, z, XEiJ.regSRS); 12846: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (char) z - 1 >> 31 & XEiJ.REG_CCR_Z | ((short) z < 0 ? XEiJ.REG_CCR_N : 0); //ccr_tst_word 12847: } 12848: } //irpAndToMemWord 12849: 12850: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12851: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12852: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12853: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12854: //EXG.L Dq,Ar |-|012346|-|-----|-----| |1100_qqq_110_001_rrr 12855: //AND.L Dq,<ea> |-|012346|-|-UUUU|-**00| M+-WXZ |1100_qqq_110_mmm_rrr 12856: public static void irpAndToMemLong () throws M68kException { 12857: int ea = XEiJ.regOC & 63; 12858: int qqq = XEiJ.regOC >> 9 & 7; 12859: if (ea >> 3 == XEiJ.MMM_AR) { //EXG.L Dq,Ar 12860: XEiJ.mpuCycleCount++; 12861: int t = XEiJ.regRn[qqq]; 12862: XEiJ.regRn[qqq] = XEiJ.regRn[ea]; //このr[ea]はアドレスレジスタ 12863: XEiJ.regRn[ea] = t; //このr[ea]はアドレスレジスタ 12864: } else { //AND.L Dq,<ea> 12865: XEiJ.mpuCycleCount++; 12866: int a = efaMltLong (ea); 12867: int z; 12868: mmuWriteLongData (a, z = mmuModifyLongData (a, XEiJ.regSRS) & XEiJ.regRn[qqq], XEiJ.regSRS); 12869: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 12870: } 12871: } //irpAndToMemLong 12872: 12873: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12874: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12875: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12876: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12877: //MULS.W <ea>,Dq |-|012346|-|-UUUU|-***0|D M+-WXZPI|1100_qqq_111_mmm_rrr 12878: public static void irpMulsWord () throws M68kException { 12879: XEiJ.mpuCycleCount += 2; 12880: int ea = XEiJ.regOC & 63; 12881: int qqq = XEiJ.regOC >> 9 & 7; 12882: int y = ea < XEiJ.EA_AR ? (short) XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) : mmuReadWordSignData (efaAnyWord (ea), XEiJ.regSRS); //pcws。イミディエイトを分離 12883: int z; 12884: XEiJ.regRn[qqq] = z = (short) XEiJ.regRn[qqq] * y; //積の下位32ビット。オーバーフローは無視 12885: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 12886: } //irpMulsWord 12887: 12888: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12889: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12890: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12891: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12892: //ADD.B <ea>,Dq |-|012346|-|UUUUU|*****|D M+-WXZPI|1101_qqq_000_mmm_rrr 12893: public static void irpAddToRegByte () throws M68kException { 12894: XEiJ.mpuCycleCount++; 12895: int ea = XEiJ.regOC & 63; 12896: int qqq = XEiJ.regOC >> 9 & 7; 12897: int x, y, z; 12898: y = ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadByteSignExword ((XEiJ.regPC += 2) - 1, XEiJ.regSRS) : mmuReadByteSignData (efaAnyByte (ea), XEiJ.regSRS); //pcbs。イミディエイトを分離 12899: x = XEiJ.regRn[qqq]; 12900: z = x + y; 12901: XEiJ.regRn[qqq] = ~255 & x | 255 & z; 12902: XEiJ.regCCR = (XEiJ.MPU_TSTB_TABLE[255 & z] | 12903: ((x ^ z) & (y ^ z)) >> 6 & XEiJ.REG_CCR_V | 12904: (byte) ((x | y) ^ (x ^ y) & z) >> 7 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_add_byte 12905: } //irpAddToRegByte 12906: 12907: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12908: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12909: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12910: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12911: //ADD.W <ea>,Dq |-|012346|-|UUUUU|*****|DAM+-WXZPI|1101_qqq_001_mmm_rrr 12912: public static void irpAddToRegWord () throws M68kException { 12913: XEiJ.mpuCycleCount++; 12914: int ea = XEiJ.regOC & 63; 12915: int qqq = XEiJ.regOC >> 9 & 7; 12916: int x, y, z; 12917: y = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) : mmuReadWordSignData (efaAnyWord (ea), XEiJ.regSRS); //このr[ea]はデータレジスタまたはアドレスレジスタ。pcws。イミディエイトを分離 12918: x = XEiJ.regRn[qqq]; 12919: z = x + y; 12920: XEiJ.regRn[qqq] = ~65535 & x | (char) z; 12921: XEiJ.regCCR = (z >> 12 & XEiJ.REG_CCR_N | (char) z - 1 >> 14 & XEiJ.REG_CCR_Z | 12922: ((x ^ z) & (y ^ z)) >> 14 & XEiJ.REG_CCR_V | 12923: (short) ((x | y) ^ (x ^ y) & z) >> 15 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_add_word 12924: } //irpAddToRegWord 12925: 12926: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12927: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12928: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12929: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12930: //ADD.L <ea>,Dq |-|012346|-|UUUUU|*****|DAM+-WXZPI|1101_qqq_010_mmm_rrr 12931: public static void irpAddToRegLong () throws M68kException { 12932: XEiJ.mpuCycleCount++; 12933: int ea = XEiJ.regOC & 63; 12934: int qqq = XEiJ.regOC >> 9 & 7; 12935: int x, y, z; 12936: y = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS) : mmuReadLongData (efaAnyLong (ea), XEiJ.regSRS); //このr[ea]はデータレジスタまたはアドレスレジスタ。pcls。イミディエイトを分離 12937: x = XEiJ.regRn[qqq]; 12938: z = x + y; 12939: XEiJ.regRn[qqq] = z; 12940: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | 12941: ((x ^ z) & (y ^ z)) >> 30 & XEiJ.REG_CCR_V | 12942: ((x | y) ^ (x ^ y) & z) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_add 12943: } //irpAddToRegLong 12944: 12945: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12946: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12947: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12948: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12949: //ADDA.W <ea>,Aq |-|012346|-|-----|-----|DAM+-WXZPI|1101_qqq_011_mmm_rrr 12950: //ADD.W <ea>,Aq |A|012346|-|-----|-----|DAM+-WXZPI|1101_qqq_011_mmm_rrr [ADDA.W <ea>,Aq] 12951: // 12952: //ADDA.W <ea>,Aq 12953: // ソースを符号拡張してロングで加算する 12954: public static void irpAddaWord () throws M68kException { 12955: XEiJ.mpuCycleCount++; 12956: int ea = XEiJ.regOC & 63; 12957: //ADDA/CMPA/SUBA.wl <ea>,Aqで<ea>が(Ar)+,-(Ar)でAr==Aqのとき1サイクル追加 12958: if (XEiJ.EA_MP <= ea && ea < XEiJ.EA_MW && 12959: (ea & 7) == ((XEiJ.regOC >> 9) & 7)) { 12960: XEiJ.mpuCycleCount++; 12961: } 12962: int z = ea < XEiJ.EA_MM ? (short) XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) : mmuReadWordSignData (efaAnyWord (ea), XEiJ.regSRS); //このr[ea]はデータレジスタまたはアドレスレジスタ。pcws。イミディエイトを分離。ここでAqが変化する可能性があることに注意 12963: XEiJ.regRn[XEiJ.regOC >> 9 & 15] += z; //r[op >> 9 & 15] += ea < XEiJ.EA_MM ? (short) r[ea] : rws (efaAnyWord (ea));は不可 12964: //ccrは変化しない 12965: } //irpAddaWord 12966: 12967: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12968: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12969: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12970: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12971: //ADDX.B Dr,Dq |-|012346|-|*UUUU|*****| |1101_qqq_100_000_rrr 12972: //ADDX.B -(Ar),-(Aq) |-|012346|-|*UUUU|*****| |1101_qqq_100_001_rrr 12973: //ADD.B Dq,<ea> |-|012346|-|UUUUU|*****| M+-WXZ |1101_qqq_100_mmm_rrr 12974: public static void irpAddToMemByte () throws M68kException { 12975: int ea = XEiJ.regOC & 63; 12976: int a, x, y, z; 12977: if (ea < XEiJ.EA_MM) { 12978: if (ea < XEiJ.EA_AR) { //ADDX.B Dr,Dq 12979: int qqq = XEiJ.regOC >> 9 & 7; 12980: XEiJ.mpuCycleCount++; 12981: y = XEiJ.regRn[ea]; 12982: x = XEiJ.regRn[qqq]; 12983: z = x + y + (XEiJ.regCCR >> 4); //Xの左側はすべて0なのでCCR_X&を省略 12984: XEiJ.regRn[qqq] = ~255 & x | 255 & z; 12985: } else { //ADDX.B -(Ar),-(Aq) 12986: XEiJ.mpuCycleCount += 2; 12987: m60Incremented -= 1L << (ea << 3); 12988: a = m60Address = --XEiJ.regRn[ea]; //このr[ea]はアドレスレジスタ 12989: y = mmuReadByteSignData (a, XEiJ.regSRS); 12990: int aqq = XEiJ.regOC >> 9 & 15; //1qqq=aqq 12991: m60Incremented -= 1L << (aqq << 3); 12992: a = m60Address = --XEiJ.regRn[aqq]; 12993: x = mmuModifyByteSignData (a, XEiJ.regSRS); 12994: z = x + y + (XEiJ.regCCR >> 4); //Xの左側はすべて0なのでCCR_X&を省略 12995: mmuWriteByteData (a, z, XEiJ.regSRS); 12996: } 12997: XEiJ.regCCR = (z >> 4 & XEiJ.REG_CCR_N | (255 & z) - 1 >> 6 & XEiJ.regCCR & XEiJ.REG_CCR_Z | //ADDXはZをクリアすることはあるがセットすることはない 12998: ((x ^ z) & (y ^ z)) >> 6 & XEiJ.REG_CCR_V | 12999: (byte) ((x | y) ^ (x ^ y) & z) >> 7 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_addx_byte 13000: } else { //ADD.B Dq,<ea> 13001: XEiJ.mpuCycleCount++; 13002: y = XEiJ.regRn[XEiJ.regOC >> 9 & 7]; 13003: a = efaMltByte (ea); 13004: x = mmuModifyByteSignData (a, XEiJ.regSRS); 13005: z = x + y; 13006: mmuWriteByteData (a, z, XEiJ.regSRS); 13007: XEiJ.regCCR = (XEiJ.MPU_TSTB_TABLE[255 & z] | 13008: ((x ^ z) & (y ^ z)) >> 6 & XEiJ.REG_CCR_V | 13009: (byte) ((x | y) ^ (x ^ y) & z) >> 7 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_add_byte 13010: } 13011: } //irpAddToMemByte 13012: 13013: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 13014: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 13015: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 13016: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 13017: //ADDX.W Dr,Dq |-|012346|-|*UUUU|*****| |1101_qqq_101_000_rrr 13018: //ADDX.W -(Ar),-(Aq) |-|012346|-|*UUUU|*****| |1101_qqq_101_001_rrr 13019: //ADD.W Dq,<ea> |-|012346|-|UUUUU|*****| M+-WXZ |1101_qqq_101_mmm_rrr 13020: public static void irpAddToMemWord () throws M68kException { 13021: int ea = XEiJ.regOC & 63; 13022: int a, x, y, z; 13023: if (ea < XEiJ.EA_MM) { 13024: if (ea < XEiJ.EA_AR) { //ADDX.W Dr,Dq 13025: int qqq = XEiJ.regOC >> 9 & 7; 13026: XEiJ.mpuCycleCount++; 13027: y = XEiJ.regRn[ea]; 13028: x = XEiJ.regRn[qqq]; 13029: z = x + y + (XEiJ.regCCR >> 4); //Xの左側はすべて0なのでCCR_X&を省略 13030: XEiJ.regRn[qqq] = ~65535 & x | (char) z; 13031: } else { //ADDX.W -(Ar),-(Aq) 13032: XEiJ.mpuCycleCount += 2; 13033: m60Incremented -= 2L << (ea << 3); 13034: a = m60Address = XEiJ.regRn[ea] -= 2; //このr[ea]はアドレスレジスタ 13035: y = mmuReadWordSignData (a, XEiJ.regSRS); 13036: int aqq = XEiJ.regOC >> 9 & 15; 13037: m60Incremented -= 2L << (aqq << 3); 13038: a = m60Address = XEiJ.regRn[aqq] -= 2; 13039: x = mmuModifyWordSignData (a, XEiJ.regSRS); 13040: z = x + y + (XEiJ.regCCR >> 4); //Xの左側はすべて0なのでCCR_X&を省略 13041: mmuWriteWordData (a, z, XEiJ.regSRS); 13042: } 13043: XEiJ.regCCR = (z >> 12 & XEiJ.REG_CCR_N | (char) z - 1 >> 14 & XEiJ.regCCR & XEiJ.REG_CCR_Z | //ADDXはZをクリアすることはあるがセットすることはない 13044: ((x ^ z) & (y ^ z)) >> 14 & XEiJ.REG_CCR_V | 13045: (short) ((x | y) ^ (x ^ y) & z) >> 15 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_addx_word 13046: } else { //ADD.W Dq,<ea> 13047: XEiJ.mpuCycleCount++; 13048: a = efaMltWord (ea); 13049: y = XEiJ.regRn[XEiJ.regOC >> 9 & 7]; 13050: x = mmuModifyWordSignData (a, XEiJ.regSRS); 13051: z = x + y; 13052: mmuWriteWordData (a, z, XEiJ.regSRS); 13053: XEiJ.regCCR = (z >> 12 & XEiJ.REG_CCR_N | (char) z - 1 >> 14 & XEiJ.REG_CCR_Z | 13054: ((x ^ z) & (y ^ z)) >> 14 & XEiJ.REG_CCR_V | 13055: (short) ((x | y) ^ (x ^ y) & z) >> 15 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_add_word 13056: } 13057: } //irpAddToMemWord 13058: 13059: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 13060: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 13061: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 13062: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 13063: //ADDX.L Dr,Dq |-|012346|-|*UUUU|*****| |1101_qqq_110_000_rrr 13064: //ADDX.L -(Ar),-(Aq) |-|012346|-|*UUUU|*****| |1101_qqq_110_001_rrr 13065: //ADD.L Dq,<ea> |-|012346|-|UUUUU|*****| M+-WXZ |1101_qqq_110_mmm_rrr 13066: public static void irpAddToMemLong () throws M68kException { 13067: int ea = XEiJ.regOC & 63; 13068: if (ea < XEiJ.EA_MM) { 13069: int x; 13070: int y; 13071: int z; 13072: if (ea < XEiJ.EA_AR) { //ADDX.L Dr,Dq 13073: int qqq = XEiJ.regOC >> 9 & 7; 13074: XEiJ.mpuCycleCount++; 13075: XEiJ.regRn[qqq] = z = (x = XEiJ.regRn[qqq]) + (y = XEiJ.regRn[ea]) + (XEiJ.regCCR >> 4); //Xの左側はすべて0なのでCCR_X&を省略 13076: } else { //ADDX.L -(Ar),-(Aq) 13077: XEiJ.mpuCycleCount += 2; 13078: m60Incremented -= 4L << (ea << 3); 13079: int a = m60Address = XEiJ.regRn[ea] -= 4; //このr[ea]はアドレスレジスタ 13080: y = mmuReadLongData (a, XEiJ.regSRS); 13081: int aqq = XEiJ.regOC >> 9 & 15; 13082: m60Incremented -= 4L << (aqq << 3); 13083: a = m60Address = XEiJ.regRn[aqq] -= 4; 13084: mmuWriteLongData (a, z = (x = mmuModifyLongData (a, XEiJ.regSRS)) + y + (XEiJ.regCCR >> 4), XEiJ.regSRS); //Xの左側はすべて0なのでCCR_X&を省略 13085: } 13086: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_Z : 0) | 13087: ((x ^ z) & (y ^ z)) >>> 31 << 1 | 13088: ((x | y) ^ (x ^ y) & z) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_addx 13089: } else { //ADD.L Dq,<ea> 13090: XEiJ.mpuCycleCount++; 13091: int a = efaMltLong (ea); 13092: int x; 13093: int y; 13094: int z; 13095: mmuWriteLongData (a, z = (x = mmuModifyLongData (a, XEiJ.regSRS)) + (y = XEiJ.regRn[XEiJ.regOC >> 9 & 7]), XEiJ.regSRS); 13096: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | 13097: ((x ^ z) & (y ^ z)) >>> 31 << 1 | 13098: ((x | y) ^ (x ^ y) & z) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_add 13099: } 13100: } //irpAddToMemLong 13101: 13102: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 13103: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 13104: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 13105: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 13106: //ADDA.L <ea>,Aq |-|012346|-|-----|-----|DAM+-WXZPI|1101_qqq_111_mmm_rrr 13107: //ADD.L <ea>,Aq |A|012346|-|-----|-----|DAM+-WXZPI|1101_qqq_111_mmm_rrr [ADDA.L <ea>,Aq] 13108: public static void irpAddaLong () throws M68kException { 13109: int ea = XEiJ.regOC & 63; 13110: XEiJ.mpuCycleCount++; 13111: //ADDA/CMPA/SUBA.wl <ea>,Aqで<ea>が(Ar)+,-(Ar)でAr==Aqのとき1サイクル追加 13112: if (XEiJ.EA_MP <= ea && ea < XEiJ.EA_MW && 13113: (ea & 7) == ((XEiJ.regOC >> 9) & 7)) { 13114: XEiJ.mpuCycleCount++; 13115: } 13116: int z = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS) : mmuReadLongData (efaAnyLong (ea), XEiJ.regSRS); //このr[ea]はデータレジスタまたはアドレスレジスタ。pcls。イミディエイトを分離。ここでAqが変化する可能性があることに注意 13117: XEiJ.regRn[XEiJ.regOC >> 9 & 15] += z; //r[op >> 9 & 15] += ea < XEiJ.EA_MM ? r[ea] : rls (efaAnyLong (ea));は不可 13118: //ccrは変化しない 13119: } //irpAddaLong 13120: 13121: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 13122: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 13123: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 13124: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 13125: //ASR.B #<data>,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_000_000_rrr 13126: //LSR.B #<data>,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_000_001_rrr 13127: //ROXR.B #<data>,Dr |-|012346|-|*UUUU|***0*| |1110_qqq_000_010_rrr 13128: //ROR.B #<data>,Dr |-|012346|-|-UUUU|-**0*| |1110_qqq_000_011_rrr 13129: //ASR.B Dq,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_000_100_rrr 13130: //LSR.B Dq,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_000_101_rrr 13131: //ROXR.B Dq,Dr |-|012346|-|*UUUU|***0*| |1110_qqq_000_110_rrr 13132: //ROR.B Dq,Dr |-|012346|-|-UUUU|-**0*| |1110_qqq_000_111_rrr 13133: //ASR.B Dr |A|012346|-|UUUUU|***0*| |1110_001_000_000_rrr [ASR.B #1,Dr] 13134: //LSR.B Dr |A|012346|-|UUUUU|***0*| |1110_001_000_001_rrr [LSR.B #1,Dr] 13135: //ROXR.B Dr |A|012346|-|*UUUU|***0*| |1110_001_000_010_rrr [ROXR.B #1,Dr] 13136: //ROR.B Dr |A|012346|-|-UUUU|-**0*| |1110_001_000_011_rrr [ROR.B #1,Dr] 13137: // 13138: //ASR.B #<data>,Dr 13139: //ASR.B Dq,Dr 13140: // 算術右シフトバイト 13141: // ........................ｱｲｳｴｵｶｷｸ XNZVC 13142: // 0 ........................ｱｲｳｴｵｶｷｸ Xｱ*00 Z=ｱｲｳｴｵｶｷｸ==0 13143: // 1 ........................ｱｱｲｳｴｵｶｷ ｸｱ*0ｸ Z=ｱｲｳｴｵｶｷ==0 13144: // 2 ........................ｱｱｱｲｳｴｵｶ ｷｱ*0ｷ Z=ｱｲｳｴｵｶ==0 13145: // 3 ........................ｱｱｱｱｲｳｴｵ ｶｱ*0ｶ Z=ｱｲｳｴｵ==0 13146: // 4 ........................ｱｱｱｱｱｲｳｴ ｵｱ*0ｵ Z=ｱｲｳｴ==0 13147: // 5 ........................ｱｱｱｱｱｱｲｳ ｴｱ*0ｴ Z=ｱｲｳ==0 13148: // 6 ........................ｱｱｱｱｱｱｱｲ ｳｱ*0ｳ Z=ｱｲ==0 13149: // 7 ........................ｱｱｱｱｱｱｱｱ ｲｱ*0ｲ Z=ｱ==0 13150: // 8 ........................ｱｱｱｱｱｱｱｱ ｱｱ*0ｱ Z=ｱ==0 13151: // CCR 13152: // X countが0のとき変化しない。他は最後に押し出されたビット 13153: // N 結果の最上位ビット 13154: // Z 結果が0のときセット。他はクリア 13155: // V 常にクリア 13156: // C countが0のときクリア。他は最後に押し出されたビット 13157: // 13158: //LSR.B #<data>,Dr 13159: //LSR.B Dq,Dr 13160: // 論理右シフトバイト 13161: // ........................ｱｲｳｴｵｶｷｸ XNZVC 13162: // 0 ........................ｱｲｳｴｵｶｷｸ Xｱ*00 Z=ｱｲｳｴｵｶｷｸ==0 13163: // 1 ........................0ｱｲｳｴｵｶｷ ｸ0*0ｸ Z=ｱｲｳｴｵｶｷ==0 13164: // 2 ........................00ｱｲｳｴｵｶ ｷ0*0ｷ Z=ｱｲｳｴｵｶ==0 13165: // 3 ........................000ｱｲｳｴｵ ｶ0*0ｶ Z=ｱｲｳｴｵ==0 13166: // 4 ........................0000ｱｲｳｴ ｵ0*0ｵ Z=ｱｲｳｴ==0 13167: // 5 ........................00000ｱｲｳ ｴ0*0ｴ Z=ｱｲｳ==0 13168: // 6 ........................000000ｱｲ ｳ0*0ｳ Z=ｱｲ==0 13169: // 7 ........................0000000ｱ ｲ0*0ｲ Z=ｱ==0 13170: // 8 ........................00000000 ｱ010ｱ 13171: // 9 ........................00000000 00100 13172: // CCR 13173: // X countが0のとき変化しない。他は最後に押し出されたビット 13174: // N 結果の最上位ビット 13175: // Z 結果が0のときセット。他はクリア 13176: // V 常にクリア 13177: // C countが0のときクリア。他は最後に押し出されたビット 13178: // 13179: //ROR.B #<data>,Dr 13180: //ROR.B Dq,Dr 13181: // 右ローテートバイト 13182: // ........................ｱｲｳｴｵｶｷｸ XNZVC 13183: // 0 ........................ｱｲｳｴｵｶｷｸ Xｱ*00 Z=ｱｲｳｴｵｶｷｸ==0 13184: // 1 ........................ｸｱｲｳｴｵｶｷ Xｸ*0ｸ Z=ｱｲｳｴｵｶｷｸ==0 13185: // : 13186: // 7 ........................ｲｳｴｵｶｷｸｱ Xｲ*0ｲ Z=ｱｲｳｴｵｶｷｸ==0 13187: // 8 ........................ｱｲｳｴｵｶｷｸ Xｱ*0ｱ Z=ｱｲｳｴｵｶｷｸ==0 13188: // CCR 13189: // X 常に変化しない 13190: // N 結果の最上位ビット 13191: // Z 結果が0のときセット。他はクリア 13192: // V 常にクリア 13193: // C countが0のときクリア。他は結果の最上位ビット 13194: // 13195: //ROXR.B #<data>,Dr 13196: //ROXR.B Dq,Dr 13197: // 拡張右ローテートバイト 13198: // ........................ｱｲｳｴｵｶｷｸ XNZVC 13199: // 0 ........................ｱｲｳｴｵｶｷｸ Xｱ*0X Z=ｱｲｳｴｵｶｷｸ==0 13200: // 1 ........................Xｱｲｳｴｵｶｷ ｸX*0ｸ Z=ｱｲｳｴｵｶｷX==0 13201: // 2 ........................ｸXｱｲｳｴｵｶ ｷｸ*0ｷ Z=ｱｲｳｴｵｶｸX==0 13202: // 3 ........................ｷｸXｱｲｳｴｵ ｶｷ*0ｶ Z=ｱｲｳｴｵｷｸX==0 13203: // 4 ........................ｶｷｸXｱｲｳｴ ｵｶ*0ｵ Z=ｱｲｳｴｶｷｸX==0 13204: // 5 ........................ｵｶｷｸXｱｲｳ ｴｵ*0ｴ Z=ｱｲｳｵｶｷｸX==0 13205: // 6 ........................ｴｵｶｷｸXｱｲ ｳｴ*0ｳ Z=ｱｲｴｵｶｷｸX==0 13206: // 7 ........................ｳｴｵｶｷｸXｱ ｲｳ*0ｲ Z=ｱｳｴｵｶｷｸX==0 13207: // 8 ........................ｲｳｴｵｶｷｸX ｱｲ*0ｱ Z=ｲｳｴｵｶｷｸX==0 13208: // 9 ........................ｱｲｳｴｵｶｷｸ Xｱ*0X Z=ｱｲｳｴｵｶｷｸ==0 13209: // CCR 13210: // X countが0のとき変化しない。他は最後に押し出されたビット 13211: // N 結果の最上位ビット 13212: // Z 結果が0のときセット。他はクリア 13213: // V 常にクリア 13214: // C countが0のときXのコピー。他は最後に押し出されたビット 13215: public static void irpXxrToRegByte () throws M68kException { 13216: int rrr; 13217: int x = XEiJ.regRn[rrr = XEiJ.regOC & 7]; 13218: int y; 13219: int z; 13220: int t; 13221: XEiJ.mpuCycleCount++; 13222: switch (XEiJ.regOC >> 3 & 0b111_000 >> 3) { 13223: case 0b000_000 >> 3: //ASR.B #<data>,Dr 13224: y = (XEiJ.regOC >> 9) - 1 & 7; //y=data-1=1-1～8-1 13225: XEiJ.regRn[rrr] = ~0xff & x | 0xff & (z = (t = (byte) x >> y) >> 1); 13226: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | -(t & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //XとCは最後に押し出されたビット 13227: break; 13228: case 0b001_000 >> 3: //LSR.B #<data>,Dr 13229: y = (XEiJ.regOC >> 9) - 1 & 7; //y=data-1=1-1～8-1 13230: XEiJ.regRn[rrr] = ~0xff & x | (z = (t = (0xff & x) >>> y) >>> 1); 13231: XEiJ.regCCR = (z == 0 ? XEiJ.REG_CCR_Z : 0) | -(t & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //XとCは最後に押し出されたビット 13232: break; 13233: case 0b010_000 >> 3: //ROXR.B #<data>,Dr 13234: y = (XEiJ.regOC >> 9) - 1 & 7; //y=data-1=1-1～8-1 13235: z = (XEiJ.regCCR & XEiJ.REG_CCR_X) << 7 - 4 | (0xff & x) >>> 1; 13236: if (y == 1 - 1) { //y=data-1=1-1 13237: t = x; 13238: } else { //y=data-1=2-1～8-1 13239: z = x << 9 - 1 - y | (t = z >>> y - (2 - 1)) >>> 1; 13240: } 13241: XEiJ.regRn[rrr] = ~0xff & x | 0xff & (z = (byte) z); 13242: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | -(t & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //XとCは最後に押し出されたビット 13243: break; 13244: case 0b011_000 >> 3: //ROR.B #<data>,Dr 13245: y = XEiJ.regOC >> 9 & 7; //y=data&7 13246: XEiJ.regRn[rrr] = ~0xff & x | 0xff & (z = (byte) (x << 8 - y | (0xff & x) >>> y)); 13247: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | z >>> 7 & 1; //Xは変化しない。Cは結果の最上位ビット 13248: break; 13249: case 0b100_000 >> 3: //ASR.B Dq,Dr 13250: y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63; //y=0～63。Javaのシフト演算子は5ビットでマスクされることに注意 13251: if (y == 0) { //y=data=0 13252: z = (byte) x; 13253: t = XEiJ.regCCR & XEiJ.REG_CCR_X; //Xは変化しない。Cはクリア 13254: } else { //y=data=1～63 13255: XEiJ.regRn[rrr] = ~0xff & x | 0xff & (z = (t = (byte) x >> (y <= 8 ? y - 1 : 7)) >> 1); 13256: t = -(t & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //XとCは最後に押し出されたビット 13257: } 13258: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | t; 13259: break; 13260: case 0b101_000 >> 3: //LSR.B Dq,Dr 13261: y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63; //y=0～63。Javaのシフト演算子は5ビットでマスクされることに注意 13262: if (y == 0) { //y=data=0 13263: z = (byte) x; 13264: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (z < 0 ? XEiJ.REG_CCR_N : z == 0 ? XEiJ.REG_CCR_Z : 0); //Xは変化しない。Cはクリア 13265: } else { //y=data=1～63 13266: XEiJ.regRn[rrr] = ~0xff & x | (z = (t = y <= 8 ? (0xff & x) >>> y - 1 : 0) >>> 1); 13267: XEiJ.regCCR = (z == 0 ? XEiJ.REG_CCR_Z : 0) | -(t & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //XとCは最後に押し出されたビット 13268: } 13269: break; 13270: case 0b110_000 >> 3: //ROXR.B Dq,Dr 13271: y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63; //y=0～63。Javaのシフト演算子は5ビットでマスクされることに注意 13272: //y %= 9; 13273: y = (y & 7) - (y >> 3); //y=data=-7～7 13274: y += y >> 3 & 9; //y=data=0～8 13275: if (y == 0) { //y=data=0 13276: z = (byte) x; 13277: t = -(XEiJ.regCCR >> 4 & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //Xは変化しない。CはXのコピー 13278: } else { //y=data=1～8 13279: z = (XEiJ.regCCR & XEiJ.REG_CCR_X) << 7 - 4 | (0xff & x) >>> 1; 13280: if (y == 1) { //y=data=1 13281: t = x; //Cは最後に押し出されたビット 13282: } else { //y=data=2～8 13283: z = x << 9 - y | (t = z >>> y - 2) >>> 1; 13284: } 13285: XEiJ.regRn[rrr] = ~0xff & x | 0xff & (z = (byte) z); 13286: t = -(t & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //XとCは最後に押し出されたビット 13287: } 13288: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | t; 13289: break; 13290: case 0b111_000 >> 3: //ROR.B Dq,Dr 13291: default: 13292: y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63; //y=0～63。Javaのシフト演算子は5ビットでマスクされることに注意 13293: if (y == 0) { 13294: z = (byte) x; 13295: t = 0; //Cはクリア 13296: } else { 13297: y &= 7; //y=data=0～7 13298: XEiJ.regRn[rrr] = ~0xff & x | 0xff & (z = (byte) (x << 8 - y | (0xff & x) >>> y)); 13299: t = z >>> 7 & 1; //Cは結果の最上位ビット 13300: } 13301: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | t; //Xは変化しない 13302: } 13303: } //irpXxrToRegByte 13304: 13305: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 13306: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 13307: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 13308: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 13309: //ASR.W #<data>,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_001_000_rrr 13310: //LSR.W #<data>,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_001_001_rrr 13311: //ROXR.W #<data>,Dr |-|012346|-|*UUUU|***0*| |1110_qqq_001_010_rrr 13312: //ROR.W #<data>,Dr |-|012346|-|-UUUU|-**0*| |1110_qqq_001_011_rrr 13313: //ASR.W Dq,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_001_100_rrr 13314: //LSR.W Dq,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_001_101_rrr 13315: //ROXR.W Dq,Dr |-|012346|-|*UUUU|***0*| |1110_qqq_001_110_rrr 13316: //ROR.W Dq,Dr |-|012346|-|-UUUU|-**0*| |1110_qqq_001_111_rrr 13317: //ASR.W Dr |A|012346|-|UUUUU|***0*| |1110_001_001_000_rrr [ASR.W #1,Dr] 13318: //LSR.W Dr |A|012346|-|UUUUU|***0*| |1110_001_001_001_rrr [LSR.W #1,Dr] 13319: //ROXR.W Dr |A|012346|-|*UUUU|***0*| |1110_001_001_010_rrr [ROXR.W #1,Dr] 13320: //ROR.W Dr |A|012346|-|-UUUU|-**0*| |1110_001_001_011_rrr [ROR.W #1,Dr] 13321: // 13322: //ASR.W #<data>,Dr 13323: //ASR.W Dq,Dr 13324: //ASR.W <ea> 13325: // 算術右シフトワード 13326: // ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ XNZVC 13327: // 0 ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ Xｱ*00 Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0 13328: // 1 ................ｱｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿ ﾀｱ*0ﾀ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿ==0 13329: // : 13330: // 15 ................ｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱ ｲｱ*0ｲ Z=ｱ==0 13331: // 16 ................ｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱ ｱｱ*0ｱ Z=ｱ==0 13332: // CCR 13333: // X countが0のとき変化しない。他は最後に押し出されたビット 13334: // N 結果の最上位ビット 13335: // Z 結果が0のときセット。他はクリア 13336: // V 常にクリア 13337: // C countが0のときクリア。他は最後に押し出されたビット 13338: // 13339: //LSR.W #<data>,Dr 13340: //LSR.W Dq,Dr 13341: //LSR.W <ea> 13342: // 論理右シフトワード 13343: // ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ XNZVC 13344: // 0 ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ Xｱ*00 Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0 13345: // 1 ................0ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿ ﾀ0*0ﾀ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿ==0 13346: // : 13347: // 15 ................000000000000000ｱ ｲ0*0ｲ Z=ｱ==0 13348: // 16 ................0000000000000000 ｱ010ｱ 13349: // 17 ................0000000000000000 00100 13350: // CCR 13351: // X countが0のとき変化しない。他は最後に押し出されたビット 13352: // N 結果の最上位ビット 13353: // Z 結果が0のときセット。他はクリア 13354: // V 常にクリア 13355: // C countが0のときクリア。他は最後に押し出されたビット 13356: // 13357: //ROR.W #<data>,Dr 13358: //ROR.W Dq,Dr 13359: //ROR.W <ea> 13360: // 右ローテートワード 13361: // ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ XNZVC 13362: // 0 ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ Xｱ*00 Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0 13363: // 1 ................ﾀｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿ Xﾀ*0ﾀ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0 13364: // : 13365: // 15 ................ｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀｱ Xｲ*0ｲ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0 13366: // 16 ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ Xｱ*0ｱ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0 13367: // CCR 13368: // X 常に変化しない 13369: // N 結果の最上位ビット 13370: // Z 結果が0のときセット。他はクリア 13371: // V 常にクリア 13372: // C countが0のときクリア。他は結果の最上位ビット 13373: // 13374: //ROXR.W #<data>,Dr 13375: //ROXR.W Dq,Dr 13376: //ROXR.W <ea> 13377: // 拡張右ローテートワード 13378: // ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ XNZVC 13379: // 0 ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ Xｱ*0X Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0 13380: // 1 ................Xｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿ ﾀX*0ﾀ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿX==0 13381: // 2 ................ﾀXｱｲｳｴｵｶｷｸｹｺｻｼｽｾ ｿﾀ*0ｿ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾﾀX==0 13382: // : 13383: // 15 ................ｳｴｵｶｷｸｹｺｻｼｽｾｿﾀXｱ ｲｳ*0ｲ Z=ｱｳｴｵｶｷｸｹｺｻｼｽｾｿﾀX==0 13384: // 16 ................ｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀX ｱｲ*0ｱ Z=ｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀX==0 13385: // 17 ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ Xｱ*0X Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0 13386: // CCR 13387: // X countが0のとき変化しない。他は最後に押し出されたビット 13388: // N 結果の最上位ビット 13389: // Z 結果が0のときセット。他はクリア 13390: // V 常にクリア 13391: // C countが0のときXのコピー。他は最後に押し出されたビット 13392: public static void irpXxrToRegWord () throws M68kException { 13393: int rrr; 13394: int x = XEiJ.regRn[rrr = XEiJ.regOC & 7]; 13395: int y; 13396: int z; 13397: int t; 13398: XEiJ.mpuCycleCount++; 13399: switch (XEiJ.regOC >> 3 & 0b111_000 >> 3) { 13400: case 0b000_000 >> 3: //ASR.W #<data>,Dr 13401: y = (XEiJ.regOC >> 9) - 1 & 7; //y=data-1=1-1～8-1 13402: XEiJ.regRn[rrr] = ~0xffff & x | (char) (z = (t = (short) x >> y) >> 1); 13403: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | -(t & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //XとCは最後に押し出されたビット 13404: break; 13405: case 0b001_000 >> 3: //LSR.W #<data>,Dr 13406: y = (XEiJ.regOC >> 9) - 1 & 7; //y=data-1=1-1～8-1 13407: XEiJ.regRn[rrr] = ~0xffff & x | (z = (t = (char) x >>> y) >>> 1); 13408: XEiJ.regCCR = (z == 0 ? XEiJ.REG_CCR_Z : 0) | -(t & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //XとCは最後に押し出されたビット 13409: break; 13410: case 0b010_000 >> 3: //ROXR.W #<data>,Dr 13411: y = (XEiJ.regOC >> 9) - 1 & 7; //y=data-1=1-1～8-1 13412: z = (XEiJ.regCCR & XEiJ.REG_CCR_X) << 15 - 4 | (char) x >>> 1; 13413: if (y == 1 - 1) { //y=data-1=1-1 13414: t = x; 13415: } else { //y=data-1=2-1～8-1 13416: z = x << 17 - 1 - y | (t = z >>> y - (2 - 1)) >>> 1; 13417: } 13418: XEiJ.regRn[rrr] = ~0xffff & x | (char) (z = (short) z); 13419: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | -(t & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //XとCは最後に押し出されたビット 13420: break; 13421: case 0b011_000 >> 3: //ROR.W #<data>,Dr 13422: y = (XEiJ.regOC >> 9) - 1 & 7; //y=data-1=1-1～8-1 13423: XEiJ.regRn[rrr] = ~0xffff & x | (char) (z = (short) (x << 16 - 1 - y | (char) x >>> y + 1)); 13424: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | z >>> 15 & 1; //Xは変化しない。Cは結果の最上位ビット 13425: break; 13426: case 0b100_000 >> 3: //ASR.W Dq,Dr 13427: y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63; //y=0～63。Javaのシフト演算子は5ビットでマスクされることに注意 13428: if (y == 0) { //y=data=0 13429: z = (short) x; 13430: t = XEiJ.regCCR & XEiJ.REG_CCR_X; //Xは変化しない。Cはクリア 13431: } else { //y=data=1～63 13432: XEiJ.regRn[rrr] = ~0xffff & x | (char) (z = (t = (short) x >> (y <= 16 ? y - 1 : 15)) >> 1); 13433: t = -(t & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //XとCは最後に押し出されたビット 13434: } 13435: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | t; 13436: break; 13437: case 0b101_000 >> 3: //LSR.W Dq,Dr 13438: y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63; //y=0～63。Javaのシフト演算子は5ビットでマスクされることに注意 13439: if (y == 0) { //y=data=0 13440: z = (short) x; 13441: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (z < 0 ? XEiJ.REG_CCR_N : z == 0 ? XEiJ.REG_CCR_Z : 0); //Xは変化しない。Cはクリア 13442: } else { //y=data=1～63 13443: XEiJ.regRn[rrr] = ~0xffff & x | (z = (t = y <= 16 ? (char) x >>> y - 1 : 0) >>> 1); 13444: XEiJ.regCCR = (z == 0 ? XEiJ.REG_CCR_Z : 0) | -(t & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //XとCは最後に押し出されたビット 13445: } 13446: break; 13447: case 0b110_000 >> 3: //ROXR.W Dq,Dr 13448: y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63; //y=0～63。Javaのシフト演算子は5ビットでマスクされることに注意 13449: //y %= 17; 13450: y = (y & 15) - (y >> 4); //y=data=-3～15 13451: y += y >> 4 & 17; //y=data=0～16 13452: if (y == 0) { //y=data=0 13453: z = (short) x; 13454: t = -(XEiJ.regCCR >> 4 & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //Xは変化しない。CはXのコピー 13455: } else { //y=data=1～16 13456: z = (XEiJ.regCCR & XEiJ.REG_CCR_X) << 15 - 4 | (char) x >>> 1; 13457: if (y == 1) { //y=data=1 13458: t = x; //Cは最後に押し出されたビット 13459: } else { //y=data=2～16 13460: z = x << 17 - y | (t = z >>> y - 2) >>> 1; 13461: } 13462: XEiJ.regRn[rrr] = ~0xffff & x | (char) (z = (short) z); 13463: t = -(t & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //XとCは最後に押し出されたビット 13464: } 13465: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | t; 13466: break; 13467: case 0b111_000 >> 3: //ROR.W Dq,Dr 13468: default: 13469: y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63; //y=0～63。Javaのシフト演算子は5ビットでマスクされることに注意 13470: if (y == 0) { 13471: z = (short) x; 13472: t = 0; //Cはクリア 13473: } else { 13474: y &= 15; //y=data=0～15 13475: XEiJ.regRn[rrr] = ~0xffff & x | (char) (z = (short) (x << 16 - y | (char) x >>> y)); 13476: t = z >>> 15 & 1; //Cは結果の最上位ビット 13477: } 13478: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | t; //Xは変化しない 13479: } 13480: } //irpXxrToRegWord 13481: 13482: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 13483: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 13484: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 13485: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 13486: //ASR.L #<data>,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_010_000_rrr 13487: //LSR.L #<data>,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_010_001_rrr 13488: //ROXR.L #<data>,Dr |-|012346|-|*UUUU|***0*| |1110_qqq_010_010_rrr 13489: //ROR.L #<data>,Dr |-|012346|-|-UUUU|-**0*| |1110_qqq_010_011_rrr 13490: //ASR.L Dq,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_010_100_rrr 13491: //LSR.L Dq,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_010_101_rrr 13492: //ROXR.L Dq,Dr |-|012346|-|*UUUU|***0*| |1110_qqq_010_110_rrr 13493: //ROR.L Dq,Dr |-|012346|-|-UUUU|-**0*| |1110_qqq_010_111_rrr 13494: //ASR.L Dr |A|012346|-|UUUUU|***0*| |1110_001_010_000_rrr [ASR.L #1,Dr] 13495: //LSR.L Dr |A|012346|-|UUUUU|***0*| |1110_001_010_001_rrr [LSR.L #1,Dr] 13496: //ROXR.L Dr |A|012346|-|*UUUU|***0*| |1110_001_010_010_rrr [ROXR.L #1,Dr] 13497: //ROR.L Dr |A|012346|-|-UUUU|-**0*| |1110_001_010_011_rrr [ROR.L #1,Dr] 13498: // 13499: //ASR.L #<data>,Dr 13500: //ASR.L Dq,Dr 13501: // 算術右シフトロング 13502: // ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ XNZVC 13503: // 0 ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ Xｱ*00 Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ==0 13504: // 1 ｱｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏ ﾐｱ*0ﾐ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏ==0 13505: // : 13506: // 31 ｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱ ｲｱ*0ｲ Z=ｱ==0 13507: // 32 ｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱ ｱｱ*0ｱ Z=ｱ==0 13508: // CCR 13509: // X countが0のとき変化しない。他は最後に押し出されたビット 13510: // N 結果の最上位ビット 13511: // Z 結果が0のときセット。他はクリア 13512: // V 常にクリア 13513: // C countが0のときクリア。他は最後に押し出されたビット 13514: // 13515: //LSR.L #<data>,Dr 13516: //LSR.L Dq,Dr 13517: // 論理右シフトロング 13518: // ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ XNZVC 13519: // 0 ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ Xｱ*00 Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ==0 13520: // 1 0ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏ ﾐ0*0ﾐ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏ==0 13521: // : 13522: // 31 0000000000000000000000000000000ｱ ｲ0*0ｲ Z=ｱ==0 13523: // 32 00000000000000000000000000000000 ｱ010ｱ 13524: // 33 00000000000000000000000000000000 00100 13525: // CCR 13526: // X countが0のとき変化しない。他は最後に押し出されたビット 13527: // N 結果の最上位ビット 13528: // Z 結果が0のときセット。他はクリア 13529: // V 常にクリア 13530: // C countが0のときクリア。他は最後に押し出されたビット 13531: // 13532: //ROR.L #<data>,Dr 13533: //ROR.L Dq,Dr 13534: // 右ローテートロング 13535: // ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ XNZVC 13536: // 0 ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ Xｱ*00 Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ==0 13537: // 1 ﾐｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏ Xﾐ*0ﾐ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ==0 13538: // : 13539: // 31 ｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐｱ Xｲ*0ｲ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ==0 13540: // 32 ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ Xｱ*0ｱ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ==0 13541: // CCR 13542: // X 常に変化しない 13543: // N 結果の最上位ビット 13544: // Z 結果が0のときセット。他はクリア 13545: // V 常にクリア 13546: // C countが0のときクリア。他は結果の最上位ビット 13547: // 13548: //ROXR.L #<data>,Dr 13549: //ROXR.L Dq,Dr 13550: // 拡張右ローテートロング 13551: // ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ XNZVC 13552: // 0 ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ Xｱ*0X Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ==0 13553: // 1 Xｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏ ﾐX*0ﾐ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏX==0 13554: // 2 ﾐXｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎ ﾏﾐ*0ﾏ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾐX==0 13555: // : 13556: // 31 ｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐXｱ ｲｳ*0ｲ Z=ｱｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐX==0 13557: // 32 ｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐX ｱｲ*0ｱ Z=ｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐX==0 13558: // 33 ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ Xｱ*0X Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ==0 13559: // CCR 13560: // X countが0のとき変化しない。他は最後に押し出されたビット 13561: // N 結果の最上位ビット 13562: // Z 結果が0のときセット。他はクリア 13563: // V 常にクリア 13564: // C countが0のときXのコピー。他は最後に押し出されたビット 13565: public static void irpXxrToRegLong () throws M68kException { 13566: int rrr; 13567: int x = XEiJ.regRn[rrr = XEiJ.regOC & 7]; 13568: int y; 13569: int z; 13570: int t; 13571: XEiJ.mpuCycleCount++; 13572: switch (XEiJ.regOC >> 3 & 0b111_000 >> 3) { 13573: case 0b000_000 >> 3: //ASR.L #<data>,Dr 13574: y = (XEiJ.regOC >> 9) - 1 & 7; //y=data-1=1-1～8-1 13575: XEiJ.regRn[rrr] = z = (t = x >> y) >> 1; 13576: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | -(t & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //XとCは最後に押し出されたビット 13577: break; 13578: case 0b001_000 >> 3: //LSR.L #<data>,Dr 13579: y = (XEiJ.regOC >> 9) - 1 & 7; //y=data-1=1-1～8-1 13580: XEiJ.regRn[rrr] = z = (t = x >>> y) >>> 1; 13581: XEiJ.regCCR = (z == 0 ? XEiJ.REG_CCR_Z : 0) | -(t & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //XとCは最後に押し出されたビット 13582: break; 13583: case 0b010_000 >> 3: //ROXR.L #<data>,Dr 13584: y = (XEiJ.regOC >> 9) - 1 & 7; //y=data-1=1-1～8-1 13585: z = (XEiJ.regCCR & XEiJ.REG_CCR_X) << 31 - 4 | x >>> 1; 13586: if (y == 1 - 1) { //y=data-1=1-1 13587: t = x; 13588: } else { //y=data-1=2-1～8-1 13589: z = x << -y | (t = z >>> y - (2 - 1)) >>> 1; //Javaのシフト演算子は5ビットでマスクされるので33-1-yを-yに省略 13590: } 13591: XEiJ.regRn[rrr] = z; 13592: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | -(t & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //XとCは最後に押し出されたビット 13593: break; 13594: case 0b011_000 >> 3: //ROR.L #<data>,Dr 13595: y = (XEiJ.regOC >> 9) - 1 & 7; //y=data-1=1-1～8-1 13596: XEiJ.regRn[rrr] = z = x << ~y | x >>> y + 1; //Javaのシフト演算子は5ビットでマスクされるので32-1-yを~yに省略 13597: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | z >>> 31; //Xは変化しない。Cは結果の最上位ビット 13598: break; 13599: case 0b100_000 >> 3: //ASR.L Dq,Dr 13600: y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63; //y=0～63。Javaのシフト演算子は5ビットでマスクされることに注意 13601: if (y == 0) { //y=data=0 13602: z = x; 13603: t = XEiJ.regCCR & XEiJ.REG_CCR_X; //Xは変化しない。Cはクリア 13604: } else { //y=data=1～63 13605: XEiJ.regRn[rrr] = z = (t = x >> (y <= 32 ? y - 1 : 31)) >> 1; 13606: t = -(t & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //XとCは最後に押し出されたビット 13607: } 13608: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | t; 13609: break; 13610: case 0b101_000 >> 3: //LSR.L Dq,Dr 13611: y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63; //y=0～63。Javaのシフト演算子は5ビットでマスクされることに注意 13612: if (y == 0) { //y=data=0 13613: z = x; 13614: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (z < 0 ? XEiJ.REG_CCR_N : z == 0 ? XEiJ.REG_CCR_Z : 0); //Xは変化しない。Cはクリア 13615: } else { //y=data=1～63 13616: XEiJ.regRn[rrr] = z = (t = y <= 32 ? x >>> y - 1 : 0) >>> 1; 13617: XEiJ.regCCR = (z == 0 ? XEiJ.REG_CCR_Z : 0) | -(t & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //XとCは最後に押し出されたビット 13618: } 13619: break; 13620: case 0b110_000 >> 3: //ROXR.L Dq,Dr 13621: y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63; //y=0～63。Javaのシフト演算子は5ビットでマスクされることに注意 13622: //y %= 33; 13623: y -= 32 - y >> 6 & 33; //y=data=0～32 13624: if (y == 0) { //y=data=0 13625: z = x; 13626: t = -(XEiJ.regCCR >> 4 & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //Xは変化しない。CはXのコピー 13627: } else { //y=data=1～32 13628: z = (XEiJ.regCCR & XEiJ.REG_CCR_X) << 31 - 4 | x >>> 1; 13629: if (y == 1) { //y=data=1 13630: t = x; //Cは最後に押し出されたビット 13631: } else { //y=data=2～32 13632: z = x << 33 - y | (t = z >>> y - 2) >>> 1; 13633: } 13634: XEiJ.regRn[rrr] = z; 13635: t = -(t & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //XとCは最後に押し出されたビット 13636: } 13637: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | t; 13638: break; 13639: case 0b111_000 >> 3: //ROR.L Dq,Dr 13640: default: 13641: y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63; //y=0～63。Javaのシフト演算子は5ビットでマスクされることに注意 13642: if (y == 0) { 13643: z = x; 13644: t = 0; //Cはクリア 13645: } else { 13646: y &= 31; //y=data=0～31 13647: XEiJ.regRn[rrr] = z = x << -y | x >>> y; //Javaのシフト演算子は5ビットでマスクされるので32-yを-yに省略。y=32のときx|xになるが問題ない 13648: t = z >>> 31; //Cは結果の最上位ビット 13649: } 13650: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | t; //Xは変化しない 13651: } 13652: } //irpXxrToRegLong 13653: 13654: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 13655: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 13656: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 13657: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 13658: //ASR.W <ea> |-|012346|-|UUUUU|***0*| M+-WXZ |1110_000_011_mmm_rrr 13659: // 13660: //ASR.W #<data>,Dr 13661: //ASR.W Dq,Dr 13662: //ASR.W <ea> 13663: // 算術右シフトワード 13664: // ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ XNZVC 13665: // 0 ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ Xｱ*00 Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0 13666: // 1 ................ｱｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿ ﾀｱ*0ﾀ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿ==0 13667: // : 13668: // 15 ................ｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱ ｲｱ*0ｲ Z=ｱ==0 13669: // 16 ................ｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱ ｱｱ*0ｱ Z=ｱ==0 13670: // CCR 13671: // X countが0のとき変化しない。他は最後に押し出されたビット 13672: // N 結果の最上位ビット 13673: // Z 結果が0のときセット。他はクリア 13674: // V 常にクリア 13675: // C countが0のときクリア。他は最後に押し出されたビット 13676: public static void irpAsrToMem () throws M68kException { 13677: XEiJ.mpuCycleCount++; 13678: int ea = XEiJ.regOC & 63; 13679: int a = efaMltWord (ea); 13680: int x = mmuModifyWordSignData (a, XEiJ.regSRS); 13681: int z = x >> 1; 13682: mmuWriteWordData (a, z, XEiJ.regSRS); 13683: XEiJ.regCCR = ((z < 0 ? XEiJ.REG_CCR_N : 0) | 13684: (z == 0 ? XEiJ.REG_CCR_Z : 0) | 13685: -(x & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //XとCは最後に押し出されたビット 13686: } //irpAsrToMem 13687: 13688: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 13689: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 13690: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 13691: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 13692: //ASL.B #<data>,Dr |-|012346|-|UUUUU|*****| |1110_qqq_100_000_rrr 13693: //LSL.B #<data>,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_100_001_rrr 13694: //ROXL.B #<data>,Dr |-|012346|-|*UUUU|***0*| |1110_qqq_100_010_rrr 13695: //ROL.B #<data>,Dr |-|012346|-|-UUUU|-**0*| |1110_qqq_100_011_rrr 13696: //ASL.B Dq,Dr |-|012346|-|UUUUU|*****| |1110_qqq_100_100_rrr 13697: //LSL.B Dq,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_100_101_rrr 13698: //ROXL.B Dq,Dr |-|012346|-|*UUUU|***0*| |1110_qqq_100_110_rrr 13699: //ROL.B Dq,Dr |-|012346|-|-UUUU|-**0*| |1110_qqq_100_111_rrr 13700: //ASL.B Dr |A|012346|-|UUUUU|*****| |1110_001_100_000_rrr [ASL.B #1,Dr] 13701: //LSL.B Dr |A|012346|-|UUUUU|***0*| |1110_001_100_001_rrr [LSL.B #1,Dr] 13702: //ROXL.B Dr |A|012346|-|*UUUU|***0*| |1110_001_100_010_rrr [ROXL.B #1,Dr] 13703: //ROL.B Dr |A|012346|-|-UUUU|-**0*| |1110_001_100_011_rrr [ROL.B #1,Dr] 13704: // 13705: //ASL.B #<data>,Dr 13706: //ASL.B Dq,Dr 13707: // 算術左シフトバイト 13708: // ........................ｱｲｳｴｵｶｷｸ XNZVC 13709: // 0 ........................ｱｲｳｴｵｶｷｸ Xｱ*00 Z=ｱｲｳｴｵｶｷｸ==0 13710: // 1 ........................ｲｳｴｵｶｷｸ0 ｱｲ**ｱ Z=ｲｳｴｵｶｷｸ==0,V=ｱｲ!=0/-1 13711: // : 13712: // 7 ........................ｸ0000000 ｷｸ**ｷ Z=ｸ==0,V=ｱｲｳｴｵｶｷｸ!=0/-1 13713: // 8 ........................00000000 ｸ01*ｸ V=ｱｲｳｴｵｶｷｸ!=0 13714: // 9 ........................00000000 001*0 V=ｱｲｳｴｵｶｷｸ!=0 13715: // CCR 13716: // X countが0のとき変化しない。他は最後に押し出されたビット 13717: // N 結果の最上位ビット 13718: // Z 結果が0のときセット。他はクリア 13719: // V ASRで元に戻せないときセット。他はクリア 13720: // C countが0のときクリア。他は最後に押し出されたビット 13721: // 13722: //LSL.B #<data>,Dr 13723: //LSL.B Dq,Dr 13724: // 論理左シフトバイト 13725: // ........................ｱｲｳｴｵｶｷｸ XNZVC 13726: // 0 ........................ｱｲｳｴｵｶｷｸ Xｱ*00 Z=ｱｲｳｴｵｶｷｸ==0 13727: // 1 ........................ｲｳｴｵｶｷｸ0 ｱｲ*0ｱ Z=ｲｳｴｵｶｷｸ==0 13728: // : 13729: // 7 ........................ｸ0000000 ｷｸ*0ｷ Z=ｸ==0 13730: // 8 ........................00000000 ｸ010ｸ 13731: // 9 ........................00000000 00100 13732: // CCR 13733: // X countが0のとき変化しない。他は最後に押し出されたビット 13734: // N 結果の最上位ビット 13735: // Z 結果が0のときセット。他はクリア 13736: // V 常にクリア 13737: // C countが0のときクリア。他は最後に押し出されたビット 13738: // 13739: //ROL.B #<data>,Dr 13740: //ROL.B Dq,Dr 13741: // 左ローテートバイト 13742: // ........................ｱｲｳｴｵｶｷｸ XNZVC 13743: // 0 ........................ｱｲｳｴｵｶｷｸ Xｱ*00 Z=ｱｲｳｴｵｶｷｸ==0 13744: // 1 ........................ｲｳｴｵｶｷｸｱ Xｲ*0ｱ Z=ｱｲｳｴｵｶｷｸ==0 13745: // : 13746: // 7 ........................ｸｱｲｳｴｵｶｷ Xｸ*0ｷ Z=ｱｲｳｴｵｶｷｸ==0 13747: // 8 ........................ｱｲｳｴｵｶｷｸ Xｱ*0ｸ Z=ｱｲｳｴｵｶｷｸ==0 13748: // CCR 13749: // X 常に変化しない 13750: // N 結果の最上位ビット 13751: // Z 結果が0のときセット。他はクリア 13752: // V 常にクリア 13753: // C countが0のときクリア。他は結果の最下位ビット 13754: // 13755: //ROXL.B #<data>,Dr 13756: //ROXL.B Dq,Dr 13757: // 拡張左ローテートバイト 13758: // ........................ｱｲｳｴｵｶｷｸ XNZVC 13759: // 0 ........................ｱｲｳｴｵｶｷｸ Xｱ*0X Z=ｱｲｳｴｵｶｷｸ==0 13760: // 1 ........................ｲｳｴｵｶｷｸX ｱｲ*0ｱ Z=ｲｳｴｵｶｷｸX==0 13761: // 2 ........................ｳｴｵｶｷｸXｱ ｲｳ*0ｲ Z=ｱｳｴｵｶｷｸX==0 13762: // : 13763: // 7 ........................ｸXｱｲｳｴｵｶ ｷｸ*0ｷ Z=ｱｲｳｴｵｶｸX==0 13764: // 8 ........................Xｱｲｳｴｵｶｷ ｸX*0ｸ Z=ｱｲｳｴｵｶｷX==0 13765: // 9 ........................ｱｲｳｴｵｶｷｸ Xｱ*0X Z=ｱｲｳｴｵｶｷｸ==0 13766: // CCR 13767: // X countが0のとき変化しない。他は最後に押し出されたビット 13768: // N 結果の最上位ビット 13769: // Z 結果が0のときセット。他はクリア 13770: // V 常にクリア 13771: // C countが0のときXのコピー。他は最後に押し出されたビット 13772: public static void irpXxlToRegByte () throws M68kException { 13773: int rrr; 13774: int x = XEiJ.regRn[rrr = XEiJ.regOC & 7]; 13775: int y; 13776: int z; 13777: int t; 13778: XEiJ.mpuCycleCount++; 13779: switch (XEiJ.regOC >> 3 & 0b111_000 >> 3) { 13780: case 0b000_000 >> 3: //ASL.B #<data>,Dr 13781: y = (XEiJ.regOC >> 9) - 1 & 7; //y=data-1=1-1～8-1 13782: XEiJ.regRn[rrr] = ~0xff & x | 0xff & (z = (byte) ((t = x << y) << 1)); 13783: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | (z >> y + 1 != (byte) x ? XEiJ.REG_CCR_V : 0) | (byte) t >> 7 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //VはASRで元に戻せないときセット。XとCは最後に押し出されたビット 13784: break; 13785: case 0b001_000 >> 3: //LSL.B #<data>,Dr 13786: y = (XEiJ.regOC >> 9) - 1 & 7; //y=data-1=1-1～8-1 13787: XEiJ.regRn[rrr] = ~0xff & x | 0xff & (z = (byte) ((t = x << y) << 1)); 13788: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | (byte) t >> 7 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //XとCは最後に押し出されたビット 13789: break; 13790: case 0b010_000 >> 3: //ROXL.B #<data>,Dr 13791: y = (XEiJ.regOC >> 9) - 1 & 7; //y=data-1=1-1～8-1 13792: z = x << 1 | XEiJ.regCCR >> 4 & 1; 13793: if (y == 1 - 1) { //y=data-1=1-1 13794: t = x; 13795: } else { //y=data-1=2-1～8-1 13796: z = (t = z << y - (2 - 1)) << 1 | (0xff & x) >>> 9 - 1 - y; 13797: } 13798: XEiJ.regRn[rrr] = ~0xff & x | 0xff & (z = (byte) z); 13799: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | (byte) t >> 7 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //XとCは最後に押し出されたビット 13800: break; 13801: case 0b011_000 >> 3: //ROL.B #<data>,Dr 13802: y = XEiJ.regOC >> 9 & 7; //y=data&7 13803: XEiJ.regRn[rrr] = ~0xff & x | 0xff & (z = (byte) (x << y | (0xff & x) >>> 8 - y)); 13804: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | z & 1; //Xは変化しない。Cは結果の最下位ビット 13805: break; 13806: case 0b100_000 >> 3: //ASL.B Dq,Dr 13807: y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63; //y=0～63。Javaのシフト演算子は5ビットでマスクされることに注意 13808: if (y <= 7) { //y=data=0～7 13809: if (y == 0) { //y=data=0 13810: z = (byte) x; 13811: t = XEiJ.regCCR & XEiJ.REG_CCR_X; //Xは変化しない。VとCはクリア 13812: } else { //y=data=1～7 13813: XEiJ.regRn[rrr] = ~0xff & x | 0xff & (z = (byte) ((t = x << y - 1) << 1)); 13814: t = (z >> y != (byte) x ? XEiJ.REG_CCR_V : 0) | (byte) t >> 7 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //VはASRで元に戻せないときセット。XとCは最後に押し出されたビット 13815: } 13816: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | t; 13817: } else { //y=data=8～63 13818: XEiJ.regRn[rrr] = ~0xff & x; 13819: XEiJ.regCCR = XEiJ.REG_CCR_Z | ((byte) x != 0 ? XEiJ.REG_CCR_V : 0) | (y == 8 ? -(x & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C) : 0); 13820: } 13821: break; 13822: case 0b101_000 >> 3: //LSL.B Dq,Dr 13823: y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63; //y=0～63。Javaのシフト演算子は5ビットでマスクされることに注意 13824: if (y == 0) { //y=data=0 13825: z = (byte) x; 13826: t = XEiJ.regCCR & XEiJ.REG_CCR_X; //Xは変化しない。Cはクリア 13827: } else { //y=data=1～63 13828: XEiJ.regRn[rrr] = ~0xff & x | 0xff & (z = (byte) ((t = y <= 8 ? x << y - 1 : 0) << 1)); 13829: t = (byte) t >> 7 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //XとCは最後に押し出されたビット 13830: } 13831: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | t; 13832: break; 13833: case 0b110_000 >> 3: //ROXL.B Dq,Dr 13834: y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63; //y=0～63。Javaのシフト演算子は5ビットでマスクされることに注意 13835: //y %= 9; 13836: y = (y & 7) - (y >> 3); //y=data=-7～7 13837: y += y >> 3 & 9; //y=data=0～8 13838: if (y == 0) { //y=data=0 13839: z = (byte) x; 13840: t = -(XEiJ.regCCR >> 4 & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //Xは変化しない。CはXのコピー 13841: } else { //y=data=1～8 13842: z = x << 1 | XEiJ.regCCR >> 4 & 1; 13843: if (y == 1) { //y=data=1 13844: t = x; //Cは最後に押し出されたビット 13845: } else { //y=data=2～8 13846: z = (t = z << y - 2) << 1 | (0xff & x) >>> 9 - y; 13847: } 13848: XEiJ.regRn[rrr] = ~0xff & x | 0xff & (z = (byte) z); 13849: t = (byte) t >> 7 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //XとCは最後に押し出されたビット 13850: } 13851: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | t; 13852: break; 13853: case 0b111_000 >> 3: //ROL.B Dq,Dr 13854: default: 13855: y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63; //y=0～63。Javaのシフト演算子は5ビットでマスクされることに注意 13856: if (y == 0) { 13857: z = (byte) x; 13858: t = 0; //Cはクリア 13859: } else { 13860: y &= 7; //y=data=0～7 13861: XEiJ.regRn[rrr] = ~0xff & x | 0xff & (z = (byte) (x << y | (0xff & x) >>> 8 - y)); 13862: t = z & 1; //Cは結果の最下位ビット 13863: } 13864: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | t; //Xは変化しない 13865: } 13866: } //irpXxlToRegByte 13867: 13868: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 13869: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 13870: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 13871: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 13872: //ASL.W #<data>,Dr |-|012346|-|UUUUU|*****| |1110_qqq_101_000_rrr 13873: //LSL.W #<data>,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_101_001_rrr 13874: //ROXL.W #<data>,Dr |-|012346|-|*UUUU|***0*| |1110_qqq_101_010_rrr 13875: //ROL.W #<data>,Dr |-|012346|-|-UUUU|-**0*| |1110_qqq_101_011_rrr 13876: //ASL.W Dq,Dr |-|012346|-|UUUUU|*****| |1110_qqq_101_100_rrr 13877: //LSL.W Dq,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_101_101_rrr 13878: //ROXL.W Dq,Dr |-|012346|-|*UUUU|***0*| |1110_qqq_101_110_rrr 13879: //ROL.W Dq,Dr |-|012346|-|-UUUU|-**0*| |1110_qqq_101_111_rrr 13880: //ASL.W Dr |A|012346|-|UUUUU|*****| |1110_001_101_000_rrr [ASL.W #1,Dr] 13881: //LSL.W Dr |A|012346|-|UUUUU|***0*| |1110_001_101_001_rrr [LSL.W #1,Dr] 13882: //ROXL.W Dr |A|012346|-|*UUUU|***0*| |1110_001_101_010_rrr [ROXL.W #1,Dr] 13883: //ROL.W Dr |A|012346|-|-UUUU|-**0*| |1110_001_101_011_rrr [ROL.W #1,Dr] 13884: // 13885: //ASL.W #<data>,Dr 13886: //ASL.W Dq,Dr 13887: //ASL.W <ea> 13888: // 算術左シフトワード 13889: // ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ XNZVC 13890: // 0 ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ Xｱ*00 Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0 13891: // 1 ................ｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ0 ｱｲ**ｱ Z=ｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0,V=ｱｲ!=0/-1 13892: // : 13893: // 15 ................ﾀ000000000000000 ｿﾀ**ｿ Z=ﾀ==0,V=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ!=0/-1 13894: // 16 ................0000000000000000 ﾀ01*ﾀ V=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ!=0 13895: // 17 ................0000000000000000 001*0 V=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ!=0 13896: // CCR 13897: // X countが0のとき変化しない。他は最後に押し出されたビット 13898: // N 結果の最上位ビット 13899: // Z 結果が0のときセット。他はクリア 13900: // V ASRで元に戻せないときセット。他はクリア 13901: // C countが0のときクリア。他は最後に押し出されたビット 13902: // 13903: //LSL.W #<data>,Dr 13904: //LSL.W Dq,Dr 13905: //LSL.W <ea> 13906: // 論理左シフトワード 13907: // ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ XNZVC 13908: // 0 ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ Xｱ*00 Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0 13909: // 1 ................ｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ0 ｱｲ*0ｱ Z=ｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0 13910: // : 13911: // 15 ................ﾀ000000000000000 ｿﾀ*0ｿ Z=ﾀ==0 13912: // 16 ................0000000000000000 ﾀ010ﾀ 13913: // 17 ................0000000000000000 00100 13914: // CCR 13915: // X countが0のとき変化しない。他は最後に押し出されたビット 13916: // N 結果の最上位ビット 13917: // Z 結果が0のときセット。他はクリア 13918: // V 常にクリア 13919: // C countが0のときクリア。他は最後に押し出されたビット 13920: // 13921: //ROL.W #<data>,Dr 13922: //ROL.W Dq,Dr 13923: //ROL.W <ea> 13924: // 左ローテートワード 13925: // ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ XNZVC 13926: // 0 ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ Xｱ*00 Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0 13927: // 1 ................ｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀｱ Xｲ*0ｱ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0 13928: // : 13929: // 15 ................ﾀｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿ Xﾀ*0ｿ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0 13930: // 16 ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ Xｱ*0ﾀ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0 13931: // CCR 13932: // X 常に変化しない 13933: // N 結果の最上位ビット 13934: // Z 結果が0のときセット。他はクリア 13935: // V 常にクリア 13936: // C countが0のときクリア。他は結果の最下位ビット 13937: // 13938: //ROXL.W #<data>,Dr 13939: //ROXL.W Dq,Dr 13940: //ROXL.W <ea> 13941: // 拡張左ローテートワード 13942: // ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ XNZVC 13943: // 0 ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ Xｱ*0X Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0 13944: // 1 ................ｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀX ｱｲ*0ｱ Z=ｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀX==0 13945: // 2 ................ｳｴｵｶｷｸｹｺｻｼｽｾｿﾀXｱ ｲｳ*0ｲ Z=ｱｳｴｵｶｷｸｹｺｻｼｽｾｿﾀX==0 13946: // : 13947: // 15 ................ﾀXｱｲｳｴｵｶｷｸｹｺｻｼｽｾ ｿﾀ*0ｿ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾﾀX==0 13948: // 16 ................Xｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿ ﾀX*0ﾀ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿX==0 13949: // 17 ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ Xｱ*0X Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0 13950: // CCR 13951: // X countが0のとき変化しない。他は最後に押し出されたビット 13952: // N 結果の最上位ビット 13953: // Z 結果が0のときセット。他はクリア 13954: // V 常にクリア 13955: // C countが0のときXのコピー。他は最後に押し出されたビット 13956: public static void irpXxlToRegWord () throws M68kException { 13957: int rrr; 13958: int x = XEiJ.regRn[rrr = XEiJ.regOC & 7]; 13959: int y; 13960: int z; 13961: int t; 13962: XEiJ.mpuCycleCount++; 13963: switch (XEiJ.regOC >> 3 & 0b111_000 >> 3) { 13964: case 0b000_000 >> 3: //ASL.W #<data>,Dr 13965: y = (XEiJ.regOC >> 9) - 1 & 7; //y=data-1=1-1～8-1 13966: XEiJ.regRn[rrr] = ~0xffff & x | (char) (z = (short) ((t = x << y) << 1)); 13967: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | (z >> y + 1 != (short) x ? XEiJ.REG_CCR_V : 0) | (short) t >> 15 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //VはASRで元に戻せないときセット。XとCは最後に押し出されたビット 13968: break; 13969: case 0b001_000 >> 3: //LSL.W #<data>,Dr 13970: y = (XEiJ.regOC >> 9) - 1 & 7; //y=data-1=1-1～8-1 13971: XEiJ.regRn[rrr] = ~0xffff & x | (char) (z = (short) ((t = x << y) << 1)); 13972: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | (short) t >> 15 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //XとCは最後に押し出されたビット 13973: break; 13974: case 0b010_000 >> 3: //ROXL.W #<data>,Dr 13975: y = (XEiJ.regOC >> 9) - 1 & 7; //y=data-1=1-1～8-1 13976: z = x << 1 | XEiJ.regCCR >> 4 & 1; 13977: if (y == 1 - 1) { //y=data-1=1-1 13978: t = x; 13979: } else { //y=data-1=2-1～8-1 13980: z = (t = z << y - (2 - 1)) << 1 | (char) x >>> 17 - 1 - y; 13981: } 13982: XEiJ.regRn[rrr] = ~0xffff & x | (char) (z = (short) z); 13983: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | (short) t >> 15 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //XとCは最後に押し出されたビット 13984: break; 13985: case 0b011_000 >> 3: //ROL.W #<data>,Dr 13986: y = (XEiJ.regOC >> 9) - 1 & 7; //y=data-1=1-1～8-1 13987: XEiJ.regRn[rrr] = ~0xffff & x | (char) (z = (short) (x << y + 1 | (char) x >>> 16 - 1 - y)); 13988: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | z & 1; //Xは変化しない。Cは結果の最下位ビット 13989: break; 13990: case 0b100_000 >> 3: //ASL.W Dq,Dr 13991: y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63; //y=0～63。Javaのシフト演算子は5ビットでマスクされることに注意 13992: if (y <= 15) { //y=data=0～15 13993: if (y == 0) { //y=data=0 13994: z = (short) x; 13995: t = XEiJ.regCCR & XEiJ.REG_CCR_X; //Xは変化しない。VとCはクリア 13996: } else { //y=data=1～15 13997: XEiJ.regRn[rrr] = ~0xffff & x | (char) (z = (short) ((t = x << y - 1) << 1)); 13998: t = (z >> y != (short) x ? XEiJ.REG_CCR_V : 0) | (short) t >> 15 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //VはASRで元に戻せないときセット。XとCは最後に押し出されたビット 13999: } 14000: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | t; 14001: } else { //y=data=16～63 14002: XEiJ.regRn[rrr] = ~0xffff & x; 14003: XEiJ.regCCR = XEiJ.REG_CCR_Z | ((short) x != 0 ? XEiJ.REG_CCR_V : 0) | (y == 16 ? -(x & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C) : 0); 14004: } 14005: break; 14006: case 0b101_000 >> 3: //LSL.W Dq,Dr 14007: y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63; //y=0～63。Javaのシフト演算子は5ビットでマスクされることに注意 14008: if (y == 0) { //y=data=0 14009: z = (short) x; 14010: t = XEiJ.regCCR & XEiJ.REG_CCR_X; //Xは変化しない。Cはクリア 14011: } else { //y=data=1～63 14012: XEiJ.regRn[rrr] = ~0xffff & x | (char) (z = (short) ((t = y <= 16 ? x << y - 1 : 0) << 1)); 14013: t = (short) t >> 15 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //XとCは最後に押し出されたビット 14014: } 14015: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | t; 14016: break; 14017: case 0b110_000 >> 3: //ROXL.W Dq,Dr 14018: y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63; //y=0～63。Javaのシフト演算子は5ビットでマスクされることに注意 14019: //y %= 17; 14020: y = (y & 15) - (y >> 4); //y=data=-3～15 14021: y += y >> 4 & 17; //y=data=0～16 14022: if (y == 0) { //y=data=0 14023: z = (short) x; 14024: t = -(XEiJ.regCCR >> 4 & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //Xは変化しない。CはXのコピー 14025: } else { //y=data=1～16 14026: z = x << 1 | XEiJ.regCCR >> 4 & 1; 14027: if (y == 1) { //y=data=1 14028: t = x; //Cは最後に押し出されたビット 14029: } else { //y=data=2～16 14030: z = (t = z << y - 2) << 1 | (char) x >>> 17 - y; 14031: } 14032: XEiJ.regRn[rrr] = ~0xffff & x | (char) (z = (short) z); 14033: t = (short) t >> 15 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //XとCは最後に押し出されたビット 14034: } 14035: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | t; 14036: break; 14037: case 0b111_000 >> 3: //ROL.W Dq,Dr 14038: default: 14039: y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63; //y=0～63。Javaのシフト演算子は5ビットでマスクされることに注意 14040: if (y == 0) { 14041: z = (short) x; 14042: t = 0; //Cはクリア 14043: } else { 14044: y &= 15; //y=data=0～15 14045: XEiJ.regRn[rrr] = ~0xffff & x | (char) (z = (short) (x << y | (char) x >>> 16 - y)); 14046: t = z & 1; //Cは結果の最下位ビット 14047: } 14048: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | t; //Xは変化しない 14049: } 14050: } //irpXxlToRegWord 14051: 14052: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 14053: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 14054: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 14055: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 14056: //ASL.L #<data>,Dr |-|012346|-|UUUUU|*****| |1110_qqq_110_000_rrr 14057: //LSL.L #<data>,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_110_001_rrr 14058: //ROXL.L #<data>,Dr |-|012346|-|*UUUU|***0*| |1110_qqq_110_010_rrr 14059: //ROL.L #<data>,Dr |-|012346|-|-UUUU|-**0*| |1110_qqq_110_011_rrr 14060: //ASL.L Dq,Dr |-|012346|-|UUUUU|*****| |1110_qqq_110_100_rrr 14061: //LSL.L Dq,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_110_101_rrr 14062: //ROXL.L Dq,Dr |-|012346|-|*UUUU|***0*| |1110_qqq_110_110_rrr 14063: //ROL.L Dq,Dr |-|012346|-|-UUUU|-**0*| |1110_qqq_110_111_rrr 14064: //ASL.L Dr |A|012346|-|UUUUU|*****| |1110_001_110_000_rrr [ASL.L #1,Dr] 14065: //LSL.L Dr |A|012346|-|UUUUU|***0*| |1110_001_110_001_rrr [LSL.L #1,Dr] 14066: //ROXL.L Dr |A|012346|-|*UUUU|***0*| |1110_001_110_010_rrr [ROXL.L #1,Dr] 14067: //ROL.L Dr |A|012346|-|-UUUU|-**0*| |1110_001_110_011_rrr [ROL.L #1,Dr] 14068: // 14069: //ASL.L #<data>,Dr 14070: //ASL.L Dq,Dr 14071: // 算術左シフトロング 14072: // ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ XNZVC 14073: // 0 ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ Xｱ**0 Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ==0 14074: // 1 ｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ0 ｱｲ**ｱ Z=ｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ==0,V=ｱｲ!=0/-1 14075: // : 14076: // 31 ﾐ0000000000000000000000000000000 ﾏﾐ**ﾏ Z=ﾐ==0,V=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ!=0/-1 14077: // 32 00000000000000000000000000000000 ﾐ01*ﾐ V=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ!=0 14078: // 33 00000000000000000000000000000000 001*0 V=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ!=0 14079: // CCR 14080: // X countが0のとき変化しない。他は最後に押し出されたビット 14081: // N 結果の最上位ビット 14082: // Z 結果が0のときセット。他はクリア 14083: // V ASRで元に戻せないときセット。他はクリア 14084: // C countが0のときクリア。他は最後に押し出されたビット 14085: // 14086: //LSL.L #<data>,Dr 14087: //LSL.L Dq,Dr 14088: // 論理左シフトロング 14089: // ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ XNZVC 14090: // 0 ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ Xｱ*00 Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ==0 14091: // 1 ｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ0 ｱｲ*0ｱ Z=ｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ==0 14092: // : 14093: // 31 ﾐ0000000000000000000000000000000 ﾏﾐ*0ﾏ Z=ﾐ==0 14094: // 32 00000000000000000000000000000000 ﾐ010ﾐ 14095: // 33 00000000000000000000000000000000 00100 14096: // CCR 14097: // X countが0のとき変化しない。他は最後に押し出されたビット 14098: // N 結果の最上位ビット 14099: // Z 結果が0のときセット。他はクリア 14100: // V 常にクリア 14101: // C countが0のときクリア。他は最後に押し出されたビット 14102: // 14103: //ROL.L #<data>,Dr 14104: //ROL.L Dq,Dr 14105: // 左ローテートロング 14106: // ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ XNZVC 14107: // 0 ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ Xｱ*00 Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ==0 14108: // 1 ｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐｱ Xｲ*0ｱ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ==0 14109: // : 14110: // 31 ﾐｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏ Xﾐ*0ﾏ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ==0 14111: // 32 ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ Xｱ*0ﾐ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ==0 14112: // CCR 14113: // X 常に変化しない 14114: // N 結果の最上位ビット 14115: // Z 結果が0のときセット。他はクリア 14116: // V 常にクリア 14117: // C countが0のときクリア。他は結果の最下位ビット 14118: // 14119: //ROXL.L #<data>,Dr 14120: //ROXL.L Dq,Dr 14121: // 拡張左ローテートロング 14122: // ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ XNZVC 14123: // 0 ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ Xｱ*0X Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ==0 14124: // 1 ｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐX ｱｲ*0ｱ Z=ｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐX==0 14125: // 2 ｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐXｱ ｲｳ*0ｲ Z=ｱｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐX==0 14126: // : 14127: // 31 ﾐXｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎ ﾏﾐ*0ﾏ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾐX==0 14128: // 32 Xｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏ ﾐX*0ﾐ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏX==0 14129: // 33 ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ Xｱ*0X Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ==0 14130: // CCR 14131: // X countが0のとき変化しない。他は最後に押し出されたビット 14132: // N 結果の最上位ビット 14133: // Z 結果が0のときセット。他はクリア 14134: // V 常にクリア 14135: // C countが0のときXのコピー。他は最後に押し出されたビット 14136: public static void irpXxlToRegLong () throws M68kException { 14137: int rrr; 14138: int x = XEiJ.regRn[rrr = XEiJ.regOC & 7]; 14139: int y; 14140: int z; 14141: int t; 14142: XEiJ.mpuCycleCount++; 14143: switch (XEiJ.regOC >> 3 & 0b111_000 >> 3) { 14144: case 0b000_000 >> 3: //ASL.L #<data>,Dr 14145: y = (XEiJ.regOC >> 9) - 1 & 7; //y=data-1=1-1～8-1 14146: XEiJ.regRn[rrr] = z = (t = x << y) << 1; 14147: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | (z >> y + 1 != x ? XEiJ.REG_CCR_V : 0) | t >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //VはASRで元に戻せないときセット。XとCは最後に押し出されたビット 14148: break; 14149: case 0b001_000 >> 3: //LSL.L #<data>,Dr 14150: y = (XEiJ.regOC >> 9) - 1 & 7; //y=data-1=1-1～8-1 14151: XEiJ.regRn[rrr] = z = (t = x << y) << 1; 14152: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | t >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //XとCは最後に押し出されたビット 14153: break; 14154: case 0b010_000 >> 3: //ROXL.L #<data>,Dr 14155: y = (XEiJ.regOC >> 9) - 1 & 7; //y=data-1=1-1～8-1 14156: z = x << 1 | XEiJ.regCCR >> 4 & 1; 14157: if (y == 1 - 1) { //y=data-1=1-1 14158: t = x; 14159: } else { //y=data-1=2-1～8-1 14160: z = (t = z << y - (2 - 1)) << 1 | x >>> -y; //Javaのシフト演算子は5ビットでマスクされるので33-1-yを-yに省略 14161: } 14162: XEiJ.regRn[rrr] = z; 14163: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | t >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //XとCは最後に押し出されたビット 14164: break; 14165: case 0b011_000 >> 3: //ROL.L #<data>,Dr 14166: y = (XEiJ.regOC >> 9) - 1 & 7; //y=data-1=1-1～8-1 14167: XEiJ.regRn[rrr] = z = x << y + 1 | x >>> ~y; //Javaのシフト演算子は5ビットでマスクされるので32-1-yを~yに省略 14168: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | z & 1; //Xは変化しない。Cは結果の最下位ビット 14169: break; 14170: case 0b100_000 >> 3: //ASL.L Dq,Dr 14171: y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63; //y=0～63。Javaのシフト演算子は5ビットでマスクされることに注意 14172: if (y <= 31) { //y=data=0～31 14173: if (y == 0) { //y=data=0 14174: z = x; 14175: t = XEiJ.regCCR & XEiJ.REG_CCR_X; //Xは変化しない。VとCはクリア 14176: } else { //y=data=1～31 14177: XEiJ.regRn[rrr] = z = (t = x << y - 1) << 1; 14178: t = (z >> y != x ? XEiJ.REG_CCR_V : 0) | t >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //VはASRで元に戻せないときセット。XとCは最後に押し出されたビット 14179: } 14180: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | t; 14181: } else { //y=data=32～63 14182: XEiJ.regRn[rrr] = 0; 14183: XEiJ.regCCR = XEiJ.REG_CCR_Z | (x != 0 ? XEiJ.REG_CCR_V : 0) | (y == 32 ? -(x & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C) : 0); 14184: } 14185: break; 14186: case 0b101_000 >> 3: //LSL.L Dq,Dr 14187: y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63; //y=0～63。Javaのシフト演算子は5ビットでマスクされることに注意 14188: if (y == 0) { //y=data=0 14189: z = x; 14190: t = XEiJ.regCCR & XEiJ.REG_CCR_X; //Xは変化しない。Cはクリア 14191: } else { //y=data=1～63 14192: XEiJ.regRn[rrr] = z = (t = y <= 32 ? x << y - 1 : 0) << 1; 14193: t = t >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //XとCは最後に押し出されたビット 14194: } 14195: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | t; 14196: break; 14197: case 0b110_000 >> 3: //ROXL.L Dq,Dr 14198: y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63; //y=0～63。Javaのシフト演算子は5ビットでマスクされることに注意 14199: //y %= 33; 14200: y -= 32 - y >> 6 & 33; //y=data=0～32 14201: if (y == 0) { //y=data=0 14202: z = x; 14203: t = -(XEiJ.regCCR >> 4 & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //Xは変化しない。CはXのコピー 14204: } else { //y=data=1～32 14205: z = x << 1 | XEiJ.regCCR >> 4 & 1; 14206: if (y == 1) { //y=data=1 14207: t = x; //Cは最後に押し出されたビット 14208: } else { //y=data=2～32 14209: z = (t = z << y - 2) << 1 | x >>> 33 - y; 14210: } 14211: XEiJ.regRn[rrr] = z; 14212: t = t >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //XとCは最後に押し出されたビット 14213: } 14214: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | t; 14215: break; 14216: case 0b111_000 >> 3: //ROL.L Dq,Dr 14217: default: 14218: y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63; //y=0～63。Javaのシフト演算子は5ビットでマスクされることに注意 14219: if (y == 0) { 14220: z = x; 14221: t = 0; //Cはクリア 14222: } else { 14223: XEiJ.regRn[rrr] = z = x << y | x >>> -y; //Javaのシフト演算子は5ビットでマスクされるのでy&31をyに、32-(y&31)を-yに省略。y=32のときx|xになるが問題ない 14224: t = z & 1; 14225: } 14226: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | t; //Xは変化しない 14227: } 14228: } //irpXxlToRegLong 14229: 14230: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 14231: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 14232: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 14233: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 14234: //ASL.W <ea> |-|012346|-|UUUUU|*****| M+-WXZ |1110_000_111_mmm_rrr 14235: // 14236: //ASL.W #<data>,Dr 14237: //ASL.W Dq,Dr 14238: //ASL.W <ea> 14239: // 算術左シフトワード 14240: // ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ XNZVC 14241: // 0 ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ Xｱ*00 Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0 14242: // 1 ................ｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ0 ｱｲ**ｱ Z=ｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0,V=ｱｲ!=0/-1 14243: // : 14244: // 15 ................ﾀ000000000000000 ｿﾀ**ｿ Z=ﾀ==0,V=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ!=0/-1 14245: // 16 ................0000000000000000 ﾀ01*ﾀ V=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ!=0 14246: // 17 ................0000000000000000 001*0 V=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ!=0 14247: // CCR 14248: // X countが0のとき変化しない。他は最後に押し出されたビット 14249: // N 結果の最上位ビット 14250: // Z 結果が0のときセット。他はクリア 14251: // V ASRで元に戻せないときセット。他はクリア 14252: // C countが0のときクリア。他は最後に押し出されたビット 14253: public static void irpAslToMem () throws M68kException { 14254: XEiJ.mpuCycleCount++; 14255: int ea = XEiJ.regOC & 63; 14256: int a = efaMltWord (ea); 14257: int x = mmuModifyWordSignData (a, XEiJ.regSRS); 14258: int z = (short) (x << 1); 14259: mmuWriteWordData (a, z, XEiJ.regSRS); 14260: XEiJ.regCCR = ((z < 0 ? XEiJ.REG_CCR_N : 0) | 14261: (z == 0 ? XEiJ.REG_CCR_Z : 0) | 14262: (x ^ z) >>> 31 << 1 | //Vは最上位ビットが変化したときセット 14263: x >> 15 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //XとCは最後に押し出されたビット 14264: } //irpAslToMem 14265: 14266: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 14267: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 14268: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 14269: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 14270: //LSR.W <ea> |-|012346|-|UUUUU|*0*0*| M+-WXZ |1110_001_011_mmm_rrr 14271: // 14272: //LSR.W #<data>,Dr 14273: //LSR.W Dq,Dr 14274: //LSR.W <ea> 14275: // 論理右シフトワード 14276: // ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ XNZVC 14277: // 0 ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ Xｱ*00 Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0 14278: // 1 ................0ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿ ﾀ0*0ﾀ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿ==0 14279: // : 14280: // 15 ................000000000000000ｱ ｲ0*0ｲ Z=ｱ==0 14281: // 16 ................0000000000000000 ｱ010ｱ 14282: // 17 ................0000000000000000 00100 14283: // CCR 14284: // X countが0のとき変化しない。他は最後に押し出されたビット 14285: // N 結果の最上位ビット 14286: // Z 結果が0のときセット。他はクリア 14287: // V 常にクリア 14288: // C countが0のときクリア。他は最後に押し出されたビット 14289: public static void irpLsrToMem () throws M68kException { 14290: XEiJ.mpuCycleCount++; 14291: int ea = XEiJ.regOC & 63; 14292: int a = efaMltWord (ea); 14293: int x = mmuModifyWordZeroData (a, XEiJ.regSRS); 14294: int z = x >>> 1; 14295: mmuWriteWordData (a, z, XEiJ.regSRS); 14296: XEiJ.regCCR = ((z == 0 ? XEiJ.REG_CCR_Z : 0) | 14297: -(x & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //XとCは最後に押し出されたビット 14298: } //irpLsrToMem 14299: 14300: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 14301: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 14302: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 14303: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 14304: //LSL.W <ea> |-|012346|-|UUUUU|***0*| M+-WXZ |1110_001_111_mmm_rrr 14305: // 14306: //LSL.W #<data>,Dr 14307: //LSL.W Dq,Dr 14308: //LSL.W <ea> 14309: // 論理左シフトワード 14310: // ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ XNZVC 14311: // 0 ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ Xｱ*00 Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0 14312: // 1 ................ｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ0 ｱｲ*0ｱ Z=ｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0 14313: // : 14314: // 15 ................ﾀ000000000000000 ｿﾀ*0ｿ Z=ﾀ==0 14315: // 16 ................0000000000000000 ﾀ010ﾀ 14316: // 17 ................0000000000000000 00100 14317: // CCR 14318: // X countが0のとき変化しない。他は最後に押し出されたビット 14319: // N 結果の最上位ビット 14320: // Z 結果が0のときセット。他はクリア 14321: // V 常にクリア 14322: // C countが0のときクリア。他は最後に押し出されたビット 14323: public static void irpLslToMem () throws M68kException { 14324: XEiJ.mpuCycleCount++; 14325: int ea = XEiJ.regOC & 63; 14326: int a = efaMltWord (ea); 14327: int x = mmuModifyWordSignData (a, XEiJ.regSRS); 14328: int z = (short) (x << 1); 14329: mmuWriteWordData (a, z, XEiJ.regSRS); 14330: XEiJ.regCCR = ((z < 0 ? XEiJ.REG_CCR_N : 0) | 14331: (z == 0 ? XEiJ.REG_CCR_Z : 0) | 14332: x >> 15 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //XとCは最後に押し出されたビット 14333: } //irpLslToMem 14334: 14335: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 14336: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 14337: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 14338: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 14339: //ROXR.W <ea> |-|012346|-|*UUUU|***0*| M+-WXZ |1110_010_011_mmm_rrr 14340: // 14341: //ROXR.W #<data>,Dr 14342: //ROXR.W Dq,Dr 14343: //ROXR.W <ea> 14344: // 拡張右ローテートワード 14345: // ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ XNZVC 14346: // 0 ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ Xｱ*0X Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0 14347: // 1 ................Xｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿ ﾀX*0ﾀ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿX==0 14348: // 2 ................ﾀXｱｲｳｴｵｶｷｸｹｺｻｼｽｾ ｿﾀ*0ｿ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾﾀX==0 14349: // : 14350: // 15 ................ｳｴｵｶｷｸｹｺｻｼｽｾｿﾀXｱ ｲｳ*0ｲ Z=ｱｳｴｵｶｷｸｹｺｻｼｽｾｿﾀX==0 14351: // 16 ................ｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀX ｱｲ*0ｱ Z=ｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀX==0 14352: // 17 ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ Xｱ*0X Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0 14353: // CCR 14354: // X countが0のとき変化しない。他は最後に押し出されたビット 14355: // N 結果の最上位ビット 14356: // Z 結果が0のときセット。他はクリア 14357: // V 常にクリア 14358: // C countが0のときXのコピー。他は最後に押し出されたビット 14359: public static void irpRoxrToMem () throws M68kException { 14360: XEiJ.mpuCycleCount++; 14361: int ea = XEiJ.regOC & 63; 14362: int a = efaMltWord (ea); 14363: int x = mmuModifyWordZeroData (a, XEiJ.regSRS); 14364: int z = -(XEiJ.regCCR & XEiJ.REG_CCR_X) << 15 - 4 | x >>> 1; 14365: mmuWriteWordData (a, z, XEiJ.regSRS); 14366: XEiJ.regCCR = ((z < 0 ? XEiJ.REG_CCR_N : 0) | 14367: (z == 0 ? XEiJ.REG_CCR_Z : 0) | 14368: -(x & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //XとCは最後に押し出されたビット 14369: } //irpRoxrToMem 14370: 14371: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 14372: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 14373: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 14374: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 14375: //ROXL.W <ea> |-|012346|-|*UUUU|***0*| M+-WXZ |1110_010_111_mmm_rrr 14376: // 14377: //ROXL.W #<data>,Dr 14378: //ROXL.W Dq,Dr 14379: //ROXL.W <ea> 14380: // 拡張左ローテートワード 14381: // ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ XNZVC 14382: // 0 ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ Xｱ*0X Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0 14383: // 1 ................ｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀX ｱｲ*0ｱ Z=ｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀX==0 14384: // 2 ................ｳｴｵｶｷｸｹｺｻｼｽｾｿﾀXｱ ｲｳ*0ｲ Z=ｱｳｴｵｶｷｸｹｺｻｼｽｾｿﾀX==0 14385: // : 14386: // 15 ................ﾀXｱｲｳｴｵｶｷｸｹｺｻｼｽｾ ｿﾀ*0ｿ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾﾀX==0 14387: // 16 ................Xｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿ ﾀX*0ﾀ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿX==0 14388: // 17 ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ Xｱ*0X Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0 14389: // CCR 14390: // X countが0のとき変化しない。他は最後に押し出されたビット 14391: // N 結果の最上位ビット 14392: // Z 結果が0のときセット。他はクリア 14393: // V 常にクリア 14394: // C countが0のときXのコピー。他は最後に押し出されたビット 14395: public static void irpRoxlToMem () throws M68kException { 14396: XEiJ.mpuCycleCount++; 14397: int ea = XEiJ.regOC & 63; 14398: int a = efaMltWord (ea); 14399: int x = mmuModifyWordSignData (a, XEiJ.regSRS); 14400: int z = (short) (x << 1 | XEiJ.regCCR >> 4 & 1); 14401: mmuWriteWordData (a, z, XEiJ.regSRS); 14402: XEiJ.regCCR = ((z < 0 ? XEiJ.REG_CCR_N : 0) | 14403: (z == 0 ? XEiJ.REG_CCR_Z : 0) | 14404: x >> 15 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //XとCは最後に押し出されたビット 14405: } //irpRoxlToMem 14406: 14407: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 14408: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 14409: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 14410: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 14411: //ROR.W <ea> |-|012346|-|-UUUU|-**0*| M+-WXZ |1110_011_011_mmm_rrr 14412: // 14413: //ROR.W #<data>,Dr 14414: //ROR.W Dq,Dr 14415: //ROR.W <ea> 14416: // 右ローテートワード 14417: // ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ XNZVC 14418: // 0 ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ Xｱ*00 Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0 14419: // 1 ................ﾀｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿ Xﾀ*0ﾀ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0 14420: // : 14421: // 15 ................ｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀｱ Xｲ*0ｲ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0 14422: // 16 ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ Xｱ*0ｱ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0 14423: // CCR 14424: // X 常に変化しない 14425: // N 結果の最上位ビット 14426: // Z 結果が0のときセット。他はクリア 14427: // V 常にクリア 14428: // C countが0のときクリア。他は結果の最上位ビット 14429: public static void irpRorToMem () throws M68kException { 14430: XEiJ.mpuCycleCount++; 14431: int ea = XEiJ.regOC & 63; 14432: int a = efaMltWord (ea); 14433: int x = mmuModifyWordZeroData (a, XEiJ.regSRS); 14434: int z = (short) (x << 15 | x >>> 1); 14435: mmuWriteWordData (a, z, XEiJ.regSRS); 14436: XEiJ.regCCR = (XEiJ.regCCR & XEiJ.REG_CCR_X | //Xは変化しない 14437: (z < 0 ? XEiJ.REG_CCR_N : 0) | 14438: (z == 0 ? XEiJ.REG_CCR_Z : 0) | 14439: z >>> 31); //Cは結果の最上位ビット 14440: } //irpRorToMem 14441: 14442: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 14443: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 14444: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 14445: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 14446: //ROL.W <ea> |-|012346|-|-UUUU|-**0*| M+-WXZ |1110_011_111_mmm_rrr 14447: // 14448: //ROL.W #<data>,Dr 14449: //ROL.W Dq,Dr 14450: //ROL.W <ea> 14451: // 左ローテートワード 14452: // ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ XNZVC 14453: // 0 ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ Xｱ*00 Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0 14454: // 1 ................ｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀｱ Xｲ*0ｱ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0 14455: // : 14456: // 15 ................ﾀｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿ Xﾀ*0ｿ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0 14457: // 16 ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ Xｱ*0ﾀ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0 14458: // CCR 14459: // X 常に変化しない 14460: // N 結果の最上位ビット 14461: // Z 結果が0のときセット。他はクリア 14462: // V 常にクリア 14463: // C countが0のときクリア。他は結果の最下位ビット 14464: public static void irpRolToMem () throws M68kException { 14465: XEiJ.mpuCycleCount++; 14466: int ea = XEiJ.regOC & 63; 14467: int a = efaMltWord (ea); 14468: int x = mmuModifyWordZeroData (a, XEiJ.regSRS); 14469: int z = (short) (x << 1 | x >>> 15); 14470: mmuWriteWordData (a, z, XEiJ.regSRS); 14471: XEiJ.regCCR = (XEiJ.regCCR & XEiJ.REG_CCR_X | //Xは変化しない 14472: (z < 0 ? XEiJ.REG_CCR_N : 0) | 14473: (z == 0 ? XEiJ.REG_CCR_Z : 0) | 14474: z & 1); //Cは結果の最下位ビット 14475: } //irpRolToMem 14476: 14477: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 14478: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 14479: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 14480: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 14481: //BFTST <ea>{#o:#w} |-|--2346|-|-UUUU|-**00|D M WXZP |1110_100_011_mmm_rrr-00000ooooo0wwwww 14482: //BFTST <ea>{#o:Dw} |-|--2346|-|-UUUU|-**00|D M WXZP |1110_100_011_mmm_rrr-00000ooooo100www 14483: //BFTST <ea>{Do:#w} |-|--2346|-|-UUUU|-**00|D M WXZP |1110_100_011_mmm_rrr-0000100ooo0wwwww 14484: //BFTST <ea>{Do:Dw} |-|--2346|-|-UUUU|-**00|D M WXZP |1110_100_011_mmm_rrr-0000100ooo100www 14485: public static void irpBftst () throws M68kException { 14486: int w = mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); //pcwz。拡張ワード 14487: if ((w & ~0b0000_111_111_111_111) != 0 || 14488: (w & 0b0000_111_111_000_000) > 0b0000_100_111_000_000 || 14489: (w & 0b0000_000_000_111_111) > 0b0000_000_000_100_111) { 14490: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 14491: throw M68kException.m6eSignal; 14492: } 14493: int o = w << 31 - 11 >= 0 ? w >> 6 & 31 : XEiJ.regRn[w >> 6 & 7]; //o=offset 14494: w = -(w << 31 - 5 >= 0 ? w : XEiJ.regRn[w & 7]) & 31; //w=32-width。1<=width<=32なので0<=32-width<=31 14495: XEiJ.mpuCycleCount += 6; 14496: int ea = XEiJ.regOC & 63; 14497: int z; 14498: if (ea < XEiJ.EA_AR) { //BFTST Dr{～} 14499: z = XEiJ.regRn[ea]; 14500: z = z << o | z >>> -o; //下位からはみ出したフィールドは上位に戻る 14501: } else { //BFTST <mem>{～} 14502: int a = efaCntLong (ea) + (o >> 3); //フィールドの最上位ビットを含むバイトのアドレス 14503: o &= 7; 14504: z = 31 - w + o >> 3; //フィールドが跨ぐバイト境界の数。0～4 14505: z = (z == 0 ? mmuReadByteSignData (m60Address = a, XEiJ.regSRS) << 24 + o : //不要なバイトにアクセスしない 14506: z == 1 ? mmuReadWordSignData (m60Address = a, XEiJ.regSRS) << 16 + o : //020以上なのでアドレスエラーは出ない 14507: z == 2 ? (mmuReadWordSignData (m60Address = a, XEiJ.regSRS) << 8 | mmuReadByteZeroData (a + 2, XEiJ.regSRS)) << 8 + o : 14508: z == 3 ? mmuReadLongData (m60Address = a, XEiJ.regSRS) << o : 14509: mmuReadLongData (m60Address = a, XEiJ.regSRS) << o | mmuReadByteZeroData (m60Address = a + 4, XEiJ.regSRS) >>> 8 - o); 14510: } 14511: z >>= w; //符号拡張。下位のゴミを消す 14512: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 14513: } //irpBftst 14514: 14515: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 14516: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 14517: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 14518: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 14519: //BFEXTU <ea>{#o:#w},Dn |-|--2346|-|-UUUU|-**00|D M WXZP |1110_100_111_mmm_rrr-0nnn0ooooo0wwwww 14520: //BFEXTU <ea>{#o:Dw},Dn |-|--2346|-|-UUUU|-**00|D M WXZP |1110_100_111_mmm_rrr-0nnn0ooooo100www 14521: //BFEXTU <ea>{Do:#w},Dn |-|--2346|-|-UUUU|-**00|D M WXZP |1110_100_111_mmm_rrr-0nnn100ooo0wwwww 14522: //BFEXTU <ea>{Do:Dw},Dn |-|--2346|-|-UUUU|-**00|D M WXZP |1110_100_111_mmm_rrr-0nnn100ooo100www 14523: public static void irpBfextu () throws M68kException { 14524: int w = mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); //pcwz。拡張ワード 14525: if ((w & ~0b0111_111_111_111_111) != 0 || 14526: (w & 0b0000_111_111_000_000) > 0b0000_100_111_000_000 || 14527: (w & 0b0000_000_000_111_111) > 0b0000_000_000_100_111) { 14528: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 14529: throw M68kException.m6eSignal; 14530: } 14531: int n = w >> 12; 14532: int o = w << 31 - 11 >= 0 ? w >> 6 & 31 : XEiJ.regRn[w >> 6 & 7]; //o=offset 14533: w = -(w << 31 - 5 >= 0 ? w : XEiJ.regRn[w & 7]) & 31; //w=32-width。1<=width<=32なので0<=32-width<=31 14534: XEiJ.mpuCycleCount += 6; 14535: int ea = XEiJ.regOC & 63; 14536: int z; 14537: if (ea < XEiJ.EA_AR) { //BFEXTU Dr{～} 14538: z = XEiJ.regRn[ea]; 14539: z = z << o | z >>> -o; //下位からはみ出したフィールドは上位に戻る 14540: } else { //BFEXTU <mem>{～} 14541: int a = efaCntLong (ea) + (o >> 3); 14542: o &= 7; 14543: z = 31 - w + o >> 3; 14544: z = (z == 0 ? mmuReadByteSignData (m60Address = a, XEiJ.regSRS) << 24 + o : //不要なバイトにアクセスしない 14545: z == 1 ? mmuReadWordSignData (m60Address = a, XEiJ.regSRS) << 16 + o : //020以上なのでアドレスエラーは出ない 14546: z == 2 ? (mmuReadWordSignData (m60Address = a, XEiJ.regSRS) << 8 | mmuReadByteZeroData (a + 2, XEiJ.regSRS)) << 8 + o : 14547: z == 3 ? mmuReadLongData (m60Address = a, XEiJ.regSRS) << o : 14548: mmuReadLongData (m60Address = a, XEiJ.regSRS) << o | mmuReadByteZeroData (m60Address = a + 4, XEiJ.regSRS) >>> 8 - o); 14549: } 14550: XEiJ.regRn[n] = z >>> w; //ゼロ拡張 14551: z >>= w; //符号拡張。下位のゴミを消す 14552: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 14553: } //irpBfextu 14554: 14555: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 14556: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 14557: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 14558: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 14559: //BFCHG <ea>{#o:#w} |-|--2346|-|-UUUU|-**00|D M WXZ |1110_101_011_mmm_rrr-00000ooooo0wwwww 14560: //BFCHG <ea>{#o:Dw} |-|--2346|-|-UUUU|-**00|D M WXZ |1110_101_011_mmm_rrr-00000ooooo100www 14561: //BFCHG <ea>{Do:#w} |-|--2346|-|-UUUU|-**00|D M WXZ |1110_101_011_mmm_rrr-0000100ooo0wwwww 14562: //BFCHG <ea>{Do:Dw} |-|--2346|-|-UUUU|-**00|D M WXZ |1110_101_011_mmm_rrr-0000100ooo100www 14563: public static void irpBfchg () throws M68kException { 14564: int w = mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); //pcwz。拡張ワード 14565: if ((w & ~0b0000_111_111_111_111) != 0 || 14566: (w & 0b0000_111_111_000_000) > 0b0000_100_111_000_000 || 14567: (w & 0b0000_000_000_111_111) > 0b0000_000_000_100_111) { 14568: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 14569: throw M68kException.m6eSignal; 14570: } 14571: int o = w << 31 - 11 >= 0 ? w >> 6 & 31 : XEiJ.regRn[w >> 6 & 7]; //o=offset 14572: w = -(w << 31 - 5 >= 0 ? w : XEiJ.regRn[w & 7]) & 31; //w=32-width。1<=width<=32なので0<=32-width<=31 14573: XEiJ.mpuCycleCount += 8; 14574: int ea = XEiJ.regOC & 63; 14575: int z; 14576: if (ea < XEiJ.EA_AR) { //BFCHG Dr{～} 14577: z = XEiJ.regRn[ea]; 14578: z = z << o | z >>> -o; //下位からはみ出したフィールドは上位に戻る 14579: int t = z ^ -1 << w; //フィールドの幅だけ反転する 14580: XEiJ.regRn[ea] = t << -o | t >>> o; 14581: } else { //BFCHG <mem>{～} 14582: int a = efaCltLong (ea) + (o >> 3); //フィールドの最上位ビットを含むバイトのアドレス 14583: o &= 7; 14584: z = 31 - w + o >> 3; //フィールドが跨ぐバイト境界の数。0～4 14585: if (z == 0) { 14586: // <ea>{2,5} o=2,w=32-5=27 <ea> --abcde- 14587: int t = mmuModifyByteSignData (a, XEiJ.regSRS) << 24; // t --abcde- 00000000 00000000 00000000 不要なバイトにアクセスしない 14588: z = t << o; // z abcde-00 00000000 00000000 00000000 14589: // // -1<<w 11111000 00000000 00000000 00000000 14590: // // -1<<w>>>o 00111110 00000000 00000000 00000000 14591: // //t^-1<<w>>>o --ABCDE- 00000000 00000000 00000000 14592: mmuWriteByteData (a, (t ^ -1 << w >>> o) >>> 24, XEiJ.regSRS); // <ea> --ABCDE- 14593: } else if (z == 1) { 14594: // <ea>{7,5} o=7,w=32-5=27 <ea> -------a bcde---- 14595: int t = mmuModifyWordSignData (a, XEiJ.regSRS) << 16; // t -------a bcde---- 00000000 00000000 020以上なのでアドレスエラーは出ない 14596: z = t << o; // z abcde--- -0000000 00000000 00000000 14597: // // -1<<w 11111000 00000000 00000000 00000000 14598: // // -1<<w>>>o 00000001 11110000 00000000 00000000 14599: // //t^-1<<w>>>o -------A BCDE---- 00000000 00000000 14600: mmuWriteWordData (a, (t ^ -1 << w >>> o) >>> 16, XEiJ.regSRS); // <ea> -------A BCDE---- 14601: } else if (z == 2) { 14602: // <ea>{7,12} o=7,w=32-12=20 <ea> -------a bcdefghi jkl----- 14603: int t = mmuModifyWordSignData (a, XEiJ.regSRS) << 16 | mmuModifyByteZeroData (a + 2, XEiJ.regSRS) << 8; // t -------a bcdefghi jkl----- 00000000 14604: z = t << o; // z abcdefgh ijkl---- -0000000 00000000 14605: // // -1<<w 11111111 11110000 00000000 00000000 14606: // // -1<<w>>>o 00000001 11111111 11100000 00000000 14607: t ^= -1 << w >>> o; // t -------A BCDEFGHI JKL----- 00000000 14608: mmuWriteWordData (a, t >>> 16, XEiJ.regSRS); // <ea> -------A BCDEFGHI jkl----- 14609: mmuWriteByteData (a + 2, t >>> 8, XEiJ.regSRS); // <ea> -------A BCDEFGHI JKL----- 14610: } else if (z == 3) { 14611: // <ea>{7,19} o=7,w=32-19=13 <ea> -------a bcdefghi jklmnopq rs------ 14612: int t = mmuModifyLongData (a, XEiJ.regSRS); // t -------a bcdefghi jklmnopq rs------ 14613: z = t << o; // z abcdefgh ijklmnop qrs----- -0000000 14614: // // -1<<w 11111111 11111111 11100000 00000000 14615: // // -1<<w>>>o 00000001 11111111 11111111 11000000 14616: mmuWriteLongData (a, t ^ -1 << w >>> o, XEiJ.regSRS); // <ea> -------A BCDEFGHI JKLMNOPQ RS------ 14617: } else { 14618: // <ea>{7,26} o=7,w=32-26=6 <ea> -------a bcdefghi jklmnopq rstuvwxy z------- 14619: int t = mmuModifyLongData (a, XEiJ.regSRS); // t -------a bcdefghi jklmnopq rstuvwxy 14620: z = t << o; // z abcdefgh ijklmnop qrstuvwx y0000000 14621: // -1>>>o 00000001 11111111 11111111 11111111 14622: mmuWriteLongData (a, t ^ -1 >>> o, XEiJ.regSRS); // <ea> -------A BCDEFGHI JKLMNOPQ RSTUVWXY 14623: t = mmuModifyByteZeroData (a + 4, XEiJ.regSRS); // t 00000000 00000000 00000000 z------- 14624: // // t>>>8-o 00000000 00000000 00000000 0z------ 14625: z |= t >>> 8 - o; // z abcdefgh ijklmnop qrstuvwx yz------ 14626: // // -1<<8-o+w 11111111 11111111 11111111 10000000 14627: mmuWriteByteData (a + 4, t ^ -1 << 8 - o + w, XEiJ.regSRS); // <ea> -------A BCDEFGHI JKLMNOPQ RSTUVWXY Z------- 14628: } 14629: } 14630: z >>= w; //符号拡張。下位のゴミを消す 14631: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 14632: } //irpBfchg 14633: 14634: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 14635: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 14636: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 14637: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 14638: //BFEXTS <ea>{#o:#w},Dn |-|--2346|-|-UUUU|-**00|D M WXZP |1110_101_111_mmm_rrr-0nnn0ooooo0wwwww 14639: //BFEXTS <ea>{#o:Dw},Dn |-|--2346|-|-UUUU|-**00|D M WXZP |1110_101_111_mmm_rrr-0nnn0ooooo100www 14640: //BFEXTS <ea>{Do:#w},Dn |-|--2346|-|-UUUU|-**00|D M WXZP |1110_101_111_mmm_rrr-0nnn100ooo0wwwww 14641: //BFEXTS <ea>{Do:Dw},Dn |-|--2346|-|-UUUU|-**00|D M WXZP |1110_101_111_mmm_rrr-0nnn100ooo100www 14642: public static void irpBfexts () throws M68kException { 14643: int w = mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); //pcwz。拡張ワード 14644: if ((w & ~0b0111_111_111_111_111) != 0 || 14645: (w & 0b0000_111_111_000_000) > 0b0000_100_111_000_000 || 14646: (w & 0b0000_000_000_111_111) > 0b0000_000_000_100_111) { 14647: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 14648: throw M68kException.m6eSignal; 14649: } 14650: int n = w >> 12; 14651: int o = w << 31 - 11 >= 0 ? w >> 6 & 31 : XEiJ.regRn[w >> 6 & 7]; //o=offset 14652: w = -(w << 31 - 5 >= 0 ? w : XEiJ.regRn[w & 7]) & 31; //w=32-width。1<=width<=32なので0<=32-width<=31 14653: XEiJ.mpuCycleCount += 6; 14654: int ea = XEiJ.regOC & 63; 14655: int z; 14656: if (ea < XEiJ.EA_AR) { //BFEXTS Dr{～} 14657: z = XEiJ.regRn[ea]; 14658: z = z << o | z >>> -o; //下位からはみ出したフィールドは上位に戻る 14659: } else { //BFEXTS <mem>{～} 14660: int a = efaCntLong (ea) + (o >> 3); //フィールドの最上位ビットを含むバイトのアドレス 14661: o &= 7; 14662: z = 31 - w + o >> 3; //フィールドが跨ぐバイト境界の数。0～4 14663: z = (z == 0 ? mmuReadByteSignData (m60Address = a, XEiJ.regSRS) << 24 + o : //不要なバイトにアクセスしない 14664: z == 1 ? mmuReadWordSignData (m60Address = a, XEiJ.regSRS) << 16 + o : //020以上なのでアドレスエラーは出ない 14665: z == 2 ? (mmuReadWordSignData (m60Address = a, XEiJ.regSRS) << 8 | mmuReadByteZeroData (a + 2, XEiJ.regSRS)) << 8 + o : 14666: z == 3 ? mmuReadLongData (m60Address = a, XEiJ.regSRS) << o : 14667: mmuReadLongData (m60Address = a, XEiJ.regSRS) << o | mmuReadByteZeroData (m60Address = a + 4, XEiJ.regSRS) >>> 8 - o); 14668: } 14669: XEiJ.regRn[n] = z >>= w; //符号拡張。下位のゴミを消す 14670: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 14671: } //irpBfexts 14672: 14673: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 14674: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 14675: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 14676: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 14677: //BFCLR <ea>{#o:#w} |-|--2346|-|-UUUU|-**00|D M WXZ |1110_110_011_mmm_rrr-00000ooooo0wwwww 14678: //BFCLR <ea>{#o:Dw} |-|--2346|-|-UUUU|-**00|D M WXZ |1110_110_011_mmm_rrr-00000ooooo100www 14679: //BFCLR <ea>{Do:#w} |-|--2346|-|-UUUU|-**00|D M WXZ |1110_110_011_mmm_rrr-0000100ooo0wwwww 14680: //BFCLR <ea>{Do:Dw} |-|--2346|-|-UUUU|-**00|D M WXZ |1110_110_011_mmm_rrr-0000100ooo100www 14681: public static void irpBfclr () throws M68kException { 14682: int w = mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); //pcwz。拡張ワード 14683: if ((w & ~0b0000_111_111_111_111) != 0 || 14684: (w & 0b0000_111_111_000_000) > 0b0000_100_111_000_000 || 14685: (w & 0b0000_000_000_111_111) > 0b0000_000_000_100_111) { 14686: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 14687: throw M68kException.m6eSignal; 14688: } 14689: int o = w << 31 - 11 >= 0 ? w >> 6 & 31 : XEiJ.regRn[w >> 6 & 7]; //o=offset 14690: w = -(w << 31 - 5 >= 0 ? w : XEiJ.regRn[w & 7]) & 31; //w=32-width。1<=width<=32なので0<=32-width<=31 14691: XEiJ.mpuCycleCount += 8; 14692: int ea = XEiJ.regOC & 63; 14693: int z; 14694: if (ea < XEiJ.EA_AR) { //BFCLR Dr{～} 14695: z = XEiJ.regRn[ea]; 14696: z = z << o | z >>> -o; //下位からはみ出したフィールドは上位に戻る 14697: int t = z & ~(-1 << w); //フィールドの幅だけ0を並べる 14698: XEiJ.regRn[ea] = t << -o | t >>> o; 14699: } else { //BFCLR <mem>{～} 14700: int a = efaCltLong (ea) + (o >> 3); //フィールドの最上位ビットを含むバイトのアドレス 14701: o &= 7; 14702: z = 31 - w + o >> 3; //フィールドが跨ぐバイト境界の数。0～4 14703: if (z == 0) { 14704: // <ea>{2,5} o=2,w=32-5=27 <ea> --abcde- 14705: int t = mmuModifyByteSignData (a, XEiJ.regSRS) << 24; // t --abcde- 00000000 00000000 00000000 不要なバイトにアクセスしない 14706: z = t << o; // z abcde-00 00000000 00000000 00000000 14707: // // -1<<w 11111000 00000000 00000000 00000000 14708: // // -1<<w>>>o 00111110 00000000 00000000 00000000 14709: // //~(-1<<w>>>o) 11000001 11111111 11111111 11111111 14710: // //t&~(-1<<w>>>o) --00000- 00000000 00000000 00000000 14711: mmuWriteByteData (a, (t & ~(-1 << w >>> o)) >>> 24, XEiJ.regSRS); // <ea> --00000- 14712: } else if (z == 1) { 14713: // <ea>{7,5} o=7,w=32-5=27 <ea> -------a bcde---- 14714: int t = mmuModifyWordSignData (a, XEiJ.regSRS) << 16; // t -------a bcde---- 00000000 00000000 020以上なのでアドレスエラーは出ない 14715: z = t << o; // z abcde--- -0000000 00000000 00000000 14716: // // -1<<w 11111000 00000000 00000000 00000000 14717: // // -1<<w>>>o 00000001 11110000 00000000 00000000 14718: // //~(-1<<w>>>o) 11111110 00001111 11111111 11111111 14719: // //t&~(-1<<w>>>o) -------0 0000---- 00000000 00000000 14720: mmuWriteWordData (a, (t & ~(-1 << w >>> o)) >>> 16, XEiJ.regSRS); // <ea> -------0 0000---- 14721: } else if (z == 2) { 14722: // <ea>{7,12} o=7,w=32-12=20 <ea> -------a bcdefghi jkl----- 14723: int t = mmuModifyWordSignData (a, XEiJ.regSRS) << 16 | mmuModifyByteZeroData (a + 2, XEiJ.regSRS) << 8; // t -------a bcdefghi jkl----- 00000000 14724: z = t << o; // z abcdefgh ijkl---- -0000000 00000000 14725: // // -1<<w 11111111 11110000 00000000 00000000 14726: // // -1<<w>>>o 00000001 11111111 11100000 00000000 14727: // //~(-1<<w>>>o) 11111110 00000000 00011111 11111111 14728: t &= ~(-1 << w >>> o); // t -------0 00000000 000----- 00000000 14729: mmuWriteWordData (a, t >>> 16, XEiJ.regSRS); // <ea> -------0 00000000 jkl----- 14730: mmuWriteByteData (a + 2, t >>> 8, XEiJ.regSRS); // <ea> -------0 00000000 000----- 14731: } else if (z == 3) { 14732: // <ea>{7,19} o=7,w=32-19=13 <ea> -------a bcdefghi jklmnopq rs------ 14733: int t = mmuModifyLongData (a, XEiJ.regSRS); // t -------a bcdefghi jklmnopq rs------ 14734: z = t << o; // z abcdefgh ijklmnop qrs----- -0000000 14735: // // -1<<w 11111111 11111111 11100000 00000000 14736: // // -1<<w>>>o 00000001 11111111 11111111 11000000 14737: // //~(-1<<w>>>o) 11111110 00000000 00000000 00111111 14738: mmuWriteLongData (a, t & ~(-1 << w >>> o), XEiJ.regSRS); // <ea> -------0 00000000 00000000 00------ 14739: } else { 14740: // <ea>{7,26} o=7,w=32-26=6 <ea> -------a bcdefghi jklmnopq rstuvwxy z------- 14741: int t = mmuModifyLongData (a, XEiJ.regSRS); // t -------a bcdefghi jklmnopq rstuvwxy 14742: z = t << o; // z abcdefgh ijklmnop qrstuvwx y0000000 14743: // -1>>>o 00000001 11111111 11111111 11111111 14744: // ~(-1>>>o) 11111110 00000000 00000000 00000000 14745: mmuWriteLongData (a, t & ~(-1 >>> o), XEiJ.regSRS); // <ea> -------0 00000000 00000000 00000000 14746: t = mmuModifyByteZeroData (a + 4, XEiJ.regSRS); // t 00000000 00000000 00000000 z------- 14747: // // t>>>8-o 00000000 00000000 00000000 0z------ 14748: z |= t >>> 8 - o; // z abcdefgh ijklmnop qrstuvwx yz------ 14749: // // -1<<8-o+w 11111111 11111111 11111111 10000000 14750: // //~(-1<<8-o+w) 00000000 00000000 00000000 01111111 14751: mmuWriteByteData (a + 4, t & ~(-1 << 8 - o + w), XEiJ.regSRS); // <ea> -------0 00000000 00000000 00000000 0------- 14752: } 14753: } 14754: z >>= w; //符号拡張。下位のゴミを消す 14755: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 14756: } //irpBfclr 14757: 14758: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 14759: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 14760: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 14761: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 14762: //BFFFO <ea>{#o:#w},Dn |-|--2346|-|-UUUU|-**00|D M WXZP |1110_110_111_mmm_rrr-0nnn0ooooo0wwwww 14763: //BFFFO <ea>{#o:Dw},Dn |-|--2346|-|-UUUU|-**00|D M WXZP |1110_110_111_mmm_rrr-0nnn0ooooo100www 14764: //BFFFO <ea>{Do:#w},Dn |-|--2346|-|-UUUU|-**00|D M WXZP |1110_110_111_mmm_rrr-0nnn100ooo0wwwww 14765: //BFFFO <ea>{Do:Dw},Dn |-|--2346|-|-UUUU|-**00|D M WXZP |1110_110_111_mmm_rrr-0nnn100ooo100www 14766: public static void irpBfffo () throws M68kException { 14767: int w = mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); //pcwz。拡張ワード 14768: if ((w & ~0b0111_111_111_111_111) != 0 || 14769: (w & 0b0000_111_111_000_000) > 0b0000_100_111_000_000 || 14770: (w & 0b0000_000_000_111_111) > 0b0000_000_000_100_111) { 14771: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 14772: throw M68kException.m6eSignal; 14773: } 14774: int n = w >> 12; 14775: int o = w << 31 - 11 >= 0 ? w >> 6 & 31 : XEiJ.regRn[w >> 6 & 7]; //o=offset 14776: w = -(w << 31 - 5 >= 0 ? w : XEiJ.regRn[w & 7]) & 31; //w=32-width。1<=width<=32なので0<=32-width<=31 14777: XEiJ.mpuCycleCount += 9; 14778: int ea = XEiJ.regOC & 63; 14779: int z; 14780: if (ea < XEiJ.EA_AR) { //BFFFO Dr{～} 14781: z = XEiJ.regRn[ea]; 14782: z = z << o | z >>> -o; //下位からはみ出したフィールドは上位に戻る 14783: } else { //BFFFO <mem>{～} 14784: int a = efaCntLong (ea) + (o >> 3); //フィールドの最上位ビットを含むバイトのアドレス 14785: int o7 = o & 7; 14786: z = 31 - w + o7 >> 3; //フィールドが跨ぐバイト境界の数。0～4 14787: z = (z == 0 ? mmuReadByteSignData (m60Address = a, XEiJ.regSRS) << 24 + o7 : //不要なバイトにアクセスしない 14788: z == 1 ? mmuReadWordSignData (m60Address = a, XEiJ.regSRS) << 16 + o7 : //020以上なのでアドレスエラーは出ない 14789: z == 2 ? (mmuReadWordSignData (m60Address = a, XEiJ.regSRS) << 8 | mmuReadByteZeroData (a + 2, XEiJ.regSRS)) << 8 + o7 : 14790: z == 3 ? mmuReadLongData (m60Address = a, XEiJ.regSRS) << o7 : 14791: mmuReadLongData (m60Address = a, XEiJ.regSRS) << o7 | mmuReadByteZeroData (m60Address = a + 4, XEiJ.regSRS) >>> 8 - o7); 14792: } 14793: if (true) { 14794: XEiJ.regRn[n] = Integer.numberOfLeadingZeros (z >>> w) - w + o; //ゼロ拡張してから1のビットを探す。見つからないときはoffset+widthになる 14795: } else { 14796: int t = z >>> w; 14797: if (t == 0) { 14798: XEiJ.regRn[n] = 32 - w + o; 14799: } else { 14800: int k = -(t >>> 16) >> 16 & 16; 14801: k += -(t >>> k + 8) >> 8 & 8; 14802: k += -(t >>> k + 4) >> 4 & 4; 14803: // bit3 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 14804: // bit2 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 14805: // bit1 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 14806: // bit0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 14807: XEiJ.regRn[n] = ((0b11_11_11_11_11_11_11_11_10_10_10_10_01_01_00_00 >>> (t >>> k << 1)) & 3) + k - w + o; //intのシフトカウントは下位5bitだけが使用される 14808: } 14809: } 14810: z >>= w; //符号拡張。下位のゴミを消す 14811: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 14812: } //irpBfffo 14813: 14814: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 14815: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 14816: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 14817: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 14818: //BFSET <ea>{#o:#w} |-|--2346|-|-UUUU|-**00|D M WXZ |1110_111_011_mmm_rrr-00000ooooo0wwwww 14819: //BFSET <ea>{#o:Dw} |-|--2346|-|-UUUU|-**00|D M WXZ |1110_111_011_mmm_rrr-00000ooooo100www 14820: //BFSET <ea>{Do:#w} |-|--2346|-|-UUUU|-**00|D M WXZ |1110_111_011_mmm_rrr-0000100ooo0wwwww 14821: //BFSET <ea>{Do:Dw} |-|--2346|-|-UUUU|-**00|D M WXZ |1110_111_011_mmm_rrr-0000100ooo100www 14822: public static void irpBfset () throws M68kException { 14823: int w = mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); //pcwz。拡張ワード 14824: if ((w & ~0b0000_111_111_111_111) != 0 || 14825: (w & 0b0000_111_111_000_000) > 0b0000_100_111_000_000 || 14826: (w & 0b0000_000_000_111_111) > 0b0000_000_000_100_111) { 14827: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 14828: throw M68kException.m6eSignal; 14829: } 14830: int o = w << 31 - 11 >= 0 ? w >> 6 & 31 : XEiJ.regRn[w >> 6 & 7]; //o=offset 14831: w = -(w << 31 - 5 >= 0 ? w : XEiJ.regRn[w & 7]) & 31; //w=32-width。1<=width<=32なので0<=32-width<=31 14832: XEiJ.mpuCycleCount += 8; 14833: int ea = XEiJ.regOC & 63; 14834: int z; 14835: if (ea < XEiJ.EA_AR) { //BFSET Dr{～} 14836: z = XEiJ.regRn[ea]; 14837: z = z << o | z >>> -o; //下位からはみ出したフィールドは上位に戻る 14838: int t = z | -1 << w; //フィールドの幅だけ1を並べる 14839: XEiJ.regRn[ea] = t << -o | t >>> o; 14840: } else { //BFSET <mem>{～} 14841: int a = efaCltLong (ea) + (o >> 3); //フィールドの最上位ビットを含むバイトのアドレス 14842: o &= 7; 14843: z = 31 - w + o >> 3; //フィールドが跨ぐバイト境界の数。0～4 14844: if (z == 0) { 14845: // <ea>{2,5} o=2,w=32-5=27 <ea> --abcde- 14846: int t = mmuModifyByteSignData (a, XEiJ.regSRS) << 24; // t --abcde- 00000000 00000000 00000000 不要なバイトにアクセスしない 14847: z = t << o; // z abcde-00 00000000 00000000 00000000 14848: // // -1<<w 11111000 00000000 00000000 00000000 14849: // // -1<<w>>>o 00111110 00000000 00000000 00000000 14850: // //t|-1<<w>>>o --11111- 00000000 00000000 00000000 14851: mmuWriteByteData (a, (t | -1 << w >>> o) >>> 24, XEiJ.regSRS); // <ea> --11111- 14852: } else if (z == 1) { 14853: // <ea>{7,5} o=7,w=32-5=27 <ea> -------a bcde---- 14854: int t = mmuModifyWordSignData (a, XEiJ.regSRS) << 16; // t -------a bcde---- 00000000 00000000 020以上なのでアドレスエラーは出ない 14855: z = t << o; // z abcde--- -0000000 00000000 00000000 14856: // // -1<<w 11111000 00000000 00000000 00000000 14857: // // -1<<w>>>o 00000001 11110000 00000000 00000000 14858: // //t|-1<<w>>>o -------1 1111---- 00000000 00000000 14859: mmuWriteWordData (a, (t | -1 << w >>> o) >>> 16, XEiJ.regSRS); // <ea> -------1 1111---- 14860: } else if (z == 2) { 14861: // <ea>{7,12} o=7,w=32-12=20 <ea> -------a bcdefghi jkl----- 14862: int t = mmuModifyWordSignData (a, XEiJ.regSRS) << 16 | mmuModifyByteZeroData (a + 2, XEiJ.regSRS) << 8; // t -------a bcdefghi jkl----- 00000000 14863: z = t << o; // z abcdefgh ijkl---- -0000000 00000000 14864: // // -1<<w 11111111 11110000 00000000 00000000 14865: // // -1<<w>>>o 00000001 11111111 11100000 00000000 14866: t |= -1 << w >>> o; // t -------1 11111111 111----- 00000000 14867: mmuWriteWordData (a, t >>> 16, XEiJ.regSRS); // <ea> -------1 11111111 jkl----- 14868: mmuWriteByteData (a + 2, t >>> 8, XEiJ.regSRS); // <ea> -------1 11111111 111----- 14869: } else if (z == 3) { 14870: // <ea>{7,19} o=7,w=32-19=13 <ea> -------a bcdefghi jklmnopq rs------ 14871: int t = mmuModifyLongData (a, XEiJ.regSRS); // t -------a bcdefghi jklmnopq rs------ 14872: z = t << o; // z abcdefgh ijklmnop qrs----- -0000000 14873: // // -1<<w 11111111 11111111 11100000 00000000 14874: // // -1<<w>>>o 00000001 11111111 11111111 11000000 14875: mmuWriteLongData (a, t | -1 << w >>> o, XEiJ.regSRS); // <ea> -------1 11111111 11111111 11------ 14876: } else { 14877: // <ea>{7,26} o=7,w=32-26=6 <ea> -------a bcdefghi jklmnopq rstuvwxy z------- 14878: int t = mmuModifyLongData (a, XEiJ.regSRS); // t -------a bcdefghi jklmnopq rstuvwxy 14879: z = t << o; // z abcdefgh ijklmnop qrstuvwx y0000000 14880: // -1>>>o 00000001 11111111 11111111 11111111 14881: mmuWriteLongData (a, t | -1 >>> o, XEiJ.regSRS); // <ea> -------1 11111111 11111111 11111111 14882: t = mmuModifyByteZeroData (a + 4, XEiJ.regSRS); // t 00000000 00000000 00000000 z------- 14883: // // t>>>8-o 00000000 00000000 00000000 0z------ 14884: z |= t >>> 8 - o; // z abcdefgh ijklmnop qrstuvwx yz------ 14885: // // -1<<8-o+w 11111111 11111111 11111111 10000000 14886: mmuWriteByteData (a + 4, t | -1 << 8 - o + w, XEiJ.regSRS); // <ea> -------1 11111111 11111111 11111111 1------- 14887: } 14888: } 14889: z >>= w; //符号拡張。下位のゴミを消す 14890: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 14891: } //irpBfset 14892: 14893: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 14894: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 14895: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 14896: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 14897: //BFINS Dn,<ea>{#o:#w} |-|--2346|-|-UUUU|-**00|D M WXZ |1110_111_111_mmm_rrr-0nnn0ooooo0wwwww 14898: //BFINS Dn,<ea>{#o:Dw} |-|--2346|-|-UUUU|-**00|D M WXZ |1110_111_111_mmm_rrr-0nnn0ooooo100www 14899: //BFINS Dn,<ea>{Do:#w} |-|--2346|-|-UUUU|-**00|D M WXZ |1110_111_111_mmm_rrr-0nnn100ooo0wwwww 14900: //BFINS Dn,<ea>{Do:Dw} |-|--2346|-|-UUUU|-**00|D M WXZ |1110_111_111_mmm_rrr-0nnn100ooo100www 14901: public static void irpBfins () throws M68kException { 14902: int w = mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); //pcwz。拡張ワード 14903: if ((w & ~0b0111_111_111_111_111) != 0 || 14904: (w & 0b0000_111_111_000_000) > 0b0000_100_111_000_000 || 14905: (w & 0b0000_000_000_111_111) > 0b0000_000_000_100_111) { 14906: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 14907: throw M68kException.m6eSignal; 14908: } 14909: int n = w >> 12; 14910: int o = w << 31 - 11 >= 0 ? w >> 6 & 31 : XEiJ.regRn[w >> 6 & 7]; //o=offset 14911: w = -(w << 31 - 5 >= 0 ? w : XEiJ.regRn[w & 7]) & 31; //w=32-width。1<=width<=32なので0<=32-width<=31 14912: XEiJ.mpuCycleCount += 6; 14913: int ea = XEiJ.regOC & 63; 14914: int z = XEiJ.regRn[n] << w; //z=Dn<<-width 14915: if (ea < XEiJ.EA_AR) { //BFINS Dn,Dr{～} 14916: // Dr{30,5} o=30,w=32-5=27 t=Dr cde----- -------- -------- ------ab 14917: // t<<o ab000000 00000000 00000000 00000000 14918: // t>>>-o 00cde--- -------- -------- -------- 14919: // t<<o|t>>>-o abcde--- -------- -------- -------- 14920: // -1<<w 11111000 00000000 00000000 00000000 14921: // ~(-1<<w) 00000111 11111111 11111111 11111111 14922: // (t<<o|t>>>-o)&~(-1<<w) 00000--- -------- -------- -------- 14923: // r[n] -------- -------- -------- ---ABCDE 14924: // z=r[n]<<w ABCDE000 00000000 00000000 00000000 14925: // t=(t<<o|t>>>-o)&~(-1<<w)|z ABCDE--- -------- -------- -------- 14926: // t<<-o CDE----- -------- -------- ------00 14927: // t>>>o 00000000 00000000 00000000 000000AB 14928: // t<<-o|t>>>o CDE----- -------- -------- ------AB 14929: int t = XEiJ.regRn[ea]; 14930: t = (t << o | t >>> -o) & ~(-1 << w) | z; 14931: XEiJ.regRn[ea] = t << -o | t >>> o; 14932: } else { //BFINS Dn,<mem>{～} 14933: int a = efaCltLong (ea) + (o >> 3); //フィールドの最上位ビットを含むバイトのアドレス 14934: o &= 7; 14935: n = 31 - w + o >> 3; //フィールドが跨ぐバイト境界の数。0～4 14936: if (n == 0) { 14937: // <ea>{2,5} o=2,w=32-5=27 <ea> --abcde- 14938: // XEiJ.busRbs(a)<<24 --abcde- 00000000 00000000 00000000 14939: // -1<<w 11111000 00000000 00000000 00000000 14940: // -1<<w>>>o 00111110 00000000 00000000 00000000 14941: // ~(-1<<w>>>o) 11000001 11111111 11111111 11111111 14942: // XEiJ.busRbs(a)<<24&~(-1<<w>>>o) --00000- 00000000 00000000 00000000 14943: // r[n] -------- -------- -------- ---ABCDE 14944: // z=r[n]<<w ABCDE000 00000000 00000000 00000000 14945: // z>>>o 00ABCDE0 00000000 00000000 00000000 14946: // XEiJ.busRbs(a)<<24&~(-1<<w>>>o)|z>>>o --ABCDE- 00000000 00000000 00000000 14947: mmuWriteByteData (a, (mmuModifyByteSignData (a, XEiJ.regSRS) << 24 & ~(-1 << w >>> o) | z >>> o) >>> 24, XEiJ.regSRS); 14948: } else if (n == 1) { 14949: // <ea>{3,11} o=3,w=32-11=21 <ea> ---abcde fghijk-- 14950: // rws(a)<<16 ---abcde fghijk-- 00000000 00000000 14951: // -1<<w 11111111 11100000 00000000 00000000 14952: // -1<<w>>>o 00011111 11111100 00000000 00000000 14953: // ~(-1<<w>>>o) 11100000 00000011 11111111 11111111 14954: // rws(a)<<16&~(-1<<w>>>o) ---00000 000000-- 00000000 00000000 14955: // r[n] -------- -------- -----ABC DEFGHIJK 14956: // z=r[n]<<w ABCDEFGH IJK00000 00000000 00000000 14957: // z>>>o 000ABCDE FGHIJK00 00000000 00000000 14958: // rws(a)<<16&~(-1<<w>>>o)|z>>>o ---ABCDE FGHIJK-- 00000000 00000000 14959: mmuWriteWordData (a, (mmuModifyWordSignData (a, XEiJ.regSRS) << 16 & ~(-1 << w >>> o) | z >>> o) >>> 16, XEiJ.regSRS); 14960: } else if (n == 2) { 14961: // <ea>{4,17} o=4,w=32-17=15 <ea> ----abcd efghijkl mnopq--- 14962: // rws(a)<<16|rbz(a+2)<<8 ----abcd efghijkl mnopq--- 00000000 14963: // -1<<w 11111111 11111111 10000000 00000000 14964: // -1<<w>>>o 00001111 11111111 11111000 00000000 14965: // ~(-1<<w>>>o) 11110000 00000000 00000111 11111111 14966: // (rws(a)<<16|rbz(a+2)<<8)&~(-1<<w>>>o) ----0000 00000000 00000--- 00000000 14967: // r[n] -------- -------A BCDEFGHI JKLMNOPQ 14968: // z=r[n]<<w ABCDEFGH IJKLMNOP Q0000000 00000000 14969: // z>>>o 0000ABCD EFGHIJKL MNOPQ000 00000000 14970: // (rws(a)<<16|rbz(a+2)<<8)&~(-1<<w>>>o)|z>>>o ----ABCD EFGHIJKL MNOPQ--- 00000000 14971: int t = (mmuModifyWordSignData (a, XEiJ.regSRS) << 16 | mmuModifyByteZeroData (a + 2, XEiJ.regSRS) << 8) & ~(-1 << w >>> o) | z >>> o; 14972: mmuWriteWordData (a, t >>> 16, XEiJ.regSRS); 14973: mmuWriteByteData (a + 2, t >>> 8, XEiJ.regSRS); 14974: } else if (n == 3) { 14975: // <ea>{5,23} o=5,w=32-23=9 <ea> -----abc defghijk lmnopqrs tuvw---- 14976: // rls(a) -----abc defghijk lmnopqrs tuvw---- 14977: // -1<<w 11111111 11111111 11111110 00000000 14978: // -1<<w>>>o 00000111 11111111 11111111 11110000 14979: // ~(-1<<w>>>o) 11111000 00000000 00000000 00001111 14980: // rls(a)&~(-1<<w>>>o) -----000 00000000 00000000 0000---- 14981: // r[n] -------- -ABCDEFG HIJKLMNO PQRSTUVW 14982: // z=r[n]<<w ABCDEFGH IJKLMNOP QRSTUVW0 00000000 14983: // z>>>o 00000ABC DEFGHIJK LMNOPQRS TUVW0000 14984: // rls(a)&~(-1<<w>>>o)|z>>>o -----ABC DEFGHIJK LMNOPQRS TUVW---- 14985: mmuWriteLongData (a, mmuModifyLongData (a, XEiJ.regSRS) & ~(-1 << w >>> o) | z >>> o, XEiJ.regSRS); 14986: } else { 14987: // <ea>{6,29} o=6,w=32-29=3 <ea> ------ab cdefghij klmnopqr stuvwxyz abc----- 14988: // rls(a) ------ab cdefghij klmnopqr stuvwxyz 14989: // -1>>>o 00000011 11111111 11111111 11111111 14990: // ~(-1>>>o) 11111100 00000000 00000000 00000000 14991: // rls(a)&~(-1>>>o) ------00 00000000 00000000 00000000 14992: // r[n] ---ABCDE FGHIJKLM NOPQRSTU VWXYZABC 14993: // z=r[n]<<w ABCDEFGH IJKLMNOP QRSTUVWX YZABC000 14994: // z>>>o 000000AB CDEFGHIJ KLMNOPQR STUVWXYZ 14995: // rls(a)&~(-1>>>o)|z>>>o ------AB CDEFGHIJ KLMNOPQR STUVWXYZ 14996: mmuWriteLongData (a, mmuModifyLongData (a, XEiJ.regSRS) & ~(-1 >>> o) | z >>> o, XEiJ.regSRS); 14997: // rbz(a+4) 00000000 00000000 00000000 abc----- 14998: // -1<<8-o+w 11111111 11111111 11111111 11100000 14999: // ~(-1<<8-o+w) 00000000 00000000 00000000 00011111 15000: // rbz(a+4)&~(-1<<8-o+w) 00000000 00000000 00000000 000----- 15001: // z<<8-o CDEFGHIJ KLMNOPQR STUVWXYZ ABC00000 15002: // rbz(a+4)&~(-1<<8-o+w)|z<<8-o CDEFGHIJ KLMNOPQR STUVWXYZ ABC----- 15003: mmuWriteByteData (a + 4, mmuModifyByteZeroData (a + 4, XEiJ.regSRS) & ~(-1 << 8 - o + w) | z << 8 - o, XEiJ.regSRS); 15004: } 15005: } 15006: //zは上位に寄ったままだが下位の空きは0なのでそのままテストする 15007: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 15008: } //irpBfins 15009: 15010: //浮動小数点例外 15011: // 48 BSUN FP分岐または比較不能状態でのセット 15012: // 49 INEX FP不正確な結果 15013: // 50 DZ FPゼロによる除算 15014: // 51 UNFL FPアンダーフロー 15015: // 52 OPERR FPオペランドエラー 15016: // 53 OVFL FPオーバーフロー 15017: // 54 SNAN FPシグナリングNAN 15018: // 55 FP未実装データ型 15019: //FPSRのビットオフセット→例外ベクタ番号 15020: /* 15021: public static final int[] FP_OFFSET_TO_NUMBER = { 15022: 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 15023: 48, //16 15 BSUN 48 BSUN FP分岐または比較不能状態でのセット 15024: 54, //17 14 SNAN 54 SNAN FPシグナリングNAN 15025: 52, //18 13 OPERR 52 OPERR FPオペランドエラー 15026: 53, //19 12 OVFL 53 OVFL FPオーバーフロー 15027: 51, //20 11 UNFL 51 UNFL FPアンダーフロー 15028: 50, //21 10 DZ 50 DZ FPゼロによる除算 15029: 49, //22 9 INEX2 49 INEX FP不正確な結果 15030: 49, //23 8 INEX1 49 INEX FP不正確な結果 15031: 0, 0, 0, 0, 0, 0, 0, 0, 15032: }; 15033: */ 15034: public static final byte[] FP_OFFSET_TO_NUMBER = "\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\00006453211\0\0\0\0\0\0\0\0".getBytes (XEiJ.ISO_8859_1); 15035: 15036: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 15037: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 15038: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 15039: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 15040: //FTST.X FPm |-|--CC46|-|-----|-----| |1111_001_000_000_000-000mmm0000111010 15041: //FMOVE.X FPm,FPn |-|--CC46|-|-----|-----| |1111_001_000_000_000-000mmmnnn0000000 15042: //FINT.X FPm,FPn |-|--CCS6|-|-----|-----| |1111_001_000_000_000-000mmmnnn0000001 15043: //FSINH.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0000010 15044: //FINTRZ.X FPm,FPn |-|--CCS6|-|-----|-----| |1111_001_000_000_000-000mmmnnn0000011 15045: //FSQRT.X FPm,FPn |-|--CC46|-|-----|-----| |1111_001_000_000_000-000mmmnnn0000100 15046: //FLOGNP1.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0000110 15047: //FETOXM1.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0001000 15048: //FTANH.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0001001 15049: //FATAN.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0001010 15050: //FASIN.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0001100 15051: //FATANH.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0001101 15052: //FSIN.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0001110 15053: //FTAN.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0001111 15054: //FETOX.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0010000 15055: //FTWOTOX.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0010001 15056: //FTENTOX.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0010010 15057: //FLOGN.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0010100 15058: //FLOG10.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0010101 15059: //FLOG2.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0010110 15060: //FABS.X FPm,FPn |-|--CC46|-|-----|-----| |1111_001_000_000_000-000mmmnnn0011000 15061: //FCOSH.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0011001 15062: //FNEG.X FPm,FPn |-|--CC46|-|-----|-----| |1111_001_000_000_000-000mmmnnn0011010 15063: //FACOS.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0011100 15064: //FCOS.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0011101 15065: //FGETEXP.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0011110 15066: //FGETMAN.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0011111 15067: //FDIV.X FPm,FPn |-|--CC46|-|-----|-----| |1111_001_000_000_000-000mmmnnn0100000 15068: //FMOD.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0100001 15069: //FADD.X FPm,FPn |-|--CC46|-|-----|-----| |1111_001_000_000_000-000mmmnnn0100010 15070: //FMUL.X FPm,FPn |-|--CC46|-|-----|-----| |1111_001_000_000_000-000mmmnnn0100011 15071: //FSGLDIV.X FPm,FPn |-|--CCS6|-|-----|-----| |1111_001_000_000_000-000mmmnnn0100100 15072: //FREM.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0100101 15073: //FSCALE.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0100110 15074: //FSGLMUL.X FPm,FPn |-|--CCS6|-|-----|-----| |1111_001_000_000_000-000mmmnnn0100111 15075: //FSUB.X FPm,FPn |-|--CC46|-|-----|-----| |1111_001_000_000_000-000mmmnnn0101000 15076: //FCMP.X FPm,FPn |-|--CC46|-|-----|-----| |1111_001_000_000_000-000mmmnnn0111000 15077: //FSMOVE.X FPm,FPn |-|----46|-|-----|-----| |1111_001_000_000_000-000mmmnnn1000000 15078: //FSSQRT.X FPm,FPn |-|----46|-|-----|-----| |1111_001_000_000_000-000mmmnnn1000001 15079: //FDMOVE.X FPm,FPn |-|----46|-|-----|-----| |1111_001_000_000_000-000mmmnnn1000100 15080: //FDSQRT.X FPm,FPn |-|----46|-|-----|-----| |1111_001_000_000_000-000mmmnnn1000101 15081: //FSABS.X FPm,FPn |-|----46|-|-----|-----| |1111_001_000_000_000-000mmmnnn1011000 15082: //FSNEG.X FPm,FPn |-|----46|-|-----|-----| |1111_001_000_000_000-000mmmnnn1011010 15083: //FDABS.X FPm,FPn |-|----46|-|-----|-----| |1111_001_000_000_000-000mmmnnn1011100 15084: //FDNEG.X FPm,FPn |-|----46|-|-----|-----| |1111_001_000_000_000-000mmmnnn1011110 15085: //FSDIV.X FPm,FPn |-|----46|-|-----|-----| |1111_001_000_000_000-000mmmnnn1100000 15086: //FSADD.X FPm,FPn |-|----46|-|-----|-----| |1111_001_000_000_000-000mmmnnn1100010 15087: //FSMUL.X FPm,FPn |-|----46|-|-----|-----| |1111_001_000_000_000-000mmmnnn1100011 15088: //FDDIV.X FPm,FPn |-|----46|-|-----|-----| |1111_001_000_000_000-000mmmnnn1100100 15089: //FDADD.X FPm,FPn |-|----46|-|-----|-----| |1111_001_000_000_000-000mmmnnn1100110 15090: //FDMUL.X FPm,FPn |-|----46|-|-----|-----| |1111_001_000_000_000-000mmmnnn1100111 15091: //FSSUB.X FPm,FPn |-|----46|-|-----|-----| |1111_001_000_000_000-000mmmnnn1101000 15092: //FDSUB.X FPm,FPn |-|----46|-|-----|-----| |1111_001_000_000_000-000mmmnnn1101100 15093: //FSINCOS.X FPm,FPc:FPs |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmsss0110ccc 15094: //FMOVECR.X #ccc,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-010111nnn0cccccc 15095: //FMOVE.L FPn,<ea> |-|--CC46|-|-----|-----|D M+-WXZ |1111_001_000_mmm_rrr-011000nnn0000000 15096: //FMOVE.S FPn,<ea> |-|--CC46|-|-----|-----|D M+-WXZ |1111_001_000_mmm_rrr-011001nnn0000000 15097: //FMOVE.W FPn,<ea> |-|--CC46|-|-----|-----|D M+-WXZ |1111_001_000_mmm_rrr-011100nnn0000000 15098: //FMOVE.B FPn,<ea> |-|--CC46|-|-----|-----|D M+-WXZ |1111_001_000_mmm_rrr-011110nnn0000000 15099: //FMOVE.L FPIAR,<ea> |-|--CC46|-|-----|-----|DAM+-WXZ |1111_001_000_mmm_rrr-1010010000000000 15100: //FMOVEM.L FPIAR,<ea> |-|--CC46|-|-----|-----|DAM+-WXZ |1111_001_000_mmm_rrr-1010010000000000 15101: //FMOVE.L FPSR,<ea> |-|--CC46|-|-----|-----|D M+-WXZ |1111_001_000_mmm_rrr-1010100000000000 15102: //FMOVEM.L FPSR,<ea> |-|--CC46|-|-----|-----|D M+-WXZ |1111_001_000_mmm_rrr-1010100000000000 15103: //FMOVE.L FPCR,<ea> |-|--CC46|-|-----|-----|D M+-WXZ |1111_001_000_mmm_rrr-1011000000000000 15104: //FMOVEM.L FPCR,<ea> |-|--CC46|-|-----|-----|D M+-WXZ |1111_001_000_mmm_rrr-1011000000000000 15105: //FTST.L <ea> |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-0100000000111010 15106: //FMOVE.L <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0000000 15107: //FINT.L <ea>,FPn |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0000001 15108: //FSINH.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0000010 15109: //FINTRZ.L <ea>,FPn |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0000011 15110: //FSQRT.L <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0000100 15111: //FLOGNP1.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0000110 15112: //FETOXM1.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0001000 15113: //FTANH.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0001001 15114: //FATAN.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0001010 15115: //FASIN.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0001100 15116: //FATANH.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0001101 15117: //FSIN.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0001110 15118: //FTAN.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0001111 15119: //FETOX.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0010000 15120: //FTWOTOX.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0010001 15121: //FTENTOX.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0010010 15122: //FLOGN.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0010100 15123: //FLOG10.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0010101 15124: //FLOG2.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0010110 15125: //FABS.L <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0011000 15126: //FCOSH.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0011001 15127: //FNEG.L <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0011010 15128: //FACOS.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0011100 15129: //FCOS.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0011101 15130: //FGETEXP.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0011110 15131: //FGETMAN.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0011111 15132: //FDIV.L <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0100000 15133: //FMOD.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0100001 15134: //FADD.L <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0100010 15135: //FMUL.L <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0100011 15136: //FSGLDIV.L <ea>,FPn |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0100100 15137: //FREM.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0100101 15138: //FSCALE.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0100110 15139: //FSGLMUL.L <ea>,FPn |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0100111 15140: //FSUB.L <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0101000 15141: //FCMP.L <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0111000 15142: //FSMOVE.L <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn1000000 15143: //FSSQRT.L <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn1000001 15144: //FDMOVE.L <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn1000100 15145: //FDSQRT.L <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn1000101 15146: //FSABS.L <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn1011000 15147: //FSNEG.L <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn1011010 15148: //FDABS.L <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn1011100 15149: //FDNEG.L <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn1011110 15150: //FSDIV.L <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn1100000 15151: //FSADD.L <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn1100010 15152: //FSMUL.L <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn1100011 15153: //FDDIV.L <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn1100100 15154: //FDADD.L <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn1100110 15155: //FDMUL.L <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn1100111 15156: //FSSUB.L <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn1101000 15157: //FDSUB.L <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn1101100 15158: //FSINCOS.L <ea>,FPc:FPs |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000sss0110ccc 15159: //FTST.S <ea> |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-0100010000111010 15160: //FMOVE.S <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0000000 15161: //FINT.S <ea>,FPn |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0000001 15162: //FSINH.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0000010 15163: //FINTRZ.S <ea>,FPn |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0000011 15164: //FSQRT.S <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0000100 15165: //FLOGNP1.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0000110 15166: //FETOXM1.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0001000 15167: //FTANH.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0001001 15168: //FATAN.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0001010 15169: //FASIN.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0001100 15170: //FATANH.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0001101 15171: //FSIN.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0001110 15172: //FTAN.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0001111 15173: //FETOX.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0010000 15174: //FTWOTOX.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0010001 15175: //FTENTOX.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0010010 15176: //FLOGN.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0010100 15177: //FLOG10.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0010101 15178: //FLOG2.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0010110 15179: //FABS.S <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0011000 15180: //FCOSH.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0011001 15181: //FNEG.S <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0011010 15182: //FACOS.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0011100 15183: //FCOS.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0011101 15184: //FGETEXP.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0011110 15185: //FGETMAN.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0011111 15186: //FDIV.S <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0100000 15187: //FMOD.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0100001 15188: //FADD.S <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0100010 15189: //FMUL.S <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0100011 15190: //FSGLDIV.S <ea>,FPn |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0100100 15191: //FREM.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0100101 15192: //FSCALE.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0100110 15193: //FSGLMUL.S <ea>,FPn |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0100111 15194: //FSUB.S <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0101000 15195: //FCMP.S <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0111000 15196: //FSMOVE.S <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn1000000 15197: //FSSQRT.S <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn1000001 15198: //FDMOVE.S <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn1000100 15199: //FDSQRT.S <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn1000101 15200: //FSABS.S <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn1011000 15201: //FSNEG.S <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn1011010 15202: //FDABS.S <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn1011100 15203: //FDNEG.S <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn1011110 15204: //FSDIV.S <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn1100000 15205: //FSADD.S <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn1100010 15206: //FSMUL.S <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn1100011 15207: //FDDIV.S <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn1100100 15208: //FDADD.S <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn1100110 15209: //FDMUL.S <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn1100111 15210: //FSSUB.S <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn1101000 15211: //FDSUB.S <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn1101100 15212: //FSINCOS.S <ea>,FPc:FPs |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001sss0110ccc 15213: //FTST.W <ea> |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-0101000000111010 15214: //FMOVE.W <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0000000 15215: //FINT.W <ea>,FPn |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0000001 15216: //FSINH.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0000010 15217: //FINTRZ.W <ea>,FPn |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0000011 15218: //FSQRT.W <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0000100 15219: //FLOGNP1.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0000110 15220: //FETOXM1.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0001000 15221: //FTANH.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0001001 15222: //FATAN.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0001010 15223: //FASIN.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0001100 15224: //FATANH.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0001101 15225: //FSIN.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0001110 15226: //FTAN.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0001111 15227: //FETOX.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0010000 15228: //FTWOTOX.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0010001 15229: //FTENTOX.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0010010 15230: //FLOGN.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0010100 15231: //FLOG10.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0010101 15232: //FLOG2.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0010110 15233: //FABS.W <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0011000 15234: //FCOSH.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0011001 15235: //FNEG.W <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0011010 15236: //FACOS.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0011100 15237: //FCOS.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0011101 15238: //FGETEXP.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0011110 15239: //FGETMAN.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0011111 15240: //FDIV.W <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0100000 15241: //FMOD.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0100001 15242: //FADD.W <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0100010 15243: //FMUL.W <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0100011 15244: //FSGLDIV.W <ea>,FPn |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0100100 15245: //FREM.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0100101 15246: //FSCALE.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0100110 15247: //FSGLMUL.W <ea>,FPn |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0100111 15248: //FSUB.W <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0101000 15249: //FCMP.W <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0111000 15250: //FSMOVE.W <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn1000000 15251: //FSSQRT.W <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn1000001 15252: //FDMOVE.W <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn1000100 15253: //FDSQRT.W <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn1000101 15254: //FSABS.W <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn1011000 15255: //FSNEG.W <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn1011010 15256: //FDABS.W <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn1011100 15257: //FDNEG.W <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn1011110 15258: //FSDIV.W <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn1100000 15259: //FSADD.W <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn1100010 15260: //FSMUL.W <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn1100011 15261: //FDDIV.W <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn1100100 15262: //FDADD.W <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn1100110 15263: //FDMUL.W <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn1100111 15264: //FSSUB.W <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn1101000 15265: //FDSUB.W <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn1101100 15266: //FSINCOS.W <ea>,FPc:FPs |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100sss0110ccc 15267: //FTST.B <ea> |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-0101100000111010 15268: //FMOVE.B <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0000000 15269: //FINT.B <ea>,FPn |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0000001 15270: //FSINH.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0000010 15271: //FINTRZ.B <ea>,FPn |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0000011 15272: //FSQRT.B <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0000100 15273: //FLOGNP1.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0000110 15274: //FETOXM1.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0001000 15275: //FTANH.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0001001 15276: //FATAN.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0001010 15277: //FASIN.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0001100 15278: //FATANH.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0001101 15279: //FSIN.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0001110 15280: //FTAN.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0001111 15281: //FETOX.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0010000 15282: //FTWOTOX.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0010001 15283: //FTENTOX.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0010010 15284: //FLOGN.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0010100 15285: //FLOG10.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0010101 15286: //FLOG2.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0010110 15287: //FABS.B <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0011000 15288: //FCOSH.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0011001 15289: //FNEG.B <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0011010 15290: //FACOS.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0011100 15291: //FCOS.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0011101 15292: //FGETEXP.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0011110 15293: //FGETMAN.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0011111 15294: //FDIV.B <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0100000 15295: //FMOD.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0100001 15296: //FADD.B <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0100010 15297: //FMUL.B <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0100011 15298: //FSGLDIV.B <ea>,FPn |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0100100 15299: //FREM.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0100101 15300: //FSCALE.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0100110 15301: //FSGLMUL.B <ea>,FPn |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0100111 15302: //FSUB.B <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0101000 15303: //FCMP.B <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0111000 15304: //FSMOVE.B <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn1000000 15305: //FSSQRT.B <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn1000001 15306: //FDMOVE.B <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn1000100 15307: //FDSQRT.B <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn1000101 15308: //FSABS.B <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn1011000 15309: //FSNEG.B <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn1011010 15310: //FDABS.B <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn1011100 15311: //FDNEG.B <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn1011110 15312: //FSDIV.B <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn1100000 15313: //FSADD.B <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn1100010 15314: //FSMUL.B <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn1100011 15315: //FDDIV.B <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn1100100 15316: //FDADD.B <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn1100110 15317: //FDMUL.B <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn1100111 15318: //FSSUB.B <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn1101000 15319: //FDSUB.B <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn1101100 15320: //FSINCOS.B <ea>,FPc:FPs |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110sss0110ccc 15321: //FMOVE.L <ea>,FPIAR |-|--CC46|-|-----|-----|DAM+-WXZPI|1111_001_000_mmm_rrr-1000010000000000 15322: //FMOVEM.L <ea>,FPIAR |-|--CC46|-|-----|-----|DAM+-WXZPI|1111_001_000_mmm_rrr-1000010000000000 15323: //FMOVE.L <ea>,FPSR |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-1000100000000000 15324: //FMOVEM.L <ea>,FPSR |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-1000100000000000 15325: //FMOVE.L <ea>,FPCR |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-1001000000000000 15326: //FMOVEM.L <ea>,FPCR |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-1001000000000000 15327: //FMOVE.X FPn,<ea> |-|--CC46|-|-----|-----| M+-WXZ |1111_001_000_mmm_rrr-011010nnn0000000 15328: //FMOVE.P FPn,<ea>{#k} |-|--CCSS|-|-----|-----| M+-WXZ |1111_001_000_mmm_rrr-011011nnnkkkkkkk 15329: //FMOVE.D FPn,<ea> |-|--CC46|-|-----|-----| M+-WXZ |1111_001_000_mmm_rrr-011101nnn0000000 15330: //FMOVE.P FPn,<ea>{Dk} |-|--CCSS|-|-----|-----| M+-WXZ |1111_001_000_mmm_rrr-011111nnnkkk0000 15331: //FMOVEM.L FPSR/FPIAR,<ea> |-|--CC46|-|-----|-----| M+-WXZ |1111_001_000_mmm_rrr-1010110000000000 15332: //FMOVEM.L FPCR/FPIAR,<ea> |-|--CC46|-|-----|-----| M+-WXZ |1111_001_000_mmm_rrr-1011010000000000 15333: //FMOVEM.L FPCR/FPSR,<ea> |-|--CC46|-|-----|-----| M+-WXZ |1111_001_000_mmm_rrr-1011100000000000 15334: //FMOVEM.L FPCR/FPSR/FPIAR,<ea> |-|--CC46|-|-----|-----| M+-WXZ |1111_001_000_mmm_rrr-1011110000000000 15335: //FMOVEM.X #<data>,<ea> |-|--CC46|-|-----|-----| M WXZ |1111_001_000_mmm_rrr-11110000dddddddd 15336: //FMOVEM.X <list>,<ea> |-|--CC46|-|-----|-----| M WXZ |1111_001_000_mmm_rrr-11110000llllllll 15337: //FMOVEM.X Dl,<ea> |-|--CC4S|-|-----|-----| M WXZ |1111_001_000_mmm_rrr-111110000lll0000 15338: //FMOVEM.L <ea>,FPSR/FPIAR |-|--CC46|-|-----|-----| M+-WXZP |1111_001_000_mmm_rrr-1000110000000000 15339: //FMOVEM.L <ea>,FPCR/FPIAR |-|--CC46|-|-----|-----| M+-WXZP |1111_001_000_mmm_rrr-1001010000000000 15340: //FMOVEM.L <ea>,FPCR/FPSR |-|--CC46|-|-----|-----| M+-WXZP |1111_001_000_mmm_rrr-1001100000000000 15341: //FMOVEM.L <ea>,FPCR/FPSR/FPIAR |-|--CC46|-|-----|-----| M+-WXZP |1111_001_000_mmm_rrr-1001110000000000 15342: //FMOVEM.X <ea>,#<data> |-|--CC46|-|-----|-----| M+ WXZP |1111_001_000_mmm_rrr-11010000dddddddd 15343: //FMOVEM.X <ea>,<list> |-|--CC46|-|-----|-----| M+ WXZP |1111_001_000_mmm_rrr-11010000llllllll 15344: //FMOVEM.X <ea>,Dl |-|--CC4S|-|-----|-----| M+ WXZP |1111_001_000_mmm_rrr-110110000lll0000 15345: //FTST.X <ea> |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-0100100000111010 15346: //FMOVE.X <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0000000 15347: //FINT.X <ea>,FPn |-|--CCS6|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0000001 15348: //FSINH.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0000010 15349: //FINTRZ.X <ea>,FPn |-|--CCS6|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0000011 15350: //FSQRT.X <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0000100 15351: //FLOGNP1.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0000110 15352: //FETOXM1.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0001000 15353: //FTANH.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0001001 15354: //FATAN.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0001010 15355: //FASIN.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0001100 15356: //FATANH.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0001101 15357: //FSIN.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0001110 15358: //FTAN.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0001111 15359: //FETOX.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0010000 15360: //FTWOTOX.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0010001 15361: //FTENTOX.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0010010 15362: //FLOGN.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0010100 15363: //FLOG10.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0010101 15364: //FLOG2.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0010110 15365: //FABS.X <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0011000 15366: //FCOSH.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0011001 15367: //FNEG.X <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0011010 15368: //FACOS.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0011100 15369: //FCOS.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0011101 15370: //FGETEXP.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0011110 15371: //FGETMAN.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0011111 15372: //FDIV.X <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0100000 15373: //FMOD.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0100001 15374: //FADD.X <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0100010 15375: //FMUL.X <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0100011 15376: //FSGLDIV.X <ea>,FPn |-|--CCS6|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0100100 15377: //FREM.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0100101 15378: //FSCALE.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0100110 15379: //FSGLMUL.X <ea>,FPn |-|--CCS6|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0100111 15380: //FSUB.X <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0101000 15381: //FCMP.X <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0111000 15382: //FSMOVE.X <ea>,FPn |-|----46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn1000000 15383: //FSSQRT.X <ea>,FPn |-|----46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn1000001 15384: //FDMOVE.X <ea>,FPn |-|----46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn1000100 15385: //FDSQRT.X <ea>,FPn |-|----46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn1000101 15386: //FSABS.X <ea>,FPn |-|----46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn1011000 15387: //FSNEG.X <ea>,FPn |-|----46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn1011010 15388: //FDABS.X <ea>,FPn |-|----46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn1011100 15389: //FDNEG.X <ea>,FPn |-|----46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn1011110 15390: //FSDIV.X <ea>,FPn |-|----46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn1100000 15391: //FSADD.X <ea>,FPn |-|----46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn1100010 15392: //FSMUL.X <ea>,FPn |-|----46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn1100011 15393: //FDDIV.X <ea>,FPn |-|----46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn1100100 15394: //FDADD.X <ea>,FPn |-|----46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn1100110 15395: //FDMUL.X <ea>,FPn |-|----46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn1100111 15396: //FSSUB.X <ea>,FPn |-|----46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn1101000 15397: //FDSUB.X <ea>,FPn |-|----46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn1101100 15398: //FSINCOS.X <ea>,FPc:FPs |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010sss0110ccc 15399: //FTST.P <ea> |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-0100110000111010 15400: //FMOVE.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0000000 15401: //FINT.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0000001 15402: //FSINH.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0000010 15403: //FINTRZ.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0000011 15404: //FSQRT.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0000100 15405: //FLOGNP1.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0000110 15406: //FETOXM1.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0001000 15407: //FTANH.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0001001 15408: //FATAN.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0001010 15409: //FASIN.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0001100 15410: //FATANH.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0001101 15411: //FSIN.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0001110 15412: //FTAN.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0001111 15413: //FETOX.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0010000 15414: //FTWOTOX.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0010001 15415: //FTENTOX.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0010010 15416: //FLOGN.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0010100 15417: //FLOG10.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0010101 15418: //FLOG2.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0010110 15419: //FABS.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0011000 15420: //FCOSH.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0011001 15421: //FNEG.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0011010 15422: //FACOS.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0011100 15423: //FCOS.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0011101 15424: //FGETEXP.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0011110 15425: //FGETMAN.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0011111 15426: //FDIV.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0100000 15427: //FMOD.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0100001 15428: //FADD.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0100010 15429: //FMUL.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0100011 15430: //FSGLDIV.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0100100 15431: //FREM.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0100101 15432: //FSCALE.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0100110 15433: //FSGLMUL.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0100111 15434: //FSUB.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0101000 15435: //FCMP.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0111000 15436: //FSMOVE.P <ea>,FPn |-|----SS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn1000000 15437: //FSSQRT.P <ea>,FPn |-|----SS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn1000001 15438: //FDMOVE.P <ea>,FPn |-|----SS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn1000100 15439: //FDSQRT.P <ea>,FPn |-|----SS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn1000101 15440: //FSABS.P <ea>,FPn |-|----SS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn1011000 15441: //FSNEG.P <ea>,FPn |-|----SS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn1011010 15442: //FDABS.P <ea>,FPn |-|----SS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn1011100 15443: //FDNEG.P <ea>,FPn |-|----SS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn1011110 15444: //FSDIV.P <ea>,FPn |-|----SS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn1100000 15445: //FSADD.P <ea>,FPn |-|----SS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn1100010 15446: //FSMUL.P <ea>,FPn |-|----SS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn1100011 15447: //FDDIV.P <ea>,FPn |-|----SS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn1100100 15448: //FDADD.P <ea>,FPn |-|----SS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn1100110 15449: //FDMUL.P <ea>,FPn |-|----SS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn1100111 15450: //FSSUB.P <ea>,FPn |-|----SS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn1101000 15451: //FDSUB.P <ea>,FPn |-|----SS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn1101100 15452: //FSINCOS.P <ea>,FPc:FPs |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011sss0110ccc 15453: //FTST.D <ea> |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-0101010000111010 15454: //FMOVE.D <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0000000 15455: //FINT.D <ea>,FPn |-|--CCS6|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0000001 15456: //FSINH.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0000010 15457: //FINTRZ.D <ea>,FPn |-|--CCS6|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0000011 15458: //FSQRT.D <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0000100 15459: //FLOGNP1.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0000110 15460: //FETOXM1.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0001000 15461: //FTANH.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0001001 15462: //FATAN.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0001010 15463: //FASIN.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0001100 15464: //FATANH.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0001101 15465: //FSIN.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0001110 15466: //FTAN.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0001111 15467: //FETOX.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0010000 15468: //FTWOTOX.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0010001 15469: //FTENTOX.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0010010 15470: //FLOGN.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0010100 15471: //FLOG10.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0010101 15472: //FLOG2.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0010110 15473: //FABS.D <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0011000 15474: //FCOSH.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0011001 15475: //FNEG.D <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0011010 15476: //FACOS.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0011100 15477: //FCOS.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0011101 15478: //FGETEXP.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0011110 15479: //FGETMAN.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0011111 15480: //FDIV.D <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0100000 15481: //FMOD.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0100001 15482: //FADD.D <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0100010 15483: //FMUL.D <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0100011 15484: //FSGLDIV.D <ea>,FPn |-|--CCS6|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0100100 15485: //FREM.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0100101 15486: //FSCALE.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0100110 15487: //FSGLMUL.D <ea>,FPn |-|--CCS6|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0100111 15488: //FSUB.D <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0101000 15489: //FCMP.D <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0111000 15490: //FSMOVE.D <ea>,FPn |-|----46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn1000000 15491: //FSSQRT.D <ea>,FPn |-|----46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn1000001 15492: //FDMOVE.D <ea>,FPn |-|----46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn1000100 15493: //FDSQRT.D <ea>,FPn |-|----46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn1000101 15494: //FSABS.D <ea>,FPn |-|----46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn1011000 15495: //FSNEG.D <ea>,FPn |-|----46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn1011010 15496: //FDABS.D <ea>,FPn |-|----46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn1011100 15497: //FDNEG.D <ea>,FPn |-|----46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn1011110 15498: //FSDIV.D <ea>,FPn |-|----46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn1100000 15499: //FSADD.D <ea>,FPn |-|----46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn1100010 15500: //FSMUL.D <ea>,FPn |-|----46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn1100011 15501: //FDDIV.D <ea>,FPn |-|----46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn1100100 15502: //FDADD.D <ea>,FPn |-|----46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn1100110 15503: //FDMUL.D <ea>,FPn |-|----46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn1100111 15504: //FSSUB.D <ea>,FPn |-|----46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn1101000 15505: //FDSUB.D <ea>,FPn |-|----46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn1101100 15506: //FSINCOS.D <ea>,FPc:FPs |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101sss0110ccc 15507: //FMOVEM.X #<data>,-(Ar) |-|--CC46|-|-----|-----| - |1111_001_000_100_rrr-11100000dddddddd 15508: //FMOVEM.X <list>,-(Ar) |-|--CC46|-|-----|-----| - |1111_001_000_100_rrr-11100000llllllll 15509: //FMOVEM.X Dl,-(Ar) |-|--CC4S|-|-----|-----| - |1111_001_000_100_rrr-111010000lll0000 15510: //FMOVEM.L #<data>,#<data>,FPSR/FPIAR |-|--CC4S|-|-----|-----| I|1111_001_000_111_100-1000110000000000-{data} 15511: //FMOVEM.L #<data>,#<data>,FPCR/FPIAR |-|--CC4S|-|-----|-----| I|1111_001_000_111_100-1001010000000000-{data} 15512: //FMOVEM.L #<data>,#<data>,FPCR/FPSR |-|--CC4S|-|-----|-----| I|1111_001_000_111_100-1001100000000000-{data} 15513: //FMOVEM.L #<data>,#<data>,#<data>,FPCR/FPSR/FPIAR|-|--CC4S|-|-----|-----| I|1111_001_000_111_100-1001110000000000-{data} 15514: @SuppressWarnings ("fallthrough") public static void irpFgen () throws M68kException { 15515: fgen: { 15516: if ((7 & XEiJ.currentOnchipFPU) == 0) { 15517: irpFline (); 15518: break fgen; 15519: } 15520: XEiJ.mpuCycleCount++; 15521: int ea = XEiJ.regOC & 63; 15522: int a = XEiJ.regPC; 15523: XEiJ.regPC = a + 2; 15524: int w = mmuReadWordZeroExword (a, XEiJ.regSRS); //pcwz。拡張ワード 15525: int m = w >> 10 & 7; 15526: int n = w >> 7 & 7; 15527: int c = w & 0x7f; 15528: XEiJ.fpuBox.epbSetRoundingPrec (XEiJ.fpuBox.epbFpcr >> 6 & 3); //丸め桁数 15529: XEiJ.fpuBox.epbSetRoundingMode (XEiJ.fpuBox.epbFpcr >> 4 & 3); //丸めモード 15530: a = 0; //実効アドレス 15531: //XEiJ.fpuBox.epbExceptionStatusWord = 0; 15532: 15533: 15534: switch (w >> 13) { 15535: 15536: 15537: case 0b010: //$4xxx-$5xxx: Fop.* <ea>,FPn 15538: XEiJ.fpuBox.epbFpsr &= 0x00ff00ff; 15539: XEiJ.fpuBox.epbFpiar = XEiJ.regPC0; //FPIARはFMOVEM/FMOVE FPcr/FSAVE/FRESTORE以外の命令で例外が発生しなくても更新される 15540: 15541: switch (m) { 15542: 15543: case 0b000: //$40xx-$43xx: Fop.L <ea>,FPn 15544: { 15545: XEiJ.mpuCycleCount += 3; 15546: int i; 15547: if (ea < XEiJ.EA_AR) { //Dr 15548: XEiJ.mpuCycleCount += 2; 15549: //a = 0; 15550: i = XEiJ.regRn[ea]; 15551: } else if (ea == XEiJ.EA_IM) { //#<data> 15552: a = XEiJ.regPC; 15553: XEiJ.regPC = a + 4; 15554: i = mmuReadLongExword (a, XEiJ.regSRS); //pcls 15555: } else { //Dr,#<data>以外 15556: a = efaAnyLong (ea); 15557: i = mmuReadLongData (a, XEiJ.regSRS); 15558: } 15559: XEiJ.fpuFPn[m = EFPBox.EPB_SRC_TMP].seti (i); 15560: } 15561: break; 15562: 15563: case 0b001: //$44xx-$47xx: Fop.S <ea>,FPn 15564: { 15565: int i; 15566: if (ea < XEiJ.EA_AR) { //Dr 15567: XEiJ.mpuCycleCount += 2; 15568: //a = 0; 15569: i = XEiJ.regRn[ea]; 15570: } else if (ea == XEiJ.EA_IM) { //#<data> 15571: a = XEiJ.regPC; 15572: XEiJ.regPC = a + 4; 15573: i = mmuReadLongExword (a, XEiJ.regSRS); //pcls 15574: } else { //Dr,#<data>以外 15575: a = efaAnyLong (ea); 15576: i = mmuReadLongData (a, XEiJ.regSRS); 15577: } 15578: XEiJ.fpuFPn[m = EFPBox.EPB_SRC_TMP].setf0 (i); 15579: } 15580: break; 15581: 15582: case 0b010: //$48xx-$4Bxx: Fop.X <ea>,FPn 15583: { 15584: int[] ib = new int[3]; 15585: if (ea == 074) { //#<data> 15586: if (!XEiJ.fpuBox.epbIsFullSpec ()) { //12バイトのイミディエイト 15587: irpExceptionFormat0 (M68kException.M6E_UNIMPLEMENTED_EFFECTIVE << 2, XEiJ.regPC0); //pcは命令の先頭 15588: break fgen; 15589: } 15590: a = (XEiJ.regPC += 12) - 12; 15591: ib[0] = mmuReadLongExword (a, XEiJ.regSRS); 15592: ib[1] = mmuReadLongExword (a + 4, XEiJ.regSRS); 15593: ib[2] = mmuReadLongExword (a + 8, XEiJ.regSRS); 15594: } else { //#<data>以外 15595: a = efaMemExtd (ea); 15596: if ((ea & 070) == 040) { //-(Ar) 15597: ib[2] = mmuReadLongData (m60Address = a + 8, XEiJ.regSRS); 15598: ib[1] = mmuReadLongData (m60Address = a + 4, XEiJ.regSRS); 15599: ib[0] = mmuReadLongData (m60Address = a, XEiJ.regSRS); 15600: } else { //-(Ar)以外 15601: ib[0] = mmuReadLongData (m60Address = a, XEiJ.regSRS); 15602: ib[1] = mmuReadLongData (m60Address = a + 4, XEiJ.regSRS); 15603: ib[2] = mmuReadLongData (m60Address = a + 8, XEiJ.regSRS); 15604: } 15605: } 15606: if (XEiJ.fpuBox.epbIsTriple ()) { //三倍精度 15607: XEiJ.fpuFPn[m = EFPBox.EPB_SRC_TMP].sety012 (ib, 0); 15608: } else { //拡張精度 15609: XEiJ.fpuFPn[m = EFPBox.EPB_SRC_TMP].setx012 (ib, 0); 15610: } 15611: } 15612: break; 15613: 15614: case 0b011: //$4Cxx-$4Fxx: Fop.P <ea>,FPn 15615: { 15616: int[] ib = new int[3]; 15617: if (ea == 074) { //#<data> 15618: if (!XEiJ.fpuBox.epbIsFullSpec ()) { //12バイトのイミディエイト 15619: irpExceptionFormat0 (M68kException.M6E_UNIMPLEMENTED_EFFECTIVE << 2, XEiJ.regPC0); //pcは命令の先頭 15620: break fgen; 15621: } 15622: a = (XEiJ.regPC += 12) - 12; 15623: ib[0] = mmuReadLongExword (a, XEiJ.regSRS); 15624: ib[1] = mmuReadLongExword (a + 4, XEiJ.regSRS); 15625: ib[2] = mmuReadLongExword (a + 8, XEiJ.regSRS); 15626: } else { //#<data>以外 15627: a = efaMemExtd (ea); 15628: if ((ea & 070) == 040) { //-(Ar) 15629: ib[2] = mmuReadLongData (m60Address = a + 8, XEiJ.regSRS); 15630: ib[1] = mmuReadLongData (m60Address = a + 4, XEiJ.regSRS); 15631: ib[0] = mmuReadLongData (m60Address = a, XEiJ.regSRS); 15632: } else { //-(Ar)以外 15633: ib[0] = mmuReadLongData (m60Address = a, XEiJ.regSRS); 15634: ib[1] = mmuReadLongData (m60Address = a + 4, XEiJ.regSRS); 15635: ib[2] = mmuReadLongData (m60Address = a + 8, XEiJ.regSRS); 15636: } 15637: } 15638: if (!XEiJ.fpuBox.epbIsFullSpec ()) { //パックトデシマル 15639: XEiJ.fpuBox.epbExceptionStatusWord = 0xe000 | M68kException.M6E_FP_UNSUPPORTED_DATA_TYPE & 7; 15640: irpExceptionFormat2 (M68kException.M6E_FP_UNSUPPORTED_DATA_TYPE << 2, XEiJ.regPC, a); //pcは次の命令,アドレスはソースオペランド 15641: break fgen; 15642: } 15643: XEiJ.fpuFPn[m = EFPBox.EPB_SRC_TMP].setp012 (ib, 0); 15644: } 15645: break; 15646: 15647: case 0b100: //$50xx-$53xx: Fop.W <ea>,FPn 15648: { 15649: XEiJ.mpuCycleCount += 3; 15650: int i; 15651: if (ea < XEiJ.EA_AR) { //Dr 15652: XEiJ.mpuCycleCount += 2; 15653: //a = 0; 15654: i = (short) XEiJ.regRn[ea]; 15655: } else if (ea == XEiJ.EA_IM) { //#<data> 15656: a = XEiJ.regPC; 15657: XEiJ.regPC = a + 2; 15658: i = mmuReadWordSignExword (a, XEiJ.regSRS); //pcws 15659: } else { //Dr,#<data>以外 15660: a = efaAnyWord (ea); 15661: i = mmuReadWordSignData (a, XEiJ.regSRS); 15662: } 15663: XEiJ.fpuFPn[m = EFPBox.EPB_SRC_TMP].seti (i); 15664: } 15665: break; 15666: 15667: case 0b101: //$54xx-$57xx: Fop.D <ea>,FPn 15668: { 15669: long l; 15670: if (ea == XEiJ.EA_IM) { //#<data> 15671: a = XEiJ.regPC; 15672: XEiJ.regPC = a + 8; 15673: l = mmuReadQuadExword (a, XEiJ.regSRS); 15674: } else { //#<data>以外 15675: a = efaAnyQuad (ea); 15676: l = mmuReadQuadData (a, XEiJ.regSRS); 15677: } 15678: XEiJ.fpuFPn[m = EFPBox.EPB_SRC_TMP].setd01 (l); 15679: } 15680: break; 15681: 15682: case 0b110: //$58xx-$5Bxx: Fop.B <ea>,FPn 15683: { 15684: XEiJ.mpuCycleCount += 3; 15685: int i; 15686: if (ea < XEiJ.EA_AR) { //Dr 15687: XEiJ.mpuCycleCount += 2; 15688: //a = 0; 15689: i = (byte) XEiJ.regRn[ea]; 15690: } else if (ea == XEiJ.EA_IM) { //#<data> 15691: a = XEiJ.regPC; 15692: XEiJ.regPC = a + 2; 15693: i = mmuReadByteSignExword (a + 1, XEiJ.regSRS); //pcbs 15694: } else { //Dr,#<data>以外 15695: a = efaAnyByte (ea); 15696: i = mmuReadByteSignData (a, XEiJ.regSRS); 15697: } 15698: XEiJ.fpuFPn[m = EFPBox.EPB_SRC_TMP].seti (i); 15699: } 15700: break; 15701: 15702: case 0b111: //$5Cxx-$5Fxx: FMOVECR.X #ccc,FPn 15703: default: 15704: if (!XEiJ.fpuBox.epbIsFullSpec ()) { 15705: irpExceptionFormat2 (M68kException.M6E_FP_UNIMPLEMENTED_INSTRUCTION << 2, XEiJ.regPC, M68kException.M6E_FP_UNIMPLEMENTED_INSTRUCTION << 2); //pcは次の命令,アドレスはベクタオフセット 15706: break fgen; 15707: } 15708: if (0x40 <= c) { 15709: //マニュアルにはFMOVECRの命令フォーマットのROMオフセットが7bitあるように書かれているが実際は6bit 15710: //MC68882で0x40以上を指定すると命令実行前例外のF-Line Emulator(レスポンス$1C0B)が返る 15711: XEiJ.regPC = XEiJ.regPC0 + 2; //拡張ワードを読まなかったことにする 15712: irpFline (); 15713: break fgen; 15714: } 15715: if (false) { 15716: m = EFPBox.EPB_CONST_START + c; //定数 15717: c = 0; //FMOVE 15718: } else { 15719: //FMOVECR 15720: XEiJ.fpuBox.epbFmovecr (XEiJ.fpuFPn[n], c); 15721: //FPSRのAEXCを設定する 15722: XEiJ.fpuBox.epbFpsr |= XEiJ.FPU_FPSR_EXC_TO_AEXC[XEiJ.fpuBox.epbFpsr >> 8 & 255]; 15723: //浮動小数点命令実行後例外 floating-point post-instruction exception 15724: if (irpFPPostInstruction (a)) { 15725: break fgen; 15726: } 15727: break fgen; 15728: } 15729: 15730: } 15731: //浮動小数点命令実行前例外 floating-point pre-instruction exception 15732: if (irpFPPreInstruction ()) { 15733: break fgen; 15734: } 15735: //Fop.X <ea>,FPn → Fop.X FP[EFPBox.EPB_SRC_TMP],FPn 15736: //FMOVECR.X #ccc,FPn → FMOVE.X FPc,FPn 15737: 15738: 15739: //fallthrough 15740: case 0b000: //$0xxx-$1xxx: Fop.X FPm,FPn 15741: if (w >> 13 == 0) { 15742: XEiJ.fpuBox.epbFpsr &= 0x00ff00ff; 15743: } 15744: //Fop.* <ea>,FPnのときFPIARは設定済み 15745: XEiJ.fpuBox.epbFpiar = XEiJ.regPC0; //FPIARはFMOVEM/FMOVE FPcr/FSAVE/FRESTORE以外の命令で例外が発生しなくても更新される 15746: 15747: switch (c) { 15748: 15749: case 0b000_0000: //$xx00: FMOVE.* *m,FPn 15750: // BSUN 常にクリア 15751: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 15752: // OPERR 常にクリア 15753: // OVFL 常にクリア 15754: // UNFL 結果が非正規化数のときセット、それ以外はクリア 15755: // DZ 常にクリア 15756: // INEX2 結果に誤差があるときセット、それ以外はクリア 15757: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 15758: XEiJ.fpuFPn[n].sete (XEiJ.fpuFPn[m]).finish (); 15759: break; 15760: 15761: case 0b000_0001: //$xx01: FINT.* *m,FPn 15762: // BSUN 常にクリア 15763: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 15764: // OPERR 常にクリア 15765: // OVFL 常にクリア 15766: // 正規化数の最大値は整数なので丸めても大きくなることはない 15767: // UNFL 常にクリア 15768: // 結果は整数なので非正規化数にはならない 15769: // DZ 常にクリア 15770: // INEX2 結果に誤差があるときセット、それ以外はクリア 15771: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 15772: XEiJ.mpuCycleCount += 2; 15773: // FINTはsingleとdoubleの丸め処理を行わない 15774: XEiJ.fpuBox.epbSetRoundingPrec (EFPBox.EPB_PREC_EXD); 15775: XEiJ.fpuFPn[n].round (XEiJ.fpuFPn[m], XEiJ.fpuBox.epbRoundingMode); 15776: break; 15777: 15778: case 0b000_0010: //$xx02: FSINH.* *m,FPn 15779: // BSUN 常にクリア 15780: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 15781: // OPERR 常にクリア 15782: // OVFL オーバーフローしたときセット、それ以外はクリア 15783: // UNFL 結果が非正規化数のときセット、それ以外はクリア 15784: // DZ 常にクリア 15785: // INEX2 結果に誤差があるときセット、それ以外はクリア 15786: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 15787: if (!XEiJ.fpuBox.epbIsFullSpec ()) { 15788: irpExceptionFormat2 (M68kException.M6E_FP_UNIMPLEMENTED_INSTRUCTION << 2, XEiJ.regPC, a); //pcは次の命令,アドレスは実効アドレス 15789: break fgen; 15790: } 15791: XEiJ.fpuFPn[n].sinh (XEiJ.fpuFPn[m]); 15792: break; 15793: 15794: case 0b000_0011: //$xx03: FINTRZ.* *m,FPn 15795: // BSUN 常にクリア 15796: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 15797: // OPERR 常にクリア 15798: // OVFL 常にクリア 15799: // UNFL 常にクリア 15800: // 結果は整数なので非正規化数にはならない 15801: // DZ 常にクリア 15802: // INEX2 結果に誤差があるときセット、それ以外はクリア 15803: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 15804: XEiJ.mpuCycleCount += 2; 15805: // FINTRZはsingleとdoubleの丸め処理を行わない 15806: XEiJ.fpuBox.epbSetRoundingPrec (EFPBox.EPB_PREC_EXD); 15807: XEiJ.fpuFPn[n].trunc (XEiJ.fpuFPn[m]); 15808: break; 15809: 15810: case 0b000_0100: //$xx04: FSQRT.* *m,FPn 15811: case 0b000_0101: //$xx05: FSQRT.* *m,FPn (MC68882) 15812: // BSUN 常にクリア 15813: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 15814: // OPERR 引数が-0を除く負数のときセット、それ以外はクリア 15815: // OVFL 常にクリア 15816: // 1よりも大きい数は小さくなるので溢れることはない 15817: // UNFL 常にクリア 15818: // 非正規化数の平方根は正規化数なので結果が非正規化数になることはない 15819: // DZ 常にクリア 15820: // INEX2 結果に誤差があるときセット、それ以外はクリア 15821: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 15822: XEiJ.mpuCycleCount += 67; 15823: XEiJ.fpuFPn[n].sqrt (XEiJ.fpuFPn[m]); 15824: break; 15825: 15826: case 0b000_0110: //$xx06: FLOGNP1.* *m,FPn 15827: case 0b000_0111: //$xx07: FLOGNP1.* *m,FPn (MC68882) 15828: // BSUN 常にクリア 15829: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 15830: // OPERR 引数が-1よりも小さいときセット、それ以外はクリア 15831: // OVFL 常にクリア 15832: // log(1+0)=0,log(1+x)<=xなので結果が引数よりも大きくなることはない 15833: // UNFL 結果が非正規化数のときセット、それ以外はクリア 15834: // DZ 引数が-1のときセット、それ以外はクリア 15835: // INEX2 結果に誤差があるときセット、それ以外はクリア 15836: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 15837: if (!XEiJ.fpuBox.epbIsFullSpec ()) { 15838: irpExceptionFormat2 (M68kException.M6E_FP_UNIMPLEMENTED_INSTRUCTION << 2, XEiJ.regPC, a); //pcは次の命令,アドレスは実効アドレス 15839: break fgen; 15840: } 15841: XEiJ.fpuFPn[n].log1p (XEiJ.fpuFPn[m]); 15842: break; 15843: 15844: case 0b000_1000: //$xx08: FETOXM1.* *m,FPn 15845: // BSUN 常にクリア 15846: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 15847: // OPERR 常にクリア 15848: // OVFL オーバーフローしたときセット、それ以外はクリア 15849: // UNFL 結果が非正規化数のときセット、それ以外はクリア 15850: // DZ 常にクリア 15851: // INEX2 結果に誤差があるときセット、それ以外はクリア 15852: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 15853: if (!XEiJ.fpuBox.epbIsFullSpec ()) { 15854: irpExceptionFormat2 (M68kException.M6E_FP_UNIMPLEMENTED_INSTRUCTION << 2, XEiJ.regPC, a); //pcは次の命令,アドレスは実効アドレス 15855: break fgen; 15856: } 15857: XEiJ.fpuFPn[n].expm1 (XEiJ.fpuFPn[m]); 15858: break; 15859: 15860: case 0b000_1001: //$xx09: FTANH.* *m,FPn 15861: // BSUN 常にクリア 15862: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 15863: // OPERR 常にクリア 15864: // OVFL 常にクリア 15865: // UNFL 結果が非正規化数のときセット、それ以外はクリア 15866: // DZ 常にクリア 15867: // INEX2 結果に誤差があるときセット、それ以外はクリア 15868: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 15869: if (!XEiJ.fpuBox.epbIsFullSpec ()) { 15870: irpExceptionFormat2 (M68kException.M6E_FP_UNIMPLEMENTED_INSTRUCTION << 2, XEiJ.regPC, a); //pcは次の命令,アドレスは実効アドレス 15871: break fgen; 15872: } 15873: XEiJ.fpuFPn[n].tanh (XEiJ.fpuFPn[m]); 15874: break; 15875: 15876: case 0b000_1010: //$xx0A: FATAN.* *m,FPn 15877: case 0b000_1011: //$xx0B: FATAN.* *m,FPn (MC68882) 15878: // BSUN 常にクリア 15879: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 15880: // OPERR 常にクリア 15881: // OVFL 常にクリア 15882: // UNFL 結果が非正規化数のときセット、それ以外はクリア 15883: // DZ 常にクリア 15884: // INEX2 結果に誤差があるときセット、それ以外はクリア 15885: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 15886: if (!XEiJ.fpuBox.epbIsFullSpec ()) { 15887: irpExceptionFormat2 (M68kException.M6E_FP_UNIMPLEMENTED_INSTRUCTION << 2, XEiJ.regPC, a); //pcは次の命令,アドレスは実効アドレス 15888: break fgen; 15889: } 15890: XEiJ.fpuFPn[n].atan (XEiJ.fpuFPn[m]); 15891: break; 15892: 15893: case 0b000_1100: //$xx0C: FASIN.* *m,FPn 15894: // BSUN 常にクリア 15895: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 15896: // OPERR 引数の絶対値が1よりも大きいときセット、それ以外はクリア 15897: // OVFL 常にクリア 15898: // UNFL 結果が非正規化数のときセット、それ以外はクリア 15899: // DZ 常にクリア 15900: // INEX2 結果に誤差があるときセット、それ以外はクリア 15901: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 15902: if (!XEiJ.fpuBox.epbIsFullSpec ()) { 15903: irpExceptionFormat2 (M68kException.M6E_FP_UNIMPLEMENTED_INSTRUCTION << 2, XEiJ.regPC, a); //pcは次の命令,アドレスは実効アドレス 15904: break fgen; 15905: } 15906: XEiJ.fpuFPn[n].asin (XEiJ.fpuFPn[m]); 15907: break; 15908: 15909: case 0b000_1101: //$xx0D: FATANH.* *m,FPn 15910: // BSUN 常にクリア 15911: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 15912: // OPERR 引数の絶対値が1よりも大きいときセット、それ以外はクリア 15913: // OVFL 常にクリア 15914: // 1のとき無限大なのだから1の近くでオーバーフローしそうに思えるがatanh(1-2^-80)≒28.07くらい 15915: // UNFL 結果が非正規化数のときセット、それ以外はクリア 15916: // DZ 引数の絶対値が1のときセット、それ以外はクリア 15917: // INEX2 結果に誤差があるときセット、それ以外はクリア 15918: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 15919: if (!XEiJ.fpuBox.epbIsFullSpec ()) { 15920: irpExceptionFormat2 (M68kException.M6E_FP_UNIMPLEMENTED_INSTRUCTION << 2, XEiJ.regPC, a); //pcは次の命令,アドレスは実効アドレス 15921: break fgen; 15922: } 15923: XEiJ.fpuFPn[n].atanh (XEiJ.fpuFPn[m]); 15924: break; 15925: 15926: case 0b000_1110: //$xx0E: FSIN.* *m,FPn 15927: // BSUN 常にクリア 15928: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 15929: // OPERR 引数が無限大のときセット、それ以外はクリア 15930: // OVFL 常にクリア 15931: // UNFL 結果が非正規化数のときセット、それ以外はクリア 15932: // DZ 常にクリア 15933: // INEX2 結果に誤差があるときセット、それ以外はクリア 15934: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 15935: if (!XEiJ.fpuBox.epbIsFullSpec ()) { 15936: irpExceptionFormat2 (M68kException.M6E_FP_UNIMPLEMENTED_INSTRUCTION << 2, XEiJ.regPC, a); //pcは次の命令,アドレスは実効アドレス 15937: break fgen; 15938: } 15939: XEiJ.fpuFPn[n].sin (XEiJ.fpuFPn[m]); 15940: break; 15941: 15942: case 0b000_1111: //$xx0F: FTAN.* *m,FPn 15943: // BSUN 常にクリア 15944: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 15945: // OPERR 引数が無限大のときセット、それ以外はクリア 15946: // OVFL オーバーフローしたときセット、それ以外はクリア 15947: // UNFL 結果が非正規化数のときセット、それ以外はクリア 15948: // DZ 常にクリア 15949: // cos(x)=0を満たすxは正確に表現できないのだからsin(x)/cos(x)がゼロ除算になるのはおかしい 15950: // INEX2 結果に誤差があるときセット、それ以外はクリア 15951: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 15952: if (!XEiJ.fpuBox.epbIsFullSpec ()) { 15953: irpExceptionFormat2 (M68kException.M6E_FP_UNIMPLEMENTED_INSTRUCTION << 2, XEiJ.regPC, a); //pcは次の命令,アドレスは実効アドレス 15954: break fgen; 15955: } 15956: XEiJ.fpuFPn[n].tan (XEiJ.fpuFPn[m]); 15957: break; 15958: 15959: case 0b001_0000: //$xx10: FETOX.* *m,FPn 15960: // BSUN 常にクリア 15961: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 15962: // OPERR 常にクリア 15963: // OVFL オーバーフローしたときセット、それ以外はクリア 15964: // UNFL 結果が非正規化数のときセット、それ以外はクリア 15965: // DZ 常にクリア 15966: // INEX2 結果に誤差があるときセット、それ以外はクリア 15967: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 15968: if (!XEiJ.fpuBox.epbIsFullSpec ()) { 15969: irpExceptionFormat2 (M68kException.M6E_FP_UNIMPLEMENTED_INSTRUCTION << 2, XEiJ.regPC, a); //pcは次の命令,アドレスは実効アドレス 15970: break fgen; 15971: } 15972: XEiJ.fpuFPn[n].exp (XEiJ.fpuFPn[m]); 15973: break; 15974: 15975: case 0b001_0001: //$xx11: FTWOTOX.* *m,FPn 15976: // BSUN 常にクリア 15977: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 15978: // OPERR 常にクリア 15979: // OVFL オーバーフローしたときセット、それ以外はクリア 15980: // UNFL 結果が非正規化数のときセット、それ以外はクリア 15981: // DZ 常にクリア 15982: // INEX2 結果に誤差があるときセット、それ以外はクリア 15983: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 15984: if (!XEiJ.fpuBox.epbIsFullSpec ()) { 15985: irpExceptionFormat2 (M68kException.M6E_FP_UNIMPLEMENTED_INSTRUCTION << 2, XEiJ.regPC, a); //pcは次の命令,アドレスは実効アドレス 15986: break fgen; 15987: } 15988: XEiJ.fpuFPn[n].exp2 (XEiJ.fpuFPn[m]); 15989: break; 15990: 15991: case 0b001_0010: //$xx12: FTENTOX.* *m,FPn 15992: case 0b001_0011: //$xx13: FTENTOX.* *m,FPn (MC68882) 15993: // BSUN 常にクリア 15994: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 15995: // OPERR 常にクリア 15996: // OVFL オーバーフローしたときセット、それ以外はクリア 15997: // UNFL 結果が非正規化数のときセット、それ以外はクリア 15998: // DZ 常にクリア 15999: // INEX2 結果に誤差があるときセット、それ以外はクリア 16000: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16001: if (!XEiJ.fpuBox.epbIsFullSpec ()) { 16002: irpExceptionFormat2 (M68kException.M6E_FP_UNIMPLEMENTED_INSTRUCTION << 2, XEiJ.regPC, a); //pcは次の命令,アドレスは実効アドレス 16003: break fgen; 16004: } 16005: XEiJ.fpuFPn[n].exp10 (XEiJ.fpuFPn[m]); 16006: break; 16007: 16008: case 0b001_0100: //$xx14: FLOGN.* *m,FPn 16009: // BSUN 常にクリア 16010: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16011: // OPERR 引数が0よりも小さいときセット、それ以外はクリア 16012: // OVFL 常にクリア 16013: // log(1)=0,log(x)<=x-1なので結果が引数よりも大きくなることはない 16014: // UNFL 常にクリア 16015: // log(1+2^-80)≒2^-80 16016: // DZ 引数がゼロのときセット、それ以外はクリア 16017: // INEX2 結果に誤差があるときセット、それ以外はクリア 16018: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16019: if (!XEiJ.fpuBox.epbIsFullSpec ()) { 16020: irpExceptionFormat2 (M68kException.M6E_FP_UNIMPLEMENTED_INSTRUCTION << 2, XEiJ.regPC, a); //pcは次の命令,アドレスは実効アドレス 16021: break fgen; 16022: } 16023: XEiJ.fpuFPn[n].log (XEiJ.fpuFPn[m]); 16024: break; 16025: 16026: case 0b001_0101: //$xx15: FLOG10.* *m,FPn 16027: // BSUN 常にクリア 16028: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16029: // OPERR 引数が0よりも小さいときセット、それ以外はクリア 16030: // OVFL 常にクリア 16031: // UNFL 常にクリア 16032: // DZ 引数がゼロのときセット、それ以外はクリア 16033: // INEX2 結果に誤差があるときセット、それ以外はクリア 16034: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16035: if (!XEiJ.fpuBox.epbIsFullSpec ()) { 16036: irpExceptionFormat2 (M68kException.M6E_FP_UNIMPLEMENTED_INSTRUCTION << 2, XEiJ.regPC, a); //pcは次の命令,アドレスは実効アドレス 16037: break fgen; 16038: } 16039: XEiJ.fpuFPn[n].log10 (XEiJ.fpuFPn[m]); 16040: break; 16041: 16042: case 0b001_0110: //$xx16: FLOG2.* *m,FPn 16043: case 0b001_0111: //$xx17: FLOG2.* *m,FPn (MC68882) 16044: // BSUN 常にクリア 16045: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16046: // OPERR 引数が0よりも小さいときセット、それ以外はクリア 16047: // OVFL 常にクリア 16048: // UNFL 常にクリア 16049: // DZ 引数がゼロのときセット、それ以外はクリア 16050: // INEX2 結果に誤差があるときセット、それ以外はクリア 16051: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16052: if (!XEiJ.fpuBox.epbIsFullSpec ()) { 16053: irpExceptionFormat2 (M68kException.M6E_FP_UNIMPLEMENTED_INSTRUCTION << 2, XEiJ.regPC, a); //pcは次の命令,アドレスは実効アドレス 16054: break fgen; 16055: } 16056: XEiJ.fpuFPn[n].log2 (XEiJ.fpuFPn[m]); 16057: break; 16058: 16059: case 0b001_1000: //$xx18: FABS.* *m,FPn 16060: // BSUN 常にクリア 16061: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16062: // OPERR 常にクリア 16063: // OVFL 常にクリア 16064: // UNFL 結果が非正規化数のときセット、それ以外はクリア 16065: // DZ 常にクリア 16066: // INEX2 常にクリア 16067: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16068: XEiJ.fpuFPn[n].abs (XEiJ.fpuFPn[m]); 16069: break; 16070: 16071: case 0b001_1001: //$xx19: FCOSH.* *m,FPn 16072: // BSUN 常にクリア 16073: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16074: // OPERR 常にクリア 16075: // OVFL オーバーフローしたときセット、それ以外はクリア 16076: // UNFL 常にクリア 16077: // DZ 常にクリア 16078: // INEX2 結果に誤差があるときセット、それ以外はクリア 16079: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16080: if (!XEiJ.fpuBox.epbIsFullSpec ()) { 16081: irpExceptionFormat2 (M68kException.M6E_FP_UNIMPLEMENTED_INSTRUCTION << 2, XEiJ.regPC, a); //pcは次の命令,アドレスは実効アドレス 16082: break fgen; 16083: } 16084: XEiJ.fpuFPn[n].cosh (XEiJ.fpuFPn[m]); 16085: break; 16086: 16087: case 0b001_1010: //$xx1A: FNEG.* *m,FPn 16088: case 0b001_1011: //$xx1B: FNEG.* *m,FPn (MC68882) 16089: // BSUN 常にクリア 16090: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16091: // OPERR 常にクリア 16092: // OVFL 常にクリア 16093: // UNFL 結果が非正規化数のときセット、それ以外はクリア 16094: // DZ 常にクリア 16095: // INEX2 常にクリア 16096: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16097: XEiJ.fpuFPn[n].neg (XEiJ.fpuFPn[m]); 16098: break; 16099: 16100: case 0b001_1100: //$xx1C: FACOS.* *m,FPn 16101: // BSUN 常にクリア 16102: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16103: // OPERR 引数の絶対値が1よりも大きいときセット、それ以外はクリア 16104: // OVFL 常にクリア 16105: // UNFL 常にクリア 16106: // acos(1-ulp(1))はulp(1)よりも大きい 16107: // DZ 常にクリア 16108: // INEX2 結果に誤差があるときセット、それ以外はクリア 16109: // おそらくセットされないのはacos(1)=0だけ 16110: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16111: if (!XEiJ.fpuBox.epbIsFullSpec ()) { 16112: irpExceptionFormat2 (M68kException.M6E_FP_UNIMPLEMENTED_INSTRUCTION << 2, XEiJ.regPC, a); //pcは次の命令,アドレスは実効アドレス 16113: break fgen; 16114: } 16115: XEiJ.fpuFPn[n].acos (XEiJ.fpuFPn[m]); 16116: break; 16117: 16118: case 0b001_1101: //$xx1D: FCOS.* *m,FPn 16119: // BSUN 常にクリア 16120: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16121: // OPERR 引数が無限大のときセット、それ以外はクリア 16122: // OVFL 常にクリア 16123: // UNFL 常にクリア 16124: // cos(x)=0を満たすxは正確に表現できず、cos(pi/2)とcos(3*pi/2)が正規化数になってしまう 16125: // DZ 常にクリア 16126: // INEX2 結果に誤差があるときセット、それ以外はクリア 16127: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16128: if (!XEiJ.fpuBox.epbIsFullSpec ()) { 16129: irpExceptionFormat2 (M68kException.M6E_FP_UNIMPLEMENTED_INSTRUCTION << 2, XEiJ.regPC, a); //pcは次の命令,アドレスは実効アドレス 16130: break fgen; 16131: } 16132: XEiJ.fpuFPn[n].cos (XEiJ.fpuFPn[m]); 16133: break; 16134: 16135: case 0b001_1110: //$xx1E: FGETEXP.* *m,FPn 16136: // BSUN 常にクリア 16137: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16138: // OPERR 引数が無限大のときセット、それ以外はクリア 16139: // OVFL 常にクリア 16140: // UNFL 常にクリア 16141: // DZ 常にクリア 16142: // INEX2 常にクリア 16143: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16144: if (!XEiJ.fpuBox.epbIsFullSpec ()) { 16145: irpExceptionFormat2 (M68kException.M6E_FP_UNIMPLEMENTED_INSTRUCTION << 2, XEiJ.regPC, a); //pcは次の命令,アドレスは実効アドレス 16146: break fgen; 16147: } 16148: XEiJ.fpuFPn[n].getexp (XEiJ.fpuFPn[m]); 16149: break; 16150: 16151: case 0b001_1111: //$xx1F: FGETMAN.* *m,FPn 16152: // BSUN 常にクリア 16153: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16154: // OPERR 引数が無限大のときセット、それ以外はクリア 16155: // OVFL 常にクリア 16156: // UNFL 常にクリア 16157: // DZ 常にクリア 16158: // INEX2 常にクリア 16159: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16160: if (!XEiJ.fpuBox.epbIsFullSpec ()) { 16161: irpExceptionFormat2 (M68kException.M6E_FP_UNIMPLEMENTED_INSTRUCTION << 2, XEiJ.regPC, a); //pcは次の命令,アドレスは実効アドレス 16162: break fgen; 16163: } 16164: XEiJ.fpuFPn[n].getman (XEiJ.fpuFPn[m]); 16165: break; 16166: 16167: case 0b010_0000: //$xx20: FDIV.* *m,FPn 16168: // BSUN 常にクリア 16169: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16170: // OPERR 引数が両方ゼロまたは両方無限大のときセット、それ以外はクリア 16171: // OVFL オーバーフローしたときセット、それ以外はクリア 16172: // UNFL 結果が非正規化数のときセット、それ以外はクリア 16173: // DZ 被除数がゼロ、無限大、NaN以外で除数がゼロのときセット、それ以外はクリア 16174: // INEX2 結果に誤差があるときセット、それ以外はクリア 16175: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16176: XEiJ.mpuCycleCount += 36; 16177: XEiJ.fpuFPn[n].div (XEiJ.fpuFPn[m]); 16178: break; 16179: 16180: case 0b010_0001: //$xx21: FMOD.* *m,FPn 16181: // BSUN 常にクリア 16182: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16183: // OPERR 除数がゼロまたは被除数が無限大のときセット、それ以外はクリア 16184: // OVFL 常にクリア 16185: // UNFL 結果が非正規化数のときセット、それ以外はクリア 16186: // DZ 常にクリア 16187: // 除数がゼロのとき結果は無限大ではなくNaNでありゼロ除算にはならない 16188: // INEX2 結果に誤差があるときセット、それ以外はクリア 16189: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16190: // FPSRのquotient byteに符号付き商の下位7bitが入る 16191: if (!XEiJ.fpuBox.epbIsFullSpec ()) { 16192: irpExceptionFormat2 (M68kException.M6E_FP_UNIMPLEMENTED_INSTRUCTION << 2, XEiJ.regPC, a); //pcは次の命令,アドレスは実効アドレス 16193: break fgen; 16194: } 16195: XEiJ.fpuFPn[n].rem (XEiJ.fpuFPn[m]); 16196: break; 16197: 16198: case 0b010_0010: //$xx22: FADD.* *m,FPn 16199: // BSUN 常にクリア 16200: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16201: // OPERR 引数が両方無限大で符号が異なるときセット、それ以外はクリア 16202: // OVFL オーバーフローしたときセット、それ以外はクリア 16203: // UNFL 結果が非正規化数のときセット、それ以外はクリア 16204: // DZ 常にクリア 16205: // INEX2 結果に誤差があるときセット、それ以外はクリア 16206: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16207: XEiJ.mpuCycleCount += 2; 16208: XEiJ.fpuFPn[n].add (XEiJ.fpuFPn[m]); 16209: break; 16210: 16211: case 0b010_0011: //$xx23: FMUL.* *m,FPn 16212: // BSUN 常にクリア 16213: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16214: // OPERR 引数の一方がゼロで他方が無限大のときセット、それ以外はクリア 16215: // OVFL オーバーフローしたときセット、それ以外はクリア 16216: // UNFL 結果が非正規化数のときセット、それ以外はクリア 16217: // DZ 常にクリア 16218: // INEX2 結果に誤差があるときセット、それ以外はクリア 16219: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16220: XEiJ.mpuCycleCount += 2; 16221: XEiJ.fpuFPn[n].mul (XEiJ.fpuFPn[m]); 16222: break; 16223: 16224: case 0b010_0100: //$xx24: FSGLDIV.* *m,FPn 16225: // BSUN 常にクリア 16226: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16227: // OPERR 引数が両方ゼロまたは両方無限大のときセット、それ以外はクリア 16228: // OVFL オーバーフローしたときセット、それ以外はクリア 16229: // UNFL 結果が非正規化数のときセット、それ以外はクリア 16230: // DZ 被除数がゼロ、無限大、NaN以外で除数がゼロのときセット、それ以外はクリア 16231: // INEX2 結果に誤差があるときセット、それ以外はクリア 16232: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16233: XEiJ.mpuCycleCount += 36; 16234: XEiJ.fpuBox.epbSetRoundingPrec (EFPBox.EPB_PREC_XSG); 16235: XEiJ.fpuFPn[n].div (XEiJ.fpuFPn[m]); 16236: break; 16237: 16238: case 0b010_0101: //$xx25: FREM.* *m,FPn 16239: // BSUN 常にクリア 16240: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16241: // OPERR 除数がゼロまたは被除数が無限大のときセット、それ以外はクリア 16242: // OVFL 常にクリア 16243: // UNFL 結果が非正規化数のときセット、それ以外はクリア 16244: // DZ 常にクリア 16245: // 除数がゼロのとき結果は無限大ではなくNaNでありゼロ除算にはならない 16246: // INEX2 結果に誤差があるときセット、それ以外はクリア 16247: // マニュアルにClearedと書いてあるのは間違い 16248: // 除数が無限大で被除数をそのまま返す場合でもサイズが減ればアンダーフローや不正確な結果になることはマニュアルにも書かれている 16249: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16250: // FPSRのquotient byteに符号付き商の下位7bitが入る 16251: if (!XEiJ.fpuBox.epbIsFullSpec ()) { 16252: irpExceptionFormat2 (M68kException.M6E_FP_UNIMPLEMENTED_INSTRUCTION << 2, XEiJ.regPC, a); //pcは次の命令,アドレスは実効アドレス 16253: break fgen; 16254: } 16255: XEiJ.fpuFPn[n].ieeerem (XEiJ.fpuFPn[m]); 16256: break; 16257: 16258: case 0b010_0110: //$xx26: FSCALE.* *m,FPn 16259: // BSUN 常にクリア 16260: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16261: // OPERR 引数が無限大のときセット、それ以外はクリア 16262: // OVFL オーバーフローしたときセット、それ以外はクリア 16263: // UNFL 結果が非正規化数のときセット、それ以外はクリア 16264: // DZ 常にクリア 16265: // INEX2 常にクリア 16266: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16267: if (!XEiJ.fpuBox.epbIsFullSpec ()) { 16268: irpExceptionFormat2 (M68kException.M6E_FP_UNIMPLEMENTED_INSTRUCTION << 2, XEiJ.regPC, a); //pcは次の命令,アドレスは実効アドレス 16269: break fgen; 16270: } 16271: //! 本来はソースが整数のとき浮動小数点数を経由しないが、これは経由してしまっている。結果は同じだが効率が悪い 16272: XEiJ.fpuFPn[n].scale (XEiJ.fpuFPn[m]); 16273: break; 16274: 16275: case 0b010_0111: //$xx27: FSGLMUL.* *m,FPn 16276: // BSUN 常にクリア 16277: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16278: // OPERR 引数の一方がゼロで他方が無限大のときセット、それ以外はクリア 16279: // OVFL オーバーフローしたときセット、それ以外はクリア 16280: // UNFL 結果が非正規化数のときセット、それ以外はクリア 16281: // DZ 常にクリア 16282: // INEX2 結果に誤差があるときセット、それ以外はクリア 16283: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16284: XEiJ.mpuCycleCount += 2; 16285: { 16286: //引数を24bitに切り捨てるときX2をセットしない 16287: int sr = XEiJ.fpuBox.epbFpsr; 16288: XEiJ.fpuFPn[EFPBox.EPB_SRC_TMP].roundmanf (XEiJ.fpuFPn[m], EFPBox.EPB_MODE_RZ); 16289: XEiJ.fpuFPn[EFPBox.EPB_DST_TMP].roundmanf (XEiJ.fpuFPn[n], EFPBox.EPB_MODE_RZ); 16290: XEiJ.fpuBox.epbFpsr = sr; 16291: } 16292: XEiJ.fpuBox.epbSetRoundingPrec (EFPBox.EPB_PREC_XSG); 16293: XEiJ.fpuFPn[n].mul (XEiJ.fpuFPn[EFPBox.EPB_DST_TMP], XEiJ.fpuFPn[EFPBox.EPB_SRC_TMP]); 16294: break; 16295: 16296: case 0b010_1000: //$xx28: FSUB.* *m,FPn 16297: case 0b010_1001: //$xx29: FSUB.* *m,FPn (MC68882) 16298: case 0b010_1010: //$xx2A: FSUB.* *m,FPn (MC68882) 16299: case 0b010_1011: //$xx2B: FSUB.* *m,FPn (MC68882) 16300: case 0b010_1100: //$xx2C: FSUB.* *m,FPn (MC68882) 16301: case 0b010_1101: //$xx2D: FSUB.* *m,FPn (MC68882) 16302: case 0b010_1110: //$xx2E: FSUB.* *m,FPn (MC68882) 16303: case 0b010_1111: //$xx2F: FSUB.* *m,FPn (MC68882) 16304: // BSUN 常にクリア 16305: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16306: // OPERR 引数が両方無限大で符号が同じときセット、それ以外はクリア 16307: // OVFL オーバーフローしたときセット、それ以外はクリア 16308: // UNFL 結果が非正規化数のときセット、それ以外はクリア 16309: // DZ 常にクリア 16310: // INEX2 結果に誤差があるときセット、それ以外はクリア 16311: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16312: XEiJ.mpuCycleCount += 2; 16313: XEiJ.fpuFPn[n].sub (XEiJ.fpuFPn[m]); 16314: break; 16315: 16316: case 0b011_0000: //$xx30: FSINCOS.* *m,FP0:FPn (c=0,s=n) 16317: case 0b011_0001: //$xx31: FSINCOS.* *m,FP1:FPn (c=1,s=n) 16318: case 0b011_0010: //$xx32: FSINCOS.* *m,FP2:FPn (c=2,s=n) 16319: case 0b011_0011: //$xx33: FSINCOS.* *m,FP3:FPn (c=3,s=n) 16320: case 0b011_0100: //$xx34: FSINCOS.* *m,FP4:FPn (c=4,s=n) 16321: case 0b011_0101: //$xx35: FSINCOS.* *m,FP5:FPn (c=5,s=n) 16322: case 0b011_0110: //$xx36: FSINCOS.* *m,FP6:FPn (c=6,s=n) 16323: case 0b011_0111: //$xx37: FSINCOS.* *m,FP7:FPn (c=7,s=n) 16324: // BSUN 常にクリア 16325: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16326: // OPERR 引数が無限大のときセット、それ以外はクリア 16327: // OVFL 常にクリア 16328: // UNFL sin(x)の結果が非正規化数のときセット、それ以外はクリア 16329: // cos(x)の結果は非正規化数にならない 16330: // DZ 常にクリア 16331: // INEX2 結果に誤差があるときセット、それ以外はクリア 16332: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16333: if (!XEiJ.fpuBox.epbIsFullSpec ()) { 16334: irpExceptionFormat2 (M68kException.M6E_FP_UNIMPLEMENTED_INSTRUCTION << 2, XEiJ.regPC, a); //pcは次の命令,アドレスは実効アドレス 16335: break fgen; 16336: } 16337: c &= 7; 16338: //m==EFPBox.EPB_SRC_TMP||m==n||m==cの場合があることに注意する 16339: XEiJ.fpuFPn[EFPBox.EPB_SRC_TMP].sete (XEiJ.fpuFPn[m]); 16340: XEiJ.fpuFPn[c].cos (XEiJ.fpuFPn[EFPBox.EPB_SRC_TMP]); 16341: XEiJ.fpuFPn[n].sin (XEiJ.fpuFPn[EFPBox.EPB_SRC_TMP]); 16342: break; 16343: 16344: case 0b011_1000: //$xx38: FCMP.* *m,FPn 16345: case 0b011_1001: //$xx39: FCMP.* *m,FPn (MC68882) 16346: case 0b011_1100: //$xx3C: FCMP.* *m,FPn (MC68882) コマンドワードの不連続箇所に注意 16347: case 0b011_1101: //$xx3D: FCMP.* *m,FPn (MC68882) 16348: // BSUN 常にクリア 16349: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16350: // OPERR 常にクリア 16351: // OVFL 常にクリア 16352: // UNFL 常にクリア 16353: // DZ 常にクリア 16354: // INEX2 常にクリア 16355: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16356: // FCMPはinfinityを常にクリアする 16357: // efp.compareTo(x,y)を使う 16358: // efp.compareTo(x,y)はefp.sub(x,y)よりも速い 16359: // efp.sub(x,y)はINEX2をセットしてしまう 16360: // efp.compareTo(x,y)は-0<+0だがFCMPは-0==+0なのでこれだけ調節する 16361: { 16362: int xf = XEiJ.fpuFPn[n].flg; 16363: int yf = XEiJ.fpuFPn[m].flg; 16364: if ((xf | yf) << 3 < 0) { //どちらかがNaN 16365: //XEiJ.fpuFPn[EFPBox.EPB_DST_TMP].setnan (); 16366: XEiJ.fpuFPn[EFPBox.EPB_DST_TMP].flg = EFPBox.N; 16367: } else { 16368: int i = ((xf & yf) << 1 < 0 ? 0 : //両方±0 16369: XEiJ.fpuFPn[n].compareTo (XEiJ.fpuFPn[m])); //-Inf==-Inf<-x<-0<+0<+x<+Inf==+Inf<NaN==NaN 16370: if (i == 0) { 16371: if (xf < 0) { 16372: //XEiJ.fpuFPn[EFPBox.EPB_DST_TMP].negset0 (); 16373: XEiJ.fpuFPn[EFPBox.EPB_DST_TMP].flg = EFPBox.M | EFPBox.Z; 16374: } else { 16375: //XEiJ.fpuFPn[EFPBox.EPB_DST_TMP].set0 (); 16376: XEiJ.fpuFPn[EFPBox.EPB_DST_TMP].flg = EFPBox.P | EFPBox.Z; 16377: } 16378: } else if (i < 0) { 16379: XEiJ.fpuFPn[EFPBox.EPB_DST_TMP].negset1 (); 16380: } else { 16381: XEiJ.fpuFPn[EFPBox.EPB_DST_TMP].set1 (); 16382: } 16383: } 16384: n = EFPBox.EPB_DST_TMP; 16385: } 16386: break; 16387: 16388: case 0b011_1010: //$xx3A: FTST.* *m 16389: case 0b011_1011: //$xx3B: FTST.* *m (MC68882) 16390: case 0b011_1110: //$xx3E: FTST.* *m (MC68882) コマンドワードの不連続箇所に注意 16391: case 0b011_1111: //$xx3F: FTST.* *m (MC68882) 16392: // BSUN 常にクリア 16393: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16394: // OPERR 常にクリア 16395: // OVFL 常にクリア 16396: // UNFL 常にクリア 16397: // DZ 常にクリア 16398: // INEX2 常にクリア 16399: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16400: // ソースオペランドをダミーのデスティネーションオペランドにコピーしてテストする 16401: // デスティネーションオペランドは変化しない 16402: // デスティネーションオペランドにはFP0が指定される場合が多いがFP0である必要はない 16403: XEiJ.fpuFPn[EFPBox.EPB_DST_TMP].sete (XEiJ.fpuFPn[m]); 16404: n = EFPBox.EPB_DST_TMP; 16405: break; 16406: 16407: case 0b100_0000: //$xx40: FSMOVE.* *m,FPn 16408: // BSUN 常にクリア 16409: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16410: // OPERR 常にクリア 16411: // OVFL 常にクリア 16412: // UNFL 結果が非正規化数のときセット、それ以外はクリア 16413: // DZ 常にクリア 16414: // INEX2 結果に誤差があるときセット、それ以外はクリア 16415: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16416: XEiJ.fpuBox.epbSetRoundingPrec (EFPBox.EPB_PREC_SGL); 16417: XEiJ.fpuFPn[n].sete (XEiJ.fpuFPn[m]).finish (); 16418: break; 16419: 16420: case 0b100_0001: //$xx41: FSSQRT.* *m,FPn 16421: // BSUN 常にクリア 16422: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16423: // OPERR 引数が-0を除く負数のときセット、それ以外はクリア 16424: // OVFL 常にクリア 16425: // UNFL 常にクリア 16426: // DZ 常にクリア 16427: // INEX2 結果に誤差があるときセット、それ以外はクリア 16428: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16429: XEiJ.mpuCycleCount += 67; 16430: XEiJ.fpuBox.epbSetRoundingPrec (EFPBox.EPB_PREC_SGL); 16431: XEiJ.fpuFPn[n].sqrt (XEiJ.fpuFPn[m]); 16432: break; 16433: 16434: //case 0b100_0010: //$xx42: 16435: //case 0b100_0011: //$xx43: 16436: 16437: case 0b100_0100: //$xx44: FDMOVE.* *m,FPn 16438: // BSUN 常にクリア 16439: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16440: // OPERR 常にクリア 16441: // OVFL 常にクリア 16442: // UNFL 結果が非正規化数のときセット、それ以外はクリア 16443: // DZ 常にクリア 16444: // INEX2 結果に誤差があるときセット、それ以外はクリア 16445: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16446: XEiJ.fpuBox.epbSetRoundingPrec (EFPBox.EPB_PREC_DBL); 16447: XEiJ.fpuFPn[n].sete (XEiJ.fpuFPn[m]).finish (); 16448: break; 16449: 16450: case 0b100_0101: //$xx45: FDSQRT.* *m,FPn 16451: // BSUN 常にクリア 16452: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16453: // OPERR 引数が-0を除く負数のときセット、それ以外はクリア 16454: // OVFL 常にクリア 16455: // UNFL 常にクリア 16456: // DZ 常にクリア 16457: // INEX2 結果に誤差があるときセット、それ以外はクリア 16458: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16459: XEiJ.mpuCycleCount += 67; 16460: XEiJ.fpuBox.epbSetRoundingPrec (EFPBox.EPB_PREC_DBL); 16461: XEiJ.fpuFPn[n].sqrt (XEiJ.fpuFPn[m]); 16462: break; 16463: 16464: //case 0b100_0110: //$xx46: 16465: //case 0b100_0111: //$xx47: 16466: //case 0b100_1000: //$xx48: 16467: //case 0b100_1001: //$xx49: 16468: //case 0b100_1010: //$xx4A: 16469: //case 0b100_1011: //$xx4B: 16470: //case 0b100_1100: //$xx4C: 16471: //case 0b100_1101: //$xx4D: 16472: //case 0b100_1110: //$xx4E: 16473: //case 0b100_1111: //$xx4F: 16474: //case 0b101_0000: //$xx50: 16475: //case 0b101_0001: //$xx51: 16476: //case 0b101_0010: //$xx52: 16477: //case 0b101_0011: //$xx53: 16478: //case 0b101_0100: //$xx54: 16479: //case 0b101_0101: //$xx55: 16480: //case 0b101_0110: //$xx56: 16481: //case 0b101_0111: //$xx57: 16482: 16483: case 0b101_1000: //$xx58: FSABS.* *m,FPn 16484: // BSUN 常にクリア 16485: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16486: // OPERR 常にクリア 16487: // OVFL 常にクリア 16488: // UNFL 結果が非正規化数のときセット、それ以外はクリア 16489: // DZ 常にクリア 16490: // INEX2 常にクリア 16491: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16492: XEiJ.fpuBox.epbSetRoundingPrec (EFPBox.EPB_PREC_SGL); 16493: XEiJ.fpuFPn[n].abs (XEiJ.fpuFPn[m]); 16494: break; 16495: 16496: //case 0b101_1001: //$xx59: 16497: 16498: case 0b101_1010: //$xx5A: FSNEG.* *m,FPn 16499: // BSUN 常にクリア 16500: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16501: // OPERR 常にクリア 16502: // OVFL 常にクリア 16503: // UNFL 結果が非正規化数のときセット、それ以外はクリア 16504: // DZ 常にクリア 16505: // INEX2 常にクリア 16506: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16507: XEiJ.fpuBox.epbSetRoundingPrec (EFPBox.EPB_PREC_SGL); 16508: XEiJ.fpuFPn[n].neg (XEiJ.fpuFPn[m]); 16509: break; 16510: 16511: //case 0b101_1011: //$xx5B: 16512: 16513: case 0b101_1100: //$xx5C: FDABS.* *m,FPn 16514: // BSUN 常にクリア 16515: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16516: // OPERR 常にクリア 16517: // OVFL 常にクリア 16518: // UNFL 結果が非正規化数のときセット、それ以外はクリア 16519: // DZ 常にクリア 16520: // INEX2 常にクリア 16521: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16522: XEiJ.fpuBox.epbSetRoundingPrec (EFPBox.EPB_PREC_DBL); 16523: XEiJ.fpuFPn[n].abs (XEiJ.fpuFPn[m]); 16524: break; 16525: 16526: //case 0b101_1101: //$xx5D: 16527: 16528: case 0b101_1110: //$xx5E: FDNEG.* *m,FPn 16529: // BSUN 常にクリア 16530: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16531: // OPERR 常にクリア 16532: // OVFL 常にクリア 16533: // UNFL 結果が非正規化数のときセット、それ以外はクリア 16534: // DZ 常にクリア 16535: // INEX2 常にクリア 16536: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16537: XEiJ.fpuBox.epbSetRoundingPrec (EFPBox.EPB_PREC_DBL); 16538: XEiJ.fpuFPn[n].neg (XEiJ.fpuFPn[m]); 16539: break; 16540: 16541: //case 0b101_1111: //$xx5F: 16542: 16543: case 0b110_0000: //$xx60: FSDIV.* *m,FPn 16544: // BSUN 常にクリア 16545: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16546: // OPERR 引数が両方ゼロまたは両方無限大のときセット、それ以外はクリア 16547: // OVFL オーバーフローしたときセット、それ以外はクリア 16548: // UNFL 結果が非正規化数のときセット、それ以外はクリア 16549: // DZ 被除数がゼロ、無限大、NaN以外で除数がゼロのときセット、それ以外はクリア 16550: // INEX2 結果に誤差があるときセット、それ以外はクリア 16551: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16552: XEiJ.mpuCycleCount += 36; 16553: XEiJ.fpuBox.epbSetRoundingPrec (EFPBox.EPB_PREC_SGL); 16554: XEiJ.fpuFPn[n].div (XEiJ.fpuFPn[m]); 16555: break; 16556: 16557: //case 0b110_0001: //$xx61: 16558: 16559: case 0b110_0010: //$xx62: FSADD.* *m,FPn 16560: // BSUN 常にクリア 16561: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16562: // OPERR 引数が両方無限大で符号が異なるときセット、それ以外はクリア 16563: // OVFL オーバーフローしたときセット、それ以外はクリア 16564: // UNFL 結果が非正規化数のときセット、それ以外はクリア 16565: // DZ 常にクリア 16566: // INEX2 結果に誤差があるときセット、それ以外はクリア 16567: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16568: XEiJ.mpuCycleCount += 2; 16569: XEiJ.fpuBox.epbSetRoundingPrec (EFPBox.EPB_PREC_SGL); 16570: XEiJ.fpuFPn[n].add (XEiJ.fpuFPn[m]); 16571: break; 16572: 16573: case 0b110_0011: //$xx63: FSMUL.* *m,FPn 16574: // BSUN 常にクリア 16575: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16576: // OPERR 引数の一方がゼロで他方が無限大のときセット、それ以外はクリア 16577: // OVFL オーバーフローしたときセット、それ以外はクリア 16578: // UNFL 結果が非正規化数のときセット、それ以外はクリア 16579: // DZ 常にクリア 16580: // INEX2 結果に誤差があるときセット、それ以外はクリア 16581: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16582: XEiJ.mpuCycleCount += 2; 16583: XEiJ.fpuBox.epbSetRoundingPrec (EFPBox.EPB_PREC_SGL); 16584: XEiJ.fpuFPn[n].mul (XEiJ.fpuFPn[m]); 16585: break; 16586: 16587: case 0b110_0100: //$xx64: FDDIV.* *m,FPn 16588: // BSUN 常にクリア 16589: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16590: // OPERR 引数が両方ゼロまたは両方無限大のときセット、それ以外はクリア 16591: // OVFL オーバーフローしたときセット、それ以外はクリア 16592: // UNFL 結果が非正規化数のときセット、それ以外はクリア 16593: // DZ 被除数がゼロ、無限大、NaN以外で除数がゼロのときセット、それ以外はクリア 16594: // INEX2 結果に誤差があるときセット、それ以外はクリア 16595: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16596: XEiJ.mpuCycleCount += 36; 16597: XEiJ.fpuBox.epbSetRoundingPrec (EFPBox.EPB_PREC_DBL); 16598: XEiJ.fpuFPn[n].div (XEiJ.fpuFPn[m]); 16599: break; 16600: 16601: //case 0b110_0101: //$xx65: 16602: 16603: case 0b110_0110: //$xx66: FDADD.* *m,FPn 16604: // BSUN 常にクリア 16605: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16606: // OPERR 引数が両方無限大で符号が異なるときセット、それ以外はクリア 16607: // OVFL オーバーフローしたときセット、それ以外はクリア 16608: // UNFL 結果が非正規化数のときセット、それ以外はクリア 16609: // DZ 常にクリア 16610: // INEX2 結果に誤差があるときセット、それ以外はクリア 16611: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16612: XEiJ.mpuCycleCount += 2; 16613: XEiJ.fpuBox.epbSetRoundingPrec (EFPBox.EPB_PREC_DBL); 16614: XEiJ.fpuFPn[n].add (XEiJ.fpuFPn[m]); 16615: break; 16616: 16617: case 0b110_0111: //$xx67: FDMUL.* *m,FPn 16618: // BSUN 常にクリア 16619: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16620: // OPERR 引数の一方がゼロで他方が無限大のときセット、それ以外はクリア 16621: // OVFL オーバーフローしたときセット、それ以外はクリア 16622: // UNFL 結果が非正規化数のときセット、それ以外はクリア 16623: // DZ 常にクリア 16624: // INEX2 結果に誤差があるときセット、それ以外はクリア 16625: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16626: XEiJ.mpuCycleCount += 2; 16627: XEiJ.fpuBox.epbSetRoundingPrec (EFPBox.EPB_PREC_DBL); 16628: XEiJ.fpuFPn[n].mul (XEiJ.fpuFPn[m]); 16629: break; 16630: 16631: case 0b110_1000: //$xx68: FSSUB.* *m,FPn 16632: // BSUN 常にクリア 16633: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16634: // OPERR 引数が両方無限大で符号が同じときセット、それ以外はクリア 16635: // OVFL オーバーフローしたときセット、それ以外はクリア 16636: // UNFL 結果が非正規化数のときセット、それ以外はクリア 16637: // DZ 常にクリア 16638: // INEX2 結果に誤差があるときセット、それ以外はクリア 16639: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16640: XEiJ.mpuCycleCount += 2; 16641: XEiJ.fpuBox.epbSetRoundingPrec (EFPBox.EPB_PREC_SGL); 16642: XEiJ.fpuFPn[n].sub (XEiJ.fpuFPn[m]); 16643: break; 16644: 16645: //case 0b110_1001: //$xx69: 16646: //case 0b110_1010: //$xx6A: 16647: //case 0b110_1011: //$xx6B: 16648: 16649: case 0b110_1100: //$xx6C: FDSUB.* *m,FPn 16650: // BSUN 常にクリア 16651: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16652: // OPERR 引数が両方無限大で符号が同じときセット、それ以外はクリア 16653: // OVFL オーバーフローしたときセット、それ以外はクリア 16654: // UNFL 結果が非正規化数のときセット、それ以外はクリア 16655: // DZ 常にクリア 16656: // INEX2 結果に誤差があるときセット、それ以外はクリア 16657: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16658: XEiJ.mpuCycleCount += 2; 16659: XEiJ.fpuBox.epbSetRoundingPrec (EFPBox.EPB_PREC_DBL); 16660: XEiJ.fpuFPn[n].sub (XEiJ.fpuFPn[m]); 16661: break; 16662: 16663: //case 0b110_1101: //$xx6D: 16664: //case 0b110_1110: //$xx6E: 16665: //case 0b110_1111: //$xx6F: 16666: 16667: case 0b111_0000: //$xx70: FLGAMMA *m,FPn 16668: if (EFPBox.EPB_EXTRA_OPERATION) { 16669: XEiJ.fpuFPn[n].lgamma (XEiJ.fpuFPn[m]); 16670: break; 16671: } else { 16672: XEiJ.regPC = XEiJ.regPC0 + 2; //拡張ワードを読まなかったことにする 16673: irpFline (); 16674: break fgen; 16675: } 16676: 16677: case 0b111_0001: //$xx71: FTGAMMA *m,FPn 16678: if (EFPBox.EPB_EXTRA_OPERATION) { 16679: XEiJ.fpuFPn[n].tgamma (XEiJ.fpuFPn[m]); 16680: break; 16681: } else { 16682: XEiJ.regPC = XEiJ.regPC0 + 2; //拡張ワードを読まなかったことにする 16683: irpFline (); 16684: break fgen; 16685: } 16686: 16687: //case 0b111_0010: //$xx72: 16688: //case 0b111_0011: //$xx73: 16689: //case 0b111_0100: //$xx74: 16690: //case 0b111_0101: //$xx75: 16691: //case 0b111_0110: //$xx76: 16692: //case 0b111_0111: //$xx77: 16693: //case 0b111_1000: //$xx78: 16694: //case 0b111_1001: //$xx79: 16695: //case 0b111_1010: //$xx7A: 16696: //case 0b111_1011: //$xx7B: 16697: //case 0b111_1100: //$xx7C: 16698: //case 0b111_1101: //$xx7D: 16699: //case 0b111_1110: //$xx7E: 16700: //case 0b111_1111: //$xx7F: 16701: 16702: default: //未定義 16703: XEiJ.regPC = XEiJ.regPC0 + 2; //拡張ワードを読まなかったことにする 16704: irpFline (); 16705: break fgen; 16706: } 16707: //FPSRのFPCCを設定する 16708: XEiJ.fpuBox.epbFpsr |= XEiJ.fpuFPn[n].flg >>> 4; 16709: //FPSRのAEXCを設定する 16710: XEiJ.fpuBox.epbFpsr |= XEiJ.FPU_FPSR_EXC_TO_AEXC[XEiJ.fpuBox.epbFpsr >> 8 & 255]; 16711: //浮動小数点命令実行後例外 floating-point post-instruction exception 16712: if (irpFPPostInstruction (a)) { 16713: break fgen; 16714: } 16715: break fgen; 16716: 16717: 16718: case 0b011: //$6xxx-$7xxx: FMOVE.* FPn,<ea> 16719: // BSUN 常にクリア 16720: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16721: // OPERR byte,word,longで無限大または指定されたサイズに収まらないとき、packedでk-factorが17よりも大きいか指数部が3桁に収まらないときセット、それ以外はクリア 16722: // OVFL packedではなくてオーバーフローしたときセット、それ以外はクリア 16723: // UNFL packedではなくて結果が非正規化数のときセット、それ以外はクリア 16724: // DZ 常にクリア 16725: // INEX2 結果に誤差があるときセット、それ以外はクリア 16726: // INEX1 常にクリア 16727: XEiJ.fpuBox.epbFpsr &= 0xffff00ff; //FMOVE.* FPn,<ea>でFPSRのコンディションコードバイトは変化しない 16728: XEiJ.fpuBox.epbFpiar = XEiJ.regPC0; //FPIARはFMOVEM/FMOVE FPcr/FSAVE/FRESTORE以外の命令で例外が発生しなくても更新される 16729: 16730: switch (m) { 16731: 16732: case 0b000: //$60xx-$63xx: FMOVE.L FPn,<ea> 16733: { 16734: int i = XEiJ.fpuFPn[n].geti (XEiJ.fpuBox.epbRoundingMode); 16735: if (ea < XEiJ.EA_AR) { //Dr。Ar不可 16736: XEiJ.regRn[ea] = i; 16737: } else { //Dr以外 16738: a = efaMltLong (ea); 16739: mmuWriteLongData (a, i, XEiJ.regSRS); 16740: } 16741: } 16742: break; 16743: 16744: case 0b001: //$64xx-$67xx: FMOVE.S FPn,<ea> 16745: { 16746: int i = XEiJ.fpuFPn[n].getf0 (XEiJ.fpuBox.epbRoundingMode); 16747: if (ea < XEiJ.EA_AR) { //Dr。Ar不可 16748: XEiJ.regRn[ea] = i; 16749: } else { //Dr以外 16750: a = efaMltLong (ea); 16751: mmuWriteLongData (a, i, XEiJ.regSRS); 16752: } 16753: } 16754: break; 16755: 16756: case 0b010: //$68xx-$6Bxx: FMOVE.X FPn,<ea> 16757: { 16758: int[] ib = new int[3]; 16759: if (XEiJ.fpuBox.epbIsTriple ()) { //三倍精度 16760: XEiJ.fpuFPn[n].gety012 (ib, 0, XEiJ.fpuBox.epbRoundingMode); 16761: } else { //拡張精度 16762: XEiJ.fpuFPn[n].getx012 (ib, 0, XEiJ.fpuBox.epbRoundingMode); 16763: } 16764: a = efaMltExtd (ea); 16765: if ((ea & 070) == 040) { //-(Ar) 16766: mmuWriteLongData (m60Address = a + 8, ib[2], XEiJ.regSRS); 16767: mmuWriteLongData (m60Address = a + 4, ib[1], XEiJ.regSRS); 16768: mmuWriteLongData (m60Address = a, ib[0], XEiJ.regSRS); 16769: } else { //-(Ar)以外 16770: mmuWriteLongData (m60Address = a, ib[0], XEiJ.regSRS); 16771: mmuWriteLongData (m60Address = a + 4, ib[1], XEiJ.regSRS); 16772: mmuWriteLongData (m60Address = a + 8, ib[2], XEiJ.regSRS); 16773: } 16774: } 16775: break; 16776: 16777: case 0b011: //$6Cxx-$6Fxx: FMOVE.P FPn,<ea>{#k} 16778: { 16779: a = efaMltExtd (ea); 16780: if (!XEiJ.fpuBox.epbIsFullSpec ()) { //パックトデシマル 16781: XEiJ.fpuBox.epbExceptionStatusWord = 0xe000 | M68kException.M6E_FP_UNSUPPORTED_DATA_TYPE & 7; 16782: irpExceptionFormat3 (M68kException.M6E_FP_UNSUPPORTED_DATA_TYPE << 2, XEiJ.regPC, a); //pcは次の命令,アドレスはデスティネーションオペランド 16783: break fgen; 16784: } 16785: int[] ib = new int[3]; 16786: XEiJ.fpuFPn[n].getp012 (ib, 0, w); //k-factor付き 16787: if ((ea & 070) == 040) { //-(Ar) 16788: mmuWriteLongData (m60Address = a + 8, ib[2], XEiJ.regSRS); 16789: mmuWriteLongData (m60Address = a + 4, ib[1], XEiJ.regSRS); 16790: mmuWriteLongData (m60Address = a, ib[0], XEiJ.regSRS); 16791: } else { //-(Ar)以外 16792: mmuWriteLongData (m60Address = a, ib[0], XEiJ.regSRS); 16793: mmuWriteLongData (m60Address = a + 4, ib[1], XEiJ.regSRS); 16794: mmuWriteLongData (m60Address = a + 8, ib[2], XEiJ.regSRS); 16795: } 16796: } 16797: break; 16798: 16799: case 0b100: //$70xx-$73xx: FMOVE.W FPn,<ea> 16800: { 16801: int i = XEiJ.fpuFPn[n].gets (XEiJ.fpuBox.epbRoundingMode); 16802: if (ea < XEiJ.EA_AR) { //Dr。Ar不可 16803: XEiJ.regRn[ea] = XEiJ.regRn[ea] & ~65535 | (char) i; 16804: } else { //Dr以外 16805: a = efaMltWord (ea); 16806: mmuWriteWordData (a, i, XEiJ.regSRS); 16807: } 16808: } 16809: break; 16810: 16811: case 0b101: //$74xx-$77xx: FMOVE.D FPn,<ea> 16812: { 16813: long l = XEiJ.fpuFPn[n].getd01 (XEiJ.fpuBox.epbRoundingMode); 16814: a = efaMltQuad (ea); 16815: mmuWriteQuadData (a, l, XEiJ.regSRS); 16816: } 16817: break; 16818: 16819: case 0b110: //$78xx-$7Bxx: FMOVE.B FPn,<ea> 16820: { 16821: int i = XEiJ.fpuFPn[n].getb (XEiJ.fpuBox.epbRoundingMode); 16822: if (ea < XEiJ.EA_AR) { //Dr。Ar不可 16823: XEiJ.regRn[ea] = XEiJ.regRn[ea] & ~255 | i & 255; 16824: } else { //Dr以外 16825: a = efaMltByte (ea); 16826: mmuWriteByteData (a, i, XEiJ.regSRS); 16827: } 16828: } 16829: break; 16830: 16831: case 0b111: //$7Cxx-$7Fxx: FMOVE.P FPn,<ea>{Dl} 16832: default: 16833: { 16834: a = efaMltExtd (ea); 16835: if (!XEiJ.fpuBox.epbIsFullSpec ()) { //パックトデシマル 16836: XEiJ.fpuBox.epbExceptionStatusWord = 0xe000 | M68kException.M6E_FP_UNSUPPORTED_DATA_TYPE & 7; 16837: irpExceptionFormat3 (M68kException.M6E_FP_UNSUPPORTED_DATA_TYPE << 2, XEiJ.regPC, a); //pcは次の命令,アドレスはデスティネーションオペランド 16838: break fgen; 16839: } 16840: byte[] b = new byte[12]; 16841: XEiJ.fpuFPn[n].getp012 (b, 0, XEiJ.regRn[w >> 4 & 7]); //k-factor付き 16842: if (ea >> 3 == XEiJ.MMM_MN) { //-(Ar) 16843: mmuWriteByteArrayDecrement (a, b, 0, 12, XEiJ.regSRS); 16844: } else { //-(Ar) 16845: mmuWriteByteArray (a, b, 0, 12, XEiJ.regSRS); 16846: } 16847: } 16848: } 16849: //FPSRのAEXCを設定する 16850: XEiJ.fpuBox.epbFpsr |= XEiJ.FPU_FPSR_EXC_TO_AEXC[XEiJ.fpuBox.epbFpsr >> 8 & 255]; 16851: //浮動小数点命令実行後例外 floating-point post-instruction exception 16852: if (irpFPPostInstruction (a)) { 16853: break fgen; 16854: } 16855: break fgen; 16856: 16857: 16858: case 0b100: //$8xxx-$9xxx: FMOVEM.L <ea>,FPCR/FPSR/FPIAR 16859: XEiJ.mpuCycleCount += 6; 16860: // FMOVEM命令は例外を発生させずFPCR/FPSR/FPIARも(デスティネーションに書かれたもの以外)変化しない 16861: // 格納順序はFPCRが下位アドレス(連結したとき上位),FPIARが上位アドレス(連結したとき下位) 16862: 16863: // レジスタリストは転送方向によらず4=FPCR,2=FPSR,1=FPIAR。0のとき1とみなす 16864: // Dr,Arは単一レジスタのみ、ArはFPIARのみ、さもなくば不当命令 16865: // (Ar)+は下位から転送した後にArをまとめて増やし、-(Ar)はArをまとめて減らした後に下位から転送する 16866: // 68060のとき#<data>は単一レジスタのみ、さもなくば未実装実効アドレス 16867: // 複数転送するときもFSLWのSIZEはLong 16868: { 16869: if (m == 0) { //レジスタリストが0のとき 16870: m = 1; //FPIARとみなす 16871: } 16872: int s = m == 7 ? 12 : m == 6 || m == 5 || m == 3 ? 8 : 4; //転送サイズ 16873: if ((ea & 070) == 000) { //Dr 16874: if (4 < s) { //複数 16875: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 16876: throw M68kException.m6eSignal; 16877: } 16878: } else if ((ea & 070) == 010) { //Ar 16879: if (m != 1) { //FPIAR以外 16880: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 16881: throw M68kException.m6eSignal; 16882: } 16883: } else if ((ea & 070) == 030) { //(Ar)+ 16884: a = XEiJ.regRn[ea - (030 - 8)]; 16885: } else if ((ea & 070) == 040) { //-(Ar) 16886: m60Incremented -= (long) s << (ea << 3); 16887: a = XEiJ.regRn[ea - (040 - 8)] -= s; 16888: } else if (ea == 074) { //#<data> 16889: if (4 < s && //複数 16890: !XEiJ.fpuBox.epbIsFullSpec ()) { //フルスペック以外 16891: irpExceptionFormat0 (M68kException.M6E_UNIMPLEMENTED_EFFECTIVE << 2, XEiJ.regPC0); //pcは命令の先頭 16892: break fgen; 16893: } 16894: } else { //その他 16895: a = efaMemLong (ea); 16896: } 16897: for (int t = 4; 1 <= t; t >>= 1) { //4,2,1 16898: if ((m & t) == 0) { 16899: continue; 16900: } 16901: int i = (ea < 020 ? XEiJ.regRn[ea] : //Dr,Ar 16902: ea == 074 ? mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS) : //#<data> 16903: mmuReadLongData (m60Address = a, XEiJ.regSRS)); 16904: if (t == 4) { //FPCR 16905: XEiJ.fpuBox.epbFpcr = i & EFPBox.EPB_FPCR_ALL; 16906: } else if (t == 2) { //FPSR 16907: XEiJ.fpuBox.epbFpsr = i & EFPBox.EPB_FPSR_ALL; 16908: // fmove.lでfpsrのEXCに書き込んだだけではAEXCは更新されない 16909: // fmove.lでfpsrに0x0000ff00を書き込んですぐに読み出しても0x0000ff00のまま 16910: } else { //FPIAR 16911: XEiJ.fpuBox.epbFpiar = i; 16912: } 16913: a += 4; 16914: } 16915: if ((ea & 070) == 030) { //(Ar)+ 16916: m60Incremented += (long) s << (ea << 3); 16917: XEiJ.regRn[ea - (040 - 8)] += s; 16918: } 16919: } 16920: break fgen; 16921: 16922: 16923: case 0b101: //$Axxx-$Bxxx: FMOVEM.L FPCR/FPSR/FPIAR,<ea> 16924: XEiJ.mpuCycleCount += 4; 16925: 16926: { 16927: if (m == 0) { //レジスタリストが0のとき 16928: m = 1; //FPIARとみなす 16929: } 16930: int s = m == 7 ? 12 : m == 6 || m == 5 || m == 3 ? 8 : 4; //転送サイズ 16931: if ((ea & 070) == 000) { //Dr 16932: if (4 < s) { //複数 16933: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 16934: throw M68kException.m6eSignal; 16935: } 16936: } else if ((ea & 070) == 010) { //Ar 16937: if (m != 1) { //FPIAR以外 16938: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 16939: throw M68kException.m6eSignal; 16940: } 16941: } else if ((ea & 070) == 030) { //(Ar)+ 16942: a = XEiJ.regRn[ea - (030 - 8)]; 16943: } else if ((ea & 070) == 040) { //-(Ar) 16944: m60Incremented -= (long) s << (ea << 3); 16945: a = XEiJ.regRn[ea - (040 - 8)] -= s; 16946: } else { //その他 16947: a = efaMltLong (ea); 16948: } 16949: for (int t = 4; 1 <= t; t >>= 1) { //4,2,1 16950: if ((m & t) == 0) { 16951: continue; 16952: } 16953: int i = (t == 4 ? XEiJ.fpuBox.epbFpcr : //FPCR 16954: t == 2 ? XEiJ.fpuBox.epbFpsr : //FPSR 16955: XEiJ.fpuBox.epbFpiar); //FPIAR 16956: if (ea < 020) { //Dr,Ar 16957: XEiJ.regRn[ea] = i; 16958: } else { 16959: mmuWriteLongData (m60Address = a, i, XEiJ.regSRS); 16960: } 16961: a += 4; 16962: } 16963: if ((ea & 070) == 030) { //(Ar)+ 16964: m60Incremented += (long) s << (ea << 3); 16965: XEiJ.regRn[ea - (040 - 8)] += s; 16966: } 16967: } 16968: break fgen; 16969: 16970: 16971: case 0b110: //$Cxxx-$Dxxx: FMOVEM.X <ea>,<list> 16972: // 0 <ea>,<list> 16973: // 1 <list>,<ea> 16974: // 0 -(Ar) 76543210 16975: // 1 -(Ar)以外 01234567 16976: // 0 static 16977: // 1 dynamic 0rrr0000 16978: // mmm 16979: { 16980: if ((m & 2) != 0 && !XEiJ.fpuBox.epbIsFullSpec ()) { //動的レジスタリスト 16981: irpExceptionFormat0 (M68kException.M6E_UNIMPLEMENTED_EFFECTIVE << 2, XEiJ.regPC0); //pcは命令の先頭 16982: break fgen; 16983: } 16984: int l = 0xff & ((m & 2) == 0 ? w : XEiJ.regRn[(0x0070 & w) >> 4]); 16985: int[] ib = new int[3]; 16986: if ((ea & 070) == 030) { //(Ar)+ 16987: int arr = ea - (030 - 8); 16988: a = XEiJ.regRn[arr]; 16989: for (n = 0; n <= 7; n++) { 16990: if ((l & (0x80 >> n)) == 0) { //01234567 16991: continue; 16992: } 16993: XEiJ.mpuCycleCount += 3; 16994: ib[0] = mmuReadLongData (m60Address = a, XEiJ.regSRS); 16995: ib[1] = mmuReadLongData (m60Address = a + 4, XEiJ.regSRS); 16996: ib[2] = mmuReadLongData (m60Address = a + 8, XEiJ.regSRS); 16997: if (XEiJ.fpuBox.epbIsTriple ()) { //三倍精度 16998: XEiJ.fpuFPn[n].sety012 (ib, 0); 16999: } else { //拡張精度 17000: XEiJ.fpuFPn[n].setx012 (ib, 0); 17001: } 17002: a += 12; 17003: } 17004: m60Incremented += (long) (a - XEiJ.regRn[arr]) << (arr << 3); 17005: XEiJ.regRn[arr] = a; 17006: } else { //(Ar)+以外 17007: a = efaCntLong (ea); 17008: for (n = 0; n <= 7; n++) { 17009: if ((l & (0x80 >> n)) == 0) { //01234567 17010: continue; 17011: } 17012: XEiJ.mpuCycleCount += 3; 17013: ib[0] = mmuReadLongData (m60Address = a, XEiJ.regSRS); 17014: ib[1] = mmuReadLongData (m60Address = a + 4, XEiJ.regSRS); 17015: ib[2] = mmuReadLongData (m60Address = a + 8, XEiJ.regSRS); 17016: if (XEiJ.fpuBox.epbIsTriple ()) { //三倍精度 17017: XEiJ.fpuFPn[n].sety012 (ib, 0); 17018: } else { //拡張精度 17019: XEiJ.fpuFPn[n].setx012 (ib, 0); 17020: } 17021: a += 12; 17022: } 17023: } 17024: } 17025: break fgen; 17026: 17027: 17028: case 0b111: //$Exxx-$Fxxx: FMOVEM.X <list>,<ea> 17029: { 17030: if ((m & 2) != 0 && !XEiJ.fpuBox.epbIsFullSpec ()) { //動的レジスタリスト 17031: irpExceptionFormat0 (M68kException.M6E_UNIMPLEMENTED_EFFECTIVE << 2, XEiJ.regPC0); //pcは命令の先頭 17032: break fgen; 17033: } 17034: int l = 0xff & ((m & 2) == 0 ? w : XEiJ.regRn[(0x0070 & w) >> 4]); 17035: int[] ib = new int[3]; 17036: if ((ea & 070) == 040) { //-(Ar) 17037: int arr = ea - (040 - 8); 17038: a = XEiJ.regRn[arr]; 17039: for (n = 7; 0 <= n; n--) { 17040: if ((l & (0x01 << n)) == 0) { //76543210 17041: continue; 17042: } 17043: XEiJ.mpuCycleCount += 3; 17044: a -= 12; 17045: if (XEiJ.fpuBox.epbIsTriple ()) { //三倍精度 17046: XEiJ.fpuFPn[n].gety012 (ib, 0, XEiJ.fpuBox.epbRoundingMode); 17047: } else { //拡張精度 17048: XEiJ.fpuFPn[n].getx012 (ib, 0, XEiJ.fpuBox.epbRoundingMode); 17049: } 17050: mmuWriteLongData (m60Address = a + 8, ib[2], XEiJ.regSRS); 17051: mmuWriteLongData (m60Address = a + 4, ib[1], XEiJ.regSRS); 17052: mmuWriteLongData (m60Address = a, ib[0], XEiJ.regSRS); 17053: } 17054: m60Incremented -= (long) (XEiJ.regRn[arr] - a) << (arr << 3); 17055: XEiJ.regRn[arr] = a; 17056: } else { //-(Ar)以外 17057: a = efaCntLong (ea); 17058: for (n = 0; n <= 7; n++) { 17059: if ((l & (0x80 >> n)) == 0) { //01234567 17060: continue; 17061: } 17062: XEiJ.mpuCycleCount += 3; 17063: if (XEiJ.fpuBox.epbIsTriple ()) { //三倍精度 17064: XEiJ.fpuFPn[n].gety012 (ib, 0, XEiJ.fpuBox.epbRoundingMode); 17065: } else { //拡張精度 17066: XEiJ.fpuFPn[n].getx012 (ib, 0, XEiJ.fpuBox.epbRoundingMode); 17067: } 17068: mmuWriteLongData (m60Address = a, ib[0], XEiJ.regSRS); 17069: mmuWriteLongData (m60Address = a + 4, ib[1], XEiJ.regSRS); 17070: mmuWriteLongData (m60Address = a + 8, ib[2], XEiJ.regSRS); 17071: a += 12; 17072: } 17073: } 17074: } 17075: break fgen; 17076: 17077: 17078: case 0b001: //$2xxx-$3xxx: 未定義 17079: default: //未定義 17080: XEiJ.fpuBox.epbFpiar = XEiJ.regPC0; //FPIARはFMOVEM/FMOVE FPcr/FSAVE/FRESTORE以外の命令で例外が発生しなくても更新される 17081: XEiJ.regPC = XEiJ.regPC0 + 2; //拡張ワードを読まなかったことにする 17082: irpFline (); 17083: break fgen; 17084: } 17085: } //fgen 17086: } //irpFgen 17087: 17088: 17089: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 17090: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 17091: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 17092: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 17093: //FSF.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000000000 17094: //FSEQ.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000000001 17095: //FSOGT.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000000010 17096: //FSOGE.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000000011 17097: //FSOLT.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000000100 17098: //FSOLE.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000000101 17099: //FSOGL.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000000110 17100: //FSOR.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000000111 17101: //FSUN.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000001000 17102: //FSUEQ.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000001001 17103: //FSUGT.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000001010 17104: //FSUGE.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000001011 17105: //FSULT.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000001100 17106: //FSULE.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000001101 17107: //FSNE.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000001110 17108: //FST.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000001111 17109: //FSSF.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000010000 17110: //FSSEQ.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000010001 17111: //FSGT.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000010010 17112: //FSGE.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000010011 17113: //FSLT.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000010100 17114: //FSLE.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000010101 17115: //FSGL.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000010110 17116: //FSGLE.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000010111 17117: //FSNGLE.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000011000 17118: //FSNGL.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000011001 17119: //FSNLE.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000011010 17120: //FSNLT.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000011011 17121: //FSNGE.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000011100 17122: //FSNGT.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000011101 17123: //FSSNE.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000011110 17124: //FSST.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000011111 17125: //FDBF Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000000000-{offset} 17126: //FDBRA Dr,<label> |A|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000000000-{offset} [FDBF Dr,<label>] 17127: //FDBEQ Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000000001-{offset} 17128: //FDBOGT Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000000010-{offset} 17129: //FDBOGE Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000000011-{offset} 17130: //FDBOLT Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000000100-{offset} 17131: //FDBOLE Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000000101-{offset} 17132: //FDBOGL Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000000110-{offset} 17133: //FDBOR Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000000111-{offset} 17134: //FDBUN Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000001000-{offset} 17135: //FDBUEQ Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000001001-{offset} 17136: //FDBUGT Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000001010-{offset} 17137: //FDBUGE Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000001011-{offset} 17138: //FDBULT Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000001100-{offset} 17139: //FDBULE Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000001101-{offset} 17140: //FDBNE Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000001110-{offset} 17141: //FDBT Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000001111-{offset} 17142: //FDBSF Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000010000-{offset} 17143: //FDBSEQ Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000010001-{offset} 17144: //FDBGT Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000010010-{offset} 17145: //FDBGE Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000010011-{offset} 17146: //FDBLT Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000010100-{offset} 17147: //FDBLE Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000010101-{offset} 17148: //FDBGL Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000010110-{offset} 17149: //FDBGLE Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000010111-{offset} 17150: //FDBNGLE Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000011000-{offset} 17151: //FDBNGL Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000011001-{offset} 17152: //FDBNLE Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000011010-{offset} 17153: //FDBNLT Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000011011-{offset} 17154: //FDBNGE Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000011100-{offset} 17155: //FDBNGT Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000011101-{offset} 17156: //FDBSNE Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000011110-{offset} 17157: //FDBST Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000011111-{offset} 17158: //FTRAPF.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000000000-{data} 17159: //FTRAPEQ.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000000001-{data} 17160: //FTRAPOGT.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000000010-{data} 17161: //FTRAPOGE.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000000011-{data} 17162: //FTRAPOLT.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000000100-{data} 17163: //FTRAPOLE.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000000101-{data} 17164: //FTRAPOGL.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000000110-{data} 17165: //FTRAPOR.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000000111-{data} 17166: //FTRAPUN.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000001000-{data} 17167: //FTRAPUEQ.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000001001-{data} 17168: //FTRAPUGT.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000001010-{data} 17169: //FTRAPUGE.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000001011-{data} 17170: //FTRAPULT.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000001100-{data} 17171: //FTRAPULE.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000001101-{data} 17172: //FTRAPNE.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000001110-{data} 17173: //FTRAPT.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000001111-{data} 17174: //FTRAPSF.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000010000-{data} 17175: //FTRAPSEQ.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000010001-{data} 17176: //FTRAPGT.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000010010-{data} 17177: //FTRAPGE.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000010011-{data} 17178: //FTRAPLT.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000010100-{data} 17179: //FTRAPLE.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000010101-{data} 17180: //FTRAPGL.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000010110-{data} 17181: //FTRAPGLE.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000010111-{data} 17182: //FTRAPNGLE.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000011000-{data} 17183: //FTRAPNGL.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000011001-{data} 17184: //FTRAPNLE.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000011010-{data} 17185: //FTRAPNLT.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000011011-{data} 17186: //FTRAPNGE.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000011100-{data} 17187: //FTRAPNGT.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000011101-{data} 17188: //FTRAPSNE.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000011110-{data} 17189: //FTRAPST.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000011111-{data} 17190: //FTRAPF.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000000000-{data} 17191: //FTRAPEQ.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000000001-{data} 17192: //FTRAPOGT.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000000010-{data} 17193: //FTRAPOGE.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000000011-{data} 17194: //FTRAPOLT.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000000100-{data} 17195: //FTRAPOLE.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000000101-{data} 17196: //FTRAPOGL.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000000110-{data} 17197: //FTRAPOR.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000000111-{data} 17198: //FTRAPUN.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000001000-{data} 17199: //FTRAPUEQ.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000001001-{data} 17200: //FTRAPUGT.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000001010-{data} 17201: //FTRAPUGE.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000001011-{data} 17202: //FTRAPULT.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000001100-{data} 17203: //FTRAPULE.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000001101-{data} 17204: //FTRAPNE.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000001110-{data} 17205: //FTRAPT.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000001111-{data} 17206: //FTRAPSF.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000010000-{data} 17207: //FTRAPSEQ.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000010001-{data} 17208: //FTRAPGT.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000010010-{data} 17209: //FTRAPGE.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000010011-{data} 17210: //FTRAPLT.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000010100-{data} 17211: //FTRAPLE.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000010101-{data} 17212: //FTRAPGL.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000010110-{data} 17213: //FTRAPGLE.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000010111-{data} 17214: //FTRAPNGLE.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000011000-{data} 17215: //FTRAPNGL.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000011001-{data} 17216: //FTRAPNLE.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000011010-{data} 17217: //FTRAPNLT.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000011011-{data} 17218: //FTRAPNGE.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000011100-{data} 17219: //FTRAPNGT.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000011101-{data} 17220: //FTRAPSNE.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000011110-{data} 17221: //FTRAPST.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000011111-{data} 17222: //FTRAPF |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000000000 17223: //FTRAPEQ |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000000001 17224: //FTRAPOGT |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000000010 17225: //FTRAPOGE |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000000011 17226: //FTRAPOLT |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000000100 17227: //FTRAPOLE |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000000101 17228: //FTRAPOGL |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000000110 17229: //FTRAPOR |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000000111 17230: //FTRAPUN |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000001000 17231: //FTRAPUEQ |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000001001 17232: //FTRAPUGT |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000001010 17233: //FTRAPUGE |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000001011 17234: //FTRAPULT |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000001100 17235: //FTRAPULE |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000001101 17236: //FTRAPNE |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000001110 17237: //FTRAPT |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000001111 17238: //FTRAPSF |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000010000 17239: //FTRAPSEQ |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000010001 17240: //FTRAPGT |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000010010 17241: //FTRAPGE |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000010011 17242: //FTRAPLT |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000010100 17243: //FTRAPLE |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000010101 17244: //FTRAPGL |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000010110 17245: //FTRAPGLE |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000010111 17246: //FTRAPNGLE |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000011000 17247: //FTRAPNGL |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000011001 17248: //FTRAPNLE |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000011010 17249: //FTRAPNLT |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000011011 17250: //FTRAPNGE |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000011100 17251: //FTRAPNGT |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000011101 17252: //FTRAPSNE |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000011110 17253: //FTRAPST |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000011111 17254: public static void irpFscc () throws M68kException { 17255: fscc: { 17256: //XEiJ.fpuBox.epbExceptionStatusWord = 0; 17257: if ((7 & XEiJ.currentOnchipFPU) == 0) { 17258: irpFline (); 17259: break fscc; 17260: } 17261: XEiJ.fpuBox.epbFpiar = XEiJ.regPC0; //FPIARはFMOVEM/FMOVE FPcr/FSAVE/FRESTORE以外の命令で例外が発生しなくても更新される 17262: int w = mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); //pcwz。拡張ワード 17263: if ((w & 0b010000) != 0 && (XEiJ.fpuBox.epbFpsr & XEiJ.FPU_FPSR_NAN) != 0) { //IEEEノンアウェアテストでNANがセットされているとき 17264: XEiJ.fpuBox.epbFpsr |= XEiJ.FPU_FPSR_EXC_BSUN; //BSUNをセット 17265: XEiJ.fpuBox.epbFpsr |= XEiJ.FPU_FPSR_EXC_TO_AEXC[XEiJ.fpuBox.epbFpsr >> 8 & 255]; 17266: if ((XEiJ.fpuBox.epbFpcr & XEiJ.FPU_FPCR_BSUN) != 0) { //BSUN例外許可 17267: XEiJ.fpuBox.epbExceptionStatusWord = 0xe000 | M68kException.M6E_FP_BRANCH_SET_UNORDERED & 7; 17268: irpExceptionFormat0 (M68kException.M6E_FP_BRANCH_SET_UNORDERED << 2, XEiJ.regPC0); //pcは命令の先頭 17269: break fscc; 17270: } 17271: } 17272: int ea = XEiJ.regOC & 63; 17273: if (ea < XEiJ.EA_AR) { //FScc.B Dr 17274: if (!XEiJ.fpuBox.epbIsFullSpec ()) { 17275: irpExceptionFormat2 (M68kException.M6E_FP_UNIMPLEMENTED_INSTRUCTION << 2, XEiJ.regPC, 0); //pcは次の命令,アドレスは実効アドレス 17276: break fscc; 17277: } 17278: if (XEiJ.FPU_CCMAP_060[(w & 63) << 4 | XEiJ.fpuBox.epbFpsr >> 24 & 15]) { //セット 17279: XEiJ.mpuCycleCount++; 17280: XEiJ.regRn[ea] |= 0xff; 17281: } else { //クリア 17282: XEiJ.mpuCycleCount++; 17283: XEiJ.regRn[ea] &= ~0xff; 17284: } 17285: } else if (ea < XEiJ.EA_MM) { //FDBcc Dr,<label> 17286: if (!XEiJ.fpuBox.epbIsFullSpec ()) { 17287: XEiJ.regPC += 2; //オフセットを読み飛ばす 17288: irpExceptionFormat2 (M68kException.M6E_FP_UNIMPLEMENTED_INSTRUCTION << 2, XEiJ.regPC, 0); //pcは次の命令,アドレスは実効アドレス 17289: break fscc; 17290: } 17291: if (XEiJ.FPU_CCMAP_060[(w & 63) << 4 | XEiJ.fpuBox.epbFpsr >> 24 & 15]) { //条件が成立しているので通過 17292: XEiJ.mpuCycleCount += 2; 17293: XEiJ.regPC += 2; //オフセットを読み飛ばす 17294: } else { 17295: int rrr = XEiJ.regOC & 7; 17296: int t = XEiJ.regRn[rrr]; 17297: if ((short) t == 0) { //Drの下位16bitが0なので通過 17298: XEiJ.mpuCycleCount += 2; 17299: XEiJ.regRn[rrr] = t + 65535; 17300: XEiJ.regPC += 2; //オフセットを読み飛ばす 17301: } else { //Drの下位16bitが0でないのでジャンプ 17302: XEiJ.mpuCycleCount++; 17303: XEiJ.regRn[rrr] = t - 1; //下位16bitが0でないので上位16bitは変化しない 17304: irpSetPC (XEiJ.regPC + mmuReadWordSignExword (XEiJ.regPC, XEiJ.regSRS)); //pc==pc0+2 17305: } 17306: } 17307: } else if (ea < XEiJ.EA_PW) { //FScc.B <mem> 17308: int a = efaMltByte (ea); 17309: if (!XEiJ.fpuBox.epbIsFullSpec ()) { 17310: irpExceptionFormat2 (M68kException.M6E_FP_UNIMPLEMENTED_INSTRUCTION << 2, XEiJ.regPC, a); //pcは次の命令,アドレスは実効アドレス 17311: break fscc; 17312: } 17313: XEiJ.mpuCycleCount++; 17314: mmuWriteByteData (a, XEiJ.FPU_CCMAP_060[(w & 63) << 4 | XEiJ.fpuBox.epbFpsr >> 24 & 15] ? 0xff : 0x00, XEiJ.regSRS); 17315: } else if (ea <= XEiJ.EA_IM) { //FTRAPcc.W/FTRAPcc.L/FTRAPcc 17316: if (ea == 072) { //.W 17317: mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); 17318: } else if (ea == 073) { //.L 17319: mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS); 17320: } 17321: if (!XEiJ.fpuBox.epbIsFullSpec ()) { 17322: irpExceptionFormat2 (M68kException.M6E_FP_UNIMPLEMENTED_INSTRUCTION << 2, XEiJ.regPC, 0); //pcは次の命令,アドレスは実効アドレス 17323: break fscc; 17324: } 17325: if (!XEiJ.FPU_CCMAP_060[(w & 63) << 4 | XEiJ.fpuBox.epbFpsr >> 24 & 15]) { //通過 17326: XEiJ.mpuCycleCount += 2; 17327: } else { 17328: m60Address = XEiJ.regPC0; //アドレスは命令の先頭 17329: M68kException.m6eNumber = M68kException.M6E_TRAPV_INSTRUCTION; 17330: throw M68kException.m6eSignal; 17331: } 17332: } else { 17333: XEiJ.regPC = XEiJ.regPC0 + 2; //拡張ワードを読まなかったことにする 17334: irpFline (); 17335: break fscc; 17336: } 17337: } //fscc 17338: } //irpFscc 17339: 17340: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 17341: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 17342: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 17343: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 17344: //FNOP |A|--CC46|-|-----|-----| |1111_001_010_000_000-0000000000000000 [FBF.W (*)+2] 17345: //FBF.W <label> |-|--CC46|-|-----|-----| |1111_001_010_000_000-{offset} 17346: //FBEQ.W <label> |-|--CC46|-|-----|-----| |1111_001_010_000_001-{offset} 17347: //FBOGT.W <label> |-|--CC46|-|-----|-----| |1111_001_010_000_010-{offset} 17348: //FBOGE.W <label> |-|--CC46|-|-----|-----| |1111_001_010_000_011-{offset} 17349: //FBOLT.W <label> |-|--CC46|-|-----|-----| |1111_001_010_000_100-{offset} 17350: //FBOLE.W <label> |-|--CC46|-|-----|-----| |1111_001_010_000_101-{offset} 17351: //FBOGL.W <label> |-|--CC46|-|-----|-----| |1111_001_010_000_110-{offset} 17352: //FBOR.W <label> |-|--CC46|-|-----|-----| |1111_001_010_000_111-{offset} 17353: //FBUN.W <label> |-|--CC46|-|-----|-----| |1111_001_010_001_000-{offset} 17354: //FBUEQ.W <label> |-|--CC46|-|-----|-----| |1111_001_010_001_001-{offset} 17355: //FBUGT.W <label> |-|--CC46|-|-----|-----| |1111_001_010_001_010-{offset} 17356: //FBUGE.W <label> |-|--CC46|-|-----|-----| |1111_001_010_001_011-{offset} 17357: //FBULT.W <label> |-|--CC46|-|-----|-----| |1111_001_010_001_100-{offset} 17358: //FBULE.W <label> |-|--CC46|-|-----|-----| |1111_001_010_001_101-{offset} 17359: //FBNE.W <label> |-|--CC46|-|-----|-----| |1111_001_010_001_110-{offset} 17360: //FBT.W <label> |-|--CC46|-|-----|-----| |1111_001_010_001_111-{offset} 17361: //FBRA.W <label> |A|--CC46|-|-----|-----| |1111_001_010_001_111-{offset} [FBT.W <label>] 17362: //FBSF.W <label> |-|--CC46|-|-----|-----| |1111_001_010_010_000-{offset} 17363: //FBSEQ.W <label> |-|--CC46|-|-----|-----| |1111_001_010_010_001-{offset} 17364: //FBGT.W <label> |-|--CC46|-|-----|-----| |1111_001_010_010_010-{offset} 17365: //FBGE.W <label> |-|--CC46|-|-----|-----| |1111_001_010_010_011-{offset} 17366: //FBLT.W <label> |-|--CC46|-|-----|-----| |1111_001_010_010_100-{offset} 17367: //FBLE.W <label> |-|--CC46|-|-----|-----| |1111_001_010_010_101-{offset} 17368: //FBGL.W <label> |-|--CC46|-|-----|-----| |1111_001_010_010_110-{offset} 17369: //FBGLE.W <label> |-|--CC46|-|-----|-----| |1111_001_010_010_111-{offset} 17370: //FBNGLE.W <label> |-|--CC46|-|-----|-----| |1111_001_010_011_000-{offset} 17371: //FBNGL.W <label> |-|--CC46|-|-----|-----| |1111_001_010_011_001-{offset} 17372: //FBNLE.W <label> |-|--CC46|-|-----|-----| |1111_001_010_011_010-{offset} 17373: //FBNLT.W <label> |-|--CC46|-|-----|-----| |1111_001_010_011_011-{offset} 17374: //FBNGE.W <label> |-|--CC46|-|-----|-----| |1111_001_010_011_100-{offset} 17375: //FBNGT.W <label> |-|--CC46|-|-----|-----| |1111_001_010_011_101-{offset} 17376: //FBSNE.W <label> |-|--CC46|-|-----|-----| |1111_001_010_011_110-{offset} 17377: //FBST.W <label> |-|--CC46|-|-----|-----| |1111_001_010_011_111-{offset} 17378: public static void irpFbccWord () throws M68kException { 17379: fbcc: { 17380: //XEiJ.fpuBox.epbExceptionStatusWord = 0; 17381: if ((7 & XEiJ.currentOnchipFPU) == 0) { 17382: irpFline (); 17383: break fbcc; 17384: } 17385: XEiJ.fpuBox.epbFpiar = XEiJ.regPC0; //FPIARはFMOVEM/FMOVE FPcr/FSAVE/FRESTORE以外の命令で例外が発生しなくても更新される 17386: if ((XEiJ.regOC & 0b010000) != 0 && (XEiJ.fpuBox.epbFpsr & XEiJ.FPU_FPSR_NAN) != 0) { //IEEEノンアウェアテストでNANがセットされているとき 17387: XEiJ.fpuBox.epbFpsr |= XEiJ.FPU_FPSR_EXC_BSUN; //BSUNをセット 17388: XEiJ.fpuBox.epbFpsr |= XEiJ.FPU_FPSR_EXC_TO_AEXC[XEiJ.fpuBox.epbFpsr >> 8 & 255]; 17389: if ((XEiJ.fpuBox.epbFpcr & XEiJ.FPU_FPCR_BSUN) != 0) { //BSUN例外許可 17390: XEiJ.fpuBox.epbExceptionStatusWord = 0xe000 | M68kException.M6E_FP_BRANCH_SET_UNORDERED & 7; 17391: irpExceptionFormat0 (M68kException.M6E_FP_BRANCH_SET_UNORDERED << 2, XEiJ.regPC0); //pcは命令の先頭 17392: break fbcc; 17393: } 17394: } 17395: XEiJ.mpuCycleCount++; 17396: int t = XEiJ.regPC; //pc0+2 17397: XEiJ.regPC = t + 2; //pc0+4 17398: t += mmuReadWordSignExword (t, XEiJ.regSRS); //pc0+2+16bitディスプレースメント 17399: if ((t & 1) != 0) { //分岐先のアドレスが奇数 17400: //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ 17401: irpBccAddressError (t); 17402: } 17403: if (XEiJ.FPU_CCMAP_060[(XEiJ.regOC & 63) << 4 | XEiJ.fpuBox.epbFpsr >> 24 & 15]) { //分岐する 17404: irpSetPC (t); 17405: } 17406: } //fbcc 17407: } //irpFbccWord 17408: 17409: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 17410: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 17411: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 17412: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 17413: //FBF.L <label> |-|--CC46|-|-----|-----| |1111_001_011_000_000-{offset} 17414: //FBEQ.L <label> |-|--CC46|-|-----|-----| |1111_001_011_000_001-{offset} 17415: //FBOGT.L <label> |-|--CC46|-|-----|-----| |1111_001_011_000_010-{offset} 17416: //FBOGE.L <label> |-|--CC46|-|-----|-----| |1111_001_011_000_011-{offset} 17417: //FBOLT.L <label> |-|--CC46|-|-----|-----| |1111_001_011_000_100-{offset} 17418: //FBOLE.L <label> |-|--CC46|-|-----|-----| |1111_001_011_000_101-{offset} 17419: //FBOGL.L <label> |-|--CC46|-|-----|-----| |1111_001_011_000_110-{offset} 17420: //FBOR.L <label> |-|--CC46|-|-----|-----| |1111_001_011_000_111-{offset} 17421: //FBUN.L <label> |-|--CC46|-|-----|-----| |1111_001_011_001_000-{offset} 17422: //FBUEQ.L <label> |-|--CC46|-|-----|-----| |1111_001_011_001_001-{offset} 17423: //FBUGT.L <label> |-|--CC46|-|-----|-----| |1111_001_011_001_010-{offset} 17424: //FBUGE.L <label> |-|--CC46|-|-----|-----| |1111_001_011_001_011-{offset} 17425: //FBULT.L <label> |-|--CC46|-|-----|-----| |1111_001_011_001_100-{offset} 17426: //FBULE.L <label> |-|--CC46|-|-----|-----| |1111_001_011_001_101-{offset} 17427: //FBNE.L <label> |-|--CC46|-|-----|-----| |1111_001_011_001_110-{offset} 17428: //FBT.L <label> |-|--CC46|-|-----|-----| |1111_001_011_001_111-{offset} 17429: //FBRA.L <label> |A|--CC46|-|-----|-----| |1111_001_011_001_111-{offset} [FBT.L <label>] 17430: //FBSF.L <label> |-|--CC46|-|-----|-----| |1111_001_011_010_000-{offset} 17431: //FBSEQ.L <label> |-|--CC46|-|-----|-----| |1111_001_011_010_001-{offset} 17432: //FBGT.L <label> |-|--CC46|-|-----|-----| |1111_001_011_010_010-{offset} 17433: //FBGE.L <label> |-|--CC46|-|-----|-----| |1111_001_011_010_011-{offset} 17434: //FBLT.L <label> |-|--CC46|-|-----|-----| |1111_001_011_010_100-{offset} 17435: //FBLE.L <label> |-|--CC46|-|-----|-----| |1111_001_011_010_101-{offset} 17436: //FBGL.L <label> |-|--CC46|-|-----|-----| |1111_001_011_010_110-{offset} 17437: //FBGLE.L <label> |-|--CC46|-|-----|-----| |1111_001_011_010_111-{offset} 17438: //FBNGLE.L <label> |-|--CC46|-|-----|-----| |1111_001_011_011_000-{offset} 17439: //FBNGL.L <label> |-|--CC46|-|-----|-----| |1111_001_011_011_001-{offset} 17440: //FBNLE.L <label> |-|--CC46|-|-----|-----| |1111_001_011_011_010-{offset} 17441: //FBNLT.L <label> |-|--CC46|-|-----|-----| |1111_001_011_011_011-{offset} 17442: //FBNGE.L <label> |-|--CC46|-|-----|-----| |1111_001_011_011_100-{offset} 17443: //FBNGT.L <label> |-|--CC46|-|-----|-----| |1111_001_011_011_101-{offset} 17444: //FBSNE.L <label> |-|--CC46|-|-----|-----| |1111_001_011_011_110-{offset} 17445: //FBST.L <label> |-|--CC46|-|-----|-----| |1111_001_011_011_111-{offset} 17446: public static void irpFbccLong () throws M68kException { 17447: fbcc: { 17448: //XEiJ.fpuBox.epbExceptionStatusWord = 0; 17449: if ((7 & XEiJ.currentOnchipFPU) == 0) { 17450: irpFline (); 17451: break fbcc; 17452: } 17453: XEiJ.fpuBox.epbFpiar = XEiJ.regPC0; //FPIARはFMOVEM/FMOVE FPcr/FSAVE/FRESTORE以外の命令で例外が発生しなくても更新される 17454: if ((XEiJ.regOC & 0b010000) != 0 && (XEiJ.fpuBox.epbFpsr & XEiJ.FPU_FPSR_NAN) != 0) { //IEEEノンアウェアテストでNANがセットされているとき 17455: XEiJ.fpuBox.epbFpsr |= XEiJ.FPU_FPSR_EXC_BSUN; //BSUNをセット 17456: XEiJ.fpuBox.epbFpsr |= XEiJ.FPU_FPSR_EXC_TO_AEXC[XEiJ.fpuBox.epbFpsr >> 8 & 255]; 17457: if ((XEiJ.fpuBox.epbFpcr & XEiJ.FPU_FPCR_BSUN) != 0) { //BSUN例外許可 17458: XEiJ.fpuBox.epbExceptionStatusWord = 0xe000 | M68kException.M6E_FP_BRANCH_SET_UNORDERED & 7; 17459: irpExceptionFormat0 (M68kException.M6E_FP_BRANCH_SET_UNORDERED << 2, XEiJ.regPC0); //pcは命令の先頭 17460: break fbcc; 17461: } 17462: } 17463: XEiJ.mpuCycleCount++; 17464: int t = XEiJ.regPC; //pc0+2 17465: XEiJ.regPC = t + 4; //pc0+6 17466: t += mmuReadLongExword (t, XEiJ.regSRS); //pc0+2+32bitディスプレースメント 17467: if ((t & 1) != 0) { //分岐先のアドレスが奇数 17468: //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ 17469: irpBccAddressError (t); 17470: } 17471: if (XEiJ.FPU_CCMAP_060[(XEiJ.regOC & 63) << 4 | XEiJ.fpuBox.epbFpsr >> 24 & 15]) { //分岐する 17472: irpSetPC (t); 17473: } 17474: } //fbcc 17475: } //irpFbccLong 17476: 17477: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 17478: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 17479: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 17480: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 17481: //FSAVE <ea> |-|--CC46|P|-----|-----| M -WXZ |1111_001_100_mmm_rrr 17482: public static void irpFsave () throws M68kException { 17483: if ((7 & XEiJ.currentOnchipFPU) == 0) { 17484: irpFline (); 17485: return; 17486: } 17487: if (XEiJ.regSRS == 0) { //ユーザモードのとき 17488: M68kException.m6eNumber = M68kException.M6E_PRIVILEGE_VIOLATION; 17489: throw M68kException.m6eSignal; 17490: } 17491: //以下はスーパーバイザモード 17492: XEiJ.mpuCycleCount += 3; 17493: int ea = XEiJ.regOC & 63; 17494: int a; 17495: if (ea >> 3 == XEiJ.MMM_MN) { //-(Ar) 17496: int arr = XEiJ.regOC & 7 | 8; 17497: m60Incremented -= 12L << (arr << 3); 17498: a = m60Address = XEiJ.regRn[arr] -= 12; 17499: } else { //-(Ar)以外 17500: a = efaCltWord (ea); 17501: } 17502: if (XEiJ.fpuBox.epbExceptionStatusWord == 0) { //例外なし 17503: mmuWriteLongData (a, 0x00006000, 1); //アイドルフレーム 17504: mmuWriteQuadSecond (a + 4, 0L, 1); 17505: } else { //例外あり 17506: mmuWriteLongData (a, XEiJ.fpuBox.epbExceptionOperandExponent | XEiJ.fpuBox.epbExceptionStatusWord, 1); //例外フレーム 17507: mmuWriteQuadSecond (a + 4, XEiJ.fpuBox.epbExceptionOperandMantissa, 1); 17508: XEiJ.fpuBox.epbExceptionStatusWord = 0; 17509: } 17510: } //irpFsave 17511: 17512: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 17513: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 17514: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 17515: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 17516: //FRESTORE <ea> |-|--CC46|P|-----|-----| M+ WXZP |1111_001_101_mmm_rrr 17517: public static void irpFrestore () throws M68kException { 17518: if ((7 & XEiJ.currentOnchipFPU) == 0) { 17519: irpFline (); 17520: return; 17521: } 17522: if (XEiJ.regSRS == 0) { //ユーザモードのとき 17523: M68kException.m6eNumber = M68kException.M6E_PRIVILEGE_VIOLATION; 17524: throw M68kException.m6eSignal; 17525: } 17526: //以下はスーパーバイザモード 17527: XEiJ.mpuCycleCount += 6; 17528: int ea = XEiJ.regOC & 63; 17529: int a; 17530: if (ea >> 3 == XEiJ.MMM_MP) { //(Ar)+ 17531: int arr = XEiJ.regOC & 7 | 8; 17532: m60Incremented += 12L << (arr << 3); 17533: a = m60Address = (XEiJ.regRn[arr] += 12) - 12; 17534: } else { //(Ar)+以外 17535: a = efaCntWord (ea); 17536: } 17537: int i = mmuReadLongData (a, 1); 17538: long l = mmuReadQuadData (a + 4, 1); 17539: if ((i & 0xff00) == 0xe000) { //例外フレーム 17540: //例外ハンドラが0xe0xxを0x60xxに変更してFRESTOREする場合がある 17541: XEiJ.fpuBox.epbExceptionStatusWord = (char) i; 17542: XEiJ.fpuBox.epbExceptionOperandExponent = i & 0xffff0000; 17543: XEiJ.fpuBox.epbExceptionOperandMantissa = l; 17544: } else { 17545: XEiJ.fpuBox.epbExceptionStatusWord = 0; 17546: XEiJ.fpuBox.epbExceptionOperandExponent = 0; 17547: XEiJ.fpuBox.epbExceptionOperandMantissa = 0x0000000000000000L; 17548: } 17549: //FPSRのAEXCをクリアする 17550: XEiJ.fpuBox.epbFpsr = 0; 17551: //FPIARをクリアする 17552: XEiJ.fpuBox.epbFpiar = 0; 17553: } //irpFrestore 17554: 17555: //irpFPPreInstruction () 17556: // 浮動小数点命令実行前例外 floating-point pre-instruction exception 17557: // 優先順位はBSUN>SNAN>OPERR>OVFL>UNFL>DZ>INEX2/INEX1 17558: // 複数の例外が同時に発生したときは最上位の例外ハンドラだけが呼び出される 17559: // 浮動小数点例外ハンドラは自分よりも下位の浮動小数点例外が発生していないか確認しなければならない 17560: public static boolean irpFPPreInstruction () throws M68kException { 17561: int mask = XEiJ.fpuBox.epbFpcr & XEiJ.fpuBox.epbFpsr & 0x0000ff00; 17562: if (mask == 0) { 17563: return false; 17564: } 17565: int number = FP_OFFSET_TO_NUMBER[Integer.numberOfLeadingZeros (mask)]; 17566: XEiJ.fpuBox.epbExceptionStatusWord = 0xe000 | number & 7; 17567: irpExceptionFormat0 (number << 2, XEiJ.regPC0); //pcは命令の先頭 17568: return true; 17569: } //irpFPPreInstruction() 17570: 17571: //irpFPPostInstruction (a) 17572: // 浮動小数点命令実行後例外 floating-point post-instruction exception 17573: // 優先順位はBSUN>SNAN>OPERR>OVFL>UNFL>DZ>INEX2/INEX1 17574: // 複数の例外が同時に発生したときは最上位の例外ハンドラだけが呼び出される 17575: // 浮動小数点例外ハンドラは自分よりも下位の浮動小数点例外が発生していないか確認しなければならない 17576: public static boolean irpFPPostInstruction (int a) throws M68kException { 17577: int mask = XEiJ.fpuBox.epbFpcr & XEiJ.fpuBox.epbFpsr & 0x0000ff00; 17578: if (mask == 0) { 17579: return false; 17580: } 17581: int number = FP_OFFSET_TO_NUMBER[Integer.numberOfLeadingZeros (mask)]; 17582: XEiJ.fpuBox.epbExceptionStatusWord = 0xe000 | number & 7; 17583: irpExceptionFormat3 (number << 2, XEiJ.regPC, a); //pcは次の命令,アドレスはデスティネーションオペランド 17584: return true; 17585: } //irpFPPostInstruction(int) 17586: 17587: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 17588: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 17589: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 17590: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 17591: //CINVL NC,(Ar) |-|----46|P|-----|-----| |1111_010_000_001_rrr 17592: //CINVP NC,(Ar) |-|----46|P|-----|-----| |1111_010_000_010_rrr 17593: //CINVA NC |-|----46|P|-----|-----| |1111_010_000_011_000 17594: //CPUSHL NC,(Ar) |-|----46|P|-----|-----| |1111_010_000_101_rrr 17595: //CPUSHP NC,(Ar) |-|----46|P|-----|-----| |1111_010_000_110_rrr 17596: //CPUSHA NC |-|----46|P|-----|-----| |1111_010_000_111_000 17597: public static void irpCinvCpushNC () throws M68kException { 17598: if (XEiJ.regSRS == 0) { //ユーザモードのとき 17599: M68kException.m6eNumber = M68kException.M6E_PRIVILEGE_VIOLATION; 17600: throw M68kException.m6eSignal; 17601: } 17602: //以下はスーパーバイザモード 17603: if (CAT_ON) { 17604: int a = XEiJ.regRn[8 + (XEiJ.regOC & 0b000_111)]; 17605: switch (XEiJ.regOC & 0b111_000) { 17606: case 0b001_000: 17607: catInvL (0, a); 17608: break; 17609: case 0b010_000: 17610: catInvP (0, a); 17611: break; 17612: case 0b011_000: 17613: catInvA (0); 17614: break; 17615: case 0b101_000: 17616: catPushL (0, a); 17617: break; 17618: case 0b110_000: 17619: catPushP (0, a); 17620: break; 17621: case 0b111_000: 17622: catPushA (0); 17623: break; 17624: } 17625: } else { 17626: XEiJ.mpuCycleCount++; 17627: } 17628: } //irpCinvCpushNC 17629: 17630: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 17631: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 17632: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 17633: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 17634: //CINVL DC,(Ar) |-|----46|P|-----|-----| |1111_010_001_001_rrr 17635: //CINVP DC,(Ar) |-|----46|P|-----|-----| |1111_010_001_010_rrr 17636: //CINVA DC |-|----46|P|-----|-----| |1111_010_001_011_000 17637: //CPUSHL DC,(Ar) |-|----46|P|-----|-----| |1111_010_001_101_rrr 17638: //CPUSHP DC,(Ar) |-|----46|P|-----|-----| |1111_010_001_110_rrr 17639: //CPUSHA DC |-|----46|P|-----|-----| |1111_010_001_111_000 17640: public static void irpCinvCpushDC () throws M68kException { 17641: if (XEiJ.regSRS == 0) { //ユーザモードのとき 17642: M68kException.m6eNumber = M68kException.M6E_PRIVILEGE_VIOLATION; 17643: throw M68kException.m6eSignal; 17644: } 17645: //以下はスーパーバイザモード 17646: if (CAT_ON) { 17647: int a = XEiJ.regRn[8 + (XEiJ.regOC & 0b000_111)]; 17648: switch (XEiJ.regOC & 0b111_000) { 17649: case 0b001_000: 17650: catInvL (1, a); 17651: break; 17652: case 0b010_000: 17653: catInvP (1, a); 17654: break; 17655: case 0b011_000: 17656: catInvA (1); 17657: break; 17658: case 0b101_000: 17659: catPushL (1, a); 17660: break; 17661: case 0b110_000: 17662: catPushP (1, a); 17663: break; 17664: case 0b111_000: 17665: catPushA (1); 17666: break; 17667: } 17668: } else { 17669: XEiJ.mpuCycleCount++; 17670: } 17671: } //irpCinvCpushDC 17672: 17673: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 17674: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 17675: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 17676: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 17677: //CINVL IC,(Ar) |-|----46|P|-----|-----| |1111_010_010_001_rrr 17678: //CINVP IC,(Ar) |-|----46|P|-----|-----| |1111_010_010_010_rrr 17679: //CINVA IC |-|----46|P|-----|-----| |1111_010_010_011_000 17680: //CPUSHL IC,(Ar) |-|----46|P|-----|-----| |1111_010_010_101_rrr 17681: //CPUSHP IC,(Ar) |-|----46|P|-----|-----| |1111_010_010_110_rrr 17682: //CPUSHA IC |-|----46|P|-----|-----| |1111_010_010_111_000 17683: public static void irpCinvCpushIC () throws M68kException { 17684: if (XEiJ.regSRS == 0) { //ユーザモードのとき 17685: M68kException.m6eNumber = M68kException.M6E_PRIVILEGE_VIOLATION; 17686: throw M68kException.m6eSignal; 17687: } 17688: //以下はスーパーバイザモード 17689: if (CAT_ON) { 17690: int a = XEiJ.regRn[8 + (XEiJ.regOC & 0b000_111)]; 17691: switch (XEiJ.regOC & 0b111_000) { 17692: case 0b001_000: 17693: catInvL (2, a); 17694: break; 17695: case 0b010_000: 17696: catInvP (2, a); 17697: break; 17698: case 0b011_000: 17699: catInvA (2); 17700: break; 17701: case 0b101_000: 17702: catPushL (2, a); 17703: break; 17704: case 0b110_000: 17705: catPushP (2, a); 17706: break; 17707: case 0b111_000: 17708: catPushA (2); 17709: break; 17710: } 17711: } else { 17712: XEiJ.mpuCycleCount++; 17713: } 17714: } //irpCinvCpushIC 17715: 17716: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 17717: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 17718: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 17719: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 17720: //CINVL BC,(Ar) |-|----46|P|-----|-----| |1111_010_011_001_rrr 17721: //CINVP BC,(Ar) |-|----46|P|-----|-----| |1111_010_011_010_rrr 17722: //CINVA BC |-|----46|P|-----|-----| |1111_010_011_011_000 17723: //CPUSHL BC,(Ar) |-|----46|P|-----|-----| |1111_010_011_101_rrr 17724: //CPUSHP BC,(Ar) |-|----46|P|-----|-----| |1111_010_011_110_rrr 17725: //CPUSHA BC |-|----46|P|-----|-----| |1111_010_011_111_000 17726: public static void irpCinvCpushBC () throws M68kException { 17727: if (XEiJ.regSRS == 0) { //ユーザモードのとき 17728: M68kException.m6eNumber = M68kException.M6E_PRIVILEGE_VIOLATION; 17729: throw M68kException.m6eSignal; 17730: } 17731: //以下はスーパーバイザモード 17732: if (CAT_ON) { 17733: int a = XEiJ.regRn[8 + (XEiJ.regOC & 0b000_111)]; 17734: switch (XEiJ.regOC & 0b111_000) { 17735: case 0b001_000: 17736: catInvL (3, a); 17737: break; 17738: case 0b010_000: 17739: catInvP (3, a); 17740: break; 17741: case 0b011_000: 17742: catInvA (3); 17743: break; 17744: case 0b101_000: 17745: catPushL (3, a); 17746: break; 17747: case 0b110_000: 17748: catPushP (3, a); 17749: break; 17750: case 0b111_000: 17751: catPushA (3); 17752: break; 17753: } 17754: } else { 17755: XEiJ.mpuCycleCount++; 17756: } 17757: } //irpCinvCpushBC 17758: 17759: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 17760: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 17761: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 17762: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 17763: //PFLUSHN (Ar) |-|----46|P|-----|-----| |1111_010_100_000_rrr 17764: //PFLUSH (Ar) |-|----46|P|-----|-----| |1111_010_100_001_rrr 17765: //PFLUSHAN |-|----46|P|-----|-----| |1111_010_100_010_000 17766: //PFLUSHA |-|----46|P|-----|-----| |1111_010_100_011_000 17767: public static void irpPflush () throws M68kException { 17768: if (XEiJ.regSRS == 0) { //ユーザモードのとき 17769: M68kException.m6eNumber = M68kException.M6E_PRIVILEGE_VIOLATION; 17770: throw M68kException.m6eSignal; 17771: } 17772: //以下はスーパーバイザモード 17773: if (XEiJ.regOC <= 0b1111_010_100_000_111) { //PFLUSHN (An) 17774: XEiJ.mpuCycleCount += 18; 17775: mmuInvalidateNonGlobalCache (XEiJ.regRn[XEiJ.regOC - (0b1111_010_100_000_000 - 8)]); 17776: } else if (XEiJ.regOC <= 0b1111_010_100_001_111) { //PFLUSH (An) 17777: XEiJ.mpuCycleCount += 18; 17778: mmuInvalidateCache (XEiJ.regRn[XEiJ.regOC - (0b1111_010_100_001_000 - 8)]); 17779: } else if (XEiJ.regOC == 0b1111_010_100_010_000) { //PFLUSHAN 17780: XEiJ.mpuCycleCount += 33; 17781: mmuInvalidateAllNonGlobalCache (); 17782: } else if (XEiJ.regOC == 0b1111_010_100_011_000) { //PFLUSHA 17783: XEiJ.mpuCycleCount += 33; 17784: mmuInvalidateAllCache (); 17785: } else { 17786: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 17787: throw M68kException.m6eSignal; 17788: } 17789: } //irpPflush 17790: 17791: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 17792: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 17793: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 17794: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 17795: //PLPAW (Ar) |-|-----6|P|-----|-----| |1111_010_110_001_rrr 17796: public static void irpPlpaw () throws M68kException { 17797: if (XEiJ.regSRS == 0) { //ユーザモードのとき 17798: M68kException.m6eNumber = M68kException.M6E_PRIVILEGE_VIOLATION; 17799: throw M68kException.m6eSignal; 17800: } 17801: //以下はスーパーバイザモード 17802: XEiJ.mpuCycleCount += 15; 17803: int ann = XEiJ.regOC - (0b1111_010_110_001_000 - 8); //8+nnn 17804: XEiJ.regRn[ann] = mmuLoadPhysicalAddressWrite (XEiJ.regRn[ann]); 17805: } //irpPlpaw 17806: 17807: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 17808: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 17809: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 17810: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 17811: //PLPAR (Ar) |-|-----6|P|-----|-----| |1111_010_111_001_rrr 17812: // 17813: //PLPAR (Ar) 17814: // ReadだがSFCではなくDFCを使う 17815: public static void irpPlpar () throws M68kException { 17816: if (XEiJ.regSRS == 0) { //ユーザモードのとき 17817: M68kException.m6eNumber = M68kException.M6E_PRIVILEGE_VIOLATION; 17818: throw M68kException.m6eSignal; 17819: } 17820: //以下はスーパーバイザモード 17821: XEiJ.mpuCycleCount += 15; 17822: int ann = XEiJ.regOC - (0b1111_010_111_001_000 - 8); //8+nnn 17823: XEiJ.regRn[ann] = mmuLoadPhysicalAddressRead (XEiJ.regRn[ann]); 17824: } //irpPlpar 17825: 17826: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 17827: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 17828: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 17829: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 17830: //MOVE16 (Ar)+,xxx.L |-|----46|-|-----|-----| |1111_011_000_000_rrr-{address} 17831: //MOVE16 xxx.L,(Ar)+ |-|----46|-|-----|-----| |1111_011_000_001_rrr-{address} 17832: //MOVE16 (Ar),xxx.L |-|----46|-|-----|-----| |1111_011_000_010_rrr-{address} 17833: //MOVE16 xxx.L,(Ar) |-|----46|-|-----|-----| |1111_011_000_011_rrr-{address} 17834: //MOVE16 (Ar)+,(An)+ |-|----46|-|-----|-----| |1111_011_000_100_rrr-1nnn000000000000 17835: // 17836: //MOVE16 (Ar)+,xxx.L 17837: //MOVE16 xxx.L,(Ar)+ 17838: //MOVE16 (Ar),xxx.L 17839: //MOVE16 xxx.L,(Ar) 17840: //MOVE16 (Ar)+,(An)+ 17841: // アドレスの下位4bitは無視される 17842: // ポストインクリメントで16増えるとき下位4bitは変化しない 17843: // r==nのときMOVE16 (Ar)+,(Ar)+はMOVE16 (Ar),(Ar)+のような動作になる。データは動かずArは16だけ増える(M68060UM 1-21) 17844: public static void irpMove16 () throws M68kException { 17845: if (XEiJ.regOC <= 0b1111_011_000_011_111) { //どちらかがxxx.L 17846: if (CAT_ON) { 17847: catMove16Start (); 17848: } else { 17849: XEiJ.mpuCycleCount += 18; 17850: } 17851: int arr = XEiJ.regOC - (0b1111_011_000_000_000 - 8); //8+rrr 17852: int a = XEiJ.regRn[arr] & -16; 17853: int x = mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS) & -16; //pcls 17854: if ((XEiJ.regOC & 0b001_000) == 0) { //(Ar)→xxx.L 17855: long l = mmuReadQuadData (m60Address = a, XEiJ.regSRS); 17856: long m = mmuReadQuadSecond (a + 8, XEiJ.regSRS); 17857: mmuWriteQuadData (m60Address = x, l, XEiJ.regSRS); 17858: mmuWriteQuadSecond (x + 8, m, XEiJ.regSRS); 17859: } else { //xxx.L→(An) 17860: long l = mmuReadQuadData (m60Address = x, XEiJ.regSRS); 17861: long m = mmuReadQuadSecond (x + 8, XEiJ.regSRS); 17862: mmuWriteQuadData (m60Address = a, l, XEiJ.regSRS); 17863: mmuWriteQuadSecond (a + 8, m, XEiJ.regSRS); 17864: } 17865: if ((XEiJ.regOC & 0b010_000) == 0) { //(Ar)+ 17866: XEiJ.regRn[arr] += 16; //aはマスクされているのでa+16は不可 17867: } 17868: if (CAT_ON) { 17869: catMove16End (); 17870: } 17871: } else if (XEiJ.regOC <= 0b1111_011_000_100_111) { 17872: int w = mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); //pcwz 17873: if ((w & 0b1000111111111111) == 0b1000000000000000) { //MOVE16 (Ar)+,(As)+ 17874: if (CAT_ON) { 17875: catMove16Start (); 17876: } else { 17877: XEiJ.mpuCycleCount += 18; 17878: } 17879: int arr = XEiJ.regOC - (0b1111_011_000_100_000 - 8); //8+rrr 17880: int a = XEiJ.regRn[arr] & -16; 17881: int ass = w >> 12; //8+sss 17882: int x = XEiJ.regRn[ass] & -16; 17883: long l = mmuReadQuadData (m60Address = a, XEiJ.regSRS); 17884: long m = mmuReadQuadSecond (a + 8, XEiJ.regSRS); 17885: mmuWriteQuadData (m60Address = x, l, XEiJ.regSRS); 17886: mmuWriteQuadSecond (x + 8, m, XEiJ.regSRS); 17887: XEiJ.regRn[arr] += 16; //aはマスクされているのでa+16は不可 17888: if (arr != ass) { 17889: XEiJ.regRn[ass] += 16; //xはマスクされているのでx+16は不可 17890: } 17891: if (CAT_ON) { 17892: catMove16End (); 17893: } 17894: } else { 17895: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 17896: throw M68kException.m6eSignal; 17897: } 17898: } else { 17899: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 17900: throw M68kException.m6eSignal; 17901: } 17902: } //irpMove16 17903: 17904: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 17905: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 17906: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 17907: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 17908: //LPSTOP.W #<data> |-|-----6|P|-----|-----| |1111_100_000_000_000-0000000111000000-{data} 17909: public static void irpLpstop () throws M68kException { 17910: if (XEiJ.regSRS == 0) { //ユーザモードのとき 17911: M68kException.m6eNumber = M68kException.M6E_PRIVILEGE_VIOLATION; 17912: throw M68kException.m6eSignal; 17913: } 17914: //以下はスーパーバイザモード 17915: //!!! 非対応 17916: } //irpLpstop 17917: 17918: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 17919: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 17920: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 17921: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 17922: //FPACK <data> |A|012346|-|UUUUU|*****| |1111_111_0dd_ddd_ddd [FLINE #<data>] 17923: public static void irpFpack () throws M68kException { 17924: if (!MainMemory.mmrFEfuncActivated) { 17925: irpFline (); 17926: return; 17927: } 17928: StringBuilder sb; 17929: int a0; 17930: if (FEFunction.FPK_DEBUG_TRACE) { 17931: sb = new StringBuilder (); 17932: String name = Disassembler.DIS_FPACK_NAME[XEiJ.regOC & 255]; 17933: if (name.length () == 0) { 17934: XEiJ.fmtHex4 (sb.append ('$'), XEiJ.regOC); 17935: } else { 17936: sb.append (name); 17937: } 17938: sb.append ('\n'); 17939: XEiJ.fmtHex8 (XEiJ.fmtHex8 (XEiJ.fmtHex8 (XEiJ.fmtHex8 (sb.append (" D0="), XEiJ.regRn[0]).append (" D1="), XEiJ.regRn[1]).append (" D2="), XEiJ.regRn[2]).append (" D3="), XEiJ.regRn[3]); 17940: a0 = XEiJ.regRn[8]; 17941: MainMemory.mmrRstr (sb.append (" (A0)=\""), a0, MainMemory.mmrStrlen (a0, 20)).append ("\"\n"); 17942: } 17943: XEiJ.mpuCycleCount += FEFunction.FPK_CLOCK; //一律にFEFunction.FPK_CLOCKサイクルかかることにする 17944: switch (XEiJ.regOC & 255) { 17945: case 0x00: FEFunction.fpkLMUL (); break; 17946: case 0x01: FEFunction.fpkLDIV (); break; 17947: case 0x02: FEFunction.fpkLMOD (); break; 17948: //case 0x03: break; 17949: case 0x04: FEFunction.fpkUMUL (); break; 17950: case 0x05: FEFunction.fpkUDIV (); break; 17951: case 0x06: FEFunction.fpkUMOD (); break; 17952: //case 0x07: break; 17953: case 0x08: FEFunction.fpkIMUL (); break; 17954: case 0x09: FEFunction.fpkIDIV (); break; 17955: //case 0x0a: break; 17956: //case 0x0b: break; 17957: case 0x0c: FEFunction.fpkRANDOMIZE (); break; 17958: case 0x0d: FEFunction.fpkSRAND (); break; 17959: case 0x0e: FEFunction.fpkRAND (); break; 17960: //case 0x0f: break; 17961: case 0x10: fpkSTOL (); break; 17962: case 0x11: fpkLTOS (); break; 17963: case 0x12: fpkSTOH (); break; 17964: case 0x13: fpkHTOS (); break; 17965: case 0x14: fpkSTOO (); break; 17966: case 0x15: fpkOTOS (); break; 17967: case 0x16: fpkSTOB (); break; 17968: case 0x17: fpkBTOS (); break; 17969: case 0x18: fpkIUSING (); break; 17970: //case 0x19: break; 17971: case 0x1a: FEFunction.fpkLTOD (); break; 17972: case 0x1b: FEFunction.fpkDTOL (); break; 17973: case 0x1c: FEFunction.fpkLTOF (); break; 17974: case 0x1d: FEFunction.fpkFTOL (); break; 17975: case 0x1e: FEFunction.fpkFTOD (); break; 17976: case 0x1f: FEFunction.fpkDTOF (); break; 17977: case 0x20: fpkVAL (); break; 17978: case 0x21: fpkUSING (); break; 17979: case 0x22: fpkSTOD (); break; 17980: case 0x23: fpkDTOS (); break; 17981: case 0x24: fpkECVT (); break; 17982: case 0x25: fpkFCVT (); break; 17983: case 0x26: fpkGCVT (); break; 17984: //case 0x27: break; 17985: case 0x28: FEFunction.fpkDTST (); break; 17986: case 0x29: FEFunction.fpkDCMP (); break; 17987: case 0x2a: FEFunction.fpkDNEG (); break; 17988: case 0x2b: FEFunction.fpkDADD (); break; 17989: case 0x2c: FEFunction.fpkDSUB (); break; 17990: case 0x2d: FEFunction.fpkDMUL (); break; 17991: case 0x2e: FEFunction.fpkDDIV (); break; 17992: case 0x2f: FEFunction.fpkDMOD (); break; 17993: case 0x30: FEFunction.fpkDABS (); break; 17994: case 0x31: FEFunction.fpkDCEIL (); break; 17995: case 0x32: FEFunction.fpkDFIX (); break; 17996: case 0x33: FEFunction.fpkDFLOOR (); break; 17997: case 0x34: FEFunction.fpkDFRAC (); break; 17998: case 0x35: FEFunction.fpkDSGN (); break; 17999: case 0x36: FEFunction.fpkSIN (); break; 18000: case 0x37: FEFunction.fpkCOS (); break; 18001: case 0x38: FEFunction.fpkTAN (); break; 18002: case 0x39: FEFunction.fpkATAN (); break; 18003: case 0x3a: FEFunction.fpkLOG (); break; 18004: case 0x3b: FEFunction.fpkEXP (); break; 18005: case 0x3c: FEFunction.fpkSQR (); break; 18006: case 0x3d: FEFunction.fpkPI (); break; 18007: case 0x3e: FEFunction.fpkNPI (); break; 18008: case 0x3f: FEFunction.fpkPOWER (); break; 18009: case 0x40: FEFunction.fpkRND (); break; 18010: case 0x41: FEFunction.fpkSINH (); break; 18011: case 0x42: FEFunction.fpkCOSH (); break; 18012: case 0x43: FEFunction.fpkTANH (); break; 18013: case 0x44: FEFunction.fpkATANH (); break; 18014: case 0x45: FEFunction.fpkASIN (); break; 18015: case 0x46: FEFunction.fpkACOS (); break; 18016: case 0x47: FEFunction.fpkLOG10 (); break; 18017: case 0x48: FEFunction.fpkLOG2 (); break; 18018: case 0x49: FEFunction.fpkDFREXP (); break; 18019: case 0x4a: FEFunction.fpkDLDEXP (); break; 18020: case 0x4b: FEFunction.fpkDADDONE (); break; 18021: case 0x4c: FEFunction.fpkDSUBONE (); break; 18022: case 0x4d: FEFunction.fpkDDIVTWO (); break; 18023: case 0x4e: FEFunction.fpkDIEECNV (); break; 18024: case 0x4f: FEFunction.fpkIEEDCNV (); break; 18025: case 0x50: fpkFVAL (); break; 18026: case 0x51: FEFunction.fpkFUSING (); break; 18027: case 0x52: FEFunction.fpkSTOF (); break; 18028: case 0x53: FEFunction.fpkFTOS (); break; 18029: case 0x54: FEFunction.fpkFECVT (); break; 18030: case 0x55: FEFunction.fpkFFCVT (); break; 18031: case 0x56: FEFunction.fpkFGCVT (); break; 18032: //case 0x57: break; 18033: case 0x58: FEFunction.fpkFTST (); break; 18034: case 0x59: FEFunction.fpkFCMP (); break; 18035: case 0x5a: FEFunction.fpkFNEG (); break; 18036: case 0x5b: FEFunction.fpkFADD (); break; 18037: case 0x5c: FEFunction.fpkFSUB (); break; 18038: case 0x5d: FEFunction.fpkFMUL (); break; 18039: case 0x5e: FEFunction.fpkFDIV (); break; 18040: case 0x5f: FEFunction.fpkFMOD (); break; 18041: case 0x60: FEFunction.fpkFABS (); break; 18042: case 0x61: FEFunction.fpkFCEIL (); break; 18043: case 0x62: FEFunction.fpkFFIX (); break; 18044: case 0x63: FEFunction.fpkFFLOOR (); break; 18045: case 0x64: FEFunction.fpkFFRAC (); break; 18046: case 0x65: FEFunction.fpkFSGN (); break; 18047: case 0x66: FEFunction.fpkFSIN (); break; 18048: case 0x67: FEFunction.fpkFCOS (); break; 18049: case 0x68: FEFunction.fpkFTAN (); break; 18050: case 0x69: FEFunction.fpkFATAN (); break; 18051: case 0x6a: FEFunction.fpkFLOG (); break; 18052: case 0x6b: FEFunction.fpkFEXP (); break; 18053: case 0x6c: FEFunction.fpkFSQR (); break; 18054: case 0x6d: FEFunction.fpkFPI (); break; 18055: case 0x6e: FEFunction.fpkFNPI (); break; 18056: case 0x6f: FEFunction.fpkFPOWER (); break; 18057: case 0x70: FEFunction.fpkFRND (); break; 18058: case 0x71: FEFunction.fpkFSINH (); break; 18059: case 0x72: FEFunction.fpkFCOSH (); break; 18060: case 0x73: FEFunction.fpkFTANH (); break; 18061: case 0x74: FEFunction.fpkFATANH (); break; 18062: case 0x75: FEFunction.fpkFASIN (); break; 18063: case 0x76: FEFunction.fpkFACOS (); break; 18064: case 0x77: FEFunction.fpkFLOG10 (); break; 18065: case 0x78: FEFunction.fpkFLOG2 (); break; 18066: case 0x79: FEFunction.fpkFFREXP (); break; 18067: case 0x7a: FEFunction.fpkFLDEXP (); break; 18068: case 0x7b: FEFunction.fpkFADDONE (); break; 18069: case 0x7c: FEFunction.fpkFSUBONE (); break; 18070: case 0x7d: FEFunction.fpkFDIVTWO (); break; 18071: case 0x7e: FEFunction.fpkFIEECNV (); break; 18072: case 0x7f: FEFunction.fpkIEEFCNV (); break; 18073: //case 0x80: break; 18074: //case 0x81: break; 18075: //case 0x82: break; 18076: //case 0x83: break; 18077: //case 0x84: break; 18078: //case 0x85: break; 18079: //case 0x86: break; 18080: //case 0x87: break; 18081: //case 0x88: break; 18082: //case 0x89: break; 18083: //case 0x8a: break; 18084: //case 0x8b: break; 18085: //case 0x8c: break; 18086: //case 0x8d: break; 18087: //case 0x8e: break; 18088: //case 0x8f: break; 18089: //case 0x90: break; 18090: //case 0x91: break; 18091: //case 0x92: break; 18092: //case 0x93: break; 18093: //case 0x94: break; 18094: //case 0x95: break; 18095: //case 0x96: break; 18096: //case 0x97: break; 18097: //case 0x98: break; 18098: //case 0x99: break; 18099: //case 0x9a: break; 18100: //case 0x9b: break; 18101: //case 0x9c: break; 18102: //case 0x9d: break; 18103: //case 0x9e: break; 18104: //case 0x9f: break; 18105: //case 0xa0: break; 18106: //case 0xa1: break; 18107: //case 0xa2: break; 18108: //case 0xa3: break; 18109: //case 0xa4: break; 18110: //case 0xa5: break; 18111: //case 0xa6: break; 18112: //case 0xa7: break; 18113: //case 0xa8: break; 18114: //case 0xa9: break; 18115: //case 0xaa: break; 18116: //case 0xab: break; 18117: //case 0xac: break; 18118: //case 0xad: break; 18119: //case 0xae: break; 18120: //case 0xaf: break; 18121: //case 0xb0: break; 18122: //case 0xb1: break; 18123: //case 0xb2: break; 18124: //case 0xb3: break; 18125: //case 0xb4: break; 18126: //case 0xb5: break; 18127: //case 0xb6: break; 18128: //case 0xb7: break; 18129: //case 0xb8: break; 18130: //case 0xb9: break; 18131: //case 0xba: break; 18132: //case 0xbb: break; 18133: //case 0xbc: break; 18134: //case 0xbd: break; 18135: //case 0xbe: break; 18136: //case 0xbf: break; 18137: //case 0xc0: break; 18138: //case 0xc1: break; 18139: //case 0xc2: break; 18140: //case 0xc3: break; 18141: //case 0xc4: break; 18142: //case 0xc5: break; 18143: //case 0xc6: break; 18144: //case 0xc7: break; 18145: //case 0xc8: break; 18146: //case 0xc9: break; 18147: //case 0xca: break; 18148: //case 0xcb: break; 18149: //case 0xcc: break; 18150: //case 0xcd: break; 18151: //case 0xce: break; 18152: //case 0xcf: break; 18153: //case 0xd0: break; 18154: //case 0xd1: break; 18155: //case 0xd2: break; 18156: //case 0xd3: break; 18157: //case 0xd4: break; 18158: //case 0xd5: break; 18159: //case 0xd6: break; 18160: //case 0xd7: break; 18161: //case 0xd8: break; 18162: //case 0xd9: break; 18163: //case 0xda: break; 18164: //case 0xdb: break; 18165: //case 0xdc: break; 18166: //case 0xdd: break; 18167: //case 0xde: break; 18168: //case 0xdf: break; 18169: case 0xe0: fpkCLMUL (); break; 18170: case 0xe1: fpkCLDIV (); break; 18171: case 0xe2: fpkCLMOD (); break; 18172: case 0xe3: fpkCUMUL (); break; 18173: case 0xe4: fpkCUDIV (); break; 18174: case 0xe5: fpkCUMOD (); break; 18175: case 0xe6: fpkCLTOD (); break; 18176: case 0xe7: fpkCDTOL (); break; 18177: case 0xe8: fpkCLTOF (); break; 18178: case 0xe9: fpkCFTOL (); break; 18179: case 0xea: fpkCFTOD (); break; 18180: case 0xeb: fpkCDTOF (); break; 18181: case 0xec: fpkCDCMP (); break; 18182: case 0xed: fpkCDADD (); break; 18183: case 0xee: fpkCDSUB (); break; 18184: case 0xef: fpkCDMUL (); break; 18185: case 0xf0: fpkCDDIV (); break; 18186: case 0xf1: fpkCDMOD (); break; 18187: case 0xf2: fpkCFCMP (); break; 18188: case 0xf3: fpkCFADD (); break; 18189: case 0xf4: fpkCFSUB (); break; 18190: case 0xf5: fpkCFMUL (); break; 18191: case 0xf6: fpkCFDIV (); break; 18192: case 0xf7: fpkCFMOD (); break; 18193: case 0xf8: fpkCDTST (); break; 18194: case 0xf9: fpkCFTST (); break; 18195: case 0xfa: fpkCDINC (); break; 18196: case 0xfb: fpkCFINC (); break; 18197: case 0xfc: fpkCDDEC (); break; 18198: case 0xfd: fpkCFDEC (); break; 18199: case 0xfe: FEFunction.fpkFEVARG (); break; 18200: //case 0xff: FEFunction.fpkFEVECS (); break; //FLOATn.Xに処理させる 18201: default: 18202: XEiJ.mpuCycleCount -= FEFunction.FPK_CLOCK; //戻す 18203: irpFline (); 18204: } 18205: if (FEFunction.FPK_DEBUG_TRACE) { 18206: int i = sb.length (); 18207: XEiJ.fmtHex8 (XEiJ.fmtHex8 (XEiJ.fmtHex8 (XEiJ.fmtHex8 (sb.append (" D0="), XEiJ.regRn[0]).append (" D1="), XEiJ.regRn[1]).append (" D2="), XEiJ.regRn[2]).append (" D3="), XEiJ.regRn[3]); 18208: int l = MainMemory.mmrStrlen (a0, 20); 18209: sb.append (" (A0)=\""); 18210: i = sb.length () - i; 18211: MainMemory.mmrRstr (sb, a0, l).append ("\"\n"); 18212: if (a0 <= XEiJ.regRn[8] && XEiJ.regRn[8] <= a0 + l) { 18213: for (i += sb.length () + XEiJ.regRn[8] - a0; sb.length () < i; ) { 18214: sb.append (' '); 18215: } 18216: sb.append ('^'); 18217: } 18218: System.out.println (sb.toString ()); 18219: } 18220: } //irpFpack 18221: 18222: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 18223: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 18224: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 18225: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 18226: //DOS <data> |A|012346|-|UUUUU|UUUUU| |1111_111_1dd_ddd_ddd [FLINE #<data>] 18227: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 18228: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 18229: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 18230: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 18231: //FLINE #<data> |-|012346|-|UUUUU|UUUUU| |1111_ddd_ddd_ddd_ddd (line 1111 emulator) 18232: public static void irpFline () throws M68kException { 18233: irpExceptionFormat0 (M68kException.M6E_LINE_1111_EMULATOR << 2, XEiJ.regPC0); //pcは命令の先頭 18234: } //irpFline 18235: 18236: //irpIllegal () 18237: // オペコードの上位10bitで分類されなかった未実装命令 18238: // 命令実行回数をカウントするために分けてある 18239: // 0x4afcのILLEGAL命令はTASに分類されて未実装実効アドレスで処理されるのでここには来ない 18240: public static void irpIllegal () throws M68kException { 18241: if (true) { 18242: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 18243: throw M68kException.m6eSignal; 18244: } 18245: } //irpIllegal 18246: 18247: //z = irpAbcd (x, y) 18248: // ABCD 18249: public static int irpAbcd (int x, int y) { 18250: int c = XEiJ.regCCR >> 4; 18251: int t = (x & 0xff) + (y & 0xff) + c; //仮の結果 18252: int z = t; //結果 18253: if (0x0a <= (x & 0x0f) + (y & 0x0f) + c) { //ハーフキャリー 18254: z += 0x10 - 0x0a; 18255: } 18256: //XとCはキャリーがあるときセット、さもなくばクリア 18257: if (0xa0 <= z) { //キャリー 18258: z += 0x100 - 0xa0; 18259: XEiJ.regCCR |= XEiJ.REG_CCR_X | XEiJ.REG_CCR_C; 18260: } else { 18261: XEiJ.regCCR &= ~(XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); 18262: } 18263: //Zは結果が0でないときクリア、さもなくば変化しない 18264: z &= 0xff; 18265: if (z != 0x00) { 18266: XEiJ.regCCR &= ~XEiJ.REG_CCR_Z; 18267: } 18268: if (false) { 18269: //000/030のときNは結果の最上位ビット 18270: if ((z & 0x80) != 0) { 18271: XEiJ.regCCR |= XEiJ.REG_CCR_N; 18272: } else { 18273: XEiJ.regCCR &= ~XEiJ.REG_CCR_N; 18274: } 18275: //000のときVは補正値の加算でオーバーフローしたときセット、さもなくばクリア 18276: int a = z - t; //補正値 18277: if ((((t ^ z) & (a ^ z)) & 0x80) != 0) { 18278: XEiJ.regCCR |= XEiJ.REG_CCR_V; 18279: } else { 18280: XEiJ.regCCR &= ~XEiJ.REG_CCR_V; 18281: } 18282: } else if (false) { 18283: //000/030のときNは結果の最上位ビット 18284: if ((z & 0x80) != 0) { 18285: XEiJ.regCCR |= XEiJ.REG_CCR_N; 18286: } else { 18287: XEiJ.regCCR &= ~XEiJ.REG_CCR_N; 18288: } 18289: //030のときVはクリア 18290: XEiJ.regCCR &= ~XEiJ.REG_CCR_V; 18291: } else { 18292: //060のときNとVは変化しない 18293: } 18294: return z; 18295: } //irpAbcd 18296: 18297: //z = irpSbcd (x, y) 18298: // SBCD 18299: public static int irpSbcd (int x, int y) { 18300: int b = XEiJ.regCCR >> 4; 18301: int t = (x & 0xff) - (y & 0xff) - b; //仮の結果 18302: int z = t; //結果 18303: if ((x & 0x0f) - (y & 0x0f) - b < 0) { //ハーフボロー 18304: z -= 0x10 - 0x0a; 18305: } 18306: //XとCはボローがあるときセット、さもなくばクリア 18307: if (z < 0) { //ボロー 18308: if (t < 0) { 18309: z -= 0x100 - 0xa0; 18310: } 18311: XEiJ.regCCR |= XEiJ.REG_CCR_X | XEiJ.REG_CCR_C; 18312: } else { 18313: XEiJ.regCCR &= ~(XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); 18314: } 18315: //Zは結果が0でないときクリア、さもなくば変化しない 18316: z &= 0xff; 18317: if (z != 0x00) { 18318: XEiJ.regCCR &= ~XEiJ.REG_CCR_Z; 18319: } 18320: if (false) { 18321: //000/030のときNは結果の最上位ビット 18322: if ((z & 0x80) != 0) { 18323: XEiJ.regCCR |= XEiJ.REG_CCR_N; 18324: } else { 18325: XEiJ.regCCR &= ~XEiJ.REG_CCR_N; 18326: } 18327: //000のときVは補正値の加算でオーバーフローしたときセット、さもなくばクリア 18328: int a = z - t; //補正値 18329: if ((((t ^ z) & (a ^ z)) & 0x80) != 0) { 18330: XEiJ.regCCR |= XEiJ.REG_CCR_V; 18331: } else { 18332: XEiJ.regCCR &= ~XEiJ.REG_CCR_V; 18333: } 18334: } else if (false) { 18335: //000/030のときNは結果の最上位ビット 18336: if ((z & 0x80) != 0) { 18337: XEiJ.regCCR |= XEiJ.REG_CCR_N; 18338: } else { 18339: XEiJ.regCCR &= ~XEiJ.REG_CCR_N; 18340: } 18341: //030のときVはクリア 18342: XEiJ.regCCR &= ~XEiJ.REG_CCR_V; 18343: } else { 18344: //060のときNとVは変化しない 18345: } 18346: return z; 18347: } //irpSbcd 18348: 18349: 18350: 18351: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 18352: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 18353: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 18354: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 18355: //HFSBOOT |-|012346|-|-----|-----| |0100_111_000_000_000 18356: //HFSINST |-|012346|-|-----|-----| |0100_111_000_000_001 18357: //HFSSTR |-|012346|-|-----|-----| |0100_111_000_000_010 18358: //HFSINT |-|012346|-|-----|-----| |0100_111_000_000_011 18359: //EMXNOP |-|012346|-|-----|-----| |0100_111_000_000_100 18360: // エミュレータ拡張命令 18361: public static void irpEmx () throws M68kException { 18362: switch (XEiJ.regOC & 63) { 18363: case XEiJ.EMX_OPCODE_HFSBOOT & 63: 18364: XEiJ.mpuCycleCount += 19; 18365: if (HFS.hfsIPLBoot ()) { 18366: //JMP $6800.W 18367: irpSetPC (0x00006800); 18368: } 18369: break; 18370: case XEiJ.EMX_OPCODE_HFSINST & 63: 18371: XEiJ.mpuCycleCount += 19; 18372: HFS.hfsInstall (); 18373: break; 18374: case XEiJ.EMX_OPCODE_HFSSTR & 63: 18375: XEiJ.mpuCycleCount += 19; 18376: HFS.hfsStrategy (); 18377: break; 18378: case XEiJ.EMX_OPCODE_HFSINT & 63: 18379: XEiJ.mpuCycleCount += 19; 18380: //XEiJ.mpuClockTime += TMR_FREQ / 100000L; //0.01ms 18381: if (HFS.hfsInterrupt ()) { 18382: //WAIT 18383: XEiJ.mpuTraceFlag = 0; //トレース例外を発生させない 18384: XEiJ.regPC = XEiJ.regPC0; //ループ 18385: XEiJ.mpuClockTime += XEiJ.TMR_FREQ * 4 / 1000000; //4μs。10MHzのとき40clk 18386: XEiJ.mpuLastNano += 4000L; 18387: } 18388: break; 18389: case XEiJ.EMX_OPCODE_EMXNOP & 63: 18390: XEiJ.emxNop (); 18391: break; 18392: case XEiJ.EMX_OPCODE_EMXWAIT & 63: 18393: WaitInstruction.execute (); //待機命令を実行する 18394: break; 18395: default: 18396: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 18397: throw M68kException.m6eSignal; 18398: } 18399: } //irpEmx 18400: 18401: 18402: 18403: //irpSetPC (a) 18404: // pcへデータを書き込む 18405: // 奇数のときはアドレスエラーが発生する 18406: public static void irpSetPC (int a) throws M68kException { 18407: if (XEiJ.TEST_BIT_0_SHIFT ? a << 31 - 0 < 0 : (a & 1) != 0) { 18408: M68kException.m6eNumber = M68kException.M6E_ADDRESS_ERROR; 18409: m60Address = a & -2; //アドレスを偶数にする 18410: M68kException.m6eDirection = XEiJ.MPU_WR_READ; 18411: M68kException.m6eSize = XEiJ.MPU_SS_LONG; 18412: throw M68kException.m6eSignal; 18413: } 18414: if (BranchLog.BLG_ON) { 18415: BranchLog.blgJump (a); //分岐ログに分岐レコードを追加する 18416: } else { 18417: XEiJ.regPC = a; 18418: } 18419: } //irpSetPC 18420: 18421: //irpSetSR (newSr) 18422: // srへデータを書き込む 18423: // ori to sr/andi to sr/eori to sr/move to sr/stop/rteで使用される 18424: // スーパーバイザモードになっていることを確認してから呼び出すこと 18425: // rteではr[15]が指すアドレスからsrとpcを取り出してr[15]を更新してから呼び出すこと 18426: // スーパーバイザモード→ユーザモードのときは移行のための処理を行う 18427: // 新しい割り込みマスクレベルよりも高い割り込み処理の終了をデバイスに通知する 18428: public static void irpSetSR (int newSr) { 18429: XEiJ.regSRT1 = XEiJ.REG_SR_T1 & newSr; 18430: XEiJ.regSRM = XEiJ.REG_SR_M & newSr; 18431: if ((XEiJ.regSRS = XEiJ.REG_SR_S & newSr) == 0) { //スーパーバイザモード→ユーザモード 18432: XEiJ.mpuISP = XEiJ.regRn[15]; //SSPを保存 18433: XEiJ.regRn[15] = XEiJ.mpuUSP; //USPを復元 18434: if (DataBreakPoint.DBP_ON) { 18435: DataBreakPoint.dbpMemoryMap = DataBreakPoint.dbpUserMap; //ユーザメモリマップに切り替える 18436: } else { 18437: XEiJ.busMemoryMap = XEiJ.busUserMap; //ユーザメモリマップに切り替える 18438: } 18439: if (InstructionBreakPoint.IBP_ON) { 18440: InstructionBreakPoint.ibpOp1MemoryMap = InstructionBreakPoint.ibpOp1UserMap; 18441: } 18442: } 18443: int t = (XEiJ.mpuIMR = 0x7f >> ((XEiJ.regSRI = XEiJ.REG_SR_I & newSr) >> 8)) & XEiJ.mpuISR; //XEiJ.mpuISRで1→0とするビット 18444: if (t != 0) { //終了する割り込みがあるとき 18445: XEiJ.mpuISR ^= t; 18446: //デバイスに割り込み処理の終了を通知する 18447: if (t == XEiJ.MPU_MFP_INTERRUPT_MASK) { //MFPのみ 18448: MC68901.mfpDone (); 18449: } else if (t == XEiJ.MPU_DMA_INTERRUPT_MASK) { //DMAのみ 18450: HD63450.dmaDone (); 18451: } else if (t == XEiJ.MPU_SCC_INTERRUPT_MASK) { //SCCのみ 18452: Z8530.sccDone (); 18453: } else if (t == XEiJ.MPU_IOI_INTERRUPT_MASK) { //IOIのみ 18454: IOInterrupt.ioiDone (); 18455: } else if (t == XEiJ.MPU_EB2_INTERRUPT_MASK) { //EB2のみ 18456: XEiJ.eb2Done (); 18457: } else { //SYSのみまたは複数 18458: if (XEiJ.TEST_BIT_1_SHIFT ? t << 24 + XEiJ.MPU_MFP_INTERRUPT_LEVEL < 0 : (t & XEiJ.MPU_MFP_INTERRUPT_MASK) != 0) { 18459: MC68901.mfpDone (); 18460: } 18461: if (t << 24 + XEiJ.MPU_DMA_INTERRUPT_LEVEL < 0) { //(t & XEiJ.MPU_DMA_INTERRUPT_MASK) != 0 18462: HD63450.dmaDone (); 18463: } 18464: if (XEiJ.TEST_BIT_2_SHIFT ? t << 24 + XEiJ.MPU_SCC_INTERRUPT_LEVEL < 0 : (t & XEiJ.MPU_SCC_INTERRUPT_MASK) != 0) { 18465: Z8530.sccDone (); 18466: } 18467: if (t << 24 + XEiJ.MPU_IOI_INTERRUPT_LEVEL < 0) { //(t & XEiJ.MPU_IOI_INTERRUPT_MASK) != 0 18468: IOInterrupt.ioiDone (); 18469: } 18470: if (t << 24 + XEiJ.MPU_EB2_INTERRUPT_LEVEL < 0) { //(t & XEiJ.MPU_EB2_INTERRUPT_MASK) != 0 18471: XEiJ.eb2Done (); 18472: } 18473: if (XEiJ.TEST_BIT_0_SHIFT ? t << 24 + XEiJ.MPU_SYS_INTERRUPT_LEVEL < 0 : (t & XEiJ.MPU_SYS_INTERRUPT_MASK) != 0) { 18474: XEiJ.sysDone (); 18475: } 18476: } 18477: } 18478: XEiJ.mpuIMR |= ~XEiJ.mpuISR & XEiJ.MPU_SYS_INTERRUPT_MASK; //割り込みマスクレベルが7のときレベル7割り込みの処理中でなければレベル7割り込みを許可する 18479: XEiJ.regCCR = XEiJ.REG_CCR_MASK & newSr; 18480: } //irpSetSR 18481: 18482: //irpInterrupt (offset, level) 18483: // 割り込み処理を開始する 18484: public static void irpInterrupt (int offset, int level) throws M68kException { 18485: if (XEiJ.regOC == 0b0100_111_001_110_010) { //最後に実行した命令はSTOP命令 18486: XEiJ.regPC = XEiJ.regPC0 + 4; //次の命令に進む 18487: } 18488: XEiJ.mpuClockTime += XEiJ.mpuModifiedUnit * 19; 18489: int save_sr = XEiJ.regSRT1 | XEiJ.regSRS | XEiJ.regSRM | XEiJ.regSRI | XEiJ.regCCR; 18490: XEiJ.regSRI = level << 8; //割り込みマスクを要求されたレベルに変更する 18491: XEiJ.mpuIMR = 0x7f >> level; 18492: XEiJ.mpuISR |= 0x80 >> level; 18493: XEiJ.regSRT1 = XEiJ.mpuTraceFlag = 0; //srのTビットを消す 18494: int sp; 18495: if (XEiJ.regSRS != 0) { //スーパーバイザモード 18496: sp = XEiJ.regRn[15]; 18497: } else { //ユーザモード 18498: XEiJ.regSRS = XEiJ.REG_SR_S; //スーパーバイザモードへ移行する 18499: XEiJ.mpuUSP = XEiJ.regRn[15]; //USPを保存 18500: sp = XEiJ.mpuISP; //SSPを復元 18501: if (DataBreakPoint.DBP_ON) { 18502: DataBreakPoint.dbpMemoryMap = DataBreakPoint.dbpSuperMap; //スーパーバイザメモリマップに切り替える 18503: } else { 18504: XEiJ.busMemoryMap = XEiJ.busSuperMap; //スーパーバイザメモリマップに切り替える 18505: } 18506: if (InstructionBreakPoint.IBP_ON) { 18507: InstructionBreakPoint.ibpOp1MemoryMap = InstructionBreakPoint.ibpOp1SuperMap; 18508: } 18509: } 18510: //以下はスーパーバイザモード 18511: XEiJ.regRn[15] = sp -= 8; 18512: mmuWriteWordData (sp + 6, offset, 1); //7-6:フォーマットとベクタオフセット 18513: mmuWriteLongData (sp + 2, XEiJ.regPC, 1); //5-2:プログラムカウンタ 18514: mmuWriteWordData (sp, save_sr, 1); //1-0:ステータスレジスタ 18515: //if (XEiJ.regSRM != 0) { //マスタモードのとき 18516: XEiJ.regSRM = 0; //割り込みモードへ移行する 18517: //} 18518: if (BranchLog.BLG_ON) { 18519: XEiJ.regPC0 = XEiJ.regPC; //rteによる割り込み終了と同時に次の割り込みを受け付けたとき間でpc0を更新しないと2番目の分岐レコードの終了アドレスが1番目と同じになっておかしな分岐レコードができてしまう 18520: } 18521: irpSetPC (mmuReadLongFour (XEiJ.mpuVBR + offset, 1)); //例外ベクタを取り出してジャンプする 18522: } //irpInterrupt 18523: 18524: //irpExceptionFormat0 (offset, save_pc) 18525: // 例外処理を開始する 18526: // スタックへのプッシュ、ベクタの取り出し、ジャンプのいずれかでバスエラーまたはアドレスエラーが発生する場合がある 18527: public static void irpExceptionFormat0 (int offset, int save_pc) throws M68kException { 18528: XEiJ.mpuCycleCount += 19; 18529: int save_sr = XEiJ.regSRT1 | XEiJ.regSRS | XEiJ.regSRM | XEiJ.regSRI | XEiJ.regCCR; 18530: XEiJ.regSRT1 = XEiJ.mpuTraceFlag = 0; //srのTビットを消す 18531: int sp; 18532: if (XEiJ.regSRS != 0) { //スーパーバイザモード 18533: sp = XEiJ.regRn[15]; 18534: } else { //ユーザモード 18535: XEiJ.regSRS = XEiJ.REG_SR_S; //スーパーバイザモードへ移行する 18536: XEiJ.mpuUSP = XEiJ.regRn[15]; //USPを保存 18537: sp = XEiJ.mpuISP; //SSPを復元 18538: if (DataBreakPoint.DBP_ON) { 18539: DataBreakPoint.dbpMemoryMap = DataBreakPoint.dbpSuperMap; //スーパーバイザメモリマップに切り替える 18540: } else { 18541: XEiJ.busMemoryMap = XEiJ.busSuperMap; //スーパーバイザメモリマップに切り替える 18542: } 18543: if (InstructionBreakPoint.IBP_ON) { 18544: InstructionBreakPoint.ibpOp1MemoryMap = InstructionBreakPoint.ibpOp1SuperMap; 18545: } 18546: } 18547: //以下はスーパーバイザモード 18548: XEiJ.regRn[15] = sp -= 8; 18549: mmuWriteWordData (sp + 6, offset, 1); //7-6:フォーマットとベクタオフセット 18550: mmuWriteLongData (sp + 2, save_pc, 1); //5-2:プログラムカウンタ 18551: mmuWriteWordData (sp, save_sr, 1); //1-0:ステータスレジスタ 18552: irpSetPC (mmuReadLongFour (XEiJ.mpuVBR + offset, 1)); //例外ベクタを取り出してジャンプする 18553: } //irpExceptionFormat0 18554: 18555: //irpExceptionFormat2 (offset, save_pc, address) 18556: // 例外処理を開始する 18557: // スタックへのプッシュ、ベクタの取り出し、ジャンプのいずれかでバスエラーまたはアドレスエラーが発生する場合がある 18558: public static void irpExceptionFormat2 (int offset, int save_pc, int address) throws M68kException { 18559: XEiJ.mpuCycleCount += 19; 18560: int save_sr = XEiJ.regSRT1 | XEiJ.regSRS | XEiJ.regSRM | XEiJ.regSRI | XEiJ.regCCR; 18561: XEiJ.regSRT1 = XEiJ.mpuTraceFlag = 0; //srのTビットを消す 18562: int sp; 18563: if (XEiJ.regSRS != 0) { //スーパーバイザモード 18564: sp = XEiJ.regRn[15]; 18565: } else { //ユーザモード 18566: XEiJ.regSRS = XEiJ.REG_SR_S; //スーパーバイザモードへ移行する 18567: XEiJ.mpuUSP = XEiJ.regRn[15]; //USPを保存 18568: sp = XEiJ.mpuISP; //SSPを復元 18569: if (DataBreakPoint.DBP_ON) { 18570: DataBreakPoint.dbpMemoryMap = DataBreakPoint.dbpSuperMap; //スーパーバイザメモリマップに切り替える 18571: } else { 18572: XEiJ.busMemoryMap = XEiJ.busSuperMap; //スーパーバイザメモリマップに切り替える 18573: } 18574: if (InstructionBreakPoint.IBP_ON) { 18575: InstructionBreakPoint.ibpOp1MemoryMap = InstructionBreakPoint.ibpOp1SuperMap; 18576: } 18577: } 18578: //以下はスーパーバイザモード 18579: XEiJ.regRn[15] = sp -= 12; 18580: mmuWriteLongData (sp + 8, address, 1); //11-8:アドレス 18581: mmuWriteWordData (sp + 6, 0x2000 | offset, 1); //7-6:フォーマットとベクタオフセット 18582: mmuWriteLongData (sp + 2, save_pc, 1); //5-2:プログラムカウンタ 18583: mmuWriteWordData (sp, save_sr, 1); //1-0:ステータスレジスタ 18584: irpSetPC (mmuReadLongFour (XEiJ.mpuVBR + offset, 1)); //例外ベクタを取り出してジャンプする 18585: } //irpExceptionFormat2 18586: 18587: //irpExceptionFormat3 (offset, save_pc, address) 18588: // 例外処理を開始する 18589: // スタックへのプッシュ、ベクタの取り出し、ジャンプのいずれかでバスエラーまたはアドレスエラーが発生する場合がある 18590: public static void irpExceptionFormat3 (int offset, int save_pc, int address) throws M68kException { 18591: XEiJ.mpuCycleCount += 19; 18592: int save_sr = XEiJ.regSRT1 | XEiJ.regSRS | XEiJ.regSRM | XEiJ.regSRI | XEiJ.regCCR; 18593: XEiJ.regSRT1 = XEiJ.mpuTraceFlag = 0; //srのTビットを消す 18594: int sp; 18595: if (XEiJ.regSRS != 0) { //スーパーバイザモード 18596: sp = XEiJ.regRn[15]; 18597: } else { //ユーザモード 18598: XEiJ.regSRS = XEiJ.REG_SR_S; //スーパーバイザモードへ移行する 18599: XEiJ.mpuUSP = XEiJ.regRn[15]; //USPを保存 18600: sp = XEiJ.mpuISP; //SSPを復元 18601: if (DataBreakPoint.DBP_ON) { 18602: DataBreakPoint.dbpMemoryMap = DataBreakPoint.dbpSuperMap; //スーパーバイザメモリマップに切り替える 18603: } else { 18604: XEiJ.busMemoryMap = XEiJ.busSuperMap; //スーパーバイザメモリマップに切り替える 18605: } 18606: if (InstructionBreakPoint.IBP_ON) { 18607: InstructionBreakPoint.ibpOp1MemoryMap = InstructionBreakPoint.ibpOp1SuperMap; 18608: } 18609: } 18610: //以下はスーパーバイザモード 18611: XEiJ.regRn[15] = sp -= 12; 18612: mmuWriteLongData (sp + 8, address, 1); //11-8:実効アドレス 18613: mmuWriteWordData (sp + 6, 0x3000 | offset, 1); //7-6:フォーマットとベクタオフセット 18614: mmuWriteLongData (sp + 2, save_pc, 1); //5-2:プログラムカウンタ 18615: mmuWriteWordData (sp, save_sr, 1); //1-0:ステータスレジスタ 18616: irpSetPC (mmuReadLongFour (XEiJ.mpuVBR + offset, 1)); //例外ベクタを取り出してジャンプする 18617: } //irpExceptionFormat3 18618: 18619: 18620: 18621: // 18622: // (d8,Ar,Rn.wl)と(d8,PC,Rn.wl)の拡張ワード 18623: // 0xf000 インデックスレジスタ 18624: // 0=D0,1=D1,2=D2,3=D3,4=D4,5=D5,6=D6,7=D7,8=A0,9=A1,10=A2,11=A3,12=A4,13=A5,14=A6,15=A7 18625: // 0x0800 インデックスサイズ 18626: // 0=ワードインデックス,1=ロングインデックス 18627: // 0x0600 スケールファクタ。ワードインデックスのとき符号拡張してから掛ける 18628: // 0=*1,1=*2,2=*4,3=*8 18629: // 0x0100 フォーマット 18630: // 0=ブリーフフォーマット,1=フルフォーマット 18631: // ブリーフフォーマット 18632: // 0x00ff バイトディスプレースメント 18633: // フルフォーマット 18634: // 0x0080 1=ベースレジスタなし 18635: // 0x0040 1=インデックスなし 18636: // 0x0030 ベースディスプレースメントサイズ 18637: // 1=ベースディスプレースメントなし,2=ワードベースディスプレースメント,3=ロングベースディスプレースメント 18638: // 0x0008 0 18639: // 0x0004 0=プリインデックス,1=ポストインデックス 18640: // 0x0003 インダイレクトとアウタディスプレースメントサイズ 18641: // 0=インダイレクトなし,1=アウタディスプレースメントなし,2=ワードアウタディスプレースメント,3=ロングアウタディスプレースメント 18642: // ベースディスプレースメントとアウタディスプレースメントが続く 18643: // MPUによる制限 18644: // スケールファクタは68020以上。68000と68010では無視されて*1になる 18645: // フルフォーマットは68020以上。68000と68010では不当命令になる 18646: // 18647: // (d16,PC)と(d8,PC,Rn.wl)のベースアドレス 18648: // (d16,PC)と(d8,PC,Rn.wl)のベースアドレスは、Fライン命令以外では命令の先頭アドレス+2、Fライン命令では命令の先頭アドレス+4 18649: // ベースアドレスの位置で実効アドレスを計算する 18650: // 18651: // #<data>の扱い 18652: // #<data>をそれが書かれている場所を実効アドレスとみなす方法で処理するとデータアクセスになってしまう 18653: // 命令アクセスにするためDr,Arと同様に呼び出し側で分離する 18654: // バイト 18655: // data = (ea < 020 ? (byte) XEiJ.regRn[ea] : //Dr,Ar 18656: // ea < 074 ? mmuReadByteSignData (efaMemByte (ea)) : 18657: // mmuReadByteSignExword ((XEiJ.regPC += 2) - 1, XEiJ.regSRS)); //#<data> 18658: // ワード 18659: // data = (ea < 020 ? (short) XEiJ.regRn[ea] : //Dr,Ar 18660: // ea < 074 ? mmuReadWordSignData (efaMemWord (ea)) : 18661: // mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS)); //#<data> 18662: // ロング 18663: // data = (ea < 020 ? XEiJ.regRn[ea] : //Dr,Ar 18664: // ea < 074 ? mmuReadLongData (efaMemLong (ea)) : 18665: // mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS)); //#<data> 18666: // 18667: 18668: //a = efaMemByte (ea) 18669: //a = efaMemWord (ea) 18670: //a = efaMemLong (ea) 18671: //a = efaMemQuad (ea) 18672: //a = efaMemExtd (ea) 18673: // | M+-WXZP | 18674: // メモリモードの実効アドレスを求める 18675: // バイトのとき(A7)+と-(A7)はA7を奇偶に関わらず2変化させ、跨いだワードの上位バイト(アドレスの小さい方)を参照する 18676: public static int efaMemByte (int ea) throws M68kException { 18677: int t, w, x; 18678: switch (ea) { 18679: case 020: //(A0) 18680: case 021: //(A1) 18681: case 022: //(A2) 18682: case 023: //(A3) 18683: case 024: //(A4) 18684: case 025: //(A5) 18685: case 026: //(A6) 18686: case 027: //(A7) 18687: return m60Address = XEiJ.regRn[ea - (020 - 8)]; 18688: case 030: //(A0)+ 18689: case 031: //(A1)+ 18690: case 032: //(A1)+ 18691: case 033: //(A3)+ 18692: case 034: //(A4)+ 18693: case 035: //(A5)+ 18694: case 036: //(A6)+ 18695: m60Incremented += 1L << ((ea - 030) << 3); 18696: return m60Address = XEiJ.regRn[ea - (030 - 8)]++; 18697: case 037: //(A7)+ 18698: m60Incremented += 2L << (7 << 3); 18699: return m60Address = (XEiJ.regRn[15] += 2) - 2; 18700: case 040: //-(A0) 18701: case 041: //-(A1) 18702: case 042: //-(A2) 18703: case 043: //-(A3) 18704: case 044: //-(A4) 18705: case 045: //-(A5) 18706: case 046: //-(A6) 18707: m60Incremented -= 1L << ((ea - 040) << 3); 18708: return m60Address = --XEiJ.regRn[ea - (040 - 8)]; 18709: case 047: //-(A7) 18710: m60Incremented -= 2L << (7 << 3); 18711: return m60Address = XEiJ.regRn[15] -= 2; 18712: case 050: //(d16,A0) 18713: case 051: //(d16,A1) 18714: case 052: //(d16,A2) 18715: case 053: //(d16,A3) 18716: case 054: //(d16,A4) 18717: case 055: //(d16,A5) 18718: case 056: //(d16,A6) 18719: case 057: //(d16,A7) 18720: case 072: //(d16,PC) 18721: t = ea == 072 ? XEiJ.regPC : XEiJ.regRn[ea - (050 - 8)]; //ベースレジスタ 18722: return m60Address = t + mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); //ワードディスプレースメント 18723: case 060: //(d8,A0,Rn.wl) 18724: case 061: //(d8,A1,Rn.wl) 18725: case 062: //(d8,A2,Rn.wl) 18726: case 063: //(d8,A3,Rn.wl) 18727: case 064: //(d8,A4,Rn.wl) 18728: case 065: //(d8,A5,Rn.wl) 18729: case 066: //(d8,A6,Rn.wl) 18730: case 067: //(d8,A7,Rn.wl) 18731: case 073: //(d8,PC,Rn.wl) 18732: t = ea == 073 ? XEiJ.regPC : XEiJ.regRn[ea - (060 - 8)]; //ベースレジスタ 18733: w = mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); //拡張ワード 18734: if ((0x0100 & w) == 0) { //ブリーフフォーマット 18735: return m60Address = 18736: (t //ベースレジスタ 18737: + (byte) w //バイトディスプレースメント 18738: + (((0x0800 & w) == 0 ? (short) XEiJ.regRn[w >> 12] : //ワードインデックス 18739: XEiJ.regRn[w >> 12]) //ロングインデックス 18740: << ((0x0600 & w) >> 9))); //スケールファクタ 18741: } else { //フルフォーマット 18742: XEiJ.mpuCycleCount += ((0x0003 & w) == 0 ? 1 : //インダイレクトなし 18743: 3); //インダイレクトあり 18744: t = (((0x0080 & w) != 0 ? 0 : //ベースレジスタなし 18745: t) + //ベースレジスタあり 18746: ((0x0020 & w) == 0 ? 0 : //ベースディスプレースメントなし 18747: (0x0010 & w) == 0 ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) : //ワードベースディスプレースメント 18748: mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS))); //ロングベースディスプレースメント 18749: x = ((0x0040 & w) != 0 ? 0 : //インデックスなし 18750: ((0x0800 & w) == 0 ? (short) XEiJ.regRn[w >> 12] : //ワードインデックス 18751: XEiJ.regRn[w >> 12]) //ロングインデックス 18752: << ((0x0600 & w) >> 9)); //スケールファクタ 18753: return m60Address = 18754: ((0x0003 & w) == 0 ? t + x : //インダイレクトなし 18755: (((0x0004 & w) == 0 ? mmuReadLongData (m60Address = t + x, XEiJ.regSRS) : //プリインデックス 18756: mmuReadLongData (m60Address = t, XEiJ.regSRS) + x) //ポストインデックス 18757: + ((0x0002 & w) == 0 ? 0 : //アウタディスプレースメントなし 18758: (0x0001 & w) == 0 ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) : //ワードアウタディスプレースメント 18759: mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS)))); //ロングアウタディスプレースメント 18760: } 18761: case 070: //(xxx).W 18762: return m60Address = mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); 18763: case 071: //(xxx).L 18764: return m60Address = mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS); 18765: case 074: 18766: Thread.dumpStack (); 18767: break; 18768: } //switch 18769: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 18770: throw M68kException.m6eSignal; 18771: } //efaMemByte 18772: public static int efaMemWord (int ea) throws M68kException { 18773: int t, w, x; 18774: switch (ea) { 18775: case 020: //(A0) 18776: case 021: //(A1) 18777: case 022: //(A2) 18778: case 023: //(A3) 18779: case 024: //(A4) 18780: case 025: //(A5) 18781: case 026: //(A6) 18782: case 027: //(A7) 18783: return m60Address = XEiJ.regRn[ea - (020 - 8)]; 18784: case 030: //(A0)+ 18785: case 031: //(A1)+ 18786: case 032: //(A1)+ 18787: case 033: //(A3)+ 18788: case 034: //(A4)+ 18789: case 035: //(A5)+ 18790: case 036: //(A6)+ 18791: case 037: //(A7)+ 18792: m60Incremented += 2L << ((ea - 030) << 3); 18793: return m60Address = (XEiJ.regRn[ea - (030 - 8)] += 2) - 2; 18794: case 040: //-(A0) 18795: case 041: //-(A1) 18796: case 042: //-(A2) 18797: case 043: //-(A3) 18798: case 044: //-(A4) 18799: case 045: //-(A5) 18800: case 046: //-(A6) 18801: case 047: //-(A7) 18802: m60Incremented -= 2L << ((ea - 040) << 3); 18803: return m60Address = XEiJ.regRn[ea - (040 - 8)] -= 2; 18804: case 050: //(d16,A0) 18805: case 051: //(d16,A1) 18806: case 052: //(d16,A2) 18807: case 053: //(d16,A3) 18808: case 054: //(d16,A4) 18809: case 055: //(d16,A5) 18810: case 056: //(d16,A6) 18811: case 057: //(d16,A7) 18812: case 072: //(d16,PC) 18813: t = ea == 072 ? XEiJ.regPC : XEiJ.regRn[ea - (050 - 8)]; //ベースレジスタ 18814: return m60Address = t + mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); //ワードディスプレースメント 18815: case 060: //(d8,A0,Rn.wl) 18816: case 061: //(d8,A1,Rn.wl) 18817: case 062: //(d8,A2,Rn.wl) 18818: case 063: //(d8,A3,Rn.wl) 18819: case 064: //(d8,A4,Rn.wl) 18820: case 065: //(d8,A5,Rn.wl) 18821: case 066: //(d8,A6,Rn.wl) 18822: case 067: //(d8,A7,Rn.wl) 18823: case 073: //(d8,PC,Rn.wl) 18824: t = ea == 073 ? XEiJ.regPC : XEiJ.regRn[ea - (060 - 8)]; //ベースレジスタ 18825: w = mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); //拡張ワード 18826: if ((0x0100 & w) == 0) { //ブリーフフォーマット 18827: return m60Address = 18828: (t //ベースレジスタ 18829: + (byte) w //バイトディスプレースメント 18830: + (((0x0800 & w) == 0 ? (short) XEiJ.regRn[w >> 12] : //ワードインデックス 18831: XEiJ.regRn[w >> 12]) //ロングインデックス 18832: << ((0x0600 & w) >> 9))); //スケールファクタ 18833: } else { //フルフォーマット 18834: XEiJ.mpuCycleCount += ((0x0003 & w) == 0 ? 1 : //インダイレクトなし 18835: 3); //インダイレクトあり 18836: t = (((0x0080 & w) != 0 ? 0 : //ベースレジスタなし 18837: t) + //ベースレジスタあり 18838: ((0x0020 & w) == 0 ? 0 : //ベースディスプレースメントなし 18839: (0x0010 & w) == 0 ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) : //ワードベースディスプレースメント 18840: mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS))); //ロングベースディスプレースメント 18841: x = ((0x0040 & w) != 0 ? 0 : //インデックスなし 18842: ((0x0800 & w) == 0 ? (short) XEiJ.regRn[w >> 12] : //ワードインデックス 18843: XEiJ.regRn[w >> 12]) //ロングインデックス 18844: << ((0x0600 & w) >> 9)); //スケールファクタ 18845: return m60Address = 18846: ((0x0003 & w) == 0 ? t + x : //インダイレクトなし 18847: (((0x0004 & w) == 0 ? mmuReadLongData (m60Address = t + x, XEiJ.regSRS) : //プリインデックス 18848: mmuReadLongData (m60Address = t, XEiJ.regSRS) + x) //ポストインデックス 18849: + ((0x0002 & w) == 0 ? 0 : //アウタディスプレースメントなし 18850: (0x0001 & w) == 0 ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) : //ワードアウタディスプレースメント 18851: mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS)))); //ロングアウタディスプレースメント 18852: } 18853: case 070: //(xxx).W 18854: return m60Address = mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); 18855: case 071: //(xxx).L 18856: return m60Address = mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS); 18857: case 074: 18858: Thread.dumpStack (); 18859: break; 18860: } //switch 18861: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 18862: throw M68kException.m6eSignal; 18863: } //efaMemWord 18864: public static int efaMemLong (int ea) throws M68kException { 18865: int t, w, x; 18866: switch (ea) { 18867: case 020: //(A0) 18868: case 021: //(A1) 18869: case 022: //(A2) 18870: case 023: //(A3) 18871: case 024: //(A4) 18872: case 025: //(A5) 18873: case 026: //(A6) 18874: case 027: //(A7) 18875: return m60Address = XEiJ.regRn[ea - (020 - 8)]; 18876: case 030: //(A0)+ 18877: case 031: //(A1)+ 18878: case 032: //(A1)+ 18879: case 033: //(A3)+ 18880: case 034: //(A4)+ 18881: case 035: //(A5)+ 18882: case 036: //(A6)+ 18883: case 037: //(A7)+ 18884: m60Incremented += 4L << ((ea - 030) << 3); 18885: return m60Address = (XEiJ.regRn[ea - (030 - 8)] += 4) - 4; 18886: case 040: //-(A0) 18887: case 041: //-(A1) 18888: case 042: //-(A2) 18889: case 043: //-(A3) 18890: case 044: //-(A4) 18891: case 045: //-(A5) 18892: case 046: //-(A6) 18893: case 047: //-(A7) 18894: m60Incremented -= 4L << ((ea - 040) << 3); 18895: return m60Address = XEiJ.regRn[ea - (040 - 8)] -= 4; 18896: case 050: //(d16,A0) 18897: case 051: //(d16,A1) 18898: case 052: //(d16,A2) 18899: case 053: //(d16,A3) 18900: case 054: //(d16,A4) 18901: case 055: //(d16,A5) 18902: case 056: //(d16,A6) 18903: case 057: //(d16,A7) 18904: case 072: //(d16,PC) 18905: t = ea == 072 ? XEiJ.regPC : XEiJ.regRn[ea - (050 - 8)]; //ベースレジスタ 18906: return m60Address = t + mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); //ワードディスプレースメント 18907: case 060: //(d8,A0,Rn.wl) 18908: case 061: //(d8,A1,Rn.wl) 18909: case 062: //(d8,A2,Rn.wl) 18910: case 063: //(d8,A3,Rn.wl) 18911: case 064: //(d8,A4,Rn.wl) 18912: case 065: //(d8,A5,Rn.wl) 18913: case 066: //(d8,A6,Rn.wl) 18914: case 067: //(d8,A7,Rn.wl) 18915: case 073: //(d8,PC,Rn.wl) 18916: t = ea == 073 ? XEiJ.regPC : XEiJ.regRn[ea - (060 - 8)]; //ベースレジスタ 18917: w = mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); //拡張ワード 18918: if ((0x0100 & w) == 0) { //ブリーフフォーマット 18919: return m60Address = 18920: (t //ベースレジスタ 18921: + (byte) w //バイトディスプレースメント 18922: + (((0x0800 & w) == 0 ? (short) XEiJ.regRn[w >> 12] : //ワードインデックス 18923: XEiJ.regRn[w >> 12]) //ロングインデックス 18924: << ((0x0600 & w) >> 9))); //スケールファクタ 18925: } else { //フルフォーマット 18926: XEiJ.mpuCycleCount += ((0x0003 & w) == 0 ? 1 : //インダイレクトなし 18927: 3); //インダイレクトあり 18928: t = (((0x0080 & w) != 0 ? 0 : //ベースレジスタなし 18929: t) + //ベースレジスタあり 18930: ((0x0020 & w) == 0 ? 0 : //ベースディスプレースメントなし 18931: (0x0010 & w) == 0 ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) : //ワードベースディスプレースメント 18932: mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS))); //ロングベースディスプレースメント 18933: x = ((0x0040 & w) != 0 ? 0 : //インデックスなし 18934: ((0x0800 & w) == 0 ? (short) XEiJ.regRn[w >> 12] : //ワードインデックス 18935: XEiJ.regRn[w >> 12]) //ロングインデックス 18936: << ((0x0600 & w) >> 9)); //スケールファクタ 18937: return m60Address = 18938: ((0x0003 & w) == 0 ? t + x : //インダイレクトなし 18939: (((0x0004 & w) == 0 ? mmuReadLongData (m60Address = t + x, XEiJ.regSRS) : //プリインデックス 18940: mmuReadLongData (m60Address = t, XEiJ.regSRS) + x) //ポストインデックス 18941: + ((0x0002 & w) == 0 ? 0 : //アウタディスプレースメントなし 18942: (0x0001 & w) == 0 ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) : //ワードアウタディスプレースメント 18943: mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS)))); //ロングアウタディスプレースメント 18944: } 18945: case 070: //(xxx).W 18946: return m60Address = mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); 18947: case 071: //(xxx).L 18948: return m60Address = mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS); 18949: case 074: 18950: Thread.dumpStack (); 18951: break; 18952: } //switch 18953: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 18954: throw M68kException.m6eSignal; 18955: } //efaMemLong 18956: public static int efaMemQuad (int ea) throws M68kException { 18957: int t, w, x; 18958: switch (ea) { 18959: case 020: //(A0) 18960: case 021: //(A1) 18961: case 022: //(A2) 18962: case 023: //(A3) 18963: case 024: //(A4) 18964: case 025: //(A5) 18965: case 026: //(A6) 18966: case 027: //(A7) 18967: return m60Address = XEiJ.regRn[ea - (020 - 8)]; 18968: case 030: //(A0)+ 18969: case 031: //(A1)+ 18970: case 032: //(A1)+ 18971: case 033: //(A3)+ 18972: case 034: //(A4)+ 18973: case 035: //(A5)+ 18974: case 036: //(A6)+ 18975: case 037: //(A7)+ 18976: m60Incremented += 8L << ((ea - 030) << 3); 18977: return m60Address = (XEiJ.regRn[ea - (030 - 8)] += 8) - 8; 18978: case 040: //-(A0) 18979: case 041: //-(A1) 18980: case 042: //-(A2) 18981: case 043: //-(A3) 18982: case 044: //-(A4) 18983: case 045: //-(A5) 18984: case 046: //-(A6) 18985: case 047: //-(A7) 18986: m60Incremented -= 8L << ((ea - 040) << 3); 18987: return m60Address = XEiJ.regRn[ea - (040 - 8)] -= 8; 18988: case 050: //(d16,A0) 18989: case 051: //(d16,A1) 18990: case 052: //(d16,A2) 18991: case 053: //(d16,A3) 18992: case 054: //(d16,A4) 18993: case 055: //(d16,A5) 18994: case 056: //(d16,A6) 18995: case 057: //(d16,A7) 18996: case 072: //(d16,PC) 18997: t = ea == 072 ? XEiJ.regPC : XEiJ.regRn[ea - (050 - 8)]; //ベースレジスタ 18998: return m60Address = t + mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); //ワードディスプレースメント 18999: case 060: //(d8,A0,Rn.wl) 19000: case 061: //(d8,A1,Rn.wl) 19001: case 062: //(d8,A2,Rn.wl) 19002: case 063: //(d8,A3,Rn.wl) 19003: case 064: //(d8,A4,Rn.wl) 19004: case 065: //(d8,A5,Rn.wl) 19005: case 066: //(d8,A6,Rn.wl) 19006: case 067: //(d8,A7,Rn.wl) 19007: case 073: //(d8,PC,Rn.wl) 19008: t = ea == 073 ? XEiJ.regPC : XEiJ.regRn[ea - (060 - 8)]; //ベースレジスタ 19009: w = mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); //拡張ワード 19010: if ((0x0100 & w) == 0) { //ブリーフフォーマット 19011: return m60Address = 19012: (t //ベースレジスタ 19013: + (byte) w //バイトディスプレースメント 19014: + (((0x0800 & w) == 0 ? (short) XEiJ.regRn[w >> 12] : //ワードインデックス 19015: XEiJ.regRn[w >> 12]) //ロングインデックス 19016: << ((0x0600 & w) >> 9))); //スケールファクタ 19017: } else { //フルフォーマット 19018: XEiJ.mpuCycleCount += ((0x0003 & w) == 0 ? 1 : //インダイレクトなし 19019: 3); //インダイレクトあり 19020: t = (((0x0080 & w) != 0 ? 0 : //ベースレジスタなし 19021: t) + //ベースレジスタあり 19022: ((0x0020 & w) == 0 ? 0 : //ベースディスプレースメントなし 19023: (0x0010 & w) == 0 ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) : //ワードベースディスプレースメント 19024: mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS))); //ロングベースディスプレースメント 19025: x = ((0x0040 & w) != 0 ? 0 : //インデックスなし 19026: ((0x0800 & w) == 0 ? (short) XEiJ.regRn[w >> 12] : //ワードインデックス 19027: XEiJ.regRn[w >> 12]) //ロングインデックス 19028: << ((0x0600 & w) >> 9)); //スケールファクタ 19029: return m60Address = 19030: ((0x0003 & w) == 0 ? t + x : //インダイレクトなし 19031: (((0x0004 & w) == 0 ? mmuReadLongData (m60Address = t + x, XEiJ.regSRS) : //プリインデックス 19032: mmuReadLongData (m60Address = t, XEiJ.regSRS) + x) //ポストインデックス 19033: + ((0x0002 & w) == 0 ? 0 : //アウタディスプレースメントなし 19034: (0x0001 & w) == 0 ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) : //ワードアウタディスプレースメント 19035: mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS)))); //ロングアウタディスプレースメント 19036: } 19037: case 070: //(xxx).W 19038: return m60Address = mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); 19039: case 071: //(xxx).L 19040: return m60Address = mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS); 19041: case 074: 19042: Thread.dumpStack (); 19043: break; 19044: } //switch 19045: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 19046: throw M68kException.m6eSignal; 19047: } //efaMemQuad 19048: public static int efaMemExtd (int ea) throws M68kException { 19049: int t, w, x; 19050: switch (ea) { 19051: case 020: //(A0) 19052: case 021: //(A1) 19053: case 022: //(A2) 19054: case 023: //(A3) 19055: case 024: //(A4) 19056: case 025: //(A5) 19057: case 026: //(A6) 19058: case 027: //(A7) 19059: return m60Address = XEiJ.regRn[ea - (020 - 8)]; 19060: case 030: //(A0)+ 19061: case 031: //(A1)+ 19062: case 032: //(A1)+ 19063: case 033: //(A3)+ 19064: case 034: //(A4)+ 19065: case 035: //(A5)+ 19066: case 036: //(A6)+ 19067: case 037: //(A7)+ 19068: m60Incremented += 12L << ((ea - 030) << 3); 19069: return m60Address = (XEiJ.regRn[ea - (030 - 8)] += 12) - 12; 19070: case 040: //-(A0) 19071: case 041: //-(A1) 19072: case 042: //-(A2) 19073: case 043: //-(A3) 19074: case 044: //-(A4) 19075: case 045: //-(A5) 19076: case 046: //-(A6) 19077: case 047: //-(A7) 19078: m60Incremented -= 12L << ((ea - 040) << 3); 19079: return m60Address = XEiJ.regRn[ea - (040 - 8)] -= 12; 19080: case 050: //(d16,A0) 19081: case 051: //(d16,A1) 19082: case 052: //(d16,A2) 19083: case 053: //(d16,A3) 19084: case 054: //(d16,A4) 19085: case 055: //(d16,A5) 19086: case 056: //(d16,A6) 19087: case 057: //(d16,A7) 19088: case 072: //(d16,PC) 19089: t = ea == 072 ? XEiJ.regPC : XEiJ.regRn[ea - (050 - 8)]; //ベースレジスタ 19090: return m60Address = t + mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); //ワードディスプレースメント 19091: case 060: //(d8,A0,Rn.wl) 19092: case 061: //(d8,A1,Rn.wl) 19093: case 062: //(d8,A2,Rn.wl) 19094: case 063: //(d8,A3,Rn.wl) 19095: case 064: //(d8,A4,Rn.wl) 19096: case 065: //(d8,A5,Rn.wl) 19097: case 066: //(d8,A6,Rn.wl) 19098: case 067: //(d8,A7,Rn.wl) 19099: case 073: //(d8,PC,Rn.wl) 19100: t = ea == 073 ? XEiJ.regPC : XEiJ.regRn[ea - (060 - 8)]; //ベースレジスタ 19101: w = mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); //拡張ワード 19102: if ((0x0100 & w) == 0) { //ブリーフフォーマット 19103: return m60Address = 19104: (t //ベースレジスタ 19105: + (byte) w //バイトディスプレースメント 19106: + (((0x0800 & w) == 0 ? (short) XEiJ.regRn[w >> 12] : //ワードインデックス 19107: XEiJ.regRn[w >> 12]) //ロングインデックス 19108: << ((0x0600 & w) >> 9))); //スケールファクタ 19109: } else { //フルフォーマット 19110: XEiJ.mpuCycleCount += ((0x0003 & w) == 0 ? 1 : //インダイレクトなし 19111: 3); //インダイレクトあり 19112: t = (((0x0080 & w) != 0 ? 0 : //ベースレジスタなし 19113: t) + //ベースレジスタあり 19114: ((0x0020 & w) == 0 ? 0 : //ベースディスプレースメントなし 19115: (0x0010 & w) == 0 ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) : //ワードベースディスプレースメント 19116: mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS))); //ロングベースディスプレースメント 19117: x = ((0x0040 & w) != 0 ? 0 : //インデックスなし 19118: ((0x0800 & w) == 0 ? (short) XEiJ.regRn[w >> 12] : //ワードインデックス 19119: XEiJ.regRn[w >> 12]) //ロングインデックス 19120: << ((0x0600 & w) >> 9)); //スケールファクタ 19121: return m60Address = 19122: ((0x0003 & w) == 0 ? t + x : //インダイレクトなし 19123: (((0x0004 & w) == 0 ? mmuReadLongData (m60Address = t + x, XEiJ.regSRS) : //プリインデックス 19124: mmuReadLongData (m60Address = t, XEiJ.regSRS) + x) //ポストインデックス 19125: + ((0x0002 & w) == 0 ? 0 : //アウタディスプレースメントなし 19126: (0x0001 & w) == 0 ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) : //ワードアウタディスプレースメント 19127: mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS)))); //ロングアウタディスプレースメント 19128: } 19129: case 070: //(xxx).W 19130: return m60Address = mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); 19131: case 071: //(xxx).L 19132: return m60Address = mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS); 19133: case 074: 19134: Thread.dumpStack (); 19135: break; 19136: } //switch 19137: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 19138: throw M68kException.m6eSignal; 19139: } //efaMemExtd 19140: 19141: // 7777777766666666555555554444444433333333222222221111111100000000 mmm 19142: // 7654321076543210765432107654321076543210765432107654321076543210 rrr 19143: // ...IPPZZXXXXXXXXWWWWWWWW--------++++++++MMMMMMMMAAAAAAAADDDDDDDD 19144: static final long MEM_MASK = 0b0000111111111111111111111111111111111111111111110000000000000000L; //メモリモード 19145: static final long MLT_MASK = 0b0000001111111111111111111111111111111111111111110000000000000000L; //メモリ可変モード 19146: static final long CNT_MASK = 0b0000111111111111111111110000000000000000111111110000000000000000L; //制御モード 19147: static final long CLT_MASK = 0b0000001111111111111111110000000000000000111111110000000000000000L; //制御可変モード 19148: 19149: //a = efaMltByte (ea) 19150: //a = efaMltWord (ea) 19151: //a = efaMltLong (ea) 19152: //a = efaMltQuad (ea) 19153: //a = efaMltExtd (ea) 19154: // | M+-WXZ | 19155: // メモリ可変モードの実効アドレスを求める 19156: // メモリモードとの違いは(d16,PC)と(d8,PC,Rn.wl)がないこと 19157: public static int efaMltByte (int ea) throws M68kException { 19158: return efaMemByte ((MLT_MASK & (1L << ea)) == 0 ? 0 : ea); 19159: } //efaMltByte 19160: public static int efaMltWord (int ea) throws M68kException { 19161: return efaMemWord ((MLT_MASK & (1L << ea)) == 0 ? 0 : ea); 19162: } //efaMltWord 19163: public static int efaMltLong (int ea) throws M68kException { 19164: return efaMemLong ((MLT_MASK & (1L << ea)) == 0 ? 0 : ea); 19165: } //efaMltLong 19166: public static int efaMltQuad (int ea) throws M68kException { 19167: return efaMemQuad ((MLT_MASK & (1L << ea)) == 0 ? 0 : ea); 19168: } //efaMltQuad 19169: public static int efaMltExtd (int ea) throws M68kException { 19170: return efaMemExtd ((MLT_MASK & (1L << ea)) == 0 ? 0 : ea); 19171: } //efaMltExtd 19172: 19173: //a = efaCntByte (ea) 19174: //a = efaCntWord (ea) 19175: //a = efaCntLong (ea) 19176: //a = efaCntQuad (ea) 19177: //a = efaCntExtd (ea) 19178: // | M WXZP | 19179: // 制御モードの実効アドレスを求める 19180: // メモリモードとの違いは(Ar)+と-(Ar)がないこと 19181: public static int efaCntByte (int ea) throws M68kException { 19182: return efaMemByte ((CNT_MASK & (1L << ea)) == 0 ? 0 : ea); 19183: } //efaCntByte 19184: public static int efaCntWord (int ea) throws M68kException { 19185: return efaMemWord ((CNT_MASK & (1L << ea)) == 0 ? 0 : ea); 19186: } //efaCntWord 19187: public static int efaCntLong (int ea) throws M68kException { 19188: return efaMemLong ((CNT_MASK & (1L << ea)) == 0 ? 0 : ea); 19189: } //efaCntLong 19190: public static int efaCntQuad (int ea) throws M68kException { 19191: return efaMemQuad ((CNT_MASK & (1L << ea)) == 0 ? 0 : ea); 19192: } //efaCntQuad 19193: public static int efaCntExtd (int ea) throws M68kException { 19194: return efaMemExtd ((CNT_MASK & (1L << ea)) == 0 ? 0 : ea); 19195: } //efaCntExtd 19196: 19197: //a = efaCltByte (ea) 19198: //a = efaCltWord (ea) 19199: //a = efaCltLong (ea) 19200: //a = efaCltQuad (ea) 19201: //a = efaCltExtd (ea) 19202: // | M WXZ | 19203: // 制御可変モードの実効アドレスを求める 19204: // メモリモードとの違いは(Ar)+と-(Ar)と(d16,PC)と(d8,PC,Rn.wl)がないこと 19205: public static int efaCltByte (int ea) throws M68kException { 19206: return efaMemByte ((CLT_MASK & (1L << ea)) == 0 ? 0 : ea); 19207: } //efaCltByte 19208: public static int efaCltWord (int ea) throws M68kException { 19209: return efaMemWord ((CLT_MASK & (1L << ea)) == 0 ? 0 : ea); 19210: } //efaCltWord 19211: public static int efaCltLong (int ea) throws M68kException { 19212: return efaMemLong ((CLT_MASK & (1L << ea)) == 0 ? 0 : ea); 19213: } //efaCltLong 19214: public static int efaCltQuad (int ea) throws M68kException { 19215: return efaMemQuad ((CLT_MASK & (1L << ea)) == 0 ? 0 : ea); 19216: } //efaCltQuad 19217: public static int efaCltExtd (int ea) throws M68kException { 19218: return efaMemExtd ((CLT_MASK & (1L << ea)) == 0 ? 0 : ea); 19219: } //efaCltExtd 19220: 19221: //以下廃止予定 19222: // Any* → Mem* #<data>を分離できているか確認すること 19223: // LeaPea → Cnt* 19224: // JmpJsr → Cnt* 19225: public static int efaAnyByte (int ea) throws M68kException { 19226: return efaMemByte (ea); 19227: } //efaAnyByte 19228: public static int efaAnyWord (int ea) throws M68kException { 19229: return efaMemWord (ea); 19230: } //efaAnyWord 19231: public static int efaAnyLong (int ea) throws M68kException { 19232: return efaMemLong (ea); 19233: } //efaAnyLong 19234: public static int efaAnyQuad (int ea) throws M68kException { 19235: return efaMemQuad (ea); 19236: } //efaAnyQuad 19237: public static int efaAnyExtd (int ea) throws M68kException { 19238: return efaMemExtd (ea); 19239: } //efaAnyExtd 19240: public static int efaLeaPea (int ea) throws M68kException { 19241: return efaCntLong (ea); 19242: } //efaLeaPea 19243: public static int efaJmpJsr (int ea) throws M68kException { 19244: return efaCntLong (ea); 19245: } //efaJmpJsr 19246: 19247: 19248: 19249: //fpkSTOL () 19250: // $FE10 __STOL 19251: // 10進数の文字列を32bit符号あり整数に変換する 19252: // /^[ \t]*[-+]?[0-9]+/ 19253: // 先頭の'\t'と' 'を読み飛ばす 19254: // <a0.l:10進数の文字列の先頭 19255: // >d0.l:32bit符号あり整数 19256: // >a0.l:10進数の文字列の直後('\0'とは限らない) 19257: // >ccr:0=エラーなし,CCR_N|CCR_C=文法エラー,CCR_V|CCR_C=オーバーフロー 19258: public static void fpkSTOL () throws M68kException { 19259: int a = XEiJ.regRn[8]; //a0 19260: int c = mmuReadByteZeroData (a, 1); 19261: while (c == ' ' || c == '\t') { 19262: c = mmuReadByteZeroData (++a, 1); 19263: } 19264: int n = '7'; //'7'=正,'8'=負 19265: if (c == '-') { //負 19266: n = '8'; 19267: c = mmuReadByteZeroData (++a, 1); 19268: } else if (c == '+') { //正 19269: c = mmuReadByteZeroData (++a, 1); 19270: } 19271: if (!('0' <= c && c <= '9')) { //数字が1つもない 19272: XEiJ.regRn[8] = a; //a0 19273: XEiJ.regCCR = XEiJ.REG_CCR_N | XEiJ.REG_CCR_C; 19274: return; 19275: } 19276: int x = c - '0'; //値 19277: for (c = mmuReadByteZeroData (++a, 1); '0' <= c && c <= '9'; c = mmuReadByteZeroData (++a, 1)) { 19278: if (214748364 < x || x == 214748364 && n < c) { //正のとき2147483647、負のとき2147483648より大きくなるときオーバーフロー 19279: XEiJ.regRn[8] = a; //a0 19280: XEiJ.regCCR = XEiJ.REG_CCR_V | XEiJ.REG_CCR_C; 19281: return; 19282: } 19283: x = x * 10 + (c - '0'); 19284: } 19285: if (n != '7') { //負 19286: x = -x; 19287: } 19288: XEiJ.regRn[0] = x; //d0 19289: XEiJ.regRn[8] = a; //a0 19290: XEiJ.regCCR = 0; 19291: } //fpkSTOL() 19292: 19293: //fpkLTOS () 19294: // $FE11 __LTOS 19295: // 32bit符号あり整数を10進数の文字列に変換する 19296: // /^-?[1-9][0-9]*$/ 19297: // <d0.l:32bit符号あり整数 19298: // <a0.l:文字列バッファの先頭 19299: // >a0.l:10進数の文字列の直後('\0'の位置) 19300: public static void fpkLTOS () throws M68kException { 19301: int x = XEiJ.regRn[0]; //d0 19302: int a = XEiJ.regRn[8]; //a0 19303: if (x < 0) { //負 19304: mmuWriteByteData (a++, '-', 1); 19305: x = -x; 19306: } 19307: long t = XEiJ.fmtBcd12 (0xffffffffL & x); //符号は取り除いてあるがx=0x80000000の場合があるので(long)xは不可 19308: XEiJ.regRn[8] = a += Math.max (1, 67 - Long.numberOfLeadingZeros (t) >> 2); //a0 19309: mmuWriteByteData (a, 0, 1); 19310: do { 19311: mmuWriteByteData (--a, '0' | (int) t & 15, 1); 19312: } while ((t >>>= 4) != 0L); 19313: } //fpkLTOS() 19314: 19315: //fpkSTOH () 19316: // $FE12 __STOH 19317: // 16進数の文字列を32bit符号なし整数に変換する 19318: // /^[0-9A-Fa-f]+/ 19319: // <a0.l:16進数の文字列の先頭 19320: // >d0.l:32bit符号なし整数 19321: // >a0.l:16進数の文字列の直後('\0'とは限らない) 19322: // >ccr:0=エラーなし,CCR_N|CCR_C=文法エラー,CCR_V|CCR_C=オーバーフロー 19323: public static void fpkSTOH () throws M68kException { 19324: int a = XEiJ.regRn[8]; //a0 19325: int c = mmuReadByteZeroData (a, 1); 19326: if (!('0' <= c && c <= '9' || 'A' <= c && c <= 'F' || 'a' <= c && c <= 'f')) { //数字が1つもない 19327: XEiJ.regRn[8] = a; //a0 19328: XEiJ.regCCR = XEiJ.REG_CCR_N | XEiJ.REG_CCR_C; 19329: return; 19330: } 19331: int x = c <= '9' ? c - '0' : c <= 'F' ? c - ('A' - 10) : c - ('a' - 10); //値 19332: for (c = mmuReadByteZeroData (++a, 1); '0' <= c && c <= '9' || 'A' <= c && c <= 'F' || 'a' <= c && c <= 'f'; c = mmuReadByteZeroData (++a, 1)) { 19333: if (0x0fffffff < x) { //0xffffffffより大きくなるときオーバーフロー 19334: XEiJ.regRn[8] = a; //a0 19335: XEiJ.regCCR = XEiJ.REG_CCR_V | XEiJ.REG_CCR_C; 19336: return; 19337: } 19338: x = x << 4 | (c <= '9' ? c - '0' : c <= 'F' ? c - ('A' - 10) : c - ('a' - 10)); 19339: } 19340: XEiJ.regRn[0] = x; //d0 19341: XEiJ.regRn[8] = a; //a0 19342: XEiJ.regCCR = 0; 19343: } //fpkSTOH() 19344: 19345: //fpkHTOS () 19346: // $FE13 __HTOS 19347: // 32bit符号なし整数を16進数の文字列に変換する 19348: // /^[1-9A-F][0-9A-F]*$/ 19349: // <d0.l:32bit符号なし整数 19350: // <a0.l:文字列バッファの先頭 19351: // >a0.l:16進数の文字列の直後('\0'の位置) 19352: public static void fpkHTOS () throws M68kException { 19353: int x = XEiJ.regRn[0]; //d0 19354: int a = XEiJ.regRn[8] += Math.max (1, 35 - Integer.numberOfLeadingZeros (x) >> 2); //a0 19355: mmuWriteByteData (a, 0, 1); 19356: do { 19357: int t = x & 15; 19358: // t 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 19359: // 9-t 09 08 07 06 05 04 03 02 01 00 ff fe fd fc fb fa 19360: // 9-t>>4 00 00 00 00 00 00 00 00 00 00 ff ff ff ff ff ff 19361: // 9-t>>4&7 00 00 00 00 00 00 00 00 00 00 07 07 07 07 07 07 19362: // 9-t>>4&7|48 30 30 30 30 30 30 30 30 30 30 37 37 37 37 37 37 19363: // (9-t>>4&7|48)+t 30 31 32 33 34 35 36 37 38 39 41 42 43 44 45 46 19364: // 0 1 2 3 4 5 6 7 8 9 A B C D E F 19365: mmuWriteByteData (--a, (9 - t >> 4 & 7 | 48) + t, 1); 19366: } while ((x >>>= 4) != 0); 19367: } //fpkHTOS() 19368: 19369: //fpkSTOO () 19370: // $FE14 __STOO 19371: // 8進数の文字列を32bit符号なし整数に変換する 19372: // /^[0-7]+/ 19373: // <a0.l:8進数の文字列の先頭 19374: // >d0.l:32bit符号なし整数 19375: // >a0.l:8進数の文字列の直後('\0'とは限らない) 19376: // >ccr:0=エラーなし,CCR_N|CCR_C=文法エラー,CCR_V|CCR_C=オーバーフロー 19377: public static void fpkSTOO () throws M68kException { 19378: int a = XEiJ.regRn[8]; //a0 19379: int c = mmuReadByteZeroData (a, 1); 19380: if (!('0' <= c && c <= '7')) { //数字が1つもない 19381: XEiJ.regRn[8] = a; //a0 19382: XEiJ.regCCR = XEiJ.REG_CCR_N | XEiJ.REG_CCR_C; 19383: return; 19384: } 19385: int x = c - '0'; //値 19386: for (c = mmuReadByteZeroData (++a, 1); '0' <= c && c <= '7'; c = mmuReadByteZeroData (++a, 1)) { 19387: if (0x1fffffff < x) { //0xffffffffより大きくなるときオーバーフロー 19388: XEiJ.regRn[8] = a; //a0 19389: XEiJ.regCCR = XEiJ.REG_CCR_V | XEiJ.REG_CCR_C; 19390: return; 19391: } 19392: x = x << 3 | c & 7; 19393: } 19394: XEiJ.regRn[0] = x; //d0 19395: XEiJ.regRn[8] = a; //a0 19396: XEiJ.regCCR = 0; 19397: } //fpkSTOO() 19398: 19399: //fpkOTOS () 19400: // $FE15 __OTOS 19401: // 32bit符号なし整数を8進数の文字列に変換する 19402: // /^[1-7][0-7]*$/ 19403: // <d0.l:32bit符号なし整数 19404: // <a0.l:文字列バッファの先頭 19405: // >a0.l:8進数の文字列の直後('\0'の位置) 19406: public static void fpkOTOS () throws M68kException { 19407: int x = XEiJ.regRn[0]; //d0 19408: //perl optdiv.pl 34 3 19409: // x/3==x*43>>>7 (0<=x<=127) [34*43==1462] 19410: int a = XEiJ.regRn[8] += Math.max (1, (34 - Integer.numberOfLeadingZeros (x)) * 43 >>> 7); //a0 19411: mmuWriteByteData (a, 0, 1); 19412: do { 19413: mmuWriteByteData (--a, '0' | x & 7, 1); 19414: } while ((x >>>= 3) != 0); 19415: } //fpkOTOS() 19416: 19417: //fpkSTOB () 19418: // $FE16 __STOB 19419: // 2進数の文字列を32bit符号なし整数に変換する 19420: // /^[01]+/ 19421: // <a0.l:2進数の文字列の先頭 19422: // >d0.l:32bit符号なし整数 19423: // >a0.l:2進数の文字列の直後('\0'とは限らない) 19424: // >ccr:0=エラーなし,CCR_N|CCR_C=文法エラー,CCR_V|CCR_C=オーバーフロー 19425: public static void fpkSTOB () throws M68kException { 19426: int a = XEiJ.regRn[8]; //a0 19427: int c = mmuReadByteZeroData (a, 1); 19428: if (!('0' <= c && c <= '1')) { //数字が1つもない 19429: XEiJ.regRn[8] = a; //a0 19430: XEiJ.regCCR = XEiJ.REG_CCR_N | XEiJ.REG_CCR_C; 19431: return; 19432: } 19433: int x = c - '0'; //値 19434: for (c = mmuReadByteZeroData (++a, 1); '0' <= c && c <= '1'; c = mmuReadByteZeroData (++a, 1)) { 19435: if (x < 0) { //オーバーフロー 19436: XEiJ.regRn[8] = a; //a0 19437: XEiJ.regCCR = XEiJ.REG_CCR_V | XEiJ.REG_CCR_C; 19438: return; 19439: } 19440: x = x << 1 | c & 1; 19441: } 19442: XEiJ.regRn[0] = x; //d0 19443: XEiJ.regRn[8] = a; //a0 19444: XEiJ.regCCR = 0; 19445: } //fpkSTOB() 19446: 19447: //fpkBTOS () 19448: // $FE17 __BTOS 19449: // 32bit符号なし整数を2進数の文字列に変換する 19450: // /^1[01]*$/ 19451: // <d0.l:32bit符号なし整数 19452: // <a0.l:文字列バッファの先頭 19453: // >a0.l:2進数の文字列の直後('\0'の位置) 19454: public static void fpkBTOS () throws M68kException { 19455: int x = XEiJ.regRn[0]; //d0 19456: int a = XEiJ.regRn[8] += Math.max (1, 32 - Integer.numberOfLeadingZeros (x)); //a0 19457: mmuWriteByteData (a, 0, 1); 19458: do { 19459: mmuWriteByteData (--a, '0' | x & 1, 1); 19460: } while ((x >>>= 1) != 0); 19461: } //fpkBTOS() 19462: 19463: //fpkIUSING () 19464: // $FE18 __IUSING 19465: // 32bit符号あり整数を文字数を指定して右詰めで10進数の文字列に変換する 19466: // /^ *-?[1-9][0-9]*$/ 19467: // <d0.l:32bit符号あり整数 19468: // <d1.b:文字数 19469: // <a0.l:文字列バッファの先頭 19470: // >a0.l:10進数の文字列の直後('\0'の位置) 19471: public static void fpkIUSING () throws M68kException { 19472: int x = XEiJ.regRn[0]; //d0 19473: int n = 0; //符号の文字数 19474: if (x < 0) { //負 19475: n = 1; 19476: x = -x; 19477: } 19478: long t = XEiJ.fmtBcd12 (0xffffffffL & x); //符号は取り除いてあるがx=0x80000000の場合があるので(long)xは不可 19479: int l = n + Math.max (1, 67 - Long.numberOfLeadingZeros (t) >> 2); //符号を含めた文字数 19480: int a = XEiJ.regRn[8]; //a0 19481: for (int i = (XEiJ.regRn[1] & 255) - l; i > 0; i--) { 19482: mmuWriteByteData (a++, ' ', 1); 19483: } 19484: XEiJ.regRn[8] = a += l; //a0 19485: mmuWriteByteData (a, 0, 1); 19486: do { 19487: mmuWriteByteData (--a, '0' | (int) t & 15, 1); 19488: } while ((t >>>= 4) != 0L); 19489: if (n != 0) { 19490: mmuWriteByteData (--a, '-', 1); 19491: } 19492: } //fpkIUSING() 19493: 19494: //fpkVAL () 19495: // $FE20 __VAL 19496: // 文字列を64bit浮動小数点数に変換する 19497: // 先頭の'\t'と' 'を読み飛ばす 19498: // "&B"または"&b"で始まっているときは続きを2進数とみなして__STOBで32bit符号なし整数に変換してから__LTODで64bit浮動小数点数に変換する 19499: // "&O"または"&o"で始まっているときは続きを8進数とみなして__STOOで32bit符号なし整数に変換してから__LTODで64bit浮動小数点数に変換する 19500: // "&H"または"&h"で始まっているときは続きを16進数とみなして__STOHで32bit符号なし整数に変換してから__LTODで64bit浮動小数点数に変換する 19501: // それ以外は__STODと同じ 19502: // <a0.l:文字列の先頭 19503: // >d0d1.d:64bit浮動小数点数 19504: // >d2.l:(先頭が'&'でないとき)65535=64bit浮動小数点数をオーバーフローなしでintに変換できる,0=それ以外 19505: // >d3.l:(先頭が'&'でないとき)d2.l==65535のとき64bit浮動小数点数をintに変換した値 19506: // >a0.l:変換された文字列の直後('\0'とは限らない) 19507: // >ccr:0=エラーなし,CCR_N|CCR_C=文法エラー,CCR_V|CCR_C=オーバーフロー 19508: public static void fpkVAL () throws M68kException { 19509: int a = XEiJ.regRn[8]; //a0 19510: //先頭の空白を読み飛ばす 19511: int c = mmuReadByteSignData (a++, 1); 19512: while (c == ' ' || c == '\t') { 19513: c = mmuReadByteSignData (a++, 1); 19514: } 19515: if (c == '&') { //&B,&O,&H 19516: c = mmuReadByteSignData (a++, 1) & 0xdf; 19517: XEiJ.regRn[8] = a; //&?の直後 19518: if (c == 'B') { 19519: fpkSTOB (); 19520: FEFunction.fpkLTOD (); 19521: } else if (c == 'O') { 19522: fpkSTOO (); 19523: FEFunction.fpkLTOD (); 19524: } else if (c == 'H') { 19525: fpkSTOH (); 19526: FEFunction.fpkLTOD (); 19527: } else { 19528: XEiJ.regCCR = XEiJ.REG_CCR_N | XEiJ.REG_CCR_C; //文法エラー 19529: } 19530: } else { //&B,&O,&H以外 19531: fpkSTOD (); 19532: } 19533: } //fpkVAL() 19534: 19535: //fpkUSING () 19536: // $FE21 __USING 19537: // 64bit浮動小数点数をアトリビュートを指定して文字列に変換する 19538: // メモ 19539: // bit1の'\\'とbit4の'+'を両方指定したときは'\\'が右側。先頭に"+\\"を付ける 19540: // bit1の'\\'とbit2の','とbit4の'+'は整数部の桁数が足りないとき数字を右にずらして押し込まれる 19541: // bit3で指数形式を指示しなければ指数部が極端に大きくても極端に小さくても指数形式にならない 19542: // bit3で指数形式を指定したときbit1の'\\'とbit2の','は無効 19543: // bit4とbit5とbit6はbit4>bit5>bit6の順位で1つだけ有効 19544: // 有効数字は14桁で15桁目以降はすべて0 19545: // FLOAT2.Xは整数部の0でない最初の数字から256文字目までで打ち切られてしまう 19546: // 整数部の桁数に余裕があれば左側の空白は出力されるので文字列の全体が常に256バイトに収まるわけではない 19547: // using 1234.5 5 0 0 " 1235." 19548: // using 1234.5 5 1 0 " 1234.5" 19549: // using 1234.5 5 2 0 " 1234.50" 19550: // using 1234.5 6 2 1 "**1234.50" 19551: // using 1234.5 6 2 2 " \\1234.50" 19552: // using 1234.5 6 2 3 "*\\1234.50" 19553: // using 1234.5 6 2 4 " 1,234.50" 19554: // using 1234.5 4 2 4 "1,234.50" 19555: // using 1234.5 4 2 5 "1,234.50" 19556: // using 1234.5 4 2 6 "\\1,234.50" 19557: // using 1234.5 4 2 7 "\\1,234.50" 19558: // using 1234.5 4 2 16 "+1234.50" 19559: // using 1234.5 4 2 22 "+\\1,234.50" 19560: // using 1234.5 4 2 32 "1234.50+" 19561: // using 1234.5 4 2 48 "+1234.50" 19562: // using 1234.5 4 2 64 "1234.50 " 19563: // using 1234.5 4 2 80 "+1234.50" 19564: // using 1234.5 4 2 96 "1234.50+" 19565: // using 12345678901234567890 10 1 0 "12345678901235000000.0" 19566: // using 12345678901234567890e+10 10 1 0 "123456789012350000000000000000.0" 19567: // using 0.3333 0 0 0 "." 19568: // using 0.6666 0 0 0 "1." 19569: // using 0.6666 0 3 0 ".667" 19570: // using 0.6666 3 0 0 " 1." 19571: // using 0.3333 0 0 2 "\\." 19572: // using 0.3333 0 0 16 "+." 19573: // using 0.3333 0 0 18 "+\\." 19574: // using 1e-10 3 3 0 " 0.000" 19575: // 指数形式の出力は不可解で本来の動作ではないように思えるが、 19576: // X-BASICのprint using命令が使っているのでFLOAT2.Xに合わせておいた方がよさそう 19577: // print using "###.##";1.23 " 1.23" 整数部の桁数は3 19578: // print using "+##.##";1.23 " +1.23" 整数部の桁数は3← 19579: // print using "###.##^^^^^";1.23 " 12.30E-001" 整数部の桁数は3 19580: // print using "+##.##^^^^^";1.23 "+12.30E-001" 整数部の桁数は2← 19581: // FLOAT2.Xでは#NANと#INFは4桁の整数のように出力される。末尾に小数点が付くが小数部には何も出力されない 19582: // using -#INF 7 3 23 "*-\\#,INF." 19583: // FLOAT2.Xで#NANと#INFを指数形式にするとさらに不可解。これはバグと言ってよいと思う 19584: // using #INF 10 10 8 " #INFE-005" 19585: // ここでは#NANと#INFは整数部と小数点と小数部と指数部の全体を使って右寄せにする 19586: // <d0d1.d:64bit浮動小数点数 19587: // <d2.l:整数部の桁数 19588: // <d3.l:小数部の桁数 19589: // <d4.l:アトリビュート 19590: // bit0 左側を'*'で埋める 19591: // bit1 先頭に'\\'を付ける 19592: // bit2 整数部を3桁毎に','で区切る 19593: // bit3 指数形式 19594: // bit4 先頭に符号('+'または'-')を付ける 19595: // bit5 末尾に符号('+'または'-')を付ける 19596: // bit6 末尾に符号(' 'または'-')を付ける 19597: // <a0.l:文字列バッファの先頭 19598: // a0は変化しない 19599: public static void fpkUSING () throws M68kException { 19600: fpkUSINGSub ((long) XEiJ.regRn[0] << 32 | 0xffffffffL & XEiJ.regRn[1]); //64bit浮動小数点数 19601: } //fpkUSING() 19602: public static void fpkUSINGSub (long l) throws M68kException { 19603: int len1 = Math.max (0, XEiJ.regRn[2]); //整数部の桁数 19604: int len2 = Math.max (0, XEiJ.regRn[3]); //小数部の桁数 19605: int attr = XEiJ.regRn[4]; //アトリビュート 19606: int a = XEiJ.regRn[8]; //文字列バッファの先頭 19607: boolean exp = (attr & 8) != 0; //true=指数形式 19608: int spc = (attr & 1) != 0 ? '*' : ' '; //先頭の空白を充填する文字 19609: int yen = (attr & 2) != 0 ? '\\' : 0; //先頭の'\\' 19610: int cmm = !exp && (attr & 4) != 0 ? ',' : 0; //3桁毎に入れる',' 19611: //符号 19612: int sgn1 = 0; //先頭の符号 19613: int sgn2 = 0; //末尾の符号 19614: if (l < 0L) { //負 19615: if ((attr & 32 + 64) == 0) { //末尾に符号を付けない 19616: sgn1 = '-'; //先頭の符号 19617: } else { //末尾に符号を付ける 19618: sgn2 = '-'; //末尾の符号 19619: } 19620: l &= 0x7fffffffffffffffL; //符号bitを消しておく 19621: } else { //正 19622: if ((attr & 16) != 0) { //先頭に符号('+'または'-')を付ける 19623: sgn1 = '+'; 19624: } else if ((attr & 16 + 32) == 32) { //末尾に符号('+'または'-')を付ける 19625: sgn2 = '+'; 19626: } else if ((attr & 16 + 32 + 64) == 64) { //末尾に符号(' 'または'-')を付ける 19627: sgn2 = ' '; 19628: } 19629: } 19630: double x = Double.longBitsToDouble (l); //絶対値 19631: int e = (int) (l >>> 52) - 1023; //指数部。ゲタ0。符号bitは消してあるのでマスクは不要 19632: l &= 0x000fffffffffffffL; //仮数部の小数部。正規化数のとき整数部の1が付いていないことに注意 19633: //±0,±Inf,NaN 19634: if (e == -1023) { //±0,非正規化数 19635: if (l == 0L) { //±0 19636: for (int i = len1 - ((sgn1 != 0 ? 1 : 0) + //先頭の符号 19637: (yen != 0 ? 1 : 0) + //'\\' 19638: 1 //数字 19639: ); 0 < i; i--) { 19640: mmuWriteByteData (a++, spc, 1); //空白 19641: } 19642: if (sgn1 != 0) { 19643: mmuWriteByteData (a++, sgn1, 1); //先頭の符号 19644: } 19645: if (yen != 0) { 19646: mmuWriteByteData (a++, yen, 1); //'\\' 19647: } 19648: if (0 < len1) { 19649: mmuWriteByteData (a++, '0', 1); //整数部 19650: } 19651: mmuWriteByteData (a++, '.', 1); //小数点 19652: for (; 0 < len2; len2--) { 19653: mmuWriteByteData (a++, '0', 1); //小数部 19654: } 19655: mmuWriteByteData (a, '\0', 1); 19656: return; 19657: } 19658: e -= Long.numberOfLeadingZeros (l) - 12; //非正規化数の指数部を補正する 19659: } else if (e == 1024) { //±Inf,NaN 19660: for (int i = len1 + 1 + len2 + (exp ? 5 : 0) - //整数部と小数点と小数部と指数部の全体を使って右寄せにする 19661: ((sgn1 != 0 ? 1 : 0) + //先頭の符号 19662: (yen != 0 ? 1 : 0) + //'\\' 19663: 4 //文字 19664: ); 0 < i; i--) { 19665: mmuWriteByteData (a++, spc, 1); //空白 19666: } 19667: if (sgn1 != 0) { 19668: mmuWriteByteData (a++, sgn1, 1); //先頭の符号 19669: } 19670: if (yen != 0) { 19671: mmuWriteByteData (a++, yen, 1); //'\\' 19672: } 19673: mmuWriteByteData (a++, '#', 1); 19674: if (l == 0L) { //±Inf 19675: mmuWriteByteData (a++, 'I', 1); 19676: mmuWriteByteData (a++, 'N', 1); 19677: mmuWriteByteData (a++, 'F', 1); 19678: } else { //NaN 19679: mmuWriteByteData (a++, 'N', 1); 19680: mmuWriteByteData (a++, 'A', 1); 19681: mmuWriteByteData (a++, 'N', 1); 19682: } 19683: mmuWriteByteData (a, '\0', 1); 19684: return; 19685: } 19686: //10進数で表現したときの指数部を求める 19687: // 10^e<=x<10^(e+1)となるeを求める 19688: e = (int) Math.floor ((double) e * 0.30102999566398119521373889472); //log10(2) 19689: //10^-eを掛けて1<=x<10にする 19690: // 非正規化数の最小値から正規化数の最大値まで処理できなければならない 19691: // 10^-eを計算してからまとめて掛ける方法はxが非正規化数のとき10^-eがオーバーフローしてしまうので不可 19692: // doubleは非正規化数の逆数を表現できない 19693: if (0 < e) { //10<=x 19694: x *= FEFunction.FPK_TEN_M16QR[e & 15]; 19695: if (16 <= e) { 19696: x *= FEFunction.FPK_TEN_M16QR[16 + (e >> 4 & 15)]; 19697: if (256 <= e) { 19698: x *= FEFunction.FPK_TEN_M16QR[33]; //FEFunction.FPK_TEN_M16QR[32 + (e >> 8)] 19699: } 19700: } 19701: } else if (e < 0) { //x<1 19702: x *= FEFunction.FPK_TEN_P16QR[-e & 15]; 19703: if (e <= -16) { 19704: x *= FEFunction.FPK_TEN_P16QR[16 + (-e >> 4 & 15)]; 19705: if (e <= -256) { 19706: x *= FEFunction.FPK_TEN_P16QR[33]; //FEFunction.FPK_TEN_P16QR[32 + (-e >> 8)] 19707: } 19708: } 19709: } 19710: //整数部2桁、小数部16桁の10進数に変換する 19711: // 1<=x<10なのでw[1]が先頭になるはずだが誤差で前後にずれる可能性がある 19712: int[] w = new int[18]; 19713: { 19714: int d = (int) x; 19715: int t = XEiJ.FMT_BCD4[d]; 19716: w[0] = t >> 4; 19717: w[1] = t & 15; 19718: for (int i = 2; i < 18; i += 4) { 19719: //xを10000倍して整数部dを引くことで小数部を残すが、このとき情報落ちが発生して誤差が蓄積する 19720: //Double-Doubleの乗算の要領で10000倍を正確に行い、誤差の蓄積を回避する 19721: //x = (x - (double) d) * 10000.0; 19722: double xh = x * 0x8000001p0; 19723: xh += x - xh; //xの上半分 19724: x = (xh - (double) d) * 10000.0 + (x - xh) * 10000.0; 19725: d = (int) x; 19726: t = XEiJ.FMT_BCD4[d]; 19727: w[i ] = t >> 12; 19728: w[i + 1] = t >> 8 & 15; 19729: w[i + 2] = t >> 4 & 15; 19730: w[i + 3] = t & 15; 19731: } 19732: } 19733: //先頭の位置を確認する 19734: // w[h]が先頭(0でない最初の数字)の位置 19735: int h = w[0] != 0 ? 0 : w[1] != 0 ? 1 : 2; 19736: //14+1桁目を四捨五入する 19737: int o = h + 14; //w[o]は四捨五入する桁の位置。w[]の範囲内 19738: if (5 <= w[o]) { 19739: int i = o; 19740: while (10 <= ++w[--i]) { 19741: w[i] = 0; 19742: } 19743: if (i < h) { //先頭から繰り上がった。このとき新しい先頭は1でそれ以外はすべて0 19744: h--; //先頭を左にずらす 19745: o--; //末尾を左にずらす 19746: } 19747: } 19748: //先頭の位置に応じて指数部を更新する 19749: // w[h]が整数部、w[h+1..13]が小数部。10^eの小数点はw[h]の右側。整数部の桁数はe+1桁 19750: e -= h - 1; 19751: //整数部の桁数を調節する 19752: int ee = !exp ? e : Math.max (0, sgn1 != 0 || sgn2 != 0 ? len1 : len1 - 1) - 1; //整数部の桁数-1。整数部の桁数はee+1桁。指数部はe-ee 19753: //小数点以下len2+1桁目が先頭から14+1桁目よりも左側にあるときその桁で改めて四捨五入する 19754: // あらかじめ14+1桁目で四捨五入しておかないと、 19755: // 1.5の5を四捨五入しなければならないときに誤差で1.499…になったまま4を四捨五入しようとして失敗することがある 19756: int s = h + ee + 1 + len2; //w[s]は小数点以下len2+1桁目の位置。w.length<=sの場合があることに注意 19757: if (s < o) { 19758: o = s; //w[o]は四捨五入する桁の位置。o<0の場合があることに注意 19759: if (0 <= o && 5 <= w[o]) { 19760: int i = o; 19761: while (10 <= ++w[--i]) { 19762: w[i] = 0; 19763: } 19764: if (i < h) { //先頭から繰り上がった。このとき新しい先頭は1でそれ以外はすべて0 19765: h--; //先頭を左にずらす 19766: if (!exp) { //指数形式でないとき 19767: ee++; //左に1桁伸ばす。全体の桁数が1桁増える 19768: } else { //指数形式のとき 19769: e++; //指数部を1増やす 19770: o--; //末尾を左にずらす。全体の桁数は変わらない 19771: } 19772: } 19773: } 19774: } 19775: //文字列に変換する 19776: if (0 <= ee) { //1<=x 19777: for (int i = len1 - ((sgn1 != 0 ? 1 : 0) + //先頭の符号 19778: (yen != 0 ? 1 : 0) + //'\\' 19779: (cmm != 0 ? ee / 3 : 0) + //',' 19780: ee + 1 //数字 19781: ); 0 < i; i--) { 19782: mmuWriteByteData (a++, spc, 1); //空白 19783: } 19784: if (sgn1 != 0) { 19785: mmuWriteByteData (a++, sgn1, 1); //先頭の符号 19786: } 19787: if (yen != 0) { 19788: mmuWriteByteData (a++, yen, 1); //'\\' 19789: } 19790: for (int i = ee; 0 <= i; i--) { 19791: mmuWriteByteData (a++, h < o ? '0' + w[h] : '0', 1); //整数部 19792: h++; 19793: if (cmm != 0 && 0 < i && i % 3 == 0) { 19794: mmuWriteByteData (a++, cmm, 1); //',' 19795: } 19796: } 19797: mmuWriteByteData (a++, '.', 1); //小数点 19798: for (; 0 < len2; len2--) { 19799: mmuWriteByteData (a++, h < o ? '0' + w[h] : '0', 1); //小数部 19800: h++; 19801: } 19802: } else { //x<1 19803: for (int i = len1 - ((sgn1 != 0 ? 1 : 0) + //先頭の符号 19804: (yen != 0 ? 1 : 0) + //'\\' 19805: 1 //数字 19806: ); 0 < i; i--) { 19807: mmuWriteByteData (a++, spc, 1); //空白 19808: } 19809: if (sgn1 != 0) { 19810: mmuWriteByteData (a++, sgn1, 1); //先頭の符号 19811: } 19812: if (yen != 0) { 19813: mmuWriteByteData (a++, yen, 1); //'\\' 19814: } 19815: if (0 < len1) { 19816: mmuWriteByteData (a++, '0', 1); //整数部 19817: } 19818: mmuWriteByteData (a++, '.', 1); //小数点 19819: for (int i = -1 - ee; 0 < len2 && 0 < i; len2--, i--) { 19820: mmuWriteByteData (a++, '0', 1); //小数部の先頭の0の並び 19821: } 19822: for (; 0 < len2; len2--) { 19823: mmuWriteByteData (a++, h < o ? '0' + w[h] : '0', 1); //小数部 19824: h++; 19825: } 19826: } 19827: if (exp) { 19828: e -= ee; 19829: mmuWriteByteData (a++, 'E', 1); //指数部の始まり 19830: if (0 <= e) { 19831: mmuWriteByteData (a++, '+', 1); //指数部の正符号。省略しない 19832: } else { 19833: mmuWriteByteData (a++, '-', 1); //指数部の負符号 19834: e = -e; 19835: } 19836: e = XEiJ.FMT_BCD4[e]; 19837: mmuWriteByteData (a++, '0' + (e >> 8 ), 1); //指数部の100の位。0でも省略しない 19838: mmuWriteByteData (a++, '0' + (e >> 4 & 15), 1); //指数部の10の位 19839: mmuWriteByteData (a++, '0' + (e & 15), 1); //指数部の1の位 19840: } 19841: if (sgn2 != 0) { 19842: mmuWriteByteData (a++, sgn2, 1); //末尾の符号 19843: } 19844: mmuWriteByteData (a, '\0', 1); 19845: } //fpkUSINGSub6(long) 19846: 19847: //fpkSTOD () 19848: // $FE22 __STOD 19849: // 文字列を64bit浮動小数点数に変換する 19850: // 先頭の'\t'と' 'を読み飛ばす 19851: // "#INF"は無限大、"#NAN"は非数とみなす 19852: // バグ 19853: // FLOAT2.X 2.02/2.03は誤差が大きい 19854: // "1.7976931348623E+308"=0x7fefffffffffffb0が0x7fefffffffffffb3になる 19855: // "1.5707963267949"=0x3ff921fb54442d28が0x3ff921fb54442d26になる 19856: // "4.9406564584125E-324"(非正規化数の最小値よりもわずかに大きい)がエラーになる 19857: // FLOAT2.X 2.02/2.03は"-0"が+0になる 19858: // FLOAT4.X 1.02は"-0"が+0になる(実機で確認済み) 19859: // FLOAT2.X 2.02/2.03は"-#INF"が+Infになる 19860: // print val("-#INF")で再現できる 19861: // '-'を符号として解釈しておきながら結果の無限大に符号を付けるのを忘れている 19862: // FLOAT2.X 2.02/2.03は".#INF"が+Infになる 19863: // print val(".#INF")で再現できる 19864: // FLOAT4.X 1.02は"#NAN","#INF","-#INF"を読み取ったときa0が文字列の直後ではなく最後の文字を指している 19865: // <a0.l:文字列の先頭 19866: // >d0d1.d:64bit浮動小数点数 19867: // >d2.l:65535=64bit浮動小数点数をオーバーフローなしでintに変換できる,0=それ以外 19868: // >d3.l:d2.l==65535のとき64bit浮動小数点数をintに変換した値 19869: // >a0.l:変換された文字列の直後('\0'とは限らない) 19870: // >ccr:0=エラーなし,CCR_N|CCR_C=文法エラー,CCR_V|CCR_C=オーバーフロー 19871: public static void fpkSTOD () throws M68kException { 19872: long l = Double.doubleToLongBits (fpkSTODSub ()); 19873: if (FEFunction.FPK_FPCP_NAN && l == 0x7ff8000000000000L) { 19874: l = 0x7fffffffffffffffL; 19875: } 19876: XEiJ.regRn[0] = (int) (l >> 32); //d0 19877: XEiJ.regRn[1] = (int) l; //d1 19878: } //fpkSTOD() 19879: public static double fpkSTODSub () throws M68kException { 19880: int a = XEiJ.regRn[8]; //a0 19881: //先頭の空白を読み飛ばす 19882: int c = mmuReadByteSignData (a, 1); 19883: while (c == ' ' || c == '\t') { 19884: c = mmuReadByteSignData (++a, 1); 19885: } 19886: //符号を読み取る 19887: double s = 1.0; //仮数部の符号 19888: if (c == '+') { 19889: c = mmuReadByteSignData (++a, 1); 19890: } else if (c == '-') { 19891: s = -s; 19892: c = mmuReadByteSignData (++a, 1); 19893: } 19894: //#NANと#INFを処理する 19895: if (c == '#') { 19896: c = mmuReadByteSignData (a + 1, 1); 19897: if (c == 'N' || c == 'I') { //小文字は不可 19898: c = c << 8 | mmuReadByteZeroData (a + 2, 1); 19899: if (c == ('N' << 8 | 'A') || c == ('I' << 8 | 'N')) { 19900: c = c << 8 | mmuReadByteZeroData (a + 3, 1); 19901: if (c == ('N' << 16 | 'A' << 8 | 'N') || c == ('I' << 16 | 'N' << 8 | 'F')) { 19902: XEiJ.regRn[2] = 0; //d2 19903: XEiJ.regRn[3] = 0; //d3 19904: XEiJ.regRn[8] = a + 4; //a0。"#NAN"または"#INF"のときだけ直後まで進める。それ以外は'#'の位置で止める 19905: XEiJ.regCCR = 0; //エラーなし。"#INF"はオーバーフローとみなされない 19906: return c == ('N' << 16 | 'A' << 8 | 'N') ? Double.NaN : s * Double.POSITIVE_INFINITY; 19907: } 19908: } 19909: } 19910: XEiJ.regRn[8] = a; //a0。'#'の位置で止める 19911: XEiJ.regCCR = XEiJ.REG_CCR_N | XEiJ.REG_CCR_C; //文法エラー 19912: return 0.0; 19913: } //if c=='#' 19914: //仮数部を読み取る 19915: // 数字を1000個並べてからe-1000などと書いてあるとき途中でオーバーフローすると困るので、 19916: // 多すぎる数字の並びは先頭の有効数字だけ読み取って残りは桁数だけ数えて読み飛ばす 19917: long u = 0L; //仮数部 19918: int n = 0; //0以外の最初の数字から数えて何桁目か 19919: int e = 1; //-小数部の桁数。1=整数部 19920: if (c == '.') { //仮数部の先頭が小数点 19921: e = 0; //小数部開始 19922: c = mmuReadByteSignData (++a, 1); 19923: } 19924: if (c < '0' || '9' < c) { //仮数部に数字がない 19925: XEiJ.regRn[8] = a; //a0 19926: XEiJ.regCCR = XEiJ.REG_CCR_N | XEiJ.REG_CCR_C; //文法エラー 19927: return 0.0; 19928: } 19929: double x = 0.0; 19930: do { 19931: if (0 < n || '0' < c) { //0以外 19932: n++; //0以外の最初の数字から数えて何桁目か 19933: } 19934: if (e <= 0 && n <= 18) { //小数部で18桁目まで 19935: e--; //-小数部の桁数 19936: } 19937: if (0 < n && n <= 18) { //1桁目から18桁目まで 19938: u = u * 10L + (long) (c - '0'); 19939: } 19940: c = mmuReadByteSignData (++a, 1); 19941: if (0 < e && c == '.') { //整数部で小数点が出てきた 19942: e = 0; //小数部開始 19943: c = mmuReadByteSignData (++a, 1); 19944: } 19945: } while ('0' <= c && c <= '9'); 19946: if (0 < e) { //小数点が出てこなかった 19947: e = 18 < n ? n - 18 : 0; //整数部を読み飛ばした桁数が(-小数部の桁数) 19948: } 19949: // 1<=u<10^18 整数なので誤差はない 19950: // 0<e 小数点がなくて整数部が19桁以上あって末尾を読み飛ばした 19951: // e==0 小数点がなくて整数部が18桁以内で末尾を読み飛ばさなかった 19952: // 小数点があって小数点で終わっていた 19953: // e<0 小数点があって小数部が1桁以上あった 19954: //指数部を読み取る 19955: if (c == 'E' || c == 'e') { 19956: c = mmuReadByteSignData (++a, 1); 19957: int t = 1; //指数部の符号 19958: if (c == '+') { 19959: c = mmuReadByteSignData (++a, 1); 19960: } else if (c == '-') { 19961: t = -t; 19962: c = mmuReadByteSignData (++a, 1); 19963: } 19964: if (c < '0' || '9' < c) { //指数部に数字がない 19965: XEiJ.regRn[8] = a; //a0 19966: XEiJ.regCCR = XEiJ.REG_CCR_N | XEiJ.REG_CCR_C; //文法エラー 19967: return 0.0; 19968: } 19969: while (c == '0') { //先頭の0を読み飛ばす 19970: c = mmuReadByteSignData (++a, 1); 19971: } 19972: int p = 0; 19973: for (int j = 0; '0' <= c && c <= '9' && j < 9; j++) { //0以外の数字が出てきてから最大で9桁目まで読み取る。Human68kの環境では数字を1GBも並べることはできないのでオーバーフローの判定には9桁あれば十分 19974: p = p * 10 + (c - '0'); 19975: c = mmuReadByteSignData (++a, 1); 19976: } 19977: e += t * p; 19978: } 19979: //符号と仮数部と指数部を合わせる 19980: // x=s*x*10^e 19981: // 1<=u<10^18なのでeが範囲を大きく外れている場合を先に除外する 19982: if (e < -350) { 19983: XEiJ.regRn[2] = 65535; //d2。-1ではない 19984: XEiJ.regRn[3] = 0; //d3 19985: XEiJ.regRn[8] = a; //a0 19986: XEiJ.regCCR = 0; //エラーなし。アンダーフローはエラーとみなされない 19987: return s < 0.0 ? -0.0 : 0.0; 19988: } 19989: if (350 < e) { 19990: XEiJ.regRn[2] = 0; //d2 19991: XEiJ.regRn[3] = 0; //d3 19992: XEiJ.regRn[8] = a; //a0 19993: XEiJ.regCCR = XEiJ.REG_CCR_V | XEiJ.REG_CCR_C; //オーバーフロー 19994: return s * Double.POSITIVE_INFINITY; 19995: } 19996: if (true) { 19997: QFP xx = new QFP (s < 0.0 ? -u : u); //符号と仮数部 19998: if (0 < e) { 19999: xx.mul (QFP.QFP_TEN_P16QR[e & 15]); 20000: if (16 <= e) { 20001: xx.mul (QFP.QFP_TEN_P16QR[16 + (e >> 4 & 15)]); 20002: if (256 <= e) { 20003: xx.mul (QFP.QFP_TEN_P16QR[33]); 20004: } 20005: } 20006: } else if (e < 0) { 20007: xx.mul (QFP.QFP_TEN_M16QR[-e & 15]); 20008: if (e <= -16) { 20009: xx.mul (QFP.QFP_TEN_M16QR[16 + (-e >> 4 & 15)]); 20010: if (e <= -256) { 20011: xx.mul (QFP.QFP_TEN_M16QR[33]); 20012: } 20013: } 20014: } 20015: x = xx.getd (); 20016: } else { 20017: x = s * (double) u; //符号と仮数部 20018: if (0 < e) { 20019: x *= FEFunction.FPK_TEN_P16QR[e & 15]; 20020: if (16 <= e) { 20021: x *= FEFunction.FPK_TEN_P16QR[16 + (e >> 4 & 15)]; 20022: if (256 <= e) { 20023: x *= FEFunction.FPK_TEN_P16QR[33]; //FEFunction.FPK_TEN_P16QR[32 + (e >> 8)] 20024: } 20025: } 20026: } else if (e < 0) { 20027: x /= FEFunction.FPK_TEN_P16QR[-e & 15]; 20028: if (e <= -16) { 20029: x /= FEFunction.FPK_TEN_P16QR[16 + (-e >> 4 & 15)]; 20030: if (e <= -256) { 20031: x /= FEFunction.FPK_TEN_P16QR[33]; //FEFunction.FPK_TEN_P16QR[32 + (-e >> 8)] 20032: } 20033: } 20034: } 20035: } 20036: if (Double.isInfinite (x)) { 20037: XEiJ.regRn[8] = a; //a0 20038: XEiJ.regCCR = XEiJ.REG_CCR_V | XEiJ.REG_CCR_C; //オーバーフロー 20039: return x; 20040: } 20041: // アンダーフローで0になっている場合がある 20042: if (x == (double) ((int) x)) { //intで表現できる。+0.0==-0.0==0なので±0.0を含む 20043: XEiJ.regRn[2] = 65535; //d2。-1ではない 20044: XEiJ.regRn[3] = (int) x; //d3 20045: } else { //intで表現できない 20046: XEiJ.regRn[2] = 0; //d2 20047: XEiJ.regRn[3] = 0; //d3 20048: } 20049: XEiJ.regRn[8] = a; //a0 20050: XEiJ.regCCR = 0; //エラーなし 20051: return x; 20052: } //fpkSTODSub() 20053: 20054: //fpkDTOS () 20055: // $FE23 __DTOS 20056: // 64bit浮動小数点数を文字列に変換する 20057: // 無限大は"#INF"、非数は"#NAN"になる 20058: // 指数形式の境目 20059: // x<10^-4または10^14<=xのとき指数形式にする 20060: // FLOAT2.X/FLOAT4.Xの場合 20061: // 3f2fffffffffff47 2.4414062499999E-004 20062: // 3f2fffffffffff48 0.000244140625 20063: // 42d6bcc41e8fffdf 99999999999999 20064: // 42d6bcc41e8fffe0 1E+014 20065: // <d0d1.d:64bit浮動小数点数 20066: // <a0.l:文字列バッファの先頭 20067: // >a0.l:末尾の'\0'の位置 20068: public static void fpkDTOS () throws M68kException { 20069: fpkDTOSSub ((long) XEiJ.regRn[0] << 32 | 0xffffffffL & XEiJ.regRn[1]); //64bit浮動小数点数 20070: } //fpkDTOS() 20071: public static void fpkDTOSSub (long l) throws M68kException { 20072: final int len3 = 14; 20073: int a = XEiJ.regRn[8]; //文字列バッファの先頭 20074: //符号と指数部の処理 20075: // ±0,±Inf,NaNはここで除外する 20076: if (l < 0L) { 20077: mmuWriteByteData (a++, '-', 1); //負符号 20078: l &= 0x7fffffffffffffffL; //符号bitを消しておく 20079: } 20080: double x = Double.longBitsToDouble (l); //絶対値 20081: int e = (int) (l >>> 52) - 1023; //指数部。ゲタ0。符号bitは消してあるのでマスクは不要 20082: l &= 0x000fffffffffffffL; //仮数部の小数部。正規化数のとき整数部の1が付いていないことに注意 20083: if (e == -1023) { //±0,非正規化数 20084: if (l == 0L) { //±0 20085: mmuWriteByteData (a++, '0', 1); //0 20086: mmuWriteByteData (a, '\0', 1); 20087: XEiJ.regRn[8] = a; //末尾の'\0'の位置 20088: return; 20089: } 20090: e -= Long.numberOfLeadingZeros (l) - 12; //非正規化数の指数部を補正する 20091: } else if (e == 1024) { //±Inf,NaN 20092: mmuWriteByteData (a++, '#', 1); 20093: if (l == 0L) { //±Inf 20094: mmuWriteByteData (a++, 'I', 1); 20095: mmuWriteByteData (a++, 'N', 1); 20096: mmuWriteByteData (a++, 'F', 1); 20097: } else { //NaN 20098: mmuWriteByteData (a++, 'N', 1); 20099: mmuWriteByteData (a++, 'A', 1); 20100: mmuWriteByteData (a++, 'N', 1); 20101: } 20102: mmuWriteByteData (a, '\0', 1); 20103: XEiJ.regRn[8] = a; //末尾の'\0'の位置 20104: return; 20105: } 20106: //10進数で表現したときの指数部を求める 20107: // 10^e<=x<10^(e+1)となるeを求める 20108: e = (int) Math.floor ((double) e * 0.30102999566398119521373889472); //log10(2) 20109: //10^-eを掛けて1<=x<10にする 20110: // 非正規化数の最小値から正規化数の最大値まで処理できなければならない 20111: // 10^-eを計算してからまとめて掛ける方法はxが非正規化数のとき10^-eがオーバーフローしてしまうので不可 20112: // doubleは非正規化数の逆数を表現できない 20113: if (0 < e) { //10<=x 20114: x *= FEFunction.FPK_TEN_M16QR[e & 15]; 20115: if (16 <= e) { 20116: x *= FEFunction.FPK_TEN_M16QR[16 + (e >> 4 & 15)]; 20117: if (256 <= e) { 20118: x *= FEFunction.FPK_TEN_M16QR[33]; //FEFunction.FPK_TEN_M16QR[32 + (e >> 8)] 20119: } 20120: } 20121: } else if (e < 0) { //x<1 20122: x *= FEFunction.FPK_TEN_P16QR[-e & 15]; 20123: if (e <= -16) { 20124: x *= FEFunction.FPK_TEN_P16QR[16 + (-e >> 4 & 15)]; 20125: if (e <= -256) { 20126: x *= FEFunction.FPK_TEN_P16QR[33]; //FEFunction.FPK_TEN_P16QR[32 + (-e >> 8)] 20127: } 20128: } 20129: } 20130: //整数部2桁、小数部16桁の10進数に変換する 20131: // 1<=x<10なのでw[1]が先頭になるはずだが誤差で前後にずれる可能性がある 20132: int[] w = new int[18]; 20133: { 20134: int d = (int) x; 20135: int t = XEiJ.FMT_BCD4[d]; 20136: w[0] = t >> 4; 20137: w[1] = t & 15; 20138: for (int i = 2; i < 18; i += 4) { 20139: //xを10000倍して整数部dを引くことで小数部を残すが、このとき情報落ちが発生して誤差が蓄積する 20140: //Double-Doubleの乗算の要領で10000倍を正確に行い、誤差の蓄積を回避する 20141: //x = (x - (double) d) * 10000.0; 20142: double xh = x * 0x8000001p0; 20143: xh += x - xh; //xの上半分 20144: x = (xh - (double) d) * 10000.0 + (x - xh) * 10000.0; 20145: d = (int) x; 20146: t = XEiJ.FMT_BCD4[d]; 20147: w[i ] = t >> 12; 20148: w[i + 1] = t >> 8 & 15; 20149: w[i + 2] = t >> 4 & 15; 20150: w[i + 3] = t & 15; 20151: } 20152: } 20153: //先頭の位置を確認する 20154: // w[h]が先頭(0でない最初の数字)の位置 20155: int h = w[0] != 0 ? 0 : w[1] != 0 ? 1 : 2; 20156: //14+1桁目を四捨五入する 20157: int o = h + 14; //w[o]は四捨五入する桁の位置。w[]の範囲内 20158: if (5 <= w[o]) { 20159: int i = o; 20160: while (10 <= ++w[--i]) { 20161: w[i] = 0; 20162: } 20163: if (i < h) { //先頭から繰り上がった。このとき新しい先頭は1でそれ以外はすべて0 20164: h--; //先頭を左にずらす 20165: o--; //末尾を左にずらす 20166: } 20167: } 20168: //先頭の位置に応じて指数部を更新する 20169: // w[h]が整数部、w[h+1..o-1]が小数部。10^eの小数点はw[h]の右側。整数部の桁数はe+1桁 20170: e -= h - 1; 20171: //末尾の位置を確認する 20172: // w[o-1]が末尾(0でない最後の数字)の位置 20173: while (w[o - 1] == 0) { //全体は0ではないので必ず止まる。小数点よりも左側で止まる場合があることに注意 20174: o--; 20175: } 20176: //指数形式にするかどうか選択して文字列に変換する 20177: if (0 <= e && e < len3) { //1<=x<10^len3。指数形式にしない 20178: do { 20179: mmuWriteByteData (a++, '0' + w[h++], 1); //整数部。末尾の位置に関係なく1の位まで書く 20180: } while (0 <= --e); 20181: if (h < o) { //小数部がある 20182: mmuWriteByteData (a++, '.', 1); //小数部があるときだけ小数点を書く 20183: do { 20184: mmuWriteByteData (a++, '0' + w[h++], 1); //小数部 20185: } while (h < o); 20186: } 20187: } else if (-4 <= e && e < 0) { //10^-4<=x<1。指数形式にしない 20188: mmuWriteByteData (a++, '0', 1); //整数部の0 20189: mmuWriteByteData (a++, '.', 1); //小数点 20190: while (++e < 0) { 20191: mmuWriteByteData (a++, '0', 1); //小数部の先頭の0の並び 20192: } 20193: do { 20194: mmuWriteByteData (a++, '0' + w[h++], 1); //小数部 20195: } while (h < o); 20196: } else { //x<10^-4または10^len3<=x。指数形式にする 20197: mmuWriteByteData (a++, '0' + w[h++], 1); //整数部 20198: if (h < o) { //小数部がある 20199: mmuWriteByteData (a++, '.', 1); //小数部があるときだけ小数点を書く 20200: do { 20201: mmuWriteByteData (a++, '0' + w[h++], 1); //小数部 20202: } while (h < o); 20203: } 20204: mmuWriteByteData (a++, 'E', 1); //指数部の始まり 20205: if (0 <= e) { 20206: mmuWriteByteData (a++, '+', 1); //指数部の正符号。省略しない 20207: } else { 20208: mmuWriteByteData (a++, '-', 1); //指数部の負符号 20209: e = -e; 20210: } 20211: e = XEiJ.FMT_BCD4[e]; 20212: mmuWriteByteData (a++, '0' + (e >> 8 ), 1); //指数部の100の位。0でも省略しない 20213: mmuWriteByteData (a++, '0' + (e >> 4 & 15), 1); //指数部の10の位 20214: mmuWriteByteData (a++, '0' + (e & 15), 1); //指数部の1の位 20215: } 20216: mmuWriteByteData (a, '\0', 1); 20217: XEiJ.regRn[8] = a; //末尾の'\0'の位置 20218: } //fpkDTOSSub6() 20219: 20220: //fpkECVT () 20221: // $FE24 __ECVT 20222: // 64bit浮動小数点数を全体の桁数を指定して文字列に変換する 20223: // 文字列に書くのは仮数部の数字のみ 20224: // 符号と小数点と指数部は文字列に書かず、小数点の位置と符号をレジスタに入れて返す 20225: // 桁数は255桁まで指定できるが、有効桁数は14桁まで 20226: // 有効桁数の次の桁で絶対値を四捨五入する 20227: // 15桁以上を指定しても14桁に丸められ、15桁目以降はすべて'0'になる 20228: // 無限大は"#INF"、非数は"#NAN"に変換する 20229: // "#INF"と"#NAN"のとき小数点の位置は4になる 20230: // "#INF"と"#NAN"で3桁以下のときは途中で打ち切る 20231: // メモ 20232: // FLOATn.Xは"#INF"と"#NAN"で1桁～3桁のとき文字列が"$","$0","$00"になってしまう 20233: // 文字数が少なすぎて"#INF"や"#NAN"が入り切らないのは仕方がないが、 20234: // 無意味な"$00"という文字列になるのは数字ではない文字列を四捨五入しようとするバグが原因 20235: // 例えば3桁のときは4桁目の'F'または'N'が'5'以上なので繰り上げて上の位をインクリメントする 20236: // 'N'+1='O'または'A'+1='B'が'9'よりも大きいので'0'を上書きして繰り上げて上の位をインクリメントする 20237: // 'I'+1='J'または'N'+1='O'も'9'よりも大きいので'0'を上書きして繰り上げて上の位をインクリメントする 20238: // '#'+1='$'は'9'以下なので"$00"になる 20239: // X-BASICでint i2,i3:print ecvt(val("#INF"),3,i2,i3)とすると再現できる 20240: // "#INF"と"#NAN"で5桁以上のときは5桁目以降はすべて'\0'になる 20241: // メモ 20242: // FLOATn.Xは"#NAN"と"#INF"で15桁以上のとき5桁目から14桁目までは'\0'だが15桁目以降に'0'が書き込まれる 20243: // 通常は5桁目の'\0'で文字列は終了していると見なされるので実害はないが気持ち悪い 20244: // メモ 20245: // FLOAT2.X 2.02/2.03は0のとき小数点の位置が0になる 20246: // FLOAT4.X 1.02は0のとき小数点の位置が1になる 20247: // ここでは1にしている 20248: // <d0d1.d:64bit浮動小数点数 20249: // <d2.l:全体の桁数 20250: // <a0.l:文字列バッファの先頭。末尾に'\0'を書き込むので桁数+1バイト必要 20251: // >d0.l:先頭から小数点の位置までのオフセット 20252: // >d1.l:符号(0=+,1=-) 20253: // a0.lは変化しない 20254: public static void fpkECVT () throws M68kException { 20255: fpkECVTSub ((long) XEiJ.regRn[0] << 32 | 0xffffffffL & XEiJ.regRn[1]); //64bit浮動小数点数 20256: } //fpkECVT() 20257: public static void fpkECVTSub (long l) throws M68kException { 20258: int len3 = Math.max (0, XEiJ.regRn[2]); //全体の桁数 20259: int a = XEiJ.regRn[8]; //文字列バッファの先頭 20260: int b = a + len3; //文字列バッファの末尾+1。'\0'を書き込む位置 20261: //符号と指数部の処理 20262: // ±0,±Inf,NaNはここで除外する 20263: if (0L <= l) { 20264: XEiJ.regRn[1] = 0; //正符号 20265: } else { 20266: XEiJ.regRn[1] = 1; //負符号 20267: l &= 0x7fffffffffffffffL; //符号bitを消しておく 20268: } 20269: double x = Double.longBitsToDouble (l); //絶対値 20270: int e = (int) (l >>> 52) - 1023; //指数部。ゲタ0。符号bitは消してあるのでマスクは不要 20271: l &= 0x000fffffffffffffL; //仮数部の小数部。正規化数のとき整数部の1が付いていないことに注意 20272: if (e == -1023) { //±0,非正規化数 20273: if (l == 0L) { //±0 20274: //指定された全体の桁数だけ'0'を並べる 20275: while (a < b) { 20276: mmuWriteByteData (a++, '0', 1); 20277: } 20278: mmuWriteByteData (a, '\0', 1); 20279: XEiJ.regRn[0] = 1; //小数点の位置 20280: return; 20281: } 20282: e -= Long.numberOfLeadingZeros (l) - 12; //非正規化数の指数部を補正する 20283: } else if (e == 1024) { //±Inf,NaN 20284: for (int s = l != 0L ? '#' | 'N' << 8 | 'A' << 16 | 'N' << 24 : '#' | 'I' << 8 | 'N' << 16 | 'F' << 24; a < b && s != 0; s >>>= 8) { 20285: mmuWriteByteData (a++, s, 1); 20286: } 20287: while (a < b) { 20288: mmuWriteByteData (a++, '\0', 1); //残りは'\0' 20289: } 20290: mmuWriteByteData (a, '\0', 1); 20291: XEiJ.regRn[0] = 4; //小数点の位置 20292: return; 20293: } 20294: //10進数で表現したときの指数部を求める 20295: // 10^e<=x<10^(e+1)となるeを求める 20296: e = (int) Math.floor ((double) e * 0.30102999566398119521373889472); //log10(2) 20297: //10^-eを掛けて1<=x<10にする 20298: // 非正規化数の最小値から正規化数の最大値まで処理できなければならない 20299: // 10^-eを計算してからまとめて掛ける方法はxが非正規化数のとき10^-eがオーバーフローしてしまうので不可 20300: // doubleは非正規化数の逆数を表現できない 20301: if (0 < e) { //10<=x 20302: x *= FEFunction.FPK_TEN_M16QR[e & 15]; 20303: if (16 <= e) { 20304: x *= FEFunction.FPK_TEN_M16QR[16 + (e >> 4 & 15)]; 20305: if (256 <= e) { 20306: x *= FEFunction.FPK_TEN_M16QR[33]; //FEFunction.FPK_TEN_M16QR[32 + (e >> 8)] 20307: } 20308: } 20309: } else if (e < 0) { //x<1 20310: x *= FEFunction.FPK_TEN_P16QR[-e & 15]; 20311: if (e <= -16) { 20312: x *= FEFunction.FPK_TEN_P16QR[16 + (-e >> 4 & 15)]; 20313: if (e <= -256) { 20314: x *= FEFunction.FPK_TEN_P16QR[33]; //FEFunction.FPK_TEN_P16QR[32 + (-e >> 8)] 20315: } 20316: } 20317: } 20318: //整数部2桁、小数部16桁の10進数に変換する 20319: // 1<=x<10なのでw[1]が先頭になるはずだが誤差で前後にずれる可能性がある 20320: int[] w = new int[18]; 20321: { 20322: int d = (int) x; 20323: int t = XEiJ.FMT_BCD4[d]; 20324: w[0] = t >> 4; 20325: w[1] = t & 15; 20326: for (int i = 2; i < 18; i += 4) { 20327: //xを10000倍して整数部dを引くことで小数部を残すが、このとき情報落ちが発生して誤差が蓄積する 20328: //Double-Doubleの乗算の要領で10000倍を正確に行い、誤差の蓄積を回避する 20329: //x = (x - (double) d) * 10000.0; 20330: double xh = x * 0x8000001p0; 20331: xh += x - xh; //xの上半分 20332: x = (xh - (double) d) * 10000.0 + (x - xh) * 10000.0; 20333: d = (int) x; 20334: t = XEiJ.FMT_BCD4[d]; 20335: w[i ] = t >> 12; 20336: w[i + 1] = t >> 8 & 15; 20337: w[i + 2] = t >> 4 & 15; 20338: w[i + 3] = t & 15; 20339: } 20340: } 20341: //先頭の位置を確認する 20342: // w[h]が先頭(0でない最初の数字)の位置 20343: int h = w[0] != 0 ? 0 : w[1] != 0 ? 1 : 2; 20344: //14+1桁目を四捨五入する 20345: int o = h + 14; //w[o]は四捨五入する桁の位置。w[]の範囲内 20346: if (5 <= w[o]) { 20347: int i = o; 20348: while (10 <= ++w[--i]) { 20349: w[i] = 0; 20350: } 20351: if (i < h) { //先頭から繰り上がった。このとき新しい先頭は1でそれ以外はすべて0 20352: h--; //先頭を左にずらす 20353: o--; //末尾を左にずらす 20354: } 20355: } 20356: //先頭の位置に応じて指数部を更新する 20357: // w[h]が整数部、w[h+1..o-1]が小数部。10^eの小数点はw[h]の右側。整数部の桁数はe+1桁 20358: e -= h - 1; 20359: //先頭からlen3+1桁目が先頭から14+1桁目よりも左側にあるときその桁で改めて四捨五入する 20360: // あらかじめ14+1桁目で四捨五入しておかないと、 20361: // 1.5の5を四捨五入しなければならないときに誤差で1.499…になったまま4を四捨五入しようとして失敗することがある 20362: int s = h + len3; //w[s]は先頭からlen3+1桁目の位置。w.length<=sの場合があることに注意 20363: if (s < o) { 20364: o = s; //w[o]は四捨五入する桁の位置。o<0の場合があることに注意 20365: if (0 <= o && 5 <= w[o]) { 20366: int i = o; 20367: while (10 <= ++w[--i]) { 20368: w[i] = 0; 20369: } 20370: if (i < h) { //先頭から繰り上がった。このとき新しい先頭は1でそれ以外はすべて0 20371: h--; //先頭を左にずらす 20372: o--; //末尾を左にずらす 20373: e++; //指数部を1増やす 20374: } 20375: } 20376: } 20377: //文字列に変換する 20378: while (a < b && h < o) { 20379: mmuWriteByteData (a++, '0' + w[h++], 1); //有効数字 20380: } 20381: while (a < b) { 20382: mmuWriteByteData (a++, '0', 1); //残りは'0' 20383: } 20384: mmuWriteByteData (a, '\0', 1); 20385: XEiJ.regRn[0] = e + 1; //小数点の位置 20386: } //fpkECVTSub6() 20387: 20388: //fpkFCVT () 20389: // $FE25 __FCVT 20390: // 64bit浮動小数点数を小数点以下の桁数を指定して文字列に変換する 20391: // メモ 20392: // 小数点の位置がpのとき[p]の左側に小数点がある 20393: // 全体の桁数が制限されないので指数部が大きいとき整数部が収まるサイズのバッファが必要 20394: // 0または1以上のとき 20395: // 整数部と小数点以下の指定された桁数までを小数部の0を省略せずに出力する 20396: // 整数部と小数点以下の指定された桁数が合わせて14桁を超えるときは15桁目が四捨五入されて15桁目以降は0になる 20397: // 小数点の位置は整数部の桁数に等しい 20398: // print fcvt(0#,4,i2,i3),i2,i3 20399: // 0000 0 0 20400: // print fcvt(2e+12/3#,4,i2,i3),i2,i3 20401: // 6666666666666700 12 0 20402: // ↑ 20403: // 1未満のとき 20404: // 小数点以下の桁数の範囲内を先頭の0を省略して出力する 20405: // 小数点以下の桁数の範囲内がすべて0のときは""になる 20406: // 小数点の位置は指数部+1に等しい 20407: // print fcvt(0.01,3,i2,i3),i2,i3 0.010 20408: // 10 -1 0 <~~ 20409: // print fcvt(0.001,3,i2,i3),i2,i3 0.001 20410: // 1 -2 0 <<~ 20411: // print fcvt(0.0001,3,i2,i3),i2,i3 0.0001 20412: // -3 0 <<< 20413: // print fcvt(0.00001,3,i2,i3),i2,i3 0.00001 20414: // -4 0 <<<< 20415: // #INFと#NAN 20416: // 小数点以下の桁数の指定に関係なく4文字出力して小数点の位置4を返す 20417: // print fcvt(val("#INF"),2,i2,i3),i2,i3 20418: // #INF 4 0 20419: // print fcvt(val("#INF"),6,i2,i3),i2,i3 20420: // #INF 4 0 20421: // バグ 20422: // FLOAT4.X 1.02は結果が整数部が大きいとき255文字で打ち切られる 20423: // FLOAT4.X 1.02はFCVT(±0)の整数部が0桁ではなく1桁になる 20424: // <d0d1.d:64bit浮動小数点数 20425: // <d2.l:小数点以下の桁数 20426: // <a0.l:文字列バッファの先頭 20427: // >d0.l:先頭から小数点の位置までのオフセット 20428: // >d1.l:符号(0=+,1=-) 20429: public static void fpkFCVT () throws M68kException { 20430: fpkFCVTSub ((long) XEiJ.regRn[0] << 32 | 0xffffffffL & XEiJ.regRn[1]); //64bit浮動小数点数 20431: } //fpkFCVT() 20432: public static void fpkFCVTSub (long l) throws M68kException { 20433: int len2 = Math.max (0, XEiJ.regRn[2]); //小数部の桁数 20434: int a = XEiJ.regRn[8]; //文字列バッファの先頭 20435: //符号と指数部の処理 20436: // ±0,±Inf,NaNはここで除外する 20437: if (0L <= l) { 20438: XEiJ.regRn[1] = 0; //正符号 20439: } else { 20440: XEiJ.regRn[1] = 1; //負符号 20441: l &= 0x7fffffffffffffffL; //符号bitを消しておく 20442: } 20443: double x = Double.longBitsToDouble (l); //絶対値 20444: int e = (int) (l >>> 52) - 1023; //指数部。ゲタ0。符号bitは消してあるのでマスクは不要 20445: l &= 0x000fffffffffffffL; //仮数部の小数部。正規化数のとき整数部の1が付いていないことに注意 20446: if (e == -1023) { //±0,非正規化数 20447: if (l == 0L) { //±0 20448: //指定された小数点以下の桁数だけ'0'を並べる 20449: while (len2-- > 0) { 20450: mmuWriteByteData (a++, '0', 1); 20451: } 20452: mmuWriteByteData (a, '\0', 1); 20453: XEiJ.regRn[0] = 0; //小数点の位置 20454: return; 20455: } 20456: e -= Long.numberOfLeadingZeros (l) - 12; //非正規化数の指数部を補正する 20457: } else if (e == 1024) { //±Inf,NaN 20458: mmuWriteByteData (a++, '#', 1); 20459: if (l == 0L) { //±Inf 20460: mmuWriteByteData (a++, 'I', 1); 20461: mmuWriteByteData (a++, 'N', 1); 20462: mmuWriteByteData (a++, 'F', 1); 20463: } else { //NaN 20464: mmuWriteByteData (a++, 'N', 1); 20465: mmuWriteByteData (a++, 'A', 1); 20466: mmuWriteByteData (a++, 'N', 1); 20467: } 20468: mmuWriteByteData (a, '\0', 1); 20469: XEiJ.regRn[0] = 4; //小数点の位置 20470: return; 20471: } 20472: //10進数で表現したときの指数部を求める 20473: // 10^e<=x<10^(e+1)となるeを求める 20474: e = (int) Math.floor ((double) e * 0.30102999566398119521373889472); //log10(2) 20475: //10^-eを掛けて1<=x<10にする 20476: // 非正規化数の最小値から正規化数の最大値まで処理できなければならない 20477: // 10^-eを計算してからまとめて掛ける方法はxが非正規化数のとき10^-eがオーバーフローしてしまうので不可 20478: // doubleは非正規化数の逆数を表現できない 20479: if (0 < e) { //10<=x 20480: x *= FEFunction.FPK_TEN_M16QR[e & 15]; 20481: if (16 <= e) { 20482: x *= FEFunction.FPK_TEN_M16QR[16 + (e >> 4 & 15)]; 20483: if (256 <= e) { 20484: x *= FEFunction.FPK_TEN_M16QR[33]; //FEFunction.FPK_TEN_M16QR[32 + (e >> 8)] 20485: } 20486: } 20487: } else if (e < 0) { //x<1 20488: x *= FEFunction.FPK_TEN_P16QR[-e & 15]; 20489: if (e <= -16) { 20490: x *= FEFunction.FPK_TEN_P16QR[16 + (-e >> 4 & 15)]; 20491: if (e <= -256) { 20492: x *= FEFunction.FPK_TEN_P16QR[33]; //FEFunction.FPK_TEN_P16QR[32 + (-e >> 8)] 20493: } 20494: } 20495: } 20496: //整数部2桁、小数部16桁の10進数に変換する 20497: // 1<=x<10なのでw[1]が先頭になるはずだが誤差で前後にずれる可能性がある 20498: int[] w = new int[18]; 20499: { 20500: int d = (int) x; 20501: int t = XEiJ.FMT_BCD4[d]; 20502: w[0] = t >> 4; 20503: w[1] = t & 15; 20504: for (int i = 2; i < 18; i += 4) { 20505: //xを10000倍して整数部dを引くことで小数部を残すが、このとき情報落ちが発生して誤差が蓄積する 20506: //Double-Doubleの乗算の要領で10000倍を正確に行い、誤差の蓄積を回避する 20507: //x = (x - (double) d) * 10000.0; 20508: double xh = x * 0x8000001p0; 20509: xh += x - xh; //xの上半分 20510: x = (xh - (double) d) * 10000.0 + (x - xh) * 10000.0; 20511: d = (int) x; 20512: t = XEiJ.FMT_BCD4[d]; 20513: w[i ] = t >> 12; 20514: w[i + 1] = t >> 8 & 15; 20515: w[i + 2] = t >> 4 & 15; 20516: w[i + 3] = t & 15; 20517: } 20518: } 20519: //先頭の位置を確認する 20520: // w[h]が先頭(0でない最初の数字)の位置 20521: int h = w[0] != 0 ? 0 : w[1] != 0 ? 1 : 2; 20522: //14+1桁目を四捨五入する 20523: int o = h + 14; //w[o]は四捨五入する桁の位置。w[]の範囲内 20524: if (5 <= w[o]) { 20525: int i = o; 20526: while (10 <= ++w[--i]) { 20527: w[i] = 0; 20528: } 20529: if (i < h) { //先頭から繰り上がった。このとき新しい先頭は1でそれ以外はすべて0 20530: h--; //先頭を左にずらす 20531: o--; //末尾を左にずらす 20532: } 20533: } 20534: //先頭の位置に応じて指数部を更新する 20535: // w[h]が整数部、w[h+1..o-1]が小数部。10^eの小数点はw[h]の右側。整数部の桁数はe+1桁 20536: e -= h - 1; 20537: //小数点以下len2+1桁目が先頭から14+1桁目よりも左側にあるときその桁で改めて四捨五入する 20538: // あらかじめ14+1桁目で四捨五入しておかないと、 20539: // 1.5の5を四捨五入しなければならないときに誤差で1.499…になったまま4を四捨五入しようとして失敗することがある 20540: int s = h + e + 1 + len2; //w[s]は小数点以下len2+1桁目の位置。w.length<=sの場合があることに注意 20541: if (s < o) { 20542: o = s; //w[o]は四捨五入する桁の位置。o<0の場合があることに注意 20543: if (0 <= o && 5 <= w[o]) { 20544: int i = o; 20545: while (10 <= ++w[--i]) { 20546: w[i] = 0; 20547: } 20548: if (i < h) { //先頭から繰り上がった。このとき新しい先頭は1でそれ以外はすべて0 20549: h--; //先頭を左にずらす 20550: o--; //末尾を左にずらす 20551: e++; //指数部を1増やす 20552: } 20553: } 20554: } 20555: //文字列に変換する 20556: while (h < o) { 20557: mmuWriteByteData (a++, '0' + w[h++], 1); //有効数字 20558: } 20559: while (h++ < s) { 20560: mmuWriteByteData (a++, '0', 1); //残りは'0' 20561: } 20562: mmuWriteByteData (a, '\0', 1); 20563: XEiJ.regRn[0] = e + 1; //小数点の位置 20564: } //fpkFCVTSub6() 20565: 20566: //fpkGCVT () 20567: // $FE26 __GCVT 20568: // 64bit浮動小数点数を全体の桁数を指定して文字列に変換する 20569: // 指定された桁数で表現できないときは指数表現になる 20570: // メモ 20571: // print gcvt(1e-1,10) 20572: // 0.1 20573: // print gcvt(1e-8,10) 20574: // 0.00000001 20575: // print gcvt(1.5e-8,10) 20576: // 1.5E-008 20577: // print gcvt(1e-9,10) 20578: // 1.E-009 小数点はあるが小数部がない 20579: // print gcvt(2e-1/3#,10) 20580: // 6.666666667E-002 20581: // print gcvt(2e+0/3#,10) 20582: // 0.6666666667 20583: // print gcvt(2e+1/3#,10) 20584: // 6.666666667 20585: // print gcvt(2e+9/3#,10) 20586: // 666666666.7 20587: // print gcvt(2e+10/3#,10) 20588: // 6666666667 20589: // print gcvt(2e+11/3#,10) 20590: // 6.666666667E+010 20591: // print gcvt(0#,4) 20592: // 0. 20593: // print gcvt(val("#INF"),4) 20594: // #INF 20595: // print gcvt(val("#INF"),3) 20596: // $.E+003 20597: // print gcvt(val("#INF"),2) 20598: // $.E+003 20599: // print gcvt(val("#INF"),1) 20600: // $.E+003 20601: // FLOAT2.XのGCVTは小数部がなくても桁数の範囲内であれば小数点を書く 20602: // 桁数ちょうどのときは小数点も指数部も付かないので、整数でないことを明確にするために小数点を書いているとも言い難い 20603: // ここでは#NANと#INF以外は小数部がなくても小数点を書くことにする 20604: // バグ 20605: // FLOAT2.X 2.02/2.03は#NANと#INFにも小数点を付ける 20606: // FLOAT2.X 2.02/2.03は#NANと#INFのとき桁数が足りないと指数形式にしようとして文字列が壊れる 20607: // FLOAT4.X 1.02は#NANと#INFにも小数点を付ける 20608: // FLOAT4.X 1.02は桁数の少ない整数には小数点を付けて桁数ちょうどの整数には小数点も指数部も付けない 20609: // <d0d1.d:64bit浮動小数点数 20610: // <d2.b:全体の桁数 20611: // <a0.l:文字列バッファの先頭 20612: // >a0.l:末尾の'\0'の位置 20613: public static void fpkGCVT () throws M68kException { 20614: fpkGCVTSub ((long) XEiJ.regRn[0] << 32 | 0xffffffffL & XEiJ.regRn[1]); //64bit浮動小数点数 20615: } //fpkGCVT() 20616: public static void fpkGCVTSub (long l) throws M68kException { 20617: int len3 = Math.max (0, XEiJ.regRn[2]); //全体の桁数 20618: int a = XEiJ.regRn[8]; //文字列バッファの先頭 20619: //符号と指数部の処理 20620: // ±0,±Inf,NaNはここで除外する 20621: if (l < 0L) { 20622: mmuWriteByteData (a++, '-', 1); //負符号 20623: l &= 0x7fffffffffffffffL; //符号bitを消しておく 20624: } 20625: double x = Double.longBitsToDouble (l); //絶対値 20626: int e = (int) (l >>> 52) - 1023; //指数部。ゲタ0。符号bitは消してあるのでマスクは不要 20627: l &= 0x000fffffffffffffL; //仮数部の小数部。正規化数のとき整数部の1が付いていないことに注意 20628: if (e == -1023) { //±0,非正規化数 20629: if (l == 0L) { //±0 20630: mmuWriteByteData (a++, '0', 1); //0 20631: mmuWriteByteData (a++, '.', 1); //小数点 20632: mmuWriteByteData (a, '\0', 1); 20633: XEiJ.regRn[8] = a; //末尾の'\0'の位置 20634: return; 20635: } 20636: e -= Long.numberOfLeadingZeros (l) - 12; //非正規化数の指数部を補正する 20637: } else if (e == 1024) { //±Inf,NaN 20638: mmuWriteByteData (a++, '#', 1); 20639: if (l == 0L) { //±Inf 20640: mmuWriteByteData (a++, 'I', 1); 20641: mmuWriteByteData (a++, 'N', 1); 20642: mmuWriteByteData (a++, 'F', 1); 20643: } else { //NaN 20644: mmuWriteByteData (a++, 'N', 1); 20645: mmuWriteByteData (a++, 'A', 1); 20646: mmuWriteByteData (a++, 'N', 1); 20647: } 20648: mmuWriteByteData (a, '\0', 1); 20649: XEiJ.regRn[8] = a; //末尾の'\0'の位置 20650: return; 20651: } 20652: //10進数で表現したときの指数部を求める 20653: // 10^e<=x<10^(e+1)となるeを求める 20654: e = (int) Math.floor ((double) e * 0.30102999566398119521373889472); //log10(2) 20655: //10^-eを掛けて1<=x<10にする 20656: // 非正規化数の最小値から正規化数の最大値まで処理できなければならない 20657: // 10^-eを計算してからまとめて掛ける方法はxが非正規化数のとき10^-eがオーバーフローしてしまうので不可 20658: // doubleは非正規化数の逆数を表現できない 20659: if (0 < e) { //10<=x 20660: x *= FEFunction.FPK_TEN_M16QR[e & 15]; 20661: if (16 <= e) { 20662: x *= FEFunction.FPK_TEN_M16QR[16 + (e >> 4 & 15)]; 20663: if (256 <= e) { 20664: x *= FEFunction.FPK_TEN_M16QR[33]; //FEFunction.FPK_TEN_M16QR[32 + (e >> 8)] 20665: } 20666: } 20667: } else if (e < 0) { //x<1 20668: x *= FEFunction.FPK_TEN_P16QR[-e & 15]; 20669: if (e <= -16) { 20670: x *= FEFunction.FPK_TEN_P16QR[16 + (-e >> 4 & 15)]; 20671: if (e <= -256) { 20672: x *= FEFunction.FPK_TEN_P16QR[33]; //FEFunction.FPK_TEN_P16QR[32 + (-e >> 8)] 20673: } 20674: } 20675: } 20676: //整数部2桁、小数部16桁の10進数に変換する 20677: // 1<=x<10なのでw[1]が先頭になるはずだが誤差で前後にずれる可能性がある 20678: int[] w = new int[18]; 20679: { 20680: int d = (int) x; 20681: int t = XEiJ.FMT_BCD4[d]; 20682: w[0] = t >> 4; 20683: w[1] = t & 15; 20684: for (int i = 2; i < 18; i += 4) { 20685: //xを10000倍して整数部dを引くことで小数部を残すが、このとき情報落ちが発生して誤差が蓄積する 20686: //Double-Doubleの乗算の要領で10000倍を正確に行い、誤差の蓄積を回避する 20687: //x = (x - (double) d) * 10000.0; 20688: double xh = x * 0x8000001p0; 20689: xh += x - xh; //xの上半分 20690: x = (xh - (double) d) * 10000.0 + (x - xh) * 10000.0; 20691: d = (int) x; 20692: t = XEiJ.FMT_BCD4[d]; 20693: w[i ] = t >> 12; 20694: w[i + 1] = t >> 8 & 15; 20695: w[i + 2] = t >> 4 & 15; 20696: w[i + 3] = t & 15; 20697: } 20698: } 20699: //先頭の位置を確認する 20700: // w[h]が先頭(0でない最初の数字)の位置 20701: int h = w[0] != 0 ? 0 : w[1] != 0 ? 1 : 2; 20702: //14+1桁目を四捨五入する 20703: int o = h + 14; //w[o]は四捨五入する桁の位置。w[]の範囲内 20704: if (5 <= w[o]) { 20705: int i = o; 20706: while (10 <= ++w[--i]) { 20707: w[i] = 0; 20708: } 20709: if (i < h) { //先頭から繰り上がった。このとき新しい先頭は1でそれ以外はすべて0 20710: h--; //先頭を左にずらす 20711: o--; //末尾を左にずらす 20712: } 20713: } 20714: //先頭の位置に応じて指数部を更新する 20715: // w[h]が整数部、w[h+1..o-1]が小数部。10^eの小数点はw[h]の右側。整数部の桁数はe+1桁 20716: e -= h - 1; 20717: //先頭からlen3+1桁目が先頭から14+1桁目よりも左側にあるときその桁で改めて四捨五入する 20718: // あらかじめ14+1桁目で四捨五入しておかないと、 20719: // 1.5の5を四捨五入しなければならないときに誤差で1.499…になったまま4を四捨五入しようとして失敗することがある 20720: int s = h + len3; //w[s]は先頭からlen3+1桁目の位置。w.length<=sの場合があることに注意 20721: if (s < o) { 20722: o = s; //w[o]は四捨五入する桁の位置。o<0の場合があることに注意 20723: if (0 <= o && 5 <= w[o]) { 20724: int i = o; 20725: while (10 <= ++w[--i]) { 20726: w[i] = 0; 20727: } 20728: if (i < h) { //先頭から繰り上がった。このとき新しい先頭は1でそれ以外はすべて0 20729: h--; //先頭を左にずらす 20730: o--; //末尾を左にずらす 20731: e++; //指数部を1増やす 20732: } 20733: } 20734: } 20735: //末尾の位置を確認する 20736: // w[o-1]が末尾(0でない最後の数字)の位置 20737: while (w[o - 1] == 0) { //全体は0ではないので必ず止まる。小数点よりも左側で止まる場合があることに注意 20738: o--; 20739: } 20740: //指数形式にするかどうか選択して文字列に変換する 20741: if (0 <= e && e < len3) { //1<=x<10^len3。指数形式にしない 20742: do { 20743: mmuWriteByteData (a++, '0' + w[h++], 1); //整数部。末尾の位置に関係なく1の位まで書く 20744: } while (0 <= --e); 20745: mmuWriteByteData (a++, '.', 1); //小数部がなくても小数点を書く 20746: while (h < o) { 20747: mmuWriteByteData (a++, '0' + w[h++], 1); //小数部 20748: } 20749: } else if (-4 <= e && e < 0) { //10^-4<=x<1。指数形式にしない 20750: mmuWriteByteData (a++, '0', 1); //整数部の0 20751: mmuWriteByteData (a++, '.', 1); //小数点 20752: while (++e < 0) { 20753: mmuWriteByteData (a++, '0', 1); //小数部の先頭の0の並び 20754: } 20755: while (h < o) { 20756: mmuWriteByteData (a++, '0' + w[h++], 1); //小数部 20757: } 20758: } else { //x<10^-4または10^len3<=x。指数形式にする 20759: mmuWriteByteData (a++, '0' + w[h++], 1); //整数部 20760: mmuWriteByteData (a++, '.', 1); //小数部がなくても小数点を書く 20761: while (h < o) { 20762: mmuWriteByteData (a++, '0' + w[h++], 1); //小数部 20763: } 20764: mmuWriteByteData (a++, 'E', 1); //指数部の始まり 20765: if (0 <= e) { 20766: mmuWriteByteData (a++, '+', 1); //指数部の正符号。省略しない 20767: } else { 20768: mmuWriteByteData (a++, '-', 1); //指数部の負符号 20769: e = -e; 20770: } 20771: e = XEiJ.FMT_BCD4[e]; 20772: mmuWriteByteData (a++, '0' + (e >> 8 ), 1); //指数部の100の位。0でも省略しない 20773: mmuWriteByteData (a++, '0' + (e >> 4 & 15), 1); //指数部の10の位 20774: mmuWriteByteData (a++, '0' + (e & 15), 1); //指数部の1の位 20775: } 20776: mmuWriteByteData (a, '\0', 1); 20777: XEiJ.regRn[8] = a; //末尾の'\0'の位置 20778: } //fpkGCVTSub6() 20779: 20780: //fpkFVAL () 20781: // $FE50 __FVAL 20782: // 文字列を32bit浮動小数点数に変換する 20783: // __VALとほぼ同じ 20784: // <a0.l:文字列の先頭 20785: // >d0.s:32bit浮動小数点数 20786: // >d2.l:(先頭が'&'でないとき)65535=32bit浮動小数点数をオーバーフローなしでintに変換できる,0=それ以外 20787: // >d3.l:(先頭が'&'でないとき)d2.l==65535のとき32bit浮動小数点数をintに変換した値 20788: // >a0.l:変換された文字列の直後('\0'とは限らない) 20789: // >ccr:0=エラーなし,CCR_N|CCR_C=文法エラー,CCR_V|CCR_C=オーバーフロー 20790: public static void fpkFVAL () throws M68kException { 20791: int a = XEiJ.regRn[8]; //a0 20792: //先頭の空白を読み飛ばす 20793: int c = mmuReadByteSignData (a++, 1); 20794: while (c == ' ' || c == '\t') { 20795: c = mmuReadByteSignData (a++, 1); 20796: } 20797: if (c == '&') { //&B,&O,&H 20798: c = mmuReadByteSignData (a++, 1) & 0xdf; 20799: XEiJ.regRn[8] = a; //&?の直後 20800: if (c == 'B') { 20801: fpkSTOB (); 20802: FEFunction.fpkLTOF (); 20803: } else if (c == 'O') { 20804: fpkSTOO (); 20805: FEFunction.fpkLTOF (); 20806: } else if (c == 'H') { 20807: fpkSTOH (); 20808: FEFunction.fpkLTOF (); 20809: } else { 20810: XEiJ.regCCR = XEiJ.REG_CCR_N | XEiJ.REG_CCR_C; //文法エラー 20811: } 20812: } else { //&B,&O,&H以外 20813: FEFunction.fpkSTOF (); 20814: } 20815: } //fpkFVAL() 20816: 20817: //fpkCLMUL () 20818: // $FEE0 __CLMUL 20819: // 32bit符号あり整数乗算 20820: // <(a7).l:32bit符号あり整数。被乗数x 20821: // <4(a7).l:32bit符号あり整数。乗数y 20822: // >(a7).l:32bit符号あり整数。積x*y。オーバーフローのときは不定 20823: // >ccr:cs=オーバーフロー。C以外は不定 20824: public static void fpkCLMUL () throws M68kException { 20825: int a7 = XEiJ.regRn[15]; 20826: long l = (long) mmuReadLongData (a7, 1) * (long) mmuReadLongData (a7 + 4, 1); 20827: int h = (int) l; 20828: mmuWriteLongData (a7, h, 1); //オーバーフローのときは積の下位32bit 20829: XEiJ.regCCR = (long) h == l ? 0 : XEiJ.REG_CCR_C; 20830: } //fpkCLMUL() 20831: 20832: //fpkCLDIV () 20833: // $FEE1 __CLDIV 20834: // 32bit符号あり整数除算 20835: // <(a7).l:32bit符号あり整数。被除数x 20836: // <4(a7).l:32bit符号あり整数。除数y 20837: // >(a7).l:32bit符号あり整数。商x/y。ゼロ除算のときは不定 20838: // >ccr:cs=ゼロ除算。C以外は不定 20839: public static void fpkCLDIV () throws M68kException { 20840: int a7 = XEiJ.regRn[15]; 20841: int h = mmuReadLongData (a7 + 4, 1); 20842: if (h == 0) { 20843: //(a7).lは変化しない 20844: XEiJ.regCCR = XEiJ.REG_CCR_C; 20845: } else { 20846: mmuWriteLongData (a7, mmuReadLongData (a7, 1) / h, 1); 20847: XEiJ.regCCR = 0; 20848: } 20849: } //fpkCLDIV() 20850: 20851: //fpkCLMOD () 20852: // $FEE2 __CLMOD 20853: // 32bit符号あり整数剰余算 20854: // <(a7).l:32bit符号あり整数。被除数x 20855: // <4(a7).l:32bit符号あり整数。除数y 20856: // >(a7).l:32bit符号あり整数。余りx%y。ゼロ除算のときは不定 20857: // >ccr:cs=ゼロ除算。C以外は不定 20858: public static void fpkCLMOD () throws M68kException { 20859: int a7 = XEiJ.regRn[15]; 20860: int h = mmuReadLongData (a7 + 4, 1); 20861: if (h == 0) { 20862: //(a7).lは変化しない 20863: XEiJ.regCCR = XEiJ.REG_CCR_C; 20864: } else { 20865: mmuWriteLongData (a7, mmuReadLongData (a7, 1) % h, 1); 20866: XEiJ.regCCR = 0; 20867: } 20868: } //fpkCLMOD() 20869: 20870: //fpkCUMUL () 20871: // $FEE3 __CUMUL 20872: // 32bit符号なし整数乗算 20873: // <(a7).l:32bit符号なし整数。被乗数x 20874: // <4(a7).l:32bit符号なし整数。乗数y 20875: // >(a7).l:32bit符号なし整数。積x*y。オーバーフローのときは不定 20876: // >ccr:cs=オーバーフロー。C以外は不定 20877: public static void fpkCUMUL () throws M68kException { 20878: int a7 = XEiJ.regRn[15]; 20879: long l = (0xffffffffL & mmuReadLongData (a7, 1)) * (0xffffffffL & mmuReadLongData (a7 + 4, 1)); 20880: int h = (int) l; 20881: mmuWriteLongData (a7, h, 1); 20882: XEiJ.regCCR = (0xffffffffL & h) == l ? 0 : XEiJ.REG_CCR_C; 20883: } //fpkCUMUL() 20884: 20885: //fpkCUDIV () 20886: // $FEE4 __CUDIV 20887: // 32bit符号なし整数除算 20888: // <(a7).l:32bit符号なし整数。被除数x 20889: // <4(a7).l:32bit符号なし整数。除数y 20890: // >(a7).l:32bit符号なし整数。商x/y。ゼロ除算のときは不定 20891: // >ccr:cs=ゼロ除算。C以外は不定 20892: public static void fpkCUDIV () throws M68kException { 20893: int a7 = XEiJ.regRn[15]; 20894: int h = mmuReadLongData (a7 + 4, 1); 20895: if (h == 0) { 20896: //(a7).lは変化しない 20897: XEiJ.regCCR = XEiJ.REG_CCR_C; 20898: } else { 20899: mmuWriteLongData (a7, (int) ((0xffffffffL & mmuReadLongData (a7, 1)) / (0xffffffffL & h)), 1); 20900: XEiJ.regCCR = 0; 20901: } 20902: } //fpkCUDIV() 20903: 20904: //fpkCUMOD () 20905: // $FEE5 __CUMOD 20906: // 32bit符号なし整数剰余算 20907: // <(a7).l:32bit符号なし整数。被除数x 20908: // <4(a7).l:32bit符号なし整数。除数y 20909: // >(a7).l:32bit符号なし整数。余りx%y。ゼロ除算のときは不定 20910: // >ccr:cs=ゼロ除算。C以外は不定 20911: public static void fpkCUMOD () throws M68kException { 20912: int a7 = XEiJ.regRn[15]; 20913: int h = mmuReadLongData (a7 + 4, 1); 20914: if (h == 0) { 20915: //(a7).lは変化しない 20916: XEiJ.regCCR = XEiJ.REG_CCR_C; 20917: } else { 20918: mmuWriteLongData (a7, (int) ((0xffffffffL & mmuReadLongData (a7, 1)) % (0xffffffffL & h)), 1); 20919: XEiJ.regCCR = 0; 20920: } 20921: } //fpkCUMOD() 20922: 20923: //fpkCLTOD () 20924: // $FEE6 __CLTOD 20925: // 32bit符号あり整数を64bit浮動小数点数に変換する 20926: // <(a7).l:32bit符号あり整数。x 20927: // >(a7).d:64bit浮動小数点数。(double)x 20928: public static void fpkCLTOD () throws M68kException { 20929: //int→double→[long]→[int,int] 20930: int a7 = XEiJ.regRn[15]; 20931: long l = Double.doubleToLongBits ((double) mmuReadLongData (a7, 1)); 20932: mmuWriteLongData (a7, (int) (l >>> 32), 1); 20933: mmuWriteLongData (a7 + 4, (int) l, 1); 20934: } //fpkCLTOD() 20935: 20936: //fpkCDTOL () 20937: // $FEE7 __CDTOL 20938: // 64bit浮動小数点数を32bit符号あり整数に変換する 20939: // <(a7).d:64bit浮動小数点数。x 20940: // >(a7).l:32bit符号あり整数。(int)x 20941: // >ccr:cs=オーバーフロー。C以外は不定 20942: public static void fpkCDTOL () throws M68kException { 20943: //[int,int]→[long]→double→int 20944: int a7 = XEiJ.regRn[15]; 20945: double d = Double.longBitsToDouble ((long) mmuReadLongData (a7, 1) << 32 | 0xffffffffL & mmuReadLongData (a7 + 4, 1)); 20946: mmuWriteLongData (a7, (int) d, 1); //オーバーフローのときは最小値または最大値 20947: XEiJ.regCCR = (double) Integer.MIN_VALUE - 1.0 < d && d < (double) Integer.MAX_VALUE + 1.0 ? 0 : XEiJ.REG_CCR_C; //NaN,±Infはエラー 20948: } //fpkCDTOL() 20949: 20950: //fpkCLTOF () 20951: // $FEE8 __CLTOF 20952: // 32bit符号あり整数を32bit浮動小数点数に変換する 20953: // <(a7).l:32bit符号あり整数。x 20954: // >(a7).s:32bit浮動小数点数。(float)x 20955: public static void fpkCLTOF () throws M68kException { 20956: //int→float→[int] 20957: int a7 = XEiJ.regRn[15]; 20958: mmuWriteLongData (a7, Float.floatToIntBits ((float) mmuReadLongData (a7, 1)), 1); 20959: } //fpkCLTOF() 20960: 20961: //fpkCFTOL () 20962: // $FEE9 __CFTOL 20963: // 32bit浮動小数点数を32bit符号あり整数に変換する 20964: // <(a7).s:32bit浮動小数点数。x 20965: // >(a7).l:32bit符号あり整数。(int)x 20966: // >ccr:cs=オーバーフロー。C以外は不定 20967: public static void fpkCFTOL () throws M68kException { 20968: //[int]→float→int 20969: int a7 = XEiJ.regRn[15]; 20970: float f = Float.intBitsToFloat (mmuReadLongData (a7, 1)); 20971: mmuWriteLongData (a7, (int) f, 1); 20972: XEiJ.regCCR = (float) Integer.MIN_VALUE - 1.0F < f && f < (float) Integer.MAX_VALUE + 1.0F ? 0 : XEiJ.REG_CCR_C; //NaN,±Infはエラー 20973: } //fpkCFTOL() 20974: 20975: //fpkCFTOD () 20976: // $FEEA __CFTOD 20977: // 32bit浮動小数点数を64bit浮動小数点数に変換する 20978: // <(a7).s:32bit浮動小数点数。x 20979: // >(a7).d:64bit浮動小数点数。(double)x 20980: public static void fpkCFTOD () throws M68kException { 20981: //[int]→float→double→[long]→[int,int] 20982: int a7 = XEiJ.regRn[15]; 20983: long l = Double.doubleToLongBits ((double) Float.intBitsToFloat (mmuReadLongData (a7, 1))); 20984: if (FEFunction.FPK_FPCP_NAN && l == 0x7ff8000000000000L) { 20985: l = 0x7fffffffffffffffL; 20986: } 20987: mmuWriteLongData (a7, (int) (l >>> 32), 1); 20988: mmuWriteLongData (a7 + 4, (int) l, 1); 20989: } //fpkCFTOD() 20990: 20991: //fpkCDTOF () 20992: // $FEEB __CDTOF 20993: // 64bit浮動小数点数を32bit浮動小数点数に変換する 20994: // <(a7).d:64bit浮動小数点数。x 20995: // >(a7).s:32bit浮動小数点数。(float)x 20996: // >ccr:cs=オーバーフロー。C以外は不定 20997: public static void fpkCDTOF () throws M68kException { 20998: //[int,int]→[long]→double→float→[int] 20999: int a7 = XEiJ.regRn[15]; 21000: double d = Double.longBitsToDouble ((long) mmuReadLongData (a7, 1) << 32 | 0xffffffffL & mmuReadLongData (a7 + 4, 1)); 21001: int h = Float.floatToIntBits ((float) d); 21002: if (FEFunction.FPK_FPCP_NAN && h == 0x7fc00000) { 21003: h = 0x7fffffff; 21004: } 21005: mmuWriteLongData (a7, h, 1); 21006: XEiJ.regCCR = (Double.isNaN (d) || Double.isInfinite (d) || 21007: Math.abs (d) < (double) Float.MAX_VALUE + 0.5 * (double) Math.ulp (Float.MAX_VALUE) ? 0 : XEiJ.REG_CCR_C); //アンダーフローはエラーなし 21008: } //fpkCDTOF() 21009: 21010: //fpkCDCMP () 21011: // $FEEC __CDCMP 21012: // 64bit浮動小数点数の比較 21013: // x<=>y 21014: // <(a7).d:64bit浮動小数点数。x 21015: // <8(a7).d:64bit浮動小数点数。y 21016: // >ccr:lt=x<y,eq=x==y,gt=x>y 21017: public static void fpkCDCMP () throws M68kException { 21018: //([int,int]→[long]→double)<=>([int,int]→[long]→double) 21019: int a7 = XEiJ.regRn[15]; 21020: double xd = Double.longBitsToDouble ((long) mmuReadLongData (a7, 1) << 32 | 0xffffffffL & mmuReadLongData (a7 + 4, 1)); 21021: double yd = Double.longBitsToDouble ((long) mmuReadLongData (a7 + 8, 1) << 32 | 0xffffffffL & mmuReadLongData (a7 + 12, 1)); 21022: XEiJ.regCCR = xd < yd ? XEiJ.REG_CCR_N | XEiJ.REG_CCR_C : xd == yd ? XEiJ.REG_CCR_Z : 0; //どちらかがNaNのときは0 21023: } //fpkCDCMP() 21024: 21025: //fpkCDADD () 21026: // $FEED __CDADD 21027: // 64bit浮動小数点数の加算 21028: // <(a7).d:64bit浮動小数点数。被加算数x 21029: // <8(a7).d:64bit浮動小数点数。加算数y 21030: // >(a7).d:64bit浮動小数点数。和x+y 21031: // >ccr:0=エラーなし,CCR_C=アンダーフロー,CCR_V|CCR_C=オーバーフロー 21032: public static void fpkCDADD () throws M68kException { 21033: //([int,int]→[long]→double)+([int,int]→[long]→double)→[long]→[int,int] 21034: int a7 = XEiJ.regRn[15]; 21035: double xd = Double.longBitsToDouble ((long) mmuReadLongData (a7, 1) << 32 | 0xffffffffL & mmuReadLongData (a7 + 4, 1)); 21036: double yd = Double.longBitsToDouble ((long) mmuReadLongData (a7 + 8, 1) << 32 | 0xffffffffL & mmuReadLongData (a7 + 12, 1)); 21037: double zd = xd + yd; 21038: long l = Double.doubleToLongBits (zd); 21039: if (FEFunction.FPK_FPCP_NAN && l == 0x7ff8000000000000L) { 21040: l = 0x7fffffffffffffffL; 21041: } 21042: mmuWriteLongData (a7, (int) (l >>> 32), 1); 21043: mmuWriteLongData (a7 + 4, (int) l, 1); 21044: XEiJ.regCCR = (Double.isNaN (xd) || Double.isNaN (yd) ? 0 : //引数がNaN 21045: Double.isNaN (zd) ? XEiJ.REG_CCR_C : //引数がNaNでないのに結果がNaNのときはエラー。(+Inf)+(-Inf)=NaN 21046: Double.isInfinite (xd) || Double.isInfinite (yd) ? 0 : //引数が±Inf 21047: Double.isInfinite (zd) ? XEiJ.REG_CCR_V | XEiJ.REG_CCR_C : //引数が±Infでないのに結果が±Infのときはオーバーフロー 21048: 0); 21049: } //fpkCDADD() 21050: 21051: //fpkCDSUB () 21052: // $FEEE __CDSUB 21053: // 64bit浮動小数点数の減算 21054: // <(a7).d:64bit浮動小数点数。被減算数x 21055: // <8(a7).d:64bit浮動小数点数。減算数y 21056: // >(a7).d:64bit浮動小数点数。差x-y 21057: // >ccr:cs=エラー,vs=オーバーフロー 21058: public static void fpkCDSUB () throws M68kException { 21059: //([int,int]→[long]→double)-([int,int]→[long]→double)→[long]→[int,int] 21060: int a7 = XEiJ.regRn[15]; 21061: double xd = Double.longBitsToDouble ((long) mmuReadLongData (a7, 1) << 32 | 0xffffffffL & mmuReadLongData (a7 + 4, 1)); 21062: double yd = Double.longBitsToDouble ((long) mmuReadLongData (a7 + 8, 1) << 32 | 0xffffffffL & mmuReadLongData (a7 + 12, 1)); 21063: double zd = xd - yd; 21064: long l = Double.doubleToLongBits (zd); 21065: if (FEFunction.FPK_FPCP_NAN && l == 0x7ff8000000000000L) { 21066: l = 0x7fffffffffffffffL; 21067: } 21068: mmuWriteLongData (a7, (int) (l >>> 32), 1); 21069: mmuWriteLongData (a7 + 4, (int) l, 1); 21070: XEiJ.regCCR = (Double.isNaN (xd) || Double.isNaN (yd) ? 0 : //引数がNaN 21071: Double.isNaN (zd) ? XEiJ.REG_CCR_C : //引数がNaNでないのに結果がNaNのときはエラー。(+Inf)-(+Inf)=NaN 21072: Double.isInfinite (xd) || Double.isInfinite (yd) ? 0 : //引数が±Inf 21073: Double.isInfinite (zd) ? XEiJ.REG_CCR_V | XEiJ.REG_CCR_C : //引数が±Infでないのに結果が±Infのときはオーバーフロー 21074: 0); 21075: } //fpkCDSUB() 21076: 21077: //fpkCDMUL () 21078: // $FEEF __CDMUL 21079: // 64bit浮動小数点数の乗算 21080: // <(a7).d:64bit浮動小数点数。被乗数x 21081: // <8(a7).d:64bit浮動小数点数。乗数y 21082: // >(a7).d:64bit浮動小数点数。積x*y 21083: // >ccr:cs=エラー,vs=オーバーフロー 21084: public static void fpkCDMUL () throws M68kException { 21085: //([int,int]→[long]→double)*([int,int]→[long]→double)→[long]→[int,int] 21086: int a7 = XEiJ.regRn[15]; 21087: double xd = Double.longBitsToDouble ((long) mmuReadLongData (a7, 1) << 32 | 0xffffffffL & mmuReadLongData (a7 + 4, 1)); 21088: double yd = Double.longBitsToDouble ((long) mmuReadLongData (a7 + 8, 1) << 32 | 0xffffffffL & mmuReadLongData (a7 + 12, 1)); 21089: double zd = xd * yd; 21090: long l = Double.doubleToLongBits (zd); 21091: if (FEFunction.FPK_FPCP_NAN && l == 0x7ff8000000000000L) { 21092: l = 0x7fffffffffffffffL; 21093: } 21094: mmuWriteLongData (a7, (int) (l >>> 32), 1); 21095: mmuWriteLongData (a7 + 4, (int) l, 1); 21096: XEiJ.regCCR = (Double.isNaN (xd) || Double.isNaN (yd) ? 0 : //引数がNaN 21097: Double.isNaN (zd) ? XEiJ.REG_CCR_C : //引数がNaNでないのに結果がNaNのときはエラー。(±0)*(±Inf)=NaN 21098: Double.isInfinite (xd) || Double.isInfinite (yd) ? 0 : //引数が±Inf 21099: Double.isInfinite (zd) ? XEiJ.REG_CCR_V | XEiJ.REG_CCR_C : //引数が±Infでないのに結果が±Infのときはオーバーフロー 21100: 0); 21101: } //fpkCDMUL() 21102: 21103: //fpkCDDIV () 21104: // $FEF0 __CDDIV 21105: // 64bit浮動小数点数の除算 21106: // <(a7).d:64bit浮動小数点数。被除数x 21107: // <8(a7).d:64bit浮動小数点数。除数y 21108: // >(a7).d:64bit浮動小数点数。商x/y。ゼロ除算のときは不定 21109: // >ccr:cs=エラー,eq=ゼロ除算,vs=オーバーフロー 21110: public static void fpkCDDIV () throws M68kException { 21111: //([int,int]→[long]→double)/([int,int]→[long]→double)→[long]→[int,int] 21112: int a7 = XEiJ.regRn[15]; 21113: double xd = Double.longBitsToDouble ((long) mmuReadLongData (a7, 1) << 32 | 0xffffffffL & mmuReadLongData (a7 + 4, 1)); 21114: double yd = Double.longBitsToDouble ((long) mmuReadLongData (a7 + 8, 1) << 32 | 0xffffffffL & mmuReadLongData (a7 + 12, 1)); 21115: double zd = xd / yd; 21116: long l = Double.doubleToLongBits (zd); 21117: if (FEFunction.FPK_FPCP_NAN && l == 0x7ff8000000000000L) { 21118: l = 0x7fffffffffffffffL; 21119: } 21120: mmuWriteLongData (a7, (int) (l >>> 32), 1); 21121: mmuWriteLongData (a7 + 4, (int) l, 1); 21122: XEiJ.regCCR = (Double.isNaN (xd) || Double.isNaN (yd) ? 0 : //引数がNaN 21123: Double.isNaN (zd) ? XEiJ.REG_CCR_C : //引数がNaNでないのに結果がNaNのときはエラー。(±0)/(±0)=NaN 21124: Double.isInfinite (xd) || Double.isInfinite (yd) ? 0 : //引数が±Inf。(±Inf)/(±0)=(±Inf) 21125: yd == 0.0 ? XEiJ.REG_CCR_Z | XEiJ.REG_CCR_C : //除数が±0のときはゼロ除算 21126: Double.isInfinite (zd) ? XEiJ.REG_CCR_V | XEiJ.REG_CCR_C : //引数が±Infでないのに結果が±Infのときはオーバーフロー 21127: 0); 21128: } //fpkCDDIV() 21129: 21130: //fpkCDMOD () 21131: // $FEF1 __CDMOD 21132: // 64bit浮動小数点数の剰余算 21133: // <(a7).d:64bit浮動小数点数。被除数x 21134: // <8(a7).d:64bit浮動小数点数。除数y 21135: // >(a7).d:64bit浮動小数点数。余りx%y。ゼロ除算のときは不定 21136: // >ccr:cs=エラー,eq=ゼロ除算 21137: public static void fpkCDMOD () throws M68kException { 21138: //([int,int]→[long]→double)%([int,int]→[long]→double)→[long]→[int,int] 21139: int a7 = XEiJ.regRn[15]; 21140: double xd = Double.longBitsToDouble ((long) mmuReadLongData (a7, 1) << 32 | 0xffffffffL & mmuReadLongData (a7 + 4, 1)); 21141: double yd = Double.longBitsToDouble ((long) mmuReadLongData (a7 + 8, 1) << 32 | 0xffffffffL & mmuReadLongData (a7 + 12, 1)); 21142: double zd = xd % yd; 21143: long l = Double.doubleToLongBits (zd); 21144: if (FEFunction.FPK_FPCP_NAN && l == 0x7ff8000000000000L) { 21145: l = 0x7fffffffffffffffL; 21146: } 21147: mmuWriteLongData (a7, (int) (l >>> 32), 1); 21148: mmuWriteLongData (a7 + 4, (int) l, 1); 21149: XEiJ.regCCR = (Double.isNaN (xd) || Double.isNaN (yd) ? 0 : //引数がNaN 21150: yd == 0.0 ? XEiJ.REG_CCR_Z | XEiJ.REG_CCR_C : //除数が0のときはゼロ除算。(±Inf)%(±0)=NaN, x%(±0)=(±Inf) 21151: Double.isNaN (zd) ? XEiJ.REG_CCR_C : //引数がNaNでないのに結果がNaNのときはエラー。(±Inf)%y=NaN 21152: Double.isInfinite (xd) || Double.isInfinite (yd) ? 0 : //引数が±Inf 21153: Double.isInfinite (zd) ? XEiJ.REG_CCR_V | XEiJ.REG_CCR_C : //引数が±Infでないのに結果が±Infのときはオーバーフロー 21154: 0); 21155: } //fpkCDMOD() 21156: 21157: //fpkCFCMP () 21158: // $FEF2 __CFCMP 21159: // 32bit浮動小数点数の比較 21160: // x<=>y 21161: // <(a7).s:32bit浮動小数点数。x 21162: // <(a7).s:32bit浮動小数点数。y 21163: // >ccr:lt=x<y,eq=x==y,gt=x>y 21164: public static void fpkCFCMP () throws M68kException { 21165: //([int]→float)<=>([int]→float) 21166: int a7 = XEiJ.regRn[15]; 21167: float xf = Float.intBitsToFloat (mmuReadLongData (a7, 1)); 21168: float yf = Float.intBitsToFloat (mmuReadLongData (a7 + 4, 1)); 21169: XEiJ.regCCR = xf < yf ? XEiJ.REG_CCR_N | XEiJ.REG_CCR_C : xf == yf ? XEiJ.REG_CCR_Z : 0; //どちらかがNaNのときは0 21170: } //fpkCFCMP() 21171: 21172: //fpkCFADD () 21173: // $FEF3 __CFADD 21174: // 32bit浮動小数点数の加算 21175: // <(a7).s:32bit浮動小数点数。被加算数x 21176: // <4(a7).s:32bit浮動小数点数。加算数y 21177: // >(a7).s:32bit浮動小数点数。和x+y 21178: // >ccr:cs=エラー,vs=オーバーフロー 21179: public static void fpkCFADD () throws M68kException { 21180: //([int]→float)+([int]→float)→[int] 21181: int a7 = XEiJ.regRn[15]; 21182: float xf = Float.intBitsToFloat (mmuReadLongData (a7, 1)); 21183: float yf = Float.intBitsToFloat (mmuReadLongData (a7 + 4, 1)); 21184: float zf = xf + yf; 21185: int h = Float.floatToIntBits (zf); 21186: if (FEFunction.FPK_FPCP_NAN && h == 0x7fc00000) { 21187: h = 0x7fffffff; 21188: } 21189: mmuWriteLongData (a7, h, 1); 21190: XEiJ.regCCR = (Float.isNaN (xf) || Float.isNaN (yf) ? 0 : //引数がNaN 21191: Float.isNaN (zf) ? XEiJ.REG_CCR_C : //引数がNaNでないのに結果がNaNのときはエラー。(+Inf)+(-Inf)=NaN 21192: Float.isInfinite (xf) || Float.isInfinite (yf) ? 0 : //引数が±Inf 21193: Float.isInfinite (zf) ? XEiJ.REG_CCR_V | XEiJ.REG_CCR_C : //引数が±Infでないのに結果が±Infのときはオーバーフロー 21194: 0); 21195: } //fpkCFADD() 21196: 21197: //fpkCFSUB () 21198: // $FEF4 __CFSUB 21199: // 32bit浮動小数点数の減算 21200: // <(a7).s:32bit浮動小数点数。被減算数x 21201: // <4(a7).s:32bit浮動小数点数。減算数y 21202: // >(a7).s:32bit浮動小数点数。差x-y 21203: // >ccr:cs=エラー,vs=オーバーフロー 21204: public static void fpkCFSUB () throws M68kException { 21205: //([int]→float)-([int]→float)→[int] 21206: int a7 = XEiJ.regRn[15]; 21207: float xf = Float.intBitsToFloat (mmuReadLongData (a7, 1)); 21208: float yf = Float.intBitsToFloat (mmuReadLongData (a7 + 4, 1)); 21209: float zf = xf - yf; 21210: int h = Float.floatToIntBits (zf); 21211: if (FEFunction.FPK_FPCP_NAN && h == 0x7fc00000) { 21212: h = 0x7fffffff; 21213: } 21214: mmuWriteLongData (a7, h, 1); 21215: XEiJ.regCCR = (Float.isNaN (xf) || Float.isNaN (yf) ? 0 : //引数がNaN 21216: Float.isNaN (zf) ? XEiJ.REG_CCR_C : //引数がNaNでないのに結果がNaNのときはエラー。(+Inf)-(+Inf)=NaN 21217: Float.isInfinite (xf) || Float.isInfinite (yf) ? 0 : //引数が±Inf 21218: Float.isInfinite (zf) ? XEiJ.REG_CCR_V | XEiJ.REG_CCR_C : //引数が±Infでないのに結果が±Infのときはオーバーフロー 21219: 0); 21220: } //fpkCFSUB() 21221: 21222: //fpkCFMUL () 21223: // $FEF5 __CFMUL 21224: // 32bit浮動小数点数の乗算 21225: // <(a7).s:32bit浮動小数点数。被乗数x 21226: // <4(a7).s:32bit浮動小数点数。乗数y 21227: // >(a7).s:32bit浮動小数点数。積x*y 21228: // >ccr:0=エラーなし,CCR_C=アンダーフロー,CCR_V|CCR_C=オーバーフロー 21229: public static void fpkCFMUL () throws M68kException { 21230: //([int]→float)*([int]→float)→[int] 21231: int a7 = XEiJ.regRn[15]; 21232: float xf = Float.intBitsToFloat (mmuReadLongData (a7, 1)); 21233: float yf = Float.intBitsToFloat (mmuReadLongData (a7 + 4, 1)); 21234: float zf = xf * yf; 21235: int h = Float.floatToIntBits (zf); 21236: if (FEFunction.FPK_FPCP_NAN && h == 0x7fc00000) { 21237: h = 0x7fffffff; 21238: } 21239: mmuWriteLongData (a7, h, 1); 21240: XEiJ.regCCR = (Float.isNaN (xf) || Float.isNaN (yf) ? 0 : //引数がNaN 21241: Float.isNaN (zf) ? XEiJ.REG_CCR_C : //引数がNaNでないのに結果がNaNのときはエラー。(±0)*(±Inf)=NaN 21242: Float.isInfinite (xf) || Float.isInfinite (yf) ? 0 : //引数が±Inf 21243: Float.isInfinite (zf) ? XEiJ.REG_CCR_V | XEiJ.REG_CCR_C : //引数が±Infでないのに結果が±Infのときはオーバーフロー 21244: 0); 21245: } //fpkCFMUL() 21246: 21247: //fpkCFDIV () 21248: // $FEF6 __CFDIV 21249: // 32bit浮動小数点数の除算 21250: // <(a7).s:32bit浮動小数点数。被除数x 21251: // <4(a7).s:32bit浮動小数点数。除数y 21252: // >(a7).s:32bit浮動小数点数。商x/y。ゼロ除算のときは不定 21253: // >ccr:cs=エラー,eq=ゼロ除算,vs=オーバーフロー 21254: public static void fpkCFDIV () throws M68kException { 21255: //([int]→float)/([int]→float)→[int] 21256: int a7 = XEiJ.regRn[15]; 21257: float xf = Float.intBitsToFloat (mmuReadLongData (a7, 1)); 21258: float yf = Float.intBitsToFloat (mmuReadLongData (a7 + 4, 1)); 21259: float zf = xf / yf; 21260: int h = Float.floatToIntBits (zf); 21261: if (FEFunction.FPK_FPCP_NAN && h == 0x7fc00000) { 21262: h = 0x7fffffff; 21263: } 21264: mmuWriteLongData (a7, h, 1); 21265: XEiJ.regCCR = (Float.isNaN (xf) || Float.isNaN (yf) ? 0 : //引数がNaN 21266: Float.isNaN (zf) ? XEiJ.REG_CCR_C : //引数がNaNでないのに結果がNaNのときはエラー。(±0)/(±0)=NaN 21267: Float.isInfinite (xf) || Float.isInfinite (yf) ? 0 : //引数が±Inf。(±Inf)/(±0)=(±Inf) 21268: yf == 0.0F ? XEiJ.REG_CCR_Z | XEiJ.REG_CCR_C : //除数が±0のときはゼロ除算 21269: Float.isInfinite (zf) ? XEiJ.REG_CCR_V | XEiJ.REG_CCR_C : //引数が±Infでないのに結果が±Infのときはオーバーフロー 21270: 0); 21271: } //fpkCFDIV() 21272: 21273: //fpkCFMOD () 21274: // $FEF7 __CFMOD 21275: // 32bit浮動小数点数の剰余算 21276: // <(a7).s:32bit浮動小数点数。被除数x 21277: // <4(a7).s:32bit浮動小数点数。除数y 21278: // >(a7).s:32bit浮動小数点数。余りx%y。ゼロ除算のときは不定 21279: // >ccr:cs=エラー,eq=ゼロ除算 21280: public static void fpkCFMOD () throws M68kException { 21281: //([int]→float)%([int]→float)→[int] 21282: int a7 = XEiJ.regRn[15]; 21283: float xf = Float.intBitsToFloat (mmuReadLongData (a7, 1)); 21284: float yf = Float.intBitsToFloat (mmuReadLongData (a7 + 4, 1)); 21285: float zf = xf % yf; 21286: int h = Float.floatToIntBits (zf); 21287: if (FEFunction.FPK_FPCP_NAN && h == 0x7fc00000) { 21288: h = 0x7fffffff; 21289: } 21290: mmuWriteLongData (a7, h, 1); 21291: XEiJ.regCCR = (Float.isNaN (xf) || Float.isNaN (yf) ? 0 : //引数がNaN 21292: yf == 0.0F ? XEiJ.REG_CCR_Z | XEiJ.REG_CCR_C : //除数が0のときはゼロ除算。(±Inf)%(±0)=NaN, x%(±0)=(±Inf) 21293: Float.isNaN (zf) ? XEiJ.REG_CCR_C : //引数がNaNでないのに結果がNaNのときはエラー。(±Inf)%y=NaN 21294: Float.isInfinite (xf) || Float.isInfinite (yf) ? 0 : //引数が±Inf 21295: Float.isInfinite (zf) ? XEiJ.REG_CCR_V | XEiJ.REG_CCR_C : //引数が±Infでないのに結果が±Infのときはオーバーフロー 21296: 0); 21297: } //fpkCFMOD() 21298: 21299: //fpkCDTST () 21300: // $FEF8 __CDTST 21301: // 64bit浮動小数点数と0の比較 21302: // x<=>0 21303: // <(a7).d:64bit浮動小数点数。x 21304: // >ccr:lt=x<0,eq=x==0,gt=x>0 21305: public static void fpkCDTST () throws M68kException { 21306: if (true) { 21307: int a7 = XEiJ.regRn[15]; 21308: long l = (long) mmuReadLongData (a7, 1) << 32 | 0xffffffffL & mmuReadLongData (a7 + 4, 1); 21309: XEiJ.regCCR = l << 1 == 0L ? XEiJ.REG_CCR_Z : 0L <= l ? 0 : XEiJ.REG_CCR_N; //NaNのときは0 21310: } else { 21311: //[int,int]→[long]→double 21312: int a7 = XEiJ.regRn[15]; 21313: double d = Double.longBitsToDouble ((long) mmuReadLongData (a7, 1) << 32 | 0xffffffffL & mmuReadLongData (a7 + 4, 1)); 21314: XEiJ.regCCR = d < 0.0 ? XEiJ.REG_CCR_N : d == 0.0 ? XEiJ.REG_CCR_Z : 0; //NaNのときは0 21315: } 21316: } //fpkCDTST() 21317: 21318: //fpkCFTST () 21319: // $FEF9 __CFTST 21320: // 32bit浮動小数点数と0の比較 21321: // x<=>0 21322: // <(a7).s:32bit浮動小数点数。x 21323: // >ccr:lt=x<0,eq=x==0,gt=x>0 21324: public static void fpkCFTST () throws M68kException { 21325: //[int]→float 21326: if (true) { 21327: int h = mmuReadLongData (XEiJ.regRn[15], 1); 21328: XEiJ.regCCR = h << 1 == 0 ? XEiJ.REG_CCR_Z : 0 <= h ? 0 : XEiJ.REG_CCR_N; //NaNのときは0 21329: } else { 21330: //([int]→float)<=>0 21331: float f = Float.intBitsToFloat (mmuReadLongData (XEiJ.regRn[15], 1)); 21332: XEiJ.regCCR = f < 0.0F ? XEiJ.REG_CCR_N : f == 0.0F ? XEiJ.REG_CCR_Z : 0; //NaNのときは0 21333: } 21334: } //fpkCFTST() 21335: 21336: //fpkCDINC () 21337: // $FEFA __CDINC 21338: // 64bit浮動小数点数に1を加える 21339: // <(a7).d:64bit浮動小数点数。x 21340: // >(a7).d:64bit浮動小数点数。x+1 21341: public static void fpkCDINC () throws M68kException { 21342: //([int,int]→[long]→double)+1→[long]→[int,int] 21343: int a7 = XEiJ.regRn[15]; 21344: double xd = Double.longBitsToDouble ((long) mmuReadLongData (a7, 1) << 32 | 0xffffffffL & mmuReadLongData (a7 + 4, 1)); 21345: double zd = xd + 1.0; 21346: long l = Double.doubleToLongBits (zd); 21347: if (FEFunction.FPK_FPCP_NAN && l == 0x7ff8000000000000L) { 21348: l = 0x7fffffffffffffffL; 21349: } 21350: mmuWriteLongData (a7, (int) (l >>> 32), 1); 21351: mmuWriteLongData (a7 + 4, (int) l, 1); 21352: XEiJ.regCCR = Double.isInfinite (zd) && !Double.isInfinite (xd) ? XEiJ.REG_CCR_V | XEiJ.REG_CCR_C : 0; //結果が±Infだが引数が±Infでないときはオーバーフロー 21353: } //fpkCDINC() 21354: 21355: //fpkCFINC () 21356: // $FEFB __CFINC 21357: // 32bit浮動小数点数に1を加える 21358: // <(a7).s:32bit浮動小数点数。x 21359: // >(a7).s:32bit浮動小数点数。x+1 21360: public static void fpkCFINC () throws M68kException { 21361: //([int]→float)+1→[int] 21362: int a7 = XEiJ.regRn[15]; 21363: float xf = Float.intBitsToFloat (mmuReadLongData (a7, 1)); 21364: float zf = xf + 1.0F; 21365: int h = Float.floatToIntBits (zf); 21366: if (FEFunction.FPK_FPCP_NAN && h == 0x7fc00000) { 21367: h = 0x7fffffff; 21368: } 21369: mmuWriteLongData (a7, h, 1); 21370: XEiJ.regCCR = Double.isInfinite (zf) && !Float.isInfinite (xf) ? XEiJ.REG_CCR_V | XEiJ.REG_CCR_C : 0; //結果が±Infだが引数が±Infでないときはオーバーフロー 21371: } //fpkCFINC() 21372: 21373: //fpkCDDEC () 21374: // $FEFC __CDDEC 21375: // 64bit浮動小数点数から1を引く 21376: // <(a7).d:64bit浮動小数点数。x 21377: // >(a7).d:64bit浮動小数点数。x-1 21378: public static void fpkCDDEC () throws M68kException { 21379: //([int,int]→[long]→double)-1→[long]→[int,int] 21380: int a7 = XEiJ.regRn[15]; 21381: double xd = Double.longBitsToDouble ((long) mmuReadLongData (a7, 1) << 32 | 0xffffffffL & mmuReadLongData (a7 + 4, 1)); 21382: double zd = xd - 1.0; 21383: long l = Double.doubleToLongBits (zd); 21384: if (FEFunction.FPK_FPCP_NAN && l == 0x7ff8000000000000L) { 21385: l = 0x7fffffffffffffffL; 21386: } 21387: mmuWriteLongData (a7, (int) (l >>> 32), 1); 21388: mmuWriteLongData (a7 + 4, (int) l, 1); 21389: XEiJ.regCCR = Double.isInfinite (zd) && !Double.isInfinite (xd) ? XEiJ.REG_CCR_V | XEiJ.REG_CCR_C : 0; //結果が±Infだが引数が±Infでないときはオーバーフロー 21390: } //fpkCDDEC() 21391: 21392: //fpkCFDEC () 21393: // $FEFD __CFDEC 21394: // 32bit浮動小数点数から1を引く 21395: // <(a7).s:32bit浮動小数点数。x 21396: // >(a7).s:32bit浮動小数点数。x-1 21397: public static void fpkCFDEC () throws M68kException { 21398: //([int]→float)-1→[int] 21399: int a7 = XEiJ.regRn[15]; 21400: float xf = Float.intBitsToFloat (mmuReadLongData (a7, 1)); 21401: float zf = xf - 1.0F; 21402: int h = Float.floatToIntBits (zf); 21403: if (FEFunction.FPK_FPCP_NAN && h == 0x7fc00000) { 21404: h = 0x7fffffff; 21405: } 21406: mmuWriteLongData (a7, h, 1); 21407: XEiJ.regCCR = Double.isInfinite (zf) && !Float.isInfinite (xf) ? XEiJ.REG_CCR_V | XEiJ.REG_CCR_C : 0; //結果が±Infだが引数が±Infでないときはオーバーフロー 21408: } //fpkCFDEC() 21409: 21410: 21411: 21412: //======================================================================================== 21413: //$$MMU メモリ管理ユニット 21414: 21415: public static final boolean MMU_DEBUG_COMMAND = false; 21416: public static final boolean MMU_DEBUG_TRANSLATION = false; 21417: public static final boolean MMU_NOT_ALLOCATE_CACHE = false; //true=アドレス変換キャッシュをアロケートしない 21418: 21419: //-------------------------------------------------------------------------------- 21420: //論理アドレスと物理アドレス 21421: // 21422: // ページサイズが4KBの場合 21423: // ┌── 7 ──┬── 7 ──┬── 6──┬─────12─────┐ 21424: // 31 2524 1817 1211 0 21425: // ┏━━━━━━┯━━━━━━┯━━━━━┯━━━━━━━━━━━┓ 21426: // 論理 ┃ ルート │ ポインタ │ ページ │ ページ ┃ 21427: // アドレス┃インデックス│インデックス インデックス オフセット ┃ 21428: // ┗━━↓━━━┷━━↓━━━┷━━↓━━┷━━━━━↓━━━━━┛ 21429: // ┌────┘ │ └────┐ └──────┐ 21430: // │ ルートテーブル │ ポインタテーブル │ ページテーブル │ 21431: // ┌┼→┏━━━━━━━┓┌┼→┏━━━━━━━┓┌┼→┏━━━━━━━┓│ 21432: // ││ 0┃ ┃││ 0┃ ┃││ 0┃ ┃│ 21433: // ││ ┃ ┃││ ┃ ┃│└→┠───────┨│ 21434: // │└→┠───────┨││ ┃ ┃│ ┃ ページ ┃│ 21435: // ルート ┃ ルート ┃│└→┠───────┨│┌─←デスクリプタ┃│ 21436: // ポインタ ┃デスクリプタ→┘ ┃ ポインタ ┃││ ┠───────┨│ 21437: // ┠───────┨ ┃デスクリプタ→┘│63┃ ┃│ 21438: // ┃ ┃ ┠───────┨ │ ┗━━━━━━━┛│ 21439: // 127┃ ┃ 127┃ ┃ │ │ 21440: // ┗━━━━━━━┛ ┗━━━━━━━┛ │ │ 21441: // ┌───────────┘ ┌──────┘ 21442: // ┏━━━━━━━━━↓━━━━━━━━━┯━━━━━↓━━━━━┓ 21443: // 物理 ┃ 物理ページ │ ページ ┃ 21444: // アドレス┃ アドレス │ オフセット ┃ 21445: // ┗━━━━━━━━━━━━━━━━━━━┷━━━━━━━━━━━┛ 21446: // 31 1211 0 21447: // └─────────20─────────┴─────12─────┘ 21448: // 21449: // ページサイズが8KBの場合 21450: // ┌── 7 ──┬── 7 ──┬─ 5 ─┬───── 13 ─────┐ 21451: // 31 2524 1817 1312 0 21452: // ┏━━━━━━┯━━━━━━┯━━━━┯━━━━━━━━━━━━┓ 21453: // 論理 ┃ ルート │ ポインタ │ ページ │ ページ ┃ 21454: // アドレス┃インデックス│インデックスインデックス オフセット ┃ 21455: // ┗━━↓━━━┷━━↓━━━┷━━↓━┷━━━━━━↓━━━━━┛ 21456: // ┌────┘ │ └────┐ └──────┐ 21457: // │ ルートテーブル │ ポインタテーブル │ ページテーブル │ 21458: // ┌┼→┏━━━━━━━┓┌┼→┏━━━━━━━┓┌┼→┏━━━━━━━┓│ 21459: // ││ 0┃ ┃││ 0┃ ┃││ 0┃ ┃│ 21460: // ││ ┃ ┃││ ┃ ┃│└→┠───────┨│ 21461: // │└→┠───────┨││ ┃ ┃│ ┃ ページ ┃│ 21462: // ルート ┃ ルート ┃│└→┠───────┨│┌─←デスクリプタ┃│ 21463: // ポインタ ┃デスクリプタ→┘ ┃ ポインタ ┃││ ┠───────┨│ 21464: // ┠───────┨ ┃デスクリプタ→┘│31┃ ┃│ 21465: // ┃ ┃ ┠───────┨ │ ┗━━━━━━━┛│ 21466: // 127┃ ┃ 127┃ ┃ │ │ 21467: // ┗━━━━━━━┛ ┗━━━━━━━┛ │ │ 21468: // ┌───────────┘ ┌──────┘ 21469: // ┏━━━━━━━━━↓━━━━━━━━┯━━━━━━↓━━━━━┓ 21470: // 物理 ┃ 物理ページ │ ページ ┃ 21471: // アドレス┃ アドレス │ オフセット ┃ 21472: // ┗━━━━━━━━━━━━━━━━━━┷━━━━━━━━━━━━┛ 21473: // 31 1312 0 21474: // └──────── 19 ────────┴───── 13 ─────┘ 21475: // 21476: public static final int MMU_ROOT_INDEX_BIT0 = 25; 21477: public static final int MMU_POINTER_INDEX_BIT0 = 18; 21478: public static final int MMU_PAGE_INDEX_BIT0_4KB = 12; 21479: public static final int MMU_PAGE_INDEX_BIT0_8KB = 13; 21480: public static final int MMU_PAGE_SIZE_4KB = 1 << MMU_PAGE_INDEX_BIT0_4KB; 21481: public static final int MMU_PAGE_SIZE_8KB = 1 << MMU_PAGE_INDEX_BIT0_8KB; 21482: // 33222222_22221111_111111 21483: // 10987654_32109876_54321098_76543210 21484: public static final int MMU_ROOT_INDEX_MASK = 0b11111110_00000000_00000000_00000000; 21485: public static final int MMU_POINTER_INDEX_MASK = 0b00000001_11111100_00000000_00000000; 21486: public static final int MMU_PAGE_INDEX_MASK_4KB = 0b00000000_00000011_11110000_00000000; 21487: public static final int MMU_PAGE_INDEX_MASK_8KB = 0b00000000_00000011_11100000_00000000; 21488: public static final int MMU_PAGE_OFFSET_MASK_4KB = 0b00000000_00000000_00001111_11111111; 21489: public static final int MMU_PAGE_OFFSET_MASK_8KB = 0b00000000_00000000_00011111_11111111; 21490: public static final int MMU_PAGE_ADDRESS_MASK_4KB = 0b11111111_11111111_11110000_00000000; 21491: public static final int MMU_PAGE_ADDRESS_MASK_8KB = 0b11111111_11111111_11100000_00000000; 21492: 21493: //-------------------------------------------------------------------------------- 21494: //透過変換レジスタ 21495: // 21496: // DTT0 データ透過変換レジスタ0 21497: // DTT1 データ透過変換レジスタ1 21498: // ITT0 命令透過変換レジスタ0 21499: // ITT1 命令透過変換レジスタ1 21500: // 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 21501: // ┏━━━━━━━━━━━━━━━┯━━━━━━━━━━━━━━━┯━┯━┯━┯━━━━━┯━┯━┯━┯━━━┯━━━┯━┯━━━┓ 21502: // ┃ 論理アドレスベース │ 論理アドレスマスク │ E│IS│US│ 0 │U1│U0│ 0│ CM │ 0 │ W│ 0 ┃ 21503: // ┗━━━━━━━━━━━━━━━┷━━━━━━━━━━━━━━━┷━┷━┷━┷━━━━━┷━┷━┷━┷━━━┷━━━┷━┷━━━┛ 21504: public static final int MMU_TTR_BASE = 255 << 24; //x Logical Address Base 21505: public static final int MMU_TTR_MASK = 255 << 16; //x Logical Address Mask 21506: public static final int MMU_TTR_ENABLE = 1 << 15; //x E Enable 21507: public static final int MMU_TTR_IGNORE_FC2 = 1 << 14; //x IS Ignore FC2 when matching 21508: public static final int MMU_TTR_USER_SUPERVISOR = 1 << 13; //x US User or Supervisor when IS=0 21509: public static final int MMU_TTR_US_USER = 0 << 13; // Match only if FC2=0 (user mode access) 21510: public static final int MMU_TTR_US_SUPERVISOR = 1 << 13; // Match only if FC2=1 (supervisor mode access) 21511: public static final int MMU_TTR_WRITE_PROTECT = 1 << 2; //x W Write Protect 21512: public static int mmuDTT0; //DTT0 21513: public static int mmuDTT1; //DTT1 21514: public static int mmuITT0; //ITT0 21515: public static int mmuITT1; //ITT1 21516: // 透過変換マップ 21517: // インデックス 21518: // a >>> 24 21519: // 値 21520: // -1 透過変換あり,ライトプロテクトあり → リードのときアドレス変換なし、ライトのときアクセスフォルト 21521: // 0 透過変換なし → アドレス変換あり 21522: // 1 透過変換あり,ライトプロテクトなし → アドレス変換なし 21523: public static int[] mmuUserDataTransparent; //ユーザデータ透過変換マップ 21524: public static int[] mmuUserCodeTransparent; //ユーザ命令透過変換マップ 21525: public static int[] mmuSuperDataTransparent; //スーパーバイザデータ透過変換マップ 21526: public static int[] mmuSuperCodeTransparent; //スーパーバイザ命令透過変換マップ 21527: public static int[] mmuUserDataDifference; //ユーザデータ透過変換差分マップ 21528: public static int[] mmuUserCodeDifference; //ユーザ命令透過変換差分マップ 21529: public static int[] mmuSuperDataDifference; //スーパーバイザデータ透過変換差分マップ 21530: public static int[] mmuSuperCodeDifference; //スーパーバイザ命令透過変換差分マップ 21531: 21532: //d = mmuGetDTT0 () 21533: // DTT0を読む 21534: public static int mmuGetDTT0 () { 21535: return mmuDTT0; 21536: } //mmuGetDTT0() 21537: 21538: //d = mmuGetDTT1 () 21539: // DTT1を読む 21540: public static int mmuGetDTT1 () { 21541: return mmuDTT1; 21542: } //mmuGetDTT1() 21543: 21544: //d = mmuGetITT0 () 21545: // ITT0を読む 21546: public static int mmuGetITT0 () { 21547: return mmuITT0; 21548: } //mmuGetITT0() 21549: 21550: //d = mmuGetITT1 () 21551: // ITT1を読む 21552: public static int mmuGetITT1 () { 21553: return mmuITT1; 21554: } //mmuGetITT1() 21555: 21556: //mmuSetDTT0 (d) 21557: // DTT0に書く 21558: public static void mmuSetDTT0 (int d) { 21559: mmuSetDataTransparent (d, mmuDTT1); 21560: if (MMU_DEBUG_COMMAND) { 21561: System.out.printf ("%08x mmuSetDTT0(0x%08x)\n", XEiJ.regPC0, mmuDTT0); 21562: } 21563: } //mmuSetDTT0(int) 21564: 21565: //mmuSetDTT1 (d) 21566: // DTT1に書く 21567: public static void mmuSetDTT1 (int d) { 21568: mmuSetDataTransparent (mmuDTT0, d); 21569: if (MMU_DEBUG_COMMAND) { 21570: System.out.printf ("%08x mmuSetDTT1(0x%08x)\n", XEiJ.regPC0, mmuDTT1); 21571: } 21572: } //mmuSetDTT1(int) 21573: 21574: //mmuSetDataTransparent (d0, d1) 21575: // DTT0,DTT1に書く 21576: // データ透過変換マップを更新する 21577: // DTT0とDTT1の両方がヒットするときDTT0を用いるため、DTT1の変換を展開してからDTT0の変換を上書きする 21578: // DTT1でライトプロテクトされていてもDTT0でライトプロテクトされていなければ書き込める 21579: public static void mmuSetDataTransparent (int d0, int d1) { 21580: mmuDTT0 = d0 & 0xffffe364; 21581: mmuDTT1 = d1 & 0xffffe364; 21582: //透過変換マップと透過変換差分マップを入れ換える 21583: { 21584: int[] t = mmuUserDataDifference; 21585: mmuUserDataDifference = mmuUserDataTransparent; 21586: mmuUserDataTransparent = t; 21587: t = mmuSuperDataDifference; 21588: mmuSuperDataDifference = mmuSuperDataTransparent; 21589: mmuSuperDataTransparent = t; 21590: } 21591: //透過変換マップを構築する 21592: Arrays.fill (mmuUserDataTransparent, 0); //透過変換なし 21593: Arrays.fill (mmuSuperDataTransparent, 0); //透過変換なし 21594: if ((short) mmuDTT1 < 0) { //(mmuDTT1 & MMU_TTR_ENABLE) != 0。有効 21595: int mask = ~mmuDTT1 >>> 16 & 255; 21596: int base = mmuDTT1 >>> 24 & mask; 21597: int writeProtect = (mmuDTT1 & MMU_TTR_WRITE_PROTECT) != 0 ? -1 : 1; //-1=ライトプロテクトあり,1=ライトプロテクトなし 21598: if ((mmuDTT1 & MMU_TTR_IGNORE_FC2) != 0 || 21599: (mmuDTT1 & MMU_TTR_USER_SUPERVISOR) == MMU_TTR_US_USER) { //ユーザモードで有効 21600: for (int block = 0; block < 256; block++) { 21601: //if (((block << 24 ^ mmuDTT1) & ~mmuDTT1 << 8) >>> 24 == 0) { 21602: if ((block & mask) == base) { 21603: mmuUserDataTransparent[block] = writeProtect; 21604: } 21605: } 21606: } 21607: if ((mmuDTT1 & MMU_TTR_IGNORE_FC2) != 0 || 21608: (mmuDTT1 & MMU_TTR_USER_SUPERVISOR) == MMU_TTR_US_SUPERVISOR) { //スーパーバイザモードで有効 21609: for (int block = 0; block < 256; block++) { 21610: //if (((block << 24 ^ mmuDTT1) & ~mmuDTT1 << 8) >>> 24 == 0) { 21611: if ((block & mask) == base) { 21612: mmuSuperDataTransparent[block] = writeProtect; 21613: } 21614: } 21615: } 21616: } 21617: if ((short) mmuDTT0 < 0) { //(mmuDTT0 & MMU_TTR_ENABLE) != 0。有効 21618: int mask = ~mmuDTT0 >>> 16 & 255; 21619: int base = mmuDTT0 >>> 24 & mask; 21620: int writeProtect = (mmuDTT0 & MMU_TTR_WRITE_PROTECT) != 0 ? -1 : 1; //-1=ライトプロテクトあり,1=ライトプロテクトなし 21621: if ((mmuDTT0 & MMU_TTR_IGNORE_FC2) != 0 || 21622: (mmuDTT0 & MMU_TTR_USER_SUPERVISOR) == MMU_TTR_US_USER) { //ユーザモードで有効 21623: for (int block = 0; block < 256; block++) { 21624: //if (((block << 24 ^ mmuDTT0) & ~mmuDTT0 << 8) >>> 24 == 0) { 21625: if ((block & mask) == base) { 21626: mmuUserDataTransparent[block] = writeProtect; 21627: } 21628: } 21629: } 21630: if ((mmuDTT0 & MMU_TTR_IGNORE_FC2) != 0 || 21631: (mmuDTT0 & MMU_TTR_USER_SUPERVISOR) == MMU_TTR_US_SUPERVISOR) { //スーパーバイザモードで有効 21632: for (int block = 0; block < 256; block++) { 21633: //if (((block << 24 ^ mmuDTT0) & ~mmuDTT0 << 8) >>> 24 == 0) { 21634: if ((block & mask) == base) { 21635: mmuSuperDataTransparent[block] = writeProtect; 21636: } 21637: } 21638: } 21639: } 21640: //透過変換差分マップを作る 21641: int difference = 0; 21642: for (int block = 0; block < 256; block++) { 21643: difference |= mmuUserDataDifference[block] -= mmuUserDataTransparent[block]; 21644: difference |= mmuSuperDataDifference[block] -= mmuSuperDataTransparent[block]; 21645: } 21646: //透過変換の状態が変化したブロックのエントリを無効化する 21647: if (difference != 0) { 21648: for (int i = 0; i < 4 * MMU_CACHE_WAYS * MMU_HASH_SIZE; i += 4) { 21649: int logicalPage = mmuUserDataCache[i]; 21650: if (logicalPage != 1 && //有効なエントリで 21651: mmuUserDataDifference[logicalPage >>> 24] != 0) { //透過変換の状態が変化した 21652: mmuUserDataCache[i] = mmuUserDataCache[i + 1] = mmuUserDataCache[i + 2] = mmuUserDataCache[i + 3] = 1; //無効化する 21653: } 21654: logicalPage = mmuSuperDataCache[i]; 21655: if (logicalPage != 1 && //有効なエントリで 21656: mmuSuperDataDifference[logicalPage >>> 24] != 0) { //透過変換の状態が変化した 21657: mmuSuperDataCache[i] = mmuSuperDataCache[i + 1] = mmuSuperDataCache[i + 2] = mmuSuperDataCache[i + 3] = 1; //無効化する 21658: } 21659: } 21660: } 21661: } //mmuSetDataTransparent(int,int) 21662: 21663: //mmuSetITT0 (d) 21664: // ITT0に書く 21665: public static void mmuSetITT0 (int d) { 21666: mmuSetCodeTransparent (d, mmuITT1); 21667: if (MMU_DEBUG_COMMAND) { 21668: System.out.printf ("%08x mmuSetITT0(0x%08x)\n", XEiJ.regPC0, mmuITT0); 21669: } 21670: } //mmuSetITT0(int) 21671: 21672: //mmuSetITT1 (d) 21673: // ITT1に書く 21674: public static void mmuSetITT1 (int d) { 21675: mmuSetCodeTransparent (mmuITT0, d); 21676: if (MMU_DEBUG_COMMAND) { 21677: System.out.printf ("%08x mmuSetITT1(0x%08x)\n", XEiJ.regPC0, mmuITT1); 21678: } 21679: } //mmuSetITT1(int) 21680: 21681: //mmuSetCodeTransparent (d0, d1) 21682: // ITT0,ITT1に書く 21683: // 命令透過変換マップを更新する 21684: // ITT0とITT1の両方がヒットするときITT0を用いるため、ITT1の変換を展開してからITT0の変換を上書きする 21685: public static void mmuSetCodeTransparent (int d0, int d1) { 21686: mmuITT0 = d0 & 0xffffe364; 21687: mmuITT1 = d1 & 0xffffe364; 21688: //透過変換マップと透過変換差分マップを入れ換える 21689: { 21690: int[] t = mmuUserCodeDifference; 21691: mmuUserCodeDifference = mmuUserCodeTransparent; 21692: mmuUserCodeTransparent = t; 21693: t = mmuSuperCodeDifference; 21694: mmuSuperCodeDifference = mmuSuperCodeTransparent; 21695: mmuSuperCodeTransparent = t; 21696: } 21697: //透過変換マップを構築する 21698: Arrays.fill (mmuUserCodeTransparent, 0); //透過変換なし 21699: Arrays.fill (mmuSuperCodeTransparent, 0); //透過変換なし 21700: if ((short) mmuITT1 < 0) { //(mmuITT1 & MMU_TTR_ENABLE) != 0。有効 21701: int mask = ~mmuITT1 >>> 16 & 255; 21702: int base = mmuITT1 >>> 24 & mask; 21703: int writeProtect = (mmuITT1 & MMU_TTR_WRITE_PROTECT) != 0 ? -1 : 1; //-1=ライトプロテクトあり,1=ライトプロテクトなし 21704: if ((mmuITT1 & MMU_TTR_IGNORE_FC2) != 0 || 21705: (mmuITT1 & MMU_TTR_USER_SUPERVISOR) == MMU_TTR_US_USER) { //ユーザモードで有効 21706: for (int block = 0; block < 256; block++) { 21707: //if (((block << 24 ^ mmuITT1) & ~mmuITT1 << 8) >>> 24 == 0) { 21708: if ((block & mask) == base) { 21709: mmuUserCodeTransparent[block] = writeProtect; 21710: } 21711: } 21712: } 21713: if ((mmuITT1 & MMU_TTR_IGNORE_FC2) != 0 || 21714: (mmuITT1 & MMU_TTR_USER_SUPERVISOR) == MMU_TTR_US_SUPERVISOR) { //スーパーバイザモードで有効 21715: for (int block = 0; block < 256; block++) { 21716: //if (((block << 24 ^ mmuITT1) & ~mmuITT1 << 8) >>> 24 == 0) { 21717: if ((block & mask) == base) { 21718: mmuSuperCodeTransparent[block] = writeProtect; 21719: } 21720: } 21721: } 21722: } 21723: if ((short) mmuITT0 < 0) { //(mmuITT0 & MMU_TTR_ENABLE) != 0。有効 21724: int mask = ~mmuITT0 >>> 16 & 255; 21725: int base = mmuITT0 >>> 24 & mask; 21726: int writeProtect = (mmuITT0 & MMU_TTR_WRITE_PROTECT) != 0 ? -1 : 1; //-1=ライトプロテクトあり,1=ライトプロテクトなし 21727: if ((mmuITT0 & MMU_TTR_IGNORE_FC2) != 0 || 21728: (mmuITT0 & MMU_TTR_USER_SUPERVISOR) == MMU_TTR_US_USER) { //ユーザモードで有効 21729: for (int block = 0; block < 256; block++) { 21730: //if (((block << 24 ^ mmuITT0) & ~mmuITT0 << 8) >>> 24 == 0) { 21731: if ((block & mask) == base) { 21732: mmuUserCodeTransparent[block] = writeProtect; 21733: } 21734: } 21735: } 21736: if ((mmuITT0 & MMU_TTR_IGNORE_FC2) != 0 || 21737: (mmuITT0 & MMU_TTR_USER_SUPERVISOR) == MMU_TTR_US_SUPERVISOR) { //スーパーバイザモードで有効 21738: for (int block = 0; block < 256; block++) { 21739: //if (((block << 24 ^ mmuITT0) & ~mmuITT0 << 8) >>> 24 == 0) { 21740: if ((block & mask) == base) { 21741: mmuSuperCodeTransparent[block] = writeProtect; 21742: } 21743: } 21744: } 21745: } 21746: //透過変換差分マップを作る 21747: int difference = 0; 21748: for (int block = 0; block < 256; block++) { 21749: difference |= mmuUserCodeDifference[block] -= mmuUserCodeTransparent[block]; 21750: difference |= mmuSuperCodeDifference[block] -= mmuSuperCodeTransparent[block]; 21751: } 21752: //透過変換の状態が変化したブロックのエントリを無効化する 21753: if (difference != 0) { 21754: for (int i = 0; i < 4 * MMU_CACHE_WAYS * MMU_HASH_SIZE; i += 4) { 21755: int logicalPage = mmuUserCodeCache[i]; 21756: if (logicalPage != 1 && //有効なエントリで 21757: mmuUserCodeDifference[logicalPage >>> 24] != 0) { //透過変換の状態が変化した 21758: mmuUserCodeCache[i] = mmuUserCodeCache[i + 1] = mmuUserCodeCache[i + 2] = mmuUserCodeCache[i + 3] = 1; //無効化する 21759: } 21760: logicalPage = mmuSuperCodeCache[i]; 21761: if (logicalPage != 1 && //有効なエントリで 21762: mmuSuperCodeDifference[logicalPage >>> 24] != 0) { //透過変換の状態が変化した 21763: mmuSuperCodeCache[i] = mmuSuperCodeCache[i + 1] = mmuSuperCodeCache[i + 2] = mmuSuperCodeCache[i + 3] = 1; //無効化する 21764: } 21765: } 21766: } 21767: } //mmuSetCodeTransparent(int,int) 21768: 21769: //-------------------------------------------------------------------------------- 21770: //変換制御レジスタ 21771: // 21772: // TCR 変換制御レジスタ 21773: // 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 21774: // ┏━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━┯━┯━┯━┯━┯━┯━┯━━━┯━━━┯━┯━━━┯━━━┯━┓ 21775: // ┃ 0 │ E│ P NAD NAI FOTC FITC DCO │ DUO │DWO DCI │ DUI │ 0┃ 21776: // ┗━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━┷━┷━┷━┷━┷━┷━┷━━━┷━━━┷━┷━━━┷━━━┷━┛ 21777: public static final int MMU_TCR_ENABLE = 1 << 15; //x E Enable 21778: public static final int MMU_TCR_PAGE_SIZE = 1 << 14; //x P Page Size 21779: public static final int MMU_TCR_P_4KB = 0 << 14; // 4KB 21780: public static final int MMU_TCR_P_8KB = 1 << 14; // 8KB 21781: public static final int MMU_TCR_NAD = 1 << 13; //x NAD No Allocate Mode (Data ATC)。データATCはヒットするが更新されない 21782: public static final int MMU_TCR_NAI = 1 << 12; //x NAI No Allocate Mode (Instruction ATC)。命令ATCはヒットするが更新されない 21783: public static final int MMU_TCR_FOTC = 1 << 11; // FOTC 1/2-Cache Mode (Data ATC)。データATCは0=64エントリ,1=32エントリ 21784: public static final int MMU_TCR_FITC = 1 << 10; // FITC 1/2-Cache Mode (Instruction ATC)。命令ATCは0=64エントリ,1=32エントリ 21785: public static final int MMU_TCR_DCO = 3 << 8; // DCO Default Cache Mode (Data Cache)。デフォルトデータキャッシュモード 21786: public static final int MMU_TCR_DUO = 3 << 6; // DUO Default UPA bits (Data Cache)。デフォルトデータUPA 21787: public static final int MMU_TCR_DWO = 1 << 5; // DWO Default Write Protect (Data Cache)。デフォルトライトプロテクト 21788: public static final int MMU_TCR_DCI = 3 << 3; // DCI Default Cache Mode (Instruction Cache)。デフォルト命令キャッシュモード 21789: public static final int MMU_TCR_DUI = 3 << 1; // DUI Default UPA bits (Instruction Cache)。デフォルト命令UPA 21790: public static int mmuTCR; //TCR 21791: public static boolean mmuEnabled; //true=アドレス変換有効 21792: public static boolean mmu4KB; //false=8KB,true=4KB 21793: public static boolean mmuNotAllocateData; //true=データアドレス変換キャッシュをアロケートしない 21794: public static boolean mmuNotAllocateCode; //true=命令アドレス変換キャッシュをアロケートしない 21795: public static int mmuPageSize; //ページサイズ 21796: public static int mmuPageAddressMask; //ページアドレスのマスク 21797: public static int mmuPageOffsetMask; //ページオフセットのマスク 21798: public static int mmuPageIndexMask; //ページインデックスのマスク 21799: public static int mmuPageIndexBit2; //ページインデックスのbit番号-2 21800: public static int mmuPageTableMask; //ページテーブルの先頭アドレスのマスク 21801: 21802: //d = mmuGetTCR () 21803: // TCRを読む 21804: public static int mmuGetTCR () { 21805: return mmuTCR; 21806: } //mmuGetTCR() 21807: 21808: //mmuSetTCR (d) 21809: // TCRに書く 21810: public static void mmuSetTCR (int d) { 21811: mmuInvalidateAllCache (); //高速化のためアドレス変換していないときもキャッシュに乗せているので、アドレス変換を有効にしたときキャッシュを初期化する必要がある 21812: mmuTCR = d & 0x0000fffe; 21813: mmuEnabled = (short) d < 0; //(d & MMU_TCR_ENABLE) != 0 21814: mmu4KB = (d & MMU_TCR_PAGE_SIZE) == MMU_TCR_P_4KB; 21815: mmuNotAllocateData = (d & MMU_TCR_NAD) != 0; 21816: mmuNotAllocateCode = (d & MMU_TCR_NAI) != 0; 21817: if (mmu4KB) { //4KB 21818: mmuPageSize = MMU_PAGE_SIZE_4KB; 21819: mmuPageAddressMask = MMU_PAGE_ADDRESS_MASK_4KB; 21820: mmuPageOffsetMask = MMU_PAGE_OFFSET_MASK_4KB; 21821: mmuPageIndexMask = MMU_PAGE_INDEX_MASK_4KB; 21822: mmuPageIndexBit2 = MMU_PAGE_INDEX_BIT0_4KB - 2; 21823: mmuPageTableMask = MMU_DESCRIPTOR_PAGE_TABLE_ADDRESS_4KB; 21824: } else { //8KB 21825: mmuPageSize = MMU_PAGE_SIZE_8KB; 21826: mmuPageAddressMask = MMU_PAGE_ADDRESS_MASK_8KB; 21827: mmuPageOffsetMask = MMU_PAGE_OFFSET_MASK_8KB; 21828: mmuPageIndexMask = MMU_PAGE_INDEX_MASK_8KB; 21829: mmuPageIndexBit2 = MMU_PAGE_INDEX_BIT0_8KB - 2; 21830: mmuPageTableMask = MMU_DESCRIPTOR_PAGE_TABLE_ADDRESS_8KB; 21831: } 21832: if (MMU_DEBUG_COMMAND) { 21833: System.out.printf ("%08x mmuSetTCR(0x%08x)\n", XEiJ.regPC0, mmuTCR); 21834: System.out.printf (" mmuEnabled=%b\n", mmuEnabled); 21835: System.out.printf (" mmu4KB=%b\n", mmu4KB); 21836: System.out.printf (" mmuPageSize=0x%08x\n", mmuPageSize); 21837: System.out.printf (" mmuPageAddressMask=0x%08x\n", mmuPageAddressMask); 21838: System.out.printf (" mmuPageOffsetMask=0x%08x\n", mmuPageOffsetMask); 21839: System.out.printf (" mmuPageIndexMask=0x%08x\n", mmuPageIndexMask); 21840: System.out.printf (" mmuPageIndexBit2=%d\n", mmuPageIndexBit2); 21841: System.out.printf (" mmuPageTableMask=%d\n", mmuPageTableMask); 21842: } 21843: } //mmuSetTCR(int) 21844: 21845: //-------------------------------------------------------------------------------- 21846: //アドレス変換テーブル 21847: 21848: // URP ユーザルートポインタ 21849: // SRP スーパーバイザルートポインタ 21850: // 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 21851: // ┏━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━┯━━━━━━━━━━━━━━━━━┓ 21852: // ┃ ルートテーブルアドレス │ 0 ┃ 21853: // ┗━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━┷━━━━━━━━━━━━━━━━━┛ 21854: public static int mmuURP; //URP 21855: public static int mmuSRP; //SRP 21856: 21857: //d = mmuGetURP () 21858: // URPを読む 21859: public static int mmuGetURP () { 21860: return mmuURP; 21861: } //mmuGetURP() 21862: 21863: //d = mmuGetSRP () 21864: // SRPを読む 21865: public static int mmuGetSRP () { 21866: return mmuSRP; 21867: } //mmuGetSRP() 21868: 21869: //mmuSetURP (d) 21870: // URPに書く 21871: public static void mmuSetURP (int d) throws M68kException { 21872: mmuURP = d &= 0xfffffe00; 21873: Arrays.fill (mmuUserDataCache, 1); 21874: Arrays.fill (mmuUserCodeCache, 1); 21875: if (MMU_DEBUG_COMMAND) { 21876: System.out.printf ("%08x mmuSetURP(0x%08x)\n", XEiJ.regPC0, mmuURP); 21877: } 21878: if (RootPointerList.RTL_ON) { 21879: RootPointerList.rtlSetRootPointer (d, false); 21880: } 21881: } //mmuSetURP(int) 21882: 21883: //mmuSetSRP (d) 21884: // SRPに書く 21885: public static void mmuSetSRP (int d) { 21886: mmuSRP = d &= 0xfffffe00; 21887: Arrays.fill (mmuSuperDataCache, 1); 21888: Arrays.fill (mmuSuperCodeCache, 1); 21889: if (MMU_DEBUG_COMMAND) { 21890: System.out.printf ("%08x mmuSetSRP(0x%08x)\n", XEiJ.regPC0, mmuSRP); 21891: } 21892: if (RootPointerList.RTL_ON) { 21893: RootPointerList.rtlSetRootPointer (d, true); 21894: } 21895: } //mmuSetSRP(int) 21896: 21897: // デスクリプタ 21898: // 21899: // ルートテーブルデスクリプタ 21900: // 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 21901: // ┏━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━┯━━━━━━━━━┯━┯━┯━━━┓ 21902: // ┃ ポインタテーブルアドレス │ X │ U│ W│ UDT ┃ 21903: // ┗━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━┷━━━━━━━━━┷━┷━┷━━━┛ 21904: // 21905: // 4KBポインタテーブルデスクリプタ 21906: // 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 21907: // ┏━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━┯━━━┯━┯━┯━━━┓ 21908: // ┃ ページテーブルアドレス │ X │ U│ W│ UDT ┃ 21909: // ┗━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━┷━━━┷━┷━┷━━━┛ 21910: // 21911: // 8KBポインタテーブルデスクリプタ 21912: // 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 21913: // ┏━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━┯━┯━┯━┯━━━┓ 21914: // ┃ ページテーブルアドレス │ X│ U│ W│ UDT ┃ 21915: // ┗━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━┷━┷━┷━┷━━━┛ 21916: // 21917: // 4KBページテーブルデスクリプタ 21918: // 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 21919: // ┏━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━┯━┯━┯━┯━┯━┯━━━┯━┯━┯━┯━━━┓ 21920: // ┃ 物理ページアドレス │UR│ G│U1│U0│ S│ CM │ M│ U│ W│ PDT ┃ 21921: // ┗━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━┷━┷━┷━┷━┷━┷━━━┷━┷━┷━┷━━━┛ 21922: // 21923: // 8KBページテーブルデスクリプタ 21924: // 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 21925: // ┏━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━┯━┯━┯━┯━┯━┯━┯━━━┯━┯━┯━┯━━━┓ 21926: // ┃ 物理ページアドレス │UR│UR│ G│U1│U0│ S│ CM │ M│ U│ W│ PDT ┃ 21927: // ┗━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━┷━┷━┷━┷━┷━┷━┷━━━┷━┷━┷━┷━━━┛ 21928: // 21929: // 間接ページテーブルデスクリプタ 21930: // 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 21931: // ┏━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━┯━━━┓ 21932: // ┃ ページデスクリプタアドレス │ PDT ┃ 21933: // ┗━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━┷━━━┛ 21934: public static final int MMU_DESCRIPTOR_POINTER_TABLE_ADDRESS = -1 << 9; //x Pointer Table Address 21935: public static final int MMU_DESCRIPTOR_PAGE_TABLE_ADDRESS_4KB = -1 << 6; //x Page Table Address (4KB) 21936: public static final int MMU_DESCRIPTOR_PAGE_TABLE_ADDRESS_8KB = -1 << 5; //x Page Table Address (8KB) 21937: public static final int MMU_DESCRIPTOR_GLOBAL = 1 << 10; //x G Global 21938: public static final int MMU_DESCRIPTOR_SUPERVISOR_PROTECTED = 1 << 7; //x S Supervisor Protected 21939: public static final int MMU_DESCRIPTOR_MODIFIED = 1 << 4; //x M Modified 21940: public static final int MMU_DESCRIPTOR_USED = 1 << 3; //x U Used 21941: public static final int MMU_DESCRIPTOR_WRITE_PROTECTED = 1 << 2; //x W Write Protected 21942: public static final int MMU_DESCRIPTOR_UDT = 2 << 0; //x UDT Upper Level Descriptor Type 21943: public static final int MMU_DESCRIPTOR_PDT = 3 << 0; //x PDT Page Descriptor Type 21944: public static final int MMU_DESCRIPTOR_TYPE_INVALID = 0 << 0; // Invalid 21945: public static final int MMU_DESCRIPTOR_TYPE_INDIRECT = 2 << 0; // Indirect 21946: public static final int MMU_DESCRIPTOR_INDIRECT_ADDRESS = -1 << 2; //x Descriptor Address 21947: 21948: //-------------------------------------------------------------------------------- 21949: //アドレス変換キャッシュ 21950: // 21951: // 構造 21952: // ユーザモード 21953: // ライン0 21954: // エントリ0 21955: // [0] 論理ページアドレス。リード用。1=無効 21956: // [1] 論理ページアドレス。ライト用。修正済みかつライトプロテクトされていないときだけ有効。1=無効 21957: // [2] 物理ページアドレス。1=無効 21958: // [3] グローバルフラグ。-1=Global,0=NonGlobal,1=無効 21959: // エントリ1 21960: // エントリ2 21961: // エントリ3 21962: // ライン1 21963: // : 21964: // ライン63 21965: // スーパーバイザモード 21966: // ライン0 21967: // エントリ0 21968: // [0] 論理ページアドレス。リード用。1=無効 21969: // [1] 論理ページアドレス。ライト用。修正済みかつライトプロテクトされていないときだけ有効。1=無効 21970: // [2] 物理ページアドレス。1=無効 21971: // [3] グローバルフラグ。-1=Global,0=NonGlobal,1=無効 21972: // エントリ1 21973: // エントリ2 21974: // エントリ3 21975: // ライン1 21976: // : 21977: // ライン63 21978: // 21979: // ハッシュ関数 21980: // 次の関数で32bitの論理ページアドレスを6bitのライン番号に変換する 21981: // a * 0x5efc103f >>> 26 21982: // 32bitの中に幅6bit以内で6bitまでセットする組み合わせは1+1+2+4+8+16+32*27=896通りあるが、 21983: // それらをa*x>>>26で0～63になるべく均一に分散させる係数を2^32通りの中から探して以下の24個を得た 21984: // 0x5efbf041 0x5efc0fc1 0x5efc103f 0x5f03efc1 0x5f03f03f 0x5f040fbf 21985: // 0x60fbf041 0x60fc0fc1 0x60fc103f 0x6103efc1 0x6103f03f 0x61040fbf 21986: // 0x9efbf041 0x9efc0fc1 0x9efc103f 0x9f03efc1 0x9f03f03f 0x9f040fbf 21987: // 0xa0fbf041 0xa0fc0fc1 0xa0fc103f 0xa103efc1 0xa103f03f 0xa1040fbf 21988: // この中で(0..63)<<12と(0..63)<<13がそれぞれすべて分離するのは 21989: // 0x5efc103f 21990: // 0x60fc103f 21991: // 0x9efc103f 21992: // 0xa0fc103f 21993: // この4個はほぼ同じパターンなので0x5efc103fを係数として用いることにする 21994: // perl -e "for$x(0x5efc103f){printf' // 0x%x%c',$x,10;for$b(7..15){@c=(0)x64;for$n(0..63){$a=$n<<$b;$c[$a*$x>>26&63]++;}printf' // %2d %s%c',$b,join('',@c),10;}}" 21995: // 0x5efc103f 21996: // 7 2111111111111111111111111111111101111111111111111111111111111111 21997: // 8 1111111111111111111111111111111111111111111111111111111111111111 21998: // 9 1111111111111111111111111111111111111111111111111111111111111111 21999: // 10 1111111111111111111111111111111111111111111111111111111111111111 22000: // 11 1111111111111111111111111111111111111111111111111111111111111111 22001: // 12 1111111111111111111111111111111111111111111111111111111111111111 22002: // 13 1111111111111111111111111111111111111111111111111111111111111111 22003: // 14 1111111111111111111111111111111111111111111111111111111111111111 22004: // 15 2011111111111111111111111111111111111111111111111111111111111111 22005: // ページサイズが2^8=256バイトから2^14=16384バイトまで、それぞれ先頭の64ページがすべて異なるハッシュ値を持つことがわかる 22006: // 22007: // 1wayセットアソシアティブ 22008: // ハッシュ値が衝突したときの速度低下を抑えるため4waysにしてみたが効果がなさそうなので1wayに戻してある 22009: // ハッシュ関数を工夫してあるので4waysにしてもほとんどの場合は1番目でヒットするか4番目まですべてミスするかのどちらかになる 22010: // 1wayを4waysにするとミスしたときの条件分岐が1回から4回に増えてテーブルサーチの開始が遅れる 22011: // 2ways以上では参照するときに1番目に比較するエントリとアロケートするときに押し出すエントリを適切に選択するための仕組みが必要 22012: // 22013: // LRU(least recently used)方式(2ways以上の場合) 22014: // アロケートはラインの中で最も古いエントリを切り捨てて最も新しいエントリを追加する方法で行う 22015: // アドレス変換キャッシュは最も新しいエントリが繰り返しアクセスされる場合が多く、ハッシュ関数で十分に分散させられているので、 22016: // ここではエントリを常に新しい順にソートしておく方法を用いる 22017: // 2番目以降のエントリがヒットしたときエントリを並べ替えなければならないので遅くなるが、1番目のヒット率が十分に高ければ問題ない 22018: // 22019: // グローバルフラグ 22020: // 関連する命令 22021: // PFLUSHA アドレス変換キャッシュのすべてのエントリを無効化する 22022: // PFLUSHAN アドレス変換キャッシュのNonGlobalなエントリを無効化する 22023: // PFLUSH (An) アドレス変換キャッシュの、DFC=1またはDFC=2ならばユーザモード、DFC=5またはDFC=6ならばスーパーバイザモードの、 22024: // 論理ページアドレスがAnのエントリを無効化する 22025: // PFLUSHN (An) アドレス変換キャッシュの、DFC=1またはDFC=2ならばユーザモード、DFC=5またはDFC=6ならばスーパーバイザモードの、 22026: // 論理ページアドレスがAnかつNonGlobalのエントリを無効化する 22027: // グローバルフラグはこれらの命令の動作を変更する以外の機能を持たない 22028: // 22029: public static final int MMU_HASH_BITS = 6; 22030: public static final int MMU_HASH_SIZE = 1 << MMU_HASH_BITS; 22031: public static final int MMU_HASH_COEFF = 0x5efc103f; //ハッシュ関数の係数 22032: public static final int MMU_CACHE_WAYS = 1; //1=1way,4=4waysセットアソシアティブ 22033: public static final int[] mmuUserDataCache = new int[4 * MMU_CACHE_WAYS * MMU_HASH_SIZE]; 22034: public static final int[] mmuUserCodeCache = new int[4 * MMU_CACHE_WAYS * MMU_HASH_SIZE]; 22035: public static final int[] mmuSuperDataCache = new int[4 * MMU_CACHE_WAYS * MMU_HASH_SIZE]; 22036: public static final int[] mmuSuperCodeCache = new int[4 * MMU_CACHE_WAYS * MMU_HASH_SIZE]; 22037: 22038: //mmuInvalidateAllCache () 22039: // PFLUSHA 22040: // アドレス変換キャッシュのすべてのエントリを無効化する 22041: public static void mmuInvalidateAllCache () { 22042: Arrays.fill (mmuUserDataCache, 1); 22043: Arrays.fill (mmuUserCodeCache, 1); 22044: Arrays.fill (mmuSuperDataCache, 1); 22045: Arrays.fill (mmuSuperCodeCache, 1); 22046: } //mmuInvalidateAllCache() 22047: 22048: //mmuInvalidateAllNonGlobalCache () 22049: // PFLUSHAN 22050: // アドレス変換キャッシュのNonGlobalなエントリを無効化する 22051: public static void mmuInvalidateAllNonGlobalCache () { 22052: for (int i = 0; i < 4 * MMU_CACHE_WAYS * MMU_HASH_SIZE; i += 4) { 22053: if (mmuUserDataCache[i + 3] == 0) { //エントリが有効かつNonGlobal 22054: mmuUserDataCache[i] = mmuUserDataCache[i + 1] = mmuUserDataCache[i + 2] = mmuUserDataCache[i + 3] = 1; 22055: } 22056: if (mmuUserCodeCache[i + 3] == 0) { //エントリが有効かつNonGlobal 22057: mmuUserCodeCache[i] = mmuUserCodeCache[i + 1] = mmuUserCodeCache[i + 2] = mmuUserCodeCache[i + 3] = 1; 22058: } 22059: if (mmuSuperDataCache[i + 3] == 0) { //エントリが有効かつNonGlobal 22060: mmuSuperDataCache[i] = mmuSuperDataCache[i + 1] = mmuSuperDataCache[i + 2] = mmuSuperDataCache[i + 3] = 1; 22061: } 22062: if (mmuSuperCodeCache[i + 3] == 0) { //エントリが有効かつNonGlobal 22063: mmuSuperCodeCache[i] = mmuSuperCodeCache[i + 1] = mmuSuperCodeCache[i + 2] = mmuSuperCodeCache[i + 3] = 1; 22064: } 22065: } 22066: } //mmuInvalidateAllNonGlobalCache() 22067: 22068: //mmuInvalidateCache (a) 22069: // PFLUSH (An) 22070: // アドレス変換キャッシュの、DFC=1またはDFC=2ならばユーザモード、DFC=5またはDFC=6ならばスーパーバイザモードの、 22071: // 論理ページアドレスがAnのエントリを無効化する 22072: public static void mmuInvalidateCache (int a) { 22073: int logicalPage = a & mmuPageAddressMask; 22074: boolean supervisor = (0b10011111 << 24 << XEiJ.mpuDFC) < 0; 22075: boolean instruction = (0b00101010 << 24 << XEiJ.mpuDFC) < 0; 22076: int[] cache = (supervisor ? 22077: instruction ? mmuSuperCodeCache : mmuSuperDataCache : 22078: instruction ? mmuUserCodeCache : mmuUserDataCache); 22079: int head = (logicalPage * MMU_HASH_COEFF >>> -MMU_HASH_BITS) * (4 * MMU_CACHE_WAYS); //先頭のエントリ 22080: if (MMU_CACHE_WAYS == 1) { //1way 22081: if (cache[head] == logicalPage) { //エントリが有効かつ論理ページアドレスがAn 22082: cache[head] = cache[head + 1] = cache[head + 2] = cache[head + 3] = 1; //末尾を空ける 22083: return; 22084: } 22085: } else { //2ways以上 22086: int tail = head + (4 * MMU_CACHE_WAYS - 4); //末尾のエントリ 22087: for (int i = head; i <= tail; i += 4) { 22088: if (cache[i] == logicalPage) { //エントリが有効かつ論理ページアドレスがAn 22089: for (int j = i; j < tail; j += 4) { //後ろを詰める 22090: cache[j ] = cache[j + 4]; 22091: cache[j + 1] = cache[j + 5]; 22092: cache[j + 2] = cache[j + 6]; 22093: cache[j + 3] = cache[j + 7]; 22094: } 22095: cache[tail] = cache[tail + 1] = cache[tail + 2] = cache[tail + 3] = 1; //末尾を空ける 22096: return; 22097: } 22098: } 22099: } 22100: } //mmuInvalidateCache(int) 22101: 22102: //mmuInvalidateNonGlobalCache (a) 22103: // PFLUSHN (An) 22104: // アドレス変換キャッシュの、DFC=1またはDFC=2ならばユーザモード、DFC=5またはDFC=6ならばスーパーバイザモードの、 22105: // 論理ページアドレスがAnかつNonGlobalのエントリを無効化する 22106: public static void mmuInvalidateNonGlobalCache (int a) { 22107: int logicalPage = a & mmuPageAddressMask; 22108: boolean supervisor = (0b10011111 << 24 << XEiJ.mpuDFC) < 0; 22109: boolean instruction = (0b00101010 << 24 << XEiJ.mpuDFC) < 0; 22110: int[] cache = (supervisor ? 22111: instruction ? mmuSuperCodeCache : mmuSuperDataCache : 22112: instruction ? mmuUserCodeCache : mmuUserDataCache); 22113: int head = (logicalPage * MMU_HASH_COEFF >>> -MMU_HASH_BITS) * (4 * MMU_CACHE_WAYS); //先頭のエントリ 22114: if (MMU_CACHE_WAYS == 1) { //1way 22115: if (cache[head] == logicalPage) { //エントリが有効かつ論理ページアドレスがAn 22116: if (cache[head + 3] == 0) { //エントリが有効かつNonGlobal 22117: cache[head] = cache[head + 1] = cache[head + 2] = cache[head + 3] = 1; //末尾を空ける 22118: } 22119: return; //論理ページアドレスがAnのエントリは1つだけなのでそれがNonGlobalでなければ何もしないで終了する 22120: } 22121: } else { //2ways以上 22122: int tail = head + (4 * MMU_CACHE_WAYS - 4); //末尾のエントリ 22123: for (int i = head; i <= tail; i += 4) { 22124: if (cache[i] == logicalPage) { //エントリが有効かつ論理ページアドレスがAn 22125: if (cache[i + 3] == 0) { //エントリが有効かつNonGlobal 22126: for (int j = i; j < tail; j += 4) { //後ろを詰める 22127: cache[j ] = cache[j + 4]; 22128: cache[j + 1] = cache[j + 5]; 22129: cache[j + 2] = cache[j + 6]; 22130: cache[j + 3] = cache[j + 7]; 22131: } 22132: cache[tail] = cache[tail + 1] = cache[tail + 2] = cache[tail + 3] = 1; //末尾を空ける 22133: } 22134: return; //論理ページアドレスがAnのエントリは1つだけなのでそれがNonGlobalでなければ何もしないで終了する 22135: } 22136: } 22137: } 22138: } //mmuInvalidateNonGlobalCache(int) 22139: 22140: //-------------------------------------------------------------------------------- 22141: //初期化 22142: 22143: //mmuInit () 22144: // 初期化 22145: public static void mmuInit () { 22146: mmuUserDataTransparent = new int[256]; 22147: mmuUserCodeTransparent = new int[256]; 22148: mmuSuperDataTransparent = new int[256]; 22149: mmuSuperCodeTransparent = new int[256]; 22150: mmuUserDataDifference = new int[256]; 22151: mmuUserCodeDifference = new int[256]; 22152: mmuSuperDataDifference = new int[256]; 22153: mmuSuperCodeDifference = new int[256]; 22154: mmuReset (); 22155: } //mmuInit() 22156: 22157: //mmuReset () 22158: // リセット 22159: public static void mmuReset () { 22160: mmuSetDataTransparent (0, 0); 22161: mmuSetCodeTransparent (0, 0); 22162: mmuSetTCR (0); 22163: } //mmuReset() 22164: 22165: //-------------------------------------------------------------------------------- 22166: //バスアクセス 22167: // 22168: // ByteSign byte バイト符号拡張 22169: // ByteZero int バイトゼロ拡張 22170: // WordSign int ワード符号拡張 22171: // WordZero int ワードゼロ拡張 22172: // Long int ロング 22173: // Quad long クワッド 22174: // 22175: // Data データ 1 先頭 22176: // Second データ 1 2番目 22177: // Even データ 2 先頭 22178: // Four データ 4 先頭 22179: // Code コード 2 先頭 22180: // Opword コード 2 先頭(命令ワード) 22181: // Exword コード 2 2番目(拡張ワード) 22182: // 22183: // バイト 22184: // 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 22185: // ┳━┯━┯━┯━┳━┯━┯━┯━┳━┯━┯━┯━┳━┯━┯━┯━┳ 22186: // ┃ │ │ │ ┃ │ │ │ ┃ │ │ │ ┃ │ │ │ ┃ 22187: // ┻━┷━┷━┷━┻━┷━┷━┷━┻━┷━┷━┷━┻━┷━┷━┷━┻ 22188: // ┏━┓ 22189: // ┃ B┃ 22190: // ┗━┛ 22191: // 0 22192: // 22193: // ワード 22194: // 偶数 22195: // 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 22196: // ┳━┯━┯━┯━┳━┯━┯━┯━┳━┯━┯━┯━┳━┯━┯━┯━┳ 22197: // ┃ │ │ │ ┃ │ │ │ ┃ │ │ │ ┃ │ │ │ ┃ 22198: // ┻━┷━┷━┷━┻━┷━┷━┷━┻━┷━┷━┷━┻━┷━┷━┷━┻ 22199: // ┏━━━┓ 22200: // ┃ W ┃ 22201: // ┗━━━┛ 22202: // 0 22203: // 奇数 22204: // -1 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 22205: // ┳━┯━┯━┯━┳━┯━┯━┯━┳━┯━┯━┯━┳━┯━┯━┯━┳ 22206: // ┃ │ │ │ ┃ │ │ │ ┃ │ │ │ ┃ │ │ │ ┃ 22207: // ┻━┷━┷━┷━┻━┷━┷━┷━┻━┷━┷━┷━┻━┷━┷━┷━┻ 22208: // ┏━┳━┓ 22209: // ┃ B┃ B┃ 22210: // ┗━┻━┛ 22211: // 8 0 22212: // 22213: // ロング 22214: // 4の倍数 22215: // 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 22216: // ┳━┯━┯━┯━┳━┯━┯━┯━┳━┯━┯━┯━┳━┯━┯━┯━┳ 22217: // ┃ │ │ │ ┃ │ │ │ ┃ │ │ │ ┃ │ │ │ ┃ 22218: // ┻━┷━┷━┷━┻━┷━┷━┷━┻━┷━┷━┷━┻━┷━┷━┷━┻ 22219: // ┏━━━━━━━┓ 22220: // ┃ L ┃ 22221: // ┗━━━━━━━┛ 22222: // 0 22223: // 4の倍数+1 22224: // -1 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 22225: // ┳━┯━┯━┯━┳━┯━┯━┯━┳━┯━┯━┯━┳━┯━┯━┯━┳ 22226: // ┃ │ │ │ ┃ │ │ │ ┃ │ │ │ ┃ │ │ │ ┃ 22227: // ┻━┷━┷━┷━┻━┷━┷━┷━┻━┷━┷━┷━┻━┷━┷━┷━┻ 22228: // ┏━┳━━━┳━┓ 22229: // ┃ B┃ W ┃ B┃ 22230: // ┗━┻━━━┻━┛ 22231: // 24 8 0 22232: // 4の倍数+2 22233: // -2 -1 0 1 2 3 4 5 6 7 8 9 10 11 12 13 22234: // ┳━┯━┯━┯━┳━┯━┯━┯━┳━┯━┯━┯━┳━┯━┯━┯━┳ 22235: // ┃ │ │ │ ┃ │ │ │ ┃ │ │ │ ┃ │ │ │ ┃ 22236: // ┻━┷━┷━┷━┻━┷━┷━┷━┻━┷━┷━┷━┻━┷━┷━┷━┻ 22237: // ┏━━━┳━━━┓ 22238: // ┃ W ┃ W ┃ 22239: // ┗━━━┻━━━┛ 22240: // 16 0 22241: // 4の倍数+3 22242: // -3 -2 -1 0 1 2 3 4 5 6 7 8 9 10 11 12 22243: // ┳━┯━┯━┯━┳━┯━┯━┯━┳━┯━┯━┯━┳━┯━┯━┯━┳ 22244: // ┃ │ │ │ ┃ │ │ │ ┃ │ │ │ ┃ │ │ │ ┃ 22245: // ┻━┷━┷━┷━┻━┷━┷━┷━┻━┷━┷━┷━┻━┷━┷━┷━┻ 22246: // ┏━┳━━━┳━┓ 22247: // ┃ B┃ W ┃ B┃ 22248: // ┗━┻━━━┻━┛ 22249: // 24 8 0 22250: // 22251: // クワッド 22252: // 4の倍数 22253: // 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 22254: // ┳━┯━┯━┯━┳━┯━┯━┯━┳━┯━┯━┯━┳━┯━┯━┯━┳ 22255: // ┃ │ │ │ ┃ │ │ │ ┃ │ │ │ ┃ │ │ │ ┃ 22256: // ┻━┷━┷━┷━┻━┷━┷━┷━┻━┷━┷━┷━┻━┷━┷━┷━┻ 22257: // ┏━━━━━━━┳━━━━━━━┓ 22258: // ┃ L ┃ L ┃ 22259: // ┗━━━━━━━┻━━━━━━━┛ 22260: // 32 0 22261: // 4の倍数+1 22262: // -1 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 22263: // ┳━┯━┯━┯━┳━┯━┯━┯━┳━┯━┯━┯━┳━┯━┯━┯━┳ 22264: // ┃ │ │ │ ┃ │ │ │ ┃ │ │ │ ┃ │ │ │ ┃ 22265: // ┻━┷━┷━┷━┻━┷━┷━┷━┻━┷━┷━┷━┻━┷━┷━┷━┻ 22266: // ┏━┳━━━┳━━━━━━━┳━┓ 22267: // ┃ B┃ W ┃ L ┃ B┃ 22268: // ┗━┻━━━┻━━━━━━━┻━┛ 22269: // 56 40 8 0 22270: // 4の倍数+2 22271: // -2 -1 0 1 2 3 4 5 6 7 8 9 10 11 12 13 22272: // ┳━┯━┯━┯━┳━┯━┯━┯━┳━┯━┯━┯━┳━┯━┯━┯━┳ 22273: // ┃ │ │ │ ┃ │ │ │ ┃ │ │ │ ┃ │ │ │ ┃ 22274: // ┻━┷━┷━┷━┻━┷━┷━┷━┻━┷━┷━┷━┻━┷━┷━┷━┻ 22275: // ┏━━━┳━━━━━━━┳━━━┓ 22276: // ┃ W ┃ L ┃ W ┃ 22277: // ┗━━━┻━━━━━━━┻━━━┛ 22278: // 48 16 0 22279: // 4の倍数+3 22280: // -3 -2 -1 0 1 2 3 4 5 6 7 8 9 10 11 12 22281: // ┳━┯━┯━┯━┳━┯━┯━┯━┳━┯━┯━┯━┳━┯━┯━┯━┳ 22282: // ┃ │ │ │ ┃ │ │ │ ┃ │ │ │ ┃ │ │ │ ┃ 22283: // ┻━┷━┷━┷━┻━┷━┷━┷━┻━┷━┷━┷━┻━┷━┷━┷━┻ 22284: // ┏━┳━━━━━━━┳━━━┳━┓ 22285: // ┃ B┃ L ┃ W ┃ B┃ 22286: // ┗━┻━━━━━━━┻━━━┻━┛ 22287: // 56 24 8 0 22288: // 22289: 22290: //-------------------------------------------------------------------------------- 22291: //ピーク 22292: // デバッガ用 22293: // エラーや副作用なしでリードする 22294: // アドレス変換はピーク 22295: // ページフォルトやバスエラーのときは-1をキャストした値を返す 22296: 22297: //d = mmuPeekByteSign (a, f) 22298: // ピークバイト符号拡張 22299: public static byte mmuPeekByteSign (int a, int f) { 22300: f = f == -1 ? XEiJ.regSRS != 0 ? 5 : 1 : f & 7; 22301: MemoryMappedDevice[] mm = (DataBreakPoint.DBP_ON ? 22302: (f & 4) != 0 ? DataBreakPoint.dbpSuperMap : DataBreakPoint.dbpUserMap : 22303: (f & 4) != 0 ? XEiJ.busSuperMap : XEiJ.busUserMap); 22304: // 01234567 22305: if (0b01100110 << 24 << f < 0) { //SFC=1,2,5,6。アドレス変換あり 22306: int a0 = mmuTranslatePeek (a, f & 4, f & 2); 22307: return (a ^ a0) != 1 ? mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdPbs (a0) : -1; 22308: } else if (f != 7) { //SFC=0,3,4。アドレス変換なし 22309: return mm[a >>> XEiJ.BUS_PAGE_BITS].mmdPbs (a); 22310: } else { 22311: return -1; 22312: } 22313: } //mmuPeekByteSign(int,int) 22314: 22315: //d = mmuPeekByteZero (a, f) 22316: // ピークバイトゼロ拡張 22317: public static int mmuPeekByteZero (int a, int f) { 22318: f = f == -1 ? XEiJ.regSRS != 0 ? 5 : 1 : f & 7; 22319: MemoryMappedDevice[] mm = (DataBreakPoint.DBP_ON ? 22320: (f & 4) != 0 ? DataBreakPoint.dbpSuperMap : DataBreakPoint.dbpUserMap : 22321: (f & 4) != 0 ? XEiJ.busSuperMap : XEiJ.busUserMap); 22322: // 01234567 22323: if (0b01100110 << 24 << f < 0) { //SFC=1,2,5,6。アドレス変換あり 22324: int a0 = mmuTranslatePeek (a, f & 4, f & 2); 22325: return (a ^ a0) != 1 ? mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdPbz (a0) : 0xff; 22326: // ^ ^^^^ 22327: } else if (f != 7) { //SFC=0,3,4。アドレス変換なし 22328: return mm[a >>> XEiJ.BUS_PAGE_BITS].mmdPbz (a); 22329: // ^ 22330: } else { 22331: return 0xff; 22332: // ^^^^ 22333: } 22334: } //mmuPeekByteZero(int,int) 22335: 22336: //d = mmuPeekByteSignData (a, supervisor) 22337: // ピークバイト符号拡張(データ) 22338: public static byte mmuPeekByteSignData (int a, int supervisor) { 22339: MemoryMappedDevice[] mm = supervisor != 0 ? DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap : DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap; 22340: int a0 = mmuTranslatePeek (a, supervisor, 0); 22341: return (a ^ a0) == 1 ? -1 : mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdPbs (a0); 22342: } //mmuPeekByteSignData(int,int) 22343: 22344: //d = mmuPeekByteSignCode (a, supervisor) 22345: // ピークバイト符号拡張(コード) 22346: public static byte mmuPeekByteSignCode (int a, int supervisor) { 22347: MemoryMappedDevice[] mm = supervisor != 0 ? DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap : DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap; 22348: int a0 = mmuTranslatePeek (a, supervisor, 1); 22349: return (a ^ a0) == 1 ? -1 : mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdPbs (a0); 22350: } //mmuPeekByteSignCode(int,int) 22351: 22352: //d = mmuPeekByteZeroData (a, supervisor) 22353: // ピークバイトゼロ拡張(データ) 22354: public static int mmuPeekByteZeroData (int a, int supervisor) { 22355: MemoryMappedDevice[] mm = supervisor != 0 ? DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap : DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap; 22356: int a0 = mmuTranslatePeek (a, supervisor, 0); 22357: return (a ^ a0) == 1 ? 255 : mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdPbz (a0); 22358: } //mmuPeekByteZeroData(int,int) 22359: 22360: //d = mmuPeekByteZeroCode (a, supervisor) 22361: // ピークバイトゼロ拡張(コード) 22362: public static int mmuPeekByteZeroCode (int a, int supervisor) { 22363: MemoryMappedDevice[] mm = supervisor != 0 ? DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap : DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap; 22364: int a0 = mmuTranslatePeek (a, supervisor, 1); 22365: return (a ^ a0) == 1 ? 255 : mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdPbz (a0); 22366: } //mmuPeekByteZeroCode(int,int) 22367: 22368: //d = mmuPeekWordSign (a, f) 22369: // ピークワード符号拡張 22370: public static int mmuPeekWordSign (int a, int f) { 22371: f = f == -1 ? XEiJ.regSRS != 0 ? 5 : 1 : f & 7; 22372: MemoryMappedDevice[] mm = (DataBreakPoint.DBP_ON ? 22373: (f & 4) != 0 ? DataBreakPoint.dbpSuperMap : DataBreakPoint.dbpUserMap : 22374: (f & 4) != 0 ? XEiJ.busSuperMap : XEiJ.busUserMap); 22375: // 01234567 22376: if (0b01100110 << 24 << f < 0) { //SFC=1,2,5,6。アドレス変換あり 22377: int a0 = mmuTranslatePeek (a, f & 4, f & 2); 22378: if ((a & 1) == 0) { //偶数 22379: return (a ^ a0) != 1 ? mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdPws (a0) : -1; 22380: } else { //奇数 22381: int a1 = mmuTranslatePeek (a + 1, f & 4, f & 2); 22382: return (((a ^ a0) != 1 ? mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdPbs (a0) : -1) << 8 | 22383: ((a + 1 ^ a1) != 1 ? mm[a1 >>> XEiJ.BUS_PAGE_BITS].mmdPbz (a1) : 255)); 22384: } 22385: } else if (f != 7) { //SFC=0,3,4。アドレス変換なし 22386: if ((a & 1) == 0) { //偶数 22387: return mm[a >>> XEiJ.BUS_PAGE_BITS].mmdPws (a); 22388: } else { //奇数 22389: return (mm[a >>> XEiJ.BUS_PAGE_BITS].mmdPbs (a ) << 8 | 22390: mm[a + 1 >>> XEiJ.BUS_PAGE_BITS].mmdPbz (a + 1)); 22391: } 22392: } else { 22393: return -1; 22394: } 22395: } //mmuPeekWordSign(int,int) 22396: 22397: //d = mmuPeekWordSignData (a, supervisor) 22398: // ピークワード符号拡張(データ) 22399: public static int mmuPeekWordSignData (int a, int supervisor) { 22400: MemoryMappedDevice[] mm = supervisor != 0 ? DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap : DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap; 22401: int a0 = mmuTranslatePeek (a, supervisor, 0); //a+1が必要なので上書き不可 22402: if ((a & 1) == 0) { //偶数 22403: return (a0 & 1) != 0 ? -1 : mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdPws (a0); 22404: } else { //奇数 22405: int a1 = mmuTranslatePeek (a + 1, supervisor, 0); 22406: return (((a0 & 1) == 0 ? -1 : mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdPbs (a0)) << 8 | 22407: ((a1 & 1) != 0 ? 255 : mm[a1 >>> XEiJ.BUS_PAGE_BITS].mmdPbz (a1))); 22408: } 22409: } //mmuPeekWordSignData(int,int) 22410: 22411: //d = mmuPeekWordSignEven (a, supervisor) 22412: // ピークワード符号拡張(偶数) 22413: public static int mmuPeekWordSignEven (int a, int supervisor) { 22414: MemoryMappedDevice[] mm = supervisor != 0 ? DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap : DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap; 22415: a = mmuTranslatePeek (a, supervisor, 0); 22416: return (a & 1) != 0 ? -1 : mm[a >>> XEiJ.BUS_PAGE_BITS].mmdPws (a); 22417: } //mmuPeekWordSignEven(int,int) 22418: 22419: //d = mmuPeekWordSignCode (a, supervisor) 22420: // ピークワード符号拡張(コード) 22421: public static int mmuPeekWordSignCode (int a, int supervisor) { 22422: MemoryMappedDevice[] mm = supervisor != 0 ? DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap : DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap; 22423: a = mmuTranslatePeek (a, supervisor, 1); 22424: return (a & 1) != 0 ? -1 : mm[a >>> XEiJ.BUS_PAGE_BITS].mmdPws (a); 22425: } //mmuPeekWordSignCode(int,int) 22426: 22427: //d = mmuPeekWordZeroData (a, supervisor) 22428: // ピークワードゼロ拡張(データ) 22429: public static int mmuPeekWordZeroData (int a, int supervisor) { 22430: MemoryMappedDevice[] mm = supervisor != 0 ? DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap : DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap; 22431: int a0 = mmuTranslatePeek (a, supervisor, 0); //a+1が必要なので上書き不可 22432: if ((a & 1) == 0) { //偶数 22433: return (a0 & 1) != 0 ? 65535 : mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdPwz (a0); 22434: } else { //奇数 22435: int a1 = mmuTranslatePeek (a + 1, supervisor, 0); 22436: return (((a0 & 1) == 0 ? 255 : mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdPbz (a0)) << 8 | 22437: ((a1 & 1) != 0 ? 255 : mm[a1 >>> XEiJ.BUS_PAGE_BITS].mmdPbz (a1))); 22438: } 22439: } //mmuPeekWordZeroData(int,int) 22440: 22441: //d = mmuPeekWordZeroEven (a, supervisor) 22442: // ピークワードゼロ拡張(偶数) 22443: public static int mmuPeekWordZeroEven (int a, int supervisor) { 22444: MemoryMappedDevice[] mm = supervisor != 0 ? DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap : DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap; 22445: a = mmuTranslatePeek (a, supervisor, 0); 22446: return (a & 1) != 0 ? 65535 : mm[a >>> XEiJ.BUS_PAGE_BITS].mmdPwz (a); 22447: } //mmuPeekWordZeroEven(int,int) 22448: 22449: //d = mmuPeekWordZeroCode (a, supervisor) 22450: // ピークワードゼロ拡張(コード) 22451: public static int mmuPeekWordZeroCode (int a, int supervisor) { 22452: MemoryMappedDevice[] mm = supervisor != 0 ? DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap : DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap; 22453: a = mmuTranslatePeek (a, supervisor, 1); 22454: return (a & 1) != 0 ? 65535 : mm[a >>> XEiJ.BUS_PAGE_BITS].mmdPwz (a); 22455: } //mmuPeekWordZeroCode(int,int) 22456: 22457: //d = mmuPeekLong (a, f) 22458: // ピークロング 22459: public static int mmuPeekLong (int a, int f) { 22460: f = f == -1 ? XEiJ.regSRS != 0 ? 5 : 1 : f & 7; 22461: MemoryMappedDevice[] mm = (DataBreakPoint.DBP_ON ? 22462: (f & 4) != 0 ? DataBreakPoint.dbpSuperMap : DataBreakPoint.dbpUserMap : 22463: (f & 4) != 0 ? XEiJ.busSuperMap : XEiJ.busUserMap); 22464: // 01234567 22465: if (0b01100110 << 24 << f < 0) { //SFC=1,2,5,6。アドレス変換あり 22466: int a0 = mmuTranslatePeek (a, f & 4, f & 2); 22467: if ((a & 3) == 0) { //4の倍数 22468: return (a ^ a0) != 1 ? mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdPls (a0) : -1; 22469: } else if ((a & 1) == 0) { //4の倍数ではない偶数 22470: int a2 = mmuTranslatePeek (a + 2, f & 4, f & 2); 22471: return (((a ^ a0) != 1 ? mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdPws (a0) : -1) << 16 | 22472: ((a + 2 ^ a2) != 1 ? mm[a2 >>> XEiJ.BUS_PAGE_BITS].mmdPwz (a2) : 65535)); 22473: } else { //奇数 22474: int a1 = mmuTranslatePeek (a + 1, f & 4, f & 2); 22475: int a3 = mmuTranslatePeek (a + 3, f & 4, f & 2); 22476: return (((a ^ a0) != 1 ? mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdPbs (a0) : -1) << 24 | 22477: ((a + 1 ^ a1) != 1 ? mm[a1 >>> XEiJ.BUS_PAGE_BITS].mmdPwz (a1) : 65535) << 8 | 22478: ((a + 3 ^ a3) != 1 ? mm[a3 >>> XEiJ.BUS_PAGE_BITS].mmdPbz (a3) : 255)); 22479: } 22480: } else if (f != 7) { //SFC=0,3,4。アドレス変換なし 22481: if ((a & 3) == 0) { //4の倍数 22482: return mm[a >>> XEiJ.BUS_PAGE_BITS].mmdPls (a); 22483: } else if ((a & 1) == 0) { //4の倍数ではない偶数 22484: return (mm[a >>> XEiJ.BUS_PAGE_BITS].mmdPws (a ) << 16 | 22485: mm[a + 2 >>> XEiJ.BUS_PAGE_BITS].mmdPwz (a + 2)); 22486: } else { //奇数 22487: return (mm[a >>> XEiJ.BUS_PAGE_BITS].mmdPbs (a ) << 24 | 22488: mm[a + 1 >>> XEiJ.BUS_PAGE_BITS].mmdPwz (a + 1) << 8 | 22489: mm[a + 3 >>> XEiJ.BUS_PAGE_BITS].mmdPbz (a + 3)); 22490: } 22491: } else { 22492: return -1; 22493: } 22494: } //mmuPeekLong(int,int) 22495: 22496: //d = mmuPeekLongData (a, supervisor) 22497: // ピークロング(データ) 22498: public static int mmuPeekLongData (int a, int supervisor) { 22499: MemoryMappedDevice[] mm = supervisor != 0 ? DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap : DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap; 22500: int a0 = mmuTranslatePeek (a, supervisor, 0); //a+1,a+2,a+3が必要なので上書き不可 22501: if ((a & 3) == 0) { //4の倍数 22502: return (a0 & 1) != 0 ? -1 : mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdPls (a0); 22503: } else if ((a & 1) == 0) { //4の倍数+2 22504: int a2 = mmuTranslatePeek (a + 2, supervisor, 0); 22505: return (((a0 & 1) != 0 ? -1 : mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdPws (a0)) << 16 | 22506: ((a2 & 1) != 0 ? 65535 : mm[a2 >>> XEiJ.BUS_PAGE_BITS].mmdPwz (a2))); 22507: } else { //奇数 22508: int a1 = mmuTranslatePeek (a + 1, supervisor, 0); 22509: int a3 = mmuTranslatePeek (a + 3, supervisor, 0); 22510: return (((a0 & 1) == 0 ? -1 : mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdPbs (a0)) << 24 | 22511: ((a1 & 1) != 0 ? 65535 : mm[a1 >>> XEiJ.BUS_PAGE_BITS].mmdPwz (a1)) << 16 | 22512: ((a3 & 1) != 0 ? 255 : mm[a3 >>> XEiJ.BUS_PAGE_BITS].mmdPbz (a3))); 22513: } 22514: } //mmuPeekLongData(int,int) 22515: 22516: //d = mmuPeekLongEven (a, supervisor) 22517: // ピークロング(偶数) 22518: public static int mmuPeekLongEven (int a, int supervisor) { 22519: MemoryMappedDevice[] mm = supervisor != 0 ? DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap : DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap; 22520: int a0 = mmuTranslatePeek (a, supervisor, 0); //a+2が必要なので上書き不可 22521: if ((a & 2) == 0) { //4の倍数 22522: return (a0 & 1) != 0 ? -1 : mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdPls (a0); 22523: } else { //4の倍数+2 22524: int a2 = mmuTranslatePeek (a + 2, supervisor, 0); 22525: return (((a0 & 1) != 0 ? -1 : mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdPws (a0)) << 16 | 22526: ((a2 & 1) != 0 ? 65535 : mm[a2 >>> XEiJ.BUS_PAGE_BITS].mmdPwz (a2))); 22527: } 22528: } //mmuPeekLongEven(int,int) 22529: 22530: //d = mmuPeekLongFour (a, supervisor) 22531: // ピークロング(4の倍数) 22532: public static int mmuPeekLongFour (int a, int supervisor) { 22533: MemoryMappedDevice[] mm = supervisor != 0 ? DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap : DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap; 22534: a = mmuTranslatePeek (a, supervisor, 0); 22535: return (a & 1) != 0 ? -1 : mm[a >>> XEiJ.BUS_PAGE_BITS].mmdPls (a); 22536: } //mmuPeekLongFour(int,int) 22537: 22538: //d = mmuPeekLongCode (a, supervisor) 22539: // ピークロング(コード) 22540: public static int mmuPeekLongCode (int a, int supervisor) { 22541: MemoryMappedDevice[] mm = supervisor != 0 ? DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap : DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap; 22542: int a0 = mmuTranslatePeek (a, supervisor, 1); //a+2が必要なので上書き不可 22543: if ((a & 2) == 0) { //4の倍数 22544: return (a0 & 1) != 0 ? -1 : mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdPls (a0); 22545: } else { //4の倍数+2 22546: int a2 = mmuTranslatePeek (a + 2, supervisor, 1); 22547: return (((a0 & 1) != 0 ? -1 : mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdPws (a0)) << 16 | 22548: ((a2 & 1) != 0 ? 65535 : mm[a2 >>> XEiJ.BUS_PAGE_BITS].mmdPwz (a2))); 22549: } 22550: } //mmuPeekLongCode(int,int) 22551: 22552: //d = mmuPeekQuad (a, f) 22553: // ピーククワッド 22554: public static long mmuPeekQuad (int a, int f) { 22555: return (long) mmuPeekLong (a, f) << 32 | mmuPeekLong (a + 4, f) & 0xffffffffL; 22556: } //mmuPeekQuad(int,int) 22557: 22558: //d = mmuPeekQuadData (a, supervisor) 22559: // ピーククワッド(データ) 22560: public static long mmuPeekQuadData (int a, int supervisor) { 22561: MemoryMappedDevice[] mm = supervisor != 0 ? DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap : DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap; 22562: int a0 = mmuTranslatePeek (a, supervisor, 0); //a+1,a+2,a+3,a+4,a+5,a+6,a+7が必要なので上書き不可 22563: if ((a & 3) == 0) { //4の倍数 22564: int a4 = mmuTranslatePeek (a + 4, supervisor, 0); //4の倍数 22565: return ((long) ((a0 & 1) != 0 ? -1 : mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdPls (a0)) << 32 | 22566: (long) ((a4 & 1) != 0 ? -1 : mm[a4 >>> XEiJ.BUS_PAGE_BITS].mmdPls (a4)) & 0x00000000ffffffffL); 22567: } else if ((a & 1) == 0) { //4の倍数+2 22568: int a2 = mmuTranslatePeek (a + 2, supervisor, 0); //4の倍数 22569: int a6 = mmuTranslatePeek (a + 6, supervisor, 0); //4の倍数 22570: return ((long) ((a0 & 1) != 0 ? -1 : mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdPws (a0)) << 48 | 22571: (long) ((a2 & 1) != 0 ? -1 : mm[a2 >>> XEiJ.BUS_PAGE_BITS].mmdPls (a2)) << 16 & 0x0000ffffffff0000L | 22572: (long) ((a6 & 1) != 0 ? 65535 : mm[a6 >>> XEiJ.BUS_PAGE_BITS].mmdPwz (a6))); 22573: } else if ((a & 3) == 1) { //4の倍数+1 22574: int a1 = mmuTranslatePeek (a + 1, supervisor, 0); //4の倍数+2 22575: int a3 = mmuTranslatePeek (a + 3, supervisor, 0); //4の倍数 22576: int a7 = mmuTranslatePeek (a + 7, supervisor, 0); //4の倍数 22577: return ((long) ((a0 & 1) != 0 ? -1 : mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdPbs (a0)) << 56 | 22578: (long) ((a1 & 1) != 0 ? 65535 : mm[a1 >>> XEiJ.BUS_PAGE_BITS].mmdPwz (a1)) << 40 | 22579: (long) ((a3 & 1) != 0 ? -1 : mm[a3 >>> XEiJ.BUS_PAGE_BITS].mmdPls (a3)) << 8 & 0x000000ffffffff00L | 22580: (long) ((a7 & 1) != 0 ? 255 : mm[a7 >>> XEiJ.BUS_PAGE_BITS].mmdPbz (a7))); 22581: } else { //4の倍数+3 22582: int a1 = mmuTranslatePeek (a + 1, supervisor, 0); //4の倍数 22583: int a5 = mmuTranslatePeek (a + 5, supervisor, 0); //4の倍数 22584: int a7 = mmuTranslatePeek (a + 7, supervisor, 0); //4の倍数+2 22585: return ((long) ((a0 & 1) != 0 ? -1 : mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdPbs (a0)) << 56 | 22586: (long) ((a1 & 1) != 0 ? -1 : mm[a1 >>> XEiJ.BUS_PAGE_BITS].mmdPls (a1)) << 24 & 0x00ffffffff000000L | 22587: (long) ((a5 & 1) != 0 ? 65535 : mm[a5 >>> XEiJ.BUS_PAGE_BITS].mmdPwz (a5)) << 8 | 22588: (long) ((a7 & 1) != 0 ? 255 : mm[a7 >>> XEiJ.BUS_PAGE_BITS].mmdPbz (a7))); 22589: } 22590: } //mmuPeekQuadData(int,int) 22591: 22592: //d = mmuPeekQuadEven (a, supervisor) 22593: // ピーククワッド(偶数) 22594: public static long mmuPeekQuadEven (int a, int supervisor) { 22595: MemoryMappedDevice[] mm = supervisor != 0 ? DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap : DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap; 22596: int a0 = mmuTranslatePeek (a, supervisor, 0); //a+2,a+4,a+6が必要なので上書き不可 22597: if ((a & 2) == 0) { //4の倍数 22598: int a4 = mmuTranslatePeek (a + 4, supervisor, 0); //4の倍数 22599: return ((long) ((a0 & 1) != 0 ? -1 : mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdPls (a0)) << 32 | 22600: (long) ((a4 & 1) != 0 ? -1 : mm[a4 >>> XEiJ.BUS_PAGE_BITS].mmdPls (a4)) & 0x00000000ffffffffL); 22601: } else { //4の倍数+2 22602: int a2 = mmuTranslatePeek (a + 2, supervisor, 0); //4の倍数 22603: int a6 = mmuTranslatePeek (a + 6, supervisor, 0); //4の倍数 22604: return ((long) ((a0 & 1) != 0 ? -1 : mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdPws (a0)) << 48 | 22605: (long) ((a2 & 1) != 0 ? -1 : mm[a2 >>> XEiJ.BUS_PAGE_BITS].mmdPls (a2)) << 16 & 0x0000ffffffff0000L | 22606: (long) ((a6 & 1) != 0 ? 65535 : mm[a6 >>> XEiJ.BUS_PAGE_BITS].mmdPwz (a6))); 22607: } 22608: } //mmuPeekQuadEven(int,int) 22609: 22610: //d = mmuPeekQuadFour (a, supervisor) 22611: // ピーククワッド(4の倍数) 22612: public static long mmuPeekQuadFour (int a, int supervisor) { 22613: MemoryMappedDevice[] mm = supervisor != 0 ? DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap : DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap; 22614: int a0 = mmuTranslatePeek (a , supervisor, 0); //4の倍数。a+4が必要なので上書き不可 22615: int a4 = mmuTranslatePeek (a + 4, supervisor, 0); //4の倍数 22616: return ((long) ((a0 & 1) != 0 ? -1 : mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdPls (a0)) << 32 | 22617: (long) ((a4 & 1) != 0 ? -1 : mm[a4 >>> XEiJ.BUS_PAGE_BITS].mmdPls (a4)) & 0x00000000ffffffffL); 22618: } //mmuPeekQuadFour(int,int) 22619: 22620: //d = mmuPeekQuadCode (a, supervisor) 22621: // ピーククワッド(コード) 22622: public static long mmuPeekQuadCode (int a, int supervisor) { 22623: MemoryMappedDevice[] mm = supervisor != 0 ? DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap : DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap; 22624: int a0 = mmuTranslatePeek (a, supervisor, 1); //a+2,a+4,a+6が必要なので上書き不可 22625: if ((a & 2) == 0) { //4の倍数 22626: int a4 = mmuTranslatePeek (a + 4, supervisor, 1); 22627: return ((long) ((a0 & 1) != 0 ? -1 : mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdPls (a0)) << 32 | 22628: (long) ((a4 & 1) != 0 ? -1 : mm[a4 >>> XEiJ.BUS_PAGE_BITS].mmdPls (a4)) & 0x00000000ffffffffL); 22629: } else { //4の倍数+2 22630: int a2 = mmuTranslatePeek (a + 2, supervisor, 1); //4の倍数 22631: int a6 = mmuTranslatePeek (a + 6, supervisor, 1); //4の倍数 22632: return ((long) ((a0 & 1) != 0 ? -1 : mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdPws (a0)) << 48 | 22633: (long) ((a2 & 1) != 0 ? -1 : mm[a2 >>> XEiJ.BUS_PAGE_BITS].mmdPls (a2)) << 16 & 0x0000ffffffff0000L | 22634: (long) ((a6 & 1) != 0 ? 65535 : mm[a6 >>> XEiJ.BUS_PAGE_BITS].mmdPwz (a6))); 22635: } 22636: } //mmuPeekQuadCode(int,int) 22637: 22638: //mmuPeekExtended (a, b, f) 22639: // ピークエクステンデッド 22640: public static void mmuPeekExtended (int a, byte[] b, int f) { 22641: for (int i = 0; i < 12; i++) { 22642: b[i] = mmuPeekByteSign (a + i, f); 22643: } 22644: } //mmuPeekExtended(int,int,byte[]) 22645: 22646: //len = mmuPeekStrlen (a, l) 22647: public static int mmuPeekStrlen (int a, int l, int supervisor) { 22648: for (int i = 0; i < l; i++) { 22649: if (mmuPeekByteZeroData (a + i, supervisor) == 0) { 22650: return i; 22651: } 22652: } 22653: return l; 22654: } //mmuPeekStrlen(int,int,int) 22655: 22656: //bool = mmuPeekEquals (a, str) 22657: // アドレスaから始まるSJISの文字列とstrをSJISに変換してエスケープシーケンスを展開した文字列を比較する 22658: // 終端の\0まで比較するときはstrに\0を含めること 22659: // \x??で任意のSJISの文字を書ける 22660: // SJISに変換できない文字は'※'とみなす 22661: // スーパーバイザモード比較する 22662: public static boolean mmuPeekEquals (int a, String str) { 22663: int len = str.length (); 22664: for (int i = 0; i < len; i++) { 22665: int c = str.charAt (i); 22666: if (c == '\\') { //エスケープシーケンス。SJIS変換を省略する 22667: int d = i + 1 < len ? str.charAt (i + 1) : -1; //2文字目 22668: if ((d & -4) == '0') { // \[0-3][0-7]{0,2} 22669: c = d & 7; 22670: d = i + 2 < len ? str.charAt (i + 2) : -1; //3文字目 22671: if ((d & -8) == '0') { 22672: c = c << 3 | (d & 7); 22673: d = i + 3 < len ? str.charAt (i + 3) : -1; //4文字目 22674: if ((d & -8) == '0') { 22675: c = c << 3 | (d & 7); 22676: i++; //4文字 22677: } 22678: i++; //3文字 22679: } 22680: i++; //2文字 22681: } else if ((d & -4) == '4') { // \[4-7][0-7]? 22682: c = d & 7; 22683: d = i + 2 < len ? str.charAt (i + 2) : -1; //3文字目 22684: if ((d & -8) == '0') { 22685: c = c << 3 | (d & 7); 22686: i++; //3文字 22687: } 22688: i++; //2文字 22689: } else if (d == 'b') { // \b 22690: c = 0x08; //BS 22691: i++; //2文字 22692: } else if (d == 't') { // \t 22693: c = 0x09; //HT 22694: i++; //2文字 22695: } else if (d == 'n') { // \n 22696: c = 0x0a; //LF 22697: i++; //2文字 22698: } else if (d == 'v') { // \v 22699: c = 0x0b; //VT 22700: i++; //2文字 22701: } else if (d == 'f') { // \f 22702: c = 0x0c; //FF 22703: i++; //2文字 22704: } else if (d == 'r') { // \r 22705: c = 0x0d; //CR 22706: i++; //2文字 22707: } else if (d == 'x' && 22708: i + 3 < len && 22709: CharacterCode.chrIsXdigit (str.charAt (i + 2)) && 22710: CharacterCode.chrIsXdigit (str.charAt (i + 3))) { // \x[0-9A-Fa-f]{2} 22711: c = (CharacterCode.chrDigit (str.charAt (i + 2)) << 4 | 22712: CharacterCode.chrDigit (str.charAt (i + 3))); 22713: i += 3; //4文字 22714: } else if ('!' <= d && d <= '~') { 22715: c = d; 22716: i++; //2文字 22717: } 22718: if (mmuPeekByteZeroData (a++, 1) != c) { 22719: return false; 22720: } 22721: } else { //エスケープシーケンス以外 22722: int s = CharacterCode.chrCharToSJIS[c]; 22723: if (s == 0 && c != 0) { 22724: s = 0x81a6; //'※' 22725: } 22726: if (s >> 8 != 0) { //2バイトコード 22727: if (mmuPeekByteZeroData (a++, 1) != s >> 8) { 22728: return false; 22729: } 22730: } 22731: if (mmuPeekByteZeroData (a++, 1) != (s & 0xff)) { 22732: return false; 22733: } 22734: } 22735: } //for 22736: return true; 22737: } //mmuPeekEquals 22738: 22739: //s = mmuPeekStringL (a, l, supervisor) 22740: //sb = mmuPeekStringL (sb, a, l, supervisor) 22741: // ピークストリング(長さ指定) 22742: // 文字列を読み出す 22743: // 対応する文字がないときは'.'または'※'になる 22744: // 制御コードは'.'になる 22745: public static String mmuPeekStringL (int a, int l, int supervisor) { 22746: return mmuPeekStringL (new StringBuilder (), a, l, supervisor).toString (); 22747: } //mmuPeekStringL(int,int,int) 22748: public static StringBuilder mmuPeekStringL (StringBuilder sb, int a, int l, int supervisor) { 22749: for (int i = 0; i < l; i++) { 22750: int s = mmuPeekByteZeroData (a + i, supervisor); 22751: char c; 22752: if (0x81 <= s && s <= 0x9f || 0xe0 <= s && s <= 0xef) { //SJISの2バイトコードの1バイト目 22753: int t = i + 1 < l ? mmuPeekByteZeroData (a + i + 1, supervisor) : 0; 22754: if (0x40 <= t && t != 0x7f && t <= 0xfc) { //SJISの2バイトコードの2バイト目 22755: c = CharacterCode.chrSJISToChar[s << 8 | t]; //2バイトで変換する 22756: if (c == 0) { //対応する文字がない 22757: c = '※'; 22758: } 22759: i++; 22760: } else { //SJISの2バイトコードの2バイト目ではない 22761: c = '.'; //SJISの2バイトコードの1バイト目ではなかった 22762: } 22763: } else { //SJISの2バイトコードの1バイト目ではない 22764: c = CharacterCode.chrSJISToChar[s]; //1バイトで変換する 22765: if (c < 0x20 || c == 0x7f) { //対応する文字がないまたは制御コード 22766: c = '.'; 22767: } 22768: } 22769: sb.append (c); 22770: } 22771: return sb; 22772: } //mmuPeekString(StringBuilder,int,int,int) 22773: 22774: //s = mmuPeekStringZ (a, f) 22775: //sb = mmuPeekStringZ (sb, a, f) 22776: // ピークストリング 22777: // 文字列をSJISからUTF-16に変換しながらメモリから読み出す 22778: // '\0'の手前まで読み出す 22779: // UTF-16に変換できない文字は'\ufffd'になる 22780: public static String mmuPeekStringZ (int a, int f) { 22781: return mmuPeekStringZ (new StringBuilder (), a, f).toString (); 22782: } //mmuPeekStringZ(int,int) 22783: public static StringBuilder mmuPeekStringZ (StringBuilder sb, int a, int f) { 22784: for (;;) { 22785: int s = mmuPeekByteSign (a++, f) & 255; 22786: if (s == 0) { 22787: break; 22788: } 22789: int u; 22790: if (0x81 <= s && s <= 0x9f || 0xe0 <= s && s <= 0xef) { //SJISの2バイトコードの1バイト目 22791: int t = mmuPeekByteSign (a++, f) & 255; 22792: if (t == 0) { 22793: sb.append ('\ufffd'); 22794: break; 22795: } 22796: if (0x40 <= t && t != 0x7f && t <= 0xfc) { //SJISの2バイトコードの2バイト目 22797: t |= s << 8; 22798: u = CharacterCode.chrSJISToChar[t]; //2バイトで変換する 22799: if (u == 0) { //変換できない 22800: u = 0xfffd; 22801: } 22802: } else { //SJISの2バイトコードの2バイト目ではない 22803: u = 0xfffd; 22804: } 22805: } else { //SJISの2バイトコードの1バイト目ではない 22806: u = CharacterCode.chrSJISToChar[s]; //1バイトで変換する 22807: if (u == 0) { //変換できない 22808: u = 0xfffd; 22809: } 22810: } 22811: sb.append ((char) u); 22812: } 22813: return sb; 22814: } //mmuPeekStringZ(StringBuilder,int,int) 22815: 22816: //-------------------------------------------------------------------------------- 22817: //リード 22818: // アドレス変換はリード 22819: // FSLWのRead and WriteはRead 22820: 22821: //d = mmuReadByteSignData (a, supervisor) 22822: // リードバイト符号拡張(データ) 22823: public static byte mmuReadByteSignData (int a, int supervisor) throws M68kException { 22824: if (supervisor != 0) { //スーパーバイザモード 22825: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_READ | M60_FSLW_SIZE_BYTE | M60_FSLW_TM_SUPER_DATA; 22826: int a0 = mmuTranslateReadSuperData (a); 22827: return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRbs (a0); 22828: } else { //ユーザモード 22829: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_READ | M60_FSLW_SIZE_BYTE | M60_FSLW_TM_USER_DATA; 22830: int a0 = mmuTranslateReadUserData (a); 22831: return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRbs (a0); 22832: } 22833: } //mmuReadByteSignData(int,int) 22834: 22835: //d = mmuReadByteZeroData (a, supervisor) 22836: // リードバイトゼロ拡張(データ) 22837: public static int mmuReadByteZeroData (int a, int supervisor) throws M68kException { 22838: if (supervisor != 0) { //スーパーバイザモード 22839: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_READ | M60_FSLW_SIZE_BYTE | M60_FSLW_TM_SUPER_DATA; 22840: int a0 = mmuTranslateReadSuperData (a); 22841: return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRbz (a0); 22842: } else { //ユーザモード 22843: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_READ | M60_FSLW_SIZE_BYTE | M60_FSLW_TM_USER_DATA; 22844: int a0 = mmuTranslateReadUserData (a); 22845: return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRbz (a0); 22846: } 22847: } //mmuReadByteZeroData(int,int) 22848: 22849: //d = mmuReadByteSignExword (a, supervisor) 22850: // リードバイト符号拡張(拡張ワード) 22851: public static byte mmuReadByteSignExword (int a, int supervisor) throws M68kException { 22852: if (supervisor != 0) { //スーパーバイザモード 22853: m60FSLW = M60_FSLW_IOMA_EXWORD | M60_FSLW_RW_READ | M60_FSLW_SIZE_BYTE | M60_FSLW_TM_SUPER_CODE; 22854: int a0 = mmuTranslateReadSuperCode (a); 22855: return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRbs (a0); 22856: } else { //ユーザモード 22857: m60FSLW = M60_FSLW_IOMA_EXWORD | M60_FSLW_RW_READ | M60_FSLW_SIZE_BYTE | M60_FSLW_TM_USER_CODE; 22858: int a0 = mmuTranslateReadUserCode (a); 22859: return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRbs (a0); 22860: } 22861: } //mmuReadByteSignExword(int,int) 22862: 22863: //d = mmuReadByteZeroExword (a, supervisor) 22864: // リードバイトゼロ拡張(拡張ワード) 22865: public static int mmuReadByteZeroExword (int a, int supervisor) throws M68kException { 22866: if (supervisor != 0) { //スーパーバイザモード 22867: m60FSLW = M60_FSLW_IOMA_EXWORD | M60_FSLW_RW_READ | M60_FSLW_SIZE_BYTE | M60_FSLW_TM_SUPER_CODE; 22868: int a0 = mmuTranslateReadSuperCode (a); 22869: return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRbz (a0); 22870: } else { //ユーザモード 22871: m60FSLW = M60_FSLW_IOMA_EXWORD | M60_FSLW_RW_READ | M60_FSLW_SIZE_BYTE | M60_FSLW_TM_USER_CODE; 22872: int a0 = mmuTranslateReadUserCode (a); 22873: return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRbz (a0); 22874: } 22875: } //mmuReadByteZeroExword(int,int) 22876: 22877: //d = mmuReadWordSignData (a, supervisor) 22878: // リードワード符号拡張(データ) 22879: public static int mmuReadWordSignData (int a, int supervisor) throws M68kException { 22880: if (supervisor != 0) { //スーパーバイザモード 22881: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_READ | M60_FSLW_SIZE_WORD | M60_FSLW_TM_SUPER_DATA; 22882: int a0 = mmuTranslateReadSuperData (a); //a+1が必要なので上書き不可 22883: if ((a & 1) == 0) { //偶数 22884: return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRws (a0); 22885: } else { //奇数 22886: int d0 = (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRbs (a0); 22887: m60FSLW ^= M60_FSLW_IOMA_FIRST ^ M60_FSLW_IOMA_SECOND; 22888: int a1 = mmuTranslateReadSuperData (a + 1); //偶数 22889: return (d0 << 8 | 22890: (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a1 >>> XEiJ.BUS_PAGE_BITS].mmdRbz (a1)); 22891: } 22892: } else { //ユーザモード 22893: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_READ | M60_FSLW_SIZE_WORD | M60_FSLW_TM_USER_DATA; 22894: int a0 = mmuTranslateReadUserData (a); //a+1が必要なので上書き不可 22895: if ((a & 1) == 0) { //偶数 22896: return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRws (a0); 22897: } else { //奇数 22898: int d0 = (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRbs (a0); 22899: m60FSLW ^= M60_FSLW_IOMA_FIRST ^ M60_FSLW_IOMA_SECOND; 22900: int a1 = mmuTranslateReadUserData (a + 1); //偶数 22901: return (d0 << 8 | 22902: (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a1 >>> XEiJ.BUS_PAGE_BITS].mmdRbz (a1)); 22903: } 22904: } 22905: } //mmuReadWordSignData(int,int) 22906: 22907: //d = mmuReadWordZeroData (a, supervisor) 22908: // リードワードゼロ拡張(データ) 22909: public static int mmuReadWordZeroData (int a, int supervisor) throws M68kException { 22910: if (supervisor != 0) { //スーパーバイザモード 22911: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_READ | M60_FSLW_SIZE_WORD | M60_FSLW_TM_SUPER_DATA; 22912: int a0 = mmuTranslateReadSuperData (a); //a+1が必要なので上書き不可 22913: if ((a & 1) == 0) { //偶数 22914: return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a0); 22915: } else { //奇数 22916: int d0 = (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRbz (a0); 22917: m60FSLW ^= M60_FSLW_IOMA_FIRST ^ M60_FSLW_IOMA_SECOND; 22918: int a1 = mmuTranslateReadSuperData (a + 1); //偶数 22919: return (d0 << 8 | 22920: (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a1 >>> XEiJ.BUS_PAGE_BITS].mmdRbz (a1)); 22921: } 22922: } else { //ユーザモード 22923: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_READ | M60_FSLW_SIZE_WORD | M60_FSLW_TM_USER_DATA; 22924: int a0 = mmuTranslateReadUserData (a); //a+1が必要なので上書き不可 22925: if ((a & 1) == 0) { //偶数 22926: return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a0); 22927: } else { //奇数 22928: int d0 = (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRbz (a0); 22929: m60FSLW ^= M60_FSLW_IOMA_FIRST ^ M60_FSLW_IOMA_SECOND; 22930: int a1 = mmuTranslateReadUserData (a + 1); //偶数 22931: return (d0 << 8 | 22932: (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a1 >>> XEiJ.BUS_PAGE_BITS].mmdRbz (a1)); 22933: } 22934: } 22935: } //mmuReadWordZeroData(int,int) 22936: 22937: //d = mmuReadWordSignEven (a, supervisor) 22938: // リードワード符号拡張(偶数) 22939: public static int mmuReadWordSignEven (int a, int supervisor) throws M68kException { 22940: if (supervisor != 0) { //スーパーバイザモード 22941: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_READ | M60_FSLW_SIZE_WORD | M60_FSLW_TM_SUPER_DATA; 22942: a = mmuTranslateReadSuperData (a); 22943: return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a >>> XEiJ.BUS_PAGE_BITS].mmdRws (a); 22944: } else { //ユーザモード 22945: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_READ | M60_FSLW_SIZE_WORD | M60_FSLW_TM_USER_DATA; 22946: a = mmuTranslateReadUserData (a); 22947: return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a >>> XEiJ.BUS_PAGE_BITS].mmdRws (a); 22948: } 22949: } //mmuReadWordSignEven(int,int) 22950: 22951: //d = mmuReadWordZeroEven (a, supervisor) 22952: // リードワードゼロ拡張(偶数) 22953: public static int mmuReadWordZeroEven (int a, int supervisor) throws M68kException { 22954: if (supervisor != 0) { //スーパーバイザモード 22955: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_READ | M60_FSLW_SIZE_WORD | M60_FSLW_TM_SUPER_DATA; 22956: a = mmuTranslateReadSuperData (a); 22957: return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a); 22958: } else { //ユーザモード 22959: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_READ | M60_FSLW_SIZE_WORD | M60_FSLW_TM_USER_DATA; 22960: a = mmuTranslateReadUserData (a); 22961: return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a); 22962: } 22963: } //mmuReadWordZeroEven(int,int) 22964: 22965: //d = mmuReadWordSignExword (a, supervisor) 22966: // リードワード符号拡張(拡張ワード) 22967: public static int mmuReadWordSignExword (int a, int supervisor) throws M68kException { 22968: if (supervisor != 0) { //スーパーバイザモード 22969: m60FSLW = M60_FSLW_IOMA_EXWORD | M60_FSLW_RW_READ | M60_FSLW_SIZE_WORD | M60_FSLW_TM_SUPER_CODE; 22970: a = mmuTranslateReadSuperCode (a); 22971: return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a >>> XEiJ.BUS_PAGE_BITS].mmdRws (a); 22972: } else { //ユーザモード 22973: m60FSLW = M60_FSLW_IOMA_EXWORD | M60_FSLW_RW_READ | M60_FSLW_SIZE_WORD | M60_FSLW_TM_USER_CODE; 22974: a = mmuTranslateReadUserCode (a); 22975: return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a >>> XEiJ.BUS_PAGE_BITS].mmdRws (a); 22976: } 22977: } //mmuReadWordSignExword(int,int) 22978: 22979: //d = mmuReadWordZeroExword (a, supervisor) 22980: // リードワードゼロ拡張(拡張ワード) 22981: public static int mmuReadWordZeroExword (int a, int supervisor) throws M68kException { 22982: if (supervisor != 0) { //スーパーバイザモード 22983: m60FSLW = M60_FSLW_IOMA_EXWORD | M60_FSLW_RW_READ | M60_FSLW_SIZE_WORD | M60_FSLW_TM_SUPER_CODE; 22984: a = mmuTranslateReadSuperCode (a); 22985: return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a); 22986: } else { //ユーザモード 22987: m60FSLW = M60_FSLW_IOMA_EXWORD | M60_FSLW_RW_READ | M60_FSLW_SIZE_WORD | M60_FSLW_TM_USER_CODE; 22988: a = mmuTranslateReadUserCode (a); 22989: return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a); 22990: } 22991: } //mmuReadWordZeroExword(int,int) 22992: 22993: //d = mmuReadWordSignOpword (a, supervisor) 22994: // リードワード符号拡張(命令ワード) 22995: public static int mmuReadWordSignOpword (int a, int supervisor) throws M68kException { 22996: if (supervisor != 0) { //スーパーバイザモード 22997: m60FSLW = M60_FSLW_IOMA_OPWORD | M60_FSLW_RW_READ | M60_FSLW_SIZE_WORD | M60_FSLW_TM_SUPER_CODE; 22998: a = mmuTranslateReadSuperCode (a); 22999: return (InstructionBreakPoint.IBP_ON ? InstructionBreakPoint.ibpOp1SuperMap : DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a >>> XEiJ.BUS_PAGE_BITS].mmdRws (a); 23000: } else { //ユーザモード 23001: m60FSLW = M60_FSLW_IOMA_OPWORD | M60_FSLW_RW_READ | M60_FSLW_SIZE_WORD | M60_FSLW_TM_USER_CODE; 23002: a = mmuTranslateReadUserCode (a); 23003: return (InstructionBreakPoint.IBP_ON ? InstructionBreakPoint.ibpOp1UserMap : DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a >>> XEiJ.BUS_PAGE_BITS].mmdRws (a); 23004: } 23005: } //mmuReadWordSignOpword(int,int) 23006: 23007: //d = mmuReadWordZeroOpword (a, supervisor) 23008: // リードワードゼロ拡張(命令ワード) 23009: public static int mmuReadWordZeroOpword (int a, int supervisor) throws M68kException { 23010: if (supervisor != 0) { //スーパーバイザモード 23011: m60FSLW = M60_FSLW_IOMA_OPWORD | M60_FSLW_RW_READ | M60_FSLW_SIZE_WORD | M60_FSLW_TM_SUPER_CODE; 23012: a = mmuTranslateReadSuperCode (a); 23013: return (InstructionBreakPoint.IBP_ON ? InstructionBreakPoint.ibpOp1SuperMap : DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a); 23014: } else { //ユーザモード 23015: m60FSLW = M60_FSLW_IOMA_OPWORD | M60_FSLW_RW_READ | M60_FSLW_SIZE_WORD | M60_FSLW_TM_USER_CODE; 23016: a = mmuTranslateReadUserCode (a); 23017: return (InstructionBreakPoint.IBP_ON ? InstructionBreakPoint.ibpOp1UserMap : DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a); 23018: } 23019: } //mmuReadWordZeroOpword(int,int) 23020: 23021: //d = mmuReadLongData (a, supervisor) 23022: // リードロング(データ) 23023: public static int mmuReadLongData (int a, int supervisor) throws M68kException { 23024: if (supervisor != 0) { //スーパーバイザモード 23025: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_READ | M60_FSLW_SIZE_LONG | M60_FSLW_TM_SUPER_DATA; 23026: int a0 = mmuTranslateReadSuperData (a); //a+1,a+2,a+3が必要なので上書き不可 23027: if ((a & 3) == 0) { //4の倍数 23028: return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRls (a0); 23029: } else if ((a & 1) == 0) { //4の倍数+2 23030: int d0 = (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRws (a0); 23031: m60FSLW ^= M60_FSLW_IOMA_FIRST ^ M60_FSLW_IOMA_SECOND; 23032: int a2 = mmuTranslateReadSuperData (a + 2); //偶数 23033: return (d0 << 16 | 23034: (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a2 >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a2)); 23035: } else { //奇数 23036: int d0 = (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRbs (a0); 23037: m60FSLW ^= M60_FSLW_IOMA_FIRST ^ M60_FSLW_IOMA_SECOND; 23038: int a1 = mmuTranslateReadSuperData (a + 1); //偶数 23039: int a3 = mmuTranslateReadSuperData (a + 3); //偶数 23040: return (d0 << 24 | 23041: (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a1 >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a1) << 8 | 23042: (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a3 >>> XEiJ.BUS_PAGE_BITS].mmdRbz (a3)); 23043: } 23044: } else { //ユーザモード 23045: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_READ | M60_FSLW_SIZE_LONG | M60_FSLW_TM_USER_DATA; 23046: int a0 = mmuTranslateReadUserData (a); //a+1,a+2,a+3が必要なので上書き不可 23047: if ((a & 3) == 0) { //4の倍数 23048: return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRls (a0); 23049: } else if ((a & 1) == 0) { //4の倍数+2 23050: int d0 = (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRws (a0); 23051: m60FSLW ^= M60_FSLW_IOMA_FIRST ^ M60_FSLW_IOMA_SECOND; 23052: int a2 = mmuTranslateReadUserData (a + 2); //偶数 23053: return (d0 << 16 | 23054: (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a2 >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a2)); 23055: } else { //奇数 23056: int d0 = (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRbs (a0); 23057: m60FSLW ^= M60_FSLW_IOMA_FIRST ^ M60_FSLW_IOMA_SECOND; 23058: int a1 = mmuTranslateReadUserData (a + 1); //偶数 23059: int a3 = mmuTranslateReadUserData (a + 3); //偶数 23060: return (d0 << 24 | 23061: (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a1 >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a1) << 8 | 23062: (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a3 >>> XEiJ.BUS_PAGE_BITS].mmdRbz (a3)); 23063: } 23064: } 23065: } //mmuReadLongData(int,int) 23066: 23067: //d = mmuReadLongEven (a, supervisor) 23068: // リードロング(偶数) 23069: public static int mmuReadLongEven (int a, int supervisor) throws M68kException { 23070: if (supervisor != 0) { //スーパーバイザモード 23071: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_READ | M60_FSLW_SIZE_LONG | M60_FSLW_TM_SUPER_DATA; 23072: int a0 = mmuTranslateReadSuperData (a); //a+2が必要なので上書き不可 23073: if ((a & 2) == 0) { //4の倍数 23074: return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRls (a0); 23075: } else { //4の倍数+2 23076: int d0 = (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRws (a0); 23077: m60FSLW ^= M60_FSLW_IOMA_FIRST ^ M60_FSLW_IOMA_SECOND; 23078: int a2 = mmuTranslateReadSuperData (a + 2); //偶数 23079: return (d0 << 16 | 23080: (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a2 >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a2)); 23081: } 23082: } else { //ユーザモード 23083: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_READ | M60_FSLW_SIZE_LONG | M60_FSLW_TM_USER_DATA; 23084: int a0 = mmuTranslateReadUserData (a); //a+2が必要なので上書き不可 23085: if ((a & 2) == 0) { //4の倍数 23086: return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRls (a0); 23087: } else { //4の倍数+2 23088: int d0 = (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRws (a0); 23089: m60FSLW ^= M60_FSLW_IOMA_FIRST ^ M60_FSLW_IOMA_SECOND; 23090: int a2 = mmuTranslateReadUserData (a + 2); //偶数 23091: return (d0 << 16 | 23092: (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a2 >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a2)); 23093: } 23094: } 23095: } //mmuReadLongEven(int,int) 23096: 23097: //d = mmuReadLongExword (a, supervisor) 23098: // リードロング(拡張ワード) 23099: public static int mmuReadLongExword (int a, int supervisor) throws M68kException { 23100: if (supervisor != 0) { //スーパーバイザモード 23101: m60FSLW = M60_FSLW_IOMA_EXWORD | M60_FSLW_RW_READ | M60_FSLW_SIZE_LONG | M60_FSLW_TM_SUPER_CODE; 23102: int a0 = mmuTranslateReadSuperData (a); //a+2が必要なので上書き不可 23103: if ((a & 2) == 0) { //4の倍数 23104: return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRls (a0); 23105: } else { //4の倍数+2 23106: int a2 = mmuTranslateReadSuperData (a + 2); //偶数 23107: return ((DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRws (a0) << 16 | 23108: (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a2 >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a2)); 23109: } 23110: } else { //ユーザモード 23111: m60FSLW = M60_FSLW_IOMA_EXWORD | M60_FSLW_RW_READ | M60_FSLW_SIZE_LONG | M60_FSLW_TM_USER_CODE; 23112: int a0 = mmuTranslateReadUserData (a); //a+2が必要なので上書き不可 23113: if ((a & 2) == 0) { //4の倍数 23114: return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRls (a0); 23115: } else { //4の倍数+2 23116: int a2 = mmuTranslateReadUserData (a + 2); //偶数 23117: return ((DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRws (a0) << 16 | 23118: (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a2 >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a2)); 23119: } 23120: } 23121: } //mmuReadLongExword(int,int) 23122: 23123: //d = mmuReadLongFour (a, supervisor) 23124: // リードロング(4の倍数) 23125: public static int mmuReadLongFour (int a, int supervisor) throws M68kException { 23126: if (supervisor != 0) { //スーパーバイザモード 23127: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_READ | M60_FSLW_SIZE_LONG | M60_FSLW_TM_SUPER_DATA; 23128: a = mmuTranslateReadSuperData (a); 23129: return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a >>> XEiJ.BUS_PAGE_BITS].mmdRls (a); 23130: } else { //ユーザモード 23131: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_READ | M60_FSLW_SIZE_LONG | M60_FSLW_TM_USER_DATA; 23132: a = mmuTranslateReadUserData (a); 23133: return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a >>> XEiJ.BUS_PAGE_BITS].mmdRls (a); 23134: } 23135: } //mmuReadLongFour(int,int) 23136: 23137: //l = mmuReadQuadData (a, supervisor) 23138: // リードクワッド(データ) 23139: public static long mmuReadQuadData (int a, int supervisor) throws M68kException { 23140: long d; 23141: if (supervisor != 0) { //スーパーバイザモード 23142: final MemoryMappedDevice[] map = DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap; 23143: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_READ | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_SUPER_DATA; 23144: int t = mmuTranslateReadSuperData (a); 23145: if ((a & 3) == 0) { //4n 23146: d = (long) map[t >>> XEiJ.BUS_PAGE_BITS].mmdRls (t); 23147: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_READ | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_SUPER_DATA; 23148: t = mmuTranslateReadSuperData (a + 4); 23149: d = d << 32 | (0xffffffffL & (long) map[t >>> XEiJ.BUS_PAGE_BITS].mmdRls (t)); 23150: } else if ((a & 1) == 0) { //4n+2 23151: d = (long) map[t >>> XEiJ.BUS_PAGE_BITS].mmdRws (t); 23152: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_READ | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_SUPER_DATA; 23153: t = mmuTranslateReadSuperData (a + 2); 23154: d = d << 32 | (0xffffffffL & (long) map[t >>> XEiJ.BUS_PAGE_BITS].mmdRls (t)); 23155: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_READ | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_SUPER_DATA; 23156: t = mmuTranslateReadSuperData (a + 6); 23157: d = d << 16 | (long) map[t >>> XEiJ.BUS_PAGE_BITS].mmdRwz (t); 23158: } else if ((a & 3) == 1) { //4n+1 23159: d = (long) map[t >>> XEiJ.BUS_PAGE_BITS].mmdRbs (t); 23160: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_READ | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_SUPER_DATA; 23161: t = mmuTranslateReadSuperData (a + 1); 23162: d = d << 16 | (long) map[t >>> XEiJ.BUS_PAGE_BITS].mmdRwz (t); 23163: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_READ | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_SUPER_DATA; 23164: t = mmuTranslateReadSuperData (a + 3); 23165: d = d << 32 | (0xffffffffL & (long) map[t >>> XEiJ.BUS_PAGE_BITS].mmdRls (t)); 23166: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_READ | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_SUPER_DATA; 23167: t = mmuTranslateReadSuperData (a + 7); 23168: d = d << 8 | (long) map[t >>> XEiJ.BUS_PAGE_BITS].mmdRbz (t); 23169: } else { // //4n+3 23170: d = (long) map[t >>> XEiJ.BUS_PAGE_BITS].mmdRbs (t); 23171: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_READ | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_SUPER_DATA; 23172: t = mmuTranslateReadSuperData (a + 1); 23173: d = d << 32 | (0xffffffffL & (long) map[t >>> XEiJ.BUS_PAGE_BITS].mmdRls (t)); 23174: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_READ | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_SUPER_DATA; 23175: t = mmuTranslateReadSuperData (a + 5); 23176: d = d << 16 | (long) map[t >>> XEiJ.BUS_PAGE_BITS].mmdRwz (t); 23177: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_READ | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_SUPER_DATA; 23178: t = mmuTranslateReadSuperData (a + 7); 23179: d = d << 8 | (long) map[t >>> XEiJ.BUS_PAGE_BITS].mmdRbz (t); 23180: } 23181: } else { //ユーザモード 23182: final MemoryMappedDevice[] map = DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap; 23183: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_READ | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_USER_DATA; 23184: int t = mmuTranslateReadUserData (a); 23185: if ((a & 3) == 0) { //4n 23186: d = (long) map[t >>> XEiJ.BUS_PAGE_BITS].mmdRls (t); 23187: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_READ | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_USER_DATA; 23188: t = mmuTranslateReadUserData (a + 4); 23189: d = d << 32 | (0xffffffffL & (long) map[t >>> XEiJ.BUS_PAGE_BITS].mmdRls (t)); 23190: } else if ((a & 1) == 0) { //4n+2 23191: d = (long) map[t >>> XEiJ.BUS_PAGE_BITS].mmdRws (t); 23192: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_READ | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_USER_DATA; 23193: t = mmuTranslateReadUserData (a + 2); 23194: d = d << 32 | (0xffffffffL & (long) map[t >>> XEiJ.BUS_PAGE_BITS].mmdRls (t)); 23195: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_READ | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_USER_DATA; 23196: t = mmuTranslateReadUserData (a + 6); 23197: d = d << 16 | (long) map[t >>> XEiJ.BUS_PAGE_BITS].mmdRwz (t); 23198: } else if ((a & 3) == 1) { //4n+1 23199: d = (long) map[t >>> XEiJ.BUS_PAGE_BITS].mmdRbs (t); 23200: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_READ | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_USER_DATA; 23201: t = mmuTranslateReadUserData (a + 1); 23202: d = d << 16 | (long) map[t >>> XEiJ.BUS_PAGE_BITS].mmdRwz (t); 23203: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_READ | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_USER_DATA; 23204: t = mmuTranslateReadUserData (a + 3); 23205: d = d << 32 | (0xffffffffL & (long) map[t >>> XEiJ.BUS_PAGE_BITS].mmdRls (t)); 23206: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_READ | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_USER_DATA; 23207: t = mmuTranslateReadUserData (a + 7); 23208: d = d << 8 | (long) map[t >>> XEiJ.BUS_PAGE_BITS].mmdRbz (t); 23209: } else { // //4n+3 23210: d = (long) map[t >>> XEiJ.BUS_PAGE_BITS].mmdRbs (t); 23211: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_READ | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_USER_DATA; 23212: t = mmuTranslateReadUserData (a + 1); 23213: d = d << 32 | (0xffffffffL & (long) map[t >>> XEiJ.BUS_PAGE_BITS].mmdRls (t)); 23214: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_READ | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_USER_DATA; 23215: t = mmuTranslateReadUserData (a + 5); 23216: d = d << 16 | (long) map[t >>> XEiJ.BUS_PAGE_BITS].mmdRwz (t); 23217: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_READ | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_USER_DATA; 23218: t = mmuTranslateReadUserData (a + 7); 23219: d = d << 8 | (long) map[t >>> XEiJ.BUS_PAGE_BITS].mmdRbz (t); 23220: } 23221: } 23222: return d; 23223: } //mmuReadQuadData(int,int) 23224: 23225: //l = mmuReadQuadSecond (a, supervisor) 23226: // リードクワッド(2番目) 23227: // エクステンデッドとラインの2番目で使う 23228: public static long mmuReadQuadSecond (int a, int supervisor) throws M68kException { 23229: long d; 23230: if (supervisor != 0) { //スーパーバイザモード 23231: final MemoryMappedDevice[] map = DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap; 23232: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_READ | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_SUPER_DATA; 23233: int t = mmuTranslateReadSuperData (a); 23234: if ((a & 3) == 0) { //4n 23235: d = (long) map[t >>> XEiJ.BUS_PAGE_BITS].mmdRls (t); 23236: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_READ | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_SUPER_DATA; 23237: t = mmuTranslateReadSuperData (a + 4); 23238: d = d << 32 | (0xffffffffL & (long) map[t >>> XEiJ.BUS_PAGE_BITS].mmdRls (t)); 23239: } else if ((a & 1) == 0) { //4n+2 23240: d = (long) map[t >>> XEiJ.BUS_PAGE_BITS].mmdRws (t); 23241: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_READ | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_SUPER_DATA; 23242: t = mmuTranslateReadSuperData (a + 2); 23243: d = d << 32 | (0xffffffffL & (long) map[t >>> XEiJ.BUS_PAGE_BITS].mmdRls (t)); 23244: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_READ | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_SUPER_DATA; 23245: t = mmuTranslateReadSuperData (a + 6); 23246: d = d << 16 | (long) map[t >>> XEiJ.BUS_PAGE_BITS].mmdRwz (t); 23247: } else if ((a & 3) == 1) { //4n+1 23248: d = (long) map[t >>> XEiJ.BUS_PAGE_BITS].mmdRbs (t); 23249: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_READ | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_SUPER_DATA; 23250: t = mmuTranslateReadSuperData (a + 1); 23251: d = d << 16 | (long) map[t >>> XEiJ.BUS_PAGE_BITS].mmdRwz (t); 23252: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_READ | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_SUPER_DATA; 23253: t = mmuTranslateReadSuperData (a + 3); 23254: d = d << 32 | (0xffffffffL & (long) map[t >>> XEiJ.BUS_PAGE_BITS].mmdRls (t)); 23255: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_READ | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_SUPER_DATA; 23256: t = mmuTranslateReadSuperData (a + 7); 23257: d = d << 8 | (long) map[t >>> XEiJ.BUS_PAGE_BITS].mmdRbz (t); 23258: } else { // //4n+3 23259: d = (long) map[t >>> XEiJ.BUS_PAGE_BITS].mmdRbs (t); 23260: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_READ | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_SUPER_DATA; 23261: t = mmuTranslateReadSuperData (a + 1); 23262: d = d << 32 | (0xffffffffL & (long) map[t >>> XEiJ.BUS_PAGE_BITS].mmdRls (t)); 23263: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_READ | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_SUPER_DATA; 23264: t = mmuTranslateReadSuperData (a + 5); 23265: d = d << 16 | (long) map[t >>> XEiJ.BUS_PAGE_BITS].mmdRwz (t); 23266: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_READ | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_SUPER_DATA; 23267: t = mmuTranslateReadSuperData (a + 7); 23268: d = d << 8 | (long) map[t >>> XEiJ.BUS_PAGE_BITS].mmdRbz (t); 23269: } 23270: } else { //ユーザモード 23271: final MemoryMappedDevice[] map = DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap; 23272: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_READ | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_USER_DATA; 23273: int t = mmuTranslateReadUserData (a); 23274: if ((a & 3) == 0) { //4n 23275: d = (long) map[t >>> XEiJ.BUS_PAGE_BITS].mmdRls (t); 23276: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_READ | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_USER_DATA; 23277: t = mmuTranslateReadUserData (a + 4); 23278: d = d << 32 | (0xffffffffL & (long) map[t >>> XEiJ.BUS_PAGE_BITS].mmdRls (t)); 23279: } else if ((a & 1) == 0) { //4n+2 23280: d = (long) map[t >>> XEiJ.BUS_PAGE_BITS].mmdRws (t); 23281: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_READ | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_USER_DATA; 23282: t = mmuTranslateReadUserData (a + 2); 23283: d = d << 32 | (0xffffffffL & (long) map[t >>> XEiJ.BUS_PAGE_BITS].mmdRls (t)); 23284: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_READ | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_USER_DATA; 23285: t = mmuTranslateReadUserData (a + 6); 23286: d = d << 16 | (long) map[t >>> XEiJ.BUS_PAGE_BITS].mmdRwz (t); 23287: } else if ((a & 3) == 1) { //4n+1 23288: d = (long) map[t >>> XEiJ.BUS_PAGE_BITS].mmdRbs (t); 23289: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_READ | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_USER_DATA; 23290: t = mmuTranslateReadUserData (a + 1); 23291: d = d << 16 | (long) map[t >>> XEiJ.BUS_PAGE_BITS].mmdRwz (t); 23292: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_READ | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_USER_DATA; 23293: t = mmuTranslateReadUserData (a + 3); 23294: d = d << 32 | (0xffffffffL & (long) map[t >>> XEiJ.BUS_PAGE_BITS].mmdRls (t)); 23295: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_READ | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_USER_DATA; 23296: t = mmuTranslateReadUserData (a + 7); 23297: d = d << 8 | (long) map[t >>> XEiJ.BUS_PAGE_BITS].mmdRbz (t); 23298: } else { // //4n+3 23299: d = (long) map[t >>> XEiJ.BUS_PAGE_BITS].mmdRbs (t); 23300: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_READ | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_USER_DATA; 23301: t = mmuTranslateReadUserData (a + 1); 23302: d = d << 32 | (0xffffffffL & (long) map[t >>> XEiJ.BUS_PAGE_BITS].mmdRls (t)); 23303: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_READ | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_USER_DATA; 23304: t = mmuTranslateReadUserData (a + 5); 23305: d = d << 16 | (long) map[t >>> XEiJ.BUS_PAGE_BITS].mmdRwz (t); 23306: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_READ | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_USER_DATA; 23307: t = mmuTranslateReadUserData (a + 7); 23308: d = d << 8 | (long) map[t >>> XEiJ.BUS_PAGE_BITS].mmdRbz (t); 23309: } 23310: } 23311: return d; 23312: } //mmuReadQuadSecond(int,int) 23313: 23314: //l = mmuReadQuadExword (a, supervisor) 23315: // リードクワッド(拡張ワード) 23316: // イミディエイトで使う 23317: public static long mmuReadQuadExword (int a, int supervisor) throws M68kException { 23318: if (supervisor != 0) { //スーパーバイザモード 23319: m60FSLW = M60_FSLW_IOMA_EXWORD | M60_FSLW_RW_READ | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_SUPER_CODE; 23320: int a0 = mmuTranslateReadSuperData (a); //a+2,a+4,a+6が必要なので上書き不可 23321: if ((a & 2) == 0) { //4の倍数 23322: int a4 = mmuTranslateReadSuperData (a + 4); //4の倍数 23323: return ((long) (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRls (a0) << 32 | 23324: (long) (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a4 >>> XEiJ.BUS_PAGE_BITS].mmdRls (a4) & 0x00000000ffffffffL); 23325: } else { //4の倍数+2 23326: int a2 = mmuTranslateReadSuperData (a + 2); //4の倍数 23327: int a6 = mmuTranslateReadSuperData (a + 6); //4の倍数 23328: return ((long) (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRws (a0) << 48 | 23329: (long) (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a2 >>> XEiJ.BUS_PAGE_BITS].mmdRls (a2) << 16 & 0x0000ffffffff0000L | 23330: (long) (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a6 >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a6)); 23331: } 23332: } else { //ユーザモード 23333: m60FSLW = M60_FSLW_IOMA_EXWORD | M60_FSLW_RW_READ | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_USER_CODE; 23334: int a0 = mmuTranslateReadUserData (a); //a+2,a+4,a+6が必要なので上書き不可 23335: if ((a & 2) == 0) { //4の倍数 23336: int a4 = mmuTranslateReadUserData (a + 4); //4の倍数 23337: return ((long) (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRls (a0) << 32 | 23338: (long) (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a4 >>> XEiJ.BUS_PAGE_BITS].mmdRls (a4) & 0x00000000ffffffffL); 23339: } else { //4の倍数+2 23340: int a2 = mmuTranslateReadUserData (a + 2); //4の倍数 23341: int a6 = mmuTranslateReadUserData (a + 6); //4の倍数 23342: return ((long) (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRws (a0) << 48 | 23343: (long) (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a2 >>> XEiJ.BUS_PAGE_BITS].mmdRls (a2) << 16 & 0x0000ffffffff0000L | 23344: (long) (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a6 >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a6)); 23345: } 23346: } 23347: } //mmuReadQuadExword(int,int) 23348: 23349: //-------------------------------------------------------------------------------- 23350: //リードモディファイライトのリード 23351: // アドレス変換はライト 23352: // FSLWのRead and WriteはRead-Modify-Write 23353: 23354: //d = mmuModifyByteSignData (a, supervisor) 23355: // リードモディファイライトのリードバイト符号拡張(データ) 23356: public static byte mmuModifyByteSignData (int a, int supervisor) throws M68kException { 23357: if (supervisor != 0) { //スーパーバイザモード 23358: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_MODIFY | M60_FSLW_SIZE_BYTE | M60_FSLW_TM_SUPER_DATA; 23359: int a0 = mmuTranslateWriteSuperData (a); 23360: return (a ^ a0) == 1 ? -1 : (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRbs (a0); 23361: } else { //ユーザモード 23362: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_MODIFY | M60_FSLW_SIZE_BYTE | M60_FSLW_TM_USER_DATA; 23363: int a0 = mmuTranslateWriteUserData (a); 23364: return (a ^ a0) == 1 ? -1 : (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRbs (a0); 23365: } 23366: } //mmuModifyByteSignData(int,int) 23367: 23368: //d = mmuModifyByteZeroData (a, supervisor) 23369: // リードモディファイライトのリードバイトゼロ拡張(データ) 23370: public static int mmuModifyByteZeroData (int a, int supervisor) throws M68kException { 23371: if (supervisor != 0) { //スーパーバイザモード 23372: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_MODIFY | M60_FSLW_SIZE_BYTE | M60_FSLW_TM_SUPER_DATA; 23373: int a0 = mmuTranslateWriteSuperData (a); 23374: return (a ^ a0) == 1 ? 255 : (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRbz (a0); 23375: } else { //ユーザモード 23376: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_MODIFY | M60_FSLW_SIZE_BYTE | M60_FSLW_TM_USER_DATA; 23377: int a0 = mmuTranslateWriteUserData (a); 23378: return (a ^ a0) == 1 ? 255 : (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRbz (a0); 23379: } 23380: } //mmuModifyByteZeroData(int,int) 23381: 23382: //d = mmuModifyWordSignData (a, supervisor) 23383: // リードモディファイライトのリードワード符号拡張(データ) 23384: public static int mmuModifyWordSignData (int a, int supervisor) throws M68kException { 23385: if (supervisor != 0) { //スーパーバイザモード 23386: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_MODIFY | M60_FSLW_SIZE_WORD | M60_FSLW_TM_SUPER_DATA; 23387: int a0 = mmuTranslateWriteSuperData (a); //a+1が必要なので上書き不可 23388: if ((a & 1) == 0) { //偶数 23389: return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRws (a0); 23390: } else { //奇数 23391: int d0 = (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRbs (a0); 23392: m60FSLW ^= M60_FSLW_IOMA_FIRST ^ M60_FSLW_IOMA_SECOND; 23393: int a1 = mmuTranslateWriteSuperData (a + 1); //偶数 23394: return (d0 << 8 | 23395: (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a1 >>> XEiJ.BUS_PAGE_BITS].mmdRbz (a1)); 23396: } 23397: } else { //ユーザモード 23398: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_MODIFY | M60_FSLW_SIZE_WORD | M60_FSLW_TM_USER_DATA; 23399: int a0 = mmuTranslateWriteUserData (a); //a+1が必要なので上書き不可 23400: if ((a & 1) == 0) { //偶数 23401: return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRws (a0); 23402: } else { //奇数 23403: int d0 = (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRbs (a0); 23404: m60FSLW ^= M60_FSLW_IOMA_FIRST ^ M60_FSLW_IOMA_SECOND; 23405: int a1 = mmuTranslateWriteUserData (a + 1); //偶数 23406: return (d0 << 8 | 23407: (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a1 >>> XEiJ.BUS_PAGE_BITS].mmdRbz (a1)); 23408: } 23409: } 23410: } //mmuModifyWordSignData(int,int) 23411: 23412: //d = mmuModifyWordZeroData (a, supervisor) 23413: // リードモディファイライトのリードワードゼロ拡張(データ) 23414: public static int mmuModifyWordZeroData (int a, int supervisor) throws M68kException { 23415: if (supervisor != 0) { //スーパーバイザモード 23416: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_MODIFY | M60_FSLW_SIZE_WORD | M60_FSLW_TM_SUPER_DATA; 23417: int a0 = mmuTranslateWriteSuperData (a); //a+1が必要なので上書き不可 23418: if ((a & 1) == 0) { //偶数 23419: return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a0); 23420: } else { //奇数 23421: int d0 = (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRbz (a0); 23422: m60FSLW ^= M60_FSLW_IOMA_FIRST ^ M60_FSLW_IOMA_SECOND; 23423: int a1 = mmuTranslateWriteSuperData (a + 1); //偶数 23424: return (d0 << 8 | 23425: (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a1 >>> XEiJ.BUS_PAGE_BITS].mmdRbz (a1)); 23426: } 23427: } else { //ユーザモード 23428: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_MODIFY | M60_FSLW_SIZE_WORD | M60_FSLW_TM_USER_DATA; 23429: int a0 = mmuTranslateWriteUserData (a); //a+1が必要なので上書き不可 23430: if ((a & 1) == 0) { //偶数 23431: return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a0); 23432: } else { //奇数 23433: int d0 = (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRbz (a0); 23434: m60FSLW ^= M60_FSLW_IOMA_FIRST ^ M60_FSLW_IOMA_SECOND; 23435: int a1 = mmuTranslateWriteUserData (a + 1); //偶数 23436: return (d0 << 8 | 23437: (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a1 >>> XEiJ.BUS_PAGE_BITS].mmdRbz (a1)); 23438: } 23439: } 23440: } //mmuModifyWordZeroData(int,int) 23441: 23442: //d = mmuModifyWordSignEven (a, supervisor) 23443: // リードモディファイライトのリードワード符号拡張(偶数) 23444: public static int mmuModifyWordSignEven (int a, int supervisor) throws M68kException { 23445: if (supervisor != 0) { //スーパーバイザモード 23446: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_MODIFY | M60_FSLW_SIZE_WORD | M60_FSLW_TM_SUPER_DATA; 23447: a = mmuTranslateWriteSuperData (a); 23448: return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a >>> XEiJ.BUS_PAGE_BITS].mmdRws (a); 23449: } else { //ユーザモード 23450: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_MODIFY | M60_FSLW_SIZE_WORD | M60_FSLW_TM_USER_DATA; 23451: a = mmuTranslateWriteUserData (a); 23452: return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a >>> XEiJ.BUS_PAGE_BITS].mmdRws (a); 23453: } 23454: } //mmuModifyWordSignEven(int,int) 23455: 23456: //d = mmuModifyWordZeroEven (a, supervisor) 23457: // リードモディファイライトのリードワードゼロ拡張(偶数) 23458: public static int mmuModifyWordZeroEven (int a, int supervisor) throws M68kException { 23459: if (supervisor != 0) { //スーパーバイザモード 23460: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_MODIFY | M60_FSLW_SIZE_WORD | M60_FSLW_TM_SUPER_DATA; 23461: a = mmuTranslateWriteSuperData (a); 23462: return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a); 23463: } else { //ユーザモード 23464: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_MODIFY | M60_FSLW_SIZE_WORD | M60_FSLW_TM_USER_DATA; 23465: a = mmuTranslateWriteUserData (a); 23466: return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a); 23467: } 23468: } //mmuModifyWordZeroEven(int,int) 23469: 23470: //d = mmuModifyLongData (a, supervisor) 23471: // リードモディファイライトのリードロング(データ) 23472: public static int mmuModifyLongData (int a, int supervisor) throws M68kException { 23473: if (supervisor != 0) { //スーパーバイザモード 23474: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_MODIFY | M60_FSLW_SIZE_LONG | M60_FSLW_TM_SUPER_DATA; 23475: int a0 = mmuTranslateWriteSuperData (a); //a+1,a+2,a+3が必要なので上書き不可 23476: if ((a & 3) == 0) { //4の倍数 23477: return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRls (a0); 23478: } else if ((a & 1) == 0) { //4の倍数+2 23479: int d0 = (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRws (a0); 23480: m60FSLW ^= M60_FSLW_IOMA_FIRST ^ M60_FSLW_IOMA_SECOND; 23481: int a2 = mmuTranslateWriteSuperData (a + 2); //偶数 23482: return (d0 << 16 | 23483: (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a2 >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a2)); 23484: } else { //奇数 23485: int d0 = (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRbs (a0); 23486: m60FSLW ^= M60_FSLW_IOMA_FIRST ^ M60_FSLW_IOMA_SECOND; 23487: int a1 = mmuTranslateWriteSuperData (a + 1); //偶数 23488: int a3 = mmuTranslateWriteSuperData (a + 3); //偶数 23489: return (d0 << 24 | 23490: (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a1 >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a1) << 8 | 23491: (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a3 >>> XEiJ.BUS_PAGE_BITS].mmdRbz (a3)); 23492: } 23493: } else { //ユーザモード 23494: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_MODIFY | M60_FSLW_SIZE_LONG | M60_FSLW_TM_USER_DATA; 23495: int a0 = mmuTranslateWriteUserData (a); //a+1,a+2,a+3が必要なので上書き不可 23496: if ((a & 3) == 0) { //4の倍数 23497: return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRls (a0); 23498: } else if ((a & 1) == 0) { //4の倍数+2 23499: int d0 = (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRws (a0); 23500: m60FSLW ^= M60_FSLW_IOMA_FIRST ^ M60_FSLW_IOMA_SECOND; 23501: int a2 = mmuTranslateWriteUserData (a + 2); //偶数 23502: return (d0 << 16 | 23503: (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a2 >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a2)); 23504: } else { //奇数 23505: int d0 = (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRbs (a0); 23506: m60FSLW ^= M60_FSLW_IOMA_FIRST ^ M60_FSLW_IOMA_SECOND; 23507: int a1 = mmuTranslateWriteUserData (a + 1); //偶数 23508: int a3 = mmuTranslateWriteUserData (a + 3); //偶数 23509: return (d0 << 24 | 23510: (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a1 >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a1) << 8 | 23511: (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a3 >>> XEiJ.BUS_PAGE_BITS].mmdRbz (a3)); 23512: } 23513: } 23514: } //mmuModifyLongData(int,int) 23515: 23516: //d = mmuModifyLongEven (a, supervisor) 23517: // リードモディファイライトのリードロング(偶数) 23518: public static int mmuModifyLongEven (int a, int supervisor) throws M68kException { 23519: if (supervisor != 0) { //スーパーバイザモード 23520: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_MODIFY | M60_FSLW_SIZE_LONG | M60_FSLW_TM_SUPER_DATA; 23521: int a0 = mmuTranslateWriteSuperData (a); //a+2が必要なので上書き不可 23522: if ((a & 2) == 0) { //4の倍数 23523: return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRls (a0); 23524: } else { //4の倍数+2 23525: int d0 = (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRws (a0); 23526: m60FSLW ^= M60_FSLW_IOMA_FIRST ^ M60_FSLW_IOMA_SECOND; 23527: int a2 = mmuTranslateWriteSuperData (a + 2); //偶数 23528: return (d0 << 16 | 23529: (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a2 >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a2)); 23530: } 23531: } else { //ユーザモード 23532: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_MODIFY | M60_FSLW_SIZE_LONG | M60_FSLW_TM_USER_DATA; 23533: int a0 = mmuTranslateWriteUserData (a); //a+2が必要なので上書き不可 23534: if ((a & 2) == 0) { //4の倍数 23535: return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRls (a0); 23536: } else { //4の倍数+2 23537: int d0 = (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRws (a0); 23538: m60FSLW ^= M60_FSLW_IOMA_FIRST ^ M60_FSLW_IOMA_SECOND; 23539: int a2 = mmuTranslateWriteUserData (a + 2); //偶数 23540: return (d0 << 16 | 23541: (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a2 >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a2)); 23542: } 23543: } 23544: } //mmuModifyLongEven(int,int) 23545: 23546: //d = mmuModifyLongFour (a, supervisor) 23547: // リードモディファイライトのリードロング(4の倍数) 23548: public static int mmuModifyLongFour (int a, int supervisor) throws M68kException { 23549: if (supervisor != 0) { //スーパーバイザモード 23550: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_MODIFY | M60_FSLW_SIZE_LONG | M60_FSLW_TM_SUPER_DATA; 23551: a = mmuTranslateWriteSuperData (a); 23552: return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a >>> XEiJ.BUS_PAGE_BITS].mmdRls (a); 23553: } else { //ユーザモード 23554: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_MODIFY | M60_FSLW_SIZE_LONG | M60_FSLW_TM_USER_DATA; 23555: a = mmuTranslateWriteUserData (a); 23556: return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a >>> XEiJ.BUS_PAGE_BITS].mmdRls (a); 23557: } 23558: } //mmuModifyLongFour(int,int) 23559: 23560: //-------------------------------------------------------------------------------- 23561: //ポーク 23562: // デバッガ用 23563: // エラーや副作用なしでライトする 23564: 23565: //mmuPokeByte (a, x, f) 23566: // ポークバイト 23567: public static void mmuPokeByte (int a, int x, int f) { 23568: f = f == -1 ? XEiJ.regSRS != 0 ? 5 : 1 : f & 7; 23569: MemoryMappedDevice[] mm = (DataBreakPoint.DBP_ON ? 23570: (f & 4) != 0 ? DataBreakPoint.dbpSuperMap : DataBreakPoint.dbpUserMap : 23571: (f & 4) != 0 ? XEiJ.busSuperMap : XEiJ.busUserMap); 23572: // 01234567 23573: if (0b01100110 << 24 << f < 0) { //DFC=1,2,5,6。アドレス変換あり 23574: int a0 = mmuTranslatePeek (a, f & 4, f & 2); 23575: if ((a ^ a0) != 1) { 23576: mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdVb (a0, x); 23577: } 23578: } else if (f != 7) { //DFC=0,3,4。アドレス変換なし 23579: mm[a >>> XEiJ.BUS_PAGE_BITS].mmdVb (a, x); 23580: } 23581: } //mmuPokeByte(int,int,int) 23582: 23583: //mmuPokeByteData (a, d, supervisor) 23584: // ポークバイト(データ) 23585: public static void mmuPokeByteData (int a, int d, int supervisor) { 23586: MemoryMappedDevice[] mm = supervisor != 0 ? DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap : DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap; 23587: int a0 = mmuTranslatePeek (a, supervisor, 0); 23588: if ((a ^ a0) != 1) { 23589: //mm[a >>> XEiJ.BUS_PAGE_BITS].mmdVb (a0, d); 23590: XEiJ.busVb (a0, d); 23591: } 23592: } //mmuPokeByteData(int,int,int) 23593: 23594: //mmuPokeWord (a, x, f) 23595: // ポークワード 23596: public static void mmuPokeWord (int a, int x, int f) { 23597: f = f == -1 ? XEiJ.regSRS != 0 ? 5 : 1 : f & 7; 23598: MemoryMappedDevice[] mm = (DataBreakPoint.DBP_ON ? 23599: (f & 4) != 0 ? DataBreakPoint.dbpSuperMap : DataBreakPoint.dbpUserMap : 23600: (f & 4) != 0 ? XEiJ.busSuperMap : XEiJ.busUserMap); 23601: // 01234567 23602: if (0b01100110 << 24 << f < 0) { //DFC=1,2,5,6。アドレス変換あり 23603: int a0 = mmuTranslatePeek (a, f & 4, f & 2); 23604: if ((a & 1) == 0) { //偶数 23605: if ((a ^ a0) != 1) { 23606: mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdVw (a0, x); 23607: } 23608: } else { //奇数 23609: int a1 = mmuTranslatePeek (a + 1, f & 4, f & 2); 23610: if ((a ^ a0) != 1) { 23611: mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdVb (a0, x >> 8); 23612: } 23613: if ((a + 1 ^ a1) != 1) { 23614: mm[a1 >>> XEiJ.BUS_PAGE_BITS].mmdVb (a1, x ); 23615: } 23616: } 23617: } else if (f != 7) { //DFC=0,3,4。アドレス変換なし 23618: if ((a & 1) == 0) { //偶数 23619: mm[a >>> XEiJ.BUS_PAGE_BITS].mmdVw (a, x); 23620: } else { //奇数 23621: mm[a >>> XEiJ.BUS_PAGE_BITS].mmdVb (a , x >> 8); 23622: mm[a + 1 >>> XEiJ.BUS_PAGE_BITS].mmdVb (a + 1, x ); 23623: } 23624: } 23625: } //mmuPokeWord(int,int,int) 23626: 23627: //mmuPokeWordData (a, d, supervisor) 23628: // ポークワード(データ) 23629: public static void mmuPokeWordData (int a, int d, int supervisor) { 23630: mmuPokeByteData (a, d >> 8, supervisor); 23631: mmuPokeByteData (a + 1, d, supervisor); 23632: } //mmuPokeWordData(int,int,int) 23633: 23634: //mmuPokeLong (a, x, f) 23635: // ポークロング 23636: public static void mmuPokeLong (int a, int x, int f) { 23637: f = f == -1 ? XEiJ.regSRS != 0 ? 5 : 1 : f & 7; 23638: MemoryMappedDevice[] mm = (DataBreakPoint.DBP_ON ? 23639: (f & 4) != 0 ? DataBreakPoint.dbpSuperMap : DataBreakPoint.dbpUserMap : 23640: (f & 4) != 0 ? XEiJ.busSuperMap : XEiJ.busUserMap); 23641: // 01234567 23642: if (0b01100110 << 24 << f < 0) { //DFC=1,2,5,6。アドレス変換あり 23643: int a0 = mmuTranslatePeek (a, f & 4, f & 2); 23644: if ((a & 3) == 0) { //4の倍数 23645: if ((a ^ a0) != 1) { 23646: mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdVl (a0, x); 23647: } 23648: } else if ((a & 1) == 0) { //4の倍数ではない偶数 23649: int a2 = mmuTranslatePeek (a + 2, f & 4, f & 2); 23650: if ((a ^ a0) != 1) { 23651: mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdVw (a0, x >> 16); 23652: } 23653: if ((a + 2 ^ a2) != 1) { 23654: mm[a2 >>> XEiJ.BUS_PAGE_BITS].mmdVw (a2, x); 23655: } 23656: } else { //奇数 23657: int a1 = mmuTranslatePeek (a + 1, f & 4, f & 2); 23658: int a3 = mmuTranslatePeek (a + 3, f & 4, f & 2); 23659: if ((a ^ a0) != 1) { 23660: mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdVb (a0, x >> 24); 23661: } 23662: if ((a + 1 ^ a1) != 1) { 23663: mm[a1 >>> XEiJ.BUS_PAGE_BITS].mmdVw (a1, x >> 8); 23664: } 23665: if ((a + 3 ^ a3) != 1) { 23666: mm[a3 >>> XEiJ.BUS_PAGE_BITS].mmdVb (a3, x); 23667: } 23668: } 23669: } else if (f != 7) { //DFC=0,3,4。アドレス変換なし 23670: if ((a & 3) == 0) { //4の倍数 23671: mm[a >>> XEiJ.BUS_PAGE_BITS].mmdVl (a, x); 23672: } else if ((a & 1) == 0) { //4の倍数ではない偶数 23673: mm[a >>> XEiJ.BUS_PAGE_BITS].mmdVw (a , x >> 16); 23674: mm[a + 2 >>> XEiJ.BUS_PAGE_BITS].mmdVw (a + 2, x ); 23675: } else { //奇数 23676: mm[a >>> XEiJ.BUS_PAGE_BITS].mmdVb (a, x >> 24); 23677: mm[a + 1 >>> XEiJ.BUS_PAGE_BITS].mmdVw (a + 1, x >> 8); 23678: mm[a + 3 >>> XEiJ.BUS_PAGE_BITS].mmdVb (a + 3, x ); 23679: } 23680: } 23681: } //mmuPokeLong(int,int,int) 23682: 23683: //mmuPokeLongData (a, d, supervisor) 23684: // ポークロング(データ) 23685: public static void mmuPokeLongData (int a, int d, int supervisor) { 23686: mmuPokeByteData (a, d >> 24, supervisor); 23687: mmuPokeByteData (a + 1, d >> 16, supervisor); 23688: mmuPokeByteData (a + 2, d >> 8, supervisor); 23689: mmuPokeByteData (a + 3, d, supervisor); 23690: } //mmuPokeLongData(int,int,int) 23691: 23692: //mmuPokeQuad (a, x, f) 23693: // ポーククワッド 23694: public static void mmuPokeQuad (int a, long x, int f) { 23695: mmuPokeLong (a , (int) (x >> 32), f); 23696: mmuPokeLong (a + 4, (int) x , f); 23697: } //mmuPokeQuad(int,long,int) 23698: 23699: //mmuPokeExtended (a, b, f) 23700: public static void mmuPokeExtended (int a, byte[] b, int f) { 23701: for (int i = 0; i < 12; i++) { 23702: mmuPokeByte (a + i, b[i], f); 23703: } 23704: } //mmuPokeQuad(int,long,int) 23705: 23706: //a = mmuPokeStringZ (a, str, f) 23707: // ポークストリング 23708: // 文字列をUTF-16からSJISに変換しながらメモリに書き込む 23709: // 文字列に'\0'が含まれるときはその手前まで書き込む 23710: // SJISに変換できない文字は'※'になる 23711: // 最後に'\0'を書き込む 23712: // '\0'を含まない書き込んだ文字列を返す 23713: public static String mmuPokeStringZ (int a, String str, int f) { 23714: StringBuilder sb = new StringBuilder (); 23715: int l = str.length (); 23716: for (int i = 0; i < l; i++) { 23717: int u = str.charAt (i); 23718: if (u == '\0') { 23719: break; 23720: } 23721: int s = CharacterCode.chrCharToSJIS[u]; //SJISに変換する 23722: if (s == 0) { //変換できない 23723: s = 0x81a6; //'※' 23724: } 23725: if (s >> 8 != 0) { 23726: mmuPokeByte (a++, s >> 8, f); 23727: } 23728: mmuPokeByte (a++, s, f); 23729: u = CharacterCode.chrSJISToChar[s]; //UTF-16に変換する 23730: if (u == 0) { //変換できない 23731: u = 0xfffd; 23732: } 23733: sb.append ((char) u); 23734: } 23735: mmuPokeByte (a, 0, f); //'\0' 23736: return sb.toString (); 23737: } //mmuPokeStringZ(int,String,int) 23738: 23739: //-------------------------------------------------------------------------------- 23740: //ライト 23741: // アドレス変換はライト 23742: // FSLWのRead and WriteはWrite 23743: 23744: //mmuWriteByteData (a, d, supervisor) 23745: // ライトバイト符号拡張(データ) 23746: public static void mmuWriteByteData (int a, int d, int supervisor) throws M68kException { 23747: if (supervisor != 0) { //スーパーバイザモード 23748: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_BYTE | M60_FSLW_TM_SUPER_DATA; 23749: int t = mmuTranslateWriteSuperData (a); 23750: (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWb (t, d); 23751: } else { //ユーザモード 23752: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_BYTE | M60_FSLW_TM_USER_DATA; 23753: int t = mmuTranslateWriteUserData (a); 23754: (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWb (t, d); 23755: } 23756: } //mmuWriteByteData(int,int,int) 23757: 23758: //mmuWriteWordData (a, d, supervisor) 23759: // ライトワード符号拡張(データ) 23760: public static void mmuWriteWordData (int a, int d, int supervisor) throws M68kException { 23761: if (supervisor != 0) { //スーパーバイザモード 23762: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_WORD | M60_FSLW_TM_SUPER_DATA; 23763: int t = mmuTranslateWriteSuperData (a); //a+1が必要なので上書き不可 23764: if ((a & 1) == 0) { //偶数 23765: (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWw (t, d); 23766: } else { //奇数 23767: (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWb (t, d >> 8); 23768: m60FSLW ^= M60_FSLW_IOMA_FIRST ^ M60_FSLW_IOMA_SECOND; 23769: t = mmuTranslateWriteSuperData (a + 1); //偶数 23770: (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWb (t, d); 23771: } 23772: } else { //ユーザモード 23773: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_WORD | M60_FSLW_TM_USER_DATA; 23774: int t = mmuTranslateWriteUserData (a); //a+1が必要なので上書き不可 23775: if ((a & 1) == 0) { //偶数 23776: (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWw (t, d); 23777: } else { //奇数 23778: (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWb (t, d >> 8); 23779: m60FSLW ^= M60_FSLW_IOMA_FIRST ^ M60_FSLW_IOMA_SECOND; 23780: t = mmuTranslateWriteUserData (a + 1); //偶数 23781: (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWb (t, d); 23782: } 23783: } 23784: } //mmuWriteWordData(int,int,int) 23785: 23786: //mmuWriteWordEven (a, d, supervisor) 23787: // ライトワード符号拡張(偶数) 23788: public static void mmuWriteWordEven (int a, int d, int supervisor) throws M68kException { 23789: if (supervisor != 0) { //スーパーバイザモード 23790: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_WORD | M60_FSLW_TM_SUPER_DATA; 23791: a = mmuTranslateWriteSuperData (a); 23792: (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a >>> XEiJ.BUS_PAGE_BITS].mmdWw (a, d); 23793: } else { //ユーザモード 23794: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_WORD | M60_FSLW_TM_USER_DATA; 23795: a = mmuTranslateWriteUserData (a); 23796: (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a >>> XEiJ.BUS_PAGE_BITS].mmdWw (a, d); 23797: } 23798: } //mmuWriteWordEven(int,int,int) 23799: 23800: //mmuWriteLongData (a, d, supervisor) 23801: // ライトロング(データ) 23802: public static void mmuWriteLongData (int a, int d, int supervisor) throws M68kException { 23803: if (supervisor != 0) { //スーパーバイザモード 23804: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_LONG | M60_FSLW_TM_SUPER_DATA; 23805: int t = mmuTranslateWriteSuperData (a); //a+1,a+2,a+3が必要なので上書き不可 23806: if ((a & 3) == 0) { //4の倍数 23807: (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWl (t, d); 23808: } else if ((a & 1) == 0) { //4の倍数+2 23809: (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWw (t, d >> 16); 23810: m60FSLW ^= M60_FSLW_IOMA_FIRST ^ M60_FSLW_IOMA_SECOND; 23811: t = mmuTranslateWriteSuperData (a + 2); //偶数 23812: (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWw (t, d); 23813: } else { //奇数 23814: (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWb (t, d >> 24); 23815: m60FSLW ^= M60_FSLW_IOMA_FIRST ^ M60_FSLW_IOMA_SECOND; 23816: t = mmuTranslateWriteSuperData (a + 1); //偶数 23817: (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWw (t, d >> 8); 23818: t = mmuTranslateWriteSuperData (a + 3); //偶数 23819: (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWb (t, d); 23820: } 23821: } else { //ユーザモード 23822: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_LONG | M60_FSLW_TM_USER_DATA; 23823: int t = mmuTranslateWriteUserData (a); //a+1,a+2,a+3が必要なので上書き不可 23824: if ((a & 3) == 0) { //4の倍数 23825: (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWl (t, d); 23826: } else if ((a & 1) == 0) { //4の倍数+2 23827: (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWw (t, d >> 16); 23828: m60FSLW ^= M60_FSLW_IOMA_FIRST ^ M60_FSLW_IOMA_SECOND; 23829: t = mmuTranslateWriteUserData (a + 2); //偶数 23830: (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWw (t, d); 23831: } else { //奇数 23832: (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWb (t, d >> 24); 23833: m60FSLW ^= M60_FSLW_IOMA_FIRST ^ M60_FSLW_IOMA_SECOND; 23834: t = mmuTranslateWriteUserData (a + 1); //偶数 23835: (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWw (t, d >> 8); 23836: t = mmuTranslateWriteUserData (a + 3); //偶数 23837: (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWb (t, d); 23838: } 23839: } 23840: } //mmuWriteLongData(int,int,int) 23841: 23842: //mmuWriteLongEven (a, d, supervisor) 23843: // ライトロング(偶数) 23844: public static void mmuWriteLongEven (int a, int d, int supervisor) throws M68kException { 23845: if (supervisor != 0) { //スーパーバイザモード 23846: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_LONG | M60_FSLW_TM_SUPER_DATA; 23847: int t = mmuTranslateWriteSuperData (a); //a+2が必要なので上書き不可 23848: if ((a & 2) == 0) { //4の倍数 23849: (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWl (t, d); 23850: } else { //4の倍数+2 23851: (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWw (t, d >> 16); 23852: m60FSLW ^= M60_FSLW_IOMA_FIRST ^ M60_FSLW_IOMA_SECOND; 23853: t = mmuTranslateWriteSuperData (a + 2); //偶数 23854: (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWw (t, d); 23855: } 23856: } else { //ユーザモード 23857: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_LONG | M60_FSLW_TM_USER_DATA; 23858: int t = mmuTranslateWriteUserData (a); //a+2が必要なので上書き不可 23859: if ((a & 2) == 0) { //4の倍数 23860: (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWl (t, d); 23861: } else { //4の倍数+2 23862: (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWw (t, d >> 16); 23863: m60FSLW ^= M60_FSLW_IOMA_FIRST ^ M60_FSLW_IOMA_SECOND; 23864: t = mmuTranslateWriteUserData (a + 2); //偶数 23865: (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWw (t, d); 23866: } 23867: } 23868: } //mmuWriteLongEven(int,int,int) 23869: 23870: //mmuWriteLongFour (a, d, supervisor) 23871: // ライトロング(4の倍数) 23872: public static void mmuWriteLongFour (int a, int d, int supervisor) throws M68kException { 23873: if (supervisor != 0) { //スーパーバイザモード 23874: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_LONG | M60_FSLW_TM_SUPER_DATA; 23875: a = mmuTranslateWriteSuperData (a); 23876: (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a >>> XEiJ.BUS_PAGE_BITS].mmdWl (a, d); 23877: } else { //ユーザモード 23878: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_LONG | M60_FSLW_TM_USER_DATA; 23879: a = mmuTranslateWriteUserData (a); 23880: (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a >>> XEiJ.BUS_PAGE_BITS].mmdWl (a, d); 23881: } 23882: } //mmuWriteLongFour(int,int,int) 23883: 23884: //mmuWriteQuadData (a, d, supervisor) 23885: // ライトクワッド(データ) 23886: public static void mmuWriteQuadData (int a, long d, int supervisor) throws M68kException { 23887: if (supervisor != 0) { //スーパーバイザモード 23888: final MemoryMappedDevice[] map = DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap; 23889: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_SUPER_DATA; 23890: int t = mmuTranslateWriteSuperData (a); 23891: if ((a & 3) == 0) { //4n 23892: map[t >>> XEiJ.BUS_PAGE_BITS].mmdWl (t, (int) (d >> 32)); 23893: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_SUPER_DATA; 23894: t = mmuTranslateWriteSuperData (a + 4); 23895: map[t >>> XEiJ.BUS_PAGE_BITS].mmdWl (t, (int) d); 23896: } else if ((a & 1) == 0) { //4n+2 23897: map[t >>> XEiJ.BUS_PAGE_BITS].mmdWw (t, (int) (d >> 48)); 23898: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_SUPER_DATA; 23899: t = mmuTranslateWriteSuperData (a + 2); 23900: map[t >>> XEiJ.BUS_PAGE_BITS].mmdWl (t, (int) (d >> 16)); 23901: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_SUPER_DATA; 23902: t = mmuTranslateWriteSuperData (a + 6); 23903: map[t >>> XEiJ.BUS_PAGE_BITS].mmdWw (t, (int) d); 23904: } else if ((a & 3) == 1) { //4n+1 23905: map[t >>> XEiJ.BUS_PAGE_BITS].mmdWb (t, (int) (d >> 56)); 23906: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_SUPER_DATA; 23907: t = mmuTranslateWriteSuperData (a + 1); 23908: map[t >>> XEiJ.BUS_PAGE_BITS].mmdWw (t, (int) (d >> 40)); 23909: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_SUPER_DATA; 23910: t = mmuTranslateWriteSuperData (a + 3); 23911: map[t >>> XEiJ.BUS_PAGE_BITS].mmdWl (t, (int) (d >> 8)); 23912: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_SUPER_DATA; 23913: t = mmuTranslateWriteSuperData (a + 7); 23914: map[t >>> XEiJ.BUS_PAGE_BITS].mmdWb (t, (int) d); 23915: } else { //4n+3 23916: map[t >>> XEiJ.BUS_PAGE_BITS].mmdWb (t, (int) (d >> 56)); 23917: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_SUPER_DATA; 23918: t = mmuTranslateWriteSuperData (a + 1); 23919: map[t >>> XEiJ.BUS_PAGE_BITS].mmdWl (t, (int) (d >> 24)); 23920: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_SUPER_DATA; 23921: t = mmuTranslateWriteSuperData (a + 5); 23922: map[t >>> XEiJ.BUS_PAGE_BITS].mmdWw (t, (int) (d >> 8)); 23923: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_SUPER_DATA; 23924: t = mmuTranslateWriteSuperData (a + 7); 23925: map[t >>> XEiJ.BUS_PAGE_BITS].mmdWb (t, (int) d); 23926: } 23927: } else { //ユーザモード 23928: final MemoryMappedDevice[] map = DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap; 23929: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_USER_DATA; 23930: int t = mmuTranslateWriteUserData (a); 23931: if ((a & 3) == 0) { //4n 23932: map[t >>> XEiJ.BUS_PAGE_BITS].mmdWl (t, (int) (d >> 32)); 23933: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_USER_DATA; 23934: t = mmuTranslateWriteUserData (a + 4); 23935: map[t >>> XEiJ.BUS_PAGE_BITS].mmdWl (t, (int) d); 23936: } else if ((a & 1) == 0) { //4n+2 23937: map[t >>> XEiJ.BUS_PAGE_BITS].mmdWw (t, (int) (d >> 48)); 23938: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_USER_DATA; 23939: t = mmuTranslateWriteUserData (a + 2); 23940: map[t >>> XEiJ.BUS_PAGE_BITS].mmdWl (t, (int) (d >> 16)); 23941: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_USER_DATA; 23942: t = mmuTranslateWriteUserData (a + 6); 23943: map[t >>> XEiJ.BUS_PAGE_BITS].mmdWw (t, (int) d); 23944: } else if ((a & 3) == 1) { //4n+1 23945: map[t >>> XEiJ.BUS_PAGE_BITS].mmdWb (t, (int) (d >> 56)); 23946: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_USER_DATA; 23947: t = mmuTranslateWriteUserData (a + 1); 23948: map[t >>> XEiJ.BUS_PAGE_BITS].mmdWw (t, (int) (d >> 40)); 23949: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_USER_DATA; 23950: t = mmuTranslateWriteUserData (a + 3); 23951: map[t >>> XEiJ.BUS_PAGE_BITS].mmdWl (t, (int) (d >> 8)); 23952: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_USER_DATA; 23953: t = mmuTranslateWriteUserData (a + 7); 23954: map[t >>> XEiJ.BUS_PAGE_BITS].mmdWb (t, (int) d); 23955: } else { //4n+3 23956: map[t >>> XEiJ.BUS_PAGE_BITS].mmdWb (t, (int) (d >> 56)); 23957: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_USER_DATA; 23958: t = mmuTranslateWriteUserData (a + 1); 23959: map[t >>> XEiJ.BUS_PAGE_BITS].mmdWl (t, (int) (d >> 24)); 23960: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_USER_DATA; 23961: t = mmuTranslateWriteUserData (a + 5); 23962: map[t >>> XEiJ.BUS_PAGE_BITS].mmdWw (t, (int) (d >> 8)); 23963: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_USER_DATA; 23964: t = mmuTranslateWriteUserData (a + 7); 23965: map[t >>> XEiJ.BUS_PAGE_BITS].mmdWb (t, (int) d); 23966: } 23967: } 23968: } //mmuWriteQuadData(int,long,int) 23969: 23970: //mmuWriteQuadSecond (a, d, supervisor) 23971: // ライトクワッド(2番目) 23972: // エクステンデッドとラインの2番目で使う 23973: public static void mmuWriteQuadSecond (int a, long d, int supervisor) throws M68kException { 23974: if (supervisor != 0) { //スーパーバイザモード 23975: final MemoryMappedDevice[] map = DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap; 23976: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_SUPER_DATA; 23977: int t = mmuTranslateWriteSuperData (a); 23978: if ((a & 3) == 0) { //4n 23979: map[t >>> XEiJ.BUS_PAGE_BITS].mmdWl (t, (int) (d >> 32)); 23980: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_SUPER_DATA; 23981: t = mmuTranslateWriteSuperData (a + 4); 23982: map[t >>> XEiJ.BUS_PAGE_BITS].mmdWl (t, (int) d); 23983: } else if ((a & 1) == 0) { //4n+2 23984: map[t >>> XEiJ.BUS_PAGE_BITS].mmdWw (t, (int) (d >> 48)); 23985: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_SUPER_DATA; 23986: t = mmuTranslateWriteSuperData (a + 2); 23987: map[t >>> XEiJ.BUS_PAGE_BITS].mmdWl (t, (int) (d >> 16)); 23988: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_SUPER_DATA; 23989: t = mmuTranslateWriteSuperData (a + 6); 23990: map[t >>> XEiJ.BUS_PAGE_BITS].mmdWw (t, (int) d); 23991: } else if ((a & 3) == 1) { //4n+1 23992: map[t >>> XEiJ.BUS_PAGE_BITS].mmdWb (t, (int) (d >> 56)); 23993: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_SUPER_DATA; 23994: t = mmuTranslateWriteSuperData (a + 1); 23995: map[t >>> XEiJ.BUS_PAGE_BITS].mmdWw (t, (int) (d >> 40)); 23996: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_SUPER_DATA; 23997: t = mmuTranslateWriteSuperData (a + 3); 23998: map[t >>> XEiJ.BUS_PAGE_BITS].mmdWl (t, (int) (d >> 8)); 23999: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_SUPER_DATA; 24000: t = mmuTranslateWriteSuperData (a + 7); 24001: map[t >>> XEiJ.BUS_PAGE_BITS].mmdWb (t, (int) d); 24002: } else { //4n+3 24003: map[t >>> XEiJ.BUS_PAGE_BITS].mmdWb (t, (int) (d >> 56)); 24004: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_SUPER_DATA; 24005: t = mmuTranslateWriteSuperData (a + 1); 24006: map[t >>> XEiJ.BUS_PAGE_BITS].mmdWl (t, (int) (d >> 24)); 24007: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_SUPER_DATA; 24008: t = mmuTranslateWriteSuperData (a + 5); 24009: map[t >>> XEiJ.BUS_PAGE_BITS].mmdWw (t, (int) (d >> 8)); 24010: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_SUPER_DATA; 24011: t = mmuTranslateWriteSuperData (a + 7); 24012: map[t >>> XEiJ.BUS_PAGE_BITS].mmdWb (t, (int) d); 24013: } 24014: } else { //ユーザモード 24015: final MemoryMappedDevice[] map = DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap; 24016: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_USER_DATA; 24017: int t = mmuTranslateWriteUserData (a); 24018: if ((a & 3) == 0) { //4n 24019: map[t >>> XEiJ.BUS_PAGE_BITS].mmdWl (t, (int) (d >> 32)); 24020: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_USER_DATA; 24021: t = mmuTranslateWriteUserData (a + 4); 24022: map[t >>> XEiJ.BUS_PAGE_BITS].mmdWl (t, (int) d); 24023: } else if ((a & 1) == 0) { //4n+2 24024: map[t >>> XEiJ.BUS_PAGE_BITS].mmdWw (t, (int) (d >> 48)); 24025: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_USER_DATA; 24026: t = mmuTranslateWriteUserData (a + 2); 24027: map[t >>> XEiJ.BUS_PAGE_BITS].mmdWl (t, (int) (d >> 16)); 24028: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_USER_DATA; 24029: t = mmuTranslateWriteUserData (a + 6); 24030: map[t >>> XEiJ.BUS_PAGE_BITS].mmdWw (t, (int) d); 24031: } else if ((a & 3) == 1) { //4n+1 24032: map[t >>> XEiJ.BUS_PAGE_BITS].mmdWb (t, (int) (d >> 56)); 24033: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_USER_DATA; 24034: t = mmuTranslateWriteUserData (a + 1); 24035: map[t >>> XEiJ.BUS_PAGE_BITS].mmdWw (t, (int) (d >> 40)); 24036: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_USER_DATA; 24037: t = mmuTranslateWriteUserData (a + 3); 24038: map[t >>> XEiJ.BUS_PAGE_BITS].mmdWl (t, (int) (d >> 8)); 24039: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_USER_DATA; 24040: t = mmuTranslateWriteUserData (a + 7); 24041: map[t >>> XEiJ.BUS_PAGE_BITS].mmdWb (t, (int) d); 24042: } else { //4n+3 24043: map[t >>> XEiJ.BUS_PAGE_BITS].mmdWb (t, (int) (d >> 56)); 24044: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_USER_DATA; 24045: t = mmuTranslateWriteUserData (a + 1); 24046: map[t >>> XEiJ.BUS_PAGE_BITS].mmdWl (t, (int) (d >> 24)); 24047: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_USER_DATA; 24048: t = mmuTranslateWriteUserData (a + 5); 24049: map[t >>> XEiJ.BUS_PAGE_BITS].mmdWw (t, (int) (d >> 8)); 24050: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_USER_DATA; 24051: t = mmuTranslateWriteUserData (a + 7); 24052: map[t >>> XEiJ.BUS_PAGE_BITS].mmdWb (t, (int) d); 24053: } 24054: } 24055: } //mmuWriteQuadSecond(int,int,int) 24056: 24057: 24058: 24059: //mmuReadByteArray (address, array, offset, length, supervisor) 24060: // リードバイト配列。先頭から読み出す 24061: // address 先頭アドレス 24062: // array バイト配列 24063: // offset 先頭オフセット 24064: // length バイト数 24065: public static void mmuReadByteArray (int address, byte[] array, int offset, int length, int supervisor) throws M68kException { 24066: if (false) { //1バイトずつmmuReadByteSignDataを呼び出す 24067: for (int index = 0; index < length; index++) { 24068: array[offset + index] = mmuReadByteSignData (address + index, supervisor); 24069: } 24070: } else { 24071: // 変換後アドレスは0 24072: // デバイスはnull 24073: // while 残りが1バイト以上 24074: // if ページの先頭 24075: // デバイスはnull 24076: // if アドレスが4nかつ残りが4バイト以上 24077: // FSLWはリードロング 24078: // if デバイスがnull 24079: // 変換後アドレスを求める 24080: // デバイスを求める 24081: // リードロング 24082: // elif アドレスが2nかつ残りが2バイト以上 24083: // FSLWはリードワード 24084: // if デバイスがnull 24085: // 変換後アドレスを求める 24086: // デバイスを求める 24087: // リードワード 24088: // else 24089: // FSLWはリードバイト 24090: // if デバイスがnull 24091: // 変換後アドレスを求める 24092: // デバイスを求める 24093: // リードバイト 24094: // endwhile 24095: length += offset; //lengthはoffsetの上限 24096: final int mask = Math.min (XEiJ.BUS_PAGE_SIZE, mmuPageSize) - 1; 24097: if (supervisor != 0) { //スーパーバイザモード 24098: final MemoryMappedDevice[] map = DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap; 24099: int translated = 0; //変換後アドレスは0 24100: MemoryMappedDevice device = null; //デバイスはnull 24101: while (offset < length) { //残りが1バイト以上 24102: if ((address & mask) == 0) { //ページの先頭 24103: device = null; //デバイスはnull 24104: } 24105: if ((address & 3) == 0 && offset + 4 <= length) { //アドレスが4nかつ残りが4バイト以上 24106: m60FSLW = (M60_FSLW_IOMA_FIRST | 24107: M60_FSLW_RW_READ | 24108: M60_FSLW_SIZE_LONG | 24109: M60_FSLW_TM_SUPER_DATA); //FSLWはリードロング 24110: if (device == null) { //デバイスがnull 24111: translated = mmuTranslateReadSuperData (address); //変換後アドレスを求める 24112: device = map[translated >>> XEiJ.BUS_PAGE_BITS]; //デバイスを求める 24113: } 24114: int data = device.mmdRls (translated); //リードロング 24115: array[offset] = (byte) (data >> 24); 24116: array[offset + 1] = (byte) (data >> 16); 24117: array[offset + 2] = (byte) (data >> 8); 24118: array[offset + 3] = (byte) data; 24119: address += 4; 24120: translated += 4; 24121: offset += 4; 24122: } else if ((address & 1) == 0 && offset + 2 <= length) { //アドレスが2nかつ残りが2バイト以上 24123: m60FSLW = (M60_FSLW_IOMA_FIRST | 24124: M60_FSLW_RW_READ | 24125: M60_FSLW_SIZE_WORD | 24126: M60_FSLW_TM_SUPER_DATA); //FSLWはリードワード 24127: if (device == null) { //デバイスがnull 24128: translated = mmuTranslateReadSuperData (address); //変換後アドレスを求める 24129: device = map[translated >>> XEiJ.BUS_PAGE_BITS]; //デバイスを求める 24130: } 24131: int data = device.mmdRws (translated); //リードワード 24132: array[offset] = (byte) (data >> 8); 24133: array[offset + 1] = (byte) data; 24134: address += 2; 24135: translated += 2; 24136: offset += 2; 24137: } else { 24138: m60FSLW = (M60_FSLW_IOMA_FIRST | 24139: M60_FSLW_RW_READ | 24140: M60_FSLW_SIZE_BYTE | 24141: M60_FSLW_TM_SUPER_DATA); //FSLWはリードバイト 24142: if (device == null) { //デバイスがnull 24143: translated = mmuTranslateReadSuperData (address); //変換後アドレスを求める 24144: device = map[translated >>> XEiJ.BUS_PAGE_BITS]; //デバイスを求める 24145: } 24146: array[offset] = device.mmdRbs (translated); //リードバイト 24147: address++; 24148: translated++; 24149: offset++; 24150: } 24151: } //while 24152: } else { //ユーザモード 24153: final MemoryMappedDevice[] map = DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap; 24154: int translated = 0; //変換後アドレスは0 24155: MemoryMappedDevice device = null; //デバイスはnull 24156: while (offset < length) { //残りが1バイト以上 24157: if ((address & mask) == 0) { //ページの先頭 24158: device = null; //デバイスはnull 24159: } 24160: if ((address & 3) == 0 && offset + 4 <= length) { //アドレスが4nかつ残りが4バイト以上 24161: m60FSLW = (M60_FSLW_IOMA_FIRST | 24162: M60_FSLW_RW_READ | 24163: M60_FSLW_SIZE_LONG | 24164: M60_FSLW_TM_USER_DATA); //FSLWはリードロング 24165: if (device == null) { //デバイスがnull 24166: translated = mmuTranslateReadUserData (address); //変換後アドレスを求める 24167: device = map[translated >>> XEiJ.BUS_PAGE_BITS]; //デバイスを求める 24168: } 24169: int data = device.mmdRls (translated); //リードロング 24170: array[offset] = (byte) (data >> 24); 24171: array[offset + 1] = (byte) (data >> 16); 24172: array[offset + 2] = (byte) (data >> 8); 24173: array[offset + 3] = (byte) data; 24174: address += 4; 24175: translated += 4; 24176: offset += 4; 24177: } else if ((address & 1) == 0 && offset + 2 <= length) { //アドレスが2nかつ残りが2バイト以上 24178: m60FSLW = (M60_FSLW_IOMA_FIRST | 24179: M60_FSLW_RW_READ | 24180: M60_FSLW_SIZE_WORD | 24181: M60_FSLW_TM_USER_DATA); //FSLWはリードワード 24182: if (device == null) { //デバイスがnull 24183: translated = mmuTranslateReadUserData (address); //変換後アドレスを求める 24184: device = map[translated >>> XEiJ.BUS_PAGE_BITS]; //デバイスを求める 24185: } 24186: int data = device.mmdRws (translated); //リードワード 24187: array[offset] = (byte) (data >> 8); 24188: array[offset + 1] = (byte) data; 24189: address += 2; 24190: translated += 2; 24191: offset += 2; 24192: } else { 24193: m60FSLW = (M60_FSLW_IOMA_FIRST | 24194: M60_FSLW_RW_READ | 24195: M60_FSLW_SIZE_BYTE | 24196: M60_FSLW_TM_USER_DATA); //FSLWはリードバイト 24197: if (device == null) { //デバイスがnull 24198: translated = mmuTranslateReadUserData (address); //変換後アドレスを求める 24199: device = map[translated >>> XEiJ.BUS_PAGE_BITS]; //デバイスを求める 24200: } 24201: array[offset] = device.mmdRbs (translated); //リードバイト 24202: address++; 24203: translated++; 24204: offset++; 24205: } 24206: } //while 24207: } 24208: } 24209: } //mmuReadByteArray 24210: 24211: //mmuWriteByteArray (address, array, offset, length, supervisor) 24212: // ライトバイト配列。先頭から書き込む 24213: // address 先頭アドレス 24214: // array バイト配列 24215: // offset 先頭オフセット 24216: // length バイト数 24217: public static void mmuWriteByteArray (int address, byte[] array, int offset, int length, int supervisor) throws M68kException { 24218: if (false) { //1バイトずつmmuWriteByteDataを呼び出す 24219: for (int index = 0; index < length; index++) { 24220: mmuWriteByteData (address + index, array[offset + index], supervisor); 24221: } 24222: } else { 24223: // 変換後アドレスは0 24224: // デバイスはnull 24225: // while 残りが1バイト以上 24226: // if ページの先頭 24227: // デバイスはnull 24228: // if アドレスが4nかつ残りが4バイト以上 24229: // FSLWはライトロング 24230: // if デバイスがnull 24231: // 変換後アドレスを求める 24232: // デバイスを求める 24233: // ライトロング 24234: // elif アドレスが2nかつ残りが2バイト以上 24235: // FSLWはライトワード 24236: // if デバイスがnull 24237: // 変換後アドレスを求める 24238: // デバイスを求める 24239: // ライトワード 24240: // else 24241: // FSLWはライトバイト 24242: // if デバイスがnull 24243: // 変換後アドレスを求める 24244: // デバイスを求める 24245: // ライトバイト 24246: // endwhile 24247: length += offset; //lengthはoffsetの上限 24248: final int mask = Math.min (XEiJ.BUS_PAGE_SIZE, mmuPageSize) - 1; 24249: if (supervisor != 0) { //スーパーバイザモード 24250: final MemoryMappedDevice[] map = DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap; 24251: int translated = 0; //変換後アドレスは0 24252: MemoryMappedDevice device = null; //デバイスはnull 24253: while (offset < length) { //残りが1バイト以上 24254: if ((address & mask) == 0) { //ページの先頭 24255: device = null; //デバイスはnull 24256: } 24257: if ((address & 3) == 0 && offset + 4 <= length) { //アドレスが4nかつ残りが4バイト以上 24258: m60FSLW = (M60_FSLW_IOMA_FIRST | 24259: M60_FSLW_RW_WRITE | 24260: M60_FSLW_SIZE_LONG | 24261: M60_FSLW_TM_SUPER_DATA); //FSLWはライトロング 24262: if (device == null) { //デバイスがnull 24263: translated = mmuTranslateWriteSuperData (address); //変換後アドレスを求める 24264: device = map[translated >>> XEiJ.BUS_PAGE_BITS]; //デバイスを求める 24265: } 24266: device.mmdWl (translated, 24267: array[offset] << 24 | 24268: (0xff & array[offset + 1]) << 16 | 24269: (0xff & array[offset + 2]) << 8 | 24270: (0xff & array[offset + 3])); //ライトロング 24271: address += 4; 24272: translated += 4; 24273: offset += 4; 24274: } else if ((address & 1) == 0 && offset + 2 <= length) { //アドレスが2nかつ残りが2バイト以上 24275: m60FSLW = (M60_FSLW_IOMA_FIRST | 24276: M60_FSLW_RW_WRITE | 24277: M60_FSLW_SIZE_WORD | 24278: M60_FSLW_TM_SUPER_DATA); //FSLWはライトワード 24279: if (device == null) { //デバイスがnull 24280: translated = mmuTranslateWriteSuperData (address); //変換後アドレスを求める 24281: device = map[translated >>> XEiJ.BUS_PAGE_BITS]; //デバイスを求める 24282: } 24283: device.mmdWw (translated, 24284: array[offset] << 8 | 24285: (0xff & array[offset + 1])); //ライトワード 24286: address += 2; 24287: translated += 2; 24288: offset += 2; 24289: } else { 24290: m60FSLW = (M60_FSLW_IOMA_FIRST | 24291: M60_FSLW_RW_WRITE | 24292: M60_FSLW_SIZE_BYTE | 24293: M60_FSLW_TM_SUPER_DATA); //FSLWはライトバイト 24294: if (device == null) { //デバイスがnull 24295: translated = mmuTranslateWriteSuperData (address); //変換後アドレスを求める 24296: device = map[translated >>> XEiJ.BUS_PAGE_BITS]; //デバイスを求める 24297: } 24298: device.mmdWb (translated, array[offset]); //ライトバイト 24299: address++; 24300: translated++; 24301: offset++; 24302: } 24303: } //while 24304: } else { //ユーザモード 24305: final MemoryMappedDevice[] map = DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap; 24306: int translated = 0; //変換後アドレスは0 24307: MemoryMappedDevice device = null; //デバイスはnull 24308: while (offset < length) { //残りが1バイト以上 24309: if ((address & mask) == 0) { //ページの先頭 24310: device = null; //デバイスはnull 24311: } 24312: if ((address & 3) == 0 && offset + 4 <= length) { //アドレスが4nかつ残りが4バイト以上 24313: m60FSLW = (M60_FSLW_IOMA_FIRST | 24314: M60_FSLW_RW_WRITE | 24315: M60_FSLW_SIZE_LONG | 24316: M60_FSLW_TM_USER_DATA); //FSLWはライトロング 24317: if (device == null) { //デバイスがnull 24318: translated = mmuTranslateWriteUserData (address); //変換後アドレスを求める 24319: device = map[translated >>> XEiJ.BUS_PAGE_BITS]; //デバイスを求める 24320: } 24321: device.mmdWl (translated, 24322: array[offset] << 24 | 24323: (0xff & array[offset + 1]) << 16 | 24324: (0xff & array[offset + 2]) << 8 | 24325: (0xff & array[offset + 3])); //ライトロング 24326: address += 4; 24327: translated += 4; 24328: offset += 4; 24329: } else if ((address & 1) == 0 && offset + 2 <= length) { //アドレスが2nかつ残りが2バイト以上 24330: m60FSLW = (M60_FSLW_IOMA_FIRST | 24331: M60_FSLW_RW_WRITE | 24332: M60_FSLW_SIZE_WORD | 24333: M60_FSLW_TM_USER_DATA); //FSLWはライトワード 24334: if (device == null) { //デバイスがnull 24335: translated = mmuTranslateWriteUserData (address); //変換後アドレスを求める 24336: device = map[translated >>> XEiJ.BUS_PAGE_BITS]; //デバイスを求める 24337: } 24338: device.mmdWw (translated, 24339: array[offset] << 8 | 24340: (0xff & array[offset + 1])); //ライトワード 24341: address += 2; 24342: translated += 2; 24343: offset += 2; 24344: } else { 24345: m60FSLW = (M60_FSLW_IOMA_FIRST | 24346: M60_FSLW_RW_WRITE | 24347: M60_FSLW_SIZE_BYTE | 24348: M60_FSLW_TM_USER_DATA); //FSLWはライトバイト 24349: if (device == null) { //デバイスがnull 24350: translated = mmuTranslateWriteUserData (address); //変換後アドレスを求める 24351: device = map[translated >>> XEiJ.BUS_PAGE_BITS]; //デバイスを求める 24352: } 24353: device.mmdWb (translated, array[offset]); //ライトバイト 24354: address++; 24355: translated++; 24356: offset++; 24357: } 24358: } //while 24359: } 24360: } 24361: } //mmuWriteByteArray 24362: 24363: //mmuWriteByteArrayDecrement (address, array, offset, length, supervisor) 24364: // ライトバイト配列デクリメント。末尾から書き込む 24365: // address 先頭アドレス 24366: // array バイト配列 24367: // offset 先頭オフセット 24368: // length バイト数 24369: public static void mmuWriteByteArrayDecrement (int address, byte[] array, int offset, int length, int supervisor) throws M68kException { 24370: if (false) { //1バイトずつmmuWriteByteDataを呼び出す 24371: for (int index = length - 1; 0 <= index; index--) { 24372: mmuWriteByteData (address + index, array[offset + index], supervisor); 24373: } 24374: } else { 24375: // 変換後アドレスは0 24376: // デバイスはnull 24377: // while 残りが1バイト以上 24378: // if ページの先頭 24379: // デバイスはnull 24380: // if アドレスが4nかつ残りが4バイト以上 24381: // FSLWはライトロング 24382: // if デバイスがnull 24383: // 変換後アドレスを求める 24384: // デバイスを求める 24385: // ライトロング 24386: // elif アドレスが2nかつ残りが2バイト以上 24387: // FSLWはライトワード 24388: // if デバイスがnull 24389: // 変換後アドレスを求める 24390: // デバイスを求める 24391: // ライトワード 24392: // else 24393: // FSLWはライトバイト 24394: // if デバイスがnull 24395: // 変換後アドレスを求める 24396: // デバイスを求める 24397: // ライトバイト 24398: // endwhile 24399: address += length; //addressはaddressの上限 24400: offset += length; //offsetはoffsetの上限 24401: length = offset - length; //lengthはoffsetの下限 24402: final int mask = Math.min (XEiJ.BUS_PAGE_SIZE, mmuPageSize) - 1; 24403: if (supervisor != 0) { //スーパーバイザモード 24404: final MemoryMappedDevice[] map = DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap; 24405: int translated = 0; //変換後アドレスは0 24406: MemoryMappedDevice device = null; //デバイスはnull 24407: while (length < offset) { //残りが1バイト以上 24408: if ((address & mask) == 0) { //ページの先頭 24409: device = null; //デバイスはnull 24410: } 24411: if ((address & 3) == 0 && length <= offset - 4) { //アドレスが4nかつ残りが4バイト以上 24412: m60FSLW = (M60_FSLW_IOMA_FIRST | 24413: M60_FSLW_RW_WRITE | 24414: M60_FSLW_SIZE_LONG | 24415: M60_FSLW_TM_SUPER_DATA); //FSLWはライトロング 24416: address -= 4; 24417: translated -= 4; 24418: offset -= 4; 24419: if (device == null) { //デバイスがnull 24420: translated = mmuTranslateWriteSuperData (address); //変換後アドレスを求める 24421: device = map[translated >>> XEiJ.BUS_PAGE_BITS]; //デバイスを求める 24422: } 24423: device.mmdWl (translated, 24424: array[offset] << 24 | 24425: (0xff & array[offset + 1]) << 16 | 24426: (0xff & array[offset + 2]) << 8 | 24427: (0xff & array[offset + 3])); //ライトロング 24428: } else if ((address & 1) == 0 && length <= offset - 2) { //アドレスが2nかつ残りが2バイト以上 24429: m60FSLW = (M60_FSLW_IOMA_FIRST | 24430: M60_FSLW_RW_WRITE | 24431: M60_FSLW_SIZE_WORD | 24432: M60_FSLW_TM_SUPER_DATA); //FSLWはライトワード 24433: address -= 2; 24434: translated -= 2; 24435: offset -= 2; 24436: if (device == null) { //デバイスがnull 24437: translated = mmuTranslateWriteSuperData (address); //変換後アドレスを求める 24438: device = map[translated >>> XEiJ.BUS_PAGE_BITS]; //デバイスを求める 24439: } 24440: device.mmdWw (translated, 24441: array[offset] << 8 | 24442: (0xff & array[offset + 1])); //ライトワード 24443: } else { 24444: m60FSLW = (M60_FSLW_IOMA_FIRST | 24445: M60_FSLW_RW_WRITE | 24446: M60_FSLW_SIZE_BYTE | 24447: M60_FSLW_TM_SUPER_DATA); //FSLWはライトバイト 24448: address--; 24449: translated--; 24450: offset--; 24451: if (device == null) { //デバイスがnull 24452: translated = mmuTranslateWriteSuperData (address); //変換後アドレスを求める 24453: device = map[translated >>> XEiJ.BUS_PAGE_BITS]; //デバイスを求める 24454: } 24455: device.mmdWb (translated, array[offset]); //ライトバイト 24456: } 24457: } //while 24458: } else { //ユーザモード 24459: final MemoryMappedDevice[] map = DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap; 24460: int translated = 0; //変換後アドレスは0 24461: MemoryMappedDevice device = null; //デバイスはnull 24462: while (length < offset) { //残りが1バイト以上 24463: if ((address & mask) == 0) { //ページの先頭 24464: device = null; //デバイスはnull 24465: } 24466: if ((address & 3) == 0 && length <= offset - 4) { //アドレスが4nかつ残りが4バイト以上 24467: m60FSLW = (M60_FSLW_IOMA_FIRST | 24468: M60_FSLW_RW_WRITE | 24469: M60_FSLW_SIZE_LONG | 24470: M60_FSLW_TM_USER_DATA); //FSLWはライトロング 24471: address -= 4; 24472: translated -= 4; 24473: offset -= 4; 24474: if (device == null) { //デバイスがnull 24475: translated = mmuTranslateWriteUserData (address); //変換後アドレスを求める 24476: device = map[translated >>> XEiJ.BUS_PAGE_BITS]; //デバイスを求める 24477: } 24478: device.mmdWl (translated, 24479: array[offset] << 24 | 24480: (0xff & array[offset + 1]) << 16 | 24481: (0xff & array[offset + 2]) << 8 | 24482: (0xff & array[offset + 3])); //ライトロング 24483: } else if ((address & 1) == 0 && length <= offset - 2) { //アドレスが2nかつ残りが2バイト以上 24484: m60FSLW = (M60_FSLW_IOMA_FIRST | 24485: M60_FSLW_RW_WRITE | 24486: M60_FSLW_SIZE_WORD | 24487: M60_FSLW_TM_USER_DATA); //FSLWはライトワード 24488: address -= 2; 24489: translated -= 2; 24490: offset -= 2; 24491: if (device == null) { //デバイスがnull 24492: translated = mmuTranslateWriteUserData (address); //変換後アドレスを求める 24493: device = map[translated >>> XEiJ.BUS_PAGE_BITS]; //デバイスを求める 24494: } 24495: device.mmdWw (translated, 24496: array[offset] << 8 | 24497: (0xff & array[offset + 1])); //ライトワード 24498: } else { 24499: m60FSLW = (M60_FSLW_IOMA_FIRST | 24500: M60_FSLW_RW_WRITE | 24501: M60_FSLW_SIZE_BYTE | 24502: M60_FSLW_TM_USER_DATA); //FSLWはライトバイト 24503: address--; 24504: translated--; 24505: offset--; 24506: if (device == null) { //デバイスがnull 24507: translated = mmuTranslateWriteUserData (address); //変換後アドレスを求める 24508: device = map[translated >>> XEiJ.BUS_PAGE_BITS]; //デバイスを求める 24509: } 24510: device.mmdWb (translated, array[offset]); //ライトバイト 24511: } 24512: } //while 24513: } 24514: } 24515: } //mmuWriteByteArrayDecrement 24516: 24517: 24518: 24519: //-------------------------------------------------------------------------------- 24520: //アドレス変換 24521: 24522: //pa = mmuLoadPhysicalAddressRead (a) 24523: // PLPAR (An) 24524: // DFCに従って論理アドレスを物理アドレスに変換する(リードアクセス) 24525: // DFC 1=ユーザデータ,2=ユーザ命令,5=スーパーバイザデータ,6=スーパーバイザ命令 24526: // pa 物理アドレス 24527: // a 論理アドレス 24528: public static int mmuLoadPhysicalAddressRead (int a) throws M68kException { 24529: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_READ | M60_FSLW_SIZE_BYTE | XEiJ.mpuDFC << 16; 24530: return ((0b10011111 << 24 << XEiJ.mpuDFC) < 0 ? 24531: (0b00101010 << 24 << XEiJ.mpuDFC) < 0 ? mmuTranslateReadSuperCode (a) : mmuTranslateReadSuperData (a) : 24532: (0b00101010 << 24 << XEiJ.mpuDFC) < 0 ? mmuTranslateReadUserCode (a) : mmuTranslateReadUserData (a)); 24533: } //mmuLoadPhysicalAddressRead(int) 24534: 24535: //pa = mmuLoadPhysicalAddressWrite (a) 24536: // PLPAW (An) 24537: // DFCに従って論理アドレスを物理アドレスに変換する(ライトアクセス) 24538: // DFC 1=ユーザデータ,2=ユーザ命令,5=スーパーバイザデータ,6=スーパーバイザ命令 24539: // pa 物理アドレス 24540: // a 論理アドレス 24541: public static int mmuLoadPhysicalAddressWrite (int a) throws M68kException { 24542: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_BYTE | XEiJ.mpuDFC << 16; 24543: return ((0b10011111 << 24 << XEiJ.mpuDFC) < 0 ? 24544: (0b00101010 << 24 << XEiJ.mpuDFC) < 0 ? mmuTranslateWriteSuperCode (a) : mmuTranslateWriteSuperData (a) : 24545: (0b00101010 << 24 << XEiJ.mpuDFC) < 0 ? mmuTranslateWriteUserCode (a) : mmuTranslateWriteUserData (a)); 24546: } //mmuLoadPhysicalAddressWrite(int) 24547: 24548: //pa = mmuTranslateReadUserData (a) 24549: // アドレス変換を行う(リードユーザデータ) 24550: // pa 物理アドレス 24551: // a 論理アドレス 24552: // m60FSLWのMA,RW,SIZE,TM,IOをセットしてから呼び出すこと 24553: public static int mmuTranslateReadUserData (int a) throws M68kException { 24554: int logicalPage = a & mmuPageAddressMask; //論理ページアドレス 24555: int head = (logicalPage * MMU_HASH_COEFF >>> -MMU_HASH_BITS) * (4 * MMU_CACHE_WAYS); //先頭のエントリ 24556: if (mmuUserDataCache[head] == logicalPage) { //リード用の論理ページアドレスと一致した 24557: return mmuUserDataCache[head + 2] | (a & mmuPageOffsetMask); //物理ページアドレスとページオフセットを連結する 24558: } 24559: if (MMU_CACHE_WAYS >= 2) { //2ways以上 24560: int tail = head + (4 * MMU_CACHE_WAYS - 4); //末尾のエントリ 24561: for (int i = head + 4; i <= tail; i += 4) { 24562: if (mmuUserDataCache[i] == logicalPage) { //リード用の論理ページアドレスと一致した 24563: //int logicalRead = mmuUserDataCache[i ]; 24564: int logicalWrite = mmuUserDataCache[i + 1]; 24565: int physicalPage = mmuUserDataCache[i + 2]; 24566: int globalFlag = mmuUserDataCache[i + 3]; 24567: for (; i > head; i -= 4) { 24568: mmuUserDataCache[i ] = mmuUserDataCache[i - 4]; 24569: mmuUserDataCache[i + 1] = mmuUserDataCache[i - 3]; 24570: mmuUserDataCache[i + 2] = mmuUserDataCache[i - 2]; 24571: mmuUserDataCache[i + 3] = mmuUserDataCache[i - 1]; 24572: } 24573: mmuUserDataCache[i ] = logicalPage; //logicalRead 24574: mmuUserDataCache[i + 1] = logicalWrite; 24575: mmuUserDataCache[i + 2] = physicalPage; 24576: mmuUserDataCache[i + 3] = globalFlag; 24577: return physicalPage | (a & mmuPageOffsetMask); //物理ページアドレスとページオフセットを連結する 24578: } 24579: } //for i 24580: } 24581: return mmuTranslateCommon (a, false, false, false); 24582: } //mmuTranslateReadUserData(int) 24583: 24584: //pa = mmuTranslateReadUserCode (a) 24585: // アドレス変換を行う(リードユーザコード) 24586: // pa 物理アドレス 24587: // a 論理アドレス 24588: // m60FSLWのMA,RW,SIZE,TM,IOをセットしてから呼び出すこと 24589: public static int mmuTranslateReadUserCode (int a) throws M68kException { 24590: int logicalPage = a & mmuPageAddressMask; //論理ページアドレス 24591: int head = (logicalPage * MMU_HASH_COEFF >>> -MMU_HASH_BITS) * (4 * MMU_CACHE_WAYS); //先頭のエントリ 24592: if (mmuUserCodeCache[head] == logicalPage) { //リード用の論理ページアドレスと一致した 24593: return mmuUserCodeCache[head + 2] | (a & mmuPageOffsetMask); //物理ページアドレスとページオフセットを連結する 24594: } 24595: if (MMU_CACHE_WAYS >= 2) { //2ways以上 24596: int tail = head + (4 * MMU_CACHE_WAYS - 4); //末尾のエントリ 24597: for (int i = head + 4; i <= tail; i += 4) { 24598: if (mmuUserCodeCache[i] == logicalPage) { //リード用の論理ページアドレスと一致した 24599: //int logicalRead = mmuUserCodeCache[i ]; 24600: int logicalWrite = mmuUserCodeCache[i + 1]; 24601: int physicalPage = mmuUserCodeCache[i + 2]; 24602: int globalFlag = mmuUserCodeCache[i + 3]; 24603: for (; i > head; i -= 4) { 24604: mmuUserCodeCache[i ] = mmuUserCodeCache[i - 4]; 24605: mmuUserCodeCache[i + 1] = mmuUserCodeCache[i - 3]; 24606: mmuUserCodeCache[i + 2] = mmuUserCodeCache[i - 2]; 24607: mmuUserCodeCache[i + 3] = mmuUserCodeCache[i - 1]; 24608: } 24609: mmuUserCodeCache[head ] = logicalPage; //logicalRead 24610: mmuUserCodeCache[head + 1] = logicalWrite; 24611: mmuUserCodeCache[head + 2] = physicalPage; 24612: mmuUserCodeCache[head + 3] = globalFlag; 24613: return physicalPage | (a & mmuPageOffsetMask); //物理ページアドレスとページオフセットを連結する 24614: } 24615: } //for i 24616: } 24617: return mmuTranslateCommon (a, false, false, true); 24618: } //mmuTranslateReadUserCode(int) 24619: 24620: //pa = mmuTranslateReadSuperData (a) 24621: // アドレス変換を行う(リードスーパーバイザデータ) 24622: // pa 物理アドレス 24623: // a 論理アドレス 24624: // m60FSLWのMA,RW,SIZE,TM,IOをセットしてから呼び出すこと 24625: public static int mmuTranslateReadSuperData (int a) throws M68kException { 24626: int logicalPage = a & mmuPageAddressMask; //論理ページアドレス 24627: int head = (logicalPage * MMU_HASH_COEFF >>> -MMU_HASH_BITS) * (4 * MMU_CACHE_WAYS); //先頭のエントリ 24628: if (mmuSuperDataCache[head] == logicalPage) { //リード用の論理ページアドレスと一致した 24629: return mmuSuperDataCache[head + 2] | (a & mmuPageOffsetMask); //物理ページアドレスとページオフセットを連結する 24630: } 24631: if (MMU_CACHE_WAYS >= 2) { //2ways以上 24632: int tail = head + (4 * MMU_CACHE_WAYS - 4); //末尾のエントリ 24633: for (int i = head + 4; i <= tail; i += 4) { 24634: if (mmuSuperDataCache[i] == logicalPage) { //リード用の論理ページアドレスと一致した 24635: //int logicalRead = mmuSuperDataCache[i ]; 24636: int logicalWrite = mmuSuperDataCache[i + 1]; 24637: int physicalPage = mmuSuperDataCache[i + 2]; 24638: int globalFlag = mmuSuperDataCache[i + 3]; 24639: for (; i > head; i -= 4) { 24640: mmuSuperDataCache[i ] = mmuSuperDataCache[i - 4]; 24641: mmuSuperDataCache[i + 1] = mmuSuperDataCache[i - 3]; 24642: mmuSuperDataCache[i + 2] = mmuSuperDataCache[i - 2]; 24643: mmuSuperDataCache[i + 3] = mmuSuperDataCache[i - 1]; 24644: } 24645: mmuSuperDataCache[i ] = logicalPage; //logicalRead 24646: mmuSuperDataCache[i + 1] = logicalWrite; 24647: mmuSuperDataCache[i + 2] = physicalPage; 24648: mmuSuperDataCache[i + 3] = globalFlag; 24649: return physicalPage | (a & mmuPageOffsetMask); //物理ページアドレスとページオフセットを連結する 24650: } 24651: } //for i 24652: } 24653: return mmuTranslateCommon (a, false, true, false); 24654: } //mmuTranslateReadSuperData(int) 24655: 24656: //pa = mmuTranslateReadSuperCode (a) 24657: // アドレス変換を行う(リードスーパーバイザコード) 24658: // pa 物理アドレス 24659: // a 論理アドレス 24660: // m60FSLWのMA,RW,SIZE,TM,IOをセットしてから呼び出すこと 24661: public static int mmuTranslateReadSuperCode (int a) throws M68kException { 24662: int logicalPage = a & mmuPageAddressMask; //論理ページアドレス 24663: int head = (logicalPage * MMU_HASH_COEFF >>> -MMU_HASH_BITS) * (4 * MMU_CACHE_WAYS); //先頭のエントリ 24664: if (mmuSuperCodeCache[head] == logicalPage) { //リード用の論理ページアドレスと一致した 24665: return mmuSuperCodeCache[head + 2] | (a & mmuPageOffsetMask); //物理ページアドレスとページオフセットを連結する 24666: } 24667: if (MMU_CACHE_WAYS >= 2) { //2ways以上 24668: int tail = head + (4 * MMU_CACHE_WAYS - 4); //末尾のエントリ 24669: for (int i = head + 4; i <= tail; i += 4) { 24670: if (mmuSuperCodeCache[i] == logicalPage) { //リード用の論理ページアドレスと一致した 24671: //int logicalRead = mmuSuperCodeCache[i ]; 24672: int logicalWrite = mmuSuperCodeCache[i + 1]; 24673: int physicalPage = mmuSuperCodeCache[i + 2]; 24674: int globalFlag = mmuSuperCodeCache[i + 3]; 24675: for (; i > head; i -= 4) { 24676: mmuSuperCodeCache[i ] = mmuSuperCodeCache[i - 4]; 24677: mmuSuperCodeCache[i + 1] = mmuSuperCodeCache[i - 3]; 24678: mmuSuperCodeCache[i + 2] = mmuSuperCodeCache[i - 2]; 24679: mmuSuperCodeCache[i + 3] = mmuSuperCodeCache[i - 1]; 24680: } 24681: mmuSuperCodeCache[head ] = logicalPage; //logicalRead 24682: mmuSuperCodeCache[head + 1] = logicalWrite; 24683: mmuSuperCodeCache[head + 2] = physicalPage; 24684: mmuSuperCodeCache[head + 3] = globalFlag; 24685: return physicalPage | (a & mmuPageOffsetMask); //物理ページアドレスとページオフセットを連結する 24686: } 24687: } //for i 24688: } 24689: return mmuTranslateCommon (a, false, true, true); 24690: } //mmuTranslateReadSuperCode(int) 24691: 24692: //pa = mmuTranslateWriteUserData (a) 24693: // アドレス変換を行う(ライトユーザデータ) 24694: // pa 物理アドレス 24695: // a 論理アドレス 24696: // m60FSLWのMA,RW,SIZE,TM,IOをセットしてから呼び出すこと 24697: public static int mmuTranslateWriteUserData (int a) throws M68kException { 24698: int logicalPage = a & mmuPageAddressMask; //論理ページアドレス 24699: int head = (logicalPage * MMU_HASH_COEFF >>> -MMU_HASH_BITS) * (4 * MMU_CACHE_WAYS); //先頭のエントリ 24700: if (mmuUserDataCache[head + 1] == logicalPage) { //ライト用の論理ページアドレスと一致した 24701: return mmuUserDataCache[head + 2] | (a & mmuPageOffsetMask); //物理ページアドレスとページオフセットを連結する 24702: } 24703: if (MMU_CACHE_WAYS >= 2) { //2ways以上 24704: int tail = head + (4 * MMU_CACHE_WAYS - 4); //末尾のエントリ 24705: for (int i = head + 4; i <= tail; i += 4) { 24706: if (mmuUserDataCache[i + 1] == logicalPage) { //ライト用の論理ページアドレスと一致した 24707: int logicalRead = mmuUserDataCache[i ]; 24708: //int logicalWrite = mmuUserDataCache[i + 1]; 24709: int physicalPage = mmuUserDataCache[i + 2]; 24710: int globalFlag = mmuUserDataCache[i + 3]; 24711: for (; i > head; i -= 4) { 24712: mmuUserDataCache[i ] = mmuUserDataCache[i - 4]; 24713: mmuUserDataCache[i + 1] = mmuUserDataCache[i - 3]; 24714: mmuUserDataCache[i + 2] = mmuUserDataCache[i - 2]; 24715: mmuUserDataCache[i + 3] = mmuUserDataCache[i - 1]; 24716: } 24717: mmuUserDataCache[i ] = logicalRead; 24718: mmuUserDataCache[i + 1] = logicalPage; //logicalWrite 24719: mmuUserDataCache[i + 2] = physicalPage; 24720: mmuUserDataCache[i + 3] = globalFlag; 24721: return physicalPage | (a & mmuPageOffsetMask); //物理ページアドレスとページオフセットを連結する 24722: } 24723: } //for i 24724: } 24725: return mmuTranslateCommon (a, true, false, false); 24726: } //mmuTranslateWriteUserData(int) 24727: 24728: //pa = mmuTranslateWriteUserCode (a) 24729: // アドレス変換を行う(ライトユーザコード) 24730: // pa 物理アドレス 24731: // a 論理アドレス 24732: // m60FSLWのMA,RW,SIZE,TM,IOをセットしてから呼び出すこと 24733: public static int mmuTranslateWriteUserCode (int a) throws M68kException { 24734: int logicalPage = a & mmuPageAddressMask; //論理ページアドレス 24735: int head = (logicalPage * MMU_HASH_COEFF >>> -MMU_HASH_BITS) * (4 * MMU_CACHE_WAYS); //先頭のエントリ 24736: if (mmuUserCodeCache[head + 1] == logicalPage) { //ライト用の論理ページアドレスと一致した 24737: return mmuUserCodeCache[head + 2] | (a & mmuPageOffsetMask); //物理ページアドレスとページオフセットを連結する 24738: } 24739: if (MMU_CACHE_WAYS >= 2) { //2ways以上 24740: int tail = head + (4 * MMU_CACHE_WAYS - 4); //末尾のエントリ 24741: for (int i = head + 4; i <= tail; i += 4) { 24742: if (mmuUserCodeCache[i + 1] == logicalPage) { //ライト用の論理ページアドレスと一致した 24743: int logicalRead = mmuUserCodeCache[i ]; 24744: //int logicalWrite = mmuUserCodeCache[i + 1]; 24745: int physicalPage = mmuUserCodeCache[i + 2]; 24746: int globalFlag = mmuUserCodeCache[i + 3]; 24747: for (; i > head; i -= 4) { 24748: mmuUserCodeCache[i ] = mmuUserCodeCache[i - 4]; 24749: mmuUserCodeCache[i + 1] = mmuUserCodeCache[i - 3]; 24750: mmuUserCodeCache[i + 2] = mmuUserCodeCache[i - 2]; 24751: mmuUserCodeCache[i + 3] = mmuUserCodeCache[i - 1]; 24752: } 24753: mmuUserCodeCache[head ] = logicalRead; 24754: mmuUserCodeCache[head + 1] = logicalPage; //logicalWrite 24755: mmuUserCodeCache[head + 2] = physicalPage; 24756: mmuUserCodeCache[head + 3] = globalFlag; 24757: return physicalPage | (a & mmuPageOffsetMask); //物理ページアドレスとページオフセットを連結する 24758: } 24759: } //for i 24760: } 24761: return mmuTranslateCommon (a, true, false, true); 24762: } //mmuTranslateWriteUserCode(int) 24763: 24764: //pa = mmuTranslateWriteSuperData (a) 24765: // アドレス変換を行う(ライトスーパーバイザデータ) 24766: // pa 物理アドレス 24767: // a 論理アドレス 24768: // m60FSLWのMA,RW,SIZE,TM,IOをセットしてから呼び出すこと 24769: public static int mmuTranslateWriteSuperData (int a) throws M68kException { 24770: int logicalPage = a & mmuPageAddressMask; //論理ページアドレス 24771: int head = (logicalPage * MMU_HASH_COEFF >>> -MMU_HASH_BITS) * (4 * MMU_CACHE_WAYS); //先頭のエントリ 24772: if (mmuSuperDataCache[head + 1] == logicalPage) { //ライト用の論理ページアドレスと一致した 24773: return mmuSuperDataCache[head + 2] | (a & mmuPageOffsetMask); //物理ページアドレスとページオフセットを連結する 24774: } 24775: if (MMU_CACHE_WAYS >= 2) { //2ways以上 24776: int tail = head + (4 * MMU_CACHE_WAYS - 4); //末尾のエントリ 24777: for (int i = head + 4; i <= tail; i += 4) { 24778: if (mmuSuperDataCache[i + 1] == logicalPage) { //ライト用の論理ページアドレスと一致した 24779: int logicalRead = mmuSuperDataCache[i ]; 24780: //int logicalWrite = mmuSuperDataCache[i + 1]; 24781: int physicalPage = mmuSuperDataCache[i + 2]; 24782: int globalFlag = mmuSuperDataCache[i + 3]; 24783: for (; i > head; i -= 4) { 24784: mmuSuperDataCache[i ] = mmuSuperDataCache[i - 4]; 24785: mmuSuperDataCache[i + 1] = mmuSuperDataCache[i - 3]; 24786: mmuSuperDataCache[i + 2] = mmuSuperDataCache[i - 2]; 24787: mmuSuperDataCache[i + 3] = mmuSuperDataCache[i - 1]; 24788: } 24789: mmuSuperDataCache[i ] = logicalRead; 24790: mmuSuperDataCache[i + 1] = logicalPage; //logicalWrite 24791: mmuSuperDataCache[i + 2] = physicalPage; 24792: mmuSuperDataCache[i + 3] = globalFlag; 24793: return physicalPage | (a & mmuPageOffsetMask); //物理ページアドレスとページオフセットを連結する 24794: } 24795: } //for i 24796: } 24797: return mmuTranslateCommon (a, true, true, false); 24798: } //mmuTranslateWriteSuperData(int) 24799: 24800: //pa = mmuTranslateWriteSuperCode (a) 24801: // アドレス変換を行う(ライトスーパーバイザコード) 24802: // pa 物理アドレス 24803: // a 論理アドレス 24804: // m60FSLWのMA,RW,SIZE,TM,IOをセットしてから呼び出すこと 24805: public static int mmuTranslateWriteSuperCode (int a) throws M68kException { 24806: int logicalPage = a & mmuPageAddressMask; //論理ページアドレス 24807: int head = (logicalPage * MMU_HASH_COEFF >>> -MMU_HASH_BITS) * (4 * MMU_CACHE_WAYS); //先頭のエントリ 24808: if (mmuSuperCodeCache[head + 1] == logicalPage) { //ライト用の論理ページアドレスと一致した 24809: return mmuSuperCodeCache[head + 2] | (a & mmuPageOffsetMask); //物理ページアドレスとページオフセットを連結する 24810: } 24811: if (MMU_CACHE_WAYS >= 2) { //2ways以上 24812: int tail = head + (4 * MMU_CACHE_WAYS - 4); //末尾のエントリ 24813: for (int i = head + 4; i <= tail; i += 4) { 24814: if (mmuSuperCodeCache[i + 1] == logicalPage) { //ライト用の論理ページアドレスと一致した 24815: int logicalRead = mmuSuperCodeCache[i ]; 24816: //int logicalWrite = mmuSuperCodeCache[i + 1]; 24817: int physicalPage = mmuSuperCodeCache[i + 2]; 24818: int globalFlag = mmuSuperCodeCache[i + 3]; 24819: for (; i > head; i -= 4) { 24820: mmuSuperCodeCache[i ] = mmuSuperCodeCache[i - 4]; 24821: mmuSuperCodeCache[i + 1] = mmuSuperCodeCache[i - 3]; 24822: mmuSuperCodeCache[i + 2] = mmuSuperCodeCache[i - 2]; 24823: mmuSuperCodeCache[i + 3] = mmuSuperCodeCache[i - 1]; 24824: } 24825: mmuSuperCodeCache[head ] = logicalRead; 24826: mmuSuperCodeCache[head + 1] = logicalPage; //logicalWrite 24827: mmuSuperCodeCache[head + 2] = physicalPage; 24828: mmuSuperCodeCache[head + 3] = globalFlag; 24829: return physicalPage | (a & mmuPageOffsetMask); //物理ページアドレスとページオフセットを連結する 24830: } 24831: } //for i 24832: } 24833: return mmuTranslateCommon (a, true, true, true); 24834: } //mmuTranslateWriteSuperCode(int) 24835: 24836: //pa = mmuTranslateCommon (a, write, supervisor, instruction) 24837: // 透過変換とテーブルサーチを行い、アドレス変換キャッシュ更新する 24838: // アドレス変換キャッシュがミスしたときに呼び出す 24839: // pa 物理アドレス 24840: // a 論理アドレス 24841: // write true=ライト,false=リード 24842: // supervisor true=スーパーバイザ,false=ユーザ。通常はXEiJ.regSRS!=0、PLPAR/PLPAWでは(XEiJ.mpuDFC&4)!=0 24843: // instruction true=命令,false=データ。通常は命令フェッチまたは拡張ワードのときtrue、PLPAR/PLPAWでは(XEiJ.mpuDFC&2)!=0 24844: // m60FSLWのMA,RW,SIZE,TM,IOをセットしてから呼び出すこと 24845: public static int mmuTranslateCommon (int a, boolean write, boolean supervisor, boolean instruction) throws M68kException { 24846: if (MMU_DEBUG_TRANSLATION) { 24847: System.out.printf ("%08x mmuTranslateCommon(0x%08x,%b,%b,%b)", XEiJ.regPC0, a, write, supervisor, instruction); 24848: } 24849: int logicalPage = a & mmuPageAddressMask; //リード用の論理ページアドレス 24850: int logicalWrite; //ライト用の論理ページアドレス 24851: int physicalPage; //物理ページアドレス 24852: int globalFlag; //グローバルフラグ。-1=Global,0=NonGlobal 24853: int pa; //物理アドレス 24854: //透過変換 24855: // 透過変換はスーパーバイザモードかどうかを条件にすることができる(しないこともできる) 24856: // 条件が合わなければヒットしないだけで、スーパーバイザプロテクトのアクセスフォルトになならない 24857: // 透過変換をアドレス変換キャッシュに乗せる場合 24858: // アドレス変換キャッシュがヒットしてバスエラーが発生したとき 24859: // 透過変換かどうかを再確認してFSLWのTTRをセットしなければならない 24860: // 透過変換レジスタが操作されたとき 24861: // OFF→ONの領域だけでなくON→OFFの領域もフラッシュしなければならない 24862: // 透過変換レジスタを頻繁に操作されると重くなるかも知れない 24863: int tt = (supervisor ? 24864: instruction ? mmuSuperCodeTransparent : mmuSuperDataTransparent : 24865: instruction ? mmuUserCodeTransparent : mmuUserDataTransparent)[a >>> 24]; 24866: if (tt != 0) { //透過変換あり 24867: m60FSLW |= M60_FSLW_TRANSPARENT; 24868: if (write && //ライトで 24869: tt < 0) { //透過変換によるライトプロテクト 24870: if (MMU_DEBUG_TRANSLATION) { 24871: System.out.printf (" write protected by transparent translation\n", a); 24872: } 24873: m60FSLW |= M60_FSLW_WRITE_PROTECT; 24874: M68kException.m6eNumber = M68kException.M6E_ACCESS_FAULT; 24875: //m60Address = a; 24876: throw M68kException.m6eSignal; 24877: } 24878: logicalWrite = logicalPage; //ライト用の論理ページアドレス 24879: physicalPage = logicalPage; //物理ページアドレス 24880: globalFlag = -1; //グローバルフラグ。-1=Global,0=NonGlobal 24881: pa = a; 24882: if (MMU_DEBUG_TRANSLATION) { 24883: System.out.printf ("=0x%08x (transparent translation)\n", pa); 24884: } 24885: } else if (mmuEnabled) { //透過変換なし、アドレス変換あり 24886: //テーブルサーチ 24887: // スーパーバイザプロテクトまたはライトプロテクトで停止したときデスクリプタの使用済みフラグはセットされない 24888: // リードモディファイライトはライトでアロケートするのでリードする前にライトプロテクトに引っかかる 24889: // 例えばROMの内容をインクリメントしようとしたときライトだけでなくリードも行われない 24890: m60FSLW |= M60_FSLW_TABLE_SEARCH; 24891: //ルートテーブル 24892: int rootDescriptorAddress = (supervisor ? mmuSRP : mmuURP) + ((a & MMU_ROOT_INDEX_MASK) >>> MMU_ROOT_INDEX_BIT0 - 2); //ルートテーブルデスクリプタのアドレス 24893: MemoryMappedDevice rootDescriptorDevice = (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[rootDescriptorAddress >>> XEiJ.BUS_PAGE_BITS]; 24894: int rootDescriptor = rootDescriptorDevice.mmdRls (rootDescriptorAddress); //ルートテーブルデスクリプタ 24895: if ((rootDescriptor & MMU_DESCRIPTOR_UDT) == MMU_DESCRIPTOR_TYPE_INVALID) { //デスクリプタが無効のとき 24896: if (MMU_DEBUG_TRANSLATION) { 24897: System.out.printf (" invalid root descriptor 0x%08x at 0x%08x\n", rootDescriptor, rootDescriptorAddress); 24898: } 24899: m60FSLW ^= M60_FSLW_TABLE_SEARCH ^ M60_FSLW_ROOT_DESCRIPTOR; 24900: M68kException.m6eNumber = M68kException.M6E_ACCESS_FAULT; 24901: //m60Address = a; 24902: throw M68kException.m6eSignal; 24903: } 24904: if (write && //ライトで 24905: (rootDescriptor & MMU_DESCRIPTOR_WRITE_PROTECTED) != 0) { //ライトプロテクトされているとき 24906: if (MMU_DEBUG_TRANSLATION) { 24907: System.out.printf (" write protected by root descriptor 0x%08x at 0x%08x\n", rootDescriptor, rootDescriptorAddress); 24908: } 24909: m60FSLW ^= M60_FSLW_TABLE_SEARCH ^ M60_FSLW_WRITE_PROTECT; 24910: M68kException.m6eNumber = M68kException.M6E_ACCESS_FAULT; 24911: //m60Address = a; 24912: throw M68kException.m6eSignal; 24913: } 24914: if ((rootDescriptor & MMU_DESCRIPTOR_USED) == 0) { //デスクリプタが未使用のとき 24915: rootDescriptor |= MMU_DESCRIPTOR_USED; //使用済み 24916: rootDescriptorDevice.mmdWl (rootDescriptorAddress, rootDescriptor); 24917: } 24918: //ポインタテーブル 24919: int pointerDescriptorAddress = (rootDescriptor & MMU_DESCRIPTOR_POINTER_TABLE_ADDRESS) + ((a & MMU_POINTER_INDEX_MASK) >>> MMU_POINTER_INDEX_BIT0 - 2); //ポインタテーブルデスクリプタのアドレス 24920: MemoryMappedDevice pointerDescriptorDevice = (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[pointerDescriptorAddress >>> XEiJ.BUS_PAGE_BITS]; 24921: int pointerDescriptor = pointerDescriptorDevice.mmdRls (pointerDescriptorAddress); //ポインタテーブルデスクリプタ 24922: if ((pointerDescriptor & MMU_DESCRIPTOR_UDT) == MMU_DESCRIPTOR_TYPE_INVALID) { //デスクリプタが無効のとき 24923: if (MMU_DEBUG_TRANSLATION) { 24924: System.out.printf (" invalid pointer descriptor 0x%08x at 0x%08x\n", pointerDescriptor, pointerDescriptorAddress); 24925: } 24926: m60FSLW ^= M60_FSLW_TABLE_SEARCH ^ M60_FSLW_POINTER_DESCRIPTOR; 24927: M68kException.m6eNumber = M68kException.M6E_ACCESS_FAULT; 24928: //m60Address = a; 24929: throw M68kException.m6eSignal; 24930: } 24931: if (write && //ライトで 24932: (pointerDescriptor & MMU_DESCRIPTOR_WRITE_PROTECTED) != 0) { //ライトプロテクトされているとき 24933: if (MMU_DEBUG_TRANSLATION) { 24934: System.out.printf (" write protected by pointer descriptor 0x%08x at 0x%08x\n", pointerDescriptor, pointerDescriptorAddress); 24935: } 24936: m60FSLW ^= M60_FSLW_TABLE_SEARCH ^ M60_FSLW_WRITE_PROTECT; 24937: M68kException.m6eNumber = M68kException.M6E_ACCESS_FAULT; 24938: //m60Address = a; 24939: throw M68kException.m6eSignal; 24940: } 24941: if ((pointerDescriptor & MMU_DESCRIPTOR_USED) == 0) { //デスクリプタが未使用のとき 24942: pointerDescriptor |= MMU_DESCRIPTOR_USED; //使用済み 24943: pointerDescriptorDevice.mmdWl (pointerDescriptorAddress, pointerDescriptor); 24944: } 24945: //ページテーブル 24946: int pageDescriptorAddress = (pointerDescriptor & mmuPageTableMask) + ((a & mmuPageIndexMask) >>> mmuPageIndexBit2); //ページテーブルデスクリプタのアドレス 24947: MemoryMappedDevice pageDescriptorDevice = (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[pageDescriptorAddress >>> XEiJ.BUS_PAGE_BITS]; 24948: int pageDescriptor = pageDescriptorDevice.mmdRls (pageDescriptorAddress); //ページテーブルデスクリプタ 24949: if ((pageDescriptor & MMU_DESCRIPTOR_PDT) == MMU_DESCRIPTOR_TYPE_INVALID) { //デスクリプタが無効のとき 24950: if (MMU_DEBUG_TRANSLATION) { 24951: System.out.printf (" invalid page descriptor 0x%08x at 0x%08x\n", pageDescriptor, pageDescriptorAddress); 24952: } 24953: m60FSLW ^= M60_FSLW_TABLE_SEARCH ^ M60_FSLW_PAGE_FAULT; 24954: M68kException.m6eNumber = M68kException.M6E_ACCESS_FAULT; 24955: //m60Address = a; 24956: throw M68kException.m6eSignal; 24957: } 24958: if ((pageDescriptor & MMU_DESCRIPTOR_PDT) == MMU_DESCRIPTOR_TYPE_INDIRECT) { //デスクリプタが間接のとき 24959: pageDescriptorAddress = pageDescriptor & MMU_DESCRIPTOR_INDIRECT_ADDRESS; //ページテーブルデスクリプタのアドレス 24960: pageDescriptorDevice = (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[pageDescriptorAddress >>> XEiJ.BUS_PAGE_BITS]; 24961: pageDescriptor = pageDescriptorDevice.mmdRls (pageDescriptorAddress); //ページテーブルデスクリプタ 24962: if ((pageDescriptor & MMU_DESCRIPTOR_PDT) == MMU_DESCRIPTOR_TYPE_INVALID) { //デスクリプタが無効のとき 24963: if (MMU_DEBUG_TRANSLATION) { 24964: System.out.printf (" invalid page descriptor 0x%08x at 0x%08x\n", pageDescriptor, pageDescriptorAddress); 24965: } 24966: m60FSLW ^= M60_FSLW_TABLE_SEARCH ^ M60_FSLW_PAGE_FAULT; 24967: M68kException.m6eNumber = M68kException.M6E_ACCESS_FAULT; 24968: //m60Address = a; 24969: throw M68kException.m6eSignal; 24970: } 24971: if ((pageDescriptor & MMU_DESCRIPTOR_PDT) == MMU_DESCRIPTOR_TYPE_INDIRECT) { //デスクリプタが二重間接のとき 24972: if (MMU_DEBUG_TRANSLATION) { 24973: System.out.printf (" indirect page descriptor 0x%08x at 0x%08x\n", pageDescriptor, pageDescriptorAddress); 24974: } 24975: m60FSLW ^= M60_FSLW_TABLE_SEARCH ^ M60_FSLW_INDIRECT_LEVEL; 24976: M68kException.m6eNumber = M68kException.M6E_ACCESS_FAULT; 24977: //m60Address = a; 24978: throw M68kException.m6eSignal; 24979: } 24980: } 24981: if (!supervisor && //ユーザモードで 24982: (pageDescriptor & MMU_DESCRIPTOR_SUPERVISOR_PROTECTED) != 0) { //スーパーバイザプロテクトされているとき 24983: if (MMU_DEBUG_TRANSLATION) { 24984: System.out.printf (" supervisor protected by page descriptor 0x%08x at 0x%08x\n", pageDescriptor, pageDescriptorAddress); 24985: } 24986: m60FSLW ^= M60_FSLW_TABLE_SEARCH ^ M60_FSLW_SUPERVISOR_PROTECT; 24987: M68kException.m6eNumber = M68kException.M6E_ACCESS_FAULT; 24988: //m60Address = a; 24989: throw M68kException.m6eSignal; 24990: } 24991: if (write && //ライトで 24992: (pageDescriptor & MMU_DESCRIPTOR_WRITE_PROTECTED) != 0) { //ライトプロテクトされているとき 24993: if (MMU_DEBUG_TRANSLATION) { 24994: System.out.printf (" write protected by page descriptor 0x%08x at 0x%08x\n", pageDescriptor, pageDescriptorAddress); 24995: } 24996: m60FSLW ^= M60_FSLW_TABLE_SEARCH ^ M60_FSLW_WRITE_PROTECT; 24997: M68kException.m6eNumber = M68kException.M6E_ACCESS_FAULT; 24998: //m60Address = a; 24999: throw M68kException.m6eSignal; 25000: } 25001: if ((pageDescriptor & MMU_DESCRIPTOR_USED) == 0) { //デスクリプタが未使用のとき 25002: pageDescriptor |= MMU_DESCRIPTOR_USED; //使用済みにする 25003: pageDescriptorDevice.mmdWl (pageDescriptorAddress, pageDescriptor); 25004: } 25005: if (write && //ライトで 25006: (pageDescriptor & MMU_DESCRIPTOR_MODIFIED) == 0) { //修正済みでないとき 25007: pageDescriptor |= MMU_DESCRIPTOR_MODIFIED; //修正済みにする 25008: pageDescriptorDevice.mmdWl (pageDescriptorAddress, pageDescriptor); 25009: } 25010: //テーブルサーチ終了 25011: m60FSLW &= ~M60_FSLW_TABLE_SEARCH; 25012: //logicalWrite = (pageDescriptor & (MMU_DESCRIPTOR_MODIFIED | MMU_DESCRIPTOR_WRITE_PROTECTED)) == MMU_DESCRIPTOR_MODIFIED ? logicalPage : 1; //ライト用の論理ページアドレス。修正済みかつライトプロテクトされていないときだけ有効 25013: logicalWrite = (pageDescriptor & MMU_DESCRIPTOR_WRITE_PROTECTED) == 0 ? logicalPage : 1; //ライト用の論理ページアドレス。ライトプロテクトされていないときだけ有効 25014: physicalPage = pageDescriptor & mmuPageAddressMask; //物理ページアドレス 25015: globalFlag = (pageDescriptor & MMU_DESCRIPTOR_GLOBAL) != 0 ? -1 : 0; //グローバルフラグ。-1=Global,0=NonGlobal 25016: pa = physicalPage | a & mmuPageOffsetMask; //物理ページアドレスとページオフセットを連結する 25017: if (MMU_DEBUG_TRANSLATION) { 25018: System.out.printf ("=0x%08x (table search)\n", pa); 25019: System.out.printf (" rootTable=0x%08x\n", supervisor ? mmuSRP : mmuURP); 25020: System.out.printf (" rootIndex=0x%08x\n", (a & MMU_ROOT_INDEX_MASK) >>> MMU_ROOT_INDEX_BIT0); 25021: System.out.printf (" rootDescriptorAddress=0x%08x\n", rootDescriptorAddress); 25022: System.out.printf (" rootDescriptor=0x%08x\n", rootDescriptor); 25023: System.out.printf (" pointerTable=0x%08x\n", rootDescriptor & MMU_DESCRIPTOR_POINTER_TABLE_ADDRESS); 25024: System.out.printf (" pointerIndex=0x%08x\n", (a & MMU_POINTER_INDEX_MASK) >>> MMU_POINTER_INDEX_BIT0); 25025: System.out.printf (" pointerDescriptorAddress=0x%08x\n", pointerDescriptorAddress); 25026: System.out.printf (" pointerDescriptor=0x%08x\n", pointerDescriptor); 25027: System.out.printf (" pageTable=0x%08x\n", pointerDescriptor & mmuPageTableMask); 25028: System.out.printf (" pageIndex=0x%08x\n", (a & mmuPageIndexMask) >>> mmuPageIndexBit2 + 2); 25029: System.out.printf (" pageDescriptorAddress=0x%08x\n", pageDescriptorAddress); 25030: System.out.printf (" pageDescriptor=0x%08x\n", pageDescriptor); 25031: } 25032: } else { //透過変換なし、アドレス変換なし 25033: logicalWrite = logicalPage; //ライト用の論理ページアドレス 25034: physicalPage = logicalPage; //物理ページアドレス 25035: globalFlag = -1; //グローバルフラグ。-1=Global,0=NonGlobal 25036: pa = a; 25037: if (MMU_DEBUG_TRANSLATION) { 25038: System.out.printf ("=0x%08x (no translation)\n", pa); 25039: } 25040: } 25041: if (!(MMU_NOT_ALLOCATE_CACHE || 25042: (instruction ? mmuNotAllocateCode : mmuNotAllocateData))) { 25043: //アドレス変換キャッシュを更新する 25044: // 同じ論理ページアドレスのエントリが存在する場合 25045: // (リードでアロケートしたとき修正済みでなかったためライトでアロケートしなかった場合) 25046: // 同じ論理ページアドレスのエントリよりも前にあるエントリを後ろにずらす 25047: // 空いた先頭のエントリに上書きする 25048: // 同じ論理ページアドレスのエントリが存在しない場合 25049: // 末尾以外のエントリを後ろにずらす 25050: // 空いた先頭のエントリに上書きする 25051: int[] cache = (supervisor ? 25052: instruction ? mmuSuperCodeCache : mmuSuperDataCache : 25053: instruction ? mmuUserCodeCache : mmuUserDataCache); 25054: int head = (logicalPage * MMU_HASH_COEFF >>> -MMU_HASH_BITS) * (4 * MMU_CACHE_WAYS); //先頭のエントリ 25055: if (MMU_CACHE_WAYS >= 2) { //2ways以上のとき 25056: int tail = head + (4 * MMU_CACHE_WAYS - 4); //末尾のエントリ→捨てるエントリ 25057: if (write) { //ライトのとき 25058: for (int i = head; i < tail; i += 4) { 25059: if (cache[i] == logicalPage) { //リードでアロケートされていた 25060: tail = i; 25061: break; 25062: } 25063: } 25064: } 25065: // 捨てるエントリよりも前にあるエントリを後ろにずらす 25066: for (; tail > head; tail -= 4) { 25067: cache[tail ] = cache[tail - 4]; 25068: cache[tail + 1] = cache[tail - 3]; 25069: cache[tail + 2] = cache[tail - 2]; 25070: cache[tail + 3] = cache[tail - 1]; 25071: } 25072: } 25073: // 先頭のエントリに上書きする 25074: cache[head ] = logicalPage; //リード用の論理ページアドレス 25075: cache[head + 1] = logicalWrite; //ライト用の論理ページアドレス 25076: cache[head + 2] = physicalPage; //物理ページアドレス 25077: cache[head + 3] = globalFlag; //グローバルフラグ 25078: if (MMU_DEBUG_TRANSLATION) { 25079: System.out.printf (" ATC[%d]={0x%08x,0x%08x,0x%08x,%d}\n", 25080: head / (4 * MMU_CACHE_WAYS), logicalPage, logicalWrite, physicalPage, globalFlag); 25081: } 25082: } 25083: return pa; 25084: } //mmuTranslateCommon(int,boolean,boolean,boolean) 25085: 25086: public static int mmuPeekFlags; 25087: 25088: //pa = mmuTranslatePeek (a, supervisor, instruction) { 25089: // アドレス変換を行う(デバッガ用、例外なし、テーブル更新なし) 25090: // pa 物理アドレス。a^1=エラー 25091: // a 論理アドレス 25092: // supervisor 0=ユーザ,0以外=スーパーバイザ。通常はXEiJ.regSRS、PLPAR/PLPAWではXEiJ.mpuDFC&4 25093: // instruction 0=データ,0以外=命令。通常は命令フェッチまたは拡張ワードのとき1、PLPAR/PLPAWではXEiJ.mpuDFC&2 25094: public static int mmuTranslatePeek (int a, int supervisor, int instruction) { 25095: //透過変換の確認 25096: // 透過変換はスーパーバイザモードかどうかを条件にすることができる(しないこともできる) 25097: // 透過変換にスーパーバイザプロテクトの機能はない 25098: { 25099: int[] tta = new int[2]; 25100: if (instruction != 0) { 25101: tta[0] = mmuITT0; 25102: tta[1] = mmuITT1; 25103: } else { 25104: tta[0] = mmuDTT0; 25105: tta[1] = mmuDTT1; 25106: } 25107: for (int i = 0; i < 2; i++) { 25108: int ttr = tta[i]; 25109: if ((ttr & 0x8000) != 0 && //Enable 25110: ((ttr & 0x4000) != 0 || ((ttr & 0x2000) != 0) == (supervisor != 0)) && 25111: ((a ^ ttr) & ~ttr << 8) >>> 24 == 0) { 25112: mmuPeekFlags = ttr & MMU_TTR_WRITE_PROTECT; 25113: return a; 25114: } 25115: } 25116: } 25117: //透過変換なし 25118: if (!mmuEnabled) { //アドレス変換なし 25119: mmuPeekFlags = 0; 25120: return a; 25121: } 25122: //アドレス変換あり 25123: int logicalPage = a & mmuPageAddressMask; //論理ページアドレス 25124: //テーブルサーチ開始 25125: // スーパーバイザプロテクトまたはライトプロテクトで停止したときデスクリプタの使用済みフラグはセットされない 25126: // リードモディファイライトはライトでアロケートするのでリードする前にライトプロテクトに引っかかる 25127: // 例えばROMの内容をインクリメントしようとしたときライトだけでなくリードも行われない 25128: //ルートテーブル 25129: int rootDescriptorAddress = (supervisor != 0 ? mmuSRP : mmuURP) + ((a & MMU_ROOT_INDEX_MASK) >>> MMU_ROOT_INDEX_BIT0 - 2); //ルートテーブルデスクリプタのアドレス 25130: int rootDescriptor = XEiJ.busPlsf (rootDescriptorAddress); //ルートテーブルデスクリプタ 25131: if ((rootDescriptor & MMU_DESCRIPTOR_UDT) == MMU_DESCRIPTOR_TYPE_INVALID) { //デスクリプタが無効のとき 25132: return a ^ 1; 25133: } 25134: //ポインタテーブル 25135: int pointerDescriptorAddress = (rootDescriptor & MMU_DESCRIPTOR_POINTER_TABLE_ADDRESS) + ((a & MMU_POINTER_INDEX_MASK) >>> MMU_POINTER_INDEX_BIT0 - 2); //ポインタテーブルデスクリプタのアドレス 25136: int pointerDescriptor = XEiJ.busPlsf (pointerDescriptorAddress); //ポインタテーブルデスクリプタ 25137: if ((pointerDescriptor & MMU_DESCRIPTOR_UDT) == MMU_DESCRIPTOR_TYPE_INVALID) { //デスクリプタが無効のとき 25138: return a ^ 1; 25139: } 25140: //ページテーブル 25141: int pageDescriptorAddress = (pointerDescriptor & mmuPageTableMask) + ((a & mmuPageIndexMask) >>> mmuPageIndexBit2); //ページテーブルデスクリプタのアドレス 25142: int pageDescriptor = XEiJ.busPlsf (pageDescriptorAddress); //ページテーブルデスクリプタ 25143: if ((pageDescriptor & MMU_DESCRIPTOR_PDT) == MMU_DESCRIPTOR_TYPE_INVALID) { //デスクリプタが無効のとき 25144: return a ^ 1; 25145: } 25146: if ((pageDescriptor & MMU_DESCRIPTOR_PDT) == MMU_DESCRIPTOR_TYPE_INDIRECT) { //デスクリプタが間接のとき 25147: pageDescriptorAddress = pageDescriptor & MMU_DESCRIPTOR_INDIRECT_ADDRESS; //ページテーブルデスクリプタのアドレス 25148: pageDescriptor = XEiJ.busPlsf (pageDescriptorAddress); //ページテーブルデスクリプタ 25149: if ((pageDescriptor & MMU_DESCRIPTOR_PDT) == MMU_DESCRIPTOR_TYPE_INVALID) { //デスクリプタが無効のとき 25150: return a ^ 1; 25151: } 25152: if ((pageDescriptor & MMU_DESCRIPTOR_PDT) == MMU_DESCRIPTOR_TYPE_INDIRECT) { //デスクリプタが二重間接のとき 25153: return a ^ 1; 25154: } 25155: } 25156: if (supervisor == 0 && //ユーザモードで 25157: (pageDescriptor & MMU_DESCRIPTOR_SUPERVISOR_PROTECTED) != 0) { //スーパーバイザプロテクトされているとき 25158: return a ^ 1; 25159: } 25160: int physicalPage = pageDescriptor & mmuPageAddressMask; //物理ページアドレス 25161: //テーブルサーチ終了 25162: mmuPeekFlags = pageDescriptor & (MMU_DESCRIPTOR_SUPERVISOR_PROTECTED | 25163: MMU_DESCRIPTOR_MODIFIED | 25164: MMU_DESCRIPTOR_USED | 25165: MMU_DESCRIPTOR_WRITE_PROTECTED); 25166: return physicalPage | a & mmuPageOffsetMask; //物理ページアドレスとページオフセットを連結する 25167: } //mmuTranslatePeek(int,int,int) 25168: 25169: 25170: 25171: //実効アドレス 25172: // FIRSTのアドレス 25173: // SECONDでアクセスフォルトが発生した場合でも、FORMAT $4の例外スタックフレームにはFIRSTのアドレスが書き込まれる 25174: // M68kException.m6eAddressは実際にバスエラーが発生したアドレスを示しており、これはSECONDの場合がある 25175: private static int m60Address; 25176: 25177: // MC68060のページフォルトに関する考察 25178: // ページフォルトが発生すると、プレデクリメントとポストインクリメントによるアドレスレジスタの変化がすべてキャンセルされる 25179: // MOVE.B (A0)+,(A0)+またはMOVE.B -(A0),-(A0)でソースまたはデスティネーションでページフォルトが発生したとき、 25180: // どの組み合わせでもA0は命令開始時の値のままアクセスフォルトハンドラに移行する 25181: // RTEでページフォルトを発生させた命令に復帰すると、ソースをリードするところからやり直す 25182: // MOVE.B <mem>,<mem>のデスティネーションのライトでページフォルトが発生したとき、ソースのリードが2回行われる 25183: // これはMC68060ユーザーズマニュアルの7.10 BUS SYNCHRONIZATIONに書かれており、 25184: // 060turboでも、ページフォルトのハンドラでソースを書き換えると結果に反映されることから、リードが再実行されていることを確認できる 25185: // リードすると値が変化する可能性のあるデバイスから非常駐の可能性のあるページに転送するとき、MOVE.B <mem>,<mem>を使ってはいけない 25186: 25187: //アドレスレジスタの増分 25188: // 実効アドレスの計算でポストインクリメントまたはプレデクリメントのとき、 25189: // アドレスレジスタを更新してそのままにするとページフォルトを起こした命令を再実行することができない 25190: // MOVE.L (A0)+,(d16,A0)などでデスティネーションの実効アドレスの計算にソースの結果を反映させる必要があるので、 25191: // アドレスレジスタは更新しておいてページフォルトのときだけ命令開始時の値に巻き戻す 25192: // CMPM.L (A0)+,(A1)+やSUBX.L -(A0),-(A1)などでは複数の増分を並べるかまたは積まなければならない 25193: // m60Incremented += (long) offset << (r << 3); 25194: // で積むことにする 25195: // 巻き戻すとき負数に注意する 25196: private static long m60Incremented; 25197: 25198: // FSLW Fault Status Long Word 25199: // 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 25200: // ┏━━━━━━━┯━┯━┯━┯━━━┯━━━┯━━━┯━━━━━┯━┯━┯━┯━┯━┯━┯━┯━┯━┯━┯━┯━┯━┯━┯━┯━┓ 25201: // ┃ │MA│ │LK│ RW │ SIZE │ TT │ TM │IO│PBE SBE PTA PTB IL│PF│SP│WP│TWE RE│WE│TTR BPE SEE┃ 25202: // ┗━━━━━━━┷━┷━┷━┷━━━┷━━━┷━━━┷━━━━━┷━┷━┷━┷━┷━┷━┷━┷━┷━┷━┷━┷━┷━┷━┷━┷━┛ 25203: private static final int M60_FSLW_MISALIGNED = 1 << 27; //MA Misaligned Access 25204: private static final int M60_FSLW_LOCKED = 1 << 25; //LK Locked Transfer 25205: private static final int M60_FSLW_READ_AND_WRITE = 3 << 23; //RW Read and Write 25206: private static final int M60_FSLW_RW_WRITE = 1 << 23; // Write 25207: private static final int M60_FSLW_RW_READ = 2 << 23; // Read 25208: private static final int M60_FSLW_RW_MODIFY = 3 << 23; // Read-Modify-Write 25209: private static final int M60_FSLW_TRANSFER_SIZE = 3 << 21; //SIZE Transfer Size 25210: private static final int M60_FSLW_SIZE_LONG = 0 << 21; // Long マニュアルが間違っているので注意 25211: private static final int M60_FSLW_SIZE_BYTE = 1 << 21; // Byte マニュアルが間違っているので注意 25212: private static final int M60_FSLW_SIZE_WORD = 2 << 21; // Word マニュアルが間違っているので注意 25213: private static final int M60_FSLW_SIZE_QUAD = 3 << 21; // Double Precision or MOVE16 25214: private static final int M60_FSLW_TRANSFER_TYPE = 3 << 19; //TT Transfer Type 25215: private static final int M60_FSLW_TT_NORMAL = 0 << 19; // Normal Access 25216: private static final int M60_FSLW_TT_MOVE16 = 1 << 19; // MOVE16 Access 25217: private static final int M60_FSLW_TT_ALTERNATE = 2 << 19; // Alternate Logical Function Code Access, Debug Access 25218: private static final int M60_FSLW_TT_ACKNOWLEDGE = 3 << 19; // Acknowledge Access, Low-Power Stop Broadcast 25219: private static final int M60_FSLW_TRANSFER_MODIFIER = 7 << 16; //TM Transfer Modifier 25220: private static final int M60_FSLW_TM_CACHE_PUSH = 0 << 16; // Data Cache Push Access 25221: private static final int M60_FSLW_TM_USER_DATA = 1 << 16; // User Data Access 25222: private static final int M60_FSLW_TM_USER_CODE = 2 << 16; // User Code Access 25223: private static final int M60_FSLW_TM_MMU_DATA = 3 << 16; // MMU Table Search Data Access 25224: private static final int M60_FSLW_TM_MMU_CODE = 4 << 16; // MMU Table Search Code Access 25225: private static final int M60_FSLW_TM_SUPER_DATA = 5 << 16; // Supervisor Data Access 25226: private static final int M60_FSLW_TM_SUPER_CODE = 6 << 16; // Supervisor Code Access 25227: private static final int M60_FSLW_TM_DATA = 1 << 16; // Data Access 25228: private static final int M60_FSLW_TM_CODE = 2 << 16; // Code Access 25229: private static final int M60_FSLW_TM_SUPERVISOR = 4 << 16; // Supervisor Access 25230: private static final int M60_FSLW_INSTRUCTION = 1 << 15; //IO Instruction or Operand 25231: private static final int M60_FSLW_IOMA_FIRST = 0 << 15 | 0 << 27; //Fault occurred on the first access of a misaligned transfer, or to the only access of an aligned transfer 25232: private static final int M60_FSLW_IOMA_SECOND = 0 << 15 | 1 << 27; //Fault occurred on the second or later access of a misaligned transfer 25233: private static final int M60_FSLW_IOMA_OPWORD = 1 << 15 | 0 << 27; //Fault occurred on an instruction opword fetch 25234: private static final int M60_FSLW_IOMA_EXWORD = 1 << 15 | 1 << 27; //Fault occurred on a fetch of an extension word 25235: private static final int M60_FSLW_PUSH_BUFFER = 1 << 14; //PBE Push Buffer Bus Error 25236: private static final int M60_FSLW_STORE_BUFFER = 1 << 13; //SBE Store Buffer Bus Error 25237: private static final int M60_FSLW_ROOT_DESCRIPTOR = 1 << 12; //PTA Pointer A Fault 25238: private static final int M60_FSLW_POINTER_DESCRIPTOR = 1 << 11; //PTB Pointer B Fault 25239: private static final int M60_FSLW_INDIRECT_LEVEL = 1 << 10; //IL Indirect Level Fault 25240: private static final int M60_FSLW_PAGE_FAULT = 1 << 9; //PF Page Fault 25241: private static final int M60_FSLW_SUPERVISOR_PROTECT = 1 << 8; //SP Supervisor Protect 25242: private static final int M60_FSLW_WRITE_PROTECT = 1 << 7; //WP Write Protect 25243: private static final int M60_FSLW_TABLE_SEARCH = 1 << 6; //TWE Bus Error on Table Search 25244: private static final int M60_FSLW_BUS_ERROR_ON_READ = 1 << 5; //RE Bus Error on Read 25245: private static final int M60_FSLW_BUS_ERROR_ON_WRITE = 1 << 4; //WE Bus Error on Write 25246: private static final int M60_FSLW_TRANSPARENT = 1 << 3; //TTR TTR Hit 25247: private static final int M60_FSLW_BRANCH_PREDICTION = 1 << 2; //BPE Branch Prediction Error 25248: private static final int M60_FSLW_SOFTWARE_EMULATION = 1 << 0; //SEE Software Emulation Error 25249: 25250: private static int m60FSLW; 25251: 25252: public static void m60BusErrorOnRead () { 25253: m60FSLW |= M60_FSLW_BUS_ERROR_ON_READ; 25254: } 25255: public static void m60BusErrorOnWrite () { 25256: m60FSLW |= M60_FSLW_BUS_ERROR_ON_WRITE; 25257: } 25258: 25259: private static final String[] M60_FSLW_TEXT_IOMA = { 25260: "IO=0,MA=0 First access of a misaligned transfer or only access of an aligned transfer", 25261: "IO=0,MA=1 Second or later access of a misaligned transfer", 25262: "IO=1,MA=0 Instruction opword fetch", 25263: "IO=1,MA=1 Fetch of an extension word", 25264: }; 25265: private static final String[] M60_FSLW_TEXT_LK = { 25266: "LK=0 Not locked", 25267: "LK=1 Locked", 25268: }; 25269: private static final String[] M60_FSLW_TEXT_RW = { 25270: "RW=0 Undefined, reserved", 25271: "RW=1 Write", 25272: "RW=2 Read", 25273: "RW=3 Read-Modify-Write", 25274: }; 25275: private static final String[] M60_FSLW_TEXT_SIZE = { 25276: "SIZE=0 Byte", 25277: "SIZE=1 Word", 25278: "SIZE=2 Long", 25279: "SIZE=3 Double precision or MOVE16", 25280: }; 25281: private static final String[] M60_FSLW_TEXT_TT = { 25282: "TT=0 Normal access", 25283: "TT=1 MOVE16 access", 25284: "TT=2 Alternate or debug access", 25285: "TT=3 Acknowledge or LPSTOP broadcast", 25286: }; 25287: private static final String[] M60_FSLW_TEXT_TM = { 25288: "TM=0 Data cache push access", 25289: "TM=1 User data or MOVE16 access", 25290: "TM=2 User code access", 25291: "TM=3 MMU table search data access", 25292: "TM=4 MMU table search code access", 25293: "TM=5 Supervisor data access", 25294: "TM=6 Supervisor code access", 25295: "TM=7 Reserved", 25296: //"TM=0 Logical function code 0", 25297: //"TM=1 Debug access", 25298: //"TM=2 Reserved", 25299: //"TM=3 Logical function code 3", 25300: //"TM=4 Logical function code 4", 25301: //"TM=5 Debug pipe control mode access", 25302: //"TM=6 Debug pipe control mode access", 25303: //"TM=7 Logical function code 7", 25304: }; 25305: private static final String[] M60_FSLW_TEXT_CAUSE = { 25306: "SEE=1 Software emulation error", //0 25307: "", //1 25308: "BPE=1 Branch prediction error", //2 25309: "TTR=1 TTR hit", //3 25310: "WE=1 Bus error on write", //4 25311: "RE=1 Bus error on read", //5 25312: "TWE=1 Bus error on table search", //6 25313: "WP=1 Write protect", //7 25314: "SP=1 Supervisor protect", //8 25315: "PF=1 Page fault", //9 25316: "IL=1 Indirect level fault", //10 25317: "PTB=1 Pointer B fault", //11 25318: "PTA=1 Pointer A fault", //12 25319: "SBE=1 Store buffer bus error", //13 25320: "PBE=1 Push buffer bus error", //14 25321: }; 25322: 25323: private static String m60ErrorToString () { 25324: StringBuilder sb = new StringBuilder (); 25325: int supervisor = m60FSLW & M60_FSLW_TM_SUPERVISOR; 25326: int instruction = m60FSLW & M60_FSLW_TM_CODE; 25327: if (0 <= M68kException.m6eNumber && M68kException.m6eNumber < M68kException.M6E_ERROR_NAME.length) { 25328: sb.append (M68kException.M6E_ERROR_NAME[M68kException.m6eNumber]); 25329: } else { 25330: sb.append ("undefined exception #").append (M68kException.m6eNumber); 25331: } 25332: XEiJ.fmtHex8 (sb.append (" at PC=$"), XEiJ.regPC0).append ("($"); 25333: int pa = mmuTranslatePeek (XEiJ.regPC0, supervisor, 1); 25334: if ((XEiJ.regPC0 ^ pa) == 1) { 25335: sb.append ("????????"); 25336: } else { 25337: XEiJ.fmtHex8 (sb, pa); 25338: } 25339: XEiJ.fmtHex4 (sb.append ("), SR=$"), XEiJ.regSRT1 | XEiJ.regSRS | XEiJ.regSRI | XEiJ.regCCR); 25340: // 111111111122222222223333333333444444444455555555556666 25341: // 0123456789012345678901234567890123456789012345678901234567890123 25342: if (0b0011011101000000000000000000000000000000000000000000000000000000L << M68kException.m6eNumber < 0L) { //FORMAT $2,$4 25343: XEiJ.fmtHex8 (sb.append ("\n Fault or effective address is EA=$"), m60Address).append ("($"); 25344: pa = mmuTranslatePeek (m60Address, supervisor, instruction); 25345: if ((m60Address ^ pa) == 1) { 25346: sb.append ("????????"); 25347: } else { 25348: XEiJ.fmtHex8 (sb, pa); 25349: } 25350: sb.append (')'); 25351: } 25352: if (M68kException.m6eNumber == M68kException.M6E_ACCESS_FAULT) { //FORMAT $4 25353: XEiJ.fmtHex8 (sb.append ("\n Fault status long word is FSLW=$"), m60FSLW); 25354: sb.append ("\n Fault was caused by:"); 25355: for (int i = 14; i >= 0; i--) { 25356: if ((m60FSLW & (1 << i)) != 0) { 25357: sb.append ("\n ").append (M60_FSLW_TEXT_CAUSE[i]); 25358: } 25359: } 25360: sb.append ("\n Fault occured on:\n ") 25361: .append (M60_FSLW_TEXT_IOMA[(m60FSLW & M60_FSLW_INSTRUCTION) >>> 15 - 1 | (m60FSLW & M60_FSLW_MISALIGNED) >>> 27]) 25362: .append ("\n ").append (M60_FSLW_TEXT_LK[(m60FSLW & M60_FSLW_LOCKED) >>> 25]) 25363: .append ("\n ").append (M60_FSLW_TEXT_RW[(m60FSLW & M60_FSLW_READ_AND_WRITE) >>> 23]) 25364: .append ("\n ").append (M60_FSLW_TEXT_SIZE[(m60FSLW & M60_FSLW_TRANSFER_SIZE) >>> 21]) 25365: .append ("\n ").append (M60_FSLW_TEXT_TT[(m60FSLW & M60_FSLW_TRANSFER_TYPE) >>> 19]) 25366: .append ("\n ").append (M60_FSLW_TEXT_TM[(m60FSLW & M60_FSLW_TRANSFER_MODIFIER) >>> 16]); 25367: } 25368: return sb.toString (); 25369: } //m60ErrorToString() 25370: 25371: 25372: 25373: //キャッシュアクセス時間 25374: // キャッシュそのものはないが全領域でキャッシュがヒットしたことにすると速くなりすぎるので、 25375: // キャッシュミスペナルティを加算する 25376: // 条件 25377: // TMが1,2,5,6のいずれか 25378: // CACRでキャッシュが有効 25379: // データのとき(TMが1,5またはFSLWがM60_FSLW_INSTRUCTIONでないとき) 25380: // CACRでデータキャッシュが有効 25381: // 命令のとき(TMが2,6またはFSLWがM60_FSLW_INSTRUCTIONであるとき) 25382: // CACRで命令キャッシュが有効 25383: // TCでMMUが無効のときCACRでデフォルトキャッシュが有効 25384: // TCでMMUが有効のときページデスクリプタでキャッシュが有効 25385: // ならばキャッシュミスペナルティを求めて加算する 25386: // さもなくばデバイスのウェイトサイクルを加算する 25387: // 25388: //!!! 現在の実装は、MMU無効 25389: // 25390: 25391: public static final boolean CAT_ON = true; 25392: 25393: //キャッシュの配列 25394: // bit31-11 アドレス 25395: // bit1 有効 25396: // bit0 ダーティ(データのみ) 25397: private static final int[] catData = new int[4 * 128]; //データ 25398: private static final int[] catInst = new int[4 * 128]; //命令 25399: private static int catLine = 0; //ラウンドロビンで使うライン 25400: 25401: //ウェイト時間 25402: // mpuSetWaitが設定する 25403: public static long catMainLongTime = 0; //メインメモリとROM、ロング 25404: public static long catMainLineTime = 0; //メインメモリとROM、ライン 25405: public static long catHighLongTime = 0; //ハイメモリ、ロング 25406: public static long catHighLineTime = 0; //ハイメモリ、ライン 25407: 25408: //catReset () 25409: // リセット 25410: public static void catReset () { 25411: Arrays.fill (catData, 0); //無効 25412: Arrays.fill (catInst, 0); //無効 25413: catLine = 0; 25414: } //catReset 25415: 25416: //catReadMainROM (a) 25417: // リードメインメモリ、リードROM 25418: public static void catReadMainROM (int a) { 25419: if (!XEiJ.busWaitCycles) { //ウェイトサイクルなし 25420: return; 25421: } 25422: if ((m60FSLW & M60_FSLW_INSTRUCTION) == 0) { //データ 25423: if (0 <= XEiJ.mpuCACR) { //EDCが0 25424: XEiJ.mpuClockTime += catMainLongTime; 25425: return; 25426: } 25427: int t = (a & -0x800) | 2; //タグ、有効 25428: int i = (a & 0x7f0) >>> 2; //4*(0～127) 25429: if ((catData[i ] & -2) == t || 25430: (catData[i + 1] & -2) == t || 25431: (catData[i + 2] & -2) == t || 25432: (catData[i + 3] & -2) == t) { //ヒット 25433: return; 25434: } 25435: for (int l = 0; l < 4; l++) { 25436: if ((catData[i + l] & 2) == 0) { //無効 25437: catData[i + l] = t; //アロケート 25438: XEiJ.mpuClockTime += catMainLineTime; //充填 25439: return; 25440: } 25441: } 25442: if ((catData[i + catLine] & 1) != 0) { //ダーティ 25443: XEiJ.mpuClockTime += catMainLineTime; //排出 25444: } 25445: catData[i + catLine] = t; //アロケート 25446: XEiJ.mpuClockTime += catMainLineTime; //充填 25447: catLine = (catLine + 1) & 3; //ラウンドロビン 25448: } else { //命令 25449: if (0 <= (short) XEiJ.mpuCACR) { //EICが0 25450: XEiJ.mpuClockTime += catMainLongTime; 25451: return; 25452: } 25453: int t = (a & -0x800) | 2; //タグ、有効 25454: int i = (a & 0x7f0) >>> 2; //4*(0～127) 25455: if ((catInst[i ] & -2) == t || 25456: (catInst[i + 1] & -2) == t || 25457: (catInst[i + 2] & -2) == t || 25458: (catInst[i + 3] & -2) == t) { //ヒット 25459: return; 25460: } 25461: for (int l = 0; l < 4; l++) { 25462: if ((catInst[i + l] & 2) == 0) { //無効 25463: catInst[i + l] = t; //アロケート 25464: XEiJ.mpuClockTime += catMainLineTime; //充填 25465: return; 25466: } 25467: } 25468: catInst[i + catLine] = t; //アロケート 25469: XEiJ.mpuClockTime += catMainLineTime; //充填 25470: catLine = (catLine + 1) & 3; //ラウンドロビン 25471: } 25472: } //catReadMainROM 25473: 25474: //catReadHigh (a) 25475: // リードハイメモリ 25476: public static void catReadHigh (int a) { 25477: if (!XEiJ.busWaitCycles) { //ウェイトサイクルなし 25478: return; 25479: } 25480: if ((m60FSLW & M60_FSLW_INSTRUCTION) == 0) { //データ 25481: if (0 <= XEiJ.mpuCACR) { //EDCが0 25482: XEiJ.mpuClockTime += catHighLongTime; 25483: return; 25484: } 25485: int t = (a & -0x800) | 2; //タグ、有効 25486: int i = (a & 0x7f0) >>> 2; //4*(0～127) 25487: if ((catData[i ] & -2) == t || 25488: (catData[i + 1] & -2) == t || 25489: (catData[i + 2] & -2) == t || 25490: (catData[i + 3] & -2) == t) { //ヒット 25491: return; 25492: } 25493: for (int l = 0; l < 4; l++) { 25494: if ((catData[i + l] & 2) == 0) { //無効 25495: catData[i + l] = t; //アロケート 25496: XEiJ.mpuClockTime += catHighLineTime; //充填 25497: return; 25498: } 25499: } 25500: if ((catData[i + catLine] & 1) != 0) { //ダーティ 25501: XEiJ.mpuClockTime += catHighLineTime; //排出 25502: } 25503: catData[i + catLine] = t; //アロケート 25504: XEiJ.mpuClockTime += catHighLineTime; //充填 25505: catLine = (catLine + 1) & 3; //ラウンドロビン 25506: } else { //命令 25507: if (0 <= (short) XEiJ.mpuCACR) { //EICが0 25508: XEiJ.mpuClockTime += catHighLineTime; 25509: return; 25510: } 25511: int t = (a & -0x800) | 2; //タグ、有効 25512: int i = (a & 0x7f0) >>> 2; //4*(0～127) 25513: if ((catInst[i ] & -2) == t || 25514: (catInst[i + 1] & -2) == t || 25515: (catInst[i + 2] & -2) == t || 25516: (catInst[i + 3] & -2) == t) { //ヒット 25517: return; 25518: } 25519: for (int l = 0; l < 4; l++) { 25520: if ((catInst[i + l] & 2) == 0) { //無効 25521: catInst[i + l] = t; //アロケート 25522: XEiJ.mpuClockTime += catHighLineTime; //充填 25523: return; 25524: } 25525: } 25526: catInst[i + catLine] = t; //アロケート 25527: XEiJ.mpuClockTime += catHighLineTime; //充填 25528: catLine = (catLine + 1) & 3; //ラウンドロビン 25529: } 25530: } //catReadHigh 25531: 25532: //catWriteMain (a) 25533: // ライトメインメモリ 25534: public static void catWriteMain (int a) { 25535: if (!XEiJ.busWaitCycles) { //ウェイトサイクルなし 25536: return; 25537: } 25538: if (0 <= XEiJ.mpuCACR) { //EDCが0 25539: XEiJ.mpuClockTime += catMainLongTime; 25540: return; 25541: } 25542: int t = (a & -0x800) | 2; //タグ、有効 25543: int i = (a & 0x7f0) >>> 2; //4*(0～127) 25544: for (int l = 0; l < 4; l++) { 25545: if ((catData[i + l] & -2) == t) { //ヒット 25546: catData[i + l] |= 1; //ダーティ 25547: return; 25548: } 25549: } 25550: for (int l = 0; l < 4; l++) { 25551: if ((catData[i + l] & 2) == 0) { //無効 25552: catData[i + l] = t | 1; //アロケート、ダーティ 25553: XEiJ.mpuClockTime += catMainLineTime; //充填 25554: return; 25555: } 25556: } 25557: if ((catData[i + catLine] & 1) != 0) { //ダーティ 25558: XEiJ.mpuClockTime += catMainLineTime; //排出 25559: } 25560: catData[i + catLine] = t | 1; //アロケート、ダーティ 25561: XEiJ.mpuClockTime += catMainLineTime; //充填 25562: catLine = (catLine + 1) & 3; //ラウンドロビン 25563: } //catWriteMain 25564: 25565: //catWriteHigh (a) 25566: // ライトハイメモリ 25567: public static void catWriteHigh (int a) { 25568: if (!XEiJ.busWaitCycles) { //ウェイトサイクルなし 25569: return; 25570: } 25571: if (0 <= XEiJ.mpuCACR) { //EDCが0 25572: XEiJ.mpuClockTime += catHighLongTime; 25573: return; 25574: } 25575: int t = (a & -0x800) | 2; //タグ、有効 25576: int i = (a & 0x7f0) >>> 2; //4*(0～127) 25577: for (int l = 0; l < 4; l++) { 25578: if ((catData[i + l] & -2) == t) { //ヒット 25579: catData[i + l] |= 1; //ダーティ 25580: return; 25581: } 25582: } 25583: for (int l = 0; l < 4; l++) { 25584: if ((catData[i + l] & 2) == 0) { //無効 25585: catData[i + l] = t | 1; //アロケート、ダーティ 25586: XEiJ.mpuClockTime += catHighLineTime; //充填 25587: return; 25588: } 25589: } 25590: if ((catData[i + catLine] & 1) != 0) { //ダーティ 25591: XEiJ.mpuClockTime += catHighLineTime; //排出 25592: } 25593: catData[i + catLine] = t | 1; //アロケート、ダーティ 25594: XEiJ.mpuClockTime += catHighLineTime; //充填 25595: catLine = (catLine + 1) & 3; //ラウンドロビン 25596: } //catWriteHigh 25597: 25598: private static boolean catMove16InProgress; //MOVE16実行中 25599: private static int catSavedEDC; //保存されたEDC 25600: private static long catSavedMainLongTime; //保存されたメインメモリのロング時間 25601: private static long catSavedHighLongTime; //保存されたハイメモリのロング時間 25602: 25603: //catMove16Start () 25604: // MOVE16開始 25605: // EDCを保存 25606: // EDCをクリア 25607: // ロングの時間を保存 25608: // ロングの時間をラインの時間の1/4に変更 25609: // MOVE16はEDCに関係なく常にラインの時間がかかる 25610: private static void catMove16Start () { 25611: if (!XEiJ.busWaitCycles) { //ウェイトサイクルなし 25612: return; 25613: } 25614: XEiJ.mpuCycleCount += 11; 25615: catMove16InProgress = true; 25616: //EDCを保存 25617: catSavedEDC = XEiJ.mpuCACR & 0x80000000; 25618: //EDCをクリア 25619: XEiJ.mpuCACR &= 0x7FFFFFFF; 25620: //ロングの時間を保存 25621: catSavedMainLongTime = catMainLongTime; 25622: catSavedHighLongTime = catHighLongTime; 25623: //ロングの時間をラインの時間の1/4に変更 25624: catMainLongTime = catMainLineTime >> 2; 25625: catHighLongTime = catHighLineTime >> 2; 25626: } //catMove16Start 25627: 25628: //catMove16End () 25629: // MOVE16終了 25630: // EDCを復元 25631: // ロングの時間を復元 25632: private static void catMove16End () { 25633: if (!catMove16InProgress) { 25634: return; 25635: } 25636: catMove16InProgress = false; 25637: //EDCを復元 25638: XEiJ.mpuCACR |= catSavedEDC; 25639: //ロングの時間を復元 25640: catMainLongTime = catSavedMainLongTime; 25641: catHighLongTime = catSavedHighLongTime; 25642: } //catMove16End 25643: 25644: //catInvL (id, a) 25645: // ライン無効 25646: private static void catInvL (int id, int a) { 25647: int t = (a & -0x800) | 2; //タグ、有効 25648: int i = (a & 0x7f0) >>> 2; //4*(0～127) 25649: if ((id & 1) != 0) { //データ 25650: for (int l = 0; l < 4; l++) { 25651: if ((catData[i + l] & -2) == t) { //ヒット 25652: catData[i + l] = 0; //無効 25653: break; 25654: } 25655: } 25656: } 25657: if ((id & 2) != 0) { //命令 25658: for (int l = 0; l < 4; l++) { 25659: if ((catInst[i + l] & -2) == t) { //ヒット 25660: catInst[i + l] = 0; //無効 25661: break; 25662: } 25663: } 25664: } 25665: XEiJ.mpuClockTime += XEiJ.mpuCycleUnit * 18; //<=18 25666: } //catInvL 25667: 25668: //catInvP (id, a) 25669: // ページ無効 25670: private static void catInvP (int id, int a) { 25671: int t = (a & -0x800) | 2; //タグ、有効 25672: if ((id & 1) != 0) { //データ 25673: for (int i = 0; i < 512; i++) { 25674: if ((catData[i] & -2) == t) { //ヒット 25675: catData[i] = 0; //無効 25676: } 25677: } 25678: } 25679: if ((id & 2) != 0) { //命令 25680: for (int i = 0; i < 512; i++) { 25681: if ((catInst[i] & -2) == t) { //ヒット 25682: catInst[i] = 0; //無効 25683: } 25684: } 25685: } 25686: XEiJ.mpuClockTime += XEiJ.mpuCycleUnit * (18 + 256); //<=274 25687: } //catInvP 25688: 25689: //catInvA (id) 25690: // 全無効 25691: private static void catInvA (int id) { 25692: if ((id & 1) != 0) { //データ 25693: Arrays.fill (catData, 0); //無効 25694: } 25695: if ((id & 2) != 0) { //命令 25696: Arrays.fill (catInst, 0); //無効 25697: } 25698: XEiJ.mpuClockTime += XEiJ.mpuCycleUnit * 18; //<=17 25699: } //catInvA 25700: 25701: //catPushL (id, a) 25702: // ラインプッシュ 25703: private static void catPushL (int id, int a) { 25704: int k = 0; 25705: int t = (a & -0x800) | 2; //タグ、有効 25706: int i = (a & 0x7f0) >>> 2; //4*(0～127) 25707: if ((id & 1) != 0) { //データ 25708: for (int l = 0; l < 4; l++) { 25709: if ((catData[i + l] & -2) == t) { //ヒット 25710: if ((catData[i + l] & 1) == 1) { //ダーティ 25711: k++; //ライトライン 25712: } 25713: catData[i + l] = 0; //無効 25714: break; 25715: } 25716: } 25717: } 25718: if ((id & 2) != 0) { //命令 25719: for (int l = 0; l < 4; l++) { 25720: if ((catInst[i + l] & -2) == t) { //ヒット 25721: catInst[i + l] = 0; //無効 25722: break; 25723: } 25724: } 25725: } 25726: long lineTime = (XEiJ.busExMemoryStart <= a && a < XEiJ.busExMemoryStart + XEiJ.busExMemorySize 25727: ? catHighLineTime : catMainLineTime); 25728: XEiJ.mpuClockTime += XEiJ.mpuCycleUnit * 18 + lineTime * k; //<=26 25729: } //catPushL 25730: 25731: //catPushP (id, a) 25732: // ページプッシュ 25733: private static void catPushP (int id, int a) { 25734: int k = 0; 25735: int t = (a & -0x800) | 2; //タグ、有効 25736: if ((id & 1) != 0) { //データ 25737: for (int i = 0; i < 512; i++) { 25738: if ((catData[i] & -2) == t) { //ヒット 25739: if ((catData[i] & 1) == 1) { //ダーティ 25740: k++; //ライトライン 25741: } 25742: catData[i] = 0; //無効 25743: } 25744: } 25745: } 25746: if ((id & 2) != 0) { //命令 25747: for (int i = 0; i < 512; i++) { 25748: if ((catInst[i] & -2) == t) { //ヒット 25749: catInst[i] = 0; //無効 25750: } 25751: } 25752: } 25753: long lineTime = (XEiJ.busExMemoryStart <= a && a < XEiJ.busExMemoryStart + XEiJ.busExMemorySize 25754: ? catHighLineTime : catMainLineTime); 25755: XEiJ.mpuClockTime += XEiJ.mpuCycleUnit * (18 + 256) + lineTime * k; //<=2838 25756: } //catPushP 25757: 25758: //catPushA (id) 25759: // 全プッシュ 25760: private static void catPushA (int id) { 25761: int km = 0, kh = 0; 25762: if ((id & 1) != 0) { //データ 25763: for (int i = 0; i < 512; i++) { 25764: if ((catData[i] & 3) == 3) { //有効、ダーティ 25765: int a = catData[i] & -4; 25766: if (XEiJ.busExMemoryStart <= a && a < XEiJ.busExMemoryStart + XEiJ.busExMemorySize) { 25767: kh++; 25768: } else { 25769: km++; 25770: } 25771: } 25772: } 25773: Arrays.fill (catData, 0); //無効 25774: } 25775: if ((id & 2) != 0) { //命令 25776: Arrays.fill (catInst, 0); //無効 25777: } 25778: XEiJ.mpuClockTime += XEiJ.mpuCycleUnit * (18 + 256) + catMainLineTime * km + catHighLineTime * kh; //<=5394 25779: } //catPushA 25780: 25781: 25782: 25783: } //class MC68060 25784: 25785: 25786: