MC68060.java
     1: //========================================================================================
     2: //  MC68060.java
     3: //    en:MC68060 core
     4: //    ja:MC68060コア
     5: //  Copyright (C) 2003-2024 Makoto Kamada
     6: //
     7: //  This file is part of the XEiJ (X68000 Emulator in Java).
     8: //  You can use, modify and redistribute the XEiJ if the conditions are met.
     9: //  Read the XEiJ License for more details.
    10: //  https://stdkmd.net/xeij/
    11: //========================================================================================
    12: 
    13: package xeij;
    14: 
    15: import java.lang.*;  //Boolean,Character,Class,Comparable,Double,Exception,Float,IllegalArgumentException,Integer,Long,Math,Number,Object,Runnable,SecurityException,String,StringBuilder,System
    16: import java.util.*;  //ArrayList,Arrays,Calendar,GregorianCalendar,HashMap,Map,Map.Entry,Timer,TimerTask,TreeMap
    17: 
    18: public class MC68060 {
    19: 
    20:   public static void mpuCore () {
    21: 
    22:     //例外ループ
    23:     //  別のメソッドで検出された例外を命令ループの外側でcatchすることで命令ループを高速化する
    24:   errorLoop:
    25:     while (XEiJ.mpuClockTime < XEiJ.mpuClockLimit) {
    26:       try {
    27:         //命令ループ
    28:         while (XEiJ.mpuClockTime < XEiJ.mpuClockLimit) {
    29:           int t;
    30:           //命令を実行する
    31:           M68kException.m6eIncremented = 0L;  //アドレスレジスタの増分
    32:           XEiJ.mpuTraceFlag = XEiJ.regSRT1;  //命令実行前のsrT1
    33:           XEiJ.mpuCycleCount = 0;  //第1オペコードからROMのアクセスウエイトを有効にする。命令のサイクル数はすべてXEiJ.mpuCycleCount+=~で加えること
    34:           XEiJ.regPC0 = t = XEiJ.regPC;  //命令の先頭アドレス
    35:           XEiJ.regPC = t + 2;
    36:           //XEiJ.regOC = mmuReadWordZeroOpword (t, XEiJ.regSRS);  //第1オペコード。必ずゼロ拡張すること。pcに奇数が入っていることはないのでアドレスエラーのチェックを省略する
    37:           if (XEiJ.regSRS != 0) {  //スーパーバイザモード
    38:             M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_OPWORD | M68kException.M6E_FSLW_RW_READ | M68kException.M6E_FSLW_SIZE_WORD | M68kException.M6E_FSLW_TM_SUPER_CODE;
    39:             t = mmuTranslateReadSuperCode (t);
    40:             XEiJ.regOC = (InstructionBreakPoint.IBP_ON ? InstructionBreakPoint.ibpOp1SuperMap : DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdRwz (t);
    41:           } else {  //ユーザモード
    42:             M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_OPWORD | M68kException.M6E_FSLW_RW_READ | M68kException.M6E_FSLW_SIZE_WORD | M68kException.M6E_FSLW_TM_USER_CODE;
    43:             t = mmuTranslateReadUserCode (t);
    44:             XEiJ.regOC = (InstructionBreakPoint.IBP_ON ? InstructionBreakPoint.ibpOp1UserMap : DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdRwz (t);
    45:           }
    46: 
    47:           //命令の処理
    48:           //  第1オペコードの上位10ビットで分岐する
    49:         irpSwitch:
    50:           switch (XEiJ.regOC >>> 6) {  //第1オペコードの上位10ビット。XEiJ.regOCはゼロ拡張されているので0b1111_111_111&を省略
    51: 
    52:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
    53:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
    54:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
    55:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
    56:             //ORI.B #<data>,<ea>                              |-|012346|-|-UUUU|-**00|D M+-WXZ  |0000_000_000_mmm_rrr-{data}
    57:             //OR.B #<data>,<ea>                               |A|012346|-|-UUUU|-**00|  M+-WXZ  |0000_000_000_mmm_rrr-{data}  [ORI.B #<data>,<ea>]
    58:             //ORI.B #<data>,CCR                               |-|012346|-|*****|*****|          |0000_000_000_111_100-{data}
    59:           case 0b0000_000_000:
    60:             irpOriByte ();
    61:             break irpSwitch;
    62: 
    63:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
    64:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
    65:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
    66:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
    67:             //ORI.W #<data>,<ea>                              |-|012346|-|-UUUU|-**00|D M+-WXZ  |0000_000_001_mmm_rrr-{data}
    68:             //OR.W #<data>,<ea>                               |A|012346|-|-UUUU|-**00|  M+-WXZ  |0000_000_001_mmm_rrr-{data}  [ORI.W #<data>,<ea>]
    69:             //ORI.W #<data>,SR                                |-|012346|P|*****|*****|          |0000_000_001_111_100-{data}
    70:           case 0b0000_000_001:
    71:             irpOriWord ();
    72:             break irpSwitch;
    73: 
    74:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
    75:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
    76:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
    77:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
    78:             //ORI.L #<data>,<ea>                              |-|012346|-|-UUUU|-**00|D M+-WXZ  |0000_000_010_mmm_rrr-{data}
    79:             //OR.L #<data>,<ea>                               |A|012346|-|-UUUU|-**00|  M+-WXZ  |0000_000_010_mmm_rrr-{data}  [ORI.L #<data>,<ea>]
    80:           case 0b0000_000_010:
    81:             irpOriLong ();
    82:             break irpSwitch;
    83: 
    84:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
    85:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
    86:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
    87:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
    88:             //BITREV.L Dr                                     |-|------|-|-----|-----|D         |0000_000_011_000_rrr (ISA_C)
    89:             //CMP2.B <ea>,Rn                                  |-|--234S|-|-UUUU|-U*U*|  M  WXZP |0000_000_011_mmm_rrr-rnnn000000000000
    90:             //CHK2.B <ea>,Rn                                  |-|--234S|-|-UUUU|-U*U*|  M  WXZP |0000_000_011_mmm_rrr-rnnn100000000000
    91:           case 0b0000_000_011:
    92:             irpCmp2Chk2Byte ();
    93:             break irpSwitch;
    94: 
    95:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
    96:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
    97:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
    98:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
    99:             //BTST.L Dq,Dr                                    |-|012346|-|--U--|--*--|D         |0000_qqq_100_000_rrr
   100:             //MOVEP.W (d16,Ar),Dq                             |-|01234S|-|-----|-----|          |0000_qqq_100_001_rrr-{data}
   101:             //BTST.B Dq,<ea>                                  |-|012346|-|--U--|--*--|  M+-WXZPI|0000_qqq_100_mmm_rrr
   102:           case 0b0000_000_100:
   103:           case 0b0000_001_100:
   104:           case 0b0000_010_100:
   105:           case 0b0000_011_100:
   106:           case 0b0000_100_100:
   107:           case 0b0000_101_100:
   108:           case 0b0000_110_100:
   109:           case 0b0000_111_100:
   110:             irpBtstReg ();
   111:             break irpSwitch;
   112: 
   113:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   114:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   115:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   116:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   117:             //BCHG.L Dq,Dr                                    |-|012346|-|--U--|--*--|D         |0000_qqq_101_000_rrr
   118:             //MOVEP.L (d16,Ar),Dq                             |-|01234S|-|-----|-----|          |0000_qqq_101_001_rrr-{data}
   119:             //BCHG.B Dq,<ea>                                  |-|012346|-|--U--|--*--|  M+-WXZ  |0000_qqq_101_mmm_rrr
   120:           case 0b0000_000_101:
   121:           case 0b0000_001_101:
   122:           case 0b0000_010_101:
   123:           case 0b0000_011_101:
   124:           case 0b0000_100_101:
   125:           case 0b0000_101_101:
   126:           case 0b0000_110_101:
   127:           case 0b0000_111_101:
   128:             irpBchgReg ();
   129:             break irpSwitch;
   130: 
   131:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   132:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   133:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   134:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   135:             //BCLR.L Dq,Dr                                    |-|012346|-|--U--|--*--|D         |0000_qqq_110_000_rrr
   136:             //MOVEP.W Dq,(d16,Ar)                             |-|01234S|-|-----|-----|          |0000_qqq_110_001_rrr-{data}
   137:             //BCLR.B Dq,<ea>                                  |-|012346|-|--U--|--*--|  M+-WXZ  |0000_qqq_110_mmm_rrr
   138:           case 0b0000_000_110:
   139:           case 0b0000_001_110:
   140:           case 0b0000_010_110:
   141:           case 0b0000_011_110:
   142:           case 0b0000_100_110:
   143:           case 0b0000_101_110:
   144:           case 0b0000_110_110:
   145:           case 0b0000_111_110:
   146:             irpBclrReg ();
   147:             break irpSwitch;
   148: 
   149:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   150:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   151:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   152:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   153:             //BSET.L Dq,Dr                                    |-|012346|-|--U--|--*--|D         |0000_qqq_111_000_rrr
   154:             //MOVEP.L Dq,(d16,Ar)                             |-|01234S|-|-----|-----|          |0000_qqq_111_001_rrr-{data}
   155:             //BSET.B Dq,<ea>                                  |-|012346|-|--U--|--*--|  M+-WXZ  |0000_qqq_111_mmm_rrr
   156:           case 0b0000_000_111:
   157:           case 0b0000_001_111:
   158:           case 0b0000_010_111:
   159:           case 0b0000_011_111:
   160:           case 0b0000_100_111:
   161:           case 0b0000_101_111:
   162:           case 0b0000_110_111:
   163:           case 0b0000_111_111:
   164:             irpBsetReg ();
   165:             break irpSwitch;
   166: 
   167:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   168:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   169:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   170:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   171:             //ANDI.B #<data>,<ea>                             |-|012346|-|-UUUU|-**00|D M+-WXZ  |0000_001_000_mmm_rrr-{data}
   172:             //AND.B #<data>,<ea>                              |A|012346|-|-UUUU|-**00|  M+-WXZ  |0000_001_000_mmm_rrr-{data}  [ANDI.B #<data>,<ea>]
   173:             //ANDI.B #<data>,CCR                              |-|012346|-|*****|*****|          |0000_001_000_111_100-{data}
   174:           case 0b0000_001_000:
   175:             irpAndiByte ();
   176:             break irpSwitch;
   177: 
   178:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   179:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   180:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   181:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   182:             //ANDI.W #<data>,<ea>                             |-|012346|-|-UUUU|-**00|D M+-WXZ  |0000_001_001_mmm_rrr-{data}
   183:             //AND.W #<data>,<ea>                              |A|012346|-|-UUUU|-**00|  M+-WXZ  |0000_001_001_mmm_rrr-{data}  [ANDI.W #<data>,<ea>]
   184:             //ANDI.W #<data>,SR                               |-|012346|P|*****|*****|          |0000_001_001_111_100-{data}
   185:           case 0b0000_001_001:
   186:             irpAndiWord ();
   187:             break irpSwitch;
   188: 
   189:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   190:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   191:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   192:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   193:             //ANDI.L #<data>,<ea>                             |-|012346|-|-UUUU|-**00|D M+-WXZ  |0000_001_010_mmm_rrr-{data}
   194:             //AND.L #<data>,<ea>                              |A|012346|-|-UUUU|-**00|  M+-WXZ  |0000_001_010_mmm_rrr-{data}  [ANDI.L #<data>,<ea>]
   195:           case 0b0000_001_010:
   196:             irpAndiLong ();
   197:             break irpSwitch;
   198: 
   199:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   200:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   201:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   202:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   203:             //BYTEREV.L Dr                                    |-|------|-|-----|-----|D         |0000_001_011_000_rrr (ISA_C)
   204:             //CMP2.W <ea>,Rn                                  |-|--234S|-|-UUUU|-U*U*|  M  WXZP |0000_001_011_mmm_rrr-rnnn000000000000
   205:             //CHK2.W <ea>,Rn                                  |-|--234S|-|-UUUU|-U*U*|  M  WXZP |0000_001_011_mmm_rrr-rnnn100000000000
   206:           case 0b0000_001_011:
   207:             irpCmp2Chk2Word ();
   208:             break irpSwitch;
   209: 
   210:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   211:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   212:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   213:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   214:             //SUBI.B #<data>,<ea>                             |-|012346|-|UUUUU|*****|D M+-WXZ  |0000_010_000_mmm_rrr-{data}
   215:             //SUB.B #<data>,<ea>                              |A|012346|-|UUUUU|*****|  M+-WXZ  |0000_010_000_mmm_rrr-{data}  [SUBI.B #<data>,<ea>]
   216:           case 0b0000_010_000:
   217:             irpSubiByte ();
   218:             break irpSwitch;
   219: 
   220:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   221:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   222:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   223:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   224:             //SUBI.W #<data>,<ea>                             |-|012346|-|UUUUU|*****|D M+-WXZ  |0000_010_001_mmm_rrr-{data}
   225:             //SUB.W #<data>,<ea>                              |A|012346|-|UUUUU|*****|  M+-WXZ  |0000_010_001_mmm_rrr-{data}  [SUBI.W #<data>,<ea>]
   226:           case 0b0000_010_001:
   227:             irpSubiWord ();
   228:             break irpSwitch;
   229: 
   230:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   231:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   232:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   233:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   234:             //SUBI.L #<data>,<ea>                             |-|012346|-|UUUUU|*****|D M+-WXZ  |0000_010_010_mmm_rrr-{data}
   235:             //SUB.L #<data>,<ea>                              |A|012346|-|UUUUU|*****|  M+-WXZ  |0000_010_010_mmm_rrr-{data}  [SUBI.L #<data>,<ea>]
   236:           case 0b0000_010_010:
   237:             irpSubiLong ();
   238:             break irpSwitch;
   239: 
   240:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   241:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   242:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   243:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   244:             //FF1.L Dr                                        |-|------|-|-UUUU|-**00|D         |0000_010_011_000_rrr (ISA_C)
   245:             //CMP2.L <ea>,Rn                                  |-|--234S|-|-UUUU|-U*U*|  M  WXZP |0000_010_011_mmm_rrr-rnnn000000000000
   246:             //CHK2.L <ea>,Rn                                  |-|--234S|-|-UUUU|-U*U*|  M  WXZP |0000_010_011_mmm_rrr-rnnn100000000000
   247:           case 0b0000_010_011:
   248:             irpCmp2Chk2Long ();
   249:             break irpSwitch;
   250: 
   251:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   252:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   253:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   254:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   255:             //ADDI.B #<data>,<ea>                             |-|012346|-|UUUUU|*****|D M+-WXZ  |0000_011_000_mmm_rrr-{data}
   256:           case 0b0000_011_000:
   257:             irpAddiByte ();
   258:             break irpSwitch;
   259: 
   260:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   261:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   262:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   263:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   264:             //ADDI.W #<data>,<ea>                             |-|012346|-|UUUUU|*****|D M+-WXZ  |0000_011_001_mmm_rrr-{data}
   265:           case 0b0000_011_001:
   266:             irpAddiWord ();
   267:             break irpSwitch;
   268: 
   269:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   270:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   271:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   272:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   273:             //ADDI.L #<data>,<ea>                             |-|012346|-|UUUUU|*****|D M+-WXZ  |0000_011_010_mmm_rrr-{data}
   274:           case 0b0000_011_010:
   275:             irpAddiLong ();
   276:             break irpSwitch;
   277: 
   278:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   279:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   280:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   281:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   282:             //BTST.L #<data>,Dr                               |-|012346|-|--U--|--*--|D         |0000_100_000_000_rrr-{data}
   283:             //BTST.B #<data>,<ea>                             |-|012346|-|--U--|--*--|  M+-WXZP |0000_100_000_mmm_rrr-{data}
   284:           case 0b0000_100_000:
   285:             irpBtstImm ();
   286:             break irpSwitch;
   287: 
   288:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   289:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   290:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   291:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   292:             //BCHG.L #<data>,Dr                               |-|012346|-|--U--|--*--|D         |0000_100_001_000_rrr-{data}
   293:             //BCHG.B #<data>,<ea>                             |-|012346|-|--U--|--*--|  M+-WXZ  |0000_100_001_mmm_rrr-{data}
   294:           case 0b0000_100_001:
   295:             irpBchgImm ();
   296:             break irpSwitch;
   297: 
   298:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   299:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   300:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   301:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   302:             //BCLR.L #<data>,Dr                               |-|012346|-|--U--|--*--|D         |0000_100_010_000_rrr-{data}
   303:             //BCLR.B #<data>,<ea>                             |-|012346|-|--U--|--*--|  M+-WXZ  |0000_100_010_mmm_rrr-{data}
   304:           case 0b0000_100_010:
   305:             irpBclrImm ();
   306:             break irpSwitch;
   307: 
   308:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   309:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   310:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   311:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   312:             //BSET.L #<data>,Dr                               |-|012346|-|--U--|--*--|D         |0000_100_011_000_rrr-{data}
   313:             //BSET.B #<data>,<ea>                             |-|012346|-|--U--|--*--|  M+-WXZ  |0000_100_011_mmm_rrr-{data}
   314:           case 0b0000_100_011:
   315:             irpBsetImm ();
   316:             break irpSwitch;
   317: 
   318:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   319:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   320:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   321:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   322:             //EORI.B #<data>,<ea>                             |-|012346|-|-UUUU|-**00|D M+-WXZ  |0000_101_000_mmm_rrr-{data}
   323:             //EOR.B #<data>,<ea>                              |A|012346|-|-UUUU|-**00|D M+-WXZ  |0000_101_000_mmm_rrr-{data}  [EORI.B #<data>,<ea>]
   324:             //EORI.B #<data>,CCR                              |-|012346|-|*****|*****|          |0000_101_000_111_100-{data}
   325:           case 0b0000_101_000:
   326:             irpEoriByte ();
   327:             break irpSwitch;
   328: 
   329:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   330:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   331:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   332:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   333:             //EORI.W #<data>,<ea>                             |-|012346|-|-UUUU|-**00|D M+-WXZ  |0000_101_001_mmm_rrr-{data}
   334:             //EOR.W #<data>,<ea>                              |A|012346|-|-UUUU|-**00|D M+-WXZ  |0000_101_001_mmm_rrr-{data}  [EORI.W #<data>,<ea>]
   335:             //EORI.W #<data>,SR                               |-|012346|P|*****|*****|          |0000_101_001_111_100-{data}
   336:           case 0b0000_101_001:
   337:             irpEoriWord ();
   338:             break irpSwitch;
   339: 
   340:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   341:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   342:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   343:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   344:             //EORI.L #<data>,<ea>                             |-|012346|-|-UUUU|-**00|D M+-WXZ  |0000_101_010_mmm_rrr-{data}
   345:             //EOR.L #<data>,<ea>                              |A|012346|-|-UUUU|-**00|D M+-WXZ  |0000_101_010_mmm_rrr-{data}  [EORI.L #<data>,<ea>]
   346:           case 0b0000_101_010:
   347:             irpEoriLong ();
   348:             break irpSwitch;
   349: 
   350:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   351:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   352:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   353:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   354:             //CAS.B Dc,Du,<ea>                                |-|--2346|-|-UUUU|-****|  M+-WXZ  |0000_101_011_mmm_rrr-0000000uuu000ccc
   355:           case 0b0000_101_011:
   356:             irpCasByte ();
   357:             break irpSwitch;
   358: 
   359:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   360:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   361:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   362:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   363:             //CMPI.B #<data>,<ea>                             |-|--2346|-|-UUUU|-****|D M+-WXZP |0000_110_000_mmm_rrr-{data}
   364:             //CMP.B #<data>,<ea>                              |A|--2346|-|-UUUU|-****|  M+-WXZP |0000_110_000_mmm_rrr-{data}  [CMPI.B #<data>,<ea>]
   365:           case 0b0000_110_000:
   366:             irpCmpiByte ();
   367:             break irpSwitch;
   368: 
   369:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   370:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   371:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   372:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   373:             //CMPI.W #<data>,<ea>                             |-|--2346|-|-UUUU|-****|D M+-WXZP |0000_110_001_mmm_rrr-{data}
   374:             //CMP.W #<data>,<ea>                              |A|--2346|-|-UUUU|-****|  M+-WXZP |0000_110_001_mmm_rrr-{data}  [CMPI.W #<data>,<ea>]
   375:           case 0b0000_110_001:
   376:             irpCmpiWord ();
   377:             break irpSwitch;
   378: 
   379:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   380:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   381:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   382:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   383:             //CMPI.L #<data>,<ea>                             |-|--2346|-|-UUUU|-****|D M+-WXZP |0000_110_010_mmm_rrr-{data}
   384:             //CMP.L #<data>,<ea>                              |A|--2346|-|-UUUU|-****|  M+-WXZP |0000_110_010_mmm_rrr-{data}  [CMPI.L #<data>,<ea>]
   385:           case 0b0000_110_010:
   386:             irpCmpiLong ();
   387:             break irpSwitch;
   388: 
   389:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   390:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   391:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   392:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   393:             //CAS.W Dc,Du,<ea>                                |-|--2346|-|-UUUU|-****|  M+-WXZ  |0000_110_011_mmm_rrr-0000000uuu000ccc        (68060 software emulate misaligned <ea>)
   394:             //CAS2.W Dc1:Dc2,Du1:Du2,(Rn1):(Rn2)              |-|--234S|-|-UUUU|-****|          |0000_110_011_111_100-rnnn000uuu000ccc(1)-rnnn_000_uuu_000_ccc(2)
   395:           case 0b0000_110_011:
   396:             irpCasWord ();
   397:             break irpSwitch;
   398: 
   399:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   400:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   401:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   402:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   403:             //MOVES.B <ea>,Rn                                 |-|-12346|P|-----|-----|  M+-WXZ  |0000_111_000_mmm_rrr-rnnn000000000000
   404:             //MOVES.B Rn,<ea>                                 |-|-12346|P|-----|-----|  M+-WXZ  |0000_111_000_mmm_rrr-rnnn100000000000
   405:           case 0b0000_111_000:
   406:             irpMovesByte ();
   407:             break irpSwitch;
   408: 
   409:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   410:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   411:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   412:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   413:             //MOVES.W <ea>,Rn                                 |-|-12346|P|-----|-----|  M+-WXZ  |0000_111_001_mmm_rrr-rnnn000000000000
   414:             //MOVES.W Rn,<ea>                                 |-|-12346|P|-----|-----|  M+-WXZ  |0000_111_001_mmm_rrr-rnnn100000000000
   415:           case 0b0000_111_001:
   416:             irpMovesWord ();
   417:             break irpSwitch;
   418: 
   419:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   420:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   421:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   422:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   423:             //MOVES.L <ea>,Rn                                 |-|-12346|P|-----|-----|  M+-WXZ  |0000_111_010_mmm_rrr-rnnn000000000000
   424:             //MOVES.L Rn,<ea>                                 |-|-12346|P|-----|-----|  M+-WXZ  |0000_111_010_mmm_rrr-rnnn100000000000
   425:           case 0b0000_111_010:
   426:             irpMovesLong ();
   427:             break irpSwitch;
   428: 
   429:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   430:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   431:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   432:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   433:             //CAS.L Dc,Du,<ea>                                |-|--2346|-|-UUUU|-****|  M+-WXZ  |0000_111_011_mmm_rrr-0000000uuu000ccc        (68060 software emulate misaligned <ea>)
   434:             //CAS2.L Dc1:Dc2,Du1:Du2,(Rn1):(Rn2)              |-|--234S|-|-UUUU|-****|          |0000_111_011_111_100-rnnn000uuu000ccc(1)-rnnn_000_uuu_000_ccc(2)
   435:           case 0b0000_111_011:
   436:             irpCasLong ();
   437:             break irpSwitch;
   438: 
   439:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   440:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   441:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   442:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   443:             //MOVE.B <ea>,Dq                                  |-|012346|-|-UUUU|-**00|D M+-WXZPI|0001_qqq_000_mmm_rrr
   444:           case 0b0001_000_000:
   445:           case 0b0001_001_000:
   446:           case 0b0001_010_000:
   447:           case 0b0001_011_000:
   448:           case 0b0001_100_000:
   449:           case 0b0001_101_000:
   450:           case 0b0001_110_000:
   451:           case 0b0001_111_000:
   452:             irpMoveToDRByte ();
   453:             break irpSwitch;
   454: 
   455:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   456:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   457:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   458:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   459:             //MOVE.B <ea>,(Aq)                                |-|012346|-|-UUUU|-**00|D M+-WXZPI|0001_qqq_010_mmm_rrr
   460:           case 0b0001_000_010:
   461:           case 0b0001_001_010:
   462:           case 0b0001_010_010:
   463:           case 0b0001_011_010:
   464:           case 0b0001_100_010:
   465:           case 0b0001_101_010:
   466:           case 0b0001_110_010:
   467:           case 0b0001_111_010:
   468:             irpMoveToMMByte ();
   469:             break irpSwitch;
   470: 
   471:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   472:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   473:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   474:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   475:             //MOVE.B <ea>,(Aq)+                               |-|012346|-|-UUUU|-**00|D M+-WXZPI|0001_qqq_011_mmm_rrr
   476:           case 0b0001_000_011:
   477:           case 0b0001_001_011:
   478:           case 0b0001_010_011:
   479:           case 0b0001_011_011:
   480:           case 0b0001_100_011:
   481:           case 0b0001_101_011:
   482:           case 0b0001_110_011:
   483:           case 0b0001_111_011:
   484:             irpMoveToMPByte ();
   485:             break irpSwitch;
   486: 
   487:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   488:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   489:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   490:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   491:             //MOVE.B <ea>,-(Aq)                               |-|012346|-|-UUUU|-**00|D M+-WXZPI|0001_qqq_100_mmm_rrr
   492:           case 0b0001_000_100:
   493:           case 0b0001_001_100:
   494:           case 0b0001_010_100:
   495:           case 0b0001_011_100:
   496:           case 0b0001_100_100:
   497:           case 0b0001_101_100:
   498:           case 0b0001_110_100:
   499:           case 0b0001_111_100:
   500:             irpMoveToMNByte ();
   501:             break irpSwitch;
   502: 
   503:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   504:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   505:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   506:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   507:             //MOVE.B <ea>,(d16,Aq)                            |-|012346|-|-UUUU|-**00|D M+-WXZPI|0001_qqq_101_mmm_rrr
   508:           case 0b0001_000_101:
   509:           case 0b0001_001_101:
   510:           case 0b0001_010_101:
   511:           case 0b0001_011_101:
   512:           case 0b0001_100_101:
   513:           case 0b0001_101_101:
   514:           case 0b0001_110_101:
   515:           case 0b0001_111_101:
   516:             irpMoveToMWByte ();
   517:             break irpSwitch;
   518: 
   519:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   520:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   521:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   522:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   523:             //MOVE.B <ea>,(d8,Aq,Rn.wl)                       |-|012346|-|-UUUU|-**00|D M+-WXZPI|0001_qqq_110_mmm_rrr
   524:           case 0b0001_000_110:
   525:           case 0b0001_001_110:
   526:           case 0b0001_010_110:
   527:           case 0b0001_011_110:
   528:           case 0b0001_100_110:
   529:           case 0b0001_101_110:
   530:           case 0b0001_110_110:
   531:           case 0b0001_111_110:
   532:             irpMoveToMXByte ();
   533:             break irpSwitch;
   534: 
   535:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   536:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   537:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   538:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   539:             //MOVE.B <ea>,(xxx).W                             |-|012346|-|-UUUU|-**00|D M+-WXZPI|0001_000_111_mmm_rrr
   540:           case 0b0001_000_111:
   541:             irpMoveToZWByte ();
   542:             break irpSwitch;
   543: 
   544:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   545:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   546:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   547:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   548:             //MOVE.B <ea>,(xxx).L                             |-|012346|-|-UUUU|-**00|D M+-WXZPI|0001_001_111_mmm_rrr
   549:           case 0b0001_001_111:
   550:             irpMoveToZLByte ();
   551:             break irpSwitch;
   552: 
   553:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   554:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   555:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   556:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   557:             //MOVE.L <ea>,Dq                                  |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0010_qqq_000_mmm_rrr
   558:           case 0b0010_000_000:
   559:           case 0b0010_001_000:
   560:           case 0b0010_010_000:
   561:           case 0b0010_011_000:
   562:           case 0b0010_100_000:
   563:           case 0b0010_101_000:
   564:           case 0b0010_110_000:
   565:           case 0b0010_111_000:
   566:             irpMoveToDRLong ();
   567:             break irpSwitch;
   568: 
   569:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   570:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   571:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   572:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   573:             //MOVEA.L <ea>,Aq                                 |-|012346|-|-----|-----|DAM+-WXZPI|0010_qqq_001_mmm_rrr
   574:             //MOVE.L <ea>,Aq                                  |A|012346|-|-----|-----|DAM+-WXZPI|0010_qqq_001_mmm_rrr [MOVEA.L <ea>,Aq]
   575:           case 0b0010_000_001:
   576:           case 0b0010_001_001:
   577:           case 0b0010_010_001:
   578:           case 0b0010_011_001:
   579:           case 0b0010_100_001:
   580:           case 0b0010_101_001:
   581:           case 0b0010_110_001:
   582:           case 0b0010_111_001:
   583:             irpMoveaLong ();
   584:             break irpSwitch;
   585: 
   586:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   587:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   588:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   589:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   590:             //MOVE.L <ea>,(Aq)                                |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0010_qqq_010_mmm_rrr
   591:           case 0b0010_000_010:
   592:           case 0b0010_001_010:
   593:           case 0b0010_010_010:
   594:           case 0b0010_011_010:
   595:           case 0b0010_100_010:
   596:           case 0b0010_101_010:
   597:           case 0b0010_110_010:
   598:           case 0b0010_111_010:
   599:             irpMoveToMMLong ();
   600:             break irpSwitch;
   601: 
   602:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   603:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   604:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   605:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   606:             //MOVE.L <ea>,(Aq)+                               |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0010_qqq_011_mmm_rrr
   607:           case 0b0010_000_011:
   608:           case 0b0010_001_011:
   609:           case 0b0010_010_011:
   610:           case 0b0010_011_011:
   611:           case 0b0010_100_011:
   612:           case 0b0010_101_011:
   613:           case 0b0010_110_011:
   614:           case 0b0010_111_011:
   615:             irpMoveToMPLong ();
   616:             break irpSwitch;
   617: 
   618:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   619:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   620:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   621:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   622:             //MOVE.L <ea>,-(Aq)                               |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0010_qqq_100_mmm_rrr
   623:           case 0b0010_000_100:
   624:           case 0b0010_001_100:
   625:           case 0b0010_010_100:
   626:           case 0b0010_011_100:
   627:           case 0b0010_100_100:
   628:           case 0b0010_101_100:
   629:           case 0b0010_110_100:
   630:           case 0b0010_111_100:
   631:             irpMoveToMNLong ();
   632:             break irpSwitch;
   633: 
   634:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   635:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   636:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   637:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   638:             //MOVE.L <ea>,(d16,Aq)                            |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0010_qqq_101_mmm_rrr
   639:           case 0b0010_000_101:
   640:           case 0b0010_001_101:
   641:           case 0b0010_010_101:
   642:           case 0b0010_011_101:
   643:           case 0b0010_100_101:
   644:           case 0b0010_101_101:
   645:           case 0b0010_110_101:
   646:           case 0b0010_111_101:
   647:             irpMoveToMWLong ();
   648:             break irpSwitch;
   649: 
   650:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   651:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   652:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   653:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   654:             //MOVE.L <ea>,(d8,Aq,Rn.wl)                       |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0010_qqq_110_mmm_rrr
   655:           case 0b0010_000_110:
   656:           case 0b0010_001_110:
   657:           case 0b0010_010_110:
   658:           case 0b0010_011_110:
   659:           case 0b0010_100_110:
   660:           case 0b0010_101_110:
   661:           case 0b0010_110_110:
   662:           case 0b0010_111_110:
   663:             irpMoveToMXLong ();
   664:             break irpSwitch;
   665: 
   666:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   667:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   668:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   669:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   670:             //MOVE.L <ea>,(xxx).W                             |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0010_000_111_mmm_rrr
   671:           case 0b0010_000_111:
   672:             irpMoveToZWLong ();
   673:             break irpSwitch;
   674: 
   675:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   676:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   677:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   678:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   679:             //MOVE.L <ea>,(xxx).L                             |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0010_001_111_mmm_rrr
   680:           case 0b0010_001_111:
   681:             irpMoveToZLLong ();
   682:             break irpSwitch;
   683: 
   684:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   685:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   686:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   687:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   688:             //MOVE.W <ea>,Dq                                  |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0011_qqq_000_mmm_rrr
   689:           case 0b0011_000_000:
   690:           case 0b0011_001_000:
   691:           case 0b0011_010_000:
   692:           case 0b0011_011_000:
   693:           case 0b0011_100_000:
   694:           case 0b0011_101_000:
   695:           case 0b0011_110_000:
   696:           case 0b0011_111_000:
   697:             irpMoveToDRWord ();
   698:             break irpSwitch;
   699: 
   700:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   701:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   702:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   703:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   704:             //MOVEA.W <ea>,Aq                                 |-|012346|-|-----|-----|DAM+-WXZPI|0011_qqq_001_mmm_rrr
   705:             //MOVE.W <ea>,Aq                                  |A|012346|-|-----|-----|DAM+-WXZPI|0011_qqq_001_mmm_rrr [MOVEA.W <ea>,Aq]
   706:           case 0b0011_000_001:
   707:           case 0b0011_001_001:
   708:           case 0b0011_010_001:
   709:           case 0b0011_011_001:
   710:           case 0b0011_100_001:
   711:           case 0b0011_101_001:
   712:           case 0b0011_110_001:
   713:           case 0b0011_111_001:
   714:             irpMoveaWord ();
   715:             break irpSwitch;
   716: 
   717:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   718:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   719:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   720:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   721:             //MOVE.W <ea>,(Aq)                                |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0011_qqq_010_mmm_rrr
   722:           case 0b0011_000_010:
   723:           case 0b0011_001_010:
   724:           case 0b0011_010_010:
   725:           case 0b0011_011_010:
   726:           case 0b0011_100_010:
   727:           case 0b0011_101_010:
   728:           case 0b0011_110_010:
   729:           case 0b0011_111_010:
   730:             irpMoveToMMWord ();
   731:             break irpSwitch;
   732: 
   733:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   734:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   735:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   736:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   737:             //MOVE.W <ea>,(Aq)+                               |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0011_qqq_011_mmm_rrr
   738:           case 0b0011_000_011:
   739:           case 0b0011_001_011:
   740:           case 0b0011_010_011:
   741:           case 0b0011_011_011:
   742:           case 0b0011_100_011:
   743:           case 0b0011_101_011:
   744:           case 0b0011_110_011:
   745:           case 0b0011_111_011:
   746:             irpMoveToMPWord ();
   747:             break irpSwitch;
   748: 
   749:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   750:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   751:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   752:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   753:             //MOVE.W <ea>,-(Aq)                               |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0011_qqq_100_mmm_rrr
   754:           case 0b0011_000_100:
   755:           case 0b0011_001_100:
   756:           case 0b0011_010_100:
   757:           case 0b0011_011_100:
   758:           case 0b0011_100_100:
   759:           case 0b0011_101_100:
   760:           case 0b0011_110_100:
   761:           case 0b0011_111_100:
   762:             irpMoveToMNWord ();
   763:             break irpSwitch;
   764: 
   765:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   766:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   767:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   768:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   769:             //MOVE.W <ea>,(d16,Aq)                            |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0011_qqq_101_mmm_rrr
   770:           case 0b0011_000_101:
   771:           case 0b0011_001_101:
   772:           case 0b0011_010_101:
   773:           case 0b0011_011_101:
   774:           case 0b0011_100_101:
   775:           case 0b0011_101_101:
   776:           case 0b0011_110_101:
   777:           case 0b0011_111_101:
   778:             irpMoveToMWWord ();
   779:             break irpSwitch;
   780: 
   781:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   782:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   783:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   784:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   785:             //MOVE.W <ea>,(d8,Aq,Rn.wl)                       |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0011_qqq_110_mmm_rrr
   786:           case 0b0011_000_110:
   787:           case 0b0011_001_110:
   788:           case 0b0011_010_110:
   789:           case 0b0011_011_110:
   790:           case 0b0011_100_110:
   791:           case 0b0011_101_110:
   792:           case 0b0011_110_110:
   793:           case 0b0011_111_110:
   794:             irpMoveToMXWord ();
   795:             break irpSwitch;
   796: 
   797:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   798:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   799:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   800:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   801:             //MOVE.W <ea>,(xxx).W                             |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0011_000_111_mmm_rrr
   802:           case 0b0011_000_111:
   803:             irpMoveToZWWord ();
   804:             break irpSwitch;
   805: 
   806:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   807:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   808:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   809:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   810:             //MOVE.W <ea>,(xxx).L                             |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0011_001_111_mmm_rrr
   811:           case 0b0011_001_111:
   812:             irpMoveToZLWord ();
   813:             break irpSwitch;
   814: 
   815:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   816:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   817:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   818:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   819:             //NEGX.B <ea>                                     |-|012346|-|*UUUU|*****|D M+-WXZ  |0100_000_000_mmm_rrr
   820:           case 0b0100_000_000:
   821:             irpNegxByte ();
   822:             break irpSwitch;
   823: 
   824:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   825:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   826:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   827:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   828:             //NEGX.W <ea>                                     |-|012346|-|*UUUU|*****|D M+-WXZ  |0100_000_001_mmm_rrr
   829:           case 0b0100_000_001:
   830:             irpNegxWord ();
   831:             break irpSwitch;
   832: 
   833:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   834:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   835:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   836:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   837:             //NEGX.L <ea>                                     |-|012346|-|*UUUU|*****|D M+-WXZ  |0100_000_010_mmm_rrr
   838:           case 0b0100_000_010:
   839:             irpNegxLong ();
   840:             break irpSwitch;
   841: 
   842:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   843:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   844:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   845:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   846:             //MOVE.W SR,<ea>                                  |-|-12346|P|*****|-----|D M+-WXZ  |0100_000_011_mmm_rrr
   847:           case 0b0100_000_011:
   848:             irpMoveFromSR ();
   849:             break irpSwitch;
   850: 
   851:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   852:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   853:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   854:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   855:             //CHK.L <ea>,Dq                                   |-|--2346|-|-UUUU|-*UUU|D M+-WXZPI|0100_qqq_100_mmm_rrr
   856:           case 0b0100_000_100:
   857:           case 0b0100_001_100:
   858:           case 0b0100_010_100:
   859:           case 0b0100_011_100:
   860:           case 0b0100_100_100:
   861:           case 0b0100_101_100:
   862:           case 0b0100_110_100:
   863:           case 0b0100_111_100:
   864:             irpChkLong ();
   865:             break irpSwitch;
   866: 
   867:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   868:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   869:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   870:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   871:             //CHK.W <ea>,Dq                                   |-|012346|-|-UUUU|-*UUU|D M+-WXZPI|0100_qqq_110_mmm_rrr
   872:           case 0b0100_000_110:
   873:           case 0b0100_001_110:
   874:           case 0b0100_010_110:
   875:           case 0b0100_011_110:
   876:           case 0b0100_100_110:
   877:           case 0b0100_101_110:
   878:           case 0b0100_110_110:
   879:           case 0b0100_111_110:
   880:             irpChkWord ();
   881:             break irpSwitch;
   882: 
   883:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   884:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   885:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   886:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   887:             //LEA.L <ea>,Aq                                   |-|012346|-|-----|-----|  M  WXZP |0100_qqq_111_mmm_rrr
   888:             //EXTB.L Dr                                       |-|--2346|-|-UUUU|-**00|D         |0100_100_111_000_rrr
   889:           case 0b0100_000_111:
   890:           case 0b0100_001_111:
   891:           case 0b0100_010_111:
   892:           case 0b0100_011_111:
   893:           case 0b0100_100_111:
   894:           case 0b0100_101_111:
   895:           case 0b0100_110_111:
   896:           case 0b0100_111_111:
   897:             irpLea ();
   898:             break irpSwitch;
   899: 
   900:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   901:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   902:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   903:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   904:             //CLR.B <ea>                                      |-|012346|-|-UUUU|-0100|D M+-WXZ  |0100_001_000_mmm_rrr (68000 and 68008 read before clear)
   905:           case 0b0100_001_000:
   906:             irpClrByte ();
   907:             break irpSwitch;
   908: 
   909:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   910:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   911:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   912:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   913:             //CLR.W <ea>                                      |-|012346|-|-UUUU|-0100|D M+-WXZ  |0100_001_001_mmm_rrr (68000 and 68008 read before clear)
   914:           case 0b0100_001_001:
   915:             irpClrWord ();
   916:             break irpSwitch;
   917: 
   918:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   919:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   920:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   921:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   922:             //CLR.L <ea>                                      |-|012346|-|-UUUU|-0100|D M+-WXZ  |0100_001_010_mmm_rrr (68000 and 68008 read before clear)
   923:           case 0b0100_001_010:
   924:             irpClrLong ();
   925:             break irpSwitch;
   926: 
   927:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   928:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   929:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   930:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   931:             //MOVE.W CCR,<ea>                                 |-|-12346|-|*****|-----|D M+-WXZ  |0100_001_011_mmm_rrr
   932:           case 0b0100_001_011:
   933:             irpMoveFromCCR ();
   934:             break irpSwitch;
   935: 
   936:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   937:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   938:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   939:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   940:             //NEG.B <ea>                                      |-|012346|-|UUUUU|*****|D M+-WXZ  |0100_010_000_mmm_rrr
   941:           case 0b0100_010_000:
   942:             irpNegByte ();
   943:             break irpSwitch;
   944: 
   945:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   946:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   947:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   948:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   949:             //NEG.W <ea>                                      |-|012346|-|UUUUU|*****|D M+-WXZ  |0100_010_001_mmm_rrr
   950:           case 0b0100_010_001:
   951:             irpNegWord ();
   952:             break irpSwitch;
   953: 
   954:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   955:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   956:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   957:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   958:             //NEG.L <ea>                                      |-|012346|-|UUUUU|*****|D M+-WXZ  |0100_010_010_mmm_rrr
   959:           case 0b0100_010_010:
   960:             irpNegLong ();
   961:             break irpSwitch;
   962: 
   963:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   964:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   965:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   966:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   967:             //MOVE.W <ea>,CCR                                 |-|012346|-|UUUUU|*****|D M+-WXZPI|0100_010_011_mmm_rrr
   968:           case 0b0100_010_011:
   969:             irpMoveToCCR ();
   970:             break irpSwitch;
   971: 
   972:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   973:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   974:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   975:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   976:             //NOT.B <ea>                                      |-|012346|-|-UUUU|-**00|D M+-WXZ  |0100_011_000_mmm_rrr
   977:           case 0b0100_011_000:
   978:             irpNotByte ();
   979:             break irpSwitch;
   980: 
   981:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   982:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   983:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   984:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   985:             //NOT.W <ea>                                      |-|012346|-|-UUUU|-**00|D M+-WXZ  |0100_011_001_mmm_rrr
   986:           case 0b0100_011_001:
   987:             irpNotWord ();
   988:             break irpSwitch;
   989: 
   990:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   991:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   992:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   993:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   994:             //NOT.L <ea>                                      |-|012346|-|-UUUU|-**00|D M+-WXZ  |0100_011_010_mmm_rrr
   995:           case 0b0100_011_010:
   996:             irpNotLong ();
   997:             break irpSwitch;
   998: 
   999:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1000:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1001:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1002:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1003:             //MOVE.W <ea>,SR                                  |-|012346|P|UUUUU|*****|D M+-WXZPI|0100_011_011_mmm_rrr
  1004:           case 0b0100_011_011:
  1005:             irpMoveToSR ();
  1006:             break irpSwitch;
  1007: 
  1008:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1009:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1010:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1011:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1012:             //NBCD.B <ea>                                     |-|012346|-|UUUUU|*U*U*|D M+-WXZ  |0100_100_000_mmm_rrr
  1013:             //LINK.L Ar,#<data>                               |-|--2346|-|-----|-----|          |0100_100_000_001_rrr-{data}
  1014:           case 0b0100_100_000:
  1015:             irpNbcd ();
  1016:             break irpSwitch;
  1017: 
  1018:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1019:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1020:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1021:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1022:             //SWAP.W Dr                                       |-|012346|-|-UUUU|-**00|D         |0100_100_001_000_rrr
  1023:             //BKPT #<data>                                    |-|-12346|-|-----|-----|          |0100_100_001_001_ddd
  1024:             //PEA.L <ea>                                      |-|012346|-|-----|-----|  M  WXZP |0100_100_001_mmm_rrr
  1025:           case 0b0100_100_001:
  1026:             irpPea ();
  1027:             break irpSwitch;
  1028: 
  1029:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1030:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1031:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1032:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1033:             //EXT.W Dr                                        |-|012346|-|-UUUU|-**00|D         |0100_100_010_000_rrr
  1034:             //MOVEM.W <list>,<ea>                             |-|012346|-|-----|-----|  M -WXZ  |0100_100_010_mmm_rrr-llllllllllllllll
  1035:           case 0b0100_100_010:
  1036:             irpMovemToMemWord ();
  1037:             break irpSwitch;
  1038: 
  1039:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1040:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1041:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1042:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1043:             //EXT.L Dr                                        |-|012346|-|-UUUU|-**00|D         |0100_100_011_000_rrr
  1044:             //MOVEM.L <list>,<ea>                             |-|012346|-|-----|-----|  M -WXZ  |0100_100_011_mmm_rrr-llllllllllllllll
  1045:           case 0b0100_100_011:
  1046:             irpMovemToMemLong ();
  1047:             break irpSwitch;
  1048: 
  1049:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1050:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1051:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1052:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1053:             //TST.B <ea>                                      |-|012346|-|-UUUU|-**00|D M+-WXZ  |0100_101_000_mmm_rrr
  1054:             //TST.B <ea>                                      |-|--2346|-|-UUUU|-**00|        PI|0100_101_000_mmm_rrr
  1055:           case 0b0100_101_000:
  1056:             irpTstByte ();
  1057:             break irpSwitch;
  1058: 
  1059:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1060:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1061:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1062:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1063:             //TST.W <ea>                                      |-|012346|-|-UUUU|-**00|D M+-WXZ  |0100_101_001_mmm_rrr
  1064:             //TST.W <ea>                                      |-|--2346|-|-UUUU|-**00| A      PI|0100_101_001_mmm_rrr
  1065:           case 0b0100_101_001:
  1066:             irpTstWord ();
  1067:             break irpSwitch;
  1068: 
  1069:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1070:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1071:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1072:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1073:             //TST.L <ea>                                      |-|012346|-|-UUUU|-**00|D M+-WXZ  |0100_101_010_mmm_rrr
  1074:             //TST.L <ea>                                      |-|--2346|-|-UUUU|-**00| A      PI|0100_101_010_mmm_rrr
  1075:           case 0b0100_101_010:
  1076:             irpTstLong ();
  1077:             break irpSwitch;
  1078: 
  1079:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1080:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1081:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1082:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1083:             //TAS.B <ea>                                      |-|012346|-|-UUUU|-**00|D M+-WXZ  |0100_101_011_mmm_rrr
  1084:             //ILLEGAL                                         |-|012346|-|-----|-----|          |0100_101_011_111_100
  1085:           case 0b0100_101_011:
  1086:             irpTas ();
  1087:             break irpSwitch;
  1088: 
  1089:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1090:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1091:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1092:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1093:             //MULU.L <ea>,Dl                                  |-|--2346|-|-UUUU|-***0|D M+-WXZPI|0100_110_000_mmm_rrr-0lll000000000hhh        (h is not used)
  1094:             //MULU.L <ea>,Dh:Dl                               |-|--234S|-|-UUUU|-***0|D M+-WXZPI|0100_110_000_mmm_rrr-0lll010000000hhh        (if h=l then result is not defined)
  1095:             //MULS.L <ea>,Dl                                  |-|--2346|-|-UUUU|-***0|D M+-WXZPI|0100_110_000_mmm_rrr-0lll100000000hhh        (h is not used)
  1096:             //MULS.L <ea>,Dh:Dl                               |-|--234S|-|-UUUU|-***0|D M+-WXZPI|0100_110_000_mmm_rrr-0lll110000000hhh        (if h=l then result is not defined)
  1097:           case 0b0100_110_000:
  1098:             irpMuluMulsLong ();
  1099:             break irpSwitch;
  1100: 
  1101:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1102:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1103:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1104:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1105:             //DIVU.L <ea>,Dq                                  |-|--2346|-|-UUUU|-***0|D M+-WXZPI|0100_110_001_mmm_rrr-0qqq000000000qqq
  1106:             //DIVUL.L <ea>,Dr:Dq                              |-|--2346|-|-UUUU|-***0|D M+-WXZPI|0100_110_001_mmm_rrr-0qqq000000000rrr        (q is not equal to r)
  1107:             //DIVU.L <ea>,Dr:Dq                               |-|--234S|-|-UUUU|-***0|D M+-WXZPI|0100_110_001_mmm_rrr-0qqq010000000rrr        (q is not equal to r)
  1108:             //DIVS.L <ea>,Dq                                  |-|--2346|-|-UUUU|-***0|D M+-WXZPI|0100_110_001_mmm_rrr-0qqq100000000qqq
  1109:             //DIVSL.L <ea>,Dr:Dq                              |-|--2346|-|-UUUU|-***0|D M+-WXZPI|0100_110_001_mmm_rrr-0qqq100000000rrr        (q is not equal to r)
  1110:             //DIVS.L <ea>,Dr:Dq                               |-|--234S|-|-UUUU|-***0|D M+-WXZPI|0100_110_001_mmm_rrr-0qqq110000000rrr        (q is not equal to r)
  1111:           case 0b0100_110_001:
  1112:             irpDivuDivsLong ();
  1113:             break irpSwitch;
  1114: 
  1115:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1116:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1117:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1118:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1119:             //SATS.L Dr                                       |-|------|-|-UUUU|-**00|D         |0100_110_010_000_rrr (ISA_B)
  1120:             //MOVEM.W <ea>,<list>                             |-|012346|-|-----|-----|  M+ WXZP |0100_110_010_mmm_rrr-llllllllllllllll
  1121:           case 0b0100_110_010:
  1122:             irpMovemToRegWord ();
  1123:             break irpSwitch;
  1124: 
  1125:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1126:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1127:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1128:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1129:             //MOVEM.L <ea>,<list>                             |-|012346|-|-----|-----|  M+ WXZP |0100_110_011_mmm_rrr-llllllllllllllll
  1130:           case 0b0100_110_011:
  1131:             irpMovemToRegLong ();
  1132:             break irpSwitch;
  1133: 
  1134:           case 0b0100_111_001:
  1135:             switch (XEiJ.regOC & 0b111_111) {
  1136: 
  1137:               //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1138:               //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1139:               //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1140:               //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1141:               //TRAP #<vector>                                  |-|012346|-|-----|-----|          |0100_111_001_00v_vvv
  1142:             case 0b000_000:
  1143:             case 0b000_001:
  1144:             case 0b000_010:
  1145:             case 0b000_011:
  1146:             case 0b000_100:
  1147:             case 0b000_101:
  1148:             case 0b000_110:
  1149:             case 0b000_111:
  1150:             case 0b001_000:
  1151:             case 0b001_001:
  1152:             case 0b001_010:
  1153:             case 0b001_011:
  1154:             case 0b001_100:
  1155:             case 0b001_101:
  1156:             case 0b001_110:
  1157:               irpTrap ();
  1158:               break irpSwitch;
  1159:             case 0b001_111:
  1160:               irpTrap15 ();
  1161:               break irpSwitch;
  1162: 
  1163:               //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1164:               //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1165:               //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1166:               //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1167:               //LINK.W Ar,#<data>                               |-|012346|-|-----|-----|          |0100_111_001_010_rrr-{data}
  1168:             case 0b010_000:
  1169:             case 0b010_001:
  1170:             case 0b010_010:
  1171:             case 0b010_011:
  1172:             case 0b010_100:
  1173:             case 0b010_101:
  1174:             case 0b010_110:
  1175:             case 0b010_111:
  1176:               irpLinkWord ();
  1177:               break irpSwitch;
  1178: 
  1179:               //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1180:               //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1181:               //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1182:               //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1183:               //UNLK Ar                                         |-|012346|-|-----|-----|          |0100_111_001_011_rrr
  1184:             case 0b011_000:
  1185:             case 0b011_001:
  1186:             case 0b011_010:
  1187:             case 0b011_011:
  1188:             case 0b011_100:
  1189:             case 0b011_101:
  1190:             case 0b011_110:
  1191:             case 0b011_111:
  1192:               irpUnlk ();
  1193:               break irpSwitch;
  1194: 
  1195:               //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1196:               //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1197:               //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1198:               //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1199:               //MOVE.L Ar,USP                                   |-|012346|P|-----|-----|          |0100_111_001_100_rrr
  1200:             case 0b100_000:
  1201:             case 0b100_001:
  1202:             case 0b100_010:
  1203:             case 0b100_011:
  1204:             case 0b100_100:
  1205:             case 0b100_101:
  1206:             case 0b100_110:
  1207:             case 0b100_111:
  1208:               irpMoveToUsp ();
  1209:               break irpSwitch;
  1210: 
  1211:               //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1212:               //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1213:               //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1214:               //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1215:               //MOVE.L USP,Ar                                   |-|012346|P|-----|-----|          |0100_111_001_101_rrr
  1216:             case 0b101_000:
  1217:             case 0b101_001:
  1218:             case 0b101_010:
  1219:             case 0b101_011:
  1220:             case 0b101_100:
  1221:             case 0b101_101:
  1222:             case 0b101_110:
  1223:             case 0b101_111:
  1224:               irpMoveFromUsp ();
  1225:               break irpSwitch;
  1226: 
  1227:               //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1228:               //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1229:               //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1230:               //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1231:               //RESET                                           |-|012346|P|-----|-----|          |0100_111_001_110_000
  1232:             case 0b110_000:
  1233:               irpReset ();
  1234:               break irpSwitch;
  1235: 
  1236:               //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1237:               //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1238:               //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1239:               //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1240:               //NOP                                             |-|012346|-|-----|-----|          |0100_111_001_110_001
  1241:             case 0b110_001:
  1242:               irpNop ();
  1243:               break irpSwitch;
  1244: 
  1245:               //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1246:               //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1247:               //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1248:               //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1249:               //STOP #<data>                                    |-|012346|P|UUUUU|*****|          |0100_111_001_110_010-{data}
  1250:             case 0b110_010:
  1251:               irpStop ();
  1252:               break irpSwitch;
  1253: 
  1254:               //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1255:               //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1256:               //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1257:               //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1258:               //RTE                                             |-|012346|P|UUUUU|*****|          |0100_111_001_110_011
  1259:             case 0b110_011:
  1260:               irpRte ();
  1261:               break irpSwitch;
  1262: 
  1263:               //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1264:               //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1265:               //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1266:               //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1267:               //RTD #<data>                                     |-|-12346|-|-----|-----|          |0100_111_001_110_100-{data}
  1268:             case 0b110_100:
  1269:               irpRtd ();
  1270:               break irpSwitch;
  1271: 
  1272:               //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1273:               //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1274:               //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1275:               //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1276:               //RTS                                             |-|012346|-|-----|-----|          |0100_111_001_110_101
  1277:             case 0b110_101:
  1278:               irpRts ();
  1279:               break irpSwitch;
  1280: 
  1281:               //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1282:               //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1283:               //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1284:               //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1285:               //TRAPV                                           |-|012346|-|---*-|-----|          |0100_111_001_110_110
  1286:             case 0b110_110:
  1287:               irpTrapv ();
  1288:               break irpSwitch;
  1289: 
  1290:               //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1291:               //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1292:               //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1293:               //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1294:               //RTR                                             |-|012346|-|UUUUU|*****|          |0100_111_001_110_111
  1295:             case 0b110_111:
  1296:               irpRtr ();
  1297:               break irpSwitch;
  1298: 
  1299:               //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1300:               //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1301:               //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1302:               //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1303:               //MOVEC.L Rc,Rn                                   |-|-12346|P|-----|-----|          |0100_111_001_111_010-rnnncccccccccccc
  1304:             case 0b111_010:
  1305:               irpMovecFromControl ();
  1306:               break irpSwitch;
  1307: 
  1308:               //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1309:               //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1310:               //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1311:               //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1312:               //MOVEC.L Rn,Rc                                   |-|-12346|P|-----|-----|          |0100_111_001_111_011-rnnncccccccccccc
  1313:             case 0b111_011:
  1314:               irpMovecToControl ();
  1315:               break irpSwitch;
  1316: 
  1317:             default:
  1318:               irpIllegal ();
  1319: 
  1320:             }  //switch XEiJ.regOC & 0b111_111
  1321:             break irpSwitch;
  1322: 
  1323:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1324:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1325:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1326:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1327:             //JSR <ea>                                        |-|012346|-|-----|-----|  M  WXZP |0100_111_010_mmm_rrr
  1328:             //JBSR.L <label>                                  |A|012346|-|-----|-----|          |0100_111_010_111_001-{address}       [JSR <label>]
  1329:           case 0b0100_111_010:
  1330:             irpJsr ();
  1331:             break irpSwitch;
  1332: 
  1333:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1334:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1335:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1336:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1337:             //JMP <ea>                                        |-|012346|-|-----|-----|  M  WXZP |0100_111_011_mmm_rrr
  1338:             //JBRA.L <label>                                  |A|012346|-|-----|-----|          |0100_111_011_111_001-{address}       [JMP <label>]
  1339:           case 0b0100_111_011:
  1340:             irpJmp ();
  1341:             break irpSwitch;
  1342: 
  1343:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1344:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1345:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1346:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1347:             //ADDQ.B #<data>,<ea>                             |-|012346|-|UUUUU|*****|D M+-WXZ  |0101_qqq_000_mmm_rrr
  1348:             //INC.B <ea>                                      |A|012346|-|UUUUU|*****|D M+-WXZ  |0101_001_000_mmm_rrr [ADDQ.B #1,<ea>]
  1349:           case 0b0101_000_000:
  1350:           case 0b0101_001_000:
  1351:           case 0b0101_010_000:
  1352:           case 0b0101_011_000:
  1353:           case 0b0101_100_000:
  1354:           case 0b0101_101_000:
  1355:           case 0b0101_110_000:
  1356:           case 0b0101_111_000:
  1357:             irpAddqByte ();
  1358:             break irpSwitch;
  1359: 
  1360:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1361:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1362:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1363:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1364:             //ADDQ.W #<data>,<ea>                             |-|012346|-|UUUUU|*****|D M+-WXZ  |0101_qqq_001_mmm_rrr
  1365:             //ADDQ.W #<data>,Ar                               |-|012346|-|-----|-----| A        |0101_qqq_001_001_rrr
  1366:             //INC.W <ea>                                      |A|012346|-|UUUUU|*****|D M+-WXZ  |0101_001_001_mmm_rrr [ADDQ.W #1,<ea>]
  1367:             //INC.W Ar                                        |A|012346|-|-----|-----| A        |0101_001_001_001_rrr [ADDQ.W #1,Ar]
  1368:           case 0b0101_000_001:
  1369:           case 0b0101_001_001:
  1370:           case 0b0101_010_001:
  1371:           case 0b0101_011_001:
  1372:           case 0b0101_100_001:
  1373:           case 0b0101_101_001:
  1374:           case 0b0101_110_001:
  1375:           case 0b0101_111_001:
  1376:             irpAddqWord ();
  1377:             break irpSwitch;
  1378: 
  1379:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1380:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1381:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1382:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1383:             //ADDQ.L #<data>,<ea>                             |-|012346|-|UUUUU|*****|D M+-WXZ  |0101_qqq_010_mmm_rrr
  1384:             //ADDQ.L #<data>,Ar                               |-|012346|-|-----|-----| A        |0101_qqq_010_001_rrr
  1385:             //INC.L <ea>                                      |A|012346|-|UUUUU|*****|D M+-WXZ  |0101_001_010_mmm_rrr [ADDQ.L #1,<ea>]
  1386:             //INC.L Ar                                        |A|012346|-|-----|-----| A        |0101_001_010_001_rrr [ADDQ.L #1,Ar]
  1387:           case 0b0101_000_010:
  1388:           case 0b0101_001_010:
  1389:           case 0b0101_010_010:
  1390:           case 0b0101_011_010:
  1391:           case 0b0101_100_010:
  1392:           case 0b0101_101_010:
  1393:           case 0b0101_110_010:
  1394:           case 0b0101_111_010:
  1395:             irpAddqLong ();
  1396:             break irpSwitch;
  1397: 
  1398:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1399:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1400:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1401:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1402:             //ST.B <ea>                                       |-|012346|-|-----|-----|D M+-WXZ  |0101_000_011_mmm_rrr
  1403:             //SNF.B <ea>                                      |A|012346|-|-----|-----|D M+-WXZ  |0101_000_011_mmm_rrr [ST.B <ea>]
  1404:             //DBT.W Dr,<label>                                |-|012346|-|-----|-----|          |0101_000_011_001_rrr-{offset}
  1405:             //DBNF.W Dr,<label>                               |A|012346|-|-----|-----|          |0101_000_011_001_rrr-{offset}        [DBT.W Dr,<label>]
  1406:             //TRAPT.W #<data>                                 |-|--2346|-|-----|-----|          |0101_000_011_111_010-{data}
  1407:             //TPNF.W #<data>                                  |A|--2346|-|-----|-----|          |0101_000_011_111_010-{data}  [TRAPT.W #<data>]
  1408:             //TPT.W #<data>                                   |A|--2346|-|-----|-----|          |0101_000_011_111_010-{data}  [TRAPT.W #<data>]
  1409:             //TRAPNF.W #<data>                                |A|--2346|-|-----|-----|          |0101_000_011_111_010-{data}  [TRAPT.W #<data>]
  1410:             //TRAPT.L #<data>                                 |-|--2346|-|-----|-----|          |0101_000_011_111_011-{data}
  1411:             //TPNF.L #<data>                                  |A|--2346|-|-----|-----|          |0101_000_011_111_011-{data}  [TRAPT.L #<data>]
  1412:             //TPT.L #<data>                                   |A|--2346|-|-----|-----|          |0101_000_011_111_011-{data}  [TRAPT.L #<data>]
  1413:             //TRAPNF.L #<data>                                |A|--2346|-|-----|-----|          |0101_000_011_111_011-{data}  [TRAPT.L #<data>]
  1414:             //TRAPT                                           |-|--2346|-|-----|-----|          |0101_000_011_111_100
  1415:             //TPNF                                            |A|--2346|-|-----|-----|          |0101_000_011_111_100 [TRAPT]
  1416:             //TPT                                             |A|--2346|-|-----|-----|          |0101_000_011_111_100 [TRAPT]
  1417:             //TRAPNF                                          |A|--2346|-|-----|-----|          |0101_000_011_111_100 [TRAPT]
  1418:           case 0b0101_000_011:
  1419:             irpSt ();
  1420:             break irpSwitch;
  1421: 
  1422:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1423:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1424:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1425:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1426:             //SUBQ.B #<data>,<ea>                             |-|012346|-|UUUUU|*****|D M+-WXZ  |0101_qqq_100_mmm_rrr
  1427:             //DEC.B <ea>                                      |A|012346|-|UUUUU|*****|D M+-WXZ  |0101_001_100_mmm_rrr [SUBQ.B #1,<ea>]
  1428:           case 0b0101_000_100:
  1429:           case 0b0101_001_100:
  1430:           case 0b0101_010_100:
  1431:           case 0b0101_011_100:
  1432:           case 0b0101_100_100:
  1433:           case 0b0101_101_100:
  1434:           case 0b0101_110_100:
  1435:           case 0b0101_111_100:
  1436:             irpSubqByte ();
  1437:             break irpSwitch;
  1438: 
  1439:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1440:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1441:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1442:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1443:             //SUBQ.W #<data>,<ea>                             |-|012346|-|UUUUU|*****|D M+-WXZ  |0101_qqq_101_mmm_rrr
  1444:             //SUBQ.W #<data>,Ar                               |-|012346|-|-----|-----| A        |0101_qqq_101_001_rrr
  1445:             //DEC.W <ea>                                      |A|012346|-|UUUUU|*****|D M+-WXZ  |0101_001_101_mmm_rrr [SUBQ.W #1,<ea>]
  1446:             //DEC.W Ar                                        |A|012346|-|-----|-----| A        |0101_001_101_001_rrr [SUBQ.W #1,Ar]
  1447:           case 0b0101_000_101:
  1448:           case 0b0101_001_101:
  1449:           case 0b0101_010_101:
  1450:           case 0b0101_011_101:
  1451:           case 0b0101_100_101:
  1452:           case 0b0101_101_101:
  1453:           case 0b0101_110_101:
  1454:           case 0b0101_111_101:
  1455:             irpSubqWord ();
  1456:             break irpSwitch;
  1457: 
  1458:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1459:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1460:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1461:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1462:             //SUBQ.L #<data>,<ea>                             |-|012346|-|UUUUU|*****|D M+-WXZ  |0101_qqq_110_mmm_rrr
  1463:             //SUBQ.L #<data>,Ar                               |-|012346|-|-----|-----| A        |0101_qqq_110_001_rrr
  1464:             //DEC.L <ea>                                      |A|012346|-|UUUUU|*****|D M+-WXZ  |0101_001_110_mmm_rrr [SUBQ.L #1,<ea>]
  1465:             //DEC.L Ar                                        |A|012346|-|-----|-----| A        |0101_001_110_001_rrr [SUBQ.L #1,Ar]
  1466:           case 0b0101_000_110:
  1467:           case 0b0101_001_110:
  1468:           case 0b0101_010_110:
  1469:           case 0b0101_011_110:
  1470:           case 0b0101_100_110:
  1471:           case 0b0101_101_110:
  1472:           case 0b0101_110_110:
  1473:           case 0b0101_111_110:
  1474:             irpSubqLong ();
  1475:             break irpSwitch;
  1476: 
  1477:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1478:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1479:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1480:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1481:             //SF.B <ea>                                       |-|012346|-|-----|-----|D M+-WXZ  |0101_000_111_mmm_rrr
  1482:             //SNT.B <ea>                                      |A|012346|-|-----|-----|D M+-WXZ  |0101_000_111_mmm_rrr [SF.B <ea>]
  1483:             //DBF.W Dr,<label>                                |-|012346|-|-----|-----|          |0101_000_111_001_rrr-{offset}
  1484:             //DBNT.W Dr,<label>                               |A|012346|-|-----|-----|          |0101_000_111_001_rrr-{offset}        [DBF.W Dr,<label>]
  1485:             //DBRA.W Dr,<label>                               |A|012346|-|-----|-----|          |0101_000_111_001_rrr-{offset}        [DBF.W Dr,<label>]
  1486:             //TRAPF.W #<data>                                 |-|--2346|-|-----|-----|          |0101_000_111_111_010-{data}
  1487:             //TPF.W #<data>                                   |A|--2346|-|-----|-----|          |0101_000_111_111_010-{data}  [TRAPF.W #<data>]
  1488:             //TPNT.W #<data>                                  |A|--2346|-|-----|-----|          |0101_000_111_111_010-{data}  [TRAPF.W #<data>]
  1489:             //TRAPNT.W #<data>                                |A|--2346|-|-----|-----|          |0101_000_111_111_010-{data}  [TRAPF.W #<data>]
  1490:             //TRAPF.L #<data>                                 |-|--2346|-|-----|-----|          |0101_000_111_111_011-{data}
  1491:             //TPF.L #<data>                                   |A|--2346|-|-----|-----|          |0101_000_111_111_011-{data}  [TRAPF.L #<data>]
  1492:             //TPNT.L #<data>                                  |A|--2346|-|-----|-----|          |0101_000_111_111_011-{data}  [TRAPF.L #<data>]
  1493:             //TRAPNT.L #<data>                                |A|--2346|-|-----|-----|          |0101_000_111_111_011-{data}  [TRAPF.L #<data>]
  1494:             //TRAPF                                           |-|--2346|-|-----|-----|          |0101_000_111_111_100
  1495:             //TPF                                             |A|--2346|-|-----|-----|          |0101_000_111_111_100 [TRAPF]
  1496:             //TPNT                                            |A|--2346|-|-----|-----|          |0101_000_111_111_100 [TRAPF]
  1497:             //TRAPNT                                          |A|--2346|-|-----|-----|          |0101_000_111_111_100 [TRAPF]
  1498:           case 0b0101_000_111:
  1499:             irpSf ();
  1500:             break irpSwitch;
  1501: 
  1502:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1503:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1504:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1505:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1506:             //SHI.B <ea>                                      |-|012346|-|--*-*|-----|D M+-WXZ  |0101_001_011_mmm_rrr
  1507:             //SNLS.B <ea>                                     |A|012346|-|--*-*|-----|D M+-WXZ  |0101_001_011_mmm_rrr [SHI.B <ea>]
  1508:             //DBHI.W Dr,<label>                               |-|012346|-|--*-*|-----|          |0101_001_011_001_rrr-{offset}
  1509:             //DBNLS.W Dr,<label>                              |A|012346|-|--*-*|-----|          |0101_001_011_001_rrr-{offset}        [DBHI.W Dr,<label>]
  1510:             //TRAPHI.W #<data>                                |-|--2346|-|--*-*|-----|          |0101_001_011_111_010-{data}
  1511:             //TPHI.W #<data>                                  |A|--2346|-|--*-*|-----|          |0101_001_011_111_010-{data}  [TRAPHI.W #<data>]
  1512:             //TPNLS.W #<data>                                 |A|--2346|-|--*-*|-----|          |0101_001_011_111_010-{data}  [TRAPHI.W #<data>]
  1513:             //TRAPNLS.W #<data>                               |A|--2346|-|--*-*|-----|          |0101_001_011_111_010-{data}  [TRAPHI.W #<data>]
  1514:             //TRAPHI.L #<data>                                |-|--2346|-|--*-*|-----|          |0101_001_011_111_011-{data}
  1515:             //TPHI.L #<data>                                  |A|--2346|-|--*-*|-----|          |0101_001_011_111_011-{data}  [TRAPHI.L #<data>]
  1516:             //TPNLS.L #<data>                                 |A|--2346|-|--*-*|-----|          |0101_001_011_111_011-{data}  [TRAPHI.L #<data>]
  1517:             //TRAPNLS.L #<data>                               |A|--2346|-|--*-*|-----|          |0101_001_011_111_011-{data}  [TRAPHI.L #<data>]
  1518:             //TRAPHI                                          |-|--2346|-|--*-*|-----|          |0101_001_011_111_100
  1519:             //TPHI                                            |A|--2346|-|--*-*|-----|          |0101_001_011_111_100 [TRAPHI]
  1520:             //TPNLS                                           |A|--2346|-|--*-*|-----|          |0101_001_011_111_100 [TRAPHI]
  1521:             //TRAPNLS                                         |A|--2346|-|--*-*|-----|          |0101_001_011_111_100 [TRAPHI]
  1522:           case 0b0101_001_011:
  1523:             irpShi ();
  1524:             break irpSwitch;
  1525: 
  1526:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1527:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1528:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1529:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1530:             //SLS.B <ea>                                      |-|012346|-|--*-*|-----|D M+-WXZ  |0101_001_111_mmm_rrr
  1531:             //SNHI.B <ea>                                     |A|012346|-|--*-*|-----|D M+-WXZ  |0101_001_111_mmm_rrr [SLS.B <ea>]
  1532:             //DBLS.W Dr,<label>                               |-|012346|-|--*-*|-----|          |0101_001_111_001_rrr-{offset}
  1533:             //DBNHI.W Dr,<label>                              |A|012346|-|--*-*|-----|          |0101_001_111_001_rrr-{offset}        [DBLS.W Dr,<label>]
  1534:             //TRAPLS.W #<data>                                |-|--2346|-|--*-*|-----|          |0101_001_111_111_010-{data}
  1535:             //TPLS.W #<data>                                  |A|--2346|-|--*-*|-----|          |0101_001_111_111_010-{data}
  1536:             //TPNHI.W #<data>                                 |A|--2346|-|--*-*|-----|          |0101_001_111_111_010-{data}  [TRAPLS.W #<data>]
  1537:             //TRAPNHI.W #<data>                               |A|--2346|-|--*-*|-----|          |0101_001_111_111_010-{data}  [TRAPLS.W #<data>]
  1538:             //TRAPLS.L #<data>                                |-|--2346|-|--*-*|-----|          |0101_001_111_111_011-{data}
  1539:             //TPLS.L #<data>                                  |A|--2346|-|--*-*|-----|          |0101_001_111_111_011-{data}
  1540:             //TPNHI.L #<data>                                 |A|--2346|-|--*-*|-----|          |0101_001_111_111_011-{data}  [TRAPLS.L #<data>]
  1541:             //TRAPNHI.L #<data>                               |A|--2346|-|--*-*|-----|          |0101_001_111_111_011-{data}  [TRAPLS.L #<data>]
  1542:             //TRAPLS                                          |-|--2346|-|--*-*|-----|          |0101_001_111_111_100
  1543:             //TPLS                                            |A|--2346|-|--*-*|-----|          |0101_001_111_111_100 [TRAPLS]
  1544:             //TPNHI                                           |A|--2346|-|--*-*|-----|          |0101_001_111_111_100 [TRAPLS]
  1545:             //TRAPNHI                                         |A|--2346|-|--*-*|-----|          |0101_001_111_111_100 [TRAPLS]
  1546:           case 0b0101_001_111:
  1547:             irpSls ();
  1548:             break irpSwitch;
  1549: 
  1550:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1551:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1552:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1553:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1554:             //SCC.B <ea>                                      |-|012346|-|----*|-----|D M+-WXZ  |0101_010_011_mmm_rrr
  1555:             //SHS.B <ea>                                      |A|012346|-|----*|-----|D M+-WXZ  |0101_010_011_mmm_rrr [SCC.B <ea>]
  1556:             //SNCS.B <ea>                                     |A|012346|-|----*|-----|D M+-WXZ  |0101_010_011_mmm_rrr [SCC.B <ea>]
  1557:             //SNLO.B <ea>                                     |A|012346|-|----*|-----|D M+-WXZ  |0101_010_011_mmm_rrr [SCC.B <ea>]
  1558:             //DBCC.W Dr,<label>                               |-|012346|-|----*|-----|          |0101_010_011_001_rrr-{offset}
  1559:             //DBHS.W Dr,<label>                               |A|012346|-|----*|-----|          |0101_010_011_001_rrr-{offset}        [DBCC.W Dr,<label>]
  1560:             //DBNCS.W Dr,<label>                              |A|012346|-|----*|-----|          |0101_010_011_001_rrr-{offset}        [DBCC.W Dr,<label>]
  1561:             //DBNLO.W Dr,<label>                              |A|012346|-|----*|-----|          |0101_010_011_001_rrr-{offset}        [DBCC.W Dr,<label>]
  1562:             //TRAPCC.W #<data>                                |-|--2346|-|----*|-----|          |0101_010_011_111_010-{data}
  1563:             //TPCC.W #<data>                                  |A|--2346|-|----*|-----|          |0101_010_011_111_010-{data}  [TRAPCC.W #<data>]
  1564:             //TPHS.W #<data>                                  |A|--2346|-|----*|-----|          |0101_010_011_111_010-{data}  [TRAPCC.W #<data>]
  1565:             //TPNCS.W #<data>                                 |A|--2346|-|----*|-----|          |0101_010_011_111_010-{data}  [TRAPCC.W #<data>]
  1566:             //TPNLO.W #<data>                                 |A|--2346|-|----*|-----|          |0101_010_011_111_010-{data}  [TRAPCC.W #<data>]
  1567:             //TRAPHS.W #<data>                                |A|--2346|-|----*|-----|          |0101_010_011_111_010-{data}  [TRAPCC.W #<data>]
  1568:             //TRAPNCS.W #<data>                               |A|--2346|-|----*|-----|          |0101_010_011_111_010-{data}  [TRAPCC.W #<data>]
  1569:             //TRAPNLO.W #<data>                               |A|--2346|-|----*|-----|          |0101_010_011_111_010-{data}  [TRAPCC.W #<data>]
  1570:             //TRAPCC.L #<data>                                |-|--2346|-|----*|-----|          |0101_010_011_111_011-{data}
  1571:             //TPCC.L #<data>                                  |A|--2346|-|----*|-----|          |0101_010_011_111_011-{data}  [TRAPCC.L #<data>]
  1572:             //TPHS.L #<data>                                  |A|--2346|-|----*|-----|          |0101_010_011_111_011-{data}  [TRAPCC.L #<data>]
  1573:             //TPNCS.L #<data>                                 |A|--2346|-|----*|-----|          |0101_010_011_111_011-{data}  [TRAPCC.L #<data>]
  1574:             //TPNLO.L #<data>                                 |A|--2346|-|----*|-----|          |0101_010_011_111_011-{data}  [TRAPCC.L #<data>]
  1575:             //TRAPHS.L #<data>                                |A|--2346|-|----*|-----|          |0101_010_011_111_011-{data}  [TRAPCC.L #<data>]
  1576:             //TRAPNCS.L #<data>                               |A|--2346|-|----*|-----|          |0101_010_011_111_011-{data}  [TRAPCC.L #<data>]
  1577:             //TRAPNLO.L #<data>                               |A|--2346|-|----*|-----|          |0101_010_011_111_011-{data}  [TRAPCC.L #<data>]
  1578:             //TRAPCC                                          |-|--2346|-|----*|-----|          |0101_010_011_111_100
  1579:             //TPCC                                            |A|--2346|-|----*|-----|          |0101_010_011_111_100 [TRAPCC]
  1580:             //TPHS                                            |A|--2346|-|----*|-----|          |0101_010_011_111_100 [TRAPCC]
  1581:             //TPNCS                                           |A|--2346|-|----*|-----|          |0101_010_011_111_100 [TRAPCC]
  1582:             //TPNLO                                           |A|--2346|-|----*|-----|          |0101_010_011_111_100 [TRAPCC]
  1583:             //TRAPHS                                          |A|--2346|-|----*|-----|          |0101_010_011_111_100 [TRAPCC]
  1584:             //TRAPNCS                                         |A|--2346|-|----*|-----|          |0101_010_011_111_100 [TRAPCC]
  1585:             //TRAPNLO                                         |A|--2346|-|----*|-----|          |0101_010_011_111_100 [TRAPCC]
  1586:           case 0b0101_010_011:
  1587:             irpShs ();
  1588:             break irpSwitch;
  1589: 
  1590:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1591:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1592:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1593:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1594:             //SCS.B <ea>                                      |-|012346|-|----*|-----|D M+-WXZ  |0101_010_111_mmm_rrr
  1595:             //SLO.B <ea>                                      |A|012346|-|----*|-----|D M+-WXZ  |0101_010_111_mmm_rrr [SCS.B <ea>]
  1596:             //SNCC.B <ea>                                     |A|012346|-|----*|-----|D M+-WXZ  |0101_010_111_mmm_rrr [SCS.B <ea>]
  1597:             //SNHS.B <ea>                                     |A|012346|-|----*|-----|D M+-WXZ  |0101_010_111_mmm_rrr [SCS.B <ea>]
  1598:             //DBCS.W Dr,<label>                               |-|012346|-|----*|-----|          |0101_010_111_001_rrr-{offset}
  1599:             //DBLO.W Dr,<label>                               |A|012346|-|----*|-----|          |0101_010_111_001_rrr-{offset}        [DBCS.W Dr,<label>]
  1600:             //DBNCC.W Dr,<label>                              |A|012346|-|----*|-----|          |0101_010_111_001_rrr-{offset}        [DBCS.W Dr,<label>]
  1601:             //DBNHS.W Dr,<label>                              |A|012346|-|----*|-----|          |0101_010_111_001_rrr-{offset}        [DBCS.W Dr,<label>]
  1602:             //TRAPCS.W #<data>                                |-|--2346|-|----*|-----|          |0101_010_111_111_010-{data}
  1603:             //TPCS.W #<data>                                  |A|--2346|-|----*|-----|          |0101_010_111_111_010-{data}  [TRAPCS.W #<data>]
  1604:             //TPLO.W #<data>                                  |A|--2346|-|----*|-----|          |0101_010_111_111_010-{data}  [TRAPCS.W #<data>]
  1605:             //TPNCC.W #<data>                                 |A|--2346|-|----*|-----|          |0101_010_111_111_010-{data}  [TRAPCS.W #<data>]
  1606:             //TPNHS.W #<data>                                 |A|--2346|-|----*|-----|          |0101_010_111_111_010-{data}  [TRAPCS.W #<data>]
  1607:             //TRAPLO.W #<data>                                |A|--2346|-|----*|-----|          |0101_010_111_111_010-{data}  [TRAPCS.W #<data>]
  1608:             //TRAPNCC.W #<data>                               |A|--2346|-|----*|-----|          |0101_010_111_111_010-{data}  [TRAPCS.W #<data>]
  1609:             //TRAPNHS.W #<data>                               |A|--2346|-|----*|-----|          |0101_010_111_111_010-{data}  [TRAPCS.W #<data>]
  1610:             //TRAPCS.L #<data>                                |-|--2346|-|----*|-----|          |0101_010_111_111_011-{data}
  1611:             //TPCS.L #<data>                                  |A|--2346|-|----*|-----|          |0101_010_111_111_011-{data}  [TRAPCS.L #<data>]
  1612:             //TPLO.L #<data>                                  |A|--2346|-|----*|-----|          |0101_010_111_111_011-{data}  [TRAPCS.L #<data>]
  1613:             //TPNCC.L #<data>                                 |A|--2346|-|----*|-----|          |0101_010_111_111_011-{data}  [TRAPCS.L #<data>]
  1614:             //TPNHS.L #<data>                                 |A|--2346|-|----*|-----|          |0101_010_111_111_011-{data}  [TRAPCS.L #<data>]
  1615:             //TRAPLO.L #<data>                                |A|--2346|-|----*|-----|          |0101_010_111_111_011-{data}  [TRAPCS.L #<data>]
  1616:             //TRAPNCC.L #<data>                               |A|--2346|-|----*|-----|          |0101_010_111_111_011-{data}  [TRAPCS.L #<data>]
  1617:             //TRAPNHS.L #<data>                               |A|--2346|-|----*|-----|          |0101_010_111_111_011-{data}  [TRAPCS.L #<data>]
  1618:             //TRAPCS                                          |-|--2346|-|----*|-----|          |0101_010_111_111_100
  1619:             //TPCS                                            |A|--2346|-|----*|-----|          |0101_010_111_111_100 [TRAPCS]
  1620:             //TPLO                                            |A|--2346|-|----*|-----|          |0101_010_111_111_100 [TRAPCS]
  1621:             //TPNCC                                           |A|--2346|-|----*|-----|          |0101_010_111_111_100 [TRAPCS]
  1622:             //TPNHS                                           |A|--2346|-|----*|-----|          |0101_010_111_111_100 [TRAPCS]
  1623:             //TRAPLO                                          |A|--2346|-|----*|-----|          |0101_010_111_111_100 [TRAPCS]
  1624:             //TRAPNCC                                         |A|--2346|-|----*|-----|          |0101_010_111_111_100 [TRAPCS]
  1625:             //TRAPNHS                                         |A|--2346|-|----*|-----|          |0101_010_111_111_100 [TRAPCS]
  1626:           case 0b0101_010_111:
  1627:             irpSlo ();
  1628:             break irpSwitch;
  1629: 
  1630:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1631:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1632:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1633:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1634:             //SNE.B <ea>                                      |-|012346|-|--*--|-----|D M+-WXZ  |0101_011_011_mmm_rrr
  1635:             //SNEQ.B <ea>                                     |A|012346|-|--*--|-----|D M+-WXZ  |0101_011_011_mmm_rrr [SNE.B <ea>]
  1636:             //SNZ.B <ea>                                      |A|012346|-|--*--|-----|D M+-WXZ  |0101_011_011_mmm_rrr [SNE.B <ea>]
  1637:             //SNZE.B <ea>                                     |A|012346|-|--*--|-----|D M+-WXZ  |0101_011_011_mmm_rrr [SNE.B <ea>]
  1638:             //DBNE.W Dr,<label>                               |-|012346|-|--*--|-----|          |0101_011_011_001_rrr-{offset}
  1639:             //DBNEQ.W Dr,<label>                              |A|012346|-|--*--|-----|          |0101_011_011_001_rrr-{offset}        [DBNE.W Dr,<label>]
  1640:             //DBNZ.W Dr,<label>                               |A|012346|-|--*--|-----|          |0101_011_011_001_rrr-{offset}        [DBNE.W Dr,<label>]
  1641:             //DBNZE.W Dr,<label>                              |A|012346|-|--*--|-----|          |0101_011_011_001_rrr-{offset}        [DBNE.W Dr,<label>]
  1642:             //TRAPNE.W #<data>                                |-|--2346|-|--*--|-----|          |0101_011_011_111_010-{data}
  1643:             //TPNE.W #<data>                                  |A|--2346|-|--*--|-----|          |0101_011_011_111_010-{data}  [TRAPNE.W #<data>]
  1644:             //TPNEQ.W #<data>                                 |A|--2346|-|--*--|-----|          |0101_011_011_111_010-{data}  [TRAPNE.W #<data>]
  1645:             //TPNZ.W #<data>                                  |A|--2346|-|--*--|-----|          |0101_011_011_111_010-{data}  [TRAPNE.W #<data>]
  1646:             //TPNZE.W #<data>                                 |A|--2346|-|--*--|-----|          |0101_011_011_111_010-{data}  [TRAPNE.W #<data>]
  1647:             //TRAPNEQ.W #<data>                               |A|--2346|-|--*--|-----|          |0101_011_011_111_010-{data}  [TRAPNE.W #<data>]
  1648:             //TRAPNZ.W #<data>                                |A|--2346|-|--*--|-----|          |0101_011_011_111_010-{data}  [TRAPNE.W #<data>]
  1649:             //TRAPNZE.W #<data>                               |A|--2346|-|--*--|-----|          |0101_011_011_111_010-{data}  [TRAPNE.W #<data>]
  1650:             //TRAPNE.L #<data>                                |-|--2346|-|--*--|-----|          |0101_011_011_111_011-{data}
  1651:             //TPNE.L #<data>                                  |A|--2346|-|--*--|-----|          |0101_011_011_111_011-{data}  [TRAPNE.L #<data>]
  1652:             //TPNEQ.L #<data>                                 |A|--2346|-|--*--|-----|          |0101_011_011_111_011-{data}  [TRAPNE.L #<data>]
  1653:             //TPNZ.L #<data>                                  |A|--2346|-|--*--|-----|          |0101_011_011_111_011-{data}  [TRAPNE.L #<data>]
  1654:             //TPNZE.L #<data>                                 |A|--2346|-|--*--|-----|          |0101_011_011_111_011-{data}  [TRAPNE.L #<data>]
  1655:             //TRAPNEQ.L #<data>                               |A|--2346|-|--*--|-----|          |0101_011_011_111_011-{data}  [TRAPNE.L #<data>]
  1656:             //TRAPNZ.L #<data>                                |A|--2346|-|--*--|-----|          |0101_011_011_111_011-{data}  [TRAPNE.L #<data>]
  1657:             //TRAPNZE.L #<data>                               |A|--2346|-|--*--|-----|          |0101_011_011_111_011-{data}  [TRAPNE.L #<data>]
  1658:             //TRAPNE                                          |-|--2346|-|--*--|-----|          |0101_011_011_111_100
  1659:             //TPNE                                            |A|--2346|-|--*--|-----|          |0101_011_011_111_100 [TRAPNE]
  1660:             //TPNEQ                                           |A|--2346|-|--*--|-----|          |0101_011_011_111_100 [TRAPNE]
  1661:             //TPNZ                                            |A|--2346|-|--*--|-----|          |0101_011_011_111_100 [TRAPNE]
  1662:             //TPNZE                                           |A|--2346|-|--*--|-----|          |0101_011_011_111_100 [TRAPNE]
  1663:             //TRAPNEQ                                         |A|--2346|-|--*--|-----|          |0101_011_011_111_100 [TRAPNE]
  1664:             //TRAPNZ                                          |A|--2346|-|--*--|-----|          |0101_011_011_111_100 [TRAPNE]
  1665:             //TRAPNZE                                         |A|--2346|-|--*--|-----|          |0101_011_011_111_100 [TRAPNE]
  1666:           case 0b0101_011_011:
  1667:             irpSne ();
  1668:             break irpSwitch;
  1669: 
  1670:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1671:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1672:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1673:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1674:             //SEQ.B <ea>                                      |-|012346|-|--*--|-----|D M+-WXZ  |0101_011_111_mmm_rrr
  1675:             //SNNE.B <ea>                                     |A|012346|-|--*--|-----|D M+-WXZ  |0101_011_111_mmm_rrr [SEQ.B <ea>]
  1676:             //SNNZ.B <ea>                                     |A|012346|-|--*--|-----|D M+-WXZ  |0101_011_111_mmm_rrr [SEQ.B <ea>]
  1677:             //SZE.B <ea>                                      |A|012346|-|--*--|-----|D M+-WXZ  |0101_011_111_mmm_rrr [SEQ.B <ea>]
  1678:             //DBEQ.W Dr,<label>                               |-|012346|-|--*--|-----|          |0101_011_111_001_rrr-{offset}
  1679:             //DBNNE.W Dr,<label>                              |A|012346|-|--*--|-----|          |0101_011_111_001_rrr-{offset}        [DBEQ.W Dr,<label>]
  1680:             //DBNNZ.W Dr,<label>                              |A|012346|-|--*--|-----|          |0101_011_111_001_rrr-{offset}        [DBEQ.W Dr,<label>]
  1681:             //DBZE.W Dr,<label>                               |A|012346|-|--*--|-----|          |0101_011_111_001_rrr-{offset}        [DBEQ.W Dr,<label>]
  1682:             //TRAPEQ.W #<data>                                |-|--2346|-|--*--|-----|          |0101_011_111_111_010-{data}
  1683:             //TPEQ.W #<data>                                  |A|--2346|-|--*--|-----|          |0101_011_111_111_010-{data}  [TRAPEQ.W #<data>]
  1684:             //TPNNE.W #<data>                                 |A|--2346|-|--*--|-----|          |0101_011_111_111_010-{data}  [TRAPEQ.W #<data>]
  1685:             //TPNNZ.W #<data>                                 |A|--2346|-|--*--|-----|          |0101_011_111_111_010-{data}  [TRAPEQ.W #<data>]
  1686:             //TPZE.W #<data>                                  |A|--2346|-|--*--|-----|          |0101_011_111_111_010-{data}  [TRAPEQ.W #<data>]
  1687:             //TRAPNNE.W #<data>                               |A|--2346|-|--*--|-----|          |0101_011_111_111_010-{data}  [TRAPEQ.W #<data>]
  1688:             //TRAPNNZ.W #<data>                               |A|--2346|-|--*--|-----|          |0101_011_111_111_010-{data}  [TRAPEQ.W #<data>]
  1689:             //TRAPZE.W #<data>                                |A|--2346|-|--*--|-----|          |0101_011_111_111_010-{data}  [TRAPEQ.W #<data>]
  1690:             //TRAPEQ.L #<data>                                |-|--2346|-|--*--|-----|          |0101_011_111_111_011-{data}
  1691:             //TPEQ.L #<data>                                  |A|--2346|-|--*--|-----|          |0101_011_111_111_011-{data}  [TRAPEQ.L #<data>]
  1692:             //TPNNE.L #<data>                                 |A|--2346|-|--*--|-----|          |0101_011_111_111_011-{data}  [TRAPEQ.L #<data>]
  1693:             //TPNNZ.L #<data>                                 |A|--2346|-|--*--|-----|          |0101_011_111_111_011-{data}  [TRAPEQ.L #<data>]
  1694:             //TPZE.L #<data>                                  |A|--2346|-|--*--|-----|          |0101_011_111_111_011-{data}  [TRAPEQ.L #<data>]
  1695:             //TRAPNNE.L #<data>                               |A|--2346|-|--*--|-----|          |0101_011_111_111_011-{data}  [TRAPEQ.L #<data>]
  1696:             //TRAPNNZ.L #<data>                               |A|--2346|-|--*--|-----|          |0101_011_111_111_011-{data}  [TRAPEQ.L #<data>]
  1697:             //TRAPZE.L #<data>                                |A|--2346|-|--*--|-----|          |0101_011_111_111_011-{data}  [TRAPEQ.L #<data>]
  1698:             //TRAPEQ                                          |-|--2346|-|--*--|-----|          |0101_011_111_111_100
  1699:             //TPEQ                                            |A|--2346|-|--*--|-----|          |0101_011_111_111_100 [TRAPEQ]
  1700:             //TPNNE                                           |A|--2346|-|--*--|-----|          |0101_011_111_111_100 [TRAPEQ]
  1701:             //TPNNZ                                           |A|--2346|-|--*--|-----|          |0101_011_111_111_100 [TRAPEQ]
  1702:             //TPZE                                            |A|--2346|-|--*--|-----|          |0101_011_111_111_100 [TRAPEQ]
  1703:             //TRAPNNE                                         |A|--2346|-|--*--|-----|          |0101_011_111_111_100 [TRAPEQ]
  1704:             //TRAPNNZ                                         |A|--2346|-|--*--|-----|          |0101_011_111_111_100 [TRAPEQ]
  1705:             //TRAPZE                                          |A|--2346|-|--*--|-----|          |0101_011_111_111_100 [TRAPEQ]
  1706:           case 0b0101_011_111:
  1707:             irpSeq ();
  1708:             break irpSwitch;
  1709: 
  1710:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1711:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1712:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1713:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1714:             //SVC.B <ea>                                      |-|012346|-|---*-|-----|D M+-WXZ  |0101_100_011_mmm_rrr
  1715:             //SNVS.B <ea>                                     |A|012346|-|---*-|-----|D M+-WXZ  |0101_100_011_mmm_rrr [SVC.B <ea>]
  1716:             //DBVC.W Dr,<label>                               |-|012346|-|---*-|-----|          |0101_100_011_001_rrr-{offset}
  1717:             //DBNVS.W Dr,<label>                              |A|012346|-|---*-|-----|          |0101_100_011_001_rrr-{offset}        [DBVC.W Dr,<label>]
  1718:             //TRAPVC.W #<data>                                |-|--2346|-|---*-|-----|          |0101_100_011_111_010-{data}
  1719:             //TPNVS.W #<data>                                 |A|--2346|-|---*-|-----|          |0101_100_011_111_010-{data}  [TRAPVC.W #<data>]
  1720:             //TPVC.W #<data>                                  |A|--2346|-|---*-|-----|          |0101_100_011_111_010-{data}  [TRAPVC.W #<data>]
  1721:             //TRAPNVS.W #<data>                               |A|--2346|-|---*-|-----|          |0101_100_011_111_010-{data}  [TRAPVC.W #<data>]
  1722:             //TRAPVC.L #<data>                                |-|--2346|-|---*-|-----|          |0101_100_011_111_011-{data}
  1723:             //TPNVS.L #<data>                                 |A|--2346|-|---*-|-----|          |0101_100_011_111_011-{data}  [TRAPVC.L #<data>]
  1724:             //TPVC.L #<data>                                  |A|--2346|-|---*-|-----|          |0101_100_011_111_011-{data}  [TRAPVC.L #<data>]
  1725:             //TRAPNVS.L #<data>                               |A|--2346|-|---*-|-----|          |0101_100_011_111_011-{data}  [TRAPVC.L #<data>]
  1726:             //TRAPVC                                          |-|--2346|-|---*-|-----|          |0101_100_011_111_100
  1727:             //TPNVS                                           |A|--2346|-|---*-|-----|          |0101_100_011_111_100 [TRAPVC]
  1728:             //TPVC                                            |A|--2346|-|---*-|-----|          |0101_100_011_111_100 [TRAPVC]
  1729:             //TRAPNVS                                         |A|--2346|-|---*-|-----|          |0101_100_011_111_100 [TRAPVC]
  1730:           case 0b0101_100_011:
  1731:             irpSvc ();
  1732:             break irpSwitch;
  1733: 
  1734:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1735:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1736:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1737:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1738:             //SVS.B <ea>                                      |-|012346|-|---*-|-----|D M+-WXZ  |0101_100_111_mmm_rrr
  1739:             //SNVC.B <ea>                                     |A|012346|-|---*-|-----|D M+-WXZ  |0101_100_111_mmm_rrr [SVS.B <ea>]
  1740:             //DBVS.W Dr,<label>                               |-|012346|-|---*-|-----|          |0101_100_111_001_rrr-{offset}
  1741:             //DBNVC.W Dr,<label>                              |A|012346|-|---*-|-----|          |0101_100_111_001_rrr-{offset}        [DBVS.W Dr,<label>]
  1742:             //TRAPVS.W #<data>                                |-|--2346|-|---*-|-----|          |0101_100_111_111_010-{data}
  1743:             //TPNVC.W #<data>                                 |A|--2346|-|---*-|-----|          |0101_100_111_111_010-{data}  [TRAPVS.W #<data>]
  1744:             //TPVS.W #<data>                                  |A|--2346|-|---*-|-----|          |0101_100_111_111_010-{data}  [TRAPVS.W #<data>]
  1745:             //TRAPNVC.W #<data>                               |A|--2346|-|---*-|-----|          |0101_100_111_111_010-{data}  [TRAPVS.W #<data>]
  1746:             //TRAPVS.L #<data>                                |-|--2346|-|---*-|-----|          |0101_100_111_111_011-{data}
  1747:             //TPNVC.L #<data>                                 |A|--2346|-|---*-|-----|          |0101_100_111_111_011-{data}  [TRAPVS.L #<data>]
  1748:             //TPVS.L #<data>                                  |A|--2346|-|---*-|-----|          |0101_100_111_111_011-{data}  [TRAPVS.L #<data>]
  1749:             //TRAPNVC.L #<data>                               |A|--2346|-|---*-|-----|          |0101_100_111_111_011-{data}  [TRAPVS.L #<data>]
  1750:             //TRAPVS                                          |-|--2346|-|---*-|-----|          |0101_100_111_111_100
  1751:             //TPNVC                                           |A|--2346|-|---*-|-----|          |0101_100_111_111_100 [TRAPVS]
  1752:             //TPVS                                            |A|--2346|-|---*-|-----|          |0101_100_111_111_100 [TRAPVS]
  1753:             //TRAPNVC                                         |A|--2346|-|---*-|-----|          |0101_100_111_111_100 [TRAPVS]
  1754:           case 0b0101_100_111:
  1755:             irpSvs ();
  1756:             break irpSwitch;
  1757: 
  1758:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1759:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1760:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1761:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1762:             //SPL.B <ea>                                      |-|012346|-|-*---|-----|D M+-WXZ  |0101_101_011_mmm_rrr
  1763:             //SNMI.B <ea>                                     |A|012346|-|-*---|-----|D M+-WXZ  |0101_101_011_mmm_rrr [SPL.B <ea>]
  1764:             //DBPL.W Dr,<label>                               |-|012346|-|-*---|-----|          |0101_101_011_001_rrr-{offset}
  1765:             //DBNMI.W Dr,<label>                              |A|012346|-|-*---|-----|          |0101_101_011_001_rrr-{offset}        [DBPL.W Dr,<label>]
  1766:             //TRAPPL.W #<data>                                |-|--2346|-|-*---|-----|          |0101_101_011_111_010-{data}
  1767:             //TPNMI.W #<data>                                 |A|--2346|-|-*---|-----|          |0101_101_011_111_010-{data}  [TRAPPL.W #<data>]
  1768:             //TPPL.W #<data>                                  |A|--2346|-|-*---|-----|          |0101_101_011_111_010-{data}  [TRAPPL.W #<data>]
  1769:             //TRAPNMI.W #<data>                               |A|--2346|-|-*---|-----|          |0101_101_011_111_010-{data}  [TRAPPL.W #<data>]
  1770:             //TRAPPL.L #<data>                                |-|--2346|-|-*---|-----|          |0101_101_011_111_011-{data}
  1771:             //TPNMI.L #<data>                                 |A|--2346|-|-*---|-----|          |0101_101_011_111_011-{data}  [TRAPPL.L #<data>]
  1772:             //TPPL.L #<data>                                  |A|--2346|-|-*---|-----|          |0101_101_011_111_011-{data}  [TRAPPL.L #<data>]
  1773:             //TRAPNMI.L #<data>                               |A|--2346|-|-*---|-----|          |0101_101_011_111_011-{data}  [TRAPPL.L #<data>]
  1774:             //TRAPPL                                          |-|--2346|-|-*---|-----|          |0101_101_011_111_100
  1775:             //TPNMI                                           |A|--2346|-|-*---|-----|          |0101_101_011_111_100 [TRAPPL]
  1776:             //TPPL                                            |A|--2346|-|-*---|-----|          |0101_101_011_111_100 [TRAPPL]
  1777:             //TRAPNMI                                         |A|--2346|-|-*---|-----|          |0101_101_011_111_100 [TRAPPL]
  1778:           case 0b0101_101_011:
  1779:             irpSpl ();
  1780:             break irpSwitch;
  1781: 
  1782:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1783:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1784:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1785:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1786:             //SMI.B <ea>                                      |-|012346|-|-*---|-----|D M+-WXZ  |0101_101_111_mmm_rrr
  1787:             //SNPL.B <ea>                                     |A|012346|-|-*---|-----|D M+-WXZ  |0101_101_111_mmm_rrr [SMI.B <ea>]
  1788:             //DBMI.W Dr,<label>                               |-|012346|-|-*---|-----|          |0101_101_111_001_rrr-{offset}
  1789:             //DBNPL.W Dr,<label>                              |A|012346|-|-*---|-----|          |0101_101_111_001_rrr-{offset}        [DBMI.W Dr,<label>]
  1790:             //TRAPMI.W #<data>                                |-|--2346|-|-*---|-----|          |0101_101_111_111_010-{data}
  1791:             //TPMI.W #<data>                                  |A|--2346|-|-*---|-----|          |0101_101_111_111_010-{data}  [TRAPMI.W #<data>]
  1792:             //TPNPL.W #<data>                                 |A|--2346|-|-*---|-----|          |0101_101_111_111_010-{data}  [TRAPMI.W #<data>]
  1793:             //TRAPNPL.W #<data>                               |A|--2346|-|-*---|-----|          |0101_101_111_111_010-{data}  [TRAPMI.W #<data>]
  1794:             //TRAPMI.L #<data>                                |-|--2346|-|-*---|-----|          |0101_101_111_111_011-{data}
  1795:             //TPMI.L #<data>                                  |A|--2346|-|-*---|-----|          |0101_101_111_111_011-{data}  [TRAPMI.L #<data>]
  1796:             //TPNPL.L #<data>                                 |A|--2346|-|-*---|-----|          |0101_101_111_111_011-{data}  [TRAPMI.L #<data>]
  1797:             //TRAPNPL.L #<data>                               |A|--2346|-|-*---|-----|          |0101_101_111_111_011-{data}  [TRAPMI.L #<data>]
  1798:             //TRAPMI                                          |-|--2346|-|-*---|-----|          |0101_101_111_111_100
  1799:             //TPMI                                            |A|--2346|-|-*---|-----|          |0101_101_111_111_100 [TRAPMI]
  1800:             //TPNPL                                           |A|--2346|-|-*---|-----|          |0101_101_111_111_100 [TRAPMI]
  1801:             //TRAPNPL                                         |A|--2346|-|-*---|-----|          |0101_101_111_111_100 [TRAPMI]
  1802:           case 0b0101_101_111:
  1803:             irpSmi ();
  1804:             break irpSwitch;
  1805: 
  1806:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1807:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1808:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1809:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1810:             //SGE.B <ea>                                      |-|012346|-|-*-*-|-----|D M+-WXZ  |0101_110_011_mmm_rrr
  1811:             //SNLT.B <ea>                                     |A|012346|-|-*-*-|-----|D M+-WXZ  |0101_110_011_mmm_rrr [SGE.B <ea>]
  1812:             //DBGE.W Dr,<label>                               |-|012346|-|-*-*-|-----|          |0101_110_011_001_rrr-{offset}
  1813:             //DBNLT.W Dr,<label>                              |A|012346|-|-*-*-|-----|          |0101_110_011_001_rrr-{offset}        [DBGE.W Dr,<label>]
  1814:             //TRAPGE.W #<data>                                |-|--2346|-|-*-*-|-----|          |0101_110_011_111_010-{data}
  1815:             //TPGE.W #<data>                                  |A|--2346|-|-*-*-|-----|          |0101_110_011_111_010-{data}  [TRAPGE.W #<data>]
  1816:             //TPNLT.W #<data>                                 |A|--2346|-|-*-*-|-----|          |0101_110_011_111_010-{data}  [TRAPGE.W #<data>]
  1817:             //TRAPNLT.W #<data>                               |A|--2346|-|-*-*-|-----|          |0101_110_011_111_010-{data}  [TRAPGE.W #<data>]
  1818:             //TRAPGE.L #<data>                                |-|--2346|-|-*-*-|-----|          |0101_110_011_111_011-{data}
  1819:             //TPGE.L #<data>                                  |A|--2346|-|-*-*-|-----|          |0101_110_011_111_011-{data}  [TRAPGE.L #<data>]
  1820:             //TPNLT.L #<data>                                 |A|--2346|-|-*-*-|-----|          |0101_110_011_111_011-{data}  [TRAPGE.L #<data>]
  1821:             //TRAPNLT.L #<data>                               |A|--2346|-|-*-*-|-----|          |0101_110_011_111_011-{data}  [TRAPGE.L #<data>]
  1822:             //TRAPGE                                          |-|--2346|-|-*-*-|-----|          |0101_110_011_111_100
  1823:             //TPGE                                            |A|--2346|-|-*-*-|-----|          |0101_110_011_111_100 [TRAPGE]
  1824:             //TPNLT                                           |A|--2346|-|-*-*-|-----|          |0101_110_011_111_100 [TRAPGE]
  1825:             //TRAPNLT                                         |A|--2346|-|-*-*-|-----|          |0101_110_011_111_100 [TRAPGE]
  1826:           case 0b0101_110_011:
  1827:             irpSge ();
  1828:             break irpSwitch;
  1829: 
  1830:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1831:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1832:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1833:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1834:             //SLT.B <ea>                                      |-|012346|-|-*-*-|-----|D M+-WXZ  |0101_110_111_mmm_rrr
  1835:             //SNGE.B <ea>                                     |A|012346|-|-*-*-|-----|D M+-WXZ  |0101_110_111_mmm_rrr [SLT.B <ea>]
  1836:             //DBLT.W Dr,<label>                               |-|012346|-|-*-*-|-----|          |0101_110_111_001_rrr-{offset}
  1837:             //DBNGE.W Dr,<label>                              |A|012346|-|-*-*-|-----|          |0101_110_111_001_rrr-{offset}        [DBLT.W Dr,<label>]
  1838:             //TRAPLT.W #<data>                                |-|--2346|-|-*-*-|-----|          |0101_110_111_111_010-{data}
  1839:             //TPLT.W #<data>                                  |A|--2346|-|-*-*-|-----|          |0101_110_111_111_010-{data}  [TRAPLT.W #<data>]
  1840:             //TPNGE.W #<data>                                 |A|--2346|-|-*-*-|-----|          |0101_110_111_111_010-{data}  [TRAPLT.W #<data>]
  1841:             //TRAPNGE.W #<data>                               |A|--2346|-|-*-*-|-----|          |0101_110_111_111_010-{data}  [TRAPLT.W #<data>]
  1842:             //TRAPLT.L #<data>                                |-|--2346|-|-*-*-|-----|          |0101_110_111_111_011-{data}
  1843:             //TPLT.L #<data>                                  |A|--2346|-|-*-*-|-----|          |0101_110_111_111_011-{data}  [TRAPLT.L #<data>]
  1844:             //TPNGE.L #<data>                                 |A|--2346|-|-*-*-|-----|          |0101_110_111_111_011-{data}  [TRAPLT.L #<data>]
  1845:             //TRAPNGE.L #<data>                               |A|--2346|-|-*-*-|-----|          |0101_110_111_111_011-{data}  [TRAPLT.L #<data>]
  1846:             //TRAPLT                                          |-|--2346|-|-*-*-|-----|          |0101_110_111_111_100
  1847:             //TPLT                                            |A|--2346|-|-*-*-|-----|          |0101_110_111_111_100 [TRAPLT]
  1848:             //TPNGE                                           |A|--2346|-|-*-*-|-----|          |0101_110_111_111_100 [TRAPLT]
  1849:             //TRAPNGE                                         |A|--2346|-|-*-*-|-----|          |0101_110_111_111_100 [TRAPLT]
  1850:           case 0b0101_110_111:
  1851:             irpSlt ();
  1852:             break irpSwitch;
  1853: 
  1854:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1855:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1856:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1857:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1858:             //SGT.B <ea>                                      |-|012346|-|-***-|-----|D M+-WXZ  |0101_111_011_mmm_rrr
  1859:             //SNLE.B <ea>                                     |A|012346|-|-***-|-----|D M+-WXZ  |0101_111_011_mmm_rrr [SGT.B <ea>]
  1860:             //DBGT.W Dr,<label>                               |-|012346|-|-***-|-----|          |0101_111_011_001_rrr-{offset}
  1861:             //DBNLE.W Dr,<label>                              |A|012346|-|-***-|-----|          |0101_111_011_001_rrr-{offset}        [DBGT.W Dr,<label>]
  1862:             //TRAPGT.W #<data>                                |-|--2346|-|-***-|-----|          |0101_111_011_111_010-{data}
  1863:             //TPGT.W #<data>                                  |A|--2346|-|-***-|-----|          |0101_111_011_111_010-{data}  [TRAPGT.W #<data>]
  1864:             //TPNLE.W #<data>                                 |A|--2346|-|-***-|-----|          |0101_111_011_111_010-{data}  [TRAPGT.W #<data>]
  1865:             //TRAPNLE.W #<data>                               |A|--2346|-|-***-|-----|          |0101_111_011_111_010-{data}  [TRAPGT.W #<data>]
  1866:             //TRAPGT.L #<data>                                |-|--2346|-|-***-|-----|          |0101_111_011_111_011-{data}
  1867:             //TPGT.L #<data>                                  |A|--2346|-|-***-|-----|          |0101_111_011_111_011-{data}  [TRAPGT.L #<data>]
  1868:             //TPNLE.L #<data>                                 |A|--2346|-|-***-|-----|          |0101_111_011_111_011-{data}  [TRAPGT.L #<data>]
  1869:             //TRAPNLE.L #<data>                               |A|--2346|-|-***-|-----|          |0101_111_011_111_011-{data}  [TRAPGT.L #<data>]
  1870:             //TRAPGT                                          |-|--2346|-|-***-|-----|          |0101_111_011_111_100
  1871:             //TPGT                                            |A|--2346|-|-***-|-----|          |0101_111_011_111_100 [TRAPGT]
  1872:             //TPNLE                                           |A|--2346|-|-***-|-----|          |0101_111_011_111_100 [TRAPGT]
  1873:             //TRAPNLE                                         |A|--2346|-|-***-|-----|          |0101_111_011_111_100 [TRAPGT]
  1874:           case 0b0101_111_011:
  1875:             irpSgt ();
  1876:             break irpSwitch;
  1877: 
  1878:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1879:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1880:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1881:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1882:             //SLE.B <ea>                                      |-|012346|-|-***-|-----|D M+-WXZ  |0101_111_111_mmm_rrr
  1883:             //SNGT.B <ea>                                     |A|012346|-|-***-|-----|D M+-WXZ  |0101_111_111_mmm_rrr [SLE.B <ea>]
  1884:             //DBLE.W Dr,<label>                               |-|012346|-|-***-|-----|          |0101_111_111_001_rrr-{offset}
  1885:             //DBNGT.W Dr,<label>                              |A|012346|-|-***-|-----|          |0101_111_111_001_rrr-{offset}        [DBLE.W Dr,<label>]
  1886:             //TRAPLE.W #<data>                                |-|--2346|-|-***-|-----|          |0101_111_111_111_010-{data}
  1887:             //TPLE.W #<data>                                  |A|--2346|-|-***-|-----|          |0101_111_111_111_010-{data}  [TRAPLE.W #<data>]
  1888:             //TPNGT.W #<data>                                 |A|--2346|-|-***-|-----|          |0101_111_111_111_010-{data}  [TRAPLE.W #<data>]
  1889:             //TRAPNGT.W #<data>                               |A|--2346|-|-***-|-----|          |0101_111_111_111_010-{data}  [TRAPLE.W #<data>]
  1890:             //TRAPLE.L #<data>                                |-|--2346|-|-***-|-----|          |0101_111_111_111_011-{data}
  1891:             //TPLE.L #<data>                                  |A|--2346|-|-***-|-----|          |0101_111_111_111_011-{data}  [TRAPLE.L #<data>]
  1892:             //TPNGT.L #<data>                                 |A|--2346|-|-***-|-----|          |0101_111_111_111_011-{data}  [TRAPLE.L #<data>]
  1893:             //TRAPNGT.L #<data>                               |A|--2346|-|-***-|-----|          |0101_111_111_111_011-{data}  [TRAPLE.L #<data>]
  1894:             //TRAPLE                                          |-|--2346|-|-***-|-----|          |0101_111_111_111_100
  1895:             //TPLE                                            |A|--2346|-|-***-|-----|          |0101_111_111_111_100 [TRAPLE]
  1896:             //TPNGT                                           |A|--2346|-|-***-|-----|          |0101_111_111_111_100 [TRAPLE]
  1897:             //TRAPNGT                                         |A|--2346|-|-***-|-----|          |0101_111_111_111_100 [TRAPLE]
  1898:           case 0b0101_111_111:
  1899:             irpSle ();
  1900:             break irpSwitch;
  1901: 
  1902:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1903:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1904:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1905:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1906:             //BRA.W <label>                                   |-|012346|-|-----|-----|          |0110_000_000_000_000-{offset}
  1907:             //JBRA.W <label>                                  |A|012346|-|-----|-----|          |0110_000_000_000_000-{offset}        [BRA.W <label>]
  1908:             //BRA.S <label>                                   |-|012346|-|-----|-----|          |0110_000_000_sss_sss (s is not equal to 0)
  1909:             //JBRA.S <label>                                  |A|012346|-|-----|-----|          |0110_000_000_sss_sss (s is not equal to 0)   [BRA.S <label>]
  1910:           case 0b0110_000_000:
  1911:             irpBrasw ();
  1912:             break irpSwitch;
  1913: 
  1914:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1915:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1916:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1917:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1918:             //BRA.S <label>                                   |-|012346|-|-----|-----|          |0110_000_001_sss_sss
  1919:             //JBRA.S <label>                                  |A|012346|-|-----|-----|          |0110_000_001_sss_sss [BRA.S <label>]
  1920:           case 0b0110_000_001:
  1921:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1922:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1923:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1924:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1925:             //BRA.S <label>                                   |-|012346|-|-----|-----|          |0110_000_010_sss_sss
  1926:             //JBRA.S <label>                                  |A|012346|-|-----|-----|          |0110_000_010_sss_sss [BRA.S <label>]
  1927:           case 0b0110_000_010:
  1928:             irpBras ();
  1929:             break irpSwitch;
  1930: 
  1931:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1932:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1933:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1934:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1935:             //BRA.S <label>                                   |-|--2346|-|-----|-----|          |0110_000_011_sss_sss (s is not equal to 63)
  1936:             //JBRA.S <label>                                  |A|--2346|-|-----|-----|          |0110_000_011_sss_sss (s is not equal to 63)  [BRA.S <label>]
  1937:             //BRA.L <label>                                   |-|--2346|-|-----|-----|          |0110_000_011_111_111-{offset}
  1938:           case 0b0110_000_011:
  1939:             irpBrasl ();
  1940:             break irpSwitch;
  1941: 
  1942:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1943:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1944:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1945:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1946:             //BSR.W <label>                                   |-|012346|-|-----|-----|          |0110_000_100_000_000-{offset}
  1947:             //JBSR.W <label>                                  |A|012346|-|-----|-----|          |0110_000_100_000_000-{offset}        [BSR.W <label>]
  1948:             //BSR.S <label>                                   |-|012346|-|-----|-----|          |0110_000_100_sss_sss (s is not equal to 0)
  1949:             //JBSR.S <label>                                  |A|012346|-|-----|-----|          |0110_000_100_sss_sss (s is not equal to 0)   [BSR.S <label>]
  1950:           case 0b0110_000_100:
  1951:             irpBsrsw ();
  1952:             break irpSwitch;
  1953: 
  1954:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1955:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1956:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1957:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1958:             //BSR.S <label>                                   |-|012346|-|-----|-----|          |0110_000_101_sss_sss
  1959:             //JBSR.S <label>                                  |A|012346|-|-----|-----|          |0110_000_101_sss_sss [BSR.S <label>]
  1960:           case 0b0110_000_101:
  1961:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1962:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1963:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1964:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1965:             //BSR.S <label>                                   |-|012346|-|-----|-----|          |0110_000_110_sss_sss
  1966:             //JBSR.S <label>                                  |A|012346|-|-----|-----|          |0110_000_110_sss_sss [BSR.S <label>]
  1967:           case 0b0110_000_110:
  1968:             irpBsrs ();
  1969:             break irpSwitch;
  1970: 
  1971:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1972:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1973:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1974:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1975:             //BSR.S <label>                                   |-|--2346|-|-----|-----|          |0110_000_111_sss_sss (s is not equal to 63)
  1976:             //JBSR.S <label>                                  |A|--2346|-|-----|-----|          |0110_000_111_sss_sss (s is not equal to 63)  [BSR.S <label>]
  1977:             //BSR.L <label>                                   |-|--2346|-|-----|-----|          |0110_000_111_111_111-{offset}
  1978:           case 0b0110_000_111:
  1979:             irpBsrsl ();
  1980:             break irpSwitch;
  1981: 
  1982:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1983:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1984:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1985:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1986:             //BHI.W <label>                                   |-|012346|-|--*-*|-----|          |0110_001_000_000_000-{offset}
  1987:             //BNLS.W <label>                                  |A|012346|-|--*-*|-----|          |0110_001_000_000_000-{offset}        [BHI.W <label>]
  1988:             //JBHI.W <label>                                  |A|012346|-|--*-*|-----|          |0110_001_000_000_000-{offset}        [BHI.W <label>]
  1989:             //JBNLS.W <label>                                 |A|012346|-|--*-*|-----|          |0110_001_000_000_000-{offset}        [BHI.W <label>]
  1990:             //BHI.S <label>                                   |-|012346|-|--*-*|-----|          |0110_001_000_sss_sss (s is not equal to 0)
  1991:             //BNLS.S <label>                                  |A|012346|-|--*-*|-----|          |0110_001_000_sss_sss (s is not equal to 0)   [BHI.S <label>]
  1992:             //JBHI.S <label>                                  |A|012346|-|--*-*|-----|          |0110_001_000_sss_sss (s is not equal to 0)   [BHI.S <label>]
  1993:             //JBNLS.S <label>                                 |A|012346|-|--*-*|-----|          |0110_001_000_sss_sss (s is not equal to 0)   [BHI.S <label>]
  1994:             //JBLS.L <label>                                  |A|012346|-|--*-*|-----|          |0110_001_000_000_110-0100111011111001-{address}      [BHI.S (*)+8;JMP <label>]
  1995:             //JBNHI.L <label>                                 |A|012346|-|--*-*|-----|          |0110_001_000_000_110-0100111011111001-{address}      [BHI.S (*)+8;JMP <label>]
  1996:           case 0b0110_001_000:
  1997:             irpBhisw ();
  1998:             break irpSwitch;
  1999: 
  2000:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2001:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2002:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2003:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2004:             //BHI.S <label>                                   |-|012346|-|--*-*|-----|          |0110_001_001_sss_sss
  2005:             //BNLS.S <label>                                  |A|012346|-|--*-*|-----|          |0110_001_001_sss_sss [BHI.S <label>]
  2006:             //JBHI.S <label>                                  |A|012346|-|--*-*|-----|          |0110_001_001_sss_sss [BHI.S <label>]
  2007:             //JBNLS.S <label>                                 |A|012346|-|--*-*|-----|          |0110_001_001_sss_sss [BHI.S <label>]
  2008:           case 0b0110_001_001:
  2009:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2010:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2011:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2012:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2013:             //BHI.S <label>                                   |-|012346|-|--*-*|-----|          |0110_001_010_sss_sss
  2014:             //BNLS.S <label>                                  |A|012346|-|--*-*|-----|          |0110_001_010_sss_sss [BHI.S <label>]
  2015:             //JBHI.S <label>                                  |A|012346|-|--*-*|-----|          |0110_001_010_sss_sss [BHI.S <label>]
  2016:             //JBNLS.S <label>                                 |A|012346|-|--*-*|-----|          |0110_001_010_sss_sss [BHI.S <label>]
  2017:           case 0b0110_001_010:
  2018:             irpBhis ();
  2019:             break irpSwitch;
  2020: 
  2021:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2022:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2023:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2024:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2025:             //BHI.S <label>                                   |-|--2346|-|--*-*|-----|          |0110_001_011_sss_sss (s is not equal to 63)
  2026:             //BNLS.S <label>                                  |A|--2346|-|--*-*|-----|          |0110_001_011_sss_sss (s is not equal to 63)  [BHI.S <label>]
  2027:             //JBHI.S <label>                                  |A|--2346|-|--*-*|-----|          |0110_001_011_sss_sss (s is not equal to 63)  [BHI.S <label>]
  2028:             //JBNLS.S <label>                                 |A|--2346|-|--*-*|-----|          |0110_001_011_sss_sss (s is not equal to 63)  [BHI.S <label>]
  2029:             //BHI.L <label>                                   |-|--2346|-|--*-*|-----|          |0110_001_011_111_111-{offset}
  2030:             //BNLS.L <label>                                  |A|--2346|-|--*-*|-----|          |0110_001_011_111_111-{offset}        [BHI.L <label>]
  2031:           case 0b0110_001_011:
  2032:             irpBhisl ();
  2033:             break irpSwitch;
  2034: 
  2035:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2036:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2037:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2038:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2039:             //BLS.W <label>                                   |-|012346|-|--*-*|-----|          |0110_001_100_000_000-{offset}
  2040:             //BNHI.W <label>                                  |A|012346|-|--*-*|-----|          |0110_001_100_000_000-{offset}        [BLS.W <label>]
  2041:             //JBLS.W <label>                                  |A|012346|-|--*-*|-----|          |0110_001_100_000_000-{offset}        [BLS.W <label>]
  2042:             //JBNHI.W <label>                                 |A|012346|-|--*-*|-----|          |0110_001_100_000_000-{offset}        [BLS.W <label>]
  2043:             //BLS.S <label>                                   |-|012346|-|--*-*|-----|          |0110_001_100_sss_sss (s is not equal to 0)
  2044:             //BNHI.S <label>                                  |A|012346|-|--*-*|-----|          |0110_001_100_sss_sss (s is not equal to 0)   [BLS.S <label>]
  2045:             //JBLS.S <label>                                  |A|012346|-|--*-*|-----|          |0110_001_100_sss_sss (s is not equal to 0)   [BLS.S <label>]
  2046:             //JBNHI.S <label>                                 |A|012346|-|--*-*|-----|          |0110_001_100_sss_sss (s is not equal to 0)   [BLS.S <label>]
  2047:             //JBHI.L <label>                                  |A|012346|-|--*-*|-----|          |0110_001_100_000_110-0100111011111001-{address}      [BLS.S (*)+8;JMP <label>]
  2048:             //JBNLS.L <label>                                 |A|012346|-|--*-*|-----|          |0110_001_100_000_110-0100111011111001-{address}      [BLS.S (*)+8;JMP <label>]
  2049:           case 0b0110_001_100:
  2050:             irpBlssw ();
  2051:             break irpSwitch;
  2052: 
  2053:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2054:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2055:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2056:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2057:             //BLS.S <label>                                   |-|012346|-|--*-*|-----|          |0110_001_101_sss_sss
  2058:             //BNHI.S <label>                                  |A|012346|-|--*-*|-----|          |0110_001_101_sss_sss [BLS.S <label>]
  2059:             //JBLS.S <label>                                  |A|012346|-|--*-*|-----|          |0110_001_101_sss_sss [BLS.S <label>]
  2060:             //JBNHI.S <label>                                 |A|012346|-|--*-*|-----|          |0110_001_101_sss_sss [BLS.S <label>]
  2061:           case 0b0110_001_101:
  2062:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2063:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2064:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2065:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2066:             //BLS.S <label>                                   |-|012346|-|--*-*|-----|          |0110_001_110_sss_sss
  2067:             //BNHI.S <label>                                  |A|012346|-|--*-*|-----|          |0110_001_110_sss_sss [BLS.S <label>]
  2068:             //JBLS.S <label>                                  |A|012346|-|--*-*|-----|          |0110_001_110_sss_sss [BLS.S <label>]
  2069:             //JBNHI.S <label>                                 |A|012346|-|--*-*|-----|          |0110_001_110_sss_sss [BLS.S <label>]
  2070:           case 0b0110_001_110:
  2071:             irpBlss ();
  2072:             break irpSwitch;
  2073: 
  2074:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2075:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2076:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2077:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2078:             //BLS.S <label>                                   |-|--2346|-|--*-*|-----|          |0110_001_111_sss_sss (s is not equal to 63)
  2079:             //BNHI.S <label>                                  |A|--2346|-|--*-*|-----|          |0110_001_111_sss_sss (s is not equal to 63)  [BLS.S <label>]
  2080:             //JBLS.S <label>                                  |A|--2346|-|--*-*|-----|          |0110_001_111_sss_sss (s is not equal to 63)  [BLS.S <label>]
  2081:             //JBNHI.S <label>                                 |A|--2346|-|--*-*|-----|          |0110_001_111_sss_sss (s is not equal to 63)  [BLS.S <label>]
  2082:             //BLS.L <label>                                   |-|--2346|-|--*-*|-----|          |0110_001_111_111_111-{offset}
  2083:             //BNHI.L <label>                                  |A|--2346|-|--*-*|-----|          |0110_001_111_111_111-{offset}        [BLS.L <label>]
  2084:           case 0b0110_001_111:
  2085:             irpBlssl ();
  2086:             break irpSwitch;
  2087: 
  2088:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2089:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2090:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2091:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2092:             //BCC.W <label>                                   |-|012346|-|----*|-----|          |0110_010_000_000_000-{offset}
  2093:             //BHS.W <label>                                   |A|012346|-|----*|-----|          |0110_010_000_000_000-{offset}        [BCC.W <label>]
  2094:             //BNCS.W <label>                                  |A|012346|-|----*|-----|          |0110_010_000_000_000-{offset}        [BCC.W <label>]
  2095:             //BNLO.W <label>                                  |A|012346|-|----*|-----|          |0110_010_000_000_000-{offset}        [BCC.W <label>]
  2096:             //JBCC.W <label>                                  |A|012346|-|----*|-----|          |0110_010_000_000_000-{offset}        [BCC.W <label>]
  2097:             //JBHS.W <label>                                  |A|012346|-|----*|-----|          |0110_010_000_000_000-{offset}        [BCC.W <label>]
  2098:             //JBNCS.W <label>                                 |A|012346|-|----*|-----|          |0110_010_000_000_000-{offset}        [BCC.W <label>]
  2099:             //JBNLO.W <label>                                 |A|012346|-|----*|-----|          |0110_010_000_000_000-{offset}        [BCC.W <label>]
  2100:             //BCC.S <label>                                   |-|012346|-|----*|-----|          |0110_010_000_sss_sss (s is not equal to 0)
  2101:             //BHS.S <label>                                   |A|012346|-|----*|-----|          |0110_010_000_sss_sss (s is not equal to 0)   [BCC.S <label>]
  2102:             //BNCS.S <label>                                  |A|012346|-|----*|-----|          |0110_010_000_sss_sss (s is not equal to 0)   [BCC.S <label>]
  2103:             //BNLO.S <label>                                  |A|012346|-|----*|-----|          |0110_010_000_sss_sss (s is not equal to 0)   [BCC.S <label>]
  2104:             //JBCC.S <label>                                  |A|012346|-|----*|-----|          |0110_010_000_sss_sss (s is not equal to 0)   [BCC.S <label>]
  2105:             //JBHS.S <label>                                  |A|012346|-|----*|-----|          |0110_010_000_sss_sss (s is not equal to 0)   [BCC.S <label>]
  2106:             //JBNCS.S <label>                                 |A|012346|-|----*|-----|          |0110_010_000_sss_sss (s is not equal to 0)   [BCC.S <label>]
  2107:             //JBNLO.S <label>                                 |A|012346|-|----*|-----|          |0110_010_000_sss_sss (s is not equal to 0)   [BCC.S <label>]
  2108:             //JBCS.L <label>                                  |A|012346|-|----*|-----|          |0110_010_000_000_110-0100111011111001-{address}      [BCC.S (*)+8;JMP <label>]
  2109:             //JBLO.L <label>                                  |A|012346|-|----*|-----|          |0110_010_000_000_110-0100111011111001-{address}      [BCC.S (*)+8;JMP <label>]
  2110:             //JBNCC.L <label>                                 |A|012346|-|----*|-----|          |0110_010_000_000_110-0100111011111001-{address}      [BCC.S (*)+8;JMP <label>]
  2111:             //JBNHS.L <label>                                 |A|012346|-|----*|-----|          |0110_010_000_000_110-0100111011111001-{address}      [BCC.S (*)+8;JMP <label>]
  2112:           case 0b0110_010_000:
  2113:             irpBhssw ();
  2114:             break irpSwitch;
  2115: 
  2116:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2117:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2118:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2119:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2120:             //BCC.S <label>                                   |-|012346|-|----*|-----|          |0110_010_001_sss_sss
  2121:             //BHS.S <label>                                   |A|012346|-|----*|-----|          |0110_010_001_sss_sss [BCC.S <label>]
  2122:             //BNCS.S <label>                                  |A|012346|-|----*|-----|          |0110_010_001_sss_sss [BCC.S <label>]
  2123:             //BNLO.S <label>                                  |A|012346|-|----*|-----|          |0110_010_001_sss_sss [BCC.S <label>]
  2124:             //JBCC.S <label>                                  |A|012346|-|----*|-----|          |0110_010_001_sss_sss [BCC.S <label>]
  2125:             //JBHS.S <label>                                  |A|012346|-|----*|-----|          |0110_010_001_sss_sss [BCC.S <label>]
  2126:             //JBNCS.S <label>                                 |A|012346|-|----*|-----|          |0110_010_001_sss_sss [BCC.S <label>]
  2127:             //JBNLO.S <label>                                 |A|012346|-|----*|-----|          |0110_010_001_sss_sss [BCC.S <label>]
  2128:           case 0b0110_010_001:
  2129:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2130:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2131:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2132:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2133:             //BCC.S <label>                                   |-|012346|-|----*|-----|          |0110_010_010_sss_sss
  2134:             //BHS.S <label>                                   |A|012346|-|----*|-----|          |0110_010_010_sss_sss [BCC.S <label>]
  2135:             //BNCS.S <label>                                  |A|012346|-|----*|-----|          |0110_010_010_sss_sss [BCC.S <label>]
  2136:             //BNLO.S <label>                                  |A|012346|-|----*|-----|          |0110_010_010_sss_sss [BCC.S <label>]
  2137:             //JBCC.S <label>                                  |A|012346|-|----*|-----|          |0110_010_010_sss_sss [BCC.S <label>]
  2138:             //JBHS.S <label>                                  |A|012346|-|----*|-----|          |0110_010_010_sss_sss [BCC.S <label>]
  2139:             //JBNCS.S <label>                                 |A|012346|-|----*|-----|          |0110_010_010_sss_sss [BCC.S <label>]
  2140:             //JBNLO.S <label>                                 |A|012346|-|----*|-----|          |0110_010_010_sss_sss [BCC.S <label>]
  2141:           case 0b0110_010_010:
  2142:             irpBhss ();
  2143:             break irpSwitch;
  2144: 
  2145:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2146:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2147:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2148:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2149:             //BCC.S <label>                                   |-|--2346|-|----*|-----|          |0110_010_011_sss_sss (s is not equal to 63)
  2150:             //BHS.S <label>                                   |A|--2346|-|----*|-----|          |0110_010_011_sss_sss (s is not equal to 63)  [BCC.S <label>]
  2151:             //BNCS.S <label>                                  |A|--2346|-|----*|-----|          |0110_010_011_sss_sss (s is not equal to 63)  [BCC.S <label>]
  2152:             //BNLO.S <label>                                  |A|--2346|-|----*|-----|          |0110_010_011_sss_sss (s is not equal to 63)  [BCC.S <label>]
  2153:             //JBCC.S <label>                                  |A|--2346|-|----*|-----|          |0110_010_011_sss_sss (s is not equal to 63)  [BCC.S <label>]
  2154:             //JBHS.S <label>                                  |A|--2346|-|----*|-----|          |0110_010_011_sss_sss (s is not equal to 63)  [BCC.S <label>]
  2155:             //JBNCS.S <label>                                 |A|--2346|-|----*|-----|          |0110_010_011_sss_sss (s is not equal to 63)  [BCC.S <label>]
  2156:             //JBNLO.S <label>                                 |A|--2346|-|----*|-----|          |0110_010_011_sss_sss (s is not equal to 63)  [BCC.S <label>]
  2157:             //BCC.L <label>                                   |-|--2346|-|----*|-----|          |0110_010_011_111_111-{offset}
  2158:             //BHS.L <label>                                   |A|--2346|-|----*|-----|          |0110_010_011_111_111-{offset}        [BCC.L <label>]
  2159:             //BNCS.L <label>                                  |A|--2346|-|----*|-----|          |0110_010_011_111_111-{offset}        [BCC.L <label>]
  2160:             //BNLO.L <label>                                  |A|--2346|-|----*|-----|          |0110_010_011_111_111-{offset}        [BCC.L <label>]
  2161:           case 0b0110_010_011:
  2162:             irpBhssl ();
  2163:             break irpSwitch;
  2164: 
  2165:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2166:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2167:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2168:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2169:             //BCS.W <label>                                   |-|012346|-|----*|-----|          |0110_010_100_000_000-{offset}
  2170:             //BLO.W <label>                                   |A|012346|-|----*|-----|          |0110_010_100_000_000-{offset}        [BCS.W <label>]
  2171:             //BNCC.W <label>                                  |A|012346|-|----*|-----|          |0110_010_100_000_000-{offset}        [BCS.W <label>]
  2172:             //BNHS.W <label>                                  |A|012346|-|----*|-----|          |0110_010_100_000_000-{offset}        [BCS.W <label>]
  2173:             //JBCS.W <label>                                  |A|012346|-|----*|-----|          |0110_010_100_000_000-{offset}        [BCS.W <label>]
  2174:             //JBLO.W <label>                                  |A|012346|-|----*|-----|          |0110_010_100_000_000-{offset}        [BCS.W <label>]
  2175:             //JBNCC.W <label>                                 |A|012346|-|----*|-----|          |0110_010_100_000_000-{offset}        [BCS.W <label>]
  2176:             //JBNHS.W <label>                                 |A|012346|-|----*|-----|          |0110_010_100_000_000-{offset}        [BCS.W <label>]
  2177:             //BCS.S <label>                                   |-|012346|-|----*|-----|          |0110_010_100_sss_sss (s is not equal to 0)
  2178:             //BLO.S <label>                                   |A|012346|-|----*|-----|          |0110_010_100_sss_sss (s is not equal to 0)   [BCS.S <label>]
  2179:             //BNCC.S <label>                                  |A|012346|-|----*|-----|          |0110_010_100_sss_sss (s is not equal to 0)   [BCS.S <label>]
  2180:             //BNHS.S <label>                                  |A|012346|-|----*|-----|          |0110_010_100_sss_sss (s is not equal to 0)   [BCS.S <label>]
  2181:             //JBCS.S <label>                                  |A|012346|-|----*|-----|          |0110_010_100_sss_sss (s is not equal to 0)   [BCS.S <label>]
  2182:             //JBLO.S <label>                                  |A|012346|-|----*|-----|          |0110_010_100_sss_sss (s is not equal to 0)   [BCS.S <label>]
  2183:             //JBNCC.S <label>                                 |A|012346|-|----*|-----|          |0110_010_100_sss_sss (s is not equal to 0)   [BCS.S <label>]
  2184:             //JBNHS.S <label>                                 |A|012346|-|----*|-----|          |0110_010_100_sss_sss (s is not equal to 0)   [BCS.S <label>]
  2185:             //JBCC.L <label>                                  |A|012346|-|----*|-----|          |0110_010_100_000_110-0100111011111001-{address}      [BCS.S (*)+8;JMP <label>]
  2186:             //JBHS.L <label>                                  |A|012346|-|----*|-----|          |0110_010_100_000_110-0100111011111001-{address}      [BCS.S (*)+8;JMP <label>]
  2187:             //JBNCS.L <label>                                 |A|012346|-|----*|-----|          |0110_010_100_000_110-0100111011111001-{address}      [BCS.S (*)+8;JMP <label>]
  2188:             //JBNLO.L <label>                                 |A|012346|-|----*|-----|          |0110_010_100_000_110-0100111011111001-{address}      [BCS.S (*)+8;JMP <label>]
  2189:           case 0b0110_010_100:
  2190:             irpBlosw ();
  2191:             break irpSwitch;
  2192: 
  2193:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2194:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2195:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2196:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2197:             //BCS.S <label>                                   |-|012346|-|----*|-----|          |0110_010_101_sss_sss
  2198:             //BLO.S <label>                                   |A|012346|-|----*|-----|          |0110_010_101_sss_sss [BCS.S <label>]
  2199:             //BNCC.S <label>                                  |A|012346|-|----*|-----|          |0110_010_101_sss_sss [BCS.S <label>]
  2200:             //BNHS.S <label>                                  |A|012346|-|----*|-----|          |0110_010_101_sss_sss [BCS.S <label>]
  2201:             //JBCS.S <label>                                  |A|012346|-|----*|-----|          |0110_010_101_sss_sss [BCS.S <label>]
  2202:             //JBLO.S <label>                                  |A|012346|-|----*|-----|          |0110_010_101_sss_sss [BCS.S <label>]
  2203:             //JBNCC.S <label>                                 |A|012346|-|----*|-----|          |0110_010_101_sss_sss [BCS.S <label>]
  2204:             //JBNHS.S <label>                                 |A|012346|-|----*|-----|          |0110_010_101_sss_sss [BCS.S <label>]
  2205:           case 0b0110_010_101:
  2206:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2207:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2208:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2209:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2210:             //BCS.S <label>                                   |-|012346|-|----*|-----|          |0110_010_110_sss_sss
  2211:             //BLO.S <label>                                   |A|012346|-|----*|-----|          |0110_010_110_sss_sss [BCS.S <label>]
  2212:             //BNCC.S <label>                                  |A|012346|-|----*|-----|          |0110_010_110_sss_sss [BCS.S <label>]
  2213:             //BNHS.S <label>                                  |A|012346|-|----*|-----|          |0110_010_110_sss_sss [BCS.S <label>]
  2214:             //JBCS.S <label>                                  |A|012346|-|----*|-----|          |0110_010_110_sss_sss [BCS.S <label>]
  2215:             //JBLO.S <label>                                  |A|012346|-|----*|-----|          |0110_010_110_sss_sss [BCS.S <label>]
  2216:             //JBNCC.S <label>                                 |A|012346|-|----*|-----|          |0110_010_110_sss_sss [BCS.S <label>]
  2217:             //JBNHS.S <label>                                 |A|012346|-|----*|-----|          |0110_010_110_sss_sss [BCS.S <label>]
  2218:           case 0b0110_010_110:
  2219:             irpBlos ();
  2220:             break irpSwitch;
  2221: 
  2222:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2223:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2224:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2225:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2226:             //BCS.S <label>                                   |-|--2346|-|----*|-----|          |0110_010_111_sss_sss (s is not equal to 63)
  2227:             //BLO.S <label>                                   |A|--2346|-|----*|-----|          |0110_010_111_sss_sss (s is not equal to 63)  [BCS.S <label>]
  2228:             //BNCC.S <label>                                  |A|--2346|-|----*|-----|          |0110_010_111_sss_sss (s is not equal to 63)  [BCS.S <label>]
  2229:             //BNHS.S <label>                                  |A|--2346|-|----*|-----|          |0110_010_111_sss_sss (s is not equal to 63)  [BCS.S <label>]
  2230:             //JBCS.S <label>                                  |A|--2346|-|----*|-----|          |0110_010_111_sss_sss (s is not equal to 63)  [BCS.S <label>]
  2231:             //JBLO.S <label>                                  |A|--2346|-|----*|-----|          |0110_010_111_sss_sss (s is not equal to 63)  [BCS.S <label>]
  2232:             //JBNCC.S <label>                                 |A|--2346|-|----*|-----|          |0110_010_111_sss_sss (s is not equal to 63)  [BCS.S <label>]
  2233:             //JBNHS.S <label>                                 |A|--2346|-|----*|-----|          |0110_010_111_sss_sss (s is not equal to 63)  [BCS.S <label>]
  2234:             //BCS.L <label>                                   |-|--2346|-|----*|-----|          |0110_010_111_111_111-{offset}
  2235:             //BLO.L <label>                                   |A|--2346|-|----*|-----|          |0110_010_111_111_111-{offset}        [BCS.L <label>]
  2236:             //BNCC.L <label>                                  |A|--2346|-|----*|-----|          |0110_010_111_111_111-{offset}        [BCS.L <label>]
  2237:             //BNHS.L <label>                                  |A|--2346|-|----*|-----|          |0110_010_111_111_111-{offset}        [BCS.L <label>]
  2238:           case 0b0110_010_111:
  2239:             irpBlosl ();
  2240:             break irpSwitch;
  2241: 
  2242:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2243:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2244:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2245:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2246:             //BNE.W <label>                                   |-|012346|-|--*--|-----|          |0110_011_000_000_000-{offset}
  2247:             //BNEQ.W <label>                                  |A|012346|-|--*--|-----|          |0110_011_000_000_000-{offset}        [BNE.W <label>]
  2248:             //BNZ.W <label>                                   |A|012346|-|--*--|-----|          |0110_011_000_000_000-{offset}        [BNE.W <label>]
  2249:             //BNZE.W <label>                                  |A|012346|-|--*--|-----|          |0110_011_000_000_000-{offset}        [BNE.W <label>]
  2250:             //JBNE.W <label>                                  |A|012346|-|--*--|-----|          |0110_011_000_000_000-{offset}        [BNE.W <label>]
  2251:             //JBNEQ.W <label>                                 |A|012346|-|--*--|-----|          |0110_011_000_000_000-{offset}        [BNE.W <label>]
  2252:             //JBNZ.W <label>                                  |A|012346|-|--*--|-----|          |0110_011_000_000_000-{offset}        [BNE.W <label>]
  2253:             //JBNZE.W <label>                                 |A|012346|-|--*--|-----|          |0110_011_000_000_000-{offset}        [BNE.W <label>]
  2254:             //BNE.S <label>                                   |-|012346|-|--*--|-----|          |0110_011_000_sss_sss (s is not equal to 0)
  2255:             //BNEQ.S <label>                                  |A|012346|-|--*--|-----|          |0110_011_000_sss_sss (s is not equal to 0)   [BNE.S <label>]
  2256:             //BNZ.S <label>                                   |A|012346|-|--*--|-----|          |0110_011_000_sss_sss (s is not equal to 0)   [BNE.S <label>]
  2257:             //BNZE.S <label>                                  |A|012346|-|--*--|-----|          |0110_011_000_sss_sss (s is not equal to 0)   [BNE.S <label>]
  2258:             //JBNE.S <label>                                  |A|012346|-|--*--|-----|          |0110_011_000_sss_sss (s is not equal to 0)   [BNE.S <label>]
  2259:             //JBNEQ.S <label>                                 |A|012346|-|--*--|-----|          |0110_011_000_sss_sss (s is not equal to 0)   [BNE.S <label>]
  2260:             //JBNZ.S <label>                                  |A|012346|-|--*--|-----|          |0110_011_000_sss_sss (s is not equal to 0)   [BNE.S <label>]
  2261:             //JBNZE.S <label>                                 |A|012346|-|--*--|-----|          |0110_011_000_sss_sss (s is not equal to 0)   [BNE.S <label>]
  2262:             //JBEQ.L <label>                                  |A|012346|-|--*--|-----|          |0110_011_000_000_110-0100111011111001-{address}      [BNE.S (*)+8;JMP <label>]
  2263:             //JBNEQ.L <label>                                 |A|012346|-|--*--|-----|          |0110_011_000_000_110-0100111011111001-{address}      [BNE.S (*)+8;JMP <label>]
  2264:             //JBNNE.L <label>                                 |A|012346|-|--*--|-----|          |0110_011_000_000_110-0100111011111001-{address}      [BNE.S (*)+8;JMP <label>]
  2265:             //JBNNZ.L <label>                                 |A|012346|-|--*--|-----|          |0110_011_000_000_110-0100111011111001-{address}      [BNE.S (*)+8;JMP <label>]
  2266:             //JBNZ.L <label>                                  |A|012346|-|--*--|-----|          |0110_011_000_000_110-0100111011111001-{address}      [BNE.S (*)+8;JMP <label>]
  2267:             //JBNZE.L <label>                                 |A|012346|-|--*--|-----|          |0110_011_000_000_110-0100111011111001-{address}      [BNE.S (*)+8;JMP <label>]
  2268:             //JBZE.L <label>                                  |A|012346|-|--*--|-----|          |0110_011_000_000_110-0100111011111001-{address}      [BNE.S (*)+8;JMP <label>]
  2269:           case 0b0110_011_000:
  2270:             irpBnesw ();
  2271:             break irpSwitch;
  2272: 
  2273:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2274:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2275:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2276:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2277:             //BNE.S <label>                                   |-|012346|-|--*--|-----|          |0110_011_001_sss_sss
  2278:             //BNEQ.S <label>                                  |A|012346|-|--*--|-----|          |0110_011_001_sss_sss [BNE.S <label>]
  2279:             //BNZ.S <label>                                   |A|012346|-|--*--|-----|          |0110_011_001_sss_sss [BNE.S <label>]
  2280:             //BNZE.S <label>                                  |A|012346|-|--*--|-----|          |0110_011_001_sss_sss [BNE.S <label>]
  2281:             //JBNE.S <label>                                  |A|012346|-|--*--|-----|          |0110_011_001_sss_sss [BNE.S <label>]
  2282:             //JBNEQ.S <label>                                 |A|012346|-|--*--|-----|          |0110_011_001_sss_sss [BNE.S <label>]
  2283:             //JBNZ.S <label>                                  |A|012346|-|--*--|-----|          |0110_011_001_sss_sss [BNE.S <label>]
  2284:             //JBNZE.S <label>                                 |A|012346|-|--*--|-----|          |0110_011_001_sss_sss [BNE.S <label>]
  2285:           case 0b0110_011_001:
  2286:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2287:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2288:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2289:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2290:             //BNE.S <label>                                   |-|012346|-|--*--|-----|          |0110_011_010_sss_sss
  2291:             //BNEQ.S <label>                                  |A|012346|-|--*--|-----|          |0110_011_010_sss_sss [BNE.S <label>]
  2292:             //BNZ.S <label>                                   |A|012346|-|--*--|-----|          |0110_011_010_sss_sss [BNE.S <label>]
  2293:             //BNZE.S <label>                                  |A|012346|-|--*--|-----|          |0110_011_010_sss_sss [BNE.S <label>]
  2294:             //JBNE.S <label>                                  |A|012346|-|--*--|-----|          |0110_011_010_sss_sss [BNE.S <label>]
  2295:             //JBNEQ.S <label>                                 |A|012346|-|--*--|-----|          |0110_011_010_sss_sss [BNE.S <label>]
  2296:             //JBNZ.S <label>                                  |A|012346|-|--*--|-----|          |0110_011_010_sss_sss [BNE.S <label>]
  2297:             //JBNZE.S <label>                                 |A|012346|-|--*--|-----|          |0110_011_010_sss_sss [BNE.S <label>]
  2298:           case 0b0110_011_010:
  2299:             irpBnes ();
  2300:             break irpSwitch;
  2301: 
  2302:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2303:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2304:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2305:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2306:             //BNE.S <label>                                   |-|--2346|-|--*--|-----|          |0110_011_011_sss_sss (s is not equal to 63)
  2307:             //BNEQ.S <label>                                  |A|--2346|-|--*--|-----|          |0110_011_011_sss_sss (s is not equal to 63)  [BNE.S <label>]
  2308:             //BNZ.S <label>                                   |A|--2346|-|--*--|-----|          |0110_011_011_sss_sss (s is not equal to 63)  [BNE.S <label>]
  2309:             //BNZE.S <label>                                  |A|--2346|-|--*--|-----|          |0110_011_011_sss_sss (s is not equal to 63)  [BNE.S <label>]
  2310:             //JBNE.S <label>                                  |A|--2346|-|--*--|-----|          |0110_011_011_sss_sss (s is not equal to 63)  [BNE.S <label>]
  2311:             //JBNEQ.S <label>                                 |A|--2346|-|--*--|-----|          |0110_011_011_sss_sss (s is not equal to 63)  [BNE.S <label>]
  2312:             //JBNZ.S <label>                                  |A|--2346|-|--*--|-----|          |0110_011_011_sss_sss (s is not equal to 63)  [BNE.S <label>]
  2313:             //JBNZE.S <label>                                 |A|--2346|-|--*--|-----|          |0110_011_011_sss_sss (s is not equal to 63)  [BNE.S <label>]
  2314:             //BNE.L <label>                                   |-|--2346|-|--*--|-----|          |0110_011_011_111_111-{offset}
  2315:             //BNEQ.L <label>                                  |A|--2346|-|--*--|-----|          |0110_011_011_111_111-{offset}        [BNE.L <label>]
  2316:             //BNZ.L <label>                                   |A|--2346|-|--*--|-----|          |0110_011_011_111_111-{offset}        [BNE.L <label>]
  2317:             //BNZE.L <label>                                  |A|--2346|-|--*--|-----|          |0110_011_011_111_111-{offset}        [BNE.L <label>]
  2318:           case 0b0110_011_011:
  2319:             irpBnesl ();
  2320:             break irpSwitch;
  2321: 
  2322:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2323:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2324:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2325:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2326:             //BEQ.W <label>                                   |-|012346|-|--*--|-----|          |0110_011_100_000_000-{offset}
  2327:             //BNNE.W <label>                                  |A|012346|-|--*--|-----|          |0110_011_100_000_000-{offset}        [BEQ.W <label>]
  2328:             //BNNZ.W <label>                                  |A|012346|-|--*--|-----|          |0110_011_100_000_000-{offset}        [BEQ.W <label>]
  2329:             //BZE.W <label>                                   |A|012346|-|--*--|-----|          |0110_011_100_000_000-{offset}        [BEQ.W <label>]
  2330:             //JBEQ.W <label>                                  |A|012346|-|--*--|-----|          |0110_011_100_000_000-{offset}        [BEQ.W <label>]
  2331:             //JBNNE.W <label>                                 |A|012346|-|--*--|-----|          |0110_011_100_000_000-{offset}        [BEQ.W <label>]
  2332:             //JBNNZ.W <label>                                 |A|012346|-|--*--|-----|          |0110_011_100_000_000-{offset}        [BEQ.W <label>]
  2333:             //JBZE.W <label>                                  |A|012346|-|--*--|-----|          |0110_011_100_000_000-{offset}        [BEQ.W <label>]
  2334:             //BEQ.S <label>                                   |-|012346|-|--*--|-----|          |0110_011_100_sss_sss (s is not equal to 0)
  2335:             //BNNE.S <label>                                  |A|012346|-|--*--|-----|          |0110_011_100_sss_sss (s is not equal to 0)   [BEQ.S <label>]
  2336:             //BNNZ.S <label>                                  |A|012346|-|--*--|-----|          |0110_011_100_sss_sss (s is not equal to 0)   [BEQ.S <label>]
  2337:             //BZE.S <label>                                   |A|012346|-|--*--|-----|          |0110_011_100_sss_sss (s is not equal to 0)   [BEQ.S <label>]
  2338:             //JBEQ.S <label>                                  |A|012346|-|--*--|-----|          |0110_011_100_sss_sss (s is not equal to 0)   [BEQ.S <label>]
  2339:             //JBNNE.S <label>                                 |A|012346|-|--*--|-----|          |0110_011_100_sss_sss (s is not equal to 0)   [BEQ.S <label>]
  2340:             //JBNNZ.S <label>                                 |A|012346|-|--*--|-----|          |0110_011_100_sss_sss (s is not equal to 0)   [BEQ.S <label>]
  2341:             //JBZE.S <label>                                  |A|012346|-|--*--|-----|          |0110_011_100_sss_sss (s is not equal to 0)   [BEQ.S <label>]
  2342:             //JBNE.L <label>                                  |A|012346|-|--*--|-----|          |0110_011_100_000_110-0100111011111001-{address}      [BEQ.S (*)+8;JMP <label>]
  2343:           case 0b0110_011_100:
  2344:             irpBeqsw ();
  2345:             break irpSwitch;
  2346: 
  2347:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2348:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2349:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2350:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2351:             //BEQ.S <label>                                   |-|012346|-|--*--|-----|          |0110_011_101_sss_sss
  2352:             //BNNE.S <label>                                  |A|012346|-|--*--|-----|          |0110_011_101_sss_sss [BEQ.S <label>]
  2353:             //BNNZ.S <label>                                  |A|012346|-|--*--|-----|          |0110_011_101_sss_sss [BEQ.S <label>]
  2354:             //BZE.S <label>                                   |A|012346|-|--*--|-----|          |0110_011_101_sss_sss [BEQ.S <label>]
  2355:             //JBEQ.S <label>                                  |A|012346|-|--*--|-----|          |0110_011_101_sss_sss [BEQ.S <label>]
  2356:             //JBNNE.S <label>                                 |A|012346|-|--*--|-----|          |0110_011_101_sss_sss [BEQ.S <label>]
  2357:             //JBNNZ.S <label>                                 |A|012346|-|--*--|-----|          |0110_011_101_sss_sss [BEQ.S <label>]
  2358:             //JBZE.S <label>                                  |A|012346|-|--*--|-----|          |0110_011_101_sss_sss [BEQ.S <label>]
  2359:           case 0b0110_011_101:
  2360:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2361:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2362:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2363:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2364:             //BEQ.S <label>                                   |-|012346|-|--*--|-----|          |0110_011_110_sss_sss
  2365:             //BNNE.S <label>                                  |A|012346|-|--*--|-----|          |0110_011_110_sss_sss [BEQ.S <label>]
  2366:             //BNNZ.S <label>                                  |A|012346|-|--*--|-----|          |0110_011_110_sss_sss [BEQ.S <label>]
  2367:             //BZE.S <label>                                   |A|012346|-|--*--|-----|          |0110_011_110_sss_sss [BEQ.S <label>]
  2368:             //JBEQ.S <label>                                  |A|012346|-|--*--|-----|          |0110_011_110_sss_sss [BEQ.S <label>]
  2369:             //JBNNE.S <label>                                 |A|012346|-|--*--|-----|          |0110_011_110_sss_sss [BEQ.S <label>]
  2370:             //JBNNZ.S <label>                                 |A|012346|-|--*--|-----|          |0110_011_110_sss_sss [BEQ.S <label>]
  2371:             //JBZE.S <label>                                  |A|012346|-|--*--|-----|          |0110_011_110_sss_sss [BEQ.S <label>]
  2372:           case 0b0110_011_110:
  2373:             irpBeqs ();
  2374:             break irpSwitch;
  2375: 
  2376:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2377:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2378:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2379:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2380:             //BEQ.S <label>                                   |-|--2346|-|--*--|-----|          |0110_011_111_sss_sss (s is not equal to 63)
  2381:             //BNNE.S <label>                                  |A|--2346|-|--*--|-----|          |0110_011_111_sss_sss (s is not equal to 63)  [BEQ.S <label>]
  2382:             //BNNZ.S <label>                                  |A|--2346|-|--*--|-----|          |0110_011_111_sss_sss (s is not equal to 63)  [BEQ.S <label>]
  2383:             //BZE.S <label>                                   |A|--2346|-|--*--|-----|          |0110_011_111_sss_sss (s is not equal to 63)  [BEQ.S <label>]
  2384:             //JBEQ.S <label>                                  |A|--2346|-|--*--|-----|          |0110_011_111_sss_sss (s is not equal to 63)  [BEQ.S <label>]
  2385:             //JBNNE.S <label>                                 |A|--2346|-|--*--|-----|          |0110_011_111_sss_sss (s is not equal to 63)  [BEQ.S <label>]
  2386:             //JBNNZ.S <label>                                 |A|--2346|-|--*--|-----|          |0110_011_111_sss_sss (s is not equal to 63)  [BEQ.S <label>]
  2387:             //JBZE.S <label>                                  |A|--2346|-|--*--|-----|          |0110_011_111_sss_sss (s is not equal to 63)  [BEQ.S <label>]
  2388:             //BEQ.L <label>                                   |-|--2346|-|--*--|-----|          |0110_011_111_111_111-{offset}
  2389:             //BNNE.L <label>                                  |A|--2346|-|--*--|-----|          |0110_011_111_111_111-{offset}        [BEQ.L <label>]
  2390:             //BNNZ.L <label>                                  |A|--2346|-|--*--|-----|          |0110_011_111_111_111-{offset}        [BEQ.L <label>]
  2391:             //BZE.L <label>                                   |A|--2346|-|--*--|-----|          |0110_011_111_111_111-{offset}        [BEQ.L <label>]
  2392:           case 0b0110_011_111:
  2393:             irpBeqsl ();
  2394:             break irpSwitch;
  2395: 
  2396:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2397:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2398:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2399:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2400:             //BVC.W <label>                                   |-|012346|-|---*-|-----|          |0110_100_000_000_000-{offset}
  2401:             //BNVS.W <label>                                  |A|012346|-|---*-|-----|          |0110_100_000_000_000-{offset}        [BVC.W <label>]
  2402:             //JBNVS.W <label>                                 |A|012346|-|---*-|-----|          |0110_100_000_000_000-{offset}        [BVC.W <label>]
  2403:             //JBVC.W <label>                                  |A|012346|-|---*-|-----|          |0110_100_000_000_000-{offset}        [BVC.W <label>]
  2404:             //BVC.S <label>                                   |-|012346|-|---*-|-----|          |0110_100_000_sss_sss (s is not equal to 0)
  2405:             //BNVS.S <label>                                  |A|012346|-|---*-|-----|          |0110_100_000_sss_sss (s is not equal to 0)   [BVC.S <label>]
  2406:             //JBNVS.S <label>                                 |A|012346|-|---*-|-----|          |0110_100_000_sss_sss (s is not equal to 0)   [BVC.S <label>]
  2407:             //JBVC.S <label>                                  |A|012346|-|---*-|-----|          |0110_100_000_sss_sss (s is not equal to 0)   [BVC.S <label>]
  2408:             //JBNVC.L <label>                                 |A|012346|-|---*-|-----|          |0110_100_000_000_110-0100111011111001-{address}      [BVC.S (*)+8;JMP <label>]
  2409:             //JBVS.L <label>                                  |A|012346|-|---*-|-----|          |0110_100_000_000_110-0100111011111001-{address}      [BVC.S (*)+8;JMP <label>]
  2410:           case 0b0110_100_000:
  2411:             irpBvcsw ();
  2412:             break irpSwitch;
  2413: 
  2414:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2415:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2416:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2417:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2418:             //BVC.S <label>                                   |-|012346|-|---*-|-----|          |0110_100_001_sss_sss
  2419:             //BNVS.S <label>                                  |A|012346|-|---*-|-----|          |0110_100_001_sss_sss [BVC.S <label>]
  2420:             //JBNVS.S <label>                                 |A|012346|-|---*-|-----|          |0110_100_001_sss_sss [BVC.S <label>]
  2421:             //JBVC.S <label>                                  |A|012346|-|---*-|-----|          |0110_100_001_sss_sss [BVC.S <label>]
  2422:           case 0b0110_100_001:
  2423:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2424:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2425:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2426:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2427:             //BVC.S <label>                                   |-|012346|-|---*-|-----|          |0110_100_010_sss_sss
  2428:             //BNVS.S <label>                                  |A|012346|-|---*-|-----|          |0110_100_010_sss_sss [BVC.S <label>]
  2429:             //JBNVS.S <label>                                 |A|012346|-|---*-|-----|          |0110_100_010_sss_sss [BVC.S <label>]
  2430:             //JBVC.S <label>                                  |A|012346|-|---*-|-----|          |0110_100_010_sss_sss [BVC.S <label>]
  2431:           case 0b0110_100_010:
  2432:             irpBvcs ();
  2433:             break irpSwitch;
  2434: 
  2435:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2436:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2437:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2438:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2439:             //BVC.S <label>                                   |-|--2346|-|---*-|-----|          |0110_100_011_sss_sss (s is not equal to 63)
  2440:             //BNVS.S <label>                                  |A|--2346|-|---*-|-----|          |0110_100_011_sss_sss (s is not equal to 63)  [BVC.S <label>]
  2441:             //JBNVS.S <label>                                 |A|--2346|-|---*-|-----|          |0110_100_011_sss_sss (s is not equal to 63)  [BVC.S <label>]
  2442:             //JBVC.S <label>                                  |A|--2346|-|---*-|-----|          |0110_100_011_sss_sss (s is not equal to 63)  [BVC.S <label>]
  2443:             //BVC.L <label>                                   |-|--2346|-|---*-|-----|          |0110_100_011_111_111-{offset}
  2444:             //BNVS.L <label>                                  |A|--2346|-|---*-|-----|          |0110_100_011_111_111-{offset}        [BVC.L <label>]
  2445:           case 0b0110_100_011:
  2446:             irpBvcsl ();
  2447:             break irpSwitch;
  2448: 
  2449:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2450:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2451:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2452:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2453:             //BVS.W <label>                                   |-|012346|-|---*-|-----|          |0110_100_100_000_000-{offset}
  2454:             //BNVC.W <label>                                  |A|012346|-|---*-|-----|          |0110_100_100_000_000-{offset}        [BVS.W <label>]
  2455:             //JBNVC.W <label>                                 |A|012346|-|---*-|-----|          |0110_100_100_000_000-{offset}        [BVS.W <label>]
  2456:             //JBVS.W <label>                                  |A|012346|-|---*-|-----|          |0110_100_100_000_000-{offset}        [BVS.W <label>]
  2457:             //BVS.S <label>                                   |-|012346|-|---*-|-----|          |0110_100_100_sss_sss (s is not equal to 0)
  2458:             //BNVC.S <label>                                  |A|012346|-|---*-|-----|          |0110_100_100_sss_sss (s is not equal to 0)   [BVS.S <label>]
  2459:             //JBNVC.S <label>                                 |A|012346|-|---*-|-----|          |0110_100_100_sss_sss (s is not equal to 0)   [BVS.S <label>]
  2460:             //JBVS.S <label>                                  |A|012346|-|---*-|-----|          |0110_100_100_sss_sss (s is not equal to 0)   [BVS.S <label>]
  2461:             //JBNVS.L <label>                                 |A|012346|-|---*-|-----|          |0110_100_100_000_110-0100111011111001-{address}      [BVS.S (*)+8;JMP <label>]
  2462:             //JBVC.L <label>                                  |A|012346|-|---*-|-----|          |0110_100_100_000_110-0100111011111001-{address}      [BVS.S (*)+8;JMP <label>]
  2463:           case 0b0110_100_100:
  2464:             irpBvssw ();
  2465:             break irpSwitch;
  2466: 
  2467:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2468:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2469:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2470:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2471:             //BVS.S <label>                                   |-|012346|-|---*-|-----|          |0110_100_101_sss_sss
  2472:             //BNVC.S <label>                                  |A|012346|-|---*-|-----|          |0110_100_101_sss_sss [BVS.S <label>]
  2473:             //JBNVC.S <label>                                 |A|012346|-|---*-|-----|          |0110_100_101_sss_sss [BVS.S <label>]
  2474:             //JBVS.S <label>                                  |A|012346|-|---*-|-----|          |0110_100_101_sss_sss [BVS.S <label>]
  2475:           case 0b0110_100_101:
  2476:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2477:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2478:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2479:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2480:             //BVS.S <label>                                   |-|012346|-|---*-|-----|          |0110_100_110_sss_sss
  2481:             //BNVC.S <label>                                  |A|012346|-|---*-|-----|          |0110_100_110_sss_sss [BVS.S <label>]
  2482:             //JBNVC.S <label>                                 |A|012346|-|---*-|-----|          |0110_100_110_sss_sss [BVS.S <label>]
  2483:             //JBVS.S <label>                                  |A|012346|-|---*-|-----|          |0110_100_110_sss_sss [BVS.S <label>]
  2484:           case 0b0110_100_110:
  2485:             irpBvss ();
  2486:             break irpSwitch;
  2487: 
  2488:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2489:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2490:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2491:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2492:             //BVS.S <label>                                   |-|--2346|-|---*-|-----|          |0110_100_111_sss_sss (s is not equal to 63)
  2493:             //BNVC.S <label>                                  |A|--2346|-|---*-|-----|          |0110_100_111_sss_sss (s is not equal to 63)  [BVS.S <label>]
  2494:             //JBNVC.S <label>                                 |A|--2346|-|---*-|-----|          |0110_100_111_sss_sss (s is not equal to 63)  [BVS.S <label>]
  2495:             //JBVS.S <label>                                  |A|--2346|-|---*-|-----|          |0110_100_111_sss_sss (s is not equal to 63)  [BVS.S <label>]
  2496:             //BVS.L <label>                                   |-|--2346|-|---*-|-----|          |0110_100_111_111_111-{offset}
  2497:             //BNVC.L <label>                                  |A|--2346|-|---*-|-----|          |0110_100_111_111_111-{offset}        [BVS.L <label>]
  2498:           case 0b0110_100_111:
  2499:             irpBvssl ();
  2500:             break irpSwitch;
  2501: 
  2502:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2503:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2504:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2505:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2506:             //BPL.W <label>                                   |-|012346|-|-*---|-----|          |0110_101_000_000_000-{offset}
  2507:             //BNMI.W <label>                                  |A|012346|-|-*---|-----|          |0110_101_000_000_000-{offset}        [BPL.W <label>]
  2508:             //JBNMI.W <label>                                 |A|012346|-|-*---|-----|          |0110_101_000_000_000-{offset}        [BPL.W <label>]
  2509:             //JBPL.W <label>                                  |A|012346|-|-*---|-----|          |0110_101_000_000_000-{offset}        [BPL.W <label>]
  2510:             //BPL.S <label>                                   |-|012346|-|-*---|-----|          |0110_101_000_sss_sss (s is not equal to 0)
  2511:             //BNMI.S <label>                                  |A|012346|-|-*---|-----|          |0110_101_000_sss_sss (s is not equal to 0)   [BPL.S <label>]
  2512:             //JBNMI.S <label>                                 |A|012346|-|-*---|-----|          |0110_101_000_sss_sss (s is not equal to 0)   [BPL.S <label>]
  2513:             //JBPL.S <label>                                  |A|012346|-|-*---|-----|          |0110_101_000_sss_sss (s is not equal to 0)   [BPL.S <label>]
  2514:             //JBMI.L <label>                                  |A|012346|-|-*---|-----|          |0110_101_000_000_110-0100111011111001-{address}      [BPL.S (*)+8;JMP <label>]
  2515:             //JBNPL.L <label>                                 |A|012346|-|-*---|-----|          |0110_101_000_000_110-0100111011111001-{address}      [BPL.S (*)+8;JMP <label>]
  2516:           case 0b0110_101_000:
  2517:             irpBplsw ();
  2518:             break irpSwitch;
  2519: 
  2520:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2521:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2522:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2523:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2524:             //BPL.S <label>                                   |-|012346|-|-*---|-----|          |0110_101_001_sss_sss
  2525:             //BNMI.S <label>                                  |A|012346|-|-*---|-----|          |0110_101_001_sss_sss [BPL.S <label>]
  2526:             //JBNMI.S <label>                                 |A|012346|-|-*---|-----|          |0110_101_001_sss_sss [BPL.S <label>]
  2527:             //JBPL.S <label>                                  |A|012346|-|-*---|-----|          |0110_101_001_sss_sss [BPL.S <label>]
  2528:           case 0b0110_101_001:
  2529:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2530:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2531:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2532:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2533:             //BPL.S <label>                                   |-|012346|-|-*---|-----|          |0110_101_010_sss_sss
  2534:             //BNMI.S <label>                                  |A|012346|-|-*---|-----|          |0110_101_010_sss_sss [BPL.S <label>]
  2535:             //JBNMI.S <label>                                 |A|012346|-|-*---|-----|          |0110_101_010_sss_sss [BPL.S <label>]
  2536:             //JBPL.S <label>                                  |A|012346|-|-*---|-----|          |0110_101_010_sss_sss [BPL.S <label>]
  2537:           case 0b0110_101_010:
  2538:             irpBpls ();
  2539:             break irpSwitch;
  2540: 
  2541:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2542:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2543:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2544:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2545:             //BPL.S <label>                                   |-|--2346|-|-*---|-----|          |0110_101_011_sss_sss (s is not equal to 63)
  2546:             //BNMI.S <label>                                  |A|--2346|-|-*---|-----|          |0110_101_011_sss_sss (s is not equal to 63)  [BPL.S <label>]
  2547:             //JBNMI.S <label>                                 |A|--2346|-|-*---|-----|          |0110_101_011_sss_sss (s is not equal to 63)  [BPL.S <label>]
  2548:             //JBPL.S <label>                                  |A|--2346|-|-*---|-----|          |0110_101_011_sss_sss (s is not equal to 63)  [BPL.S <label>]
  2549:             //BPL.L <label>                                   |-|--2346|-|-*---|-----|          |0110_101_011_111_111-{offset}
  2550:             //BNMI.L <label>                                  |A|--2346|-|-*---|-----|          |0110_101_011_111_111-{offset}        [BPL.L <label>]
  2551:           case 0b0110_101_011:
  2552:             irpBplsl ();
  2553:             break irpSwitch;
  2554: 
  2555:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2556:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2557:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2558:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2559:             //BMI.W <label>                                   |-|012346|-|-*---|-----|          |0110_101_100_000_000-{offset}
  2560:             //BNPL.W <label>                                  |A|012346|-|-*---|-----|          |0110_101_100_000_000-{offset}        [BMI.W <label>]
  2561:             //JBMI.W <label>                                  |A|012346|-|-*---|-----|          |0110_101_100_000_000-{offset}        [BMI.W <label>]
  2562:             //JBNPL.W <label>                                 |A|012346|-|-*---|-----|          |0110_101_100_000_000-{offset}        [BMI.W <label>]
  2563:             //BMI.S <label>                                   |-|012346|-|-*---|-----|          |0110_101_100_sss_sss (s is not equal to 0)
  2564:             //BNPL.S <label>                                  |A|012346|-|-*---|-----|          |0110_101_100_sss_sss (s is not equal to 0)   [BMI.S <label>]
  2565:             //JBMI.S <label>                                  |A|012346|-|-*---|-----|          |0110_101_100_sss_sss (s is not equal to 0)   [BMI.S <label>]
  2566:             //JBNPL.S <label>                                 |A|012346|-|-*---|-----|          |0110_101_100_sss_sss (s is not equal to 0)   [BMI.S <label>]
  2567:             //JBNMI.L <label>                                 |A|012346|-|-*---|-----|          |0110_101_100_000_110-0100111011111001-{address}      [BMI.S (*)+8;JMP <label>]
  2568:             //JBPL.L <label>                                  |A|012346|-|-*---|-----|          |0110_101_100_000_110-0100111011111001-{address}      [BMI.S (*)+8;JMP <label>]
  2569:           case 0b0110_101_100:
  2570:             irpBmisw ();
  2571:             break irpSwitch;
  2572: 
  2573:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2574:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2575:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2576:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2577:             //BMI.S <label>                                   |-|012346|-|-*---|-----|          |0110_101_101_sss_sss
  2578:             //BNPL.S <label>                                  |A|012346|-|-*---|-----|          |0110_101_101_sss_sss [BMI.S <label>]
  2579:             //JBMI.S <label>                                  |A|012346|-|-*---|-----|          |0110_101_101_sss_sss [BMI.S <label>]
  2580:             //JBNPL.S <label>                                 |A|012346|-|-*---|-----|          |0110_101_101_sss_sss [BMI.S <label>]
  2581:           case 0b0110_101_101:
  2582:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2583:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2584:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2585:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2586:             //BMI.S <label>                                   |-|012346|-|-*---|-----|          |0110_101_110_sss_sss
  2587:             //BNPL.S <label>                                  |A|012346|-|-*---|-----|          |0110_101_110_sss_sss [BMI.S <label>]
  2588:             //JBMI.S <label>                                  |A|012346|-|-*---|-----|          |0110_101_110_sss_sss [BMI.S <label>]
  2589:             //JBNPL.S <label>                                 |A|012346|-|-*---|-----|          |0110_101_110_sss_sss [BMI.S <label>]
  2590:           case 0b0110_101_110:
  2591:             irpBmis ();
  2592:             break irpSwitch;
  2593: 
  2594:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2595:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2596:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2597:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2598:             //BMI.S <label>                                   |-|--2346|-|-*---|-----|          |0110_101_111_sss_sss (s is not equal to 63)
  2599:             //BNPL.S <label>                                  |A|--2346|-|-*---|-----|          |0110_101_111_sss_sss (s is not equal to 63)  [BMI.S <label>]
  2600:             //JBMI.S <label>                                  |A|--2346|-|-*---|-----|          |0110_101_111_sss_sss (s is not equal to 63)  [BMI.S <label>]
  2601:             //JBNPL.S <label>                                 |A|--2346|-|-*---|-----|          |0110_101_111_sss_sss (s is not equal to 63)  [BMI.S <label>]
  2602:             //BMI.L <label>                                   |-|--2346|-|-*---|-----|          |0110_101_111_111_111-{offset}
  2603:             //BNPL.L <label>                                  |A|--2346|-|-*---|-----|          |0110_101_111_111_111-{offset}        [BMI.L <label>]
  2604:           case 0b0110_101_111:
  2605:             irpBmisl ();
  2606:             break irpSwitch;
  2607: 
  2608:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2609:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2610:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2611:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2612:             //BGE.W <label>                                   |-|012346|-|-*-*-|-----|          |0110_110_000_000_000-{offset}
  2613:             //BNLT.W <label>                                  |A|012346|-|-*-*-|-----|          |0110_110_000_000_000-{offset}        [BGE.W <label>]
  2614:             //JBGE.W <label>                                  |A|012346|-|-*-*-|-----|          |0110_110_000_000_000-{offset}        [BGE.W <label>]
  2615:             //JBNLT.W <label>                                 |A|012346|-|-*-*-|-----|          |0110_110_000_000_000-{offset}        [BGE.W <label>]
  2616:             //BGE.S <label>                                   |-|012346|-|-*-*-|-----|          |0110_110_000_sss_sss (s is not equal to 0)
  2617:             //BNLT.S <label>                                  |A|012346|-|-*-*-|-----|          |0110_110_000_sss_sss (s is not equal to 0)   [BGE.S <label>]
  2618:             //JBGE.S <label>                                  |A|012346|-|-*-*-|-----|          |0110_110_000_sss_sss (s is not equal to 0)   [BGE.S <label>]
  2619:             //JBNLT.S <label>                                 |A|012346|-|-*-*-|-----|          |0110_110_000_sss_sss (s is not equal to 0)   [BGE.S <label>]
  2620:             //JBLT.L <label>                                  |A|012346|-|-*-*-|-----|          |0110_110_000_000_110-0100111011111001-{address}      [BGE.S (*)+8;JMP <label>]
  2621:             //JBNGE.L <label>                                 |A|012346|-|-*-*-|-----|          |0110_110_000_000_110-0100111011111001-{address}      [BGE.S (*)+8;JMP <label>]
  2622:           case 0b0110_110_000:
  2623:             irpBgesw ();
  2624:             break irpSwitch;
  2625: 
  2626:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2627:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2628:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2629:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2630:             //BGE.S <label>                                   |-|012346|-|-*-*-|-----|          |0110_110_001_sss_sss
  2631:             //BNLT.S <label>                                  |A|012346|-|-*-*-|-----|          |0110_110_001_sss_sss [BGE.S <label>]
  2632:             //JBGE.S <label>                                  |A|012346|-|-*-*-|-----|          |0110_110_001_sss_sss [BGE.S <label>]
  2633:             //JBNLT.S <label>                                 |A|012346|-|-*-*-|-----|          |0110_110_001_sss_sss [BGE.S <label>]
  2634:           case 0b0110_110_001:
  2635:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2636:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2637:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2638:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2639:             //BGE.S <label>                                   |-|012346|-|-*-*-|-----|          |0110_110_010_sss_sss
  2640:             //BNLT.S <label>                                  |A|012346|-|-*-*-|-----|          |0110_110_010_sss_sss [BGE.S <label>]
  2641:             //JBGE.S <label>                                  |A|012346|-|-*-*-|-----|          |0110_110_010_sss_sss [BGE.S <label>]
  2642:             //JBNLT.S <label>                                 |A|012346|-|-*-*-|-----|          |0110_110_010_sss_sss [BGE.S <label>]
  2643:           case 0b0110_110_010:
  2644:             irpBges ();
  2645:             break irpSwitch;
  2646: 
  2647:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2648:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2649:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2650:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2651:             //BGE.S <label>                                   |-|--2346|-|-*-*-|-----|          |0110_110_011_sss_sss (s is not equal to 63)
  2652:             //BNLT.S <label>                                  |A|--2346|-|-*-*-|-----|          |0110_110_011_sss_sss (s is not equal to 63)  [BGE.S <label>]
  2653:             //JBGE.S <label>                                  |A|--2346|-|-*-*-|-----|          |0110_110_011_sss_sss (s is not equal to 63)  [BGE.S <label>]
  2654:             //JBNLT.S <label>                                 |A|--2346|-|-*-*-|-----|          |0110_110_011_sss_sss (s is not equal to 63)  [BGE.S <label>]
  2655:             //BGE.L <label>                                   |-|--2346|-|-*-*-|-----|          |0110_110_011_111_111-{offset}
  2656:             //BNLT.L <label>                                  |A|--2346|-|-*-*-|-----|          |0110_110_011_111_111-{offset}        [BGE.L <label>]
  2657:           case 0b0110_110_011:
  2658:             irpBgesl ();
  2659:             break irpSwitch;
  2660: 
  2661:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2662:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2663:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2664:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2665:             //BLT.W <label>                                   |-|012346|-|-*-*-|-----|          |0110_110_100_000_000-{offset}
  2666:             //BNGE.W <label>                                  |A|012346|-|-*-*-|-----|          |0110_110_100_000_000-{offset}        [BLT.W <label>]
  2667:             //JBLT.W <label>                                  |A|012346|-|-*-*-|-----|          |0110_110_100_000_000-{offset}        [BLT.W <label>]
  2668:             //JBNGE.W <label>                                 |A|012346|-|-*-*-|-----|          |0110_110_100_000_000-{offset}        [BLT.W <label>]
  2669:             //BLT.S <label>                                   |-|012346|-|-*-*-|-----|          |0110_110_100_sss_sss (s is not equal to 0)
  2670:             //BNGE.S <label>                                  |A|012346|-|-*-*-|-----|          |0110_110_100_sss_sss (s is not equal to 0)   [BLT.S <label>]
  2671:             //JBLT.S <label>                                  |A|012346|-|-*-*-|-----|          |0110_110_100_sss_sss (s is not equal to 0)   [BLT.S <label>]
  2672:             //JBNGE.S <label>                                 |A|012346|-|-*-*-|-----|          |0110_110_100_sss_sss (s is not equal to 0)   [BLT.S <label>]
  2673:             //JBGE.L <label>                                  |A|012346|-|-*-*-|-----|          |0110_110_100_000_110-0100111011111001-{address}      [BLT.S (*)+8;JMP <label>]
  2674:             //JBNLT.L <label>                                 |A|012346|-|-*-*-|-----|          |0110_110_100_000_110-0100111011111001-{address}      [BLT.S (*)+8;JMP <label>]
  2675:           case 0b0110_110_100:
  2676:             irpBltsw ();
  2677:             break irpSwitch;
  2678: 
  2679:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2680:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2681:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2682:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2683:             //BLT.S <label>                                   |-|012346|-|-*-*-|-----|          |0110_110_101_sss_sss
  2684:             //BNGE.S <label>                                  |A|012346|-|-*-*-|-----|          |0110_110_101_sss_sss [BLT.S <label>]
  2685:             //JBLT.S <label>                                  |A|012346|-|-*-*-|-----|          |0110_110_101_sss_sss [BLT.S <label>]
  2686:             //JBNGE.S <label>                                 |A|012346|-|-*-*-|-----|          |0110_110_101_sss_sss [BLT.S <label>]
  2687:           case 0b0110_110_101:
  2688:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2689:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2690:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2691:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2692:             //BLT.S <label>                                   |-|012346|-|-*-*-|-----|          |0110_110_110_sss_sss
  2693:             //BNGE.S <label>                                  |A|012346|-|-*-*-|-----|          |0110_110_110_sss_sss [BLT.S <label>]
  2694:             //JBLT.S <label>                                  |A|012346|-|-*-*-|-----|          |0110_110_110_sss_sss [BLT.S <label>]
  2695:             //JBNGE.S <label>                                 |A|012346|-|-*-*-|-----|          |0110_110_110_sss_sss [BLT.S <label>]
  2696:           case 0b0110_110_110:
  2697:             irpBlts ();
  2698:             break irpSwitch;
  2699: 
  2700:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2701:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2702:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2703:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2704:             //BLT.S <label>                                   |-|--2346|-|-*-*-|-----|          |0110_110_111_sss_sss (s is not equal to 63)
  2705:             //BNGE.S <label>                                  |A|--2346|-|-*-*-|-----|          |0110_110_111_sss_sss (s is not equal to 63)  [BLT.S <label>]
  2706:             //JBLT.S <label>                                  |A|--2346|-|-*-*-|-----|          |0110_110_111_sss_sss (s is not equal to 63)  [BLT.S <label>]
  2707:             //JBNGE.S <label>                                 |A|--2346|-|-*-*-|-----|          |0110_110_111_sss_sss (s is not equal to 63)  [BLT.S <label>]
  2708:             //BLT.L <label>                                   |-|--2346|-|-*-*-|-----|          |0110_110_111_111_111-{offset}
  2709:             //BNGE.L <label>                                  |A|--2346|-|-*-*-|-----|          |0110_110_111_111_111-{offset}        [BLT.L <label>]
  2710:           case 0b0110_110_111:
  2711:             irpBltsl ();
  2712:             break irpSwitch;
  2713: 
  2714:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2715:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2716:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2717:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2718:             //BGT.W <label>                                   |-|012346|-|-***-|-----|          |0110_111_000_000_000-{offset}
  2719:             //BNLE.W <label>                                  |A|012346|-|-***-|-----|          |0110_111_000_000_000-{offset}        [BGT.W <label>]
  2720:             //JBGT.W <label>                                  |A|012346|-|-***-|-----|          |0110_111_000_000_000-{offset}        [BGT.W <label>]
  2721:             //JBNLE.W <label>                                 |A|012346|-|-***-|-----|          |0110_111_000_000_000-{offset}        [BGT.W <label>]
  2722:             //BGT.S <label>                                   |-|012346|-|-***-|-----|          |0110_111_000_sss_sss (s is not equal to 0)
  2723:             //BNLE.S <label>                                  |A|012346|-|-***-|-----|          |0110_111_000_sss_sss (s is not equal to 0)   [BGT.S <label>]
  2724:             //JBGT.S <label>                                  |A|012346|-|-***-|-----|          |0110_111_000_sss_sss (s is not equal to 0)   [BGT.S <label>]
  2725:             //JBNLE.S <label>                                 |A|012346|-|-***-|-----|          |0110_111_000_sss_sss (s is not equal to 0)   [BGT.S <label>]
  2726:             //JBLE.L <label>                                  |A|012346|-|-***-|-----|          |0110_111_000_000_110-0100111011111001-{address}      [BGT.S (*)+8;JMP <label>]
  2727:             //JBNGT.L <label>                                 |A|012346|-|-***-|-----|          |0110_111_000_000_110-0100111011111001-{address}      [BGT.S (*)+8;JMP <label>]
  2728:           case 0b0110_111_000:
  2729:             irpBgtsw ();
  2730:             break irpSwitch;
  2731: 
  2732:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2733:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2734:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2735:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2736:             //BGT.S <label>                                   |-|012346|-|-***-|-----|          |0110_111_001_sss_sss
  2737:             //BNLE.S <label>                                  |A|012346|-|-***-|-----|          |0110_111_001_sss_sss [BGT.S <label>]
  2738:             //JBGT.S <label>                                  |A|012346|-|-***-|-----|          |0110_111_001_sss_sss [BGT.S <label>]
  2739:             //JBNLE.S <label>                                 |A|012346|-|-***-|-----|          |0110_111_001_sss_sss [BGT.S <label>]
  2740:           case 0b0110_111_001:
  2741:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2742:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2743:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2744:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2745:             //BGT.S <label>                                   |-|012346|-|-***-|-----|          |0110_111_010_sss_sss
  2746:             //BNLE.S <label>                                  |A|012346|-|-***-|-----|          |0110_111_010_sss_sss [BGT.S <label>]
  2747:             //JBGT.S <label>                                  |A|012346|-|-***-|-----|          |0110_111_010_sss_sss [BGT.S <label>]
  2748:             //JBNLE.S <label>                                 |A|012346|-|-***-|-----|          |0110_111_010_sss_sss [BGT.S <label>]
  2749:           case 0b0110_111_010:
  2750:             irpBgts ();
  2751:             break irpSwitch;
  2752: 
  2753:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2754:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2755:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2756:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2757:             //BGT.S <label>                                   |-|--2346|-|-***-|-----|          |0110_111_011_sss_sss (s is not equal to 63)
  2758:             //BNLE.S <label>                                  |A|--2346|-|-***-|-----|          |0110_111_011_sss_sss (s is not equal to 63)  [BGT.S <label>]
  2759:             //JBGT.S <label>                                  |A|--2346|-|-***-|-----|          |0110_111_011_sss_sss (s is not equal to 63)  [BGT.S <label>]
  2760:             //JBNLE.S <label>                                 |A|--2346|-|-***-|-----|          |0110_111_011_sss_sss (s is not equal to 63)  [BGT.S <label>]
  2761:             //BGT.L <label>                                   |-|--2346|-|-***-|-----|          |0110_111_011_111_111-{offset}
  2762:             //BNLE.L <label>                                  |A|--2346|-|-***-|-----|          |0110_111_011_111_111-{offset}        [BGT.L <label>]
  2763:           case 0b0110_111_011:
  2764:             irpBgtsl ();
  2765:             break irpSwitch;
  2766: 
  2767:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2768:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2769:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2770:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2771:             //BLE.W <label>                                   |-|012346|-|-***-|-----|          |0110_111_100_000_000-{offset}
  2772:             //BNGT.W <label>                                  |A|012346|-|-***-|-----|          |0110_111_100_000_000-{offset}        [BLE.W <label>]
  2773:             //JBLE.W <label>                                  |A|012346|-|-***-|-----|          |0110_111_100_000_000-{offset}        [BLE.W <label>]
  2774:             //JBNGT.W <label>                                 |A|012346|-|-***-|-----|          |0110_111_100_000_000-{offset}        [BLE.W <label>]
  2775:             //BLE.S <label>                                   |-|012346|-|-***-|-----|          |0110_111_100_sss_sss (s is not equal to 0)
  2776:             //BNGT.S <label>                                  |A|012346|-|-***-|-----|          |0110_111_100_sss_sss (s is not equal to 0)   [BLE.S <label>]
  2777:             //JBLE.S <label>                                  |A|012346|-|-***-|-----|          |0110_111_100_sss_sss (s is not equal to 0)   [BLE.S <label>]
  2778:             //JBNGT.S <label>                                 |A|012346|-|-***-|-----|          |0110_111_100_sss_sss (s is not equal to 0)   [BLE.S <label>]
  2779:             //JBGT.L <label>                                  |A|012346|-|-***-|-----|          |0110_111_100_000_110-0100111011111001-{address}      [BLE.S (*)+8;JMP <label>]
  2780:             //JBNLE.L <label>                                 |A|012346|-|-***-|-----|          |0110_111_100_000_110-0100111011111001-{address}      [BLE.S (*)+8;JMP <label>]
  2781:           case 0b0110_111_100:
  2782:             irpBlesw ();
  2783:             break irpSwitch;
  2784: 
  2785:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2786:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2787:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2788:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2789:             //BLE.S <label>                                   |-|012346|-|-***-|-----|          |0110_111_101_sss_sss
  2790:             //BNGT.S <label>                                  |A|012346|-|-***-|-----|          |0110_111_101_sss_sss [BLE.S <label>]
  2791:             //JBLE.S <label>                                  |A|012346|-|-***-|-----|          |0110_111_101_sss_sss [BLE.S <label>]
  2792:             //JBNGT.S <label>                                 |A|012346|-|-***-|-----|          |0110_111_101_sss_sss [BLE.S <label>]
  2793:           case 0b0110_111_101:
  2794:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2795:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2796:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2797:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2798:             //BLE.S <label>                                   |-|012346|-|-***-|-----|          |0110_111_110_sss_sss
  2799:             //BNGT.S <label>                                  |A|012346|-|-***-|-----|          |0110_111_110_sss_sss [BLE.S <label>]
  2800:             //JBLE.S <label>                                  |A|012346|-|-***-|-----|          |0110_111_110_sss_sss [BLE.S <label>]
  2801:             //JBNGT.S <label>                                 |A|012346|-|-***-|-----|          |0110_111_110_sss_sss [BLE.S <label>]
  2802:           case 0b0110_111_110:
  2803:             irpBles ();
  2804:             break irpSwitch;
  2805: 
  2806:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2807:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2808:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2809:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2810:             //BLE.S <label>                                   |-|--2346|-|-***-|-----|          |0110_111_111_sss_sss (s is not equal to 63)
  2811:             //BNGT.S <label>                                  |A|--2346|-|-***-|-----|          |0110_111_111_sss_sss (s is not equal to 63)  [BLE.S <label>]
  2812:             //JBLE.S <label>                                  |A|--2346|-|-***-|-----|          |0110_111_111_sss_sss (s is not equal to 63)  [BLE.S <label>]
  2813:             //JBNGT.S <label>                                 |A|--2346|-|-***-|-----|          |0110_111_111_sss_sss (s is not equal to 63)  [BLE.S <label>]
  2814:             //BLE.L <label>                                   |-|--2346|-|-***-|-----|          |0110_111_111_111_111-{offset}
  2815:             //BNGT.L <label>                                  |A|--2346|-|-***-|-----|          |0110_111_111_111_111-{offset}        [BLE.L <label>]
  2816:           case 0b0110_111_111:
  2817:             irpBlesl ();
  2818:             break irpSwitch;
  2819: 
  2820:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2821:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2822:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2823:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2824:             //IOCS <name>                                     |A|012346|-|UUUUU|UUUUU|          |0111_000_0dd_ddd_ddd-0100111001001111        [MOVEQ.L #<data>,D0;TRAP #15]
  2825:             //MOVEQ.L #<data>,Dq                              |-|012346|-|-UUUU|-**00|          |0111_qqq_0dd_ddd_ddd
  2826:           case 0b0111_000_000:
  2827:           case 0b0111_000_001:
  2828:           case 0b0111_000_010:
  2829:           case 0b0111_000_011:
  2830:           case 0b0111_001_000:
  2831:           case 0b0111_001_001:
  2832:           case 0b0111_001_010:
  2833:           case 0b0111_001_011:
  2834:           case 0b0111_010_000:
  2835:           case 0b0111_010_001:
  2836:           case 0b0111_010_010:
  2837:           case 0b0111_010_011:
  2838:           case 0b0111_011_000:
  2839:           case 0b0111_011_001:
  2840:           case 0b0111_011_010:
  2841:           case 0b0111_011_011:
  2842:           case 0b0111_100_000:
  2843:           case 0b0111_100_001:
  2844:           case 0b0111_100_010:
  2845:           case 0b0111_100_011:
  2846:           case 0b0111_101_000:
  2847:           case 0b0111_101_001:
  2848:           case 0b0111_101_010:
  2849:           case 0b0111_101_011:
  2850:           case 0b0111_110_000:
  2851:           case 0b0111_110_001:
  2852:           case 0b0111_110_010:
  2853:           case 0b0111_110_011:
  2854:           case 0b0111_111_000:
  2855:           case 0b0111_111_001:
  2856:           case 0b0111_111_010:
  2857:           case 0b0111_111_011:
  2858:             irpMoveq ();
  2859:             break irpSwitch;
  2860: 
  2861:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2862:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2863:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2864:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2865:             //MVS.B <ea>,Dq                                   |-|------|-|-UUUU|-**00|D M+-WXZPI|0111_qqq_100_mmm_rrr (ISA_B)
  2866:           case 0b0111_000_100:
  2867:           case 0b0111_001_100:
  2868:           case 0b0111_010_100:
  2869:           case 0b0111_011_100:
  2870:           case 0b0111_100_100:
  2871:           case 0b0111_101_100:
  2872:           case 0b0111_110_100:
  2873:           case 0b0111_111_100:
  2874:             irpMvsByte ();
  2875:             break irpSwitch;
  2876: 
  2877:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2878:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2879:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2880:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2881:             //MVS.W <ea>,Dq                                   |-|------|-|-UUUU|-**00|D M+-WXZPI|0111_qqq_101_mmm_rrr (ISA_B)
  2882:           case 0b0111_000_101:
  2883:           case 0b0111_001_101:
  2884:           case 0b0111_010_101:
  2885:           case 0b0111_011_101:
  2886:           case 0b0111_100_101:
  2887:           case 0b0111_101_101:
  2888:           case 0b0111_110_101:
  2889:           case 0b0111_111_101:
  2890:             irpMvsWord ();
  2891:             break irpSwitch;
  2892: 
  2893:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2894:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2895:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2896:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2897:             //MVZ.B <ea>,Dq                                   |-|------|-|-UUUU|-0*00|D M+-WXZPI|0111_qqq_110_mmm_rrr (ISA_B)
  2898:           case 0b0111_000_110:
  2899:           case 0b0111_001_110:
  2900:           case 0b0111_010_110:
  2901:           case 0b0111_011_110:
  2902:           case 0b0111_100_110:
  2903:           case 0b0111_101_110:
  2904:           case 0b0111_110_110:
  2905:           case 0b0111_111_110:
  2906:             irpMvzByte ();
  2907:             break irpSwitch;
  2908: 
  2909:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2910:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2911:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2912:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2913:             //MVZ.W <ea>,Dq                                   |-|------|-|-UUUU|-0*00|D M+-WXZPI|0111_qqq_111_mmm_rrr (ISA_B)
  2914:           case 0b0111_000_111:
  2915:           case 0b0111_001_111:
  2916:           case 0b0111_010_111:
  2917:           case 0b0111_011_111:
  2918:           case 0b0111_100_111:
  2919:           case 0b0111_101_111:
  2920:           case 0b0111_110_111:
  2921:           case 0b0111_111_111:
  2922:             irpMvzWord ();
  2923:             break irpSwitch;
  2924: 
  2925:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2926:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2927:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2928:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2929:             //OR.B <ea>,Dq                                    |-|012346|-|-UUUU|-**00|D M+-WXZPI|1000_qqq_000_mmm_rrr
  2930:           case 0b1000_000_000:
  2931:           case 0b1000_001_000:
  2932:           case 0b1000_010_000:
  2933:           case 0b1000_011_000:
  2934:           case 0b1000_100_000:
  2935:           case 0b1000_101_000:
  2936:           case 0b1000_110_000:
  2937:           case 0b1000_111_000:
  2938:             irpOrToRegByte ();
  2939:             break irpSwitch;
  2940: 
  2941:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2942:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2943:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2944:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2945:             //OR.W <ea>,Dq                                    |-|012346|-|-UUUU|-**00|D M+-WXZPI|1000_qqq_001_mmm_rrr
  2946:           case 0b1000_000_001:
  2947:           case 0b1000_001_001:
  2948:           case 0b1000_010_001:
  2949:           case 0b1000_011_001:
  2950:           case 0b1000_100_001:
  2951:           case 0b1000_101_001:
  2952:           case 0b1000_110_001:
  2953:           case 0b1000_111_001:
  2954:             irpOrToRegWord ();
  2955:             break irpSwitch;
  2956: 
  2957:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2958:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2959:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2960:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2961:             //OR.L <ea>,Dq                                    |-|012346|-|-UUUU|-**00|D M+-WXZPI|1000_qqq_010_mmm_rrr
  2962:           case 0b1000_000_010:
  2963:           case 0b1000_001_010:
  2964:           case 0b1000_010_010:
  2965:           case 0b1000_011_010:
  2966:           case 0b1000_100_010:
  2967:           case 0b1000_101_010:
  2968:           case 0b1000_110_010:
  2969:           case 0b1000_111_010:
  2970:             irpOrToRegLong ();
  2971:             break irpSwitch;
  2972: 
  2973:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2974:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2975:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2976:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2977:             //DIVU.W <ea>,Dq                                  |-|012346|-|-UUUU|-***0|D M+-WXZPI|1000_qqq_011_mmm_rrr
  2978:           case 0b1000_000_011:
  2979:           case 0b1000_001_011:
  2980:           case 0b1000_010_011:
  2981:           case 0b1000_011_011:
  2982:           case 0b1000_100_011:
  2983:           case 0b1000_101_011:
  2984:           case 0b1000_110_011:
  2985:           case 0b1000_111_011:
  2986:             irpDivuWord ();
  2987:             break irpSwitch;
  2988: 
  2989:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2990:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2991:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2992:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2993:             //SBCD.B Dr,Dq                                    |-|012346|-|UUUUU|*U*U*|          |1000_qqq_100_000_rrr
  2994:             //SBCD.B -(Ar),-(Aq)                              |-|012346|-|UUUUU|*U*U*|          |1000_qqq_100_001_rrr
  2995:             //OR.B Dq,<ea>                                    |-|012346|-|-UUUU|-**00|  M+-WXZ  |1000_qqq_100_mmm_rrr
  2996:           case 0b1000_000_100:
  2997:           case 0b1000_001_100:
  2998:           case 0b1000_010_100:
  2999:           case 0b1000_011_100:
  3000:           case 0b1000_100_100:
  3001:           case 0b1000_101_100:
  3002:           case 0b1000_110_100:
  3003:           case 0b1000_111_100:
  3004:             irpOrToMemByte ();
  3005:             break irpSwitch;
  3006: 
  3007:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3008:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  3009:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  3010:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3011:             //PACK Dr,Dq,#<data>                              |-|--2346|-|-----|-----|          |1000_qqq_101_000_rrr-{data}
  3012:             //PACK -(Ar),-(Aq),#<data>                        |-|--2346|-|-----|-----|          |1000_qqq_101_001_rrr-{data}
  3013:             //OR.W Dq,<ea>                                    |-|012346|-|-UUUU|-**00|  M+-WXZ  |1000_qqq_101_mmm_rrr
  3014:           case 0b1000_000_101:
  3015:           case 0b1000_001_101:
  3016:           case 0b1000_010_101:
  3017:           case 0b1000_011_101:
  3018:           case 0b1000_100_101:
  3019:           case 0b1000_101_101:
  3020:           case 0b1000_110_101:
  3021:           case 0b1000_111_101:
  3022:             irpOrToMemWord ();
  3023:             break irpSwitch;
  3024: 
  3025:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3026:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  3027:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  3028:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3029:             //UNPK Dr,Dq,#<data>                              |-|--2346|-|-----|-----|          |1000_qqq_110_000_rrr-{data}
  3030:             //UNPK -(Ar),-(Aq),#<data>                        |-|--2346|-|-----|-----|          |1000_qqq_110_001_rrr-{data}
  3031:             //OR.L Dq,<ea>                                    |-|012346|-|-UUUU|-**00|  M+-WXZ  |1000_qqq_110_mmm_rrr
  3032:           case 0b1000_000_110:
  3033:           case 0b1000_001_110:
  3034:           case 0b1000_010_110:
  3035:           case 0b1000_011_110:
  3036:           case 0b1000_100_110:
  3037:           case 0b1000_101_110:
  3038:           case 0b1000_110_110:
  3039:           case 0b1000_111_110:
  3040:             irpOrToMemLong ();
  3041:             break irpSwitch;
  3042: 
  3043:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3044:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  3045:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  3046:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3047:             //DIVS.W <ea>,Dq                                  |-|012346|-|-UUUU|-***0|D M+-WXZPI|1000_qqq_111_mmm_rrr
  3048:           case 0b1000_000_111:
  3049:           case 0b1000_001_111:
  3050:           case 0b1000_010_111:
  3051:           case 0b1000_011_111:
  3052:           case 0b1000_100_111:
  3053:           case 0b1000_101_111:
  3054:           case 0b1000_110_111:
  3055:           case 0b1000_111_111:
  3056:             irpDivsWord ();
  3057:             break irpSwitch;
  3058: 
  3059:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3060:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  3061:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  3062:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3063:             //SUB.B <ea>,Dq                                   |-|012346|-|UUUUU|*****|D M+-WXZPI|1001_qqq_000_mmm_rrr
  3064:           case 0b1001_000_000:
  3065:           case 0b1001_001_000:
  3066:           case 0b1001_010_000:
  3067:           case 0b1001_011_000:
  3068:           case 0b1001_100_000:
  3069:           case 0b1001_101_000:
  3070:           case 0b1001_110_000:
  3071:           case 0b1001_111_000:
  3072:             irpSubToRegByte ();
  3073:             break irpSwitch;
  3074: 
  3075:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3076:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  3077:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  3078:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3079:             //SUB.W <ea>,Dq                                   |-|012346|-|UUUUU|*****|DAM+-WXZPI|1001_qqq_001_mmm_rrr
  3080:           case 0b1001_000_001:
  3081:           case 0b1001_001_001:
  3082:           case 0b1001_010_001:
  3083:           case 0b1001_011_001:
  3084:           case 0b1001_100_001:
  3085:           case 0b1001_101_001:
  3086:           case 0b1001_110_001:
  3087:           case 0b1001_111_001:
  3088:             irpSubToRegWord ();
  3089:             break irpSwitch;
  3090: 
  3091:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3092:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  3093:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  3094:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3095:             //SUB.L <ea>,Dq                                   |-|012346|-|UUUUU|*****|DAM+-WXZPI|1001_qqq_010_mmm_rrr
  3096:           case 0b1001_000_010:
  3097:           case 0b1001_001_010:
  3098:           case 0b1001_010_010:
  3099:           case 0b1001_011_010:
  3100:           case 0b1001_100_010:
  3101:           case 0b1001_101_010:
  3102:           case 0b1001_110_010:
  3103:           case 0b1001_111_010:
  3104:             irpSubToRegLong ();
  3105:             break irpSwitch;
  3106: 
  3107:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3108:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  3109:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  3110:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3111:             //SUBA.W <ea>,Aq                                  |-|012346|-|-----|-----|DAM+-WXZPI|1001_qqq_011_mmm_rrr
  3112:             //SUB.W <ea>,Aq                                   |A|012346|-|-----|-----|DAM+-WXZPI|1001_qqq_011_mmm_rrr [SUBA.W <ea>,Aq]
  3113:             //CLR.W Ar                                        |A|012346|-|-----|-----| A        |1001_rrr_011_001_rrr [SUBA.W Ar,Ar]
  3114:           case 0b1001_000_011:
  3115:           case 0b1001_001_011:
  3116:           case 0b1001_010_011:
  3117:           case 0b1001_011_011:
  3118:           case 0b1001_100_011:
  3119:           case 0b1001_101_011:
  3120:           case 0b1001_110_011:
  3121:           case 0b1001_111_011:
  3122:             irpSubaWord ();
  3123:             break irpSwitch;
  3124: 
  3125:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3126:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  3127:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  3128:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3129:             //SUBX.B Dr,Dq                                    |-|012346|-|*UUUU|*****|          |1001_qqq_100_000_rrr
  3130:             //SUBX.B -(Ar),-(Aq)                              |-|012346|-|*UUUU|*****|          |1001_qqq_100_001_rrr
  3131:             //SUB.B Dq,<ea>                                   |-|012346|-|UUUUU|*****|  M+-WXZ  |1001_qqq_100_mmm_rrr
  3132:           case 0b1001_000_100:
  3133:           case 0b1001_001_100:
  3134:           case 0b1001_010_100:
  3135:           case 0b1001_011_100:
  3136:           case 0b1001_100_100:
  3137:           case 0b1001_101_100:
  3138:           case 0b1001_110_100:
  3139:           case 0b1001_111_100:
  3140:             irpSubToMemByte ();
  3141:             break irpSwitch;
  3142: 
  3143:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3144:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  3145:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  3146:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3147:             //SUBX.W Dr,Dq                                    |-|012346|-|*UUUU|*****|          |1001_qqq_101_000_rrr
  3148:             //SUBX.W -(Ar),-(Aq)                              |-|012346|-|*UUUU|*****|          |1001_qqq_101_001_rrr
  3149:             //SUB.W Dq,<ea>                                   |-|012346|-|UUUUU|*****|  M+-WXZ  |1001_qqq_101_mmm_rrr
  3150:           case 0b1001_000_101:
  3151:           case 0b1001_001_101:
  3152:           case 0b1001_010_101:
  3153:           case 0b1001_011_101:
  3154:           case 0b1001_100_101:
  3155:           case 0b1001_101_101:
  3156:           case 0b1001_110_101:
  3157:           case 0b1001_111_101:
  3158:             irpSubToMemWord ();
  3159:             break irpSwitch;
  3160: 
  3161:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3162:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  3163:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  3164:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3165:             //SUBX.L Dr,Dq                                    |-|012346|-|*UUUU|*****|          |1001_qqq_110_000_rrr
  3166:             //SUBX.L -(Ar),-(Aq)                              |-|012346|-|*UUUU|*****|          |1001_qqq_110_001_rrr
  3167:             //SUB.L Dq,<ea>                                   |-|012346|-|UUUUU|*****|  M+-WXZ  |1001_qqq_110_mmm_rrr
  3168:           case 0b1001_000_110:
  3169:           case 0b1001_001_110:
  3170:           case 0b1001_010_110:
  3171:           case 0b1001_011_110:
  3172:           case 0b1001_100_110:
  3173:           case 0b1001_101_110:
  3174:           case 0b1001_110_110:
  3175:           case 0b1001_111_110:
  3176:             irpSubToMemLong ();
  3177:             break irpSwitch;
  3178: 
  3179:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3180:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  3181:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  3182:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3183:             //SUBA.L <ea>,Aq                                  |-|012346|-|-----|-----|DAM+-WXZPI|1001_qqq_111_mmm_rrr
  3184:             //SUB.L <ea>,Aq                                   |A|012346|-|-----|-----|DAM+-WXZPI|1001_qqq_111_mmm_rrr [SUBA.L <ea>,Aq]
  3185:             //CLR.L Ar                                        |A|012346|-|-----|-----| A        |1001_rrr_111_001_rrr [SUBA.L Ar,Ar]
  3186:           case 0b1001_000_111:
  3187:           case 0b1001_001_111:
  3188:           case 0b1001_010_111:
  3189:           case 0b1001_011_111:
  3190:           case 0b1001_100_111:
  3191:           case 0b1001_101_111:
  3192:           case 0b1001_110_111:
  3193:           case 0b1001_111_111:
  3194:             irpSubaLong ();
  3195:             break irpSwitch;
  3196: 
  3197:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3198:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  3199:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  3200:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3201:             //SXCALL <name>                                   |A|012346|-|UUUUU|*****|          |1010_0dd_ddd_ddd_ddd [ALINE #<data>]
  3202:           case 0b1010_000_000:
  3203:           case 0b1010_000_001:
  3204:           case 0b1010_000_010:
  3205:           case 0b1010_000_011:
  3206:           case 0b1010_000_100:
  3207:           case 0b1010_000_101:
  3208:           case 0b1010_000_110:
  3209:           case 0b1010_000_111:
  3210:           case 0b1010_001_000:
  3211:           case 0b1010_001_001:
  3212:           case 0b1010_001_010:
  3213:           case 0b1010_001_011:
  3214:           case 0b1010_001_100:
  3215:           case 0b1010_001_101:
  3216:           case 0b1010_001_110:
  3217:           case 0b1010_001_111:
  3218:           case 0b1010_010_000:
  3219:           case 0b1010_010_001:
  3220:           case 0b1010_010_010:
  3221:           case 0b1010_010_011:
  3222:           case 0b1010_010_100:
  3223:           case 0b1010_010_101:
  3224:           case 0b1010_010_110:
  3225:           case 0b1010_010_111:
  3226:           case 0b1010_011_000:
  3227:           case 0b1010_011_001:
  3228:           case 0b1010_011_010:
  3229:           case 0b1010_011_011:
  3230:           case 0b1010_011_100:
  3231:           case 0b1010_011_101:
  3232:           case 0b1010_011_110:
  3233:           case 0b1010_011_111:
  3234:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3235:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  3236:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  3237:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3238:             //ALINE #<data>                                   |-|012346|-|UUUUU|*****|          |1010_ddd_ddd_ddd_ddd (line 1010 emulator)
  3239:           case 0b1010_100_000:
  3240:           case 0b1010_100_001:
  3241:           case 0b1010_100_010:
  3242:           case 0b1010_100_011:
  3243:           case 0b1010_100_100:
  3244:           case 0b1010_100_101:
  3245:           case 0b1010_100_110:
  3246:           case 0b1010_100_111:
  3247:           case 0b1010_101_000:
  3248:           case 0b1010_101_001:
  3249:           case 0b1010_101_010:
  3250:           case 0b1010_101_011:
  3251:           case 0b1010_101_100:
  3252:           case 0b1010_101_101:
  3253:           case 0b1010_101_110:
  3254:           case 0b1010_101_111:
  3255:           case 0b1010_110_000:
  3256:           case 0b1010_110_001:
  3257:           case 0b1010_110_010:
  3258:           case 0b1010_110_011:
  3259:           case 0b1010_110_100:
  3260:           case 0b1010_110_101:
  3261:           case 0b1010_110_110:
  3262:           case 0b1010_110_111:
  3263:           case 0b1010_111_000:
  3264:           case 0b1010_111_001:
  3265:           case 0b1010_111_010:
  3266:           case 0b1010_111_011:
  3267:           case 0b1010_111_100:
  3268:           case 0b1010_111_101:
  3269:           case 0b1010_111_110:
  3270:           case 0b1010_111_111:
  3271:             irpAline ();
  3272:             break irpSwitch;
  3273: 
  3274:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3275:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  3276:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  3277:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3278:             //CMP.B <ea>,Dq                                   |-|012346|-|-UUUU|-****|D M+-WXZPI|1011_qqq_000_mmm_rrr
  3279:           case 0b1011_000_000:
  3280:           case 0b1011_001_000:
  3281:           case 0b1011_010_000:
  3282:           case 0b1011_011_000:
  3283:           case 0b1011_100_000:
  3284:           case 0b1011_101_000:
  3285:           case 0b1011_110_000:
  3286:           case 0b1011_111_000:
  3287:             irpCmpByte ();
  3288:             break irpSwitch;
  3289: 
  3290:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3291:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  3292:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  3293:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3294:             //CMP.W <ea>,Dq                                   |-|012346|-|-UUUU|-****|DAM+-WXZPI|1011_qqq_001_mmm_rrr
  3295:           case 0b1011_000_001:
  3296:           case 0b1011_001_001:
  3297:           case 0b1011_010_001:
  3298:           case 0b1011_011_001:
  3299:           case 0b1011_100_001:
  3300:           case 0b1011_101_001:
  3301:           case 0b1011_110_001:
  3302:           case 0b1011_111_001:
  3303:             irpCmpWord ();
  3304:             break irpSwitch;
  3305: 
  3306:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3307:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  3308:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  3309:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3310:             //CMP.L <ea>,Dq                                   |-|012346|-|-UUUU|-****|DAM+-WXZPI|1011_qqq_010_mmm_rrr
  3311:           case 0b1011_000_010:
  3312:           case 0b1011_001_010:
  3313:           case 0b1011_010_010:
  3314:           case 0b1011_011_010:
  3315:           case 0b1011_100_010:
  3316:           case 0b1011_101_010:
  3317:           case 0b1011_110_010:
  3318:           case 0b1011_111_010:
  3319:             irpCmpLong ();
  3320:             break irpSwitch;
  3321: 
  3322:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3323:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  3324:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  3325:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3326:             //CMPA.W <ea>,Aq                                  |-|012346|-|-UUUU|-****|DAM+-WXZPI|1011_qqq_011_mmm_rrr
  3327:             //CMP.W <ea>,Aq                                   |A|012346|-|-UUUU|-****|DAM+-WXZPI|1011_qqq_011_mmm_rrr [CMPA.W <ea>,Aq]
  3328:           case 0b1011_000_011:
  3329:           case 0b1011_001_011:
  3330:           case 0b1011_010_011:
  3331:           case 0b1011_011_011:
  3332:           case 0b1011_100_011:
  3333:           case 0b1011_101_011:
  3334:           case 0b1011_110_011:
  3335:           case 0b1011_111_011:
  3336:             irpCmpaWord ();
  3337:             break irpSwitch;
  3338: 
  3339:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3340:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  3341:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  3342:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3343:             //EOR.B Dq,<ea>                                   |-|012346|-|-UUUU|-**00|D M+-WXZ  |1011_qqq_100_mmm_rrr
  3344:             //CMPM.B (Ar)+,(Aq)+                              |-|012346|-|-UUUU|-****|          |1011_qqq_100_001_rrr
  3345:           case 0b1011_000_100:
  3346:           case 0b1011_001_100:
  3347:           case 0b1011_010_100:
  3348:           case 0b1011_011_100:
  3349:           case 0b1011_100_100:
  3350:           case 0b1011_101_100:
  3351:           case 0b1011_110_100:
  3352:           case 0b1011_111_100:
  3353:             irpEorByte ();
  3354:             break irpSwitch;
  3355: 
  3356:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3357:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  3358:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  3359:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3360:             //EOR.W Dq,<ea>                                   |-|012346|-|-UUUU|-**00|D M+-WXZ  |1011_qqq_101_mmm_rrr
  3361:             //CMPM.W (Ar)+,(Aq)+                              |-|012346|-|-UUUU|-****|          |1011_qqq_101_001_rrr
  3362:           case 0b1011_000_101:
  3363:           case 0b1011_001_101:
  3364:           case 0b1011_010_101:
  3365:           case 0b1011_011_101:
  3366:           case 0b1011_100_101:
  3367:           case 0b1011_101_101:
  3368:           case 0b1011_110_101:
  3369:           case 0b1011_111_101:
  3370:             irpEorWord ();
  3371:             break irpSwitch;
  3372: 
  3373:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3374:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  3375:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  3376:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3377:             //EOR.L Dq,<ea>                                   |-|012346|-|-UUUU|-**00|D M+-WXZ  |1011_qqq_110_mmm_rrr
  3378:             //CMPM.L (Ar)+,(Aq)+                              |-|012346|-|-UUUU|-****|          |1011_qqq_110_001_rrr
  3379:           case 0b1011_000_110:
  3380:           case 0b1011_001_110:
  3381:           case 0b1011_010_110:
  3382:           case 0b1011_011_110:
  3383:           case 0b1011_100_110:
  3384:           case 0b1011_101_110:
  3385:           case 0b1011_110_110:
  3386:           case 0b1011_111_110:
  3387:             irpEorLong ();
  3388:             break irpSwitch;
  3389: 
  3390:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3391:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  3392:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  3393:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3394:             //CMPA.L <ea>,Aq                                  |-|012346|-|-UUUU|-****|DAM+-WXZPI|1011_qqq_111_mmm_rrr
  3395:             //CMP.L <ea>,Aq                                   |A|012346|-|-UUUU|-****|DAM+-WXZPI|1011_qqq_111_mmm_rrr [CMPA.L <ea>,Aq]
  3396:           case 0b1011_000_111:
  3397:           case 0b1011_001_111:
  3398:           case 0b1011_010_111:
  3399:           case 0b1011_011_111:
  3400:           case 0b1011_100_111:
  3401:           case 0b1011_101_111:
  3402:           case 0b1011_110_111:
  3403:           case 0b1011_111_111:
  3404:             irpCmpaLong ();
  3405:             break irpSwitch;
  3406: 
  3407:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3408:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  3409:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  3410:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3411:             //AND.B <ea>,Dq                                   |-|012346|-|-UUUU|-**00|D M+-WXZPI|1100_qqq_000_mmm_rrr
  3412:           case 0b1100_000_000:
  3413:           case 0b1100_001_000:
  3414:           case 0b1100_010_000:
  3415:           case 0b1100_011_000:
  3416:           case 0b1100_100_000:
  3417:           case 0b1100_101_000:
  3418:           case 0b1100_110_000:
  3419:           case 0b1100_111_000:
  3420:             irpAndToRegByte ();
  3421:             break irpSwitch;
  3422: 
  3423:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3424:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  3425:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  3426:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3427:             //AND.W <ea>,Dq                                   |-|012346|-|-UUUU|-**00|D M+-WXZPI|1100_qqq_001_mmm_rrr
  3428:           case 0b1100_000_001:
  3429:           case 0b1100_001_001:
  3430:           case 0b1100_010_001:
  3431:           case 0b1100_011_001:
  3432:           case 0b1100_100_001:
  3433:           case 0b1100_101_001:
  3434:           case 0b1100_110_001:
  3435:           case 0b1100_111_001:
  3436:             irpAndToRegWord ();
  3437:             break irpSwitch;
  3438: 
  3439:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3440:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  3441:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  3442:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3443:             //AND.L <ea>,Dq                                   |-|012346|-|-UUUU|-**00|D M+-WXZPI|1100_qqq_010_mmm_rrr
  3444:           case 0b1100_000_010:
  3445:           case 0b1100_001_010:
  3446:           case 0b1100_010_010:
  3447:           case 0b1100_011_010:
  3448:           case 0b1100_100_010:
  3449:           case 0b1100_101_010:
  3450:           case 0b1100_110_010:
  3451:           case 0b1100_111_010:
  3452:             irpAndToRegLong ();
  3453:             break irpSwitch;
  3454: 
  3455:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3456:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  3457:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  3458:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3459:             //MULU.W <ea>,Dq                                  |-|012346|-|-UUUU|-***0|D M+-WXZPI|1100_qqq_011_mmm_rrr
  3460:           case 0b1100_000_011:
  3461:           case 0b1100_001_011:
  3462:           case 0b1100_010_011:
  3463:           case 0b1100_011_011:
  3464:           case 0b1100_100_011:
  3465:           case 0b1100_101_011:
  3466:           case 0b1100_110_011:
  3467:           case 0b1100_111_011:
  3468:             irpMuluWord ();
  3469:             break irpSwitch;
  3470: 
  3471:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3472:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  3473:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  3474:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3475:             //ABCD.B Dr,Dq                                    |-|012346|-|UUUUU|*U*U*|          |1100_qqq_100_000_rrr
  3476:             //ABCD.B -(Ar),-(Aq)                              |-|012346|-|UUUUU|*U*U*|          |1100_qqq_100_001_rrr
  3477:             //AND.B Dq,<ea>                                   |-|012346|-|-UUUU|-**00|  M+-WXZ  |1100_qqq_100_mmm_rrr
  3478:           case 0b1100_000_100:
  3479:           case 0b1100_001_100:
  3480:           case 0b1100_010_100:
  3481:           case 0b1100_011_100:
  3482:           case 0b1100_100_100:
  3483:           case 0b1100_101_100:
  3484:           case 0b1100_110_100:
  3485:           case 0b1100_111_100:
  3486:             irpAndToMemByte ();
  3487:             break irpSwitch;
  3488: 
  3489:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3490:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  3491:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  3492:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3493:             //EXG.L Dq,Dr                                     |-|012346|-|-----|-----|          |1100_qqq_101_000_rrr
  3494:             //EXG.L Aq,Ar                                     |-|012346|-|-----|-----|          |1100_qqq_101_001_rrr
  3495:             //AND.W Dq,<ea>                                   |-|012346|-|-UUUU|-**00|  M+-WXZ  |1100_qqq_101_mmm_rrr
  3496:           case 0b1100_000_101:
  3497:           case 0b1100_001_101:
  3498:           case 0b1100_010_101:
  3499:           case 0b1100_011_101:
  3500:           case 0b1100_100_101:
  3501:           case 0b1100_101_101:
  3502:           case 0b1100_110_101:
  3503:           case 0b1100_111_101:
  3504:             irpAndToMemWord ();
  3505:             break irpSwitch;
  3506: 
  3507:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3508:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  3509:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  3510:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3511:             //EXG.L Dq,Ar                                     |-|012346|-|-----|-----|          |1100_qqq_110_001_rrr
  3512:             //AND.L Dq,<ea>                                   |-|012346|-|-UUUU|-**00|  M+-WXZ  |1100_qqq_110_mmm_rrr
  3513:           case 0b1100_000_110:
  3514:           case 0b1100_001_110:
  3515:           case 0b1100_010_110:
  3516:           case 0b1100_011_110:
  3517:           case 0b1100_100_110:
  3518:           case 0b1100_101_110:
  3519:           case 0b1100_110_110:
  3520:           case 0b1100_111_110:
  3521:             irpAndToMemLong ();
  3522:             break irpSwitch;
  3523: 
  3524:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3525:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  3526:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  3527:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3528:             //MULS.W <ea>,Dq                                  |-|012346|-|-UUUU|-***0|D M+-WXZPI|1100_qqq_111_mmm_rrr
  3529:           case 0b1100_000_111:
  3530:           case 0b1100_001_111:
  3531:           case 0b1100_010_111:
  3532:           case 0b1100_011_111:
  3533:           case 0b1100_100_111:
  3534:           case 0b1100_101_111:
  3535:           case 0b1100_110_111:
  3536:           case 0b1100_111_111:
  3537:             irpMulsWord ();
  3538:             break irpSwitch;
  3539: 
  3540:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3541:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  3542:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  3543:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3544:             //ADD.B <ea>,Dq                                   |-|012346|-|UUUUU|*****|D M+-WXZPI|1101_qqq_000_mmm_rrr
  3545:           case 0b1101_000_000:
  3546:           case 0b1101_001_000:
  3547:           case 0b1101_010_000:
  3548:           case 0b1101_011_000:
  3549:           case 0b1101_100_000:
  3550:           case 0b1101_101_000:
  3551:           case 0b1101_110_000:
  3552:           case 0b1101_111_000:
  3553:             irpAddToRegByte ();
  3554:             break irpSwitch;
  3555: 
  3556:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3557:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  3558:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  3559:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3560:             //ADD.W <ea>,Dq                                   |-|012346|-|UUUUU|*****|DAM+-WXZPI|1101_qqq_001_mmm_rrr
  3561:           case 0b1101_000_001:
  3562:           case 0b1101_001_001:
  3563:           case 0b1101_010_001:
  3564:           case 0b1101_011_001:
  3565:           case 0b1101_100_001:
  3566:           case 0b1101_101_001:
  3567:           case 0b1101_110_001:
  3568:           case 0b1101_111_001:
  3569:             irpAddToRegWord ();
  3570:             break irpSwitch;
  3571: 
  3572:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3573:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  3574:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  3575:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3576:             //ADD.L <ea>,Dq                                   |-|012346|-|UUUUU|*****|DAM+-WXZPI|1101_qqq_010_mmm_rrr
  3577:           case 0b1101_000_010:
  3578:           case 0b1101_001_010:
  3579:           case 0b1101_010_010:
  3580:           case 0b1101_011_010:
  3581:           case 0b1101_100_010:
  3582:           case 0b1101_101_010:
  3583:           case 0b1101_110_010:
  3584:           case 0b1101_111_010:
  3585:             irpAddToRegLong ();
  3586:             break irpSwitch;
  3587: 
  3588:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3589:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  3590:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  3591:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3592:             //ADDA.W <ea>,Aq                                  |-|012346|-|-----|-----|DAM+-WXZPI|1101_qqq_011_mmm_rrr
  3593:             //ADD.W <ea>,Aq                                   |A|012346|-|-----|-----|DAM+-WXZPI|1101_qqq_011_mmm_rrr [ADDA.W <ea>,Aq]
  3594:           case 0b1101_000_011:
  3595:           case 0b1101_001_011:
  3596:           case 0b1101_010_011:
  3597:           case 0b1101_011_011:
  3598:           case 0b1101_100_011:
  3599:           case 0b1101_101_011:
  3600:           case 0b1101_110_011:
  3601:           case 0b1101_111_011:
  3602:             irpAddaWord ();
  3603:             break irpSwitch;
  3604: 
  3605:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3606:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  3607:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  3608:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3609:             //ADDX.B Dr,Dq                                    |-|012346|-|*UUUU|*****|          |1101_qqq_100_000_rrr
  3610:             //ADDX.B -(Ar),-(Aq)                              |-|012346|-|*UUUU|*****|          |1101_qqq_100_001_rrr
  3611:             //ADD.B Dq,<ea>                                   |-|012346|-|UUUUU|*****|  M+-WXZ  |1101_qqq_100_mmm_rrr
  3612:           case 0b1101_000_100:
  3613:           case 0b1101_001_100:
  3614:           case 0b1101_010_100:
  3615:           case 0b1101_011_100:
  3616:           case 0b1101_100_100:
  3617:           case 0b1101_101_100:
  3618:           case 0b1101_110_100:
  3619:           case 0b1101_111_100:
  3620:             irpAddToMemByte ();
  3621:             break irpSwitch;
  3622: 
  3623:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3624:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  3625:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  3626:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3627:             //ADDX.W Dr,Dq                                    |-|012346|-|*UUUU|*****|          |1101_qqq_101_000_rrr
  3628:             //ADDX.W -(Ar),-(Aq)                              |-|012346|-|*UUUU|*****|          |1101_qqq_101_001_rrr
  3629:             //ADD.W Dq,<ea>                                   |-|012346|-|UUUUU|*****|  M+-WXZ  |1101_qqq_101_mmm_rrr
  3630:           case 0b1101_000_101:
  3631:           case 0b1101_001_101:
  3632:           case 0b1101_010_101:
  3633:           case 0b1101_011_101:
  3634:           case 0b1101_100_101:
  3635:           case 0b1101_101_101:
  3636:           case 0b1101_110_101:
  3637:           case 0b1101_111_101:
  3638:             irpAddToMemWord ();
  3639:             break irpSwitch;
  3640: 
  3641:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3642:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  3643:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  3644:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3645:             //ADDX.L Dr,Dq                                    |-|012346|-|*UUUU|*****|          |1101_qqq_110_000_rrr
  3646:             //ADDX.L -(Ar),-(Aq)                              |-|012346|-|*UUUU|*****|          |1101_qqq_110_001_rrr
  3647:             //ADD.L Dq,<ea>                                   |-|012346|-|UUUUU|*****|  M+-WXZ  |1101_qqq_110_mmm_rrr
  3648:           case 0b1101_000_110:
  3649:           case 0b1101_001_110:
  3650:           case 0b1101_010_110:
  3651:           case 0b1101_011_110:
  3652:           case 0b1101_100_110:
  3653:           case 0b1101_101_110:
  3654:           case 0b1101_110_110:
  3655:           case 0b1101_111_110:
  3656:             irpAddToMemLong ();
  3657:             break irpSwitch;
  3658: 
  3659:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3660:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  3661:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  3662:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3663:             //ADDA.L <ea>,Aq                                  |-|012346|-|-----|-----|DAM+-WXZPI|1101_qqq_111_mmm_rrr
  3664:             //ADD.L <ea>,Aq                                   |A|012346|-|-----|-----|DAM+-WXZPI|1101_qqq_111_mmm_rrr [ADDA.L <ea>,Aq]
  3665:           case 0b1101_000_111:
  3666:           case 0b1101_001_111:
  3667:           case 0b1101_010_111:
  3668:           case 0b1101_011_111:
  3669:           case 0b1101_100_111:
  3670:           case 0b1101_101_111:
  3671:           case 0b1101_110_111:
  3672:           case 0b1101_111_111:
  3673:             irpAddaLong ();
  3674:             break irpSwitch;
  3675: 
  3676:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3677:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  3678:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  3679:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3680:             //ASR.B #<data>,Dr                                |-|012346|-|UUUUU|***0*|          |1110_qqq_000_000_rrr
  3681:             //LSR.B #<data>,Dr                                |-|012346|-|UUUUU|***0*|          |1110_qqq_000_001_rrr
  3682:             //ROXR.B #<data>,Dr                               |-|012346|-|*UUUU|***0*|          |1110_qqq_000_010_rrr
  3683:             //ROR.B #<data>,Dr                                |-|012346|-|-UUUU|-**0*|          |1110_qqq_000_011_rrr
  3684:             //ASR.B Dq,Dr                                     |-|012346|-|UUUUU|***0*|          |1110_qqq_000_100_rrr
  3685:             //LSR.B Dq,Dr                                     |-|012346|-|UUUUU|***0*|          |1110_qqq_000_101_rrr
  3686:             //ROXR.B Dq,Dr                                    |-|012346|-|*UUUU|***0*|          |1110_qqq_000_110_rrr
  3687:             //ROR.B Dq,Dr                                     |-|012346|-|-UUUU|-**0*|          |1110_qqq_000_111_rrr
  3688:             //ASR.B Dr                                        |A|012346|-|UUUUU|***0*|          |1110_001_000_000_rrr [ASR.B #1,Dr]
  3689:             //LSR.B Dr                                        |A|012346|-|UUUUU|***0*|          |1110_001_000_001_rrr [LSR.B #1,Dr]
  3690:             //ROXR.B Dr                                       |A|012346|-|*UUUU|***0*|          |1110_001_000_010_rrr [ROXR.B #1,Dr]
  3691:             //ROR.B Dr                                        |A|012346|-|-UUUU|-**0*|          |1110_001_000_011_rrr [ROR.B #1,Dr]
  3692:           case 0b1110_000_000:
  3693:           case 0b1110_001_000:
  3694:           case 0b1110_010_000:
  3695:           case 0b1110_011_000:
  3696:           case 0b1110_100_000:
  3697:           case 0b1110_101_000:
  3698:           case 0b1110_110_000:
  3699:           case 0b1110_111_000:
  3700:             irpXxrToRegByte ();
  3701:             break irpSwitch;
  3702: 
  3703:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3704:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  3705:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  3706:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3707:             //ASR.W #<data>,Dr                                |-|012346|-|UUUUU|***0*|          |1110_qqq_001_000_rrr
  3708:             //LSR.W #<data>,Dr                                |-|012346|-|UUUUU|***0*|          |1110_qqq_001_001_rrr
  3709:             //ROXR.W #<data>,Dr                               |-|012346|-|*UUUU|***0*|          |1110_qqq_001_010_rrr
  3710:             //ROR.W #<data>,Dr                                |-|012346|-|-UUUU|-**0*|          |1110_qqq_001_011_rrr
  3711:             //ASR.W Dq,Dr                                     |-|012346|-|UUUUU|***0*|          |1110_qqq_001_100_rrr
  3712:             //LSR.W Dq,Dr                                     |-|012346|-|UUUUU|***0*|          |1110_qqq_001_101_rrr
  3713:             //ROXR.W Dq,Dr                                    |-|012346|-|*UUUU|***0*|          |1110_qqq_001_110_rrr
  3714:             //ROR.W Dq,Dr                                     |-|012346|-|-UUUU|-**0*|          |1110_qqq_001_111_rrr
  3715:             //ASR.W Dr                                        |A|012346|-|UUUUU|***0*|          |1110_001_001_000_rrr [ASR.W #1,Dr]
  3716:             //LSR.W Dr                                        |A|012346|-|UUUUU|***0*|          |1110_001_001_001_rrr [LSR.W #1,Dr]
  3717:             //ROXR.W Dr                                       |A|012346|-|*UUUU|***0*|          |1110_001_001_010_rrr [ROXR.W #1,Dr]
  3718:             //ROR.W Dr                                        |A|012346|-|-UUUU|-**0*|          |1110_001_001_011_rrr [ROR.W #1,Dr]
  3719:           case 0b1110_000_001:
  3720:           case 0b1110_001_001:
  3721:           case 0b1110_010_001:
  3722:           case 0b1110_011_001:
  3723:           case 0b1110_100_001:
  3724:           case 0b1110_101_001:
  3725:           case 0b1110_110_001:
  3726:           case 0b1110_111_001:
  3727:             irpXxrToRegWord ();
  3728:             break irpSwitch;
  3729: 
  3730:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3731:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  3732:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  3733:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3734:             //ASR.L #<data>,Dr                                |-|012346|-|UUUUU|***0*|          |1110_qqq_010_000_rrr
  3735:             //LSR.L #<data>,Dr                                |-|012346|-|UUUUU|***0*|          |1110_qqq_010_001_rrr
  3736:             //ROXR.L #<data>,Dr                               |-|012346|-|*UUUU|***0*|          |1110_qqq_010_010_rrr
  3737:             //ROR.L #<data>,Dr                                |-|012346|-|-UUUU|-**0*|          |1110_qqq_010_011_rrr
  3738:             //ASR.L Dq,Dr                                     |-|012346|-|UUUUU|***0*|          |1110_qqq_010_100_rrr
  3739:             //LSR.L Dq,Dr                                     |-|012346|-|UUUUU|***0*|          |1110_qqq_010_101_rrr
  3740:             //ROXR.L Dq,Dr                                    |-|012346|-|*UUUU|***0*|          |1110_qqq_010_110_rrr
  3741:             //ROR.L Dq,Dr                                     |-|012346|-|-UUUU|-**0*|          |1110_qqq_010_111_rrr
  3742:             //ASR.L Dr                                        |A|012346|-|UUUUU|***0*|          |1110_001_010_000_rrr [ASR.L #1,Dr]
  3743:             //LSR.L Dr                                        |A|012346|-|UUUUU|***0*|          |1110_001_010_001_rrr [LSR.L #1,Dr]
  3744:             //ROXR.L Dr                                       |A|012346|-|*UUUU|***0*|          |1110_001_010_010_rrr [ROXR.L #1,Dr]
  3745:             //ROR.L Dr                                        |A|012346|-|-UUUU|-**0*|          |1110_001_010_011_rrr [ROR.L #1,Dr]
  3746:           case 0b1110_000_010:
  3747:           case 0b1110_001_010:
  3748:           case 0b1110_010_010:
  3749:           case 0b1110_011_010:
  3750:           case 0b1110_100_010:
  3751:           case 0b1110_101_010:
  3752:           case 0b1110_110_010:
  3753:           case 0b1110_111_010:
  3754:             irpXxrToRegLong ();
  3755:             break irpSwitch;
  3756: 
  3757:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3758:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  3759:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  3760:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3761:             //ASR.W <ea>                                      |-|012346|-|UUUUU|***0*|  M+-WXZ  |1110_000_011_mmm_rrr
  3762:           case 0b1110_000_011:
  3763:             irpAsrToMem ();
  3764:             break irpSwitch;
  3765: 
  3766:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3767:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  3768:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  3769:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3770:             //ASL.B #<data>,Dr                                |-|012346|-|UUUUU|*****|          |1110_qqq_100_000_rrr
  3771:             //LSL.B #<data>,Dr                                |-|012346|-|UUUUU|***0*|          |1110_qqq_100_001_rrr
  3772:             //ROXL.B #<data>,Dr                               |-|012346|-|*UUUU|***0*|          |1110_qqq_100_010_rrr
  3773:             //ROL.B #<data>,Dr                                |-|012346|-|-UUUU|-**0*|          |1110_qqq_100_011_rrr
  3774:             //ASL.B Dq,Dr                                     |-|012346|-|UUUUU|*****|          |1110_qqq_100_100_rrr
  3775:             //LSL.B Dq,Dr                                     |-|012346|-|UUUUU|***0*|          |1110_qqq_100_101_rrr
  3776:             //ROXL.B Dq,Dr                                    |-|012346|-|*UUUU|***0*|          |1110_qqq_100_110_rrr
  3777:             //ROL.B Dq,Dr                                     |-|012346|-|-UUUU|-**0*|          |1110_qqq_100_111_rrr
  3778:             //ASL.B Dr                                        |A|012346|-|UUUUU|*****|          |1110_001_100_000_rrr [ASL.B #1,Dr]
  3779:             //LSL.B Dr                                        |A|012346|-|UUUUU|***0*|          |1110_001_100_001_rrr [LSL.B #1,Dr]
  3780:             //ROXL.B Dr                                       |A|012346|-|*UUUU|***0*|          |1110_001_100_010_rrr [ROXL.B #1,Dr]
  3781:             //ROL.B Dr                                        |A|012346|-|-UUUU|-**0*|          |1110_001_100_011_rrr [ROL.B #1,Dr]
  3782:           case 0b1110_000_100:
  3783:           case 0b1110_001_100:
  3784:           case 0b1110_010_100:
  3785:           case 0b1110_011_100:
  3786:           case 0b1110_100_100:
  3787:           case 0b1110_101_100:
  3788:           case 0b1110_110_100:
  3789:           case 0b1110_111_100:
  3790:             irpXxlToRegByte ();
  3791:             break irpSwitch;
  3792: 
  3793:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3794:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  3795:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  3796:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3797:             //ASL.W #<data>,Dr                                |-|012346|-|UUUUU|*****|          |1110_qqq_101_000_rrr
  3798:             //LSL.W #<data>,Dr                                |-|012346|-|UUUUU|***0*|          |1110_qqq_101_001_rrr
  3799:             //ROXL.W #<data>,Dr                               |-|012346|-|*UUUU|***0*|          |1110_qqq_101_010_rrr
  3800:             //ROL.W #<data>,Dr                                |-|012346|-|-UUUU|-**0*|          |1110_qqq_101_011_rrr
  3801:             //ASL.W Dq,Dr                                     |-|012346|-|UUUUU|*****|          |1110_qqq_101_100_rrr
  3802:             //LSL.W Dq,Dr                                     |-|012346|-|UUUUU|***0*|          |1110_qqq_101_101_rrr
  3803:             //ROXL.W Dq,Dr                                    |-|012346|-|*UUUU|***0*|          |1110_qqq_101_110_rrr
  3804:             //ROL.W Dq,Dr                                     |-|012346|-|-UUUU|-**0*|          |1110_qqq_101_111_rrr
  3805:             //ASL.W Dr                                        |A|012346|-|UUUUU|*****|          |1110_001_101_000_rrr [ASL.W #1,Dr]
  3806:             //LSL.W Dr                                        |A|012346|-|UUUUU|***0*|          |1110_001_101_001_rrr [LSL.W #1,Dr]
  3807:             //ROXL.W Dr                                       |A|012346|-|*UUUU|***0*|          |1110_001_101_010_rrr [ROXL.W #1,Dr]
  3808:             //ROL.W Dr                                        |A|012346|-|-UUUU|-**0*|          |1110_001_101_011_rrr [ROL.W #1,Dr]
  3809:           case 0b1110_000_101:
  3810:           case 0b1110_001_101:
  3811:           case 0b1110_010_101:
  3812:           case 0b1110_011_101:
  3813:           case 0b1110_100_101:
  3814:           case 0b1110_101_101:
  3815:           case 0b1110_110_101:
  3816:           case 0b1110_111_101:
  3817:             irpXxlToRegWord ();
  3818:             break irpSwitch;
  3819: 
  3820:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3821:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  3822:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  3823:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3824:             //ASL.L #<data>,Dr                                |-|012346|-|UUUUU|*****|          |1110_qqq_110_000_rrr
  3825:             //LSL.L #<data>,Dr                                |-|012346|-|UUUUU|***0*|          |1110_qqq_110_001_rrr
  3826:             //ROXL.L #<data>,Dr                               |-|012346|-|*UUUU|***0*|          |1110_qqq_110_010_rrr
  3827:             //ROL.L #<data>,Dr                                |-|012346|-|-UUUU|-**0*|          |1110_qqq_110_011_rrr
  3828:             //ASL.L Dq,Dr                                     |-|012346|-|UUUUU|*****|          |1110_qqq_110_100_rrr
  3829:             //LSL.L Dq,Dr                                     |-|012346|-|UUUUU|***0*|          |1110_qqq_110_101_rrr
  3830:             //ROXL.L Dq,Dr                                    |-|012346|-|*UUUU|***0*|          |1110_qqq_110_110_rrr
  3831:             //ROL.L Dq,Dr                                     |-|012346|-|-UUUU|-**0*|          |1110_qqq_110_111_rrr
  3832:             //ASL.L Dr                                        |A|012346|-|UUUUU|*****|          |1110_001_110_000_rrr [ASL.L #1,Dr]
  3833:             //LSL.L Dr                                        |A|012346|-|UUUUU|***0*|          |1110_001_110_001_rrr [LSL.L #1,Dr]
  3834:             //ROXL.L Dr                                       |A|012346|-|*UUUU|***0*|          |1110_001_110_010_rrr [ROXL.L #1,Dr]
  3835:             //ROL.L Dr                                        |A|012346|-|-UUUU|-**0*|          |1110_001_110_011_rrr [ROL.L #1,Dr]
  3836:           case 0b1110_000_110:
  3837:           case 0b1110_001_110:
  3838:           case 0b1110_010_110:
  3839:           case 0b1110_011_110:
  3840:           case 0b1110_100_110:
  3841:           case 0b1110_101_110:
  3842:           case 0b1110_110_110:
  3843:           case 0b1110_111_110:
  3844:             irpXxlToRegLong ();
  3845:             break irpSwitch;
  3846: 
  3847:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3848:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  3849:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  3850:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3851:             //ASL.W <ea>                                      |-|012346|-|UUUUU|*****|  M+-WXZ  |1110_000_111_mmm_rrr
  3852:           case 0b1110_000_111:
  3853:             irpAslToMem ();
  3854:             break irpSwitch;
  3855: 
  3856:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3857:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  3858:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  3859:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3860:             //LSR.W <ea>                                      |-|012346|-|UUUUU|*0*0*|  M+-WXZ  |1110_001_011_mmm_rrr
  3861:           case 0b1110_001_011:
  3862:             irpLsrToMem ();
  3863:             break irpSwitch;
  3864: 
  3865:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3866:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  3867:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  3868:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3869:             //LSL.W <ea>                                      |-|012346|-|UUUUU|***0*|  M+-WXZ  |1110_001_111_mmm_rrr
  3870:           case 0b1110_001_111:
  3871:             irpLslToMem ();
  3872:             break irpSwitch;
  3873: 
  3874:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3875:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  3876:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  3877:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3878:             //ROXR.W <ea>                                     |-|012346|-|*UUUU|***0*|  M+-WXZ  |1110_010_011_mmm_rrr
  3879:           case 0b1110_010_011:
  3880:             irpRoxrToMem ();
  3881:             break irpSwitch;
  3882: 
  3883:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3884:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  3885:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  3886:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3887:             //ROXL.W <ea>                                     |-|012346|-|*UUUU|***0*|  M+-WXZ  |1110_010_111_mmm_rrr
  3888:           case 0b1110_010_111:
  3889:             irpRoxlToMem ();
  3890:             break irpSwitch;
  3891: 
  3892:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3893:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  3894:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  3895:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3896:             //ROR.W <ea>                                      |-|012346|-|-UUUU|-**0*|  M+-WXZ  |1110_011_011_mmm_rrr
  3897:           case 0b1110_011_011:
  3898:             irpRorToMem ();
  3899:             break irpSwitch;
  3900: 
  3901:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3902:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  3903:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  3904:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3905:             //ROL.W <ea>                                      |-|012346|-|-UUUU|-**0*|  M+-WXZ  |1110_011_111_mmm_rrr
  3906:           case 0b1110_011_111:
  3907:             irpRolToMem ();
  3908:             break irpSwitch;
  3909: 
  3910:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3911:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  3912:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  3913:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3914:             //BFTST <ea>{#o:#w}                               |-|--2346|-|-UUUU|-**00|D M  WXZP |1110_100_011_mmm_rrr-00000ooooo0wwwww
  3915:             //BFTST <ea>{#o:Dw}                               |-|--2346|-|-UUUU|-**00|D M  WXZP |1110_100_011_mmm_rrr-00000ooooo100www
  3916:             //BFTST <ea>{Do:#w}                               |-|--2346|-|-UUUU|-**00|D M  WXZP |1110_100_011_mmm_rrr-0000100ooo0wwwww
  3917:             //BFTST <ea>{Do:Dw}                               |-|--2346|-|-UUUU|-**00|D M  WXZP |1110_100_011_mmm_rrr-0000100ooo100www
  3918:           case 0b1110_100_011:
  3919:             irpBftst ();
  3920:             break irpSwitch;
  3921: 
  3922:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3923:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  3924:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  3925:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3926:             //BFEXTU <ea>{#o:#w},Dn                           |-|--2346|-|-UUUU|-**00|D M  WXZP |1110_100_111_mmm_rrr-0nnn0ooooo0wwwww
  3927:             //BFEXTU <ea>{#o:Dw},Dn                           |-|--2346|-|-UUUU|-**00|D M  WXZP |1110_100_111_mmm_rrr-0nnn0ooooo100www
  3928:             //BFEXTU <ea>{Do:#w},Dn                           |-|--2346|-|-UUUU|-**00|D M  WXZP |1110_100_111_mmm_rrr-0nnn100ooo0wwwww
  3929:             //BFEXTU <ea>{Do:Dw},Dn                           |-|--2346|-|-UUUU|-**00|D M  WXZP |1110_100_111_mmm_rrr-0nnn100ooo100www
  3930:           case 0b1110_100_111:
  3931:             irpBfextu ();
  3932:             break irpSwitch;
  3933: 
  3934:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3935:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  3936:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  3937:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3938:             //BFCHG <ea>{#o:#w}                               |-|--2346|-|-UUUU|-**00|D M  WXZ  |1110_101_011_mmm_rrr-00000ooooo0wwwww
  3939:             //BFCHG <ea>{#o:Dw}                               |-|--2346|-|-UUUU|-**00|D M  WXZ  |1110_101_011_mmm_rrr-00000ooooo100www
  3940:             //BFCHG <ea>{Do:#w}                               |-|--2346|-|-UUUU|-**00|D M  WXZ  |1110_101_011_mmm_rrr-0000100ooo0wwwww
  3941:             //BFCHG <ea>{Do:Dw}                               |-|--2346|-|-UUUU|-**00|D M  WXZ  |1110_101_011_mmm_rrr-0000100ooo100www
  3942:           case 0b1110_101_011:
  3943:             irpBfchg ();
  3944:             break irpSwitch;
  3945: 
  3946:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3947:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  3948:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  3949:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3950:             //BFEXTS <ea>{#o:#w},Dn                           |-|--2346|-|-UUUU|-**00|D M  WXZP |1110_101_111_mmm_rrr-0nnn0ooooo0wwwww
  3951:             //BFEXTS <ea>{#o:Dw},Dn                           |-|--2346|-|-UUUU|-**00|D M  WXZP |1110_101_111_mmm_rrr-0nnn0ooooo100www
  3952:             //BFEXTS <ea>{Do:#w},Dn                           |-|--2346|-|-UUUU|-**00|D M  WXZP |1110_101_111_mmm_rrr-0nnn100ooo0wwwww
  3953:             //BFEXTS <ea>{Do:Dw},Dn                           |-|--2346|-|-UUUU|-**00|D M  WXZP |1110_101_111_mmm_rrr-0nnn100ooo100www
  3954:           case 0b1110_101_111:
  3955:             irpBfexts ();
  3956:             break irpSwitch;
  3957: 
  3958:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3959:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  3960:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  3961:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3962:             //BFCLR <ea>{#o:#w}                               |-|--2346|-|-UUUU|-**00|D M  WXZ  |1110_110_011_mmm_rrr-00000ooooo0wwwww
  3963:             //BFCLR <ea>{#o:Dw}                               |-|--2346|-|-UUUU|-**00|D M  WXZ  |1110_110_011_mmm_rrr-00000ooooo100www
  3964:             //BFCLR <ea>{Do:#w}                               |-|--2346|-|-UUUU|-**00|D M  WXZ  |1110_110_011_mmm_rrr-0000100ooo0wwwww
  3965:             //BFCLR <ea>{Do:Dw}                               |-|--2346|-|-UUUU|-**00|D M  WXZ  |1110_110_011_mmm_rrr-0000100ooo100www
  3966:           case 0b1110_110_011:
  3967:             irpBfclr ();
  3968:             break irpSwitch;
  3969: 
  3970:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3971:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  3972:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  3973:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3974:             //BFFFO <ea>{#o:#w},Dn                            |-|--2346|-|-UUUU|-**00|D M  WXZP |1110_110_111_mmm_rrr-0nnn0ooooo0wwwww
  3975:             //BFFFO <ea>{#o:Dw},Dn                            |-|--2346|-|-UUUU|-**00|D M  WXZP |1110_110_111_mmm_rrr-0nnn0ooooo100www
  3976:             //BFFFO <ea>{Do:#w},Dn                            |-|--2346|-|-UUUU|-**00|D M  WXZP |1110_110_111_mmm_rrr-0nnn100ooo0wwwww
  3977:             //BFFFO <ea>{Do:Dw},Dn                            |-|--2346|-|-UUUU|-**00|D M  WXZP |1110_110_111_mmm_rrr-0nnn100ooo100www
  3978:           case 0b1110_110_111:
  3979:             irpBfffo ();
  3980:             break irpSwitch;
  3981: 
  3982:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3983:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  3984:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  3985:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3986:             //BFSET <ea>{#o:#w}                               |-|--2346|-|-UUUU|-**00|D M  WXZ  |1110_111_011_mmm_rrr-00000ooooo0wwwww
  3987:             //BFSET <ea>{#o:Dw}                               |-|--2346|-|-UUUU|-**00|D M  WXZ  |1110_111_011_mmm_rrr-00000ooooo100www
  3988:             //BFSET <ea>{Do:#w}                               |-|--2346|-|-UUUU|-**00|D M  WXZ  |1110_111_011_mmm_rrr-0000100ooo0wwwww
  3989:             //BFSET <ea>{Do:Dw}                               |-|--2346|-|-UUUU|-**00|D M  WXZ  |1110_111_011_mmm_rrr-0000100ooo100www
  3990:           case 0b1110_111_011:
  3991:             irpBfset ();
  3992:             break irpSwitch;
  3993: 
  3994:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3995:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  3996:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  3997:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3998:             //BFINS Dn,<ea>{#o:#w}                            |-|--2346|-|-UUUU|-**00|D M  WXZ  |1110_111_111_mmm_rrr-0nnn0ooooo0wwwww
  3999:             //BFINS Dn,<ea>{#o:Dw}                            |-|--2346|-|-UUUU|-**00|D M  WXZ  |1110_111_111_mmm_rrr-0nnn0ooooo100www
  4000:             //BFINS Dn,<ea>{Do:#w}                            |-|--2346|-|-UUUU|-**00|D M  WXZ  |1110_111_111_mmm_rrr-0nnn100ooo0wwwww
  4001:             //BFINS Dn,<ea>{Do:Dw}                            |-|--2346|-|-UUUU|-**00|D M  WXZ  |1110_111_111_mmm_rrr-0nnn100ooo100www
  4002:           case 0b1110_111_111:
  4003:             irpBfins ();
  4004:             break irpSwitch;
  4005: 
  4006:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  4007:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  4008:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  4009:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  4010:             //FTST.X FPm                                      |-|--CC46|-|-----|-----|          |1111_001_000_000_000-000mmm0000111010
  4011:             //FMOVE.X FPm,FPn                                 |-|--CC46|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0000000
  4012:             //FINT.X FPm,FPn                                  |-|--CCS6|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0000001
  4013:             //FSINH.X FPm,FPn                                 |-|--CCSS|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0000010
  4014:             //FINTRZ.X FPm,FPn                                |-|--CCS6|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0000011
  4015:             //FSQRT.X FPm,FPn                                 |-|--CC46|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0000100
  4016:             //FLOGNP1.X FPm,FPn                               |-|--CCSS|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0000110
  4017:             //FETOXM1.X FPm,FPn                               |-|--CCSS|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0001000
  4018:             //FTANH.X FPm,FPn                                 |-|--CCSS|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0001001
  4019:             //FATAN.X FPm,FPn                                 |-|--CCSS|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0001010
  4020:             //FASIN.X FPm,FPn                                 |-|--CCSS|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0001100
  4021:             //FATANH.X FPm,FPn                                |-|--CCSS|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0001101
  4022:             //FSIN.X FPm,FPn                                  |-|--CCSS|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0001110
  4023:             //FTAN.X FPm,FPn                                  |-|--CCSS|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0001111
  4024:             //FETOX.X FPm,FPn                                 |-|--CCSS|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0010000
  4025:             //FTWOTOX.X FPm,FPn                               |-|--CCSS|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0010001
  4026:             //FTENTOX.X FPm,FPn                               |-|--CCSS|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0010010
  4027:             //FLOGN.X FPm,FPn                                 |-|--CCSS|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0010100
  4028:             //FLOG10.X FPm,FPn                                |-|--CCSS|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0010101
  4029:             //FLOG2.X FPm,FPn                                 |-|--CCSS|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0010110
  4030:             //FABS.X FPm,FPn                                  |-|--CC46|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0011000
  4031:             //FCOSH.X FPm,FPn                                 |-|--CCSS|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0011001
  4032:             //FNEG.X FPm,FPn                                  |-|--CC46|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0011010
  4033:             //FACOS.X FPm,FPn                                 |-|--CCSS|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0011100
  4034:             //FCOS.X FPm,FPn                                  |-|--CCSS|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0011101
  4035:             //FGETEXP.X FPm,FPn                               |-|--CCSS|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0011110
  4036:             //FGETMAN.X FPm,FPn                               |-|--CCSS|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0011111
  4037:             //FDIV.X FPm,FPn                                  |-|--CC46|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0100000
  4038:             //FMOD.X FPm,FPn                                  |-|--CCSS|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0100001
  4039:             //FADD.X FPm,FPn                                  |-|--CC46|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0100010
  4040:             //FMUL.X FPm,FPn                                  |-|--CC46|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0100011
  4041:             //FSGLDIV.X FPm,FPn                               |-|--CCS6|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0100100
  4042:             //FREM.X FPm,FPn                                  |-|--CCSS|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0100101
  4043:             //FSCALE.X FPm,FPn                                |-|--CCSS|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0100110
  4044:             //FSGLMUL.X FPm,FPn                               |-|--CCS6|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0100111
  4045:             //FSUB.X FPm,FPn                                  |-|--CC46|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0101000
  4046:             //FCMP.X FPm,FPn                                  |-|--CC46|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0111000
  4047:             //FSMOVE.X FPm,FPn                                |-|----46|-|-----|-----|          |1111_001_000_000_000-000mmmnnn1000000
  4048:             //FSSQRT.X FPm,FPn                                |-|----46|-|-----|-----|          |1111_001_000_000_000-000mmmnnn1000001
  4049:             //FDMOVE.X FPm,FPn                                |-|----46|-|-----|-----|          |1111_001_000_000_000-000mmmnnn1000100
  4050:             //FDSQRT.X FPm,FPn                                |-|----46|-|-----|-----|          |1111_001_000_000_000-000mmmnnn1000101
  4051:             //FSABS.X FPm,FPn                                 |-|----46|-|-----|-----|          |1111_001_000_000_000-000mmmnnn1011000
  4052:             //FSNEG.X FPm,FPn                                 |-|----46|-|-----|-----|          |1111_001_000_000_000-000mmmnnn1011010
  4053:             //FDABS.X FPm,FPn                                 |-|----46|-|-----|-----|          |1111_001_000_000_000-000mmmnnn1011100
  4054:             //FDNEG.X FPm,FPn                                 |-|----46|-|-----|-----|          |1111_001_000_000_000-000mmmnnn1011110
  4055:             //FSDIV.X FPm,FPn                                 |-|----46|-|-----|-----|          |1111_001_000_000_000-000mmmnnn1100000
  4056:             //FSADD.X FPm,FPn                                 |-|----46|-|-----|-----|          |1111_001_000_000_000-000mmmnnn1100010
  4057:             //FSMUL.X FPm,FPn                                 |-|----46|-|-----|-----|          |1111_001_000_000_000-000mmmnnn1100011
  4058:             //FDDIV.X FPm,FPn                                 |-|----46|-|-----|-----|          |1111_001_000_000_000-000mmmnnn1100100
  4059:             //FDADD.X FPm,FPn                                 |-|----46|-|-----|-----|          |1111_001_000_000_000-000mmmnnn1100110
  4060:             //FDMUL.X FPm,FPn                                 |-|----46|-|-----|-----|          |1111_001_000_000_000-000mmmnnn1100111
  4061:             //FSSUB.X FPm,FPn                                 |-|----46|-|-----|-----|          |1111_001_000_000_000-000mmmnnn1101000
  4062:             //FDSUB.X FPm,FPn                                 |-|----46|-|-----|-----|          |1111_001_000_000_000-000mmmnnn1101100
  4063:             //FSINCOS.X FPm,FPc:FPs                           |-|--CCSS|-|-----|-----|          |1111_001_000_000_000-000mmmsss0110ccc
  4064:             //FMOVECR.X #ccc,FPn                              |-|--CCSS|-|-----|-----|          |1111_001_000_000_000-010111nnn0cccccc
  4065:             //FMOVE.L FPn,<ea>                                |-|--CC46|-|-----|-----|D M+-WXZ  |1111_001_000_mmm_rrr-011000nnn0000000
  4066:             //FMOVE.S FPn,<ea>                                |-|--CC46|-|-----|-----|D M+-WXZ  |1111_001_000_mmm_rrr-011001nnn0000000
  4067:             //FMOVE.W FPn,<ea>                                |-|--CC46|-|-----|-----|D M+-WXZ  |1111_001_000_mmm_rrr-011100nnn0000000
  4068:             //FMOVE.B FPn,<ea>                                |-|--CC46|-|-----|-----|D M+-WXZ  |1111_001_000_mmm_rrr-011110nnn0000000
  4069:             //FMOVE.L FPIAR,<ea>                              |-|--CC46|-|-----|-----|DAM+-WXZ  |1111_001_000_mmm_rrr-1010010000000000
  4070:             //FMOVEM.L FPIAR,<ea>                             |-|--CC46|-|-----|-----|DAM+-WXZ  |1111_001_000_mmm_rrr-1010010000000000
  4071:             //FMOVE.L FPSR,<ea>                               |-|--CC46|-|-----|-----|D M+-WXZ  |1111_001_000_mmm_rrr-1010100000000000
  4072:             //FMOVEM.L FPSR,<ea>                              |-|--CC46|-|-----|-----|D M+-WXZ  |1111_001_000_mmm_rrr-1010100000000000
  4073:             //FMOVE.L FPCR,<ea>                               |-|--CC46|-|-----|-----|D M+-WXZ  |1111_001_000_mmm_rrr-1011000000000000
  4074:             //FMOVEM.L FPCR,<ea>                              |-|--CC46|-|-----|-----|D M+-WXZ  |1111_001_000_mmm_rrr-1011000000000000
  4075:             //FTST.L <ea>                                     |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-0100000000111010
  4076:             //FMOVE.L <ea>,FPn                                |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0000000
  4077:             //FINT.L <ea>,FPn                                 |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0000001
  4078:             //FSINH.L <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0000010
  4079:             //FINTRZ.L <ea>,FPn                               |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0000011
  4080:             //FSQRT.L <ea>,FPn                                |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0000100
  4081:             //FLOGNP1.L <ea>,FPn                              |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0000110
  4082:             //FETOXM1.L <ea>,FPn                              |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0001000
  4083:             //FTANH.L <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0001001
  4084:             //FATAN.L <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0001010
  4085:             //FASIN.L <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0001100
  4086:             //FATANH.L <ea>,FPn                               |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0001101
  4087:             //FSIN.L <ea>,FPn                                 |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0001110
  4088:             //FTAN.L <ea>,FPn                                 |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0001111
  4089:             //FETOX.L <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0010000
  4090:             //FTWOTOX.L <ea>,FPn                              |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0010001
  4091:             //FTENTOX.L <ea>,FPn                              |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0010010
  4092:             //FLOGN.L <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0010100
  4093:             //FLOG10.L <ea>,FPn                               |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0010101
  4094:             //FLOG2.L <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0010110
  4095:             //FABS.L <ea>,FPn                                 |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0011000
  4096:             //FCOSH.L <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0011001
  4097:             //FNEG.L <ea>,FPn                                 |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0011010
  4098:             //FACOS.L <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0011100
  4099:             //FCOS.L <ea>,FPn                                 |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0011101
  4100:             //FGETEXP.L <ea>,FPn                              |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0011110
  4101:             //FGETMAN.L <ea>,FPn                              |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0011111
  4102:             //FDIV.L <ea>,FPn                                 |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0100000
  4103:             //FMOD.L <ea>,FPn                                 |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0100001
  4104:             //FADD.L <ea>,FPn                                 |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0100010
  4105:             //FMUL.L <ea>,FPn                                 |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0100011
  4106:             //FSGLDIV.L <ea>,FPn                              |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0100100
  4107:             //FREM.L <ea>,FPn                                 |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0100101
  4108:             //FSCALE.L <ea>,FPn                               |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0100110
  4109:             //FSGLMUL.L <ea>,FPn                              |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0100111
  4110:             //FSUB.L <ea>,FPn                                 |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0101000
  4111:             //FCMP.L <ea>,FPn                                 |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0111000
  4112:             //FSMOVE.L <ea>,FPn                               |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn1000000
  4113:             //FSSQRT.L <ea>,FPn                               |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn1000001
  4114:             //FDMOVE.L <ea>,FPn                               |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn1000100
  4115:             //FDSQRT.L <ea>,FPn                               |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn1000101
  4116:             //FSABS.L <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn1011000
  4117:             //FSNEG.L <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn1011010
  4118:             //FDABS.L <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn1011100
  4119:             //FDNEG.L <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn1011110
  4120:             //FSDIV.L <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn1100000
  4121:             //FSADD.L <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn1100010
  4122:             //FSMUL.L <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn1100011
  4123:             //FDDIV.L <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn1100100
  4124:             //FDADD.L <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn1100110
  4125:             //FDMUL.L <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn1100111
  4126:             //FSSUB.L <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn1101000
  4127:             //FDSUB.L <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn1101100
  4128:             //FSINCOS.L <ea>,FPc:FPs                          |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000sss0110ccc
  4129:             //FTST.S <ea>                                     |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-0100010000111010
  4130:             //FMOVE.S <ea>,FPn                                |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0000000
  4131:             //FINT.S <ea>,FPn                                 |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0000001
  4132:             //FSINH.S <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0000010
  4133:             //FINTRZ.S <ea>,FPn                               |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0000011
  4134:             //FSQRT.S <ea>,FPn                                |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0000100
  4135:             //FLOGNP1.S <ea>,FPn                              |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0000110
  4136:             //FETOXM1.S <ea>,FPn                              |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0001000
  4137:             //FTANH.S <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0001001
  4138:             //FATAN.S <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0001010
  4139:             //FASIN.S <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0001100
  4140:             //FATANH.S <ea>,FPn                               |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0001101
  4141:             //FSIN.S <ea>,FPn                                 |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0001110
  4142:             //FTAN.S <ea>,FPn                                 |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0001111
  4143:             //FETOX.S <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0010000
  4144:             //FTWOTOX.S <ea>,FPn                              |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0010001
  4145:             //FTENTOX.S <ea>,FPn                              |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0010010
  4146:             //FLOGN.S <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0010100
  4147:             //FLOG10.S <ea>,FPn                               |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0010101
  4148:             //FLOG2.S <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0010110
  4149:             //FABS.S <ea>,FPn                                 |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0011000
  4150:             //FCOSH.S <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0011001
  4151:             //FNEG.S <ea>,FPn                                 |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0011010
  4152:             //FACOS.S <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0011100
  4153:             //FCOS.S <ea>,FPn                                 |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0011101
  4154:             //FGETEXP.S <ea>,FPn                              |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0011110
  4155:             //FGETMAN.S <ea>,FPn                              |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0011111
  4156:             //FDIV.S <ea>,FPn                                 |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0100000
  4157:             //FMOD.S <ea>,FPn                                 |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0100001
  4158:             //FADD.S <ea>,FPn                                 |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0100010
  4159:             //FMUL.S <ea>,FPn                                 |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0100011
  4160:             //FSGLDIV.S <ea>,FPn                              |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0100100
  4161:             //FREM.S <ea>,FPn                                 |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0100101
  4162:             //FSCALE.S <ea>,FPn                               |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0100110
  4163:             //FSGLMUL.S <ea>,FPn                              |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0100111
  4164:             //FSUB.S <ea>,FPn                                 |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0101000
  4165:             //FCMP.S <ea>,FPn                                 |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0111000
  4166:             //FSMOVE.S <ea>,FPn                               |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn1000000
  4167:             //FSSQRT.S <ea>,FPn                               |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn1000001
  4168:             //FDMOVE.S <ea>,FPn                               |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn1000100
  4169:             //FDSQRT.S <ea>,FPn                               |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn1000101
  4170:             //FSABS.S <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn1011000
  4171:             //FSNEG.S <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn1011010
  4172:             //FDABS.S <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn1011100
  4173:             //FDNEG.S <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn1011110
  4174:             //FSDIV.S <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn1100000
  4175:             //FSADD.S <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn1100010
  4176:             //FSMUL.S <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn1100011
  4177:             //FDDIV.S <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn1100100
  4178:             //FDADD.S <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn1100110
  4179:             //FDMUL.S <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn1100111
  4180:             //FSSUB.S <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn1101000
  4181:             //FDSUB.S <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn1101100
  4182:             //FSINCOS.S <ea>,FPc:FPs                          |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001sss0110ccc
  4183:             //FTST.W <ea>                                     |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-0101000000111010
  4184:             //FMOVE.W <ea>,FPn                                |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0000000
  4185:             //FINT.W <ea>,FPn                                 |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0000001
  4186:             //FSINH.W <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0000010
  4187:             //FINTRZ.W <ea>,FPn                               |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0000011
  4188:             //FSQRT.W <ea>,FPn                                |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0000100
  4189:             //FLOGNP1.W <ea>,FPn                              |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0000110
  4190:             //FETOXM1.W <ea>,FPn                              |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0001000
  4191:             //FTANH.W <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0001001
  4192:             //FATAN.W <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0001010
  4193:             //FASIN.W <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0001100
  4194:             //FATANH.W <ea>,FPn                               |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0001101
  4195:             //FSIN.W <ea>,FPn                                 |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0001110
  4196:             //FTAN.W <ea>,FPn                                 |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0001111
  4197:             //FETOX.W <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0010000
  4198:             //FTWOTOX.W <ea>,FPn                              |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0010001
  4199:             //FTENTOX.W <ea>,FPn                              |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0010010
  4200:             //FLOGN.W <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0010100
  4201:             //FLOG10.W <ea>,FPn                               |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0010101
  4202:             //FLOG2.W <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0010110
  4203:             //FABS.W <ea>,FPn                                 |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0011000
  4204:             //FCOSH.W <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0011001
  4205:             //FNEG.W <ea>,FPn                                 |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0011010
  4206:             //FACOS.W <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0011100
  4207:             //FCOS.W <ea>,FPn                                 |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0011101
  4208:             //FGETEXP.W <ea>,FPn                              |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0011110
  4209:             //FGETMAN.W <ea>,FPn                              |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0011111
  4210:             //FDIV.W <ea>,FPn                                 |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0100000
  4211:             //FMOD.W <ea>,FPn                                 |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0100001
  4212:             //FADD.W <ea>,FPn                                 |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0100010
  4213:             //FMUL.W <ea>,FPn                                 |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0100011
  4214:             //FSGLDIV.W <ea>,FPn                              |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0100100
  4215:             //FREM.W <ea>,FPn                                 |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0100101
  4216:             //FSCALE.W <ea>,FPn                               |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0100110
  4217:             //FSGLMUL.W <ea>,FPn                              |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0100111
  4218:             //FSUB.W <ea>,FPn                                 |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0101000
  4219:             //FCMP.W <ea>,FPn                                 |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0111000
  4220:             //FSMOVE.W <ea>,FPn                               |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn1000000
  4221:             //FSSQRT.W <ea>,FPn                               |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn1000001
  4222:             //FDMOVE.W <ea>,FPn                               |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn1000100
  4223:             //FDSQRT.W <ea>,FPn                               |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn1000101
  4224:             //FSABS.W <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn1011000
  4225:             //FSNEG.W <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn1011010
  4226:             //FDABS.W <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn1011100
  4227:             //FDNEG.W <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn1011110
  4228:             //FSDIV.W <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn1100000
  4229:             //FSADD.W <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn1100010
  4230:             //FSMUL.W <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn1100011
  4231:             //FDDIV.W <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn1100100
  4232:             //FDADD.W <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn1100110
  4233:             //FDMUL.W <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn1100111
  4234:             //FSSUB.W <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn1101000
  4235:             //FDSUB.W <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn1101100
  4236:             //FSINCOS.W <ea>,FPc:FPs                          |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100sss0110ccc
  4237:             //FTST.B <ea>                                     |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-0101100000111010
  4238:             //FMOVE.B <ea>,FPn                                |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0000000
  4239:             //FINT.B <ea>,FPn                                 |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0000001
  4240:             //FSINH.B <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0000010
  4241:             //FINTRZ.B <ea>,FPn                               |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0000011
  4242:             //FSQRT.B <ea>,FPn                                |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0000100
  4243:             //FLOGNP1.B <ea>,FPn                              |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0000110
  4244:             //FETOXM1.B <ea>,FPn                              |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0001000
  4245:             //FTANH.B <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0001001
  4246:             //FATAN.B <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0001010
  4247:             //FASIN.B <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0001100
  4248:             //FATANH.B <ea>,FPn                               |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0001101
  4249:             //FSIN.B <ea>,FPn                                 |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0001110
  4250:             //FTAN.B <ea>,FPn                                 |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0001111
  4251:             //FETOX.B <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0010000
  4252:             //FTWOTOX.B <ea>,FPn                              |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0010001
  4253:             //FTENTOX.B <ea>,FPn                              |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0010010
  4254:             //FLOGN.B <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0010100
  4255:             //FLOG10.B <ea>,FPn                               |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0010101
  4256:             //FLOG2.B <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0010110
  4257:             //FABS.B <ea>,FPn                                 |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0011000
  4258:             //FCOSH.B <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0011001
  4259:             //FNEG.B <ea>,FPn                                 |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0011010
  4260:             //FACOS.B <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0011100
  4261:             //FCOS.B <ea>,FPn                                 |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0011101
  4262:             //FGETEXP.B <ea>,FPn                              |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0011110
  4263:             //FGETMAN.B <ea>,FPn                              |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0011111
  4264:             //FDIV.B <ea>,FPn                                 |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0100000
  4265:             //FMOD.B <ea>,FPn                                 |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0100001
  4266:             //FADD.B <ea>,FPn                                 |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0100010
  4267:             //FMUL.B <ea>,FPn                                 |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0100011
  4268:             //FSGLDIV.B <ea>,FPn                              |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0100100
  4269:             //FREM.B <ea>,FPn                                 |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0100101
  4270:             //FSCALE.B <ea>,FPn                               |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0100110
  4271:             //FSGLMUL.B <ea>,FPn                              |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0100111
  4272:             //FSUB.B <ea>,FPn                                 |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0101000
  4273:             //FCMP.B <ea>,FPn                                 |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0111000
  4274:             //FSMOVE.B <ea>,FPn                               |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn1000000
  4275:             //FSSQRT.B <ea>,FPn                               |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn1000001
  4276:             //FDMOVE.B <ea>,FPn                               |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn1000100
  4277:             //FDSQRT.B <ea>,FPn                               |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn1000101
  4278:             //FSABS.B <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn1011000
  4279:             //FSNEG.B <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn1011010
  4280:             //FDABS.B <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn1011100
  4281:             //FDNEG.B <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn1011110
  4282:             //FSDIV.B <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn1100000
  4283:             //FSADD.B <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn1100010
  4284:             //FSMUL.B <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn1100011
  4285:             //FDDIV.B <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn1100100
  4286:             //FDADD.B <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn1100110
  4287:             //FDMUL.B <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn1100111
  4288:             //FSSUB.B <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn1101000
  4289:             //FDSUB.B <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn1101100
  4290:             //FSINCOS.B <ea>,FPc:FPs                          |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110sss0110ccc
  4291:             //FMOVE.L <ea>,FPIAR                              |-|--CC46|-|-----|-----|DAM+-WXZPI|1111_001_000_mmm_rrr-1000010000000000
  4292:             //FMOVEM.L <ea>,FPIAR                             |-|--CC46|-|-----|-----|DAM+-WXZPI|1111_001_000_mmm_rrr-1000010000000000
  4293:             //FMOVE.L <ea>,FPSR                               |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-1000100000000000
  4294:             //FMOVEM.L <ea>,FPSR                              |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-1000100000000000
  4295:             //FMOVE.L <ea>,FPCR                               |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-1001000000000000
  4296:             //FMOVEM.L <ea>,FPCR                              |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-1001000000000000
  4297:             //FMOVE.X FPn,<ea>                                |-|--CC46|-|-----|-----|  M+-WXZ  |1111_001_000_mmm_rrr-011010nnn0000000
  4298:             //FMOVE.P FPn,<ea>{#k}                            |-|--CCSS|-|-----|-----|  M+-WXZ  |1111_001_000_mmm_rrr-011011nnnkkkkkkk
  4299:             //FMOVE.D FPn,<ea>                                |-|--CC46|-|-----|-----|  M+-WXZ  |1111_001_000_mmm_rrr-011101nnn0000000
  4300:             //FMOVE.P FPn,<ea>{Dk}                            |-|--CCSS|-|-----|-----|  M+-WXZ  |1111_001_000_mmm_rrr-011111nnnkkk0000
  4301:             //FMOVEM.L FPSR/FPIAR,<ea>                        |-|--CC46|-|-----|-----|  M+-WXZ  |1111_001_000_mmm_rrr-1010110000000000
  4302:             //FMOVEM.L FPCR/FPIAR,<ea>                        |-|--CC46|-|-----|-----|  M+-WXZ  |1111_001_000_mmm_rrr-1011010000000000
  4303:             //FMOVEM.L FPCR/FPSR,<ea>                         |-|--CC46|-|-----|-----|  M+-WXZ  |1111_001_000_mmm_rrr-1011100000000000
  4304:             //FMOVEM.L FPCR/FPSR/FPIAR,<ea>                   |-|--CC46|-|-----|-----|  M+-WXZ  |1111_001_000_mmm_rrr-1011110000000000
  4305:             //FMOVEM.X #<data>,<ea>                           |-|--CC46|-|-----|-----|  M  WXZ  |1111_001_000_mmm_rrr-11110000dddddddd
  4306:             //FMOVEM.X <list>,<ea>                            |-|--CC46|-|-----|-----|  M  WXZ  |1111_001_000_mmm_rrr-11110000llllllll
  4307:             //FMOVEM.X Dl,<ea>                                |-|--CC4S|-|-----|-----|  M  WXZ  |1111_001_000_mmm_rrr-111110000lll0000
  4308:             //FMOVEM.L <ea>,FPSR/FPIAR                        |-|--CC46|-|-----|-----|  M+-WXZP |1111_001_000_mmm_rrr-1000110000000000
  4309:             //FMOVEM.L <ea>,FPCR/FPIAR                        |-|--CC46|-|-----|-----|  M+-WXZP |1111_001_000_mmm_rrr-1001010000000000
  4310:             //FMOVEM.L <ea>,FPCR/FPSR                         |-|--CC46|-|-----|-----|  M+-WXZP |1111_001_000_mmm_rrr-1001100000000000
  4311:             //FMOVEM.L <ea>,FPCR/FPSR/FPIAR                   |-|--CC46|-|-----|-----|  M+-WXZP |1111_001_000_mmm_rrr-1001110000000000
  4312:             //FMOVEM.X <ea>,#<data>                           |-|--CC46|-|-----|-----|  M+ WXZP |1111_001_000_mmm_rrr-11010000dddddddd
  4313:             //FMOVEM.X <ea>,<list>                            |-|--CC46|-|-----|-----|  M+ WXZP |1111_001_000_mmm_rrr-11010000llllllll
  4314:             //FMOVEM.X <ea>,Dl                                |-|--CC4S|-|-----|-----|  M+ WXZP |1111_001_000_mmm_rrr-110110000lll0000
  4315:             //FTST.X <ea>                                     |-|--CC46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-0100100000111010
  4316:             //FMOVE.X <ea>,FPn                                |-|--CC46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0000000
  4317:             //FINT.X <ea>,FPn                                 |-|--CCS6|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0000001
  4318:             //FSINH.X <ea>,FPn                                |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0000010
  4319:             //FINTRZ.X <ea>,FPn                               |-|--CCS6|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0000011
  4320:             //FSQRT.X <ea>,FPn                                |-|--CC46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0000100
  4321:             //FLOGNP1.X <ea>,FPn                              |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0000110
  4322:             //FETOXM1.X <ea>,FPn                              |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0001000
  4323:             //FTANH.X <ea>,FPn                                |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0001001
  4324:             //FATAN.X <ea>,FPn                                |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0001010
  4325:             //FASIN.X <ea>,FPn                                |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0001100
  4326:             //FATANH.X <ea>,FPn                               |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0001101
  4327:             //FSIN.X <ea>,FPn                                 |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0001110
  4328:             //FTAN.X <ea>,FPn                                 |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0001111
  4329:             //FETOX.X <ea>,FPn                                |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0010000
  4330:             //FTWOTOX.X <ea>,FPn                              |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0010001
  4331:             //FTENTOX.X <ea>,FPn                              |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0010010
  4332:             //FLOGN.X <ea>,FPn                                |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0010100
  4333:             //FLOG10.X <ea>,FPn                               |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0010101
  4334:             //FLOG2.X <ea>,FPn                                |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0010110
  4335:             //FABS.X <ea>,FPn                                 |-|--CC46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0011000
  4336:             //FCOSH.X <ea>,FPn                                |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0011001
  4337:             //FNEG.X <ea>,FPn                                 |-|--CC46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0011010
  4338:             //FACOS.X <ea>,FPn                                |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0011100
  4339:             //FCOS.X <ea>,FPn                                 |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0011101
  4340:             //FGETEXP.X <ea>,FPn                              |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0011110
  4341:             //FGETMAN.X <ea>,FPn                              |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0011111
  4342:             //FDIV.X <ea>,FPn                                 |-|--CC46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0100000
  4343:             //FMOD.X <ea>,FPn                                 |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0100001
  4344:             //FADD.X <ea>,FPn                                 |-|--CC46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0100010
  4345:             //FMUL.X <ea>,FPn                                 |-|--CC46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0100011
  4346:             //FSGLDIV.X <ea>,FPn                              |-|--CCS6|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0100100
  4347:             //FREM.X <ea>,FPn                                 |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0100101
  4348:             //FSCALE.X <ea>,FPn                               |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0100110
  4349:             //FSGLMUL.X <ea>,FPn                              |-|--CCS6|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0100111
  4350:             //FSUB.X <ea>,FPn                                 |-|--CC46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0101000
  4351:             //FCMP.X <ea>,FPn                                 |-|--CC46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0111000
  4352:             //FSMOVE.X <ea>,FPn                               |-|----46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn1000000
  4353:             //FSSQRT.X <ea>,FPn                               |-|----46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn1000001
  4354:             //FDMOVE.X <ea>,FPn                               |-|----46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn1000100
  4355:             //FDSQRT.X <ea>,FPn                               |-|----46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn1000101
  4356:             //FSABS.X <ea>,FPn                                |-|----46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn1011000
  4357:             //FSNEG.X <ea>,FPn                                |-|----46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn1011010
  4358:             //FDABS.X <ea>,FPn                                |-|----46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn1011100
  4359:             //FDNEG.X <ea>,FPn                                |-|----46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn1011110
  4360:             //FSDIV.X <ea>,FPn                                |-|----46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn1100000
  4361:             //FSADD.X <ea>,FPn                                |-|----46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn1100010
  4362:             //FSMUL.X <ea>,FPn                                |-|----46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn1100011
  4363:             //FDDIV.X <ea>,FPn                                |-|----46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn1100100
  4364:             //FDADD.X <ea>,FPn                                |-|----46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn1100110
  4365:             //FDMUL.X <ea>,FPn                                |-|----46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn1100111
  4366:             //FSSUB.X <ea>,FPn                                |-|----46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn1101000
  4367:             //FDSUB.X <ea>,FPn                                |-|----46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn1101100
  4368:             //FSINCOS.X <ea>,FPc:FPs                          |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010sss0110ccc
  4369:             //FTST.P <ea>                                     |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-0100110000111010
  4370:             //FMOVE.P <ea>,FPn                                |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0000000
  4371:             //FINT.P <ea>,FPn                                 |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0000001
  4372:             //FSINH.P <ea>,FPn                                |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0000010
  4373:             //FINTRZ.P <ea>,FPn                               |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0000011
  4374:             //FSQRT.P <ea>,FPn                                |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0000100
  4375:             //FLOGNP1.P <ea>,FPn                              |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0000110
  4376:             //FETOXM1.P <ea>,FPn                              |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0001000
  4377:             //FTANH.P <ea>,FPn                                |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0001001
  4378:             //FATAN.P <ea>,FPn                                |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0001010
  4379:             //FASIN.P <ea>,FPn                                |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0001100
  4380:             //FATANH.P <ea>,FPn                               |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0001101
  4381:             //FSIN.P <ea>,FPn                                 |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0001110
  4382:             //FTAN.P <ea>,FPn                                 |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0001111
  4383:             //FETOX.P <ea>,FPn                                |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0010000
  4384:             //FTWOTOX.P <ea>,FPn                              |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0010001
  4385:             //FTENTOX.P <ea>,FPn                              |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0010010
  4386:             //FLOGN.P <ea>,FPn                                |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0010100
  4387:             //FLOG10.P <ea>,FPn                               |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0010101
  4388:             //FLOG2.P <ea>,FPn                                |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0010110
  4389:             //FABS.P <ea>,FPn                                 |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0011000
  4390:             //FCOSH.P <ea>,FPn                                |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0011001
  4391:             //FNEG.P <ea>,FPn                                 |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0011010
  4392:             //FACOS.P <ea>,FPn                                |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0011100
  4393:             //FCOS.P <ea>,FPn                                 |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0011101
  4394:             //FGETEXP.P <ea>,FPn                              |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0011110
  4395:             //FGETMAN.P <ea>,FPn                              |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0011111
  4396:             //FDIV.P <ea>,FPn                                 |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0100000
  4397:             //FMOD.P <ea>,FPn                                 |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0100001
  4398:             //FADD.P <ea>,FPn                                 |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0100010
  4399:             //FMUL.P <ea>,FPn                                 |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0100011
  4400:             //FSGLDIV.P <ea>,FPn                              |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0100100
  4401:             //FREM.P <ea>,FPn                                 |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0100101
  4402:             //FSCALE.P <ea>,FPn                               |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0100110
  4403:             //FSGLMUL.P <ea>,FPn                              |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0100111
  4404:             //FSUB.P <ea>,FPn                                 |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0101000
  4405:             //FCMP.P <ea>,FPn                                 |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0111000
  4406:             //FSMOVE.P <ea>,FPn                               |-|----SS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn1000000
  4407:             //FSSQRT.P <ea>,FPn                               |-|----SS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn1000001
  4408:             //FDMOVE.P <ea>,FPn                               |-|----SS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn1000100
  4409:             //FDSQRT.P <ea>,FPn                               |-|----SS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn1000101
  4410:             //FSABS.P <ea>,FPn                                |-|----SS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn1011000
  4411:             //FSNEG.P <ea>,FPn                                |-|----SS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn1011010
  4412:             //FDABS.P <ea>,FPn                                |-|----SS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn1011100
  4413:             //FDNEG.P <ea>,FPn                                |-|----SS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn1011110
  4414:             //FSDIV.P <ea>,FPn                                |-|----SS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn1100000
  4415:             //FSADD.P <ea>,FPn                                |-|----SS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn1100010
  4416:             //FSMUL.P <ea>,FPn                                |-|----SS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn1100011
  4417:             //FDDIV.P <ea>,FPn                                |-|----SS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn1100100
  4418:             //FDADD.P <ea>,FPn                                |-|----SS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn1100110
  4419:             //FDMUL.P <ea>,FPn                                |-|----SS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn1100111
  4420:             //FSSUB.P <ea>,FPn                                |-|----SS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn1101000
  4421:             //FDSUB.P <ea>,FPn                                |-|----SS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn1101100
  4422:             //FSINCOS.P <ea>,FPc:FPs                          |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011sss0110ccc
  4423:             //FTST.D <ea>                                     |-|--CC46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-0101010000111010
  4424:             //FMOVE.D <ea>,FPn                                |-|--CC46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0000000
  4425:             //FINT.D <ea>,FPn                                 |-|--CCS6|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0000001
  4426:             //FSINH.D <ea>,FPn                                |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0000010
  4427:             //FINTRZ.D <ea>,FPn                               |-|--CCS6|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0000011
  4428:             //FSQRT.D <ea>,FPn                                |-|--CC46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0000100
  4429:             //FLOGNP1.D <ea>,FPn                              |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0000110
  4430:             //FETOXM1.D <ea>,FPn                              |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0001000
  4431:             //FTANH.D <ea>,FPn                                |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0001001
  4432:             //FATAN.D <ea>,FPn                                |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0001010
  4433:             //FASIN.D <ea>,FPn                                |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0001100
  4434:             //FATANH.D <ea>,FPn                               |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0001101
  4435:             //FSIN.D <ea>,FPn                                 |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0001110
  4436:             //FTAN.D <ea>,FPn                                 |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0001111
  4437:             //FETOX.D <ea>,FPn                                |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0010000
  4438:             //FTWOTOX.D <ea>,FPn                              |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0010001
  4439:             //FTENTOX.D <ea>,FPn                              |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0010010
  4440:             //FLOGN.D <ea>,FPn                                |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0010100
  4441:             //FLOG10.D <ea>,FPn                               |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0010101
  4442:             //FLOG2.D <ea>,FPn                                |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0010110
  4443:             //FABS.D <ea>,FPn                                 |-|--CC46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0011000
  4444:             //FCOSH.D <ea>,FPn                                |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0011001
  4445:             //FNEG.D <ea>,FPn                                 |-|--CC46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0011010
  4446:             //FACOS.D <ea>,FPn                                |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0011100
  4447:             //FCOS.D <ea>,FPn                                 |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0011101
  4448:             //FGETEXP.D <ea>,FPn                              |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0011110
  4449:             //FGETMAN.D <ea>,FPn                              |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0011111
  4450:             //FDIV.D <ea>,FPn                                 |-|--CC46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0100000
  4451:             //FMOD.D <ea>,FPn                                 |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0100001
  4452:             //FADD.D <ea>,FPn                                 |-|--CC46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0100010
  4453:             //FMUL.D <ea>,FPn                                 |-|--CC46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0100011
  4454:             //FSGLDIV.D <ea>,FPn                              |-|--CCS6|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0100100
  4455:             //FREM.D <ea>,FPn                                 |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0100101
  4456:             //FSCALE.D <ea>,FPn                               |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0100110
  4457:             //FSGLMUL.D <ea>,FPn                              |-|--CCS6|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0100111
  4458:             //FSUB.D <ea>,FPn                                 |-|--CC46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0101000
  4459:             //FCMP.D <ea>,FPn                                 |-|--CC46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0111000
  4460:             //FSMOVE.D <ea>,FPn                               |-|----46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn1000000
  4461:             //FSSQRT.D <ea>,FPn                               |-|----46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn1000001
  4462:             //FDMOVE.D <ea>,FPn                               |-|----46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn1000100
  4463:             //FDSQRT.D <ea>,FPn                               |-|----46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn1000101
  4464:             //FSABS.D <ea>,FPn                                |-|----46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn1011000
  4465:             //FSNEG.D <ea>,FPn                                |-|----46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn1011010
  4466:             //FDABS.D <ea>,FPn                                |-|----46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn1011100
  4467:             //FDNEG.D <ea>,FPn                                |-|----46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn1011110
  4468:             //FSDIV.D <ea>,FPn                                |-|----46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn1100000
  4469:             //FSADD.D <ea>,FPn                                |-|----46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn1100010
  4470:             //FSMUL.D <ea>,FPn                                |-|----46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn1100011
  4471:             //FDDIV.D <ea>,FPn                                |-|----46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn1100100
  4472:             //FDADD.D <ea>,FPn                                |-|----46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn1100110
  4473:             //FDMUL.D <ea>,FPn                                |-|----46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn1100111
  4474:             //FSSUB.D <ea>,FPn                                |-|----46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn1101000
  4475:             //FDSUB.D <ea>,FPn                                |-|----46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn1101100
  4476:             //FSINCOS.D <ea>,FPc:FPs                          |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101sss0110ccc
  4477:             //FMOVEM.X #<data>,-(Ar)                          |-|--CC46|-|-----|-----|    -     |1111_001_000_100_rrr-11100000dddddddd
  4478:             //FMOVEM.X <list>,-(Ar)                           |-|--CC46|-|-----|-----|    -     |1111_001_000_100_rrr-11100000llllllll
  4479:             //FMOVEM.X Dl,-(Ar)                               |-|--CC4S|-|-----|-----|    -     |1111_001_000_100_rrr-111010000lll0000
  4480:             //FMOVEM.L #<data>,#<data>,FPSR/FPIAR             |-|--CC4S|-|-----|-----|         I|1111_001_000_111_100-1000110000000000-{data}
  4481:             //FMOVEM.L #<data>,#<data>,FPCR/FPIAR             |-|--CC4S|-|-----|-----|         I|1111_001_000_111_100-1001010000000000-{data}
  4482:             //FMOVEM.L #<data>,#<data>,FPCR/FPSR              |-|--CC4S|-|-----|-----|         I|1111_001_000_111_100-1001100000000000-{data}
  4483:             //FMOVEM.L #<data>,#<data>,#<data>,FPCR/FPSR/FPIAR|-|--CC4S|-|-----|-----|         I|1111_001_000_111_100-1001110000000000-{data}
  4484:           case 0b1111_001_000:
  4485:             irpFgen ();
  4486:             break irpSwitch;
  4487: 
  4488:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  4489:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  4490:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  4491:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  4492:             //FSF.B <ea>                                      |-|--CC4S|-|-----|-----|D M+-WXZ  |1111_001_001_mmm_rrr-0000000000000000
  4493:             //FSEQ.B <ea>                                     |-|--CC4S|-|-----|-----|D M+-WXZ  |1111_001_001_mmm_rrr-0000000000000001
  4494:             //FSOGT.B <ea>                                    |-|--CC4S|-|-----|-----|D M+-WXZ  |1111_001_001_mmm_rrr-0000000000000010
  4495:             //FSOGE.B <ea>                                    |-|--CC4S|-|-----|-----|D M+-WXZ  |1111_001_001_mmm_rrr-0000000000000011
  4496:             //FSOLT.B <ea>                                    |-|--CC4S|-|-----|-----|D M+-WXZ  |1111_001_001_mmm_rrr-0000000000000100
  4497:             //FSOLE.B <ea>                                    |-|--CC4S|-|-----|-----|D M+-WXZ  |1111_001_001_mmm_rrr-0000000000000101
  4498:             //FSOGL.B <ea>                                    |-|--CC4S|-|-----|-----|D M+-WXZ  |1111_001_001_mmm_rrr-0000000000000110
  4499:             //FSOR.B <ea>                                     |-|--CC4S|-|-----|-----|D M+-WXZ  |1111_001_001_mmm_rrr-0000000000000111
  4500:             //FSUN.B <ea>                                     |-|--CC4S|-|-----|-----|D M+-WXZ  |1111_001_001_mmm_rrr-0000000000001000
  4501:             //FSUEQ.B <ea>                                    |-|--CC4S|-|-----|-----|D M+-WXZ  |1111_001_001_mmm_rrr-0000000000001001
  4502:             //FSUGT.B <ea>                                    |-|--CC4S|-|-----|-----|D M+-WXZ  |1111_001_001_mmm_rrr-0000000000001010
  4503:             //FSUGE.B <ea>                                    |-|--CC4S|-|-----|-----|D M+-WXZ  |1111_001_001_mmm_rrr-0000000000001011
  4504:             //FSULT.B <ea>                                    |-|--CC4S|-|-----|-----|D M+-WXZ  |1111_001_001_mmm_rrr-0000000000001100
  4505:             //FSULE.B <ea>                                    |-|--CC4S|-|-----|-----|D M+-WXZ  |1111_001_001_mmm_rrr-0000000000001101
  4506:             //FSNE.B <ea>                                     |-|--CC4S|-|-----|-----|D M+-WXZ  |1111_001_001_mmm_rrr-0000000000001110
  4507:             //FST.B <ea>                                      |-|--CC4S|-|-----|-----|D M+-WXZ  |1111_001_001_mmm_rrr-0000000000001111
  4508:             //FSSF.B <ea>                                     |-|--CC4S|-|-----|-----|D M+-WXZ  |1111_001_001_mmm_rrr-0000000000010000
  4509:             //FSSEQ.B <ea>                                    |-|--CC4S|-|-----|-----|D M+-WXZ  |1111_001_001_mmm_rrr-0000000000010001
  4510:             //FSGT.B <ea>                                     |-|--CC4S|-|-----|-----|D M+-WXZ  |1111_001_001_mmm_rrr-0000000000010010
  4511:             //FSGE.B <ea>                                     |-|--CC4S|-|-----|-----|D M+-WXZ  |1111_001_001_mmm_rrr-0000000000010011
  4512:             //FSLT.B <ea>                                     |-|--CC4S|-|-----|-----|D M+-WXZ  |1111_001_001_mmm_rrr-0000000000010100
  4513:             //FSLE.B <ea>                                     |-|--CC4S|-|-----|-----|D M+-WXZ  |1111_001_001_mmm_rrr-0000000000010101
  4514:             //FSGL.B <ea>                                     |-|--CC4S|-|-----|-----|D M+-WXZ  |1111_001_001_mmm_rrr-0000000000010110
  4515:             //FSGLE.B <ea>                                    |-|--CC4S|-|-----|-----|D M+-WXZ  |1111_001_001_mmm_rrr-0000000000010111
  4516:             //FSNGLE.B <ea>                                   |-|--CC4S|-|-----|-----|D M+-WXZ  |1111_001_001_mmm_rrr-0000000000011000
  4517:             //FSNGL.B <ea>                                    |-|--CC4S|-|-----|-----|D M+-WXZ  |1111_001_001_mmm_rrr-0000000000011001
  4518:             //FSNLE.B <ea>                                    |-|--CC4S|-|-----|-----|D M+-WXZ  |1111_001_001_mmm_rrr-0000000000011010
  4519:             //FSNLT.B <ea>                                    |-|--CC4S|-|-----|-----|D M+-WXZ  |1111_001_001_mmm_rrr-0000000000011011
  4520:             //FSNGE.B <ea>                                    |-|--CC4S|-|-----|-----|D M+-WXZ  |1111_001_001_mmm_rrr-0000000000011100
  4521:             //FSNGT.B <ea>                                    |-|--CC4S|-|-----|-----|D M+-WXZ  |1111_001_001_mmm_rrr-0000000000011101
  4522:             //FSSNE.B <ea>                                    |-|--CC4S|-|-----|-----|D M+-WXZ  |1111_001_001_mmm_rrr-0000000000011110
  4523:             //FSST.B <ea>                                     |-|--CC4S|-|-----|-----|D M+-WXZ  |1111_001_001_mmm_rrr-0000000000011111
  4524:             //FDBF Dr,<label>                                 |-|--CC4S|-|-----|-----|          |1111_001_001_001_rrr-0000000000000000-{offset}
  4525:             //FDBRA Dr,<label>                                |A|--CC4S|-|-----|-----|          |1111_001_001_001_rrr-0000000000000000-{offset}       [FDBF Dr,<label>]
  4526:             //FDBEQ Dr,<label>                                |-|--CC4S|-|-----|-----|          |1111_001_001_001_rrr-0000000000000001-{offset}
  4527:             //FDBOGT Dr,<label>                               |-|--CC4S|-|-----|-----|          |1111_001_001_001_rrr-0000000000000010-{offset}
  4528:             //FDBOGE Dr,<label>                               |-|--CC4S|-|-----|-----|          |1111_001_001_001_rrr-0000000000000011-{offset}
  4529:             //FDBOLT Dr,<label>                               |-|--CC4S|-|-----|-----|          |1111_001_001_001_rrr-0000000000000100-{offset}
  4530:             //FDBOLE Dr,<label>                               |-|--CC4S|-|-----|-----|          |1111_001_001_001_rrr-0000000000000101-{offset}
  4531:             //FDBOGL Dr,<label>                               |-|--CC4S|-|-----|-----|          |1111_001_001_001_rrr-0000000000000110-{offset}
  4532:             //FDBOR Dr,<label>                                |-|--CC4S|-|-----|-----|          |1111_001_001_001_rrr-0000000000000111-{offset}
  4533:             //FDBUN Dr,<label>                                |-|--CC4S|-|-----|-----|          |1111_001_001_001_rrr-0000000000001000-{offset}
  4534:             //FDBUEQ Dr,<label>                               |-|--CC4S|-|-----|-----|          |1111_001_001_001_rrr-0000000000001001-{offset}
  4535:             //FDBUGT Dr,<label>                               |-|--CC4S|-|-----|-----|          |1111_001_001_001_rrr-0000000000001010-{offset}
  4536:             //FDBUGE Dr,<label>                               |-|--CC4S|-|-----|-----|          |1111_001_001_001_rrr-0000000000001011-{offset}
  4537:             //FDBULT Dr,<label>                               |-|--CC4S|-|-----|-----|          |1111_001_001_001_rrr-0000000000001100-{offset}
  4538:             //FDBULE Dr,<label>                               |-|--CC4S|-|-----|-----|          |1111_001_001_001_rrr-0000000000001101-{offset}
  4539:             //FDBNE Dr,<label>                                |-|--CC4S|-|-----|-----|          |1111_001_001_001_rrr-0000000000001110-{offset}
  4540:             //FDBT Dr,<label>                                 |-|--CC4S|-|-----|-----|          |1111_001_001_001_rrr-0000000000001111-{offset}
  4541:             //FDBSF Dr,<label>                                |-|--CC4S|-|-----|-----|          |1111_001_001_001_rrr-0000000000010000-{offset}
  4542:             //FDBSEQ Dr,<label>                               |-|--CC4S|-|-----|-----|          |1111_001_001_001_rrr-0000000000010001-{offset}
  4543:             //FDBGT Dr,<label>                                |-|--CC4S|-|-----|-----|          |1111_001_001_001_rrr-0000000000010010-{offset}
  4544:             //FDBGE Dr,<label>                                |-|--CC4S|-|-----|-----|          |1111_001_001_001_rrr-0000000000010011-{offset}
  4545:             //FDBLT Dr,<label>                                |-|--CC4S|-|-----|-----|          |1111_001_001_001_rrr-0000000000010100-{offset}
  4546:             //FDBLE Dr,<label>                                |-|--CC4S|-|-----|-----|          |1111_001_001_001_rrr-0000000000010101-{offset}
  4547:             //FDBGL Dr,<label>                                |-|--CC4S|-|-----|-----|          |1111_001_001_001_rrr-0000000000010110-{offset}
  4548:             //FDBGLE Dr,<label>                               |-|--CC4S|-|-----|-----|          |1111_001_001_001_rrr-0000000000010111-{offset}
  4549:             //FDBNGLE Dr,<label>                              |-|--CC4S|-|-----|-----|          |1111_001_001_001_rrr-0000000000011000-{offset}
  4550:             //FDBNGL Dr,<label>                               |-|--CC4S|-|-----|-----|          |1111_001_001_001_rrr-0000000000011001-{offset}
  4551:             //FDBNLE Dr,<label>                               |-|--CC4S|-|-----|-----|          |1111_001_001_001_rrr-0000000000011010-{offset}
  4552:             //FDBNLT Dr,<label>                               |-|--CC4S|-|-----|-----|          |1111_001_001_001_rrr-0000000000011011-{offset}
  4553:             //FDBNGE Dr,<label>                               |-|--CC4S|-|-----|-----|          |1111_001_001_001_rrr-0000000000011100-{offset}
  4554:             //FDBNGT Dr,<label>                               |-|--CC4S|-|-----|-----|          |1111_001_001_001_rrr-0000000000011101-{offset}
  4555:             //FDBSNE Dr,<label>                               |-|--CC4S|-|-----|-----|          |1111_001_001_001_rrr-0000000000011110-{offset}
  4556:             //FDBST Dr,<label>                                |-|--CC4S|-|-----|-----|          |1111_001_001_001_rrr-0000000000011111-{offset}
  4557:             //FTRAPF.W #<data>                                |-|--CC4S|-|-----|-----|          |1111_001_001_111_010-0000000000000000-{data}
  4558:             //FTRAPEQ.W #<data>                               |-|--CC4S|-|-----|-----|          |1111_001_001_111_010-0000000000000001-{data}
  4559:             //FTRAPOGT.W #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_010-0000000000000010-{data}
  4560:             //FTRAPOGE.W #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_010-0000000000000011-{data}
  4561:             //FTRAPOLT.W #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_010-0000000000000100-{data}
  4562:             //FTRAPOLE.W #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_010-0000000000000101-{data}
  4563:             //FTRAPOGL.W #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_010-0000000000000110-{data}
  4564:             //FTRAPOR.W #<data>                               |-|--CC4S|-|-----|-----|          |1111_001_001_111_010-0000000000000111-{data}
  4565:             //FTRAPUN.W #<data>                               |-|--CC4S|-|-----|-----|          |1111_001_001_111_010-0000000000001000-{data}
  4566:             //FTRAPUEQ.W #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_010-0000000000001001-{data}
  4567:             //FTRAPUGT.W #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_010-0000000000001010-{data}
  4568:             //FTRAPUGE.W #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_010-0000000000001011-{data}
  4569:             //FTRAPULT.W #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_010-0000000000001100-{data}
  4570:             //FTRAPULE.W #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_010-0000000000001101-{data}
  4571:             //FTRAPNE.W #<data>                               |-|--CC4S|-|-----|-----|          |1111_001_001_111_010-0000000000001110-{data}
  4572:             //FTRAPT.W #<data>                                |-|--CC4S|-|-----|-----|          |1111_001_001_111_010-0000000000001111-{data}
  4573:             //FTRAPSF.W #<data>                               |-|--CC4S|-|-----|-----|          |1111_001_001_111_010-0000000000010000-{data}
  4574:             //FTRAPSEQ.W #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_010-0000000000010001-{data}
  4575:             //FTRAPGT.W #<data>                               |-|--CC4S|-|-----|-----|          |1111_001_001_111_010-0000000000010010-{data}
  4576:             //FTRAPGE.W #<data>                               |-|--CC4S|-|-----|-----|          |1111_001_001_111_010-0000000000010011-{data}
  4577:             //FTRAPLT.W #<data>                               |-|--CC4S|-|-----|-----|          |1111_001_001_111_010-0000000000010100-{data}
  4578:             //FTRAPLE.W #<data>                               |-|--CC4S|-|-----|-----|          |1111_001_001_111_010-0000000000010101-{data}
  4579:             //FTRAPGL.W #<data>                               |-|--CC4S|-|-----|-----|          |1111_001_001_111_010-0000000000010110-{data}
  4580:             //FTRAPGLE.W #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_010-0000000000010111-{data}
  4581:             //FTRAPNGLE.W #<data>                             |-|--CC4S|-|-----|-----|          |1111_001_001_111_010-0000000000011000-{data}
  4582:             //FTRAPNGL.W #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_010-0000000000011001-{data}
  4583:             //FTRAPNLE.W #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_010-0000000000011010-{data}
  4584:             //FTRAPNLT.W #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_010-0000000000011011-{data}
  4585:             //FTRAPNGE.W #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_010-0000000000011100-{data}
  4586:             //FTRAPNGT.W #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_010-0000000000011101-{data}
  4587:             //FTRAPSNE.W #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_010-0000000000011110-{data}
  4588:             //FTRAPST.W #<data>                               |-|--CC4S|-|-----|-----|          |1111_001_001_111_010-0000000000011111-{data}
  4589:             //FTRAPF.L #<data>                                |-|--CC4S|-|-----|-----|          |1111_001_001_111_011-0000000000000000-{data}
  4590:             //FTRAPEQ.L #<data>                               |-|--CC4S|-|-----|-----|          |1111_001_001_111_011-0000000000000001-{data}
  4591:             //FTRAPOGT.L #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_011-0000000000000010-{data}
  4592:             //FTRAPOGE.L #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_011-0000000000000011-{data}
  4593:             //FTRAPOLT.L #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_011-0000000000000100-{data}
  4594:             //FTRAPOLE.L #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_011-0000000000000101-{data}
  4595:             //FTRAPOGL.L #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_011-0000000000000110-{data}
  4596:             //FTRAPOR.L #<data>                               |-|--CC4S|-|-----|-----|          |1111_001_001_111_011-0000000000000111-{data}
  4597:             //FTRAPUN.L #<data>                               |-|--CC4S|-|-----|-----|          |1111_001_001_111_011-0000000000001000-{data}
  4598:             //FTRAPUEQ.L #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_011-0000000000001001-{data}
  4599:             //FTRAPUGT.L #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_011-0000000000001010-{data}
  4600:             //FTRAPUGE.L #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_011-0000000000001011-{data}
  4601:             //FTRAPULT.L #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_011-0000000000001100-{data}
  4602:             //FTRAPULE.L #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_011-0000000000001101-{data}
  4603:             //FTRAPNE.L #<data>                               |-|--CC4S|-|-----|-----|          |1111_001_001_111_011-0000000000001110-{data}
  4604:             //FTRAPT.L #<data>                                |-|--CC4S|-|-----|-----|          |1111_001_001_111_011-0000000000001111-{data}
  4605:             //FTRAPSF.L #<data>                               |-|--CC4S|-|-----|-----|          |1111_001_001_111_011-0000000000010000-{data}
  4606:             //FTRAPSEQ.L #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_011-0000000000010001-{data}
  4607:             //FTRAPGT.L #<data>                               |-|--CC4S|-|-----|-----|          |1111_001_001_111_011-0000000000010010-{data}
  4608:             //FTRAPGE.L #<data>                               |-|--CC4S|-|-----|-----|          |1111_001_001_111_011-0000000000010011-{data}
  4609:             //FTRAPLT.L #<data>                               |-|--CC4S|-|-----|-----|          |1111_001_001_111_011-0000000000010100-{data}
  4610:             //FTRAPLE.L #<data>                               |-|--CC4S|-|-----|-----|          |1111_001_001_111_011-0000000000010101-{data}
  4611:             //FTRAPGL.L #<data>                               |-|--CC4S|-|-----|-----|          |1111_001_001_111_011-0000000000010110-{data}
  4612:             //FTRAPGLE.L #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_011-0000000000010111-{data}
  4613:             //FTRAPNGLE.L #<data>                             |-|--CC4S|-|-----|-----|          |1111_001_001_111_011-0000000000011000-{data}
  4614:             //FTRAPNGL.L #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_011-0000000000011001-{data}
  4615:             //FTRAPNLE.L #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_011-0000000000011010-{data}
  4616:             //FTRAPNLT.L #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_011-0000000000011011-{data}
  4617:             //FTRAPNGE.L #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_011-0000000000011100-{data}
  4618:             //FTRAPNGT.L #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_011-0000000000011101-{data}
  4619:             //FTRAPSNE.L #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_011-0000000000011110-{data}
  4620:             //FTRAPST.L #<data>                               |-|--CC4S|-|-----|-----|          |1111_001_001_111_011-0000000000011111-{data}
  4621:             //FTRAPF                                          |-|--CC4S|-|-----|-----|          |1111_001_001_111_100-0000000000000000
  4622:             //FTRAPEQ                                         |-|--CC4S|-|-----|-----|          |1111_001_001_111_100-0000000000000001
  4623:             //FTRAPOGT                                        |-|--CC4S|-|-----|-----|          |1111_001_001_111_100-0000000000000010
  4624:             //FTRAPOGE                                        |-|--CC4S|-|-----|-----|          |1111_001_001_111_100-0000000000000011
  4625:             //FTRAPOLT                                        |-|--CC4S|-|-----|-----|          |1111_001_001_111_100-0000000000000100
  4626:             //FTRAPOLE                                        |-|--CC4S|-|-----|-----|          |1111_001_001_111_100-0000000000000101
  4627:             //FTRAPOGL                                        |-|--CC4S|-|-----|-----|          |1111_001_001_111_100-0000000000000110
  4628:             //FTRAPOR                                         |-|--CC4S|-|-----|-----|          |1111_001_001_111_100-0000000000000111
  4629:             //FTRAPUN                                         |-|--CC4S|-|-----|-----|          |1111_001_001_111_100-0000000000001000
  4630:             //FTRAPUEQ                                        |-|--CC4S|-|-----|-----|          |1111_001_001_111_100-0000000000001001
  4631:             //FTRAPUGT                                        |-|--CC4S|-|-----|-----|          |1111_001_001_111_100-0000000000001010
  4632:             //FTRAPUGE                                        |-|--CC4S|-|-----|-----|          |1111_001_001_111_100-0000000000001011
  4633:             //FTRAPULT                                        |-|--CC4S|-|-----|-----|          |1111_001_001_111_100-0000000000001100
  4634:             //FTRAPULE                                        |-|--CC4S|-|-----|-----|          |1111_001_001_111_100-0000000000001101
  4635:             //FTRAPNE                                         |-|--CC4S|-|-----|-----|          |1111_001_001_111_100-0000000000001110
  4636:             //FTRAPT                                          |-|--CC4S|-|-----|-----|          |1111_001_001_111_100-0000000000001111
  4637:             //FTRAPSF                                         |-|--CC4S|-|-----|-----|          |1111_001_001_111_100-0000000000010000
  4638:             //FTRAPSEQ                                        |-|--CC4S|-|-----|-----|          |1111_001_001_111_100-0000000000010001
  4639:             //FTRAPGT                                         |-|--CC4S|-|-----|-----|          |1111_001_001_111_100-0000000000010010
  4640:             //FTRAPGE                                         |-|--CC4S|-|-----|-----|          |1111_001_001_111_100-0000000000010011
  4641:             //FTRAPLT                                         |-|--CC4S|-|-----|-----|          |1111_001_001_111_100-0000000000010100
  4642:             //FTRAPLE                                         |-|--CC4S|-|-----|-----|          |1111_001_001_111_100-0000000000010101
  4643:             //FTRAPGL                                         |-|--CC4S|-|-----|-----|          |1111_001_001_111_100-0000000000010110
  4644:             //FTRAPGLE                                        |-|--CC4S|-|-----|-----|          |1111_001_001_111_100-0000000000010111
  4645:             //FTRAPNGLE                                       |-|--CC4S|-|-----|-----|          |1111_001_001_111_100-0000000000011000
  4646:             //FTRAPNGL                                        |-|--CC4S|-|-----|-----|          |1111_001_001_111_100-0000000000011001
  4647:             //FTRAPNLE                                        |-|--CC4S|-|-----|-----|          |1111_001_001_111_100-0000000000011010
  4648:             //FTRAPNLT                                        |-|--CC4S|-|-----|-----|          |1111_001_001_111_100-0000000000011011
  4649:             //FTRAPNGE                                        |-|--CC4S|-|-----|-----|          |1111_001_001_111_100-0000000000011100
  4650:             //FTRAPNGT                                        |-|--CC4S|-|-----|-----|          |1111_001_001_111_100-0000000000011101
  4651:             //FTRAPSNE                                        |-|--CC4S|-|-----|-----|          |1111_001_001_111_100-0000000000011110
  4652:             //FTRAPST                                         |-|--CC4S|-|-----|-----|          |1111_001_001_111_100-0000000000011111
  4653:           case 0b1111_001_001:
  4654:             irpFscc ();
  4655:             break irpSwitch;
  4656: 
  4657:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  4658:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  4659:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  4660:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  4661:             //FNOP                                            |A|--CC46|-|-----|-----|          |1111_001_010_000_000-0000000000000000        [FBF.W (*)+2]
  4662:             //FBF.W <label>                                   |-|--CC46|-|-----|-----|          |1111_001_010_000_000-{offset}
  4663:             //FBEQ.W <label>                                  |-|--CC46|-|-----|-----|          |1111_001_010_000_001-{offset}
  4664:             //FBOGT.W <label>                                 |-|--CC46|-|-----|-----|          |1111_001_010_000_010-{offset}
  4665:             //FBOGE.W <label>                                 |-|--CC46|-|-----|-----|          |1111_001_010_000_011-{offset}
  4666:             //FBOLT.W <label>                                 |-|--CC46|-|-----|-----|          |1111_001_010_000_100-{offset}
  4667:             //FBOLE.W <label>                                 |-|--CC46|-|-----|-----|          |1111_001_010_000_101-{offset}
  4668:             //FBOGL.W <label>                                 |-|--CC46|-|-----|-----|          |1111_001_010_000_110-{offset}
  4669:             //FBOR.W <label>                                  |-|--CC46|-|-----|-----|          |1111_001_010_000_111-{offset}
  4670:             //FBUN.W <label>                                  |-|--CC46|-|-----|-----|          |1111_001_010_001_000-{offset}
  4671:             //FBUEQ.W <label>                                 |-|--CC46|-|-----|-----|          |1111_001_010_001_001-{offset}
  4672:             //FBUGT.W <label>                                 |-|--CC46|-|-----|-----|          |1111_001_010_001_010-{offset}
  4673:             //FBUGE.W <label>                                 |-|--CC46|-|-----|-----|          |1111_001_010_001_011-{offset}
  4674:             //FBULT.W <label>                                 |-|--CC46|-|-----|-----|          |1111_001_010_001_100-{offset}
  4675:             //FBULE.W <label>                                 |-|--CC46|-|-----|-----|          |1111_001_010_001_101-{offset}
  4676:             //FBNE.W <label>                                  |-|--CC46|-|-----|-----|          |1111_001_010_001_110-{offset}
  4677:             //FBT.W <label>                                   |-|--CC46|-|-----|-----|          |1111_001_010_001_111-{offset}
  4678:             //FBRA.W <label>                                  |A|--CC46|-|-----|-----|          |1111_001_010_001_111-{offset}        [FBT.W <label>]
  4679:             //FBSF.W <label>                                  |-|--CC46|-|-----|-----|          |1111_001_010_010_000-{offset}
  4680:             //FBSEQ.W <label>                                 |-|--CC46|-|-----|-----|          |1111_001_010_010_001-{offset}
  4681:             //FBGT.W <label>                                  |-|--CC46|-|-----|-----|          |1111_001_010_010_010-{offset}
  4682:             //FBGE.W <label>                                  |-|--CC46|-|-----|-----|          |1111_001_010_010_011-{offset}
  4683:             //FBLT.W <label>                                  |-|--CC46|-|-----|-----|          |1111_001_010_010_100-{offset}
  4684:             //FBLE.W <label>                                  |-|--CC46|-|-----|-----|          |1111_001_010_010_101-{offset}
  4685:             //FBGL.W <label>                                  |-|--CC46|-|-----|-----|          |1111_001_010_010_110-{offset}
  4686:             //FBGLE.W <label>                                 |-|--CC46|-|-----|-----|          |1111_001_010_010_111-{offset}
  4687:             //FBNGLE.W <label>                                |-|--CC46|-|-----|-----|          |1111_001_010_011_000-{offset}
  4688:             //FBNGL.W <label>                                 |-|--CC46|-|-----|-----|          |1111_001_010_011_001-{offset}
  4689:             //FBNLE.W <label>                                 |-|--CC46|-|-----|-----|          |1111_001_010_011_010-{offset}
  4690:             //FBNLT.W <label>                                 |-|--CC46|-|-----|-----|          |1111_001_010_011_011-{offset}
  4691:             //FBNGE.W <label>                                 |-|--CC46|-|-----|-----|          |1111_001_010_011_100-{offset}
  4692:             //FBNGT.W <label>                                 |-|--CC46|-|-----|-----|          |1111_001_010_011_101-{offset}
  4693:             //FBSNE.W <label>                                 |-|--CC46|-|-----|-----|          |1111_001_010_011_110-{offset}
  4694:             //FBST.W <label>                                  |-|--CC46|-|-----|-----|          |1111_001_010_011_111-{offset}
  4695:           case 0b1111_001_010:
  4696:             irpFbccWord ();
  4697:             break irpSwitch;
  4698: 
  4699:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  4700:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  4701:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  4702:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  4703:             //FBF.L <label>                                   |-|--CC46|-|-----|-----|          |1111_001_011_000_000-{offset}
  4704:             //FBEQ.L <label>                                  |-|--CC46|-|-----|-----|          |1111_001_011_000_001-{offset}
  4705:             //FBOGT.L <label>                                 |-|--CC46|-|-----|-----|          |1111_001_011_000_010-{offset}
  4706:             //FBOGE.L <label>                                 |-|--CC46|-|-----|-----|          |1111_001_011_000_011-{offset}
  4707:             //FBOLT.L <label>                                 |-|--CC46|-|-----|-----|          |1111_001_011_000_100-{offset}
  4708:             //FBOLE.L <label>                                 |-|--CC46|-|-----|-----|          |1111_001_011_000_101-{offset}
  4709:             //FBOGL.L <label>                                 |-|--CC46|-|-----|-----|          |1111_001_011_000_110-{offset}
  4710:             //FBOR.L <label>                                  |-|--CC46|-|-----|-----|          |1111_001_011_000_111-{offset}
  4711:             //FBUN.L <label>                                  |-|--CC46|-|-----|-----|          |1111_001_011_001_000-{offset}
  4712:             //FBUEQ.L <label>                                 |-|--CC46|-|-----|-----|          |1111_001_011_001_001-{offset}
  4713:             //FBUGT.L <label>                                 |-|--CC46|-|-----|-----|          |1111_001_011_001_010-{offset}
  4714:             //FBUGE.L <label>                                 |-|--CC46|-|-----|-----|          |1111_001_011_001_011-{offset}
  4715:             //FBULT.L <label>                                 |-|--CC46|-|-----|-----|          |1111_001_011_001_100-{offset}
  4716:             //FBULE.L <label>                                 |-|--CC46|-|-----|-----|          |1111_001_011_001_101-{offset}
  4717:             //FBNE.L <label>                                  |-|--CC46|-|-----|-----|          |1111_001_011_001_110-{offset}
  4718:             //FBT.L <label>                                   |-|--CC46|-|-----|-----|          |1111_001_011_001_111-{offset}
  4719:             //FBRA.L <label>                                  |A|--CC46|-|-----|-----|          |1111_001_011_001_111-{offset}        [FBT.L <label>]
  4720:             //FBSF.L <label>                                  |-|--CC46|-|-----|-----|          |1111_001_011_010_000-{offset}
  4721:             //FBSEQ.L <label>                                 |-|--CC46|-|-----|-----|          |1111_001_011_010_001-{offset}
  4722:             //FBGT.L <label>                                  |-|--CC46|-|-----|-----|          |1111_001_011_010_010-{offset}
  4723:             //FBGE.L <label>                                  |-|--CC46|-|-----|-----|          |1111_001_011_010_011-{offset}
  4724:             //FBLT.L <label>                                  |-|--CC46|-|-----|-----|          |1111_001_011_010_100-{offset}
  4725:             //FBLE.L <label>                                  |-|--CC46|-|-----|-----|          |1111_001_011_010_101-{offset}
  4726:             //FBGL.L <label>                                  |-|--CC46|-|-----|-----|          |1111_001_011_010_110-{offset}
  4727:             //FBGLE.L <label>                                 |-|--CC46|-|-----|-----|          |1111_001_011_010_111-{offset}
  4728:             //FBNGLE.L <label>                                |-|--CC46|-|-----|-----|          |1111_001_011_011_000-{offset}
  4729:             //FBNGL.L <label>                                 |-|--CC46|-|-----|-----|          |1111_001_011_011_001-{offset}
  4730:             //FBNLE.L <label>                                 |-|--CC46|-|-----|-----|          |1111_001_011_011_010-{offset}
  4731:             //FBNLT.L <label>                                 |-|--CC46|-|-----|-----|          |1111_001_011_011_011-{offset}
  4732:             //FBNGE.L <label>                                 |-|--CC46|-|-----|-----|          |1111_001_011_011_100-{offset}
  4733:             //FBNGT.L <label>                                 |-|--CC46|-|-----|-----|          |1111_001_011_011_101-{offset}
  4734:             //FBSNE.L <label>                                 |-|--CC46|-|-----|-----|          |1111_001_011_011_110-{offset}
  4735:             //FBST.L <label>                                  |-|--CC46|-|-----|-----|          |1111_001_011_011_111-{offset}
  4736:           case 0b1111_001_011:
  4737:             irpFbccLong ();
  4738:             break irpSwitch;
  4739: 
  4740:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  4741:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  4742:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  4743:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  4744:             //FSAVE <ea>                                      |-|--CC46|P|-----|-----|  M -WXZ  |1111_001_100_mmm_rrr
  4745:           case 0b1111_001_100:
  4746:             irpFsave ();
  4747:             break irpSwitch;
  4748: 
  4749:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  4750:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  4751:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  4752:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  4753:             //FRESTORE <ea>                                   |-|--CC46|P|-----|-----|  M+ WXZP |1111_001_101_mmm_rrr
  4754:           case 0b1111_001_101:
  4755:             irpFrestore ();
  4756:             break irpSwitch;
  4757: 
  4758:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  4759:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  4760:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  4761:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  4762:             //CINVL NC,(Ar)                                   |-|----46|P|-----|-----|          |1111_010_000_001_rrr
  4763:             //CINVP NC,(Ar)                                   |-|----46|P|-----|-----|          |1111_010_000_010_rrr
  4764:             //CINVA NC                                        |-|----46|P|-----|-----|          |1111_010_000_011_000
  4765:             //CPUSHL NC,(Ar)                                  |-|----46|P|-----|-----|          |1111_010_000_101_rrr
  4766:             //CPUSHP NC,(Ar)                                  |-|----46|P|-----|-----|          |1111_010_000_110_rrr
  4767:             //CPUSHA NC                                       |-|----46|P|-----|-----|          |1111_010_000_111_000
  4768:           case 0b1111_010_000:
  4769:             irpCinvCpushNC ();
  4770:             break irpSwitch;
  4771: 
  4772:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  4773:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  4774:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  4775:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  4776:             //CINVL DC,(Ar)                                   |-|----46|P|-----|-----|          |1111_010_001_001_rrr
  4777:             //CINVP DC,(Ar)                                   |-|----46|P|-----|-----|          |1111_010_001_010_rrr
  4778:             //CINVA DC                                        |-|----46|P|-----|-----|          |1111_010_001_011_000
  4779:             //CPUSHL DC,(Ar)                                  |-|----46|P|-----|-----|          |1111_010_001_101_rrr
  4780:             //CPUSHP DC,(Ar)                                  |-|----46|P|-----|-----|          |1111_010_001_110_rrr
  4781:             //CPUSHA DC                                       |-|----46|P|-----|-----|          |1111_010_001_111_000
  4782:           case 0b1111_010_001:
  4783:             irpCinvCpushDC ();
  4784:             break irpSwitch;
  4785: 
  4786:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  4787:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  4788:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  4789:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  4790:             //CINVL IC,(Ar)                                   |-|----46|P|-----|-----|          |1111_010_010_001_rrr
  4791:             //CINVP IC,(Ar)                                   |-|----46|P|-----|-----|          |1111_010_010_010_rrr
  4792:             //CINVA IC                                        |-|----46|P|-----|-----|          |1111_010_010_011_000
  4793:             //CPUSHL IC,(Ar)                                  |-|----46|P|-----|-----|          |1111_010_010_101_rrr
  4794:             //CPUSHP IC,(Ar)                                  |-|----46|P|-----|-----|          |1111_010_010_110_rrr
  4795:             //CPUSHA IC                                       |-|----46|P|-----|-----|          |1111_010_010_111_000
  4796:           case 0b1111_010_010:
  4797:             irpCinvCpushIC ();
  4798:             break irpSwitch;
  4799: 
  4800:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  4801:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  4802:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  4803:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  4804:             //CINVL BC,(Ar)                                   |-|----46|P|-----|-----|          |1111_010_011_001_rrr
  4805:             //CINVP BC,(Ar)                                   |-|----46|P|-----|-----|          |1111_010_011_010_rrr
  4806:             //CINVA BC                                        |-|----46|P|-----|-----|          |1111_010_011_011_000
  4807:             //CPUSHL BC,(Ar)                                  |-|----46|P|-----|-----|          |1111_010_011_101_rrr
  4808:             //CPUSHP BC,(Ar)                                  |-|----46|P|-----|-----|          |1111_010_011_110_rrr
  4809:             //CPUSHA BC                                       |-|----46|P|-----|-----|          |1111_010_011_111_000
  4810:           case 0b1111_010_011:
  4811:             irpCinvCpushBC ();
  4812:             break irpSwitch;
  4813: 
  4814:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  4815:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  4816:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  4817:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  4818:             //PFLUSHN (Ar)                                    |-|----46|P|-----|-----|          |1111_010_100_000_rrr
  4819:             //PFLUSH (Ar)                                     |-|----46|P|-----|-----|          |1111_010_100_001_rrr
  4820:             //PFLUSHAN                                        |-|----46|P|-----|-----|          |1111_010_100_010_000
  4821:             //PFLUSHA                                         |-|----46|P|-----|-----|          |1111_010_100_011_000
  4822:           case 0b1111_010_100:
  4823:             irpPflush ();
  4824:             break irpSwitch;
  4825: 
  4826:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  4827:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  4828:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  4829:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  4830:             //PLPAW (Ar)                                      |-|-----6|P|-----|-----|          |1111_010_110_001_rrr
  4831:           case 0b1111_010_110:
  4832:             irpPlpaw ();
  4833:             break irpSwitch;
  4834: 
  4835:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  4836:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  4837:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  4838:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  4839:             //PLPAR (Ar)                                      |-|-----6|P|-----|-----|          |1111_010_111_001_rrr
  4840:           case 0b1111_010_111:
  4841:             irpPlpar ();
  4842:             break irpSwitch;
  4843: 
  4844:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  4845:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  4846:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  4847:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  4848:             //MOVE16 (Ar)+,xxx.L                              |-|----46|-|-----|-----|          |1111_011_000_000_rrr-{address}
  4849:             //MOVE16 xxx.L,(Ar)+                              |-|----46|-|-----|-----|          |1111_011_000_001_rrr-{address}
  4850:             //MOVE16 (Ar),xxx.L                               |-|----46|-|-----|-----|          |1111_011_000_010_rrr-{address}
  4851:             //MOVE16 xxx.L,(Ar)                               |-|----46|-|-----|-----|          |1111_011_000_011_rrr-{address}
  4852:             //MOVE16 (Ar)+,(An)+                              |-|----46|-|-----|-----|          |1111_011_000_100_rrr-1nnn000000000000
  4853:           case 0b1111_011_000:
  4854:             irpMove16 ();
  4855:             break irpSwitch;
  4856: 
  4857:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  4858:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  4859:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  4860:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  4861:             //LPSTOP.W #<data>                                |-|-----6|P|-----|-----|          |1111_100_000_000_000-0000000111000000-{data}
  4862:           case 0b1111_100_000:
  4863:             irpLpstop ();
  4864:             break irpSwitch;
  4865: 
  4866:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  4867:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  4868:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  4869:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  4870:             //FPACK <data>                                    |A|012346|-|UUUUU|*****|          |1111_111_0dd_ddd_ddd [FLINE #<data>]
  4871:           case 0b1111_111_000:
  4872:           case 0b1111_111_001:
  4873:           case 0b1111_111_010:
  4874:           case 0b1111_111_011:
  4875:             irpFpack ();
  4876:             break irpSwitch;
  4877: 
  4878:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  4879:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  4880:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  4881:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  4882:             //DOS <data>                                      |A|012346|-|UUUUU|UUUUU|          |1111_111_1dd_ddd_ddd [FLINE #<data>]
  4883:           case 0b1111_111_100:
  4884:           case 0b1111_111_101:
  4885:           case 0b1111_111_110:
  4886:           case 0b1111_111_111:
  4887:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  4888:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  4889:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  4890:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  4891:             //FLINE #<data>                                   |-|012346|-|UUUUU|UUUUU|          |1111_ddd_ddd_ddd_ddd (line 1111 emulator)
  4892:           case 0b1111_000_000:
  4893:           case 0b1111_000_001:
  4894:           case 0b1111_000_010:
  4895:           case 0b1111_000_011:
  4896:           case 0b1111_000_100:
  4897:           case 0b1111_000_101:
  4898:           case 0b1111_000_110:
  4899:           case 0b1111_000_111:
  4900:           case 0b1111_001_110:
  4901:           case 0b1111_001_111:
  4902:           case 0b1111_010_101:
  4903:           case 0b1111_011_001:
  4904:           case 0b1111_011_010:
  4905:           case 0b1111_011_011:
  4906:           case 0b1111_011_100:
  4907:           case 0b1111_011_101:
  4908:           case 0b1111_011_110:
  4909:           case 0b1111_011_111:
  4910:           case 0b1111_100_001:
  4911:           case 0b1111_100_010:
  4912:           case 0b1111_100_011:
  4913:           case 0b1111_100_100:
  4914:           case 0b1111_100_101:
  4915:           case 0b1111_100_110:
  4916:           case 0b1111_100_111:
  4917:           case 0b1111_101_000:
  4918:           case 0b1111_101_001:
  4919:           case 0b1111_101_010:
  4920:           case 0b1111_101_011:
  4921:           case 0b1111_101_100:
  4922:           case 0b1111_101_101:
  4923:           case 0b1111_101_110:
  4924:           case 0b1111_101_111:
  4925:           case 0b1111_110_000:
  4926:           case 0b1111_110_001:
  4927:           case 0b1111_110_010:
  4928:           case 0b1111_110_011:
  4929:           case 0b1111_110_100:
  4930:           case 0b1111_110_101:
  4931:           case 0b1111_110_110:
  4932:           case 0b1111_110_111:
  4933:             irpFline ();
  4934:             break irpSwitch;
  4935: 
  4936:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  4937:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  4938:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  4939:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  4940:             //HFSBOOT                                         |-|012346|-|-----|-----|          |0100_111_000_000_000
  4941:             //HFSINST                                         |-|012346|-|-----|-----|          |0100_111_000_000_001
  4942:             //HFSSTR                                          |-|012346|-|-----|-----|          |0100_111_000_000_010
  4943:             //HFSINT                                          |-|012346|-|-----|-----|          |0100_111_000_000_011
  4944:             //EMXNOP                                          |-|012346|-|-----|-----|          |0100_111_000_000_100
  4945:           case 0b0100_111_000:
  4946:             irpEmx ();
  4947:             break;
  4948: 
  4949:           default:
  4950:             irpIllegal ();
  4951: 
  4952:           }  //switch XEiJ.regOC >>> 6
  4953: 
  4954:           //トレース例外
  4955:           //  命令実行前にsrのTビットがセットされていたとき命令実行後にトレース例外が発生する
  4956:           //  トレース例外の発動は命令の機能拡張であり、他の例外処理で命令が中断されたときはトレース例外は発生しない
  4957:           //  命令例外はトレース例外の前に、割り込み例外はトレース例外の後に処理される
  4958:           //  未実装命令のエミュレーションルーチンはrteの直前にsrのTビットを復元することで未実装命令が1個の命令としてトレースされたように見せる
  4959:           //    ;DOSコールの終了
  4960:           //    ~008616:
  4961:           //            btst.b  #$07,(sp)
  4962:           //            bne.s   ~00861E
  4963:           //            rte
  4964:           //    ~00861E:
  4965:           //            ori.w   #$8000,sr
  4966:           //            rte
  4967:           if (XEiJ.mpuTraceFlag != 0) {  //命令実行前にsrのTビットがセットされていた
  4968:             irpExceptionFormat2 (M68kException.M6E_TRACE << 2, XEiJ.regPC, XEiJ.regPC0);  //pcは次の命令
  4969:           }
  4970:           //クロックをカウントアップする
  4971:           //  オペランドをアクセスした時点ではまだXEiJ.mpuClockTimeが更新されていないのでXEiJ.mpuClockTime<xxxClock
  4972:           //  xxxTickを呼び出すときはXEiJ.mpuClockTime>=xxxClock
  4973:           XEiJ.mpuClockTime += XEiJ.mpuModifiedUnit * XEiJ.mpuCycleCount;
  4974:           //デバイスを呼び出す
  4975:           TickerQueue.tkqRun (XEiJ.mpuClockTime);
  4976:           //割り込みを受け付ける
  4977:           if ((t = XEiJ.mpuIMR & XEiJ.mpuIRR) != 0) {  //マスクされているレベルよりも高くて受け付けていない割り込みがあるとき
  4978:             if (XEiJ.MPU_INTERRUPT_SWITCH) {
  4979:               switch (t) {
  4980:               case 0b00000001:
  4981:               case 0b00000011:
  4982:               case 0b00000101:
  4983:               case 0b00000111:
  4984:               case 0b00001001:
  4985:               case 0b00001011:
  4986:               case 0b00001101:
  4987:               case 0b00001111:
  4988:               case 0b00010001:
  4989:               case 0b00010011:
  4990:               case 0b00010101:
  4991:               case 0b00010111:
  4992:               case 0b00011001:
  4993:               case 0b00011011:
  4994:               case 0b00011101:
  4995:               case 0b00011111:
  4996:               case 0b00100001:
  4997:               case 0b00100011:
  4998:               case 0b00100101:
  4999:               case 0b00100111:
  5000:               case 0b00101001:
  5001:               case 0b00101011:
  5002:               case 0b00101101:
  5003:               case 0b00101111:
  5004:               case 0b00110001:
  5005:               case 0b00110011:
  5006:               case 0b00110101:
  5007:               case 0b00110111:
  5008:               case 0b00111001:
  5009:               case 0b00111011:
  5010:               case 0b00111101:
  5011:               case 0b00111111:
  5012:               case 0b01000001:
  5013:               case 0b01000011:
  5014:               case 0b01000101:
  5015:               case 0b01000111:
  5016:               case 0b01001001:
  5017:               case 0b01001011:
  5018:               case 0b01001101:
  5019:               case 0b01001111:
  5020:               case 0b01010001:
  5021:               case 0b01010011:
  5022:               case 0b01010101:
  5023:               case 0b01010111:
  5024:               case 0b01011001:
  5025:               case 0b01011011:
  5026:               case 0b01011101:
  5027:               case 0b01011111:
  5028:               case 0b01100001:
  5029:               case 0b01100011:
  5030:               case 0b01100101:
  5031:               case 0b01100111:
  5032:               case 0b01101001:
  5033:               case 0b01101011:
  5034:               case 0b01101101:
  5035:               case 0b01101111:
  5036:               case 0b01110001:
  5037:               case 0b01110011:
  5038:               case 0b01110101:
  5039:               case 0b01110111:
  5040:               case 0b01111001:
  5041:               case 0b01111011:
  5042:               case 0b01111101:
  5043:               case 0b01111111:
  5044:               case 0b10000001:
  5045:               case 0b10000011:
  5046:               case 0b10000101:
  5047:               case 0b10000111:
  5048:               case 0b10001001:
  5049:               case 0b10001011:
  5050:               case 0b10001101:
  5051:               case 0b10001111:
  5052:               case 0b10010001:
  5053:               case 0b10010011:
  5054:               case 0b10010101:
  5055:               case 0b10010111:
  5056:               case 0b10011001:
  5057:               case 0b10011011:
  5058:               case 0b10011101:
  5059:               case 0b10011111:
  5060:               case 0b10100001:
  5061:               case 0b10100011:
  5062:               case 0b10100101:
  5063:               case 0b10100111:
  5064:               case 0b10101001:
  5065:               case 0b10101011:
  5066:               case 0b10101101:
  5067:               case 0b10101111:
  5068:               case 0b10110001:
  5069:               case 0b10110011:
  5070:               case 0b10110101:
  5071:               case 0b10110111:
  5072:               case 0b10111001:
  5073:               case 0b10111011:
  5074:               case 0b10111101:
  5075:               case 0b10111111:
  5076:               case 0b11000001:
  5077:               case 0b11000011:
  5078:               case 0b11000101:
  5079:               case 0b11000111:
  5080:               case 0b11001001:
  5081:               case 0b11001011:
  5082:               case 0b11001101:
  5083:               case 0b11001111:
  5084:               case 0b11010001:
  5085:               case 0b11010011:
  5086:               case 0b11010101:
  5087:               case 0b11010111:
  5088:               case 0b11011001:
  5089:               case 0b11011011:
  5090:               case 0b11011101:
  5091:               case 0b11011111:
  5092:               case 0b11100001:
  5093:               case 0b11100011:
  5094:               case 0b11100101:
  5095:               case 0b11100111:
  5096:               case 0b11101001:
  5097:               case 0b11101011:
  5098:               case 0b11101101:
  5099:               case 0b11101111:
  5100:               case 0b11110001:
  5101:               case 0b11110011:
  5102:               case 0b11110101:
  5103:               case 0b11110111:
  5104:               case 0b11111001:
  5105:               case 0b11111011:
  5106:               case 0b11111101:
  5107:               case 0b11111111:
  5108:                 //レベル7
  5109:                 XEiJ.mpuIRR &= ~XEiJ.MPU_SYS_INTERRUPT_MASK;  //割り込みを受け付ける
  5110:                 if ((t = XEiJ.sysAcknowledge ()) != 0) {  //デバイスにベクタ番号を要求して割り込み処理中の状態になったとき
  5111:                   irpInterrupt (t << 2, XEiJ.MPU_SYS_INTERRUPT_LEVEL);  //割り込み処理を開始する
  5112:                 }
  5113:                 break;
  5114:               case 0b00000010:
  5115:               case 0b00000110:
  5116:               case 0b00001010:
  5117:               case 0b00001110:
  5118:               case 0b00010010:
  5119:               case 0b00010110:
  5120:               case 0b00011010:
  5121:               case 0b00011110:
  5122:               case 0b00100010:
  5123:               case 0b00100110:
  5124:               case 0b00101010:
  5125:               case 0b00101110:
  5126:               case 0b00110010:
  5127:               case 0b00110110:
  5128:               case 0b00111010:
  5129:               case 0b00111110:
  5130:               case 0b01000010:
  5131:               case 0b01000110:
  5132:               case 0b01001010:
  5133:               case 0b01001110:
  5134:               case 0b01010010:
  5135:               case 0b01010110:
  5136:               case 0b01011010:
  5137:               case 0b01011110:
  5138:               case 0b01100010:
  5139:               case 0b01100110:
  5140:               case 0b01101010:
  5141:               case 0b01101110:
  5142:               case 0b01110010:
  5143:               case 0b01110110:
  5144:               case 0b01111010:
  5145:               case 0b01111110:
  5146:               case 0b10000010:
  5147:               case 0b10000110:
  5148:               case 0b10001010:
  5149:               case 0b10001110:
  5150:               case 0b10010010:
  5151:               case 0b10010110:
  5152:               case 0b10011010:
  5153:               case 0b10011110:
  5154:               case 0b10100010:
  5155:               case 0b10100110:
  5156:               case 0b10101010:
  5157:               case 0b10101110:
  5158:               case 0b10110010:
  5159:               case 0b10110110:
  5160:               case 0b10111010:
  5161:               case 0b10111110:
  5162:               case 0b11000010:
  5163:               case 0b11000110:
  5164:               case 0b11001010:
  5165:               case 0b11001110:
  5166:               case 0b11010010:
  5167:               case 0b11010110:
  5168:               case 0b11011010:
  5169:               case 0b11011110:
  5170:               case 0b11100010:
  5171:               case 0b11100110:
  5172:               case 0b11101010:
  5173:               case 0b11101110:
  5174:               case 0b11110010:
  5175:               case 0b11110110:
  5176:               case 0b11111010:
  5177:               case 0b11111110:
  5178:                 //レベル6
  5179:                 XEiJ.mpuIRR &= ~XEiJ.MPU_MFP_INTERRUPT_MASK;  //割り込みを受け付ける
  5180:                 if ((t = MC68901.mfpAcknowledge ()) != 0) {  //デバイスにベクタ番号を要求して割り込み処理中の状態になったとき
  5181:                   irpInterrupt (t << 2, XEiJ.MPU_MFP_INTERRUPT_LEVEL);  //割り込み処理を開始する
  5182:                 }
  5183:                 break;
  5184:               case 0b00000100:
  5185:               case 0b00001100:
  5186:               case 0b00010100:
  5187:               case 0b00011100:
  5188:               case 0b00100100:
  5189:               case 0b00101100:
  5190:               case 0b00110100:
  5191:               case 0b00111100:
  5192:               case 0b01000100:
  5193:               case 0b01001100:
  5194:               case 0b01010100:
  5195:               case 0b01011100:
  5196:               case 0b01100100:
  5197:               case 0b01101100:
  5198:               case 0b01110100:
  5199:               case 0b01111100:
  5200:               case 0b10000100:
  5201:               case 0b10001100:
  5202:               case 0b10010100:
  5203:               case 0b10011100:
  5204:               case 0b10100100:
  5205:               case 0b10101100:
  5206:               case 0b10110100:
  5207:               case 0b10111100:
  5208:               case 0b11000100:
  5209:               case 0b11001100:
  5210:               case 0b11010100:
  5211:               case 0b11011100:
  5212:               case 0b11100100:
  5213:               case 0b11101100:
  5214:               case 0b11110100:
  5215:               case 0b11111100:
  5216:                 //レベル5
  5217:                 XEiJ.mpuIRR &= ~XEiJ.MPU_SCC_INTERRUPT_MASK;  //割り込みを受け付ける
  5218:                 if ((t = Z8530.sccAcknowledge ()) != 0) {  //デバイスにベクタ番号を要求して割り込み処理中の状態になったとき
  5219:                   irpInterrupt (t << 2, XEiJ.MPU_SCC_INTERRUPT_LEVEL);  //割り込み処理を開始する
  5220:                 }
  5221:                 break;
  5222:               case 0b00010000:
  5223:               case 0b00110000:
  5224:               case 0b01010000:
  5225:               case 0b01110000:
  5226:               case 0b10010000:
  5227:               case 0b10110000:
  5228:               case 0b11010000:
  5229:               case 0b11110000:
  5230:                 //レベル3
  5231:                 XEiJ.mpuIRR &= ~XEiJ.MPU_DMA_INTERRUPT_MASK;  //割り込みを受け付ける
  5232:                 if ((t = HD63450.dmaAcknowledge ()) != 0) {  //デバイスにベクタ番号を要求して割り込み処理中の状態になったとき
  5233:                   irpInterrupt (t << 2, XEiJ.MPU_DMA_INTERRUPT_LEVEL);  //割り込み処理を開始する
  5234:                 }
  5235:                 break;
  5236:               case 0b00100000:
  5237:               case 0b01100000:
  5238:               case 0b10100000:
  5239:               case 0b11100000:
  5240:                 //レベル2
  5241:                 XEiJ.mpuIRR &= ~XEiJ.MPU_EB2_INTERRUPT_MASK;  //割り込みを受け付ける
  5242:                 if ((t = XEiJ.eb2Acknowledge ()) != 0) {  //デバイスにベクタ番号を要求して割り込み処理中の状態になったとき
  5243:                   irpInterrupt (t << 2, XEiJ.MPU_EB2_INTERRUPT_LEVEL);  //割り込み処理を開始する
  5244:                 }
  5245:                 break;
  5246:               case 0b01000000:
  5247:               case 0b11000000:
  5248:                 //レベル1
  5249:                 XEiJ.mpuIRR &= ~XEiJ.MPU_IOI_INTERRUPT_MASK;  //割り込みを受け付ける
  5250:                 if ((t = IOInterrupt.ioiAcknowledge ()) != 0) {  //デバイスにベクタ番号を要求して割り込み処理中の状態になったとき
  5251:                   irpInterrupt (t << 2, XEiJ.MPU_IOI_INTERRUPT_LEVEL);  //割り込み処理を開始する
  5252:                 }
  5253:                 break;
  5254:               }
  5255:             } else {
  5256:               t &= -t;
  5257:               //  x&=-xはxの最下位の1のビットだけを残す演算
  5258:               //  すなわちマスクされているレベルよりも高くて受け付けていない割り込みの中で最高レベルの割り込みのビットだけが残る
  5259:               //  最高レベルの割り込みのビットしか残っていないので、割り込みの有無をレベルの高い順ではなく使用頻度の高い順に調べられる
  5260:               //  MFPやDMAの割り込みがかかる度にそれより優先度の高いインタラプトスイッチが押されていないかどうかを確かめる必要がない
  5261:               if (t == XEiJ.MPU_MFP_INTERRUPT_MASK) {
  5262:                 XEiJ.mpuIRR &= ~XEiJ.MPU_MFP_INTERRUPT_MASK;  //割り込みを受け付ける
  5263:                 if ((t = MC68901.mfpAcknowledge ()) != 0) {  //デバイスにベクタ番号を要求して割り込み処理中の状態になったとき
  5264:                   irpInterrupt (t << 2, XEiJ.MPU_MFP_INTERRUPT_LEVEL);  //割り込み処理を開始する
  5265:                 }
  5266:               } else if (t == XEiJ.MPU_DMA_INTERRUPT_MASK) {
  5267:                 XEiJ.mpuIRR &= ~XEiJ.MPU_DMA_INTERRUPT_MASK;  //割り込みを受け付ける
  5268:                 if ((t = HD63450.dmaAcknowledge ()) != 0) {  //デバイスにベクタ番号を要求して割り込み処理中の状態になったとき
  5269:                   irpInterrupt (t << 2, XEiJ.MPU_DMA_INTERRUPT_LEVEL);  //割り込み処理を開始する
  5270:                 }
  5271:               } else if (t == XEiJ.MPU_SCC_INTERRUPT_MASK) {
  5272:                 XEiJ.mpuIRR &= ~XEiJ.MPU_SCC_INTERRUPT_MASK;  //割り込みを受け付ける
  5273:                 if ((t = Z8530.sccAcknowledge ()) != 0) {  //デバイスにベクタ番号を要求して割り込み処理中の状態になったとき
  5274:                   irpInterrupt (t << 2, XEiJ.MPU_SCC_INTERRUPT_LEVEL);  //割り込み処理を開始する
  5275:                 }
  5276:               } else if (t == XEiJ.MPU_IOI_INTERRUPT_MASK) {
  5277:                 XEiJ.mpuIRR &= ~XEiJ.MPU_IOI_INTERRUPT_MASK;  //割り込みを受け付ける
  5278:                 if ((t = IOInterrupt.ioiAcknowledge ()) != 0) {  //デバイスにベクタ番号を要求して割り込み処理中の状態になったとき
  5279:                   irpInterrupt (t << 2, XEiJ.MPU_IOI_INTERRUPT_LEVEL);  //割り込み処理を開始する
  5280:                 }
  5281:               } else if (t == XEiJ.MPU_EB2_INTERRUPT_MASK) {
  5282:                 XEiJ.mpuIRR &= ~XEiJ.MPU_EB2_INTERRUPT_MASK;  //割り込みを受け付ける
  5283:                 if ((t = XEiJ.eb2Acknowledge ()) != 0) {  //デバイスにベクタ番号を要求して割り込み処理中の状態になったとき
  5284:                   irpInterrupt (t << 2, XEiJ.MPU_EB2_INTERRUPT_LEVEL);  //割り込み処理を開始する
  5285:                 }
  5286:               } else if (t == XEiJ.MPU_SYS_INTERRUPT_MASK) {
  5287:                 XEiJ.mpuIRR &= ~XEiJ.MPU_SYS_INTERRUPT_MASK;  //割り込みを受け付ける
  5288:                 if ((t = XEiJ.sysAcknowledge ()) != 0) {  //デバイスにベクタ番号を要求して割り込み処理中の状態になったとき
  5289:                   irpInterrupt (t << 2, XEiJ.MPU_SYS_INTERRUPT_LEVEL);  //割り込み処理を開始する
  5290:                 }
  5291:               }
  5292:             }
  5293:           }  //if t!=0
  5294:           if (MC68901.MFP_DELAYED_INTERRUPT) {
  5295:             XEiJ.mpuIRR |= XEiJ.mpuDIRR;  //遅延割り込み要求
  5296:             XEiJ.mpuDIRR = 0;
  5297:           }
  5298:         }  //命令ループ
  5299:       } catch (M68kException e) {
  5300:         if (M68kException.m6eNumber == M68kException.M6E_WAIT_EXCEPTION) {  //待機例外
  5301:           if (irpWaitException ()) {
  5302:             continue;
  5303:           } else {
  5304:             break errorLoop;
  5305:           }
  5306:         }
  5307:         if (M68kException.m6eNumber == M68kException.M6E_INSTRUCTION_BREAK_POINT) {  //命令ブレークポイントによる停止
  5308:           XEiJ.regPC = XEiJ.regPC0;
  5309:           XEiJ.mpuStop1 (null);  //"Instruction Break Point"
  5310:           break errorLoop;
  5311:         }
  5312:         //例外処理
  5313:         //  ここで処理するのはベクタ番号が2~63の例外に限る
  5314:         //  例外処理のサイクル数はACCESS_FAULTとADDRESS_ERROR以外は19になっているので必要ならば補正してからthrowする
  5315:         //  使用頻度が高いと思われる例外はインライン展開するのでここには来ない
  5316:         //  セーブされるpcは以下の例外は命令の先頭、これ以外は次の命令
  5317:         //     2  ACCESS_FAULT
  5318:         //     3  ADDRESS_ERROR
  5319:         //     4  ILLEGAL_INSTRUCTION
  5320:         //     8  PRIVILEGE_VIOLATION
  5321:         //    10  LINE_1010_EMULATOR
  5322:         //    11  LINE_1111_EMULATOR
  5323:         //    14  FORMAT_ERROR
  5324:         //    48  FP_BRANCH_SET_UNORDERED
  5325:         //    60  UNIMPLEMENTED_EFFECTIVE
  5326:         //    61  UNIMPLEMENTED_INSTRUCTION
  5327:         //              111111111122222222223333333333444444444455555555556666
  5328:         //    0123456789012345678901234567890123456789012345678901234567890123
  5329:         if (0b0011100010110010000000000000000000000000000000001000000000001100L << M68kException.m6eNumber < 0L) {
  5330:           XEiJ.regPC = XEiJ.regPC0;  //セーブされるpcは命令の先頭
  5331:           //アドレスレジスタを巻き戻す
  5332:           //  A7を含むのでユーザモードのときはスーパーバイザモードに移行する前に巻き戻すこと
  5333:           for (int arr = 8; M68kException.m6eIncremented != 0L; arr++) {
  5334:             XEiJ.regRn[arr] -= (byte) M68kException.m6eIncremented;
  5335:             M68kException.m6eIncremented = M68kException.m6eIncremented + 0x80L >> 8;
  5336:           }
  5337:         }
  5338:         //FSLWのTTRを設定する
  5339:         //  透過変換でアドレス変換キャッシュがヒットしてバスエラーが発生したときFSLWのTTRが設定されていない
  5340:         if ((M68kException.m6eFSLW & (M68kException.M6E_FSLW_BUS_ERROR_ON_READ | M68kException.M6E_FSLW_BUS_ERROR_ON_WRITE)) != 0) {  //バスエラーのとき
  5341:           if (((M68kException.m6eFSLW & M68kException.M6E_FSLW_TM_SUPERVISOR) != 0 ?
  5342:                (M68kException.m6eFSLW & M68kException.M6E_FSLW_TM_CODE) != 0 ? mmuSuperCodeTransparent : mmuSuperDataTransparent :
  5343:                (M68kException.m6eFSLW & M68kException.M6E_FSLW_TM_CODE) != 0 ? mmuUserCodeTransparent : mmuUserDataTransparent)[M68kException.m6eAddress >>> 24] != 0) {  //透過変換
  5344:             M68kException.m6eFSLW |= M68kException.M6E_FSLW_TRANSPARENT;
  5345:           }
  5346:         }
  5347:         if (M68kException.M6E_DEBUG_ERROR) {
  5348:           System.out.println (M68kException.m6eToString6 ());  //srを表示するのでsrを更新する前に呼び出すこと
  5349:         }
  5350:         try {
  5351:           int save_sr = XEiJ.regSRT1 | XEiJ.regSRS | XEiJ.regSRM | XEiJ.regSRI | XEiJ.regCCR;
  5352:           XEiJ.regSRT1 = XEiJ.regSRT0 = 0;  //srのTビットを消す
  5353:           int sp;
  5354:           if (XEiJ.regSRS != 0) {  //スーパーバイザモード
  5355:             sp = XEiJ.regRn[15];
  5356:           } else {  //ユーザモード
  5357:             XEiJ.regSRS = XEiJ.REG_SR_S;  //スーパーバイザモードへ移行する
  5358:             XEiJ.mpuUSP = XEiJ.regRn[15];  //USPを保存
  5359:             sp = XEiJ.mpuISP;  //SSPを復元
  5360:             if (DataBreakPoint.DBP_ON) {
  5361:               DataBreakPoint.dbpMemoryMap = DataBreakPoint.dbpSuperMap;  //スーパーバイザメモリマップに切り替える
  5362:             } else {
  5363:               XEiJ.busMemoryMap = XEiJ.busSuperMap;  //スーパーバイザメモリマップに切り替える
  5364:             }
  5365:             if (InstructionBreakPoint.IBP_ON) {
  5366:               InstructionBreakPoint.ibpOp1MemoryMap = InstructionBreakPoint.ibpOp1SuperMap;
  5367:             }
  5368:           }
  5369:           //以下はスーパーバイザモード
  5370:           XEiJ.mpuClockTime += XEiJ.mpuModifiedUnit * 19;
  5371:           //  同じオフセットで異なるフォーマットになるものはここでは処理できない
  5372:           if (M68kException.m6eNumber == M68kException.M6E_ACCESS_FAULT) {
  5373:             //ホストファイルシステムのデバイスコマンドを強制終了させる
  5374:             HFS.hfsState = HFS.HFS_STATE_IDLE;
  5375:             //FORMAT $4の例外スタックフレームを作る
  5376:             XEiJ.regRn[15] = sp -= 16;
  5377:             mmuWriteLongData (sp + 12, M68kException.m6eFSLW, 1);  //15-12:フォルトステータスロングワード(FSLW)
  5378:             mmuWriteLongData (sp + 8, M68kException.m6eAddress, 1);  //11-8:フォルトアドレス
  5379:             mmuWriteWordData (sp + 6, 0x4000 | M68kException.M6E_ACCESS_FAULT << 2, 1);  //7-6:フォーマットとベクタオフセット
  5380:             //                   111111111122222222223333333333444444444455555555556666
  5381:             //         0123456789012345678901234567890123456789012345678901234567890123
  5382:           } else if (0b0001011101000000000000000000000000000000000000000000000000000000L << M68kException.m6eNumber < 0L) {
  5383:             //FORMAT $2の例外スタックフレームを作る
  5384:             XEiJ.regRn[15] = sp -= 12;
  5385:             mmuWriteLongData (sp + 8, M68kException.m6eAddress, 1);  //11-8:命令アドレス
  5386:             mmuWriteWordData (sp + 6, 0x2000 | M68kException.m6eNumber << 2, 1);  //7-6:フォーマットとベクタオフセット
  5387:           } else {
  5388:             //FORMAT $0の例外スタックフレームを作る
  5389:             XEiJ.regRn[15] = sp -= 8;
  5390:             mmuWriteWordData (sp + 6, M68kException.m6eNumber << 2, 1);  //7-6:フォーマットとベクタオフセット
  5391:           }
  5392:           mmuWriteLongData (sp + 2, XEiJ.regPC, 1);  //5-2:プログラムカウンタ
  5393:           mmuWriteWordData (sp, save_sr, 1);  //1-0:ステータスレジスタ
  5394:           irpSetPC (mmuReadLongFour (XEiJ.mpuVBR + (M68kException.m6eNumber << 2), 1));  //例外ベクタを取り出してジャンプする
  5395:           if (XEiJ.dbgStopOnError) {  //エラーで停止する場合
  5396:             if (XEiJ.dbgDoStopOnError ()) {
  5397:               break errorLoop;
  5398:             }
  5399:           }
  5400:         } catch (M68kException ee) {  //ダブルバスフォルト
  5401:           XEiJ.dbgDoubleBusFault ();
  5402:           break errorLoop;
  5403:         }
  5404:       }  //catch M68kException
  5405:     }  //例外ループ
  5406: 
  5407:     //  通常
  5408:     //    pc0  最後に実行した命令
  5409:     //    pc  次に実行する命令
  5410:     //  バスエラー、アドレスエラー、不当命令、特権違反で停止したとき
  5411:     //    pc0  エラーを発生させた命令
  5412:     //    pc  例外処理ルーチンの先頭
  5413:     //  ダブルバスフォルトで停止したとき
  5414:     //    pc0  エラーを発生させた命令
  5415:     //    pc  エラーを発生させた命令
  5416:     //  命令ブレークポイントで停止したとき
  5417:     //    pc0  命令ブレークポイントが設定された、次に実行する命令
  5418:     //    pc  命令ブレークポイントが設定された、次に実行する命令
  5419:     //  データブレークポイントで停止したとき
  5420:     //    pc0  データを書き換えた、最後に実行した命令
  5421:     //    pc  次に実行する命令
  5422: 
  5423:     //分岐ログに停止レコードを記録する
  5424:     if (BranchLog.BLG_ON) {
  5425:       //BranchLog.blgStop ();
  5426:       int i = (char) BranchLog.blgNewestRecord << BranchLog.BLG_RECORD_SHIFT;
  5427:       BranchLog.blgArray[i] = BranchLog.blgHead | BranchLog.blgSuper;
  5428:       BranchLog.blgArray[i + 1] = XEiJ.regPC;  //次に実行する命令
  5429:     }
  5430: 
  5431:   }  //mpuCore()
  5432: 
  5433: 
  5434: 
  5435:   //cont = irpWaitException ()
  5436:   //  待機例外をキャッチしたとき
  5437:   public static boolean irpWaitException () {
  5438:     XEiJ.regPC = XEiJ.regPC0;  //PCを巻き戻す
  5439:     XEiJ.regRn[8 + (XEiJ.regOC & 7)] += WaitInstruction.REWIND_AR[XEiJ.regOC >> 3];  //(Ar)+|-(Ar)で変化したArを巻き戻す
  5440:     try {
  5441:       //トレース例外を処理する
  5442:       if (XEiJ.mpuTraceFlag != 0) {  //命令実行前にsrのTビットがセットされていた
  5443:         irpExceptionFormat2 (M68kException.M6E_TRACE << 2, XEiJ.regPC, XEiJ.regPC0);  //pcは次の命令
  5444:       }
  5445:       //デバイスを呼び出す
  5446:       TickerQueue.tkqRun (XEiJ.mpuClockTime);
  5447:       //割り込みを受け付ける
  5448:       int t;
  5449:       if ((t = XEiJ.mpuIMR & XEiJ.mpuIRR) != 0) {  //マスクされているレベルよりも高くて受け付けていない割り込みがあるとき
  5450:         t &= -t;
  5451:         //  x&=-xはxの最下位の1のビットだけを残す演算
  5452:         //  すなわちマスクされているレベルよりも高くて受け付けていない割り込みの中で最高レベルの割り込みのビットだけが残る
  5453:         //  最高レベルの割り込みのビットしか残っていないので、割り込みの有無をレベルの高い順ではなく使用頻度の高い順に調べられる
  5454:         //  MFPやDMAの割り込みがかかる度にそれより優先度の高いインタラプトスイッチが押されていないかどうかを確かめる必要がない
  5455:         if (t == XEiJ.MPU_MFP_INTERRUPT_MASK) {
  5456:           XEiJ.mpuIRR &= ~XEiJ.MPU_MFP_INTERRUPT_MASK;  //割り込みを受け付ける
  5457:           if ((t = MC68901.mfpAcknowledge ()) != 0) {  //デバイスにベクタ番号を要求して割り込み処理中の状態になったとき
  5458:             irpInterrupt (t << 2, XEiJ.MPU_MFP_INTERRUPT_LEVEL);  //割り込み処理を開始する
  5459:           }
  5460:         } else if (t == XEiJ.MPU_DMA_INTERRUPT_MASK) {
  5461:           XEiJ.mpuIRR &= ~XEiJ.MPU_DMA_INTERRUPT_MASK;  //割り込みを受け付ける
  5462:           if ((t = HD63450.dmaAcknowledge ()) != 0) {  //デバイスにベクタ番号を要求して割り込み処理中の状態になったとき
  5463:             irpInterrupt (t << 2, XEiJ.MPU_DMA_INTERRUPT_LEVEL);  //割り込み処理を開始する
  5464:           }
  5465:         } else if (t == XEiJ.MPU_SCC_INTERRUPT_MASK) {
  5466:           XEiJ.mpuIRR &= ~XEiJ.MPU_SCC_INTERRUPT_MASK;  //割り込みを受け付ける
  5467:           if ((t = Z8530.sccAcknowledge ()) != 0) {  //デバイスにベクタ番号を要求して割り込み処理中の状態になったとき
  5468:             irpInterrupt (t << 2, XEiJ.MPU_SCC_INTERRUPT_LEVEL);  //割り込み処理を開始する
  5469:           }
  5470:         } else if (t == XEiJ.MPU_IOI_INTERRUPT_MASK) {
  5471:           XEiJ.mpuIRR &= ~XEiJ.MPU_IOI_INTERRUPT_MASK;  //割り込みを受け付ける
  5472:           if ((t = IOInterrupt.ioiAcknowledge ()) != 0) {  //デバイスにベクタ番号を要求して割り込み処理中の状態になったとき
  5473:             irpInterrupt (t << 2, XEiJ.MPU_IOI_INTERRUPT_LEVEL);  //割り込み処理を開始する
  5474:           }
  5475:         } else if (t == XEiJ.MPU_EB2_INTERRUPT_MASK) {
  5476:           XEiJ.mpuIRR &= ~XEiJ.MPU_EB2_INTERRUPT_MASK;  //割り込みを受け付ける
  5477:           if ((t = XEiJ.eb2Acknowledge ()) != 0) {  //デバイスにベクタ番号を要求して割り込み処理中の状態になったとき
  5478:             irpInterrupt (t << 2, XEiJ.MPU_EB2_INTERRUPT_LEVEL);  //割り込み処理を開始する
  5479:           }
  5480:         } else if (t == XEiJ.MPU_SYS_INTERRUPT_MASK) {
  5481:           XEiJ.mpuIRR &= ~XEiJ.MPU_SYS_INTERRUPT_MASK;  //割り込みを受け付ける
  5482:           if ((t = XEiJ.sysAcknowledge ()) != 0) {  //デバイスにベクタ番号を要求して割り込み処理中の状態になったとき
  5483:             irpInterrupt (t << 2, XEiJ.MPU_SYS_INTERRUPT_LEVEL);  //割り込み処理を開始する
  5484:           }
  5485:         }
  5486:       }  //if t!=0
  5487:       if (MC68901.MFP_DELAYED_INTERRUPT) {
  5488:         XEiJ.mpuIRR |= XEiJ.mpuDIRR;  //遅延割り込み要求
  5489:         XEiJ.mpuDIRR = 0;
  5490:       }
  5491:     } catch (M68kException e) {
  5492:       //!!! 待機例外処理中のバスエラーの処理は省略
  5493:       XEiJ.dbgDoubleBusFault ();
  5494:       return false;
  5495:     }  //catch M68kException
  5496:     return true;
  5497:   }  //irpWaitException
  5498: 
  5499: 
  5500: 
  5501:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  5502:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  5503:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  5504:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  5505:   //ORI.B #<data>,<ea>                              |-|012346|-|-UUUU|-**00|D M+-WXZ  |0000_000_000_mmm_rrr-{data}
  5506:   //OR.B #<data>,<ea>                               |A|012346|-|-UUUU|-**00|  M+-WXZ  |0000_000_000_mmm_rrr-{data}  [ORI.B #<data>,<ea>]
  5507:   //ORI.B #<data>,CCR                               |-|012346|-|*****|*****|          |0000_000_000_111_100-{data}
  5508:   public static void irpOriByte () throws M68kException {
  5509:     int ea = XEiJ.regOC & 63;
  5510:     int z = mmuReadByteSignExword ((XEiJ.regPC += 2) - 1, XEiJ.regSRS);  //pcbs
  5511:     if (ea < XEiJ.EA_AR) {  //ORI.B #<data>,Dr
  5512:       if (XEiJ.DBG_ORI_BYTE_ZERO_D0) {
  5513:         if (z == 0 && ea == 0 && XEiJ.dbgOriByteZeroD0) {  //ORI.B #$00,D0
  5514:           M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION;
  5515:           throw M68kException.m6eSignal;
  5516:         }
  5517:       }
  5518:       XEiJ.mpuCycleCount++;
  5519:       z = XEiJ.regRn[ea] |= 255 & z;  //0拡張してからOR
  5520:       XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & z];  //ccr_tst_byte
  5521:     } else if (ea == XEiJ.EA_IM) {  //ORI.B #<data>,CCR
  5522:       XEiJ.mpuCycleCount++;
  5523:       XEiJ.regCCR |= XEiJ.REG_CCR_MASK & z;
  5524:     } else {  //ORI.B #<data>,<mem>
  5525:       XEiJ.mpuCycleCount++;
  5526:       int a = efaMltByte (ea);
  5527:       mmuWriteByteData (a, z |= mmuModifyByteSignData (a, XEiJ.regSRS), XEiJ.regSRS);
  5528:       XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & z];  //ccr_tst_byte
  5529:     }
  5530:   }  //irpOriByte
  5531: 
  5532:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  5533:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  5534:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  5535:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  5536:   //ORI.W #<data>,<ea>                              |-|012346|-|-UUUU|-**00|D M+-WXZ  |0000_000_001_mmm_rrr-{data}
  5537:   //OR.W #<data>,<ea>                               |A|012346|-|-UUUU|-**00|  M+-WXZ  |0000_000_001_mmm_rrr-{data}  [ORI.W #<data>,<ea>]
  5538:   //ORI.W #<data>,SR                                |-|012346|P|*****|*****|          |0000_000_001_111_100-{data}
  5539:   public static void irpOriWord () throws M68kException {
  5540:     int ea = XEiJ.regOC & 63;
  5541:     if (ea < XEiJ.EA_AR) {  //ORI.W #<data>,Dr
  5542:       int z = mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);  //pcws
  5543:       XEiJ.mpuCycleCount++;
  5544:       z = XEiJ.regRn[ea] |= (char) z;  //0拡張してからOR
  5545:       XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (char) z - 1 >> 31 & XEiJ.REG_CCR_Z | ((short) z < 0 ? XEiJ.REG_CCR_N : 0);  //ccr_tst_word
  5546:     } else if (ea == XEiJ.EA_IM) {  //ORI.W #<data>,SR
  5547:       if (XEiJ.regSRS == 0) {  //ユーザモードのとき
  5548:         M68kException.m6eNumber = M68kException.M6E_PRIVILEGE_VIOLATION;
  5549:         throw M68kException.m6eSignal;
  5550:       }
  5551:       //以下はスーパーバイザモード
  5552:       XEiJ.mpuCycleCount += 5;
  5553:       irpSetSR (XEiJ.regSRT1 | XEiJ.regSRS | XEiJ.regSRM | XEiJ.regSRI | XEiJ.regCCR | mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, 1));  //pcws。特権違反チェックが先
  5554:     } else {  //ORI.W #<data>,<mem>
  5555:       int z = mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);  //pcws
  5556:       XEiJ.mpuCycleCount++;
  5557:       int a = efaMltWord (ea);
  5558:       mmuWriteWordData (a, z |= mmuModifyWordSignData (a, XEiJ.regSRS), XEiJ.regSRS);
  5559:       XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (char) z - 1 >> 31 & XEiJ.REG_CCR_Z | ((short) z < 0 ? XEiJ.REG_CCR_N : 0);  //ccr_tst_word
  5560:     }
  5561:   }  //irpOriWord
  5562: 
  5563:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  5564:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  5565:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  5566:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  5567:   //ORI.L #<data>,<ea>                              |-|012346|-|-UUUU|-**00|D M+-WXZ  |0000_000_010_mmm_rrr-{data}
  5568:   //OR.L #<data>,<ea>                               |A|012346|-|-UUUU|-**00|  M+-WXZ  |0000_000_010_mmm_rrr-{data}  [ORI.L #<data>,<ea>]
  5569:   public static void irpOriLong () throws M68kException {
  5570:     int ea = XEiJ.regOC & 63;
  5571:     int y = mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS);  //pcls
  5572:     int z;
  5573:     if (ea < XEiJ.EA_AR) {  //ORI.L #<data>,Dr
  5574:       XEiJ.mpuCycleCount++;
  5575:       z = XEiJ.regRn[ea] |= y;
  5576:     } else {  //ORI.L #<data>,<mem>
  5577:       XEiJ.mpuCycleCount++;
  5578:       int a = efaMltLong (ea);
  5579:       mmuWriteLongData (a, z = mmuModifyLongData (a, XEiJ.regSRS) | y, XEiJ.regSRS);
  5580:     }
  5581:     XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X);  //ccr_tst
  5582:   }  //irpOriLong
  5583: 
  5584:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  5585:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  5586:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  5587:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  5588:   //BITREV.L Dr                                     |-|------|-|-----|-----|D         |0000_000_011_000_rrr (ISA_C)
  5589:   //CMP2.B <ea>,Rn                                  |-|--234S|-|-UUUU|-U*U*|  M  WXZP |0000_000_011_mmm_rrr-rnnn000000000000
  5590:   //CHK2.B <ea>,Rn                                  |-|--234S|-|-UUUU|-U*U*|  M  WXZP |0000_000_011_mmm_rrr-rnnn100000000000
  5591:   //
  5592:   //BITREV.L Dr
  5593:   //  Drのビットの並びを逆順にする。CCRは変化しない
  5594:   //
  5595:   //CHK2.B <ea>,Rn
  5596:   //  <ea>から下限と上限をリードしてRnが範囲内か調べる
  5597:   //  CHK2.B <ea>,Anは下限と上限をそれぞれロングに符号拡張してロングで比較する
  5598:   //  Rnが下限または上限と等しいときZをセットする
  5599:   //  Rnが範囲外のときCをセットする。このときCHK instruction例外が発生する
  5600:   //  060ISPのソースは注釈に誤りが多いので注釈ではなくコードを参考にする
  5601:   //  CCR
  5602:   //    X  変化しない
  5603:   //    N  変化しない(M68000PRMでは未定義)
  5604:   //    Z  Rn-LB==0||Rn-LB==UB-LB
  5605:   //    V  変化しない(M68000PRMでは未定義)
  5606:   //    C  Rn-LB>UB-LB(符号なし比較)
  5607:   //
  5608:   //CMP2.B <ea>,Rn
  5609:   //  <ea>から下限と上限をリードしてRnが範囲内か調べる
  5610:   //  CMP2.B <ea>,Anは下限と上限をそれぞれロングに符号拡張してロングで比較する
  5611:   //  Rnが下限または上限と等しいときZをセットする
  5612:   //  Rnが範囲外のときCをセットする
  5613:   //  060ISPのソースは注釈に誤りが多いので注釈ではなくコードを参考にする
  5614:   //  CCR
  5615:   //    X  変化しない
  5616:   //    N  変化しない(M68000PRMでは未定義)
  5617:   //    Z  Rn-LB==0||Rn-LB==UB-LB
  5618:   //    V  変化しない(M68000PRMでは未定義)
  5619:   //    C  Rn-LB>UB-LB(符号なし比較)
  5620:   public static void irpCmp2Chk2Byte () throws M68kException {
  5621:     int ea = XEiJ.regOC & 63;
  5622:     if (ea < XEiJ.EA_AR) {  //BITREV.L Dr
  5623:       XEiJ.mpuCycleCount++;
  5624:       int x = XEiJ.regRn[ea];
  5625:       XEiJ.regRn[ea] = XEiJ.MPU_BITREV_TABLE_0[x & 2047] | XEiJ.MPU_BITREV_TABLE_1[x << 10 >>> 21] | XEiJ.MPU_BITREV_TABLE_2[x >>> 22];
  5626:     } else {  //CMP2/CHK2.B <ea>,Rn
  5627:       M68kException.m6eNumber = M68kException.M6E_UNIMPLEMENTED_INSTRUCTION;
  5628:       throw M68kException.m6eSignal;
  5629:     }
  5630:   }  //irpCmp2Chk2Byte
  5631: 
  5632:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  5633:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  5634:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  5635:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  5636:   //BTST.L Dq,Dr                                    |-|012346|-|--U--|--*--|D         |0000_qqq_100_000_rrr
  5637:   //MOVEP.W (d16,Ar),Dq                             |-|01234S|-|-----|-----|          |0000_qqq_100_001_rrr-{data}
  5638:   //BTST.B Dq,<ea>                                  |-|012346|-|--U--|--*--|  M+-WXZPI|0000_qqq_100_mmm_rrr
  5639:   public static void irpBtstReg () throws M68kException {
  5640:     int ea = XEiJ.regOC & 63;
  5641:     int qqq = XEiJ.regOC >> 9;  //qqq
  5642:     if (ea >> 3 == XEiJ.MMM_AR) {  //MOVEP.W (d16,Ar),Dq
  5643:       M68kException.m6eNumber = M68kException.M6E_UNIMPLEMENTED_INSTRUCTION;
  5644:       throw M68kException.m6eSignal;
  5645:     } else {  //BTST.L Dq,Dr/<ea>
  5646:       int y = XEiJ.regRn[qqq];
  5647:       if (ea < XEiJ.EA_AR) {  //BTST.L Dq,Dr
  5648:         XEiJ.mpuCycleCount++;
  5649:         XEiJ.regCCR = XEiJ.regCCR & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_N | XEiJ.REG_CCR_V | XEiJ.REG_CCR_C) | (~XEiJ.regRn[ea] >>> y & 1) << 2;  //ccr_btst。intのシフトは5bitでマスクされるので&31を省略
  5650:       } else {  //BTST.B Dq,<ea>
  5651:         XEiJ.mpuCycleCount++;
  5652:         XEiJ.regCCR = XEiJ.regCCR & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_N | XEiJ.REG_CCR_V | XEiJ.REG_CCR_C) | (~(ea == XEiJ.EA_IM ? mmuReadByteSignExword ((XEiJ.regPC += 2) - 1, XEiJ.regSRS) : mmuReadByteSignData (efaAnyByte (ea), XEiJ.regSRS)) >>> (y & 7) & 1) << 2;  //ccr_btst。pcbs。イミディエイトを分離
  5653:       }
  5654:     }
  5655:   }  //irpBtstReg
  5656: 
  5657:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  5658:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  5659:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  5660:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  5661:   //BCHG.L Dq,Dr                                    |-|012346|-|--U--|--*--|D         |0000_qqq_101_000_rrr
  5662:   //MOVEP.L (d16,Ar),Dq                             |-|01234S|-|-----|-----|          |0000_qqq_101_001_rrr-{data}
  5663:   //BCHG.B Dq,<ea>                                  |-|012346|-|--U--|--*--|  M+-WXZ  |0000_qqq_101_mmm_rrr
  5664:   public static void irpBchgReg () throws M68kException {
  5665:     int ea = XEiJ.regOC & 63;
  5666:     int qqq = XEiJ.regOC >> 9;  //qqq
  5667:     if (ea >> 3 == XEiJ.MMM_AR) {  //MOVEP.L (d16,Ar),Dq
  5668:       M68kException.m6eNumber = M68kException.M6E_UNIMPLEMENTED_INSTRUCTION;
  5669:       throw M68kException.m6eSignal;
  5670:     } else {  //BCHG.L Dq,Dr/<ea>
  5671:       int x;
  5672:       int y = XEiJ.regRn[qqq];
  5673:       if (ea < XEiJ.EA_AR) {  //BCHG.L Dq,Dr
  5674:         XEiJ.mpuCycleCount++;
  5675:         XEiJ.regRn[ea] = (x = XEiJ.regRn[ea]) ^ (y = 1 << y);  //intのシフトは5bitでマスクされるので1<<(y&0x1f)の&0x1fを省略
  5676:       } else {  //BCHG.B Dq,<ea>
  5677:         XEiJ.mpuCycleCount++;
  5678:         int a = efaMltByte (ea);
  5679:         mmuWriteByteData (a, (x = mmuModifyByteSignData (a, XEiJ.regSRS)) ^ (y = 1 << (y & 7)), XEiJ.regSRS);
  5680:       }
  5681:       XEiJ.regCCR = XEiJ.regCCR & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_N | XEiJ.REG_CCR_V | XEiJ.REG_CCR_C) | (x & y) - 1 >>> 31 << 2;  //ccr_btst
  5682:     }
  5683:   }  //irpBchgReg
  5684: 
  5685:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  5686:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  5687:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  5688:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  5689:   //BCLR.L Dq,Dr                                    |-|012346|-|--U--|--*--|D         |0000_qqq_110_000_rrr
  5690:   //MOVEP.W Dq,(d16,Ar)                             |-|01234S|-|-----|-----|          |0000_qqq_110_001_rrr-{data}
  5691:   //BCLR.B Dq,<ea>                                  |-|012346|-|--U--|--*--|  M+-WXZ  |0000_qqq_110_mmm_rrr
  5692:   public static void irpBclrReg () throws M68kException {
  5693:     int ea = XEiJ.regOC & 63;
  5694:     int y = XEiJ.regRn[XEiJ.regOC >> 9];  //qqq
  5695:     if (ea >> 3 == XEiJ.MMM_AR) {  //MOVEP.W Dq,(d16,Ar)
  5696:       M68kException.m6eNumber = M68kException.M6E_UNIMPLEMENTED_INSTRUCTION;
  5697:       throw M68kException.m6eSignal;
  5698:     } else {  //BCLR.L Dq,Dr/<ea>
  5699:       int x;
  5700:       if (ea < XEiJ.EA_AR) {  //BCLR.L Dq,Dr
  5701:         XEiJ.mpuCycleCount++;
  5702:         XEiJ.regRn[ea] = (x = XEiJ.regRn[ea]) & ~(y = 1 << y);  //intのシフトは5bitでマスクされるので1<<(y&0x1f)の&0x1fを省略
  5703:       } else {  //BCLR.B Dq,<ea>
  5704:         XEiJ.mpuCycleCount++;
  5705:         int a = efaMltByte (ea);
  5706:         mmuWriteByteData (a, (x = mmuModifyByteSignData (a, XEiJ.regSRS)) & ~(y = 1 << (y & 7)), XEiJ.regSRS);
  5707:       }
  5708:       XEiJ.regCCR = XEiJ.regCCR & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_N | XEiJ.REG_CCR_V | XEiJ.REG_CCR_C) | (x & y) - 1 >>> 31 << 2;  //ccr_btst
  5709:     }
  5710:   }  //irpBclrReg
  5711: 
  5712:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  5713:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  5714:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  5715:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  5716:   //BSET.L Dq,Dr                                    |-|012346|-|--U--|--*--|D         |0000_qqq_111_000_rrr
  5717:   //MOVEP.L Dq,(d16,Ar)                             |-|01234S|-|-----|-----|          |0000_qqq_111_001_rrr-{data}
  5718:   //BSET.B Dq,<ea>                                  |-|012346|-|--U--|--*--|  M+-WXZ  |0000_qqq_111_mmm_rrr
  5719:   public static void irpBsetReg () throws M68kException {
  5720:     int ea = XEiJ.regOC & 63;
  5721:     int y = XEiJ.regRn[XEiJ.regOC >> 9];  //qqq
  5722:     if (ea >> 3 == XEiJ.MMM_AR) {  //MOVEP.L Dq,(d16,Ar)
  5723:       M68kException.m6eNumber = M68kException.M6E_UNIMPLEMENTED_INSTRUCTION;
  5724:       throw M68kException.m6eSignal;
  5725:     } else {  //BSET.L Dq,Dr/<ea>
  5726:       int x;
  5727:       if (ea < XEiJ.EA_AR) {  //BSET.L Dq,Dr
  5728:         XEiJ.mpuCycleCount++;
  5729:         XEiJ.regRn[ea] = (x = XEiJ.regRn[ea]) | (y = 1 << y);  //intのシフトは5bitでマスクされるので1<<(y&0x1f)の&0x1fを省略
  5730:       } else {  //BSET.B Dq,<ea>
  5731:         XEiJ.mpuCycleCount++;
  5732:         int a = efaMltByte (ea);
  5733:         mmuWriteByteData (a, (x = mmuModifyByteSignData (a, XEiJ.regSRS)) | (y = 1 << (y & 7)), XEiJ.regSRS);
  5734:       }
  5735:       XEiJ.regCCR = XEiJ.regCCR & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_N | XEiJ.REG_CCR_V | XEiJ.REG_CCR_C) | (x & y) - 1 >>> 31 << 2;  //ccr_btst
  5736:     }
  5737:   }  //irpBsetReg
  5738: 
  5739:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  5740:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  5741:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  5742:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  5743:   //ANDI.B #<data>,<ea>                             |-|012346|-|-UUUU|-**00|D M+-WXZ  |0000_001_000_mmm_rrr-{data}
  5744:   //AND.B #<data>,<ea>                              |A|012346|-|-UUUU|-**00|  M+-WXZ  |0000_001_000_mmm_rrr-{data}  [ANDI.B #<data>,<ea>]
  5745:   //ANDI.B #<data>,CCR                              |-|012346|-|*****|*****|          |0000_001_000_111_100-{data}
  5746:   public static void irpAndiByte () throws M68kException {
  5747:     int ea = XEiJ.regOC & 63;
  5748:     int z = mmuReadByteSignExword ((XEiJ.regPC += 2) - 1, XEiJ.regSRS);  //pcbs
  5749:     if (ea < XEiJ.EA_AR) {  //ANDI.B #<data>,Dr
  5750:       XEiJ.mpuCycleCount++;
  5751:       z = XEiJ.regRn[ea] &= ~255 | z;  //1拡張してからAND
  5752:       XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & z];  //ccr_tst_byte
  5753:     } else if (ea == XEiJ.EA_IM) {  //ANDI.B #<data>,CCR
  5754:       XEiJ.mpuCycleCount++;
  5755:       XEiJ.regCCR &= z;
  5756:     } else {  //ANDI.B #<data>,<mem>
  5757:       XEiJ.mpuCycleCount++;
  5758:       int a = efaMltByte (ea);
  5759:       mmuWriteByteData (a, z &= mmuModifyByteSignData (a, XEiJ.regSRS), XEiJ.regSRS);
  5760:       XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & z];  //ccr_tst_byte
  5761:     }
  5762:   }  //irpAndiByte
  5763: 
  5764:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  5765:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  5766:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  5767:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  5768:   //ANDI.W #<data>,<ea>                             |-|012346|-|-UUUU|-**00|D M+-WXZ  |0000_001_001_mmm_rrr-{data}
  5769:   //AND.W #<data>,<ea>                              |A|012346|-|-UUUU|-**00|  M+-WXZ  |0000_001_001_mmm_rrr-{data}  [ANDI.W #<data>,<ea>]
  5770:   //ANDI.W #<data>,SR                               |-|012346|P|*****|*****|          |0000_001_001_111_100-{data}
  5771:   public static void irpAndiWord () throws M68kException {
  5772:     int ea = XEiJ.regOC & 63;
  5773:     if (ea < XEiJ.EA_AR) {  //ANDI.W #<data>,Dr
  5774:       int z = mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);  //pcws
  5775:       XEiJ.mpuCycleCount++;
  5776:       z = XEiJ.regRn[ea] &= ~65535 | z;  //1拡張してからAND
  5777:       XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (char) z - 1 >> 31 & XEiJ.REG_CCR_Z | ((short) z < 0 ? XEiJ.REG_CCR_N : 0);  //ccr_tst_word
  5778:     } else if (ea == XEiJ.EA_IM) {  //ANDI.W #<data>,SR
  5779:       if (XEiJ.regSRS == 0) {  //ユーザモードのとき
  5780:         M68kException.m6eNumber = M68kException.M6E_PRIVILEGE_VIOLATION;
  5781:         throw M68kException.m6eSignal;
  5782:       }
  5783:       //以下はスーパーバイザモード
  5784:       XEiJ.mpuCycleCount += 12;
  5785:       irpSetSR ((XEiJ.regSRT1 | XEiJ.regSRS | XEiJ.regSRM | XEiJ.regSRI | XEiJ.regCCR) & mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, 1));  //pcws。特権違反チェックが先
  5786:     } else {  //ANDI.W #<data>,<mem>
  5787:       int z = mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);  //pcws
  5788:       XEiJ.mpuCycleCount++;
  5789:       int a = efaMltWord (ea);
  5790:       mmuWriteWordData (a, z &= mmuModifyWordSignData (a, XEiJ.regSRS), XEiJ.regSRS);
  5791:       XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (char) z - 1 >> 31 & XEiJ.REG_CCR_Z | ((short) z < 0 ? XEiJ.REG_CCR_N : 0);  //ccr_tst_word
  5792:     }
  5793:   }  //irpAndiWord
  5794: 
  5795:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  5796:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  5797:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  5798:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  5799:   //ANDI.L #<data>,<ea>                             |-|012346|-|-UUUU|-**00|D M+-WXZ  |0000_001_010_mmm_rrr-{data}
  5800:   //AND.L #<data>,<ea>                              |A|012346|-|-UUUU|-**00|  M+-WXZ  |0000_001_010_mmm_rrr-{data}  [ANDI.L #<data>,<ea>]
  5801:   public static void irpAndiLong () throws M68kException {
  5802:     int ea = XEiJ.regOC & 63;
  5803:     int y = mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS);  //pcls
  5804:     int z;
  5805:     if (ea < XEiJ.EA_AR) {  //ANDI.L #<data>,Dr
  5806:       XEiJ.mpuCycleCount++;
  5807:       z = XEiJ.regRn[ea] &= y;
  5808:     } else {  //ANDI.L #<data>,<mem>
  5809:       XEiJ.mpuCycleCount++;
  5810:       int a = efaMltLong (ea);
  5811:       mmuWriteLongData (a, z = mmuModifyLongData (a, XEiJ.regSRS) & y, XEiJ.regSRS);
  5812:     }
  5813:     XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X);  //ccr_tst
  5814:   }  //irpAndiLong
  5815: 
  5816:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  5817:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  5818:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  5819:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  5820:   //BYTEREV.L Dr                                    |-|------|-|-----|-----|D         |0000_001_011_000_rrr (ISA_C)
  5821:   //CMP2.W <ea>,Rn                                  |-|--234S|-|-UUUU|-U*U*|  M  WXZP |0000_001_011_mmm_rrr-rnnn000000000000
  5822:   //CHK2.W <ea>,Rn                                  |-|--234S|-|-UUUU|-U*U*|  M  WXZP |0000_001_011_mmm_rrr-rnnn100000000000
  5823:   //
  5824:   //BYTEREV.L Dr
  5825:   //  Drのバイトの並びを逆順にする。CCRは変化しない
  5826:   //
  5827:   //CHK2.W <ea>,Rn
  5828:   //  <ea>から下限と上限をリードしてRnが範囲内か調べる
  5829:   //  CHK2.W <ea>,Anは下限と上限をそれぞれロングに符号拡張してロングで比較する
  5830:   //  Rnが下限または上限と等しいときZをセットする
  5831:   //  Rnが範囲外のときCをセットする。このときCHK instruction例外が発生する
  5832:   //  060ISPのソースは注釈に誤りが多いので注釈ではなくコードを参考にする
  5833:   //  CCR
  5834:   //    X  変化しない
  5835:   //    N  変化しない(M68000PRMでは未定義)
  5836:   //    Z  Rn-LB==0||Rn-LB==UB-LB
  5837:   //    V  変化しない(M68000PRMでは未定義)
  5838:   //    C  Rn-LB>UB-LB(符号なし比較)
  5839:   //
  5840:   //CMP2.W <ea>,Rn
  5841:   //  <ea>から下限と上限をリードしてRnが範囲内か調べる
  5842:   //  CMP2.W <ea>,Anは下限と上限をそれぞれロングに符号拡張してロングで比較する
  5843:   //  Rnが下限または上限と等しいときZをセットする
  5844:   //  Rnが範囲外のときCをセットする
  5845:   //  060ISPのソースは注釈に誤りが多いので注釈ではなくコードを参考にする
  5846:   //  CCR
  5847:   //    X  変化しない
  5848:   //    N  変化しない(M68000PRMでは未定義)
  5849:   //    Z  Rn-LB==0||Rn-LB==UB-LB
  5850:   //    V  変化しない(M68000PRMでは未定義)
  5851:   //    C  Rn-LB>UB-LB(符号なし比較)
  5852:   public static void irpCmp2Chk2Word () throws M68kException {
  5853:     int ea = XEiJ.regOC & 63;
  5854:     if (ea < XEiJ.EA_AR) {  //BYTEREV.L Dr
  5855:       XEiJ.mpuCycleCount++;
  5856:       XEiJ.regRn[ea] = Integer.reverseBytes (XEiJ.regRn[ea]);
  5857:     } else {  //CMP2/CHK2.W <ea>,Rn
  5858:       M68kException.m6eNumber = M68kException.M6E_UNIMPLEMENTED_INSTRUCTION;
  5859:       throw M68kException.m6eSignal;
  5860:     }
  5861:   }  //irpCmp2Chk2Word
  5862: 
  5863:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  5864:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  5865:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  5866:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  5867:   //SUBI.B #<data>,<ea>                             |-|012346|-|UUUUU|*****|D M+-WXZ  |0000_010_000_mmm_rrr-{data}
  5868:   //SUB.B #<data>,<ea>                              |A|012346|-|UUUUU|*****|  M+-WXZ  |0000_010_000_mmm_rrr-{data}  [SUBI.B #<data>,<ea>]
  5869:   public static void irpSubiByte () throws M68kException {
  5870:     int ea = XEiJ.regOC & 63;
  5871:     int x;
  5872:     int y = mmuReadByteSignExword ((XEiJ.regPC += 2) - 1, XEiJ.regSRS);  //pcbs
  5873:     int z;
  5874:     if (ea < XEiJ.EA_AR) {  //SUBI.B #<data>,Dr
  5875:       XEiJ.mpuCycleCount++;
  5876:       z = (byte) (XEiJ.regRn[ea] = ~0xff & (x = XEiJ.regRn[ea]) | 0xff & (x = (byte) x) - y);
  5877:     } else {  //SUBI.B #<data>,<mem>
  5878:       XEiJ.mpuCycleCount++;
  5879:       int a = efaMltByte (ea);
  5880:       mmuWriteByteData (a, z = (byte) ((x = mmuModifyByteSignData (a, XEiJ.regSRS)) - y), XEiJ.regSRS);
  5881:     }
  5882:     XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) |
  5883:            ((x ^ y) & (x ^ z)) >>> 31 << 1 |
  5884:            (x & (y ^ z) ^ (y | z)) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C));  //ccr_sub
  5885:   }  //irpSubiByte
  5886: 
  5887:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  5888:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  5889:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  5890:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  5891:   //SUBI.W #<data>,<ea>                             |-|012346|-|UUUUU|*****|D M+-WXZ  |0000_010_001_mmm_rrr-{data}
  5892:   //SUB.W #<data>,<ea>                              |A|012346|-|UUUUU|*****|  M+-WXZ  |0000_010_001_mmm_rrr-{data}  [SUBI.W #<data>,<ea>]
  5893:   public static void irpSubiWord () throws M68kException {
  5894:     int ea = XEiJ.regOC & 63;
  5895:     int x;
  5896:     int y = mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);  //pcws
  5897:     int z;
  5898:     if (ea < XEiJ.EA_AR) {  //SUBI.W #<data>,Dr
  5899:       XEiJ.mpuCycleCount++;
  5900:       z = (short) (XEiJ.regRn[ea] = ~0xffff & (x = XEiJ.regRn[ea]) | (char) ((x = (short) x) - y));
  5901:     } else {  //SUBI.W #<data>,<mem>
  5902:       XEiJ.mpuCycleCount++;
  5903:       int a = efaMltWord (ea);
  5904:       mmuWriteWordData (a, z = (short) ((x = mmuModifyWordSignData (a, XEiJ.regSRS)) - y), XEiJ.regSRS);
  5905:     }
  5906:     XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) |
  5907:            ((x ^ y) & (x ^ z)) >>> 31 << 1 |
  5908:            (x & (y ^ z) ^ (y | z)) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C));  //ccr_sub
  5909:   }  //irpSubiWord
  5910: 
  5911:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  5912:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  5913:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  5914:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  5915:   //SUBI.L #<data>,<ea>                             |-|012346|-|UUUUU|*****|D M+-WXZ  |0000_010_010_mmm_rrr-{data}
  5916:   //SUB.L #<data>,<ea>                              |A|012346|-|UUUUU|*****|  M+-WXZ  |0000_010_010_mmm_rrr-{data}  [SUBI.L #<data>,<ea>]
  5917:   public static void irpSubiLong () throws M68kException {
  5918:     int ea = XEiJ.regOC & 63;
  5919:     int x;
  5920:     int y = mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS);  //pcls
  5921:     int z;
  5922:     if (ea < XEiJ.EA_AR) {  //SUBI.L #<data>,Dr
  5923:       XEiJ.mpuCycleCount++;
  5924:       XEiJ.regRn[ea] = z = (x = XEiJ.regRn[ea]) - y;
  5925:     } else {  //SUBI.L #<data>,<mem>
  5926:       XEiJ.mpuCycleCount++;
  5927:       int a = efaMltLong (ea);
  5928:       mmuWriteLongData (a, z = (x = mmuModifyLongData (a, XEiJ.regSRS)) - y, XEiJ.regSRS);
  5929:     }
  5930:     XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) |
  5931:            ((x ^ y) & (x ^ z)) >>> 31 << 1 |
  5932:            (x & (y ^ z) ^ (y | z)) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C));  //ccr_sub
  5933:   }  //irpSubiLong
  5934: 
  5935:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  5936:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  5937:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  5938:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  5939:   //FF1.L Dr                                        |-|------|-|-UUUU|-**00|D         |0000_010_011_000_rrr (ISA_C)
  5940:   //CMP2.L <ea>,Rn                                  |-|--234S|-|-UUUU|-U*U*|  M  WXZP |0000_010_011_mmm_rrr-rnnn000000000000
  5941:   //CHK2.L <ea>,Rn                                  |-|--234S|-|-UUUU|-U*U*|  M  WXZP |0000_010_011_mmm_rrr-rnnn100000000000
  5942:   //
  5943:   //CHK2.L <ea>,Rn
  5944:   //  <ea>から下限と上限をリードしてRnが範囲内か調べる
  5945:   //  Rnが下限または上限と等しいときZをセットする
  5946:   //  Rnが範囲外のときCをセットする。このときCHK instruction例外が発生する
  5947:   //  060ISPのソースは注釈に誤りが多いので注釈ではなくコードを参考にする
  5948:   //  CCR
  5949:   //    X  変化しない
  5950:   //    N  変化しない(M68000PRMでは未定義)
  5951:   //    Z  Rn-LB==0||Rn-LB==UB-LB
  5952:   //    V  変化しない(M68000PRMでは未定義)
  5953:   //    C  Rn-LB>UB-LB(符号なし比較)
  5954:   //
  5955:   //CMP2.L <ea>,Rn
  5956:   //  <ea>から下限と上限をリードしてRnが範囲内か調べる
  5957:   //  Rnが下限または上限と等しいときZをセットする
  5958:   //  Rnが範囲外のときCをセットする
  5959:   //  060ISPのソースは注釈に誤りが多いので注釈ではなくコードを参考にする
  5960:   //  CCR
  5961:   //    X  変化しない
  5962:   //    N  変化しない(M68000PRMでは未定義)
  5963:   //    Z  Rn-LB==0||Rn-LB==UB-LB
  5964:   //    V  変化しない(M68000PRMでは未定義)
  5965:   //    C  Rn-LB>UB-LB(符号なし比較)
  5966:   //
  5967:   //FF1.L Dr
  5968:   //  Drの最上位の1のbit31からのオフセットをDrに格納する
  5969:   //  Drが0のときは32になる
  5970:   public static void irpCmp2Chk2Long () throws M68kException {
  5971:     int ea = XEiJ.regOC & 63;
  5972:     if (ea < XEiJ.EA_AR) {  //FF1.L Dr
  5973:       XEiJ.mpuCycleCount++;
  5974:       int z = XEiJ.regRn[ea];
  5975:       XEiJ.regRn[ea] = Integer.numberOfLeadingZeros (z);
  5976:       XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X);  //ccr_tst
  5977:     } else {  //CMP2/CHK2.L <ea>,Rn
  5978:       M68kException.m6eNumber = M68kException.M6E_UNIMPLEMENTED_INSTRUCTION;
  5979:       throw M68kException.m6eSignal;
  5980:     }
  5981:   }  //irpCmp2Chk2Long
  5982: 
  5983:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  5984:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  5985:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  5986:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  5987:   //ADDI.B #<data>,<ea>                             |-|012346|-|UUUUU|*****|D M+-WXZ  |0000_011_000_mmm_rrr-{data}
  5988:   public static void irpAddiByte () throws M68kException {
  5989:     int ea = XEiJ.regOC & 63;
  5990:     int x;
  5991:     int y = mmuReadByteSignExword ((XEiJ.regPC += 2) - 1, XEiJ.regSRS);  //pcbs
  5992:     int z;
  5993:     if (ea < XEiJ.EA_AR) {  //ADDI.B #<data>,Dr
  5994:       XEiJ.mpuCycleCount++;
  5995:       z = (byte) (XEiJ.regRn[ea] = ~0xff & (x = XEiJ.regRn[ea]) | 0xff & (x = (byte) x) + y);
  5996:     } else {  //ADDI.B #<data>,<mem>
  5997:       XEiJ.mpuCycleCount++;
  5998:       int a = efaMltByte (ea);
  5999:       mmuWriteByteData (a, z = (byte) ((x = mmuModifyByteSignData (a, XEiJ.regSRS)) + y), XEiJ.regSRS);
  6000:     }
  6001:     XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) |
  6002:            ((x ^ z) & (y ^ z)) >>> 31 << 1 |
  6003:            ((x | y) ^ (x ^ y) & z) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C));  //ccr_add
  6004:   }  //irpAddiByte
  6005: 
  6006:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  6007:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  6008:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  6009:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  6010:   //ADDI.W #<data>,<ea>                             |-|012346|-|UUUUU|*****|D M+-WXZ  |0000_011_001_mmm_rrr-{data}
  6011:   public static void irpAddiWord () throws M68kException {
  6012:     int ea = XEiJ.regOC & 63;
  6013:     int x;
  6014:     int y = mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);  //pcws
  6015:     int z;
  6016:     if (ea < XEiJ.EA_AR) {  //ADDI.W #<data>,Dr
  6017:       XEiJ.mpuCycleCount++;
  6018:       z = (short) (XEiJ.regRn[ea] = ~0xffff & (x = XEiJ.regRn[ea]) | (char) ((x = (short) x) + y));
  6019:     } else {  //ADDI.W #<data>,<mem>
  6020:       XEiJ.mpuCycleCount++;
  6021:       int a = efaMltWord (ea);
  6022:       mmuWriteWordData (a, z = (short) ((x = mmuModifyWordSignData (a, XEiJ.regSRS)) + y), XEiJ.regSRS);
  6023:     }
  6024:     XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) |
  6025:            ((x ^ z) & (y ^ z)) >>> 31 << 1 |
  6026:            ((x | y) ^ (x ^ y) & z) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C));  //ccr_add
  6027:   }  //irpAddiWord
  6028: 
  6029:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  6030:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  6031:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  6032:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  6033:   //ADDI.L #<data>,<ea>                             |-|012346|-|UUUUU|*****|D M+-WXZ  |0000_011_010_mmm_rrr-{data}
  6034:   public static void irpAddiLong () throws M68kException {
  6035:     int ea = XEiJ.regOC & 63;
  6036:     int x;
  6037:     int y = mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS);  //pcls
  6038:     int z;
  6039:     if (ea < XEiJ.EA_AR) {  //ADDI.L #<data>,Dr
  6040:       XEiJ.mpuCycleCount++;
  6041:       XEiJ.regRn[ea] = z = (x = XEiJ.regRn[ea]) + y;
  6042:     } else {  //ADDI.L #<data>,<mem>
  6043:       XEiJ.mpuCycleCount++;
  6044:       int a = efaMltLong (ea);
  6045:       mmuWriteLongData (a, z = (x = mmuModifyLongData (a, XEiJ.regSRS)) + y, XEiJ.regSRS);
  6046:     }
  6047:     XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) |
  6048:            ((x ^ z) & (y ^ z)) >>> 31 << 1 |
  6049:            ((x | y) ^ (x ^ y) & z) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C));  //ccr_add
  6050:   }  //irpAddiLong
  6051: 
  6052:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  6053:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  6054:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  6055:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  6056:   //BTST.L #<data>,Dr                               |-|012346|-|--U--|--*--|D         |0000_100_000_000_rrr-{data}
  6057:   //BTST.B #<data>,<ea>                             |-|012346|-|--U--|--*--|  M+-WXZP |0000_100_000_mmm_rrr-{data}
  6058:   public static void irpBtstImm () throws M68kException {
  6059:     int ea = XEiJ.regOC & 63;
  6060:     int y = mmuReadByteSignExword ((XEiJ.regPC += 2) - 1, XEiJ.regSRS);  //pcbs
  6061:     if (ea < XEiJ.EA_AR) {  //BTST.L #<data>,Dr
  6062:       XEiJ.mpuCycleCount++;
  6063:       XEiJ.regCCR = XEiJ.regCCR & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_N | XEiJ.REG_CCR_V | XEiJ.REG_CCR_C) | (~XEiJ.regRn[ea] >>> y & 1) << 2;  //ccr_btst。intのシフトは5bitでマスクされるので&31を省略
  6064:     } else {  //BTST.B #<data>,<ea>
  6065:       XEiJ.mpuCycleCount++;
  6066:       XEiJ.regCCR = XEiJ.regCCR & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_N | XEiJ.REG_CCR_V | XEiJ.REG_CCR_C) | (~mmuReadByteSignData (efaMemByte (ea), XEiJ.regSRS) >>> (y & 7) & 1) << 2;  //ccr_btst
  6067:     }
  6068:   }  //irpBtstImm
  6069: 
  6070:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  6071:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  6072:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  6073:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  6074:   //BCHG.L #<data>,Dr                               |-|012346|-|--U--|--*--|D         |0000_100_001_000_rrr-{data}
  6075:   //BCHG.B #<data>,<ea>                             |-|012346|-|--U--|--*--|  M+-WXZ  |0000_100_001_mmm_rrr-{data}
  6076:   public static void irpBchgImm () throws M68kException {
  6077:     int ea = XEiJ.regOC & 63;
  6078:     int x;
  6079:     int y = mmuReadByteSignExword ((XEiJ.regPC += 2) - 1, XEiJ.regSRS);  //pcbs
  6080:     if (ea < XEiJ.EA_AR) {  //BCHG.L #<data>,Dr
  6081:       XEiJ.mpuCycleCount++;
  6082:       XEiJ.regRn[ea] = (x = XEiJ.regRn[ea]) ^ (y = 1 << y);  //intのシフトは5bitでマスクされるので1<<(y&0x1f)の&0x1fを省略
  6083:     } else {  //BCHG.B #<data>,<ea>
  6084:       XEiJ.mpuCycleCount++;
  6085:       int a = efaMltByte (ea);
  6086:       mmuWriteByteData (a, (x = mmuModifyByteSignData (a, XEiJ.regSRS)) ^ (y = 1 << (y & 7)), XEiJ.regSRS);
  6087:     }
  6088:     XEiJ.regCCR = XEiJ.regCCR & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_N | XEiJ.REG_CCR_V | XEiJ.REG_CCR_C) | (x & y) - 1 >>> 31 << 2;  //ccr_btst
  6089:   }  //irpBchgImm
  6090: 
  6091:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  6092:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  6093:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  6094:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  6095:   //BCLR.L #<data>,Dr                               |-|012346|-|--U--|--*--|D         |0000_100_010_000_rrr-{data}
  6096:   //BCLR.B #<data>,<ea>                             |-|012346|-|--U--|--*--|  M+-WXZ  |0000_100_010_mmm_rrr-{data}
  6097:   public static void irpBclrImm () throws M68kException {
  6098:     int ea = XEiJ.regOC & 63;
  6099:     int x;
  6100:     int y = mmuReadByteSignExword ((XEiJ.regPC += 2) - 1, XEiJ.regSRS);  //pcbs
  6101:     if (ea < XEiJ.EA_AR) {  //BCLR.L #<data>,Dr
  6102:       XEiJ.mpuCycleCount++;
  6103:       XEiJ.regRn[ea] = (x = XEiJ.regRn[ea]) & ~(y = 1 << y);  //intのシフトは5bitでマスクされるので1<<(y&0x1f)の&0x1fを省略
  6104:     } else {  //BCLR.B #<data>,<ea>
  6105:       XEiJ.mpuCycleCount++;
  6106:       int a = efaMltByte (ea);
  6107:       mmuWriteByteData (a, (x = mmuModifyByteSignData (a, XEiJ.regSRS)) & ~(y = 1 << (y & 7)), XEiJ.regSRS);
  6108:     }
  6109:     XEiJ.regCCR = XEiJ.regCCR & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_N | XEiJ.REG_CCR_V | XEiJ.REG_CCR_C) | (x & y) - 1 >>> 31 << 2;  //ccr_btst
  6110:   }  //irpBclrImm
  6111: 
  6112:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  6113:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  6114:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  6115:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  6116:   //BSET.L #<data>,Dr                               |-|012346|-|--U--|--*--|D         |0000_100_011_000_rrr-{data}
  6117:   //BSET.B #<data>,<ea>                             |-|012346|-|--U--|--*--|  M+-WXZ  |0000_100_011_mmm_rrr-{data}
  6118:   public static void irpBsetImm () throws M68kException {
  6119:     int ea = XEiJ.regOC & 63;
  6120:     int x;
  6121:     int y = mmuReadByteSignExword ((XEiJ.regPC += 2) - 1, XEiJ.regSRS);  //pcbs
  6122:     if (ea < XEiJ.EA_AR) {  //BSET.L #<data>,Dr
  6123:       XEiJ.mpuCycleCount++;
  6124:       XEiJ.regRn[ea] = (x = XEiJ.regRn[ea]) | (y = 1 << y);  //intのシフトは5bitでマスクされるので1<<(y&0x1f)の&0x1fを省略
  6125:     } else {  //BSET.B #<data>,<ea>
  6126:       XEiJ.mpuCycleCount++;
  6127:       int a = efaMltByte (ea);
  6128:       mmuWriteByteData (a, (x = mmuModifyByteSignData (a, XEiJ.regSRS)) | (y = 1 << (y & 7)), XEiJ.regSRS);
  6129:     }
  6130:     XEiJ.regCCR = XEiJ.regCCR & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_N | XEiJ.REG_CCR_V | XEiJ.REG_CCR_C) | (x & y) - 1 >>> 31 << 2;  //ccr_btst
  6131:   }  //irpBsetImm
  6132: 
  6133:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  6134:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  6135:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  6136:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  6137:   //EORI.B #<data>,<ea>                             |-|012346|-|-UUUU|-**00|D M+-WXZ  |0000_101_000_mmm_rrr-{data}
  6138:   //EOR.B #<data>,<ea>                              |A|012346|-|-UUUU|-**00|D M+-WXZ  |0000_101_000_mmm_rrr-{data}  [EORI.B #<data>,<ea>]
  6139:   //EORI.B #<data>,CCR                              |-|012346|-|*****|*****|          |0000_101_000_111_100-{data}
  6140:   public static void irpEoriByte () throws M68kException {
  6141:     int ea = XEiJ.regOC & 63;
  6142:     int z = mmuReadByteSignExword ((XEiJ.regPC += 2) - 1, XEiJ.regSRS);  //pcbs
  6143:     if (ea < XEiJ.EA_AR) {  //EORI.B #<data>,Dr
  6144:       XEiJ.mpuCycleCount++;
  6145:       z = XEiJ.regRn[ea] ^= 255 & z;  //0拡張してからEOR
  6146:       XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & z];  //ccr_tst_byte
  6147:     } else if (ea == XEiJ.EA_IM) {  //EORI.B #<data>,CCR
  6148:       XEiJ.mpuCycleCount++;
  6149:       XEiJ.regCCR ^= XEiJ.REG_CCR_MASK & z;
  6150:     } else {  //EORI.B #<data>,<mem>
  6151:       XEiJ.mpuCycleCount++;
  6152:       int a = efaMltByte (ea);
  6153:       mmuWriteByteData (a, z ^= mmuModifyByteSignData (a, XEiJ.regSRS), XEiJ.regSRS);
  6154:       XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & z];  //ccr_tst_byte
  6155:     }
  6156:   }  //irpEoriByte
  6157: 
  6158:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  6159:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  6160:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  6161:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  6162:   //EORI.W #<data>,<ea>                             |-|012346|-|-UUUU|-**00|D M+-WXZ  |0000_101_001_mmm_rrr-{data}
  6163:   //EOR.W #<data>,<ea>                              |A|012346|-|-UUUU|-**00|D M+-WXZ  |0000_101_001_mmm_rrr-{data}  [EORI.W #<data>,<ea>]
  6164:   //EORI.W #<data>,SR                               |-|012346|P|*****|*****|          |0000_101_001_111_100-{data}
  6165:   public static void irpEoriWord () throws M68kException {
  6166:     int ea = XEiJ.regOC & 63;
  6167:     if (ea < XEiJ.EA_AR) {  //EORI.W #<data>,Dr
  6168:       int z = mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);  //pcws
  6169:       XEiJ.mpuCycleCount++;
  6170:       z = XEiJ.regRn[ea] ^= (char) z;  //0拡張してからEOR
  6171:       XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (char) z - 1 >> 31 & XEiJ.REG_CCR_Z | ((short) z < 0 ? XEiJ.REG_CCR_N : 0);  //ccr_tst_word
  6172:     } else if (ea == XEiJ.EA_IM) {  //EORI.W #<data>,SR
  6173:       if (XEiJ.regSRS == 0) {  //ユーザモードのとき
  6174:         M68kException.m6eNumber = M68kException.M6E_PRIVILEGE_VIOLATION;
  6175:         throw M68kException.m6eSignal;
  6176:       }
  6177:       //以下はスーパーバイザモード
  6178:       XEiJ.mpuCycleCount += 12;
  6179:       irpSetSR ((XEiJ.regSRT1 | XEiJ.regSRS | XEiJ.regSRM | XEiJ.regSRI | XEiJ.regCCR) ^ mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, 1));  //pcws。特権違反チェックが先
  6180:     } else {  //EORI.W #<data>,<mem>
  6181:       int z = mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);  //pcws
  6182:       XEiJ.mpuCycleCount++;
  6183:       int a = efaMltWord (ea);
  6184:       mmuWriteWordData (a, z ^= mmuModifyWordSignData (a, XEiJ.regSRS), XEiJ.regSRS);
  6185:       XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (char) z - 1 >> 31 & XEiJ.REG_CCR_Z | ((short) z < 0 ? XEiJ.REG_CCR_N : 0);  //ccr_tst_word
  6186:     }
  6187:   }  //irpEoriWord
  6188: 
  6189:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  6190:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  6191:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  6192:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  6193:   //EORI.L #<data>,<ea>                             |-|012346|-|-UUUU|-**00|D M+-WXZ  |0000_101_010_mmm_rrr-{data}
  6194:   //EOR.L #<data>,<ea>                              |A|012346|-|-UUUU|-**00|D M+-WXZ  |0000_101_010_mmm_rrr-{data}  [EORI.L #<data>,<ea>]
  6195:   public static void irpEoriLong () throws M68kException {
  6196:     int ea = XEiJ.regOC & 63;
  6197:     int y = mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS);  //pcls
  6198:     int z;
  6199:     if (ea < XEiJ.EA_AR) {  //EORI.L #<data>,Dr
  6200:       XEiJ.mpuCycleCount++;
  6201:       z = XEiJ.regRn[ea] ^= y;
  6202:     } else {  //EORI.L #<data>,<mem>
  6203:       XEiJ.mpuCycleCount++;
  6204:       int a = efaMltLong (ea);
  6205:       mmuWriteLongData (a, z = mmuModifyLongData (a, XEiJ.regSRS) ^ y, XEiJ.regSRS);
  6206:     }
  6207:     XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X);  //ccr_tst
  6208:   }  //irpEoriLong
  6209: 
  6210:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  6211:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  6212:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  6213:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  6214:   //CAS.B Dc,Du,<ea>                                |-|--2346|-|-UUUU|-****|  M+-WXZ  |0000_101_011_mmm_rrr-0000000uuu000ccc
  6215:   public static void irpCasByte () throws M68kException {
  6216:     int w = mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);  //pcwz。拡張ワード
  6217:     if ((w & ~0b0000_000_111_000_111) != 0) {
  6218:       M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION;
  6219:       throw M68kException.m6eSignal;
  6220:     }
  6221:     int c = w & 7;
  6222:     int y = (byte) XEiJ.regRn[c];  //y=Dc
  6223:     int a = efaMltByte (XEiJ.regOC & 63);
  6224:     int x = mmuReadByteSignData (a, XEiJ.regSRS);  //x=<ea>
  6225:     int z = (byte) (x - y);  //z=<ea>-Dc
  6226:     XEiJ.regCCR = (XEiJ.regCCR & XEiJ.REG_CCR_X |
  6227:                    (z < 0 ? XEiJ.REG_CCR_N : 0) |
  6228:                    (z == 0 ? XEiJ.REG_CCR_Z : 0) |
  6229:                    ((x ^ y) & (x ^ z)) >>> 31 << 1 |
  6230:                    (x & (y ^ z) ^ (y | z)) >>> 31);  //ccr_cmp
  6231:     if (z == 0) {  //<ea>==Dc
  6232:       XEiJ.mpuCycleCount += 19;
  6233:       mmuWriteByteData (a, XEiJ.regRn[w >> 6], XEiJ.regSRS);  //Du→<ea>
  6234:     } else {  //<ea>!=Dc
  6235:       XEiJ.mpuCycleCount += 19;
  6236:       XEiJ.regRn[c] = ~0xff & XEiJ.regRn[c] | 0xff & x;  //<ea>→Dc
  6237:     }
  6238:   }  //irpCasByte
  6239: 
  6240:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  6241:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  6242:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  6243:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  6244:   //CMPI.B #<data>,<ea>                             |-|--2346|-|-UUUU|-****|D M+-WXZP |0000_110_000_mmm_rrr-{data}
  6245:   //CMP.B #<data>,<ea>                              |A|--2346|-|-UUUU|-****|  M+-WXZP |0000_110_000_mmm_rrr-{data}  [CMPI.B #<data>,<ea>]
  6246:   public static void irpCmpiByte () throws M68kException {
  6247:     XEiJ.mpuCycleCount++;
  6248:     int ea = XEiJ.regOC & 63;
  6249:     int x;
  6250:     int y = mmuReadByteSignExword ((XEiJ.regPC += 2) - 1, XEiJ.regSRS);  //pcbs
  6251:     int z = (byte) ((x = ea < XEiJ.EA_AR ? (byte) XEiJ.regRn[ea] : mmuReadByteSignData (efaMemByte (ea), XEiJ.regSRS)) - y);  //アドレッシングモードに注意
  6252:     XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) |
  6253:            ((x ^ y) & (x ^ z)) >>> 31 << 1 |
  6254:            (x & (y ^ z) ^ (y | z)) >>> 31);  //ccr_cmp
  6255:   }  //irpCmpiByte
  6256: 
  6257:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  6258:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  6259:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  6260:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  6261:   //CMPI.W #<data>,<ea>                             |-|--2346|-|-UUUU|-****|D M+-WXZP |0000_110_001_mmm_rrr-{data}
  6262:   //CMP.W #<data>,<ea>                              |A|--2346|-|-UUUU|-****|  M+-WXZP |0000_110_001_mmm_rrr-{data}  [CMPI.W #<data>,<ea>]
  6263:   public static void irpCmpiWord () throws M68kException {
  6264:     XEiJ.mpuCycleCount++;
  6265:     int ea = XEiJ.regOC & 63;
  6266:     int x;
  6267:     int y = mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);  //pcws
  6268:     int z = (short) ((x = ea < XEiJ.EA_AR ? (short) XEiJ.regRn[ea] : mmuReadWordSignData (efaMemWord (ea), XEiJ.regSRS)) - y);  //アドレッシングモードに注意
  6269:     XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) |
  6270:            ((x ^ y) & (x ^ z)) >>> 31 << 1 |
  6271:            (x & (y ^ z) ^ (y | z)) >>> 31);  //ccr_cmp
  6272:   }  //irpCmpiWord
  6273: 
  6274:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  6275:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  6276:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  6277:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  6278:   //CMPI.L #<data>,<ea>                             |-|--2346|-|-UUUU|-****|D M+-WXZP |0000_110_010_mmm_rrr-{data}
  6279:   //CMP.L #<data>,<ea>                              |A|--2346|-|-UUUU|-****|  M+-WXZP |0000_110_010_mmm_rrr-{data}  [CMPI.L #<data>,<ea>]
  6280:   public static void irpCmpiLong () throws M68kException {
  6281:     int ea = XEiJ.regOC & 63;
  6282:     int x;
  6283:     int y = mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS);  //pcls
  6284:     int z;
  6285:     if (ea < XEiJ.EA_AR) {  //CMPI.L #<data>,Dr
  6286:       XEiJ.mpuCycleCount++;
  6287:       z = (x = XEiJ.regRn[ea]) - y;
  6288:     } else {  //CMPI.L #<data>,<mem>
  6289:       XEiJ.mpuCycleCount++;
  6290:       z = (x = mmuReadLongData (efaMemLong (ea), XEiJ.regSRS)) - y;  //アドレッシングモードに注意
  6291:     }
  6292:     XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) |
  6293:            ((x ^ y) & (x ^ z)) >>> 31 << 1 |
  6294:            (x & (y ^ z) ^ (y | z)) >>> 31);  //ccr_cmp
  6295:   }  //irpCmpiLong
  6296: 
  6297:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  6298:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  6299:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  6300:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  6301:   //CAS.W Dc,Du,<ea>                                |-|--2346|-|-UUUU|-****|  M+-WXZ  |0000_110_011_mmm_rrr-0000000uuu000ccc        (68060 software emulate misaligned <ea>)
  6302:   //CAS2.W Dc1:Dc2,Du1:Du2,(Rn1):(Rn2)              |-|--234S|-|-UUUU|-****|          |0000_110_011_111_100-rnnn000uuu000ccc(1)-rnnn_000_uuu_000_ccc(2)
  6303:   public static void irpCasWord () throws M68kException {
  6304:     int ea = XEiJ.regOC & 63;
  6305:     if (ea == XEiJ.EA_IM) {  //CAS2.W Dc1:Dc2,Du1:Du2,(Rn1):(Rn2)
  6306:       M68kException.m6eNumber = M68kException.M6E_UNIMPLEMENTED_INSTRUCTION;
  6307:       throw M68kException.m6eSignal;
  6308:     } else {  //CAS.W Dc,Du,<ea>
  6309:       int w = mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);  //pcwz
  6310:       if ((w & ~0b0000_000_111_000_111) != 0) {
  6311:         M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION;
  6312:         throw M68kException.m6eSignal;
  6313:       }
  6314:       int a = efaMltWord (ea);  //a=ea
  6315:       if ((a & 1) != 0) {  //misaligned <ea>
  6316:         M68kException.m6eNumber = M68kException.M6E_UNIMPLEMENTED_INSTRUCTION;
  6317:         throw M68kException.m6eSignal;
  6318:       }
  6319:       int c = w & 7;
  6320:       int y = (short) XEiJ.regRn[c];  //y=Dc
  6321:       int x = mmuReadWordSignData (a, XEiJ.regSRS);  //x=<ea>
  6322:       int z = (short) (x - y);  //z=<ea>-Dc
  6323:       XEiJ.regCCR = (XEiJ.regCCR & XEiJ.REG_CCR_X |
  6324:                      (z < 0 ? XEiJ.REG_CCR_N : 0) |
  6325:                      (z == 0 ? XEiJ.REG_CCR_Z : 0) |
  6326:                      ((x ^ y) & (x ^ z)) >>> 31 << 1 |
  6327:                      (x & (y ^ z) ^ (y | z)) >>> 31);  //ccr_cmp
  6328:       if (z == 0) {  //<ea>==Dc
  6329:         XEiJ.mpuCycleCount += 19;
  6330:         mmuWriteWordData (a, XEiJ.regRn[w >> 6], XEiJ.regSRS);  //Du→<ea>
  6331:       } else {  //<ea>!=Dc
  6332:         XEiJ.mpuCycleCount += 19;
  6333:         XEiJ.regRn[c] = ~0xffff & XEiJ.regRn[c] | (char) x;  //<ea>→Dc
  6334:       }
  6335:     }
  6336:   }  //irpCasWord
  6337: 
  6338:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  6339:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  6340:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  6341:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  6342:   //MOVES.B <ea>,Rn                                 |-|-12346|P|-----|-----|  M+-WXZ  |0000_111_000_mmm_rrr-rnnn000000000000
  6343:   //MOVES.B Rn,<ea>                                 |-|-12346|P|-----|-----|  M+-WXZ  |0000_111_000_mmm_rrr-rnnn100000000000
  6344:   //
  6345:   //MOVES.B <ea>,Rn
  6346:   //  MOVES.B <ea>,DnはDnの最下位バイトだけ更新する
  6347:   //  MOVES.B <ea>,Anはバイトデータをロングに符号拡張してAnの全体を更新する
  6348:   //  SFC=1,2,5,6はアドレス変換あり、SFC=0,3,4はアドレス変換なし、
  6349:   //  SFC=7はCPU空間なのでコプロセッサが割り当てられている領域以外はバスエラーになる
  6350:   //
  6351:   //MOVES.B Rn,<ea>
  6352:   //  DFC=1,2,5,6はアドレス変換あり、DFC=0,3,4はアドレス変換なし、
  6353:   //  DFC=7はCPU空間なのでコプロセッサが割り当てられている領域以外はバスエラーになる
  6354:   public static void irpMovesByte () throws M68kException {
  6355:     int w = mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);  //pcwz
  6356:     if (w << -11 != 0) {
  6357:       M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION;
  6358:       throw M68kException.m6eSignal;
  6359:     }
  6360:     if (XEiJ.regSRS == 0) {  //ユーザモードのとき
  6361:       M68kException.m6eNumber = M68kException.M6E_PRIVILEGE_VIOLATION;
  6362:       throw M68kException.m6eSignal;
  6363:     }
  6364:     //以下はスーパーバイザモード
  6365:     XEiJ.mpuCycleCount++;
  6366:     int a = efaMltByte (XEiJ.regOC & 63);
  6367:     int n = w >>> 12;  //n
  6368:     if (w << 31 - 11 >= 0) {  //MOVES.B <ea>,Rn。リード
  6369:       boolean supervisor = (0b10011111 << 24 << XEiJ.mpuSFC) < 0;
  6370:       boolean instruction = (0b00101010 << 24 << XEiJ.mpuSFC) < 0;
  6371:       MemoryMappedDevice[] mm = (DataBreakPoint.DBP_ON ?
  6372:                                  supervisor ? DataBreakPoint.dbpSuperMap : DataBreakPoint.dbpUserMap :
  6373:                                  supervisor ? XEiJ.busSuperMap : XEiJ.busUserMap);
  6374:       int z;
  6375:       //    01234567
  6376:       if (0b01100110 << 24 << XEiJ.mpuSFC < 0) {  //SFC=1,2,5,6。アドレス変換あり
  6377:         M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_READ | M68kException.M6E_FSLW_SIZE_BYTE | XEiJ.mpuSFC << 16;
  6378:         int pa = (supervisor ?
  6379:                   instruction ? mmuTranslateReadSuperCode (a) : mmuTranslateReadSuperData (a) :
  6380:                   instruction ? mmuTranslateReadUserCode (a) : mmuTranslateReadUserData (a));
  6381:         //z = XEiJ.busRbz (pa);
  6382:         z = mm[pa >>> XEiJ.BUS_PAGE_BITS].mmdRbz (pa);
  6383:       } else if (XEiJ.mpuSFC != 7) {  //SFC=0,3,4。アドレス変換なし
  6384:         M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_READ | M68kException.M6E_FSLW_SIZE_BYTE | XEiJ.mpuSFC << 16;
  6385:         //z = XEiJ.busRbz (a);
  6386:         z = mm[a >>> XEiJ.BUS_PAGE_BITS].mmdRbz (a);
  6387:       } else {  //SFC=7。CPU空間
  6388:         if (0x00022000 <= a && a <= 0x0002201f) {  //コプロセッサID=1
  6389:           z = XEiJ.fpuMotherboardCoprocessor.cirReadByteZero (a);
  6390:         } else {
  6391:           M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_READ | M68kException.M6E_FSLW_SIZE_BYTE | XEiJ.mpuSFC << 16 | M68kException.M6E_FSLW_BUS_ERROR_ON_READ;
  6392:           M68kException.m6eNumber = M68kException.M6E_ACCESS_FAULT;
  6393:           M68kException.m6eAddress = a;
  6394:           M68kException.m6eDirection = XEiJ.MPU_WR_READ;
  6395:           M68kException.m6eSize = XEiJ.MPU_SS_BYTE;
  6396:           throw M68kException.m6eSignal;
  6397:         }
  6398:       }
  6399:       if (n < 8) {  //MOVES.B <ea>,Dn
  6400:         XEiJ.regRn[n] = XEiJ.regRn[n] & ~255 | z;
  6401:       } else {  //MOVES.B <ea>,An
  6402:         XEiJ.regRn[n] = (byte) z;
  6403:       }
  6404:       if (MMU_DEBUG_COMMAND) {
  6405:         System.out.printf ("%08x movesReadByte(%d,0x%08x)=0x%02x\n", XEiJ.regPC0, XEiJ.mpuSFC, a, XEiJ.regRn[n] & 255);
  6406:       }
  6407:     } else {  //MOVES.B Rn,<ea>。ライト
  6408:       if (MMU_DEBUG_COMMAND) {
  6409:         System.out.printf ("%08x movesWriteByte(%d,0x%08x,0x%02x)\n", XEiJ.regPC0, XEiJ.mpuDFC, a, XEiJ.regRn[n] & 255);
  6410:       }
  6411:       boolean supervisor = (0b10011111 << 24 << XEiJ.mpuDFC) < 0;
  6412:       boolean instruction = (0b00101010 << 24 << XEiJ.mpuDFC) < 0;
  6413:       MemoryMappedDevice mm[] = (DataBreakPoint.DBP_ON ?
  6414:                                  supervisor ? DataBreakPoint.dbpSuperMap : DataBreakPoint.dbpUserMap :
  6415:                                  supervisor ? XEiJ.busSuperMap : XEiJ.busUserMap);
  6416:       int z = XEiJ.regRn[n];
  6417:       //    01234567
  6418:       if (0b01100110 << 24 << XEiJ.mpuDFC < 0) {  //DFC=1,2,5,6。アドレス変換あり
  6419:         M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_WRITE | M68kException.M6E_FSLW_SIZE_BYTE | XEiJ.mpuDFC << 16;
  6420:         int pa = (supervisor ?
  6421:                   instruction ? mmuTranslateWriteSuperCode (a) : mmuTranslateWriteSuperData (a) :
  6422:                   instruction ? mmuTranslateWriteUserCode (a) : mmuTranslateWriteUserData (a));
  6423:         //XEiJ.busWb (pa, z);
  6424:         mm[pa >>> XEiJ.BUS_PAGE_BITS].mmdWb (pa, z);
  6425:       } else if (XEiJ.mpuDFC != 7) {  //DFC=0,3,4。アドレス変換なし
  6426:         M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_WRITE | M68kException.M6E_FSLW_SIZE_BYTE | XEiJ.mpuDFC << 16;
  6427:         //XEiJ.busWb (a, z);
  6428:         mm[a >>> XEiJ.BUS_PAGE_BITS].mmdWb (a, z);
  6429:       } else {  //DFC=7。CPU空間
  6430:         if (0x00022000 <= a && a <= 0x0002201f) {  //コプロセッサID=1
  6431:           XEiJ.fpuMotherboardCoprocessor.cirWriteByte (a, z);
  6432:         } else {
  6433:           M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_WRITE | M68kException.M6E_FSLW_SIZE_BYTE | XEiJ.mpuDFC << 16 | M68kException.M6E_FSLW_BUS_ERROR_ON_WRITE;
  6434:           M68kException.m6eNumber = M68kException.M6E_ACCESS_FAULT;
  6435:           M68kException.m6eAddress = a;
  6436:           M68kException.m6eDirection = XEiJ.MPU_WR_WRITE;
  6437:           M68kException.m6eSize = XEiJ.MPU_SS_BYTE;
  6438:           throw M68kException.m6eSignal;
  6439:         }
  6440:       }
  6441:     }
  6442:   }  //irpMovesByte
  6443: 
  6444:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  6445:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  6446:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  6447:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  6448:   //MOVES.W <ea>,Rn                                 |-|-12346|P|-----|-----|  M+-WXZ  |0000_111_001_mmm_rrr-rnnn000000000000
  6449:   //MOVES.W Rn,<ea>                                 |-|-12346|P|-----|-----|  M+-WXZ  |0000_111_001_mmm_rrr-rnnn100000000000
  6450:   //
  6451:   //MOVES.W <ea>,Rn
  6452:   //  MOVES.W <ea>,DnはDnの下位ワードだけ更新する
  6453:   //  MOVES.W <ea>,Anはワードデータをロングに符号拡張してAnの全体を更新する
  6454:   //  SFC=1,2,5,6はアドレス変換あり、SFC=0,3,4はアドレス変換なし、
  6455:   //  SFC=7はCPU空間なのでコプロセッサが割り当てられている領域以外はバスエラーになる
  6456:   //
  6457:   //MOVES.W Rn,<ea>
  6458:   //  DFC=1,2,5,6はアドレス変換あり、DFC=0,3,4はアドレス変換なし、
  6459:   //  DFC=7はCPU空間なのでコプロセッサが割り当てられている領域以外はバスエラーになる
  6460:   public static void irpMovesWord () throws M68kException {
  6461:     int w = mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);  //pcwz
  6462:     if (w << -11 != 0) {
  6463:       M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION;
  6464:       throw M68kException.m6eSignal;
  6465:     }
  6466:     if (XEiJ.regSRS == 0) {  //ユーザモードのとき
  6467:       M68kException.m6eNumber = M68kException.M6E_PRIVILEGE_VIOLATION;
  6468:       throw M68kException.m6eSignal;
  6469:     }
  6470:     //以下はスーパーバイザモード
  6471:     XEiJ.mpuCycleCount++;
  6472:     int a = efaMltWord (XEiJ.regOC & 63);
  6473:     int n = w >>> 12;  //n
  6474:     if (w << 31 - 11 >= 0) {  //MOVES.W <ea>,Rn。リード
  6475:       boolean supervisor = (0b10011111 << 24 << XEiJ.mpuSFC) < 0;
  6476:       boolean instruction = (0b00101010 << 24 << XEiJ.mpuSFC) < 0;
  6477:       MemoryMappedDevice[] mm = (DataBreakPoint.DBP_ON ?
  6478:                                  supervisor ? DataBreakPoint.dbpSuperMap : DataBreakPoint.dbpUserMap :
  6479:                                  supervisor ? XEiJ.busSuperMap : XEiJ.busUserMap);
  6480:       int z;
  6481:       //    01234567
  6482:       if (0b01100110 << 24 << XEiJ.mpuSFC < 0) {  //SFC=1,2,5,6。アドレス変換あり
  6483:         if ((a & 1) == 0) {  //偶数
  6484:           M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_READ | M68kException.M6E_FSLW_SIZE_WORD | XEiJ.mpuSFC << 16;
  6485:           int pa = (supervisor ?
  6486:                     instruction ? mmuTranslateReadSuperCode (a) : mmuTranslateReadSuperData (a) :
  6487:                     instruction ? mmuTranslateReadUserCode (a) : mmuTranslateReadUserData (a));
  6488:           //z = XEiJ.busRwze (pa);
  6489:           z = mm[pa >>> XEiJ.BUS_PAGE_BITS].mmdRwz (pa);
  6490:         } else {  //奇数
  6491:           M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_READ | M68kException.M6E_FSLW_SIZE_WORD | XEiJ.mpuSFC << 16;
  6492:           int pa = (supervisor ?
  6493:                     instruction ? mmuTranslateReadSuperCode (a) : mmuTranslateReadSuperData (a) :
  6494:                     instruction ? mmuTranslateReadUserCode (a) : mmuTranslateReadUserData (a));
  6495:           //z = XEiJ.busRbz (pa) << 8;
  6496:           z = mm[pa >>> XEiJ.BUS_PAGE_BITS].mmdRbz (pa) << 8;
  6497:           M68kException.m6eFSLW ^= M68kException.M6E_FSLW_IOMA_FIRST ^ M68kException.M6E_FSLW_IOMA_SECOND;
  6498:           pa = (supervisor ?
  6499:                 instruction ? mmuTranslateReadSuperCode (a + 1) : mmuTranslateReadSuperData (a + 1) :
  6500:                 instruction ? mmuTranslateReadUserCode (a + 1) : mmuTranslateReadUserData (a + 1));
  6501:           //z |= XEiJ.busRbz (pa);
  6502:           z |= mm[pa >>> XEiJ.BUS_PAGE_BITS].mmdRbz (pa);
  6503:         }
  6504:       } else if (XEiJ.mpuSFC != 7) {  //SFC=0,3,4。アドレス変換なし
  6505:         if ((a & 1) == 0) {  //偶数
  6506:           M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_READ | M68kException.M6E_FSLW_SIZE_WORD | XEiJ.mpuSFC << 16;
  6507:           //z = XEiJ.busRwze (a);
  6508:           z = mm[a >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a);
  6509:         } else {  //奇数
  6510:           M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_READ | M68kException.M6E_FSLW_SIZE_WORD | XEiJ.mpuSFC << 16;
  6511:           //z = XEiJ.busRbz (a) << 8;
  6512:           z = mm[a >>> XEiJ.BUS_PAGE_BITS].mmdRbz (a) << 8;
  6513:           M68kException.m6eFSLW ^= M68kException.M6E_FSLW_IOMA_FIRST ^ M68kException.M6E_FSLW_IOMA_SECOND;
  6514:           a++;
  6515:           //z |= XEiJ.busRbz (a);
  6516:           z |= mm[a >>> XEiJ.BUS_PAGE_BITS].mmdRbz (a);
  6517:         }
  6518:       } else {  //SFC=7。CPU空間
  6519:         if (0x00022000 <= a && a <= 0x0002201f) {  //コプロセッサID=1
  6520:           z = XEiJ.fpuMotherboardCoprocessor.cirReadWordZero (a);
  6521:         } else {
  6522:           M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_READ | M68kException.M6E_FSLW_SIZE_WORD | XEiJ.mpuSFC << 16 | M68kException.M6E_FSLW_BUS_ERROR_ON_READ;
  6523:           M68kException.m6eNumber = M68kException.M6E_ACCESS_FAULT;
  6524:           M68kException.m6eAddress = a;
  6525:           M68kException.m6eDirection = XEiJ.MPU_WR_READ;
  6526:           M68kException.m6eSize = XEiJ.MPU_SS_WORD;
  6527:           throw M68kException.m6eSignal;
  6528:         }
  6529:       }
  6530:       if (n < 8) {  //MOVES.W <ea>,Dn
  6531:         XEiJ.regRn[n] = XEiJ.regRn[n] & ~65535 | z;
  6532:       } else {  //MOVES.W <ea>,An
  6533:         XEiJ.regRn[n] = (short) z;
  6534:       }
  6535:       if (MMU_DEBUG_COMMAND) {
  6536:         System.out.printf ("%08x movesReadWord(%d,0x%08x)=0x%04x\n", XEiJ.regPC0, XEiJ.mpuSFC, a, XEiJ.regRn[n] & 65535);
  6537:       }
  6538:     } else {  //MOVES.W Rn,<ea>。ライト
  6539:       if (MMU_DEBUG_COMMAND) {
  6540:         System.out.printf ("%08x movesWriteWord(%d,0x%08x,0x%04x)\n", XEiJ.regPC0, XEiJ.mpuDFC, a, XEiJ.regRn[n] & 65535);
  6541:       }
  6542:       boolean supervisor = (0b10011111 << 24 << XEiJ.mpuDFC) < 0;
  6543:       boolean instruction = (0b00101010 << 24 << XEiJ.mpuDFC) < 0;
  6544:       MemoryMappedDevice[] mm = (DataBreakPoint.DBP_ON ?
  6545:                                  supervisor ? DataBreakPoint.dbpSuperMap : DataBreakPoint.dbpUserMap :
  6546:                                  supervisor ? XEiJ.busSuperMap : XEiJ.busUserMap);
  6547:       int z = XEiJ.regRn[n];
  6548:       //    01234567
  6549:       if (0b01100110 << 24 << XEiJ.mpuDFC < 0) {  //DFC=1,2,5,6。アドレス変換あり
  6550:         if ((a & 1) == 0) {  //偶数
  6551:           M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_WRITE | M68kException.M6E_FSLW_SIZE_WORD | XEiJ.mpuDFC << 16;
  6552:           int pa = (supervisor ?
  6553:                     instruction ? mmuTranslateWriteSuperCode (a) : mmuTranslateWriteSuperData (a) :
  6554:                     instruction ? mmuTranslateWriteUserCode (a) : mmuTranslateWriteUserData (a));
  6555:           //XEiJ.busWwe (pa, z);
  6556:           mm[pa >>> XEiJ.BUS_PAGE_BITS].mmdWw (pa, z);
  6557:         } else {  //奇数
  6558:           M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_WRITE | M68kException.M6E_FSLW_SIZE_WORD | XEiJ.mpuDFC << 16;
  6559:           int pa = (supervisor ?
  6560:                     instruction ? mmuTranslateWriteSuperCode (a) : mmuTranslateWriteSuperData (a) :
  6561:                     instruction ? mmuTranslateWriteUserCode (a) : mmuTranslateWriteUserData (a));
  6562:           //XEiJ.busWb (pa, z >> 8);
  6563:           mm[pa >>> XEiJ.BUS_PAGE_BITS].mmdWb (pa, z >> 8);
  6564:           M68kException.m6eFSLW ^= M68kException.M6E_FSLW_IOMA_FIRST ^ M68kException.M6E_FSLW_IOMA_SECOND;
  6565:           pa = (supervisor ?
  6566:                 instruction ? mmuTranslateWriteSuperCode (a + 1) : mmuTranslateWriteSuperData (a + 1) :
  6567:                 instruction ? mmuTranslateWriteUserCode (a + 1) : mmuTranslateWriteUserData (a + 1));
  6568:           //XEiJ.busWb (pa, z);
  6569:           mm[pa >>> XEiJ.BUS_PAGE_BITS].mmdWb (pa, z);
  6570:         }
  6571:       } else if (XEiJ.mpuDFC != 7) {  //DFC=0,3,4。アドレス変換なし
  6572:         if ((a & 1) == 0) {  //偶数
  6573:           M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_WRITE | M68kException.M6E_FSLW_SIZE_WORD | XEiJ.mpuDFC << 16;
  6574:           //XEiJ.busWwe (a, z);
  6575:           mm[a >>> XEiJ.BUS_PAGE_BITS].mmdWw (a, z);
  6576:         } else {  //奇数
  6577:           M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_WRITE | M68kException.M6E_FSLW_SIZE_WORD | XEiJ.mpuDFC << 16;
  6578:           //XEiJ.busWb (a, z >> 8);
  6579:           mm[a >>> XEiJ.BUS_PAGE_BITS].mmdWb (a, z >> 8);
  6580:           M68kException.m6eFSLW ^= M68kException.M6E_FSLW_IOMA_FIRST ^ M68kException.M6E_FSLW_IOMA_SECOND;
  6581:           a++;
  6582:           //XEiJ.busWb (a, z);
  6583:           mm[a >>> XEiJ.BUS_PAGE_BITS].mmdWb (a, z);
  6584:         }
  6585:       } else {  //DFC=7。CPU空間
  6586:         if (0x00022000 <= a && a <= 0x0002201f) {  //コプロセッサID=1
  6587:           XEiJ.fpuMotherboardCoprocessor.cirWriteWord (a, z);
  6588:         } else {
  6589:           M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_WRITE | M68kException.M6E_FSLW_SIZE_WORD | XEiJ.mpuDFC << 16 | M68kException.M6E_FSLW_BUS_ERROR_ON_WRITE;
  6590:           M68kException.m6eNumber = M68kException.M6E_ACCESS_FAULT;
  6591:           M68kException.m6eAddress = a;
  6592:           M68kException.m6eDirection = XEiJ.MPU_WR_WRITE;
  6593:           M68kException.m6eSize = XEiJ.MPU_SS_WORD;
  6594:           throw M68kException.m6eSignal;
  6595:         }
  6596:       }
  6597:     }
  6598:   }  //irpMovesWord
  6599: 
  6600:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  6601:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  6602:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  6603:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  6604:   //MOVES.L <ea>,Rn                                 |-|-12346|P|-----|-----|  M+-WXZ  |0000_111_010_mmm_rrr-rnnn000000000000
  6605:   //MOVES.L Rn,<ea>                                 |-|-12346|P|-----|-----|  M+-WXZ  |0000_111_010_mmm_rrr-rnnn100000000000
  6606:   //
  6607:   //MOVES.L <ea>,Rn
  6608:   //  SFC=1,2,5,6はアドレス変換あり、SFC=0,3,4はアドレス変換なし、
  6609:   //  SFC=7はCPU空間なのでコプロセッサが割り当てられている領域以外はバスエラーになる
  6610:   //
  6611:   //MOVES.L Rn,<ea>
  6612:   //  DFC=1,2,5,6はアドレス変換あり、DFC=0,3,4はアドレス変換なし、
  6613:   //  DFC=7はCPU空間なのでコプロセッサが割り当てられている領域以外はバスエラーになる
  6614:   public static void irpMovesLong () throws M68kException {
  6615:     int w = mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);  //pcwz
  6616:     if (w << -11 != 0) {
  6617:       M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION;
  6618:       throw M68kException.m6eSignal;
  6619:     }
  6620:     if (XEiJ.regSRS == 0) {  //ユーザモードのとき
  6621:       M68kException.m6eNumber = M68kException.M6E_PRIVILEGE_VIOLATION;
  6622:       throw M68kException.m6eSignal;
  6623:     }
  6624:     //以下はスーパーバイザモード
  6625:     XEiJ.mpuCycleCount++;
  6626:     int a = efaMltLong (XEiJ.regOC & 63);
  6627:     int n = w >>> 12;  //n
  6628:     if (w << 31 - 11 >= 0) {  //MOVES.L <ea>,Rn。リード
  6629:       boolean supervisor = (0b10011111 << 24 << XEiJ.mpuSFC) < 0;
  6630:       boolean instruction = (0b00101010 << 24 << XEiJ.mpuSFC) < 0;
  6631:       MemoryMappedDevice[] mm = (DataBreakPoint.DBP_ON ?
  6632:                                  supervisor ? DataBreakPoint.dbpSuperMap : DataBreakPoint.dbpUserMap :
  6633:                                  supervisor ? XEiJ.busSuperMap : XEiJ.busUserMap);
  6634:       int z;
  6635:       //    01234567
  6636:       if (0b01100110 << 24 << XEiJ.mpuSFC < 0) {  //SFC=1,2,5,6。アドレス変換あり
  6637:         if ((a & 3) == 0) {  //4の倍数
  6638:           M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_READ | M68kException.M6E_FSLW_SIZE_LONG | XEiJ.mpuSFC << 16;
  6639:           int pa = (supervisor ?
  6640:                     instruction ? mmuTranslateReadSuperCode (a) : mmuTranslateReadSuperData (a) :
  6641:                     instruction ? mmuTranslateReadUserCode (a) : mmuTranslateReadUserData (a));
  6642:           //z = XEiJ.busRlsf (pa);
  6643:           z = mm[pa >>> XEiJ.BUS_PAGE_BITS].mmdRls (pa);
  6644:         } else if ((a & 1) == 0) {  //4の倍数+2
  6645:           M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_READ | M68kException.M6E_FSLW_SIZE_LONG | XEiJ.mpuSFC << 16;
  6646:           int pa = (supervisor ?
  6647:                     instruction ? mmuTranslateReadSuperCode (a) : mmuTranslateReadSuperData (a) :
  6648:                     instruction ? mmuTranslateReadUserCode (a) : mmuTranslateReadUserData (a));
  6649:           //z = XEiJ.busRwse (pa) << 16;
  6650:           z = mm[pa >>> XEiJ.BUS_PAGE_BITS].mmdRws (pa) << 16;
  6651:           M68kException.m6eFSLW ^= M68kException.M6E_FSLW_IOMA_FIRST ^ M68kException.M6E_FSLW_IOMA_SECOND;
  6652:           pa = (supervisor ?
  6653:                 instruction ? mmuTranslateReadSuperCode (a + 2) : mmuTranslateReadSuperData (a + 2) :
  6654:                 instruction ? mmuTranslateReadUserCode (a + 2) : mmuTranslateReadUserData (a + 2));
  6655:           //z |= XEiJ.busRwze (pa);
  6656:           z |= mm[pa >>> XEiJ.BUS_PAGE_BITS].mmdRwz (pa);
  6657:         } else {  //奇数
  6658:           M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_READ | M68kException.M6E_FSLW_SIZE_LONG | XEiJ.mpuSFC << 16;
  6659:           int pa = (supervisor ?
  6660:                     instruction ? mmuTranslateReadSuperCode (a) : mmuTranslateReadSuperData (a) :
  6661:                     instruction ? mmuTranslateReadUserCode (a) : mmuTranslateReadUserData (a));
  6662:           //z = XEiJ.busRbs (pa) << 24;
  6663:           z = mm[pa >>> XEiJ.BUS_PAGE_BITS].mmdRbs (pa) << 24;
  6664:           M68kException.m6eFSLW ^= M68kException.M6E_FSLW_IOMA_FIRST ^ M68kException.M6E_FSLW_IOMA_SECOND;
  6665:           pa = (supervisor ?
  6666:                 instruction ? mmuTranslateReadSuperCode (a + 1) : mmuTranslateReadSuperData (a + 1) :
  6667:                 instruction ? mmuTranslateReadUserCode (a + 1) : mmuTranslateReadUserData (a + 1));
  6668:           //z |= XEiJ.busRwze (pa) << 8;
  6669:           z |= mm[pa >>> XEiJ.BUS_PAGE_BITS].mmdRwz (pa) << 8;
  6670:           pa = (supervisor ?
  6671:                 instruction ? mmuTranslateReadSuperCode (a + 3) : mmuTranslateReadSuperData (a + 3) :
  6672:                 instruction ? mmuTranslateReadUserCode (a + 3) : mmuTranslateReadUserData (a + 3));
  6673:           //z |= XEiJ.busRbz (pa);
  6674:           z |= mm[pa >>> XEiJ.BUS_PAGE_BITS].mmdRbz (pa);
  6675:         }
  6676:       } else if (XEiJ.mpuSFC != 7) {  //SFC=0,3,4。アドレス変換なし
  6677:         if ((a & 3) == 0) {  //4の倍数
  6678:           M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_READ | M68kException.M6E_FSLW_SIZE_LONG | XEiJ.mpuSFC << 16;
  6679:           //z = XEiJ.busRlsf (a);
  6680:           z = mm[a >>> XEiJ.BUS_PAGE_BITS].mmdRls (a);
  6681:         } else if ((a & 1) == 0) {  //4の倍数+2
  6682:           M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_READ | M68kException.M6E_FSLW_SIZE_LONG | XEiJ.mpuSFC << 16;
  6683:           //z = XEiJ.busRwse (a) << 16;
  6684:           z = mm[a >>> XEiJ.BUS_PAGE_BITS].mmdRws (a) << 16;
  6685:           M68kException.m6eFSLW ^= M68kException.M6E_FSLW_IOMA_FIRST ^ M68kException.M6E_FSLW_IOMA_SECOND;
  6686:           a += 2;
  6687:           //z |= XEiJ.busRwze (a);
  6688:           z |= mm[a >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a);
  6689:         } else {  //奇数
  6690:           M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_READ | M68kException.M6E_FSLW_SIZE_LONG | XEiJ.mpuSFC << 16;
  6691:           //z = XEiJ.busRbs (a) << 24;
  6692:           z = mm[a >>> XEiJ.BUS_PAGE_BITS].mmdRbs (a) << 24;
  6693:           M68kException.m6eFSLW ^= M68kException.M6E_FSLW_IOMA_FIRST ^ M68kException.M6E_FSLW_IOMA_SECOND;
  6694:           a++;
  6695:           //z |= XEiJ.busRwze (a) << 8;
  6696:           z |= mm[a >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a) << 8;
  6697:           a += 2;
  6698:           //z |= XEiJ.busRbz (a);
  6699:           z |= mm[a >>> XEiJ.BUS_PAGE_BITS].mmdRbz (a);
  6700:         }
  6701:       } else {  //SFC=7。CPU空間
  6702:         if (0x00022000 <= a && a <= 0x0002201f) {  //コプロセッサID=1
  6703:           z = XEiJ.fpuMotherboardCoprocessor.cirReadLong (a);
  6704:         } else {
  6705:           M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_READ | M68kException.M6E_FSLW_SIZE_LONG | XEiJ.mpuSFC << 16 | M68kException.M6E_FSLW_BUS_ERROR_ON_READ;
  6706:           M68kException.m6eNumber = M68kException.M6E_ACCESS_FAULT;
  6707:           M68kException.m6eAddress = a;
  6708:           M68kException.m6eDirection = XEiJ.MPU_WR_READ;
  6709:           M68kException.m6eSize = XEiJ.MPU_SS_LONG;
  6710:           throw M68kException.m6eSignal;
  6711:         }
  6712:       }
  6713:       XEiJ.regRn[n] = z;
  6714:       if (MMU_DEBUG_COMMAND) {
  6715:         System.out.printf ("%08x movesReadLong(%d,0x%08x)=0x%08x\n", XEiJ.regPC0, XEiJ.mpuSFC, a, XEiJ.regRn[n]);
  6716:       }
  6717:     } else {  //MOVES.L Rn,<ea>。ライト
  6718:       if (MMU_DEBUG_COMMAND) {
  6719:         System.out.printf ("%08x movesWriteLong(%d,0x%08x,0x%08x)\n", XEiJ.regPC0, XEiJ.mpuDFC, a, XEiJ.regRn[n]);
  6720:       }
  6721:       boolean supervisor = (0b10011111 << 24 << XEiJ.mpuDFC) < 0;
  6722:       boolean instruction = (0b00101010 << 24 << XEiJ.mpuDFC) < 0;
  6723:       MemoryMappedDevice[] mm = (DataBreakPoint.DBP_ON ?
  6724:                                  supervisor ? DataBreakPoint.dbpSuperMap : DataBreakPoint.dbpUserMap :
  6725:                                  supervisor ? XEiJ.busSuperMap : XEiJ.busUserMap);
  6726:       int z = XEiJ.regRn[n];
  6727:       //    01234567
  6728:       if (0b01100110 << 24 << XEiJ.mpuDFC < 0) {  //DFC=1,2,5,6。アドレス変換あり
  6729:         if ((a & 3) == 0) {  //4の倍数
  6730:           M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_WRITE | M68kException.M6E_FSLW_SIZE_LONG | XEiJ.mpuDFC << 16;
  6731:           int pa = (supervisor ?
  6732:                     instruction ? mmuTranslateWriteSuperCode (a) : mmuTranslateWriteSuperData (a) :
  6733:                     instruction ? mmuTranslateWriteUserCode (a) : mmuTranslateWriteUserData (a));
  6734:           //XEiJ.busWlf (pa, z);
  6735:           mm[pa >>> XEiJ.BUS_PAGE_BITS].mmdWl (pa, z);
  6736:         } else if ((a & 1) == 0) {  //4の倍数+2
  6737:           M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_WRITE | M68kException.M6E_FSLW_SIZE_LONG | XEiJ.mpuDFC << 16;
  6738:           int pa = (supervisor ?
  6739:                     instruction ? mmuTranslateWriteSuperCode (a) : mmuTranslateWriteSuperData (a) :
  6740:                     instruction ? mmuTranslateWriteUserCode (a) : mmuTranslateWriteUserData (a));
  6741:           //XEiJ.busWwe (pa, z >> 16);
  6742:           mm[pa >>> XEiJ.BUS_PAGE_BITS].mmdWw (pa, z >> 16);
  6743:           M68kException.m6eFSLW ^= M68kException.M6E_FSLW_IOMA_FIRST ^ M68kException.M6E_FSLW_IOMA_SECOND;
  6744:           pa = (supervisor ?
  6745:                 instruction ? mmuTranslateWriteSuperCode (a + 2) : mmuTranslateWriteSuperData (a + 2) :
  6746:                 instruction ? mmuTranslateWriteUserCode (a + 2) : mmuTranslateWriteUserData (a + 2));
  6747:           //XEiJ.busWwe (pa, z);
  6748:           mm[pa >>> XEiJ.BUS_PAGE_BITS].mmdWw (pa, z);
  6749:         } else {  //奇数
  6750:           M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_WRITE | M68kException.M6E_FSLW_SIZE_LONG | XEiJ.mpuDFC << 16;
  6751:           int pa = (supervisor ?
  6752:                     instruction ? mmuTranslateWriteSuperCode (a) : mmuTranslateWriteSuperData (a) :
  6753:                     instruction ? mmuTranslateWriteUserCode (a) : mmuTranslateWriteUserData (a));
  6754:           //XEiJ.busWb (pa, z >> 24);
  6755:           mm[pa >>> XEiJ.BUS_PAGE_BITS].mmdWb (pa, z >> 24);
  6756:           M68kException.m6eFSLW ^= M68kException.M6E_FSLW_IOMA_FIRST ^ M68kException.M6E_FSLW_IOMA_SECOND;
  6757:           pa = (supervisor ?
  6758:                 instruction ? mmuTranslateWriteSuperCode (a + 1) : mmuTranslateWriteSuperData (a + 1) :
  6759:                 instruction ? mmuTranslateWriteUserCode (a + 1) : mmuTranslateWriteUserData (a + 1));
  6760:           //XEiJ.busWwe (pa, z >> 8);
  6761:           mm[pa >>> XEiJ.BUS_PAGE_BITS].mmdWw (pa, z >> 8);
  6762:           pa = (supervisor ?
  6763:                 instruction ? mmuTranslateWriteSuperCode (a + 3) : mmuTranslateWriteSuperData (a + 3) :
  6764:                 instruction ? mmuTranslateWriteUserCode (a + 3) : mmuTranslateWriteUserData (a + 3));
  6765:           //XEiJ.busWb (pa, z);
  6766:           mm[pa >>> XEiJ.BUS_PAGE_BITS].mmdWb (pa, z);
  6767:         }
  6768:       } else if (XEiJ.mpuDFC != 7) {  //DFC=0,3,4。アドレス変換なし
  6769:         if ((a & 3) == 0) {  //4の倍数
  6770:           M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_WRITE | M68kException.M6E_FSLW_SIZE_LONG | XEiJ.mpuDFC << 16;
  6771:           //XEiJ.busWlf (a, z);
  6772:           mm[a >>> XEiJ.BUS_PAGE_BITS].mmdWl (a, z);
  6773:         } else if ((a & 1) == 0) {  //4の倍数+2
  6774:           M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_WRITE | M68kException.M6E_FSLW_SIZE_LONG | XEiJ.mpuDFC << 16;
  6775:           //XEiJ.busWwe (a, z >> 16);
  6776:           mm[a >>> XEiJ.BUS_PAGE_BITS].mmdWw (a, z >> 16);
  6777:           M68kException.m6eFSLW ^= M68kException.M6E_FSLW_IOMA_FIRST ^ M68kException.M6E_FSLW_IOMA_SECOND;
  6778:           a += 2;
  6779:           //XEiJ.busWwe (a, z);
  6780:           mm[a >>> XEiJ.BUS_PAGE_BITS].mmdWw (a, z);
  6781:         } else {  //奇数
  6782:           M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_WRITE | M68kException.M6E_FSLW_SIZE_LONG | XEiJ.mpuDFC << 16;
  6783:           //XEiJ.busWb (a, z >> 24);
  6784:           mm[a >>> XEiJ.BUS_PAGE_BITS].mmdWb (a, z >> 24);
  6785:           M68kException.m6eFSLW ^= M68kException.M6E_FSLW_IOMA_FIRST ^ M68kException.M6E_FSLW_IOMA_SECOND;
  6786:           a++;
  6787:           //XEiJ.busWwe (a, z >> 8);
  6788:           mm[a >>> XEiJ.BUS_PAGE_BITS].mmdWw (a, z >> 8);
  6789:           a += 2;
  6790:           //XEiJ.busWb (a, z);
  6791:           mm[a >>> XEiJ.BUS_PAGE_BITS].mmdWb (a, z);
  6792:         }
  6793:       } else {  //DFC=7。CPU空間
  6794:         if (0x00022000 <= a && a <= 0x0002201f) {  //コプロセッサID=1
  6795:           XEiJ.fpuMotherboardCoprocessor.cirWriteLong (a, z);
  6796:         } else {
  6797:           M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_WRITE | M68kException.M6E_FSLW_SIZE_LONG | XEiJ.mpuDFC << 16 | M68kException.M6E_FSLW_BUS_ERROR_ON_WRITE;
  6798:           M68kException.m6eNumber = M68kException.M6E_ACCESS_FAULT;
  6799:           M68kException.m6eAddress = a;
  6800:           M68kException.m6eDirection = XEiJ.MPU_WR_WRITE;
  6801:           M68kException.m6eSize = XEiJ.MPU_SS_LONG;
  6802:           throw M68kException.m6eSignal;
  6803:         }
  6804:       }
  6805:     }
  6806:   }  //irpMovesLong
  6807: 
  6808:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  6809:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  6810:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  6811:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  6812:   //CAS.L Dc,Du,<ea>                                |-|--2346|-|-UUUU|-****|  M+-WXZ  |0000_111_011_mmm_rrr-0000000uuu000ccc        (68060 software emulate misaligned <ea>)
  6813:   //CAS2.L Dc1:Dc2,Du1:Du2,(Rn1):(Rn2)              |-|--234S|-|-UUUU|-****|          |0000_111_011_111_100-rnnn000uuu000ccc(1)-rnnn_000_uuu_000_ccc(2)
  6814:   public static void irpCasLong () throws M68kException {
  6815:     int ea = XEiJ.regOC & 63;
  6816:     if (ea == XEiJ.EA_IM) {  //CAS2.L Dc1:Dc2,Du1:Du2,(Rn1):(Rn2)
  6817:       M68kException.m6eNumber = M68kException.M6E_UNIMPLEMENTED_INSTRUCTION;
  6818:       throw M68kException.m6eSignal;
  6819:     } else {  //CAS.L Dc,Du,<ea>
  6820:       int w = mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);  //pcwz
  6821:       if ((w & ~0b0000_000_111_000_111) != 0) {
  6822:         M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION;
  6823:         throw M68kException.m6eSignal;
  6824:       }
  6825:       int a = efaMltLong (ea);  //a=ea
  6826:       if ((a & 1) != 0) {  //misaligned <ea>
  6827:         M68kException.m6eNumber = M68kException.M6E_UNIMPLEMENTED_INSTRUCTION;
  6828:         throw M68kException.m6eSignal;
  6829:       }
  6830:       int c = w & 7;
  6831:       int y = XEiJ.regRn[c];  //y=Dc
  6832:       int x = mmuReadLongData (a, XEiJ.regSRS);  //x=<ea>
  6833:       int z = x - y;  //z=<ea>-Dc
  6834:       XEiJ.regCCR = (XEiJ.regCCR & XEiJ.REG_CCR_X |
  6835:                      (z < 0 ? XEiJ.REG_CCR_N : 0) |
  6836:                      (z == 0 ? XEiJ.REG_CCR_Z : 0) |
  6837:                      ((x ^ y) & (x ^ z)) >>> 31 << 1 |
  6838:                      (x & (y ^ z) ^ (y | z)) >>> 31);  //ccr_cmp
  6839:       if (z == 0) {  //<ea>==Dc
  6840:         XEiJ.mpuCycleCount += 19;
  6841:         mmuWriteLongData (a, XEiJ.regRn[w >> 6], XEiJ.regSRS);  //Du→<ea>
  6842:       } else {  //<ea>!=Dc
  6843:         XEiJ.mpuCycleCount += 19;
  6844:         XEiJ.regRn[c] = x;  //<ea>→Dc
  6845:       }
  6846:     }
  6847:   }  //irpCasLong
  6848: 
  6849:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  6850:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  6851:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  6852:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  6853:   //MOVE.B <ea>,Dq                                  |-|012346|-|-UUUU|-**00|D M+-WXZPI|0001_qqq_000_mmm_rrr
  6854:   public static void irpMoveToDRByte () throws M68kException {
  6855:     XEiJ.mpuCycleCount++;
  6856:     int ea = XEiJ.regOC & 63;
  6857:     int qqq = XEiJ.regOC >> 9 & 7;
  6858:     int z = ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadByteSignExword ((XEiJ.regPC += 2) - 1, XEiJ.regSRS) : mmuReadByteSignData (efaAnyByte (ea), XEiJ.regSRS);  //pcbs。イミディエイトを分離
  6859:     XEiJ.regRn[qqq] = ~255 & XEiJ.regRn[qqq] | 255 & z;
  6860:     XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & z];  //ccr_tst_byte
  6861:   }  //irpMoveToDRByte
  6862: 
  6863:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  6864:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  6865:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  6866:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  6867:   //MOVE.B <ea>,(Aq)                                |-|012346|-|-UUUU|-**00|D M+-WXZPI|0001_qqq_010_mmm_rrr
  6868:   public static void irpMoveToMMByte () throws M68kException {
  6869:     XEiJ.mpuCycleCount++;
  6870:     int ea = XEiJ.regOC & 63;
  6871:     int z = ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadByteSignExword ((XEiJ.regPC += 2) - 1, XEiJ.regSRS) : mmuReadByteSignData (efaAnyByte (ea), XEiJ.regSRS);  //pcbs。イミディエイトを分離。ここでAqが変化する可能性があることに注意
  6872:     mmuWriteByteData (XEiJ.regRn[XEiJ.regOC >> 9], z, XEiJ.regSRS);  //1qqq=aqq
  6873:     XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & z];  //ccr_tst_byte
  6874:   }  //irpMoveToMMByte
  6875: 
  6876:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  6877:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  6878:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  6879:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  6880:   //MOVE.B <ea>,(Aq)+                               |-|012346|-|-UUUU|-**00|D M+-WXZPI|0001_qqq_011_mmm_rrr
  6881:   public static void irpMoveToMPByte () throws M68kException {
  6882:     XEiJ.mpuCycleCount++;
  6883:     int ea = XEiJ.regOC & 63;
  6884:     int aqq = XEiJ.regOC >> 9;  //1qqq=aqq
  6885:     int z = ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadByteSignExword ((XEiJ.regPC += 2) - 1, XEiJ.regSRS) : mmuReadByteSignData (efaAnyByte (ea), XEiJ.regSRS);  //pcbs。イミディエイトを分離。ここでAqが変化する可能性があることに注意
  6886:     int a = XEiJ.regRn[aqq];
  6887:     if (aqq < 15) {
  6888:       M68kException.m6eIncremented += 1L << (aqq << 3);  //longのシフトカウントは6bitでマスクされる
  6889:       XEiJ.regRn[aqq] = a + 1;
  6890:     } else {
  6891:       M68kException.m6eIncremented += 2L << (7 << 3);
  6892:       XEiJ.regRn[15] = a + 2;
  6893:     }
  6894:     mmuWriteByteData (a, z, XEiJ.regSRS);
  6895:     XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & z];  //ccr_tst_byte
  6896:   }  //irpMoveToMPByte
  6897: 
  6898:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  6899:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  6900:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  6901:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  6902:   //MOVE.B <ea>,-(Aq)                               |-|012346|-|-UUUU|-**00|D M+-WXZPI|0001_qqq_100_mmm_rrr
  6903:   public static void irpMoveToMNByte () throws M68kException {
  6904:     XEiJ.mpuCycleCount++;
  6905:     int ea = XEiJ.regOC & 63;
  6906:     int aqq = XEiJ.regOC >> 9;  //1qqq=aqq
  6907:     int z = ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadByteSignExword ((XEiJ.regPC += 2) - 1, XEiJ.regSRS) : mmuReadByteSignData (efaAnyByte (ea), XEiJ.regSRS);  //pcbs。イミディエイトを分離。ここでAqが変化する可能性があることに注意
  6908:     int a;
  6909:     if (aqq < 15) {
  6910:       M68kException.m6eIncremented -= 1L << (aqq << 3);  //longのシフトカウントは6bitでマスクされる
  6911:       a = --XEiJ.regRn[aqq];
  6912:     } else {
  6913:       M68kException.m6eIncremented -= 2L << (7 << 3);
  6914:       a = XEiJ.regRn[15] -= 2;
  6915:     }
  6916:     mmuWriteByteData (a, z, XEiJ.regSRS);
  6917:     XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & z];  //ccr_tst_byte
  6918:   }  //irpMoveToMNByte
  6919: 
  6920:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  6921:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  6922:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  6923:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  6924:   //MOVE.B <ea>,(d16,Aq)                            |-|012346|-|-UUUU|-**00|D M+-WXZPI|0001_qqq_101_mmm_rrr
  6925:   public static void irpMoveToMWByte () throws M68kException {
  6926:     XEiJ.mpuCycleCount++;
  6927:     int ea = XEiJ.regOC & 63;
  6928:     int aqq = XEiJ.regOC >> 9;  //1qqq=aqq
  6929:     int z = ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadByteSignExword ((XEiJ.regPC += 2) - 1, XEiJ.regSRS) : mmuReadByteSignData (efaAnyByte (ea), XEiJ.regSRS);  //pcbs。イミディエイトを分離。ここでAqが変化する可能性があることに注意
  6930:     mmuWriteByteData (XEiJ.regRn[aqq]  //ベースレジスタ
  6931:                       + mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS),  //pcws。ワードディスプレースメント
  6932:                       z, XEiJ.regSRS);
  6933:     XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & z];  //ccr_tst_byte
  6934:   }  //irpMoveToMWByte
  6935: 
  6936:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  6937:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  6938:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  6939:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  6940:   //MOVE.B <ea>,(d8,Aq,Rn.wl)                       |-|012346|-|-UUUU|-**00|D M+-WXZPI|0001_qqq_110_mmm_rrr
  6941:   public static void irpMoveToMXByte () throws M68kException {
  6942:     XEiJ.mpuCycleCount++;
  6943:     int ea = XEiJ.regOC & 63;
  6944:     int aqq = XEiJ.regOC >> 9;  //1qqq=aqq
  6945:     int z = ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadByteSignExword ((XEiJ.regPC += 2) - 1, XEiJ.regSRS) : mmuReadByteSignData (efaAnyByte (ea), XEiJ.regSRS);  //pcbs。イミディエイトを分離。ここでAqが変化する可能性があることに注意
  6946:     int w = mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);  //pcwz。拡張ワード
  6947:     int t = (((~w & 0x0180) == 0 ? 0 :  //ベースレジスタサプレス
  6948:               XEiJ.regRn[aqq])  //ベースレジスタ
  6949:              + (w << 31 - 8 >= 0 ? (byte) w :  //バイトディスプレースメント
  6950:                 w << 31 - 5 >= 0 ? 0 :  //ヌルベースディスプレースメント
  6951:                 w << 31 - 4 >= 0 ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) :  //pcws。ワードベースディスプレースメント
  6952:                 mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS)));  //pcls。ロングベースディスプレースメント
  6953:     int x = ((~w & 0x0140) == 0 ? 0 :  //インデックスサプレス
  6954:              (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] :  //ワードインデックス
  6955:               XEiJ.regRn[w >> 12])  //ロングインデックス
  6956:              << (w >> 9 & 3));  //スケールファクタ。ワードインデックスのときは符号拡張してから掛ける
  6957:     mmuWriteByteData ((w & 0x0103) <= 0x0100 ? t + x :  //メモリ間接なし
  6958:                       ((XEiJ.TEST_BIT_2_SHIFT ? w << 31 - 2 >= 0 : (w & 4) == 0) ? mmuReadLongData (t + x, XEiJ.regSRS) :  //プリインデックス
  6959:                        mmuReadLongData (t, XEiJ.regSRS) + x)  //ポストインデックス
  6960:                       + ((XEiJ.TEST_BIT_1_SHIFT ? w << 31 - 1 >= 0 : (w & 2) == 0) ? 0 :  //ヌルアウタディスプレースメント
  6961:                          (XEiJ.TEST_BIT_0_SHIFT ? w << 31 - 0 >= 0 : (w & 1) == 0) ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) :  //pcws。ワードアウタディスプレースメント
  6962:                          mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS)),  //pcls。ロングアウタディスプレースメント
  6963:                       z, XEiJ.regSRS);
  6964:     XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & z];  //ccr_tst_byte
  6965:   }  //irpMoveToMXByte
  6966: 
  6967:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  6968:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  6969:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  6970:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  6971:   //MOVE.B <ea>,(xxx).W                             |-|012346|-|-UUUU|-**00|D M+-WXZPI|0001_000_111_mmm_rrr
  6972:   public static void irpMoveToZWByte () throws M68kException {
  6973:     XEiJ.mpuCycleCount++;
  6974:     int ea = XEiJ.regOC & 63;
  6975:     int z = ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadByteSignExword ((XEiJ.regPC += 2) - 1, XEiJ.regSRS) : mmuReadByteSignData (efaAnyByte (ea), XEiJ.regSRS);  //pcbs。イミディエイトを分離
  6976:     mmuWriteByteData (mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS),  //pcws
  6977:                       z, XEiJ.regSRS);
  6978:     XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & z];  //ccr_tst_byte
  6979:   }  //irpMoveToZWByte
  6980: 
  6981:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  6982:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  6983:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  6984:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  6985:   //MOVE.B <ea>,(xxx).L                             |-|012346|-|-UUUU|-**00|D M+-WXZPI|0001_001_111_mmm_rrr
  6986:   public static void irpMoveToZLByte () throws M68kException {
  6987:     XEiJ.mpuCycleCount++;
  6988:     int ea = XEiJ.regOC & 63;
  6989:     int z = ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadByteSignExword ((XEiJ.regPC += 2) - 1, XEiJ.regSRS) : mmuReadByteSignData (efaAnyByte (ea), XEiJ.regSRS);  //pcbs。イミディエイトを分離
  6990:     mmuWriteByteData (mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS),  //pcls
  6991:                       z, XEiJ.regSRS);
  6992:     XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & z];  //ccr_tst_byte
  6993:   }  //irpMoveToZLByte
  6994: 
  6995:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  6996:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  6997:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  6998:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  6999:   //MOVE.L <ea>,Dq                                  |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0010_qqq_000_mmm_rrr
  7000:   public static void irpMoveToDRLong () throws M68kException {
  7001:     XEiJ.mpuCycleCount++;
  7002:     int ea = XEiJ.regOC & 63;
  7003:     int z;
  7004:     XEiJ.regRn[XEiJ.regOC >> 9 & 7] = z = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS) : mmuReadLongData (efaAnyLong (ea), XEiJ.regSRS);  //pcls。イミディエイトを分離。このr[ea]はデータレジスタまたはアドレスレジスタ
  7005:     XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X);  //ccr_tst
  7006:   }  //irpMoveToDRLong
  7007: 
  7008:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7009:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  7010:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  7011:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7012:   //MOVEA.L <ea>,Aq                                 |-|012346|-|-----|-----|DAM+-WXZPI|0010_qqq_001_mmm_rrr
  7013:   //MOVE.L <ea>,Aq                                  |A|012346|-|-----|-----|DAM+-WXZPI|0010_qqq_001_mmm_rrr [MOVEA.L <ea>,Aq]
  7014:   public static void irpMoveaLong () throws M68kException {
  7015:     XEiJ.mpuCycleCount++;
  7016:     int ea = XEiJ.regOC & 63;
  7017:     XEiJ.regRn[(XEiJ.regOC >> 9) - (16 - 8)] = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS) : mmuReadLongData (efaAnyLong (ea), XEiJ.regSRS);  //pcls。イミディエイトを分離。このr[ea]はデータレジスタまたはアドレスレジスタ。右辺でAqが変化する可能性があることに注意
  7018:   }  //irpMoveaLong
  7019: 
  7020:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7021:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  7022:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  7023:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7024:   //MOVE.L <ea>,(Aq)                                |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0010_qqq_010_mmm_rrr
  7025:   public static void irpMoveToMMLong () throws M68kException {
  7026:     XEiJ.mpuCycleCount++;
  7027:     int ea = XEiJ.regOC & 63;
  7028:     int z = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS) : mmuReadLongData (efaAnyLong (ea), XEiJ.regSRS);  //pcls。イミディエイトを分離。このr[ea]はデータレジスタまたはアドレスレジスタ。ここでAqが変化する可能性があることに注意
  7029:     mmuWriteLongData (XEiJ.regRn[(XEiJ.regOC >> 9) - (16 - 8)], z, XEiJ.regSRS);
  7030:     XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X);  //ccr_tst
  7031:   }  //irpMoveToMMLong
  7032: 
  7033:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7034:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  7035:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  7036:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7037:   //MOVE.L <ea>,(Aq)+                               |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0010_qqq_011_mmm_rrr
  7038:   public static void irpMoveToMPLong () throws M68kException {
  7039:     XEiJ.mpuCycleCount++;
  7040:     int ea = XEiJ.regOC & 63;
  7041:     int z = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS) : mmuReadLongData (efaAnyLong (ea), XEiJ.regSRS);  //pcls。イミディエイトを分離。このr[ea]はデータレジスタまたはアドレスレジスタ。ここでAqが変化する可能性があることに注意
  7042:     int aqq = (XEiJ.regOC >> 9) - (16 - 8);
  7043:     M68kException.m6eIncremented += 4L << (aqq << 3);  //longのシフトカウントは6bitでマスクされる
  7044:     mmuWriteLongData ((XEiJ.regRn[aqq] += 4) - 4, z, XEiJ.regSRS);
  7045:     XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X);  //ccr_tst
  7046:   }  //irpMoveToMPLong
  7047: 
  7048:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7049:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  7050:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  7051:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7052:   //MOVE.L <ea>,-(Aq)                               |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0010_qqq_100_mmm_rrr
  7053:   public static void irpMoveToMNLong () throws M68kException {
  7054:     XEiJ.mpuCycleCount++;
  7055:     int ea = XEiJ.regOC & 63;
  7056:     int z = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS) : mmuReadLongData (efaAnyLong (ea), XEiJ.regSRS);  //pcls。イミディエイトを分離。このr[ea]はデータレジスタまたはアドレスレジスタ。ここでAqが変化する可能性があることに注意
  7057:     int aqq = (XEiJ.regOC >> 9) - (16 - 8);
  7058:     M68kException.m6eIncremented -= 4L << (aqq << 3);  //longのシフトカウントは6bitでマスクされる
  7059:     mmuWriteLongData ((XEiJ.regRn[aqq] -= 4), z, XEiJ.regSRS);
  7060:     XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X);  //ccr_tst
  7061:   }  //irpMoveToMNLong
  7062: 
  7063:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7064:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  7065:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  7066:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7067:   //MOVE.L <ea>,(d16,Aq)                            |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0010_qqq_101_mmm_rrr
  7068:   public static void irpMoveToMWLong () throws M68kException {
  7069:     XEiJ.mpuCycleCount++;
  7070:     int ea = XEiJ.regOC & 63;
  7071:     int z = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS) : mmuReadLongData (efaAnyLong (ea), XEiJ.regSRS);  //pcls。イミディエイトを分離。このr[ea]はデータレジスタまたはアドレスレジスタ。ここでAqが変化する可能性があることに注意
  7072:     mmuWriteLongData (XEiJ.regRn[(XEiJ.regOC >> 9) - (16 - 8)]  //ベースレジスタ
  7073:            + mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS),  //pcws。ワードディスプレースメント
  7074:            z, XEiJ.regSRS);
  7075:     XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X);  //ccr_tst
  7076:   }  //irpMoveToMWLong
  7077: 
  7078:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7079:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  7080:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  7081:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7082:   //MOVE.L <ea>,(d8,Aq,Rn.wl)                       |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0010_qqq_110_mmm_rrr
  7083:   public static void irpMoveToMXLong () throws M68kException {
  7084:     XEiJ.mpuCycleCount++;
  7085:     int ea = XEiJ.regOC & 63;
  7086:     int aqq = (XEiJ.regOC >> 9) - (16 - 8);
  7087:     int z = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS) : mmuReadLongData (efaAnyLong (ea), XEiJ.regSRS);  //pcls。イミディエイトを分離。このr[ea]はデータレジスタまたはアドレスレジスタ。ここでAqが変化する可能性があることに注意
  7088:     int w = mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);  //pcwz。拡張ワード
  7089:     int t = (((~w & 0x0180) == 0 ? 0 :  //ベースレジスタサプレス
  7090:               XEiJ.regRn[aqq])  //ベースレジスタ
  7091:              + (w << 31 - 8 >= 0 ? (byte) w :  //バイトディスプレースメント
  7092:                 w << 31 - 5 >= 0 ? 0 :  //ヌルベースディスプレースメント
  7093:                 w << 31 - 4 >= 0 ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) :  //pcws。ワードベースディスプレースメント
  7094:                 mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS)));  //pcls。ロングベースディスプレースメント
  7095:     int x = ((~w & 0x0140) == 0 ? 0 :  //インデックスサプレス
  7096:              (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] :  //ワードインデックス
  7097:               XEiJ.regRn[w >> 12])  //ロングインデックス
  7098:              << (w >> 9 & 3));  //スケールファクタ。ワードインデックスのときは符号拡張してから掛ける
  7099:     mmuWriteLongData ((w & 0x0103) <= 0x0100 ? t + x :  //メモリ間接なし
  7100:            ((XEiJ.TEST_BIT_2_SHIFT ? w << 31 - 2 >= 0 : (w & 4) == 0) ? mmuReadLongData (t + x, XEiJ.regSRS) :  //プリインデックス
  7101:             mmuReadLongData (t, XEiJ.regSRS) + x)  //ポストインデックス
  7102:            + ((XEiJ.TEST_BIT_1_SHIFT ? w << 31 - 1 >= 0 : (w & 2) == 0) ? 0 :  //ヌルアウタディスプレースメント
  7103:               (XEiJ.TEST_BIT_0_SHIFT ? w << 31 - 0 >= 0 : (w & 1) == 0) ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) :  //pcws。ワードアウタディスプレースメント
  7104:               mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS)),  //pcls。ロングアウタディスプレースメント
  7105:            z, XEiJ.regSRS);
  7106:     XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X);  //ccr_tst
  7107:   }  //irpMoveToMXLong
  7108: 
  7109:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7110:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  7111:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  7112:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7113:   //MOVE.L <ea>,(xxx).W                             |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0010_000_111_mmm_rrr
  7114:   public static void irpMoveToZWLong () throws M68kException {
  7115:     XEiJ.mpuCycleCount++;
  7116:     int ea = XEiJ.regOC & 63;
  7117:     int z = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS) : mmuReadLongData (efaAnyLong (ea), XEiJ.regSRS);  //pcls。イミディエイトを分離。このr[ea]はデータレジスタまたはアドレスレジスタ
  7118:     mmuWriteLongData (mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS),  //pcws
  7119:            z, XEiJ.regSRS);
  7120:     XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X);  //ccr_tst
  7121:   }  //irpMoveToZWLong
  7122: 
  7123:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7124:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  7125:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  7126:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7127:   //MOVE.L <ea>,(xxx).L                             |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0010_001_111_mmm_rrr
  7128:   public static void irpMoveToZLLong () throws M68kException {
  7129:     XEiJ.mpuCycleCount++;
  7130:     int ea = XEiJ.regOC & 63;
  7131:     int z = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS) : mmuReadLongData (efaAnyLong (ea), XEiJ.regSRS);  //pcls。イミディエイトを分離。このr[ea]はデータレジスタまたはアドレスレジスタ
  7132:     mmuWriteLongData (mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS),  //pcls
  7133:            z, XEiJ.regSRS);
  7134:     XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X);  //ccr_tst
  7135:   }  //irpMoveToZLLong
  7136: 
  7137:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7138:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  7139:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  7140:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7141:   //MOVE.W <ea>,Dq                                  |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0011_qqq_000_mmm_rrr
  7142:   public static void irpMoveToDRWord () throws M68kException {
  7143:     XEiJ.mpuCycleCount++;
  7144:     int ea = XEiJ.regOC & 63;
  7145:     int qqq = XEiJ.regOC >> 9 & 7;
  7146:     int z = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) : mmuReadWordSignData (efaAnyWord (ea), XEiJ.regSRS);  //pcws。イミディエイトを分離。このr[ea]はデータレジスタまたはアドレスレジスタ
  7147:     XEiJ.regRn[qqq] = ~65535 & XEiJ.regRn[qqq] | (char) z;
  7148:     XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (char) z - 1 >> 31 & XEiJ.REG_CCR_Z | ((short) z < 0 ? XEiJ.REG_CCR_N : 0);  //ccr_tst_word
  7149:   }  //irpMoveToDRWord
  7150: 
  7151:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7152:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  7153:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  7154:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7155:   //MOVEA.W <ea>,Aq                                 |-|012346|-|-----|-----|DAM+-WXZPI|0011_qqq_001_mmm_rrr
  7156:   //MOVE.W <ea>,Aq                                  |A|012346|-|-----|-----|DAM+-WXZPI|0011_qqq_001_mmm_rrr [MOVEA.W <ea>,Aq]
  7157:   //
  7158:   //MOVEA.W <ea>,Aq
  7159:   //  ワードデータをロングに符号拡張してAqの全体を更新する
  7160:   public static void irpMoveaWord () throws M68kException {
  7161:     XEiJ.mpuCycleCount++;
  7162:     int ea = XEiJ.regOC & 63;
  7163:     XEiJ.regRn[XEiJ.regOC >> 9 & 15] = ea < XEiJ.EA_MM ? (short) XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) : mmuReadWordSignData (efaAnyWord (ea), XEiJ.regSRS);  //符号拡張して32bit全部書き換える。pcws。イミディエイトを分離。このr[ea]はデータレジスタまたはアドレスレジスタ。右辺でAqが変化する可能性があることに注意
  7164:   }  //irpMoveaWord
  7165: 
  7166:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7167:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  7168:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  7169:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7170:   //MOVE.W <ea>,(Aq)                                |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0011_qqq_010_mmm_rrr
  7171:   public static void irpMoveToMMWord () throws M68kException {
  7172:     XEiJ.mpuCycleCount++;
  7173:     int ea = XEiJ.regOC & 63;
  7174:     int z = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) : mmuReadWordSignData (efaAnyWord (ea), XEiJ.regSRS);  //pcws。イミディエイトを分離。このr[ea]はデータレジスタまたはアドレスレジスタ。ここでAqが変化する可能性があることに注意
  7175:     mmuWriteWordData (XEiJ.regRn[XEiJ.regOC >> 9 & 15], z, XEiJ.regSRS);
  7176:     XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (char) z - 1 >> 31 & XEiJ.REG_CCR_Z | ((short) z < 0 ? XEiJ.REG_CCR_N : 0);  //ccr_tst_word
  7177:   }  //irpMoveToMMWord
  7178: 
  7179:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7180:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  7181:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  7182:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7183:   //MOVE.W <ea>,(Aq)+                               |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0011_qqq_011_mmm_rrr
  7184:   public static void irpMoveToMPWord () throws M68kException {
  7185:     XEiJ.mpuCycleCount++;
  7186:     int ea = XEiJ.regOC & 63;
  7187:     int z = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) : mmuReadWordSignData (efaAnyWord (ea), XEiJ.regSRS);  //このr[ea]はデータレジスタまたはアドレスレジスタ。pcws。イミディエイトを分離。ここでAqが変化する可能性があることに注意
  7188:     int aqq = XEiJ.regOC >> 9 & 15;
  7189:     M68kException.m6eIncremented += 2L << (aqq << 3);  //longのシフトカウントは6bitでマスクされる
  7190:     mmuWriteWordData ((XEiJ.regRn[aqq] += 2) - 2, z, XEiJ.regSRS);
  7191:     XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (char) z - 1 >> 31 & XEiJ.REG_CCR_Z | ((short) z < 0 ? XEiJ.REG_CCR_N : 0);  //ccr_tst_word
  7192:   }  //irpMoveToMPWord
  7193: 
  7194:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7195:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  7196:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  7197:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7198:   //MOVE.W <ea>,-(Aq)                               |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0011_qqq_100_mmm_rrr
  7199:   public static void irpMoveToMNWord () throws M68kException {
  7200:     XEiJ.mpuCycleCount++;
  7201:     int ea = XEiJ.regOC & 63;
  7202:     int z = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) : mmuReadWordSignData (efaAnyWord (ea), XEiJ.regSRS);  //このr[ea]はデータレジスタまたはアドレスレジスタ。pcws。イミディエイトを分離。ここでAqが変化する可能性があることに注意
  7203:     int aqq = XEiJ.regOC >> 9 & 15;
  7204:     M68kException.m6eIncremented -= 2L << (aqq << 3);  //longのシフトカウントは6bitでマスクされる
  7205:     mmuWriteWordData ((XEiJ.regRn[aqq] -= 2), z, XEiJ.regSRS);
  7206:     XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (char) z - 1 >> 31 & XEiJ.REG_CCR_Z | ((short) z < 0 ? XEiJ.REG_CCR_N : 0);  //ccr_tst_word
  7207:   }  //irpMoveToMNWord
  7208: 
  7209:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7210:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  7211:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  7212:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7213:   //MOVE.W <ea>,(d16,Aq)                            |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0011_qqq_101_mmm_rrr
  7214:   public static void irpMoveToMWWord () throws M68kException {
  7215:     XEiJ.mpuCycleCount++;
  7216:     int ea = XEiJ.regOC & 63;
  7217:     int aqq = XEiJ.regOC >> 9 & 15;
  7218:     int z = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) : mmuReadWordSignData (efaAnyWord (ea), XEiJ.regSRS);  //このr[ea]はデータレジスタまたはアドレスレジスタ。pcws。イミディエイトを分離。ここでAqが変化する可能性があることに注意
  7219:     mmuWriteWordData (XEiJ.regRn[aqq]  //ベースレジスタ
  7220:            + mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS),  //pcws。ワードディスプレースメント
  7221:            z, XEiJ.regSRS);
  7222:     XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (char) z - 1 >> 31 & XEiJ.REG_CCR_Z | ((short) z < 0 ? XEiJ.REG_CCR_N : 0);  //ccr_tst_word
  7223:   }  //irpMoveToMWWord
  7224: 
  7225:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7226:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  7227:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  7228:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7229:   //MOVE.W <ea>,(d8,Aq,Rn.wl)                       |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0011_qqq_110_mmm_rrr
  7230:   public static void irpMoveToMXWord () throws M68kException {
  7231:     XEiJ.mpuCycleCount++;
  7232:     int ea = XEiJ.regOC & 63;
  7233:     int aqq = XEiJ.regOC >> 9 & 15;
  7234:     int z = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) : mmuReadWordSignData (efaAnyWord (ea), XEiJ.regSRS);  //このr[ea]はデータレジスタまたはアドレスレジスタ。pcws。イミディエイトを分離。ここでAqが変化する可能性があることに注意
  7235:     int w = mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);  //pcwz。拡張ワード
  7236:     int t = (((~w & 0x0180) == 0 ? 0 :  //ベースレジスタサプレス
  7237:               XEiJ.regRn[aqq])  //ベースレジスタ
  7238:              + (w << 31 - 8 >= 0 ? (byte) w :  //バイトディスプレースメント
  7239:                 w << 31 - 5 >= 0 ? 0 :  //ヌルベースディスプレースメント
  7240:                 w << 31 - 4 >= 0 ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) :  //pcws。ワードベースディスプレースメント
  7241:                 mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS)));  //pcls。ロングベースディスプレースメント
  7242:     int x = ((~w & 0x0140) == 0 ? 0 :  //インデックスサプレス
  7243:              (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] :  //ワードインデックス
  7244:               XEiJ.regRn[w >> 12])  //ロングインデックス
  7245:              << (w >> 9 & 3));  //スケールファクタ。ワードインデックスのときは符号拡張してから掛ける
  7246:     mmuWriteWordData ((w & 0x0103) <= 0x0100 ? t + x :  //メモリ間接なし
  7247:            ((XEiJ.TEST_BIT_2_SHIFT ? w << 31 - 2 >= 0 : (w & 4) == 0) ? mmuReadLongData (t + x, XEiJ.regSRS) :  //プリインデックス
  7248:             mmuReadLongData (t, XEiJ.regSRS) + x)  //ポストインデックス
  7249:            + ((XEiJ.TEST_BIT_1_SHIFT ? w << 31 - 1 >= 0 : (w & 2) == 0) ? 0 :  //ヌルアウタディスプレースメント
  7250:               (XEiJ.TEST_BIT_0_SHIFT ? w << 31 - 0 >= 0 : (w & 1) == 0) ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) :  //pcws。ワードアウタディスプレースメント
  7251:               mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS)),  //pcls。ロングアウタディスプレースメント
  7252:            z, XEiJ.regSRS);
  7253:     XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (char) z - 1 >> 31 & XEiJ.REG_CCR_Z | ((short) z < 0 ? XEiJ.REG_CCR_N : 0);  //ccr_tst_word
  7254:   }  //irpMoveToMXWord
  7255: 
  7256:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7257:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  7258:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  7259:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7260:   //MOVE.W <ea>,(xxx).W                             |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0011_000_111_mmm_rrr
  7261:   public static void irpMoveToZWWord () throws M68kException {
  7262:     XEiJ.mpuCycleCount++;
  7263:     int ea = XEiJ.regOC & 63;
  7264:     int z = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) : mmuReadWordSignData (efaAnyWord (ea), XEiJ.regSRS);  //このr[ea]はデータレジスタまたはアドレスレジスタ。pcws。イミディエイトを分離
  7265:     mmuWriteWordData (mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS),  //pcws
  7266:            z, XEiJ.regSRS);
  7267:     XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (char) z - 1 >> 31 & XEiJ.REG_CCR_Z | ((short) z < 0 ? XEiJ.REG_CCR_N : 0);  //ccr_tst_word
  7268:   }  //irpMoveToZWWord
  7269: 
  7270:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7271:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  7272:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  7273:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7274:   //MOVE.W <ea>,(xxx).L                             |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0011_001_111_mmm_rrr
  7275:   public static void irpMoveToZLWord () throws M68kException {
  7276:     XEiJ.mpuCycleCount++;
  7277:     int ea = XEiJ.regOC & 63;
  7278:     int z = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) : mmuReadWordSignData (efaAnyWord (ea), XEiJ.regSRS);  //このr[ea]はデータレジスタまたはアドレスレジスタ。pcws。イミディエイトを分離
  7279:     mmuWriteWordData (mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS),  //pcls
  7280:            z, XEiJ.regSRS);
  7281:     XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (char) z - 1 >> 31 & XEiJ.REG_CCR_Z | ((short) z < 0 ? XEiJ.REG_CCR_N : 0);  //ccr_tst_word
  7282:   }  //irpMoveToZLWord
  7283: 
  7284:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7285:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  7286:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  7287:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7288:   //NEGX.B <ea>                                     |-|012346|-|*UUUU|*****|D M+-WXZ  |0100_000_000_mmm_rrr
  7289:   public static void irpNegxByte () throws M68kException {
  7290:     int ea = XEiJ.regOC & 63;
  7291:     int y;
  7292:     int z;
  7293:     if (ea < XEiJ.EA_AR) {  //NEGX.B Dr
  7294:       XEiJ.mpuCycleCount++;
  7295:       z = (byte) (XEiJ.regRn[ea] = ~0xff & (y = XEiJ.regRn[ea]) | 0xff & -(y = (byte) y) - (XEiJ.regCCR >> 4));  //Xの左側はすべて0なのでCCR_X&を省略
  7296:     } else {  //NEGX.B <mem>
  7297:       XEiJ.mpuCycleCount++;
  7298:       int a = efaMltByte (ea);
  7299:       mmuWriteByteData (a, z = (byte) (-(y = mmuModifyByteSignData (a, XEiJ.regSRS)) - (XEiJ.regCCR >> 4)), XEiJ.regSRS);  //Xの左側はすべて0なのでCCR_X&を省略
  7300:     }
  7301:     XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_Z : 0) |
  7302:            (y & z) >>> 31 << 1 |
  7303:            (y | z) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C));  //ccr_negx
  7304:   }  //irpNegxByte
  7305: 
  7306:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7307:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  7308:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  7309:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7310:   //NEGX.W <ea>                                     |-|012346|-|*UUUU|*****|D M+-WXZ  |0100_000_001_mmm_rrr
  7311:   public static void irpNegxWord () throws M68kException {
  7312:     int ea = XEiJ.regOC & 63;
  7313:     int y;
  7314:     int z;
  7315:     if (ea < XEiJ.EA_AR) {  //NEGX.W Dr
  7316:       XEiJ.mpuCycleCount++;
  7317:       z = (short) (XEiJ.regRn[ea] = ~0xffff & (y = XEiJ.regRn[ea]) | (char) (-(y = (short) y) - (XEiJ.regCCR >> 4)));  //Xの左側はすべて0なのでCCR_X&を省略
  7318:     } else {  //NEGX.W <mem>
  7319:       XEiJ.mpuCycleCount++;
  7320:       int a = efaMltWord (ea);
  7321:       mmuWriteWordData (a, z = (short) (-(y = mmuModifyWordSignData (a, XEiJ.regSRS)) - (XEiJ.regCCR >> 4)), XEiJ.regSRS);  //Xの左側はすべて0なのでCCR_X&を省略
  7322:     }
  7323:     XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_Z : 0) |
  7324:            (y & z) >>> 31 << 1 |
  7325:            (y | z) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C));  //ccr_negx
  7326:   }  //irpNegxWord
  7327: 
  7328:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7329:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  7330:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  7331:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7332:   //NEGX.L <ea>                                     |-|012346|-|*UUUU|*****|D M+-WXZ  |0100_000_010_mmm_rrr
  7333:   public static void irpNegxLong () throws M68kException {
  7334:     int ea = XEiJ.regOC & 63;
  7335:     int y;
  7336:     int z;
  7337:     if (ea < XEiJ.EA_AR) {  //NEGX.L Dr
  7338:       XEiJ.mpuCycleCount++;
  7339:       XEiJ.regRn[ea] = z = -(y = XEiJ.regRn[ea]) - (XEiJ.regCCR >> 4);  //Xの左側はすべて0なのでCCR_X&を省略
  7340:     } else {  //NEGX.L <mem>
  7341:       XEiJ.mpuCycleCount++;
  7342:       int a = efaMltLong (ea);
  7343:       mmuWriteLongData (a, z = -(y = mmuModifyLongData (a, XEiJ.regSRS)) - (XEiJ.regCCR >> 4), XEiJ.regSRS);  //Xの左側はすべて0なのでCCR_X&を省略
  7344:     }
  7345:     XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_Z : 0) |
  7346:            (y & z) >>> 31 << 1 |
  7347:            (y | z) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C));  //ccr_negx
  7348:   }  //irpNegxLong
  7349: 
  7350:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7351:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  7352:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  7353:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7354:   //MOVE.W SR,<ea>                                  |-|-12346|P|*****|-----|D M+-WXZ  |0100_000_011_mmm_rrr
  7355:   public static void irpMoveFromSR () throws M68kException {
  7356:     //MC68010以上では特権命令
  7357:     if (XEiJ.regSRS == 0) {  //ユーザモードのとき
  7358:       M68kException.m6eNumber = M68kException.M6E_PRIVILEGE_VIOLATION;
  7359:       throw M68kException.m6eSignal;
  7360:     }
  7361:     //以下はスーパーバイザモード
  7362:     int ea = XEiJ.regOC & 63;
  7363:     if (ea < XEiJ.EA_AR) {  //MOVE.W SR,Dr
  7364:       XEiJ.mpuCycleCount++;
  7365:       XEiJ.regRn[ea] = ~0xffff & XEiJ.regRn[ea] | XEiJ.regSRT1 | XEiJ.regSRS | XEiJ.regSRM | XEiJ.regSRI | XEiJ.regCCR;
  7366:     } else {  //MOVE.W SR,<mem>
  7367:       XEiJ.mpuCycleCount++;
  7368:       mmuWriteWordData (efaMltWord (ea), XEiJ.regSRT1 | XEiJ.regSRS | XEiJ.regSRM | XEiJ.regSRI | XEiJ.regCCR, 1);
  7369:     }
  7370:   }  //irpMoveFromSR
  7371: 
  7372:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7373:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  7374:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  7375:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7376:   //CHK.L <ea>,Dq                                   |-|--2346|-|-UUUU|-*UUU|D M+-WXZPI|0100_qqq_100_mmm_rrr
  7377:   public static void irpChkLong () throws M68kException {
  7378:     XEiJ.mpuCycleCount += 2;
  7379:     int ea = XEiJ.regOC & 63;
  7380:     int x = ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS) : mmuReadLongData (efaAnyLong (ea), XEiJ.regSRS);  //pcls。イミディエイトを分離
  7381:     int y = XEiJ.regRn[XEiJ.regOC >> 9 & 7];
  7382:     int z = x - y;
  7383:     XEiJ.regCCR = (XEiJ.regCCR & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z | XEiJ.REG_CCR_V | XEiJ.REG_CCR_C) |
  7384:                    (y < 0 ? XEiJ.REG_CCR_N : 0));
  7385:     if (y < 0 || x < y) {
  7386:       XEiJ.mpuCycleCount += 20 - 19;
  7387:       M68kException.m6eAddress = XEiJ.regPC0;  //アドレスは命令の先頭
  7388:       M68kException.m6eNumber = M68kException.M6E_CHK_INSTRUCTION;
  7389:       throw M68kException.m6eSignal;
  7390:     }
  7391:   }  //irpChkLong
  7392: 
  7393:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7394:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  7395:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  7396:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7397:   //CHK.W <ea>,Dq                                   |-|012346|-|-UUUU|-*UUU|D M+-WXZPI|0100_qqq_110_mmm_rrr
  7398:   public static void irpChkWord () throws M68kException {
  7399:     XEiJ.mpuCycleCount += 2;
  7400:     int ea = XEiJ.regOC & 63;
  7401:     int x = ea < XEiJ.EA_AR ? (short) XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) : mmuReadWordSignData (efaAnyWord (ea), XEiJ.regSRS);  //pcws。イミディエイトを分離
  7402:     int y = (short) XEiJ.regRn[XEiJ.regOC >> 9 & 7];
  7403:     int z = (short) (x - y);
  7404:     XEiJ.regCCR = (XEiJ.regCCR & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z | XEiJ.REG_CCR_V | XEiJ.REG_CCR_C) |
  7405:                    (y < 0 ? XEiJ.REG_CCR_N : 0));
  7406:     if (y < 0 || x < y) {
  7407:       XEiJ.mpuCycleCount += 20 - 19;
  7408:       M68kException.m6eAddress = XEiJ.regPC0;  //アドレスは命令の先頭
  7409:       M68kException.m6eNumber = M68kException.M6E_CHK_INSTRUCTION;
  7410:       throw M68kException.m6eSignal;
  7411:     }
  7412:   }  //irpChkWord
  7413: 
  7414:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7415:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  7416:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  7417:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7418:   //LEA.L <ea>,Aq                                   |-|012346|-|-----|-----|  M  WXZP |0100_qqq_111_mmm_rrr
  7419:   //EXTB.L Dr                                       |-|--2346|-|-UUUU|-**00|D         |0100_100_111_000_rrr
  7420:   public static void irpLea () throws M68kException {
  7421:     int ea = XEiJ.regOC & 63;
  7422:     if (ea < XEiJ.EA_AR) {  //EXTB.L Dr
  7423:       XEiJ.mpuCycleCount++;
  7424:       int z;
  7425:       XEiJ.regRn[ea] = z = (byte) XEiJ.regRn[ea];
  7426:       XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X);  //ccr_tst
  7427:     } else {  //LEA.L <ea>,Aq
  7428:       XEiJ.mpuCycleCount++;
  7429:       XEiJ.regRn[(XEiJ.regOC >> 9) - (32 - 8)] = efaLeaPea (ea);
  7430:     }
  7431:   }  //irpLea
  7432: 
  7433:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7434:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  7435:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  7436:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7437:   //CLR.B <ea>                                      |-|012346|-|-UUUU|-0100|D M+-WXZ  |0100_001_000_mmm_rrr (68000 and 68008 read before clear)
  7438:   public static void irpClrByte () throws M68kException {
  7439:     int ea = XEiJ.regOC & 63;
  7440:     if (ea < XEiJ.EA_AR) {  //CLR.B Dr
  7441:       XEiJ.mpuCycleCount++;
  7442:       XEiJ.regRn[ea] &= ~0xff;
  7443:     } else {  //CLR.B <mem>
  7444:       XEiJ.mpuCycleCount++;
  7445:       mmuWriteByteData (efaMltByte (ea), 0, XEiJ.regSRS);
  7446:     }
  7447:     XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z;  //ccr_clr
  7448:   }  //irpClrByte
  7449: 
  7450:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7451:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  7452:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  7453:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7454:   //CLR.W <ea>                                      |-|012346|-|-UUUU|-0100|D M+-WXZ  |0100_001_001_mmm_rrr (68000 and 68008 read before clear)
  7455:   public static void irpClrWord () throws M68kException {
  7456:     int ea = XEiJ.regOC & 63;
  7457:     if (ea < XEiJ.EA_AR) {  //CLR.W Dr
  7458:       XEiJ.mpuCycleCount++;
  7459:       XEiJ.regRn[ea] &= ~0xffff;
  7460:     } else {  //CLR.W <mem>
  7461:       XEiJ.mpuCycleCount++;
  7462:       mmuWriteWordData (efaMltWord (ea), 0, XEiJ.regSRS);
  7463:     }
  7464:     XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z;  //ccr_clr
  7465:   }  //irpClrWord
  7466: 
  7467:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7468:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  7469:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  7470:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7471:   //CLR.L <ea>                                      |-|012346|-|-UUUU|-0100|D M+-WXZ  |0100_001_010_mmm_rrr (68000 and 68008 read before clear)
  7472:   public static void irpClrLong () throws M68kException {
  7473:     int ea = XEiJ.regOC & 63;
  7474:     if (ea < XEiJ.EA_AR) {  //CLR.L Dr
  7475:       XEiJ.mpuCycleCount++;
  7476:       XEiJ.regRn[ea] = 0;
  7477:     } else {  //CLR.L <mem>
  7478:       XEiJ.mpuCycleCount++;
  7479:       mmuWriteLongData (efaMltLong (ea), 0, XEiJ.regSRS);
  7480:     }
  7481:     XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z;  //ccr_clr
  7482:   }  //irpClrLong
  7483: 
  7484:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7485:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  7486:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  7487:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7488:   //MOVE.W CCR,<ea>                                 |-|-12346|-|*****|-----|D M+-WXZ  |0100_001_011_mmm_rrr
  7489:   public static void irpMoveFromCCR () throws M68kException {
  7490:     int ea = XEiJ.regOC & 63;
  7491:     if (ea < XEiJ.EA_AR) {  //MOVE.W CCR,Dr
  7492:       XEiJ.mpuCycleCount++;
  7493:       XEiJ.regRn[ea] = ~0xffff & XEiJ.regRn[ea] | XEiJ.regCCR;
  7494:     } else {  //MOVE.W CCR,<mem>
  7495:       XEiJ.mpuCycleCount++;
  7496:       mmuWriteWordData (efaMltWord (ea), XEiJ.regCCR, XEiJ.regSRS);
  7497:     }
  7498:   }  //irpMoveFromCCR
  7499: 
  7500:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7501:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  7502:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  7503:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7504:   //NEG.B <ea>                                      |-|012346|-|UUUUU|*****|D M+-WXZ  |0100_010_000_mmm_rrr
  7505:   public static void irpNegByte () throws M68kException {
  7506:     int ea = XEiJ.regOC & 63;
  7507:     int y;
  7508:     int z;
  7509:     if (ea < XEiJ.EA_AR) {  //NEG.B Dr
  7510:       XEiJ.mpuCycleCount++;
  7511:       z = (byte) (XEiJ.regRn[ea] = ~0xff & (y = XEiJ.regRn[ea]) | 0xff & -(y = (byte) y));
  7512:     } else {  //NEG.B <mem>
  7513:       XEiJ.mpuCycleCount++;
  7514:       int a = efaMltByte (ea);
  7515:       mmuWriteByteData (a, z = (byte) -(y = mmuModifyByteSignData (a, XEiJ.regSRS)), XEiJ.regSRS);
  7516:     }
  7517:     XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) |
  7518:            (y & z) >>> 31 << 1 |
  7519:            (y | z) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C));  //ccr_neg
  7520:   }  //irpNegByte
  7521: 
  7522:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7523:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  7524:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  7525:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7526:   //NEG.W <ea>                                      |-|012346|-|UUUUU|*****|D M+-WXZ  |0100_010_001_mmm_rrr
  7527:   public static void irpNegWord () throws M68kException {
  7528:     int ea = XEiJ.regOC & 63;
  7529:     int y;
  7530:     int z;
  7531:     if (ea < XEiJ.EA_AR) {  //NEG.W Dr
  7532:       XEiJ.mpuCycleCount++;
  7533:       z = (short) (XEiJ.regRn[ea] = ~0xffff & (y = XEiJ.regRn[ea]) | (char) -(y = (short) y));
  7534:     } else {  //NEG.W <mem>
  7535:       XEiJ.mpuCycleCount++;
  7536:       int a = efaMltWord (ea);
  7537:       mmuWriteWordData (a, z = (short) -(y = mmuModifyWordSignData (a, XEiJ.regSRS)), XEiJ.regSRS);
  7538:     }
  7539:     XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) |
  7540:            (y & z) >>> 31 << 1 |
  7541:            (y | z) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C));  //ccr_neg
  7542:   }  //irpNegWord
  7543: 
  7544:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7545:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  7546:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  7547:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7548:   //NEG.L <ea>                                      |-|012346|-|UUUUU|*****|D M+-WXZ  |0100_010_010_mmm_rrr
  7549:   public static void irpNegLong () throws M68kException {
  7550:     int ea = XEiJ.regOC & 63;
  7551:     int y;
  7552:     int z;
  7553:     if (ea < XEiJ.EA_AR) {  //NEG.L Dr
  7554:       XEiJ.mpuCycleCount++;
  7555:       XEiJ.regRn[ea] = z = -(y = XEiJ.regRn[ea]);
  7556:     } else {  //NEG.L <mem>
  7557:       XEiJ.mpuCycleCount++;
  7558:       int a = efaMltLong (ea);
  7559:       mmuWriteLongData (a, z = -(y = mmuModifyLongData (a, XEiJ.regSRS)), XEiJ.regSRS);
  7560:     }
  7561:     XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) |
  7562:            (y & z) >>> 31 << 1 |
  7563:            (y | z) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C));  //ccr_neg
  7564:   }  //irpNegLong
  7565: 
  7566:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7567:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  7568:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  7569:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7570:   //MOVE.W <ea>,CCR                                 |-|012346|-|UUUUU|*****|D M+-WXZPI|0100_010_011_mmm_rrr
  7571:   public static void irpMoveToCCR () throws M68kException {
  7572:     XEiJ.mpuCycleCount++;
  7573:     int ea = XEiJ.regOC & 63;
  7574:     XEiJ.regCCR = XEiJ.REG_CCR_MASK & (ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) : mmuReadWordSignData (efaAnyWord (ea), XEiJ.regSRS));  //pcws。イミディエイトを分離
  7575:   }  //irpMoveToCCR
  7576: 
  7577:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7578:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  7579:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  7580:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7581:   //NOT.B <ea>                                      |-|012346|-|-UUUU|-**00|D M+-WXZ  |0100_011_000_mmm_rrr
  7582:   public static void irpNotByte () throws M68kException {
  7583:     int ea = XEiJ.regOC & 63;
  7584:     int z;
  7585:     if (ea < XEiJ.EA_AR) {  //NOT.B Dr
  7586:       XEiJ.mpuCycleCount++;
  7587:       z = XEiJ.regRn[ea] ^= 255;  //0拡張してからEOR
  7588:     } else {  //NOT.B <mem>
  7589:       XEiJ.mpuCycleCount++;
  7590:       int a = efaMltByte (ea);
  7591:       mmuWriteByteData (a, z = ~mmuModifyByteSignData (a, XEiJ.regSRS), XEiJ.regSRS);
  7592:     }
  7593:     XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & z];  //ccr_tst_byte
  7594:   }  //irpNotByte
  7595: 
  7596:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7597:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  7598:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  7599:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7600:   //NOT.W <ea>                                      |-|012346|-|-UUUU|-**00|D M+-WXZ  |0100_011_001_mmm_rrr
  7601:   public static void irpNotWord () throws M68kException {
  7602:     int ea = XEiJ.regOC & 63;
  7603:     int z;
  7604:     if (ea < XEiJ.EA_AR) {  //NOT.W Dr
  7605:       XEiJ.mpuCycleCount++;
  7606:       z = XEiJ.regRn[ea] ^= 65535;  //0拡張してからEOR
  7607:     } else {  //NOT.W <mem>
  7608:       XEiJ.mpuCycleCount++;
  7609:       int a = efaMltWord (ea);
  7610:       mmuWriteWordData (a, z = ~mmuModifyWordSignData (a, XEiJ.regSRS), XEiJ.regSRS);
  7611:     }
  7612:     XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (char) z - 1 >> 31 & XEiJ.REG_CCR_Z | ((short) z < 0 ? XEiJ.REG_CCR_N : 0);  //ccr_tst_word
  7613:   }  //irpNotWord
  7614: 
  7615:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7616:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  7617:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  7618:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7619:   //NOT.L <ea>                                      |-|012346|-|-UUUU|-**00|D M+-WXZ  |0100_011_010_mmm_rrr
  7620:   public static void irpNotLong () throws M68kException {
  7621:     int ea = XEiJ.regOC & 63;
  7622:     int z;
  7623:     if (ea < XEiJ.EA_AR) {  //NOT.L Dr
  7624:       XEiJ.mpuCycleCount++;
  7625:       z = XEiJ.regRn[ea] ^= 0xffffffff;
  7626:     } else {  //NOT.L <mem>
  7627:       XEiJ.mpuCycleCount++;
  7628:       int a = efaMltLong (ea);
  7629:       mmuWriteLongData (a, z = ~mmuModifyLongData (a, XEiJ.regSRS), XEiJ.regSRS);
  7630:     }
  7631:     XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X);  //ccr_tst
  7632:   }  //irpNotLong
  7633: 
  7634:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7635:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  7636:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  7637:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7638:   //MOVE.W <ea>,SR                                  |-|012346|P|UUUUU|*****|D M+-WXZPI|0100_011_011_mmm_rrr
  7639:   public static void irpMoveToSR () throws M68kException {
  7640:     if (XEiJ.regSRS == 0) {  //ユーザモードのとき
  7641:       M68kException.m6eNumber = M68kException.M6E_PRIVILEGE_VIOLATION;
  7642:       throw M68kException.m6eSignal;
  7643:     }
  7644:     //以下はスーパーバイザモード
  7645:     XEiJ.mpuCycleCount += 12;
  7646:     int ea = XEiJ.regOC & 63;
  7647:     irpSetSR (ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, 1) : mmuReadWordZeroData (efaAnyWord (ea), 1));  //特権違反チェックが先。pcwz。イミディエイトを分離
  7648:   }  //irpMoveToSR
  7649: 
  7650:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7651:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  7652:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  7653:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7654:   //NBCD.B <ea>                                     |-|012346|-|UUUUU|*U*U*|D M+-WXZ  |0100_100_000_mmm_rrr
  7655:   //LINK.L Ar,#<data>                               |-|--2346|-|-----|-----|          |0100_100_000_001_rrr-{data}
  7656:   //
  7657:   //LINK.L Ar,#<data>
  7658:   //  PEA.L (Ar);MOVEA.L A7,Ar;ADDA.L #<data>,A7と同じ
  7659:   //  LINK.L A7,#<data>はA7をデクリメントする前の値がプッシュされ、A7に#<data>が加算される
  7660:   public static void irpNbcd () throws M68kException {
  7661:     int ea = XEiJ.regOC & 63;
  7662:     if (ea < XEiJ.EA_AR) {  //NBCD.B Dr
  7663:       XEiJ.mpuCycleCount++;
  7664:       XEiJ.regRn[ea] = ~0xff & XEiJ.regRn[ea] | irpSbcd (0, XEiJ.regRn[ea]);
  7665:     } else if (ea < XEiJ.EA_MM) {  //LINK.L Ar,#<data>
  7666:       XEiJ.mpuCycleCount += 2;
  7667:       int o = mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS);  //pcls
  7668:       int arr = XEiJ.regOC - (0b0100_100_000_001_000 - 8);
  7669:       //評価順序に注意。LINK.L A7,#<data>のときプッシュするのはA7をデクリメントする前の値。wl(r[15]-=4,r[8+rrr])は不可
  7670:       int a = XEiJ.regRn[arr];
  7671:       M68kException.m6eIncremented -= 4L << (7 << 3);
  7672:       int sp = XEiJ.regRn[15] -= 4;
  7673:       mmuWriteLongData (sp, a, XEiJ.regSRS);  //pushl
  7674:       XEiJ.regRn[arr] = sp;
  7675:       XEiJ.regRn[15] = sp + o;
  7676:     } else {  //NBCD.B <mem>
  7677:       XEiJ.mpuCycleCount++;
  7678:       int a = efaMltByte (ea);
  7679:       mmuWriteByteData (a, irpSbcd (0, mmuModifyByteSignData (a, XEiJ.regSRS)), XEiJ.regSRS);
  7680:     }
  7681:   }  //irpNbcd
  7682: 
  7683:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7684:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  7685:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  7686:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7687:   //SWAP.W Dr                                       |-|012346|-|-UUUU|-**00|D         |0100_100_001_000_rrr
  7688:   //BKPT #<data>                                    |-|-12346|-|-----|-----|          |0100_100_001_001_ddd
  7689:   //PEA.L <ea>                                      |-|012346|-|-----|-----|  M  WXZP |0100_100_001_mmm_rrr
  7690:   public static void irpPea () throws M68kException {
  7691:     int ea = XEiJ.regOC & 63;
  7692:     if (ea < XEiJ.EA_AR) {  //SWAP.W Dr
  7693:       XEiJ.mpuCycleCount++;
  7694:       int x;
  7695:       int z;
  7696:       XEiJ.regRn[ea] = z = (x = XEiJ.regRn[ea]) << 16 | x >>> 16;
  7697:       //上位ワードと下位ワードを入れ替えた後のDrをロングでテストする
  7698:       XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X);  //ccr_tst
  7699:     } else {  //PEA.L <ea>
  7700:       XEiJ.mpuCycleCount++;
  7701:       //評価順序に注意。実効アドレスを求めてからspをデクリメントすること
  7702:       int a = efaLeaPea (ea);  //BKPT #<data>はここでillegal instructionになる
  7703:       M68kException.m6eIncremented -= 4L << (7 << 3);
  7704:       mmuWriteLongData (XEiJ.regRn[15] -= 4, a, XEiJ.regSRS);
  7705:     }
  7706:   }  //irpPea
  7707: 
  7708:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7709:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  7710:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  7711:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7712:   //EXT.W Dr                                        |-|012346|-|-UUUU|-**00|D         |0100_100_010_000_rrr
  7713:   //MOVEM.W <list>,<ea>                             |-|012346|-|-----|-----|  M -WXZ  |0100_100_010_mmm_rrr-llllllllllllllll
  7714:   public static void irpMovemToMemWord () throws M68kException {
  7715:     int ea = XEiJ.regOC & 63;
  7716:     if (ea < XEiJ.EA_AR) {  //EXT.W Dr
  7717:       XEiJ.mpuCycleCount++;
  7718:       int z;
  7719:       XEiJ.regRn[ea] = ~0xffff & (z = XEiJ.regRn[ea]) | (char) (z = (byte) z);
  7720:       XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X);  //ccr_tst
  7721:     } else {  //MOVEM.W <list>,<ea>
  7722:       int l = mmuReadWordZeroExword (XEiJ.regPC, XEiJ.regSRS);  //pcwze。レジスタリスト。ゼロ拡張
  7723:       XEiJ.regPC += 2;
  7724:       if (ea >> 3 == XEiJ.MMM_MN) {  //-(Ar)
  7725:         //MOVEM.wl <list>,-(Ar)で<list>にArが含まれているとき、000/010は命令開始時のArを、020/030/040/060は命令開始時のAr-オペレーションサイズをメモリに書き込む
  7726:         //転送するレジスタが0個のときArは変化しない
  7727:         int arr = ea - (XEiJ.EA_MN - 8);
  7728:         M68kException.m6eIncremented -= 2L << (arr << 3);  //longのシフトカウントは6bitでマスクされる
  7729:         int a = XEiJ.regRn[arr];
  7730:         XEiJ.regRn[arr] = a - 2;
  7731:         int t = a;
  7732:         if (XEiJ.IRP_MOVEM_EXPAND) {  //16回展開する
  7733:           if ((l & 0x0001) != 0) {
  7734:             mmuWriteWordData (a -= 2, XEiJ.regRn[15], XEiJ.regSRS);
  7735:           }
  7736:           if ((l & 0x0002) != 0) {
  7737:             mmuWriteWordData (a -= 2, XEiJ.regRn[14], XEiJ.regSRS);
  7738:           }
  7739:           if ((l & 0x0004) != 0) {
  7740:             mmuWriteWordData (a -= 2, XEiJ.regRn[13], XEiJ.regSRS);
  7741:           }
  7742:           if ((l & 0x0008) != 0) {
  7743:             mmuWriteWordData (a -= 2, XEiJ.regRn[12], XEiJ.regSRS);
  7744:           }
  7745:           if ((l & 0x0010) != 0) {
  7746:             mmuWriteWordData (a -= 2, XEiJ.regRn[11], XEiJ.regSRS);
  7747:           }
  7748:           if ((l & 0x0020) != 0) {
  7749:             mmuWriteWordData (a -= 2, XEiJ.regRn[10], XEiJ.regSRS);
  7750:           }
  7751:           if ((l & 0x0040) != 0) {
  7752:             mmuWriteWordData (a -= 2, XEiJ.regRn[ 9], XEiJ.regSRS);
  7753:           }
  7754:           if ((byte) l < 0) {  //(l & 0x0080) != 0
  7755:             mmuWriteWordData (a -= 2, XEiJ.regRn[ 8], XEiJ.regSRS);
  7756:           }
  7757:           if ((l & 0x0100) != 0) {
  7758:             mmuWriteWordData (a -= 2, XEiJ.regRn[ 7], XEiJ.regSRS);
  7759:           }
  7760:           if ((l & 0x0200) != 0) {
  7761:             mmuWriteWordData (a -= 2, XEiJ.regRn[ 6], XEiJ.regSRS);
  7762:           }
  7763:           if ((l & 0x0400) != 0) {
  7764:             mmuWriteWordData (a -= 2, XEiJ.regRn[ 5], XEiJ.regSRS);
  7765:           }
  7766:           if ((l & 0x0800) != 0) {
  7767:             mmuWriteWordData (a -= 2, XEiJ.regRn[ 4], XEiJ.regSRS);
  7768:           }
  7769:           if ((l & 0x1000) != 0) {
  7770:             mmuWriteWordData (a -= 2, XEiJ.regRn[ 3], XEiJ.regSRS);
  7771:           }
  7772:           if ((l & 0x2000) != 0) {
  7773:             mmuWriteWordData (a -= 2, XEiJ.regRn[ 2], XEiJ.regSRS);
  7774:           }
  7775:           if ((l & 0x4000) != 0) {
  7776:             mmuWriteWordData (a -= 2, XEiJ.regRn[ 1], XEiJ.regSRS);
  7777:           }
  7778:           if ((short) l < 0) {  //(l & 0x8000) != 0
  7779:             mmuWriteWordData (a -= 2, XEiJ.regRn[ 0], XEiJ.regSRS);
  7780:           }
  7781:         } else if (XEiJ.IRP_MOVEM_LOOP) {  //16回ループする。コンパイラが展開する
  7782:           for (int i = 15; i >= 0; i--) {
  7783:             if ((l & 0x8000 >>> i) != 0) {
  7784:               mmuWriteWordData (a -= 2, XEiJ.regRn[i], XEiJ.regSRS);
  7785:             }
  7786:           }
  7787:         } else if (XEiJ.IRP_MOVEM_SHIFT_LEFT) {  //0になるまで左にシフトする
  7788:           l = XEiJ.MPU_BITREV_TABLE_0[l & 2047] | XEiJ.MPU_BITREV_TABLE_1[l << 10 >>> 21];  //Integer.reverse(l)
  7789:           for (int i = 15; l != 0; i--, l <<= 1) {
  7790:             if (l < 0) {
  7791:               mmuWriteWordData (a -= 2, XEiJ.regRn[i], XEiJ.regSRS);
  7792:             }
  7793:           }
  7794:         } else if (XEiJ.IRP_MOVEM_SHIFT_RIGHT) {  //0になるまで右にシフトする
  7795:           for (int i = 15; l != 0; i--, l >>>= 1) {
  7796:             if ((l & 1) != 0) {
  7797:               mmuWriteWordData (a -= 2, XEiJ.regRn[i], XEiJ.regSRS);
  7798:             }
  7799:           }
  7800:         } else if (XEiJ.IRP_MOVEM_ZEROS) {  //Integer.numberOfTrailingZerosを使う
  7801:           for (int i = 15; l != 0; ) {
  7802:             int k = Integer.numberOfTrailingZeros (l);
  7803:             mmuWriteWordData (a -= 2, XEiJ.regRn[i -= k], XEiJ.regSRS);
  7804:             l = l >>> k & ~1;
  7805:           }
  7806:         }
  7807:         M68kException.m6eIncremented += 2L << (arr << 3);  //元に戻しておく。longのシフトカウントは6bitでマスクされる
  7808:         XEiJ.regRn[arr] = a;
  7809:         XEiJ.mpuCycleCount += t - a >> 1;  //2バイト/個→1サイクル/個
  7810:       } else {  //-(Ar)以外
  7811:         int a = efaCltWord (ea);
  7812:         int t = a;
  7813:         if (XEiJ.IRP_MOVEM_EXPAND) {  //16回展開する
  7814:           if ((l & 0x0001) != 0) {
  7815:             mmuWriteWordData (a, XEiJ.regRn[ 0], XEiJ.regSRS);
  7816:             a += 2;
  7817:           }
  7818:           if ((l & 0x0002) != 0) {
  7819:             mmuWriteWordData (a, XEiJ.regRn[ 1], XEiJ.regSRS);
  7820:             a += 2;
  7821:           }
  7822:           if ((l & 0x0004) != 0) {
  7823:             mmuWriteWordData (a, XEiJ.regRn[ 2], XEiJ.regSRS);
  7824:             a += 2;
  7825:           }
  7826:           if ((l & 0x0008) != 0) {
  7827:             mmuWriteWordData (a, XEiJ.regRn[ 3], XEiJ.regSRS);
  7828:             a += 2;
  7829:           }
  7830:           if ((l & 0x0010) != 0) {
  7831:             mmuWriteWordData (a, XEiJ.regRn[ 4], XEiJ.regSRS);
  7832:             a += 2;
  7833:           }
  7834:           if ((l & 0x0020) != 0) {
  7835:             mmuWriteWordData (a, XEiJ.regRn[ 5], XEiJ.regSRS);
  7836:             a += 2;
  7837:           }
  7838:           if ((l & 0x0040) != 0) {
  7839:             mmuWriteWordData (a, XEiJ.regRn[ 6], XEiJ.regSRS);
  7840:             a += 2;
  7841:           }
  7842:           if ((byte) l < 0) {  //(l & 0x0080) != 0
  7843:             mmuWriteWordData (a, XEiJ.regRn[ 7], XEiJ.regSRS);
  7844:             a += 2;
  7845:           }
  7846:           if ((l & 0x0100) != 0) {
  7847:             mmuWriteWordData (a, XEiJ.regRn[ 8], XEiJ.regSRS);
  7848:             a += 2;
  7849:           }
  7850:           if ((l & 0x0200) != 0) {
  7851:             mmuWriteWordData (a, XEiJ.regRn[ 9], XEiJ.regSRS);
  7852:             a += 2;
  7853:           }
  7854:           if ((l & 0x0400) != 0) {
  7855:             mmuWriteWordData (a, XEiJ.regRn[10], XEiJ.regSRS);
  7856:             a += 2;
  7857:           }
  7858:           if ((l & 0x0800) != 0) {
  7859:             mmuWriteWordData (a, XEiJ.regRn[11], XEiJ.regSRS);
  7860:             a += 2;
  7861:           }
  7862:           if ((l & 0x1000) != 0) {
  7863:             mmuWriteWordData (a, XEiJ.regRn[12], XEiJ.regSRS);
  7864:             a += 2;
  7865:           }
  7866:           if ((l & 0x2000) != 0) {
  7867:             mmuWriteWordData (a, XEiJ.regRn[13], XEiJ.regSRS);
  7868:             a += 2;
  7869:           }
  7870:           if ((l & 0x4000) != 0) {
  7871:             mmuWriteWordData (a, XEiJ.regRn[14], XEiJ.regSRS);
  7872:             a += 2;
  7873:           }
  7874:           if ((short) l < 0) {  //(l & 0x8000) != 0
  7875:             mmuWriteWordData (a, XEiJ.regRn[15], XEiJ.regSRS);
  7876:             a += 2;
  7877:           }
  7878:         } else if (XEiJ.IRP_MOVEM_LOOP) {  //16回ループする。コンパイラが展開する
  7879:           for (int i = 0; i <= 15; i++) {
  7880:             if ((l & 0x0001 << i) != 0) {
  7881:               mmuWriteWordData (a, XEiJ.regRn[i], XEiJ.regSRS);
  7882:               a += 2;
  7883:             }
  7884:           }
  7885:         } else if (XEiJ.IRP_MOVEM_SHIFT_LEFT) {  //0になるまで左にシフトする
  7886:           l = XEiJ.MPU_BITREV_TABLE_0[l & 2047] | XEiJ.MPU_BITREV_TABLE_1[l << 10 >>> 21];  //Integer.reverse(l)
  7887:           for (int i = 0; l != 0; i++, l <<= 1) {
  7888:             if (l < 0) {
  7889:               mmuWriteWordData (a, XEiJ.regRn[i], XEiJ.regSRS);
  7890:               a += 2;
  7891:             }
  7892:           }
  7893:         } else if (XEiJ.IRP_MOVEM_SHIFT_RIGHT) {  //0になるまで右にシフトする
  7894:           for (int i = 0; l != 0; i++, l >>>= 1) {
  7895:             if ((l & 1) != 0) {
  7896:               mmuWriteWordData (a, XEiJ.regRn[i], XEiJ.regSRS);
  7897:               a += 2;
  7898:             }
  7899:           }
  7900:         } else if (XEiJ.IRP_MOVEM_ZEROS) {  //Integer.numberOfTrailingZerosを使う
  7901:           for (int i = 0; l != 0; ) {
  7902:             int k = Integer.numberOfTrailingZeros (l);
  7903:             mmuWriteWordData (a, XEiJ.regRn[i += k], XEiJ.regSRS);
  7904:             a += 2;
  7905:             l = l >>> k & ~1;
  7906:           }
  7907:         }
  7908:         XEiJ.mpuCycleCount += a - t >> 1;  //2バイト/個→1サイクル/個
  7909:       }
  7910:     }
  7911:   }  //irpMovemToMemWord
  7912: 
  7913:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7914:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  7915:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  7916:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7917:   //EXT.L Dr                                        |-|012346|-|-UUUU|-**00|D         |0100_100_011_000_rrr
  7918:   //MOVEM.L <list>,<ea>                             |-|012346|-|-----|-----|  M -WXZ  |0100_100_011_mmm_rrr-llllllllllllllll
  7919:   public static void irpMovemToMemLong () throws M68kException {
  7920:     int ea = XEiJ.regOC & 63;
  7921:     if (ea < XEiJ.EA_AR) {  //EXT.L Dr
  7922:       XEiJ.mpuCycleCount++;
  7923:       int z;
  7924:       XEiJ.regRn[ea] = z = (short) XEiJ.regRn[ea];
  7925:       XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X);  //ccr_tst
  7926:     } else {  //MOVEM.L <list>,<ea>
  7927:       int l = mmuReadWordZeroExword (XEiJ.regPC, XEiJ.regSRS);  //pcwze。レジスタリスト。ゼロ拡張
  7928:       XEiJ.regPC += 2;
  7929:       if (ea >> 3 == XEiJ.MMM_MN) {  //-(Ar)
  7930:         //MOVEM.wl <list>,-(Ar)で<list>にArが含まれているとき、000/010は命令開始時のArを、020/030/040/060は命令開始時のAr-オペレーションサイズをメモリに書き込む
  7931:         //転送するレジスタが0個のときArは変化しない
  7932:         int arr = ea - (XEiJ.EA_MN - 8);
  7933:         M68kException.m6eIncremented -= 4L << (arr << 3);  //longのシフトカウントは6bitでマスクされる
  7934:         int a = XEiJ.regRn[arr];
  7935:         XEiJ.regRn[arr] = a - 4;
  7936:         int t = a;
  7937:         if (XEiJ.IRP_MOVEM_EXPAND) {  //16回展開する
  7938:           if ((l & 0x0001) != 0) {
  7939:             mmuWriteLongData (a -= 4, XEiJ.regRn[15], XEiJ.regSRS);
  7940:           }
  7941:           if ((l & 0x0002) != 0) {
  7942:             mmuWriteLongData (a -= 4, XEiJ.regRn[14], XEiJ.regSRS);
  7943:           }
  7944:           if ((l & 0x0004) != 0) {
  7945:             mmuWriteLongData (a -= 4, XEiJ.regRn[13], XEiJ.regSRS);
  7946:           }
  7947:           if ((l & 0x0008) != 0) {
  7948:             mmuWriteLongData (a -= 4, XEiJ.regRn[12], XEiJ.regSRS);
  7949:           }
  7950:           if ((l & 0x0010) != 0) {
  7951:             mmuWriteLongData (a -= 4, XEiJ.regRn[11], XEiJ.regSRS);
  7952:           }
  7953:           if ((l & 0x0020) != 0) {
  7954:             mmuWriteLongData (a -= 4, XEiJ.regRn[10], XEiJ.regSRS);
  7955:           }
  7956:           if ((l & 0x0040) != 0) {
  7957:             mmuWriteLongData (a -= 4, XEiJ.regRn[ 9], XEiJ.regSRS);
  7958:           }
  7959:           if ((byte) l < 0) {  //(l & 0x0080) != 0
  7960:             mmuWriteLongData (a -= 4, XEiJ.regRn[ 8], XEiJ.regSRS);
  7961:           }
  7962:           if ((l & 0x0100) != 0) {
  7963:             mmuWriteLongData (a -= 4, XEiJ.regRn[ 7], XEiJ.regSRS);
  7964:           }
  7965:           if ((l & 0x0200) != 0) {
  7966:             mmuWriteLongData (a -= 4, XEiJ.regRn[ 6], XEiJ.regSRS);
  7967:           }
  7968:           if ((l & 0x0400) != 0) {
  7969:             mmuWriteLongData (a -= 4, XEiJ.regRn[ 5], XEiJ.regSRS);
  7970:           }
  7971:           if ((l & 0x0800) != 0) {
  7972:             mmuWriteLongData (a -= 4, XEiJ.regRn[ 4], XEiJ.regSRS);
  7973:           }
  7974:           if ((l & 0x1000) != 0) {
  7975:             mmuWriteLongData (a -= 4, XEiJ.regRn[ 3], XEiJ.regSRS);
  7976:           }
  7977:           if ((l & 0x2000) != 0) {
  7978:             mmuWriteLongData (a -= 4, XEiJ.regRn[ 2], XEiJ.regSRS);
  7979:           }
  7980:           if ((l & 0x4000) != 0) {
  7981:             mmuWriteLongData (a -= 4, XEiJ.regRn[ 1], XEiJ.regSRS);
  7982:           }
  7983:           if ((short) l < 0) {  //(l & 0x8000) != 0
  7984:             mmuWriteLongData (a -= 4, XEiJ.regRn[ 0], XEiJ.regSRS);
  7985:           }
  7986:         } else if (XEiJ.IRP_MOVEM_LOOP) {  //16回ループする。コンパイラが展開する
  7987:           for (int i = 15; i >= 0; i--) {
  7988:             if ((l & 0x8000 >>> i) != 0) {
  7989:               mmuWriteLongData (a -= 4, XEiJ.regRn[i], XEiJ.regSRS);
  7990:             }
  7991:           }
  7992:         } else if (XEiJ.IRP_MOVEM_SHIFT_LEFT) {  //0になるまで左にシフトする
  7993:           l = XEiJ.MPU_BITREV_TABLE_0[l & 2047] | XEiJ.MPU_BITREV_TABLE_1[l << 10 >>> 21];  //Integer.reverse(l)
  7994:           for (int i = 15; l != 0; i--, l <<= 1) {
  7995:             if (l < 0) {
  7996:               mmuWriteLongData (a -= 4, XEiJ.regRn[i], XEiJ.regSRS);
  7997:             }
  7998:           }
  7999:         } else if (XEiJ.IRP_MOVEM_SHIFT_RIGHT) {  //0になるまで右にシフトする
  8000:           for (int i = 15; l != 0; i--, l >>>= 1) {
  8001:             if ((l & 1) != 0) {
  8002:               mmuWriteLongData (a -= 4, XEiJ.regRn[i], XEiJ.regSRS);
  8003:             }
  8004:           }
  8005:         } else if (XEiJ.IRP_MOVEM_ZEROS) {  //Integer.numberOfTrailingZerosを使う
  8006:           for (int i = 15; l != 0; ) {
  8007:             int k = Integer.numberOfTrailingZeros (l);
  8008:             mmuWriteLongData (a -= 4, XEiJ.regRn[i -= k], XEiJ.regSRS);
  8009:             l = l >>> k & ~1;
  8010:           }
  8011:         }
  8012:         M68kException.m6eIncremented += 4L << (arr << 3);  //元に戻しておく。longのシフトカウントは6bitでマスクされる
  8013:         XEiJ.regRn[arr] = a;
  8014:         XEiJ.mpuCycleCount += t - a >> 2;  //4バイト/個→1サイクル/個
  8015:       } else {  //-(Ar)以外
  8016:         int a = efaCltLong (ea);
  8017:         int t = a;
  8018:         if (XEiJ.IRP_MOVEM_EXPAND) {  //16回展開する
  8019:           if ((l & 0x0001) != 0) {
  8020:             mmuWriteLongData (a, XEiJ.regRn[ 0], XEiJ.regSRS);
  8021:             a += 4;
  8022:           }
  8023:           if ((l & 0x0002) != 0) {
  8024:             mmuWriteLongData (a, XEiJ.regRn[ 1], XEiJ.regSRS);
  8025:             a += 4;
  8026:           }
  8027:           if ((l & 0x0004) != 0) {
  8028:             mmuWriteLongData (a, XEiJ.regRn[ 2], XEiJ.regSRS);
  8029:             a += 4;
  8030:           }
  8031:           if ((l & 0x0008) != 0) {
  8032:             mmuWriteLongData (a, XEiJ.regRn[ 3], XEiJ.regSRS);
  8033:             a += 4;
  8034:           }
  8035:           if ((l & 0x0010) != 0) {
  8036:             mmuWriteLongData (a, XEiJ.regRn[ 4], XEiJ.regSRS);
  8037:             a += 4;
  8038:           }
  8039:           if ((l & 0x0020) != 0) {
  8040:             mmuWriteLongData (a, XEiJ.regRn[ 5], XEiJ.regSRS);
  8041:             a += 4;
  8042:           }
  8043:           if ((l & 0x0040) != 0) {
  8044:             mmuWriteLongData (a, XEiJ.regRn[ 6], XEiJ.regSRS);
  8045:             a += 4;
  8046:           }
  8047:           if ((byte) l < 0) {  //(l & 0x0080) != 0
  8048:             mmuWriteLongData (a, XEiJ.regRn[ 7], XEiJ.regSRS);
  8049:             a += 4;
  8050:           }
  8051:           if ((l & 0x0100) != 0) {
  8052:             mmuWriteLongData (a, XEiJ.regRn[ 8], XEiJ.regSRS);
  8053:             a += 4;
  8054:           }
  8055:           if ((l & 0x0200) != 0) {
  8056:             mmuWriteLongData (a, XEiJ.regRn[ 9], XEiJ.regSRS);
  8057:             a += 4;
  8058:           }
  8059:           if ((l & 0x0400) != 0) {
  8060:             mmuWriteLongData (a, XEiJ.regRn[10], XEiJ.regSRS);
  8061:             a += 4;
  8062:           }
  8063:           if ((l & 0x0800) != 0) {
  8064:             mmuWriteLongData (a, XEiJ.regRn[11], XEiJ.regSRS);
  8065:             a += 4;
  8066:           }
  8067:           if ((l & 0x1000) != 0) {
  8068:             mmuWriteLongData (a, XEiJ.regRn[12], XEiJ.regSRS);
  8069:             a += 4;
  8070:           }
  8071:           if ((l & 0x2000) != 0) {
  8072:             mmuWriteLongData (a, XEiJ.regRn[13], XEiJ.regSRS);
  8073:             a += 4;
  8074:           }
  8075:           if ((l & 0x4000) != 0) {
  8076:             mmuWriteLongData (a, XEiJ.regRn[14], XEiJ.regSRS);
  8077:             a += 4;
  8078:           }
  8079:           if ((short) l < 0) {  //(l & 0x8000) != 0
  8080:             mmuWriteLongData (a, XEiJ.regRn[15], XEiJ.regSRS);
  8081:             a += 4;
  8082:           }
  8083:         } else if (XEiJ.IRP_MOVEM_LOOP) {  //16回ループする。コンパイラが展開する
  8084:           for (int i = 0; i <= 15; i++) {
  8085:             if ((l & 0x0001 << i) != 0) {
  8086:               mmuWriteLongData (a, XEiJ.regRn[i], XEiJ.regSRS);
  8087:               a += 4;
  8088:             }
  8089:           }
  8090:         } else if (XEiJ.IRP_MOVEM_SHIFT_LEFT) {  //0になるまで左にシフトする
  8091:           l = XEiJ.MPU_BITREV_TABLE_0[l & 2047] | XEiJ.MPU_BITREV_TABLE_1[l << 10 >>> 21];  //Integer.reverse(l)
  8092:           for (int i = 0; l != 0; i++, l <<= 1) {
  8093:             if (l < 0) {
  8094:               mmuWriteLongData (a, XEiJ.regRn[i], XEiJ.regSRS);
  8095:               a += 4;
  8096:             }
  8097:           }
  8098:         } else if (XEiJ.IRP_MOVEM_SHIFT_RIGHT) {  //0になるまで右にシフトする
  8099:           for (int i = 0; l != 0; i++, l >>>= 1) {
  8100:             if ((l & 1) != 0) {
  8101:               mmuWriteLongData (a, XEiJ.regRn[i], XEiJ.regSRS);
  8102:               a += 4;
  8103:             }
  8104:           }
  8105:         } else if (XEiJ.IRP_MOVEM_ZEROS) {  //Integer.numberOfTrailingZerosを使う
  8106:           for (int i = 0; l != 0; ) {
  8107:             int k = Integer.numberOfTrailingZeros (l);
  8108:             mmuWriteLongData (a, XEiJ.regRn[i += k], XEiJ.regSRS);
  8109:             a += 4;
  8110:             l = l >>> k & ~1;
  8111:           }
  8112:         }
  8113:         XEiJ.mpuCycleCount += a - t >> 2;  //4バイト/個→1サイクル/個
  8114:       }
  8115:     }
  8116:   }  //irpMovemToMemLong
  8117: 
  8118:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  8119:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  8120:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  8121:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  8122:   //TST.B <ea>                                      |-|012346|-|-UUUU|-**00|D M+-WXZ  |0100_101_000_mmm_rrr
  8123:   //TST.B <ea>                                      |-|--2346|-|-UUUU|-**00|        PI|0100_101_000_mmm_rrr
  8124:   public static void irpTstByte () throws M68kException {
  8125:     XEiJ.mpuCycleCount++;
  8126:     int ea = XEiJ.regOC & 63;
  8127:     XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & (ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadByteSignExword ((XEiJ.regPC += 2) - 1, XEiJ.regSRS) : mmuReadByteSignData (efaAnyByte (ea), XEiJ.regSRS))];  //ccr_tst_byte。pcbs。イミディエイトを分離。アドレッシングモードに注意
  8128:   }  //irpTstByte
  8129: 
  8130:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  8131:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  8132:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  8133:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  8134:   //TST.W <ea>                                      |-|012346|-|-UUUU|-**00|D M+-WXZ  |0100_101_001_mmm_rrr
  8135:   //TST.W <ea>                                      |-|--2346|-|-UUUU|-**00| A      PI|0100_101_001_mmm_rrr
  8136:   public static void irpTstWord () throws M68kException {
  8137:     XEiJ.mpuCycleCount++;
  8138:     int ea = XEiJ.regOC & 63;
  8139:     int z = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) : mmuReadWordSignData (efaAnyWord (ea), XEiJ.regSRS);  //pcws。イミディエイトを分離。アドレッシングモードに注意。このr[ea]はデータレジスタまたはアドレスレジスタ
  8140:     XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (char) z - 1 >> 31 & XEiJ.REG_CCR_Z | ((short) z < 0 ? XEiJ.REG_CCR_N : 0);  //ccr_tst_word
  8141:   }  //irpTstWord
  8142: 
  8143:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  8144:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  8145:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  8146:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  8147:   //TST.L <ea>                                      |-|012346|-|-UUUU|-**00|D M+-WXZ  |0100_101_010_mmm_rrr
  8148:   //TST.L <ea>                                      |-|--2346|-|-UUUU|-**00| A      PI|0100_101_010_mmm_rrr
  8149:   public static void irpTstLong () throws M68kException {
  8150:     XEiJ.mpuCycleCount++;
  8151:     int ea = XEiJ.regOC & 63;
  8152:     int z = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS) : mmuReadLongData (efaAnyLong (ea), XEiJ.regSRS);  //pcls。イミディエイトを分離。アドレッシングモードに注意。このr[ea]はデータレジスタまたはアドレスレジスタ
  8153:     XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X);  //ccr_tst
  8154:   }  //irpTstLong
  8155: 
  8156:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  8157:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  8158:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  8159:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  8160:   //TAS.B <ea>                                      |-|012346|-|-UUUU|-**00|D M+-WXZ  |0100_101_011_mmm_rrr
  8161:   //ILLEGAL                                         |-|012346|-|-----|-----|          |0100_101_011_111_100
  8162:   public static void irpTas () throws M68kException {
  8163:     int ea = XEiJ.regOC & 63;
  8164:     int z;
  8165:     if (ea < XEiJ.EA_AR) {  //TAS.B Dr
  8166:       XEiJ.mpuCycleCount++;
  8167:       XEiJ.regRn[ea] = 0x80 | (z = XEiJ.regRn[ea]);
  8168:     } else {  //TAS.B <mem>
  8169:       XEiJ.mpuCycleCount += 17;
  8170:       int a = efaMltByte (ea);
  8171:       mmuWriteByteData (a, 0x80 | (z = mmuModifyByteSignData (a, XEiJ.regSRS)), XEiJ.regSRS);
  8172:     }
  8173:     XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & z];  //ccr_tst_byte
  8174:   }  //irpTas
  8175: 
  8176:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  8177:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  8178:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  8179:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  8180:   //MULU.L <ea>,Dl                                  |-|--2346|-|-UUUU|-***0|D M+-WXZPI|0100_110_000_mmm_rrr-0lll000000000hhh        (h is not used)
  8181:   //MULU.L <ea>,Dh:Dl                               |-|--234S|-|-UUUU|-***0|D M+-WXZPI|0100_110_000_mmm_rrr-0lll010000000hhh        (if h=l then result is not defined)
  8182:   //MULS.L <ea>,Dl                                  |-|--2346|-|-UUUU|-***0|D M+-WXZPI|0100_110_000_mmm_rrr-0lll100000000hhh        (h is not used)
  8183:   //MULS.L <ea>,Dh:Dl                               |-|--234S|-|-UUUU|-***0|D M+-WXZPI|0100_110_000_mmm_rrr-0lll110000000hhh        (if h=l then result is not defined)
  8184:   public static void irpMuluMulsLong () throws M68kException {
  8185:     int w = mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);  //pcwz。拡張ワード
  8186:     if ((w & ~0b0111_110_000_000_111) != 0) {
  8187:       M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION;
  8188:       throw M68kException.m6eSignal;
  8189:     }
  8190:     if ((w & 0b0000_010_000_000_000) != 0) {  //64bit積
  8191:       M68kException.m6eNumber = M68kException.M6E_UNIMPLEMENTED_INSTRUCTION;
  8192:       throw M68kException.m6eSignal;
  8193:     }
  8194:     //32bit積
  8195:     int s = w & 0b0000_100_000_000_000;  //0=MULU,1=MULS
  8196:     int l = w >> 12;  //被乗数,積
  8197:     XEiJ.mpuCycleCount += 2;
  8198:     int ea = XEiJ.regOC & 63;
  8199:     long yy = (long) (ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS) : mmuReadLongData (efaAnyLong (ea), XEiJ.regSRS));  //pcls。イミディエイトを分離
  8200:     long xx = (long) XEiJ.regRn[l];
  8201:     if (s == 0) {  //MULU
  8202:       long zz = (0xffffffffL & xx) * (0xffffffffL & yy);
  8203:       int z = XEiJ.regRn[l] = (int) zz;
  8204:       XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | (zz >>> 32 != 0L ? XEiJ.REG_CCR_V : 0);
  8205:     } else {  //MULS
  8206:       long zz = xx * yy;
  8207:       int z = XEiJ.regRn[l] = (int) zz;
  8208:       XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | (z != zz ? XEiJ.REG_CCR_V : 0);
  8209:     }
  8210:   }  //irpMuluMulsLong
  8211: 
  8212:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  8213:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  8214:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  8215:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  8216:   //DIVU.L <ea>,Dq                                  |-|--2346|-|-UUUU|-***0|D M+-WXZPI|0100_110_001_mmm_rrr-0qqq000000000qqq
  8217:   //DIVUL.L <ea>,Dr:Dq                              |-|--2346|-|-UUUU|-***0|D M+-WXZPI|0100_110_001_mmm_rrr-0qqq000000000rrr        (q is not equal to r)
  8218:   //DIVU.L <ea>,Dr:Dq                               |-|--234S|-|-UUUU|-***0|D M+-WXZPI|0100_110_001_mmm_rrr-0qqq010000000rrr        (q is not equal to r)
  8219:   //DIVS.L <ea>,Dq                                  |-|--2346|-|-UUUU|-***0|D M+-WXZPI|0100_110_001_mmm_rrr-0qqq100000000qqq
  8220:   //DIVSL.L <ea>,Dr:Dq                              |-|--2346|-|-UUUU|-***0|D M+-WXZPI|0100_110_001_mmm_rrr-0qqq100000000rrr        (q is not equal to r)
  8221:   //DIVS.L <ea>,Dr:Dq                               |-|--234S|-|-UUUU|-***0|D M+-WXZPI|0100_110_001_mmm_rrr-0qqq110000000rrr        (q is not equal to r)
  8222:   //
  8223:   //DIVS.L <ea>,Dq
  8224:   //  32bit被除数Dq/32bit除数<ea>→32bit商Dq
  8225:   //
  8226:   //DIVS.L <ea>,Dr:Dq
  8227:   //  64bit被除数Dr:Dq/32bit除数<ea>→32bit余りDr:32bit商Dq
  8228:   //  M68000PRMでDIVS.Lのアドレッシングモードがデータ可変と書かれているのはデータの間違い
  8229:   //
  8230:   //DIVSL.L <ea>,Dr:Dq
  8231:   //  32bit被除数Dq/32bit除数<ea>→32bit余りDr:32bit商Dq
  8232:   //
  8233:   //DIVU.L <ea>,Dq
  8234:   //  32bit被除数Dq/32bit除数<ea>→32bit商Dq
  8235:   //
  8236:   //DIVU.L <ea>,Dr:Dq
  8237:   //  64bit被除数Dr:Dq/32bit除数<ea>→32bit余りDr:32bit商Dq
  8238:   //
  8239:   //DIVUL.L <ea>,Dr:Dq
  8240:   //  32bit被除数Dq/32bit除数<ea>→32bit余りDr:32bit商Dq
  8241:   public static void irpDivuDivsLong () throws M68kException {
  8242:     int w = mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);  //pcwz。拡張ワード
  8243:     if ((w & ~0b0111_110_000_000_111) != 0) {
  8244:       M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION;
  8245:       throw M68kException.m6eSignal;
  8246:     }
  8247:     if ((w & 0b0000_010_000_000_000) != 0) {  //64bit被除数
  8248:       M68kException.m6eNumber = M68kException.M6E_UNIMPLEMENTED_INSTRUCTION;
  8249:       throw M68kException.m6eSignal;
  8250:     }
  8251:     //32bit被除数
  8252:     int s = w & 0b0000_100_000_000_000;  //0=DIVU,1=DIVS
  8253:     int h = w & 7;  //余り
  8254:     int l = w >> 12;  //被除数,商
  8255:     int ea = XEiJ.regOC & 63;
  8256:     int y = ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS) : mmuReadLongData (efaAnyLong (ea), XEiJ.regSRS);  //除数。pcls。イミディエイトを分離
  8257:     if (s == 0) {  //符号なし。DIVU.L <ea>,*
  8258:       XEiJ.mpuCycleCount += 38;  //最大
  8259:       long yy = (long) y & 0xffffffffL;  //除数
  8260:       if (y == 0) {  //ゼロ除算
  8261:         XEiJ.regCCR = (XEiJ.regCCR & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_N | XEiJ.REG_CCR_Z | XEiJ.REG_CCR_V)  //XとNとZとVは変化しない
  8262:                        );  //Cは常にクリア
  8263:         XEiJ.mpuCycleCount += 38 - 34;
  8264:         M68kException.m6eAddress = XEiJ.regPC0;  //アドレスは命令の先頭
  8265:         M68kException.m6eNumber = M68kException.M6E_DIVIDE_BY_ZERO;
  8266:         throw M68kException.m6eSignal;
  8267:       }  //if ゼロ除算
  8268:       long xx = (long) XEiJ.regRn[l] & 0xffffffffL;  //被除数
  8269:       long zz = (long) ((double) xx / (double) yy);  //double→intのキャストは飽和変換で0xffffffff/0x00000001が0x7fffffffになってしまうのでdouble→longとする
  8270:       int z = XEiJ.regRn[l] = (int) zz;  //商
  8271:       if (h != l) {
  8272:         XEiJ.regRn[h] = (int) (xx - yy * zz);  //余り
  8273:       }
  8274:       XEiJ.regCCR = (XEiJ.regCCR & XEiJ.REG_CCR_X |  //Xは変化しない
  8275:                      (z < 0 ? XEiJ.REG_CCR_N : 0) |  //Nは商が負のときセット、さもなくばクリア
  8276:                      (z == 0 ? XEiJ.REG_CCR_Z : 0)  //Zは商が0のときセット、さもなくばクリア
  8277:                      );  //VとCは常にクリア
  8278:     } else {  //符号あり。DIVS.L <ea>,*
  8279:       XEiJ.mpuCycleCount += 38;  //最大
  8280:       long yy = (long) y;  //除数
  8281:       if (y == 0) {  //ゼロ除算
  8282:         XEiJ.regCCR = (XEiJ.regCCR & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_N | XEiJ.REG_CCR_Z | XEiJ.REG_CCR_V)  //XとNとZとVは変化しない
  8283:                        );  //Cは常にクリア
  8284:         XEiJ.mpuCycleCount += 38 - 34;
  8285:         M68kException.m6eAddress = XEiJ.regPC0;  //アドレスは命令の先頭
  8286:         M68kException.m6eNumber = M68kException.M6E_DIVIDE_BY_ZERO;
  8287:         throw M68kException.m6eSignal;
  8288:       }  //if ゼロ除算
  8289:       long xx = (long) XEiJ.regRn[l];  //被除数
  8290:       long zz = xx / yy;  //商
  8291:       if ((int) zz != zz) {  //オーバーフローあり
  8292:         //Dqは変化しない
  8293:         XEiJ.regCCR = (XEiJ.regCCR & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_N | XEiJ.REG_CCR_Z) |  //XとNとZは変化しない
  8294:                        XEiJ.REG_CCR_V  //Vは常にセット
  8295:                        );  //Cは常にクリア
  8296:       } else {  //オーバーフローなし
  8297:         int z = XEiJ.regRn[l] = (int) zz;  //商
  8298:         if (h != l) {  //DIVSL.L <ea>,Dr:Dq
  8299:           XEiJ.regRn[h] = (int) (xx - yy * zz);  //余り
  8300:         }
  8301:         XEiJ.regCCR = (XEiJ.regCCR & XEiJ.REG_CCR_X |  //Xは変化しない
  8302:                        (z < 0 ? XEiJ.REG_CCR_N : 0) |  //Nは商が負のときセット、さもなくばクリア
  8303:                        (z == 0 ? XEiJ.REG_CCR_Z : 0)  //Zは商が0のときセット、さもなくばクリア
  8304:                        );  //VとCは常にクリア
  8305:       }  //if オーバーフローあり/オーバーフローなし
  8306:     }  //if 符号なし/符号あり
  8307:   }  //irpDivuDivsLong
  8308: 
  8309:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  8310:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  8311:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  8312:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  8313:   //SATS.L Dr                                       |-|------|-|-UUUU|-**00|D         |0100_110_010_000_rrr (ISA_B)
  8314:   //MOVEM.W <ea>,<list>                             |-|012346|-|-----|-----|  M+ WXZP |0100_110_010_mmm_rrr-llllllllllllllll
  8315:   //
  8316:   //SATS.L Dr
  8317:   //  VがセットされていたらDrを符号が逆で絶対値が最大の値にする(直前のDrに対する演算を飽和演算にする)
  8318:   public static void irpMovemToRegWord () throws M68kException {
  8319:     int ea = XEiJ.regOC & 63;
  8320:     if (ea < XEiJ.EA_AR) {  //SATS.L Dr
  8321:       XEiJ.mpuCycleCount++;
  8322:       int z = XEiJ.regRn[ea];
  8323:       if (XEiJ.TEST_BIT_1_SHIFT ? XEiJ.regCCR << 31 - 1 < 0 : (XEiJ.regCCR & XEiJ.REG_CCR_V) != 0) {  //Vがセットされているとき
  8324:         XEiJ.regRn[ea] = z = z >> 31 ^ 0x80000000;  //符号が逆で絶対値が最大の値にする
  8325:       }
  8326:       XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X);  //ccr_tst
  8327:     } else {  //MOVEM.W <ea>,<list>
  8328:       int l = mmuReadWordZeroExword (XEiJ.regPC, XEiJ.regSRS);  //pcwze。レジスタリスト。ゼロ拡張
  8329:       XEiJ.regPC += 2;
  8330:       int arr, a;
  8331:       if (ea >> 3 == XEiJ.MMM_MP) {  //(Ar)+
  8332:         arr = ea - (XEiJ.EA_MP - 8);
  8333:         a = XEiJ.regRn[arr];
  8334:       } else {  //(Ar)+以外
  8335:         arr = 16;
  8336:         a = efaCntWord (ea);
  8337:       }
  8338:       int t = a;
  8339:       if (XEiJ.IRP_MOVEM_EXPAND) {  //16回展開する
  8340:         if ((l & 0x0001) != 0) {
  8341:           XEiJ.regRn[ 0] = mmuReadWordSignData (a, XEiJ.regSRS);  //データレジスタも符号拡張して32bit全部書き換える
  8342:           a += 2;
  8343:         }
  8344:         if ((l & 0x0002) != 0) {
  8345:           XEiJ.regRn[ 1] = mmuReadWordSignData (a, XEiJ.regSRS);  //データレジスタも符号拡張して32bit全部書き換える
  8346:           a += 2;
  8347:         }
  8348:         if ((l & 0x0004) != 0) {
  8349:           XEiJ.regRn[ 2] = mmuReadWordSignData (a, XEiJ.regSRS);  //データレジスタも符号拡張して32bit全部書き換える
  8350:           a += 2;
  8351:         }
  8352:         if ((l & 0x0008) != 0) {
  8353:           XEiJ.regRn[ 3] = mmuReadWordSignData (a, XEiJ.regSRS);  //データレジスタも符号拡張して32bit全部書き換える
  8354:           a += 2;
  8355:         }
  8356:         if ((l & 0x0010) != 0) {
  8357:           XEiJ.regRn[ 4] = mmuReadWordSignData (a, XEiJ.regSRS);  //データレジスタも符号拡張して32bit全部書き換える
  8358:           a += 2;
  8359:         }
  8360:         if ((l & 0x0020) != 0) {
  8361:           XEiJ.regRn[ 5] = mmuReadWordSignData (a, XEiJ.regSRS);  //データレジスタも符号拡張して32bit全部書き換える
  8362:           a += 2;
  8363:         }
  8364:         if ((l & 0x0040) != 0) {
  8365:           XEiJ.regRn[ 6] = mmuReadWordSignData (a, XEiJ.regSRS);  //データレジスタも符号拡張して32bit全部書き換える
  8366:           a += 2;
  8367:         }
  8368:         if ((byte) l < 0) {  //(l & 0x0080) != 0
  8369:           XEiJ.regRn[ 7] = mmuReadWordSignData (a, XEiJ.regSRS);  //データレジスタも符号拡張して32bit全部書き換える
  8370:           a += 2;
  8371:         }
  8372:         if ((l & 0x0100) != 0) {
  8373:           XEiJ.regRn[ 8] = mmuReadWordSignData (a, XEiJ.regSRS);  //符号拡張して32bit全部書き換える
  8374:           a += 2;
  8375:         }
  8376:         if ((l & 0x0200) != 0) {
  8377:           XEiJ.regRn[ 9] = mmuReadWordSignData (a, XEiJ.regSRS);  //符号拡張して32bit全部書き換える
  8378:           a += 2;
  8379:         }
  8380:         if ((l & 0x0400) != 0) {
  8381:           XEiJ.regRn[10] = mmuReadWordSignData (a, XEiJ.regSRS);  //符号拡張して32bit全部書き換える
  8382:           a += 2;
  8383:         }
  8384:         if ((l & 0x0800) != 0) {
  8385:           XEiJ.regRn[11] = mmuReadWordSignData (a, XEiJ.regSRS);  //符号拡張して32bit全部書き換える
  8386:           a += 2;
  8387:         }
  8388:         if ((l & 0x1000) != 0) {
  8389:           XEiJ.regRn[12] = mmuReadWordSignData (a, XEiJ.regSRS);  //符号拡張して32bit全部書き換える
  8390:           a += 2;
  8391:         }
  8392:         if ((l & 0x2000) != 0) {
  8393:           XEiJ.regRn[13] = mmuReadWordSignData (a, XEiJ.regSRS);  //符号拡張して32bit全部書き換える
  8394:           a += 2;
  8395:         }
  8396:         if ((l & 0x4000) != 0) {
  8397:           XEiJ.regRn[14] = mmuReadWordSignData (a, XEiJ.regSRS);  //符号拡張して32bit全部書き換える
  8398:           a += 2;
  8399:         }
  8400:         if ((short) l < 0) {  //(l & 0x8000) != 0
  8401:           XEiJ.regRn[15] = mmuReadWordSignData (a, XEiJ.regSRS);  //符号拡張して32bit全部書き換える
  8402:           a += 2;
  8403:         }
  8404:       } else if (XEiJ.IRP_MOVEM_LOOP) {  //16回ループする。コンパイラが展開する
  8405:         for (int i = 0; i <= 15; i++) {
  8406:           if ((l & 0x0001 << i) != 0) {
  8407:             XEiJ.regRn[i] = mmuReadWordSignData (a, XEiJ.regSRS);  //(データレジスタも)符号拡張して32bit全部書き換える
  8408:             a += 2;
  8409:           }
  8410:         }
  8411:       } else if (XEiJ.IRP_MOVEM_SHIFT_LEFT) {  //0になるまで左にシフトする
  8412:         l = XEiJ.MPU_BITREV_TABLE_0[l & 2047] | XEiJ.MPU_BITREV_TABLE_1[l << 10 >>> 21];  //Integer.reverse(l)
  8413:         for (int i = 0; l != 0; i++, l <<= 1) {
  8414:           if (l < 0) {
  8415:             XEiJ.regRn[i] = mmuReadWordSignData (a, XEiJ.regSRS);  //(データレジスタも)符号拡張して32bit全部書き換える
  8416:             a += 2;
  8417:           }
  8418:         }
  8419:       } else if (XEiJ.IRP_MOVEM_SHIFT_RIGHT) {  //0になるまで右にシフトする
  8420:         for (int i = 0; l != 0; i++, l >>>= 1) {
  8421:           if ((l & 1) != 0) {
  8422:             XEiJ.regRn[i] = mmuReadWordSignData (a, XEiJ.regSRS);  //(データレジスタも)符号拡張して32bit全部書き換える
  8423:             a += 2;
  8424:           }
  8425:         }
  8426:       } else if (XEiJ.IRP_MOVEM_ZEROS) {  //Integer.numberOfTrailingZerosを使う
  8427:         for (int i = 0; l != 0; ) {
  8428:           int k = Integer.numberOfTrailingZeros (l);
  8429:           XEiJ.regRn[i += k] = mmuReadWordSignData (a, XEiJ.regSRS);  //(データレジスタも)符号拡張して32bit全部書き換える
  8430:           a += 2;
  8431:           l = l >>> k & ~1;
  8432:         }
  8433:       }
  8434:       //MOVEM.W (Ar)+,<list>で<list>にArが含まれているとき、メモリから読み出したデータを捨ててArをインクリメントする
  8435:       XEiJ.regRn[arr] = a;
  8436:       XEiJ.mpuCycleCount += a - t >> 1;  //2バイト/個→1サイクル/個
  8437:     }
  8438:   }  //irpMovemToRegWord
  8439: 
  8440:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  8441:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  8442:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  8443:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  8444:   //MOVEM.L <ea>,<list>                             |-|012346|-|-----|-----|  M+ WXZP |0100_110_011_mmm_rrr-llllllllllllllll
  8445:   public static void irpMovemToRegLong () throws M68kException {
  8446:     int ea = XEiJ.regOC & 63;
  8447:     {
  8448:       int l = mmuReadWordZeroExword (XEiJ.regPC, XEiJ.regSRS);  //pcwze。レジスタリスト。ゼロ拡張
  8449:       XEiJ.regPC += 2;
  8450:       int arr, a;
  8451:       if (ea >> 3 == XEiJ.MMM_MP) {  //(Ar)+
  8452:         arr = ea - (XEiJ.EA_MP - 8);
  8453:         a = XEiJ.regRn[arr];
  8454:       } else {  //(Ar)+以外
  8455:         arr = 16;
  8456:         a = efaCntLong (ea);
  8457:       }
  8458:       int t = a;
  8459:       if (XEiJ.IRP_MOVEM_EXPAND) {  //16回展開する
  8460:         if ((l & 0x0001) != 0) {
  8461:           XEiJ.regRn[ 0] = mmuReadLongData (a, XEiJ.regSRS);
  8462:           a += 4;
  8463:         }
  8464:         if ((l & 0x0002) != 0) {
  8465:           XEiJ.regRn[ 1] = mmuReadLongData (a, XEiJ.regSRS);
  8466:           a += 4;
  8467:         }
  8468:         if ((l & 0x0004) != 0) {
  8469:           XEiJ.regRn[ 2] = mmuReadLongData (a, XEiJ.regSRS);
  8470:           a += 4;
  8471:         }
  8472:         if ((l & 0x0008) != 0) {
  8473:           XEiJ.regRn[ 3] = mmuReadLongData (a, XEiJ.regSRS);
  8474:           a += 4;
  8475:         }
  8476:         if ((l & 0x0010) != 0) {
  8477:           XEiJ.regRn[ 4] = mmuReadLongData (a, XEiJ.regSRS);
  8478:           a += 4;
  8479:         }
  8480:         if ((l & 0x0020) != 0) {
  8481:           XEiJ.regRn[ 5] = mmuReadLongData (a, XEiJ.regSRS);
  8482:           a += 4;
  8483:         }
  8484:         if ((l & 0x0040) != 0) {
  8485:           XEiJ.regRn[ 6] = mmuReadLongData (a, XEiJ.regSRS);
  8486:           a += 4;
  8487:         }
  8488:         if ((byte) l < 0) {  //(l & 0x0080) != 0
  8489:           XEiJ.regRn[ 7] = mmuReadLongData (a, XEiJ.regSRS);
  8490:           a += 4;
  8491:         }
  8492:         if ((l & 0x0100) != 0) {
  8493:           XEiJ.regRn[ 8] = mmuReadLongData (a, XEiJ.regSRS);
  8494:           a += 4;
  8495:         }
  8496:         if ((l & 0x0200) != 0) {
  8497:           XEiJ.regRn[ 9] = mmuReadLongData (a, XEiJ.regSRS);
  8498:           a += 4;
  8499:         }
  8500:         if ((l & 0x0400) != 0) {
  8501:           XEiJ.regRn[10] = mmuReadLongData (a, XEiJ.regSRS);
  8502:           a += 4;
  8503:         }
  8504:         if ((l & 0x0800) != 0) {
  8505:           XEiJ.regRn[11] = mmuReadLongData (a, XEiJ.regSRS);
  8506:           a += 4;
  8507:         }
  8508:         if ((l & 0x1000) != 0) {
  8509:           XEiJ.regRn[12] = mmuReadLongData (a, XEiJ.regSRS);
  8510:           a += 4;
  8511:         }
  8512:         if ((l & 0x2000) != 0) {
  8513:           XEiJ.regRn[13] = mmuReadLongData (a, XEiJ.regSRS);
  8514:           a += 4;
  8515:         }
  8516:         if ((l & 0x4000) != 0) {
  8517:           XEiJ.regRn[14] = mmuReadLongData (a, XEiJ.regSRS);
  8518:           a += 4;
  8519:         }
  8520:         if ((short) l < 0) {  //(l & 0x8000) != 0
  8521:           XEiJ.regRn[15] = mmuReadLongData (a, XEiJ.regSRS);
  8522:           a += 4;
  8523:         }
  8524:       } else if (XEiJ.IRP_MOVEM_LOOP) {  //16回ループする。コンパイラが展開する
  8525:         for (int i = 0; i <= 15; i++) {
  8526:           if ((l & 0x0001 << i) != 0) {
  8527:             XEiJ.regRn[i] = mmuReadLongData (a, XEiJ.regSRS);
  8528:             a += 4;
  8529:           }
  8530:         }
  8531:       } else if (XEiJ.IRP_MOVEM_SHIFT_LEFT) {  //0になるまで左にシフトする
  8532:         l = XEiJ.MPU_BITREV_TABLE_0[l & 2047] | XEiJ.MPU_BITREV_TABLE_1[l << 10 >>> 21];  //Integer.reverse(l)
  8533:         for (int i = 0; l != 0; i++, l <<= 1) {
  8534:           if (l < 0) {
  8535:             XEiJ.regRn[i] = mmuReadLongData (a, XEiJ.regSRS);
  8536:             a += 4;
  8537:           }
  8538:         }
  8539:       } else if (XEiJ.IRP_MOVEM_SHIFT_RIGHT) {  //0になるまで右にシフトする
  8540:         for (int i = 0; l != 0; i++, l >>>= 1) {
  8541:           if ((l & 1) != 0) {
  8542:             XEiJ.regRn[i] = mmuReadLongData (a, XEiJ.regSRS);
  8543:             a += 4;
  8544:           }
  8545:         }
  8546:       } else if (XEiJ.IRP_MOVEM_ZEROS) {  //Integer.numberOfTrailingZerosを使う
  8547:         for (int i = 0; l != 0; ) {
  8548:           int k = Integer.numberOfTrailingZeros (l);
  8549:           XEiJ.regRn[i += k] = mmuReadLongData (a, XEiJ.regSRS);
  8550:           a += 4;
  8551:           l = l >>> k & ~1;
  8552:         }
  8553:       }
  8554:       //MOVEM.L (Ar)+,<list>で<list>にArが含まれているとき、メモリから読み出したデータを捨ててArをインクリメントする
  8555:       XEiJ.regRn[arr] = a;
  8556:       XEiJ.mpuCycleCount += a - t >> 2;  //4バイト/個→1サイクル/個
  8557:     }
  8558:   }  //irpMovemToRegLong
  8559: 
  8560:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  8561:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  8562:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  8563:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  8564:   //TRAP #<vector>                                  |-|012346|-|-----|-----|          |0100_111_001_00v_vvv
  8565:   public static void irpTrap () throws M68kException {
  8566:     irpExceptionFormat0 (XEiJ.regOC - (0b0100_111_001_000_000 - M68kException.M6E_TRAP_0_INSTRUCTION_VECTOR) << 2, XEiJ.regPC);  //pcは次の命令
  8567:   }  //irpTrap
  8568:   public static void irpTrap15 () throws M68kException {
  8569:     if ((XEiJ.regRn[0] & 255) == 0x8e) {  //IOCS _BOOTINF
  8570:       MainMemory.mmrCheckHuman ();
  8571:     }
  8572:     irpExceptionFormat0 (M68kException.M6E_TRAP_15_INSTRUCTION_VECTOR << 2, XEiJ.regPC);  //pcは次の命令
  8573:   }  //irpTrap15
  8574: 
  8575:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  8576:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  8577:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  8578:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  8579:   //LINK.W Ar,#<data>                               |-|012346|-|-----|-----|          |0100_111_001_010_rrr-{data}
  8580:   //
  8581:   //LINK.W Ar,#<data>
  8582:   //  PEA.L (Ar);MOVEA.L A7,Ar;ADDA.W #<data>,A7と同じ
  8583:   //  LINK.W A7,#<data>はA7をデクリメントする前の値がプッシュされ、A7に#<data>が加算される
  8584:   public static void irpLinkWord () throws M68kException {
  8585:     XEiJ.mpuCycleCount++;
  8586:     int o = mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);  //pcws
  8587:     int arr = XEiJ.regOC - (0b0100_111_001_010_000 - 8);
  8588:     //評価順序に注意。LINK.W A7,#<data>のときプッシュするのはA7をデクリメントする前の値。wl(r[15]-=4,r[8+rrr])は不可
  8589:     int a = XEiJ.regRn[arr];
  8590:     M68kException.m6eIncremented -= 4L << (7 << 3);
  8591:     int sp = XEiJ.regRn[15] -= 4;
  8592:     mmuWriteLongData (sp, a, XEiJ.regSRS);  //pushl
  8593:     XEiJ.regRn[arr] = sp;
  8594:     XEiJ.regRn[15] = sp + o;
  8595:   }  //irpLinkWord
  8596: 
  8597:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  8598:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  8599:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  8600:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  8601:   //UNLK Ar                                         |-|012346|-|-----|-----|          |0100_111_001_011_rrr
  8602:   //
  8603:   //UNLK Ar
  8604:   //  MOVEA.L Ar,A7;MOVEA.L (A7)+,Arと同じ
  8605:   //  UNLK A7はMOVEA.L A7,A7;MOVEA.L (A7)+,A7すなわちMOVEA.L (A7),A7と同じ
  8606:   //  ソースオペランドのポストインクリメントはデスティネーションオペランドが評価される前に完了しているとみなされる
  8607:   //    例えばMOVE.L (A0)+,(A0)+はMOVE.L (A0),(4,A0);ADDQ.L #8,A0と同じ
  8608:   //    MOVEA.L (A0)+,A0はポストインクリメントされたA0が(A0)から読み出された値で上書きされるのでMOVEA.L (A0),A0と同じ
  8609:   //  M68000PRMにUNLK Anの動作はAn→SP;(SP)→An;SP+4→SPだと書かれているがこれはn=7の場合に当てはまらない
  8610:   //  余談だが68040の初期のマスクセットはUNLK A7を実行すると固まるらしい
  8611:   public static void irpUnlk () throws M68kException {
  8612:     XEiJ.mpuCycleCount += 2;
  8613:     int arr = XEiJ.regOC - (0b0100_111_001_011_000 - 8);
  8614:     //評価順序に注意
  8615:     int sp = XEiJ.regRn[arr];
  8616:     //  UNLK ArはMOVEA.L Ar,A7;MOVEA.L (A7)+,Arと同じ
  8617:     //  (A7)+がページフォルトになってリトライするとき
  8618:     //    Arはまだ更新されておらず、リトライでMOVEA.L Ar,A7が再実行されるので、A7を巻き戻す必要はない
  8619:     M68kException.m6eIncremented += 4L << (7 << 3);  //UNLK A7でページフォルトが発生したときA7が増えすぎないようにする
  8620:     XEiJ.regRn[15] = sp + 4;
  8621:     XEiJ.regRn[arr] = mmuReadLongData (sp, XEiJ.regSRS);  //popls
  8622:   }  //irpUnlk
  8623: 
  8624:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  8625:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  8626:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  8627:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  8628:   //MOVE.L Ar,USP                                   |-|012346|P|-----|-----|          |0100_111_001_100_rrr
  8629:   public static void irpMoveToUsp () throws M68kException {
  8630:     if (XEiJ.regSRS == 0) {  //ユーザモードのとき
  8631:       M68kException.m6eNumber = M68kException.M6E_PRIVILEGE_VIOLATION;
  8632:       throw M68kException.m6eSignal;
  8633:     }
  8634:     //以下はスーパーバイザモード
  8635:     XEiJ.mpuCycleCount += 2;
  8636:     XEiJ.mpuUSP = XEiJ.regRn[XEiJ.regOC - (0b0100_111_001_100_000 - 8)];
  8637:   }  //irpMoveToUsp
  8638: 
  8639:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  8640:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  8641:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  8642:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  8643:   //MOVE.L USP,Ar                                   |-|012346|P|-----|-----|          |0100_111_001_101_rrr
  8644:   public static void irpMoveFromUsp () throws M68kException {
  8645:     if (XEiJ.regSRS == 0) {  //ユーザモードのとき
  8646:       M68kException.m6eNumber = M68kException.M6E_PRIVILEGE_VIOLATION;
  8647:       throw M68kException.m6eSignal;
  8648:     }
  8649:     //以下はスーパーバイザモード
  8650:     XEiJ.mpuCycleCount++;
  8651:     XEiJ.regRn[XEiJ.regOC - (0b0100_111_001_101_000 - 8)] = XEiJ.mpuUSP;
  8652:   }  //irpMoveFromUsp
  8653: 
  8654:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  8655:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  8656:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  8657:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  8658:   //RESET                                           |-|012346|P|-----|-----|          |0100_111_001_110_000
  8659:   public static void irpReset () throws M68kException {
  8660:     if (XEiJ.regSRS == 0) {  //ユーザモードのとき
  8661:       M68kException.m6eNumber = M68kException.M6E_PRIVILEGE_VIOLATION;
  8662:       throw M68kException.m6eSignal;
  8663:     }
  8664:     //以下はスーパーバイザモード
  8665:     XEiJ.mpuCycleCount += 45;
  8666:     XEiJ.irpReset ();
  8667:   }  //irpReset
  8668: 
  8669:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  8670:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  8671:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  8672:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  8673:   //NOP                                             |-|012346|-|-----|-----|          |0100_111_001_110_001
  8674:   public static void irpNop () throws M68kException {
  8675:     XEiJ.mpuCycleCount += 9;
  8676:     //何もしない
  8677:   }  //irpNop
  8678: 
  8679:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  8680:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  8681:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  8682:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  8683:   //STOP #<data>                                    |-|012346|P|UUUUU|*****|          |0100_111_001_110_010-{data}
  8684:   //
  8685:   //STOP #<data>
  8686:   //    1. #<data>をsrに設定する
  8687:   //    2. pcを進める
  8688:   //    3. 以下のいずれかの条件が成立するまで停止する
  8689:   //      3a. トレース
  8690:   //      3b. マスクされているレベルよりも高い割り込み要求
  8691:   //      3c. リセット
  8692:   //  コアと一緒にデバイスを止めるわけにいかないので、ここでは条件が成立するまで同じ命令を繰り返すループ命令として実装する
  8693:   public static void irpStop () throws M68kException {
  8694:     if (XEiJ.regSRS == 0) {  //ユーザモードのとき
  8695:       M68kException.m6eNumber = M68kException.M6E_PRIVILEGE_VIOLATION;
  8696:       throw M68kException.m6eSignal;
  8697:     }
  8698:     //以下はスーパーバイザモード
  8699:     XEiJ.mpuCycleCount++;
  8700:     irpSetSR (mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, 1));  //pcws。特権違反チェックが先
  8701:     if (XEiJ.mpuTraceFlag == 0) {  //トレースまたはマスクされているレベルよりも高い割り込み要求がない
  8702:       XEiJ.regPC = XEiJ.regPC0;  //ループ
  8703:       //任意の負荷率を100%に設定しているときSTOP命令が軽すぎると動作周波数が大きくなりすぎて割り込みがかかったとき次に進めなくなる
  8704:       //負荷率の計算にSTOP命令で止まっていた時間を含めないことにする
  8705:       XEiJ.mpuClockTime += XEiJ.TMR_FREQ * 4 / 1000000;  //4μs。50MHzのとき200clk
  8706:       XEiJ.mpuLastNano += 4000L;
  8707:     }
  8708:   }  //irpStop
  8709: 
  8710:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  8711:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  8712:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  8713:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  8714:   //RTE                                             |-|012346|P|UUUUU|*****|          |0100_111_001_110_011
  8715:   public static void irpRte () throws M68kException {
  8716:     if (XEiJ.regSRS == 0) {  //ユーザモードのとき
  8717:       M68kException.m6eNumber = M68kException.M6E_PRIVILEGE_VIOLATION;
  8718:       throw M68kException.m6eSignal;
  8719:     }
  8720:     //以下はスーパーバイザモード
  8721:     XEiJ.mpuCycleCount += 17;
  8722:     int sp = XEiJ.regRn[15];
  8723:     int newSR = mmuReadWordZeroData (sp, 1);  //popwz
  8724:     int newPC = mmuReadLongData (sp + 2, 1);  //popls
  8725:     int format = mmuReadWordZeroData (sp + 6, 1) >> 12;
  8726:     if (format == 0) {  //010,020,030,040,060
  8727:       XEiJ.regRn[15] = sp + 8;
  8728:     } else if (format == 2 ||  //020,030,040,060
  8729:                format == 3) {  //040,060
  8730:       XEiJ.regRn[15] = sp + 12;
  8731:     } else if (format == 4) {  //060
  8732:       XEiJ.regRn[15] = sp + 16;
  8733:     } else {
  8734:       M68kException.m6eNumber = M68kException.M6E_FORMAT_ERROR;
  8735:       throw M68kException.m6eSignal;
  8736:     }
  8737:     //irpSetSRでモードが切り替わる場合があるのでその前にr[15]を更新しておくこと
  8738:     irpSetSR (newSR);  //ここでユーザモードに戻る場合がある。特権違反チェックが先
  8739:     irpSetPC (newPC);  //分岐ログが新しいsrを使う。順序に注意。ここでアドレスエラーが発生する場合がある
  8740:   }  //irpRte
  8741: 
  8742:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  8743:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  8744:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  8745:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  8746:   //RTD #<data>                                     |-|-12346|-|-----|-----|          |0100_111_001_110_100-{data}
  8747:   public static void irpRtd () throws M68kException {
  8748:     XEiJ.mpuCycleCount += 7;
  8749:     int sp = XEiJ.regRn[15];
  8750:     int o = mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);  //pcws
  8751:     irpSetPC (mmuReadLongData (sp, XEiJ.regSRS));  //popls
  8752:     XEiJ.regRn[15] = sp + 4 + o;
  8753:   }  //irpRtd
  8754: 
  8755:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  8756:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  8757:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  8758:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  8759:   //RTS                                             |-|012346|-|-----|-----|          |0100_111_001_110_101
  8760:   public static void irpRts () throws M68kException {
  8761:     XEiJ.mpuCycleCount += 7;
  8762:     int sp = XEiJ.regRn[15];
  8763:     irpSetPC (mmuReadLongData (sp, XEiJ.regSRS));  //popls
  8764:     XEiJ.regRn[15] = sp + 4;
  8765:   }  //irpRts
  8766: 
  8767:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  8768:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  8769:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  8770:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  8771:   //TRAPV                                           |-|012346|-|---*-|-----|          |0100_111_001_110_110
  8772:   public static void irpTrapv () throws M68kException {
  8773:     if (XEiJ.TEST_BIT_1_SHIFT ? XEiJ.regCCR << 31 - 1 >= 0 : (XEiJ.regCCR & XEiJ.REG_CCR_V) == 0) {  //通過
  8774:       XEiJ.mpuCycleCount++;
  8775:     } else {
  8776:       M68kException.m6eAddress = XEiJ.regPC0;  //アドレスは命令の先頭
  8777:       M68kException.m6eNumber = M68kException.M6E_TRAPV_INSTRUCTION;
  8778:       throw M68kException.m6eSignal;
  8779:     }
  8780:   }  //irpTrapv
  8781: 
  8782:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  8783:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  8784:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  8785:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  8786:   //RTR                                             |-|012346|-|UUUUU|*****|          |0100_111_001_110_111
  8787:   public static void irpRtr () throws M68kException {
  8788:     XEiJ.mpuCycleCount += 8;
  8789:     int sp = XEiJ.regRn[15];
  8790:     int w = mmuReadWordZeroData (sp, XEiJ.regSRS);  //popwz
  8791:     irpSetPC (mmuReadLongData (sp + 2, XEiJ.regSRS));  //popls
  8792:     XEiJ.regCCR = XEiJ.REG_CCR_MASK & w;
  8793:     XEiJ.regRn[15] = sp + 6;
  8794:   }  //irpRtr
  8795: 
  8796:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  8797:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  8798:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  8799:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  8800:   //MOVEC.L Rc,Rn                                   |-|-12346|P|-----|-----|          |0100_111_001_111_010-rnnncccccccccccc
  8801:   public static void irpMovecFromControl () throws M68kException {
  8802:     if (XEiJ.regSRS == 0) {  //ユーザモードのとき
  8803:       M68kException.m6eNumber = M68kException.M6E_PRIVILEGE_VIOLATION;
  8804:       throw M68kException.m6eSignal;
  8805:     }
  8806:     //以下はスーパーバイザモード
  8807:     int w = mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, 1);  //pcwz。拡張ワード
  8808:     switch (w & 0x0fff) {
  8809:     case 0x000:  //SFC
  8810:       XEiJ.mpuCycleCount += 12;
  8811:       XEiJ.regRn[w >> 12] = XEiJ.mpuSFC;
  8812:       break;
  8813:     case 0x001:  //DFC
  8814:       XEiJ.mpuCycleCount += 12;
  8815:       XEiJ.regRn[w >> 12] = XEiJ.mpuDFC;
  8816:       break;
  8817:     case 0x002:  //CACR
  8818:       XEiJ.mpuCycleCount += 15;
  8819:       XEiJ.regRn[w >> 12] = XEiJ.mpuCACR & 0xf880e000;  //CABCとCUBCのリードは常に0
  8820:       break;
  8821:     case 0x003:  //TCR
  8822:       XEiJ.mpuCycleCount += 15;
  8823:       XEiJ.regRn[w >> 12] = mmuGetTCR ();
  8824:       break;
  8825:     case 0x004:  //ITT0
  8826:       XEiJ.mpuCycleCount += 15;
  8827:       XEiJ.regRn[w >> 12] = mmuGetITT0 ();
  8828:       break;
  8829:     case 0x005:  //ITT1
  8830:       XEiJ.mpuCycleCount += 15;
  8831:       XEiJ.regRn[w >> 12] = mmuGetITT1 ();
  8832:       break;
  8833:     case 0x006:  //DTT0
  8834:       XEiJ.mpuCycleCount += 15;
  8835:       XEiJ.regRn[w >> 12] = mmuGetDTT0 ();
  8836:       break;
  8837:     case 0x007:  //DTT1
  8838:       XEiJ.mpuCycleCount += 15;
  8839:       XEiJ.regRn[w >> 12] = mmuGetDTT1 ();
  8840:       break;
  8841:     case 0x008:  //BUSCR
  8842:       XEiJ.mpuCycleCount += 15;
  8843:       XEiJ.regRn[w >> 12] = XEiJ.mpuBUSCR;
  8844:       break;
  8845:     case 0x800:  //USP
  8846:       XEiJ.mpuCycleCount += 12;
  8847:       XEiJ.regRn[w >> 12] = XEiJ.mpuUSP;
  8848:       break;
  8849:     case 0x801:  //VBR
  8850:       XEiJ.mpuCycleCount += 12;
  8851:       XEiJ.regRn[w >> 12] = XEiJ.mpuVBR;
  8852:       break;
  8853:     case 0x806:  //URP
  8854:       XEiJ.mpuCycleCount += 15;
  8855:       XEiJ.regRn[w >> 12] = mmuGetURP ();;
  8856:       break;
  8857:     case 0x807:  //SRP
  8858:       XEiJ.mpuCycleCount += 15;
  8859:       XEiJ.regRn[w >> 12] = mmuGetSRP ();;
  8860:       break;
  8861:     case 0x808:  //PCR
  8862:       XEiJ.mpuCycleCount += 12;
  8863:       XEiJ.regRn[w >> 12] = XEiJ.mpuPCR;
  8864:       break;
  8865:     default:
  8866:       M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION;
  8867:       throw M68kException.m6eSignal;
  8868:     }
  8869:   }  //irpMovecFromControl
  8870: 
  8871:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  8872:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  8873:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  8874:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  8875:   //MOVEC.L Rn,Rc                                   |-|-12346|P|-----|-----|          |0100_111_001_111_011-rnnncccccccccccc
  8876:   public static void irpMovecToControl () throws M68kException {
  8877:     if (XEiJ.regSRS == 0) {  //ユーザモードのとき
  8878:       M68kException.m6eNumber = M68kException.M6E_PRIVILEGE_VIOLATION;
  8879:       throw M68kException.m6eSignal;
  8880:     }
  8881:     //以下はスーパーバイザモード
  8882:     int w = mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, 1);  //pcwz。拡張ワード
  8883:     int d = XEiJ.regRn[w >> 12];
  8884:     switch (w & 0x0fff) {
  8885:     case 0x000:  //SFC
  8886:       XEiJ.mpuCycleCount += 11;
  8887:       XEiJ.mpuSFC = d & 0x00000007;
  8888:       break;
  8889:     case 0x001:  //DFC
  8890:       XEiJ.mpuCycleCount += 11;
  8891:       XEiJ.mpuDFC = d & 0x00000007;
  8892:       break;
  8893:     case 0x002:  //CACR
  8894:       //  CACR
  8895:       //   31  30  29  28  27 26 25 24   23   22   21 20 19 18 17 16   15  14  13 12 11 10 9 8  7 6 5 4 3 2 1 0
  8896:       //  EDC NAD ESB DPI FOC  0  0  0  EBC CABC CUBC  0  0  0  0  0  EIC NAI FIC  0  0  0 0 0  0 0 0 0 0 0 0 0
  8897:       //    bit31  EDC   Enable Data Cache
  8898:       //                 データキャッシュ有効
  8899:       //                 4ウェイセットアソシアティブ。16バイト/ライン*128ライン/セット*4セット=8KB
  8900:       //    bit30  NAD   No Allocate Mode (Data Cache)
  8901:       //                 データキャッシュでミスしても新しいキャッシュラインをアロケートしない
  8902:       //    bit29  ESB   Enable Store Buffer
  8903:       //                 ストアバッファ有効
  8904:       //                 ライトスルーおよびキャッシュ禁止インプリサイスのページの書き込みを4エントリ(16バイト)のFIFOバッファで遅延させる
  8905:       //                 例えば4の倍数のアドレスから始まる4バイトに連続して書き込むと1回のロングの書き込みにまとめられる
  8906:       //    bit28  DPI   Disable CPUSH Invalidation
  8907:       //                 CPUSHでプッシュされたキャッシュラインを無効化しない
  8908:       //    bit27  FOC   1/2 Cache Operation Mode Enable (Data Cache)
  8909:       //                 データキャッシュを1/2キャッシュモードにする
  8910:       //    bit23  EBC   Enable Branch Cache
  8911:       //                 分岐キャッシュ有効
  8912:       //                 256エントリの分岐キャッシュを用いて分岐予測を行う
  8913:       //                 正しく予測された分岐は前後の命令に隠れて実質0サイクルで実行される
  8914:       //                   MC68060は最大3個の命令(1個の分岐命令と2個の整数命令)を1サイクルで実行できる
  8915:       //                   MC68000(10MHz)とMC68060(50MHz)の処理速度の比は局所的に100倍を超えることがある
  8916:       //    bit22  CABC  Clear All Entries in the Branch Cache
  8917:       //                 分岐キャッシュのすべてのエントリをクリアする
  8918:       //                 分岐命令以外の場所で分岐キャッシュがヒットしてしまったときに発生する分岐予測エラーから復帰するときに使う
  8919:       //                 CABCはライトオンリーでリードは常に0
  8920:       //    bit21  CUBC  Clear All User Entries in the Branch Cache
  8921:       //                 分岐キャッシュのすべてのユーザエントリをクリアする
  8922:       //                 CUBCはライトオンリーでリードは常に0
  8923:       //    bit15  EIC   Enable Instruction Cache
  8924:       //                 命令キャッシュ有効
  8925:       //                 4ウェイセットアソシアティブ。16バイト/ライン*128ライン/セット*4セット=8KB
  8926:       //    bit14  NAI   No Allocate Mode (Instruction Cache)
  8927:       //                 命令キャッシュでミスしても新しいキャッシュラインをアロケートしない
  8928:       //    bit13  FIC   1/2 Cache Operation Mode Enable (Instruction Cache)
  8929:       //                 命令キャッシュを1/2キャッシュモードにする
  8930:       //! 非対応
  8931:       XEiJ.mpuCycleCount += 14;
  8932:       XEiJ.mpuCACR = d & 0xf8e0e000;  //CABCとCUBCは保存しておいてリードするときにマスクする
  8933:       {
  8934:         boolean cacheOn = (XEiJ.mpuCACR & 0x80008000) != 0;
  8935:         if (XEiJ.mpuCacheOn != cacheOn) {
  8936:           XEiJ.mpuCacheOn = cacheOn;
  8937:           XEiJ.mpuSetWait ();
  8938:         }
  8939:       }
  8940:       break;
  8941:     case 0x003:  //TCR
  8942:       //  TCR
  8943:       //  31 30 29 28 27 26 25 24  23 22 21 20 19 18 17 16  15 14  13  12   11   10 9 8  7 6   5 4 3 2 1 0
  8944:       //   0  0  0  0  0  0  0  0   0  0  0  0  0  0  0  0   E  P NAD NAI FOTC FITC DCO  DUO DWO DCI DUI 0
  8945:       //  bit15   E     Enable
  8946:       //  bit14   P     Page Size
  8947:       //  bit13   NAD   No Allocate Mode (Data ATC)
  8948:       //  bit12   NAI   No Allocate Mode (Instruction ATC)
  8949:       //  bit11   FOTC  1/2-Cache Mode (Data ATC)
  8950:       //  bit10   FITC  1/2-Cache Mode (Instruction ATC)
  8951:       //  bit9-8  DCO   Default Cache Mode (Data Cache)
  8952:       //  bit7-6  DUO   Default UPA bits (Data Cache)
  8953:       //  bit5    DWO   Default Write Protect (Data Cache)
  8954:       //  bit4-3  DCI   Default Cache Mode (Instruction Cache)
  8955:       //  bit2-1  DUI   Default UPA bits (Instruction Cache)
  8956:       //MMUを参照
  8957:       XEiJ.mpuCycleCount += 14;
  8958:       mmuSetTCR (d);
  8959:       break;
  8960:     case 0x004:  //ITT0
  8961:       XEiJ.mpuCycleCount += 14;
  8962:       mmuSetITT0 (d);
  8963:       break;
  8964:     case 0x005:  //ITT1
  8965:       XEiJ.mpuCycleCount += 14;
  8966:       mmuSetITT1 (d);
  8967:       break;
  8968:     case 0x006:  //DTT0
  8969:       XEiJ.mpuCycleCount += 14;
  8970:       mmuSetDTT0 (d);
  8971:       break;
  8972:     case 0x007:  //DTT1
  8973:       XEiJ.mpuCycleCount += 14;
  8974:       mmuSetDTT1 (d);
  8975:       break;
  8976:     case 0x008:  //BUSCR
  8977:       XEiJ.mpuCycleCount += 14;
  8978:       XEiJ.mpuBUSCR = d & 0xf0000000;
  8979:       break;
  8980:     case 0x800:  //USP
  8981:       XEiJ.mpuCycleCount += 11;
  8982:       XEiJ.mpuUSP = d;
  8983:       break;
  8984:     case 0x801:  //VBR
  8985:       XEiJ.mpuCycleCount += 11;
  8986:       XEiJ.mpuVBR = d & -4;  //4の倍数でないと困る
  8987:       break;
  8988:     case 0x806:  //URP
  8989:       XEiJ.mpuCycleCount += 14;
  8990:       mmuSetURP (d);
  8991:       break;
  8992:     case 0x807:  //SRP
  8993:       XEiJ.mpuCycleCount += 14;
  8994:       mmuSetSRP (d);
  8995:       break;
  8996:     case 0x808:  //PCR
  8997:       //  PCR
  8998:       //  31 30 29 28 27 26 25 24  23 22 21 20 19 18 17 16  15 14 13 12 11 10 9 8       7 6 5 4 3 2   1   0
  8999:       //   0  0  0  0  0  1  0  0   0  0  1  1  0  0  0  0     Revision Number     EDEBUG  Reserved DFP ESS
  9000:       //  bit31-16  Identification   0x0430
  9001:       //  bit15-8   Revision Number  1=F43G,5=G65V,6=E41J。偽物もあるらしい
  9002:       //  bit7      EDEBUG           Enable Debug Features
  9003:       //  bit6-2    Reserved
  9004:       //  bit1      DFP              Disable Floating-Point Unit。浮動小数点ユニット無効
  9005:       //  bit0      ESS              Enable Superscalar Dispatch。スーパースカラ有効
  9006:       XEiJ.mpuCycleCount += 11;
  9007:       XEiJ.mpuPCR = 0x04300000 | XEiJ.MPU_060_REV << 8 | d & 0x00000083;
  9008:       break;
  9009:     default:
  9010:       M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION;
  9011:       throw M68kException.m6eSignal;
  9012:     }
  9013:   }  //irpMovecToControl
  9014: 
  9015:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  9016:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  9017:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  9018:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  9019:   //JSR <ea>                                        |-|012346|-|-----|-----|  M  WXZP |0100_111_010_mmm_rrr
  9020:   //JBSR.L <label>                                  |A|012346|-|-----|-----|          |0100_111_010_111_001-{address}       [JSR <label>]
  9021:   public static void irpJsr () throws M68kException {
  9022:     XEiJ.mpuCycleCount++;
  9023:     //評価順序に注意。実効アドレスを求めてからspをデクリメントすること
  9024:     int a = efaJmpJsr (XEiJ.regOC & 63);
  9025:     M68kException.m6eIncremented -= 4L << (7 << 3);
  9026:     mmuWriteLongData (XEiJ.regRn[15] -= 4, XEiJ.regPC, XEiJ.regSRS);  //pushl
  9027:     irpSetPC (a);
  9028:   }  //irpJsr
  9029: 
  9030:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  9031:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  9032:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  9033:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  9034:   //JMP <ea>                                        |-|012346|-|-----|-----|  M  WXZP |0100_111_011_mmm_rrr
  9035:   //JBRA.L <label>                                  |A|012346|-|-----|-----|          |0100_111_011_111_001-{address}       [JMP <label>]
  9036:   public static void irpJmp () throws M68kException {
  9037:     XEiJ.mpuCycleCount++;  //0clkにしない
  9038:     irpSetPC (efaJmpJsr (XEiJ.regOC & 63));
  9039:   }  //irpJmp
  9040: 
  9041:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  9042:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  9043:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  9044:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  9045:   //ADDQ.B #<data>,<ea>                             |-|012346|-|UUUUU|*****|D M+-WXZ  |0101_qqq_000_mmm_rrr
  9046:   //INC.B <ea>                                      |A|012346|-|UUUUU|*****|D M+-WXZ  |0101_001_000_mmm_rrr [ADDQ.B #1,<ea>]
  9047:   public static void irpAddqByte () throws M68kException {
  9048:     int ea = XEiJ.regOC & 63;
  9049:     int x;
  9050:     int y = ((XEiJ.regOC >> 9) - 1 & 7) + 1;  //qqq==0?8:qqq
  9051:     int z;
  9052:     if (ea < XEiJ.EA_AR) {  //ADDQ.B #<data>,Dr
  9053:       XEiJ.mpuCycleCount++;
  9054:       z = (byte) (XEiJ.regRn[ea] = ~0xff & (x = XEiJ.regRn[ea]) | 0xff & (x = (byte) x) + y);
  9055:     } else {  //ADDQ.B #<data>,<mem>
  9056:       XEiJ.mpuCycleCount++;
  9057:       int a = efaMltByte (ea);
  9058:       mmuWriteByteData (a, z = (byte) ((x = mmuModifyByteSignData (a, XEiJ.regSRS)) + y), XEiJ.regSRS);
  9059:     }
  9060:     XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) |
  9061:            (~x & z) >>> 31 << 1 |
  9062:            (x & ~z) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C));  //ccr_addq
  9063:   }  //irpAddqByte
  9064: 
  9065:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  9066:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  9067:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  9068:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  9069:   //ADDQ.W #<data>,<ea>                             |-|012346|-|UUUUU|*****|D M+-WXZ  |0101_qqq_001_mmm_rrr
  9070:   //ADDQ.W #<data>,Ar                               |-|012346|-|-----|-----| A        |0101_qqq_001_001_rrr
  9071:   //INC.W <ea>                                      |A|012346|-|UUUUU|*****|D M+-WXZ  |0101_001_001_mmm_rrr [ADDQ.W #1,<ea>]
  9072:   //INC.W Ar                                        |A|012346|-|-----|-----| A        |0101_001_001_001_rrr [ADDQ.W #1,Ar]
  9073:   //
  9074:   //ADDQ.W #<data>,Ar
  9075:   //  ソースを符号拡張してロングで加算する
  9076:   public static void irpAddqWord () throws M68kException {
  9077:     int ea = XEiJ.regOC & 63;
  9078:     int y = ((XEiJ.regOC >> 9) - 1 & 7) + 1;  //qqq==0?8:qqq
  9079:     if (ea >> 3 == XEiJ.MMM_AR) {  //ADDQ.W #<data>,Ar
  9080:       XEiJ.mpuCycleCount++;
  9081:       XEiJ.regRn[ea] += y;  //ロングで計算する。このr[ea]はアドレスレジスタ
  9082:       //ccrは操作しない
  9083:     } else {
  9084:       int x;
  9085:       int z;
  9086:       if (ea < XEiJ.EA_AR) {  //ADDQ.W #<data>,Dr
  9087:         XEiJ.mpuCycleCount++;
  9088:         z = (short) (XEiJ.regRn[ea] = ~0xffff & (x = XEiJ.regRn[ea]) | (char) ((x = (short) x) + y));
  9089:       } else {  //ADDQ.W #<data>,<mem>
  9090:         XEiJ.mpuCycleCount++;
  9091:         int a = efaMltWord (ea);
  9092:         mmuWriteWordData (a, z = (short) ((x = mmuModifyWordSignData (a, XEiJ.regSRS)) + y), XEiJ.regSRS);
  9093:       }
  9094:       XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) |
  9095:              (~x & z) >>> 31 << 1 |
  9096:              (x & ~z) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C));  //ccr_addq
  9097:     }
  9098:   }  //irpAddqWord
  9099: 
  9100:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  9101:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  9102:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  9103:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  9104:   //ADDQ.L #<data>,<ea>                             |-|012346|-|UUUUU|*****|D M+-WXZ  |0101_qqq_010_mmm_rrr
  9105:   //ADDQ.L #<data>,Ar                               |-|012346|-|-----|-----| A        |0101_qqq_010_001_rrr
  9106:   //INC.L <ea>                                      |A|012346|-|UUUUU|*****|D M+-WXZ  |0101_001_010_mmm_rrr [ADDQ.L #1,<ea>]
  9107:   //INC.L Ar                                        |A|012346|-|-----|-----| A        |0101_001_010_001_rrr [ADDQ.L #1,Ar]
  9108:   public static void irpAddqLong () throws M68kException {
  9109:     int ea = XEiJ.regOC & 63;
  9110:     int y = ((XEiJ.regOC >> 9) - 1 & 7) + 1;  //qqq==0?8:qqq
  9111:     if (ea >> 3 == XEiJ.MMM_AR) {  //ADDQ.L #<data>,Ar
  9112:       XEiJ.mpuCycleCount++;
  9113:       XEiJ.regRn[ea] += y;  //このr[ea]はアドレスレジスタ
  9114:       //ccrは操作しない
  9115:     } else {
  9116:       int x;
  9117:       int z;
  9118:       if (ea < XEiJ.EA_AR) {  //ADDQ.L #<data>,Dr
  9119:         XEiJ.mpuCycleCount++;
  9120:         XEiJ.regRn[ea] = z = (x = XEiJ.regRn[ea]) + y;
  9121:       } else {  //ADDQ.L #<data>,<mem>
  9122:         XEiJ.mpuCycleCount++;
  9123:         int a = efaMltLong (ea);
  9124:         mmuWriteLongData (a, z = (x = mmuModifyLongData (a, XEiJ.regSRS)) + y, XEiJ.regSRS);
  9125:       }
  9126:       XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) |
  9127:              (~x & z) >>> 31 << 1 |
  9128:              (x & ~z) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C));  //ccr_addq
  9129:     }
  9130:   }  //irpAddqLong
  9131: 
  9132:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  9133:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  9134:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  9135:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  9136:   //ST.B <ea>                                       |-|012346|-|-----|-----|D M+-WXZ  |0101_000_011_mmm_rrr
  9137:   //SNF.B <ea>                                      |A|012346|-|-----|-----|D M+-WXZ  |0101_000_011_mmm_rrr [ST.B <ea>]
  9138:   //DBT.W Dr,<label>                                |-|012346|-|-----|-----|          |0101_000_011_001_rrr-{offset}
  9139:   //DBNF.W Dr,<label>                               |A|012346|-|-----|-----|          |0101_000_011_001_rrr-{offset}        [DBT.W Dr,<label>]
  9140:   //TRAPT.W #<data>                                 |-|--2346|-|-----|-----|          |0101_000_011_111_010-{data}
  9141:   //TPNF.W #<data>                                  |A|--2346|-|-----|-----|          |0101_000_011_111_010-{data}  [TRAPT.W #<data>]
  9142:   //TPT.W #<data>                                   |A|--2346|-|-----|-----|          |0101_000_011_111_010-{data}  [TRAPT.W #<data>]
  9143:   //TRAPNF.W #<data>                                |A|--2346|-|-----|-----|          |0101_000_011_111_010-{data}  [TRAPT.W #<data>]
  9144:   //TRAPT.L #<data>                                 |-|--2346|-|-----|-----|          |0101_000_011_111_011-{data}
  9145:   //TPNF.L #<data>                                  |A|--2346|-|-----|-----|          |0101_000_011_111_011-{data}  [TRAPT.L #<data>]
  9146:   //TPT.L #<data>                                   |A|--2346|-|-----|-----|          |0101_000_011_111_011-{data}  [TRAPT.L #<data>]
  9147:   //TRAPNF.L #<data>                                |A|--2346|-|-----|-----|          |0101_000_011_111_011-{data}  [TRAPT.L #<data>]
  9148:   //TRAPT                                           |-|--2346|-|-----|-----|          |0101_000_011_111_100
  9149:   //TPNF                                            |A|--2346|-|-----|-----|          |0101_000_011_111_100 [TRAPT]
  9150:   //TPT                                             |A|--2346|-|-----|-----|          |0101_000_011_111_100 [TRAPT]
  9151:   //TRAPNF                                          |A|--2346|-|-----|-----|          |0101_000_011_111_100 [TRAPT]
  9152:   public static void irpSt () throws M68kException {
  9153:     int ea = XEiJ.regOC & 63;
  9154:     //DBT.W Dr,<label>よりもST.B Drを優先する
  9155:     if (ea < XEiJ.EA_AR) {  //ST.B Dr
  9156:       XEiJ.mpuCycleCount++;
  9157:       XEiJ.regRn[ea] |= 0xff;
  9158:     } else if (ea < XEiJ.EA_MM) {  //DBT.W Dr,<label>
  9159:       int t = XEiJ.regPC;  //pc0+2
  9160:       XEiJ.regPC = t + 2;  //pc0+4
  9161:       t += mmuReadWordSignExword (t, XEiJ.regSRS);  //pc0+2+16bitディスプレースメント
  9162:       if ((t & 1) != 0) {  //分岐先のアドレスが奇数
  9163:         //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ
  9164:         irpBccAddressError (t);
  9165:       }
  9166:       //条件が成立しているので通過
  9167:       XEiJ.mpuCycleCount += 2;
  9168:     } else if ((XEiJ.EAM_PW | XEiJ.EAM_PX | XEiJ.EAM_IM) << ea < 0L) {  //TRAPT.W/TRAPT.L/TRAPT
  9169:       XEiJ.regPC += (ea & 3) + (ea & 1);  //111_010→2,111_011→4,111_100→0
  9170:       //条件が成立しているのでTRAPする
  9171:       M68kException.m6eAddress = XEiJ.regPC0;  //アドレスは命令の先頭
  9172:       M68kException.m6eNumber = M68kException.M6E_TRAPV_INSTRUCTION;
  9173:       throw M68kException.m6eSignal;
  9174:     } else {  //ST.B <mem>
  9175:       XEiJ.mpuCycleCount++;
  9176:       mmuWriteByteData (efaMltByte (ea), 0xff, XEiJ.regSRS);
  9177:     }
  9178:   }  //irpSt
  9179: 
  9180:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  9181:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  9182:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  9183:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  9184:   //SUBQ.B #<data>,<ea>                             |-|012346|-|UUUUU|*****|D M+-WXZ  |0101_qqq_100_mmm_rrr
  9185:   //DEC.B <ea>                                      |A|012346|-|UUUUU|*****|D M+-WXZ  |0101_001_100_mmm_rrr [SUBQ.B #1,<ea>]
  9186:   public static void irpSubqByte () throws M68kException {
  9187:     int ea = XEiJ.regOC & 63;
  9188:     int x;
  9189:     int y = ((XEiJ.regOC >> 9) - 1 & 7) + 1;  //qqq==0?8:qqq
  9190:     int z;
  9191:     if (ea < XEiJ.EA_AR) {  //SUBQ.B #<data>,Dr
  9192:       XEiJ.mpuCycleCount++;
  9193:       z = (byte) (XEiJ.regRn[ea] = ~0xff & (x = XEiJ.regRn[ea]) | 0xff & (x = (byte) x) - y);
  9194:     } else {  //SUBQ.B #<data>,<mem>
  9195:       XEiJ.mpuCycleCount++;
  9196:       int a = efaMltByte (ea);
  9197:       mmuWriteByteData (a, z = (byte) ((x = mmuModifyByteSignData (a, XEiJ.regSRS)) - y), XEiJ.regSRS);
  9198:     }
  9199:     XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) |
  9200:            (x & ~z) >>> 31 << 1 |
  9201:            (~x & z) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C));  //ccr_subq
  9202:   }  //irpSubqByte
  9203: 
  9204:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  9205:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  9206:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  9207:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  9208:   //SUBQ.W #<data>,<ea>                             |-|012346|-|UUUUU|*****|D M+-WXZ  |0101_qqq_101_mmm_rrr
  9209:   //SUBQ.W #<data>,Ar                               |-|012346|-|-----|-----| A        |0101_qqq_101_001_rrr
  9210:   //DEC.W <ea>                                      |A|012346|-|UUUUU|*****|D M+-WXZ  |0101_001_101_mmm_rrr [SUBQ.W #1,<ea>]
  9211:   //DEC.W Ar                                        |A|012346|-|-----|-----| A        |0101_001_101_001_rrr [SUBQ.W #1,Ar]
  9212:   //
  9213:   //SUBQ.W #<data>,Ar
  9214:   //  ソースを符号拡張してロングで減算する
  9215:   public static void irpSubqWord () throws M68kException {
  9216:     int ea = XEiJ.regOC & 63;
  9217:     int y = ((XEiJ.regOC >> 9) - 1 & 7) + 1;  //qqq==0?8:qqq
  9218:     if (ea >> 3 == XEiJ.MMM_AR) {  //SUBQ.W #<data>,Ar
  9219:       XEiJ.mpuCycleCount++;
  9220:       XEiJ.regRn[ea] -= y;  //ロングで計算する。このr[ea]はアドレスレジスタ
  9221:       //ccrは操作しない
  9222:     } else {
  9223:       int x;
  9224:       int z;
  9225:       if (ea < XEiJ.EA_AR) {  //SUBQ.W #<data>,Dr
  9226:         XEiJ.mpuCycleCount++;
  9227:         z = (short) (XEiJ.regRn[ea] = ~0xffff & (x = XEiJ.regRn[ea]) | (char) ((x = (short) x) - y));
  9228:       } else {  //SUBQ.W #<data>,<mem>
  9229:         XEiJ.mpuCycleCount++;
  9230:         int a = efaMltWord (ea);
  9231:         mmuWriteWordData (a, z = (short) ((x = mmuModifyWordSignData (a, XEiJ.regSRS)) - y), XEiJ.regSRS);
  9232:       }
  9233:       XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) |
  9234:              (x & ~z) >>> 31 << 1 |
  9235:              (~x & z) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C));  //ccr_subq
  9236:     }
  9237:   }  //irpSubqWord
  9238: 
  9239:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  9240:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  9241:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  9242:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  9243:   //SUBQ.L #<data>,<ea>                             |-|012346|-|UUUUU|*****|D M+-WXZ  |0101_qqq_110_mmm_rrr
  9244:   //SUBQ.L #<data>,Ar                               |-|012346|-|-----|-----| A        |0101_qqq_110_001_rrr
  9245:   //DEC.L <ea>                                      |A|012346|-|UUUUU|*****|D M+-WXZ  |0101_001_110_mmm_rrr [SUBQ.L #1,<ea>]
  9246:   //DEC.L Ar                                        |A|012346|-|-----|-----| A        |0101_001_110_001_rrr [SUBQ.L #1,Ar]
  9247:   public static void irpSubqLong () throws M68kException {
  9248:     int ea = XEiJ.regOC & 63;
  9249:     int y = ((XEiJ.regOC >> 9) - 1 & 7) + 1;  //qqq==0?8:qqq
  9250:     if (ea >> 3 == XEiJ.MMM_AR) {  //SUBQ.L #<data>,Ar
  9251:       XEiJ.mpuCycleCount++;
  9252:       XEiJ.regRn[ea] -= y;  //このr[ea]はアドレスレジスタ
  9253:       //ccrは操作しない
  9254:     } else {
  9255:       int x;
  9256:       int z;
  9257:       if (ea < XEiJ.EA_AR) {  //SUBQ.L #<data>,Dr
  9258:         XEiJ.mpuCycleCount++;
  9259:         XEiJ.regRn[ea] = z = (x = XEiJ.regRn[ea]) - y;
  9260:       } else {  //SUBQ.L #<data>,<mem>
  9261:         XEiJ.mpuCycleCount++;
  9262:         int a = efaMltLong (ea);
  9263:         mmuWriteLongData (a, z = (x = mmuModifyLongData (a, XEiJ.regSRS)) - y, XEiJ.regSRS);
  9264:       }
  9265:       XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) |
  9266:              (x & ~z) >>> 31 << 1 |
  9267:              (~x & z) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C));  //ccr_subq
  9268:     }
  9269:   }  //irpSubqLong
  9270: 
  9271:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  9272:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  9273:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  9274:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  9275:   //SF.B <ea>                                       |-|012346|-|-----|-----|D M+-WXZ  |0101_000_111_mmm_rrr
  9276:   //SNT.B <ea>                                      |A|012346|-|-----|-----|D M+-WXZ  |0101_000_111_mmm_rrr [SF.B <ea>]
  9277:   //DBF.W Dr,<label>                                |-|012346|-|-----|-----|          |0101_000_111_001_rrr-{offset}
  9278:   //DBNT.W Dr,<label>                               |A|012346|-|-----|-----|          |0101_000_111_001_rrr-{offset}        [DBF.W Dr,<label>]
  9279:   //DBRA.W Dr,<label>                               |A|012346|-|-----|-----|          |0101_000_111_001_rrr-{offset}        [DBF.W Dr,<label>]
  9280:   //TRAPF.W #<data>                                 |-|--2346|-|-----|-----|          |0101_000_111_111_010-{data}
  9281:   //TPF.W #<data>                                   |A|--2346|-|-----|-----|          |0101_000_111_111_010-{data}  [TRAPF.W #<data>]
  9282:   //TPNT.W #<data>                                  |A|--2346|-|-----|-----|          |0101_000_111_111_010-{data}  [TRAPF.W #<data>]
  9283:   //TRAPNT.W #<data>                                |A|--2346|-|-----|-----|          |0101_000_111_111_010-{data}  [TRAPF.W #<data>]
  9284:   //TRAPF.L #<data>                                 |-|--2346|-|-----|-----|          |0101_000_111_111_011-{data}
  9285:   //TPF.L #<data>                                   |A|--2346|-|-----|-----|          |0101_000_111_111_011-{data}  [TRAPF.L #<data>]
  9286:   //TPNT.L #<data>                                  |A|--2346|-|-----|-----|          |0101_000_111_111_011-{data}  [TRAPF.L #<data>]
  9287:   //TRAPNT.L #<data>                                |A|--2346|-|-----|-----|          |0101_000_111_111_011-{data}  [TRAPF.L #<data>]
  9288:   //TRAPF                                           |-|--2346|-|-----|-----|          |0101_000_111_111_100
  9289:   //TPF                                             |A|--2346|-|-----|-----|          |0101_000_111_111_100 [TRAPF]
  9290:   //TPNT                                            |A|--2346|-|-----|-----|          |0101_000_111_111_100 [TRAPF]
  9291:   //TRAPNT                                          |A|--2346|-|-----|-----|          |0101_000_111_111_100 [TRAPF]
  9292:   public static void irpSf () throws M68kException {
  9293:     int ea = XEiJ.regOC & 63;
  9294:     //DBRA.W Dr,<label>よりもSF.B Drを優先する
  9295:     if (ea < XEiJ.EA_AR) {  //SF.B Dr
  9296:       XEiJ.mpuCycleCount++;
  9297:       XEiJ.regRn[ea] &= ~0xff;
  9298:     } else if (ea < XEiJ.EA_MM) {  //DBRA.W Dr,<label>
  9299:       int t = XEiJ.regPC;  //pc0+2
  9300:       XEiJ.regPC = t + 2;  //pc0+4
  9301:       t += mmuReadWordSignExword (t, XEiJ.regSRS);  //pc0+2+16bitディスプレースメント
  9302:       if ((t & 1) != 0) {  //分岐先のアドレスが奇数
  9303:         //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ
  9304:         irpBccAddressError (t);
  9305:       }
  9306:       //条件が成立していないのでデクリメント
  9307:       int rrr = XEiJ.regOC & 7;
  9308:       int s = XEiJ.regRn[rrr];
  9309:       if ((short) s == 0) {  //Drの下位16bitが0なので通過
  9310:         XEiJ.mpuCycleCount += 2;
  9311:         XEiJ.regRn[rrr] = s + 65535;
  9312:       } else {  //Drの下位16bitが0でないので分岐
  9313:         XEiJ.mpuCycleCount++;
  9314:         XEiJ.regRn[rrr] = s - 1;  //下位16bitが0でないので上位16bitは変化しない
  9315:         irpSetPC (t);
  9316:       }
  9317:     } else if ((XEiJ.EAM_PW | XEiJ.EAM_PX | XEiJ.EAM_IM) << ea < 0L) {  //TRAPF.W/TRAPF.L/TRAPF
  9318:       XEiJ.regPC += (ea & 3) + (ea & 1);  //111_010→2,111_011→4,111_100→0
  9319:       //条件が成立していないのでTRAPしない
  9320:       XEiJ.mpuCycleCount++;
  9321:     } else {  //SF.B <mem>
  9322:       XEiJ.mpuCycleCount++;
  9323:       mmuWriteByteData (efaMltByte (ea), 0x00, XEiJ.regSRS);
  9324:     }
  9325:   }  //irpSf
  9326: 
  9327:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  9328:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  9329:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  9330:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  9331:   //SHI.B <ea>                                      |-|012346|-|--*-*|-----|D M+-WXZ  |0101_001_011_mmm_rrr
  9332:   //SNLS.B <ea>                                     |A|012346|-|--*-*|-----|D M+-WXZ  |0101_001_011_mmm_rrr [SHI.B <ea>]
  9333:   //DBHI.W Dr,<label>                               |-|012346|-|--*-*|-----|          |0101_001_011_001_rrr-{offset}
  9334:   //DBNLS.W Dr,<label>                              |A|012346|-|--*-*|-----|          |0101_001_011_001_rrr-{offset}        [DBHI.W Dr,<label>]
  9335:   //TRAPHI.W #<data>                                |-|--2346|-|--*-*|-----|          |0101_001_011_111_010-{data}
  9336:   //TPHI.W #<data>                                  |A|--2346|-|--*-*|-----|          |0101_001_011_111_010-{data}  [TRAPHI.W #<data>]
  9337:   //TPNLS.W #<data>                                 |A|--2346|-|--*-*|-----|          |0101_001_011_111_010-{data}  [TRAPHI.W #<data>]
  9338:   //TRAPNLS.W #<data>                               |A|--2346|-|--*-*|-----|          |0101_001_011_111_010-{data}  [TRAPHI.W #<data>]
  9339:   //TRAPHI.L #<data>                                |-|--2346|-|--*-*|-----|          |0101_001_011_111_011-{data}
  9340:   //TPHI.L #<data>                                  |A|--2346|-|--*-*|-----|          |0101_001_011_111_011-{data}  [TRAPHI.L #<data>]
  9341:   //TPNLS.L #<data>                                 |A|--2346|-|--*-*|-----|          |0101_001_011_111_011-{data}  [TRAPHI.L #<data>]
  9342:   //TRAPNLS.L #<data>                               |A|--2346|-|--*-*|-----|          |0101_001_011_111_011-{data}  [TRAPHI.L #<data>]
  9343:   //TRAPHI                                          |-|--2346|-|--*-*|-----|          |0101_001_011_111_100
  9344:   //TPHI                                            |A|--2346|-|--*-*|-----|          |0101_001_011_111_100 [TRAPHI]
  9345:   //TPNLS                                           |A|--2346|-|--*-*|-----|          |0101_001_011_111_100 [TRAPHI]
  9346:   //TRAPNLS                                         |A|--2346|-|--*-*|-----|          |0101_001_011_111_100 [TRAPHI]
  9347:   public static void irpShi () throws M68kException {
  9348:     int ea = XEiJ.regOC & 63;
  9349:     if (ea >> 3 == XEiJ.MMM_AR) {  //DBHI.W Dr,<label>
  9350:       int t = XEiJ.regPC;  //pc0+2
  9351:       XEiJ.regPC = t + 2;  //pc0+4
  9352:       t += mmuReadWordSignExword (t, XEiJ.regSRS);  //pc0+2+16bitディスプレースメント
  9353:       if ((t & 1) != 0) {  //分岐先のアドレスが奇数
  9354:         //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ
  9355:         irpBccAddressError (t);
  9356:       }
  9357:       if (XEiJ.MPU_CC_HI << XEiJ.regCCR < 0) {  //条件が成立しているので通過
  9358:         XEiJ.mpuCycleCount += 2;
  9359:       } else {  //条件が成立していないのでデクリメント
  9360:         int rrr = XEiJ.regOC & 7;
  9361:         int s = XEiJ.regRn[rrr];
  9362:         if ((short) s == 0) {  //Drの下位16bitが0なので通過
  9363:           XEiJ.mpuCycleCount += 2;
  9364:           XEiJ.regRn[rrr] = s + 65535;
  9365:         } else {  //Drの下位16bitが0でないので分岐
  9366:           XEiJ.mpuCycleCount++;
  9367:           XEiJ.regRn[rrr] = s - 1;  //下位16bitが0でないので上位16bitは変化しない
  9368:           irpSetPC (t);
  9369:         }
  9370:       }
  9371:     } else if (ea < XEiJ.EA_AR) {  //SHI.B Dr
  9372:       if (XEiJ.MPU_CC_HI << XEiJ.regCCR < 0) {  //セット
  9373:         XEiJ.mpuCycleCount++;
  9374:         XEiJ.regRn[ea] |= 0xff;
  9375:       } else {  //クリア
  9376:         XEiJ.mpuCycleCount++;
  9377:         XEiJ.regRn[ea] &= ~0xff;
  9378:       }
  9379:     } else if ((XEiJ.EAM_PW | XEiJ.EAM_PX | XEiJ.EAM_IM) << ea < 0L) {  //TRAPHI.W/TRAPHI.L/TRAPHI
  9380:       XEiJ.regPC += (ea & 3) + (ea & 1);  //111_010→2,111_011→4,111_100→0
  9381:       if (XEiJ.MPU_CC_HI << XEiJ.regCCR < 0) {
  9382:         //条件が成立しているのでTRAPする
  9383:         M68kException.m6eAddress = XEiJ.regPC0;  //アドレスは命令の先頭
  9384:         M68kException.m6eNumber = M68kException.M6E_TRAPV_INSTRUCTION;
  9385:         throw M68kException.m6eSignal;
  9386:       } else {
  9387:         //条件が成立していないのでTRAPしない
  9388:         XEiJ.mpuCycleCount++;
  9389:       }
  9390:     } else {  //SHI.B <mem>
  9391:       XEiJ.mpuCycleCount++;
  9392:       mmuWriteByteData (efaMltByte (ea), XEiJ.MPU_CC_HI << XEiJ.regCCR >> 31, XEiJ.regSRS);
  9393:     }
  9394:   }  //irpShi
  9395: 
  9396:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  9397:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  9398:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  9399:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  9400:   //SLS.B <ea>                                      |-|012346|-|--*-*|-----|D M+-WXZ  |0101_001_111_mmm_rrr
  9401:   //SNHI.B <ea>                                     |A|012346|-|--*-*|-----|D M+-WXZ  |0101_001_111_mmm_rrr [SLS.B <ea>]
  9402:   //DBLS.W Dr,<label>                               |-|012346|-|--*-*|-----|          |0101_001_111_001_rrr-{offset}
  9403:   //DBNHI.W Dr,<label>                              |A|012346|-|--*-*|-----|          |0101_001_111_001_rrr-{offset}        [DBLS.W Dr,<label>]
  9404:   //TRAPLS.W #<data>                                |-|--2346|-|--*-*|-----|          |0101_001_111_111_010-{data}
  9405:   //TPLS.W #<data>                                  |A|--2346|-|--*-*|-----|          |0101_001_111_111_010-{data}  [TRAPLS.W #<data>]
  9406:   //TPNHI.W #<data>                                 |A|--2346|-|--*-*|-----|          |0101_001_111_111_010-{data}  [TRAPLS.W #<data>]
  9407:   //TRAPNHI.W #<data>                               |A|--2346|-|--*-*|-----|          |0101_001_111_111_010-{data}  [TRAPLS.W #<data>]
  9408:   //TRAPLS.L #<data>                                |-|--2346|-|--*-*|-----|          |0101_001_111_111_011-{data}
  9409:   //TPLS.L #<data>                                  |A|--2346|-|--*-*|-----|          |0101_001_111_111_011-{data}  [TRAPLS.L #<data>]
  9410:   //TPNHI.L #<data>                                 |A|--2346|-|--*-*|-----|          |0101_001_111_111_011-{data}  [TRAPLS.L #<data>]
  9411:   //TRAPNHI.L #<data>                               |A|--2346|-|--*-*|-----|          |0101_001_111_111_011-{data}  [TRAPLS.L #<data>]
  9412:   //TRAPLS                                          |-|--2346|-|--*-*|-----|          |0101_001_111_111_100
  9413:   //TPLS                                            |A|--2346|-|--*-*|-----|          |0101_001_111_111_100 [TRAPLS]
  9414:   //TPNHI                                           |A|--2346|-|--*-*|-----|          |0101_001_111_111_100 [TRAPLS]
  9415:   //TRAPNHI                                         |A|--2346|-|--*-*|-----|          |0101_001_111_111_100 [TRAPLS]
  9416:   public static void irpSls () throws M68kException {
  9417:     int ea = XEiJ.regOC & 63;
  9418:     if (ea >> 3 == XEiJ.MMM_AR) {  //DBLS.W Dr,<label>
  9419:       int t = XEiJ.regPC;  //pc0+2
  9420:       XEiJ.regPC = t + 2;  //pc0+4
  9421:       t += mmuReadWordSignExword (t, XEiJ.regSRS);  //pc0+2+16bitディスプレースメント
  9422:       if ((t & 1) != 0) {  //分岐先のアドレスが奇数
  9423:         //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ
  9424:         irpBccAddressError (t);
  9425:       }
  9426:       if (XEiJ.MPU_CC_LS << XEiJ.regCCR < 0) {  //条件が成立しているので通過
  9427:         XEiJ.mpuCycleCount += 2;
  9428:       } else {  //条件が成立していないのでデクリメント
  9429:         int rrr = XEiJ.regOC & 7;
  9430:         int s = XEiJ.regRn[rrr];
  9431:         if ((short) s == 0) {  //Drの下位16bitが0なので通過
  9432:           XEiJ.mpuCycleCount += 2;
  9433:           XEiJ.regRn[rrr] = s + 65535;
  9434:         } else {  //Drの下位16bitが0でないので分岐
  9435:           XEiJ.mpuCycleCount++;
  9436:           XEiJ.regRn[rrr] = s - 1;  //下位16bitが0でないので上位16bitは変化しない
  9437:           irpSetPC (t);
  9438:         }
  9439:       }
  9440:     } else if (ea < XEiJ.EA_AR) {  //SLS.B Dr
  9441:       if (XEiJ.MPU_CC_LS << XEiJ.regCCR < 0) {  //セット
  9442:         XEiJ.mpuCycleCount++;
  9443:         XEiJ.regRn[ea] |= 0xff;
  9444:       } else {  //クリア
  9445:         XEiJ.mpuCycleCount++;
  9446:         XEiJ.regRn[ea] &= ~0xff;
  9447:       }
  9448:     } else if ((XEiJ.EAM_PW | XEiJ.EAM_PX | XEiJ.EAM_IM) << ea < 0L) {  //TRAPLS.W/TRAPLS.L/TRAPLS
  9449:       XEiJ.regPC += (ea & 3) + (ea & 1);  //111_010→2,111_011→4,111_100→0
  9450:       if (XEiJ.MPU_CC_LS << XEiJ.regCCR < 0) {
  9451:         //条件が成立しているのでTRAPする
  9452:         M68kException.m6eAddress = XEiJ.regPC0;  //アドレスは命令の先頭
  9453:         M68kException.m6eNumber = M68kException.M6E_TRAPV_INSTRUCTION;
  9454:         throw M68kException.m6eSignal;
  9455:       } else {
  9456:         //条件が成立していないのでTRAPしない
  9457:         XEiJ.mpuCycleCount++;
  9458:       }
  9459:     } else {  //SLS.B <mem>
  9460:       XEiJ.mpuCycleCount++;
  9461:       mmuWriteByteData (efaMltByte (ea), XEiJ.MPU_CC_LS << XEiJ.regCCR >> 31, XEiJ.regSRS);
  9462:     }
  9463:   }  //irpSls
  9464: 
  9465:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  9466:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  9467:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  9468:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  9469:   //SCC.B <ea>                                      |-|012346|-|----*|-----|D M+-WXZ  |0101_010_011_mmm_rrr
  9470:   //SHS.B <ea>                                      |A|012346|-|----*|-----|D M+-WXZ  |0101_010_011_mmm_rrr [SCC.B <ea>]
  9471:   //SNCS.B <ea>                                     |A|012346|-|----*|-----|D M+-WXZ  |0101_010_011_mmm_rrr [SCC.B <ea>]
  9472:   //SNLO.B <ea>                                     |A|012346|-|----*|-----|D M+-WXZ  |0101_010_011_mmm_rrr [SCC.B <ea>]
  9473:   //DBCC.W Dr,<label>                               |-|012346|-|----*|-----|          |0101_010_011_001_rrr-{offset}
  9474:   //DBHS.W Dr,<label>                               |A|012346|-|----*|-----|          |0101_010_011_001_rrr-{offset}        [DBCC.W Dr,<label>]
  9475:   //DBNCS.W Dr,<label>                              |A|012346|-|----*|-----|          |0101_010_011_001_rrr-{offset}        [DBCC.W Dr,<label>]
  9476:   //DBNLO.W Dr,<label>                              |A|012346|-|----*|-----|          |0101_010_011_001_rrr-{offset}        [DBCC.W Dr,<label>]
  9477:   //TRAPCC.W #<data>                                |-|--2346|-|----*|-----|          |0101_010_011_111_010-{data}
  9478:   //TPCC.W #<data>                                  |A|--2346|-|----*|-----|          |0101_010_011_111_010-{data}  [TRAPCC.W #<data>]
  9479:   //TPHS.W #<data>                                  |A|--2346|-|----*|-----|          |0101_010_011_111_010-{data}  [TRAPCC.W #<data>]
  9480:   //TPNCS.W #<data>                                 |A|--2346|-|----*|-----|          |0101_010_011_111_010-{data}  [TRAPCC.W #<data>]
  9481:   //TPNLO.W #<data>                                 |A|--2346|-|----*|-----|          |0101_010_011_111_010-{data}  [TRAPCC.W #<data>]
  9482:   //TRAPHS.W #<data>                                |A|--2346|-|----*|-----|          |0101_010_011_111_010-{data}  [TRAPCC.W #<data>]
  9483:   //TRAPNCS.W #<data>                               |A|--2346|-|----*|-----|          |0101_010_011_111_010-{data}  [TRAPCC.W #<data>]
  9484:   //TRAPNLO.W #<data>                               |A|--2346|-|----*|-----|          |0101_010_011_111_010-{data}  [TRAPCC.W #<data>]
  9485:   //TRAPCC.L #<data>                                |-|--2346|-|----*|-----|          |0101_010_011_111_011-{data}
  9486:   //TPCC.L #<data>                                  |A|--2346|-|----*|-----|          |0101_010_011_111_011-{data}  [TRAPCC.L #<data>]
  9487:   //TPHS.L #<data>                                  |A|--2346|-|----*|-----|          |0101_010_011_111_011-{data}  [TRAPCC.L #<data>]
  9488:   //TPNCS.L #<data>                                 |A|--2346|-|----*|-----|          |0101_010_011_111_011-{data}  [TRAPCC.L #<data>]
  9489:   //TPNLO.L #<data>                                 |A|--2346|-|----*|-----|          |0101_010_011_111_011-{data}  [TRAPCC.L #<data>]
  9490:   //TRAPHS.L #<data>                                |A|--2346|-|----*|-----|          |0101_010_011_111_011-{data}  [TRAPCC.L #<data>]
  9491:   //TRAPNCS.L #<data>                               |A|--2346|-|----*|-----|          |0101_010_011_111_011-{data}  [TRAPCC.L #<data>]
  9492:   //TRAPNLO.L #<data>                               |A|--2346|-|----*|-----|          |0101_010_011_111_011-{data}  [TRAPCC.L #<data>]
  9493:   //TRAPCC                                          |-|--2346|-|----*|-----|          |0101_010_011_111_100
  9494:   //TPCC                                            |A|--2346|-|----*|-----|          |0101_010_011_111_100 [TRAPCC]
  9495:   //TPHS                                            |A|--2346|-|----*|-----|          |0101_010_011_111_100 [TRAPCC]
  9496:   //TPNCS                                           |A|--2346|-|----*|-----|          |0101_010_011_111_100 [TRAPCC]
  9497:   //TPNLO                                           |A|--2346|-|----*|-----|          |0101_010_011_111_100 [TRAPCC]
  9498:   //TRAPHS                                          |A|--2346|-|----*|-----|          |0101_010_011_111_100 [TRAPCC]
  9499:   //TRAPNCS                                         |A|--2346|-|----*|-----|          |0101_010_011_111_100 [TRAPCC]
  9500:   //TRAPNLO                                         |A|--2346|-|----*|-----|          |0101_010_011_111_100 [TRAPCC]
  9501:   public static void irpShs () throws M68kException {
  9502:     int ea = XEiJ.regOC & 63;
  9503:     if (ea >> 3 == XEiJ.MMM_AR) {  //DBHS.W Dr,<label>
  9504:       int t = XEiJ.regPC;  //pc0+2
  9505:       XEiJ.regPC = t + 2;  //pc0+4
  9506:       t += mmuReadWordSignExword (t, XEiJ.regSRS);  //pc0+2+16bitディスプレースメント
  9507:       if ((t & 1) != 0) {  //分岐先のアドレスが奇数
  9508:         //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ
  9509:         irpBccAddressError (t);
  9510:       }
  9511:       if (XEiJ.MPU_CC_HS << XEiJ.regCCR < 0) {  //条件が成立しているので通過
  9512:         XEiJ.mpuCycleCount += 2;
  9513:       } else {  //条件が成立していないのでデクリメント
  9514:         int rrr = XEiJ.regOC & 7;
  9515:         int s = XEiJ.regRn[rrr];
  9516:         if ((short) s == 0) {  //Drの下位16bitが0なので通過
  9517:           XEiJ.mpuCycleCount += 2;
  9518:           XEiJ.regRn[rrr] = s + 65535;
  9519:         } else {  //Drの下位16bitが0でないので分岐
  9520:           XEiJ.mpuCycleCount++;
  9521:           XEiJ.regRn[rrr] = s - 1;  //下位16bitが0でないので上位16bitは変化しない
  9522:           irpSetPC (t);
  9523:         }
  9524:       }
  9525:     } else if (ea < XEiJ.EA_AR) {  //SHS.B Dr
  9526:       if (XEiJ.MPU_CC_HS << XEiJ.regCCR < 0) {  //セット
  9527:         XEiJ.mpuCycleCount++;
  9528:         XEiJ.regRn[ea] |= 0xff;
  9529:       } else {  //クリア
  9530:         XEiJ.mpuCycleCount++;
  9531:         XEiJ.regRn[ea] &= ~0xff;
  9532:       }
  9533:     } else if ((XEiJ.EAM_PW | XEiJ.EAM_PX | XEiJ.EAM_IM) << ea < 0L) {  //TRAPHS.W/TRAPHS.L/TRAPHS
  9534:       XEiJ.regPC += (ea & 3) + (ea & 1);  //111_010→2,111_011→4,111_100→0
  9535:       if (XEiJ.MPU_CC_HS << XEiJ.regCCR < 0) {
  9536:         //条件が成立しているのでTRAPする
  9537:         M68kException.m6eAddress = XEiJ.regPC0;  //アドレスは命令の先頭
  9538:         M68kException.m6eNumber = M68kException.M6E_TRAPV_INSTRUCTION;
  9539:         throw M68kException.m6eSignal;
  9540:       } else {
  9541:         //条件が成立していないのでTRAPしない
  9542:         XEiJ.mpuCycleCount++;
  9543:       }
  9544:     } else {  //SHS.B <mem>
  9545:       XEiJ.mpuCycleCount++;
  9546:       mmuWriteByteData (efaMltByte (ea), XEiJ.MPU_CC_HS << XEiJ.regCCR >> 31, XEiJ.regSRS);
  9547:     }
  9548:   }  //irpShs
  9549: 
  9550:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  9551:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  9552:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  9553:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  9554:   //SCS.B <ea>                                      |-|012346|-|----*|-----|D M+-WXZ  |0101_010_111_mmm_rrr
  9555:   //SLO.B <ea>                                      |A|012346|-|----*|-----|D M+-WXZ  |0101_010_111_mmm_rrr [SCS.B <ea>]
  9556:   //SNCC.B <ea>                                     |A|012346|-|----*|-----|D M+-WXZ  |0101_010_111_mmm_rrr [SCS.B <ea>]
  9557:   //SNHS.B <ea>                                     |A|012346|-|----*|-----|D M+-WXZ  |0101_010_111_mmm_rrr [SCS.B <ea>]
  9558:   //DBCS.W Dr,<label>                               |-|012346|-|----*|-----|          |0101_010_111_001_rrr-{offset}
  9559:   //DBLO.W Dr,<label>                               |A|012346|-|----*|-----|          |0101_010_111_001_rrr-{offset}        [DBCS.W Dr,<label>]
  9560:   //DBNCC.W Dr,<label>                              |A|012346|-|----*|-----|          |0101_010_111_001_rrr-{offset}        [DBCS.W Dr,<label>]
  9561:   //DBNHS.W Dr,<label>                              |A|012346|-|----*|-----|          |0101_010_111_001_rrr-{offset}        [DBCS.W Dr,<label>]
  9562:   //TRAPCS.W #<data>                                |-|--2346|-|----*|-----|          |0101_010_111_111_010-{data}
  9563:   //TPCS.W #<data>                                  |A|--2346|-|----*|-----|          |0101_010_111_111_010-{data}  [TRAPCS.W #<data>]
  9564:   //TPLO.W #<data>                                  |A|--2346|-|----*|-----|          |0101_010_111_111_010-{data}  [TRAPCS.W #<data>]
  9565:   //TPNCC.W #<data>                                 |A|--2346|-|----*|-----|          |0101_010_111_111_010-{data}  [TRAPCS.W #<data>]
  9566:   //TPNHS.W #<data>                                 |A|--2346|-|----*|-----|          |0101_010_111_111_010-{data}  [TRAPCS.W #<data>]
  9567:   //TRAPLO.W #<data>                                |A|--2346|-|----*|-----|          |0101_010_111_111_010-{data}  [TRAPCS.W #<data>]
  9568:   //TRAPNCC.W #<data>                               |A|--2346|-|----*|-----|          |0101_010_111_111_010-{data}  [TRAPCS.W #<data>]
  9569:   //TRAPNHS.W #<data>                               |A|--2346|-|----*|-----|          |0101_010_111_111_010-{data}  [TRAPCS.W #<data>]
  9570:   //TRAPCS.L #<data>                                |-|--2346|-|----*|-----|          |0101_010_111_111_011-{data}
  9571:   //TPCS.L #<data>                                  |A|--2346|-|----*|-----|          |0101_010_111_111_011-{data}  [TRAPCS.L #<data>]
  9572:   //TPLO.L #<data>                                  |A|--2346|-|----*|-----|          |0101_010_111_111_011-{data}  [TRAPCS.L #<data>]
  9573:   //TPNCC.L #<data>                                 |A|--2346|-|----*|-----|          |0101_010_111_111_011-{data}  [TRAPCS.L #<data>]
  9574:   //TPNHS.L #<data>                                 |A|--2346|-|----*|-----|          |0101_010_111_111_011-{data}  [TRAPCS.L #<data>]
  9575:   //TRAPLO.L #<data>                                |A|--2346|-|----*|-----|          |0101_010_111_111_011-{data}  [TRAPCS.L #<data>]
  9576:   //TRAPNCC.L #<data>                               |A|--2346|-|----*|-----|          |0101_010_111_111_011-{data}  [TRAPCS.L #<data>]
  9577:   //TRAPNHS.L #<data>                               |A|--2346|-|----*|-----|          |0101_010_111_111_011-{data}  [TRAPCS.L #<data>]
  9578:   //TRAPCS                                          |-|--2346|-|----*|-----|          |0101_010_111_111_100
  9579:   //TPCS                                            |A|--2346|-|----*|-----|          |0101_010_111_111_100 [TRAPCS]
  9580:   //TPLO                                            |A|--2346|-|----*|-----|          |0101_010_111_111_100 [TRAPCS]
  9581:   //TPNCC                                           |A|--2346|-|----*|-----|          |0101_010_111_111_100 [TRAPCS]
  9582:   //TPNHS                                           |A|--2346|-|----*|-----|          |0101_010_111_111_100 [TRAPCS]
  9583:   //TRAPLO                                          |A|--2346|-|----*|-----|          |0101_010_111_111_100 [TRAPCS]
  9584:   //TRAPNCC                                         |A|--2346|-|----*|-----|          |0101_010_111_111_100 [TRAPCS]
  9585:   //TRAPNHS                                         |A|--2346|-|----*|-----|          |0101_010_111_111_100 [TRAPCS]
  9586:   public static void irpSlo () throws M68kException {
  9587:     int ea = XEiJ.regOC & 63;
  9588:     if (ea >> 3 == XEiJ.MMM_AR) {  //DBLO.W Dr,<label>
  9589:       int t = XEiJ.regPC;  //pc0+2
  9590:       XEiJ.regPC = t + 2;  //pc0+4
  9591:       t += mmuReadWordSignExword (t, XEiJ.regSRS);  //pc0+2+16bitディスプレースメント
  9592:       if ((t & 1) != 0) {  //分岐先のアドレスが奇数
  9593:         //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ
  9594:         irpBccAddressError (t);
  9595:       }
  9596:       if (XEiJ.MPU_CC_LO << XEiJ.regCCR < 0) {  //条件が成立しているので通過
  9597:         XEiJ.mpuCycleCount += 2;
  9598:       } else {  //条件が成立していないのでデクリメント
  9599:         int rrr = XEiJ.regOC & 7;
  9600:         int s = XEiJ.regRn[rrr];
  9601:         if ((short) s == 0) {  //Drの下位16bitが0なので通過
  9602:           XEiJ.mpuCycleCount += 2;
  9603:           XEiJ.regRn[rrr] = s + 65535;
  9604:         } else {  //Drの下位16bitが0でないので分岐
  9605:           XEiJ.mpuCycleCount++;
  9606:           XEiJ.regRn[rrr] = s - 1;  //下位16bitが0でないので上位16bitは変化しない
  9607:           irpSetPC (t);
  9608:         }
  9609:       }
  9610:     } else if (ea < XEiJ.EA_AR) {  //SLO.B Dr
  9611:       if (XEiJ.MPU_CC_LO << XEiJ.regCCR < 0) {  //セット
  9612:         XEiJ.mpuCycleCount++;
  9613:         XEiJ.regRn[ea] |= 0xff;
  9614:       } else {  //クリア
  9615:         XEiJ.mpuCycleCount++;
  9616:         XEiJ.regRn[ea] &= ~0xff;
  9617:       }
  9618:     } else if ((XEiJ.EAM_PW | XEiJ.EAM_PX | XEiJ.EAM_IM) << ea < 0L) {  //TRAPLO.W/TRAPLO.L/TRAPLO
  9619:       XEiJ.regPC += (ea & 3) + (ea & 1);  //111_010→2,111_011→4,111_100→0
  9620:       if (XEiJ.MPU_CC_LO << XEiJ.regCCR < 0) {
  9621:         //条件が成立しているのでTRAPする
  9622:         M68kException.m6eAddress = XEiJ.regPC0;  //アドレスは命令の先頭
  9623:         M68kException.m6eNumber = M68kException.M6E_TRAPV_INSTRUCTION;
  9624:         throw M68kException.m6eSignal;
  9625:       } else {
  9626:         //条件が成立していないのでTRAPしない
  9627:         XEiJ.mpuCycleCount++;
  9628:       }
  9629:     } else {  //SLO.B <mem>
  9630:       XEiJ.mpuCycleCount++;
  9631:       mmuWriteByteData (efaMltByte (ea), XEiJ.MPU_CC_LO << XEiJ.regCCR >> 31, XEiJ.regSRS);
  9632:     }
  9633:   }  //irpSlo
  9634: 
  9635:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  9636:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  9637:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  9638:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  9639:   //SNE.B <ea>                                      |-|012346|-|--*--|-----|D M+-WXZ  |0101_011_011_mmm_rrr
  9640:   //SNEQ.B <ea>                                     |A|012346|-|--*--|-----|D M+-WXZ  |0101_011_011_mmm_rrr [SNE.B <ea>]
  9641:   //SNZ.B <ea>                                      |A|012346|-|--*--|-----|D M+-WXZ  |0101_011_011_mmm_rrr [SNE.B <ea>]
  9642:   //SNZE.B <ea>                                     |A|012346|-|--*--|-----|D M+-WXZ  |0101_011_011_mmm_rrr [SNE.B <ea>]
  9643:   //DBNE.W Dr,<label>                               |-|012346|-|--*--|-----|          |0101_011_011_001_rrr-{offset}
  9644:   //DBNEQ.W Dr,<label>                              |A|012346|-|--*--|-----|          |0101_011_011_001_rrr-{offset}        [DBNE.W Dr,<label>]
  9645:   //DBNZ.W Dr,<label>                               |A|012346|-|--*--|-----|          |0101_011_011_001_rrr-{offset}        [DBNE.W Dr,<label>]
  9646:   //DBNZE.W Dr,<label>                              |A|012346|-|--*--|-----|          |0101_011_011_001_rrr-{offset}        [DBNE.W Dr,<label>]
  9647:   //TRAPNE.W #<data>                                |-|--2346|-|--*--|-----|          |0101_011_011_111_010-{data}
  9648:   //TPNE.W #<data>                                  |A|--2346|-|--*--|-----|          |0101_011_011_111_010-{data}  [TRAPNE.W #<data>]
  9649:   //TPNEQ.W #<data>                                 |A|--2346|-|--*--|-----|          |0101_011_011_111_010-{data}  [TRAPNE.W #<data>]
  9650:   //TPNZ.W #<data>                                  |A|--2346|-|--*--|-----|          |0101_011_011_111_010-{data}  [TRAPNE.W #<data>]
  9651:   //TPNZE.W #<data>                                 |A|--2346|-|--*--|-----|          |0101_011_011_111_010-{data}  [TRAPNE.W #<data>]
  9652:   //TRAPNEQ.W #<data>                               |A|--2346|-|--*--|-----|          |0101_011_011_111_010-{data}  [TRAPNE.W #<data>]
  9653:   //TRAPNZ.W #<data>                                |A|--2346|-|--*--|-----|          |0101_011_011_111_010-{data}  [TRAPNE.W #<data>]
  9654:   //TRAPNZE.W #<data>                               |A|--2346|-|--*--|-----|          |0101_011_011_111_010-{data}  [TRAPNE.W #<data>]
  9655:   //TRAPNE.L #<data>                                |-|--2346|-|--*--|-----|          |0101_011_011_111_011-{data}
  9656:   //TPNE.L #<data>                                  |A|--2346|-|--*--|-----|          |0101_011_011_111_011-{data}  [TRAPNE.L #<data>]
  9657:   //TPNEQ.L #<data>                                 |A|--2346|-|--*--|-----|          |0101_011_011_111_011-{data}  [TRAPNE.L #<data>]
  9658:   //TPNZ.L #<data>                                  |A|--2346|-|--*--|-----|          |0101_011_011_111_011-{data}  [TRAPNE.L #<data>]
  9659:   //TPNZE.L #<data>                                 |A|--2346|-|--*--|-----|          |0101_011_011_111_011-{data}  [TRAPNE.L #<data>]
  9660:   //TRAPNEQ.L #<data>                               |A|--2346|-|--*--|-----|          |0101_011_011_111_011-{data}  [TRAPNE.L #<data>]
  9661:   //TRAPNZ.L #<data>                                |A|--2346|-|--*--|-----|          |0101_011_011_111_011-{data}  [TRAPNE.L #<data>]
  9662:   //TRAPNZE.L #<data>                               |A|--2346|-|--*--|-----|          |0101_011_011_111_011-{data}  [TRAPNE.L #<data>]
  9663:   //TRAPNE                                          |-|--2346|-|--*--|-----|          |0101_011_011_111_100
  9664:   //TPNE                                            |A|--2346|-|--*--|-----|          |0101_011_011_111_100 [TRAPNE]
  9665:   //TPNEQ                                           |A|--2346|-|--*--|-----|          |0101_011_011_111_100 [TRAPNE]
  9666:   //TPNZ                                            |A|--2346|-|--*--|-----|          |0101_011_011_111_100 [TRAPNE]
  9667:   //TPNZE                                           |A|--2346|-|--*--|-----|          |0101_011_011_111_100 [TRAPNE]
  9668:   //TRAPNEQ                                         |A|--2346|-|--*--|-----|          |0101_011_011_111_100 [TRAPNE]
  9669:   //TRAPNZ                                          |A|--2346|-|--*--|-----|          |0101_011_011_111_100 [TRAPNE]
  9670:   //TRAPNZE                                         |A|--2346|-|--*--|-----|          |0101_011_011_111_100 [TRAPNE]
  9671:   public static void irpSne () throws M68kException {
  9672:     int ea = XEiJ.regOC & 63;
  9673:     if (ea >> 3 == XEiJ.MMM_AR) {  //DBNE.W Dr,<label>
  9674:       int t = XEiJ.regPC;  //pc0+2
  9675:       XEiJ.regPC = t + 2;  //pc0+4
  9676:       t += mmuReadWordSignExword (t, XEiJ.regSRS);  //pc0+2+16bitディスプレースメント
  9677:       if ((t & 1) != 0) {  //分岐先のアドレスが奇数
  9678:         //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ
  9679:         irpBccAddressError (t);
  9680:       }
  9681:       if (XEiJ.MPU_CC_NE << XEiJ.regCCR < 0) {  //条件が成立しているので通過
  9682:         XEiJ.mpuCycleCount += 2;
  9683:       } else {  //条件が成立していないのでデクリメント
  9684:         int rrr = XEiJ.regOC & 7;
  9685:         int s = XEiJ.regRn[rrr];
  9686:         if ((short) s == 0) {  //Drの下位16bitが0なので通過
  9687:           XEiJ.mpuCycleCount += 2;
  9688:           XEiJ.regRn[rrr] = s + 65535;
  9689:         } else {  //Drの下位16bitが0でないので分岐
  9690:           XEiJ.mpuCycleCount++;
  9691:           XEiJ.regRn[rrr] = s - 1;  //下位16bitが0でないので上位16bitは変化しない
  9692:           irpSetPC (t);
  9693:         }
  9694:       }
  9695:     } else if (ea < XEiJ.EA_AR) {  //SNE.B Dr
  9696:       if (XEiJ.MPU_CC_NE << XEiJ.regCCR < 0) {  //セット
  9697:         XEiJ.mpuCycleCount++;
  9698:         XEiJ.regRn[ea] |= 0xff;
  9699:       } else {  //クリア
  9700:         XEiJ.mpuCycleCount++;
  9701:         XEiJ.regRn[ea] &= ~0xff;
  9702:       }
  9703:     } else if ((XEiJ.EAM_PW | XEiJ.EAM_PX | XEiJ.EAM_IM) << ea < 0L) {  //TRAPNE.W/TRAPNE.L/TRAPNE
  9704:       XEiJ.regPC += (ea & 3) + (ea & 1);  //111_010→2,111_011→4,111_100→0
  9705:       if (XEiJ.MPU_CC_NE << XEiJ.regCCR < 0) {
  9706:         //条件が成立しているのでTRAPする
  9707:         M68kException.m6eAddress = XEiJ.regPC0;  //アドレスは命令の先頭
  9708:         M68kException.m6eNumber = M68kException.M6E_TRAPV_INSTRUCTION;
  9709:         throw M68kException.m6eSignal;
  9710:       } else {
  9711:         //条件が成立していないのでTRAPしない
  9712:         XEiJ.mpuCycleCount++;
  9713:       }
  9714:     } else {  //SNE.B <mem>
  9715:       XEiJ.mpuCycleCount++;
  9716:       mmuWriteByteData (efaMltByte (ea), XEiJ.MPU_CC_NE << XEiJ.regCCR >> 31, XEiJ.regSRS);
  9717:     }
  9718:   }  //irpSne
  9719: 
  9720:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  9721:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  9722:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  9723:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  9724:   //SEQ.B <ea>                                      |-|012346|-|--*--|-----|D M+-WXZ  |0101_011_111_mmm_rrr
  9725:   //SNNE.B <ea>                                     |A|012346|-|--*--|-----|D M+-WXZ  |0101_011_111_mmm_rrr [SEQ.B <ea>]
  9726:   //SNNZ.B <ea>                                     |A|012346|-|--*--|-----|D M+-WXZ  |0101_011_111_mmm_rrr [SEQ.B <ea>]
  9727:   //SZE.B <ea>                                      |A|012346|-|--*--|-----|D M+-WXZ  |0101_011_111_mmm_rrr [SEQ.B <ea>]
  9728:   //DBEQ.W Dr,<label>                               |-|012346|-|--*--|-----|          |0101_011_111_001_rrr-{offset}
  9729:   //DBNNE.W Dr,<label>                              |A|012346|-|--*--|-----|          |0101_011_111_001_rrr-{offset}        [DBEQ.W Dr,<label>]
  9730:   //DBNNZ.W Dr,<label>                              |A|012346|-|--*--|-----|          |0101_011_111_001_rrr-{offset}        [DBEQ.W Dr,<label>]
  9731:   //DBZE.W Dr,<label>                               |A|012346|-|--*--|-----|          |0101_011_111_001_rrr-{offset}        [DBEQ.W Dr,<label>]
  9732:   //TRAPEQ.W #<data>                                |-|--2346|-|--*--|-----|          |0101_011_111_111_010-{data}
  9733:   //TPEQ.W #<data>                                  |A|--2346|-|--*--|-----|          |0101_011_111_111_010-{data}  [TRAPEQ.W #<data>]
  9734:   //TPNNE.W #<data>                                 |A|--2346|-|--*--|-----|          |0101_011_111_111_010-{data}  [TRAPEQ.W #<data>]
  9735:   //TPNNZ.W #<data>                                 |A|--2346|-|--*--|-----|          |0101_011_111_111_010-{data}  [TRAPEQ.W #<data>]
  9736:   //TPZE.W #<data>                                  |A|--2346|-|--*--|-----|          |0101_011_111_111_010-{data}  [TRAPEQ.W #<data>]
  9737:   //TRAPNNE.W #<data>                               |A|--2346|-|--*--|-----|          |0101_011_111_111_010-{data}  [TRAPEQ.W #<data>]
  9738:   //TRAPNNZ.W #<data>                               |A|--2346|-|--*--|-----|          |0101_011_111_111_010-{data}  [TRAPEQ.W #<data>]
  9739:   //TRAPZE.W #<data>                                |A|--2346|-|--*--|-----|          |0101_011_111_111_010-{data}  [TRAPEQ.W #<data>]
  9740:   //TRAPEQ.L #<data>                                |-|--2346|-|--*--|-----|          |0101_011_111_111_011-{data}
  9741:   //TPEQ.L #<data>                                  |A|--2346|-|--*--|-----|          |0101_011_111_111_011-{data}  [TRAPEQ.L #<data>]
  9742:   //TPNNE.L #<data>                                 |A|--2346|-|--*--|-----|          |0101_011_111_111_011-{data}  [TRAPEQ.L #<data>]
  9743:   //TPNNZ.L #<data>                                 |A|--2346|-|--*--|-----|          |0101_011_111_111_011-{data}  [TRAPEQ.L #<data>]
  9744:   //TPZE.L #<data>                                  |A|--2346|-|--*--|-----|          |0101_011_111_111_011-{data}  [TRAPEQ.L #<data>]
  9745:   //TRAPNNE.L #<data>                               |A|--2346|-|--*--|-----|          |0101_011_111_111_011-{data}  [TRAPEQ.L #<data>]
  9746:   //TRAPNNZ.L #<data>                               |A|--2346|-|--*--|-----|          |0101_011_111_111_011-{data}  [TRAPEQ.L #<data>]
  9747:   //TRAPZE.L #<data>                                |A|--2346|-|--*--|-----|          |0101_011_111_111_011-{data}  [TRAPEQ.L #<data>]
  9748:   //TRAPEQ                                          |-|--2346|-|--*--|-----|          |0101_011_111_111_100
  9749:   //TPEQ                                            |A|--2346|-|--*--|-----|          |0101_011_111_111_100 [TRAPEQ]
  9750:   //TPNNE                                           |A|--2346|-|--*--|-----|          |0101_011_111_111_100 [TRAPEQ]
  9751:   //TPNNZ                                           |A|--2346|-|--*--|-----|          |0101_011_111_111_100 [TRAPEQ]
  9752:   //TPZE                                            |A|--2346|-|--*--|-----|          |0101_011_111_111_100 [TRAPEQ]
  9753:   //TRAPNNE                                         |A|--2346|-|--*--|-----|          |0101_011_111_111_100 [TRAPEQ]
  9754:   //TRAPNNZ                                         |A|--2346|-|--*--|-----|          |0101_011_111_111_100 [TRAPEQ]
  9755:   //TRAPZE                                          |A|--2346|-|--*--|-----|          |0101_011_111_111_100 [TRAPEQ]
  9756:   public static void irpSeq () throws M68kException {
  9757:     int ea = XEiJ.regOC & 63;
  9758:     if (ea >> 3 == XEiJ.MMM_AR) {  //DBEQ.W Dr,<label>
  9759:       int t = XEiJ.regPC;  //pc0+2
  9760:       XEiJ.regPC = t + 2;  //pc0+4
  9761:       t += mmuReadWordSignExword (t, XEiJ.regSRS);  //pc0+2+16bitディスプレースメント
  9762:       if ((t & 1) != 0) {  //分岐先のアドレスが奇数
  9763:         //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ
  9764:         irpBccAddressError (t);
  9765:       }
  9766:       if (XEiJ.MPU_CC_EQ << XEiJ.regCCR < 0) {  //条件が成立しているので通過
  9767:         XEiJ.mpuCycleCount += 2;
  9768:       } else {  //条件が成立していないのでデクリメント
  9769:         int rrr = XEiJ.regOC & 7;
  9770:         int s = XEiJ.regRn[rrr];
  9771:         if ((short) s == 0) {  //Drの下位16bitが0なので通過
  9772:           XEiJ.mpuCycleCount += 2;
  9773:           XEiJ.regRn[rrr] = s + 65535;
  9774:         } else {  //Drの下位16bitが0でないので分岐
  9775:           XEiJ.mpuCycleCount++;
  9776:           XEiJ.regRn[rrr] = s - 1;  //下位16bitが0でないので上位16bitは変化しない
  9777:           irpSetPC (t);
  9778:         }
  9779:       }
  9780:     } else if (ea < XEiJ.EA_AR) {  //SEQ.B Dr
  9781:       if (XEiJ.MPU_CC_EQ << XEiJ.regCCR < 0) {  //セット
  9782:         XEiJ.mpuCycleCount++;
  9783:         XEiJ.regRn[ea] |= 0xff;
  9784:       } else {  //クリア
  9785:         XEiJ.mpuCycleCount++;
  9786:         XEiJ.regRn[ea] &= ~0xff;
  9787:       }
  9788:     } else if ((XEiJ.EAM_PW | XEiJ.EAM_PX | XEiJ.EAM_IM) << ea < 0L) {  //TRAPEQ.W/TRAPEQ.L/TRAPEQ
  9789:       XEiJ.regPC += (ea & 3) + (ea & 1);  //111_010→2,111_011→4,111_100→0
  9790:       if (XEiJ.MPU_CC_EQ << XEiJ.regCCR < 0) {
  9791:         //条件が成立しているのでTRAPする
  9792:         M68kException.m6eAddress = XEiJ.regPC0;  //アドレスは命令の先頭
  9793:         M68kException.m6eNumber = M68kException.M6E_TRAPV_INSTRUCTION;
  9794:         throw M68kException.m6eSignal;
  9795:       } else {
  9796:         //条件が成立していないのでTRAPしない
  9797:         XEiJ.mpuCycleCount++;
  9798:       }
  9799:     } else {  //SEQ.B <mem>
  9800:       XEiJ.mpuCycleCount++;
  9801:       mmuWriteByteData (efaMltByte (ea), XEiJ.MPU_CC_EQ << XEiJ.regCCR >> 31, XEiJ.regSRS);
  9802:     }
  9803:   }  //irpSeq
  9804: 
  9805:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  9806:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  9807:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  9808:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  9809:   //SVC.B <ea>                                      |-|012346|-|---*-|-----|D M+-WXZ  |0101_100_011_mmm_rrr
  9810:   //SNVS.B <ea>                                     |A|012346|-|---*-|-----|D M+-WXZ  |0101_100_011_mmm_rrr [SVC.B <ea>]
  9811:   //DBVC.W Dr,<label>                               |-|012346|-|---*-|-----|          |0101_100_011_001_rrr-{offset}
  9812:   //DBNVS.W Dr,<label>                              |A|012346|-|---*-|-----|          |0101_100_011_001_rrr-{offset}        [DBVC.W Dr,<label>]
  9813:   //TRAPVC.W #<data>                                |-|--2346|-|---*-|-----|          |0101_100_011_111_010-{data}
  9814:   //TPNVS.W #<data>                                 |A|--2346|-|---*-|-----|          |0101_100_011_111_010-{data}  [TRAPVC.W #<data>]
  9815:   //TPVC.W #<data>                                  |A|--2346|-|---*-|-----|          |0101_100_011_111_010-{data}  [TRAPVC.W #<data>]
  9816:   //TRAPNVS.W #<data>                               |A|--2346|-|---*-|-----|          |0101_100_011_111_010-{data}  [TRAPVC.W #<data>]
  9817:   //TRAPVC.L #<data>                                |-|--2346|-|---*-|-----|          |0101_100_011_111_011-{data}
  9818:   //TPNVS.L #<data>                                 |A|--2346|-|---*-|-----|          |0101_100_011_111_011-{data}  [TRAPVC.L #<data>]
  9819:   //TPVC.L #<data>                                  |A|--2346|-|---*-|-----|          |0101_100_011_111_011-{data}  [TRAPVC.L #<data>]
  9820:   //TRAPNVS.L #<data>                               |A|--2346|-|---*-|-----|          |0101_100_011_111_011-{data}  [TRAPVC.L #<data>]
  9821:   //TRAPVC                                          |-|--2346|-|---*-|-----|          |0101_100_011_111_100
  9822:   //TPNVS                                           |A|--2346|-|---*-|-----|          |0101_100_011_111_100 [TRAPVC]
  9823:   //TPVC                                            |A|--2346|-|---*-|-----|          |0101_100_011_111_100 [TRAPVC]
  9824:   //TRAPNVS                                         |A|--2346|-|---*-|-----|          |0101_100_011_111_100 [TRAPVC]
  9825:   public static void irpSvc () throws M68kException {
  9826:     int ea = XEiJ.regOC & 63;
  9827:     if (ea >> 3 == XEiJ.MMM_AR) {  //DBVC.W Dr,<label>
  9828:       int t = XEiJ.regPC;  //pc0+2
  9829:       XEiJ.regPC = t + 2;  //pc0+4
  9830:       t += mmuReadWordSignExword (t, XEiJ.regSRS);  //pc0+2+16bitディスプレースメント
  9831:       if ((t & 1) != 0) {  //分岐先のアドレスが奇数
  9832:         //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ
  9833:         irpBccAddressError (t);
  9834:       }
  9835:       if (XEiJ.MPU_CC_VC << XEiJ.regCCR < 0) {  //条件が成立しているので通過
  9836:         XEiJ.mpuCycleCount += 2;
  9837:       } else {  //条件が成立していないのでデクリメント
  9838:         int rrr = XEiJ.regOC & 7;
  9839:         int s = XEiJ.regRn[rrr];
  9840:         if ((short) s == 0) {  //Drの下位16bitが0なので通過
  9841:           XEiJ.mpuCycleCount += 2;
  9842:           XEiJ.regRn[rrr] = s + 65535;
  9843:         } else {  //Drの下位16bitが0でないので分岐
  9844:           XEiJ.mpuCycleCount++;
  9845:           XEiJ.regRn[rrr] = s - 1;  //下位16bitが0でないので上位16bitは変化しない
  9846:           irpSetPC (t);
  9847:         }
  9848:       }
  9849:     } else if (ea < XEiJ.EA_AR) {  //SVC.B Dr
  9850:       if (XEiJ.MPU_CC_VC << XEiJ.regCCR < 0) {  //セット
  9851:         XEiJ.mpuCycleCount++;
  9852:         XEiJ.regRn[ea] |= 0xff;
  9853:       } else {  //クリア
  9854:         XEiJ.mpuCycleCount++;
  9855:         XEiJ.regRn[ea] &= ~0xff;
  9856:       }
  9857:     } else if ((XEiJ.EAM_PW | XEiJ.EAM_PX | XEiJ.EAM_IM) << ea < 0L) {  //TRAPVC.W/TRAPVC.L/TRAPVC
  9858:       XEiJ.regPC += (ea & 3) + (ea & 1);  //111_010→2,111_011→4,111_100→0
  9859:       if (XEiJ.MPU_CC_VC << XEiJ.regCCR < 0) {
  9860:         //条件が成立しているのでTRAPする
  9861:         M68kException.m6eAddress = XEiJ.regPC0;  //アドレスは命令の先頭
  9862:         M68kException.m6eNumber = M68kException.M6E_TRAPV_INSTRUCTION;
  9863:         throw M68kException.m6eSignal;
  9864:       } else {
  9865:         //条件が成立していないのでTRAPしない
  9866:         XEiJ.mpuCycleCount++;
  9867:       }
  9868:     } else {  //SVC.B <mem>
  9869:       XEiJ.mpuCycleCount++;
  9870:       mmuWriteByteData (efaMltByte (ea), XEiJ.MPU_CC_VC << XEiJ.regCCR >> 31, XEiJ.regSRS);
  9871:     }
  9872:   }  //irpSvc
  9873: 
  9874:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  9875:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  9876:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  9877:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  9878:   //SVS.B <ea>                                      |-|012346|-|---*-|-----|D M+-WXZ  |0101_100_111_mmm_rrr
  9879:   //SNVC.B <ea>                                     |A|012346|-|---*-|-----|D M+-WXZ  |0101_100_111_mmm_rrr [SVS.B <ea>]
  9880:   //DBVS.W Dr,<label>                               |-|012346|-|---*-|-----|          |0101_100_111_001_rrr-{offset}
  9881:   //DBNVC.W Dr,<label>                              |A|012346|-|---*-|-----|          |0101_100_111_001_rrr-{offset}        [DBVS.W Dr,<label>]
  9882:   //TRAPVS.W #<data>                                |-|--2346|-|---*-|-----|          |0101_100_111_111_010-{data}
  9883:   //TPNVC.W #<data>                                 |A|--2346|-|---*-|-----|          |0101_100_111_111_010-{data}  [TRAPVS.W #<data>]
  9884:   //TPVS.W #<data>                                  |A|--2346|-|---*-|-----|          |0101_100_111_111_010-{data}  [TRAPVS.W #<data>]
  9885:   //TRAPNVC.W #<data>                               |A|--2346|-|---*-|-----|          |0101_100_111_111_010-{data}  [TRAPVS.W #<data>]
  9886:   //TRAPVS.L #<data>                                |-|--2346|-|---*-|-----|          |0101_100_111_111_011-{data}
  9887:   //TPNVC.L #<data>                                 |A|--2346|-|---*-|-----|          |0101_100_111_111_011-{data}  [TRAPVS.L #<data>]
  9888:   //TPVS.L #<data>                                  |A|--2346|-|---*-|-----|          |0101_100_111_111_011-{data}  [TRAPVS.L #<data>]
  9889:   //TRAPNVC.L #<data>                               |A|--2346|-|---*-|-----|          |0101_100_111_111_011-{data}  [TRAPVS.L #<data>]
  9890:   //TRAPVS                                          |-|--2346|-|---*-|-----|          |0101_100_111_111_100
  9891:   //TPNVC                                           |A|--2346|-|---*-|-----|          |0101_100_111_111_100 [TRAPVS]
  9892:   //TPVS                                            |A|--2346|-|---*-|-----|          |0101_100_111_111_100 [TRAPVS]
  9893:   //TRAPNVC                                         |A|--2346|-|---*-|-----|          |0101_100_111_111_100 [TRAPVS]
  9894:   public static void irpSvs () throws M68kException {
  9895:     int ea = XEiJ.regOC & 63;
  9896:     if (ea >> 3 == XEiJ.MMM_AR) {  //DBVS.W Dr,<label>
  9897:       int t = XEiJ.regPC;  //pc0+2
  9898:       XEiJ.regPC = t + 2;  //pc0+4
  9899:       t += mmuReadWordSignExword (t, XEiJ.regSRS);  //pc0+2+16bitディスプレースメント
  9900:       if ((t & 1) != 0) {  //分岐先のアドレスが奇数
  9901:         //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ
  9902:         irpBccAddressError (t);
  9903:       }
  9904:       if (XEiJ.MPU_CC_VS << XEiJ.regCCR < 0) {  //条件が成立しているので通過
  9905:         XEiJ.mpuCycleCount += 2;
  9906:       } else {  //条件が成立していないのでデクリメント
  9907:         int rrr = XEiJ.regOC & 7;
  9908:         int s = XEiJ.regRn[rrr];
  9909:         if ((short) s == 0) {  //Drの下位16bitが0なので通過
  9910:           XEiJ.mpuCycleCount += 2;
  9911:           XEiJ.regRn[rrr] = s + 65535;
  9912:         } else {  //Drの下位16bitが0でないので分岐
  9913:           XEiJ.mpuCycleCount++;
  9914:           XEiJ.regRn[rrr] = s - 1;  //下位16bitが0でないので上位16bitは変化しない
  9915:           irpSetPC (t);
  9916:         }
  9917:       }
  9918:     } else if (ea < XEiJ.EA_AR) {  //SVS.B Dr
  9919:       if (XEiJ.MPU_CC_VS << XEiJ.regCCR < 0) {  //セット
  9920:         XEiJ.mpuCycleCount++;
  9921:         XEiJ.regRn[ea] |= 0xff;
  9922:       } else {  //クリア
  9923:         XEiJ.mpuCycleCount++;
  9924:         XEiJ.regRn[ea] &= ~0xff;
  9925:       }
  9926:     } else if ((XEiJ.EAM_PW | XEiJ.EAM_PX | XEiJ.EAM_IM) << ea < 0L) {  //TRAPVS.W/TRAPVS.L/TRAPVS
  9927:       XEiJ.regPC += (ea & 3) + (ea & 1);  //111_010→2,111_011→4,111_100→0
  9928:       if (XEiJ.MPU_CC_VS << XEiJ.regCCR < 0) {
  9929:         //条件が成立しているのでTRAPする
  9930:         M68kException.m6eAddress = XEiJ.regPC0;  //アドレスは命令の先頭
  9931:         M68kException.m6eNumber = M68kException.M6E_TRAPV_INSTRUCTION;
  9932:         throw M68kException.m6eSignal;
  9933:       } else {
  9934:         //条件が成立していないのでTRAPしない
  9935:         XEiJ.mpuCycleCount++;
  9936:       }
  9937:     } else {  //SVS.B <mem>
  9938:       XEiJ.mpuCycleCount++;
  9939:       mmuWriteByteData (efaMltByte (ea), XEiJ.MPU_CC_VS << XEiJ.regCCR >> 31, XEiJ.regSRS);
  9940:     }
  9941:   }  //irpSvs
  9942: 
  9943:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  9944:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  9945:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  9946:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  9947:   //SPL.B <ea>                                      |-|012346|-|-*---|-----|D M+-WXZ  |0101_101_011_mmm_rrr
  9948:   //SNMI.B <ea>                                     |A|012346|-|-*---|-----|D M+-WXZ  |0101_101_011_mmm_rrr [SPL.B <ea>]
  9949:   //DBPL.W Dr,<label>                               |-|012346|-|-*---|-----|          |0101_101_011_001_rrr-{offset}
  9950:   //DBNMI.W Dr,<label>                              |A|012346|-|-*---|-----|          |0101_101_011_001_rrr-{offset}        [DBPL.W Dr,<label>]
  9951:   //TRAPPL.W #<data>                                |-|--2346|-|-*---|-----|          |0101_101_011_111_010-{data}
  9952:   //TPNMI.W #<data>                                 |A|--2346|-|-*---|-----|          |0101_101_011_111_010-{data}  [TRAPPL.W #<data>]
  9953:   //TPPL.W #<data>                                  |A|--2346|-|-*---|-----|          |0101_101_011_111_010-{data}  [TRAPPL.W #<data>]
  9954:   //TRAPNMI.W #<data>                               |A|--2346|-|-*---|-----|          |0101_101_011_111_010-{data}  [TRAPPL.W #<data>]
  9955:   //TRAPPL.L #<data>                                |-|--2346|-|-*---|-----|          |0101_101_011_111_011-{data}
  9956:   //TPNMI.L #<data>                                 |A|--2346|-|-*---|-----|          |0101_101_011_111_011-{data}  [TRAPPL.L #<data>]
  9957:   //TPPL.L #<data>                                  |A|--2346|-|-*---|-----|          |0101_101_011_111_011-{data}  [TRAPPL.L #<data>]
  9958:   //TRAPNMI.L #<data>                               |A|--2346|-|-*---|-----|          |0101_101_011_111_011-{data}  [TRAPPL.L #<data>]
  9959:   //TRAPPL                                          |-|--2346|-|-*---|-----|          |0101_101_011_111_100
  9960:   //TPNMI                                           |A|--2346|-|-*---|-----|          |0101_101_011_111_100 [TRAPPL]
  9961:   //TPPL                                            |A|--2346|-|-*---|-----|          |0101_101_011_111_100 [TRAPPL]
  9962:   //TRAPNMI                                         |A|--2346|-|-*---|-----|          |0101_101_011_111_100 [TRAPPL]
  9963:   public static void irpSpl () throws M68kException {
  9964:     int ea = XEiJ.regOC & 63;
  9965:     if (ea >> 3 == XEiJ.MMM_AR) {  //DBPL.W Dr,<label>
  9966:       int t = XEiJ.regPC;  //pc0+2
  9967:       XEiJ.regPC = t + 2;  //pc0+4
  9968:       t += mmuReadWordSignExword (t, XEiJ.regSRS);  //pc0+2+16bitディスプレースメント
  9969:       if ((t & 1) != 0) {  //分岐先のアドレスが奇数
  9970:         //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ
  9971:         irpBccAddressError (t);
  9972:       }
  9973:       if (XEiJ.MPU_CC_PL << XEiJ.regCCR < 0) {  //条件が成立しているので通過
  9974:         XEiJ.mpuCycleCount += 2;
  9975:       } else {  //条件が成立していないのでデクリメント
  9976:         int rrr = XEiJ.regOC & 7;
  9977:         int s = XEiJ.regRn[rrr];
  9978:         if ((short) s == 0) {  //Drの下位16bitが0なので通過
  9979:           XEiJ.mpuCycleCount += 2;
  9980:           XEiJ.regRn[rrr] = s + 65535;
  9981:         } else {  //Drの下位16bitが0でないので分岐
  9982:           XEiJ.mpuCycleCount++;
  9983:           XEiJ.regRn[rrr] = s - 1;  //下位16bitが0でないので上位16bitは変化しない
  9984:           irpSetPC (t);
  9985:         }
  9986:       }
  9987:     } else if (ea < XEiJ.EA_AR) {  //SPL.B Dr
  9988:       if (XEiJ.MPU_CC_PL << XEiJ.regCCR < 0) {  //セット
  9989:         XEiJ.mpuCycleCount++;
  9990:         XEiJ.regRn[ea] |= 0xff;
  9991:       } else {  //クリア
  9992:         XEiJ.mpuCycleCount++;
  9993:         XEiJ.regRn[ea] &= ~0xff;
  9994:       }
  9995:     } else if ((XEiJ.EAM_PW | XEiJ.EAM_PX | XEiJ.EAM_IM) << ea < 0L) {  //TRAPPL.W/TRAPPL.L/TRAPPL
  9996:       XEiJ.regPC += (ea & 3) + (ea & 1);  //111_010→2,111_011→4,111_100→0
  9997:       if (XEiJ.MPU_CC_PL << XEiJ.regCCR < 0) {
  9998:         //条件が成立しているのでTRAPする
  9999:         M68kException.m6eAddress = XEiJ.regPC0;  //アドレスは命令の先頭
 10000:         M68kException.m6eNumber = M68kException.M6E_TRAPV_INSTRUCTION;
 10001:         throw M68kException.m6eSignal;
 10002:       } else {
 10003:         //条件が成立していないのでTRAPしない
 10004:         XEiJ.mpuCycleCount++;
 10005:       }
 10006:     } else {  //SPL.B <mem>
 10007:       XEiJ.mpuCycleCount++;
 10008:       mmuWriteByteData (efaMltByte (ea), XEiJ.MPU_CC_PL << XEiJ.regCCR >> 31, XEiJ.regSRS);
 10009:     }
 10010:   }  //irpSpl
 10011: 
 10012:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10013:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 10014:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 10015:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10016:   //SMI.B <ea>                                      |-|012346|-|-*---|-----|D M+-WXZ  |0101_101_111_mmm_rrr
 10017:   //SNPL.B <ea>                                     |A|012346|-|-*---|-----|D M+-WXZ  |0101_101_111_mmm_rrr [SMI.B <ea>]
 10018:   //DBMI.W Dr,<label>                               |-|012346|-|-*---|-----|          |0101_101_111_001_rrr-{offset}
 10019:   //DBNPL.W Dr,<label>                              |A|012346|-|-*---|-----|          |0101_101_111_001_rrr-{offset}        [DBMI.W Dr,<label>]
 10020:   //TRAPMI.W #<data>                                |-|--2346|-|-*---|-----|          |0101_101_111_111_010-{data}
 10021:   //TPMI.W #<data>                                  |A|--2346|-|-*---|-----|          |0101_101_111_111_010-{data}  [TRAPMI.W #<data>]
 10022:   //TPNPL.W #<data>                                 |A|--2346|-|-*---|-----|          |0101_101_111_111_010-{data}  [TRAPMI.W #<data>]
 10023:   //TRAPNPL.W #<data>                               |A|--2346|-|-*---|-----|          |0101_101_111_111_010-{data}  [TRAPMI.W #<data>]
 10024:   //TRAPMI.L #<data>                                |-|--2346|-|-*---|-----|          |0101_101_111_111_011-{data}
 10025:   //TPMI.L #<data>                                  |A|--2346|-|-*---|-----|          |0101_101_111_111_011-{data}  [TRAPMI.L #<data>]
 10026:   //TPNPL.L #<data>                                 |A|--2346|-|-*---|-----|          |0101_101_111_111_011-{data}  [TRAPMI.L #<data>]
 10027:   //TRAPNPL.L #<data>                               |A|--2346|-|-*---|-----|          |0101_101_111_111_011-{data}  [TRAPMI.L #<data>]
 10028:   //TRAPMI                                          |-|--2346|-|-*---|-----|          |0101_101_111_111_100
 10029:   //TPMI                                            |A|--2346|-|-*---|-----|          |0101_101_111_111_100 [TRAPMI]
 10030:   //TPNPL                                           |A|--2346|-|-*---|-----|          |0101_101_111_111_100 [TRAPMI]
 10031:   //TRAPNPL                                         |A|--2346|-|-*---|-----|          |0101_101_111_111_100 [TRAPMI]
 10032:   public static void irpSmi () throws M68kException {
 10033:     int ea = XEiJ.regOC & 63;
 10034:     if (ea >> 3 == XEiJ.MMM_AR) {  //DBMI.W Dr,<label>
 10035:       int t = XEiJ.regPC;  //pc0+2
 10036:       XEiJ.regPC = t + 2;  //pc0+4
 10037:       t += mmuReadWordSignExword (t, XEiJ.regSRS);  //pc0+2+16bitディスプレースメント
 10038:       if ((t & 1) != 0) {  //分岐先のアドレスが奇数
 10039:         //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ
 10040:         irpBccAddressError (t);
 10041:       }
 10042:       if (XEiJ.MPU_CC_MI << XEiJ.regCCR < 0) {  //条件が成立しているので通過
 10043:         XEiJ.mpuCycleCount += 2;
 10044:       } else {  //条件が成立していないのでデクリメント
 10045:         int rrr = XEiJ.regOC & 7;
 10046:         int s = XEiJ.regRn[rrr];
 10047:         if ((short) s == 0) {  //Drの下位16bitが0なので通過
 10048:           XEiJ.mpuCycleCount += 2;
 10049:           XEiJ.regRn[rrr] = s + 65535;
 10050:         } else {  //Drの下位16bitが0でないので分岐
 10051:           XEiJ.mpuCycleCount++;
 10052:           XEiJ.regRn[rrr] = s - 1;  //下位16bitが0でないので上位16bitは変化しない
 10053:           irpSetPC (t);
 10054:         }
 10055:       }
 10056:     } else if (ea < XEiJ.EA_AR) {  //SMI.B Dr
 10057:       if (XEiJ.MPU_CC_MI << XEiJ.regCCR < 0) {  //セット
 10058:         XEiJ.mpuCycleCount++;
 10059:         XEiJ.regRn[ea] |= 0xff;
 10060:       } else {  //クリア
 10061:         XEiJ.mpuCycleCount++;
 10062:         XEiJ.regRn[ea] &= ~0xff;
 10063:       }
 10064:     } else if ((XEiJ.EAM_PW | XEiJ.EAM_PX | XEiJ.EAM_IM) << ea < 0L) {  //TRAPMI.W/TRAPMI.L/TRAPMI
 10065:       XEiJ.regPC += (ea & 3) + (ea & 1);  //111_010→2,111_011→4,111_100→0
 10066:       if (XEiJ.MPU_CC_MI << XEiJ.regCCR < 0) {
 10067:         //条件が成立しているのでTRAPする
 10068:         M68kException.m6eAddress = XEiJ.regPC0;  //アドレスは命令の先頭
 10069:         M68kException.m6eNumber = M68kException.M6E_TRAPV_INSTRUCTION;
 10070:         throw M68kException.m6eSignal;
 10071:       } else {
 10072:         //条件が成立していないのでTRAPしない
 10073:         XEiJ.mpuCycleCount++;
 10074:       }
 10075:     } else {  //SMI.B <mem>
 10076:       XEiJ.mpuCycleCount++;
 10077:       mmuWriteByteData (efaMltByte (ea), XEiJ.MPU_CC_MI << XEiJ.regCCR >> 31, XEiJ.regSRS);
 10078:     }
 10079:   }  //irpSmi
 10080: 
 10081:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10082:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 10083:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 10084:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10085:   //SGE.B <ea>                                      |-|012346|-|-*-*-|-----|D M+-WXZ  |0101_110_011_mmm_rrr
 10086:   //SNLT.B <ea>                                     |A|012346|-|-*-*-|-----|D M+-WXZ  |0101_110_011_mmm_rrr [SGE.B <ea>]
 10087:   //DBGE.W Dr,<label>                               |-|012346|-|-*-*-|-----|          |0101_110_011_001_rrr-{offset}
 10088:   //DBNLT.W Dr,<label>                              |A|012346|-|-*-*-|-----|          |0101_110_011_001_rrr-{offset}        [DBGE.W Dr,<label>]
 10089:   //TRAPGE.W #<data>                                |-|--2346|-|-*-*-|-----|          |0101_110_011_111_010-{data}
 10090:   //TPGE.W #<data>                                  |A|--2346|-|-*-*-|-----|          |0101_110_011_111_010-{data}  [TRAPGE.W #<data>]
 10091:   //TPNLT.W #<data>                                 |A|--2346|-|-*-*-|-----|          |0101_110_011_111_010-{data}  [TRAPGE.W #<data>]
 10092:   //TRAPNLT.W #<data>                               |A|--2346|-|-*-*-|-----|          |0101_110_011_111_010-{data}  [TRAPGE.W #<data>]
 10093:   //TRAPGE.L #<data>                                |-|--2346|-|-*-*-|-----|          |0101_110_011_111_011-{data}
 10094:   //TPGE.L #<data>                                  |A|--2346|-|-*-*-|-----|          |0101_110_011_111_011-{data}  [TRAPGE.L #<data>]
 10095:   //TPNLT.L #<data>                                 |A|--2346|-|-*-*-|-----|          |0101_110_011_111_011-{data}  [TRAPGE.L #<data>]
 10096:   //TRAPNLT.L #<data>                               |A|--2346|-|-*-*-|-----|          |0101_110_011_111_011-{data}  [TRAPGE.L #<data>]
 10097:   //TRAPGE                                          |-|--2346|-|-*-*-|-----|          |0101_110_011_111_100
 10098:   //TPGE                                            |A|--2346|-|-*-*-|-----|          |0101_110_011_111_100 [TRAPGE]
 10099:   //TPNLT                                           |A|--2346|-|-*-*-|-----|          |0101_110_011_111_100 [TRAPGE]
 10100:   //TRAPNLT                                         |A|--2346|-|-*-*-|-----|          |0101_110_011_111_100 [TRAPGE]
 10101:   public static void irpSge () throws M68kException {
 10102:     int ea = XEiJ.regOC & 63;
 10103:     if (ea >> 3 == XEiJ.MMM_AR) {  //DBGE.W Dr,<label>
 10104:       int t = XEiJ.regPC;  //pc0+2
 10105:       XEiJ.regPC = t + 2;  //pc0+4
 10106:       t += mmuReadWordSignExword (t, XEiJ.regSRS);  //pc0+2+16bitディスプレースメント
 10107:       if ((t & 1) != 0) {  //分岐先のアドレスが奇数
 10108:         //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ
 10109:         irpBccAddressError (t);
 10110:       }
 10111:       if (XEiJ.MPU_CC_GE << XEiJ.regCCR < 0) {  //条件が成立しているので通過
 10112:         XEiJ.mpuCycleCount += 2;
 10113:       } else {  //条件が成立していないのでデクリメント
 10114:         int rrr = XEiJ.regOC & 7;
 10115:         int s = XEiJ.regRn[rrr];
 10116:         if ((short) s == 0) {  //Drの下位16bitが0なので通過
 10117:           XEiJ.mpuCycleCount += 2;
 10118:           XEiJ.regRn[rrr] = s + 65535;
 10119:         } else {  //Drの下位16bitが0でないので分岐
 10120:           XEiJ.mpuCycleCount++;
 10121:           XEiJ.regRn[rrr] = s - 1;  //下位16bitが0でないので上位16bitは変化しない
 10122:           irpSetPC (t);
 10123:         }
 10124:       }
 10125:     } else if (ea < XEiJ.EA_AR) {  //SGE.B Dr
 10126:       if (XEiJ.MPU_CC_GE << XEiJ.regCCR < 0) {  //セット
 10127:         XEiJ.mpuCycleCount++;
 10128:         XEiJ.regRn[ea] |= 0xff;
 10129:       } else {  //クリア
 10130:         XEiJ.mpuCycleCount++;
 10131:         XEiJ.regRn[ea] &= ~0xff;
 10132:       }
 10133:     } else if ((XEiJ.EAM_PW | XEiJ.EAM_PX | XEiJ.EAM_IM) << ea < 0L) {  //TRAPGE.W/TRAPGE.L/TRAPGE
 10134:       XEiJ.regPC += (ea & 3) + (ea & 1);  //111_010→2,111_011→4,111_100→0
 10135:       if (XEiJ.MPU_CC_GE << XEiJ.regCCR < 0) {
 10136:         //条件が成立しているのでTRAPする
 10137:         M68kException.m6eAddress = XEiJ.regPC0;  //アドレスは命令の先頭
 10138:         M68kException.m6eNumber = M68kException.M6E_TRAPV_INSTRUCTION;
 10139:         throw M68kException.m6eSignal;
 10140:       } else {
 10141:         //条件が成立していないのでTRAPしない
 10142:         XEiJ.mpuCycleCount++;
 10143:       }
 10144:     } else {  //SGE.B <mem>
 10145:       XEiJ.mpuCycleCount++;
 10146:       mmuWriteByteData (efaMltByte (ea), XEiJ.MPU_CC_GE << XEiJ.regCCR >> 31, XEiJ.regSRS);
 10147:     }
 10148:   }  //irpSge
 10149: 
 10150:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10151:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 10152:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 10153:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10154:   //SLT.B <ea>                                      |-|012346|-|-*-*-|-----|D M+-WXZ  |0101_110_111_mmm_rrr
 10155:   //SNGE.B <ea>                                     |A|012346|-|-*-*-|-----|D M+-WXZ  |0101_110_111_mmm_rrr [SLT.B <ea>]
 10156:   //DBLT.W Dr,<label>                               |-|012346|-|-*-*-|-----|          |0101_110_111_001_rrr-{offset}
 10157:   //DBNGE.W Dr,<label>                              |A|012346|-|-*-*-|-----|          |0101_110_111_001_rrr-{offset}        [DBLT.W Dr,<label>]
 10158:   //TRAPLT.W #<data>                                |-|--2346|-|-*-*-|-----|          |0101_110_111_111_010-{data}
 10159:   //TPLT.W #<data>                                  |A|--2346|-|-*-*-|-----|          |0101_110_111_111_010-{data}  [TRAPLT.W #<data>]
 10160:   //TPNGE.W #<data>                                 |A|--2346|-|-*-*-|-----|          |0101_110_111_111_010-{data}  [TRAPLT.W #<data>]
 10161:   //TRAPNGE.W #<data>                               |A|--2346|-|-*-*-|-----|          |0101_110_111_111_010-{data}  [TRAPLT.W #<data>]
 10162:   //TRAPLT.L #<data>                                |-|--2346|-|-*-*-|-----|          |0101_110_111_111_011-{data}
 10163:   //TPLT.L #<data>                                  |A|--2346|-|-*-*-|-----|          |0101_110_111_111_011-{data}  [TRAPLT.L #<data>]
 10164:   //TPNGE.L #<data>                                 |A|--2346|-|-*-*-|-----|          |0101_110_111_111_011-{data}  [TRAPLT.L #<data>]
 10165:   //TRAPNGE.L #<data>                               |A|--2346|-|-*-*-|-----|          |0101_110_111_111_011-{data}  [TRAPLT.L #<data>]
 10166:   //TRAPLT                                          |-|--2346|-|-*-*-|-----|          |0101_110_111_111_100
 10167:   //TPLT                                            |A|--2346|-|-*-*-|-----|          |0101_110_111_111_100 [TRAPLT]
 10168:   //TPNGE                                           |A|--2346|-|-*-*-|-----|          |0101_110_111_111_100 [TRAPLT]
 10169:   //TRAPNGE                                         |A|--2346|-|-*-*-|-----|          |0101_110_111_111_100 [TRAPLT]
 10170:   public static void irpSlt () throws M68kException {
 10171:     int ea = XEiJ.regOC & 63;
 10172:     if (ea >> 3 == XEiJ.MMM_AR) {  //DBLT.W Dr,<label>
 10173:       int t = XEiJ.regPC;  //pc0+2
 10174:       XEiJ.regPC = t + 2;  //pc0+4
 10175:       t += mmuReadWordSignExword (t, XEiJ.regSRS);  //pc0+2+16bitディスプレースメント
 10176:       if ((t & 1) != 0) {  //分岐先のアドレスが奇数
 10177:         //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ
 10178:         irpBccAddressError (t);
 10179:       }
 10180:       if (XEiJ.MPU_CC_LT << XEiJ.regCCR < 0) {  //条件が成立しているので通過
 10181:         XEiJ.mpuCycleCount += 2;
 10182:       } else {  //条件が成立していないのでデクリメント
 10183:         int rrr = XEiJ.regOC & 7;
 10184:         int s = XEiJ.regRn[rrr];
 10185:         if ((short) s == 0) {  //Drの下位16bitが0なので通過
 10186:           XEiJ.mpuCycleCount += 2;
 10187:           XEiJ.regRn[rrr] = s + 65535;
 10188:         } else {  //Drの下位16bitが0でないので分岐
 10189:           XEiJ.mpuCycleCount++;
 10190:           XEiJ.regRn[rrr] = s - 1;  //下位16bitが0でないので上位16bitは変化しない
 10191:           irpSetPC (t);
 10192:         }
 10193:       }
 10194:     } else if (ea < XEiJ.EA_AR) {  //SLT.B Dr
 10195:       if (XEiJ.MPU_CC_LT << XEiJ.regCCR < 0) {  //セット
 10196:         XEiJ.mpuCycleCount++;
 10197:         XEiJ.regRn[ea] |= 0xff;
 10198:       } else {  //クリア
 10199:         XEiJ.mpuCycleCount++;
 10200:         XEiJ.regRn[ea] &= ~0xff;
 10201:       }
 10202:     } else if ((XEiJ.EAM_PW | XEiJ.EAM_PX | XEiJ.EAM_IM) << ea < 0L) {  //TRAPLT.W/TRAPLT.L/TRAPLT
 10203:       XEiJ.regPC += (ea & 3) + (ea & 1);  //111_010→2,111_011→4,111_100→0
 10204:       if (XEiJ.MPU_CC_LT << XEiJ.regCCR < 0) {
 10205:         //条件が成立しているのでTRAPする
 10206:         M68kException.m6eAddress = XEiJ.regPC0;  //アドレスは命令の先頭
 10207:         M68kException.m6eNumber = M68kException.M6E_TRAPV_INSTRUCTION;
 10208:         throw M68kException.m6eSignal;
 10209:       } else {
 10210:         //条件が成立していないのでTRAPしない
 10211:         XEiJ.mpuCycleCount++;
 10212:       }
 10213:     } else {  //SLT.B <mem>
 10214:       XEiJ.mpuCycleCount++;
 10215:       mmuWriteByteData (efaMltByte (ea), XEiJ.MPU_CC_LT << XEiJ.regCCR >> 31, XEiJ.regSRS);
 10216:     }
 10217:   }  //irpSlt
 10218: 
 10219:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10220:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 10221:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 10222:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10223:   //SGT.B <ea>                                      |-|012346|-|-***-|-----|D M+-WXZ  |0101_111_011_mmm_rrr
 10224:   //SNLE.B <ea>                                     |A|012346|-|-***-|-----|D M+-WXZ  |0101_111_011_mmm_rrr [SGT.B <ea>]
 10225:   //DBGT.W Dr,<label>                               |-|012346|-|-***-|-----|          |0101_111_011_001_rrr-{offset}
 10226:   //DBNLE.W Dr,<label>                              |A|012346|-|-***-|-----|          |0101_111_011_001_rrr-{offset}        [DBGT.W Dr,<label>]
 10227:   //TRAPGT.W #<data>                                |-|--2346|-|-***-|-----|          |0101_111_011_111_010-{data}
 10228:   //TPGT.W #<data>                                  |A|--2346|-|-***-|-----|          |0101_111_011_111_010-{data}  [TRAPGT.W #<data>]
 10229:   //TPNLE.W #<data>                                 |A|--2346|-|-***-|-----|          |0101_111_011_111_010-{data}  [TRAPGT.W #<data>]
 10230:   //TRAPNLE.W #<data>                               |A|--2346|-|-***-|-----|          |0101_111_011_111_010-{data}  [TRAPGT.W #<data>]
 10231:   //TRAPGT.L #<data>                                |-|--2346|-|-***-|-----|          |0101_111_011_111_011-{data}
 10232:   //TPGT.L #<data>                                  |A|--2346|-|-***-|-----|          |0101_111_011_111_011-{data}  [TRAPGT.L #<data>]
 10233:   //TPNLE.L #<data>                                 |A|--2346|-|-***-|-----|          |0101_111_011_111_011-{data}  [TRAPGT.L #<data>]
 10234:   //TRAPNLE.L #<data>                               |A|--2346|-|-***-|-----|          |0101_111_011_111_011-{data}  [TRAPGT.L #<data>]
 10235:   //TRAPGT                                          |-|--2346|-|-***-|-----|          |0101_111_011_111_100
 10236:   //TPGT                                            |A|--2346|-|-***-|-----|          |0101_111_011_111_100 [TRAPGT]
 10237:   //TPNLE                                           |A|--2346|-|-***-|-----|          |0101_111_011_111_100 [TRAPGT]
 10238:   //TRAPNLE                                         |A|--2346|-|-***-|-----|          |0101_111_011_111_100 [TRAPGT]
 10239:   public static void irpSgt () throws M68kException {
 10240:     int ea = XEiJ.regOC & 63;
 10241:     if (ea >> 3 == XEiJ.MMM_AR) {  //DBGT.W Dr,<label>
 10242:       int t = XEiJ.regPC;  //pc0+2
 10243:       XEiJ.regPC = t + 2;  //pc0+4
 10244:       t += mmuReadWordSignExword (t, XEiJ.regSRS);  //pc0+2+16bitディスプレースメント
 10245:       if ((t & 1) != 0) {  //分岐先のアドレスが奇数
 10246:         //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ
 10247:         irpBccAddressError (t);
 10248:       }
 10249:       if (XEiJ.MPU_CC_GT << XEiJ.regCCR < 0) {  //条件が成立しているので通過
 10250:         XEiJ.mpuCycleCount += 2;
 10251:       } else {  //条件が成立していないのでデクリメント
 10252:         int rrr = XEiJ.regOC & 7;
 10253:         int s = XEiJ.regRn[rrr];
 10254:         if ((short) s == 0) {  //Drの下位16bitが0なので通過
 10255:           XEiJ.mpuCycleCount += 2;
 10256:           XEiJ.regRn[rrr] = s + 65535;
 10257:         } else {  //Drの下位16bitが0でないので分岐
 10258:           XEiJ.mpuCycleCount++;
 10259:           XEiJ.regRn[rrr] = s - 1;  //下位16bitが0でないので上位16bitは変化しない
 10260:           irpSetPC (t);
 10261:         }
 10262:       }
 10263:     } else if (ea < XEiJ.EA_AR) {  //SGT.B Dr
 10264:       if (XEiJ.MPU_CC_GT << XEiJ.regCCR < 0) {  //セット
 10265:         XEiJ.mpuCycleCount++;
 10266:         XEiJ.regRn[ea] |= 0xff;
 10267:       } else {  //クリア
 10268:         XEiJ.mpuCycleCount++;
 10269:         XEiJ.regRn[ea] &= ~0xff;
 10270:       }
 10271:     } else if ((XEiJ.EAM_PW | XEiJ.EAM_PX | XEiJ.EAM_IM) << ea < 0L) {  //TRAPGT.W/TRAPGT.L/TRAPGT
 10272:       XEiJ.regPC += (ea & 3) + (ea & 1);  //111_010→2,111_011→4,111_100→0
 10273:       if (XEiJ.MPU_CC_GT << XEiJ.regCCR < 0) {
 10274:         //条件が成立しているのでTRAPする
 10275:         M68kException.m6eAddress = XEiJ.regPC0;  //アドレスは命令の先頭
 10276:         M68kException.m6eNumber = M68kException.M6E_TRAPV_INSTRUCTION;
 10277:         throw M68kException.m6eSignal;
 10278:       } else {
 10279:         //条件が成立していないのでTRAPしない
 10280:         XEiJ.mpuCycleCount++;
 10281:       }
 10282:     } else {  //SGT.B <mem>
 10283:       XEiJ.mpuCycleCount++;
 10284:       mmuWriteByteData (efaMltByte (ea), XEiJ.MPU_CC_GT << XEiJ.regCCR >> 31, XEiJ.regSRS);
 10285:     }
 10286:   }  //irpSgt
 10287: 
 10288:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10289:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 10290:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 10291:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10292:   //SLE.B <ea>                                      |-|012346|-|-***-|-----|D M+-WXZ  |0101_111_111_mmm_rrr
 10293:   //SNGT.B <ea>                                     |A|012346|-|-***-|-----|D M+-WXZ  |0101_111_111_mmm_rrr [SLE.B <ea>]
 10294:   //DBLE.W Dr,<label>                               |-|012346|-|-***-|-----|          |0101_111_111_001_rrr-{offset}
 10295:   //DBNGT.W Dr,<label>                              |A|012346|-|-***-|-----|          |0101_111_111_001_rrr-{offset}        [DBLE.W Dr,<label>]
 10296:   //TRAPLE.W #<data>                                |-|--2346|-|-***-|-----|          |0101_111_111_111_010-{data}
 10297:   //TPLE.W #<data>                                  |A|--2346|-|-***-|-----|          |0101_111_111_111_010-{data}  [TRAPLE.W #<data>]
 10298:   //TPNGT.W #<data>                                 |A|--2346|-|-***-|-----|          |0101_111_111_111_010-{data}  [TRAPLE.W #<data>]
 10299:   //TRAPNGT.W #<data>                               |A|--2346|-|-***-|-----|          |0101_111_111_111_010-{data}  [TRAPLE.W #<data>]
 10300:   //TRAPLE.L #<data>                                |-|--2346|-|-***-|-----|          |0101_111_111_111_011-{data}
 10301:   //TPLE.L #<data>                                  |A|--2346|-|-***-|-----|          |0101_111_111_111_011-{data}  [TRAPLE.L #<data>]
 10302:   //TPNGT.L #<data>                                 |A|--2346|-|-***-|-----|          |0101_111_111_111_011-{data}  [TRAPLE.L #<data>]
 10303:   //TRAPNGT.L #<data>                               |A|--2346|-|-***-|-----|          |0101_111_111_111_011-{data}  [TRAPLE.L #<data>]
 10304:   //TRAPLE                                          |-|--2346|-|-***-|-----|          |0101_111_111_111_100
 10305:   //TPLE                                            |A|--2346|-|-***-|-----|          |0101_111_111_111_100 [TRAPLE]
 10306:   //TPNGT                                           |A|--2346|-|-***-|-----|          |0101_111_111_111_100 [TRAPLE]
 10307:   //TRAPNGT                                         |A|--2346|-|-***-|-----|          |0101_111_111_111_100 [TRAPLE]
 10308:   public static void irpSle () throws M68kException {
 10309:     int ea = XEiJ.regOC & 63;
 10310:     if (ea >> 3 == XEiJ.MMM_AR) {  //DBLE.W Dr,<label>
 10311:       int t = XEiJ.regPC;  //pc0+2
 10312:       XEiJ.regPC = t + 2;  //pc0+4
 10313:       t += mmuReadWordSignExword (t, XEiJ.regSRS);  //pc0+2+16bitディスプレースメント
 10314:       if ((t & 1) != 0) {  //分岐先のアドレスが奇数
 10315:         //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ
 10316:         irpBccAddressError (t);
 10317:       }
 10318:       if (XEiJ.MPU_CC_LE << XEiJ.regCCR < 0) {  //条件が成立しているので通過
 10319:         XEiJ.mpuCycleCount += 2;
 10320:       } else {  //条件が成立していないのでデクリメント
 10321:         int rrr = XEiJ.regOC & 7;
 10322:         int s = XEiJ.regRn[rrr];
 10323:         if ((short) s == 0) {  //Drの下位16bitが0なので通過
 10324:           XEiJ.mpuCycleCount += 2;
 10325:           XEiJ.regRn[rrr] = s + 65535;
 10326:         } else {  //Drの下位16bitが0でないので分岐
 10327:           XEiJ.mpuCycleCount++;
 10328:           XEiJ.regRn[rrr] = s - 1;  //下位16bitが0でないので上位16bitは変化しない
 10329:           irpSetPC (t);
 10330:         }
 10331:       }
 10332:     } else if (ea < XEiJ.EA_AR) {  //SLE.B Dr
 10333:       if (XEiJ.MPU_CC_LE << XEiJ.regCCR < 0) {  //セット
 10334:         XEiJ.mpuCycleCount++;
 10335:         XEiJ.regRn[ea] |= 0xff;
 10336:       } else {  //クリア
 10337:         XEiJ.mpuCycleCount++;
 10338:         XEiJ.regRn[ea] &= ~0xff;
 10339:       }
 10340:     } else if ((XEiJ.EAM_PW | XEiJ.EAM_PX | XEiJ.EAM_IM) << ea < 0L) {  //TRAPLE.W/TRAPLE.L/TRAPLE
 10341:       XEiJ.regPC += (ea & 3) + (ea & 1);  //111_010→2,111_011→4,111_100→0
 10342:       if (XEiJ.MPU_CC_LE << XEiJ.regCCR < 0) {
 10343:         //条件が成立しているのでTRAPする
 10344:         M68kException.m6eAddress = XEiJ.regPC0;  //アドレスは命令の先頭
 10345:         M68kException.m6eNumber = M68kException.M6E_TRAPV_INSTRUCTION;
 10346:         throw M68kException.m6eSignal;
 10347:       } else {
 10348:         //条件が成立していないのでTRAPしない
 10349:         XEiJ.mpuCycleCount++;
 10350:       }
 10351:     } else {  //SLE.B <mem>
 10352:       XEiJ.mpuCycleCount++;
 10353:       mmuWriteByteData (efaMltByte (ea), XEiJ.MPU_CC_LE << XEiJ.regCCR >> 31, XEiJ.regSRS);
 10354:     }
 10355:   }  //irpSle
 10356: 
 10357:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10358:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 10359:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 10360:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10361:   //BRA.W <label>                                   |-|012346|-|-----|-----|          |0110_000_000_000_000-{offset}
 10362:   //JBRA.W <label>                                  |A|012346|-|-----|-----|          |0110_000_000_000_000-{offset}        [BRA.W <label>]
 10363:   //BRA.S <label>                                   |-|012346|-|-----|-----|          |0110_000_000_sss_sss (s is not equal to 0)
 10364:   //JBRA.S <label>                                  |A|012346|-|-----|-----|          |0110_000_000_sss_sss (s is not equal to 0)   [BRA.S <label>]
 10365:   public static void irpBrasw () throws M68kException {
 10366:     XEiJ.mpuCycleCount++;  //0clkにしない
 10367:     int t = XEiJ.regPC;  //pc0+2
 10368:     int s = (byte) XEiJ.regOC;  //オフセット
 10369:     if (s == 0) {  //BRA.W
 10370:       XEiJ.regPC = t + 2;
 10371:       s = mmuReadWordSignExword (t, XEiJ.regSRS);  //pcws
 10372:     }
 10373:     irpSetPC (t + s);  //pc0+2+オフセット
 10374:   }  //irpBrasw
 10375: 
 10376:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10377:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 10378:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 10379:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10380:   //BRA.S <label>                                   |-|012346|-|-----|-----|          |0110_000_001_sss_sss
 10381:   //JBRA.S <label>                                  |A|012346|-|-----|-----|          |0110_000_001_sss_sss [BRA.S <label>]
 10382:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10383:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 10384:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 10385:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10386:   //BRA.S <label>                                   |-|012346|-|-----|-----|          |0110_000_010_sss_sss
 10387:   //JBRA.S <label>                                  |A|012346|-|-----|-----|          |0110_000_010_sss_sss [BRA.S <label>]
 10388:   public static void irpBras () throws M68kException {
 10389:     XEiJ.mpuCycleCount++;  //0clkにしない
 10390:     irpSetPC (XEiJ.regPC + (byte) XEiJ.regOC);  //pc0+2+オフセット
 10391:   }  //irpBras
 10392: 
 10393:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10394:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 10395:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 10396:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10397:   //BRA.S <label>                                   |-|--2346|-|-----|-----|          |0110_000_011_sss_sss (s is not equal to 63)
 10398:   //JBRA.S <label>                                  |A|--2346|-|-----|-----|          |0110_000_011_sss_sss (s is not equal to 63)  [BRA.S <label>]
 10399:   //BRA.L <label>                                   |-|--2346|-|-----|-----|          |0110_000_011_111_111-{offset}
 10400:   public static void irpBrasl () throws M68kException {
 10401:     XEiJ.mpuCycleCount++;  //0clkにしない
 10402:     int t = XEiJ.regPC;  //pc0+2
 10403:     int s = (byte) XEiJ.regOC;  //オフセット
 10404:     if (s == -1) {  //BRA.L
 10405:       XEiJ.regPC = t + 4;
 10406:       s = mmuReadLongExword (t, XEiJ.regSRS);  //pcls
 10407:     }
 10408:     irpSetPC (t + s);  //pc0+2+オフセット
 10409:   }  //irpBrasl
 10410: 
 10411:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10412:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 10413:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 10414:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10415:   //BSR.W <label>                                   |-|012346|-|-----|-----|          |0110_000_100_000_000-{offset}
 10416:   //JBSR.W <label>                                  |A|012346|-|-----|-----|          |0110_000_100_000_000-{offset}        [BSR.W <label>]
 10417:   //BSR.S <label>                                   |-|012346|-|-----|-----|          |0110_000_100_sss_sss (s is not equal to 0)
 10418:   //JBSR.S <label>                                  |A|012346|-|-----|-----|          |0110_000_100_sss_sss (s is not equal to 0)   [BSR.S <label>]
 10419:   public static void irpBsrsw () throws M68kException {
 10420:     XEiJ.mpuCycleCount++;
 10421:     int t = XEiJ.regPC;  //pc0+2
 10422:     int s = (byte) XEiJ.regOC;  //オフセット
 10423:     if (s == 0) {  //BSR.W
 10424:       XEiJ.regPC = t + 2;
 10425:       s = mmuReadWordSignExword (t, XEiJ.regSRS);  //pcws
 10426:     }
 10427:     M68kException.m6eIncremented -= 4L << (7 << 3);
 10428:     mmuWriteLongData (XEiJ.regRn[15] -= 4, XEiJ.regPC, XEiJ.regSRS);  //pushl
 10429:     irpSetPC (t + s);  //pc0+2+オフセット
 10430:   }  //irpBsrsw
 10431: 
 10432:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10433:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 10434:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 10435:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10436:   //BSR.S <label>                                   |-|012346|-|-----|-----|          |0110_000_101_sss_sss
 10437:   //JBSR.S <label>                                  |A|012346|-|-----|-----|          |0110_000_101_sss_sss [BSR.S <label>]
 10438:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10439:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 10440:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 10441:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10442:   //BSR.S <label>                                   |-|012346|-|-----|-----|          |0110_000_110_sss_sss
 10443:   //JBSR.S <label>                                  |A|012346|-|-----|-----|          |0110_000_110_sss_sss [BSR.S <label>]
 10444:   public static void irpBsrs () throws M68kException {
 10445:     XEiJ.mpuCycleCount++;
 10446:     M68kException.m6eIncremented -= 4L << (7 << 3);
 10447:     mmuWriteLongData (XEiJ.regRn[15] -= 4, XEiJ.regPC, XEiJ.regSRS);  //pushl
 10448:     irpSetPC (XEiJ.regPC + (byte) XEiJ.regOC);  //pc0+2+オフセット
 10449:   }  //irpBsrs
 10450: 
 10451:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10452:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 10453:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 10454:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10455:   //BSR.S <label>                                   |-|--2346|-|-----|-----|          |0110_000_111_sss_sss (s is not equal to 63)
 10456:   //JBSR.S <label>                                  |A|--2346|-|-----|-----|          |0110_000_111_sss_sss (s is not equal to 63)  [BSR.S <label>]
 10457:   //BSR.L <label>                                   |-|--2346|-|-----|-----|          |0110_000_111_111_111-{offset}
 10458:   public static void irpBsrsl () throws M68kException {
 10459:     XEiJ.mpuCycleCount++;
 10460:     int t = XEiJ.regPC;  //pc0+2
 10461:     int s = (byte) XEiJ.regOC;  //オフセット
 10462:     if (s == -1) {  //BSR.L
 10463:       XEiJ.regPC = t + 4;
 10464:       s = mmuReadLongExword (t, XEiJ.regSRS);  //pcls
 10465:     }
 10466:     M68kException.m6eIncremented -= 4L << (7 << 3);
 10467:     mmuWriteLongData (XEiJ.regRn[15] -= 4, XEiJ.regPC, XEiJ.regSRS);  //pushl
 10468:     irpSetPC (t + s);  //pc0+2+オフセット
 10469:   }  //irpBsrsl
 10470: 
 10471:   //irpBccAddressError (int t)
 10472:   public static void irpBccAddressError (int t) throws M68kException {
 10473:     M68kException.m6eNumber = M68kException.M6E_ADDRESS_ERROR;
 10474:     M68kException.m6eAddress = t & -2;  //偶数にする
 10475:     M68kException.m6eDirection = XEiJ.MPU_WR_READ;
 10476:     M68kException.m6eSize = XEiJ.MPU_SS_WORD;
 10477:     throw M68kException.m6eSignal;
 10478:   }
 10479: 
 10480:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10481:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 10482:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 10483:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10484:   //BHI.W <label>                                   |-|012346|-|--*-*|-----|          |0110_001_000_000_000-{offset}
 10485:   //BNLS.W <label>                                  |A|012346|-|--*-*|-----|          |0110_001_000_000_000-{offset}        [BHI.W <label>]
 10486:   //JBHI.W <label>                                  |A|012346|-|--*-*|-----|          |0110_001_000_000_000-{offset}        [BHI.W <label>]
 10487:   //JBNLS.W <label>                                 |A|012346|-|--*-*|-----|          |0110_001_000_000_000-{offset}        [BHI.W <label>]
 10488:   //BHI.S <label>                                   |-|012346|-|--*-*|-----|          |0110_001_000_sss_sss (s is not equal to 0)
 10489:   //BNLS.S <label>                                  |A|012346|-|--*-*|-----|          |0110_001_000_sss_sss (s is not equal to 0)   [BHI.S <label>]
 10490:   //JBHI.S <label>                                  |A|012346|-|--*-*|-----|          |0110_001_000_sss_sss (s is not equal to 0)   [BHI.S <label>]
 10491:   //JBNLS.S <label>                                 |A|012346|-|--*-*|-----|          |0110_001_000_sss_sss (s is not equal to 0)   [BHI.S <label>]
 10492:   //JBLS.L <label>                                  |A|012346|-|--*-*|-----|          |0110_001_000_000_110-0100111011111001-{address}      [BHI.S (*)+8;JMP <label>]
 10493:   //JBNHI.L <label>                                 |A|012346|-|--*-*|-----|          |0110_001_000_000_110-0100111011111001-{address}      [BHI.S (*)+8;JMP <label>]
 10494:   public static void irpBhisw () throws M68kException {
 10495:     XEiJ.mpuCycleCount++;
 10496:     int t = XEiJ.regPC;  //pc0+2
 10497:     int s = (byte) XEiJ.regOC;  //8bitディスプレースメント
 10498:     if (s == 0) {  //Bcc.W
 10499:       XEiJ.regPC = t + 2;  //pc0+4
 10500:       s = mmuReadWordSignExword (t, XEiJ.regSRS);  //16bitディスプレースメント
 10501:     }
 10502:     t += s;  //pc0+2+ディスプレースメント
 10503:     if ((t & 1) != 0) {  //分岐先のアドレスが奇数
 10504:       //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ
 10505:       irpBccAddressError (t);
 10506:     }
 10507:     if (XEiJ.MPU_CC_HI << XEiJ.regCCR < 0) {  //分岐する
 10508:       irpSetPC (t);
 10509:     }
 10510:   }  //irpBhisw
 10511: 
 10512:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10513:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 10514:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 10515:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10516:   //BHI.S <label>                                   |-|012346|-|--*-*|-----|          |0110_001_001_sss_sss
 10517:   //BNLS.S <label>                                  |A|012346|-|--*-*|-----|          |0110_001_001_sss_sss [BHI.S <label>]
 10518:   //JBHI.S <label>                                  |A|012346|-|--*-*|-----|          |0110_001_001_sss_sss [BHI.S <label>]
 10519:   //JBNLS.S <label>                                 |A|012346|-|--*-*|-----|          |0110_001_001_sss_sss [BHI.S <label>]
 10520:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10521:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 10522:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 10523:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10524:   //BHI.S <label>                                   |-|012346|-|--*-*|-----|          |0110_001_010_sss_sss
 10525:   //BNLS.S <label>                                  |A|012346|-|--*-*|-----|          |0110_001_010_sss_sss [BHI.S <label>]
 10526:   //JBHI.S <label>                                  |A|012346|-|--*-*|-----|          |0110_001_010_sss_sss [BHI.S <label>]
 10527:   //JBNLS.S <label>                                 |A|012346|-|--*-*|-----|          |0110_001_010_sss_sss [BHI.S <label>]
 10528:   public static void irpBhis () throws M68kException {
 10529:     XEiJ.mpuCycleCount++;
 10530:     int t = XEiJ.regPC;  //pc0+2
 10531:     int s = (byte) XEiJ.regOC;  //8bitディスプレースメント
 10532:     t += s;  //pc0+2+ディスプレースメント
 10533:     if ((t & 1) != 0) {  //分岐先のアドレスが奇数
 10534:       //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ
 10535:       irpBccAddressError (t);
 10536:     }
 10537:     if (XEiJ.MPU_CC_HI << XEiJ.regCCR < 0) {  //分岐する
 10538:       irpSetPC (t);
 10539:     }
 10540:   }  //irpBhis
 10541: 
 10542:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10543:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 10544:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 10545:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10546:   //BHI.S <label>                                   |-|--2346|-|--*-*|-----|          |0110_001_011_sss_sss (s is not equal to 63)
 10547:   //BNLS.S <label>                                  |A|--2346|-|--*-*|-----|          |0110_001_011_sss_sss (s is not equal to 63)  [BHI.S <label>]
 10548:   //JBHI.S <label>                                  |A|--2346|-|--*-*|-----|          |0110_001_011_sss_sss (s is not equal to 63)  [BHI.S <label>]
 10549:   //JBNLS.S <label>                                 |A|--2346|-|--*-*|-----|          |0110_001_011_sss_sss (s is not equal to 63)  [BHI.S <label>]
 10550:   //BHI.L <label>                                   |-|--2346|-|--*-*|-----|          |0110_001_011_111_111-{offset}
 10551:   //BNLS.L <label>                                  |A|--2346|-|--*-*|-----|          |0110_001_011_111_111-{offset}        [BHI.L <label>]
 10552:   public static void irpBhisl () throws M68kException {
 10553:     XEiJ.mpuCycleCount++;
 10554:     int t = XEiJ.regPC;  //pc0+2
 10555:     int s = (byte) XEiJ.regOC;  //8bitディスプレースメント
 10556:     if (s == -1) {  //Bcc.L
 10557:       XEiJ.regPC = t + 4;  //pc0+6
 10558:       s = mmuReadLongExword (t, XEiJ.regSRS);  //32bitディスプレースメント
 10559:     }
 10560:     t += s;  //pc0+2+ディスプレースメント
 10561:     if ((t & 1) != 0) {  //分岐先のアドレスが奇数
 10562:       //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ
 10563:       irpBccAddressError (t);
 10564:     }
 10565:     if (XEiJ.MPU_CC_HI << XEiJ.regCCR < 0) {  //分岐する
 10566:       irpSetPC (t);
 10567:     }
 10568:   }  //irpBhisl
 10569: 
 10570:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10571:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 10572:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 10573:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10574:   //BLS.W <label>                                   |-|012346|-|--*-*|-----|          |0110_001_100_000_000-{offset}
 10575:   //BNHI.W <label>                                  |A|012346|-|--*-*|-----|          |0110_001_100_000_000-{offset}        [BLS.W <label>]
 10576:   //JBLS.W <label>                                  |A|012346|-|--*-*|-----|          |0110_001_100_000_000-{offset}        [BLS.W <label>]
 10577:   //JBNHI.W <label>                                 |A|012346|-|--*-*|-----|          |0110_001_100_000_000-{offset}        [BLS.W <label>]
 10578:   //BLS.S <label>                                   |-|012346|-|--*-*|-----|          |0110_001_100_sss_sss (s is not equal to 0)
 10579:   //BNHI.S <label>                                  |A|012346|-|--*-*|-----|          |0110_001_100_sss_sss (s is not equal to 0)   [BLS.S <label>]
 10580:   //JBLS.S <label>                                  |A|012346|-|--*-*|-----|          |0110_001_100_sss_sss (s is not equal to 0)   [BLS.S <label>]
 10581:   //JBNHI.S <label>                                 |A|012346|-|--*-*|-----|          |0110_001_100_sss_sss (s is not equal to 0)   [BLS.S <label>]
 10582:   //JBHI.L <label>                                  |A|012346|-|--*-*|-----|          |0110_001_100_000_110-0100111011111001-{address}      [BLS.S (*)+8;JMP <label>]
 10583:   //JBNLS.L <label>                                 |A|012346|-|--*-*|-----|          |0110_001_100_000_110-0100111011111001-{address}      [BLS.S (*)+8;JMP <label>]
 10584:   public static void irpBlssw () throws M68kException {
 10585:     XEiJ.mpuCycleCount++;
 10586:     int t = XEiJ.regPC;  //pc0+2
 10587:     int s = (byte) XEiJ.regOC;  //8bitディスプレースメント
 10588:     if (s == 0) {  //Bcc.W
 10589:       XEiJ.regPC = t + 2;  //pc0+4
 10590:       s = mmuReadWordSignExword (t, XEiJ.regSRS);  //16bitディスプレースメント
 10591:     }
 10592:     t += s;  //pc0+2+ディスプレースメント
 10593:     if ((t & 1) != 0) {  //分岐先のアドレスが奇数
 10594:       //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ
 10595:       irpBccAddressError (t);
 10596:     }
 10597:     if (XEiJ.MPU_CC_LS << XEiJ.regCCR < 0) {  //分岐する
 10598:       irpSetPC (t);
 10599:     }
 10600:   }  //irpBlssw
 10601: 
 10602:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10603:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 10604:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 10605:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10606:   //BLS.S <label>                                   |-|012346|-|--*-*|-----|          |0110_001_101_sss_sss
 10607:   //BNHI.S <label>                                  |A|012346|-|--*-*|-----|          |0110_001_101_sss_sss [BLS.S <label>]
 10608:   //JBLS.S <label>                                  |A|012346|-|--*-*|-----|          |0110_001_101_sss_sss [BLS.S <label>]
 10609:   //JBNHI.S <label>                                 |A|012346|-|--*-*|-----|          |0110_001_101_sss_sss [BLS.S <label>]
 10610:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10611:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 10612:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 10613:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10614:   //BLS.S <label>                                   |-|012346|-|--*-*|-----|          |0110_001_110_sss_sss
 10615:   //BNHI.S <label>                                  |A|012346|-|--*-*|-----|          |0110_001_110_sss_sss [BLS.S <label>]
 10616:   //JBLS.S <label>                                  |A|012346|-|--*-*|-----|          |0110_001_110_sss_sss [BLS.S <label>]
 10617:   //JBNHI.S <label>                                 |A|012346|-|--*-*|-----|          |0110_001_110_sss_sss [BLS.S <label>]
 10618:   public static void irpBlss () throws M68kException {
 10619:     XEiJ.mpuCycleCount++;
 10620:     int t = XEiJ.regPC;  //pc0+2
 10621:     int s = (byte) XEiJ.regOC;  //8bitディスプレースメント
 10622:     t += s;  //pc0+2+ディスプレースメント
 10623:     if ((t & 1) != 0) {  //分岐先のアドレスが奇数
 10624:       //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ
 10625:       irpBccAddressError (t);
 10626:     }
 10627:     if (XEiJ.MPU_CC_LS << XEiJ.regCCR < 0) {  //分岐する
 10628:       irpSetPC (t);
 10629:     }
 10630:   }  //irpBlss
 10631: 
 10632:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10633:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 10634:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 10635:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10636:   //BLS.S <label>                                   |-|--2346|-|--*-*|-----|          |0110_001_111_sss_sss (s is not equal to 63)
 10637:   //BNHI.S <label>                                  |A|--2346|-|--*-*|-----|          |0110_001_111_sss_sss (s is not equal to 63)  [BLS.S <label>]
 10638:   //JBLS.S <label>                                  |A|--2346|-|--*-*|-----|          |0110_001_111_sss_sss (s is not equal to 63)  [BLS.S <label>]
 10639:   //JBNHI.S <label>                                 |A|--2346|-|--*-*|-----|          |0110_001_111_sss_sss (s is not equal to 63)  [BLS.S <label>]
 10640:   //BLS.L <label>                                   |-|--2346|-|--*-*|-----|          |0110_001_111_111_111-{offset}
 10641:   //BNHI.L <label>                                  |A|--2346|-|--*-*|-----|          |0110_001_111_111_111-{offset}        [BLS.L <label>]
 10642:   public static void irpBlssl () throws M68kException {
 10643:     XEiJ.mpuCycleCount++;
 10644:     int t = XEiJ.regPC;  //pc0+2
 10645:     int s = (byte) XEiJ.regOC;  //8bitディスプレースメント
 10646:     if (s == -1) {  //Bcc.L
 10647:       XEiJ.regPC = t + 4;  //pc0+6
 10648:       s = mmuReadLongExword (t, XEiJ.regSRS);  //32bitディスプレースメント
 10649:     }
 10650:     t += s;  //pc0+2+ディスプレースメント
 10651:     if ((t & 1) != 0) {  //分岐先のアドレスが奇数
 10652:       //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ
 10653:       irpBccAddressError (t);
 10654:     }
 10655:     if (XEiJ.MPU_CC_LS << XEiJ.regCCR < 0) {  //分岐する
 10656:       irpSetPC (t);
 10657:     }
 10658:   }  //irpBlssl
 10659: 
 10660:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10661:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 10662:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 10663:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10664:   //BCC.W <label>                                   |-|012346|-|----*|-----|          |0110_010_000_000_000-{offset}
 10665:   //BHS.W <label>                                   |A|012346|-|----*|-----|          |0110_010_000_000_000-{offset}        [BCC.W <label>]
 10666:   //BNCS.W <label>                                  |A|012346|-|----*|-----|          |0110_010_000_000_000-{offset}        [BCC.W <label>]
 10667:   //BNLO.W <label>                                  |A|012346|-|----*|-----|          |0110_010_000_000_000-{offset}        [BCC.W <label>]
 10668:   //JBCC.W <label>                                  |A|012346|-|----*|-----|          |0110_010_000_000_000-{offset}        [BCC.W <label>]
 10669:   //JBHS.W <label>                                  |A|012346|-|----*|-----|          |0110_010_000_000_000-{offset}        [BCC.W <label>]
 10670:   //JBNCS.W <label>                                 |A|012346|-|----*|-----|          |0110_010_000_000_000-{offset}        [BCC.W <label>]
 10671:   //JBNLO.W <label>                                 |A|012346|-|----*|-----|          |0110_010_000_000_000-{offset}        [BCC.W <label>]
 10672:   //BCC.S <label>                                   |-|012346|-|----*|-----|          |0110_010_000_sss_sss (s is not equal to 0)
 10673:   //BHS.S <label>                                   |A|012346|-|----*|-----|          |0110_010_000_sss_sss (s is not equal to 0)   [BCC.S <label>]
 10674:   //BNCS.S <label>                                  |A|012346|-|----*|-----|          |0110_010_000_sss_sss (s is not equal to 0)   [BCC.S <label>]
 10675:   //BNLO.S <label>                                  |A|012346|-|----*|-----|          |0110_010_000_sss_sss (s is not equal to 0)   [BCC.S <label>]
 10676:   //JBCC.S <label>                                  |A|012346|-|----*|-----|          |0110_010_000_sss_sss (s is not equal to 0)   [BCC.S <label>]
 10677:   //JBHS.S <label>                                  |A|012346|-|----*|-----|          |0110_010_000_sss_sss (s is not equal to 0)   [BCC.S <label>]
 10678:   //JBNCS.S <label>                                 |A|012346|-|----*|-----|          |0110_010_000_sss_sss (s is not equal to 0)   [BCC.S <label>]
 10679:   //JBNLO.S <label>                                 |A|012346|-|----*|-----|          |0110_010_000_sss_sss (s is not equal to 0)   [BCC.S <label>]
 10680:   //JBCS.L <label>                                  |A|012346|-|----*|-----|          |0110_010_000_000_110-0100111011111001-{address}      [BCC.S (*)+8;JMP <label>]
 10681:   //JBLO.L <label>                                  |A|012346|-|----*|-----|          |0110_010_000_000_110-0100111011111001-{address}      [BCC.S (*)+8;JMP <label>]
 10682:   //JBNCC.L <label>                                 |A|012346|-|----*|-----|          |0110_010_000_000_110-0100111011111001-{address}      [BCC.S (*)+8;JMP <label>]
 10683:   //JBNHS.L <label>                                 |A|012346|-|----*|-----|          |0110_010_000_000_110-0100111011111001-{address}      [BCC.S (*)+8;JMP <label>]
 10684:   public static void irpBhssw () throws M68kException {
 10685:     XEiJ.mpuCycleCount++;
 10686:     int t = XEiJ.regPC;  //pc0+2
 10687:     int s = (byte) XEiJ.regOC;  //8bitディスプレースメント
 10688:     if (s == 0) {  //Bcc.W
 10689:       XEiJ.regPC = t + 2;  //pc0+4
 10690:       s = mmuReadWordSignExword (t, XEiJ.regSRS);  //16bitディスプレースメント
 10691:     }
 10692:     t += s;  //pc0+2+ディスプレースメント
 10693:     if ((t & 1) != 0) {  //分岐先のアドレスが奇数
 10694:       //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ
 10695:       irpBccAddressError (t);
 10696:     }
 10697:     if (XEiJ.MPU_CC_HS << XEiJ.regCCR < 0) {  //分岐する
 10698:       irpSetPC (t);
 10699:     }
 10700:   }  //irpBhssw
 10701: 
 10702:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10703:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 10704:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 10705:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10706:   //BCC.S <label>                                   |-|012346|-|----*|-----|          |0110_010_001_sss_sss
 10707:   //BHS.S <label>                                   |A|012346|-|----*|-----|          |0110_010_001_sss_sss [BCC.S <label>]
 10708:   //BNCS.S <label>                                  |A|012346|-|----*|-----|          |0110_010_001_sss_sss [BCC.S <label>]
 10709:   //BNLO.S <label>                                  |A|012346|-|----*|-----|          |0110_010_001_sss_sss [BCC.S <label>]
 10710:   //JBCC.S <label>                                  |A|012346|-|----*|-----|          |0110_010_001_sss_sss [BCC.S <label>]
 10711:   //JBHS.S <label>                                  |A|012346|-|----*|-----|          |0110_010_001_sss_sss [BCC.S <label>]
 10712:   //JBNCS.S <label>                                 |A|012346|-|----*|-----|          |0110_010_001_sss_sss [BCC.S <label>]
 10713:   //JBNLO.S <label>                                 |A|012346|-|----*|-----|          |0110_010_001_sss_sss [BCC.S <label>]
 10714:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10715:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 10716:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 10717:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10718:   //BCC.S <label>                                   |-|012346|-|----*|-----|          |0110_010_010_sss_sss
 10719:   //BHS.S <label>                                   |A|012346|-|----*|-----|          |0110_010_010_sss_sss [BCC.S <label>]
 10720:   //BNCS.S <label>                                  |A|012346|-|----*|-----|          |0110_010_010_sss_sss [BCC.S <label>]
 10721:   //BNLO.S <label>                                  |A|012346|-|----*|-----|          |0110_010_010_sss_sss [BCC.S <label>]
 10722:   //JBCC.S <label>                                  |A|012346|-|----*|-----|          |0110_010_010_sss_sss [BCC.S <label>]
 10723:   //JBHS.S <label>                                  |A|012346|-|----*|-----|          |0110_010_010_sss_sss [BCC.S <label>]
 10724:   //JBNCS.S <label>                                 |A|012346|-|----*|-----|          |0110_010_010_sss_sss [BCC.S <label>]
 10725:   //JBNLO.S <label>                                 |A|012346|-|----*|-----|          |0110_010_010_sss_sss [BCC.S <label>]
 10726:   public static void irpBhss () throws M68kException {
 10727:     XEiJ.mpuCycleCount++;
 10728:     int t = XEiJ.regPC;  //pc0+2
 10729:     int s = (byte) XEiJ.regOC;  //8bitディスプレースメント
 10730:     t += s;  //pc0+2+ディスプレースメント
 10731:     if ((t & 1) != 0) {  //分岐先のアドレスが奇数
 10732:       //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ
 10733:       irpBccAddressError (t);
 10734:     }
 10735:     if (XEiJ.MPU_CC_HS << XEiJ.regCCR < 0) {  //分岐する
 10736:       irpSetPC (t);
 10737:     }
 10738:   }  //irpBhss
 10739: 
 10740:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10741:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 10742:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 10743:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10744:   //BCC.S <label>                                   |-|--2346|-|----*|-----|          |0110_010_011_sss_sss (s is not equal to 63)
 10745:   //BHS.S <label>                                   |A|--2346|-|----*|-----|          |0110_010_011_sss_sss (s is not equal to 63)  [BCC.S <label>]
 10746:   //BNCS.S <label>                                  |A|--2346|-|----*|-----|          |0110_010_011_sss_sss (s is not equal to 63)  [BCC.S <label>]
 10747:   //BNLO.S <label>                                  |A|--2346|-|----*|-----|          |0110_010_011_sss_sss (s is not equal to 63)  [BCC.S <label>]
 10748:   //JBCC.S <label>                                  |A|--2346|-|----*|-----|          |0110_010_011_sss_sss (s is not equal to 63)  [BCC.S <label>]
 10749:   //JBHS.S <label>                                  |A|--2346|-|----*|-----|          |0110_010_011_sss_sss (s is not equal to 63)  [BCC.S <label>]
 10750:   //JBNCS.S <label>                                 |A|--2346|-|----*|-----|          |0110_010_011_sss_sss (s is not equal to 63)  [BCC.S <label>]
 10751:   //JBNLO.S <label>                                 |A|--2346|-|----*|-----|          |0110_010_011_sss_sss (s is not equal to 63)  [BCC.S <label>]
 10752:   //BCC.L <label>                                   |-|--2346|-|----*|-----|          |0110_010_011_111_111-{offset}
 10753:   //BHS.L <label>                                   |A|--2346|-|----*|-----|          |0110_010_011_111_111-{offset}        [BCC.L <label>]
 10754:   //BNCS.L <label>                                  |A|--2346|-|----*|-----|          |0110_010_011_111_111-{offset}        [BCC.L <label>]
 10755:   //BNLO.L <label>                                  |A|--2346|-|----*|-----|          |0110_010_011_111_111-{offset}        [BCC.L <label>]
 10756:   public static void irpBhssl () throws M68kException {
 10757:     XEiJ.mpuCycleCount++;
 10758:     int t = XEiJ.regPC;  //pc0+2
 10759:     int s = (byte) XEiJ.regOC;  //8bitディスプレースメント
 10760:     if (s == -1) {  //Bcc.L
 10761:       XEiJ.regPC = t + 4;  //pc0+6
 10762:       s = mmuReadLongExword (t, XEiJ.regSRS);  //32bitディスプレースメント
 10763:     }
 10764:     t += s;  //pc0+2+ディスプレースメント
 10765:     if ((t & 1) != 0) {  //分岐先のアドレスが奇数
 10766:       //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ
 10767:       irpBccAddressError (t);
 10768:     }
 10769:     if (XEiJ.MPU_CC_HS << XEiJ.regCCR < 0) {  //分岐する
 10770:       irpSetPC (t);
 10771:     }
 10772:   }  //irpBhssl
 10773: 
 10774:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10775:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 10776:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 10777:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10778:   //BCS.W <label>                                   |-|012346|-|----*|-----|          |0110_010_100_000_000-{offset}
 10779:   //BLO.W <label>                                   |A|012346|-|----*|-----|          |0110_010_100_000_000-{offset}        [BCS.W <label>]
 10780:   //BNCC.W <label>                                  |A|012346|-|----*|-----|          |0110_010_100_000_000-{offset}        [BCS.W <label>]
 10781:   //BNHS.W <label>                                  |A|012346|-|----*|-----|          |0110_010_100_000_000-{offset}        [BCS.W <label>]
 10782:   //JBCS.W <label>                                  |A|012346|-|----*|-----|          |0110_010_100_000_000-{offset}        [BCS.W <label>]
 10783:   //JBLO.W <label>                                  |A|012346|-|----*|-----|          |0110_010_100_000_000-{offset}        [BCS.W <label>]
 10784:   //JBNCC.W <label>                                 |A|012346|-|----*|-----|          |0110_010_100_000_000-{offset}        [BCS.W <label>]
 10785:   //JBNHS.W <label>                                 |A|012346|-|----*|-----|          |0110_010_100_000_000-{offset}        [BCS.W <label>]
 10786:   //BCS.S <label>                                   |-|012346|-|----*|-----|          |0110_010_100_sss_sss (s is not equal to 0)
 10787:   //BLO.S <label>                                   |A|012346|-|----*|-----|          |0110_010_100_sss_sss (s is not equal to 0)   [BCS.S <label>]
 10788:   //BNCC.S <label>                                  |A|012346|-|----*|-----|          |0110_010_100_sss_sss (s is not equal to 0)   [BCS.S <label>]
 10789:   //BNHS.S <label>                                  |A|012346|-|----*|-----|          |0110_010_100_sss_sss (s is not equal to 0)   [BCS.S <label>]
 10790:   //JBCS.S <label>                                  |A|012346|-|----*|-----|          |0110_010_100_sss_sss (s is not equal to 0)   [BCS.S <label>]
 10791:   //JBLO.S <label>                                  |A|012346|-|----*|-----|          |0110_010_100_sss_sss (s is not equal to 0)   [BCS.S <label>]
 10792:   //JBNCC.S <label>                                 |A|012346|-|----*|-----|          |0110_010_100_sss_sss (s is not equal to 0)   [BCS.S <label>]
 10793:   //JBNHS.S <label>                                 |A|012346|-|----*|-----|          |0110_010_100_sss_sss (s is not equal to 0)   [BCS.S <label>]
 10794:   //JBCC.L <label>                                  |A|012346|-|----*|-----|          |0110_010_100_000_110-0100111011111001-{address}      [BCS.S (*)+8;JMP <label>]
 10795:   //JBHS.L <label>                                  |A|012346|-|----*|-----|          |0110_010_100_000_110-0100111011111001-{address}      [BCS.S (*)+8;JMP <label>]
 10796:   //JBNCS.L <label>                                 |A|012346|-|----*|-----|          |0110_010_100_000_110-0100111011111001-{address}      [BCS.S (*)+8;JMP <label>]
 10797:   //JBNLO.L <label>                                 |A|012346|-|----*|-----|          |0110_010_100_000_110-0100111011111001-{address}      [BCS.S (*)+8;JMP <label>]
 10798:   public static void irpBlosw () throws M68kException {
 10799:     XEiJ.mpuCycleCount++;
 10800:     int t = XEiJ.regPC;  //pc0+2
 10801:     int s = (byte) XEiJ.regOC;  //8bitディスプレースメント
 10802:     if (s == 0) {  //Bcc.W
 10803:       XEiJ.regPC = t + 2;  //pc0+4
 10804:       s = mmuReadWordSignExword (t, XEiJ.regSRS);  //16bitディスプレースメント
 10805:     }
 10806:     t += s;  //pc0+2+ディスプレースメント
 10807:     if ((t & 1) != 0) {  //分岐先のアドレスが奇数
 10808:       //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ
 10809:       irpBccAddressError (t);
 10810:     }
 10811:     if (XEiJ.MPU_CC_LO << XEiJ.regCCR < 0) {  //分岐する
 10812:       irpSetPC (t);
 10813:     }
 10814:   }  //irpBlosw
 10815: 
 10816:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10817:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 10818:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 10819:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10820:   //BCS.S <label>                                   |-|012346|-|----*|-----|          |0110_010_101_sss_sss
 10821:   //BLO.S <label>                                   |A|012346|-|----*|-----|          |0110_010_101_sss_sss [BCS.S <label>]
 10822:   //BNCC.S <label>                                  |A|012346|-|----*|-----|          |0110_010_101_sss_sss [BCS.S <label>]
 10823:   //BNHS.S <label>                                  |A|012346|-|----*|-----|          |0110_010_101_sss_sss [BCS.S <label>]
 10824:   //JBCS.S <label>                                  |A|012346|-|----*|-----|          |0110_010_101_sss_sss [BCS.S <label>]
 10825:   //JBLO.S <label>                                  |A|012346|-|----*|-----|          |0110_010_101_sss_sss [BCS.S <label>]
 10826:   //JBNCC.S <label>                                 |A|012346|-|----*|-----|          |0110_010_101_sss_sss [BCS.S <label>]
 10827:   //JBNHS.S <label>                                 |A|012346|-|----*|-----|          |0110_010_101_sss_sss [BCS.S <label>]
 10828:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10829:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 10830:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 10831:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10832:   //BCS.S <label>                                   |-|012346|-|----*|-----|          |0110_010_110_sss_sss
 10833:   //BLO.S <label>                                   |A|012346|-|----*|-----|          |0110_010_110_sss_sss [BCS.S <label>]
 10834:   //BNCC.S <label>                                  |A|012346|-|----*|-----|          |0110_010_110_sss_sss [BCS.S <label>]
 10835:   //BNHS.S <label>                                  |A|012346|-|----*|-----|          |0110_010_110_sss_sss [BCS.S <label>]
 10836:   //JBCS.S <label>                                  |A|012346|-|----*|-----|          |0110_010_110_sss_sss [BCS.S <label>]
 10837:   //JBLO.S <label>                                  |A|012346|-|----*|-----|          |0110_010_110_sss_sss [BCS.S <label>]
 10838:   //JBNCC.S <label>                                 |A|012346|-|----*|-----|          |0110_010_110_sss_sss [BCS.S <label>]
 10839:   //JBNHS.S <label>                                 |A|012346|-|----*|-----|          |0110_010_110_sss_sss [BCS.S <label>]
 10840:   public static void irpBlos () throws M68kException {
 10841:     XEiJ.mpuCycleCount++;
 10842:     int t = XEiJ.regPC;  //pc0+2
 10843:     int s = (byte) XEiJ.regOC;  //8bitディスプレースメント
 10844:     t += s;  //pc0+2+ディスプレースメント
 10845:     if ((t & 1) != 0) {  //分岐先のアドレスが奇数
 10846:       //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ
 10847:       irpBccAddressError (t);
 10848:     }
 10849:     if (XEiJ.MPU_CC_LO << XEiJ.regCCR < 0) {  //分岐する
 10850:       irpSetPC (t);
 10851:     }
 10852:   }  //irpBlos
 10853: 
 10854:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10855:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 10856:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 10857:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10858:   //BCS.S <label>                                   |-|--2346|-|----*|-----|          |0110_010_111_sss_sss (s is not equal to 63)
 10859:   //BLO.S <label>                                   |A|--2346|-|----*|-----|          |0110_010_111_sss_sss (s is not equal to 63)  [BCS.S <label>]
 10860:   //BNCC.S <label>                                  |A|--2346|-|----*|-----|          |0110_010_111_sss_sss (s is not equal to 63)  [BCS.S <label>]
 10861:   //BNHS.S <label>                                  |A|--2346|-|----*|-----|          |0110_010_111_sss_sss (s is not equal to 63)  [BCS.S <label>]
 10862:   //JBCS.S <label>                                  |A|--2346|-|----*|-----|          |0110_010_111_sss_sss (s is not equal to 63)  [BCS.S <label>]
 10863:   //JBLO.S <label>                                  |A|--2346|-|----*|-----|          |0110_010_111_sss_sss (s is not equal to 63)  [BCS.S <label>]
 10864:   //JBNCC.S <label>                                 |A|--2346|-|----*|-----|          |0110_010_111_sss_sss (s is not equal to 63)  [BCS.S <label>]
 10865:   //JBNHS.S <label>                                 |A|--2346|-|----*|-----|          |0110_010_111_sss_sss (s is not equal to 63)  [BCS.S <label>]
 10866:   //BCS.L <label>                                   |-|--2346|-|----*|-----|          |0110_010_111_111_111-{offset}
 10867:   //BLO.L <label>                                   |A|--2346|-|----*|-----|          |0110_010_111_111_111-{offset}        [BCS.L <label>]
 10868:   //BNCC.L <label>                                  |A|--2346|-|----*|-----|          |0110_010_111_111_111-{offset}        [BCS.L <label>]
 10869:   //BNHS.L <label>                                  |A|--2346|-|----*|-----|          |0110_010_111_111_111-{offset}        [BCS.L <label>]
 10870:   public static void irpBlosl () throws M68kException {
 10871:     XEiJ.mpuCycleCount++;
 10872:     int t = XEiJ.regPC;  //pc0+2
 10873:     int s = (byte) XEiJ.regOC;  //8bitディスプレースメント
 10874:     if (s == -1) {  //Bcc.L
 10875:       XEiJ.regPC = t + 4;  //pc0+6
 10876:       s = mmuReadLongExword (t, XEiJ.regSRS);  //32bitディスプレースメント
 10877:     }
 10878:     t += s;  //pc0+2+ディスプレースメント
 10879:     if ((t & 1) != 0) {  //分岐先のアドレスが奇数
 10880:       //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ
 10881:       irpBccAddressError (t);
 10882:     }
 10883:     if (XEiJ.MPU_CC_LO << XEiJ.regCCR < 0) {  //分岐する
 10884:       irpSetPC (t);
 10885:     }
 10886:   }  //irpBlosl
 10887: 
 10888:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10889:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 10890:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 10891:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10892:   //BNE.W <label>                                   |-|012346|-|--*--|-----|          |0110_011_000_000_000-{offset}
 10893:   //BNEQ.W <label>                                  |A|012346|-|--*--|-----|          |0110_011_000_000_000-{offset}        [BNE.W <label>]
 10894:   //BNZ.W <label>                                   |A|012346|-|--*--|-----|          |0110_011_000_000_000-{offset}        [BNE.W <label>]
 10895:   //BNZE.W <label>                                  |A|012346|-|--*--|-----|          |0110_011_000_000_000-{offset}        [BNE.W <label>]
 10896:   //JBNE.W <label>                                  |A|012346|-|--*--|-----|          |0110_011_000_000_000-{offset}        [BNE.W <label>]
 10897:   //JBNEQ.W <label>                                 |A|012346|-|--*--|-----|          |0110_011_000_000_000-{offset}        [BNE.W <label>]
 10898:   //JBNZ.W <label>                                  |A|012346|-|--*--|-----|          |0110_011_000_000_000-{offset}        [BNE.W <label>]
 10899:   //JBNZE.W <label>                                 |A|012346|-|--*--|-----|          |0110_011_000_000_000-{offset}        [BNE.W <label>]
 10900:   //BNE.S <label>                                   |-|012346|-|--*--|-----|          |0110_011_000_sss_sss (s is not equal to 0)
 10901:   //BNEQ.S <label>                                  |A|012346|-|--*--|-----|          |0110_011_000_sss_sss (s is not equal to 0)   [BNE.S <label>]
 10902:   //BNZ.S <label>                                   |A|012346|-|--*--|-----|          |0110_011_000_sss_sss (s is not equal to 0)   [BNE.S <label>]
 10903:   //BNZE.S <label>                                  |A|012346|-|--*--|-----|          |0110_011_000_sss_sss (s is not equal to 0)   [BNE.S <label>]
 10904:   //JBNE.S <label>                                  |A|012346|-|--*--|-----|          |0110_011_000_sss_sss (s is not equal to 0)   [BNE.S <label>]
 10905:   //JBNEQ.S <label>                                 |A|012346|-|--*--|-----|          |0110_011_000_sss_sss (s is not equal to 0)   [BNE.S <label>]
 10906:   //JBNZ.S <label>                                  |A|012346|-|--*--|-----|          |0110_011_000_sss_sss (s is not equal to 0)   [BNE.S <label>]
 10907:   //JBNZE.S <label>                                 |A|012346|-|--*--|-----|          |0110_011_000_sss_sss (s is not equal to 0)   [BNE.S <label>]
 10908:   //JBEQ.L <label>                                  |A|012346|-|--*--|-----|          |0110_011_000_000_110-0100111011111001-{address}      [BNE.S (*)+8;JMP <label>]
 10909:   //JBNEQ.L <label>                                 |A|012346|-|--*--|-----|          |0110_011_000_000_110-0100111011111001-{address}      [BNE.S (*)+8;JMP <label>]
 10910:   //JBNNE.L <label>                                 |A|012346|-|--*--|-----|          |0110_011_000_000_110-0100111011111001-{address}      [BNE.S (*)+8;JMP <label>]
 10911:   //JBNNZ.L <label>                                 |A|012346|-|--*--|-----|          |0110_011_000_000_110-0100111011111001-{address}      [BNE.S (*)+8;JMP <label>]
 10912:   //JBNZ.L <label>                                  |A|012346|-|--*--|-----|          |0110_011_000_000_110-0100111011111001-{address}      [BNE.S (*)+8;JMP <label>]
 10913:   //JBNZE.L <label>                                 |A|012346|-|--*--|-----|          |0110_011_000_000_110-0100111011111001-{address}      [BNE.S (*)+8;JMP <label>]
 10914:   //JBZE.L <label>                                  |A|012346|-|--*--|-----|          |0110_011_000_000_110-0100111011111001-{address}      [BNE.S (*)+8;JMP <label>]
 10915:   public static void irpBnesw () throws M68kException {
 10916:     XEiJ.mpuCycleCount++;
 10917:     int t = XEiJ.regPC;  //pc0+2
 10918:     int s = (byte) XEiJ.regOC;  //8bitディスプレースメント
 10919:     if (s == 0) {  //Bcc.W
 10920:       XEiJ.regPC = t + 2;  //pc0+4
 10921:       s = mmuReadWordSignExword (t, XEiJ.regSRS);  //16bitディスプレースメント
 10922:     }
 10923:     t += s;  //pc0+2+ディスプレースメント
 10924:     if ((t & 1) != 0) {  //分岐先のアドレスが奇数
 10925:       //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ
 10926:       irpBccAddressError (t);
 10927:     }
 10928:     if (XEiJ.MPU_CC_NE << XEiJ.regCCR < 0) {  //分岐する
 10929:       irpSetPC (t);
 10930:     }
 10931:   }  //irpBnesw
 10932: 
 10933:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10934:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 10935:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 10936:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10937:   //BNE.S <label>                                   |-|012346|-|--*--|-----|          |0110_011_001_sss_sss
 10938:   //BNEQ.S <label>                                  |A|012346|-|--*--|-----|          |0110_011_001_sss_sss [BNE.S <label>]
 10939:   //BNZ.S <label>                                   |A|012346|-|--*--|-----|          |0110_011_001_sss_sss [BNE.S <label>]
 10940:   //BNZE.S <label>                                  |A|012346|-|--*--|-----|          |0110_011_001_sss_sss [BNE.S <label>]
 10941:   //JBNE.S <label>                                  |A|012346|-|--*--|-----|          |0110_011_001_sss_sss [BNE.S <label>]
 10942:   //JBNEQ.S <label>                                 |A|012346|-|--*--|-----|          |0110_011_001_sss_sss [BNE.S <label>]
 10943:   //JBNZ.S <label>                                  |A|012346|-|--*--|-----|          |0110_011_001_sss_sss [BNE.S <label>]
 10944:   //JBNZE.S <label>                                 |A|012346|-|--*--|-----|          |0110_011_001_sss_sss [BNE.S <label>]
 10945:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10946:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 10947:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 10948:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10949:   //BNE.S <label>                                   |-|012346|-|--*--|-----|          |0110_011_010_sss_sss
 10950:   //BNEQ.S <label>                                  |A|012346|-|--*--|-----|          |0110_011_010_sss_sss [BNE.S <label>]
 10951:   //BNZ.S <label>                                   |A|012346|-|--*--|-----|          |0110_011_010_sss_sss [BNE.S <label>]
 10952:   //BNZE.S <label>                                  |A|012346|-|--*--|-----|          |0110_011_010_sss_sss [BNE.S <label>]
 10953:   //JBNE.S <label>                                  |A|012346|-|--*--|-----|          |0110_011_010_sss_sss [BNE.S <label>]
 10954:   //JBNEQ.S <label>                                 |A|012346|-|--*--|-----|          |0110_011_010_sss_sss [BNE.S <label>]
 10955:   //JBNZ.S <label>                                  |A|012346|-|--*--|-----|          |0110_011_010_sss_sss [BNE.S <label>]
 10956:   //JBNZE.S <label>                                 |A|012346|-|--*--|-----|          |0110_011_010_sss_sss [BNE.S <label>]
 10957:   public static void irpBnes () throws M68kException {
 10958:     XEiJ.mpuCycleCount++;
 10959:     int t = XEiJ.regPC;  //pc0+2
 10960:     int s = (byte) XEiJ.regOC;  //8bitディスプレースメント
 10961:     t += s;  //pc0+2+ディスプレースメント
 10962:     if ((t & 1) != 0) {  //分岐先のアドレスが奇数
 10963:       //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ
 10964:       irpBccAddressError (t);
 10965:     }
 10966:     if (XEiJ.MPU_CC_NE << XEiJ.regCCR < 0) {  //分岐する
 10967:       irpSetPC (t);
 10968:     }
 10969:   }  //irpBnes
 10970: 
 10971:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10972:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 10973:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 10974:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10975:   //BNE.S <label>                                   |-|--2346|-|--*--|-----|          |0110_011_011_sss_sss (s is not equal to 63)
 10976:   //BNEQ.S <label>                                  |A|--2346|-|--*--|-----|          |0110_011_011_sss_sss (s is not equal to 63)  [BNE.S <label>]
 10977:   //BNZ.S <label>                                   |A|--2346|-|--*--|-----|          |0110_011_011_sss_sss (s is not equal to 63)  [BNE.S <label>]
 10978:   //BNZE.S <label>                                  |A|--2346|-|--*--|-----|          |0110_011_011_sss_sss (s is not equal to 63)  [BNE.S <label>]
 10979:   //JBNE.S <label>                                  |A|--2346|-|--*--|-----|          |0110_011_011_sss_sss (s is not equal to 63)  [BNE.S <label>]
 10980:   //JBNEQ.S <label>                                 |A|--2346|-|--*--|-----|          |0110_011_011_sss_sss (s is not equal to 63)  [BNE.S <label>]
 10981:   //JBNZ.S <label>                                  |A|--2346|-|--*--|-----|          |0110_011_011_sss_sss (s is not equal to 63)  [BNE.S <label>]
 10982:   //JBNZE.S <label>                                 |A|--2346|-|--*--|-----|          |0110_011_011_sss_sss (s is not equal to 63)  [BNE.S <label>]
 10983:   //BNE.L <label>                                   |-|--2346|-|--*--|-----|          |0110_011_011_111_111-{offset}
 10984:   //BNEQ.L <label>                                  |A|--2346|-|--*--|-----|          |0110_011_011_111_111-{offset}        [BNE.L <label>]
 10985:   //BNZ.L <label>                                   |A|--2346|-|--*--|-----|          |0110_011_011_111_111-{offset}        [BNE.L <label>]
 10986:   //BNZE.L <label>                                  |A|--2346|-|--*--|-----|          |0110_011_011_111_111-{offset}        [BNE.L <label>]
 10987:   public static void irpBnesl () throws M68kException {
 10988:     XEiJ.mpuCycleCount++;
 10989:     int t = XEiJ.regPC;  //pc0+2
 10990:     int s = (byte) XEiJ.regOC;  //8bitディスプレースメント
 10991:     if (s == -1) {  //Bcc.L
 10992:       XEiJ.regPC = t + 4;  //pc0+6
 10993:       s = mmuReadLongExword (t, XEiJ.regSRS);  //32bitディスプレースメント
 10994:     }
 10995:     t += s;  //pc0+2+ディスプレースメント
 10996:     if ((t & 1) != 0) {  //分岐先のアドレスが奇数
 10997:       //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ
 10998:       irpBccAddressError (t);
 10999:     }
 11000:     if (XEiJ.MPU_CC_NE << XEiJ.regCCR < 0) {  //分岐する
 11001:       irpSetPC (t);
 11002:     }
 11003:   }  //irpBnesl
 11004: 
 11005:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11006:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 11007:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 11008:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11009:   //BEQ.W <label>                                   |-|012346|-|--*--|-----|          |0110_011_100_000_000-{offset}
 11010:   //BNNE.W <label>                                  |A|012346|-|--*--|-----|          |0110_011_100_000_000-{offset}        [BEQ.W <label>]
 11011:   //BNNZ.W <label>                                  |A|012346|-|--*--|-----|          |0110_011_100_000_000-{offset}        [BEQ.W <label>]
 11012:   //BZE.W <label>                                   |A|012346|-|--*--|-----|          |0110_011_100_000_000-{offset}        [BEQ.W <label>]
 11013:   //JBEQ.W <label>                                  |A|012346|-|--*--|-----|          |0110_011_100_000_000-{offset}        [BEQ.W <label>]
 11014:   //JBNNE.W <label>                                 |A|012346|-|--*--|-----|          |0110_011_100_000_000-{offset}        [BEQ.W <label>]
 11015:   //JBNNZ.W <label>                                 |A|012346|-|--*--|-----|          |0110_011_100_000_000-{offset}        [BEQ.W <label>]
 11016:   //JBZE.W <label>                                  |A|012346|-|--*--|-----|          |0110_011_100_000_000-{offset}        [BEQ.W <label>]
 11017:   //BEQ.S <label>                                   |-|012346|-|--*--|-----|          |0110_011_100_sss_sss (s is not equal to 0)
 11018:   //BNNE.S <label>                                  |A|012346|-|--*--|-----|          |0110_011_100_sss_sss (s is not equal to 0)   [BEQ.S <label>]
 11019:   //BNNZ.S <label>                                  |A|012346|-|--*--|-----|          |0110_011_100_sss_sss (s is not equal to 0)   [BEQ.S <label>]
 11020:   //BZE.S <label>                                   |A|012346|-|--*--|-----|          |0110_011_100_sss_sss (s is not equal to 0)   [BEQ.S <label>]
 11021:   //JBEQ.S <label>                                  |A|012346|-|--*--|-----|          |0110_011_100_sss_sss (s is not equal to 0)   [BEQ.S <label>]
 11022:   //JBNNE.S <label>                                 |A|012346|-|--*--|-----|          |0110_011_100_sss_sss (s is not equal to 0)   [BEQ.S <label>]
 11023:   //JBNNZ.S <label>                                 |A|012346|-|--*--|-----|          |0110_011_100_sss_sss (s is not equal to 0)   [BEQ.S <label>]
 11024:   //JBZE.S <label>                                  |A|012346|-|--*--|-----|          |0110_011_100_sss_sss (s is not equal to 0)   [BEQ.S <label>]
 11025:   //JBNE.L <label>                                  |A|012346|-|--*--|-----|          |0110_011_100_000_110-0100111011111001-{address}      [BEQ.S (*)+8;JMP <label>]
 11026:   public static void irpBeqsw () throws M68kException {
 11027:     XEiJ.mpuCycleCount++;
 11028:     int t = XEiJ.regPC;  //pc0+2
 11029:     int s = (byte) XEiJ.regOC;  //8bitディスプレースメント
 11030:     if (s == 0) {  //Bcc.W
 11031:       XEiJ.regPC = t + 2;  //pc0+4
 11032:       s = mmuReadWordSignExword (t, XEiJ.regSRS);  //16bitディスプレースメント
 11033:     }
 11034:     t += s;  //pc0+2+ディスプレースメント
 11035:     if ((t & 1) != 0) {  //分岐先のアドレスが奇数
 11036:       //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ
 11037:       irpBccAddressError (t);
 11038:     }
 11039:     if (XEiJ.MPU_CC_EQ << XEiJ.regCCR < 0) {  //分岐する
 11040:       irpSetPC (t);
 11041:     }
 11042:   }  //irpBeqsw
 11043: 
 11044:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11045:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 11046:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 11047:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11048:   //BEQ.S <label>                                   |-|012346|-|--*--|-----|          |0110_011_101_sss_sss
 11049:   //BNNE.S <label>                                  |A|012346|-|--*--|-----|          |0110_011_101_sss_sss [BEQ.S <label>]
 11050:   //BNNZ.S <label>                                  |A|012346|-|--*--|-----|          |0110_011_101_sss_sss [BEQ.S <label>]
 11051:   //BZE.S <label>                                   |A|012346|-|--*--|-----|          |0110_011_101_sss_sss [BEQ.S <label>]
 11052:   //JBEQ.S <label>                                  |A|012346|-|--*--|-----|          |0110_011_101_sss_sss [BEQ.S <label>]
 11053:   //JBNNE.S <label>                                 |A|012346|-|--*--|-----|          |0110_011_101_sss_sss [BEQ.S <label>]
 11054:   //JBNNZ.S <label>                                 |A|012346|-|--*--|-----|          |0110_011_101_sss_sss [BEQ.S <label>]
 11055:   //JBZE.S <label>                                  |A|012346|-|--*--|-----|          |0110_011_101_sss_sss [BEQ.S <label>]
 11056:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11057:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 11058:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 11059:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11060:   //BEQ.S <label>                                   |-|012346|-|--*--|-----|          |0110_011_110_sss_sss
 11061:   //BNNE.S <label>                                  |A|012346|-|--*--|-----|          |0110_011_110_sss_sss [BEQ.S <label>]
 11062:   //BNNZ.S <label>                                  |A|012346|-|--*--|-----|          |0110_011_110_sss_sss [BEQ.S <label>]
 11063:   //BZE.S <label>                                   |A|012346|-|--*--|-----|          |0110_011_110_sss_sss [BEQ.S <label>]
 11064:   //JBEQ.S <label>                                  |A|012346|-|--*--|-----|          |0110_011_110_sss_sss [BEQ.S <label>]
 11065:   //JBNNE.S <label>                                 |A|012346|-|--*--|-----|          |0110_011_110_sss_sss [BEQ.S <label>]
 11066:   //JBNNZ.S <label>                                 |A|012346|-|--*--|-----|          |0110_011_110_sss_sss [BEQ.S <label>]
 11067:   //JBZE.S <label>                                  |A|012346|-|--*--|-----|          |0110_011_110_sss_sss [BEQ.S <label>]
 11068:   public static void irpBeqs () throws M68kException {
 11069:     XEiJ.mpuCycleCount++;
 11070:     int t = XEiJ.regPC;  //pc0+2
 11071:     int s = (byte) XEiJ.regOC;  //8bitディスプレースメント
 11072:     t += s;  //pc0+2+ディスプレースメント
 11073:     if ((t & 1) != 0) {  //分岐先のアドレスが奇数
 11074:       //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ
 11075:       irpBccAddressError (t);
 11076:     }
 11077:     if (XEiJ.MPU_CC_EQ << XEiJ.regCCR < 0) {  //分岐する
 11078:       irpSetPC (t);
 11079:     }
 11080:   }  //irpBeqs
 11081: 
 11082:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11083:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 11084:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 11085:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11086:   //BEQ.S <label>                                   |-|--2346|-|--*--|-----|          |0110_011_111_sss_sss (s is not equal to 63)
 11087:   //BNNE.S <label>                                  |A|--2346|-|--*--|-----|          |0110_011_111_sss_sss (s is not equal to 63)  [BEQ.S <label>]
 11088:   //BNNZ.S <label>                                  |A|--2346|-|--*--|-----|          |0110_011_111_sss_sss (s is not equal to 63)  [BEQ.S <label>]
 11089:   //BZE.S <label>                                   |A|--2346|-|--*--|-----|          |0110_011_111_sss_sss (s is not equal to 63)  [BEQ.S <label>]
 11090:   //JBEQ.S <label>                                  |A|--2346|-|--*--|-----|          |0110_011_111_sss_sss (s is not equal to 63)  [BEQ.S <label>]
 11091:   //JBNNE.S <label>                                 |A|--2346|-|--*--|-----|          |0110_011_111_sss_sss (s is not equal to 63)  [BEQ.S <label>]
 11092:   //JBNNZ.S <label>                                 |A|--2346|-|--*--|-----|          |0110_011_111_sss_sss (s is not equal to 63)  [BEQ.S <label>]
 11093:   //JBZE.S <label>                                  |A|--2346|-|--*--|-----|          |0110_011_111_sss_sss (s is not equal to 63)  [BEQ.S <label>]
 11094:   //BEQ.L <label>                                   |-|--2346|-|--*--|-----|          |0110_011_111_111_111-{offset}
 11095:   //BNNE.L <label>                                  |A|--2346|-|--*--|-----|          |0110_011_111_111_111-{offset}        [BEQ.L <label>]
 11096:   //BNNZ.L <label>                                  |A|--2346|-|--*--|-----|          |0110_011_111_111_111-{offset}        [BEQ.L <label>]
 11097:   //BZE.L <label>                                   |A|--2346|-|--*--|-----|          |0110_011_111_111_111-{offset}        [BEQ.L <label>]
 11098:   public static void irpBeqsl () throws M68kException {
 11099:     XEiJ.mpuCycleCount++;
 11100:     int t = XEiJ.regPC;  //pc0+2
 11101:     int s = (byte) XEiJ.regOC;  //8bitディスプレースメント
 11102:     if (s == -1) {  //Bcc.L
 11103:       XEiJ.regPC = t + 4;  //pc0+6
 11104:       s = mmuReadLongExword (t, XEiJ.regSRS);  //32bitディスプレースメント
 11105:     }
 11106:     t += s;  //pc0+2+ディスプレースメント
 11107:     if ((t & 1) != 0) {  //分岐先のアドレスが奇数
 11108:       //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ
 11109:       irpBccAddressError (t);
 11110:     }
 11111:     if (XEiJ.MPU_CC_EQ << XEiJ.regCCR < 0) {  //分岐する
 11112:       irpSetPC (t);
 11113:     }
 11114:   }  //irpBeqsl
 11115: 
 11116:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11117:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 11118:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 11119:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11120:   //BVC.W <label>                                   |-|012346|-|---*-|-----|          |0110_100_000_000_000-{offset}
 11121:   //BNVS.W <label>                                  |A|012346|-|---*-|-----|          |0110_100_000_000_000-{offset}        [BVC.W <label>]
 11122:   //JBNVS.W <label>                                 |A|012346|-|---*-|-----|          |0110_100_000_000_000-{offset}        [BVC.W <label>]
 11123:   //JBVC.W <label>                                  |A|012346|-|---*-|-----|          |0110_100_000_000_000-{offset}        [BVC.W <label>]
 11124:   //BVC.S <label>                                   |-|012346|-|---*-|-----|          |0110_100_000_sss_sss (s is not equal to 0)
 11125:   //BNVS.S <label>                                  |A|012346|-|---*-|-----|          |0110_100_000_sss_sss (s is not equal to 0)   [BVC.S <label>]
 11126:   //JBNVS.S <label>                                 |A|012346|-|---*-|-----|          |0110_100_000_sss_sss (s is not equal to 0)   [BVC.S <label>]
 11127:   //JBVC.S <label>                                  |A|012346|-|---*-|-----|          |0110_100_000_sss_sss (s is not equal to 0)   [BVC.S <label>]
 11128:   //JBNVC.L <label>                                 |A|012346|-|---*-|-----|          |0110_100_000_000_110-0100111011111001-{address}      [BVC.S (*)+8;JMP <label>]
 11129:   //JBVS.L <label>                                  |A|012346|-|---*-|-----|          |0110_100_000_000_110-0100111011111001-{address}      [BVC.S (*)+8;JMP <label>]
 11130:   public static void irpBvcsw () throws M68kException {
 11131:     XEiJ.mpuCycleCount++;
 11132:     int t = XEiJ.regPC;  //pc0+2
 11133:     int s = (byte) XEiJ.regOC;  //8bitディスプレースメント
 11134:     if (s == 0) {  //Bcc.W
 11135:       XEiJ.regPC = t + 2;  //pc0+4
 11136:       s = mmuReadWordSignExword (t, XEiJ.regSRS);  //16bitディスプレースメント
 11137:     }
 11138:     t += s;  //pc0+2+ディスプレースメント
 11139:     if ((t & 1) != 0) {  //分岐先のアドレスが奇数
 11140:       //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ
 11141:       irpBccAddressError (t);
 11142:     }
 11143:     if (XEiJ.MPU_CC_VC << XEiJ.regCCR < 0) {  //分岐する
 11144:       irpSetPC (t);
 11145:     }
 11146:   }  //irpBvcsw
 11147: 
 11148:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11149:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 11150:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 11151:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11152:   //BVC.S <label>                                   |-|012346|-|---*-|-----|          |0110_100_001_sss_sss
 11153:   //BNVS.S <label>                                  |A|012346|-|---*-|-----|          |0110_100_001_sss_sss [BVC.S <label>]
 11154:   //JBNVS.S <label>                                 |A|012346|-|---*-|-----|          |0110_100_001_sss_sss [BVC.S <label>]
 11155:   //JBVC.S <label>                                  |A|012346|-|---*-|-----|          |0110_100_001_sss_sss [BVC.S <label>]
 11156:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11157:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 11158:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 11159:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11160:   //BVC.S <label>                                   |-|012346|-|---*-|-----|          |0110_100_010_sss_sss
 11161:   //BNVS.S <label>                                  |A|012346|-|---*-|-----|          |0110_100_010_sss_sss [BVC.S <label>]
 11162:   //JBNVS.S <label>                                 |A|012346|-|---*-|-----|          |0110_100_010_sss_sss [BVC.S <label>]
 11163:   //JBVC.S <label>                                  |A|012346|-|---*-|-----|          |0110_100_010_sss_sss [BVC.S <label>]
 11164:   public static void irpBvcs () throws M68kException {
 11165:     XEiJ.mpuCycleCount++;
 11166:     int t = XEiJ.regPC;  //pc0+2
 11167:     int s = (byte) XEiJ.regOC;  //8bitディスプレースメント
 11168:     t += s;  //pc0+2+ディスプレースメント
 11169:     if ((t & 1) != 0) {  //分岐先のアドレスが奇数
 11170:       //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ
 11171:       irpBccAddressError (t);
 11172:     }
 11173:     if (XEiJ.MPU_CC_VC << XEiJ.regCCR < 0) {  //分岐する
 11174:       irpSetPC (t);
 11175:     }
 11176:   }  //irpBvcs
 11177: 
 11178:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11179:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 11180:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 11181:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11182:   //BVC.S <label>                                   |-|--2346|-|---*-|-----|          |0110_100_011_sss_sss (s is not equal to 63)
 11183:   //BNVS.S <label>                                  |A|--2346|-|---*-|-----|          |0110_100_011_sss_sss (s is not equal to 63)  [BVC.S <label>]
 11184:   //JBNVS.S <label>                                 |A|--2346|-|---*-|-----|          |0110_100_011_sss_sss (s is not equal to 63)  [BVC.S <label>]
 11185:   //JBVC.S <label>                                  |A|--2346|-|---*-|-----|          |0110_100_011_sss_sss (s is not equal to 63)  [BVC.S <label>]
 11186:   //BVC.L <label>                                   |-|--2346|-|---*-|-----|          |0110_100_011_111_111-{offset}
 11187:   //BNVS.L <label>                                  |A|--2346|-|---*-|-----|          |0110_100_011_111_111-{offset}        [BVC.L <label>]
 11188:   public static void irpBvcsl () throws M68kException {
 11189:     XEiJ.mpuCycleCount++;
 11190:     int t = XEiJ.regPC;  //pc0+2
 11191:     int s = (byte) XEiJ.regOC;  //8bitディスプレースメント
 11192:     if (s == -1) {  //Bcc.L
 11193:       XEiJ.regPC = t + 4;  //pc0+6
 11194:       s = mmuReadLongExword (t, XEiJ.regSRS);  //32bitディスプレースメント
 11195:     }
 11196:     t += s;  //pc0+2+ディスプレースメント
 11197:     if ((t & 1) != 0) {  //分岐先のアドレスが奇数
 11198:       //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ
 11199:       irpBccAddressError (t);
 11200:     }
 11201:     if (XEiJ.MPU_CC_VC << XEiJ.regCCR < 0) {  //分岐する
 11202:       irpSetPC (t);
 11203:     }
 11204:   }  //irpBvcsl
 11205: 
 11206:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11207:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 11208:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 11209:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11210:   //BVS.W <label>                                   |-|012346|-|---*-|-----|          |0110_100_100_000_000-{offset}
 11211:   //BNVC.W <label>                                  |A|012346|-|---*-|-----|          |0110_100_100_000_000-{offset}        [BVS.W <label>]
 11212:   //JBNVC.W <label>                                 |A|012346|-|---*-|-----|          |0110_100_100_000_000-{offset}        [BVS.W <label>]
 11213:   //JBVS.W <label>                                  |A|012346|-|---*-|-----|          |0110_100_100_000_000-{offset}        [BVS.W <label>]
 11214:   //BVS.S <label>                                   |-|012346|-|---*-|-----|          |0110_100_100_sss_sss (s is not equal to 0)
 11215:   //BNVC.S <label>                                  |A|012346|-|---*-|-----|          |0110_100_100_sss_sss (s is not equal to 0)   [BVS.S <label>]
 11216:   //JBNVC.S <label>                                 |A|012346|-|---*-|-----|          |0110_100_100_sss_sss (s is not equal to 0)   [BVS.S <label>]
 11217:   //JBVS.S <label>                                  |A|012346|-|---*-|-----|          |0110_100_100_sss_sss (s is not equal to 0)   [BVS.S <label>]
 11218:   //JBNVS.L <label>                                 |A|012346|-|---*-|-----|          |0110_100_100_000_110-0100111011111001-{address}      [BVS.S (*)+8;JMP <label>]
 11219:   //JBVC.L <label>                                  |A|012346|-|---*-|-----|          |0110_100_100_000_110-0100111011111001-{address}      [BVS.S (*)+8;JMP <label>]
 11220:   public static void irpBvssw () throws M68kException {
 11221:     XEiJ.mpuCycleCount++;
 11222:     int t = XEiJ.regPC;  //pc0+2
 11223:     int s = (byte) XEiJ.regOC;  //8bitディスプレースメント
 11224:     if (s == 0) {  //Bcc.W
 11225:       XEiJ.regPC = t + 2;  //pc0+4
 11226:       s = mmuReadWordSignExword (t, XEiJ.regSRS);  //16bitディスプレースメント
 11227:     }
 11228:     t += s;  //pc0+2+ディスプレースメント
 11229:     if ((t & 1) != 0) {  //分岐先のアドレスが奇数
 11230:       //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ
 11231:       irpBccAddressError (t);
 11232:     }
 11233:     if (XEiJ.MPU_CC_VS << XEiJ.regCCR < 0) {  //分岐する
 11234:       irpSetPC (t);
 11235:     }
 11236:   }  //irpBvssw
 11237: 
 11238:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11239:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 11240:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 11241:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11242:   //BVS.S <label>                                   |-|012346|-|---*-|-----|          |0110_100_101_sss_sss
 11243:   //BNVC.S <label>                                  |A|012346|-|---*-|-----|          |0110_100_101_sss_sss [BVS.S <label>]
 11244:   //JBNVC.S <label>                                 |A|012346|-|---*-|-----|          |0110_100_101_sss_sss [BVS.S <label>]
 11245:   //JBVS.S <label>                                  |A|012346|-|---*-|-----|          |0110_100_101_sss_sss [BVS.S <label>]
 11246:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11247:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 11248:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 11249:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11250:   //BVS.S <label>                                   |-|012346|-|---*-|-----|          |0110_100_110_sss_sss
 11251:   //BNVC.S <label>                                  |A|012346|-|---*-|-----|          |0110_100_110_sss_sss [BVS.S <label>]
 11252:   //JBNVC.S <label>                                 |A|012346|-|---*-|-----|          |0110_100_110_sss_sss [BVS.S <label>]
 11253:   //JBVS.S <label>                                  |A|012346|-|---*-|-----|          |0110_100_110_sss_sss [BVS.S <label>]
 11254:   public static void irpBvss () throws M68kException {
 11255:     XEiJ.mpuCycleCount++;
 11256:     int t = XEiJ.regPC;  //pc0+2
 11257:     int s = (byte) XEiJ.regOC;  //8bitディスプレースメント
 11258:     t += s;  //pc0+2+ディスプレースメント
 11259:     if ((t & 1) != 0) {  //分岐先のアドレスが奇数
 11260:       //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ
 11261:       irpBccAddressError (t);
 11262:     }
 11263:     if (XEiJ.MPU_CC_VS << XEiJ.regCCR < 0) {  //分岐する
 11264:       irpSetPC (t);
 11265:     }
 11266:   }  //irpBvss
 11267: 
 11268:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11269:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 11270:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 11271:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11272:   //BVS.S <label>                                   |-|--2346|-|---*-|-----|          |0110_100_111_sss_sss (s is not equal to 63)
 11273:   //BNVC.S <label>                                  |A|--2346|-|---*-|-----|          |0110_100_111_sss_sss (s is not equal to 63)  [BVS.S <label>]
 11274:   //JBNVC.S <label>                                 |A|--2346|-|---*-|-----|          |0110_100_111_sss_sss (s is not equal to 63)  [BVS.S <label>]
 11275:   //JBVS.S <label>                                  |A|--2346|-|---*-|-----|          |0110_100_111_sss_sss (s is not equal to 63)  [BVS.S <label>]
 11276:   //BVS.L <label>                                   |-|--2346|-|---*-|-----|          |0110_100_111_111_111-{offset}
 11277:   //BNVC.L <label>                                  |A|--2346|-|---*-|-----|          |0110_100_111_111_111-{offset}        [BVS.L <label>]
 11278:   public static void irpBvssl () throws M68kException {
 11279:     XEiJ.mpuCycleCount++;
 11280:     int t = XEiJ.regPC;  //pc0+2
 11281:     int s = (byte) XEiJ.regOC;  //8bitディスプレースメント
 11282:     if (s == -1) {  //Bcc.L
 11283:       XEiJ.regPC = t + 4;  //pc0+6
 11284:       s = mmuReadLongExword (t, XEiJ.regSRS);  //32bitディスプレースメント
 11285:     }
 11286:     t += s;  //pc0+2+ディスプレースメント
 11287:     if ((t & 1) != 0) {  //分岐先のアドレスが奇数
 11288:       //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ
 11289:       irpBccAddressError (t);
 11290:     }
 11291:     if (XEiJ.MPU_CC_VS << XEiJ.regCCR < 0) {  //分岐する
 11292:       irpSetPC (t);
 11293:     }
 11294:   }  //irpBvssl
 11295: 
 11296:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11297:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 11298:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 11299:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11300:   //BPL.W <label>                                   |-|012346|-|-*---|-----|          |0110_101_000_000_000-{offset}
 11301:   //BNMI.W <label>                                  |A|012346|-|-*---|-----|          |0110_101_000_000_000-{offset}        [BPL.W <label>]
 11302:   //JBNMI.W <label>                                 |A|012346|-|-*---|-----|          |0110_101_000_000_000-{offset}        [BPL.W <label>]
 11303:   //JBPL.W <label>                                  |A|012346|-|-*---|-----|          |0110_101_000_000_000-{offset}        [BPL.W <label>]
 11304:   //BPL.S <label>                                   |-|012346|-|-*---|-----|          |0110_101_000_sss_sss (s is not equal to 0)
 11305:   //BNMI.S <label>                                  |A|012346|-|-*---|-----|          |0110_101_000_sss_sss (s is not equal to 0)   [BPL.S <label>]
 11306:   //JBNMI.S <label>                                 |A|012346|-|-*---|-----|          |0110_101_000_sss_sss (s is not equal to 0)   [BPL.S <label>]
 11307:   //JBPL.S <label>                                  |A|012346|-|-*---|-----|          |0110_101_000_sss_sss (s is not equal to 0)   [BPL.S <label>]
 11308:   //JBMI.L <label>                                  |A|012346|-|-*---|-----|          |0110_101_000_000_110-0100111011111001-{address}      [BPL.S (*)+8;JMP <label>]
 11309:   //JBNPL.L <label>                                 |A|012346|-|-*---|-----|          |0110_101_000_000_110-0100111011111001-{address}      [BPL.S (*)+8;JMP <label>]
 11310:   public static void irpBplsw () throws M68kException {
 11311:     XEiJ.mpuCycleCount++;
 11312:     int t = XEiJ.regPC;  //pc0+2
 11313:     int s = (byte) XEiJ.regOC;  //8bitディスプレースメント
 11314:     if (s == 0) {  //Bcc.W
 11315:       XEiJ.regPC = t + 2;  //pc0+4
 11316:       s = mmuReadWordSignExword (t, XEiJ.regSRS);  //16bitディスプレースメント
 11317:     }
 11318:     t += s;  //pc0+2+ディスプレースメント
 11319:     if ((t & 1) != 0) {  //分岐先のアドレスが奇数
 11320:       //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ
 11321:       irpBccAddressError (t);
 11322:     }
 11323:     if (XEiJ.MPU_CC_PL << XEiJ.regCCR < 0) {  //分岐する
 11324:       irpSetPC (t);
 11325:     }
 11326:   }  //irpBplsw
 11327: 
 11328:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11329:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 11330:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 11331:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11332:   //BPL.S <label>                                   |-|012346|-|-*---|-----|          |0110_101_001_sss_sss
 11333:   //BNMI.S <label>                                  |A|012346|-|-*---|-----|          |0110_101_001_sss_sss [BPL.S <label>]
 11334:   //JBNMI.S <label>                                 |A|012346|-|-*---|-----|          |0110_101_001_sss_sss [BPL.S <label>]
 11335:   //JBPL.S <label>                                  |A|012346|-|-*---|-----|          |0110_101_001_sss_sss [BPL.S <label>]
 11336:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11337:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 11338:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 11339:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11340:   //BPL.S <label>                                   |-|012346|-|-*---|-----|          |0110_101_010_sss_sss
 11341:   //BNMI.S <label>                                  |A|012346|-|-*---|-----|          |0110_101_010_sss_sss [BPL.S <label>]
 11342:   //JBNMI.S <label>                                 |A|012346|-|-*---|-----|          |0110_101_010_sss_sss [BPL.S <label>]
 11343:   //JBPL.S <label>                                  |A|012346|-|-*---|-----|          |0110_101_010_sss_sss [BPL.S <label>]
 11344:   public static void irpBpls () throws M68kException {
 11345:     XEiJ.mpuCycleCount++;
 11346:     int t = XEiJ.regPC;  //pc0+2
 11347:     int s = (byte) XEiJ.regOC;  //8bitディスプレースメント
 11348:     t += s;  //pc0+2+ディスプレースメント
 11349:     if ((t & 1) != 0) {  //分岐先のアドレスが奇数
 11350:       //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ
 11351:       irpBccAddressError (t);
 11352:     }
 11353:     if (XEiJ.MPU_CC_PL << XEiJ.regCCR < 0) {  //分岐する
 11354:       irpSetPC (t);
 11355:     }
 11356:   }  //irpBpls
 11357: 
 11358:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11359:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 11360:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 11361:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11362:   //BPL.S <label>                                   |-|--2346|-|-*---|-----|          |0110_101_011_sss_sss (s is not equal to 63)
 11363:   //BNMI.S <label>                                  |A|--2346|-|-*---|-----|          |0110_101_011_sss_sss (s is not equal to 63)  [BPL.S <label>]
 11364:   //JBNMI.S <label>                                 |A|--2346|-|-*---|-----|          |0110_101_011_sss_sss (s is not equal to 63)  [BPL.S <label>]
 11365:   //JBPL.S <label>                                  |A|--2346|-|-*---|-----|          |0110_101_011_sss_sss (s is not equal to 63)  [BPL.S <label>]
 11366:   //BPL.L <label>                                   |-|--2346|-|-*---|-----|          |0110_101_011_111_111-{offset}
 11367:   //BNMI.L <label>                                  |A|--2346|-|-*---|-----|          |0110_101_011_111_111-{offset}        [BPL.L <label>]
 11368:   public static void irpBplsl () throws M68kException {
 11369:     XEiJ.mpuCycleCount++;
 11370:     int t = XEiJ.regPC;  //pc0+2
 11371:     int s = (byte) XEiJ.regOC;  //8bitディスプレースメント
 11372:     if (s == -1) {  //Bcc.L
 11373:       XEiJ.regPC = t + 4;  //pc0+6
 11374:       s = mmuReadLongExword (t, XEiJ.regSRS);  //32bitディスプレースメント
 11375:     }
 11376:     t += s;  //pc0+2+ディスプレースメント
 11377:     if ((t & 1) != 0) {  //分岐先のアドレスが奇数
 11378:       //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ
 11379:       irpBccAddressError (t);
 11380:     }
 11381:     if (XEiJ.MPU_CC_PL << XEiJ.regCCR < 0) {  //分岐する
 11382:       irpSetPC (t);
 11383:     }
 11384:   }  //irpBplsl
 11385: 
 11386:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11387:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 11388:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 11389:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11390:   //BMI.W <label>                                   |-|012346|-|-*---|-----|          |0110_101_100_000_000-{offset}
 11391:   //BNPL.W <label>                                  |A|012346|-|-*---|-----|          |0110_101_100_000_000-{offset}        [BMI.W <label>]
 11392:   //JBMI.W <label>                                  |A|012346|-|-*---|-----|          |0110_101_100_000_000-{offset}        [BMI.W <label>]
 11393:   //JBNPL.W <label>                                 |A|012346|-|-*---|-----|          |0110_101_100_000_000-{offset}        [BMI.W <label>]
 11394:   //BMI.S <label>                                   |-|012346|-|-*---|-----|          |0110_101_100_sss_sss (s is not equal to 0)
 11395:   //BNPL.S <label>                                  |A|012346|-|-*---|-----|          |0110_101_100_sss_sss (s is not equal to 0)   [BMI.S <label>]
 11396:   //JBMI.S <label>                                  |A|012346|-|-*---|-----|          |0110_101_100_sss_sss (s is not equal to 0)   [BMI.S <label>]
 11397:   //JBNPL.S <label>                                 |A|012346|-|-*---|-----|          |0110_101_100_sss_sss (s is not equal to 0)   [BMI.S <label>]
 11398:   //JBNMI.L <label>                                 |A|012346|-|-*---|-----|          |0110_101_100_000_110-0100111011111001-{address}      [BMI.S (*)+8;JMP <label>]
 11399:   //JBPL.L <label>                                  |A|012346|-|-*---|-----|          |0110_101_100_000_110-0100111011111001-{address}      [BMI.S (*)+8;JMP <label>]
 11400:   public static void irpBmisw () throws M68kException {
 11401:     XEiJ.mpuCycleCount++;
 11402:     int t = XEiJ.regPC;  //pc0+2
 11403:     int s = (byte) XEiJ.regOC;  //8bitディスプレースメント
 11404:     if (s == 0) {  //Bcc.W
 11405:       XEiJ.regPC = t + 2;  //pc0+4
 11406:       s = mmuReadWordSignExword (t, XEiJ.regSRS);  //16bitディスプレースメント
 11407:     }
 11408:     t += s;  //pc0+2+ディスプレースメント
 11409:     if ((t & 1) != 0) {  //分岐先のアドレスが奇数
 11410:       //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ
 11411:       irpBccAddressError (t);
 11412:     }
 11413:     if (XEiJ.MPU_CC_MI << XEiJ.regCCR < 0) {  //分岐する
 11414:       irpSetPC (t);
 11415:     }
 11416:   }  //irpBmisw
 11417: 
 11418:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11419:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 11420:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 11421:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11422:   //BMI.S <label>                                   |-|012346|-|-*---|-----|          |0110_101_101_sss_sss
 11423:   //BNPL.S <label>                                  |A|012346|-|-*---|-----|          |0110_101_101_sss_sss [BMI.S <label>]
 11424:   //JBMI.S <label>                                  |A|012346|-|-*---|-----|          |0110_101_101_sss_sss [BMI.S <label>]
 11425:   //JBNPL.S <label>                                 |A|012346|-|-*---|-----|          |0110_101_101_sss_sss [BMI.S <label>]
 11426:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11427:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 11428:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 11429:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11430:   //BMI.S <label>                                   |-|012346|-|-*---|-----|          |0110_101_110_sss_sss
 11431:   //BNPL.S <label>                                  |A|012346|-|-*---|-----|          |0110_101_110_sss_sss [BMI.S <label>]
 11432:   //JBMI.S <label>                                  |A|012346|-|-*---|-----|          |0110_101_110_sss_sss [BMI.S <label>]
 11433:   //JBNPL.S <label>                                 |A|012346|-|-*---|-----|          |0110_101_110_sss_sss [BMI.S <label>]
 11434:   public static void irpBmis () throws M68kException {
 11435:     XEiJ.mpuCycleCount++;
 11436:     int t = XEiJ.regPC;  //pc0+2
 11437:     int s = (byte) XEiJ.regOC;  //8bitディスプレースメント
 11438:     t += s;  //pc0+2+ディスプレースメント
 11439:     if ((t & 1) != 0) {  //分岐先のアドレスが奇数
 11440:       //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ
 11441:       irpBccAddressError (t);
 11442:     }
 11443:     if (XEiJ.MPU_CC_MI << XEiJ.regCCR < 0) {  //分岐する
 11444:       irpSetPC (t);
 11445:     }
 11446:   }  //irpBmis
 11447: 
 11448:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11449:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 11450:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 11451:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11452:   //BMI.S <label>                                   |-|--2346|-|-*---|-----|          |0110_101_111_sss_sss (s is not equal to 63)
 11453:   //BNPL.S <label>                                  |A|--2346|-|-*---|-----|          |0110_101_111_sss_sss (s is not equal to 63)  [BMI.S <label>]
 11454:   //JBMI.S <label>                                  |A|--2346|-|-*---|-----|          |0110_101_111_sss_sss (s is not equal to 63)  [BMI.S <label>]
 11455:   //JBNPL.S <label>                                 |A|--2346|-|-*---|-----|          |0110_101_111_sss_sss (s is not equal to 63)  [BMI.S <label>]
 11456:   //BMI.L <label>                                   |-|--2346|-|-*---|-----|          |0110_101_111_111_111-{offset}
 11457:   //BNPL.L <label>                                  |A|--2346|-|-*---|-----|          |0110_101_111_111_111-{offset}        [BMI.L <label>]
 11458:   public static void irpBmisl () throws M68kException {
 11459:     XEiJ.mpuCycleCount++;
 11460:     int t = XEiJ.regPC;  //pc0+2
 11461:     int s = (byte) XEiJ.regOC;  //8bitディスプレースメント
 11462:     if (s == -1) {  //Bcc.L
 11463:       XEiJ.regPC = t + 4;  //pc0+6
 11464:       s = mmuReadLongExword (t, XEiJ.regSRS);  //32bitディスプレースメント
 11465:     }
 11466:     t += s;  //pc0+2+ディスプレースメント
 11467:     if ((t & 1) != 0) {  //分岐先のアドレスが奇数
 11468:       //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ
 11469:       irpBccAddressError (t);
 11470:     }
 11471:     if (XEiJ.MPU_CC_MI << XEiJ.regCCR < 0) {  //分岐する
 11472:       irpSetPC (t);
 11473:     }
 11474:   }  //irpBmisl
 11475: 
 11476:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11477:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 11478:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 11479:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11480:   //BGE.W <label>                                   |-|012346|-|-*-*-|-----|          |0110_110_000_000_000-{offset}
 11481:   //BNLT.W <label>                                  |A|012346|-|-*-*-|-----|          |0110_110_000_000_000-{offset}        [BGE.W <label>]
 11482:   //JBGE.W <label>                                  |A|012346|-|-*-*-|-----|          |0110_110_000_000_000-{offset}        [BGE.W <label>]
 11483:   //JBNLT.W <label>                                 |A|012346|-|-*-*-|-----|          |0110_110_000_000_000-{offset}        [BGE.W <label>]
 11484:   //BGE.S <label>                                   |-|012346|-|-*-*-|-----|          |0110_110_000_sss_sss (s is not equal to 0)
 11485:   //BNLT.S <label>                                  |A|012346|-|-*-*-|-----|          |0110_110_000_sss_sss (s is not equal to 0)   [BGE.S <label>]
 11486:   //JBGE.S <label>                                  |A|012346|-|-*-*-|-----|          |0110_110_000_sss_sss (s is not equal to 0)   [BGE.S <label>]
 11487:   //JBNLT.S <label>                                 |A|012346|-|-*-*-|-----|          |0110_110_000_sss_sss (s is not equal to 0)   [BGE.S <label>]
 11488:   //JBLT.L <label>                                  |A|012346|-|-*-*-|-----|          |0110_110_000_000_110-0100111011111001-{address}      [BGE.S (*)+8;JMP <label>]
 11489:   //JBNGE.L <label>                                 |A|012346|-|-*-*-|-----|          |0110_110_000_000_110-0100111011111001-{address}      [BGE.S (*)+8;JMP <label>]
 11490:   public static void irpBgesw () throws M68kException {
 11491:     XEiJ.mpuCycleCount++;
 11492:     int t = XEiJ.regPC;  //pc0+2
 11493:     int s = (byte) XEiJ.regOC;  //8bitディスプレースメント
 11494:     if (s == 0) {  //Bcc.W
 11495:       XEiJ.regPC = t + 2;  //pc0+4
 11496:       s = mmuReadWordSignExword (t, XEiJ.regSRS);  //16bitディスプレースメント
 11497:     }
 11498:     t += s;  //pc0+2+ディスプレースメント
 11499:     if ((t & 1) != 0) {  //分岐先のアドレスが奇数
 11500:       //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ
 11501:       irpBccAddressError (t);
 11502:     }
 11503:     if (XEiJ.MPU_CC_GE << XEiJ.regCCR < 0) {  //分岐する
 11504:       irpSetPC (t);
 11505:     }
 11506:   }  //irpBgesw
 11507: 
 11508:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11509:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 11510:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 11511:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11512:   //BGE.S <label>                                   |-|012346|-|-*-*-|-----|          |0110_110_001_sss_sss
 11513:   //BNLT.S <label>                                  |A|012346|-|-*-*-|-----|          |0110_110_001_sss_sss [BGE.S <label>]
 11514:   //JBGE.S <label>                                  |A|012346|-|-*-*-|-----|          |0110_110_001_sss_sss [BGE.S <label>]
 11515:   //JBNLT.S <label>                                 |A|012346|-|-*-*-|-----|          |0110_110_001_sss_sss [BGE.S <label>]
 11516:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11517:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 11518:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 11519:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11520:   //BGE.S <label>                                   |-|012346|-|-*-*-|-----|          |0110_110_010_sss_sss
 11521:   //BNLT.S <label>                                  |A|012346|-|-*-*-|-----|          |0110_110_010_sss_sss [BGE.S <label>]
 11522:   //JBGE.S <label>                                  |A|012346|-|-*-*-|-----|          |0110_110_010_sss_sss [BGE.S <label>]
 11523:   //JBNLT.S <label>                                 |A|012346|-|-*-*-|-----|          |0110_110_010_sss_sss [BGE.S <label>]
 11524:   public static void irpBges () throws M68kException {
 11525:     XEiJ.mpuCycleCount++;
 11526:     int t = XEiJ.regPC;  //pc0+2
 11527:     int s = (byte) XEiJ.regOC;  //8bitディスプレースメント
 11528:     t += s;  //pc0+2+ディスプレースメント
 11529:     if ((t & 1) != 0) {  //分岐先のアドレスが奇数
 11530:       //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ
 11531:       irpBccAddressError (t);
 11532:     }
 11533:     if (XEiJ.MPU_CC_GE << XEiJ.regCCR < 0) {  //分岐する
 11534:       irpSetPC (t);
 11535:     }
 11536:   }  //irpBges
 11537: 
 11538:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11539:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 11540:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 11541:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11542:   //BGE.S <label>                                   |-|--2346|-|-*-*-|-----|          |0110_110_011_sss_sss (s is not equal to 63)
 11543:   //BNLT.S <label>                                  |A|--2346|-|-*-*-|-----|          |0110_110_011_sss_sss (s is not equal to 63)  [BGE.S <label>]
 11544:   //JBGE.S <label>                                  |A|--2346|-|-*-*-|-----|          |0110_110_011_sss_sss (s is not equal to 63)  [BGE.S <label>]
 11545:   //JBNLT.S <label>                                 |A|--2346|-|-*-*-|-----|          |0110_110_011_sss_sss (s is not equal to 63)  [BGE.S <label>]
 11546:   //BGE.L <label>                                   |-|--2346|-|-*-*-|-----|          |0110_110_011_111_111-{offset}
 11547:   //BNLT.L <label>                                  |A|--2346|-|-*-*-|-----|          |0110_110_011_111_111-{offset}        [BGE.L <label>]
 11548:   public static void irpBgesl () throws M68kException {
 11549:     XEiJ.mpuCycleCount++;
 11550:     int t = XEiJ.regPC;  //pc0+2
 11551:     int s = (byte) XEiJ.regOC;  //8bitディスプレースメント
 11552:     if (s == -1) {  //Bcc.L
 11553:       XEiJ.regPC = t + 4;  //pc0+6
 11554:       s = mmuReadLongExword (t, XEiJ.regSRS);  //32bitディスプレースメント
 11555:     }
 11556:     t += s;  //pc0+2+ディスプレースメント
 11557:     if ((t & 1) != 0) {  //分岐先のアドレスが奇数
 11558:       //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ
 11559:       irpBccAddressError (t);
 11560:     }
 11561:     if (XEiJ.MPU_CC_GE << XEiJ.regCCR < 0) {  //分岐する
 11562:       irpSetPC (t);
 11563:     }
 11564:   }  //irpBgesl
 11565: 
 11566:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11567:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 11568:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 11569:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11570:   //BLT.W <label>                                   |-|012346|-|-*-*-|-----|          |0110_110_100_000_000-{offset}
 11571:   //BNGE.W <label>                                  |A|012346|-|-*-*-|-----|          |0110_110_100_000_000-{offset}        [BLT.W <label>]
 11572:   //JBLT.W <label>                                  |A|012346|-|-*-*-|-----|          |0110_110_100_000_000-{offset}        [BLT.W <label>]
 11573:   //JBNGE.W <label>                                 |A|012346|-|-*-*-|-----|          |0110_110_100_000_000-{offset}        [BLT.W <label>]
 11574:   //BLT.S <label>                                   |-|012346|-|-*-*-|-----|          |0110_110_100_sss_sss (s is not equal to 0)
 11575:   //BNGE.S <label>                                  |A|012346|-|-*-*-|-----|          |0110_110_100_sss_sss (s is not equal to 0)   [BLT.S <label>]
 11576:   //JBLT.S <label>                                  |A|012346|-|-*-*-|-----|          |0110_110_100_sss_sss (s is not equal to 0)   [BLT.S <label>]
 11577:   //JBNGE.S <label>                                 |A|012346|-|-*-*-|-----|          |0110_110_100_sss_sss (s is not equal to 0)   [BLT.S <label>]
 11578:   //JBGE.L <label>                                  |A|012346|-|-*-*-|-----|          |0110_110_100_000_110-0100111011111001-{address}      [BLT.S (*)+8;JMP <label>]
 11579:   //JBNLT.L <label>                                 |A|012346|-|-*-*-|-----|          |0110_110_100_000_110-0100111011111001-{address}      [BLT.S (*)+8;JMP <label>]
 11580:   public static void irpBltsw () throws M68kException {
 11581:     XEiJ.mpuCycleCount++;
 11582:     int t = XEiJ.regPC;  //pc0+2
 11583:     int s = (byte) XEiJ.regOC;  //8bitディスプレースメント
 11584:     if (s == 0) {  //Bcc.W
 11585:       XEiJ.regPC = t + 2;  //pc0+4
 11586:       s = mmuReadWordSignExword (t, XEiJ.regSRS);  //16bitディスプレースメント
 11587:     }
 11588:     t += s;  //pc0+2+ディスプレースメント
 11589:     if ((t & 1) != 0) {  //分岐先のアドレスが奇数
 11590:       //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ
 11591:       irpBccAddressError (t);
 11592:     }
 11593:     if (XEiJ.MPU_CC_LT << XEiJ.regCCR < 0) {  //分岐する
 11594:       irpSetPC (t);
 11595:     }
 11596:   }  //irpBltsw
 11597: 
 11598:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11599:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 11600:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 11601:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11602:   //BLT.S <label>                                   |-|012346|-|-*-*-|-----|          |0110_110_101_sss_sss
 11603:   //BNGE.S <label>                                  |A|012346|-|-*-*-|-----|          |0110_110_101_sss_sss [BLT.S <label>]
 11604:   //JBLT.S <label>                                  |A|012346|-|-*-*-|-----|          |0110_110_101_sss_sss [BLT.S <label>]
 11605:   //JBNGE.S <label>                                 |A|012346|-|-*-*-|-----|          |0110_110_101_sss_sss [BLT.S <label>]
 11606:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11607:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 11608:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 11609:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11610:   //BLT.S <label>                                   |-|012346|-|-*-*-|-----|          |0110_110_110_sss_sss
 11611:   //BNGE.S <label>                                  |A|012346|-|-*-*-|-----|          |0110_110_110_sss_sss [BLT.S <label>]
 11612:   //JBLT.S <label>                                  |A|012346|-|-*-*-|-----|          |0110_110_110_sss_sss [BLT.S <label>]
 11613:   //JBNGE.S <label>                                 |A|012346|-|-*-*-|-----|          |0110_110_110_sss_sss [BLT.S <label>]
 11614:   public static void irpBlts () throws M68kException {
 11615:     XEiJ.mpuCycleCount++;
 11616:     int t = XEiJ.regPC;  //pc0+2
 11617:     int s = (byte) XEiJ.regOC;  //8bitディスプレースメント
 11618:     t += s;  //pc0+2+ディスプレースメント
 11619:     if ((t & 1) != 0) {  //分岐先のアドレスが奇数
 11620:       //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ
 11621:       irpBccAddressError (t);
 11622:     }
 11623:     if (XEiJ.MPU_CC_LT << XEiJ.regCCR < 0) {  //分岐する
 11624:       irpSetPC (t);
 11625:     }
 11626:   }  //irpBlts
 11627: 
 11628:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11629:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 11630:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 11631:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11632:   //BLT.S <label>                                   |-|--2346|-|-*-*-|-----|          |0110_110_111_sss_sss (s is not equal to 63)
 11633:   //BNGE.S <label>                                  |A|--2346|-|-*-*-|-----|          |0110_110_111_sss_sss (s is not equal to 63)  [BLT.S <label>]
 11634:   //JBLT.S <label>                                  |A|--2346|-|-*-*-|-----|          |0110_110_111_sss_sss (s is not equal to 63)  [BLT.S <label>]
 11635:   //JBNGE.S <label>                                 |A|--2346|-|-*-*-|-----|          |0110_110_111_sss_sss (s is not equal to 63)  [BLT.S <label>]
 11636:   //BLT.L <label>                                   |-|--2346|-|-*-*-|-----|          |0110_110_111_111_111-{offset}
 11637:   //BNGE.L <label>                                  |A|--2346|-|-*-*-|-----|          |0110_110_111_111_111-{offset}        [BLT.L <label>]
 11638:   public static void irpBltsl () throws M68kException {
 11639:     XEiJ.mpuCycleCount++;
 11640:     int t = XEiJ.regPC;  //pc0+2
 11641:     int s = (byte) XEiJ.regOC;  //8bitディスプレースメント
 11642:     if (s == -1) {  //Bcc.L
 11643:       XEiJ.regPC = t + 4;  //pc0+6
 11644:       s = mmuReadLongExword (t, XEiJ.regSRS);  //32bitディスプレースメント
 11645:     }
 11646:     t += s;  //pc0+2+ディスプレースメント
 11647:     if ((t & 1) != 0) {  //分岐先のアドレスが奇数
 11648:       //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ
 11649:       irpBccAddressError (t);
 11650:     }
 11651:     if (XEiJ.MPU_CC_LT << XEiJ.regCCR < 0) {  //分岐する
 11652:       irpSetPC (t);
 11653:     }
 11654:   }  //irpBltsl
 11655: 
 11656:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11657:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 11658:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 11659:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11660:   //BGT.W <label>                                   |-|012346|-|-***-|-----|          |0110_111_000_000_000-{offset}
 11661:   //BNLE.W <label>                                  |A|012346|-|-***-|-----|          |0110_111_000_000_000-{offset}        [BGT.W <label>]
 11662:   //JBGT.W <label>                                  |A|012346|-|-***-|-----|          |0110_111_000_000_000-{offset}        [BGT.W <label>]
 11663:   //JBNLE.W <label>                                 |A|012346|-|-***-|-----|          |0110_111_000_000_000-{offset}        [BGT.W <label>]
 11664:   //BGT.S <label>                                   |-|012346|-|-***-|-----|          |0110_111_000_sss_sss (s is not equal to 0)
 11665:   //BNLE.S <label>                                  |A|012346|-|-***-|-----|          |0110_111_000_sss_sss (s is not equal to 0)   [BGT.S <label>]
 11666:   //JBGT.S <label>                                  |A|012346|-|-***-|-----|          |0110_111_000_sss_sss (s is not equal to 0)   [BGT.S <label>]
 11667:   //JBNLE.S <label>                                 |A|012346|-|-***-|-----|          |0110_111_000_sss_sss (s is not equal to 0)   [BGT.S <label>]
 11668:   //JBLE.L <label>                                  |A|012346|-|-***-|-----|          |0110_111_000_000_110-0100111011111001-{address}      [BGT.S (*)+8;JMP <label>]
 11669:   //JBNGT.L <label>                                 |A|012346|-|-***-|-----|          |0110_111_000_000_110-0100111011111001-{address}      [BGT.S (*)+8;JMP <label>]
 11670:   public static void irpBgtsw () throws M68kException {
 11671:     XEiJ.mpuCycleCount++;
 11672:     int t = XEiJ.regPC;  //pc0+2
 11673:     int s = (byte) XEiJ.regOC;  //8bitディスプレースメント
 11674:     if (s == 0) {  //Bcc.W
 11675:       XEiJ.regPC = t + 2;  //pc0+4
 11676:       s = mmuReadWordSignExword (t, XEiJ.regSRS);  //16bitディスプレースメント
 11677:     }
 11678:     t += s;  //pc0+2+ディスプレースメント
 11679:     if ((t & 1) != 0) {  //分岐先のアドレスが奇数
 11680:       //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ
 11681:       irpBccAddressError (t);
 11682:     }
 11683:     if (XEiJ.MPU_CC_GT << XEiJ.regCCR < 0) {  //分岐する
 11684:       irpSetPC (t);
 11685:     }
 11686:   }  //irpBgtsw
 11687: 
 11688:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11689:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 11690:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 11691:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11692:   //BGT.S <label>                                   |-|012346|-|-***-|-----|          |0110_111_001_sss_sss
 11693:   //BNLE.S <label>                                  |A|012346|-|-***-|-----|          |0110_111_001_sss_sss [BGT.S <label>]
 11694:   //JBGT.S <label>                                  |A|012346|-|-***-|-----|          |0110_111_001_sss_sss [BGT.S <label>]
 11695:   //JBNLE.S <label>                                 |A|012346|-|-***-|-----|          |0110_111_001_sss_sss [BGT.S <label>]
 11696:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11697:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 11698:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 11699:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11700:   //BGT.S <label>                                   |-|012346|-|-***-|-----|          |0110_111_010_sss_sss
 11701:   //BNLE.S <label>                                  |A|012346|-|-***-|-----|          |0110_111_010_sss_sss [BGT.S <label>]
 11702:   //JBGT.S <label>                                  |A|012346|-|-***-|-----|          |0110_111_010_sss_sss [BGT.S <label>]
 11703:   //JBNLE.S <label>                                 |A|012346|-|-***-|-----|          |0110_111_010_sss_sss [BGT.S <label>]
 11704:   public static void irpBgts () throws M68kException {
 11705:     XEiJ.mpuCycleCount++;
 11706:     int t = XEiJ.regPC;  //pc0+2
 11707:     int s = (byte) XEiJ.regOC;  //8bitディスプレースメント
 11708:     t += s;  //pc0+2+ディスプレースメント
 11709:     if ((t & 1) != 0) {  //分岐先のアドレスが奇数
 11710:       //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ
 11711:       irpBccAddressError (t);
 11712:     }
 11713:     if (XEiJ.MPU_CC_GT << XEiJ.regCCR < 0) {  //分岐する
 11714:       irpSetPC (t);
 11715:     }
 11716:   }  //irpBgts
 11717: 
 11718:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11719:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 11720:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 11721:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11722:   //BGT.S <label>                                   |-|--2346|-|-***-|-----|          |0110_111_011_sss_sss (s is not equal to 63)
 11723:   //BNLE.S <label>                                  |A|--2346|-|-***-|-----|          |0110_111_011_sss_sss (s is not equal to 63)  [BGT.S <label>]
 11724:   //JBGT.S <label>                                  |A|--2346|-|-***-|-----|          |0110_111_011_sss_sss (s is not equal to 63)  [BGT.S <label>]
 11725:   //JBNLE.S <label>                                 |A|--2346|-|-***-|-----|          |0110_111_011_sss_sss (s is not equal to 63)  [BGT.S <label>]
 11726:   //BGT.L <label>                                   |-|--2346|-|-***-|-----|          |0110_111_011_111_111-{offset}
 11727:   //BNLE.L <label>                                  |A|--2346|-|-***-|-----|          |0110_111_011_111_111-{offset}        [BGT.L <label>]
 11728:   public static void irpBgtsl () throws M68kException {
 11729:     XEiJ.mpuCycleCount++;
 11730:     int t = XEiJ.regPC;  //pc0+2
 11731:     int s = (byte) XEiJ.regOC;  //8bitディスプレースメント
 11732:     if (s == -1) {  //Bcc.L
 11733:       XEiJ.regPC = t + 4;  //pc0+6
 11734:       s = mmuReadLongExword (t, XEiJ.regSRS);  //32bitディスプレースメント
 11735:     }
 11736:     t += s;  //pc0+2+ディスプレースメント
 11737:     if ((t & 1) != 0) {  //分岐先のアドレスが奇数
 11738:       //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ
 11739:       irpBccAddressError (t);
 11740:     }
 11741:     if (XEiJ.MPU_CC_GT << XEiJ.regCCR < 0) {  //分岐する
 11742:       irpSetPC (t);
 11743:     }
 11744:   }  //irpBgtsl
 11745: 
 11746:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11747:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 11748:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 11749:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11750:   //BLE.W <label>                                   |-|012346|-|-***-|-----|          |0110_111_100_000_000-{offset}
 11751:   //BNGT.W <label>                                  |A|012346|-|-***-|-----|          |0110_111_100_000_000-{offset}        [BLE.W <label>]
 11752:   //JBLE.W <label>                                  |A|012346|-|-***-|-----|          |0110_111_100_000_000-{offset}        [BLE.W <label>]
 11753:   //JBNGT.W <label>                                 |A|012346|-|-***-|-----|          |0110_111_100_000_000-{offset}        [BLE.W <label>]
 11754:   //BLE.S <label>                                   |-|012346|-|-***-|-----|          |0110_111_100_sss_sss (s is not equal to 0)
 11755:   //BNGT.S <label>                                  |A|012346|-|-***-|-----|          |0110_111_100_sss_sss (s is not equal to 0)   [BLE.S <label>]
 11756:   //JBLE.S <label>                                  |A|012346|-|-***-|-----|          |0110_111_100_sss_sss (s is not equal to 0)   [BLE.S <label>]
 11757:   //JBNGT.S <label>                                 |A|012346|-|-***-|-----|          |0110_111_100_sss_sss (s is not equal to 0)   [BLE.S <label>]
 11758:   //JBGT.L <label>                                  |A|012346|-|-***-|-----|          |0110_111_100_000_110-0100111011111001-{address}      [BLE.S (*)+8;JMP <label>]
 11759:   //JBNLE.L <label>                                 |A|012346|-|-***-|-----|          |0110_111_100_000_110-0100111011111001-{address}      [BLE.S (*)+8;JMP <label>]
 11760:   public static void irpBlesw () throws M68kException {
 11761:     XEiJ.mpuCycleCount++;
 11762:     int t = XEiJ.regPC;  //pc0+2
 11763:     int s = (byte) XEiJ.regOC;  //8bitディスプレースメント
 11764:     if (s == 0) {  //Bcc.W
 11765:       XEiJ.regPC = t + 2;  //pc0+4
 11766:       s = mmuReadWordSignExword (t, XEiJ.regSRS);  //16bitディスプレースメント
 11767:     }
 11768:     t += s;  //pc0+2+ディスプレースメント
 11769:     if ((t & 1) != 0) {  //分岐先のアドレスが奇数
 11770:       //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ
 11771:       irpBccAddressError (t);
 11772:     }
 11773:     if (XEiJ.MPU_CC_LE << XEiJ.regCCR < 0) {  //分岐する
 11774:       irpSetPC (t);
 11775:     }
 11776:   }  //irpBlesw
 11777: 
 11778:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11779:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 11780:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 11781:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11782:   //BLE.S <label>                                   |-|012346|-|-***-|-----|          |0110_111_101_sss_sss
 11783:   //BNGT.S <label>                                  |A|012346|-|-***-|-----|          |0110_111_101_sss_sss [BLE.S <label>]
 11784:   //JBLE.S <label>                                  |A|012346|-|-***-|-----|          |0110_111_101_sss_sss [BLE.S <label>]
 11785:   //JBNGT.S <label>                                 |A|012346|-|-***-|-----|          |0110_111_101_sss_sss [BLE.S <label>]
 11786:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11787:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 11788:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 11789:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11790:   //BLE.S <label>                                   |-|012346|-|-***-|-----|          |0110_111_110_sss_sss
 11791:   //BNGT.S <label>                                  |A|012346|-|-***-|-----|          |0110_111_110_sss_sss [BLE.S <label>]
 11792:   //JBLE.S <label>                                  |A|012346|-|-***-|-----|          |0110_111_110_sss_sss [BLE.S <label>]
 11793:   //JBNGT.S <label>                                 |A|012346|-|-***-|-----|          |0110_111_110_sss_sss [BLE.S <label>]
 11794:   public static void irpBles () throws M68kException {
 11795:     XEiJ.mpuCycleCount++;
 11796:     int t = XEiJ.regPC;  //pc0+2
 11797:     int s = (byte) XEiJ.regOC;  //8bitディスプレースメント
 11798:     t += s;  //pc0+2+ディスプレースメント
 11799:     if ((t & 1) != 0) {  //分岐先のアドレスが奇数
 11800:       //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ
 11801:       irpBccAddressError (t);
 11802:     }
 11803:     if (XEiJ.MPU_CC_LE << XEiJ.regCCR < 0) {  //分岐する
 11804:       irpSetPC (t);
 11805:     }
 11806:   }  //irpBles
 11807: 
 11808:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11809:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 11810:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 11811:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11812:   //BLE.S <label>                                   |-|--2346|-|-***-|-----|          |0110_111_111_sss_sss (s is not equal to 63)
 11813:   //BNGT.S <label>                                  |A|--2346|-|-***-|-----|          |0110_111_111_sss_sss (s is not equal to 63)  [BLE.S <label>]
 11814:   //JBLE.S <label>                                  |A|--2346|-|-***-|-----|          |0110_111_111_sss_sss (s is not equal to 63)  [BLE.S <label>]
 11815:   //JBNGT.S <label>                                 |A|--2346|-|-***-|-----|          |0110_111_111_sss_sss (s is not equal to 63)  [BLE.S <label>]
 11816:   //BLE.L <label>                                   |-|--2346|-|-***-|-----|          |0110_111_111_111_111-{offset}
 11817:   //BNGT.L <label>                                  |A|--2346|-|-***-|-----|          |0110_111_111_111_111-{offset}        [BLE.L <label>]
 11818:   public static void irpBlesl () throws M68kException {
 11819:     XEiJ.mpuCycleCount++;
 11820:     int t = XEiJ.regPC;  //pc0+2
 11821:     int s = (byte) XEiJ.regOC;  //8bitディスプレースメント
 11822:     if (s == -1) {  //Bcc.L
 11823:       XEiJ.regPC = t + 4;  //pc0+6
 11824:       s = mmuReadLongExword (t, XEiJ.regSRS);  //32bitディスプレースメント
 11825:     }
 11826:     t += s;  //pc0+2+ディスプレースメント
 11827:     if ((t & 1) != 0) {  //分岐先のアドレスが奇数
 11828:       //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ
 11829:       irpBccAddressError (t);
 11830:     }
 11831:     if (XEiJ.MPU_CC_LE << XEiJ.regCCR < 0) {  //分岐する
 11832:       irpSetPC (t);
 11833:     }
 11834:   }  //irpBlesl
 11835: 
 11836:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11837:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 11838:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 11839:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11840:   //IOCS <name>                                     |A|012346|-|UUUUU|UUUUU|          |0111_000_0dd_ddd_ddd-0100111001001111        [MOVEQ.L #<data>,D0;TRAP #15]
 11841:   //MOVEQ.L #<data>,Dq                              |-|012346|-|-UUUU|-**00|          |0111_qqq_0dd_ddd_ddd
 11842:   public static void irpMoveq () throws M68kException {
 11843:     XEiJ.mpuCycleCount++;
 11844:     int z;
 11845:     XEiJ.regRn[XEiJ.regOC >> 9 & 7] = z = (byte) XEiJ.regOC;
 11846:     XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X);  //ccr_tst
 11847:   }  //irpMoveq
 11848: 
 11849:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11850:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 11851:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 11852:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11853:   //MVS.B <ea>,Dq                                   |-|------|-|-UUUU|-**00|D M+-WXZPI|0111_qqq_100_mmm_rrr (ISA_B)
 11854:   //
 11855:   //MVS.B <ea>,Dq
 11856:   //  バイトデータをロングに符号拡張してDqの全体を更新する
 11857:   public static void irpMvsByte () throws M68kException {
 11858:     XEiJ.mpuCycleCount++;
 11859:     int ea = XEiJ.regOC & 63;
 11860:     int z;
 11861:     XEiJ.regRn[XEiJ.regOC >> 9 & 7] = z = ea < XEiJ.EA_AR ? (byte) XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadByteSignExword ((XEiJ.regPC += 2) - 1, XEiJ.regSRS) : mmuReadByteSignData (efaAnyByte (ea), XEiJ.regSRS);  //pcbs。イミディエイトを分離
 11862:     XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X);  //ccr_tst
 11863:   }  //irpMvsByte
 11864: 
 11865:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11866:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 11867:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 11868:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11869:   //MVS.W <ea>,Dq                                   |-|------|-|-UUUU|-**00|D M+-WXZPI|0111_qqq_101_mmm_rrr (ISA_B)
 11870:   //
 11871:   //MVS.W <ea>,Dq
 11872:   //  ワードデータをロングに符号拡張してDqの全体を更新する
 11873:   public static void irpMvsWord () throws M68kException {
 11874:     XEiJ.mpuCycleCount++;
 11875:     int ea = XEiJ.regOC & 63;
 11876:     int z;
 11877:     XEiJ.regRn[XEiJ.regOC >> 9 & 7] = z = ea < XEiJ.EA_AR ? (short) XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) : mmuReadWordSignData (efaAnyWord (ea), XEiJ.regSRS);  //pcws。イミディエイトを分離
 11878:     XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X);  //ccr_tst
 11879:   }  //irpMvsWord
 11880: 
 11881:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11882:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 11883:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 11884:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11885:   //MVZ.B <ea>,Dq                                   |-|------|-|-UUUU|-0*00|D M+-WXZPI|0111_qqq_110_mmm_rrr (ISA_B)
 11886:   //
 11887:   //MVZ.B <ea>,Dq
 11888:   //  バイトデータをロングにゼロ拡張してDqの全体を更新する
 11889:   public static void irpMvzByte () throws M68kException {
 11890:     XEiJ.mpuCycleCount++;
 11891:     int ea = XEiJ.regOC & 63;
 11892:     int z;
 11893:     XEiJ.regRn[XEiJ.regOC >> 9 & 7] = z = ea < XEiJ.EA_AR ? 0xff & XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadByteZeroExword ((XEiJ.regPC += 2) - 1, XEiJ.regSRS) : mmuReadByteZeroData (efaAnyByte (ea), XEiJ.regSRS);  //pcbz。イミディエイトを分離
 11894:     XEiJ.regCCR = XEiJ.REG_CCR_X & XEiJ.regCCR | (z == 0 ? XEiJ.REG_CCR_Z : 0);
 11895:   }  //irpMvzByte
 11896: 
 11897:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11898:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 11899:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 11900:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11901:   //MVZ.W <ea>,Dq                                   |-|------|-|-UUUU|-0*00|D M+-WXZPI|0111_qqq_111_mmm_rrr (ISA_B)
 11902:   //
 11903:   //MVZ.W <ea>,Dq
 11904:   //  ワードデータをロングにゼロ拡張してDqの全体を更新する
 11905:   public static void irpMvzWord () throws M68kException {
 11906:     XEiJ.mpuCycleCount++;
 11907:     int ea = XEiJ.regOC & 63;
 11908:     int z;
 11909:     XEiJ.regRn[XEiJ.regOC >> 9 & 7] = z = ea < XEiJ.EA_AR ? (char) XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) : mmuReadWordZeroData (efaAnyWord (ea), XEiJ.regSRS);  //pcwz。イミディエイトを分離
 11910:     XEiJ.regCCR = XEiJ.REG_CCR_X & XEiJ.regCCR | (z == 0 ? XEiJ.REG_CCR_Z : 0);
 11911:   }  //irpMvzWord
 11912: 
 11913:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11914:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 11915:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 11916:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11917:   //OR.B <ea>,Dq                                    |-|012346|-|-UUUU|-**00|D M+-WXZPI|1000_qqq_000_mmm_rrr
 11918:   public static void irpOrToRegByte () throws M68kException {
 11919:     XEiJ.mpuCycleCount++;
 11920:     int ea = XEiJ.regOC & 63;
 11921:     XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & (XEiJ.regRn[XEiJ.regOC >> 9 & 7] |= 255 & (ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadByteSignExword ((XEiJ.regPC += 2) - 1, XEiJ.regSRS) : mmuReadByteSignData (efaAnyByte (ea), XEiJ.regSRS)))];  //ccr_tst_byte。pcbs。イミディエイトを分離。0拡張してからOR
 11922:   }  //irpOrToRegByte
 11923: 
 11924:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11925:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 11926:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 11927:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11928:   //OR.W <ea>,Dq                                    |-|012346|-|-UUUU|-**00|D M+-WXZPI|1000_qqq_001_mmm_rrr
 11929:   public static void irpOrToRegWord () throws M68kException {
 11930:     XEiJ.mpuCycleCount++;
 11931:     int ea = XEiJ.regOC & 63;
 11932:     int z = (short) (XEiJ.regRn[XEiJ.regOC >> 9 & 7] |= ea < XEiJ.EA_AR ? (char) XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) : mmuReadWordZeroData (efaAnyWord (ea), XEiJ.regSRS));  //pcwz。イミディエイトを分離。0拡張してからOR
 11933:     XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X);  //ccr_tst
 11934:   }  //irpOrToRegWord
 11935: 
 11936:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11937:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 11938:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 11939:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11940:   //OR.L <ea>,Dq                                    |-|012346|-|-UUUU|-**00|D M+-WXZPI|1000_qqq_010_mmm_rrr
 11941:   public static void irpOrToRegLong () throws M68kException {
 11942:     int ea = XEiJ.regOC & 63;
 11943:     int z = XEiJ.regRn[XEiJ.regOC >> 9 & 7] |= ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS) : mmuReadLongData (efaAnyLong (ea), XEiJ.regSRS);  //pcls。イミディエイトを分離
 11944:     XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X);  //ccr_tst
 11945:   }  //irpOrToRegLong
 11946: 
 11947:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11948:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 11949:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 11950:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11951:   //DIVU.W <ea>,Dq                                  |-|012346|-|-UUUU|-***0|D M+-WXZPI|1000_qqq_011_mmm_rrr
 11952:   //
 11953:   //DIVU.W <ea>,Dq
 11954:   //  M68000PRMでDIVU.Wのオーバーフローの条件が16bit符号あり整数と書かれているのは16bit符号なし整数の間違い
 11955:   public static void irpDivuWord () throws M68kException {
 11956:     //  X  変化しない
 11957:     //  N  ゼロ除算またはオーバーフローのとき不定。商が負のときセット。それ以外はクリア
 11958:     //  Z  ゼロ除算またはオーバーフローのとき不定。商が0のときセット。それ以外はクリア
 11959:     //  V  ゼロ除算のとき不定。オーバーフローのときセット。それ以外はクリア
 11960:     //  C  常にクリア
 11961:     XEiJ.mpuCycleCount += 22;  //最大
 11962:     int ea = XEiJ.regOC & 63;
 11963:     int qqq = XEiJ.regOC >> 9 & 7;
 11964:     int y = ea < XEiJ.EA_AR ? (char) XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) : mmuReadWordZeroData (efaAnyWord (ea), XEiJ.regSRS);  //除数。pcwz。イミディエイトを分離
 11965:     int x = XEiJ.regRn[qqq];  //被除数
 11966:     if (y == 0) {  //ゼロ除算
 11967:       //Dqは変化しない
 11968:       XEiJ.regCCR = (XEiJ.regCCR & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_N | XEiJ.REG_CCR_Z | XEiJ.REG_CCR_V)  //XとNとZとVは変化しない
 11969:                      );  //Cは常にクリア
 11970:       M68kException.m6eAddress = XEiJ.regPC0;  //アドレスは命令の先頭
 11971:       M68kException.m6eNumber = M68kException.M6E_DIVIDE_BY_ZERO;
 11972:       throw M68kException.m6eSignal;
 11973:     }
 11974:     //無理にintで符号なし除算をやろうとするよりもdoubleにキャストしてから割ったほうが速い
 11975:     //  intの除算をdoubleの除算器で行うプロセッサならばなおさら
 11976:     //被除数を符号なし32ビットとみなすためlongを経由してdoubleに変換する
 11977:     //doubleからlongやintへのキャストは小数点以下が切り捨てられ、オーバーフローは表現できる絶対値最大の値になる
 11978:     //doubleから直接intに戻しているので0xffffffff/0x0001=0xffffffffが絶対値最大の0x7fffffffになってしまうが、
 11979:     //DIVU.Wではオーバーフローになることに変わりはないのでよいことにする
 11980:     //  符号なし32ビットの0xffffffffにしたいときは戻すときもlongを経由すればよい
 11981:     int z = (int) ((double) ((long) x & 0xffffffffL) / (double) y);  //商
 11982:     if (z >>> 16 != 0) {  //オーバーフローあり
 11983:       //Dqは変化しない
 11984:       XEiJ.regCCR = (XEiJ.regCCR & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_N | XEiJ.REG_CCR_Z) |  //XとNとZは変化しない
 11985:                      XEiJ.REG_CCR_V  //Vは常にセット
 11986:                      );  //Cは常にクリア
 11987:     } else {  //オーバーフローなし
 11988:       XEiJ.regRn[qqq] = x - y * z << 16 | z;  //余り<<16|商
 11989:       z = (short) z;
 11990:       XEiJ.regCCR = (XEiJ.regCCR & XEiJ.REG_CCR_X |  //Xは変化しない
 11991:                      (z < 0 ? XEiJ.REG_CCR_N : 0) |  //Nは商が負のときセット、さもなくばクリア
 11992:                      (z == 0 ? XEiJ.REG_CCR_Z : 0)  //Zは商が0のときセット、さもなくばクリア
 11993:                      //Vは常にクリア
 11994:                      );  //Cは常にクリア
 11995:     }  //if オーバーフローあり/オーバーフローなし
 11996:   }  //irpDivuWord
 11997: 
 11998:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11999:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 12000:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 12001:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12002:   //SBCD.B Dr,Dq                                    |-|012346|-|UUUUU|*U*U*|          |1000_qqq_100_000_rrr
 12003:   //SBCD.B -(Ar),-(Aq)                              |-|012346|-|UUUUU|*U*U*|          |1000_qqq_100_001_rrr
 12004:   //OR.B Dq,<ea>                                    |-|012346|-|-UUUU|-**00|  M+-WXZ  |1000_qqq_100_mmm_rrr
 12005:   public static void irpOrToMemByte () throws M68kException {
 12006:     int ea = XEiJ.regOC & 63;
 12007:     if (ea >= XEiJ.EA_MM) {  //OR.B Dq,<ea>
 12008:       XEiJ.mpuCycleCount++;
 12009:       int a = efaMltByte (ea);
 12010:       int z = XEiJ.regRn[XEiJ.regOC >> 9 & 7] | mmuReadByteSignData (a, XEiJ.regSRS);
 12011:       mmuWriteByteData (a, z, XEiJ.regSRS);
 12012:       XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & z];  //ccr_tst_byte
 12013:     } else if (ea < XEiJ.EA_AR) {  //SBCD.B Dr,Dq
 12014:       int qqq = XEiJ.regOC >> 9 & 7;
 12015:       XEiJ.mpuCycleCount++;
 12016:       int x;
 12017:       XEiJ.regRn[qqq] = ~0xff & (x = XEiJ.regRn[qqq]) | irpSbcd (x, XEiJ.regRn[ea]);
 12018:     } else {  //SBCD.B -(Ar),-(Aq)
 12019:       XEiJ.mpuCycleCount += 2;
 12020:       M68kException.m6eIncremented -= 1L << (ea << 3);
 12021:       int a = --XEiJ.regRn[ea];  //このr[ea]はアドレスレジスタ
 12022:       int y = mmuReadByteZeroData (a, XEiJ.regSRS);
 12023:       int aqq = (XEiJ.regOC >> 9) - (64 - 8);
 12024:       M68kException.m6eIncremented -= 1L << (aqq << 3);
 12025:       a = --XEiJ.regRn[aqq];
 12026:       mmuWriteByteData (a, irpSbcd (mmuModifyByteZeroData (a, XEiJ.regSRS), y), XEiJ.regSRS);
 12027:     }
 12028:   }  //irpOrToMemByte
 12029: 
 12030:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12031:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 12032:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 12033:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12034:   //PACK Dr,Dq,#<data>                              |-|--2346|-|-----|-----|          |1000_qqq_101_000_rrr-{data}
 12035:   //PACK -(Ar),-(Aq),#<data>                        |-|--2346|-|-----|-----|          |1000_qqq_101_001_rrr-{data}
 12036:   //OR.W Dq,<ea>                                    |-|012346|-|-UUUU|-**00|  M+-WXZ  |1000_qqq_101_mmm_rrr
 12037:   //
 12038:   //PACK Dr,Dq,#<data>
 12039:   //PACK -(Ar),-(Aq),#<data>
 12040:   //  PACK/UNPKは第1オペランドのソースと第2オペランドのデスティネーションのサイズが違う。パックされていない方がワードでされている方がバイト
 12041:   //  10の位を4ビット右または左にシフトする。第3オペランドの補正値はワードでパックされていない方に加算する。CCRは変化しない
 12042:   public static void irpOrToMemWord () throws M68kException {
 12043:     int ea = XEiJ.regOC & 63;
 12044:     if (ea >= XEiJ.EA_MM) {  //OR.W Dq,<ea>
 12045:       XEiJ.mpuCycleCount++;
 12046:       int a = efaMltWord (ea);
 12047:       int z;
 12048:       mmuWriteWordData (a, z = XEiJ.regRn[XEiJ.regOC >> 9 & 7] | mmuModifyWordSignData (a, XEiJ.regSRS), XEiJ.regSRS);
 12049:       XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (char) z - 1 >> 31 & XEiJ.REG_CCR_Z | ((short) z < 0 ? XEiJ.REG_CCR_N : 0);  //ccr_tst_word
 12050:     } else if (ea < XEiJ.EA_AR) {  //PACK Dr,Dq,#<data>
 12051:       XEiJ.mpuCycleCount += 2;
 12052:       int qqq = XEiJ.regOC >> 9 & 7;
 12053:       int t = XEiJ.regRn[ea] + mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);  //pcws
 12054:       XEiJ.regRn[qqq] = ~0xff & XEiJ.regRn[qqq] | t >> 4 & 0xf0 | t & 15;
 12055:     } else {  //PACK -(Ar),-(Aq),#<data>
 12056:       int o = mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);  //pcws
 12057:       M68kException.m6eIncremented -= 2L << (ea << 3);
 12058:       int a = XEiJ.regRn[ea] -= 2;
 12059:       int t = mmuReadWordSignData (a, XEiJ.regSRS) + o;  //020以上なのでアドレスエラーは出ない
 12060:       int aqq = (XEiJ.regOC >> 9) - (64 - 8);
 12061:       M68kException.m6eIncremented -= 1L << (aqq << 3);
 12062:       a = --XEiJ.regRn[aqq];
 12063:       mmuWriteByteData (a, t >> 4 & 0xf0 | t & 15, XEiJ.regSRS);
 12064:     }
 12065:   }  //irpOrToMemWord
 12066: 
 12067:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12068:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 12069:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 12070:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12071:   //UNPK Dr,Dq,#<data>                              |-|--2346|-|-----|-----|          |1000_qqq_110_000_rrr-{data}
 12072:   //UNPK -(Ar),-(Aq),#<data>                        |-|--2346|-|-----|-----|          |1000_qqq_110_001_rrr-{data}
 12073:   //OR.L Dq,<ea>                                    |-|012346|-|-UUUU|-**00|  M+-WXZ  |1000_qqq_110_mmm_rrr
 12074:   //
 12075:   //UNPK Dr,Dq,#<data>
 12076:   //UNPK -(Ar),-(Aq),#<data>
 12077:   //  PACK/UNPKは第1オペランドのソースと第2オペランドのデスティネーションのサイズが違う。パックされていない方がワードでされている方がバイト
 12078:   //  10の位を4ビット右または左にシフトする。第3オペランドの補正値はワードでパックされていない方に加算する。CCRは変化しない
 12079:   public static void irpOrToMemLong () throws M68kException {
 12080:     int ea = XEiJ.regOC & 63;
 12081:     if (ea >= XEiJ.EA_MM) {  //OR.L Dq,<ea>
 12082:       XEiJ.mpuCycleCount++;
 12083:       int a = efaMltLong (ea);
 12084:       int z;
 12085:       mmuWriteLongData (a, z = XEiJ.regRn[XEiJ.regOC >> 9 & 7] | mmuModifyLongData (a, XEiJ.regSRS), XEiJ.regSRS);
 12086:       XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X);  //ccr_tst
 12087:     } else if (ea < XEiJ.EA_AR) {  //UNPK Dr,Dq,#<data>
 12088:       int qqq = XEiJ.regOC >> 9 & 7;
 12089:       int t = XEiJ.regRn[ea];
 12090:       XEiJ.regRn[qqq] = ~0xffff & XEiJ.regRn[qqq] | (char) ((t << 4 & 0x0f00 | t & 15) + mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS));  //pcws
 12091:     } else {  //UNPK -(Ar),-(Aq),#<data>
 12092:       int o = mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);  //pcws
 12093:       M68kException.m6eIncremented -= 1L << (ea << 3);
 12094:       int a = --XEiJ.regRn[ea];
 12095:       int t = mmuReadByteSignData (a, XEiJ.regSRS);
 12096:       int aqq = (XEiJ.regOC >> 9) - (64 - 8);
 12097:       M68kException.m6eIncremented -= 2L << (aqq << 3);
 12098:       a = XEiJ.regRn[aqq] -= 2;
 12099:       mmuWriteWordData (a, (t << 4 & 0x0f00 | t & 15) + o, XEiJ.regSRS);  //020以上なのでアドレスエラーは出ない
 12100:     }
 12101:   }  //irpOrToMemLong
 12102: 
 12103:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12104:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 12105:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 12106:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12107:   //DIVS.W <ea>,Dq                                  |-|012346|-|-UUUU|-***0|D M+-WXZPI|1000_qqq_111_mmm_rrr
 12108:   //
 12109:   //DIVS.W <ea>,Dq
 12110:   //  DIVSの余りの符号は被除数と一致
 12111:   //  M68000PRMでDIVS.Wのアドレッシングモードがデータ可変と書かれているのはデータの間違い
 12112:   public static void irpDivsWord () throws M68kException {
 12113:     //  X  変化しない
 12114:     //  N  ゼロ除算またはオーバーフローのとき不定。商が負のときセット。それ以外はクリア
 12115:     //  Z  ゼロ除算またはオーバーフローのとき不定。商が0のときセット。それ以外はクリア
 12116:     //  V  ゼロ除算のとき不定。オーバーフローのときセット。それ以外はクリア
 12117:     //  C  常にクリア
 12118:     //divsの余りの符号は被除数と一致
 12119:     //Javaの除算演算子の挙動
 12120:     //   10 /  3 ==  3   10 %  3 ==  1   10 =  3 *  3 +  1
 12121:     //   10 / -3 == -3   10 % -3 ==  1   10 = -3 * -3 +  1
 12122:     //  -10 /  3 == -3  -10 %  3 == -1  -10 =  3 * -3 + -1
 12123:     //  -10 / -3 ==  3  -10 % -3 == -1  -10 = -3 *  3 + -1
 12124:     XEiJ.mpuCycleCount += 22;  //最大
 12125:     int ea = XEiJ.regOC & 63;
 12126:     int qqq = XEiJ.regOC >> 9 & 7;
 12127:     int y = ea < XEiJ.EA_AR ? (short) XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) : mmuReadWordSignData (efaAnyWord (ea), XEiJ.regSRS);  //除数。pcws。イミディエイトを分離
 12128:     int x = XEiJ.regRn[qqq];  //被除数
 12129:     if (y == 0) {  //ゼロ除算
 12130:       //Dqは変化しない
 12131:       XEiJ.regCCR = (XEiJ.regCCR & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_N | XEiJ.REG_CCR_Z | XEiJ.REG_CCR_V)  //XとNとZとVは変化しない
 12132:                      );  //Cは常にクリア
 12133:       M68kException.m6eAddress = XEiJ.regPC0;  //アドレスは命令の先頭
 12134:       M68kException.m6eNumber = M68kException.M6E_DIVIDE_BY_ZERO;
 12135:       throw M68kException.m6eSignal;
 12136:     }
 12137:     int z = x / y;  //商
 12138:     if ((short) z != z) {  //オーバーフローあり
 12139:       //Dqは変化しない
 12140:       XEiJ.regCCR = (XEiJ.regCCR & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_N | XEiJ.REG_CCR_Z) |  //XとNとZは変化しない
 12141:                      XEiJ.REG_CCR_V  //Vは常にセット
 12142:                      );  //Cは常にクリア
 12143:     } else {  //オーバーフローなし
 12144:       XEiJ.regRn[qqq] = x - y * z << 16 | (char) z;  //Dqは余り<<16|商&$ffff
 12145:       XEiJ.regCCR = (XEiJ.regCCR & XEiJ.REG_CCR_X |  //Xは変化しない
 12146:                      (z < 0 ? XEiJ.REG_CCR_N : 0) |  //Nは商が負のときセット、さもなくばクリア
 12147:                      (z == 0 ? XEiJ.REG_CCR_Z : 0)  //Zは商が0のときセット、さもなくばクリア
 12148:                      //Vは常にクリア
 12149:                      );  //Cは常にクリア
 12150:     }
 12151:   }  //irpDivsWord
 12152: 
 12153:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12154:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 12155:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 12156:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12157:   //SUB.B <ea>,Dq                                   |-|012346|-|UUUUU|*****|D M+-WXZPI|1001_qqq_000_mmm_rrr
 12158:   public static void irpSubToRegByte () throws M68kException {
 12159:     XEiJ.mpuCycleCount++;
 12160:     int ea = XEiJ.regOC & 63;
 12161:     int qqq = XEiJ.regOC >> 9 & 7;
 12162:     int x, y, z;
 12163:     y = ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadByteSignExword ((XEiJ.regPC += 2) - 1, XEiJ.regSRS) : mmuReadByteSignData (efaAnyByte (ea), XEiJ.regSRS);  //pcbs。イミディエイトを分離
 12164:     x = XEiJ.regRn[qqq];
 12165:     z = x - y;
 12166:     XEiJ.regRn[qqq] = ~255 & x | 255 & z;
 12167:     XEiJ.regCCR = (XEiJ.MPU_TSTB_TABLE[255 & z] |
 12168:            ((x ^ y) & (x ^ z)) >> 6 & XEiJ.REG_CCR_V |
 12169:            (byte) (x & (y ^ z) ^ (y | z)) >> 7 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C));  //ccr_sub_byte
 12170:   }  //irpSubToRegByte
 12171: 
 12172:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12173:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 12174:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 12175:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12176:   //SUB.W <ea>,Dq                                   |-|012346|-|UUUUU|*****|DAM+-WXZPI|1001_qqq_001_mmm_rrr
 12177:   public static void irpSubToRegWord () throws M68kException {
 12178:     XEiJ.mpuCycleCount++;
 12179:     int ea = XEiJ.regOC & 63;
 12180:     int qqq = XEiJ.regOC >> 9 & 7;
 12181:     int x, y, z;
 12182:     y = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) : mmuReadWordSignData (efaAnyWord (ea), XEiJ.regSRS);  //このr[ea]はデータレジスタまたはアドレスレジスタ。pcws。イミディエイトを分離
 12183:     x = XEiJ.regRn[qqq];
 12184:     z = x - y;
 12185:     XEiJ.regRn[qqq] = ~65535 & x | (char) z;
 12186:     XEiJ.regCCR = (z >> 12 & XEiJ.REG_CCR_N | (char) z - 1 >> 14 & XEiJ.REG_CCR_Z |
 12187:            ((x ^ y) & (x ^ z)) >> 14 & XEiJ.REG_CCR_V |
 12188:            (short) (x & (y ^ z) ^ (y | z)) >> 15 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C));  //ccr_sub_word
 12189:   }  //irpSubToRegWord
 12190: 
 12191:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12192:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 12193:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 12194:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12195:   //SUB.L <ea>,Dq                                   |-|012346|-|UUUUU|*****|DAM+-WXZPI|1001_qqq_010_mmm_rrr
 12196:   public static void irpSubToRegLong () throws M68kException {
 12197:     int ea = XEiJ.regOC & 63;
 12198:     int qqq = XEiJ.regOC >> 9 & 7;
 12199:     XEiJ.mpuCycleCount++;
 12200:     int x, y, z;
 12201:     y = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS) : mmuReadLongData (efaAnyLong (ea), XEiJ.regSRS);  //このr[ea]はデータレジスタまたはアドレスレジスタ。pcls。イミディエイトを分離
 12202:     x = XEiJ.regRn[qqq];
 12203:     z = x - y;
 12204:     XEiJ.regRn[qqq] = z;
 12205:     XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) |
 12206:            ((x ^ y) & (x ^ z)) >> 30 & XEiJ.REG_CCR_V |
 12207:            (x & (y ^ z) ^ (y | z)) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C));  //ccr_sub
 12208:   }  //irpSubToRegLong
 12209: 
 12210:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12211:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 12212:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 12213:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12214:   //SUBA.W <ea>,Aq                                  |-|012346|-|-----|-----|DAM+-WXZPI|1001_qqq_011_mmm_rrr
 12215:   //SUB.W <ea>,Aq                                   |A|012346|-|-----|-----|DAM+-WXZPI|1001_qqq_011_mmm_rrr [SUBA.W <ea>,Aq]
 12216:   //CLR.W Ar                                        |A|012346|-|-----|-----| A        |1001_rrr_011_001_rrr [SUBA.W Ar,Ar]
 12217:   //
 12218:   //SUBA.W <ea>,Aq
 12219:   //  ソースを符号拡張してロングで減算する
 12220:   public static void irpSubaWord () throws M68kException {
 12221:     XEiJ.mpuCycleCount++;
 12222:     int ea = XEiJ.regOC & 63;
 12223:     int z = ea < XEiJ.EA_MM ? (short) XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) : mmuReadWordSignData (efaAnyWord (ea), XEiJ.regSRS);  //このr[ea]はデータレジスタまたはアドレスレジスタ。pcws。イミディエイトを分離。ここでAqが変化する可能性があることに注意
 12224:     XEiJ.regRn[XEiJ.regOC >> 9 & 15] -= z;  //r[op >> 9 & 15] -= ea < XEiJ.EA_MM ? (short) r[ea] : rws (efaAnyWord (ea));は不可
 12225:     //ccrは変化しない
 12226:   }  //irpSubaWord
 12227: 
 12228:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12229:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 12230:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 12231:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12232:   //SUBX.B Dr,Dq                                    |-|012346|-|*UUUU|*****|          |1001_qqq_100_000_rrr
 12233:   //SUBX.B -(Ar),-(Aq)                              |-|012346|-|*UUUU|*****|          |1001_qqq_100_001_rrr
 12234:   //SUB.B Dq,<ea>                                   |-|012346|-|UUUUU|*****|  M+-WXZ  |1001_qqq_100_mmm_rrr
 12235:   public static void irpSubToMemByte () throws M68kException {
 12236:     int ea = XEiJ.regOC & 63;
 12237:     int a, x, y, z;
 12238:     if (ea < XEiJ.EA_MM) {
 12239:       if (ea < XEiJ.EA_AR) {  //SUBX.B Dr,Dq
 12240:         int qqq = XEiJ.regOC >> 9 & 7;
 12241:         XEiJ.mpuCycleCount++;
 12242:         y = XEiJ.regRn[ea];
 12243:         x = XEiJ.regRn[qqq];
 12244:         z = x - y - (XEiJ.regCCR >> 4);  //Xの左側はすべて0なのでCCR_X&を省略
 12245:         XEiJ.regRn[qqq] = ~255 & x | 255 & z;
 12246:       } else {  //SUBX.B -(Ar),-(Aq)
 12247:         XEiJ.mpuCycleCount += 2;
 12248:         M68kException.m6eIncremented -= 1L << (ea << 3);
 12249:         a = --XEiJ.regRn[ea];
 12250:         y = mmuReadByteSignData (a, XEiJ.regSRS);  //このr[ea]はアドレスレジスタ
 12251:         int aqq = XEiJ.regOC >> 9 & 15;  //1qqq=aqq
 12252:         M68kException.m6eIncremented -= 1L << (aqq << 3);
 12253:         a = --XEiJ.regRn[aqq];
 12254:         x = mmuModifyByteSignData (a, XEiJ.regSRS);
 12255:         z = x - y - (XEiJ.regCCR >> 4);  //Xの左側はすべて0なのでCCR_X&を省略
 12256:         mmuWriteByteData (a, z, XEiJ.regSRS);
 12257:       }
 12258:       XEiJ.regCCR = (z >> 4 & XEiJ.REG_CCR_N | (255 & z) - 1 >> 6 & XEiJ.regCCR & XEiJ.REG_CCR_Z |  //SUBXはZをクリアすることはあるがセットすることはない
 12259:              ((x ^ y) & (x ^ z)) >> 6 & XEiJ.REG_CCR_V |
 12260:              (byte) (x & (y ^ z) ^ (y | z)) >> 7 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C));  //ccr_subx_byte
 12261:     } else {  //SUB.B Dq,<ea>
 12262:       XEiJ.mpuCycleCount++;
 12263:       y = XEiJ.regRn[XEiJ.regOC >> 9 & 7];
 12264:       a = efaMltByte (ea);
 12265:       x = mmuModifyByteSignData (a, XEiJ.regSRS);
 12266:       z = x - y;
 12267:       mmuWriteByteData (a, z, XEiJ.regSRS);
 12268:       XEiJ.regCCR = (XEiJ.MPU_TSTB_TABLE[255 & z] |
 12269:              ((x ^ y) & (x ^ z)) >> 6 & XEiJ.REG_CCR_V |
 12270:              (byte) (x & (y ^ z) ^ (y | z)) >> 7 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C));  //ccr_sub_byte
 12271:     }
 12272:   }  //irpSubToMemByte
 12273: 
 12274:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12275:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 12276:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 12277:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12278:   //SUBX.W Dr,Dq                                    |-|012346|-|*UUUU|*****|          |1001_qqq_101_000_rrr
 12279:   //SUBX.W -(Ar),-(Aq)                              |-|012346|-|*UUUU|*****|          |1001_qqq_101_001_rrr
 12280:   //SUB.W Dq,<ea>                                   |-|012346|-|UUUUU|*****|  M+-WXZ  |1001_qqq_101_mmm_rrr
 12281:   public static void irpSubToMemWord () throws M68kException {
 12282:     int ea = XEiJ.regOC & 63;
 12283:     int a, x, y, z;
 12284:     if (ea < XEiJ.EA_MM) {
 12285:       if (ea < XEiJ.EA_AR) {  //SUBX.W Dr,Dq
 12286:         int qqq = XEiJ.regOC >> 9 & 7;
 12287:         XEiJ.mpuCycleCount++;
 12288:         y = XEiJ.regRn[ea];
 12289:         x = XEiJ.regRn[qqq];
 12290:         z = x - y - (XEiJ.regCCR >> 4);  //Xの左側はすべて0なのでCCR_X&を省略
 12291:         XEiJ.regRn[qqq] = ~65535 & x | (char) z;
 12292:       } else {  //SUBX.W -(Ar),-(Aq)
 12293:         XEiJ.mpuCycleCount += 2;
 12294:         M68kException.m6eIncremented -= 2L << (ea << 3);
 12295:         a = XEiJ.regRn[ea] -= 2;
 12296:         y = mmuReadWordSignData (a, XEiJ.regSRS);  //このr[ea]はアドレスレジスタ
 12297:         int aqq = XEiJ.regOC >> 9 & 15;
 12298:         M68kException.m6eIncremented -= 2L << (aqq << 3);
 12299:         a = XEiJ.regRn[aqq] -= 2;
 12300:         x = mmuModifyWordSignData (a, XEiJ.regSRS);
 12301:         z = x - y - (XEiJ.regCCR >> 4);  //Xの左側はすべて0なのでCCR_X&を省略
 12302:         mmuWriteWordData (a, z, XEiJ.regSRS);
 12303:       }
 12304:       XEiJ.regCCR = (z >> 12 & XEiJ.REG_CCR_N | (char) z - 1 >> 14 & XEiJ.regCCR & XEiJ.REG_CCR_Z |  //ADDXはZをクリアすることはあるがセットすることはない
 12305:              ((x ^ y) & (x ^ z)) >> 14 & XEiJ.REG_CCR_V |
 12306:              (short) (x & (y ^ z) ^ (y | z)) >> 15 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C));  //ccr_subx_word
 12307:     } else {  //SUB.W Dq,<ea>
 12308:       XEiJ.mpuCycleCount++;
 12309:       y = (short) XEiJ.regRn[XEiJ.regOC >> 9 & 7];
 12310:       a = efaMltWord (ea);
 12311:       x = mmuModifyWordSignData (a, XEiJ.regSRS);
 12312:       z = x - y;
 12313:       mmuWriteWordData (a, z, XEiJ.regSRS);
 12314:       XEiJ.regCCR = (z >> 12 & XEiJ.REG_CCR_N | (char) z - 1 >> 14 & XEiJ.REG_CCR_Z |
 12315:              ((x ^ y) & (x ^ z)) >> 14 & XEiJ.REG_CCR_V |
 12316:              (short) (x & (y ^ z) ^ (y | z)) >> 15 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C));  //ccr_sub_word
 12317:     }
 12318:   }  //irpSubToMemWord
 12319: 
 12320:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12321:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 12322:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 12323:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12324:   //SUBX.L Dr,Dq                                    |-|012346|-|*UUUU|*****|          |1001_qqq_110_000_rrr
 12325:   //SUBX.L -(Ar),-(Aq)                              |-|012346|-|*UUUU|*****|          |1001_qqq_110_001_rrr
 12326:   //SUB.L Dq,<ea>                                   |-|012346|-|UUUUU|*****|  M+-WXZ  |1001_qqq_110_mmm_rrr
 12327:   public static void irpSubToMemLong () throws M68kException {
 12328:     int ea = XEiJ.regOC & 63;
 12329:     if (ea < XEiJ.EA_MM) {
 12330:       int x;
 12331:       int y;
 12332:       int z;
 12333:       if (ea < XEiJ.EA_AR) {  //SUBX.L Dr,Dq
 12334:         int qqq = XEiJ.regOC >> 9 & 7;
 12335:         XEiJ.mpuCycleCount++;
 12336:         XEiJ.regRn[qqq] = z = (x = XEiJ.regRn[qqq]) - (y = XEiJ.regRn[ea]) - (XEiJ.regCCR >> 4);  //Xの左側はすべて0なのでCCR_X&を省略
 12337:       } else {  //SUBX.L -(Ar),-(Aq)
 12338:         XEiJ.mpuCycleCount += 2;
 12339:         M68kException.m6eIncremented -= 4L << (ea << 3);
 12340:         int a = XEiJ.regRn[ea] -= 4;  //このr[ea]はアドレスレジスタ
 12341:         y = mmuReadLongData (a, XEiJ.regSRS);
 12342:         int aqq = XEiJ.regOC >> 9 & 15;
 12343:         M68kException.m6eIncremented -= 4L << (aqq << 3);
 12344:         a = XEiJ.regRn[aqq] -= 4;
 12345:         mmuWriteLongData (a, z = (x = mmuModifyLongData (a, XEiJ.regSRS)) - y - (XEiJ.regCCR >> 4), XEiJ.regSRS);  //Xの左側はすべて0なのでCCR_X&を省略
 12346:       }
 12347:       XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_Z : 0) |
 12348:              ((x ^ y) & (x ^ z)) >>> 31 << 1 |
 12349:              (x & (y ^ z) ^ (y | z)) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C));  //ccr_subx
 12350:     } else {  //SUB.L Dq,<ea>
 12351:       XEiJ.mpuCycleCount++;
 12352:       int a = efaMltLong (ea);
 12353:       int x;
 12354:       int y;
 12355:       int z;
 12356:       mmuWriteLongData (a, z = (x = mmuModifyLongData (a, XEiJ.regSRS)) - (y = XEiJ.regRn[XEiJ.regOC >> 9 & 7]), XEiJ.regSRS);
 12357:       XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) |
 12358:              ((x ^ y) & (x ^ z)) >>> 31 << 1 |
 12359:              (x & (y ^ z) ^ (y | z)) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C));  //ccr_sub
 12360:     }
 12361:   }  //irpSubToMemLong
 12362: 
 12363:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12364:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 12365:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 12366:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12367:   //SUBA.L <ea>,Aq                                  |-|012346|-|-----|-----|DAM+-WXZPI|1001_qqq_111_mmm_rrr
 12368:   //SUB.L <ea>,Aq                                   |A|012346|-|-----|-----|DAM+-WXZPI|1001_qqq_111_mmm_rrr [SUBA.L <ea>,Aq]
 12369:   //CLR.L Ar                                        |A|012346|-|-----|-----| A        |1001_rrr_111_001_rrr [SUBA.L Ar,Ar]
 12370:   public static void irpSubaLong () throws M68kException {
 12371:     int ea = XEiJ.regOC & 63;
 12372:     XEiJ.mpuCycleCount++;
 12373:     int z = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS) : mmuReadLongData (efaAnyLong (ea), XEiJ.regSRS);  //このr[ea]はデータレジスタまたはアドレスレジスタ。pcls。イミディエイトを分離。ここでAqが変化する可能性があることに注意
 12374:     XEiJ.regRn[XEiJ.regOC >> 9 & 15] -= z;  //r[op >> 9 & 15] -= ea < XEiJ.EA_MM ? r[ea] : rls (efaAnyLong (ea));は不可
 12375:     //ccrは変化しない
 12376:   }  //irpSubaLong
 12377: 
 12378:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12379:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 12380:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 12381:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12382:   //SXCALL <name>                                   |A|012346|-|UUUUU|*****|          |1010_0dd_ddd_ddd_ddd [ALINE #<data>]
 12383:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12384:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 12385:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 12386:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12387:   //ALINE #<data>                                   |-|012346|-|UUUUU|*****|          |1010_ddd_ddd_ddd_ddd (line 1010 emulator)
 12388:   public static void irpAline () throws M68kException {
 12389:     irpExceptionFormat0 (M68kException.M6E_LINE_1010_EMULATOR << 2, XEiJ.regPC0);  //pcは命令の先頭
 12390:   }  //irpAline
 12391: 
 12392:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12393:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 12394:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 12395:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12396:   //CMP.B <ea>,Dq                                   |-|012346|-|-UUUU|-****|D M+-WXZPI|1011_qqq_000_mmm_rrr
 12397:   public static void irpCmpByte () throws M68kException {
 12398:     XEiJ.mpuCycleCount++;
 12399:     int ea = XEiJ.regOC & 63;
 12400:     int x;
 12401:     int y;
 12402:     int z = (byte) ((x = (byte) XEiJ.regRn[XEiJ.regOC >> 9 & 7]) - (y = ea < XEiJ.EA_AR ? (byte) XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadByteSignExword ((XEiJ.regPC += 2) - 1, XEiJ.regSRS) : mmuReadByteSignData (efaAnyByte (ea), XEiJ.regSRS)));  //pcbs。イミディエイトを分離
 12403:     XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) |
 12404:            ((x ^ y) & (x ^ z)) >>> 31 << 1 |
 12405:            (x & (y ^ z) ^ (y | z)) >>> 31);  //ccr_cmp
 12406:   }  //irpCmpByte
 12407: 
 12408:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12409:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 12410:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 12411:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12412:   //CMP.W <ea>,Dq                                   |-|012346|-|-UUUU|-****|DAM+-WXZPI|1011_qqq_001_mmm_rrr
 12413:   public static void irpCmpWord () throws M68kException {
 12414:     XEiJ.mpuCycleCount++;
 12415:     int ea = XEiJ.regOC & 63;
 12416:     int x;
 12417:     int y;
 12418:     int z = (short) ((x = (short) XEiJ.regRn[XEiJ.regOC >> 9 & 7]) - (y = ea < XEiJ.EA_MM ? (short) XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) : mmuReadWordSignData (efaAnyWord (ea), XEiJ.regSRS)));  //このr[ea]はデータレジスタまたはアドレスレジスタ。pcws。イミディエイトを分離
 12419:     XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) |
 12420:            ((x ^ y) & (x ^ z)) >>> 31 << 1 |
 12421:            (x & (y ^ z) ^ (y | z)) >>> 31);  //ccr_cmp
 12422:   }  //irpCmpWord
 12423: 
 12424:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12425:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 12426:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 12427:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12428:   //CMP.L <ea>,Dq                                   |-|012346|-|-UUUU|-****|DAM+-WXZPI|1011_qqq_010_mmm_rrr
 12429:   public static void irpCmpLong () throws M68kException {
 12430:     XEiJ.mpuCycleCount++;
 12431:     int ea = XEiJ.regOC & 63;
 12432:     int x;
 12433:     int y;
 12434:     int z = (x = XEiJ.regRn[XEiJ.regOC >> 9 & 7]) - (y = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS) : mmuReadLongData (efaAnyLong (ea), XEiJ.regSRS));  //このr[ea]はデータレジスタまたはアドレスレジスタ。pcls。イミディエイトを分離
 12435:     XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) |
 12436:            ((x ^ y) & (x ^ z)) >>> 31 << 1 |
 12437:            (x & (y ^ z) ^ (y | z)) >>> 31);  //ccr_cmp
 12438:   }  //irpCmpLong
 12439: 
 12440:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12441:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 12442:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 12443:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12444:   //CMPA.W <ea>,Aq                                  |-|012346|-|-UUUU|-****|DAM+-WXZPI|1011_qqq_011_mmm_rrr
 12445:   //CMP.W <ea>,Aq                                   |A|012346|-|-UUUU|-****|DAM+-WXZPI|1011_qqq_011_mmm_rrr [CMPA.W <ea>,Aq]
 12446:   //
 12447:   //CMPA.W <ea>,Aq
 12448:   //  ソースを符号拡張してロングで比較する
 12449:   public static void irpCmpaWord () throws M68kException {
 12450:     XEiJ.mpuCycleCount++;
 12451:     int ea = XEiJ.regOC & 63;
 12452:     //ソースを符号拡張してからロングで比較する
 12453:     int y = ea < XEiJ.EA_MM ? (short) XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) : mmuReadWordSignData (efaAnyWord (ea), XEiJ.regSRS);  //このr[ea]はデータレジスタまたはアドレスレジスタ。pcws。イミディエイトを分離。ここでAqが変化する可能性があることに注意
 12454:     int x;
 12455:     int z = (x = XEiJ.regRn[XEiJ.regOC >> 9 & 15]) - y;
 12456:     XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) |
 12457:            ((x ^ y) & (x ^ z)) >>> 31 << 1 |
 12458:            (x & (y ^ z) ^ (y | z)) >>> 31);  //ccr_cmp
 12459:   }  //irpCmpaWord
 12460: 
 12461:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12462:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 12463:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 12464:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12465:   //EOR.B Dq,<ea>                                   |-|012346|-|-UUUU|-**00|D M+-WXZ  |1011_qqq_100_mmm_rrr
 12466:   //CMPM.B (Ar)+,(Aq)+                              |-|012346|-|-UUUU|-****|          |1011_qqq_100_001_rrr
 12467:   public static void irpEorByte () throws M68kException {
 12468:     int ea = XEiJ.regOC & 63;
 12469:     if (ea >> 3 == XEiJ.MMM_AR) {  //CMPM.B (Ar)+,(Aq)+
 12470:       XEiJ.mpuCycleCount += 2;
 12471:       M68kException.m6eIncremented += 1L << (ea << 3);
 12472:       int a = XEiJ.regRn[ea]++;  //このr[ea]はアドレスレジスタ
 12473:       int y = mmuReadByteSignData (a, XEiJ.regSRS);
 12474:       int x;
 12475:       int aqq = XEiJ.regOC >> 9 & 15;
 12476:       M68kException.m6eIncremented += 1L << (aqq << 3);
 12477:       a = XEiJ.regRn[aqq]++;
 12478:       int z = (byte) ((x = mmuReadByteSignData (a, XEiJ.regSRS)) - y);
 12479:       XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) |
 12480:              ((x ^ y) & (x ^ z)) >>> 31 << 1 |
 12481:              (x & (y ^ z) ^ (y | z)) >>> 31);  //ccr_cmp
 12482:     } else {
 12483:       int qqq = XEiJ.regOC >> 9 & 7;
 12484:       int z;
 12485:       if (ea < XEiJ.EA_AR) {  //EOR.B Dq,Dr
 12486:         XEiJ.mpuCycleCount++;
 12487:         z = XEiJ.regRn[ea] ^= 255 & XEiJ.regRn[qqq];  //0拡張してからEOR
 12488:       } else {  //EOR.B Dq,<mem>
 12489:         XEiJ.mpuCycleCount++;
 12490:         int a = efaMltByte (ea);
 12491:         mmuWriteByteData (a, z = XEiJ.regRn[qqq] ^ mmuModifyByteSignData (a, XEiJ.regSRS), XEiJ.regSRS);
 12492:       }
 12493:       XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & z];  //ccr_tst_byte
 12494:     }
 12495:   }  //irpEorByte
 12496: 
 12497:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12498:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 12499:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 12500:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12501:   //EOR.W Dq,<ea>                                   |-|012346|-|-UUUU|-**00|D M+-WXZ  |1011_qqq_101_mmm_rrr
 12502:   //CMPM.W (Ar)+,(Aq)+                              |-|012346|-|-UUUU|-****|          |1011_qqq_101_001_rrr
 12503:   public static void irpEorWord () throws M68kException {
 12504:     int ea = XEiJ.regOC & 63;
 12505:     int rrr = XEiJ.regOC & 7;
 12506:     int mmm = ea >> 3;
 12507:     if (mmm == XEiJ.MMM_AR) {  //CMPM.W (Ar)+,(Aq)+
 12508:       XEiJ.mpuCycleCount += 2;
 12509:       M68kException.m6eIncremented += 2L << (ea << 3);
 12510:       int a = (XEiJ.regRn[ea] += 2) - 2;  //このr[ea]はアドレスレジスタ
 12511:       int y = mmuReadWordSignData (a, XEiJ.regSRS);
 12512:       int x;
 12513:       int aqq = XEiJ.regOC >> 9 & 15;
 12514:       M68kException.m6eIncremented += 2L << (aqq << 3);
 12515:       a = (XEiJ.regRn[aqq] += 2) - 2;
 12516:       int z = (short) ((x = mmuReadWordSignData (a, XEiJ.regSRS)) - y);
 12517:       XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) |
 12518:              ((x ^ y) & (x ^ z)) >>> 31 << 1 |
 12519:              (x & (y ^ z) ^ (y | z)) >>> 31);  //ccr_cmp
 12520:     } else {
 12521:       int qqq = XEiJ.regOC >> 9 & 7;
 12522:       int z;
 12523:       if (ea < XEiJ.EA_AR) {  //EOR.W Dq,Dr
 12524:         XEiJ.mpuCycleCount++;
 12525:         z = XEiJ.regRn[rrr] ^= (char) XEiJ.regRn[qqq];  //0拡張してからEOR
 12526:       } else {  //EOR.W Dq,<mem>
 12527:         XEiJ.mpuCycleCount++;
 12528:         int a = efaMltWord (ea);
 12529:         mmuWriteWordData (a, z = XEiJ.regRn[qqq] ^ mmuModifyWordSignData (a, XEiJ.regSRS), XEiJ.regSRS);
 12530:       }
 12531:       XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (char) z - 1 >> 31 & XEiJ.REG_CCR_Z | ((short) z < 0 ? XEiJ.REG_CCR_N : 0);  //ccr_tst_word
 12532:     }
 12533:   }  //irpEorWord
 12534: 
 12535:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12536:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 12537:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 12538:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12539:   //EOR.L Dq,<ea>                                   |-|012346|-|-UUUU|-**00|D M+-WXZ  |1011_qqq_110_mmm_rrr
 12540:   //CMPM.L (Ar)+,(Aq)+                              |-|012346|-|-UUUU|-****|          |1011_qqq_110_001_rrr
 12541:   public static void irpEorLong () throws M68kException {
 12542:     int ea = XEiJ.regOC & 63;
 12543:     if (ea >> 3 == XEiJ.MMM_AR) {  //CMPM.L (Ar)+,(Aq)+
 12544:       XEiJ.mpuCycleCount += 2;
 12545:       M68kException.m6eIncremented += 4L << (ea << 3);
 12546:       int a = (XEiJ.regRn[ea] += 4) - 4;  //このr[ea]はアドレスレジスタ
 12547:       int y = mmuReadLongData (a, XEiJ.regSRS);
 12548:       int x;
 12549:       int aqq = XEiJ.regOC >> 9 & 15;
 12550:       M68kException.m6eIncremented += 4L << (aqq << 3);
 12551:       a = (XEiJ.regRn[aqq] += 4) - 4;
 12552:       int z = (x = mmuReadLongData (a, XEiJ.regSRS)) - y;
 12553:       XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) |
 12554:              ((x ^ y) & (x ^ z)) >>> 31 << 1 |
 12555:              (x & (y ^ z) ^ (y | z)) >>> 31);  //ccr_cmp
 12556:     } else {
 12557:       int qqq = XEiJ.regOC >> 9 & 7;
 12558:       int z;
 12559:       if (ea < XEiJ.EA_AR) {  //EOR.L Dq,Dr
 12560:         XEiJ.mpuCycleCount++;
 12561:         XEiJ.regRn[ea] = z = XEiJ.regRn[ea] ^ XEiJ.regRn[qqq];
 12562:       } else {  //EOR.L Dq,<mem>
 12563:         XEiJ.mpuCycleCount++;
 12564:         int a = efaMltLong (ea);
 12565:         mmuWriteLongData (a, z = mmuModifyLongData (a, XEiJ.regSRS) ^ XEiJ.regRn[qqq], XEiJ.regSRS);
 12566:       }
 12567:       XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X);  //ccr_tst
 12568:     }
 12569:   }  //irpEorLong
 12570: 
 12571:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12572:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 12573:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 12574:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12575:   //CMPA.L <ea>,Aq                                  |-|012346|-|-UUUU|-****|DAM+-WXZPI|1011_qqq_111_mmm_rrr
 12576:   //CMP.L <ea>,Aq                                   |A|012346|-|-UUUU|-****|DAM+-WXZPI|1011_qqq_111_mmm_rrr [CMPA.L <ea>,Aq]
 12577:   public static void irpCmpaLong () throws M68kException {
 12578:     XEiJ.mpuCycleCount++;
 12579:     int ea = XEiJ.regOC & 63;
 12580:     int y = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS) : mmuReadLongData (efaAnyLong (ea), XEiJ.regSRS);  //このr[ea]はデータレジスタまたはアドレスレジスタ。pcls。イミディエイトを分離。ここでAqが変化する可能性があることに注意
 12581:     int x;
 12582:     int z = (x = XEiJ.regRn[XEiJ.regOC >> 9 & 15]) - y;
 12583:     XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) |
 12584:            ((x ^ y) & (x ^ z)) >>> 31 << 1 |
 12585:            (x & (y ^ z) ^ (y | z)) >>> 31);  //ccr_cmp
 12586:   }  //irpCmpaLong
 12587: 
 12588:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12589:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 12590:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 12591:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12592:   //AND.B <ea>,Dq                                   |-|012346|-|-UUUU|-**00|D M+-WXZPI|1100_qqq_000_mmm_rrr
 12593:   public static void irpAndToRegByte () throws M68kException {
 12594:     XEiJ.mpuCycleCount++;
 12595:     int ea = XEiJ.regOC & 63;
 12596:     XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & (XEiJ.regRn[XEiJ.regOC >> 9 & 7] &= ~255 | (ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadByteSignExword ((XEiJ.regPC += 2) - 1, XEiJ.regSRS) : mmuReadByteSignData (efaAnyByte (ea), XEiJ.regSRS)))];  //ccr_tst_byte。pcbs。イミディエイトを分離。1拡張してからAND
 12597:   }  //irpAndToRegByte
 12598: 
 12599:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12600:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 12601:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 12602:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12603:   //AND.W <ea>,Dq                                   |-|012346|-|-UUUU|-**00|D M+-WXZPI|1100_qqq_001_mmm_rrr
 12604:   public static void irpAndToRegWord () throws M68kException {
 12605:     XEiJ.mpuCycleCount++;
 12606:     int ea = XEiJ.regOC & 63;
 12607:     int z = XEiJ.regRn[XEiJ.regOC >> 9 & 7] &= ~65535 | (ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) : mmuReadWordSignData (efaAnyWord (ea), XEiJ.regSRS));  //pcws。イミディエイトを分離。1拡張してからAND
 12608:     XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (char) z - 1 >> 31 & XEiJ.REG_CCR_Z | ((short) z < 0 ? XEiJ.REG_CCR_N : 0);  //ccr_tst_word
 12609:   }  //irpAndToRegWord
 12610: 
 12611:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12612:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 12613:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 12614:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12615:   //AND.L <ea>,Dq                                   |-|012346|-|-UUUU|-**00|D M+-WXZPI|1100_qqq_010_mmm_rrr
 12616:   public static void irpAndToRegLong () throws M68kException {
 12617:     XEiJ.mpuCycleCount++;
 12618:     int ea = XEiJ.regOC & 63;
 12619:     int z = XEiJ.regRn[XEiJ.regOC >> 9 & 7] &= ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS) : mmuReadLongData (efaAnyLong (ea), XEiJ.regSRS);  //pcls。イミディエイトを分離
 12620:     XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X);  //ccr_tst
 12621:   }  //irpAndToRegLong
 12622: 
 12623:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12624:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 12625:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 12626:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12627:   //MULU.W <ea>,Dq                                  |-|012346|-|-UUUU|-***0|D M+-WXZPI|1100_qqq_011_mmm_rrr
 12628:   public static void irpMuluWord () throws M68kException {
 12629:     XEiJ.mpuCycleCount += 2;
 12630:     int ea = XEiJ.regOC & 63;
 12631:     int qqq = XEiJ.regOC >> 9 & 7;
 12632:     int y = ea < XEiJ.EA_AR ? (char) XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) : mmuReadWordZeroData (efaAnyWord (ea), XEiJ.regSRS);  //pcwz。イミディエイトを分離
 12633:     int z;
 12634:     XEiJ.regRn[qqq] = z = (char) XEiJ.regRn[qqq] * y;  //積の下位32ビット。オーバーフローは無視
 12635:     XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X);  //ccr_tst
 12636:   }  //irpMuluWord
 12637: 
 12638:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12639:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 12640:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 12641:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12642:   //ABCD.B Dr,Dq                                    |-|012346|-|UUUUU|*U*U*|          |1100_qqq_100_000_rrr
 12643:   //ABCD.B -(Ar),-(Aq)                              |-|012346|-|UUUUU|*U*U*|          |1100_qqq_100_001_rrr
 12644:   //AND.B Dq,<ea>                                   |-|012346|-|-UUUU|-**00|  M+-WXZ  |1100_qqq_100_mmm_rrr
 12645:   public static void irpAndToMemByte () throws M68kException {
 12646:     int ea = XEiJ.regOC & 63;
 12647:     if (ea >= XEiJ.EA_MM) {  //AND.B Dq,<ea>
 12648:       XEiJ.mpuCycleCount++;
 12649:       int a = efaMltByte (ea);
 12650:       int z = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & mmuModifyByteSignData (a, XEiJ.regSRS);
 12651:       mmuWriteByteData (a, z, XEiJ.regSRS);
 12652:       XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & z];  //ccr_tst_byte
 12653:     } else if (ea < XEiJ.EA_AR) {  //ABCD.B Dr,Dq
 12654:       int qqq = XEiJ.regOC >> 9 & 7;
 12655:       XEiJ.mpuCycleCount++;
 12656:       XEiJ.regRn[qqq] = ~0xff & XEiJ.regRn[qqq] | irpAbcd (XEiJ.regRn[qqq], XEiJ.regRn[ea]);
 12657:     } else {  //ABCD.B -(Ar),-(Aq)
 12658:       XEiJ.mpuCycleCount += 2;
 12659:       M68kException.m6eIncremented -= 1L << (ea << 3);
 12660:       int a = --XEiJ.regRn[ea];  //このr[ea]はアドレスレジスタ
 12661:       int y = mmuReadByteZeroData (a, XEiJ.regSRS);
 12662:       int aqq = (XEiJ.regOC >> 9) - (96 - 8);
 12663:       M68kException.m6eIncremented -= 1L << (aqq << 3);
 12664:       a = --XEiJ.regRn[aqq];
 12665:       mmuWriteByteData (a, irpAbcd (mmuModifyByteZeroData (a, XEiJ.regSRS), y), XEiJ.regSRS);
 12666:     }
 12667:   }  //irpAndToMemByte
 12668: 
 12669:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12670:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 12671:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 12672:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12673:   //EXG.L Dq,Dr                                     |-|012346|-|-----|-----|          |1100_qqq_101_000_rrr
 12674:   //EXG.L Aq,Ar                                     |-|012346|-|-----|-----|          |1100_qqq_101_001_rrr
 12675:   //AND.W Dq,<ea>                                   |-|012346|-|-UUUU|-**00|  M+-WXZ  |1100_qqq_101_mmm_rrr
 12676:   public static void irpAndToMemWord () throws M68kException {
 12677:     int ea = XEiJ.regOC & 63;
 12678:     if (ea < XEiJ.EA_MM) {  //EXG
 12679:       XEiJ.mpuCycleCount++;
 12680:       if (ea < XEiJ.EA_AR) {  //EXG.L Dq,Dr
 12681:         int qqq = XEiJ.regOC >> 9 & 7;
 12682:         int t = XEiJ.regRn[qqq];
 12683:         XEiJ.regRn[qqq] = XEiJ.regRn[ea];
 12684:         XEiJ.regRn[ea] = t;
 12685:       } else {  //EXG.L Aq,Ar
 12686:         int aqq = (XEiJ.regOC >> 9) - (96 - 8);
 12687:         int t = XEiJ.regRn[aqq];
 12688:         XEiJ.regRn[aqq] = XEiJ.regRn[ea];  //このr[ea]アドレスレジスタ
 12689:         XEiJ.regRn[ea] = t;  //このr[ea]はアドレスレジスタ
 12690:       }
 12691:     } else {  //AND.W Dq,<ea>
 12692:       XEiJ.mpuCycleCount++;
 12693:       int a = efaMltWord (ea);
 12694:       int z = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & mmuModifyWordSignData (a, XEiJ.regSRS);
 12695:       mmuWriteWordData (a, z, XEiJ.regSRS);
 12696:       XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (char) z - 1 >> 31 & XEiJ.REG_CCR_Z | ((short) z < 0 ? XEiJ.REG_CCR_N : 0);  //ccr_tst_word
 12697:     }
 12698:   }  //irpAndToMemWord
 12699: 
 12700:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12701:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 12702:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 12703:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12704:   //EXG.L Dq,Ar                                     |-|012346|-|-----|-----|          |1100_qqq_110_001_rrr
 12705:   //AND.L Dq,<ea>                                   |-|012346|-|-UUUU|-**00|  M+-WXZ  |1100_qqq_110_mmm_rrr
 12706:   public static void irpAndToMemLong () throws M68kException {
 12707:     int ea = XEiJ.regOC & 63;
 12708:     int qqq = XEiJ.regOC >> 9 & 7;
 12709:     if (ea >> 3 == XEiJ.MMM_AR) {  //EXG.L Dq,Ar
 12710:       XEiJ.mpuCycleCount++;
 12711:       int t = XEiJ.regRn[qqq];
 12712:       XEiJ.regRn[qqq] = XEiJ.regRn[ea];  //このr[ea]はアドレスレジスタ
 12713:       XEiJ.regRn[ea] = t;  //このr[ea]はアドレスレジスタ
 12714:     } else {  //AND.L Dq,<ea>
 12715:       XEiJ.mpuCycleCount++;
 12716:       int a = efaMltLong (ea);
 12717:       int z;
 12718:       mmuWriteLongData (a, z = mmuModifyLongData (a, XEiJ.regSRS) & XEiJ.regRn[qqq], XEiJ.regSRS);
 12719:       XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X);  //ccr_tst
 12720:     }
 12721:   }  //irpAndToMemLong
 12722: 
 12723:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12724:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 12725:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 12726:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12727:   //MULS.W <ea>,Dq                                  |-|012346|-|-UUUU|-***0|D M+-WXZPI|1100_qqq_111_mmm_rrr
 12728:   public static void irpMulsWord () throws M68kException {
 12729:     XEiJ.mpuCycleCount += 2;
 12730:     int ea = XEiJ.regOC & 63;
 12731:     int qqq = XEiJ.regOC >> 9 & 7;
 12732:     int y = ea < XEiJ.EA_AR ? (short) XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) : mmuReadWordSignData (efaAnyWord (ea), XEiJ.regSRS);  //pcws。イミディエイトを分離
 12733:     int z;
 12734:     XEiJ.regRn[qqq] = z = (short) XEiJ.regRn[qqq] * y;  //積の下位32ビット。オーバーフローは無視
 12735:     XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X);  //ccr_tst
 12736:   }  //irpMulsWord
 12737: 
 12738:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12739:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 12740:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 12741:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12742:   //ADD.B <ea>,Dq                                   |-|012346|-|UUUUU|*****|D M+-WXZPI|1101_qqq_000_mmm_rrr
 12743:   public static void irpAddToRegByte () throws M68kException {
 12744:     XEiJ.mpuCycleCount++;
 12745:     int ea = XEiJ.regOC & 63;
 12746:     int qqq = XEiJ.regOC >> 9 & 7;
 12747:     int x, y, z;
 12748:     y = ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadByteSignExword ((XEiJ.regPC += 2) - 1, XEiJ.regSRS) : mmuReadByteSignData (efaAnyByte (ea), XEiJ.regSRS);  //pcbs。イミディエイトを分離
 12749:     x = XEiJ.regRn[qqq];
 12750:     z = x + y;
 12751:     XEiJ.regRn[qqq] = ~255 & x | 255 & z;
 12752:     XEiJ.regCCR = (XEiJ.MPU_TSTB_TABLE[255 & z] |
 12753:            ((x ^ z) & (y ^ z)) >> 6 & XEiJ.REG_CCR_V |
 12754:            (byte) ((x | y) ^ (x ^ y) & z) >> 7 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C));  //ccr_add_byte
 12755:   }  //irpAddToRegByte
 12756: 
 12757:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12758:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 12759:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 12760:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12761:   //ADD.W <ea>,Dq                                   |-|012346|-|UUUUU|*****|DAM+-WXZPI|1101_qqq_001_mmm_rrr
 12762:   public static void irpAddToRegWord () throws M68kException {
 12763:     XEiJ.mpuCycleCount++;
 12764:     int ea = XEiJ.regOC & 63;
 12765:     int qqq = XEiJ.regOC >> 9 & 7;
 12766:     int x, y, z;
 12767:     y = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) : mmuReadWordSignData (efaAnyWord (ea), XEiJ.regSRS);  //このr[ea]はデータレジスタまたはアドレスレジスタ。pcws。イミディエイトを分離
 12768:     x = XEiJ.regRn[qqq];
 12769:     z = x + y;
 12770:     XEiJ.regRn[qqq] = ~65535 & x | (char) z;
 12771:     XEiJ.regCCR = (z >> 12 & XEiJ.REG_CCR_N | (char) z - 1 >> 14 & XEiJ.REG_CCR_Z |
 12772:            ((x ^ z) & (y ^ z)) >> 14 & XEiJ.REG_CCR_V |
 12773:            (short) ((x | y) ^ (x ^ y) & z) >> 15 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C));  //ccr_add_word
 12774:   }  //irpAddToRegWord
 12775: 
 12776:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12777:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 12778:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 12779:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12780:   //ADD.L <ea>,Dq                                   |-|012346|-|UUUUU|*****|DAM+-WXZPI|1101_qqq_010_mmm_rrr
 12781:   public static void irpAddToRegLong () throws M68kException {
 12782:     XEiJ.mpuCycleCount++;
 12783:     int ea = XEiJ.regOC & 63;
 12784:     int qqq = XEiJ.regOC >> 9 & 7;
 12785:     int x, y, z;
 12786:     y = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS) : mmuReadLongData (efaAnyLong (ea), XEiJ.regSRS);  //このr[ea]はデータレジスタまたはアドレスレジスタ。pcls。イミディエイトを分離
 12787:     x = XEiJ.regRn[qqq];
 12788:     z = x + y;
 12789:     XEiJ.regRn[qqq] = z;
 12790:     XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) |
 12791:            ((x ^ z) & (y ^ z)) >> 30 & XEiJ.REG_CCR_V |
 12792:            ((x | y) ^ (x ^ y) & z) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C));  //ccr_add
 12793:   }  //irpAddToRegLong
 12794: 
 12795:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12796:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 12797:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 12798:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12799:   //ADDA.W <ea>,Aq                                  |-|012346|-|-----|-----|DAM+-WXZPI|1101_qqq_011_mmm_rrr
 12800:   //ADD.W <ea>,Aq                                   |A|012346|-|-----|-----|DAM+-WXZPI|1101_qqq_011_mmm_rrr [ADDA.W <ea>,Aq]
 12801:   //
 12802:   //ADDA.W <ea>,Aq
 12803:   //  ソースを符号拡張してロングで加算する
 12804:   public static void irpAddaWord () throws M68kException {
 12805:     XEiJ.mpuCycleCount++;
 12806:     int ea = XEiJ.regOC & 63;
 12807:     int z = ea < XEiJ.EA_MM ? (short) XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) : mmuReadWordSignData (efaAnyWord (ea), XEiJ.regSRS);  //このr[ea]はデータレジスタまたはアドレスレジスタ。pcws。イミディエイトを分離。ここでAqが変化する可能性があることに注意
 12808:     XEiJ.regRn[XEiJ.regOC >> 9 & 15] += z;  //r[op >> 9 & 15] += ea < XEiJ.EA_MM ? (short) r[ea] : rws (efaAnyWord (ea));は不可
 12809:     //ccrは変化しない
 12810:   }  //irpAddaWord
 12811: 
 12812:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12813:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 12814:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 12815:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12816:   //ADDX.B Dr,Dq                                    |-|012346|-|*UUUU|*****|          |1101_qqq_100_000_rrr
 12817:   //ADDX.B -(Ar),-(Aq)                              |-|012346|-|*UUUU|*****|          |1101_qqq_100_001_rrr
 12818:   //ADD.B Dq,<ea>                                   |-|012346|-|UUUUU|*****|  M+-WXZ  |1101_qqq_100_mmm_rrr
 12819:   public static void irpAddToMemByte () throws M68kException {
 12820:     int ea = XEiJ.regOC & 63;
 12821:     int a, x, y, z;
 12822:     if (ea < XEiJ.EA_MM) {
 12823:       if (ea < XEiJ.EA_AR) {  //ADDX.B Dr,Dq
 12824:         int qqq = XEiJ.regOC >> 9 & 7;
 12825:         XEiJ.mpuCycleCount++;
 12826:         y = XEiJ.regRn[ea];
 12827:         x = XEiJ.regRn[qqq];
 12828:         z = x + y + (XEiJ.regCCR >> 4);  //Xの左側はすべて0なのでCCR_X&を省略
 12829:         XEiJ.regRn[qqq] = ~255 & x | 255 & z;
 12830:       } else {  //ADDX.B -(Ar),-(Aq)
 12831:         XEiJ.mpuCycleCount += 2;
 12832:         M68kException.m6eIncremented -= 1L << (ea << 3);
 12833:         a = --XEiJ.regRn[ea];  //このr[ea]はアドレスレジスタ
 12834:         y = mmuReadByteSignData (a, XEiJ.regSRS);
 12835:         int aqq = XEiJ.regOC >> 9 & 15;  //1qqq=aqq
 12836:         M68kException.m6eIncremented -= 1L << (aqq << 3);
 12837:         a = --XEiJ.regRn[aqq];
 12838:         x = mmuModifyByteSignData (a, XEiJ.regSRS);
 12839:         z = x + y + (XEiJ.regCCR >> 4);  //Xの左側はすべて0なのでCCR_X&を省略
 12840:         mmuWriteByteData (a, z, XEiJ.regSRS);
 12841:       }
 12842:       XEiJ.regCCR = (z >> 4 & XEiJ.REG_CCR_N | (255 & z) - 1 >> 6 & XEiJ.regCCR & XEiJ.REG_CCR_Z |  //ADDXはZをクリアすることはあるがセットすることはない
 12843:              ((x ^ z) & (y ^ z)) >> 6 & XEiJ.REG_CCR_V |
 12844:              (byte) ((x | y) ^ (x ^ y) & z) >> 7 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C));  //ccr_addx_byte
 12845:     } else {  //ADD.B Dq,<ea>
 12846:       XEiJ.mpuCycleCount++;
 12847:       y = XEiJ.regRn[XEiJ.regOC >> 9 & 7];
 12848:       a = efaMltByte (ea);
 12849:       x = mmuModifyByteSignData (a, XEiJ.regSRS);
 12850:       z = x + y;
 12851:       mmuWriteByteData (a, z, XEiJ.regSRS);
 12852:       XEiJ.regCCR = (XEiJ.MPU_TSTB_TABLE[255 & z] |
 12853:              ((x ^ z) & (y ^ z)) >> 6 & XEiJ.REG_CCR_V |
 12854:              (byte) ((x | y) ^ (x ^ y) & z) >> 7 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C));  //ccr_add_byte
 12855:     }
 12856:   }  //irpAddToMemByte
 12857: 
 12858:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12859:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 12860:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 12861:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12862:   //ADDX.W Dr,Dq                                    |-|012346|-|*UUUU|*****|          |1101_qqq_101_000_rrr
 12863:   //ADDX.W -(Ar),-(Aq)                              |-|012346|-|*UUUU|*****|          |1101_qqq_101_001_rrr
 12864:   //ADD.W Dq,<ea>                                   |-|012346|-|UUUUU|*****|  M+-WXZ  |1101_qqq_101_mmm_rrr
 12865:   public static void irpAddToMemWord () throws M68kException {
 12866:     int ea = XEiJ.regOC & 63;
 12867:     int a, x, y, z;
 12868:     if (ea < XEiJ.EA_MM) {
 12869:       if (ea < XEiJ.EA_AR) {  //ADDX.W Dr,Dq
 12870:         int qqq = XEiJ.regOC >> 9 & 7;
 12871:         XEiJ.mpuCycleCount++;
 12872:         y = XEiJ.regRn[ea];
 12873:         x = XEiJ.regRn[qqq];
 12874:         z = x + y + (XEiJ.regCCR >> 4);  //Xの左側はすべて0なのでCCR_X&を省略
 12875:         XEiJ.regRn[qqq] = ~65535 & x | (char) z;
 12876:       } else {  //ADDX.W -(Ar),-(Aq)
 12877:         XEiJ.mpuCycleCount += 2;
 12878:         M68kException.m6eIncremented -= 2L << (ea << 3);
 12879:         a = XEiJ.regRn[ea] -= 2;  //このr[ea]はアドレスレジスタ
 12880:         y = mmuReadWordSignData (a, XEiJ.regSRS);
 12881:         int aqq = XEiJ.regOC >> 9 & 15;
 12882:         M68kException.m6eIncremented -= 2L << (aqq << 3);
 12883:         a = XEiJ.regRn[aqq] -= 2;
 12884:         x = mmuModifyWordSignData (a, XEiJ.regSRS);
 12885:         z = x + y + (XEiJ.regCCR >> 4);  //Xの左側はすべて0なのでCCR_X&を省略
 12886:         mmuWriteWordData (a, z, XEiJ.regSRS);
 12887:       }
 12888:       XEiJ.regCCR = (z >> 12 & XEiJ.REG_CCR_N | (char) z - 1 >> 14 & XEiJ.regCCR & XEiJ.REG_CCR_Z |  //ADDXはZをクリアすることはあるがセットすることはない
 12889:              ((x ^ z) & (y ^ z)) >> 14 & XEiJ.REG_CCR_V |
 12890:              (short) ((x | y) ^ (x ^ y) & z) >> 15 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C));  //ccr_addx_word
 12891:     } else {  //ADD.W Dq,<ea>
 12892:       XEiJ.mpuCycleCount++;
 12893:       a = efaMltWord (ea);
 12894:       y = XEiJ.regRn[XEiJ.regOC >> 9 & 7];
 12895:       x = mmuModifyWordSignData (a, XEiJ.regSRS);
 12896:       z = x + y;
 12897:       mmuWriteWordData (a, z, XEiJ.regSRS);
 12898:       XEiJ.regCCR = (z >> 12 & XEiJ.REG_CCR_N | (char) z - 1 >> 14 & XEiJ.REG_CCR_Z |
 12899:              ((x ^ z) & (y ^ z)) >> 14 & XEiJ.REG_CCR_V |
 12900:              (short) ((x | y) ^ (x ^ y) & z) >> 15 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C));  //ccr_add_word
 12901:     }
 12902:   }  //irpAddToMemWord
 12903: 
 12904:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12905:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 12906:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 12907:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12908:   //ADDX.L Dr,Dq                                    |-|012346|-|*UUUU|*****|          |1101_qqq_110_000_rrr
 12909:   //ADDX.L -(Ar),-(Aq)                              |-|012346|-|*UUUU|*****|          |1101_qqq_110_001_rrr
 12910:   //ADD.L Dq,<ea>                                   |-|012346|-|UUUUU|*****|  M+-WXZ  |1101_qqq_110_mmm_rrr
 12911:   public static void irpAddToMemLong () throws M68kException {
 12912:     int ea = XEiJ.regOC & 63;
 12913:     if (ea < XEiJ.EA_MM) {
 12914:       int x;
 12915:       int y;
 12916:       int z;
 12917:       if (ea < XEiJ.EA_AR) {  //ADDX.L Dr,Dq
 12918:         int qqq = XEiJ.regOC >> 9 & 7;
 12919:         XEiJ.mpuCycleCount++;
 12920:         XEiJ.regRn[qqq] = z = (x = XEiJ.regRn[qqq]) + (y = XEiJ.regRn[ea]) + (XEiJ.regCCR >> 4);  //Xの左側はすべて0なのでCCR_X&を省略
 12921:       } else {  //ADDX.L -(Ar),-(Aq)
 12922:         XEiJ.mpuCycleCount += 2;
 12923:         M68kException.m6eIncremented -= 4L << (ea << 3);
 12924:         int a = XEiJ.regRn[ea] -= 4;  //このr[ea]はアドレスレジスタ
 12925:         y = mmuReadLongData (a, XEiJ.regSRS);
 12926:         int aqq = XEiJ.regOC >> 9 & 15;
 12927:         M68kException.m6eIncremented -= 4L << (aqq << 3);
 12928:         a = XEiJ.regRn[aqq] -= 4;
 12929:         mmuWriteLongData (a, z = (x = mmuModifyLongData (a, XEiJ.regSRS)) + y + (XEiJ.regCCR >> 4), XEiJ.regSRS);  //Xの左側はすべて0なのでCCR_X&を省略
 12930:       }
 12931:       XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_Z : 0) |
 12932:              ((x ^ z) & (y ^ z)) >>> 31 << 1 |
 12933:              ((x | y) ^ (x ^ y) & z) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C));  //ccr_addx
 12934:     } else {  //ADD.L Dq,<ea>
 12935:       XEiJ.mpuCycleCount++;
 12936:       int a = efaMltLong (ea);
 12937:       int x;
 12938:       int y;
 12939:       int z;
 12940:       mmuWriteLongData (a, z = (x = mmuModifyLongData (a, XEiJ.regSRS)) + (y = XEiJ.regRn[XEiJ.regOC >> 9 & 7]), XEiJ.regSRS);
 12941:       XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) |
 12942:              ((x ^ z) & (y ^ z)) >>> 31 << 1 |
 12943:              ((x | y) ^ (x ^ y) & z) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C));  //ccr_add
 12944:     }
 12945:   }  //irpAddToMemLong
 12946: 
 12947:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12948:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 12949:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 12950:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12951:   //ADDA.L <ea>,Aq                                  |-|012346|-|-----|-----|DAM+-WXZPI|1101_qqq_111_mmm_rrr
 12952:   //ADD.L <ea>,Aq                                   |A|012346|-|-----|-----|DAM+-WXZPI|1101_qqq_111_mmm_rrr [ADDA.L <ea>,Aq]
 12953:   public static void irpAddaLong () throws M68kException {
 12954:     int ea = XEiJ.regOC & 63;
 12955:     XEiJ.mpuCycleCount++;
 12956:     int z = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS) : mmuReadLongData (efaAnyLong (ea), XEiJ.regSRS);  //このr[ea]はデータレジスタまたはアドレスレジスタ。pcls。イミディエイトを分離。ここでAqが変化する可能性があることに注意
 12957:     XEiJ.regRn[XEiJ.regOC >> 9 & 15] += z;  //r[op >> 9 & 15] += ea < XEiJ.EA_MM ? r[ea] : rls (efaAnyLong (ea));は不可
 12958:     //ccrは変化しない
 12959:   }  //irpAddaLong
 12960: 
 12961:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12962:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 12963:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 12964:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12965:   //ASR.B #<data>,Dr                                |-|012346|-|UUUUU|***0*|          |1110_qqq_000_000_rrr
 12966:   //LSR.B #<data>,Dr                                |-|012346|-|UUUUU|***0*|          |1110_qqq_000_001_rrr
 12967:   //ROXR.B #<data>,Dr                               |-|012346|-|*UUUU|***0*|          |1110_qqq_000_010_rrr
 12968:   //ROR.B #<data>,Dr                                |-|012346|-|-UUUU|-**0*|          |1110_qqq_000_011_rrr
 12969:   //ASR.B Dq,Dr                                     |-|012346|-|UUUUU|***0*|          |1110_qqq_000_100_rrr
 12970:   //LSR.B Dq,Dr                                     |-|012346|-|UUUUU|***0*|          |1110_qqq_000_101_rrr
 12971:   //ROXR.B Dq,Dr                                    |-|012346|-|*UUUU|***0*|          |1110_qqq_000_110_rrr
 12972:   //ROR.B Dq,Dr                                     |-|012346|-|-UUUU|-**0*|          |1110_qqq_000_111_rrr
 12973:   //ASR.B Dr                                        |A|012346|-|UUUUU|***0*|          |1110_001_000_000_rrr [ASR.B #1,Dr]
 12974:   //LSR.B Dr                                        |A|012346|-|UUUUU|***0*|          |1110_001_000_001_rrr [LSR.B #1,Dr]
 12975:   //ROXR.B Dr                                       |A|012346|-|*UUUU|***0*|          |1110_001_000_010_rrr [ROXR.B #1,Dr]
 12976:   //ROR.B Dr                                        |A|012346|-|-UUUU|-**0*|          |1110_001_000_011_rrr [ROR.B #1,Dr]
 12977:   //
 12978:   //ASR.B #<data>,Dr
 12979:   //ASR.B Dq,Dr
 12980:   //  算術右シフトバイト
 12981:   //       ........................アイウエオカキク XNZVC
 12982:   //     0 ........................アイウエオカキク Xア*00 Z=アイウエオカキク==0
 12983:   //     1 ........................アアイウエオカキ クア*0ク Z=アイウエオカキ==0
 12984:   //     2 ........................アアアイウエオカ キア*0キ Z=アイウエオカ==0
 12985:   //     3 ........................アアアアイウエオ カア*0カ Z=アイウエオ==0
 12986:   //     4 ........................アアアアアイウエ オア*0オ Z=アイウエ==0
 12987:   //     5 ........................アアアアアアイウ エア*0エ Z=アイウ==0
 12988:   //     6 ........................アアアアアアアイ ウア*0ウ Z=アイ==0
 12989:   //     7 ........................アアアアアアアア イア*0イ Z=ア==0
 12990:   //     8 ........................アアアアアアアア アア*0ア Z=ア==0
 12991:   //  CCR
 12992:   //    X  countが0のとき変化しない。他は最後に押し出されたビット
 12993:   //    N  結果の最上位ビット
 12994:   //    Z  結果が0のときセット。他はクリア
 12995:   //    V  常にクリア
 12996:   //    C  countが0のときクリア。他は最後に押し出されたビット
 12997:   //
 12998:   //LSR.B #<data>,Dr
 12999:   //LSR.B Dq,Dr
 13000:   //  論理右シフトバイト
 13001:   //       ........................アイウエオカキク XNZVC
 13002:   //     0 ........................アイウエオカキク Xア*00 Z=アイウエオカキク==0
 13003:   //     1 ........................0アイウエオカキ ク0*0ク Z=アイウエオカキ==0
 13004:   //     2 ........................00アイウエオカ キ0*0キ Z=アイウエオカ==0
 13005:   //     3 ........................000アイウエオ カ0*0カ Z=アイウエオ==0
 13006:   //     4 ........................0000アイウエ オ0*0オ Z=アイウエ==0
 13007:   //     5 ........................00000アイウ エ0*0エ Z=アイウ==0
 13008:   //     6 ........................000000アイ ウ0*0ウ Z=アイ==0
 13009:   //     7 ........................0000000ア イ0*0イ Z=ア==0
 13010:   //     8 ........................00000000 ア010ア
 13011:   //     9 ........................00000000 00100
 13012:   //  CCR
 13013:   //    X  countが0のとき変化しない。他は最後に押し出されたビット
 13014:   //    N  結果の最上位ビット
 13015:   //    Z  結果が0のときセット。他はクリア
 13016:   //    V  常にクリア
 13017:   //    C  countが0のときクリア。他は最後に押し出されたビット
 13018:   //
 13019:   //ROR.B #<data>,Dr
 13020:   //ROR.B Dq,Dr
 13021:   //  右ローテートバイト
 13022:   //       ........................アイウエオカキク XNZVC
 13023:   //     0 ........................アイウエオカキク Xア*00 Z=アイウエオカキク==0
 13024:   //     1 ........................クアイウエオカキ Xク*0ク Z=アイウエオカキク==0
 13025:   //     :
 13026:   //     7 ........................イウエオカキクア Xイ*0イ Z=アイウエオカキク==0
 13027:   //     8 ........................アイウエオカキク Xア*0ア Z=アイウエオカキク==0
 13028:   //  CCR
 13029:   //    X  常に変化しない
 13030:   //    N  結果の最上位ビット
 13031:   //    Z  結果が0のときセット。他はクリア
 13032:   //    V  常にクリア
 13033:   //    C  countが0のときクリア。他は結果の最上位ビット
 13034:   //
 13035:   //ROXR.B #<data>,Dr
 13036:   //ROXR.B Dq,Dr
 13037:   //  拡張右ローテートバイト
 13038:   //       ........................アイウエオカキク XNZVC
 13039:   //     0 ........................アイウエオカキク Xア*0X Z=アイウエオカキク==0
 13040:   //     1 ........................Xアイウエオカキ クX*0ク Z=アイウエオカキX==0
 13041:   //     2 ........................クXアイウエオカ キク*0キ Z=アイウエオカクX==0
 13042:   //     3 ........................キクXアイウエオ カキ*0カ Z=アイウエオキクX==0
 13043:   //     4 ........................カキクXアイウエ オカ*0オ Z=アイウエカキクX==0
 13044:   //     5 ........................オカキクXアイウ エオ*0エ Z=アイウオカキクX==0
 13045:   //     6 ........................エオカキクXアイ ウエ*0ウ Z=アイエオカキクX==0
 13046:   //     7 ........................ウエオカキクXア イウ*0イ Z=アウエオカキクX==0
 13047:   //     8 ........................イウエオカキクX アイ*0ア Z=イウエオカキクX==0
 13048:   //     9 ........................アイウエオカキク Xア*0X Z=アイウエオカキク==0
 13049:   //  CCR
 13050:   //    X  countが0のとき変化しない。他は最後に押し出されたビット
 13051:   //    N  結果の最上位ビット
 13052:   //    Z  結果が0のときセット。他はクリア
 13053:   //    V  常にクリア
 13054:   //    C  countが0のときXのコピー。他は最後に押し出されたビット
 13055:   public static void irpXxrToRegByte () throws M68kException {
 13056:     int rrr;
 13057:     int x = XEiJ.regRn[rrr = XEiJ.regOC & 7];
 13058:     int y;
 13059:     int z;
 13060:     int t;
 13061:     XEiJ.mpuCycleCount++;
 13062:     switch (XEiJ.regOC >> 3 & 0b111_000 >> 3) {
 13063:     case 0b000_000 >> 3:  //ASR.B #<data>,Dr
 13064:       y = (XEiJ.regOC >> 9) - 1 & 7;  //y=data-1=1-1~8-1
 13065:       XEiJ.regRn[rrr] = ~0xff & x | 0xff & (z = (t = (byte) x >> y) >> 1);
 13066:       XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | -(t & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C);  //XとCは最後に押し出されたビット
 13067:       break;
 13068:     case 0b001_000 >> 3:  //LSR.B #<data>,Dr
 13069:       y = (XEiJ.regOC >> 9) - 1 & 7;  //y=data-1=1-1~8-1
 13070:       XEiJ.regRn[rrr] = ~0xff & x | (z = (t = (0xff & x) >>> y) >>> 1);
 13071:       XEiJ.regCCR = (z == 0 ? XEiJ.REG_CCR_Z : 0) | -(t & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C);  //XとCは最後に押し出されたビット
 13072:       break;
 13073:     case 0b010_000 >> 3:  //ROXR.B #<data>,Dr
 13074:       y = (XEiJ.regOC >> 9) - 1 & 7;  //y=data-1=1-1~8-1
 13075:       z = (XEiJ.regCCR & XEiJ.REG_CCR_X) << 7 - 4 | (0xff & x) >>> 1;
 13076:       if (y == 1 - 1) {  //y=data-1=1-1
 13077:         t = x;
 13078:       } else {  //y=data-1=2-1~8-1
 13079:         z = x << 9 - 1 - y | (t = z >>> y - (2 - 1)) >>> 1;
 13080:       }
 13081:       XEiJ.regRn[rrr] = ~0xff & x | 0xff & (z = (byte) z);
 13082:       XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | -(t & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C);  //XとCは最後に押し出されたビット
 13083:       break;
 13084:     case 0b011_000 >> 3:  //ROR.B #<data>,Dr
 13085:       y = XEiJ.regOC >> 9 & 7;  //y=data&7
 13086:       XEiJ.regRn[rrr] = ~0xff & x | 0xff & (z = (byte) (x << 8 - y | (0xff & x) >>> y));
 13087:       XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | z >>> 7 & 1;  //Xは変化しない。Cは結果の最上位ビット
 13088:       break;
 13089:     case 0b100_000 >> 3:  //ASR.B Dq,Dr
 13090:       y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63;  //y=0~63。Javaのシフト演算子は5ビットでマスクされることに注意
 13091:       if (y == 0) {  //y=data=0
 13092:         z = (byte) x;
 13093:         t = XEiJ.regCCR & XEiJ.REG_CCR_X;  //Xは変化しない。Cはクリア
 13094:       } else {  //y=data=1~63
 13095:         XEiJ.regRn[rrr] = ~0xff & x | 0xff & (z = (t = (byte) x >> (y <= 8 ? y - 1 : 7)) >> 1);
 13096:         t = -(t & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C);  //XとCは最後に押し出されたビット
 13097:       }
 13098:       XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | t;
 13099:       break;
 13100:     case 0b101_000 >> 3:  //LSR.B Dq,Dr
 13101:       y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63;  //y=0~63。Javaのシフト演算子は5ビットでマスクされることに注意
 13102:       if (y == 0) {  //y=data=0
 13103:         z = (byte) x;
 13104:         XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (z < 0 ? XEiJ.REG_CCR_N : z == 0 ? XEiJ.REG_CCR_Z : 0);  //Xは変化しない。Cはクリア
 13105:       } else {  //y=data=1~63
 13106:         XEiJ.regRn[rrr] = ~0xff & x | (z = (t = y <= 8 ? (0xff & x) >>> y - 1 : 0) >>> 1);
 13107:         XEiJ.regCCR = (z == 0 ? XEiJ.REG_CCR_Z : 0) | -(t & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C);  //XとCは最後に押し出されたビット
 13108:       }
 13109:       break;
 13110:     case 0b110_000 >> 3:  //ROXR.B Dq,Dr
 13111:       y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63;  //y=0~63。Javaのシフト演算子は5ビットでマスクされることに注意
 13112:       //y %= 9;
 13113:       y = (y & 7) - (y >> 3);  //y=data=-7~7
 13114:       y += y >> 3 & 9;  //y=data=0~8
 13115:       if (y == 0) {  //y=data=0
 13116:         z = (byte) x;
 13117:         t = -(XEiJ.regCCR >> 4 & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C);  //Xは変化しない。CはXのコピー
 13118:       } else {  //y=data=1~8
 13119:         z = (XEiJ.regCCR & XEiJ.REG_CCR_X) << 7 - 4 | (0xff & x) >>> 1;
 13120:         if (y == 1) {  //y=data=1
 13121:           t = x;  //Cは最後に押し出されたビット
 13122:         } else {  //y=data=2~8
 13123:           z = x << 9 - y | (t = z >>> y - 2) >>> 1;
 13124:         }
 13125:         XEiJ.regRn[rrr] = ~0xff & x | 0xff & (z = (byte) z);
 13126:         t = -(t & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C);  //XとCは最後に押し出されたビット
 13127:       }
 13128:       XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | t;
 13129:       break;
 13130:     case 0b111_000 >> 3:  //ROR.B Dq,Dr
 13131:     default:
 13132:       y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63;  //y=0~63。Javaのシフト演算子は5ビットでマスクされることに注意
 13133:       if (y == 0) {
 13134:         z = (byte) x;
 13135:         t = 0;  //Cはクリア
 13136:       } else {
 13137:         y &= 7;  //y=data=0~7
 13138:         XEiJ.regRn[rrr] = ~0xff & x | 0xff & (z = (byte) (x << 8 - y | (0xff & x) >>> y));
 13139:         t = z >>> 7 & 1;  //Cは結果の最上位ビット
 13140:       }
 13141:       XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | t;  //Xは変化しない
 13142:     }
 13143:   }  //irpXxrToRegByte
 13144: 
 13145:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 13146:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 13147:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 13148:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 13149:   //ASR.W #<data>,Dr                                |-|012346|-|UUUUU|***0*|          |1110_qqq_001_000_rrr
 13150:   //LSR.W #<data>,Dr                                |-|012346|-|UUUUU|***0*|          |1110_qqq_001_001_rrr
 13151:   //ROXR.W #<data>,Dr                               |-|012346|-|*UUUU|***0*|          |1110_qqq_001_010_rrr
 13152:   //ROR.W #<data>,Dr                                |-|012346|-|-UUUU|-**0*|          |1110_qqq_001_011_rrr
 13153:   //ASR.W Dq,Dr                                     |-|012346|-|UUUUU|***0*|          |1110_qqq_001_100_rrr
 13154:   //LSR.W Dq,Dr                                     |-|012346|-|UUUUU|***0*|          |1110_qqq_001_101_rrr
 13155:   //ROXR.W Dq,Dr                                    |-|012346|-|*UUUU|***0*|          |1110_qqq_001_110_rrr
 13156:   //ROR.W Dq,Dr                                     |-|012346|-|-UUUU|-**0*|          |1110_qqq_001_111_rrr
 13157:   //ASR.W Dr                                        |A|012346|-|UUUUU|***0*|          |1110_001_001_000_rrr [ASR.W #1,Dr]
 13158:   //LSR.W Dr                                        |A|012346|-|UUUUU|***0*|          |1110_001_001_001_rrr [LSR.W #1,Dr]
 13159:   //ROXR.W Dr                                       |A|012346|-|*UUUU|***0*|          |1110_001_001_010_rrr [ROXR.W #1,Dr]
 13160:   //ROR.W Dr                                        |A|012346|-|-UUUU|-**0*|          |1110_001_001_011_rrr [ROR.W #1,Dr]
 13161:   //
 13162:   //ASR.W #<data>,Dr
 13163:   //ASR.W Dq,Dr
 13164:   //ASR.W <ea>
 13165:   //  算術右シフトワード
 13166:   //       ................アイウエオカキクケコサシスセソタ XNZVC
 13167:   //     0 ................アイウエオカキクケコサシスセソタ Xア*00 Z=アイウエオカキクケコサシスセソタ==0
 13168:   //     1 ................アアイウエオカキクケコサシスセソ タア*0タ Z=アイウエオカキクケコサシスセソ==0
 13169:   //     :
 13170:   //    15 ................アアアアアアアアアアアアアアアア イア*0イ Z=ア==0
 13171:   //    16 ................アアアアアアアアアアアアアアアア アア*0ア Z=ア==0
 13172:   //  CCR
 13173:   //    X  countが0のとき変化しない。他は最後に押し出されたビット
 13174:   //    N  結果の最上位ビット
 13175:   //    Z  結果が0のときセット。他はクリア
 13176:   //    V  常にクリア
 13177:   //    C  countが0のときクリア。他は最後に押し出されたビット
 13178:   //
 13179:   //LSR.W #<data>,Dr
 13180:   //LSR.W Dq,Dr
 13181:   //LSR.W <ea>
 13182:   //  論理右シフトワード
 13183:   //       ................アイウエオカキクケコサシスセソタ XNZVC
 13184:   //     0 ................アイウエオカキクケコサシスセソタ Xア*00 Z=アイウエオカキクケコサシスセソタ==0
 13185:   //     1 ................0アイウエオカキクケコサシスセソ タ0*0タ Z=アイウエオカキクケコサシスセソ==0
 13186:   //     :
 13187:   //    15 ................000000000000000ア イ0*0イ Z=ア==0
 13188:   //    16 ................0000000000000000 ア010ア
 13189:   //    17 ................0000000000000000 00100
 13190:   //  CCR
 13191:   //    X  countが0のとき変化しない。他は最後に押し出されたビット
 13192:   //    N  結果の最上位ビット
 13193:   //    Z  結果が0のときセット。他はクリア
 13194:   //    V  常にクリア
 13195:   //    C  countが0のときクリア。他は最後に押し出されたビット
 13196:   //
 13197:   //ROR.W #<data>,Dr
 13198:   //ROR.W Dq,Dr
 13199:   //ROR.W <ea>
 13200:   //  右ローテートワード
 13201:   //       ................アイウエオカキクケコサシスセソタ XNZVC
 13202:   //     0 ................アイウエオカキクケコサシスセソタ Xア*00 Z=アイウエオカキクケコサシスセソタ==0
 13203:   //     1 ................タアイウエオカキクケコサシスセソ Xタ*0タ Z=アイウエオカキクケコサシスセソタ==0
 13204:   //     :
 13205:   //    15 ................イウエオカキクケコサシスセソタア Xイ*0イ Z=アイウエオカキクケコサシスセソタ==0
 13206:   //    16 ................アイウエオカキクケコサシスセソタ Xア*0ア Z=アイウエオカキクケコサシスセソタ==0
 13207:   //  CCR
 13208:   //    X  常に変化しない
 13209:   //    N  結果の最上位ビット
 13210:   //    Z  結果が0のときセット。他はクリア
 13211:   //    V  常にクリア
 13212:   //    C  countが0のときクリア。他は結果の最上位ビット
 13213:   //
 13214:   //ROXR.W #<data>,Dr
 13215:   //ROXR.W Dq,Dr
 13216:   //ROXR.W <ea>
 13217:   //  拡張右ローテートワード
 13218:   //       ................アイウエオカキクケコサシスセソタ XNZVC
 13219:   //     0 ................アイウエオカキクケコサシスセソタ Xア*0X Z=アイウエオカキクケコサシスセソタ==0
 13220:   //     1 ................Xアイウエオカキクケコサシスセソ タX*0タ Z=アイウエオカキクケコサシスセソX==0
 13221:   //     2 ................タXアイウエオカキクケコサシスセ ソタ*0ソ Z=アイウエオカキクケコサシスセタX==0
 13222:   //     :
 13223:   //    15 ................ウエオカキクケコサシスセソタXア イウ*0イ Z=アウエオカキクケコサシスセソタX==0
 13224:   //    16 ................イウエオカキクケコサシスセソタX アイ*0ア Z=イウエオカキクケコサシスセソタX==0
 13225:   //    17 ................アイウエオカキクケコサシスセソタ Xア*0X Z=アイウエオカキクケコサシスセソタ==0
 13226:   //  CCR
 13227:   //    X  countが0のとき変化しない。他は最後に押し出されたビット
 13228:   //    N  結果の最上位ビット
 13229:   //    Z  結果が0のときセット。他はクリア
 13230:   //    V  常にクリア
 13231:   //    C  countが0のときXのコピー。他は最後に押し出されたビット
 13232:   public static void irpXxrToRegWord () throws M68kException {
 13233:     int rrr;
 13234:     int x = XEiJ.regRn[rrr = XEiJ.regOC & 7];
 13235:     int y;
 13236:     int z;
 13237:     int t;
 13238:     XEiJ.mpuCycleCount++;
 13239:     switch (XEiJ.regOC >> 3 & 0b111_000 >> 3) {
 13240:     case 0b000_000 >> 3:  //ASR.W #<data>,Dr
 13241:       y = (XEiJ.regOC >> 9) - 1 & 7;  //y=data-1=1-1~8-1
 13242:       XEiJ.regRn[rrr] = ~0xffff & x | (char) (z = (t = (short) x >> y) >> 1);
 13243:       XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | -(t & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C);  //XとCは最後に押し出されたビット
 13244:       break;
 13245:     case 0b001_000 >> 3:  //LSR.W #<data>,Dr
 13246:       y = (XEiJ.regOC >> 9) - 1 & 7;  //y=data-1=1-1~8-1
 13247:       XEiJ.regRn[rrr] = ~0xffff & x | (z = (t = (char) x >>> y) >>> 1);
 13248:       XEiJ.regCCR = (z == 0 ? XEiJ.REG_CCR_Z : 0) | -(t & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C);  //XとCは最後に押し出されたビット
 13249:       break;
 13250:     case 0b010_000 >> 3:  //ROXR.W #<data>,Dr
 13251:       y = (XEiJ.regOC >> 9) - 1 & 7;  //y=data-1=1-1~8-1
 13252:       z = (XEiJ.regCCR & XEiJ.REG_CCR_X) << 15 - 4 | (char) x >>> 1;
 13253:       if (y == 1 - 1) {  //y=data-1=1-1
 13254:         t = x;
 13255:       } else {  //y=data-1=2-1~8-1
 13256:         z = x << 17 - 1 - y | (t = z >>> y - (2 - 1)) >>> 1;
 13257:       }
 13258:       XEiJ.regRn[rrr] = ~0xffff & x | (char) (z = (short) z);
 13259:       XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | -(t & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C);  //XとCは最後に押し出されたビット
 13260:       break;
 13261:     case 0b011_000 >> 3:  //ROR.W #<data>,Dr
 13262:       y = (XEiJ.regOC >> 9) - 1 & 7;  //y=data-1=1-1~8-1
 13263:       XEiJ.regRn[rrr] = ~0xffff & x | (char) (z = (short) (x << 16 - 1 - y | (char) x >>> y + 1));
 13264:       XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | z >>> 15 & 1;  //Xは変化しない。Cは結果の最上位ビット
 13265:       break;
 13266:     case 0b100_000 >> 3:  //ASR.W Dq,Dr
 13267:       y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63;  //y=0~63。Javaのシフト演算子は5ビットでマスクされることに注意
 13268:       if (y == 0) {  //y=data=0
 13269:         z = (short) x;
 13270:         t = XEiJ.regCCR & XEiJ.REG_CCR_X;  //Xは変化しない。Cはクリア
 13271:       } else {  //y=data=1~63
 13272:         XEiJ.regRn[rrr] = ~0xffff & x | (char) (z = (t = (short) x >> (y <= 16 ? y - 1 : 15)) >> 1);
 13273:         t = -(t & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C);  //XとCは最後に押し出されたビット
 13274:       }
 13275:       XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | t;
 13276:       break;
 13277:     case 0b101_000 >> 3:  //LSR.W Dq,Dr
 13278:       y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63;  //y=0~63。Javaのシフト演算子は5ビットでマスクされることに注意
 13279:       if (y == 0) {  //y=data=0
 13280:         z = (short) x;
 13281:         XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (z < 0 ? XEiJ.REG_CCR_N : z == 0 ? XEiJ.REG_CCR_Z : 0);  //Xは変化しない。Cはクリア
 13282:       } else {  //y=data=1~63
 13283:         XEiJ.regRn[rrr] = ~0xffff & x | (z = (t = y <= 16 ? (char) x >>> y - 1 : 0) >>> 1);
 13284:         XEiJ.regCCR = (z == 0 ? XEiJ.REG_CCR_Z : 0) | -(t & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C);  //XとCは最後に押し出されたビット
 13285:       }
 13286:       break;
 13287:     case 0b110_000 >> 3:  //ROXR.W Dq,Dr
 13288:       y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63;  //y=0~63。Javaのシフト演算子は5ビットでマスクされることに注意
 13289:       //y %= 17;
 13290:       y = (y & 15) - (y >> 4);  //y=data=-3~15
 13291:       y += y >> 4 & 17;  //y=data=0~16
 13292:       if (y == 0) {  //y=data=0
 13293:         z = (short) x;
 13294:         t = -(XEiJ.regCCR >> 4 & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C);  //Xは変化しない。CはXのコピー
 13295:       } else {  //y=data=1~16
 13296:         z = (XEiJ.regCCR & XEiJ.REG_CCR_X) << 15 - 4 | (char) x >>> 1;
 13297:         if (y == 1) {  //y=data=1
 13298:           t = x;  //Cは最後に押し出されたビット
 13299:         } else {  //y=data=2~16
 13300:           z = x << 17 - y | (t = z >>> y - 2) >>> 1;
 13301:         }
 13302:         XEiJ.regRn[rrr] = ~0xffff & x | (char) (z = (short) z);
 13303:         t = -(t & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C);  //XとCは最後に押し出されたビット
 13304:       }
 13305:       XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | t;
 13306:       break;
 13307:     case 0b111_000 >> 3:  //ROR.W Dq,Dr
 13308:     default:
 13309:       y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63;  //y=0~63。Javaのシフト演算子は5ビットでマスクされることに注意
 13310:       if (y == 0) {
 13311:         z = (short) x;
 13312:         t = 0;  //Cはクリア
 13313:       } else {
 13314:         y &= 15;  //y=data=0~15
 13315:         XEiJ.regRn[rrr] = ~0xffff & x | (char) (z = (short) (x << 16 - y | (char) x >>> y));
 13316:         t = z >>> 15 & 1;  //Cは結果の最上位ビット
 13317:       }
 13318:       XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | t;  //Xは変化しない
 13319:     }
 13320:   }  //irpXxrToRegWord
 13321: 
 13322:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 13323:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 13324:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 13325:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 13326:   //ASR.L #<data>,Dr                                |-|012346|-|UUUUU|***0*|          |1110_qqq_010_000_rrr
 13327:   //LSR.L #<data>,Dr                                |-|012346|-|UUUUU|***0*|          |1110_qqq_010_001_rrr
 13328:   //ROXR.L #<data>,Dr                               |-|012346|-|*UUUU|***0*|          |1110_qqq_010_010_rrr
 13329:   //ROR.L #<data>,Dr                                |-|012346|-|-UUUU|-**0*|          |1110_qqq_010_011_rrr
 13330:   //ASR.L Dq,Dr                                     |-|012346|-|UUUUU|***0*|          |1110_qqq_010_100_rrr
 13331:   //LSR.L Dq,Dr                                     |-|012346|-|UUUUU|***0*|          |1110_qqq_010_101_rrr
 13332:   //ROXR.L Dq,Dr                                    |-|012346|-|*UUUU|***0*|          |1110_qqq_010_110_rrr
 13333:   //ROR.L Dq,Dr                                     |-|012346|-|-UUUU|-**0*|          |1110_qqq_010_111_rrr
 13334:   //ASR.L Dr                                        |A|012346|-|UUUUU|***0*|          |1110_001_010_000_rrr [ASR.L #1,Dr]
 13335:   //LSR.L Dr                                        |A|012346|-|UUUUU|***0*|          |1110_001_010_001_rrr [LSR.L #1,Dr]
 13336:   //ROXR.L Dr                                       |A|012346|-|*UUUU|***0*|          |1110_001_010_010_rrr [ROXR.L #1,Dr]
 13337:   //ROR.L Dr                                        |A|012346|-|-UUUU|-**0*|          |1110_001_010_011_rrr [ROR.L #1,Dr]
 13338:   //
 13339:   //ASR.L #<data>,Dr
 13340:   //ASR.L Dq,Dr
 13341:   //  算術右シフトロング
 13342:   //       アイウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマミ XNZVC
 13343:   //     0 アイウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマミ Xア*00 Z=アイウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマミ==0
 13344:   //     1 アアイウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマ ミア*0ミ Z=アイウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマ==0
 13345:   //     :
 13346:   //    31 アアアアアアアアアアアアアアアアアアアアアアアアアアアアアアアア イア*0イ Z=ア==0
 13347:   //    32 アアアアアアアアアアアアアアアアアアアアアアアアアアアアアアアア アア*0ア Z=ア==0
 13348:   //  CCR
 13349:   //    X  countが0のとき変化しない。他は最後に押し出されたビット
 13350:   //    N  結果の最上位ビット
 13351:   //    Z  結果が0のときセット。他はクリア
 13352:   //    V  常にクリア
 13353:   //    C  countが0のときクリア。他は最後に押し出されたビット
 13354:   //
 13355:   //LSR.L #<data>,Dr
 13356:   //LSR.L Dq,Dr
 13357:   //  論理右シフトロング
 13358:   //       アイウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマミ XNZVC
 13359:   //     0 アイウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマミ Xア*00 Z=アイウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマミ==0
 13360:   //     1 0アイウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマ ミ0*0ミ Z=アイウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマ==0
 13361:   //     :
 13362:   //    31 0000000000000000000000000000000ア イ0*0イ Z=ア==0
 13363:   //    32 00000000000000000000000000000000 ア010ア
 13364:   //    33 00000000000000000000000000000000 00100
 13365:   //  CCR
 13366:   //    X  countが0のとき変化しない。他は最後に押し出されたビット
 13367:   //    N  結果の最上位ビット
 13368:   //    Z  結果が0のときセット。他はクリア
 13369:   //    V  常にクリア
 13370:   //    C  countが0のときクリア。他は最後に押し出されたビット
 13371:   //
 13372:   //ROR.L #<data>,Dr
 13373:   //ROR.L Dq,Dr
 13374:   //  右ローテートロング
 13375:   //       アイウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマミ XNZVC
 13376:   //     0 アイウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマミ Xア*00 Z=アイウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマミ==0
 13377:   //     1 ミアイウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマ Xミ*0ミ Z=アイウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマミ==0
 13378:   //     :
 13379:   //    31 イウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマミア Xイ*0イ Z=アイウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマミ==0
 13380:   //    32 アイウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマミ Xア*0ア Z=アイウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマミ==0
 13381:   //  CCR
 13382:   //    X  常に変化しない
 13383:   //    N  結果の最上位ビット
 13384:   //    Z  結果が0のときセット。他はクリア
 13385:   //    V  常にクリア
 13386:   //    C  countが0のときクリア。他は結果の最上位ビット
 13387:   //
 13388:   //ROXR.L #<data>,Dr
 13389:   //ROXR.L Dq,Dr
 13390:   //  拡張右ローテートロング
 13391:   //       アイウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマミ XNZVC
 13392:   //     0 アイウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマミ Xア*0X Z=アイウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマミ==0
 13393:   //     1 Xアイウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマ ミX*0ミ Z=アイウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマX==0
 13394:   //     2 ミXアイウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホ マミ*0マ Z=アイウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホミX==0
 13395:   //     :
 13396:   //    31 ウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマミXア イウ*0イ Z=アウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマミX==0
 13397:   //    32 イウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマミX アイ*0ア Z=イウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマミX==0
 13398:   //    33 アイウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマミ Xア*0X Z=アイウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマミ==0
 13399:   //  CCR
 13400:   //    X  countが0のとき変化しない。他は最後に押し出されたビット
 13401:   //    N  結果の最上位ビット
 13402:   //    Z  結果が0のときセット。他はクリア
 13403:   //    V  常にクリア
 13404:   //    C  countが0のときXのコピー。他は最後に押し出されたビット
 13405:   public static void irpXxrToRegLong () throws M68kException {
 13406:     int rrr;
 13407:     int x = XEiJ.regRn[rrr = XEiJ.regOC & 7];
 13408:     int y;
 13409:     int z;
 13410:     int t;
 13411:     XEiJ.mpuCycleCount++;
 13412:     switch (XEiJ.regOC >> 3 & 0b111_000 >> 3) {
 13413:     case 0b000_000 >> 3:  //ASR.L #<data>,Dr
 13414:       y = (XEiJ.regOC >> 9) - 1 & 7;  //y=data-1=1-1~8-1
 13415:       XEiJ.regRn[rrr] = z = (t = x >> y) >> 1;
 13416:       XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | -(t & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C);  //XとCは最後に押し出されたビット
 13417:       break;
 13418:     case 0b001_000 >> 3:  //LSR.L #<data>,Dr
 13419:       y = (XEiJ.regOC >> 9) - 1 & 7;  //y=data-1=1-1~8-1
 13420:       XEiJ.regRn[rrr] = z = (t = x >>> y) >>> 1;
 13421:       XEiJ.regCCR = (z == 0 ? XEiJ.REG_CCR_Z : 0) | -(t & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C);  //XとCは最後に押し出されたビット
 13422:       break;
 13423:     case 0b010_000 >> 3:  //ROXR.L #<data>,Dr
 13424:       y = (XEiJ.regOC >> 9) - 1 & 7;  //y=data-1=1-1~8-1
 13425:       z = (XEiJ.regCCR & XEiJ.REG_CCR_X) << 31 - 4 | x >>> 1;
 13426:       if (y == 1 - 1) {  //y=data-1=1-1
 13427:         t = x;
 13428:       } else {  //y=data-1=2-1~8-1
 13429:         z = x << -y | (t = z >>> y - (2 - 1)) >>> 1;  //Javaのシフト演算子は5ビットでマスクされるので33-1-yを-yに省略
 13430:       }
 13431:       XEiJ.regRn[rrr] = z;
 13432:       XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | -(t & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C);  //XとCは最後に押し出されたビット
 13433:       break;
 13434:     case 0b011_000 >> 3:  //ROR.L #<data>,Dr
 13435:       y = (XEiJ.regOC >> 9) - 1 & 7;  //y=data-1=1-1~8-1
 13436:       XEiJ.regRn[rrr] = z = x << ~y | x >>> y + 1;  //Javaのシフト演算子は5ビットでマスクされるので32-1-yを~yに省略
 13437:       XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | z >>> 31;  //Xは変化しない。Cは結果の最上位ビット
 13438:       break;
 13439:     case 0b100_000 >> 3:  //ASR.L Dq,Dr
 13440:       y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63;  //y=0~63。Javaのシフト演算子は5ビットでマスクされることに注意
 13441:       if (y == 0) {  //y=data=0
 13442:         z = x;
 13443:         t = XEiJ.regCCR & XEiJ.REG_CCR_X;  //Xは変化しない。Cはクリア
 13444:       } else {  //y=data=1~63
 13445:         XEiJ.regRn[rrr] = z = (t = x >> (y <= 32 ? y - 1 : 31)) >> 1;
 13446:         t = -(t & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C);  //XとCは最後に押し出されたビット
 13447:       }
 13448:       XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | t;
 13449:       break;
 13450:     case 0b101_000 >> 3:  //LSR.L Dq,Dr
 13451:       y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63;  //y=0~63。Javaのシフト演算子は5ビットでマスクされることに注意
 13452:       if (y == 0) {  //y=data=0
 13453:         z = x;
 13454:         XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (z < 0 ? XEiJ.REG_CCR_N : z == 0 ? XEiJ.REG_CCR_Z : 0);  //Xは変化しない。Cはクリア
 13455:       } else {  //y=data=1~63
 13456:         XEiJ.regRn[rrr] = z = (t = y <= 32 ? x >>> y - 1 : 0) >>> 1;
 13457:         XEiJ.regCCR = (z == 0 ? XEiJ.REG_CCR_Z : 0) | -(t & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C);  //XとCは最後に押し出されたビット
 13458:       }
 13459:       break;
 13460:     case 0b110_000 >> 3:  //ROXR.L Dq,Dr
 13461:       y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63;  //y=0~63。Javaのシフト演算子は5ビットでマスクされることに注意
 13462:       //y %= 33;
 13463:       y -= 32 - y >> 6 & 33;  //y=data=0~32
 13464:       if (y == 0) {  //y=data=0
 13465:         z = x;
 13466:         t = -(XEiJ.regCCR >> 4 & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C);  //Xは変化しない。CはXのコピー
 13467:       } else {  //y=data=1~32
 13468:         z = (XEiJ.regCCR & XEiJ.REG_CCR_X) << 31 - 4 | x >>> 1;
 13469:         if (y == 1) {  //y=data=1
 13470:           t = x;  //Cは最後に押し出されたビット
 13471:         } else {  //y=data=2~32
 13472:           z = x << 33 - y | (t = z >>> y - 2) >>> 1;
 13473:         }
 13474:         XEiJ.regRn[rrr] = z;
 13475:         t = -(t & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C);  //XとCは最後に押し出されたビット
 13476:       }
 13477:       XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | t;
 13478:       break;
 13479:     case 0b111_000 >> 3:  //ROR.L Dq,Dr
 13480:     default:
 13481:       y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63;  //y=0~63。Javaのシフト演算子は5ビットでマスクされることに注意
 13482:       if (y == 0) {
 13483:         z = x;
 13484:         t = 0;  //Cはクリア
 13485:       } else {
 13486:         y &= 31;  //y=data=0~31
 13487:         XEiJ.regRn[rrr] = z = x << -y | x >>> y;  //Javaのシフト演算子は5ビットでマスクされるので32-yを-yに省略。y=32のときx|xになるが問題ない
 13488:         t = z >>> 31;  //Cは結果の最上位ビット
 13489:       }
 13490:       XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | t;  //Xは変化しない
 13491:     }
 13492:   }  //irpXxrToRegLong
 13493: 
 13494:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 13495:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 13496:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 13497:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 13498:   //ASR.W <ea>                                      |-|012346|-|UUUUU|***0*|  M+-WXZ  |1110_000_011_mmm_rrr
 13499:   //
 13500:   //ASR.W #<data>,Dr
 13501:   //ASR.W Dq,Dr
 13502:   //ASR.W <ea>
 13503:   //  算術右シフトワード
 13504:   //       ................アイウエオカキクケコサシスセソタ XNZVC
 13505:   //     0 ................アイウエオカキクケコサシスセソタ Xア*00 Z=アイウエオカキクケコサシスセソタ==0
 13506:   //     1 ................アアイウエオカキクケコサシスセソ タア*0タ Z=アイウエオカキクケコサシスセソ==0
 13507:   //     :
 13508:   //    15 ................アアアアアアアアアアアアアアアア イア*0イ Z=ア==0
 13509:   //    16 ................アアアアアアアアアアアアアアアア アア*0ア Z=ア==0
 13510:   //  CCR
 13511:   //    X  countが0のとき変化しない。他は最後に押し出されたビット
 13512:   //    N  結果の最上位ビット
 13513:   //    Z  結果が0のときセット。他はクリア
 13514:   //    V  常にクリア
 13515:   //    C  countが0のときクリア。他は最後に押し出されたビット
 13516:   public static void irpAsrToMem () throws M68kException {
 13517:     XEiJ.mpuCycleCount++;
 13518:     int ea = XEiJ.regOC & 63;
 13519:     int a = efaMltWord (ea);
 13520:     int x = mmuModifyWordSignData (a, XEiJ.regSRS);
 13521:     int z = x >> 1;
 13522:     mmuWriteWordData (a, z, XEiJ.regSRS);
 13523:     XEiJ.regCCR = ((z < 0 ? XEiJ.REG_CCR_N : 0) |
 13524:                    (z == 0 ? XEiJ.REG_CCR_Z : 0) |
 13525:                    -(x & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C));  //XとCは最後に押し出されたビット
 13526:   }  //irpAsrToMem
 13527: 
 13528:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 13529:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 13530:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 13531:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 13532:   //ASL.B #<data>,Dr                                |-|012346|-|UUUUU|*****|          |1110_qqq_100_000_rrr
 13533:   //LSL.B #<data>,Dr                                |-|012346|-|UUUUU|***0*|          |1110_qqq_100_001_rrr
 13534:   //ROXL.B #<data>,Dr                               |-|012346|-|*UUUU|***0*|          |1110_qqq_100_010_rrr
 13535:   //ROL.B #<data>,Dr                                |-|012346|-|-UUUU|-**0*|          |1110_qqq_100_011_rrr
 13536:   //ASL.B Dq,Dr                                     |-|012346|-|UUUUU|*****|          |1110_qqq_100_100_rrr
 13537:   //LSL.B Dq,Dr                                     |-|012346|-|UUUUU|***0*|          |1110_qqq_100_101_rrr
 13538:   //ROXL.B Dq,Dr                                    |-|012346|-|*UUUU|***0*|          |1110_qqq_100_110_rrr
 13539:   //ROL.B Dq,Dr                                     |-|012346|-|-UUUU|-**0*|          |1110_qqq_100_111_rrr
 13540:   //ASL.B Dr                                        |A|012346|-|UUUUU|*****|          |1110_001_100_000_rrr [ASL.B #1,Dr]
 13541:   //LSL.B Dr                                        |A|012346|-|UUUUU|***0*|          |1110_001_100_001_rrr [LSL.B #1,Dr]
 13542:   //ROXL.B Dr                                       |A|012346|-|*UUUU|***0*|          |1110_001_100_010_rrr [ROXL.B #1,Dr]
 13543:   //ROL.B Dr                                        |A|012346|-|-UUUU|-**0*|          |1110_001_100_011_rrr [ROL.B #1,Dr]
 13544:   //
 13545:   //ASL.B #<data>,Dr
 13546:   //ASL.B Dq,Dr
 13547:   //  算術左シフトバイト
 13548:   //       ........................アイウエオカキク XNZVC
 13549:   //     0 ........................アイウエオカキク Xア*00 Z=アイウエオカキク==0
 13550:   //     1 ........................イウエオカキク0 アイ**ア Z=イウエオカキク==0,V=アイ!=0/-1
 13551:   //     :
 13552:   //     7 ........................ク0000000 キク**キ Z=ク==0,V=アイウエオカキク!=0/-1
 13553:   //     8 ........................00000000 ク01*ク V=アイウエオカキク!=0
 13554:   //     9 ........................00000000 001*0 V=アイウエオカキク!=0
 13555:   //  CCR
 13556:   //    X  countが0のとき変化しない。他は最後に押し出されたビット
 13557:   //    N  結果の最上位ビット
 13558:   //    Z  結果が0のときセット。他はクリア
 13559:   //    V  ASRで元に戻せないときセット。他はクリア
 13560:   //    C  countが0のときクリア。他は最後に押し出されたビット
 13561:   //
 13562:   //LSL.B #<data>,Dr
 13563:   //LSL.B Dq,Dr
 13564:   //  論理左シフトバイト
 13565:   //       ........................アイウエオカキク XNZVC
 13566:   //     0 ........................アイウエオカキク Xア*00 Z=アイウエオカキク==0
 13567:   //     1 ........................イウエオカキク0 アイ*0ア Z=イウエオカキク==0
 13568:   //     :
 13569:   //     7 ........................ク0000000 キク*0キ Z=ク==0
 13570:   //     8 ........................00000000 ク010ク
 13571:   //     9 ........................00000000 00100
 13572:   //  CCR
 13573:   //    X  countが0のとき変化しない。他は最後に押し出されたビット
 13574:   //    N  結果の最上位ビット
 13575:   //    Z  結果が0のときセット。他はクリア
 13576:   //    V  常にクリア
 13577:   //    C  countが0のときクリア。他は最後に押し出されたビット
 13578:   //
 13579:   //ROL.B #<data>,Dr
 13580:   //ROL.B Dq,Dr
 13581:   //  左ローテートバイト
 13582:   //       ........................アイウエオカキク XNZVC
 13583:   //     0 ........................アイウエオカキク Xア*00 Z=アイウエオカキク==0
 13584:   //     1 ........................イウエオカキクア Xイ*0ア Z=アイウエオカキク==0
 13585:   //     :
 13586:   //     7 ........................クアイウエオカキ Xク*0キ Z=アイウエオカキク==0
 13587:   //     8 ........................アイウエオカキク Xア*0ク Z=アイウエオカキク==0
 13588:   //  CCR
 13589:   //    X  常に変化しない
 13590:   //    N  結果の最上位ビット
 13591:   //    Z  結果が0のときセット。他はクリア
 13592:   //    V  常にクリア
 13593:   //    C  countが0のときクリア。他は結果の最下位ビット
 13594:   //
 13595:   //ROXL.B #<data>,Dr
 13596:   //ROXL.B Dq,Dr
 13597:   //  拡張左ローテートバイト
 13598:   //       ........................アイウエオカキク XNZVC
 13599:   //     0 ........................アイウエオカキク Xア*0X Z=アイウエオカキク==0
 13600:   //     1 ........................イウエオカキクX アイ*0ア Z=イウエオカキクX==0
 13601:   //     2 ........................ウエオカキクXア イウ*0イ Z=アウエオカキクX==0
 13602:   //     :
 13603:   //     7 ........................クXアイウエオカ キク*0キ Z=アイウエオカクX==0
 13604:   //     8 ........................Xアイウエオカキ クX*0ク Z=アイウエオカキX==0
 13605:   //     9 ........................アイウエオカキク Xア*0X Z=アイウエオカキク==0
 13606:   //  CCR
 13607:   //    X  countが0のとき変化しない。他は最後に押し出されたビット
 13608:   //    N  結果の最上位ビット
 13609:   //    Z  結果が0のときセット。他はクリア
 13610:   //    V  常にクリア
 13611:   //    C  countが0のときXのコピー。他は最後に押し出されたビット
 13612:   public static void irpXxlToRegByte () throws M68kException {
 13613:     int rrr;
 13614:     int x = XEiJ.regRn[rrr = XEiJ.regOC & 7];
 13615:     int y;
 13616:     int z;
 13617:     int t;
 13618:     XEiJ.mpuCycleCount++;
 13619:     switch (XEiJ.regOC >> 3 & 0b111_000 >> 3) {
 13620:     case 0b000_000 >> 3:  //ASL.B #<data>,Dr
 13621:       y = (XEiJ.regOC >> 9) - 1 & 7;  //y=data-1=1-1~8-1
 13622:       XEiJ.regRn[rrr] = ~0xff & x | 0xff & (z = (byte) ((t = x << y) << 1));
 13623:       XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | (z >> y + 1 != (byte) x ? XEiJ.REG_CCR_V : 0) | (byte) t >> 7 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C);  //VはASRで元に戻せないときセット。XとCは最後に押し出されたビット
 13624:       break;
 13625:     case 0b001_000 >> 3:  //LSL.B #<data>,Dr
 13626:       y = (XEiJ.regOC >> 9) - 1 & 7;  //y=data-1=1-1~8-1
 13627:       XEiJ.regRn[rrr] = ~0xff & x | 0xff & (z = (byte) ((t = x << y) << 1));
 13628:       XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | (byte) t >> 7 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C);  //XとCは最後に押し出されたビット
 13629:       break;
 13630:     case 0b010_000 >> 3:  //ROXL.B #<data>,Dr
 13631:       y = (XEiJ.regOC >> 9) - 1 & 7;  //y=data-1=1-1~8-1
 13632:       z = x << 1 | XEiJ.regCCR >> 4 & 1;
 13633:       if (y == 1 - 1) {  //y=data-1=1-1
 13634:         t = x;
 13635:       } else {  //y=data-1=2-1~8-1
 13636:         z = (t = z << y - (2 - 1)) << 1 | (0xff & x) >>> 9 - 1 - y;
 13637:       }
 13638:       XEiJ.regRn[rrr] = ~0xff & x | 0xff & (z = (byte) z);
 13639:       XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | (byte) t >> 7 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C);  //XとCは最後に押し出されたビット
 13640:       break;
 13641:     case 0b011_000 >> 3:  //ROL.B #<data>,Dr
 13642:       y = XEiJ.regOC >> 9 & 7;  //y=data&7
 13643:       XEiJ.regRn[rrr] = ~0xff & x | 0xff & (z = (byte) (x << y | (0xff & x) >>> 8 - y));
 13644:       XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | z & 1;  //Xは変化しない。Cは結果の最下位ビット
 13645:       break;
 13646:     case 0b100_000 >> 3:  //ASL.B Dq,Dr
 13647:       y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63;  //y=0~63。Javaのシフト演算子は5ビットでマスクされることに注意
 13648:       if (y <= 7) {  //y=data=0~7
 13649:         if (y == 0) {  //y=data=0
 13650:           z = (byte) x;
 13651:           t = XEiJ.regCCR & XEiJ.REG_CCR_X;  //Xは変化しない。VとCはクリア
 13652:         } else {  //y=data=1~7
 13653:           XEiJ.regRn[rrr] = ~0xff & x | 0xff & (z = (byte) ((t = x << y - 1) << 1));
 13654:           t = (z >> y != (byte) x ? XEiJ.REG_CCR_V : 0) | (byte) t >> 7 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C);  //VはASRで元に戻せないときセット。XとCは最後に押し出されたビット
 13655:         }
 13656:         XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | t;
 13657:       } else {  //y=data=8~63
 13658:         XEiJ.regRn[rrr] = ~0xff & x;
 13659:         XEiJ.regCCR = XEiJ.REG_CCR_Z | ((byte) x != 0 ? XEiJ.REG_CCR_V : 0) | (y == 8 ? -(x & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C) : 0);
 13660:       }
 13661:       break;
 13662:     case 0b101_000 >> 3:  //LSL.B Dq,Dr
 13663:       y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63;  //y=0~63。Javaのシフト演算子は5ビットでマスクされることに注意
 13664:       if (y == 0) {  //y=data=0
 13665:         z = (byte) x;
 13666:         t = XEiJ.regCCR & XEiJ.REG_CCR_X;  //Xは変化しない。Cはクリア
 13667:       } else {  //y=data=1~63
 13668:         XEiJ.regRn[rrr] = ~0xff & x | 0xff & (z = (byte) ((t = y <= 8 ? x << y - 1 : 0) << 1));
 13669:         t = (byte) t >> 7 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C);  //XとCは最後に押し出されたビット
 13670:       }
 13671:       XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | t;
 13672:       break;
 13673:     case 0b110_000 >> 3:  //ROXL.B Dq,Dr
 13674:       y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63;  //y=0~63。Javaのシフト演算子は5ビットでマスクされることに注意
 13675:       //y %= 9;
 13676:       y = (y & 7) - (y >> 3);  //y=data=-7~7
 13677:       y += y >> 3 & 9;  //y=data=0~8
 13678:       if (y == 0) {  //y=data=0
 13679:         z = (byte) x;
 13680:         t = -(XEiJ.regCCR >> 4 & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C);  //Xは変化しない。CはXのコピー
 13681:       } else {  //y=data=1~8
 13682:         z = x << 1 | XEiJ.regCCR >> 4 & 1;
 13683:         if (y == 1) {  //y=data=1
 13684:           t = x;  //Cは最後に押し出されたビット
 13685:         } else {  //y=data=2~8
 13686:           z = (t = z << y - 2) << 1 | (0xff & x) >>> 9 - y;
 13687:         }
 13688:         XEiJ.regRn[rrr] = ~0xff & x | 0xff & (z = (byte) z);
 13689:         t = (byte) t >> 7 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C);  //XとCは最後に押し出されたビット
 13690:       }
 13691:       XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | t;
 13692:       break;
 13693:     case 0b111_000 >> 3:  //ROL.B Dq,Dr
 13694:     default:
 13695:       y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63;  //y=0~63。Javaのシフト演算子は5ビットでマスクされることに注意
 13696:       if (y == 0) {
 13697:         z = (byte) x;
 13698:         t = 0;  //Cはクリア
 13699:       } else {
 13700:         y &= 7;  //y=data=0~7
 13701:         XEiJ.regRn[rrr] = ~0xff & x | 0xff & (z = (byte) (x << y | (0xff & x) >>> 8 - y));
 13702:         t = z & 1;  //Cは結果の最下位ビット
 13703:       }
 13704:       XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | t;  //Xは変化しない
 13705:     }
 13706:   }  //irpXxlToRegByte
 13707: 
 13708:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 13709:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 13710:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 13711:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 13712:   //ASL.W #<data>,Dr                                |-|012346|-|UUUUU|*****|          |1110_qqq_101_000_rrr
 13713:   //LSL.W #<data>,Dr                                |-|012346|-|UUUUU|***0*|          |1110_qqq_101_001_rrr
 13714:   //ROXL.W #<data>,Dr                               |-|012346|-|*UUUU|***0*|          |1110_qqq_101_010_rrr
 13715:   //ROL.W #<data>,Dr                                |-|012346|-|-UUUU|-**0*|          |1110_qqq_101_011_rrr
 13716:   //ASL.W Dq,Dr                                     |-|012346|-|UUUUU|*****|          |1110_qqq_101_100_rrr
 13717:   //LSL.W Dq,Dr                                     |-|012346|-|UUUUU|***0*|          |1110_qqq_101_101_rrr
 13718:   //ROXL.W Dq,Dr                                    |-|012346|-|*UUUU|***0*|          |1110_qqq_101_110_rrr
 13719:   //ROL.W Dq,Dr                                     |-|012346|-|-UUUU|-**0*|          |1110_qqq_101_111_rrr
 13720:   //ASL.W Dr                                        |A|012346|-|UUUUU|*****|          |1110_001_101_000_rrr [ASL.W #1,Dr]
 13721:   //LSL.W Dr                                        |A|012346|-|UUUUU|***0*|          |1110_001_101_001_rrr [LSL.W #1,Dr]
 13722:   //ROXL.W Dr                                       |A|012346|-|*UUUU|***0*|          |1110_001_101_010_rrr [ROXL.W #1,Dr]
 13723:   //ROL.W Dr                                        |A|012346|-|-UUUU|-**0*|          |1110_001_101_011_rrr [ROL.W #1,Dr]
 13724:   //
 13725:   //ASL.W #<data>,Dr
 13726:   //ASL.W Dq,Dr
 13727:   //ASL.W <ea>
 13728:   //  算術左シフトワード
 13729:   //       ................アイウエオカキクケコサシスセソタ XNZVC
 13730:   //     0 ................アイウエオカキクケコサシスセソタ Xア*00 Z=アイウエオカキクケコサシスセソタ==0
 13731:   //     1 ................イウエオカキクケコサシスセソタ0 アイ**ア Z=イウエオカキクケコサシスセソタ==0,V=アイ!=0/-1
 13732:   //     :
 13733:   //    15 ................タ000000000000000 ソタ**ソ Z=タ==0,V=アイウエオカキクケコサシスセソタ!=0/-1
 13734:   //    16 ................0000000000000000 タ01*タ V=アイウエオカキクケコサシスセソタ!=0
 13735:   //    17 ................0000000000000000 001*0 V=アイウエオカキクケコサシスセソタ!=0
 13736:   //  CCR
 13737:   //    X  countが0のとき変化しない。他は最後に押し出されたビット
 13738:   //    N  結果の最上位ビット
 13739:   //    Z  結果が0のときセット。他はクリア
 13740:   //    V  ASRで元に戻せないときセット。他はクリア
 13741:   //    C  countが0のときクリア。他は最後に押し出されたビット
 13742:   //
 13743:   //LSL.W #<data>,Dr
 13744:   //LSL.W Dq,Dr
 13745:   //LSL.W <ea>
 13746:   //  論理左シフトワード
 13747:   //       ................アイウエオカキクケコサシスセソタ XNZVC
 13748:   //     0 ................アイウエオカキクケコサシスセソタ Xア*00 Z=アイウエオカキクケコサシスセソタ==0
 13749:   //     1 ................イウエオカキクケコサシスセソタ0 アイ*0ア Z=イウエオカキクケコサシスセソタ==0
 13750:   //     :
 13751:   //    15 ................タ000000000000000 ソタ*0ソ Z=タ==0
 13752:   //    16 ................0000000000000000 タ010タ
 13753:   //    17 ................0000000000000000 00100
 13754:   //  CCR
 13755:   //    X  countが0のとき変化しない。他は最後に押し出されたビット
 13756:   //    N  結果の最上位ビット
 13757:   //    Z  結果が0のときセット。他はクリア
 13758:   //    V  常にクリア
 13759:   //    C  countが0のときクリア。他は最後に押し出されたビット
 13760:   //
 13761:   //ROL.W #<data>,Dr
 13762:   //ROL.W Dq,Dr
 13763:   //ROL.W <ea>
 13764:   //  左ローテートワード
 13765:   //       ................アイウエオカキクケコサシスセソタ XNZVC
 13766:   //     0 ................アイウエオカキクケコサシスセソタ Xア*00 Z=アイウエオカキクケコサシスセソタ==0
 13767:   //     1 ................イウエオカキクケコサシスセソタア Xイ*0ア Z=アイウエオカキクケコサシスセソタ==0
 13768:   //     :
 13769:   //    15 ................タアイウエオカキクケコサシスセソ Xタ*0ソ Z=アイウエオカキクケコサシスセソタ==0
 13770:   //    16 ................アイウエオカキクケコサシスセソタ Xア*0タ Z=アイウエオカキクケコサシスセソタ==0
 13771:   //  CCR
 13772:   //    X  常に変化しない
 13773:   //    N  結果の最上位ビット
 13774:   //    Z  結果が0のときセット。他はクリア
 13775:   //    V  常にクリア
 13776:   //    C  countが0のときクリア。他は結果の最下位ビット
 13777:   //
 13778:   //ROXL.W #<data>,Dr
 13779:   //ROXL.W Dq,Dr
 13780:   //ROXL.W <ea>
 13781:   //  拡張左ローテートワード
 13782:   //       ................アイウエオカキクケコサシスセソタ XNZVC
 13783:   //     0 ................アイウエオカキクケコサシスセソタ Xア*0X Z=アイウエオカキクケコサシスセソタ==0
 13784:   //     1 ................イウエオカキクケコサシスセソタX アイ*0ア Z=イウエオカキクケコサシスセソタX==0
 13785:   //     2 ................ウエオカキクケコサシスセソタXア イウ*0イ Z=アウエオカキクケコサシスセソタX==0
 13786:   //     :
 13787:   //    15 ................タXアイウエオカキクケコサシスセ ソタ*0ソ Z=アイウエオカキクケコサシスセタX==0
 13788:   //    16 ................Xアイウエオカキクケコサシスセソ タX*0タ Z=アイウエオカキクケコサシスセソX==0
 13789:   //    17 ................アイウエオカキクケコサシスセソタ Xア*0X Z=アイウエオカキクケコサシスセソタ==0
 13790:   //  CCR
 13791:   //    X  countが0のとき変化しない。他は最後に押し出されたビット
 13792:   //    N  結果の最上位ビット
 13793:   //    Z  結果が0のときセット。他はクリア
 13794:   //    V  常にクリア
 13795:   //    C  countが0のときXのコピー。他は最後に押し出されたビット
 13796:   public static void irpXxlToRegWord () throws M68kException {
 13797:     int rrr;
 13798:     int x = XEiJ.regRn[rrr = XEiJ.regOC & 7];
 13799:     int y;
 13800:     int z;
 13801:     int t;
 13802:     XEiJ.mpuCycleCount++;
 13803:     switch (XEiJ.regOC >> 3 & 0b111_000 >> 3) {
 13804:     case 0b000_000 >> 3:  //ASL.W #<data>,Dr
 13805:       y = (XEiJ.regOC >> 9) - 1 & 7;  //y=data-1=1-1~8-1
 13806:       XEiJ.regRn[rrr] = ~0xffff & x | (char) (z = (short) ((t = x << y) << 1));
 13807:       XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | (z >> y + 1 != (short) x ? XEiJ.REG_CCR_V : 0) | (short) t >> 15 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C);  //VはASRで元に戻せないときセット。XとCは最後に押し出されたビット
 13808:       break;
 13809:     case 0b001_000 >> 3:  //LSL.W #<data>,Dr
 13810:       y = (XEiJ.regOC >> 9) - 1 & 7;  //y=data-1=1-1~8-1
 13811:       XEiJ.regRn[rrr] = ~0xffff & x | (char) (z = (short) ((t = x << y) << 1));
 13812:       XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | (short) t >> 15 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C);  //XとCは最後に押し出されたビット
 13813:       break;
 13814:     case 0b010_000 >> 3:  //ROXL.W #<data>,Dr
 13815:       y = (XEiJ.regOC >> 9) - 1 & 7;  //y=data-1=1-1~8-1
 13816:       z = x << 1 | XEiJ.regCCR >> 4 & 1;
 13817:       if (y == 1 - 1) {  //y=data-1=1-1
 13818:         t = x;
 13819:       } else {  //y=data-1=2-1~8-1
 13820:         z = (t = z << y - (2 - 1)) << 1 | (char) x >>> 17 - 1 - y;
 13821:       }
 13822:       XEiJ.regRn[rrr] = ~0xffff & x | (char) (z = (short) z);
 13823:       XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | (short) t >> 15 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C);  //XとCは最後に押し出されたビット
 13824:       break;
 13825:     case 0b011_000 >> 3:  //ROL.W #<data>,Dr
 13826:       y = (XEiJ.regOC >> 9) - 1 & 7;  //y=data-1=1-1~8-1
 13827:       XEiJ.regRn[rrr] = ~0xffff & x | (char) (z = (short) (x << y + 1 | (char) x >>> 16 - 1 - y));
 13828:       XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | z & 1;  //Xは変化しない。Cは結果の最下位ビット
 13829:       break;
 13830:     case 0b100_000 >> 3:  //ASL.W Dq,Dr
 13831:       y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63;  //y=0~63。Javaのシフト演算子は5ビットでマスクされることに注意
 13832:       if (y <= 15) {  //y=data=0~15
 13833:         if (y == 0) {  //y=data=0
 13834:           z = (short) x;
 13835:           t = XEiJ.regCCR & XEiJ.REG_CCR_X;  //Xは変化しない。VとCはクリア
 13836:         } else {  //y=data=1~15
 13837:           XEiJ.regRn[rrr] = ~0xffff & x | (char) (z = (short) ((t = x << y - 1) << 1));
 13838:           t = (z >> y != (short) x ? XEiJ.REG_CCR_V : 0) | (short) t >> 15 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C);  //VはASRで元に戻せないときセット。XとCは最後に押し出されたビット
 13839:         }
 13840:         XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | t;
 13841:       } else {  //y=data=16~63
 13842:         XEiJ.regRn[rrr] = ~0xffff & x;
 13843:         XEiJ.regCCR = XEiJ.REG_CCR_Z | ((short) x != 0 ? XEiJ.REG_CCR_V : 0) | (y == 16 ? -(x & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C) : 0);
 13844:       }
 13845:       break;
 13846:     case 0b101_000 >> 3:  //LSL.W Dq,Dr
 13847:       y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63;  //y=0~63。Javaのシフト演算子は5ビットでマスクされることに注意
 13848:       if (y == 0) {  //y=data=0
 13849:         z = (short) x;
 13850:         t = XEiJ.regCCR & XEiJ.REG_CCR_X;  //Xは変化しない。Cはクリア
 13851:       } else {  //y=data=1~63
 13852:         XEiJ.regRn[rrr] = ~0xffff & x | (char) (z = (short) ((t = y <= 16 ? x << y - 1 : 0) << 1));
 13853:         t = (short) t >> 15 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C);  //XとCは最後に押し出されたビット
 13854:       }
 13855:       XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | t;
 13856:       break;
 13857:     case 0b110_000 >> 3:  //ROXL.W Dq,Dr
 13858:       y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63;  //y=0~63。Javaのシフト演算子は5ビットでマスクされることに注意
 13859:       //y %= 17;
 13860:       y = (y & 15) - (y >> 4);  //y=data=-3~15
 13861:       y += y >> 4 & 17;  //y=data=0~16
 13862:       if (y == 0) {  //y=data=0
 13863:         z = (short) x;
 13864:         t = -(XEiJ.regCCR >> 4 & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C);  //Xは変化しない。CはXのコピー
 13865:       } else {  //y=data=1~16
 13866:         z = x << 1 | XEiJ.regCCR >> 4 & 1;
 13867:         if (y == 1) {  //y=data=1
 13868:           t = x;  //Cは最後に押し出されたビット
 13869:         } else {  //y=data=2~16
 13870:           z = (t = z << y - 2) << 1 | (char) x >>> 17 - y;
 13871:         }
 13872:         XEiJ.regRn[rrr] = ~0xffff & x | (char) (z = (short) z);
 13873:         t = (short) t >> 15 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C);  //XとCは最後に押し出されたビット
 13874:       }
 13875:       XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | t;
 13876:       break;
 13877:     case 0b111_000 >> 3:  //ROL.W Dq,Dr
 13878:     default:
 13879:       y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63;  //y=0~63。Javaのシフト演算子は5ビットでマスクされることに注意
 13880:       if (y == 0) {
 13881:         z = (short) x;
 13882:         t = 0;  //Cはクリア
 13883:       } else {
 13884:         y &= 15;  //y=data=0~15
 13885:         XEiJ.regRn[rrr] = ~0xffff & x | (char) (z = (short) (x << y | (char) x >>> 16 - y));
 13886:         t = z & 1;  //Cは結果の最下位ビット
 13887:       }
 13888:       XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | t;  //Xは変化しない
 13889:     }
 13890:   }  //irpXxlToRegWord
 13891: 
 13892:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 13893:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 13894:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 13895:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 13896:   //ASL.L #<data>,Dr                                |-|012346|-|UUUUU|*****|          |1110_qqq_110_000_rrr
 13897:   //LSL.L #<data>,Dr                                |-|012346|-|UUUUU|***0*|          |1110_qqq_110_001_rrr
 13898:   //ROXL.L #<data>,Dr                               |-|012346|-|*UUUU|***0*|          |1110_qqq_110_010_rrr
 13899:   //ROL.L #<data>,Dr                                |-|012346|-|-UUUU|-**0*|          |1110_qqq_110_011_rrr
 13900:   //ASL.L Dq,Dr                                     |-|012346|-|UUUUU|*****|          |1110_qqq_110_100_rrr
 13901:   //LSL.L Dq,Dr                                     |-|012346|-|UUUUU|***0*|          |1110_qqq_110_101_rrr
 13902:   //ROXL.L Dq,Dr                                    |-|012346|-|*UUUU|***0*|          |1110_qqq_110_110_rrr
 13903:   //ROL.L Dq,Dr                                     |-|012346|-|-UUUU|-**0*|          |1110_qqq_110_111_rrr
 13904:   //ASL.L Dr                                        |A|012346|-|UUUUU|*****|          |1110_001_110_000_rrr [ASL.L #1,Dr]
 13905:   //LSL.L Dr                                        |A|012346|-|UUUUU|***0*|          |1110_001_110_001_rrr [LSL.L #1,Dr]
 13906:   //ROXL.L Dr                                       |A|012346|-|*UUUU|***0*|          |1110_001_110_010_rrr [ROXL.L #1,Dr]
 13907:   //ROL.L Dr                                        |A|012346|-|-UUUU|-**0*|          |1110_001_110_011_rrr [ROL.L #1,Dr]
 13908:   //
 13909:   //ASL.L #<data>,Dr
 13910:   //ASL.L Dq,Dr
 13911:   //  算術左シフトロング
 13912:   //       アイウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマミ XNZVC
 13913:   //     0 アイウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマミ Xア**0 Z=アイウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマミ==0
 13914:   //     1 イウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマミ0 アイ**ア Z=イウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマミ==0,V=アイ!=0/-1
 13915:   //     :
 13916:   //    31 ミ0000000000000000000000000000000 マミ**マ Z=ミ==0,V=アイウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマミ!=0/-1
 13917:   //    32 00000000000000000000000000000000 ミ01*ミ V=アイウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマミ!=0
 13918:   //    33 00000000000000000000000000000000 001*0 V=アイウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマミ!=0
 13919:   //  CCR
 13920:   //    X  countが0のとき変化しない。他は最後に押し出されたビット
 13921:   //    N  結果の最上位ビット
 13922:   //    Z  結果が0のときセット。他はクリア
 13923:   //    V  ASRで元に戻せないときセット。他はクリア
 13924:   //    C  countが0のときクリア。他は最後に押し出されたビット
 13925:   //
 13926:   //LSL.L #<data>,Dr
 13927:   //LSL.L Dq,Dr
 13928:   //  論理左シフトロング
 13929:   //       アイウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマミ XNZVC
 13930:   //     0 アイウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマミ Xア*00 Z=アイウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマミ==0
 13931:   //     1 イウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマミ0 アイ*0ア Z=イウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマミ==0
 13932:   //     :
 13933:   //    31 ミ0000000000000000000000000000000 マミ*0マ Z=ミ==0
 13934:   //    32 00000000000000000000000000000000 ミ010ミ
 13935:   //    33 00000000000000000000000000000000 00100
 13936:   //  CCR
 13937:   //    X  countが0のとき変化しない。他は最後に押し出されたビット
 13938:   //    N  結果の最上位ビット
 13939:   //    Z  結果が0のときセット。他はクリア
 13940:   //    V  常にクリア
 13941:   //    C  countが0のときクリア。他は最後に押し出されたビット
 13942:   //
 13943:   //ROL.L #<data>,Dr
 13944:   //ROL.L Dq,Dr
 13945:   //  左ローテートロング
 13946:   //       アイウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマミ XNZVC
 13947:   //     0 アイウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマミ Xア*00 Z=アイウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマミ==0
 13948:   //     1 イウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマミア Xイ*0ア Z=アイウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマミ==0
 13949:   //     :
 13950:   //    31 ミアイウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマ Xミ*0マ Z=アイウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマミ==0
 13951:   //    32 アイウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマミ Xア*0ミ Z=アイウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマミ==0
 13952:   //  CCR
 13953:   //    X  常に変化しない
 13954:   //    N  結果の最上位ビット
 13955:   //    Z  結果が0のときセット。他はクリア
 13956:   //    V  常にクリア
 13957:   //    C  countが0のときクリア。他は結果の最下位ビット
 13958:   //
 13959:   //ROXL.L #<data>,Dr
 13960:   //ROXL.L Dq,Dr
 13961:   //  拡張左ローテートロング
 13962:   //       アイウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマミ XNZVC
 13963:   //     0 アイウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマミ Xア*0X Z=アイウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマミ==0
 13964:   //     1 イウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマミX アイ*0ア Z=イウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマミX==0
 13965:   //     2 ウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマミXア イウ*0イ Z=アウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマミX==0
 13966:   //     :
 13967:   //    31 ミXアイウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホ マミ*0マ Z=アイウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホミX==0
 13968:   //    32 Xアイウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマ ミX*0ミ Z=アイウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマX==0
 13969:   //    33 アイウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマミ Xア*0X Z=アイウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマミ==0
 13970:   //  CCR
 13971:   //    X  countが0のとき変化しない。他は最後に押し出されたビット
 13972:   //    N  結果の最上位ビット
 13973:   //    Z  結果が0のときセット。他はクリア
 13974:   //    V  常にクリア
 13975:   //    C  countが0のときXのコピー。他は最後に押し出されたビット
 13976:   public static void irpXxlToRegLong () throws M68kException {
 13977:     int rrr;
 13978:     int x = XEiJ.regRn[rrr = XEiJ.regOC & 7];
 13979:     int y;
 13980:     int z;
 13981:     int t;
 13982:     XEiJ.mpuCycleCount++;
 13983:     switch (XEiJ.regOC >> 3 & 0b111_000 >> 3) {
 13984:     case 0b000_000 >> 3:  //ASL.L #<data>,Dr
 13985:       y = (XEiJ.regOC >> 9) - 1 & 7;  //y=data-1=1-1~8-1
 13986:       XEiJ.regRn[rrr] = z = (t = x << y) << 1;
 13987:       XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | (z >> y + 1 != x ? XEiJ.REG_CCR_V : 0) | t >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C);  //VはASRで元に戻せないときセット。XとCは最後に押し出されたビット
 13988:       break;
 13989:     case 0b001_000 >> 3:  //LSL.L #<data>,Dr
 13990:       y = (XEiJ.regOC >> 9) - 1 & 7;  //y=data-1=1-1~8-1
 13991:       XEiJ.regRn[rrr] = z = (t = x << y) << 1;
 13992:       XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | t >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C);  //XとCは最後に押し出されたビット
 13993:       break;
 13994:     case 0b010_000 >> 3:  //ROXL.L #<data>,Dr
 13995:       y = (XEiJ.regOC >> 9) - 1 & 7;  //y=data-1=1-1~8-1
 13996:       z = x << 1 | XEiJ.regCCR >> 4 & 1;
 13997:       if (y == 1 - 1) {  //y=data-1=1-1
 13998:         t = x;
 13999:       } else {  //y=data-1=2-1~8-1
 14000:         z = (t = z << y - (2 - 1)) << 1 | x >>> -y;  //Javaのシフト演算子は5ビットでマスクされるので33-1-yを-yに省略
 14001:       }
 14002:       XEiJ.regRn[rrr] = z;
 14003:       XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | t >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C);  //XとCは最後に押し出されたビット
 14004:       break;
 14005:     case 0b011_000 >> 3:  //ROL.L #<data>,Dr
 14006:       y = (XEiJ.regOC >> 9) - 1 & 7;  //y=data-1=1-1~8-1
 14007:       XEiJ.regRn[rrr] = z = x << y + 1 | x >>> ~y;  //Javaのシフト演算子は5ビットでマスクされるので32-1-yを~yに省略
 14008:       XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | z & 1;  //Xは変化しない。Cは結果の最下位ビット
 14009:       break;
 14010:     case 0b100_000 >> 3:  //ASL.L Dq,Dr
 14011:       y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63;  //y=0~63。Javaのシフト演算子は5ビットでマスクされることに注意
 14012:       if (y <= 31) {  //y=data=0~31
 14013:         if (y == 0) {  //y=data=0
 14014:           z = x;
 14015:           t = XEiJ.regCCR & XEiJ.REG_CCR_X;  //Xは変化しない。VとCはクリア
 14016:         } else {  //y=data=1~31
 14017:           XEiJ.regRn[rrr] = z = (t = x << y - 1) << 1;
 14018:           t = (z >> y != x ? XEiJ.REG_CCR_V : 0) | t >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C);  //VはASRで元に戻せないときセット。XとCは最後に押し出されたビット
 14019:         }
 14020:         XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | t;
 14021:       } else {  //y=data=32~63
 14022:         XEiJ.regRn[rrr] = 0;
 14023:         XEiJ.regCCR = XEiJ.REG_CCR_Z | (x != 0 ? XEiJ.REG_CCR_V : 0) | (y == 32 ? -(x & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C) : 0);
 14024:       }
 14025:       break;
 14026:     case 0b101_000 >> 3:  //LSL.L Dq,Dr
 14027:       y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63;  //y=0~63。Javaのシフト演算子は5ビットでマスクされることに注意
 14028:       if (y == 0) {  //y=data=0
 14029:         z = x;
 14030:         t = XEiJ.regCCR & XEiJ.REG_CCR_X;  //Xは変化しない。Cはクリア
 14031:       } else {  //y=data=1~63
 14032:         XEiJ.regRn[rrr] = z = (t = y <= 32 ? x << y - 1 : 0) << 1;
 14033:         t = t >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C);  //XとCは最後に押し出されたビット
 14034:       }
 14035:       XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | t;
 14036:       break;
 14037:     case 0b110_000 >> 3:  //ROXL.L Dq,Dr
 14038:       y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63;  //y=0~63。Javaのシフト演算子は5ビットでマスクされることに注意
 14039:       //y %= 33;
 14040:       y -= 32 - y >> 6 & 33;  //y=data=0~32
 14041:       if (y == 0) {  //y=data=0
 14042:         z = x;
 14043:         t = -(XEiJ.regCCR >> 4 & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C);  //Xは変化しない。CはXのコピー
 14044:       } else {  //y=data=1~32
 14045:         z = x << 1 | XEiJ.regCCR >> 4 & 1;
 14046:         if (y == 1) {  //y=data=1
 14047:           t = x;  //Cは最後に押し出されたビット
 14048:         } else {  //y=data=2~32
 14049:           z = (t = z << y - 2) << 1 | x >>> 33 - y;
 14050:         }
 14051:         XEiJ.regRn[rrr] = z;
 14052:         t = t >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C);  //XとCは最後に押し出されたビット
 14053:       }
 14054:       XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | t;
 14055:       break;
 14056:     case 0b111_000 >> 3:  //ROL.L Dq,Dr
 14057:     default:
 14058:       y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63;  //y=0~63。Javaのシフト演算子は5ビットでマスクされることに注意
 14059:       if (y == 0) {
 14060:         z = x;
 14061:         t = 0;  //Cはクリア
 14062:       } else {
 14063:         XEiJ.regRn[rrr] = z = x << y | x >>> -y;  //Javaのシフト演算子は5ビットでマスクされるのでy&31をyに、32-(y&31)を-yに省略。y=32のときx|xになるが問題ない
 14064:         t = z & 1;
 14065:       }
 14066:       XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | t;  //Xは変化しない
 14067:     }
 14068:   }  //irpXxlToRegLong
 14069: 
 14070:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 14071:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 14072:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 14073:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 14074:   //ASL.W <ea>                                      |-|012346|-|UUUUU|*****|  M+-WXZ  |1110_000_111_mmm_rrr
 14075:   //
 14076:   //ASL.W #<data>,Dr
 14077:   //ASL.W Dq,Dr
 14078:   //ASL.W <ea>
 14079:   //  算術左シフトワード
 14080:   //       ................アイウエオカキクケコサシスセソタ XNZVC
 14081:   //     0 ................アイウエオカキクケコサシスセソタ Xア*00 Z=アイウエオカキクケコサシスセソタ==0
 14082:   //     1 ................イウエオカキクケコサシスセソタ0 アイ**ア Z=イウエオカキクケコサシスセソタ==0,V=アイ!=0/-1
 14083:   //     :
 14084:   //    15 ................タ000000000000000 ソタ**ソ Z=タ==0,V=アイウエオカキクケコサシスセソタ!=0/-1
 14085:   //    16 ................0000000000000000 タ01*タ V=アイウエオカキクケコサシスセソタ!=0
 14086:   //    17 ................0000000000000000 001*0 V=アイウエオカキクケコサシスセソタ!=0
 14087:   //  CCR
 14088:   //    X  countが0のとき変化しない。他は最後に押し出されたビット
 14089:   //    N  結果の最上位ビット
 14090:   //    Z  結果が0のときセット。他はクリア
 14091:   //    V  ASRで元に戻せないときセット。他はクリア
 14092:   //    C  countが0のときクリア。他は最後に押し出されたビット
 14093:   public static void irpAslToMem () throws M68kException {
 14094:     XEiJ.mpuCycleCount++;
 14095:     int ea = XEiJ.regOC & 63;
 14096:     int a = efaMltWord (ea);
 14097:     int x = mmuModifyWordSignData (a, XEiJ.regSRS);
 14098:     int z = (short) (x << 1);
 14099:     mmuWriteWordData (a, z, XEiJ.regSRS);
 14100:     XEiJ.regCCR = ((z < 0 ? XEiJ.REG_CCR_N : 0) |
 14101:                    (z == 0 ? XEiJ.REG_CCR_Z : 0) |
 14102:                    (x ^ z) >>> 31 << 1 |  //Vは最上位ビットが変化したときセット
 14103:                    x >> 15 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C));  //XとCは最後に押し出されたビット
 14104:   }  //irpAslToMem
 14105: 
 14106:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 14107:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 14108:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 14109:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 14110:   //LSR.W <ea>                                      |-|012346|-|UUUUU|*0*0*|  M+-WXZ  |1110_001_011_mmm_rrr
 14111:   //
 14112:   //LSR.W #<data>,Dr
 14113:   //LSR.W Dq,Dr
 14114:   //LSR.W <ea>
 14115:   //  論理右シフトワード
 14116:   //       ................アイウエオカキクケコサシスセソタ XNZVC
 14117:   //     0 ................アイウエオカキクケコサシスセソタ Xア*00 Z=アイウエオカキクケコサシスセソタ==0
 14118:   //     1 ................0アイウエオカキクケコサシスセソ タ0*0タ Z=アイウエオカキクケコサシスセソ==0
 14119:   //     :
 14120:   //    15 ................000000000000000ア イ0*0イ Z=ア==0
 14121:   //    16 ................0000000000000000 ア010ア
 14122:   //    17 ................0000000000000000 00100
 14123:   //  CCR
 14124:   //    X  countが0のとき変化しない。他は最後に押し出されたビット
 14125:   //    N  結果の最上位ビット
 14126:   //    Z  結果が0のときセット。他はクリア
 14127:   //    V  常にクリア
 14128:   //    C  countが0のときクリア。他は最後に押し出されたビット
 14129:   public static void irpLsrToMem () throws M68kException {
 14130:     XEiJ.mpuCycleCount++;
 14131:     int ea = XEiJ.regOC & 63;
 14132:     int a = efaMltWord (ea);
 14133:     int x = mmuModifyWordZeroData (a, XEiJ.regSRS);
 14134:     int z = x >>> 1;
 14135:     mmuWriteWordData (a, z, XEiJ.regSRS);
 14136:     XEiJ.regCCR = ((z == 0 ? XEiJ.REG_CCR_Z : 0) |
 14137:                    -(x & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C));  //XとCは最後に押し出されたビット
 14138:   }  //irpLsrToMem
 14139: 
 14140:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 14141:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 14142:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 14143:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 14144:   //LSL.W <ea>                                      |-|012346|-|UUUUU|***0*|  M+-WXZ  |1110_001_111_mmm_rrr
 14145:   //
 14146:   //LSL.W #<data>,Dr
 14147:   //LSL.W Dq,Dr
 14148:   //LSL.W <ea>
 14149:   //  論理左シフトワード
 14150:   //       ................アイウエオカキクケコサシスセソタ XNZVC
 14151:   //     0 ................アイウエオカキクケコサシスセソタ Xア*00 Z=アイウエオカキクケコサシスセソタ==0
 14152:   //     1 ................イウエオカキクケコサシスセソタ0 アイ*0ア Z=イウエオカキクケコサシスセソタ==0
 14153:   //     :
 14154:   //    15 ................タ000000000000000 ソタ*0ソ Z=タ==0
 14155:   //    16 ................0000000000000000 タ010タ
 14156:   //    17 ................0000000000000000 00100
 14157:   //  CCR
 14158:   //    X  countが0のとき変化しない。他は最後に押し出されたビット
 14159:   //    N  結果の最上位ビット
 14160:   //    Z  結果が0のときセット。他はクリア
 14161:   //    V  常にクリア
 14162:   //    C  countが0のときクリア。他は最後に押し出されたビット
 14163:   public static void irpLslToMem () throws M68kException {
 14164:     XEiJ.mpuCycleCount++;
 14165:     int ea = XEiJ.regOC & 63;
 14166:     int a = efaMltWord (ea);
 14167:     int x = mmuModifyWordSignData (a, XEiJ.regSRS);
 14168:     int z = (short) (x << 1);
 14169:     mmuWriteWordData (a, z, XEiJ.regSRS);
 14170:     XEiJ.regCCR = ((z < 0 ? XEiJ.REG_CCR_N : 0) |
 14171:                    (z == 0 ? XEiJ.REG_CCR_Z : 0) |
 14172:                    x >> 15 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C));  //XとCは最後に押し出されたビット
 14173:   }  //irpLslToMem
 14174: 
 14175:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 14176:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 14177:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 14178:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 14179:   //ROXR.W <ea>                                     |-|012346|-|*UUUU|***0*|  M+-WXZ  |1110_010_011_mmm_rrr
 14180:   //
 14181:   //ROXR.W #<data>,Dr
 14182:   //ROXR.W Dq,Dr
 14183:   //ROXR.W <ea>
 14184:   //  拡張右ローテートワード
 14185:   //       ................アイウエオカキクケコサシスセソタ XNZVC
 14186:   //     0 ................アイウエオカキクケコサシスセソタ Xア*0X Z=アイウエオカキクケコサシスセソタ==0
 14187:   //     1 ................Xアイウエオカキクケコサシスセソ タX*0タ Z=アイウエオカキクケコサシスセソX==0
 14188:   //     2 ................タXアイウエオカキクケコサシスセ ソタ*0ソ Z=アイウエオカキクケコサシスセタX==0
 14189:   //     :
 14190:   //    15 ................ウエオカキクケコサシスセソタXア イウ*0イ Z=アウエオカキクケコサシスセソタX==0
 14191:   //    16 ................イウエオカキクケコサシスセソタX アイ*0ア Z=イウエオカキクケコサシスセソタX==0
 14192:   //    17 ................アイウエオカキクケコサシスセソタ Xア*0X Z=アイウエオカキクケコサシスセソタ==0
 14193:   //  CCR
 14194:   //    X  countが0のとき変化しない。他は最後に押し出されたビット
 14195:   //    N  結果の最上位ビット
 14196:   //    Z  結果が0のときセット。他はクリア
 14197:   //    V  常にクリア
 14198:   //    C  countが0のときXのコピー。他は最後に押し出されたビット
 14199:   public static void irpRoxrToMem () throws M68kException {
 14200:     XEiJ.mpuCycleCount++;
 14201:     int ea = XEiJ.regOC & 63;
 14202:     int a = efaMltWord (ea);
 14203:     int x = mmuModifyWordZeroData (a, XEiJ.regSRS);
 14204:     int z = -(XEiJ.regCCR & XEiJ.REG_CCR_X) << 15 - 4 | x >>> 1;
 14205:     mmuWriteWordData (a, z, XEiJ.regSRS);
 14206:     XEiJ.regCCR = ((z < 0 ? XEiJ.REG_CCR_N : 0) |
 14207:                    (z == 0 ? XEiJ.REG_CCR_Z : 0) |
 14208:                    -(x & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C));  //XとCは最後に押し出されたビット
 14209:   }  //irpRoxrToMem
 14210: 
 14211:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 14212:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 14213:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 14214:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 14215:   //ROXL.W <ea>                                     |-|012346|-|*UUUU|***0*|  M+-WXZ  |1110_010_111_mmm_rrr
 14216:   //
 14217:   //ROXL.W #<data>,Dr
 14218:   //ROXL.W Dq,Dr
 14219:   //ROXL.W <ea>
 14220:   //  拡張左ローテートワード
 14221:   //       ................アイウエオカキクケコサシスセソタ XNZVC
 14222:   //     0 ................アイウエオカキクケコサシスセソタ Xア*0X Z=アイウエオカキクケコサシスセソタ==0
 14223:   //     1 ................イウエオカキクケコサシスセソタX アイ*0ア Z=イウエオカキクケコサシスセソタX==0
 14224:   //     2 ................ウエオカキクケコサシスセソタXア イウ*0イ Z=アウエオカキクケコサシスセソタX==0
 14225:   //     :
 14226:   //    15 ................タXアイウエオカキクケコサシスセ ソタ*0ソ Z=アイウエオカキクケコサシスセタX==0
 14227:   //    16 ................Xアイウエオカキクケコサシスセソ タX*0タ Z=アイウエオカキクケコサシスセソX==0
 14228:   //    17 ................アイウエオカキクケコサシスセソタ Xア*0X Z=アイウエオカキクケコサシスセソタ==0
 14229:   //  CCR
 14230:   //    X  countが0のとき変化しない。他は最後に押し出されたビット
 14231:   //    N  結果の最上位ビット
 14232:   //    Z  結果が0のときセット。他はクリア
 14233:   //    V  常にクリア
 14234:   //    C  countが0のときXのコピー。他は最後に押し出されたビット
 14235:   public static void irpRoxlToMem () throws M68kException {
 14236:     XEiJ.mpuCycleCount++;
 14237:     int ea = XEiJ.regOC & 63;
 14238:     int a = efaMltWord (ea);
 14239:     int x = mmuModifyWordSignData (a, XEiJ.regSRS);
 14240:     int z = (short) (x << 1 | XEiJ.regCCR >> 4 & 1);
 14241:     mmuWriteWordData (a, z, XEiJ.regSRS);
 14242:     XEiJ.regCCR = ((z < 0 ? XEiJ.REG_CCR_N : 0) |
 14243:                    (z == 0 ? XEiJ.REG_CCR_Z : 0) |
 14244:                    x >> 15 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C));  //XとCは最後に押し出されたビット
 14245:   }  //irpRoxlToMem
 14246: 
 14247:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 14248:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 14249:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 14250:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 14251:   //ROR.W <ea>                                      |-|012346|-|-UUUU|-**0*|  M+-WXZ  |1110_011_011_mmm_rrr
 14252:   //
 14253:   //ROR.W #<data>,Dr
 14254:   //ROR.W Dq,Dr
 14255:   //ROR.W <ea>
 14256:   //  右ローテートワード
 14257:   //       ................アイウエオカキクケコサシスセソタ XNZVC
 14258:   //     0 ................アイウエオカキクケコサシスセソタ Xア*00 Z=アイウエオカキクケコサシスセソタ==0
 14259:   //     1 ................タアイウエオカキクケコサシスセソ Xタ*0タ Z=アイウエオカキクケコサシスセソタ==0
 14260:   //     :
 14261:   //    15 ................イウエオカキクケコサシスセソタア Xイ*0イ Z=アイウエオカキクケコサシスセソタ==0
 14262:   //    16 ................アイウエオカキクケコサシスセソタ Xア*0ア Z=アイウエオカキクケコサシスセソタ==0
 14263:   //  CCR
 14264:   //    X  常に変化しない
 14265:   //    N  結果の最上位ビット
 14266:   //    Z  結果が0のときセット。他はクリア
 14267:   //    V  常にクリア
 14268:   //    C  countが0のときクリア。他は結果の最上位ビット
 14269:   public static void irpRorToMem () throws M68kException {
 14270:     XEiJ.mpuCycleCount++;
 14271:     int ea = XEiJ.regOC & 63;
 14272:     int a = efaMltWord (ea);
 14273:     int x = mmuModifyWordZeroData (a, XEiJ.regSRS);
 14274:     int z = (short) (x << 15 | x >>> 1);
 14275:     mmuWriteWordData (a, z, XEiJ.regSRS);
 14276:     XEiJ.regCCR = (XEiJ.regCCR & XEiJ.REG_CCR_X |  //Xは変化しない
 14277:                    (z < 0 ? XEiJ.REG_CCR_N : 0) |
 14278:                    (z == 0 ? XEiJ.REG_CCR_Z : 0) |
 14279:                    z >>> 31);  //Cは結果の最上位ビット
 14280:   }  //irpRorToMem
 14281: 
 14282:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 14283:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 14284:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 14285:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 14286:   //ROL.W <ea>                                      |-|012346|-|-UUUU|-**0*|  M+-WXZ  |1110_011_111_mmm_rrr
 14287:   //
 14288:   //ROL.W #<data>,Dr
 14289:   //ROL.W Dq,Dr
 14290:   //ROL.W <ea>
 14291:   //  左ローテートワード
 14292:   //       ................アイウエオカキクケコサシスセソタ XNZVC
 14293:   //     0 ................アイウエオカキクケコサシスセソタ Xア*00 Z=アイウエオカキクケコサシスセソタ==0
 14294:   //     1 ................イウエオカキクケコサシスセソタア Xイ*0ア Z=アイウエオカキクケコサシスセソタ==0
 14295:   //     :
 14296:   //    15 ................タアイウエオカキクケコサシスセソ Xタ*0ソ Z=アイウエオカキクケコサシスセソタ==0
 14297:   //    16 ................アイウエオカキクケコサシスセソタ Xア*0タ Z=アイウエオカキクケコサシスセソタ==0
 14298:   //  CCR
 14299:   //    X  常に変化しない
 14300:   //    N  結果の最上位ビット
 14301:   //    Z  結果が0のときセット。他はクリア
 14302:   //    V  常にクリア
 14303:   //    C  countが0のときクリア。他は結果の最下位ビット
 14304:   public static void irpRolToMem () throws M68kException {
 14305:     XEiJ.mpuCycleCount++;
 14306:     int ea = XEiJ.regOC & 63;
 14307:     int a = efaMltWord (ea);
 14308:     int x = mmuModifyWordZeroData (a, XEiJ.regSRS);
 14309:     int z = (short) (x << 1 | x >>> 15);
 14310:     mmuWriteWordData (a, z, XEiJ.regSRS);
 14311:     XEiJ.regCCR = (XEiJ.regCCR & XEiJ.REG_CCR_X |  //Xは変化しない
 14312:                    (z < 0 ? XEiJ.REG_CCR_N : 0) |
 14313:                    (z == 0 ? XEiJ.REG_CCR_Z : 0) |
 14314:                    z & 1);  //Cは結果の最下位ビット
 14315:   }  //irpRolToMem
 14316: 
 14317:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 14318:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 14319:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 14320:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 14321:   //BFTST <ea>{#o:#w}                               |-|--2346|-|-UUUU|-**00|D M  WXZP |1110_100_011_mmm_rrr-00000ooooo0wwwww
 14322:   //BFTST <ea>{#o:Dw}                               |-|--2346|-|-UUUU|-**00|D M  WXZP |1110_100_011_mmm_rrr-00000ooooo100www
 14323:   //BFTST <ea>{Do:#w}                               |-|--2346|-|-UUUU|-**00|D M  WXZP |1110_100_011_mmm_rrr-0000100ooo0wwwww
 14324:   //BFTST <ea>{Do:Dw}                               |-|--2346|-|-UUUU|-**00|D M  WXZP |1110_100_011_mmm_rrr-0000100ooo100www
 14325:   public static void irpBftst () throws M68kException {
 14326:     int w = mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);  //pcwz。拡張ワード
 14327:     if ((w & ~0b0000_111_111_111_111) != 0 ||
 14328:         (w & 0b0000_111_111_000_000) > 0b0000_100_111_000_000 ||
 14329:         (w & 0b0000_000_000_111_111) > 0b0000_000_000_100_111) {
 14330:       M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION;
 14331:       throw M68kException.m6eSignal;
 14332:     }
 14333:     int o = w << 31 - 11 >= 0 ? w >> 6 & 31 : XEiJ.regRn[w >> 6 & 7];  //o=offset
 14334:     w = -(w << 31 - 5 >= 0 ? w : XEiJ.regRn[w & 7]) & 31;  //w=32-width。1<=width<=32なので0<=32-width<=31
 14335:     XEiJ.mpuCycleCount += 6;
 14336:     int ea = XEiJ.regOC & 63;
 14337:     int z;
 14338:     if (ea < XEiJ.EA_AR) {  //BFTST Dr{~}
 14339:       z = XEiJ.regRn[ea];
 14340:       z = z << o | z >>> -o;  //下位からはみ出したフィールドは上位に戻る
 14341:     } else {  //BFTST <mem>{~}
 14342:       int a = efaCntLong (ea) + (o >> 3);  //フィールドの最上位ビットを含むバイトのアドレス
 14343:       o &= 7;
 14344:       z = 31 - w + o >> 3;  //フィールドが跨ぐバイト境界の数。0~4
 14345:       z = (z == 0 ? mmuReadByteSignData (a, XEiJ.regSRS) << 24 + o :  //不要なバイトにアクセスしない
 14346:            z == 1 ? mmuReadWordSignData (a, XEiJ.regSRS) << 16 + o :  //020以上なのでアドレスエラーは出ない
 14347:            z == 2 ? (mmuReadWordSignData (a, XEiJ.regSRS) << 8 | mmuReadByteZeroData (a + 2, XEiJ.regSRS)) << 8 + o :
 14348:            z == 3 ? mmuReadLongData (a, XEiJ.regSRS) << o :
 14349:            mmuReadLongData (a, XEiJ.regSRS) << o | mmuReadByteZeroData (a + 4, XEiJ.regSRS) >>> 8 - o);
 14350:     }
 14351:     z >>= w;  //符号拡張。下位のゴミを消す
 14352:     XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X);  //ccr_tst
 14353:   }  //irpBftst
 14354: 
 14355:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 14356:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 14357:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 14358:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 14359:   //BFEXTU <ea>{#o:#w},Dn                           |-|--2346|-|-UUUU|-**00|D M  WXZP |1110_100_111_mmm_rrr-0nnn0ooooo0wwwww
 14360:   //BFEXTU <ea>{#o:Dw},Dn                           |-|--2346|-|-UUUU|-**00|D M  WXZP |1110_100_111_mmm_rrr-0nnn0ooooo100www
 14361:   //BFEXTU <ea>{Do:#w},Dn                           |-|--2346|-|-UUUU|-**00|D M  WXZP |1110_100_111_mmm_rrr-0nnn100ooo0wwwww
 14362:   //BFEXTU <ea>{Do:Dw},Dn                           |-|--2346|-|-UUUU|-**00|D M  WXZP |1110_100_111_mmm_rrr-0nnn100ooo100www
 14363:   public static void irpBfextu () throws M68kException {
 14364:     int w = mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);  //pcwz。拡張ワード
 14365:     if ((w & ~0b0111_111_111_111_111) != 0 ||
 14366:         (w & 0b0000_111_111_000_000) > 0b0000_100_111_000_000 ||
 14367:         (w & 0b0000_000_000_111_111) > 0b0000_000_000_100_111) {
 14368:       M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION;
 14369:       throw M68kException.m6eSignal;
 14370:     }
 14371:     int n = w >> 12;
 14372:     int o = w << 31 - 11 >= 0 ? w >> 6 & 31 : XEiJ.regRn[w >> 6 & 7];  //o=offset
 14373:     w = -(w << 31 - 5 >= 0 ? w : XEiJ.regRn[w & 7]) & 31;  //w=32-width。1<=width<=32なので0<=32-width<=31
 14374:     XEiJ.mpuCycleCount += 6;
 14375:     int ea = XEiJ.regOC & 63;
 14376:     int z;
 14377:     if (ea < XEiJ.EA_AR) {  //BFEXTU Dr{~}
 14378:       z = XEiJ.regRn[ea];
 14379:       z = z << o | z >>> -o;  //下位からはみ出したフィールドは上位に戻る
 14380:     } else {  //BFEXTU <mem>{~}
 14381:       int a = efaCntLong (ea) + (o >> 3);
 14382:       o &= 7;
 14383:       z = 31 - w + o >> 3;
 14384:       z = (z == 0 ? mmuReadByteSignData (a, XEiJ.regSRS) << 24 + o :  //不要なバイトにアクセスしない
 14385:            z == 1 ? mmuReadWordSignData (a, XEiJ.regSRS) << 16 + o :  //020以上なのでアドレスエラーは出ない
 14386:            z == 2 ? (mmuReadWordSignData (a, XEiJ.regSRS) << 8 | mmuReadByteZeroData (a + 2, XEiJ.regSRS)) << 8 + o :
 14387:            z == 3 ? mmuReadLongData (a, XEiJ.regSRS) << o :
 14388:            mmuReadLongData (a, XEiJ.regSRS) << o | mmuReadByteZeroData (a + 4, XEiJ.regSRS) >>> 8 - o);
 14389:     }
 14390:     XEiJ.regRn[n] = z >>> w;  //ゼロ拡張
 14391:     z >>= w;  //符号拡張。下位のゴミを消す
 14392:     XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X);  //ccr_tst
 14393:   }  //irpBfextu
 14394: 
 14395:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 14396:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 14397:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 14398:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 14399:   //BFCHG <ea>{#o:#w}                               |-|--2346|-|-UUUU|-**00|D M  WXZ  |1110_101_011_mmm_rrr-00000ooooo0wwwww
 14400:   //BFCHG <ea>{#o:Dw}                               |-|--2346|-|-UUUU|-**00|D M  WXZ  |1110_101_011_mmm_rrr-00000ooooo100www
 14401:   //BFCHG <ea>{Do:#w}                               |-|--2346|-|-UUUU|-**00|D M  WXZ  |1110_101_011_mmm_rrr-0000100ooo0wwwww
 14402:   //BFCHG <ea>{Do:Dw}                               |-|--2346|-|-UUUU|-**00|D M  WXZ  |1110_101_011_mmm_rrr-0000100ooo100www
 14403:   public static void irpBfchg () throws M68kException {
 14404:     int w = mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);  //pcwz。拡張ワード
 14405:     if ((w & ~0b0000_111_111_111_111) != 0 ||
 14406:         (w & 0b0000_111_111_000_000) > 0b0000_100_111_000_000 ||
 14407:         (w & 0b0000_000_000_111_111) > 0b0000_000_000_100_111) {
 14408:       M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION;
 14409:       throw M68kException.m6eSignal;
 14410:     }
 14411:     int o = w << 31 - 11 >= 0 ? w >> 6 & 31 : XEiJ.regRn[w >> 6 & 7];  //o=offset
 14412:     w = -(w << 31 - 5 >= 0 ? w : XEiJ.regRn[w & 7]) & 31;  //w=32-width。1<=width<=32なので0<=32-width<=31
 14413:     XEiJ.mpuCycleCount += 8;
 14414:     int ea = XEiJ.regOC & 63;
 14415:     int z;
 14416:     if (ea < XEiJ.EA_AR) {  //BFCHG Dr{~}
 14417:       z = XEiJ.regRn[ea];
 14418:       z = z << o | z >>> -o;  //下位からはみ出したフィールドは上位に戻る
 14419:       int t = z ^ -1 << w;  //フィールドの幅だけ反転する
 14420:       XEiJ.regRn[ea] = t << -o | t >>> o;
 14421:     } else {  //BFCHG <mem>{~}
 14422:       int a = efaCltLong (ea) + (o >> 3);  //フィールドの最上位ビットを含むバイトのアドレス
 14423:       o &= 7;
 14424:       z = 31 - w + o >> 3;  //フィールドが跨ぐバイト境界の数。0~4
 14425:       if (z == 0) {
 14426:         //  <ea>{2,5}  o=2,w=32-5=27                        <ea>  --abcde-
 14427:         int t = mmuModifyByteSignData (a, XEiJ.regSRS) << 24;                     //          t  --abcde- 00000000 00000000 00000000  不要なバイトにアクセスしない
 14428:         z = t << o;                                //          z  abcde-00 00000000 00000000 00000000
 14429:         //                                         //      -1<<w  11111000 00000000 00000000 00000000
 14430:         //                                         //  -1<<w>>>o  00111110 00000000 00000000 00000000
 14431:         //                                         //t^-1<<w>>>o  --ABCDE- 00000000 00000000 00000000
 14432:         mmuWriteByteData (a, (t ^ -1 << w >>> o) >>> 24, XEiJ.regSRS);        //       <ea>  --ABCDE-
 14433:       } else if (z == 1) {
 14434:         //  <ea>{7,5}  o=7,w=32-5=27                        <ea>  -------a bcde----
 14435:         int t = mmuModifyWordSignData (a, XEiJ.regSRS) << 16;                     //          t  -------a bcde---- 00000000 00000000  020以上なのでアドレスエラーは出ない
 14436:         z = t << o;                                //          z  abcde--- -0000000 00000000 00000000
 14437:         //                                         //      -1<<w  11111000 00000000 00000000 00000000
 14438:         //                                         //  -1<<w>>>o  00000001 11110000 00000000 00000000
 14439:         //                                         //t^-1<<w>>>o  -------A BCDE---- 00000000 00000000
 14440:         mmuWriteWordData (a, (t ^ -1 << w >>> o) >>> 16, XEiJ.regSRS);       //       <ea>  -------A BCDE----
 14441:       } else if (z == 2) {
 14442:         //  <ea>{7,12}  o=7,w=32-12=20                      <ea>  -------a bcdefghi jkl-----
 14443:         int t = mmuModifyWordSignData (a, XEiJ.regSRS) << 16 | mmuModifyByteZeroData (a + 2, XEiJ.regSRS) << 8;  //          t  -------a bcdefghi jkl----- 00000000
 14444:         z = t << o;                                //          z  abcdefgh ijkl---- -0000000 00000000
 14445:         //                                         //      -1<<w  11111111 11110000 00000000 00000000
 14446:         //                                         //  -1<<w>>>o  00000001 11111111 11100000 00000000
 14447:         t ^= -1 << w >>> o;                        //          t  -------A BCDEFGHI JKL----- 00000000
 14448:         mmuWriteWordData (a, t >>> 16, XEiJ.regSRS);                         //       <ea>  -------A BCDEFGHI jkl-----
 14449:         mmuWriteByteData (a + 2, t >>> 8, XEiJ.regSRS);                       //       <ea>  -------A BCDEFGHI JKL-----
 14450:       } else if (z == 3) {
 14451:         //  <ea>{7,19}  o=7,w=32-19=13                      <ea>  -------a bcdefghi jklmnopq rs------
 14452:         int t = mmuModifyLongData (a, XEiJ.regSRS);                           //          t  -------a bcdefghi jklmnopq rs------
 14453:         z = t << o;                                //          z  abcdefgh ijklmnop qrs----- -0000000
 14454:         //                                         //      -1<<w  11111111 11111111 11100000 00000000
 14455:         //                                         //  -1<<w>>>o  00000001 11111111 11111111 11000000
 14456:         mmuWriteLongData (a, t ^ -1 << w >>> o, XEiJ.regSRS);                //       <ea>  -------A BCDEFGHI JKLMNOPQ RS------
 14457:       } else {
 14458:         //  <ea>{7,26}  o=7,w=32-26=6                       <ea>  -------a bcdefghi jklmnopq rstuvwxy z-------
 14459:         int t = mmuModifyLongData (a, XEiJ.regSRS);                           //          t  -------a bcdefghi jklmnopq rstuvwxy
 14460:         z = t << o;                                //          z  abcdefgh ijklmnop qrstuvwx y0000000
 14461:         //                                                -1>>>o  00000001 11111111 11111111 11111111
 14462:         mmuWriteLongData (a, t ^ -1 >>> o, XEiJ.regSRS);                     //       <ea>  -------A BCDEFGHI JKLMNOPQ RSTUVWXY
 14463:         t = mmuModifyByteZeroData (a + 4, XEiJ.regSRS);                           //          t  00000000 00000000 00000000 z-------
 14464:         //                                         //    t>>>8-o  00000000 00000000 00000000 0z------
 14465:         z |= t >>> 8 - o;                          //          z  abcdefgh ijklmnop qrstuvwx yz------
 14466:         //                                         //  -1<<8-o+w  11111111 11111111 11111111 10000000
 14467:         mmuWriteByteData (a + 4, t ^ -1 << 8 - o + w, XEiJ.regSRS);           //       <ea>  -------A BCDEFGHI JKLMNOPQ RSTUVWXY Z-------
 14468:       }
 14469:     }
 14470:     z >>= w;  //符号拡張。下位のゴミを消す
 14471:     XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X);  //ccr_tst
 14472:   }  //irpBfchg
 14473: 
 14474:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 14475:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 14476:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 14477:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 14478:   //BFEXTS <ea>{#o:#w},Dn                           |-|--2346|-|-UUUU|-**00|D M  WXZP |1110_101_111_mmm_rrr-0nnn0ooooo0wwwww
 14479:   //BFEXTS <ea>{#o:Dw},Dn                           |-|--2346|-|-UUUU|-**00|D M  WXZP |1110_101_111_mmm_rrr-0nnn0ooooo100www
 14480:   //BFEXTS <ea>{Do:#w},Dn                           |-|--2346|-|-UUUU|-**00|D M  WXZP |1110_101_111_mmm_rrr-0nnn100ooo0wwwww
 14481:   //BFEXTS <ea>{Do:Dw},Dn                           |-|--2346|-|-UUUU|-**00|D M  WXZP |1110_101_111_mmm_rrr-0nnn100ooo100www
 14482:   public static void irpBfexts () throws M68kException {
 14483:     int w = mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);  //pcwz。拡張ワード
 14484:     if ((w & ~0b0111_111_111_111_111) != 0 ||
 14485:         (w & 0b0000_111_111_000_000) > 0b0000_100_111_000_000 ||
 14486:         (w & 0b0000_000_000_111_111) > 0b0000_000_000_100_111) {
 14487:       M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION;
 14488:       throw M68kException.m6eSignal;
 14489:     }
 14490:     int n = w >> 12;
 14491:     int o = w << 31 - 11 >= 0 ? w >> 6 & 31 : XEiJ.regRn[w >> 6 & 7];  //o=offset
 14492:     w = -(w << 31 - 5 >= 0 ? w : XEiJ.regRn[w & 7]) & 31;  //w=32-width。1<=width<=32なので0<=32-width<=31
 14493:     XEiJ.mpuCycleCount += 6;
 14494:     int ea = XEiJ.regOC & 63;
 14495:     int z;
 14496:     if (ea < XEiJ.EA_AR) {  //BFEXTS Dr{~}
 14497:       z = XEiJ.regRn[ea];
 14498:       z = z << o | z >>> -o;  //下位からはみ出したフィールドは上位に戻る
 14499:     } else {  //BFEXTS <mem>{~}
 14500:       int a = efaCntLong (ea) + (o >> 3);  //フィールドの最上位ビットを含むバイトのアドレス
 14501:       o &= 7;
 14502:       z = 31 - w + o >> 3;  //フィールドが跨ぐバイト境界の数。0~4
 14503:       z = (z == 0 ? mmuReadByteSignData (a, XEiJ.regSRS) << 24 + o :  //不要なバイトにアクセスしない
 14504:            z == 1 ? mmuReadWordSignData (a, XEiJ.regSRS) << 16 + o :  //020以上なのでアドレスエラーは出ない
 14505:            z == 2 ? (mmuReadWordSignData (a, XEiJ.regSRS) << 8 | mmuReadByteZeroData (a + 2, XEiJ.regSRS)) << 8 + o :
 14506:            z == 3 ? mmuReadLongData (a, XEiJ.regSRS) << o :
 14507:            mmuReadLongData (a, XEiJ.regSRS) << o | mmuReadByteZeroData (a + 4, XEiJ.regSRS) >>> 8 - o);
 14508:     }
 14509:     XEiJ.regRn[n] = z >>= w;  //符号拡張。下位のゴミを消す
 14510:     XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X);  //ccr_tst
 14511:   }  //irpBfexts
 14512: 
 14513:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 14514:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 14515:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 14516:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 14517:   //BFCLR <ea>{#o:#w}                               |-|--2346|-|-UUUU|-**00|D M  WXZ  |1110_110_011_mmm_rrr-00000ooooo0wwwww
 14518:   //BFCLR <ea>{#o:Dw}                               |-|--2346|-|-UUUU|-**00|D M  WXZ  |1110_110_011_mmm_rrr-00000ooooo100www
 14519:   //BFCLR <ea>{Do:#w}                               |-|--2346|-|-UUUU|-**00|D M  WXZ  |1110_110_011_mmm_rrr-0000100ooo0wwwww
 14520:   //BFCLR <ea>{Do:Dw}                               |-|--2346|-|-UUUU|-**00|D M  WXZ  |1110_110_011_mmm_rrr-0000100ooo100www
 14521:   public static void irpBfclr () throws M68kException {
 14522:     int w = mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);  //pcwz。拡張ワード
 14523:     if ((w & ~0b0000_111_111_111_111) != 0 ||
 14524:         (w & 0b0000_111_111_000_000) > 0b0000_100_111_000_000 ||
 14525:         (w & 0b0000_000_000_111_111) > 0b0000_000_000_100_111) {
 14526:       M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION;
 14527:       throw M68kException.m6eSignal;
 14528:     }
 14529:     int o = w << 31 - 11 >= 0 ? w >> 6 & 31 : XEiJ.regRn[w >> 6 & 7];  //o=offset
 14530:     w = -(w << 31 - 5 >= 0 ? w : XEiJ.regRn[w & 7]) & 31;  //w=32-width。1<=width<=32なので0<=32-width<=31
 14531:     XEiJ.mpuCycleCount += 8;
 14532:     int ea = XEiJ.regOC & 63;
 14533:     int z;
 14534:     if (ea < XEiJ.EA_AR) {  //BFCLR Dr{~}
 14535:       z = XEiJ.regRn[ea];
 14536:       z = z << o | z >>> -o;  //下位からはみ出したフィールドは上位に戻る
 14537:       int t = z & ~(-1 << w);  //フィールドの幅だけ0を並べる
 14538:       XEiJ.regRn[ea] = t << -o | t >>> o;
 14539:     } else {  //BFCLR <mem>{~}
 14540:       int a = efaCltLong (ea) + (o >> 3);  //フィールドの最上位ビットを含むバイトのアドレス
 14541:       o &= 7;
 14542:       z = 31 - w + o >> 3;  //フィールドが跨ぐバイト境界の数。0~4
 14543:       if (z == 0) {
 14544:         //  <ea>{2,5}  o=2,w=32-5=27                        <ea>  --abcde-
 14545:         int t = mmuModifyByteSignData (a, XEiJ.regSRS) << 24;                     //          t  --abcde- 00000000 00000000 00000000  不要なバイトにアクセスしない
 14546:         z = t << o;                                //          z  abcde-00 00000000 00000000 00000000
 14547:         //                                         //      -1<<w  11111000 00000000 00000000 00000000
 14548:         //                                         //  -1<<w>>>o  00111110 00000000 00000000 00000000
 14549:         //                                        //~(-1<<w>>>o)  11000001 11111111 11111111 11111111
 14550:         //                                      //t&~(-1<<w>>>o)  --00000- 00000000 00000000 00000000
 14551:         mmuWriteByteData (a, (t & ~(-1 << w >>> o)) >>> 24, XEiJ.regSRS);     //       <ea>  --00000-
 14552:       } else if (z == 1) {
 14553:         //  <ea>{7,5}  o=7,w=32-5=27                        <ea>  -------a bcde----
 14554:         int t = mmuModifyWordSignData (a, XEiJ.regSRS) << 16;                     //          t  -------a bcde---- 00000000 00000000  020以上なのでアドレスエラーは出ない
 14555:         z = t << o;                                //          z  abcde--- -0000000 00000000 00000000
 14556:         //                                         //      -1<<w  11111000 00000000 00000000 00000000
 14557:         //                                         //  -1<<w>>>o  00000001 11110000 00000000 00000000
 14558:         //                                        //~(-1<<w>>>o)  11111110 00001111 11111111 11111111
 14559:         //                                      //t&~(-1<<w>>>o)  -------0 0000---- 00000000 00000000
 14560:         mmuWriteWordData (a, (t & ~(-1 << w >>> o)) >>> 16, XEiJ.regSRS);    //       <ea>  -------0 0000----
 14561:       } else if (z == 2) {
 14562:         //  <ea>{7,12}  o=7,w=32-12=20                      <ea>  -------a bcdefghi jkl-----
 14563:         int t = mmuModifyWordSignData (a, XEiJ.regSRS) << 16 | mmuModifyByteZeroData (a + 2, XEiJ.regSRS) << 8;  //          t  -------a bcdefghi jkl----- 00000000
 14564:         z = t << o;                                //          z  abcdefgh ijkl---- -0000000 00000000
 14565:         //                                         //      -1<<w  11111111 11110000 00000000 00000000
 14566:         //                                         //  -1<<w>>>o  00000001 11111111 11100000 00000000
 14567:         //                                        //~(-1<<w>>>o)  11111110 00000000 00011111 11111111
 14568:         t &= ~(-1 << w >>> o);                     //          t  -------0 00000000 000----- 00000000
 14569:         mmuWriteWordData (a, t >>> 16, XEiJ.regSRS);                         //       <ea>  -------0 00000000 jkl-----
 14570:         mmuWriteByteData (a + 2, t >>> 8, XEiJ.regSRS);                       //       <ea>  -------0 00000000 000-----
 14571:       } else if (z == 3) {
 14572:         //  <ea>{7,19}  o=7,w=32-19=13                      <ea>  -------a bcdefghi jklmnopq rs------
 14573:         int t = mmuModifyLongData (a, XEiJ.regSRS);                           //          t  -------a bcdefghi jklmnopq rs------
 14574:         z = t << o;                                //          z  abcdefgh ijklmnop qrs----- -0000000
 14575:         //                                         //      -1<<w  11111111 11111111 11100000 00000000
 14576:         //                                         //  -1<<w>>>o  00000001 11111111 11111111 11000000
 14577:         //                                        //~(-1<<w>>>o)  11111110 00000000 00000000 00111111
 14578:         mmuWriteLongData (a, t & ~(-1 << w >>> o), XEiJ.regSRS);             //       <ea>  -------0 00000000 00000000 00------
 14579:       } else {
 14580:         //  <ea>{7,26}  o=7,w=32-26=6                       <ea>  -------a bcdefghi jklmnopq rstuvwxy z-------
 14581:         int t = mmuModifyLongData (a, XEiJ.regSRS);                           //          t  -------a bcdefghi jklmnopq rstuvwxy
 14582:         z = t << o;                                //          z  abcdefgh ijklmnop qrstuvwx y0000000
 14583:         //                                                -1>>>o  00000001 11111111 11111111 11111111
 14584:         //                                             ~(-1>>>o)  11111110 00000000 00000000 00000000
 14585:         mmuWriteLongData (a, t & ~(-1 >>> o), XEiJ.regSRS);                  //       <ea>  -------0 00000000 00000000 00000000
 14586:         t = mmuModifyByteZeroData (a + 4, XEiJ.regSRS);                           //          t  00000000 00000000 00000000 z-------
 14587:         //                                         //    t>>>8-o  00000000 00000000 00000000 0z------
 14588:         z |= t >>> 8 - o;                          //          z  abcdefgh ijklmnop qrstuvwx yz------
 14589:         //                                         //  -1<<8-o+w  11111111 11111111 11111111 10000000
 14590:         //                                        //~(-1<<8-o+w)  00000000 00000000 00000000 01111111
 14591:         mmuWriteByteData (a + 4, t & ~(-1 << 8 - o + w), XEiJ.regSRS);        //       <ea>  -------0 00000000 00000000 00000000 0-------
 14592:       }
 14593:     }
 14594:     z >>= w;  //符号拡張。下位のゴミを消す
 14595:     XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X);  //ccr_tst
 14596:   }  //irpBfclr
 14597: 
 14598:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 14599:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 14600:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 14601:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 14602:   //BFFFO <ea>{#o:#w},Dn                            |-|--2346|-|-UUUU|-**00|D M  WXZP |1110_110_111_mmm_rrr-0nnn0ooooo0wwwww
 14603:   //BFFFO <ea>{#o:Dw},Dn                            |-|--2346|-|-UUUU|-**00|D M  WXZP |1110_110_111_mmm_rrr-0nnn0ooooo100www
 14604:   //BFFFO <ea>{Do:#w},Dn                            |-|--2346|-|-UUUU|-**00|D M  WXZP |1110_110_111_mmm_rrr-0nnn100ooo0wwwww
 14605:   //BFFFO <ea>{Do:Dw},Dn                            |-|--2346|-|-UUUU|-**00|D M  WXZP |1110_110_111_mmm_rrr-0nnn100ooo100www
 14606:   public static void irpBfffo () throws M68kException {
 14607:     int w = mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);  //pcwz。拡張ワード
 14608:     if ((w & ~0b0111_111_111_111_111) != 0 ||
 14609:         (w & 0b0000_111_111_000_000) > 0b0000_100_111_000_000 ||
 14610:         (w & 0b0000_000_000_111_111) > 0b0000_000_000_100_111) {
 14611:       M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION;
 14612:       throw M68kException.m6eSignal;
 14613:     }
 14614:     int n = w >> 12;
 14615:     int o = w << 31 - 11 >= 0 ? w >> 6 & 31 : XEiJ.regRn[w >> 6 & 7];  //o=offset
 14616:     w = -(w << 31 - 5 >= 0 ? w : XEiJ.regRn[w & 7]) & 31;  //w=32-width。1<=width<=32なので0<=32-width<=31
 14617:     XEiJ.mpuCycleCount += 9;
 14618:     int ea = XEiJ.regOC & 63;
 14619:     int z;
 14620:     if (ea < XEiJ.EA_AR) {  //BFFFO Dr{~}
 14621:       z = XEiJ.regRn[ea];
 14622:       z = z << o | z >>> -o;  //下位からはみ出したフィールドは上位に戻る
 14623:     } else {  //BFFFO <mem>{~}
 14624:       int a = efaCntLong (ea) + (o >> 3);  //フィールドの最上位ビットを含むバイトのアドレス
 14625:       int o7 = o & 7;
 14626:       z = 31 - w + o7 >> 3;  //フィールドが跨ぐバイト境界の数。0~4
 14627:       z = (z == 0 ? mmuReadByteSignData (a, XEiJ.regSRS) << 24 + o7 :  //不要なバイトにアクセスしない
 14628:            z == 1 ? mmuReadWordSignData (a, XEiJ.regSRS) << 16 + o7 :  //020以上なのでアドレスエラーは出ない
 14629:            z == 2 ? (mmuReadWordSignData (a, XEiJ.regSRS) << 8 | mmuReadByteZeroData (a + 2, XEiJ.regSRS)) << 8 + o7 :
 14630:            z == 3 ? mmuReadLongData (a, XEiJ.regSRS) << o7 :
 14631:            mmuReadLongData (a, XEiJ.regSRS) << o7 | mmuReadByteZeroData (a + 4, XEiJ.regSRS) >>> 8 - o7);
 14632:     }
 14633:     if (true) {
 14634:       XEiJ.regRn[n] = Integer.numberOfLeadingZeros (z >>> w) - w + o;  //ゼロ拡張してから1のビットを探す。見つからないときはoffset+widthになる
 14635:     } else {
 14636:       int t = z >>> w;
 14637:       if (t == 0) {
 14638:         XEiJ.regRn[n] = 32 - w + o;
 14639:       } else {
 14640:         int k = -(t >>> 16) >> 16 & 16;
 14641:         k += -(t >>> k + 8) >> 8 & 8;
 14642:         k += -(t >>> k + 4) >> 4 & 4;
 14643:         //     bit3  1  1  1  1  1  1  1  1  0  0  0  0  0  0  0  0
 14644:         //     bit2  1  1  1  1  0  0  0  0  1  1  1  1  0  0  0  0
 14645:         //     bit1  1  1  0  0  1  1  0  0  1  1  0  0  1  1  0  0
 14646:         //     bit0  1  0  1  0  1  0  1  0  1  0  1  0  1  0  1  0
 14647:         XEiJ.regRn[n] = ((0b11_11_11_11_11_11_11_11_10_10_10_10_01_01_00_00 >>> (t >>> k << 1)) & 3) + k - w + o;  //intのシフトカウントは下位5bitだけが使用される
 14648:       }
 14649:     }
 14650:     z >>= w;  //符号拡張。下位のゴミを消す
 14651:     XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X);  //ccr_tst
 14652:   }  //irpBfffo
 14653: 
 14654:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 14655:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 14656:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 14657:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 14658:   //BFSET <ea>{#o:#w}                               |-|--2346|-|-UUUU|-**00|D M  WXZ  |1110_111_011_mmm_rrr-00000ooooo0wwwww
 14659:   //BFSET <ea>{#o:Dw}                               |-|--2346|-|-UUUU|-**00|D M  WXZ  |1110_111_011_mmm_rrr-00000ooooo100www
 14660:   //BFSET <ea>{Do:#w}                               |-|--2346|-|-UUUU|-**00|D M  WXZ  |1110_111_011_mmm_rrr-0000100ooo0wwwww
 14661:   //BFSET <ea>{Do:Dw}                               |-|--2346|-|-UUUU|-**00|D M  WXZ  |1110_111_011_mmm_rrr-0000100ooo100www
 14662:   public static void irpBfset () throws M68kException {
 14663:     int w = mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);  //pcwz。拡張ワード
 14664:     if ((w & ~0b0000_111_111_111_111) != 0 ||
 14665:         (w & 0b0000_111_111_000_000) > 0b0000_100_111_000_000 ||
 14666:         (w & 0b0000_000_000_111_111) > 0b0000_000_000_100_111) {
 14667:       M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION;
 14668:       throw M68kException.m6eSignal;
 14669:     }
 14670:     int o = w << 31 - 11 >= 0 ? w >> 6 & 31 : XEiJ.regRn[w >> 6 & 7];  //o=offset
 14671:     w = -(w << 31 - 5 >= 0 ? w : XEiJ.regRn[w & 7]) & 31;  //w=32-width。1<=width<=32なので0<=32-width<=31
 14672:     XEiJ.mpuCycleCount += 8;
 14673:     int ea = XEiJ.regOC & 63;
 14674:     int z;
 14675:     if (ea < XEiJ.EA_AR) {  //BFSET Dr{~}
 14676:       z = XEiJ.regRn[ea];
 14677:       z = z << o | z >>> -o;  //下位からはみ出したフィールドは上位に戻る
 14678:       int t = z | -1 << w;  //フィールドの幅だけ1を並べる
 14679:       XEiJ.regRn[ea] = t << -o | t >>> o;
 14680:     } else {  //BFSET <mem>{~}
 14681:       int a = efaCltLong (ea) + (o >> 3);  //フィールドの最上位ビットを含むバイトのアドレス
 14682:       o &= 7;
 14683:       z = 31 - w + o >> 3;  //フィールドが跨ぐバイト境界の数。0~4
 14684:       if (z == 0) {
 14685:         //  <ea>{2,5}  o=2,w=32-5=27                        <ea>  --abcde-
 14686:         int t = mmuModifyByteSignData (a, XEiJ.regSRS) << 24;                     //          t  --abcde- 00000000 00000000 00000000  不要なバイトにアクセスしない
 14687:         z = t << o;                                //          z  abcde-00 00000000 00000000 00000000
 14688:         //                                         //      -1<<w  11111000 00000000 00000000 00000000
 14689:         //                                         //  -1<<w>>>o  00111110 00000000 00000000 00000000
 14690:         //                                         //t|-1<<w>>>o  --11111- 00000000 00000000 00000000
 14691:         mmuWriteByteData (a, (t | -1 << w >>> o) >>> 24, XEiJ.regSRS);        //       <ea>  --11111-
 14692:       } else if (z == 1) {
 14693:         //  <ea>{7,5}  o=7,w=32-5=27                        <ea>  -------a bcde----
 14694:         int t = mmuModifyWordSignData (a, XEiJ.regSRS) << 16;                     //          t  -------a bcde---- 00000000 00000000  020以上なのでアドレスエラーは出ない
 14695:         z = t << o;                                //          z  abcde--- -0000000 00000000 00000000
 14696:         //                                         //      -1<<w  11111000 00000000 00000000 00000000
 14697:         //                                         //  -1<<w>>>o  00000001 11110000 00000000 00000000
 14698:         //                                         //t|-1<<w>>>o  -------1 1111---- 00000000 00000000
 14699:         mmuWriteWordData (a, (t | -1 << w >>> o) >>> 16, XEiJ.regSRS);       //       <ea>  -------1 1111----
 14700:       } else if (z == 2) {
 14701:         //  <ea>{7,12}  o=7,w=32-12=20                      <ea>  -------a bcdefghi jkl-----
 14702:         int t = mmuModifyWordSignData (a, XEiJ.regSRS) << 16 | mmuModifyByteZeroData (a + 2, XEiJ.regSRS) << 8;  //          t  -------a bcdefghi jkl----- 00000000
 14703:         z = t << o;                                //          z  abcdefgh ijkl---- -0000000 00000000
 14704:         //                                         //      -1<<w  11111111 11110000 00000000 00000000
 14705:         //                                         //  -1<<w>>>o  00000001 11111111 11100000 00000000
 14706:         t |= -1 << w >>> o;                        //          t  -------1 11111111 111----- 00000000
 14707:         mmuWriteWordData (a, t >>> 16, XEiJ.regSRS);                         //       <ea>  -------1 11111111 jkl-----
 14708:         mmuWriteByteData (a + 2, t >>> 8, XEiJ.regSRS);                       //       <ea>  -------1 11111111 111-----
 14709:       } else if (z == 3) {
 14710:         //  <ea>{7,19}  o=7,w=32-19=13                      <ea>  -------a bcdefghi jklmnopq rs------
 14711:         int t = mmuModifyLongData (a, XEiJ.regSRS);                           //          t  -------a bcdefghi jklmnopq rs------
 14712:         z = t << o;                                //          z  abcdefgh ijklmnop qrs----- -0000000
 14713:         //                                         //      -1<<w  11111111 11111111 11100000 00000000
 14714:         //                                         //  -1<<w>>>o  00000001 11111111 11111111 11000000
 14715:         mmuWriteLongData (a, t | -1 << w >>> o, XEiJ.regSRS);                //       <ea>  -------1 11111111 11111111 11------
 14716:       } else {
 14717:         //  <ea>{7,26}  o=7,w=32-26=6                       <ea>  -------a bcdefghi jklmnopq rstuvwxy z-------
 14718:         int t = mmuModifyLongData (a, XEiJ.regSRS);                           //          t  -------a bcdefghi jklmnopq rstuvwxy
 14719:         z = t << o;                                //          z  abcdefgh ijklmnop qrstuvwx y0000000
 14720:         //                                                -1>>>o  00000001 11111111 11111111 11111111
 14721:         mmuWriteLongData (a, t | -1 >>> o, XEiJ.regSRS);                     //       <ea>  -------1 11111111 11111111 11111111
 14722:         t = mmuModifyByteZeroData (a + 4, XEiJ.regSRS);                           //          t  00000000 00000000 00000000 z-------
 14723:         //                                         //    t>>>8-o  00000000 00000000 00000000 0z------
 14724:         z |= t >>> 8 - o;                          //          z  abcdefgh ijklmnop qrstuvwx yz------
 14725:         //                                         //  -1<<8-o+w  11111111 11111111 11111111 10000000
 14726:         mmuWriteByteData (a + 4, t | -1 << 8 - o + w, XEiJ.regSRS);           //       <ea>  -------1 11111111 11111111 11111111 1-------
 14727:       }
 14728:     }
 14729:     z >>= w;  //符号拡張。下位のゴミを消す
 14730:     XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X);  //ccr_tst
 14731:   }  //irpBfset
 14732: 
 14733:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 14734:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 14735:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 14736:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 14737:   //BFINS Dn,<ea>{#o:#w}                            |-|--2346|-|-UUUU|-**00|D M  WXZ  |1110_111_111_mmm_rrr-0nnn0ooooo0wwwww
 14738:   //BFINS Dn,<ea>{#o:Dw}                            |-|--2346|-|-UUUU|-**00|D M  WXZ  |1110_111_111_mmm_rrr-0nnn0ooooo100www
 14739:   //BFINS Dn,<ea>{Do:#w}                            |-|--2346|-|-UUUU|-**00|D M  WXZ  |1110_111_111_mmm_rrr-0nnn100ooo0wwwww
 14740:   //BFINS Dn,<ea>{Do:Dw}                            |-|--2346|-|-UUUU|-**00|D M  WXZ  |1110_111_111_mmm_rrr-0nnn100ooo100www
 14741:   public static void irpBfins () throws M68kException {
 14742:     int w = mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);  //pcwz。拡張ワード
 14743:     if ((w & ~0b0111_111_111_111_111) != 0 ||
 14744:         (w & 0b0000_111_111_000_000) > 0b0000_100_111_000_000 ||
 14745:         (w & 0b0000_000_000_111_111) > 0b0000_000_000_100_111) {
 14746:       M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION;
 14747:       throw M68kException.m6eSignal;
 14748:     }
 14749:     int n = w >> 12;
 14750:     int o = w << 31 - 11 >= 0 ? w >> 6 & 31 : XEiJ.regRn[w >> 6 & 7];  //o=offset
 14751:     w = -(w << 31 - 5 >= 0 ? w : XEiJ.regRn[w & 7]) & 31;  //w=32-width。1<=width<=32なので0<=32-width<=31
 14752:     XEiJ.mpuCycleCount += 6;
 14753:     int ea = XEiJ.regOC & 63;
 14754:     int z = XEiJ.regRn[n] << w;  //z=Dn<<-width
 14755:     if (ea < XEiJ.EA_AR) {  //BFINS Dn,Dr{~}
 14756:       //  Dr{30,5}  o=30,w=32-5=27                          t=Dr  cde----- -------- -------- ------ab
 14757:       //                                                    t<<o  ab000000 00000000 00000000 00000000
 14758:       //                                                  t>>>-o  00cde--- -------- -------- --------
 14759:       //                                             t<<o|t>>>-o  abcde--- -------- -------- --------
 14760:       //                                                   -1<<w  11111000 00000000 00000000 00000000
 14761:       //                                                ~(-1<<w)  00000111 11111111 11111111 11111111
 14762:       //                                  (t<<o|t>>>-o)&~(-1<<w)  00000--- -------- -------- --------
 14763:       //                                                    r[n]  -------- -------- -------- ---ABCDE
 14764:       //                                               z=r[n]<<w  ABCDE000 00000000 00000000 00000000
 14765:       //                              t=(t<<o|t>>>-o)&~(-1<<w)|z  ABCDE--- -------- -------- --------
 14766:       //                                                   t<<-o  CDE----- -------- -------- ------00
 14767:       //                                                   t>>>o  00000000 00000000 00000000 000000AB
 14768:       //                                             t<<-o|t>>>o  CDE----- -------- -------- ------AB
 14769:       int t = XEiJ.regRn[ea];
 14770:       t = (t << o | t >>> -o) & ~(-1 << w) | z;
 14771:       XEiJ.regRn[ea] = t << -o | t >>> o;
 14772:     } else {  //BFINS Dn,<mem>{~}
 14773:       int a = efaCltLong (ea) + (o >> 3);  //フィールドの最上位ビットを含むバイトのアドレス
 14774:       o &= 7;
 14775:       n = 31 - w + o >> 3;  //フィールドが跨ぐバイト境界の数。0~4
 14776:       if (n == 0) {
 14777:         //  <ea>{2,5}  o=2,w=32-5=27                        <ea>  --abcde-
 14778:         //                                         XEiJ.busRbs(a)<<24  --abcde- 00000000 00000000 00000000
 14779:         //                                                 -1<<w  11111000 00000000 00000000 00000000
 14780:         //                                             -1<<w>>>o  00111110 00000000 00000000 00000000
 14781:         //                                          ~(-1<<w>>>o)  11000001 11111111 11111111 11111111
 14782:         //                            XEiJ.busRbs(a)<<24&~(-1<<w>>>o)  --00000- 00000000 00000000 00000000
 14783:         //                                                  r[n]  -------- -------- -------- ---ABCDE
 14784:         //                                             z=r[n]<<w  ABCDE000 00000000 00000000 00000000
 14785:         //                                                 z>>>o  00ABCDE0 00000000 00000000 00000000
 14786:         //                      XEiJ.busRbs(a)<<24&~(-1<<w>>>o)|z>>>o  --ABCDE- 00000000 00000000 00000000
 14787:         mmuWriteByteData (a, (mmuModifyByteSignData (a, XEiJ.regSRS) << 24 & ~(-1 << w >>> o) | z >>> o) >>> 24, XEiJ.regSRS);
 14788:       } else if (n == 1) {
 14789:         //  <ea>{3,11}  o=3,w=32-11=21                      <ea>  ---abcde fghijk--
 14790:         //                                            rws(a)<<16  ---abcde fghijk-- 00000000 00000000
 14791:         //                                                 -1<<w  11111111 11100000 00000000 00000000
 14792:         //                                             -1<<w>>>o  00011111 11111100 00000000 00000000
 14793:         //                                          ~(-1<<w>>>o)  11100000 00000011 11111111 11111111
 14794:         //                               rws(a)<<16&~(-1<<w>>>o)  ---00000 000000-- 00000000 00000000
 14795:         //                                                  r[n]  -------- -------- -----ABC DEFGHIJK
 14796:         //                                             z=r[n]<<w  ABCDEFGH IJK00000 00000000 00000000
 14797:         //                                                 z>>>o  000ABCDE FGHIJK00 00000000 00000000
 14798:         //                         rws(a)<<16&~(-1<<w>>>o)|z>>>o  ---ABCDE FGHIJK-- 00000000 00000000
 14799:         mmuWriteWordData (a, (mmuModifyWordSignData (a, XEiJ.regSRS) << 16 & ~(-1 << w >>> o) | z >>> o) >>> 16, XEiJ.regSRS);
 14800:       } else if (n == 2) {
 14801:         //  <ea>{4,17}  o=4,w=32-17=15                      <ea>  ----abcd efghijkl mnopq---
 14802:         //                                rws(a)<<16|rbz(a+2)<<8  ----abcd efghijkl mnopq--- 00000000
 14803:         //                                                 -1<<w  11111111 11111111 10000000 00000000
 14804:         //                                             -1<<w>>>o  00001111 11111111 11111000 00000000
 14805:         //                                          ~(-1<<w>>>o)  11110000 00000000 00000111 11111111
 14806:         //                 (rws(a)<<16|rbz(a+2)<<8)&~(-1<<w>>>o)  ----0000 00000000 00000--- 00000000
 14807:         //                                                  r[n]  -------- -------A BCDEFGHI JKLMNOPQ
 14808:         //                                             z=r[n]<<w  ABCDEFGH IJKLMNOP Q0000000 00000000
 14809:         //                                                 z>>>o  0000ABCD EFGHIJKL MNOPQ000 00000000
 14810:         //           (rws(a)<<16|rbz(a+2)<<8)&~(-1<<w>>>o)|z>>>o  ----ABCD EFGHIJKL MNOPQ--- 00000000
 14811:         int t = (mmuModifyWordSignData (a, XEiJ.regSRS) << 16 | mmuModifyByteZeroData (a + 2, XEiJ.regSRS) << 8) & ~(-1 << w >>> o) | z >>> o;
 14812:         mmuWriteWordData (a, t >>> 16, XEiJ.regSRS);
 14813:         mmuWriteByteData (a + 2, t >>> 8, XEiJ.regSRS);
 14814:       } else if (n == 3) {
 14815:         //  <ea>{5,23}  o=5,w=32-23=9                       <ea>  -----abc defghijk lmnopqrs tuvw----
 14816:         //                                                rls(a)  -----abc defghijk lmnopqrs tuvw----
 14817:         //                                                 -1<<w  11111111 11111111 11111110 00000000
 14818:         //                                             -1<<w>>>o  00000111 11111111 11111111 11110000
 14819:         //                                          ~(-1<<w>>>o)  11111000 00000000 00000000 00001111
 14820:         //                                   rls(a)&~(-1<<w>>>o)  -----000 00000000 00000000 0000----
 14821:         //                                                  r[n]  -------- -ABCDEFG HIJKLMNO PQRSTUVW
 14822:         //                                             z=r[n]<<w  ABCDEFGH IJKLMNOP QRSTUVW0 00000000
 14823:         //                                                 z>>>o  00000ABC DEFGHIJK LMNOPQRS TUVW0000
 14824:         //                             rls(a)&~(-1<<w>>>o)|z>>>o  -----ABC DEFGHIJK LMNOPQRS TUVW----
 14825:         mmuWriteLongData (a, mmuModifyLongData (a, XEiJ.regSRS) & ~(-1 << w >>> o) | z >>> o, XEiJ.regSRS);
 14826:       } else {
 14827:         //  <ea>{6,29}  o=6,w=32-29=3                       <ea>  ------ab cdefghij klmnopqr stuvwxyz abc-----
 14828:         //                                                rls(a)  ------ab cdefghij klmnopqr stuvwxyz
 14829:         //                                                -1>>>o  00000011 11111111 11111111 11111111
 14830:         //                                             ~(-1>>>o)  11111100 00000000 00000000 00000000
 14831:         //                                      rls(a)&~(-1>>>o)  ------00 00000000 00000000 00000000
 14832:         //                                                  r[n]  ---ABCDE FGHIJKLM NOPQRSTU VWXYZABC
 14833:         //                                             z=r[n]<<w  ABCDEFGH IJKLMNOP QRSTUVWX YZABC000
 14834:         //                                                 z>>>o  000000AB CDEFGHIJ KLMNOPQR STUVWXYZ
 14835:         //                                rls(a)&~(-1>>>o)|z>>>o  ------AB CDEFGHIJ KLMNOPQR STUVWXYZ
 14836:         mmuWriteLongData (a, mmuModifyLongData (a, XEiJ.regSRS) & ~(-1 >>> o) | z >>> o, XEiJ.regSRS);
 14837:         //                                              rbz(a+4)  00000000 00000000 00000000 abc-----
 14838:         //                                             -1<<8-o+w  11111111 11111111 11111111 11100000
 14839:         //                                          ~(-1<<8-o+w)  00000000 00000000 00000000 00011111
 14840:         //                                 rbz(a+4)&~(-1<<8-o+w)  00000000 00000000 00000000 000-----
 14841:         //                                                z<<8-o  CDEFGHIJ KLMNOPQR STUVWXYZ ABC00000
 14842:         //                          rbz(a+4)&~(-1<<8-o+w)|z<<8-o  CDEFGHIJ KLMNOPQR STUVWXYZ ABC-----
 14843:         mmuWriteByteData (a + 4, mmuModifyByteZeroData (a + 4, XEiJ.regSRS) & ~(-1 << 8 - o + w) | z << 8 - o, XEiJ.regSRS);
 14844:       }
 14845:     }
 14846:     //zは上位に寄ったままだが下位の空きは0なのでそのままテストする
 14847:     XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X);  //ccr_tst
 14848:   }  //irpBfins
 14849: 
 14850:   //浮動小数点例外
 14851:   //  48  BSUN   FP分岐または比較不能状態でのセット
 14852:   //  49  INEX   FP不正確な結果
 14853:   //  50  DZ     FPゼロによる除算
 14854:   //  51  UNFL   FPアンダーフロー
 14855:   //  52  OPERR  FPオペランドエラー
 14856:   //  53  OVFL   FPオーバーフロー
 14857:   //  54  SNAN   FPシグナリングNAN
 14858:   //  55         FP未実装データ型
 14859:   //FPSRのビットオフセット→例外ベクタ番号
 14860: /*
 14861:   public static final int[] FP_OFFSET_TO_NUMBER = {
 14862:     0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 14863:     48,  //16  15  BSUN   48  BSUN   FP分岐または比較不能状態でのセット
 14864:     54,  //17  14  SNAN   54  SNAN   FPシグナリングNAN
 14865:     52,  //18  13  OPERR  52  OPERR  FPオペランドエラー
 14866:     53,  //19  12  OVFL   53  OVFL   FPオーバーフロー
 14867:     51,  //20  11  UNFL   51  UNFL   FPアンダーフロー
 14868:     50,  //21  10  DZ     50  DZ     FPゼロによる除算
 14869:     49,  //22   9  INEX2  49  INEX   FP不正確な結果
 14870:     49,  //23   8  INEX1  49  INEX   FP不正確な結果
 14871:     0, 0, 0, 0, 0, 0, 0, 0,
 14872:   };
 14873: */
 14874:   public static final byte[] FP_OFFSET_TO_NUMBER = "\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\00006453211\0\0\0\0\0\0\0\0".getBytes (XEiJ.ISO_8859_1);
 14875: 
 14876:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 14877:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 14878:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 14879:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 14880:   //FTST.X FPm                                      |-|--CC46|-|-----|-----|          |1111_001_000_000_000-000mmm0000111010
 14881:   //FMOVE.X FPm,FPn                                 |-|--CC46|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0000000
 14882:   //FINT.X FPm,FPn                                  |-|--CCS6|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0000001
 14883:   //FSINH.X FPm,FPn                                 |-|--CCSS|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0000010
 14884:   //FINTRZ.X FPm,FPn                                |-|--CCS6|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0000011
 14885:   //FSQRT.X FPm,FPn                                 |-|--CC46|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0000100
 14886:   //FLOGNP1.X FPm,FPn                               |-|--CCSS|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0000110
 14887:   //FETOXM1.X FPm,FPn                               |-|--CCSS|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0001000
 14888:   //FTANH.X FPm,FPn                                 |-|--CCSS|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0001001
 14889:   //FATAN.X FPm,FPn                                 |-|--CCSS|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0001010
 14890:   //FASIN.X FPm,FPn                                 |-|--CCSS|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0001100
 14891:   //FATANH.X FPm,FPn                                |-|--CCSS|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0001101
 14892:   //FSIN.X FPm,FPn                                  |-|--CCSS|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0001110
 14893:   //FTAN.X FPm,FPn                                  |-|--CCSS|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0001111
 14894:   //FETOX.X FPm,FPn                                 |-|--CCSS|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0010000
 14895:   //FTWOTOX.X FPm,FPn                               |-|--CCSS|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0010001
 14896:   //FTENTOX.X FPm,FPn                               |-|--CCSS|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0010010
 14897:   //FLOGN.X FPm,FPn                                 |-|--CCSS|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0010100
 14898:   //FLOG10.X FPm,FPn                                |-|--CCSS|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0010101
 14899:   //FLOG2.X FPm,FPn                                 |-|--CCSS|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0010110
 14900:   //FABS.X FPm,FPn                                  |-|--CC46|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0011000
 14901:   //FCOSH.X FPm,FPn                                 |-|--CCSS|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0011001
 14902:   //FNEG.X FPm,FPn                                  |-|--CC46|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0011010
 14903:   //FACOS.X FPm,FPn                                 |-|--CCSS|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0011100
 14904:   //FCOS.X FPm,FPn                                  |-|--CCSS|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0011101
 14905:   //FGETEXP.X FPm,FPn                               |-|--CCSS|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0011110
 14906:   //FGETMAN.X FPm,FPn                               |-|--CCSS|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0011111
 14907:   //FDIV.X FPm,FPn                                  |-|--CC46|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0100000
 14908:   //FMOD.X FPm,FPn                                  |-|--CCSS|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0100001
 14909:   //FADD.X FPm,FPn                                  |-|--CC46|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0100010
 14910:   //FMUL.X FPm,FPn                                  |-|--CC46|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0100011
 14911:   //FSGLDIV.X FPm,FPn                               |-|--CCS6|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0100100
 14912:   //FREM.X FPm,FPn                                  |-|--CCSS|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0100101
 14913:   //FSCALE.X FPm,FPn                                |-|--CCSS|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0100110
 14914:   //FSGLMUL.X FPm,FPn                               |-|--CCS6|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0100111
 14915:   //FSUB.X FPm,FPn                                  |-|--CC46|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0101000
 14916:   //FCMP.X FPm,FPn                                  |-|--CC46|-|-----|-----|          |1111_001_000_000_000-000mmmnnn0111000
 14917:   //FSMOVE.X FPm,FPn                                |-|----46|-|-----|-----|          |1111_001_000_000_000-000mmmnnn1000000
 14918:   //FSSQRT.X FPm,FPn                                |-|----46|-|-----|-----|          |1111_001_000_000_000-000mmmnnn1000001
 14919:   //FDMOVE.X FPm,FPn                                |-|----46|-|-----|-----|          |1111_001_000_000_000-000mmmnnn1000100
 14920:   //FDSQRT.X FPm,FPn                                |-|----46|-|-----|-----|          |1111_001_000_000_000-000mmmnnn1000101
 14921:   //FSABS.X FPm,FPn                                 |-|----46|-|-----|-----|          |1111_001_000_000_000-000mmmnnn1011000
 14922:   //FSNEG.X FPm,FPn                                 |-|----46|-|-----|-----|          |1111_001_000_000_000-000mmmnnn1011010
 14923:   //FDABS.X FPm,FPn                                 |-|----46|-|-----|-----|          |1111_001_000_000_000-000mmmnnn1011100
 14924:   //FDNEG.X FPm,FPn                                 |-|----46|-|-----|-----|          |1111_001_000_000_000-000mmmnnn1011110
 14925:   //FSDIV.X FPm,FPn                                 |-|----46|-|-----|-----|          |1111_001_000_000_000-000mmmnnn1100000
 14926:   //FSADD.X FPm,FPn                                 |-|----46|-|-----|-----|          |1111_001_000_000_000-000mmmnnn1100010
 14927:   //FSMUL.X FPm,FPn                                 |-|----46|-|-----|-----|          |1111_001_000_000_000-000mmmnnn1100011
 14928:   //FDDIV.X FPm,FPn                                 |-|----46|-|-----|-----|          |1111_001_000_000_000-000mmmnnn1100100
 14929:   //FDADD.X FPm,FPn                                 |-|----46|-|-----|-----|          |1111_001_000_000_000-000mmmnnn1100110
 14930:   //FDMUL.X FPm,FPn                                 |-|----46|-|-----|-----|          |1111_001_000_000_000-000mmmnnn1100111
 14931:   //FSSUB.X FPm,FPn                                 |-|----46|-|-----|-----|          |1111_001_000_000_000-000mmmnnn1101000
 14932:   //FDSUB.X FPm,FPn                                 |-|----46|-|-----|-----|          |1111_001_000_000_000-000mmmnnn1101100
 14933:   //FSINCOS.X FPm,FPc:FPs                           |-|--CCSS|-|-----|-----|          |1111_001_000_000_000-000mmmsss0110ccc
 14934:   //FMOVECR.X #ccc,FPn                              |-|--CCSS|-|-----|-----|          |1111_001_000_000_000-010111nnn0cccccc
 14935:   //FMOVE.L FPn,<ea>                                |-|--CC46|-|-----|-----|D M+-WXZ  |1111_001_000_mmm_rrr-011000nnn0000000
 14936:   //FMOVE.S FPn,<ea>                                |-|--CC46|-|-----|-----|D M+-WXZ  |1111_001_000_mmm_rrr-011001nnn0000000
 14937:   //FMOVE.W FPn,<ea>                                |-|--CC46|-|-----|-----|D M+-WXZ  |1111_001_000_mmm_rrr-011100nnn0000000
 14938:   //FMOVE.B FPn,<ea>                                |-|--CC46|-|-----|-----|D M+-WXZ  |1111_001_000_mmm_rrr-011110nnn0000000
 14939:   //FMOVE.L FPIAR,<ea>                              |-|--CC46|-|-----|-----|DAM+-WXZ  |1111_001_000_mmm_rrr-1010010000000000
 14940:   //FMOVEM.L FPIAR,<ea>                             |-|--CC46|-|-----|-----|DAM+-WXZ  |1111_001_000_mmm_rrr-1010010000000000
 14941:   //FMOVE.L FPSR,<ea>                               |-|--CC46|-|-----|-----|D M+-WXZ  |1111_001_000_mmm_rrr-1010100000000000
 14942:   //FMOVEM.L FPSR,<ea>                              |-|--CC46|-|-----|-----|D M+-WXZ  |1111_001_000_mmm_rrr-1010100000000000
 14943:   //FMOVE.L FPCR,<ea>                               |-|--CC46|-|-----|-----|D M+-WXZ  |1111_001_000_mmm_rrr-1011000000000000
 14944:   //FMOVEM.L FPCR,<ea>                              |-|--CC46|-|-----|-----|D M+-WXZ  |1111_001_000_mmm_rrr-1011000000000000
 14945:   //FTST.L <ea>                                     |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-0100000000111010
 14946:   //FMOVE.L <ea>,FPn                                |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0000000
 14947:   //FINT.L <ea>,FPn                                 |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0000001
 14948:   //FSINH.L <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0000010
 14949:   //FINTRZ.L <ea>,FPn                               |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0000011
 14950:   //FSQRT.L <ea>,FPn                                |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0000100
 14951:   //FLOGNP1.L <ea>,FPn                              |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0000110
 14952:   //FETOXM1.L <ea>,FPn                              |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0001000
 14953:   //FTANH.L <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0001001
 14954:   //FATAN.L <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0001010
 14955:   //FASIN.L <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0001100
 14956:   //FATANH.L <ea>,FPn                               |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0001101
 14957:   //FSIN.L <ea>,FPn                                 |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0001110
 14958:   //FTAN.L <ea>,FPn                                 |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0001111
 14959:   //FETOX.L <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0010000
 14960:   //FTWOTOX.L <ea>,FPn                              |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0010001
 14961:   //FTENTOX.L <ea>,FPn                              |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0010010
 14962:   //FLOGN.L <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0010100
 14963:   //FLOG10.L <ea>,FPn                               |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0010101
 14964:   //FLOG2.L <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0010110
 14965:   //FABS.L <ea>,FPn                                 |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0011000
 14966:   //FCOSH.L <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0011001
 14967:   //FNEG.L <ea>,FPn                                 |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0011010
 14968:   //FACOS.L <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0011100
 14969:   //FCOS.L <ea>,FPn                                 |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0011101
 14970:   //FGETEXP.L <ea>,FPn                              |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0011110
 14971:   //FGETMAN.L <ea>,FPn                              |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0011111
 14972:   //FDIV.L <ea>,FPn                                 |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0100000
 14973:   //FMOD.L <ea>,FPn                                 |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0100001
 14974:   //FADD.L <ea>,FPn                                 |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0100010
 14975:   //FMUL.L <ea>,FPn                                 |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0100011
 14976:   //FSGLDIV.L <ea>,FPn                              |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0100100
 14977:   //FREM.L <ea>,FPn                                 |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0100101
 14978:   //FSCALE.L <ea>,FPn                               |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0100110
 14979:   //FSGLMUL.L <ea>,FPn                              |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0100111
 14980:   //FSUB.L <ea>,FPn                                 |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0101000
 14981:   //FCMP.L <ea>,FPn                                 |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0111000
 14982:   //FSMOVE.L <ea>,FPn                               |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn1000000
 14983:   //FSSQRT.L <ea>,FPn                               |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn1000001
 14984:   //FDMOVE.L <ea>,FPn                               |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn1000100
 14985:   //FDSQRT.L <ea>,FPn                               |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn1000101
 14986:   //FSABS.L <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn1011000
 14987:   //FSNEG.L <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn1011010
 14988:   //FDABS.L <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn1011100
 14989:   //FDNEG.L <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn1011110
 14990:   //FSDIV.L <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn1100000
 14991:   //FSADD.L <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn1100010
 14992:   //FSMUL.L <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn1100011
 14993:   //FDDIV.L <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn1100100
 14994:   //FDADD.L <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn1100110
 14995:   //FDMUL.L <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn1100111
 14996:   //FSSUB.L <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn1101000
 14997:   //FDSUB.L <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn1101100
 14998:   //FSINCOS.L <ea>,FPc:FPs                          |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000sss0110ccc
 14999:   //FTST.S <ea>                                     |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-0100010000111010
 15000:   //FMOVE.S <ea>,FPn                                |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0000000
 15001:   //FINT.S <ea>,FPn                                 |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0000001
 15002:   //FSINH.S <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0000010
 15003:   //FINTRZ.S <ea>,FPn                               |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0000011
 15004:   //FSQRT.S <ea>,FPn                                |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0000100
 15005:   //FLOGNP1.S <ea>,FPn                              |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0000110
 15006:   //FETOXM1.S <ea>,FPn                              |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0001000
 15007:   //FTANH.S <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0001001
 15008:   //FATAN.S <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0001010
 15009:   //FASIN.S <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0001100
 15010:   //FATANH.S <ea>,FPn                               |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0001101
 15011:   //FSIN.S <ea>,FPn                                 |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0001110
 15012:   //FTAN.S <ea>,FPn                                 |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0001111
 15013:   //FETOX.S <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0010000
 15014:   //FTWOTOX.S <ea>,FPn                              |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0010001
 15015:   //FTENTOX.S <ea>,FPn                              |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0010010
 15016:   //FLOGN.S <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0010100
 15017:   //FLOG10.S <ea>,FPn                               |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0010101
 15018:   //FLOG2.S <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0010110
 15019:   //FABS.S <ea>,FPn                                 |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0011000
 15020:   //FCOSH.S <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0011001
 15021:   //FNEG.S <ea>,FPn                                 |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0011010
 15022:   //FACOS.S <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0011100
 15023:   //FCOS.S <ea>,FPn                                 |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0011101
 15024:   //FGETEXP.S <ea>,FPn                              |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0011110
 15025:   //FGETMAN.S <ea>,FPn                              |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0011111
 15026:   //FDIV.S <ea>,FPn                                 |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0100000
 15027:   //FMOD.S <ea>,FPn                                 |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0100001
 15028:   //FADD.S <ea>,FPn                                 |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0100010
 15029:   //FMUL.S <ea>,FPn                                 |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0100011
 15030:   //FSGLDIV.S <ea>,FPn                              |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0100100
 15031:   //FREM.S <ea>,FPn                                 |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0100101
 15032:   //FSCALE.S <ea>,FPn                               |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0100110
 15033:   //FSGLMUL.S <ea>,FPn                              |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0100111
 15034:   //FSUB.S <ea>,FPn                                 |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0101000
 15035:   //FCMP.S <ea>,FPn                                 |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0111000
 15036:   //FSMOVE.S <ea>,FPn                               |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn1000000
 15037:   //FSSQRT.S <ea>,FPn                               |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn1000001
 15038:   //FDMOVE.S <ea>,FPn                               |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn1000100
 15039:   //FDSQRT.S <ea>,FPn                               |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn1000101
 15040:   //FSABS.S <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn1011000
 15041:   //FSNEG.S <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn1011010
 15042:   //FDABS.S <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn1011100
 15043:   //FDNEG.S <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn1011110
 15044:   //FSDIV.S <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn1100000
 15045:   //FSADD.S <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn1100010
 15046:   //FSMUL.S <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn1100011
 15047:   //FDDIV.S <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn1100100
 15048:   //FDADD.S <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn1100110
 15049:   //FDMUL.S <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn1100111
 15050:   //FSSUB.S <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn1101000
 15051:   //FDSUB.S <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn1101100
 15052:   //FSINCOS.S <ea>,FPc:FPs                          |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001sss0110ccc
 15053:   //FTST.W <ea>                                     |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-0101000000111010
 15054:   //FMOVE.W <ea>,FPn                                |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0000000
 15055:   //FINT.W <ea>,FPn                                 |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0000001
 15056:   //FSINH.W <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0000010
 15057:   //FINTRZ.W <ea>,FPn                               |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0000011
 15058:   //FSQRT.W <ea>,FPn                                |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0000100
 15059:   //FLOGNP1.W <ea>,FPn                              |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0000110
 15060:   //FETOXM1.W <ea>,FPn                              |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0001000
 15061:   //FTANH.W <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0001001
 15062:   //FATAN.W <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0001010
 15063:   //FASIN.W <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0001100
 15064:   //FATANH.W <ea>,FPn                               |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0001101
 15065:   //FSIN.W <ea>,FPn                                 |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0001110
 15066:   //FTAN.W <ea>,FPn                                 |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0001111
 15067:   //FETOX.W <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0010000
 15068:   //FTWOTOX.W <ea>,FPn                              |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0010001
 15069:   //FTENTOX.W <ea>,FPn                              |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0010010
 15070:   //FLOGN.W <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0010100
 15071:   //FLOG10.W <ea>,FPn                               |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0010101
 15072:   //FLOG2.W <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0010110
 15073:   //FABS.W <ea>,FPn                                 |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0011000
 15074:   //FCOSH.W <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0011001
 15075:   //FNEG.W <ea>,FPn                                 |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0011010
 15076:   //FACOS.W <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0011100
 15077:   //FCOS.W <ea>,FPn                                 |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0011101
 15078:   //FGETEXP.W <ea>,FPn                              |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0011110
 15079:   //FGETMAN.W <ea>,FPn                              |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0011111
 15080:   //FDIV.W <ea>,FPn                                 |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0100000
 15081:   //FMOD.W <ea>,FPn                                 |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0100001
 15082:   //FADD.W <ea>,FPn                                 |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0100010
 15083:   //FMUL.W <ea>,FPn                                 |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0100011
 15084:   //FSGLDIV.W <ea>,FPn                              |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0100100
 15085:   //FREM.W <ea>,FPn                                 |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0100101
 15086:   //FSCALE.W <ea>,FPn                               |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0100110
 15087:   //FSGLMUL.W <ea>,FPn                              |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0100111
 15088:   //FSUB.W <ea>,FPn                                 |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0101000
 15089:   //FCMP.W <ea>,FPn                                 |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0111000
 15090:   //FSMOVE.W <ea>,FPn                               |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn1000000
 15091:   //FSSQRT.W <ea>,FPn                               |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn1000001
 15092:   //FDMOVE.W <ea>,FPn                               |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn1000100
 15093:   //FDSQRT.W <ea>,FPn                               |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn1000101
 15094:   //FSABS.W <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn1011000
 15095:   //FSNEG.W <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn1011010
 15096:   //FDABS.W <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn1011100
 15097:   //FDNEG.W <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn1011110
 15098:   //FSDIV.W <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn1100000
 15099:   //FSADD.W <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn1100010
 15100:   //FSMUL.W <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn1100011
 15101:   //FDDIV.W <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn1100100
 15102:   //FDADD.W <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn1100110
 15103:   //FDMUL.W <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn1100111
 15104:   //FSSUB.W <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn1101000
 15105:   //FDSUB.W <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn1101100
 15106:   //FSINCOS.W <ea>,FPc:FPs                          |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100sss0110ccc
 15107:   //FTST.B <ea>                                     |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-0101100000111010
 15108:   //FMOVE.B <ea>,FPn                                |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0000000
 15109:   //FINT.B <ea>,FPn                                 |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0000001
 15110:   //FSINH.B <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0000010
 15111:   //FINTRZ.B <ea>,FPn                               |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0000011
 15112:   //FSQRT.B <ea>,FPn                                |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0000100
 15113:   //FLOGNP1.B <ea>,FPn                              |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0000110
 15114:   //FETOXM1.B <ea>,FPn                              |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0001000
 15115:   //FTANH.B <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0001001
 15116:   //FATAN.B <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0001010
 15117:   //FASIN.B <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0001100
 15118:   //FATANH.B <ea>,FPn                               |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0001101
 15119:   //FSIN.B <ea>,FPn                                 |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0001110
 15120:   //FTAN.B <ea>,FPn                                 |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0001111
 15121:   //FETOX.B <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0010000
 15122:   //FTWOTOX.B <ea>,FPn                              |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0010001
 15123:   //FTENTOX.B <ea>,FPn                              |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0010010
 15124:   //FLOGN.B <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0010100
 15125:   //FLOG10.B <ea>,FPn                               |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0010101
 15126:   //FLOG2.B <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0010110
 15127:   //FABS.B <ea>,FPn                                 |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0011000
 15128:   //FCOSH.B <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0011001
 15129:   //FNEG.B <ea>,FPn                                 |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0011010
 15130:   //FACOS.B <ea>,FPn                                |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0011100
 15131:   //FCOS.B <ea>,FPn                                 |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0011101
 15132:   //FGETEXP.B <ea>,FPn                              |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0011110
 15133:   //FGETMAN.B <ea>,FPn                              |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0011111
 15134:   //FDIV.B <ea>,FPn                                 |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0100000
 15135:   //FMOD.B <ea>,FPn                                 |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0100001
 15136:   //FADD.B <ea>,FPn                                 |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0100010
 15137:   //FMUL.B <ea>,FPn                                 |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0100011
 15138:   //FSGLDIV.B <ea>,FPn                              |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0100100
 15139:   //FREM.B <ea>,FPn                                 |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0100101
 15140:   //FSCALE.B <ea>,FPn                               |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0100110
 15141:   //FSGLMUL.B <ea>,FPn                              |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0100111
 15142:   //FSUB.B <ea>,FPn                                 |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0101000
 15143:   //FCMP.B <ea>,FPn                                 |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0111000
 15144:   //FSMOVE.B <ea>,FPn                               |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn1000000
 15145:   //FSSQRT.B <ea>,FPn                               |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn1000001
 15146:   //FDMOVE.B <ea>,FPn                               |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn1000100
 15147:   //FDSQRT.B <ea>,FPn                               |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn1000101
 15148:   //FSABS.B <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn1011000
 15149:   //FSNEG.B <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn1011010
 15150:   //FDABS.B <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn1011100
 15151:   //FDNEG.B <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn1011110
 15152:   //FSDIV.B <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn1100000
 15153:   //FSADD.B <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn1100010
 15154:   //FSMUL.B <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn1100011
 15155:   //FDDIV.B <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn1100100
 15156:   //FDADD.B <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn1100110
 15157:   //FDMUL.B <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn1100111
 15158:   //FSSUB.B <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn1101000
 15159:   //FDSUB.B <ea>,FPn                                |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn1101100
 15160:   //FSINCOS.B <ea>,FPc:FPs                          |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110sss0110ccc
 15161:   //FMOVE.L <ea>,FPIAR                              |-|--CC46|-|-----|-----|DAM+-WXZPI|1111_001_000_mmm_rrr-1000010000000000
 15162:   //FMOVEM.L <ea>,FPIAR                             |-|--CC46|-|-----|-----|DAM+-WXZPI|1111_001_000_mmm_rrr-1000010000000000
 15163:   //FMOVE.L <ea>,FPSR                               |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-1000100000000000
 15164:   //FMOVEM.L <ea>,FPSR                              |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-1000100000000000
 15165:   //FMOVE.L <ea>,FPCR                               |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-1001000000000000
 15166:   //FMOVEM.L <ea>,FPCR                              |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-1001000000000000
 15167:   //FMOVE.X FPn,<ea>                                |-|--CC46|-|-----|-----|  M+-WXZ  |1111_001_000_mmm_rrr-011010nnn0000000
 15168:   //FMOVE.P FPn,<ea>{#k}                            |-|--CCSS|-|-----|-----|  M+-WXZ  |1111_001_000_mmm_rrr-011011nnnkkkkkkk
 15169:   //FMOVE.D FPn,<ea>                                |-|--CC46|-|-----|-----|  M+-WXZ  |1111_001_000_mmm_rrr-011101nnn0000000
 15170:   //FMOVE.P FPn,<ea>{Dk}                            |-|--CCSS|-|-----|-----|  M+-WXZ  |1111_001_000_mmm_rrr-011111nnnkkk0000
 15171:   //FMOVEM.L FPSR/FPIAR,<ea>                        |-|--CC46|-|-----|-----|  M+-WXZ  |1111_001_000_mmm_rrr-1010110000000000
 15172:   //FMOVEM.L FPCR/FPIAR,<ea>                        |-|--CC46|-|-----|-----|  M+-WXZ  |1111_001_000_mmm_rrr-1011010000000000
 15173:   //FMOVEM.L FPCR/FPSR,<ea>                         |-|--CC46|-|-----|-----|  M+-WXZ  |1111_001_000_mmm_rrr-1011100000000000
 15174:   //FMOVEM.L FPCR/FPSR/FPIAR,<ea>                   |-|--CC46|-|-----|-----|  M+-WXZ  |1111_001_000_mmm_rrr-1011110000000000
 15175:   //FMOVEM.X #<data>,<ea>                           |-|--CC46|-|-----|-----|  M  WXZ  |1111_001_000_mmm_rrr-11110000dddddddd
 15176:   //FMOVEM.X <list>,<ea>                            |-|--CC46|-|-----|-----|  M  WXZ  |1111_001_000_mmm_rrr-11110000llllllll
 15177:   //FMOVEM.X Dl,<ea>                                |-|--CC4S|-|-----|-----|  M  WXZ  |1111_001_000_mmm_rrr-111110000lll0000
 15178:   //FMOVEM.L <ea>,FPSR/FPIAR                        |-|--CC46|-|-----|-----|  M+-WXZP |1111_001_000_mmm_rrr-1000110000000000
 15179:   //FMOVEM.L <ea>,FPCR/FPIAR                        |-|--CC46|-|-----|-----|  M+-WXZP |1111_001_000_mmm_rrr-1001010000000000
 15180:   //FMOVEM.L <ea>,FPCR/FPSR                         |-|--CC46|-|-----|-----|  M+-WXZP |1111_001_000_mmm_rrr-1001100000000000
 15181:   //FMOVEM.L <ea>,FPCR/FPSR/FPIAR                   |-|--CC46|-|-----|-----|  M+-WXZP |1111_001_000_mmm_rrr-1001110000000000
 15182:   //FMOVEM.X <ea>,#<data>                           |-|--CC46|-|-----|-----|  M+ WXZP |1111_001_000_mmm_rrr-11010000dddddddd
 15183:   //FMOVEM.X <ea>,<list>                            |-|--CC46|-|-----|-----|  M+ WXZP |1111_001_000_mmm_rrr-11010000llllllll
 15184:   //FMOVEM.X <ea>,Dl                                |-|--CC4S|-|-----|-----|  M+ WXZP |1111_001_000_mmm_rrr-110110000lll0000
 15185:   //FTST.X <ea>                                     |-|--CC46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-0100100000111010
 15186:   //FMOVE.X <ea>,FPn                                |-|--CC46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0000000
 15187:   //FINT.X <ea>,FPn                                 |-|--CCS6|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0000001
 15188:   //FSINH.X <ea>,FPn                                |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0000010
 15189:   //FINTRZ.X <ea>,FPn                               |-|--CCS6|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0000011
 15190:   //FSQRT.X <ea>,FPn                                |-|--CC46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0000100
 15191:   //FLOGNP1.X <ea>,FPn                              |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0000110
 15192:   //FETOXM1.X <ea>,FPn                              |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0001000
 15193:   //FTANH.X <ea>,FPn                                |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0001001
 15194:   //FATAN.X <ea>,FPn                                |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0001010
 15195:   //FASIN.X <ea>,FPn                                |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0001100
 15196:   //FATANH.X <ea>,FPn                               |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0001101
 15197:   //FSIN.X <ea>,FPn                                 |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0001110
 15198:   //FTAN.X <ea>,FPn                                 |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0001111
 15199:   //FETOX.X <ea>,FPn                                |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0010000
 15200:   //FTWOTOX.X <ea>,FPn                              |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0010001
 15201:   //FTENTOX.X <ea>,FPn                              |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0010010
 15202:   //FLOGN.X <ea>,FPn                                |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0010100
 15203:   //FLOG10.X <ea>,FPn                               |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0010101
 15204:   //FLOG2.X <ea>,FPn                                |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0010110
 15205:   //FABS.X <ea>,FPn                                 |-|--CC46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0011000
 15206:   //FCOSH.X <ea>,FPn                                |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0011001
 15207:   //FNEG.X <ea>,FPn                                 |-|--CC46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0011010
 15208:   //FACOS.X <ea>,FPn                                |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0011100
 15209:   //FCOS.X <ea>,FPn                                 |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0011101
 15210:   //FGETEXP.X <ea>,FPn                              |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0011110
 15211:   //FGETMAN.X <ea>,FPn                              |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0011111
 15212:   //FDIV.X <ea>,FPn                                 |-|--CC46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0100000
 15213:   //FMOD.X <ea>,FPn                                 |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0100001
 15214:   //FADD.X <ea>,FPn                                 |-|--CC46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0100010
 15215:   //FMUL.X <ea>,FPn                                 |-|--CC46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0100011
 15216:   //FSGLDIV.X <ea>,FPn                              |-|--CCS6|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0100100
 15217:   //FREM.X <ea>,FPn                                 |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0100101
 15218:   //FSCALE.X <ea>,FPn                               |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0100110
 15219:   //FSGLMUL.X <ea>,FPn                              |-|--CCS6|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0100111
 15220:   //FSUB.X <ea>,FPn                                 |-|--CC46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0101000
 15221:   //FCMP.X <ea>,FPn                                 |-|--CC46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0111000
 15222:   //FSMOVE.X <ea>,FPn                               |-|----46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn1000000
 15223:   //FSSQRT.X <ea>,FPn                               |-|----46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn1000001
 15224:   //FDMOVE.X <ea>,FPn                               |-|----46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn1000100
 15225:   //FDSQRT.X <ea>,FPn                               |-|----46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn1000101
 15226:   //FSABS.X <ea>,FPn                                |-|----46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn1011000
 15227:   //FSNEG.X <ea>,FPn                                |-|----46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn1011010
 15228:   //FDABS.X <ea>,FPn                                |-|----46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn1011100
 15229:   //FDNEG.X <ea>,FPn                                |-|----46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn1011110
 15230:   //FSDIV.X <ea>,FPn                                |-|----46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn1100000
 15231:   //FSADD.X <ea>,FPn                                |-|----46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn1100010
 15232:   //FSMUL.X <ea>,FPn                                |-|----46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn1100011
 15233:   //FDDIV.X <ea>,FPn                                |-|----46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn1100100
 15234:   //FDADD.X <ea>,FPn                                |-|----46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn1100110
 15235:   //FDMUL.X <ea>,FPn                                |-|----46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn1100111
 15236:   //FSSUB.X <ea>,FPn                                |-|----46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn1101000
 15237:   //FDSUB.X <ea>,FPn                                |-|----46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010nnn1101100
 15238:   //FSINCOS.X <ea>,FPc:FPs                          |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010010sss0110ccc
 15239:   //FTST.P <ea>                                     |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-0100110000111010
 15240:   //FMOVE.P <ea>,FPn                                |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0000000
 15241:   //FINT.P <ea>,FPn                                 |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0000001
 15242:   //FSINH.P <ea>,FPn                                |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0000010
 15243:   //FINTRZ.P <ea>,FPn                               |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0000011
 15244:   //FSQRT.P <ea>,FPn                                |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0000100
 15245:   //FLOGNP1.P <ea>,FPn                              |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0000110
 15246:   //FETOXM1.P <ea>,FPn                              |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0001000
 15247:   //FTANH.P <ea>,FPn                                |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0001001
 15248:   //FATAN.P <ea>,FPn                                |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0001010
 15249:   //FASIN.P <ea>,FPn                                |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0001100
 15250:   //FATANH.P <ea>,FPn                               |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0001101
 15251:   //FSIN.P <ea>,FPn                                 |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0001110
 15252:   //FTAN.P <ea>,FPn                                 |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0001111
 15253:   //FETOX.P <ea>,FPn                                |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0010000
 15254:   //FTWOTOX.P <ea>,FPn                              |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0010001
 15255:   //FTENTOX.P <ea>,FPn                              |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0010010
 15256:   //FLOGN.P <ea>,FPn                                |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0010100
 15257:   //FLOG10.P <ea>,FPn                               |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0010101
 15258:   //FLOG2.P <ea>,FPn                                |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0010110
 15259:   //FABS.P <ea>,FPn                                 |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0011000
 15260:   //FCOSH.P <ea>,FPn                                |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0011001
 15261:   //FNEG.P <ea>,FPn                                 |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0011010
 15262:   //FACOS.P <ea>,FPn                                |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0011100
 15263:   //FCOS.P <ea>,FPn                                 |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0011101
 15264:   //FGETEXP.P <ea>,FPn                              |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0011110
 15265:   //FGETMAN.P <ea>,FPn                              |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0011111
 15266:   //FDIV.P <ea>,FPn                                 |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0100000
 15267:   //FMOD.P <ea>,FPn                                 |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0100001
 15268:   //FADD.P <ea>,FPn                                 |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0100010
 15269:   //FMUL.P <ea>,FPn                                 |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0100011
 15270:   //FSGLDIV.P <ea>,FPn                              |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0100100
 15271:   //FREM.P <ea>,FPn                                 |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0100101
 15272:   //FSCALE.P <ea>,FPn                               |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0100110
 15273:   //FSGLMUL.P <ea>,FPn                              |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0100111
 15274:   //FSUB.P <ea>,FPn                                 |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0101000
 15275:   //FCMP.P <ea>,FPn                                 |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0111000
 15276:   //FSMOVE.P <ea>,FPn                               |-|----SS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn1000000
 15277:   //FSSQRT.P <ea>,FPn                               |-|----SS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn1000001
 15278:   //FDMOVE.P <ea>,FPn                               |-|----SS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn1000100
 15279:   //FDSQRT.P <ea>,FPn                               |-|----SS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn1000101
 15280:   //FSABS.P <ea>,FPn                                |-|----SS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn1011000
 15281:   //FSNEG.P <ea>,FPn                                |-|----SS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn1011010
 15282:   //FDABS.P <ea>,FPn                                |-|----SS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn1011100
 15283:   //FDNEG.P <ea>,FPn                                |-|----SS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn1011110
 15284:   //FSDIV.P <ea>,FPn                                |-|----SS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn1100000
 15285:   //FSADD.P <ea>,FPn                                |-|----SS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn1100010
 15286:   //FSMUL.P <ea>,FPn                                |-|----SS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn1100011
 15287:   //FDDIV.P <ea>,FPn                                |-|----SS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn1100100
 15288:   //FDADD.P <ea>,FPn                                |-|----SS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn1100110
 15289:   //FDMUL.P <ea>,FPn                                |-|----SS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn1100111
 15290:   //FSSUB.P <ea>,FPn                                |-|----SS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn1101000
 15291:   //FDSUB.P <ea>,FPn                                |-|----SS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011nnn1101100
 15292:   //FSINCOS.P <ea>,FPc:FPs                          |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010011sss0110ccc
 15293:   //FTST.D <ea>                                     |-|--CC46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-0101010000111010
 15294:   //FMOVE.D <ea>,FPn                                |-|--CC46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0000000
 15295:   //FINT.D <ea>,FPn                                 |-|--CCS6|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0000001
 15296:   //FSINH.D <ea>,FPn                                |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0000010
 15297:   //FINTRZ.D <ea>,FPn                               |-|--CCS6|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0000011
 15298:   //FSQRT.D <ea>,FPn                                |-|--CC46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0000100
 15299:   //FLOGNP1.D <ea>,FPn                              |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0000110
 15300:   //FETOXM1.D <ea>,FPn                              |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0001000
 15301:   //FTANH.D <ea>,FPn                                |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0001001
 15302:   //FATAN.D <ea>,FPn                                |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0001010
 15303:   //FASIN.D <ea>,FPn                                |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0001100
 15304:   //FATANH.D <ea>,FPn                               |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0001101
 15305:   //FSIN.D <ea>,FPn                                 |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0001110
 15306:   //FTAN.D <ea>,FPn                                 |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0001111
 15307:   //FETOX.D <ea>,FPn                                |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0010000
 15308:   //FTWOTOX.D <ea>,FPn                              |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0010001
 15309:   //FTENTOX.D <ea>,FPn                              |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0010010
 15310:   //FLOGN.D <ea>,FPn                                |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0010100
 15311:   //FLOG10.D <ea>,FPn                               |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0010101
 15312:   //FLOG2.D <ea>,FPn                                |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0010110
 15313:   //FABS.D <ea>,FPn                                 |-|--CC46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0011000
 15314:   //FCOSH.D <ea>,FPn                                |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0011001
 15315:   //FNEG.D <ea>,FPn                                 |-|--CC46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0011010
 15316:   //FACOS.D <ea>,FPn                                |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0011100
 15317:   //FCOS.D <ea>,FPn                                 |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0011101
 15318:   //FGETEXP.D <ea>,FPn                              |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0011110
 15319:   //FGETMAN.D <ea>,FPn                              |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0011111
 15320:   //FDIV.D <ea>,FPn                                 |-|--CC46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0100000
 15321:   //FMOD.D <ea>,FPn                                 |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0100001
 15322:   //FADD.D <ea>,FPn                                 |-|--CC46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0100010
 15323:   //FMUL.D <ea>,FPn                                 |-|--CC46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0100011
 15324:   //FSGLDIV.D <ea>,FPn                              |-|--CCS6|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0100100
 15325:   //FREM.D <ea>,FPn                                 |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0100101
 15326:   //FSCALE.D <ea>,FPn                               |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0100110
 15327:   //FSGLMUL.D <ea>,FPn                              |-|--CCS6|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0100111
 15328:   //FSUB.D <ea>,FPn                                 |-|--CC46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0101000
 15329:   //FCMP.D <ea>,FPn                                 |-|--CC46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0111000
 15330:   //FSMOVE.D <ea>,FPn                               |-|----46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn1000000
 15331:   //FSSQRT.D <ea>,FPn                               |-|----46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn1000001
 15332:   //FDMOVE.D <ea>,FPn                               |-|----46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn1000100
 15333:   //FDSQRT.D <ea>,FPn                               |-|----46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn1000101
 15334:   //FSABS.D <ea>,FPn                                |-|----46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn1011000
 15335:   //FSNEG.D <ea>,FPn                                |-|----46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn1011010
 15336:   //FDABS.D <ea>,FPn                                |-|----46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn1011100
 15337:   //FDNEG.D <ea>,FPn                                |-|----46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn1011110
 15338:   //FSDIV.D <ea>,FPn                                |-|----46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn1100000
 15339:   //FSADD.D <ea>,FPn                                |-|----46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn1100010
 15340:   //FSMUL.D <ea>,FPn                                |-|----46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn1100011
 15341:   //FDDIV.D <ea>,FPn                                |-|----46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn1100100
 15342:   //FDADD.D <ea>,FPn                                |-|----46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn1100110
 15343:   //FDMUL.D <ea>,FPn                                |-|----46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn1100111
 15344:   //FSSUB.D <ea>,FPn                                |-|----46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn1101000
 15345:   //FDSUB.D <ea>,FPn                                |-|----46|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101nnn1101100
 15346:   //FSINCOS.D <ea>,FPc:FPs                          |-|--CCSS|-|-----|-----|  M+-WXZPI|1111_001_000_mmm_rrr-010101sss0110ccc
 15347:   //FMOVEM.X #<data>,-(Ar)                          |-|--CC46|-|-----|-----|    -     |1111_001_000_100_rrr-11100000dddddddd
 15348:   //FMOVEM.X <list>,-(Ar)                           |-|--CC46|-|-----|-----|    -     |1111_001_000_100_rrr-11100000llllllll
 15349:   //FMOVEM.X Dl,-(Ar)                               |-|--CC4S|-|-----|-----|    -     |1111_001_000_100_rrr-111010000lll0000
 15350:   //FMOVEM.L #<data>,#<data>,FPSR/FPIAR             |-|--CC4S|-|-----|-----|         I|1111_001_000_111_100-1000110000000000-{data}
 15351:   //FMOVEM.L #<data>,#<data>,FPCR/FPIAR             |-|--CC4S|-|-----|-----|         I|1111_001_000_111_100-1001010000000000-{data}
 15352:   //FMOVEM.L #<data>,#<data>,FPCR/FPSR              |-|--CC4S|-|-----|-----|         I|1111_001_000_111_100-1001100000000000-{data}
 15353:   //FMOVEM.L #<data>,#<data>,#<data>,FPCR/FPSR/FPIAR|-|--CC4S|-|-----|-----|         I|1111_001_000_111_100-1001110000000000-{data}
 15354:   @SuppressWarnings ("fallthrough") public static void irpFgen () throws M68kException {
 15355:   fgen: {
 15356:     if (XEiJ.currentMPU == Model.MPU_MC68LC060) {
 15357:       irpFline ();
 15358:       break fgen;
 15359:     }
 15360:     XEiJ.mpuCycleCount++;
 15361:     int ea = XEiJ.regOC & 63;
 15362:     int a = XEiJ.regPC;
 15363:     XEiJ.regPC = a + 2;
 15364:     int w = mmuReadWordZeroExword (a, XEiJ.regSRS);  //pcwz。拡張ワード
 15365:     int m = w >> 10 & 7;
 15366:     int n = w >> 7 & 7;
 15367:     int c = w & 0x7f;
 15368:     XEiJ.fpuBox.epbSetRoundingPrec (XEiJ.fpuBox.epbFpcr >> 6 & 3);  //丸め桁数
 15369:     XEiJ.fpuBox.epbSetRoundingMode (XEiJ.fpuBox.epbFpcr >> 4 & 3);  //丸めモード
 15370:     a = 0;  //実効アドレス
 15371:     //XEiJ.fpuBox.epbExceptionStatusWord = 0;
 15372: 
 15373: 
 15374:     switch (w >> 13) {
 15375: 
 15376: 
 15377:     case 0b010:  //$4xxx-$5xxx: Fop.* <ea>,FPn
 15378:       XEiJ.fpuBox.epbFpsr &= 0x00ff00ff;
 15379:       XEiJ.fpuBox.epbFpiar = XEiJ.regPC0;  //FPIARはFMOVEM/FMOVE FPcr/FSAVE/FRESTORE以外の命令で例外が発生しなくても更新される
 15380: 
 15381:       switch (m) {
 15382: 
 15383:       case 0b000:  //$40xx-$43xx: Fop.L <ea>,FPn
 15384:         {
 15385:           XEiJ.mpuCycleCount += 3;
 15386:           int i;
 15387:           if (ea < XEiJ.EA_AR) {  //Dr
 15388:             XEiJ.mpuCycleCount += 2;
 15389:             //a = 0;
 15390:             i = XEiJ.regRn[ea];
 15391:           } else if (ea == XEiJ.EA_IM) {  //#<data>
 15392:             a = XEiJ.regPC;
 15393:             XEiJ.regPC = a + 4;
 15394:             i = mmuReadLongExword (a, XEiJ.regSRS);  //pcls
 15395:           } else {  //Dr,#<data>以外
 15396:             a = efaAnyLong (ea);
 15397:             i = mmuReadLongData (a, XEiJ.regSRS);
 15398:           }
 15399:           XEiJ.fpuFPn[m = EFPBox.EPB_SRC_TMP].seti (i);
 15400:         }
 15401:         break;
 15402: 
 15403:       case 0b001:  //$44xx-$47xx: Fop.S <ea>,FPn
 15404:         {
 15405:           int i;
 15406:           if (ea < XEiJ.EA_AR) {  //Dr
 15407:             XEiJ.mpuCycleCount += 2;
 15408:             //a = 0;
 15409:             i = XEiJ.regRn[ea];
 15410:           } else if (ea == XEiJ.EA_IM) {  //#<data>
 15411:             a = XEiJ.regPC;
 15412:             XEiJ.regPC = a + 4;
 15413:             i = mmuReadLongExword (a, XEiJ.regSRS);  //pcls
 15414:           } else {  //Dr,#<data>以外
 15415:             a = efaAnyLong (ea);
 15416:             i = mmuReadLongData (a, XEiJ.regSRS);
 15417:           }
 15418:           XEiJ.fpuFPn[m = EFPBox.EPB_SRC_TMP].setf0 (i);
 15419:         }
 15420:         break;
 15421: 
 15422:       case 0b010:  //$48xx-$4Bxx: Fop.X <ea>,FPn
 15423:         {
 15424:           int i;
 15425:           long l;
 15426:           if (ea == XEiJ.EA_IM) {  //#<data>
 15427:             if (!XEiJ.fpuBox.epbIsFullSpec ()) {  //12バイトのイミディエイト
 15428:               irpExceptionFormat0 (M68kException.M6E_UNIMPLEMENTED_EFFECTIVE << 2, XEiJ.regPC0);  //pcは命令の先頭
 15429:               break fgen;
 15430:             }
 15431:             a = XEiJ.regPC;
 15432:             XEiJ.regPC = a + 12;
 15433:             i = mmuReadLongExword (a, XEiJ.regSRS);
 15434:             l = mmuReadQuadExword (a + 4, XEiJ.regSRS);
 15435:           } else {  //#<data>以外
 15436:             a = efaAnyExtd (ea);
 15437:             i = mmuReadLongData (a, XEiJ.regSRS);
 15438:             l = mmuReadQuadSecond (a + 4, XEiJ.regSRS);
 15439:           }
 15440:           if (XEiJ.fpuBox.epbIsTriple ()) {  //三倍精度
 15441:             XEiJ.fpuFPn[m = EFPBox.EPB_SRC_TMP].sety012 (i, l);
 15442:           } else {  //拡張精度
 15443:             XEiJ.fpuFPn[m = EFPBox.EPB_SRC_TMP].setx012 (i, l);
 15444:           }
 15445:         }
 15446:         break;
 15447: 
 15448:       case 0b011:  //$4Cxx-$4Fxx: Fop.P <ea>,FPn
 15449:         {
 15450:           int i;
 15451:           long l;
 15452:           if (ea == XEiJ.EA_IM) {  //#<data>
 15453:             if (!XEiJ.fpuBox.epbIsFullSpec ()) {  //12バイトのイミディエイト
 15454:               irpExceptionFormat0 (M68kException.M6E_UNIMPLEMENTED_EFFECTIVE << 2, XEiJ.regPC0);  //pcは命令の先頭
 15455:               break fgen;
 15456:             }
 15457:             a = XEiJ.regPC;
 15458:             XEiJ.regPC = a + 12;
 15459:             i = mmuReadLongExword (a, XEiJ.regSRS);
 15460:             l = mmuReadQuadExword (a + 4, XEiJ.regSRS);
 15461:           } else {  //#<data>以外
 15462:             a = efaAnyExtd (ea);
 15463:             i = mmuReadLongData (a, XEiJ.regSRS);
 15464:             l = mmuReadQuadSecond (a + 4, XEiJ.regSRS);
 15465:           }
 15466:           if (!XEiJ.fpuBox.epbIsFullSpec ()) {  //パックトデシマル
 15467:             XEiJ.fpuBox.epbExceptionStatusWord = 0xe000 | M68kException.M6E_FP_UNSUPPORTED_DATA_TYPE & 7;
 15468:             irpExceptionFormat2 (M68kException.M6E_FP_UNSUPPORTED_DATA_TYPE << 2, XEiJ.regPC, a);  //pcは次の命令,アドレスはソースオペランド
 15469:             break fgen;
 15470:           }
 15471:           XEiJ.fpuFPn[m = EFPBox.EPB_SRC_TMP].setp012 (i, l);
 15472:         }
 15473:         break;
 15474: 
 15475:       case 0b100:  //$50xx-$53xx: Fop.W <ea>,FPn
 15476:         {
 15477:           XEiJ.mpuCycleCount += 3;
 15478:           int i;
 15479:           if (ea < XEiJ.EA_AR) {  //Dr
 15480:             XEiJ.mpuCycleCount += 2;
 15481:             //a = 0;
 15482:             i = (short) XEiJ.regRn[ea];
 15483:           } else if (ea == XEiJ.EA_IM) {  //#<data>
 15484:             a = XEiJ.regPC;
 15485:             XEiJ.regPC = a + 2;
 15486:             i = mmuReadWordSignExword (a, XEiJ.regSRS);  //pcws
 15487:           } else {  //Dr,#<data>以外
 15488:             a = efaAnyWord (ea);
 15489:             i = mmuReadWordSignData (a, XEiJ.regSRS);
 15490:           }
 15491:           XEiJ.fpuFPn[m = EFPBox.EPB_SRC_TMP].seti (i);
 15492:         }
 15493:         break;
 15494: 
 15495:       case 0b101:  //$54xx-$57xx: Fop.D <ea>,FPn
 15496:         {
 15497:           long l;
 15498:           if (ea == XEiJ.EA_IM) {  //#<data>
 15499:             a = XEiJ.regPC;
 15500:             XEiJ.regPC = a + 8;
 15501:             l = mmuReadQuadExword (a, XEiJ.regSRS);
 15502:           } else {  //#<data>以外
 15503:             a = efaAnyQuad (ea);
 15504:             l = mmuReadQuadData (a, XEiJ.regSRS);
 15505:           }
 15506:           XEiJ.fpuFPn[m = EFPBox.EPB_SRC_TMP].setd01 (l);
 15507:         }
 15508:         break;
 15509: 
 15510:       case 0b110:  //$58xx-$5Bxx: Fop.B <ea>,FPn
 15511:         {
 15512:           XEiJ.mpuCycleCount += 3;
 15513:           int i;
 15514:           if (ea < XEiJ.EA_AR) {  //Dr
 15515:             XEiJ.mpuCycleCount += 2;
 15516:             //a = 0;
 15517:             i = (byte) XEiJ.regRn[ea];
 15518:           } else if (ea == XEiJ.EA_IM) {  //#<data>
 15519:             a = XEiJ.regPC;
 15520:             XEiJ.regPC = a + 2;
 15521:             i = mmuReadByteSignExword (a + 1, XEiJ.regSRS);  //pcbs
 15522:           } else {  //Dr,#<data>以外
 15523:             a = efaAnyByte (ea);
 15524:             i = mmuReadByteSignData (a, XEiJ.regSRS);
 15525:           }
 15526:           XEiJ.fpuFPn[m = EFPBox.EPB_SRC_TMP].seti (i);
 15527:         }
 15528:         break;
 15529: 
 15530:       case 0b111:  //$5Cxx-$5Fxx: FMOVECR.X #ccc,FPn
 15531:       default:
 15532:         if (!XEiJ.fpuBox.epbIsFullSpec ()) {
 15533:           irpExceptionFormat2 (M68kException.M6E_FP_UNIMPLEMENTED_INSTRUCTION << 2, XEiJ.regPC, M68kException.M6E_FP_UNIMPLEMENTED_INSTRUCTION << 2);  //pcは次の命令,アドレスはベクタオフセット
 15534:           break fgen;
 15535:         }
 15536:         if (0x40 <= c) {
 15537:           //マニュアルにはFMOVECRの命令フォーマットのROMオフセットが7bitあるように書かれているが実際は6bit
 15538:           //MC68882で0x40以上を指定すると命令実行前例外のF-Line Emulator(レスポンス$1C0B)が返る
 15539:           XEiJ.regPC = XEiJ.regPC0 + 2;  //拡張ワードを読まなかったことにする
 15540:           irpFline ();
 15541:           break fgen;
 15542:         }
 15543:         if (false) {
 15544:           m = EFPBox.EPB_CONST_START + c;  //定数
 15545:           c = 0;  //FMOVE
 15546:         } else {
 15547:           //FMOVECR
 15548:           XEiJ.fpuBox.epbFmovecr (XEiJ.fpuFPn[n], c);
 15549:           //FPSRのAEXCを設定する
 15550:           XEiJ.fpuBox.epbFpsr |= XEiJ.FPU_FPSR_EXC_TO_AEXC[XEiJ.fpuBox.epbFpsr >> 8 & 255];
 15551:           //浮動小数点命令実行後例外 floating-point post-instruction exception
 15552:           if (irpFPPostInstruction (a)) {
 15553:             break fgen;
 15554:           }
 15555:           break fgen;
 15556:         }
 15557: 
 15558:       }
 15559:       //浮動小数点命令実行前例外 floating-point pre-instruction exception
 15560:       if (irpFPPreInstruction ()) {
 15561:         break fgen;
 15562:       }
 15563:       //Fop.X <ea>,FPn → Fop.X FP[EFPBox.EPB_SRC_TMP],FPn
 15564:       //FMOVECR.X #ccc,FPn → FMOVE.X FPc,FPn
 15565: 
 15566: 
 15567:       //fallthrough
 15568:     case 0b000:  //$0xxx-$1xxx: Fop.X FPm,FPn
 15569:       if (w >> 13 == 0) {
 15570:         XEiJ.fpuBox.epbFpsr &= 0x00ff00ff;
 15571:       }
 15572:       //Fop.* <ea>,FPnのときFPIARは設定済み
 15573:       XEiJ.fpuBox.epbFpiar = XEiJ.regPC0;  //FPIARはFMOVEM/FMOVE FPcr/FSAVE/FRESTORE以外の命令で例外が発生しなくても更新される
 15574: 
 15575:       switch (c) {
 15576: 
 15577:       case 0b000_0000:  //$xx00: FMOVE.* *m,FPn
 15578:         //  BSUN   常にクリア
 15579:         //  SNAN   引数がシグナリングNaNのときセット、それ以外はクリア
 15580:         //  OPERR  常にクリア
 15581:         //  OVFL   常にクリア
 15582:         //  UNFL   結果が非正規化数のときセット、それ以外はクリア
 15583:         //  DZ     常にクリア
 15584:         //  INEX2  結果に誤差があるときセット、それ以外はクリア
 15585:         //  INEX1  引数がpackedで正確に変換できないときセット、それ以外はクリア
 15586:         XEiJ.fpuFPn[n].sete (XEiJ.fpuFPn[m]).finish ();
 15587:         break;
 15588: 
 15589:       case 0b000_0001:  //$xx01: FINT.* *m,FPn
 15590:         //  BSUN   常にクリア
 15591:         //  SNAN   引数がシグナリングNaNのときセット、それ以外はクリア
 15592:         //  OPERR  常にクリア
 15593:         //  OVFL   常にクリア
 15594:         //         正規化数の最大値は整数なので丸めても大きくなることはない
 15595:         //  UNFL   常にクリア
 15596:         //         結果は整数なので非正規化数にはならない
 15597:         //  DZ     常にクリア
 15598:         //  INEX2  結果に誤差があるときセット、それ以外はクリア
 15599:         //  INEX1  引数がpackedで正確に変換できないときセット、それ以外はクリア
 15600:         XEiJ.mpuCycleCount += 2;
 15601:         //  FINTはsingleとdoubleの丸め処理を行わない
 15602:         XEiJ.fpuBox.epbSetRoundingPrec (EFPBox.EPB_PREC_EXD);
 15603:         XEiJ.fpuFPn[n].round (XEiJ.fpuFPn[m], XEiJ.fpuBox.epbRoundingMode);
 15604:         break;
 15605: 
 15606:       case 0b000_0010:  //$xx02: FSINH.* *m,FPn
 15607:         //  BSUN   常にクリア
 15608:         //  SNAN   引数がシグナリングNaNのときセット、それ以外はクリア
 15609:         //  OPERR  常にクリア
 15610:         //  OVFL   オーバーフローしたときセット、それ以外はクリア
 15611:         //  UNFL   結果が非正規化数のときセット、それ以外はクリア
 15612:         //  DZ     常にクリア
 15613:         //  INEX2  結果に誤差があるときセット、それ以外はクリア
 15614:         //  INEX1  引数がpackedで正確に変換できないときセット、それ以外はクリア
 15615:         if (!XEiJ.fpuBox.epbIsFullSpec ()) {
 15616:           irpExceptionFormat2 (M68kException.M6E_FP_UNIMPLEMENTED_INSTRUCTION << 2, XEiJ.regPC, a);  //pcは次の命令,アドレスは実効アドレス
 15617:           break fgen;
 15618:         }
 15619:         XEiJ.fpuFPn[n].sinh (XEiJ.fpuFPn[m]);
 15620:         break;
 15621: 
 15622:       case 0b000_0011:  //$xx03: FINTRZ.* *m,FPn
 15623:         //  BSUN   常にクリア
 15624:         //  SNAN   引数がシグナリングNaNのときセット、それ以外はクリア
 15625:         //  OPERR  常にクリア
 15626:         //  OVFL   常にクリア
 15627:         //  UNFL   常にクリア
 15628:         //         結果は整数なので非正規化数にはならない
 15629:         //  DZ     常にクリア
 15630:         //  INEX2  結果に誤差があるときセット、それ以外はクリア
 15631:         //  INEX1  引数がpackedで正確に変換できないときセット、それ以外はクリア
 15632:         XEiJ.mpuCycleCount += 2;
 15633:         //  FINTRZはsingleとdoubleの丸め処理を行わない
 15634:         XEiJ.fpuBox.epbSetRoundingPrec (EFPBox.EPB_PREC_EXD);
 15635:         XEiJ.fpuFPn[n].trunc (XEiJ.fpuFPn[m]);
 15636:         break;
 15637: 
 15638:       case 0b000_0100:  //$xx04: FSQRT.* *m,FPn
 15639:       case 0b000_0101:  //$xx05: FSQRT.* *m,FPn (MC68882)
 15640:         //  BSUN   常にクリア
 15641:         //  SNAN   引数がシグナリングNaNのときセット、それ以外はクリア
 15642:         //  OPERR  引数が-0を除く負数のときセット、それ以外はクリア
 15643:         //  OVFL   常にクリア
 15644:         //         1よりも大きい数は小さくなるので溢れることはない
 15645:         //  UNFL   常にクリア
 15646:         //         非正規化数の平方根は正規化数なので結果が非正規化数になることはない
 15647:         //  DZ     常にクリア
 15648:         //  INEX2  結果に誤差があるときセット、それ以外はクリア
 15649:         //  INEX1  引数がpackedで正確に変換できないときセット、それ以外はクリア
 15650:         XEiJ.mpuCycleCount += 67;
 15651:         XEiJ.fpuFPn[n].sqrt (XEiJ.fpuFPn[m]);
 15652:         break;
 15653: 
 15654:       case 0b000_0110:  //$xx06: FLOGNP1.* *m,FPn
 15655:       case 0b000_0111:  //$xx07: FLOGNP1.* *m,FPn (MC68882)
 15656:         //  BSUN   常にクリア
 15657:         //  SNAN   引数がシグナリングNaNのときセット、それ以外はクリア
 15658:         //  OPERR  引数が-1よりも小さいときセット、それ以外はクリア
 15659:         //  OVFL   常にクリア
 15660:         //         log(1+0)=0,log(1+x)<=xなので結果が引数よりも大きくなることはない
 15661:         //  UNFL   結果が非正規化数のときセット、それ以外はクリア
 15662:         //  DZ     引数が-1のときセット、それ以外はクリア
 15663:         //  INEX2  結果に誤差があるときセット、それ以外はクリア
 15664:         //  INEX1  引数がpackedで正確に変換できないときセット、それ以外はクリア
 15665:         if (!XEiJ.fpuBox.epbIsFullSpec ()) {
 15666:           irpExceptionFormat2 (M68kException.M6E_FP_UNIMPLEMENTED_INSTRUCTION << 2, XEiJ.regPC, a);  //pcは次の命令,アドレスは実効アドレス
 15667:           break fgen;
 15668:         }
 15669:         XEiJ.fpuFPn[n].log1p (XEiJ.fpuFPn[m]);
 15670:         break;
 15671: 
 15672:       case 0b000_1000:  //$xx08: FETOXM1.* *m,FPn
 15673:         //  BSUN   常にクリア
 15674:         //  SNAN   引数がシグナリングNaNのときセット、それ以外はクリア
 15675:         //  OPERR  常にクリア
 15676:         //  OVFL   オーバーフローしたときセット、それ以外はクリア
 15677:         //  UNFL   結果が非正規化数のときセット、それ以外はクリア
 15678:         //  DZ     常にクリア
 15679:         //  INEX2  結果に誤差があるときセット、それ以外はクリア
 15680:         //  INEX1  引数がpackedで正確に変換できないときセット、それ以外はクリア
 15681:         if (!XEiJ.fpuBox.epbIsFullSpec ()) {
 15682:           irpExceptionFormat2 (M68kException.M6E_FP_UNIMPLEMENTED_INSTRUCTION << 2, XEiJ.regPC, a);  //pcは次の命令,アドレスは実効アドレス
 15683:           break fgen;
 15684:         }
 15685:         XEiJ.fpuFPn[n].expm1 (XEiJ.fpuFPn[m]);
 15686:         break;
 15687: 
 15688:       case 0b000_1001:  //$xx09: FTANH.* *m,FPn
 15689:         //  BSUN   常にクリア
 15690:         //  SNAN   引数がシグナリングNaNのときセット、それ以外はクリア
 15691:         //  OPERR  常にクリア
 15692:         //  OVFL   常にクリア
 15693:         //  UNFL   結果が非正規化数のときセット、それ以外はクリア
 15694:         //  DZ     常にクリア
 15695:         //  INEX2  結果に誤差があるときセット、それ以外はクリア
 15696:         //  INEX1  引数がpackedで正確に変換できないときセット、それ以外はクリア
 15697:         if (!XEiJ.fpuBox.epbIsFullSpec ()) {
 15698:           irpExceptionFormat2 (M68kException.M6E_FP_UNIMPLEMENTED_INSTRUCTION << 2, XEiJ.regPC, a);  //pcは次の命令,アドレスは実効アドレス
 15699:           break fgen;
 15700:         }
 15701:         XEiJ.fpuFPn[n].tanh (XEiJ.fpuFPn[m]);
 15702:         break;
 15703: 
 15704:       case 0b000_1010:  //$xx0A: FATAN.* *m,FPn
 15705:       case 0b000_1011:  //$xx0B: FATAN.* *m,FPn (MC68882)
 15706:         //  BSUN   常にクリア
 15707:         //  SNAN   引数がシグナリングNaNのときセット、それ以外はクリア
 15708:         //  OPERR  常にクリア
 15709:         //  OVFL   常にクリア
 15710:         //  UNFL   結果が非正規化数のときセット、それ以外はクリア
 15711:         //  DZ     常にクリア
 15712:         //  INEX2  結果に誤差があるときセット、それ以外はクリア
 15713:         //  INEX1  引数がpackedで正確に変換できないときセット、それ以外はクリア
 15714:         if (!XEiJ.fpuBox.epbIsFullSpec ()) {
 15715:           irpExceptionFormat2 (M68kException.M6E_FP_UNIMPLEMENTED_INSTRUCTION << 2, XEiJ.regPC, a);  //pcは次の命令,アドレスは実効アドレス
 15716:           break fgen;
 15717:         }
 15718:         XEiJ.fpuFPn[n].atan (XEiJ.fpuFPn[m]);
 15719:         break;
 15720: 
 15721:       case 0b000_1100:  //$xx0C: FASIN.* *m,FPn
 15722:         //  BSUN   常にクリア
 15723:         //  SNAN   引数がシグナリングNaNのときセット、それ以外はクリア
 15724:         //  OPERR  引数の絶対値が1よりも大きいときセット、それ以外はクリア
 15725:         //  OVFL   常にクリア
 15726:         //  UNFL   結果が非正規化数のときセット、それ以外はクリア
 15727:         //  DZ     常にクリア
 15728:         //  INEX2  結果に誤差があるときセット、それ以外はクリア
 15729:         //  INEX1  引数がpackedで正確に変換できないときセット、それ以外はクリア
 15730:         if (!XEiJ.fpuBox.epbIsFullSpec ()) {
 15731:           irpExceptionFormat2 (M68kException.M6E_FP_UNIMPLEMENTED_INSTRUCTION << 2, XEiJ.regPC, a);  //pcは次の命令,アドレスは実効アドレス
 15732:           break fgen;
 15733:         }
 15734:         XEiJ.fpuFPn[n].asin (XEiJ.fpuFPn[m]);
 15735:         break;
 15736: 
 15737:       case 0b000_1101:  //$xx0D: FATANH.* *m,FPn
 15738:         //  BSUN   常にクリア
 15739:         //  SNAN   引数がシグナリングNaNのときセット、それ以外はクリア
 15740:         //  OPERR  引数の絶対値が1よりも大きいときセット、それ以外はクリア
 15741:         //  OVFL   常にクリア
 15742:         //         1のとき無限大なのだから1の近くでオーバーフローしそうに思えるがatanh(1-2^-80)≒28.07くらい
 15743:         //  UNFL   結果が非正規化数のときセット、それ以外はクリア
 15744:         //  DZ     引数の絶対値が1のときセット、それ以外はクリア
 15745:         //  INEX2  結果に誤差があるときセット、それ以外はクリア
 15746:         //  INEX1  引数がpackedで正確に変換できないときセット、それ以外はクリア
 15747:         if (!XEiJ.fpuBox.epbIsFullSpec ()) {
 15748:           irpExceptionFormat2 (M68kException.M6E_FP_UNIMPLEMENTED_INSTRUCTION << 2, XEiJ.regPC, a);  //pcは次の命令,アドレスは実効アドレス
 15749:           break fgen;
 15750:         }
 15751:         XEiJ.fpuFPn[n].atanh (XEiJ.fpuFPn[m]);
 15752:         break;
 15753: 
 15754:       case 0b000_1110:  //$xx0E: FSIN.* *m,FPn
 15755:         //  BSUN   常にクリア
 15756:         //  SNAN   引数がシグナリングNaNのときセット、それ以外はクリア
 15757:         //  OPERR  引数が無限大のときセット、それ以外はクリア
 15758:         //  OVFL   常にクリア
 15759:         //  UNFL   結果が非正規化数のときセット、それ以外はクリア
 15760:         //  DZ     常にクリア
 15761:         //  INEX2  結果に誤差があるときセット、それ以外はクリア
 15762:         //  INEX1  引数がpackedで正確に変換できないときセット、それ以外はクリア
 15763:         if (!XEiJ.fpuBox.epbIsFullSpec ()) {
 15764:           irpExceptionFormat2 (M68kException.M6E_FP_UNIMPLEMENTED_INSTRUCTION << 2, XEiJ.regPC, a);  //pcは次の命令,アドレスは実効アドレス
 15765:           break fgen;
 15766:         }
 15767:         XEiJ.fpuFPn[n].sin (XEiJ.fpuFPn[m]);
 15768:         break;
 15769: 
 15770:       case 0b000_1111:  //$xx0F: FTAN.* *m,FPn
 15771:         //  BSUN   常にクリア
 15772:         //  SNAN   引数がシグナリングNaNのときセット、それ以外はクリア
 15773:         //  OPERR  引数が無限大のときセット、それ以外はクリア
 15774:         //  OVFL   オーバーフローしたときセット、それ以外はクリア
 15775:         //  UNFL   結果が非正規化数のときセット、それ以外はクリア
 15776:         //  DZ     常にクリア
 15777:         //         cos(x)=0を満たすxは正確に表現できないのだからsin(x)/cos(x)がゼロ除算になるのはおかしい
 15778:         //  INEX2  結果に誤差があるときセット、それ以外はクリア
 15779:         //  INEX1  引数がpackedで正確に変換できないときセット、それ以外はクリア
 15780:         if (!XEiJ.fpuBox.epbIsFullSpec ()) {
 15781:           irpExceptionFormat2 (M68kException.M6E_FP_UNIMPLEMENTED_INSTRUCTION << 2, XEiJ.regPC, a);  //pcは次の命令,アドレスは実効アドレス
 15782:           break fgen;
 15783:         }
 15784:         XEiJ.fpuFPn[n].tan (XEiJ.fpuFPn[m]);
 15785:         break;
 15786: 
 15787:       case 0b001_0000:  //$xx10: FETOX.* *m,FPn
 15788:         //  BSUN   常にクリア
 15789:         //  SNAN   引数がシグナリングNaNのときセット、それ以外はクリア
 15790:         //  OPERR  常にクリア
 15791:         //  OVFL   オーバーフローしたときセット、それ以外はクリア
 15792:         //  UNFL   結果が非正規化数のときセット、それ以外はクリア
 15793:         //  DZ     常にクリア
 15794:         //  INEX2  結果に誤差があるときセット、それ以外はクリア
 15795:         //  INEX1  引数がpackedで正確に変換できないときセット、それ以外はクリア
 15796:         if (!XEiJ.fpuBox.epbIsFullSpec ()) {
 15797:           irpExceptionFormat2 (M68kException.M6E_FP_UNIMPLEMENTED_INSTRUCTION << 2, XEiJ.regPC, a);  //pcは次の命令,アドレスは実効アドレス
 15798:           break fgen;
 15799:         }
 15800:         XEiJ.fpuFPn[n].exp (XEiJ.fpuFPn[m]);
 15801:         break;
 15802: 
 15803:       case 0b001_0001:  //$xx11: FTWOTOX.* *m,FPn
 15804:         //  BSUN   常にクリア
 15805:         //  SNAN   引数がシグナリングNaNのときセット、それ以外はクリア
 15806:         //  OPERR  常にクリア
 15807:         //  OVFL   オーバーフローしたときセット、それ以外はクリア
 15808:         //  UNFL   結果が非正規化数のときセット、それ以外はクリア
 15809:         //  DZ     常にクリア
 15810:         //  INEX2  結果に誤差があるときセット、それ以外はクリア
 15811:         //  INEX1  引数がpackedで正確に変換できないときセット、それ以外はクリア
 15812:         if (!XEiJ.fpuBox.epbIsFullSpec ()) {
 15813:           irpExceptionFormat2 (M68kException.M6E_FP_UNIMPLEMENTED_INSTRUCTION << 2, XEiJ.regPC, a);  //pcは次の命令,アドレスは実効アドレス
 15814:           break fgen;
 15815:         }
 15816:         XEiJ.fpuFPn[n].exp2 (XEiJ.fpuFPn[m]);
 15817:         break;
 15818: 
 15819:       case 0b001_0010:  //$xx12: FTENTOX.* *m,FPn
 15820:       case 0b001_0011:  //$xx13: FTENTOX.* *m,FPn (MC68882)
 15821:         //  BSUN   常にクリア
 15822:         //  SNAN   引数がシグナリングNaNのときセット、それ以外はクリア
 15823:         //  OPERR  常にクリア
 15824:         //  OVFL   オーバーフローしたときセット、それ以外はクリア
 15825:         //  UNFL   結果が非正規化数のときセット、それ以外はクリア
 15826:         //  DZ     常にクリア
 15827:         //  INEX2  結果に誤差があるときセット、それ以外はクリア
 15828:         //  INEX1  引数がpackedで正確に変換できないときセット、それ以外はクリア
 15829:         if (!XEiJ.fpuBox.epbIsFullSpec ()) {
 15830:           irpExceptionFormat2 (M68kException.M6E_FP_UNIMPLEMENTED_INSTRUCTION << 2, XEiJ.regPC, a);  //pcは次の命令,アドレスは実効アドレス
 15831:           break fgen;
 15832:         }
 15833:         XEiJ.fpuFPn[n].exp10 (XEiJ.fpuFPn[m]);
 15834:         break;
 15835: 
 15836:       case 0b001_0100:  //$xx14: FLOGN.* *m,FPn
 15837:         //  BSUN   常にクリア
 15838:         //  SNAN   引数がシグナリングNaNのときセット、それ以外はクリア
 15839:         //  OPERR  引数が0よりも小さいときセット、それ以外はクリア
 15840:         //  OVFL   常にクリア
 15841:         //         log(1)=0,log(x)<=x-1なので結果が引数よりも大きくなることはない
 15842:         //  UNFL   常にクリア
 15843:         //         log(1+2^-80)≒2^-80
 15844:         //  DZ     引数がゼロのときセット、それ以外はクリア
 15845:         //  INEX2  結果に誤差があるときセット、それ以外はクリア
 15846:         //  INEX1  引数がpackedで正確に変換できないときセット、それ以外はクリア
 15847:         if (!XEiJ.fpuBox.epbIsFullSpec ()) {
 15848:           irpExceptionFormat2 (M68kException.M6E_FP_UNIMPLEMENTED_INSTRUCTION << 2, XEiJ.regPC, a);  //pcは次の命令,アドレスは実効アドレス
 15849:           break fgen;
 15850:         }
 15851:         XEiJ.fpuFPn[n].log (XEiJ.fpuFPn[m]);
 15852:         break;
 15853: 
 15854:       case 0b001_0101:  //$xx15: FLOG10.* *m,FPn
 15855:         //  BSUN   常にクリア
 15856:         //  SNAN   引数がシグナリングNaNのときセット、それ以外はクリア
 15857:         //  OPERR  引数が0よりも小さいときセット、それ以外はクリア
 15858:         //  OVFL   常にクリア
 15859:         //  UNFL   常にクリア
 15860:         //  DZ     引数がゼロのときセット、それ以外はクリア
 15861:         //  INEX2  結果に誤差があるときセット、それ以外はクリア
 15862:         //  INEX1  引数がpackedで正確に変換できないときセット、それ以外はクリア
 15863:         if (!XEiJ.fpuBox.epbIsFullSpec ()) {
 15864:           irpExceptionFormat2 (M68kException.M6E_FP_UNIMPLEMENTED_INSTRUCTION << 2, XEiJ.regPC, a);  //pcは次の命令,アドレスは実効アドレス
 15865:           break fgen;
 15866:         }
 15867:         XEiJ.fpuFPn[n].log10 (XEiJ.fpuFPn[m]);
 15868:         break;
 15869: 
 15870:       case 0b001_0110:  //$xx16: FLOG2.* *m,FPn
 15871:       case 0b001_0111:  //$xx17: FLOG2.* *m,FPn (MC68882)
 15872:         //  BSUN   常にクリア
 15873:         //  SNAN   引数がシグナリングNaNのときセット、それ以外はクリア
 15874:         //  OPERR  引数が0よりも小さいときセット、それ以外はクリア
 15875:         //  OVFL   常にクリア
 15876:         //  UNFL   常にクリア
 15877:         //  DZ     引数がゼロのときセット、それ以外はクリア
 15878:         //  INEX2  結果に誤差があるときセット、それ以外はクリア
 15879:         //  INEX1  引数がpackedで正確に変換できないときセット、それ以外はクリア
 15880:         if (!XEiJ.fpuBox.epbIsFullSpec ()) {
 15881:           irpExceptionFormat2 (M68kException.M6E_FP_UNIMPLEMENTED_INSTRUCTION << 2, XEiJ.regPC, a);  //pcは次の命令,アドレスは実効アドレス
 15882:           break fgen;
 15883:         }
 15884:         XEiJ.fpuFPn[n].log2 (XEiJ.fpuFPn[m]);
 15885:         break;
 15886: 
 15887:       case 0b001_1000:  //$xx18: FABS.* *m,FPn
 15888:         //  BSUN   常にクリア
 15889:         //  SNAN   引数がシグナリングNaNのときセット、それ以外はクリア
 15890:         //  OPERR  常にクリア
 15891:         //  OVFL   常にクリア
 15892:         //  UNFL   結果が非正規化数のときセット、それ以外はクリア
 15893:         //  DZ     常にクリア
 15894:         //  INEX2  常にクリア
 15895:         //  INEX1  引数がpackedで正確に変換できないときセット、それ以外はクリア
 15896:         XEiJ.fpuFPn[n].abs (XEiJ.fpuFPn[m]);
 15897:         break;
 15898: 
 15899:       case 0b001_1001:  //$xx19: FCOSH.* *m,FPn
 15900:         //  BSUN   常にクリア
 15901:         //  SNAN   引数がシグナリングNaNのときセット、それ以外はクリア
 15902:         //  OPERR  常にクリア
 15903:         //  OVFL   オーバーフローしたときセット、それ以外はクリア
 15904:         //  UNFL   常にクリア
 15905:         //  DZ     常にクリア
 15906:         //  INEX2  結果に誤差があるときセット、それ以外はクリア
 15907:         //  INEX1  引数がpackedで正確に変換できないときセット、それ以外はクリア
 15908:         if (!XEiJ.fpuBox.epbIsFullSpec ()) {
 15909:           irpExceptionFormat2 (M68kException.M6E_FP_UNIMPLEMENTED_INSTRUCTION << 2, XEiJ.regPC, a);  //pcは次の命令,アドレスは実効アドレス
 15910:           break fgen;
 15911:         }
 15912:         XEiJ.fpuFPn[n].cosh (XEiJ.fpuFPn[m]);
 15913:         break;
 15914: 
 15915:       case 0b001_1010:  //$xx1A: FNEG.* *m,FPn
 15916:       case 0b001_1011:  //$xx1B: FNEG.* *m,FPn (MC68882)
 15917:         //  BSUN   常にクリア
 15918:         //  SNAN   引数がシグナリングNaNのときセット、それ以外はクリア
 15919:         //  OPERR  常にクリア
 15920:         //  OVFL   常にクリア
 15921:         //  UNFL   結果が非正規化数のときセット、それ以外はクリア
 15922:         //  DZ     常にクリア
 15923:         //  INEX2  常にクリア
 15924:         //  INEX1  引数がpackedで正確に変換できないときセット、それ以外はクリア
 15925:         XEiJ.fpuFPn[n].neg (XEiJ.fpuFPn[m]);
 15926:         break;
 15927: 
 15928:       case 0b001_1100:  //$xx1C: FACOS.* *m,FPn
 15929:         //  BSUN   常にクリア
 15930:         //  SNAN   引数がシグナリングNaNのときセット、それ以外はクリア
 15931:         //  OPERR  引数の絶対値が1よりも大きいときセット、それ以外はクリア
 15932:         //  OVFL   常にクリア
 15933:         //  UNFL   常にクリア
 15934:         //         acos(1-ulp(1))はulp(1)よりも大きい
 15935:         //  DZ     常にクリア
 15936:         //  INEX2  結果に誤差があるときセット、それ以外はクリア
 15937:         //         おそらくセットされないのはacos(1)=0だけ
 15938:         //  INEX1  引数がpackedで正確に変換できないときセット、それ以外はクリア
 15939:         if (!XEiJ.fpuBox.epbIsFullSpec ()) {
 15940:           irpExceptionFormat2 (M68kException.M6E_FP_UNIMPLEMENTED_INSTRUCTION << 2, XEiJ.regPC, a);  //pcは次の命令,アドレスは実効アドレス
 15941:           break fgen;
 15942:         }
 15943:         XEiJ.fpuFPn[n].acos (XEiJ.fpuFPn[m]);
 15944:         break;
 15945: 
 15946:       case 0b001_1101:  //$xx1D: FCOS.* *m,FPn
 15947:         //  BSUN   常にクリア
 15948:         //  SNAN   引数がシグナリングNaNのときセット、それ以外はクリア
 15949:         //  OPERR  引数が無限大のときセット、それ以外はクリア
 15950:         //  OVFL   常にクリア
 15951:         //  UNFL   常にクリア
 15952:         //         cos(x)=0を満たすxは正確に表現できず、cos(pi/2)とcos(3*pi/2)が正規化数になってしまう
 15953:         //  DZ     常にクリア
 15954:         //  INEX2  結果に誤差があるときセット、それ以外はクリア
 15955:         //  INEX1  引数がpackedで正確に変換できないときセット、それ以外はクリア
 15956:         if (!XEiJ.fpuBox.epbIsFullSpec ()) {
 15957:           irpExceptionFormat2 (M68kException.M6E_FP_UNIMPLEMENTED_INSTRUCTION << 2, XEiJ.regPC, a);  //pcは次の命令,アドレスは実効アドレス
 15958:           break fgen;
 15959:         }
 15960:         XEiJ.fpuFPn[n].cos (XEiJ.fpuFPn[m]);
 15961:         break;
 15962: 
 15963:       case 0b001_1110:  //$xx1E: FGETEXP.* *m,FPn
 15964:         //  BSUN   常にクリア
 15965:         //  SNAN   引数がシグナリングNaNのときセット、それ以外はクリア
 15966:         //  OPERR  引数が無限大のときセット、それ以外はクリア
 15967:         //  OVFL   常にクリア
 15968:         //  UNFL   常にクリア
 15969:         //  DZ     常にクリア
 15970:         //  INEX2  常にクリア
 15971:         //  INEX1  引数がpackedで正確に変換できないときセット、それ以外はクリア
 15972:         if (!XEiJ.fpuBox.epbIsFullSpec ()) {
 15973:           irpExceptionFormat2 (M68kException.M6E_FP_UNIMPLEMENTED_INSTRUCTION << 2, XEiJ.regPC, a);  //pcは次の命令,アドレスは実効アドレス
 15974:           break fgen;
 15975:         }
 15976:         XEiJ.fpuFPn[n].getexp (XEiJ.fpuFPn[m]);
 15977:         break;
 15978: 
 15979:       case 0b001_1111:  //$xx1F: FGETMAN.* *m,FPn
 15980:         //  BSUN   常にクリア
 15981:         //  SNAN   引数がシグナリングNaNのときセット、それ以外はクリア
 15982:         //  OPERR  引数が無限大のときセット、それ以外はクリア
 15983:         //  OVFL   常にクリア
 15984:         //  UNFL   常にクリア
 15985:         //  DZ     常にクリア
 15986:         //  INEX2  常にクリア
 15987:         //  INEX1  引数がpackedで正確に変換できないときセット、それ以外はクリア
 15988:         if (!XEiJ.fpuBox.epbIsFullSpec ()) {
 15989:           irpExceptionFormat2 (M68kException.M6E_FP_UNIMPLEMENTED_INSTRUCTION << 2, XEiJ.regPC, a);  //pcは次の命令,アドレスは実効アドレス
 15990:           break fgen;
 15991:         }
 15992:         XEiJ.fpuFPn[n].getman (XEiJ.fpuFPn[m]);
 15993:         break;
 15994: 
 15995:       case 0b010_0000:  //$xx20: FDIV.* *m,FPn
 15996:         //  BSUN   常にクリア
 15997:         //  SNAN   引数がシグナリングNaNのときセット、それ以外はクリア
 15998:         //  OPERR  引数が両方ゼロまたは両方無限大のときセット、それ以外はクリア
 15999:         //  OVFL   オーバーフローしたときセット、それ以外はクリア
 16000:         //  UNFL   結果が非正規化数のときセット、それ以外はクリア
 16001:         //  DZ     被除数がゼロ、無限大、NaN以外で除数がゼロのときセット、それ以外はクリア
 16002:         //  INEX2  結果に誤差があるときセット、それ以外はクリア
 16003:         //  INEX1  引数がpackedで正確に変換できないときセット、それ以外はクリア
 16004:         XEiJ.mpuCycleCount += 36;
 16005:         XEiJ.fpuFPn[n].div (XEiJ.fpuFPn[m]);
 16006:         break;
 16007: 
 16008:       case 0b010_0001:  //$xx21: FMOD.* *m,FPn
 16009:         //  BSUN   常にクリア
 16010:         //  SNAN   引数がシグナリングNaNのときセット、それ以外はクリア
 16011:         //  OPERR  除数がゼロまたは被除数が無限大のときセット、それ以外はクリア
 16012:         //  OVFL   常にクリア
 16013:         //  UNFL   結果が非正規化数のときセット、それ以外はクリア
 16014:         //  DZ     常にクリア
 16015:         //         除数がゼロのとき結果は無限大ではなくNaNでありゼロ除算にはならない
 16016:         //  INEX2  結果に誤差があるときセット、それ以外はクリア
 16017:         //  INEX1  引数がpackedで正確に変換できないときセット、それ以外はクリア
 16018:         //  FPSRのquotient byteに符号付き商の下位7bitが入る
 16019:         if (!XEiJ.fpuBox.epbIsFullSpec ()) {
 16020:           irpExceptionFormat2 (M68kException.M6E_FP_UNIMPLEMENTED_INSTRUCTION << 2, XEiJ.regPC, a);  //pcは次の命令,アドレスは実効アドレス
 16021:           break fgen;
 16022:         }
 16023:         XEiJ.fpuFPn[n].rem (XEiJ.fpuFPn[m]);
 16024:         break;
 16025: 
 16026:       case 0b010_0010:  //$xx22: FADD.* *m,FPn
 16027:         //  BSUN   常にクリア
 16028:         //  SNAN   引数がシグナリングNaNのときセット、それ以外はクリア
 16029:         //  OPERR  引数が両方無限大で符号が異なるときセット、それ以外はクリア
 16030:         //  OVFL   オーバーフローしたときセット、それ以外はクリア
 16031:         //  UNFL   結果が非正規化数のときセット、それ以外はクリア
 16032:         //  DZ     常にクリア
 16033:         //  INEX2  結果に誤差があるときセット、それ以外はクリア
 16034:         //  INEX1  引数がpackedで正確に変換できないときセット、それ以外はクリア
 16035:         XEiJ.mpuCycleCount += 2;
 16036:         XEiJ.fpuFPn[n].add (XEiJ.fpuFPn[m]);
 16037:         break;
 16038: 
 16039:       case 0b010_0011:  //$xx23: FMUL.* *m,FPn
 16040:         //  BSUN   常にクリア
 16041:         //  SNAN   引数がシグナリングNaNのときセット、それ以外はクリア
 16042:         //  OPERR  引数の一方がゼロで他方が無限大のときセット、それ以外はクリア
 16043:         //  OVFL   オーバーフローしたときセット、それ以外はクリア
 16044:         //  UNFL   結果が非正規化数のときセット、それ以外はクリア
 16045:         //  DZ     常にクリア
 16046:         //  INEX2  結果に誤差があるときセット、それ以外はクリア
 16047:         //  INEX1  引数がpackedで正確に変換できないときセット、それ以外はクリア
 16048:         XEiJ.mpuCycleCount += 2;
 16049:         XEiJ.fpuFPn[n].mul (XEiJ.fpuFPn[m]);
 16050:         break;
 16051: 
 16052:       case 0b010_0100:  //$xx24: FSGLDIV.* *m,FPn
 16053:         //  BSUN   常にクリア
 16054:         //  SNAN   引数がシグナリングNaNのときセット、それ以外はクリア
 16055:         //  OPERR  引数が両方ゼロまたは両方無限大のときセット、それ以外はクリア
 16056:         //  OVFL   オーバーフローしたときセット、それ以外はクリア
 16057:         //  UNFL   結果が非正規化数のときセット、それ以外はクリア
 16058:         //  DZ     被除数がゼロ、無限大、NaN以外で除数がゼロのときセット、それ以外はクリア
 16059:         //  INEX2  結果に誤差があるときセット、それ以外はクリア
 16060:         //  INEX1  引数がpackedで正確に変換できないときセット、それ以外はクリア
 16061:         XEiJ.mpuCycleCount += 36;
 16062:         XEiJ.fpuBox.epbSetRoundingPrec (EFPBox.EPB_PREC_XSG);
 16063:         XEiJ.fpuFPn[n].div (XEiJ.fpuFPn[m]);
 16064:         break;
 16065: 
 16066:       case 0b010_0101:  //$xx25: FREM.* *m,FPn
 16067:         //  BSUN   常にクリア
 16068:         //  SNAN   引数がシグナリングNaNのときセット、それ以外はクリア
 16069:         //  OPERR  除数がゼロまたは被除数が無限大のときセット、それ以外はクリア
 16070:         //  OVFL   常にクリア
 16071:         //  UNFL   結果が非正規化数のときセット、それ以外はクリア
 16072:         //  DZ     常にクリア
 16073:         //         除数がゼロのとき結果は無限大ではなくNaNでありゼロ除算にはならない
 16074:         //  INEX2  結果に誤差があるときセット、それ以外はクリア
 16075:         //         マニュアルにClearedと書いてあるのは間違い
 16076:         //         除数が無限大で被除数をそのまま返す場合でもサイズが減ればアンダーフローや不正確な結果になることはマニュアルにも書かれている
 16077:         //  INEX1  引数がpackedで正確に変換できないときセット、それ以外はクリア
 16078:         //  FPSRのquotient byteに符号付き商の下位7bitが入る
 16079:         if (!XEiJ.fpuBox.epbIsFullSpec ()) {
 16080:           irpExceptionFormat2 (M68kException.M6E_FP_UNIMPLEMENTED_INSTRUCTION << 2, XEiJ.regPC, a);  //pcは次の命令,アドレスは実効アドレス
 16081:           break fgen;
 16082:         }
 16083:         XEiJ.fpuFPn[n].ieeerem (XEiJ.fpuFPn[m]);
 16084:         break;
 16085: 
 16086:       case 0b010_0110:  //$xx26: FSCALE.* *m,FPn
 16087:         //  BSUN   常にクリア
 16088:         //  SNAN   引数がシグナリングNaNのときセット、それ以外はクリア
 16089:         //  OPERR  引数が無限大のときセット、それ以外はクリア
 16090:         //  OVFL   オーバーフローしたときセット、それ以外はクリア
 16091:         //  UNFL   結果が非正規化数のときセット、それ以外はクリア
 16092:         //  DZ     常にクリア
 16093:         //  INEX2  常にクリア
 16094:         //  INEX1  引数がpackedで正確に変換できないときセット、それ以外はクリア
 16095:         if (!XEiJ.fpuBox.epbIsFullSpec ()) {
 16096:           irpExceptionFormat2 (M68kException.M6E_FP_UNIMPLEMENTED_INSTRUCTION << 2, XEiJ.regPC, a);  //pcは次の命令,アドレスは実効アドレス
 16097:           break fgen;
 16098:         }
 16099:         //! 本来はソースが整数のとき浮動小数点数を経由しないが、これは経由してしまっている。結果は同じだが効率が悪い
 16100:         XEiJ.fpuFPn[n].scale (XEiJ.fpuFPn[m]);
 16101:         break;
 16102: 
 16103:       case 0b010_0111:  //$xx27: FSGLMUL.* *m,FPn
 16104:         //  BSUN   常にクリア
 16105:         //  SNAN   引数がシグナリングNaNのときセット、それ以外はクリア
 16106:         //  OPERR  引数の一方がゼロで他方が無限大のときセット、それ以外はクリア
 16107:         //  OVFL   オーバーフローしたときセット、それ以外はクリア
 16108:         //  UNFL   結果が非正規化数のときセット、それ以外はクリア
 16109:         //  DZ     常にクリア
 16110:         //  INEX2  結果に誤差があるときセット、それ以外はクリア
 16111:         //  INEX1  引数がpackedで正確に変換できないときセット、それ以外はクリア
 16112:         XEiJ.mpuCycleCount += 2;
 16113:         {
 16114:           //引数を24bitに切り捨てるときX2をセットしない
 16115:           int sr = XEiJ.fpuBox.epbFpsr;
 16116:           XEiJ.fpuFPn[EFPBox.EPB_SRC_TMP].roundmanf (XEiJ.fpuFPn[m], EFPBox.EPB_MODE_RZ);
 16117:           XEiJ.fpuFPn[EFPBox.EPB_DST_TMP].roundmanf (XEiJ.fpuFPn[n], EFPBox.EPB_MODE_RZ);
 16118:           XEiJ.fpuBox.epbFpsr = sr;
 16119:         }
 16120:         XEiJ.fpuBox.epbSetRoundingPrec (EFPBox.EPB_PREC_XSG);
 16121:         XEiJ.fpuFPn[n].mul (XEiJ.fpuFPn[EFPBox.EPB_DST_TMP], XEiJ.fpuFPn[EFPBox.EPB_SRC_TMP]);
 16122:         break;
 16123: 
 16124:       case 0b010_1000:  //$xx28: FSUB.* *m,FPn
 16125:       case 0b010_1001:  //$xx29: FSUB.* *m,FPn (MC68882)
 16126:       case 0b010_1010:  //$xx2A: FSUB.* *m,FPn (MC68882)
 16127:       case 0b010_1011:  //$xx2B: FSUB.* *m,FPn (MC68882)
 16128:       case 0b010_1100:  //$xx2C: FSUB.* *m,FPn (MC68882)
 16129:       case 0b010_1101:  //$xx2D: FSUB.* *m,FPn (MC68882)
 16130:       case 0b010_1110:  //$xx2E: FSUB.* *m,FPn (MC68882)
 16131:       case 0b010_1111:  //$xx2F: FSUB.* *m,FPn (MC68882)
 16132:         //  BSUN   常にクリア
 16133:         //  SNAN   引数がシグナリングNaNのときセット、それ以外はクリア
 16134:         //  OPERR  引数が両方無限大で符号が同じときセット、それ以外はクリア
 16135:         //  OVFL   オーバーフローしたときセット、それ以外はクリア
 16136:         //  UNFL   結果が非正規化数のときセット、それ以外はクリア
 16137:         //  DZ     常にクリア
 16138:         //  INEX2  結果に誤差があるときセット、それ以外はクリア
 16139:         //  INEX1  引数がpackedで正確に変換できないときセット、それ以外はクリア
 16140:         XEiJ.mpuCycleCount += 2;
 16141:         XEiJ.fpuFPn[n].sub (XEiJ.fpuFPn[m]);
 16142:         break;
 16143: 
 16144:       case 0b011_0000:  //$xx30: FSINCOS.* *m,FP0:FPn (c=0,s=n)
 16145:       case 0b011_0001:  //$xx31: FSINCOS.* *m,FP1:FPn (c=1,s=n)
 16146:       case 0b011_0010:  //$xx32: FSINCOS.* *m,FP2:FPn (c=2,s=n)
 16147:       case 0b011_0011:  //$xx33: FSINCOS.* *m,FP3:FPn (c=3,s=n)
 16148:       case 0b011_0100:  //$xx34: FSINCOS.* *m,FP4:FPn (c=4,s=n)
 16149:       case 0b011_0101:  //$xx35: FSINCOS.* *m,FP5:FPn (c=5,s=n)
 16150:       case 0b011_0110:  //$xx36: FSINCOS.* *m,FP6:FPn (c=6,s=n)
 16151:       case 0b011_0111:  //$xx37: FSINCOS.* *m,FP7:FPn (c=7,s=n)
 16152:         //  BSUN   常にクリア
 16153:         //  SNAN   引数がシグナリングNaNのときセット、それ以外はクリア
 16154:         //  OPERR  引数が無限大のときセット、それ以外はクリア
 16155:         //  OVFL   常にクリア
 16156:         //  UNFL   sin(x)の結果が非正規化数のときセット、それ以外はクリア
 16157:         //         cos(x)の結果は非正規化数にならない
 16158:         //  DZ     常にクリア
 16159:         //  INEX2  結果に誤差があるときセット、それ以外はクリア
 16160:         //  INEX1  引数がpackedで正確に変換できないときセット、それ以外はクリア
 16161:         if (!XEiJ.fpuBox.epbIsFullSpec ()) {
 16162:           irpExceptionFormat2 (M68kException.M6E_FP_UNIMPLEMENTED_INSTRUCTION << 2, XEiJ.regPC, a);  //pcは次の命令,アドレスは実効アドレス
 16163:           break fgen;
 16164:         }
 16165:         c &= 7;
 16166:         //m==EFPBox.EPB_SRC_TMP||m==n||m==cの場合があることに注意する
 16167:         XEiJ.fpuFPn[EFPBox.EPB_SRC_TMP].sete (XEiJ.fpuFPn[m]);
 16168:         XEiJ.fpuFPn[c].cos (XEiJ.fpuFPn[EFPBox.EPB_SRC_TMP]);
 16169:         XEiJ.fpuFPn[n].sin (XEiJ.fpuFPn[EFPBox.EPB_SRC_TMP]);
 16170:         break;
 16171: 
 16172:       case 0b011_1000:  //$xx38: FCMP.* *m,FPn
 16173:       case 0b011_1001:  //$xx39: FCMP.* *m,FPn (MC68882)
 16174:       case 0b011_1100:  //$xx3C: FCMP.* *m,FPn (MC68882)  コマンドワードの不連続箇所に注意
 16175:       case 0b011_1101:  //$xx3D: FCMP.* *m,FPn (MC68882)
 16176:         //  BSUN   常にクリア
 16177:         //  SNAN   引数がシグナリングNaNのときセット、それ以外はクリア
 16178:         //  OPERR  常にクリア
 16179:         //  OVFL   常にクリア
 16180:         //  UNFL   常にクリア
 16181:         //  DZ     常にクリア
 16182:         //  INEX2  常にクリア
 16183:         //  INEX1  引数がpackedで正確に変換できないときセット、それ以外はクリア
 16184:         //  FCMPはinfinityを常にクリアする
 16185:         //  efp.compareTo(x,y)を使う
 16186:         //    efp.compareTo(x,y)はefp.sub(x,y)よりも速い
 16187:         //    efp.sub(x,y)はINEX2をセットしてしまう
 16188:         //  efp.compareTo(x,y)は-0<+0だがFCMPは-0==+0なのでこれだけ調節する
 16189:         {
 16190:           int xf = XEiJ.fpuFPn[n].flg;
 16191:           int yf = XEiJ.fpuFPn[m].flg;
 16192:           if ((xf | yf) << 3 < 0) {  //どちらかがNaN
 16193:             //XEiJ.fpuFPn[EFPBox.EPB_DST_TMP].setnan ();
 16194:             XEiJ.fpuFPn[EFPBox.EPB_DST_TMP].flg = EFPBox.N;
 16195:           } else {
 16196:             int i = ((xf & yf) << 1 < 0 ? 0 :  //両方±0
 16197:                      XEiJ.fpuFPn[n].compareTo (XEiJ.fpuFPn[m]));  //-Inf==-Inf<-x<-0<+0<+x<+Inf==+Inf<NaN==NaN
 16198:             if (i == 0) {
 16199:               if (xf < 0) {
 16200:                 //XEiJ.fpuFPn[EFPBox.EPB_DST_TMP].negset0 ();
 16201:                 XEiJ.fpuFPn[EFPBox.EPB_DST_TMP].flg = EFPBox.M | EFPBox.Z;
 16202:               } else {
 16203:                 //XEiJ.fpuFPn[EFPBox.EPB_DST_TMP].set0 ();
 16204:                 XEiJ.fpuFPn[EFPBox.EPB_DST_TMP].flg = EFPBox.P | EFPBox.Z;
 16205:               }
 16206:             } else if (i < 0) {
 16207:               XEiJ.fpuFPn[EFPBox.EPB_DST_TMP].negset1 ();
 16208:             } else {
 16209:               XEiJ.fpuFPn[EFPBox.EPB_DST_TMP].set1 ();
 16210:             }
 16211:           }
 16212:           n = EFPBox.EPB_DST_TMP;
 16213:         }
 16214:         break;
 16215: 
 16216:       case 0b011_1010:  //$xx3A: FTST.* *m
 16217:       case 0b011_1011:  //$xx3B: FTST.* *m (MC68882)
 16218:       case 0b011_1110:  //$xx3E: FTST.* *m (MC68882)  コマンドワードの不連続箇所に注意
 16219:       case 0b011_1111:  //$xx3F: FTST.* *m (MC68882)
 16220:         //  BSUN   常にクリア
 16221:         //  SNAN   引数がシグナリングNaNのときセット、それ以外はクリア
 16222:         //  OPERR  常にクリア
 16223:         //  OVFL   常にクリア
 16224:         //  UNFL   常にクリア
 16225:         //  DZ     常にクリア
 16226:         //  INEX2  常にクリア
 16227:         //  INEX1  引数がpackedで正確に変換できないときセット、それ以外はクリア
 16228:         //  ソースオペランドをダミーのデスティネーションオペランドにコピーしてテストする
 16229:         //  デスティネーションオペランドは変化しない
 16230:         //  デスティネーションオペランドにはFP0が指定される場合が多いがFP0である必要はない
 16231:         XEiJ.fpuFPn[EFPBox.EPB_DST_TMP].sete (XEiJ.fpuFPn[m]);
 16232:         n = EFPBox.EPB_DST_TMP;
 16233:         break;
 16234: 
 16235:       case 0b100_0000:  //$xx40: FSMOVE.* *m,FPn
 16236:         //  BSUN   常にクリア
 16237:         //  SNAN   引数がシグナリングNaNのときセット、それ以外はクリア
 16238:         //  OPERR  常にクリア
 16239:         //  OVFL   常にクリア
 16240:         //  UNFL   結果が非正規化数のときセット、それ以外はクリア
 16241:         //  DZ     常にクリア
 16242:         //  INEX2  結果に誤差があるときセット、それ以外はクリア
 16243:         //  INEX1  引数がpackedで正確に変換できないときセット、それ以外はクリア
 16244:         XEiJ.fpuBox.epbSetRoundingPrec (EFPBox.EPB_PREC_SGL);
 16245:         XEiJ.fpuFPn[n].sete (XEiJ.fpuFPn[m]).finish ();
 16246:         break;
 16247: 
 16248:       case 0b100_0001:  //$xx41: FSSQRT.* *m,FPn
 16249:         //  BSUN   常にクリア
 16250:         //  SNAN   引数がシグナリングNaNのときセット、それ以外はクリア
 16251:         //  OPERR  引数が-0を除く負数のときセット、それ以外はクリア
 16252:         //  OVFL   常にクリア
 16253:         //  UNFL   常にクリア
 16254:         //  DZ     常にクリア
 16255:         //  INEX2  結果に誤差があるときセット、それ以外はクリア
 16256:         //  INEX1  引数がpackedで正確に変換できないときセット、それ以外はクリア
 16257:         XEiJ.mpuCycleCount += 67;
 16258:         XEiJ.fpuBox.epbSetRoundingPrec (EFPBox.EPB_PREC_SGL);
 16259:         XEiJ.fpuFPn[n].sqrt (XEiJ.fpuFPn[m]);
 16260:         break;
 16261: 
 16262:         //case 0b100_0010:  //$xx42:
 16263:         //case 0b100_0011:  //$xx43:
 16264: 
 16265:       case 0b100_0100:  //$xx44: FDMOVE.* *m,FPn
 16266:         //  BSUN   常にクリア
 16267:         //  SNAN   引数がシグナリングNaNのときセット、それ以外はクリア
 16268:         //  OPERR  常にクリア
 16269:         //  OVFL   常にクリア
 16270:         //  UNFL   結果が非正規化数のときセット、それ以外はクリア
 16271:         //  DZ     常にクリア
 16272:         //  INEX2  結果に誤差があるときセット、それ以外はクリア
 16273:         //  INEX1  引数がpackedで正確に変換できないときセット、それ以外はクリア
 16274:         XEiJ.fpuBox.epbSetRoundingPrec (EFPBox.EPB_PREC_DBL);
 16275:         XEiJ.fpuFPn[n].sete (XEiJ.fpuFPn[m]).finish ();
 16276:         break;
 16277: 
 16278:       case 0b100_0101:  //$xx45: FDSQRT.* *m,FPn
 16279:         //  BSUN   常にクリア
 16280:         //  SNAN   引数がシグナリングNaNのときセット、それ以外はクリア
 16281:         //  OPERR  引数が-0を除く負数のときセット、それ以外はクリア
 16282:         //  OVFL   常にクリア
 16283:         //  UNFL   常にクリア
 16284:         //  DZ     常にクリア
 16285:         //  INEX2  結果に誤差があるときセット、それ以外はクリア
 16286:         //  INEX1  引数がpackedで正確に変換できないときセット、それ以外はクリア
 16287:         XEiJ.mpuCycleCount += 67;
 16288:         XEiJ.fpuBox.epbSetRoundingPrec (EFPBox.EPB_PREC_DBL);
 16289:         XEiJ.fpuFPn[n].sqrt (XEiJ.fpuFPn[m]);
 16290:         break;
 16291: 
 16292:         //case 0b100_0110:  //$xx46:
 16293:         //case 0b100_0111:  //$xx47:
 16294:         //case 0b100_1000:  //$xx48:
 16295:         //case 0b100_1001:  //$xx49:
 16296:         //case 0b100_1010:  //$xx4A:
 16297:         //case 0b100_1011:  //$xx4B:
 16298:         //case 0b100_1100:  //$xx4C:
 16299:         //case 0b100_1101:  //$xx4D:
 16300:         //case 0b100_1110:  //$xx4E:
 16301:         //case 0b100_1111:  //$xx4F:
 16302:         //case 0b101_0000:  //$xx50:
 16303:         //case 0b101_0001:  //$xx51:
 16304:         //case 0b101_0010:  //$xx52:
 16305:         //case 0b101_0011:  //$xx53:
 16306:         //case 0b101_0100:  //$xx54:
 16307:         //case 0b101_0101:  //$xx55:
 16308:         //case 0b101_0110:  //$xx56:
 16309:         //case 0b101_0111:  //$xx57:
 16310: 
 16311:       case 0b101_1000:  //$xx58: FSABS.* *m,FPn
 16312:         //  BSUN   常にクリア
 16313:         //  SNAN   引数がシグナリングNaNのときセット、それ以外はクリア
 16314:         //  OPERR  常にクリア
 16315:         //  OVFL   常にクリア
 16316:         //  UNFL   結果が非正規化数のときセット、それ以外はクリア
 16317:         //  DZ     常にクリア
 16318:         //  INEX2  常にクリア
 16319:         //  INEX1  引数がpackedで正確に変換できないときセット、それ以外はクリア
 16320:         XEiJ.fpuBox.epbSetRoundingPrec (EFPBox.EPB_PREC_SGL);
 16321:         XEiJ.fpuFPn[n].abs (XEiJ.fpuFPn[m]);
 16322:         break;
 16323: 
 16324:         //case 0b101_1001:  //$xx59:
 16325: 
 16326:       case 0b101_1010:  //$xx5A: FSNEG.* *m,FPn
 16327:         //  BSUN   常にクリア
 16328:         //  SNAN   引数がシグナリングNaNのときセット、それ以外はクリア
 16329:         //  OPERR  常にクリア
 16330:         //  OVFL   常にクリア
 16331:         //  UNFL   結果が非正規化数のときセット、それ以外はクリア
 16332:         //  DZ     常にクリア
 16333:         //  INEX2  常にクリア
 16334:         //  INEX1  引数がpackedで正確に変換できないときセット、それ以外はクリア
 16335:         XEiJ.fpuBox.epbSetRoundingPrec (EFPBox.EPB_PREC_SGL);
 16336:         XEiJ.fpuFPn[n].neg (XEiJ.fpuFPn[m]);
 16337:         break;
 16338: 
 16339:         //case 0b101_1011:  //$xx5B:
 16340: 
 16341:       case 0b101_1100:  //$xx5C: FDABS.* *m,FPn
 16342:         //  BSUN   常にクリア
 16343:         //  SNAN   引数がシグナリングNaNのときセット、それ以外はクリア
 16344:         //  OPERR  常にクリア
 16345:         //  OVFL   常にクリア
 16346:         //  UNFL   結果が非正規化数のときセット、それ以外はクリア
 16347:         //  DZ     常にクリア
 16348:         //  INEX2  常にクリア
 16349:         //  INEX1  引数がpackedで正確に変換できないときセット、それ以外はクリア
 16350:         XEiJ.fpuBox.epbSetRoundingPrec (EFPBox.EPB_PREC_DBL);
 16351:         XEiJ.fpuFPn[n].abs (XEiJ.fpuFPn[m]);
 16352:         break;
 16353: 
 16354:         //case 0b101_1101:  //$xx5D:
 16355: 
 16356:       case 0b101_1110:  //$xx5E: FDNEG.* *m,FPn
 16357:         //  BSUN   常にクリア
 16358:         //  SNAN   引数がシグナリングNaNのときセット、それ以外はクリア
 16359:         //  OPERR  常にクリア
 16360:         //  OVFL   常にクリア
 16361:         //  UNFL   結果が非正規化数のときセット、それ以外はクリア
 16362:         //  DZ     常にクリア
 16363:         //  INEX2  常にクリア
 16364:         //  INEX1  引数がpackedで正確に変換できないときセット、それ以外はクリア
 16365:         XEiJ.fpuBox.epbSetRoundingPrec (EFPBox.EPB_PREC_DBL);
 16366:         XEiJ.fpuFPn[n].neg (XEiJ.fpuFPn[m]);
 16367:         break;
 16368: 
 16369:         //case 0b101_1111:  //$xx5F:
 16370: 
 16371:       case 0b110_0000:  //$xx60: FSDIV.* *m,FPn
 16372:         //  BSUN   常にクリア
 16373:         //  SNAN   引数がシグナリングNaNのときセット、それ以外はクリア
 16374:         //  OPERR  引数が両方ゼロまたは両方無限大のときセット、それ以外はクリア
 16375:         //  OVFL   オーバーフローしたときセット、それ以外はクリア
 16376:         //  UNFL   結果が非正規化数のときセット、それ以外はクリア
 16377:         //  DZ     被除数がゼロ、無限大、NaN以外で除数がゼロのときセット、それ以外はクリア
 16378:         //  INEX2  結果に誤差があるときセット、それ以外はクリア
 16379:         //  INEX1  引数がpackedで正確に変換できないときセット、それ以外はクリア
 16380:         XEiJ.mpuCycleCount += 36;
 16381:         XEiJ.fpuBox.epbSetRoundingPrec (EFPBox.EPB_PREC_SGL);
 16382:         XEiJ.fpuFPn[n].div (XEiJ.fpuFPn[m]);
 16383:         break;
 16384: 
 16385:         //case 0b110_0001:  //$xx61:
 16386: 
 16387:       case 0b110_0010:  //$xx62: FSADD.* *m,FPn
 16388:         //  BSUN   常にクリア
 16389:         //  SNAN   引数がシグナリングNaNのときセット、それ以外はクリア
 16390:         //  OPERR  引数が両方無限大で符号が異なるときセット、それ以外はクリア
 16391:         //  OVFL   オーバーフローしたときセット、それ以外はクリア
 16392:         //  UNFL   結果が非正規化数のときセット、それ以外はクリア
 16393:         //  DZ     常にクリア
 16394:         //  INEX2  結果に誤差があるときセット、それ以外はクリア
 16395:         //  INEX1  引数がpackedで正確に変換できないときセット、それ以外はクリア
 16396:         XEiJ.mpuCycleCount += 2;
 16397:         XEiJ.fpuBox.epbSetRoundingPrec (EFPBox.EPB_PREC_SGL);
 16398:         XEiJ.fpuFPn[n].add (XEiJ.fpuFPn[m]);
 16399:         break;
 16400: 
 16401:       case 0b110_0011:  //$xx63: FSMUL.* *m,FPn
 16402:         //  BSUN   常にクリア
 16403:         //  SNAN   引数がシグナリングNaNのときセット、それ以外はクリア
 16404:         //  OPERR  引数の一方がゼロで他方が無限大のときセット、それ以外はクリア
 16405:         //  OVFL   オーバーフローしたときセット、それ以外はクリア
 16406:         //  UNFL   結果が非正規化数のときセット、それ以外はクリア
 16407:         //  DZ     常にクリア
 16408:         //  INEX2  結果に誤差があるときセット、それ以外はクリア
 16409:         //  INEX1  引数がpackedで正確に変換できないときセット、それ以外はクリア
 16410:         XEiJ.mpuCycleCount += 2;
 16411:         XEiJ.fpuBox.epbSetRoundingPrec (EFPBox.EPB_PREC_SGL);
 16412:         XEiJ.fpuFPn[n].mul (XEiJ.fpuFPn[m]);
 16413:         break;
 16414: 
 16415:       case 0b110_0100:  //$xx64: FDDIV.* *m,FPn
 16416:         //  BSUN   常にクリア
 16417:         //  SNAN   引数がシグナリングNaNのときセット、それ以外はクリア
 16418:         //  OPERR  引数が両方ゼロまたは両方無限大のときセット、それ以外はクリア
 16419:         //  OVFL   オーバーフローしたときセット、それ以外はクリア
 16420:         //  UNFL   結果が非正規化数のときセット、それ以外はクリア
 16421:         //  DZ     被除数がゼロ、無限大、NaN以外で除数がゼロのときセット、それ以外はクリア
 16422:         //  INEX2  結果に誤差があるときセット、それ以外はクリア
 16423:         //  INEX1  引数がpackedで正確に変換できないときセット、それ以外はクリア
 16424:         XEiJ.mpuCycleCount += 36;
 16425:         XEiJ.fpuBox.epbSetRoundingPrec (EFPBox.EPB_PREC_DBL);
 16426:         XEiJ.fpuFPn[n].div (XEiJ.fpuFPn[m]);
 16427:         break;
 16428: 
 16429:         //case 0b110_0101:  //$xx65:
 16430: 
 16431:       case 0b110_0110:  //$xx66: FDADD.* *m,FPn
 16432:         //  BSUN   常にクリア
 16433:         //  SNAN   引数がシグナリングNaNのときセット、それ以外はクリア
 16434:         //  OPERR  引数が両方無限大で符号が異なるときセット、それ以外はクリア
 16435:         //  OVFL   オーバーフローしたときセット、それ以外はクリア
 16436:         //  UNFL   結果が非正規化数のときセット、それ以外はクリア
 16437:         //  DZ     常にクリア
 16438:         //  INEX2  結果に誤差があるときセット、それ以外はクリア
 16439:         //  INEX1  引数がpackedで正確に変換できないときセット、それ以外はクリア
 16440:         XEiJ.mpuCycleCount += 2;
 16441:         XEiJ.fpuBox.epbSetRoundingPrec (EFPBox.EPB_PREC_DBL);
 16442:         XEiJ.fpuFPn[n].add (XEiJ.fpuFPn[m]);
 16443:         break;
 16444: 
 16445:       case 0b110_0111:  //$xx67: FDMUL.* *m,FPn
 16446:         //  BSUN   常にクリア
 16447:         //  SNAN   引数がシグナリングNaNのときセット、それ以外はクリア
 16448:         //  OPERR  引数の一方がゼロで他方が無限大のときセット、それ以外はクリア
 16449:         //  OVFL   オーバーフローしたときセット、それ以外はクリア
 16450:         //  UNFL   結果が非正規化数のときセット、それ以外はクリア
 16451:         //  DZ     常にクリア
 16452:         //  INEX2  結果に誤差があるときセット、それ以外はクリア
 16453:         //  INEX1  引数がpackedで正確に変換できないときセット、それ以外はクリア
 16454:         XEiJ.mpuCycleCount += 2;
 16455:         XEiJ.fpuBox.epbSetRoundingPrec (EFPBox.EPB_PREC_DBL);
 16456:         XEiJ.fpuFPn[n].mul (XEiJ.fpuFPn[m]);
 16457:         break;
 16458: 
 16459:       case 0b110_1000:  //$xx68: FSSUB.* *m,FPn
 16460:         //  BSUN   常にクリア
 16461:         //  SNAN   引数がシグナリングNaNのときセット、それ以外はクリア
 16462:         //  OPERR  引数が両方無限大で符号が同じときセット、それ以外はクリア
 16463:         //  OVFL   オーバーフローしたときセット、それ以外はクリア
 16464:         //  UNFL   結果が非正規化数のときセット、それ以外はクリア
 16465:         //  DZ     常にクリア
 16466:         //  INEX2  結果に誤差があるときセット、それ以外はクリア
 16467:         //  INEX1  引数がpackedで正確に変換できないときセット、それ以外はクリア
 16468:         XEiJ.mpuCycleCount += 2;
 16469:         XEiJ.fpuBox.epbSetRoundingPrec (EFPBox.EPB_PREC_SGL);
 16470:         XEiJ.fpuFPn[n].sub (XEiJ.fpuFPn[m]);
 16471:         break;
 16472: 
 16473:         //case 0b110_1001:  //$xx69:
 16474:         //case 0b110_1010:  //$xx6A:
 16475:         //case 0b110_1011:  //$xx6B:
 16476: 
 16477:       case 0b110_1100:  //$xx6C: FDSUB.* *m,FPn
 16478:         //  BSUN   常にクリア
 16479:         //  SNAN   引数がシグナリングNaNのときセット、それ以外はクリア
 16480:         //  OPERR  引数が両方無限大で符号が同じときセット、それ以外はクリア
 16481:         //  OVFL   オーバーフローしたときセット、それ以外はクリア
 16482:         //  UNFL   結果が非正規化数のときセット、それ以外はクリア
 16483:         //  DZ     常にクリア
 16484:         //  INEX2  結果に誤差があるときセット、それ以外はクリア
 16485:         //  INEX1  引数がpackedで正確に変換できないときセット、それ以外はクリア
 16486:         XEiJ.mpuCycleCount += 2;
 16487:         XEiJ.fpuBox.epbSetRoundingPrec (EFPBox.EPB_PREC_DBL);
 16488:         XEiJ.fpuFPn[n].sub (XEiJ.fpuFPn[m]);
 16489:         break;
 16490: 
 16491:         //case 0b110_1101:  //$xx6D:
 16492:         //case 0b110_1110:  //$xx6E:
 16493:         //case 0b110_1111:  //$xx6F:
 16494: 
 16495:       case 0b111_0000:  //$xx70: FLGAMMA *m,FPn
 16496:         if (EFPBox.EPB_EXTRA_OPERATION) {
 16497:           XEiJ.fpuFPn[n].lgamma (XEiJ.fpuFPn[m]);
 16498:           break;
 16499:         } else {
 16500:           XEiJ.regPC = XEiJ.regPC0 + 2;  //拡張ワードを読まなかったことにする
 16501:           irpFline ();
 16502:           break fgen;
 16503:         }
 16504: 
 16505:       case 0b111_0001:  //$xx71: FTGAMMA *m,FPn
 16506:         if (EFPBox.EPB_EXTRA_OPERATION) {
 16507:           XEiJ.fpuFPn[n].tgamma (XEiJ.fpuFPn[m]);
 16508:           break;
 16509:         } else {
 16510:           XEiJ.regPC = XEiJ.regPC0 + 2;  //拡張ワードを読まなかったことにする
 16511:           irpFline ();
 16512:           break fgen;
 16513:         }
 16514: 
 16515:         //case 0b111_0010:  //$xx72:
 16516:         //case 0b111_0011:  //$xx73:
 16517:         //case 0b111_0100:  //$xx74:
 16518:         //case 0b111_0101:  //$xx75:
 16519:         //case 0b111_0110:  //$xx76:
 16520:         //case 0b111_0111:  //$xx77:
 16521:         //case 0b111_1000:  //$xx78:
 16522:         //case 0b111_1001:  //$xx79:
 16523:         //case 0b111_1010:  //$xx7A:
 16524:         //case 0b111_1011:  //$xx7B:
 16525:         //case 0b111_1100:  //$xx7C:
 16526:         //case 0b111_1101:  //$xx7D:
 16527:         //case 0b111_1110:  //$xx7E:
 16528:         //case 0b111_1111:  //$xx7F:
 16529: 
 16530:       default:  //未定義
 16531:         XEiJ.regPC = XEiJ.regPC0 + 2;  //拡張ワードを読まなかったことにする
 16532:         irpFline ();
 16533:         break fgen;
 16534:       }
 16535:       //FPSRのFPCCを設定する
 16536:       XEiJ.fpuBox.epbFpsr |= XEiJ.fpuFPn[n].flg >>> 4;
 16537:       //FPSRのAEXCを設定する
 16538:       XEiJ.fpuBox.epbFpsr |= XEiJ.FPU_FPSR_EXC_TO_AEXC[XEiJ.fpuBox.epbFpsr >> 8 & 255];
 16539:       //浮動小数点命令実行後例外 floating-point post-instruction exception
 16540:       if (irpFPPostInstruction (a)) {
 16541:         break fgen;
 16542:       }
 16543:       break fgen;
 16544: 
 16545: 
 16546:     case 0b011:  //$6xxx-$7xxx: FMOVE.* FPn,<ea>
 16547:       //  BSUN   常にクリア
 16548:       //  SNAN   引数がシグナリングNaNのときセット、それ以外はクリア
 16549:       //  OPERR  byte,word,longで無限大または指定されたサイズに収まらないとき、packedでk-factorが17よりも大きいか指数部が3桁に収まらないときセット、それ以外はクリア
 16550:       //  OVFL   packedではなくてオーバーフローしたときセット、それ以外はクリア
 16551:       //  UNFL   packedではなくて結果が非正規化数のときセット、それ以外はクリア
 16552:       //  DZ     常にクリア
 16553:       //  INEX2  結果に誤差があるときセット、それ以外はクリア
 16554:       //  INEX1  常にクリア
 16555:       XEiJ.fpuBox.epbFpsr &= 0xffff00ff;  //FMOVE.* FPn,<ea>でFPSRのコンディションコードバイトは変化しない
 16556:       XEiJ.fpuBox.epbFpiar = XEiJ.regPC0;  //FPIARはFMOVEM/FMOVE FPcr/FSAVE/FRESTORE以外の命令で例外が発生しなくても更新される
 16557: 
 16558:       switch (m) {
 16559: 
 16560:       case 0b000:  //$60xx-$63xx: FMOVE.L FPn,<ea>
 16561:         {
 16562:           int i = XEiJ.fpuFPn[n].geti (XEiJ.fpuBox.epbRoundingMode);
 16563:           if (ea < XEiJ.EA_AR) {  //Dr。Ar不可
 16564:             XEiJ.regRn[ea] = i;
 16565:           } else {  //Dr以外
 16566:             a = efaMltLong (ea);
 16567:             mmuWriteLongData (a, i, XEiJ.regSRS);
 16568:           }
 16569:         }
 16570:         break;
 16571: 
 16572:       case 0b001:  //$64xx-$67xx: FMOVE.S FPn,<ea>
 16573:         {
 16574:           int i = XEiJ.fpuFPn[n].getf0 (XEiJ.fpuBox.epbRoundingMode);
 16575:           if (ea < XEiJ.EA_AR) {  //Dr。Ar不可
 16576:             XEiJ.regRn[ea] = i;
 16577:           } else {  //Dr以外
 16578:             a = efaMltLong (ea);
 16579:             mmuWriteLongData (a, i, XEiJ.regSRS);
 16580:           }
 16581:         }
 16582:         break;
 16583: 
 16584:       case 0b010:  //$68xx-$6Bxx: FMOVE.X FPn,<ea>
 16585:         {
 16586:           byte[] b = new byte[12];
 16587:           if (XEiJ.fpuBox.epbIsTriple ()) {  //三倍精度
 16588:             XEiJ.fpuFPn[n].gety012 (b, 0, XEiJ.fpuBox.epbRoundingMode);
 16589:           } else {  //拡張精度
 16590:             XEiJ.fpuFPn[n].getx012 (b, 0, XEiJ.fpuBox.epbRoundingMode);
 16591:           }
 16592:           a = efaMltExtd (ea);
 16593:           mmuWriteByteArray (a, b, 0, 12, XEiJ.regSRS);
 16594:         }
 16595:         break;
 16596: 
 16597:       case 0b011:  //$6Cxx-$6Fxx: FMOVE.P FPn,<ea>{#k}
 16598:         {
 16599:           a = efaMltExtd (ea);
 16600:           if (!XEiJ.fpuBox.epbIsFullSpec ()) {  //パックトデシマル
 16601:             XEiJ.fpuBox.epbExceptionStatusWord = 0xe000 | M68kException.M6E_FP_UNSUPPORTED_DATA_TYPE & 7;
 16602:             irpExceptionFormat3 (M68kException.M6E_FP_UNSUPPORTED_DATA_TYPE << 2, XEiJ.regPC, a);  //pcは次の命令,アドレスはデスティネーションオペランド
 16603:             break fgen;
 16604:           }
 16605:           byte[] b = new byte[12];
 16606:           XEiJ.fpuFPn[n].getp012 (b, 0, w);  //k-factor付き
 16607:           mmuWriteByteArray (a, b, 0, 12, XEiJ.regSRS);
 16608:         }
 16609:         break;
 16610: 
 16611:       case 0b100:  //$70xx-$73xx: FMOVE.W FPn,<ea>
 16612:         {
 16613:           int i = XEiJ.fpuFPn[n].gets (XEiJ.fpuBox.epbRoundingMode);
 16614:           if (ea < XEiJ.EA_AR) {  //Dr。Ar不可
 16615:             XEiJ.regRn[ea] = XEiJ.regRn[ea] & ~65535 | (char) i;
 16616:           } else {  //Dr以外
 16617:             a = efaMltWord (ea);
 16618:             mmuWriteWordData (a, i, XEiJ.regSRS);
 16619:           }
 16620:         }
 16621:         break;
 16622: 
 16623:       case 0b101:  //$74xx-$77xx: FMOVE.D FPn,<ea>
 16624:         {
 16625:           long l = XEiJ.fpuFPn[n].getd01 (XEiJ.fpuBox.epbRoundingMode);
 16626:           a = efaMltQuad (ea);
 16627:           mmuWriteQuadData (a, l, XEiJ.regSRS);
 16628:         }
 16629:         break;
 16630: 
 16631:       case 0b110:  //$78xx-$7Bxx: FMOVE.B FPn,<ea>
 16632:         {
 16633:           int i = XEiJ.fpuFPn[n].getb (XEiJ.fpuBox.epbRoundingMode);
 16634:           if (ea < XEiJ.EA_AR) {  //Dr。Ar不可
 16635:             XEiJ.regRn[ea] = XEiJ.regRn[ea] & ~255 | i & 255;
 16636:           } else {  //Dr以外
 16637:             a = efaMltByte (ea);
 16638:             mmuWriteByteData (a, i, XEiJ.regSRS);
 16639:           }
 16640:         }
 16641:         break;
 16642: 
 16643:       case 0b111:  //$7Cxx-$7Fxx: FMOVE.P FPn,<ea>{Dl}
 16644:       default:
 16645:         {
 16646:           a = efaMltExtd (ea);
 16647:           if (!XEiJ.fpuBox.epbIsFullSpec ()) {  //パックトデシマル
 16648:             XEiJ.fpuBox.epbExceptionStatusWord = 0xe000 | M68kException.M6E_FP_UNSUPPORTED_DATA_TYPE & 7;
 16649:             irpExceptionFormat3 (M68kException.M6E_FP_UNSUPPORTED_DATA_TYPE << 2, XEiJ.regPC, a);  //pcは次の命令,アドレスはデスティネーションオペランド
 16650:             break fgen;
 16651:           }
 16652:           byte[] b = new byte[12];
 16653:           XEiJ.fpuFPn[n].getp012 (b, 0, XEiJ.regRn[w >> 4 & 7]);  //k-factor付き
 16654:           mmuWriteByteArray (a, b, 0, 12, XEiJ.regSRS);
 16655:         }
 16656:       }
 16657:       //FPSRのAEXCを設定する
 16658:       XEiJ.fpuBox.epbFpsr |= XEiJ.FPU_FPSR_EXC_TO_AEXC[XEiJ.fpuBox.epbFpsr >> 8 & 255];
 16659:       //浮動小数点命令実行後例外 floating-point post-instruction exception
 16660:       if (irpFPPostInstruction (a)) {
 16661:         break fgen;
 16662:       }
 16663:       break fgen;
 16664: 
 16665: 
 16666:     case 0b100:  //$8xxx-$9xxx: FMOVEM.L <ea>,FPCR/FPSR/FPIAR
 16667:       XEiJ.mpuCycleCount += 6;
 16668:       //  FMOVEM命令は例外を発生させずFPCR/FPSR/FPIARも(デスティネーションに書かれたもの以外)変化しない
 16669:       //  格納順序はFPCRが下位アドレス(連結したとき上位),FPIARが上位アドレス(連結したとき下位)
 16670: 
 16671:       switch (m) {
 16672: 
 16673:       case 0b000:  //$8000: FMOVE.L <ea>,<>
 16674:         //  レジスタを1個も指定しないとFPIARが指定されたものとみなされる
 16675: 
 16676:       case 0b001:  //$8400: FMOVE.L <ea>,FPIAR
 16677:         {
 16678:           int i;
 16679:           if (ea < XEiJ.EA_MM) {  //Dr,Ar。Ar可
 16680:             //a = 0;
 16681:             i = XEiJ.regRn[ea];
 16682:           } else if (ea == XEiJ.EA_IM) {  //#<data>
 16683:             a = XEiJ.regPC;
 16684:             XEiJ.regPC = a + 4;
 16685:             i = mmuReadLongExword (a, XEiJ.regSRS);  //pcls
 16686:           } else {  //Dr,Ar,#<data>以外
 16687:             a = efaAnyLong (ea);
 16688:             i = mmuReadLongData (a, XEiJ.regSRS);
 16689:           }
 16690:           XEiJ.fpuBox.epbFpiar = i;
 16691:         }
 16692:         break;
 16693: 
 16694:       case 0b010:  //$8800: FMOVE.L <ea>,FPSR
 16695:         {
 16696:           int i;
 16697:           if (ea < XEiJ.EA_AR) {  //Dr。Ar不可
 16698:             //a = 0;
 16699:             i = XEiJ.regRn[ea];
 16700:           } else if (ea == XEiJ.EA_IM) {  //#<data>
 16701:             a = XEiJ.regPC;
 16702:             XEiJ.regPC = a + 4;
 16703:             i = mmuReadLongExword (a, XEiJ.regSRS);  //pcls
 16704:           } else {  //Dr,#<data>以外
 16705:             a = efaAnyLong (ea);
 16706:             i = mmuReadLongData (a, XEiJ.regSRS);
 16707:           }
 16708:           XEiJ.fpuBox.epbFpsr = i & EFPBox.EPB_FPSR_ALL;
 16709:           //  fmove.lでfpsrのEXCに書き込んだだけではAEXCは更新されない
 16710:           //  fmove.lでfpsrに0x0000ff00を書き込んですぐに読み出しても0x0000ff00のまま
 16711:         }
 16712:         break;
 16713: 
 16714:       case 0b011:  //$8C00: FMOVEM.L <ea>,FPSR/FPIAR
 16715:         {
 16716:           long l;
 16717:           if (ea == XEiJ.EA_IM) {  //#<data>
 16718:             if (!XEiJ.fpuBox.epbIsFullSpec ()) {  //8バイトのイミディエイト
 16719:               irpExceptionFormat0 (M68kException.M6E_UNIMPLEMENTED_EFFECTIVE << 2, XEiJ.regPC0);  //pcは命令の先頭
 16720:               break fgen;
 16721:             }
 16722:             a = XEiJ.regPC;
 16723:             XEiJ.regPC = a + 8;
 16724:             l = mmuReadQuadExword (a, XEiJ.regSRS);
 16725:           } else {  //#<data>以外
 16726:             a = efaAnyQuad (ea);
 16727:             l = mmuReadQuadData (a, XEiJ.regSRS);
 16728:           }
 16729:           XEiJ.fpuBox.epbFpsr = (int) (l >>> 32) & EFPBox.EPB_FPSR_ALL;
 16730:           XEiJ.fpuBox.epbFpiar = (int) l;
 16731:         }
 16732:         break;
 16733: 
 16734:       case 0b100:  //$9000: FMOVE.L <ea>,FPCR
 16735:         {
 16736:           int i;
 16737:           if (ea < XEiJ.EA_AR) {  //Dr。Ar不可
 16738:             a = 0;
 16739:             i = XEiJ.regRn[ea];
 16740:           } else if (ea == XEiJ.EA_IM) {  //#<data>
 16741:             a = XEiJ.regPC;
 16742:             XEiJ.regPC = a + 4;
 16743:             i = mmuReadLongExword (a, XEiJ.regSRS);  //pcls
 16744:           } else {  //Dr,#<data>以外
 16745:             a = efaAnyLong (ea);
 16746:             i = mmuReadLongData (a, XEiJ.regSRS);
 16747:           }
 16748:           XEiJ.fpuBox.epbFpcr = i & EFPBox.EPB_FPCR_ALL;
 16749:         }
 16750:         break;
 16751: 
 16752:       case 0b101:  //$9400: FMOVEM.L <ea>,FPCR/FPIAR
 16753:         {
 16754:           long l;
 16755:           if (ea == XEiJ.EA_IM) {  //#<data>
 16756:             if (!XEiJ.fpuBox.epbIsFullSpec ()) {  //8バイトのイミディエイト
 16757:               irpExceptionFormat0 (M68kException.M6E_UNIMPLEMENTED_EFFECTIVE << 2, XEiJ.regPC0);  //pcは命令の先頭
 16758:               break fgen;
 16759:             }
 16760:             a = XEiJ.regPC;
 16761:             XEiJ.regPC = a + 8;
 16762:             l = mmuReadQuadExword (a, XEiJ.regSRS);
 16763:           } else {  //#<data>以外
 16764:             a = efaAnyQuad (ea);
 16765:             l = mmuReadQuadData (a, XEiJ.regSRS);
 16766:           }
 16767:           XEiJ.fpuBox.epbFpcr = (int) (l >>> 32) & EFPBox.EPB_FPCR_ALL;
 16768:           XEiJ.fpuBox.epbFpiar = (int) l;
 16769:         }
 16770:         break;
 16771: 
 16772:       case 0b110:  //$9800: FMOVEM.L <ea>,FPCR/FPSR
 16773:         {
 16774:           long l;
 16775:           if (ea == XEiJ.EA_IM) {  //#<data>
 16776:             if (!XEiJ.fpuBox.epbIsFullSpec ()) {  //8バイトのイミディエイト
 16777:               irpExceptionFormat0 (M68kException.M6E_UNIMPLEMENTED_EFFECTIVE << 2, XEiJ.regPC0);  //pcは命令の先頭
 16778:               break fgen;
 16779:             }
 16780:             a = XEiJ.regPC;
 16781:             XEiJ.regPC = a + 8;
 16782:             l = mmuReadQuadExword (a, XEiJ.regSRS);
 16783:           } else {  //#<data>以外
 16784:             a = efaAnyQuad (ea);
 16785:             l = mmuReadQuadData (a, XEiJ.regSRS);
 16786:           }
 16787:           XEiJ.fpuBox.epbFpcr = (int) (l >>> 32) & EFPBox.EPB_FPCR_ALL;
 16788:           XEiJ.fpuBox.epbFpsr = (int) l & EFPBox.EPB_FPSR_ALL;
 16789:         }
 16790:         break;
 16791: 
 16792:       case 0b111:  //$9C00: FMOVEM.L <ea>,FPCR/FPSR/FPIAR
 16793:       default:
 16794:         {
 16795:           int i;
 16796:           long l;
 16797:           if (ea == XEiJ.EA_IM) {  //#<data>
 16798:             if (!XEiJ.fpuBox.epbIsFullSpec ()) {  //12バイトのイミディエイト
 16799:               irpExceptionFormat0 (M68kException.M6E_UNIMPLEMENTED_EFFECTIVE << 2, XEiJ.regPC0);  //pcは命令の先頭
 16800:               break fgen;
 16801:             }
 16802:             a = XEiJ.regPC;
 16803:             XEiJ.regPC = a + 12;
 16804:             i = mmuReadLongExword (a, XEiJ.regSRS);
 16805:             l = mmuReadQuadExword (a + 4, XEiJ.regSRS);
 16806:           } else {  //#<data>以外
 16807:             a = efaAnyExtd (ea);
 16808:             i = mmuReadLongData (a, XEiJ.regSRS);
 16809:             l = mmuReadQuadSecond (a + 4, XEiJ.regSRS);
 16810:           }
 16811:           XEiJ.fpuBox.epbFpcr = i & EFPBox.EPB_FPCR_ALL;
 16812:           XEiJ.fpuBox.epbFpsr = (int) (l >>> 32) & EFPBox.EPB_FPSR_ALL;
 16813:           XEiJ.fpuBox.epbFpiar = (int) l;
 16814:         }
 16815:         break;
 16816:       }
 16817:       break fgen;
 16818: 
 16819: 
 16820:     case 0b101:  //$Axxx-$Bxxx: FMOVEM.L FPCR/FPSR/FPIAR,<ea>
 16821:       //  FMOVEM命令は例外を発生させずFPCR/FPSR/FPIARも(デスティネーションに書かれたもの以外)変化しない
 16822:       XEiJ.mpuCycleCount += 4;
 16823: 
 16824:       switch (m) {
 16825: 
 16826:       case 0b000:  //$A000: FMOVE.L <>,<ea>
 16827:         //  レジスタを1個も指定しないとFPIARが指定されたものとみなされる
 16828: 
 16829:       case 0b001:  //$A400: FMOVE.L FPIAR,<ea>
 16830:         {
 16831:           int i = XEiJ.fpuBox.epbFpiar;
 16832:           if (ea < XEiJ.EA_MM) {  //Dr,Ar。Ar可
 16833:             //a = 0;
 16834:             XEiJ.regRn[ea] = i;
 16835:           } else {  //Dr,Ar以外
 16836:             a = efaMltLong (ea);
 16837:             mmuWriteLongData (a, i, XEiJ.regSRS);
 16838:           }
 16839:         }
 16840:         break;
 16841: 
 16842:       case 0b010:  //$A800: FMOVE.L FPSR,<ea>
 16843:         {
 16844:           int i = XEiJ.fpuBox.epbFpsr;
 16845:           if (ea < XEiJ.EA_AR) {  //Dr。Ar不可
 16846:             //a = 0;
 16847:             XEiJ.regRn[ea] = i;
 16848:           } else {  //Dr以外
 16849:             a = efaMltLong (ea);
 16850:             mmuWriteLongData (a, i, XEiJ.regSRS);
 16851:           }
 16852:         }
 16853:         break;
 16854: 
 16855:       case 0b011:  //$AC00: FMOVEM.L FPSR/FPIAR,<ea>
 16856:         {
 16857:           long l = (long) XEiJ.fpuBox.epbFpsr << 32 | XEiJ.fpuBox.epbFpiar & 0xffffffffL;
 16858:           a = efaMltQuad (ea);
 16859:           mmuWriteQuadData (a, l, XEiJ.regSRS);
 16860:         }
 16861:         break;
 16862: 
 16863:       case 0b100:  //$B000: FMOVE.L FPCR,<ea>
 16864:         {
 16865:           int i = XEiJ.fpuBox.epbFpcr;
 16866:           if (ea < XEiJ.EA_AR) {  //Dr。Ar不可
 16867:             //a = 0;
 16868:             XEiJ.regRn[ea] = i;
 16869:           } else {  //Dr以外
 16870:             a = efaMltLong (ea);
 16871:             mmuWriteLongData (a, i, XEiJ.regSRS);
 16872:           }
 16873:         }
 16874:         break;
 16875: 
 16876:       case 0b101:  //$B400: FMOVEM.L FPCR/FPIAR,<ea>
 16877:         {
 16878:           long l = (long) XEiJ.fpuBox.epbFpcr << 32 | XEiJ.fpuBox.epbFpiar & 0xffffffffL;
 16879:           a = efaMltQuad (ea);
 16880:           mmuWriteQuadData (a, l, XEiJ.regSRS);
 16881:         }
 16882:         break;
 16883: 
 16884:       case 0b110:  //$B800: FMOVEM.L FPCR/FPSR,<ea>
 16885:         {
 16886:           long l = (long) XEiJ.fpuBox.epbFpcr << 32 | XEiJ.fpuBox.epbFpsr & 0xffffffffL;
 16887:           a = efaMltQuad (ea);
 16888:           mmuWriteQuadData (a, l, XEiJ.regSRS);
 16889:         }
 16890:         break;
 16891: 
 16892:       case 0b111:  //$BC00: FMOVEM.L FPCR/FPSR/FPIAR,<ea>
 16893:       default:
 16894:         {
 16895:           int i = XEiJ.fpuBox.epbFpcr;
 16896:           long l = (long) XEiJ.fpuBox.epbFpsr << 32 | XEiJ.fpuBox.epbFpiar & 0xffffffffL;
 16897:           a = efaMltExtd (ea);
 16898:           mmuWriteLongData (a, i, XEiJ.regSRS);
 16899:           mmuWriteQuadSecond (a + 4, l, XEiJ.regSRS);
 16900:         }
 16901:         break;
 16902:       }
 16903:       break fgen;
 16904: 
 16905: 
 16906:     case 0b110:  //$Cxxx-$Dxxx: FMOVEM.X <ea>,<list>
 16907:       //  FMOVEM命令は例外を発生させずFPCR/FPSR/FPIARも(デスティネーションに書かれたもの以外)変化しない
 16908:       {
 16909:         if ((m & 2) != 0 && !XEiJ.fpuBox.epbIsFullSpec ()) {  //動的レジスタリスト
 16910:           irpExceptionFormat0 (M68kException.M6E_UNIMPLEMENTED_EFFECTIVE << 2, XEiJ.regPC0);  //pcは命令の先頭
 16911:           break fgen;
 16912:         }
 16913:         byte[] b = new byte[12];
 16914:         int list = ((m & 2) == 0 ? w : XEiJ.regRn[w >> 4 & 7]) << 24;
 16915:         if (ea >> 3 == XEiJ.MMM_MP) {  //(Ar)+
 16916:           int arr = XEiJ.regOC & 7 | 8;
 16917:           a = XEiJ.regRn[arr];
 16918:           for (n = 0; list != 0; n++, list <<= 1) {
 16919:             if (list < 0) {
 16920:               XEiJ.mpuCycleCount += 3;
 16921:               mmuReadByteArray (a, b, 0, 12, XEiJ.regSRS);
 16922:               if (XEiJ.fpuBox.epbIsTriple ()) {  //三倍精度
 16923:                 XEiJ.fpuFPn[n].sety012 (b, 0);
 16924:               } else {  //拡張精度
 16925:                 XEiJ.fpuFPn[n].setx012 (b, 0);
 16926:               }
 16927:               a += 12;
 16928:             }
 16929:           }
 16930:           XEiJ.regRn[arr] = a;
 16931:         } else {  //(Ar)+以外
 16932:           a = efaCntLong (ea);
 16933:           for (n = 0; list != 0; n++, list <<= 1) {
 16934:             if (list < 0) {
 16935:               XEiJ.mpuCycleCount += 3;
 16936:               mmuReadByteArray (a, b, 0, 12, XEiJ.regSRS);
 16937:               if (XEiJ.fpuBox.epbIsTriple ()) {  //三倍精度
 16938:                 XEiJ.fpuFPn[n].sety012 (b, 0);
 16939:               } else {  //拡張精度
 16940:                 XEiJ.fpuFPn[n].setx012 (b, 0);
 16941:               }
 16942:               a += 12;
 16943:             }
 16944:           }
 16945:         }
 16946:       }
 16947:       break fgen;
 16948: 
 16949: 
 16950:     case 0b111:  //$Exxx-$Fxxx: FMOVEM.X <list>,<ea>
 16951:       //  FMOVEM命令は例外を発生させずFPCR/FPSR/FPIARも(デスティネーションに書かれたもの以外)変化しない
 16952:       {
 16953:         if ((m & 2) != 0 && !XEiJ.fpuBox.epbIsFullSpec ()) {  //動的レジスタリスト
 16954:           irpExceptionFormat0 (M68kException.M6E_UNIMPLEMENTED_EFFECTIVE << 2, XEiJ.regPC0);  //pcは命令の先頭
 16955:           break fgen;
 16956:         }
 16957:         byte[] b = new byte[12];
 16958:         int list = ((m & 2) == 0 ? w : XEiJ.regRn[w >> 4 & 7]) << 24;
 16959:         if (ea >> 3 == XEiJ.MMM_MN) {  //-(Ar)
 16960:           int arr = XEiJ.regOC & 7 | 8;
 16961:           a = XEiJ.regRn[arr];
 16962:           for (n = 7; list != 0; n--, list <<= 1) {
 16963:             if (list < 0) {
 16964:               XEiJ.mpuCycleCount += 3;
 16965:               a -= 12;
 16966:               if (XEiJ.fpuBox.epbIsTriple ()) {  //三倍精度
 16967:                 XEiJ.fpuFPn[n].gety012 (b, 0, XEiJ.fpuBox.epbRoundingMode);
 16968:               } else {  //拡張精度
 16969:                 XEiJ.fpuFPn[n].getx012 (b, 0, XEiJ.fpuBox.epbRoundingMode);
 16970:               }
 16971:               mmuWriteByteArray (a, b, 0, 12, XEiJ.regSRS);
 16972:             }
 16973:           }
 16974:           XEiJ.regRn[arr] = a;
 16975:         } else {  //-(Ar)以外
 16976:           a = efaCltLong (ea);
 16977:           for (n = 0; list != 0; n++, list <<= 1) {
 16978:             if (list < 0) {
 16979:               XEiJ.mpuCycleCount += 3;
 16980:               if (XEiJ.fpuBox.epbIsTriple ()) {  //三倍精度
 16981:                 XEiJ.fpuFPn[n].gety012 (b, 0, XEiJ.fpuBox.epbRoundingMode);
 16982:               } else {  //拡張精度
 16983:                 XEiJ.fpuFPn[n].getx012 (b, 0, XEiJ.fpuBox.epbRoundingMode);
 16984:               }
 16985:               mmuWriteByteArray (a, b, 0, 12, XEiJ.regSRS);
 16986:               a += 12;
 16987:             }
 16988:           }
 16989:         }
 16990:       }
 16991:       break fgen;
 16992: 
 16993: 
 16994:     case 0b001:  //$2xxx-$3xxx: 未定義
 16995:     default:  //未定義
 16996:       XEiJ.fpuBox.epbFpiar = XEiJ.regPC0;  //FPIARはFMOVEM/FMOVE FPcr/FSAVE/FRESTORE以外の命令で例外が発生しなくても更新される
 16997:       XEiJ.regPC = XEiJ.regPC0 + 2;  //拡張ワードを読まなかったことにする
 16998:       irpFline ();
 16999:       break fgen;
 17000:     }
 17001:   }  //fgen
 17002:   }  //irpFgen
 17003: 
 17004: 
 17005:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 17006:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 17007:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 17008:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 17009:   //FSF.B <ea>                                      |-|--CC4S|-|-----|-----|D M+-WXZ  |1111_001_001_mmm_rrr-0000000000000000
 17010:   //FSEQ.B <ea>                                     |-|--CC4S|-|-----|-----|D M+-WXZ  |1111_001_001_mmm_rrr-0000000000000001
 17011:   //FSOGT.B <ea>                                    |-|--CC4S|-|-----|-----|D M+-WXZ  |1111_001_001_mmm_rrr-0000000000000010
 17012:   //FSOGE.B <ea>                                    |-|--CC4S|-|-----|-----|D M+-WXZ  |1111_001_001_mmm_rrr-0000000000000011
 17013:   //FSOLT.B <ea>                                    |-|--CC4S|-|-----|-----|D M+-WXZ  |1111_001_001_mmm_rrr-0000000000000100
 17014:   //FSOLE.B <ea>                                    |-|--CC4S|-|-----|-----|D M+-WXZ  |1111_001_001_mmm_rrr-0000000000000101
 17015:   //FSOGL.B <ea>                                    |-|--CC4S|-|-----|-----|D M+-WXZ  |1111_001_001_mmm_rrr-0000000000000110
 17016:   //FSOR.B <ea>                                     |-|--CC4S|-|-----|-----|D M+-WXZ  |1111_001_001_mmm_rrr-0000000000000111
 17017:   //FSUN.B <ea>                                     |-|--CC4S|-|-----|-----|D M+-WXZ  |1111_001_001_mmm_rrr-0000000000001000
 17018:   //FSUEQ.B <ea>                                    |-|--CC4S|-|-----|-----|D M+-WXZ  |1111_001_001_mmm_rrr-0000000000001001
 17019:   //FSUGT.B <ea>                                    |-|--CC4S|-|-----|-----|D M+-WXZ  |1111_001_001_mmm_rrr-0000000000001010
 17020:   //FSUGE.B <ea>                                    |-|--CC4S|-|-----|-----|D M+-WXZ  |1111_001_001_mmm_rrr-0000000000001011
 17021:   //FSULT.B <ea>                                    |-|--CC4S|-|-----|-----|D M+-WXZ  |1111_001_001_mmm_rrr-0000000000001100
 17022:   //FSULE.B <ea>                                    |-|--CC4S|-|-----|-----|D M+-WXZ  |1111_001_001_mmm_rrr-0000000000001101
 17023:   //FSNE.B <ea>                                     |-|--CC4S|-|-----|-----|D M+-WXZ  |1111_001_001_mmm_rrr-0000000000001110
 17024:   //FST.B <ea>                                      |-|--CC4S|-|-----|-----|D M+-WXZ  |1111_001_001_mmm_rrr-0000000000001111
 17025:   //FSSF.B <ea>                                     |-|--CC4S|-|-----|-----|D M+-WXZ  |1111_001_001_mmm_rrr-0000000000010000
 17026:   //FSSEQ.B <ea>                                    |-|--CC4S|-|-----|-----|D M+-WXZ  |1111_001_001_mmm_rrr-0000000000010001
 17027:   //FSGT.B <ea>                                     |-|--CC4S|-|-----|-----|D M+-WXZ  |1111_001_001_mmm_rrr-0000000000010010
 17028:   //FSGE.B <ea>                                     |-|--CC4S|-|-----|-----|D M+-WXZ  |1111_001_001_mmm_rrr-0000000000010011
 17029:   //FSLT.B <ea>                                     |-|--CC4S|-|-----|-----|D M+-WXZ  |1111_001_001_mmm_rrr-0000000000010100
 17030:   //FSLE.B <ea>                                     |-|--CC4S|-|-----|-----|D M+-WXZ  |1111_001_001_mmm_rrr-0000000000010101
 17031:   //FSGL.B <ea>                                     |-|--CC4S|-|-----|-----|D M+-WXZ  |1111_001_001_mmm_rrr-0000000000010110
 17032:   //FSGLE.B <ea>                                    |-|--CC4S|-|-----|-----|D M+-WXZ  |1111_001_001_mmm_rrr-0000000000010111
 17033:   //FSNGLE.B <ea>                                   |-|--CC4S|-|-----|-----|D M+-WXZ  |1111_001_001_mmm_rrr-0000000000011000
 17034:   //FSNGL.B <ea>                                    |-|--CC4S|-|-----|-----|D M+-WXZ  |1111_001_001_mmm_rrr-0000000000011001
 17035:   //FSNLE.B <ea>                                    |-|--CC4S|-|-----|-----|D M+-WXZ  |1111_001_001_mmm_rrr-0000000000011010
 17036:   //FSNLT.B <ea>                                    |-|--CC4S|-|-----|-----|D M+-WXZ  |1111_001_001_mmm_rrr-0000000000011011
 17037:   //FSNGE.B <ea>                                    |-|--CC4S|-|-----|-----|D M+-WXZ  |1111_001_001_mmm_rrr-0000000000011100
 17038:   //FSNGT.B <ea>                                    |-|--CC4S|-|-----|-----|D M+-WXZ  |1111_001_001_mmm_rrr-0000000000011101
 17039:   //FSSNE.B <ea>                                    |-|--CC4S|-|-----|-----|D M+-WXZ  |1111_001_001_mmm_rrr-0000000000011110
 17040:   //FSST.B <ea>                                     |-|--CC4S|-|-----|-----|D M+-WXZ  |1111_001_001_mmm_rrr-0000000000011111
 17041:   //FDBF Dr,<label>                                 |-|--CC4S|-|-----|-----|          |1111_001_001_001_rrr-0000000000000000-{offset}
 17042:   //FDBRA Dr,<label>                                |A|--CC4S|-|-----|-----|          |1111_001_001_001_rrr-0000000000000000-{offset}       [FDBF Dr,<label>]
 17043:   //FDBEQ Dr,<label>                                |-|--CC4S|-|-----|-----|          |1111_001_001_001_rrr-0000000000000001-{offset}
 17044:   //FDBOGT Dr,<label>                               |-|--CC4S|-|-----|-----|          |1111_001_001_001_rrr-0000000000000010-{offset}
 17045:   //FDBOGE Dr,<label>                               |-|--CC4S|-|-----|-----|          |1111_001_001_001_rrr-0000000000000011-{offset}
 17046:   //FDBOLT Dr,<label>                               |-|--CC4S|-|-----|-----|          |1111_001_001_001_rrr-0000000000000100-{offset}
 17047:   //FDBOLE Dr,<label>                               |-|--CC4S|-|-----|-----|          |1111_001_001_001_rrr-0000000000000101-{offset}
 17048:   //FDBOGL Dr,<label>                               |-|--CC4S|-|-----|-----|          |1111_001_001_001_rrr-0000000000000110-{offset}
 17049:   //FDBOR Dr,<label>                                |-|--CC4S|-|-----|-----|          |1111_001_001_001_rrr-0000000000000111-{offset}
 17050:   //FDBUN Dr,<label>                                |-|--CC4S|-|-----|-----|          |1111_001_001_001_rrr-0000000000001000-{offset}
 17051:   //FDBUEQ Dr,<label>                               |-|--CC4S|-|-----|-----|          |1111_001_001_001_rrr-0000000000001001-{offset}
 17052:   //FDBUGT Dr,<label>                               |-|--CC4S|-|-----|-----|          |1111_001_001_001_rrr-0000000000001010-{offset}
 17053:   //FDBUGE Dr,<label>                               |-|--CC4S|-|-----|-----|          |1111_001_001_001_rrr-0000000000001011-{offset}
 17054:   //FDBULT Dr,<label>                               |-|--CC4S|-|-----|-----|          |1111_001_001_001_rrr-0000000000001100-{offset}
 17055:   //FDBULE Dr,<label>                               |-|--CC4S|-|-----|-----|          |1111_001_001_001_rrr-0000000000001101-{offset}
 17056:   //FDBNE Dr,<label>                                |-|--CC4S|-|-----|-----|          |1111_001_001_001_rrr-0000000000001110-{offset}
 17057:   //FDBT Dr,<label>                                 |-|--CC4S|-|-----|-----|          |1111_001_001_001_rrr-0000000000001111-{offset}
 17058:   //FDBSF Dr,<label>                                |-|--CC4S|-|-----|-----|          |1111_001_001_001_rrr-0000000000010000-{offset}
 17059:   //FDBSEQ Dr,<label>                               |-|--CC4S|-|-----|-----|          |1111_001_001_001_rrr-0000000000010001-{offset}
 17060:   //FDBGT Dr,<label>                                |-|--CC4S|-|-----|-----|          |1111_001_001_001_rrr-0000000000010010-{offset}
 17061:   //FDBGE Dr,<label>                                |-|--CC4S|-|-----|-----|          |1111_001_001_001_rrr-0000000000010011-{offset}
 17062:   //FDBLT Dr,<label>                                |-|--CC4S|-|-----|-----|          |1111_001_001_001_rrr-0000000000010100-{offset}
 17063:   //FDBLE Dr,<label>                                |-|--CC4S|-|-----|-----|          |1111_001_001_001_rrr-0000000000010101-{offset}
 17064:   //FDBGL Dr,<label>                                |-|--CC4S|-|-----|-----|          |1111_001_001_001_rrr-0000000000010110-{offset}
 17065:   //FDBGLE Dr,<label>                               |-|--CC4S|-|-----|-----|          |1111_001_001_001_rrr-0000000000010111-{offset}
 17066:   //FDBNGLE Dr,<label>                              |-|--CC4S|-|-----|-----|          |1111_001_001_001_rrr-0000000000011000-{offset}
 17067:   //FDBNGL Dr,<label>                               |-|--CC4S|-|-----|-----|          |1111_001_001_001_rrr-0000000000011001-{offset}
 17068:   //FDBNLE Dr,<label>                               |-|--CC4S|-|-----|-----|          |1111_001_001_001_rrr-0000000000011010-{offset}
 17069:   //FDBNLT Dr,<label>                               |-|--CC4S|-|-----|-----|          |1111_001_001_001_rrr-0000000000011011-{offset}
 17070:   //FDBNGE Dr,<label>                               |-|--CC4S|-|-----|-----|          |1111_001_001_001_rrr-0000000000011100-{offset}
 17071:   //FDBNGT Dr,<label>                               |-|--CC4S|-|-----|-----|          |1111_001_001_001_rrr-0000000000011101-{offset}
 17072:   //FDBSNE Dr,<label>                               |-|--CC4S|-|-----|-----|          |1111_001_001_001_rrr-0000000000011110-{offset}
 17073:   //FDBST Dr,<label>                                |-|--CC4S|-|-----|-----|          |1111_001_001_001_rrr-0000000000011111-{offset}
 17074:   //FTRAPF.W #<data>                                |-|--CC4S|-|-----|-----|          |1111_001_001_111_010-0000000000000000-{data}
 17075:   //FTRAPEQ.W #<data>                               |-|--CC4S|-|-----|-----|          |1111_001_001_111_010-0000000000000001-{data}
 17076:   //FTRAPOGT.W #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_010-0000000000000010-{data}
 17077:   //FTRAPOGE.W #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_010-0000000000000011-{data}
 17078:   //FTRAPOLT.W #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_010-0000000000000100-{data}
 17079:   //FTRAPOLE.W #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_010-0000000000000101-{data}
 17080:   //FTRAPOGL.W #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_010-0000000000000110-{data}
 17081:   //FTRAPOR.W #<data>                               |-|--CC4S|-|-----|-----|          |1111_001_001_111_010-0000000000000111-{data}
 17082:   //FTRAPUN.W #<data>                               |-|--CC4S|-|-----|-----|          |1111_001_001_111_010-0000000000001000-{data}
 17083:   //FTRAPUEQ.W #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_010-0000000000001001-{data}
 17084:   //FTRAPUGT.W #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_010-0000000000001010-{data}
 17085:   //FTRAPUGE.W #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_010-0000000000001011-{data}
 17086:   //FTRAPULT.W #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_010-0000000000001100-{data}
 17087:   //FTRAPULE.W #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_010-0000000000001101-{data}
 17088:   //FTRAPNE.W #<data>                               |-|--CC4S|-|-----|-----|          |1111_001_001_111_010-0000000000001110-{data}
 17089:   //FTRAPT.W #<data>                                |-|--CC4S|-|-----|-----|          |1111_001_001_111_010-0000000000001111-{data}
 17090:   //FTRAPSF.W #<data>                               |-|--CC4S|-|-----|-----|          |1111_001_001_111_010-0000000000010000-{data}
 17091:   //FTRAPSEQ.W #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_010-0000000000010001-{data}
 17092:   //FTRAPGT.W #<data>                               |-|--CC4S|-|-----|-----|          |1111_001_001_111_010-0000000000010010-{data}
 17093:   //FTRAPGE.W #<data>                               |-|--CC4S|-|-----|-----|          |1111_001_001_111_010-0000000000010011-{data}
 17094:   //FTRAPLT.W #<data>                               |-|--CC4S|-|-----|-----|          |1111_001_001_111_010-0000000000010100-{data}
 17095:   //FTRAPLE.W #<data>                               |-|--CC4S|-|-----|-----|          |1111_001_001_111_010-0000000000010101-{data}
 17096:   //FTRAPGL.W #<data>                               |-|--CC4S|-|-----|-----|          |1111_001_001_111_010-0000000000010110-{data}
 17097:   //FTRAPGLE.W #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_010-0000000000010111-{data}
 17098:   //FTRAPNGLE.W #<data>                             |-|--CC4S|-|-----|-----|          |1111_001_001_111_010-0000000000011000-{data}
 17099:   //FTRAPNGL.W #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_010-0000000000011001-{data}
 17100:   //FTRAPNLE.W #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_010-0000000000011010-{data}
 17101:   //FTRAPNLT.W #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_010-0000000000011011-{data}
 17102:   //FTRAPNGE.W #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_010-0000000000011100-{data}
 17103:   //FTRAPNGT.W #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_010-0000000000011101-{data}
 17104:   //FTRAPSNE.W #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_010-0000000000011110-{data}
 17105:   //FTRAPST.W #<data>                               |-|--CC4S|-|-----|-----|          |1111_001_001_111_010-0000000000011111-{data}
 17106:   //FTRAPF.L #<data>                                |-|--CC4S|-|-----|-----|          |1111_001_001_111_011-0000000000000000-{data}
 17107:   //FTRAPEQ.L #<data>                               |-|--CC4S|-|-----|-----|          |1111_001_001_111_011-0000000000000001-{data}
 17108:   //FTRAPOGT.L #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_011-0000000000000010-{data}
 17109:   //FTRAPOGE.L #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_011-0000000000000011-{data}
 17110:   //FTRAPOLT.L #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_011-0000000000000100-{data}
 17111:   //FTRAPOLE.L #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_011-0000000000000101-{data}
 17112:   //FTRAPOGL.L #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_011-0000000000000110-{data}
 17113:   //FTRAPOR.L #<data>                               |-|--CC4S|-|-----|-----|          |1111_001_001_111_011-0000000000000111-{data}
 17114:   //FTRAPUN.L #<data>                               |-|--CC4S|-|-----|-----|          |1111_001_001_111_011-0000000000001000-{data}
 17115:   //FTRAPUEQ.L #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_011-0000000000001001-{data}
 17116:   //FTRAPUGT.L #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_011-0000000000001010-{data}
 17117:   //FTRAPUGE.L #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_011-0000000000001011-{data}
 17118:   //FTRAPULT.L #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_011-0000000000001100-{data}
 17119:   //FTRAPULE.L #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_011-0000000000001101-{data}
 17120:   //FTRAPNE.L #<data>                               |-|--CC4S|-|-----|-----|          |1111_001_001_111_011-0000000000001110-{data}
 17121:   //FTRAPT.L #<data>                                |-|--CC4S|-|-----|-----|          |1111_001_001_111_011-0000000000001111-{data}
 17122:   //FTRAPSF.L #<data>                               |-|--CC4S|-|-----|-----|          |1111_001_001_111_011-0000000000010000-{data}
 17123:   //FTRAPSEQ.L #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_011-0000000000010001-{data}
 17124:   //FTRAPGT.L #<data>                               |-|--CC4S|-|-----|-----|          |1111_001_001_111_011-0000000000010010-{data}
 17125:   //FTRAPGE.L #<data>                               |-|--CC4S|-|-----|-----|          |1111_001_001_111_011-0000000000010011-{data}
 17126:   //FTRAPLT.L #<data>                               |-|--CC4S|-|-----|-----|          |1111_001_001_111_011-0000000000010100-{data}
 17127:   //FTRAPLE.L #<data>                               |-|--CC4S|-|-----|-----|          |1111_001_001_111_011-0000000000010101-{data}
 17128:   //FTRAPGL.L #<data>                               |-|--CC4S|-|-----|-----|          |1111_001_001_111_011-0000000000010110-{data}
 17129:   //FTRAPGLE.L #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_011-0000000000010111-{data}
 17130:   //FTRAPNGLE.L #<data>                             |-|--CC4S|-|-----|-----|          |1111_001_001_111_011-0000000000011000-{data}
 17131:   //FTRAPNGL.L #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_011-0000000000011001-{data}
 17132:   //FTRAPNLE.L #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_011-0000000000011010-{data}
 17133:   //FTRAPNLT.L #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_011-0000000000011011-{data}
 17134:   //FTRAPNGE.L #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_011-0000000000011100-{data}
 17135:   //FTRAPNGT.L #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_011-0000000000011101-{data}
 17136:   //FTRAPSNE.L #<data>                              |-|--CC4S|-|-----|-----|          |1111_001_001_111_011-0000000000011110-{data}
 17137:   //FTRAPST.L #<data>                               |-|--CC4S|-|-----|-----|          |1111_001_001_111_011-0000000000011111-{data}
 17138:   //FTRAPF                                          |-|--CC4S|-|-----|-----|          |1111_001_001_111_100-0000000000000000
 17139:   //FTRAPEQ                                         |-|--CC4S|-|-----|-----|          |1111_001_001_111_100-0000000000000001
 17140:   //FTRAPOGT                                        |-|--CC4S|-|-----|-----|          |1111_001_001_111_100-0000000000000010
 17141:   //FTRAPOGE                                        |-|--CC4S|-|-----|-----|          |1111_001_001_111_100-0000000000000011
 17142:   //FTRAPOLT                                        |-|--CC4S|-|-----|-----|          |1111_001_001_111_100-0000000000000100
 17143:   //FTRAPOLE                                        |-|--CC4S|-|-----|-----|          |1111_001_001_111_100-0000000000000101
 17144:   //FTRAPOGL                                        |-|--CC4S|-|-----|-----|          |1111_001_001_111_100-0000000000000110
 17145:   //FTRAPOR                                         |-|--CC4S|-|-----|-----|          |1111_001_001_111_100-0000000000000111
 17146:   //FTRAPUN                                         |-|--CC4S|-|-----|-----|          |1111_001_001_111_100-0000000000001000
 17147:   //FTRAPUEQ                                        |-|--CC4S|-|-----|-----|          |1111_001_001_111_100-0000000000001001
 17148:   //FTRAPUGT                                        |-|--CC4S|-|-----|-----|          |1111_001_001_111_100-0000000000001010
 17149:   //FTRAPUGE                                        |-|--CC4S|-|-----|-----|          |1111_001_001_111_100-0000000000001011
 17150:   //FTRAPULT                                        |-|--CC4S|-|-----|-----|          |1111_001_001_111_100-0000000000001100
 17151:   //FTRAPULE                                        |-|--CC4S|-|-----|-----|          |1111_001_001_111_100-0000000000001101
 17152:   //FTRAPNE                                         |-|--CC4S|-|-----|-----|          |1111_001_001_111_100-0000000000001110
 17153:   //FTRAPT                                          |-|--CC4S|-|-----|-----|          |1111_001_001_111_100-0000000000001111
 17154:   //FTRAPSF                                         |-|--CC4S|-|-----|-----|          |1111_001_001_111_100-0000000000010000
 17155:   //FTRAPSEQ                                        |-|--CC4S|-|-----|-----|          |1111_001_001_111_100-0000000000010001
 17156:   //FTRAPGT                                         |-|--CC4S|-|-----|-----|          |1111_001_001_111_100-0000000000010010
 17157:   //FTRAPGE                                         |-|--CC4S|-|-----|-----|          |1111_001_001_111_100-0000000000010011
 17158:   //FTRAPLT                                         |-|--CC4S|-|-----|-----|          |1111_001_001_111_100-0000000000010100
 17159:   //FTRAPLE                                         |-|--CC4S|-|-----|-----|          |1111_001_001_111_100-0000000000010101
 17160:   //FTRAPGL                                         |-|--CC4S|-|-----|-----|          |1111_001_001_111_100-0000000000010110
 17161:   //FTRAPGLE                                        |-|--CC4S|-|-----|-----|          |1111_001_001_111_100-0000000000010111
 17162:   //FTRAPNGLE                                       |-|--CC4S|-|-----|-----|          |1111_001_001_111_100-0000000000011000
 17163:   //FTRAPNGL                                        |-|--CC4S|-|-----|-----|          |1111_001_001_111_100-0000000000011001
 17164:   //FTRAPNLE                                        |-|--CC4S|-|-----|-----|          |1111_001_001_111_100-0000000000011010
 17165:   //FTRAPNLT                                        |-|--CC4S|-|-----|-----|          |1111_001_001_111_100-0000000000011011
 17166:   //FTRAPNGE                                        |-|--CC4S|-|-----|-----|          |1111_001_001_111_100-0000000000011100
 17167:   //FTRAPNGT                                        |-|--CC4S|-|-----|-----|          |1111_001_001_111_100-0000000000011101
 17168:   //FTRAPSNE                                        |-|--CC4S|-|-----|-----|          |1111_001_001_111_100-0000000000011110
 17169:   //FTRAPST                                         |-|--CC4S|-|-----|-----|          |1111_001_001_111_100-0000000000011111
 17170:   public static void irpFscc () throws M68kException {
 17171:   fscc: {
 17172:     //XEiJ.fpuBox.epbExceptionStatusWord = 0;
 17173:     if (XEiJ.currentMPU == Model.MPU_MC68LC060) {
 17174:       irpFline ();
 17175:       break fscc;
 17176:     }
 17177:     XEiJ.fpuBox.epbFpiar = XEiJ.regPC0;  //FPIARはFMOVEM/FMOVE FPcr/FSAVE/FRESTORE以外の命令で例外が発生しなくても更新される
 17178:     int w = mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);  //pcwz。拡張ワード
 17179:     if ((w & 0b010000) != 0 && (XEiJ.fpuBox.epbFpsr & XEiJ.FPU_FPSR_NAN) != 0) {  //IEEEノンアウェアテストでNANがセットされているとき
 17180:       XEiJ.fpuBox.epbFpsr |= XEiJ.FPU_FPSR_EXC_BSUN;  //BSUNをセット
 17181:       XEiJ.fpuBox.epbFpsr |= XEiJ.FPU_FPSR_EXC_TO_AEXC[XEiJ.fpuBox.epbFpsr >> 8 & 255];
 17182:       if ((XEiJ.fpuBox.epbFpcr & XEiJ.FPU_FPCR_BSUN) != 0) {  //BSUN例外許可
 17183:         XEiJ.fpuBox.epbExceptionStatusWord = 0xe000 | M68kException.M6E_FP_BRANCH_SET_UNORDERED & 7;
 17184:         irpExceptionFormat0 (M68kException.M6E_FP_BRANCH_SET_UNORDERED << 2, XEiJ.regPC0);  //pcは命令の先頭
 17185:         break fscc;
 17186:       }
 17187:     }
 17188:     int ea = XEiJ.regOC & 63;
 17189:     if (ea < XEiJ.EA_AR) {  //FScc.B Dr
 17190:       if (!XEiJ.fpuBox.epbIsFullSpec ()) {
 17191:         irpExceptionFormat2 (M68kException.M6E_FP_UNIMPLEMENTED_INSTRUCTION << 2, XEiJ.regPC, 0);  //pcは次の命令,アドレスは実効アドレス
 17192:         break fscc;
 17193:       }
 17194:       if (XEiJ.FPU_CCMAP_060[(w & 63) << 4 | XEiJ.fpuBox.epbFpsr >> 24 & 15]) {  //セット
 17195:         XEiJ.mpuCycleCount++;
 17196:         XEiJ.regRn[ea] |= 0xff;
 17197:       } else {  //クリア
 17198:         XEiJ.mpuCycleCount++;
 17199:         XEiJ.regRn[ea] &= ~0xff;
 17200:       }
 17201:     } else if (ea < XEiJ.EA_MM) {  //FDBcc Dr,<label>
 17202:       if (!XEiJ.fpuBox.epbIsFullSpec ()) {
 17203:         XEiJ.regPC += 2;  //オフセットを読み飛ばす
 17204:         irpExceptionFormat2 (M68kException.M6E_FP_UNIMPLEMENTED_INSTRUCTION << 2, XEiJ.regPC, 0);  //pcは次の命令,アドレスは実効アドレス
 17205:         break fscc;
 17206:       }
 17207:       if (XEiJ.FPU_CCMAP_060[(w & 63) << 4 | XEiJ.fpuBox.epbFpsr >> 24 & 15]) {  //条件が成立しているので通過
 17208:         XEiJ.mpuCycleCount += 2;
 17209:         XEiJ.regPC += 2;  //オフセットを読み飛ばす
 17210:       } else {
 17211:         int rrr = XEiJ.regOC & 7;
 17212:         int t = XEiJ.regRn[rrr];
 17213:         if ((short) t == 0) {  //Drの下位16bitが0なので通過
 17214:           XEiJ.mpuCycleCount += 2;
 17215:           XEiJ.regRn[rrr] = t + 65535;
 17216:           XEiJ.regPC += 2;  //オフセットを読み飛ばす
 17217:         } else {  //Drの下位16bitが0でないのでジャンプ
 17218:           XEiJ.mpuCycleCount++;
 17219:           XEiJ.regRn[rrr] = t - 1;  //下位16bitが0でないので上位16bitは変化しない
 17220:           irpSetPC (XEiJ.regPC + mmuReadWordSignExword (XEiJ.regPC, XEiJ.regSRS));  //pc==pc0+2
 17221:         }
 17222:       }
 17223:     } else if (ea < XEiJ.EA_PW) {  //FScc.B <mem>
 17224:       int a = efaMltByte (ea);
 17225:       if (!XEiJ.fpuBox.epbIsFullSpec ()) {
 17226:         irpExceptionFormat2 (M68kException.M6E_FP_UNIMPLEMENTED_INSTRUCTION << 2, XEiJ.regPC, a);  //pcは次の命令,アドレスは実効アドレス
 17227:         break fscc;
 17228:       }
 17229:       XEiJ.mpuCycleCount++;
 17230:       mmuWriteByteData (a, XEiJ.FPU_CCMAP_060[(w & 63) << 4 | XEiJ.fpuBox.epbFpsr >> 24 & 15] ? 0xff : 0x00, XEiJ.regSRS);
 17231:     } else if (ea <= XEiJ.EA_IM) {  //FTRAPcc.W/FTRAPcc.L/FTRAPcc
 17232:       XEiJ.regPC += (ea & 3) + (ea & 1);  //111_010→2,111_011→4,111_100→0
 17233:       if (!XEiJ.fpuBox.epbIsFullSpec ()) {
 17234:         irpExceptionFormat2 (M68kException.M6E_FP_UNIMPLEMENTED_INSTRUCTION << 2, XEiJ.regPC, 0);  //pcは次の命令,アドレスは実効アドレス
 17235:         break fscc;
 17236:       }
 17237:       if (!XEiJ.FPU_CCMAP_060[(w & 63) << 4 | XEiJ.fpuBox.epbFpsr >> 24 & 15]) {  //通過
 17238:         XEiJ.mpuCycleCount += 2;
 17239:       } else {
 17240:         M68kException.m6eAddress = XEiJ.regPC0;  //アドレスは命令の先頭
 17241:         M68kException.m6eNumber = M68kException.M6E_TRAPV_INSTRUCTION;
 17242:         throw M68kException.m6eSignal;
 17243:       }
 17244:     } else {
 17245:       XEiJ.regPC = XEiJ.regPC0 + 2;  //拡張ワードを読まなかったことにする
 17246:       irpFline ();
 17247:       break fscc;
 17248:     }
 17249:   }  //fscc
 17250:   }  //irpFscc
 17251: 
 17252:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 17253:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 17254:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 17255:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 17256:   //FNOP                                            |A|--CC46|-|-----|-----|          |1111_001_010_000_000-0000000000000000        [FBF.W (*)+2]
 17257:   //FBF.W <label>                                   |-|--CC46|-|-----|-----|          |1111_001_010_000_000-{offset}
 17258:   //FBEQ.W <label>                                  |-|--CC46|-|-----|-----|          |1111_001_010_000_001-{offset}
 17259:   //FBOGT.W <label>                                 |-|--CC46|-|-----|-----|          |1111_001_010_000_010-{offset}
 17260:   //FBOGE.W <label>                                 |-|--CC46|-|-----|-----|          |1111_001_010_000_011-{offset}
 17261:   //FBOLT.W <label>                                 |-|--CC46|-|-----|-----|          |1111_001_010_000_100-{offset}
 17262:   //FBOLE.W <label>                                 |-|--CC46|-|-----|-----|          |1111_001_010_000_101-{offset}
 17263:   //FBOGL.W <label>                                 |-|--CC46|-|-----|-----|          |1111_001_010_000_110-{offset}
 17264:   //FBOR.W <label>                                  |-|--CC46|-|-----|-----|          |1111_001_010_000_111-{offset}
 17265:   //FBUN.W <label>                                  |-|--CC46|-|-----|-----|          |1111_001_010_001_000-{offset}
 17266:   //FBUEQ.W <label>                                 |-|--CC46|-|-----|-----|          |1111_001_010_001_001-{offset}
 17267:   //FBUGT.W <label>                                 |-|--CC46|-|-----|-----|          |1111_001_010_001_010-{offset}
 17268:   //FBUGE.W <label>                                 |-|--CC46|-|-----|-----|          |1111_001_010_001_011-{offset}
 17269:   //FBULT.W <label>                                 |-|--CC46|-|-----|-----|          |1111_001_010_001_100-{offset}
 17270:   //FBULE.W <label>                                 |-|--CC46|-|-----|-----|          |1111_001_010_001_101-{offset}
 17271:   //FBNE.W <label>                                  |-|--CC46|-|-----|-----|          |1111_001_010_001_110-{offset}
 17272:   //FBT.W <label>                                   |-|--CC46|-|-----|-----|          |1111_001_010_001_111-{offset}
 17273:   //FBRA.W <label>                                  |A|--CC46|-|-----|-----|          |1111_001_010_001_111-{offset}        [FBT.W <label>]
 17274:   //FBSF.W <label>                                  |-|--CC46|-|-----|-----|          |1111_001_010_010_000-{offset}
 17275:   //FBSEQ.W <label>                                 |-|--CC46|-|-----|-----|          |1111_001_010_010_001-{offset}
 17276:   //FBGT.W <label>                                  |-|--CC46|-|-----|-----|          |1111_001_010_010_010-{offset}
 17277:   //FBGE.W <label>                                  |-|--CC46|-|-----|-----|          |1111_001_010_010_011-{offset}
 17278:   //FBLT.W <label>                                  |-|--CC46|-|-----|-----|          |1111_001_010_010_100-{offset}
 17279:   //FBLE.W <label>                                  |-|--CC46|-|-----|-----|          |1111_001_010_010_101-{offset}
 17280:   //FBGL.W <label>                                  |-|--CC46|-|-----|-----|          |1111_001_010_010_110-{offset}
 17281:   //FBGLE.W <label>                                 |-|--CC46|-|-----|-----|          |1111_001_010_010_111-{offset}
 17282:   //FBNGLE.W <label>                                |-|--CC46|-|-----|-----|          |1111_001_010_011_000-{offset}
 17283:   //FBNGL.W <label>                                 |-|--CC46|-|-----|-----|          |1111_001_010_011_001-{offset}
 17284:   //FBNLE.W <label>                                 |-|--CC46|-|-----|-----|          |1111_001_010_011_010-{offset}
 17285:   //FBNLT.W <label>                                 |-|--CC46|-|-----|-----|          |1111_001_010_011_011-{offset}
 17286:   //FBNGE.W <label>                                 |-|--CC46|-|-----|-----|          |1111_001_010_011_100-{offset}
 17287:   //FBNGT.W <label>                                 |-|--CC46|-|-----|-----|          |1111_001_010_011_101-{offset}
 17288:   //FBSNE.W <label>                                 |-|--CC46|-|-----|-----|          |1111_001_010_011_110-{offset}
 17289:   //FBST.W <label>                                  |-|--CC46|-|-----|-----|          |1111_001_010_011_111-{offset}
 17290:   public static void irpFbccWord () throws M68kException {
 17291:   fbcc: {
 17292:     //XEiJ.fpuBox.epbExceptionStatusWord = 0;
 17293:     if (XEiJ.currentMPU == Model.MPU_MC68LC060) {
 17294:       irpFline ();
 17295:       break fbcc;
 17296:     }
 17297:     XEiJ.fpuBox.epbFpiar = XEiJ.regPC0;  //FPIARはFMOVEM/FMOVE FPcr/FSAVE/FRESTORE以外の命令で例外が発生しなくても更新される
 17298:     if ((XEiJ.regOC & 0b010000) != 0 && (XEiJ.fpuBox.epbFpsr & XEiJ.FPU_FPSR_NAN) != 0) {  //IEEEノンアウェアテストでNANがセットされているとき
 17299:       XEiJ.fpuBox.epbFpsr |= XEiJ.FPU_FPSR_EXC_BSUN;  //BSUNをセット
 17300:       XEiJ.fpuBox.epbFpsr |= XEiJ.FPU_FPSR_EXC_TO_AEXC[XEiJ.fpuBox.epbFpsr >> 8 & 255];
 17301:       if ((XEiJ.fpuBox.epbFpcr & XEiJ.FPU_FPCR_BSUN) != 0) {  //BSUN例外許可
 17302:         XEiJ.fpuBox.epbExceptionStatusWord = 0xe000 | M68kException.M6E_FP_BRANCH_SET_UNORDERED & 7;
 17303:         irpExceptionFormat0 (M68kException.M6E_FP_BRANCH_SET_UNORDERED << 2, XEiJ.regPC0);  //pcは命令の先頭
 17304:         break fbcc;
 17305:       }
 17306:     }
 17307:     XEiJ.mpuCycleCount++;
 17308:     int t = XEiJ.regPC;  //pc0+2
 17309:     XEiJ.regPC = t + 2;  //pc0+4
 17310:     t += mmuReadWordSignExword (t, XEiJ.regSRS);  //pc0+2+16bitディスプレースメント
 17311:     if ((t & 1) != 0) {  //分岐先のアドレスが奇数
 17312:       //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ
 17313:       irpBccAddressError (t);
 17314:     }
 17315:     if (XEiJ.FPU_CCMAP_060[(XEiJ.regOC & 63) << 4 | XEiJ.fpuBox.epbFpsr >> 24 & 15]) {  //分岐する
 17316:       irpSetPC (t);
 17317:     }
 17318:   }  //fbcc
 17319:   }  //irpFbccWord
 17320: 
 17321:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 17322:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 17323:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 17324:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 17325:   //FBF.L <label>                                   |-|--CC46|-|-----|-----|          |1111_001_011_000_000-{offset}
 17326:   //FBEQ.L <label>                                  |-|--CC46|-|-----|-----|          |1111_001_011_000_001-{offset}
 17327:   //FBOGT.L <label>                                 |-|--CC46|-|-----|-----|          |1111_001_011_000_010-{offset}
 17328:   //FBOGE.L <label>                                 |-|--CC46|-|-----|-----|          |1111_001_011_000_011-{offset}
 17329:   //FBOLT.L <label>                                 |-|--CC46|-|-----|-----|          |1111_001_011_000_100-{offset}
 17330:   //FBOLE.L <label>                                 |-|--CC46|-|-----|-----|          |1111_001_011_000_101-{offset}
 17331:   //FBOGL.L <label>                                 |-|--CC46|-|-----|-----|          |1111_001_011_000_110-{offset}
 17332:   //FBOR.L <label>                                  |-|--CC46|-|-----|-----|          |1111_001_011_000_111-{offset}
 17333:   //FBUN.L <label>                                  |-|--CC46|-|-----|-----|          |1111_001_011_001_000-{offset}
 17334:   //FBUEQ.L <label>                                 |-|--CC46|-|-----|-----|          |1111_001_011_001_001-{offset}
 17335:   //FBUGT.L <label>                                 |-|--CC46|-|-----|-----|          |1111_001_011_001_010-{offset}
 17336:   //FBUGE.L <label>                                 |-|--CC46|-|-----|-----|          |1111_001_011_001_011-{offset}
 17337:   //FBULT.L <label>                                 |-|--CC46|-|-----|-----|          |1111_001_011_001_100-{offset}
 17338:   //FBULE.L <label>                                 |-|--CC46|-|-----|-----|          |1111_001_011_001_101-{offset}
 17339:   //FBNE.L <label>                                  |-|--CC46|-|-----|-----|          |1111_001_011_001_110-{offset}
 17340:   //FBT.L <label>                                   |-|--CC46|-|-----|-----|          |1111_001_011_001_111-{offset}
 17341:   //FBRA.L <label>                                  |A|--CC46|-|-----|-----|          |1111_001_011_001_111-{offset}        [FBT.L <label>]
 17342:   //FBSF.L <label>                                  |-|--CC46|-|-----|-----|          |1111_001_011_010_000-{offset}
 17343:   //FBSEQ.L <label>                                 |-|--CC46|-|-----|-----|          |1111_001_011_010_001-{offset}
 17344:   //FBGT.L <label>                                  |-|--CC46|-|-----|-----|          |1111_001_011_010_010-{offset}
 17345:   //FBGE.L <label>                                  |-|--CC46|-|-----|-----|          |1111_001_011_010_011-{offset}
 17346:   //FBLT.L <label>                                  |-|--CC46|-|-----|-----|          |1111_001_011_010_100-{offset}
 17347:   //FBLE.L <label>                                  |-|--CC46|-|-----|-----|          |1111_001_011_010_101-{offset}
 17348:   //FBGL.L <label>                                  |-|--CC46|-|-----|-----|          |1111_001_011_010_110-{offset}
 17349:   //FBGLE.L <label>                                 |-|--CC46|-|-----|-----|          |1111_001_011_010_111-{offset}
 17350:   //FBNGLE.L <label>                                |-|--CC46|-|-----|-----|          |1111_001_011_011_000-{offset}
 17351:   //FBNGL.L <label>                                 |-|--CC46|-|-----|-----|          |1111_001_011_011_001-{offset}
 17352:   //FBNLE.L <label>                                 |-|--CC46|-|-----|-----|          |1111_001_011_011_010-{offset}
 17353:   //FBNLT.L <label>                                 |-|--CC46|-|-----|-----|          |1111_001_011_011_011-{offset}
 17354:   //FBNGE.L <label>                                 |-|--CC46|-|-----|-----|          |1111_001_011_011_100-{offset}
 17355:   //FBNGT.L <label>                                 |-|--CC46|-|-----|-----|          |1111_001_011_011_101-{offset}
 17356:   //FBSNE.L <label>                                 |-|--CC46|-|-----|-----|          |1111_001_011_011_110-{offset}
 17357:   //FBST.L <label>                                  |-|--CC46|-|-----|-----|          |1111_001_011_011_111-{offset}
 17358:   public static void irpFbccLong () throws M68kException {
 17359:   fbcc: {
 17360:     //XEiJ.fpuBox.epbExceptionStatusWord = 0;
 17361:     if (XEiJ.currentMPU == Model.MPU_MC68LC060) {
 17362:       irpFline ();
 17363:       break fbcc;
 17364:     }
 17365:     XEiJ.fpuBox.epbFpiar = XEiJ.regPC0;  //FPIARはFMOVEM/FMOVE FPcr/FSAVE/FRESTORE以外の命令で例外が発生しなくても更新される
 17366:     if ((XEiJ.regOC & 0b010000) != 0 && (XEiJ.fpuBox.epbFpsr & XEiJ.FPU_FPSR_NAN) != 0) {  //IEEEノンアウェアテストでNANがセットされているとき
 17367:       XEiJ.fpuBox.epbFpsr |= XEiJ.FPU_FPSR_EXC_BSUN;  //BSUNをセット
 17368:       XEiJ.fpuBox.epbFpsr |= XEiJ.FPU_FPSR_EXC_TO_AEXC[XEiJ.fpuBox.epbFpsr >> 8 & 255];
 17369:       if ((XEiJ.fpuBox.epbFpcr & XEiJ.FPU_FPCR_BSUN) != 0) {  //BSUN例外許可
 17370:         XEiJ.fpuBox.epbExceptionStatusWord = 0xe000 | M68kException.M6E_FP_BRANCH_SET_UNORDERED & 7;
 17371:         irpExceptionFormat0 (M68kException.M6E_FP_BRANCH_SET_UNORDERED << 2, XEiJ.regPC0);  //pcは命令の先頭
 17372:         break fbcc;
 17373:       }
 17374:     }
 17375:     XEiJ.mpuCycleCount++;
 17376:     int t = XEiJ.regPC;  //pc0+2
 17377:     XEiJ.regPC = t + 4;  //pc0+6
 17378:     t += mmuReadLongExword (t, XEiJ.regSRS);  //pc0+2+32bitディスプレースメント
 17379:     if ((t & 1) != 0) {  //分岐先のアドレスが奇数
 17380:       //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ
 17381:       irpBccAddressError (t);
 17382:     }
 17383:     if (XEiJ.FPU_CCMAP_060[(XEiJ.regOC & 63) << 4 | XEiJ.fpuBox.epbFpsr >> 24 & 15]) {  //分岐する
 17384:       irpSetPC (t);
 17385:     }
 17386:   }  //fbcc
 17387:   }  //irpFbccLong
 17388: 
 17389:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 17390:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 17391:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 17392:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 17393:   //FSAVE <ea>                                      |-|--CC46|P|-----|-----|  M -WXZ  |1111_001_100_mmm_rrr
 17394:   public static void irpFsave () throws M68kException {
 17395:     if (XEiJ.currentMPU == Model.MPU_MC68LC060) {
 17396:       irpFline ();
 17397:       return;
 17398:     }
 17399:     if (XEiJ.regSRS == 0) {  //ユーザモードのとき
 17400:       M68kException.m6eNumber = M68kException.M6E_PRIVILEGE_VIOLATION;
 17401:       throw M68kException.m6eSignal;
 17402:     }
 17403:     //以下はスーパーバイザモード
 17404:     XEiJ.mpuCycleCount += 3;
 17405:     int ea = XEiJ.regOC & 63;
 17406:     int a;
 17407:     if (ea >> 3 == XEiJ.MMM_MN) {  //-(Ar)
 17408:       int arr = XEiJ.regOC & 7 | 8;
 17409:       M68kException.m6eIncremented -= 12L << (arr << 3);
 17410:       a = XEiJ.regRn[arr] -= 12;
 17411:     } else {  //-(Ar)以外
 17412:       a = efaCltWord (ea);
 17413:     }
 17414:     if (XEiJ.fpuBox.epbExceptionStatusWord == 0) {  //例外なし
 17415:       mmuWriteLongData (a, 0x00006000, 1);  //アイドルフレーム
 17416:       mmuWriteQuadSecond (a + 4, 0L, 1);
 17417:     } else {  //例外あり
 17418:       mmuWriteLongData (a, XEiJ.fpuBox.epbExceptionOperandExponent | XEiJ.fpuBox.epbExceptionStatusWord, 1);  //例外フレーム
 17419:       mmuWriteQuadSecond (a + 4, XEiJ.fpuBox.epbExceptionOperandMantissa, 1);
 17420:       XEiJ.fpuBox.epbExceptionStatusWord = 0;
 17421:     }
 17422:   }  //irpFsave
 17423: 
 17424:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 17425:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 17426:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 17427:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 17428:   //FRESTORE <ea>                                   |-|--CC46|P|-----|-----|  M+ WXZP |1111_001_101_mmm_rrr
 17429:   public static void irpFrestore () throws M68kException {
 17430:     if (XEiJ.currentMPU == Model.MPU_MC68LC060) {
 17431:       irpFline ();
 17432:       return;
 17433:     }
 17434:     if (XEiJ.regSRS == 0) {  //ユーザモードのとき
 17435:       M68kException.m6eNumber = M68kException.M6E_PRIVILEGE_VIOLATION;
 17436:       throw M68kException.m6eSignal;
 17437:     }
 17438:     //以下はスーパーバイザモード
 17439:     XEiJ.mpuCycleCount += 6;
 17440:     int ea = XEiJ.regOC & 63;
 17441:     int a;
 17442:     if (ea >> 3 == XEiJ.MMM_MP) {  //(Ar)+
 17443:       int arr = XEiJ.regOC & 7 | 8;
 17444:       M68kException.m6eIncremented += 12L << (arr << 3);
 17445:       a = XEiJ.regRn[arr] += 12;
 17446:     } else {  //(Ar)+以外
 17447:       a = efaCntWord (ea);
 17448:     }
 17449:     int i = mmuReadLongData (a, 1);
 17450:     long l = mmuReadQuadData (a + 4, 1);
 17451:     if ((i & 0xff00) == 0xe000) {  //例外フレーム
 17452:       //例外ハンドラが0xe0xxを0x60xxに変更してFRESTOREする場合がある
 17453:       XEiJ.fpuBox.epbExceptionStatusWord = (char) i;
 17454:       XEiJ.fpuBox.epbExceptionOperandExponent = i & 0xffff0000;
 17455:       XEiJ.fpuBox.epbExceptionOperandMantissa = l;
 17456:     } else {
 17457:       XEiJ.fpuBox.epbExceptionStatusWord = 0;
 17458:       XEiJ.fpuBox.epbExceptionOperandExponent = 0;
 17459:       XEiJ.fpuBox.epbExceptionOperandMantissa = 0x0000000000000000L;
 17460:     }
 17461:     //FPSRのAEXCをクリアする
 17462:     XEiJ.fpuBox.epbFpsr = 0;
 17463:     //FPIARをクリアする
 17464:     XEiJ.fpuBox.epbFpiar = 0;
 17465:   }  //irpFrestore
 17466: 
 17467:   //irpFPPreInstruction ()
 17468:   //  浮動小数点命令実行前例外 floating-point pre-instruction exception
 17469:   //  優先順位はBSUN>SNAN>OPERR>OVFL>UNFL>DZ>INEX2/INEX1
 17470:   //  複数の例外が同時に発生したときは最上位の例外ハンドラだけが呼び出される
 17471:   //  浮動小数点例外ハンドラは自分よりも下位の浮動小数点例外が発生していないか確認しなければならない
 17472:   public static boolean irpFPPreInstruction () throws M68kException {
 17473:     int mask = XEiJ.fpuBox.epbFpcr & XEiJ.fpuBox.epbFpsr & 0x0000ff00;
 17474:     if (mask == 0) {
 17475:       return false;
 17476:     }
 17477:     int number = FP_OFFSET_TO_NUMBER[Integer.numberOfLeadingZeros (mask)];
 17478:     XEiJ.fpuBox.epbExceptionStatusWord = 0xe000 | number & 7;
 17479:     irpExceptionFormat0 (number << 2, XEiJ.regPC0);  //pcは命令の先頭
 17480:     return true;
 17481:   }  //irpFPPreInstruction()
 17482: 
 17483:   //irpFPPostInstruction (a)
 17484:   //  浮動小数点命令実行後例外 floating-point post-instruction exception
 17485:   //  優先順位はBSUN>SNAN>OPERR>OVFL>UNFL>DZ>INEX2/INEX1
 17486:   //  複数の例外が同時に発生したときは最上位の例外ハンドラだけが呼び出される
 17487:   //  浮動小数点例外ハンドラは自分よりも下位の浮動小数点例外が発生していないか確認しなければならない
 17488:   public static boolean irpFPPostInstruction (int a) throws M68kException {
 17489:     int mask = XEiJ.fpuBox.epbFpcr & XEiJ.fpuBox.epbFpsr & 0x0000ff00;
 17490:     if (mask == 0) {
 17491:       return false;
 17492:     }
 17493:     int number = FP_OFFSET_TO_NUMBER[Integer.numberOfLeadingZeros (mask)];
 17494:     XEiJ.fpuBox.epbExceptionStatusWord = 0xe000 | number & 7;
 17495:     irpExceptionFormat3 (number << 2, XEiJ.regPC, a);  //pcは次の命令,アドレスはデスティネーションオペランド
 17496:     return true;
 17497:   }  //irpFPPostInstruction(int)
 17498: 
 17499:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 17500:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 17501:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 17502:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 17503:   //CINVL NC,(Ar)                                   |-|----46|P|-----|-----|          |1111_010_000_001_rrr
 17504:   //CINVP NC,(Ar)                                   |-|----46|P|-----|-----|          |1111_010_000_010_rrr
 17505:   //CINVA NC                                        |-|----46|P|-----|-----|          |1111_010_000_011_000
 17506:   //CPUSHL NC,(Ar)                                  |-|----46|P|-----|-----|          |1111_010_000_101_rrr
 17507:   //CPUSHP NC,(Ar)                                  |-|----46|P|-----|-----|          |1111_010_000_110_rrr
 17508:   //CPUSHA NC                                       |-|----46|P|-----|-----|          |1111_010_000_111_000
 17509:   public static void irpCinvCpushNC () throws M68kException {
 17510:     if (XEiJ.regSRS == 0) {  //ユーザモードのとき
 17511:       M68kException.m6eNumber = M68kException.M6E_PRIVILEGE_VIOLATION;
 17512:       throw M68kException.m6eSignal;
 17513:     }
 17514:     //以下はスーパーバイザモード
 17515:     XEiJ.mpuCycleCount++;
 17516:   }  //irpCinvCpushNC
 17517: 
 17518:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 17519:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 17520:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 17521:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 17522:   //CINVL DC,(Ar)                                   |-|----46|P|-----|-----|          |1111_010_001_001_rrr
 17523:   //CINVP DC,(Ar)                                   |-|----46|P|-----|-----|          |1111_010_001_010_rrr
 17524:   //CINVA DC                                        |-|----46|P|-----|-----|          |1111_010_001_011_000
 17525:   //CPUSHL DC,(Ar)                                  |-|----46|P|-----|-----|          |1111_010_001_101_rrr
 17526:   //CPUSHP DC,(Ar)                                  |-|----46|P|-----|-----|          |1111_010_001_110_rrr
 17527:   //CPUSHA DC                                       |-|----46|P|-----|-----|          |1111_010_001_111_000
 17528:   public static void irpCinvCpushDC () throws M68kException {
 17529:     if (XEiJ.regSRS == 0) {  //ユーザモードのとき
 17530:       M68kException.m6eNumber = M68kException.M6E_PRIVILEGE_VIOLATION;
 17531:       throw M68kException.m6eSignal;
 17532:     }
 17533:     //以下はスーパーバイザモード
 17534:     XEiJ.mpuCycleCount++;
 17535:   }  //irpCinvCpushDC
 17536: 
 17537:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 17538:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 17539:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 17540:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 17541:   //CINVL IC,(Ar)                                   |-|----46|P|-----|-----|          |1111_010_010_001_rrr
 17542:   //CINVP IC,(Ar)                                   |-|----46|P|-----|-----|          |1111_010_010_010_rrr
 17543:   //CINVA IC                                        |-|----46|P|-----|-----|          |1111_010_010_011_000
 17544:   //CPUSHL IC,(Ar)                                  |-|----46|P|-----|-----|          |1111_010_010_101_rrr
 17545:   //CPUSHP IC,(Ar)                                  |-|----46|P|-----|-----|          |1111_010_010_110_rrr
 17546:   //CPUSHA IC                                       |-|----46|P|-----|-----|          |1111_010_010_111_000
 17547:   public static void irpCinvCpushIC () throws M68kException {
 17548:     if (XEiJ.regSRS == 0) {  //ユーザモードのとき
 17549:       M68kException.m6eNumber = M68kException.M6E_PRIVILEGE_VIOLATION;
 17550:       throw M68kException.m6eSignal;
 17551:     }
 17552:     //以下はスーパーバイザモード
 17553:     XEiJ.mpuCycleCount++;
 17554:   }  //irpCinvCpushIC
 17555: 
 17556:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 17557:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 17558:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 17559:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 17560:   //CINVL BC,(Ar)                                   |-|----46|P|-----|-----|          |1111_010_011_001_rrr
 17561:   //CINVP BC,(Ar)                                   |-|----46|P|-----|-----|          |1111_010_011_010_rrr
 17562:   //CINVA BC                                        |-|----46|P|-----|-----|          |1111_010_011_011_000
 17563:   //CPUSHL BC,(Ar)                                  |-|----46|P|-----|-----|          |1111_010_011_101_rrr
 17564:   //CPUSHP BC,(Ar)                                  |-|----46|P|-----|-----|          |1111_010_011_110_rrr
 17565:   //CPUSHA BC                                       |-|----46|P|-----|-----|          |1111_010_011_111_000
 17566:   public static void irpCinvCpushBC () throws M68kException {
 17567:     if (XEiJ.regSRS == 0) {  //ユーザモードのとき
 17568:       M68kException.m6eNumber = M68kException.M6E_PRIVILEGE_VIOLATION;
 17569:       throw M68kException.m6eSignal;
 17570:     }
 17571:     //以下はスーパーバイザモード
 17572:     XEiJ.mpuCycleCount++;
 17573:   }  //irpCinvCpushBC
 17574: 
 17575:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 17576:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 17577:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 17578:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 17579:   //PFLUSHN (Ar)                                    |-|----46|P|-----|-----|          |1111_010_100_000_rrr
 17580:   //PFLUSH (Ar)                                     |-|----46|P|-----|-----|          |1111_010_100_001_rrr
 17581:   //PFLUSHAN                                        |-|----46|P|-----|-----|          |1111_010_100_010_000
 17582:   //PFLUSHA                                         |-|----46|P|-----|-----|          |1111_010_100_011_000
 17583:   public static void irpPflush () throws M68kException {
 17584:     if (XEiJ.regSRS == 0) {  //ユーザモードのとき
 17585:       M68kException.m6eNumber = M68kException.M6E_PRIVILEGE_VIOLATION;
 17586:       throw M68kException.m6eSignal;
 17587:     }
 17588:     //以下はスーパーバイザモード
 17589:     if (XEiJ.regOC <= 0b1111_010_100_000_111) {  //PFLUSHN (An)
 17590:       XEiJ.mpuCycleCount += 18;
 17591:       mmuInvalidateNonGlobalCache (XEiJ.regRn[XEiJ.regOC - (0b1111_010_100_000_000 - 8)]);
 17592:     } else if (XEiJ.regOC <= 0b1111_010_100_001_111) {  //PFLUSH (An)
 17593:       XEiJ.mpuCycleCount += 18;
 17594:       mmuInvalidateCache (XEiJ.regRn[XEiJ.regOC - (0b1111_010_100_001_000 - 8)]);
 17595:     } else if (XEiJ.regOC == 0b1111_010_100_010_000) {  //PFLUSHAN
 17596:       XEiJ.mpuCycleCount += 33;
 17597:       mmuInvalidateAllNonGlobalCache ();
 17598:     } else if (XEiJ.regOC == 0b1111_010_100_011_000) {  //PFLUSHA
 17599:       XEiJ.mpuCycleCount += 33;
 17600:       mmuInvalidateAllCache ();
 17601:     } else {
 17602:       M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION;
 17603:       throw M68kException.m6eSignal;
 17604:     }
 17605:   }  //irpPflush
 17606: 
 17607:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 17608:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 17609:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 17610:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 17611:   //PLPAW (Ar)                                      |-|-----6|P|-----|-----|          |1111_010_110_001_rrr
 17612:   public static void irpPlpaw () throws M68kException {
 17613:     if (XEiJ.regSRS == 0) {  //ユーザモードのとき
 17614:       M68kException.m6eNumber = M68kException.M6E_PRIVILEGE_VIOLATION;
 17615:       throw M68kException.m6eSignal;
 17616:     }
 17617:     //以下はスーパーバイザモード
 17618:     XEiJ.mpuCycleCount += 15;
 17619:     int ann = XEiJ.regOC - (0b1111_010_110_001_000 - 8);  //8+nnn
 17620:     XEiJ.regRn[ann] = mmuLoadPhysicalAddressWrite (XEiJ.regRn[ann]);
 17621:   }  //irpPlpaw
 17622: 
 17623:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 17624:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 17625:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 17626:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 17627:   //PLPAR (Ar)                                      |-|-----6|P|-----|-----|          |1111_010_111_001_rrr
 17628:   //
 17629:   //PLPAR (Ar)
 17630:   //  ReadだがSFCではなくDFCを使う
 17631:   public static void irpPlpar () throws M68kException {
 17632:     if (XEiJ.regSRS == 0) {  //ユーザモードのとき
 17633:       M68kException.m6eNumber = M68kException.M6E_PRIVILEGE_VIOLATION;
 17634:       throw M68kException.m6eSignal;
 17635:     }
 17636:     //以下はスーパーバイザモード
 17637:     XEiJ.mpuCycleCount += 15;
 17638:     int ann = XEiJ.regOC - (0b1111_010_111_001_000 - 8);  //8+nnn
 17639:     XEiJ.regRn[ann] = mmuLoadPhysicalAddressRead (XEiJ.regRn[ann]);
 17640:   }  //irpPlpar
 17641: 
 17642:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 17643:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 17644:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 17645:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 17646:   //MOVE16 (Ar)+,xxx.L                              |-|----46|-|-----|-----|          |1111_011_000_000_rrr-{address}
 17647:   //MOVE16 xxx.L,(Ar)+                              |-|----46|-|-----|-----|          |1111_011_000_001_rrr-{address}
 17648:   //MOVE16 (Ar),xxx.L                               |-|----46|-|-----|-----|          |1111_011_000_010_rrr-{address}
 17649:   //MOVE16 xxx.L,(Ar)                               |-|----46|-|-----|-----|          |1111_011_000_011_rrr-{address}
 17650:   //MOVE16 (Ar)+,(An)+                              |-|----46|-|-----|-----|          |1111_011_000_100_rrr-1nnn000000000000
 17651:   //
 17652:   //MOVE16 (Ar)+,xxx.L
 17653:   //MOVE16 xxx.L,(Ar)+
 17654:   //MOVE16 (Ar),xxx.L
 17655:   //MOVE16 xxx.L,(Ar)
 17656:   //MOVE16 (Ar)+,(An)+
 17657:   //  アドレスの下位4bitは無視される
 17658:   //  ポストインクリメントで16増えるとき下位4bitは変化しない
 17659:   //  r==nのときMOVE16 (Ar)+,(Ar)+はMOVE16 (Ar),(Ar)+のような動作になる。データは動かずArは16だけ増える(M68060UM 1-21)
 17660:   public static void irpMove16 () throws M68kException {
 17661:     if (XEiJ.regOC <= 0b1111_011_000_011_111) {  //どちらかがxxx.L
 17662:       XEiJ.mpuCycleCount += 18;
 17663:       int arr = XEiJ.regOC - (0b1111_011_000_000_000 - 8);  //8+rrr
 17664:       int a = XEiJ.regRn[arr] & -16;
 17665:       int x = mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS) & -16;  //pcls
 17666:       if ((XEiJ.regOC & 0b001_000) == 0) {  //(Ar)→xxx.L
 17667:         long l = mmuReadQuadData (a, XEiJ.regSRS);
 17668:         long m = mmuReadQuadSecond (a + 8, XEiJ.regSRS);
 17669:         mmuWriteQuadData (x, l, XEiJ.regSRS);
 17670:         mmuWriteQuadSecond (x + 8, m, XEiJ.regSRS);
 17671:       } else {  //xxx.L→(An)
 17672:         long l = mmuReadQuadData (x, XEiJ.regSRS);
 17673:         long m = mmuReadQuadSecond (x + 8, XEiJ.regSRS);
 17674:         mmuWriteQuadData (a, l, XEiJ.regSRS);
 17675:         mmuWriteQuadSecond (a + 8, m, XEiJ.regSRS);
 17676:       }
 17677:       if ((XEiJ.regOC & 0b010_000) == 0) {  //(Ar)+
 17678:         XEiJ.regRn[arr] += 16;  //aはマスクされているのでa+16は不可
 17679:       }
 17680:     } else if (XEiJ.regOC <= 0b1111_011_000_100_111) {
 17681:       int w = mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);  //pcwz
 17682:       if ((w & 0b1000111111111111) == 0b1000000000000000) {  //MOVE16 (Ar)+,(As)+
 17683:         XEiJ.mpuCycleCount += 18;
 17684:         int arr = XEiJ.regOC - (0b1111_011_000_100_000 - 8);  //8+rrr
 17685:         int a = XEiJ.regRn[arr] & -16;
 17686:         int ass = w >> 12;  //8+sss
 17687:         int x = XEiJ.regRn[ass] & -16;
 17688:         long l = mmuReadQuadData (a, XEiJ.regSRS);
 17689:         long m = mmuReadQuadSecond (a + 8, XEiJ.regSRS);
 17690:         mmuWriteQuadData (x, l, XEiJ.regSRS);
 17691:         mmuWriteQuadSecond (x + 8, m, XEiJ.regSRS);
 17692:         XEiJ.regRn[arr] += 16;  //aはマスクされているのでa+16は不可
 17693:         if (arr != ass) {
 17694:           XEiJ.regRn[ass] += 16;  //xはマスクされているのでx+16は不可
 17695:         }
 17696:       } else {
 17697:         M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION;
 17698:         throw M68kException.m6eSignal;
 17699:       }
 17700:     } else {
 17701:       M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION;
 17702:       throw M68kException.m6eSignal;
 17703:     }
 17704:   }  //irpMove16
 17705: 
 17706:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 17707:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 17708:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 17709:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 17710:   //LPSTOP.W #<data>                                |-|-----6|P|-----|-----|          |1111_100_000_000_000-0000000111000000-{data}
 17711:   public static void irpLpstop () throws M68kException {
 17712:     if (XEiJ.regSRS == 0) {  //ユーザモードのとき
 17713:       M68kException.m6eNumber = M68kException.M6E_PRIVILEGE_VIOLATION;
 17714:       throw M68kException.m6eSignal;
 17715:     }
 17716:     //以下はスーパーバイザモード
 17717:     //!!! 非対応
 17718:   }  //irpLpstop
 17719: 
 17720:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 17721:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 17722:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 17723:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 17724:   //FPACK <data>                                    |A|012346|-|UUUUU|*****|          |1111_111_0dd_ddd_ddd [FLINE #<data>]
 17725:   public static void irpFpack () throws M68kException {
 17726:     if (!MainMemory.mmrFEfuncActivated) {
 17727:       irpFline ();
 17728:       return;
 17729:     }
 17730:     StringBuilder sb;
 17731:     int a0;
 17732:     if (FEFunction.FPK_DEBUG_TRACE) {
 17733:       sb = new StringBuilder ();
 17734:       String name = Disassembler.DIS_FPACK_NAME[XEiJ.regOC & 255];
 17735:       if (name.length () == 0) {
 17736:         XEiJ.fmtHex4 (sb.append ('$'), XEiJ.regOC);
 17737:       } else {
 17738:         sb.append (name);
 17739:       }
 17740:       sb.append ('\n');
 17741:       XEiJ.fmtHex8 (XEiJ.fmtHex8 (XEiJ.fmtHex8 (XEiJ.fmtHex8 (sb.append ("  D0="), XEiJ.regRn[0]).append (" D1="), XEiJ.regRn[1]).append (" D2="), XEiJ.regRn[2]).append (" D3="), XEiJ.regRn[3]);
 17742:       a0 = XEiJ.regRn[8];
 17743:       MainMemory.mmrRstr (sb.append (" (A0)=\""), a0, MainMemory.mmrStrlen (a0, 20)).append ("\"\n");
 17744:     }
 17745:     XEiJ.mpuCycleCount += FEFunction.FPK_CLOCK;  //一律にFEFunction.FPK_CLOCKサイクルかかることにする
 17746:     switch (XEiJ.regOC & 255) {
 17747:     case 0x00: FEFunction.fpkLMUL (); break;
 17748:     case 0x01: FEFunction.fpkLDIV (); break;
 17749:     case 0x02: FEFunction.fpkLMOD (); break;
 17750:       //case 0x03: break;
 17751:     case 0x04: FEFunction.fpkUMUL (); break;
 17752:     case 0x05: FEFunction.fpkUDIV (); break;
 17753:     case 0x06: FEFunction.fpkUMOD (); break;
 17754:       //case 0x07: break;
 17755:     case 0x08: FEFunction.fpkIMUL (); break;
 17756:     case 0x09: FEFunction.fpkIDIV (); break;
 17757:       //case 0x0a: break;
 17758:       //case 0x0b: break;
 17759:     case 0x0c: FEFunction.fpkRANDOMIZE (); break;
 17760:     case 0x0d: FEFunction.fpkSRAND (); break;
 17761:     case 0x0e: FEFunction.fpkRAND (); break;
 17762:       //case 0x0f: break;
 17763:     case 0x10: fpkSTOL (); break;
 17764:     case 0x11: fpkLTOS (); break;
 17765:     case 0x12: fpkSTOH (); break;
 17766:     case 0x13: fpkHTOS (); break;
 17767:     case 0x14: fpkSTOO (); break;
 17768:     case 0x15: fpkOTOS (); break;
 17769:     case 0x16: fpkSTOB (); break;
 17770:     case 0x17: fpkBTOS (); break;
 17771:     case 0x18: fpkIUSING (); break;
 17772:       //case 0x19: break;
 17773:     case 0x1a: FEFunction.fpkLTOD (); break;
 17774:     case 0x1b: FEFunction.fpkDTOL (); break;
 17775:     case 0x1c: FEFunction.fpkLTOF (); break;
 17776:     case 0x1d: FEFunction.fpkFTOL (); break;
 17777:     case 0x1e: FEFunction.fpkFTOD (); break;
 17778:     case 0x1f: FEFunction.fpkDTOF (); break;
 17779:     case 0x20: fpkVAL (); break;
 17780:     case 0x21: fpkUSING (); break;
 17781:     case 0x22: fpkSTOD (); break;
 17782:     case 0x23: fpkDTOS (); break;
 17783:     case 0x24: fpkECVT (); break;
 17784:     case 0x25: fpkFCVT (); break;
 17785:     case 0x26: fpkGCVT (); break;
 17786:       //case 0x27: break;
 17787:     case 0x28: FEFunction.fpkDTST (); break;
 17788:     case 0x29: FEFunction.fpkDCMP (); break;
 17789:     case 0x2a: FEFunction.fpkDNEG (); break;
 17790:     case 0x2b: FEFunction.fpkDADD (); break;
 17791:     case 0x2c: FEFunction.fpkDSUB (); break;
 17792:     case 0x2d: FEFunction.fpkDMUL (); break;
 17793:     case 0x2e: FEFunction.fpkDDIV (); break;
 17794:     case 0x2f: FEFunction.fpkDMOD (); break;
 17795:     case 0x30: FEFunction.fpkDABS (); break;
 17796:     case 0x31: FEFunction.fpkDCEIL (); break;
 17797:     case 0x32: FEFunction.fpkDFIX (); break;
 17798:     case 0x33: FEFunction.fpkDFLOOR (); break;
 17799:     case 0x34: FEFunction.fpkDFRAC (); break;
 17800:     case 0x35: FEFunction.fpkDSGN (); break;
 17801:     case 0x36: FEFunction.fpkSIN (); break;
 17802:     case 0x37: FEFunction.fpkCOS (); break;
 17803:     case 0x38: FEFunction.fpkTAN (); break;
 17804:     case 0x39: FEFunction.fpkATAN (); break;
 17805:     case 0x3a: FEFunction.fpkLOG (); break;
 17806:     case 0x3b: FEFunction.fpkEXP (); break;
 17807:     case 0x3c: FEFunction.fpkSQR (); break;
 17808:     case 0x3d: FEFunction.fpkPI (); break;
 17809:     case 0x3e: FEFunction.fpkNPI (); break;
 17810:     case 0x3f: FEFunction.fpkPOWER (); break;
 17811:     case 0x40: FEFunction.fpkRND (); break;
 17812:     case 0x41: FEFunction.fpkSINH (); break;
 17813:     case 0x42: FEFunction.fpkCOSH (); break;
 17814:     case 0x43: FEFunction.fpkTANH (); break;
 17815:     case 0x44: FEFunction.fpkATANH (); break;
 17816:     case 0x45: FEFunction.fpkASIN (); break;
 17817:     case 0x46: FEFunction.fpkACOS (); break;
 17818:     case 0x47: FEFunction.fpkLOG10 (); break;
 17819:     case 0x48: FEFunction.fpkLOG2 (); break;
 17820:     case 0x49: FEFunction.fpkDFREXP (); break;
 17821:     case 0x4a: FEFunction.fpkDLDEXP (); break;
 17822:     case 0x4b: FEFunction.fpkDADDONE (); break;
 17823:     case 0x4c: FEFunction.fpkDSUBONE (); break;
 17824:     case 0x4d: FEFunction.fpkDDIVTWO (); break;
 17825:     case 0x4e: FEFunction.fpkDIEECNV (); break;
 17826:     case 0x4f: FEFunction.fpkIEEDCNV (); break;
 17827:     case 0x50: fpkFVAL (); break;
 17828:     case 0x51: FEFunction.fpkFUSING (); break;
 17829:     case 0x52: FEFunction.fpkSTOF (); break;
 17830:     case 0x53: FEFunction.fpkFTOS (); break;
 17831:     case 0x54: FEFunction.fpkFECVT (); break;
 17832:     case 0x55: FEFunction.fpkFFCVT (); break;
 17833:     case 0x56: FEFunction.fpkFGCVT (); break;
 17834:       //case 0x57: break;
 17835:     case 0x58: FEFunction.fpkFTST (); break;
 17836:     case 0x59: FEFunction.fpkFCMP (); break;
 17837:     case 0x5a: FEFunction.fpkFNEG (); break;
 17838:     case 0x5b: FEFunction.fpkFADD (); break;
 17839:     case 0x5c: FEFunction.fpkFSUB (); break;
 17840:     case 0x5d: FEFunction.fpkFMUL (); break;
 17841:     case 0x5e: FEFunction.fpkFDIV (); break;
 17842:     case 0x5f: FEFunction.fpkFMOD (); break;
 17843:     case 0x60: FEFunction.fpkFABS (); break;
 17844:     case 0x61: FEFunction.fpkFCEIL (); break;
 17845:     case 0x62: FEFunction.fpkFFIX (); break;
 17846:     case 0x63: FEFunction.fpkFFLOOR (); break;
 17847:     case 0x64: FEFunction.fpkFFRAC (); break;
 17848:     case 0x65: FEFunction.fpkFSGN (); break;
 17849:     case 0x66: FEFunction.fpkFSIN (); break;
 17850:     case 0x67: FEFunction.fpkFCOS (); break;
 17851:     case 0x68: FEFunction.fpkFTAN (); break;
 17852:     case 0x69: FEFunction.fpkFATAN (); break;
 17853:     case 0x6a: FEFunction.fpkFLOG (); break;
 17854:     case 0x6b: FEFunction.fpkFEXP (); break;
 17855:     case 0x6c: FEFunction.fpkFSQR (); break;
 17856:     case 0x6d: FEFunction.fpkFPI (); break;
 17857:     case 0x6e: FEFunction.fpkFNPI (); break;
 17858:     case 0x6f: FEFunction.fpkFPOWER (); break;
 17859:     case 0x70: FEFunction.fpkFRND (); break;
 17860:     case 0x71: FEFunction.fpkFSINH (); break;
 17861:     case 0x72: FEFunction.fpkFCOSH (); break;
 17862:     case 0x73: FEFunction.fpkFTANH (); break;
 17863:     case 0x74: FEFunction.fpkFATANH (); break;
 17864:     case 0x75: FEFunction.fpkFASIN (); break;
 17865:     case 0x76: FEFunction.fpkFACOS (); break;
 17866:     case 0x77: FEFunction.fpkFLOG10 (); break;
 17867:     case 0x78: FEFunction.fpkFLOG2 (); break;
 17868:     case 0x79: FEFunction.fpkFFREXP (); break;
 17869:     case 0x7a: FEFunction.fpkFLDEXP (); break;
 17870:     case 0x7b: FEFunction.fpkFADDONE (); break;
 17871:     case 0x7c: FEFunction.fpkFSUBONE (); break;
 17872:     case 0x7d: FEFunction.fpkFDIVTWO (); break;
 17873:     case 0x7e: FEFunction.fpkFIEECNV (); break;
 17874:     case 0x7f: FEFunction.fpkIEEFCNV (); break;
 17875:       //case 0x80: break;
 17876:       //case 0x81: break;
 17877:       //case 0x82: break;
 17878:       //case 0x83: break;
 17879:       //case 0x84: break;
 17880:       //case 0x85: break;
 17881:       //case 0x86: break;
 17882:       //case 0x87: break;
 17883:       //case 0x88: break;
 17884:       //case 0x89: break;
 17885:       //case 0x8a: break;
 17886:       //case 0x8b: break;
 17887:       //case 0x8c: break;
 17888:       //case 0x8d: break;
 17889:       //case 0x8e: break;
 17890:       //case 0x8f: break;
 17891:       //case 0x90: break;
 17892:       //case 0x91: break;
 17893:       //case 0x92: break;
 17894:       //case 0x93: break;
 17895:       //case 0x94: break;
 17896:       //case 0x95: break;
 17897:       //case 0x96: break;
 17898:       //case 0x97: break;
 17899:       //case 0x98: break;
 17900:       //case 0x99: break;
 17901:       //case 0x9a: break;
 17902:       //case 0x9b: break;
 17903:       //case 0x9c: break;
 17904:       //case 0x9d: break;
 17905:       //case 0x9e: break;
 17906:       //case 0x9f: break;
 17907:       //case 0xa0: break;
 17908:       //case 0xa1: break;
 17909:       //case 0xa2: break;
 17910:       //case 0xa3: break;
 17911:       //case 0xa4: break;
 17912:       //case 0xa5: break;
 17913:       //case 0xa6: break;
 17914:       //case 0xa7: break;
 17915:       //case 0xa8: break;
 17916:       //case 0xa9: break;
 17917:       //case 0xaa: break;
 17918:       //case 0xab: break;
 17919:       //case 0xac: break;
 17920:       //case 0xad: break;
 17921:       //case 0xae: break;
 17922:       //case 0xaf: break;
 17923:       //case 0xb0: break;
 17924:       //case 0xb1: break;
 17925:       //case 0xb2: break;
 17926:       //case 0xb3: break;
 17927:       //case 0xb4: break;
 17928:       //case 0xb5: break;
 17929:       //case 0xb6: break;
 17930:       //case 0xb7: break;
 17931:       //case 0xb8: break;
 17932:       //case 0xb9: break;
 17933:       //case 0xba: break;
 17934:       //case 0xbb: break;
 17935:       //case 0xbc: break;
 17936:       //case 0xbd: break;
 17937:       //case 0xbe: break;
 17938:       //case 0xbf: break;
 17939:       //case 0xc0: break;
 17940:       //case 0xc1: break;
 17941:       //case 0xc2: break;
 17942:       //case 0xc3: break;
 17943:       //case 0xc4: break;
 17944:       //case 0xc5: break;
 17945:       //case 0xc6: break;
 17946:       //case 0xc7: break;
 17947:       //case 0xc8: break;
 17948:       //case 0xc9: break;
 17949:       //case 0xca: break;
 17950:       //case 0xcb: break;
 17951:       //case 0xcc: break;
 17952:       //case 0xcd: break;
 17953:       //case 0xce: break;
 17954:       //case 0xcf: break;
 17955:       //case 0xd0: break;
 17956:       //case 0xd1: break;
 17957:       //case 0xd2: break;
 17958:       //case 0xd3: break;
 17959:       //case 0xd4: break;
 17960:       //case 0xd5: break;
 17961:       //case 0xd6: break;
 17962:       //case 0xd7: break;
 17963:       //case 0xd8: break;
 17964:       //case 0xd9: break;
 17965:       //case 0xda: break;
 17966:       //case 0xdb: break;
 17967:       //case 0xdc: break;
 17968:       //case 0xdd: break;
 17969:       //case 0xde: break;
 17970:       //case 0xdf: break;
 17971:     case 0xe0: fpkCLMUL (); break;
 17972:     case 0xe1: fpkCLDIV (); break;
 17973:     case 0xe2: fpkCLMOD (); break;
 17974:     case 0xe3: fpkCUMUL (); break;
 17975:     case 0xe4: fpkCUDIV (); break;
 17976:     case 0xe5: fpkCUMOD (); break;
 17977:     case 0xe6: fpkCLTOD (); break;
 17978:     case 0xe7: fpkCDTOL (); break;
 17979:     case 0xe8: fpkCLTOF (); break;
 17980:     case 0xe9: fpkCFTOL (); break;
 17981:     case 0xea: fpkCFTOD (); break;
 17982:     case 0xeb: fpkCDTOF (); break;
 17983:     case 0xec: fpkCDCMP (); break;
 17984:     case 0xed: fpkCDADD (); break;
 17985:     case 0xee: fpkCDSUB (); break;
 17986:     case 0xef: fpkCDMUL (); break;
 17987:     case 0xf0: fpkCDDIV (); break;
 17988:     case 0xf1: fpkCDMOD (); break;
 17989:     case 0xf2: fpkCFCMP (); break;
 17990:     case 0xf3: fpkCFADD (); break;
 17991:     case 0xf4: fpkCFSUB (); break;
 17992:     case 0xf5: fpkCFMUL (); break;
 17993:     case 0xf6: fpkCFDIV (); break;
 17994:     case 0xf7: fpkCFMOD (); break;
 17995:     case 0xf8: fpkCDTST (); break;
 17996:     case 0xf9: fpkCFTST (); break;
 17997:     case 0xfa: fpkCDINC (); break;
 17998:     case 0xfb: fpkCFINC (); break;
 17999:     case 0xfc: fpkCDDEC (); break;
 18000:     case 0xfd: fpkCFDEC (); break;
 18001:     case 0xfe: FEFunction.fpkFEVARG (); break;
 18002:     //case 0xff: FEFunction.fpkFEVECS (); break;  //FLOATn.Xに処理させる
 18003:     default:
 18004:       XEiJ.mpuCycleCount -= FEFunction.FPK_CLOCK;  //戻す
 18005:       irpFline ();
 18006:     }
 18007:     if (FEFunction.FPK_DEBUG_TRACE) {
 18008:       int i = sb.length ();
 18009:       XEiJ.fmtHex8 (XEiJ.fmtHex8 (XEiJ.fmtHex8 (XEiJ.fmtHex8 (sb.append ("  D0="), XEiJ.regRn[0]).append (" D1="), XEiJ.regRn[1]).append (" D2="), XEiJ.regRn[2]).append (" D3="), XEiJ.regRn[3]);
 18010:       int l = MainMemory.mmrStrlen (a0, 20);
 18011:       sb.append (" (A0)=\"");
 18012:       i = sb.length () - i;
 18013:       MainMemory.mmrRstr (sb, a0, l).append ("\"\n");
 18014:       if (a0 <= XEiJ.regRn[8] && XEiJ.regRn[8] <= a0 + l) {
 18015:         for (i += sb.length () + XEiJ.regRn[8] - a0; sb.length () < i; ) {
 18016:           sb.append (' ');
 18017:         }
 18018:         sb.append ('^');
 18019:       }
 18020:       System.out.println (sb.toString ());
 18021:     }
 18022:   }  //irpFpack
 18023: 
 18024:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 18025:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 18026:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 18027:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 18028:   //DOS <data>                                      |A|012346|-|UUUUU|UUUUU|          |1111_111_1dd_ddd_ddd [FLINE #<data>]
 18029:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 18030:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 18031:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 18032:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 18033:   //FLINE #<data>                                   |-|012346|-|UUUUU|UUUUU|          |1111_ddd_ddd_ddd_ddd (line 1111 emulator)
 18034:   public static void irpFline () throws M68kException {
 18035:     irpExceptionFormat0 (M68kException.M6E_LINE_1111_EMULATOR << 2, XEiJ.regPC0);  //pcは命令の先頭
 18036:   }  //irpFline
 18037: 
 18038:   //irpIllegal ()
 18039:   //  オペコードの上位10bitで分類されなかった未実装命令
 18040:   //  命令実行回数をカウントするために分けてある
 18041:   //  0x4afcのILLEGAL命令はTASに分類されて未実装実効アドレスで処理されるのでここには来ない
 18042:   public static void irpIllegal () throws M68kException {
 18043:     if (true) {
 18044:       M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION;
 18045:       throw M68kException.m6eSignal;
 18046:     }
 18047:   }  //irpIllegal
 18048: 
 18049:   //z = irpAbcd (x, y)
 18050:   //  ABCD
 18051:   public static int irpAbcd (int x, int y) {
 18052:     int c = XEiJ.regCCR >> 4;
 18053:     int t = (x & 0xff) + (y & 0xff) + c;  //仮の結果
 18054:     int z = t;  //結果
 18055:     if (0x0a <= (x & 0x0f) + (y & 0x0f) + c) {  //ハーフキャリー
 18056:       z += 0x10 - 0x0a;
 18057:     }
 18058:     //XとCはキャリーがあるときセット、さもなくばクリア
 18059:     if (0xa0 <= z) {  //キャリー
 18060:       z += 0x100 - 0xa0;
 18061:       XEiJ.regCCR |= XEiJ.REG_CCR_X | XEiJ.REG_CCR_C;
 18062:     } else {
 18063:       XEiJ.regCCR &= ~(XEiJ.REG_CCR_X | XEiJ.REG_CCR_C);
 18064:     }
 18065:     //Zは結果が0でないときクリア、さもなくば変化しない
 18066:     z &= 0xff;
 18067:     if (z != 0x00) {
 18068:       XEiJ.regCCR &= ~XEiJ.REG_CCR_Z;
 18069:     }
 18070:     if (false) {
 18071:       //000/030のときNは結果の最上位ビット
 18072:       if ((z & 0x80) != 0) {
 18073:         XEiJ.regCCR |= XEiJ.REG_CCR_N;
 18074:       } else {
 18075:         XEiJ.regCCR &= ~XEiJ.REG_CCR_N;
 18076:       }
 18077:       //000のときVは補正値の加算でオーバーフローしたときセット、さもなくばクリア
 18078:       int a = z - t;  //補正値
 18079:       if ((((t ^ z) & (a ^ z)) & 0x80) != 0) {
 18080:         XEiJ.regCCR |= XEiJ.REG_CCR_V;
 18081:       } else {
 18082:         XEiJ.regCCR &= ~XEiJ.REG_CCR_V;
 18083:       }
 18084:     } else if (false) {
 18085:       //000/030のときNは結果の最上位ビット
 18086:       if ((z & 0x80) != 0) {
 18087:         XEiJ.regCCR |= XEiJ.REG_CCR_N;
 18088:       } else {
 18089:         XEiJ.regCCR &= ~XEiJ.REG_CCR_N;
 18090:       }
 18091:       //030のときVはクリア
 18092:       XEiJ.regCCR &= ~XEiJ.REG_CCR_V;
 18093:     } else {
 18094:       //060のときNとVは変化しない
 18095:     }
 18096:     return z;
 18097:   }  //irpAbcd
 18098: 
 18099:   //z = irpSbcd (x, y)
 18100:   //  SBCD
 18101:   public static int irpSbcd (int x, int y) {
 18102:     int b = XEiJ.regCCR >> 4;
 18103:     int t = (x & 0xff) - (y & 0xff) - b;  //仮の結果
 18104:     int z = t;  //結果
 18105:     if ((x & 0x0f) - (y & 0x0f) - b < 0) {  //ハーフボロー
 18106:       z -= 0x10 - 0x0a;
 18107:     }
 18108:     //XとCはボローがあるときセット、さもなくばクリア
 18109:     if (z < 0) {  //ボロー
 18110:       if (t < 0) {
 18111:         z -= 0x100 - 0xa0;
 18112:       }
 18113:       XEiJ.regCCR |= XEiJ.REG_CCR_X | XEiJ.REG_CCR_C;
 18114:     } else {
 18115:       XEiJ.regCCR &= ~(XEiJ.REG_CCR_X | XEiJ.REG_CCR_C);
 18116:     }
 18117:     //Zは結果が0でないときクリア、さもなくば変化しない
 18118:     z &= 0xff;
 18119:     if (z != 0x00) {
 18120:       XEiJ.regCCR &= ~XEiJ.REG_CCR_Z;
 18121:     }
 18122:     if (false) {
 18123:       //000/030のときNは結果の最上位ビット
 18124:       if ((z & 0x80) != 0) {
 18125:         XEiJ.regCCR |= XEiJ.REG_CCR_N;
 18126:       } else {
 18127:         XEiJ.regCCR &= ~XEiJ.REG_CCR_N;
 18128:       }
 18129:       //000のときVは補正値の加算でオーバーフローしたときセット、さもなくばクリア
 18130:       int a = z - t;  //補正値
 18131:       if ((((t ^ z) & (a ^ z)) & 0x80) != 0) {
 18132:         XEiJ.regCCR |= XEiJ.REG_CCR_V;
 18133:       } else {
 18134:         XEiJ.regCCR &= ~XEiJ.REG_CCR_V;
 18135:       }
 18136:     } else if (false) {
 18137:       //000/030のときNは結果の最上位ビット
 18138:       if ((z & 0x80) != 0) {
 18139:         XEiJ.regCCR |= XEiJ.REG_CCR_N;
 18140:       } else {
 18141:         XEiJ.regCCR &= ~XEiJ.REG_CCR_N;
 18142:       }
 18143:       //030のときVはクリア
 18144:       XEiJ.regCCR &= ~XEiJ.REG_CCR_V;
 18145:     } else {
 18146:       //060のときNとVは変化しない
 18147:     }
 18148:     return z;
 18149:   }  //irpSbcd
 18150: 
 18151: 
 18152: 
 18153:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 18154:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 18155:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 18156:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 18157:   //HFSBOOT                                         |-|012346|-|-----|-----|          |0100_111_000_000_000
 18158:   //HFSINST                                         |-|012346|-|-----|-----|          |0100_111_000_000_001
 18159:   //HFSSTR                                          |-|012346|-|-----|-----|          |0100_111_000_000_010
 18160:   //HFSINT                                          |-|012346|-|-----|-----|          |0100_111_000_000_011
 18161:   //EMXNOP                                          |-|012346|-|-----|-----|          |0100_111_000_000_100
 18162:   //  エミュレータ拡張命令
 18163:   public static void irpEmx () throws M68kException {
 18164:     switch (XEiJ.regOC & 63) {
 18165:     case XEiJ.EMX_OPCODE_HFSBOOT & 63:
 18166:       XEiJ.mpuCycleCount += 19;
 18167:       if (HFS.hfsIPLBoot ()) {
 18168:         //JMP $6800.W
 18169:         irpSetPC (0x00006800);
 18170:       }
 18171:       break;
 18172:     case XEiJ.EMX_OPCODE_HFSINST & 63:
 18173:       XEiJ.mpuCycleCount += 19;
 18174:       HFS.hfsInstall ();
 18175:       break;
 18176:     case XEiJ.EMX_OPCODE_HFSSTR & 63:
 18177:       XEiJ.mpuCycleCount += 19;
 18178:       HFS.hfsStrategy ();
 18179:       break;
 18180:     case XEiJ.EMX_OPCODE_HFSINT & 63:
 18181:       XEiJ.mpuCycleCount += 19;
 18182:       //XEiJ.mpuClockTime += TMR_FREQ / 100000L;  //0.01ms
 18183:       if (HFS.hfsInterrupt ()) {
 18184:         //WAIT
 18185:         XEiJ.mpuTraceFlag = 0;  //トレース例外を発生させない
 18186:         XEiJ.regPC = XEiJ.regPC0;  //ループ
 18187:         XEiJ.mpuClockTime += XEiJ.TMR_FREQ * 4 / 1000000;  //4μs。10MHzのとき40clk
 18188:         XEiJ.mpuLastNano += 4000L;
 18189:       }
 18190:       break;
 18191:     case XEiJ.EMX_OPCODE_EMXNOP & 63:
 18192:       XEiJ.emxNop ();
 18193:       break;
 18194:     default:
 18195:       M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION;
 18196:       throw M68kException.m6eSignal;
 18197:     }
 18198:   }  //irpEmx
 18199: 
 18200: 
 18201: 
 18202:   //irpSetPC (a)
 18203:   //  pcへデータを書き込む
 18204:   //  奇数のときはアドレスエラーが発生する
 18205:   public static void irpSetPC (int a) throws M68kException {
 18206:     if (XEiJ.TEST_BIT_0_SHIFT ? a << 31 - 0 < 0 : (a & 1) != 0) {
 18207:       M68kException.m6eNumber = M68kException.M6E_ADDRESS_ERROR;
 18208:       M68kException.m6eAddress = a & -2;  //アドレスを偶数にする
 18209:       M68kException.m6eDirection = XEiJ.MPU_WR_READ;
 18210:       M68kException.m6eSize = XEiJ.MPU_SS_LONG;
 18211:       throw M68kException.m6eSignal;
 18212:     }
 18213:     if (BranchLog.BLG_ON) {
 18214:       //BranchLog.blgJump (a);  //分岐ログに分岐レコードを追加する
 18215:       if (BranchLog.blgPrevHeadSuper != (BranchLog.blgHead | BranchLog.blgSuper) || BranchLog.blgPrevTail != XEiJ.regPC0) {  //前回のレコードと異なるとき
 18216:         int i = (char) BranchLog.blgNewestRecord++ << BranchLog.BLG_RECORD_SHIFT;
 18217:         BranchLog.blgArray[i] = BranchLog.blgPrevHeadSuper = BranchLog.blgHead | BranchLog.blgSuper;
 18218:         BranchLog.blgArray[i + 1] = BranchLog.blgPrevTail = XEiJ.regPC0;
 18219:       }
 18220:       BranchLog.blgHead = XEiJ.regPC = a;
 18221:       BranchLog.blgSuper = XEiJ.regSRS >>> 13;
 18222:     } else {
 18223:       XEiJ.regPC = a;
 18224:     }
 18225:   }  //irpSetPC
 18226: 
 18227:   //irpSetSR (newSr)
 18228:   //  srへデータを書き込む
 18229:   //  ori to sr/andi to sr/eori to sr/move to sr/stop/rteで使用される
 18230:   //  スーパーバイザモードになっていることを確認してから呼び出すこと
 18231:   //  rteではr[15]が指すアドレスからsrとpcを取り出してr[15]を更新してから呼び出すこと
 18232:   //  スーパーバイザモード→ユーザモードのときは移行のための処理を行う
 18233:   //  新しい割り込みマスクレベルよりも高い割り込み処理の終了をデバイスに通知する
 18234:   public static void irpSetSR (int newSr) {
 18235:     XEiJ.regSRT1 = XEiJ.REG_SR_T1 & newSr;
 18236:     XEiJ.regSRM = XEiJ.REG_SR_M & newSr;
 18237:     if ((XEiJ.regSRS = XEiJ.REG_SR_S & newSr) == 0) {  //スーパーバイザモード→ユーザモード
 18238:       XEiJ.mpuISP = XEiJ.regRn[15];  //SSPを保存
 18239:       XEiJ.regRn[15] = XEiJ.mpuUSP;  //USPを復元
 18240:       if (DataBreakPoint.DBP_ON) {
 18241:         DataBreakPoint.dbpMemoryMap = DataBreakPoint.dbpUserMap;  //ユーザメモリマップに切り替える
 18242:       } else {
 18243:         XEiJ.busMemoryMap = XEiJ.busUserMap;  //ユーザメモリマップに切り替える
 18244:       }
 18245:       if (InstructionBreakPoint.IBP_ON) {
 18246:         InstructionBreakPoint.ibpOp1MemoryMap = InstructionBreakPoint.ibpOp1UserMap;
 18247:       }
 18248:     }
 18249:     int t = (XEiJ.mpuIMR = 0x7f >> ((XEiJ.regSRI = XEiJ.REG_SR_I & newSr) >> 8)) & XEiJ.mpuISR;  //XEiJ.mpuISRで1→0とするビット
 18250:     if (t != 0) {  //終了する割り込みがあるとき
 18251:       XEiJ.mpuISR ^= t;
 18252:       //デバイスに割り込み処理の終了を通知する
 18253:       if (t == XEiJ.MPU_MFP_INTERRUPT_MASK) {  //MFPのみ
 18254:         MC68901.mfpDone ();
 18255:       } else if (t == XEiJ.MPU_DMA_INTERRUPT_MASK) {  //DMAのみ
 18256:         HD63450.dmaDone ();
 18257:       } else if (t == XEiJ.MPU_SCC_INTERRUPT_MASK) {  //SCCのみ
 18258:         Z8530.sccDone ();
 18259:       } else if (t == XEiJ.MPU_IOI_INTERRUPT_MASK) {  //IOIのみ
 18260:         IOInterrupt.ioiDone ();
 18261:       } else if (t == XEiJ.MPU_EB2_INTERRUPT_MASK) {  //EB2のみ
 18262:         XEiJ.eb2Done ();
 18263:       } else {  //SYSのみまたは複数
 18264:         if (XEiJ.TEST_BIT_1_SHIFT ? t << 24 + XEiJ.MPU_MFP_INTERRUPT_LEVEL < 0 : (t & XEiJ.MPU_MFP_INTERRUPT_MASK) != 0) {
 18265:           MC68901.mfpDone ();
 18266:         }
 18267:         if (t << 24 + XEiJ.MPU_DMA_INTERRUPT_LEVEL < 0) {  //(t & XEiJ.MPU_DMA_INTERRUPT_MASK) != 0
 18268:           HD63450.dmaDone ();
 18269:         }
 18270:         if (XEiJ.TEST_BIT_2_SHIFT ? t << 24 + XEiJ.MPU_SCC_INTERRUPT_LEVEL < 0 : (t & XEiJ.MPU_SCC_INTERRUPT_MASK) != 0) {
 18271:           Z8530.sccDone ();
 18272:         }
 18273:         if (t << 24 + XEiJ.MPU_IOI_INTERRUPT_LEVEL < 0) {  //(t & XEiJ.MPU_IOI_INTERRUPT_MASK) != 0
 18274:           IOInterrupt.ioiDone ();
 18275:         }
 18276:         if (t << 24 + XEiJ.MPU_EB2_INTERRUPT_LEVEL < 0) {  //(t & XEiJ.MPU_EB2_INTERRUPT_MASK) != 0
 18277:           XEiJ.eb2Done ();
 18278:         }
 18279:         if (XEiJ.TEST_BIT_0_SHIFT ? t << 24 + XEiJ.MPU_SYS_INTERRUPT_LEVEL < 0 : (t & XEiJ.MPU_SYS_INTERRUPT_MASK) != 0) {
 18280:           XEiJ.sysDone ();
 18281:         }
 18282:       }
 18283:     }
 18284:     XEiJ.mpuIMR |= ~XEiJ.mpuISR & XEiJ.MPU_SYS_INTERRUPT_MASK;  //割り込みマスクレベルが7のときレベル7割り込みの処理中でなければレベル7割り込みを許可する
 18285:     XEiJ.regCCR = XEiJ.REG_CCR_MASK & newSr;
 18286:   }  //irpSetSR
 18287: 
 18288:   //irpInterrupt (offset, level)
 18289:   //  割り込み処理を開始する
 18290:   public static void irpInterrupt (int offset, int level) throws M68kException {
 18291:     if (XEiJ.regOC == 0b0100_111_001_110_010) {  //最後に実行した命令はSTOP命令
 18292:       XEiJ.regPC = XEiJ.regPC0 + 4;  //次の命令に進む
 18293:     }
 18294:     XEiJ.mpuClockTime += XEiJ.mpuModifiedUnit * 19;
 18295:     int save_sr = XEiJ.regSRT1 | XEiJ.regSRS | XEiJ.regSRM | XEiJ.regSRI | XEiJ.regCCR;
 18296:     XEiJ.regSRI = level << 8;  //割り込みマスクを要求されたレベルに変更する
 18297:     XEiJ.mpuIMR = 0x7f >> level;
 18298:     XEiJ.mpuISR |= 0x80 >> level;
 18299:     XEiJ.regSRT1 = XEiJ.mpuTraceFlag = 0;  //srのTビットを消す
 18300:     int sp;
 18301:     if (XEiJ.regSRS != 0) {  //スーパーバイザモード
 18302:       sp = XEiJ.regRn[15];
 18303:     } else {  //ユーザモード
 18304:       XEiJ.regSRS = XEiJ.REG_SR_S;  //スーパーバイザモードへ移行する
 18305:       XEiJ.mpuUSP = XEiJ.regRn[15];  //USPを保存
 18306:       sp = XEiJ.mpuISP;  //SSPを復元
 18307:       if (DataBreakPoint.DBP_ON) {
 18308:         DataBreakPoint.dbpMemoryMap = DataBreakPoint.dbpSuperMap;  //スーパーバイザメモリマップに切り替える
 18309:       } else {
 18310:         XEiJ.busMemoryMap = XEiJ.busSuperMap;  //スーパーバイザメモリマップに切り替える
 18311:       }
 18312:       if (InstructionBreakPoint.IBP_ON) {
 18313:         InstructionBreakPoint.ibpOp1MemoryMap = InstructionBreakPoint.ibpOp1SuperMap;
 18314:       }
 18315:     }
 18316:     //以下はスーパーバイザモード
 18317:     XEiJ.regRn[15] = sp -= 8;
 18318:     mmuWriteWordData (sp + 6, offset, 1);  //7-6:フォーマットとベクタオフセット
 18319:     mmuWriteLongData (sp + 2, XEiJ.regPC, 1);  //5-2:プログラムカウンタ
 18320:     mmuWriteWordData (sp, save_sr, 1);  //1-0:ステータスレジスタ
 18321:     //if (XEiJ.regSRM != 0) {  //マスタモードのとき
 18322:     XEiJ.regSRM = 0;  //割り込みモードへ移行する
 18323:     //}
 18324:     if (BranchLog.BLG_ON) {
 18325:       XEiJ.regPC0 = XEiJ.regPC;  //rteによる割り込み終了と同時に次の割り込みを受け付けたとき間でpc0を更新しないと2番目の分岐レコードの終了アドレスが1番目と同じになっておかしな分岐レコードができてしまう
 18326:     }
 18327:     irpSetPC (mmuReadLongFour (XEiJ.mpuVBR + offset, 1));  //例外ベクタを取り出してジャンプする
 18328:   }  //irpInterrupt
 18329: 
 18330:   //irpExceptionFormat0 (offset, save_pc)
 18331:   //  例外処理を開始する
 18332:   //  スタックへのプッシュ、ベクタの取り出し、ジャンプのいずれかでバスエラーまたはアドレスエラーが発生する場合がある
 18333:   public static void irpExceptionFormat0 (int offset, int save_pc) throws M68kException {
 18334:     XEiJ.mpuCycleCount += 19;
 18335:     int save_sr = XEiJ.regSRT1 | XEiJ.regSRS | XEiJ.regSRM | XEiJ.regSRI | XEiJ.regCCR;
 18336:     XEiJ.regSRT1 = XEiJ.mpuTraceFlag = 0;  //srのTビットを消す
 18337:     int sp;
 18338:     if (XEiJ.regSRS != 0) {  //スーパーバイザモード
 18339:       sp = XEiJ.regRn[15];
 18340:     } else {  //ユーザモード
 18341:       XEiJ.regSRS = XEiJ.REG_SR_S;  //スーパーバイザモードへ移行する
 18342:       XEiJ.mpuUSP = XEiJ.regRn[15];  //USPを保存
 18343:       sp = XEiJ.mpuISP;  //SSPを復元
 18344:       if (DataBreakPoint.DBP_ON) {
 18345:         DataBreakPoint.dbpMemoryMap = DataBreakPoint.dbpSuperMap;  //スーパーバイザメモリマップに切り替える
 18346:       } else {
 18347:         XEiJ.busMemoryMap = XEiJ.busSuperMap;  //スーパーバイザメモリマップに切り替える
 18348:       }
 18349:       if (InstructionBreakPoint.IBP_ON) {
 18350:         InstructionBreakPoint.ibpOp1MemoryMap = InstructionBreakPoint.ibpOp1SuperMap;
 18351:       }
 18352:     }
 18353:     //以下はスーパーバイザモード
 18354:     XEiJ.regRn[15] = sp -= 8;
 18355:     mmuWriteWordData (sp + 6, offset, 1);  //7-6:フォーマットとベクタオフセット
 18356:     mmuWriteLongData (sp + 2, save_pc, 1);  //5-2:プログラムカウンタ
 18357:     mmuWriteWordData (sp, save_sr, 1);  //1-0:ステータスレジスタ
 18358:     irpSetPC (mmuReadLongFour (XEiJ.mpuVBR + offset, 1));  //例外ベクタを取り出してジャンプする
 18359:   }  //irpExceptionFormat0
 18360: 
 18361:   //irpExceptionFormat2 (offset, save_pc, address)
 18362:   //  例外処理を開始する
 18363:   //  スタックへのプッシュ、ベクタの取り出し、ジャンプのいずれかでバスエラーまたはアドレスエラーが発生する場合がある
 18364:   public static void irpExceptionFormat2 (int offset, int save_pc, int address) throws M68kException {
 18365:     XEiJ.mpuCycleCount += 19;
 18366:     int save_sr = XEiJ.regSRT1 | XEiJ.regSRS | XEiJ.regSRM | XEiJ.regSRI | XEiJ.regCCR;
 18367:     XEiJ.regSRT1 = XEiJ.mpuTraceFlag = 0;  //srのTビットを消す
 18368:     int sp;
 18369:     if (XEiJ.regSRS != 0) {  //スーパーバイザモード
 18370:       sp = XEiJ.regRn[15];
 18371:     } else {  //ユーザモード
 18372:       XEiJ.regSRS = XEiJ.REG_SR_S;  //スーパーバイザモードへ移行する
 18373:       XEiJ.mpuUSP = XEiJ.regRn[15];  //USPを保存
 18374:       sp = XEiJ.mpuISP;  //SSPを復元
 18375:       if (DataBreakPoint.DBP_ON) {
 18376:         DataBreakPoint.dbpMemoryMap = DataBreakPoint.dbpSuperMap;  //スーパーバイザメモリマップに切り替える
 18377:       } else {
 18378:         XEiJ.busMemoryMap = XEiJ.busSuperMap;  //スーパーバイザメモリマップに切り替える
 18379:       }
 18380:       if (InstructionBreakPoint.IBP_ON) {
 18381:         InstructionBreakPoint.ibpOp1MemoryMap = InstructionBreakPoint.ibpOp1SuperMap;
 18382:       }
 18383:     }
 18384:     //以下はスーパーバイザモード
 18385:     XEiJ.regRn[15] = sp -= 12;
 18386:     mmuWriteLongData (sp + 8, address, 1);  //11-8:アドレス
 18387:     mmuWriteWordData (sp + 6, 0x2000 | offset, 1);  //7-6:フォーマットとベクタオフセット
 18388:     mmuWriteLongData (sp + 2, save_pc, 1);  //5-2:プログラムカウンタ
 18389:     mmuWriteWordData (sp, save_sr, 1);  //1-0:ステータスレジスタ
 18390:     irpSetPC (mmuReadLongFour (XEiJ.mpuVBR + offset, 1));  //例外ベクタを取り出してジャンプする
 18391:   }  //irpExceptionFormat2
 18392: 
 18393:   //irpExceptionFormat3 (offset, save_pc, address)
 18394:   //  例外処理を開始する
 18395:   //  スタックへのプッシュ、ベクタの取り出し、ジャンプのいずれかでバスエラーまたはアドレスエラーが発生する場合がある
 18396:   public static void irpExceptionFormat3 (int offset, int save_pc, int address) throws M68kException {
 18397:     XEiJ.mpuCycleCount += 19;
 18398:     int save_sr = XEiJ.regSRT1 | XEiJ.regSRS | XEiJ.regSRM | XEiJ.regSRI | XEiJ.regCCR;
 18399:     XEiJ.regSRT1 = XEiJ.mpuTraceFlag = 0;  //srのTビットを消す
 18400:     int sp;
 18401:     if (XEiJ.regSRS != 0) {  //スーパーバイザモード
 18402:       sp = XEiJ.regRn[15];
 18403:     } else {  //ユーザモード
 18404:       XEiJ.regSRS = XEiJ.REG_SR_S;  //スーパーバイザモードへ移行する
 18405:       XEiJ.mpuUSP = XEiJ.regRn[15];  //USPを保存
 18406:       sp = XEiJ.mpuISP;  //SSPを復元
 18407:       if (DataBreakPoint.DBP_ON) {
 18408:         DataBreakPoint.dbpMemoryMap = DataBreakPoint.dbpSuperMap;  //スーパーバイザメモリマップに切り替える
 18409:       } else {
 18410:         XEiJ.busMemoryMap = XEiJ.busSuperMap;  //スーパーバイザメモリマップに切り替える
 18411:       }
 18412:       if (InstructionBreakPoint.IBP_ON) {
 18413:         InstructionBreakPoint.ibpOp1MemoryMap = InstructionBreakPoint.ibpOp1SuperMap;
 18414:       }
 18415:     }
 18416:     //以下はスーパーバイザモード
 18417:     XEiJ.regRn[15] = sp -= 12;
 18418:     mmuWriteLongData (sp + 8, address, 1);  //11-8:実効アドレス
 18419:     mmuWriteWordData (sp + 6, 0x3000 | offset, 1);  //7-6:フォーマットとベクタオフセット
 18420:     mmuWriteLongData (sp + 2, save_pc, 1);  //5-2:プログラムカウンタ
 18421:     mmuWriteWordData (sp, save_sr, 1);  //1-0:ステータスレジスタ
 18422:     irpSetPC (mmuReadLongFour (XEiJ.mpuVBR + offset, 1));  //例外ベクタを取り出してジャンプする
 18423:   }  //irpExceptionFormat3
 18424: 
 18425: 
 18426: 
 18427:   //a = efaAnyByte (ea)  //|  M+-WXZPI|
 18428:   //  任意のモードのバイトオペランドの実効アドレスを求める
 18429:   //  (A7)+と-(A7)はA7を奇偶に関わらず2変化させ、跨いだワードの上位バイト(アドレスの小さい方)を参照する
 18430:   //  #<data>はオペコードに続くワードの下位バイトを参照する。上位バイトは不定なので参照してはならない
 18431:   @SuppressWarnings ("fallthrough") public static int efaAnyByte (int ea) throws M68kException {
 18432:     int t, w, x;
 18433:     switch (ea) {
 18434:     case 0b010_000:  //(A0)
 18435:       if (XEiJ.EFA_SEPARATE_AR) {
 18436:         return XEiJ.regRn[ 8];
 18437:       }
 18438:       //fallthrough
 18439:     case 0b010_001:  //(A1)
 18440:       if (XEiJ.EFA_SEPARATE_AR) {
 18441:         return XEiJ.regRn[ 9];
 18442:       }
 18443:       //fallthrough
 18444:     case 0b010_010:  //(A2)
 18445:       if (XEiJ.EFA_SEPARATE_AR) {
 18446:         return XEiJ.regRn[10];
 18447:       }
 18448:       //fallthrough
 18449:     case 0b010_011:  //(A3)
 18450:       if (XEiJ.EFA_SEPARATE_AR) {
 18451:         return XEiJ.regRn[11];
 18452:       }
 18453:       //fallthrough
 18454:     case 0b010_100:  //(A4)
 18455:       if (XEiJ.EFA_SEPARATE_AR) {
 18456:         return XEiJ.regRn[12];
 18457:       }
 18458:       //fallthrough
 18459:     case 0b010_101:  //(A5)
 18460:       if (XEiJ.EFA_SEPARATE_AR) {
 18461:         return XEiJ.regRn[13];
 18462:       }
 18463:       //fallthrough
 18464:     case 0b010_110:  //(A6)
 18465:       if (XEiJ.EFA_SEPARATE_AR) {
 18466:         return XEiJ.regRn[14];
 18467:       }
 18468:       //fallthrough
 18469:     case 0b010_111:  //(A7)
 18470:       if (XEiJ.EFA_SEPARATE_AR) {
 18471:         return XEiJ.regRn[15];
 18472:       } else {
 18473:         return XEiJ.regRn[ea - (0b010_000 - 8)];
 18474:       }
 18475:     case 0b011_000:  //(A0)+
 18476:       if (XEiJ.EFA_SEPARATE_AR) {
 18477:         M68kException.m6eIncremented += 1L << (0 << 3);
 18478:         return XEiJ.regRn[ 8]++;
 18479:       }
 18480:       //fallthrough
 18481:     case 0b011_001:  //(A1)+
 18482:       if (XEiJ.EFA_SEPARATE_AR) {
 18483:         M68kException.m6eIncremented += 1L << (1 << 3);
 18484:         return XEiJ.regRn[ 9]++;
 18485:       }
 18486:       //fallthrough
 18487:     case 0b011_010:  //(A2)+
 18488:       if (XEiJ.EFA_SEPARATE_AR) {
 18489:         M68kException.m6eIncremented += 1L << (2 << 3);
 18490:         return XEiJ.regRn[10]++;
 18491:       }
 18492:       //fallthrough
 18493:     case 0b011_011:  //(A3)+
 18494:       if (XEiJ.EFA_SEPARATE_AR) {
 18495:         M68kException.m6eIncremented += 1L << (3 << 3);
 18496:         return XEiJ.regRn[11]++;
 18497:       }
 18498:       //fallthrough
 18499:     case 0b011_100:  //(A4)+
 18500:       if (XEiJ.EFA_SEPARATE_AR) {
 18501:         M68kException.m6eIncremented += 1L << (4 << 3);
 18502:         return XEiJ.regRn[12]++;
 18503:       }
 18504:       //fallthrough
 18505:     case 0b011_101:  //(A5)+
 18506:       if (XEiJ.EFA_SEPARATE_AR) {
 18507:         M68kException.m6eIncremented += 1L << (5 << 3);
 18508:         return XEiJ.regRn[13]++;
 18509:       }
 18510:       //fallthrough
 18511:     case 0b011_110:  //(A6)+
 18512:       if (XEiJ.EFA_SEPARATE_AR) {
 18513:         M68kException.m6eIncremented += 1L << (6 << 3);
 18514:         return XEiJ.regRn[14]++;
 18515:       } else {
 18516:         M68kException.m6eIncremented += 1L << ((ea & 7) << 3);
 18517:         return XEiJ.regRn[ea - (0b011_000 - 8)]++;
 18518:       }
 18519:     case 0b011_111:  //(A7)+
 18520:       M68kException.m6eIncremented += 2L << (7 << 3);
 18521:       return (XEiJ.regRn[15] += 2) - 2;
 18522:     case 0b100_000:  //-(A0)
 18523:       if (XEiJ.EFA_SEPARATE_AR) {
 18524:         M68kException.m6eIncremented -= 1L << (0 << 3);
 18525:         return --XEiJ.regRn[ 8];
 18526:       }
 18527:       //fallthrough
 18528:     case 0b100_001:  //-(A1)
 18529:       if (XEiJ.EFA_SEPARATE_AR) {
 18530:         M68kException.m6eIncremented -= 1L << (1 << 3);
 18531:         return --XEiJ.regRn[ 9];
 18532:       }
 18533:       //fallthrough
 18534:     case 0b100_010:  //-(A2)
 18535:       if (XEiJ.EFA_SEPARATE_AR) {
 18536:         M68kException.m6eIncremented -= 1L << (2 << 3);
 18537:         return --XEiJ.regRn[10];
 18538:       }
 18539:       //fallthrough
 18540:     case 0b100_011:  //-(A3)
 18541:       if (XEiJ.EFA_SEPARATE_AR) {
 18542:         M68kException.m6eIncremented -= 1L << (3 << 3);
 18543:         return --XEiJ.regRn[11];
 18544:       }
 18545:       //fallthrough
 18546:     case 0b100_100:  //-(A4)
 18547:       if (XEiJ.EFA_SEPARATE_AR) {
 18548:         M68kException.m6eIncremented -= 1L << (4 << 3);
 18549:         return --XEiJ.regRn[12];
 18550:       }
 18551:       //fallthrough
 18552:     case 0b100_101:  //-(A5)
 18553:       if (XEiJ.EFA_SEPARATE_AR) {
 18554:         M68kException.m6eIncremented -= 1L << (5 << 3);
 18555:         return --XEiJ.regRn[13];
 18556:       }
 18557:       //fallthrough
 18558:     case 0b100_110:  //-(A6)
 18559:       if (XEiJ.EFA_SEPARATE_AR) {
 18560:         M68kException.m6eIncremented -= 1L << (6 << 3);
 18561:         return --XEiJ.regRn[14];
 18562:       } else {
 18563:         M68kException.m6eIncremented -= 1L << ((ea & 7) << 3);
 18564:         return --XEiJ.regRn[ea - (0b100_000 - 8)];
 18565:       }
 18566:     case 0b100_111:  //-(A7)
 18567:       M68kException.m6eIncremented -= 2L << (7 << 3);
 18568:       return XEiJ.regRn[15] -= 2;
 18569:     case 0b101_000:  //(d16,A0)
 18570:     case 0b101_001:  //(d16,A1)
 18571:     case 0b101_010:  //(d16,A2)
 18572:     case 0b101_011:  //(d16,A3)
 18573:     case 0b101_100:  //(d16,A4)
 18574:     case 0b101_101:  //(d16,A5)
 18575:     case 0b101_110:  //(d16,A6)
 18576:     case 0b101_111:  //(d16,A7)
 18577:       if (XEiJ.MPU_COMPOUND_POSTINCREMENT) {
 18578:         return (XEiJ.regRn[ea - (0b101_000 - 8)]  //ベースレジスタ
 18579:                 + mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS));  //pcws。ワードディスプレースメント
 18580:       } else {
 18581:         t = XEiJ.regPC;
 18582:         XEiJ.regPC = t + 2;
 18583:         return (XEiJ.regRn[ea - (0b101_000 - 8)]  //ベースレジスタ
 18584:                 + mmuReadWordSignExword (t, XEiJ.regSRS));  //pcws。ワードディスプレースメント
 18585:       }
 18586:     case 0b110_000:  //(d8,A0,Rn.wl)
 18587:     case 0b110_001:  //(d8,A1,Rn.wl)
 18588:     case 0b110_010:  //(d8,A2,Rn.wl)
 18589:     case 0b110_011:  //(d8,A3,Rn.wl)
 18590:     case 0b110_100:  //(d8,A4,Rn.wl)
 18591:     case 0b110_101:  //(d8,A5,Rn.wl)
 18592:     case 0b110_110:  //(d8,A6,Rn.wl)
 18593:     case 0b110_111:  //(d8,A7,Rn.wl)
 18594:       if (XEiJ.MPU_COMPOUND_POSTINCREMENT) {
 18595:         w = mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);  //pcwz。拡張ワード
 18596:       } else {
 18597:         w = XEiJ.regPC;
 18598:         XEiJ.regPC = w + 2;
 18599:         w = mmuReadWordZeroExword (w, XEiJ.regSRS);  //pcwz。拡張ワード
 18600:       }
 18601:       if (w << 31 - 8 < 0) {  //フルフォーマット
 18602:         XEiJ.mpuCycleCount += w << -2 == 0 ? 1 : 3;  //メモリ間接なし:メモリ間接あり
 18603:       }
 18604:       t = (((~w & 0x0180) == 0 ? 0 :  //ベースレジスタサプレス
 18605:             XEiJ.regRn[ea - (0b110_000 - 8)])  //ベースレジスタ
 18606:            + (w << 31 - 8 >= 0 ? (byte) w :  //バイトディスプレースメント
 18607:               w << 31 - 5 >= 0 ? 0 :  //ヌルベースディスプレースメント
 18608:               w << 31 - 4 >= 0 ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) :  //pcws。ワードベースディスプレースメント
 18609:               mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS)));  //pcls。ロングベースディスプレースメント
 18610:       x = ((~w & 0x0140) == 0 ? 0 :  //インデックスサプレス
 18611:            (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] :  //ワードインデックス
 18612:             XEiJ.regRn[w >> 12])  //ロングインデックス
 18613:            << (w >> 9 & 3));  //スケールファクタ。ワードインデックスのときは符号拡張してから掛ける
 18614:       return ((w & 0x0103) <= 0x0100 ? t + x :  //メモリ間接なし
 18615:               ((XEiJ.TEST_BIT_2_SHIFT ? w << 31 - 2 >= 0 : (w & 4) == 0) ? mmuReadLongData (t + x, XEiJ.regSRS) :  //プリインデックス
 18616:                mmuReadLongData (t, XEiJ.regSRS) + x)  //ポストインデックス
 18617:               + ((XEiJ.TEST_BIT_1_SHIFT ? w << 31 - 1 >= 0 : (w & 2) == 0) ? 0 :  //ヌルアウタディスプレースメント
 18618:                  (XEiJ.TEST_BIT_0_SHIFT ? w << 31 - 0 >= 0 : (w & 1) == 0) ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) :  //pcws。ワードアウタディスプレースメント
 18619:                  mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS)));  //pcls。ロングアウタディスプレースメント
 18620:     case 0b111_000:  //(xxx).W
 18621:       return mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);  //pcws
 18622:     case 0b111_001:  //(xxx).L
 18623:       return mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS);  //pcls
 18624:     case 0b111_010:  //(d16,PC)
 18625:       t = XEiJ.regPC;
 18626:       XEiJ.regPC = t + 2;
 18627:       return (t  //ベースレジスタ
 18628:               + mmuReadWordSignExword (t, XEiJ.regSRS));  //pcws。ワードディスプレースメント
 18629:     case 0b111_011:  //(d8,PC,Rn.wl)
 18630:       t = XEiJ.regPC;
 18631:       XEiJ.regPC = t + 2;
 18632:       w = mmuReadWordZeroExword (t, XEiJ.regSRS);  //pcwz。拡張ワード
 18633:       if (w << 31 - 8 < 0) {  //フルフォーマット
 18634:         XEiJ.mpuCycleCount += w << -2 == 0 ? 1 : 3;  //メモリ間接なし:メモリ間接あり
 18635:       }
 18636:       t = (((~w & 0x0180) == 0 ? 0 :  //ベースレジスタサプレス
 18637:             t)  //ベースレジスタ
 18638:            + (w << 31 - 8 >= 0 ? (byte) w :  //バイトディスプレースメント
 18639:               w << 31 - 5 >= 0 ? 0 :  //ヌルベースディスプレースメント
 18640:               w << 31 - 4 >= 0 ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) :  //pcws。ワードベースディスプレースメント
 18641:               mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS)));  //pcls。ロングベースディスプレースメント
 18642:       x = ((~w & 0x0140) == 0 ? 0 :  //インデックスサプレス
 18643:            (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] :  //ワードインデックス
 18644:             XEiJ.regRn[w >> 12])  //ロングインデックス
 18645:            << (w >> 9 & 3));  //スケールファクタ。ワードインデックスのときは符号拡張してから掛ける
 18646:       return ((w & 0x0103) <= 0x0100 ? t + x :  //メモリ間接なし
 18647:               ((XEiJ.TEST_BIT_2_SHIFT ? w << 31 - 2 >= 0 : (w & 4) == 0) ? mmuReadLongData (t + x, XEiJ.regSRS) :  //プリインデックス
 18648:                mmuReadLongData (t, XEiJ.regSRS) + x)  //ポストインデックス
 18649:               + ((XEiJ.TEST_BIT_1_SHIFT ? w << 31 - 1 >= 0 : (w & 2) == 0) ? 0 :  //ヌルアウタディスプレースメント
 18650:                  (XEiJ.TEST_BIT_0_SHIFT ? w << 31 - 0 >= 0 : (w & 1) == 0) ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) :  //pcws。ワードアウタディスプレースメント
 18651:                  mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS)));  //pcls。ロングアウタディスプレースメント
 18652:     case 0b111_100:  //#<data>
 18653:       if (XEiJ.MPU_COMPOUND_POSTINCREMENT) {
 18654:         return (XEiJ.regPC += 2) - 1;  //下位バイト
 18655:       } else {
 18656:         t = XEiJ.regPC;
 18657:         XEiJ.regPC = t + 2;
 18658:         return t + 1;  //下位バイト
 18659:       }
 18660:     }  //switch
 18661:     M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION;
 18662:     throw M68kException.m6eSignal;
 18663:   }  //efaAnyByte
 18664: 
 18665:   //a = efaMemByte (ea)  //|  M+-WXZP |
 18666:   //  メモリモードのバイトオペランドの実効アドレスを求める
 18667:   //  efaAnyByteとの違いは#<data>がないこと
 18668:   @SuppressWarnings ("fallthrough") public static int efaMemByte (int ea) throws M68kException {
 18669:     int t, w, x;
 18670:     switch (ea) {
 18671:     case 0b010_000:  //(A0)
 18672:       if (XEiJ.EFA_SEPARATE_AR) {
 18673:         return XEiJ.regRn[ 8];
 18674:       }
 18675:       //fallthrough
 18676:     case 0b010_001:  //(A1)
 18677:       if (XEiJ.EFA_SEPARATE_AR) {
 18678:         return XEiJ.regRn[ 9];
 18679:       }
 18680:       //fallthrough
 18681:     case 0b010_010:  //(A2)
 18682:       if (XEiJ.EFA_SEPARATE_AR) {
 18683:         return XEiJ.regRn[10];
 18684:       }
 18685:       //fallthrough
 18686:     case 0b010_011:  //(A3)
 18687:       if (XEiJ.EFA_SEPARATE_AR) {
 18688:         return XEiJ.regRn[11];
 18689:       }
 18690:       //fallthrough
 18691:     case 0b010_100:  //(A4)
 18692:       if (XEiJ.EFA_SEPARATE_AR) {
 18693:         return XEiJ.regRn[12];
 18694:       }
 18695:       //fallthrough
 18696:     case 0b010_101:  //(A5)
 18697:       if (XEiJ.EFA_SEPARATE_AR) {
 18698:         return XEiJ.regRn[13];
 18699:       }
 18700:       //fallthrough
 18701:     case 0b010_110:  //(A6)
 18702:       if (XEiJ.EFA_SEPARATE_AR) {
 18703:         return XEiJ.regRn[14];
 18704:       }
 18705:       //fallthrough
 18706:     case 0b010_111:  //(A7)
 18707:       if (XEiJ.EFA_SEPARATE_AR) {
 18708:         return XEiJ.regRn[15];
 18709:       } else {
 18710:         return XEiJ.regRn[ea - (0b010_000 - 8)];
 18711:       }
 18712:     case 0b011_000:  //(A0)+
 18713:       if (XEiJ.EFA_SEPARATE_AR) {
 18714:         M68kException.m6eIncremented += 1L << (0 << 3);
 18715:         return XEiJ.regRn[ 8]++;
 18716:       }
 18717:       //fallthrough
 18718:     case 0b011_001:  //(A1)+
 18719:       if (XEiJ.EFA_SEPARATE_AR) {
 18720:         M68kException.m6eIncremented += 1L << (1 << 3);
 18721:         return XEiJ.regRn[ 9]++;
 18722:       }
 18723:       //fallthrough
 18724:     case 0b011_010:  //(A2)+
 18725:       if (XEiJ.EFA_SEPARATE_AR) {
 18726:         M68kException.m6eIncremented += 1L << (2 << 3);
 18727:         return XEiJ.regRn[10]++;
 18728:       }
 18729:       //fallthrough
 18730:     case 0b011_011:  //(A3)+
 18731:       if (XEiJ.EFA_SEPARATE_AR) {
 18732:         M68kException.m6eIncremented += 1L << (3 << 3);
 18733:         return XEiJ.regRn[11]++;
 18734:       }
 18735:       //fallthrough
 18736:     case 0b011_100:  //(A4)+
 18737:       if (XEiJ.EFA_SEPARATE_AR) {
 18738:         M68kException.m6eIncremented += 1L << (4 << 3);
 18739:         return XEiJ.regRn[12]++;
 18740:       }
 18741:       //fallthrough
 18742:     case 0b011_101:  //(A5)+
 18743:       if (XEiJ.EFA_SEPARATE_AR) {
 18744:         M68kException.m6eIncremented += 1L << (5 << 3);
 18745:         return XEiJ.regRn[13]++;
 18746:       }
 18747:       //fallthrough
 18748:     case 0b011_110:  //(A6)+
 18749:       if (XEiJ.EFA_SEPARATE_AR) {
 18750:         M68kException.m6eIncremented += 1L << (6 << 3);
 18751:         return XEiJ.regRn[14]++;
 18752:       } else {
 18753:         M68kException.m6eIncremented += 1L << ((ea & 7) << 3);
 18754:         return XEiJ.regRn[ea - (0b011_000 - 8)]++;
 18755:       }
 18756:     case 0b011_111:  //(A7)+
 18757:       M68kException.m6eIncremented += 2L << (7 << 3);
 18758:       return (XEiJ.regRn[15] += 2) - 2;
 18759:     case 0b100_000:  //-(A0)
 18760:       if (XEiJ.EFA_SEPARATE_AR) {
 18761:         M68kException.m6eIncremented -= 1L << (0 << 3);
 18762:         return --XEiJ.regRn[ 8];
 18763:       }
 18764:       //fallthrough
 18765:     case 0b100_001:  //-(A1)
 18766:       if (XEiJ.EFA_SEPARATE_AR) {
 18767:         M68kException.m6eIncremented -= 1L << (1 << 3);
 18768:         return --XEiJ.regRn[ 9];
 18769:       }
 18770:       //fallthrough
 18771:     case 0b100_010:  //-(A2)
 18772:       if (XEiJ.EFA_SEPARATE_AR) {
 18773:         M68kException.m6eIncremented -= 1L << (2 << 3);
 18774:         return --XEiJ.regRn[10];
 18775:       }
 18776:       //fallthrough
 18777:     case 0b100_011:  //-(A3)
 18778:       if (XEiJ.EFA_SEPARATE_AR) {
 18779:         M68kException.m6eIncremented -= 1L << (3 << 3);
 18780:         return --XEiJ.regRn[11];
 18781:       }
 18782:       //fallthrough
 18783:     case 0b100_100:  //-(A4)
 18784:       if (XEiJ.EFA_SEPARATE_AR) {
 18785:         M68kException.m6eIncremented -= 1L << (4 << 3);
 18786:         return --XEiJ.regRn[12];
 18787:       }
 18788:       //fallthrough
 18789:     case 0b100_101:  //-(A5)
 18790:       if (XEiJ.EFA_SEPARATE_AR) {
 18791:         M68kException.m6eIncremented -= 1L << (5 << 3);
 18792:         return --XEiJ.regRn[13];
 18793:       }
 18794:       //fallthrough
 18795:     case 0b100_110:  //-(A6)
 18796:       if (XEiJ.EFA_SEPARATE_AR) {
 18797:         M68kException.m6eIncremented -= 1L << (6 << 3);
 18798:         return --XEiJ.regRn[14];
 18799:       } else {
 18800:         M68kException.m6eIncremented -= 1L << ((ea & 7) << 3);
 18801:         return --XEiJ.regRn[ea - (0b100_000 - 8)];
 18802:       }
 18803:     case 0b100_111:  //-(A7)
 18804:       M68kException.m6eIncremented -= 2L << (7 << 3);
 18805:       return XEiJ.regRn[15] -= 2;
 18806:     case 0b101_000:  //(d16,A0)
 18807:     case 0b101_001:  //(d16,A1)
 18808:     case 0b101_010:  //(d16,A2)
 18809:     case 0b101_011:  //(d16,A3)
 18810:     case 0b101_100:  //(d16,A4)
 18811:     case 0b101_101:  //(d16,A5)
 18812:     case 0b101_110:  //(d16,A6)
 18813:     case 0b101_111:  //(d16,A7)
 18814:       if (XEiJ.MPU_COMPOUND_POSTINCREMENT) {
 18815:         return (XEiJ.regRn[ea - (0b101_000 - 8)]  //ベースレジスタ
 18816:                 + mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS));  //pcws。ワードディスプレースメント
 18817:       } else {
 18818:         t = XEiJ.regPC;
 18819:         XEiJ.regPC = t + 2;
 18820:         return (XEiJ.regRn[ea - (0b101_000 - 8)]  //ベースレジスタ
 18821:                 + mmuReadWordSignExword (t, XEiJ.regSRS));  //pcws。ワードディスプレースメント
 18822:       }
 18823:     case 0b110_000:  //(d8,A0,Rn.wl)
 18824:     case 0b110_001:  //(d8,A1,Rn.wl)
 18825:     case 0b110_010:  //(d8,A2,Rn.wl)
 18826:     case 0b110_011:  //(d8,A3,Rn.wl)
 18827:     case 0b110_100:  //(d8,A4,Rn.wl)
 18828:     case 0b110_101:  //(d8,A5,Rn.wl)
 18829:     case 0b110_110:  //(d8,A6,Rn.wl)
 18830:     case 0b110_111:  //(d8,A7,Rn.wl)
 18831:       if (XEiJ.MPU_COMPOUND_POSTINCREMENT) {
 18832:         w = mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);  //pcwz。拡張ワード
 18833:       } else {
 18834:         w = XEiJ.regPC;
 18835:         XEiJ.regPC = w + 2;
 18836:         w = mmuReadWordZeroExword (w, XEiJ.regSRS);  //pcwz。拡張ワード
 18837:       }
 18838:       if (w << 31 - 8 < 0) {  //フルフォーマット
 18839:         XEiJ.mpuCycleCount += w << -2 == 0 ? 1 : 3;  //メモリ間接なし:メモリ間接あり
 18840:       }
 18841:       t = (((~w & 0x0180) == 0 ? 0 :  //ベースレジスタサプレス
 18842:             XEiJ.regRn[ea - (0b110_000 - 8)])  //ベースレジスタ
 18843:            + (w << 31 - 8 >= 0 ? (byte) w :  //バイトディスプレースメント
 18844:               w << 31 - 5 >= 0 ? 0 :  //ヌルベースディスプレースメント
 18845:               w << 31 - 4 >= 0 ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) :  //pcws。ワードベースディスプレースメント
 18846:               mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS)));  //pcls。ロングベースディスプレースメント
 18847:       x = ((~w & 0x0140) == 0 ? 0 :  //インデックスサプレス
 18848:            (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] :  //ワードインデックス
 18849:             XEiJ.regRn[w >> 12])  //ロングインデックス
 18850:            << (w >> 9 & 3));  //スケールファクタ。ワードインデックスのときは符号拡張してから掛ける
 18851:       return ((w & 0x0103) <= 0x0100 ? t + x :  //メモリ間接なし
 18852:               ((XEiJ.TEST_BIT_2_SHIFT ? w << 31 - 2 >= 0 : (w & 4) == 0) ? mmuReadLongData (t + x, XEiJ.regSRS) :  //プリインデックス
 18853:                mmuReadLongData (t, XEiJ.regSRS) + x)  //ポストインデックス
 18854:               + ((XEiJ.TEST_BIT_1_SHIFT ? w << 31 - 1 >= 0 : (w & 2) == 0) ? 0 :  //ヌルアウタディスプレースメント
 18855:                  (XEiJ.TEST_BIT_0_SHIFT ? w << 31 - 0 >= 0 : (w & 1) == 0) ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) :  //pcws。ワードアウタディスプレースメント
 18856:                  mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS)));  //pcls。ロングアウタディスプレースメント
 18857:     case 0b111_000:  //(xxx).W
 18858:       return mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);  //pcws
 18859:     case 0b111_001:  //(xxx).L
 18860:       return mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS);  //pcls
 18861:     case 0b111_010:  //(d16,PC)
 18862:       t = XEiJ.regPC;
 18863:       XEiJ.regPC = t + 2;
 18864:       return (t  //ベースレジスタ
 18865:               + mmuReadWordSignExword (t, XEiJ.regSRS));  //pcws。ワードディスプレースメント
 18866:     case 0b111_011:  //(d8,PC,Rn.wl)
 18867:       t = XEiJ.regPC;
 18868:       XEiJ.regPC = t + 2;
 18869:       w = mmuReadWordZeroExword (t, XEiJ.regSRS);  //pcwz。拡張ワード
 18870:       if (w << 31 - 8 < 0) {  //フルフォーマット
 18871:         XEiJ.mpuCycleCount += w << -2 == 0 ? 1 : 3;  //メモリ間接なし:メモリ間接あり
 18872:       }
 18873:       t = (((~w & 0x0180) == 0 ? 0 :  //ベースレジスタサプレス
 18874:             t)  //ベースレジスタ
 18875:            + (w << 31 - 8 >= 0 ? (byte) w :  //バイトディスプレースメント
 18876:               w << 31 - 5 >= 0 ? 0 :  //ヌルベースディスプレースメント
 18877:               w << 31 - 4 >= 0 ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) :  //pcws。ワードベースディスプレースメント
 18878:               mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS)));  //pcls。ロングベースディスプレースメント
 18879:       x = ((~w & 0x0140) == 0 ? 0 :  //インデックスサプレス
 18880:            (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] :  //ワードインデックス
 18881:             XEiJ.regRn[w >> 12])  //ロングインデックス
 18882:            << (w >> 9 & 3));  //スケールファクタ。ワードインデックスのときは符号拡張してから掛ける
 18883:       return ((w & 0x0103) <= 0x0100 ? t + x :  //メモリ間接なし
 18884:               ((XEiJ.TEST_BIT_2_SHIFT ? w << 31 - 2 >= 0 : (w & 4) == 0) ? mmuReadLongData (t + x, XEiJ.regSRS) :  //プリインデックス
 18885:                mmuReadLongData (t, XEiJ.regSRS) + x)  //ポストインデックス
 18886:               + ((XEiJ.TEST_BIT_1_SHIFT ? w << 31 - 1 >= 0 : (w & 2) == 0) ? 0 :  //ヌルアウタディスプレースメント
 18887:                  (XEiJ.TEST_BIT_0_SHIFT ? w << 31 - 0 >= 0 : (w & 1) == 0) ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) :  //pcws。ワードアウタディスプレースメント
 18888:                  mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS)));  //pcls。ロングアウタディスプレースメント
 18889:     }  //switch
 18890:     M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION;
 18891:     throw M68kException.m6eSignal;
 18892:   }  //efaMemByte
 18893: 
 18894:   //a = efaMltByte (ea)  //|  M+-WXZ  |
 18895:   //  メモリ可変モードのバイトオペランドの実効アドレスを求める
 18896:   //  efaMemByteとの違いは(d16,PC)と(d8,PC,Rn.wl)がないこと
 18897:   @SuppressWarnings ("fallthrough") public static int efaMltByte (int ea) throws M68kException {
 18898:     int t, w, x;
 18899:     switch (ea) {
 18900:     case 0b010_000:  //(A0)
 18901:       if (XEiJ.EFA_SEPARATE_AR) {
 18902:         return XEiJ.regRn[ 8];
 18903:       }
 18904:       //fallthrough
 18905:     case 0b010_001:  //(A1)
 18906:       if (XEiJ.EFA_SEPARATE_AR) {
 18907:         return XEiJ.regRn[ 9];
 18908:       }
 18909:       //fallthrough
 18910:     case 0b010_010:  //(A2)
 18911:       if (XEiJ.EFA_SEPARATE_AR) {
 18912:         return XEiJ.regRn[10];
 18913:       }
 18914:       //fallthrough
 18915:     case 0b010_011:  //(A3)
 18916:       if (XEiJ.EFA_SEPARATE_AR) {
 18917:         return XEiJ.regRn[11];
 18918:       }
 18919:       //fallthrough
 18920:     case 0b010_100:  //(A4)
 18921:       if (XEiJ.EFA_SEPARATE_AR) {
 18922:         return XEiJ.regRn[12];
 18923:       }
 18924:       //fallthrough
 18925:     case 0b010_101:  //(A5)
 18926:       if (XEiJ.EFA_SEPARATE_AR) {
 18927:         return XEiJ.regRn[13];
 18928:       }
 18929:       //fallthrough
 18930:     case 0b010_110:  //(A6)
 18931:       if (XEiJ.EFA_SEPARATE_AR) {
 18932:         return XEiJ.regRn[14];
 18933:       }
 18934:       //fallthrough
 18935:     case 0b010_111:  //(A7)
 18936:       if (XEiJ.EFA_SEPARATE_AR) {
 18937:         return XEiJ.regRn[15];
 18938:       } else {
 18939:         return XEiJ.regRn[ea - (0b010_000 - 8)];
 18940:       }
 18941:     case 0b011_000:  //(A0)+
 18942:       if (XEiJ.EFA_SEPARATE_AR) {
 18943:         M68kException.m6eIncremented += 1L << (0 << 3);
 18944:         return XEiJ.regRn[ 8]++;
 18945:       }
 18946:       //fallthrough
 18947:     case 0b011_001:  //(A1)+
 18948:       if (XEiJ.EFA_SEPARATE_AR) {
 18949:         M68kException.m6eIncremented += 1L << (1 << 3);
 18950:         return XEiJ.regRn[ 9]++;
 18951:       }
 18952:       //fallthrough
 18953:     case 0b011_010:  //(A2)+
 18954:       if (XEiJ.EFA_SEPARATE_AR) {
 18955:         M68kException.m6eIncremented += 1L << (2 << 3);
 18956:         return XEiJ.regRn[10]++;
 18957:       }
 18958:       //fallthrough
 18959:     case 0b011_011:  //(A3)+
 18960:       if (XEiJ.EFA_SEPARATE_AR) {
 18961:         M68kException.m6eIncremented += 1L << (3 << 3);
 18962:         return XEiJ.regRn[11]++;
 18963:       }
 18964:       //fallthrough
 18965:     case 0b011_100:  //(A4)+
 18966:       if (XEiJ.EFA_SEPARATE_AR) {
 18967:         M68kException.m6eIncremented += 1L << (4 << 3);
 18968:         return XEiJ.regRn[12]++;
 18969:       }
 18970:       //fallthrough
 18971:     case 0b011_101:  //(A5)+
 18972:       if (XEiJ.EFA_SEPARATE_AR) {
 18973:         M68kException.m6eIncremented += 1L << (5 << 3);
 18974:         return XEiJ.regRn[13]++;
 18975:       }
 18976:       //fallthrough
 18977:     case 0b011_110:  //(A6)+
 18978:       if (XEiJ.EFA_SEPARATE_AR) {
 18979:         M68kException.m6eIncremented += 1L << (6 << 3);
 18980:         return XEiJ.regRn[14]++;
 18981:       } else {
 18982:         M68kException.m6eIncremented += 1L << ((ea & 7) << 3);
 18983:         return XEiJ.regRn[ea - (0b011_000 - 8)]++;
 18984:       }
 18985:     case 0b011_111:  //(A7)+
 18986:       M68kException.m6eIncremented += 2L << (7 << 3);
 18987:       return (XEiJ.regRn[15] += 2) - 2;
 18988:     case 0b100_000:  //-(A0)
 18989:       if (XEiJ.EFA_SEPARATE_AR) {
 18990:         M68kException.m6eIncremented -= 1L << (0 << 3);
 18991:         return --XEiJ.regRn[ 8];
 18992:       }
 18993:       //fallthrough
 18994:     case 0b100_001:  //-(A1)
 18995:       if (XEiJ.EFA_SEPARATE_AR) {
 18996:         M68kException.m6eIncremented -= 1L << (1 << 3);
 18997:         return --XEiJ.regRn[ 9];
 18998:       }
 18999:       //fallthrough
 19000:     case 0b100_010:  //-(A2)
 19001:       if (XEiJ.EFA_SEPARATE_AR) {
 19002:         M68kException.m6eIncremented -= 1L << (2 << 3);
 19003:         return --XEiJ.regRn[10];
 19004:       }
 19005:       //fallthrough
 19006:     case 0b100_011:  //-(A3)
 19007:       if (XEiJ.EFA_SEPARATE_AR) {
 19008:         M68kException.m6eIncremented -= 1L << (3 << 3);
 19009:         return --XEiJ.regRn[11];
 19010:       }
 19011:       //fallthrough
 19012:     case 0b100_100:  //-(A4)
 19013:       if (XEiJ.EFA_SEPARATE_AR) {
 19014:         M68kException.m6eIncremented -= 1L << (4 << 3);
 19015:         return --XEiJ.regRn[12];
 19016:       }
 19017:       //fallthrough
 19018:     case 0b100_101:  //-(A5)
 19019:       if (XEiJ.EFA_SEPARATE_AR) {
 19020:         M68kException.m6eIncremented -= 1L << (5 << 3);
 19021:         return --XEiJ.regRn[13];
 19022:       }
 19023:       //fallthrough
 19024:     case 0b100_110:  //-(A6)
 19025:       if (XEiJ.EFA_SEPARATE_AR) {
 19026:         M68kException.m6eIncremented -= 1L << (6 << 3);
 19027:         return --XEiJ.regRn[14];
 19028:       } else {
 19029:         M68kException.m6eIncremented -= 1L << ((ea & 7) << 3);
 19030:         return --XEiJ.regRn[ea - (0b100_000 - 8)];
 19031:       }
 19032:     case 0b100_111:  //-(A7)
 19033:       M68kException.m6eIncremented -= 2L << (7 << 3);
 19034:       return XEiJ.regRn[15] -= 2;
 19035:     case 0b101_000:  //(d16,A0)
 19036:     case 0b101_001:  //(d16,A1)
 19037:     case 0b101_010:  //(d16,A2)
 19038:     case 0b101_011:  //(d16,A3)
 19039:     case 0b101_100:  //(d16,A4)
 19040:     case 0b101_101:  //(d16,A5)
 19041:     case 0b101_110:  //(d16,A6)
 19042:     case 0b101_111:  //(d16,A7)
 19043:       if (XEiJ.MPU_COMPOUND_POSTINCREMENT) {
 19044:         return (XEiJ.regRn[ea - (0b101_000 - 8)]  //ベースレジスタ
 19045:                 + mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS));  //pcws。ワードディスプレースメント
 19046:       } else {
 19047:         t = XEiJ.regPC;
 19048:         XEiJ.regPC = t + 2;
 19049:         return (XEiJ.regRn[ea - (0b101_000 - 8)]  //ベースレジスタ
 19050:                 + mmuReadWordSignExword (t, XEiJ.regSRS));  //pcws。ワードディスプレースメント
 19051:       }
 19052:     case 0b110_000:  //(d8,A0,Rn.wl)
 19053:     case 0b110_001:  //(d8,A1,Rn.wl)
 19054:     case 0b110_010:  //(d8,A2,Rn.wl)
 19055:     case 0b110_011:  //(d8,A3,Rn.wl)
 19056:     case 0b110_100:  //(d8,A4,Rn.wl)
 19057:     case 0b110_101:  //(d8,A5,Rn.wl)
 19058:     case 0b110_110:  //(d8,A6,Rn.wl)
 19059:     case 0b110_111:  //(d8,A7,Rn.wl)
 19060:       if (XEiJ.MPU_COMPOUND_POSTINCREMENT) {
 19061:         w = mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);  //pcwz。拡張ワード
 19062:       } else {
 19063:         w = XEiJ.regPC;
 19064:         XEiJ.regPC = w + 2;
 19065:         w = mmuReadWordZeroExword (w, XEiJ.regSRS);  //pcwz。拡張ワード
 19066:       }
 19067:       if (w << 31 - 8 < 0) {  //フルフォーマット
 19068:         XEiJ.mpuCycleCount += w << -2 == 0 ? 1 : 3;  //メモリ間接なし:メモリ間接あり
 19069:       }
 19070:       t = (((~w & 0x0180) == 0 ? 0 :  //ベースレジスタサプレス
 19071:             XEiJ.regRn[ea - (0b110_000 - 8)])  //ベースレジスタ
 19072:            + (w << 31 - 8 >= 0 ? (byte) w :  //バイトディスプレースメント
 19073:               w << 31 - 5 >= 0 ? 0 :  //ヌルベースディスプレースメント
 19074:               w << 31 - 4 >= 0 ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) :  //pcws。ワードベースディスプレースメント
 19075:               mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS)));  //pcls。ロングベースディスプレースメント
 19076:       x = ((~w & 0x0140) == 0 ? 0 :  //インデックスサプレス
 19077:            (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] :  //ワードインデックス
 19078:             XEiJ.regRn[w >> 12])  //ロングインデックス
 19079:            << (w >> 9 & 3));  //スケールファクタ。ワードインデックスのときは符号拡張してから掛ける
 19080:       return ((w & 0x0103) <= 0x0100 ? t + x :  //メモリ間接なし
 19081:               ((XEiJ.TEST_BIT_2_SHIFT ? w << 31 - 2 >= 0 : (w & 4) == 0) ? mmuReadLongData (t + x, XEiJ.regSRS) :  //プリインデックス
 19082:                mmuReadLongData (t, XEiJ.regSRS) + x)  //ポストインデックス
 19083:               + ((XEiJ.TEST_BIT_1_SHIFT ? w << 31 - 1 >= 0 : (w & 2) == 0) ? 0 :  //ヌルアウタディスプレースメント
 19084:                  (XEiJ.TEST_BIT_0_SHIFT ? w << 31 - 0 >= 0 : (w & 1) == 0) ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) :  //pcws。ワードアウタディスプレースメント
 19085:                  mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS)));  //pcls。ロングアウタディスプレースメント
 19086:     case 0b111_000:  //(xxx).W
 19087:       return mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);  //pcws
 19088:     case 0b111_001:  //(xxx).L
 19089:       return mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS);  //pcls
 19090:     }  //switch
 19091:     M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION;
 19092:     throw M68kException.m6eSignal;
 19093:   }  //efaMltByte
 19094: 
 19095:   //a = efaCntByte (ea)  //|  M  WXZP |
 19096:   //  制御モードのロングオペランドの実効アドレスを求める
 19097:   //  efaMemByteとの違いは(Ar)+と-(Ar)がないこと
 19098:   @SuppressWarnings ("fallthrough") public static int efaCntByte (int ea) throws M68kException {
 19099:     int t, w, x;
 19100:     switch (ea) {
 19101:     case 0b010_000:  //(A0)
 19102:       if (XEiJ.EFA_SEPARATE_AR) {
 19103:         return XEiJ.regRn[ 8];
 19104:       }
 19105:       //fallthrough
 19106:     case 0b010_001:  //(A1)
 19107:       if (XEiJ.EFA_SEPARATE_AR) {
 19108:         return XEiJ.regRn[ 9];
 19109:       }
 19110:       //fallthrough
 19111:     case 0b010_010:  //(A2)
 19112:       if (XEiJ.EFA_SEPARATE_AR) {
 19113:         return XEiJ.regRn[10];
 19114:       }
 19115:       //fallthrough
 19116:     case 0b010_011:  //(A3)
 19117:       if (XEiJ.EFA_SEPARATE_AR) {
 19118:         return XEiJ.regRn[11];
 19119:       }
 19120:       //fallthrough
 19121:     case 0b010_100:  //(A4)
 19122:       if (XEiJ.EFA_SEPARATE_AR) {
 19123:         return XEiJ.regRn[12];
 19124:       }
 19125:       //fallthrough
 19126:     case 0b010_101:  //(A5)
 19127:       if (XEiJ.EFA_SEPARATE_AR) {
 19128:         return XEiJ.regRn[13];
 19129:       }
 19130:       //fallthrough
 19131:     case 0b010_110:  //(A6)
 19132:       if (XEiJ.EFA_SEPARATE_AR) {
 19133:         return XEiJ.regRn[14];
 19134:       }
 19135:       //fallthrough
 19136:     case 0b010_111:  //(A7)
 19137:       if (XEiJ.EFA_SEPARATE_AR) {
 19138:         return XEiJ.regRn[15];
 19139:       } else {
 19140:         return XEiJ.regRn[ea - (0b010_000 - 8)];
 19141:       }
 19142:     case 0b101_000:  //(d16,A0)
 19143:     case 0b101_001:  //(d16,A1)
 19144:     case 0b101_010:  //(d16,A2)
 19145:     case 0b101_011:  //(d16,A3)
 19146:     case 0b101_100:  //(d16,A4)
 19147:     case 0b101_101:  //(d16,A5)
 19148:     case 0b101_110:  //(d16,A6)
 19149:     case 0b101_111:  //(d16,A7)
 19150:       if (XEiJ.MPU_COMPOUND_POSTINCREMENT) {
 19151:         return (XEiJ.regRn[ea - (0b101_000 - 8)]  //ベースレジスタ
 19152:                 + mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS));  //pcws。ワードディスプレースメント
 19153:       } else {
 19154:         t = XEiJ.regPC;
 19155:         XEiJ.regPC = t + 2;
 19156:         return (XEiJ.regRn[ea - (0b101_000 - 8)]  //ベースレジスタ
 19157:                 + mmuReadWordSignExword (t, XEiJ.regSRS));  //pcws。ワードディスプレースメント
 19158:       }
 19159:     case 0b110_000:  //(d8,A0,Rn.wl)
 19160:     case 0b110_001:  //(d8,A1,Rn.wl)
 19161:     case 0b110_010:  //(d8,A2,Rn.wl)
 19162:     case 0b110_011:  //(d8,A3,Rn.wl)
 19163:     case 0b110_100:  //(d8,A4,Rn.wl)
 19164:     case 0b110_101:  //(d8,A5,Rn.wl)
 19165:     case 0b110_110:  //(d8,A6,Rn.wl)
 19166:     case 0b110_111:  //(d8,A7,Rn.wl)
 19167:       if (XEiJ.MPU_COMPOUND_POSTINCREMENT) {
 19168:         w = mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);  //pcwz。拡張ワード
 19169:       } else {
 19170:         w = XEiJ.regPC;
 19171:         XEiJ.regPC = w + 2;
 19172:         w = mmuReadWordZeroExword (w, XEiJ.regSRS);  //pcwz。拡張ワード
 19173:       }
 19174:       if (w << 31 - 8 < 0) {  //フルフォーマット
 19175:         XEiJ.mpuCycleCount += w << -2 == 0 ? 1 : 3;  //メモリ間接なし:メモリ間接あり
 19176:       }
 19177:       t = (((~w & 0x0180) == 0 ? 0 :  //ベースレジスタサプレス
 19178:             XEiJ.regRn[ea - (0b110_000 - 8)])  //ベースレジスタ
 19179:            + (w << 31 - 8 >= 0 ? (byte) w :  //バイトディスプレースメント
 19180:               w << 31 - 5 >= 0 ? 0 :  //ヌルベースディスプレースメント
 19181:               w << 31 - 4 >= 0 ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) :  //pcws。ワードベースディスプレースメント
 19182:               mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS)));  //pcls。ロングベースディスプレースメント
 19183:       x = ((~w & 0x0140) == 0 ? 0 :  //インデックスサプレス
 19184:            (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] :  //ワードインデックス
 19185:             XEiJ.regRn[w >> 12])  //ロングインデックス
 19186:            << (w >> 9 & 3));  //スケールファクタ。ワードインデックスのときは符号拡張してから掛ける
 19187:       return ((w & 0x0103) <= 0x0100 ? t + x :  //メモリ間接なし
 19188:               ((XEiJ.TEST_BIT_2_SHIFT ? w << 31 - 2 >= 0 : (w & 4) == 0) ? mmuReadLongData (t + x, XEiJ.regSRS) :  //プリインデックス
 19189:                mmuReadLongData (t, XEiJ.regSRS) + x)  //ポストインデックス
 19190:               + ((XEiJ.TEST_BIT_1_SHIFT ? w << 31 - 1 >= 0 : (w & 2) == 0) ? 0 :  //ヌルアウタディスプレースメント
 19191:                  (XEiJ.TEST_BIT_0_SHIFT ? w << 31 - 0 >= 0 : (w & 1) == 0) ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) :  //pcws。ワードアウタディスプレースメント
 19192:                  mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS)));  //pcls。ロングアウタディスプレースメント
 19193:     case 0b111_000:  //(xxx).W
 19194:       return mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);  //pcws
 19195:     case 0b111_001:  //(xxx).L
 19196:       return mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS);  //pcls
 19197:     case 0b111_010:  //(d16,PC)
 19198:       t = XEiJ.regPC;
 19199:       XEiJ.regPC = t + 2;
 19200:       return (t  //ベースレジスタ
 19201:               + mmuReadWordSignExword (t, XEiJ.regSRS));  //pcws。ワードディスプレースメント
 19202:     case 0b111_011:  //(d8,PC,Rn.wl)
 19203:       t = XEiJ.regPC;
 19204:       XEiJ.regPC = t + 2;
 19205:       w = mmuReadWordZeroExword (t, XEiJ.regSRS);  //pcwz。拡張ワード
 19206:       if (w << 31 - 8 < 0) {  //フルフォーマット
 19207:         XEiJ.mpuCycleCount += w << -2 == 0 ? 1 : 3;  //メモリ間接なし:メモリ間接あり
 19208:       }
 19209:       t = (((~w & 0x0180) == 0 ? 0 :  //ベースレジスタサプレス
 19210:             t)  //ベースレジスタ
 19211:            + (w << 31 - 8 >= 0 ? (byte) w :  //バイトディスプレースメント
 19212:               w << 31 - 5 >= 0 ? 0 :  //ヌルベースディスプレースメント
 19213:               w << 31 - 4 >= 0 ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) :  //pcws。ワードベースディスプレースメント
 19214:               mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS)));  //pcls。ロングベースディスプレースメント
 19215:       x = ((~w & 0x0140) == 0 ? 0 :  //インデックスサプレス
 19216:            (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] :  //ワードインデックス
 19217:             XEiJ.regRn[w >> 12])  //ロングインデックス
 19218:            << (w >> 9 & 3));  //スケールファクタ。ワードインデックスのときは符号拡張してから掛ける
 19219:       return ((w & 0x0103) <= 0x0100 ? t + x :  //メモリ間接なし
 19220:               ((XEiJ.TEST_BIT_2_SHIFT ? w << 31 - 2 >= 0 : (w & 4) == 0) ? mmuReadLongData (t + x, XEiJ.regSRS) :  //プリインデックス
 19221:                mmuReadLongData (t, XEiJ.regSRS) + x)  //ポストインデックス
 19222:               + ((XEiJ.TEST_BIT_1_SHIFT ? w << 31 - 1 >= 0 : (w & 2) == 0) ? 0 :  //ヌルアウタディスプレースメント
 19223:                  (XEiJ.TEST_BIT_0_SHIFT ? w << 31 - 0 >= 0 : (w & 1) == 0) ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) :  //pcws。ワードアウタディスプレースメント
 19224:                  mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS)));  //pcls。ロングアウタディスプレースメント
 19225:     }  //switch
 19226:     M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION;
 19227:     throw M68kException.m6eSignal;
 19228:   }  //efaCntByte
 19229: 
 19230:   //a = efaAnyWord (ea)  //|  M+-WXZPI|
 19231:   //  任意のモードのワードオペランドの実効アドレスを求める
 19232:   //  efaAnyByteとの違いは(Ar)+と-(Ar)がArを2変化させることと、(A7)+と-(A7)と#<data>の特別な動作がないこと
 19233:   @SuppressWarnings ("fallthrough") public static int efaAnyWord (int ea) throws M68kException {
 19234:     int t, w, x;
 19235:     switch (ea) {
 19236:     case 0b010_000:  //(A0)
 19237:       if (XEiJ.EFA_SEPARATE_AR) {
 19238:         return XEiJ.regRn[ 8];
 19239:       }
 19240:       //fallthrough
 19241:     case 0b010_001:  //(A1)
 19242:       if (XEiJ.EFA_SEPARATE_AR) {
 19243:         return XEiJ.regRn[ 9];
 19244:       }
 19245:       //fallthrough
 19246:     case 0b010_010:  //(A2)
 19247:       if (XEiJ.EFA_SEPARATE_AR) {
 19248:         return XEiJ.regRn[10];
 19249:       }
 19250:       //fallthrough
 19251:     case 0b010_011:  //(A3)
 19252:       if (XEiJ.EFA_SEPARATE_AR) {
 19253:         return XEiJ.regRn[11];
 19254:       }
 19255:       //fallthrough
 19256:     case 0b010_100:  //(A4)
 19257:       if (XEiJ.EFA_SEPARATE_AR) {
 19258:         return XEiJ.regRn[12];
 19259:       }
 19260:       //fallthrough
 19261:     case 0b010_101:  //(A5)
 19262:       if (XEiJ.EFA_SEPARATE_AR) {
 19263:         return XEiJ.regRn[13];
 19264:       }
 19265:       //fallthrough
 19266:     case 0b010_110:  //(A6)
 19267:       if (XEiJ.EFA_SEPARATE_AR) {
 19268:         return XEiJ.regRn[14];
 19269:       }
 19270:       //fallthrough
 19271:     case 0b010_111:  //(A7)
 19272:       if (XEiJ.EFA_SEPARATE_AR) {
 19273:         return XEiJ.regRn[15];
 19274:       } else {
 19275:         return XEiJ.regRn[ea - (0b010_000 - 8)];
 19276:       }
 19277:     case 0b011_000:  //(A0)+
 19278:       if (XEiJ.EFA_SEPARATE_AR) {
 19279:         M68kException.m6eIncremented += 2L << (0 << 3);
 19280:         return (XEiJ.regRn[ 8] += 2) - 2;
 19281:       }
 19282:       //fallthrough
 19283:     case 0b011_001:  //(A1)+
 19284:       if (XEiJ.EFA_SEPARATE_AR) {
 19285:         M68kException.m6eIncremented += 2L << (1 << 3);
 19286:         return (XEiJ.regRn[ 9] += 2) - 2;
 19287:       }
 19288:       //fallthrough
 19289:     case 0b011_010:  //(A2)+
 19290:       if (XEiJ.EFA_SEPARATE_AR) {
 19291:         M68kException.m6eIncremented += 2L << (2 << 3);
 19292:         return (XEiJ.regRn[10] += 2) - 2;
 19293:       }
 19294:       //fallthrough
 19295:     case 0b011_011:  //(A3)+
 19296:       if (XEiJ.EFA_SEPARATE_AR) {
 19297:         M68kException.m6eIncremented += 2L << (3 << 3);
 19298:         return (XEiJ.regRn[11] += 2) - 2;
 19299:       }
 19300:       //fallthrough
 19301:     case 0b011_100:  //(A4)+
 19302:       if (XEiJ.EFA_SEPARATE_AR) {
 19303:         M68kException.m6eIncremented += 2L << (4 << 3);
 19304:         return (XEiJ.regRn[12] += 2) - 2;
 19305:       }
 19306:       //fallthrough
 19307:     case 0b011_101:  //(A5)+
 19308:       if (XEiJ.EFA_SEPARATE_AR) {
 19309:         M68kException.m6eIncremented += 2L << (5 << 3);
 19310:         return (XEiJ.regRn[13] += 2) - 2;
 19311:       }
 19312:       //fallthrough
 19313:     case 0b011_110:  //(A6)+
 19314:       if (XEiJ.EFA_SEPARATE_AR) {
 19315:         M68kException.m6eIncremented += 2L << (6 << 3);
 19316:         return (XEiJ.regRn[14] += 2) - 2;
 19317:       }
 19318:       //fallthrough
 19319:     case 0b011_111:  //(A7)+
 19320:       if (XEiJ.EFA_SEPARATE_AR) {
 19321:         M68kException.m6eIncremented += 2L << (7 << 3);
 19322:         return (XEiJ.regRn[15] += 2) - 2;
 19323:       } else {
 19324:         M68kException.m6eIncremented += 2L << ((ea & 7) << 3);
 19325:         return (XEiJ.regRn[ea - (0b011_000 - 8)] += 2) - 2;
 19326:       }
 19327:     case 0b100_000:  //-(A0)
 19328:       if (XEiJ.EFA_SEPARATE_AR) {
 19329:         M68kException.m6eIncremented -= 2L << (0 << 3);
 19330:         return XEiJ.regRn[ 8] -= 2;
 19331:       }
 19332:       //fallthrough
 19333:     case 0b100_001:  //-(A1)
 19334:       if (XEiJ.EFA_SEPARATE_AR) {
 19335:         M68kException.m6eIncremented -= 2L << (1 << 3);
 19336:         return XEiJ.regRn[ 9] -= 2;
 19337:       }
 19338:       //fallthrough
 19339:     case 0b100_010:  //-(A2)
 19340:       if (XEiJ.EFA_SEPARATE_AR) {
 19341:         M68kException.m6eIncremented -= 2L << (2 << 3);
 19342:         return XEiJ.regRn[10] -= 2;
 19343:       }
 19344:       //fallthrough
 19345:     case 0b100_011:  //-(A3)
 19346:       if (XEiJ.EFA_SEPARATE_AR) {
 19347:         M68kException.m6eIncremented -= 2L << (3 << 3);
 19348:         return XEiJ.regRn[11] -= 2;
 19349:       }
 19350:       //fallthrough
 19351:     case 0b100_100:  //-(A4)
 19352:       if (XEiJ.EFA_SEPARATE_AR) {
 19353:         M68kException.m6eIncremented -= 2L << (4 << 3);
 19354:         return XEiJ.regRn[12] -= 2;
 19355:       }
 19356:       //fallthrough
 19357:     case 0b100_101:  //-(A5)
 19358:       if (XEiJ.EFA_SEPARATE_AR) {
 19359:         M68kException.m6eIncremented -= 2L << (5 << 3);
 19360:         return XEiJ.regRn[13] -= 2;
 19361:       }
 19362:       //fallthrough
 19363:     case 0b100_110:  //-(A6)
 19364:       if (XEiJ.EFA_SEPARATE_AR) {
 19365:         M68kException.m6eIncremented -= 2L << (6 << 3);
 19366:         return XEiJ.regRn[14] -= 2;
 19367:       }
 19368:       //fallthrough
 19369:     case 0b100_111:  //-(A7)
 19370:       if (XEiJ.EFA_SEPARATE_AR) {
 19371:         M68kException.m6eIncremented -= 2L << (7 << 3);
 19372:         return XEiJ.regRn[15] -= 2;
 19373:       } else {
 19374:         M68kException.m6eIncremented -= 2L << ((ea & 7) << 3);
 19375:         return XEiJ.regRn[ea - (0b100_000 - 8)] -= 2;
 19376:       }
 19377:     case 0b101_000:  //(d16,A0)
 19378:     case 0b101_001:  //(d16,A1)
 19379:     case 0b101_010:  //(d16,A2)
 19380:     case 0b101_011:  //(d16,A3)
 19381:     case 0b101_100:  //(d16,A4)
 19382:     case 0b101_101:  //(d16,A5)
 19383:     case 0b101_110:  //(d16,A6)
 19384:     case 0b101_111:  //(d16,A7)
 19385:       if (XEiJ.MPU_COMPOUND_POSTINCREMENT) {
 19386:         return (XEiJ.regRn[ea - (0b101_000 - 8)]  //ベースレジスタ
 19387:                 + mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS));  //pcws。ワードディスプレースメント
 19388:       } else {
 19389:         t = XEiJ.regPC;
 19390:         XEiJ.regPC = t + 2;
 19391:         return (XEiJ.regRn[ea - (0b101_000 - 8)]  //ベースレジスタ
 19392:                 + mmuReadWordSignExword (t, XEiJ.regSRS));  //pcws。ワードディスプレースメント
 19393:       }
 19394:     case 0b110_000:  //(d8,A0,Rn.wl)
 19395:     case 0b110_001:  //(d8,A1,Rn.wl)
 19396:     case 0b110_010:  //(d8,A2,Rn.wl)
 19397:     case 0b110_011:  //(d8,A3,Rn.wl)
 19398:     case 0b110_100:  //(d8,A4,Rn.wl)
 19399:     case 0b110_101:  //(d8,A5,Rn.wl)
 19400:     case 0b110_110:  //(d8,A6,Rn.wl)
 19401:     case 0b110_111:  //(d8,A7,Rn.wl)
 19402:       if (XEiJ.MPU_COMPOUND_POSTINCREMENT) {
 19403:         w = mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);  //pcwz。拡張ワード
 19404:       } else {
 19405:         w = XEiJ.regPC;
 19406:         XEiJ.regPC = w + 2;
 19407:         w = mmuReadWordZeroExword (w, XEiJ.regSRS);  //pcwz。拡張ワード
 19408:       }
 19409:       if (w << 31 - 8 < 0) {  //フルフォーマット
 19410:         XEiJ.mpuCycleCount += w << -2 == 0 ? 1 : 3;  //メモリ間接なし:メモリ間接あり
 19411:       }
 19412:       t = (((~w & 0x0180) == 0 ? 0 :  //ベースレジスタサプレス
 19413:             XEiJ.regRn[ea - (0b110_000 - 8)])  //ベースレジスタ
 19414:            + (w << 31 - 8 >= 0 ? (byte) w :  //バイトディスプレースメント
 19415:               w << 31 - 5 >= 0 ? 0 :  //ヌルベースディスプレースメント
 19416:               w << 31 - 4 >= 0 ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) :  //pcws。ワードベースディスプレースメント
 19417:               mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS)));  //pcls。ロングベースディスプレースメント
 19418:       x = ((~w & 0x0140) == 0 ? 0 :  //インデックスサプレス
 19419:            (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] :  //ワードインデックス
 19420:             XEiJ.regRn[w >> 12])  //ロングインデックス
 19421:            << (w >> 9 & 3));  //スケールファクタ。ワードインデックスのときは符号拡張してから掛ける
 19422:       return ((w & 0x0103) <= 0x0100 ? t + x :  //メモリ間接なし
 19423:               ((XEiJ.TEST_BIT_2_SHIFT ? w << 31 - 2 >= 0 : (w & 4) == 0) ? mmuReadLongData (t + x, XEiJ.regSRS) :  //プリインデックス
 19424:                mmuReadLongData (t, XEiJ.regSRS) + x)  //ポストインデックス
 19425:               + ((XEiJ.TEST_BIT_1_SHIFT ? w << 31 - 1 >= 0 : (w & 2) == 0) ? 0 :  //ヌルアウタディスプレースメント
 19426:                  (XEiJ.TEST_BIT_0_SHIFT ? w << 31 - 0 >= 0 : (w & 1) == 0) ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) :  //pcws。ワードアウタディスプレースメント
 19427:                  mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS)));  //pcls。ロングアウタディスプレースメント
 19428:     case 0b111_000:  //(xxx).W
 19429:       return mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);  //pcws
 19430:     case 0b111_001:  //(xxx).L
 19431:       return mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS);  //pcls
 19432:     case 0b111_010:  //(d16,PC)
 19433:       t = XEiJ.regPC;
 19434:       XEiJ.regPC = t + 2;
 19435:       return (t  //ベースレジスタ
 19436:               + mmuReadWordSignExword (t, XEiJ.regSRS));  //pcws。ワードディスプレースメント
 19437:     case 0b111_011:  //(d8,PC,Rn.wl)
 19438:       t = XEiJ.regPC;
 19439:       XEiJ.regPC = t + 2;
 19440:       w = mmuReadWordZeroExword (t, XEiJ.regSRS);  //pcwz。拡張ワード
 19441:       if (w << 31 - 8 < 0) {  //フルフォーマット
 19442:         XEiJ.mpuCycleCount += w << -2 == 0 ? 1 : 3;  //メモリ間接なし:メモリ間接あり
 19443:       }
 19444:       t = (((~w & 0x0180) == 0 ? 0 :  //ベースレジスタサプレス
 19445:             t)  //ベースレジスタ
 19446:            + (w << 31 - 8 >= 0 ? (byte) w :  //バイトディスプレースメント
 19447:               w << 31 - 5 >= 0 ? 0 :  //ヌルベースディスプレースメント
 19448:               w << 31 - 4 >= 0 ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) :  //pcws。ワードベースディスプレースメント
 19449:               mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS)));  //pcls。ロングベースディスプレースメント
 19450:       x = ((~w & 0x0140) == 0 ? 0 :  //インデックスサプレス
 19451:            (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] :  //ワードインデックス
 19452:             XEiJ.regRn[w >> 12])  //ロングインデックス
 19453:            << (w >> 9 & 3));  //スケールファクタ。ワードインデックスのときは符号拡張してから掛ける
 19454:       return ((w & 0x0103) <= 0x0100 ? t + x :  //メモリ間接なし
 19455:               ((XEiJ.TEST_BIT_2_SHIFT ? w << 31 - 2 >= 0 : (w & 4) == 0) ? mmuReadLongData (t + x, XEiJ.regSRS) :  //プリインデックス
 19456:                mmuReadLongData (t, XEiJ.regSRS) + x)  //ポストインデックス
 19457:               + ((XEiJ.TEST_BIT_1_SHIFT ? w << 31 - 1 >= 0 : (w & 2) == 0) ? 0 :  //ヌルアウタディスプレースメント
 19458:                  (XEiJ.TEST_BIT_0_SHIFT ? w << 31 - 0 >= 0 : (w & 1) == 0) ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) :  //pcws。ワードアウタディスプレースメント
 19459:                  mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS)));  //pcls。ロングアウタディスプレースメント
 19460:     case 0b111_100:  //#<data>
 19461:       if (XEiJ.MPU_COMPOUND_POSTINCREMENT) {
 19462:         return (XEiJ.regPC += 2) - 2;
 19463:       } else {
 19464:         t = XEiJ.regPC;
 19465:         XEiJ.regPC = t + 2;
 19466:         return t;
 19467:       }
 19468:     }  //switch
 19469:     M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION;
 19470:     throw M68kException.m6eSignal;
 19471:   }  //efaAnyWord
 19472: 
 19473:   //a = efaMemWord (ea)  //|  M+-WXZP |
 19474:   //  メモリモードのワードオペランドの実効アドレスを求める
 19475:   //  efaAnyWordとの違いは#<data>がないこと
 19476:   @SuppressWarnings ("fallthrough") public static int efaMemWord (int ea) throws M68kException {
 19477:     int t, w, x;
 19478:     switch (ea) {
 19479:     case 0b010_000:  //(A0)
 19480:       if (XEiJ.EFA_SEPARATE_AR) {
 19481:         return XEiJ.regRn[ 8];
 19482:       }
 19483:       //fallthrough
 19484:     case 0b010_001:  //(A1)
 19485:       if (XEiJ.EFA_SEPARATE_AR) {
 19486:         return XEiJ.regRn[ 9];
 19487:       }
 19488:       //fallthrough
 19489:     case 0b010_010:  //(A2)
 19490:       if (XEiJ.EFA_SEPARATE_AR) {
 19491:         return XEiJ.regRn[10];
 19492:       }
 19493:       //fallthrough
 19494:     case 0b010_011:  //(A3)
 19495:       if (XEiJ.EFA_SEPARATE_AR) {
 19496:         return XEiJ.regRn[11];
 19497:       }
 19498:       //fallthrough
 19499:     case 0b010_100:  //(A4)
 19500:       if (XEiJ.EFA_SEPARATE_AR) {
 19501:         return XEiJ.regRn[12];
 19502:       }
 19503:       //fallthrough
 19504:     case 0b010_101:  //(A5)
 19505:       if (XEiJ.EFA_SEPARATE_AR) {
 19506:         return XEiJ.regRn[13];
 19507:       }
 19508:       //fallthrough
 19509:     case 0b010_110:  //(A6)
 19510:       if (XEiJ.EFA_SEPARATE_AR) {
 19511:         return XEiJ.regRn[14];
 19512:       }
 19513:       //fallthrough
 19514:     case 0b010_111:  //(A7)
 19515:       if (XEiJ.EFA_SEPARATE_AR) {
 19516:         return XEiJ.regRn[15];
 19517:       } else {
 19518:         return XEiJ.regRn[ea - (0b010_000 - 8)];
 19519:       }
 19520:     case 0b011_000:  //(A0)+
 19521:       if (XEiJ.EFA_SEPARATE_AR) {
 19522:         M68kException.m6eIncremented += 2L << (0 << 3);
 19523:         return (XEiJ.regRn[ 8] += 2) - 2;
 19524:       }
 19525:       //fallthrough
 19526:     case 0b011_001:  //(A1)+
 19527:       if (XEiJ.EFA_SEPARATE_AR) {
 19528:         M68kException.m6eIncremented += 2L << (1 << 3);
 19529:         return (XEiJ.regRn[ 9] += 2) - 2;
 19530:       }
 19531:       //fallthrough
 19532:     case 0b011_010:  //(A2)+
 19533:       if (XEiJ.EFA_SEPARATE_AR) {
 19534:         M68kException.m6eIncremented += 2L << (2 << 3);
 19535:         return (XEiJ.regRn[10] += 2) - 2;
 19536:       }
 19537:       //fallthrough
 19538:     case 0b011_011:  //(A3)+
 19539:       if (XEiJ.EFA_SEPARATE_AR) {
 19540:         M68kException.m6eIncremented += 2L << (3 << 3);
 19541:         return (XEiJ.regRn[11] += 2) - 2;
 19542:       }
 19543:       //fallthrough
 19544:     case 0b011_100:  //(A4)+
 19545:       if (XEiJ.EFA_SEPARATE_AR) {
 19546:         M68kException.m6eIncremented += 2L << (4 << 3);
 19547:         return (XEiJ.regRn[12] += 2) - 2;
 19548:       }
 19549:       //fallthrough
 19550:     case 0b011_101:  //(A5)+
 19551:       if (XEiJ.EFA_SEPARATE_AR) {
 19552:         M68kException.m6eIncremented += 2L << (5 << 3);
 19553:         return (XEiJ.regRn[13] += 2) - 2;
 19554:       }
 19555:       //fallthrough
 19556:     case 0b011_110:  //(A6)+
 19557:       if (XEiJ.EFA_SEPARATE_AR) {
 19558:         M68kException.m6eIncremented += 2L << (6 << 3);
 19559:         return (XEiJ.regRn[14] += 2) - 2;
 19560:       }
 19561:       //fallthrough
 19562:     case 0b011_111:  //(A7)+
 19563:       if (XEiJ.EFA_SEPARATE_AR) {
 19564:         M68kException.m6eIncremented += 2L << (7 << 3);
 19565:         return (XEiJ.regRn[15] += 2) - 2;
 19566:       } else {
 19567:         M68kException.m6eIncremented += 2L << ((ea & 7) << 3);
 19568:         return (XEiJ.regRn[ea - (0b011_000 - 8)] += 2) - 2;
 19569:       }
 19570:     case 0b100_000:  //-(A0)
 19571:       if (XEiJ.EFA_SEPARATE_AR) {
 19572:         M68kException.m6eIncremented -= 2L << (0 << 3);
 19573:         return XEiJ.regRn[ 8] -= 2;
 19574:       }
 19575:       //fallthrough
 19576:     case 0b100_001:  //-(A1)
 19577:       if (XEiJ.EFA_SEPARATE_AR) {
 19578:         M68kException.m6eIncremented -= 2L << (1 << 3);
 19579:         return XEiJ.regRn[ 9] -= 2;
 19580:       }
 19581:       //fallthrough
 19582:     case 0b100_010:  //-(A2)
 19583:       if (XEiJ.EFA_SEPARATE_AR) {
 19584:         M68kException.m6eIncremented -= 2L << (2 << 3);
 19585:         return XEiJ.regRn[10] -= 2;
 19586:       }
 19587:       //fallthrough
 19588:     case 0b100_011:  //-(A3)
 19589:       if (XEiJ.EFA_SEPARATE_AR) {
 19590:         M68kException.m6eIncremented -= 2L << (3 << 3);
 19591:         return XEiJ.regRn[11] -= 2;
 19592:       }
 19593:       //fallthrough
 19594:     case 0b100_100:  //-(A4)
 19595:       if (XEiJ.EFA_SEPARATE_AR) {
 19596:         M68kException.m6eIncremented -= 2L << (4 << 3);
 19597:         return XEiJ.regRn[12] -= 2;
 19598:       }
 19599:       //fallthrough
 19600:     case 0b100_101:  //-(A5)
 19601:       if (XEiJ.EFA_SEPARATE_AR) {
 19602:         M68kException.m6eIncremented -= 2L << (5 << 3);
 19603:         return XEiJ.regRn[13] -= 2;
 19604:       }
 19605:       //fallthrough
 19606:     case 0b100_110:  //-(A6)
 19607:       if (XEiJ.EFA_SEPARATE_AR) {
 19608:         M68kException.m6eIncremented -= 2L << (6 << 3);
 19609:         return XEiJ.regRn[14] -= 2;
 19610:       }
 19611:       //fallthrough
 19612:     case 0b100_111:  //-(A7)
 19613:       if (XEiJ.EFA_SEPARATE_AR) {
 19614:         M68kException.m6eIncremented -= 2L << (7 << 3);
 19615:         return XEiJ.regRn[15] -= 2;
 19616:       } else {
 19617:         M68kException.m6eIncremented -= 2L << ((ea & 7) << 3);
 19618:         return XEiJ.regRn[ea - (0b100_000 - 8)] -= 2;
 19619:       }
 19620:     case 0b101_000:  //(d16,A0)
 19621:     case 0b101_001:  //(d16,A1)
 19622:     case 0b101_010:  //(d16,A2)
 19623:     case 0b101_011:  //(d16,A3)
 19624:     case 0b101_100:  //(d16,A4)
 19625:     case 0b101_101:  //(d16,A5)
 19626:     case 0b101_110:  //(d16,A6)
 19627:     case 0b101_111:  //(d16,A7)
 19628:       if (XEiJ.MPU_COMPOUND_POSTINCREMENT) {
 19629:         return (XEiJ.regRn[ea - (0b101_000 - 8)]  //ベースレジスタ
 19630:                 + mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS));  //pcws。ワードディスプレースメント
 19631:       } else {
 19632:         t = XEiJ.regPC;
 19633:         XEiJ.regPC = t + 2;
 19634:         return (XEiJ.regRn[ea - (0b101_000 - 8)]  //ベースレジスタ
 19635:                 + mmuReadWordSignExword (t, XEiJ.regSRS));  //pcws。ワードディスプレースメント
 19636:       }
 19637:     case 0b110_000:  //(d8,A0,Rn.wl)
 19638:     case 0b110_001:  //(d8,A1,Rn.wl)
 19639:     case 0b110_010:  //(d8,A2,Rn.wl)
 19640:     case 0b110_011:  //(d8,A3,Rn.wl)
 19641:     case 0b110_100:  //(d8,A4,Rn.wl)
 19642:     case 0b110_101:  //(d8,A5,Rn.wl)
 19643:     case 0b110_110:  //(d8,A6,Rn.wl)
 19644:     case 0b110_111:  //(d8,A7,Rn.wl)
 19645:       if (XEiJ.MPU_COMPOUND_POSTINCREMENT) {
 19646:         w = mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);  //pcwz。拡張ワード
 19647:       } else {
 19648:         w = XEiJ.regPC;
 19649:         XEiJ.regPC = w + 2;
 19650:         w = mmuReadWordZeroExword (w, XEiJ.regSRS);  //pcwz。拡張ワード
 19651:       }
 19652:       if (w << 31 - 8 < 0) {  //フルフォーマット
 19653:         XEiJ.mpuCycleCount += w << -2 == 0 ? 1 : 3;  //メモリ間接なし:メモリ間接あり
 19654:       }
 19655:       t = (((~w & 0x0180) == 0 ? 0 :  //ベースレジスタサプレス
 19656:             XEiJ.regRn[ea - (0b110_000 - 8)])  //ベースレジスタ
 19657:            + (w << 31 - 8 >= 0 ? (byte) w :  //バイトディスプレースメント
 19658:               w << 31 - 5 >= 0 ? 0 :  //ヌルベースディスプレースメント
 19659:               w << 31 - 4 >= 0 ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) :  //pcws。ワードベースディスプレースメント
 19660:               mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS)));  //pcls。ロングベースディスプレースメント
 19661:       x = ((~w & 0x0140) == 0 ? 0 :  //インデックスサプレス
 19662:            (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] :  //ワードインデックス
 19663:             XEiJ.regRn[w >> 12])  //ロングインデックス
 19664:            << (w >> 9 & 3));  //スケールファクタ。ワードインデックスのときは符号拡張してから掛ける
 19665:       return ((w & 0x0103) <= 0x0100 ? t + x :  //メモリ間接なし
 19666:               ((XEiJ.TEST_BIT_2_SHIFT ? w << 31 - 2 >= 0 : (w & 4) == 0) ? mmuReadLongData (t + x, XEiJ.regSRS) :  //プリインデックス
 19667:                mmuReadLongData (t, XEiJ.regSRS) + x)  //ポストインデックス
 19668:               + ((XEiJ.TEST_BIT_1_SHIFT ? w << 31 - 1 >= 0 : (w & 2) == 0) ? 0 :  //ヌルアウタディスプレースメント
 19669:                  (XEiJ.TEST_BIT_0_SHIFT ? w << 31 - 0 >= 0 : (w & 1) == 0) ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) :  //pcws。ワードアウタディスプレースメント
 19670:                  mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS)));  //pcls。ロングアウタディスプレースメント
 19671:     case 0b111_000:  //(xxx).W
 19672:       return mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);  //pcws
 19673:     case 0b111_001:  //(xxx).L
 19674:       return mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS);  //pcls
 19675:     case 0b111_010:  //(d16,PC)
 19676:       t = XEiJ.regPC;
 19677:       XEiJ.regPC = t + 2;
 19678:       return (t  //ベースレジスタ
 19679:               + mmuReadWordSignExword (t, XEiJ.regSRS));  //pcws。ワードディスプレースメント
 19680:     case 0b111_011:  //(d8,PC,Rn.wl)
 19681:       t = XEiJ.regPC;
 19682:       XEiJ.regPC = t + 2;
 19683:       w = mmuReadWordZeroExword (t, XEiJ.regSRS);  //pcwz。拡張ワード
 19684:       if (w << 31 - 8 < 0) {  //フルフォーマット
 19685:         XEiJ.mpuCycleCount += w << -2 == 0 ? 1 : 3;  //メモリ間接なし:メモリ間接あり
 19686:       }
 19687:       t = (((~w & 0x0180) == 0 ? 0 :  //ベースレジスタサプレス
 19688:             t)  //ベースレジスタ
 19689:            + (w << 31 - 8 >= 0 ? (byte) w :  //バイトディスプレースメント
 19690:               w << 31 - 5 >= 0 ? 0 :  //ヌルベースディスプレースメント
 19691:               w << 31 - 4 >= 0 ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) :  //pcws。ワードベースディスプレースメント
 19692:               mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS)));  //pcls。ロングベースディスプレースメント
 19693:       x = ((~w & 0x0140) == 0 ? 0 :  //インデックスサプレス
 19694:            (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] :  //ワードインデックス
 19695:             XEiJ.regRn[w >> 12])  //ロングインデックス
 19696:            << (w >> 9 & 3));  //スケールファクタ。ワードインデックスのときは符号拡張してから掛ける
 19697:       return ((w & 0x0103) <= 0x0100 ? t + x :  //メモリ間接なし
 19698:               ((XEiJ.TEST_BIT_2_SHIFT ? w << 31 - 2 >= 0 : (w & 4) == 0) ? mmuReadLongData (t + x, XEiJ.regSRS) :  //プリインデックス
 19699:                mmuReadLongData (t, XEiJ.regSRS) + x)  //ポストインデックス
 19700:               + ((XEiJ.TEST_BIT_1_SHIFT ? w << 31 - 1 >= 0 : (w & 2) == 0) ? 0 :  //ヌルアウタディスプレースメント
 19701:                  (XEiJ.TEST_BIT_0_SHIFT ? w << 31 - 0 >= 0 : (w & 1) == 0) ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) :  //pcws。ワードアウタディスプレースメント
 19702:                  mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS)));  //pcls。ロングアウタディスプレースメント
 19703:     }  //switch
 19704:     M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION;
 19705:     throw M68kException.m6eSignal;
 19706:   }  //efaMemWord
 19707: 
 19708:   //a = efaMltWord (ea)  //|  M+-WXZ  |
 19709:   //  メモリ可変モードのワードオペランドの実効アドレスを求める
 19710:   //  efaMemWordとの違いは(d16,PC)と(d8,PC,Rn.wl)がないこと
 19711:   @SuppressWarnings ("fallthrough") public static int efaMltWord (int ea) throws M68kException {
 19712:     int t, w, x;
 19713:     switch (ea) {
 19714:     case 0b010_000:  //(A0)
 19715:       if (XEiJ.EFA_SEPARATE_AR) {
 19716:         return XEiJ.regRn[ 8];
 19717:       }
 19718:       //fallthrough
 19719:     case 0b010_001:  //(A1)
 19720:       if (XEiJ.EFA_SEPARATE_AR) {
 19721:         return XEiJ.regRn[ 9];
 19722:       }
 19723:       //fallthrough
 19724:     case 0b010_010:  //(A2)
 19725:       if (XEiJ.EFA_SEPARATE_AR) {
 19726:         return XEiJ.regRn[10];
 19727:       }
 19728:       //fallthrough
 19729:     case 0b010_011:  //(A3)
 19730:       if (XEiJ.EFA_SEPARATE_AR) {
 19731:         return XEiJ.regRn[11];
 19732:       }
 19733:       //fallthrough
 19734:     case 0b010_100:  //(A4)
 19735:       if (XEiJ.EFA_SEPARATE_AR) {
 19736:         return XEiJ.regRn[12];
 19737:       }
 19738:       //fallthrough
 19739:     case 0b010_101:  //(A5)
 19740:       if (XEiJ.EFA_SEPARATE_AR) {
 19741:         return XEiJ.regRn[13];
 19742:       }
 19743:       //fallthrough
 19744:     case 0b010_110:  //(A6)
 19745:       if (XEiJ.EFA_SEPARATE_AR) {
 19746:         return XEiJ.regRn[14];
 19747:       }
 19748:       //fallthrough
 19749:     case 0b010_111:  //(A7)
 19750:       if (XEiJ.EFA_SEPARATE_AR) {
 19751:         return XEiJ.regRn[15];
 19752:       } else {
 19753:         return XEiJ.regRn[ea - (0b010_000 - 8)];
 19754:       }
 19755:     case 0b011_000:  //(A0)+
 19756:       if (XEiJ.EFA_SEPARATE_AR) {
 19757:         M68kException.m6eIncremented += 2L << (0 << 3);
 19758:         return (XEiJ.regRn[ 8] += 2) - 2;
 19759:       }
 19760:       //fallthrough
 19761:     case 0b011_001:  //(A1)+
 19762:       if (XEiJ.EFA_SEPARATE_AR) {
 19763:         M68kException.m6eIncremented += 2L << (1 << 3);
 19764:         return (XEiJ.regRn[ 9] += 2) - 2;
 19765:       }
 19766:       //fallthrough
 19767:     case 0b011_010:  //(A2)+
 19768:       if (XEiJ.EFA_SEPARATE_AR) {
 19769:         M68kException.m6eIncremented += 2L << (2 << 3);
 19770:         return (XEiJ.regRn[10] += 2) - 2;
 19771:       }
 19772:       //fallthrough
 19773:     case 0b011_011:  //(A3)+
 19774:       if (XEiJ.EFA_SEPARATE_AR) {
 19775:         M68kException.m6eIncremented += 2L << (3 << 3);
 19776:         return (XEiJ.regRn[11] += 2) - 2;
 19777:       }
 19778:       //fallthrough
 19779:     case 0b011_100:  //(A4)+
 19780:       if (XEiJ.EFA_SEPARATE_AR) {
 19781:         M68kException.m6eIncremented += 2L << (4 << 3);
 19782:         return (XEiJ.regRn[12] += 2) - 2;
 19783:       }
 19784:       //fallthrough
 19785:     case 0b011_101:  //(A5)+
 19786:       if (XEiJ.EFA_SEPARATE_AR) {
 19787:         M68kException.m6eIncremented += 2L << (5 << 3);
 19788:         return (XEiJ.regRn[13] += 2) - 2;
 19789:       }
 19790:       //fallthrough
 19791:     case 0b011_110:  //(A6)+
 19792:       if (XEiJ.EFA_SEPARATE_AR) {
 19793:         M68kException.m6eIncremented += 2L << (6 << 3);
 19794:         return (XEiJ.regRn[14] += 2) - 2;
 19795:       }
 19796:       //fallthrough
 19797:     case 0b011_111:  //(A7)+
 19798:       if (XEiJ.EFA_SEPARATE_AR) {
 19799:         M68kException.m6eIncremented += 2L << (7 << 3);
 19800:         return (XEiJ.regRn[15] += 2) - 2;
 19801:       } else {
 19802:         M68kException.m6eIncremented += 2L << ((ea & 7) << 3);
 19803:         return (XEiJ.regRn[ea - (0b011_000 - 8)] += 2) - 2;
 19804:       }
 19805:     case 0b100_000:  //-(A0)
 19806:       if (XEiJ.EFA_SEPARATE_AR) {
 19807:         M68kException.m6eIncremented -= 2L << (0 << 3);
 19808:         return XEiJ.regRn[ 8] -= 2;
 19809:       }
 19810:       //fallthrough
 19811:     case 0b100_001:  //-(A1)
 19812:       if (XEiJ.EFA_SEPARATE_AR) {
 19813:         M68kException.m6eIncremented -= 2L << (1 << 3);
 19814:         return XEiJ.regRn[ 9] -= 2;
 19815:       }
 19816:       //fallthrough
 19817:     case 0b100_010:  //-(A2)
 19818:       if (XEiJ.EFA_SEPARATE_AR) {
 19819:         M68kException.m6eIncremented -= 2L << (2 << 3);
 19820:         return XEiJ.regRn[10] -= 2;
 19821:       }
 19822:       //fallthrough
 19823:     case 0b100_011:  //-(A3)
 19824:       if (XEiJ.EFA_SEPARATE_AR) {
 19825:         M68kException.m6eIncremented -= 2L << (3 << 3);
 19826:         return XEiJ.regRn[11] -= 2;
 19827:       }
 19828:       //fallthrough
 19829:     case 0b100_100:  //-(A4)
 19830:       if (XEiJ.EFA_SEPARATE_AR) {
 19831:         M68kException.m6eIncremented -= 2L << (4 << 3);
 19832:         return XEiJ.regRn[12] -= 2;
 19833:       }
 19834:       //fallthrough
 19835:     case 0b100_101:  //-(A5)
 19836:       if (XEiJ.EFA_SEPARATE_AR) {
 19837:         M68kException.m6eIncremented -= 2L << (5 << 3);
 19838:         return XEiJ.regRn[13] -= 2;
 19839:       }
 19840:       //fallthrough
 19841:     case 0b100_110:  //-(A6)
 19842:       if (XEiJ.EFA_SEPARATE_AR) {
 19843:         M68kException.m6eIncremented -= 2L << (6 << 3);
 19844:         return XEiJ.regRn[14] -= 2;
 19845:       }
 19846:       //fallthrough
 19847:     case 0b100_111:  //-(A7)
 19848:       if (XEiJ.EFA_SEPARATE_AR) {
 19849:         M68kException.m6eIncremented -= 2L << (7 << 3);
 19850:         return XEiJ.regRn[15] -= 2;
 19851:       } else {
 19852:         M68kException.m6eIncremented -= 2L << ((ea & 7) << 3);
 19853:         return XEiJ.regRn[ea - (0b100_000 - 8)] -= 2;
 19854:       }
 19855:     case 0b101_000:  //(d16,A0)
 19856:     case 0b101_001:  //(d16,A1)
 19857:     case 0b101_010:  //(d16,A2)
 19858:     case 0b101_011:  //(d16,A3)
 19859:     case 0b101_100:  //(d16,A4)
 19860:     case 0b101_101:  //(d16,A5)
 19861:     case 0b101_110:  //(d16,A6)
 19862:     case 0b101_111:  //(d16,A7)
 19863:       if (XEiJ.MPU_COMPOUND_POSTINCREMENT) {
 19864:         return (XEiJ.regRn[ea - (0b101_000 - 8)]  //ベースレジスタ
 19865:                 + mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS));  //pcws。ワードディスプレースメント
 19866:       } else {
 19867:         t = XEiJ.regPC;
 19868:         XEiJ.regPC = t + 2;
 19869:         return (XEiJ.regRn[ea - (0b101_000 - 8)]  //ベースレジスタ
 19870:                 + mmuReadWordSignExword (t, XEiJ.regSRS));  //pcws。ワードディスプレースメント
 19871:       }
 19872:     case 0b110_000:  //(d8,A0,Rn.wl)
 19873:     case 0b110_001:  //(d8,A1,Rn.wl)
 19874:     case 0b110_010:  //(d8,A2,Rn.wl)
 19875:     case 0b110_011:  //(d8,A3,Rn.wl)
 19876:     case 0b110_100:  //(d8,A4,Rn.wl)
 19877:     case 0b110_101:  //(d8,A5,Rn.wl)
 19878:     case 0b110_110:  //(d8,A6,Rn.wl)
 19879:     case 0b110_111:  //(d8,A7,Rn.wl)
 19880:       if (XEiJ.MPU_COMPOUND_POSTINCREMENT) {
 19881:         w = mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);  //pcwz。拡張ワード
 19882:       } else {
 19883:         w = XEiJ.regPC;
 19884:         XEiJ.regPC = w + 2;
 19885:         w = mmuReadWordZeroExword (w, XEiJ.regSRS);  //pcwz。拡張ワード
 19886:       }
 19887:       if (w << 31 - 8 < 0) {  //フルフォーマット
 19888:         XEiJ.mpuCycleCount += w << -2 == 0 ? 1 : 3;  //メモリ間接なし:メモリ間接あり
 19889:       }
 19890:       t = (((~w & 0x0180) == 0 ? 0 :  //ベースレジスタサプレス
 19891:             XEiJ.regRn[ea - (0b110_000 - 8)])  //ベースレジスタ
 19892:            + (w << 31 - 8 >= 0 ? (byte) w :  //バイトディスプレースメント
 19893:               w << 31 - 5 >= 0 ? 0 :  //ヌルベースディスプレースメント
 19894:               w << 31 - 4 >= 0 ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) :  //pcws。ワードベースディスプレースメント
 19895:               mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS)));  //pcls。ロングベースディスプレースメント
 19896:       x = ((~w & 0x0140) == 0 ? 0 :  //インデックスサプレス
 19897:            (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] :  //ワードインデックス
 19898:             XEiJ.regRn[w >> 12])  //ロングインデックス
 19899:            << (w >> 9 & 3));  //スケールファクタ。ワードインデックスのときは符号拡張してから掛ける
 19900:       return ((w & 0x0103) <= 0x0100 ? t + x :  //メモリ間接なし
 19901:               ((XEiJ.TEST_BIT_2_SHIFT ? w << 31 - 2 >= 0 : (w & 4) == 0) ? mmuReadLongData (t + x, XEiJ.regSRS) :  //プリインデックス
 19902:                mmuReadLongData (t, XEiJ.regSRS) + x)  //ポストインデックス
 19903:               + ((XEiJ.TEST_BIT_1_SHIFT ? w << 31 - 1 >= 0 : (w & 2) == 0) ? 0 :  //ヌルアウタディスプレースメント
 19904:                  (XEiJ.TEST_BIT_0_SHIFT ? w << 31 - 0 >= 0 : (w & 1) == 0) ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) :  //pcws。ワードアウタディスプレースメント
 19905:                  mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS)));  //pcls。ロングアウタディスプレースメント
 19906:     case 0b111_000:  //(xxx).W
 19907:       return mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);  //pcws
 19908:     case 0b111_001:  //(xxx).L
 19909:       return mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS);  //pcls
 19910:     }  //switch
 19911:     M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION;
 19912:     throw M68kException.m6eSignal;
 19913:   }  //efaMltWord
 19914: 
 19915:   //a = efaCntWord (ea)  //|  M  WXZP |
 19916:   //  制御モードのワードオペランドの実効アドレスを求める
 19917:   //  efaMemWordとの違いは(Ar)+と-(Ar)がないこと
 19918:   @SuppressWarnings ("fallthrough") public static int efaCntWord (int ea) throws M68kException {
 19919:     int t, w, x;
 19920:     switch (ea) {
 19921:     case 0b010_000:  //(A0)
 19922:       if (XEiJ.EFA_SEPARATE_AR) {
 19923:         return XEiJ.regRn[ 8];
 19924:       }
 19925:       //fallthrough
 19926:     case 0b010_001:  //(A1)
 19927:       if (XEiJ.EFA_SEPARATE_AR) {
 19928:         return XEiJ.regRn[ 9];
 19929:       }
 19930:       //fallthrough
 19931:     case 0b010_010:  //(A2)
 19932:       if (XEiJ.EFA_SEPARATE_AR) {
 19933:         return XEiJ.regRn[10];
 19934:       }
 19935:       //fallthrough
 19936:     case 0b010_011:  //(A3)
 19937:       if (XEiJ.EFA_SEPARATE_AR) {
 19938:         return XEiJ.regRn[11];
 19939:       }
 19940:       //fallthrough
 19941:     case 0b010_100:  //(A4)
 19942:       if (XEiJ.EFA_SEPARATE_AR) {
 19943:         return XEiJ.regRn[12];
 19944:       }
 19945:       //fallthrough
 19946:     case 0b010_101:  //(A5)
 19947:       if (XEiJ.EFA_SEPARATE_AR) {
 19948:         return XEiJ.regRn[13];
 19949:       }
 19950:       //fallthrough
 19951:     case 0b010_110:  //(A6)
 19952:       if (XEiJ.EFA_SEPARATE_AR) {
 19953:         return XEiJ.regRn[14];
 19954:       }
 19955:       //fallthrough
 19956:     case 0b010_111:  //(A7)
 19957:       if (XEiJ.EFA_SEPARATE_AR) {
 19958:         return XEiJ.regRn[15];
 19959:       } else {
 19960:         return XEiJ.regRn[ea - (0b010_000 - 8)];
 19961:       }
 19962:     case 0b101_000:  //(d16,A0)
 19963:     case 0b101_001:  //(d16,A1)
 19964:     case 0b101_010:  //(d16,A2)
 19965:     case 0b101_011:  //(d16,A3)
 19966:     case 0b101_100:  //(d16,A4)
 19967:     case 0b101_101:  //(d16,A5)
 19968:     case 0b101_110:  //(d16,A6)
 19969:     case 0b101_111:  //(d16,A7)
 19970:       if (XEiJ.MPU_COMPOUND_POSTINCREMENT) {
 19971:         return (XEiJ.regRn[ea - (0b101_000 - 8)]  //ベースレジスタ
 19972:                 + mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS));  //pcws。ワードディスプレースメント
 19973:       } else {
 19974:         t = XEiJ.regPC;
 19975:         XEiJ.regPC = t + 2;
 19976:         return (XEiJ.regRn[ea - (0b101_000 - 8)]  //ベースレジスタ
 19977:                 + mmuReadWordSignExword (t, XEiJ.regSRS));  //pcws。ワードディスプレースメント
 19978:       }
 19979:     case 0b110_000:  //(d8,A0,Rn.wl)
 19980:     case 0b110_001:  //(d8,A1,Rn.wl)
 19981:     case 0b110_010:  //(d8,A2,Rn.wl)
 19982:     case 0b110_011:  //(d8,A3,Rn.wl)
 19983:     case 0b110_100:  //(d8,A4,Rn.wl)
 19984:     case 0b110_101:  //(d8,A5,Rn.wl)
 19985:     case 0b110_110:  //(d8,A6,Rn.wl)
 19986:     case 0b110_111:  //(d8,A7,Rn.wl)
 19987:       if (XEiJ.MPU_COMPOUND_POSTINCREMENT) {
 19988:         w = mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);  //pcwz。拡張ワード
 19989:       } else {
 19990:         w = XEiJ.regPC;
 19991:         XEiJ.regPC = w + 2;
 19992:         w = mmuReadWordZeroExword (w, XEiJ.regSRS);  //pcwz。拡張ワード
 19993:       }
 19994:       if (w << 31 - 8 < 0) {  //フルフォーマット
 19995:         XEiJ.mpuCycleCount += w << -2 == 0 ? 1 : 3;  //メモリ間接なし:メモリ間接あり
 19996:       }
 19997:       t = (((~w & 0x0180) == 0 ? 0 :  //ベースレジスタサプレス
 19998:             XEiJ.regRn[ea - (0b110_000 - 8)])  //ベースレジスタ
 19999:            + (w << 31 - 8 >= 0 ? (byte) w :  //バイトディスプレースメント
 20000:               w << 31 - 5 >= 0 ? 0 :  //ヌルベースディスプレースメント
 20001:               w << 31 - 4 >= 0 ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) :  //pcws。ワードベースディスプレースメント
 20002:               mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS)));  //pcls。ロングベースディスプレースメント
 20003:       x = ((~w & 0x0140) == 0 ? 0 :  //インデックスサプレス
 20004:            (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] :  //ワードインデックス
 20005:             XEiJ.regRn[w >> 12])  //ロングインデックス
 20006:            << (w >> 9 & 3));  //スケールファクタ。ワードインデックスのときは符号拡張してから掛ける
 20007:       return ((w & 0x0103) <= 0x0100 ? t + x :  //メモリ間接なし
 20008:               ((XEiJ.TEST_BIT_2_SHIFT ? w << 31 - 2 >= 0 : (w & 4) == 0) ? mmuReadLongData (t + x, XEiJ.regSRS) :  //プリインデックス
 20009:                mmuReadLongData (t, XEiJ.regSRS) + x)  //ポストインデックス
 20010:               + ((XEiJ.TEST_BIT_1_SHIFT ? w << 31 - 1 >= 0 : (w & 2) == 0) ? 0 :  //ヌルアウタディスプレースメント
 20011:                  (XEiJ.TEST_BIT_0_SHIFT ? w << 31 - 0 >= 0 : (w & 1) == 0) ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) :  //pcws。ワードアウタディスプレースメント
 20012:                  mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS)));  //pcls。ロングアウタディスプレースメント
 20013:     case 0b111_000:  //(xxx).W
 20014:       return mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);  //pcws
 20015:     case 0b111_001:  //(xxx).L
 20016:       return mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS);  //pcls
 20017:     case 0b111_010:  //(d16,PC)
 20018:       t = XEiJ.regPC;
 20019:       XEiJ.regPC = t + 2;
 20020:       return (t  //ベースレジスタ
 20021:               + mmuReadWordSignExword (t, XEiJ.regSRS));  //pcws。ワードディスプレースメント
 20022:     case 0b111_011:  //(d8,PC,Rn.wl)
 20023:       t = XEiJ.regPC;
 20024:       XEiJ.regPC = t + 2;
 20025:       w = mmuReadWordZeroExword (t, XEiJ.regSRS);  //pcwz。拡張ワード
 20026:       if (w << 31 - 8 < 0) {  //フルフォーマット
 20027:         XEiJ.mpuCycleCount += w << -2 == 0 ? 1 : 3;  //メモリ間接なし:メモリ間接あり
 20028:       }
 20029:       t = (((~w & 0x0180) == 0 ? 0 :  //ベースレジスタサプレス
 20030:             t)  //ベースレジスタ
 20031:            + (w << 31 - 8 >= 0 ? (byte) w :  //バイトディスプレースメント
 20032:               w << 31 - 5 >= 0 ? 0 :  //ヌルベースディスプレースメント
 20033:               w << 31 - 4 >= 0 ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) :  //pcws。ワードベースディスプレースメント
 20034:               mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS)));  //pcls。ロングベースディスプレースメント
 20035:       x = ((~w & 0x0140) == 0 ? 0 :  //インデックスサプレス
 20036:            (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] :  //ワードインデックス
 20037:             XEiJ.regRn[w >> 12])  //ロングインデックス
 20038:            << (w >> 9 & 3));  //スケールファクタ。ワードインデックスのときは符号拡張してから掛ける
 20039:       return ((w & 0x0103) <= 0x0100 ? t + x :  //メモリ間接なし
 20040:               ((XEiJ.TEST_BIT_2_SHIFT ? w << 31 - 2 >= 0 : (w & 4) == 0) ? mmuReadLongData (t + x, XEiJ.regSRS) :  //プリインデックス
 20041:                mmuReadLongData (t, XEiJ.regSRS) + x)  //ポストインデックス
 20042:               + ((XEiJ.TEST_BIT_1_SHIFT ? w << 31 - 1 >= 0 : (w & 2) == 0) ? 0 :  //ヌルアウタディスプレースメント
 20043:                  (XEiJ.TEST_BIT_0_SHIFT ? w << 31 - 0 >= 0 : (w & 1) == 0) ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) :  //pcws。ワードアウタディスプレースメント
 20044:                  mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS)));  //pcls。ロングアウタディスプレースメント
 20045:     }  //switch
 20046:     M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION;
 20047:     throw M68kException.m6eSignal;
 20048:   }  //efaCntWord
 20049: 
 20050:   //a = efaCltWord (ea)  //|  M  WXZ  |
 20051:   //  制御可変モードのワードオペランドの実効アドレスを求める
 20052:   //  efaCntWordとの違いは(d16,PC)と(d8,PC,Rn.wl)がないこと
 20053:   @SuppressWarnings ("fallthrough") public static int efaCltWord (int ea) throws M68kException {
 20054:     int t, w, x;
 20055:     switch (ea) {
 20056:     case 0b010_000:  //(A0)
 20057:       if (XEiJ.EFA_SEPARATE_AR) {
 20058:         return XEiJ.regRn[ 8];
 20059:       }
 20060:       //fallthrough
 20061:     case 0b010_001:  //(A1)
 20062:       if (XEiJ.EFA_SEPARATE_AR) {
 20063:         return XEiJ.regRn[ 9];
 20064:       }
 20065:       //fallthrough
 20066:     case 0b010_010:  //(A2)
 20067:       if (XEiJ.EFA_SEPARATE_AR) {
 20068:         return XEiJ.regRn[10];
 20069:       }
 20070:       //fallthrough
 20071:     case 0b010_011:  //(A3)
 20072:       if (XEiJ.EFA_SEPARATE_AR) {
 20073:         return XEiJ.regRn[11];
 20074:       }
 20075:       //fallthrough
 20076:     case 0b010_100:  //(A4)
 20077:       if (XEiJ.EFA_SEPARATE_AR) {
 20078:         return XEiJ.regRn[12];
 20079:       }
 20080:       //fallthrough
 20081:     case 0b010_101:  //(A5)
 20082:       if (XEiJ.EFA_SEPARATE_AR) {
 20083:         return XEiJ.regRn[13];
 20084:       }
 20085:       //fallthrough
 20086:     case 0b010_110:  //(A6)
 20087:       if (XEiJ.EFA_SEPARATE_AR) {
 20088:         return XEiJ.regRn[14];
 20089:       }
 20090:       //fallthrough
 20091:     case 0b010_111:  //(A7)
 20092:       if (XEiJ.EFA_SEPARATE_AR) {
 20093:         return XEiJ.regRn[15];
 20094:       } else {
 20095:         return XEiJ.regRn[ea - (0b010_000 - 8)];
 20096:       }
 20097:     case 0b101_000:  //(d16,A0)
 20098:     case 0b101_001:  //(d16,A1)
 20099:     case 0b101_010:  //(d16,A2)
 20100:     case 0b101_011:  //(d16,A3)
 20101:     case 0b101_100:  //(d16,A4)
 20102:     case 0b101_101:  //(d16,A5)
 20103:     case 0b101_110:  //(d16,A6)
 20104:     case 0b101_111:  //(d16,A7)
 20105:       if (XEiJ.MPU_COMPOUND_POSTINCREMENT) {
 20106:         return (XEiJ.regRn[ea - (0b101_000 - 8)]  //ベースレジスタ
 20107:                 + mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS));  //pcws。ワードディスプレースメント
 20108:       } else {
 20109:         t = XEiJ.regPC;
 20110:         XEiJ.regPC = t + 2;
 20111:         return (XEiJ.regRn[ea - (0b101_000 - 8)]  //ベースレジスタ
 20112:                 + mmuReadWordSignExword (t, XEiJ.regSRS));  //pcws。ワードディスプレースメント
 20113:       }
 20114:     case 0b110_000:  //(d8,A0,Rn.wl)
 20115:     case 0b110_001:  //(d8,A1,Rn.wl)
 20116:     case 0b110_010:  //(d8,A2,Rn.wl)
 20117:     case 0b110_011:  //(d8,A3,Rn.wl)
 20118:     case 0b110_100:  //(d8,A4,Rn.wl)
 20119:     case 0b110_101:  //(d8,A5,Rn.wl)
 20120:     case 0b110_110:  //(d8,A6,Rn.wl)
 20121:     case 0b110_111:  //(d8,A7,Rn.wl)
 20122:       if (XEiJ.MPU_COMPOUND_POSTINCREMENT) {
 20123:         w = mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);  //pcwz。拡張ワード
 20124:       } else {
 20125:         w = XEiJ.regPC;
 20126:         XEiJ.regPC = w + 2;
 20127:         w = mmuReadWordZeroExword (w, XEiJ.regSRS);  //pcwz。拡張ワード
 20128:       }
 20129:       if (w << 31 - 8 < 0) {  //フルフォーマット
 20130:         XEiJ.mpuCycleCount += w << -2 == 0 ? 1 : 3;  //メモリ間接なし:メモリ間接あり
 20131:       }
 20132:       t = (((~w & 0x0180) == 0 ? 0 :  //ベースレジスタサプレス
 20133:             XEiJ.regRn[ea - (0b110_000 - 8)])  //ベースレジスタ
 20134:            + (w << 31 - 8 >= 0 ? (byte) w :  //バイトディスプレースメント
 20135:               w << 31 - 5 >= 0 ? 0 :  //ヌルベースディスプレースメント
 20136:               w << 31 - 4 >= 0 ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) :  //pcws。ワードベースディスプレースメント
 20137:               mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS)));  //pcls。ロングベースディスプレースメント
 20138:       x = ((~w & 0x0140) == 0 ? 0 :  //インデックスサプレス
 20139:            (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] :  //ワードインデックス
 20140:             XEiJ.regRn[w >> 12])  //ロングインデックス
 20141:            << (w >> 9 & 3));  //スケールファクタ。ワードインデックスのときは符号拡張してから掛ける
 20142:       return ((w & 0x0103) <= 0x0100 ? t + x :  //メモリ間接なし
 20143:               ((XEiJ.TEST_BIT_2_SHIFT ? w << 31 - 2 >= 0 : (w & 4) == 0) ? mmuReadLongData (t + x, XEiJ.regSRS) :  //プリインデックス
 20144:                mmuReadLongData (t, XEiJ.regSRS) + x)  //ポストインデックス
 20145:               + ((XEiJ.TEST_BIT_1_SHIFT ? w << 31 - 1 >= 0 : (w & 2) == 0) ? 0 :  //ヌルアウタディスプレースメント
 20146:                  (XEiJ.TEST_BIT_0_SHIFT ? w << 31 - 0 >= 0 : (w & 1) == 0) ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) :  //pcws。ワードアウタディスプレースメント
 20147:                  mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS)));  //pcls。ロングアウタディスプレースメント
 20148:     case 0b111_000:  //(xxx).W
 20149:       return mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);  //pcws
 20150:     case 0b111_001:  //(xxx).L
 20151:       return mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS);  //pcls
 20152:     }  //switch
 20153:     M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION;
 20154:     throw M68kException.m6eSignal;
 20155:   }  //efaCltWord
 20156: 
 20157:   //a = efaAnyLong (ea)  //|  M+-WXZPI|
 20158:   //  任意のモードのロングオペランドの実効アドレスを求める
 20159:   //  efaAnyWordとの違いは(Ar)+と-(Ar)がArを4変化させることと、#<data>がPCを4変化させることと、
 20160:   //  オペランドのアクセスが1ワード増える分の4サイクルが追加されていること
 20161:   @SuppressWarnings ("fallthrough") public static int efaAnyLong (int ea) throws M68kException {
 20162:     int t, w, x;
 20163:     switch (ea) {
 20164:     case 0b010_000:  //(A0)
 20165:       if (XEiJ.EFA_SEPARATE_AR) {
 20166:         return XEiJ.regRn[ 8];
 20167:       }
 20168:       //fallthrough
 20169:     case 0b010_001:  //(A1)
 20170:       if (XEiJ.EFA_SEPARATE_AR) {
 20171:         return XEiJ.regRn[ 9];
 20172:       }
 20173:       //fallthrough
 20174:     case 0b010_010:  //(A2)
 20175:       if (XEiJ.EFA_SEPARATE_AR) {
 20176:         return XEiJ.regRn[10];
 20177:       }
 20178:       //fallthrough
 20179:     case 0b010_011:  //(A3)
 20180:       if (XEiJ.EFA_SEPARATE_AR) {
 20181:         return XEiJ.regRn[11];
 20182:       }
 20183:       //fallthrough
 20184:     case 0b010_100:  //(A4)
 20185:       if (XEiJ.EFA_SEPARATE_AR) {
 20186:         return XEiJ.regRn[12];
 20187:       }
 20188:       //fallthrough
 20189:     case 0b010_101:  //(A5)
 20190:       if (XEiJ.EFA_SEPARATE_AR) {
 20191:         return XEiJ.regRn[13];
 20192:       }
 20193:       //fallthrough
 20194:     case 0b010_110:  //(A6)
 20195:       if (XEiJ.EFA_SEPARATE_AR) {
 20196:         return XEiJ.regRn[14];
 20197:       }
 20198:       //fallthrough
 20199:     case 0b010_111:  //(A7)
 20200:       if (XEiJ.EFA_SEPARATE_AR) {
 20201:         return XEiJ.regRn[15];
 20202:       } else {
 20203:         return XEiJ.regRn[ea - (0b010_000 - 8)];
 20204:       }
 20205:     case 0b011_000:  //(A0)+
 20206:       if (XEiJ.EFA_SEPARATE_AR) {
 20207:         M68kException.m6eIncremented += 4L << (0 << 3);
 20208:         return (XEiJ.regRn[ 8] += 4) - 4;
 20209:       }
 20210:       //fallthrough
 20211:     case 0b011_001:  //(A1)+
 20212:       if (XEiJ.EFA_SEPARATE_AR) {
 20213:         M68kException.m6eIncremented += 4L << (1 << 3);
 20214:         return (XEiJ.regRn[ 9] += 4) - 4;
 20215:       }
 20216:       //fallthrough
 20217:     case 0b011_010:  //(A2)+
 20218:       if (XEiJ.EFA_SEPARATE_AR) {
 20219:         M68kException.m6eIncremented += 4L << (2 << 3);
 20220:         return (XEiJ.regRn[10] += 4) - 4;
 20221:       }
 20222:       //fallthrough
 20223:     case 0b011_011:  //(A3)+
 20224:       if (XEiJ.EFA_SEPARATE_AR) {
 20225:         M68kException.m6eIncremented += 4L << (3 << 3);
 20226:         return (XEiJ.regRn[11] += 4) - 4;
 20227:       }
 20228:       //fallthrough
 20229:     case 0b011_100:  //(A4)+
 20230:       if (XEiJ.EFA_SEPARATE_AR) {
 20231:         M68kException.m6eIncremented += 4L << (4 << 3);
 20232:         return (XEiJ.regRn[12] += 4) - 4;
 20233:       }
 20234:       //fallthrough
 20235:     case 0b011_101:  //(A5)+
 20236:       if (XEiJ.EFA_SEPARATE_AR) {
 20237:         M68kException.m6eIncremented += 4L << (5 << 3);
 20238:         return (XEiJ.regRn[13] += 4) - 4;
 20239:       }
 20240:       //fallthrough
 20241:     case 0b011_110:  //(A6)+
 20242:       if (XEiJ.EFA_SEPARATE_AR) {
 20243:         M68kException.m6eIncremented += 4L << (6 << 3);
 20244:         return (XEiJ.regRn[14] += 4) - 4;
 20245:       }
 20246:       //fallthrough
 20247:     case 0b011_111:  //(A7)+
 20248:       if (XEiJ.EFA_SEPARATE_AR) {
 20249:         M68kException.m6eIncremented += 4L << (7 << 3);
 20250:         return (XEiJ.regRn[15] += 4) - 4;
 20251:       } else {
 20252:         M68kException.m6eIncremented += 4L << ((ea & 7) << 3);
 20253:         return (XEiJ.regRn[ea - (0b011_000 - 8)] += 4) - 4;
 20254:       }
 20255:     case 0b100_000:  //-(A0)
 20256:       if (XEiJ.EFA_SEPARATE_AR) {
 20257:         M68kException.m6eIncremented -= 4L << (0 << 3);
 20258:         return XEiJ.regRn[ 8] -= 4;
 20259:       }
 20260:       //fallthrough
 20261:     case 0b100_001:  //-(A1)
 20262:       if (XEiJ.EFA_SEPARATE_AR) {
 20263:         M68kException.m6eIncremented -= 4L << (1 << 3);
 20264:         return XEiJ.regRn[ 9] -= 4;
 20265:       }
 20266:       //fallthrough
 20267:     case 0b100_010:  //-(A2)
 20268:       if (XEiJ.EFA_SEPARATE_AR) {
 20269:         M68kException.m6eIncremented -= 4L << (2 << 3);
 20270:         return XEiJ.regRn[10] -= 4;
 20271:       }
 20272:       //fallthrough
 20273:     case 0b100_011:  //-(A3)
 20274:       if (XEiJ.EFA_SEPARATE_AR) {
 20275:         M68kException.m6eIncremented -= 4L << (3 << 3);
 20276:         return XEiJ.regRn[11] -= 4;
 20277:       }
 20278:       //fallthrough
 20279:     case 0b100_100:  //-(A4)
 20280:       if (XEiJ.EFA_SEPARATE_AR) {
 20281:         M68kException.m6eIncremented -= 4L << (4 << 3);
 20282:         return XEiJ.regRn[12] -= 4;
 20283:       }
 20284:       //fallthrough
 20285:     case 0b100_101:  //-(A5)
 20286:       if (XEiJ.EFA_SEPARATE_AR) {
 20287:         M68kException.m6eIncremented -= 4L << (5 << 3);
 20288:         return XEiJ.regRn[13] -= 4;
 20289:       }
 20290:       //fallthrough
 20291:     case 0b100_110:  //-(A6)
 20292:       if (XEiJ.EFA_SEPARATE_AR) {
 20293:         M68kException.m6eIncremented -= 4L << (6 << 3);
 20294:         return XEiJ.regRn[14] -= 4;
 20295:       }
 20296:       //fallthrough
 20297:     case 0b100_111:  //-(A7)
 20298:       if (XEiJ.EFA_SEPARATE_AR) {
 20299:         M68kException.m6eIncremented -= 4L << (7 << 3);
 20300:         return XEiJ.regRn[15] -= 4;
 20301:       } else {
 20302:         M68kException.m6eIncremented -= 4L << ((ea & 7) << 3);
 20303:         return XEiJ.regRn[ea - (0b100_000 - 8)] -= 4;
 20304:       }
 20305:     case 0b101_000:  //(d16,A0)
 20306:     case 0b101_001:  //(d16,A1)
 20307:     case 0b101_010:  //(d16,A2)
 20308:     case 0b101_011:  //(d16,A3)
 20309:     case 0b101_100:  //(d16,A4)
 20310:     case 0b101_101:  //(d16,A5)
 20311:     case 0b101_110:  //(d16,A6)
 20312:     case 0b101_111:  //(d16,A7)
 20313:       if (XEiJ.MPU_COMPOUND_POSTINCREMENT) {
 20314:         return (XEiJ.regRn[ea - (0b101_000 - 8)]  //ベースレジスタ
 20315:                 + mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS));  //pcws。ワードディスプレースメント
 20316:       } else {
 20317:         t = XEiJ.regPC;
 20318:         XEiJ.regPC = t + 2;
 20319:         return (XEiJ.regRn[ea - (0b101_000 - 8)]  //ベースレジスタ
 20320:                 + mmuReadWordSignExword (t, XEiJ.regSRS));  //pcws。ワードディスプレースメント
 20321:       }
 20322:     case 0b110_000:  //(d8,A0,Rn.wl)
 20323:     case 0b110_001:  //(d8,A1,Rn.wl)
 20324:     case 0b110_010:  //(d8,A2,Rn.wl)
 20325:     case 0b110_011:  //(d8,A3,Rn.wl)
 20326:     case 0b110_100:  //(d8,A4,Rn.wl)
 20327:     case 0b110_101:  //(d8,A5,Rn.wl)
 20328:     case 0b110_110:  //(d8,A6,Rn.wl)
 20329:     case 0b110_111:  //(d8,A7,Rn.wl)
 20330:       if (XEiJ.MPU_COMPOUND_POSTINCREMENT) {
 20331:         w = mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);  //pcwz。拡張ワード
 20332:       } else {
 20333:         w = XEiJ.regPC;
 20334:         XEiJ.regPC = w + 2;
 20335:         w = mmuReadWordZeroExword (w, XEiJ.regSRS);  //pcwz。拡張ワード
 20336:       }
 20337:       if (w << 31 - 8 < 0) {  //フルフォーマット
 20338:         XEiJ.mpuCycleCount += w << -2 == 0 ? 1 : 3;  //メモリ間接なし:メモリ間接あり
 20339:       }
 20340:       t = (((~w & 0x0180) == 0 ? 0 :  //ベースレジスタサプレス
 20341:             XEiJ.regRn[ea - (0b110_000 - 8)])  //ベースレジスタ
 20342:            + (w << 31 - 8 >= 0 ? (byte) w :  //バイトディスプレースメント
 20343:               w << 31 - 5 >= 0 ? 0 :  //ヌルベースディスプレースメント
 20344:               w << 31 - 4 >= 0 ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) :  //pcws。ワードベースディスプレースメント
 20345:               mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS)));  //pcls。ロングベースディスプレースメント
 20346:       x = ((~w & 0x0140) == 0 ? 0 :  //インデックスサプレス
 20347:            (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] :  //ワードインデックス
 20348:             XEiJ.regRn[w >> 12])  //ロングインデックス
 20349:            << (w >> 9 & 3));  //スケールファクタ。ワードインデックスのときは符号拡張してから掛ける
 20350:       return ((w & 0x0103) <= 0x0100 ? t + x :  //メモリ間接なし
 20351:               ((XEiJ.TEST_BIT_2_SHIFT ? w << 31 - 2 >= 0 : (w & 4) == 0) ? mmuReadLongData (t + x, XEiJ.regSRS) :  //プリインデックス
 20352:                mmuReadLongData (t, XEiJ.regSRS) + x)  //ポストインデックス
 20353:               + ((XEiJ.TEST_BIT_1_SHIFT ? w << 31 - 1 >= 0 : (w & 2) == 0) ? 0 :  //ヌルアウタディスプレースメント
 20354:                  (XEiJ.TEST_BIT_0_SHIFT ? w << 31 - 0 >= 0 : (w & 1) == 0) ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) :  //pcws。ワードアウタディスプレースメント
 20355:                  mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS)));  //pcls。ロングアウタディスプレースメント
 20356:     case 0b111_000:  //(xxx).W
 20357:       return mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);  //pcws
 20358:     case 0b111_001:  //(xxx).L
 20359:       return mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS);  //pcls
 20360:     case 0b111_010:  //(d16,PC)
 20361:       t = XEiJ.regPC;
 20362:       XEiJ.regPC = t + 2;
 20363:       return (t  //ベースレジスタ
 20364:               + mmuReadWordSignExword (t, XEiJ.regSRS));  //pcws。ワードディスプレースメント
 20365:     case 0b111_011:  //(d8,PC,Rn.wl)
 20366:       t = XEiJ.regPC;
 20367:       XEiJ.regPC = t + 2;
 20368:       w = mmuReadWordZeroExword (t, XEiJ.regSRS);  //pcwz。拡張ワード
 20369:       if (w << 31 - 8 < 0) {  //フルフォーマット
 20370:         XEiJ.mpuCycleCount += w << -2 == 0 ? 1 : 3;  //メモリ間接なし:メモリ間接あり
 20371:       }
 20372:       t = (((~w & 0x0180) == 0 ? 0 :  //ベースレジスタサプレス
 20373:             t)  //ベースレジスタ
 20374:            + (w << 31 - 8 >= 0 ? (byte) w :  //バイトディスプレースメント
 20375:               w << 31 - 5 >= 0 ? 0 :  //ヌルベースディスプレースメント
 20376:               w << 31 - 4 >= 0 ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) :  //pcws。ワードベースディスプレースメント
 20377:               mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS)));  //pcls。ロングベースディスプレースメント
 20378:       x = ((~w & 0x0140) == 0 ? 0 :  //インデックスサプレス
 20379:            (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] :  //ワードインデックス
 20380:             XEiJ.regRn[w >> 12])  //ロングインデックス
 20381:            << (w >> 9 & 3));  //スケールファクタ。ワードインデックスのときは符号拡張してから掛ける
 20382:       return ((w & 0x0103) <= 0x0100 ? t + x :  //メモリ間接なし
 20383:               ((XEiJ.TEST_BIT_2_SHIFT ? w << 31 - 2 >= 0 : (w & 4) == 0) ? mmuReadLongData (t + x, XEiJ.regSRS) :  //プリインデックス
 20384:                mmuReadLongData (t, XEiJ.regSRS) + x)  //ポストインデックス
 20385:               + ((XEiJ.TEST_BIT_1_SHIFT ? w << 31 - 1 >= 0 : (w & 2) == 0) ? 0 :  //ヌルアウタディスプレースメント
 20386:                  (XEiJ.TEST_BIT_0_SHIFT ? w << 31 - 0 >= 0 : (w & 1) == 0) ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) :  //pcws。ワードアウタディスプレースメント
 20387:                  mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS)));  //pcls。ロングアウタディスプレースメント
 20388:     case 0b111_100:  //#<data>
 20389:       if (XEiJ.MPU_COMPOUND_POSTINCREMENT) {
 20390:         return (XEiJ.regPC += 4) - 4;
 20391:       } else {
 20392:         t = XEiJ.regPC;
 20393:         XEiJ.regPC = t + 4;
 20394:         return t;
 20395:       }
 20396:     }  //switch
 20397:     M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION;
 20398:     throw M68kException.m6eSignal;
 20399:   }  //efaAnyLong
 20400: 
 20401:   //a = efaMemLong (ea)  //|  M+-WXZP |
 20402:   //  メモリモードのロングオペランドの実効アドレスを求める
 20403:   //  efaAnyLongとの違いは#<data>がないこと
 20404:   @SuppressWarnings ("fallthrough") public static int efaMemLong (int ea) throws M68kException {
 20405:     int t, w, x;
 20406:     switch (ea) {
 20407:     case 0b010_000:  //(A0)
 20408:       if (XEiJ.EFA_SEPARATE_AR) {
 20409:         return XEiJ.regRn[ 8];
 20410:       }
 20411:       //fallthrough
 20412:     case 0b010_001:  //(A1)
 20413:       if (XEiJ.EFA_SEPARATE_AR) {
 20414:         return XEiJ.regRn[ 9];
 20415:       }
 20416:       //fallthrough
 20417:     case 0b010_010:  //(A2)
 20418:       if (XEiJ.EFA_SEPARATE_AR) {
 20419:         return XEiJ.regRn[10];
 20420:       }
 20421:       //fallthrough
 20422:     case 0b010_011:  //(A3)
 20423:       if (XEiJ.EFA_SEPARATE_AR) {
 20424:         return XEiJ.regRn[11];
 20425:       }
 20426:       //fallthrough
 20427:     case 0b010_100:  //(A4)
 20428:       if (XEiJ.EFA_SEPARATE_AR) {
 20429:         return XEiJ.regRn[12];
 20430:       }
 20431:       //fallthrough
 20432:     case 0b010_101:  //(A5)
 20433:       if (XEiJ.EFA_SEPARATE_AR) {
 20434:         return XEiJ.regRn[13];
 20435:       }
 20436:       //fallthrough
 20437:     case 0b010_110:  //(A6)
 20438:       if (XEiJ.EFA_SEPARATE_AR) {
 20439:         return XEiJ.regRn[14];
 20440:       }
 20441:       //fallthrough
 20442:     case 0b010_111:  //(A7)
 20443:       if (XEiJ.EFA_SEPARATE_AR) {
 20444:         return XEiJ.regRn[15];
 20445:       } else {
 20446:         return XEiJ.regRn[ea - (0b010_000 - 8)];
 20447:       }
 20448:     case 0b011_000:  //(A0)+
 20449:       if (XEiJ.EFA_SEPARATE_AR) {
 20450:         M68kException.m6eIncremented += 4L << (0 << 3);
 20451:         return (XEiJ.regRn[ 8] += 4) - 4;
 20452:       }
 20453:       //fallthrough
 20454:     case 0b011_001:  //(A1)+
 20455:       if (XEiJ.EFA_SEPARATE_AR) {
 20456:         M68kException.m6eIncremented += 4L << (1 << 3);
 20457:         return (XEiJ.regRn[ 9] += 4) - 4;
 20458:       }
 20459:       //fallthrough
 20460:     case 0b011_010:  //(A2)+
 20461:       if (XEiJ.EFA_SEPARATE_AR) {
 20462:         M68kException.m6eIncremented += 4L << (2 << 3);
 20463:         return (XEiJ.regRn[10] += 4) - 4;
 20464:       }
 20465:       //fallthrough
 20466:     case 0b011_011:  //(A3)+
 20467:       if (XEiJ.EFA_SEPARATE_AR) {
 20468:         M68kException.m6eIncremented += 4L << (3 << 3);
 20469:         return (XEiJ.regRn[11] += 4) - 4;
 20470:       }
 20471:       //fallthrough
 20472:     case 0b011_100:  //(A4)+
 20473:       if (XEiJ.EFA_SEPARATE_AR) {
 20474:         M68kException.m6eIncremented += 4L << (4 << 3);
 20475:         return (XEiJ.regRn[12] += 4) - 4;
 20476:       }
 20477:       //fallthrough
 20478:     case 0b011_101:  //(A5)+
 20479:       if (XEiJ.EFA_SEPARATE_AR) {
 20480:         M68kException.m6eIncremented += 4L << (5 << 3);
 20481:         return (XEiJ.regRn[13] += 4) - 4;
 20482:       }
 20483:       //fallthrough
 20484:     case 0b011_110:  //(A6)+
 20485:       if (XEiJ.EFA_SEPARATE_AR) {
 20486:         M68kException.m6eIncremented += 4L << (6 << 3);
 20487:         return (XEiJ.regRn[14] += 4) - 4;
 20488:       }
 20489:       //fallthrough
 20490:     case 0b011_111:  //(A7)+
 20491:       if (XEiJ.EFA_SEPARATE_AR) {
 20492:         M68kException.m6eIncremented += 4L << (7 << 3);
 20493:         return (XEiJ.regRn[15] += 4) - 4;
 20494:       } else {
 20495:         M68kException.m6eIncremented += 4L << ((ea & 7) << 3);
 20496:         return (XEiJ.regRn[ea - (0b011_000 - 8)] += 4) - 4;
 20497:       }
 20498:     case 0b100_000:  //-(A0)
 20499:       if (XEiJ.EFA_SEPARATE_AR) {
 20500:         M68kException.m6eIncremented -= 4L << (0 << 3);
 20501:         return XEiJ.regRn[ 8] -= 4;
 20502:       }
 20503:       //fallthrough
 20504:     case 0b100_001:  //-(A1)
 20505:       if (XEiJ.EFA_SEPARATE_AR) {
 20506:         M68kException.m6eIncremented -= 4L << (1 << 3);
 20507:         return XEiJ.regRn[ 9] -= 4;
 20508:       }
 20509:       //fallthrough
 20510:     case 0b100_010:  //-(A2)
 20511:       if (XEiJ.EFA_SEPARATE_AR) {
 20512:         M68kException.m6eIncremented -= 4L << (2 << 3);
 20513:         return XEiJ.regRn[10] -= 4;
 20514:       }
 20515:       //fallthrough
 20516:     case 0b100_011:  //-(A3)
 20517:       if (XEiJ.EFA_SEPARATE_AR) {
 20518:         M68kException.m6eIncremented -= 4L << (3 << 3);
 20519:         return XEiJ.regRn[11] -= 4;
 20520:       }
 20521:       //fallthrough
 20522:     case 0b100_100:  //-(A4)
 20523:       if (XEiJ.EFA_SEPARATE_AR) {
 20524:         M68kException.m6eIncremented -= 4L << (4 << 3);
 20525:         return XEiJ.regRn[12] -= 4;
 20526:       }
 20527:       //fallthrough
 20528:     case 0b100_101:  //-(A5)
 20529:       if (XEiJ.EFA_SEPARATE_AR) {
 20530:         M68kException.m6eIncremented -= 4L << (5 << 3);
 20531:         return XEiJ.regRn[13] -= 4;
 20532:       }
 20533:       //fallthrough
 20534:     case 0b100_110:  //-(A6)
 20535:       if (XEiJ.EFA_SEPARATE_AR) {
 20536:         M68kException.m6eIncremented -= 4L << (6 << 3);
 20537:         return XEiJ.regRn[14] -= 4;
 20538:       }
 20539:       //fallthrough
 20540:     case 0b100_111:  //-(A7)
 20541:       if (XEiJ.EFA_SEPARATE_AR) {
 20542:         M68kException.m6eIncremented -= 4L << (7 << 3);
 20543:         return XEiJ.regRn[15] -= 4;
 20544:       } else {
 20545:         M68kException.m6eIncremented -= 4L << ((ea & 7) << 3);
 20546:         return XEiJ.regRn[ea - (0b100_000 - 8)] -= 4;
 20547:       }
 20548:     case 0b101_000:  //(d16,A0)
 20549:     case 0b101_001:  //(d16,A1)
 20550:     case 0b101_010:  //(d16,A2)
 20551:     case 0b101_011:  //(d16,A3)
 20552:     case 0b101_100:  //(d16,A4)
 20553:     case 0b101_101:  //(d16,A5)
 20554:     case 0b101_110:  //(d16,A6)
 20555:     case 0b101_111:  //(d16,A7)
 20556:       if (XEiJ.MPU_COMPOUND_POSTINCREMENT) {
 20557:         return (XEiJ.regRn[ea - (0b101_000 - 8)]  //ベースレジスタ
 20558:                 + mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS));  //pcws。ワードディスプレースメント
 20559:       } else {
 20560:         t = XEiJ.regPC;
 20561:         XEiJ.regPC = t + 2;
 20562:         return (XEiJ.regRn[ea - (0b101_000 - 8)]  //ベースレジスタ
 20563:                 + mmuReadWordSignExword (t, XEiJ.regSRS));  //pcws。ワードディスプレースメント
 20564:       }
 20565:     case 0b110_000:  //(d8,A0,Rn.wl)
 20566:     case 0b110_001:  //(d8,A1,Rn.wl)
 20567:     case 0b110_010:  //(d8,A2,Rn.wl)
 20568:     case 0b110_011:  //(d8,A3,Rn.wl)
 20569:     case 0b110_100:  //(d8,A4,Rn.wl)
 20570:     case 0b110_101:  //(d8,A5,Rn.wl)
 20571:     case 0b110_110:  //(d8,A6,Rn.wl)
 20572:     case 0b110_111:  //(d8,A7,Rn.wl)
 20573:       if (XEiJ.MPU_COMPOUND_POSTINCREMENT) {
 20574:         w = mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);  //pcwz。拡張ワード
 20575:       } else {
 20576:         w = XEiJ.regPC;
 20577:         XEiJ.regPC = w + 2;
 20578:         w = mmuReadWordZeroExword (w, XEiJ.regSRS);  //pcwz。拡張ワード
 20579:       }
 20580:       if (w << 31 - 8 < 0) {  //フルフォーマット
 20581:         XEiJ.mpuCycleCount += w << -2 == 0 ? 1 : 3;  //メモリ間接なし:メモリ間接あり
 20582:       }
 20583:       t = (((~w & 0x0180) == 0 ? 0 :  //ベースレジスタサプレス
 20584:             XEiJ.regRn[ea - (0b110_000 - 8)])  //ベースレジスタ
 20585:            + (w << 31 - 8 >= 0 ? (byte) w :  //バイトディスプレースメント
 20586:               w << 31 - 5 >= 0 ? 0 :  //ヌルベースディスプレースメント
 20587:               w << 31 - 4 >= 0 ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) :  //pcws。ワードベースディスプレースメント
 20588:               mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS)));  //pcls。ロングベースディスプレースメント
 20589:       x = ((~w & 0x0140) == 0 ? 0 :  //インデックスサプレス
 20590:            (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] :  //ワードインデックス
 20591:             XEiJ.regRn[w >> 12])  //ロングインデックス
 20592:            << (w >> 9 & 3));  //スケールファクタ。ワードインデックスのときは符号拡張してから掛ける
 20593:       return ((w & 0x0103) <= 0x0100 ? t + x :  //メモリ間接なし
 20594:               ((XEiJ.TEST_BIT_2_SHIFT ? w << 31 - 2 >= 0 : (w & 4) == 0) ? mmuReadLongData (t + x, XEiJ.regSRS) :  //プリインデックス
 20595:                mmuReadLongData (t, XEiJ.regSRS) + x)  //ポストインデックス
 20596:               + ((XEiJ.TEST_BIT_1_SHIFT ? w << 31 - 1 >= 0 : (w & 2) == 0) ? 0 :  //ヌルアウタディスプレースメント
 20597:                  (XEiJ.TEST_BIT_0_SHIFT ? w << 31 - 0 >= 0 : (w & 1) == 0) ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) :  //pcws。ワードアウタディスプレースメント
 20598:                  mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS)));  //pcls。ロングアウタディスプレースメント
 20599:     case 0b111_000:  //(xxx).W
 20600:       return mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);  //pcws
 20601:     case 0b111_001:  //(xxx).L
 20602:       return mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS);  //pcls
 20603:     case 0b111_010:  //(d16,PC)
 20604:       t = XEiJ.regPC;
 20605:       XEiJ.regPC = t + 2;
 20606:       return (t  //ベースレジスタ
 20607:               + mmuReadWordSignExword (t, XEiJ.regSRS));  //pcws。ワードディスプレースメント
 20608:     case 0b111_011:  //(d8,PC,Rn.wl)
 20609:       t = XEiJ.regPC;
 20610:       XEiJ.regPC = t + 2;
 20611:       w = mmuReadWordZeroExword (t, XEiJ.regSRS);  //pcwz。拡張ワード
 20612:       if (w << 31 - 8 < 0) {  //フルフォーマット
 20613:         XEiJ.mpuCycleCount += w << -2 == 0 ? 1 : 3;  //メモリ間接なし:メモリ間接あり
 20614:       }
 20615:       t = (((~w & 0x0180) == 0 ? 0 :  //ベースレジスタサプレス
 20616:             t)  //ベースレジスタ
 20617:            + (w << 31 - 8 >= 0 ? (byte) w :  //バイトディスプレースメント
 20618:               w << 31 - 5 >= 0 ? 0 :  //ヌルベースディスプレースメント
 20619:               w << 31 - 4 >= 0 ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) :  //pcws。ワードベースディスプレースメント
 20620:               mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS)));  //pcls。ロングベースディスプレースメント
 20621:       x = ((~w & 0x0140) == 0 ? 0 :  //インデックスサプレス
 20622:            (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] :  //ワードインデックス
 20623:             XEiJ.regRn[w >> 12])  //ロングインデックス
 20624:            << (w >> 9 & 3));  //スケールファクタ。ワードインデックスのときは符号拡張してから掛ける
 20625:       return ((w & 0x0103) <= 0x0100 ? t + x :  //メモリ間接なし
 20626:               ((XEiJ.TEST_BIT_2_SHIFT ? w << 31 - 2 >= 0 : (w & 4) == 0) ? mmuReadLongData (t + x, XEiJ.regSRS) :  //プリインデックス
 20627:                mmuReadLongData (t, XEiJ.regSRS) + x)  //ポストインデックス
 20628:               + ((XEiJ.TEST_BIT_1_SHIFT ? w << 31 - 1 >= 0 : (w & 2) == 0) ? 0 :  //ヌルアウタディスプレースメント
 20629:                  (XEiJ.TEST_BIT_0_SHIFT ? w << 31 - 0 >= 0 : (w & 1) == 0) ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) :  //pcws。ワードアウタディスプレースメント
 20630:                  mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS)));  //pcls。ロングアウタディスプレースメント
 20631:     }  //switch
 20632:     M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION;
 20633:     throw M68kException.m6eSignal;
 20634:   }  //efaMemLong
 20635: 
 20636:   //a = efaMltLong (ea)  //|  M+-WXZ  |
 20637:   //  メモリ可変モードのロングオペランドの実効アドレスを求める
 20638:   //  efaMemLongとの違いは(d16,PC)と(d8,PC,Rn.wl)がないこと
 20639:   @SuppressWarnings ("fallthrough") public static int efaMltLong (int ea) throws M68kException {
 20640:     int t, w, x;
 20641:     switch (ea) {
 20642:     case 0b010_000:  //(A0)
 20643:       if (XEiJ.EFA_SEPARATE_AR) {
 20644:         return XEiJ.regRn[ 8];
 20645:       }
 20646:       //fallthrough
 20647:     case 0b010_001:  //(A1)
 20648:       if (XEiJ.EFA_SEPARATE_AR) {
 20649:         return XEiJ.regRn[ 9];
 20650:       }
 20651:       //fallthrough
 20652:     case 0b010_010:  //(A2)
 20653:       if (XEiJ.EFA_SEPARATE_AR) {
 20654:         return XEiJ.regRn[10];
 20655:       }
 20656:       //fallthrough
 20657:     case 0b010_011:  //(A3)
 20658:       if (XEiJ.EFA_SEPARATE_AR) {
 20659:         return XEiJ.regRn[11];
 20660:       }
 20661:       //fallthrough
 20662:     case 0b010_100:  //(A4)
 20663:       if (XEiJ.EFA_SEPARATE_AR) {
 20664:         return XEiJ.regRn[12];
 20665:       }
 20666:       //fallthrough
 20667:     case 0b010_101:  //(A5)
 20668:       if (XEiJ.EFA_SEPARATE_AR) {
 20669:         return XEiJ.regRn[13];
 20670:       }
 20671:       //fallthrough
 20672:     case 0b010_110:  //(A6)
 20673:       if (XEiJ.EFA_SEPARATE_AR) {
 20674:         return XEiJ.regRn[14];
 20675:       }
 20676:       //fallthrough
 20677:     case 0b010_111:  //(A7)
 20678:       if (XEiJ.EFA_SEPARATE_AR) {
 20679:         return XEiJ.regRn[15];
 20680:       } else {
 20681:         return XEiJ.regRn[ea - (0b010_000 - 8)];
 20682:       }
 20683:     case 0b011_000:  //(A0)+
 20684:       if (XEiJ.EFA_SEPARATE_AR) {
 20685:         M68kException.m6eIncremented += 4L << (0 << 3);
 20686:         return (XEiJ.regRn[ 8] += 4) - 4;
 20687:       }
 20688:       //fallthrough
 20689:     case 0b011_001:  //(A1)+
 20690:       if (XEiJ.EFA_SEPARATE_AR) {
 20691:         M68kException.m6eIncremented += 4L << (1 << 3);
 20692:         return (XEiJ.regRn[ 9] += 4) - 4;
 20693:       }
 20694:       //fallthrough
 20695:     case 0b011_010:  //(A2)+
 20696:       if (XEiJ.EFA_SEPARATE_AR) {
 20697:         M68kException.m6eIncremented += 4L << (2 << 3);
 20698:         return (XEiJ.regRn[10] += 4) - 4;
 20699:       }
 20700:       //fallthrough
 20701:     case 0b011_011:  //(A3)+
 20702:       if (XEiJ.EFA_SEPARATE_AR) {
 20703:         M68kException.m6eIncremented += 4L << (3 << 3);
 20704:         return (XEiJ.regRn[11] += 4) - 4;
 20705:       }
 20706:       //fallthrough
 20707:     case 0b011_100:  //(A4)+
 20708:       if (XEiJ.EFA_SEPARATE_AR) {
 20709:         M68kException.m6eIncremented += 4L << (4 << 3);
 20710:         return (XEiJ.regRn[12] += 4) - 4;
 20711:       }
 20712:       //fallthrough
 20713:     case 0b011_101:  //(A5)+
 20714:       if (XEiJ.EFA_SEPARATE_AR) {
 20715:         M68kException.m6eIncremented += 4L << (5 << 3);
 20716:         return (XEiJ.regRn[13] += 4) - 4;
 20717:       }
 20718:       //fallthrough
 20719:     case 0b011_110:  //(A6)+
 20720:       if (XEiJ.EFA_SEPARATE_AR) {
 20721:         M68kException.m6eIncremented += 4L << (6 << 3);
 20722:         return (XEiJ.regRn[14] += 4) - 4;
 20723:       }
 20724:       //fallthrough
 20725:     case 0b011_111:  //(A7)+
 20726:       if (XEiJ.EFA_SEPARATE_AR) {
 20727:         M68kException.m6eIncremented += 4L << (7 << 3);
 20728:         return (XEiJ.regRn[15] += 4) - 4;
 20729:       } else {
 20730:         M68kException.m6eIncremented += 4L << ((ea & 7) << 3);
 20731:         return (XEiJ.regRn[ea - (0b011_000 - 8)] += 4) - 4;
 20732:       }
 20733:     case 0b100_000:  //-(A0)
 20734:       if (XEiJ.EFA_SEPARATE_AR) {
 20735:         M68kException.m6eIncremented -= 4L << (0 << 3);
 20736:         return XEiJ.regRn[ 8] -= 4;
 20737:       }
 20738:       //fallthrough
 20739:     case 0b100_001:  //-(A1)
 20740:       if (XEiJ.EFA_SEPARATE_AR) {
 20741:         M68kException.m6eIncremented -= 4L << (1 << 3);
 20742:         return XEiJ.regRn[ 9] -= 4;
 20743:       }
 20744:       //fallthrough
 20745:     case 0b100_010:  //-(A2)
 20746:       if (XEiJ.EFA_SEPARATE_AR) {
 20747:         M68kException.m6eIncremented -= 4L << (2 << 3);
 20748:         return XEiJ.regRn[10] -= 4;
 20749:       }
 20750:       //fallthrough
 20751:     case 0b100_011:  //-(A3)
 20752:       if (XEiJ.EFA_SEPARATE_AR) {
 20753:         M68kException.m6eIncremented -= 4L << (3 << 3);
 20754:         return XEiJ.regRn[11] -= 4;
 20755:       }
 20756:       //fallthrough
 20757:     case 0b100_100:  //-(A4)
 20758:       if (XEiJ.EFA_SEPARATE_AR) {
 20759:         M68kException.m6eIncremented -= 4L << (4 << 3);
 20760:         return XEiJ.regRn[12] -= 4;
 20761:       }
 20762:       //fallthrough
 20763:     case 0b100_101:  //-(A5)
 20764:       if (XEiJ.EFA_SEPARATE_AR) {
 20765:         M68kException.m6eIncremented -= 4L << (5 << 3);
 20766:         return XEiJ.regRn[13] -= 4;
 20767:       }
 20768:       //fallthrough
 20769:     case 0b100_110:  //-(A6)
 20770:       if (XEiJ.EFA_SEPARATE_AR) {
 20771:         M68kException.m6eIncremented -= 4L << (6 << 3);
 20772:         return XEiJ.regRn[14] -= 4;
 20773:       }
 20774:       //fallthrough
 20775:     case 0b100_111:  //-(A7)
 20776:       if (XEiJ.EFA_SEPARATE_AR) {
 20777:         M68kException.m6eIncremented -= 4L << (7 << 3);
 20778:         return XEiJ.regRn[15] -= 4;
 20779:       } else {
 20780:         M68kException.m6eIncremented -= 4L << ((ea & 7) << 3);
 20781:         return XEiJ.regRn[ea - (0b100_000 - 8)] -= 4;
 20782:       }
 20783:     case 0b101_000:  //(d16,A0)
 20784:     case 0b101_001:  //(d16,A1)
 20785:     case 0b101_010:  //(d16,A2)
 20786:     case 0b101_011:  //(d16,A3)
 20787:     case 0b101_100:  //(d16,A4)
 20788:     case 0b101_101:  //(d16,A5)
 20789:     case 0b101_110:  //(d16,A6)
 20790:     case 0b101_111:  //(d16,A7)
 20791:       if (XEiJ.MPU_COMPOUND_POSTINCREMENT) {
 20792:         return (XEiJ.regRn[ea - (0b101_000 - 8)]  //ベースレジスタ
 20793:                 + mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS));  //pcws。ワードディスプレースメント
 20794:       } else {
 20795:         t = XEiJ.regPC;
 20796:         XEiJ.regPC = t + 2;
 20797:         return (XEiJ.regRn[ea - (0b101_000 - 8)]  //ベースレジスタ
 20798:                 + mmuReadWordSignExword (t, XEiJ.regSRS));  //pcws。ワードディスプレースメント
 20799:       }
 20800:     case 0b110_000:  //(d8,A0,Rn.wl)
 20801:     case 0b110_001:  //(d8,A1,Rn.wl)
 20802:     case 0b110_010:  //(d8,A2,Rn.wl)
 20803:     case 0b110_011:  //(d8,A3,Rn.wl)
 20804:     case 0b110_100:  //(d8,A4,Rn.wl)
 20805:     case 0b110_101:  //(d8,A5,Rn.wl)
 20806:     case 0b110_110:  //(d8,A6,Rn.wl)
 20807:     case 0b110_111:  //(d8,A7,Rn.wl)
 20808:       if (XEiJ.MPU_COMPOUND_POSTINCREMENT) {
 20809:         w = mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);  //pcwz。拡張ワード
 20810:       } else {
 20811:         w = XEiJ.regPC;
 20812:         XEiJ.regPC = w + 2;
 20813:         w = mmuReadWordZeroExword (w, XEiJ.regSRS);  //pcwz。拡張ワード
 20814:       }
 20815:       if (w << 31 - 8 < 0) {  //フルフォーマット
 20816:         XEiJ.mpuCycleCount += w << -2 == 0 ? 1 : 3;  //メモリ間接なし:メモリ間接あり
 20817:       }
 20818:       t = (((~w & 0x0180) == 0 ? 0 :  //ベースレジスタサプレス
 20819:             XEiJ.regRn[ea - (0b110_000 - 8)])  //ベースレジスタ
 20820:            + (w << 31 - 8 >= 0 ? (byte) w :  //バイトディスプレースメント
 20821:               w << 31 - 5 >= 0 ? 0 :  //ヌルベースディスプレースメント
 20822:               w << 31 - 4 >= 0 ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) :  //pcws。ワードベースディスプレースメント
 20823:               mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS)));  //pcls。ロングベースディスプレースメント
 20824:       x = ((~w & 0x0140) == 0 ? 0 :  //インデックスサプレス
 20825:            (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] :  //ワードインデックス
 20826:             XEiJ.regRn[w >> 12])  //ロングインデックス
 20827:            << (w >> 9 & 3));  //スケールファクタ。ワードインデックスのときは符号拡張してから掛ける
 20828:       return ((w & 0x0103) <= 0x0100 ? t + x :  //メモリ間接なし
 20829:               ((XEiJ.TEST_BIT_2_SHIFT ? w << 31 - 2 >= 0 : (w & 4) == 0) ? mmuReadLongData (t + x, XEiJ.regSRS) :  //プリインデックス
 20830:                mmuReadLongData (t, XEiJ.regSRS) + x)  //ポストインデックス
 20831:               + ((XEiJ.TEST_BIT_1_SHIFT ? w << 31 - 1 >= 0 : (w & 2) == 0) ? 0 :  //ヌルアウタディスプレースメント
 20832:                  (XEiJ.TEST_BIT_0_SHIFT ? w << 31 - 0 >= 0 : (w & 1) == 0) ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) :  //pcws。ワードアウタディスプレースメント
 20833:                  mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS)));  //pcls。ロングアウタディスプレースメント
 20834:     case 0b111_000:  //(xxx).W
 20835:       return mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);  //pcws
 20836:     case 0b111_001:  //(xxx).L
 20837:       return mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS);  //pcls
 20838:     }  //switch
 20839:     M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION;
 20840:     throw M68kException.m6eSignal;
 20841:   }  //efaMltLong
 20842: 
 20843:   //a = efaCntLong (ea)  //|  M  WXZP |
 20844:   //  制御モードのロングオペランドの実効アドレスを求める
 20845:   //  efaMemLongとの違いは(Ar)+と-(Ar)がないこと
 20846:   @SuppressWarnings ("fallthrough") public static int efaCntLong (int ea) throws M68kException {
 20847:     int t, w, x;
 20848:     switch (ea) {
 20849:     case 0b010_000:  //(A0)
 20850:       if (XEiJ.EFA_SEPARATE_AR) {
 20851:         return XEiJ.regRn[ 8];
 20852:       }
 20853:       //fallthrough
 20854:     case 0b010_001:  //(A1)
 20855:       if (XEiJ.EFA_SEPARATE_AR) {
 20856:         return XEiJ.regRn[ 9];
 20857:       }
 20858:       //fallthrough
 20859:     case 0b010_010:  //(A2)
 20860:       if (XEiJ.EFA_SEPARATE_AR) {
 20861:         return XEiJ.regRn[10];
 20862:       }
 20863:       //fallthrough
 20864:     case 0b010_011:  //(A3)
 20865:       if (XEiJ.EFA_SEPARATE_AR) {
 20866:         return XEiJ.regRn[11];
 20867:       }
 20868:       //fallthrough
 20869:     case 0b010_100:  //(A4)
 20870:       if (XEiJ.EFA_SEPARATE_AR) {
 20871:         return XEiJ.regRn[12];
 20872:       }
 20873:       //fallthrough
 20874:     case 0b010_101:  //(A5)
 20875:       if (XEiJ.EFA_SEPARATE_AR) {
 20876:         return XEiJ.regRn[13];
 20877:       }
 20878:       //fallthrough
 20879:     case 0b010_110:  //(A6)
 20880:       if (XEiJ.EFA_SEPARATE_AR) {
 20881:         return XEiJ.regRn[14];
 20882:       }
 20883:       //fallthrough
 20884:     case 0b010_111:  //(A7)
 20885:       if (XEiJ.EFA_SEPARATE_AR) {
 20886:         return XEiJ.regRn[15];
 20887:       } else {
 20888:         return XEiJ.regRn[ea - (0b010_000 - 8)];
 20889:       }
 20890:     case 0b101_000:  //(d16,A0)
 20891:     case 0b101_001:  //(d16,A1)
 20892:     case 0b101_010:  //(d16,A2)
 20893:     case 0b101_011:  //(d16,A3)
 20894:     case 0b101_100:  //(d16,A4)
 20895:     case 0b101_101:  //(d16,A5)
 20896:     case 0b101_110:  //(d16,A6)
 20897:     case 0b101_111:  //(d16,A7)
 20898:       if (XEiJ.MPU_COMPOUND_POSTINCREMENT) {
 20899:         return (XEiJ.regRn[ea - (0b101_000 - 8)]  //ベースレジスタ
 20900:                 + mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS));  //pcws。ワードディスプレースメント
 20901:       } else {
 20902:         t = XEiJ.regPC;
 20903:         XEiJ.regPC = t + 2;
 20904:         return (XEiJ.regRn[ea - (0b101_000 - 8)]  //ベースレジスタ
 20905:                 + mmuReadWordSignExword (t, XEiJ.regSRS));  //pcws。ワードディスプレースメント
 20906:       }
 20907:     case 0b110_000:  //(d8,A0,Rn.wl)
 20908:     case 0b110_001:  //(d8,A1,Rn.wl)
 20909:     case 0b110_010:  //(d8,A2,Rn.wl)
 20910:     case 0b110_011:  //(d8,A3,Rn.wl)
 20911:     case 0b110_100:  //(d8,A4,Rn.wl)
 20912:     case 0b110_101:  //(d8,A5,Rn.wl)
 20913:     case 0b110_110:  //(d8,A6,Rn.wl)
 20914:     case 0b110_111:  //(d8,A7,Rn.wl)
 20915:       if (XEiJ.MPU_COMPOUND_POSTINCREMENT) {
 20916:         w = mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);  //pcwz。拡張ワード
 20917:       } else {
 20918:         w = XEiJ.regPC;
 20919:         XEiJ.regPC = w + 2;
 20920:         w = mmuReadWordZeroExword (w, XEiJ.regSRS);  //pcwz。拡張ワード
 20921:       }
 20922:       if (w << 31 - 8 < 0) {  //フルフォーマット
 20923:         XEiJ.mpuCycleCount += w << -2 == 0 ? 1 : 3;  //メモリ間接なし:メモリ間接あり
 20924:       }
 20925:       t = (((~w & 0x0180) == 0 ? 0 :  //ベースレジスタサプレス
 20926:             XEiJ.regRn[ea - (0b110_000 - 8)])  //ベースレジスタ
 20927:            + (w << 31 - 8 >= 0 ? (byte) w :  //バイトディスプレースメント
 20928:               w << 31 - 5 >= 0 ? 0 :  //ヌルベースディスプレースメント
 20929:               w << 31 - 4 >= 0 ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) :  //pcws。ワードベースディスプレースメント
 20930:               mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS)));  //pcls。ロングベースディスプレースメント
 20931:       x = ((~w & 0x0140) == 0 ? 0 :  //インデックスサプレス
 20932:            (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] :  //ワードインデックス
 20933:             XEiJ.regRn[w >> 12])  //ロングインデックス
 20934:            << (w >> 9 & 3));  //スケールファクタ。ワードインデックスのときは符号拡張してから掛ける
 20935:       return ((w & 0x0103) <= 0x0100 ? t + x :  //メモリ間接なし
 20936:               ((XEiJ.TEST_BIT_2_SHIFT ? w << 31 - 2 >= 0 : (w & 4) == 0) ? mmuReadLongData (t + x, XEiJ.regSRS) :  //プリインデックス
 20937:                mmuReadLongData (t, XEiJ.regSRS) + x)  //ポストインデックス
 20938:               + ((XEiJ.TEST_BIT_1_SHIFT ? w << 31 - 1 >= 0 : (w & 2) == 0) ? 0 :  //ヌルアウタディスプレースメント
 20939:                  (XEiJ.TEST_BIT_0_SHIFT ? w << 31 - 0 >= 0 : (w & 1) == 0) ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) :  //pcws。ワードアウタディスプレースメント
 20940:                  mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS)));  //pcls。ロングアウタディスプレースメント
 20941:     case 0b111_000:  //(xxx).W
 20942:       return mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);  //pcws
 20943:     case 0b111_001:  //(xxx).L
 20944:       return mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS);  //pcls
 20945:     case 0b111_010:  //(d16,PC)
 20946:       t = XEiJ.regPC;
 20947:       XEiJ.regPC = t + 2;
 20948:       return (t  //ベースレジスタ
 20949:               + mmuReadWordSignExword (t, XEiJ.regSRS));  //pcws。ワードディスプレースメント
 20950:     case 0b111_011:  //(d8,PC,Rn.wl)
 20951:       t = XEiJ.regPC;
 20952:       XEiJ.regPC = t + 2;
 20953:       w = mmuReadWordZeroExword (t, XEiJ.regSRS);  //pcwz。拡張ワード
 20954:       if (w << 31 - 8 < 0) {  //フルフォーマット
 20955:         XEiJ.mpuCycleCount += w << -2 == 0 ? 1 : 3;  //メモリ間接なし:メモリ間接あり
 20956:       }
 20957:       t = (((~w & 0x0180) == 0 ? 0 :  //ベースレジスタサプレス
 20958:             t)  //ベースレジスタ
 20959:            + (w << 31 - 8 >= 0 ? (byte) w :  //バイトディスプレースメント
 20960:               w << 31 - 5 >= 0 ? 0 :  //ヌルベースディスプレースメント
 20961:               w << 31 - 4 >= 0 ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) :  //pcws。ワードベースディスプレースメント
 20962:               mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS)));  //pcls。ロングベースディスプレースメント
 20963:       x = ((~w & 0x0140) == 0 ? 0 :  //インデックスサプレス
 20964:            (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] :  //ワードインデックス
 20965:             XEiJ.regRn[w >> 12])  //ロングインデックス
 20966:            << (w >> 9 & 3));  //スケールファクタ。ワードインデックスのときは符号拡張してから掛ける
 20967:       return ((w & 0x0103) <= 0x0100 ? t + x :  //メモリ間接なし
 20968:               ((XEiJ.TEST_BIT_2_SHIFT ? w << 31 - 2 >= 0 : (w & 4) == 0) ? mmuReadLongData (t + x, XEiJ.regSRS) :  //プリインデックス
 20969:                mmuReadLongData (t, XEiJ.regSRS) + x)  //ポストインデックス
 20970:               + ((XEiJ.TEST_BIT_1_SHIFT ? w << 31 - 1 >= 0 : (w & 2) == 0) ? 0 :  //ヌルアウタディスプレースメント
 20971:                  (XEiJ.TEST_BIT_0_SHIFT ? w << 31 - 0 >= 0 : (w & 1) == 0) ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) :  //pcws。ワードアウタディスプレースメント
 20972:                  mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS)));  //pcls。ロングアウタディスプレースメント
 20973:     }  //switch
 20974:     M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION;
 20975:     throw M68kException.m6eSignal;
 20976:   }  //efaCntLong
 20977: 
 20978:   //a = efaCltLong (ea)  //|  M  WXZ  |
 20979:   //  制御可変モードのワードオペランドの実効アドレスを求める
 20980:   //  efaCntLongとの違いは(d16,PC)と(d8,PC,Rn.wl)がないこと
 20981:   @SuppressWarnings ("fallthrough") public static int efaCltLong (int ea) throws M68kException {
 20982:     int t, w, x;
 20983:     switch (ea) {
 20984:     case 0b010_000:  //(A0)
 20985:       if (XEiJ.EFA_SEPARATE_AR) {
 20986:         return XEiJ.regRn[ 8];
 20987:       }
 20988:       //fallthrough
 20989:     case 0b010_001:  //(A1)
 20990:       if (XEiJ.EFA_SEPARATE_AR) {
 20991:         return XEiJ.regRn[ 9];
 20992:       }
 20993:       //fallthrough
 20994:     case 0b010_010:  //(A2)
 20995:       if (XEiJ.EFA_SEPARATE_AR) {
 20996:         return XEiJ.regRn[10];
 20997:       }
 20998:       //fallthrough
 20999:     case 0b010_011:  //(A3)
 21000:       if (XEiJ.EFA_SEPARATE_AR) {
 21001:         return XEiJ.regRn[11];
 21002:       }
 21003:       //fallthrough
 21004:     case 0b010_100:  //(A4)
 21005:       if (XEiJ.EFA_SEPARATE_AR) {
 21006:         return XEiJ.regRn[12];
 21007:       }
 21008:       //fallthrough
 21009:     case 0b010_101:  //(A5)
 21010:       if (XEiJ.EFA_SEPARATE_AR) {
 21011:         return XEiJ.regRn[13];
 21012:       }
 21013:       //fallthrough
 21014:     case 0b010_110:  //(A6)
 21015:       if (XEiJ.EFA_SEPARATE_AR) {
 21016:         return XEiJ.regRn[14];
 21017:       }
 21018:       //fallthrough
 21019:     case 0b010_111:  //(A7)
 21020:       if (XEiJ.EFA_SEPARATE_AR) {
 21021:         return XEiJ.regRn[15];
 21022:       } else {
 21023:         return XEiJ.regRn[ea - (0b010_000 - 8)];
 21024:       }
 21025:     case 0b101_000:  //(d16,A0)
 21026:     case 0b101_001:  //(d16,A1)
 21027:     case 0b101_010:  //(d16,A2)
 21028:     case 0b101_011:  //(d16,A3)
 21029:     case 0b101_100:  //(d16,A4)
 21030:     case 0b101_101:  //(d16,A5)
 21031:     case 0b101_110:  //(d16,A6)
 21032:     case 0b101_111:  //(d16,A7)
 21033:       if (XEiJ.MPU_COMPOUND_POSTINCREMENT) {
 21034:         return (XEiJ.regRn[ea - (0b101_000 - 8)]  //ベースレジスタ
 21035:                 + mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS));  //pcws。ワードディスプレースメント
 21036:       } else {
 21037:         t = XEiJ.regPC;
 21038:         XEiJ.regPC = t + 2;
 21039:         return (XEiJ.regRn[ea - (0b101_000 - 8)]  //ベースレジスタ
 21040:                 + mmuReadWordSignExword (t, XEiJ.regSRS));  //pcws。ワードディスプレースメント
 21041:       }
 21042:     case 0b110_000:  //(d8,A0,Rn.wl)
 21043:     case 0b110_001:  //(d8,A1,Rn.wl)
 21044:     case 0b110_010:  //(d8,A2,Rn.wl)
 21045:     case 0b110_011:  //(d8,A3,Rn.wl)
 21046:     case 0b110_100:  //(d8,A4,Rn.wl)
 21047:     case 0b110_101:  //(d8,A5,Rn.wl)
 21048:     case 0b110_110:  //(d8,A6,Rn.wl)
 21049:     case 0b110_111:  //(d8,A7,Rn.wl)
 21050:       if (XEiJ.MPU_COMPOUND_POSTINCREMENT) {
 21051:         w = mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);  //pcwz。拡張ワード
 21052:       } else {
 21053:         w = XEiJ.regPC;
 21054:         XEiJ.regPC = w + 2;
 21055:         w = mmuReadWordZeroExword (w, XEiJ.regSRS);  //pcwz。拡張ワード
 21056:       }
 21057:       if (w << 31 - 8 < 0) {  //フルフォーマット
 21058:         XEiJ.mpuCycleCount += w << -2 == 0 ? 1 : 3;  //メモリ間接なし:メモリ間接あり
 21059:       }
 21060:       t = (((~w & 0x0180) == 0 ? 0 :  //ベースレジスタサプレス
 21061:             XEiJ.regRn[ea - (0b110_000 - 8)])  //ベースレジスタ
 21062:            + (w << 31 - 8 >= 0 ? (byte) w :  //バイトディスプレースメント
 21063:               w << 31 - 5 >= 0 ? 0 :  //ヌルベースディスプレースメント
 21064:               w << 31 - 4 >= 0 ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) :  //pcws。ワードベースディスプレースメント
 21065:               mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS)));  //pcls。ロングベースディスプレースメント
 21066:       x = ((~w & 0x0140) == 0 ? 0 :  //インデックスサプレス
 21067:            (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] :  //ワードインデックス
 21068:             XEiJ.regRn[w >> 12])  //ロングインデックス
 21069:            << (w >> 9 & 3));  //スケールファクタ。ワードインデックスのときは符号拡張してから掛ける
 21070:       return ((w & 0x0103) <= 0x0100 ? t + x :  //メモリ間接なし
 21071:               ((XEiJ.TEST_BIT_2_SHIFT ? w << 31 - 2 >= 0 : (w & 4) == 0) ? mmuReadLongData (t + x, XEiJ.regSRS) :  //プリインデックス
 21072:                mmuReadLongData (t, XEiJ.regSRS) + x)  //ポストインデックス
 21073:               + ((XEiJ.TEST_BIT_1_SHIFT ? w << 31 - 1 >= 0 : (w & 2) == 0) ? 0 :  //ヌルアウタディスプレースメント
 21074:                  (XEiJ.TEST_BIT_0_SHIFT ? w << 31 - 0 >= 0 : (w & 1) == 0) ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) :  //pcws。ワードアウタディスプレースメント
 21075:                  mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS)));  //pcls。ロングアウタディスプレースメント
 21076:     case 0b111_000:  //(xxx).W
 21077:       return mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);  //pcws
 21078:     case 0b111_001:  //(xxx).L
 21079:       return mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS);  //pcls
 21080:     }  //switch
 21081:     M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION;
 21082:     throw M68kException.m6eSignal;
 21083:   }  //efaCltLong
 21084: 
 21085:   //a = efaAnyQuad (ea)  //|  M+-WXZPI|
 21086:   //  任意のモードのクワッドオペランドの実効アドレスを求める
 21087:   //  efaAnyLongとの違いは(Ar)+と-(Ar)がArを8変化させることと、#<data>がPCを8変化させることと、
 21088:   //  オペランドのアクセスが2ワード増える分の8サイクルが追加されていること
 21089:   @SuppressWarnings ("fallthrough") public static int efaAnyQuad (int ea) throws M68kException {
 21090:     int t, w, x;
 21091:     switch (ea) {
 21092:     case 0b010_000:  //(A0)
 21093:       if (XEiJ.EFA_SEPARATE_AR) {
 21094:         return XEiJ.regRn[ 8];
 21095:       }
 21096:       //fallthrough
 21097:     case 0b010_001:  //(A1)
 21098:       if (XEiJ.EFA_SEPARATE_AR) {
 21099:         return XEiJ.regRn[ 9];
 21100:       }
 21101:       //fallthrough
 21102:     case 0b010_010:  //(A2)
 21103:       if (XEiJ.EFA_SEPARATE_AR) {
 21104:         return XEiJ.regRn[10];
 21105:       }
 21106:       //fallthrough
 21107:     case 0b010_011:  //(A3)
 21108:       if (XEiJ.EFA_SEPARATE_AR) {
 21109:         return XEiJ.regRn[11];
 21110:       }
 21111:       //fallthrough
 21112:     case 0b010_100:  //(A4)
 21113:       if (XEiJ.EFA_SEPARATE_AR) {
 21114:         return XEiJ.regRn[12];
 21115:       }
 21116:       //fallthrough
 21117:     case 0b010_101:  //(A5)
 21118:       if (XEiJ.EFA_SEPARATE_AR) {
 21119:         return XEiJ.regRn[13];
 21120:       }
 21121:       //fallthrough
 21122:     case 0b010_110:  //(A6)
 21123:       if (XEiJ.EFA_SEPARATE_AR) {
 21124:         return XEiJ.regRn[14];
 21125:       }
 21126:       //fallthrough
 21127:     case 0b010_111:  //(A7)
 21128:       if (XEiJ.EFA_SEPARATE_AR) {
 21129:         return XEiJ.regRn[15];
 21130:       } else {
 21131:         return XEiJ.regRn[ea - (0b010_000 - 8)];
 21132:       }
 21133:     case 0b011_000:  //(A0)+
 21134:       if (XEiJ.EFA_SEPARATE_AR) {
 21135:         M68kException.m6eIncremented += 8L << (0 << 3);
 21136:         return (XEiJ.regRn[ 8] += 8) - 8;
 21137:       }
 21138:       //fallthrough
 21139:     case 0b011_001:  //(A1)+
 21140:       if (XEiJ.EFA_SEPARATE_AR) {
 21141:         M68kException.m6eIncremented += 8L << (1 << 3);
 21142:         return (XEiJ.regRn[ 9] += 8) - 8;
 21143:       }
 21144:       //fallthrough
 21145:     case 0b011_010:  //(A2)+
 21146:       if (XEiJ.EFA_SEPARATE_AR) {
 21147:         M68kException.m6eIncremented += 8L << (2 << 3);
 21148:         return (XEiJ.regRn[10] += 8) - 8;
 21149:       }
 21150:       //fallthrough
 21151:     case 0b011_011:  //(A3)+
 21152:       if (XEiJ.EFA_SEPARATE_AR) {
 21153:         M68kException.m6eIncremented += 8L << (3 << 3);
 21154:         return (XEiJ.regRn[11] += 8) - 8;
 21155:       }
 21156:       //fallthrough
 21157:     case 0b011_100:  //(A4)+
 21158:       if (XEiJ.EFA_SEPARATE_AR) {
 21159:         M68kException.m6eIncremented += 8L << (4 << 3);
 21160:         return (XEiJ.regRn[12] += 8) - 8;
 21161:       }
 21162:       //fallthrough
 21163:     case 0b011_101:  //(A5)+
 21164:       if (XEiJ.EFA_SEPARATE_AR) {
 21165:         M68kException.m6eIncremented += 8L << (5 << 3);
 21166:         return (XEiJ.regRn[13] += 8) - 8;
 21167:       }
 21168:       //fallthrough
 21169:     case 0b011_110:  //(A6)+
 21170:       if (XEiJ.EFA_SEPARATE_AR) {
 21171:         M68kException.m6eIncremented += 8L << (6 << 3);
 21172:         return (XEiJ.regRn[14] += 8) - 8;
 21173:       }
 21174:       //fallthrough
 21175:     case 0b011_111:  //(A7)+
 21176:       if (XEiJ.EFA_SEPARATE_AR) {
 21177:         M68kException.m6eIncremented += 8L << (7 << 3);
 21178:         return (XEiJ.regRn[15] += 8) - 8;
 21179:       } else {
 21180:         M68kException.m6eIncremented += 8L << ((ea & 7) << 3);
 21181:         return (XEiJ.regRn[ea - (0b011_000 - 8)] += 8) - 8;
 21182:       }
 21183:     case 0b100_000:  //-(A0)
 21184:       if (XEiJ.EFA_SEPARATE_AR) {
 21185:         M68kException.m6eIncremented -= 8L << (0 << 3);
 21186:         return XEiJ.regRn[ 8] -= 8;
 21187:       }
 21188:       //fallthrough
 21189:     case 0b100_001:  //-(A1)
 21190:       if (XEiJ.EFA_SEPARATE_AR) {
 21191:         M68kException.m6eIncremented -= 8L << (1 << 3);
 21192:         return XEiJ.regRn[ 9] -= 8;
 21193:       }
 21194:       //fallthrough
 21195:     case 0b100_010:  //-(A2)
 21196:       if (XEiJ.EFA_SEPARATE_AR) {
 21197:         M68kException.m6eIncremented -= 8L << (2 << 3);
 21198:         return XEiJ.regRn[10] -= 8;
 21199:       }
 21200:       //fallthrough
 21201:     case 0b100_011:  //-(A3)
 21202:       if (XEiJ.EFA_SEPARATE_AR) {
 21203:         M68kException.m6eIncremented -= 8L << (3 << 3);
 21204:         return XEiJ.regRn[11] -= 8;
 21205:       }
 21206:       //fallthrough
 21207:     case 0b100_100:  //-(A4)
 21208:       if (XEiJ.EFA_SEPARATE_AR) {
 21209:         M68kException.m6eIncremented -= 8L << (4 << 3);
 21210:         return XEiJ.regRn[12] -= 8;
 21211:       }
 21212:       //fallthrough
 21213:     case 0b100_101:  //-(A5)
 21214:       if (XEiJ.EFA_SEPARATE_AR) {
 21215:         M68kException.m6eIncremented -= 8L << (5 << 3);
 21216:         return XEiJ.regRn[13] -= 8;
 21217:       }
 21218:       //fallthrough
 21219:     case 0b100_110:  //-(A6)
 21220:       if (XEiJ.EFA_SEPARATE_AR) {
 21221:         M68kException.m6eIncremented -= 8L << (6 << 3);
 21222:         return XEiJ.regRn[14] -= 8;
 21223:       }
 21224:       //fallthrough
 21225:     case 0b100_111:  //-(A7)
 21226:       if (XEiJ.EFA_SEPARATE_AR) {
 21227:         M68kException.m6eIncremented -= 8L << (7 << 3);
 21228:         return XEiJ.regRn[15] -= 8;
 21229:       } else {
 21230:         M68kException.m6eIncremented -= 8L << ((ea & 7) << 3);
 21231:         return XEiJ.regRn[ea - (0b100_000 - 8)] -= 8;
 21232:       }
 21233:     case 0b101_000:  //(d16,A0)
 21234:     case 0b101_001:  //(d16,A1)
 21235:     case 0b101_010:  //(d16,A2)
 21236:     case 0b101_011:  //(d16,A3)
 21237:     case 0b101_100:  //(d16,A4)
 21238:     case 0b101_101:  //(d16,A5)
 21239:     case 0b101_110:  //(d16,A6)
 21240:     case 0b101_111:  //(d16,A7)
 21241:       if (XEiJ.MPU_COMPOUND_POSTINCREMENT) {
 21242:         return (XEiJ.regRn[ea - (0b101_000 - 8)]  //ベースレジスタ
 21243:                 + mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS));  //pcws。ワードディスプレースメント
 21244:       } else {
 21245:         t = XEiJ.regPC;
 21246:         XEiJ.regPC = t + 2;
 21247:         return (XEiJ.regRn[ea - (0b101_000 - 8)]  //ベースレジスタ
 21248:                 + mmuReadWordSignExword (t, XEiJ.regSRS));  //pcws。ワードディスプレースメント
 21249:       }
 21250:     case 0b110_000:  //(d8,A0,Rn.wl)
 21251:     case 0b110_001:  //(d8,A1,Rn.wl)
 21252:     case 0b110_010:  //(d8,A2,Rn.wl)
 21253:     case 0b110_011:  //(d8,A3,Rn.wl)
 21254:     case 0b110_100:  //(d8,A4,Rn.wl)
 21255:     case 0b110_101:  //(d8,A5,Rn.wl)
 21256:     case 0b110_110:  //(d8,A6,Rn.wl)
 21257:     case 0b110_111:  //(d8,A7,Rn.wl)
 21258:       if (XEiJ.MPU_COMPOUND_POSTINCREMENT) {
 21259:         w = mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);  //pcwz。拡張ワード
 21260:       } else {
 21261:         w = XEiJ.regPC;
 21262:         XEiJ.regPC = w + 2;
 21263:         w = mmuReadWordZeroExword (w, XEiJ.regSRS);  //pcwz。拡張ワード
 21264:       }
 21265:       if (w << 31 - 8 < 0) {  //フルフォーマット
 21266:         XEiJ.mpuCycleCount += w << -2 == 0 ? 1 : 3;  //メモリ間接なし:メモリ間接あり
 21267:       }
 21268:       t = (((~w & 0x0180) == 0 ? 0 :  //ベースレジスタサプレス
 21269:             XEiJ.regRn[ea - (0b110_000 - 8)])  //ベースレジスタ
 21270:            + (w << 31 - 8 >= 0 ? (byte) w :  //バイトディスプレースメント
 21271:               w << 31 - 5 >= 0 ? 0 :  //ヌルベースディスプレースメント
 21272:               w << 31 - 4 >= 0 ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) :  //pcws。ワードベースディスプレースメント
 21273:               mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS)));  //pcls。ロングベースディスプレースメント
 21274:       x = ((~w & 0x0140) == 0 ? 0 :  //インデックスサプレス
 21275:            (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] :  //ワードインデックス
 21276:             XEiJ.regRn[w >> 12])  //ロングインデックス
 21277:            << (w >> 9 & 3));  //スケールファクタ。ワードインデックスのときは符号拡張してから掛ける
 21278:       return ((w & 0x0103) <= 0x0100 ? t + x :  //メモリ間接なし
 21279:               ((XEiJ.TEST_BIT_2_SHIFT ? w << 31 - 2 >= 0 : (w & 4) == 0) ? mmuReadLongData (t + x, XEiJ.regSRS) :  //プリインデックス
 21280:                mmuReadLongData (t, XEiJ.regSRS) + x)  //ポストインデックス
 21281:               + ((XEiJ.TEST_BIT_1_SHIFT ? w << 31 - 1 >= 0 : (w & 2) == 0) ? 0 :  //ヌルアウタディスプレースメント
 21282:                  (XEiJ.TEST_BIT_0_SHIFT ? w << 31 - 0 >= 0 : (w & 1) == 0) ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) :  //pcws。ワードアウタディスプレースメント
 21283:                  mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS)));  //pcls。ロングアウタディスプレースメント
 21284:     case 0b111_000:  //(xxx).W
 21285:       return mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);  //pcws
 21286:     case 0b111_001:  //(xxx).L
 21287:       return mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS);  //pcls
 21288:     case 0b111_010:  //(d16,PC)
 21289:       t = XEiJ.regPC;
 21290:       XEiJ.regPC = t + 2;
 21291:       return (t  //ベースレジスタ
 21292:               + mmuReadWordSignExword (t, XEiJ.regSRS));  //pcws。ワードディスプレースメント
 21293:     case 0b111_011:  //(d8,PC,Rn.wl)
 21294:       t = XEiJ.regPC;
 21295:       XEiJ.regPC = t + 2;
 21296:       w = mmuReadWordZeroExword (t, XEiJ.regSRS);  //pcwz。拡張ワード
 21297:       if (w << 31 - 8 < 0) {  //フルフォーマット
 21298:         XEiJ.mpuCycleCount += w << -2 == 0 ? 1 : 3;  //メモリ間接なし:メモリ間接あり
 21299:       }
 21300:       t = (((~w & 0x0180) == 0 ? 0 :  //ベースレジスタサプレス
 21301:             t)  //ベースレジスタ
 21302:            + (w << 31 - 8 >= 0 ? (byte) w :  //バイトディスプレースメント
 21303:               w << 31 - 5 >= 0 ? 0 :  //ヌルベースディスプレースメント
 21304:               w << 31 - 4 >= 0 ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) :  //pcws。ワードベースディスプレースメント
 21305:               mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS)));  //pcls。ロングベースディスプレースメント
 21306:       x = ((~w & 0x0140) == 0 ? 0 :  //インデックスサプレス
 21307:            (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] :  //ワードインデックス
 21308:             XEiJ.regRn[w >> 12])  //ロングインデックス
 21309:            << (w >> 9 & 3));  //スケールファクタ。ワードインデックスのときは符号拡張してから掛ける
 21310:       return ((w & 0x0103) <= 0x0100 ? t + x :  //メモリ間接なし
 21311:               ((XEiJ.TEST_BIT_2_SHIFT ? w << 31 - 2 >= 0 : (w & 4) == 0) ? mmuReadLongData (t + x, XEiJ.regSRS) :  //プリインデックス
 21312:                mmuReadLongData (t, XEiJ.regSRS) + x)  //ポストインデックス
 21313:               + ((XEiJ.TEST_BIT_1_SHIFT ? w << 31 - 1 >= 0 : (w & 2) == 0) ? 0 :  //ヌルアウタディスプレースメント
 21314:                  (XEiJ.TEST_BIT_0_SHIFT ? w << 31 - 0 >= 0 : (w & 1) == 0) ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) :  //pcws。ワードアウタディスプレースメント
 21315:                  mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS)));  //pcls。ロングアウタディスプレースメント
 21316:     case 0b111_100:  //#<data>
 21317:       if (XEiJ.MPU_COMPOUND_POSTINCREMENT) {
 21318:         return (XEiJ.regPC += 8) - 8;
 21319:       } else {
 21320:         t = XEiJ.regPC;
 21321:         XEiJ.regPC = t + 8;
 21322:         return t;
 21323:       }
 21324:     }  //switch
 21325:     M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION;
 21326:     throw M68kException.m6eSignal;
 21327:   }  //efaAnyQuad
 21328: 
 21329:   //a = efaMltQuad (ea)  //|  M+-WXZ  |
 21330:   //  メモリ可変モードのクワッドオペランドの実効アドレスを求める
 21331:   //  efaMltLongとの違いは(Ar)+と-(Ar)がArを8変化させることと、#<data>がPCを8変化させることと、
 21332:   //  オペランドのアクセスが2ワード増える分の8サイクルが追加されていること
 21333:   @SuppressWarnings ("fallthrough") public static int efaMltQuad (int ea) throws M68kException {
 21334:     int t, w, x;
 21335:     switch (ea) {
 21336:     case 0b010_000:  //(A0)
 21337:       if (XEiJ.EFA_SEPARATE_AR) {
 21338:         return XEiJ.regRn[ 8];
 21339:       }
 21340:       //fallthrough
 21341:     case 0b010_001:  //(A1)
 21342:       if (XEiJ.EFA_SEPARATE_AR) {
 21343:         return XEiJ.regRn[ 9];
 21344:       }
 21345:       //fallthrough
 21346:     case 0b010_010:  //(A2)
 21347:       if (XEiJ.EFA_SEPARATE_AR) {
 21348:         return XEiJ.regRn[10];
 21349:       }
 21350:       //fallthrough
 21351:     case 0b010_011:  //(A3)
 21352:       if (XEiJ.EFA_SEPARATE_AR) {
 21353:         return XEiJ.regRn[11];
 21354:       }
 21355:       //fallthrough
 21356:     case 0b010_100:  //(A4)
 21357:       if (XEiJ.EFA_SEPARATE_AR) {
 21358:         return XEiJ.regRn[12];
 21359:       }
 21360:       //fallthrough
 21361:     case 0b010_101:  //(A5)
 21362:       if (XEiJ.EFA_SEPARATE_AR) {
 21363:         return XEiJ.regRn[13];
 21364:       }
 21365:       //fallthrough
 21366:     case 0b010_110:  //(A6)
 21367:       if (XEiJ.EFA_SEPARATE_AR) {
 21368:         return XEiJ.regRn[14];
 21369:       }
 21370:       //fallthrough
 21371:     case 0b010_111:  //(A7)
 21372:       if (XEiJ.EFA_SEPARATE_AR) {
 21373:         return XEiJ.regRn[15];
 21374:       } else {
 21375:         return XEiJ.regRn[ea - (0b010_000 - 8)];
 21376:       }
 21377:     case 0b011_000:  //(A0)+
 21378:       if (XEiJ.EFA_SEPARATE_AR) {
 21379:         M68kException.m6eIncremented += 8L << (0 << 3);
 21380:         return (XEiJ.regRn[ 8] += 8) - 8;
 21381:       }
 21382:       //fallthrough
 21383:     case 0b011_001:  //(A1)+
 21384:       if (XEiJ.EFA_SEPARATE_AR) {
 21385:         M68kException.m6eIncremented += 8L << (1 << 3);
 21386:         return (XEiJ.regRn[ 9] += 8) - 8;
 21387:       }
 21388:       //fallthrough
 21389:     case 0b011_010:  //(A2)+
 21390:       if (XEiJ.EFA_SEPARATE_AR) {
 21391:         M68kException.m6eIncremented += 8L << (2 << 3);
 21392:         return (XEiJ.regRn[10] += 8) - 8;
 21393:       }
 21394:       //fallthrough
 21395:     case 0b011_011:  //(A3)+
 21396:       if (XEiJ.EFA_SEPARATE_AR) {
 21397:         M68kException.m6eIncremented += 8L << (3 << 3);
 21398:         return (XEiJ.regRn[11] += 8) - 8;
 21399:       }
 21400:       //fallthrough
 21401:     case 0b011_100:  //(A4)+
 21402:       if (XEiJ.EFA_SEPARATE_AR) {
 21403:         M68kException.m6eIncremented += 8L << (4 << 3);
 21404:         return (XEiJ.regRn[12] += 8) - 8;
 21405:       }
 21406:       //fallthrough
 21407:     case 0b011_101:  //(A5)+
 21408:       if (XEiJ.EFA_SEPARATE_AR) {
 21409:         M68kException.m6eIncremented += 8L << (5 << 3);
 21410:         return (XEiJ.regRn[13] += 8) - 8;
 21411:       }
 21412:       //fallthrough
 21413:     case 0b011_110:  //(A6)+
 21414:       if (XEiJ.EFA_SEPARATE_AR) {
 21415:         M68kException.m6eIncremented += 8L << (6 << 3);
 21416:         return (XEiJ.regRn[14] += 8) - 8;
 21417:       }
 21418:       //fallthrough
 21419:     case 0b011_111:  //(A7)+
 21420:       if (XEiJ.EFA_SEPARATE_AR) {
 21421:         M68kException.m6eIncremented += 8L << (7 << 3);
 21422:         return (XEiJ.regRn[15] += 8) - 8;
 21423:       } else {
 21424:         M68kException.m6eIncremented += 8L << ((ea & 7) << 3);
 21425:         return (XEiJ.regRn[ea - (0b011_000 - 8)] += 8) - 8;
 21426:       }
 21427:     case 0b100_000:  //-(A0)
 21428:       if (XEiJ.EFA_SEPARATE_AR) {
 21429:         M68kException.m6eIncremented -= 8L << (0 << 3);
 21430:         return XEiJ.regRn[ 8] -= 8;
 21431:       }
 21432:       //fallthrough
 21433:     case 0b100_001:  //-(A1)
 21434:       if (XEiJ.EFA_SEPARATE_AR) {
 21435:         M68kException.m6eIncremented -= 8L << (1 << 3);
 21436:         return XEiJ.regRn[ 9] -= 8;
 21437:       }
 21438:       //fallthrough
 21439:     case 0b100_010:  //-(A2)
 21440:       if (XEiJ.EFA_SEPARATE_AR) {
 21441:         M68kException.m6eIncremented -= 8L << (2 << 3);
 21442:         return XEiJ.regRn[10] -= 8;
 21443:       }
 21444:       //fallthrough
 21445:     case 0b100_011:  //-(A3)
 21446:       if (XEiJ.EFA_SEPARATE_AR) {
 21447:         M68kException.m6eIncremented -= 8L << (3 << 3);
 21448:         return XEiJ.regRn[11] -= 8;
 21449:       }
 21450:       //fallthrough
 21451:     case 0b100_100:  //-(A4)
 21452:       if (XEiJ.EFA_SEPARATE_AR) {
 21453:         M68kException.m6eIncremented -= 8L << (4 << 3);
 21454:         return XEiJ.regRn[12] -= 8;
 21455:       }
 21456:       //fallthrough
 21457:     case 0b100_101:  //-(A5)
 21458:       if (XEiJ.EFA_SEPARATE_AR) {
 21459:         M68kException.m6eIncremented -= 8L << (5 << 3);
 21460:         return XEiJ.regRn[13] -= 8;
 21461:       }
 21462:       //fallthrough
 21463:     case 0b100_110:  //-(A6)
 21464:       if (XEiJ.EFA_SEPARATE_AR) {
 21465:         M68kException.m6eIncremented -= 8L << (6 << 3);
 21466:         return XEiJ.regRn[14] -= 8;
 21467:       }
 21468:       //fallthrough
 21469:     case 0b100_111:  //-(A7)
 21470:       if (XEiJ.EFA_SEPARATE_AR) {
 21471:         M68kException.m6eIncremented -= 8L << (7 << 3);
 21472:         return XEiJ.regRn[15] -= 8;
 21473:       } else {
 21474:         M68kException.m6eIncremented -= 8L << ((ea & 7) << 3);
 21475:         return XEiJ.regRn[ea - (0b100_000 - 8)] -= 8;
 21476:       }
 21477:     case 0b101_000:  //(d16,A0)
 21478:     case 0b101_001:  //(d16,A1)
 21479:     case 0b101_010:  //(d16,A2)
 21480:     case 0b101_011:  //(d16,A3)
 21481:     case 0b101_100:  //(d16,A4)
 21482:     case 0b101_101:  //(d16,A5)
 21483:     case 0b101_110:  //(d16,A6)
 21484:     case 0b101_111:  //(d16,A7)
 21485:       if (XEiJ.MPU_COMPOUND_POSTINCREMENT) {
 21486:         return (XEiJ.regRn[ea - (0b101_000 - 8)]  //ベースレジスタ
 21487:                 + mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS));  //pcws。ワードディスプレースメント
 21488:       } else {
 21489:         t = XEiJ.regPC;
 21490:         XEiJ.regPC = t + 2;
 21491:         return (XEiJ.regRn[ea - (0b101_000 - 8)]  //ベースレジスタ
 21492:                 + mmuReadWordSignExword (t, XEiJ.regSRS));  //pcws。ワードディスプレースメント
 21493:       }
 21494:     case 0b110_000:  //(d8,A0,Rn.wl)
 21495:     case 0b110_001:  //(d8,A1,Rn.wl)
 21496:     case 0b110_010:  //(d8,A2,Rn.wl)
 21497:     case 0b110_011:  //(d8,A3,Rn.wl)
 21498:     case 0b110_100:  //(d8,A4,Rn.wl)
 21499:     case 0b110_101:  //(d8,A5,Rn.wl)
 21500:     case 0b110_110:  //(d8,A6,Rn.wl)
 21501:     case 0b110_111:  //(d8,A7,Rn.wl)
 21502:       if (XEiJ.MPU_COMPOUND_POSTINCREMENT) {
 21503:         w = mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);  //pcwz。拡張ワード
 21504:       } else {
 21505:         w = XEiJ.regPC;
 21506:         XEiJ.regPC = w + 2;
 21507:         w = mmuReadWordZeroExword (w, XEiJ.regSRS);  //pcwz。拡張ワード
 21508:       }
 21509:       if (w << 31 - 8 < 0) {  //フルフォーマット
 21510:         XEiJ.mpuCycleCount += w << -2 == 0 ? 1 : 3;  //メモリ間接なし:メモリ間接あり
 21511:       }
 21512:       t = (((~w & 0x0180) == 0 ? 0 :  //ベースレジスタサプレス
 21513:             XEiJ.regRn[ea - (0b110_000 - 8)])  //ベースレジスタ
 21514:            + (w << 31 - 8 >= 0 ? (byte) w :  //バイトディスプレースメント
 21515:               w << 31 - 5 >= 0 ? 0 :  //ヌルベースディスプレースメント
 21516:               w << 31 - 4 >= 0 ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) :  //pcws。ワードベースディスプレースメント
 21517:               mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS)));  //pcls。ロングベースディスプレースメント
 21518:       x = ((~w & 0x0140) == 0 ? 0 :  //インデックスサプレス
 21519:            (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] :  //ワードインデックス
 21520:             XEiJ.regRn[w >> 12])  //ロングインデックス
 21521:            << (w >> 9 & 3));  //スケールファクタ。ワードインデックスのときは符号拡張してから掛ける
 21522:       return ((w & 0x0103) <= 0x0100 ? t + x :  //メモリ間接なし
 21523:               ((XEiJ.TEST_BIT_2_SHIFT ? w << 31 - 2 >= 0 : (w & 4) == 0) ? mmuReadLongData (t + x, XEiJ.regSRS) :  //プリインデックス
 21524:                mmuReadLongData (t, XEiJ.regSRS) + x)  //ポストインデックス
 21525:               + ((XEiJ.TEST_BIT_1_SHIFT ? w << 31 - 1 >= 0 : (w & 2) == 0) ? 0 :  //ヌルアウタディスプレースメント
 21526:                  (XEiJ.TEST_BIT_0_SHIFT ? w << 31 - 0 >= 0 : (w & 1) == 0) ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) :  //pcws。ワードアウタディスプレースメント
 21527:                  mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS)));  //pcls。ロングアウタディスプレースメント
 21528:     case 0b111_000:  //(xxx).W
 21529:       return mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);  //pcws
 21530:     case 0b111_001:  //(xxx).L
 21531:       return mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS);  //pcls
 21532:     }  //switch
 21533:     M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION;
 21534:     throw M68kException.m6eSignal;
 21535:   }  //efaMltQuad
 21536: 
 21537:   //a = efaAnyExtd (ea)  //|  M+-WXZPI|
 21538:   //  任意のモードのエクステンデッドオペランドの実効アドレスを求める
 21539:   //  efaAnyQuadとの違いは(Ar)+と-(Ar)がArを12変化させることと、#<data>がPCを12変化させることと、
 21540:   //  オペランドのアクセスが2ワード増える分の8サイクルが追加されていること
 21541:   @SuppressWarnings ("fallthrough") public static int efaAnyExtd (int ea) throws M68kException {
 21542:     int t, w, x;
 21543:     switch (ea) {
 21544:     case 0b010_000:  //(A0)
 21545:       if (XEiJ.EFA_SEPARATE_AR) {
 21546:         return XEiJ.regRn[ 8];
 21547:       }
 21548:       //fallthrough
 21549:     case 0b010_001:  //(A1)
 21550:       if (XEiJ.EFA_SEPARATE_AR) {
 21551:         return XEiJ.regRn[ 9];
 21552:       }
 21553:       //fallthrough
 21554:     case 0b010_010:  //(A2)
 21555:       if (XEiJ.EFA_SEPARATE_AR) {
 21556:         return XEiJ.regRn[10];
 21557:       }
 21558:       //fallthrough
 21559:     case 0b010_011:  //(A3)
 21560:       if (XEiJ.EFA_SEPARATE_AR) {
 21561:         return XEiJ.regRn[11];
 21562:       }
 21563:       //fallthrough
 21564:     case 0b010_100:  //(A4)
 21565:       if (XEiJ.EFA_SEPARATE_AR) {
 21566:         return XEiJ.regRn[12];
 21567:       }
 21568:       //fallthrough
 21569:     case 0b010_101:  //(A5)
 21570:       if (XEiJ.EFA_SEPARATE_AR) {
 21571:         return XEiJ.regRn[13];
 21572:       }
 21573:       //fallthrough
 21574:     case 0b010_110:  //(A6)
 21575:       if (XEiJ.EFA_SEPARATE_AR) {
 21576:         return XEiJ.regRn[14];
 21577:       }
 21578:       //fallthrough
 21579:     case 0b010_111:  //(A7)
 21580:       if (XEiJ.EFA_SEPARATE_AR) {
 21581:         return XEiJ.regRn[15];
 21582:       } else {
 21583:         return XEiJ.regRn[ea - (0b010_000 - 8)];
 21584:       }
 21585:     case 0b011_000:  //(A0)+
 21586:       if (XEiJ.EFA_SEPARATE_AR) {
 21587:         M68kException.m6eIncremented += 12L << (0 << 3);
 21588:         return (XEiJ.regRn[ 8] += 12) - 12;
 21589:       }
 21590:       //fallthrough
 21591:     case 0b011_001:  //(A1)+
 21592:       if (XEiJ.EFA_SEPARATE_AR) {
 21593:         M68kException.m6eIncremented += 12L << (1 << 3);
 21594:         return (XEiJ.regRn[ 9] += 12) - 12;
 21595:       }
 21596:       //fallthrough
 21597:     case 0b011_010:  //(A2)+
 21598:       if (XEiJ.EFA_SEPARATE_AR) {
 21599:         M68kException.m6eIncremented += 12L << (2 << 3);
 21600:         return (XEiJ.regRn[10] += 12) - 12;
 21601:       }
 21602:       //fallthrough
 21603:     case 0b011_011:  //(A3)+
 21604:       if (XEiJ.EFA_SEPARATE_AR) {
 21605:         M68kException.m6eIncremented += 12L << (3 << 3);
 21606:         return (XEiJ.regRn[11] += 12) - 12;
 21607:       }
 21608:       //fallthrough
 21609:     case 0b011_100:  //(A4)+
 21610:       if (XEiJ.EFA_SEPARATE_AR) {
 21611:         M68kException.m6eIncremented += 12L << (4 << 3);
 21612:         return (XEiJ.regRn[12] += 12) - 12;
 21613:       }
 21614:       //fallthrough
 21615:     case 0b011_101:  //(A5)+
 21616:       if (XEiJ.EFA_SEPARATE_AR) {
 21617:         M68kException.m6eIncremented += 12L << (5 << 3);
 21618:         return (XEiJ.regRn[13] += 12) - 12;
 21619:       }
 21620:       //fallthrough
 21621:     case 0b011_110:  //(A6)+
 21622:       if (XEiJ.EFA_SEPARATE_AR) {
 21623:         M68kException.m6eIncremented += 12L << (6 << 3);
 21624:         return (XEiJ.regRn[14] += 12) - 12;
 21625:       }
 21626:       //fallthrough
 21627:     case 0b011_111:  //(A7)+
 21628:       if (XEiJ.EFA_SEPARATE_AR) {
 21629:         M68kException.m6eIncremented += 12L << (7 << 3);
 21630:         return (XEiJ.regRn[15] += 12) - 12;
 21631:       } else {
 21632:         M68kException.m6eIncremented += 12L << ((ea & 7) << 3);
 21633:         return (XEiJ.regRn[ea - (0b011_000 - 8)] += 12) - 12;
 21634:       }
 21635:     case 0b100_000:  //-(A0)
 21636:       if (XEiJ.EFA_SEPARATE_AR) {
 21637:         M68kException.m6eIncremented -= 12L << (0 << 3);
 21638:         return XEiJ.regRn[ 8] -= 12;
 21639:       }
 21640:       //fallthrough
 21641:     case 0b100_001:  //-(A1)
 21642:       if (XEiJ.EFA_SEPARATE_AR) {
 21643:         M68kException.m6eIncremented -= 12L << (1 << 3);
 21644:         return XEiJ.regRn[ 9] -= 12;
 21645:       }
 21646:       //fallthrough
 21647:     case 0b100_010:  //-(A2)
 21648:       if (XEiJ.EFA_SEPARATE_AR) {
 21649:         M68kException.m6eIncremented -= 12L << (2 << 3);
 21650:         return XEiJ.regRn[10] -= 12;
 21651:       }
 21652:       //fallthrough
 21653:     case 0b100_011:  //-(A3)
 21654:       if (XEiJ.EFA_SEPARATE_AR) {
 21655:         M68kException.m6eIncremented -= 12L << (3 << 3);
 21656:         return XEiJ.regRn[11] -= 12;
 21657:       }
 21658:       //fallthrough
 21659:     case 0b100_100:  //-(A4)
 21660:       if (XEiJ.EFA_SEPARATE_AR) {
 21661:         M68kException.m6eIncremented -= 12L << (4 << 3);
 21662:         return XEiJ.regRn[12] -= 12;
 21663:       }
 21664:       //fallthrough
 21665:     case 0b100_101:  //-(A5)
 21666:       if (XEiJ.EFA_SEPARATE_AR) {
 21667:         M68kException.m6eIncremented -= 12L << (5 << 3);
 21668:         return XEiJ.regRn[13] -= 12;
 21669:       }
 21670:       //fallthrough
 21671:     case 0b100_110:  //-(A6)
 21672:       if (XEiJ.EFA_SEPARATE_AR) {
 21673:         M68kException.m6eIncremented -= 12L << (6 << 3);
 21674:         return XEiJ.regRn[14] -= 12;
 21675:       }
 21676:       //fallthrough
 21677:     case 0b100_111:  //-(A7)
 21678:       if (XEiJ.EFA_SEPARATE_AR) {
 21679:         M68kException.m6eIncremented -= 12L << (7 << 3);
 21680:         return XEiJ.regRn[15] -= 12;
 21681:       } else {
 21682:         M68kException.m6eIncremented -= 12L << ((ea & 7) << 3);
 21683:         return XEiJ.regRn[ea - (0b100_000 - 8)] -= 12;
 21684:       }
 21685:     case 0b101_000:  //(d16,A0)
 21686:     case 0b101_001:  //(d16,A1)
 21687:     case 0b101_010:  //(d16,A2)
 21688:     case 0b101_011:  //(d16,A3)
 21689:     case 0b101_100:  //(d16,A4)
 21690:     case 0b101_101:  //(d16,A5)
 21691:     case 0b101_110:  //(d16,A6)
 21692:     case 0b101_111:  //(d16,A7)
 21693:       if (XEiJ.MPU_COMPOUND_POSTINCREMENT) {
 21694:         return (XEiJ.regRn[ea - (0b101_000 - 8)]  //ベースレジスタ
 21695:                 + mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS));  //pcws。ワードディスプレースメント
 21696:       } else {
 21697:         t = XEiJ.regPC;
 21698:         XEiJ.regPC = t + 2;
 21699:         return (XEiJ.regRn[ea - (0b101_000 - 8)]  //ベースレジスタ
 21700:                 + mmuReadWordSignExword (t, XEiJ.regSRS));  //pcws。ワードディスプレースメント
 21701:       }
 21702:     case 0b110_000:  //(d8,A0,Rn.wl)
 21703:     case 0b110_001:  //(d8,A1,Rn.wl)
 21704:     case 0b110_010:  //(d8,A2,Rn.wl)
 21705:     case 0b110_011:  //(d8,A3,Rn.wl)
 21706:     case 0b110_100:  //(d8,A4,Rn.wl)
 21707:     case 0b110_101:  //(d8,A5,Rn.wl)
 21708:     case 0b110_110:  //(d8,A6,Rn.wl)
 21709:     case 0b110_111:  //(d8,A7,Rn.wl)
 21710:       if (XEiJ.MPU_COMPOUND_POSTINCREMENT) {
 21711:         w = mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);  //pcwz。拡張ワード
 21712:       } else {
 21713:         w = XEiJ.regPC;
 21714:         XEiJ.regPC = w + 2;
 21715:         w = mmuReadWordZeroExword (w, XEiJ.regSRS);  //pcwz。拡張ワード
 21716:       }
 21717:       if (w << 31 - 8 < 0) {  //フルフォーマット
 21718:         XEiJ.mpuCycleCount += w << -2 == 0 ? 1 : 3;  //メモリ間接なし:メモリ間接あり
 21719:       }
 21720:       t = (((~w & 0x0180) == 0 ? 0 :  //ベースレジスタサプレス
 21721:             XEiJ.regRn[ea - (0b110_000 - 8)])  //ベースレジスタ
 21722:            + (w << 31 - 8 >= 0 ? (byte) w :  //バイトディスプレースメント
 21723:               w << 31 - 5 >= 0 ? 0 :  //ヌルベースディスプレースメント
 21724:               w << 31 - 4 >= 0 ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) :  //pcws。ワードベースディスプレースメント
 21725:               mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS)));  //pcls。ロングベースディスプレースメント
 21726:       x = ((~w & 0x0140) == 0 ? 0 :  //インデックスサプレス
 21727:            (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] :  //ワードインデックス
 21728:             XEiJ.regRn[w >> 12])  //ロングインデックス
 21729:            << (w >> 9 & 3));  //スケールファクタ。ワードインデックスのときは符号拡張してから掛ける
 21730:       return ((w & 0x0103) <= 0x0100 ? t + x :  //メモリ間接なし
 21731:               ((XEiJ.TEST_BIT_2_SHIFT ? w << 31 - 2 >= 0 : (w & 4) == 0) ? mmuReadLongData (t + x, XEiJ.regSRS) :  //プリインデックス
 21732:                mmuReadLongData (t, XEiJ.regSRS) + x)  //ポストインデックス
 21733:               + ((XEiJ.TEST_BIT_1_SHIFT ? w << 31 - 1 >= 0 : (w & 2) == 0) ? 0 :  //ヌルアウタディスプレースメント
 21734:                  (XEiJ.TEST_BIT_0_SHIFT ? w << 31 - 0 >= 0 : (w & 1) == 0) ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) :  //pcws。ワードアウタディスプレースメント
 21735:                  mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS)));  //pcls。ロングアウタディスプレースメント
 21736:     case 0b111_000:  //(xxx).W
 21737:       return mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);  //pcws
 21738:     case 0b111_001:  //(xxx).L
 21739:       return mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS);  //pcls
 21740:     case 0b111_010:  //(d16,PC)
 21741:       t = XEiJ.regPC;
 21742:       XEiJ.regPC = t + 2;
 21743:       return (t  //ベースレジスタ
 21744:               + mmuReadWordSignExword (t, XEiJ.regSRS));  //pcws。ワードディスプレースメント
 21745:     case 0b111_011:  //(d8,PC,Rn.wl)
 21746:       t = XEiJ.regPC;
 21747:       XEiJ.regPC = t + 2;
 21748:       w = mmuReadWordZeroExword (t, XEiJ.regSRS);  //pcwz。拡張ワード
 21749:       if (w << 31 - 8 < 0) {  //フルフォーマット
 21750:         XEiJ.mpuCycleCount += w << -2 == 0 ? 1 : 3;  //メモリ間接なし:メモリ間接あり
 21751:       }
 21752:       t = (((~w & 0x0180) == 0 ? 0 :  //ベースレジスタサプレス
 21753:             t)  //ベースレジスタ
 21754:            + (w << 31 - 8 >= 0 ? (byte) w :  //バイトディスプレースメント
 21755:               w << 31 - 5 >= 0 ? 0 :  //ヌルベースディスプレースメント
 21756:               w << 31 - 4 >= 0 ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) :  //pcws。ワードベースディスプレースメント
 21757:               mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS)));  //pcls。ロングベースディスプレースメント
 21758:       x = ((~w & 0x0140) == 0 ? 0 :  //インデックスサプレス
 21759:            (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] :  //ワードインデックス
 21760:             XEiJ.regRn[w >> 12])  //ロングインデックス
 21761:            << (w >> 9 & 3));  //スケールファクタ。ワードインデックスのときは符号拡張してから掛ける
 21762:       return ((w & 0x0103) <= 0x0100 ? t + x :  //メモリ間接なし
 21763:               ((XEiJ.TEST_BIT_2_SHIFT ? w << 31 - 2 >= 0 : (w & 4) == 0) ? mmuReadLongData (t + x, XEiJ.regSRS) :  //プリインデックス
 21764:                mmuReadLongData (t, XEiJ.regSRS) + x)  //ポストインデックス
 21765:               + ((XEiJ.TEST_BIT_1_SHIFT ? w << 31 - 1 >= 0 : (w & 2) == 0) ? 0 :  //ヌルアウタディスプレースメント
 21766:                  (XEiJ.TEST_BIT_0_SHIFT ? w << 31 - 0 >= 0 : (w & 1) == 0) ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) :  //pcws。ワードアウタディスプレースメント
 21767:                  mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS)));  //pcls。ロングアウタディスプレースメント
 21768:     case 0b111_100:  //#<data>
 21769:       if (XEiJ.MPU_COMPOUND_POSTINCREMENT) {
 21770:         return (XEiJ.regPC += 12) - 12;
 21771:       } else {
 21772:         t = XEiJ.regPC;
 21773:         XEiJ.regPC = t + 12;
 21774:         return t;
 21775:       }
 21776:     }  //switch
 21777:     M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION;
 21778:     throw M68kException.m6eSignal;
 21779:   }  //efaAnyExtd
 21780: 
 21781:   //a = efaMltExtd (ea)  //|  M+-WXZ  |
 21782:   //  メモリ可変モードのエクステンデッドオペランドの実効アドレスを求める
 21783:   //  efaMltQuadとの違いは(Ar)+と-(Ar)がArを12変化させることと、#<data>がPCを12変化させることと、
 21784:   //  オペランドのアクセスが2ワード増える分の8サイクルが追加されていること
 21785:   @SuppressWarnings ("fallthrough") public static int efaMltExtd (int ea) throws M68kException {
 21786:     int t, w, x;
 21787:     switch (ea) {
 21788:     case 0b010_000:  //(A0)
 21789:       if (XEiJ.EFA_SEPARATE_AR) {
 21790:         return XEiJ.regRn[ 8];
 21791:       }
 21792:       //fallthrough
 21793:     case 0b010_001:  //(A1)
 21794:       if (XEiJ.EFA_SEPARATE_AR) {
 21795:         return XEiJ.regRn[ 9];
 21796:       }
 21797:       //fallthrough
 21798:     case 0b010_010:  //(A2)
 21799:       if (XEiJ.EFA_SEPARATE_AR) {
 21800:         return XEiJ.regRn[10];
 21801:       }
 21802:       //fallthrough
 21803:     case 0b010_011:  //(A3)
 21804:       if (XEiJ.EFA_SEPARATE_AR) {
 21805:         return XEiJ.regRn[11];
 21806:       }
 21807:       //fallthrough
 21808:     case 0b010_100:  //(A4)
 21809:       if (XEiJ.EFA_SEPARATE_AR) {
 21810:         return XEiJ.regRn[12];
 21811:       }
 21812:       //fallthrough
 21813:     case 0b010_101:  //(A5)
 21814:       if (XEiJ.EFA_SEPARATE_AR) {
 21815:         return XEiJ.regRn[13];
 21816:       }
 21817:       //fallthrough
 21818:     case 0b010_110:  //(A6)
 21819:       if (XEiJ.EFA_SEPARATE_AR) {
 21820:         return XEiJ.regRn[14];
 21821:       }
 21822:       //fallthrough
 21823:     case 0b010_111:  //(A7)
 21824:       if (XEiJ.EFA_SEPARATE_AR) {
 21825:         return XEiJ.regRn[15];
 21826:       } else {
 21827:         return XEiJ.regRn[ea - (0b010_000 - 8)];
 21828:       }
 21829:     case 0b011_000:  //(A0)+
 21830:       if (XEiJ.EFA_SEPARATE_AR) {
 21831:         M68kException.m6eIncremented += 12L << (0 << 3);
 21832:         return (XEiJ.regRn[ 8] += 12) - 12;
 21833:       }
 21834:       //fallthrough
 21835:     case 0b011_001:  //(A1)+
 21836:       if (XEiJ.EFA_SEPARATE_AR) {
 21837:         M68kException.m6eIncremented += 12L << (1 << 3);
 21838:         return (XEiJ.regRn[ 9] += 12) - 12;
 21839:       }
 21840:       //fallthrough
 21841:     case 0b011_010:  //(A2)+
 21842:       if (XEiJ.EFA_SEPARATE_AR) {
 21843:         M68kException.m6eIncremented += 12L << (2 << 3);
 21844:         return (XEiJ.regRn[10] += 12) - 12;
 21845:       }
 21846:       //fallthrough
 21847:     case 0b011_011:  //(A3)+
 21848:       if (XEiJ.EFA_SEPARATE_AR) {
 21849:         M68kException.m6eIncremented += 12L << (3 << 3);
 21850:         return (XEiJ.regRn[11] += 12) - 12;
 21851:       }
 21852:       //fallthrough
 21853:     case 0b011_100:  //(A4)+
 21854:       if (XEiJ.EFA_SEPARATE_AR) {
 21855:         M68kException.m6eIncremented += 12L << (4 << 3);
 21856:         return (XEiJ.regRn[12] += 12) - 12;
 21857:       }
 21858:       //fallthrough
 21859:     case 0b011_101:  //(A5)+
 21860:       if (XEiJ.EFA_SEPARATE_AR) {
 21861:         M68kException.m6eIncremented += 12L << (5 << 3);
 21862:         return (XEiJ.regRn[13] += 12) - 12;
 21863:       }
 21864:       //fallthrough
 21865:     case 0b011_110:  //(A6)+
 21866:       if (XEiJ.EFA_SEPARATE_AR) {
 21867:         M68kException.m6eIncremented += 12L << (6 << 3);
 21868:         return (XEiJ.regRn[14] += 12) - 12;
 21869:       }
 21870:       //fallthrough
 21871:     case 0b011_111:  //(A7)+
 21872:       if (XEiJ.EFA_SEPARATE_AR) {
 21873:         M68kException.m6eIncremented += 12L << (7 << 3);
 21874:         return (XEiJ.regRn[15] += 12) - 12;
 21875:       } else {
 21876:         M68kException.m6eIncremented += 12L << ((ea & 7) << 3);
 21877:         return (XEiJ.regRn[ea - (0b011_000 - 8)] += 12) - 12;
 21878:       }
 21879:     case 0b100_000:  //-(A0)
 21880:       if (XEiJ.EFA_SEPARATE_AR) {
 21881:         M68kException.m6eIncremented -= 12L << (0 << 3);
 21882:         return XEiJ.regRn[ 8] -= 12;
 21883:       }
 21884:       //fallthrough
 21885:     case 0b100_001:  //-(A1)
 21886:       if (XEiJ.EFA_SEPARATE_AR) {
 21887:         M68kException.m6eIncremented -= 12L << (1 << 3);
 21888:         return XEiJ.regRn[ 9] -= 12;
 21889:       }
 21890:       //fallthrough
 21891:     case 0b100_010:  //-(A2)
 21892:       if (XEiJ.EFA_SEPARATE_AR) {
 21893:         M68kException.m6eIncremented -= 12L << (2 << 3);
 21894:         return XEiJ.regRn[10] -= 12;
 21895:       }
 21896:       //fallthrough
 21897:     case 0b100_011:  //-(A3)
 21898:       if (XEiJ.EFA_SEPARATE_AR) {
 21899:         M68kException.m6eIncremented -= 12L << (3 << 3);
 21900:         return XEiJ.regRn[11] -= 12;
 21901:       }
 21902:       //fallthrough
 21903:     case 0b100_100:  //-(A4)
 21904:       if (XEiJ.EFA_SEPARATE_AR) {
 21905:         M68kException.m6eIncremented -= 12L << (4 << 3);
 21906:         return XEiJ.regRn[12] -= 12;
 21907:       }
 21908:       //fallthrough
 21909:     case 0b100_101:  //-(A5)
 21910:       if (XEiJ.EFA_SEPARATE_AR) {
 21911:         M68kException.m6eIncremented -= 12L << (5 << 3);
 21912:         return XEiJ.regRn[13] -= 12;
 21913:       }
 21914:       //fallthrough
 21915:     case 0b100_110:  //-(A6)
 21916:       if (XEiJ.EFA_SEPARATE_AR) {
 21917:         M68kException.m6eIncremented -= 12L << (6 << 3);
 21918:         return XEiJ.regRn[14] -= 12;
 21919:       }
 21920:       //fallthrough
 21921:     case 0b100_111:  //-(A7)
 21922:       if (XEiJ.EFA_SEPARATE_AR) {
 21923:         M68kException.m6eIncremented -= 12L << (7 << 3);
 21924:         return XEiJ.regRn[15] -= 12;
 21925:       } else {
 21926:         M68kException.m6eIncremented -= 12L << ((ea & 7) << 3);
 21927:         return XEiJ.regRn[ea - (0b100_000 - 8)] -= 12;
 21928:       }
 21929:     case 0b101_000:  //(d16,A0)
 21930:     case 0b101_001:  //(d16,A1)
 21931:     case 0b101_010:  //(d16,A2)
 21932:     case 0b101_011:  //(d16,A3)
 21933:     case 0b101_100:  //(d16,A4)
 21934:     case 0b101_101:  //(d16,A5)
 21935:     case 0b101_110:  //(d16,A6)
 21936:     case 0b101_111:  //(d16,A7)
 21937:       if (XEiJ.MPU_COMPOUND_POSTINCREMENT) {
 21938:         return (XEiJ.regRn[ea - (0b101_000 - 8)]  //ベースレジスタ
 21939:                 + mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS));  //pcws。ワードディスプレースメント
 21940:       } else {
 21941:         t = XEiJ.regPC;
 21942:         XEiJ.regPC = t + 2;
 21943:         return (XEiJ.regRn[ea - (0b101_000 - 8)]  //ベースレジスタ
 21944:                 + mmuReadWordSignExword (t, XEiJ.regSRS));  //pcws。ワードディスプレースメント
 21945:       }
 21946:     case 0b110_000:  //(d8,A0,Rn.wl)
 21947:     case 0b110_001:  //(d8,A1,Rn.wl)
 21948:     case 0b110_010:  //(d8,A2,Rn.wl)
 21949:     case 0b110_011:  //(d8,A3,Rn.wl)
 21950:     case 0b110_100:  //(d8,A4,Rn.wl)
 21951:     case 0b110_101:  //(d8,A5,Rn.wl)
 21952:     case 0b110_110:  //(d8,A6,Rn.wl)
 21953:     case 0b110_111:  //(d8,A7,Rn.wl)
 21954:       if (XEiJ.MPU_COMPOUND_POSTINCREMENT) {
 21955:         w = mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);  //pcwz。拡張ワード
 21956:       } else {
 21957:         w = XEiJ.regPC;
 21958:         XEiJ.regPC = w + 2;
 21959:         w = mmuReadWordZeroExword (w, XEiJ.regSRS);  //pcwz。拡張ワード
 21960:       }
 21961:       if (w << 31 - 8 < 0) {  //フルフォーマット
 21962:         XEiJ.mpuCycleCount += w << -2 == 0 ? 1 : 3;  //メモリ間接なし:メモリ間接あり
 21963:       }
 21964:       t = (((~w & 0x0180) == 0 ? 0 :  //ベースレジスタサプレス
 21965:             XEiJ.regRn[ea - (0b110_000 - 8)])  //ベースレジスタ
 21966:            + (w << 31 - 8 >= 0 ? (byte) w :  //バイトディスプレースメント
 21967:               w << 31 - 5 >= 0 ? 0 :  //ヌルベースディスプレースメント
 21968:               w << 31 - 4 >= 0 ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) :  //pcws。ワードベースディスプレースメント
 21969:               mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS)));  //pcls。ロングベースディスプレースメント
 21970:       x = ((~w & 0x0140) == 0 ? 0 :  //インデックスサプレス
 21971:            (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] :  //ワードインデックス
 21972:             XEiJ.regRn[w >> 12])  //ロングインデックス
 21973:            << (w >> 9 & 3));  //スケールファクタ。ワードインデックスのときは符号拡張してから掛ける
 21974:       return ((w & 0x0103) <= 0x0100 ? t + x :  //メモリ間接なし
 21975:               ((XEiJ.TEST_BIT_2_SHIFT ? w << 31 - 2 >= 0 : (w & 4) == 0) ? mmuReadLongData (t + x, XEiJ.regSRS) :  //プリインデックス
 21976:                mmuReadLongData (t, XEiJ.regSRS) + x)  //ポストインデックス
 21977:               + ((XEiJ.TEST_BIT_1_SHIFT ? w << 31 - 1 >= 0 : (w & 2) == 0) ? 0 :  //ヌルアウタディスプレースメント
 21978:                  (XEiJ.TEST_BIT_0_SHIFT ? w << 31 - 0 >= 0 : (w & 1) == 0) ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) :  //pcws。ワードアウタディスプレースメント
 21979:                  mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS)));  //pcls。ロングアウタディスプレースメント
 21980:     case 0b111_000:  //(xxx).W
 21981:       return mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);  //pcws
 21982:     case 0b111_001:  //(xxx).L
 21983:       return mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS);  //pcls
 21984:     }  //switch
 21985:     M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION;
 21986:     throw M68kException.m6eSignal;
 21987:   }  //efaMltExtd
 21988: 
 21989:   //a = efaLeaPea (ea)  //|  M  WXZP |
 21990:   //  LEA命令とPEA命令のオペランドの実効アドレスを求める
 21991:   //  efaCntWordとの違いはサイクル数のみ
 21992:   //  LEA命令のベースサイクル数4を含んでいるのでLEA命令ではベースサイクル数を加えなくてよい
 21993:   //  PEA命令のベースサイクル数は12-4=8
 21994:   @SuppressWarnings ("fallthrough") public static int efaLeaPea (int ea) throws M68kException {
 21995:     int t, w, x;
 21996:     switch (ea) {
 21997:     case 0b010_000:  //(A0)
 21998:       if (XEiJ.EFA_SEPARATE_AR) {
 21999:         return XEiJ.regRn[ 8];
 22000:       }
 22001:       //fallthrough
 22002:     case 0b010_001:  //(A1)
 22003:       if (XEiJ.EFA_SEPARATE_AR) {
 22004:         return XEiJ.regRn[ 9];
 22005:       }
 22006:       //fallthrough
 22007:     case 0b010_010:  //(A2)
 22008:       if (XEiJ.EFA_SEPARATE_AR) {
 22009:         return XEiJ.regRn[10];
 22010:       }
 22011:       //fallthrough
 22012:     case 0b010_011:  //(A3)
 22013:       if (XEiJ.EFA_SEPARATE_AR) {
 22014:         return XEiJ.regRn[11];
 22015:       }
 22016:       //fallthrough
 22017:     case 0b010_100:  //(A4)
 22018:       if (XEiJ.EFA_SEPARATE_AR) {
 22019:         return XEiJ.regRn[12];
 22020:       }
 22021:       //fallthrough
 22022:     case 0b010_101:  //(A5)
 22023:       if (XEiJ.EFA_SEPARATE_AR) {
 22024:         return XEiJ.regRn[13];
 22025:       }
 22026:       //fallthrough
 22027:     case 0b010_110:  //(A6)
 22028:       if (XEiJ.EFA_SEPARATE_AR) {
 22029:         return XEiJ.regRn[14];
 22030:       }
 22031:       //fallthrough
 22032:     case 0b010_111:  //(A7)
 22033:       if (XEiJ.EFA_SEPARATE_AR) {
 22034:         return XEiJ.regRn[15];
 22035:       } else {
 22036:         return XEiJ.regRn[ea - (0b010_000 - 8)];
 22037:       }
 22038:     case 0b101_000:  //(d16,A0)
 22039:     case 0b101_001:  //(d16,A1)
 22040:     case 0b101_010:  //(d16,A2)
 22041:     case 0b101_011:  //(d16,A3)
 22042:     case 0b101_100:  //(d16,A4)
 22043:     case 0b101_101:  //(d16,A5)
 22044:     case 0b101_110:  //(d16,A6)
 22045:     case 0b101_111:  //(d16,A7)
 22046:       if (XEiJ.MPU_COMPOUND_POSTINCREMENT) {
 22047:         return (XEiJ.regRn[ea - (0b101_000 - 8)]  //ベースレジスタ
 22048:                 + mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS));  //pcws。ワードディスプレースメント
 22049:       } else {
 22050:         t = XEiJ.regPC;
 22051:         XEiJ.regPC = t + 2;
 22052:         return (XEiJ.regRn[ea - (0b101_000 - 8)]  //ベースレジスタ
 22053:                 + mmuReadWordSignExword (t, XEiJ.regSRS));  //pcws。ワードディスプレースメント
 22054:       }
 22055:     case 0b110_000:  //(d8,A0,Rn.wl)
 22056:     case 0b110_001:  //(d8,A1,Rn.wl)
 22057:     case 0b110_010:  //(d8,A2,Rn.wl)
 22058:     case 0b110_011:  //(d8,A3,Rn.wl)
 22059:     case 0b110_100:  //(d8,A4,Rn.wl)
 22060:     case 0b110_101:  //(d8,A5,Rn.wl)
 22061:     case 0b110_110:  //(d8,A6,Rn.wl)
 22062:     case 0b110_111:  //(d8,A7,Rn.wl)
 22063:       if (XEiJ.MPU_COMPOUND_POSTINCREMENT) {
 22064:         w = mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);  //pcwz。拡張ワード
 22065:       } else {
 22066:         w = XEiJ.regPC;
 22067:         XEiJ.regPC = w + 2;
 22068:         w = mmuReadWordZeroExword (w, XEiJ.regSRS);  //pcwz。拡張ワード
 22069:       }
 22070:       if (w << 31 - 8 < 0) {  //フルフォーマット
 22071:         XEiJ.mpuCycleCount += w << -2 == 0 ? 1 : 3;  //メモリ間接なし:メモリ間接あり
 22072:       }
 22073:       t = (((~w & 0x0180) == 0 ? 0 :  //ベースレジスタサプレス
 22074:             XEiJ.regRn[ea - (0b110_000 - 8)])  //ベースレジスタ
 22075:            + (w << 31 - 8 >= 0 ? (byte) w :  //バイトディスプレースメント
 22076:               w << 31 - 5 >= 0 ? 0 :  //ヌルベースディスプレースメント
 22077:               w << 31 - 4 >= 0 ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) :  //pcws。ワードベースディスプレースメント
 22078:               mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS)));  //pcls。ロングベースディスプレースメント
 22079:       x = ((~w & 0x0140) == 0 ? 0 :  //インデックスサプレス
 22080:            (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] :  //ワードインデックス
 22081:             XEiJ.regRn[w >> 12])  //ロングインデックス
 22082:            << (w >> 9 & 3));  //スケールファクタ。ワードインデックスのときは符号拡張してから掛ける
 22083:       return ((w & 0x0103) <= 0x0100 ? t + x :  //メモリ間接なし
 22084:               ((XEiJ.TEST_BIT_2_SHIFT ? w << 31 - 2 >= 0 : (w & 4) == 0) ? mmuReadLongData (t + x, XEiJ.regSRS) :  //プリインデックス
 22085:                mmuReadLongData (t, XEiJ.regSRS) + x)  //ポストインデックス
 22086:               + ((XEiJ.TEST_BIT_1_SHIFT ? w << 31 - 1 >= 0 : (w & 2) == 0) ? 0 :  //ヌルアウタディスプレースメント
 22087:                  (XEiJ.TEST_BIT_0_SHIFT ? w << 31 - 0 >= 0 : (w & 1) == 0) ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) :  //pcws。ワードアウタディスプレースメント
 22088:                  mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS)));  //pcls。ロングアウタディスプレースメント
 22089:     case 0b111_000:  //(xxx).W
 22090:       return mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);  //pcws
 22091:     case 0b111_001:  //(xxx).L
 22092:       return mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS);  //pcls
 22093:     case 0b111_010:  //(d16,PC)
 22094:       t = XEiJ.regPC;
 22095:       XEiJ.regPC = t + 2;
 22096:       return (t  //ベースレジスタ
 22097:               + mmuReadWordSignExword (t, XEiJ.regSRS));  //pcws。ワードディスプレースメント
 22098:     case 0b111_011:  //(d8,PC,Rn.wl)
 22099:       t = XEiJ.regPC;
 22100:       XEiJ.regPC = t + 2;
 22101:       w = mmuReadWordZeroExword (t, XEiJ.regSRS);  //pcwz。拡張ワード
 22102:       if (w << 31 - 8 < 0) {  //フルフォーマット
 22103:         XEiJ.mpuCycleCount += w << -2 == 0 ? 1 : 3;  //メモリ間接なし:メモリ間接あり
 22104:       }
 22105:       t = (((~w & 0x0180) == 0 ? 0 :  //ベースレジスタサプレス
 22106:             t)  //ベースレジスタ
 22107:            + (w << 31 - 8 >= 0 ? (byte) w :  //バイトディスプレースメント
 22108:               w << 31 - 5 >= 0 ? 0 :  //ヌルベースディスプレースメント
 22109:               w << 31 - 4 >= 0 ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) :  //pcws。ワードベースディスプレースメント
 22110:               mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS)));  //pcls。ロングベースディスプレースメント
 22111:       x = ((~w & 0x0140) == 0 ? 0 :  //インデックスサプレス
 22112:            (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] :  //ワードインデックス
 22113:             XEiJ.regRn[w >> 12])  //ロングインデックス
 22114:            << (w >> 9 & 3));  //スケールファクタ。ワードインデックスのときは符号拡張してから掛ける
 22115:       return ((w & 0x0103) <= 0x0100 ? t + x :  //メモリ間接なし
 22116:               ((XEiJ.TEST_BIT_2_SHIFT ? w << 31 - 2 >= 0 : (w & 4) == 0) ? mmuReadLongData (t + x, XEiJ.regSRS) :  //プリインデックス
 22117:                mmuReadLongData (t, XEiJ.regSRS) + x)  //ポストインデックス
 22118:               + ((XEiJ.TEST_BIT_1_SHIFT ? w << 31 - 1 >= 0 : (w & 2) == 0) ? 0 :  //ヌルアウタディスプレースメント
 22119:                  (XEiJ.TEST_BIT_0_SHIFT ? w << 31 - 0 >= 0 : (w & 1) == 0) ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) :  //pcws。ワードアウタディスプレースメント
 22120:                  mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS)));  //pcls。ロングアウタディスプレースメント
 22121:     }  //switch
 22122:     M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION;
 22123:     throw M68kException.m6eSignal;
 22124:   }  //efaLeaPea
 22125: 
 22126:   //a = efaJmpJsr (ea)  //|  M  WXZP |
 22127:   //  JMP命令とJSR命令のオペランドの実効アドレスを求める
 22128:   //  efaCntWordとの違いはサイクル数のみ
 22129:   //  JMP命令のベースサイクル数8を含んでいるのでJMP命令ではベースサイクル数を加えなくてよい
 22130:   //  JSR命令のベースサイクル数は16-8=8
 22131:   @SuppressWarnings ("fallthrough") public static int efaJmpJsr (int ea) throws M68kException {
 22132:     int t, w, x;
 22133:     switch (ea) {
 22134:     case 0b010_000:  //(A0)
 22135:       if (XEiJ.EFA_SEPARATE_AR) {
 22136:         return XEiJ.regRn[ 8];
 22137:       }
 22138:       //fallthrough
 22139:     case 0b010_001:  //(A1)
 22140:       if (XEiJ.EFA_SEPARATE_AR) {
 22141:         return XEiJ.regRn[ 9];
 22142:       }
 22143:       //fallthrough
 22144:     case 0b010_010:  //(A2)
 22145:       if (XEiJ.EFA_SEPARATE_AR) {
 22146:         return XEiJ.regRn[10];
 22147:       }
 22148:       //fallthrough
 22149:     case 0b010_011:  //(A3)
 22150:       if (XEiJ.EFA_SEPARATE_AR) {
 22151:         return XEiJ.regRn[11];
 22152:       }
 22153:       //fallthrough
 22154:     case 0b010_100:  //(A4)
 22155:       if (XEiJ.EFA_SEPARATE_AR) {
 22156:         return XEiJ.regRn[12];
 22157:       }
 22158:       //fallthrough
 22159:     case 0b010_101:  //(A5)
 22160:       if (XEiJ.EFA_SEPARATE_AR) {
 22161:         return XEiJ.regRn[13];
 22162:       }
 22163:       //fallthrough
 22164:     case 0b010_110:  //(A6)
 22165:       if (XEiJ.EFA_SEPARATE_AR) {
 22166:         return XEiJ.regRn[14];
 22167:       }
 22168:       //fallthrough
 22169:     case 0b010_111:  //(A7)
 22170:       if (XEiJ.EFA_SEPARATE_AR) {
 22171:         return XEiJ.regRn[15];
 22172:       } else {
 22173:         return XEiJ.regRn[ea - (0b010_000 - 8)];
 22174:       }
 22175:     case 0b101_000:  //(d16,A0)
 22176:     case 0b101_001:  //(d16,A1)
 22177:     case 0b101_010:  //(d16,A2)
 22178:     case 0b101_011:  //(d16,A3)
 22179:     case 0b101_100:  //(d16,A4)
 22180:     case 0b101_101:  //(d16,A5)
 22181:     case 0b101_110:  //(d16,A6)
 22182:     case 0b101_111:  //(d16,A7)
 22183:       if (XEiJ.MPU_COMPOUND_POSTINCREMENT) {
 22184:         return (XEiJ.regRn[ea - (0b101_000 - 8)]  //ベースレジスタ
 22185:                 + mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS));  //pcws。ワードディスプレースメント
 22186:       } else {
 22187:         t = XEiJ.regPC;
 22188:         XEiJ.regPC = t + 2;
 22189:         return (XEiJ.regRn[ea - (0b101_000 - 8)]  //ベースレジスタ
 22190:                 + mmuReadWordSignExword (t, XEiJ.regSRS));  //pcws。ワードディスプレースメント
 22191:       }
 22192:     case 0b110_000:  //(d8,A0,Rn.wl)
 22193:     case 0b110_001:  //(d8,A1,Rn.wl)
 22194:     case 0b110_010:  //(d8,A2,Rn.wl)
 22195:     case 0b110_011:  //(d8,A3,Rn.wl)
 22196:     case 0b110_100:  //(d8,A4,Rn.wl)
 22197:     case 0b110_101:  //(d8,A5,Rn.wl)
 22198:     case 0b110_110:  //(d8,A6,Rn.wl)
 22199:     case 0b110_111:  //(d8,A7,Rn.wl)
 22200:       if (XEiJ.MPU_COMPOUND_POSTINCREMENT) {
 22201:         w = mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);  //pcwz。拡張ワード
 22202:       } else {
 22203:         w = XEiJ.regPC;
 22204:         XEiJ.regPC = w + 2;
 22205:         w = mmuReadWordZeroExword (w, XEiJ.regSRS);  //pcwz。拡張ワード
 22206:       }
 22207:       if (w << 31 - 8 < 0) {  //フルフォーマット
 22208:         XEiJ.mpuCycleCount += w << -2 == 0 ? 1 : 3;  //メモリ間接なし:メモリ間接あり
 22209:       }
 22210:       t = (((~w & 0x0180) == 0 ? 0 :  //ベースレジスタサプレス
 22211:             XEiJ.regRn[ea - (0b110_000 - 8)])  //ベースレジスタ
 22212:            + (w << 31 - 8 >= 0 ? (byte) w :  //バイトディスプレースメント
 22213:               w << 31 - 5 >= 0 ? 0 :  //ヌルベースディスプレースメント
 22214:               w << 31 - 4 >= 0 ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) :  //pcws。ワードベースディスプレースメント
 22215:               mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS)));  //pcls。ロングベースディスプレースメント
 22216:       x = ((~w & 0x0140) == 0 ? 0 :  //インデックスサプレス
 22217:            (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] :  //ワードインデックス
 22218:             XEiJ.regRn[w >> 12])  //ロングインデックス
 22219:            << (w >> 9 & 3));  //スケールファクタ。ワードインデックスのときは符号拡張してから掛ける
 22220:       return ((w & 0x0103) <= 0x0100 ? t + x :  //メモリ間接なし
 22221:               ((XEiJ.TEST_BIT_2_SHIFT ? w << 31 - 2 >= 0 : (w & 4) == 0) ? mmuReadLongData (t + x, XEiJ.regSRS) :  //プリインデックス
 22222:                mmuReadLongData (t, XEiJ.regSRS) + x)  //ポストインデックス
 22223:               + ((XEiJ.TEST_BIT_1_SHIFT ? w << 31 - 1 >= 0 : (w & 2) == 0) ? 0 :  //ヌルアウタディスプレースメント
 22224:                  (XEiJ.TEST_BIT_0_SHIFT ? w << 31 - 0 >= 0 : (w & 1) == 0) ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) :  //pcws。ワードアウタディスプレースメント
 22225:                  mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS)));  //pcls。ロングアウタディスプレースメント
 22226:     case 0b111_000:  //(xxx).W
 22227:       return mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS);  //pcws
 22228:     case 0b111_001:  //(xxx).L
 22229:       return mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS);  //pcls
 22230:     case 0b111_010:  //(d16,PC)
 22231:       t = XEiJ.regPC;
 22232:       XEiJ.regPC = t + 2;
 22233:       return (t  //ベースレジスタ
 22234:               + mmuReadWordSignExword (t, XEiJ.regSRS));  //pcws。ワードディスプレースメント
 22235:     case 0b111_011:  //(d8,PC,Rn.wl)
 22236:       t = XEiJ.regPC;
 22237:       XEiJ.regPC = t + 2;
 22238:       w = mmuReadWordZeroExword (t, XEiJ.regSRS);  //pcwz。拡張ワード
 22239:       if (w << 31 - 8 < 0) {  //フルフォーマット
 22240:         XEiJ.mpuCycleCount += w << -2 == 0 ? 1 : 3;  //メモリ間接なし:メモリ間接あり
 22241:       }
 22242:       t = (((~w & 0x0180) == 0 ? 0 :  //ベースレジスタサプレス
 22243:             t)  //ベースレジスタ
 22244:            + (w << 31 - 8 >= 0 ? (byte) w :  //バイトディスプレースメント
 22245:               w << 31 - 5 >= 0 ? 0 :  //ヌルベースディスプレースメント
 22246:               w << 31 - 4 >= 0 ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) :  //pcws。ワードベースディスプレースメント
 22247:               mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS)));  //pcls。ロングベースディスプレースメント
 22248:       x = ((~w & 0x0140) == 0 ? 0 :  //インデックスサプレス
 22249:            (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] :  //ワードインデックス
 22250:             XEiJ.regRn[w >> 12])  //ロングインデックス
 22251:            << (w >> 9 & 3));  //スケールファクタ。ワードインデックスのときは符号拡張してから掛ける
 22252:       return ((w & 0x0103) <= 0x0100 ? t + x :  //メモリ間接なし
 22253:               ((XEiJ.TEST_BIT_2_SHIFT ? w << 31 - 2 >= 0 : (w & 4) == 0) ? mmuReadLongData (t + x, XEiJ.regSRS) :  //プリインデックス
 22254:                mmuReadLongData (t, XEiJ.regSRS) + x)  //ポストインデックス
 22255:               + ((XEiJ.TEST_BIT_1_SHIFT ? w << 31 - 1 >= 0 : (w & 2) == 0) ? 0 :  //ヌルアウタディスプレースメント
 22256:                  (XEiJ.TEST_BIT_0_SHIFT ? w << 31 - 0 >= 0 : (w & 1) == 0) ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) :  //pcws。ワードアウタディスプレースメント
 22257:                  mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS)));  //pcls。ロングアウタディスプレースメント
 22258:     }  //switch
 22259:     M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION;
 22260:     throw M68kException.m6eSignal;
 22261:   }  //efaJmpJsr
 22262: 
 22263: 
 22264: 
 22265:   //fpkSTOL ()
 22266:   //  $FE10  __STOL
 22267:   //  10進数の文字列を32bit符号あり整数に変換する
 22268:   //  /^[ \t]*[-+]?[0-9]+/
 22269:   //  先頭の'\t'と' 'を読み飛ばす
 22270:   //  <a0.l:10進数の文字列の先頭
 22271:   //  >d0.l:32bit符号あり整数
 22272:   //  >a0.l:10進数の文字列の直後('\0'とは限らない)
 22273:   //  >ccr:0=エラーなし,CCR_N|CCR_C=文法エラー,CCR_V|CCR_C=オーバーフロー
 22274:   public static void fpkSTOL () throws M68kException {
 22275:     int a = XEiJ.regRn[8];  //a0
 22276:     int c = mmuReadByteZeroData (a, 1);
 22277:     while (c == ' ' || c == '\t') {
 22278:       c = mmuReadByteZeroData (++a, 1);
 22279:     }
 22280:     int n = '7';  //'7'=正,'8'=負
 22281:     if (c == '-') {  //負
 22282:       n = '8';
 22283:       c = mmuReadByteZeroData (++a, 1);
 22284:     } else if (c == '+') {  //正
 22285:       c = mmuReadByteZeroData (++a, 1);
 22286:     }
 22287:     if (!('0' <= c && c <= '9')) {  //数字が1つもない
 22288:       XEiJ.regRn[8] = a;  //a0
 22289:       XEiJ.regCCR = XEiJ.REG_CCR_N | XEiJ.REG_CCR_C;
 22290:       return;
 22291:     }
 22292:     int x = c - '0';  //値
 22293:     for (c = mmuReadByteZeroData (++a, 1); '0' <= c && c <= '9'; c = mmuReadByteZeroData (++a, 1)) {
 22294:       if (214748364 < x || x == 214748364 && n < c) {  //正のとき2147483647、負のとき2147483648より大きくなるときオーバーフロー
 22295:         XEiJ.regRn[8] = a;  //a0
 22296:         XEiJ.regCCR = XEiJ.REG_CCR_V | XEiJ.REG_CCR_C;
 22297:         return;
 22298:       }
 22299:       x = x * 10 + (c - '0');
 22300:     }
 22301:     if (n != '7') {  //負
 22302:       x = -x;
 22303:     }
 22304:     XEiJ.regRn[0] = x;  //d0
 22305:     XEiJ.regRn[8] = a;  //a0
 22306:     XEiJ.regCCR = 0;
 22307:   }  //fpkSTOL()
 22308: 
 22309:   //fpkLTOS ()
 22310:   //  $FE11  __LTOS
 22311:   //  32bit符号あり整数を10進数の文字列に変換する
 22312:   //  /^-?[1-9][0-9]*$/
 22313:   //  <d0.l:32bit符号あり整数
 22314:   //  <a0.l:文字列バッファの先頭
 22315:   //  >a0.l:10進数の文字列の直後('\0'の位置)
 22316:   public static void fpkLTOS () throws M68kException {
 22317:     int x = XEiJ.regRn[0];  //d0
 22318:     int a = XEiJ.regRn[8];  //a0
 22319:     if (x < 0) {  //負
 22320:       mmuWriteByteData (a++, '-', 1);
 22321:       x = -x;
 22322:     }
 22323:     long t = XEiJ.fmtBcd12 (0xffffffffL & x);  //符号は取り除いてあるがx=0x80000000の場合があるので(long)xは不可
 22324:     XEiJ.regRn[8] = a += Math.max (1, 67 - Long.numberOfLeadingZeros (t) >> 2);  //a0
 22325:     mmuWriteByteData (a, 0, 1);
 22326:     do {
 22327:       mmuWriteByteData (--a, '0' | (int) t & 15, 1);
 22328:     } while ((t >>>= 4) != 0L);
 22329:   }  //fpkLTOS()
 22330: 
 22331:   //fpkSTOH ()
 22332:   //  $FE12  __STOH
 22333:   //  16進数の文字列を32bit符号なし整数に変換する
 22334:   //  /^[0-9A-Fa-f]+/
 22335:   //  <a0.l:16進数の文字列の先頭
 22336:   //  >d0.l:32bit符号なし整数
 22337:   //  >a0.l:16進数の文字列の直後('\0'とは限らない)
 22338:   //  >ccr:0=エラーなし,CCR_N|CCR_C=文法エラー,CCR_V|CCR_C=オーバーフロー
 22339:   public static void fpkSTOH () throws M68kException {
 22340:     int a = XEiJ.regRn[8];  //a0
 22341:     int c = mmuReadByteZeroData (a, 1);
 22342:     if (!('0' <= c && c <= '9' || 'A' <= c && c <= 'F' || 'a' <= c && c <= 'f')) {  //数字が1つもない
 22343:       XEiJ.regRn[8] = a;  //a0
 22344:       XEiJ.regCCR = XEiJ.REG_CCR_N | XEiJ.REG_CCR_C;
 22345:       return;
 22346:     }
 22347:     int x = c <= '9' ? c - '0' : c <= 'F' ? c - ('A' - 10) : c - ('a' - 10);  //値
 22348:     for (c = mmuReadByteZeroData (++a, 1); '0' <= c && c <= '9' || 'A' <= c && c <= 'F' || 'a' <= c && c <= 'f'; c = mmuReadByteZeroData (++a, 1)) {
 22349:       if (0x0fffffff < x) {  //0xffffffffより大きくなるときオーバーフロー
 22350:         XEiJ.regRn[8] = a;  //a0
 22351:         XEiJ.regCCR = XEiJ.REG_CCR_V | XEiJ.REG_CCR_C;
 22352:         return;
 22353:       }
 22354:       x = x << 4 | (c <= '9' ? c - '0' : c <= 'F' ? c - ('A' - 10) : c - ('a' - 10));
 22355:     }
 22356:     XEiJ.regRn[0] = x;  //d0
 22357:     XEiJ.regRn[8] = a;  //a0
 22358:     XEiJ.regCCR = 0;
 22359:   }  //fpkSTOH()
 22360: 
 22361:   //fpkHTOS ()
 22362:   //  $FE13  __HTOS
 22363:   //  32bit符号なし整数を16進数の文字列に変換する
 22364:   //  /^[1-9A-F][0-9A-F]*$/
 22365:   //  <d0.l:32bit符号なし整数
 22366:   //  <a0.l:文字列バッファの先頭
 22367:   //  >a0.l:16進数の文字列の直後('\0'の位置)
 22368:   public static void fpkHTOS () throws M68kException {
 22369:     int x = XEiJ.regRn[0];  //d0
 22370:     int a = XEiJ.regRn[8] += Math.max (1, 35 - Integer.numberOfLeadingZeros (x) >> 2);  //a0
 22371:     mmuWriteByteData (a, 0, 1);
 22372:     do {
 22373:       int t = x & 15;
 22374:       //     t             00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f
 22375:       //   9-t             09 08 07 06 05 04 03 02 01 00 ff fe fd fc fb fa
 22376:       //   9-t>>4          00 00 00 00 00 00 00 00 00 00 ff ff ff ff ff ff
 22377:       //   9-t>>4&7        00 00 00 00 00 00 00 00 00 00 07 07 07 07 07 07
 22378:       //   9-t>>4&7|48     30 30 30 30 30 30 30 30 30 30 37 37 37 37 37 37
 22379:       //  (9-t>>4&7|48)+t  30 31 32 33 34 35 36 37 38 39 41 42 43 44 45 46
 22380:       //                    0  1  2  3  4  5  6  7  8  9  A  B  C  D  E  F
 22381:       mmuWriteByteData (--a, (9 - t >> 4 & 7 | 48) + t, 1);
 22382:     } while ((x >>>= 4) != 0);
 22383:   }  //fpkHTOS()
 22384: 
 22385:   //fpkSTOO ()
 22386:   //  $FE14  __STOO
 22387:   //  8進数の文字列を32bit符号なし整数に変換する
 22388:   //  /^[0-7]+/
 22389:   //  <a0.l:8進数の文字列の先頭
 22390:   //  >d0.l:32bit符号なし整数
 22391:   //  >a0.l:8進数の文字列の直後('\0'とは限らない)
 22392:   //  >ccr:0=エラーなし,CCR_N|CCR_C=文法エラー,CCR_V|CCR_C=オーバーフロー
 22393:   public static void fpkSTOO () throws M68kException {
 22394:     int a = XEiJ.regRn[8];  //a0
 22395:     int c = mmuReadByteZeroData (a, 1);
 22396:     if (!('0' <= c && c <= '7')) {  //数字が1つもない
 22397:       XEiJ.regRn[8] = a;  //a0
 22398:       XEiJ.regCCR = XEiJ.REG_CCR_N | XEiJ.REG_CCR_C;
 22399:       return;
 22400:     }
 22401:     int x = c - '0';  //値
 22402:     for (c = mmuReadByteZeroData (++a, 1); '0' <= c && c <= '7'; c = mmuReadByteZeroData (++a, 1)) {
 22403:       if (0x1fffffff < x) {  //0xffffffffより大きくなるときオーバーフロー
 22404:         XEiJ.regRn[8] = a;  //a0
 22405:         XEiJ.regCCR = XEiJ.REG_CCR_V | XEiJ.REG_CCR_C;
 22406:         return;
 22407:       }
 22408:       x = x << 3 | c & 7;
 22409:     }
 22410:     XEiJ.regRn[0] = x;  //d0
 22411:     XEiJ.regRn[8] = a;  //a0
 22412:     XEiJ.regCCR = 0;
 22413:   }  //fpkSTOO()
 22414: 
 22415:   //fpkOTOS ()
 22416:   //  $FE15  __OTOS
 22417:   //  32bit符号なし整数を8進数の文字列に変換する
 22418:   //  /^[1-7][0-7]*$/
 22419:   //  <d0.l:32bit符号なし整数
 22420:   //  <a0.l:文字列バッファの先頭
 22421:   //  >a0.l:8進数の文字列の直後('\0'の位置)
 22422:   public static void fpkOTOS () throws M68kException {
 22423:     int x = XEiJ.regRn[0];  //d0
 22424:     //perl optdiv.pl 34 3
 22425:     //  x/3==x*43>>>7 (0<=x<=127) [34*43==1462]
 22426:     int a = XEiJ.regRn[8] += Math.max (1, (34 - Integer.numberOfLeadingZeros (x)) * 43 >>> 7);  //a0
 22427:     mmuWriteByteData (a, 0, 1);
 22428:     do {
 22429:       mmuWriteByteData (--a, '0' | x & 7, 1);
 22430:     } while ((x >>>= 3) != 0);
 22431:   }  //fpkOTOS()
 22432: 
 22433:   //fpkSTOB ()
 22434:   //  $FE16  __STOB
 22435:   //  2進数の文字列を32bit符号なし整数に変換する
 22436:   //  /^[01]+/
 22437:   //  <a0.l:2進数の文字列の先頭
 22438:   //  >d0.l:32bit符号なし整数
 22439:   //  >a0.l:2進数の文字列の直後('\0'とは限らない)
 22440:   //  >ccr:0=エラーなし,CCR_N|CCR_C=文法エラー,CCR_V|CCR_C=オーバーフロー
 22441:   public static void fpkSTOB () throws M68kException {
 22442:     int a = XEiJ.regRn[8];  //a0
 22443:     int c = mmuReadByteZeroData (a, 1);
 22444:     if (!('0' <= c && c <= '1')) {  //数字が1つもない
 22445:       XEiJ.regRn[8] = a;  //a0
 22446:       XEiJ.regCCR = XEiJ.REG_CCR_N | XEiJ.REG_CCR_C;
 22447:       return;
 22448:     }
 22449:     int x = c - '0';  //値
 22450:     for (c = mmuReadByteZeroData (++a, 1); '0' <= c && c <= '1'; c = mmuReadByteZeroData (++a, 1)) {
 22451:       if (x < 0) {  //オーバーフロー
 22452:         XEiJ.regRn[8] = a;  //a0
 22453:         XEiJ.regCCR = XEiJ.REG_CCR_V | XEiJ.REG_CCR_C;
 22454:         return;
 22455:       }
 22456:       x = x << 1 | c & 1;
 22457:     }
 22458:     XEiJ.regRn[0] = x;  //d0
 22459:     XEiJ.regRn[8] = a;  //a0
 22460:     XEiJ.regCCR = 0;
 22461:   }  //fpkSTOB()
 22462: 
 22463:   //fpkBTOS ()
 22464:   //  $FE17  __BTOS
 22465:   //  32bit符号なし整数を2進数の文字列に変換する
 22466:   //  /^1[01]*$/
 22467:   //  <d0.l:32bit符号なし整数
 22468:   //  <a0.l:文字列バッファの先頭
 22469:   //  >a0.l:2進数の文字列の直後('\0'の位置)
 22470:   public static void fpkBTOS () throws M68kException {
 22471:     int x = XEiJ.regRn[0];  //d0
 22472:     int a = XEiJ.regRn[8] += Math.max (1, 32 - Integer.numberOfLeadingZeros (x));  //a0
 22473:     mmuWriteByteData (a, 0, 1);
 22474:     do {
 22475:       mmuWriteByteData (--a, '0' | x & 1, 1);
 22476:     } while ((x >>>= 1) != 0);
 22477:   }  //fpkBTOS()
 22478: 
 22479:   //fpkIUSING ()
 22480:   //  $FE18  __IUSING
 22481:   //  32bit符号あり整数を文字数を指定して右詰めで10進数の文字列に変換する
 22482:   //  /^ *-?[1-9][0-9]*$/
 22483:   //  <d0.l:32bit符号あり整数
 22484:   //  <d1.b:文字数
 22485:   //  <a0.l:文字列バッファの先頭
 22486:   //  >a0.l:10進数の文字列の直後('\0'の位置)
 22487:   public static void fpkIUSING () throws M68kException {
 22488:     int x = XEiJ.regRn[0];  //d0
 22489:     int n = 0;  //符号の文字数
 22490:     if (x < 0) {  //負
 22491:       n = 1;
 22492:       x = -x;
 22493:     }
 22494:     long t = XEiJ.fmtBcd12 (0xffffffffL & x);  //符号は取り除いてあるがx=0x80000000の場合があるので(long)xは不可
 22495:     int l = n + Math.max (1, 67 - Long.numberOfLeadingZeros (t) >> 2);  //符号を含めた文字数
 22496:     int a = XEiJ.regRn[8];  //a0
 22497:     for (int i = (XEiJ.regRn[1] & 255) - l; i > 0; i--) {
 22498:       mmuWriteByteData (a++, ' ', 1);
 22499:     }
 22500:     XEiJ.regRn[8] = a += l;  //a0
 22501:     mmuWriteByteData (a, 0, 1);
 22502:     do {
 22503:       mmuWriteByteData (--a, '0' | (int) t & 15, 1);
 22504:     } while ((t >>>= 4) != 0L);
 22505:     if (n != 0) {
 22506:       mmuWriteByteData (--a, '-', 1);
 22507:     }
 22508:   }  //fpkIUSING()
 22509: 
 22510:   //fpkVAL ()
 22511:   //  $FE20  __VAL
 22512:   //  文字列を64bit浮動小数点数に変換する
 22513:   //  先頭の'\t'と' 'を読み飛ばす
 22514:   //  "&B"または"&b"で始まっているときは続きを2進数とみなして__STOBで32bit符号なし整数に変換してから__LTODで64bit浮動小数点数に変換する
 22515:   //  "&O"または"&o"で始まっているときは続きを8進数とみなして__STOOで32bit符号なし整数に変換してから__LTODで64bit浮動小数点数に変換する
 22516:   //  "&H"または"&h"で始まっているときは続きを16進数とみなして__STOHで32bit符号なし整数に変換してから__LTODで64bit浮動小数点数に変換する
 22517:   //  それ以外は__STODと同じ
 22518:   //  <a0.l:文字列の先頭
 22519:   //  >d0d1.d:64bit浮動小数点数
 22520:   //  >d2.l:(先頭が'&'でないとき)65535=64bit浮動小数点数をオーバーフローなしでintに変換できる,0=それ以外
 22521:   //  >d3.l:(先頭が'&'でないとき)d2.l==65535のとき64bit浮動小数点数をintに変換した値
 22522:   //  >a0.l:変換された文字列の直後('\0'とは限らない)
 22523:   //  >ccr:0=エラーなし,CCR_N|CCR_C=文法エラー,CCR_V|CCR_C=オーバーフロー
 22524:   public static void fpkVAL () throws M68kException {
 22525:     int a = XEiJ.regRn[8];  //a0
 22526:     //先頭の空白を読み飛ばす
 22527:     int c = mmuReadByteSignData (a++, 1);
 22528:     while (c == ' ' || c == '\t') {
 22529:       c = mmuReadByteSignData (a++, 1);
 22530:     }
 22531:     if (c == '&') {  //&B,&O,&H
 22532:       c = mmuReadByteSignData (a++, 1) & 0xdf;
 22533:       XEiJ.regRn[8] = a;  //&?の直後
 22534:       if (c == 'B') {
 22535:         fpkSTOB ();
 22536:         FEFunction.fpkLTOD ();
 22537:       } else if (c == 'O') {
 22538:         fpkSTOO ();
 22539:         FEFunction.fpkLTOD ();
 22540:       } else if (c == 'H') {
 22541:         fpkSTOH ();
 22542:         FEFunction.fpkLTOD ();
 22543:       } else {
 22544:         XEiJ.regCCR = XEiJ.REG_CCR_N | XEiJ.REG_CCR_C;  //文法エラー
 22545:       }
 22546:     } else {  //&B,&O,&H以外
 22547:       fpkSTOD ();
 22548:     }
 22549:   }  //fpkVAL()
 22550: 
 22551:   //fpkUSING ()
 22552:   //  $FE21  __USING
 22553:   //  64bit浮動小数点数をアトリビュートを指定して文字列に変換する
 22554:   //  メモ
 22555:   //    bit1の'\\'とbit4の'+'を両方指定したときは'\\'が右側。先頭に"+\\"を付ける
 22556:   //    bit1の'\\'とbit2の','とbit4の'+'は整数部の桁数が足りないとき数字を右にずらして押し込まれる
 22557:   //    bit3で指数形式を指示しなければ指数部が極端に大きくても極端に小さくても指数形式にならない
 22558:   //    bit3で指数形式を指定したときbit1の'\\'とbit2の','は無効
 22559:   //    bit4とbit5とbit6はbit4>bit5>bit6の順位で1つだけ有効
 22560:   //    有効数字は14桁で15桁目以降はすべて0
 22561:   //    FLOAT2.Xは整数部の0でない最初の数字から256文字目までで打ち切られてしまう
 22562:   //    整数部の桁数に余裕があれば左側の空白は出力されるので文字列の全体が常に256バイトに収まるわけではない
 22563:   //      using 1234.5 5 0 0    " 1235."
 22564:   //      using 1234.5 5 1 0    " 1234.5"
 22565:   //      using 1234.5 5 2 0    " 1234.50"
 22566:   //      using 1234.5 6 2 1    "**1234.50"
 22567:   //      using 1234.5 6 2 2    " \\1234.50"
 22568:   //      using 1234.5 6 2 3    "*\\1234.50"
 22569:   //      using 1234.5 6 2 4    " 1,234.50"
 22570:   //      using 1234.5 4 2 4    "1,234.50"
 22571:   //      using 1234.5 4 2 5    "1,234.50"
 22572:   //      using 1234.5 4 2 6    "\\1,234.50"
 22573:   //      using 1234.5 4 2 7    "\\1,234.50"
 22574:   //      using 1234.5 4 2 16   "+1234.50"
 22575:   //      using 1234.5 4 2 22   "+\\1,234.50"
 22576:   //      using 1234.5 4 2 32   "1234.50+"
 22577:   //      using 1234.5 4 2 48   "+1234.50"
 22578:   //      using 1234.5 4 2 64   "1234.50 "
 22579:   //      using 1234.5 4 2 80   "+1234.50"
 22580:   //      using 1234.5 4 2 96   "1234.50+"
 22581:   //      using 12345678901234567890 10 1 0      "12345678901235000000.0"
 22582:   //      using 12345678901234567890e+10 10 1 0  "123456789012350000000000000000.0"
 22583:   //      using 0.3333 0 0 0    "."
 22584:   //      using 0.6666 0 0 0    "1."
 22585:   //      using 0.6666 0 3 0    ".667"
 22586:   //      using 0.6666 3 0 0    "  1."
 22587:   //      using 0.3333 0 0 2    "\\."
 22588:   //      using 0.3333 0 0 16   "+."
 22589:   //      using 0.3333 0 0 18   "+\\."
 22590:   //      using 1e-10 3 3 0     "  0.000"
 22591:   //    指数形式の出力は不可解で本来の動作ではないように思えるが、
 22592:   //    X-BASICのprint using命令が使っているのでFLOAT2.Xに合わせておいた方がよさそう
 22593:   //      print using "###.##";1.23         "  1.23"         整数部の桁数は3
 22594:   //      print using "+##.##";1.23         " +1.23"         整数部の桁数は3←
 22595:   //      print using "###.##^^^^^";1.23    " 12.30E-001"    整数部の桁数は3
 22596:   //      print using "+##.##^^^^^";1.23    "+12.30E-001"    整数部の桁数は2←
 22597:   //    FLOAT2.Xでは#NANと#INFは4桁の整数のように出力される。末尾に小数点が付くが小数部には何も出力されない
 22598:   //      using -#INF 7 3 23     "*-\\#,INF."
 22599:   //    FLOAT2.Xで#NANと#INFを指数形式にするとさらに不可解。これはバグと言ってよいと思う
 22600:   //      using #INF 10 10 8      " #INFE-005"
 22601:   //    ここでは#NANと#INFは整数部と小数点と小数部と指数部の全体を使って右寄せにする
 22602:   //  <d0d1.d:64bit浮動小数点数
 22603:   //  <d2.l:整数部の桁数
 22604:   //  <d3.l:小数部の桁数
 22605:   //  <d4.l:アトリビュート
 22606:   //    bit0  左側を'*'で埋める
 22607:   //    bit1  先頭に'\\'を付ける
 22608:   //    bit2  整数部を3桁毎に','で区切る
 22609:   //    bit3  指数形式
 22610:   //    bit4  先頭に符号('+'または'-')を付ける
 22611:   //    bit5  末尾に符号('+'または'-')を付ける
 22612:   //    bit6  末尾に符号(' 'または'-')を付ける
 22613:   //  <a0.l:文字列バッファの先頭
 22614:   //  a0は変化しない
 22615:   public static void fpkUSING () throws M68kException {
 22616:     fpkUSINGSub ((long) XEiJ.regRn[0] << 32 | 0xffffffffL & XEiJ.regRn[1]);  //64bit浮動小数点数
 22617:   }  //fpkUSING()
 22618:   public static void fpkUSINGSub (long l) throws M68kException {
 22619:     int len1 = Math.max (0, XEiJ.regRn[2]);  //整数部の桁数
 22620:     int len2 = Math.max (0, XEiJ.regRn[3]);  //小数部の桁数
 22621:     int attr = XEiJ.regRn[4];  //アトリビュート
 22622:     int a = XEiJ.regRn[8];  //文字列バッファの先頭
 22623:     boolean exp = (attr & 8) != 0;  //true=指数形式
 22624:     int spc = (attr & 1) != 0 ? '*' : ' ';  //先頭の空白を充填する文字
 22625:     int yen = (attr & 2) != 0 ? '\\' : 0;  //先頭の'\\'
 22626:     int cmm = !exp && (attr & 4) != 0 ? ',' : 0;  //3桁毎に入れる','
 22627:     //符号
 22628:     int sgn1 = 0;  //先頭の符号
 22629:     int sgn2 = 0;  //末尾の符号
 22630:     if (l < 0L) {  //負
 22631:       if ((attr & 32 + 64) == 0) {  //末尾に符号を付けない
 22632:         sgn1 = '-';  //先頭の符号
 22633:       } else {  //末尾に符号を付ける
 22634:         sgn2 = '-';  //末尾の符号
 22635:       }
 22636:       l &= 0x7fffffffffffffffL;  //符号bitを消しておく
 22637:     } else {  //正
 22638:       if ((attr & 16) != 0) {  //先頭に符号('+'または'-')を付ける
 22639:         sgn1 = '+';
 22640:       } else if ((attr & 16 + 32) == 32) {  //末尾に符号('+'または'-')を付ける
 22641:         sgn2 = '+';
 22642:       } else if ((attr & 16 + 32 + 64) == 64) {  //末尾に符号(' 'または'-')を付ける
 22643:         sgn2 = ' ';
 22644:       }
 22645:     }
 22646:     double x = Double.longBitsToDouble (l);  //絶対値
 22647:     int e = (int) (l >>> 52) - 1023;  //指数部。ゲタ0。符号bitは消してあるのでマスクは不要
 22648:     l &= 0x000fffffffffffffL;  //仮数部の小数部。正規化数のとき整数部の1が付いていないことに注意
 22649:     //±0,±Inf,NaN
 22650:     if (e == -1023) {  //±0,非正規化数
 22651:       if (l == 0L) {  //±0
 22652:         for (int i = len1 - ((sgn1 != 0 ? 1 : 0) +  //先頭の符号
 22653:                              (yen != 0 ? 1 : 0) +  //'\\'
 22654:                              1  //数字
 22655:                              ); 0 < i; i--) {
 22656:           mmuWriteByteData (a++, spc, 1);  //空白
 22657:         }
 22658:         if (sgn1 != 0) {
 22659:           mmuWriteByteData (a++, sgn1, 1);  //先頭の符号
 22660:         }
 22661:         if (yen != 0) {
 22662:           mmuWriteByteData (a++, yen, 1);  //'\\'
 22663:         }
 22664:         if (0 < len1) {
 22665:           mmuWriteByteData (a++, '0', 1);  //整数部
 22666:         }
 22667:         mmuWriteByteData (a++, '.', 1);  //小数点
 22668:         for (; 0 < len2; len2--) {
 22669:           mmuWriteByteData (a++, '0', 1);  //小数部
 22670:         }
 22671:         mmuWriteByteData (a, '\0', 1);
 22672:         return;
 22673:       }
 22674:       e -= Long.numberOfLeadingZeros (l) - 12;  //非正規化数の指数部を補正する
 22675:     } else if (e == 1024) {  //±Inf,NaN
 22676:       for (int i = len1 + 1 + len2 + (exp ? 5 : 0) -  //整数部と小数点と小数部と指数部の全体を使って右寄せにする
 22677:            ((sgn1 != 0 ? 1 : 0) +  //先頭の符号
 22678:             (yen != 0 ? 1 : 0) +  //'\\'
 22679:             4  //文字
 22680:             ); 0 < i; i--) {
 22681:         mmuWriteByteData (a++, spc, 1);  //空白
 22682:       }
 22683:       if (sgn1 != 0) {
 22684:         mmuWriteByteData (a++, sgn1, 1);  //先頭の符号
 22685:       }
 22686:       if (yen != 0) {
 22687:         mmuWriteByteData (a++, yen, 1);  //'\\'
 22688:       }
 22689:       mmuWriteByteData (a++, '#', 1);
 22690:       if (l == 0L) {  //±Inf
 22691:         mmuWriteByteData (a++, 'I', 1);
 22692:         mmuWriteByteData (a++, 'N', 1);
 22693:         mmuWriteByteData (a++, 'F', 1);
 22694:       } else {  //NaN
 22695:         mmuWriteByteData (a++, 'N', 1);
 22696:         mmuWriteByteData (a++, 'A', 1);
 22697:         mmuWriteByteData (a++, 'N', 1);
 22698:       }
 22699:       mmuWriteByteData (a, '\0', 1);
 22700:       return;
 22701:     }
 22702:     //10進数で表現したときの指数部を求める
 22703:     //  10^e<=x<10^(e+1)となるeを求める
 22704:     e = (int) Math.floor ((double) e * 0.30102999566398119521373889472);  //log10(2)
 22705:     //10^-eを掛けて1<=x<10にする
 22706:     //  非正規化数の最小値から正規化数の最大値まで処理できなければならない
 22707:     //  10^-eを計算してからまとめて掛ける方法はxが非正規化数のとき10^-eがオーバーフローしてしまうので不可
 22708:     //    doubleは非正規化数の逆数を表現できない
 22709:     if (0 < e) {  //10<=x
 22710:       x *= FEFunction.FPK_TEN_M16QR[e & 15];
 22711:       if (16 <= e) {
 22712:         x *= FEFunction.FPK_TEN_M16QR[16 + (e >> 4 & 15)];
 22713:         if (256 <= e) {
 22714:           x *= FEFunction.FPK_TEN_M16QR[33];  //FEFunction.FPK_TEN_M16QR[32 + (e >> 8)]
 22715:         }
 22716:       }
 22717:     } else if (e < 0) {  //x<1
 22718:       x *= FEFunction.FPK_TEN_P16QR[-e & 15];
 22719:       if (e <= -16) {
 22720:         x *= FEFunction.FPK_TEN_P16QR[16 + (-e >> 4 & 15)];
 22721:         if (e <= -256) {
 22722:           x *= FEFunction.FPK_TEN_P16QR[33];  //FEFunction.FPK_TEN_P16QR[32 + (-e >> 8)]
 22723:         }
 22724:       }
 22725:     }
 22726:     //整数部2桁、小数部16桁の10進数に変換する
 22727:     //  1<=x<10なのでw[1]が先頭になるはずだが誤差で前後にずれる可能性がある
 22728:     int[] w = new int[18];
 22729:     {
 22730:       int d = (int) x;
 22731:       int t = XEiJ.FMT_BCD4[d];
 22732:       w[0] = t >> 4;
 22733:       w[1] = t      & 15;
 22734:       for (int i = 2; i < 18; i += 4) {
 22735:         //xを10000倍して整数部dを引くことで小数部を残すが、このとき情報落ちが発生して誤差が蓄積する
 22736:         //Double-Doubleの乗算の要領で10000倍を正確に行い、誤差の蓄積を回避する
 22737:         //x = (x - (double) d) * 10000.0;
 22738:         double xh = x * 0x8000001p0;
 22739:         xh += x - xh;  //xの上半分
 22740:         x = (xh - (double) d) * 10000.0 + (x - xh) * 10000.0;
 22741:         d = (int) x;
 22742:         t = XEiJ.FMT_BCD4[d];
 22743:         w[i    ] = t >> 12;
 22744:         w[i + 1] = t >>  8 & 15;
 22745:         w[i + 2] = t >>  4 & 15;
 22746:         w[i + 3] = t       & 15;
 22747:       }
 22748:     }
 22749:     //先頭の位置を確認する
 22750:     //  w[h]が先頭(0でない最初の数字)の位置
 22751:     int h = w[0] != 0 ? 0 : w[1] != 0 ? 1 : 2;
 22752:     //14+1桁目を四捨五入する
 22753:     int o = h + 14;  //w[o]は四捨五入する桁の位置。w[]の範囲内
 22754:     if (5 <= w[o]) {
 22755:       int i = o;
 22756:       while (10 <= ++w[--i]) {
 22757:         w[i] = 0;
 22758:       }
 22759:       if (i < h) {  //先頭から繰り上がった。このとき新しい先頭は1でそれ以外はすべて0
 22760:         h--;  //先頭を左にずらす
 22761:         o--;  //末尾を左にずらす
 22762:       }
 22763:     }
 22764:     //先頭の位置に応じて指数部を更新する
 22765:     //  w[h]が整数部、w[h+1..13]が小数部。10^eの小数点はw[h]の右側。整数部の桁数はe+1桁
 22766:     e -= h - 1;
 22767:     //整数部の桁数を調節する
 22768:     int ee = !exp ? e : Math.max (0, sgn1 != 0 || sgn2 != 0 ? len1 : len1 - 1) - 1;  //整数部の桁数-1。整数部の桁数はee+1桁。指数部はe-ee
 22769:     //小数点以下len2+1桁目が先頭から14+1桁目よりも左側にあるときその桁で改めて四捨五入する
 22770:     //  あらかじめ14+1桁目で四捨五入しておかないと、
 22771:     //  1.5の5を四捨五入しなければならないときに誤差で1.499…になったまま4を四捨五入しようとして失敗することがある
 22772:     int s = h + ee + 1 + len2;  //w[s]は小数点以下len2+1桁目の位置。w.length<=sの場合があることに注意
 22773:     if (s < o) {
 22774:       o = s;  //w[o]は四捨五入する桁の位置。o<0の場合があることに注意
 22775:       if (0 <= o && 5 <= w[o]) {
 22776:         int i = o;
 22777:         while (10 <= ++w[--i]) {
 22778:           w[i] = 0;
 22779:         }
 22780:         if (i < h) {  //先頭から繰り上がった。このとき新しい先頭は1でそれ以外はすべて0
 22781:           h--;  //先頭を左にずらす
 22782:           if (!exp) {  //指数形式でないとき
 22783:             ee++;  //左に1桁伸ばす。全体の桁数が1桁増える
 22784:           } else {  //指数形式のとき
 22785:             e++;  //指数部を1増やす
 22786:             o--;  //末尾を左にずらす。全体の桁数は変わらない
 22787:           }
 22788:         }
 22789:       }
 22790:     }
 22791:     //文字列に変換する
 22792:     if (0 <= ee) {  //1<=x
 22793:       for (int i = len1 - ((sgn1 != 0 ? 1 : 0) +  //先頭の符号
 22794:                            (yen != 0 ? 1 : 0) +  //'\\'
 22795:                            (cmm != 0 ? ee / 3 : 0) +  //','
 22796:                            ee + 1  //数字
 22797:                            ); 0 < i; i--) {
 22798:         mmuWriteByteData (a++, spc, 1);  //空白
 22799:       }
 22800:       if (sgn1 != 0) {
 22801:         mmuWriteByteData (a++, sgn1, 1);  //先頭の符号
 22802:       }
 22803:       if (yen != 0) {
 22804:         mmuWriteByteData (a++, yen, 1);  //'\\'
 22805:       }
 22806:       for (int i = ee; 0 <= i; i--) {
 22807:         mmuWriteByteData (a++, h < o ? '0' + w[h] : '0', 1);  //整数部
 22808:         h++;
 22809:         if (cmm != 0 && 0 < i && i % 3 == 0) {
 22810:           mmuWriteByteData (a++, cmm, 1);  //','
 22811:         }
 22812:       }
 22813:       mmuWriteByteData (a++, '.', 1);  //小数点
 22814:       for (; 0 < len2; len2--) {
 22815:         mmuWriteByteData (a++, h < o ? '0' + w[h] : '0', 1);  //小数部
 22816:         h++;
 22817:       }
 22818:     } else {  //x<1
 22819:       for (int i = len1 - ((sgn1 != 0 ? 1 : 0) +  //先頭の符号
 22820:                            (yen != 0 ? 1 : 0) +  //'\\'
 22821:                            1  //数字
 22822:                            ); 0 < i; i--) {
 22823:         mmuWriteByteData (a++, spc, 1);  //空白
 22824:       }
 22825:       if (sgn1 != 0) {
 22826:         mmuWriteByteData (a++, sgn1, 1);  //先頭の符号
 22827:       }
 22828:       if (yen != 0) {
 22829:         mmuWriteByteData (a++, yen, 1);  //'\\'
 22830:       }
 22831:       if (0 < len1) {
 22832:         mmuWriteByteData (a++, '0', 1);  //整数部
 22833:       }
 22834:       mmuWriteByteData (a++, '.', 1);  //小数点
 22835:       for (int i = -1 - ee; 0 < len2 && 0 < i; len2--, i--) {
 22836:         mmuWriteByteData (a++, '0', 1);  //小数部の先頭の0の並び
 22837:       }
 22838:       for (; 0 < len2; len2--) {
 22839:         mmuWriteByteData (a++, h < o ? '0' + w[h] : '0', 1);  //小数部
 22840:         h++;
 22841:       }
 22842:     }
 22843:     if (exp) {
 22844:       e -= ee;
 22845:       mmuWriteByteData (a++, 'E', 1);  //指数部の始まり
 22846:       if (0 <= e) {
 22847:         mmuWriteByteData (a++, '+', 1);  //指数部の正符号。省略しない
 22848:       } else {
 22849:         mmuWriteByteData (a++, '-', 1);  //指数部の負符号
 22850:         e = -e;
 22851:       }
 22852:       e = XEiJ.FMT_BCD4[e];
 22853:       mmuWriteByteData (a++, '0' + (e >> 8     ), 1);  //指数部の100の位。0でも省略しない
 22854:       mmuWriteByteData (a++, '0' + (e >> 4 & 15), 1);  //指数部の10の位
 22855:       mmuWriteByteData (a++, '0' + (e      & 15), 1);  //指数部の1の位
 22856:     }
 22857:     if (sgn2 != 0) {
 22858:       mmuWriteByteData (a++, sgn2, 1);  //末尾の符号
 22859:     }
 22860:     mmuWriteByteData (a, '\0', 1);
 22861:   }  //fpkUSINGSub6(long)
 22862: 
 22863:   //fpkSTOD ()
 22864:   //  $FE22  __STOD
 22865:   //  文字列を64bit浮動小数点数に変換する
 22866:   //  先頭の'\t'と' 'を読み飛ばす
 22867:   //  "#INF"は無限大、"#NAN"は非数とみなす
 22868:   //  バグ
 22869:   //    FLOAT2.X 2.02/2.03は誤差が大きい
 22870:   //      "1.7976931348623E+308"=0x7fefffffffffffb0が0x7fefffffffffffb3になる
 22871:   //      "1.5707963267949"=0x3ff921fb54442d28が0x3ff921fb54442d26になる
 22872:   //      "4.9406564584125E-324"(非正規化数の最小値よりもわずかに大きい)がエラーになる
 22873:   //    FLOAT2.X 2.02/2.03は"-0"が+0になる
 22874:   //    FLOAT4.X 1.02は"-0"が+0になる(実機で確認済み)
 22875:   //    FLOAT2.X 2.02/2.03は"-#INF"が+Infになる
 22876:   //      print val("-#INF")で再現できる
 22877:   //      '-'を符号として解釈しておきながら結果の無限大に符号を付けるのを忘れている
 22878:   //    FLOAT2.X 2.02/2.03は".#INF"が+Infになる
 22879:   //      print val(".#INF")で再現できる
 22880:   //    FLOAT4.X 1.02は"#NAN","#INF","-#INF"を読み取ったときa0が文字列の直後ではなく最後の文字を指している
 22881:   //  <a0.l:文字列の先頭
 22882:   //  >d0d1.d:64bit浮動小数点数
 22883:   //  >d2.l:65535=64bit浮動小数点数をオーバーフローなしでintに変換できる,0=それ以外
 22884:   //  >d3.l:d2.l==65535のとき64bit浮動小数点数をintに変換した値
 22885:   //  >a0.l:変換された文字列の直後('\0'とは限らない)
 22886:   //  >ccr:0=エラーなし,CCR_N|CCR_C=文法エラー,CCR_V|CCR_C=オーバーフロー
 22887:   public static void fpkSTOD () throws M68kException {
 22888:     long l = Double.doubleToLongBits (fpkSTODSub ());
 22889:     if (FEFunction.FPK_FPCP_NAN && l == 0x7ff8000000000000L) {
 22890:       l = 0x7fffffffffffffffL;
 22891:     }
 22892:     XEiJ.regRn[0] = (int) (l >> 32);  //d0
 22893:     XEiJ.regRn[1] = (int) l;  //d1
 22894:   }  //fpkSTOD()
 22895:   public static double fpkSTODSub () throws M68kException {
 22896:     int a = XEiJ.regRn[8];  //a0
 22897:     //先頭の空白を読み飛ばす
 22898:     int c = mmuReadByteSignData (a, 1);
 22899:     while (c == ' ' || c == '\t') {
 22900:       c = mmuReadByteSignData (++a, 1);
 22901:     }
 22902:     //符号を読み取る
 22903:     double s = 1.0;  //仮数部の符号
 22904:     if (c == '+') {
 22905:       c = mmuReadByteSignData (++a, 1);
 22906:     } else if (c == '-') {
 22907:       s = -s;
 22908:       c = mmuReadByteSignData (++a, 1);
 22909:     }
 22910:     //#NANと#INFを処理する
 22911:     if (c == '#') {
 22912:       c = mmuReadByteSignData (a + 1, 1);
 22913:       if (c == 'N' || c == 'I') {  //小文字は不可
 22914:         c = c << 8 | mmuReadByteZeroData (a + 2, 1);
 22915:         if (c == ('N' << 8 | 'A') || c == ('I' << 8 | 'N')) {
 22916:           c = c << 8 | mmuReadByteZeroData (a + 3, 1);
 22917:           if (c == ('N' << 16 | 'A' << 8 | 'N') || c == ('I' << 16 | 'N' << 8 | 'F')) {
 22918:             XEiJ.regRn[2] = 0;  //d2
 22919:             XEiJ.regRn[3] = 0;  //d3
 22920:             XEiJ.regRn[8] = a + 4;  //a0。"#NAN"または"#INF"のときだけ直後まで進める。それ以外は'#'の位置で止める
 22921:             XEiJ.regCCR = 0;  //エラーなし。"#INF"はオーバーフローとみなされない
 22922:             return c == ('N' << 16 | 'A' << 8 | 'N') ? Double.NaN : s * Double.POSITIVE_INFINITY;
 22923:           }
 22924:         }
 22925:       }
 22926:       XEiJ.regRn[8] = a;  //a0。'#'の位置で止める
 22927:       XEiJ.regCCR = XEiJ.REG_CCR_N | XEiJ.REG_CCR_C;  //文法エラー
 22928:       return 0.0;
 22929:     }  //if c=='#'
 22930:     //仮数部を読み取る
 22931:     //  数字を1000個並べてからe-1000などと書いてあるとき途中でオーバーフローすると困るので、
 22932:     //  多すぎる数字の並びは先頭の有効数字だけ読み取って残りは桁数だけ数えて読み飛ばす
 22933:     long u = 0L;  //仮数部
 22934:     int n = 0;  //0以外の最初の数字から数えて何桁目か
 22935:     int e = 1;  //-小数部の桁数。1=整数部
 22936:     if (c == '.') {  //仮数部の先頭が小数点
 22937:       e = 0;  //小数部開始
 22938:       c = mmuReadByteSignData (++a, 1);
 22939:     }
 22940:     if (c < '0' || '9' < c) {  //仮数部に数字がない
 22941:       XEiJ.regRn[8] = a;  //a0
 22942:       XEiJ.regCCR = XEiJ.REG_CCR_N | XEiJ.REG_CCR_C;  //文法エラー
 22943:       return 0.0;
 22944:     }
 22945:     double x = 0.0;
 22946:     do {
 22947:       if (0 < n || '0' < c) {  //0以外
 22948:         n++;  //0以外の最初の数字から数えて何桁目か
 22949:       }
 22950:       if (e <= 0 && n <= 18) {  //小数部で18桁目まで
 22951:         e--;  //-小数部の桁数
 22952:       }
 22953:       if (0 < n && n <= 18) {  //1桁目から18桁目まで
 22954:         u = u * 10L + (long) (c - '0');
 22955:       }
 22956:       c = mmuReadByteSignData (++a, 1);
 22957:       if (0 < e && c == '.') {  //整数部で小数点が出てきた
 22958:         e = 0;  //小数部開始
 22959:         c = mmuReadByteSignData (++a, 1);
 22960:       }
 22961:     } while ('0' <= c && c <= '9');
 22962:     if (0 < e) {  //小数点が出てこなかった
 22963:       e = 18 < n ? n - 18 : 0;  //整数部を読み飛ばした桁数が(-小数部の桁数)
 22964:     }
 22965:     //  1<=u<10^18  整数なので誤差はない
 22966:     //  0<e   小数点がなくて整数部が19桁以上あって末尾を読み飛ばした
 22967:     //  e==0  小数点がなくて整数部が18桁以内で末尾を読み飛ばさなかった
 22968:     //        小数点があって小数点で終わっていた
 22969:     //  e<0   小数点があって小数部が1桁以上あった
 22970:     //指数部を読み取る
 22971:     if (c == 'E' || c == 'e') {
 22972:       c = mmuReadByteSignData (++a, 1);
 22973:       int t = 1;  //指数部の符号
 22974:       if (c == '+') {
 22975:         c = mmuReadByteSignData (++a, 1);
 22976:       } else if (c == '-') {
 22977:         t = -t;
 22978:         c = mmuReadByteSignData (++a, 1);
 22979:       }
 22980:       if (c < '0' || '9' < c) {  //指数部に数字がない
 22981:         XEiJ.regRn[8] = a;  //a0
 22982:         XEiJ.regCCR = XEiJ.REG_CCR_N | XEiJ.REG_CCR_C;  //文法エラー
 22983:         return 0.0;
 22984:       }
 22985:       while (c == '0') {  //先頭の0を読み飛ばす
 22986:         c = mmuReadByteSignData (++a, 1);
 22987:       }
 22988:       int p = 0;
 22989:       for (int j = 0; '0' <= c && c <= '9' && j < 9; j++) {  //0以外の数字が出てきてから最大で9桁目まで読み取る。Human68kの環境では数字を1GBも並べることはできないのでオーバーフローの判定には9桁あれば十分
 22990:         p = p * 10 + (c - '0');
 22991:         c = mmuReadByteSignData (++a, 1);
 22992:       }
 22993:       e += t * p;
 22994:     }
 22995:     //符号と仮数部と指数部を合わせる
 22996:     //  x=s*x*10^e
 22997:     //  1<=u<10^18なのでeが範囲を大きく外れている場合を先に除外する
 22998:     if (e < -350) {
 22999:       XEiJ.regRn[2] = 65535;  //d2。-1ではない
 23000:       XEiJ.regRn[3] = 0;  //d3
 23001:       XEiJ.regRn[8] = a;  //a0
 23002:       XEiJ.regCCR = 0;  //エラーなし。アンダーフローはエラーとみなされない
 23003:       return s < 0.0 ? -0.0 : 0.0;
 23004:     }
 23005:     if (350 < e) {
 23006:       XEiJ.regRn[2] = 0;  //d2
 23007:       XEiJ.regRn[3] = 0;  //d3
 23008:       XEiJ.regRn[8] = a;  //a0
 23009:       XEiJ.regCCR = XEiJ.REG_CCR_V | XEiJ.REG_CCR_C;  //オーバーフロー
 23010:       return s * Double.POSITIVE_INFINITY;
 23011:     }
 23012:     if (true) {
 23013:       QFP xx = new QFP (s < 0.0 ? -u : u);  //符号と仮数部
 23014:       if (0 < e) {
 23015:         xx.mul (QFP.QFP_TEN_P16QR[e & 15]);
 23016:         if (16 <= e) {
 23017:           xx.mul (QFP.QFP_TEN_P16QR[16 + (e >> 4 & 15)]);
 23018:           if (256 <= e) {
 23019:             xx.mul (QFP.QFP_TEN_P16QR[33]);
 23020:           }
 23021:         }
 23022:       } else if (e < 0) {
 23023:         xx.mul (QFP.QFP_TEN_M16QR[-e & 15]);
 23024:         if (e <= -16) {
 23025:           xx.mul (QFP.QFP_TEN_M16QR[16 + (-e >> 4 & 15)]);
 23026:           if (e <= -256) {
 23027:             xx.mul (QFP.QFP_TEN_M16QR[33]);
 23028:           }
 23029:         }
 23030:       }
 23031:       x = xx.getd ();
 23032:     } else {
 23033:       x = s * (double) u;  //符号と仮数部
 23034:       if (0 < e) {
 23035:         x *= FEFunction.FPK_TEN_P16QR[e & 15];
 23036:         if (16 <= e) {
 23037:           x *= FEFunction.FPK_TEN_P16QR[16 + (e >> 4 & 15)];
 23038:           if (256 <= e) {
 23039:             x *= FEFunction.FPK_TEN_P16QR[33];  //FEFunction.FPK_TEN_P16QR[32 + (e >> 8)]
 23040:           }
 23041:         }
 23042:       } else if (e < 0) {
 23043:         x /= FEFunction.FPK_TEN_P16QR[-e & 15];
 23044:         if (e <= -16) {
 23045:           x /= FEFunction.FPK_TEN_P16QR[16 + (-e >> 4 & 15)];
 23046:           if (e <= -256) {
 23047:             x /= FEFunction.FPK_TEN_P16QR[33];  //FEFunction.FPK_TEN_P16QR[32 + (-e >> 8)]
 23048:           }
 23049:         }
 23050:       }
 23051:     }
 23052:     if (Double.isInfinite (x)) {
 23053:       XEiJ.regRn[8] = a;  //a0
 23054:       XEiJ.regCCR = XEiJ.REG_CCR_V | XEiJ.REG_CCR_C;  //オーバーフロー
 23055:       return x;
 23056:     }
 23057:     //  アンダーフローで0になっている場合がある
 23058:     if (x == (double) ((int) x)) {  //intで表現できる。+0.0==-0.0==0なので±0.0を含む
 23059:       XEiJ.regRn[2] = 65535;  //d2。-1ではない
 23060:       XEiJ.regRn[3] = (int) x;  //d3
 23061:     } else {  //intで表現できない
 23062:       XEiJ.regRn[2] = 0;  //d2
 23063:       XEiJ.regRn[3] = 0;  //d3
 23064:     }
 23065:     XEiJ.regRn[8] = a;  //a0
 23066:     XEiJ.regCCR = 0;  //エラーなし
 23067:     return x;
 23068:   }  //fpkSTODSub()
 23069: 
 23070:   //fpkDTOS ()
 23071:   //  $FE23  __DTOS
 23072:   //  64bit浮動小数点数を文字列に変換する
 23073:   //  無限大は"#INF"、非数は"#NAN"になる
 23074:   //  指数形式の境目
 23075:   //    x<10^-4または10^14<=xのとき指数形式にする
 23076:   //    FLOAT2.X/FLOAT4.Xの場合
 23077:   //      3f2fffffffffff47  2.4414062499999E-004
 23078:   //      3f2fffffffffff48  0.000244140625
 23079:   //      42d6bcc41e8fffdf  99999999999999
 23080:   //      42d6bcc41e8fffe0  1E+014
 23081:   //  <d0d1.d:64bit浮動小数点数
 23082:   //  <a0.l:文字列バッファの先頭
 23083:   //  >a0.l:末尾の'\0'の位置
 23084:   public static void fpkDTOS () throws M68kException {
 23085:     fpkDTOSSub ((long) XEiJ.regRn[0] << 32 | 0xffffffffL & XEiJ.regRn[1]);  //64bit浮動小数点数
 23086:   }  //fpkDTOS()
 23087:   public static void fpkDTOSSub (long l) throws M68kException {
 23088:     final int len3 = 14;
 23089:     int a = XEiJ.regRn[8];  //文字列バッファの先頭
 23090:     //符号と指数部の処理
 23091:     //  ±0,±Inf,NaNはここで除外する
 23092:     if (l < 0L) {
 23093:       mmuWriteByteData (a++, '-', 1);  //負符号
 23094:       l &= 0x7fffffffffffffffL;  //符号bitを消しておく
 23095:     }
 23096:     double x = Double.longBitsToDouble (l);  //絶対値
 23097:     int e = (int) (l >>> 52) - 1023;  //指数部。ゲタ0。符号bitは消してあるのでマスクは不要
 23098:     l &= 0x000fffffffffffffL;  //仮数部の小数部。正規化数のとき整数部の1が付いていないことに注意
 23099:     if (e == -1023) {  //±0,非正規化数
 23100:       if (l == 0L) {  //±0
 23101:         mmuWriteByteData (a++, '0', 1);  //0
 23102:         mmuWriteByteData (a, '\0', 1);
 23103:         XEiJ.regRn[8] = a;  //末尾の'\0'の位置
 23104:         return;
 23105:       }
 23106:       e -= Long.numberOfLeadingZeros (l) - 12;  //非正規化数の指数部を補正する
 23107:     } else if (e == 1024) {  //±Inf,NaN
 23108:       mmuWriteByteData (a++, '#', 1);
 23109:       if (l == 0L) {  //±Inf
 23110:         mmuWriteByteData (a++, 'I', 1);
 23111:         mmuWriteByteData (a++, 'N', 1);
 23112:         mmuWriteByteData (a++, 'F', 1);
 23113:       } else {  //NaN
 23114:         mmuWriteByteData (a++, 'N', 1);
 23115:         mmuWriteByteData (a++, 'A', 1);
 23116:         mmuWriteByteData (a++, 'N', 1);
 23117:       }
 23118:       mmuWriteByteData (a, '\0', 1);
 23119:       XEiJ.regRn[8] = a;  //末尾の'\0'の位置
 23120:       return;
 23121:     }
 23122:     //10進数で表現したときの指数部を求める
 23123:     //  10^e<=x<10^(e+1)となるeを求める
 23124:     e = (int) Math.floor ((double) e * 0.30102999566398119521373889472);  //log10(2)
 23125:     //10^-eを掛けて1<=x<10にする
 23126:     //  非正規化数の最小値から正規化数の最大値まで処理できなければならない
 23127:     //  10^-eを計算してからまとめて掛ける方法はxが非正規化数のとき10^-eがオーバーフローしてしまうので不可
 23128:     //    doubleは非正規化数の逆数を表現できない
 23129:     if (0 < e) {  //10<=x
 23130:       x *= FEFunction.FPK_TEN_M16QR[e & 15];
 23131:       if (16 <= e) {
 23132:         x *= FEFunction.FPK_TEN_M16QR[16 + (e >> 4 & 15)];
 23133:         if (256 <= e) {
 23134:           x *= FEFunction.FPK_TEN_M16QR[33];  //FEFunction.FPK_TEN_M16QR[32 + (e >> 8)]
 23135:         }
 23136:       }
 23137:     } else if (e < 0) {  //x<1
 23138:       x *= FEFunction.FPK_TEN_P16QR[-e & 15];
 23139:       if (e <= -16) {
 23140:         x *= FEFunction.FPK_TEN_P16QR[16 + (-e >> 4 & 15)];
 23141:         if (e <= -256) {
 23142:           x *= FEFunction.FPK_TEN_P16QR[33];  //FEFunction.FPK_TEN_P16QR[32 + (-e >> 8)]
 23143:         }
 23144:       }
 23145:     }
 23146:     //整数部2桁、小数部16桁の10進数に変換する
 23147:     //  1<=x<10なのでw[1]が先頭になるはずだが誤差で前後にずれる可能性がある
 23148:     int[] w = new int[18];
 23149:     {
 23150:       int d = (int) x;
 23151:       int t = XEiJ.FMT_BCD4[d];
 23152:       w[0] = t >> 4;
 23153:       w[1] = t      & 15;
 23154:       for (int i = 2; i < 18; i += 4) {
 23155:         //xを10000倍して整数部dを引くことで小数部を残すが、このとき情報落ちが発生して誤差が蓄積する
 23156:         //Double-Doubleの乗算の要領で10000倍を正確に行い、誤差の蓄積を回避する
 23157:         //x = (x - (double) d) * 10000.0;
 23158:         double xh = x * 0x8000001p0;
 23159:         xh += x - xh;  //xの上半分
 23160:         x = (xh - (double) d) * 10000.0 + (x - xh) * 10000.0;
 23161:         d = (int) x;
 23162:         t = XEiJ.FMT_BCD4[d];
 23163:         w[i    ] = t >> 12;
 23164:         w[i + 1] = t >>  8 & 15;
 23165:         w[i + 2] = t >>  4 & 15;
 23166:         w[i + 3] = t       & 15;
 23167:       }
 23168:     }
 23169:     //先頭の位置を確認する
 23170:     //  w[h]が先頭(0でない最初の数字)の位置
 23171:     int h = w[0] != 0 ? 0 : w[1] != 0 ? 1 : 2;
 23172:     //14+1桁目を四捨五入する
 23173:     int o = h + 14;  //w[o]は四捨五入する桁の位置。w[]の範囲内
 23174:     if (5 <= w[o]) {
 23175:       int i = o;
 23176:       while (10 <= ++w[--i]) {
 23177:         w[i] = 0;
 23178:       }
 23179:       if (i < h) {  //先頭から繰り上がった。このとき新しい先頭は1でそれ以外はすべて0
 23180:         h--;  //先頭を左にずらす
 23181:         o--;  //末尾を左にずらす
 23182:       }
 23183:     }
 23184:     //先頭の位置に応じて指数部を更新する
 23185:     //  w[h]が整数部、w[h+1..o-1]が小数部。10^eの小数点はw[h]の右側。整数部の桁数はe+1桁
 23186:     e -= h - 1;
 23187:     //末尾の位置を確認する
 23188:     //  w[o-1]が末尾(0でない最後の数字)の位置
 23189:     while (w[o - 1] == 0) {  //全体は0ではないので必ず止まる。小数点よりも左側で止まる場合があることに注意
 23190:       o--;
 23191:     }
 23192:     //指数形式にするかどうか選択して文字列に変換する
 23193:     if (0 <= e && e < len3) {  //1<=x<10^len3。指数形式にしない
 23194:       do {
 23195:         mmuWriteByteData (a++, '0' + w[h++], 1);  //整数部。末尾の位置に関係なく1の位まで書く
 23196:       } while (0 <= --e);
 23197:       if (h < o) {  //小数部がある
 23198:         mmuWriteByteData (a++, '.', 1);  //小数部があるときだけ小数点を書く
 23199:         do {
 23200:           mmuWriteByteData (a++, '0' + w[h++], 1);  //小数部
 23201:         } while (h < o);
 23202:       }
 23203:     } else if (-4 <= e && e < 0) {  //10^-4<=x<1。指数形式にしない
 23204:       mmuWriteByteData (a++, '0', 1);  //整数部の0
 23205:       mmuWriteByteData (a++, '.', 1);  //小数点
 23206:       while (++e < 0) {
 23207:         mmuWriteByteData (a++, '0', 1);  //小数部の先頭の0の並び
 23208:       }
 23209:       do {
 23210:         mmuWriteByteData (a++, '0' + w[h++], 1);  //小数部
 23211:       } while (h < o);
 23212:     } else {  //x<10^-4または10^len3<=x。指数形式にする
 23213:       mmuWriteByteData (a++, '0' + w[h++], 1);  //整数部
 23214:       if (h < o) {  //小数部がある
 23215:         mmuWriteByteData (a++, '.', 1);  //小数部があるときだけ小数点を書く
 23216:         do {
 23217:           mmuWriteByteData (a++, '0' + w[h++], 1);  //小数部
 23218:         } while (h < o);
 23219:       }
 23220:       mmuWriteByteData (a++, 'E', 1);  //指数部の始まり
 23221:       if (0 <= e) {
 23222:         mmuWriteByteData (a++, '+', 1);  //指数部の正符号。省略しない
 23223:       } else {
 23224:         mmuWriteByteData (a++, '-', 1);  //指数部の負符号
 23225:         e = -e;
 23226:       }
 23227:       e = XEiJ.FMT_BCD4[e];
 23228:       mmuWriteByteData (a++, '0' + (e >> 8     ), 1);  //指数部の100の位。0でも省略しない
 23229:       mmuWriteByteData (a++, '0' + (e >> 4 & 15), 1);  //指数部の10の位
 23230:       mmuWriteByteData (a++, '0' + (e      & 15), 1);  //指数部の1の位
 23231:     }
 23232:     mmuWriteByteData (a, '\0', 1);
 23233:     XEiJ.regRn[8] = a;  //末尾の'\0'の位置
 23234:   }  //fpkDTOSSub6()
 23235: 
 23236:   //fpkECVT ()
 23237:   //  $FE24  __ECVT
 23238:   //  64bit浮動小数点数を全体の桁数を指定して文字列に変換する
 23239:   //  文字列に書くのは仮数部の数字のみ
 23240:   //  符号と小数点と指数部は文字列に書かず、小数点の位置と符号をレジスタに入れて返す
 23241:   //  桁数は255桁まで指定できるが、有効桁数は14桁まで
 23242:   //    有効桁数の次の桁で絶対値を四捨五入する
 23243:   //    15桁以上を指定しても14桁に丸められ、15桁目以降はすべて'0'になる
 23244:   //  無限大は"#INF"、非数は"#NAN"に変換する
 23245:   //    "#INF"と"#NAN"のとき小数点の位置は4になる
 23246:   //    "#INF"と"#NAN"で3桁以下のときは途中で打ち切る
 23247:   //    メモ
 23248:   //      FLOATn.Xは"#INF"と"#NAN"で1桁~3桁のとき文字列が"$","$0","$00"になってしまう
 23249:   //      文字数が少なすぎて"#INF"や"#NAN"が入り切らないのは仕方がないが、
 23250:   //      無意味な"$00"という文字列になるのは数字ではない文字列を四捨五入しようとするバグが原因
 23251:   //      例えば3桁のときは4桁目の'F'または'N'が'5'以上なので繰り上げて上の位をインクリメントする
 23252:   //      'N'+1='O'または'A'+1='B'が'9'よりも大きいので'0'を上書きして繰り上げて上の位をインクリメントする
 23253:   //      'I'+1='J'または'N'+1='O'も'9'よりも大きいので'0'を上書きして繰り上げて上の位をインクリメントする
 23254:   //      '#'+1='$'は'9'以下なので"$00"になる
 23255:   //      X-BASICでint i2,i3:print ecvt(val("#INF"),3,i2,i3)とすると再現できる
 23256:   //    "#INF"と"#NAN"で5桁以上のときは5桁目以降はすべて'\0'になる
 23257:   //    メモ
 23258:   //      FLOATn.Xは"#NAN"と"#INF"で15桁以上のとき5桁目から14桁目までは'\0'だが15桁目以降に'0'が書き込まれる
 23259:   //      通常は5桁目の'\0'で文字列は終了していると見なされるので実害はないが気持ち悪い
 23260:   //  メモ
 23261:   //    FLOAT2.X 2.02/2.03は0のとき小数点の位置が0になる
 23262:   //    FLOAT4.X 1.02は0のとき小数点の位置が1になる
 23263:   //    ここでは1にしている
 23264:   //  <d0d1.d:64bit浮動小数点数
 23265:   //  <d2.l:全体の桁数
 23266:   //  <a0.l:文字列バッファの先頭。末尾に'\0'を書き込むので桁数+1バイト必要
 23267:   //  >d0.l:先頭から小数点の位置までのオフセット
 23268:   //  >d1.l:符号(0=+,1=-)
 23269:   //  a0.lは変化しない
 23270:   public static void fpkECVT () throws M68kException {
 23271:     fpkECVTSub ((long) XEiJ.regRn[0] << 32 | 0xffffffffL & XEiJ.regRn[1]);  //64bit浮動小数点数
 23272:   }  //fpkECVT()
 23273:   public static void fpkECVTSub (long l) throws M68kException {
 23274:     int len3 = Math.max (0, XEiJ.regRn[2]);  //全体の桁数
 23275:     int a = XEiJ.regRn[8];  //文字列バッファの先頭
 23276:     int b = a + len3;  //文字列バッファの末尾+1。'\0'を書き込む位置
 23277:     //符号と指数部の処理
 23278:     //  ±0,±Inf,NaNはここで除外する
 23279:     if (0L <= l) {
 23280:       XEiJ.regRn[1] = 0;  //正符号
 23281:     } else {
 23282:       XEiJ.regRn[1] = 1;  //負符号
 23283:       l &= 0x7fffffffffffffffL;  //符号bitを消しておく
 23284:     }
 23285:     double x = Double.longBitsToDouble (l);  //絶対値
 23286:     int e = (int) (l >>> 52) - 1023;  //指数部。ゲタ0。符号bitは消してあるのでマスクは不要
 23287:     l &= 0x000fffffffffffffL;  //仮数部の小数部。正規化数のとき整数部の1が付いていないことに注意
 23288:     if (e == -1023) {  //±0,非正規化数
 23289:       if (l == 0L) {  //±0
 23290:         //指定された全体の桁数だけ'0'を並べる
 23291:         while (a < b) {
 23292:           mmuWriteByteData (a++, '0', 1);
 23293:         }
 23294:         mmuWriteByteData (a, '\0', 1);
 23295:         XEiJ.regRn[0] = 1;  //小数点の位置
 23296:         return;
 23297:       }
 23298:       e -= Long.numberOfLeadingZeros (l) - 12;  //非正規化数の指数部を補正する
 23299:     } else if (e == 1024) {  //±Inf,NaN
 23300:       for (int s = l != 0L ? '#' | 'N' << 8 | 'A' << 16 | 'N' << 24 : '#' | 'I' << 8 | 'N' << 16 | 'F' << 24; a < b && s != 0; s >>>= 8) {
 23301:         mmuWriteByteData (a++, s, 1);
 23302:       }
 23303:       while (a < b) {
 23304:         mmuWriteByteData (a++, '\0', 1);  //残りは'\0'
 23305:       }
 23306:       mmuWriteByteData (a, '\0', 1);
 23307:       XEiJ.regRn[0] = 4;  //小数点の位置
 23308:       return;
 23309:     }
 23310:     //10進数で表現したときの指数部を求める
 23311:     //  10^e<=x<10^(e+1)となるeを求める
 23312:     e = (int) Math.floor ((double) e * 0.30102999566398119521373889472);  //log10(2)
 23313:     //10^-eを掛けて1<=x<10にする
 23314:     //  非正規化数の最小値から正規化数の最大値まで処理できなければならない
 23315:     //  10^-eを計算してからまとめて掛ける方法はxが非正規化数のとき10^-eがオーバーフローしてしまうので不可
 23316:     //    doubleは非正規化数の逆数を表現できない
 23317:     if (0 < e) {  //10<=x
 23318:       x *= FEFunction.FPK_TEN_M16QR[e & 15];
 23319:       if (16 <= e) {
 23320:         x *= FEFunction.FPK_TEN_M16QR[16 + (e >> 4 & 15)];
 23321:         if (256 <= e) {
 23322:           x *= FEFunction.FPK_TEN_M16QR[33];  //FEFunction.FPK_TEN_M16QR[32 + (e >> 8)]
 23323:         }
 23324:       }
 23325:     } else if (e < 0) {  //x<1
 23326:       x *= FEFunction.FPK_TEN_P16QR[-e & 15];
 23327:       if (e <= -16) {
 23328:         x *= FEFunction.FPK_TEN_P16QR[16 + (-e >> 4 & 15)];
 23329:         if (e <= -256) {
 23330:           x *= FEFunction.FPK_TEN_P16QR[33];  //FEFunction.FPK_TEN_P16QR[32 + (-e >> 8)]
 23331:         }
 23332:       }
 23333:     }
 23334:     //整数部2桁、小数部16桁の10進数に変換する
 23335:     //  1<=x<10なのでw[1]が先頭になるはずだが誤差で前後にずれる可能性がある
 23336:     int[] w = new int[18];
 23337:     {
 23338:       int d = (int) x;
 23339:       int t = XEiJ.FMT_BCD4[d];
 23340:       w[0] = t >> 4;
 23341:       w[1] = t      & 15;
 23342:       for (int i = 2; i < 18; i += 4) {
 23343:         //xを10000倍して整数部dを引くことで小数部を残すが、このとき情報落ちが発生して誤差が蓄積する
 23344:         //Double-Doubleの乗算の要領で10000倍を正確に行い、誤差の蓄積を回避する
 23345:         //x = (x - (double) d) * 10000.0;
 23346:         double xh = x * 0x8000001p0;
 23347:         xh += x - xh;  //xの上半分
 23348:         x = (xh - (double) d) * 10000.0 + (x - xh) * 10000.0;
 23349:         d = (int) x;
 23350:         t = XEiJ.FMT_BCD4[d];
 23351:         w[i    ] = t >> 12;
 23352:         w[i + 1] = t >>  8 & 15;
 23353:         w[i + 2] = t >>  4 & 15;
 23354:         w[i + 3] = t       & 15;
 23355:       }
 23356:     }
 23357:     //先頭の位置を確認する
 23358:     //  w[h]が先頭(0でない最初の数字)の位置
 23359:     int h = w[0] != 0 ? 0 : w[1] != 0 ? 1 : 2;
 23360:     //14+1桁目を四捨五入する
 23361:     int o = h + 14;  //w[o]は四捨五入する桁の位置。w[]の範囲内
 23362:     if (5 <= w[o]) {
 23363:       int i = o;
 23364:       while (10 <= ++w[--i]) {
 23365:         w[i] = 0;
 23366:       }
 23367:       if (i < h) {  //先頭から繰り上がった。このとき新しい先頭は1でそれ以外はすべて0
 23368:         h--;  //先頭を左にずらす
 23369:         o--;  //末尾を左にずらす
 23370:       }
 23371:     }
 23372:     //先頭の位置に応じて指数部を更新する
 23373:     //  w[h]が整数部、w[h+1..o-1]が小数部。10^eの小数点はw[h]の右側。整数部の桁数はe+1桁
 23374:     e -= h - 1;
 23375:     //先頭からlen3+1桁目が先頭から14+1桁目よりも左側にあるときその桁で改めて四捨五入する
 23376:     //  あらかじめ14+1桁目で四捨五入しておかないと、
 23377:     //  1.5の5を四捨五入しなければならないときに誤差で1.499…になったまま4を四捨五入しようとして失敗することがある
 23378:     int s = h + len3;  //w[s]は先頭からlen3+1桁目の位置。w.length<=sの場合があることに注意
 23379:     if (s < o) {
 23380:       o = s;  //w[o]は四捨五入する桁の位置。o<0の場合があることに注意
 23381:       if (0 <= o && 5 <= w[o]) {
 23382:         int i = o;
 23383:         while (10 <= ++w[--i]) {
 23384:           w[i] = 0;
 23385:         }
 23386:         if (i < h) {  //先頭から繰り上がった。このとき新しい先頭は1でそれ以外はすべて0
 23387:           h--;  //先頭を左にずらす
 23388:           o--;  //末尾を左にずらす
 23389:           e++;  //指数部を1増やす
 23390:         }
 23391:       }
 23392:     }
 23393:     //文字列に変換する
 23394:     while (a < b && h < o) {
 23395:       mmuWriteByteData (a++, '0' + w[h++], 1);  //有効数字
 23396:     }
 23397:     while (a < b) {
 23398:       mmuWriteByteData (a++, '0', 1);  //残りは'0'
 23399:     }
 23400:     mmuWriteByteData (a, '\0', 1);
 23401:     XEiJ.regRn[0] = e + 1;  //小数点の位置
 23402:   }  //fpkECVTSub6()
 23403: 
 23404:   //fpkFCVT ()
 23405:   //  $FE25  __FCVT
 23406:   //  64bit浮動小数点数を小数点以下の桁数を指定して文字列に変換する
 23407:   //  メモ
 23408:   //    小数点の位置がpのとき[p]の左側に小数点がある
 23409:   //    全体の桁数が制限されないので指数部が大きいとき整数部が収まるサイズのバッファが必要
 23410:   //    0または1以上のとき
 23411:   //      整数部と小数点以下の指定された桁数までを小数部の0を省略せずに出力する
 23412:   //      整数部と小数点以下の指定された桁数が合わせて14桁を超えるときは15桁目が四捨五入されて15桁目以降は0になる
 23413:   //      小数点の位置は整数部の桁数に等しい
 23414:   //      print fcvt(0#,4,i2,i3),i2,i3
 23415:   //      0000     0       0
 23416:   //      print fcvt(2e+12/3#,4,i2,i3),i2,i3
 23417:   //      6666666666666700         12      0
 23418:   //                 ↑
 23419:   //    1未満のとき
 23420:   //      小数点以下の桁数の範囲内を先頭の0を省略して出力する
 23421:   //      小数点以下の桁数の範囲内がすべて0のときは""になる
 23422:   //      小数点の位置は指数部+1に等しい
 23423:   //      print fcvt(0.01,3,i2,i3),i2,i3                0.010
 23424:   //      10      -1       0                              <~~
 23425:   //      print fcvt(0.001,3,i2,i3),i2,i3               0.001
 23426:   //      1       -2       0                              <<~
 23427:   //      print fcvt(0.0001,3,i2,i3),i2,i3              0.0001
 23428:   //              -3       0                              <<<
 23429:   //      print fcvt(0.00001,3,i2,i3),i2,i3             0.00001
 23430:   //              -4       0                              <<<<
 23431:   //    #INFと#NAN
 23432:   //      小数点以下の桁数の指定に関係なく4文字出力して小数点の位置4を返す
 23433:   //      print fcvt(val("#INF"),2,i2,i3),i2,i3
 23434:   //      #INF     4       0
 23435:   //      print fcvt(val("#INF"),6,i2,i3),i2,i3
 23436:   //      #INF     4       0
 23437:   //  バグ
 23438:   //    FLOAT4.X 1.02は結果が整数部が大きいとき255文字で打ち切られる
 23439:   //    FLOAT4.X 1.02はFCVT(±0)の整数部が0桁ではなく1桁になる
 23440:   //  <d0d1.d:64bit浮動小数点数
 23441:   //  <d2.l:小数点以下の桁数
 23442:   //  <a0.l:文字列バッファの先頭
 23443:   //  >d0.l:先頭から小数点の位置までのオフセット
 23444:   //  >d1.l:符号(0=+,1=-)
 23445:   public static void fpkFCVT () throws M68kException {
 23446:     fpkFCVTSub ((long) XEiJ.regRn[0] << 32 | 0xffffffffL & XEiJ.regRn[1]);  //64bit浮動小数点数
 23447:   }  //fpkFCVT()
 23448:   public static void fpkFCVTSub (long l) throws M68kException {
 23449:     int len2 = Math.max (0, XEiJ.regRn[2]);  //小数部の桁数
 23450:     int a = XEiJ.regRn[8];  //文字列バッファの先頭
 23451:     //符号と指数部の処理
 23452:     //  ±0,±Inf,NaNはここで除外する
 23453:     if (0L <= l) {
 23454:       XEiJ.regRn[1] = 0;  //正符号
 23455:     } else {
 23456:       XEiJ.regRn[1] = 1;  //負符号
 23457:       l &= 0x7fffffffffffffffL;  //符号bitを消しておく
 23458:     }
 23459:     double x = Double.longBitsToDouble (l);  //絶対値
 23460:     int e = (int) (l >>> 52) - 1023;  //指数部。ゲタ0。符号bitは消してあるのでマスクは不要
 23461:     l &= 0x000fffffffffffffL;  //仮数部の小数部。正規化数のとき整数部の1が付いていないことに注意
 23462:     if (e == -1023) {  //±0,非正規化数
 23463:       if (l == 0L) {  //±0
 23464:         //指定された小数点以下の桁数だけ'0'を並べる
 23465:         while (len2-- > 0) {
 23466:           mmuWriteByteData (a++, '0', 1);
 23467:         }
 23468:         mmuWriteByteData (a, '\0', 1);
 23469:         XEiJ.regRn[0] = 0;  //小数点の位置
 23470:         return;
 23471:       }
 23472:       e -= Long.numberOfLeadingZeros (l) - 12;  //非正規化数の指数部を補正する
 23473:     } else if (e == 1024) {  //±Inf,NaN
 23474:       mmuWriteByteData (a++, '#', 1);
 23475:       if (l == 0L) {  //±Inf
 23476:         mmuWriteByteData (a++, 'I', 1);
 23477:         mmuWriteByteData (a++, 'N', 1);
 23478:         mmuWriteByteData (a++, 'F', 1);
 23479:       } else {  //NaN
 23480:         mmuWriteByteData (a++, 'N', 1);
 23481:         mmuWriteByteData (a++, 'A', 1);
 23482:         mmuWriteByteData (a++, 'N', 1);
 23483:       }
 23484:       mmuWriteByteData (a, '\0', 1);
 23485:       XEiJ.regRn[0] = 4;  //小数点の位置
 23486:       return;
 23487:     }
 23488:     //10進数で表現したときの指数部を求める
 23489:     //  10^e<=x<10^(e+1)となるeを求める
 23490:     e = (int) Math.floor ((double) e * 0.30102999566398119521373889472);  //log10(2)
 23491:     //10^-eを掛けて1<=x<10にする
 23492:     //  非正規化数の最小値から正規化数の最大値まで処理できなければならない
 23493:     //  10^-eを計算してからまとめて掛ける方法はxが非正規化数のとき10^-eがオーバーフローしてしまうので不可
 23494:     //    doubleは非正規化数の逆数を表現できない
 23495:     if (0 < e) {  //10<=x
 23496:       x *= FEFunction.FPK_TEN_M16QR[e & 15];
 23497:       if (16 <= e) {
 23498:         x *= FEFunction.FPK_TEN_M16QR[16 + (e >> 4 & 15)];
 23499:         if (256 <= e) {
 23500:           x *= FEFunction.FPK_TEN_M16QR[33];  //FEFunction.FPK_TEN_M16QR[32 + (e >> 8)]
 23501:         }
 23502:       }
 23503:     } else if (e < 0) {  //x<1
 23504:       x *= FEFunction.FPK_TEN_P16QR[-e & 15];
 23505:       if (e <= -16) {
 23506:         x *= FEFunction.FPK_TEN_P16QR[16 + (-e >> 4 & 15)];
 23507:         if (e <= -256) {
 23508:           x *= FEFunction.FPK_TEN_P16QR[33];  //FEFunction.FPK_TEN_P16QR[32 + (-e >> 8)]
 23509:         }
 23510:       }
 23511:     }
 23512:     //整数部2桁、小数部16桁の10進数に変換する
 23513:     //  1<=x<10なのでw[1]が先頭になるはずだが誤差で前後にずれる可能性がある
 23514:     int[] w = new int[18];
 23515:     {
 23516:       int d = (int) x;
 23517:       int t = XEiJ.FMT_BCD4[d];
 23518:       w[0] = t >> 4;
 23519:       w[1] = t      & 15;
 23520:       for (int i = 2; i < 18; i += 4) {
 23521:         //xを10000倍して整数部dを引くことで小数部を残すが、このとき情報落ちが発生して誤差が蓄積する
 23522:         //Double-Doubleの乗算の要領で10000倍を正確に行い、誤差の蓄積を回避する
 23523:         //x = (x - (double) d) * 10000.0;
 23524:         double xh = x * 0x8000001p0;
 23525:         xh += x - xh;  //xの上半分
 23526:         x = (xh - (double) d) * 10000.0 + (x - xh) * 10000.0;
 23527:         d = (int) x;
 23528:         t = XEiJ.FMT_BCD4[d];
 23529:         w[i    ] = t >> 12;
 23530:         w[i + 1] = t >>  8 & 15;
 23531:         w[i + 2] = t >>  4 & 15;
 23532:         w[i + 3] = t       & 15;
 23533:       }
 23534:     }
 23535:     //先頭の位置を確認する
 23536:     //  w[h]が先頭(0でない最初の数字)の位置
 23537:     int h = w[0] != 0 ? 0 : w[1] != 0 ? 1 : 2;
 23538:     //14+1桁目を四捨五入する
 23539:     int o = h + 14;  //w[o]は四捨五入する桁の位置。w[]の範囲内
 23540:     if (5 <= w[o]) {
 23541:       int i = o;
 23542:       while (10 <= ++w[--i]) {
 23543:         w[i] = 0;
 23544:       }
 23545:       if (i < h) {  //先頭から繰り上がった。このとき新しい先頭は1でそれ以外はすべて0
 23546:         h--;  //先頭を左にずらす
 23547:         o--;  //末尾を左にずらす
 23548:       }
 23549:     }
 23550:     //先頭の位置に応じて指数部を更新する
 23551:     //  w[h]が整数部、w[h+1..o-1]が小数部。10^eの小数点はw[h]の右側。整数部の桁数はe+1桁
 23552:     e -= h - 1;
 23553:     //小数点以下len2+1桁目が先頭から14+1桁目よりも左側にあるときその桁で改めて四捨五入する
 23554:     //  あらかじめ14+1桁目で四捨五入しておかないと、
 23555:     //  1.5の5を四捨五入しなければならないときに誤差で1.499…になったまま4を四捨五入しようとして失敗することがある
 23556:     int s = h + e + 1 + len2;  //w[s]は小数点以下len2+1桁目の位置。w.length<=sの場合があることに注意
 23557:     if (s < o) {
 23558:       o = s;  //w[o]は四捨五入する桁の位置。o<0の場合があることに注意
 23559:       if (0 <= o && 5 <= w[o]) {
 23560:         int i = o;
 23561:         while (10 <= ++w[--i]) {
 23562:           w[i] = 0;
 23563:         }
 23564:         if (i < h) {  //先頭から繰り上がった。このとき新しい先頭は1でそれ以外はすべて0
 23565:           h--;  //先頭を左にずらす
 23566:           o--;  //末尾を左にずらす
 23567:           e++;  //指数部を1増やす
 23568:         }
 23569:       }
 23570:     }
 23571:     //文字列に変換する
 23572:     while (h < o) {
 23573:       mmuWriteByteData (a++, '0' + w[h++], 1);  //有効数字
 23574:     }
 23575:     while (h++ < s) {
 23576:       mmuWriteByteData (a++, '0', 1);  //残りは'0'
 23577:     }
 23578:     mmuWriteByteData (a, '\0', 1);
 23579:     XEiJ.regRn[0] = e + 1;  //小数点の位置
 23580:   }  //fpkFCVTSub6()
 23581: 
 23582:   //fpkGCVT ()
 23583:   //  $FE26  __GCVT
 23584:   //  64bit浮動小数点数を全体の桁数を指定して文字列に変換する
 23585:   //  指定された桁数で表現できないときは指数表現になる
 23586:   //  メモ
 23587:   //    print gcvt(1e-1,10)
 23588:   //    0.1
 23589:   //    print gcvt(1e-8,10)
 23590:   //    0.00000001
 23591:   //    print gcvt(1.5e-8,10)
 23592:   //    1.5E-008
 23593:   //    print gcvt(1e-9,10)
 23594:   //    1.E-009                 小数点はあるが小数部がない
 23595:   //    print gcvt(2e-1/3#,10)
 23596:   //    6.666666667E-002
 23597:   //    print gcvt(2e+0/3#,10)
 23598:   //    0.6666666667
 23599:   //    print gcvt(2e+1/3#,10)
 23600:   //    6.666666667
 23601:   //    print gcvt(2e+9/3#,10)
 23602:   //    666666666.7
 23603:   //    print gcvt(2e+10/3#,10)
 23604:   //    6666666667
 23605:   //    print gcvt(2e+11/3#,10)
 23606:   //    6.666666667E+010
 23607:   //    print gcvt(0#,4)
 23608:   //    0.
 23609:   //    print gcvt(val("#INF"),4)
 23610:   //    #INF
 23611:   //    print gcvt(val("#INF"),3)
 23612:   //    $.E+003
 23613:   //    print gcvt(val("#INF"),2)
 23614:   //    $.E+003
 23615:   //    print gcvt(val("#INF"),1)
 23616:   //    $.E+003
 23617:   //    FLOAT2.XのGCVTは小数部がなくても桁数の範囲内であれば小数点を書く
 23618:   //    桁数ちょうどのときは小数点も指数部も付かないので、整数でないことを明確にするために小数点を書いているとも言い難い
 23619:   //    ここでは#NANと#INF以外は小数部がなくても小数点を書くことにする
 23620:   //  バグ
 23621:   //    FLOAT2.X 2.02/2.03は#NANと#INFにも小数点を付ける
 23622:   //    FLOAT2.X 2.02/2.03は#NANと#INFのとき桁数が足りないと指数形式にしようとして文字列が壊れる
 23623:   //    FLOAT4.X 1.02は#NANと#INFにも小数点を付ける
 23624:   //    FLOAT4.X 1.02は桁数の少ない整数には小数点を付けて桁数ちょうどの整数には小数点も指数部も付けない
 23625:   //  <d0d1.d:64bit浮動小数点数
 23626:   //  <d2.b:全体の桁数
 23627:   //  <a0.l:文字列バッファの先頭
 23628:   //  >a0.l:末尾の'\0'の位置
 23629:   public static void fpkGCVT () throws M68kException {
 23630:     fpkGCVTSub ((long) XEiJ.regRn[0] << 32 | 0xffffffffL & XEiJ.regRn[1]);  //64bit浮動小数点数
 23631:   }  //fpkGCVT()
 23632:   public static void fpkGCVTSub (long l) throws M68kException {
 23633:     int len3 = Math.max (0, XEiJ.regRn[2]);  //全体の桁数
 23634:     int a = XEiJ.regRn[8];  //文字列バッファの先頭
 23635:     //符号と指数部の処理
 23636:     //  ±0,±Inf,NaNはここで除外する
 23637:     if (l < 0L) {
 23638:       mmuWriteByteData (a++, '-', 1);  //負符号
 23639:       l &= 0x7fffffffffffffffL;  //符号bitを消しておく
 23640:     }
 23641:     double x = Double.longBitsToDouble (l);  //絶対値
 23642:     int e = (int) (l >>> 52) - 1023;  //指数部。ゲタ0。符号bitは消してあるのでマスクは不要
 23643:     l &= 0x000fffffffffffffL;  //仮数部の小数部。正規化数のとき整数部の1が付いていないことに注意
 23644:     if (e == -1023) {  //±0,非正規化数
 23645:       if (l == 0L) {  //±0
 23646:         mmuWriteByteData (a++, '0', 1);  //0
 23647:         mmuWriteByteData (a++, '.', 1);  //小数点
 23648:         mmuWriteByteData (a, '\0', 1);
 23649:         XEiJ.regRn[8] = a;  //末尾の'\0'の位置
 23650:         return;
 23651:       }
 23652:       e -= Long.numberOfLeadingZeros (l) - 12;  //非正規化数の指数部を補正する
 23653:     } else if (e == 1024) {  //±Inf,NaN
 23654:       mmuWriteByteData (a++, '#', 1);
 23655:       if (l == 0L) {  //±Inf
 23656:         mmuWriteByteData (a++, 'I', 1);
 23657:         mmuWriteByteData (a++, 'N', 1);
 23658:         mmuWriteByteData (a++, 'F', 1);
 23659:       } else {  //NaN
 23660:         mmuWriteByteData (a++, 'N', 1);
 23661:         mmuWriteByteData (a++, 'A', 1);
 23662:         mmuWriteByteData (a++, 'N', 1);
 23663:       }
 23664:       mmuWriteByteData (a, '\0', 1);
 23665:       XEiJ.regRn[8] = a;  //末尾の'\0'の位置
 23666:       return;
 23667:     }
 23668:     //10進数で表現したときの指数部を求める
 23669:     //  10^e<=x<10^(e+1)となるeを求める
 23670:     e = (int) Math.floor ((double) e * 0.30102999566398119521373889472);  //log10(2)
 23671:     //10^-eを掛けて1<=x<10にする
 23672:     //  非正規化数の最小値から正規化数の最大値まで処理できなければならない
 23673:     //  10^-eを計算してからまとめて掛ける方法はxが非正規化数のとき10^-eがオーバーフローしてしまうので不可
 23674:     //    doubleは非正規化数の逆数を表現できない
 23675:     if (0 < e) {  //10<=x
 23676:       x *= FEFunction.FPK_TEN_M16QR[e & 15];
 23677:       if (16 <= e) {
 23678:         x *= FEFunction.FPK_TEN_M16QR[16 + (e >> 4 & 15)];
 23679:         if (256 <= e) {
 23680:           x *= FEFunction.FPK_TEN_M16QR[33];  //FEFunction.FPK_TEN_M16QR[32 + (e >> 8)]
 23681:         }
 23682:       }
 23683:     } else if (e < 0) {  //x<1
 23684:       x *= FEFunction.FPK_TEN_P16QR[-e & 15];
 23685:       if (e <= -16) {
 23686:         x *= FEFunction.FPK_TEN_P16QR[16 + (-e >> 4 & 15)];
 23687:         if (e <= -256) {
 23688:           x *= FEFunction.FPK_TEN_P16QR[33];  //FEFunction.FPK_TEN_P16QR[32 + (-e >> 8)]
 23689:         }
 23690:       }
 23691:     }
 23692:     //整数部2桁、小数部16桁の10進数に変換する
 23693:     //  1<=x<10なのでw[1]が先頭になるはずだが誤差で前後にずれる可能性がある
 23694:     int[] w = new int[18];
 23695:     {
 23696:       int d = (int) x;
 23697:       int t = XEiJ.FMT_BCD4[d];
 23698:       w[0] = t >> 4;
 23699:       w[1] = t      & 15;
 23700:       for (int i = 2; i < 18; i += 4) {
 23701:         //xを10000倍して整数部dを引くことで小数部を残すが、このとき情報落ちが発生して誤差が蓄積する
 23702:         //Double-Doubleの乗算の要領で10000倍を正確に行い、誤差の蓄積を回避する
 23703:         //x = (x - (double) d) * 10000.0;
 23704:         double xh = x * 0x8000001p0;
 23705:         xh += x - xh;  //xの上半分
 23706:         x = (xh - (double) d) * 10000.0 + (x - xh) * 10000.0;
 23707:         d = (int) x;
 23708:         t = XEiJ.FMT_BCD4[d];
 23709:         w[i    ] = t >> 12;
 23710:         w[i + 1] = t >>  8 & 15;
 23711:         w[i + 2] = t >>  4 & 15;
 23712:         w[i + 3] = t       & 15;
 23713:       }
 23714:     }
 23715:     //先頭の位置を確認する
 23716:     //  w[h]が先頭(0でない最初の数字)の位置
 23717:     int h = w[0] != 0 ? 0 : w[1] != 0 ? 1 : 2;
 23718:     //14+1桁目を四捨五入する
 23719:     int o = h + 14;  //w[o]は四捨五入する桁の位置。w[]の範囲内
 23720:     if (5 <= w[o]) {
 23721:       int i = o;
 23722:       while (10 <= ++w[--i]) {
 23723:         w[i] = 0;
 23724:       }
 23725:       if (i < h) {  //先頭から繰り上がった。このとき新しい先頭は1でそれ以外はすべて0
 23726:         h--;  //先頭を左にずらす
 23727:         o--;  //末尾を左にずらす
 23728:       }
 23729:     }
 23730:     //先頭の位置に応じて指数部を更新する
 23731:     //  w[h]が整数部、w[h+1..o-1]が小数部。10^eの小数点はw[h]の右側。整数部の桁数はe+1桁
 23732:     e -= h - 1;
 23733:     //先頭からlen3+1桁目が先頭から14+1桁目よりも左側にあるときその桁で改めて四捨五入する
 23734:     //  あらかじめ14+1桁目で四捨五入しておかないと、
 23735:     //  1.5の5を四捨五入しなければならないときに誤差で1.499…になったまま4を四捨五入しようとして失敗することがある
 23736:     int s = h + len3;  //w[s]は先頭からlen3+1桁目の位置。w.length<=sの場合があることに注意
 23737:     if (s < o) {
 23738:       o = s;  //w[o]は四捨五入する桁の位置。o<0の場合があることに注意
 23739:       if (0 <= o && 5 <= w[o]) {
 23740:         int i = o;
 23741:         while (10 <= ++w[--i]) {
 23742:           w[i] = 0;
 23743:         }
 23744:         if (i < h) {  //先頭から繰り上がった。このとき新しい先頭は1でそれ以外はすべて0
 23745:           h--;  //先頭を左にずらす
 23746:           o--;  //末尾を左にずらす
 23747:           e++;  //指数部を1増やす
 23748:         }
 23749:       }
 23750:     }
 23751:     //末尾の位置を確認する
 23752:     //  w[o-1]が末尾(0でない最後の数字)の位置
 23753:     while (w[o - 1] == 0) {  //全体は0ではないので必ず止まる。小数点よりも左側で止まる場合があることに注意
 23754:       o--;
 23755:     }
 23756:     //指数形式にするかどうか選択して文字列に変換する
 23757:     if (0 <= e && e < len3) {  //1<=x<10^len3。指数形式にしない
 23758:       do {
 23759:         mmuWriteByteData (a++, '0' + w[h++], 1);  //整数部。末尾の位置に関係なく1の位まで書く
 23760:       } while (0 <= --e);
 23761:       mmuWriteByteData (a++, '.', 1);  //小数部がなくても小数点を書く
 23762:       while (h < o) {
 23763:         mmuWriteByteData (a++, '0' + w[h++], 1);  //小数部
 23764:       }
 23765:     } else if (-4 <= e && e < 0) {  //10^-4<=x<1。指数形式にしない
 23766:       mmuWriteByteData (a++, '0', 1);  //整数部の0
 23767:       mmuWriteByteData (a++, '.', 1);  //小数点
 23768:       while (++e < 0) {
 23769:         mmuWriteByteData (a++, '0', 1);  //小数部の先頭の0の並び
 23770:       }
 23771:       while (h < o) {
 23772:         mmuWriteByteData (a++, '0' + w[h++], 1);  //小数部
 23773:       }
 23774:     } else {  //x<10^-4または10^len3<=x。指数形式にする
 23775:       mmuWriteByteData (a++, '0' + w[h++], 1);  //整数部
 23776:       mmuWriteByteData (a++, '.', 1);  //小数部がなくても小数点を書く
 23777:       while (h < o) {
 23778:         mmuWriteByteData (a++, '0' + w[h++], 1);  //小数部
 23779:       }
 23780:       mmuWriteByteData (a++, 'E', 1);  //指数部の始まり
 23781:       if (0 <= e) {
 23782:         mmuWriteByteData (a++, '+', 1);  //指数部の正符号。省略しない
 23783:       } else {
 23784:         mmuWriteByteData (a++, '-', 1);  //指数部の負符号
 23785:         e = -e;
 23786:       }
 23787:       e = XEiJ.FMT_BCD4[e];
 23788:       mmuWriteByteData (a++, '0' + (e >> 8     ), 1);  //指数部の100の位。0でも省略しない
 23789:       mmuWriteByteData (a++, '0' + (e >> 4 & 15), 1);  //指数部の10の位
 23790:       mmuWriteByteData (a++, '0' + (e      & 15), 1);  //指数部の1の位
 23791:     }
 23792:     mmuWriteByteData (a, '\0', 1);
 23793:     XEiJ.regRn[8] = a;  //末尾の'\0'の位置
 23794:   }  //fpkGCVTSub6()
 23795: 
 23796:   //fpkFVAL ()
 23797:   //  $FE50  __FVAL
 23798:   //  文字列を32bit浮動小数点数に変換する
 23799:   //  __VALとほぼ同じ
 23800:   //  <a0.l:文字列の先頭
 23801:   //  >d0.s:32bit浮動小数点数
 23802:   //  >d2.l:(先頭が'&'でないとき)65535=32bit浮動小数点数をオーバーフローなしでintに変換できる,0=それ以外
 23803:   //  >d3.l:(先頭が'&'でないとき)d2.l==65535のとき32bit浮動小数点数をintに変換した値
 23804:   //  >a0.l:変換された文字列の直後('\0'とは限らない)
 23805:   //  >ccr:0=エラーなし,CCR_N|CCR_C=文法エラー,CCR_V|CCR_C=オーバーフロー
 23806:   public static void fpkFVAL () throws M68kException {
 23807:     int a = XEiJ.regRn[8];  //a0
 23808:     //先頭の空白を読み飛ばす
 23809:     int c = mmuReadByteSignData (a++, 1);
 23810:     while (c == ' ' || c == '\t') {
 23811:       c = mmuReadByteSignData (a++, 1);
 23812:     }
 23813:     if (c == '&') {  //&B,&O,&H
 23814:       c = mmuReadByteSignData (a++, 1) & 0xdf;
 23815:       XEiJ.regRn[8] = a;  //&?の直後
 23816:       if (c == 'B') {
 23817:         fpkSTOB ();
 23818:         FEFunction.fpkLTOF ();
 23819:       } else if (c == 'O') {
 23820:         fpkSTOO ();
 23821:         FEFunction.fpkLTOF ();
 23822:       } else if (c == 'H') {
 23823:         fpkSTOH ();
 23824:         FEFunction.fpkLTOF ();
 23825:       } else {
 23826:         XEiJ.regCCR = XEiJ.REG_CCR_N | XEiJ.REG_CCR_C;  //文法エラー
 23827:       }
 23828:     } else {  //&B,&O,&H以外
 23829:       FEFunction.fpkSTOF ();
 23830:     }
 23831:   }  //fpkFVAL()
 23832: 
 23833:   //fpkCLMUL ()
 23834:   //  $FEE0  __CLMUL
 23835:   //  32bit符号あり整数乗算
 23836:   //  <(a7).l:32bit符号あり整数。被乗数x
 23837:   //  <4(a7).l:32bit符号あり整数。乗数y
 23838:   //  >(a7).l:32bit符号あり整数。積x*y。オーバーフローのときは不定
 23839:   //  >ccr:cs=オーバーフロー。C以外は不定
 23840:   public static void fpkCLMUL () throws M68kException {
 23841:     int a7 = XEiJ.regRn[15];
 23842:     long l = (long) mmuReadLongData (a7, 1) * (long) mmuReadLongData (a7 + 4, 1);
 23843:     int h = (int) l;
 23844:     mmuWriteLongData (a7, h, 1);  //オーバーフローのときは積の下位32bit
 23845:     XEiJ.regCCR = (long) h == l ? 0 : XEiJ.REG_CCR_C;
 23846:   }  //fpkCLMUL()
 23847: 
 23848:   //fpkCLDIV ()
 23849:   //  $FEE1  __CLDIV
 23850:   //  32bit符号あり整数除算
 23851:   //  <(a7).l:32bit符号あり整数。被除数x
 23852:   //  <4(a7).l:32bit符号あり整数。除数y
 23853:   //  >(a7).l:32bit符号あり整数。商x/y。ゼロ除算のときは不定
 23854:   //  >ccr:cs=ゼロ除算。C以外は不定
 23855:   public static void fpkCLDIV () throws M68kException {
 23856:     int a7 = XEiJ.regRn[15];
 23857:     int h = mmuReadLongData (a7 + 4, 1);
 23858:     if (h == 0) {
 23859:       //(a7).lは変化しない
 23860:       XEiJ.regCCR = XEiJ.REG_CCR_C;
 23861:     } else {
 23862:       mmuWriteLongData (a7, mmuReadLongData (a7, 1) / h, 1);
 23863:       XEiJ.regCCR = 0;
 23864:     }
 23865:   }  //fpkCLDIV()
 23866: 
 23867:   //fpkCLMOD ()
 23868:   //  $FEE2  __CLMOD
 23869:   //  32bit符号あり整数剰余算
 23870:   //  <(a7).l:32bit符号あり整数。被除数x
 23871:   //  <4(a7).l:32bit符号あり整数。除数y
 23872:   //  >(a7).l:32bit符号あり整数。余りx%y。ゼロ除算のときは不定
 23873:   //  >ccr:cs=ゼロ除算。C以外は不定
 23874:   public static void fpkCLMOD () throws M68kException {
 23875:     int a7 = XEiJ.regRn[15];
 23876:     int h = mmuReadLongData (a7 + 4, 1);
 23877:     if (h == 0) {
 23878:       //(a7).lは変化しない
 23879:       XEiJ.regCCR = XEiJ.REG_CCR_C;
 23880:     } else {
 23881:       mmuWriteLongData (a7, mmuReadLongData (a7, 1) % h, 1);
 23882:       XEiJ.regCCR = 0;
 23883:     }
 23884:   }  //fpkCLMOD()
 23885: 
 23886:   //fpkCUMUL ()
 23887:   //  $FEE3  __CUMUL
 23888:   //  32bit符号なし整数乗算
 23889:   //  <(a7).l:32bit符号なし整数。被乗数x
 23890:   //  <4(a7).l:32bit符号なし整数。乗数y
 23891:   //  >(a7).l:32bit符号なし整数。積x*y。オーバーフローのときは不定
 23892:   //  >ccr:cs=オーバーフロー。C以外は不定
 23893:   public static void fpkCUMUL () throws M68kException {
 23894:     int a7 = XEiJ.regRn[15];
 23895:     long l = (0xffffffffL & mmuReadLongData (a7, 1)) * (0xffffffffL & mmuReadLongData (a7 + 4, 1));
 23896:     int h = (int) l;
 23897:     mmuWriteLongData (a7, h, 1);
 23898:     XEiJ.regCCR = (0xffffffffL & h) == l ? 0 : XEiJ.REG_CCR_C;
 23899:   }  //fpkCUMUL()
 23900: 
 23901:   //fpkCUDIV ()
 23902:   //  $FEE4  __CUDIV
 23903:   //  32bit符号なし整数除算
 23904:   //  <(a7).l:32bit符号なし整数。被除数x
 23905:   //  <4(a7).l:32bit符号なし整数。除数y
 23906:   //  >(a7).l:32bit符号なし整数。商x/y。ゼロ除算のときは不定
 23907:   //  >ccr:cs=ゼロ除算。C以外は不定
 23908:   public static void fpkCUDIV () throws M68kException {
 23909:     int a7 = XEiJ.regRn[15];
 23910:     int h = mmuReadLongData (a7 + 4, 1);
 23911:     if (h == 0) {
 23912:       //(a7).lは変化しない
 23913:       XEiJ.regCCR = XEiJ.REG_CCR_C;
 23914:     } else {
 23915:       mmuWriteLongData (a7, (int) ((0xffffffffL & mmuReadLongData (a7, 1)) / (0xffffffffL & h)), 1);
 23916:       XEiJ.regCCR = 0;
 23917:     }
 23918:   }  //fpkCUDIV()
 23919: 
 23920:   //fpkCUMOD ()
 23921:   //  $FEE5  __CUMOD
 23922:   //  32bit符号なし整数剰余算
 23923:   //  <(a7).l:32bit符号なし整数。被除数x
 23924:   //  <4(a7).l:32bit符号なし整数。除数y
 23925:   //  >(a7).l:32bit符号なし整数。余りx%y。ゼロ除算のときは不定
 23926:   //  >ccr:cs=ゼロ除算。C以外は不定
 23927:   public static void fpkCUMOD () throws M68kException {
 23928:     int a7 = XEiJ.regRn[15];
 23929:     int h = mmuReadLongData (a7 + 4, 1);
 23930:     if (h == 0) {
 23931:       //(a7).lは変化しない
 23932:       XEiJ.regCCR = XEiJ.REG_CCR_C;
 23933:     } else {
 23934:       mmuWriteLongData (a7, (int) ((0xffffffffL & mmuReadLongData (a7, 1)) % (0xffffffffL & h)), 1);
 23935:       XEiJ.regCCR = 0;
 23936:     }
 23937:   }  //fpkCUMOD()
 23938: 
 23939:   //fpkCLTOD ()
 23940:   //  $FEE6  __CLTOD
 23941:   //  32bit符号あり整数を64bit浮動小数点数に変換する
 23942:   //  <(a7).l:32bit符号あり整数。x
 23943:   //  >(a7).d:64bit浮動小数点数。(double)x
 23944:   public static void fpkCLTOD () throws M68kException {
 23945:     //int→double→[long]→[int,int]
 23946:     int a7 = XEiJ.regRn[15];
 23947:     long l = Double.doubleToLongBits ((double) mmuReadLongData (a7, 1));
 23948:     mmuWriteLongData (a7, (int) (l >>> 32), 1);
 23949:     mmuWriteLongData (a7 + 4, (int) l, 1);
 23950:   }  //fpkCLTOD()
 23951: 
 23952:   //fpkCDTOL ()
 23953:   //  $FEE7  __CDTOL
 23954:   //  64bit浮動小数点数を32bit符号あり整数に変換する
 23955:   //  <(a7).d:64bit浮動小数点数。x
 23956:   //  >(a7).l:32bit符号あり整数。(int)x
 23957:   //  >ccr:cs=オーバーフロー。C以外は不定
 23958:   public static void fpkCDTOL () throws M68kException {
 23959:     //[int,int]→[long]→double→int
 23960:     int a7 = XEiJ.regRn[15];
 23961:     double d = Double.longBitsToDouble ((long) mmuReadLongData (a7, 1) << 32 | 0xffffffffL & mmuReadLongData (a7 + 4, 1));
 23962:     mmuWriteLongData (a7, (int) d, 1);  //オーバーフローのときは最小値または最大値
 23963:     XEiJ.regCCR = (double) Integer.MIN_VALUE - 1.0 < d && d < (double) Integer.MAX_VALUE + 1.0 ? 0 : XEiJ.REG_CCR_C;  //NaN,±Infはエラー
 23964:   }  //fpkCDTOL()
 23965: 
 23966:   //fpkCLTOF ()
 23967:   //  $FEE8  __CLTOF
 23968:   //  32bit符号あり整数を32bit浮動小数点数に変換する
 23969:   //  <(a7).l:32bit符号あり整数。x
 23970:   //  >(a7).s:32bit浮動小数点数。(float)x
 23971:   public static void fpkCLTOF () throws M68kException {
 23972:     //int→float→[int]
 23973:     int a7 = XEiJ.regRn[15];
 23974:     mmuWriteLongData (a7, Float.floatToIntBits ((float) mmuReadLongData (a7, 1)), 1);
 23975:   }  //fpkCLTOF()
 23976: 
 23977:   //fpkCFTOL ()
 23978:   //  $FEE9  __CFTOL
 23979:   //  32bit浮動小数点数を32bit符号あり整数に変換する
 23980:   //  <(a7).s:32bit浮動小数点数。x
 23981:   //  >(a7).l:32bit符号あり整数。(int)x
 23982:   //  >ccr:cs=オーバーフロー。C以外は不定
 23983:   public static void fpkCFTOL () throws M68kException {
 23984:     //[int]→float→int
 23985:     int a7 = XEiJ.regRn[15];
 23986:     float f = Float.intBitsToFloat (mmuReadLongData (a7, 1));
 23987:     mmuWriteLongData (a7, (int) f, 1);
 23988:     XEiJ.regCCR = (float) Integer.MIN_VALUE - 1.0F < f && f < (float) Integer.MAX_VALUE + 1.0F ? 0 : XEiJ.REG_CCR_C;  //NaN,±Infはエラー
 23989:   }  //fpkCFTOL()
 23990: 
 23991:   //fpkCFTOD ()
 23992:   //  $FEEA  __CFTOD
 23993:   //  32bit浮動小数点数を64bit浮動小数点数に変換する
 23994:   //  <(a7).s:32bit浮動小数点数。x
 23995:   //  >(a7).d:64bit浮動小数点数。(double)x
 23996:   public static void fpkCFTOD () throws M68kException {
 23997:     //[int]→float→double→[long]→[int,int]
 23998:     int a7 = XEiJ.regRn[15];
 23999:     long l = Double.doubleToLongBits ((double) Float.intBitsToFloat (mmuReadLongData (a7, 1)));
 24000:     if (FEFunction.FPK_FPCP_NAN && l == 0x7ff8000000000000L) {
 24001:       l = 0x7fffffffffffffffL;
 24002:     }
 24003:     mmuWriteLongData (a7, (int) (l >>> 32), 1);
 24004:     mmuWriteLongData (a7 + 4, (int) l, 1);
 24005:   }  //fpkCFTOD()
 24006: 
 24007:   //fpkCDTOF ()
 24008:   //  $FEEB  __CDTOF
 24009:   //  64bit浮動小数点数を32bit浮動小数点数に変換する
 24010:   //  <(a7).d:64bit浮動小数点数。x
 24011:   //  >(a7).s:32bit浮動小数点数。(float)x
 24012:   //  >ccr:cs=オーバーフロー。C以外は不定
 24013:   public static void fpkCDTOF () throws M68kException {
 24014:     //[int,int]→[long]→double→float→[int]
 24015:     int a7 = XEiJ.regRn[15];
 24016:     double d = Double.longBitsToDouble ((long) mmuReadLongData (a7, 1) << 32 | 0xffffffffL & mmuReadLongData (a7 + 4, 1));
 24017:     int h = Float.floatToIntBits ((float) d);
 24018:     if (FEFunction.FPK_FPCP_NAN && h == 0x7fc00000) {
 24019:       h = 0x7fffffff;
 24020:     }
 24021:     mmuWriteLongData (a7, h, 1);
 24022:     XEiJ.regCCR = (Double.isNaN (d) || Double.isInfinite (d) ||
 24023:            Math.abs (d) < (double) Float.MAX_VALUE + 0.5 * (double) Math.ulp (Float.MAX_VALUE) ? 0 : XEiJ.REG_CCR_C);  //アンダーフローはエラーなし
 24024:   }  //fpkCDTOF()
 24025: 
 24026:   //fpkCDCMP ()
 24027:   //  $FEEC  __CDCMP
 24028:   //  64bit浮動小数点数の比較
 24029:   //  x<=>y
 24030:   //  <(a7).d:64bit浮動小数点数。x
 24031:   //  <8(a7).d:64bit浮動小数点数。y
 24032:   //  >ccr:lt=x<y,eq=x==y,gt=x>y
 24033:   public static void fpkCDCMP () throws M68kException {
 24034:     //([int,int]→[long]→double)<=>([int,int]→[long]→double)
 24035:     int a7 = XEiJ.regRn[15];
 24036:     double xd = Double.longBitsToDouble ((long) mmuReadLongData (a7, 1) << 32 | 0xffffffffL & mmuReadLongData (a7 + 4, 1));
 24037:     double yd = Double.longBitsToDouble ((long) mmuReadLongData (a7 + 8, 1) << 32 | 0xffffffffL & mmuReadLongData (a7 + 12, 1));
 24038:     XEiJ.regCCR = xd < yd ? XEiJ.REG_CCR_N | XEiJ.REG_CCR_C : xd == yd ? XEiJ.REG_CCR_Z : 0;  //どちらかがNaNのときは0
 24039:   }  //fpkCDCMP()
 24040: 
 24041:   //fpkCDADD ()
 24042:   //  $FEED  __CDADD
 24043:   //  64bit浮動小数点数の加算
 24044:   //  <(a7).d:64bit浮動小数点数。被加算数x
 24045:   //  <8(a7).d:64bit浮動小数点数。加算数y
 24046:   //  >(a7).d:64bit浮動小数点数。和x+y
 24047:   //  >ccr:0=エラーなし,CCR_C=アンダーフロー,CCR_V|CCR_C=オーバーフロー
 24048:   public static void fpkCDADD () throws M68kException {
 24049:     //([int,int]→[long]→double)+([int,int]→[long]→double)→[long]→[int,int]
 24050:     int a7 = XEiJ.regRn[15];
 24051:     double xd = Double.longBitsToDouble ((long) mmuReadLongData (a7, 1) << 32 | 0xffffffffL & mmuReadLongData (a7 + 4, 1));
 24052:     double yd = Double.longBitsToDouble ((long) mmuReadLongData (a7 + 8, 1) << 32 | 0xffffffffL & mmuReadLongData (a7 + 12, 1));
 24053:     double zd = xd + yd;
 24054:     long l = Double.doubleToLongBits (zd);
 24055:     if (FEFunction.FPK_FPCP_NAN && l == 0x7ff8000000000000L) {
 24056:       l = 0x7fffffffffffffffL;
 24057:     }
 24058:     mmuWriteLongData (a7, (int) (l >>> 32), 1);
 24059:     mmuWriteLongData (a7 + 4, (int) l, 1);
 24060:     XEiJ.regCCR = (Double.isNaN (xd) || Double.isNaN (yd) ? 0 :  //引数がNaN
 24061:            Double.isNaN (zd) ? XEiJ.REG_CCR_C :  //引数がNaNでないのに結果がNaNのときはエラー。(+Inf)+(-Inf)=NaN
 24062:            Double.isInfinite (xd) || Double.isInfinite (yd) ? 0 :  //引数が±Inf
 24063:            Double.isInfinite (zd) ? XEiJ.REG_CCR_V | XEiJ.REG_CCR_C :  //引数が±Infでないのに結果が±Infのときはオーバーフロー
 24064:            0);
 24065:   }  //fpkCDADD()
 24066: 
 24067:   //fpkCDSUB ()
 24068:   //  $FEEE  __CDSUB
 24069:   //  64bit浮動小数点数の減算
 24070:   //  <(a7).d:64bit浮動小数点数。被減算数x
 24071:   //  <8(a7).d:64bit浮動小数点数。減算数y
 24072:   //  >(a7).d:64bit浮動小数点数。差x-y
 24073:   //  >ccr:cs=エラー,vs=オーバーフロー
 24074:   public static void fpkCDSUB () throws M68kException {
 24075:     //([int,int]→[long]→double)-([int,int]→[long]→double)→[long]→[int,int]
 24076:     int a7 = XEiJ.regRn[15];
 24077:     double xd = Double.longBitsToDouble ((long) mmuReadLongData (a7, 1) << 32 | 0xffffffffL & mmuReadLongData (a7 + 4, 1));
 24078:     double yd = Double.longBitsToDouble ((long) mmuReadLongData (a7 + 8, 1) << 32 | 0xffffffffL & mmuReadLongData (a7 + 12, 1));
 24079:     double zd = xd - yd;
 24080:     long l = Double.doubleToLongBits (zd);
 24081:     if (FEFunction.FPK_FPCP_NAN && l == 0x7ff8000000000000L) {
 24082:       l = 0x7fffffffffffffffL;
 24083:     }
 24084:     mmuWriteLongData (a7, (int) (l >>> 32), 1);
 24085:     mmuWriteLongData (a7 + 4, (int) l, 1);
 24086:     XEiJ.regCCR = (Double.isNaN (xd) || Double.isNaN (yd) ? 0 :  //引数がNaN
 24087:            Double.isNaN (zd) ? XEiJ.REG_CCR_C :  //引数がNaNでないのに結果がNaNのときはエラー。(+Inf)-(+Inf)=NaN
 24088:            Double.isInfinite (xd) || Double.isInfinite (yd) ? 0 :  //引数が±Inf
 24089:            Double.isInfinite (zd) ? XEiJ.REG_CCR_V | XEiJ.REG_CCR_C :  //引数が±Infでないのに結果が±Infのときはオーバーフロー
 24090:            0);
 24091:   }  //fpkCDSUB()
 24092: 
 24093:   //fpkCDMUL ()
 24094:   //  $FEEF  __CDMUL
 24095:   //  64bit浮動小数点数の乗算
 24096:   //  <(a7).d:64bit浮動小数点数。被乗数x
 24097:   //  <8(a7).d:64bit浮動小数点数。乗数y
 24098:   //  >(a7).d:64bit浮動小数点数。積x*y
 24099:   //  >ccr:cs=エラー,vs=オーバーフロー
 24100:   public static void fpkCDMUL () throws M68kException {
 24101:     //([int,int]→[long]→double)*([int,int]→[long]→double)→[long]→[int,int]
 24102:     int a7 = XEiJ.regRn[15];
 24103:     double xd = Double.longBitsToDouble ((long) mmuReadLongData (a7, 1) << 32 | 0xffffffffL & mmuReadLongData (a7 + 4, 1));
 24104:     double yd = Double.longBitsToDouble ((long) mmuReadLongData (a7 + 8, 1) << 32 | 0xffffffffL & mmuReadLongData (a7 + 12, 1));
 24105:     double zd = xd * yd;
 24106:     long l = Double.doubleToLongBits (zd);
 24107:     if (FEFunction.FPK_FPCP_NAN && l == 0x7ff8000000000000L) {
 24108:       l = 0x7fffffffffffffffL;
 24109:     }
 24110:     mmuWriteLongData (a7, (int) (l >>> 32), 1);
 24111:     mmuWriteLongData (a7 + 4, (int) l, 1);
 24112:     XEiJ.regCCR = (Double.isNaN (xd) || Double.isNaN (yd) ? 0 :  //引数がNaN
 24113:            Double.isNaN (zd) ? XEiJ.REG_CCR_C :  //引数がNaNでないのに結果がNaNのときはエラー。(±0)*(±Inf)=NaN
 24114:            Double.isInfinite (xd) || Double.isInfinite (yd) ? 0 :  //引数が±Inf
 24115:            Double.isInfinite (zd) ? XEiJ.REG_CCR_V | XEiJ.REG_CCR_C :  //引数が±Infでないのに結果が±Infのときはオーバーフロー
 24116:            0);
 24117:   }  //fpkCDMUL()
 24118: 
 24119:   //fpkCDDIV ()
 24120:   //  $FEF0  __CDDIV
 24121:   //  64bit浮動小数点数の除算
 24122:   //  <(a7).d:64bit浮動小数点数。被除数x
 24123:   //  <8(a7).d:64bit浮動小数点数。除数y
 24124:   //  >(a7).d:64bit浮動小数点数。商x/y。ゼロ除算のときは不定
 24125:   //  >ccr:cs=エラー,eq=ゼロ除算,vs=オーバーフロー
 24126:   public static void fpkCDDIV () throws M68kException {
 24127:     //([int,int]→[long]→double)/([int,int]→[long]→double)→[long]→[int,int]
 24128:     int a7 = XEiJ.regRn[15];
 24129:     double xd = Double.longBitsToDouble ((long) mmuReadLongData (a7, 1) << 32 | 0xffffffffL & mmuReadLongData (a7 + 4, 1));
 24130:     double yd = Double.longBitsToDouble ((long) mmuReadLongData (a7 + 8, 1) << 32 | 0xffffffffL & mmuReadLongData (a7 + 12, 1));
 24131:     double zd = xd / yd;
 24132:     long l = Double.doubleToLongBits (zd);
 24133:     if (FEFunction.FPK_FPCP_NAN && l == 0x7ff8000000000000L) {
 24134:       l = 0x7fffffffffffffffL;
 24135:     }
 24136:     mmuWriteLongData (a7, (int) (l >>> 32), 1);
 24137:     mmuWriteLongData (a7 + 4, (int) l, 1);
 24138:     XEiJ.regCCR = (Double.isNaN (xd) || Double.isNaN (yd) ? 0 :  //引数がNaN
 24139:            Double.isNaN (zd) ? XEiJ.REG_CCR_C :  //引数がNaNでないのに結果がNaNのときはエラー。(±0)/(±0)=NaN
 24140:            Double.isInfinite (xd) || Double.isInfinite (yd) ? 0 :  //引数が±Inf。(±Inf)/(±0)=(±Inf)
 24141:            yd == 0.0 ? XEiJ.REG_CCR_Z | XEiJ.REG_CCR_C :  //除数が±0のときはゼロ除算
 24142:            Double.isInfinite (zd) ? XEiJ.REG_CCR_V | XEiJ.REG_CCR_C :  //引数が±Infでないのに結果が±Infのときはオーバーフロー
 24143:            0);
 24144:   }  //fpkCDDIV()
 24145: 
 24146:   //fpkCDMOD ()
 24147:   //  $FEF1  __CDMOD
 24148:   //  64bit浮動小数点数の剰余算
 24149:   //  <(a7).d:64bit浮動小数点数。被除数x
 24150:   //  <8(a7).d:64bit浮動小数点数。除数y
 24151:   //  >(a7).d:64bit浮動小数点数。余りx%y。ゼロ除算のときは不定
 24152:   //  >ccr:cs=エラー,eq=ゼロ除算
 24153:   public static void fpkCDMOD () throws M68kException {
 24154:     //([int,int]→[long]→double)%([int,int]→[long]→double)→[long]→[int,int]
 24155:     int a7 = XEiJ.regRn[15];
 24156:     double xd = Double.longBitsToDouble ((long) mmuReadLongData (a7, 1) << 32 | 0xffffffffL & mmuReadLongData (a7 + 4, 1));
 24157:     double yd = Double.longBitsToDouble ((long) mmuReadLongData (a7 + 8, 1) << 32 | 0xffffffffL & mmuReadLongData (a7 + 12, 1));
 24158:     double zd = xd % yd;
 24159:     long l = Double.doubleToLongBits (zd);
 24160:     if (FEFunction.FPK_FPCP_NAN && l == 0x7ff8000000000000L) {
 24161:       l = 0x7fffffffffffffffL;
 24162:     }
 24163:     mmuWriteLongData (a7, (int) (l >>> 32), 1);
 24164:     mmuWriteLongData (a7 + 4, (int) l, 1);
 24165:     XEiJ.regCCR = (Double.isNaN (xd) || Double.isNaN (yd) ? 0 :  //引数がNaN
 24166:            yd == 0.0 ? XEiJ.REG_CCR_Z | XEiJ.REG_CCR_C :  //除数が0のときはゼロ除算。(±Inf)%(±0)=NaN, x%(±0)=(±Inf)
 24167:            Double.isNaN (zd) ? XEiJ.REG_CCR_C :  //引数がNaNでないのに結果がNaNのときはエラー。(±Inf)%y=NaN
 24168:            Double.isInfinite (xd) || Double.isInfinite (yd) ? 0 :  //引数が±Inf
 24169:            Double.isInfinite (zd) ? XEiJ.REG_CCR_V | XEiJ.REG_CCR_C :  //引数が±Infでないのに結果が±Infのときはオーバーフロー
 24170:            0);
 24171:   }  //fpkCDMOD()
 24172: 
 24173:   //fpkCFCMP ()
 24174:   //  $FEF2  __CFCMP
 24175:   //  32bit浮動小数点数の比較
 24176:   //  x<=>y
 24177:   //  <(a7).s:32bit浮動小数点数。x
 24178:   //  <(a7).s:32bit浮動小数点数。y
 24179:   //  >ccr:lt=x<y,eq=x==y,gt=x>y
 24180:   public static void fpkCFCMP () throws M68kException {
 24181:     //([int]→float)<=>([int]→float)
 24182:     int a7 = XEiJ.regRn[15];
 24183:     float xf = Float.intBitsToFloat (mmuReadLongData (a7, 1));
 24184:     float yf = Float.intBitsToFloat (mmuReadLongData (a7 + 4, 1));
 24185:     XEiJ.regCCR = xf < yf ? XEiJ.REG_CCR_N | XEiJ.REG_CCR_C : xf == yf ? XEiJ.REG_CCR_Z : 0;  //どちらかがNaNのときは0
 24186:   }  //fpkCFCMP()
 24187: 
 24188:   //fpkCFADD ()
 24189:   //  $FEF3  __CFADD
 24190:   //  32bit浮動小数点数の加算
 24191:   //  <(a7).s:32bit浮動小数点数。被加算数x
 24192:   //  <4(a7).s:32bit浮動小数点数。加算数y
 24193:   //  >(a7).s:32bit浮動小数点数。和x+y
 24194:   //  >ccr:cs=エラー,vs=オーバーフロー
 24195:   public static void fpkCFADD () throws M68kException {
 24196:     //([int]→float)+([int]→float)→[int]
 24197:     int a7 = XEiJ.regRn[15];
 24198:     float xf = Float.intBitsToFloat (mmuReadLongData (a7, 1));
 24199:     float yf = Float.intBitsToFloat (mmuReadLongData (a7 + 4, 1));
 24200:     float zf = xf + yf;
 24201:     int h = Float.floatToIntBits (zf);
 24202:     if (FEFunction.FPK_FPCP_NAN && h == 0x7fc00000) {
 24203:       h = 0x7fffffff;
 24204:     }
 24205:     mmuWriteLongData (a7, h, 1);
 24206:     XEiJ.regCCR = (Float.isNaN (xf) || Float.isNaN (yf) ? 0 :  //引数がNaN
 24207:            Float.isNaN (zf) ? XEiJ.REG_CCR_C :  //引数がNaNでないのに結果がNaNのときはエラー。(+Inf)+(-Inf)=NaN
 24208:            Float.isInfinite (xf) || Float.isInfinite (yf) ? 0 :  //引数が±Inf
 24209:            Float.isInfinite (zf) ? XEiJ.REG_CCR_V | XEiJ.REG_CCR_C :  //引数が±Infでないのに結果が±Infのときはオーバーフロー
 24210:            0);
 24211:   }  //fpkCFADD()
 24212: 
 24213:   //fpkCFSUB ()
 24214:   //  $FEF4  __CFSUB
 24215:   //  32bit浮動小数点数の減算
 24216:   //  <(a7).s:32bit浮動小数点数。被減算数x
 24217:   //  <4(a7).s:32bit浮動小数点数。減算数y
 24218:   //  >(a7).s:32bit浮動小数点数。差x-y
 24219:   //  >ccr:cs=エラー,vs=オーバーフロー
 24220:   public static void fpkCFSUB () throws M68kException {
 24221:     //([int]→float)-([int]→float)→[int]
 24222:     int a7 = XEiJ.regRn[15];
 24223:     float xf = Float.intBitsToFloat (mmuReadLongData (a7, 1));
 24224:     float yf = Float.intBitsToFloat (mmuReadLongData (a7 + 4, 1));
 24225:     float zf = xf - yf;
 24226:     int h = Float.floatToIntBits (zf);
 24227:     if (FEFunction.FPK_FPCP_NAN && h == 0x7fc00000) {
 24228:       h = 0x7fffffff;
 24229:     }
 24230:     mmuWriteLongData (a7, h, 1);
 24231:     XEiJ.regCCR = (Float.isNaN (xf) || Float.isNaN (yf) ? 0 :  //引数がNaN
 24232:            Float.isNaN (zf) ? XEiJ.REG_CCR_C :  //引数がNaNでないのに結果がNaNのときはエラー。(+Inf)-(+Inf)=NaN
 24233:            Float.isInfinite (xf) || Float.isInfinite (yf) ? 0 :  //引数が±Inf
 24234:            Float.isInfinite (zf) ? XEiJ.REG_CCR_V | XEiJ.REG_CCR_C :  //引数が±Infでないのに結果が±Infのときはオーバーフロー
 24235:            0);
 24236:   }  //fpkCFSUB()
 24237: 
 24238:   //fpkCFMUL ()
 24239:   //  $FEF5  __CFMUL
 24240:   //  32bit浮動小数点数の乗算
 24241:   //  <(a7).s:32bit浮動小数点数。被乗数x
 24242:   //  <4(a7).s:32bit浮動小数点数。乗数y
 24243:   //  >(a7).s:32bit浮動小数点数。積x*y
 24244:   //  >ccr:0=エラーなし,CCR_C=アンダーフロー,CCR_V|CCR_C=オーバーフロー
 24245:   public static void fpkCFMUL () throws M68kException {
 24246:     //([int]→float)*([int]→float)→[int]
 24247:     int a7 = XEiJ.regRn[15];
 24248:     float xf = Float.intBitsToFloat (mmuReadLongData (a7, 1));
 24249:     float yf = Float.intBitsToFloat (mmuReadLongData (a7 + 4, 1));
 24250:     float zf = xf * yf;
 24251:     int h = Float.floatToIntBits (zf);
 24252:     if (FEFunction.FPK_FPCP_NAN && h == 0x7fc00000) {
 24253:       h = 0x7fffffff;
 24254:     }
 24255:     mmuWriteLongData (a7, h, 1);
 24256:     XEiJ.regCCR = (Float.isNaN (xf) || Float.isNaN (yf) ? 0 :  //引数がNaN
 24257:            Float.isNaN (zf) ? XEiJ.REG_CCR_C :  //引数がNaNでないのに結果がNaNのときはエラー。(±0)*(±Inf)=NaN
 24258:            Float.isInfinite (xf) || Float.isInfinite (yf) ? 0 :  //引数が±Inf
 24259:            Float.isInfinite (zf) ? XEiJ.REG_CCR_V | XEiJ.REG_CCR_C :  //引数が±Infでないのに結果が±Infのときはオーバーフロー
 24260:            0);
 24261:   }  //fpkCFMUL()
 24262: 
 24263:   //fpkCFDIV ()
 24264:   //  $FEF6  __CFDIV
 24265:   //  32bit浮動小数点数の除算
 24266:   //  <(a7).s:32bit浮動小数点数。被除数x
 24267:   //  <4(a7).s:32bit浮動小数点数。除数y
 24268:   //  >(a7).s:32bit浮動小数点数。商x/y。ゼロ除算のときは不定
 24269:   //  >ccr:cs=エラー,eq=ゼロ除算,vs=オーバーフロー
 24270:   public static void fpkCFDIV () throws M68kException {
 24271:     //([int]→float)/([int]→float)→[int]
 24272:     int a7 = XEiJ.regRn[15];
 24273:     float xf = Float.intBitsToFloat (mmuReadLongData (a7, 1));
 24274:     float yf = Float.intBitsToFloat (mmuReadLongData (a7 + 4, 1));
 24275:     float zf = xf / yf;
 24276:     int h = Float.floatToIntBits (zf);
 24277:     if (FEFunction.FPK_FPCP_NAN && h == 0x7fc00000) {
 24278:       h = 0x7fffffff;
 24279:     }
 24280:     mmuWriteLongData (a7, h, 1);
 24281:     XEiJ.regCCR = (Float.isNaN (xf) || Float.isNaN (yf) ? 0 :  //引数がNaN
 24282:            Float.isNaN (zf) ? XEiJ.REG_CCR_C :  //引数がNaNでないのに結果がNaNのときはエラー。(±0)/(±0)=NaN
 24283:            Float.isInfinite (xf) || Float.isInfinite (yf) ? 0 :  //引数が±Inf。(±Inf)/(±0)=(±Inf)
 24284:            yf == 0.0F ? XEiJ.REG_CCR_Z | XEiJ.REG_CCR_C :  //除数が±0のときはゼロ除算
 24285:            Float.isInfinite (zf) ? XEiJ.REG_CCR_V | XEiJ.REG_CCR_C :  //引数が±Infでないのに結果が±Infのときはオーバーフロー
 24286:            0);
 24287:   }  //fpkCFDIV()
 24288: 
 24289:   //fpkCFMOD ()
 24290:   //  $FEF7  __CFMOD
 24291:   //  32bit浮動小数点数の剰余算
 24292:   //  <(a7).s:32bit浮動小数点数。被除数x
 24293:   //  <4(a7).s:32bit浮動小数点数。除数y
 24294:   //  >(a7).s:32bit浮動小数点数。余りx%y。ゼロ除算のときは不定
 24295:   //  >ccr:cs=エラー,eq=ゼロ除算
 24296:   public static void fpkCFMOD () throws M68kException {
 24297:     //([int]→float)%([int]→float)→[int]
 24298:     int a7 = XEiJ.regRn[15];
 24299:     float xf = Float.intBitsToFloat (mmuReadLongData (a7, 1));
 24300:     float yf = Float.intBitsToFloat (mmuReadLongData (a7 + 4, 1));
 24301:     float zf = xf % yf;
 24302:     int h = Float.floatToIntBits (zf);
 24303:     if (FEFunction.FPK_FPCP_NAN && h == 0x7fc00000) {
 24304:       h = 0x7fffffff;
 24305:     }
 24306:     mmuWriteLongData (a7, h, 1);
 24307:     XEiJ.regCCR = (Float.isNaN (xf) || Float.isNaN (yf) ? 0 :  //引数がNaN
 24308:            yf == 0.0F ? XEiJ.REG_CCR_Z | XEiJ.REG_CCR_C :  //除数が0のときはゼロ除算。(±Inf)%(±0)=NaN, x%(±0)=(±Inf)
 24309:            Float.isNaN (zf) ? XEiJ.REG_CCR_C :  //引数がNaNでないのに結果がNaNのときはエラー。(±Inf)%y=NaN
 24310:            Float.isInfinite (xf) || Float.isInfinite (yf) ? 0 :  //引数が±Inf
 24311:            Float.isInfinite (zf) ? XEiJ.REG_CCR_V | XEiJ.REG_CCR_C :  //引数が±Infでないのに結果が±Infのときはオーバーフロー
 24312:            0);
 24313:   }  //fpkCFMOD()
 24314: 
 24315:   //fpkCDTST ()
 24316:   //  $FEF8  __CDTST
 24317:   //  64bit浮動小数点数と0の比較
 24318:   //  x<=>0
 24319:   //  <(a7).d:64bit浮動小数点数。x
 24320:   //  >ccr:lt=x<0,eq=x==0,gt=x>0
 24321:   public static void fpkCDTST () throws M68kException {
 24322:     if (true) {
 24323:       int a7 = XEiJ.regRn[15];
 24324:       long l = (long) mmuReadLongData (a7, 1) << 32 | 0xffffffffL & mmuReadLongData (a7 + 4, 1);
 24325:       XEiJ.regCCR = l << 1 == 0L ? XEiJ.REG_CCR_Z : 0L <= l ? 0 : XEiJ.REG_CCR_N;  //NaNのときは0
 24326:     } else {
 24327:       //[int,int]→[long]→double
 24328:       int a7 = XEiJ.regRn[15];
 24329:       double d = Double.longBitsToDouble ((long) mmuReadLongData (a7, 1) << 32 | 0xffffffffL & mmuReadLongData (a7 + 4, 1));
 24330:       XEiJ.regCCR = d < 0.0 ? XEiJ.REG_CCR_N : d == 0.0 ? XEiJ.REG_CCR_Z : 0;  //NaNのときは0
 24331:     }
 24332:   }  //fpkCDTST()
 24333: 
 24334:   //fpkCFTST ()
 24335:   //  $FEF9  __CFTST
 24336:   //  32bit浮動小数点数と0の比較
 24337:   //  x<=>0
 24338:   //  <(a7).s:32bit浮動小数点数。x
 24339:   //  >ccr:lt=x<0,eq=x==0,gt=x>0
 24340:   public static void fpkCFTST () throws M68kException {
 24341:     //[int]→float
 24342:     if (true) {
 24343:       int h = mmuReadLongData (XEiJ.regRn[15], 1);
 24344:       XEiJ.regCCR = h << 1 == 0 ? XEiJ.REG_CCR_Z : 0 <= h ? 0 : XEiJ.REG_CCR_N;  //NaNのときは0
 24345:     } else {
 24346:       //([int]→float)<=>0
 24347:       float f = Float.intBitsToFloat (mmuReadLongData (XEiJ.regRn[15], 1));
 24348:       XEiJ.regCCR = f < 0.0F ? XEiJ.REG_CCR_N : f == 0.0F ? XEiJ.REG_CCR_Z : 0;  //NaNのときは0
 24349:     }
 24350:   }  //fpkCFTST()
 24351: 
 24352:   //fpkCDINC ()
 24353:   //  $FEFA  __CDINC
 24354:   //  64bit浮動小数点数に1を加える
 24355:   //  <(a7).d:64bit浮動小数点数。x
 24356:   //  >(a7).d:64bit浮動小数点数。x+1
 24357:   public static void fpkCDINC () throws M68kException {
 24358:     //([int,int]→[long]→double)+1→[long]→[int,int]
 24359:     int a7 = XEiJ.regRn[15];
 24360:     double xd = Double.longBitsToDouble ((long) mmuReadLongData (a7, 1) << 32 | 0xffffffffL & mmuReadLongData (a7 + 4, 1));
 24361:     double zd = xd + 1.0;
 24362:     long l = Double.doubleToLongBits (zd);
 24363:     if (FEFunction.FPK_FPCP_NAN && l == 0x7ff8000000000000L) {
 24364:       l = 0x7fffffffffffffffL;
 24365:     }
 24366:     mmuWriteLongData (a7, (int) (l >>> 32), 1);
 24367:     mmuWriteLongData (a7 + 4, (int) l, 1);
 24368:     XEiJ.regCCR = Double.isInfinite (zd) && !Double.isInfinite (xd) ? XEiJ.REG_CCR_V | XEiJ.REG_CCR_C : 0;  //結果が±Infだが引数が±Infでないときはオーバーフロー
 24369:   }  //fpkCDINC()
 24370: 
 24371:   //fpkCFINC ()
 24372:   //  $FEFB  __CFINC
 24373:   //  32bit浮動小数点数に1を加える
 24374:   //  <(a7).s:32bit浮動小数点数。x
 24375:   //  >(a7).s:32bit浮動小数点数。x+1
 24376:   public static void fpkCFINC () throws M68kException {
 24377:     //([int]→float)+1→[int]
 24378:     int a7 = XEiJ.regRn[15];
 24379:     float xf = Float.intBitsToFloat (mmuReadLongData (a7, 1));
 24380:     float zf = xf + 1.0F;
 24381:     int h = Float.floatToIntBits (zf);
 24382:     if (FEFunction.FPK_FPCP_NAN && h == 0x7fc00000) {
 24383:       h = 0x7fffffff;
 24384:     }
 24385:     mmuWriteLongData (a7, h, 1);
 24386:     XEiJ.regCCR = Double.isInfinite (zf) && !Float.isInfinite (xf) ? XEiJ.REG_CCR_V | XEiJ.REG_CCR_C : 0;  //結果が±Infだが引数が±Infでないときはオーバーフロー
 24387:   }  //fpkCFINC()
 24388: 
 24389:   //fpkCDDEC ()
 24390:   //  $FEFC  __CDDEC
 24391:   //  64bit浮動小数点数から1を引く
 24392:   //  <(a7).d:64bit浮動小数点数。x
 24393:   //  >(a7).d:64bit浮動小数点数。x-1
 24394:   public static void fpkCDDEC () throws M68kException {
 24395:     //([int,int]→[long]→double)-1→[long]→[int,int]
 24396:     int a7 = XEiJ.regRn[15];
 24397:     double xd = Double.longBitsToDouble ((long) mmuReadLongData (a7, 1) << 32 | 0xffffffffL & mmuReadLongData (a7 + 4, 1));
 24398:     double zd = xd - 1.0;
 24399:     long l = Double.doubleToLongBits (zd);
 24400:     if (FEFunction.FPK_FPCP_NAN && l == 0x7ff8000000000000L) {
 24401:       l = 0x7fffffffffffffffL;
 24402:     }
 24403:     mmuWriteLongData (a7, (int) (l >>> 32), 1);
 24404:     mmuWriteLongData (a7 + 4, (int) l, 1);
 24405:     XEiJ.regCCR = Double.isInfinite (zd) && !Double.isInfinite (xd) ? XEiJ.REG_CCR_V | XEiJ.REG_CCR_C : 0;  //結果が±Infだが引数が±Infでないときはオーバーフロー
 24406:   }  //fpkCDDEC()
 24407: 
 24408:   //fpkCFDEC ()
 24409:   //  $FEFD  __CFDEC
 24410:   //  32bit浮動小数点数から1を引く
 24411:   //  <(a7).s:32bit浮動小数点数。x
 24412:   //  >(a7).s:32bit浮動小数点数。x-1
 24413:   public static void fpkCFDEC () throws M68kException {
 24414:     //([int]→float)-1→[int]
 24415:     int a7 = XEiJ.regRn[15];
 24416:     float xf = Float.intBitsToFloat (mmuReadLongData (a7, 1));
 24417:     float zf = xf - 1.0F;
 24418:     int h = Float.floatToIntBits (zf);
 24419:     if (FEFunction.FPK_FPCP_NAN && h == 0x7fc00000) {
 24420:       h = 0x7fffffff;
 24421:     }
 24422:     mmuWriteLongData (a7, h, 1);
 24423:     XEiJ.regCCR = Double.isInfinite (zf) && !Float.isInfinite (xf) ? XEiJ.REG_CCR_V | XEiJ.REG_CCR_C : 0;  //結果が±Infだが引数が±Infでないときはオーバーフロー
 24424:   }  //fpkCFDEC()
 24425: 
 24426: 
 24427: 
 24428:   //========================================================================================
 24429:   //$$MMU メモリ管理ユニット
 24430: 
 24431:   public static final boolean MMU_DEBUG_COMMAND = false;
 24432:   public static final boolean MMU_DEBUG_TRANSLATION = false;
 24433:   public static final boolean MMU_NOT_ALLOCATE_CACHE = false;  //true=アドレス変換キャッシュをアロケートしない
 24434: 
 24435:   //--------------------------------------------------------------------------------
 24436:   //論理アドレスと物理アドレス
 24437:   //
 24438:   //  ページサイズが4KBの場合
 24439:   //              ┌──  7 ──┬──  7 ──┬── 6──┬─────12─────┐
 24440:   //               31          2524          1817        1211                     0
 24441:   //              ┏━━━━━━┯━━━━━━┯━━━━━┯━━━━━━━━━━━┓
 24442:   //        論理  ┃   ルート   │  ポインタ  │  ページ  │        ページ        ┃
 24443:   //      アドレス┃インデックス│インデックス インデックス       オフセット      ┃
 24444:   //              ┗━━↓━━━┷━━↓━━━┷━━↓━━┷━━━━━↓━━━━━┛
 24445:   //          ┌────┘            │            └────┐      └──────┐
 24446:   //          │    ルートテーブル    │   ポインタテーブル   │    ページテーブル  │
 24447:   //        ┌┼→┏━━━━━━━┓┌┼→┏━━━━━━━┓┌┼→┏━━━━━━━┓│
 24448:   //        ││ 0┃              ┃││ 0┃              ┃││ 0┃              ┃│
 24449:   //        ││  ┃              ┃││  ┃              ┃│└→┠───────┨│
 24450:   //        │└→┠───────┨││  ┃              ┃│    ┃    ページ    ┃│
 24451:   //      ルート  ┃    ルート    ┃│└→┠───────┨│┌─←ディスクリプタ┃│
 24452:   //     ポインタ ┃ディスクリプタ→┘    ┃   ポインタ   ┃││  ┠───────┨│
 24453:   //              ┠───────┨      ┃ディスクリプタ→┘│63┃              ┃│
 24454:   //              ┃              ┃      ┠───────┨  │  ┗━━━━━━━┛│
 24455:   //           127┃              ┃   127┃              ┃  │                    │
 24456:   //              ┗━━━━━━━┛      ┗━━━━━━━┛  │                    │
 24457:   //                                  ┌───────────┘      ┌──────┘
 24458:   //              ┏━━━━━━━━━↓━━━━━━━━━┯━━━━━↓━━━━━┓
 24459:   //        物理  ┃              物理ページ              │        ページ        ┃
 24460:   //      アドレス┃               アドレス               │      オフセット      ┃
 24461:   //              ┗━━━━━━━━━━━━━━━━━━━┷━━━━━━━━━━━┛
 24462:   //               31                                    1211                     0
 24463:   //              └─────────20─────────┴─────12─────┘
 24464:   //
 24465:   //  ページサイズが8KBの場合
 24466:   //              ┌──  7 ──┬──  7 ──┬─  5 ─┬───── 13 ─────┐
 24467:   //               31          2524          1817      1312                       0
 24468:   //              ┏━━━━━━┯━━━━━━┯━━━━┯━━━━━━━━━━━━┓
 24469:   //        論理  ┃   ルート   │  ポインタ  │ ページ │         ページ         ┃
 24470:   //      アドレス┃インデックス│インデックスインデックス       オフセット       ┃
 24471:   //              ┗━━↓━━━┷━━↓━━━┷━━↓━┷━━━━━━↓━━━━━┛
 24472:   //          ┌────┘            │            └────┐      └──────┐
 24473:   //          │    ルートテーブル    │   ポインタテーブル   │    ページテーブル  │
 24474:   //        ┌┼→┏━━━━━━━┓┌┼→┏━━━━━━━┓┌┼→┏━━━━━━━┓│
 24475:   //        ││ 0┃              ┃││ 0┃              ┃││ 0┃              ┃│
 24476:   //        ││  ┃              ┃││  ┃              ┃│└→┠───────┨│
 24477:   //        │└→┠───────┨││  ┃              ┃│    ┃    ページ    ┃│
 24478:   //      ルート  ┃    ルート    ┃│└→┠───────┨│┌─←ディスクリプタ┃│
 24479:   //     ポインタ ┃ディスクリプタ→┘    ┃   ポインタ   ┃││  ┠───────┨│
 24480:   //              ┠───────┨      ┃ディスクリプタ→┘│31┃              ┃│
 24481:   //              ┃              ┃      ┠───────┨  │  ┗━━━━━━━┛│
 24482:   //           127┃              ┃   127┃              ┃  │                    │
 24483:   //              ┗━━━━━━━┛      ┗━━━━━━━┛  │                    │
 24484:   //                                  ┌───────────┘      ┌──────┘
 24485:   //              ┏━━━━━━━━━↓━━━━━━━━┯━━━━━━↓━━━━━┓
 24486:   //        物理  ┃             物理ページ             │         ページ         ┃
 24487:   //      アドレス┃              アドレス              │       オフセット       ┃
 24488:   //              ┗━━━━━━━━━━━━━━━━━━┷━━━━━━━━━━━━┛
 24489:   //               31                                  1312                       0
 24490:   //              └──────── 19 ────────┴───── 13 ─────┘
 24491:   //
 24492:   public static final int MMU_ROOT_INDEX_BIT0       = 25;
 24493:   public static final int MMU_POINTER_INDEX_BIT0    = 18;
 24494:   public static final int MMU_PAGE_INDEX_BIT0_4KB   = 12;
 24495:   public static final int MMU_PAGE_INDEX_BIT0_8KB   = 13;
 24496:   public static final int MMU_PAGE_SIZE_4KB         = 1 << MMU_PAGE_INDEX_BIT0_4KB;
 24497:   public static final int MMU_PAGE_SIZE_8KB         = 1 << MMU_PAGE_INDEX_BIT0_8KB;
 24498:   //                                                    33222222_22221111_111111
 24499:   //                                                    10987654_32109876_54321098_76543210
 24500:   public static final int MMU_ROOT_INDEX_MASK       = 0b11111110_00000000_00000000_00000000;
 24501:   public static final int MMU_POINTER_INDEX_MASK    = 0b00000001_11111100_00000000_00000000;
 24502:   public static final int MMU_PAGE_INDEX_MASK_4KB   = 0b00000000_00000011_11110000_00000000;
 24503:   public static final int MMU_PAGE_INDEX_MASK_8KB   = 0b00000000_00000011_11100000_00000000;
 24504:   public static final int MMU_PAGE_OFFSET_MASK_4KB  = 0b00000000_00000000_00001111_11111111;
 24505:   public static final int MMU_PAGE_OFFSET_MASK_8KB  = 0b00000000_00000000_00011111_11111111;
 24506:   public static final int MMU_PAGE_ADDRESS_MASK_4KB = 0b11111111_11111111_11110000_00000000;
 24507:   public static final int MMU_PAGE_ADDRESS_MASK_8KB = 0b11111111_11111111_11100000_00000000;
 24508: 
 24509:   //--------------------------------------------------------------------------------
 24510:   //透過変換レジスタ
 24511:   //
 24512:   //  DTT0  データ透過変換レジスタ0
 24513:   //  DTT1  データ透過変換レジスタ1
 24514:   //  ITT0  命令透過変換レジスタ0
 24515:   //  ITT1  命令透過変換レジスタ1
 24516:   //      31  30  29  28  27  26  25  24  23  22  21  20  19  18  17  16  15  14  13  12  11  10   9   8   7   6   5   4   3   2   1   0
 24517:   //    ┏━━━━━━━━━━━━━━━┯━━━━━━━━━━━━━━━┯━┯━┯━┯━━━━━┯━┯━┯━┯━━━┯━━━┯━┯━━━┓
 24518:   //    ┃      論理アドレスベース      │      論理アドレスマスク      │ E│IS│US│     0    │U1│U0│ 0│  CM  │   0  │ W│   0  ┃
 24519:   //    ┗━━━━━━━━━━━━━━━┷━━━━━━━━━━━━━━━┷━┷━┷━┷━━━━━┷━┷━┷━┷━━━┷━━━┷━┷━━━┛
 24520:   public static final int MMU_TTR_BASE            = 255 << 24;  //x  Logical Address Base
 24521:   public static final int MMU_TTR_MASK            = 255 << 16;  //x  Logical Address Mask
 24522:   public static final int MMU_TTR_ENABLE          =   1 << 15;  //x  E   Enable
 24523:   public static final int MMU_TTR_IGNORE_FC2      =   1 << 14;  //x  IS  Ignore FC2 when matching
 24524:   public static final int MMU_TTR_USER_SUPERVISOR =   1 << 13;  //x  US  User or Supervisor when IS=0
 24525:   public static final int MMU_TTR_US_USER         =   0 << 13;  //         Match only if FC2=0 (user mode access)
 24526:   public static final int MMU_TTR_US_SUPERVISOR   =   1 << 13;  //         Match only if FC2=1 (supervisor mode access)
 24527:   public static final int MMU_TTR_WRITE_PROTECT   =   1 <<  2;  //x  W   Write Protect
 24528:   public static int mmuDTT0;  //DTT0
 24529:   public static int mmuDTT1;  //DTT1
 24530:   public static int mmuITT0;  //ITT0
 24531:   public static int mmuITT1;  //ITT1
 24532:   //  透過変換マップ
 24533:   //    インデックス
 24534:   //      a >>> 24
 24535:   //    値
 24536:   //      -1  透過変換あり,ライトプロテクトあり → リードのときアドレス変換なし、ライトのときアクセスフォルト
 24537:   //       0  透過変換なし                      → アドレス変換あり
 24538:   //       1  透過変換あり,ライトプロテクトなし → アドレス変換なし
 24539:   public static int[] mmuUserDataTransparent;  //ユーザデータ透過変換マップ
 24540:   public static int[] mmuUserCodeTransparent;  //ユーザ命令透過変換マップ
 24541:   public static int[] mmuSuperDataTransparent;  //スーパーバイザデータ透過変換マップ
 24542:   public static int[] mmuSuperCodeTransparent;  //スーパーバイザ命令透過変換マップ
 24543:   public static int[] mmuUserDataDifference;  //ユーザデータ透過変換差分マップ
 24544:   public static int[] mmuUserCodeDifference;  //ユーザ命令透過変換差分マップ
 24545:   public static int[] mmuSuperDataDifference;  //スーパーバイザデータ透過変換差分マップ
 24546:   public static int[] mmuSuperCodeDifference;  //スーパーバイザ命令透過変換差分マップ
 24547: 
 24548:   //d = mmuGetDTT0 ()
 24549:   //  DTT0を読む
 24550:   public static int mmuGetDTT0 () {
 24551:     return mmuDTT0;
 24552:   }  //mmuGetDTT0()
 24553: 
 24554:   //d = mmuGetDTT1 ()
 24555:   //  DTT1を読む
 24556:   public static int mmuGetDTT1 () {
 24557:     return mmuDTT1;
 24558:   }  //mmuGetDTT1()
 24559: 
 24560:   //d = mmuGetITT0 ()
 24561:   //  ITT0を読む
 24562:   public static int mmuGetITT0 () {
 24563:     return mmuITT0;
 24564:   }  //mmuGetITT0()
 24565: 
 24566:   //d = mmuGetITT1 ()
 24567:   //  ITT1を読む
 24568:   public static int mmuGetITT1 () {
 24569:     return mmuITT1;
 24570:   }  //mmuGetITT1()
 24571: 
 24572:   //mmuSetDTT0 (d)
 24573:   //  DTT0に書く
 24574:   public static void mmuSetDTT0 (int d) {
 24575:     mmuSetDataTransparent (d, mmuDTT1);
 24576:     if (MMU_DEBUG_COMMAND) {
 24577:       System.out.printf ("%08x mmuSetDTT0(0x%08x)\n", XEiJ.regPC0, mmuDTT0);
 24578:     }
 24579:   }  //mmuSetDTT0(int)
 24580: 
 24581:   //mmuSetDTT1 (d)
 24582:   //  DTT1に書く
 24583:   public static void mmuSetDTT1 (int d) {
 24584:     mmuSetDataTransparent (mmuDTT0, d);
 24585:     if (MMU_DEBUG_COMMAND) {
 24586:       System.out.printf ("%08x mmuSetDTT1(0x%08x)\n", XEiJ.regPC0, mmuDTT1);
 24587:     }
 24588:   }  //mmuSetDTT1(int)
 24589: 
 24590:   //mmuSetDataTransparent (d0, d1)
 24591:   //  DTT0,DTT1に書く
 24592:   //  データ透過変換マップを更新する
 24593:   //  DTT0とDTT1の両方がヒットするときDTT0を用いるため、DTT1の変換を展開してからDTT0の変換を上書きする
 24594:   //  DTT1でライトプロテクトされていてもDTT0でライトプロテクトされていなければ書き込める
 24595:   public static void mmuSetDataTransparent (int d0, int d1) {
 24596:     mmuDTT0 = d0 & 0xffffe364;
 24597:     mmuDTT1 = d1 & 0xffffe364;
 24598:     //透過変換マップと透過変換差分マップを入れ換える
 24599:     {
 24600:       int[] t = mmuUserDataDifference;
 24601:       mmuUserDataDifference = mmuUserDataTransparent;
 24602:       mmuUserDataTransparent = t;
 24603:       t = mmuSuperDataDifference;
 24604:       mmuSuperDataDifference = mmuSuperDataTransparent;
 24605:       mmuSuperDataTransparent = t;
 24606:     }
 24607:     //透過変換マップを構築する
 24608:     Arrays.fill (mmuUserDataTransparent, 0);  //透過変換なし
 24609:     Arrays.fill (mmuSuperDataTransparent, 0);  //透過変換なし
 24610:     if ((short) mmuDTT1 < 0) {  //(mmuDTT1 & MMU_TTR_ENABLE) != 0。有効
 24611:       int mask = ~mmuDTT1 >>> 16 & 255;
 24612:       int base = mmuDTT1 >>> 24 & mask;
 24613:       int writeProtect = (mmuDTT1 & MMU_TTR_WRITE_PROTECT) != 0 ? -1 : 1;  //-1=ライトプロテクトあり,1=ライトプロテクトなし
 24614:       if ((mmuDTT1 & MMU_TTR_IGNORE_FC2) != 0 ||
 24615:           (mmuDTT1 & MMU_TTR_USER_SUPERVISOR) == MMU_TTR_US_USER) {  //ユーザモードで有効
 24616:         for (int block = 0; block < 256; block++) {
 24617:           //if (((block << 24 ^ mmuDTT1) & ~mmuDTT1 << 8) >>> 24 == 0) {
 24618:           if ((block & mask) == base) {
 24619:             mmuUserDataTransparent[block] = writeProtect;
 24620:           }
 24621:         }
 24622:       }
 24623:       if ((mmuDTT1 & MMU_TTR_IGNORE_FC2) != 0 ||
 24624:           (mmuDTT1 & MMU_TTR_USER_SUPERVISOR) == MMU_TTR_US_SUPERVISOR) {  //スーパーバイザモードで有効
 24625:         for (int block = 0; block < 256; block++) {
 24626:           //if (((block << 24 ^ mmuDTT1) & ~mmuDTT1 << 8) >>> 24 == 0) {
 24627:           if ((block & mask) == base) {
 24628:             mmuSuperDataTransparent[block] = writeProtect;
 24629:           }
 24630:         }
 24631:       }
 24632:     }
 24633:     if ((short) mmuDTT0 < 0) {  //(mmuDTT0 & MMU_TTR_ENABLE) != 0。有効
 24634:       int mask = ~mmuDTT0 >>> 16 & 255;
 24635:       int base = mmuDTT0 >>> 24 & mask;
 24636:       int writeProtect = (mmuDTT0 & MMU_TTR_WRITE_PROTECT) != 0 ? -1 : 1;  //-1=ライトプロテクトあり,1=ライトプロテクトなし
 24637:       if ((mmuDTT0 & MMU_TTR_IGNORE_FC2) != 0 ||
 24638:           (mmuDTT0 & MMU_TTR_USER_SUPERVISOR) == MMU_TTR_US_USER) {  //ユーザモードで有効
 24639:         for (int block = 0; block < 256; block++) {
 24640:           //if (((block << 24 ^ mmuDTT0) & ~mmuDTT0 << 8) >>> 24 == 0) {
 24641:           if ((block & mask) == base) {
 24642:             mmuUserDataTransparent[block] = writeProtect;
 24643:           }
 24644:         }
 24645:       }
 24646:       if ((mmuDTT0 & MMU_TTR_IGNORE_FC2) != 0 ||
 24647:           (mmuDTT0 & MMU_TTR_USER_SUPERVISOR) == MMU_TTR_US_SUPERVISOR) {  //スーパーバイザモードで有効
 24648:         for (int block = 0; block < 256; block++) {
 24649:           //if (((block << 24 ^ mmuDTT0) & ~mmuDTT0 << 8) >>> 24 == 0) {
 24650:           if ((block & mask) == base) {
 24651:             mmuSuperDataTransparent[block] = writeProtect;
 24652:           }
 24653:         }
 24654:       }
 24655:     }
 24656:     //透過変換差分マップを作る
 24657:     int difference = 0;
 24658:     for (int block = 0; block < 256; block++) {
 24659:       difference |= mmuUserDataDifference[block] -= mmuUserDataTransparent[block];
 24660:       difference |= mmuSuperDataDifference[block] -= mmuSuperDataTransparent[block];
 24661:     }
 24662:     //透過変換の状態が変化したブロックのエントリを無効化する
 24663:     if (difference != 0) {
 24664:       for (int i = 0; i < 4 * MMU_CACHE_WAYS * MMU_HASH_SIZE; i += 4) {
 24665:         int logicalPage = mmuUserDataCache[i];
 24666:         if (logicalPage != 1 &&  //有効なエントリで
 24667:             mmuUserDataDifference[logicalPage >>> 24] != 0) {  //透過変換の状態が変化した
 24668:           mmuUserDataCache[i] = mmuUserDataCache[i + 1] = mmuUserDataCache[i + 2] = mmuUserDataCache[i + 3] = 1;  //無効化する
 24669:         }
 24670:         logicalPage = mmuSuperDataCache[i];
 24671:         if (logicalPage != 1 &&  //有効なエントリで
 24672:             mmuSuperDataDifference[logicalPage >>> 24] != 0) {  //透過変換の状態が変化した
 24673:           mmuSuperDataCache[i] = mmuSuperDataCache[i + 1] = mmuSuperDataCache[i + 2] = mmuSuperDataCache[i + 3] = 1;  //無効化する
 24674:         }
 24675:       }
 24676:     }
 24677:   }  //mmuSetDataTransparent(int,int)
 24678: 
 24679:   //mmuSetITT0 (d)
 24680:   //  ITT0に書く
 24681:   public static void mmuSetITT0 (int d) {
 24682:     mmuSetCodeTransparent (d, mmuITT1);
 24683:     if (MMU_DEBUG_COMMAND) {
 24684:       System.out.printf ("%08x mmuSetITT0(0x%08x)\n", XEiJ.regPC0, mmuITT0);
 24685:     }
 24686:   }  //mmuSetITT0(int)
 24687: 
 24688:   //mmuSetITT1 (d)
 24689:   //  ITT1に書く
 24690:   public static void mmuSetITT1 (int d) {
 24691:     mmuSetCodeTransparent (mmuITT0, d);
 24692:     if (MMU_DEBUG_COMMAND) {
 24693:       System.out.printf ("%08x mmuSetITT1(0x%08x)\n", XEiJ.regPC0, mmuITT1);
 24694:     }
 24695:   }  //mmuSetITT1(int)
 24696: 
 24697:   //mmuSetCodeTransparent (d0, d1)
 24698:   //  ITT0,ITT1に書く
 24699:   //  命令透過変換マップを更新する
 24700:   //  ITT0とITT1の両方がヒットするときITT0を用いるため、ITT1の変換を展開してからITT0の変換を上書きする
 24701:   public static void mmuSetCodeTransparent (int d0, int d1) {
 24702:     mmuITT0 = d0 & 0xffffe364;
 24703:     mmuITT1 = d1 & 0xffffe364;
 24704:     //透過変換マップと透過変換差分マップを入れ換える
 24705:     {
 24706:       int[] t = mmuUserCodeDifference;
 24707:       mmuUserCodeDifference = mmuUserCodeTransparent;
 24708:       mmuUserCodeTransparent = t;
 24709:       t = mmuSuperCodeDifference;
 24710:       mmuSuperCodeDifference = mmuSuperCodeTransparent;
 24711:       mmuSuperCodeTransparent = t;
 24712:     }
 24713:     //透過変換マップを構築する
 24714:     Arrays.fill (mmuUserCodeTransparent, 0);  //透過変換なし
 24715:     Arrays.fill (mmuSuperCodeTransparent, 0);  //透過変換なし
 24716:     if ((short) mmuITT1 < 0) {  //(mmuITT1 & MMU_TTR_ENABLE) != 0。有効
 24717:       int mask = ~mmuITT1 >>> 16 & 255;
 24718:       int base = mmuITT1 >>> 24 & mask;
 24719:       int writeProtect = (mmuITT1 & MMU_TTR_WRITE_PROTECT) != 0 ? -1 : 1;  //-1=ライトプロテクトあり,1=ライトプロテクトなし
 24720:       if ((mmuITT1 & MMU_TTR_IGNORE_FC2) != 0 ||
 24721:           (mmuITT1 & MMU_TTR_USER_SUPERVISOR) == MMU_TTR_US_USER) {  //ユーザモードで有効
 24722:         for (int block = 0; block < 256; block++) {
 24723:           //if (((block << 24 ^ mmuITT1) & ~mmuITT1 << 8) >>> 24 == 0) {
 24724:           if ((block & mask) == base) {
 24725:             mmuUserCodeTransparent[block] = writeProtect;
 24726:           }
 24727:         }
 24728:       }
 24729:       if ((mmuITT1 & MMU_TTR_IGNORE_FC2) != 0 ||
 24730:           (mmuITT1 & MMU_TTR_USER_SUPERVISOR) == MMU_TTR_US_SUPERVISOR) {  //スーパーバイザモードで有効
 24731:         for (int block = 0; block < 256; block++) {
 24732:           //if (((block << 24 ^ mmuITT1) & ~mmuITT1 << 8) >>> 24 == 0) {
 24733:           if ((block & mask) == base) {
 24734:             mmuSuperCodeTransparent[block] = writeProtect;
 24735:           }
 24736:         }
 24737:       }
 24738:     }
 24739:     if ((short) mmuITT0 < 0) {  //(mmuITT0 & MMU_TTR_ENABLE) != 0。有効
 24740:       int mask = ~mmuITT0 >>> 16 & 255;
 24741:       int base = mmuITT0 >>> 24 & mask;
 24742:       int writeProtect = (mmuITT0 & MMU_TTR_WRITE_PROTECT) != 0 ? -1 : 1;  //-1=ライトプロテクトあり,1=ライトプロテクトなし
 24743:       if ((mmuITT0 & MMU_TTR_IGNORE_FC2) != 0 ||
 24744:           (mmuITT0 & MMU_TTR_USER_SUPERVISOR) == MMU_TTR_US_USER) {  //ユーザモードで有効
 24745:         for (int block = 0; block < 256; block++) {
 24746:           //if (((block << 24 ^ mmuITT0) & ~mmuITT0 << 8) >>> 24 == 0) {
 24747:           if ((block & mask) == base) {
 24748:             mmuUserCodeTransparent[block] = writeProtect;
 24749:           }
 24750:         }
 24751:       }
 24752:       if ((mmuITT0 & MMU_TTR_IGNORE_FC2) != 0 ||
 24753:           (mmuITT0 & MMU_TTR_USER_SUPERVISOR) == MMU_TTR_US_SUPERVISOR) {  //スーパーバイザモードで有効
 24754:         for (int block = 0; block < 256; block++) {
 24755:           //if (((block << 24 ^ mmuITT0) & ~mmuITT0 << 8) >>> 24 == 0) {
 24756:           if ((block & mask) == base) {
 24757:             mmuSuperCodeTransparent[block] = writeProtect;
 24758:           }
 24759:         }
 24760:       }
 24761:     }
 24762:     //透過変換差分マップを作る
 24763:     int difference = 0;
 24764:     for (int block = 0; block < 256; block++) {
 24765:       difference |= mmuUserCodeDifference[block] -= mmuUserCodeTransparent[block];
 24766:       difference |= mmuSuperCodeDifference[block] -= mmuSuperCodeTransparent[block];
 24767:     }
 24768:     //透過変換の状態が変化したブロックのエントリを無効化する
 24769:     if (difference != 0) {
 24770:       for (int i = 0; i < 4 * MMU_CACHE_WAYS * MMU_HASH_SIZE; i += 4) {
 24771:         int logicalPage = mmuUserCodeCache[i];
 24772:         if (logicalPage != 1 &&  //有効なエントリで
 24773:             mmuUserCodeDifference[logicalPage >>> 24] != 0) {  //透過変換の状態が変化した
 24774:           mmuUserCodeCache[i] = mmuUserCodeCache[i + 1] = mmuUserCodeCache[i + 2] = mmuUserCodeCache[i + 3] = 1;  //無効化する
 24775:         }
 24776:         logicalPage = mmuSuperCodeCache[i];
 24777:         if (logicalPage != 1 &&  //有効なエントリで
 24778:             mmuSuperCodeDifference[logicalPage >>> 24] != 0) {  //透過変換の状態が変化した
 24779:           mmuSuperCodeCache[i] = mmuSuperCodeCache[i + 1] = mmuSuperCodeCache[i + 2] = mmuSuperCodeCache[i + 3] = 1;  //無効化する
 24780:         }
 24781:       }
 24782:     }
 24783:   }  //mmuSetCodeTransparent(int,int)
 24784: 
 24785:   //--------------------------------------------------------------------------------
 24786:   //変換制御レジスタ
 24787:   //
 24788:   //  TCR  変換制御レジスタ
 24789:   //      31  30  29  28  27  26  25  24  23  22  21  20  19  18  17  16  15  14  13  12  11  10   9   8   7   6   5   4   3   2   1   0
 24790:   //    ┏━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━┯━┯━┯━┯━┯━┯━┯━━━┯━━━┯━┯━━━┯━━━┯━┓
 24791:   //    ┃                               0                              │ E│ P NAD NAI FOTC FITC  DCO │  DUO │DWO   DCI │  DUI │ 0┃
 24792:   //    ┗━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━┷━┷━┷━┷━┷━┷━┷━━━┷━━━┷━┷━━━┷━━━┷━┛
 24793:   public static final int MMU_TCR_ENABLE    = 1 << 15;  //x  E     Enable
 24794:   public static final int MMU_TCR_PAGE_SIZE = 1 << 14;  //x  P     Page Size
 24795:   public static final int MMU_TCR_P_4KB     = 0 << 14;  //           4KB
 24796:   public static final int MMU_TCR_P_8KB     = 1 << 14;  //           8KB
 24797:   public static final int MMU_TCR_NAD       = 1 << 13;  //x  NAD   No Allocate Mode (Data ATC)。データATCはヒットするが更新されない
 24798:   public static final int MMU_TCR_NAI       = 1 << 12;  //x  NAI   No Allocate Mode (Instruction ATC)。命令ATCはヒットするが更新されない
 24799:   public static final int MMU_TCR_FOTC      = 1 << 11;  //   FOTC  1/2-Cache Mode (Data ATC)。データATCは0=64エントリ,1=32エントリ
 24800:   public static final int MMU_TCR_FITC      = 1 << 10;  //   FITC  1/2-Cache Mode (Instruction ATC)。命令ATCは0=64エントリ,1=32エントリ
 24801:   public static final int MMU_TCR_DCO       = 3 <<  8;  //   DCO   Default Cache Mode (Data Cache)。デフォルトデータキャッシュモード
 24802:   public static final int MMU_TCR_DUO       = 3 <<  6;  //   DUO   Default UPA bits (Data Cache)。デフォルトデータUPA
 24803:   public static final int MMU_TCR_DWO       = 1 <<  5;  //   DWO   Default Write Protect (Data Cache)。デフォルトライトプロテクト
 24804:   public static final int MMU_TCR_DCI       = 3 <<  3;  //   DCI   Default Cache Mode (Instruction Cache)。デフォルト命令キャッシュモード
 24805:   public static final int MMU_TCR_DUI       = 3 <<  1;  //   DUI   Default UPA bits (Instruction Cache)。デフォルト命令UPA
 24806:   public static int mmuTCR;  //TCR
 24807:   public static boolean mmuEnabled;  //true=アドレス変換有効
 24808:   public static boolean mmu4KB;  //false=8KB,true=4KB
 24809:   public static boolean mmuNotAllocateData;  //true=データアドレス変換キャッシュをアロケートしない
 24810:   public static boolean mmuNotAllocateCode;  //true=命令アドレス変換キャッシュをアロケートしない
 24811:   public static int mmuPageSize;  //ページサイズ
 24812:   public static int mmuPageAddressMask;  //ページアドレスのマスク
 24813:   public static int mmuPageOffsetMask;  //ページオフセットのマスク
 24814:   public static int mmuPageIndexMask;  //ページインデックスのマスク
 24815:   public static int mmuPageIndexBit2;  //ページインデックスのbit番号-2
 24816:   public static int mmuPageTableMask;  //ページテーブルの先頭アドレスのマスク
 24817: 
 24818:   //d = mmuGetTCR ()
 24819:   //  TCRを読む
 24820:   public static int mmuGetTCR () {
 24821:     return mmuTCR;
 24822:   }  //mmuGetTCR()
 24823: 
 24824:   //mmuSetTCR (d)
 24825:   //  TCRに書く
 24826:   public static void mmuSetTCR (int d) {
 24827:     mmuInvalidateAllCache ();  //高速化のためアドレス変換していないときもキャッシュに乗せているので、アドレス変換を有効にしたときキャッシュを初期化する必要がある
 24828:     mmuTCR = d & 0x0000fffe;
 24829:     mmuEnabled = (short) d < 0;  //(d & MMU_TCR_ENABLE) != 0
 24830:     mmu4KB = (d & MMU_TCR_PAGE_SIZE) == MMU_TCR_P_4KB;
 24831:     mmuNotAllocateData = (d & MMU_TCR_NAD) != 0;
 24832:     mmuNotAllocateCode = (d & MMU_TCR_NAI) != 0;
 24833:     if (mmu4KB) {  //4KB
 24834:       mmuPageSize = MMU_PAGE_SIZE_4KB;
 24835:       mmuPageAddressMask = MMU_PAGE_ADDRESS_MASK_4KB;
 24836:       mmuPageOffsetMask = MMU_PAGE_OFFSET_MASK_4KB;
 24837:       mmuPageIndexMask = MMU_PAGE_INDEX_MASK_4KB;
 24838:       mmuPageIndexBit2 = MMU_PAGE_INDEX_BIT0_4KB - 2;
 24839:       mmuPageTableMask = MMU_DESCRIPTOR_PAGE_TABLE_ADDRESS_4KB;
 24840:     } else {  //8KB
 24841:       mmuPageSize = MMU_PAGE_SIZE_8KB;
 24842:       mmuPageAddressMask = MMU_PAGE_ADDRESS_MASK_8KB;
 24843:       mmuPageOffsetMask = MMU_PAGE_OFFSET_MASK_8KB;
 24844:       mmuPageIndexMask = MMU_PAGE_INDEX_MASK_8KB;
 24845:       mmuPageIndexBit2 = MMU_PAGE_INDEX_BIT0_8KB - 2;
 24846:       mmuPageTableMask = MMU_DESCRIPTOR_PAGE_TABLE_ADDRESS_8KB;
 24847:     }
 24848:     if (MMU_DEBUG_COMMAND) {
 24849:       System.out.printf ("%08x mmuSetTCR(0x%08x)\n", XEiJ.regPC0, mmuTCR);
 24850:       System.out.printf ("  mmuEnabled=%b\n", mmuEnabled);
 24851:       System.out.printf ("  mmu4KB=%b\n", mmu4KB);
 24852:       System.out.printf ("  mmuPageSize=0x%08x\n", mmuPageSize);
 24853:       System.out.printf ("  mmuPageAddressMask=0x%08x\n", mmuPageAddressMask);
 24854:       System.out.printf ("  mmuPageOffsetMask=0x%08x\n", mmuPageOffsetMask);
 24855:       System.out.printf ("  mmuPageIndexMask=0x%08x\n", mmuPageIndexMask);
 24856:       System.out.printf ("  mmuPageIndexBit2=%d\n", mmuPageIndexBit2);
 24857:       System.out.printf ("  mmuPageTableMask=%d\n", mmuPageTableMask);
 24858:     }
 24859:   }  //mmuSetTCR(int)
 24860: 
 24861:   //--------------------------------------------------------------------------------
 24862:   //アドレス変換テーブル
 24863: 
 24864:   //  URP  ユーザルートポインタ
 24865:   //  SRP  スーパーバイザルートポインタ
 24866:   //      31  30  29  28  27  26  25  24  23  22  21  20  19  18  17  16  15  14  13  12  11  10   9   8   7   6   5   4   3   2   1   0
 24867:   //    ┏━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━┯━━━━━━━━━━━━━━━━━┓
 24868:   //    ┃                                  ルートテーブルアドレス                                  │                 0                ┃
 24869:   //    ┗━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━┷━━━━━━━━━━━━━━━━━┛
 24870:   public static int mmuURP;  //URP
 24871:   public static int mmuSRP;  //SRP
 24872: 
 24873:   //d = mmuGetURP ()
 24874:   //  URPを読む
 24875:   public static int mmuGetURP () {
 24876:     return mmuURP;
 24877:   }  //mmuGetURP()
 24878: 
 24879:   //d = mmuGetSRP ()
 24880:   //  SRPを読む
 24881:   public static int mmuGetSRP () {
 24882:     return mmuSRP;
 24883:   }  //mmuGetSRP()
 24884: 
 24885:   //mmuSetURP (d)
 24886:   //  URPに書く
 24887:   public static void mmuSetURP (int d) throws M68kException {
 24888:     mmuURP = d &= 0xfffffe00;
 24889:     Arrays.fill (mmuUserDataCache, 1);
 24890:     Arrays.fill (mmuUserCodeCache, 1);
 24891:     if (MMU_DEBUG_COMMAND) {
 24892:       System.out.printf ("%08x mmuSetURP(0x%08x)\n", XEiJ.regPC0, mmuURP);
 24893:     }
 24894:     if (RootPointerList.RTL_ON) {
 24895:       RootPointerList.rtlSetRootPointer (d, false);
 24896:     }
 24897:   }  //mmuSetURP(int)
 24898: 
 24899:   //mmuSetSRP (d)
 24900:   //  SRPに書く
 24901:   public static void mmuSetSRP (int d) {
 24902:     mmuSRP = d &= 0xfffffe00;
 24903:     Arrays.fill (mmuSuperDataCache, 1);
 24904:     Arrays.fill (mmuSuperCodeCache, 1);
 24905:     if (MMU_DEBUG_COMMAND) {
 24906:       System.out.printf ("%08x mmuSetSRP(0x%08x)\n", XEiJ.regPC0, mmuSRP);
 24907:     }
 24908:     if (RootPointerList.RTL_ON) {
 24909:       RootPointerList.rtlSetRootPointer (d, true);
 24910:     }
 24911:   }  //mmuSetSRP(int)
 24912: 
 24913:   //  ディスクリプタ
 24914:   //
 24915:   //    ルートテーブルディスクリプタ
 24916:   //      31  30  29  28  27  26  25  24  23  22  21  20  19  18  17  16  15  14  13  12  11  10   9   8   7   6   5   4   3   2   1   0
 24917:   //    ┏━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━┯━━━━━━━━━┯━┯━┯━━━┓
 24918:   //    ┃                                 ポインタテーブルアドレス                                 │         X        │ U│ W│  UDT ┃
 24919:   //    ┗━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━┷━━━━━━━━━┷━┷━┷━━━┛
 24920:   //
 24921:   //    4KBポインタテーブルディスクリプタ
 24922:   //      31  30  29  28  27  26  25  24  23  22  21  20  19  18  17  16  15  14  13  12  11  10   9   8   7   6   5   4   3   2   1   0
 24923:   //    ┏━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━┯━━━┯━┯━┯━━━┓
 24924:   //    ┃                                        ページテーブルアドレス                                        │   X  │ U│ W│  UDT ┃
 24925:   //    ┗━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━┷━━━┷━┷━┷━━━┛
 24926:   //
 24927:   //    8KBポインタテーブルディスクリプタ
 24928:   //      31  30  29  28  27  26  25  24  23  22  21  20  19  18  17  16  15  14  13  12  11  10   9   8   7   6   5   4   3   2   1   0
 24929:   //    ┏━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━┯━┯━┯━┯━━━┓
 24930:   //    ┃                                          ページテーブルアドレス                                          │ X│ U│ W│  UDT ┃
 24931:   //    ┗━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━┷━┷━┷━┷━━━┛
 24932:   //
 24933:   //    4KBページテーブルディスクリプタ
 24934:   //      31  30  29  28  27  26  25  24  23  22  21  20  19  18  17  16  15  14  13  12  11  10   9   8   7   6   5   4   3   2   1   0
 24935:   //    ┏━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━┯━┯━┯━┯━┯━┯━━━┯━┯━┯━┯━━━┓
 24936:   //    ┃                              物理ページアドレス                              │UR│ G│U1│U0│ S│  CM  │ M│ U│ W│  PDT ┃
 24937:   //    ┗━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━┷━┷━┷━┷━┷━┷━━━┷━┷━┷━┷━━━┛
 24938:   //
 24939:   //    8KBページテーブルディスクリプタ
 24940:   //      31  30  29  28  27  26  25  24  23  22  21  20  19  18  17  16  15  14  13  12  11  10   9   8   7   6   5   4   3   2   1   0
 24941:   //    ┏━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━┯━┯━┯━┯━┯━┯━┯━━━┯━┯━┯━┯━━━┓
 24942:   //    ┃                            物理ページアドレス                            │UR│UR│ G│U1│U0│ S│  CM  │ M│ U│ W│  PDT ┃
 24943:   //    ┗━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━┷━┷━┷━┷━┷━┷━┷━━━┷━┷━┷━┷━━━┛
 24944:   //
 24945:   //    間接ページテーブルディスクリプタ
 24946:   //      31  30  29  28  27  26  25  24  23  22  21  20  19  18  17  16  15  14  13  12  11  10   9   8   7   6   5   4   3   2   1   0
 24947:   //    ┏━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━┯━━━┓
 24948:   //    ┃                                             ページディスクリプタアドレス                                             │  PDT ┃
 24949:   //    ┗━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━┷━━━┛
 24950:   public static final int MMU_DESCRIPTOR_POINTER_TABLE_ADDRESS  = -1 <<  9;  //x  Pointer Table Address
 24951:   public static final int MMU_DESCRIPTOR_PAGE_TABLE_ADDRESS_4KB = -1 <<  6;  //x  Page Table Address (4KB)
 24952:   public static final int MMU_DESCRIPTOR_PAGE_TABLE_ADDRESS_8KB = -1 <<  5;  //x  Page Table Address (8KB)
 24953:   public static final int MMU_DESCRIPTOR_GLOBAL                 =  1 << 10;  //x  G    Global
 24954:   public static final int MMU_DESCRIPTOR_SUPERVISOR_PROTECTED   =  1 <<  7;  //x  S    Supervisor Protected
 24955:   public static final int MMU_DESCRIPTOR_MODIFIED               =  1 <<  4;  //x  M    Modified
 24956:   public static final int MMU_DESCRIPTOR_USED                   =  1 <<  3;  //x  U    Used
 24957:   public static final int MMU_DESCRIPTOR_WRITE_PROTECTED        =  1 <<  2;  //x  W    Write Protected
 24958:   public static final int MMU_DESCRIPTOR_UDT                    =  2 <<  0;  //x  UDT  Upper Level Descriptor Type
 24959:   public static final int MMU_DESCRIPTOR_PDT                    =  3 <<  0;  //x  PDT  Page Descriptor Type
 24960:   public static final int MMU_DESCRIPTOR_TYPE_INVALID           =  0 <<  0;  //          Invalid
 24961:   public static final int MMU_DESCRIPTOR_TYPE_INDIRECT          =  2 <<  0;  //          Indirect
 24962:   public static final int MMU_DESCRIPTOR_INDIRECT_ADDRESS       = -1 <<  2;  //x  Descriptor Address
 24963: 
 24964:   //--------------------------------------------------------------------------------
 24965:   //アドレス変換キャッシュ
 24966:   //
 24967:   //  構造
 24968:   //    ユーザモード
 24969:   //      ライン0
 24970:   //        エントリ0
 24971:   //          [0]  論理ページアドレス。リード用。1=無効
 24972:   //          [1]  論理ページアドレス。ライト用。修正済みかつライトプロテクトされていないときだけ有効。1=無効
 24973:   //          [2]  物理ページアドレス。1=無効
 24974:   //          [3]  グローバルフラグ。-1=Global,0=NonGlobal,1=無効
 24975:   //        エントリ1
 24976:   //        エントリ2
 24977:   //        エントリ3
 24978:   //      ライン1
 24979:   //          :
 24980:   //      ライン63
 24981:   //    スーパーバイザモード
 24982:   //      ライン0
 24983:   //        エントリ0
 24984:   //          [0]  論理ページアドレス。リード用。1=無効
 24985:   //          [1]  論理ページアドレス。ライト用。修正済みかつライトプロテクトされていないときだけ有効。1=無効
 24986:   //          [2]  物理ページアドレス。1=無効
 24987:   //          [3]  グローバルフラグ。-1=Global,0=NonGlobal,1=無効
 24988:   //        エントリ1
 24989:   //        エントリ2
 24990:   //        エントリ3
 24991:   //      ライン1
 24992:   //          :
 24993:   //      ライン63
 24994:   //
 24995:   //  ハッシュ関数
 24996:   //    次の関数で32bitの論理ページアドレスを6bitのライン番号に変換する
 24997:   //      a * 0x5efc103f >>> 26
 24998:   //    32bitの中に幅6bit以内で6bitまでセットする組み合わせは1+1+2+4+8+16+32*27=896通りあるが、
 24999:   //    それらをa*x>>>26で0~63になるべく均一に分散させる係数を2^32通りの中から探して以下の24個を得た
 25000:   //      0x5efbf041  0x5efc0fc1  0x5efc103f  0x5f03efc1  0x5f03f03f  0x5f040fbf
 25001:   //      0x60fbf041  0x60fc0fc1  0x60fc103f  0x6103efc1  0x6103f03f  0x61040fbf
 25002:   //      0x9efbf041  0x9efc0fc1  0x9efc103f  0x9f03efc1  0x9f03f03f  0x9f040fbf
 25003:   //      0xa0fbf041  0xa0fc0fc1  0xa0fc103f  0xa103efc1  0xa103f03f  0xa1040fbf
 25004:   //    この中で(0..63)<<12と(0..63)<<13がそれぞれすべて分離するのは
 25005:   //      0x5efc103f
 25006:   //      0x60fc103f
 25007:   //      0x9efc103f
 25008:   //      0xa0fc103f
 25009:   //    この4個はほぼ同じパターンなので0x5efc103fを係数として用いることにする
 25010:   //      perl -e "for$x(0x5efc103f){printf'  //        0x%x%c',$x,10;for$b(7..15){@c=(0)x64;for$n(0..63){$a=$n<<$b;$c[$a*$x>>26&63]++;}printf'  //        %2d %s%c',$b,join('',@c),10;}}"
 25011:   //      0x5efc103f
 25012:   //       7 2111111111111111111111111111111101111111111111111111111111111111
 25013:   //       8 1111111111111111111111111111111111111111111111111111111111111111
 25014:   //       9 1111111111111111111111111111111111111111111111111111111111111111
 25015:   //      10 1111111111111111111111111111111111111111111111111111111111111111
 25016:   //      11 1111111111111111111111111111111111111111111111111111111111111111
 25017:   //      12 1111111111111111111111111111111111111111111111111111111111111111
 25018:   //      13 1111111111111111111111111111111111111111111111111111111111111111
 25019:   //      14 1111111111111111111111111111111111111111111111111111111111111111
 25020:   //      15 2011111111111111111111111111111111111111111111111111111111111111
 25021:   //    ページサイズが2^8=256バイトから2^14=16384バイトまで、それぞれ先頭の64ページがすべて異なるハッシュ値を持つことがわかる
 25022:   //
 25023:   //  1wayセットアソシアティブ
 25024:   //    ハッシュ値が衝突したときの速度低下を抑えるため4waysにしてみたが効果がなさそうなので1wayに戻してある
 25025:   //    ハッシュ関数を工夫してあるので4waysにしてもほとんどの場合は1番目でヒットするか4番目まですべてミスするかのどちらかになる
 25026:   //    1wayを4waysにするとミスしたときの条件分岐が1回から4回に増えてテーブルサーチの開始が遅れる
 25027:   //    2ways以上では参照するときに1番目に比較するエントリとアロケートするときに押し出すエントリを適切に選択するための仕組みが必要
 25028:   //
 25029:   //  LRU(least recently used)方式(2ways以上の場合)
 25030:   //    アロケートはラインの中で最も古いエントリを切り捨てて最も新しいエントリを追加する方法で行う
 25031:   //    アドレス変換キャッシュは最も新しいエントリが繰り返しアクセスされる場合が多く、ハッシュ関数で十分に分散させられているので、
 25032:   //    ここではエントリを常に新しい順にソートしておく方法を用いる
 25033:   //    2番目以降のエントリがヒットしたときエントリを並べ替えなければならないので遅くなるが、1番目のヒット率が十分に高ければ問題ない
 25034:   //
 25035:   //  グローバルフラグ
 25036:   //    関連する命令
 25037:   //      PFLUSHA       アドレス変換キャッシュのすべてのエントリを無効化する
 25038:   //      PFLUSHAN      アドレス変換キャッシュのNonGlobalなエントリを無効化する
 25039:   //      PFLUSH (An)   アドレス変換キャッシュの、DFC=1またはDFC=2ならばユーザモード、DFC=5またはDFC=6ならばスーパーバイザモードの、
 25040:   //                    論理ページアドレスがAnのエントリを無効化する
 25041:   //      PFLUSHN (An)  アドレス変換キャッシュの、DFC=1またはDFC=2ならばユーザモード、DFC=5またはDFC=6ならばスーパーバイザモードの、
 25042:   //                    論理ページアドレスがAnかつNonGlobalのエントリを無効化する
 25043:   //    グローバルフラグはこれらの命令の動作を変更する以外の機能を持たない
 25044:   //
 25045:   public static final int MMU_HASH_BITS = 6;
 25046:   public static final int MMU_HASH_SIZE = 1 << MMU_HASH_BITS;
 25047:   public static final int MMU_HASH_COEFF = 0x5efc103f;  //ハッシュ関数の係数
 25048:   public static final int MMU_CACHE_WAYS = 1;  //1=1way,4=4waysセットアソシアティブ
 25049:   public static final int[] mmuUserDataCache = new int[4 * MMU_CACHE_WAYS * MMU_HASH_SIZE];
 25050:   public static final int[] mmuUserCodeCache = new int[4 * MMU_CACHE_WAYS * MMU_HASH_SIZE];
 25051:   public static final int[] mmuSuperDataCache = new int[4 * MMU_CACHE_WAYS * MMU_HASH_SIZE];
 25052:   public static final int[] mmuSuperCodeCache = new int[4 * MMU_CACHE_WAYS * MMU_HASH_SIZE];
 25053: 
 25054:   //mmuInvalidateAllCache ()
 25055:   //  PFLUSHA
 25056:   //  アドレス変換キャッシュのすべてのエントリを無効化する
 25057:   public static void mmuInvalidateAllCache () {
 25058:     Arrays.fill (mmuUserDataCache, 1);
 25059:     Arrays.fill (mmuUserCodeCache, 1);
 25060:     Arrays.fill (mmuSuperDataCache, 1);
 25061:     Arrays.fill (mmuSuperCodeCache, 1);
 25062:   }  //mmuInvalidateAllCache()
 25063: 
 25064:   //mmuInvalidateAllNonGlobalCache ()
 25065:   //  PFLUSHAN
 25066:   //  アドレス変換キャッシュのNonGlobalなエントリを無効化する
 25067:   public static void mmuInvalidateAllNonGlobalCache () {
 25068:     for (int i = 0; i < 4 * MMU_CACHE_WAYS * MMU_HASH_SIZE; i += 4) {
 25069:       if (mmuUserDataCache[i + 3] == 0) {  //エントリが有効かつNonGlobal
 25070:         mmuUserDataCache[i] = mmuUserDataCache[i + 1] = mmuUserDataCache[i + 2] = mmuUserDataCache[i + 3] = 1;
 25071:       }
 25072:       if (mmuUserCodeCache[i + 3] == 0) {  //エントリが有効かつNonGlobal
 25073:         mmuUserCodeCache[i] = mmuUserCodeCache[i + 1] = mmuUserCodeCache[i + 2] = mmuUserCodeCache[i + 3] = 1;
 25074:       }
 25075:       if (mmuSuperDataCache[i + 3] == 0) {  //エントリが有効かつNonGlobal
 25076:         mmuSuperDataCache[i] = mmuSuperDataCache[i + 1] = mmuSuperDataCache[i + 2] = mmuSuperDataCache[i + 3] = 1;
 25077:       }
 25078:       if (mmuSuperCodeCache[i + 3] == 0) {  //エントリが有効かつNonGlobal
 25079:         mmuSuperCodeCache[i] = mmuSuperCodeCache[i + 1] = mmuSuperCodeCache[i + 2] = mmuSuperCodeCache[i + 3] = 1;
 25080:       }
 25081:     }
 25082:   }  //mmuInvalidateAllNonGlobalCache()
 25083: 
 25084:   //mmuInvalidateCache (a)
 25085:   //  PFLUSH (An)
 25086:   //  アドレス変換キャッシュの、DFC=1またはDFC=2ならばユーザモード、DFC=5またはDFC=6ならばスーパーバイザモードの、
 25087:   //  論理ページアドレスがAnのエントリを無効化する
 25088:   public static void mmuInvalidateCache (int a) {
 25089:     int logicalPage = a & mmuPageAddressMask;
 25090:     boolean supervisor = (0b10011111 << 24 << XEiJ.mpuDFC) < 0;
 25091:     boolean instruction = (0b00101010 << 24 << XEiJ.mpuDFC) < 0;
 25092:     int[] cache = (supervisor ?
 25093:                    instruction ? mmuSuperCodeCache : mmuSuperDataCache :
 25094:                    instruction ? mmuUserCodeCache : mmuUserDataCache);
 25095:     int head = (logicalPage * MMU_HASH_COEFF >>> -MMU_HASH_BITS) * (4 * MMU_CACHE_WAYS);  //先頭のエントリ
 25096:     if (MMU_CACHE_WAYS == 1) {  //1way
 25097:       if (cache[head] == logicalPage) {  //エントリが有効かつ論理ページアドレスがAn
 25098:         cache[head] = cache[head + 1] = cache[head + 2] = cache[head + 3] = 1;  //末尾を空ける
 25099:         return;
 25100:       }
 25101:     } else {  //2ways以上
 25102:       int tail = head + (4 * MMU_CACHE_WAYS - 4);  //末尾のエントリ
 25103:       for (int i = head; i <= tail; i += 4) {
 25104:         if (cache[i] == logicalPage) {  //エントリが有効かつ論理ページアドレスがAn
 25105:           for (int j = i; j < tail; j += 4) {  //後ろを詰める
 25106:             cache[j    ] = cache[j + 4];
 25107:             cache[j + 1] = cache[j + 5];
 25108:             cache[j + 2] = cache[j + 6];
 25109:             cache[j + 3] = cache[j + 7];
 25110:           }
 25111:           cache[tail] = cache[tail + 1] = cache[tail + 2] = cache[tail + 3] = 1;  //末尾を空ける
 25112:           return;
 25113:         }
 25114:       }
 25115:     }
 25116:   }  //mmuInvalidateCache(int)
 25117: 
 25118:   //mmuInvalidateNonGlobalCache (a)
 25119:   //  PFLUSHN (An)
 25120:   //  アドレス変換キャッシュの、DFC=1またはDFC=2ならばユーザモード、DFC=5またはDFC=6ならばスーパーバイザモードの、
 25121:   //  論理ページアドレスがAnかつNonGlobalのエントリを無効化する
 25122:   public static void mmuInvalidateNonGlobalCache (int a) {
 25123:     int logicalPage = a & mmuPageAddressMask;
 25124:     boolean supervisor = (0b10011111 << 24 << XEiJ.mpuDFC) < 0;
 25125:     boolean instruction = (0b00101010 << 24 << XEiJ.mpuDFC) < 0;
 25126:     int[] cache = (supervisor ?
 25127:                    instruction ? mmuSuperCodeCache : mmuSuperDataCache :
 25128:                    instruction ? mmuUserCodeCache : mmuUserDataCache);
 25129:     int head = (logicalPage * MMU_HASH_COEFF >>> -MMU_HASH_BITS) * (4 * MMU_CACHE_WAYS);  //先頭のエントリ
 25130:     if (MMU_CACHE_WAYS == 1) {  //1way
 25131:       if (cache[head] == logicalPage) {  //エントリが有効かつ論理ページアドレスがAn
 25132:         if (cache[head + 3] == 0) {  //エントリが有効かつNonGlobal
 25133:           cache[head] = cache[head + 1] = cache[head + 2] = cache[head + 3] = 1;  //末尾を空ける
 25134:         }
 25135:         return;  //論理ページアドレスがAnのエントリは1つだけなのでそれがNonGlobalでなければ何もしないで終了する
 25136:       }
 25137:     } else {  //2ways以上
 25138:       int tail = head + (4 * MMU_CACHE_WAYS - 4);  //末尾のエントリ
 25139:       for (int i = head; i <= tail; i += 4) {
 25140:         if (cache[i] == logicalPage) {  //エントリが有効かつ論理ページアドレスがAn
 25141:           if (cache[i + 3] == 0) {  //エントリが有効かつNonGlobal
 25142:             for (int j = i; j < tail; j += 4) {  //後ろを詰める
 25143:               cache[j    ] = cache[j + 4];
 25144:               cache[j + 1] = cache[j + 5];
 25145:               cache[j + 2] = cache[j + 6];
 25146:               cache[j + 3] = cache[j + 7];
 25147:             }
 25148:             cache[tail] = cache[tail + 1] = cache[tail + 2] = cache[tail + 3] = 1;  //末尾を空ける
 25149:           }
 25150:           return;  //論理ページアドレスがAnのエントリは1つだけなのでそれがNonGlobalでなければ何もしないで終了する
 25151:         }
 25152:       }
 25153:     }
 25154:   }  //mmuInvalidateNonGlobalCache(int)
 25155: 
 25156:   //--------------------------------------------------------------------------------
 25157:   //初期化
 25158: 
 25159:   //mmuInit ()
 25160:   //  初期化
 25161:   public static void mmuInit () {
 25162:     mmuUserDataTransparent = new int[256];
 25163:     mmuUserCodeTransparent = new int[256];
 25164:     mmuSuperDataTransparent = new int[256];
 25165:     mmuSuperCodeTransparent = new int[256];
 25166:     mmuUserDataDifference = new int[256];
 25167:     mmuUserCodeDifference = new int[256];
 25168:     mmuSuperDataDifference = new int[256];
 25169:     mmuSuperCodeDifference = new int[256];
 25170:     mmuReset ();
 25171:   }  //mmuInit()
 25172: 
 25173:   //mmuReset ()
 25174:   //  リセット
 25175:   public static void mmuReset () {
 25176:     mmuSetDataTransparent (0, 0);
 25177:     mmuSetCodeTransparent (0, 0);
 25178:     mmuSetTCR (0);
 25179:   }  //mmuReset()
 25180: 
 25181:   //--------------------------------------------------------------------------------
 25182:   //バスアクセス
 25183:   //
 25184:   //    ByteSign  byte  バイト符号拡張
 25185:   //    ByteZero  int   バイトゼロ拡張
 25186:   //    WordSign  int   ワード符号拡張
 25187:   //    WordZero  int   ワードゼロ拡張
 25188:   //    Long      int   ロング
 25189:   //    Quad      long  クワッド
 25190:   //
 25191:   //    Data    データ  1  先頭
 25192:   //    Second  データ  1  2番目
 25193:   //    Even    データ  2  先頭
 25194:   //    Four    データ  4  先頭
 25195:   //    Code    コード  2  先頭
 25196:   //    Opword  コード  2  先頭(命令ワード)
 25197:   //    Exword  コード  2  2番目(拡張ワード)
 25198:   //
 25199:   //  バイト
 25200:   //       0   1   2   3   4   5   6   7   8   9  10  11  12  13  14  15
 25201:   //    ┳━┯━┯━┯━┳━┯━┯━┯━┳━┯━┯━┯━┳━┯━┯━┯━┳
 25202:   //    ┃  │  │  │  ┃  │  │  │  ┃  │  │  │  ┃  │  │  │  ┃
 25203:   //    ┻━┷━┷━┷━┻━┷━┷━┷━┻━┷━┷━┷━┻━┷━┷━┷━┻
 25204:   //    ┏━┓
 25205:   //    ┃ B┃
 25206:   //    ┗━┛
 25207:   //        0
 25208:   //
 25209:   //  ワード
 25210:   //    偶数
 25211:   //       0   1   2   3   4   5   6   7   8   9  10  11  12  13  14  15
 25212:   //    ┳━┯━┯━┯━┳━┯━┯━┯━┳━┯━┯━┯━┳━┯━┯━┯━┳
 25213:   //    ┃  │  │  │  ┃  │  │  │  ┃  │  │  │  ┃  │  │  │  ┃
 25214:   //    ┻━┷━┷━┷━┻━┷━┷━┷━┻━┷━┷━┷━┻━┷━┷━┷━┻
 25215:   //    ┏━━━┓
 25216:   //    ┃   W  ┃
 25217:   //    ┗━━━┛
 25218:   //            0
 25219:   //    奇数
 25220:   //      -1   0   1   2   3   4   5   6   7   8   9  10  11  12  13  14
 25221:   //    ┳━┯━┯━┯━┳━┯━┯━┯━┳━┯━┯━┯━┳━┯━┯━┯━┳
 25222:   //    ┃  │  │  │  ┃  │  │  │  ┃  │  │  │  ┃  │  │  │  ┃
 25223:   //    ┻━┷━┷━┷━┻━┷━┷━┷━┻━┷━┷━┷━┻━┷━┷━┷━┻
 25224:   //        ┏━┳━┓
 25225:   //        ┃ B┃ B┃
 25226:   //        ┗━┻━┛
 25227:   //            8   0
 25228:   //
 25229:   //  ロング
 25230:   //    4の倍数
 25231:   //       0   1   2   3   4   5   6   7   8   9  10  11  12  13  14  15
 25232:   //    ┳━┯━┯━┯━┳━┯━┯━┯━┳━┯━┯━┯━┳━┯━┯━┯━┳
 25233:   //    ┃  │  │  │  ┃  │  │  │  ┃  │  │  │  ┃  │  │  │  ┃
 25234:   //    ┻━┷━┷━┷━┻━┷━┷━┷━┻━┷━┷━┷━┻━┷━┷━┷━┻
 25235:   //    ┏━━━━━━━┓
 25236:   //    ┃       L      ┃
 25237:   //    ┗━━━━━━━┛
 25238:   //                    0
 25239:   //    4の倍数+1
 25240:   //      -1   0   1   2   3   4   5   6   7   8   9  10  11  12  13  14
 25241:   //    ┳━┯━┯━┯━┳━┯━┯━┯━┳━┯━┯━┯━┳━┯━┯━┯━┳
 25242:   //    ┃  │  │  │  ┃  │  │  │  ┃  │  │  │  ┃  │  │  │  ┃
 25243:   //    ┻━┷━┷━┷━┻━┷━┷━┷━┻━┷━┷━┷━┻━┷━┷━┷━┻
 25244:   //        ┏━┳━━━┳━┓
 25245:   //        ┃ B┃   W  ┃ B┃
 25246:   //        ┗━┻━━━┻━┛
 25247:   //           24       8   0
 25248:   //    4の倍数+2
 25249:   //      -2  -1   0   1   2   3   4   5   6   7   8   9  10  11  12  13
 25250:   //    ┳━┯━┯━┯━┳━┯━┯━┯━┳━┯━┯━┯━┳━┯━┯━┯━┳
 25251:   //    ┃  │  │  │  ┃  │  │  │  ┃  │  │  │  ┃  │  │  │  ┃
 25252:   //    ┻━┷━┷━┷━┻━┷━┷━┷━┻━┷━┷━┷━┻━┷━┷━┷━┻
 25253:   //            ┏━━━┳━━━┓
 25254:   //            ┃   W  ┃   W  ┃
 25255:   //            ┗━━━┻━━━┛
 25256:   //                   16       0
 25257:   //    4の倍数+3
 25258:   //      -3  -2  -1   0   1   2   3   4   5   6   7   8   9  10  11  12
 25259:   //    ┳━┯━┯━┯━┳━┯━┯━┯━┳━┯━┯━┯━┳━┯━┯━┯━┳
 25260:   //    ┃  │  │  │  ┃  │  │  │  ┃  │  │  │  ┃  │  │  │  ┃
 25261:   //    ┻━┷━┷━┷━┻━┷━┷━┷━┻━┷━┷━┷━┻━┷━┷━┷━┻
 25262:   //                ┏━┳━━━┳━┓
 25263:   //                ┃ B┃   W  ┃ B┃
 25264:   //                ┗━┻━━━┻━┛
 25265:   //                   24       8   0
 25266:   //
 25267:   //  クワッド
 25268:   //    4の倍数
 25269:   //       0   1   2   3   4   5   6   7   8   9  10  11  12  13  14  15
 25270:   //    ┳━┯━┯━┯━┳━┯━┯━┯━┳━┯━┯━┯━┳━┯━┯━┯━┳
 25271:   //    ┃  │  │  │  ┃  │  │  │  ┃  │  │  │  ┃  │  │  │  ┃
 25272:   //    ┻━┷━┷━┷━┻━┷━┷━┷━┻━┷━┷━┷━┻━┷━┷━┷━┻
 25273:   //    ┏━━━━━━━┳━━━━━━━┓
 25274:   //    ┃       L      ┃       L      ┃
 25275:   //    ┗━━━━━━━┻━━━━━━━┛
 25276:   //                   32               0
 25277:   //    4の倍数+1
 25278:   //      -1   0   1   2   3   4   5   6   7   8   9  10  11  12  13  14
 25279:   //    ┳━┯━┯━┯━┳━┯━┯━┯━┳━┯━┯━┯━┳━┯━┯━┯━┳
 25280:   //    ┃  │  │  │  ┃  │  │  │  ┃  │  │  │  ┃  │  │  │  ┃
 25281:   //    ┻━┷━┷━┷━┻━┷━┷━┷━┻━┷━┷━┷━┻━┷━┷━┷━┻
 25282:   //        ┏━┳━━━┳━━━━━━━┳━┓
 25283:   //        ┃ B┃   W  ┃       L      ┃ B┃
 25284:   //        ┗━┻━━━┻━━━━━━━┻━┛
 25285:   //           56      40               8   0
 25286:   //    4の倍数+2
 25287:   //      -2  -1   0   1   2   3   4   5   6   7   8   9  10  11  12  13
 25288:   //    ┳━┯━┯━┯━┳━┯━┯━┯━┳━┯━┯━┯━┳━┯━┯━┯━┳
 25289:   //    ┃  │  │  │  ┃  │  │  │  ┃  │  │  │  ┃  │  │  │  ┃
 25290:   //    ┻━┷━┷━┷━┻━┷━┷━┷━┻━┷━┷━┷━┻━┷━┷━┷━┻
 25291:   //            ┏━━━┳━━━━━━━┳━━━┓
 25292:   //            ┃   W  ┃       L      ┃   W  ┃
 25293:   //            ┗━━━┻━━━━━━━┻━━━┛
 25294:   //                   48              16       0
 25295:   //    4の倍数+3
 25296:   //      -3  -2  -1   0   1   2   3   4   5   6   7   8   9  10  11  12
 25297:   //    ┳━┯━┯━┯━┳━┯━┯━┯━┳━┯━┯━┯━┳━┯━┯━┯━┳
 25298:   //    ┃  │  │  │  ┃  │  │  │  ┃  │  │  │  ┃  │  │  │  ┃
 25299:   //    ┻━┷━┷━┷━┻━┷━┷━┷━┻━┷━┷━┷━┻━┷━┷━┷━┻
 25300:   //                ┏━┳━━━━━━━┳━━━┳━┓
 25301:   //                ┃ B┃       L      ┃   W  ┃ B┃
 25302:   //                ┗━┻━━━━━━━┻━━━┻━┛
 25303:   //                   56              24       8   0
 25304:   //
 25305: 
 25306:   //--------------------------------------------------------------------------------
 25307:   //ピーク
 25308:   //  デバッガ用
 25309:   //  エラーや副作用なしでリードする
 25310:   //  アドレス変換はピーク
 25311:   //  ページフォルトやバスエラーのときは-1をキャストした値を返す
 25312: 
 25313:   //d = mmuPeekByteSign (a, f)
 25314:   //  ピークバイト符号拡張
 25315:   public static byte mmuPeekByteSign (int a, int f) {
 25316:     f = f == -1 ? XEiJ.regSRS != 0 ? 5 : 1 : f & 7;
 25317:     MemoryMappedDevice[] mm = (DataBreakPoint.DBP_ON ?
 25318:                                (f & 4) != 0 ? DataBreakPoint.dbpSuperMap : DataBreakPoint.dbpUserMap :
 25319:                                (f & 4) != 0 ? XEiJ.busSuperMap : XEiJ.busUserMap);
 25320:     //    01234567
 25321:     if (0b01100110 << 24 << f < 0) {  //SFC=1,2,5,6。アドレス変換あり
 25322:       int a0 = mmuTranslatePeek (a, f & 4, f & 2);
 25323:       return (a ^ a0) != 1 ? mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdPbs (a0) : -1;
 25324:     } else if (f != 7) {  //SFC=0,3,4。アドレス変換なし
 25325:       return mm[a >>> XEiJ.BUS_PAGE_BITS].mmdPbs (a);
 25326:     } else {
 25327:       return -1;
 25328:     }
 25329:   }  //mmuPeekByteSign(int,int)
 25330: 
 25331:   //d = mmuPeekByteSignData (a, supervisor)
 25332:   //  ピークバイト符号拡張(データ)
 25333:   public static byte mmuPeekByteSignData (int a, int supervisor) {
 25334:     MemoryMappedDevice[] mm = supervisor != 0 ? DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap : DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap;
 25335:     int a0 = mmuTranslatePeek (a, supervisor, 0);
 25336:     return (a ^ a0) == 1 ? -1 : mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdPbs (a0);
 25337:   }  //mmuPeekByteSignData(int,int)
 25338: 
 25339:   //d = mmuPeekByteSignCode (a, supervisor)
 25340:   //  ピークバイト符号拡張(コード)
 25341:   public static byte mmuPeekByteSignCode (int a, int supervisor) {
 25342:     MemoryMappedDevice[] mm = supervisor != 0 ? DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap : DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap;
 25343:     int a0 = mmuTranslatePeek (a, supervisor, 1);
 25344:     return (a ^ a0) == 1 ? -1 : mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdPbs (a0);
 25345:   }  //mmuPeekByteSignCode(int,int)
 25346: 
 25347:   //d = mmuPeekByteZeroData (a, supervisor)
 25348:   //  ピークバイトゼロ拡張(データ)
 25349:   public static int mmuPeekByteZeroData (int a, int supervisor) {
 25350:     MemoryMappedDevice[] mm = supervisor != 0 ? DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap : DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap;
 25351:     int a0 = mmuTranslatePeek (a, supervisor, 0);
 25352:     return (a ^ a0) == 1 ? 255 : mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdPbz (a0);
 25353:   }  //mmuPeekByteZeroData(int,int)
 25354: 
 25355:   //d = mmuPeekByteZeroCode (a, supervisor)
 25356:   //  ピークバイトゼロ拡張(コード)
 25357:   public static int mmuPeekByteZeroCode (int a, int supervisor) {
 25358:     MemoryMappedDevice[] mm = supervisor != 0 ? DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap : DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap;
 25359:     int a0 = mmuTranslatePeek (a, supervisor, 1);
 25360:     return (a ^ a0) == 1 ? 255 : mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdPbz (a0);
 25361:   }  //mmuPeekByteZeroCode(int,int)
 25362: 
 25363:   //d = mmuPeekWordSign (a, f)
 25364:   //  ピークワード符号拡張
 25365:   public static int mmuPeekWordSign (int a, int f) {
 25366:     f = f == -1 ? XEiJ.regSRS != 0 ? 5 : 1 : f & 7;
 25367:     MemoryMappedDevice[] mm = (DataBreakPoint.DBP_ON ?
 25368:                                (f & 4) != 0 ? DataBreakPoint.dbpSuperMap : DataBreakPoint.dbpUserMap :
 25369:                                (f & 4) != 0 ? XEiJ.busSuperMap : XEiJ.busUserMap);
 25370:     //    01234567
 25371:     if (0b01100110 << 24 << f < 0) {  //SFC=1,2,5,6。アドレス変換あり
 25372:       int a0 = mmuTranslatePeek (a, f & 4, f & 2);
 25373:       if ((a & 1) == 0) {  //偶数
 25374:         return (a ^ a0) != 1 ? mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdPws (a0) : -1;
 25375:       } else {  //奇数
 25376:         int a1 = mmuTranslatePeek (a + 1, f & 4, f & 2);
 25377:         return (((a     ^ a0) != 1 ? mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdPbs (a0) :  -1) << 8 |
 25378:                 ((a + 1 ^ a1) != 1 ? mm[a1 >>> XEiJ.BUS_PAGE_BITS].mmdPbz (a1) : 255));
 25379:       }
 25380:     } else if (f != 7) {  //SFC=0,3,4。アドレス変換なし
 25381:       if ((a & 1) == 0) {  //偶数
 25382:         return mm[a >>> XEiJ.BUS_PAGE_BITS].mmdPws (a);
 25383:       } else {  //奇数
 25384:         return (mm[a     >>> XEiJ.BUS_PAGE_BITS].mmdPbs (a    ) << 8 |
 25385:                 mm[a + 1 >>> XEiJ.BUS_PAGE_BITS].mmdPbz (a + 1));
 25386:       }
 25387:     } else {
 25388:       return -1;
 25389:     }
 25390:   }  //mmuPeekWordSign(int,int)
 25391: 
 25392:   //d = mmuPeekWordSignData (a, supervisor)
 25393:   //  ピークワード符号拡張(データ)
 25394:   public static int mmuPeekWordSignData (int a, int supervisor) {
 25395:     MemoryMappedDevice[] mm = supervisor != 0 ? DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap : DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap;
 25396:     int a0 = mmuTranslatePeek (a, supervisor, 0);  //a+1が必要なので上書き不可
 25397:     if ((a & 1) == 0) {  //偶数
 25398:       return (a0 & 1) != 0 ? -1 : mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdPws (a0);
 25399:     } else {  //奇数
 25400:       int a1 = mmuTranslatePeek (a + 1, supervisor, 0);
 25401:       return (((a0 & 1) == 0 ?  -1 : mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdPbs (a0)) << 8 |
 25402:               ((a1 & 1) != 0 ? 255 : mm[a1 >>> XEiJ.BUS_PAGE_BITS].mmdPbz (a1)));
 25403:     }
 25404:   }  //mmuPeekWordSignData(int,int)
 25405: 
 25406:   //d = mmuPeekWordSignEven (a, supervisor)
 25407:   //  ピークワード符号拡張(偶数)
 25408:   public static int mmuPeekWordSignEven (int a, int supervisor) {
 25409:     MemoryMappedDevice[] mm = supervisor != 0 ? DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap : DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap;
 25410:     a = mmuTranslatePeek (a, supervisor, 0);
 25411:     return (a & 1) != 0 ? -1 : mm[a >>> XEiJ.BUS_PAGE_BITS].mmdPws (a);
 25412:   }  //mmuPeekWordSignEven(int,int)
 25413: 
 25414:   //d = mmuPeekWordSignCode (a, supervisor)
 25415:   //  ピークワード符号拡張(コード)
 25416:   public static int mmuPeekWordSignCode (int a, int supervisor) {
 25417:     MemoryMappedDevice[] mm = supervisor != 0 ? DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap : DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap;
 25418:     a = mmuTranslatePeek (a, supervisor, 1);
 25419:     return (a & 1) != 0 ? -1 : mm[a >>> XEiJ.BUS_PAGE_BITS].mmdPws (a);
 25420:   }  //mmuPeekWordSignCode(int,int)
 25421: 
 25422:   //d = mmuPeekWordZeroData (a, supervisor)
 25423:   //  ピークワードゼロ拡張(データ)
 25424:   public static int mmuPeekWordZeroData (int a, int supervisor) {
 25425:     MemoryMappedDevice[] mm = supervisor != 0 ? DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap : DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap;
 25426:     int a0 = mmuTranslatePeek (a, supervisor, 0);  //a+1が必要なので上書き不可
 25427:     if ((a & 1) == 0) {  //偶数
 25428:       return (a0 & 1) != 0 ? 65535 : mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdPwz (a0);
 25429:     } else {  //奇数
 25430:       int a1 = mmuTranslatePeek (a + 1, supervisor, 0);
 25431:       return (((a0 & 1) == 0 ? 255 : mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdPbz (a0)) << 8 |
 25432:               ((a1 & 1) != 0 ? 255 : mm[a1 >>> XEiJ.BUS_PAGE_BITS].mmdPbz (a1)));
 25433:     }
 25434:   }  //mmuPeekWordZeroData(int,int)
 25435: 
 25436:   //d = mmuPeekWordZeroEven (a, supervisor)
 25437:   //  ピークワードゼロ拡張(偶数)
 25438:   public static int mmuPeekWordZeroEven (int a, int supervisor) {
 25439:     MemoryMappedDevice[] mm = supervisor != 0 ? DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap : DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap;
 25440:     a = mmuTranslatePeek (a, supervisor, 0);
 25441:     return (a & 1) != 0 ? 65535 : mm[a >>> XEiJ.BUS_PAGE_BITS].mmdPwz (a);
 25442:   }  //mmuPeekWordZeroEven(int,int)
 25443: 
 25444:   //d = mmuPeekWordZeroCode (a, supervisor)
 25445:   //  ピークワードゼロ拡張(コード)
 25446:   public static int mmuPeekWordZeroCode (int a, int supervisor) {
 25447:     MemoryMappedDevice[] mm = supervisor != 0 ? DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap : DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap;
 25448:     a = mmuTranslatePeek (a, supervisor, 1);
 25449:     return (a & 1) != 0 ? 65535 : mm[a >>> XEiJ.BUS_PAGE_BITS].mmdPwz (a);
 25450:   }  //mmuPeekWordZeroCode(int,int)
 25451: 
 25452:   //d = mmuPeekLong (a, f)
 25453:   //  ピークロング
 25454:   public static int mmuPeekLong (int a, int f) {
 25455:     f = f == -1 ? XEiJ.regSRS != 0 ? 5 : 1 : f & 7;
 25456:     MemoryMappedDevice[] mm = (DataBreakPoint.DBP_ON ?
 25457:                                (f & 4) != 0 ? DataBreakPoint.dbpSuperMap : DataBreakPoint.dbpUserMap :
 25458:                                (f & 4) != 0 ? XEiJ.busSuperMap : XEiJ.busUserMap);
 25459:     //    01234567
 25460:     if (0b01100110 << 24 << f < 0) {  //SFC=1,2,5,6。アドレス変換あり
 25461:       int a0 = mmuTranslatePeek (a, f & 4, f & 2);
 25462:       if ((a & 3) == 0) {  //4の倍数
 25463:         return (a ^ a0) != 1 ? mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdPls (a0) : -1;
 25464:       } else if ((a & 1) == 0) {  //4の倍数ではない偶数
 25465:         int a2 = mmuTranslatePeek (a + 2, f & 4, f & 2);
 25466:         return (((a     ^ a0) != 1 ? mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdPws (a0) :    -1) << 16 |
 25467:                 ((a + 2 ^ a2) != 1 ? mm[a2 >>> XEiJ.BUS_PAGE_BITS].mmdPwz (a2) : 65535));
 25468:       } else {  //奇数
 25469:         int a1 = mmuTranslatePeek (a + 1, f & 4, f & 2);
 25470:         int a3 = mmuTranslatePeek (a + 3, f & 4, f & 2);
 25471:         return (((a     ^ a0) != 1 ? mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdPbs (a0) :    -1) << 24 |
 25472:                 ((a + 1 ^ a1) != 1 ? mm[a1 >>> XEiJ.BUS_PAGE_BITS].mmdPwz (a1) : 65535) <<  8 |
 25473:                 ((a + 3 ^ a3) != 1 ? mm[a3 >>> XEiJ.BUS_PAGE_BITS].mmdPbz (a3) :   255));
 25474:       }
 25475:     } else if (f != 7) {  //SFC=0,3,4。アドレス変換なし
 25476:       if ((a & 3) == 0) {  //4の倍数
 25477:         return mm[a >>> XEiJ.BUS_PAGE_BITS].mmdPls (a);
 25478:       } else if ((a & 1) == 0) {  //4の倍数ではない偶数
 25479:         return (mm[a     >>> XEiJ.BUS_PAGE_BITS].mmdPws (a    ) << 16 |
 25480:                 mm[a + 2 >>> XEiJ.BUS_PAGE_BITS].mmdPwz (a + 2));
 25481:       } else {  //奇数
 25482:         return (mm[a     >>> XEiJ.BUS_PAGE_BITS].mmdPbs (a    ) << 24 |
 25483:                 mm[a + 1 >>> XEiJ.BUS_PAGE_BITS].mmdPwz (a + 1) <<  8 |
 25484:                 mm[a + 3 >>> XEiJ.BUS_PAGE_BITS].mmdPbz (a + 3));
 25485:       }
 25486:     } else {
 25487:       return -1;
 25488:     }
 25489:   }  //mmuPeekLong(int,int)
 25490: 
 25491:   //d = mmuPeekLongData (a, supervisor)
 25492:   //  ピークロング(データ)
 25493:   public static int mmuPeekLongData (int a, int supervisor) {
 25494:     MemoryMappedDevice[] mm = supervisor != 0 ? DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap : DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap;
 25495:     int a0 = mmuTranslatePeek (a, supervisor, 0);  //a+1,a+2,a+3が必要なので上書き不可
 25496:     if ((a & 3) == 0) {  //4の倍数
 25497:       return (a0 & 1) != 0 ? -1 : mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdPls (a0);
 25498:     } else if ((a & 1) == 0) {  //4の倍数+2
 25499:       int a2 = mmuTranslatePeek (a + 2, supervisor, 0);
 25500:       return (((a0 & 1) != 0 ?    -1 : mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdPws (a0)) << 16 |
 25501:               ((a2 & 1) != 0 ? 65535 : mm[a2 >>> XEiJ.BUS_PAGE_BITS].mmdPwz (a2)));
 25502:     } else {  //奇数
 25503:       int a1 = mmuTranslatePeek (a + 1, supervisor, 0);
 25504:       int a3 = mmuTranslatePeek (a + 3, supervisor, 0);
 25505:       return (((a0 & 1) == 0 ?    -1 : mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdPbs (a0)) << 24 |
 25506:               ((a1 & 1) != 0 ? 65535 : mm[a1 >>> XEiJ.BUS_PAGE_BITS].mmdPwz (a1)) << 16 |
 25507:               ((a3 & 1) != 0 ?   255 : mm[a3 >>> XEiJ.BUS_PAGE_BITS].mmdPbz (a3)));
 25508:     }
 25509:   }  //mmuPeekLongData(int,int)
 25510: 
 25511:   //d = mmuPeekLongEven (a, supervisor)
 25512:   //  ピークロング(偶数)
 25513:   public static int mmuPeekLongEven (int a, int supervisor) {
 25514:     MemoryMappedDevice[] mm = supervisor != 0 ? DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap : DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap;
 25515:     int a0 = mmuTranslatePeek (a, supervisor, 0);  //a+2が必要なので上書き不可
 25516:     if ((a & 2) == 0) {  //4の倍数
 25517:       return (a0 & 1) != 0 ? -1 : mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdPls (a0);
 25518:     } else {  //4の倍数+2
 25519:       int a2 = mmuTranslatePeek (a + 2, supervisor, 0);
 25520:       return (((a0 & 1) != 0 ?    -1 : mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdPws (a0)) << 16 |
 25521:               ((a2 & 1) != 0 ? 65535 : mm[a2 >>> XEiJ.BUS_PAGE_BITS].mmdPwz (a2)));
 25522:     }
 25523:   }  //mmuPeekLongEven(int,int)
 25524: 
 25525:   //d = mmuPeekLongFour (a, supervisor)
 25526:   //  ピークロング(4の倍数)
 25527:   public static int mmuPeekLongFour (int a, int supervisor) {
 25528:     MemoryMappedDevice[] mm = supervisor != 0 ? DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap : DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap;
 25529:     a = mmuTranslatePeek (a, supervisor, 0);
 25530:     return (a & 1) != 0 ? -1 : mm[a >>> XEiJ.BUS_PAGE_BITS].mmdPls (a);
 25531:   }  //mmuPeekLongFour(int,int)
 25532: 
 25533:   //d = mmuPeekLongCode (a, supervisor)
 25534:   //  ピークロング(コード)
 25535:   public static int mmuPeekLongCode (int a, int supervisor) {
 25536:     MemoryMappedDevice[] mm = supervisor != 0 ? DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap : DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap;
 25537:     int a0 = mmuTranslatePeek (a, supervisor, 1);  //a+2が必要なので上書き不可
 25538:     if ((a & 2) == 0) {  //4の倍数
 25539:       return (a0 & 1) != 0 ? -1 : mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdPls (a0);
 25540:     } else {  //4の倍数+2
 25541:       int a2 = mmuTranslatePeek (a + 2, supervisor, 1);
 25542:       return (((a0 & 1) != 0 ?    -1 : mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdPws (a0)) << 16 |
 25543:               ((a2 & 1) != 0 ? 65535 : mm[a2 >>> XEiJ.BUS_PAGE_BITS].mmdPwz (a2)));
 25544:     }
 25545:   }  //mmuPeekLongCode(int,int)
 25546: 
 25547:   //d = mmuPeekQuad (a, f)
 25548:   //  ピーククワッド
 25549:   public static long mmuPeekQuad (int a, int f) {
 25550:     return (long) mmuPeekLong (a, f) << 32 | mmuPeekLong (a + 4, f) & 0xffffffffL;
 25551:   }  //mmuPeekQuad(int,int)
 25552: 
 25553:   //d = mmuPeekQuadData (a, supervisor)
 25554:   //  ピーククワッド(データ)
 25555:   public static long mmuPeekQuadData (int a, int supervisor) {
 25556:     MemoryMappedDevice[] mm = supervisor != 0 ? DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap : DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap;
 25557:     int a0 = mmuTranslatePeek (a, supervisor, 0);  //a+1,a+2,a+3,a+4,a+5,a+6,a+7が必要なので上書き不可
 25558:     if ((a & 3) == 0) {  //4の倍数
 25559:       int a4 = mmuTranslatePeek (a + 4, supervisor, 0);  //4の倍数
 25560:       return ((long) ((a0 & 1) != 0 ? -1 : mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdPls (a0)) << 32 |
 25561:               (long) ((a4 & 1) != 0 ? -1 : mm[a4 >>> XEiJ.BUS_PAGE_BITS].mmdPls (a4)) & 0x00000000ffffffffL);
 25562:     } else if ((a & 1) == 0) {  //4の倍数+2
 25563:       int a2 = mmuTranslatePeek (a + 2, supervisor, 0);  //4の倍数
 25564:       int a6 = mmuTranslatePeek (a + 6, supervisor, 0);  //4の倍数
 25565:       return ((long) ((a0 & 1) != 0 ?    -1 : mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdPws (a0)) << 48 |
 25566:               (long) ((a2 & 1) != 0 ?    -1 : mm[a2 >>> XEiJ.BUS_PAGE_BITS].mmdPls (a2)) << 16 & 0x0000ffffffff0000L |
 25567:               (long) ((a6 & 1) != 0 ? 65535 : mm[a6 >>> XEiJ.BUS_PAGE_BITS].mmdPwz (a6)));
 25568:     } else if ((a & 3) == 1) {  //4の倍数+1
 25569:       int a1 = mmuTranslatePeek (a + 1, supervisor, 0);  //4の倍数+2
 25570:       int a3 = mmuTranslatePeek (a + 3, supervisor, 0);  //4の倍数
 25571:       int a7 = mmuTranslatePeek (a + 7, supervisor, 0);  //4の倍数
 25572:       return ((long) ((a0 & 1) != 0 ?    -1 : mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdPbs (a0)) << 56 |
 25573:               (long) ((a1 & 1) != 0 ? 65535 : mm[a1 >>> XEiJ.BUS_PAGE_BITS].mmdPwz (a1)) << 40 |
 25574:               (long) ((a3 & 1) != 0 ?    -1 : mm[a3 >>> XEiJ.BUS_PAGE_BITS].mmdPls (a3)) <<  8 & 0x000000ffffffff00L |
 25575:               (long) ((a7 & 1) != 0 ?   255 : mm[a7 >>> XEiJ.BUS_PAGE_BITS].mmdPbz (a7)));
 25576:     } else {  //4の倍数+3
 25577:       int a1 = mmuTranslatePeek (a + 1, supervisor, 0);  //4の倍数
 25578:       int a5 = mmuTranslatePeek (a + 5, supervisor, 0);  //4の倍数
 25579:       int a7 = mmuTranslatePeek (a + 7, supervisor, 0);  //4の倍数+2
 25580:       return ((long) ((a0 & 1) != 0 ?    -1 : mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdPbs (a0)) << 56 |
 25581:               (long) ((a1 & 1) != 0 ?    -1 : mm[a1 >>> XEiJ.BUS_PAGE_BITS].mmdPls (a1)) << 24 & 0x00ffffffff000000L |
 25582:               (long) ((a5 & 1) != 0 ? 65535 : mm[a5 >>> XEiJ.BUS_PAGE_BITS].mmdPwz (a5)) <<  8 |
 25583:               (long) ((a7 & 1) != 0 ?   255 : mm[a7 >>> XEiJ.BUS_PAGE_BITS].mmdPbz (a7)));
 25584:     }
 25585:   }  //mmuPeekQuadData(int,int)
 25586: 
 25587:   //d = mmuPeekQuadEven (a, supervisor)
 25588:   //  ピーククワッド(偶数)
 25589:   public static long mmuPeekQuadEven (int a, int supervisor) {
 25590:     MemoryMappedDevice[] mm = supervisor != 0 ? DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap : DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap;
 25591:     int a0 = mmuTranslatePeek (a, supervisor, 0);  //a+2,a+4,a+6が必要なので上書き不可
 25592:     if ((a & 2) == 0) {  //4の倍数
 25593:       int a4 = mmuTranslatePeek (a + 4, supervisor, 0);  //4の倍数
 25594:       return ((long) ((a0 & 1) != 0 ? -1 : mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdPls (a0)) << 32 |
 25595:               (long) ((a4 & 1) != 0 ? -1 : mm[a4 >>> XEiJ.BUS_PAGE_BITS].mmdPls (a4)) & 0x00000000ffffffffL);
 25596:     } else {  //4の倍数+2
 25597:       int a2 = mmuTranslatePeek (a + 2, supervisor, 0);  //4の倍数
 25598:       int a6 = mmuTranslatePeek (a + 6, supervisor, 0);  //4の倍数
 25599:       return ((long) ((a0 & 1) != 0 ?    -1 : mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdPws (a0)) << 48 |
 25600:               (long) ((a2 & 1) != 0 ?    -1 : mm[a2 >>> XEiJ.BUS_PAGE_BITS].mmdPls (a2)) << 16 & 0x0000ffffffff0000L |
 25601:               (long) ((a6 & 1) != 0 ? 65535 : mm[a6 >>> XEiJ.BUS_PAGE_BITS].mmdPwz (a6)));
 25602:     }
 25603:   }  //mmuPeekQuadEven(int,int)
 25604: 
 25605:   //d = mmuPeekQuadFour (a, supervisor)
 25606:   //  ピーククワッド(4の倍数)
 25607:   public static long mmuPeekQuadFour (int a, int supervisor) {
 25608:     MemoryMappedDevice[] mm = supervisor != 0 ? DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap : DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap;
 25609:     int a0 = mmuTranslatePeek (a    , supervisor, 0);  //4の倍数。a+4が必要なので上書き不可
 25610:     int a4 = mmuTranslatePeek (a + 4, supervisor, 0);  //4の倍数
 25611:     return ((long) ((a0 & 1) != 0 ? -1 : mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdPls (a0)) << 32 |
 25612:             (long) ((a4 & 1) != 0 ? -1 : mm[a4 >>> XEiJ.BUS_PAGE_BITS].mmdPls (a4)) & 0x00000000ffffffffL);
 25613:   }  //mmuPeekQuadFour(int,int)
 25614: 
 25615:   //d = mmuPeekQuadCode (a, supervisor)
 25616:   //  ピーククワッド(コード)
 25617:   public static long mmuPeekQuadCode (int a, int supervisor) {
 25618:     MemoryMappedDevice[] mm = supervisor != 0 ? DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap : DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap;
 25619:     int a0 = mmuTranslatePeek (a, supervisor, 1);  //a+2,a+4,a+6が必要なので上書き不可
 25620:     if ((a & 2) == 0) {  //4の倍数
 25621:       int a4 = mmuTranslatePeek (a + 4, supervisor, 1);
 25622:       return ((long) ((a0 & 1) != 0 ? -1 : mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdPls (a0)) << 32 |
 25623:               (long) ((a4 & 1) != 0 ? -1 : mm[a4 >>> XEiJ.BUS_PAGE_BITS].mmdPls (a4)) & 0x00000000ffffffffL);
 25624:     } else {  //4の倍数+2
 25625:       int a2 = mmuTranslatePeek (a + 2, supervisor, 1);  //4の倍数
 25626:       int a6 = mmuTranslatePeek (a + 6, supervisor, 1);  //4の倍数
 25627:       return ((long) ((a0 & 1) != 0 ?    -1 : mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdPws (a0)) << 48 |
 25628:               (long) ((a2 & 1) != 0 ?    -1 : mm[a2 >>> XEiJ.BUS_PAGE_BITS].mmdPls (a2)) << 16 & 0x0000ffffffff0000L |
 25629:               (long) ((a6 & 1) != 0 ? 65535 : mm[a6 >>> XEiJ.BUS_PAGE_BITS].mmdPwz (a6)));
 25630:     }
 25631:   }  //mmuPeekQuadCode(int,int)
 25632: 
 25633:   //mmuPeekExtended (a, b, f)
 25634:   //  ピークエクステンデッド
 25635:   public static void mmuPeekExtended (int a, byte[] b, int f) {
 25636:     for (int i = 0; i < 12; i++) {
 25637:       b[i] = mmuPeekByteSign (a + i, f);
 25638:     }
 25639:   }  //mmuPeekExtended(int,int,byte[])
 25640: 
 25641:   //len = mmuPeekStrlen (a, l)
 25642:   public static int mmuPeekStrlen (int a, int l, int supervisor) {
 25643:     for (int i = 0; i < l; i++) {
 25644:       if (mmuPeekByteZeroData (a + i, supervisor) == 0) {
 25645:         return i;
 25646:       }
 25647:     }
 25648:     return l;
 25649:   }  //mmuPeekStrlen(int,int,int)
 25650: 
 25651:   //bool = mmuPeekEquals (a, str)
 25652:   //  アドレスaから始まるSJISの文字列とstrをSJISに変換してエスケープシーケンスを展開した文字列を比較する
 25653:   //  終端の\0まで比較するときはstrに\0を含めること
 25654:   //  \x??で任意のSJISの文字を書ける
 25655:   //  SJISに変換できない文字は'※'とみなす
 25656:   //  スーパーバイザモード比較する
 25657:   public static boolean mmuPeekEquals (int a, String str) {
 25658:     int len = str.length ();
 25659:     for (int i = 0; i < len; i++) {
 25660:       int c = str.charAt (i);
 25661:       if (c == '\\') {  //エスケープシーケンス。SJIS変換を省略する
 25662:         int d = i + 1 < len ? str.charAt (i + 1) : -1;  //2文字目
 25663:         if ((d & -4) == '0') {  // \[0-3][0-7]{0,2}
 25664:           c = d & 7;
 25665:           d = i + 2 < len ? str.charAt (i + 2) : -1;  //3文字目
 25666:           if ((d & -8) == '0') {
 25667:             c = c << 3 | (d & 7);
 25668:             d = i + 3 < len ? str.charAt (i + 3) : -1;  //4文字目
 25669:             if ((d & -8) == '0') {
 25670:               c = c << 3 | (d & 7);
 25671:               i++;  //4文字
 25672:             }
 25673:             i++;  //3文字
 25674:           }
 25675:           i++;  //2文字
 25676:         } else if ((d & -4) == '4') {  // \[4-7][0-7]?
 25677:           c = d & 7;
 25678:           d = i + 2 < len ? str.charAt (i + 2) : -1;  //3文字目
 25679:           if ((d & -8) == '0') {
 25680:             c = c << 3 | (d & 7);
 25681:             i++;  //3文字
 25682:           }
 25683:           i++;  //2文字
 25684:         } else if (d == 'b') {  // \b
 25685:           c = 0x08;  //BS
 25686:           i++;  //2文字
 25687:         } else if (d == 't') {  // \t
 25688:           c = 0x09;  //HT
 25689:           i++;  //2文字
 25690:         } else if (d == 'n') {  // \n
 25691:           c = 0x0a;  //LF
 25692:           i++;  //2文字
 25693:         } else if (d == 'v') {  // \v
 25694:           c = 0x0b;  //VT
 25695:           i++;  //2文字
 25696:         } else if (d == 'f') {  // \f
 25697:           c = 0x0c;  //FF
 25698:           i++;  //2文字
 25699:         } else if (d == 'r') {  // \r
 25700:           c = 0x0d;  //CR
 25701:           i++;  //2文字
 25702:         } else if (d == 'x' &&
 25703:                    i + 3 < len &&
 25704:                    CharacterCode.chrIsXdigit (str.charAt (i + 2)) &&
 25705:                    CharacterCode.chrIsXdigit (str.charAt (i + 3))) {  // \x[0-9A-Fa-f]{2}
 25706:           c = (CharacterCode.chrDigit (str.charAt (i + 2)) << 4 |
 25707:                CharacterCode.chrDigit (str.charAt (i + 3)));
 25708:           i += 3;  //4文字
 25709:         } else if ('!' <= d && d <= '~') {
 25710:           c = d;
 25711:           i++;  //2文字
 25712:         }
 25713:         if (mmuPeekByteZeroData (a++, 1) != c) {
 25714:           return false;
 25715:         }
 25716:       } else {  //エスケープシーケンス以外
 25717:         int s = CharacterCode.chrCharToSJIS[c];
 25718:         if (s == 0 && c != 0) {
 25719:           s = 0x81a6;  //'※'
 25720:         }
 25721:         if (s >> 8 != 0) {  //2バイトコード
 25722:           if (mmuPeekByteZeroData (a++, 1) != s >> 8) {
 25723:             return false;
 25724:           }
 25725:         }
 25726:         if (mmuPeekByteZeroData (a++, 1) != (s & 0xff)) {
 25727:           return false;
 25728:         }
 25729:       }
 25730:     }  //for
 25731:     return true;
 25732:   }  //mmuPeekEquals
 25733: 
 25734:   //s = mmuPeekStringL (a, l, supervisor)
 25735:   //sb = mmuPeekStringL (sb, a, l, supervisor)
 25736:   //  ピークストリング(長さ指定)
 25737:   //  文字列を読み出す
 25738:   //  対応する文字がないときは'.'または'※'になる
 25739:   //  制御コードは'.'になる
 25740:   public static String mmuPeekStringL (int a, int l, int supervisor) {
 25741:     return mmuPeekStringL (new StringBuilder (), a, l, supervisor).toString ();
 25742:   }  //mmuPeekStringL(int,int,int)
 25743:   public static StringBuilder mmuPeekStringL (StringBuilder sb, int a, int l, int supervisor) {
 25744:     for (int i = 0; i < l; i++) {
 25745:       int s = mmuPeekByteZeroData (a + i, supervisor);
 25746:       char c;
 25747:       if (0x81 <= s && s <= 0x9f || 0xe0 <= s && s <= 0xef) {  //SJISの2バイトコードの1バイト目
 25748:         int t = i + 1 < l ? mmuPeekByteZeroData (a + i + 1, supervisor) : 0;
 25749:         if (0x40 <= t && t != 0x7f && t <= 0xfc) {  //SJISの2バイトコードの2バイト目
 25750:           c = CharacterCode.chrSJISToChar[s << 8 | t];  //2バイトで変換する
 25751:           if (c == 0) {  //対応する文字がない
 25752:             c = '※';
 25753:           }
 25754:           i++;
 25755:         } else {  //SJISの2バイトコードの2バイト目ではない
 25756:           c = '.';  //SJISの2バイトコードの1バイト目ではなかった
 25757:         }
 25758:       } else {  //SJISの2バイトコードの1バイト目ではない
 25759:         c = CharacterCode.chrSJISToChar[s];  //1バイトで変換する
 25760:         if (c < 0x20 || c == 0x7f) {  //対応する文字がないまたは制御コード
 25761:           c = '.';
 25762:         }
 25763:       }
 25764:       sb.append (c);
 25765:     }
 25766:     return sb;
 25767:   }  //mmuPeekString(StringBuilder,int,int,int)
 25768: 
 25769:   //s = mmuPeekStringZ (a, f)
 25770:   //sb = mmuPeekStringZ (sb, a, f)
 25771:   //  ピークストリング
 25772:   //  文字列をSJISからUTF-16に変換しながらメモリから読み出す
 25773:   //  '\0'の手前まで読み出す
 25774:   //  UTF-16に変換できない文字は'\ufffd'になる
 25775:   public static String mmuPeekStringZ (int a, int f) {
 25776:     return mmuPeekStringZ (new StringBuilder (), a, f).toString ();
 25777:   }  //mmuPeekStringZ(int,int)
 25778:   public static StringBuilder mmuPeekStringZ (StringBuilder sb, int a, int f) {
 25779:     for (;;) {
 25780:       int s = mmuPeekByteSign (a++, f) & 255;
 25781:       if (s == 0) {
 25782:         break;
 25783:       }
 25784:       int u;
 25785:       if (0x81 <= s && s <= 0x9f || 0xe0 <= s && s <= 0xef) {  //SJISの2バイトコードの1バイト目
 25786:         int t = mmuPeekByteSign (a++, f) & 255;
 25787:         if (t == 0) {
 25788:           sb.append ('\ufffd');
 25789:           break;
 25790:         }
 25791:         if (0x40 <= t && t != 0x7f && t <= 0xfc) {  //SJISの2バイトコードの2バイト目
 25792:           t |= s << 8;
 25793:           u = CharacterCode.chrSJISToChar[t];  //2バイトで変換する
 25794:           if (u == 0) {  //変換できない
 25795:             u = 0xfffd;
 25796:           }
 25797:         } else {  //SJISの2バイトコードの2バイト目ではない
 25798:           u = 0xfffd;
 25799:         }
 25800:       } else {  //SJISの2バイトコードの1バイト目ではない
 25801:         u = CharacterCode.chrSJISToChar[s];  //1バイトで変換する
 25802:         if (u == 0) {  //変換できない
 25803:           u = 0xfffd;
 25804:         }
 25805:       }
 25806:       sb.append ((char) u);
 25807:     }
 25808:     return sb;
 25809:   }  //mmuPeekStringZ(StringBuilder,int,int)
 25810: 
 25811:   //--------------------------------------------------------------------------------
 25812:   //リード
 25813:   //  アドレス変換はリード
 25814:   //  FSLWのRead and WriteはRead
 25815: 
 25816:   //d = mmuReadByteSignData (a, supervisor)
 25817:   //  リードバイト符号拡張(データ)
 25818:   public static byte mmuReadByteSignData (int a, int supervisor) throws M68kException {
 25819:     if (supervisor != 0) {  //スーパーバイザモード
 25820:       M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_READ | M68kException.M6E_FSLW_SIZE_BYTE | M68kException.M6E_FSLW_TM_SUPER_DATA;
 25821:       int a0 = mmuTranslateReadSuperData (a);
 25822:       return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRbs (a0);
 25823:     } else {  //ユーザモード
 25824:       M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_READ | M68kException.M6E_FSLW_SIZE_BYTE | M68kException.M6E_FSLW_TM_USER_DATA;
 25825:       int a0 = mmuTranslateReadUserData (a);
 25826:       return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRbs (a0);
 25827:     }
 25828:   }  //mmuReadByteSignData(int,int)
 25829: 
 25830:   //d = mmuReadByteZeroData (a, supervisor)
 25831:   //  リードバイトゼロ拡張(データ)
 25832:   public static int mmuReadByteZeroData (int a, int supervisor) throws M68kException {
 25833:     if (supervisor != 0) {  //スーパーバイザモード
 25834:       M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_READ | M68kException.M6E_FSLW_SIZE_BYTE | M68kException.M6E_FSLW_TM_SUPER_DATA;
 25835:       int a0 = mmuTranslateReadSuperData (a);
 25836:       return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRbz (a0);
 25837:     } else {  //ユーザモード
 25838:       M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_READ | M68kException.M6E_FSLW_SIZE_BYTE | M68kException.M6E_FSLW_TM_USER_DATA;
 25839:       int a0 = mmuTranslateReadUserData (a);
 25840:       return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRbz (a0);
 25841:     }
 25842:   }  //mmuReadByteZeroData(int,int)
 25843: 
 25844:   //d = mmuReadByteSignExword (a, supervisor)
 25845:   //  リードバイト符号拡張(拡張ワード)
 25846:   public static byte mmuReadByteSignExword (int a, int supervisor) throws M68kException {
 25847:     if (supervisor != 0) {  //スーパーバイザモード
 25848:       M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_EXWORD | M68kException.M6E_FSLW_RW_READ | M68kException.M6E_FSLW_SIZE_BYTE | M68kException.M6E_FSLW_TM_SUPER_CODE;
 25849:       int a0 = mmuTranslateReadSuperCode (a);
 25850:       return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRbs (a0);
 25851:     } else {  //ユーザモード
 25852:       M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_EXWORD | M68kException.M6E_FSLW_RW_READ | M68kException.M6E_FSLW_SIZE_BYTE | M68kException.M6E_FSLW_TM_USER_CODE;
 25853:       int a0 = mmuTranslateReadUserCode (a);
 25854:       return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRbs (a0);
 25855:     }
 25856:   }  //mmuReadByteSignExword(int,int)
 25857: 
 25858:   //d = mmuReadByteZeroExword (a, supervisor)
 25859:   //  リードバイトゼロ拡張(拡張ワード)
 25860:   public static int mmuReadByteZeroExword (int a, int supervisor) throws M68kException {
 25861:     if (supervisor != 0) {  //スーパーバイザモード
 25862:       M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_EXWORD | M68kException.M6E_FSLW_RW_READ | M68kException.M6E_FSLW_SIZE_BYTE | M68kException.M6E_FSLW_TM_SUPER_CODE;
 25863:       int a0 = mmuTranslateReadSuperCode (a);
 25864:       return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRbz (a0);
 25865:     } else {  //ユーザモード
 25866:       M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_EXWORD | M68kException.M6E_FSLW_RW_READ | M68kException.M6E_FSLW_SIZE_BYTE | M68kException.M6E_FSLW_TM_USER_CODE;
 25867:       int a0 = mmuTranslateReadUserCode (a);
 25868:       return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRbz (a0);
 25869:     }
 25870:   }  //mmuReadByteZeroExword(int,int)
 25871: 
 25872:   //d = mmuReadWordSignData (a, supervisor)
 25873:   //  リードワード符号拡張(データ)
 25874:   public static int mmuReadWordSignData (int a, int supervisor) throws M68kException {
 25875:     if (supervisor != 0) {  //スーパーバイザモード
 25876:       M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_READ | M68kException.M6E_FSLW_SIZE_WORD | M68kException.M6E_FSLW_TM_SUPER_DATA;
 25877:       int a0 = mmuTranslateReadSuperData (a);  //a+1が必要なので上書き不可
 25878:       if ((a & 1) == 0) {  //偶数
 25879:         return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRws (a0);
 25880:       } else {  //奇数
 25881:         int d0 = (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRbs (a0);
 25882:         M68kException.m6eFSLW ^= M68kException.M6E_FSLW_IOMA_FIRST ^ M68kException.M6E_FSLW_IOMA_SECOND;
 25883:         int a1 = mmuTranslateReadSuperData (a + 1);  //偶数
 25884:         return (d0 << 8 |
 25885:                 (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a1 >>> XEiJ.BUS_PAGE_BITS].mmdRbz (a1));
 25886:       }
 25887:     } else {  //ユーザモード
 25888:       M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_READ | M68kException.M6E_FSLW_SIZE_WORD | M68kException.M6E_FSLW_TM_USER_DATA;
 25889:       int a0 = mmuTranslateReadUserData (a);  //a+1が必要なので上書き不可
 25890:       if ((a & 1) == 0) {  //偶数
 25891:         return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRws (a0);
 25892:       } else {  //奇数
 25893:         int d0 = (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRbs (a0);
 25894:         M68kException.m6eFSLW ^= M68kException.M6E_FSLW_IOMA_FIRST ^ M68kException.M6E_FSLW_IOMA_SECOND;
 25895:         int a1 = mmuTranslateReadUserData (a + 1);  //偶数
 25896:         return (d0 << 8 |
 25897:                 (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a1 >>> XEiJ.BUS_PAGE_BITS].mmdRbz (a1));
 25898:       }
 25899:     }
 25900:   }  //mmuReadWordSignData(int,int)
 25901: 
 25902:   //d = mmuReadWordZeroData (a, supervisor)
 25903:   //  リードワードゼロ拡張(データ)
 25904:   public static int mmuReadWordZeroData (int a, int supervisor) throws M68kException {
 25905:     if (supervisor != 0) {  //スーパーバイザモード
 25906:       M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_READ | M68kException.M6E_FSLW_SIZE_WORD | M68kException.M6E_FSLW_TM_SUPER_DATA;
 25907:       int a0 = mmuTranslateReadSuperData (a);  //a+1が必要なので上書き不可
 25908:       if ((a & 1) == 0) {  //偶数
 25909:         return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a0);
 25910:       } else {  //奇数
 25911:         int d0 = (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRbz (a0);
 25912:         M68kException.m6eFSLW ^= M68kException.M6E_FSLW_IOMA_FIRST ^ M68kException.M6E_FSLW_IOMA_SECOND;
 25913:         int a1 = mmuTranslateReadSuperData (a + 1);  //偶数
 25914:         return (d0 << 8 |
 25915:                 (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a1 >>> XEiJ.BUS_PAGE_BITS].mmdRbz (a1));
 25916:       }
 25917:     } else {  //ユーザモード
 25918:       M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_READ | M68kException.M6E_FSLW_SIZE_WORD | M68kException.M6E_FSLW_TM_USER_DATA;
 25919:       int a0 = mmuTranslateReadUserData (a);  //a+1が必要なので上書き不可
 25920:       if ((a & 1) == 0) {  //偶数
 25921:         return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a0);
 25922:       } else {  //奇数
 25923:         int d0 = (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRbz (a0);
 25924:         M68kException.m6eFSLW ^= M68kException.M6E_FSLW_IOMA_FIRST ^ M68kException.M6E_FSLW_IOMA_SECOND;
 25925:         int a1 = mmuTranslateReadUserData (a + 1);  //偶数
 25926:         return (d0 << 8 |
 25927:                 (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a1 >>> XEiJ.BUS_PAGE_BITS].mmdRbz (a1));
 25928:       }
 25929:     }
 25930:   }  //mmuReadWordZeroData(int,int)
 25931: 
 25932:   //d = mmuReadWordSignEven (a, supervisor)
 25933:   //  リードワード符号拡張(偶数)
 25934:   public static int mmuReadWordSignEven (int a, int supervisor) throws M68kException {
 25935:     if (supervisor != 0) {  //スーパーバイザモード
 25936:       M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_READ | M68kException.M6E_FSLW_SIZE_WORD | M68kException.M6E_FSLW_TM_SUPER_DATA;
 25937:       a = mmuTranslateReadSuperData (a);
 25938:       return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a >>> XEiJ.BUS_PAGE_BITS].mmdRws (a);
 25939:     } else {  //ユーザモード
 25940:       M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_READ | M68kException.M6E_FSLW_SIZE_WORD | M68kException.M6E_FSLW_TM_USER_DATA;
 25941:       a = mmuTranslateReadUserData (a);
 25942:       return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a >>> XEiJ.BUS_PAGE_BITS].mmdRws (a);
 25943:     }
 25944:   }  //mmuReadWordSignEven(int,int)
 25945: 
 25946:   //d = mmuReadWordZeroEven (a, supervisor)
 25947:   //  リードワードゼロ拡張(偶数)
 25948:   public static int mmuReadWordZeroEven (int a, int supervisor) throws M68kException {
 25949:     if (supervisor != 0) {  //スーパーバイザモード
 25950:       M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_READ | M68kException.M6E_FSLW_SIZE_WORD | M68kException.M6E_FSLW_TM_SUPER_DATA;
 25951:       a = mmuTranslateReadSuperData (a);
 25952:       return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a);
 25953:     } else {  //ユーザモード
 25954:       M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_READ | M68kException.M6E_FSLW_SIZE_WORD | M68kException.M6E_FSLW_TM_USER_DATA;
 25955:       a = mmuTranslateReadUserData (a);
 25956:       return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a);
 25957:     }
 25958:   }  //mmuReadWordZeroEven(int,int)
 25959: 
 25960:   //d = mmuReadWordSignExword (a, supervisor)
 25961:   //  リードワード符号拡張(拡張ワード)
 25962:   public static int mmuReadWordSignExword (int a, int supervisor) throws M68kException {
 25963:     if (supervisor != 0) {  //スーパーバイザモード
 25964:       M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_EXWORD | M68kException.M6E_FSLW_RW_READ | M68kException.M6E_FSLW_SIZE_WORD | M68kException.M6E_FSLW_TM_SUPER_CODE;
 25965:       a = mmuTranslateReadSuperCode (a);
 25966:       return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a >>> XEiJ.BUS_PAGE_BITS].mmdRws (a);
 25967:     } else {  //ユーザモード
 25968:       M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_EXWORD | M68kException.M6E_FSLW_RW_READ | M68kException.M6E_FSLW_SIZE_WORD | M68kException.M6E_FSLW_TM_USER_CODE;
 25969:       a = mmuTranslateReadUserCode (a);
 25970:       return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a >>> XEiJ.BUS_PAGE_BITS].mmdRws (a);
 25971:     }
 25972:   }  //mmuReadWordSignExword(int,int)
 25973: 
 25974:   //d = mmuReadWordZeroExword (a, supervisor)
 25975:   //  リードワードゼロ拡張(拡張ワード)
 25976:   public static int mmuReadWordZeroExword (int a, int supervisor) throws M68kException {
 25977:     if (supervisor != 0) {  //スーパーバイザモード
 25978:       M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_EXWORD | M68kException.M6E_FSLW_RW_READ | M68kException.M6E_FSLW_SIZE_WORD | M68kException.M6E_FSLW_TM_SUPER_CODE;
 25979:       a = mmuTranslateReadSuperCode (a);
 25980:       return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a);
 25981:     } else {  //ユーザモード
 25982:       M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_EXWORD | M68kException.M6E_FSLW_RW_READ | M68kException.M6E_FSLW_SIZE_WORD | M68kException.M6E_FSLW_TM_USER_CODE;
 25983:       a = mmuTranslateReadUserCode (a);
 25984:       return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a);
 25985:     }
 25986:   }  //mmuReadWordZeroExword(int,int)
 25987: 
 25988:   //d = mmuReadWordSignOpword (a, supervisor)
 25989:   //  リードワード符号拡張(命令ワード)
 25990:   public static int mmuReadWordSignOpword (int a, int supervisor) throws M68kException {
 25991:     if (supervisor != 0) {  //スーパーバイザモード
 25992:       M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_OPWORD | M68kException.M6E_FSLW_RW_READ | M68kException.M6E_FSLW_SIZE_WORD | M68kException.M6E_FSLW_TM_SUPER_CODE;
 25993:       a = mmuTranslateReadSuperCode (a);
 25994:       return (InstructionBreakPoint.IBP_ON ? InstructionBreakPoint.ibpOp1SuperMap : DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a >>> XEiJ.BUS_PAGE_BITS].mmdRws (a);
 25995:     } else {  //ユーザモード
 25996:       M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_OPWORD | M68kException.M6E_FSLW_RW_READ | M68kException.M6E_FSLW_SIZE_WORD | M68kException.M6E_FSLW_TM_USER_CODE;
 25997:       a = mmuTranslateReadUserCode (a);
 25998:       return (InstructionBreakPoint.IBP_ON ? InstructionBreakPoint.ibpOp1UserMap : DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a >>> XEiJ.BUS_PAGE_BITS].mmdRws (a);
 25999:     }
 26000:   }  //mmuReadWordSignOpword(int,int)
 26001: 
 26002:   //d = mmuReadWordZeroOpword (a, supervisor)
 26003:   //  リードワードゼロ拡張(命令ワード)
 26004:   public static int mmuReadWordZeroOpword (int a, int supervisor) throws M68kException {
 26005:     if (supervisor != 0) {  //スーパーバイザモード
 26006:       M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_OPWORD | M68kException.M6E_FSLW_RW_READ | M68kException.M6E_FSLW_SIZE_WORD | M68kException.M6E_FSLW_TM_SUPER_CODE;
 26007:       a = mmuTranslateReadSuperCode (a);
 26008:       return (InstructionBreakPoint.IBP_ON ? InstructionBreakPoint.ibpOp1SuperMap : DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a);
 26009:     } else {  //ユーザモード
 26010:       M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_OPWORD | M68kException.M6E_FSLW_RW_READ | M68kException.M6E_FSLW_SIZE_WORD | M68kException.M6E_FSLW_TM_USER_CODE;
 26011:       a = mmuTranslateReadUserCode (a);
 26012:       return (InstructionBreakPoint.IBP_ON ? InstructionBreakPoint.ibpOp1UserMap : DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a);
 26013:     }
 26014:   }  //mmuReadWordZeroOpword(int,int)
 26015: 
 26016:   //d = mmuReadLongData (a, supervisor)
 26017:   //  リードロング(データ)
 26018:   public static int mmuReadLongData (int a, int supervisor) throws M68kException {
 26019:     if (supervisor != 0) {  //スーパーバイザモード
 26020:       M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_READ | M68kException.M6E_FSLW_SIZE_LONG | M68kException.M6E_FSLW_TM_SUPER_DATA;
 26021:       int a0 = mmuTranslateReadSuperData (a);  //a+1,a+2,a+3が必要なので上書き不可
 26022:       if ((a & 3) == 0) {  //4の倍数
 26023:         return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRls (a0);
 26024:       } else if ((a & 1) == 0) {  //4の倍数+2
 26025:         int d0 = (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRws (a0);
 26026:         M68kException.m6eFSLW ^= M68kException.M6E_FSLW_IOMA_FIRST ^ M68kException.M6E_FSLW_IOMA_SECOND;
 26027:         int a2 = mmuTranslateReadSuperData (a + 2);  //偶数
 26028:         return (d0 << 16 |
 26029:                 (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a2 >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a2));
 26030:       } else {  //奇数
 26031:         int d0 = (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRbs (a0);
 26032:         M68kException.m6eFSLW ^= M68kException.M6E_FSLW_IOMA_FIRST ^ M68kException.M6E_FSLW_IOMA_SECOND;
 26033:         int a1 = mmuTranslateReadSuperData (a + 1);  //偶数
 26034:         int a3 = mmuTranslateReadSuperData (a + 3);  //偶数
 26035:         return (d0 << 24 |
 26036:                 (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a1 >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a1) << 8 |
 26037:                 (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a3 >>> XEiJ.BUS_PAGE_BITS].mmdRbz (a3));
 26038:       }
 26039:     } else {  //ユーザモード
 26040:       M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_READ | M68kException.M6E_FSLW_SIZE_LONG | M68kException.M6E_FSLW_TM_USER_DATA;
 26041:       int a0 = mmuTranslateReadUserData (a);  //a+1,a+2,a+3が必要なので上書き不可
 26042:       if ((a & 3) == 0) {  //4の倍数
 26043:         return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRls (a0);
 26044:       } else if ((a & 1) == 0) {  //4の倍数+2
 26045:         int d0 = (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRws (a0);
 26046:         M68kException.m6eFSLW ^= M68kException.M6E_FSLW_IOMA_FIRST ^ M68kException.M6E_FSLW_IOMA_SECOND;
 26047:         int a2 = mmuTranslateReadUserData (a + 2);  //偶数
 26048:         return (d0 << 16 |
 26049:                 (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a2 >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a2));
 26050:       } else {  //奇数
 26051:         int d0 = (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRbs (a0);
 26052:         M68kException.m6eFSLW ^= M68kException.M6E_FSLW_IOMA_FIRST ^ M68kException.M6E_FSLW_IOMA_SECOND;
 26053:         int a1 = mmuTranslateReadUserData (a + 1);  //偶数
 26054:         int a3 = mmuTranslateReadUserData (a + 3);  //偶数
 26055:         return (d0 << 24 |
 26056:                 (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a1 >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a1) << 8 |
 26057:                 (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a3 >>> XEiJ.BUS_PAGE_BITS].mmdRbz (a3));
 26058:       }
 26059:     }
 26060:   }  //mmuReadLongData(int,int)
 26061: 
 26062:   //d = mmuReadLongEven (a, supervisor)
 26063:   //  リードロング(偶数)
 26064:   public static int mmuReadLongEven (int a, int supervisor) throws M68kException {
 26065:     if (supervisor != 0) {  //スーパーバイザモード
 26066:       M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_READ | M68kException.M6E_FSLW_SIZE_LONG | M68kException.M6E_FSLW_TM_SUPER_DATA;
 26067:       int a0 = mmuTranslateReadSuperData (a);  //a+2が必要なので上書き不可
 26068:       if ((a & 2) == 0) {  //4の倍数
 26069:         return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRls (a0);
 26070:       } else {  //4の倍数+2
 26071:         int d0 = (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRws (a0);
 26072:         M68kException.m6eFSLW ^= M68kException.M6E_FSLW_IOMA_FIRST ^ M68kException.M6E_FSLW_IOMA_SECOND;
 26073:         int a2 = mmuTranslateReadSuperData (a + 2);  //偶数
 26074:         return (d0 << 16 |
 26075:                 (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a2 >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a2));
 26076:       }
 26077:     } else {  //ユーザモード
 26078:       M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_READ | M68kException.M6E_FSLW_SIZE_LONG | M68kException.M6E_FSLW_TM_USER_DATA;
 26079:       int a0 = mmuTranslateReadUserData (a);  //a+2が必要なので上書き不可
 26080:       if ((a & 2) == 0) {  //4の倍数
 26081:         return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRls (a0);
 26082:       } else {  //4の倍数+2
 26083:         int d0 = (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRws (a0);
 26084:         M68kException.m6eFSLW ^= M68kException.M6E_FSLW_IOMA_FIRST ^ M68kException.M6E_FSLW_IOMA_SECOND;
 26085:         int a2 = mmuTranslateReadUserData (a + 2);  //偶数
 26086:         return (d0 << 16 |
 26087:                 (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a2 >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a2));
 26088:       }
 26089:     }
 26090:   }  //mmuReadLongEven(int,int)
 26091: 
 26092:   //d = mmuReadLongExword (a, supervisor)
 26093:   //  リードロング(拡張ワード)
 26094:   public static int mmuReadLongExword (int a, int supervisor) throws M68kException {
 26095:     if (supervisor != 0) {  //スーパーバイザモード
 26096:       M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_EXWORD | M68kException.M6E_FSLW_RW_READ | M68kException.M6E_FSLW_SIZE_LONG | M68kException.M6E_FSLW_TM_SUPER_CODE;
 26097:       int a0 = mmuTranslateReadSuperData (a);  //a+2が必要なので上書き不可
 26098:       if ((a & 2) == 0) {  //4の倍数
 26099:         return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRls (a0);
 26100:       } else {  //4の倍数+2
 26101:         int a2 = mmuTranslateReadSuperData (a + 2);  //偶数
 26102:         return ((DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRws (a0) << 16 |
 26103:                 (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a2 >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a2));
 26104:       }
 26105:     } else {  //ユーザモード
 26106:       M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_EXWORD | M68kException.M6E_FSLW_RW_READ | M68kException.M6E_FSLW_SIZE_LONG | M68kException.M6E_FSLW_TM_USER_CODE;
 26107:       int a0 = mmuTranslateReadUserData (a);  //a+2が必要なので上書き不可
 26108:       if ((a & 2) == 0) {  //4の倍数
 26109:         return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRls (a0);
 26110:       } else {  //4の倍数+2
 26111:         int a2 = mmuTranslateReadUserData (a + 2);  //偶数
 26112:         return ((DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRws (a0) << 16 |
 26113:                 (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a2 >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a2));
 26114:       }
 26115:     }
 26116:   }  //mmuReadLongExword(int,int)
 26117: 
 26118:   //d = mmuReadLongFour (a, supervisor)
 26119:   //  リードロング(4の倍数)
 26120:   public static int mmuReadLongFour (int a, int supervisor) throws M68kException {
 26121:     if (supervisor != 0) {  //スーパーバイザモード
 26122:       M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_READ | M68kException.M6E_FSLW_SIZE_LONG | M68kException.M6E_FSLW_TM_SUPER_DATA;
 26123:       a = mmuTranslateReadSuperData (a);
 26124:       return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a >>> XEiJ.BUS_PAGE_BITS].mmdRls (a);
 26125:     } else {  //ユーザモード
 26126:       M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_READ | M68kException.M6E_FSLW_SIZE_LONG | M68kException.M6E_FSLW_TM_USER_DATA;
 26127:       a = mmuTranslateReadUserData (a);
 26128:       return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a >>> XEiJ.BUS_PAGE_BITS].mmdRls (a);
 26129:     }
 26130:   }  //mmuReadLongFour(int,int)
 26131: 
 26132:   //l = mmuReadQuadData (a, supervisor)
 26133:   //  リードクワッド(データ)
 26134:   public static long mmuReadQuadData (int a, int supervisor) throws M68kException {
 26135:     if (supervisor != 0) {  //スーパーバイザモード
 26136:       M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_READ | M68kException.M6E_FSLW_SIZE_QUAD | M68kException.M6E_FSLW_TM_SUPER_DATA;
 26137:       int a0 = mmuTranslateReadSuperData (a);  //a+1,a+2,a+3,a+4,a+5,a+6,a+7が必要なので上書き不可
 26138:       if ((a & 3) == 0) {  //4の倍数
 26139:         int a4 = mmuTranslateReadSuperData (a + 4);  //4の倍数
 26140:         return ((long) (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRls (a0) << 32 |
 26141:                 (long) (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a4 >>> XEiJ.BUS_PAGE_BITS].mmdRls (a4) & 0x00000000ffffffffL);
 26142:       } else if ((a & 1) == 0) {  //4の倍数+2
 26143:         int d0 = (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRws (a0);
 26144:         M68kException.m6eFSLW ^= M68kException.M6E_FSLW_IOMA_FIRST ^ M68kException.M6E_FSLW_IOMA_SECOND;
 26145:         int a2 = mmuTranslateReadSuperData (a + 2);  //4の倍数
 26146:         int a6 = mmuTranslateReadSuperData (a + 6);  //4の倍数
 26147:         return ((long) d0 << 48 |
 26148:                 (long) (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a2 >>> XEiJ.BUS_PAGE_BITS].mmdRls (a2) << 16 & 0x0000ffffffff0000L |
 26149:                 (long) (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a6 >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a6));
 26150:       } else if ((a & 3) == 1) {  //4の倍数+1
 26151:         int d0 = (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRbs (a0);
 26152:         M68kException.m6eFSLW ^= M68kException.M6E_FSLW_IOMA_FIRST ^ M68kException.M6E_FSLW_IOMA_SECOND;
 26153:         int a1 = mmuTranslateReadSuperData (a + 1);  //4の倍数+2
 26154:         int a3 = mmuTranslateReadSuperData (a + 3);  //4の倍数
 26155:         int a7 = mmuTranslateReadSuperData (a + 7);  //4の倍数
 26156:         return ((long) d0 << 56 |
 26157:                 (long) (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a1 >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a1) << 40 |
 26158:                 (long) (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a3 >>> XEiJ.BUS_PAGE_BITS].mmdRls (a3) << 8 & 0x000000ffffffff00L |
 26159:                 (long) (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a7 >>> XEiJ.BUS_PAGE_BITS].mmdRbz (a7));
 26160:       } else {  //  //4の倍数+3
 26161:         int d0 = (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRbs (a0);
 26162:         M68kException.m6eFSLW ^= M68kException.M6E_FSLW_IOMA_FIRST ^ M68kException.M6E_FSLW_IOMA_SECOND;
 26163:         int a1 = mmuTranslateReadSuperData (a + 1);  //4の倍数
 26164:         int a5 = mmuTranslateReadSuperData (a + 5);  //4の倍数
 26165:         int a7 = mmuTranslateReadSuperData (a + 7);  //4の倍数+2
 26166:         return ((long) d0 << 56 |
 26167:                 (long) (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a1 >>> XEiJ.BUS_PAGE_BITS].mmdRls (a1) << 24 & 0x00ffffffff000000L |
 26168:                 (long) (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a5 >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a5) << 8 |
 26169:                 (long) (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a7 >>> XEiJ.BUS_PAGE_BITS].mmdRbz (a7));
 26170:       }
 26171:     } else {  //ユーザモード
 26172:       M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_READ | M68kException.M6E_FSLW_SIZE_QUAD | M68kException.M6E_FSLW_TM_USER_DATA;
 26173:       int a0 = mmuTranslateReadUserData (a);  //a+1,a+2,a+3,a+4,a+5,a+6,a+7が必要なので上書き不可
 26174:       if ((a & 3) == 0) {  //4の倍数
 26175:         int a4 = mmuTranslateReadUserData (a + 4);  //4の倍数
 26176:         return ((long) (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRls (a0) << 32 |
 26177:                 (long) (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a4 >>> XEiJ.BUS_PAGE_BITS].mmdRls (a4) & 0x00000000ffffffffL);
 26178:       } else if ((a & 1) == 0) {  //4の倍数+2
 26179:         int d0 = (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRws (a0);
 26180:         M68kException.m6eFSLW ^= M68kException.M6E_FSLW_IOMA_FIRST ^ M68kException.M6E_FSLW_IOMA_SECOND;
 26181:         int a2 = mmuTranslateReadUserData (a + 2);  //4の倍数
 26182:         int a6 = mmuTranslateReadUserData (a + 6);  //4の倍数
 26183:         return ((long) d0 << 48 |
 26184:                 (long) (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a2 >>> XEiJ.BUS_PAGE_BITS].mmdRls (a2) << 16 & 0x0000ffffffff0000L |
 26185:                 (long) (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a6 >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a6));
 26186:       } else if ((a & 3) == 1) {  //4の倍数+1
 26187:         int d0 = (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRbs (a0);
 26188:         M68kException.m6eFSLW ^= M68kException.M6E_FSLW_IOMA_FIRST ^ M68kException.M6E_FSLW_IOMA_SECOND;
 26189:         int a1 = mmuTranslateReadUserData (a + 1);  //4の倍数+2
 26190:         int a3 = mmuTranslateReadUserData (a + 3);  //4の倍数
 26191:         int a7 = mmuTranslateReadUserData (a + 7);  //4の倍数
 26192:         return ((long) d0 << 56 |
 26193:                 (long) (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a1 >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a1) << 40 |
 26194:                 (long) (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a3 >>> XEiJ.BUS_PAGE_BITS].mmdRls (a3) << 8 & 0x000000ffffffff00L |
 26195:                 (long) (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a7 >>> XEiJ.BUS_PAGE_BITS].mmdRbz (a7));
 26196:       } else {  //  //4の倍数+3
 26197:         int d0 = (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRbs (a0);
 26198:         M68kException.m6eFSLW ^= M68kException.M6E_FSLW_IOMA_FIRST ^ M68kException.M6E_FSLW_IOMA_SECOND;
 26199:         int a1 = mmuTranslateReadUserData (a + 1);  //4の倍数
 26200:         int a5 = mmuTranslateReadUserData (a + 5);  //4の倍数
 26201:         int a7 = mmuTranslateReadUserData (a + 7);  //4の倍数+2
 26202:         return ((long) d0 << 56 |
 26203:                 (long) (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a1 >>> XEiJ.BUS_PAGE_BITS].mmdRls (a1) << 24 & 0x00ffffffff000000L |
 26204:                 (long) (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a5 >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a5) << 8 |
 26205:                 (long) (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a7 >>> XEiJ.BUS_PAGE_BITS].mmdRbz (a7));
 26206:       }
 26207:     }
 26208:   }  //mmuReadQuadData(int,int)
 26209: 
 26210:   //l = mmuReadQuadSecond (a, supervisor)
 26211:   //  リードクワッド(2番目)
 26212:   //  エクステンデッドとラインの2番目で使う
 26213:   public static long mmuReadQuadSecond (int a, int supervisor) throws M68kException {
 26214:     if (supervisor != 0) {  //スーパーバイザモード
 26215:       M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_SECOND | M68kException.M6E_FSLW_RW_READ | M68kException.M6E_FSLW_SIZE_QUAD | M68kException.M6E_FSLW_TM_SUPER_DATA;
 26216:       int a0 = mmuTranslateReadSuperData (a);  //a+1,a+2,a+3,a+4,a+5,a+6,a+7が必要なので上書き不可
 26217:       if ((a & 3) == 0) {  //4の倍数
 26218:         int a4 = mmuTranslateReadSuperData (a + 4);  //4の倍数
 26219:         return ((long) (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRls (a0) << 32 |
 26220:                 (long) (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a4 >>> XEiJ.BUS_PAGE_BITS].mmdRls (a4) & 0x00000000ffffffffL);
 26221:       } else if ((a & 1) == 0) {  //4の倍数+2
 26222:         int a2 = mmuTranslateReadSuperData (a + 2);  //4の倍数
 26223:         int a6 = mmuTranslateReadSuperData (a + 6);  //4の倍数
 26224:         return ((long) (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRws (a0) << 48 |
 26225:                 (long) (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a2 >>> XEiJ.BUS_PAGE_BITS].mmdRls (a2) << 16 & 0x0000ffffffff0000L |
 26226:                 (long) (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a6 >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a6));
 26227:       } else if ((a & 3) == 1) {  //4の倍数+1
 26228:         int a1 = mmuTranslateReadSuperData (a + 1);  //4の倍数+2
 26229:         int a3 = mmuTranslateReadSuperData (a + 3);  //4の倍数
 26230:         int a7 = mmuTranslateReadSuperData (a + 7);  //4の倍数
 26231:         return ((long) (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRbs (a0) << 56 |
 26232:                 (long) (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a1 >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a1) << 40 |
 26233:                 (long) (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a3 >>> XEiJ.BUS_PAGE_BITS].mmdRls (a3) << 8 & 0x000000ffffffff00L |
 26234:                 (long) (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a7 >>> XEiJ.BUS_PAGE_BITS].mmdRbz (a7));
 26235:       } else {  //  //4の倍数+3
 26236:         int a1 = mmuTranslateReadSuperData (a + 1);  //4の倍数
 26237:         int a5 = mmuTranslateReadSuperData (a + 5);  //4の倍数
 26238:         int a7 = mmuTranslateReadSuperData (a + 7);  //4の倍数+2
 26239:         return ((long) (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRbs (a0) << 56 |
 26240:                 (long) (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a1 >>> XEiJ.BUS_PAGE_BITS].mmdRls (a1) << 24 & 0x00ffffffff000000L |
 26241:                 (long) (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a5 >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a5) << 8 |
 26242:                 (long) (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a7 >>> XEiJ.BUS_PAGE_BITS].mmdRbz (a7));
 26243:       }
 26244:     } else {  //ユーザモード
 26245:       M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_SECOND | M68kException.M6E_FSLW_RW_READ | M68kException.M6E_FSLW_SIZE_QUAD | M68kException.M6E_FSLW_TM_USER_DATA;
 26246:       int a0 = mmuTranslateReadUserData (a);  //a+1,a+2,a+3,a+4,a+5,a+6,a+7が必要なので上書き不可
 26247:       if ((a & 3) == 0) {  //4の倍数
 26248:         int a4 = mmuTranslateReadUserData (a + 4);  //4の倍数
 26249:         return ((long) (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRls (a0) << 32 |
 26250:                 (long) (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a4 >>> XEiJ.BUS_PAGE_BITS].mmdRls (a4) & 0x00000000ffffffffL);
 26251:       } else if ((a & 1) == 0) {  //4の倍数+2
 26252:         int a2 = mmuTranslateReadUserData (a + 2);  //4の倍数
 26253:         int a6 = mmuTranslateReadUserData (a + 6);  //4の倍数
 26254:         return ((long) (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRws (a0) << 48 |
 26255:                 (long) (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a2 >>> XEiJ.BUS_PAGE_BITS].mmdRls (a2) << 16 & 0x0000ffffffff0000L |
 26256:                 (long) (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a6 >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a6));
 26257:       } else if ((a & 3) == 1) {  //4の倍数+1
 26258:         int a1 = mmuTranslateReadUserData (a + 1);  //4の倍数+2
 26259:         int a3 = mmuTranslateReadUserData (a + 3);  //4の倍数
 26260:         int a7 = mmuTranslateReadUserData (a + 7);  //4の倍数
 26261:         return ((long) (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRbs (a0) << 56 |
 26262:                 (long) (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a1 >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a1) << 40 |
 26263:                 (long) (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a3 >>> XEiJ.BUS_PAGE_BITS].mmdRls (a3) << 8 & 0x000000ffffffff00L |
 26264:                 (long) (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a7 >>> XEiJ.BUS_PAGE_BITS].mmdRbz (a7));
 26265:       } else {  //  //4の倍数+3
 26266:         int a1 = mmuTranslateReadUserData (a + 1);  //4の倍数
 26267:         int a5 = mmuTranslateReadUserData (a + 5);  //4の倍数
 26268:         int a7 = mmuTranslateReadUserData (a + 7);  //4の倍数+2
 26269:         return ((long) (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRbs (a0) << 56 |
 26270:                 (long) (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a1 >>> XEiJ.BUS_PAGE_BITS].mmdRls (a1) << 24 & 0x00ffffffff000000L |
 26271:                 (long) (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a5 >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a5) << 8 |
 26272:                 (long) (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a7 >>> XEiJ.BUS_PAGE_BITS].mmdRbz (a7));
 26273:       }
 26274:     }
 26275:   }  //mmuReadQuadSecond(int,int)
 26276: 
 26277:   //l = mmuReadQuadExword (a, supervisor)
 26278:   //  リードクワッド(拡張ワード)
 26279:   //  イミディエイトで使う
 26280:   public static long mmuReadQuadExword (int a, int supervisor) throws M68kException {
 26281:     if (supervisor != 0) {  //スーパーバイザモード
 26282:       M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_EXWORD | M68kException.M6E_FSLW_RW_READ | M68kException.M6E_FSLW_SIZE_QUAD | M68kException.M6E_FSLW_TM_SUPER_CODE;
 26283:       int a0 = mmuTranslateReadSuperData (a);  //a+2,a+4,a+6が必要なので上書き不可
 26284:       if ((a & 2) == 0) {  //4の倍数
 26285:         int a4 = mmuTranslateReadSuperData (a + 4);  //4の倍数
 26286:         return ((long) (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRls (a0) << 32 |
 26287:                 (long) (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a4 >>> XEiJ.BUS_PAGE_BITS].mmdRls (a4) & 0x00000000ffffffffL);
 26288:       } else {  //4の倍数+2
 26289:         int a2 = mmuTranslateReadSuperData (a + 2);  //4の倍数
 26290:         int a6 = mmuTranslateReadSuperData (a + 6);  //4の倍数
 26291:         return ((long) (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRws (a0) << 48 |
 26292:                 (long) (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a2 >>> XEiJ.BUS_PAGE_BITS].mmdRls (a2) << 16 & 0x0000ffffffff0000L |
 26293:                 (long) (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a6 >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a6));
 26294:       }
 26295:     } else {  //ユーザモード
 26296:       M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_EXWORD | M68kException.M6E_FSLW_RW_READ | M68kException.M6E_FSLW_SIZE_QUAD | M68kException.M6E_FSLW_TM_USER_CODE;
 26297:       int a0 = mmuTranslateReadUserData (a);  //a+2,a+4,a+6が必要なので上書き不可
 26298:       if ((a & 2) == 0) {  //4の倍数
 26299:         int a4 = mmuTranslateReadUserData (a + 4);  //4の倍数
 26300:         return ((long) (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRls (a0) << 32 |
 26301:                 (long) (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a4 >>> XEiJ.BUS_PAGE_BITS].mmdRls (a4) & 0x00000000ffffffffL);
 26302:       } else {  //4の倍数+2
 26303:         int a2 = mmuTranslateReadUserData (a + 2);  //4の倍数
 26304:         int a6 = mmuTranslateReadUserData (a + 6);  //4の倍数
 26305:         return ((long) (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRws (a0) << 48 |
 26306:                 (long) (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a2 >>> XEiJ.BUS_PAGE_BITS].mmdRls (a2) << 16 & 0x0000ffffffff0000L |
 26307:                 (long) (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a6 >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a6));
 26308:       }
 26309:     }
 26310:   }  //mmuReadQuadExword(int,int)
 26311: 
 26312:   //mmuReadByteArray (address, array, offset, length, supervisor)
 26313:   //  リードバイト配列
 26314:   public static void mmuReadByteArray (int address, byte[] array, int offset, int length, int supervisor) throws M68kException {
 26315:     if (false) {  //1バイトずつアドレス変換する
 26316:       for (int index = 0; index < length; index++) {
 26317:         array[offset + index] = mmuReadByteSignData (address + index, supervisor);
 26318:       }
 26319:     } else {  //1ページずつアドレス変換する
 26320:       int pageSize = Math.min (XEiJ.BUS_PAGE_SIZE, mmuPageSize);
 26321:       if (supervisor != 0) {  //スーパーバイザモード
 26322:         if (false) {  //1バイトずつ転送する
 26323:           M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_READ | M68kException.M6E_FSLW_SIZE_BYTE | M68kException.M6E_FSLW_TM_SUPER_DATA;
 26324:         }
 26325:         MemoryMappedDevice[] mm = DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap;
 26326:         while (0 < length) {
 26327:           int l = Math.min (pageSize - (address & (pageSize - 1)), length);  //今回転送する長さ
 26328:           int t = mmuTranslateReadSuperData (address);
 26329:           MemoryMappedDevice d = mm[t >>> XEiJ.BUS_PAGE_BITS];
 26330:           if (false) {  //1バイトずつ転送する
 26331:             for (int i = 0; i < l; i++) {
 26332:               array[offset + i] = d.mmdRbs (t + i);
 26333:             }
 26334:           } else {  //4バイトずつ転送する。ウェイトサイクルを減らす
 26335:             int o = offset;
 26336:             int z = t + l;
 26337:             if ((t & 1) != 0 && t < z) {  //2n+1で残り1以上。1バイト転送する
 26338:               M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_READ | M68kException.M6E_FSLW_SIZE_BYTE | M68kException.M6E_FSLW_TM_SUPER_DATA;
 26339:               array[o++] = d.mmdRbs (t++);
 26340:             }
 26341:             if ((t & 2) != 0 && t + 1 < z) {  //4n+2で残り2以上。2バイト転送する
 26342:               M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_READ | M68kException.M6E_FSLW_SIZE_WORD | M68kException.M6E_FSLW_TM_SUPER_DATA;
 26343:               int x = d.mmdRws (t);
 26344:               array[o    ] = (byte) (x >> 8);
 26345:               array[o + 1] = (byte)  x;
 26346:               t += 2;
 26347:               o += 2;
 26348:             }
 26349:             if (t + 3 < z) {  //4nで残り4以上。4バイトずつ転送する
 26350:               M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_READ | M68kException.M6E_FSLW_SIZE_LONG | M68kException.M6E_FSLW_TM_SUPER_DATA;
 26351:               do {
 26352:                 int x = d.mmdRls (t);
 26353:                 array[o    ] = (byte) (x >> 24);
 26354:                 array[o + 1] = (byte) (x >> 16);
 26355:                 array[o + 2] = (byte) (x >>  8);
 26356:                 array[o + 3] = (byte)  x;
 26357:                 t += 4;
 26358:                 o += 4;
 26359:               } while (t + 3 < z);
 26360:             }
 26361:             if (t + 1 < z) {  //4nで残り2または3。2バイト転送する
 26362:               M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_READ | M68kException.M6E_FSLW_SIZE_WORD | M68kException.M6E_FSLW_TM_SUPER_DATA;
 26363:               int x = d.mmdRws (t);
 26364:               array[o    ] = (byte) (x >> 8);
 26365:               array[o + 1] = (byte)  x;
 26366:               t += 2;
 26367:               o += 2;
 26368:             }
 26369:             if (t < z) {  //4nで残り1。1バイト転送する
 26370:               M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_READ | M68kException.M6E_FSLW_SIZE_BYTE | M68kException.M6E_FSLW_TM_SUPER_DATA;
 26371:               array[o++] = d.mmdRbs (t++);
 26372:             }
 26373:           }  //if 1バイトずつ/4バイトずつ
 26374:           address += l;
 26375:           offset += l;
 26376:           length -= l;
 26377:         }  //while 0<length
 26378:       } else {  //ユーザモード
 26379:         if (false) {  //1バイトずつ転送する
 26380:           M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_READ | M68kException.M6E_FSLW_SIZE_BYTE | M68kException.M6E_FSLW_TM_USER_DATA;
 26381:         }
 26382:         MemoryMappedDevice[] mm = DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap;
 26383:         while (0 < length) {
 26384:           int l = Math.min (pageSize - (address & (pageSize - 1)), length);  //今回転送する長さ
 26385:           int t = mmuTranslateReadUserData (address);
 26386:           MemoryMappedDevice d = mm[t >>> XEiJ.BUS_PAGE_BITS];
 26387:           if (false) {  //1バイトずつ転送する
 26388:             for (int i = 0; i < l; i++) {
 26389:               array[offset + i] = d.mmdRbs (t + i);
 26390:             }
 26391:           } else {  //4バイトずつ転送する。ウェイトサイクルを減らす
 26392:             int o = offset;
 26393:             int z = t + l;
 26394:             if ((t & 1) != 0 && t < z) {  //2n+1で残り1以上。1バイト転送する
 26395:               M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_READ | M68kException.M6E_FSLW_SIZE_BYTE | M68kException.M6E_FSLW_TM_USER_DATA;
 26396:               array[o++] = d.mmdRbs (t++);
 26397:             }
 26398:             if ((t & 2) != 0 && t + 1 < z) {  //4n+2で残り2以上。2バイト転送する
 26399:               M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_READ | M68kException.M6E_FSLW_SIZE_WORD | M68kException.M6E_FSLW_TM_USER_DATA;
 26400:               int x = d.mmdRws (t);
 26401:               array[o    ] = (byte) (x >> 8);
 26402:               array[o + 1] = (byte)  x;
 26403:               t += 2;
 26404:               o += 2;
 26405:             }
 26406:             if (t + 3 < z) {  //4nで残り4以上。4バイトずつ転送する
 26407:               M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_READ | M68kException.M6E_FSLW_SIZE_LONG | M68kException.M6E_FSLW_TM_USER_DATA;
 26408:               do {
 26409:                 int x = d.mmdRls (t);
 26410:                 array[o    ] = (byte) (x >> 24);
 26411:                 array[o + 1] = (byte) (x >> 16);
 26412:                 array[o + 2] = (byte) (x >>  8);
 26413:                 array[o + 3] = (byte)  x;
 26414:                 t += 4;
 26415:                 o += 4;
 26416:               } while (t + 3 < z);
 26417:             }
 26418:             if (t + 1 < z) {  //4nで残り2または3。2バイト転送する
 26419:               M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_READ | M68kException.M6E_FSLW_SIZE_WORD | M68kException.M6E_FSLW_TM_USER_DATA;
 26420:               int x = d.mmdRws (t);
 26421:               array[o    ] = (byte) (x >> 8);
 26422:               array[o + 1] = (byte)  x;
 26423:               t += 2;
 26424:               o += 2;
 26425:             }
 26426:             if (t < z) {  //4nで残り1。1バイト転送する
 26427:               M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_READ | M68kException.M6E_FSLW_SIZE_BYTE | M68kException.M6E_FSLW_TM_USER_DATA;
 26428:               array[o++] = d.mmdRbs (t++);
 26429:             }
 26430:           }  //if 1バイトずつ/4バイトずつ
 26431:           address += l;
 26432:           offset += l;
 26433:           length -= l;
 26434:         }  //while 0<length
 26435:       }  //if スーパーバイザモード/ユーザモード
 26436:     }  //if 1バイトずつ/1ページずつ
 26437:   }  //mmuReadByteArray(int,byte[],int,int,int)
 26438: 
 26439:   //--------------------------------------------------------------------------------
 26440:   //リードモディファイライトのリード
 26441:   //  アドレス変換はライト
 26442:   //  FSLWのRead and WriteはRead-Modify-Write
 26443: 
 26444:   //d = mmuModifyByteSignData (a, supervisor)
 26445:   //  リードモディファイライトのリードバイト符号拡張(データ)
 26446:   public static byte mmuModifyByteSignData (int a, int supervisor) throws M68kException {
 26447:     if (supervisor != 0) {  //スーパーバイザモード
 26448:       M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_MODIFY | M68kException.M6E_FSLW_SIZE_BYTE | M68kException.M6E_FSLW_TM_SUPER_DATA;
 26449:       int a0 = mmuTranslateWriteSuperData (a);
 26450:       return (a ^ a0) == 1 ? -1 : (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRbs (a0);
 26451:     } else {  //ユーザモード
 26452:       M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_MODIFY | M68kException.M6E_FSLW_SIZE_BYTE | M68kException.M6E_FSLW_TM_USER_DATA;
 26453:       int a0 = mmuTranslateWriteUserData (a);
 26454:       return (a ^ a0) == 1 ? -1 : (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRbs (a0);
 26455:     }
 26456:   }  //mmuModifyByteSignData(int,int)
 26457: 
 26458:   //d = mmuModifyByteZeroData (a, supervisor)
 26459:   //  リードモディファイライトのリードバイトゼロ拡張(データ)
 26460:   public static int mmuModifyByteZeroData (int a, int supervisor) throws M68kException {
 26461:     if (supervisor != 0) {  //スーパーバイザモード
 26462:       M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_MODIFY | M68kException.M6E_FSLW_SIZE_BYTE | M68kException.M6E_FSLW_TM_SUPER_DATA;
 26463:       int a0 = mmuTranslateWriteSuperData (a);
 26464:       return (a ^ a0) == 1 ? 255 : (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRbz (a0);
 26465:     } else {  //ユーザモード
 26466:       M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_MODIFY | M68kException.M6E_FSLW_SIZE_BYTE | M68kException.M6E_FSLW_TM_USER_DATA;
 26467:       int a0 = mmuTranslateWriteUserData (a);
 26468:       return (a ^ a0) == 1 ? 255 : (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRbz (a0);
 26469:     }
 26470:   }  //mmuModifyByteZeroData(int,int)
 26471: 
 26472:   //d = mmuModifyWordSignData (a, supervisor)
 26473:   //  リードモディファイライトのリードワード符号拡張(データ)
 26474:   public static int mmuModifyWordSignData (int a, int supervisor) throws M68kException {
 26475:     if (supervisor != 0) {  //スーパーバイザモード
 26476:       M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_MODIFY | M68kException.M6E_FSLW_SIZE_WORD | M68kException.M6E_FSLW_TM_SUPER_DATA;
 26477:       int a0 = mmuTranslateWriteSuperData (a);  //a+1が必要なので上書き不可
 26478:       if ((a & 1) == 0) {  //偶数
 26479:         return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRws (a0);
 26480:       } else {  //奇数
 26481:         int d0 = (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRbs (a0);
 26482:         M68kException.m6eFSLW ^= M68kException.M6E_FSLW_IOMA_FIRST ^ M68kException.M6E_FSLW_IOMA_SECOND;
 26483:         int a1 = mmuTranslateWriteSuperData (a + 1);  //偶数
 26484:         return (d0 << 8 |
 26485:                 (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a1 >>> XEiJ.BUS_PAGE_BITS].mmdRbz (a1));
 26486:       }
 26487:     } else {  //ユーザモード
 26488:       M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_MODIFY | M68kException.M6E_FSLW_SIZE_WORD | M68kException.M6E_FSLW_TM_USER_DATA;
 26489:       int a0 = mmuTranslateWriteUserData (a);  //a+1が必要なので上書き不可
 26490:       if ((a & 1) == 0) {  //偶数
 26491:         return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRws (a0);
 26492:       } else {  //奇数
 26493:         int d0 = (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRbs (a0);
 26494:         M68kException.m6eFSLW ^= M68kException.M6E_FSLW_IOMA_FIRST ^ M68kException.M6E_FSLW_IOMA_SECOND;
 26495:         int a1 = mmuTranslateWriteUserData (a + 1);  //偶数
 26496:         return (d0 << 8 |
 26497:                 (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a1 >>> XEiJ.BUS_PAGE_BITS].mmdRbz (a1));
 26498:       }
 26499:     }
 26500:   }  //mmuModifyWordSignData(int,int)
 26501: 
 26502:   //d = mmuModifyWordZeroData (a, supervisor)
 26503:   //  リードモディファイライトのリードワードゼロ拡張(データ)
 26504:   public static int mmuModifyWordZeroData (int a, int supervisor) throws M68kException {
 26505:     if (supervisor != 0) {  //スーパーバイザモード
 26506:       M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_MODIFY | M68kException.M6E_FSLW_SIZE_WORD | M68kException.M6E_FSLW_TM_SUPER_DATA;
 26507:       int a0 = mmuTranslateWriteSuperData (a);  //a+1が必要なので上書き不可
 26508:       if ((a & 1) == 0) {  //偶数
 26509:         return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a0);
 26510:       } else {  //奇数
 26511:         int d0 = (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRbz (a0);
 26512:         M68kException.m6eFSLW ^= M68kException.M6E_FSLW_IOMA_FIRST ^ M68kException.M6E_FSLW_IOMA_SECOND;
 26513:         int a1 = mmuTranslateWriteSuperData (a + 1);  //偶数
 26514:         return (d0 << 8 |
 26515:                 (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a1 >>> XEiJ.BUS_PAGE_BITS].mmdRbz (a1));
 26516:       }
 26517:     } else {  //ユーザモード
 26518:       M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_MODIFY | M68kException.M6E_FSLW_SIZE_WORD | M68kException.M6E_FSLW_TM_USER_DATA;
 26519:       int a0 = mmuTranslateWriteUserData (a);  //a+1が必要なので上書き不可
 26520:       if ((a & 1) == 0) {  //偶数
 26521:         return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a0);
 26522:       } else {  //奇数
 26523:         int d0 = (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRbz (a0);
 26524:         M68kException.m6eFSLW ^= M68kException.M6E_FSLW_IOMA_FIRST ^ M68kException.M6E_FSLW_IOMA_SECOND;
 26525:         int a1 = mmuTranslateWriteUserData (a + 1);  //偶数
 26526:         return (d0 << 8 |
 26527:                 (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a1 >>> XEiJ.BUS_PAGE_BITS].mmdRbz (a1));
 26528:       }
 26529:     }
 26530:   }  //mmuModifyWordZeroData(int,int)
 26531: 
 26532:   //d = mmuModifyWordSignEven (a, supervisor)
 26533:   //  リードモディファイライトのリードワード符号拡張(偶数)
 26534:   public static int mmuModifyWordSignEven (int a, int supervisor) throws M68kException {
 26535:     if (supervisor != 0) {  //スーパーバイザモード
 26536:       M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_MODIFY | M68kException.M6E_FSLW_SIZE_WORD | M68kException.M6E_FSLW_TM_SUPER_DATA;
 26537:       a = mmuTranslateWriteSuperData (a);
 26538:       return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a >>> XEiJ.BUS_PAGE_BITS].mmdRws (a);
 26539:     } else {  //ユーザモード
 26540:       M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_MODIFY | M68kException.M6E_FSLW_SIZE_WORD | M68kException.M6E_FSLW_TM_USER_DATA;
 26541:       a = mmuTranslateWriteUserData (a);
 26542:       return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a >>> XEiJ.BUS_PAGE_BITS].mmdRws (a);
 26543:     }
 26544:   }  //mmuModifyWordSignEven(int,int)
 26545: 
 26546:   //d = mmuModifyWordZeroEven (a, supervisor)
 26547:   //  リードモディファイライトのリードワードゼロ拡張(偶数)
 26548:   public static int mmuModifyWordZeroEven (int a, int supervisor) throws M68kException {
 26549:     if (supervisor != 0) {  //スーパーバイザモード
 26550:       M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_MODIFY | M68kException.M6E_FSLW_SIZE_WORD | M68kException.M6E_FSLW_TM_SUPER_DATA;
 26551:       a = mmuTranslateWriteSuperData (a);
 26552:       return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a);
 26553:     } else {  //ユーザモード
 26554:       M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_MODIFY | M68kException.M6E_FSLW_SIZE_WORD | M68kException.M6E_FSLW_TM_USER_DATA;
 26555:       a = mmuTranslateWriteUserData (a);
 26556:       return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a);
 26557:     }
 26558:   }  //mmuModifyWordZeroEven(int,int)
 26559: 
 26560:   //d = mmuModifyLongData (a, supervisor)
 26561:   //  リードモディファイライトのリードロング(データ)
 26562:   public static int mmuModifyLongData (int a, int supervisor) throws M68kException {
 26563:     if (supervisor != 0) {  //スーパーバイザモード
 26564:       M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_MODIFY | M68kException.M6E_FSLW_SIZE_LONG | M68kException.M6E_FSLW_TM_SUPER_DATA;
 26565:       int a0 = mmuTranslateWriteSuperData (a);  //a+1,a+2,a+3が必要なので上書き不可
 26566:       if ((a & 3) == 0) {  //4の倍数
 26567:         return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRls (a0);
 26568:       } else if ((a & 1) == 0) {  //4の倍数+2
 26569:         int d0 = (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRws (a0);
 26570:         M68kException.m6eFSLW ^= M68kException.M6E_FSLW_IOMA_FIRST ^ M68kException.M6E_FSLW_IOMA_SECOND;
 26571:         int a2 = mmuTranslateWriteSuperData (a + 2);  //偶数
 26572:         return (d0 << 16 |
 26573:                 (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a2 >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a2));
 26574:       } else {  //奇数
 26575:         int d0 = (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRbs (a0);
 26576:         M68kException.m6eFSLW ^= M68kException.M6E_FSLW_IOMA_FIRST ^ M68kException.M6E_FSLW_IOMA_SECOND;
 26577:         int a1 = mmuTranslateWriteSuperData (a + 1);  //偶数
 26578:         int a3 = mmuTranslateWriteSuperData (a + 3);  //偶数
 26579:         return (d0 << 24 |
 26580:                 (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a1 >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a1) << 8 |
 26581:                 (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a3 >>> XEiJ.BUS_PAGE_BITS].mmdRbz (a3));
 26582:       }
 26583:     } else {  //ユーザモード
 26584:       M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_MODIFY | M68kException.M6E_FSLW_SIZE_LONG | M68kException.M6E_FSLW_TM_USER_DATA;
 26585:       int a0 = mmuTranslateWriteUserData (a);  //a+1,a+2,a+3が必要なので上書き不可
 26586:       if ((a & 3) == 0) {  //4の倍数
 26587:         return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRls (a0);
 26588:       } else if ((a & 1) == 0) {  //4の倍数+2
 26589:         int d0 = (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRws (a0);
 26590:         M68kException.m6eFSLW ^= M68kException.M6E_FSLW_IOMA_FIRST ^ M68kException.M6E_FSLW_IOMA_SECOND;
 26591:         int a2 = mmuTranslateWriteUserData (a + 2);  //偶数
 26592:         return (d0 << 16 |
 26593:                 (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a2 >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a2));
 26594:       } else {  //奇数
 26595:         int d0 = (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRbs (a0);
 26596:         M68kException.m6eFSLW ^= M68kException.M6E_FSLW_IOMA_FIRST ^ M68kException.M6E_FSLW_IOMA_SECOND;
 26597:         int a1 = mmuTranslateWriteUserData (a + 1);  //偶数
 26598:         int a3 = mmuTranslateWriteUserData (a + 3);  //偶数
 26599:         return (d0 << 24 |
 26600:                 (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a1 >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a1) << 8 |
 26601:                 (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a3 >>> XEiJ.BUS_PAGE_BITS].mmdRbz (a3));
 26602:       }
 26603:     }
 26604:   }  //mmuModifyLongData(int,int)
 26605: 
 26606:   //d = mmuModifyLongEven (a, supervisor)
 26607:   //  リードモディファイライトのリードロング(偶数)
 26608:   public static int mmuModifyLongEven (int a, int supervisor) throws M68kException {
 26609:     if (supervisor != 0) {  //スーパーバイザモード
 26610:       M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_MODIFY | M68kException.M6E_FSLW_SIZE_LONG | M68kException.M6E_FSLW_TM_SUPER_DATA;
 26611:       int a0 = mmuTranslateWriteSuperData (a);  //a+2が必要なので上書き不可
 26612:       if ((a & 2) == 0) {  //4の倍数
 26613:         return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRls (a0);
 26614:       } else {  //4の倍数+2
 26615:         int d0 = (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRws (a0);
 26616:         M68kException.m6eFSLW ^= M68kException.M6E_FSLW_IOMA_FIRST ^ M68kException.M6E_FSLW_IOMA_SECOND;
 26617:         int a2 = mmuTranslateWriteSuperData (a + 2);  //偶数
 26618:         return (d0 << 16 |
 26619:                 (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a2 >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a2));
 26620:       }
 26621:     } else {  //ユーザモード
 26622:       M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_MODIFY | M68kException.M6E_FSLW_SIZE_LONG | M68kException.M6E_FSLW_TM_USER_DATA;
 26623:       int a0 = mmuTranslateWriteUserData (a);  //a+2が必要なので上書き不可
 26624:       if ((a & 2) == 0) {  //4の倍数
 26625:         return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRls (a0);
 26626:       } else {  //4の倍数+2
 26627:         int d0 = (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRws (a0);
 26628:         M68kException.m6eFSLW ^= M68kException.M6E_FSLW_IOMA_FIRST ^ M68kException.M6E_FSLW_IOMA_SECOND;
 26629:         int a2 = mmuTranslateWriteUserData (a + 2);  //偶数
 26630:         return (d0 << 16 |
 26631:                 (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a2 >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a2));
 26632:       }
 26633:     }
 26634:   }  //mmuModifyLongEven(int,int)
 26635: 
 26636:   //d = mmuModifyLongFour (a, supervisor)
 26637:   //  リードモディファイライトのリードロング(4の倍数)
 26638:   public static int mmuModifyLongFour (int a, int supervisor) throws M68kException {
 26639:     if (supervisor != 0) {  //スーパーバイザモード
 26640:       M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_MODIFY | M68kException.M6E_FSLW_SIZE_LONG | M68kException.M6E_FSLW_TM_SUPER_DATA;
 26641:       a = mmuTranslateWriteSuperData (a);
 26642:       return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a >>> XEiJ.BUS_PAGE_BITS].mmdRls (a);
 26643:     } else {  //ユーザモード
 26644:       M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_MODIFY | M68kException.M6E_FSLW_SIZE_LONG | M68kException.M6E_FSLW_TM_USER_DATA;
 26645:       a = mmuTranslateWriteUserData (a);
 26646:       return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a >>> XEiJ.BUS_PAGE_BITS].mmdRls (a);
 26647:     }
 26648:   }  //mmuModifyLongFour(int,int)
 26649: 
 26650:   //--------------------------------------------------------------------------------
 26651:   //ポーク
 26652:   //  デバッガ用
 26653:   //  エラーや副作用なしでライトする
 26654: 
 26655:   //mmuPokeByte (a, x, f)
 26656:   //  ポークバイト
 26657:   public static void mmuPokeByte (int a, int x, int f) {
 26658:     f = f == -1 ? XEiJ.regSRS != 0 ? 5 : 1 : f & 7;
 26659:     MemoryMappedDevice[] mm = (DataBreakPoint.DBP_ON ?
 26660:                                (f & 4) != 0 ? DataBreakPoint.dbpSuperMap : DataBreakPoint.dbpUserMap :
 26661:                                (f & 4) != 0 ? XEiJ.busSuperMap : XEiJ.busUserMap);
 26662:     //    01234567
 26663:     if (0b01100110 << 24 << f < 0) {  //DFC=1,2,5,6。アドレス変換あり
 26664:       int a0 = mmuTranslatePeek (a, f & 4, f & 2);
 26665:       if ((a ^ a0) != 1) {
 26666:         mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdVb (a0, x);
 26667:       }
 26668:     } else if (f != 7) {  //DFC=0,3,4。アドレス変換なし
 26669:       mm[a >>> XEiJ.BUS_PAGE_BITS].mmdVb (a, x);
 26670:     }
 26671:   }  //mmuPokeByte(int,int,int)
 26672: 
 26673:   //mmuPokeByteData (a, d, supervisor)
 26674:   //  ポークバイト(データ)
 26675:   public static void mmuPokeByteData (int a, int d, int supervisor) {
 26676:     MemoryMappedDevice[] mm = supervisor != 0 ? DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap : DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap;
 26677:     int a0 = mmuTranslatePeek (a, supervisor, 0);
 26678:     if ((a ^ a0) != 1) {
 26679:       //mm[a >>> XEiJ.BUS_PAGE_BITS].mmdVb (a0, d);
 26680:       XEiJ.busVb (a0, d);
 26681:     }
 26682:   }  //mmuPokeByteData(int,int,int)
 26683: 
 26684:   //mmuPokeWord (a, x, f)
 26685:   //  ポークワード
 26686:   public static void mmuPokeWord (int a, int x, int f) {
 26687:     f = f == -1 ? XEiJ.regSRS != 0 ? 5 : 1 : f & 7;
 26688:     MemoryMappedDevice[] mm = (DataBreakPoint.DBP_ON ?
 26689:                                (f & 4) != 0 ? DataBreakPoint.dbpSuperMap : DataBreakPoint.dbpUserMap :
 26690:                                (f & 4) != 0 ? XEiJ.busSuperMap : XEiJ.busUserMap);
 26691:     //    01234567
 26692:     if (0b01100110 << 24 << f < 0) {  //DFC=1,2,5,6。アドレス変換あり
 26693:       int a0 = mmuTranslatePeek (a, f & 4, f & 2);
 26694:       if ((a & 1) == 0) {  //偶数
 26695:         if ((a ^ a0) != 1) {
 26696:           mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdVw (a0, x);
 26697:         }
 26698:       } else {  //奇数
 26699:         int a1 = mmuTranslatePeek (a + 1, f & 4, f & 2);
 26700:         if ((a     ^ a0) != 1) {
 26701:           mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdVb (a0, x >> 8);
 26702:         }
 26703:         if ((a + 1 ^ a1) != 1) {
 26704:           mm[a1 >>> XEiJ.BUS_PAGE_BITS].mmdVb (a1, x     );
 26705:         }
 26706:       }
 26707:     } else if (f != 7) {  //DFC=0,3,4。アドレス変換なし
 26708:       if ((a & 1) == 0) {  //偶数
 26709:         mm[a >>> XEiJ.BUS_PAGE_BITS].mmdVw (a, x);
 26710:       } else {  //奇数
 26711:         mm[a     >>> XEiJ.BUS_PAGE_BITS].mmdVb (a    , x >> 8);
 26712:         mm[a + 1 >>> XEiJ.BUS_PAGE_BITS].mmdVb (a + 1, x     );
 26713:       }
 26714:     }
 26715:   }  //mmuPokeWord(int,int,int)
 26716: 
 26717:   //mmuPokeWordData (a, d, supervisor)
 26718:   //  ポークワード(データ)
 26719:   public static void mmuPokeWordData (int a, int d, int supervisor) {
 26720:     mmuPokeByteData (a, d >> 8, supervisor);
 26721:     mmuPokeByteData (a + 1, d, supervisor);
 26722:   }  //mmuPokeWordData(int,int,int)
 26723: 
 26724:   //mmuPokeLong (a, x, f)
 26725:   //  ポークロング
 26726:   public static void mmuPokeLong (int a, int x, int f) {
 26727:     f = f == -1 ? XEiJ.regSRS != 0 ? 5 : 1 : f & 7;
 26728:     MemoryMappedDevice[] mm = (DataBreakPoint.DBP_ON ?
 26729:                                (f & 4) != 0 ? DataBreakPoint.dbpSuperMap : DataBreakPoint.dbpUserMap :
 26730:                                (f & 4) != 0 ? XEiJ.busSuperMap : XEiJ.busUserMap);
 26731:     //    01234567
 26732:     if (0b01100110 << 24 << f < 0) {  //DFC=1,2,5,6。アドレス変換あり
 26733:       int a0 = mmuTranslatePeek (a, f & 4, f & 2);
 26734:       if ((a & 3) == 0) {  //4の倍数
 26735:         if ((a ^ a0) != 1) {
 26736:           mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdVl (a0, x);
 26737:         }
 26738:       } else if ((a & 1) == 0) {  //4の倍数ではない偶数
 26739:         int a2 = mmuTranslatePeek (a + 2, f & 4, f & 2);
 26740:         if ((a     ^ a0) != 1) {
 26741:           mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdVw (a0, x >> 16);
 26742:         }
 26743:         if ((a + 2 ^ a2) != 1) {
 26744:           mm[a2 >>> XEiJ.BUS_PAGE_BITS].mmdVw (a2, x);
 26745:         }
 26746:       } else {  //奇数
 26747:         int a1 = mmuTranslatePeek (a + 1, f & 4, f & 2);
 26748:         int a3 = mmuTranslatePeek (a + 3, f & 4, f & 2);
 26749:         if ((a     ^ a0) != 1) {
 26750:           mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdVb (a0, x >> 24);
 26751:         }
 26752:         if ((a + 1 ^ a1) != 1) {
 26753:           mm[a1 >>> XEiJ.BUS_PAGE_BITS].mmdVw (a1, x >>  8);
 26754:         }
 26755:         if ((a + 3 ^ a3) != 1) {
 26756:           mm[a3 >>> XEiJ.BUS_PAGE_BITS].mmdVb (a3, x);
 26757:         }
 26758:       }
 26759:     } else if (f != 7) {  //DFC=0,3,4。アドレス変換なし
 26760:       if ((a & 3) == 0) {  //4の倍数
 26761:         mm[a >>> XEiJ.BUS_PAGE_BITS].mmdVl (a, x);
 26762:       } else if ((a & 1) == 0) {  //4の倍数ではない偶数
 26763:         mm[a     >>> XEiJ.BUS_PAGE_BITS].mmdVw (a    , x >> 16);
 26764:         mm[a + 2 >>> XEiJ.BUS_PAGE_BITS].mmdVw (a + 2, x      );
 26765:       } else {  //奇数
 26766:         mm[a     >>> XEiJ.BUS_PAGE_BITS].mmdVb (a,     x >> 24);
 26767:         mm[a + 1 >>> XEiJ.BUS_PAGE_BITS].mmdVw (a + 1, x >>  8);
 26768:         mm[a + 3 >>> XEiJ.BUS_PAGE_BITS].mmdVb (a + 3, x      );
 26769:       }
 26770:     }
 26771:   }  //mmuPokeLong(int,int,int)
 26772: 
 26773:   //mmuPokeLongData (a, d, supervisor)
 26774:   //  ポークロング(データ)
 26775:   public static void mmuPokeLongData (int a, int d, int supervisor) {
 26776:     mmuPokeByteData (a, d >> 24, supervisor);
 26777:     mmuPokeByteData (a + 1, d >> 16, supervisor);
 26778:     mmuPokeByteData (a + 2, d >> 8, supervisor);
 26779:     mmuPokeByteData (a + 3, d, supervisor);
 26780:   }  //mmuPokeLongData(int,int,int)
 26781: 
 26782:   //mmuPokeQuad (a, x, f)
 26783:   //  ポーククワッド
 26784:   public static void mmuPokeQuad (int a, long x, int f) {
 26785:     mmuPokeLong (a    , (int) (x >> 32), f);
 26786:     mmuPokeLong (a + 4, (int)  x       , f);
 26787:   }  //mmuPokeQuad(int,long,int)
 26788: 
 26789:   //mmuPokeExtended (a, b, f)
 26790:   public static void mmuPokeExtended (int a, byte[] b, int f) {
 26791:     for (int i = 0; i < 12; i++) {
 26792:       mmuPokeByte (a + i, b[i], f);
 26793:     }
 26794:   }  //mmuPokeQuad(int,long,int)
 26795: 
 26796:   //a = mmuPokeStringZ (a, str, f)
 26797:   //  ポークストリング
 26798:   //  文字列をUTF-16からSJISに変換しながらメモリに書き込む
 26799:   //  文字列に'\0'が含まれるときはその手前まで書き込む
 26800:   //  SJISに変換できない文字は'※'になる
 26801:   //  最後に'\0'を書き込む
 26802:   //  '\0'を含まない書き込んだ文字列を返す
 26803:   public static String mmuPokeStringZ (int a, String str, int f) {
 26804:     StringBuilder sb = new StringBuilder ();
 26805:     int l = str.length ();
 26806:     for (int i = 0; i < l; i++) {
 26807:       int u = str.charAt (i);
 26808:       if (u == '\0') {
 26809:         break;
 26810:       }
 26811:       int s = CharacterCode.chrCharToSJIS[u];  //SJISに変換する
 26812:       if (s == 0) {  //変換できない
 26813:         s = 0x81a6;  //'※'
 26814:       }
 26815:       if (s >> 8 != 0) {
 26816:         mmuPokeByte (a++, s >> 8, f);
 26817:       }
 26818:       mmuPokeByte (a++, s, f);
 26819:       u = CharacterCode.chrSJISToChar[s];  //UTF-16に変換する
 26820:       if (u == 0) {  //変換できない
 26821:         u = 0xfffd;
 26822:       }
 26823:       sb.append ((char) u);
 26824:     }
 26825:     mmuPokeByte (a, 0, f);  //'\0'
 26826:     return sb.toString ();
 26827:   }  //mmuPokeStringZ(int,String,int)
 26828: 
 26829:   //--------------------------------------------------------------------------------
 26830:   //ライト
 26831:   //  アドレス変換はライト
 26832:   //  FSLWのRead and WriteはWrite
 26833: 
 26834:   //mmuWriteByteData (a, d, supervisor)
 26835:   //  ライトバイト符号拡張(データ)
 26836:   public static void mmuWriteByteData (int a, int d, int supervisor) throws M68kException {
 26837:     if (supervisor != 0) {  //スーパーバイザモード
 26838:       M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_WRITE | M68kException.M6E_FSLW_SIZE_BYTE | M68kException.M6E_FSLW_TM_SUPER_DATA;
 26839:       int t = mmuTranslateWriteSuperData (a);
 26840:       (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWb (t, d);
 26841:     } else {  //ユーザモード
 26842:       M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_WRITE | M68kException.M6E_FSLW_SIZE_BYTE | M68kException.M6E_FSLW_TM_USER_DATA;
 26843:       int t = mmuTranslateWriteUserData (a);
 26844:       (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWb (t, d);
 26845:     }
 26846:   }  //mmuWriteByteData(int,int,int)
 26847: 
 26848:   //mmuWriteWordData (a, d, supervisor)
 26849:   //  ライトワード符号拡張(データ)
 26850:   public static void mmuWriteWordData (int a, int d, int supervisor) throws M68kException {
 26851:     if (supervisor != 0) {  //スーパーバイザモード
 26852:       M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_WRITE | M68kException.M6E_FSLW_SIZE_WORD | M68kException.M6E_FSLW_TM_SUPER_DATA;
 26853:       int t = mmuTranslateWriteSuperData (a);  //a+1が必要なので上書き不可
 26854:       if ((a & 1) == 0) {  //偶数
 26855:         (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWw (t, d);
 26856:       } else {  //奇数
 26857:         (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWb (t, d >> 8);
 26858:         M68kException.m6eFSLW ^= M68kException.M6E_FSLW_IOMA_FIRST ^ M68kException.M6E_FSLW_IOMA_SECOND;
 26859:         t = mmuTranslateWriteSuperData (a + 1);  //偶数
 26860:         (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWb (t, d);
 26861:       }
 26862:     } else {  //ユーザモード
 26863:       M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_WRITE | M68kException.M6E_FSLW_SIZE_WORD | M68kException.M6E_FSLW_TM_USER_DATA;
 26864:       int t = mmuTranslateWriteUserData (a);  //a+1が必要なので上書き不可
 26865:       if ((a & 1) == 0) {  //偶数
 26866:         (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWw (t, d);
 26867:       } else {  //奇数
 26868:         (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWb (t, d >> 8);
 26869:         M68kException.m6eFSLW ^= M68kException.M6E_FSLW_IOMA_FIRST ^ M68kException.M6E_FSLW_IOMA_SECOND;
 26870:         t = mmuTranslateWriteUserData (a + 1);  //偶数
 26871:         (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWb (t, d);
 26872:       }
 26873:     }
 26874:   }  //mmuWriteWordData(int,int,int)
 26875: 
 26876:   //mmuWriteWordEven (a, d, supervisor)
 26877:   //  ライトワード符号拡張(偶数)
 26878:   public static void mmuWriteWordEven (int a, int d, int supervisor) throws M68kException {
 26879:     if (supervisor != 0) {  //スーパーバイザモード
 26880:       M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_WRITE | M68kException.M6E_FSLW_SIZE_WORD | M68kException.M6E_FSLW_TM_SUPER_DATA;
 26881:       a = mmuTranslateWriteSuperData (a);
 26882:       (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a >>> XEiJ.BUS_PAGE_BITS].mmdWw (a, d);
 26883:     } else {  //ユーザモード
 26884:       M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_WRITE | M68kException.M6E_FSLW_SIZE_WORD | M68kException.M6E_FSLW_TM_USER_DATA;
 26885:       a = mmuTranslateWriteUserData (a);
 26886:       (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a >>> XEiJ.BUS_PAGE_BITS].mmdWw (a, d);
 26887:     }
 26888:   }  //mmuWriteWordEven(int,int,int)
 26889: 
 26890:   //mmuWriteLongData (a, d, supervisor)
 26891:   //  ライトロング(データ)
 26892:   public static void mmuWriteLongData (int a, int d, int supervisor) throws M68kException {
 26893:     if (supervisor != 0) {  //スーパーバイザモード
 26894:       M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_WRITE | M68kException.M6E_FSLW_SIZE_LONG | M68kException.M6E_FSLW_TM_SUPER_DATA;
 26895:       int t = mmuTranslateWriteSuperData (a);  //a+1,a+2,a+3が必要なので上書き不可
 26896:       if ((a & 3) == 0) {  //4の倍数
 26897:         (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWl (t, d);
 26898:       } else if ((a & 1) == 0) {  //4の倍数+2
 26899:         (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWw (t, d >> 16);
 26900:         M68kException.m6eFSLW ^= M68kException.M6E_FSLW_IOMA_FIRST ^ M68kException.M6E_FSLW_IOMA_SECOND;
 26901:         t = mmuTranslateWriteSuperData (a + 2);  //偶数
 26902:         (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWw (t, d);
 26903:       } else {  //奇数
 26904:         (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWb (t, d >> 24);
 26905:         M68kException.m6eFSLW ^= M68kException.M6E_FSLW_IOMA_FIRST ^ M68kException.M6E_FSLW_IOMA_SECOND;
 26906:         t = mmuTranslateWriteSuperData (a + 1);  //偶数
 26907:         (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWw (t, d >> 8);
 26908:         t = mmuTranslateWriteSuperData (a + 3);  //偶数
 26909:         (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWb (t, d);
 26910:       }
 26911:     } else {  //ユーザモード
 26912:       M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_WRITE | M68kException.M6E_FSLW_SIZE_LONG | M68kException.M6E_FSLW_TM_USER_DATA;
 26913:       int t = mmuTranslateWriteUserData (a);  //a+1,a+2,a+3が必要なので上書き不可
 26914:       if ((a & 3) == 0) {  //4の倍数
 26915:         (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWl (t, d);
 26916:       } else if ((a & 1) == 0) {  //4の倍数+2
 26917:         (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWw (t, d >> 16);
 26918:         M68kException.m6eFSLW ^= M68kException.M6E_FSLW_IOMA_FIRST ^ M68kException.M6E_FSLW_IOMA_SECOND;
 26919:         t = mmuTranslateWriteUserData (a + 2);  //偶数
 26920:         (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWw (t, d);
 26921:       } else {  //奇数
 26922:         (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWb (t, d >> 24);
 26923:         M68kException.m6eFSLW ^= M68kException.M6E_FSLW_IOMA_FIRST ^ M68kException.M6E_FSLW_IOMA_SECOND;
 26924:         t = mmuTranslateWriteUserData (a + 1);  //偶数
 26925:         (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWw (t, d >> 8);
 26926:         t = mmuTranslateWriteUserData (a + 3);  //偶数
 26927:         (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWb (t, d);
 26928:       }
 26929:     }
 26930:   }  //mmuWriteLongData(int,int,int)
 26931: 
 26932:   //mmuWriteLongEven (a, d, supervisor)
 26933:   //  ライトロング(偶数)
 26934:   public static void mmuWriteLongEven (int a, int d, int supervisor) throws M68kException {
 26935:     if (supervisor != 0) {  //スーパーバイザモード
 26936:       M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_WRITE | M68kException.M6E_FSLW_SIZE_LONG | M68kException.M6E_FSLW_TM_SUPER_DATA;
 26937:       int t = mmuTranslateWriteSuperData (a);  //a+2が必要なので上書き不可
 26938:       if ((a & 2) == 0) {  //4の倍数
 26939:         (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWl (t, d);
 26940:       } else {  //4の倍数+2
 26941:         (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWw (t, d >> 16);
 26942:         M68kException.m6eFSLW ^= M68kException.M6E_FSLW_IOMA_FIRST ^ M68kException.M6E_FSLW_IOMA_SECOND;
 26943:         t = mmuTranslateWriteSuperData (a + 2);  //偶数
 26944:         (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWw (t, d);
 26945:       }
 26946:     } else {  //ユーザモード
 26947:       M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_WRITE | M68kException.M6E_FSLW_SIZE_LONG | M68kException.M6E_FSLW_TM_USER_DATA;
 26948:       int t = mmuTranslateWriteUserData (a);  //a+2が必要なので上書き不可
 26949:       if ((a & 2) == 0) {  //4の倍数
 26950:         (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWl (t, d);
 26951:       } else {  //4の倍数+2
 26952:         (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWw (t, d >> 16);
 26953:         M68kException.m6eFSLW ^= M68kException.M6E_FSLW_IOMA_FIRST ^ M68kException.M6E_FSLW_IOMA_SECOND;
 26954:         t = mmuTranslateWriteUserData (a + 2);  //偶数
 26955:         (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWw (t, d);
 26956:       }
 26957:     }
 26958:   }  //mmuWriteLongEven(int,int,int)
 26959: 
 26960:   //mmuWriteLongFour (a, d, supervisor)
 26961:   //  ライトロング(4の倍数)
 26962:   public static void mmuWriteLongFour (int a, int d, int supervisor) throws M68kException {
 26963:     if (supervisor != 0) {  //スーパーバイザモード
 26964:       M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_WRITE | M68kException.M6E_FSLW_SIZE_LONG | M68kException.M6E_FSLW_TM_SUPER_DATA;
 26965:       a = mmuTranslateWriteSuperData (a);
 26966:       (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a >>> XEiJ.BUS_PAGE_BITS].mmdWl (a, d);
 26967:     } else {  //ユーザモード
 26968:       M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_WRITE | M68kException.M6E_FSLW_SIZE_LONG | M68kException.M6E_FSLW_TM_USER_DATA;
 26969:       a = mmuTranslateWriteUserData (a);
 26970:       (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a >>> XEiJ.BUS_PAGE_BITS].mmdWl (a, d);
 26971:     }
 26972:   }  //mmuWriteLongFour(int,int,int)
 26973: 
 26974:   //mmuWriteQuadData (a, d, supervisor)
 26975:   //  ライトクワッド(データ)
 26976:   public static void mmuWriteQuadData (int a, long d, int supervisor) throws M68kException {
 26977:     if (supervisor != 0) {  //スーパーバイザモード
 26978:       M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_WRITE | M68kException.M6E_FSLW_SIZE_QUAD | M68kException.M6E_FSLW_TM_SUPER_DATA;
 26979:       int t = mmuTranslateWriteSuperData (a);  //a+1,a+2,a+3,a+4,a+5,a+6,a+7が必要なので上書き不可
 26980:       if ((a & 3) == 0) {  //4の倍数
 26981:         (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWl (t, (int) (d >> 32));
 26982:         t = mmuTranslateWriteSuperData (a + 4);  //4の倍数
 26983:         (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWl (t, (int) d);
 26984:       } else if ((a & 1) == 0) {  //4の倍数+2
 26985:         (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWw (t, (int) (d >> 48));
 26986:         M68kException.m6eFSLW ^= M68kException.M6E_FSLW_IOMA_FIRST ^ M68kException.M6E_FSLW_IOMA_SECOND;
 26987:         t = mmuTranslateWriteSuperData (a + 2);  //4の倍数
 26988:         (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWl (t, (int) (d >> 16));
 26989:         t = mmuTranslateWriteSuperData (a + 6);  //4の倍数
 26990:         (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWw (t, (int) d);
 26991:       } else if ((a & 3) == 1) {  //4の倍数+1
 26992:         (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWb (t, (int) (d >> 56));
 26993:         M68kException.m6eFSLW ^= M68kException.M6E_FSLW_IOMA_FIRST ^ M68kException.M6E_FSLW_IOMA_SECOND;
 26994:         t = mmuTranslateWriteSuperData (a + 1);  //4の倍数+2
 26995:         (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWw (t, (int) (d >> 40));
 26996:         t = mmuTranslateWriteSuperData (a + 3);  //4の倍数
 26997:         (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWl (t, (int) (d >> 8));
 26998:         t = mmuTranslateWriteSuperData (a + 7);  //4の倍数
 26999:         (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWb (t, (int) d);
 27000:       } else {  //  //4の倍数+3
 27001:         (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWb (t, (int) (d >> 56));
 27002:         M68kException.m6eFSLW ^= M68kException.M6E_FSLW_IOMA_FIRST ^ M68kException.M6E_FSLW_IOMA_SECOND;
 27003:         t = mmuTranslateWriteSuperData (a + 1);  //4の倍数
 27004:         (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWl (t, (int) (d >> 24));
 27005:         t = mmuTranslateWriteSuperData (a + 5);  //4の倍数
 27006:         (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWw (t, (int) (d >> 8));
 27007:         t = mmuTranslateWriteSuperData (a + 7);  //4の倍数+2
 27008:         (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWb (t, (int) d);
 27009:       }
 27010:     } else {  //ユーザモード
 27011:       M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_WRITE | M68kException.M6E_FSLW_SIZE_QUAD | M68kException.M6E_FSLW_TM_USER_DATA;
 27012:       int t = mmuTranslateWriteUserData (a);  //a+1,a+2,a+3,a+4,a+5,a+6,a+7が必要なので上書き不可
 27013:       if ((a & 3) == 0) {  //4の倍数
 27014:         (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWl (t, (int) (d >> 32));
 27015:         t = mmuTranslateWriteUserData (a + 4);  //4の倍数
 27016:         (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWl (t, (int) d);
 27017:       } else if ((a & 1) == 0) {  //4の倍数+2
 27018:         (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWw (t, (int) (d >> 48));
 27019:         M68kException.m6eFSLW ^= M68kException.M6E_FSLW_IOMA_FIRST ^ M68kException.M6E_FSLW_IOMA_SECOND;
 27020:         t = mmuTranslateWriteUserData (a + 2);  //4の倍数
 27021:         (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWl (t, (int) (d >> 16));
 27022:         t = mmuTranslateWriteUserData (a + 6);  //4の倍数
 27023:         (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWw (t, (int) d);
 27024:       } else if ((a & 3) == 1) {  //4の倍数+1
 27025:         (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWb (t, (int) (d >> 56));
 27026:         M68kException.m6eFSLW ^= M68kException.M6E_FSLW_IOMA_FIRST ^ M68kException.M6E_FSLW_IOMA_SECOND;
 27027:         t = mmuTranslateWriteUserData (a + 1);  //4の倍数+2
 27028:         (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWw (t, (int) (d >> 40));
 27029:         t = mmuTranslateWriteUserData (a + 3);  //4の倍数
 27030:         (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWl (t, (int) (d >> 8));
 27031:         t = mmuTranslateWriteUserData (a + 7);  //4の倍数
 27032:         (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWb (t, (int) d);
 27033:       } else {  //  //4の倍数+3
 27034:         (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWb (t, (int) (d >> 56));
 27035:         M68kException.m6eFSLW ^= M68kException.M6E_FSLW_IOMA_FIRST ^ M68kException.M6E_FSLW_IOMA_SECOND;
 27036:         t = mmuTranslateWriteUserData (a + 1);  //4の倍数
 27037:         (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWl (t, (int) (d >> 24));
 27038:         t = mmuTranslateWriteUserData (a + 5);  //4の倍数
 27039:         (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWw (t, (int) (d >> 8));
 27040:         t = mmuTranslateWriteUserData (a + 7);  //4の倍数+2
 27041:         (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWb (t, (int) d);
 27042:       }
 27043:     }
 27044:   }  //mmuWriteQuadData(int,long,int)
 27045: 
 27046:   //mmuWriteQuadSecond (a, d, supervisor)
 27047:   //  ライトクワッド(2番目)
 27048:   //  エクステンデッドとラインの2番目で使う
 27049:   public static void mmuWriteQuadSecond (int a, long d, int supervisor) throws M68kException {
 27050:     if (supervisor != 0) {  //スーパーバイザモード
 27051:       M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_SECOND | M68kException.M6E_FSLW_RW_WRITE | M68kException.M6E_FSLW_SIZE_QUAD | M68kException.M6E_FSLW_TM_SUPER_DATA;
 27052:       int t = mmuTranslateWriteSuperData (a);  //a+1,a+2,a+3,a+4,a+5,a+6,a+7が必要なので上書き不可
 27053:       if ((a & 3) == 0) {  //4の倍数
 27054:         (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWl (t, (int) (d >> 32));
 27055:         t = mmuTranslateWriteSuperData (a + 4);  //4の倍数
 27056:         (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWl (t, (int) d);
 27057:       } else if ((a & 1) == 0) {  //4の倍数+2
 27058:         (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWw (t, (int) (d >> 48));
 27059:         t = mmuTranslateWriteSuperData (a + 2);  //4の倍数
 27060:         (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWl (t, (int) (d >> 16));
 27061:         t = mmuTranslateWriteSuperData (a + 6);  //4の倍数
 27062:         (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWw (t, (int) d);
 27063:       } else if ((a & 3) == 1) {  //4の倍数+1
 27064:         (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWb (t, (int) (d >> 56));
 27065:         t = mmuTranslateWriteSuperData (a + 1);  //4の倍数+2
 27066:         (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWw (t, (int) (d >> 40));
 27067:         t = mmuTranslateWriteSuperData (a + 3);  //4の倍数
 27068:         (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWl (t, (int) (d >> 8));
 27069:         t = mmuTranslateWriteSuperData (a + 7);  //4の倍数
 27070:         (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWb (t, (int) d);
 27071:       } else {  //  //4の倍数+3
 27072:         (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWb (t, (int) (d >> 56));
 27073:         t = mmuTranslateWriteSuperData (a + 1);  //4の倍数
 27074:         (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWl (t, (int) (d >> 24));
 27075:         t = mmuTranslateWriteSuperData (a + 5);  //4の倍数
 27076:         (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWw (t, (int) (d >> 8));
 27077:         t = mmuTranslateWriteSuperData (a + 7);  //4の倍数+2
 27078:         (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWb (t, (int) d);
 27079:       }
 27080:     } else {  //ユーザモード
 27081:       M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_SECOND | M68kException.M6E_FSLW_RW_WRITE | M68kException.M6E_FSLW_SIZE_QUAD | M68kException.M6E_FSLW_TM_USER_DATA;
 27082:       int t = mmuTranslateWriteUserData (a);  //a+1,a+2,a+3,a+4,a+5,a+6,a+7が必要なので上書き不可
 27083:       if ((a & 3) == 0) {  //4の倍数
 27084:         (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWl (t, (int) (d >> 32));
 27085:         t = mmuTranslateWriteUserData (a + 4);  //4の倍数
 27086:         (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWl (t, (int) d);
 27087:       } else if ((a & 1) == 0) {  //4の倍数+2
 27088:         (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWw (t, (int) (d >> 48));
 27089:         t = mmuTranslateWriteUserData (a + 2);  //4の倍数
 27090:         (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWl (t, (int) (d >> 16));
 27091:         t = mmuTranslateWriteUserData (a + 6);  //4の倍数
 27092:         (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWw (t, (int) d);
 27093:       } else if ((a & 3) == 1) {  //4の倍数+1
 27094:         (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWb (t, (int) (d >> 56));
 27095:         t = mmuTranslateWriteUserData (a + 1);  //4の倍数+2
 27096:         (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWw (t, (int) (d >> 40));
 27097:         t = mmuTranslateWriteUserData (a + 3);  //4の倍数
 27098:         (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWl (t, (int) (d >> 8));
 27099:         t = mmuTranslateWriteUserData (a + 7);  //4の倍数
 27100:         (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWb (t, (int) d);
 27101:       } else {  //  //4の倍数+3
 27102:         (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWb (t, (int) (d >> 56));
 27103:         t = mmuTranslateWriteUserData (a + 1);  //4の倍数
 27104:         (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWl (t, (int) (d >> 24));
 27105:         t = mmuTranslateWriteUserData (a + 5);  //4の倍数
 27106:         (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWw (t, (int) (d >> 8));
 27107:         t = mmuTranslateWriteUserData (a + 7);  //4の倍数+2
 27108:         (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWb (t, (int) d);
 27109:       }
 27110:     }
 27111:   }  //mmuWriteQuadSecond(int,int,int)
 27112: 
 27113:   //mmuWriteByteArray (address, array, offset, length, supervisor)
 27114:   //  ライトバイト配列
 27115:   public static void mmuWriteByteArray (int address, byte[] array, int offset, int length, int supervisor) throws M68kException {
 27116:     if (false) {  //1バイトずつアドレス変換する
 27117:       for (int index = 0; index < length; index++) {
 27118:         mmuWriteByteData (address + index, array[offset + index], supervisor);
 27119:       }
 27120:     } else {  //1ページずつアドレス変換する
 27121:       int pageSize = Math.min (XEiJ.BUS_PAGE_SIZE, mmuPageSize);
 27122:       if (supervisor != 0) {  //スーパーバイザモード
 27123:         if (false) {  //1バイトずつ転送する
 27124:           M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_WRITE | M68kException.M6E_FSLW_SIZE_BYTE | M68kException.M6E_FSLW_TM_SUPER_DATA;
 27125:         }
 27126:         MemoryMappedDevice[] mm = DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap;
 27127:         while (0 < length) {
 27128:           int l = Math.min (pageSize - (address & (pageSize - 1)), length);  //今回転送する長さ
 27129:           int t = mmuTranslateWriteSuperData (address);
 27130:           MemoryMappedDevice d = mm[t >>> XEiJ.BUS_PAGE_BITS];
 27131:           if (false) {  //1バイトずつ転送する
 27132:             for (int i = 0; i < l; i++) {
 27133:               d.mmdWb (t + i, array[offset + i]);
 27134:             }
 27135:           } else {  //4バイトずつ転送する。ウェイトサイクルを減らす
 27136:             int o = offset;
 27137:             int z = t + l;
 27138:             if ((t & 1) != 0 && t < z) {  //2n+1で残り1以上。1バイト転送する
 27139:               M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_WRITE | M68kException.M6E_FSLW_SIZE_BYTE | M68kException.M6E_FSLW_TM_SUPER_DATA;
 27140:               d.mmdWb (t++, array[o++]);
 27141:             }
 27142:             if ((t & 2) != 0 && t + 1 < z) {  //4n+2で残り2以上。2バイト転送する
 27143:               M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_WRITE | M68kException.M6E_FSLW_SIZE_WORD | M68kException.M6E_FSLW_TM_SUPER_DATA;
 27144:               d.mmdWw (t,
 27145:                        (array[o    ]      ) <<  8 |
 27146:                        (array[o + 1] & 255));
 27147:               t += 2;
 27148:               o += 2;
 27149:             }
 27150:             if (t + 3 < z) {  //4nで残り4以上。4バイトずつ転送する
 27151:               M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_WRITE | M68kException.M6E_FSLW_SIZE_LONG | M68kException.M6E_FSLW_TM_SUPER_DATA;
 27152:               do {
 27153:                 d.mmdWl (t,
 27154:                          (array[o    ]      ) << 24 |
 27155:                          (array[o + 1] & 255) << 16 |
 27156:                          (array[o + 2] & 255) <<  8 |
 27157:                          (array[o + 3] & 255));
 27158:                 t += 4;
 27159:                 o += 4;
 27160:               } while (t + 3 < z);
 27161:             }
 27162:             if (t + 1 < z) {  //4nで残り2または3。2バイト転送する
 27163:               M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_WRITE | M68kException.M6E_FSLW_SIZE_WORD | M68kException.M6E_FSLW_TM_SUPER_DATA;
 27164:               d.mmdWw (t,
 27165:                        (array[o    ]      ) <<  8 |
 27166:                        (array[o + 1] & 255));
 27167:               t += 2;
 27168:               o += 2;
 27169:             }
 27170:             if (t < z) {  //4nで残り1。1バイト転送する
 27171:               M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_WRITE | M68kException.M6E_FSLW_SIZE_BYTE | M68kException.M6E_FSLW_TM_SUPER_DATA;
 27172:               d.mmdWb (t++, array[o++]);
 27173:             }
 27174:           }  //if 1バイトずつ/4バイトずつ
 27175:           address += l;
 27176:           offset += l;
 27177:           length -= l;
 27178:         }  //while 0<length
 27179:       } else {  //ユーザモード
 27180:         if (false) {  //1バイトずつ転送する
 27181:           M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_WRITE | M68kException.M6E_FSLW_SIZE_BYTE | M68kException.M6E_FSLW_TM_USER_DATA;
 27182:         }
 27183:         MemoryMappedDevice[] mm = DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap;
 27184:         while (0 < length) {
 27185:           int l = Math.min (pageSize - (address & (pageSize - 1)), length);  //今回転送する長さ
 27186:           int t = mmuTranslateWriteUserData (address);
 27187:           MemoryMappedDevice d = mm[t >>> XEiJ.BUS_PAGE_BITS];
 27188:           if (false) {  //1バイトずつ転送する
 27189:             for (int i = 0; i < l; i++) {
 27190:               d.mmdWb (t + i, array[offset + i]);
 27191:             }
 27192:           } else {  //4バイトずつ転送する。ウェイトサイクルを減らす
 27193:             int o = offset;
 27194:             int z = t + l;
 27195:             if ((t & 1) != 0 && t < z) {  //2n+1で残り1以上。1バイト転送する
 27196:               M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_WRITE | M68kException.M6E_FSLW_SIZE_BYTE | M68kException.M6E_FSLW_TM_USER_DATA;
 27197:               d.mmdWb (t++, array[o++]);
 27198:             }
 27199:             if ((t & 2) != 0 && t + 1 < z) {  //4n+2で残り2以上。2バイト転送する
 27200:               M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_WRITE | M68kException.M6E_FSLW_SIZE_WORD | M68kException.M6E_FSLW_TM_USER_DATA;
 27201:               d.mmdWw (t,
 27202:                        (array[o    ]      ) <<  8 |
 27203:                        (array[o + 1] & 255));
 27204:               t += 2;
 27205:               o += 2;
 27206:             }
 27207:             if (t + 3 < z) {  //4nで残り4以上。4バイトずつ転送する
 27208:               M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_WRITE | M68kException.M6E_FSLW_SIZE_LONG | M68kException.M6E_FSLW_TM_USER_DATA;
 27209:               do {
 27210:                 d.mmdWl (t,
 27211:                          (array[o    ]      ) << 24 |
 27212:                          (array[o + 1] & 255) << 16 |
 27213:                          (array[o + 2] & 255) <<  8 |
 27214:                          (array[o + 3] & 255));
 27215:                 t += 4;
 27216:                 o += 4;
 27217:               } while (t + 3 < z);
 27218:             }
 27219:             if (t + 1 < z) {  //4nで残り2または3。2バイト転送する
 27220:               M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_WRITE | M68kException.M6E_FSLW_SIZE_WORD | M68kException.M6E_FSLW_TM_USER_DATA;
 27221:               d.mmdWw (t,
 27222:                        (array[o    ]      ) <<  8 |
 27223:                        (array[o + 1] & 255));
 27224:               t += 2;
 27225:               o += 2;
 27226:             }
 27227:             if (t < z) {  //4nで残り1。1バイト転送する
 27228:               M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_WRITE | M68kException.M6E_FSLW_SIZE_BYTE | M68kException.M6E_FSLW_TM_USER_DATA;
 27229:               d.mmdWb (t++, array[o++]);
 27230:             }
 27231:           }  //if 1バイトずつ/4バイトずつ
 27232:           address += l;
 27233:           offset += l;
 27234:           length -= l;
 27235:         }  //while 0<length
 27236:       }  //if スーパーバイザモード/ユーザモード
 27237:     }  //if 1バイトずつ/1ページずつ
 27238:   }  //mmuWriteByteArray(int,byte[],int,int,int)
 27239: 
 27240:   //--------------------------------------------------------------------------------
 27241:   //アドレス変換
 27242: 
 27243:   //pa = mmuLoadPhysicalAddressRead (a)
 27244:   //  PLPAR (An)
 27245:   //  DFCに従って論理アドレスを物理アドレスに変換する(リードアクセス)
 27246:   //    DFC  1=ユーザデータ,2=ユーザ命令,5=スーパーバイザデータ,6=スーパーバイザ命令
 27247:   //    pa   物理アドレス
 27248:   //    a    論理アドレス
 27249:   public static int mmuLoadPhysicalAddressRead (int a) throws M68kException {
 27250:     M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_READ | M68kException.M6E_FSLW_SIZE_BYTE | XEiJ.mpuDFC << 16;
 27251:     return ((0b10011111 << 24 << XEiJ.mpuDFC) < 0 ?
 27252:             (0b00101010 << 24 << XEiJ.mpuDFC) < 0 ? mmuTranslateReadSuperCode (a) : mmuTranslateReadSuperData (a) :
 27253:             (0b00101010 << 24 << XEiJ.mpuDFC) < 0 ? mmuTranslateReadUserCode (a) : mmuTranslateReadUserData (a));
 27254:   }  //mmuLoadPhysicalAddressRead(int)
 27255: 
 27256:   //pa = mmuLoadPhysicalAddressWrite (a)
 27257:   //  PLPAW (An)
 27258:   //  DFCに従って論理アドレスを物理アドレスに変換する(ライトアクセス)
 27259:   //    DFC  1=ユーザデータ,2=ユーザ命令,5=スーパーバイザデータ,6=スーパーバイザ命令
 27260:   //    pa   物理アドレス
 27261:   //    a    論理アドレス
 27262:   public static int mmuLoadPhysicalAddressWrite (int a) throws M68kException {
 27263:     M68kException.m6eFSLW = M68kException.M6E_FSLW_IOMA_FIRST | M68kException.M6E_FSLW_RW_WRITE | M68kException.M6E_FSLW_SIZE_BYTE | XEiJ.mpuDFC << 16;
 27264:     return ((0b10011111 << 24 << XEiJ.mpuDFC) < 0 ?
 27265:             (0b00101010 << 24 << XEiJ.mpuDFC) < 0 ? mmuTranslateWriteSuperCode (a) : mmuTranslateWriteSuperData (a) :
 27266:             (0b00101010 << 24 << XEiJ.mpuDFC) < 0 ? mmuTranslateWriteUserCode (a) : mmuTranslateWriteUserData (a));
 27267:   }  //mmuLoadPhysicalAddressWrite(int)
 27268: 
 27269:   //pa = mmuTranslateReadUserData (a)
 27270:   //  アドレス変換を行う(リードユーザデータ)
 27271:   //    pa  物理アドレス
 27272:   //    a   論理アドレス
 27273:   //  M68kException.m6eFSLWのMA,RW,SIZE,TM,IOをセットしてから呼び出すこと
 27274:   public static int mmuTranslateReadUserData (int a) throws M68kException {
 27275:     int logicalPage = a & mmuPageAddressMask;  //論理ページアドレス
 27276:     int head = (logicalPage * MMU_HASH_COEFF >>> -MMU_HASH_BITS) * (4 * MMU_CACHE_WAYS);  //先頭のエントリ
 27277:     if (mmuUserDataCache[head] == logicalPage) {  //リード用の論理ページアドレスと一致した
 27278:       return mmuUserDataCache[head + 2] | (a & mmuPageOffsetMask);  //物理ページアドレスとページオフセットを連結する
 27279:     }
 27280:     if (MMU_CACHE_WAYS >= 2) {  //2ways以上
 27281:       int tail = head + (4 * MMU_CACHE_WAYS - 4);  //末尾のエントリ
 27282:       for (int i = head + 4; i <= tail; i += 4) {
 27283:         if (mmuUserDataCache[i] == logicalPage) {  //リード用の論理ページアドレスと一致した
 27284:           //int logicalRead  = mmuUserDataCache[i    ];
 27285:           int logicalWrite = mmuUserDataCache[i + 1];
 27286:           int physicalPage = mmuUserDataCache[i + 2];
 27287:           int globalFlag   = mmuUserDataCache[i + 3];
 27288:           for (; i > head; i -= 4) {
 27289:             mmuUserDataCache[i    ] = mmuUserDataCache[i - 4];
 27290:             mmuUserDataCache[i + 1] = mmuUserDataCache[i - 3];
 27291:             mmuUserDataCache[i + 2] = mmuUserDataCache[i - 2];
 27292:             mmuUserDataCache[i + 3] = mmuUserDataCache[i - 1];
 27293:           }
 27294:           mmuUserDataCache[i    ] = logicalPage;  //logicalRead
 27295:           mmuUserDataCache[i + 1] = logicalWrite;
 27296:           mmuUserDataCache[i + 2] = physicalPage;
 27297:           mmuUserDataCache[i + 3] = globalFlag;
 27298:           return physicalPage | (a & mmuPageOffsetMask);  //物理ページアドレスとページオフセットを連結する
 27299:         }
 27300:       }  //for i
 27301:     }
 27302:     return mmuTranslateCommon (a, false, false, false);
 27303:   }  //mmuTranslateReadUserData(int)
 27304: 
 27305:   //pa = mmuTranslateReadUserCode (a)
 27306:   //  アドレス変換を行う(リードユーザコード)
 27307:   //    pa  物理アドレス
 27308:   //    a   論理アドレス
 27309:   //  M68kException.m6eFSLWのMA,RW,SIZE,TM,IOをセットしてから呼び出すこと
 27310:   public static int mmuTranslateReadUserCode (int a) throws M68kException {
 27311:     int logicalPage = a & mmuPageAddressMask;  //論理ページアドレス
 27312:     int head = (logicalPage * MMU_HASH_COEFF >>> -MMU_HASH_BITS) * (4 * MMU_CACHE_WAYS);  //先頭のエントリ
 27313:     if (mmuUserCodeCache[head] == logicalPage) {  //リード用の論理ページアドレスと一致した
 27314:       return mmuUserCodeCache[head + 2] | (a & mmuPageOffsetMask);  //物理ページアドレスとページオフセットを連結する
 27315:     }
 27316:     if (MMU_CACHE_WAYS >= 2) {  //2ways以上
 27317:       int tail = head + (4 * MMU_CACHE_WAYS - 4);  //末尾のエントリ
 27318:       for (int i = head + 4; i <= tail; i += 4) {
 27319:         if (mmuUserCodeCache[i] == logicalPage) {  //リード用の論理ページアドレスと一致した
 27320:           //int logicalRead  = mmuUserCodeCache[i    ];
 27321:           int logicalWrite = mmuUserCodeCache[i + 1];
 27322:           int physicalPage = mmuUserCodeCache[i + 2];
 27323:           int globalFlag   = mmuUserCodeCache[i + 3];
 27324:           for (; i > head; i -= 4) {
 27325:             mmuUserCodeCache[i    ] = mmuUserCodeCache[i - 4];
 27326:             mmuUserCodeCache[i + 1] = mmuUserCodeCache[i - 3];
 27327:             mmuUserCodeCache[i + 2] = mmuUserCodeCache[i - 2];
 27328:             mmuUserCodeCache[i + 3] = mmuUserCodeCache[i - 1];
 27329:           }
 27330:           mmuUserCodeCache[head    ] = logicalPage;  //logicalRead
 27331:           mmuUserCodeCache[head + 1] = logicalWrite;
 27332:           mmuUserCodeCache[head + 2] = physicalPage;
 27333:           mmuUserCodeCache[head + 3] = globalFlag;
 27334:           return physicalPage | (a & mmuPageOffsetMask);  //物理ページアドレスとページオフセットを連結する
 27335:         }
 27336:       }  //for i
 27337:     }
 27338:     return mmuTranslateCommon (a, false, false, true);
 27339:   }  //mmuTranslateReadUserCode(int)
 27340: 
 27341:   //pa = mmuTranslateReadSuperData (a)
 27342:   //  アドレス変換を行う(リードスーパーバイザデータ)
 27343:   //    pa  物理アドレス
 27344:   //    a   論理アドレス
 27345:   //  M68kException.m6eFSLWのMA,RW,SIZE,TM,IOをセットしてから呼び出すこと
 27346:   public static int mmuTranslateReadSuperData (int a) throws M68kException {
 27347:     int logicalPage = a & mmuPageAddressMask;  //論理ページアドレス
 27348:     int head = (logicalPage * MMU_HASH_COEFF >>> -MMU_HASH_BITS) * (4 * MMU_CACHE_WAYS);  //先頭のエントリ
 27349:     if (mmuSuperDataCache[head] == logicalPage) {  //リード用の論理ページアドレスと一致した
 27350:       return mmuSuperDataCache[head + 2] | (a & mmuPageOffsetMask);  //物理ページアドレスとページオフセットを連結する
 27351:     }
 27352:     if (MMU_CACHE_WAYS >= 2) {  //2ways以上
 27353:       int tail = head + (4 * MMU_CACHE_WAYS - 4);  //末尾のエントリ
 27354:       for (int i = head + 4; i <= tail; i += 4) {
 27355:         if (mmuSuperDataCache[i] == logicalPage) {  //リード用の論理ページアドレスと一致した
 27356:           //int logicalRead  = mmuSuperDataCache[i    ];
 27357:           int logicalWrite = mmuSuperDataCache[i + 1];
 27358:           int physicalPage = mmuSuperDataCache[i + 2];
 27359:           int globalFlag   = mmuSuperDataCache[i + 3];
 27360:           for (; i > head; i -= 4) {
 27361:             mmuSuperDataCache[i    ] = mmuSuperDataCache[i - 4];
 27362:             mmuSuperDataCache[i + 1] = mmuSuperDataCache[i - 3];
 27363:             mmuSuperDataCache[i + 2] = mmuSuperDataCache[i - 2];
 27364:             mmuSuperDataCache[i + 3] = mmuSuperDataCache[i - 1];
 27365:           }
 27366:           mmuSuperDataCache[i    ] = logicalPage;  //logicalRead
 27367:           mmuSuperDataCache[i + 1] = logicalWrite;
 27368:           mmuSuperDataCache[i + 2] = physicalPage;
 27369:           mmuSuperDataCache[i + 3] = globalFlag;
 27370:           return physicalPage | (a & mmuPageOffsetMask);  //物理ページアドレスとページオフセットを連結する
 27371:         }
 27372:       }  //for i
 27373:     }
 27374:     return mmuTranslateCommon (a, false, true, false);
 27375:   }  //mmuTranslateReadSuperData(int)
 27376: 
 27377:   //pa = mmuTranslateReadSuperCode (a)
 27378:   //  アドレス変換を行う(リードスーパーバイザコード)
 27379:   //    pa  物理アドレス
 27380:   //    a   論理アドレス
 27381:   //  M68kException.m6eFSLWのMA,RW,SIZE,TM,IOをセットしてから呼び出すこと
 27382:   public static int mmuTranslateReadSuperCode (int a) throws M68kException {
 27383:     int logicalPage = a & mmuPageAddressMask;  //論理ページアドレス
 27384:     int head = (logicalPage * MMU_HASH_COEFF >>> -MMU_HASH_BITS) * (4 * MMU_CACHE_WAYS);  //先頭のエントリ
 27385:     if (mmuSuperCodeCache[head] == logicalPage) {  //リード用の論理ページアドレスと一致した
 27386:       return mmuSuperCodeCache[head + 2] | (a & mmuPageOffsetMask);  //物理ページアドレスとページオフセットを連結する
 27387:     }
 27388:     if (MMU_CACHE_WAYS >= 2) {  //2ways以上
 27389:       int tail = head + (4 * MMU_CACHE_WAYS - 4);  //末尾のエントリ
 27390:       for (int i = head + 4; i <= tail; i += 4) {
 27391:         if (mmuSuperCodeCache[i] == logicalPage) {  //リード用の論理ページアドレスと一致した
 27392:           //int logicalRead  = mmuSuperCodeCache[i    ];
 27393:           int logicalWrite = mmuSuperCodeCache[i + 1];
 27394:           int physicalPage = mmuSuperCodeCache[i + 2];
 27395:           int globalFlag   = mmuSuperCodeCache[i + 3];
 27396:           for (; i > head; i -= 4) {
 27397:             mmuSuperCodeCache[i    ] = mmuSuperCodeCache[i - 4];
 27398:             mmuSuperCodeCache[i + 1] = mmuSuperCodeCache[i - 3];
 27399:             mmuSuperCodeCache[i + 2] = mmuSuperCodeCache[i - 2];
 27400:             mmuSuperCodeCache[i + 3] = mmuSuperCodeCache[i - 1];
 27401:           }
 27402:           mmuSuperCodeCache[head    ] = logicalPage;  //logicalRead
 27403:           mmuSuperCodeCache[head + 1] = logicalWrite;
 27404:           mmuSuperCodeCache[head + 2] = physicalPage;
 27405:           mmuSuperCodeCache[head + 3] = globalFlag;
 27406:           return physicalPage | (a & mmuPageOffsetMask);  //物理ページアドレスとページオフセットを連結する
 27407:         }
 27408:       }  //for i
 27409:     }
 27410:     return mmuTranslateCommon (a, false, true, true);
 27411:   }  //mmuTranslateReadSuperCode(int)
 27412: 
 27413:   //pa = mmuTranslateWriteUserData (a)
 27414:   //  アドレス変換を行う(ライトユーザデータ)
 27415:   //    pa  物理アドレス
 27416:   //    a   論理アドレス
 27417:   //  M68kException.m6eFSLWのMA,RW,SIZE,TM,IOをセットしてから呼び出すこと
 27418:   public static int mmuTranslateWriteUserData (int a) throws M68kException {
 27419:     int logicalPage = a & mmuPageAddressMask;  //論理ページアドレス
 27420:     int head = (logicalPage * MMU_HASH_COEFF >>> -MMU_HASH_BITS) * (4 * MMU_CACHE_WAYS);  //先頭のエントリ
 27421:     if (mmuUserDataCache[head + 1] == logicalPage) {  //ライト用の論理ページアドレスと一致した
 27422:       return mmuUserDataCache[head + 2] | (a & mmuPageOffsetMask);  //物理ページアドレスとページオフセットを連結する
 27423:     }
 27424:     if (MMU_CACHE_WAYS >= 2) {  //2ways以上
 27425:       int tail = head + (4 * MMU_CACHE_WAYS - 4);  //末尾のエントリ
 27426:       for (int i = head + 4; i <= tail; i += 4) {
 27427:         if (mmuUserDataCache[i + 1] == logicalPage) {  //ライト用の論理ページアドレスと一致した
 27428:           int logicalRead  = mmuUserDataCache[i    ];
 27429:           //int logicalWrite = mmuUserDataCache[i + 1];
 27430:           int physicalPage = mmuUserDataCache[i + 2];
 27431:           int globalFlag   = mmuUserDataCache[i + 3];
 27432:           for (; i > head; i -= 4) {
 27433:             mmuUserDataCache[i    ] = mmuUserDataCache[i - 4];
 27434:             mmuUserDataCache[i + 1] = mmuUserDataCache[i - 3];
 27435:             mmuUserDataCache[i + 2] = mmuUserDataCache[i - 2];
 27436:             mmuUserDataCache[i + 3] = mmuUserDataCache[i - 1];
 27437:           }
 27438:           mmuUserDataCache[i    ] = logicalRead;
 27439:           mmuUserDataCache[i + 1] = logicalPage;  //logicalWrite
 27440:           mmuUserDataCache[i + 2] = physicalPage;
 27441:           mmuUserDataCache[i + 3] = globalFlag;
 27442:           return physicalPage | (a & mmuPageOffsetMask);  //物理ページアドレスとページオフセットを連結する
 27443:         }
 27444:       }  //for i
 27445:     }
 27446:     return mmuTranslateCommon (a, true, false, false);
 27447:   }  //mmuTranslateWriteUserData(int)
 27448: 
 27449:   //pa = mmuTranslateWriteUserCode (a)
 27450:   //  アドレス変換を行う(ライトユーザコード)
 27451:   //    pa  物理アドレス
 27452:   //    a   論理アドレス
 27453:   //  M68kException.m6eFSLWのMA,RW,SIZE,TM,IOをセットしてから呼び出すこと
 27454:   public static int mmuTranslateWriteUserCode (int a) throws M68kException {
 27455:     int logicalPage = a & mmuPageAddressMask;  //論理ページアドレス
 27456:     int head = (logicalPage * MMU_HASH_COEFF >>> -MMU_HASH_BITS) * (4 * MMU_CACHE_WAYS);  //先頭のエントリ
 27457:     if (mmuUserCodeCache[head + 1] == logicalPage) {  //ライト用の論理ページアドレスと一致した
 27458:       return mmuUserCodeCache[head + 2] | (a & mmuPageOffsetMask);  //物理ページアドレスとページオフセットを連結する
 27459:     }
 27460:     if (MMU_CACHE_WAYS >= 2) {  //2ways以上
 27461:       int tail = head + (4 * MMU_CACHE_WAYS - 4);  //末尾のエントリ
 27462:       for (int i = head + 4; i <= tail; i += 4) {
 27463:         if (mmuUserCodeCache[i + 1] == logicalPage) {  //ライト用の論理ページアドレスと一致した
 27464:           int logicalRead  = mmuUserCodeCache[i    ];
 27465:           //int logicalWrite = mmuUserCodeCache[i + 1];
 27466:           int physicalPage = mmuUserCodeCache[i + 2];
 27467:           int globalFlag   = mmuUserCodeCache[i + 3];
 27468:           for (; i > head; i -= 4) {
 27469:             mmuUserCodeCache[i    ] = mmuUserCodeCache[i - 4];
 27470:             mmuUserCodeCache[i + 1] = mmuUserCodeCache[i - 3];
 27471:             mmuUserCodeCache[i + 2] = mmuUserCodeCache[i - 2];
 27472:             mmuUserCodeCache[i + 3] = mmuUserCodeCache[i - 1];
 27473:           }
 27474:           mmuUserCodeCache[head    ] = logicalRead;
 27475:           mmuUserCodeCache[head + 1] = logicalPage;  //logicalWrite
 27476:           mmuUserCodeCache[head + 2] = physicalPage;
 27477:           mmuUserCodeCache[head + 3] = globalFlag;
 27478:           return physicalPage | (a & mmuPageOffsetMask);  //物理ページアドレスとページオフセットを連結する
 27479:         }
 27480:       }  //for i
 27481:     }
 27482:     return mmuTranslateCommon (a, true, false, true);
 27483:   }  //mmuTranslateWriteUserCode(int)
 27484: 
 27485:   //pa = mmuTranslateWriteSuperData (a)
 27486:   //  アドレス変換を行う(ライトスーパーバイザデータ)
 27487:   //    pa  物理アドレス
 27488:   //    a   論理アドレス
 27489:   //  M68kException.m6eFSLWのMA,RW,SIZE,TM,IOをセットしてから呼び出すこと
 27490:   public static int mmuTranslateWriteSuperData (int a) throws M68kException {
 27491:     int logicalPage = a & mmuPageAddressMask;  //論理ページアドレス
 27492:     int head = (logicalPage * MMU_HASH_COEFF >>> -MMU_HASH_BITS) * (4 * MMU_CACHE_WAYS);  //先頭のエントリ
 27493:     if (mmuSuperDataCache[head + 1] == logicalPage) {  //ライト用の論理ページアドレスと一致した
 27494:       return mmuSuperDataCache[head + 2] | (a & mmuPageOffsetMask);  //物理ページアドレスとページオフセットを連結する
 27495:     }
 27496:     if (MMU_CACHE_WAYS >= 2) {  //2ways以上
 27497:       int tail = head + (4 * MMU_CACHE_WAYS - 4);  //末尾のエントリ
 27498:       for (int i = head + 4; i <= tail; i += 4) {
 27499:         if (mmuSuperDataCache[i + 1] == logicalPage) {  //ライト用の論理ページアドレスと一致した
 27500:           int logicalRead  = mmuSuperDataCache[i    ];
 27501:           //int logicalWrite = mmuSuperDataCache[i + 1];
 27502:           int physicalPage = mmuSuperDataCache[i + 2];
 27503:           int globalFlag   = mmuSuperDataCache[i + 3];
 27504:           for (; i > head; i -= 4) {
 27505:             mmuSuperDataCache[i    ] = mmuSuperDataCache[i - 4];
 27506:             mmuSuperDataCache[i + 1] = mmuSuperDataCache[i - 3];
 27507:             mmuSuperDataCache[i + 2] = mmuSuperDataCache[i - 2];
 27508:             mmuSuperDataCache[i + 3] = mmuSuperDataCache[i - 1];
 27509:           }
 27510:           mmuSuperDataCache[i    ] = logicalRead;
 27511:           mmuSuperDataCache[i + 1] = logicalPage;  //logicalWrite
 27512:           mmuSuperDataCache[i + 2] = physicalPage;
 27513:           mmuSuperDataCache[i + 3] = globalFlag;
 27514:           return physicalPage | (a & mmuPageOffsetMask);  //物理ページアドレスとページオフセットを連結する
 27515:         }
 27516:       }  //for i
 27517:     }
 27518:     return mmuTranslateCommon (a, true, true, false);
 27519:   }  //mmuTranslateWriteSuperData(int)
 27520: 
 27521:   //pa = mmuTranslateWriteSuperCode (a)
 27522:   //  アドレス変換を行う(ライトスーパーバイザコード)
 27523:   //    pa  物理アドレス
 27524:   //    a   論理アドレス
 27525:   //  M68kException.m6eFSLWのMA,RW,SIZE,TM,IOをセットしてから呼び出すこと
 27526:   public static int mmuTranslateWriteSuperCode (int a) throws M68kException {
 27527:     int logicalPage = a & mmuPageAddressMask;  //論理ページアドレス
 27528:     int head = (logicalPage * MMU_HASH_COEFF >>> -MMU_HASH_BITS) * (4 * MMU_CACHE_WAYS);  //先頭のエントリ
 27529:     if (mmuSuperCodeCache[head + 1] == logicalPage) {  //ライト用の論理ページアドレスと一致した
 27530:       return mmuSuperCodeCache[head + 2] | (a & mmuPageOffsetMask);  //物理ページアドレスとページオフセットを連結する
 27531:     }
 27532:     if (MMU_CACHE_WAYS >= 2) {  //2ways以上
 27533:       int tail = head + (4 * MMU_CACHE_WAYS - 4);  //末尾のエントリ
 27534:       for (int i = head + 4; i <= tail; i += 4) {
 27535:         if (mmuSuperCodeCache[i + 1] == logicalPage) {  //ライト用の論理ページアドレスと一致した
 27536:           int logicalRead  = mmuSuperCodeCache[i    ];
 27537:           //int logicalWrite = mmuSuperCodeCache[i + 1];
 27538:           int physicalPage = mmuSuperCodeCache[i + 2];
 27539:           int globalFlag   = mmuSuperCodeCache[i + 3];
 27540:           for (; i > head; i -= 4) {
 27541:             mmuSuperCodeCache[i    ] = mmuSuperCodeCache[i - 4];
 27542:             mmuSuperCodeCache[i + 1] = mmuSuperCodeCache[i - 3];
 27543:             mmuSuperCodeCache[i + 2] = mmuSuperCodeCache[i - 2];
 27544:             mmuSuperCodeCache[i + 3] = mmuSuperCodeCache[i - 1];
 27545:           }
 27546:           mmuSuperCodeCache[head    ] = logicalRead;
 27547:           mmuSuperCodeCache[head + 1] = logicalPage;  //logicalWrite
 27548:           mmuSuperCodeCache[head + 2] = physicalPage;
 27549:           mmuSuperCodeCache[head + 3] = globalFlag;
 27550:           return physicalPage | (a & mmuPageOffsetMask);  //物理ページアドレスとページオフセットを連結する
 27551:         }
 27552:       }  //for i
 27553:     }
 27554:     return mmuTranslateCommon (a, true, true, true);
 27555:   }  //mmuTranslateWriteSuperCode(int)
 27556: 
 27557:   //pa = mmuTranslateCommon (a, write, supervisor, instruction)
 27558:   //  透過変換とテーブルサーチを行い、アドレス変換キャッシュ更新する
 27559:   //  アドレス変換キャッシュがミスしたときに呼び出す
 27560:   //    pa           物理アドレス
 27561:   //    a            論理アドレス
 27562:   //    write        true=ライト,false=リード
 27563:   //    supervisor   true=スーパーバイザ,false=ユーザ。通常はXEiJ.regSRS!=0、PLPAR/PLPAWでは(XEiJ.mpuDFC&4)!=0
 27564:   //    instruction  true=命令,false=データ。通常は命令フェッチまたは拡張ワードのときtrue、PLPAR/PLPAWでは(XEiJ.mpuDFC&2)!=0
 27565:   //  M68kException.m6eFSLWのMA,RW,SIZE,TM,IOをセットしてから呼び出すこと
 27566:   public static int mmuTranslateCommon (int a, boolean write, boolean supervisor, boolean instruction) throws M68kException {
 27567:     if (MMU_DEBUG_TRANSLATION) {
 27568:       System.out.printf ("%08x mmuTranslateCommon(0x%08x,%b,%b,%b)", XEiJ.regPC0, a, write, supervisor, instruction);
 27569:     }
 27570:     int logicalPage = a & mmuPageAddressMask;  //リード用の論理ページアドレス
 27571:     int logicalWrite;  //ライト用の論理ページアドレス
 27572:     int physicalPage;  //物理ページアドレス
 27573:     int globalFlag;  //グローバルフラグ。-1=Global,0=NonGlobal
 27574:     int pa;  //物理アドレス
 27575:     //透過変換
 27576:     //  透過変換はスーパーバイザモードかどうかを条件にすることができる(しないこともできる)
 27577:     //    条件が合わなければヒットしないだけで、スーパーバイザプロテクトのアクセスフォルトになならない
 27578:     //  透過変換をアドレス変換キャッシュに乗せる場合
 27579:     //    アドレス変換キャッシュがヒットしてバスエラーが発生したとき
 27580:     //      透過変換かどうかを再確認してFSLWのTTRをセットしなければならない
 27581:     //    透過変換レジスタが操作されたとき
 27582:     //      OFF→ONの領域だけでなくON→OFFの領域もフラッシュしなければならない
 27583:     //      透過変換レジスタを頻繁に操作されると重くなるかも知れない
 27584:     int tt = (supervisor ?
 27585:               instruction ? mmuSuperCodeTransparent : mmuSuperDataTransparent :
 27586:               instruction ? mmuUserCodeTransparent : mmuUserDataTransparent)[a >>> 24];
 27587:     if (tt != 0) {  //透過変換あり
 27588:       M68kException.m6eFSLW |= M68kException.M6E_FSLW_TRANSPARENT;
 27589:       if (write &&  //ライトで
 27590:           tt < 0) {  //透過変換によるライトプロテクト
 27591:         if (MMU_DEBUG_TRANSLATION) {
 27592:           System.out.printf (" write protected by transparent translation\n", a);
 27593:         }
 27594:         M68kException.m6eFSLW |= M68kException.M6E_FSLW_WRITE_PROTECT;
 27595:         M68kException.m6eNumber = M68kException.M6E_ACCESS_FAULT;
 27596:         M68kException.m6eAddress = a;
 27597:         throw M68kException.m6eSignal;
 27598:       }
 27599:       logicalWrite = logicalPage;  //ライト用の論理ページアドレス
 27600:       physicalPage = logicalPage;  //物理ページアドレス
 27601:       globalFlag = -1;  //グローバルフラグ。-1=Global,0=NonGlobal
 27602:       pa = a;
 27603:       if (MMU_DEBUG_TRANSLATION) {
 27604:         System.out.printf ("=0x%08x (transparent translation)\n", pa);
 27605:       }
 27606:     } else if (mmuEnabled) {  //透過変換なし、アドレス変換あり
 27607:       //テーブルサーチ
 27608:       //  スーパーバイザプロテクトまたはライトプロテクトで停止したときディスクリプタの使用済みフラグはセットされない
 27609:       //  リードモディファイライトはライトでアロケートするのでリードする前にライトプロテクトに引っかかる
 27610:       //    例えばROMの内容をインクリメントしようとしたときライトだけでなくリードも行われない
 27611:       M68kException.m6eFSLW |= M68kException.M6E_FSLW_TABLE_SEARCH;
 27612:       //ルートテーブル
 27613:       int rootDescriptorAddress = (supervisor ? mmuSRP : mmuURP) + ((a & MMU_ROOT_INDEX_MASK) >>> MMU_ROOT_INDEX_BIT0 - 2);  //ルートテーブルディスクリプタのアドレス
 27614:       MemoryMappedDevice rootDescriptorDevice = (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[rootDescriptorAddress >>> XEiJ.BUS_PAGE_BITS];
 27615:       int rootDescriptor = rootDescriptorDevice.mmdRls (rootDescriptorAddress);  //ルートテーブルディスクリプタ
 27616:       if ((rootDescriptor & MMU_DESCRIPTOR_UDT) == MMU_DESCRIPTOR_TYPE_INVALID) {  //ディスクリプタが無効のとき
 27617:         if (MMU_DEBUG_TRANSLATION) {
 27618:           System.out.printf (" invalid root descriptor 0x%08x at 0x%08x\n", rootDescriptor, rootDescriptorAddress);
 27619:         }
 27620:         M68kException.m6eFSLW ^= M68kException.M6E_FSLW_TABLE_SEARCH ^ M68kException.M6E_FSLW_ROOT_DESCRIPTOR;
 27621:         M68kException.m6eNumber = M68kException.M6E_ACCESS_FAULT;
 27622:         M68kException.m6eAddress = a;
 27623:         throw M68kException.m6eSignal;
 27624:       }
 27625:       if (write &&  //ライトで
 27626:           (rootDescriptor & MMU_DESCRIPTOR_WRITE_PROTECTED) != 0) {  //ライトプロテクトされているとき
 27627:         if (MMU_DEBUG_TRANSLATION) {
 27628:           System.out.printf (" write protected by root descriptor 0x%08x at 0x%08x\n", rootDescriptor, rootDescriptorAddress);
 27629:         }
 27630:         M68kException.m6eFSLW ^= M68kException.M6E_FSLW_TABLE_SEARCH ^ M68kException.M6E_FSLW_WRITE_PROTECT;
 27631:         M68kException.m6eNumber = M68kException.M6E_ACCESS_FAULT;
 27632:         M68kException.m6eAddress = a;
 27633:         throw M68kException.m6eSignal;
 27634:       }
 27635:       if ((rootDescriptor & MMU_DESCRIPTOR_USED) == 0) {  //ディスクリプタが未使用のとき
 27636:         rootDescriptor |= MMU_DESCRIPTOR_USED;  //使用済み
 27637:         rootDescriptorDevice.mmdWl (rootDescriptorAddress, rootDescriptor);
 27638:       }
 27639:       //ポインタテーブル
 27640:       int pointerDescriptorAddress = (rootDescriptor & MMU_DESCRIPTOR_POINTER_TABLE_ADDRESS) + ((a & MMU_POINTER_INDEX_MASK) >>> MMU_POINTER_INDEX_BIT0 - 2);  //ポインタテーブルディスクリプタのアドレス
 27641:       MemoryMappedDevice pointerDescriptorDevice = (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[pointerDescriptorAddress >>> XEiJ.BUS_PAGE_BITS];
 27642:       int pointerDescriptor = pointerDescriptorDevice.mmdRls (pointerDescriptorAddress);  //ポインタテーブルディスクリプタ
 27643:       if ((pointerDescriptor & MMU_DESCRIPTOR_UDT) == MMU_DESCRIPTOR_TYPE_INVALID) {  //ディスクリプタが無効のとき
 27644:         if (MMU_DEBUG_TRANSLATION) {
 27645:           System.out.printf (" invalid pointer descriptor 0x%08x at 0x%08x\n", pointerDescriptor, pointerDescriptorAddress);
 27646:         }
 27647:         M68kException.m6eFSLW ^= M68kException.M6E_FSLW_TABLE_SEARCH ^ M68kException.M6E_FSLW_POINTER_DESCRIPTOR;
 27648:         M68kException.m6eNumber = M68kException.M6E_ACCESS_FAULT;
 27649:         M68kException.m6eAddress = a;
 27650:         throw M68kException.m6eSignal;
 27651:       }
 27652:       if (write &&  //ライトで
 27653:           (pointerDescriptor & MMU_DESCRIPTOR_WRITE_PROTECTED) != 0) {  //ライトプロテクトされているとき
 27654:         if (MMU_DEBUG_TRANSLATION) {
 27655:           System.out.printf (" write protected by pointer descriptor 0x%08x at 0x%08x\n", pointerDescriptor, pointerDescriptorAddress);
 27656:         }
 27657:         M68kException.m6eFSLW ^= M68kException.M6E_FSLW_TABLE_SEARCH ^ M68kException.M6E_FSLW_WRITE_PROTECT;
 27658:         M68kException.m6eNumber = M68kException.M6E_ACCESS_FAULT;
 27659:         M68kException.m6eAddress = a;
 27660:         throw M68kException.m6eSignal;
 27661:       }
 27662:       if ((pointerDescriptor & MMU_DESCRIPTOR_USED) == 0) {  //ディスクリプタが未使用のとき
 27663:         pointerDescriptor |= MMU_DESCRIPTOR_USED;  //使用済み
 27664:         pointerDescriptorDevice.mmdWl (pointerDescriptorAddress, pointerDescriptor);
 27665:       }
 27666:       //ページテーブル
 27667:       int pageDescriptorAddress = (pointerDescriptor & mmuPageTableMask) + ((a & mmuPageIndexMask) >>> mmuPageIndexBit2);  //ページテーブルディスクリプタのアドレス
 27668:       MemoryMappedDevice pageDescriptorDevice = (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[pageDescriptorAddress >>> XEiJ.BUS_PAGE_BITS];
 27669:       int pageDescriptor = pageDescriptorDevice.mmdRls (pageDescriptorAddress);  //ページテーブルディスクリプタ
 27670:       if ((pageDescriptor & MMU_DESCRIPTOR_PDT) == MMU_DESCRIPTOR_TYPE_INVALID) {  //ディスクリプタが無効のとき
 27671:         if (MMU_DEBUG_TRANSLATION) {
 27672:           System.out.printf (" invalid page descriptor 0x%08x at 0x%08x\n", pageDescriptor, pageDescriptorAddress);
 27673:         }
 27674:         M68kException.m6eFSLW ^= M68kException.M6E_FSLW_TABLE_SEARCH ^ M68kException.M6E_FSLW_PAGE_FAULT;
 27675:         M68kException.m6eNumber = M68kException.M6E_ACCESS_FAULT;
 27676:         M68kException.m6eAddress = a;
 27677:         throw M68kException.m6eSignal;
 27678:       }
 27679:       if ((pageDescriptor & MMU_DESCRIPTOR_PDT) == MMU_DESCRIPTOR_TYPE_INDIRECT) {  //ディスクリプタが間接のとき
 27680:         pageDescriptorAddress = pageDescriptor & MMU_DESCRIPTOR_INDIRECT_ADDRESS;  //ページテーブルディスクリプタのアドレス
 27681:         pageDescriptorDevice = (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[pageDescriptorAddress >>> XEiJ.BUS_PAGE_BITS];
 27682:         pageDescriptor = pageDescriptorDevice.mmdRls (pageDescriptorAddress);  //ページテーブルディスクリプタ
 27683:         if ((pageDescriptor & MMU_DESCRIPTOR_PDT) == MMU_DESCRIPTOR_TYPE_INVALID) {  //ディスクリプタが無効のとき
 27684:           if (MMU_DEBUG_TRANSLATION) {
 27685:             System.out.printf (" invalid page descriptor 0x%08x at 0x%08x\n", pageDescriptor, pageDescriptorAddress);
 27686:           }
 27687:           M68kException.m6eFSLW ^= M68kException.M6E_FSLW_TABLE_SEARCH ^ M68kException.M6E_FSLW_PAGE_FAULT;
 27688:           M68kException.m6eNumber = M68kException.M6E_ACCESS_FAULT;
 27689:           M68kException.m6eAddress = a;
 27690:           throw M68kException.m6eSignal;
 27691:         }
 27692:         if ((pageDescriptor & MMU_DESCRIPTOR_PDT) == MMU_DESCRIPTOR_TYPE_INDIRECT) {  //ディスクリプタが二重間接のとき
 27693:           if (MMU_DEBUG_TRANSLATION) {
 27694:             System.out.printf (" indirect page descriptor 0x%08x at 0x%08x\n", pageDescriptor, pageDescriptorAddress);
 27695:           }
 27696:           M68kException.m6eFSLW ^= M68kException.M6E_FSLW_TABLE_SEARCH ^ M68kException.M6E_FSLW_INDIRECT_LEVEL;
 27697:           M68kException.m6eNumber = M68kException.M6E_ACCESS_FAULT;
 27698:           M68kException.m6eAddress = a;
 27699:           throw M68kException.m6eSignal;
 27700:         }
 27701:       }
 27702:       if (!supervisor &&  //ユーザモードで
 27703:           (pageDescriptor & MMU_DESCRIPTOR_SUPERVISOR_PROTECTED) != 0) {  //スーパーバイザプロテクトされているとき
 27704:         if (MMU_DEBUG_TRANSLATION) {
 27705:           System.out.printf (" supervisor protected by page descriptor 0x%08x at 0x%08x\n", pageDescriptor, pageDescriptorAddress);
 27706:         }
 27707:         M68kException.m6eFSLW ^= M68kException.M6E_FSLW_TABLE_SEARCH ^ M68kException.M6E_FSLW_SUPERVISOR_PROTECT;
 27708:         M68kException.m6eNumber = M68kException.M6E_ACCESS_FAULT;
 27709:         M68kException.m6eAddress = a;
 27710:         throw M68kException.m6eSignal;
 27711:       }
 27712:       if (write &&  //ライトで
 27713:           (pageDescriptor & MMU_DESCRIPTOR_WRITE_PROTECTED) != 0) {  //ライトプロテクトされているとき
 27714:         if (MMU_DEBUG_TRANSLATION) {
 27715:           System.out.printf (" write protected by page descriptor 0x%08x at 0x%08x\n", pageDescriptor, pageDescriptorAddress);
 27716:         }
 27717:         M68kException.m6eFSLW ^= M68kException.M6E_FSLW_TABLE_SEARCH ^ M68kException.M6E_FSLW_WRITE_PROTECT;
 27718:         M68kException.m6eNumber = M68kException.M6E_ACCESS_FAULT;
 27719:         M68kException.m6eAddress = a;
 27720:         throw M68kException.m6eSignal;
 27721:       }
 27722:       if ((pageDescriptor & MMU_DESCRIPTOR_USED) == 0) {  //ディスクリプタが未使用のとき
 27723:         pageDescriptor |= MMU_DESCRIPTOR_USED;  //使用済みにする
 27724:         pageDescriptorDevice.mmdWl (pageDescriptorAddress, pageDescriptor);
 27725:       }
 27726:       if (write &&  //ライトで
 27727:           (pageDescriptor & MMU_DESCRIPTOR_MODIFIED) == 0) {  //修正済みでないとき
 27728:         pageDescriptor |= MMU_DESCRIPTOR_MODIFIED;  //修正済みにする
 27729:         pageDescriptorDevice.mmdWl (pageDescriptorAddress, pageDescriptor);
 27730:       }
 27731:       //テーブルサーチ終了
 27732:       M68kException.m6eFSLW &= ~M68kException.M6E_FSLW_TABLE_SEARCH;
 27733:       //logicalWrite = (pageDescriptor & (MMU_DESCRIPTOR_MODIFIED | MMU_DESCRIPTOR_WRITE_PROTECTED)) == MMU_DESCRIPTOR_MODIFIED ? logicalPage : 1;  //ライト用の論理ページアドレス。修正済みかつライトプロテクトされていないときだけ有効
 27734:       logicalWrite = (pageDescriptor & MMU_DESCRIPTOR_WRITE_PROTECTED) == 0 ? logicalPage : 1;  //ライト用の論理ページアドレス。ライトプロテクトされていないときだけ有効
 27735:       physicalPage = pageDescriptor & mmuPageAddressMask;  //物理ページアドレス
 27736:       globalFlag = (pageDescriptor & MMU_DESCRIPTOR_GLOBAL) != 0 ? -1 : 0;  //グローバルフラグ。-1=Global,0=NonGlobal
 27737:       pa = physicalPage | a & mmuPageOffsetMask;  //物理ページアドレスとページオフセットを連結する
 27738:       if (MMU_DEBUG_TRANSLATION) {
 27739:         System.out.printf ("=0x%08x (table search)\n", pa);
 27740:         System.out.printf ("  rootTable=0x%08x\n", supervisor ? mmuSRP : mmuURP);
 27741:         System.out.printf ("  rootIndex=0x%08x\n", (a & MMU_ROOT_INDEX_MASK) >>> MMU_ROOT_INDEX_BIT0);
 27742:         System.out.printf ("  rootDescriptorAddress=0x%08x\n", rootDescriptorAddress);
 27743:         System.out.printf ("  rootDescriptor=0x%08x\n", rootDescriptor);
 27744:         System.out.printf ("  pointerTable=0x%08x\n", rootDescriptor & MMU_DESCRIPTOR_POINTER_TABLE_ADDRESS);
 27745:         System.out.printf ("  pointerIndex=0x%08x\n", (a & MMU_POINTER_INDEX_MASK) >>> MMU_POINTER_INDEX_BIT0);
 27746:         System.out.printf ("  pointerDescriptorAddress=0x%08x\n", pointerDescriptorAddress);
 27747:         System.out.printf ("  pointerDescriptor=0x%08x\n", pointerDescriptor);
 27748:         System.out.printf ("  pageTable=0x%08x\n", pointerDescriptor & mmuPageTableMask);
 27749:         System.out.printf ("  pageIndex=0x%08x\n", (a & mmuPageIndexMask) >>> mmuPageIndexBit2 + 2);
 27750:         System.out.printf ("  pageDescriptorAddress=0x%08x\n", pageDescriptorAddress);
 27751:         System.out.printf ("  pageDescriptor=0x%08x\n", pageDescriptor);
 27752:       }
 27753:     } else {  //透過変換なし、アドレス変換なし
 27754:       logicalWrite = logicalPage;  //ライト用の論理ページアドレス
 27755:       physicalPage = logicalPage;  //物理ページアドレス
 27756:       globalFlag = -1;  //グローバルフラグ。-1=Global,0=NonGlobal
 27757:       pa = a;
 27758:       if (MMU_DEBUG_TRANSLATION) {
 27759:         System.out.printf ("=0x%08x (no translation)\n", pa);
 27760:       }
 27761:     }
 27762:     if (!(MMU_NOT_ALLOCATE_CACHE ||
 27763:           (instruction ? mmuNotAllocateCode : mmuNotAllocateData))) {
 27764:       //アドレス変換キャッシュを更新する
 27765:       //  同じ論理ページアドレスのエントリが存在する場合
 27766:       //    (リードでアロケートしたとき修正済みでなかったためライトでアロケートしなかった場合)
 27767:       //    同じ論理ページアドレスのエントリよりも前にあるエントリを後ろにずらす
 27768:       //    空いた先頭のエントリに上書きする
 27769:       //  同じ論理ページアドレスのエントリが存在しない場合
 27770:       //    末尾以外のエントリを後ろにずらす
 27771:       //    空いた先頭のエントリに上書きする
 27772:       int[] cache = (supervisor ?
 27773:                      instruction ? mmuSuperCodeCache : mmuSuperDataCache :
 27774:                      instruction ? mmuUserCodeCache : mmuUserDataCache);
 27775:       int head = (logicalPage * MMU_HASH_COEFF >>> -MMU_HASH_BITS) * (4 * MMU_CACHE_WAYS);  //先頭のエントリ
 27776:       if (MMU_CACHE_WAYS >= 2) {  //2ways以上のとき
 27777:         int tail = head + (4 * MMU_CACHE_WAYS - 4);  //末尾のエントリ→捨てるエントリ
 27778:         if (write) {  //ライトのとき
 27779:           for (int i = head; i < tail; i += 4) {
 27780:             if (cache[i] == logicalPage) {  //リードでアロケートされていた
 27781:               tail = i;
 27782:               break;
 27783:             }
 27784:           }
 27785:         }
 27786:         //  捨てるエントリよりも前にあるエントリを後ろにずらす
 27787:         for (; tail > head; tail -= 4) {
 27788:           cache[tail    ] = cache[tail - 4];
 27789:           cache[tail + 1] = cache[tail - 3];
 27790:           cache[tail + 2] = cache[tail - 2];
 27791:           cache[tail + 3] = cache[tail - 1];
 27792:         }
 27793:       }
 27794:       //  先頭のエントリに上書きする
 27795:       cache[head    ] = logicalPage;  //リード用の論理ページアドレス
 27796:       cache[head + 1] = logicalWrite;  //ライト用の論理ページアドレス
 27797:       cache[head + 2] = physicalPage;  //物理ページアドレス
 27798:       cache[head + 3] = globalFlag;  //グローバルフラグ
 27799:       if (MMU_DEBUG_TRANSLATION) {
 27800:         System.out.printf ("  ATC[%d]={0x%08x,0x%08x,0x%08x,%d}\n",
 27801:                            head / (4 * MMU_CACHE_WAYS), logicalPage, logicalWrite, physicalPage, globalFlag);
 27802:       }
 27803:     }
 27804:     return pa;
 27805:   }  //mmuTranslateCommon(int,boolean,boolean,boolean)
 27806: 
 27807:   public static int mmuPeekFlags;
 27808: 
 27809:   //pa = mmuTranslatePeek (a, supervisor, instruction) {
 27810:   //  アドレス変換を行う(デバッガ用、例外なし、テーブル更新なし)
 27811:   //    pa           物理アドレス。a^1=エラー
 27812:   //    a            論理アドレス
 27813:   //    supervisor   0=ユーザ,0以外=スーパーバイザ。通常はXEiJ.regSRS、PLPAR/PLPAWではXEiJ.mpuDFC&4
 27814:   //    instruction  0=データ,0以外=命令。通常は命令フェッチまたは拡張ワードのとき1、PLPAR/PLPAWではXEiJ.mpuDFC&2
 27815:   public static int mmuTranslatePeek (int a, int supervisor, int instruction) {
 27816:     //透過変換の確認
 27817:     //  透過変換はスーパーバイザモードかどうかを条件にすることができる(しないこともできる)
 27818:     //  透過変換にスーパーバイザプロテクトの機能はない
 27819:     {
 27820:       int[] tta = new int[2];
 27821:       if (instruction != 0) {
 27822:         tta[0] = mmuITT0;
 27823:         tta[1] = mmuITT1;
 27824:       } else {
 27825:         tta[0] = mmuDTT0;
 27826:         tta[1] = mmuDTT1;
 27827:       }
 27828:       for (int i = 0; i < 2; i++) {
 27829:         int ttr = tta[i];
 27830:         if ((ttr & 0x8000) != 0 &&  //Enable
 27831:             ((ttr & 0x4000) != 0 || ((ttr & 0x2000) != 0) == (supervisor != 0)) &&
 27832:             ((a ^ ttr) & ~ttr << 8) >>> 24 == 0) {
 27833:           mmuPeekFlags = ttr & MMU_TTR_WRITE_PROTECT;
 27834:           return a;
 27835:         }
 27836:       }
 27837:     }
 27838:     //透過変換なし
 27839:     if (!mmuEnabled) {  //アドレス変換なし
 27840:       mmuPeekFlags = 0;
 27841:       return a;
 27842:     }
 27843:     //アドレス変換あり
 27844:     int logicalPage = a & mmuPageAddressMask;  //論理ページアドレス
 27845:     //テーブルサーチ開始
 27846:     //  スーパーバイザプロテクトまたはライトプロテクトで停止したときディスクリプタの使用済みフラグはセットされない
 27847:     //  リードモディファイライトはライトでアロケートするのでリードする前にライトプロテクトに引っかかる
 27848:     //    例えばROMの内容をインクリメントしようとしたときライトだけでなくリードも行われない
 27849:     //ルートテーブル
 27850:     int rootDescriptorAddress = (supervisor != 0 ? mmuSRP : mmuURP) + ((a & MMU_ROOT_INDEX_MASK) >>> MMU_ROOT_INDEX_BIT0 - 2);  //ルートテーブルディスクリプタのアドレス
 27851:     int rootDescriptor = XEiJ.busPlsf (rootDescriptorAddress);  //ルートテーブルディスクリプタ
 27852:     if ((rootDescriptor & MMU_DESCRIPTOR_UDT) == MMU_DESCRIPTOR_TYPE_INVALID) {  //ディスクリプタが無効のとき
 27853:       return a ^ 1;
 27854:     }
 27855:     //ポインタテーブル
 27856:     int pointerDescriptorAddress = (rootDescriptor & MMU_DESCRIPTOR_POINTER_TABLE_ADDRESS) + ((a & MMU_POINTER_INDEX_MASK) >>> MMU_POINTER_INDEX_BIT0 - 2);  //ポインタテーブルディスクリプタのアドレス
 27857:     int pointerDescriptor = XEiJ.busPlsf (pointerDescriptorAddress);  //ポインタテーブルディスクリプタ
 27858:     if ((pointerDescriptor & MMU_DESCRIPTOR_UDT) == MMU_DESCRIPTOR_TYPE_INVALID) {  //ディスクリプタが無効のとき
 27859:       return a ^ 1;
 27860:     }
 27861:     //ページテーブル
 27862:     int pageDescriptorAddress = (pointerDescriptor & mmuPageTableMask) + ((a & mmuPageIndexMask) >>> mmuPageIndexBit2);  //ページテーブルディスクリプタのアドレス
 27863:     int pageDescriptor = XEiJ.busPlsf (pageDescriptorAddress);  //ページテーブルディスクリプタ
 27864:     if ((pageDescriptor & MMU_DESCRIPTOR_PDT) == MMU_DESCRIPTOR_TYPE_INVALID) {  //ディスクリプタが無効のとき
 27865:       return a ^ 1;
 27866:     }
 27867:     if ((pageDescriptor & MMU_DESCRIPTOR_PDT) == MMU_DESCRIPTOR_TYPE_INDIRECT) {  //ディスクリプタが間接のとき
 27868:       pageDescriptorAddress = pageDescriptor & MMU_DESCRIPTOR_INDIRECT_ADDRESS;  //ページテーブルディスクリプタのアドレス
 27869:       pageDescriptor = XEiJ.busPlsf (pageDescriptorAddress);  //ページテーブルディスクリプタ
 27870:       if ((pageDescriptor & MMU_DESCRIPTOR_PDT) == MMU_DESCRIPTOR_TYPE_INVALID) {  //ディスクリプタが無効のとき
 27871:         return a ^ 1;
 27872:       }
 27873:       if ((pageDescriptor & MMU_DESCRIPTOR_PDT) == MMU_DESCRIPTOR_TYPE_INDIRECT) {  //ディスクリプタが二重間接のとき
 27874:         return a ^ 1;
 27875:       }
 27876:     }
 27877:     if (supervisor == 0 &&  //ユーザモードで
 27878:         (pageDescriptor & MMU_DESCRIPTOR_SUPERVISOR_PROTECTED) != 0) {  //スーパーバイザプロテクトされているとき
 27879:       return a ^ 1;
 27880:     }
 27881:     int physicalPage = pageDescriptor & mmuPageAddressMask;  //物理ページアドレス
 27882:     //テーブルサーチ終了
 27883:     mmuPeekFlags = pageDescriptor & (MMU_DESCRIPTOR_SUPERVISOR_PROTECTED |
 27884:                                      MMU_DESCRIPTOR_MODIFIED |
 27885:                                      MMU_DESCRIPTOR_USED |
 27886:                                      MMU_DESCRIPTOR_WRITE_PROTECTED);
 27887:     return physicalPage | a & mmuPageOffsetMask;  //物理ページアドレスとページオフセットを連結する
 27888:   }  //mmuTranslatePeek(int,int,int)
 27889: 
 27890: 
 27891: 
 27892: }  //class MC68060
 27893: 
 27894: 
 27895: