MC68000.java
     1: //========================================================================================
     2: //  MC68000.java
     3: //    en:MC68000 core
     4: //    ja:MC68000コア
     5: //  Copyright (C) 2003-2025 Makoto Kamada
     6: //
     7: //  This file is part of the XEiJ (X68000 Emulator in Java).
     8: //  You can use, modify and redistribute the XEiJ if the conditions are met.
     9: //  Read the XEiJ License for more details.
    10: //  https://stdkmd.net/xeij/
    11: //========================================================================================
    12: 
    13: package xeij;
    14: 
    15: import java.lang.*;  //Boolean,Character,Class,Comparable,Double,Exception,Float,IllegalArgumentException,Integer,Long,Math,Number,Object,Runnable,SecurityException,String,StringBuilder,System
    16: 
    17: public class MC68000 {
    18: 
    19:   public static void mpuCore () {
    20: 
    21:     //例外ループ
    22:     //  別のメソッドで検出された例外を命令ループの外側でcatchすることで命令ループを高速化する
    23:   errorLoop:
    24:     while (XEiJ.mpuClockTime < XEiJ.mpuClockLimit) {
    25:       try {
    26:         //命令ループ
    27:         while (XEiJ.mpuClockTime < XEiJ.mpuClockLimit) {
    28:           int t;
    29:           //命令を実行する
    30:           XEiJ.mpuTraceFlag = XEiJ.regSRT1;  //命令実行前のsrT1
    31:           XEiJ.mpuCycleCount = 0;  //第1オペコードからROMのアクセスウエイトを有効にする。命令のサイクル数はすべてXEiJ.mpuCycleCount+=~で加えること
    32:           XEiJ.regPC0 = t = XEiJ.regPC;  //命令の先頭アドレス
    33:           XEiJ.regPC = t + 2;
    34:           XEiJ.regOC = (InstructionBreakPoint.IBP_ON ? InstructionBreakPoint.ibpOp1MemoryMap : DataBreakPoint.DBP_ON ? XEiJ.regSRS != 0 ? XEiJ.busSuperMap : XEiJ.busUserMap : XEiJ.busMemoryMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdRwz (t);  //第1オペコード。必ずゼロ拡張すること。pcに奇数が入っていることはないのでアドレスエラーのチェックを省略する
    35: 
    36:           //命令の処理
    37:           //  第1オペコードの上位10bitで分岐する
    38:           //  分岐方法
    39:           //    XEiJ.IRP_STATIC
    40:           //      手順
    41:           //        命令の処理をstaticメソッドに書く
    42:           //        switch(XEiJ.regOC>>>6)で分岐してirpXXX()で呼び出す
    43:           //          Javaはメソッドのサイズに制限があるためswitch(XEiJ.regOC>>>6)の中にすべての命令の処理を書くことができない
    44:           //          C言語のときはswitchの中にすべての命令の処理を書くことができる
    45:           //      利点
    46:           //        速い
    47:           //    XEiJ.IRP_ENUM_DIRECT
    48:           //      手順
    49:           //        命令の処理をenum bodyのメソッドに書く
    50:           //        switch(XEiJ.regOC>>>6)で分岐してIRP.XXX.exec()で呼び出す
    51:           //      欠点
    52:           //        XEiJ.IRP_STATICよりも遅い
    53:           //          staticなメソッドを直接呼び出せることに変わりないはずだが、インライン展開などの最適化が弱くなるのかも知れない
    54:           //        XEiJ.IRP_STATICと共存させようとすると命令の処理を2回書かなければならず管理が面倒になる
    55:           //    XEiJ.IRP_ENUM_INDIRECT
    56:           //      手順
    57:           //        命令の処理をenum bodyのメソッドに書く
    58:           //        XEiJ.regOCの上位10bit→enum値の配列を用意する
    59:           //        IRPMAP.IRPMAP0[XEiJ.regOC>>>6].exec()で呼び出す
    60:           //          C言語のときは関数を指すポインタの配列が使えるのでIRPMAP0[XEiJ.regOC>>>6]()で済む
    61:           //      利点
    62:           //        命令の処理を動的に組み替えることができる
    63:           //      欠点
    64:           //        XEiJ.IRP_ENUM_DIRECTよりも遅い
    65:           //          配列参照による多分岐とenum bodyのメソッドの動的呼び出しによる多分岐の2段階になる
    66:           //        XEiJ.IRP_STATICと共存させようとすると命令の処理を2回書かなければならず管理が面倒になる
    67:           //        enum値の配列の初期化コードが大きくなるのでクラスを分ける必要がある
    68:         irpSwitch:
    69:           switch (XEiJ.regOC >>> 6) {  //第1オペコードの上位10ビット。XEiJ.regOCはゼロ拡張されているので0b1111_111_111&を省略
    70: 
    71:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
    72:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
    73:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
    74:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
    75:             //ORI.B #<data>,<ea>                              |-|012346|-|-UUUU|-**00|D M+-WXZ  |0000_000_000_mmm_rrr-{data}
    76:             //OR.B #<data>,<ea>                               |A|012346|-|-UUUU|-**00|  M+-WXZ  |0000_000_000_mmm_rrr-{data}  [ORI.B #<data>,<ea>]
    77:             //ORI.B #<data>,CCR                               |-|012346|-|*****|*****|          |0000_000_000_111_100-{data}
    78:           case 0b0000_000_000:
    79:             irpOriByte ();
    80:             break irpSwitch;
    81: 
    82:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
    83:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
    84:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
    85:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
    86:             //ORI.W #<data>,<ea>                              |-|012346|-|-UUUU|-**00|D M+-WXZ  |0000_000_001_mmm_rrr-{data}
    87:             //OR.W #<data>,<ea>                               |A|012346|-|-UUUU|-**00|  M+-WXZ  |0000_000_001_mmm_rrr-{data}  [ORI.W #<data>,<ea>]
    88:             //ORI.W #<data>,SR                                |-|012346|P|*****|*****|          |0000_000_001_111_100-{data}
    89:           case 0b0000_000_001:
    90:             irpOriWord ();
    91:             break irpSwitch;
    92: 
    93:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
    94:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
    95:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
    96:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
    97:             //ORI.L #<data>,<ea>                              |-|012346|-|-UUUU|-**00|D M+-WXZ  |0000_000_010_mmm_rrr-{data}
    98:             //OR.L #<data>,<ea>                               |A|012346|-|-UUUU|-**00|  M+-WXZ  |0000_000_010_mmm_rrr-{data}  [ORI.L #<data>,<ea>]
    99:           case 0b0000_000_010:
   100:             irpOriLong ();
   101:             break irpSwitch;
   102: 
   103:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   104:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   105:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   106:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   107:             //BITREV.L Dr                                     |-|------|-|-----|-----|D         |0000_000_011_000_rrr (ISA_C)
   108:           case 0b0000_000_011:
   109:             irpCmp2Chk2Byte ();
   110:             break irpSwitch;
   111: 
   112:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   113:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   114:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   115:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   116:             //BTST.L Dq,Dr                                    |-|012346|-|--U--|--*--|D         |0000_qqq_100_000_rrr
   117:             //MOVEP.W (d16,Ar),Dq                             |-|01234S|-|-----|-----|          |0000_qqq_100_001_rrr-{data}
   118:             //BTST.B Dq,<ea>                                  |-|012346|-|--U--|--*--|  M+-WXZPI|0000_qqq_100_mmm_rrr
   119:           case 0b0000_000_100:
   120:           case 0b0000_001_100:
   121:           case 0b0000_010_100:
   122:           case 0b0000_011_100:
   123:           case 0b0000_100_100:
   124:           case 0b0000_101_100:
   125:           case 0b0000_110_100:
   126:           case 0b0000_111_100:
   127:             irpBtstReg ();
   128:             break irpSwitch;
   129: 
   130:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   131:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   132:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   133:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   134:             //BCHG.L Dq,Dr                                    |-|012346|-|--U--|--*--|D         |0000_qqq_101_000_rrr
   135:             //MOVEP.L (d16,Ar),Dq                             |-|01234S|-|-----|-----|          |0000_qqq_101_001_rrr-{data}
   136:             //BCHG.B Dq,<ea>                                  |-|012346|-|--U--|--*--|  M+-WXZ  |0000_qqq_101_mmm_rrr
   137:           case 0b0000_000_101:
   138:           case 0b0000_001_101:
   139:           case 0b0000_010_101:
   140:           case 0b0000_011_101:
   141:           case 0b0000_100_101:
   142:           case 0b0000_101_101:
   143:           case 0b0000_110_101:
   144:           case 0b0000_111_101:
   145:             irpBchgReg ();
   146:             break irpSwitch;
   147: 
   148:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   149:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   150:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   151:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   152:             //BCLR.L Dq,Dr                                    |-|012346|-|--U--|--*--|D         |0000_qqq_110_000_rrr
   153:             //MOVEP.W Dq,(d16,Ar)                             |-|01234S|-|-----|-----|          |0000_qqq_110_001_rrr-{data}
   154:             //BCLR.B Dq,<ea>                                  |-|012346|-|--U--|--*--|  M+-WXZ  |0000_qqq_110_mmm_rrr
   155:           case 0b0000_000_110:
   156:           case 0b0000_001_110:
   157:           case 0b0000_010_110:
   158:           case 0b0000_011_110:
   159:           case 0b0000_100_110:
   160:           case 0b0000_101_110:
   161:           case 0b0000_110_110:
   162:           case 0b0000_111_110:
   163:             irpBclrReg ();
   164:             break irpSwitch;
   165: 
   166:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   167:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   168:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   169:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   170:             //BSET.L Dq,Dr                                    |-|012346|-|--U--|--*--|D         |0000_qqq_111_000_rrr
   171:             //MOVEP.L Dq,(d16,Ar)                             |-|01234S|-|-----|-----|          |0000_qqq_111_001_rrr-{data}
   172:             //BSET.B Dq,<ea>                                  |-|012346|-|--U--|--*--|  M+-WXZ  |0000_qqq_111_mmm_rrr
   173:           case 0b0000_000_111:
   174:           case 0b0000_001_111:
   175:           case 0b0000_010_111:
   176:           case 0b0000_011_111:
   177:           case 0b0000_100_111:
   178:           case 0b0000_101_111:
   179:           case 0b0000_110_111:
   180:           case 0b0000_111_111:
   181:             irpBsetReg ();
   182:             break irpSwitch;
   183: 
   184:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   185:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   186:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   187:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   188:             //ANDI.B #<data>,<ea>                             |-|012346|-|-UUUU|-**00|D M+-WXZ  |0000_001_000_mmm_rrr-{data}
   189:             //AND.B #<data>,<ea>                              |A|012346|-|-UUUU|-**00|  M+-WXZ  |0000_001_000_mmm_rrr-{data}  [ANDI.B #<data>,<ea>]
   190:             //ANDI.B #<data>,CCR                              |-|012346|-|*****|*****|          |0000_001_000_111_100-{data}
   191:           case 0b0000_001_000:
   192:             irpAndiByte ();
   193:             break irpSwitch;
   194: 
   195:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   196:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   197:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   198:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   199:             //ANDI.W #<data>,<ea>                             |-|012346|-|-UUUU|-**00|D M+-WXZ  |0000_001_001_mmm_rrr-{data}
   200:             //AND.W #<data>,<ea>                              |A|012346|-|-UUUU|-**00|  M+-WXZ  |0000_001_001_mmm_rrr-{data}  [ANDI.W #<data>,<ea>]
   201:             //ANDI.W #<data>,SR                               |-|012346|P|*****|*****|          |0000_001_001_111_100-{data}
   202:           case 0b0000_001_001:
   203:             irpAndiWord ();
   204:             break irpSwitch;
   205: 
   206:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   207:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   208:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   209:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   210:             //ANDI.L #<data>,<ea>                             |-|012346|-|-UUUU|-**00|D M+-WXZ  |0000_001_010_mmm_rrr-{data}
   211:             //AND.L #<data>,<ea>                              |A|012346|-|-UUUU|-**00|  M+-WXZ  |0000_001_010_mmm_rrr-{data}  [ANDI.L #<data>,<ea>]
   212:           case 0b0000_001_010:
   213:             irpAndiLong ();
   214:             break irpSwitch;
   215: 
   216:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   217:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   218:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   219:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   220:             //BYTEREV.L Dr                                    |-|------|-|-----|-----|D         |0000_001_011_000_rrr (ISA_C)
   221:           case 0b0000_001_011:
   222:             irpCmp2Chk2Word ();
   223:             break irpSwitch;
   224: 
   225:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   226:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   227:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   228:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   229:             //SUBI.B #<data>,<ea>                             |-|012346|-|UUUUU|*****|D M+-WXZ  |0000_010_000_mmm_rrr-{data}
   230:             //SUB.B #<data>,<ea>                              |A|012346|-|UUUUU|*****|  M+-WXZ  |0000_010_000_mmm_rrr-{data}  [SUBI.B #<data>,<ea>]
   231:           case 0b0000_010_000:
   232:             irpSubiByte ();
   233:             break irpSwitch;
   234: 
   235:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   236:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   237:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   238:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   239:             //SUBI.W #<data>,<ea>                             |-|012346|-|UUUUU|*****|D M+-WXZ  |0000_010_001_mmm_rrr-{data}
   240:             //SUB.W #<data>,<ea>                              |A|012346|-|UUUUU|*****|  M+-WXZ  |0000_010_001_mmm_rrr-{data}  [SUBI.W #<data>,<ea>]
   241:           case 0b0000_010_001:
   242:             irpSubiWord ();
   243:             break irpSwitch;
   244: 
   245:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   246:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   247:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   248:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   249:             //SUBI.L #<data>,<ea>                             |-|012346|-|UUUUU|*****|D M+-WXZ  |0000_010_010_mmm_rrr-{data}
   250:             //SUB.L #<data>,<ea>                              |A|012346|-|UUUUU|*****|  M+-WXZ  |0000_010_010_mmm_rrr-{data}  [SUBI.L #<data>,<ea>]
   251:           case 0b0000_010_010:
   252:             irpSubiLong ();
   253:             break irpSwitch;
   254: 
   255:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   256:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   257:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   258:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   259:             //FF1.L Dr                                        |-|------|-|-UUUU|-**00|D         |0000_010_011_000_rrr (ISA_C)
   260:           case 0b0000_010_011:
   261:             irpCmp2Chk2Long ();
   262:             break irpSwitch;
   263: 
   264:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   265:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   266:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   267:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   268:             //ADDI.B #<data>,<ea>                             |-|012346|-|UUUUU|*****|D M+-WXZ  |0000_011_000_mmm_rrr-{data}
   269:           case 0b0000_011_000:
   270:             irpAddiByte ();
   271:             break irpSwitch;
   272: 
   273:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   274:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   275:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   276:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   277:             //ADDI.W #<data>,<ea>                             |-|012346|-|UUUUU|*****|D M+-WXZ  |0000_011_001_mmm_rrr-{data}
   278:           case 0b0000_011_001:
   279:             irpAddiWord ();
   280:             break irpSwitch;
   281: 
   282:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   283:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   284:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   285:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   286:             //ADDI.L #<data>,<ea>                             |-|012346|-|UUUUU|*****|D M+-WXZ  |0000_011_010_mmm_rrr-{data}
   287:           case 0b0000_011_010:
   288:             irpAddiLong ();
   289:             break irpSwitch;
   290: 
   291:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   292:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   293:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   294:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   295:             //BTST.L #<data>,Dr                               |-|012346|-|--U--|--*--|D         |0000_100_000_000_rrr-{data}
   296:             //BTST.B #<data>,<ea>                             |-|012346|-|--U--|--*--|  M+-WXZP |0000_100_000_mmm_rrr-{data}
   297:           case 0b0000_100_000:
   298:             irpBtstImm ();
   299:             break irpSwitch;
   300: 
   301:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   302:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   303:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   304:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   305:             //BCHG.L #<data>,Dr                               |-|012346|-|--U--|--*--|D         |0000_100_001_000_rrr-{data}
   306:             //BCHG.B #<data>,<ea>                             |-|012346|-|--U--|--*--|  M+-WXZ  |0000_100_001_mmm_rrr-{data}
   307:           case 0b0000_100_001:
   308:             irpBchgImm ();
   309:             break irpSwitch;
   310: 
   311:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   312:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   313:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   314:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   315:             //BCLR.L #<data>,Dr                               |-|012346|-|--U--|--*--|D         |0000_100_010_000_rrr-{data}
   316:             //BCLR.B #<data>,<ea>                             |-|012346|-|--U--|--*--|  M+-WXZ  |0000_100_010_mmm_rrr-{data}
   317:           case 0b0000_100_010:
   318:             irpBclrImm ();
   319:             break irpSwitch;
   320: 
   321:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   322:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   323:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   324:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   325:             //BSET.L #<data>,Dr                               |-|012346|-|--U--|--*--|D         |0000_100_011_000_rrr-{data}
   326:             //BSET.B #<data>,<ea>                             |-|012346|-|--U--|--*--|  M+-WXZ  |0000_100_011_mmm_rrr-{data}
   327:           case 0b0000_100_011:
   328:             irpBsetImm ();
   329:             break irpSwitch;
   330: 
   331:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   332:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   333:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   334:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   335:             //EORI.B #<data>,<ea>                             |-|012346|-|-UUUU|-**00|D M+-WXZ  |0000_101_000_mmm_rrr-{data}
   336:             //EOR.B #<data>,<ea>                              |A|012346|-|-UUUU|-**00|D M+-WXZ  |0000_101_000_mmm_rrr-{data}  [EORI.B #<data>,<ea>]
   337:             //EORI.B #<data>,CCR                              |-|012346|-|*****|*****|          |0000_101_000_111_100-{data}
   338:           case 0b0000_101_000:
   339:             irpEoriByte ();
   340:             break irpSwitch;
   341: 
   342:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   343:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   344:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   345:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   346:             //EORI.W #<data>,<ea>                             |-|012346|-|-UUUU|-**00|D M+-WXZ  |0000_101_001_mmm_rrr-{data}
   347:             //EOR.W #<data>,<ea>                              |A|012346|-|-UUUU|-**00|D M+-WXZ  |0000_101_001_mmm_rrr-{data}  [EORI.W #<data>,<ea>]
   348:             //EORI.W #<data>,SR                               |-|012346|P|*****|*****|          |0000_101_001_111_100-{data}
   349:           case 0b0000_101_001:
   350:             irpEoriWord ();
   351:             break irpSwitch;
   352: 
   353:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   354:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   355:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   356:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   357:             //EORI.L #<data>,<ea>                             |-|012346|-|-UUUU|-**00|D M+-WXZ  |0000_101_010_mmm_rrr-{data}
   358:             //EOR.L #<data>,<ea>                              |A|012346|-|-UUUU|-**00|D M+-WXZ  |0000_101_010_mmm_rrr-{data}  [EORI.L #<data>,<ea>]
   359:           case 0b0000_101_010:
   360:             irpEoriLong ();
   361:             break irpSwitch;
   362: 
   363:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   364:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   365:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   366:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   367:             //CMPI.B #<data>,<ea>                             |-|01----|-|-UUUU|-****|D M+-WXZ  |0000_110_000_mmm_rrr-{data}
   368:             //CMP.B #<data>,<ea>                              |A|01----|-|-UUUU|-****|  M+-WXZ  |0000_110_000_mmm_rrr-{data}  [CMPI.B #<data>,<ea>]
   369:           case 0b0000_110_000:
   370:             irpCmpiByte ();
   371:             break irpSwitch;
   372: 
   373:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   374:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   375:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   376:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   377:             //CMPI.W #<data>,<ea>                             |-|01----|-|-UUUU|-****|D M+-WXZ  |0000_110_001_mmm_rrr-{data}
   378:             //CMP.W #<data>,<ea>                              |A|01----|-|-UUUU|-****|  M+-WXZ  |0000_110_001_mmm_rrr-{data}  [CMPI.W #<data>,<ea>]
   379:           case 0b0000_110_001:
   380:             irpCmpiWord ();
   381:             break irpSwitch;
   382: 
   383:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   384:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   385:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   386:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   387:             //CMPI.L #<data>,<ea>                             |-|01----|-|-UUUU|-****|D M+-WXZ  |0000_110_010_mmm_rrr-{data}
   388:             //CMP.L #<data>,<ea>                              |A|01----|-|-UUUU|-****|  M+-WXZ  |0000_110_010_mmm_rrr-{data}  [CMPI.L #<data>,<ea>]
   389:           case 0b0000_110_010:
   390:             irpCmpiLong ();
   391:             break irpSwitch;
   392: 
   393:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   394:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   395:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   396:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   397:             //MOVE.B <ea>,Dq                                  |-|012346|-|-UUUU|-**00|D M+-WXZPI|0001_qqq_000_mmm_rrr
   398:           case 0b0001_000_000:
   399:           case 0b0001_001_000:
   400:           case 0b0001_010_000:
   401:           case 0b0001_011_000:
   402:           case 0b0001_100_000:
   403:           case 0b0001_101_000:
   404:           case 0b0001_110_000:
   405:           case 0b0001_111_000:
   406:             irpMoveToDRByte ();
   407:             break irpSwitch;
   408: 
   409:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   410:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   411:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   412:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   413:             //MOVE.B <ea>,(Aq)                                |-|012346|-|-UUUU|-**00|D M+-WXZPI|0001_qqq_010_mmm_rrr
   414:           case 0b0001_000_010:
   415:           case 0b0001_001_010:
   416:           case 0b0001_010_010:
   417:           case 0b0001_011_010:
   418:           case 0b0001_100_010:
   419:           case 0b0001_101_010:
   420:           case 0b0001_110_010:
   421:           case 0b0001_111_010:
   422:             irpMoveToMMByte ();
   423:             break irpSwitch;
   424: 
   425:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   426:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   427:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   428:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   429:             //MOVE.B <ea>,(Aq)+                               |-|012346|-|-UUUU|-**00|D M+-WXZPI|0001_qqq_011_mmm_rrr
   430:           case 0b0001_000_011:
   431:           case 0b0001_001_011:
   432:           case 0b0001_010_011:
   433:           case 0b0001_011_011:
   434:           case 0b0001_100_011:
   435:           case 0b0001_101_011:
   436:           case 0b0001_110_011:
   437:           case 0b0001_111_011:
   438:             irpMoveToMPByte ();
   439:             break irpSwitch;
   440: 
   441:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   442:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   443:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   444:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   445:             //MOVE.B <ea>,-(Aq)                               |-|012346|-|-UUUU|-**00|D M+-WXZPI|0001_qqq_100_mmm_rrr
   446:           case 0b0001_000_100:
   447:           case 0b0001_001_100:
   448:           case 0b0001_010_100:
   449:           case 0b0001_011_100:
   450:           case 0b0001_100_100:
   451:           case 0b0001_101_100:
   452:           case 0b0001_110_100:
   453:           case 0b0001_111_100:
   454:             irpMoveToMNByte ();
   455:             break irpSwitch;
   456: 
   457:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   458:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   459:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   460:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   461:             //MOVE.B <ea>,(d16,Aq)                            |-|012346|-|-UUUU|-**00|D M+-WXZPI|0001_qqq_101_mmm_rrr
   462:           case 0b0001_000_101:
   463:           case 0b0001_001_101:
   464:           case 0b0001_010_101:
   465:           case 0b0001_011_101:
   466:           case 0b0001_100_101:
   467:           case 0b0001_101_101:
   468:           case 0b0001_110_101:
   469:           case 0b0001_111_101:
   470:             irpMoveToMWByte ();
   471:             break irpSwitch;
   472: 
   473:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   474:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   475:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   476:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   477:             //MOVE.B <ea>,(d8,Aq,Rn.wl)                       |-|012346|-|-UUUU|-**00|D M+-WXZPI|0001_qqq_110_mmm_rrr
   478:           case 0b0001_000_110:
   479:           case 0b0001_001_110:
   480:           case 0b0001_010_110:
   481:           case 0b0001_011_110:
   482:           case 0b0001_100_110:
   483:           case 0b0001_101_110:
   484:           case 0b0001_110_110:
   485:           case 0b0001_111_110:
   486:             irpMoveToMXByte ();
   487:             break irpSwitch;
   488: 
   489:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   490:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   491:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   492:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   493:             //MOVE.B <ea>,(xxx).W                             |-|012346|-|-UUUU|-**00|D M+-WXZPI|0001_000_111_mmm_rrr
   494:           case 0b0001_000_111:
   495:             irpMoveToZWByte ();
   496:             break irpSwitch;
   497: 
   498:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   499:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   500:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   501:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   502:             //MOVE.B <ea>,(xxx).L                             |-|012346|-|-UUUU|-**00|D M+-WXZPI|0001_001_111_mmm_rrr
   503:           case 0b0001_001_111:
   504:             irpMoveToZLByte ();
   505:             break irpSwitch;
   506: 
   507:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   508:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   509:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   510:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   511:             //MOVE.L <ea>,Dq                                  |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0010_qqq_000_mmm_rrr
   512:           case 0b0010_000_000:
   513:           case 0b0010_001_000:
   514:           case 0b0010_010_000:
   515:           case 0b0010_011_000:
   516:           case 0b0010_100_000:
   517:           case 0b0010_101_000:
   518:           case 0b0010_110_000:
   519:           case 0b0010_111_000:
   520:             irpMoveToDRLong ();
   521:             break irpSwitch;
   522: 
   523:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   524:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   525:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   526:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   527:             //MOVEA.L <ea>,Aq                                 |-|012346|-|-----|-----|DAM+-WXZPI|0010_qqq_001_mmm_rrr
   528:             //MOVE.L <ea>,Aq                                  |A|012346|-|-----|-----|DAM+-WXZPI|0010_qqq_001_mmm_rrr [MOVEA.L <ea>,Aq]
   529:           case 0b0010_000_001:
   530:           case 0b0010_001_001:
   531:           case 0b0010_010_001:
   532:           case 0b0010_011_001:
   533:           case 0b0010_100_001:
   534:           case 0b0010_101_001:
   535:           case 0b0010_110_001:
   536:           case 0b0010_111_001:
   537:             irpMoveaLong ();
   538:             break irpSwitch;
   539: 
   540:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   541:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   542:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   543:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   544:             //MOVE.L <ea>,(Aq)                                |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0010_qqq_010_mmm_rrr
   545:           case 0b0010_000_010:
   546:           case 0b0010_001_010:
   547:           case 0b0010_010_010:
   548:           case 0b0010_011_010:
   549:           case 0b0010_100_010:
   550:           case 0b0010_101_010:
   551:           case 0b0010_110_010:
   552:           case 0b0010_111_010:
   553:             irpMoveToMMLong ();
   554:             break irpSwitch;
   555: 
   556:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   557:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   558:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   559:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   560:             //MOVE.L <ea>,(Aq)+                               |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0010_qqq_011_mmm_rrr
   561:           case 0b0010_000_011:
   562:           case 0b0010_001_011:
   563:           case 0b0010_010_011:
   564:           case 0b0010_011_011:
   565:           case 0b0010_100_011:
   566:           case 0b0010_101_011:
   567:           case 0b0010_110_011:
   568:           case 0b0010_111_011:
   569:             irpMoveToMPLong ();
   570:             break irpSwitch;
   571: 
   572:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   573:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   574:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   575:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   576:             //MOVE.L <ea>,-(Aq)                               |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0010_qqq_100_mmm_rrr
   577:           case 0b0010_000_100:
   578:           case 0b0010_001_100:
   579:           case 0b0010_010_100:
   580:           case 0b0010_011_100:
   581:           case 0b0010_100_100:
   582:           case 0b0010_101_100:
   583:           case 0b0010_110_100:
   584:           case 0b0010_111_100:
   585:             irpMoveToMNLong ();
   586:             break irpSwitch;
   587: 
   588:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   589:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   590:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   591:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   592:             //MOVE.L <ea>,(d16,Aq)                            |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0010_qqq_101_mmm_rrr
   593:           case 0b0010_000_101:
   594:           case 0b0010_001_101:
   595:           case 0b0010_010_101:
   596:           case 0b0010_011_101:
   597:           case 0b0010_100_101:
   598:           case 0b0010_101_101:
   599:           case 0b0010_110_101:
   600:           case 0b0010_111_101:
   601:             irpMoveToMWLong ();
   602:             break irpSwitch;
   603: 
   604:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   605:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   606:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   607:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   608:             //MOVE.L <ea>,(d8,Aq,Rn.wl)                       |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0010_qqq_110_mmm_rrr
   609:           case 0b0010_000_110:
   610:           case 0b0010_001_110:
   611:           case 0b0010_010_110:
   612:           case 0b0010_011_110:
   613:           case 0b0010_100_110:
   614:           case 0b0010_101_110:
   615:           case 0b0010_110_110:
   616:           case 0b0010_111_110:
   617:             irpMoveToMXLong ();
   618:             break irpSwitch;
   619: 
   620:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   621:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   622:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   623:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   624:             //MOVE.L <ea>,(xxx).W                             |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0010_000_111_mmm_rrr
   625:           case 0b0010_000_111:
   626:             irpMoveToZWLong ();
   627:             break irpSwitch;
   628: 
   629:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   630:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   631:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   632:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   633:             //MOVE.L <ea>,(xxx).L                             |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0010_001_111_mmm_rrr
   634:           case 0b0010_001_111:
   635:             irpMoveToZLLong ();
   636:             break irpSwitch;
   637: 
   638:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   639:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   640:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   641:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   642:             //MOVE.W <ea>,Dq                                  |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0011_qqq_000_mmm_rrr
   643:           case 0b0011_000_000:
   644:           case 0b0011_001_000:
   645:           case 0b0011_010_000:
   646:           case 0b0011_011_000:
   647:           case 0b0011_100_000:
   648:           case 0b0011_101_000:
   649:           case 0b0011_110_000:
   650:           case 0b0011_111_000:
   651:             irpMoveToDRWord ();
   652:             break irpSwitch;
   653: 
   654:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   655:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   656:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   657:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   658:             //MOVEA.W <ea>,Aq                                 |-|012346|-|-----|-----|DAM+-WXZPI|0011_qqq_001_mmm_rrr
   659:             //MOVE.W <ea>,Aq                                  |A|012346|-|-----|-----|DAM+-WXZPI|0011_qqq_001_mmm_rrr [MOVEA.W <ea>,Aq]
   660:           case 0b0011_000_001:
   661:           case 0b0011_001_001:
   662:           case 0b0011_010_001:
   663:           case 0b0011_011_001:
   664:           case 0b0011_100_001:
   665:           case 0b0011_101_001:
   666:           case 0b0011_110_001:
   667:           case 0b0011_111_001:
   668:             irpMoveaWord ();
   669:             break irpSwitch;
   670: 
   671:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   672:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   673:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   674:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   675:             //MOVE.W <ea>,(Aq)                                |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0011_qqq_010_mmm_rrr
   676:           case 0b0011_000_010:
   677:           case 0b0011_001_010:
   678:           case 0b0011_010_010:
   679:           case 0b0011_011_010:
   680:           case 0b0011_100_010:
   681:           case 0b0011_101_010:
   682:           case 0b0011_110_010:
   683:           case 0b0011_111_010:
   684:             irpMoveToMMWord ();
   685:             break irpSwitch;
   686: 
   687:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   688:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   689:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   690:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   691:             //MOVE.W <ea>,(Aq)+                               |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0011_qqq_011_mmm_rrr
   692:           case 0b0011_000_011:
   693:           case 0b0011_001_011:
   694:           case 0b0011_010_011:
   695:           case 0b0011_011_011:
   696:           case 0b0011_100_011:
   697:           case 0b0011_101_011:
   698:           case 0b0011_110_011:
   699:           case 0b0011_111_011:
   700:             irpMoveToMPWord ();
   701:             break irpSwitch;
   702: 
   703:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   704:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   705:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   706:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   707:             //MOVE.W <ea>,-(Aq)                               |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0011_qqq_100_mmm_rrr
   708:           case 0b0011_000_100:
   709:           case 0b0011_001_100:
   710:           case 0b0011_010_100:
   711:           case 0b0011_011_100:
   712:           case 0b0011_100_100:
   713:           case 0b0011_101_100:
   714:           case 0b0011_110_100:
   715:           case 0b0011_111_100:
   716:             irpMoveToMNWord ();
   717:             break irpSwitch;
   718: 
   719:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   720:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   721:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   722:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   723:             //MOVE.W <ea>,(d16,Aq)                            |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0011_qqq_101_mmm_rrr
   724:           case 0b0011_000_101:
   725:           case 0b0011_001_101:
   726:           case 0b0011_010_101:
   727:           case 0b0011_011_101:
   728:           case 0b0011_100_101:
   729:           case 0b0011_101_101:
   730:           case 0b0011_110_101:
   731:           case 0b0011_111_101:
   732:             irpMoveToMWWord ();
   733:             break irpSwitch;
   734: 
   735:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   736:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   737:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   738:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   739:             //MOVE.W <ea>,(d8,Aq,Rn.wl)                       |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0011_qqq_110_mmm_rrr
   740:           case 0b0011_000_110:
   741:           case 0b0011_001_110:
   742:           case 0b0011_010_110:
   743:           case 0b0011_011_110:
   744:           case 0b0011_100_110:
   745:           case 0b0011_101_110:
   746:           case 0b0011_110_110:
   747:           case 0b0011_111_110:
   748:             irpMoveToMXWord ();
   749:             break irpSwitch;
   750: 
   751:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   752:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   753:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   754:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   755:             //MOVE.W <ea>,(xxx).W                             |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0011_000_111_mmm_rrr
   756:           case 0b0011_000_111:
   757:             irpMoveToZWWord ();
   758:             break irpSwitch;
   759: 
   760:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   761:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   762:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   763:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   764:             //MOVE.W <ea>,(xxx).L                             |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0011_001_111_mmm_rrr
   765:           case 0b0011_001_111:
   766:             irpMoveToZLWord ();
   767:             break irpSwitch;
   768: 
   769:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   770:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   771:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   772:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   773:             //NEGX.B <ea>                                     |-|012346|-|*UUUU|*****|D M+-WXZ  |0100_000_000_mmm_rrr
   774:           case 0b0100_000_000:
   775:             irpNegxByte ();
   776:             break irpSwitch;
   777: 
   778:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   779:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   780:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   781:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   782:             //NEGX.W <ea>                                     |-|012346|-|*UUUU|*****|D M+-WXZ  |0100_000_001_mmm_rrr
   783:           case 0b0100_000_001:
   784:             irpNegxWord ();
   785:             break irpSwitch;
   786: 
   787:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   788:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   789:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   790:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   791:             //NEGX.L <ea>                                     |-|012346|-|*UUUU|*****|D M+-WXZ  |0100_000_010_mmm_rrr
   792:           case 0b0100_000_010:
   793:             irpNegxLong ();
   794:             break irpSwitch;
   795: 
   796:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   797:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   798:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   799:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   800:             //MOVE.W SR,<ea>                                  |-|0-----|-|*****|-----|D M+-WXZ  |0100_000_011_mmm_rrr (68000 and 68008 read before move)
   801:           case 0b0100_000_011:
   802:             irpMoveFromSR ();
   803:             break irpSwitch;
   804: 
   805:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   806:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   807:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   808:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   809:             //CHK.W <ea>,Dq                                   |-|012346|-|-UUUU|-*UUU|D M+-WXZPI|0100_qqq_110_mmm_rrr
   810:           case 0b0100_000_110:
   811:           case 0b0100_001_110:
   812:           case 0b0100_010_110:
   813:           case 0b0100_011_110:
   814:           case 0b0100_100_110:
   815:           case 0b0100_101_110:
   816:           case 0b0100_110_110:
   817:           case 0b0100_111_110:
   818:             irpChkWord ();
   819:             break irpSwitch;
   820: 
   821:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   822:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   823:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   824:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   825:             //LEA.L <ea>,Aq                                   |-|012346|-|-----|-----|  M  WXZP |0100_qqq_111_mmm_rrr
   826:           case 0b0100_000_111:
   827:           case 0b0100_001_111:
   828:           case 0b0100_010_111:
   829:           case 0b0100_011_111:
   830:           case 0b0100_100_111:
   831:           case 0b0100_101_111:
   832:           case 0b0100_110_111:
   833:           case 0b0100_111_111:
   834:             irpLea ();
   835:             break irpSwitch;
   836: 
   837:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   838:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   839:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   840:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   841:             //CLR.B <ea>                                      |-|012346|-|-UUUU|-0100|D M+-WXZ  |0100_001_000_mmm_rrr (68000 and 68008 read before clear)
   842:           case 0b0100_001_000:
   843:             irpClrByte ();
   844:             break irpSwitch;
   845: 
   846:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   847:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   848:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   849:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   850:             //CLR.W <ea>                                      |-|012346|-|-UUUU|-0100|D M+-WXZ  |0100_001_001_mmm_rrr (68000 and 68008 read before clear)
   851:           case 0b0100_001_001:
   852:             irpClrWord ();
   853:             break irpSwitch;
   854: 
   855:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   856:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   857:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   858:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   859:             //CLR.L <ea>                                      |-|012346|-|-UUUU|-0100|D M+-WXZ  |0100_001_010_mmm_rrr (68000 and 68008 read before clear)
   860:           case 0b0100_001_010:
   861:             irpClrLong ();
   862:             break irpSwitch;
   863: 
   864:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   865:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   866:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   867:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   868:             //NEG.B <ea>                                      |-|012346|-|UUUUU|*****|D M+-WXZ  |0100_010_000_mmm_rrr
   869:           case 0b0100_010_000:
   870:             irpNegByte ();
   871:             break irpSwitch;
   872: 
   873:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   874:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   875:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   876:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   877:             //NEG.W <ea>                                      |-|012346|-|UUUUU|*****|D M+-WXZ  |0100_010_001_mmm_rrr
   878:           case 0b0100_010_001:
   879:             irpNegWord ();
   880:             break irpSwitch;
   881: 
   882:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   883:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   884:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   885:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   886:             //NEG.L <ea>                                      |-|012346|-|UUUUU|*****|D M+-WXZ  |0100_010_010_mmm_rrr
   887:           case 0b0100_010_010:
   888:             irpNegLong ();
   889:             break irpSwitch;
   890: 
   891:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   892:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   893:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   894:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   895:             //MOVE.W <ea>,CCR                                 |-|012346|-|UUUUU|*****|D M+-WXZPI|0100_010_011_mmm_rrr
   896:           case 0b0100_010_011:
   897:             irpMoveToCCR ();
   898:             break irpSwitch;
   899: 
   900:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   901:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   902:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   903:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   904:             //NOT.B <ea>                                      |-|012346|-|-UUUU|-**00|D M+-WXZ  |0100_011_000_mmm_rrr
   905:           case 0b0100_011_000:
   906:             irpNotByte ();
   907:             break irpSwitch;
   908: 
   909:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   910:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   911:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   912:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   913:             //NOT.W <ea>                                      |-|012346|-|-UUUU|-**00|D M+-WXZ  |0100_011_001_mmm_rrr
   914:           case 0b0100_011_001:
   915:             irpNotWord ();
   916:             break irpSwitch;
   917: 
   918:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   919:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   920:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   921:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   922:             //NOT.L <ea>                                      |-|012346|-|-UUUU|-**00|D M+-WXZ  |0100_011_010_mmm_rrr
   923:           case 0b0100_011_010:
   924:             irpNotLong ();
   925:             break irpSwitch;
   926: 
   927:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   928:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   929:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   930:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   931:             //MOVE.W <ea>,SR                                  |-|012346|P|UUUUU|*****|D M+-WXZPI|0100_011_011_mmm_rrr
   932:           case 0b0100_011_011:
   933:             irpMoveToSR ();
   934:             break irpSwitch;
   935: 
   936:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   937:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   938:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   939:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   940:             //NBCD.B <ea>                                     |-|012346|-|UUUUU|*U*U*|D M+-WXZ  |0100_100_000_mmm_rrr
   941:           case 0b0100_100_000:
   942:             irpNbcd ();
   943:             break irpSwitch;
   944: 
   945:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   946:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   947:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   948:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   949:             //SWAP.W Dr                                       |-|012346|-|-UUUU|-**00|D         |0100_100_001_000_rrr
   950:             //PEA.L <ea>                                      |-|012346|-|-----|-----|  M  WXZP |0100_100_001_mmm_rrr
   951:           case 0b0100_100_001:
   952:             irpPea ();
   953:             break irpSwitch;
   954: 
   955:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   956:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   957:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   958:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   959:             //EXT.W Dr                                        |-|012346|-|-UUUU|-**00|D         |0100_100_010_000_rrr
   960:             //MOVEM.W <list>,<ea>                             |-|012346|-|-----|-----|  M -WXZ  |0100_100_010_mmm_rrr-llllllllllllllll
   961:           case 0b0100_100_010:
   962:             irpMovemToMemWord ();
   963:             break irpSwitch;
   964: 
   965:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   966:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   967:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   968:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   969:             //EXT.L Dr                                        |-|012346|-|-UUUU|-**00|D         |0100_100_011_000_rrr
   970:             //MOVEM.L <list>,<ea>                             |-|012346|-|-----|-----|  M -WXZ  |0100_100_011_mmm_rrr-llllllllllllllll
   971:           case 0b0100_100_011:
   972:             irpMovemToMemLong ();
   973:             break irpSwitch;
   974: 
   975:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   976:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   977:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   978:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   979:             //TST.B <ea>                                      |-|012346|-|-UUUU|-**00|D M+-WXZ  |0100_101_000_mmm_rrr
   980:           case 0b0100_101_000:
   981:             irpTstByte ();
   982:             break irpSwitch;
   983: 
   984:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   985:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   986:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   987:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   988:             //TST.W <ea>                                      |-|012346|-|-UUUU|-**00|D M+-WXZ  |0100_101_001_mmm_rrr
   989:           case 0b0100_101_001:
   990:             irpTstWord ();
   991:             break irpSwitch;
   992: 
   993:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   994:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
   995:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
   996:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
   997:             //TST.L <ea>                                      |-|012346|-|-UUUU|-**00|D M+-WXZ  |0100_101_010_mmm_rrr
   998:           case 0b0100_101_010:
   999:             irpTstLong ();
  1000:             break irpSwitch;
  1001: 
  1002:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1003:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1004:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1005:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1006:             //TAS.B <ea>                                      |-|012346|-|-UUUU|-**00|D M+-WXZ  |0100_101_011_mmm_rrr
  1007:             //ILLEGAL                                         |-|012346|-|-----|-----|          |0100_101_011_111_100
  1008:           case 0b0100_101_011:
  1009:             irpTas ();
  1010:             break irpSwitch;
  1011: 
  1012:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1013:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1014:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1015:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1016:             //SATS.L Dr                                       |-|------|-|-UUUU|-**00|D         |0100_110_010_000_rrr (ISA_B)
  1017:             //MOVEM.W <ea>,<list>                             |-|012346|-|-----|-----|  M+ WXZP |0100_110_010_mmm_rrr-llllllllllllllll
  1018:           case 0b0100_110_010:
  1019:             irpMovemToRegWord ();
  1020:             break irpSwitch;
  1021: 
  1022:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1023:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1024:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1025:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1026:             //MOVEM.L <ea>,<list>                             |-|012346|-|-----|-----|  M+ WXZP |0100_110_011_mmm_rrr-llllllllllllllll
  1027:           case 0b0100_110_011:
  1028:             irpMovemToRegLong ();
  1029:             break irpSwitch;
  1030: 
  1031:           case 0b0100_111_001:
  1032:             switch (XEiJ.regOC & 0b111_111) {
  1033: 
  1034:               //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1035:               //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1036:               //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1037:               //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1038:               //TRAP #<vector>                                  |-|012346|-|-----|-----|          |0100_111_001_00v_vvv
  1039:             case 0b000_000:
  1040:             case 0b000_001:
  1041:             case 0b000_010:
  1042:             case 0b000_011:
  1043:             case 0b000_100:
  1044:             case 0b000_101:
  1045:             case 0b000_110:
  1046:             case 0b000_111:
  1047:             case 0b001_000:
  1048:             case 0b001_001:
  1049:             case 0b001_010:
  1050:             case 0b001_011:
  1051:             case 0b001_100:
  1052:             case 0b001_101:
  1053:             case 0b001_110:
  1054:               irpTrap ();
  1055:               break irpSwitch;
  1056:             case 0b001_111:
  1057:               irpTrap15 ();
  1058:               break irpSwitch;
  1059: 
  1060:               //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1061:               //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1062:               //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1063:               //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1064:               //LINK.W Ar,#<data>                               |-|012346|-|-----|-----|          |0100_111_001_010_rrr-{data}
  1065:             case 0b010_000:
  1066:             case 0b010_001:
  1067:             case 0b010_010:
  1068:             case 0b010_011:
  1069:             case 0b010_100:
  1070:             case 0b010_101:
  1071:             case 0b010_110:
  1072:             case 0b010_111:
  1073:               irpLinkWord ();
  1074:               break irpSwitch;
  1075: 
  1076:               //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1077:               //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1078:               //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1079:               //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1080:               //UNLK Ar                                         |-|012346|-|-----|-----|          |0100_111_001_011_rrr
  1081:             case 0b011_000:
  1082:             case 0b011_001:
  1083:             case 0b011_010:
  1084:             case 0b011_011:
  1085:             case 0b011_100:
  1086:             case 0b011_101:
  1087:             case 0b011_110:
  1088:             case 0b011_111:
  1089:               irpUnlk ();
  1090:               break irpSwitch;
  1091: 
  1092:               //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1093:               //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1094:               //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1095:               //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1096:               //MOVE.L Ar,USP                                   |-|012346|P|-----|-----|          |0100_111_001_100_rrr
  1097:             case 0b100_000:
  1098:             case 0b100_001:
  1099:             case 0b100_010:
  1100:             case 0b100_011:
  1101:             case 0b100_100:
  1102:             case 0b100_101:
  1103:             case 0b100_110:
  1104:             case 0b100_111:
  1105:               irpMoveToUsp ();
  1106:               break irpSwitch;
  1107: 
  1108:               //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1109:               //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1110:               //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1111:               //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1112:               //MOVE.L USP,Ar                                   |-|012346|P|-----|-----|          |0100_111_001_101_rrr
  1113:             case 0b101_000:
  1114:             case 0b101_001:
  1115:             case 0b101_010:
  1116:             case 0b101_011:
  1117:             case 0b101_100:
  1118:             case 0b101_101:
  1119:             case 0b101_110:
  1120:             case 0b101_111:
  1121:               irpMoveFromUsp ();
  1122:               break irpSwitch;
  1123: 
  1124:               //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1125:               //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1126:               //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1127:               //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1128:               //RESET                                           |-|012346|P|-----|-----|          |0100_111_001_110_000
  1129:             case 0b110_000:
  1130:               irpReset ();
  1131:               break irpSwitch;
  1132: 
  1133:               //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1134:               //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1135:               //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1136:               //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1137:               //NOP                                             |-|012346|-|-----|-----|          |0100_111_001_110_001
  1138:             case 0b110_001:
  1139:               irpNop ();
  1140:               break irpSwitch;
  1141: 
  1142:               //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1143:               //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1144:               //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1145:               //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1146:               //STOP #<data>                                    |-|012346|P|UUUUU|*****|          |0100_111_001_110_010-{data}
  1147:             case 0b110_010:
  1148:               irpStop ();
  1149:               break irpSwitch;
  1150: 
  1151:               //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1152:               //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1153:               //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1154:               //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1155:               //RTE                                             |-|012346|P|UUUUU|*****|          |0100_111_001_110_011
  1156:             case 0b110_011:
  1157:               irpRte ();
  1158:               break irpSwitch;
  1159: 
  1160:               //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1161:               //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1162:               //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1163:               //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1164:               //RTS                                             |-|012346|-|-----|-----|          |0100_111_001_110_101
  1165:             case 0b110_101:
  1166:               irpRts ();
  1167:               break irpSwitch;
  1168: 
  1169:               //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1170:               //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1171:               //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1172:               //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1173:               //TRAPV                                           |-|012346|-|---*-|-----|          |0100_111_001_110_110
  1174:             case 0b110_110:
  1175:               irpTrapv ();
  1176:               break irpSwitch;
  1177: 
  1178:               //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1179:               //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1180:               //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1181:               //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1182:               //RTR                                             |-|012346|-|UUUUU|*****|          |0100_111_001_110_111
  1183:             case 0b110_111:
  1184:               irpRtr ();
  1185:               break irpSwitch;
  1186: 
  1187:             default:
  1188:               irpIllegal ();
  1189: 
  1190:             }  //switch XEiJ.regOC & 0b111_111
  1191:             break irpSwitch;
  1192: 
  1193:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1194:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1195:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1196:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1197:             //JSR <ea>                                        |-|012346|-|-----|-----|  M  WXZP |0100_111_010_mmm_rrr
  1198:             //JBSR.L <label>                                  |A|012346|-|-----|-----|          |0100_111_010_111_001-{address}       [JSR <label>]
  1199:           case 0b0100_111_010:
  1200:             irpJsr ();
  1201:             break irpSwitch;
  1202: 
  1203:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1204:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1205:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1206:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1207:             //JMP <ea>                                        |-|012346|-|-----|-----|  M  WXZP |0100_111_011_mmm_rrr
  1208:             //JBRA.L <label>                                  |A|012346|-|-----|-----|          |0100_111_011_111_001-{address}       [JMP <label>]
  1209:           case 0b0100_111_011:
  1210:             irpJmp ();
  1211:             break irpSwitch;
  1212: 
  1213:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1214:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1215:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1216:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1217:             //ADDQ.B #<data>,<ea>                             |-|012346|-|UUUUU|*****|D M+-WXZ  |0101_qqq_000_mmm_rrr
  1218:             //INC.B <ea>                                      |A|012346|-|UUUUU|*****|D M+-WXZ  |0101_001_000_mmm_rrr [ADDQ.B #1,<ea>]
  1219:           case 0b0101_000_000:
  1220:           case 0b0101_001_000:
  1221:           case 0b0101_010_000:
  1222:           case 0b0101_011_000:
  1223:           case 0b0101_100_000:
  1224:           case 0b0101_101_000:
  1225:           case 0b0101_110_000:
  1226:           case 0b0101_111_000:
  1227:             irpAddqByte ();
  1228:             break irpSwitch;
  1229: 
  1230:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1231:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1232:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1233:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1234:             //ADDQ.W #<data>,<ea>                             |-|012346|-|UUUUU|*****|D M+-WXZ  |0101_qqq_001_mmm_rrr
  1235:             //ADDQ.W #<data>,Ar                               |-|012346|-|-----|-----| A        |0101_qqq_001_001_rrr
  1236:             //INC.W <ea>                                      |A|012346|-|UUUUU|*****|D M+-WXZ  |0101_001_001_mmm_rrr [ADDQ.W #1,<ea>]
  1237:             //INC.W Ar                                        |A|012346|-|-----|-----| A        |0101_001_001_001_rrr [ADDQ.W #1,Ar]
  1238:           case 0b0101_000_001:
  1239:           case 0b0101_001_001:
  1240:           case 0b0101_010_001:
  1241:           case 0b0101_011_001:
  1242:           case 0b0101_100_001:
  1243:           case 0b0101_101_001:
  1244:           case 0b0101_110_001:
  1245:           case 0b0101_111_001:
  1246:             irpAddqWord ();
  1247:             break irpSwitch;
  1248: 
  1249:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1250:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1251:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1252:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1253:             //ADDQ.L #<data>,<ea>                             |-|012346|-|UUUUU|*****|D M+-WXZ  |0101_qqq_010_mmm_rrr
  1254:             //ADDQ.L #<data>,Ar                               |-|012346|-|-----|-----| A        |0101_qqq_010_001_rrr
  1255:             //INC.L <ea>                                      |A|012346|-|UUUUU|*****|D M+-WXZ  |0101_001_010_mmm_rrr [ADDQ.L #1,<ea>]
  1256:             //INC.L Ar                                        |A|012346|-|-----|-----| A        |0101_001_010_001_rrr [ADDQ.L #1,Ar]
  1257:           case 0b0101_000_010:
  1258:           case 0b0101_001_010:
  1259:           case 0b0101_010_010:
  1260:           case 0b0101_011_010:
  1261:           case 0b0101_100_010:
  1262:           case 0b0101_101_010:
  1263:           case 0b0101_110_010:
  1264:           case 0b0101_111_010:
  1265:             irpAddqLong ();
  1266:             break irpSwitch;
  1267: 
  1268:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1269:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1270:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1271:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1272:             //ST.B <ea>                                       |-|012346|-|-----|-----|D M+-WXZ  |0101_000_011_mmm_rrr
  1273:             //SNF.B <ea>                                      |A|012346|-|-----|-----|D M+-WXZ  |0101_000_011_mmm_rrr [ST.B <ea>]
  1274:             //DBT.W Dr,<label>                                |-|012346|-|-----|-----|          |0101_000_011_001_rrr-{offset}
  1275:             //DBNF.W Dr,<label>                               |A|012346|-|-----|-----|          |0101_000_011_001_rrr-{offset}        [DBT.W Dr,<label>]
  1276:           case 0b0101_000_011:
  1277:             irpSt ();
  1278:             break irpSwitch;
  1279: 
  1280:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1281:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1282:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1283:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1284:             //SUBQ.B #<data>,<ea>                             |-|012346|-|UUUUU|*****|D M+-WXZ  |0101_qqq_100_mmm_rrr
  1285:             //DEC.B <ea>                                      |A|012346|-|UUUUU|*****|D M+-WXZ  |0101_001_100_mmm_rrr [SUBQ.B #1,<ea>]
  1286:           case 0b0101_000_100:
  1287:           case 0b0101_001_100:
  1288:           case 0b0101_010_100:
  1289:           case 0b0101_011_100:
  1290:           case 0b0101_100_100:
  1291:           case 0b0101_101_100:
  1292:           case 0b0101_110_100:
  1293:           case 0b0101_111_100:
  1294:             irpSubqByte ();
  1295:             break irpSwitch;
  1296: 
  1297:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1298:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1299:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1300:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1301:             //SUBQ.W #<data>,<ea>                             |-|012346|-|UUUUU|*****|D M+-WXZ  |0101_qqq_101_mmm_rrr
  1302:             //SUBQ.W #<data>,Ar                               |-|012346|-|-----|-----| A        |0101_qqq_101_001_rrr
  1303:             //DEC.W <ea>                                      |A|012346|-|UUUUU|*****|D M+-WXZ  |0101_001_101_mmm_rrr [SUBQ.W #1,<ea>]
  1304:             //DEC.W Ar                                        |A|012346|-|-----|-----| A        |0101_001_101_001_rrr [SUBQ.W #1,Ar]
  1305:           case 0b0101_000_101:
  1306:           case 0b0101_001_101:
  1307:           case 0b0101_010_101:
  1308:           case 0b0101_011_101:
  1309:           case 0b0101_100_101:
  1310:           case 0b0101_101_101:
  1311:           case 0b0101_110_101:
  1312:           case 0b0101_111_101:
  1313:             irpSubqWord ();
  1314:             break irpSwitch;
  1315: 
  1316:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1317:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1318:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1319:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1320:             //SUBQ.L #<data>,<ea>                             |-|012346|-|UUUUU|*****|D M+-WXZ  |0101_qqq_110_mmm_rrr
  1321:             //SUBQ.L #<data>,Ar                               |-|012346|-|-----|-----| A        |0101_qqq_110_001_rrr
  1322:             //DEC.L <ea>                                      |A|012346|-|UUUUU|*****|D M+-WXZ  |0101_001_110_mmm_rrr [SUBQ.L #1,<ea>]
  1323:             //DEC.L Ar                                        |A|012346|-|-----|-----| A        |0101_001_110_001_rrr [SUBQ.L #1,Ar]
  1324:           case 0b0101_000_110:
  1325:           case 0b0101_001_110:
  1326:           case 0b0101_010_110:
  1327:           case 0b0101_011_110:
  1328:           case 0b0101_100_110:
  1329:           case 0b0101_101_110:
  1330:           case 0b0101_110_110:
  1331:           case 0b0101_111_110:
  1332:             irpSubqLong ();
  1333:             break irpSwitch;
  1334: 
  1335:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1336:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1337:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1338:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1339:             //SF.B <ea>                                       |-|012346|-|-----|-----|D M+-WXZ  |0101_000_111_mmm_rrr
  1340:             //SNT.B <ea>                                      |A|012346|-|-----|-----|D M+-WXZ  |0101_000_111_mmm_rrr [SF.B <ea>]
  1341:             //DBF.W Dr,<label>                                |-|012346|-|-----|-----|          |0101_000_111_001_rrr-{offset}
  1342:             //DBNT.W Dr,<label>                               |A|012346|-|-----|-----|          |0101_000_111_001_rrr-{offset}        [DBF.W Dr,<label>]
  1343:             //DBRA.W Dr,<label>                               |A|012346|-|-----|-----|          |0101_000_111_001_rrr-{offset}        [DBF.W Dr,<label>]
  1344:           case 0b0101_000_111:
  1345:             irpSf ();
  1346:             break irpSwitch;
  1347: 
  1348:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1349:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1350:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1351:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1352:             //SHI.B <ea>                                      |-|012346|-|--*-*|-----|D M+-WXZ  |0101_001_011_mmm_rrr
  1353:             //SNLS.B <ea>                                     |A|012346|-|--*-*|-----|D M+-WXZ  |0101_001_011_mmm_rrr [SHI.B <ea>]
  1354:             //DBHI.W Dr,<label>                               |-|012346|-|--*-*|-----|          |0101_001_011_001_rrr-{offset}
  1355:             //DBNLS.W Dr,<label>                              |A|012346|-|--*-*|-----|          |0101_001_011_001_rrr-{offset}        [DBHI.W Dr,<label>]
  1356:           case 0b0101_001_011:
  1357:             irpShi ();
  1358:             break irpSwitch;
  1359: 
  1360:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1361:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1362:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1363:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1364:             //SLS.B <ea>                                      |-|012346|-|--*-*|-----|D M+-WXZ  |0101_001_111_mmm_rrr
  1365:             //SNHI.B <ea>                                     |A|012346|-|--*-*|-----|D M+-WXZ  |0101_001_111_mmm_rrr [SLS.B <ea>]
  1366:             //DBLS.W Dr,<label>                               |-|012346|-|--*-*|-----|          |0101_001_111_001_rrr-{offset}
  1367:             //DBNHI.W Dr,<label>                              |A|012346|-|--*-*|-----|          |0101_001_111_001_rrr-{offset}        [DBLS.W Dr,<label>]
  1368:           case 0b0101_001_111:
  1369:             irpSls ();
  1370:             break irpSwitch;
  1371: 
  1372:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1373:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1374:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1375:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1376:             //SCC.B <ea>                                      |-|012346|-|----*|-----|D M+-WXZ  |0101_010_011_mmm_rrr
  1377:             //SHS.B <ea>                                      |A|012346|-|----*|-----|D M+-WXZ  |0101_010_011_mmm_rrr [SCC.B <ea>]
  1378:             //SNCS.B <ea>                                     |A|012346|-|----*|-----|D M+-WXZ  |0101_010_011_mmm_rrr [SCC.B <ea>]
  1379:             //SNLO.B <ea>                                     |A|012346|-|----*|-----|D M+-WXZ  |0101_010_011_mmm_rrr [SCC.B <ea>]
  1380:             //DBCC.W Dr,<label>                               |-|012346|-|----*|-----|          |0101_010_011_001_rrr-{offset}
  1381:             //DBHS.W Dr,<label>                               |A|012346|-|----*|-----|          |0101_010_011_001_rrr-{offset}        [DBCC.W Dr,<label>]
  1382:             //DBNCS.W Dr,<label>                              |A|012346|-|----*|-----|          |0101_010_011_001_rrr-{offset}        [DBCC.W Dr,<label>]
  1383:             //DBNLO.W Dr,<label>                              |A|012346|-|----*|-----|          |0101_010_011_001_rrr-{offset}        [DBCC.W Dr,<label>]
  1384:           case 0b0101_010_011:
  1385:             irpShs ();
  1386:             break irpSwitch;
  1387: 
  1388:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1389:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1390:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1391:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1392:             //SCS.B <ea>                                      |-|012346|-|----*|-----|D M+-WXZ  |0101_010_111_mmm_rrr
  1393:             //SLO.B <ea>                                      |A|012346|-|----*|-----|D M+-WXZ  |0101_010_111_mmm_rrr [SCS.B <ea>]
  1394:             //SNCC.B <ea>                                     |A|012346|-|----*|-----|D M+-WXZ  |0101_010_111_mmm_rrr [SCS.B <ea>]
  1395:             //SNHS.B <ea>                                     |A|012346|-|----*|-----|D M+-WXZ  |0101_010_111_mmm_rrr [SCS.B <ea>]
  1396:             //DBCS.W Dr,<label>                               |-|012346|-|----*|-----|          |0101_010_111_001_rrr-{offset}
  1397:             //DBLO.W Dr,<label>                               |A|012346|-|----*|-----|          |0101_010_111_001_rrr-{offset}        [DBCS.W Dr,<label>]
  1398:             //DBNCC.W Dr,<label>                              |A|012346|-|----*|-----|          |0101_010_111_001_rrr-{offset}        [DBCS.W Dr,<label>]
  1399:             //DBNHS.W Dr,<label>                              |A|012346|-|----*|-----|          |0101_010_111_001_rrr-{offset}        [DBCS.W Dr,<label>]
  1400:           case 0b0101_010_111:
  1401:             irpSlo ();
  1402:             break irpSwitch;
  1403: 
  1404:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1405:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1406:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1407:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1408:             //SNE.B <ea>                                      |-|012346|-|--*--|-----|D M+-WXZ  |0101_011_011_mmm_rrr
  1409:             //SNEQ.B <ea>                                     |A|012346|-|--*--|-----|D M+-WXZ  |0101_011_011_mmm_rrr [SNE.B <ea>]
  1410:             //SNZ.B <ea>                                      |A|012346|-|--*--|-----|D M+-WXZ  |0101_011_011_mmm_rrr [SNE.B <ea>]
  1411:             //SNZE.B <ea>                                     |A|012346|-|--*--|-----|D M+-WXZ  |0101_011_011_mmm_rrr [SNE.B <ea>]
  1412:             //DBNE.W Dr,<label>                               |-|012346|-|--*--|-----|          |0101_011_011_001_rrr-{offset}
  1413:             //DBNEQ.W Dr,<label>                              |A|012346|-|--*--|-----|          |0101_011_011_001_rrr-{offset}        [DBNE.W Dr,<label>]
  1414:             //DBNZ.W Dr,<label>                               |A|012346|-|--*--|-----|          |0101_011_011_001_rrr-{offset}        [DBNE.W Dr,<label>]
  1415:             //DBNZE.W Dr,<label>                              |A|012346|-|--*--|-----|          |0101_011_011_001_rrr-{offset}        [DBNE.W Dr,<label>]
  1416:           case 0b0101_011_011:
  1417:             irpSne ();
  1418:             break irpSwitch;
  1419: 
  1420:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1421:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1422:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1423:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1424:             //SEQ.B <ea>                                      |-|012346|-|--*--|-----|D M+-WXZ  |0101_011_111_mmm_rrr
  1425:             //SNNE.B <ea>                                     |A|012346|-|--*--|-----|D M+-WXZ  |0101_011_111_mmm_rrr [SEQ.B <ea>]
  1426:             //SNNZ.B <ea>                                     |A|012346|-|--*--|-----|D M+-WXZ  |0101_011_111_mmm_rrr [SEQ.B <ea>]
  1427:             //SZE.B <ea>                                      |A|012346|-|--*--|-----|D M+-WXZ  |0101_011_111_mmm_rrr [SEQ.B <ea>]
  1428:             //DBEQ.W Dr,<label>                               |-|012346|-|--*--|-----|          |0101_011_111_001_rrr-{offset}
  1429:             //DBNNE.W Dr,<label>                              |A|012346|-|--*--|-----|          |0101_011_111_001_rrr-{offset}        [DBEQ.W Dr,<label>]
  1430:             //DBNNZ.W Dr,<label>                              |A|012346|-|--*--|-----|          |0101_011_111_001_rrr-{offset}        [DBEQ.W Dr,<label>]
  1431:             //DBZE.W Dr,<label>                               |A|012346|-|--*--|-----|          |0101_011_111_001_rrr-{offset}        [DBEQ.W Dr,<label>]
  1432:           case 0b0101_011_111:
  1433:             irpSeq ();
  1434:             break irpSwitch;
  1435: 
  1436:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1437:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1438:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1439:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1440:             //SVC.B <ea>                                      |-|012346|-|---*-|-----|D M+-WXZ  |0101_100_011_mmm_rrr
  1441:             //SNVS.B <ea>                                     |A|012346|-|---*-|-----|D M+-WXZ  |0101_100_011_mmm_rrr [SVC.B <ea>]
  1442:             //DBVC.W Dr,<label>                               |-|012346|-|---*-|-----|          |0101_100_011_001_rrr-{offset}
  1443:             //DBNVS.W Dr,<label>                              |A|012346|-|---*-|-----|          |0101_100_011_001_rrr-{offset}        [DBVC.W Dr,<label>]
  1444:           case 0b0101_100_011:
  1445:             irpSvc ();
  1446:             break irpSwitch;
  1447: 
  1448:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1449:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1450:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1451:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1452:             //SVS.B <ea>                                      |-|012346|-|---*-|-----|D M+-WXZ  |0101_100_111_mmm_rrr
  1453:             //SNVC.B <ea>                                     |A|012346|-|---*-|-----|D M+-WXZ  |0101_100_111_mmm_rrr [SVS.B <ea>]
  1454:             //DBVS.W Dr,<label>                               |-|012346|-|---*-|-----|          |0101_100_111_001_rrr-{offset}
  1455:             //DBNVC.W Dr,<label>                              |A|012346|-|---*-|-----|          |0101_100_111_001_rrr-{offset}        [DBVS.W Dr,<label>]
  1456:           case 0b0101_100_111:
  1457:             irpSvs ();
  1458:             break irpSwitch;
  1459: 
  1460:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1461:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1462:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1463:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1464:             //SPL.B <ea>                                      |-|012346|-|-*---|-----|D M+-WXZ  |0101_101_011_mmm_rrr
  1465:             //SNMI.B <ea>                                     |A|012346|-|-*---|-----|D M+-WXZ  |0101_101_011_mmm_rrr [SPL.B <ea>]
  1466:             //DBPL.W Dr,<label>                               |-|012346|-|-*---|-----|          |0101_101_011_001_rrr-{offset}
  1467:             //DBNMI.W Dr,<label>                              |A|012346|-|-*---|-----|          |0101_101_011_001_rrr-{offset}        [DBPL.W Dr,<label>]
  1468:           case 0b0101_101_011:
  1469:             irpSpl ();
  1470:             break irpSwitch;
  1471: 
  1472:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1473:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1474:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1475:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1476:             //SMI.B <ea>                                      |-|012346|-|-*---|-----|D M+-WXZ  |0101_101_111_mmm_rrr
  1477:             //SNPL.B <ea>                                     |A|012346|-|-*---|-----|D M+-WXZ  |0101_101_111_mmm_rrr [SMI.B <ea>]
  1478:             //DBMI.W Dr,<label>                               |-|012346|-|-*---|-----|          |0101_101_111_001_rrr-{offset}
  1479:             //DBNPL.W Dr,<label>                              |A|012346|-|-*---|-----|          |0101_101_111_001_rrr-{offset}        [DBMI.W Dr,<label>]
  1480:           case 0b0101_101_111:
  1481:             irpSmi ();
  1482:             break irpSwitch;
  1483: 
  1484:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1485:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1486:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1487:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1488:             //SGE.B <ea>                                      |-|012346|-|-*-*-|-----|D M+-WXZ  |0101_110_011_mmm_rrr
  1489:             //SNLT.B <ea>                                     |A|012346|-|-*-*-|-----|D M+-WXZ  |0101_110_011_mmm_rrr [SGE.B <ea>]
  1490:             //DBGE.W Dr,<label>                               |-|012346|-|-*-*-|-----|          |0101_110_011_001_rrr-{offset}
  1491:             //DBNLT.W Dr,<label>                              |A|012346|-|-*-*-|-----|          |0101_110_011_001_rrr-{offset}        [DBGE.W Dr,<label>]
  1492:           case 0b0101_110_011:
  1493:             irpSge ();
  1494:             break irpSwitch;
  1495: 
  1496:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1497:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1498:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1499:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1500:             //SLT.B <ea>                                      |-|012346|-|-*-*-|-----|D M+-WXZ  |0101_110_111_mmm_rrr
  1501:             //SNGE.B <ea>                                     |A|012346|-|-*-*-|-----|D M+-WXZ  |0101_110_111_mmm_rrr [SLT.B <ea>]
  1502:             //DBLT.W Dr,<label>                               |-|012346|-|-*-*-|-----|          |0101_110_111_001_rrr-{offset}
  1503:             //DBNGE.W Dr,<label>                              |A|012346|-|-*-*-|-----|          |0101_110_111_001_rrr-{offset}        [DBLT.W Dr,<label>]
  1504:           case 0b0101_110_111:
  1505:             irpSlt ();
  1506:             break irpSwitch;
  1507: 
  1508:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1509:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1510:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1511:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1512:             //SGT.B <ea>                                      |-|012346|-|-***-|-----|D M+-WXZ  |0101_111_011_mmm_rrr
  1513:             //SNLE.B <ea>                                     |A|012346|-|-***-|-----|D M+-WXZ  |0101_111_011_mmm_rrr [SGT.B <ea>]
  1514:             //DBGT.W Dr,<label>                               |-|012346|-|-***-|-----|          |0101_111_011_001_rrr-{offset}
  1515:             //DBNLE.W Dr,<label>                              |A|012346|-|-***-|-----|          |0101_111_011_001_rrr-{offset}        [DBGT.W Dr,<label>]
  1516:           case 0b0101_111_011:
  1517:             irpSgt ();
  1518:             break irpSwitch;
  1519: 
  1520:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1521:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1522:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1523:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1524:             //SLE.B <ea>                                      |-|012346|-|-***-|-----|D M+-WXZ  |0101_111_111_mmm_rrr
  1525:             //SNGT.B <ea>                                     |A|012346|-|-***-|-----|D M+-WXZ  |0101_111_111_mmm_rrr [SLE.B <ea>]
  1526:             //DBLE.W Dr,<label>                               |-|012346|-|-***-|-----|          |0101_111_111_001_rrr-{offset}
  1527:             //DBNGT.W Dr,<label>                              |A|012346|-|-***-|-----|          |0101_111_111_001_rrr-{offset}        [DBLE.W Dr,<label>]
  1528:           case 0b0101_111_111:
  1529:             irpSle ();
  1530:             break irpSwitch;
  1531: 
  1532:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1533:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1534:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1535:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1536:             //BRA.W <label>                                   |-|012346|-|-----|-----|          |0110_000_000_000_000-{offset}
  1537:             //JBRA.W <label>                                  |A|012346|-|-----|-----|          |0110_000_000_000_000-{offset}        [BRA.W <label>]
  1538:             //BRA.S <label>                                   |-|012346|-|-----|-----|          |0110_000_000_sss_sss (s is not equal to 0)
  1539:             //JBRA.S <label>                                  |A|012346|-|-----|-----|          |0110_000_000_sss_sss (s is not equal to 0)   [BRA.S <label>]
  1540:           case 0b0110_000_000:
  1541:             irpBrasw ();
  1542:             break irpSwitch;
  1543: 
  1544:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1545:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1546:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1547:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1548:             //BRA.S <label>                                   |-|012346|-|-----|-----|          |0110_000_001_sss_sss
  1549:             //JBRA.S <label>                                  |A|012346|-|-----|-----|          |0110_000_001_sss_sss [BRA.S <label>]
  1550:           case 0b0110_000_001:
  1551:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1552:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1553:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1554:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1555:             //BRA.S <label>                                   |-|012346|-|-----|-----|          |0110_000_010_sss_sss
  1556:             //JBRA.S <label>                                  |A|012346|-|-----|-----|          |0110_000_010_sss_sss [BRA.S <label>]
  1557:           case 0b0110_000_010:
  1558:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1559:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1560:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1561:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1562:             //BRA.S <label>                                   |-|01----|-|-----|-----|          |0110_000_011_sss_sss
  1563:             //JBRA.S <label>                                  |A|01----|-|-----|-----|          |0110_000_011_sss_sss [BRA.S <label>]
  1564:           case 0b0110_000_011:
  1565:             irpBras ();
  1566:             break irpSwitch;
  1567: 
  1568:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1569:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1570:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1571:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1572:             //BSR.W <label>                                   |-|012346|-|-----|-----|          |0110_000_100_000_000-{offset}
  1573:             //JBSR.W <label>                                  |A|012346|-|-----|-----|          |0110_000_100_000_000-{offset}        [BSR.W <label>]
  1574:             //BSR.S <label>                                   |-|012346|-|-----|-----|          |0110_000_100_sss_sss (s is not equal to 0)
  1575:             //JBSR.S <label>                                  |A|012346|-|-----|-----|          |0110_000_100_sss_sss (s is not equal to 0)   [BSR.S <label>]
  1576:           case 0b0110_000_100:
  1577:             irpBsrsw ();
  1578:             break irpSwitch;
  1579: 
  1580:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1581:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1582:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1583:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1584:             //BSR.S <label>                                   |-|012346|-|-----|-----|          |0110_000_101_sss_sss
  1585:             //JBSR.S <label>                                  |A|012346|-|-----|-----|          |0110_000_101_sss_sss [BSR.S <label>]
  1586:           case 0b0110_000_101:
  1587:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1588:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1589:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1590:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1591:             //BSR.S <label>                                   |-|012346|-|-----|-----|          |0110_000_110_sss_sss
  1592:             //JBSR.S <label>                                  |A|012346|-|-----|-----|          |0110_000_110_sss_sss [BSR.S <label>]
  1593:           case 0b0110_000_110:
  1594:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1595:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1596:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1597:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1598:             //BSR.S <label>                                   |-|01----|-|-----|-----|          |0110_000_111_sss_sss
  1599:             //JBSR.S <label>                                  |A|01----|-|-----|-----|          |0110_000_111_sss_sss [BSR.S <label>]
  1600:           case 0b0110_000_111:
  1601:             irpBsrs ();
  1602:             break irpSwitch;
  1603: 
  1604:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1605:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1606:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1607:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1608:             //BHI.W <label>                                   |-|012346|-|--*-*|-----|          |0110_001_000_000_000-{offset}
  1609:             //BNLS.W <label>                                  |A|012346|-|--*-*|-----|          |0110_001_000_000_000-{offset}        [BHI.W <label>]
  1610:             //JBHI.W <label>                                  |A|012346|-|--*-*|-----|          |0110_001_000_000_000-{offset}        [BHI.W <label>]
  1611:             //JBNLS.W <label>                                 |A|012346|-|--*-*|-----|          |0110_001_000_000_000-{offset}        [BHI.W <label>]
  1612:             //BHI.S <label>                                   |-|012346|-|--*-*|-----|          |0110_001_000_sss_sss (s is not equal to 0)
  1613:             //BNLS.S <label>                                  |A|012346|-|--*-*|-----|          |0110_001_000_sss_sss (s is not equal to 0)   [BHI.S <label>]
  1614:             //JBHI.S <label>                                  |A|012346|-|--*-*|-----|          |0110_001_000_sss_sss (s is not equal to 0)   [BHI.S <label>]
  1615:             //JBNLS.S <label>                                 |A|012346|-|--*-*|-----|          |0110_001_000_sss_sss (s is not equal to 0)   [BHI.S <label>]
  1616:             //JBLS.L <label>                                  |A|012346|-|--*-*|-----|          |0110_001_000_000_110-0100111011111001-{address}      [BHI.S (*)+8;JMP <label>]
  1617:             //JBNHI.L <label>                                 |A|012346|-|--*-*|-----|          |0110_001_000_000_110-0100111011111001-{address}      [BHI.S (*)+8;JMP <label>]
  1618:           case 0b0110_001_000:
  1619:             irpBhisw ();
  1620:             break irpSwitch;
  1621: 
  1622:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1623:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1624:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1625:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1626:             //BHI.S <label>                                   |-|012346|-|--*-*|-----|          |0110_001_001_sss_sss
  1627:             //BNLS.S <label>                                  |A|012346|-|--*-*|-----|          |0110_001_001_sss_sss [BHI.S <label>]
  1628:             //JBHI.S <label>                                  |A|012346|-|--*-*|-----|          |0110_001_001_sss_sss [BHI.S <label>]
  1629:             //JBNLS.S <label>                                 |A|012346|-|--*-*|-----|          |0110_001_001_sss_sss [BHI.S <label>]
  1630:           case 0b0110_001_001:
  1631:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1632:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1633:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1634:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1635:             //BHI.S <label>                                   |-|012346|-|--*-*|-----|          |0110_001_010_sss_sss
  1636:             //BNLS.S <label>                                  |A|012346|-|--*-*|-----|          |0110_001_010_sss_sss [BHI.S <label>]
  1637:             //JBHI.S <label>                                  |A|012346|-|--*-*|-----|          |0110_001_010_sss_sss [BHI.S <label>]
  1638:             //JBNLS.S <label>                                 |A|012346|-|--*-*|-----|          |0110_001_010_sss_sss [BHI.S <label>]
  1639:           case 0b0110_001_010:
  1640:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1641:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1642:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1643:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1644:             //BHI.S <label>                                   |-|01----|-|--*-*|-----|          |0110_001_011_sss_sss
  1645:             //BNLS.S <label>                                  |A|01----|-|--*-*|-----|          |0110_001_011_sss_sss [BHI.S <label>]
  1646:             //JBHI.S <label>                                  |A|01----|-|--*-*|-----|          |0110_001_011_sss_sss [BHI.S <label>]
  1647:             //JBNLS.S <label>                                 |A|01----|-|--*-*|-----|          |0110_001_011_sss_sss [BHI.S <label>]
  1648:           case 0b0110_001_011:
  1649:             irpBhis ();
  1650:             break irpSwitch;
  1651: 
  1652:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1653:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1654:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1655:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1656:             //BLS.W <label>                                   |-|012346|-|--*-*|-----|          |0110_001_100_000_000-{offset}
  1657:             //BNHI.W <label>                                  |A|012346|-|--*-*|-----|          |0110_001_100_000_000-{offset}        [BLS.W <label>]
  1658:             //JBLS.W <label>                                  |A|012346|-|--*-*|-----|          |0110_001_100_000_000-{offset}        [BLS.W <label>]
  1659:             //JBNHI.W <label>                                 |A|012346|-|--*-*|-----|          |0110_001_100_000_000-{offset}        [BLS.W <label>]
  1660:             //BLS.S <label>                                   |-|012346|-|--*-*|-----|          |0110_001_100_sss_sss (s is not equal to 0)
  1661:             //BNHI.S <label>                                  |A|012346|-|--*-*|-----|          |0110_001_100_sss_sss (s is not equal to 0)   [BLS.S <label>]
  1662:             //JBLS.S <label>                                  |A|012346|-|--*-*|-----|          |0110_001_100_sss_sss (s is not equal to 0)   [BLS.S <label>]
  1663:             //JBNHI.S <label>                                 |A|012346|-|--*-*|-----|          |0110_001_100_sss_sss (s is not equal to 0)   [BLS.S <label>]
  1664:             //JBHI.L <label>                                  |A|012346|-|--*-*|-----|          |0110_001_100_000_110-0100111011111001-{address}      [BLS.S (*)+8;JMP <label>]
  1665:             //JBNLS.L <label>                                 |A|012346|-|--*-*|-----|          |0110_001_100_000_110-0100111011111001-{address}      [BLS.S (*)+8;JMP <label>]
  1666:           case 0b0110_001_100:
  1667:             irpBlssw ();
  1668:             break irpSwitch;
  1669: 
  1670:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1671:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1672:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1673:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1674:             //BLS.S <label>                                   |-|012346|-|--*-*|-----|          |0110_001_101_sss_sss
  1675:             //BNHI.S <label>                                  |A|012346|-|--*-*|-----|          |0110_001_101_sss_sss [BLS.S <label>]
  1676:             //JBLS.S <label>                                  |A|012346|-|--*-*|-----|          |0110_001_101_sss_sss [BLS.S <label>]
  1677:             //JBNHI.S <label>                                 |A|012346|-|--*-*|-----|          |0110_001_101_sss_sss [BLS.S <label>]
  1678:           case 0b0110_001_101:
  1679:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1680:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1681:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1682:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1683:             //BLS.S <label>                                   |-|012346|-|--*-*|-----|          |0110_001_110_sss_sss
  1684:             //BNHI.S <label>                                  |A|012346|-|--*-*|-----|          |0110_001_110_sss_sss [BLS.S <label>]
  1685:             //JBLS.S <label>                                  |A|012346|-|--*-*|-----|          |0110_001_110_sss_sss [BLS.S <label>]
  1686:             //JBNHI.S <label>                                 |A|012346|-|--*-*|-----|          |0110_001_110_sss_sss [BLS.S <label>]
  1687:           case 0b0110_001_110:
  1688:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1689:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1690:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1691:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1692:             //BLS.S <label>                                   |-|01----|-|--*-*|-----|          |0110_001_111_sss_sss
  1693:             //BNHI.S <label>                                  |A|01----|-|--*-*|-----|          |0110_001_111_sss_sss [BLS.S <label>]
  1694:             //JBLS.S <label>                                  |A|01----|-|--*-*|-----|          |0110_001_111_sss_sss [BLS.S <label>]
  1695:             //JBNHI.S <label>                                 |A|01----|-|--*-*|-----|          |0110_001_111_sss_sss [BLS.S <label>]
  1696:           case 0b0110_001_111:
  1697:             irpBlss ();
  1698:             break irpSwitch;
  1699: 
  1700:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1701:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1702:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1703:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1704:             //BCC.W <label>                                   |-|012346|-|----*|-----|          |0110_010_000_000_000-{offset}
  1705:             //BHS.W <label>                                   |A|012346|-|----*|-----|          |0110_010_000_000_000-{offset}        [BCC.W <label>]
  1706:             //BNCS.W <label>                                  |A|012346|-|----*|-----|          |0110_010_000_000_000-{offset}        [BCC.W <label>]
  1707:             //BNLO.W <label>                                  |A|012346|-|----*|-----|          |0110_010_000_000_000-{offset}        [BCC.W <label>]
  1708:             //JBCC.W <label>                                  |A|012346|-|----*|-----|          |0110_010_000_000_000-{offset}        [BCC.W <label>]
  1709:             //JBHS.W <label>                                  |A|012346|-|----*|-----|          |0110_010_000_000_000-{offset}        [BCC.W <label>]
  1710:             //JBNCS.W <label>                                 |A|012346|-|----*|-----|          |0110_010_000_000_000-{offset}        [BCC.W <label>]
  1711:             //JBNLO.W <label>                                 |A|012346|-|----*|-----|          |0110_010_000_000_000-{offset}        [BCC.W <label>]
  1712:             //BCC.S <label>                                   |-|012346|-|----*|-----|          |0110_010_000_sss_sss (s is not equal to 0)
  1713:             //BHS.S <label>                                   |A|012346|-|----*|-----|          |0110_010_000_sss_sss (s is not equal to 0)   [BCC.S <label>]
  1714:             //BNCS.S <label>                                  |A|012346|-|----*|-----|          |0110_010_000_sss_sss (s is not equal to 0)   [BCC.S <label>]
  1715:             //BNLO.S <label>                                  |A|012346|-|----*|-----|          |0110_010_000_sss_sss (s is not equal to 0)   [BCC.S <label>]
  1716:             //JBCC.S <label>                                  |A|012346|-|----*|-----|          |0110_010_000_sss_sss (s is not equal to 0)   [BCC.S <label>]
  1717:             //JBHS.S <label>                                  |A|012346|-|----*|-----|          |0110_010_000_sss_sss (s is not equal to 0)   [BCC.S <label>]
  1718:             //JBNCS.S <label>                                 |A|012346|-|----*|-----|          |0110_010_000_sss_sss (s is not equal to 0)   [BCC.S <label>]
  1719:             //JBNLO.S <label>                                 |A|012346|-|----*|-----|          |0110_010_000_sss_sss (s is not equal to 0)   [BCC.S <label>]
  1720:             //JBCS.L <label>                                  |A|012346|-|----*|-----|          |0110_010_000_000_110-0100111011111001-{address}      [BCC.S (*)+8;JMP <label>]
  1721:             //JBLO.L <label>                                  |A|012346|-|----*|-----|          |0110_010_000_000_110-0100111011111001-{address}      [BCC.S (*)+8;JMP <label>]
  1722:             //JBNCC.L <label>                                 |A|012346|-|----*|-----|          |0110_010_000_000_110-0100111011111001-{address}      [BCC.S (*)+8;JMP <label>]
  1723:             //JBNHS.L <label>                                 |A|012346|-|----*|-----|          |0110_010_000_000_110-0100111011111001-{address}      [BCC.S (*)+8;JMP <label>]
  1724:           case 0b0110_010_000:
  1725:             irpBhssw ();
  1726:             break irpSwitch;
  1727: 
  1728:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1729:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1730:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1731:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1732:             //BCC.S <label>                                   |-|012346|-|----*|-----|          |0110_010_001_sss_sss
  1733:             //BHS.S <label>                                   |A|012346|-|----*|-----|          |0110_010_001_sss_sss [BCC.S <label>]
  1734:             //BNCS.S <label>                                  |A|012346|-|----*|-----|          |0110_010_001_sss_sss [BCC.S <label>]
  1735:             //BNLO.S <label>                                  |A|012346|-|----*|-----|          |0110_010_001_sss_sss [BCC.S <label>]
  1736:             //JBCC.S <label>                                  |A|012346|-|----*|-----|          |0110_010_001_sss_sss [BCC.S <label>]
  1737:             //JBHS.S <label>                                  |A|012346|-|----*|-----|          |0110_010_001_sss_sss [BCC.S <label>]
  1738:             //JBNCS.S <label>                                 |A|012346|-|----*|-----|          |0110_010_001_sss_sss [BCC.S <label>]
  1739:             //JBNLO.S <label>                                 |A|012346|-|----*|-----|          |0110_010_001_sss_sss [BCC.S <label>]
  1740:           case 0b0110_010_001:
  1741:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1742:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1743:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1744:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1745:             //BCC.S <label>                                   |-|012346|-|----*|-----|          |0110_010_010_sss_sss
  1746:             //BHS.S <label>                                   |A|012346|-|----*|-----|          |0110_010_010_sss_sss [BCC.S <label>]
  1747:             //BNCS.S <label>                                  |A|012346|-|----*|-----|          |0110_010_010_sss_sss [BCC.S <label>]
  1748:             //BNLO.S <label>                                  |A|012346|-|----*|-----|          |0110_010_010_sss_sss [BCC.S <label>]
  1749:             //JBCC.S <label>                                  |A|012346|-|----*|-----|          |0110_010_010_sss_sss [BCC.S <label>]
  1750:             //JBHS.S <label>                                  |A|012346|-|----*|-----|          |0110_010_010_sss_sss [BCC.S <label>]
  1751:             //JBNCS.S <label>                                 |A|012346|-|----*|-----|          |0110_010_010_sss_sss [BCC.S <label>]
  1752:             //JBNLO.S <label>                                 |A|012346|-|----*|-----|          |0110_010_010_sss_sss [BCC.S <label>]
  1753:           case 0b0110_010_010:
  1754:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1755:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1756:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1757:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1758:             //BCC.S <label>                                   |-|01----|-|----*|-----|          |0110_010_011_sss_sss
  1759:             //BHS.S <label>                                   |A|01----|-|----*|-----|          |0110_010_011_sss_sss [BCC.S <label>]
  1760:             //BNCS.S <label>                                  |A|01----|-|----*|-----|          |0110_010_011_sss_sss [BCC.S <label>]
  1761:             //BNLO.S <label>                                  |A|01----|-|----*|-----|          |0110_010_011_sss_sss [BCC.S <label>]
  1762:             //JBCC.S <label>                                  |A|01----|-|----*|-----|          |0110_010_011_sss_sss [BCC.S <label>]
  1763:             //JBHS.S <label>                                  |A|01----|-|----*|-----|          |0110_010_011_sss_sss [BCC.S <label>]
  1764:             //JBNCS.S <label>                                 |A|01----|-|----*|-----|          |0110_010_011_sss_sss [BCC.S <label>]
  1765:             //JBNLO.S <label>                                 |A|01----|-|----*|-----|          |0110_010_011_sss_sss [BCC.S <label>]
  1766:           case 0b0110_010_011:
  1767:             irpBhss ();
  1768:             break irpSwitch;
  1769: 
  1770:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1771:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1772:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1773:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1774:             //BCS.W <label>                                   |-|012346|-|----*|-----|          |0110_010_100_000_000-{offset}
  1775:             //BLO.W <label>                                   |A|012346|-|----*|-----|          |0110_010_100_000_000-{offset}        [BCS.W <label>]
  1776:             //BNCC.W <label>                                  |A|012346|-|----*|-----|          |0110_010_100_000_000-{offset}        [BCS.W <label>]
  1777:             //BNHS.W <label>                                  |A|012346|-|----*|-----|          |0110_010_100_000_000-{offset}        [BCS.W <label>]
  1778:             //JBCS.W <label>                                  |A|012346|-|----*|-----|          |0110_010_100_000_000-{offset}        [BCS.W <label>]
  1779:             //JBLO.W <label>                                  |A|012346|-|----*|-----|          |0110_010_100_000_000-{offset}        [BCS.W <label>]
  1780:             //JBNCC.W <label>                                 |A|012346|-|----*|-----|          |0110_010_100_000_000-{offset}        [BCS.W <label>]
  1781:             //JBNHS.W <label>                                 |A|012346|-|----*|-----|          |0110_010_100_000_000-{offset}        [BCS.W <label>]
  1782:             //BCS.S <label>                                   |-|012346|-|----*|-----|          |0110_010_100_sss_sss (s is not equal to 0)
  1783:             //BLO.S <label>                                   |A|012346|-|----*|-----|          |0110_010_100_sss_sss (s is not equal to 0)   [BCS.S <label>]
  1784:             //BNCC.S <label>                                  |A|012346|-|----*|-----|          |0110_010_100_sss_sss (s is not equal to 0)   [BCS.S <label>]
  1785:             //BNHS.S <label>                                  |A|012346|-|----*|-----|          |0110_010_100_sss_sss (s is not equal to 0)   [BCS.S <label>]
  1786:             //JBCS.S <label>                                  |A|012346|-|----*|-----|          |0110_010_100_sss_sss (s is not equal to 0)   [BCS.S <label>]
  1787:             //JBLO.S <label>                                  |A|012346|-|----*|-----|          |0110_010_100_sss_sss (s is not equal to 0)   [BCS.S <label>]
  1788:             //JBNCC.S <label>                                 |A|012346|-|----*|-----|          |0110_010_100_sss_sss (s is not equal to 0)   [BCS.S <label>]
  1789:             //JBNHS.S <label>                                 |A|012346|-|----*|-----|          |0110_010_100_sss_sss (s is not equal to 0)   [BCS.S <label>]
  1790:             //JBCC.L <label>                                  |A|012346|-|----*|-----|          |0110_010_100_000_110-0100111011111001-{address}      [BCS.S (*)+8;JMP <label>]
  1791:             //JBHS.L <label>                                  |A|012346|-|----*|-----|          |0110_010_100_000_110-0100111011111001-{address}      [BCS.S (*)+8;JMP <label>]
  1792:             //JBNCS.L <label>                                 |A|012346|-|----*|-----|          |0110_010_100_000_110-0100111011111001-{address}      [BCS.S (*)+8;JMP <label>]
  1793:             //JBNLO.L <label>                                 |A|012346|-|----*|-----|          |0110_010_100_000_110-0100111011111001-{address}      [BCS.S (*)+8;JMP <label>]
  1794:           case 0b0110_010_100:
  1795:             irpBlosw ();
  1796:             break irpSwitch;
  1797: 
  1798:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1799:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1800:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1801:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1802:             //BCS.S <label>                                   |-|012346|-|----*|-----|          |0110_010_101_sss_sss
  1803:             //BLO.S <label>                                   |A|012346|-|----*|-----|          |0110_010_101_sss_sss [BCS.S <label>]
  1804:             //BNCC.S <label>                                  |A|012346|-|----*|-----|          |0110_010_101_sss_sss [BCS.S <label>]
  1805:             //BNHS.S <label>                                  |A|012346|-|----*|-----|          |0110_010_101_sss_sss [BCS.S <label>]
  1806:             //JBCS.S <label>                                  |A|012346|-|----*|-----|          |0110_010_101_sss_sss [BCS.S <label>]
  1807:             //JBLO.S <label>                                  |A|012346|-|----*|-----|          |0110_010_101_sss_sss [BCS.S <label>]
  1808:             //JBNCC.S <label>                                 |A|012346|-|----*|-----|          |0110_010_101_sss_sss [BCS.S <label>]
  1809:             //JBNHS.S <label>                                 |A|012346|-|----*|-----|          |0110_010_101_sss_sss [BCS.S <label>]
  1810:           case 0b0110_010_101:
  1811:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1812:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1813:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1814:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1815:             //BCS.S <label>                                   |-|012346|-|----*|-----|          |0110_010_110_sss_sss
  1816:             //BLO.S <label>                                   |A|012346|-|----*|-----|          |0110_010_110_sss_sss [BCS.S <label>]
  1817:             //BNCC.S <label>                                  |A|012346|-|----*|-----|          |0110_010_110_sss_sss [BCS.S <label>]
  1818:             //BNHS.S <label>                                  |A|012346|-|----*|-----|          |0110_010_110_sss_sss [BCS.S <label>]
  1819:             //JBCS.S <label>                                  |A|012346|-|----*|-----|          |0110_010_110_sss_sss [BCS.S <label>]
  1820:             //JBLO.S <label>                                  |A|012346|-|----*|-----|          |0110_010_110_sss_sss [BCS.S <label>]
  1821:             //JBNCC.S <label>                                 |A|012346|-|----*|-----|          |0110_010_110_sss_sss [BCS.S <label>]
  1822:             //JBNHS.S <label>                                 |A|012346|-|----*|-----|          |0110_010_110_sss_sss [BCS.S <label>]
  1823:           case 0b0110_010_110:
  1824:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1825:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1826:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1827:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1828:             //BCS.S <label>                                   |-|01----|-|----*|-----|          |0110_010_111_sss_sss
  1829:             //BLO.S <label>                                   |A|01----|-|----*|-----|          |0110_010_111_sss_sss [BCS.S <label>]
  1830:             //BNCC.S <label>                                  |A|01----|-|----*|-----|          |0110_010_111_sss_sss [BCS.S <label>]
  1831:             //BNHS.S <label>                                  |A|01----|-|----*|-----|          |0110_010_111_sss_sss [BCS.S <label>]
  1832:             //JBCS.S <label>                                  |A|01----|-|----*|-----|          |0110_010_111_sss_sss [BCS.S <label>]
  1833:             //JBLO.S <label>                                  |A|01----|-|----*|-----|          |0110_010_111_sss_sss [BCS.S <label>]
  1834:             //JBNCC.S <label>                                 |A|01----|-|----*|-----|          |0110_010_111_sss_sss [BCS.S <label>]
  1835:             //JBNHS.S <label>                                 |A|01----|-|----*|-----|          |0110_010_111_sss_sss [BCS.S <label>]
  1836:           case 0b0110_010_111:
  1837:             irpBlos ();
  1838:             break irpSwitch;
  1839: 
  1840:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1841:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1842:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1843:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1844:             //BNE.W <label>                                   |-|012346|-|--*--|-----|          |0110_011_000_000_000-{offset}
  1845:             //BNEQ.W <label>                                  |A|012346|-|--*--|-----|          |0110_011_000_000_000-{offset}        [BNE.W <label>]
  1846:             //BNZ.W <label>                                   |A|012346|-|--*--|-----|          |0110_011_000_000_000-{offset}        [BNE.W <label>]
  1847:             //BNZE.W <label>                                  |A|012346|-|--*--|-----|          |0110_011_000_000_000-{offset}        [BNE.W <label>]
  1848:             //JBNE.W <label>                                  |A|012346|-|--*--|-----|          |0110_011_000_000_000-{offset}        [BNE.W <label>]
  1849:             //JBNEQ.W <label>                                 |A|012346|-|--*--|-----|          |0110_011_000_000_000-{offset}        [BNE.W <label>]
  1850:             //JBNZ.W <label>                                  |A|012346|-|--*--|-----|          |0110_011_000_000_000-{offset}        [BNE.W <label>]
  1851:             //JBNZE.W <label>                                 |A|012346|-|--*--|-----|          |0110_011_000_000_000-{offset}        [BNE.W <label>]
  1852:             //BNE.S <label>                                   |-|012346|-|--*--|-----|          |0110_011_000_sss_sss (s is not equal to 0)
  1853:             //BNEQ.S <label>                                  |A|012346|-|--*--|-----|          |0110_011_000_sss_sss (s is not equal to 0)   [BNE.S <label>]
  1854:             //BNZ.S <label>                                   |A|012346|-|--*--|-----|          |0110_011_000_sss_sss (s is not equal to 0)   [BNE.S <label>]
  1855:             //BNZE.S <label>                                  |A|012346|-|--*--|-----|          |0110_011_000_sss_sss (s is not equal to 0)   [BNE.S <label>]
  1856:             //JBNE.S <label>                                  |A|012346|-|--*--|-----|          |0110_011_000_sss_sss (s is not equal to 0)   [BNE.S <label>]
  1857:             //JBNEQ.S <label>                                 |A|012346|-|--*--|-----|          |0110_011_000_sss_sss (s is not equal to 0)   [BNE.S <label>]
  1858:             //JBNZ.S <label>                                  |A|012346|-|--*--|-----|          |0110_011_000_sss_sss (s is not equal to 0)   [BNE.S <label>]
  1859:             //JBNZE.S <label>                                 |A|012346|-|--*--|-----|          |0110_011_000_sss_sss (s is not equal to 0)   [BNE.S <label>]
  1860:             //JBEQ.L <label>                                  |A|012346|-|--*--|-----|          |0110_011_000_000_110-0100111011111001-{address}      [BNE.S (*)+8;JMP <label>]
  1861:             //JBNEQ.L <label>                                 |A|012346|-|--*--|-----|          |0110_011_000_000_110-0100111011111001-{address}      [BNE.S (*)+8;JMP <label>]
  1862:             //JBNNE.L <label>                                 |A|012346|-|--*--|-----|          |0110_011_000_000_110-0100111011111001-{address}      [BNE.S (*)+8;JMP <label>]
  1863:             //JBNNZ.L <label>                                 |A|012346|-|--*--|-----|          |0110_011_000_000_110-0100111011111001-{address}      [BNE.S (*)+8;JMP <label>]
  1864:             //JBNZ.L <label>                                  |A|012346|-|--*--|-----|          |0110_011_000_000_110-0100111011111001-{address}      [BNE.S (*)+8;JMP <label>]
  1865:             //JBNZE.L <label>                                 |A|012346|-|--*--|-----|          |0110_011_000_000_110-0100111011111001-{address}      [BNE.S (*)+8;JMP <label>]
  1866:             //JBZE.L <label>                                  |A|012346|-|--*--|-----|          |0110_011_000_000_110-0100111011111001-{address}      [BNE.S (*)+8;JMP <label>]
  1867:           case 0b0110_011_000:
  1868:             irpBnesw ();
  1869:             break irpSwitch;
  1870: 
  1871:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1872:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1873:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1874:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1875:             //BNE.S <label>                                   |-|012346|-|--*--|-----|          |0110_011_001_sss_sss
  1876:             //BNEQ.S <label>                                  |A|012346|-|--*--|-----|          |0110_011_001_sss_sss [BNE.S <label>]
  1877:             //BNZ.S <label>                                   |A|012346|-|--*--|-----|          |0110_011_001_sss_sss [BNE.S <label>]
  1878:             //BNZE.S <label>                                  |A|012346|-|--*--|-----|          |0110_011_001_sss_sss [BNE.S <label>]
  1879:             //JBNE.S <label>                                  |A|012346|-|--*--|-----|          |0110_011_001_sss_sss [BNE.S <label>]
  1880:             //JBNEQ.S <label>                                 |A|012346|-|--*--|-----|          |0110_011_001_sss_sss [BNE.S <label>]
  1881:             //JBNZ.S <label>                                  |A|012346|-|--*--|-----|          |0110_011_001_sss_sss [BNE.S <label>]
  1882:             //JBNZE.S <label>                                 |A|012346|-|--*--|-----|          |0110_011_001_sss_sss [BNE.S <label>]
  1883:           case 0b0110_011_001:
  1884:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1885:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1886:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1887:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1888:             //BNE.S <label>                                   |-|012346|-|--*--|-----|          |0110_011_010_sss_sss
  1889:             //BNEQ.S <label>                                  |A|012346|-|--*--|-----|          |0110_011_010_sss_sss [BNE.S <label>]
  1890:             //BNZ.S <label>                                   |A|012346|-|--*--|-----|          |0110_011_010_sss_sss [BNE.S <label>]
  1891:             //BNZE.S <label>                                  |A|012346|-|--*--|-----|          |0110_011_010_sss_sss [BNE.S <label>]
  1892:             //JBNE.S <label>                                  |A|012346|-|--*--|-----|          |0110_011_010_sss_sss [BNE.S <label>]
  1893:             //JBNEQ.S <label>                                 |A|012346|-|--*--|-----|          |0110_011_010_sss_sss [BNE.S <label>]
  1894:             //JBNZ.S <label>                                  |A|012346|-|--*--|-----|          |0110_011_010_sss_sss [BNE.S <label>]
  1895:             //JBNZE.S <label>                                 |A|012346|-|--*--|-----|          |0110_011_010_sss_sss [BNE.S <label>]
  1896:           case 0b0110_011_010:
  1897:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1898:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1899:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1900:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1901:             //BNE.S <label>                                   |-|01----|-|--*--|-----|          |0110_011_011_sss_sss
  1902:             //BNEQ.S <label>                                  |A|01----|-|--*--|-----|          |0110_011_011_sss_sss [BNE.S <label>]
  1903:             //BNZ.S <label>                                   |A|01----|-|--*--|-----|          |0110_011_011_sss_sss [BNE.S <label>]
  1904:             //BNZE.S <label>                                  |A|01----|-|--*--|-----|          |0110_011_011_sss_sss [BNE.S <label>]
  1905:             //JBNE.S <label>                                  |A|01----|-|--*--|-----|          |0110_011_011_sss_sss [BNE.S <label>]
  1906:             //JBNEQ.S <label>                                 |A|01----|-|--*--|-----|          |0110_011_011_sss_sss [BNE.S <label>]
  1907:             //JBNZ.S <label>                                  |A|01----|-|--*--|-----|          |0110_011_011_sss_sss [BNE.S <label>]
  1908:             //JBNZE.S <label>                                 |A|01----|-|--*--|-----|          |0110_011_011_sss_sss [BNE.S <label>]
  1909:           case 0b0110_011_011:
  1910:             irpBnes ();
  1911:             break irpSwitch;
  1912: 
  1913:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1914:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1915:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1916:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1917:             //BEQ.W <label>                                   |-|012346|-|--*--|-----|          |0110_011_100_000_000-{offset}
  1918:             //BNNE.W <label>                                  |A|012346|-|--*--|-----|          |0110_011_100_000_000-{offset}        [BEQ.W <label>]
  1919:             //BNNZ.W <label>                                  |A|012346|-|--*--|-----|          |0110_011_100_000_000-{offset}        [BEQ.W <label>]
  1920:             //BZE.W <label>                                   |A|012346|-|--*--|-----|          |0110_011_100_000_000-{offset}        [BEQ.W <label>]
  1921:             //JBEQ.W <label>                                  |A|012346|-|--*--|-----|          |0110_011_100_000_000-{offset}        [BEQ.W <label>]
  1922:             //JBNNE.W <label>                                 |A|012346|-|--*--|-----|          |0110_011_100_000_000-{offset}        [BEQ.W <label>]
  1923:             //JBNNZ.W <label>                                 |A|012346|-|--*--|-----|          |0110_011_100_000_000-{offset}        [BEQ.W <label>]
  1924:             //JBZE.W <label>                                  |A|012346|-|--*--|-----|          |0110_011_100_000_000-{offset}        [BEQ.W <label>]
  1925:             //BEQ.S <label>                                   |-|012346|-|--*--|-----|          |0110_011_100_sss_sss (s is not equal to 0)
  1926:             //BNNE.S <label>                                  |A|012346|-|--*--|-----|          |0110_011_100_sss_sss (s is not equal to 0)   [BEQ.S <label>]
  1927:             //BNNZ.S <label>                                  |A|012346|-|--*--|-----|          |0110_011_100_sss_sss (s is not equal to 0)   [BEQ.S <label>]
  1928:             //BZE.S <label>                                   |A|012346|-|--*--|-----|          |0110_011_100_sss_sss (s is not equal to 0)   [BEQ.S <label>]
  1929:             //JBEQ.S <label>                                  |A|012346|-|--*--|-----|          |0110_011_100_sss_sss (s is not equal to 0)   [BEQ.S <label>]
  1930:             //JBNNE.S <label>                                 |A|012346|-|--*--|-----|          |0110_011_100_sss_sss (s is not equal to 0)   [BEQ.S <label>]
  1931:             //JBNNZ.S <label>                                 |A|012346|-|--*--|-----|          |0110_011_100_sss_sss (s is not equal to 0)   [BEQ.S <label>]
  1932:             //JBZE.S <label>                                  |A|012346|-|--*--|-----|          |0110_011_100_sss_sss (s is not equal to 0)   [BEQ.S <label>]
  1933:             //JBNE.L <label>                                  |A|012346|-|--*--|-----|          |0110_011_100_000_110-0100111011111001-{address}      [BEQ.S (*)+8;JMP <label>]
  1934:           case 0b0110_011_100:
  1935:             irpBeqsw ();
  1936:             break irpSwitch;
  1937: 
  1938:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1939:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1940:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1941:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1942:             //BEQ.S <label>                                   |-|012346|-|--*--|-----|          |0110_011_101_sss_sss
  1943:             //BNNE.S <label>                                  |A|012346|-|--*--|-----|          |0110_011_101_sss_sss [BEQ.S <label>]
  1944:             //BNNZ.S <label>                                  |A|012346|-|--*--|-----|          |0110_011_101_sss_sss [BEQ.S <label>]
  1945:             //BZE.S <label>                                   |A|012346|-|--*--|-----|          |0110_011_101_sss_sss [BEQ.S <label>]
  1946:             //JBEQ.S <label>                                  |A|012346|-|--*--|-----|          |0110_011_101_sss_sss [BEQ.S <label>]
  1947:             //JBNNE.S <label>                                 |A|012346|-|--*--|-----|          |0110_011_101_sss_sss [BEQ.S <label>]
  1948:             //JBNNZ.S <label>                                 |A|012346|-|--*--|-----|          |0110_011_101_sss_sss [BEQ.S <label>]
  1949:             //JBZE.S <label>                                  |A|012346|-|--*--|-----|          |0110_011_101_sss_sss [BEQ.S <label>]
  1950:           case 0b0110_011_101:
  1951:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1952:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1953:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1954:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1955:             //BEQ.S <label>                                   |-|012346|-|--*--|-----|          |0110_011_110_sss_sss
  1956:             //BNNE.S <label>                                  |A|012346|-|--*--|-----|          |0110_011_110_sss_sss [BEQ.S <label>]
  1957:             //BNNZ.S <label>                                  |A|012346|-|--*--|-----|          |0110_011_110_sss_sss [BEQ.S <label>]
  1958:             //BZE.S <label>                                   |A|012346|-|--*--|-----|          |0110_011_110_sss_sss [BEQ.S <label>]
  1959:             //JBEQ.S <label>                                  |A|012346|-|--*--|-----|          |0110_011_110_sss_sss [BEQ.S <label>]
  1960:             //JBNNE.S <label>                                 |A|012346|-|--*--|-----|          |0110_011_110_sss_sss [BEQ.S <label>]
  1961:             //JBNNZ.S <label>                                 |A|012346|-|--*--|-----|          |0110_011_110_sss_sss [BEQ.S <label>]
  1962:             //JBZE.S <label>                                  |A|012346|-|--*--|-----|          |0110_011_110_sss_sss [BEQ.S <label>]
  1963:           case 0b0110_011_110:
  1964:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1965:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1966:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1967:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1968:             //BEQ.S <label>                                   |-|01----|-|--*--|-----|          |0110_011_111_sss_sss
  1969:             //BNNE.S <label>                                  |A|01----|-|--*--|-----|          |0110_011_111_sss_sss [BEQ.S <label>]
  1970:             //BNNZ.S <label>                                  |A|01----|-|--*--|-----|          |0110_011_111_sss_sss [BEQ.S <label>]
  1971:             //BZE.S <label>                                   |A|01----|-|--*--|-----|          |0110_011_111_sss_sss [BEQ.S <label>]
  1972:             //JBEQ.S <label>                                  |A|01----|-|--*--|-----|          |0110_011_111_sss_sss [BEQ.S <label>]
  1973:             //JBNNE.S <label>                                 |A|01----|-|--*--|-----|          |0110_011_111_sss_sss [BEQ.S <label>]
  1974:             //JBNNZ.S <label>                                 |A|01----|-|--*--|-----|          |0110_011_111_sss_sss [BEQ.S <label>]
  1975:             //JBZE.S <label>                                  |A|01----|-|--*--|-----|          |0110_011_111_sss_sss [BEQ.S <label>]
  1976:           case 0b0110_011_111:
  1977:             irpBeqs ();
  1978:             break irpSwitch;
  1979: 
  1980:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1981:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  1982:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  1983:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1984:             //BVC.W <label>                                   |-|012346|-|---*-|-----|          |0110_100_000_000_000-{offset}
  1985:             //BNVS.W <label>                                  |A|012346|-|---*-|-----|          |0110_100_000_000_000-{offset}        [BVC.W <label>]
  1986:             //JBNVS.W <label>                                 |A|012346|-|---*-|-----|          |0110_100_000_000_000-{offset}        [BVC.W <label>]
  1987:             //JBVC.W <label>                                  |A|012346|-|---*-|-----|          |0110_100_000_000_000-{offset}        [BVC.W <label>]
  1988:             //BVC.S <label>                                   |-|012346|-|---*-|-----|          |0110_100_000_sss_sss (s is not equal to 0)
  1989:             //BNVS.S <label>                                  |A|012346|-|---*-|-----|          |0110_100_000_sss_sss (s is not equal to 0)   [BVC.S <label>]
  1990:             //JBNVS.S <label>                                 |A|012346|-|---*-|-----|          |0110_100_000_sss_sss (s is not equal to 0)   [BVC.S <label>]
  1991:             //JBVC.S <label>                                  |A|012346|-|---*-|-----|          |0110_100_000_sss_sss (s is not equal to 0)   [BVC.S <label>]
  1992:             //JBNVC.L <label>                                 |A|012346|-|---*-|-----|          |0110_100_000_000_110-0100111011111001-{address}      [BVC.S (*)+8;JMP <label>]
  1993:             //JBVS.L <label>                                  |A|012346|-|---*-|-----|          |0110_100_000_000_110-0100111011111001-{address}      [BVC.S (*)+8;JMP <label>]
  1994:           case 0b0110_100_000:
  1995:             irpBvcsw ();
  1996:             break irpSwitch;
  1997: 
  1998:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  1999:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2000:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2001:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2002:             //BVC.S <label>                                   |-|012346|-|---*-|-----|          |0110_100_001_sss_sss
  2003:             //BNVS.S <label>                                  |A|012346|-|---*-|-----|          |0110_100_001_sss_sss [BVC.S <label>]
  2004:             //JBNVS.S <label>                                 |A|012346|-|---*-|-----|          |0110_100_001_sss_sss [BVC.S <label>]
  2005:             //JBVC.S <label>                                  |A|012346|-|---*-|-----|          |0110_100_001_sss_sss [BVC.S <label>]
  2006:           case 0b0110_100_001:
  2007:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2008:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2009:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2010:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2011:             //BVC.S <label>                                   |-|012346|-|---*-|-----|          |0110_100_010_sss_sss
  2012:             //BNVS.S <label>                                  |A|012346|-|---*-|-----|          |0110_100_010_sss_sss [BVC.S <label>]
  2013:             //JBNVS.S <label>                                 |A|012346|-|---*-|-----|          |0110_100_010_sss_sss [BVC.S <label>]
  2014:             //JBVC.S <label>                                  |A|012346|-|---*-|-----|          |0110_100_010_sss_sss [BVC.S <label>]
  2015:           case 0b0110_100_010:
  2016:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2017:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2018:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2019:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2020:             //BVC.S <label>                                   |-|01----|-|---*-|-----|          |0110_100_011_sss_sss
  2021:             //BNVS.S <label>                                  |A|01----|-|---*-|-----|          |0110_100_011_sss_sss [BVC.S <label>]
  2022:             //JBNVS.S <label>                                 |A|01----|-|---*-|-----|          |0110_100_011_sss_sss [BVC.S <label>]
  2023:             //JBVC.S <label>                                  |A|01----|-|---*-|-----|          |0110_100_011_sss_sss [BVC.S <label>]
  2024:           case 0b0110_100_011:
  2025:             irpBvcs ();
  2026:             break irpSwitch;
  2027: 
  2028:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2029:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2030:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2031:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2032:             //BVS.W <label>                                   |-|012346|-|---*-|-----|          |0110_100_100_000_000-{offset}
  2033:             //BNVC.W <label>                                  |A|012346|-|---*-|-----|          |0110_100_100_000_000-{offset}        [BVS.W <label>]
  2034:             //JBNVC.W <label>                                 |A|012346|-|---*-|-----|          |0110_100_100_000_000-{offset}        [BVS.W <label>]
  2035:             //JBVS.W <label>                                  |A|012346|-|---*-|-----|          |0110_100_100_000_000-{offset}        [BVS.W <label>]
  2036:             //BVS.S <label>                                   |-|012346|-|---*-|-----|          |0110_100_100_sss_sss (s is not equal to 0)
  2037:             //BNVC.S <label>                                  |A|012346|-|---*-|-----|          |0110_100_100_sss_sss (s is not equal to 0)   [BVS.S <label>]
  2038:             //JBNVC.S <label>                                 |A|012346|-|---*-|-----|          |0110_100_100_sss_sss (s is not equal to 0)   [BVS.S <label>]
  2039:             //JBVS.S <label>                                  |A|012346|-|---*-|-----|          |0110_100_100_sss_sss (s is not equal to 0)   [BVS.S <label>]
  2040:             //JBNVS.L <label>                                 |A|012346|-|---*-|-----|          |0110_100_100_000_110-0100111011111001-{address}      [BVS.S (*)+8;JMP <label>]
  2041:             //JBVC.L <label>                                  |A|012346|-|---*-|-----|          |0110_100_100_000_110-0100111011111001-{address}      [BVS.S (*)+8;JMP <label>]
  2042:           case 0b0110_100_100:
  2043:             irpBvssw ();
  2044:             break irpSwitch;
  2045: 
  2046:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2047:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2048:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2049:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2050:             //BVS.S <label>                                   |-|012346|-|---*-|-----|          |0110_100_101_sss_sss
  2051:             //BNVC.S <label>                                  |A|012346|-|---*-|-----|          |0110_100_101_sss_sss [BVS.S <label>]
  2052:             //JBNVC.S <label>                                 |A|012346|-|---*-|-----|          |0110_100_101_sss_sss [BVS.S <label>]
  2053:             //JBVS.S <label>                                  |A|012346|-|---*-|-----|          |0110_100_101_sss_sss [BVS.S <label>]
  2054:           case 0b0110_100_101:
  2055:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2056:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2057:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2058:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2059:             //BVS.S <label>                                   |-|012346|-|---*-|-----|          |0110_100_110_sss_sss
  2060:             //BNVC.S <label>                                  |A|012346|-|---*-|-----|          |0110_100_110_sss_sss [BVS.S <label>]
  2061:             //JBNVC.S <label>                                 |A|012346|-|---*-|-----|          |0110_100_110_sss_sss [BVS.S <label>]
  2062:             //JBVS.S <label>                                  |A|012346|-|---*-|-----|          |0110_100_110_sss_sss [BVS.S <label>]
  2063:           case 0b0110_100_110:
  2064:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2065:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2066:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2067:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2068:             //BVS.S <label>                                   |-|01----|-|---*-|-----|          |0110_100_111_sss_sss
  2069:             //BNVC.S <label>                                  |A|01----|-|---*-|-----|          |0110_100_111_sss_sss [BVS.S <label>]
  2070:             //JBNVC.S <label>                                 |A|01----|-|---*-|-----|          |0110_100_111_sss_sss [BVS.S <label>]
  2071:             //JBVS.S <label>                                  |A|01----|-|---*-|-----|          |0110_100_111_sss_sss [BVS.S <label>]
  2072:           case 0b0110_100_111:
  2073:             irpBvss ();
  2074:             break irpSwitch;
  2075: 
  2076:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2077:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2078:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2079:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2080:             //BPL.W <label>                                   |-|012346|-|-*---|-----|          |0110_101_000_000_000-{offset}
  2081:             //BNMI.W <label>                                  |A|012346|-|-*---|-----|          |0110_101_000_000_000-{offset}        [BPL.W <label>]
  2082:             //JBNMI.W <label>                                 |A|012346|-|-*---|-----|          |0110_101_000_000_000-{offset}        [BPL.W <label>]
  2083:             //JBPL.W <label>                                  |A|012346|-|-*---|-----|          |0110_101_000_000_000-{offset}        [BPL.W <label>]
  2084:             //BPL.S <label>                                   |-|012346|-|-*---|-----|          |0110_101_000_sss_sss (s is not equal to 0)
  2085:             //BNMI.S <label>                                  |A|012346|-|-*---|-----|          |0110_101_000_sss_sss (s is not equal to 0)   [BPL.S <label>]
  2086:             //JBNMI.S <label>                                 |A|012346|-|-*---|-----|          |0110_101_000_sss_sss (s is not equal to 0)   [BPL.S <label>]
  2087:             //JBPL.S <label>                                  |A|012346|-|-*---|-----|          |0110_101_000_sss_sss (s is not equal to 0)   [BPL.S <label>]
  2088:             //JBMI.L <label>                                  |A|012346|-|-*---|-----|          |0110_101_000_000_110-0100111011111001-{address}      [BPL.S (*)+8;JMP <label>]
  2089:             //JBNPL.L <label>                                 |A|012346|-|-*---|-----|          |0110_101_000_000_110-0100111011111001-{address}      [BPL.S (*)+8;JMP <label>]
  2090:           case 0b0110_101_000:
  2091:             irpBplsw ();
  2092:             break irpSwitch;
  2093: 
  2094:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2095:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2096:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2097:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2098:             //BPL.S <label>                                   |-|012346|-|-*---|-----|          |0110_101_001_sss_sss
  2099:             //BNMI.S <label>                                  |A|012346|-|-*---|-----|          |0110_101_001_sss_sss [BPL.S <label>]
  2100:             //JBNMI.S <label>                                 |A|012346|-|-*---|-----|          |0110_101_001_sss_sss [BPL.S <label>]
  2101:             //JBPL.S <label>                                  |A|012346|-|-*---|-----|          |0110_101_001_sss_sss [BPL.S <label>]
  2102:           case 0b0110_101_001:
  2103:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2104:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2105:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2106:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2107:             //BPL.S <label>                                   |-|012346|-|-*---|-----|          |0110_101_010_sss_sss
  2108:             //BNMI.S <label>                                  |A|012346|-|-*---|-----|          |0110_101_010_sss_sss [BPL.S <label>]
  2109:             //JBNMI.S <label>                                 |A|012346|-|-*---|-----|          |0110_101_010_sss_sss [BPL.S <label>]
  2110:             //JBPL.S <label>                                  |A|012346|-|-*---|-----|          |0110_101_010_sss_sss [BPL.S <label>]
  2111:           case 0b0110_101_010:
  2112:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2113:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2114:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2115:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2116:             //BPL.S <label>                                   |-|01----|-|-*---|-----|          |0110_101_011_sss_sss
  2117:             //BNMI.S <label>                                  |A|01----|-|-*---|-----|          |0110_101_011_sss_sss [BPL.S <label>]
  2118:             //JBNMI.S <label>                                 |A|01----|-|-*---|-----|          |0110_101_011_sss_sss [BPL.S <label>]
  2119:             //JBPL.S <label>                                  |A|01----|-|-*---|-----|          |0110_101_011_sss_sss [BPL.S <label>]
  2120:           case 0b0110_101_011:
  2121:             irpBpls ();
  2122:             break irpSwitch;
  2123: 
  2124:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2125:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2126:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2127:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2128:             //BMI.W <label>                                   |-|012346|-|-*---|-----|          |0110_101_100_000_000-{offset}
  2129:             //BNPL.W <label>                                  |A|012346|-|-*---|-----|          |0110_101_100_000_000-{offset}        [BMI.W <label>]
  2130:             //JBMI.W <label>                                  |A|012346|-|-*---|-----|          |0110_101_100_000_000-{offset}        [BMI.W <label>]
  2131:             //JBNPL.W <label>                                 |A|012346|-|-*---|-----|          |0110_101_100_000_000-{offset}        [BMI.W <label>]
  2132:             //BMI.S <label>                                   |-|012346|-|-*---|-----|          |0110_101_100_sss_sss (s is not equal to 0)
  2133:             //BNPL.S <label>                                  |A|012346|-|-*---|-----|          |0110_101_100_sss_sss (s is not equal to 0)   [BMI.S <label>]
  2134:             //JBMI.S <label>                                  |A|012346|-|-*---|-----|          |0110_101_100_sss_sss (s is not equal to 0)   [BMI.S <label>]
  2135:             //JBNPL.S <label>                                 |A|012346|-|-*---|-----|          |0110_101_100_sss_sss (s is not equal to 0)   [BMI.S <label>]
  2136:             //JBNMI.L <label>                                 |A|012346|-|-*---|-----|          |0110_101_100_000_110-0100111011111001-{address}      [BMI.S (*)+8;JMP <label>]
  2137:             //JBPL.L <label>                                  |A|012346|-|-*---|-----|          |0110_101_100_000_110-0100111011111001-{address}      [BMI.S (*)+8;JMP <label>]
  2138:           case 0b0110_101_100:
  2139:             irpBmisw ();
  2140:             break irpSwitch;
  2141: 
  2142:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2143:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2144:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2145:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2146:             //BMI.S <label>                                   |-|012346|-|-*---|-----|          |0110_101_101_sss_sss
  2147:             //BNPL.S <label>                                  |A|012346|-|-*---|-----|          |0110_101_101_sss_sss [BMI.S <label>]
  2148:             //JBMI.S <label>                                  |A|012346|-|-*---|-----|          |0110_101_101_sss_sss [BMI.S <label>]
  2149:             //JBNPL.S <label>                                 |A|012346|-|-*---|-----|          |0110_101_101_sss_sss [BMI.S <label>]
  2150:           case 0b0110_101_101:
  2151:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2152:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2153:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2154:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2155:             //BMI.S <label>                                   |-|012346|-|-*---|-----|          |0110_101_110_sss_sss
  2156:             //BNPL.S <label>                                  |A|012346|-|-*---|-----|          |0110_101_110_sss_sss [BMI.S <label>]
  2157:             //JBMI.S <label>                                  |A|012346|-|-*---|-----|          |0110_101_110_sss_sss [BMI.S <label>]
  2158:             //JBNPL.S <label>                                 |A|012346|-|-*---|-----|          |0110_101_110_sss_sss [BMI.S <label>]
  2159:           case 0b0110_101_110:
  2160:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2161:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2162:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2163:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2164:             //BMI.S <label>                                   |-|01----|-|-*---|-----|          |0110_101_111_sss_sss
  2165:             //BNPL.S <label>                                  |A|01----|-|-*---|-----|          |0110_101_111_sss_sss [BMI.S <label>]
  2166:             //JBMI.S <label>                                  |A|01----|-|-*---|-----|          |0110_101_111_sss_sss [BMI.S <label>]
  2167:             //JBNPL.S <label>                                 |A|01----|-|-*---|-----|          |0110_101_111_sss_sss [BMI.S <label>]
  2168:           case 0b0110_101_111:
  2169:             irpBmis ();
  2170:             break irpSwitch;
  2171: 
  2172:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2173:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2174:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2175:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2176:             //BGE.W <label>                                   |-|012346|-|-*-*-|-----|          |0110_110_000_000_000-{offset}
  2177:             //BNLT.W <label>                                  |A|012346|-|-*-*-|-----|          |0110_110_000_000_000-{offset}        [BGE.W <label>]
  2178:             //JBGE.W <label>                                  |A|012346|-|-*-*-|-----|          |0110_110_000_000_000-{offset}        [BGE.W <label>]
  2179:             //JBNLT.W <label>                                 |A|012346|-|-*-*-|-----|          |0110_110_000_000_000-{offset}        [BGE.W <label>]
  2180:             //BGE.S <label>                                   |-|012346|-|-*-*-|-----|          |0110_110_000_sss_sss (s is not equal to 0)
  2181:             //BNLT.S <label>                                  |A|012346|-|-*-*-|-----|          |0110_110_000_sss_sss (s is not equal to 0)   [BGE.S <label>]
  2182:             //JBGE.S <label>                                  |A|012346|-|-*-*-|-----|          |0110_110_000_sss_sss (s is not equal to 0)   [BGE.S <label>]
  2183:             //JBNLT.S <label>                                 |A|012346|-|-*-*-|-----|          |0110_110_000_sss_sss (s is not equal to 0)   [BGE.S <label>]
  2184:             //JBLT.L <label>                                  |A|012346|-|-*-*-|-----|          |0110_110_000_000_110-0100111011111001-{address}      [BGE.S (*)+8;JMP <label>]
  2185:             //JBNGE.L <label>                                 |A|012346|-|-*-*-|-----|          |0110_110_000_000_110-0100111011111001-{address}      [BGE.S (*)+8;JMP <label>]
  2186:           case 0b0110_110_000:
  2187:             irpBgesw ();
  2188:             break irpSwitch;
  2189: 
  2190:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2191:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2192:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2193:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2194:             //BGE.S <label>                                   |-|012346|-|-*-*-|-----|          |0110_110_001_sss_sss
  2195:             //BNLT.S <label>                                  |A|012346|-|-*-*-|-----|          |0110_110_001_sss_sss [BGE.S <label>]
  2196:             //JBGE.S <label>                                  |A|012346|-|-*-*-|-----|          |0110_110_001_sss_sss [BGE.S <label>]
  2197:             //JBNLT.S <label>                                 |A|012346|-|-*-*-|-----|          |0110_110_001_sss_sss [BGE.S <label>]
  2198:           case 0b0110_110_001:
  2199:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2200:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2201:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2202:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2203:             //BGE.S <label>                                   |-|012346|-|-*-*-|-----|          |0110_110_010_sss_sss
  2204:             //BNLT.S <label>                                  |A|012346|-|-*-*-|-----|          |0110_110_010_sss_sss [BGE.S <label>]
  2205:             //JBGE.S <label>                                  |A|012346|-|-*-*-|-----|          |0110_110_010_sss_sss [BGE.S <label>]
  2206:             //JBNLT.S <label>                                 |A|012346|-|-*-*-|-----|          |0110_110_010_sss_sss [BGE.S <label>]
  2207:           case 0b0110_110_010:
  2208:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2209:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2210:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2211:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2212:             //BGE.S <label>                                   |-|01----|-|-*-*-|-----|          |0110_110_011_sss_sss
  2213:             //BNLT.S <label>                                  |A|01----|-|-*-*-|-----|          |0110_110_011_sss_sss [BGE.S <label>]
  2214:             //JBGE.S <label>                                  |A|01----|-|-*-*-|-----|          |0110_110_011_sss_sss [BGE.S <label>]
  2215:             //JBNLT.S <label>                                 |A|01----|-|-*-*-|-----|          |0110_110_011_sss_sss [BGE.S <label>]
  2216:           case 0b0110_110_011:
  2217:             irpBges ();
  2218:             break irpSwitch;
  2219: 
  2220:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2221:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2222:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2223:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2224:             //BLT.W <label>                                   |-|012346|-|-*-*-|-----|          |0110_110_100_000_000-{offset}
  2225:             //BNGE.W <label>                                  |A|012346|-|-*-*-|-----|          |0110_110_100_000_000-{offset}        [BLT.W <label>]
  2226:             //JBLT.W <label>                                  |A|012346|-|-*-*-|-----|          |0110_110_100_000_000-{offset}        [BLT.W <label>]
  2227:             //JBNGE.W <label>                                 |A|012346|-|-*-*-|-----|          |0110_110_100_000_000-{offset}        [BLT.W <label>]
  2228:             //BLT.S <label>                                   |-|012346|-|-*-*-|-----|          |0110_110_100_sss_sss (s is not equal to 0)
  2229:             //BNGE.S <label>                                  |A|012346|-|-*-*-|-----|          |0110_110_100_sss_sss (s is not equal to 0)   [BLT.S <label>]
  2230:             //JBLT.S <label>                                  |A|012346|-|-*-*-|-----|          |0110_110_100_sss_sss (s is not equal to 0)   [BLT.S <label>]
  2231:             //JBNGE.S <label>                                 |A|012346|-|-*-*-|-----|          |0110_110_100_sss_sss (s is not equal to 0)   [BLT.S <label>]
  2232:             //JBGE.L <label>                                  |A|012346|-|-*-*-|-----|          |0110_110_100_000_110-0100111011111001-{address}      [BLT.S (*)+8;JMP <label>]
  2233:             //JBNLT.L <label>                                 |A|012346|-|-*-*-|-----|          |0110_110_100_000_110-0100111011111001-{address}      [BLT.S (*)+8;JMP <label>]
  2234:           case 0b0110_110_100:
  2235:             irpBltsw ();
  2236:             break irpSwitch;
  2237: 
  2238:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2239:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2240:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2241:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2242:             //BLT.S <label>                                   |-|012346|-|-*-*-|-----|          |0110_110_101_sss_sss
  2243:             //BNGE.S <label>                                  |A|012346|-|-*-*-|-----|          |0110_110_101_sss_sss [BLT.S <label>]
  2244:             //JBLT.S <label>                                  |A|012346|-|-*-*-|-----|          |0110_110_101_sss_sss [BLT.S <label>]
  2245:             //JBNGE.S <label>                                 |A|012346|-|-*-*-|-----|          |0110_110_101_sss_sss [BLT.S <label>]
  2246:           case 0b0110_110_101:
  2247:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2248:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2249:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2250:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2251:             //BLT.S <label>                                   |-|012346|-|-*-*-|-----|          |0110_110_110_sss_sss
  2252:             //BNGE.S <label>                                  |A|012346|-|-*-*-|-----|          |0110_110_110_sss_sss [BLT.S <label>]
  2253:             //JBLT.S <label>                                  |A|012346|-|-*-*-|-----|          |0110_110_110_sss_sss [BLT.S <label>]
  2254:             //JBNGE.S <label>                                 |A|012346|-|-*-*-|-----|          |0110_110_110_sss_sss [BLT.S <label>]
  2255:           case 0b0110_110_110:
  2256:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2257:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2258:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2259:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2260:             //BLT.S <label>                                   |-|01----|-|-*-*-|-----|          |0110_110_111_sss_sss
  2261:             //BNGE.S <label>                                  |A|01----|-|-*-*-|-----|          |0110_110_111_sss_sss [BLT.S <label>]
  2262:             //JBLT.S <label>                                  |A|01----|-|-*-*-|-----|          |0110_110_111_sss_sss [BLT.S <label>]
  2263:             //JBNGE.S <label>                                 |A|01----|-|-*-*-|-----|          |0110_110_111_sss_sss [BLT.S <label>]
  2264:           case 0b0110_110_111:
  2265:             irpBlts ();
  2266:             break irpSwitch;
  2267: 
  2268:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2269:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2270:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2271:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2272:             //BGT.W <label>                                   |-|012346|-|-***-|-----|          |0110_111_000_000_000-{offset}
  2273:             //BNLE.W <label>                                  |A|012346|-|-***-|-----|          |0110_111_000_000_000-{offset}        [BGT.W <label>]
  2274:             //JBGT.W <label>                                  |A|012346|-|-***-|-----|          |0110_111_000_000_000-{offset}        [BGT.W <label>]
  2275:             //JBNLE.W <label>                                 |A|012346|-|-***-|-----|          |0110_111_000_000_000-{offset}        [BGT.W <label>]
  2276:             //BGT.S <label>                                   |-|012346|-|-***-|-----|          |0110_111_000_sss_sss (s is not equal to 0)
  2277:             //BNLE.S <label>                                  |A|012346|-|-***-|-----|          |0110_111_000_sss_sss (s is not equal to 0)   [BGT.S <label>]
  2278:             //JBGT.S <label>                                  |A|012346|-|-***-|-----|          |0110_111_000_sss_sss (s is not equal to 0)   [BGT.S <label>]
  2279:             //JBNLE.S <label>                                 |A|012346|-|-***-|-----|          |0110_111_000_sss_sss (s is not equal to 0)   [BGT.S <label>]
  2280:             //JBLE.L <label>                                  |A|012346|-|-***-|-----|          |0110_111_000_000_110-0100111011111001-{address}      [BGT.S (*)+8;JMP <label>]
  2281:             //JBNGT.L <label>                                 |A|012346|-|-***-|-----|          |0110_111_000_000_110-0100111011111001-{address}      [BGT.S (*)+8;JMP <label>]
  2282:           case 0b0110_111_000:
  2283:             irpBgtsw ();
  2284:             break irpSwitch;
  2285: 
  2286:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2287:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2288:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2289:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2290:             //BGT.S <label>                                   |-|012346|-|-***-|-----|          |0110_111_001_sss_sss
  2291:             //BNLE.S <label>                                  |A|012346|-|-***-|-----|          |0110_111_001_sss_sss [BGT.S <label>]
  2292:             //JBGT.S <label>                                  |A|012346|-|-***-|-----|          |0110_111_001_sss_sss [BGT.S <label>]
  2293:             //JBNLE.S <label>                                 |A|012346|-|-***-|-----|          |0110_111_001_sss_sss [BGT.S <label>]
  2294:           case 0b0110_111_001:
  2295:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2296:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2297:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2298:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2299:             //BGT.S <label>                                   |-|012346|-|-***-|-----|          |0110_111_010_sss_sss
  2300:             //BNLE.S <label>                                  |A|012346|-|-***-|-----|          |0110_111_010_sss_sss [BGT.S <label>]
  2301:             //JBGT.S <label>                                  |A|012346|-|-***-|-----|          |0110_111_010_sss_sss [BGT.S <label>]
  2302:             //JBNLE.S <label>                                 |A|012346|-|-***-|-----|          |0110_111_010_sss_sss [BGT.S <label>]
  2303:           case 0b0110_111_010:
  2304:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2305:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2306:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2307:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2308:             //BGT.S <label>                                   |-|01----|-|-***-|-----|          |0110_111_011_sss_sss
  2309:             //BNLE.S <label>                                  |A|01----|-|-***-|-----|          |0110_111_011_sss_sss [BGT.S <label>]
  2310:             //JBGT.S <label>                                  |A|01----|-|-***-|-----|          |0110_111_011_sss_sss [BGT.S <label>]
  2311:             //JBNLE.S <label>                                 |A|01----|-|-***-|-----|          |0110_111_011_sss_sss [BGT.S <label>]
  2312:           case 0b0110_111_011:
  2313:             irpBgts ();
  2314:             break irpSwitch;
  2315: 
  2316:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2317:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2318:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2319:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2320:             //BLE.W <label>                                   |-|012346|-|-***-|-----|          |0110_111_100_000_000-{offset}
  2321:             //BNGT.W <label>                                  |A|012346|-|-***-|-----|          |0110_111_100_000_000-{offset}        [BLE.W <label>]
  2322:             //JBLE.W <label>                                  |A|012346|-|-***-|-----|          |0110_111_100_000_000-{offset}        [BLE.W <label>]
  2323:             //JBNGT.W <label>                                 |A|012346|-|-***-|-----|          |0110_111_100_000_000-{offset}        [BLE.W <label>]
  2324:             //BLE.S <label>                                   |-|012346|-|-***-|-----|          |0110_111_100_sss_sss (s is not equal to 0)
  2325:             //BNGT.S <label>                                  |A|012346|-|-***-|-----|          |0110_111_100_sss_sss (s is not equal to 0)   [BLE.S <label>]
  2326:             //JBLE.S <label>                                  |A|012346|-|-***-|-----|          |0110_111_100_sss_sss (s is not equal to 0)   [BLE.S <label>]
  2327:             //JBNGT.S <label>                                 |A|012346|-|-***-|-----|          |0110_111_100_sss_sss (s is not equal to 0)   [BLE.S <label>]
  2328:             //JBGT.L <label>                                  |A|012346|-|-***-|-----|          |0110_111_100_000_110-0100111011111001-{address}      [BLE.S (*)+8;JMP <label>]
  2329:             //JBNLE.L <label>                                 |A|012346|-|-***-|-----|          |0110_111_100_000_110-0100111011111001-{address}      [BLE.S (*)+8;JMP <label>]
  2330:           case 0b0110_111_100:
  2331:             irpBlesw ();
  2332:             break irpSwitch;
  2333: 
  2334:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2335:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2336:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2337:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2338:             //BLE.S <label>                                   |-|012346|-|-***-|-----|          |0110_111_101_sss_sss
  2339:             //BNGT.S <label>                                  |A|012346|-|-***-|-----|          |0110_111_101_sss_sss [BLE.S <label>]
  2340:             //JBLE.S <label>                                  |A|012346|-|-***-|-----|          |0110_111_101_sss_sss [BLE.S <label>]
  2341:             //JBNGT.S <label>                                 |A|012346|-|-***-|-----|          |0110_111_101_sss_sss [BLE.S <label>]
  2342:           case 0b0110_111_101:
  2343:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2344:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2345:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2346:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2347:             //BLE.S <label>                                   |-|012346|-|-***-|-----|          |0110_111_110_sss_sss
  2348:             //BNGT.S <label>                                  |A|012346|-|-***-|-----|          |0110_111_110_sss_sss [BLE.S <label>]
  2349:             //JBLE.S <label>                                  |A|012346|-|-***-|-----|          |0110_111_110_sss_sss [BLE.S <label>]
  2350:             //JBNGT.S <label>                                 |A|012346|-|-***-|-----|          |0110_111_110_sss_sss [BLE.S <label>]
  2351:           case 0b0110_111_110:
  2352:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2353:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2354:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2355:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2356:             //BLE.S <label>                                   |-|01----|-|-***-|-----|          |0110_111_111_sss_sss
  2357:             //BNGT.S <label>                                  |A|01----|-|-***-|-----|          |0110_111_111_sss_sss [BLE.S <label>]
  2358:             //JBLE.S <label>                                  |A|01----|-|-***-|-----|          |0110_111_111_sss_sss [BLE.S <label>]
  2359:             //JBNGT.S <label>                                 |A|01----|-|-***-|-----|          |0110_111_111_sss_sss [BLE.S <label>]
  2360:           case 0b0110_111_111:
  2361:             irpBles ();
  2362:             break irpSwitch;
  2363: 
  2364:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2365:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2366:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2367:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2368:             //IOCS <name>                                     |A|012346|-|UUUUU|UUUUU|          |0111_000_0dd_ddd_ddd-0100111001001111        [MOVEQ.L #<data>,D0;TRAP #15]
  2369:             //MOVEQ.L #<data>,Dq                              |-|012346|-|-UUUU|-**00|          |0111_qqq_0dd_ddd_ddd
  2370:           case 0b0111_000_000:
  2371:           case 0b0111_000_001:
  2372:           case 0b0111_000_010:
  2373:           case 0b0111_000_011:
  2374:           case 0b0111_001_000:
  2375:           case 0b0111_001_001:
  2376:           case 0b0111_001_010:
  2377:           case 0b0111_001_011:
  2378:           case 0b0111_010_000:
  2379:           case 0b0111_010_001:
  2380:           case 0b0111_010_010:
  2381:           case 0b0111_010_011:
  2382:           case 0b0111_011_000:
  2383:           case 0b0111_011_001:
  2384:           case 0b0111_011_010:
  2385:           case 0b0111_011_011:
  2386:           case 0b0111_100_000:
  2387:           case 0b0111_100_001:
  2388:           case 0b0111_100_010:
  2389:           case 0b0111_100_011:
  2390:           case 0b0111_101_000:
  2391:           case 0b0111_101_001:
  2392:           case 0b0111_101_010:
  2393:           case 0b0111_101_011:
  2394:           case 0b0111_110_000:
  2395:           case 0b0111_110_001:
  2396:           case 0b0111_110_010:
  2397:           case 0b0111_110_011:
  2398:           case 0b0111_111_000:
  2399:           case 0b0111_111_001:
  2400:           case 0b0111_111_010:
  2401:           case 0b0111_111_011:
  2402:             irpMoveq ();
  2403:             break irpSwitch;
  2404: 
  2405:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2406:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2407:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2408:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2409:             //MVS.B <ea>,Dq                                   |-|------|-|-UUUU|-**00|D M+-WXZPI|0111_qqq_100_mmm_rrr (ISA_B)
  2410:           case 0b0111_000_100:
  2411:           case 0b0111_001_100:
  2412:           case 0b0111_010_100:
  2413:           case 0b0111_011_100:
  2414:           case 0b0111_100_100:
  2415:           case 0b0111_101_100:
  2416:           case 0b0111_110_100:
  2417:           case 0b0111_111_100:
  2418:             irpMvsByte ();
  2419:             break irpSwitch;
  2420: 
  2421:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2422:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2423:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2424:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2425:             //MVS.W <ea>,Dq                                   |-|------|-|-UUUU|-**00|D M+-WXZPI|0111_qqq_101_mmm_rrr (ISA_B)
  2426:           case 0b0111_000_101:
  2427:           case 0b0111_001_101:
  2428:           case 0b0111_010_101:
  2429:           case 0b0111_011_101:
  2430:           case 0b0111_100_101:
  2431:           case 0b0111_101_101:
  2432:           case 0b0111_110_101:
  2433:           case 0b0111_111_101:
  2434:             irpMvsWord ();
  2435:             break irpSwitch;
  2436: 
  2437:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2438:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2439:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2440:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2441:             //MVZ.B <ea>,Dq                                   |-|------|-|-UUUU|-0*00|D M+-WXZPI|0111_qqq_110_mmm_rrr (ISA_B)
  2442:           case 0b0111_000_110:
  2443:           case 0b0111_001_110:
  2444:           case 0b0111_010_110:
  2445:           case 0b0111_011_110:
  2446:           case 0b0111_100_110:
  2447:           case 0b0111_101_110:
  2448:           case 0b0111_110_110:
  2449:           case 0b0111_111_110:
  2450:             irpMvzByte ();
  2451:             break irpSwitch;
  2452: 
  2453:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2454:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2455:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2456:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2457:             //MVZ.W <ea>,Dq                                   |-|------|-|-UUUU|-0*00|D M+-WXZPI|0111_qqq_111_mmm_rrr (ISA_B)
  2458:           case 0b0111_000_111:
  2459:           case 0b0111_001_111:
  2460:           case 0b0111_010_111:
  2461:           case 0b0111_011_111:
  2462:           case 0b0111_100_111:
  2463:           case 0b0111_101_111:
  2464:           case 0b0111_110_111:
  2465:           case 0b0111_111_111:
  2466:             irpMvzWord ();
  2467:             break irpSwitch;
  2468: 
  2469:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2470:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2471:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2472:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2473:             //OR.B <ea>,Dq                                    |-|012346|-|-UUUU|-**00|D M+-WXZPI|1000_qqq_000_mmm_rrr
  2474:           case 0b1000_000_000:
  2475:           case 0b1000_001_000:
  2476:           case 0b1000_010_000:
  2477:           case 0b1000_011_000:
  2478:           case 0b1000_100_000:
  2479:           case 0b1000_101_000:
  2480:           case 0b1000_110_000:
  2481:           case 0b1000_111_000:
  2482:             irpOrToRegByte ();
  2483:             break irpSwitch;
  2484: 
  2485:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2486:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2487:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2488:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2489:             //OR.W <ea>,Dq                                    |-|012346|-|-UUUU|-**00|D M+-WXZPI|1000_qqq_001_mmm_rrr
  2490:           case 0b1000_000_001:
  2491:           case 0b1000_001_001:
  2492:           case 0b1000_010_001:
  2493:           case 0b1000_011_001:
  2494:           case 0b1000_100_001:
  2495:           case 0b1000_101_001:
  2496:           case 0b1000_110_001:
  2497:           case 0b1000_111_001:
  2498:             irpOrToRegWord ();
  2499:             break irpSwitch;
  2500: 
  2501:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2502:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2503:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2504:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2505:             //OR.L <ea>,Dq                                    |-|012346|-|-UUUU|-**00|D M+-WXZPI|1000_qqq_010_mmm_rrr
  2506:           case 0b1000_000_010:
  2507:           case 0b1000_001_010:
  2508:           case 0b1000_010_010:
  2509:           case 0b1000_011_010:
  2510:           case 0b1000_100_010:
  2511:           case 0b1000_101_010:
  2512:           case 0b1000_110_010:
  2513:           case 0b1000_111_010:
  2514:             irpOrToRegLong ();
  2515:             break irpSwitch;
  2516: 
  2517:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2518:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2519:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2520:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2521:             //DIVU.W <ea>,Dq                                  |-|012346|-|-UUUU|-***0|D M+-WXZPI|1000_qqq_011_mmm_rrr
  2522:           case 0b1000_000_011:
  2523:           case 0b1000_001_011:
  2524:           case 0b1000_010_011:
  2525:           case 0b1000_011_011:
  2526:           case 0b1000_100_011:
  2527:           case 0b1000_101_011:
  2528:           case 0b1000_110_011:
  2529:           case 0b1000_111_011:
  2530:             irpDivuWord ();
  2531:             break irpSwitch;
  2532: 
  2533:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2534:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2535:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2536:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2537:             //SBCD.B Dr,Dq                                    |-|012346|-|UUUUU|*U*U*|          |1000_qqq_100_000_rrr
  2538:             //SBCD.B -(Ar),-(Aq)                              |-|012346|-|UUUUU|*U*U*|          |1000_qqq_100_001_rrr
  2539:             //OR.B Dq,<ea>                                    |-|012346|-|-UUUU|-**00|  M+-WXZ  |1000_qqq_100_mmm_rrr
  2540:           case 0b1000_000_100:
  2541:           case 0b1000_001_100:
  2542:           case 0b1000_010_100:
  2543:           case 0b1000_011_100:
  2544:           case 0b1000_100_100:
  2545:           case 0b1000_101_100:
  2546:           case 0b1000_110_100:
  2547:           case 0b1000_111_100:
  2548:             irpOrToMemByte ();
  2549:             break irpSwitch;
  2550: 
  2551:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2552:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2553:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2554:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2555:             //OR.W Dq,<ea>                                    |-|012346|-|-UUUU|-**00|  M+-WXZ  |1000_qqq_101_mmm_rrr
  2556:           case 0b1000_000_101:
  2557:           case 0b1000_001_101:
  2558:           case 0b1000_010_101:
  2559:           case 0b1000_011_101:
  2560:           case 0b1000_100_101:
  2561:           case 0b1000_101_101:
  2562:           case 0b1000_110_101:
  2563:           case 0b1000_111_101:
  2564:             irpOrToMemWord ();
  2565:             break irpSwitch;
  2566: 
  2567:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2568:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2569:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2570:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2571:             //OR.L Dq,<ea>                                    |-|012346|-|-UUUU|-**00|  M+-WXZ  |1000_qqq_110_mmm_rrr
  2572:           case 0b1000_000_110:
  2573:           case 0b1000_001_110:
  2574:           case 0b1000_010_110:
  2575:           case 0b1000_011_110:
  2576:           case 0b1000_100_110:
  2577:           case 0b1000_101_110:
  2578:           case 0b1000_110_110:
  2579:           case 0b1000_111_110:
  2580:             irpOrToMemLong ();
  2581:             break irpSwitch;
  2582: 
  2583:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2584:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2585:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2586:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2587:             //DIVS.W <ea>,Dq                                  |-|012346|-|-UUUU|-***0|D M+-WXZPI|1000_qqq_111_mmm_rrr
  2588:           case 0b1000_000_111:
  2589:           case 0b1000_001_111:
  2590:           case 0b1000_010_111:
  2591:           case 0b1000_011_111:
  2592:           case 0b1000_100_111:
  2593:           case 0b1000_101_111:
  2594:           case 0b1000_110_111:
  2595:           case 0b1000_111_111:
  2596:             irpDivsWord ();
  2597:             break irpSwitch;
  2598: 
  2599:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2600:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2601:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2602:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2603:             //SUB.B <ea>,Dq                                   |-|012346|-|UUUUU|*****|D M+-WXZPI|1001_qqq_000_mmm_rrr
  2604:           case 0b1001_000_000:
  2605:           case 0b1001_001_000:
  2606:           case 0b1001_010_000:
  2607:           case 0b1001_011_000:
  2608:           case 0b1001_100_000:
  2609:           case 0b1001_101_000:
  2610:           case 0b1001_110_000:
  2611:           case 0b1001_111_000:
  2612:             irpSubToRegByte ();
  2613:             break irpSwitch;
  2614: 
  2615:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2616:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2617:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2618:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2619:             //SUB.W <ea>,Dq                                   |-|012346|-|UUUUU|*****|DAM+-WXZPI|1001_qqq_001_mmm_rrr
  2620:           case 0b1001_000_001:
  2621:           case 0b1001_001_001:
  2622:           case 0b1001_010_001:
  2623:           case 0b1001_011_001:
  2624:           case 0b1001_100_001:
  2625:           case 0b1001_101_001:
  2626:           case 0b1001_110_001:
  2627:           case 0b1001_111_001:
  2628:             irpSubToRegWord ();
  2629:             break irpSwitch;
  2630: 
  2631:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2632:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2633:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2634:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2635:             //SUB.L <ea>,Dq                                   |-|012346|-|UUUUU|*****|DAM+-WXZPI|1001_qqq_010_mmm_rrr
  2636:           case 0b1001_000_010:
  2637:           case 0b1001_001_010:
  2638:           case 0b1001_010_010:
  2639:           case 0b1001_011_010:
  2640:           case 0b1001_100_010:
  2641:           case 0b1001_101_010:
  2642:           case 0b1001_110_010:
  2643:           case 0b1001_111_010:
  2644:             irpSubToRegLong ();
  2645:             break irpSwitch;
  2646: 
  2647:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2648:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2649:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2650:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2651:             //SUBA.W <ea>,Aq                                  |-|012346|-|-----|-----|DAM+-WXZPI|1001_qqq_011_mmm_rrr
  2652:             //SUB.W <ea>,Aq                                   |A|012346|-|-----|-----|DAM+-WXZPI|1001_qqq_011_mmm_rrr [SUBA.W <ea>,Aq]
  2653:             //CLR.W Ar                                        |A|012346|-|-----|-----| A        |1001_rrr_011_001_rrr [SUBA.W Ar,Ar]
  2654:           case 0b1001_000_011:
  2655:           case 0b1001_001_011:
  2656:           case 0b1001_010_011:
  2657:           case 0b1001_011_011:
  2658:           case 0b1001_100_011:
  2659:           case 0b1001_101_011:
  2660:           case 0b1001_110_011:
  2661:           case 0b1001_111_011:
  2662:             irpSubaWord ();
  2663:             break irpSwitch;
  2664: 
  2665:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2666:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2667:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2668:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2669:             //SUBX.B Dr,Dq                                    |-|012346|-|*UUUU|*****|          |1001_qqq_100_000_rrr
  2670:             //SUBX.B -(Ar),-(Aq)                              |-|012346|-|*UUUU|*****|          |1001_qqq_100_001_rrr
  2671:             //SUB.B Dq,<ea>                                   |-|012346|-|UUUUU|*****|  M+-WXZ  |1001_qqq_100_mmm_rrr
  2672:           case 0b1001_000_100:
  2673:           case 0b1001_001_100:
  2674:           case 0b1001_010_100:
  2675:           case 0b1001_011_100:
  2676:           case 0b1001_100_100:
  2677:           case 0b1001_101_100:
  2678:           case 0b1001_110_100:
  2679:           case 0b1001_111_100:
  2680:             irpSubToMemByte ();
  2681:             break irpSwitch;
  2682: 
  2683:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2684:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2685:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2686:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2687:             //SUBX.W Dr,Dq                                    |-|012346|-|*UUUU|*****|          |1001_qqq_101_000_rrr
  2688:             //SUBX.W -(Ar),-(Aq)                              |-|012346|-|*UUUU|*****|          |1001_qqq_101_001_rrr
  2689:             //SUB.W Dq,<ea>                                   |-|012346|-|UUUUU|*****|  M+-WXZ  |1001_qqq_101_mmm_rrr
  2690:           case 0b1001_000_101:
  2691:           case 0b1001_001_101:
  2692:           case 0b1001_010_101:
  2693:           case 0b1001_011_101:
  2694:           case 0b1001_100_101:
  2695:           case 0b1001_101_101:
  2696:           case 0b1001_110_101:
  2697:           case 0b1001_111_101:
  2698:             irpSubToMemWord ();
  2699:             break irpSwitch;
  2700: 
  2701:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2702:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2703:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2704:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2705:             //SUBX.L Dr,Dq                                    |-|012346|-|*UUUU|*****|          |1001_qqq_110_000_rrr
  2706:             //SUBX.L -(Ar),-(Aq)                              |-|012346|-|*UUUU|*****|          |1001_qqq_110_001_rrr
  2707:             //SUB.L Dq,<ea>                                   |-|012346|-|UUUUU|*****|  M+-WXZ  |1001_qqq_110_mmm_rrr
  2708:           case 0b1001_000_110:
  2709:           case 0b1001_001_110:
  2710:           case 0b1001_010_110:
  2711:           case 0b1001_011_110:
  2712:           case 0b1001_100_110:
  2713:           case 0b1001_101_110:
  2714:           case 0b1001_110_110:
  2715:           case 0b1001_111_110:
  2716:             irpSubToMemLong ();
  2717:             break irpSwitch;
  2718: 
  2719:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2720:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2721:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2722:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2723:             //SUBA.L <ea>,Aq                                  |-|012346|-|-----|-----|DAM+-WXZPI|1001_qqq_111_mmm_rrr
  2724:             //SUB.L <ea>,Aq                                   |A|012346|-|-----|-----|DAM+-WXZPI|1001_qqq_111_mmm_rrr [SUBA.L <ea>,Aq]
  2725:             //CLR.L Ar                                        |A|012346|-|-----|-----| A        |1001_rrr_111_001_rrr [SUBA.L Ar,Ar]
  2726:           case 0b1001_000_111:
  2727:           case 0b1001_001_111:
  2728:           case 0b1001_010_111:
  2729:           case 0b1001_011_111:
  2730:           case 0b1001_100_111:
  2731:           case 0b1001_101_111:
  2732:           case 0b1001_110_111:
  2733:           case 0b1001_111_111:
  2734:             irpSubaLong ();
  2735:             break irpSwitch;
  2736: 
  2737:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2738:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2739:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2740:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2741:             //SXCALL <name>                                   |A|012346|-|UUUUU|*****|          |1010_0dd_ddd_ddd_ddd [ALINE #<data>]
  2742:           case 0b1010_000_000:
  2743:           case 0b1010_000_001:
  2744:           case 0b1010_000_010:
  2745:           case 0b1010_000_011:
  2746:           case 0b1010_000_100:
  2747:           case 0b1010_000_101:
  2748:           case 0b1010_000_110:
  2749:           case 0b1010_000_111:
  2750:           case 0b1010_001_000:
  2751:           case 0b1010_001_001:
  2752:           case 0b1010_001_010:
  2753:           case 0b1010_001_011:
  2754:           case 0b1010_001_100:
  2755:           case 0b1010_001_101:
  2756:           case 0b1010_001_110:
  2757:           case 0b1010_001_111:
  2758:           case 0b1010_010_000:
  2759:           case 0b1010_010_001:
  2760:           case 0b1010_010_010:
  2761:           case 0b1010_010_011:
  2762:           case 0b1010_010_100:
  2763:           case 0b1010_010_101:
  2764:           case 0b1010_010_110:
  2765:           case 0b1010_010_111:
  2766:           case 0b1010_011_000:
  2767:           case 0b1010_011_001:
  2768:           case 0b1010_011_010:
  2769:           case 0b1010_011_011:
  2770:           case 0b1010_011_100:
  2771:           case 0b1010_011_101:
  2772:           case 0b1010_011_110:
  2773:           case 0b1010_011_111:
  2774:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2775:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2776:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2777:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2778:             //ALINE #<data>                                   |-|012346|-|UUUUU|*****|          |1010_ddd_ddd_ddd_ddd (line 1010 emulator)
  2779:           case 0b1010_100_000:
  2780:           case 0b1010_100_001:
  2781:           case 0b1010_100_010:
  2782:           case 0b1010_100_011:
  2783:           case 0b1010_100_100:
  2784:           case 0b1010_100_101:
  2785:           case 0b1010_100_110:
  2786:           case 0b1010_100_111:
  2787:           case 0b1010_101_000:
  2788:           case 0b1010_101_001:
  2789:           case 0b1010_101_010:
  2790:           case 0b1010_101_011:
  2791:           case 0b1010_101_100:
  2792:           case 0b1010_101_101:
  2793:           case 0b1010_101_110:
  2794:           case 0b1010_101_111:
  2795:           case 0b1010_110_000:
  2796:           case 0b1010_110_001:
  2797:           case 0b1010_110_010:
  2798:           case 0b1010_110_011:
  2799:           case 0b1010_110_100:
  2800:           case 0b1010_110_101:
  2801:           case 0b1010_110_110:
  2802:           case 0b1010_110_111:
  2803:           case 0b1010_111_000:
  2804:           case 0b1010_111_001:
  2805:           case 0b1010_111_010:
  2806:           case 0b1010_111_011:
  2807:           case 0b1010_111_100:
  2808:           case 0b1010_111_101:
  2809:           case 0b1010_111_110:
  2810:           case 0b1010_111_111:
  2811:             irpAline ();
  2812:             break irpSwitch;
  2813: 
  2814:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2815:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2816:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2817:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2818:             //CMP.B <ea>,Dq                                   |-|012346|-|-UUUU|-****|D M+-WXZPI|1011_qqq_000_mmm_rrr
  2819:           case 0b1011_000_000:
  2820:           case 0b1011_001_000:
  2821:           case 0b1011_010_000:
  2822:           case 0b1011_011_000:
  2823:           case 0b1011_100_000:
  2824:           case 0b1011_101_000:
  2825:           case 0b1011_110_000:
  2826:           case 0b1011_111_000:
  2827:             irpCmpByte ();
  2828:             break irpSwitch;
  2829: 
  2830:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2831:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2832:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2833:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2834:             //CMP.W <ea>,Dq                                   |-|012346|-|-UUUU|-****|DAM+-WXZPI|1011_qqq_001_mmm_rrr
  2835:           case 0b1011_000_001:
  2836:           case 0b1011_001_001:
  2837:           case 0b1011_010_001:
  2838:           case 0b1011_011_001:
  2839:           case 0b1011_100_001:
  2840:           case 0b1011_101_001:
  2841:           case 0b1011_110_001:
  2842:           case 0b1011_111_001:
  2843:             irpCmpWord ();
  2844:             break irpSwitch;
  2845: 
  2846:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2847:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2848:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2849:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2850:             //CMP.L <ea>,Dq                                   |-|012346|-|-UUUU|-****|DAM+-WXZPI|1011_qqq_010_mmm_rrr
  2851:           case 0b1011_000_010:
  2852:           case 0b1011_001_010:
  2853:           case 0b1011_010_010:
  2854:           case 0b1011_011_010:
  2855:           case 0b1011_100_010:
  2856:           case 0b1011_101_010:
  2857:           case 0b1011_110_010:
  2858:           case 0b1011_111_010:
  2859:             irpCmpLong ();
  2860:             break irpSwitch;
  2861: 
  2862:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2863:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2864:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2865:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2866:             //CMPA.W <ea>,Aq                                  |-|012346|-|-UUUU|-****|DAM+-WXZPI|1011_qqq_011_mmm_rrr
  2867:             //CMP.W <ea>,Aq                                   |A|012346|-|-UUUU|-****|DAM+-WXZPI|1011_qqq_011_mmm_rrr [CMPA.W <ea>,Aq]
  2868:           case 0b1011_000_011:
  2869:           case 0b1011_001_011:
  2870:           case 0b1011_010_011:
  2871:           case 0b1011_011_011:
  2872:           case 0b1011_100_011:
  2873:           case 0b1011_101_011:
  2874:           case 0b1011_110_011:
  2875:           case 0b1011_111_011:
  2876:             irpCmpaWord ();
  2877:             break irpSwitch;
  2878: 
  2879:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2880:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2881:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2882:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2883:             //EOR.B Dq,<ea>                                   |-|012346|-|-UUUU|-**00|D M+-WXZ  |1011_qqq_100_mmm_rrr
  2884:             //CMPM.B (Ar)+,(Aq)+                              |-|012346|-|-UUUU|-****|          |1011_qqq_100_001_rrr
  2885:           case 0b1011_000_100:
  2886:           case 0b1011_001_100:
  2887:           case 0b1011_010_100:
  2888:           case 0b1011_011_100:
  2889:           case 0b1011_100_100:
  2890:           case 0b1011_101_100:
  2891:           case 0b1011_110_100:
  2892:           case 0b1011_111_100:
  2893:             irpEorByte ();
  2894:             break irpSwitch;
  2895: 
  2896:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2897:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2898:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2899:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2900:             //EOR.W Dq,<ea>                                   |-|012346|-|-UUUU|-**00|D M+-WXZ  |1011_qqq_101_mmm_rrr
  2901:             //CMPM.W (Ar)+,(Aq)+                              |-|012346|-|-UUUU|-****|          |1011_qqq_101_001_rrr
  2902:           case 0b1011_000_101:
  2903:           case 0b1011_001_101:
  2904:           case 0b1011_010_101:
  2905:           case 0b1011_011_101:
  2906:           case 0b1011_100_101:
  2907:           case 0b1011_101_101:
  2908:           case 0b1011_110_101:
  2909:           case 0b1011_111_101:
  2910:             irpEorWord ();
  2911:             break irpSwitch;
  2912: 
  2913:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2914:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2915:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2916:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2917:             //EOR.L Dq,<ea>                                   |-|012346|-|-UUUU|-**00|D M+-WXZ  |1011_qqq_110_mmm_rrr
  2918:             //CMPM.L (Ar)+,(Aq)+                              |-|012346|-|-UUUU|-****|          |1011_qqq_110_001_rrr
  2919:           case 0b1011_000_110:
  2920:           case 0b1011_001_110:
  2921:           case 0b1011_010_110:
  2922:           case 0b1011_011_110:
  2923:           case 0b1011_100_110:
  2924:           case 0b1011_101_110:
  2925:           case 0b1011_110_110:
  2926:           case 0b1011_111_110:
  2927:             irpEorLong ();
  2928:             break irpSwitch;
  2929: 
  2930:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2931:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2932:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2933:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2934:             //CMPA.L <ea>,Aq                                  |-|012346|-|-UUUU|-****|DAM+-WXZPI|1011_qqq_111_mmm_rrr
  2935:             //CMP.L <ea>,Aq                                   |A|012346|-|-UUUU|-****|DAM+-WXZPI|1011_qqq_111_mmm_rrr [CMPA.L <ea>,Aq]
  2936:           case 0b1011_000_111:
  2937:           case 0b1011_001_111:
  2938:           case 0b1011_010_111:
  2939:           case 0b1011_011_111:
  2940:           case 0b1011_100_111:
  2941:           case 0b1011_101_111:
  2942:           case 0b1011_110_111:
  2943:           case 0b1011_111_111:
  2944:             irpCmpaLong ();
  2945:             break irpSwitch;
  2946: 
  2947:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2948:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2949:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2950:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2951:             //AND.B <ea>,Dq                                   |-|012346|-|-UUUU|-**00|D M+-WXZPI|1100_qqq_000_mmm_rrr
  2952:           case 0b1100_000_000:
  2953:           case 0b1100_001_000:
  2954:           case 0b1100_010_000:
  2955:           case 0b1100_011_000:
  2956:           case 0b1100_100_000:
  2957:           case 0b1100_101_000:
  2958:           case 0b1100_110_000:
  2959:           case 0b1100_111_000:
  2960:             irpAndToRegByte ();
  2961:             break irpSwitch;
  2962: 
  2963:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2964:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2965:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2966:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2967:             //AND.W <ea>,Dq                                   |-|012346|-|-UUUU|-**00|D M+-WXZPI|1100_qqq_001_mmm_rrr
  2968:           case 0b1100_000_001:
  2969:           case 0b1100_001_001:
  2970:           case 0b1100_010_001:
  2971:           case 0b1100_011_001:
  2972:           case 0b1100_100_001:
  2973:           case 0b1100_101_001:
  2974:           case 0b1100_110_001:
  2975:           case 0b1100_111_001:
  2976:             irpAndToRegWord ();
  2977:             break irpSwitch;
  2978: 
  2979:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2980:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2981:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2982:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2983:             //AND.L <ea>,Dq                                   |-|012346|-|-UUUU|-**00|D M+-WXZPI|1100_qqq_010_mmm_rrr
  2984:           case 0b1100_000_010:
  2985:           case 0b1100_001_010:
  2986:           case 0b1100_010_010:
  2987:           case 0b1100_011_010:
  2988:           case 0b1100_100_010:
  2989:           case 0b1100_101_010:
  2990:           case 0b1100_110_010:
  2991:           case 0b1100_111_010:
  2992:             irpAndToRegLong ();
  2993:             break irpSwitch;
  2994: 
  2995:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2996:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  2997:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  2998:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  2999:             //MULU.W <ea>,Dq                                  |-|012346|-|-UUUU|-***0|D M+-WXZPI|1100_qqq_011_mmm_rrr
  3000:           case 0b1100_000_011:
  3001:           case 0b1100_001_011:
  3002:           case 0b1100_010_011:
  3003:           case 0b1100_011_011:
  3004:           case 0b1100_100_011:
  3005:           case 0b1100_101_011:
  3006:           case 0b1100_110_011:
  3007:           case 0b1100_111_011:
  3008:             irpMuluWord ();
  3009:             break irpSwitch;
  3010: 
  3011:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3012:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  3013:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  3014:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3015:             //ABCD.B Dr,Dq                                    |-|012346|-|UUUUU|*U*U*|          |1100_qqq_100_000_rrr
  3016:             //ABCD.B -(Ar),-(Aq)                              |-|012346|-|UUUUU|*U*U*|          |1100_qqq_100_001_rrr
  3017:             //AND.B Dq,<ea>                                   |-|012346|-|-UUUU|-**00|  M+-WXZ  |1100_qqq_100_mmm_rrr
  3018:           case 0b1100_000_100:
  3019:           case 0b1100_001_100:
  3020:           case 0b1100_010_100:
  3021:           case 0b1100_011_100:
  3022:           case 0b1100_100_100:
  3023:           case 0b1100_101_100:
  3024:           case 0b1100_110_100:
  3025:           case 0b1100_111_100:
  3026:             irpAndToMemByte ();
  3027:             break irpSwitch;
  3028: 
  3029:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3030:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  3031:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  3032:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3033:             //EXG.L Dq,Dr                                     |-|012346|-|-----|-----|          |1100_qqq_101_000_rrr
  3034:             //EXG.L Aq,Ar                                     |-|012346|-|-----|-----|          |1100_qqq_101_001_rrr
  3035:             //AND.W Dq,<ea>                                   |-|012346|-|-UUUU|-**00|  M+-WXZ  |1100_qqq_101_mmm_rrr
  3036:           case 0b1100_000_101:
  3037:           case 0b1100_001_101:
  3038:           case 0b1100_010_101:
  3039:           case 0b1100_011_101:
  3040:           case 0b1100_100_101:
  3041:           case 0b1100_101_101:
  3042:           case 0b1100_110_101:
  3043:           case 0b1100_111_101:
  3044:             irpAndToMemWord ();
  3045:             break irpSwitch;
  3046: 
  3047:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3048:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  3049:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  3050:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3051:             //EXG.L Dq,Ar                                     |-|012346|-|-----|-----|          |1100_qqq_110_001_rrr
  3052:             //AND.L Dq,<ea>                                   |-|012346|-|-UUUU|-**00|  M+-WXZ  |1100_qqq_110_mmm_rrr
  3053:           case 0b1100_000_110:
  3054:           case 0b1100_001_110:
  3055:           case 0b1100_010_110:
  3056:           case 0b1100_011_110:
  3057:           case 0b1100_100_110:
  3058:           case 0b1100_101_110:
  3059:           case 0b1100_110_110:
  3060:           case 0b1100_111_110:
  3061:             irpAndToMemLong ();
  3062:             break irpSwitch;
  3063: 
  3064:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3065:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  3066:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  3067:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3068:             //MULS.W <ea>,Dq                                  |-|012346|-|-UUUU|-***0|D M+-WXZPI|1100_qqq_111_mmm_rrr
  3069:           case 0b1100_000_111:
  3070:           case 0b1100_001_111:
  3071:           case 0b1100_010_111:
  3072:           case 0b1100_011_111:
  3073:           case 0b1100_100_111:
  3074:           case 0b1100_101_111:
  3075:           case 0b1100_110_111:
  3076:           case 0b1100_111_111:
  3077:             irpMulsWord ();
  3078:             break irpSwitch;
  3079: 
  3080:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3081:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  3082:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  3083:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3084:             //ADD.B <ea>,Dq                                   |-|012346|-|UUUUU|*****|D M+-WXZPI|1101_qqq_000_mmm_rrr
  3085:           case 0b1101_000_000:
  3086:           case 0b1101_001_000:
  3087:           case 0b1101_010_000:
  3088:           case 0b1101_011_000:
  3089:           case 0b1101_100_000:
  3090:           case 0b1101_101_000:
  3091:           case 0b1101_110_000:
  3092:           case 0b1101_111_000:
  3093:             irpAddToRegByte ();
  3094:             break irpSwitch;
  3095: 
  3096:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3097:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  3098:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  3099:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3100:             //ADD.W <ea>,Dq                                   |-|012346|-|UUUUU|*****|DAM+-WXZPI|1101_qqq_001_mmm_rrr
  3101:           case 0b1101_000_001:
  3102:           case 0b1101_001_001:
  3103:           case 0b1101_010_001:
  3104:           case 0b1101_011_001:
  3105:           case 0b1101_100_001:
  3106:           case 0b1101_101_001:
  3107:           case 0b1101_110_001:
  3108:           case 0b1101_111_001:
  3109:             irpAddToRegWord ();
  3110:             break irpSwitch;
  3111: 
  3112:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3113:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  3114:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  3115:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3116:             //ADD.L <ea>,Dq                                   |-|012346|-|UUUUU|*****|DAM+-WXZPI|1101_qqq_010_mmm_rrr
  3117:           case 0b1101_000_010:
  3118:           case 0b1101_001_010:
  3119:           case 0b1101_010_010:
  3120:           case 0b1101_011_010:
  3121:           case 0b1101_100_010:
  3122:           case 0b1101_101_010:
  3123:           case 0b1101_110_010:
  3124:           case 0b1101_111_010:
  3125:             irpAddToRegLong ();
  3126:             break irpSwitch;
  3127: 
  3128:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3129:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  3130:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  3131:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3132:             //ADDA.W <ea>,Aq                                  |-|012346|-|-----|-----|DAM+-WXZPI|1101_qqq_011_mmm_rrr
  3133:             //ADD.W <ea>,Aq                                   |A|012346|-|-----|-----|DAM+-WXZPI|1101_qqq_011_mmm_rrr [ADDA.W <ea>,Aq]
  3134:           case 0b1101_000_011:
  3135:           case 0b1101_001_011:
  3136:           case 0b1101_010_011:
  3137:           case 0b1101_011_011:
  3138:           case 0b1101_100_011:
  3139:           case 0b1101_101_011:
  3140:           case 0b1101_110_011:
  3141:           case 0b1101_111_011:
  3142:             irpAddaWord ();
  3143:             break irpSwitch;
  3144: 
  3145:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3146:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  3147:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  3148:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3149:             //ADDX.B Dr,Dq                                    |-|012346|-|*UUUU|*****|          |1101_qqq_100_000_rrr
  3150:             //ADDX.B -(Ar),-(Aq)                              |-|012346|-|*UUUU|*****|          |1101_qqq_100_001_rrr
  3151:             //ADD.B Dq,<ea>                                   |-|012346|-|UUUUU|*****|  M+-WXZ  |1101_qqq_100_mmm_rrr
  3152:           case 0b1101_000_100:
  3153:           case 0b1101_001_100:
  3154:           case 0b1101_010_100:
  3155:           case 0b1101_011_100:
  3156:           case 0b1101_100_100:
  3157:           case 0b1101_101_100:
  3158:           case 0b1101_110_100:
  3159:           case 0b1101_111_100:
  3160:             irpAddToMemByte ();
  3161:             break irpSwitch;
  3162: 
  3163:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3164:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  3165:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  3166:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3167:             //ADDX.W Dr,Dq                                    |-|012346|-|*UUUU|*****|          |1101_qqq_101_000_rrr
  3168:             //ADDX.W -(Ar),-(Aq)                              |-|012346|-|*UUUU|*****|          |1101_qqq_101_001_rrr
  3169:             //ADD.W Dq,<ea>                                   |-|012346|-|UUUUU|*****|  M+-WXZ  |1101_qqq_101_mmm_rrr
  3170:           case 0b1101_000_101:
  3171:           case 0b1101_001_101:
  3172:           case 0b1101_010_101:
  3173:           case 0b1101_011_101:
  3174:           case 0b1101_100_101:
  3175:           case 0b1101_101_101:
  3176:           case 0b1101_110_101:
  3177:           case 0b1101_111_101:
  3178:             irpAddToMemWord ();
  3179:             break irpSwitch;
  3180: 
  3181:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3182:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  3183:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  3184:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3185:             //ADDX.L Dr,Dq                                    |-|012346|-|*UUUU|*****|          |1101_qqq_110_000_rrr
  3186:             //ADDX.L -(Ar),-(Aq)                              |-|012346|-|*UUUU|*****|          |1101_qqq_110_001_rrr
  3187:             //ADD.L Dq,<ea>                                   |-|012346|-|UUUUU|*****|  M+-WXZ  |1101_qqq_110_mmm_rrr
  3188:           case 0b1101_000_110:
  3189:           case 0b1101_001_110:
  3190:           case 0b1101_010_110:
  3191:           case 0b1101_011_110:
  3192:           case 0b1101_100_110:
  3193:           case 0b1101_101_110:
  3194:           case 0b1101_110_110:
  3195:           case 0b1101_111_110:
  3196:             irpAddToMemLong ();
  3197:             break irpSwitch;
  3198: 
  3199:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3200:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  3201:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  3202:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3203:             //ADDA.L <ea>,Aq                                  |-|012346|-|-----|-----|DAM+-WXZPI|1101_qqq_111_mmm_rrr
  3204:             //ADD.L <ea>,Aq                                   |A|012346|-|-----|-----|DAM+-WXZPI|1101_qqq_111_mmm_rrr [ADDA.L <ea>,Aq]
  3205:           case 0b1101_000_111:
  3206:           case 0b1101_001_111:
  3207:           case 0b1101_010_111:
  3208:           case 0b1101_011_111:
  3209:           case 0b1101_100_111:
  3210:           case 0b1101_101_111:
  3211:           case 0b1101_110_111:
  3212:           case 0b1101_111_111:
  3213:             irpAddaLong ();
  3214:             break irpSwitch;
  3215: 
  3216:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3217:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  3218:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  3219:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3220:             //ASR.B #<data>,Dr                                |-|012346|-|UUUUU|***0*|          |1110_qqq_000_000_rrr
  3221:             //LSR.B #<data>,Dr                                |-|012346|-|UUUUU|***0*|          |1110_qqq_000_001_rrr
  3222:             //ROXR.B #<data>,Dr                               |-|012346|-|*UUUU|***0*|          |1110_qqq_000_010_rrr
  3223:             //ROR.B #<data>,Dr                                |-|012346|-|-UUUU|-**0*|          |1110_qqq_000_011_rrr
  3224:             //ASR.B Dq,Dr                                     |-|012346|-|UUUUU|***0*|          |1110_qqq_000_100_rrr
  3225:             //LSR.B Dq,Dr                                     |-|012346|-|UUUUU|***0*|          |1110_qqq_000_101_rrr
  3226:             //ROXR.B Dq,Dr                                    |-|012346|-|*UUUU|***0*|          |1110_qqq_000_110_rrr
  3227:             //ROR.B Dq,Dr                                     |-|012346|-|-UUUU|-**0*|          |1110_qqq_000_111_rrr
  3228:             //ASR.B Dr                                        |A|012346|-|UUUUU|***0*|          |1110_001_000_000_rrr [ASR.B #1,Dr]
  3229:             //LSR.B Dr                                        |A|012346|-|UUUUU|***0*|          |1110_001_000_001_rrr [LSR.B #1,Dr]
  3230:             //ROXR.B Dr                                       |A|012346|-|*UUUU|***0*|          |1110_001_000_010_rrr [ROXR.B #1,Dr]
  3231:             //ROR.B Dr                                        |A|012346|-|-UUUU|-**0*|          |1110_001_000_011_rrr [ROR.B #1,Dr]
  3232:           case 0b1110_000_000:
  3233:           case 0b1110_001_000:
  3234:           case 0b1110_010_000:
  3235:           case 0b1110_011_000:
  3236:           case 0b1110_100_000:
  3237:           case 0b1110_101_000:
  3238:           case 0b1110_110_000:
  3239:           case 0b1110_111_000:
  3240:             irpXxrToRegByte ();
  3241:             break irpSwitch;
  3242: 
  3243:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3244:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  3245:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  3246:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3247:             //ASR.W #<data>,Dr                                |-|012346|-|UUUUU|***0*|          |1110_qqq_001_000_rrr
  3248:             //LSR.W #<data>,Dr                                |-|012346|-|UUUUU|***0*|          |1110_qqq_001_001_rrr
  3249:             //ROXR.W #<data>,Dr                               |-|012346|-|*UUUU|***0*|          |1110_qqq_001_010_rrr
  3250:             //ROR.W #<data>,Dr                                |-|012346|-|-UUUU|-**0*|          |1110_qqq_001_011_rrr
  3251:             //ASR.W Dq,Dr                                     |-|012346|-|UUUUU|***0*|          |1110_qqq_001_100_rrr
  3252:             //LSR.W Dq,Dr                                     |-|012346|-|UUUUU|***0*|          |1110_qqq_001_101_rrr
  3253:             //ROXR.W Dq,Dr                                    |-|012346|-|*UUUU|***0*|          |1110_qqq_001_110_rrr
  3254:             //ROR.W Dq,Dr                                     |-|012346|-|-UUUU|-**0*|          |1110_qqq_001_111_rrr
  3255:             //ASR.W Dr                                        |A|012346|-|UUUUU|***0*|          |1110_001_001_000_rrr [ASR.W #1,Dr]
  3256:             //LSR.W Dr                                        |A|012346|-|UUUUU|***0*|          |1110_001_001_001_rrr [LSR.W #1,Dr]
  3257:             //ROXR.W Dr                                       |A|012346|-|*UUUU|***0*|          |1110_001_001_010_rrr [ROXR.W #1,Dr]
  3258:             //ROR.W Dr                                        |A|012346|-|-UUUU|-**0*|          |1110_001_001_011_rrr [ROR.W #1,Dr]
  3259:           case 0b1110_000_001:
  3260:           case 0b1110_001_001:
  3261:           case 0b1110_010_001:
  3262:           case 0b1110_011_001:
  3263:           case 0b1110_100_001:
  3264:           case 0b1110_101_001:
  3265:           case 0b1110_110_001:
  3266:           case 0b1110_111_001:
  3267:             irpXxrToRegWord ();
  3268:             break irpSwitch;
  3269: 
  3270:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3271:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  3272:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  3273:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3274:             //ASR.L #<data>,Dr                                |-|012346|-|UUUUU|***0*|          |1110_qqq_010_000_rrr
  3275:             //LSR.L #<data>,Dr                                |-|012346|-|UUUUU|***0*|          |1110_qqq_010_001_rrr
  3276:             //ROXR.L #<data>,Dr                               |-|012346|-|*UUUU|***0*|          |1110_qqq_010_010_rrr
  3277:             //ROR.L #<data>,Dr                                |-|012346|-|-UUUU|-**0*|          |1110_qqq_010_011_rrr
  3278:             //ASR.L Dq,Dr                                     |-|012346|-|UUUUU|***0*|          |1110_qqq_010_100_rrr
  3279:             //LSR.L Dq,Dr                                     |-|012346|-|UUUUU|***0*|          |1110_qqq_010_101_rrr
  3280:             //ROXR.L Dq,Dr                                    |-|012346|-|*UUUU|***0*|          |1110_qqq_010_110_rrr
  3281:             //ROR.L Dq,Dr                                     |-|012346|-|-UUUU|-**0*|          |1110_qqq_010_111_rrr
  3282:             //ASR.L Dr                                        |A|012346|-|UUUUU|***0*|          |1110_001_010_000_rrr [ASR.L #1,Dr]
  3283:             //LSR.L Dr                                        |A|012346|-|UUUUU|***0*|          |1110_001_010_001_rrr [LSR.L #1,Dr]
  3284:             //ROXR.L Dr                                       |A|012346|-|*UUUU|***0*|          |1110_001_010_010_rrr [ROXR.L #1,Dr]
  3285:             //ROR.L Dr                                        |A|012346|-|-UUUU|-**0*|          |1110_001_010_011_rrr [ROR.L #1,Dr]
  3286:           case 0b1110_000_010:
  3287:           case 0b1110_001_010:
  3288:           case 0b1110_010_010:
  3289:           case 0b1110_011_010:
  3290:           case 0b1110_100_010:
  3291:           case 0b1110_101_010:
  3292:           case 0b1110_110_010:
  3293:           case 0b1110_111_010:
  3294:             irpXxrToRegLong ();
  3295:             break irpSwitch;
  3296: 
  3297:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3298:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  3299:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  3300:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3301:             //ASR.W <ea>                                      |-|012346|-|UUUUU|***0*|  M+-WXZ  |1110_000_011_mmm_rrr
  3302:           case 0b1110_000_011:
  3303:             irpAsrToMem ();
  3304:             break irpSwitch;
  3305: 
  3306:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3307:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  3308:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  3309:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3310:             //ASL.B #<data>,Dr                                |-|012346|-|UUUUU|*****|          |1110_qqq_100_000_rrr
  3311:             //LSL.B #<data>,Dr                                |-|012346|-|UUUUU|***0*|          |1110_qqq_100_001_rrr
  3312:             //ROXL.B #<data>,Dr                               |-|012346|-|*UUUU|***0*|          |1110_qqq_100_010_rrr
  3313:             //ROL.B #<data>,Dr                                |-|012346|-|-UUUU|-**0*|          |1110_qqq_100_011_rrr
  3314:             //ASL.B Dq,Dr                                     |-|012346|-|UUUUU|*****|          |1110_qqq_100_100_rrr
  3315:             //LSL.B Dq,Dr                                     |-|012346|-|UUUUU|***0*|          |1110_qqq_100_101_rrr
  3316:             //ROXL.B Dq,Dr                                    |-|012346|-|*UUUU|***0*|          |1110_qqq_100_110_rrr
  3317:             //ROL.B Dq,Dr                                     |-|012346|-|-UUUU|-**0*|          |1110_qqq_100_111_rrr
  3318:             //ASL.B Dr                                        |A|012346|-|UUUUU|*****|          |1110_001_100_000_rrr [ASL.B #1,Dr]
  3319:             //LSL.B Dr                                        |A|012346|-|UUUUU|***0*|          |1110_001_100_001_rrr [LSL.B #1,Dr]
  3320:             //ROXL.B Dr                                       |A|012346|-|*UUUU|***0*|          |1110_001_100_010_rrr [ROXL.B #1,Dr]
  3321:             //ROL.B Dr                                        |A|012346|-|-UUUU|-**0*|          |1110_001_100_011_rrr [ROL.B #1,Dr]
  3322:           case 0b1110_000_100:
  3323:           case 0b1110_001_100:
  3324:           case 0b1110_010_100:
  3325:           case 0b1110_011_100:
  3326:           case 0b1110_100_100:
  3327:           case 0b1110_101_100:
  3328:           case 0b1110_110_100:
  3329:           case 0b1110_111_100:
  3330:             irpXxlToRegByte ();
  3331:             break irpSwitch;
  3332: 
  3333:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3334:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  3335:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  3336:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3337:             //ASL.W #<data>,Dr                                |-|012346|-|UUUUU|*****|          |1110_qqq_101_000_rrr
  3338:             //LSL.W #<data>,Dr                                |-|012346|-|UUUUU|***0*|          |1110_qqq_101_001_rrr
  3339:             //ROXL.W #<data>,Dr                               |-|012346|-|*UUUU|***0*|          |1110_qqq_101_010_rrr
  3340:             //ROL.W #<data>,Dr                                |-|012346|-|-UUUU|-**0*|          |1110_qqq_101_011_rrr
  3341:             //ASL.W Dq,Dr                                     |-|012346|-|UUUUU|*****|          |1110_qqq_101_100_rrr
  3342:             //LSL.W Dq,Dr                                     |-|012346|-|UUUUU|***0*|          |1110_qqq_101_101_rrr
  3343:             //ROXL.W Dq,Dr                                    |-|012346|-|*UUUU|***0*|          |1110_qqq_101_110_rrr
  3344:             //ROL.W Dq,Dr                                     |-|012346|-|-UUUU|-**0*|          |1110_qqq_101_111_rrr
  3345:             //ASL.W Dr                                        |A|012346|-|UUUUU|*****|          |1110_001_101_000_rrr [ASL.W #1,Dr]
  3346:             //LSL.W Dr                                        |A|012346|-|UUUUU|***0*|          |1110_001_101_001_rrr [LSL.W #1,Dr]
  3347:             //ROXL.W Dr                                       |A|012346|-|*UUUU|***0*|          |1110_001_101_010_rrr [ROXL.W #1,Dr]
  3348:             //ROL.W Dr                                        |A|012346|-|-UUUU|-**0*|          |1110_001_101_011_rrr [ROL.W #1,Dr]
  3349:           case 0b1110_000_101:
  3350:           case 0b1110_001_101:
  3351:           case 0b1110_010_101:
  3352:           case 0b1110_011_101:
  3353:           case 0b1110_100_101:
  3354:           case 0b1110_101_101:
  3355:           case 0b1110_110_101:
  3356:           case 0b1110_111_101:
  3357:             irpXxlToRegWord ();
  3358:             break irpSwitch;
  3359: 
  3360:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3361:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  3362:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  3363:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3364:             //ASL.L #<data>,Dr                                |-|012346|-|UUUUU|*****|          |1110_qqq_110_000_rrr
  3365:             //LSL.L #<data>,Dr                                |-|012346|-|UUUUU|***0*|          |1110_qqq_110_001_rrr
  3366:             //ROXL.L #<data>,Dr                               |-|012346|-|*UUUU|***0*|          |1110_qqq_110_010_rrr
  3367:             //ROL.L #<data>,Dr                                |-|012346|-|-UUUU|-**0*|          |1110_qqq_110_011_rrr
  3368:             //ASL.L Dq,Dr                                     |-|012346|-|UUUUU|*****|          |1110_qqq_110_100_rrr
  3369:             //LSL.L Dq,Dr                                     |-|012346|-|UUUUU|***0*|          |1110_qqq_110_101_rrr
  3370:             //ROXL.L Dq,Dr                                    |-|012346|-|*UUUU|***0*|          |1110_qqq_110_110_rrr
  3371:             //ROL.L Dq,Dr                                     |-|012346|-|-UUUU|-**0*|          |1110_qqq_110_111_rrr
  3372:             //ASL.L Dr                                        |A|012346|-|UUUUU|*****|          |1110_001_110_000_rrr [ASL.L #1,Dr]
  3373:             //LSL.L Dr                                        |A|012346|-|UUUUU|***0*|          |1110_001_110_001_rrr [LSL.L #1,Dr]
  3374:             //ROXL.L Dr                                       |A|012346|-|*UUUU|***0*|          |1110_001_110_010_rrr [ROXL.L #1,Dr]
  3375:             //ROL.L Dr                                        |A|012346|-|-UUUU|-**0*|          |1110_001_110_011_rrr [ROL.L #1,Dr]
  3376:           case 0b1110_000_110:
  3377:           case 0b1110_001_110:
  3378:           case 0b1110_010_110:
  3379:           case 0b1110_011_110:
  3380:           case 0b1110_100_110:
  3381:           case 0b1110_101_110:
  3382:           case 0b1110_110_110:
  3383:           case 0b1110_111_110:
  3384:             irpXxlToRegLong ();
  3385:             break irpSwitch;
  3386: 
  3387:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3388:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  3389:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  3390:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3391:             //ASL.W <ea>                                      |-|012346|-|UUUUU|*****|  M+-WXZ  |1110_000_111_mmm_rrr
  3392:           case 0b1110_000_111:
  3393:             irpAslToMem ();
  3394:             break irpSwitch;
  3395: 
  3396:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3397:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  3398:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  3399:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3400:             //LSR.W <ea>                                      |-|012346|-|UUUUU|*0*0*|  M+-WXZ  |1110_001_011_mmm_rrr
  3401:           case 0b1110_001_011:
  3402:             irpLsrToMem ();
  3403:             break irpSwitch;
  3404: 
  3405:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3406:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  3407:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  3408:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3409:             //LSL.W <ea>                                      |-|012346|-|UUUUU|***0*|  M+-WXZ  |1110_001_111_mmm_rrr
  3410:           case 0b1110_001_111:
  3411:             irpLslToMem ();
  3412:             break irpSwitch;
  3413: 
  3414:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3415:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  3416:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  3417:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3418:             //ROXR.W <ea>                                     |-|012346|-|*UUUU|***0*|  M+-WXZ  |1110_010_011_mmm_rrr
  3419:           case 0b1110_010_011:
  3420:             irpRoxrToMem ();
  3421:             break irpSwitch;
  3422: 
  3423:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3424:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  3425:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  3426:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3427:             //ROXL.W <ea>                                     |-|012346|-|*UUUU|***0*|  M+-WXZ  |1110_010_111_mmm_rrr
  3428:           case 0b1110_010_111:
  3429:             irpRoxlToMem ();
  3430:             break irpSwitch;
  3431: 
  3432:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3433:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  3434:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  3435:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3436:             //ROR.W <ea>                                      |-|012346|-|-UUUU|-**0*|  M+-WXZ  |1110_011_011_mmm_rrr
  3437:           case 0b1110_011_011:
  3438:             irpRorToMem ();
  3439:             break irpSwitch;
  3440: 
  3441:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3442:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  3443:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  3444:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3445:             //ROL.W <ea>                                      |-|012346|-|-UUUU|-**0*|  M+-WXZ  |1110_011_111_mmm_rrr
  3446:           case 0b1110_011_111:
  3447:             irpRolToMem ();
  3448:             break irpSwitch;
  3449: 
  3450:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3451:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  3452:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  3453:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3454:             //FPACK <data>                                    |A|012346|-|UUUUU|*****|          |1111_111_0dd_ddd_ddd [FLINE #<data>]
  3455:           case 0b1111_111_000:
  3456:           case 0b1111_111_001:
  3457:           case 0b1111_111_010:
  3458:           case 0b1111_111_011:
  3459:             irpFpack ();
  3460:             break irpSwitch;
  3461: 
  3462:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3463:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  3464:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  3465:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3466:             //DOS <data>                                      |A|012346|-|UUUUU|UUUUU|          |1111_111_1dd_ddd_ddd [FLINE #<data>]
  3467:           case 0b1111_111_100:
  3468:           case 0b1111_111_101:
  3469:           case 0b1111_111_110:
  3470:           case 0b1111_111_111:
  3471:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3472:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  3473:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  3474:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3475:             //FLINE #<data>                                   |-|012346|-|UUUUU|UUUUU|          |1111_ddd_ddd_ddd_ddd (line 1111 emulator)
  3476:           case 0b1111_000_000:
  3477:           case 0b1111_000_001:
  3478:           case 0b1111_000_010:
  3479:           case 0b1111_000_011:
  3480:           case 0b1111_000_100:
  3481:           case 0b1111_000_101:
  3482:           case 0b1111_000_110:
  3483:           case 0b1111_000_111:
  3484:           case 0b1111_001_000:
  3485:           case 0b1111_001_001:
  3486:           case 0b1111_001_010:
  3487:           case 0b1111_001_011:
  3488:           case 0b1111_001_100:
  3489:           case 0b1111_001_101:
  3490:           case 0b1111_001_110:
  3491:           case 0b1111_001_111:
  3492:           case 0b1111_010_000:
  3493:           case 0b1111_010_001:
  3494:           case 0b1111_010_010:
  3495:           case 0b1111_010_011:
  3496:           case 0b1111_010_100:
  3497:           case 0b1111_010_101:
  3498:           case 0b1111_010_110:
  3499:           case 0b1111_010_111:
  3500:           case 0b1111_011_000:
  3501:           case 0b1111_011_001:
  3502:           case 0b1111_011_010:
  3503:           case 0b1111_011_011:
  3504:           case 0b1111_011_100:
  3505:           case 0b1111_011_101:
  3506:           case 0b1111_011_110:
  3507:           case 0b1111_011_111:
  3508:           case 0b1111_100_000:
  3509:           case 0b1111_100_001:
  3510:           case 0b1111_100_010:
  3511:           case 0b1111_100_011:
  3512:           case 0b1111_100_100:
  3513:           case 0b1111_100_101:
  3514:           case 0b1111_100_110:
  3515:           case 0b1111_100_111:
  3516:           case 0b1111_101_000:
  3517:           case 0b1111_101_001:
  3518:           case 0b1111_101_010:
  3519:           case 0b1111_101_011:
  3520:           case 0b1111_101_100:
  3521:           case 0b1111_101_101:
  3522:           case 0b1111_101_110:
  3523:           case 0b1111_101_111:
  3524:           case 0b1111_110_000:
  3525:           case 0b1111_110_001:
  3526:           case 0b1111_110_010:
  3527:           case 0b1111_110_011:
  3528:           case 0b1111_110_100:
  3529:           case 0b1111_110_101:
  3530:           case 0b1111_110_110:
  3531:           case 0b1111_110_111:
  3532:             irpFline ();
  3533:             break irpSwitch;
  3534: 
  3535:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3536:             //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  3537:             //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  3538:             //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  3539:             //HFSBOOT                                         |-|012346|-|-----|-----|          |0100_111_000_000_000
  3540:             //HFSINST                                         |-|012346|-|-----|-----|          |0100_111_000_000_001
  3541:             //HFSSTR                                          |-|012346|-|-----|-----|          |0100_111_000_000_010
  3542:             //HFSINT                                          |-|012346|-|-----|-----|          |0100_111_000_000_011
  3543:             //EMXNOP                                          |-|012346|-|-----|-----|          |0100_111_000_000_100
  3544:           case 0b0100_111_000:
  3545:             irpEmx ();
  3546:             break;
  3547: 
  3548:           default:
  3549:             irpIllegal ();
  3550: 
  3551:           }  //switch XEiJ.regOC >>> 6
  3552: 
  3553:           //トレース例外
  3554:           //  命令実行前にsrのTビットがセットされていたとき命令実行後にトレース例外が発生する
  3555:           //  トレース例外の発動は命令の機能拡張であり、他の例外処理で命令が中断されたときはトレース例外は発生しない
  3556:           //  命令例外はトレース例外の前に、割り込み例外はトレース例外の後に処理される
  3557:           //  未実装命令のエミュレーションルーチンはrteの直前にsrのTビットを復元することで未実装命令が1個の命令としてトレースされたように見せる
  3558:           //    ;DOSコールの終了
  3559:           //    ~008616:
  3560:           //            btst.b  #$07,(sp)
  3561:           //            bne.s   ~00861E
  3562:           //            rte
  3563:           //    ~00861E:
  3564:           //            ori.w   #$8000,sr
  3565:           //            rte
  3566:           if (XEiJ.mpuTraceFlag != 0) {  //命令実行前にsrのTビットがセットされていた
  3567:             XEiJ.mpuCycleCount += 34;
  3568:             irpException (M68kException.M6E_TRACE, XEiJ.regPC, XEiJ.regSRT1 | XEiJ.regSRS | XEiJ.regSRI | XEiJ.regCCR);  //pcは次の命令
  3569:           }
  3570:           //クロックをカウントアップする
  3571:           //  オペランドをアクセスした時点ではまだXEiJ.mpuClockTimeが更新されていないのでXEiJ.mpuClockTime<xxxClock
  3572:           //  xxxTickを呼び出すときはXEiJ.mpuClockTime>=xxxClock
  3573:           XEiJ.mpuClockTime += XEiJ.mpuModifiedUnit * XEiJ.mpuCycleCount;
  3574:           //デバイスを呼び出す
  3575:           TickerQueue.tkqRun (XEiJ.mpuClockTime);
  3576:           //割り込みを受け付ける
  3577:           if ((t = XEiJ.mpuIMR & XEiJ.mpuIRR) != 0) {  //マスクされているレベルよりも高くて受け付けていない割り込みがあるとき
  3578:             if (XEiJ.MPU_INTERRUPT_SWITCH) {
  3579:               switch (t) {
  3580:               case 0b00000001:
  3581:               case 0b00000011:
  3582:               case 0b00000101:
  3583:               case 0b00000111:
  3584:               case 0b00001001:
  3585:               case 0b00001011:
  3586:               case 0b00001101:
  3587:               case 0b00001111:
  3588:               case 0b00010001:
  3589:               case 0b00010011:
  3590:               case 0b00010101:
  3591:               case 0b00010111:
  3592:               case 0b00011001:
  3593:               case 0b00011011:
  3594:               case 0b00011101:
  3595:               case 0b00011111:
  3596:               case 0b00100001:
  3597:               case 0b00100011:
  3598:               case 0b00100101:
  3599:               case 0b00100111:
  3600:               case 0b00101001:
  3601:               case 0b00101011:
  3602:               case 0b00101101:
  3603:               case 0b00101111:
  3604:               case 0b00110001:
  3605:               case 0b00110011:
  3606:               case 0b00110101:
  3607:               case 0b00110111:
  3608:               case 0b00111001:
  3609:               case 0b00111011:
  3610:               case 0b00111101:
  3611:               case 0b00111111:
  3612:               case 0b01000001:
  3613:               case 0b01000011:
  3614:               case 0b01000101:
  3615:               case 0b01000111:
  3616:               case 0b01001001:
  3617:               case 0b01001011:
  3618:               case 0b01001101:
  3619:               case 0b01001111:
  3620:               case 0b01010001:
  3621:               case 0b01010011:
  3622:               case 0b01010101:
  3623:               case 0b01010111:
  3624:               case 0b01011001:
  3625:               case 0b01011011:
  3626:               case 0b01011101:
  3627:               case 0b01011111:
  3628:               case 0b01100001:
  3629:               case 0b01100011:
  3630:               case 0b01100101:
  3631:               case 0b01100111:
  3632:               case 0b01101001:
  3633:               case 0b01101011:
  3634:               case 0b01101101:
  3635:               case 0b01101111:
  3636:               case 0b01110001:
  3637:               case 0b01110011:
  3638:               case 0b01110101:
  3639:               case 0b01110111:
  3640:               case 0b01111001:
  3641:               case 0b01111011:
  3642:               case 0b01111101:
  3643:               case 0b01111111:
  3644:               case 0b10000001:
  3645:               case 0b10000011:
  3646:               case 0b10000101:
  3647:               case 0b10000111:
  3648:               case 0b10001001:
  3649:               case 0b10001011:
  3650:               case 0b10001101:
  3651:               case 0b10001111:
  3652:               case 0b10010001:
  3653:               case 0b10010011:
  3654:               case 0b10010101:
  3655:               case 0b10010111:
  3656:               case 0b10011001:
  3657:               case 0b10011011:
  3658:               case 0b10011101:
  3659:               case 0b10011111:
  3660:               case 0b10100001:
  3661:               case 0b10100011:
  3662:               case 0b10100101:
  3663:               case 0b10100111:
  3664:               case 0b10101001:
  3665:               case 0b10101011:
  3666:               case 0b10101101:
  3667:               case 0b10101111:
  3668:               case 0b10110001:
  3669:               case 0b10110011:
  3670:               case 0b10110101:
  3671:               case 0b10110111:
  3672:               case 0b10111001:
  3673:               case 0b10111011:
  3674:               case 0b10111101:
  3675:               case 0b10111111:
  3676:               case 0b11000001:
  3677:               case 0b11000011:
  3678:               case 0b11000101:
  3679:               case 0b11000111:
  3680:               case 0b11001001:
  3681:               case 0b11001011:
  3682:               case 0b11001101:
  3683:               case 0b11001111:
  3684:               case 0b11010001:
  3685:               case 0b11010011:
  3686:               case 0b11010101:
  3687:               case 0b11010111:
  3688:               case 0b11011001:
  3689:               case 0b11011011:
  3690:               case 0b11011101:
  3691:               case 0b11011111:
  3692:               case 0b11100001:
  3693:               case 0b11100011:
  3694:               case 0b11100101:
  3695:               case 0b11100111:
  3696:               case 0b11101001:
  3697:               case 0b11101011:
  3698:               case 0b11101101:
  3699:               case 0b11101111:
  3700:               case 0b11110001:
  3701:               case 0b11110011:
  3702:               case 0b11110101:
  3703:               case 0b11110111:
  3704:               case 0b11111001:
  3705:               case 0b11111011:
  3706:               case 0b11111101:
  3707:               case 0b11111111:
  3708:                 //レベル7
  3709:                 XEiJ.mpuIRR &= ~XEiJ.MPU_SYS_INTERRUPT_MASK;  //割り込みを受け付ける
  3710:                 if ((t = XEiJ.sysAcknowledge ()) != 0) {  //デバイスにベクタ番号を要求して割り込み処理中の状態になったとき
  3711:                   irpInterrupt (t, XEiJ.MPU_SYS_INTERRUPT_LEVEL);  //割り込み処理を開始する
  3712:                 }
  3713:                 break;
  3714:               case 0b00000010:
  3715:               case 0b00000110:
  3716:               case 0b00001010:
  3717:               case 0b00001110:
  3718:               case 0b00010010:
  3719:               case 0b00010110:
  3720:               case 0b00011010:
  3721:               case 0b00011110:
  3722:               case 0b00100010:
  3723:               case 0b00100110:
  3724:               case 0b00101010:
  3725:               case 0b00101110:
  3726:               case 0b00110010:
  3727:               case 0b00110110:
  3728:               case 0b00111010:
  3729:               case 0b00111110:
  3730:               case 0b01000010:
  3731:               case 0b01000110:
  3732:               case 0b01001010:
  3733:               case 0b01001110:
  3734:               case 0b01010010:
  3735:               case 0b01010110:
  3736:               case 0b01011010:
  3737:               case 0b01011110:
  3738:               case 0b01100010:
  3739:               case 0b01100110:
  3740:               case 0b01101010:
  3741:               case 0b01101110:
  3742:               case 0b01110010:
  3743:               case 0b01110110:
  3744:               case 0b01111010:
  3745:               case 0b01111110:
  3746:               case 0b10000010:
  3747:               case 0b10000110:
  3748:               case 0b10001010:
  3749:               case 0b10001110:
  3750:               case 0b10010010:
  3751:               case 0b10010110:
  3752:               case 0b10011010:
  3753:               case 0b10011110:
  3754:               case 0b10100010:
  3755:               case 0b10100110:
  3756:               case 0b10101010:
  3757:               case 0b10101110:
  3758:               case 0b10110010:
  3759:               case 0b10110110:
  3760:               case 0b10111010:
  3761:               case 0b10111110:
  3762:               case 0b11000010:
  3763:               case 0b11000110:
  3764:               case 0b11001010:
  3765:               case 0b11001110:
  3766:               case 0b11010010:
  3767:               case 0b11010110:
  3768:               case 0b11011010:
  3769:               case 0b11011110:
  3770:               case 0b11100010:
  3771:               case 0b11100110:
  3772:               case 0b11101010:
  3773:               case 0b11101110:
  3774:               case 0b11110010:
  3775:               case 0b11110110:
  3776:               case 0b11111010:
  3777:               case 0b11111110:
  3778:                 //レベル6
  3779:                 XEiJ.mpuIRR &= ~XEiJ.MPU_MFP_INTERRUPT_MASK;  //割り込みを受け付ける
  3780:                 if ((t = MC68901.mfpAcknowledge ()) != 0) {  //デバイスにベクタ番号を要求して割り込み処理中の状態になったとき
  3781:                   irpInterrupt (t, XEiJ.MPU_MFP_INTERRUPT_LEVEL);  //割り込み処理を開始する
  3782:                 }
  3783:                 break;
  3784:               case 0b00000100:
  3785:               case 0b00001100:
  3786:               case 0b00010100:
  3787:               case 0b00011100:
  3788:               case 0b00100100:
  3789:               case 0b00101100:
  3790:               case 0b00110100:
  3791:               case 0b00111100:
  3792:               case 0b01000100:
  3793:               case 0b01001100:
  3794:               case 0b01010100:
  3795:               case 0b01011100:
  3796:               case 0b01100100:
  3797:               case 0b01101100:
  3798:               case 0b01110100:
  3799:               case 0b01111100:
  3800:               case 0b10000100:
  3801:               case 0b10001100:
  3802:               case 0b10010100:
  3803:               case 0b10011100:
  3804:               case 0b10100100:
  3805:               case 0b10101100:
  3806:               case 0b10110100:
  3807:               case 0b10111100:
  3808:               case 0b11000100:
  3809:               case 0b11001100:
  3810:               case 0b11010100:
  3811:               case 0b11011100:
  3812:               case 0b11100100:
  3813:               case 0b11101100:
  3814:               case 0b11110100:
  3815:               case 0b11111100:
  3816:                 //レベル5
  3817:                 XEiJ.mpuIRR &= ~XEiJ.MPU_SCC_INTERRUPT_MASK;  //割り込みを受け付ける
  3818:                 if ((t = Z8530.sccAcknowledge ()) != 0) {  //デバイスにベクタ番号を要求して割り込み処理中の状態になったとき
  3819:                   irpInterrupt (t, XEiJ.MPU_SCC_INTERRUPT_LEVEL);  //割り込み処理を開始する
  3820:                 }
  3821:                 break;
  3822:               case 0b00010000:
  3823:               case 0b00110000:
  3824:               case 0b01010000:
  3825:               case 0b01110000:
  3826:               case 0b10010000:
  3827:               case 0b10110000:
  3828:               case 0b11010000:
  3829:               case 0b11110000:
  3830:                 //レベル3
  3831:                 XEiJ.mpuIRR &= ~XEiJ.MPU_DMA_INTERRUPT_MASK;  //割り込みを受け付ける
  3832:                 if ((t = HD63450.dmaAcknowledge ()) != 0) {  //デバイスにベクタ番号を要求して割り込み処理中の状態になったとき
  3833:                   irpInterrupt (t, XEiJ.MPU_DMA_INTERRUPT_LEVEL);  //割り込み処理を開始する
  3834:                 }
  3835:                 break;
  3836:               case 0b00100000:
  3837:               case 0b01100000:
  3838:               case 0b10100000:
  3839:               case 0b11100000:
  3840:                 //レベル2
  3841:                 XEiJ.mpuIRR &= ~XEiJ.MPU_EB2_INTERRUPT_MASK;  //割り込みを受け付ける
  3842:                 if ((t = XEiJ.eb2Acknowledge ()) != 0) {  //デバイスにベクタ番号を要求して割り込み処理中の状態になったとき
  3843:                   irpInterrupt (t, XEiJ.MPU_EB2_INTERRUPT_LEVEL);  //割り込み処理を開始する
  3844:                 }
  3845:                 break;
  3846:               case 0b01000000:
  3847:               case 0b11000000:
  3848:                 //レベル1
  3849:                 XEiJ.mpuIRR &= ~XEiJ.MPU_IOI_INTERRUPT_MASK;  //割り込みを受け付ける
  3850:                 if ((t = IOInterrupt.ioiAcknowledge ()) != 0) {  //デバイスにベクタ番号を要求して割り込み処理中の状態になったとき
  3851:                   irpInterrupt (t, XEiJ.MPU_IOI_INTERRUPT_LEVEL);  //割り込み処理を開始する
  3852:                 }
  3853:                 break;
  3854:               }
  3855:             } else {
  3856:               t &= -t;
  3857:               //  x&=-xはxの最下位の1のビットだけを残す演算
  3858:               //  すなわちマスクされているレベルよりも高くて受け付けていない割り込みの中で最高レベルの割り込みのビットだけが残る
  3859:               //  最高レベルの割り込みのビットしか残っていないので、割り込みの有無をレベルの高い順ではなく使用頻度の高い順に調べられる
  3860:               //  MFPやDMAの割り込みがかかる度にそれより優先度の高いインタラプトスイッチが押されていないかどうかを確かめる必要がない
  3861:               if (t == XEiJ.MPU_MFP_INTERRUPT_MASK) {
  3862:                 XEiJ.mpuIRR &= ~XEiJ.MPU_MFP_INTERRUPT_MASK;  //割り込みを受け付ける
  3863:                 if ((t = MC68901.mfpAcknowledge ()) != 0) {  //デバイスにベクタ番号を要求して割り込み処理中の状態になったとき
  3864:                   irpInterrupt (t, XEiJ.MPU_MFP_INTERRUPT_LEVEL);  //割り込み処理を開始する
  3865:                 }
  3866:               } else if (t == XEiJ.MPU_DMA_INTERRUPT_MASK) {
  3867:                 XEiJ.mpuIRR &= ~XEiJ.MPU_DMA_INTERRUPT_MASK;  //割り込みを受け付ける
  3868:                 if ((t = HD63450.dmaAcknowledge ()) != 0) {  //デバイスにベクタ番号を要求して割り込み処理中の状態になったとき
  3869:                   irpInterrupt (t, XEiJ.MPU_DMA_INTERRUPT_LEVEL);  //割り込み処理を開始する
  3870:                 }
  3871:               } else if (t == XEiJ.MPU_SCC_INTERRUPT_MASK) {
  3872:                 XEiJ.mpuIRR &= ~XEiJ.MPU_SCC_INTERRUPT_MASK;  //割り込みを受け付ける
  3873:                 if ((t = Z8530.sccAcknowledge ()) != 0) {  //デバイスにベクタ番号を要求して割り込み処理中の状態になったとき
  3874:                   irpInterrupt (t, XEiJ.MPU_SCC_INTERRUPT_LEVEL);  //割り込み処理を開始する
  3875:                 }
  3876:               } else if (t == XEiJ.MPU_IOI_INTERRUPT_MASK) {
  3877:                 XEiJ.mpuIRR &= ~XEiJ.MPU_IOI_INTERRUPT_MASK;  //割り込みを受け付ける
  3878:                 if ((t = IOInterrupt.ioiAcknowledge ()) != 0) {  //デバイスにベクタ番号を要求して割り込み処理中の状態になったとき
  3879:                   irpInterrupt (t, XEiJ.MPU_IOI_INTERRUPT_LEVEL);  //割り込み処理を開始する
  3880:                 }
  3881:               } else if (t == XEiJ.MPU_EB2_INTERRUPT_MASK) {
  3882:                 XEiJ.mpuIRR &= ~XEiJ.MPU_EB2_INTERRUPT_MASK;  //割り込みを受け付ける
  3883:                 if ((t = XEiJ.eb2Acknowledge ()) != 0) {  //デバイスにベクタ番号を要求して割り込み処理中の状態になったとき
  3884:                   irpInterrupt (t, XEiJ.MPU_EB2_INTERRUPT_LEVEL);  //割り込み処理を開始する
  3885:                 }
  3886:               } else if (t == XEiJ.MPU_SYS_INTERRUPT_MASK) {
  3887:                 XEiJ.mpuIRR &= ~XEiJ.MPU_SYS_INTERRUPT_MASK;  //割り込みを受け付ける
  3888:                 if ((t = XEiJ.sysAcknowledge ()) != 0) {  //デバイスにベクタ番号を要求して割り込み処理中の状態になったとき
  3889:                   irpInterrupt (t, XEiJ.MPU_SYS_INTERRUPT_LEVEL);  //割り込み処理を開始する
  3890:                 }
  3891:               }
  3892:             }
  3893:           }  //if t!=0
  3894:           if (MC68901.MFP_DELAYED_INTERRUPT) {
  3895:             XEiJ.mpuIRR |= XEiJ.mpuDIRR;  //遅延割り込み要求
  3896:             XEiJ.mpuDIRR = 0;
  3897:           }
  3898:         }  //命令ループ
  3899:       } catch (M68kException e) {
  3900:         if (M68kException.m6eNumber == M68kException.M6E_WAIT_EXCEPTION) {  //待機例外
  3901:           if (irpWaitException ()) {
  3902:             continue;
  3903:           } else {
  3904:             break errorLoop;
  3905:           }
  3906:         }
  3907:         if (M68kException.m6eNumber == M68kException.M6E_INSTRUCTION_BREAK_POINT) {  //命令ブレークポイントによる停止
  3908:           XEiJ.regPC = XEiJ.regPC0;
  3909:           XEiJ.mpuStop1 (null);  //"Instruction Break Point"
  3910:           break errorLoop;
  3911:         }
  3912:         XEiJ.mpuClockTime += XEiJ.mpuModifiedUnit * XEiJ.mpuCycleCount;
  3913:         //例外処理
  3914:         //  ここで処理するのはベクタ番号が2~31の例外に限る。TRAP #n命令はインライン展開する
  3915:         //  使用頻度が高いと思われる例外はインライン展開するのでここには来ない
  3916:         //    例外処理をインライン展開する場合はMC68000とMC68030のコードを分けなければならずコードが冗長になる
  3917:         //    使用頻度が低いと思われる例外はインライン展開しない
  3918:         //  セーブされるpcは以下の例外は命令の先頭、これ以外は次の命令
  3919:         //     2  BUS_ERROR
  3920:         //     3  ADDRESS_ERROR
  3921:         //     4  ILLEGAL_INSTRUCTION
  3922:         //     8  PRIVILEGE_VIOLATION
  3923:         //    10  LINE_1010_EMULATOR
  3924:         //    11  LINE_1111_EMULATOR
  3925:         //                                      fedcba9876543210fedcba9876543210
  3926:         //if ((1 << M68kException.m6eNumber & 0b00000000000000000000110100011100) != 0) {
  3927:         //    0123456789abcdef0123456789abcdef
  3928:         if (0b00111000101100000000000000000000 << M68kException.m6eNumber < 0) {
  3929:           XEiJ.regPC = XEiJ.regPC0;  //セーブされるpcは命令の先頭
  3930:         }
  3931:         try {
  3932:           int save_sr = XEiJ.regSRT1 | XEiJ.regSRS | XEiJ.regSRI | XEiJ.regCCR;
  3933:           int sp = XEiJ.regRn[15];
  3934:           XEiJ.regSRT1 = 0;  //srのTビットを消す
  3935:           if (XEiJ.regSRS == 0) {  //ユーザモードのとき
  3936:             XEiJ.regSRS = XEiJ.REG_SR_S;  //スーパーバイザモードへ移行する
  3937:             XEiJ.mpuUSP = sp;  //USPを保存
  3938:             sp = XEiJ.mpuISP;  //SSPを復元
  3939:             if (DataBreakPoint.DBP_ON) {
  3940:               DataBreakPoint.dbpMemoryMap = DataBreakPoint.dbpSuperMap;  //スーパーバイザメモリマップに切り替える
  3941:             } else {
  3942:               XEiJ.busMemoryMap = XEiJ.busSuperMap;  //スーパーバイザメモリマップに切り替える
  3943:             }
  3944:             if (InstructionBreakPoint.IBP_ON) {
  3945:               InstructionBreakPoint.ibpOp1MemoryMap = InstructionBreakPoint.ibpOp1SuperMap;
  3946:             }
  3947:           }
  3948:           if (M68kException.m6eNumber <= M68kException.M6E_ADDRESS_ERROR) {  //バスエラーまたはアドレスエラー
  3949:             //ホストファイルシステムのデバイスコマンドを強制終了させる
  3950:             HFS.hfsState = HFS.HFS_STATE_IDLE;
  3951:             XEiJ.mpuClockTime += 50 * XEiJ.mpuModifiedUnit;
  3952:             XEiJ.regRn[15] = sp -= 14;
  3953:             XEiJ.busWl (sp + 10, XEiJ.regPC);  //pushl。pcをプッシュする
  3954:             XEiJ.busWw (sp + 8, save_sr);  //pushw。srをプッシュする
  3955:             XEiJ.busWw (sp + 6, XEiJ.regOC);  //instruction register。バスエラーまたはアドレスエラーを発生させた命令の命令コード。アドレスを特定するときに使う
  3956:             XEiJ.busWl (sp + 2, M68kException.m6eAddress);  //access address
  3957:             XEiJ.busWw (sp, M68kException.m6eDirection << 4);  //r/w,i/n,fc。r/wのみ
  3958:           } else {
  3959:             XEiJ.regRn[15] = sp -= 6;
  3960:             XEiJ.busWl (sp + 2, XEiJ.regPC);  //pushl。pcをプッシュする
  3961:             XEiJ.busWw (sp, save_sr);  //pushw。srをプッシュする
  3962:           }
  3963:           irpSetPC (XEiJ.busRlsf (M68kException.m6eNumber << 2));  //例外ベクタを取り出してジャンプする
  3964:           if (XEiJ.dbgStopOnError) {  //エラーで停止する場合
  3965:             if (XEiJ.dbgDoStopOnError ()) {
  3966:               break errorLoop;
  3967:             }
  3968:           }
  3969:         } catch (M68kException ee) {  //ダブルバスフォルト
  3970:           XEiJ.dbgDoubleBusFault ();
  3971:           break errorLoop;
  3972:         }
  3973:       }  //catch M68kException
  3974:     }  //例外ループ
  3975: 
  3976:     //  通常
  3977:     //    pc0  最後に実行した命令
  3978:     //    pc  次に実行する命令
  3979:     //  バスエラー、アドレスエラー、不当命令、特権違反で停止したとき
  3980:     //    pc0  エラーを発生させた命令
  3981:     //    pc  例外処理ルーチンの先頭
  3982:     //  ダブルバスフォルトで停止したとき
  3983:     //    pc0  エラーを発生させた命令
  3984:     //    pc  エラーを発生させた命令
  3985:     //  命令ブレークポイントで停止したとき
  3986:     //    pc0  命令ブレークポイントが設定された、次に実行する命令
  3987:     //    pc  命令ブレークポイントが設定された、次に実行する命令
  3988:     //  データブレークポイントで停止したとき
  3989:     //    pc0  データを書き換えた、最後に実行した命令
  3990:     //    pc  次に実行する命令
  3991: 
  3992:     //分岐ログに停止レコードを記録する
  3993:     if (BranchLog.BLG_ON) {
  3994:       BranchLog.blgStop ();
  3995:     }
  3996: 
  3997:   }  //mpuCore()
  3998: 
  3999: 
  4000: 
  4001:   //cont = irpWaitException ()
  4002:   //  待機例外をキャッチしたとき
  4003:   public static boolean irpWaitException () {
  4004:     XEiJ.regPC = XEiJ.regPC0;  //PCを巻き戻す
  4005:     XEiJ.regRn[8 + (XEiJ.regOC & 7)] += WaitInstruction.REWIND_AR[XEiJ.regOC >> 3];  //(Ar)+|-(Ar)で変化したArを巻き戻す
  4006:     try {
  4007:       //トレース例外を処理する
  4008:       if (XEiJ.mpuTraceFlag != 0) {  //命令実行前にsrのTビットがセットされていた
  4009:         XEiJ.mpuCycleCount += 34;
  4010:         irpException (M68kException.M6E_TRACE, XEiJ.regPC, XEiJ.regSRT1 | XEiJ.regSRS | XEiJ.regSRI | XEiJ.regCCR);  //pcは次の命令
  4011:       }
  4012:       //デバイスを呼び出す
  4013:       TickerQueue.tkqRun (XEiJ.mpuClockTime);
  4014:       //割り込みを受け付ける
  4015:       int t;
  4016:       if ((t = XEiJ.mpuIMR & XEiJ.mpuIRR) != 0) {  //マスクされているレベルよりも高くて受け付けていない割り込みがあるとき
  4017:         t &= -t;
  4018:         //  x&=-xはxの最下位の1のビットだけを残す演算
  4019:         //  すなわちマスクされているレベルよりも高くて受け付けていない割り込みの中で最高レベルの割り込みのビットだけが残る
  4020:         //  最高レベルの割り込みのビットしか残っていないので、割り込みの有無をレベルの高い順ではなく使用頻度の高い順に調べられる
  4021:         //  MFPやDMAの割り込みがかかる度にそれより優先度の高いインタラプトスイッチが押されていないかどうかを確かめる必要がない
  4022:         if (t == XEiJ.MPU_MFP_INTERRUPT_MASK) {
  4023:           XEiJ.mpuIRR &= ~XEiJ.MPU_MFP_INTERRUPT_MASK;  //割り込みを受け付ける
  4024:           if ((t = MC68901.mfpAcknowledge ()) != 0) {  //デバイスにベクタ番号を要求して割り込み処理中の状態になったとき
  4025:             irpInterrupt (t, XEiJ.MPU_MFP_INTERRUPT_LEVEL);  //割り込み処理を開始する
  4026:           }
  4027:         } else if (t == XEiJ.MPU_DMA_INTERRUPT_MASK) {
  4028:           XEiJ.mpuIRR &= ~XEiJ.MPU_DMA_INTERRUPT_MASK;  //割り込みを受け付ける
  4029:           if ((t = HD63450.dmaAcknowledge ()) != 0) {  //デバイスにベクタ番号を要求して割り込み処理中の状態になったとき
  4030:             irpInterrupt (t, XEiJ.MPU_DMA_INTERRUPT_LEVEL);  //割り込み処理を開始する
  4031:           }
  4032:         } else if (t == XEiJ.MPU_SCC_INTERRUPT_MASK) {
  4033:           XEiJ.mpuIRR &= ~XEiJ.MPU_SCC_INTERRUPT_MASK;  //割り込みを受け付ける
  4034:           if ((t = Z8530.sccAcknowledge ()) != 0) {  //デバイスにベクタ番号を要求して割り込み処理中の状態になったとき
  4035:             irpInterrupt (t, XEiJ.MPU_SCC_INTERRUPT_LEVEL);  //割り込み処理を開始する
  4036:           }
  4037:         } else if (t == XEiJ.MPU_IOI_INTERRUPT_MASK) {
  4038:           XEiJ.mpuIRR &= ~XEiJ.MPU_IOI_INTERRUPT_MASK;  //割り込みを受け付ける
  4039:           if ((t = IOInterrupt.ioiAcknowledge ()) != 0) {  //デバイスにベクタ番号を要求して割り込み処理中の状態になったとき
  4040:             irpInterrupt (t, XEiJ.MPU_IOI_INTERRUPT_LEVEL);  //割り込み処理を開始する
  4041:           }
  4042:         } else if (t == XEiJ.MPU_EB2_INTERRUPT_MASK) {
  4043:           XEiJ.mpuIRR &= ~XEiJ.MPU_EB2_INTERRUPT_MASK;  //割り込みを受け付ける
  4044:           if ((t = XEiJ.eb2Acknowledge ()) != 0) {  //デバイスにベクタ番号を要求して割り込み処理中の状態になったとき
  4045:             irpInterrupt (t, XEiJ.MPU_EB2_INTERRUPT_LEVEL);  //割り込み処理を開始する
  4046:           }
  4047:         } else if (t == XEiJ.MPU_SYS_INTERRUPT_MASK) {
  4048:           XEiJ.mpuIRR &= ~XEiJ.MPU_SYS_INTERRUPT_MASK;  //割り込みを受け付ける
  4049:           if ((t = XEiJ.sysAcknowledge ()) != 0) {  //デバイスにベクタ番号を要求して割り込み処理中の状態になったとき
  4050:             irpInterrupt (t, XEiJ.MPU_SYS_INTERRUPT_LEVEL);  //割り込み処理を開始する
  4051:           }
  4052:         }
  4053:       }  //if t!=0
  4054:       if (MC68901.MFP_DELAYED_INTERRUPT) {
  4055:         XEiJ.mpuIRR |= XEiJ.mpuDIRR;  //遅延割り込み要求
  4056:         XEiJ.mpuDIRR = 0;
  4057:       }
  4058:     } catch (M68kException e) {
  4059:       //!!! 待機例外処理中のバスエラーの処理は省略
  4060:       XEiJ.dbgDoubleBusFault ();
  4061:       return false;
  4062:     }  //catch M68kException
  4063:     return true;
  4064:   }  //irpWaitException
  4065: 
  4066: 
  4067: 
  4068:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  4069:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  4070:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  4071:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  4072:   //ORI.B #<data>,<ea>                              |-|012346|-|-UUUU|-**00|D M+-WXZ  |0000_000_000_mmm_rrr-{data}
  4073:   //OR.B #<data>,<ea>                               |A|012346|-|-UUUU|-**00|  M+-WXZ  |0000_000_000_mmm_rrr-{data}  [ORI.B #<data>,<ea>]
  4074:   //ORI.B #<data>,CCR                               |-|012346|-|*****|*****|          |0000_000_000_111_100-{data}
  4075:   public static void irpOriByte () throws M68kException {
  4076:     int ea = XEiJ.regOC & 63;
  4077:     int z;
  4078:     if (XEiJ.MPU_COMPOUND_POSTINCREMENT) {
  4079:       z = XEiJ.busRbs ((XEiJ.regPC += 2) - 1);  //pcbs
  4080:     } else {
  4081:       z = XEiJ.regPC;
  4082:       XEiJ.regPC = z + 2;
  4083:       z = XEiJ.busRbs (z + 1);  //pcbs
  4084:     }
  4085:     if (ea < XEiJ.EA_AR) {  //ORI.B #<data>,Dr
  4086:       if (XEiJ.DBG_ORI_BYTE_ZERO_D0) {
  4087:         if (z == 0 && ea == 0 && XEiJ.dbgOriByteZeroD0) {  //ORI.B #$00,D0
  4088:           XEiJ.mpuCycleCount += 34;
  4089:           M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION;
  4090:           throw M68kException.m6eSignal;
  4091:         }
  4092:       }
  4093:       XEiJ.mpuCycleCount += 8;
  4094:       z = XEiJ.regRn[ea] |= 255 & z;  //0拡張してからOR
  4095:       XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & z];  //ccr_tst_byte
  4096:     } else if (ea == XEiJ.EA_IM) {  //ORI.B #<data>,CCR
  4097:       XEiJ.mpuCycleCount += 20;
  4098:       XEiJ.regCCR |= XEiJ.REG_CCR_MASK & z;
  4099:     } else {  //ORI.B #<data>,<mem>
  4100:       XEiJ.mpuCycleCount += 12;
  4101:       int a = efaMltByte (ea);
  4102:       XEiJ.busWb (a, z |= XEiJ.busRbs (a));
  4103:       XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & z];  //ccr_tst_byte
  4104:     }
  4105:   }  //irpOriByte
  4106: 
  4107:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  4108:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  4109:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  4110:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  4111:   //ORI.W #<data>,<ea>                              |-|012346|-|-UUUU|-**00|D M+-WXZ  |0000_000_001_mmm_rrr-{data}
  4112:   //OR.W #<data>,<ea>                               |A|012346|-|-UUUU|-**00|  M+-WXZ  |0000_000_001_mmm_rrr-{data}  [ORI.W #<data>,<ea>]
  4113:   //ORI.W #<data>,SR                                |-|012346|P|*****|*****|          |0000_000_001_111_100-{data}
  4114:   public static void irpOriWord () throws M68kException {
  4115:     int ea = XEiJ.regOC & 63;
  4116:     if (ea < XEiJ.EA_AR) {  //ORI.W #<data>,Dr
  4117:       int z;
  4118:       if (XEiJ.MPU_COMPOUND_POSTINCREMENT) {
  4119:         z = XEiJ.busRwse ((XEiJ.regPC += 2) - 2);  //pcws
  4120:       } else {
  4121:         z = XEiJ.regPC;
  4122:         XEiJ.regPC = z + 2;
  4123:         z = XEiJ.busRwse (z);  //pcws
  4124:       }
  4125:       XEiJ.mpuCycleCount += 8;
  4126:       z = XEiJ.regRn[ea] |= (char) z;  //0拡張してからOR
  4127:       XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (char) z - 1 >> 31 & XEiJ.REG_CCR_Z | ((short) z < 0 ? XEiJ.REG_CCR_N : 0);  //ccr_tst_word
  4128:     } else if (ea == XEiJ.EA_IM) {  //ORI.W #<data>,SR
  4129:       if (XEiJ.regSRS == 0) {  //ユーザモードのとき
  4130:         XEiJ.mpuCycleCount += 34;
  4131:         M68kException.m6eNumber = M68kException.M6E_PRIVILEGE_VIOLATION;
  4132:         throw M68kException.m6eSignal;
  4133:       }
  4134:       //以下はスーパーバイザモード
  4135:       XEiJ.mpuCycleCount += 20;
  4136:       if (XEiJ.MPU_COMPOUND_POSTINCREMENT) {
  4137:         irpSetSR (XEiJ.regSRT1 | XEiJ.regSRS | XEiJ.regSRI | XEiJ.regCCR | XEiJ.busRwse ((XEiJ.regPC += 2) - 2));  //pcws。特権違反チェックが先
  4138:       } else {
  4139:         int t = XEiJ.regPC;
  4140:         XEiJ.regPC = t + 2;
  4141:         irpSetSR (XEiJ.regSRT1 | XEiJ.regSRS | XEiJ.regSRI | XEiJ.regCCR | XEiJ.busRwse (t));  //pcws。特権違反チェックが先
  4142:       }
  4143:     } else {  //ORI.W #<data>,<mem>
  4144:       int z;
  4145:       if (XEiJ.MPU_COMPOUND_POSTINCREMENT) {
  4146:         z = XEiJ.busRwse ((XEiJ.regPC += 2) - 2);  //pcws
  4147:       } else {
  4148:         z = XEiJ.regPC;
  4149:         XEiJ.regPC = z + 2;
  4150:         z = XEiJ.busRwse (z);  //pcws
  4151:       }
  4152:       XEiJ.mpuCycleCount += 12;
  4153:       int a = efaMltWord (ea);
  4154:       XEiJ.busWw (a, z |= XEiJ.busRws (a));
  4155:       XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (char) z - 1 >> 31 & XEiJ.REG_CCR_Z | ((short) z < 0 ? XEiJ.REG_CCR_N : 0);  //ccr_tst_word
  4156:     }
  4157:   }  //irpOriWord
  4158: 
  4159:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  4160:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  4161:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  4162:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  4163:   //ORI.L #<data>,<ea>                              |-|012346|-|-UUUU|-**00|D M+-WXZ  |0000_000_010_mmm_rrr-{data}
  4164:   //OR.L #<data>,<ea>                               |A|012346|-|-UUUU|-**00|  M+-WXZ  |0000_000_010_mmm_rrr-{data}  [ORI.L #<data>,<ea>]
  4165:   public static void irpOriLong () throws M68kException {
  4166:     int ea = XEiJ.regOC & 63;
  4167:     int y;
  4168:     if (XEiJ.MPU_COMPOUND_POSTINCREMENT) {
  4169:       y = XEiJ.busRlse ((XEiJ.regPC += 4) - 4);  //pcls
  4170:     } else {
  4171:       y = XEiJ.regPC;
  4172:       XEiJ.regPC = y + 4;
  4173:       y = XEiJ.busRlse (y);  //pcls
  4174:     }
  4175:     int z;
  4176:     if (ea < XEiJ.EA_AR) {  //ORI.L #<data>,Dr
  4177:       XEiJ.mpuCycleCount += 16;
  4178:       z = XEiJ.regRn[ea] |= y;
  4179:     } else {  //ORI.L #<data>,<mem>
  4180:       XEiJ.mpuCycleCount += 20;
  4181:       int a = efaMltLong (ea);
  4182:       XEiJ.busWl (a, z = XEiJ.busRls (a) | y);
  4183:     }
  4184:     XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X);  //ccr_tst
  4185:   }  //irpOriLong
  4186: 
  4187:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  4188:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  4189:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  4190:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  4191:   //BITREV.L Dr                                     |-|------|-|-----|-----|D         |0000_000_011_000_rrr (ISA_C)
  4192:   //
  4193:   //BITREV.L Dr
  4194:   //  Drのビットの並びを逆順にする。CCRは変化しない
  4195:   public static void irpCmp2Chk2Byte () throws M68kException {
  4196:     int ea = XEiJ.regOC & 63;
  4197:     if (ea < XEiJ.EA_AR) {  //BITREV.L Dr
  4198:       XEiJ.mpuCycleCount += 4;
  4199:       if (XEiJ.IRP_BITREV_REVERSE) {  //2.83ns  0x0f801f3c
  4200:         XEiJ.regRn[ea] = Integer.reverse (XEiJ.regRn[ea]);
  4201:       } else if (XEiJ.IRP_BITREV_SHIFT) {  //2.57ns  0x0f801f3c
  4202:         int x = XEiJ.regRn[ea];
  4203:         x = x << 16 | x >>> 16;
  4204:         x = x << 8 & 0xff00ff00 | x >>> 8 & 0x00ff00ff;
  4205:         x = x << 4 & 0xf0f0f0f0 | x >>> 4 & 0x0f0f0f0f;
  4206:         x = x << 2 & 0xcccccccc | x >>> 2 & 0x33333333;
  4207:         XEiJ.regRn[ea] = x << 1 & 0xaaaaaaaa | x >>> 1 & 0x55555555;
  4208:       } else if (XEiJ.IRP_BITREV_TABLE) {  //1.57ns  0x0f801f3c
  4209:         int x = XEiJ.regRn[ea];
  4210:         XEiJ.regRn[ea] = XEiJ.MPU_BITREV_TABLE_0[x & 2047] | XEiJ.MPU_BITREV_TABLE_1[x << 10 >>> 21] | XEiJ.MPU_BITREV_TABLE_2[x >>> 22];
  4211:       }
  4212:     } else {  //CMP2/CHK2.B <ea>,Rn
  4213:       //プロセッサの判別に使われることがあるのでMC68000ではCMP2/CHK2をエラーにしなければならない
  4214:       XEiJ.mpuCycleCount += 34;
  4215:       M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION;
  4216:       throw M68kException.m6eSignal;
  4217:     }
  4218:   }  //irpCmp2Chk2Byte
  4219: 
  4220:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  4221:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  4222:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  4223:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  4224:   //BTST.L Dq,Dr                                    |-|012346|-|--U--|--*--|D         |0000_qqq_100_000_rrr
  4225:   //MOVEP.W (d16,Ar),Dq                             |-|01234S|-|-----|-----|          |0000_qqq_100_001_rrr-{data}
  4226:   //BTST.B Dq,<ea>                                  |-|012346|-|--U--|--*--|  M+-WXZPI|0000_qqq_100_mmm_rrr
  4227:   public static void irpBtstReg () throws M68kException {
  4228:     int ea = XEiJ.regOC & 63;
  4229:     int qqq = XEiJ.regOC >> 9;  //qqq
  4230:     if (ea >> 3 == XEiJ.MMM_AR) {  //MOVEP.W (d16,Ar),Dq
  4231:       XEiJ.mpuCycleCount += 16;
  4232:       int a;
  4233:       if (XEiJ.MPU_COMPOUND_POSTINCREMENT) {
  4234:         a = XEiJ.regRn[ea] + XEiJ.busRwse ((XEiJ.regPC += 2) - 2);  //pcws。このr[ea]はアドレスレジスタ
  4235:       } else {
  4236:         a = XEiJ.regPC;
  4237:         XEiJ.regPC = a + 2;
  4238:         a = XEiJ.regRn[ea] + XEiJ.busRwse (a);  //pcws。このr[ea]はアドレスレジスタ
  4239:       }
  4240:       XEiJ.regRn[qqq] = ~0xffff & XEiJ.regRn[qqq] | XEiJ.busRbz (a) << 8 | XEiJ.busRbz (a + 2);  //Javaは評価順序が保証されている
  4241:     } else {  //BTST.L Dq,Dr/<ea>
  4242:       int y = XEiJ.regRn[qqq];
  4243:       if (ea < XEiJ.EA_AR) {  //BTST.L Dq,Dr
  4244:         XEiJ.mpuCycleCount += 6;
  4245:         XEiJ.regCCR = XEiJ.regCCR & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_N | XEiJ.REG_CCR_V | XEiJ.REG_CCR_C) | (~XEiJ.regRn[ea] >>> y & 1) << 2;  //ccr_btst。intのシフトは5bitでマスクされるので&31を省略
  4246:       } else {  //BTST.B Dq,<ea>
  4247:         XEiJ.mpuCycleCount += 4;
  4248:         XEiJ.regCCR = XEiJ.regCCR & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_N | XEiJ.REG_CCR_V | XEiJ.REG_CCR_C) | (~XEiJ.busRbs (efaAnyByte (ea)) >>> (y & 7) & 1) << 2;  //ccr_btst
  4249:       }
  4250:     }
  4251:   }  //irpBtstReg
  4252: 
  4253:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  4254:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  4255:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  4256:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  4257:   //BCHG.L Dq,Dr                                    |-|012346|-|--U--|--*--|D         |0000_qqq_101_000_rrr
  4258:   //MOVEP.L (d16,Ar),Dq                             |-|01234S|-|-----|-----|          |0000_qqq_101_001_rrr-{data}
  4259:   //BCHG.B Dq,<ea>                                  |-|012346|-|--U--|--*--|  M+-WXZ  |0000_qqq_101_mmm_rrr
  4260:   public static void irpBchgReg () throws M68kException {
  4261:     int ea = XEiJ.regOC & 63;
  4262:     int qqq = XEiJ.regOC >> 9;  //qqq
  4263:     if (ea >> 3 == XEiJ.MMM_AR) {  //MOVEP.L (d16,Ar),Dq
  4264:       XEiJ.mpuCycleCount += 24;
  4265:       int a;
  4266:       if (XEiJ.MPU_COMPOUND_POSTINCREMENT) {
  4267:         a = XEiJ.regRn[ea] + XEiJ.busRwse ((XEiJ.regPC += 2) - 2);  //pcws。このr[ea]はアドレスレジスタ
  4268:       } else {
  4269:         a = XEiJ.regPC;
  4270:         XEiJ.regPC = a + 2;
  4271:         a = XEiJ.regRn[ea] + XEiJ.busRwse (a);  //pcws。このr[ea]はアドレスレジスタ
  4272:       }
  4273:       XEiJ.regRn[qqq] = XEiJ.busRbs (a) << 24 | XEiJ.busRbz (a + 2) << 16 | XEiJ.busRbz (a + 4) << 8 | XEiJ.busRbz (a + 6);  //Javaは評価順序が保証されている
  4274:     } else {  //BCHG.L Dq,Dr/<ea>
  4275:       int x;
  4276:       int y = XEiJ.regRn[qqq];
  4277:       if (ea < XEiJ.EA_AR) {  //BCHG.L Dq,Dr
  4278:         XEiJ.regRn[ea] = (x = XEiJ.regRn[ea]) ^ (y = 1 << y);  //intのシフトは5bitでマスクされるので1<<(y&0x1f)の&0x1fを省略
  4279:         XEiJ.mpuCycleCount += (char) y != 0 ? 6 : 8;  //(0xffff&y)!=0
  4280:       } else {  //BCHG.B Dq,<ea>
  4281:         XEiJ.mpuCycleCount += 8;
  4282:         int a = efaMltByte (ea);
  4283:         XEiJ.busWb (a, (x = XEiJ.busRbs (a)) ^ (y = 1 << (y & 7)));
  4284:       }
  4285:       XEiJ.regCCR = XEiJ.regCCR & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_N | XEiJ.REG_CCR_V | XEiJ.REG_CCR_C) | (x & y) - 1 >>> 31 << 2;  //ccr_btst
  4286:     }
  4287:   }  //irpBchgReg
  4288: 
  4289:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  4290:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  4291:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  4292:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  4293:   //BCLR.L Dq,Dr                                    |-|012346|-|--U--|--*--|D         |0000_qqq_110_000_rrr
  4294:   //MOVEP.W Dq,(d16,Ar)                             |-|01234S|-|-----|-----|          |0000_qqq_110_001_rrr-{data}
  4295:   //BCLR.B Dq,<ea>                                  |-|012346|-|--U--|--*--|  M+-WXZ  |0000_qqq_110_mmm_rrr
  4296:   public static void irpBclrReg () throws M68kException {
  4297:     int ea = XEiJ.regOC & 63;
  4298:     int y = XEiJ.regRn[XEiJ.regOC >> 9];  //qqq
  4299:     if (ea >> 3 == XEiJ.MMM_AR) {  //MOVEP.W Dq,(d16,Ar)
  4300:       XEiJ.mpuCycleCount += 16;
  4301:       int a;
  4302:       if (XEiJ.MPU_COMPOUND_POSTINCREMENT) {
  4303:         a = XEiJ.regRn[ea] + XEiJ.busRwse ((XEiJ.regPC += 2) - 2);  //pcws。このr[ea]はアドレスレジスタ
  4304:       } else {
  4305:         a = XEiJ.regPC;
  4306:         XEiJ.regPC = a + 2;
  4307:         a = XEiJ.regRn[ea] + XEiJ.busRwse (a);  //pcws。このr[ea]はアドレスレジスタ
  4308:       }
  4309:       XEiJ.busWb (a, y >> 8);
  4310:       XEiJ.busWb (a + 2, y);
  4311:     } else {  //BCLR.L Dq,Dr/<ea>
  4312:       int x;
  4313:       if (ea < XEiJ.EA_AR) {  //BCLR.L Dq,Dr
  4314:         XEiJ.regRn[ea] = (x = XEiJ.regRn[ea]) & ~(y = 1 << y);  //intのシフトは5bitでマスクされるので1<<(y&0x1f)の&0x1fを省略
  4315:         XEiJ.mpuCycleCount += (char) y != 0 ? 8 : 10;  //(0xffff&y)!=0
  4316:       } else {  //BCLR.B Dq,<ea>
  4317:         XEiJ.mpuCycleCount += 8;
  4318:         int a = efaMltByte (ea);
  4319:         XEiJ.busWb (a, (x = XEiJ.busRbs (a)) & ~(y = 1 << (y & 7)));
  4320:       }
  4321:       XEiJ.regCCR = XEiJ.regCCR & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_N | XEiJ.REG_CCR_V | XEiJ.REG_CCR_C) | (x & y) - 1 >>> 31 << 2;  //ccr_btst
  4322:     }
  4323:   }  //irpBclrReg
  4324: 
  4325:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  4326:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  4327:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  4328:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  4329:   //BSET.L Dq,Dr                                    |-|012346|-|--U--|--*--|D         |0000_qqq_111_000_rrr
  4330:   //MOVEP.L Dq,(d16,Ar)                             |-|01234S|-|-----|-----|          |0000_qqq_111_001_rrr-{data}
  4331:   //BSET.B Dq,<ea>                                  |-|012346|-|--U--|--*--|  M+-WXZ  |0000_qqq_111_mmm_rrr
  4332:   public static void irpBsetReg () throws M68kException {
  4333:     int ea = XEiJ.regOC & 63;
  4334:     int y = XEiJ.regRn[XEiJ.regOC >> 9];  //qqq
  4335:     if (ea >> 3 == XEiJ.MMM_AR) {  //MOVEP.L Dq,(d16,Ar)
  4336:       XEiJ.mpuCycleCount += 24;
  4337:       int a;
  4338:       if (XEiJ.MPU_COMPOUND_POSTINCREMENT) {
  4339:         a = XEiJ.regRn[ea] + XEiJ.busRwse ((XEiJ.regPC += 2) - 2);  //pcws。このr[ea]はアドレスレジスタ
  4340:       } else {
  4341:         a = XEiJ.regPC;
  4342:         XEiJ.regPC = a + 2;
  4343:         a = XEiJ.regRn[ea] + XEiJ.busRwse (a);  //pcws。このr[ea]はアドレスレジスタ
  4344:       }
  4345:       XEiJ.busWb (a, y >> 24);
  4346:       XEiJ.busWb (a + 2, y >> 16);
  4347:       XEiJ.busWb (a + 4, y >> 8);
  4348:       XEiJ.busWb (a + 6, y);
  4349:     } else {  //BSET.L Dq,Dr/<ea>
  4350:       int x;
  4351:       if (ea < XEiJ.EA_AR) {  //BSET.L Dq,Dr
  4352:         XEiJ.regRn[ea] = (x = XEiJ.regRn[ea]) | (y = 1 << y);  //intのシフトは5bitでマスクされるので1<<(y&0x1f)の&0x1fを省略
  4353:         XEiJ.mpuCycleCount += (char) y != 0 ? 6 : 8;  //(0xffff&y)!=0
  4354:       } else {  //BSET.B Dq,<ea>
  4355:         XEiJ.mpuCycleCount += 8;
  4356:         int a = efaMltByte (ea);
  4357:         XEiJ.busWb (a, (x = XEiJ.busRbs (a)) | (y = 1 << (y & 7)));
  4358:       }
  4359:       XEiJ.regCCR = XEiJ.regCCR & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_N | XEiJ.REG_CCR_V | XEiJ.REG_CCR_C) | (x & y) - 1 >>> 31 << 2;  //ccr_btst
  4360:     }
  4361:   }  //irpBsetReg
  4362: 
  4363:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  4364:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  4365:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  4366:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  4367:   //ANDI.B #<data>,<ea>                             |-|012346|-|-UUUU|-**00|D M+-WXZ  |0000_001_000_mmm_rrr-{data}
  4368:   //AND.B #<data>,<ea>                              |A|012346|-|-UUUU|-**00|  M+-WXZ  |0000_001_000_mmm_rrr-{data}  [ANDI.B #<data>,<ea>]
  4369:   //ANDI.B #<data>,CCR                              |-|012346|-|*****|*****|          |0000_001_000_111_100-{data}
  4370:   public static void irpAndiByte () throws M68kException {
  4371:     int ea = XEiJ.regOC & 63;
  4372:     int z;
  4373:     if (XEiJ.MPU_COMPOUND_POSTINCREMENT) {
  4374:       z = XEiJ.busRbs ((XEiJ.regPC += 2) - 1);  //pcbs
  4375:     } else {
  4376:       z = XEiJ.regPC;
  4377:       XEiJ.regPC = z + 2;
  4378:       z = XEiJ.busRbs (z + 1);  //pcbs
  4379:     }
  4380:     if (ea < XEiJ.EA_AR) {  //ANDI.B #<data>,Dr
  4381:       XEiJ.mpuCycleCount += 8;
  4382:       z = XEiJ.regRn[ea] &= ~255 | z;  //1拡張してからAND
  4383:       XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & z];  //ccr_tst_byte
  4384:     } else if (ea == XEiJ.EA_IM) {  //ANDI.B #<data>,CCR
  4385:       XEiJ.mpuCycleCount += 20;
  4386:       XEiJ.regCCR &= z;
  4387:     } else {  //ANDI.B #<data>,<mem>
  4388:       XEiJ.mpuCycleCount += 12;
  4389:       int a = efaMltByte (ea);
  4390:       XEiJ.busWb (a, z &= XEiJ.busRbs (a));
  4391:       XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & z];  //ccr_tst_byte
  4392:     }
  4393:   }  //irpAndiByte
  4394: 
  4395:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  4396:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  4397:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  4398:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  4399:   //ANDI.W #<data>,<ea>                             |-|012346|-|-UUUU|-**00|D M+-WXZ  |0000_001_001_mmm_rrr-{data}
  4400:   //AND.W #<data>,<ea>                              |A|012346|-|-UUUU|-**00|  M+-WXZ  |0000_001_001_mmm_rrr-{data}  [ANDI.W #<data>,<ea>]
  4401:   //ANDI.W #<data>,SR                               |-|012346|P|*****|*****|          |0000_001_001_111_100-{data}
  4402:   public static void irpAndiWord () throws M68kException {
  4403:     int ea = XEiJ.regOC & 63;
  4404:     if (ea < XEiJ.EA_AR) {  //ANDI.W #<data>,Dr
  4405:       int z;
  4406:       if (XEiJ.MPU_COMPOUND_POSTINCREMENT) {
  4407:         z = XEiJ.busRwse ((XEiJ.regPC += 2) - 2);  //pcws
  4408:       } else {
  4409:         z = XEiJ.regPC;
  4410:         XEiJ.regPC = z + 2;
  4411:         z = XEiJ.busRwse (z);  //pcws
  4412:       }
  4413:       XEiJ.mpuCycleCount += 8;
  4414:       z = XEiJ.regRn[ea] &= ~65535 | z;  //1拡張してからAND
  4415:       XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (char) z - 1 >> 31 & XEiJ.REG_CCR_Z | ((short) z < 0 ? XEiJ.REG_CCR_N : 0);  //ccr_tst_word
  4416:     } else if (ea == XEiJ.EA_IM) {  //ANDI.W #<data>,SR
  4417:       if (XEiJ.regSRS == 0) {  //ユーザモードのとき
  4418:         XEiJ.mpuCycleCount += 34;
  4419:         M68kException.m6eNumber = M68kException.M6E_PRIVILEGE_VIOLATION;
  4420:         throw M68kException.m6eSignal;
  4421:       }
  4422:       //以下はスーパーバイザモード
  4423:       XEiJ.mpuCycleCount += 20;
  4424:       if (XEiJ.MPU_COMPOUND_POSTINCREMENT) {
  4425:         irpSetSR ((XEiJ.regSRT1 | XEiJ.regSRS | XEiJ.regSRI | XEiJ.regCCR) & XEiJ.busRwse ((XEiJ.regPC += 2) - 2));  //pcws。特権違反チェックが先
  4426:       } else {
  4427:         int t = XEiJ.regPC;
  4428:         XEiJ.regPC = t + 2;
  4429:         irpSetSR ((XEiJ.regSRT1 | XEiJ.regSRS | XEiJ.regSRI | XEiJ.regCCR) & XEiJ.busRwse (t));  //pcws。特権違反チェックが先
  4430:       }
  4431:     } else {  //ANDI.W #<data>,<mem>
  4432:       int z;
  4433:       if (XEiJ.MPU_COMPOUND_POSTINCREMENT) {
  4434:         z = XEiJ.busRwse ((XEiJ.regPC += 2) - 2);  //pcws
  4435:       } else {
  4436:         z = XEiJ.regPC;
  4437:         XEiJ.regPC = z + 2;
  4438:         z = XEiJ.busRwse (z);  //pcws
  4439:       }
  4440:       XEiJ.mpuCycleCount += 12;
  4441:       int a = efaMltWord (ea);
  4442:       XEiJ.busWw (a, z &= XEiJ.busRws (a));
  4443:       XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (char) z - 1 >> 31 & XEiJ.REG_CCR_Z | ((short) z < 0 ? XEiJ.REG_CCR_N : 0);  //ccr_tst_word
  4444:     }
  4445:   }  //irpAndiWord
  4446: 
  4447:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  4448:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  4449:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  4450:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  4451:   //ANDI.L #<data>,<ea>                             |-|012346|-|-UUUU|-**00|D M+-WXZ  |0000_001_010_mmm_rrr-{data}
  4452:   //AND.L #<data>,<ea>                              |A|012346|-|-UUUU|-**00|  M+-WXZ  |0000_001_010_mmm_rrr-{data}  [ANDI.L #<data>,<ea>]
  4453:   public static void irpAndiLong () throws M68kException {
  4454:     int ea = XEiJ.regOC & 63;
  4455:     int y;
  4456:     if (XEiJ.MPU_COMPOUND_POSTINCREMENT) {
  4457:       y = XEiJ.busRlse ((XEiJ.regPC += 4) - 4);  //pcls
  4458:     } else {
  4459:       y = XEiJ.regPC;
  4460:       XEiJ.regPC = y + 4;
  4461:       y = XEiJ.busRlse (y);  //pcls
  4462:     }
  4463:     int z;
  4464:     if (ea < XEiJ.EA_AR) {  //ANDI.L #<data>,Dr
  4465:       XEiJ.mpuCycleCount += 16;
  4466:       z = XEiJ.regRn[ea] &= y;
  4467:     } else {  //ANDI.L #<data>,<mem>
  4468:       XEiJ.mpuCycleCount += 20;
  4469:       int a = efaMltLong (ea);
  4470:       XEiJ.busWl (a, z = XEiJ.busRls (a) & y);
  4471:     }
  4472:     XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X);  //ccr_tst
  4473:   }  //irpAndiLong
  4474: 
  4475:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  4476:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  4477:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  4478:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  4479:   //BYTEREV.L Dr                                    |-|------|-|-----|-----|D         |0000_001_011_000_rrr (ISA_C)
  4480:   //
  4481:   //BYTEREV.L Dr
  4482:   //  Drのバイトの並びを逆順にする。CCRは変化しない
  4483:   public static void irpCmp2Chk2Word () throws M68kException {
  4484:     int ea = XEiJ.regOC & 63;
  4485:     if (ea < XEiJ.EA_AR) {  //BYTEREV.L Dr
  4486:       XEiJ.mpuCycleCount += 4;
  4487:       if (true) {  //0.10ns-0.18ns  0x782750ec
  4488:         XEiJ.regRn[ea] = Integer.reverseBytes (XEiJ.regRn[ea]);
  4489:       } else {  //1.06ns  0x782750ec
  4490:         int x = XEiJ.regRn[ea];
  4491:         XEiJ.regRn[ea] = x << 24 | x << 8 & 0x00ff0000 | x >>> 8 & 0x0000ff00 | x >>> 24;
  4492:       }
  4493:     } else {  //CMP2/CHK2.W <ea>,Rn
  4494:       //プロセッサの判別に使われることがあるのでMC68000ではCMP2/CHK2をエラーにしなければならない
  4495:       XEiJ.mpuCycleCount += 34;
  4496:       M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION;
  4497:       throw M68kException.m6eSignal;
  4498:     }
  4499:   }  //irpCmp2Chk2Word
  4500: 
  4501:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  4502:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  4503:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  4504:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  4505:   //SUBI.B #<data>,<ea>                             |-|012346|-|UUUUU|*****|D M+-WXZ  |0000_010_000_mmm_rrr-{data}
  4506:   //SUB.B #<data>,<ea>                              |A|012346|-|UUUUU|*****|  M+-WXZ  |0000_010_000_mmm_rrr-{data}  [SUBI.B #<data>,<ea>]
  4507:   public static void irpSubiByte () throws M68kException {
  4508:     int ea = XEiJ.regOC & 63;
  4509:     int x;
  4510:     int y;
  4511:     if (XEiJ.MPU_COMPOUND_POSTINCREMENT) {
  4512:       y = XEiJ.busRbs ((XEiJ.regPC += 2) - 1);  //pcbs
  4513:     } else {
  4514:       y = XEiJ.regPC;
  4515:       XEiJ.regPC = y + 2;
  4516:       y = XEiJ.busRbs (y + 1);  //pcbs
  4517:     }
  4518:     int z;
  4519:     if (ea < XEiJ.EA_AR) {  //SUBI.B #<data>,Dr
  4520:       XEiJ.mpuCycleCount += 8;
  4521:       z = (byte) (XEiJ.regRn[ea] = ~0xff & (x = XEiJ.regRn[ea]) | 0xff & (x = (byte) x) - y);
  4522:     } else {  //SUBI.B #<data>,<mem>
  4523:       XEiJ.mpuCycleCount += 12;
  4524:       int a = efaMltByte (ea);
  4525:       XEiJ.busWb (a, z = (byte) ((x = XEiJ.busRbs (a)) - y));
  4526:     }
  4527:     XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) |
  4528:            ((x ^ y) & (x ^ z)) >>> 31 << 1 |
  4529:            (x & (y ^ z) ^ (y | z)) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C));  //ccr_sub
  4530:   }  //irpSubiByte
  4531: 
  4532:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  4533:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  4534:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  4535:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  4536:   //SUBI.W #<data>,<ea>                             |-|012346|-|UUUUU|*****|D M+-WXZ  |0000_010_001_mmm_rrr-{data}
  4537:   //SUB.W #<data>,<ea>                              |A|012346|-|UUUUU|*****|  M+-WXZ  |0000_010_001_mmm_rrr-{data}  [SUBI.W #<data>,<ea>]
  4538:   public static void irpSubiWord () throws M68kException {
  4539:     int ea = XEiJ.regOC & 63;
  4540:     int x;
  4541:     int y;
  4542:     if (XEiJ.MPU_COMPOUND_POSTINCREMENT) {
  4543:       y = XEiJ.busRwse ((XEiJ.regPC += 2) - 2);  //pcws
  4544:     } else {
  4545:       y = XEiJ.regPC;
  4546:       XEiJ.regPC = y + 2;
  4547:       y = XEiJ.busRwse (y);  //pcws
  4548:     }
  4549:     int z;
  4550:     if (ea < XEiJ.EA_AR) {  //SUBI.W #<data>,Dr
  4551:       XEiJ.mpuCycleCount += 8;
  4552:       z = (short) (XEiJ.regRn[ea] = ~0xffff & (x = XEiJ.regRn[ea]) | (char) ((x = (short) x) - y));
  4553:     } else {  //SUBI.W #<data>,<mem>
  4554:       XEiJ.mpuCycleCount += 12;
  4555:       int a = efaMltWord (ea);
  4556:       XEiJ.busWw (a, z = (short) ((x = XEiJ.busRws (a)) - y));
  4557:     }
  4558:     XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) |
  4559:            ((x ^ y) & (x ^ z)) >>> 31 << 1 |
  4560:            (x & (y ^ z) ^ (y | z)) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C));  //ccr_sub
  4561:   }  //irpSubiWord
  4562: 
  4563:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  4564:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  4565:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  4566:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  4567:   //SUBI.L #<data>,<ea>                             |-|012346|-|UUUUU|*****|D M+-WXZ  |0000_010_010_mmm_rrr-{data}
  4568:   //SUB.L #<data>,<ea>                              |A|012346|-|UUUUU|*****|  M+-WXZ  |0000_010_010_mmm_rrr-{data}  [SUBI.L #<data>,<ea>]
  4569:   public static void irpSubiLong () throws M68kException {
  4570:     int ea = XEiJ.regOC & 63;
  4571:     int x;
  4572:     int y;
  4573:     if (XEiJ.MPU_COMPOUND_POSTINCREMENT) {
  4574:       y = XEiJ.busRlse ((XEiJ.regPC += 4) - 4);  //pcls
  4575:     } else {
  4576:       y = XEiJ.regPC;
  4577:       XEiJ.regPC = y + 4;
  4578:       y = XEiJ.busRlse (y);  //pcls
  4579:     }
  4580:     int z;
  4581:     if (ea < XEiJ.EA_AR) {  //SUBI.L #<data>,Dr
  4582:       XEiJ.mpuCycleCount += 16;
  4583:       XEiJ.regRn[ea] = z = (x = XEiJ.regRn[ea]) - y;
  4584:     } else {  //SUBI.L #<data>,<mem>
  4585:       XEiJ.mpuCycleCount += 20;
  4586:       int a = efaMltLong (ea);
  4587:       XEiJ.busWl (a, z = (x = XEiJ.busRls (a)) - y);
  4588:     }
  4589:     XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) |
  4590:            ((x ^ y) & (x ^ z)) >>> 31 << 1 |
  4591:            (x & (y ^ z) ^ (y | z)) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C));  //ccr_sub
  4592:   }  //irpSubiLong
  4593: 
  4594:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  4595:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  4596:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  4597:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  4598:   //FF1.L Dr                                        |-|------|-|-UUUU|-**00|D         |0000_010_011_000_rrr (ISA_C)
  4599:   //
  4600:   //FF1.L Dr
  4601:   //  Drの最上位の1のbit31からのオフセットをDrに格納する
  4602:   //  Drが0のときは32になる
  4603:   public static void irpCmp2Chk2Long () throws M68kException {
  4604:     int ea = XEiJ.regOC & 63;
  4605:     if (ea < XEiJ.EA_AR) {  //FF1.L Dr
  4606:       XEiJ.mpuCycleCount += 4;
  4607:       int z = XEiJ.regRn[ea];
  4608:       if (true) {
  4609:         XEiJ.regRn[ea] = Integer.numberOfLeadingZeros (z);
  4610:       } else {
  4611:         if (z == 0) {
  4612:           XEiJ.regRn[ea] = 32;
  4613:         } else {
  4614:           int k = -(z >>> 16) >> 16 & 16;
  4615:           k += -(z >>> k + 8) >> 8 & 8;
  4616:           k += -(z >>> k + 4) >> 4 & 4;
  4617:           //     bit3  1  1  1  1  1  1  1  1  0  0  0  0  0  0  0  0
  4618:           //     bit2  1  1  1  1  0  0  0  0  1  1  1  1  0  0  0  0
  4619:           //     bit1  1  1  0  0  1  1  0  0  1  1  0  0  1  1  0  0
  4620:           //     bit0  1  0  1  0  1  0  1  0  1  0  1  0  1  0  1  0
  4621:           XEiJ.regRn[ea] = ((0b11_11_11_11_11_11_11_11_10_10_10_10_01_01_00_00 >>> (z >>> k << 1)) & 3) + k;  //intのシフトカウントは下位5bitだけが使用される
  4622:         }
  4623:       }
  4624:       XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X);  //ccr_tst
  4625:     } else {  //CMP2/CHK2.L <ea>,Rn
  4626:       //プロセッサの判別に使われることがあるのでMC68000ではCMP2/CHK2をエラーにしなければならない
  4627:       XEiJ.mpuCycleCount += 34;
  4628:       M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION;
  4629:       throw M68kException.m6eSignal;
  4630:     }
  4631:   }  //irpCmp2Chk2Long
  4632: 
  4633:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  4634:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  4635:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  4636:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  4637:   //ADDI.B #<data>,<ea>                             |-|012346|-|UUUUU|*****|D M+-WXZ  |0000_011_000_mmm_rrr-{data}
  4638:   public static void irpAddiByte () throws M68kException {
  4639:     int ea = XEiJ.regOC & 63;
  4640:     int x;
  4641:     int y;
  4642:     if (XEiJ.MPU_COMPOUND_POSTINCREMENT) {
  4643:       y = XEiJ.busRbs ((XEiJ.regPC += 2) - 1);  //pcbs
  4644:     } else {
  4645:       y = XEiJ.regPC;
  4646:       XEiJ.regPC = y + 2;
  4647:       y = XEiJ.busRbs (y + 1);  //pcbs
  4648:     }
  4649:     int z;
  4650:     if (ea < XEiJ.EA_AR) {  //ADDI.B #<data>,Dr
  4651:       XEiJ.mpuCycleCount += 8;
  4652:       z = (byte) (XEiJ.regRn[ea] = ~0xff & (x = XEiJ.regRn[ea]) | 0xff & (x = (byte) x) + y);
  4653:     } else {  //ADDI.B #<data>,<mem>
  4654:       XEiJ.mpuCycleCount += 12;
  4655:       int a = efaMltByte (ea);
  4656:       XEiJ.busWb (a, z = (byte) ((x = XEiJ.busRbs (a)) + y));
  4657:     }
  4658:     XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) |
  4659:            ((x ^ z) & (y ^ z)) >>> 31 << 1 |
  4660:            ((x | y) ^ (x ^ y) & z) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C));  //ccr_add
  4661:   }  //irpAddiByte
  4662: 
  4663:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  4664:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  4665:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  4666:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  4667:   //ADDI.W #<data>,<ea>                             |-|012346|-|UUUUU|*****|D M+-WXZ  |0000_011_001_mmm_rrr-{data}
  4668:   public static void irpAddiWord () throws M68kException {
  4669:     int ea = XEiJ.regOC & 63;
  4670:     int x;
  4671:     int y;
  4672:     if (XEiJ.MPU_COMPOUND_POSTINCREMENT) {
  4673:       y = XEiJ.busRwse ((XEiJ.regPC += 2) - 2);  //pcws
  4674:     } else {
  4675:       y = XEiJ.regPC;
  4676:       XEiJ.regPC = y + 2;
  4677:       y = XEiJ.busRwse (y);  //pcws
  4678:     }
  4679:     int z;
  4680:     if (ea < XEiJ.EA_AR) {  //ADDI.W #<data>,Dr
  4681:       XEiJ.mpuCycleCount += 8;
  4682:       z = (short) (XEiJ.regRn[ea] = ~0xffff & (x = XEiJ.regRn[ea]) | (char) ((x = (short) x) + y));
  4683:     } else {  //ADDI.W #<data>,<mem>
  4684:       XEiJ.mpuCycleCount += 12;
  4685:       int a = efaMltWord (ea);
  4686:       XEiJ.busWw (a, z = (short) ((x = XEiJ.busRws (a)) + y));
  4687:     }
  4688:     XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) |
  4689:            ((x ^ z) & (y ^ z)) >>> 31 << 1 |
  4690:            ((x | y) ^ (x ^ y) & z) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C));  //ccr_add
  4691:   }  //irpAddiWord
  4692: 
  4693:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  4694:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  4695:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  4696:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  4697:   //ADDI.L #<data>,<ea>                             |-|012346|-|UUUUU|*****|D M+-WXZ  |0000_011_010_mmm_rrr-{data}
  4698:   public static void irpAddiLong () throws M68kException {
  4699:     int ea = XEiJ.regOC & 63;
  4700:     int x;
  4701:     int y;
  4702:     if (XEiJ.MPU_COMPOUND_POSTINCREMENT) {
  4703:       y = XEiJ.busRlse ((XEiJ.regPC += 4) - 4);  //pcls
  4704:     } else {
  4705:       y = XEiJ.regPC;
  4706:       XEiJ.regPC = y + 4;
  4707:       y = XEiJ.busRlse (y);  //pcls
  4708:     }
  4709:     int z;
  4710:     if (ea < XEiJ.EA_AR) {  //ADDI.L #<data>,Dr
  4711:       XEiJ.mpuCycleCount += 16;
  4712:       XEiJ.regRn[ea] = z = (x = XEiJ.regRn[ea]) + y;
  4713:     } else {  //ADDI.L #<data>,<mem>
  4714:       XEiJ.mpuCycleCount += 20;
  4715:       int a = efaMltLong (ea);
  4716:       XEiJ.busWl (a, z = (x = XEiJ.busRls (a)) + y);
  4717:     }
  4718:     XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) |
  4719:            ((x ^ z) & (y ^ z)) >>> 31 << 1 |
  4720:            ((x | y) ^ (x ^ y) & z) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C));  //ccr_add
  4721:   }  //irpAddiLong
  4722: 
  4723:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  4724:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  4725:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  4726:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  4727:   //BTST.L #<data>,Dr                               |-|012346|-|--U--|--*--|D         |0000_100_000_000_rrr-{data}
  4728:   //BTST.B #<data>,<ea>                             |-|012346|-|--U--|--*--|  M+-WXZP |0000_100_000_mmm_rrr-{data}
  4729:   public static void irpBtstImm () throws M68kException {
  4730:     int ea = XEiJ.regOC & 63;
  4731:     int y;
  4732:     if (XEiJ.MPU_COMPOUND_POSTINCREMENT) {
  4733:       y = XEiJ.busRbs ((XEiJ.regPC += 2) - 1);  //pcbs
  4734:     } else {
  4735:       y = XEiJ.regPC;
  4736:       XEiJ.regPC = y + 2;
  4737:       y = XEiJ.busRbs (y + 1);  //pcbs
  4738:     }
  4739:     if (ea < XEiJ.EA_AR) {  //BTST.L #<data>,Dr
  4740:       XEiJ.mpuCycleCount += 10;
  4741:       XEiJ.regCCR = XEiJ.regCCR & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_N | XEiJ.REG_CCR_V | XEiJ.REG_CCR_C) | (~XEiJ.regRn[ea] >>> y & 1) << 2;  //ccr_btst。intのシフトは5bitでマスクされるので&31を省略
  4742:     } else {  //BTST.B #<data>,<ea>
  4743:       XEiJ.mpuCycleCount += 8;
  4744:       XEiJ.regCCR = XEiJ.regCCR & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_N | XEiJ.REG_CCR_V | XEiJ.REG_CCR_C) | (~XEiJ.busRbs (efaMemByte (ea)) >>> (y & 7) & 1) << 2;  //ccr_btst
  4745:     }
  4746:   }  //irpBtstImm
  4747: 
  4748:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  4749:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  4750:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  4751:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  4752:   //BCHG.L #<data>,Dr                               |-|012346|-|--U--|--*--|D         |0000_100_001_000_rrr-{data}
  4753:   //BCHG.B #<data>,<ea>                             |-|012346|-|--U--|--*--|  M+-WXZ  |0000_100_001_mmm_rrr-{data}
  4754:   public static void irpBchgImm () throws M68kException {
  4755:     int ea = XEiJ.regOC & 63;
  4756:     int x;
  4757:     int y;
  4758:     if (XEiJ.MPU_COMPOUND_POSTINCREMENT) {
  4759:       y = XEiJ.busRbs ((XEiJ.regPC += 2) - 1);  //pcbs
  4760:     } else {
  4761:       y = XEiJ.regPC;
  4762:       XEiJ.regPC = y + 2;
  4763:       y = XEiJ.busRbs (y + 1);  //pcbs
  4764:     }
  4765:     if (ea < XEiJ.EA_AR) {  //BCHG.L #<data>,Dr
  4766:       XEiJ.regRn[ea] = (x = XEiJ.regRn[ea]) ^ (y = 1 << y);  //intのシフトは5bitでマスクされるので1<<(y&0x1f)の&0x1fを省略
  4767:       XEiJ.mpuCycleCount += (char) y != 0 ? 10 : 12;  //(0xffff&y)!=0
  4768:     } else {  //BCHG.B #<data>,<ea>
  4769:       XEiJ.mpuCycleCount += 12;
  4770:       int a = efaMltByte (ea);
  4771:       XEiJ.busWb (a, (x = XEiJ.busRbs (a)) ^ (y = 1 << (y & 7)));
  4772:     }
  4773:     XEiJ.regCCR = XEiJ.regCCR & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_N | XEiJ.REG_CCR_V | XEiJ.REG_CCR_C) | (x & y) - 1 >>> 31 << 2;  //ccr_btst
  4774:   }  //irpBchgImm
  4775: 
  4776:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  4777:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  4778:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  4779:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  4780:   //BCLR.L #<data>,Dr                               |-|012346|-|--U--|--*--|D         |0000_100_010_000_rrr-{data}
  4781:   //BCLR.B #<data>,<ea>                             |-|012346|-|--U--|--*--|  M+-WXZ  |0000_100_010_mmm_rrr-{data}
  4782:   public static void irpBclrImm () throws M68kException {
  4783:     int ea = XEiJ.regOC & 63;
  4784:     int x;
  4785:     int y;
  4786:     if (XEiJ.MPU_COMPOUND_POSTINCREMENT) {
  4787:       y = XEiJ.busRbs ((XEiJ.regPC += 2) - 1);  //pcbs
  4788:     } else {
  4789:       y = XEiJ.regPC;
  4790:       XEiJ.regPC = y + 2;
  4791:       y = XEiJ.busRbs (y + 1);  //pcbs
  4792:     }
  4793:     if (ea < XEiJ.EA_AR) {  //BCLR.L #<data>,Dr
  4794:       XEiJ.regRn[ea] = (x = XEiJ.regRn[ea]) & ~(y = 1 << y);  //intのシフトは5bitでマスクされるので1<<(y&0x1f)の&0x1fを省略
  4795:       XEiJ.mpuCycleCount += (char) y != 0 ? 12 : 14;  //(0xffff&y)!=0
  4796:     } else {  //BCLR.B #<data>,<ea>
  4797:       XEiJ.mpuCycleCount += 12;
  4798:       int a = efaMltByte (ea);
  4799:       XEiJ.busWb (a, (x = XEiJ.busRbs (a)) & ~(y = 1 << (y & 7)));
  4800:     }
  4801:     XEiJ.regCCR = XEiJ.regCCR & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_N | XEiJ.REG_CCR_V | XEiJ.REG_CCR_C) | (x & y) - 1 >>> 31 << 2;  //ccr_btst
  4802:   }  //irpBclrImm
  4803: 
  4804:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  4805:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  4806:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  4807:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  4808:   //BSET.L #<data>,Dr                               |-|012346|-|--U--|--*--|D         |0000_100_011_000_rrr-{data}
  4809:   //BSET.B #<data>,<ea>                             |-|012346|-|--U--|--*--|  M+-WXZ  |0000_100_011_mmm_rrr-{data}
  4810:   public static void irpBsetImm () throws M68kException {
  4811:     int ea = XEiJ.regOC & 63;
  4812:     int x;
  4813:     int y;
  4814:     if (XEiJ.MPU_COMPOUND_POSTINCREMENT) {
  4815:       y = XEiJ.busRbs ((XEiJ.regPC += 2) - 1);  //pcbs
  4816:     } else {
  4817:       y = XEiJ.regPC;
  4818:       XEiJ.regPC = y + 2;
  4819:       y = XEiJ.busRbs (y + 1);  //pcbs
  4820:     }
  4821:     if (ea < XEiJ.EA_AR) {  //BSET.L #<data>,Dr
  4822:       XEiJ.regRn[ea] = (x = XEiJ.regRn[ea]) | (y = 1 << y);  //intのシフトは5bitでマスクされるので1<<(y&0x1f)の&0x1fを省略
  4823:       XEiJ.mpuCycleCount += (char) y != 0 ? 10 : 12;  //(0xffff&y)!=0
  4824:     } else {  //BSET.B #<data>,<ea>
  4825:       XEiJ.mpuCycleCount += 12;
  4826:       int a = efaMltByte (ea);
  4827:       XEiJ.busWb (a, (x = XEiJ.busRbs (a)) | (y = 1 << (y & 7)));
  4828:     }
  4829:     XEiJ.regCCR = XEiJ.regCCR & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_N | XEiJ.REG_CCR_V | XEiJ.REG_CCR_C) | (x & y) - 1 >>> 31 << 2;  //ccr_btst
  4830:   }  //irpBsetImm
  4831: 
  4832:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  4833:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  4834:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  4835:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  4836:   //EORI.B #<data>,<ea>                             |-|012346|-|-UUUU|-**00|D M+-WXZ  |0000_101_000_mmm_rrr-{data}
  4837:   //EOR.B #<data>,<ea>                              |A|012346|-|-UUUU|-**00|D M+-WXZ  |0000_101_000_mmm_rrr-{data}  [EORI.B #<data>,<ea>]
  4838:   //EORI.B #<data>,CCR                              |-|012346|-|*****|*****|          |0000_101_000_111_100-{data}
  4839:   public static void irpEoriByte () throws M68kException {
  4840:     int ea = XEiJ.regOC & 63;
  4841:     int z;
  4842:     if (XEiJ.MPU_COMPOUND_POSTINCREMENT) {
  4843:       z = XEiJ.busRbs ((XEiJ.regPC += 2) - 1);  //pcbs
  4844:     } else {
  4845:       z = XEiJ.regPC;
  4846:       XEiJ.regPC = z + 2;
  4847:       z = XEiJ.busRbs (z + 1);  //pcbs
  4848:     }
  4849:     if (ea < XEiJ.EA_AR) {  //EORI.B #<data>,Dr
  4850:       XEiJ.mpuCycleCount += 8;
  4851:       z = XEiJ.regRn[ea] ^= 255 & z;  //0拡張してからEOR
  4852:       XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & z];  //ccr_tst_byte
  4853:     } else if (ea == XEiJ.EA_IM) {  //EORI.B #<data>,CCR
  4854:       XEiJ.mpuCycleCount += 20;
  4855:       XEiJ.regCCR ^= XEiJ.REG_CCR_MASK & z;
  4856:     } else {  //EORI.B #<data>,<mem>
  4857:       XEiJ.mpuCycleCount += 12;
  4858:       int a = efaMltByte (ea);
  4859:       XEiJ.busWb (a, z ^= XEiJ.busRbs (a));
  4860:       XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & z];  //ccr_tst_byte
  4861:     }
  4862:   }  //irpEoriByte
  4863: 
  4864:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  4865:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  4866:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  4867:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  4868:   //EORI.W #<data>,<ea>                             |-|012346|-|-UUUU|-**00|D M+-WXZ  |0000_101_001_mmm_rrr-{data}
  4869:   //EOR.W #<data>,<ea>                              |A|012346|-|-UUUU|-**00|D M+-WXZ  |0000_101_001_mmm_rrr-{data}  [EORI.W #<data>,<ea>]
  4870:   //EORI.W #<data>,SR                               |-|012346|P|*****|*****|          |0000_101_001_111_100-{data}
  4871:   public static void irpEoriWord () throws M68kException {
  4872:     int ea = XEiJ.regOC & 63;
  4873:     if (ea < XEiJ.EA_AR) {  //EORI.W #<data>,Dr
  4874:       int z;
  4875:       if (XEiJ.MPU_COMPOUND_POSTINCREMENT) {
  4876:         z = XEiJ.busRwse ((XEiJ.regPC += 2) - 2);  //pcws
  4877:       } else {
  4878:         z = XEiJ.regPC;
  4879:         XEiJ.regPC = z + 2;
  4880:         z = XEiJ.busRwse (z);  //pcws
  4881:       }
  4882:       XEiJ.mpuCycleCount += 8;
  4883:       z = XEiJ.regRn[ea] ^= (char) z;  //0拡張してからEOR
  4884:       XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (char) z - 1 >> 31 & XEiJ.REG_CCR_Z | ((short) z < 0 ? XEiJ.REG_CCR_N : 0);  //ccr_tst_word
  4885:     } else if (ea == XEiJ.EA_IM) {  //EORI.W #<data>,SR
  4886:       if (XEiJ.regSRS == 0) {  //ユーザモードのとき
  4887:         XEiJ.mpuCycleCount += 34;
  4888:         M68kException.m6eNumber = M68kException.M6E_PRIVILEGE_VIOLATION;
  4889:         throw M68kException.m6eSignal;
  4890:       }
  4891:       //以下はスーパーバイザモード
  4892:       XEiJ.mpuCycleCount += 20;
  4893:       if (XEiJ.MPU_COMPOUND_POSTINCREMENT) {
  4894:         irpSetSR ((XEiJ.regSRT1 | XEiJ.regSRS | XEiJ.regSRI | XEiJ.regCCR) ^ XEiJ.busRwse ((XEiJ.regPC += 2) - 2));  //pcws。特権違反チェックが先
  4895:       } else {
  4896:         int t = XEiJ.regPC;
  4897:         XEiJ.regPC = t + 2;
  4898:         irpSetSR ((XEiJ.regSRT1 | XEiJ.regSRS | XEiJ.regSRI | XEiJ.regCCR) ^ XEiJ.busRwse (t));  //pcws。特権違反チェックが先
  4899:       }
  4900:     } else {  //EORI.W #<data>,<mem>
  4901:       int z;
  4902:       if (XEiJ.MPU_COMPOUND_POSTINCREMENT) {
  4903:         z = XEiJ.busRwse ((XEiJ.regPC += 2) - 2);  //pcws
  4904:       } else {
  4905:         z = XEiJ.regPC;
  4906:         XEiJ.regPC = z + 2;
  4907:         z = XEiJ.busRwse (z);  //pcws
  4908:       }
  4909:       XEiJ.mpuCycleCount += 12;
  4910:       int a = efaMltWord (ea);
  4911:       XEiJ.busWw (a, z ^= XEiJ.busRws (a));
  4912:       XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (char) z - 1 >> 31 & XEiJ.REG_CCR_Z | ((short) z < 0 ? XEiJ.REG_CCR_N : 0);  //ccr_tst_word
  4913:     }
  4914:   }  //irpEoriWord
  4915: 
  4916:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  4917:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  4918:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  4919:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  4920:   //EORI.L #<data>,<ea>                             |-|012346|-|-UUUU|-**00|D M+-WXZ  |0000_101_010_mmm_rrr-{data}
  4921:   //EOR.L #<data>,<ea>                              |A|012346|-|-UUUU|-**00|D M+-WXZ  |0000_101_010_mmm_rrr-{data}  [EORI.L #<data>,<ea>]
  4922:   public static void irpEoriLong () throws M68kException {
  4923:     int ea = XEiJ.regOC & 63;
  4924:     int y;
  4925:     if (XEiJ.MPU_COMPOUND_POSTINCREMENT) {
  4926:       y = XEiJ.busRlse ((XEiJ.regPC += 4) - 4);  //pcls
  4927:     } else {
  4928:       y = XEiJ.regPC;
  4929:       XEiJ.regPC = y + 4;
  4930:       y = XEiJ.busRlse (y);  //pcls
  4931:     }
  4932:     int z;
  4933:     if (ea < XEiJ.EA_AR) {  //EORI.L #<data>,Dr
  4934:       XEiJ.mpuCycleCount += 16;
  4935:       z = XEiJ.regRn[ea] ^= y;
  4936:     } else {  //EORI.L #<data>,<mem>
  4937:       XEiJ.mpuCycleCount += 20;
  4938:       int a = efaMltLong (ea);
  4939:       XEiJ.busWl (a, z = XEiJ.busRls (a) ^ y);
  4940:     }
  4941:     XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X);  //ccr_tst
  4942:   }  //irpEoriLong
  4943: 
  4944:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  4945:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  4946:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  4947:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  4948:   //CMPI.B #<data>,<ea>                             |-|01----|-|-UUUU|-****|D M+-WXZ  |0000_110_000_mmm_rrr-{data}
  4949:   //CMP.B #<data>,<ea>                              |A|01----|-|-UUUU|-****|  M+-WXZ  |0000_110_000_mmm_rrr-{data}  [CMPI.B #<data>,<ea>]
  4950:   public static void irpCmpiByte () throws M68kException {
  4951:     XEiJ.mpuCycleCount += 8;
  4952:     int ea = XEiJ.regOC & 63;
  4953:     int x;
  4954:     int y;
  4955:     if (XEiJ.MPU_COMPOUND_POSTINCREMENT) {
  4956:       y = XEiJ.busRbs ((XEiJ.regPC += 2) - 1);  //pcbs
  4957:     } else {
  4958:       y = XEiJ.regPC;
  4959:       XEiJ.regPC = y + 2;
  4960:       y = XEiJ.busRbs (y + 1);  //pcbs
  4961:     }
  4962:     int z = (byte) ((x = ea < XEiJ.EA_AR ? (byte) XEiJ.regRn[ea] : XEiJ.busRbs (efaMltByte (ea))) - y);  //アドレッシングモードに注意
  4963:     XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) |
  4964:            ((x ^ y) & (x ^ z)) >>> 31 << 1 |
  4965:            (x & (y ^ z) ^ (y | z)) >>> 31);  //ccr_cmp
  4966:   }  //irpCmpiByte
  4967: 
  4968:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  4969:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  4970:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  4971:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  4972:   //CMPI.W #<data>,<ea>                             |-|01----|-|-UUUU|-****|D M+-WXZ  |0000_110_001_mmm_rrr-{data}
  4973:   //CMP.W #<data>,<ea>                              |A|01----|-|-UUUU|-****|  M+-WXZ  |0000_110_001_mmm_rrr-{data}  [CMPI.W #<data>,<ea>]
  4974:   public static void irpCmpiWord () throws M68kException {
  4975:     XEiJ.mpuCycleCount += 8;
  4976:     int ea = XEiJ.regOC & 63;
  4977:     int x;
  4978:     int y;
  4979:     if (XEiJ.MPU_COMPOUND_POSTINCREMENT) {
  4980:       y = XEiJ.busRwse ((XEiJ.regPC += 2) - 2);  //pcws
  4981:     } else {
  4982:       y = XEiJ.regPC;
  4983:       XEiJ.regPC = y + 2;
  4984:       y = XEiJ.busRwse (y);  //pcws
  4985:     }
  4986:     int z = (short) ((x = ea < XEiJ.EA_AR ? (short) XEiJ.regRn[ea] : XEiJ.busRws (efaMltWord (ea))) - y);  //アドレッシングモードに注意
  4987:     XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) |
  4988:            ((x ^ y) & (x ^ z)) >>> 31 << 1 |
  4989:            (x & (y ^ z) ^ (y | z)) >>> 31);  //ccr_cmp
  4990:   }  //irpCmpiWord
  4991: 
  4992:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  4993:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  4994:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  4995:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  4996:   //CMPI.L #<data>,<ea>                             |-|01----|-|-UUUU|-****|D M+-WXZ  |0000_110_010_mmm_rrr-{data}
  4997:   //CMP.L #<data>,<ea>                              |A|01----|-|-UUUU|-****|  M+-WXZ  |0000_110_010_mmm_rrr-{data}  [CMPI.L #<data>,<ea>]
  4998:   public static void irpCmpiLong () throws M68kException {
  4999:     int ea = XEiJ.regOC & 63;
  5000:     int x;
  5001:     int y;
  5002:     if (XEiJ.MPU_COMPOUND_POSTINCREMENT) {
  5003:       y = XEiJ.busRlse ((XEiJ.regPC += 4) - 4);  //pcls
  5004:     } else {
  5005:       y = XEiJ.regPC;
  5006:       XEiJ.regPC = y + 4;
  5007:       y = XEiJ.busRlse (y);  //pcls
  5008:     }
  5009:     int z;
  5010:     if (ea < XEiJ.EA_AR) {  //CMPI.L #<data>,Dr
  5011:       XEiJ.mpuCycleCount += 14;
  5012:       z = (x = XEiJ.regRn[ea]) - y;
  5013:     } else {  //CMPI.L #<data>,<mem>
  5014:       XEiJ.mpuCycleCount += 12;
  5015:       z = (x = XEiJ.busRls (efaMltLong (ea))) - y;  //アドレッシングモードに注意
  5016:     }
  5017:     XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) |
  5018:            ((x ^ y) & (x ^ z)) >>> 31 << 1 |
  5019:            (x & (y ^ z) ^ (y | z)) >>> 31);  //ccr_cmp
  5020:   }  //irpCmpiLong
  5021: 
  5022:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  5023:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  5024:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  5025:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  5026:   //MOVE.B <ea>,Dq                                  |-|012346|-|-UUUU|-**00|D M+-WXZPI|0001_qqq_000_mmm_rrr
  5027:   public static void irpMoveToDRByte () throws M68kException {
  5028:     XEiJ.mpuCycleCount += 4;
  5029:     int ea = XEiJ.regOC & 63;
  5030:     int qqq = XEiJ.regOC >> 9 & 7;
  5031:     int z = ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : XEiJ.busRbs (efaAnyByte (ea));
  5032:     XEiJ.regRn[qqq] = ~255 & XEiJ.regRn[qqq] | 255 & z;
  5033:     XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & z];  //ccr_tst_byte
  5034:   }  //irpMoveToDRByte
  5035: 
  5036:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  5037:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  5038:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  5039:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  5040:   //MOVE.B <ea>,(Aq)                                |-|012346|-|-UUUU|-**00|D M+-WXZPI|0001_qqq_010_mmm_rrr
  5041:   public static void irpMoveToMMByte () throws M68kException {
  5042:     XEiJ.mpuCycleCount += 8;
  5043:     int ea = XEiJ.regOC & 63;
  5044:     int z = ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : XEiJ.busRbs (efaAnyByte (ea));  //ここでAqが変化する可能性があることに注意
  5045:     XEiJ.busWb (XEiJ.regRn[XEiJ.regOC >> 9], z);  //1qqq=aqq
  5046:     XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & z];  //ccr_tst_byte
  5047:   }  //irpMoveToMMByte
  5048: 
  5049:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  5050:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  5051:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  5052:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  5053:   //MOVE.B <ea>,(Aq)+                               |-|012346|-|-UUUU|-**00|D M+-WXZPI|0001_qqq_011_mmm_rrr
  5054:   public static void irpMoveToMPByte () throws M68kException {
  5055:     XEiJ.mpuCycleCount += 8;
  5056:     int ea = XEiJ.regOC & 63;
  5057:     int aqq = XEiJ.regOC >> 9;  //1qqq=aqq
  5058:     int z = ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : XEiJ.busRbs (efaAnyByte (ea));  //ここでAqが変化する可能性があることに注意
  5059:     XEiJ.busWb (aqq < 15 ? XEiJ.regRn[aqq]++ : (XEiJ.regRn[15] += 2) - 2, z);
  5060:     XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & z];  //ccr_tst_byte
  5061:   }  //irpMoveToMPByte
  5062: 
  5063:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  5064:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  5065:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  5066:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  5067:   //MOVE.B <ea>,-(Aq)                               |-|012346|-|-UUUU|-**00|D M+-WXZPI|0001_qqq_100_mmm_rrr
  5068:   public static void irpMoveToMNByte () throws M68kException {
  5069:     XEiJ.mpuCycleCount += 8;
  5070:     int ea = XEiJ.regOC & 63;
  5071:     int aqq = XEiJ.regOC >> 9;  //1qqq=aqq
  5072:     int z = ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : XEiJ.busRbs (efaAnyByte (ea));  //ここでAqが変化する可能性があることに注意
  5073:     XEiJ.busWb (aqq < 15 ? --XEiJ.regRn[aqq] : (XEiJ.regRn[15] -= 2), z);
  5074:     XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & z];  //ccr_tst_byte
  5075:   }  //irpMoveToMNByte
  5076: 
  5077:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  5078:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  5079:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  5080:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  5081:   //MOVE.B <ea>,(d16,Aq)                            |-|012346|-|-UUUU|-**00|D M+-WXZPI|0001_qqq_101_mmm_rrr
  5082:   public static void irpMoveToMWByte () throws M68kException {
  5083:     XEiJ.mpuCycleCount += 12;
  5084:     int ea = XEiJ.regOC & 63;
  5085:     int aqq = XEiJ.regOC >> 9;  //1qqq=aqq
  5086:     int z = ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : XEiJ.busRbs (efaAnyByte (ea));  //ここでAqが変化する可能性があることに注意
  5087:     if (XEiJ.MPU_COMPOUND_POSTINCREMENT) {
  5088:       XEiJ.busWb (XEiJ.regRn[aqq]  //ベースレジスタ
  5089:           + XEiJ.busRwse ((XEiJ.regPC += 2) - 2),  //pcws。ワードディスプレースメント
  5090:           z);
  5091:     } else {
  5092:       int t = XEiJ.regPC;
  5093:       XEiJ.regPC = t + 2;
  5094:       XEiJ.busWb (XEiJ.regRn[aqq]  //ベースレジスタ
  5095:           + XEiJ.busRwse (t),  //pcws。ワードディスプレースメント
  5096:           z);
  5097:     }
  5098:     XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & z];  //ccr_tst_byte
  5099:   }  //irpMoveToMWByte
  5100: 
  5101:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  5102:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  5103:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  5104:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  5105:   //MOVE.B <ea>,(d8,Aq,Rn.wl)                       |-|012346|-|-UUUU|-**00|D M+-WXZPI|0001_qqq_110_mmm_rrr
  5106:   public static void irpMoveToMXByte () throws M68kException {
  5107:     XEiJ.mpuCycleCount += 14;
  5108:     int ea = XEiJ.regOC & 63;
  5109:     int aqq = XEiJ.regOC >> 9;  //1qqq=aqq
  5110:     int z = ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : XEiJ.busRbs (efaAnyByte (ea));  //ここでAqが変化する可能性があることに注意
  5111:     int w;
  5112:     if (XEiJ.MPU_COMPOUND_POSTINCREMENT) {
  5113:       w = XEiJ.busRwze ((XEiJ.regPC += 2) - 2);  //pcwz。拡張ワード
  5114:     } else {
  5115:       w = XEiJ.regPC;
  5116:       XEiJ.regPC = w + 2;
  5117:       w = XEiJ.busRwze (w);  //pcwz。拡張ワード
  5118:     }
  5119:     XEiJ.busWb (XEiJ.regRn[aqq]  //ベースレジスタ
  5120:         + (byte) w  //バイトディスプレースメント
  5121:         + (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] :  //ワードインデックス
  5122:            XEiJ.regRn[w >> 12]),  //ロングインデックス
  5123:         z);
  5124:     XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & z];  //ccr_tst_byte
  5125:   }  //irpMoveToMXByte
  5126: 
  5127:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  5128:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  5129:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  5130:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  5131:   //MOVE.B <ea>,(xxx).W                             |-|012346|-|-UUUU|-**00|D M+-WXZPI|0001_000_111_mmm_rrr
  5132:   public static void irpMoveToZWByte () throws M68kException {
  5133:     XEiJ.mpuCycleCount += 12;
  5134:     int ea = XEiJ.regOC & 63;
  5135:     int z = ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : XEiJ.busRbs (efaAnyByte (ea));
  5136:     if (XEiJ.MPU_COMPOUND_POSTINCREMENT) {
  5137:       XEiJ.busWb (XEiJ.busRwse ((XEiJ.regPC += 2) - 2),  //pcws
  5138:           z);
  5139:     } else {
  5140:       int t = XEiJ.regPC;
  5141:       XEiJ.regPC = t + 2;
  5142:       XEiJ.busWb (XEiJ.busRwse (t),  //pcws
  5143:           z);
  5144:     }
  5145:     XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & z];  //ccr_tst_byte
  5146:   }  //irpMoveToZWByte
  5147: 
  5148:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  5149:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  5150:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  5151:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  5152:   //MOVE.B <ea>,(xxx).L                             |-|012346|-|-UUUU|-**00|D M+-WXZPI|0001_001_111_mmm_rrr
  5153:   public static void irpMoveToZLByte () throws M68kException {
  5154:     XEiJ.mpuCycleCount += 16;
  5155:     int ea = XEiJ.regOC & 63;
  5156:     int z = ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : XEiJ.busRbs (efaAnyByte (ea));
  5157:     if (XEiJ.MPU_COMPOUND_POSTINCREMENT) {
  5158:       XEiJ.busWb (XEiJ.busRlse ((XEiJ.regPC += 4) - 4),  //pcls
  5159:           z);
  5160:     } else {
  5161:       int t = XEiJ.regPC;
  5162:       XEiJ.regPC = t + 4;
  5163:       XEiJ.busWb (XEiJ.busRlse (t),  //pcls
  5164:           z);
  5165:     }
  5166:     XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & z];  //ccr_tst_byte
  5167:   }  //irpMoveToZLByte
  5168: 
  5169:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  5170:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  5171:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  5172:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  5173:   //MOVE.L <ea>,Dq                                  |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0010_qqq_000_mmm_rrr
  5174:   public static void irpMoveToDRLong () throws M68kException {
  5175:     XEiJ.mpuCycleCount += 4;
  5176:     int ea = XEiJ.regOC & 63;
  5177:     int z;
  5178:     XEiJ.regRn[XEiJ.regOC >> 9 & 7] = z = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : XEiJ.busRls (efaAnyLong (ea));  //このr[ea]はデータレジスタまたはアドレスレジスタ
  5179:     XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X);  //ccr_tst
  5180:   }  //irpMoveToDRLong
  5181: 
  5182:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  5183:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  5184:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  5185:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  5186:   //MOVEA.L <ea>,Aq                                 |-|012346|-|-----|-----|DAM+-WXZPI|0010_qqq_001_mmm_rrr
  5187:   //MOVE.L <ea>,Aq                                  |A|012346|-|-----|-----|DAM+-WXZPI|0010_qqq_001_mmm_rrr [MOVEA.L <ea>,Aq]
  5188:   public static void irpMoveaLong () throws M68kException {
  5189:     XEiJ.mpuCycleCount += 4;
  5190:     int ea = XEiJ.regOC & 63;
  5191:     XEiJ.regRn[(XEiJ.regOC >> 9) - (16 - 8)] = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : XEiJ.busRls (efaAnyLong (ea));  //このr[ea]はデータレジスタまたはアドレスレジスタ。右辺でAqが変化する可能性があることに注意
  5192:   }  //irpMoveaLong
  5193: 
  5194:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  5195:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  5196:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  5197:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  5198:   //MOVE.L <ea>,(Aq)                                |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0010_qqq_010_mmm_rrr
  5199:   public static void irpMoveToMMLong () throws M68kException {
  5200:     XEiJ.mpuCycleCount += 12;
  5201:     int ea = XEiJ.regOC & 63;
  5202:     int z = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : XEiJ.busRls (efaAnyLong (ea));  //このr[ea]はデータレジスタまたはアドレスレジスタ。ここでAqが変化する可能性があることに注意
  5203:     XEiJ.busWl (XEiJ.regRn[(XEiJ.regOC >> 9) - (16 - 8)], z);
  5204:     XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X);  //ccr_tst
  5205:   }  //irpMoveToMMLong
  5206: 
  5207:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  5208:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  5209:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  5210:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  5211:   //MOVE.L <ea>,(Aq)+                               |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0010_qqq_011_mmm_rrr
  5212:   public static void irpMoveToMPLong () throws M68kException {
  5213:     XEiJ.mpuCycleCount += 12;
  5214:     int ea = XEiJ.regOC & 63;
  5215:     int z = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : XEiJ.busRls (efaAnyLong (ea));  //このr[ea]はデータレジスタまたはアドレスレジスタ。ここでAqが変化する可能性があることに注意
  5216:     XEiJ.busWl ((XEiJ.regRn[(XEiJ.regOC >> 9) - (16 - 8)] += 4) - 4, z);
  5217:     XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X);  //ccr_tst
  5218:   }  //irpMoveToMPLong
  5219: 
  5220:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  5221:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  5222:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  5223:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  5224:   //MOVE.L <ea>,-(Aq)                               |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0010_qqq_100_mmm_rrr
  5225:   public static void irpMoveToMNLong () throws M68kException {
  5226:     XEiJ.mpuCycleCount += 12;
  5227:     int ea = XEiJ.regOC & 63;
  5228:     int z = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : XEiJ.busRls (efaAnyLong (ea));  //このr[ea]はデータレジスタまたはアドレスレジスタ。ここでAqが変化する可能性があることに注意
  5229:     XEiJ.busWl ((XEiJ.regRn[(XEiJ.regOC >> 9) - (16 - 8)] -= 4), z);
  5230:     XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X);  //ccr_tst
  5231:   }  //irpMoveToMNLong
  5232: 
  5233:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  5234:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  5235:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  5236:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  5237:   //MOVE.L <ea>,(d16,Aq)                            |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0010_qqq_101_mmm_rrr
  5238:   public static void irpMoveToMWLong () throws M68kException {
  5239:     XEiJ.mpuCycleCount += 16;
  5240:     int ea = XEiJ.regOC & 63;
  5241:     int z = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : XEiJ.busRls (efaAnyLong (ea));  //このr[ea]はデータレジスタまたはアドレスレジスタ。ここでAqが変化する可能性があることに注意
  5242:     if (XEiJ.MPU_COMPOUND_POSTINCREMENT) {
  5243:       XEiJ.busWl (XEiJ.regRn[(XEiJ.regOC >> 9) - (16 - 8)]  //ベースレジスタ
  5244:           + XEiJ.busRwse ((XEiJ.regPC += 2) - 2),  //pcws。ワードディスプレースメント
  5245:           z);
  5246:     } else {
  5247:       int t = XEiJ.regPC;
  5248:       XEiJ.regPC = t + 2;
  5249:       XEiJ.busWl (XEiJ.regRn[(XEiJ.regOC >> 9) - (16 - 8)]  //ベースレジスタ
  5250:           + XEiJ.busRwse (t),  //pcws。ワードディスプレースメント
  5251:           z);
  5252:     }
  5253:     XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X);  //ccr_tst
  5254:   }  //irpMoveToMWLong
  5255: 
  5256:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  5257:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  5258:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  5259:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  5260:   //MOVE.L <ea>,(d8,Aq,Rn.wl)                       |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0010_qqq_110_mmm_rrr
  5261:   public static void irpMoveToMXLong () throws M68kException {
  5262:     XEiJ.mpuCycleCount += 18;
  5263:     int ea = XEiJ.regOC & 63;
  5264:     int aqq = (XEiJ.regOC >> 9) - (16 - 8);
  5265:     int z = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : XEiJ.busRls (efaAnyLong (ea));  //このr[ea]はデータレジスタまたはアドレスレジスタ。ここでAqが変化する可能性があることに注意
  5266:     int w;
  5267:     if (XEiJ.MPU_COMPOUND_POSTINCREMENT) {
  5268:       w = XEiJ.busRwze ((XEiJ.regPC += 2) - 2);  //pcwz。拡張ワード
  5269:     } else {
  5270:       w = XEiJ.regPC;
  5271:       XEiJ.regPC = w + 2;
  5272:       w = XEiJ.busRwze (w);  //pcwz。拡張ワード
  5273:     }
  5274:     XEiJ.busWl (XEiJ.regRn[aqq]  //ベースレジスタ
  5275:         + (byte) w  //バイトディスプレースメント
  5276:         + (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] :  //ワードインデックス
  5277:            XEiJ.regRn[w >> 12]),  //ロングインデックス
  5278:         z);
  5279:     XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X);  //ccr_tst
  5280:   }  //irpMoveToMXLong
  5281: 
  5282:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  5283:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  5284:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  5285:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  5286:   //MOVE.L <ea>,(xxx).W                             |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0010_000_111_mmm_rrr
  5287:   public static void irpMoveToZWLong () throws M68kException {
  5288:     XEiJ.mpuCycleCount += 16;
  5289:     int ea = XEiJ.regOC & 63;
  5290:     int z = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : XEiJ.busRls (efaAnyLong (ea));  //このr[ea]はデータレジスタまたはアドレスレジスタ
  5291:     if (XEiJ.MPU_COMPOUND_POSTINCREMENT) {
  5292:       XEiJ.busWl (XEiJ.busRwse ((XEiJ.regPC += 2) - 2),  //pcws
  5293:           z);
  5294:     } else {
  5295:       int t = XEiJ.regPC;
  5296:       XEiJ.regPC = t + 2;
  5297:       XEiJ.busWl (XEiJ.busRwse (t),  //pcws
  5298:           z);
  5299:     }
  5300:     XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X);  //ccr_tst
  5301:   }  //irpMoveToZWLong
  5302: 
  5303:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  5304:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  5305:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  5306:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  5307:   //MOVE.L <ea>,(xxx).L                             |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0010_001_111_mmm_rrr
  5308:   public static void irpMoveToZLLong () throws M68kException {
  5309:     XEiJ.mpuCycleCount += 20;
  5310:     int ea = XEiJ.regOC & 63;
  5311:     int z = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : XEiJ.busRls (efaAnyLong (ea));  //このr[ea]はデータレジスタまたはアドレスレジスタ
  5312:     if (XEiJ.MPU_COMPOUND_POSTINCREMENT) {
  5313:       XEiJ.busWl (XEiJ.busRlse ((XEiJ.regPC += 4) - 4),  //pcls
  5314:           z);
  5315:     } else {
  5316:       int t = XEiJ.regPC;
  5317:       XEiJ.regPC = t + 4;
  5318:       XEiJ.busWl (XEiJ.busRlse (t),  //pcls
  5319:           z);
  5320:     }
  5321:     XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X);  //ccr_tst
  5322:   }  //irpMoveToZLLong
  5323: 
  5324:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  5325:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  5326:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  5327:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  5328:   //MOVE.W <ea>,Dq                                  |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0011_qqq_000_mmm_rrr
  5329:   public static void irpMoveToDRWord () throws M68kException {
  5330:     XEiJ.mpuCycleCount += 4;
  5331:     int ea = XEiJ.regOC & 63;
  5332:     int qqq = XEiJ.regOC >> 9 & 7;
  5333:     int z = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : XEiJ.busRws (efaAnyWord (ea));  //このr[ea]はデータレジスタまたはアドレスレジスタ
  5334:     XEiJ.regRn[qqq] = ~65535 & XEiJ.regRn[qqq] | (char) z;
  5335:     XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (char) z - 1 >> 31 & XEiJ.REG_CCR_Z | ((short) z < 0 ? XEiJ.REG_CCR_N : 0);  //ccr_tst_word
  5336:   }  //irpMoveToDRWord
  5337: 
  5338:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  5339:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  5340:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  5341:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  5342:   //MOVEA.W <ea>,Aq                                 |-|012346|-|-----|-----|DAM+-WXZPI|0011_qqq_001_mmm_rrr
  5343:   //MOVE.W <ea>,Aq                                  |A|012346|-|-----|-----|DAM+-WXZPI|0011_qqq_001_mmm_rrr [MOVEA.W <ea>,Aq]
  5344:   //
  5345:   //MOVEA.W <ea>,Aq
  5346:   //  ワードデータをロングに符号拡張してAqの全体を更新する
  5347:   public static void irpMoveaWord () throws M68kException {
  5348:     XEiJ.mpuCycleCount += 4;
  5349:     int ea = XEiJ.regOC & 63;
  5350:     XEiJ.regRn[XEiJ.regOC >> 9 & 15] = ea < XEiJ.EA_MM ? (short) XEiJ.regRn[ea] : XEiJ.busRws (efaAnyWord (ea));  //符号拡張して32bit全部書き換える。このr[ea]はデータレジスタまたはアドレスレジスタ。右辺でAqが変化する可能性があることに注意
  5351:   }  //irpMoveaWord
  5352: 
  5353:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  5354:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  5355:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  5356:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  5357:   //MOVE.W <ea>,(Aq)                                |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0011_qqq_010_mmm_rrr
  5358:   public static void irpMoveToMMWord () throws M68kException {
  5359:     XEiJ.mpuCycleCount += 8;
  5360:     int ea = XEiJ.regOC & 63;
  5361:     int z = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : XEiJ.busRws (efaAnyWord (ea));  //このr[ea]はデータレジスタまたはアドレスレジスタ。ここでAqが変化する可能性があることに注意
  5362:     XEiJ.busWw (XEiJ.regRn[XEiJ.regOC >> 9 & 15], z);
  5363:     XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (char) z - 1 >> 31 & XEiJ.REG_CCR_Z | ((short) z < 0 ? XEiJ.REG_CCR_N : 0);  //ccr_tst_word
  5364:   }  //irpMoveToMMWord
  5365: 
  5366:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  5367:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  5368:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  5369:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  5370:   //MOVE.W <ea>,(Aq)+                               |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0011_qqq_011_mmm_rrr
  5371:   public static void irpMoveToMPWord () throws M68kException {
  5372:     XEiJ.mpuCycleCount += 8;
  5373:     int ea = XEiJ.regOC & 63;
  5374:     int z = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : XEiJ.busRws (efaAnyWord (ea));  //このr[ea]はデータレジスタまたはアドレスレジスタ。ここでAqが変化する可能性があることに注意
  5375:     XEiJ.busWw ((XEiJ.regRn[XEiJ.regOC >> 9 & 15] += 2) - 2, z);
  5376:     XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (char) z - 1 >> 31 & XEiJ.REG_CCR_Z | ((short) z < 0 ? XEiJ.REG_CCR_N : 0);  //ccr_tst_word
  5377:   }  //irpMoveToMPWord
  5378: 
  5379:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  5380:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  5381:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  5382:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  5383:   //MOVE.W <ea>,-(Aq)                               |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0011_qqq_100_mmm_rrr
  5384:   public static void irpMoveToMNWord () throws M68kException {
  5385:     XEiJ.mpuCycleCount += 8;
  5386:     int ea = XEiJ.regOC & 63;
  5387:     int z = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : XEiJ.busRws (efaAnyWord (ea));  //このr[ea]はデータレジスタまたはアドレスレジスタ。ここでAqが変化する可能性があることに注意
  5388:     XEiJ.busWw ((XEiJ.regRn[XEiJ.regOC >> 9 & 15] -= 2), z);
  5389:     XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (char) z - 1 >> 31 & XEiJ.REG_CCR_Z | ((short) z < 0 ? XEiJ.REG_CCR_N : 0);  //ccr_tst_word
  5390:   }  //irpMoveToMNWord
  5391: 
  5392:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  5393:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  5394:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  5395:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  5396:   //MOVE.W <ea>,(d16,Aq)                            |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0011_qqq_101_mmm_rrr
  5397:   public static void irpMoveToMWWord () throws M68kException {
  5398:     XEiJ.mpuCycleCount += 12;
  5399:     int ea = XEiJ.regOC & 63;
  5400:     int aqq = XEiJ.regOC >> 9 & 15;
  5401:     int z = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : XEiJ.busRws (efaAnyWord (ea));  //このr[ea]はデータレジスタまたはアドレスレジスタ。ここでAqが変化する可能性があることに注意
  5402:     if (XEiJ.MPU_COMPOUND_POSTINCREMENT) {
  5403:       XEiJ.busWw (XEiJ.regRn[aqq]  //ベースレジスタ
  5404:           + XEiJ.busRwse ((XEiJ.regPC += 2) - 2),  //pcws。ワードディスプレースメント
  5405:           z);
  5406:     } else {
  5407:       int t = XEiJ.regPC;
  5408:       XEiJ.regPC = t + 2;
  5409:       XEiJ.busWw (XEiJ.regRn[aqq]  //ベースレジスタ
  5410:           + XEiJ.busRwse (t),  //pcws。ワードディスプレースメント
  5411:           z);
  5412:     }
  5413:     XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (char) z - 1 >> 31 & XEiJ.REG_CCR_Z | ((short) z < 0 ? XEiJ.REG_CCR_N : 0);  //ccr_tst_word
  5414:   }  //irpMoveToMWWord
  5415: 
  5416:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  5417:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  5418:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  5419:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  5420:   //MOVE.W <ea>,(d8,Aq,Rn.wl)                       |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0011_qqq_110_mmm_rrr
  5421:   public static void irpMoveToMXWord () throws M68kException {
  5422:     XEiJ.mpuCycleCount += 14;
  5423:     int ea = XEiJ.regOC & 63;
  5424:     int aqq = XEiJ.regOC >> 9 & 15;
  5425:     int z = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : XEiJ.busRws (efaAnyWord (ea));  //このr[ea]はデータレジスタまたはアドレスレジスタ。ここでAqが変化する可能性があることに注意
  5426:     int w;
  5427:     if (XEiJ.MPU_COMPOUND_POSTINCREMENT) {
  5428:       w = XEiJ.busRwze ((XEiJ.regPC += 2) - 2);  //pcwz。拡張ワード
  5429:     } else {
  5430:       w = XEiJ.regPC;
  5431:       XEiJ.regPC = w + 2;
  5432:       w = XEiJ.busRwze (w);  //pcwz。拡張ワード
  5433:     }
  5434:     XEiJ.busWw (XEiJ.regRn[aqq]  //ベースレジスタ
  5435:         + (byte) w  //バイトディスプレースメント
  5436:         + (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] :  //ワードインデックス
  5437:            XEiJ.regRn[w >> 12]),  //ロングインデックス
  5438:         z);
  5439:     XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (char) z - 1 >> 31 & XEiJ.REG_CCR_Z | ((short) z < 0 ? XEiJ.REG_CCR_N : 0);  //ccr_tst_word
  5440:   }  //irpMoveToMXWord
  5441: 
  5442:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  5443:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  5444:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  5445:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  5446:   //MOVE.W <ea>,(xxx).W                             |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0011_000_111_mmm_rrr
  5447:   public static void irpMoveToZWWord () throws M68kException {
  5448:     XEiJ.mpuCycleCount += 12;
  5449:     int ea = XEiJ.regOC & 63;
  5450:     int z = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : XEiJ.busRws (efaAnyWord (ea));  //このr[ea]はデータレジスタまたはアドレスレジスタ
  5451:     if (XEiJ.MPU_COMPOUND_POSTINCREMENT) {
  5452:       XEiJ.busWw (XEiJ.busRwse ((XEiJ.regPC += 2) - 2),  //pcws
  5453:           z);
  5454:     } else {
  5455:       int t = XEiJ.regPC;
  5456:       XEiJ.regPC = t + 2;
  5457:       XEiJ.busWw (XEiJ.busRwse (t),  //pcws
  5458:           z);
  5459:     }
  5460:     XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (char) z - 1 >> 31 & XEiJ.REG_CCR_Z | ((short) z < 0 ? XEiJ.REG_CCR_N : 0);  //ccr_tst_word
  5461:   }  //irpMoveToZWWord
  5462: 
  5463:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  5464:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  5465:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  5466:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  5467:   //MOVE.W <ea>,(xxx).L                             |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0011_001_111_mmm_rrr
  5468:   public static void irpMoveToZLWord () throws M68kException {
  5469:     XEiJ.mpuCycleCount += 16;
  5470:     int ea = XEiJ.regOC & 63;
  5471:     int z = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : XEiJ.busRws (efaAnyWord (ea));  //このr[ea]はデータレジスタまたはアドレスレジスタ
  5472:     if (XEiJ.MPU_COMPOUND_POSTINCREMENT) {
  5473:       XEiJ.busWw (XEiJ.busRlse ((XEiJ.regPC += 4) - 4),  //pcls
  5474:           z);
  5475:     } else {
  5476:       int t = XEiJ.regPC;
  5477:       XEiJ.regPC = t + 4;
  5478:       XEiJ.busWw (XEiJ.busRlse (t),  //pcls
  5479:           z);
  5480:     }
  5481:     XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (char) z - 1 >> 31 & XEiJ.REG_CCR_Z | ((short) z < 0 ? XEiJ.REG_CCR_N : 0);  //ccr_tst_word
  5482:   }  //irpMoveToZLWord
  5483: 
  5484:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  5485:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  5486:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  5487:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  5488:   //NEGX.B <ea>                                     |-|012346|-|*UUUU|*****|D M+-WXZ  |0100_000_000_mmm_rrr
  5489:   public static void irpNegxByte () throws M68kException {
  5490:     int ea = XEiJ.regOC & 63;
  5491:     int y;
  5492:     int z;
  5493:     if (ea < XEiJ.EA_AR) {  //NEGX.B Dr
  5494:       XEiJ.mpuCycleCount += 4;
  5495:       z = (byte) (XEiJ.regRn[ea] = ~0xff & (y = XEiJ.regRn[ea]) | 0xff & -(y = (byte) y) - (XEiJ.regCCR >> 4));  //Xの左側はすべて0なのでCCR_X&を省略
  5496:     } else {  //NEGX.B <mem>
  5497:       XEiJ.mpuCycleCount += 8;
  5498:       int a = efaMltByte (ea);
  5499:       XEiJ.busWb (a, z = (byte) (-(y = XEiJ.busRbs (a)) - (XEiJ.regCCR >> 4)));  //Xの左側はすべて0なのでCCR_X&を省略
  5500:     }
  5501:     XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_Z : 0) |
  5502:            (y & z) >>> 31 << 1 |
  5503:            (y | z) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C));  //ccr_negx
  5504:   }  //irpNegxByte
  5505: 
  5506:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  5507:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  5508:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  5509:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  5510:   //NEGX.W <ea>                                     |-|012346|-|*UUUU|*****|D M+-WXZ  |0100_000_001_mmm_rrr
  5511:   public static void irpNegxWord () throws M68kException {
  5512:     int ea = XEiJ.regOC & 63;
  5513:     int y;
  5514:     int z;
  5515:     if (ea < XEiJ.EA_AR) {  //NEGX.W Dr
  5516:       XEiJ.mpuCycleCount += 4;
  5517:       z = (short) (XEiJ.regRn[ea] = ~0xffff & (y = XEiJ.regRn[ea]) | (char) (-(y = (short) y) - (XEiJ.regCCR >> 4)));  //Xの左側はすべて0なのでCCR_X&を省略
  5518:     } else {  //NEGX.W <mem>
  5519:       XEiJ.mpuCycleCount += 8;
  5520:       int a = efaMltWord (ea);
  5521:       XEiJ.busWw (a, z = (short) (-(y = XEiJ.busRws (a)) - (XEiJ.regCCR >> 4)));  //Xの左側はすべて0なのでCCR_X&を省略
  5522:     }
  5523:     XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_Z : 0) |
  5524:            (y & z) >>> 31 << 1 |
  5525:            (y | z) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C));  //ccr_negx
  5526:   }  //irpNegxWord
  5527: 
  5528:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  5529:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  5530:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  5531:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  5532:   //NEGX.L <ea>                                     |-|012346|-|*UUUU|*****|D M+-WXZ  |0100_000_010_mmm_rrr
  5533:   public static void irpNegxLong () throws M68kException {
  5534:     int ea = XEiJ.regOC & 63;
  5535:     int y;
  5536:     int z;
  5537:     if (ea < XEiJ.EA_AR) {  //NEGX.L Dr
  5538:       XEiJ.mpuCycleCount += 6;
  5539:       XEiJ.regRn[ea] = z = -(y = XEiJ.regRn[ea]) - (XEiJ.regCCR >> 4);  //Xの左側はすべて0なのでCCR_X&を省略
  5540:     } else {  //NEGX.L <mem>
  5541:       XEiJ.mpuCycleCount += 12;
  5542:       int a = efaMltLong (ea);
  5543:       XEiJ.busWl (a, z = -(y = XEiJ.busRls (a)) - (XEiJ.regCCR >> 4));  //Xの左側はすべて0なのでCCR_X&を省略
  5544:     }
  5545:     XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_Z : 0) |
  5546:            (y & z) >>> 31 << 1 |
  5547:            (y | z) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C));  //ccr_negx
  5548:   }  //irpNegxLong
  5549: 
  5550:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  5551:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  5552:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  5553:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  5554:   //MOVE.W SR,<ea>                                  |-|0-----|-|*****|-----|D M+-WXZ  |0100_000_011_mmm_rrr (68000 and 68008 read before move)
  5555:   public static void irpMoveFromSR () throws M68kException {
  5556:     //MC68000では特権命令ではない
  5557:     int ea = XEiJ.regOC & 63;
  5558:     if (ea < XEiJ.EA_AR) {  //MOVE.W SR,Dr
  5559:       XEiJ.mpuCycleCount += 6;
  5560:       XEiJ.regRn[ea] = ~0xffff & XEiJ.regRn[ea] | XEiJ.regSRT1 | XEiJ.regSRS | XEiJ.regSRI | XEiJ.regCCR;
  5561:     } else {  //MOVE.W SR,<mem>
  5562:       //! 軽量化。MOVE from SRによる直後の命令のイミディエイトオペランドの自己書き換えが直後に反映されてしまう
  5563:       //  MC68000でFEファンクションコールやSXコールのようなCCRを変化させる例外処理ルーチンの出口を次のように書くと、
  5564:       //  自己書き換えが直後に反映されずイミディエイトオペランドの領域がバッファになって前回の結果を返すことになるので期待通りに動作しない
  5565:       //              move.w  sr,@f+2
  5566:       //      @@:     move.b  #0,(1,sp)
  5567:       //              rte
  5568:       //  これが期待通りに動作してしまったらMC68000を正しくエミュレートできていないということになる
  5569:       //  https://stdkmd.net/bbs/page2.htm#comment134
  5570:       XEiJ.mpuCycleCount += 8;
  5571:       int a = efaMltWord (ea);
  5572:       if (XEiJ.MPU_OMIT_EXTRA_READ) {
  5573:         //! 軽量化。MC68000では書き込む前にリードが入るが省略する
  5574:       } else {
  5575:         XEiJ.busRws (a);
  5576:       }
  5577:       XEiJ.busWw (a, XEiJ.regSRT1 | XEiJ.regSRS | XEiJ.regSRI | XEiJ.regCCR);
  5578:     }
  5579:   }  //irpMoveFromSR
  5580: 
  5581:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  5582:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  5583:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  5584:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  5585:   //CHK.W <ea>,Dq                                   |-|012346|-|-UUUU|-*UUU|D M+-WXZPI|0100_qqq_110_mmm_rrr
  5586:   public static void irpChkWord () throws M68kException {
  5587:     XEiJ.mpuCycleCount += 10;
  5588:     int ea = XEiJ.regOC & 63;
  5589:     int x = ea < XEiJ.EA_AR ? (short) XEiJ.regRn[ea] : XEiJ.busRws (efaAnyWord (ea));
  5590:     int y = (short) XEiJ.regRn[XEiJ.regOC >> 9 & 7];
  5591:     int z = (short) (x - y);
  5592:     XEiJ.regCCR = (XEiJ.regCCR & XEiJ.REG_CCR_X |
  5593:                    (y < 0 ? XEiJ.REG_CCR_N : 0) |
  5594:                    (y == 0 ? XEiJ.REG_CCR_Z : 0) |
  5595:                    ((x ^ y) & (x ^ z)) >>> 31 << 1 |
  5596:                    (x & (y ^ z) ^ (y | z)) >>> 31);
  5597:     if (y < 0 || x < y) {
  5598:       XEiJ.mpuCycleCount += 38 - 10;
  5599:       M68kException.m6eNumber = M68kException.M6E_CHK_INSTRUCTION;
  5600:       throw M68kException.m6eSignal;
  5601:     }
  5602:   }  //irpChkWord
  5603: 
  5604:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  5605:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  5606:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  5607:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  5608:   //LEA.L <ea>,Aq                                   |-|012346|-|-----|-----|  M  WXZP |0100_qqq_111_mmm_rrr
  5609:   public static void irpLea () throws M68kException {
  5610:     //XEiJ.mpuCycleCount += 4 - 4;
  5611:     XEiJ.regRn[(XEiJ.regOC >> 9) - (32 - 8)] = efaLeaPea (XEiJ.regOC & 63);
  5612:   }  //irpLea
  5613: 
  5614:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  5615:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  5616:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  5617:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  5618:   //CLR.B <ea>                                      |-|012346|-|-UUUU|-0100|D M+-WXZ  |0100_001_000_mmm_rrr (68000 and 68008 read before clear)
  5619:   public static void irpClrByte () throws M68kException {
  5620:     int ea = XEiJ.regOC & 63;
  5621:     if (ea < XEiJ.EA_AR) {  //CLR.B Dr
  5622:       XEiJ.mpuCycleCount += 4;
  5623:       XEiJ.regRn[ea] &= ~0xff;
  5624:     } else {  //CLR.B <mem>
  5625:       XEiJ.mpuCycleCount += 8;
  5626:       //MC68000のCLRはリードしてからライトする
  5627:       if (XEiJ.MPU_OMIT_EXTRA_READ) {
  5628:         //! 軽量化。リードを省略する
  5629:         XEiJ.busWb (efaMltByte (ea), 0);
  5630:       } else {
  5631:         int a = efaMltByte (ea);
  5632:         XEiJ.busRbs (a);
  5633:         XEiJ.busWb (a, 0);
  5634:       }
  5635:     }
  5636:     XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z;  //ccr_clr
  5637:   }  //irpClrByte
  5638: 
  5639:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  5640:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  5641:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  5642:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  5643:   //CLR.W <ea>                                      |-|012346|-|-UUUU|-0100|D M+-WXZ  |0100_001_001_mmm_rrr (68000 and 68008 read before clear)
  5644:   public static void irpClrWord () throws M68kException {
  5645:     int ea = XEiJ.regOC & 63;
  5646:     if (ea < XEiJ.EA_AR) {  //CLR.W Dr
  5647:       XEiJ.mpuCycleCount += 4;
  5648:       XEiJ.regRn[ea] &= ~0xffff;
  5649:     } else {  //CLR.W <mem>
  5650:       XEiJ.mpuCycleCount += 8;
  5651:       //MC68000のCLRはリードしてからライトする
  5652:       if (XEiJ.MPU_OMIT_EXTRA_READ) {
  5653:         //! 軽量化。リードを省略する
  5654:         XEiJ.busWw (efaMltWord (ea), 0);
  5655:       } else {
  5656:         int a = efaMltWord (ea);
  5657:         XEiJ.busRws (a);
  5658:         XEiJ.busWw (a, 0);
  5659:       }
  5660:     }
  5661:     XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z;  //ccr_clr
  5662:   }  //irpClrWord
  5663: 
  5664:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  5665:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  5666:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  5667:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  5668:   //CLR.L <ea>                                      |-|012346|-|-UUUU|-0100|D M+-WXZ  |0100_001_010_mmm_rrr (68000 and 68008 read before clear)
  5669:   public static void irpClrLong () throws M68kException {
  5670:     int ea = XEiJ.regOC & 63;
  5671:     if (ea < XEiJ.EA_AR) {  //CLR.L Dr
  5672:       XEiJ.mpuCycleCount += 6;
  5673:       XEiJ.regRn[ea] = 0;
  5674:     } else {  //CLR.L <mem>
  5675:       XEiJ.mpuCycleCount += 12;
  5676:       //MC68000のCLRはリードしてからライトする
  5677:       if (XEiJ.MPU_OMIT_EXTRA_READ) {
  5678:         //! 軽量化。リードを省略する
  5679:         XEiJ.busWl (efaMltLong (ea), 0);
  5680:       } else {
  5681:         int a = efaMltLong (ea);
  5682:         XEiJ.busRls (a);
  5683:         XEiJ.busWl (a, 0);
  5684:       }
  5685:     }
  5686:     XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z;  //ccr_clr
  5687:   }  //irpClrLong
  5688: 
  5689:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  5690:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  5691:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  5692:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  5693:   //NEG.B <ea>                                      |-|012346|-|UUUUU|*****|D M+-WXZ  |0100_010_000_mmm_rrr
  5694:   public static void irpNegByte () throws M68kException {
  5695:     int ea = XEiJ.regOC & 63;
  5696:     int y;
  5697:     int z;
  5698:     if (ea < XEiJ.EA_AR) {  //NEG.B Dr
  5699:       XEiJ.mpuCycleCount += 4;
  5700:       z = (byte) (XEiJ.regRn[ea] = ~0xff & (y = XEiJ.regRn[ea]) | 0xff & -(y = (byte) y));
  5701:     } else {  //NEG.B <mem>
  5702:       XEiJ.mpuCycleCount += 8;
  5703:       int a = efaMltByte (ea);
  5704:       XEiJ.busWb (a, z = (byte) -(y = XEiJ.busRbs (a)));
  5705:     }
  5706:     XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) |
  5707:            (y & z) >>> 31 << 1 |
  5708:            (y | z) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C));  //ccr_neg
  5709:   }  //irpNegByte
  5710: 
  5711:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  5712:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  5713:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  5714:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  5715:   //NEG.W <ea>                                      |-|012346|-|UUUUU|*****|D M+-WXZ  |0100_010_001_mmm_rrr
  5716:   public static void irpNegWord () throws M68kException {
  5717:     int ea = XEiJ.regOC & 63;
  5718:     int y;
  5719:     int z;
  5720:     if (ea < XEiJ.EA_AR) {  //NEG.W Dr
  5721:       XEiJ.mpuCycleCount += 4;
  5722:       z = (short) (XEiJ.regRn[ea] = ~0xffff & (y = XEiJ.regRn[ea]) | (char) -(y = (short) y));
  5723:     } else {  //NEG.W <mem>
  5724:       XEiJ.mpuCycleCount += 8;
  5725:       int a = efaMltWord (ea);
  5726:       XEiJ.busWw (a, z = (short) -(y = XEiJ.busRws (a)));
  5727:     }
  5728:     XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) |
  5729:            (y & z) >>> 31 << 1 |
  5730:            (y | z) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C));  //ccr_neg
  5731:   }  //irpNegWord
  5732: 
  5733:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  5734:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  5735:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  5736:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  5737:   //NEG.L <ea>                                      |-|012346|-|UUUUU|*****|D M+-WXZ  |0100_010_010_mmm_rrr
  5738:   public static void irpNegLong () throws M68kException {
  5739:     int ea = XEiJ.regOC & 63;
  5740:     int y;
  5741:     int z;
  5742:     if (ea < XEiJ.EA_AR) {  //NEG.L Dr
  5743:       XEiJ.mpuCycleCount += 6;
  5744:       XEiJ.regRn[ea] = z = -(y = XEiJ.regRn[ea]);
  5745:     } else {  //NEG.L <mem>
  5746:       XEiJ.mpuCycleCount += 12;
  5747:       int a = efaMltLong (ea);
  5748:       XEiJ.busWl (a, z = -(y = XEiJ.busRls (a)));
  5749:     }
  5750:     XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) |
  5751:            (y & z) >>> 31 << 1 |
  5752:            (y | z) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C));  //ccr_neg
  5753:   }  //irpNegLong
  5754: 
  5755:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  5756:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  5757:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  5758:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  5759:   //MOVE.W <ea>,CCR                                 |-|012346|-|UUUUU|*****|D M+-WXZPI|0100_010_011_mmm_rrr
  5760:   public static void irpMoveToCCR () throws M68kException {
  5761:     XEiJ.mpuCycleCount += 12;
  5762:     int ea = XEiJ.regOC & 63;
  5763:     XEiJ.regCCR = XEiJ.REG_CCR_MASK & (ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : XEiJ.busRws (efaAnyWord (ea)));
  5764:   }  //irpMoveToCCR
  5765: 
  5766:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  5767:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  5768:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  5769:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  5770:   //NOT.B <ea>                                      |-|012346|-|-UUUU|-**00|D M+-WXZ  |0100_011_000_mmm_rrr
  5771:   public static void irpNotByte () throws M68kException {
  5772:     int ea = XEiJ.regOC & 63;
  5773:     int z;
  5774:     if (ea < XEiJ.EA_AR) {  //NOT.B Dr
  5775:       XEiJ.mpuCycleCount += 4;
  5776:       z = XEiJ.regRn[ea] ^= 255;  //0拡張してからEOR
  5777:     } else {  //NOT.B <mem>
  5778:       XEiJ.mpuCycleCount += 8;
  5779:       int a = efaMltByte (ea);
  5780:       XEiJ.busWb (a, z = ~XEiJ.busRbs (a));
  5781:     }
  5782:     XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & z];  //ccr_tst_byte
  5783:   }  //irpNotByte
  5784: 
  5785:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  5786:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  5787:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  5788:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  5789:   //NOT.W <ea>                                      |-|012346|-|-UUUU|-**00|D M+-WXZ  |0100_011_001_mmm_rrr
  5790:   public static void irpNotWord () throws M68kException {
  5791:     int ea = XEiJ.regOC & 63;
  5792:     int z;
  5793:     if (ea < XEiJ.EA_AR) {  //NOT.W Dr
  5794:       XEiJ.mpuCycleCount += 4;
  5795:       z = XEiJ.regRn[ea] ^= 65535;  //0拡張してからEOR
  5796:     } else {  //NOT.W <mem>
  5797:       XEiJ.mpuCycleCount += 8;
  5798:       int a = efaMltWord (ea);
  5799:       XEiJ.busWw (a, z = ~XEiJ.busRws (a));
  5800:     }
  5801:     XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (char) z - 1 >> 31 & XEiJ.REG_CCR_Z | ((short) z < 0 ? XEiJ.REG_CCR_N : 0);  //ccr_tst_word
  5802:   }  //irpNotWord
  5803: 
  5804:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  5805:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  5806:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  5807:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  5808:   //NOT.L <ea>                                      |-|012346|-|-UUUU|-**00|D M+-WXZ  |0100_011_010_mmm_rrr
  5809:   public static void irpNotLong () throws M68kException {
  5810:     int ea = XEiJ.regOC & 63;
  5811:     int z;
  5812:     if (ea < XEiJ.EA_AR) {  //NOT.L Dr
  5813:       XEiJ.mpuCycleCount += 6;
  5814:       z = XEiJ.regRn[ea] ^= 0xffffffff;
  5815:     } else {  //NOT.L <mem>
  5816:       XEiJ.mpuCycleCount += 12;
  5817:       int a = efaMltLong (ea);
  5818:       XEiJ.busWl (a, z = ~XEiJ.busRls (a));
  5819:     }
  5820:     XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X);  //ccr_tst
  5821:   }  //irpNotLong
  5822: 
  5823:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  5824:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  5825:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  5826:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  5827:   //MOVE.W <ea>,SR                                  |-|012346|P|UUUUU|*****|D M+-WXZPI|0100_011_011_mmm_rrr
  5828:   public static void irpMoveToSR () throws M68kException {
  5829:     if (XEiJ.regSRS == 0) {  //ユーザモードのとき
  5830:       XEiJ.mpuCycleCount += 34;
  5831:       M68kException.m6eNumber = M68kException.M6E_PRIVILEGE_VIOLATION;
  5832:       throw M68kException.m6eSignal;
  5833:     }
  5834:     //以下はスーパーバイザモード
  5835:     XEiJ.mpuCycleCount += 12;
  5836:     int ea = XEiJ.regOC & 63;
  5837:     irpSetSR (ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : XEiJ.busRwz (efaAnyWord (ea)));  //特権違反チェックが先
  5838:   }  //irpMoveToSR
  5839: 
  5840:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  5841:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  5842:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  5843:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  5844:   //NBCD.B <ea>                                     |-|012346|-|UUUUU|*U*U*|D M+-WXZ  |0100_100_000_mmm_rrr
  5845:   public static void irpNbcd () throws M68kException {
  5846:     int ea = XEiJ.regOC & 63;
  5847:     if (ea < XEiJ.EA_AR) {  //NBCD.B Dr
  5848:       XEiJ.mpuCycleCount += 6;
  5849:       XEiJ.regRn[ea] = ~0xff & XEiJ.regRn[ea] | irpSbcd (0, XEiJ.regRn[ea]);
  5850:     } else {  //NBCD.B <mem>
  5851:       XEiJ.mpuCycleCount += 8;
  5852:       int a = efaMltByte (ea);
  5853:       XEiJ.busWb (a, irpSbcd (0, XEiJ.busRbs (a)));
  5854:     }
  5855:   }  //irpNbcd
  5856: 
  5857:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  5858:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  5859:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  5860:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  5861:   //SWAP.W Dr                                       |-|012346|-|-UUUU|-**00|D         |0100_100_001_000_rrr
  5862:   //PEA.L <ea>                                      |-|012346|-|-----|-----|  M  WXZP |0100_100_001_mmm_rrr
  5863:   public static void irpPea () throws M68kException {
  5864:     int ea = XEiJ.regOC & 63;
  5865:     if (ea < XEiJ.EA_AR) {  //SWAP.W Dr
  5866:       XEiJ.mpuCycleCount += 4;
  5867:       int x;
  5868:       int z;
  5869:       XEiJ.regRn[ea] = z = (x = XEiJ.regRn[ea]) << 16 | x >>> 16;
  5870:       //上位ワードと下位ワードを入れ替えた後のDrをロングでテストする
  5871:       XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X);  //ccr_tst
  5872:     } else {  //PEA.L <ea>
  5873:       XEiJ.mpuCycleCount += 12 - 4;
  5874:       int a = efaLeaPea (ea);  //BKPT #<data>はここでillegal instructionになる
  5875:       XEiJ.busWl (XEiJ.regRn[15] -= 4, a);  //pushl。評価順序に注意。wl(r[15]-=4,eaz_leapea(ea))は不可
  5876:     }
  5877:   }  //irpPea
  5878: 
  5879:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  5880:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  5881:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  5882:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  5883:   //EXT.W Dr                                        |-|012346|-|-UUUU|-**00|D         |0100_100_010_000_rrr
  5884:   //MOVEM.W <list>,<ea>                             |-|012346|-|-----|-----|  M -WXZ  |0100_100_010_mmm_rrr-llllllllllllllll
  5885:   public static void irpMovemToMemWord () throws M68kException {
  5886:     int ea = XEiJ.regOC & 63;
  5887:     if (ea < XEiJ.EA_AR) {  //EXT.W Dr
  5888:       XEiJ.mpuCycleCount += 4;
  5889:       int z;
  5890:       XEiJ.regRn[ea] = ~0xffff & (z = XEiJ.regRn[ea]) | (char) (z = (byte) z);
  5891:       XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X);  //ccr_tst
  5892:     } else {  //MOVEM.W <list>,<ea>
  5893:       int l = XEiJ.busRwze (XEiJ.regPC);  //pcwze。レジスタリスト。ゼロ拡張
  5894:       XEiJ.regPC += 2;
  5895:       if (ea >> 3 == XEiJ.MMM_MN) {  //-(Ar)
  5896:         //MOVEM.wl <list>,-(Ar)で<list>にArが含まれているとき、000/010は命令開始時のArを、020/030/040/060は命令開始時のAr-オペレーションサイズをメモリに書き込む
  5897:         //転送するレジスタが0個のときArは変化しない
  5898:         int arr = ea - (XEiJ.EA_MN - 8);
  5899:         int a = XEiJ.regRn[arr];
  5900:         if ((a & 1) != 0 && l != 0) {  //奇数アドレスで1ワード以上転送する
  5901:           M68kException.m6eNumber = M68kException.M6E_ADDRESS_ERROR;
  5902:           M68kException.m6eAddress = a;
  5903:           M68kException.m6eDirection = XEiJ.MPU_WR_WRITE;
  5904:           M68kException.m6eSize = XEiJ.MPU_SS_WORD;
  5905:           throw M68kException.m6eSignal;
  5906:         }
  5907:         int t = a;
  5908:         if (XEiJ.IRP_MOVEM_MAINMEMORY &&  //000のときMOVEMでメインメモリを特別扱いにする
  5909:             (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a - 2 >>> XEiJ.BUS_PAGE_BITS] == MemoryMappedDevice.MMD_MMR &&  //メインメモリ
  5910:             2 * 16 <= (a & XEiJ.BUS_PAGE_SIZE - 1)) {  //16個転送してもページを跨がない
  5911:           a &= XEiJ.BUS_MOTHER_MASK;
  5912:           if (XEiJ.IRP_MOVEM_EXPAND) {  //16回展開する
  5913:             if ((l & 0x0001) != 0) {
  5914:               a -= 2;
  5915:               int x = XEiJ.regRn[15];
  5916:               MainMemory.mmrM8[a    ] = (byte) (x >> 8);
  5917:               MainMemory.mmrM8[a + 1] = (byte)  x;
  5918:             }
  5919:             if ((l & 0x0002) != 0) {
  5920:               a -= 2;
  5921:               int x = XEiJ.regRn[14];
  5922:               MainMemory.mmrM8[a    ] = (byte) (x >> 8);
  5923:               MainMemory.mmrM8[a + 1] = (byte)  x;
  5924:             }
  5925:             if ((l & 0x0004) != 0) {
  5926:               a -= 2;
  5927:               int x = XEiJ.regRn[13];
  5928:               MainMemory.mmrM8[a    ] = (byte) (x >> 8);
  5929:               MainMemory.mmrM8[a + 1] = (byte)  x;
  5930:             }
  5931:             if ((l & 0x0008) != 0) {
  5932:               a -= 2;
  5933:               int x = XEiJ.regRn[12];
  5934:               MainMemory.mmrM8[a    ] = (byte) (x >> 8);
  5935:               MainMemory.mmrM8[a + 1] = (byte)  x;
  5936:             }
  5937:             if ((l & 0x0010) != 0) {
  5938:               a -= 2;
  5939:               int x = XEiJ.regRn[11];
  5940:               MainMemory.mmrM8[a    ] = (byte) (x >> 8);
  5941:               MainMemory.mmrM8[a + 1] = (byte)  x;
  5942:             }
  5943:             if ((l & 0x0020) != 0) {
  5944:               a -= 2;
  5945:               int x = XEiJ.regRn[10];
  5946:               MainMemory.mmrM8[a    ] = (byte) (x >> 8);
  5947:               MainMemory.mmrM8[a + 1] = (byte)  x;
  5948:             }
  5949:             if ((l & 0x0040) != 0) {
  5950:               a -= 2;
  5951:               int x = XEiJ.regRn[ 9];
  5952:               MainMemory.mmrM8[a    ] = (byte) (x >> 8);
  5953:               MainMemory.mmrM8[a + 1] = (byte)  x;
  5954:             }
  5955:             if ((byte) l < 0) {  //(l & 0x0080) != 0
  5956:               a -= 2;
  5957:               int x = XEiJ.regRn[ 8];
  5958:               MainMemory.mmrM8[a    ] = (byte) (x >> 8);
  5959:               MainMemory.mmrM8[a + 1] = (byte)  x;
  5960:             }
  5961:             if ((l & 0x0100) != 0) {
  5962:               a -= 2;
  5963:               int x = XEiJ.regRn[ 7];
  5964:               MainMemory.mmrM8[a    ] = (byte) (x >> 8);
  5965:               MainMemory.mmrM8[a + 1] = (byte)  x;
  5966:             }
  5967:             if ((l & 0x0200) != 0) {
  5968:               a -= 2;
  5969:               int x = XEiJ.regRn[ 6];
  5970:               MainMemory.mmrM8[a    ] = (byte) (x >> 8);
  5971:               MainMemory.mmrM8[a + 1] = (byte)  x;
  5972:             }
  5973:             if ((l & 0x0400) != 0) {
  5974:               a -= 2;
  5975:               int x = XEiJ.regRn[ 5];
  5976:               MainMemory.mmrM8[a    ] = (byte) (x >> 8);
  5977:               MainMemory.mmrM8[a + 1] = (byte)  x;
  5978:             }
  5979:             if ((l & 0x0800) != 0) {
  5980:               a -= 2;
  5981:               int x = XEiJ.regRn[ 4];
  5982:               MainMemory.mmrM8[a    ] = (byte) (x >> 8);
  5983:               MainMemory.mmrM8[a + 1] = (byte)  x;
  5984:             }
  5985:             if ((l & 0x1000) != 0) {
  5986:               a -= 2;
  5987:               int x = XEiJ.regRn[ 3];
  5988:               MainMemory.mmrM8[a    ] = (byte) (x >> 8);
  5989:               MainMemory.mmrM8[a + 1] = (byte)  x;
  5990:             }
  5991:             if ((l & 0x2000) != 0) {
  5992:               a -= 2;
  5993:               int x = XEiJ.regRn[ 2];
  5994:               MainMemory.mmrM8[a    ] = (byte) (x >> 8);
  5995:               MainMemory.mmrM8[a + 1] = (byte)  x;
  5996:             }
  5997:             if ((l & 0x4000) != 0) {
  5998:               a -= 2;
  5999:               int x = XEiJ.regRn[ 1];
  6000:               MainMemory.mmrM8[a    ] = (byte) (x >> 8);
  6001:               MainMemory.mmrM8[a + 1] = (byte)  x;
  6002:             }
  6003:             if ((short) l < 0) {  //(l & 0x8000) != 0
  6004:               a -= 2;
  6005:               int x = XEiJ.regRn[ 0];
  6006:               MainMemory.mmrM8[a    ] = (byte) (x >> 8);
  6007:               MainMemory.mmrM8[a + 1] = (byte)  x;
  6008:             }
  6009:           } else if (XEiJ.IRP_MOVEM_LOOP) {  //16回ループする。コンパイラが展開する
  6010:             for (int i = 15; i >= 0; i--) {
  6011:               if ((l & 0x8000 >>> i) != 0) {
  6012:                 a -= 2;
  6013:                 int x = XEiJ.regRn[i];
  6014:                 MainMemory.mmrM8[a    ] = (byte) (x >> 8);
  6015:                 MainMemory.mmrM8[a + 1] = (byte)  x;
  6016:               }
  6017:             }
  6018:           } else if (XEiJ.IRP_MOVEM_SHIFT_LEFT) {  //0になるまで左にシフトする
  6019:             l = XEiJ.MPU_BITREV_TABLE_0[l & 2047] | XEiJ.MPU_BITREV_TABLE_1[l << 10 >>> 21];  //Integer.reverse(l)
  6020:             for (int i = 15; l != 0; i--, l <<= 1) {
  6021:               if (l < 0) {
  6022:                 a -= 2;
  6023:                 int x = XEiJ.regRn[i];
  6024:                 MainMemory.mmrM8[a    ] = (byte) (x >> 8);
  6025:                 MainMemory.mmrM8[a + 1] = (byte)  x;
  6026:               }
  6027:             }
  6028:           } else if (XEiJ.IRP_MOVEM_SHIFT_RIGHT) {  //0になるまで右にシフトする
  6029:             for (int i = 15; l != 0; i--, l >>>= 1) {
  6030:               if ((l & 1) != 0) {
  6031:                 a -= 2;
  6032:                 int x = XEiJ.regRn[i];
  6033:                 MainMemory.mmrM8[a    ] = (byte) (x >> 8);
  6034:                 MainMemory.mmrM8[a + 1] = (byte)  x;
  6035:               }
  6036:             }
  6037:           } else if (XEiJ.IRP_MOVEM_ZEROS) {  //Integer.numberOfTrailingZerosを使う
  6038:             for (int i = 15; l != 0; ) {
  6039:               int k = Integer.numberOfTrailingZeros (l);
  6040:               a -= 2;
  6041:               int x = XEiJ.regRn[i -= k];
  6042:               MainMemory.mmrM8[a    ] = (byte) (x >> 8);
  6043:               MainMemory.mmrM8[a + 1] = (byte)  x;
  6044:               l = l >>> k & ~1;
  6045:             }
  6046:           }
  6047:           a = t - (short) (t - a);
  6048:         } else {  //メインメモリでないかページを跨ぐ可能性がある
  6049:           if (XEiJ.IRP_MOVEM_EXPAND) {  //16回展開する
  6050:             if ((l & 0x0001) != 0) {
  6051:               XEiJ.busWwe (a -= 2, XEiJ.regRn[15]);
  6052:             }
  6053:             if ((l & 0x0002) != 0) {
  6054:               XEiJ.busWwe (a -= 2, XEiJ.regRn[14]);
  6055:             }
  6056:             if ((l & 0x0004) != 0) {
  6057:               XEiJ.busWwe (a -= 2, XEiJ.regRn[13]);
  6058:             }
  6059:             if ((l & 0x0008) != 0) {
  6060:               XEiJ.busWwe (a -= 2, XEiJ.regRn[12]);
  6061:             }
  6062:             if ((l & 0x0010) != 0) {
  6063:               XEiJ.busWwe (a -= 2, XEiJ.regRn[11]);
  6064:             }
  6065:             if ((l & 0x0020) != 0) {
  6066:               XEiJ.busWwe (a -= 2, XEiJ.regRn[10]);
  6067:             }
  6068:             if ((l & 0x0040) != 0) {
  6069:               XEiJ.busWwe (a -= 2, XEiJ.regRn[ 9]);
  6070:             }
  6071:             if ((byte) l < 0) {  //(l & 0x0080) != 0
  6072:               XEiJ.busWwe (a -= 2, XEiJ.regRn[ 8]);
  6073:             }
  6074:             if ((l & 0x0100) != 0) {
  6075:               XEiJ.busWwe (a -= 2, XEiJ.regRn[ 7]);
  6076:             }
  6077:             if ((l & 0x0200) != 0) {
  6078:               XEiJ.busWwe (a -= 2, XEiJ.regRn[ 6]);
  6079:             }
  6080:             if ((l & 0x0400) != 0) {
  6081:               XEiJ.busWwe (a -= 2, XEiJ.regRn[ 5]);
  6082:             }
  6083:             if ((l & 0x0800) != 0) {
  6084:               XEiJ.busWwe (a -= 2, XEiJ.regRn[ 4]);
  6085:             }
  6086:             if ((l & 0x1000) != 0) {
  6087:               XEiJ.busWwe (a -= 2, XEiJ.regRn[ 3]);
  6088:             }
  6089:             if ((l & 0x2000) != 0) {
  6090:               XEiJ.busWwe (a -= 2, XEiJ.regRn[ 2]);
  6091:             }
  6092:             if ((l & 0x4000) != 0) {
  6093:               XEiJ.busWwe (a -= 2, XEiJ.regRn[ 1]);
  6094:             }
  6095:             if ((short) l < 0) {  //(l & 0x8000) != 0
  6096:               XEiJ.busWwe (a -= 2, XEiJ.regRn[ 0]);
  6097:             }
  6098:           } else if (XEiJ.IRP_MOVEM_LOOP) {  //16回ループする。コンパイラが展開する
  6099:             for (int i = 15; i >= 0; i--) {
  6100:               if ((l & 0x8000 >>> i) != 0) {
  6101:                 XEiJ.busWwe (a -= 2, XEiJ.regRn[i]);
  6102:               }
  6103:             }
  6104:           } else if (XEiJ.IRP_MOVEM_SHIFT_LEFT) {  //0になるまで左にシフトする
  6105:             l = XEiJ.MPU_BITREV_TABLE_0[l & 2047] | XEiJ.MPU_BITREV_TABLE_1[l << 10 >>> 21];  //Integer.reverse(l)
  6106:             for (int i = 15; l != 0; i--, l <<= 1) {
  6107:               if (l < 0) {
  6108:                 XEiJ.busWwe (a -= 2, XEiJ.regRn[i]);
  6109:               }
  6110:             }
  6111:           } else if (XEiJ.IRP_MOVEM_SHIFT_RIGHT) {  //0になるまで右にシフトする
  6112:             for (int i = 15; l != 0; i--, l >>>= 1) {
  6113:               if ((l & 1) != 0) {
  6114:                 XEiJ.busWwe (a -= 2, XEiJ.regRn[i]);
  6115:               }
  6116:             }
  6117:           } else if (XEiJ.IRP_MOVEM_ZEROS) {  //Integer.numberOfTrailingZerosを使う
  6118:             for (int i = 15; l != 0; ) {
  6119:               int k = Integer.numberOfTrailingZeros (l);
  6120:               XEiJ.busWwe (a -= 2, XEiJ.regRn[i -= k]);
  6121:               l = l >>> k & ~1;
  6122:             }
  6123:           }
  6124:         }
  6125:         XEiJ.regRn[arr] = a;
  6126:         XEiJ.mpuCycleCount += 8 + (t - a << 1);  //2バイト/個→4サイクル/個
  6127:       } else {  //-(Ar)以外
  6128:         int a = efaCltWord (ea);
  6129:         if ((a & 1) != 0 && l != 0) {  //奇数アドレスで1ワード以上転送する
  6130:           M68kException.m6eNumber = M68kException.M6E_ADDRESS_ERROR;
  6131:           M68kException.m6eAddress = a;
  6132:           M68kException.m6eDirection = XEiJ.MPU_WR_WRITE;
  6133:           M68kException.m6eSize = XEiJ.MPU_SS_WORD;
  6134:           throw M68kException.m6eSignal;
  6135:         }
  6136:         int t = a;
  6137:         if (XEiJ.IRP_MOVEM_MAINMEMORY &&  //000のときMOVEMでメインメモリを特別扱いにする
  6138:             (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a >>> XEiJ.BUS_PAGE_BITS] == MemoryMappedDevice.MMD_MMR &&  //メインメモリ
  6139:             (a & XEiJ.BUS_PAGE_SIZE - 1) <= XEiJ.BUS_PAGE_SIZE - 2 * 16) {  //16個転送してもページを跨がない
  6140:           a &= XEiJ.BUS_MOTHER_MASK;
  6141:           if (XEiJ.IRP_MOVEM_EXPAND) {  //16回展開する
  6142:             if ((l & 0x0001) != 0) {
  6143:               int x = XEiJ.regRn[ 0];
  6144:               MainMemory.mmrM8[a    ] = (byte) (x >> 8);
  6145:               MainMemory.mmrM8[a + 1] = (byte)  x;
  6146:               a += 2;
  6147:             }
  6148:             if ((l & 0x0002) != 0) {
  6149:               int x = XEiJ.regRn[ 1];
  6150:               MainMemory.mmrM8[a    ] = (byte) (x >> 8);
  6151:               MainMemory.mmrM8[a + 1] = (byte)  x;
  6152:               a += 2;
  6153:             }
  6154:             if ((l & 0x0004) != 0) {
  6155:               int x = XEiJ.regRn[ 2];
  6156:               MainMemory.mmrM8[a    ] = (byte) (x >> 8);
  6157:               MainMemory.mmrM8[a + 1] = (byte)  x;
  6158:               a += 2;
  6159:             }
  6160:             if ((l & 0x0008) != 0) {
  6161:               int x = XEiJ.regRn[ 3];
  6162:               MainMemory.mmrM8[a    ] = (byte) (x >> 8);
  6163:               MainMemory.mmrM8[a + 1] = (byte)  x;
  6164:               a += 2;
  6165:             }
  6166:             if ((l & 0x0010) != 0) {
  6167:               int x = XEiJ.regRn[ 4];
  6168:               MainMemory.mmrM8[a    ] = (byte) (x >> 8);
  6169:               MainMemory.mmrM8[a + 1] = (byte)  x;
  6170:               a += 2;
  6171:             }
  6172:             if ((l & 0x0020) != 0) {
  6173:               int x = XEiJ.regRn[ 5];
  6174:               MainMemory.mmrM8[a    ] = (byte) (x >> 8);
  6175:               MainMemory.mmrM8[a + 1] = (byte)  x;
  6176:               a += 2;
  6177:             }
  6178:             if ((l & 0x0040) != 0) {
  6179:               int x = XEiJ.regRn[ 6];
  6180:               MainMemory.mmrM8[a    ] = (byte) (x >> 8);
  6181:               MainMemory.mmrM8[a + 1] = (byte)  x;
  6182:               a += 2;
  6183:             }
  6184:             if ((byte) l < 0) {  //(l & 0x0080) != 0
  6185:               int x = XEiJ.regRn[ 7];
  6186:               MainMemory.mmrM8[a    ] = (byte) (x >> 8);
  6187:               MainMemory.mmrM8[a + 1] = (byte)  x;
  6188:               a += 2;
  6189:             }
  6190:             if ((l & 0x0100) != 0) {
  6191:               int x = XEiJ.regRn[ 8];
  6192:               MainMemory.mmrM8[a    ] = (byte) (x >> 8);
  6193:               MainMemory.mmrM8[a + 1] = (byte)  x;
  6194:               a += 2;
  6195:             }
  6196:             if ((l & 0x0200) != 0) {
  6197:               int x = XEiJ.regRn[ 9];
  6198:               MainMemory.mmrM8[a    ] = (byte) (x >> 8);
  6199:               MainMemory.mmrM8[a + 1] = (byte)  x;
  6200:               a += 2;
  6201:             }
  6202:             if ((l & 0x0400) != 0) {
  6203:               int x = XEiJ.regRn[10];
  6204:               MainMemory.mmrM8[a    ] = (byte) (x >> 8);
  6205:               MainMemory.mmrM8[a + 1] = (byte)  x;
  6206:               a += 2;
  6207:             }
  6208:             if ((l & 0x0800) != 0) {
  6209:               int x = XEiJ.regRn[11];
  6210:               MainMemory.mmrM8[a    ] = (byte) (x >> 8);
  6211:               MainMemory.mmrM8[a + 1] = (byte)  x;
  6212:               a += 2;
  6213:             }
  6214:             if ((l & 0x1000) != 0) {
  6215:               int x = XEiJ.regRn[12];
  6216:               MainMemory.mmrM8[a    ] = (byte) (x >> 8);
  6217:               MainMemory.mmrM8[a + 1] = (byte)  x;
  6218:               a += 2;
  6219:             }
  6220:             if ((l & 0x2000) != 0) {
  6221:               int x = XEiJ.regRn[13];
  6222:               MainMemory.mmrM8[a    ] = (byte) (x >> 8);
  6223:               MainMemory.mmrM8[a + 1] = (byte)  x;
  6224:               a += 2;
  6225:             }
  6226:             if ((l & 0x4000) != 0) {
  6227:               int x = XEiJ.regRn[14];
  6228:               MainMemory.mmrM8[a    ] = (byte) (x >> 8);
  6229:               MainMemory.mmrM8[a + 1] = (byte)  x;
  6230:               a += 2;
  6231:             }
  6232:             if ((short) l < 0) {  //(l & 0x8000) != 0
  6233:               int x = XEiJ.regRn[15];
  6234:               MainMemory.mmrM8[a    ] = (byte) (x >> 8);
  6235:               MainMemory.mmrM8[a + 1] = (byte)  x;
  6236:               a += 2;
  6237:             }
  6238:           } else if (XEiJ.IRP_MOVEM_LOOP) {  //16回ループする。コンパイラが展開する
  6239:             for (int i = 0; i <= 15; i++) {
  6240:               if ((l & 0x0001 << i) != 0) {
  6241:                 int x = XEiJ.regRn[i];
  6242:                 MainMemory.mmrM8[a    ] = (byte) (x >> 8);
  6243:                 MainMemory.mmrM8[a + 1] = (byte)  x;
  6244:                 a += 2;
  6245:               }
  6246:             }
  6247:           } else if (XEiJ.IRP_MOVEM_SHIFT_LEFT) {  //0になるまで左にシフトする
  6248:             l = XEiJ.MPU_BITREV_TABLE_0[l & 2047] | XEiJ.MPU_BITREV_TABLE_1[l << 10 >>> 21];  //Integer.reverse(l)
  6249:             for (int i = 0; l != 0; i++, l <<= 1) {
  6250:               if (l < 0) {
  6251:                 int x = XEiJ.regRn[i];
  6252:                 MainMemory.mmrM8[a    ] = (byte) (x >> 8);
  6253:                 MainMemory.mmrM8[a + 1] = (byte)  x;
  6254:                 a += 2;
  6255:               }
  6256:             }
  6257:           } else if (XEiJ.IRP_MOVEM_SHIFT_RIGHT) {  //0になるまで右にシフトする
  6258:             for (int i = 0; l != 0; i++, l >>>= 1) {
  6259:               if ((l & 1) != 0) {
  6260:                 int x = XEiJ.regRn[i];
  6261:                 MainMemory.mmrM8[a    ] = (byte) (x >> 8);
  6262:                 MainMemory.mmrM8[a + 1] = (byte)  x;
  6263:                 a += 2;
  6264:               }
  6265:             }
  6266:           } else if (XEiJ.IRP_MOVEM_ZEROS) {  //Integer.numberOfTrailingZerosを使う
  6267:             for (int i = 0; l != 0; ) {
  6268:               int k = Integer.numberOfTrailingZeros (l);
  6269:               int x = XEiJ.regRn[i += k];
  6270:               MainMemory.mmrM8[a    ] = (byte) (x >> 8);
  6271:               MainMemory.mmrM8[a + 1] = (byte)  x;
  6272:               a += 2;
  6273:               l = l >>> k & ~1;
  6274:             }
  6275:           }
  6276:           a = t + (short) (a - t);
  6277:         } else {  //メインメモリでないかページを跨ぐ可能性がある
  6278:           if (XEiJ.IRP_MOVEM_EXPAND) {  //16回展開する
  6279:             if ((l & 0x0001) != 0) {
  6280:               XEiJ.busWwe (a, XEiJ.regRn[ 0]);
  6281:               a += 2;
  6282:             }
  6283:             if ((l & 0x0002) != 0) {
  6284:               XEiJ.busWwe (a, XEiJ.regRn[ 1]);
  6285:               a += 2;
  6286:             }
  6287:             if ((l & 0x0004) != 0) {
  6288:               XEiJ.busWwe (a, XEiJ.regRn[ 2]);
  6289:               a += 2;
  6290:             }
  6291:             if ((l & 0x0008) != 0) {
  6292:               XEiJ.busWwe (a, XEiJ.regRn[ 3]);
  6293:               a += 2;
  6294:             }
  6295:             if ((l & 0x0010) != 0) {
  6296:               XEiJ.busWwe (a, XEiJ.regRn[ 4]);
  6297:               a += 2;
  6298:             }
  6299:             if ((l & 0x0020) != 0) {
  6300:               XEiJ.busWwe (a, XEiJ.regRn[ 5]);
  6301:               a += 2;
  6302:             }
  6303:             if ((l & 0x0040) != 0) {
  6304:               XEiJ.busWwe (a, XEiJ.regRn[ 6]);
  6305:               a += 2;
  6306:             }
  6307:             if ((byte) l < 0) {  //(l & 0x0080) != 0
  6308:               XEiJ.busWwe (a, XEiJ.regRn[ 7]);
  6309:               a += 2;
  6310:             }
  6311:             if ((l & 0x0100) != 0) {
  6312:               XEiJ.busWwe (a, XEiJ.regRn[ 8]);
  6313:               a += 2;
  6314:             }
  6315:             if ((l & 0x0200) != 0) {
  6316:               XEiJ.busWwe (a, XEiJ.regRn[ 9]);
  6317:               a += 2;
  6318:             }
  6319:             if ((l & 0x0400) != 0) {
  6320:               XEiJ.busWwe (a, XEiJ.regRn[10]);
  6321:               a += 2;
  6322:             }
  6323:             if ((l & 0x0800) != 0) {
  6324:               XEiJ.busWwe (a, XEiJ.regRn[11]);
  6325:               a += 2;
  6326:             }
  6327:             if ((l & 0x1000) != 0) {
  6328:               XEiJ.busWwe (a, XEiJ.regRn[12]);
  6329:               a += 2;
  6330:             }
  6331:             if ((l & 0x2000) != 0) {
  6332:               XEiJ.busWwe (a, XEiJ.regRn[13]);
  6333:               a += 2;
  6334:             }
  6335:             if ((l & 0x4000) != 0) {
  6336:               XEiJ.busWwe (a, XEiJ.regRn[14]);
  6337:               a += 2;
  6338:             }
  6339:             if ((short) l < 0) {  //(l & 0x8000) != 0
  6340:               XEiJ.busWwe (a, XEiJ.regRn[15]);
  6341:               a += 2;
  6342:             }
  6343:           } else if (XEiJ.IRP_MOVEM_LOOP) {  //16回ループする。コンパイラが展開する
  6344:             for (int i = 0; i <= 15; i++) {
  6345:               if ((l & 0x0001 << i) != 0) {
  6346:                 XEiJ.busWwe (a, XEiJ.regRn[i]);
  6347:                 a += 2;
  6348:               }
  6349:             }
  6350:           } else if (XEiJ.IRP_MOVEM_SHIFT_LEFT) {  //0になるまで左にシフトする
  6351:             l = XEiJ.MPU_BITREV_TABLE_0[l & 2047] | XEiJ.MPU_BITREV_TABLE_1[l << 10 >>> 21];  //Integer.reverse(l)
  6352:             for (int i = 0; l != 0; i++, l <<= 1) {
  6353:               if (l < 0) {
  6354:                 XEiJ.busWwe (a, XEiJ.regRn[i]);
  6355:                 a += 2;
  6356:               }
  6357:             }
  6358:           } else if (XEiJ.IRP_MOVEM_SHIFT_RIGHT) {  //0になるまで右にシフトする
  6359:             for (int i = 0; l != 0; i++, l >>>= 1) {
  6360:               if ((l & 1) != 0) {
  6361:                 XEiJ.busWwe (a, XEiJ.regRn[i]);
  6362:                 a += 2;
  6363:               }
  6364:             }
  6365:           } else if (XEiJ.IRP_MOVEM_ZEROS) {  //Integer.numberOfTrailingZerosを使う
  6366:             for (int i = 0; l != 0; ) {
  6367:               int k = Integer.numberOfTrailingZeros (l);
  6368:               XEiJ.busWwe (a, XEiJ.regRn[i += k]);
  6369:               a += 2;
  6370:               l = l >>> k & ~1;
  6371:             }
  6372:           }
  6373:         }
  6374:         XEiJ.mpuCycleCount += 4 + (a - t << 1);  //2バイト/個→4サイクル/個
  6375:       }
  6376:     }
  6377:   }  //irpMovemToMemWord
  6378: 
  6379:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  6380:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  6381:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  6382:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  6383:   //EXT.L Dr                                        |-|012346|-|-UUUU|-**00|D         |0100_100_011_000_rrr
  6384:   //MOVEM.L <list>,<ea>                             |-|012346|-|-----|-----|  M -WXZ  |0100_100_011_mmm_rrr-llllllllllllllll
  6385:   public static void irpMovemToMemLong () throws M68kException {
  6386:     int ea = XEiJ.regOC & 63;
  6387:     if (ea < XEiJ.EA_AR) {  //EXT.L Dr
  6388:       XEiJ.mpuCycleCount += 4;
  6389:       int z;
  6390:       XEiJ.regRn[ea] = z = (short) XEiJ.regRn[ea];
  6391:       XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X);  //ccr_tst
  6392:     } else {  //MOVEM.L <list>,<ea>
  6393:       int l = XEiJ.busRwze (XEiJ.regPC);  //pcwze。レジスタリスト。ゼロ拡張
  6394:       XEiJ.regPC += 2;
  6395:       if (ea >> 3 == XEiJ.MMM_MN) {  //-(Ar)
  6396:         //MOVEM.wl <list>,-(Ar)で<list>にArが含まれているとき、000/010は命令開始時のArを、020/030/040/060は命令開始時のAr-オペレーションサイズをメモリに書き込む
  6397:         //転送するレジスタが0個のときArは変化しない
  6398:         int arr = ea - (XEiJ.EA_MN - 8);
  6399:         int a = XEiJ.regRn[arr];
  6400:         if ((a & 1) != 0 && l != 0) {  //奇数アドレスで1ワード以上転送する
  6401:           M68kException.m6eNumber = M68kException.M6E_ADDRESS_ERROR;
  6402:           M68kException.m6eAddress = a;
  6403:           M68kException.m6eDirection = XEiJ.MPU_WR_WRITE;
  6404:           M68kException.m6eSize = XEiJ.MPU_SS_LONG;
  6405:           throw M68kException.m6eSignal;
  6406:         }
  6407:         int t = a;
  6408:         if (XEiJ.IRP_MOVEM_MAINMEMORY &&  //000のときMOVEMでメインメモリを特別扱いにする
  6409:             (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a - 4 >>> XEiJ.BUS_PAGE_BITS] == MemoryMappedDevice.MMD_MMR &&  //メインメモリ
  6410:             4 * 16 <= (a & XEiJ.BUS_PAGE_SIZE - 1)) {  //16個転送してもページを跨がない
  6411:           a &= XEiJ.BUS_MOTHER_MASK;
  6412:           if (XEiJ.IRP_MOVEM_EXPAND) {  //16回展開する
  6413:             if ((l & 0x0001) != 0) {
  6414:               a -= 4;
  6415:               int x = XEiJ.regRn[15];
  6416:               MainMemory.mmrM8[a    ] = (byte) (x >> 24);
  6417:               MainMemory.mmrM8[a + 1] = (byte) (x >> 16);
  6418:               MainMemory.mmrM8[a + 2] = (byte) (x >>  8);
  6419:               MainMemory.mmrM8[a + 3] = (byte)  x;
  6420:             }
  6421:             if ((l & 0x0002) != 0) {
  6422:               a -= 4;
  6423:               int x = XEiJ.regRn[14];
  6424:               MainMemory.mmrM8[a    ] = (byte) (x >> 24);
  6425:               MainMemory.mmrM8[a + 1] = (byte) (x >> 16);
  6426:               MainMemory.mmrM8[a + 2] = (byte) (x >>  8);
  6427:               MainMemory.mmrM8[a + 3] = (byte)  x;
  6428:             }
  6429:             if ((l & 0x0004) != 0) {
  6430:               a -= 4;
  6431:               int x = XEiJ.regRn[13];
  6432:               MainMemory.mmrM8[a    ] = (byte) (x >> 24);
  6433:               MainMemory.mmrM8[a + 1] = (byte) (x >> 16);
  6434:               MainMemory.mmrM8[a + 2] = (byte) (x >>  8);
  6435:               MainMemory.mmrM8[a + 3] = (byte)  x;
  6436:             }
  6437:             if ((l & 0x0008) != 0) {
  6438:               a -= 4;
  6439:               int x = XEiJ.regRn[12];
  6440:               MainMemory.mmrM8[a    ] = (byte) (x >> 24);
  6441:               MainMemory.mmrM8[a + 1] = (byte) (x >> 16);
  6442:               MainMemory.mmrM8[a + 2] = (byte) (x >>  8);
  6443:               MainMemory.mmrM8[a + 3] = (byte)  x;
  6444:             }
  6445:             if ((l & 0x0010) != 0) {
  6446:               a -= 4;
  6447:               int x = XEiJ.regRn[11];
  6448:               MainMemory.mmrM8[a    ] = (byte) (x >> 24);
  6449:               MainMemory.mmrM8[a + 1] = (byte) (x >> 16);
  6450:               MainMemory.mmrM8[a + 2] = (byte) (x >>  8);
  6451:               MainMemory.mmrM8[a + 3] = (byte)  x;
  6452:             }
  6453:             if ((l & 0x0020) != 0) {
  6454:               a -= 4;
  6455:               int x = XEiJ.regRn[10];
  6456:               MainMemory.mmrM8[a    ] = (byte) (x >> 24);
  6457:               MainMemory.mmrM8[a + 1] = (byte) (x >> 16);
  6458:               MainMemory.mmrM8[a + 2] = (byte) (x >>  8);
  6459:               MainMemory.mmrM8[a + 3] = (byte)  x;
  6460:             }
  6461:             if ((l & 0x0040) != 0) {
  6462:               a -= 4;
  6463:               int x = XEiJ.regRn[ 9];
  6464:               MainMemory.mmrM8[a    ] = (byte) (x >> 24);
  6465:               MainMemory.mmrM8[a + 1] = (byte) (x >> 16);
  6466:               MainMemory.mmrM8[a + 2] = (byte) (x >>  8);
  6467:               MainMemory.mmrM8[a + 3] = (byte)  x;
  6468:             }
  6469:             if ((byte) l < 0) {  //(l & 0x0080) != 0
  6470:               a -= 4;
  6471:               int x = XEiJ.regRn[ 8];
  6472:               MainMemory.mmrM8[a    ] = (byte) (x >> 24);
  6473:               MainMemory.mmrM8[a + 1] = (byte) (x >> 16);
  6474:               MainMemory.mmrM8[a + 2] = (byte) (x >>  8);
  6475:               MainMemory.mmrM8[a + 3] = (byte)  x;
  6476:             }
  6477:             if ((l & 0x0100) != 0) {
  6478:               a -= 4;
  6479:               int x = XEiJ.regRn[ 7];
  6480:               MainMemory.mmrM8[a    ] = (byte) (x >> 24);
  6481:               MainMemory.mmrM8[a + 1] = (byte) (x >> 16);
  6482:               MainMemory.mmrM8[a + 2] = (byte) (x >>  8);
  6483:               MainMemory.mmrM8[a + 3] = (byte)  x;
  6484:             }
  6485:             if ((l & 0x0200) != 0) {
  6486:               a -= 4;
  6487:               int x = XEiJ.regRn[ 6];
  6488:               MainMemory.mmrM8[a    ] = (byte) (x >> 24);
  6489:               MainMemory.mmrM8[a + 1] = (byte) (x >> 16);
  6490:               MainMemory.mmrM8[a + 2] = (byte) (x >>  8);
  6491:               MainMemory.mmrM8[a + 3] = (byte)  x;
  6492:             }
  6493:             if ((l & 0x0400) != 0) {
  6494:               a -= 4;
  6495:               int x = XEiJ.regRn[ 5];
  6496:               MainMemory.mmrM8[a    ] = (byte) (x >> 24);
  6497:               MainMemory.mmrM8[a + 1] = (byte) (x >> 16);
  6498:               MainMemory.mmrM8[a + 2] = (byte) (x >>  8);
  6499:               MainMemory.mmrM8[a + 3] = (byte)  x;
  6500:             }
  6501:             if ((l & 0x0800) != 0) {
  6502:               a -= 4;
  6503:               int x = XEiJ.regRn[ 4];
  6504:               MainMemory.mmrM8[a    ] = (byte) (x >> 24);
  6505:               MainMemory.mmrM8[a + 1] = (byte) (x >> 16);
  6506:               MainMemory.mmrM8[a + 2] = (byte) (x >>  8);
  6507:               MainMemory.mmrM8[a + 3] = (byte)  x;
  6508:             }
  6509:             if ((l & 0x1000) != 0) {
  6510:               a -= 4;
  6511:               int x = XEiJ.regRn[ 3];
  6512:               MainMemory.mmrM8[a    ] = (byte) (x >> 24);
  6513:               MainMemory.mmrM8[a + 1] = (byte) (x >> 16);
  6514:               MainMemory.mmrM8[a + 2] = (byte) (x >>  8);
  6515:               MainMemory.mmrM8[a + 3] = (byte)  x;
  6516:             }
  6517:             if ((l & 0x2000) != 0) {
  6518:               a -= 4;
  6519:               int x = XEiJ.regRn[ 2];
  6520:               MainMemory.mmrM8[a    ] = (byte) (x >> 24);
  6521:               MainMemory.mmrM8[a + 1] = (byte) (x >> 16);
  6522:               MainMemory.mmrM8[a + 2] = (byte) (x >>  8);
  6523:               MainMemory.mmrM8[a + 3] = (byte)  x;
  6524:             }
  6525:             if ((l & 0x4000) != 0) {
  6526:               a -= 4;
  6527:               int x = XEiJ.regRn[ 1];
  6528:               MainMemory.mmrM8[a    ] = (byte) (x >> 24);
  6529:               MainMemory.mmrM8[a + 1] = (byte) (x >> 16);
  6530:               MainMemory.mmrM8[a + 2] = (byte) (x >>  8);
  6531:               MainMemory.mmrM8[a + 3] = (byte)  x;
  6532:             }
  6533:             if ((short) l < 0) {  //(l & 0x8000) != 0
  6534:               a -= 4;
  6535:               int x = XEiJ.regRn[ 0];
  6536:               MainMemory.mmrM8[a    ] = (byte) (x >> 24);
  6537:               MainMemory.mmrM8[a + 1] = (byte) (x >> 16);
  6538:               MainMemory.mmrM8[a + 2] = (byte) (x >>  8);
  6539:               MainMemory.mmrM8[a + 3] = (byte)  x;
  6540:             }
  6541:           } else if (XEiJ.IRP_MOVEM_LOOP) {  //16回ループする。コンパイラが展開する
  6542:             for (int i = 15; i >= 0; i--) {
  6543:               if ((l & 0x8000 >>> i) != 0) {
  6544:                 a -= 4;
  6545:                 int x = XEiJ.regRn[i];
  6546:                 MainMemory.mmrM8[a    ] = (byte) (x >> 24);
  6547:                 MainMemory.mmrM8[a + 1] = (byte) (x >> 16);
  6548:                 MainMemory.mmrM8[a + 2] = (byte) (x >>  8);
  6549:                 MainMemory.mmrM8[a + 3] = (byte)  x;
  6550:               }
  6551:             }
  6552:           } else if (XEiJ.IRP_MOVEM_SHIFT_LEFT) {  //0になるまで左にシフトする
  6553:             l = XEiJ.MPU_BITREV_TABLE_0[l & 2047] | XEiJ.MPU_BITREV_TABLE_1[l << 10 >>> 21];  //Integer.reverse(l)
  6554:             for (int i = 15; l != 0; i--, l <<= 1) {
  6555:               if (l < 0) {
  6556:                 a -= 4;
  6557:                 int x = XEiJ.regRn[i];
  6558:                 MainMemory.mmrM8[a    ] = (byte) (x >> 24);
  6559:                 MainMemory.mmrM8[a + 1] = (byte) (x >> 16);
  6560:                 MainMemory.mmrM8[a + 2] = (byte) (x >>  8);
  6561:                 MainMemory.mmrM8[a + 3] = (byte)  x;
  6562:               }
  6563:             }
  6564:           } else if (XEiJ.IRP_MOVEM_SHIFT_RIGHT) {  //0になるまで右にシフトする
  6565:             for (int i = 15; l != 0; i--, l >>>= 1) {
  6566:               if ((l & 1) != 0) {
  6567:                 a -= 4;
  6568:                 int x = XEiJ.regRn[i];
  6569:                 MainMemory.mmrM8[a    ] = (byte) (x >> 24);
  6570:                 MainMemory.mmrM8[a + 1] = (byte) (x >> 16);
  6571:                 MainMemory.mmrM8[a + 2] = (byte) (x >>  8);
  6572:                 MainMemory.mmrM8[a + 3] = (byte)  x;
  6573:               }
  6574:             }
  6575:           } else if (XEiJ.IRP_MOVEM_ZEROS) {  //Integer.numberOfTrailingZerosを使う
  6576:             for (int i = 15; l != 0; ) {
  6577:               int k = Integer.numberOfTrailingZeros (l);
  6578:               a -= 4;
  6579:               int x = XEiJ.regRn[i -= k];
  6580:               MainMemory.mmrM8[a    ] = (byte) (x >> 24);
  6581:               MainMemory.mmrM8[a + 1] = (byte) (x >> 16);
  6582:               MainMemory.mmrM8[a + 2] = (byte) (x >>  8);
  6583:               MainMemory.mmrM8[a + 3] = (byte)  x;
  6584:               l = l >>> k & ~1;
  6585:             }
  6586:           }
  6587:           a = t - (short) (t - a);
  6588:         } else {  //メインメモリでないかページを跨ぐ可能性がある
  6589:           if (XEiJ.IRP_MOVEM_EXPAND) {  //16回展開する
  6590:             if ((l & 0x0001) != 0) {
  6591:               XEiJ.busWle (a -= 4, XEiJ.regRn[15]);
  6592:             }
  6593:             if ((l & 0x0002) != 0) {
  6594:               XEiJ.busWle (a -= 4, XEiJ.regRn[14]);
  6595:             }
  6596:             if ((l & 0x0004) != 0) {
  6597:               XEiJ.busWle (a -= 4, XEiJ.regRn[13]);
  6598:             }
  6599:             if ((l & 0x0008) != 0) {
  6600:               XEiJ.busWle (a -= 4, XEiJ.regRn[12]);
  6601:             }
  6602:             if ((l & 0x0010) != 0) {
  6603:               XEiJ.busWle (a -= 4, XEiJ.regRn[11]);
  6604:             }
  6605:             if ((l & 0x0020) != 0) {
  6606:               XEiJ.busWle (a -= 4, XEiJ.regRn[10]);
  6607:             }
  6608:             if ((l & 0x0040) != 0) {
  6609:               XEiJ.busWle (a -= 4, XEiJ.regRn[ 9]);
  6610:             }
  6611:             if ((byte) l < 0) {  //(l & 0x0080) != 0
  6612:               XEiJ.busWle (a -= 4, XEiJ.regRn[ 8]);
  6613:             }
  6614:             if ((l & 0x0100) != 0) {
  6615:               XEiJ.busWle (a -= 4, XEiJ.regRn[ 7]);
  6616:             }
  6617:             if ((l & 0x0200) != 0) {
  6618:               XEiJ.busWle (a -= 4, XEiJ.regRn[ 6]);
  6619:             }
  6620:             if ((l & 0x0400) != 0) {
  6621:               XEiJ.busWle (a -= 4, XEiJ.regRn[ 5]);
  6622:             }
  6623:             if ((l & 0x0800) != 0) {
  6624:               XEiJ.busWle (a -= 4, XEiJ.regRn[ 4]);
  6625:             }
  6626:             if ((l & 0x1000) != 0) {
  6627:               XEiJ.busWle (a -= 4, XEiJ.regRn[ 3]);
  6628:             }
  6629:             if ((l & 0x2000) != 0) {
  6630:               XEiJ.busWle (a -= 4, XEiJ.regRn[ 2]);
  6631:             }
  6632:             if ((l & 0x4000) != 0) {
  6633:               XEiJ.busWle (a -= 4, XEiJ.regRn[ 1]);
  6634:             }
  6635:             if ((short) l < 0) {  //(l & 0x8000) != 0
  6636:               XEiJ.busWle (a -= 4, XEiJ.regRn[ 0]);
  6637:             }
  6638:           } else if (XEiJ.IRP_MOVEM_LOOP) {  //16回ループする。コンパイラが展開する
  6639:             for (int i = 15; i >= 0; i--) {
  6640:               if ((l & 0x8000 >>> i) != 0) {
  6641:                 XEiJ.busWle (a -= 4, XEiJ.regRn[i]);
  6642:               }
  6643:             }
  6644:           } else if (XEiJ.IRP_MOVEM_SHIFT_LEFT) {  //0になるまで左にシフトする
  6645:             l = XEiJ.MPU_BITREV_TABLE_0[l & 2047] | XEiJ.MPU_BITREV_TABLE_1[l << 10 >>> 21];  //Integer.reverse(l)
  6646:             for (int i = 15; l != 0; i--, l <<= 1) {
  6647:               if (l < 0) {
  6648:                 XEiJ.busWle (a -= 4, XEiJ.regRn[i]);
  6649:               }
  6650:             }
  6651:           } else if (XEiJ.IRP_MOVEM_SHIFT_RIGHT) {  //0になるまで右にシフトする
  6652:             for (int i = 15; l != 0; i--, l >>>= 1) {
  6653:               if ((l & 1) != 0) {
  6654:                 XEiJ.busWle (a -= 4, XEiJ.regRn[i]);
  6655:               }
  6656:             }
  6657:           } else if (XEiJ.IRP_MOVEM_ZEROS) {  //Integer.numberOfTrailingZerosを使う
  6658:             for (int i = 15; l != 0; ) {
  6659:               int k = Integer.numberOfTrailingZeros (l);
  6660:               XEiJ.busWle (a -= 4, XEiJ.regRn[i -= k]);
  6661:               l = l >>> k & ~1;
  6662:             }
  6663:           }
  6664:         }
  6665:         XEiJ.regRn[arr] = a;
  6666:         XEiJ.mpuCycleCount += 8 + (t - a << 1);  //4バイト/個→8サイクル/個
  6667:       } else {  //-(Ar)以外
  6668:         int a = efaCltLong (ea);
  6669:         if ((a & 1) != 0 && l != 0) {  //奇数アドレスで1ワード以上転送する
  6670:           M68kException.m6eNumber = M68kException.M6E_ADDRESS_ERROR;
  6671:           M68kException.m6eAddress = a;
  6672:           M68kException.m6eDirection = XEiJ.MPU_WR_WRITE;
  6673:           M68kException.m6eSize = XEiJ.MPU_SS_LONG;
  6674:           throw M68kException.m6eSignal;
  6675:         }
  6676:         int t = a;
  6677:         if (XEiJ.IRP_MOVEM_MAINMEMORY &&  //000のときMOVEMでメインメモリを特別扱いにする
  6678:             (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a >>> XEiJ.BUS_PAGE_BITS] == MemoryMappedDevice.MMD_MMR &&  //メインメモリ
  6679:             (a & XEiJ.BUS_PAGE_SIZE - 1) <= XEiJ.BUS_PAGE_SIZE - 4 * 16) {  //16個転送してもページを跨がない
  6680:           a &= XEiJ.BUS_MOTHER_MASK;
  6681:           if (XEiJ.IRP_MOVEM_EXPAND) {  //16回展開する
  6682:             if ((l & 0x0001) != 0) {
  6683:               int x = XEiJ.regRn[ 0];
  6684:               MainMemory.mmrM8[a    ] = (byte) (x >> 24);
  6685:               MainMemory.mmrM8[a + 1] = (byte) (x >> 16);
  6686:               MainMemory.mmrM8[a + 2] = (byte) (x >>  8);
  6687:               MainMemory.mmrM8[a + 3] = (byte)  x;
  6688:               a += 4;
  6689:             }
  6690:             if ((l & 0x0002) != 0) {
  6691:               int x = XEiJ.regRn[ 1];
  6692:               MainMemory.mmrM8[a    ] = (byte) (x >> 24);
  6693:               MainMemory.mmrM8[a + 1] = (byte) (x >> 16);
  6694:               MainMemory.mmrM8[a + 2] = (byte) (x >>  8);
  6695:               MainMemory.mmrM8[a + 3] = (byte)  x;
  6696:               a += 4;
  6697:             }
  6698:             if ((l & 0x0004) != 0) {
  6699:               int x = XEiJ.regRn[ 2];
  6700:               MainMemory.mmrM8[a    ] = (byte) (x >> 24);
  6701:               MainMemory.mmrM8[a + 1] = (byte) (x >> 16);
  6702:               MainMemory.mmrM8[a + 2] = (byte) (x >>  8);
  6703:               MainMemory.mmrM8[a + 3] = (byte)  x;
  6704:               a += 4;
  6705:             }
  6706:             if ((l & 0x0008) != 0) {
  6707:               int x = XEiJ.regRn[ 3];
  6708:               MainMemory.mmrM8[a    ] = (byte) (x >> 24);
  6709:               MainMemory.mmrM8[a + 1] = (byte) (x >> 16);
  6710:               MainMemory.mmrM8[a + 2] = (byte) (x >>  8);
  6711:               MainMemory.mmrM8[a + 3] = (byte)  x;
  6712:               a += 4;
  6713:             }
  6714:             if ((l & 0x0010) != 0) {
  6715:               int x = XEiJ.regRn[ 4];
  6716:               MainMemory.mmrM8[a    ] = (byte) (x >> 24);
  6717:               MainMemory.mmrM8[a + 1] = (byte) (x >> 16);
  6718:               MainMemory.mmrM8[a + 2] = (byte) (x >>  8);
  6719:               MainMemory.mmrM8[a + 3] = (byte)  x;
  6720:               a += 4;
  6721:             }
  6722:             if ((l & 0x0020) != 0) {
  6723:               int x = XEiJ.regRn[ 5];
  6724:               MainMemory.mmrM8[a    ] = (byte) (x >> 24);
  6725:               MainMemory.mmrM8[a + 1] = (byte) (x >> 16);
  6726:               MainMemory.mmrM8[a + 2] = (byte) (x >>  8);
  6727:               MainMemory.mmrM8[a + 3] = (byte)  x;
  6728:               a += 4;
  6729:             }
  6730:             if ((l & 0x0040) != 0) {
  6731:               int x = XEiJ.regRn[ 6];
  6732:               MainMemory.mmrM8[a    ] = (byte) (x >> 24);
  6733:               MainMemory.mmrM8[a + 1] = (byte) (x >> 16);
  6734:               MainMemory.mmrM8[a + 2] = (byte) (x >>  8);
  6735:               MainMemory.mmrM8[a + 3] = (byte)  x;
  6736:               a += 4;
  6737:             }
  6738:             if ((byte) l < 0) {  //(l & 0x0080) != 0
  6739:               int x = XEiJ.regRn[ 7];
  6740:               MainMemory.mmrM8[a    ] = (byte) (x >> 24);
  6741:               MainMemory.mmrM8[a + 1] = (byte) (x >> 16);
  6742:               MainMemory.mmrM8[a + 2] = (byte) (x >>  8);
  6743:               MainMemory.mmrM8[a + 3] = (byte)  x;
  6744:               a += 4;
  6745:             }
  6746:             if ((l & 0x0100) != 0) {
  6747:               int x = XEiJ.regRn[ 8];
  6748:               MainMemory.mmrM8[a    ] = (byte) (x >> 24);
  6749:               MainMemory.mmrM8[a + 1] = (byte) (x >> 16);
  6750:               MainMemory.mmrM8[a + 2] = (byte) (x >>  8);
  6751:               MainMemory.mmrM8[a + 3] = (byte)  x;
  6752:               a += 4;
  6753:             }
  6754:             if ((l & 0x0200) != 0) {
  6755:               int x = XEiJ.regRn[ 9];
  6756:               MainMemory.mmrM8[a    ] = (byte) (x >> 24);
  6757:               MainMemory.mmrM8[a + 1] = (byte) (x >> 16);
  6758:               MainMemory.mmrM8[a + 2] = (byte) (x >>  8);
  6759:               MainMemory.mmrM8[a + 3] = (byte)  x;
  6760:               a += 4;
  6761:             }
  6762:             if ((l & 0x0400) != 0) {
  6763:               int x = XEiJ.regRn[10];
  6764:               MainMemory.mmrM8[a    ] = (byte) (x >> 24);
  6765:               MainMemory.mmrM8[a + 1] = (byte) (x >> 16);
  6766:               MainMemory.mmrM8[a + 2] = (byte) (x >>  8);
  6767:               MainMemory.mmrM8[a + 3] = (byte)  x;
  6768:               a += 4;
  6769:             }
  6770:             if ((l & 0x0800) != 0) {
  6771:               int x = XEiJ.regRn[11];
  6772:               MainMemory.mmrM8[a    ] = (byte) (x >> 24);
  6773:               MainMemory.mmrM8[a + 1] = (byte) (x >> 16);
  6774:               MainMemory.mmrM8[a + 2] = (byte) (x >>  8);
  6775:               MainMemory.mmrM8[a + 3] = (byte)  x;
  6776:               a += 4;
  6777:             }
  6778:             if ((l & 0x1000) != 0) {
  6779:               int x = XEiJ.regRn[12];
  6780:               MainMemory.mmrM8[a    ] = (byte) (x >> 24);
  6781:               MainMemory.mmrM8[a + 1] = (byte) (x >> 16);
  6782:               MainMemory.mmrM8[a + 2] = (byte) (x >>  8);
  6783:               MainMemory.mmrM8[a + 3] = (byte)  x;
  6784:               a += 4;
  6785:             }
  6786:             if ((l & 0x2000) != 0) {
  6787:               int x = XEiJ.regRn[13];
  6788:               MainMemory.mmrM8[a    ] = (byte) (x >> 24);
  6789:               MainMemory.mmrM8[a + 1] = (byte) (x >> 16);
  6790:               MainMemory.mmrM8[a + 2] = (byte) (x >>  8);
  6791:               MainMemory.mmrM8[a + 3] = (byte)  x;
  6792:               a += 4;
  6793:             }
  6794:             if ((l & 0x4000) != 0) {
  6795:               int x = XEiJ.regRn[14];
  6796:               MainMemory.mmrM8[a    ] = (byte) (x >> 24);
  6797:               MainMemory.mmrM8[a + 1] = (byte) (x >> 16);
  6798:               MainMemory.mmrM8[a + 2] = (byte) (x >>  8);
  6799:               MainMemory.mmrM8[a + 3] = (byte)  x;
  6800:               a += 4;
  6801:             }
  6802:             if ((short) l < 0) {  //(l & 0x8000) != 0
  6803:               int x = XEiJ.regRn[15];
  6804:               MainMemory.mmrM8[a    ] = (byte) (x >> 24);
  6805:               MainMemory.mmrM8[a + 1] = (byte) (x >> 16);
  6806:               MainMemory.mmrM8[a + 2] = (byte) (x >>  8);
  6807:               MainMemory.mmrM8[a + 3] = (byte)  x;
  6808:               a += 4;
  6809:             }
  6810:           } else if (XEiJ.IRP_MOVEM_LOOP) {  //16回ループする。コンパイラが展開する
  6811:             for (int i = 0; i <= 15; i++) {
  6812:               if ((l & 0x0001 << i) != 0) {
  6813:                 int x = XEiJ.regRn[i];
  6814:                 MainMemory.mmrM8[a    ] = (byte) (x >> 24);
  6815:                 MainMemory.mmrM8[a + 1] = (byte) (x >> 16);
  6816:                 MainMemory.mmrM8[a + 2] = (byte) (x >>  8);
  6817:                 MainMemory.mmrM8[a + 3] = (byte)  x;
  6818:                 a += 4;
  6819:               }
  6820:             }
  6821:           } else if (XEiJ.IRP_MOVEM_SHIFT_LEFT) {  //0になるまで左にシフトする
  6822:             l = XEiJ.MPU_BITREV_TABLE_0[l & 2047] | XEiJ.MPU_BITREV_TABLE_1[l << 10 >>> 21];  //Integer.reverse(l)
  6823:             for (int i = 0; l != 0; i++, l <<= 1) {
  6824:               if (l < 0) {
  6825:                 int x = XEiJ.regRn[i];
  6826:                 MainMemory.mmrM8[a    ] = (byte) (x >> 24);
  6827:                 MainMemory.mmrM8[a + 1] = (byte) (x >> 16);
  6828:                 MainMemory.mmrM8[a + 2] = (byte) (x >>  8);
  6829:                 MainMemory.mmrM8[a + 3] = (byte)  x;
  6830:                 a += 4;
  6831:               }
  6832:             }
  6833:           } else if (XEiJ.IRP_MOVEM_SHIFT_RIGHT) {  //0になるまで右にシフトする
  6834:             for (int i = 0; l != 0; i++, l >>>= 1) {
  6835:               if ((l & 1) != 0) {
  6836:                 int x = XEiJ.regRn[i];
  6837:                 MainMemory.mmrM8[a    ] = (byte) (x >> 24);
  6838:                 MainMemory.mmrM8[a + 1] = (byte) (x >> 16);
  6839:                 MainMemory.mmrM8[a + 2] = (byte) (x >>  8);
  6840:                 MainMemory.mmrM8[a + 3] = (byte)  x;
  6841:                 a += 4;
  6842:               }
  6843:             }
  6844:           } else if (XEiJ.IRP_MOVEM_ZEROS) {  //Integer.numberOfTrailingZerosを使う
  6845:             for (int i = 0; l != 0; ) {
  6846:               int k = Integer.numberOfTrailingZeros (l);
  6847:               int x = XEiJ.regRn[i += k];
  6848:               MainMemory.mmrM8[a    ] = (byte) (x >> 24);
  6849:               MainMemory.mmrM8[a + 1] = (byte) (x >> 16);
  6850:               MainMemory.mmrM8[a + 2] = (byte) (x >>  8);
  6851:               MainMemory.mmrM8[a + 3] = (byte)  x;
  6852:               a += 4;
  6853:               l = l >>> k & ~1;
  6854:             }
  6855:           }
  6856:           a = t + (short) (a - t);
  6857:         } else {  //メインメモリでないかページを跨ぐ可能性がある
  6858:           if (XEiJ.IRP_MOVEM_EXPAND) {  //16回展開する
  6859:             if ((l & 0x0001) != 0) {
  6860:               XEiJ.busWle (a, XEiJ.regRn[ 0]);
  6861:               a += 4;
  6862:             }
  6863:             if ((l & 0x0002) != 0) {
  6864:               XEiJ.busWle (a, XEiJ.regRn[ 1]);
  6865:               a += 4;
  6866:             }
  6867:             if ((l & 0x0004) != 0) {
  6868:               XEiJ.busWle (a, XEiJ.regRn[ 2]);
  6869:               a += 4;
  6870:             }
  6871:             if ((l & 0x0008) != 0) {
  6872:               XEiJ.busWle (a, XEiJ.regRn[ 3]);
  6873:               a += 4;
  6874:             }
  6875:             if ((l & 0x0010) != 0) {
  6876:               XEiJ.busWle (a, XEiJ.regRn[ 4]);
  6877:               a += 4;
  6878:             }
  6879:             if ((l & 0x0020) != 0) {
  6880:               XEiJ.busWle (a, XEiJ.regRn[ 5]);
  6881:               a += 4;
  6882:             }
  6883:             if ((l & 0x0040) != 0) {
  6884:               XEiJ.busWle (a, XEiJ.regRn[ 6]);
  6885:               a += 4;
  6886:             }
  6887:             if ((byte) l < 0) {  //(l & 0x0080) != 0
  6888:               XEiJ.busWle (a, XEiJ.regRn[ 7]);
  6889:               a += 4;
  6890:             }
  6891:             if ((l & 0x0100) != 0) {
  6892:               XEiJ.busWle (a, XEiJ.regRn[ 8]);
  6893:               a += 4;
  6894:             }
  6895:             if ((l & 0x0200) != 0) {
  6896:               XEiJ.busWle (a, XEiJ.regRn[ 9]);
  6897:               a += 4;
  6898:             }
  6899:             if ((l & 0x0400) != 0) {
  6900:               XEiJ.busWle (a, XEiJ.regRn[10]);
  6901:               a += 4;
  6902:             }
  6903:             if ((l & 0x0800) != 0) {
  6904:               XEiJ.busWle (a, XEiJ.regRn[11]);
  6905:               a += 4;
  6906:             }
  6907:             if ((l & 0x1000) != 0) {
  6908:               XEiJ.busWle (a, XEiJ.regRn[12]);
  6909:               a += 4;
  6910:             }
  6911:             if ((l & 0x2000) != 0) {
  6912:               XEiJ.busWle (a, XEiJ.regRn[13]);
  6913:               a += 4;
  6914:             }
  6915:             if ((l & 0x4000) != 0) {
  6916:               XEiJ.busWle (a, XEiJ.regRn[14]);
  6917:               a += 4;
  6918:             }
  6919:             if ((short) l < 0) {  //(l & 0x8000) != 0
  6920:               XEiJ.busWle (a, XEiJ.regRn[15]);
  6921:               a += 4;
  6922:             }
  6923:           } else if (XEiJ.IRP_MOVEM_LOOP) {  //16回ループする。コンパイラが展開する
  6924:             for (int i = 0; i <= 15; i++) {
  6925:               if ((l & 0x0001 << i) != 0) {
  6926:                 XEiJ.busWle (a, XEiJ.regRn[i]);
  6927:                 a += 4;
  6928:               }
  6929:             }
  6930:           } else if (XEiJ.IRP_MOVEM_SHIFT_LEFT) {  //0になるまで左にシフトする
  6931:             l = XEiJ.MPU_BITREV_TABLE_0[l & 2047] | XEiJ.MPU_BITREV_TABLE_1[l << 10 >>> 21];  //Integer.reverse(l)
  6932:             for (int i = 0; l != 0; i++, l <<= 1) {
  6933:               if (l < 0) {
  6934:                 XEiJ.busWle (a, XEiJ.regRn[i]);
  6935:                 a += 4;
  6936:               }
  6937:             }
  6938:           } else if (XEiJ.IRP_MOVEM_SHIFT_RIGHT) {  //0になるまで右にシフトする
  6939:             for (int i = 0; l != 0; i++, l >>>= 1) {
  6940:               if ((l & 1) != 0) {
  6941:                 XEiJ.busWle (a, XEiJ.regRn[i]);
  6942:                 a += 4;
  6943:               }
  6944:             }
  6945:           } else if (XEiJ.IRP_MOVEM_ZEROS) {  //Integer.numberOfTrailingZerosを使う
  6946:             for (int i = 0; l != 0; ) {
  6947:               int k = Integer.numberOfTrailingZeros (l);
  6948:               XEiJ.busWle (a, XEiJ.regRn[i += k]);
  6949:               a += 4;
  6950:               l = l >>> k & ~1;
  6951:             }
  6952:           }
  6953:         }
  6954:         XEiJ.mpuCycleCount += 0 + (a - t << 1);  //4バイト/個→8サイクル/個
  6955:       }
  6956:     }
  6957:   }  //irpMovemToMemLong
  6958: 
  6959:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  6960:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  6961:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  6962:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  6963:   //TST.B <ea>                                      |-|012346|-|-UUUU|-**00|D M+-WXZ  |0100_101_000_mmm_rrr
  6964:   public static void irpTstByte () throws M68kException {
  6965:     XEiJ.mpuCycleCount += 4;
  6966:     int ea = XEiJ.regOC & 63;
  6967:     XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & (ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : XEiJ.busRbs (efaMltByte (ea)))];  //ccr_tst_byte。アドレッシングモードに注意
  6968:   }  //irpTstByte
  6969: 
  6970:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  6971:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  6972:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  6973:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  6974:   //TST.W <ea>                                      |-|012346|-|-UUUU|-**00|D M+-WXZ  |0100_101_001_mmm_rrr
  6975:   public static void irpTstWord () throws M68kException {
  6976:     XEiJ.mpuCycleCount += 4;
  6977:     int ea = XEiJ.regOC & 63;
  6978:     int z = ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : XEiJ.busRws (efaMltWord (ea));  //アドレッシングモードに注意
  6979:     XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (char) z - 1 >> 31 & XEiJ.REG_CCR_Z | ((short) z < 0 ? XEiJ.REG_CCR_N : 0);  //ccr_tst_word
  6980:   }  //irpTstWord
  6981: 
  6982:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  6983:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  6984:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  6985:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  6986:   //TST.L <ea>                                      |-|012346|-|-UUUU|-**00|D M+-WXZ  |0100_101_010_mmm_rrr
  6987:   public static void irpTstLong () throws M68kException {
  6988:     XEiJ.mpuCycleCount += 4;
  6989:     int ea = XEiJ.regOC & 63;
  6990:     int z = ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : XEiJ.busRls (efaMltLong (ea));  //アドレッシングモードに注意
  6991:     XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X);  //ccr_tst
  6992:   }  //irpTstLong
  6993: 
  6994:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  6995:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  6996:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  6997:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  6998:   //TAS.B <ea>                                      |-|012346|-|-UUUU|-**00|D M+-WXZ  |0100_101_011_mmm_rrr
  6999:   //ILLEGAL                                         |-|012346|-|-----|-----|          |0100_101_011_111_100
  7000:   public static void irpTas () throws M68kException {
  7001:     int ea = XEiJ.regOC & 63;
  7002:     int z;
  7003:     if (ea < XEiJ.EA_AR) {  //TAS.B Dr
  7004:       XEiJ.mpuCycleCount += 4;
  7005:       XEiJ.regRn[ea] = 0x80 | (z = XEiJ.regRn[ea]);
  7006:     } else if (ea == XEiJ.EA_IM) {  //ILLEGAL
  7007:       XEiJ.mpuCycleCount += 34;
  7008:       M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION;
  7009:       throw M68kException.m6eSignal;
  7010:     } else {  //TAS.B <mem>
  7011:       XEiJ.mpuCycleCount += 10;
  7012:       int a = efaMltByte (ea);
  7013:       XEiJ.busWb (a, 0x80 | (z = XEiJ.busRbs (a)));
  7014:     }
  7015:     XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & z];  //ccr_tst_byte
  7016:   }  //irpTas
  7017: 
  7018:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7019:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  7020:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  7021:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7022:   //SATS.L Dr                                       |-|------|-|-UUUU|-**00|D         |0100_110_010_000_rrr (ISA_B)
  7023:   //MOVEM.W <ea>,<list>                             |-|012346|-|-----|-----|  M+ WXZP |0100_110_010_mmm_rrr-llllllllllllllll
  7024:   //
  7025:   //SATS.L Dr
  7026:   //  VがセットされていたらDrを符号が逆で絶対値が最大の値にする(直前のDrに対する演算を飽和演算にする)
  7027:   public static void irpMovemToRegWord () throws M68kException {
  7028:     int ea = XEiJ.regOC & 63;
  7029:     if (ea < XEiJ.EA_AR) {  //SATS.L Dr
  7030:       XEiJ.mpuCycleCount += 4;
  7031:       int z = XEiJ.regRn[ea];
  7032:       if (XEiJ.TEST_BIT_1_SHIFT ? XEiJ.regCCR << 31 - 1 < 0 : (XEiJ.regCCR & XEiJ.REG_CCR_V) != 0) {  //Vがセットされているとき
  7033:         XEiJ.regRn[ea] = z = z >> 31 ^ 0x80000000;  //符号が逆で絶対値が最大の値にする
  7034:       }
  7035:       XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X);  //ccr_tst
  7036:     } else {  //MOVEM.W <ea>,<list>
  7037:       int l = XEiJ.busRwze (XEiJ.regPC);  //pcwze。レジスタリスト。ゼロ拡張
  7038:       XEiJ.regPC += 2;
  7039:       int arr, a;
  7040:       if (ea >> 3 == XEiJ.MMM_MP) {  //(Ar)+
  7041:         XEiJ.mpuCycleCount += 12;
  7042:         arr = ea - (XEiJ.EA_MP - 8);
  7043:         a = XEiJ.regRn[arr];
  7044:       } else {  //(Ar)+以外
  7045:         XEiJ.mpuCycleCount += 8;
  7046:         arr = 16;
  7047:         a = efaCntWord (ea);
  7048:       }
  7049:       if ((a & 1) != 0 && l != 0) {  //奇数アドレスで1ワード以上転送する
  7050:         M68kException.m6eNumber = M68kException.M6E_ADDRESS_ERROR;
  7051:         M68kException.m6eAddress = a;
  7052:         M68kException.m6eDirection = XEiJ.MPU_WR_READ;
  7053:         M68kException.m6eSize = XEiJ.MPU_SS_WORD;
  7054:         throw M68kException.m6eSignal;
  7055:       }
  7056:       int t = a;
  7057:       if (XEiJ.IRP_MOVEM_MAINMEMORY &&  //000のときMOVEMでメインメモリを特別扱いにする
  7058:           (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a >>> XEiJ.BUS_PAGE_BITS] == MemoryMappedDevice.MMD_MMR &&  //メインメモリ
  7059:           (a & XEiJ.BUS_PAGE_SIZE - 1) <= XEiJ.BUS_PAGE_SIZE - 2 * 16) {  //16個転送してもページを跨がない
  7060:         a &= XEiJ.BUS_MOTHER_MASK;
  7061:         if (XEiJ.IRP_MOVEM_EXPAND) {  //16回展開する
  7062:           if ((l & 0x0001) != 0) {
  7063:             XEiJ.regRn[ 0] = MainMemory.mmrM8[a] << 8 | MainMemory.mmrM8[a + 1] & 255;  //データレジスタも符号拡張して32bit全部書き換える
  7064:             a += 2;
  7065:           }
  7066:           if ((l & 0x0002) != 0) {
  7067:             XEiJ.regRn[ 1] = MainMemory.mmrM8[a] << 8 | MainMemory.mmrM8[a + 1] & 255;  //データレジスタも符号拡張して32bit全部書き換える
  7068:             a += 2;
  7069:           }
  7070:           if ((l & 0x0004) != 0) {
  7071:             XEiJ.regRn[ 2] = MainMemory.mmrM8[a] << 8 | MainMemory.mmrM8[a + 1] & 255;  //データレジスタも符号拡張して32bit全部書き換える
  7072:             a += 2;
  7073:           }
  7074:           if ((l & 0x0008) != 0) {
  7075:             XEiJ.regRn[ 3] = MainMemory.mmrM8[a] << 8 | MainMemory.mmrM8[a + 1] & 255;  //データレジスタも符号拡張して32bit全部書き換える
  7076:             a += 2;
  7077:           }
  7078:           if ((l & 0x0010) != 0) {
  7079:             XEiJ.regRn[ 4] = MainMemory.mmrM8[a] << 8 | MainMemory.mmrM8[a + 1] & 255;  //データレジスタも符号拡張して32bit全部書き換える
  7080:             a += 2;
  7081:           }
  7082:           if ((l & 0x0020) != 0) {
  7083:             XEiJ.regRn[ 5] = MainMemory.mmrM8[a] << 8 | MainMemory.mmrM8[a + 1] & 255;  //データレジスタも符号拡張して32bit全部書き換える
  7084:             a += 2;
  7085:           }
  7086:           if ((l & 0x0040) != 0) {
  7087:             XEiJ.regRn[ 6] = MainMemory.mmrM8[a] << 8 | MainMemory.mmrM8[a + 1] & 255;  //データレジスタも符号拡張して32bit全部書き換える
  7088:             a += 2;
  7089:           }
  7090:           if ((byte) l < 0) {  //(l & 0x0080) != 0
  7091:             XEiJ.regRn[ 7] = MainMemory.mmrM8[a] << 8 | MainMemory.mmrM8[a + 1] & 255;  //データレジスタも符号拡張して32bit全部書き換える
  7092:             a += 2;
  7093:           }
  7094:           if ((l & 0x0100) != 0) {
  7095:             XEiJ.regRn[ 8] = MainMemory.mmrM8[a] << 8 | MainMemory.mmrM8[a + 1] & 255;  //符号拡張して32bit全部書き換える
  7096:             a += 2;
  7097:           }
  7098:           if ((l & 0x0200) != 0) {
  7099:             XEiJ.regRn[ 9] = MainMemory.mmrM8[a] << 8 | MainMemory.mmrM8[a + 1] & 255;  //符号拡張して32bit全部書き換える
  7100:             a += 2;
  7101:           }
  7102:           if ((l & 0x0400) != 0) {
  7103:             XEiJ.regRn[10] = MainMemory.mmrM8[a] << 8 | MainMemory.mmrM8[a + 1] & 255;  //符号拡張して32bit全部書き換える
  7104:             a += 2;
  7105:           }
  7106:           if ((l & 0x0800) != 0) {
  7107:             XEiJ.regRn[11] = MainMemory.mmrM8[a] << 8 | MainMemory.mmrM8[a + 1] & 255;  //符号拡張して32bit全部書き換える
  7108:             a += 2;
  7109:           }
  7110:           if ((l & 0x1000) != 0) {
  7111:             XEiJ.regRn[12] = MainMemory.mmrM8[a] << 8 | MainMemory.mmrM8[a + 1] & 255;  //符号拡張して32bit全部書き換える
  7112:             a += 2;
  7113:           }
  7114:           if ((l & 0x2000) != 0) {
  7115:             XEiJ.regRn[13] = MainMemory.mmrM8[a] << 8 | MainMemory.mmrM8[a + 1] & 255;  //符号拡張して32bit全部書き換える
  7116:             a += 2;
  7117:           }
  7118:           if ((l & 0x4000) != 0) {
  7119:             XEiJ.regRn[14] = MainMemory.mmrM8[a] << 8 | MainMemory.mmrM8[a + 1] & 255;  //符号拡張して32bit全部書き換える
  7120:             a += 2;
  7121:           }
  7122:           if ((short) l < 0) {  //(l & 0x8000) != 0
  7123:             XEiJ.regRn[15] = MainMemory.mmrM8[a] << 8 | MainMemory.mmrM8[a + 1] & 255;  //符号拡張して32bit全部書き換える
  7124:             a += 2;
  7125:           }
  7126:         } else if (XEiJ.IRP_MOVEM_LOOP) {  //16回ループする。コンパイラが展開する
  7127:           for (int i = 0; i <= 15; i++) {
  7128:             if ((l & 0x0001 << i) != 0) {
  7129:               XEiJ.regRn[i] = MainMemory.mmrM8[a] << 8 | MainMemory.mmrM8[a + 1] & 255;  //(データレジスタも)符号拡張して32bit全部書き換える
  7130:               a += 2;
  7131:             }
  7132:           }
  7133:         } else if (XEiJ.IRP_MOVEM_SHIFT_LEFT) {  //0になるまで左にシフトする
  7134:           l = XEiJ.MPU_BITREV_TABLE_0[l & 2047] | XEiJ.MPU_BITREV_TABLE_1[l << 10 >>> 21];  //Integer.reverse(l)
  7135:           for (int i = 0; l != 0; i++, l <<= 1) {
  7136:             if (l < 0) {
  7137:               XEiJ.regRn[i] = MainMemory.mmrM8[a] << 8 | MainMemory.mmrM8[a + 1] & 255;  //(データレジスタも)符号拡張して32bit全部書き換える
  7138:               a += 2;
  7139:             }
  7140:           }
  7141:         } else if (XEiJ.IRP_MOVEM_SHIFT_RIGHT) {  //0になるまで右にシフトする
  7142:           for (int i = 0; l != 0; i++, l >>>= 1) {
  7143:             if ((l & 1) != 0) {
  7144:               XEiJ.regRn[i] = MainMemory.mmrM8[a] << 8 | MainMemory.mmrM8[a + 1] & 255;  //(データレジスタも)符号拡張して32bit全部書き換える
  7145:               a += 2;
  7146:             }
  7147:           }
  7148:         } else if (XEiJ.IRP_MOVEM_ZEROS) {  //Integer.numberOfTrailingZerosを使う
  7149:           for (int i = 0; l != 0; ) {
  7150:             int k = Integer.numberOfTrailingZeros (l);
  7151:             XEiJ.regRn[i += k] = MainMemory.mmrM8[a] << 8 | MainMemory.mmrM8[a + 1] & 255;  //(データレジスタも)符号拡張して32bit全部書き換える
  7152:             a += 2;
  7153:             l = l >>> k & ~1;
  7154:           }
  7155:         }
  7156:         a = t + (short) (a - t);
  7157:       } else {  //メインメモリでないかページを跨ぐ可能性がある
  7158:         if (XEiJ.IRP_MOVEM_EXPAND) {  //16回展開する
  7159:           if ((l & 0x0001) != 0) {
  7160:             XEiJ.regRn[ 0] = XEiJ.busRwse (a);  //データレジスタも符号拡張して32bit全部書き換える
  7161:             a += 2;
  7162:           }
  7163:           if ((l & 0x0002) != 0) {
  7164:             XEiJ.regRn[ 1] = XEiJ.busRwse (a);  //データレジスタも符号拡張して32bit全部書き換える
  7165:             a += 2;
  7166:           }
  7167:           if ((l & 0x0004) != 0) {
  7168:             XEiJ.regRn[ 2] = XEiJ.busRwse (a);  //データレジスタも符号拡張して32bit全部書き換える
  7169:             a += 2;
  7170:           }
  7171:           if ((l & 0x0008) != 0) {
  7172:             XEiJ.regRn[ 3] = XEiJ.busRwse (a);  //データレジスタも符号拡張して32bit全部書き換える
  7173:             a += 2;
  7174:           }
  7175:           if ((l & 0x0010) != 0) {
  7176:             XEiJ.regRn[ 4] = XEiJ.busRwse (a);  //データレジスタも符号拡張して32bit全部書き換える
  7177:             a += 2;
  7178:           }
  7179:           if ((l & 0x0020) != 0) {
  7180:             XEiJ.regRn[ 5] = XEiJ.busRwse (a);  //データレジスタも符号拡張して32bit全部書き換える
  7181:             a += 2;
  7182:           }
  7183:           if ((l & 0x0040) != 0) {
  7184:             XEiJ.regRn[ 6] = XEiJ.busRwse (a);  //データレジスタも符号拡張して32bit全部書き換える
  7185:             a += 2;
  7186:           }
  7187:           if ((byte) l < 0) {  //(l & 0x0080) != 0
  7188:             XEiJ.regRn[ 7] = XEiJ.busRwse (a);  //データレジスタも符号拡張して32bit全部書き換える
  7189:             a += 2;
  7190:           }
  7191:           if ((l & 0x0100) != 0) {
  7192:             XEiJ.regRn[ 8] = XEiJ.busRwse (a);  //符号拡張して32bit全部書き換える
  7193:             a += 2;
  7194:           }
  7195:           if ((l & 0x0200) != 0) {
  7196:             XEiJ.regRn[ 9] = XEiJ.busRwse (a);  //符号拡張して32bit全部書き換える
  7197:             a += 2;
  7198:           }
  7199:           if ((l & 0x0400) != 0) {
  7200:             XEiJ.regRn[10] = XEiJ.busRwse (a);  //符号拡張して32bit全部書き換える
  7201:             a += 2;
  7202:           }
  7203:           if ((l & 0x0800) != 0) {
  7204:             XEiJ.regRn[11] = XEiJ.busRwse (a);  //符号拡張して32bit全部書き換える
  7205:             a += 2;
  7206:           }
  7207:           if ((l & 0x1000) != 0) {
  7208:             XEiJ.regRn[12] = XEiJ.busRwse (a);  //符号拡張して32bit全部書き換える
  7209:             a += 2;
  7210:           }
  7211:           if ((l & 0x2000) != 0) {
  7212:             XEiJ.regRn[13] = XEiJ.busRwse (a);  //符号拡張して32bit全部書き換える
  7213:             a += 2;
  7214:           }
  7215:           if ((l & 0x4000) != 0) {
  7216:             XEiJ.regRn[14] = XEiJ.busRwse (a);  //符号拡張して32bit全部書き換える
  7217:             a += 2;
  7218:           }
  7219:           if ((short) l < 0) {  //(l & 0x8000) != 0
  7220:             XEiJ.regRn[15] = XEiJ.busRwse (a);  //符号拡張して32bit全部書き換える
  7221:             a += 2;
  7222:           }
  7223:         } else if (XEiJ.IRP_MOVEM_LOOP) {  //16回ループする。コンパイラが展開する
  7224:           for (int i = 0; i <= 15; i++) {
  7225:             if ((l & 0x0001 << i) != 0) {
  7226:               XEiJ.regRn[i] = XEiJ.busRwse (a);  //(データレジスタも)符号拡張して32bit全部書き換える
  7227:               a += 2;
  7228:             }
  7229:           }
  7230:         } else if (XEiJ.IRP_MOVEM_SHIFT_LEFT) {  //0になるまで左にシフトする
  7231:           l = XEiJ.MPU_BITREV_TABLE_0[l & 2047] | XEiJ.MPU_BITREV_TABLE_1[l << 10 >>> 21];  //Integer.reverse(l)
  7232:           for (int i = 0; l != 0; i++, l <<= 1) {
  7233:             if (l < 0) {
  7234:               XEiJ.regRn[i] = XEiJ.busRwse (a);  //(データレジスタも)符号拡張して32bit全部書き換える
  7235:               a += 2;
  7236:             }
  7237:           }
  7238:         } else if (XEiJ.IRP_MOVEM_SHIFT_RIGHT) {  //0になるまで右にシフトする
  7239:           for (int i = 0; l != 0; i++, l >>>= 1) {
  7240:             if ((l & 1) != 0) {
  7241:               XEiJ.regRn[i] = XEiJ.busRwse (a);  //(データレジスタも)符号拡張して32bit全部書き換える
  7242:               a += 2;
  7243:             }
  7244:           }
  7245:         } else if (XEiJ.IRP_MOVEM_ZEROS) {  //Integer.numberOfTrailingZerosを使う
  7246:           for (int i = 0; l != 0; ) {
  7247:             int k = Integer.numberOfTrailingZeros (l);
  7248:             XEiJ.regRn[i += k] = XEiJ.busRwse (a);  //(データレジスタも)符号拡張して32bit全部書き換える
  7249:             a += 2;
  7250:             l = l >>> k & ~1;
  7251:           }
  7252:         }
  7253:       }
  7254:       if (XEiJ.MPU_OMIT_EXTRA_READ) {
  7255:         //! 軽量化。MC68000のMOVEM.W <ea>,<list>は1ワード余分にリードするが省略する
  7256:         //  MC68000のMOVEM.W <ea>,<list>は1ワード余分にリードするため転送する領域の直後にアクセスできない領域があるとバスエラーが発生する
  7257:         //  RAMDISK.SYSを高速化しようとしてデータ転送ルーチンの転送命令をすべてMOVEMに変更してしまうと、
  7258:         //  12MBフル実装でないX68000の実機で最後のセクタをアクセスしたときだけバスエラーが出て動かなくなるのはこれが原因
  7259:       } else {
  7260:         XEiJ.busRws (a);
  7261:       }
  7262:       //MOVEM.W (Ar)+,<list>で<list>にArが含まれているとき、メモリから読み出したデータを捨ててArをインクリメントする
  7263:       XEiJ.regRn[arr] = a;
  7264:       XEiJ.mpuCycleCount += a - t << 1;  //2バイト/個→4サイクル/個
  7265:     }
  7266:   }  //irpMovemToRegWord
  7267: 
  7268:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7269:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  7270:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  7271:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7272:   //MOVEM.L <ea>,<list>                             |-|012346|-|-----|-----|  M+ WXZP |0100_110_011_mmm_rrr-llllllllllllllll
  7273:   public static void irpMovemToRegLong () throws M68kException {
  7274:     int ea = XEiJ.regOC & 63;
  7275:     {
  7276:       int l = XEiJ.busRwze (XEiJ.regPC);  //pcwze。レジスタリスト。ゼロ拡張
  7277:       XEiJ.regPC += 2;
  7278:       int arr, a;
  7279:       if (ea >> 3 == XEiJ.MMM_MP) {  //(Ar)+
  7280:         XEiJ.mpuCycleCount += 8;
  7281:         arr = ea - (XEiJ.EA_MP - 8);
  7282:         a = XEiJ.regRn[arr];
  7283:       } else {  //(Ar)+以外
  7284:         XEiJ.mpuCycleCount += 4;
  7285:         arr = 16;
  7286:         a = efaCntLong (ea);
  7287:       }
  7288:       if ((a & 1) != 0 && l != 0) {  //奇数アドレスで1ワード以上転送する
  7289:         M68kException.m6eNumber = M68kException.M6E_ADDRESS_ERROR;
  7290:         M68kException.m6eAddress = a;
  7291:         M68kException.m6eDirection = XEiJ.MPU_WR_READ;
  7292:         M68kException.m6eSize = XEiJ.MPU_SS_LONG;
  7293:         throw M68kException.m6eSignal;
  7294:       }
  7295:       int t = a;
  7296:       if (XEiJ.IRP_MOVEM_MAINMEMORY &&  //000のときMOVEMでメインメモリを特別扱いにする
  7297:           (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a >>> XEiJ.BUS_PAGE_BITS] == MemoryMappedDevice.MMD_MMR &&  //メインメモリ
  7298:           (a & XEiJ.BUS_PAGE_SIZE - 1) <= XEiJ.BUS_PAGE_SIZE - 4 * 16) {  //16個転送してもページを跨がない
  7299:         a &= XEiJ.BUS_MOTHER_MASK;
  7300:         if (XEiJ.IRP_MOVEM_EXPAND) {  //16回展開する
  7301:           if ((l & 0x0001) != 0) {
  7302:             XEiJ.regRn[ 0] = MainMemory.mmrM8[a] << 24 | (MainMemory.mmrM8[a + 1] & 255) << 16 | (char) (MainMemory.mmrM8[a + 2] << 8 | MainMemory.mmrM8[a + 3] & 255);
  7303:             a += 4;
  7304:           }
  7305:           if ((l & 0x0002) != 0) {
  7306:             XEiJ.regRn[ 1] = MainMemory.mmrM8[a] << 24 | (MainMemory.mmrM8[a + 1] & 255) << 16 | (char) (MainMemory.mmrM8[a + 2] << 8 | MainMemory.mmrM8[a + 3] & 255);
  7307:             a += 4;
  7308:           }
  7309:           if ((l & 0x0004) != 0) {
  7310:             XEiJ.regRn[ 2] = MainMemory.mmrM8[a] << 24 | (MainMemory.mmrM8[a + 1] & 255) << 16 | (char) (MainMemory.mmrM8[a + 2] << 8 | MainMemory.mmrM8[a + 3] & 255);
  7311:             a += 4;
  7312:           }
  7313:           if ((l & 0x0008) != 0) {
  7314:             XEiJ.regRn[ 3] = MainMemory.mmrM8[a] << 24 | (MainMemory.mmrM8[a + 1] & 255) << 16 | (char) (MainMemory.mmrM8[a + 2] << 8 | MainMemory.mmrM8[a + 3] & 255);
  7315:             a += 4;
  7316:           }
  7317:           if ((l & 0x0010) != 0) {
  7318:             XEiJ.regRn[ 4] = MainMemory.mmrM8[a] << 24 | (MainMemory.mmrM8[a + 1] & 255) << 16 | (char) (MainMemory.mmrM8[a + 2] << 8 | MainMemory.mmrM8[a + 3] & 255);
  7319:             a += 4;
  7320:           }
  7321:           if ((l & 0x0020) != 0) {
  7322:             XEiJ.regRn[ 5] = MainMemory.mmrM8[a] << 24 | (MainMemory.mmrM8[a + 1] & 255) << 16 | (char) (MainMemory.mmrM8[a + 2] << 8 | MainMemory.mmrM8[a + 3] & 255);
  7323:             a += 4;
  7324:           }
  7325:           if ((l & 0x0040) != 0) {
  7326:             XEiJ.regRn[ 6] = MainMemory.mmrM8[a] << 24 | (MainMemory.mmrM8[a + 1] & 255) << 16 | (char) (MainMemory.mmrM8[a + 2] << 8 | MainMemory.mmrM8[a + 3] & 255);
  7327:             a += 4;
  7328:           }
  7329:           if ((byte) l < 0) {  //(l & 0x0080) != 0
  7330:             XEiJ.regRn[ 7] = MainMemory.mmrM8[a] << 24 | (MainMemory.mmrM8[a + 1] & 255) << 16 | (char) (MainMemory.mmrM8[a + 2] << 8 | MainMemory.mmrM8[a + 3] & 255);
  7331:             a += 4;
  7332:           }
  7333:           if ((l & 0x0100) != 0) {
  7334:             XEiJ.regRn[ 8] = MainMemory.mmrM8[a] << 24 | (MainMemory.mmrM8[a + 1] & 255) << 16 | (char) (MainMemory.mmrM8[a + 2] << 8 | MainMemory.mmrM8[a + 3] & 255);
  7335:             a += 4;
  7336:           }
  7337:           if ((l & 0x0200) != 0) {
  7338:             XEiJ.regRn[ 9] = MainMemory.mmrM8[a] << 24 | (MainMemory.mmrM8[a + 1] & 255) << 16 | (char) (MainMemory.mmrM8[a + 2] << 8 | MainMemory.mmrM8[a + 3] & 255);
  7339:             a += 4;
  7340:           }
  7341:           if ((l & 0x0400) != 0) {
  7342:             XEiJ.regRn[10] = MainMemory.mmrM8[a] << 24 | (MainMemory.mmrM8[a + 1] & 255) << 16 | (char) (MainMemory.mmrM8[a + 2] << 8 | MainMemory.mmrM8[a + 3] & 255);
  7343:             a += 4;
  7344:           }
  7345:           if ((l & 0x0800) != 0) {
  7346:             XEiJ.regRn[11] = MainMemory.mmrM8[a] << 24 | (MainMemory.mmrM8[a + 1] & 255) << 16 | (char) (MainMemory.mmrM8[a + 2] << 8 | MainMemory.mmrM8[a + 3] & 255);
  7347:             a += 4;
  7348:           }
  7349:           if ((l & 0x1000) != 0) {
  7350:             XEiJ.regRn[12] = MainMemory.mmrM8[a] << 24 | (MainMemory.mmrM8[a + 1] & 255) << 16 | (char) (MainMemory.mmrM8[a + 2] << 8 | MainMemory.mmrM8[a + 3] & 255);
  7351:             a += 4;
  7352:           }
  7353:           if ((l & 0x2000) != 0) {
  7354:             XEiJ.regRn[13] = MainMemory.mmrM8[a] << 24 | (MainMemory.mmrM8[a + 1] & 255) << 16 | (char) (MainMemory.mmrM8[a + 2] << 8 | MainMemory.mmrM8[a + 3] & 255);
  7355:             a += 4;
  7356:           }
  7357:           if ((l & 0x4000) != 0) {
  7358:             XEiJ.regRn[14] = MainMemory.mmrM8[a] << 24 | (MainMemory.mmrM8[a + 1] & 255) << 16 | (char) (MainMemory.mmrM8[a + 2] << 8 | MainMemory.mmrM8[a + 3] & 255);
  7359:             a += 4;
  7360:           }
  7361:           if ((short) l < 0) {  //(l & 0x8000) != 0
  7362:             XEiJ.regRn[15] = MainMemory.mmrM8[a] << 24 | (MainMemory.mmrM8[a + 1] & 255) << 16 | (char) (MainMemory.mmrM8[a + 2] << 8 | MainMemory.mmrM8[a + 3] & 255);
  7363:             a += 4;
  7364:           }
  7365:         } else if (XEiJ.IRP_MOVEM_LOOP) {  //16回ループする。コンパイラが展開する
  7366:           for (int i = 0; i <= 15; i++) {
  7367:             if ((l & 0x0001 << i) != 0) {
  7368:               XEiJ.regRn[i] = MainMemory.mmrM8[a] << 24 | (MainMemory.mmrM8[a + 1] & 255) << 16 | (char) (MainMemory.mmrM8[a + 2] << 8 | MainMemory.mmrM8[a + 3] & 255);
  7369:               a += 4;
  7370:             }
  7371:           }
  7372:         } else if (XEiJ.IRP_MOVEM_SHIFT_LEFT) {  //0になるまで左にシフトする
  7373:           l = XEiJ.MPU_BITREV_TABLE_0[l & 2047] | XEiJ.MPU_BITREV_TABLE_1[l << 10 >>> 21];  //Integer.reverse(l)
  7374:           for (int i = 0; l != 0; i++, l <<= 1) {
  7375:             if (l < 0) {
  7376:               XEiJ.regRn[i] = MainMemory.mmrM8[a] << 24 | (MainMemory.mmrM8[a + 1] & 255) << 16 | (char) (MainMemory.mmrM8[a + 2] << 8 | MainMemory.mmrM8[a + 3] & 255);
  7377:               a += 4;
  7378:             }
  7379:           }
  7380:         } else if (XEiJ.IRP_MOVEM_SHIFT_RIGHT) {  //0になるまで右にシフトする
  7381:           for (int i = 0; l != 0; i++, l >>>= 1) {
  7382:             if ((l & 1) != 0) {
  7383:               XEiJ.regRn[i] = MainMemory.mmrM8[a] << 24 | (MainMemory.mmrM8[a + 1] & 255) << 16 | (char) (MainMemory.mmrM8[a + 2] << 8 | MainMemory.mmrM8[a + 3] & 255);
  7384:               a += 4;
  7385:             }
  7386:           }
  7387:         } else if (XEiJ.IRP_MOVEM_ZEROS) {  //Integer.numberOfTrailingZerosを使う
  7388:           for (int i = 0; l != 0; ) {
  7389:             int k = Integer.numberOfTrailingZeros (l);
  7390:             XEiJ.regRn[i += k] = MainMemory.mmrM8[a] << 24 | (MainMemory.mmrM8[a + 1] & 255) << 16 | (char) (MainMemory.mmrM8[a + 2] << 8 | MainMemory.mmrM8[a + 3] & 255);
  7391:             a += 4;
  7392:             l = l >>> k & ~1;
  7393:           }
  7394:         }
  7395:         a = t + (short) (a - t);
  7396:       } else {  //メインメモリでないかページを跨ぐ可能性がある
  7397:         if (XEiJ.IRP_MOVEM_EXPAND) {  //16回展開する
  7398:           if ((l & 0x0001) != 0) {
  7399:             XEiJ.regRn[ 0] = XEiJ.busRlse (a);
  7400:             a += 4;
  7401:           }
  7402:           if ((l & 0x0002) != 0) {
  7403:             XEiJ.regRn[ 1] = XEiJ.busRlse (a);
  7404:             a += 4;
  7405:           }
  7406:           if ((l & 0x0004) != 0) {
  7407:             XEiJ.regRn[ 2] = XEiJ.busRlse (a);
  7408:             a += 4;
  7409:           }
  7410:           if ((l & 0x0008) != 0) {
  7411:             XEiJ.regRn[ 3] = XEiJ.busRlse (a);
  7412:             a += 4;
  7413:           }
  7414:           if ((l & 0x0010) != 0) {
  7415:             XEiJ.regRn[ 4] = XEiJ.busRlse (a);
  7416:             a += 4;
  7417:           }
  7418:           if ((l & 0x0020) != 0) {
  7419:             XEiJ.regRn[ 5] = XEiJ.busRlse (a);
  7420:             a += 4;
  7421:           }
  7422:           if ((l & 0x0040) != 0) {
  7423:             XEiJ.regRn[ 6] = XEiJ.busRlse (a);
  7424:             a += 4;
  7425:           }
  7426:           if ((byte) l < 0) {  //(l & 0x0080) != 0
  7427:             XEiJ.regRn[ 7] = XEiJ.busRlse (a);
  7428:             a += 4;
  7429:           }
  7430:           if ((l & 0x0100) != 0) {
  7431:             XEiJ.regRn[ 8] = XEiJ.busRlse (a);
  7432:             a += 4;
  7433:           }
  7434:           if ((l & 0x0200) != 0) {
  7435:             XEiJ.regRn[ 9] = XEiJ.busRlse (a);
  7436:             a += 4;
  7437:           }
  7438:           if ((l & 0x0400) != 0) {
  7439:             XEiJ.regRn[10] = XEiJ.busRlse (a);
  7440:             a += 4;
  7441:           }
  7442:           if ((l & 0x0800) != 0) {
  7443:             XEiJ.regRn[11] = XEiJ.busRlse (a);
  7444:             a += 4;
  7445:           }
  7446:           if ((l & 0x1000) != 0) {
  7447:             XEiJ.regRn[12] = XEiJ.busRlse (a);
  7448:             a += 4;
  7449:           }
  7450:           if ((l & 0x2000) != 0) {
  7451:             XEiJ.regRn[13] = XEiJ.busRlse (a);
  7452:             a += 4;
  7453:           }
  7454:           if ((l & 0x4000) != 0) {
  7455:             XEiJ.regRn[14] = XEiJ.busRlse (a);
  7456:             a += 4;
  7457:           }
  7458:           if ((short) l < 0) {  //(l & 0x8000) != 0
  7459:             XEiJ.regRn[15] = XEiJ.busRlse (a);
  7460:             a += 4;
  7461:           }
  7462:         } else if (XEiJ.IRP_MOVEM_LOOP) {  //16回ループする。コンパイラが展開する
  7463:           for (int i = 0; i <= 15; i++) {
  7464:             if ((l & 0x0001 << i) != 0) {
  7465:               XEiJ.regRn[i] = XEiJ.busRlse (a);
  7466:               a += 4;
  7467:             }
  7468:           }
  7469:         } else if (XEiJ.IRP_MOVEM_SHIFT_LEFT) {  //0になるまで左にシフトする
  7470:           l = XEiJ.MPU_BITREV_TABLE_0[l & 2047] | XEiJ.MPU_BITREV_TABLE_1[l << 10 >>> 21];  //Integer.reverse(l)
  7471:           for (int i = 0; l != 0; i++, l <<= 1) {
  7472:             if (l < 0) {
  7473:               XEiJ.regRn[i] = XEiJ.busRlse (a);
  7474:               a += 4;
  7475:             }
  7476:           }
  7477:         } else if (XEiJ.IRP_MOVEM_SHIFT_RIGHT) {  //0になるまで右にシフトする
  7478:           for (int i = 0; l != 0; i++, l >>>= 1) {
  7479:             if ((l & 1) != 0) {
  7480:               XEiJ.regRn[i] = XEiJ.busRlse (a);
  7481:               a += 4;
  7482:             }
  7483:           }
  7484:         } else if (XEiJ.IRP_MOVEM_ZEROS) {  //Integer.numberOfTrailingZerosを使う
  7485:           for (int i = 0; l != 0; ) {
  7486:             int k = Integer.numberOfTrailingZeros (l);
  7487:             XEiJ.regRn[i += k] = XEiJ.busRlse (a);
  7488:             a += 4;
  7489:             l = l >>> k & ~1;
  7490:           }
  7491:         }
  7492:       }
  7493:       if (XEiJ.MPU_OMIT_EXTRA_READ) {
  7494:         //! 軽量化。MC68000のMOVEM.L <ea>,<list>は1ワード余分にリードするが省略する
  7495:         //  MC68000のMOVEM.L <ea>,<list>は1ワード余分にリードするため転送する領域の直後にアクセスできない領域があるとバスエラーが発生する
  7496:         //  RAMDISK.SYSを高速化しようとしてデータ転送ルーチンの転送命令をすべてMOVEMに変更してしまうと、
  7497:         //  12MBフル実装でないX68000の実機で最後のセクタをアクセスしたときだけバスエラーが出て動かなくなるのはこれが原因
  7498:       } else {
  7499:         XEiJ.busRws (a);
  7500:       }
  7501:       //MOVEM.L (Ar)+,<list>で<list>にArが含まれているとき、メモリから読み出したデータを捨ててArをインクリメントする
  7502:       XEiJ.regRn[arr] = a;  //XEiJ.regRn[arr]は破壊されているのでXEiJ.regRn[arr]+=a-=tは不可
  7503:       XEiJ.mpuCycleCount += a - t << 1;  //4バイト/個→8サイクル/個
  7504:     }
  7505:   }  //irpMovemToRegLong
  7506: 
  7507:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7508:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  7509:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  7510:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7511:   //TRAP #<vector>                                  |-|012346|-|-----|-----|          |0100_111_001_00v_vvv
  7512:   public static void irpTrap () throws M68kException {
  7513:     XEiJ.mpuCycleCount += 34;
  7514:     if (XEiJ.MPU_INLINE_EXCEPTION) {
  7515:       int save_sr = XEiJ.regSRT1 | XEiJ.regSRS | XEiJ.regSRI | XEiJ.regCCR;
  7516:       int sp = XEiJ.regRn[15];
  7517:       XEiJ.regSRT1 = XEiJ.mpuTraceFlag = 0;  //srのTビットを消す
  7518:       if (XEiJ.regSRS == 0) {  //ユーザモードのとき
  7519:         XEiJ.regSRS = XEiJ.REG_SR_S;  //スーパーバイザモードへ移行する
  7520:         XEiJ.mpuUSP = sp;  //USPを保存
  7521:         sp = XEiJ.mpuISP;  //SSPを復元
  7522:         if (DataBreakPoint.DBP_ON) {
  7523:           DataBreakPoint.dbpMemoryMap = DataBreakPoint.dbpSuperMap;  //スーパーバイザメモリマップに切り替える
  7524:         } else {
  7525:           XEiJ.busMemoryMap = XEiJ.busSuperMap;  //スーパーバイザメモリマップに切り替える
  7526:         }
  7527:         if (InstructionBreakPoint.IBP_ON) {
  7528:           InstructionBreakPoint.ibpOp1MemoryMap = InstructionBreakPoint.ibpOp1SuperMap;
  7529:         }
  7530:       }
  7531:       XEiJ.regRn[15] = sp -= 6;
  7532:       XEiJ.busWl (sp + 2, XEiJ.regPC);  //pushl。pcをプッシュする
  7533:       XEiJ.busWw (sp, save_sr);  //pushw。srをプッシュする
  7534:       irpSetPC (XEiJ.busRlsf (XEiJ.regOC - (0x4e40 - M68kException.M6E_TRAP_0_INSTRUCTION_VECTOR) << 2));  //例外ベクタを取り出してジャンプする
  7535:     } else {
  7536:       irpException (XEiJ.regOC - (0x4e40 - M68kException.M6E_TRAP_0_INSTRUCTION_VECTOR), XEiJ.regPC, XEiJ.regSRT1 | XEiJ.regSRS | XEiJ.regSRI | XEiJ.regCCR);  //pcは次の命令
  7537:     }
  7538:   }  //irpTrap
  7539:   public static void irpTrap15 () throws M68kException {
  7540:     if ((XEiJ.regRn[0] & 255) == 0x8e) {  //IOCS _BOOTINF
  7541:       MainMemory.mmrCheckHuman ();
  7542:     }
  7543:     XEiJ.mpuCycleCount += 34;
  7544:     if (XEiJ.MPU_INLINE_EXCEPTION) {
  7545:       int save_sr = XEiJ.regSRT1 | XEiJ.regSRS | XEiJ.regSRI | XEiJ.regCCR;
  7546:       int sp = XEiJ.regRn[15];
  7547:       XEiJ.regSRT1 = XEiJ.mpuTraceFlag = 0;  //srのTビットを消す
  7548:       if (XEiJ.regSRS == 0) {  //ユーザモードのとき
  7549:         XEiJ.regSRS = XEiJ.REG_SR_S;  //スーパーバイザモードへ移行する
  7550:         XEiJ.mpuUSP = sp;  //USPを保存
  7551:         sp = XEiJ.mpuISP;  //SSPを復元
  7552:         if (DataBreakPoint.DBP_ON) {
  7553:           DataBreakPoint.dbpMemoryMap = DataBreakPoint.dbpSuperMap;  //スーパーバイザメモリマップに切り替える
  7554:         } else {
  7555:           XEiJ.busMemoryMap = XEiJ.busSuperMap;  //スーパーバイザメモリマップに切り替える
  7556:         }
  7557:         if (InstructionBreakPoint.IBP_ON) {
  7558:           InstructionBreakPoint.ibpOp1MemoryMap = InstructionBreakPoint.ibpOp1SuperMap;
  7559:         }
  7560:       }
  7561:       XEiJ.regRn[15] = sp -= 6;
  7562:       XEiJ.busWl (sp + 2, XEiJ.regPC);  //pushl。pcをプッシュする
  7563:       XEiJ.busWw (sp, save_sr);  //pushw。srをプッシュする
  7564:       irpSetPC (XEiJ.busRlsf (M68kException.M6E_TRAP_15_INSTRUCTION_VECTOR << 2));  //例外ベクタを取り出してジャンプする
  7565:     } else {
  7566:       irpException (M68kException.M6E_TRAP_15_INSTRUCTION_VECTOR, XEiJ.regPC, XEiJ.regSRT1 | XEiJ.regSRS | XEiJ.regSRI | XEiJ.regCCR);  //pcは次の命令
  7567:     }
  7568:   }  //irpTrap15
  7569: 
  7570:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7571:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  7572:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  7573:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7574:   //LINK.W Ar,#<data>                               |-|012346|-|-----|-----|          |0100_111_001_010_rrr-{data}
  7575:   //
  7576:   //LINK.W Ar,#<data>
  7577:   //  PEA.L (Ar);MOVEA.L A7,Ar;ADDA.W #<data>,A7と同じ
  7578:   //  LINK.W A7,#<data>はA7をデクリメントする前の値がプッシュされ、A7に#<data>が加算される
  7579:   public static void irpLinkWord () throws M68kException {
  7580:     XEiJ.mpuCycleCount += 16;
  7581:     int arr = XEiJ.regOC - (0b0100_111_001_010_000 - 8);
  7582:     //評価順序に注意
  7583:     //  wl(r[15]-=4,r[8+rrr])は不可
  7584:     int sp = XEiJ.regRn[15] - 4;
  7585:     XEiJ.busWl (sp, XEiJ.regRn[arr]);  //pushl
  7586:     if (XEiJ.MPU_COMPOUND_POSTINCREMENT) {
  7587:       XEiJ.regRn[15] = (XEiJ.regRn[arr] = sp) + XEiJ.busRwse ((XEiJ.regPC += 2) - 2);  //pcws
  7588:     } else {
  7589:       int t = XEiJ.regPC;
  7590:       XEiJ.regPC = t + 2;
  7591:       XEiJ.regRn[15] = (XEiJ.regRn[arr] = sp) + XEiJ.busRwse (t);  //pcws
  7592:     }
  7593:   }  //irpLinkWord
  7594: 
  7595:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7596:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  7597:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  7598:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7599:   //UNLK Ar                                         |-|012346|-|-----|-----|          |0100_111_001_011_rrr
  7600:   //
  7601:   //UNLK Ar
  7602:   //  MOVEA.L Ar,A7;MOVEA.L (A7)+,Arと同じ
  7603:   //  UNLK A7はMOVEA.L A7,A7;MOVEA.L (A7)+,A7すなわちMOVEA.L (A7),A7と同じ
  7604:   //  ソースオペランドのポストインクリメントはデスティネーションオペランドが評価される前に完了しているとみなされる
  7605:   //    例えばMOVE.L (A0)+,(A0)+はMOVE.L (A0),(4,A0);ADDQ.L #8,A0と同じ
  7606:   //    MOVEA.L (A0)+,A0はポストインクリメントされたA0が(A0)から読み出された値で上書きされるのでMOVEA.L (A0),A0と同じ
  7607:   //  M68000PRMにUNLK Anの動作はAn→SP;(SP)→An;SP+4→SPだと書かれているがこれはn=7の場合に当てはまらない
  7608:   //  余談だが68040の初期のマスクセットはUNLK A7を実行すると固まるらしい
  7609:   public static void irpUnlk () throws M68kException {
  7610:     XEiJ.mpuCycleCount += 12;
  7611:     int arr = XEiJ.regOC - (0b0100_111_001_011_000 - 8);
  7612:     //評価順序に注意
  7613:     int sp = XEiJ.regRn[arr];
  7614:     XEiJ.regRn[15] = sp + 4;
  7615:     XEiJ.regRn[arr] = XEiJ.busRls (sp);  //popls
  7616:   }  //irpUnlk
  7617: 
  7618:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7619:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  7620:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  7621:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7622:   //MOVE.L Ar,USP                                   |-|012346|P|-----|-----|          |0100_111_001_100_rrr
  7623:   public static void irpMoveToUsp () throws M68kException {
  7624:     if (XEiJ.regSRS == 0) {  //ユーザモードのとき
  7625:       XEiJ.mpuCycleCount += 34;
  7626:       M68kException.m6eNumber = M68kException.M6E_PRIVILEGE_VIOLATION;
  7627:       throw M68kException.m6eSignal;
  7628:     }
  7629:     //以下はスーパーバイザモード
  7630:     XEiJ.mpuCycleCount += 4;
  7631:     XEiJ.mpuUSP = XEiJ.regRn[XEiJ.regOC - (0b0100_111_001_100_000 - 8)];
  7632:   }  //irpMoveToUsp
  7633: 
  7634:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7635:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  7636:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  7637:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7638:   //MOVE.L USP,Ar                                   |-|012346|P|-----|-----|          |0100_111_001_101_rrr
  7639:   public static void irpMoveFromUsp () throws M68kException {
  7640:     if (XEiJ.regSRS == 0) {  //ユーザモードのとき
  7641:       XEiJ.mpuCycleCount += 34;
  7642:       M68kException.m6eNumber = M68kException.M6E_PRIVILEGE_VIOLATION;
  7643:       throw M68kException.m6eSignal;
  7644:     }
  7645:     //以下はスーパーバイザモード
  7646:     XEiJ.mpuCycleCount += 4;
  7647:     XEiJ.regRn[XEiJ.regOC - (0b0100_111_001_101_000 - 8)] = XEiJ.mpuUSP;
  7648:   }  //irpMoveFromUsp
  7649: 
  7650:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7651:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  7652:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  7653:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7654:   //RESET                                           |-|012346|P|-----|-----|          |0100_111_001_110_000
  7655:   public static void irpReset () throws M68kException {
  7656:     if (XEiJ.regSRS == 0) {  //ユーザモードのとき
  7657:       XEiJ.mpuCycleCount += 34;
  7658:       M68kException.m6eNumber = M68kException.M6E_PRIVILEGE_VIOLATION;
  7659:       throw M68kException.m6eSignal;
  7660:     }
  7661:     //以下はスーパーバイザモード
  7662:     XEiJ.mpuCycleCount += 132;
  7663:     XEiJ.irpReset ();
  7664:   }  //irpReset
  7665: 
  7666:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7667:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  7668:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  7669:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7670:   //NOP                                             |-|012346|-|-----|-----|          |0100_111_001_110_001
  7671:   public static void irpNop () throws M68kException {
  7672:     XEiJ.mpuCycleCount += 4;
  7673:     //何もしない
  7674:   }  //irpNop
  7675: 
  7676:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7677:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  7678:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  7679:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7680:   //STOP #<data>                                    |-|012346|P|UUUUU|*****|          |0100_111_001_110_010-{data}
  7681:   //
  7682:   //STOP #<data>
  7683:   //    1. #<data>をsrに設定する
  7684:   //    2. pcを進める
  7685:   //    3. 以下のいずれかの条件が成立するまで停止する
  7686:   //      3a. トレース
  7687:   //      3b. マスクされているレベルよりも高い割り込み要求
  7688:   //      3c. リセット
  7689:   //  コアと一緒にデバイスを止めるわけにいかないので、ここでは条件が成立するまで同じ命令を繰り返すループ命令として実装する
  7690:   public static void irpStop () throws M68kException {
  7691:     if (XEiJ.regSRS == 0) {  //ユーザモードのとき
  7692:       XEiJ.mpuCycleCount += 34;
  7693:       M68kException.m6eNumber = M68kException.M6E_PRIVILEGE_VIOLATION;
  7694:       throw M68kException.m6eSignal;
  7695:     }
  7696:     //以下はスーパーバイザモード
  7697:     XEiJ.mpuCycleCount += 4;
  7698:     irpSetSR (XEiJ.busRwse ((XEiJ.regPC += 2) - 2));  //pcws。特権違反チェックが先
  7699:     if (XEiJ.mpuTraceFlag == 0) {  //トレースまたはマスクされているレベルよりも高い割り込み要求がない
  7700:       XEiJ.regPC = XEiJ.regPC0;  //ループ
  7701:       //任意の負荷率を100%に設定しているときSTOP命令が軽すぎると動作周波数が大きくなりすぎて割り込みがかかったとき次に進めなくなる
  7702:       //負荷率の計算にSTOP命令で止まっていた時間を含めないことにする
  7703:       XEiJ.mpuClockTime += XEiJ.TMR_FREQ * 4 / 1000000;  //4μs。10MHzのとき40clk
  7704:       XEiJ.mpuLastNano += 4000L;
  7705:     }
  7706:   }  //irpStop
  7707: 
  7708:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7709:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  7710:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  7711:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7712:   //RTE                                             |-|012346|P|UUUUU|*****|          |0100_111_001_110_011
  7713:   public static void irpRte () throws M68kException {
  7714:     if (XEiJ.regSRS == 0) {  //ユーザモードのとき
  7715:       XEiJ.mpuCycleCount += 34;
  7716:       M68kException.m6eNumber = M68kException.M6E_PRIVILEGE_VIOLATION;
  7717:       throw M68kException.m6eSignal;
  7718:     }
  7719:     //以下はスーパーバイザモード
  7720:     XEiJ.mpuCycleCount += 20;
  7721:     int sp = XEiJ.regRn[15];
  7722:     XEiJ.regRn[15] = sp + 6;
  7723:     int newSR = XEiJ.busRwz (sp);  //popwz。ここでバスエラーが生じる可能性がある
  7724:     int newPC = XEiJ.busRlse (sp + 2);  //popls。srを読めたのだからspは奇数ではない
  7725:     //irpSetSRでモードが切り替わる場合があるのでその前にr[15]を更新しておくこと
  7726:     irpSetSR (newSR);  //ここでユーザモードに戻る場合がある。特権違反チェックが先
  7727:     irpSetPC (newPC);  //分岐ログが新しいsrを使う。順序に注意
  7728:   }  //irpRte
  7729: 
  7730:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7731:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  7732:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  7733:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7734:   //RTS                                             |-|012346|-|-----|-----|          |0100_111_001_110_101
  7735:   public static void irpRts () throws M68kException {
  7736:     XEiJ.mpuCycleCount += 16;
  7737:     int sp = XEiJ.regRn[15];
  7738:     XEiJ.regRn[15] = sp + 4;
  7739:     irpSetPC (XEiJ.busRls (sp));  //popls
  7740:   }  //irpRts
  7741: 
  7742:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7743:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  7744:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  7745:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7746:   //TRAPV                                           |-|012346|-|---*-|-----|          |0100_111_001_110_110
  7747:   public static void irpTrapv () throws M68kException {
  7748:     if (XEiJ.TEST_BIT_1_SHIFT ? XEiJ.regCCR << 31 - 1 >= 0 : (XEiJ.regCCR & XEiJ.REG_CCR_V) == 0) {  //通過
  7749:       XEiJ.mpuCycleCount += 4;
  7750:     } else {
  7751:       XEiJ.mpuCycleCount += 34;
  7752:       M68kException.m6eNumber = M68kException.M6E_TRAPV_INSTRUCTION;
  7753:       throw M68kException.m6eSignal;
  7754:     }
  7755:   }  //irpTrapv
  7756: 
  7757:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7758:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  7759:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  7760:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7761:   //RTR                                             |-|012346|-|UUUUU|*****|          |0100_111_001_110_111
  7762:   public static void irpRtr () throws M68kException {
  7763:     XEiJ.mpuCycleCount += 20;
  7764:     int sp = XEiJ.regRn[15];
  7765:     XEiJ.regRn[15] = sp + 6;
  7766:     XEiJ.regCCR = XEiJ.REG_CCR_MASK & XEiJ.busRwz (sp);  //popwz
  7767:     irpSetPC (XEiJ.busRlse (sp + 2));  //popls。ccrを読めたのだからspは奇数ではない
  7768:   }  //irpRtr
  7769: 
  7770:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7771:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  7772:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  7773:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7774:   //JSR <ea>                                        |-|012346|-|-----|-----|  M  WXZP |0100_111_010_mmm_rrr
  7775:   //JBSR.L <label>                                  |A|012346|-|-----|-----|          |0100_111_010_111_001-{address}       [JSR <label>]
  7776:   public static void irpJsr () throws M68kException {
  7777:     XEiJ.mpuCycleCount += 16 - 8;
  7778:     int a = efaJmpJsr (XEiJ.regOC & 63);  //プッシュする前に実効アドレスを計算する
  7779:     XEiJ.busWl (XEiJ.regRn[15] -= 4, XEiJ.regPC);  //pushl
  7780:     irpSetPC (a);
  7781:   }  //irpJsr
  7782: 
  7783:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7784:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  7785:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  7786:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7787:   //JMP <ea>                                        |-|012346|-|-----|-----|  M  WXZP |0100_111_011_mmm_rrr
  7788:   //JBRA.L <label>                                  |A|012346|-|-----|-----|          |0100_111_011_111_001-{address}       [JMP <label>]
  7789:   public static void irpJmp () throws M68kException {
  7790:     //XEiJ.mpuCycleCount += 8 - 8;
  7791:     irpSetPC (efaJmpJsr (XEiJ.regOC & 63));
  7792:   }  //irpJmp
  7793: 
  7794:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7795:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  7796:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  7797:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7798:   //ADDQ.B #<data>,<ea>                             |-|012346|-|UUUUU|*****|D M+-WXZ  |0101_qqq_000_mmm_rrr
  7799:   //INC.B <ea>                                      |A|012346|-|UUUUU|*****|D M+-WXZ  |0101_001_000_mmm_rrr [ADDQ.B #1,<ea>]
  7800:   public static void irpAddqByte () throws M68kException {
  7801:     int ea = XEiJ.regOC & 63;
  7802:     int x;
  7803:     int y = ((XEiJ.regOC >> 9) - 1 & 7) + 1;  //qqq==0?8:qqq
  7804:     int z;
  7805:     if (ea < XEiJ.EA_AR) {  //ADDQ.B #<data>,Dr
  7806:       XEiJ.mpuCycleCount += 4;
  7807:       z = (byte) (XEiJ.regRn[ea] = ~0xff & (x = XEiJ.regRn[ea]) | 0xff & (x = (byte) x) + y);
  7808:     } else {  //ADDQ.B #<data>,<mem>
  7809:       XEiJ.mpuCycleCount += 8;
  7810:       int a = efaMltByte (ea);
  7811:       XEiJ.busWb (a, z = (byte) ((x = XEiJ.busRbs (a)) + y));
  7812:     }
  7813:     XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) |
  7814:            (~x & z) >>> 31 << 1 |
  7815:            (x & ~z) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C));  //ccr_addq
  7816:   }  //irpAddqByte
  7817: 
  7818:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7819:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  7820:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  7821:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7822:   //ADDQ.W #<data>,<ea>                             |-|012346|-|UUUUU|*****|D M+-WXZ  |0101_qqq_001_mmm_rrr
  7823:   //ADDQ.W #<data>,Ar                               |-|012346|-|-----|-----| A        |0101_qqq_001_001_rrr
  7824:   //INC.W <ea>                                      |A|012346|-|UUUUU|*****|D M+-WXZ  |0101_001_001_mmm_rrr [ADDQ.W #1,<ea>]
  7825:   //INC.W Ar                                        |A|012346|-|-----|-----| A        |0101_001_001_001_rrr [ADDQ.W #1,Ar]
  7826:   //
  7827:   //ADDQ.W #<data>,Ar
  7828:   //  ソースを符号拡張してロングで加算する
  7829:   public static void irpAddqWord () throws M68kException {
  7830:     int ea = XEiJ.regOC & 63;
  7831:     int y = ((XEiJ.regOC >> 9) - 1 & 7) + 1;  //qqq==0?8:qqq
  7832:     if (ea >> 3 == XEiJ.MMM_AR) {  //ADDQ.W #<data>,Ar
  7833:       XEiJ.mpuCycleCount += 8;  //MC68000 User's Manualに4と書いてあるのは8の間違い
  7834:       XEiJ.regRn[ea] += y;  //ロングで計算する。このr[ea]はアドレスレジスタ
  7835:       //ccrは操作しない
  7836:     } else {
  7837:       int x;
  7838:       int z;
  7839:       if (ea < XEiJ.EA_AR) {  //ADDQ.W #<data>,Dr
  7840:         XEiJ.mpuCycleCount += 4;
  7841:         z = (short) (XEiJ.regRn[ea] = ~0xffff & (x = XEiJ.regRn[ea]) | (char) ((x = (short) x) + y));
  7842:       } else {  //ADDQ.W #<data>,<mem>
  7843:         XEiJ.mpuCycleCount += 8;
  7844:         int a = efaMltWord (ea);
  7845:         XEiJ.busWw (a, z = (short) ((x = XEiJ.busRws (a)) + y));
  7846:       }
  7847:       XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) |
  7848:              (~x & z) >>> 31 << 1 |
  7849:              (x & ~z) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C));  //ccr_addq
  7850:     }
  7851:   }  //irpAddqWord
  7852: 
  7853:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7854:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  7855:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  7856:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7857:   //ADDQ.L #<data>,<ea>                             |-|012346|-|UUUUU|*****|D M+-WXZ  |0101_qqq_010_mmm_rrr
  7858:   //ADDQ.L #<data>,Ar                               |-|012346|-|-----|-----| A        |0101_qqq_010_001_rrr
  7859:   //INC.L <ea>                                      |A|012346|-|UUUUU|*****|D M+-WXZ  |0101_001_010_mmm_rrr [ADDQ.L #1,<ea>]
  7860:   //INC.L Ar                                        |A|012346|-|-----|-----| A        |0101_001_010_001_rrr [ADDQ.L #1,Ar]
  7861:   public static void irpAddqLong () throws M68kException {
  7862:     int ea = XEiJ.regOC & 63;
  7863:     int y = ((XEiJ.regOC >> 9) - 1 & 7) + 1;  //qqq==0?8:qqq
  7864:     if (ea >> 3 == XEiJ.MMM_AR) {  //ADDQ.L #<data>,Ar
  7865:       XEiJ.mpuCycleCount += 8;
  7866:       XEiJ.regRn[ea] += y;  //このr[ea]はアドレスレジスタ
  7867:       //ccrは操作しない
  7868:     } else {
  7869:       int x;
  7870:       int z;
  7871:       if (ea < XEiJ.EA_AR) {  //ADDQ.L #<data>,Dr
  7872:         XEiJ.mpuCycleCount += 8;
  7873:         XEiJ.regRn[ea] = z = (x = XEiJ.regRn[ea]) + y;
  7874:       } else {  //ADDQ.L #<data>,<mem>
  7875:         XEiJ.mpuCycleCount += 12;
  7876:         int a = efaMltLong (ea);
  7877:         XEiJ.busWl (a, z = (x = XEiJ.busRls (a)) + y);
  7878:       }
  7879:       XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) |
  7880:              (~x & z) >>> 31 << 1 |
  7881:              (x & ~z) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C));  //ccr_addq
  7882:     }
  7883:   }  //irpAddqLong
  7884: 
  7885:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7886:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  7887:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  7888:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7889:   //ST.B <ea>                                       |-|012346|-|-----|-----|D M+-WXZ  |0101_000_011_mmm_rrr
  7890:   //SNF.B <ea>                                      |A|012346|-|-----|-----|D M+-WXZ  |0101_000_011_mmm_rrr [ST.B <ea>]
  7891:   //DBT.W Dr,<label>                                |-|012346|-|-----|-----|          |0101_000_011_001_rrr-{offset}
  7892:   //DBNF.W Dr,<label>                               |A|012346|-|-----|-----|          |0101_000_011_001_rrr-{offset}        [DBT.W Dr,<label>]
  7893:   public static void irpSt () throws M68kException {
  7894:     int ea = XEiJ.regOC & 63;
  7895:     //DBT.W Dr,<label>よりもST.B Drを優先する
  7896:     if (ea < XEiJ.EA_AR) {  //ST.B Dr
  7897:       XEiJ.mpuCycleCount += 6;
  7898:       XEiJ.regRn[ea] |= 0xff;
  7899:     } else if (ea < XEiJ.EA_MM) {  //DBT.W Dr,<label>
  7900:       //条件が成立しているので通過
  7901:       XEiJ.mpuCycleCount += 12;
  7902:       if (XEiJ.MPU_OMIT_OFFSET_READ) {
  7903:         //リードを省略する
  7904:       } else {
  7905:         XEiJ.busRws (XEiJ.regPC);
  7906:       }
  7907:       XEiJ.regPC += 2;
  7908:     } else {  //ST.B <mem>
  7909:       XEiJ.mpuCycleCount += 8;
  7910:       //MC68000のSccはリードしてからライトする
  7911:       if (XEiJ.MPU_OMIT_EXTRA_READ) {
  7912:         //! 軽量化。リードを省略する
  7913:         XEiJ.busWb (efaMltByte (ea), 0xff);
  7914:       } else {
  7915:         int a = efaMltByte (ea);
  7916:         XEiJ.busRbs (a);
  7917:         XEiJ.busWb (a, 0xff);
  7918:       }
  7919:     }
  7920:   }  //irpSt
  7921: 
  7922:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7923:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  7924:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  7925:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7926:   //SUBQ.B #<data>,<ea>                             |-|012346|-|UUUUU|*****|D M+-WXZ  |0101_qqq_100_mmm_rrr
  7927:   //DEC.B <ea>                                      |A|012346|-|UUUUU|*****|D M+-WXZ  |0101_001_100_mmm_rrr [SUBQ.B #1,<ea>]
  7928:   public static void irpSubqByte () throws M68kException {
  7929:     int ea = XEiJ.regOC & 63;
  7930:     int x;
  7931:     int y = ((XEiJ.regOC >> 9) - 1 & 7) + 1;  //qqq==0?8:qqq
  7932:     int z;
  7933:     if (ea < XEiJ.EA_AR) {  //SUBQ.B #<data>,Dr
  7934:       XEiJ.mpuCycleCount += 4;
  7935:       z = (byte) (XEiJ.regRn[ea] = ~0xff & (x = XEiJ.regRn[ea]) | 0xff & (x = (byte) x) - y);
  7936:     } else {  //SUBQ.B #<data>,<mem>
  7937:       XEiJ.mpuCycleCount += 8;
  7938:       int a = efaMltByte (ea);
  7939:       XEiJ.busWb (a, z = (byte) ((x = XEiJ.busRbs (a)) - y));
  7940:     }
  7941:     XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) |
  7942:            (x & ~z) >>> 31 << 1 |
  7943:            (~x & z) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C));  //ccr_subq
  7944:   }  //irpSubqByte
  7945: 
  7946:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7947:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  7948:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  7949:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7950:   //SUBQ.W #<data>,<ea>                             |-|012346|-|UUUUU|*****|D M+-WXZ  |0101_qqq_101_mmm_rrr
  7951:   //SUBQ.W #<data>,Ar                               |-|012346|-|-----|-----| A        |0101_qqq_101_001_rrr
  7952:   //DEC.W <ea>                                      |A|012346|-|UUUUU|*****|D M+-WXZ  |0101_001_101_mmm_rrr [SUBQ.W #1,<ea>]
  7953:   //DEC.W Ar                                        |A|012346|-|-----|-----| A        |0101_001_101_001_rrr [SUBQ.W #1,Ar]
  7954:   //
  7955:   //SUBQ.W #<data>,Ar
  7956:   //  ソースを符号拡張してロングで減算する
  7957:   public static void irpSubqWord () throws M68kException {
  7958:     int ea = XEiJ.regOC & 63;
  7959:     int y = ((XEiJ.regOC >> 9) - 1 & 7) + 1;  //qqq==0?8:qqq
  7960:     if (ea >> 3 == XEiJ.MMM_AR) {  //SUBQ.W #<data>,Ar
  7961:       XEiJ.mpuCycleCount += 8;
  7962:       XEiJ.regRn[ea] -= y;  //ロングで計算する。このr[ea]はアドレスレジスタ
  7963:       //ccrは操作しない
  7964:     } else {
  7965:       int x;
  7966:       int z;
  7967:       if (ea < XEiJ.EA_AR) {  //SUBQ.W #<data>,Dr
  7968:         XEiJ.mpuCycleCount += 4;
  7969:         z = (short) (XEiJ.regRn[ea] = ~0xffff & (x = XEiJ.regRn[ea]) | (char) ((x = (short) x) - y));
  7970:       } else {  //SUBQ.W #<data>,<mem>
  7971:         XEiJ.mpuCycleCount += 8;
  7972:         int a = efaMltWord (ea);
  7973:         XEiJ.busWw (a, z = (short) ((x = XEiJ.busRws (a)) - y));
  7974:       }
  7975:       XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) |
  7976:              (x & ~z) >>> 31 << 1 |
  7977:              (~x & z) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C));  //ccr_subq
  7978:     }
  7979:   }  //irpSubqWord
  7980: 
  7981:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7982:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  7983:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  7984:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  7985:   //SUBQ.L #<data>,<ea>                             |-|012346|-|UUUUU|*****|D M+-WXZ  |0101_qqq_110_mmm_rrr
  7986:   //SUBQ.L #<data>,Ar                               |-|012346|-|-----|-----| A        |0101_qqq_110_001_rrr
  7987:   //DEC.L <ea>                                      |A|012346|-|UUUUU|*****|D M+-WXZ  |0101_001_110_mmm_rrr [SUBQ.L #1,<ea>]
  7988:   //DEC.L Ar                                        |A|012346|-|-----|-----| A        |0101_001_110_001_rrr [SUBQ.L #1,Ar]
  7989:   public static void irpSubqLong () throws M68kException {
  7990:     int ea = XEiJ.regOC & 63;
  7991:     int y = ((XEiJ.regOC >> 9) - 1 & 7) + 1;  //qqq==0?8:qqq
  7992:     if (ea >> 3 == XEiJ.MMM_AR) {  //SUBQ.L #<data>,Ar
  7993:       XEiJ.mpuCycleCount += 8;
  7994:       XEiJ.regRn[ea] -= y;  //このr[ea]はアドレスレジスタ
  7995:       //ccrは操作しない
  7996:     } else {
  7997:       int x;
  7998:       int z;
  7999:       if (ea < XEiJ.EA_AR) {  //SUBQ.L #<data>,Dr
  8000:         XEiJ.mpuCycleCount += 8;
  8001:         XEiJ.regRn[ea] = z = (x = XEiJ.regRn[ea]) - y;
  8002:       } else {  //SUBQ.L #<data>,<mem>
  8003:         XEiJ.mpuCycleCount += 12;
  8004:         int a = efaMltLong (ea);
  8005:         XEiJ.busWl (a, z = (x = XEiJ.busRls (a)) - y);
  8006:       }
  8007:       XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) |
  8008:              (x & ~z) >>> 31 << 1 |
  8009:              (~x & z) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C));  //ccr_subq
  8010:     }
  8011:   }  //irpSubqLong
  8012: 
  8013:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  8014:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  8015:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  8016:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  8017:   //SF.B <ea>                                       |-|012346|-|-----|-----|D M+-WXZ  |0101_000_111_mmm_rrr
  8018:   //SNT.B <ea>                                      |A|012346|-|-----|-----|D M+-WXZ  |0101_000_111_mmm_rrr [SF.B <ea>]
  8019:   //DBF.W Dr,<label>                                |-|012346|-|-----|-----|          |0101_000_111_001_rrr-{offset}
  8020:   //DBNT.W Dr,<label>                               |A|012346|-|-----|-----|          |0101_000_111_001_rrr-{offset}        [DBF.W Dr,<label>]
  8021:   //DBRA.W Dr,<label>                               |A|012346|-|-----|-----|          |0101_000_111_001_rrr-{offset}        [DBF.W Dr,<label>]
  8022:   public static void irpSf () throws M68kException {
  8023:     int ea = XEiJ.regOC & 63;
  8024:     //DBRA.W Dr,<label>よりもSF.B Drを優先する
  8025:     if (ea < XEiJ.EA_AR) {  //SF.B Dr
  8026:       XEiJ.mpuCycleCount += 4;
  8027:       XEiJ.regRn[ea] &= ~0xff;
  8028:     } else if (ea < XEiJ.EA_MM) {  //DBRA.W Dr,<label>
  8029:       //条件が成立していないのでデクリメント
  8030:       int rrr = XEiJ.regOC & 7;
  8031:       int t = XEiJ.regRn[rrr];
  8032:       if ((short) t == 0) {  //Drの下位16bitが0なので通過
  8033:         XEiJ.mpuCycleCount += 14;
  8034:         XEiJ.regRn[rrr] = t + 65535;
  8035:         if (XEiJ.MPU_OMIT_OFFSET_READ) {
  8036:           //リードを省略する
  8037:         } else {
  8038:           XEiJ.busRws (XEiJ.regPC);
  8039:         }
  8040:         XEiJ.regPC += 2;
  8041:       } else {  //Drの下位16bitが0でないのでジャンプ
  8042:         XEiJ.mpuCycleCount += 10;
  8043:         XEiJ.regRn[rrr] = t - 1;  //下位16bitが0でないので上位16bitは変化しない
  8044:         irpSetPC (XEiJ.regPC + XEiJ.busRws (XEiJ.regPC));  //pc==pc0+2
  8045:       }
  8046:     } else {  //SF.B <mem>
  8047:       XEiJ.mpuCycleCount += 8;
  8048:       //MC68000のSccはリードしてからライトする
  8049:       if (XEiJ.MPU_OMIT_EXTRA_READ) {
  8050:         //! 軽量化。リードを省略する
  8051:         XEiJ.busWb (efaMltByte (ea), 0x00);
  8052:       } else {
  8053:         int a = efaMltByte (ea);
  8054:         XEiJ.busRbs (a);
  8055:         XEiJ.busWb (a, 0x00);
  8056:       }
  8057:     }
  8058:   }  //irpSf
  8059: 
  8060:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  8061:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  8062:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  8063:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  8064:   //SHI.B <ea>                                      |-|012346|-|--*-*|-----|D M+-WXZ  |0101_001_011_mmm_rrr
  8065:   //SNLS.B <ea>                                     |A|012346|-|--*-*|-----|D M+-WXZ  |0101_001_011_mmm_rrr [SHI.B <ea>]
  8066:   //DBHI.W Dr,<label>                               |-|012346|-|--*-*|-----|          |0101_001_011_001_rrr-{offset}
  8067:   //DBNLS.W Dr,<label>                              |A|012346|-|--*-*|-----|          |0101_001_011_001_rrr-{offset}        [DBHI.W Dr,<label>]
  8068:   public static void irpShi () throws M68kException {
  8069:     int ea = XEiJ.regOC & 63;
  8070:     if (ea >> 3 == XEiJ.MMM_AR) {  //DBHI.W Dr,<label>
  8071:       if (XEiJ.MPU_CC_HI << XEiJ.regCCR < 0) {
  8072:         //条件が成立しているので通過
  8073:         XEiJ.mpuCycleCount += 12;
  8074:         if (XEiJ.MPU_OMIT_OFFSET_READ) {
  8075:           //リードを省略する
  8076:         } else {
  8077:           XEiJ.busRws (XEiJ.regPC);
  8078:         }
  8079:         XEiJ.regPC += 2;
  8080:       } else {
  8081:         //条件が成立していないのでデクリメント
  8082:         int rrr = XEiJ.regOC & 7;
  8083:         int t = XEiJ.regRn[rrr];
  8084:         if ((short) t == 0) {  //Drの下位16bitが0なので通過
  8085:           XEiJ.mpuCycleCount += 14;
  8086:           XEiJ.regRn[rrr] = t + 65535;
  8087:           if (XEiJ.MPU_OMIT_OFFSET_READ) {
  8088:             //リードを省略する
  8089:           } else {
  8090:             XEiJ.busRws (XEiJ.regPC);
  8091:           }
  8092:           XEiJ.regPC += 2;
  8093:         } else {  //Drの下位16bitが0でないのでジャンプ
  8094:           XEiJ.mpuCycleCount += 10;
  8095:           XEiJ.regRn[rrr] = t - 1;  //下位16bitが0でないので上位16bitは変化しない
  8096:           irpSetPC (XEiJ.regPC + XEiJ.busRws (XEiJ.regPC));  //pc==pc0+2
  8097:         }
  8098:       }
  8099:     } else if (ea < XEiJ.EA_AR) {  //SHI.B Dr
  8100:       if (XEiJ.MPU_CC_HI << XEiJ.regCCR < 0) {  //セット
  8101:         XEiJ.mpuCycleCount += 6;
  8102:         XEiJ.regRn[ea] |= 0xff;
  8103:       } else {  //クリア
  8104:         XEiJ.mpuCycleCount += 4;
  8105:         XEiJ.regRn[ea] &= ~0xff;
  8106:       }
  8107:     } else {  //SHI.B <mem>
  8108:       XEiJ.mpuCycleCount += 8;
  8109:       //MC68000のSccはリードしてからライトする
  8110:       if (XEiJ.MPU_OMIT_EXTRA_READ) {
  8111:         //! 軽量化。リードを省略する
  8112:         XEiJ.busWb (efaMltByte (ea), XEiJ.MPU_CC_HI << XEiJ.regCCR >> 31);
  8113:       } else {
  8114:         int a = efaMltByte (ea);
  8115:         XEiJ.busRbs (a);
  8116:         XEiJ.busWb (a, XEiJ.MPU_CC_HI << XEiJ.regCCR >> 31);
  8117:       }
  8118:     }
  8119:   }  //irpShi
  8120: 
  8121:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  8122:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  8123:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  8124:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  8125:   //SLS.B <ea>                                      |-|012346|-|--*-*|-----|D M+-WXZ  |0101_001_111_mmm_rrr
  8126:   //SNHI.B <ea>                                     |A|012346|-|--*-*|-----|D M+-WXZ  |0101_001_111_mmm_rrr [SLS.B <ea>]
  8127:   //DBLS.W Dr,<label>                               |-|012346|-|--*-*|-----|          |0101_001_111_001_rrr-{offset}
  8128:   //DBNHI.W Dr,<label>                              |A|012346|-|--*-*|-----|          |0101_001_111_001_rrr-{offset}        [DBLS.W Dr,<label>]
  8129:   public static void irpSls () throws M68kException {
  8130:     int ea = XEiJ.regOC & 63;
  8131:     if (ea >> 3 == XEiJ.MMM_AR) {  //DBLS.W Dr,<label>
  8132:       if (XEiJ.MPU_CC_LS << XEiJ.regCCR < 0) {
  8133:         //条件が成立しているので通過
  8134:         XEiJ.mpuCycleCount += 12;
  8135:         if (XEiJ.MPU_OMIT_OFFSET_READ) {
  8136:           //リードを省略する
  8137:         } else {
  8138:           XEiJ.busRws (XEiJ.regPC);
  8139:         }
  8140:         XEiJ.regPC += 2;
  8141:       } else {
  8142:         //条件が成立していないのでデクリメント
  8143:         int rrr = XEiJ.regOC & 7;
  8144:         int t = XEiJ.regRn[rrr];
  8145:         if ((short) t == 0) {  //Drの下位16bitが0なので通過
  8146:           XEiJ.mpuCycleCount += 14;
  8147:           XEiJ.regRn[rrr] = t + 65535;
  8148:           if (XEiJ.MPU_OMIT_OFFSET_READ) {
  8149:             //リードを省略する
  8150:           } else {
  8151:             XEiJ.busRws (XEiJ.regPC);
  8152:           }
  8153:           XEiJ.regPC += 2;
  8154:         } else {  //Drの下位16bitが0でないのでジャンプ
  8155:           XEiJ.mpuCycleCount += 10;
  8156:           XEiJ.regRn[rrr] = t - 1;  //下位16bitが0でないので上位16bitは変化しない
  8157:           irpSetPC (XEiJ.regPC + XEiJ.busRws (XEiJ.regPC));  //pc==pc0+2
  8158:         }
  8159:       }
  8160:     } else if (ea < XEiJ.EA_AR) {  //SLS.B Dr
  8161:       if (XEiJ.MPU_CC_LS << XEiJ.regCCR < 0) {  //セット
  8162:         XEiJ.mpuCycleCount += 6;
  8163:         XEiJ.regRn[ea] |= 0xff;
  8164:       } else {  //クリア
  8165:         XEiJ.mpuCycleCount += 4;
  8166:         XEiJ.regRn[ea] &= ~0xff;
  8167:       }
  8168:     } else {  //SLS.B <mem>
  8169:       XEiJ.mpuCycleCount += 8;
  8170:       //MC68000のSccはリードしてからライトする
  8171:       if (XEiJ.MPU_OMIT_EXTRA_READ) {
  8172:         //! 軽量化。リードを省略する
  8173:         XEiJ.busWb (efaMltByte (ea), XEiJ.MPU_CC_LS << XEiJ.regCCR >> 31);
  8174:       } else {
  8175:         int a = efaMltByte (ea);
  8176:         XEiJ.busRbs (a);
  8177:         XEiJ.busWb (a, XEiJ.MPU_CC_LS << XEiJ.regCCR >> 31);
  8178:       }
  8179:     }
  8180:   }  //irpSls
  8181: 
  8182:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  8183:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  8184:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  8185:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  8186:   //SCC.B <ea>                                      |-|012346|-|----*|-----|D M+-WXZ  |0101_010_011_mmm_rrr
  8187:   //SHS.B <ea>                                      |A|012346|-|----*|-----|D M+-WXZ  |0101_010_011_mmm_rrr [SCC.B <ea>]
  8188:   //SNCS.B <ea>                                     |A|012346|-|----*|-----|D M+-WXZ  |0101_010_011_mmm_rrr [SCC.B <ea>]
  8189:   //SNLO.B <ea>                                     |A|012346|-|----*|-----|D M+-WXZ  |0101_010_011_mmm_rrr [SCC.B <ea>]
  8190:   //DBCC.W Dr,<label>                               |-|012346|-|----*|-----|          |0101_010_011_001_rrr-{offset}
  8191:   //DBHS.W Dr,<label>                               |A|012346|-|----*|-----|          |0101_010_011_001_rrr-{offset}        [DBCC.W Dr,<label>]
  8192:   //DBNCS.W Dr,<label>                              |A|012346|-|----*|-----|          |0101_010_011_001_rrr-{offset}        [DBCC.W Dr,<label>]
  8193:   //DBNLO.W Dr,<label>                              |A|012346|-|----*|-----|          |0101_010_011_001_rrr-{offset}        [DBCC.W Dr,<label>]
  8194:   public static void irpShs () throws M68kException {
  8195:     int ea = XEiJ.regOC & 63;
  8196:     if (ea >> 3 == XEiJ.MMM_AR) {  //DBHS.W Dr,<label>
  8197:       if (XEiJ.MPU_CC_HS << XEiJ.regCCR < 0) {
  8198:         //条件が成立しているので通過
  8199:         XEiJ.mpuCycleCount += 12;
  8200:         if (XEiJ.MPU_OMIT_OFFSET_READ) {
  8201:           //リードを省略する
  8202:         } else {
  8203:           XEiJ.busRws (XEiJ.regPC);
  8204:         }
  8205:         XEiJ.regPC += 2;
  8206:       } else {
  8207:         //条件が成立していないのでデクリメント
  8208:         int rrr = XEiJ.regOC & 7;
  8209:         int t = XEiJ.regRn[rrr];
  8210:         if ((short) t == 0) {  //Drの下位16bitが0なので通過
  8211:           XEiJ.mpuCycleCount += 14;
  8212:           XEiJ.regRn[rrr] = t + 65535;
  8213:           if (XEiJ.MPU_OMIT_OFFSET_READ) {
  8214:             //リードを省略する
  8215:           } else {
  8216:             XEiJ.busRws (XEiJ.regPC);
  8217:           }
  8218:           XEiJ.regPC += 2;
  8219:         } else {  //Drの下位16bitが0でないのでジャンプ
  8220:           XEiJ.mpuCycleCount += 10;
  8221:           XEiJ.regRn[rrr] = t - 1;  //下位16bitが0でないので上位16bitは変化しない
  8222:           irpSetPC (XEiJ.regPC + XEiJ.busRws (XEiJ.regPC));  //pc==pc0+2
  8223:         }
  8224:       }
  8225:     } else if (ea < XEiJ.EA_AR) {  //SHS.B Dr
  8226:       if (XEiJ.MPU_CC_HS << XEiJ.regCCR < 0) {  //セット
  8227:         XEiJ.mpuCycleCount += 6;
  8228:         XEiJ.regRn[ea] |= 0xff;
  8229:       } else {  //クリア
  8230:         XEiJ.mpuCycleCount += 4;
  8231:         XEiJ.regRn[ea] &= ~0xff;
  8232:       }
  8233:     } else {  //SHS.B <mem>
  8234:       XEiJ.mpuCycleCount += 8;
  8235:       //MC68000のSccはリードしてからライトする
  8236:       if (XEiJ.MPU_OMIT_EXTRA_READ) {
  8237:         //! 軽量化。リードを省略する
  8238:         XEiJ.busWb (efaMltByte (ea), XEiJ.MPU_CC_HS << XEiJ.regCCR >> 31);
  8239:       } else {
  8240:         int a = efaMltByte (ea);
  8241:         XEiJ.busRbs (a);
  8242:         XEiJ.busWb (a, XEiJ.MPU_CC_HS << XEiJ.regCCR >> 31);
  8243:       }
  8244:     }
  8245:   }  //irpShs
  8246: 
  8247:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  8248:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  8249:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  8250:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  8251:   //SCS.B <ea>                                      |-|012346|-|----*|-----|D M+-WXZ  |0101_010_111_mmm_rrr
  8252:   //SLO.B <ea>                                      |A|012346|-|----*|-----|D M+-WXZ  |0101_010_111_mmm_rrr [SCS.B <ea>]
  8253:   //SNCC.B <ea>                                     |A|012346|-|----*|-----|D M+-WXZ  |0101_010_111_mmm_rrr [SCS.B <ea>]
  8254:   //SNHS.B <ea>                                     |A|012346|-|----*|-----|D M+-WXZ  |0101_010_111_mmm_rrr [SCS.B <ea>]
  8255:   //DBCS.W Dr,<label>                               |-|012346|-|----*|-----|          |0101_010_111_001_rrr-{offset}
  8256:   //DBLO.W Dr,<label>                               |A|012346|-|----*|-----|          |0101_010_111_001_rrr-{offset}        [DBCS.W Dr,<label>]
  8257:   //DBNCC.W Dr,<label>                              |A|012346|-|----*|-----|          |0101_010_111_001_rrr-{offset}        [DBCS.W Dr,<label>]
  8258:   //DBNHS.W Dr,<label>                              |A|012346|-|----*|-----|          |0101_010_111_001_rrr-{offset}        [DBCS.W Dr,<label>]
  8259:   public static void irpSlo () throws M68kException {
  8260:     int ea = XEiJ.regOC & 63;
  8261:     if (ea >> 3 == XEiJ.MMM_AR) {  //DBLO.W Dr,<label>
  8262:       if (XEiJ.MPU_CC_LO << XEiJ.regCCR < 0) {
  8263:         //条件が成立しているので通過
  8264:         XEiJ.mpuCycleCount += 12;
  8265:         if (XEiJ.MPU_OMIT_OFFSET_READ) {
  8266:           //リードを省略する
  8267:         } else {
  8268:           XEiJ.busRws (XEiJ.regPC);
  8269:         }
  8270:         XEiJ.regPC += 2;
  8271:       } else {
  8272:         //条件が成立していないのでデクリメント
  8273:         int rrr = XEiJ.regOC & 7;
  8274:         int t = XEiJ.regRn[rrr];
  8275:         if ((short) t == 0) {  //Drの下位16bitが0なので通過
  8276:           XEiJ.mpuCycleCount += 14;
  8277:           XEiJ.regRn[rrr] = t + 65535;
  8278:           if (XEiJ.MPU_OMIT_OFFSET_READ) {
  8279:             //リードを省略する
  8280:           } else {
  8281:             XEiJ.busRws (XEiJ.regPC);
  8282:           }
  8283:           XEiJ.regPC += 2;
  8284:         } else {  //Drの下位16bitが0でないのでジャンプ
  8285:           XEiJ.mpuCycleCount += 10;
  8286:           XEiJ.regRn[rrr] = t - 1;  //下位16bitが0でないので上位16bitは変化しない
  8287:           irpSetPC (XEiJ.regPC + XEiJ.busRws (XEiJ.regPC));  //pc==pc0+2
  8288:         }
  8289:       }
  8290:     } else if (ea < XEiJ.EA_AR) {  //SLO.B Dr
  8291:       if (XEiJ.MPU_CC_LO << XEiJ.regCCR < 0) {  //セット
  8292:         XEiJ.mpuCycleCount += 6;
  8293:         XEiJ.regRn[ea] |= 0xff;
  8294:       } else {  //クリア
  8295:         XEiJ.mpuCycleCount += 4;
  8296:         XEiJ.regRn[ea] &= ~0xff;
  8297:       }
  8298:     } else {  //SLO.B <mem>
  8299:       XEiJ.mpuCycleCount += 8;
  8300:       //MC68000のSccはリードしてからライトする
  8301:       if (XEiJ.MPU_OMIT_EXTRA_READ) {
  8302:         //! 軽量化。リードを省略する
  8303:         XEiJ.busWb (efaMltByte (ea), XEiJ.MPU_CC_LO << XEiJ.regCCR >> 31);
  8304:       } else {
  8305:         int a = efaMltByte (ea);
  8306:         XEiJ.busRbs (a);
  8307:         XEiJ.busWb (a, XEiJ.MPU_CC_LO << XEiJ.regCCR >> 31);
  8308:       }
  8309:     }
  8310:   }  //irpSlo
  8311: 
  8312:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  8313:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  8314:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  8315:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  8316:   //SNE.B <ea>                                      |-|012346|-|--*--|-----|D M+-WXZ  |0101_011_011_mmm_rrr
  8317:   //SNEQ.B <ea>                                     |A|012346|-|--*--|-----|D M+-WXZ  |0101_011_011_mmm_rrr [SNE.B <ea>]
  8318:   //SNZ.B <ea>                                      |A|012346|-|--*--|-----|D M+-WXZ  |0101_011_011_mmm_rrr [SNE.B <ea>]
  8319:   //SNZE.B <ea>                                     |A|012346|-|--*--|-----|D M+-WXZ  |0101_011_011_mmm_rrr [SNE.B <ea>]
  8320:   //DBNE.W Dr,<label>                               |-|012346|-|--*--|-----|          |0101_011_011_001_rrr-{offset}
  8321:   //DBNEQ.W Dr,<label>                              |A|012346|-|--*--|-----|          |0101_011_011_001_rrr-{offset}        [DBNE.W Dr,<label>]
  8322:   //DBNZ.W Dr,<label>                               |A|012346|-|--*--|-----|          |0101_011_011_001_rrr-{offset}        [DBNE.W Dr,<label>]
  8323:   //DBNZE.W Dr,<label>                              |A|012346|-|--*--|-----|          |0101_011_011_001_rrr-{offset}        [DBNE.W Dr,<label>]
  8324:   public static void irpSne () throws M68kException {
  8325:     int ea = XEiJ.regOC & 63;
  8326:     if (ea >> 3 == XEiJ.MMM_AR) {  //DBNE.W Dr,<label>
  8327:       if (XEiJ.MPU_CC_NE << XEiJ.regCCR < 0) {
  8328:         //条件が成立しているので通過
  8329:         XEiJ.mpuCycleCount += 12;
  8330:         if (XEiJ.MPU_OMIT_OFFSET_READ) {
  8331:           //リードを省略する
  8332:         } else {
  8333:           XEiJ.busRws (XEiJ.regPC);
  8334:         }
  8335:         XEiJ.regPC += 2;
  8336:       } else {
  8337:         //条件が成立していないのでデクリメント
  8338:         int rrr = XEiJ.regOC & 7;
  8339:         int t = XEiJ.regRn[rrr];
  8340:         if ((short) t == 0) {  //Drの下位16bitが0なので通過
  8341:           XEiJ.mpuCycleCount += 14;
  8342:           XEiJ.regRn[rrr] = t + 65535;
  8343:           if (XEiJ.MPU_OMIT_OFFSET_READ) {
  8344:             //リードを省略する
  8345:           } else {
  8346:             XEiJ.busRws (XEiJ.regPC);
  8347:           }
  8348:           XEiJ.regPC += 2;
  8349:         } else {  //Drの下位16bitが0でないのでジャンプ
  8350:           XEiJ.mpuCycleCount += 10;
  8351:           XEiJ.regRn[rrr] = t - 1;  //下位16bitが0でないので上位16bitは変化しない
  8352:           irpSetPC (XEiJ.regPC + XEiJ.busRws (XEiJ.regPC));  //pc==pc0+2
  8353:         }
  8354:       }
  8355:     } else if (ea < XEiJ.EA_AR) {  //SNE.B Dr
  8356:       if (XEiJ.MPU_CC_NE << XEiJ.regCCR < 0) {  //セット
  8357:         XEiJ.mpuCycleCount += 6;
  8358:         XEiJ.regRn[ea] |= 0xff;
  8359:       } else {  //クリア
  8360:         XEiJ.mpuCycleCount += 4;
  8361:         XEiJ.regRn[ea] &= ~0xff;
  8362:       }
  8363:     } else {  //SNE.B <mem>
  8364:       XEiJ.mpuCycleCount += 8;
  8365:       //MC68000のSccはリードしてからライトする
  8366:       if (XEiJ.MPU_OMIT_EXTRA_READ) {
  8367:         //! 軽量化。リードを省略する
  8368:         XEiJ.busWb (efaMltByte (ea), XEiJ.MPU_CC_NE << XEiJ.regCCR >> 31);
  8369:       } else {
  8370:         int a = efaMltByte (ea);
  8371:         XEiJ.busRbs (a);
  8372:         XEiJ.busWb (a, XEiJ.MPU_CC_NE << XEiJ.regCCR >> 31);
  8373:       }
  8374:     }
  8375:   }  //irpSne
  8376: 
  8377:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  8378:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  8379:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  8380:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  8381:   //SEQ.B <ea>                                      |-|012346|-|--*--|-----|D M+-WXZ  |0101_011_111_mmm_rrr
  8382:   //SNNE.B <ea>                                     |A|012346|-|--*--|-----|D M+-WXZ  |0101_011_111_mmm_rrr [SEQ.B <ea>]
  8383:   //SNNZ.B <ea>                                     |A|012346|-|--*--|-----|D M+-WXZ  |0101_011_111_mmm_rrr [SEQ.B <ea>]
  8384:   //SZE.B <ea>                                      |A|012346|-|--*--|-----|D M+-WXZ  |0101_011_111_mmm_rrr [SEQ.B <ea>]
  8385:   //DBEQ.W Dr,<label>                               |-|012346|-|--*--|-----|          |0101_011_111_001_rrr-{offset}
  8386:   //DBNNE.W Dr,<label>                              |A|012346|-|--*--|-----|          |0101_011_111_001_rrr-{offset}        [DBEQ.W Dr,<label>]
  8387:   //DBNNZ.W Dr,<label>                              |A|012346|-|--*--|-----|          |0101_011_111_001_rrr-{offset}        [DBEQ.W Dr,<label>]
  8388:   //DBZE.W Dr,<label>                               |A|012346|-|--*--|-----|          |0101_011_111_001_rrr-{offset}        [DBEQ.W Dr,<label>]
  8389:   public static void irpSeq () throws M68kException {
  8390:     int ea = XEiJ.regOC & 63;
  8391:     if (ea >> 3 == XEiJ.MMM_AR) {  //DBEQ.W Dr,<label>
  8392:       if (XEiJ.MPU_CC_EQ << XEiJ.regCCR < 0) {
  8393:         //条件が成立しているので通過
  8394:         XEiJ.mpuCycleCount += 12;
  8395:         if (XEiJ.MPU_OMIT_OFFSET_READ) {
  8396:           //リードを省略する
  8397:         } else {
  8398:           XEiJ.busRws (XEiJ.regPC);
  8399:         }
  8400:         XEiJ.regPC += 2;
  8401:       } else {
  8402:         //条件が成立していないのでデクリメント
  8403:         int rrr = XEiJ.regOC & 7;
  8404:         int t = XEiJ.regRn[rrr];
  8405:         if ((short) t == 0) {  //Drの下位16bitが0なので通過
  8406:           XEiJ.mpuCycleCount += 14;
  8407:           XEiJ.regRn[rrr] = t + 65535;
  8408:           if (XEiJ.MPU_OMIT_OFFSET_READ) {
  8409:             //リードを省略する
  8410:           } else {
  8411:             XEiJ.busRws (XEiJ.regPC);
  8412:           }
  8413:           XEiJ.regPC += 2;
  8414:         } else {  //Drの下位16bitが0でないのでジャンプ
  8415:           XEiJ.mpuCycleCount += 10;
  8416:           XEiJ.regRn[rrr] = t - 1;  //下位16bitが0でないので上位16bitは変化しない
  8417:           irpSetPC (XEiJ.regPC + XEiJ.busRws (XEiJ.regPC));  //pc==pc0+2
  8418:         }
  8419:       }
  8420:     } else if (ea < XEiJ.EA_AR) {  //SEQ.B Dr
  8421:       if (XEiJ.MPU_CC_EQ << XEiJ.regCCR < 0) {  //セット
  8422:         XEiJ.mpuCycleCount += 6;
  8423:         XEiJ.regRn[ea] |= 0xff;
  8424:       } else {  //クリア
  8425:         XEiJ.mpuCycleCount += 4;
  8426:         XEiJ.regRn[ea] &= ~0xff;
  8427:       }
  8428:     } else {  //SEQ.B <mem>
  8429:       XEiJ.mpuCycleCount += 8;
  8430:       //MC68000のSccはリードしてからライトする
  8431:       if (XEiJ.MPU_OMIT_EXTRA_READ) {
  8432:         //! 軽量化。リードを省略する
  8433:         XEiJ.busWb (efaMltByte (ea), XEiJ.MPU_CC_EQ << XEiJ.regCCR >> 31);
  8434:       } else {
  8435:         int a = efaMltByte (ea);
  8436:         XEiJ.busRbs (a);
  8437:         XEiJ.busWb (a, XEiJ.MPU_CC_EQ << XEiJ.regCCR >> 31);
  8438:       }
  8439:     }
  8440:   }  //irpSeq
  8441: 
  8442:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  8443:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  8444:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  8445:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  8446:   //SVC.B <ea>                                      |-|012346|-|---*-|-----|D M+-WXZ  |0101_100_011_mmm_rrr
  8447:   //SNVS.B <ea>                                     |A|012346|-|---*-|-----|D M+-WXZ  |0101_100_011_mmm_rrr [SVC.B <ea>]
  8448:   //DBVC.W Dr,<label>                               |-|012346|-|---*-|-----|          |0101_100_011_001_rrr-{offset}
  8449:   //DBNVS.W Dr,<label>                              |A|012346|-|---*-|-----|          |0101_100_011_001_rrr-{offset}        [DBVC.W Dr,<label>]
  8450:   public static void irpSvc () throws M68kException {
  8451:     int ea = XEiJ.regOC & 63;
  8452:     if (ea >> 3 == XEiJ.MMM_AR) {  //DBVC.W Dr,<label>
  8453:       if (XEiJ.MPU_CC_VC << XEiJ.regCCR < 0) {
  8454:         //条件が成立しているので通過
  8455:         XEiJ.mpuCycleCount += 12;
  8456:         if (XEiJ.MPU_OMIT_OFFSET_READ) {
  8457:           //リードを省略する
  8458:         } else {
  8459:           XEiJ.busRws (XEiJ.regPC);
  8460:         }
  8461:         XEiJ.regPC += 2;
  8462:       } else {
  8463:         //条件が成立していないのでデクリメント
  8464:         int rrr = XEiJ.regOC & 7;
  8465:         int t = XEiJ.regRn[rrr];
  8466:         if ((short) t == 0) {  //Drの下位16bitが0なので通過
  8467:           XEiJ.mpuCycleCount += 14;
  8468:           XEiJ.regRn[rrr] = t + 65535;
  8469:           if (XEiJ.MPU_OMIT_OFFSET_READ) {
  8470:             //リードを省略する
  8471:           } else {
  8472:             XEiJ.busRws (XEiJ.regPC);
  8473:           }
  8474:           XEiJ.regPC += 2;
  8475:         } else {  //Drの下位16bitが0でないのでジャンプ
  8476:           XEiJ.mpuCycleCount += 10;
  8477:           XEiJ.regRn[rrr] = t - 1;  //下位16bitが0でないので上位16bitは変化しない
  8478:           irpSetPC (XEiJ.regPC + XEiJ.busRws (XEiJ.regPC));  //pc==pc0+2
  8479:         }
  8480:       }
  8481:     } else if (ea < XEiJ.EA_AR) {  //SVC.B Dr
  8482:       if (XEiJ.MPU_CC_VC << XEiJ.regCCR < 0) {  //セット
  8483:         XEiJ.mpuCycleCount += 6;
  8484:         XEiJ.regRn[ea] |= 0xff;
  8485:       } else {  //クリア
  8486:         XEiJ.mpuCycleCount += 4;
  8487:         XEiJ.regRn[ea] &= ~0xff;
  8488:       }
  8489:     } else {  //SVC.B <mem>
  8490:       XEiJ.mpuCycleCount += 8;
  8491:       //MC68000のSccはリードしてからライトする
  8492:       if (XEiJ.MPU_OMIT_EXTRA_READ) {
  8493:         //! 軽量化。リードを省略する
  8494:         XEiJ.busWb (efaMltByte (ea), XEiJ.MPU_CC_VC << XEiJ.regCCR >> 31);
  8495:       } else {
  8496:         int a = efaMltByte (ea);
  8497:         XEiJ.busRbs (a);
  8498:         XEiJ.busWb (a, XEiJ.MPU_CC_VC << XEiJ.regCCR >> 31);
  8499:       }
  8500:     }
  8501:   }  //irpSvc
  8502: 
  8503:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  8504:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  8505:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  8506:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  8507:   //SVS.B <ea>                                      |-|012346|-|---*-|-----|D M+-WXZ  |0101_100_111_mmm_rrr
  8508:   //SNVC.B <ea>                                     |A|012346|-|---*-|-----|D M+-WXZ  |0101_100_111_mmm_rrr [SVS.B <ea>]
  8509:   //DBVS.W Dr,<label>                               |-|012346|-|---*-|-----|          |0101_100_111_001_rrr-{offset}
  8510:   //DBNVC.W Dr,<label>                              |A|012346|-|---*-|-----|          |0101_100_111_001_rrr-{offset}        [DBVS.W Dr,<label>]
  8511:   public static void irpSvs () throws M68kException {
  8512:     int ea = XEiJ.regOC & 63;
  8513:     if (ea >> 3 == XEiJ.MMM_AR) {  //DBVS.W Dr,<label>
  8514:       if (XEiJ.MPU_CC_VS << XEiJ.regCCR < 0) {
  8515:         //条件が成立しているので通過
  8516:         XEiJ.mpuCycleCount += 12;
  8517:         if (XEiJ.MPU_OMIT_OFFSET_READ) {
  8518:           //リードを省略する
  8519:         } else {
  8520:           XEiJ.busRws (XEiJ.regPC);
  8521:         }
  8522:         XEiJ.regPC += 2;
  8523:       } else {
  8524:         //条件が成立していないのでデクリメント
  8525:         int rrr = XEiJ.regOC & 7;
  8526:         int t = XEiJ.regRn[rrr];
  8527:         if ((short) t == 0) {  //Drの下位16bitが0なので通過
  8528:           XEiJ.mpuCycleCount += 14;
  8529:           XEiJ.regRn[rrr] = t + 65535;
  8530:           if (XEiJ.MPU_OMIT_OFFSET_READ) {
  8531:             //リードを省略する
  8532:           } else {
  8533:             XEiJ.busRws (XEiJ.regPC);
  8534:           }
  8535:           XEiJ.regPC += 2;
  8536:         } else {  //Drの下位16bitが0でないのでジャンプ
  8537:           XEiJ.mpuCycleCount += 10;
  8538:           XEiJ.regRn[rrr] = t - 1;  //下位16bitが0でないので上位16bitは変化しない
  8539:           irpSetPC (XEiJ.regPC + XEiJ.busRws (XEiJ.regPC));  //pc==pc0+2
  8540:         }
  8541:       }
  8542:     } else if (ea < XEiJ.EA_AR) {  //SVS.B Dr
  8543:       if (XEiJ.MPU_CC_VS << XEiJ.regCCR < 0) {  //セット
  8544:         XEiJ.mpuCycleCount += 6;
  8545:         XEiJ.regRn[ea] |= 0xff;
  8546:       } else {  //クリア
  8547:         XEiJ.mpuCycleCount += 4;
  8548:         XEiJ.regRn[ea] &= ~0xff;
  8549:       }
  8550:     } else {  //SVS.B <mem>
  8551:       XEiJ.mpuCycleCount += 8;
  8552:       //MC68000のSccはリードしてからライトする
  8553:       if (XEiJ.MPU_OMIT_EXTRA_READ) {
  8554:         //! 軽量化。リードを省略する
  8555:         XEiJ.busWb (efaMltByte (ea), XEiJ.MPU_CC_VS << XEiJ.regCCR >> 31);
  8556:       } else {
  8557:         int a = efaMltByte (ea);
  8558:         XEiJ.busRbs (a);
  8559:         XEiJ.busWb (a, XEiJ.MPU_CC_VS << XEiJ.regCCR >> 31);
  8560:       }
  8561:     }
  8562:   }  //irpSvs
  8563: 
  8564:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  8565:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  8566:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  8567:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  8568:   //SPL.B <ea>                                      |-|012346|-|-*---|-----|D M+-WXZ  |0101_101_011_mmm_rrr
  8569:   //SNMI.B <ea>                                     |A|012346|-|-*---|-----|D M+-WXZ  |0101_101_011_mmm_rrr [SPL.B <ea>]
  8570:   //DBPL.W Dr,<label>                               |-|012346|-|-*---|-----|          |0101_101_011_001_rrr-{offset}
  8571:   //DBNMI.W Dr,<label>                              |A|012346|-|-*---|-----|          |0101_101_011_001_rrr-{offset}        [DBPL.W Dr,<label>]
  8572:   public static void irpSpl () throws M68kException {
  8573:     int ea = XEiJ.regOC & 63;
  8574:     if (ea >> 3 == XEiJ.MMM_AR) {  //DBPL.W Dr,<label>
  8575:       if (XEiJ.MPU_CC_PL << XEiJ.regCCR < 0) {
  8576:         //条件が成立しているので通過
  8577:         XEiJ.mpuCycleCount += 12;
  8578:         if (XEiJ.MPU_OMIT_OFFSET_READ) {
  8579:           //リードを省略する
  8580:         } else {
  8581:           XEiJ.busRws (XEiJ.regPC);
  8582:         }
  8583:         XEiJ.regPC += 2;
  8584:       } else {
  8585:         //条件が成立していないのでデクリメント
  8586:         int rrr = XEiJ.regOC & 7;
  8587:         int t = XEiJ.regRn[rrr];
  8588:         if ((short) t == 0) {  //Drの下位16bitが0なので通過
  8589:           XEiJ.mpuCycleCount += 14;
  8590:           XEiJ.regRn[rrr] = t + 65535;
  8591:           if (XEiJ.MPU_OMIT_OFFSET_READ) {
  8592:             //リードを省略する
  8593:           } else {
  8594:             XEiJ.busRws (XEiJ.regPC);
  8595:           }
  8596:           XEiJ.regPC += 2;
  8597:         } else {  //Drの下位16bitが0でないのでジャンプ
  8598:           XEiJ.mpuCycleCount += 10;
  8599:           XEiJ.regRn[rrr] = t - 1;  //下位16bitが0でないので上位16bitは変化しない
  8600:           irpSetPC (XEiJ.regPC + XEiJ.busRws (XEiJ.regPC));  //pc==pc0+2
  8601:         }
  8602:       }
  8603:     } else if (ea < XEiJ.EA_AR) {  //SPL.B Dr
  8604:       if (XEiJ.MPU_CC_PL << XEiJ.regCCR < 0) {  //セット
  8605:         XEiJ.mpuCycleCount += 6;
  8606:         XEiJ.regRn[ea] |= 0xff;
  8607:       } else {  //クリア
  8608:         XEiJ.mpuCycleCount += 4;
  8609:         XEiJ.regRn[ea] &= ~0xff;
  8610:       }
  8611:     } else {  //SPL.B <mem>
  8612:       XEiJ.mpuCycleCount += 8;
  8613:       //MC68000のSccはリードしてからライトする
  8614:       if (XEiJ.MPU_OMIT_EXTRA_READ) {
  8615:         //! 軽量化。リードを省略する
  8616:         XEiJ.busWb (efaMltByte (ea), XEiJ.MPU_CC_PL << XEiJ.regCCR >> 31);
  8617:       } else {
  8618:         int a = efaMltByte (ea);
  8619:         XEiJ.busRbs (a);
  8620:         XEiJ.busWb (a, XEiJ.MPU_CC_PL << XEiJ.regCCR >> 31);
  8621:       }
  8622:     }
  8623:   }  //irpSpl
  8624: 
  8625:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  8626:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  8627:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  8628:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  8629:   //SMI.B <ea>                                      |-|012346|-|-*---|-----|D M+-WXZ  |0101_101_111_mmm_rrr
  8630:   //SNPL.B <ea>                                     |A|012346|-|-*---|-----|D M+-WXZ  |0101_101_111_mmm_rrr [SMI.B <ea>]
  8631:   //DBMI.W Dr,<label>                               |-|012346|-|-*---|-----|          |0101_101_111_001_rrr-{offset}
  8632:   //DBNPL.W Dr,<label>                              |A|012346|-|-*---|-----|          |0101_101_111_001_rrr-{offset}        [DBMI.W Dr,<label>]
  8633:   public static void irpSmi () throws M68kException {
  8634:     int ea = XEiJ.regOC & 63;
  8635:     if (ea >> 3 == XEiJ.MMM_AR) {  //DBMI.W Dr,<label>
  8636:       if (XEiJ.MPU_CC_MI << XEiJ.regCCR < 0) {
  8637:         //条件が成立しているので通過
  8638:         XEiJ.mpuCycleCount += 12;
  8639:         if (XEiJ.MPU_OMIT_OFFSET_READ) {
  8640:           //リードを省略する
  8641:         } else {
  8642:           XEiJ.busRws (XEiJ.regPC);
  8643:         }
  8644:         XEiJ.regPC += 2;
  8645:       } else {
  8646:         //条件が成立していないのでデクリメント
  8647:         int rrr = XEiJ.regOC & 7;
  8648:         int t = XEiJ.regRn[rrr];
  8649:         if ((short) t == 0) {  //Drの下位16bitが0なので通過
  8650:           XEiJ.mpuCycleCount += 14;
  8651:           XEiJ.regRn[rrr] = t + 65535;
  8652:           if (XEiJ.MPU_OMIT_OFFSET_READ) {
  8653:             //リードを省略する
  8654:           } else {
  8655:             XEiJ.busRws (XEiJ.regPC);
  8656:           }
  8657:           XEiJ.regPC += 2;
  8658:         } else {  //Drの下位16bitが0でないのでジャンプ
  8659:           XEiJ.mpuCycleCount += 10;
  8660:           XEiJ.regRn[rrr] = t - 1;  //下位16bitが0でないので上位16bitは変化しない
  8661:           irpSetPC (XEiJ.regPC + XEiJ.busRws (XEiJ.regPC));  //pc==pc0+2
  8662:         }
  8663:       }
  8664:     } else if (ea < XEiJ.EA_AR) {  //SMI.B Dr
  8665:       if (XEiJ.MPU_CC_MI << XEiJ.regCCR < 0) {  //セット
  8666:         XEiJ.mpuCycleCount += 6;
  8667:         XEiJ.regRn[ea] |= 0xff;
  8668:       } else {  //クリア
  8669:         XEiJ.mpuCycleCount += 4;
  8670:         XEiJ.regRn[ea] &= ~0xff;
  8671:       }
  8672:     } else {  //SMI.B <mem>
  8673:       XEiJ.mpuCycleCount += 8;
  8674:       //MC68000のSccはリードしてからライトする
  8675:       if (XEiJ.MPU_OMIT_EXTRA_READ) {
  8676:         //! 軽量化。リードを省略する
  8677:         XEiJ.busWb (efaMltByte (ea), XEiJ.MPU_CC_MI << XEiJ.regCCR >> 31);
  8678:       } else {
  8679:         int a = efaMltByte (ea);
  8680:         XEiJ.busRbs (a);
  8681:         XEiJ.busWb (a, XEiJ.MPU_CC_MI << XEiJ.regCCR >> 31);
  8682:       }
  8683:     }
  8684:   }  //irpSmi
  8685: 
  8686:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  8687:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  8688:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  8689:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  8690:   //SGE.B <ea>                                      |-|012346|-|-*-*-|-----|D M+-WXZ  |0101_110_011_mmm_rrr
  8691:   //SNLT.B <ea>                                     |A|012346|-|-*-*-|-----|D M+-WXZ  |0101_110_011_mmm_rrr [SGE.B <ea>]
  8692:   //DBGE.W Dr,<label>                               |-|012346|-|-*-*-|-----|          |0101_110_011_001_rrr-{offset}
  8693:   //DBNLT.W Dr,<label>                              |A|012346|-|-*-*-|-----|          |0101_110_011_001_rrr-{offset}        [DBGE.W Dr,<label>]
  8694:   public static void irpSge () throws M68kException {
  8695:     int ea = XEiJ.regOC & 63;
  8696:     if (ea >> 3 == XEiJ.MMM_AR) {  //DBGE.W Dr,<label>
  8697:       if (XEiJ.MPU_CC_GE << XEiJ.regCCR < 0) {
  8698:         //条件が成立しているので通過
  8699:         XEiJ.mpuCycleCount += 12;
  8700:         if (XEiJ.MPU_OMIT_OFFSET_READ) {
  8701:           //リードを省略する
  8702:         } else {
  8703:           XEiJ.busRws (XEiJ.regPC);
  8704:         }
  8705:         XEiJ.regPC += 2;
  8706:       } else {
  8707:         //条件が成立していないのでデクリメント
  8708:         int rrr = XEiJ.regOC & 7;
  8709:         int t = XEiJ.regRn[rrr];
  8710:         if ((short) t == 0) {  //Drの下位16bitが0なので通過
  8711:           XEiJ.mpuCycleCount += 14;
  8712:           XEiJ.regRn[rrr] = t + 65535;
  8713:           if (XEiJ.MPU_OMIT_OFFSET_READ) {
  8714:             //リードを省略する
  8715:           } else {
  8716:             XEiJ.busRws (XEiJ.regPC);
  8717:           }
  8718:           XEiJ.regPC += 2;
  8719:         } else {  //Drの下位16bitが0でないのでジャンプ
  8720:           XEiJ.mpuCycleCount += 10;
  8721:           XEiJ.regRn[rrr] = t - 1;  //下位16bitが0でないので上位16bitは変化しない
  8722:           irpSetPC (XEiJ.regPC + XEiJ.busRws (XEiJ.regPC));  //pc==pc0+2
  8723:         }
  8724:       }
  8725:     } else if (ea < XEiJ.EA_AR) {  //SGE.B Dr
  8726:       if (XEiJ.MPU_CC_GE << XEiJ.regCCR < 0) {  //セット
  8727:         XEiJ.mpuCycleCount += 6;
  8728:         XEiJ.regRn[ea] |= 0xff;
  8729:       } else {  //クリア
  8730:         XEiJ.mpuCycleCount += 4;
  8731:         XEiJ.regRn[ea] &= ~0xff;
  8732:       }
  8733:     } else {  //SGE.B <mem>
  8734:       XEiJ.mpuCycleCount += 8;
  8735:       //MC68000のSccはリードしてからライトする
  8736:       if (XEiJ.MPU_OMIT_EXTRA_READ) {
  8737:         //! 軽量化。リードを省略する
  8738:         XEiJ.busWb (efaMltByte (ea), XEiJ.MPU_CC_GE << XEiJ.regCCR >> 31);
  8739:       } else {
  8740:         int a = efaMltByte (ea);
  8741:         XEiJ.busRbs (a);
  8742:         XEiJ.busWb (a, XEiJ.MPU_CC_GE << XEiJ.regCCR >> 31);
  8743:       }
  8744:     }
  8745:   }  //irpSge
  8746: 
  8747:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  8748:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  8749:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  8750:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  8751:   //SLT.B <ea>                                      |-|012346|-|-*-*-|-----|D M+-WXZ  |0101_110_111_mmm_rrr
  8752:   //SNGE.B <ea>                                     |A|012346|-|-*-*-|-----|D M+-WXZ  |0101_110_111_mmm_rrr [SLT.B <ea>]
  8753:   //DBLT.W Dr,<label>                               |-|012346|-|-*-*-|-----|          |0101_110_111_001_rrr-{offset}
  8754:   //DBNGE.W Dr,<label>                              |A|012346|-|-*-*-|-----|          |0101_110_111_001_rrr-{offset}        [DBLT.W Dr,<label>]
  8755:   public static void irpSlt () throws M68kException {
  8756:     int ea = XEiJ.regOC & 63;
  8757:     if (ea >> 3 == XEiJ.MMM_AR) {  //DBLT.W Dr,<label>
  8758:       if (XEiJ.MPU_CC_LT << XEiJ.regCCR < 0) {
  8759:         //条件が成立しているので通過
  8760:         XEiJ.mpuCycleCount += 12;
  8761:         if (XEiJ.MPU_OMIT_OFFSET_READ) {
  8762:           //リードを省略する
  8763:         } else {
  8764:           XEiJ.busRws (XEiJ.regPC);
  8765:         }
  8766:         XEiJ.regPC += 2;
  8767:       } else {
  8768:         //条件が成立していないのでデクリメント
  8769:         int rrr = XEiJ.regOC & 7;
  8770:         int t = XEiJ.regRn[rrr];
  8771:         if ((short) t == 0) {  //Drの下位16bitが0なので通過
  8772:           XEiJ.mpuCycleCount += 14;
  8773:           XEiJ.regRn[rrr] = t + 65535;
  8774:           if (XEiJ.MPU_OMIT_OFFSET_READ) {
  8775:             //リードを省略する
  8776:           } else {
  8777:             XEiJ.busRws (XEiJ.regPC);
  8778:           }
  8779:           XEiJ.regPC += 2;
  8780:         } else {  //Drの下位16bitが0でないのでジャンプ
  8781:           XEiJ.mpuCycleCount += 10;
  8782:           XEiJ.regRn[rrr] = t - 1;  //下位16bitが0でないので上位16bitは変化しない
  8783:           irpSetPC (XEiJ.regPC + XEiJ.busRws (XEiJ.regPC));  //pc==pc0+2
  8784:         }
  8785:       }
  8786:     } else if (ea < XEiJ.EA_AR) {  //SLT.B Dr
  8787:       if (XEiJ.MPU_CC_LT << XEiJ.regCCR < 0) {  //セット
  8788:         XEiJ.mpuCycleCount += 6;
  8789:         XEiJ.regRn[ea] |= 0xff;
  8790:       } else {  //クリア
  8791:         XEiJ.mpuCycleCount += 4;
  8792:         XEiJ.regRn[ea] &= ~0xff;
  8793:       }
  8794:     } else {  //SLT.B <mem>
  8795:       XEiJ.mpuCycleCount += 8;
  8796:       //MC68000のSccはリードしてからライトする
  8797:       if (XEiJ.MPU_OMIT_EXTRA_READ) {
  8798:         //! 軽量化。リードを省略する
  8799:         XEiJ.busWb (efaMltByte (ea), XEiJ.MPU_CC_LT << XEiJ.regCCR >> 31);
  8800:       } else {
  8801:         int a = efaMltByte (ea);
  8802:         XEiJ.busRbs (a);
  8803:         XEiJ.busWb (a, XEiJ.MPU_CC_LT << XEiJ.regCCR >> 31);
  8804:       }
  8805:     }
  8806:   }  //irpSlt
  8807: 
  8808:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  8809:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  8810:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  8811:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  8812:   //SGT.B <ea>                                      |-|012346|-|-***-|-----|D M+-WXZ  |0101_111_011_mmm_rrr
  8813:   //SNLE.B <ea>                                     |A|012346|-|-***-|-----|D M+-WXZ  |0101_111_011_mmm_rrr [SGT.B <ea>]
  8814:   //DBGT.W Dr,<label>                               |-|012346|-|-***-|-----|          |0101_111_011_001_rrr-{offset}
  8815:   //DBNLE.W Dr,<label>                              |A|012346|-|-***-|-----|          |0101_111_011_001_rrr-{offset}        [DBGT.W Dr,<label>]
  8816:   public static void irpSgt () throws M68kException {
  8817:     int ea = XEiJ.regOC & 63;
  8818:     if (ea >> 3 == XEiJ.MMM_AR) {  //DBGT.W Dr,<label>
  8819:       if (XEiJ.MPU_CC_GT << XEiJ.regCCR < 0) {
  8820:         //条件が成立しているので通過
  8821:         XEiJ.mpuCycleCount += 12;
  8822:         if (XEiJ.MPU_OMIT_OFFSET_READ) {
  8823:           //リードを省略する
  8824:         } else {
  8825:           XEiJ.busRws (XEiJ.regPC);
  8826:         }
  8827:         XEiJ.regPC += 2;
  8828:       } else {
  8829:         //条件が成立していないのでデクリメント
  8830:         int rrr = XEiJ.regOC & 7;
  8831:         int t = XEiJ.regRn[rrr];
  8832:         if ((short) t == 0) {  //Drの下位16bitが0なので通過
  8833:           XEiJ.mpuCycleCount += 14;
  8834:           XEiJ.regRn[rrr] = t + 65535;
  8835:           if (XEiJ.MPU_OMIT_OFFSET_READ) {
  8836:             //リードを省略する
  8837:           } else {
  8838:             XEiJ.busRws (XEiJ.regPC);
  8839:           }
  8840:           XEiJ.regPC += 2;
  8841:         } else {  //Drの下位16bitが0でないのでジャンプ
  8842:           XEiJ.mpuCycleCount += 10;
  8843:           XEiJ.regRn[rrr] = t - 1;  //下位16bitが0でないので上位16bitは変化しない
  8844:           irpSetPC (XEiJ.regPC + XEiJ.busRws (XEiJ.regPC));  //pc==pc0+2
  8845:         }
  8846:       }
  8847:     } else if (ea < XEiJ.EA_AR) {  //SGT.B Dr
  8848:       if (XEiJ.MPU_CC_GT << XEiJ.regCCR < 0) {  //セット
  8849:         XEiJ.mpuCycleCount += 6;
  8850:         XEiJ.regRn[ea] |= 0xff;
  8851:       } else {  //クリア
  8852:         XEiJ.mpuCycleCount += 4;
  8853:         XEiJ.regRn[ea] &= ~0xff;
  8854:       }
  8855:     } else {  //SGT.B <mem>
  8856:       XEiJ.mpuCycleCount += 8;
  8857:       //MC68000のSccはリードしてからライトする
  8858:       if (XEiJ.MPU_OMIT_EXTRA_READ) {
  8859:         //! 軽量化。リードを省略する
  8860:         XEiJ.busWb (efaMltByte (ea), XEiJ.MPU_CC_GT << XEiJ.regCCR >> 31);
  8861:       } else {
  8862:         int a = efaMltByte (ea);
  8863:         XEiJ.busRbs (a);
  8864:         XEiJ.busWb (a, XEiJ.MPU_CC_GT << XEiJ.regCCR >> 31);
  8865:       }
  8866:     }
  8867:   }  //irpSgt
  8868: 
  8869:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  8870:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  8871:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  8872:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  8873:   //SLE.B <ea>                                      |-|012346|-|-***-|-----|D M+-WXZ  |0101_111_111_mmm_rrr
  8874:   //SNGT.B <ea>                                     |A|012346|-|-***-|-----|D M+-WXZ  |0101_111_111_mmm_rrr [SLE.B <ea>]
  8875:   //DBLE.W Dr,<label>                               |-|012346|-|-***-|-----|          |0101_111_111_001_rrr-{offset}
  8876:   //DBNGT.W Dr,<label>                              |A|012346|-|-***-|-----|          |0101_111_111_001_rrr-{offset}        [DBLE.W Dr,<label>]
  8877:   public static void irpSle () throws M68kException {
  8878:     int ea = XEiJ.regOC & 63;
  8879:     if (ea >> 3 == XEiJ.MMM_AR) {  //DBLE.W Dr,<label>
  8880:       if (XEiJ.MPU_CC_LE << XEiJ.regCCR < 0) {
  8881:         //条件が成立しているので通過
  8882:         XEiJ.mpuCycleCount += 12;
  8883:         if (XEiJ.MPU_OMIT_OFFSET_READ) {
  8884:           //リードを省略する
  8885:         } else {
  8886:           XEiJ.busRws (XEiJ.regPC);
  8887:         }
  8888:         XEiJ.regPC += 2;
  8889:       } else {
  8890:         //条件が成立していないのでデクリメント
  8891:         int rrr = XEiJ.regOC & 7;
  8892:         int t = XEiJ.regRn[rrr];
  8893:         if ((short) t == 0) {  //Drの下位16bitが0なので通過
  8894:           XEiJ.mpuCycleCount += 14;
  8895:           XEiJ.regRn[rrr] = t + 65535;
  8896:           if (XEiJ.MPU_OMIT_OFFSET_READ) {
  8897:             //リードを省略する
  8898:           } else {
  8899:             XEiJ.busRws (XEiJ.regPC);
  8900:           }
  8901:           XEiJ.regPC += 2;
  8902:         } else {  //Drの下位16bitが0でないのでジャンプ
  8903:           XEiJ.mpuCycleCount += 10;
  8904:           XEiJ.regRn[rrr] = t - 1;  //下位16bitが0でないので上位16bitは変化しない
  8905:           irpSetPC (XEiJ.regPC + XEiJ.busRws (XEiJ.regPC));  //pc==pc0+2
  8906:         }
  8907:       }
  8908:     } else if (ea < XEiJ.EA_AR) {  //SLE.B Dr
  8909:       if (XEiJ.MPU_CC_LE << XEiJ.regCCR < 0) {  //セット
  8910:         XEiJ.mpuCycleCount += 6;
  8911:         XEiJ.regRn[ea] |= 0xff;
  8912:       } else {  //クリア
  8913:         XEiJ.mpuCycleCount += 4;
  8914:         XEiJ.regRn[ea] &= ~0xff;
  8915:       }
  8916:     } else {  //SLE.B <mem>
  8917:       XEiJ.mpuCycleCount += 8;
  8918:       //MC68000のSccはリードしてからライトする
  8919:       if (XEiJ.MPU_OMIT_EXTRA_READ) {
  8920:         //! 軽量化。リードを省略する
  8921:         XEiJ.busWb (efaMltByte (ea), XEiJ.MPU_CC_LE << XEiJ.regCCR >> 31);
  8922:       } else {
  8923:         int a = efaMltByte (ea);
  8924:         XEiJ.busRbs (a);
  8925:         XEiJ.busWb (a, XEiJ.MPU_CC_LE << XEiJ.regCCR >> 31);
  8926:       }
  8927:     }
  8928:   }  //irpSle
  8929: 
  8930:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  8931:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  8932:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  8933:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  8934:   //BRA.W <label>                                   |-|012346|-|-----|-----|          |0110_000_000_000_000-{offset}
  8935:   //JBRA.W <label>                                  |A|012346|-|-----|-----|          |0110_000_000_000_000-{offset}        [BRA.W <label>]
  8936:   //BRA.S <label>                                   |-|012346|-|-----|-----|          |0110_000_000_sss_sss (s is not equal to 0)
  8937:   //JBRA.S <label>                                  |A|012346|-|-----|-----|          |0110_000_000_sss_sss (s is not equal to 0)   [BRA.S <label>]
  8938:   public static void irpBrasw () throws M68kException {
  8939:     XEiJ.mpuCycleCount += 10;
  8940:     int t = XEiJ.regPC;  //pc0+2
  8941:     int s = (byte) XEiJ.regOC;  //オフセット
  8942:     if (s == 0) {  //BRA.W
  8943:       XEiJ.regPC = t + 2;
  8944:       s = XEiJ.busRwse (t);  //pcws
  8945:     } else {  //BRA.S
  8946:       //MC68000のBRA.S/BSR.S/Bcc.Sは分岐するとき分岐しない方の直後のワードをリードする
  8947:       //  2MB搭載機で$1FFFFEに無限ループ$60FE(BRA.S (*))を書いて飛び込むと$200000でバスエラーが出る
  8948:       if (XEiJ.MPU_OMIT_EXTRA_READ) {
  8949:         //! 軽量化。リードを省略する
  8950:       } else {
  8951:         XEiJ.busRwse (t);  //pcws
  8952:       }
  8953:     }
  8954:     irpSetPC (t + s);  //pc0+2+オフセット
  8955:   }  //irpBrasw
  8956: 
  8957:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  8958:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  8959:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  8960:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  8961:   //BRA.S <label>                                   |-|012346|-|-----|-----|          |0110_000_001_sss_sss
  8962:   //JBRA.S <label>                                  |A|012346|-|-----|-----|          |0110_000_001_sss_sss [BRA.S <label>]
  8963:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  8964:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  8965:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  8966:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  8967:   //BRA.S <label>                                   |-|012346|-|-----|-----|          |0110_000_010_sss_sss
  8968:   //JBRA.S <label>                                  |A|012346|-|-----|-----|          |0110_000_010_sss_sss [BRA.S <label>]
  8969:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  8970:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  8971:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  8972:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  8973:   //BRA.S <label>                                   |-|01----|-|-----|-----|          |0110_000_011_sss_sss
  8974:   //JBRA.S <label>                                  |A|01----|-|-----|-----|          |0110_000_011_sss_sss [BRA.S <label>]
  8975:   public static void irpBras () throws M68kException {
  8976:     XEiJ.mpuCycleCount += 10;
  8977:     int t = XEiJ.regPC;  //pc0+2
  8978:     int s = (byte) XEiJ.regOC;  //オフセット
  8979:     //MC68000のBRA.S/BSR.S/Bcc.Sは分岐するとき分岐しない方の直後のワードをリードする
  8980:     //  2MB搭載機で$1FFFFEに無限ループ$60FE(BRA.S (*))を書いて飛び込むと$200000でバスエラーが出る
  8981:     if (XEiJ.MPU_OMIT_EXTRA_READ) {
  8982:       //! 軽量化。リードを省略する
  8983:     } else {
  8984:       XEiJ.busRwse (t);  //pcws
  8985:     }
  8986:     irpSetPC (t + s);  //pc0+2+オフセット
  8987:   }  //irpBras
  8988: 
  8989:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  8990:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  8991:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  8992:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  8993:   //BSR.W <label>                                   |-|012346|-|-----|-----|          |0110_000_100_000_000-{offset}
  8994:   //JBSR.W <label>                                  |A|012346|-|-----|-----|          |0110_000_100_000_000-{offset}        [BSR.W <label>]
  8995:   //BSR.S <label>                                   |-|012346|-|-----|-----|          |0110_000_100_sss_sss (s is not equal to 0)
  8996:   //JBSR.S <label>                                  |A|012346|-|-----|-----|          |0110_000_100_sss_sss (s is not equal to 0)   [BSR.S <label>]
  8997:   public static void irpBsrsw () throws M68kException {
  8998:     XEiJ.mpuCycleCount += 18;
  8999:     int t = XEiJ.regPC;  //pc0+2
  9000:     int s = (byte) XEiJ.regOC;  //オフセット
  9001:     if (s == 0) {  //BSR.W
  9002:       XEiJ.regPC = t + 2;
  9003:       s = XEiJ.busRwse (t);  //pcws
  9004:     } else {  //BSR.S
  9005:       //MC68000のBRA.S/BSR.S/Bcc.Sは分岐するとき分岐しない方の直後のワードをリードする
  9006:       //  2MB搭載機で$1FFFFEに無限ループ$60FE(BRA.S (*))を書いて飛び込むと$200000でバスエラーが出る
  9007:       if (XEiJ.MPU_OMIT_EXTRA_READ) {
  9008:         //! 軽量化。リードを省略する
  9009:       } else {
  9010:         XEiJ.busRwse (t);  //pcws
  9011:       }
  9012:     }
  9013:     XEiJ.busWl (XEiJ.regRn[15] -= 4, XEiJ.regPC);  //pushl
  9014:     irpSetPC (t + s);  //pc0+2+オフセット
  9015:   }  //irpBsrsw
  9016: 
  9017:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  9018:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  9019:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  9020:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  9021:   //BSR.S <label>                                   |-|012346|-|-----|-----|          |0110_000_101_sss_sss
  9022:   //JBSR.S <label>                                  |A|012346|-|-----|-----|          |0110_000_101_sss_sss [BSR.S <label>]
  9023:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  9024:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  9025:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  9026:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  9027:   //BSR.S <label>                                   |-|012346|-|-----|-----|          |0110_000_110_sss_sss
  9028:   //JBSR.S <label>                                  |A|012346|-|-----|-----|          |0110_000_110_sss_sss [BSR.S <label>]
  9029:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  9030:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  9031:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  9032:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  9033:   //BSR.S <label>                                   |-|01----|-|-----|-----|          |0110_000_111_sss_sss
  9034:   //JBSR.S <label>                                  |A|01----|-|-----|-----|          |0110_000_111_sss_sss [BSR.S <label>]
  9035:   public static void irpBsrs () throws M68kException {
  9036:     XEiJ.mpuCycleCount += 18;
  9037:     int t = XEiJ.regPC;  //pc0+2
  9038:     int s = (byte) XEiJ.regOC;  //オフセット
  9039:     //MC68000のBRA.S/BSR.S/Bcc.Sは分岐するとき分岐しない方の直後のワードをリードする
  9040:     //  2MB搭載機で$1FFFFEに無限ループ$60FE(BRA.S (*))を書いて飛び込むと$200000でバスエラーが出る
  9041:     if (XEiJ.MPU_OMIT_EXTRA_READ) {
  9042:       //! 軽量化。リードを省略する
  9043:     } else {
  9044:       XEiJ.busRwse (t);  //pcws
  9045:     }
  9046:     XEiJ.busWl (XEiJ.regRn[15] -= 4, XEiJ.regPC);  //pushl
  9047:     irpSetPC (t + s);  //pc0+2+オフセット
  9048:   }  //irpBsrs
  9049: 
  9050:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  9051:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  9052:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  9053:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  9054:   //BHI.W <label>                                   |-|012346|-|--*-*|-----|          |0110_001_000_000_000-{offset}
  9055:   //BNLS.W <label>                                  |A|012346|-|--*-*|-----|          |0110_001_000_000_000-{offset}        [BHI.W <label>]
  9056:   //JBHI.W <label>                                  |A|012346|-|--*-*|-----|          |0110_001_000_000_000-{offset}        [BHI.W <label>]
  9057:   //JBNLS.W <label>                                 |A|012346|-|--*-*|-----|          |0110_001_000_000_000-{offset}        [BHI.W <label>]
  9058:   //BHI.S <label>                                   |-|012346|-|--*-*|-----|          |0110_001_000_sss_sss (s is not equal to 0)
  9059:   //BNLS.S <label>                                  |A|012346|-|--*-*|-----|          |0110_001_000_sss_sss (s is not equal to 0)   [BHI.S <label>]
  9060:   //JBHI.S <label>                                  |A|012346|-|--*-*|-----|          |0110_001_000_sss_sss (s is not equal to 0)   [BHI.S <label>]
  9061:   //JBNLS.S <label>                                 |A|012346|-|--*-*|-----|          |0110_001_000_sss_sss (s is not equal to 0)   [BHI.S <label>]
  9062:   //JBLS.L <label>                                  |A|012346|-|--*-*|-----|          |0110_001_000_000_110-0100111011111001-{address}      [BHI.S (*)+8;JMP <label>]
  9063:   //JBNHI.L <label>                                 |A|012346|-|--*-*|-----|          |0110_001_000_000_110-0100111011111001-{address}      [BHI.S (*)+8;JMP <label>]
  9064:   public static void irpBhisw () throws M68kException {
  9065:     if (XEiJ.MPU_CC_HI << XEiJ.regCCR < 0) {  //Bccでジャンプ
  9066:       XEiJ.mpuCycleCount += 10;
  9067:       int t = XEiJ.regPC;  //pc0+2
  9068:       int s = (byte) XEiJ.regOC;  //オフセット
  9069:       if (s == 0) {  //Bcc.Wでジャンプ
  9070:         XEiJ.regPC = t + 2;
  9071:         s = XEiJ.busRwse (t);  //pcws
  9072:       } else {  //Bcc.Sでジャンプ
  9073:         //MC68000のBRA.S/BSR.S/Bcc.Sは分岐するとき分岐しない方の直後のワードをリードする
  9074:         //  2MB搭載機で$1FFFFEに無限ループ$60FE(BRA.S (*))を書いて飛び込むと$200000でバスエラーが出る
  9075:         if (XEiJ.MPU_OMIT_EXTRA_READ) {
  9076:           //! 軽量化。リードを省略する
  9077:         } else {
  9078:           XEiJ.busRwse (t);  //pcws
  9079:         }
  9080:       }
  9081:       irpSetPC (t + s);  //pc0+2+オフセット
  9082:     } else if (XEiJ.regOC == 0x6200) {  //Bcc.Wで通過
  9083:       XEiJ.mpuCycleCount += 12;
  9084:       if (XEiJ.MPU_OMIT_OFFSET_READ) {
  9085:         //リードを省略する
  9086:       } else {
  9087:         XEiJ.busRws (XEiJ.regPC);
  9088:       }
  9089:       XEiJ.regPC += 2;
  9090:     } else {  //Bcc.Sで通過
  9091:       XEiJ.mpuCycleCount += 8;
  9092:     }
  9093:   }  //irpBhisw
  9094: 
  9095:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  9096:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  9097:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  9098:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  9099:   //BHI.S <label>                                   |-|012346|-|--*-*|-----|          |0110_001_001_sss_sss
  9100:   //BNLS.S <label>                                  |A|012346|-|--*-*|-----|          |0110_001_001_sss_sss [BHI.S <label>]
  9101:   //JBHI.S <label>                                  |A|012346|-|--*-*|-----|          |0110_001_001_sss_sss [BHI.S <label>]
  9102:   //JBNLS.S <label>                                 |A|012346|-|--*-*|-----|          |0110_001_001_sss_sss [BHI.S <label>]
  9103:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  9104:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  9105:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  9106:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  9107:   //BHI.S <label>                                   |-|012346|-|--*-*|-----|          |0110_001_010_sss_sss
  9108:   //BNLS.S <label>                                  |A|012346|-|--*-*|-----|          |0110_001_010_sss_sss [BHI.S <label>]
  9109:   //JBHI.S <label>                                  |A|012346|-|--*-*|-----|          |0110_001_010_sss_sss [BHI.S <label>]
  9110:   //JBNLS.S <label>                                 |A|012346|-|--*-*|-----|          |0110_001_010_sss_sss [BHI.S <label>]
  9111:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  9112:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  9113:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  9114:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  9115:   //BHI.S <label>                                   |-|01----|-|--*-*|-----|          |0110_001_011_sss_sss
  9116:   //BNLS.S <label>                                  |A|01----|-|--*-*|-----|          |0110_001_011_sss_sss [BHI.S <label>]
  9117:   //JBHI.S <label>                                  |A|01----|-|--*-*|-----|          |0110_001_011_sss_sss [BHI.S <label>]
  9118:   //JBNLS.S <label>                                 |A|01----|-|--*-*|-----|          |0110_001_011_sss_sss [BHI.S <label>]
  9119:   public static void irpBhis () throws M68kException {
  9120:     if (XEiJ.MPU_CC_HI << XEiJ.regCCR < 0) {  //Bcc.Sでジャンプ
  9121:       XEiJ.mpuCycleCount += 10;
  9122:       int t = XEiJ.regPC;  //pc0+2
  9123:       int s = (byte) XEiJ.regOC;  //オフセット
  9124:       //MC68000のBRA.S/BSR.S/Bcc.Sは分岐するとき分岐しない方の直後のワードをリードする
  9125:       //  2MB搭載機で$1FFFFEに無限ループ$60FE(BRA.S (*))を書いて飛び込むと$200000でバスエラーが出る
  9126:       if (XEiJ.MPU_OMIT_EXTRA_READ) {
  9127:         //! 軽量化。リードを省略する
  9128:       } else {
  9129:         XEiJ.busRwse (t);  //pcws
  9130:       }
  9131:       irpSetPC (t + s);  //pc0+2+オフセット
  9132:     } else {  //Bcc.Sで通過
  9133:       XEiJ.mpuCycleCount += 8;
  9134:     }
  9135:   }  //irpBhis
  9136: 
  9137:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  9138:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  9139:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  9140:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  9141:   //BLS.W <label>                                   |-|012346|-|--*-*|-----|          |0110_001_100_000_000-{offset}
  9142:   //BNHI.W <label>                                  |A|012346|-|--*-*|-----|          |0110_001_100_000_000-{offset}        [BLS.W <label>]
  9143:   //JBLS.W <label>                                  |A|012346|-|--*-*|-----|          |0110_001_100_000_000-{offset}        [BLS.W <label>]
  9144:   //JBNHI.W <label>                                 |A|012346|-|--*-*|-----|          |0110_001_100_000_000-{offset}        [BLS.W <label>]
  9145:   //BLS.S <label>                                   |-|012346|-|--*-*|-----|          |0110_001_100_sss_sss (s is not equal to 0)
  9146:   //BNHI.S <label>                                  |A|012346|-|--*-*|-----|          |0110_001_100_sss_sss (s is not equal to 0)   [BLS.S <label>]
  9147:   //JBLS.S <label>                                  |A|012346|-|--*-*|-----|          |0110_001_100_sss_sss (s is not equal to 0)   [BLS.S <label>]
  9148:   //JBNHI.S <label>                                 |A|012346|-|--*-*|-----|          |0110_001_100_sss_sss (s is not equal to 0)   [BLS.S <label>]
  9149:   //JBHI.L <label>                                  |A|012346|-|--*-*|-----|          |0110_001_100_000_110-0100111011111001-{address}      [BLS.S (*)+8;JMP <label>]
  9150:   //JBNLS.L <label>                                 |A|012346|-|--*-*|-----|          |0110_001_100_000_110-0100111011111001-{address}      [BLS.S (*)+8;JMP <label>]
  9151:   public static void irpBlssw () throws M68kException {
  9152:     if (XEiJ.MPU_CC_LS << XEiJ.regCCR < 0) {  //Bccでジャンプ
  9153:       XEiJ.mpuCycleCount += 10;
  9154:       int t = XEiJ.regPC;  //pc0+2
  9155:       int s = (byte) XEiJ.regOC;  //オフセット
  9156:       if (s == 0) {  //Bcc.Wでジャンプ
  9157:         XEiJ.regPC = t + 2;
  9158:         s = XEiJ.busRwse (t);  //pcws
  9159:       } else {  //Bcc.Sでジャンプ
  9160:         //MC68000のBRA.S/BSR.S/Bcc.Sは分岐するとき分岐しない方の直後のワードをリードする
  9161:         //  2MB搭載機で$1FFFFEに無限ループ$60FE(BRA.S (*))を書いて飛び込むと$200000でバスエラーが出る
  9162:         if (XEiJ.MPU_OMIT_EXTRA_READ) {
  9163:           //! 軽量化。リードを省略する
  9164:         } else {
  9165:           XEiJ.busRwse (t);  //pcws
  9166:         }
  9167:       }
  9168:       irpSetPC (t + s);  //pc0+2+オフセット
  9169:     } else if (XEiJ.regOC == 0x6300) {  //Bcc.Wで通過
  9170:       XEiJ.mpuCycleCount += 12;
  9171:       if (XEiJ.MPU_OMIT_OFFSET_READ) {
  9172:         //リードを省略する
  9173:       } else {
  9174:         XEiJ.busRws (XEiJ.regPC);
  9175:       }
  9176:       XEiJ.regPC += 2;
  9177:     } else {  //Bcc.Sで通過
  9178:       XEiJ.mpuCycleCount += 8;
  9179:     }
  9180:   }  //irpBlssw
  9181: 
  9182:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  9183:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  9184:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  9185:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  9186:   //BLS.S <label>                                   |-|012346|-|--*-*|-----|          |0110_001_101_sss_sss
  9187:   //BNHI.S <label>                                  |A|012346|-|--*-*|-----|          |0110_001_101_sss_sss [BLS.S <label>]
  9188:   //JBLS.S <label>                                  |A|012346|-|--*-*|-----|          |0110_001_101_sss_sss [BLS.S <label>]
  9189:   //JBNHI.S <label>                                 |A|012346|-|--*-*|-----|          |0110_001_101_sss_sss [BLS.S <label>]
  9190:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  9191:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  9192:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  9193:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  9194:   //BLS.S <label>                                   |-|012346|-|--*-*|-----|          |0110_001_110_sss_sss
  9195:   //BNHI.S <label>                                  |A|012346|-|--*-*|-----|          |0110_001_110_sss_sss [BLS.S <label>]
  9196:   //JBLS.S <label>                                  |A|012346|-|--*-*|-----|          |0110_001_110_sss_sss [BLS.S <label>]
  9197:   //JBNHI.S <label>                                 |A|012346|-|--*-*|-----|          |0110_001_110_sss_sss [BLS.S <label>]
  9198:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  9199:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  9200:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  9201:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  9202:   //BLS.S <label>                                   |-|01----|-|--*-*|-----|          |0110_001_111_sss_sss
  9203:   //BNHI.S <label>                                  |A|01----|-|--*-*|-----|          |0110_001_111_sss_sss [BLS.S <label>]
  9204:   //JBLS.S <label>                                  |A|01----|-|--*-*|-----|          |0110_001_111_sss_sss [BLS.S <label>]
  9205:   //JBNHI.S <label>                                 |A|01----|-|--*-*|-----|          |0110_001_111_sss_sss [BLS.S <label>]
  9206:   public static void irpBlss () throws M68kException {
  9207:     if (XEiJ.MPU_CC_LS << XEiJ.regCCR < 0) {  //Bcc.Sでジャンプ
  9208:       XEiJ.mpuCycleCount += 10;
  9209:       int t = XEiJ.regPC;  //pc0+2
  9210:       int s = (byte) XEiJ.regOC;  //オフセット
  9211:       //MC68000のBRA.S/BSR.S/Bcc.Sは分岐するとき分岐しない方の直後のワードをリードする
  9212:       //  2MB搭載機で$1FFFFEに無限ループ$60FE(BRA.S (*))を書いて飛び込むと$200000でバスエラーが出る
  9213:       if (XEiJ.MPU_OMIT_EXTRA_READ) {
  9214:         //! 軽量化。リードを省略する
  9215:       } else {
  9216:         XEiJ.busRwse (t);  //pcws
  9217:       }
  9218:       irpSetPC (t + s);  //pc0+2+オフセット
  9219:     } else {  //Bcc.Sで通過
  9220:       XEiJ.mpuCycleCount += 8;
  9221:     }
  9222:   }  //irpBlss
  9223: 
  9224:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  9225:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  9226:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  9227:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  9228:   //BCC.W <label>                                   |-|012346|-|----*|-----|          |0110_010_000_000_000-{offset}
  9229:   //BHS.W <label>                                   |A|012346|-|----*|-----|          |0110_010_000_000_000-{offset}        [BCC.W <label>]
  9230:   //BNCS.W <label>                                  |A|012346|-|----*|-----|          |0110_010_000_000_000-{offset}        [BCC.W <label>]
  9231:   //BNLO.W <label>                                  |A|012346|-|----*|-----|          |0110_010_000_000_000-{offset}        [BCC.W <label>]
  9232:   //JBCC.W <label>                                  |A|012346|-|----*|-----|          |0110_010_000_000_000-{offset}        [BCC.W <label>]
  9233:   //JBHS.W <label>                                  |A|012346|-|----*|-----|          |0110_010_000_000_000-{offset}        [BCC.W <label>]
  9234:   //JBNCS.W <label>                                 |A|012346|-|----*|-----|          |0110_010_000_000_000-{offset}        [BCC.W <label>]
  9235:   //JBNLO.W <label>                                 |A|012346|-|----*|-----|          |0110_010_000_000_000-{offset}        [BCC.W <label>]
  9236:   //BCC.S <label>                                   |-|012346|-|----*|-----|          |0110_010_000_sss_sss (s is not equal to 0)
  9237:   //BHS.S <label>                                   |A|012346|-|----*|-----|          |0110_010_000_sss_sss (s is not equal to 0)   [BCC.S <label>]
  9238:   //BNCS.S <label>                                  |A|012346|-|----*|-----|          |0110_010_000_sss_sss (s is not equal to 0)   [BCC.S <label>]
  9239:   //BNLO.S <label>                                  |A|012346|-|----*|-----|          |0110_010_000_sss_sss (s is not equal to 0)   [BCC.S <label>]
  9240:   //JBCC.S <label>                                  |A|012346|-|----*|-----|          |0110_010_000_sss_sss (s is not equal to 0)   [BCC.S <label>]
  9241:   //JBHS.S <label>                                  |A|012346|-|----*|-----|          |0110_010_000_sss_sss (s is not equal to 0)   [BCC.S <label>]
  9242:   //JBNCS.S <label>                                 |A|012346|-|----*|-----|          |0110_010_000_sss_sss (s is not equal to 0)   [BCC.S <label>]
  9243:   //JBNLO.S <label>                                 |A|012346|-|----*|-----|          |0110_010_000_sss_sss (s is not equal to 0)   [BCC.S <label>]
  9244:   //JBCS.L <label>                                  |A|012346|-|----*|-----|          |0110_010_000_000_110-0100111011111001-{address}      [BCC.S (*)+8;JMP <label>]
  9245:   //JBLO.L <label>                                  |A|012346|-|----*|-----|          |0110_010_000_000_110-0100111011111001-{address}      [BCC.S (*)+8;JMP <label>]
  9246:   //JBNCC.L <label>                                 |A|012346|-|----*|-----|          |0110_010_000_000_110-0100111011111001-{address}      [BCC.S (*)+8;JMP <label>]
  9247:   //JBNHS.L <label>                                 |A|012346|-|----*|-----|          |0110_010_000_000_110-0100111011111001-{address}      [BCC.S (*)+8;JMP <label>]
  9248:   public static void irpBhssw () throws M68kException {
  9249:     if (XEiJ.MPU_CC_HS << XEiJ.regCCR < 0) {  //Bccでジャンプ
  9250:       XEiJ.mpuCycleCount += 10;
  9251:       int t = XEiJ.regPC;  //pc0+2
  9252:       int s = (byte) XEiJ.regOC;  //オフセット
  9253:       if (s == 0) {  //Bcc.Wでジャンプ
  9254:         XEiJ.regPC = t + 2;
  9255:         s = XEiJ.busRwse (t);  //pcws
  9256:       } else {  //Bcc.Sでジャンプ
  9257:         //MC68000のBRA.S/BSR.S/Bcc.Sは分岐するとき分岐しない方の直後のワードをリードする
  9258:         //  2MB搭載機で$1FFFFEに無限ループ$60FE(BRA.S (*))を書いて飛び込むと$200000でバスエラーが出る
  9259:         if (XEiJ.MPU_OMIT_EXTRA_READ) {
  9260:           //! 軽量化。リードを省略する
  9261:         } else {
  9262:           XEiJ.busRwse (t);  //pcws
  9263:         }
  9264:       }
  9265:       irpSetPC (t + s);  //pc0+2+オフセット
  9266:     } else if (XEiJ.regOC == 0x6400) {  //Bcc.Wで通過
  9267:       XEiJ.mpuCycleCount += 12;
  9268:       if (XEiJ.MPU_OMIT_OFFSET_READ) {
  9269:         //リードを省略する
  9270:       } else {
  9271:         XEiJ.busRws (XEiJ.regPC);
  9272:       }
  9273:       XEiJ.regPC += 2;
  9274:     } else {  //Bcc.Sで通過
  9275:       XEiJ.mpuCycleCount += 8;
  9276:     }
  9277:   }  //irpBhssw
  9278: 
  9279:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  9280:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  9281:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  9282:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  9283:   //BCC.S <label>                                   |-|012346|-|----*|-----|          |0110_010_001_sss_sss
  9284:   //BHS.S <label>                                   |A|012346|-|----*|-----|          |0110_010_001_sss_sss [BCC.S <label>]
  9285:   //BNCS.S <label>                                  |A|012346|-|----*|-----|          |0110_010_001_sss_sss [BCC.S <label>]
  9286:   //BNLO.S <label>                                  |A|012346|-|----*|-----|          |0110_010_001_sss_sss [BCC.S <label>]
  9287:   //JBCC.S <label>                                  |A|012346|-|----*|-----|          |0110_010_001_sss_sss [BCC.S <label>]
  9288:   //JBHS.S <label>                                  |A|012346|-|----*|-----|          |0110_010_001_sss_sss [BCC.S <label>]
  9289:   //JBNCS.S <label>                                 |A|012346|-|----*|-----|          |0110_010_001_sss_sss [BCC.S <label>]
  9290:   //JBNLO.S <label>                                 |A|012346|-|----*|-----|          |0110_010_001_sss_sss [BCC.S <label>]
  9291:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  9292:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  9293:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  9294:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  9295:   //BCC.S <label>                                   |-|012346|-|----*|-----|          |0110_010_010_sss_sss
  9296:   //BHS.S <label>                                   |A|012346|-|----*|-----|          |0110_010_010_sss_sss [BCC.S <label>]
  9297:   //BNCS.S <label>                                  |A|012346|-|----*|-----|          |0110_010_010_sss_sss [BCC.S <label>]
  9298:   //BNLO.S <label>                                  |A|012346|-|----*|-----|          |0110_010_010_sss_sss [BCC.S <label>]
  9299:   //JBCC.S <label>                                  |A|012346|-|----*|-----|          |0110_010_010_sss_sss [BCC.S <label>]
  9300:   //JBHS.S <label>                                  |A|012346|-|----*|-----|          |0110_010_010_sss_sss [BCC.S <label>]
  9301:   //JBNCS.S <label>                                 |A|012346|-|----*|-----|          |0110_010_010_sss_sss [BCC.S <label>]
  9302:   //JBNLO.S <label>                                 |A|012346|-|----*|-----|          |0110_010_010_sss_sss [BCC.S <label>]
  9303:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  9304:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  9305:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  9306:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  9307:   //BCC.S <label>                                   |-|01----|-|----*|-----|          |0110_010_011_sss_sss
  9308:   //BHS.S <label>                                   |A|01----|-|----*|-----|          |0110_010_011_sss_sss [BCC.S <label>]
  9309:   //BNCS.S <label>                                  |A|01----|-|----*|-----|          |0110_010_011_sss_sss [BCC.S <label>]
  9310:   //BNLO.S <label>                                  |A|01----|-|----*|-----|          |0110_010_011_sss_sss [BCC.S <label>]
  9311:   //JBCC.S <label>                                  |A|01----|-|----*|-----|          |0110_010_011_sss_sss [BCC.S <label>]
  9312:   //JBHS.S <label>                                  |A|01----|-|----*|-----|          |0110_010_011_sss_sss [BCC.S <label>]
  9313:   //JBNCS.S <label>                                 |A|01----|-|----*|-----|          |0110_010_011_sss_sss [BCC.S <label>]
  9314:   //JBNLO.S <label>                                 |A|01----|-|----*|-----|          |0110_010_011_sss_sss [BCC.S <label>]
  9315:   public static void irpBhss () throws M68kException {
  9316:     if (XEiJ.MPU_CC_HS << XEiJ.regCCR < 0) {  //Bcc.Sでジャンプ
  9317:       XEiJ.mpuCycleCount += 10;
  9318:       int t = XEiJ.regPC;  //pc0+2
  9319:       int s = (byte) XEiJ.regOC;  //オフセット
  9320:       //MC68000のBRA.S/BSR.S/Bcc.Sは分岐するとき分岐しない方の直後のワードをリードする
  9321:       //  2MB搭載機で$1FFFFEに無限ループ$60FE(BRA.S (*))を書いて飛び込むと$200000でバスエラーが出る
  9322:       if (XEiJ.MPU_OMIT_EXTRA_READ) {
  9323:         //! 軽量化。リードを省略する
  9324:       } else {
  9325:         XEiJ.busRwse (t);  //pcws
  9326:       }
  9327:       irpSetPC (t + s);  //pc0+2+オフセット
  9328:     } else {  //Bcc.Sで通過
  9329:       XEiJ.mpuCycleCount += 8;
  9330:     }
  9331:   }  //irpBhss
  9332: 
  9333:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  9334:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  9335:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  9336:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  9337:   //BCS.W <label>                                   |-|012346|-|----*|-----|          |0110_010_100_000_000-{offset}
  9338:   //BLO.W <label>                                   |A|012346|-|----*|-----|          |0110_010_100_000_000-{offset}        [BCS.W <label>]
  9339:   //BNCC.W <label>                                  |A|012346|-|----*|-----|          |0110_010_100_000_000-{offset}        [BCS.W <label>]
  9340:   //BNHS.W <label>                                  |A|012346|-|----*|-----|          |0110_010_100_000_000-{offset}        [BCS.W <label>]
  9341:   //JBCS.W <label>                                  |A|012346|-|----*|-----|          |0110_010_100_000_000-{offset}        [BCS.W <label>]
  9342:   //JBLO.W <label>                                  |A|012346|-|----*|-----|          |0110_010_100_000_000-{offset}        [BCS.W <label>]
  9343:   //JBNCC.W <label>                                 |A|012346|-|----*|-----|          |0110_010_100_000_000-{offset}        [BCS.W <label>]
  9344:   //JBNHS.W <label>                                 |A|012346|-|----*|-----|          |0110_010_100_000_000-{offset}        [BCS.W <label>]
  9345:   //BCS.S <label>                                   |-|012346|-|----*|-----|          |0110_010_100_sss_sss (s is not equal to 0)
  9346:   //BLO.S <label>                                   |A|012346|-|----*|-----|          |0110_010_100_sss_sss (s is not equal to 0)   [BCS.S <label>]
  9347:   //BNCC.S <label>                                  |A|012346|-|----*|-----|          |0110_010_100_sss_sss (s is not equal to 0)   [BCS.S <label>]
  9348:   //BNHS.S <label>                                  |A|012346|-|----*|-----|          |0110_010_100_sss_sss (s is not equal to 0)   [BCS.S <label>]
  9349:   //JBCS.S <label>                                  |A|012346|-|----*|-----|          |0110_010_100_sss_sss (s is not equal to 0)   [BCS.S <label>]
  9350:   //JBLO.S <label>                                  |A|012346|-|----*|-----|          |0110_010_100_sss_sss (s is not equal to 0)   [BCS.S <label>]
  9351:   //JBNCC.S <label>                                 |A|012346|-|----*|-----|          |0110_010_100_sss_sss (s is not equal to 0)   [BCS.S <label>]
  9352:   //JBNHS.S <label>                                 |A|012346|-|----*|-----|          |0110_010_100_sss_sss (s is not equal to 0)   [BCS.S <label>]
  9353:   //JBCC.L <label>                                  |A|012346|-|----*|-----|          |0110_010_100_000_110-0100111011111001-{address}      [BCS.S (*)+8;JMP <label>]
  9354:   //JBHS.L <label>                                  |A|012346|-|----*|-----|          |0110_010_100_000_110-0100111011111001-{address}      [BCS.S (*)+8;JMP <label>]
  9355:   //JBNCS.L <label>                                 |A|012346|-|----*|-----|          |0110_010_100_000_110-0100111011111001-{address}      [BCS.S (*)+8;JMP <label>]
  9356:   //JBNLO.L <label>                                 |A|012346|-|----*|-----|          |0110_010_100_000_110-0100111011111001-{address}      [BCS.S (*)+8;JMP <label>]
  9357:   public static void irpBlosw () throws M68kException {
  9358:     if (XEiJ.MPU_CC_LO << XEiJ.regCCR < 0) {  //Bccでジャンプ
  9359:       XEiJ.mpuCycleCount += 10;
  9360:       int t = XEiJ.regPC;  //pc0+2
  9361:       int s = (byte) XEiJ.regOC;  //オフセット
  9362:       if (s == 0) {  //Bcc.Wでジャンプ
  9363:         XEiJ.regPC = t + 2;
  9364:         s = XEiJ.busRwse (t);  //pcws
  9365:       } else {  //Bcc.Sでジャンプ
  9366:         //MC68000のBRA.S/BSR.S/Bcc.Sは分岐するとき分岐しない方の直後のワードをリードする
  9367:         //  2MB搭載機で$1FFFFEに無限ループ$60FE(BRA.S (*))を書いて飛び込むと$200000でバスエラーが出る
  9368:         if (XEiJ.MPU_OMIT_EXTRA_READ) {
  9369:           //! 軽量化。リードを省略する
  9370:         } else {
  9371:           XEiJ.busRwse (t);  //pcws
  9372:         }
  9373:       }
  9374:       irpSetPC (t + s);  //pc0+2+オフセット
  9375:     } else if (XEiJ.regOC == 0x6500) {  //Bcc.Wで通過
  9376:       XEiJ.mpuCycleCount += 12;
  9377:       if (XEiJ.MPU_OMIT_OFFSET_READ) {
  9378:         //リードを省略する
  9379:       } else {
  9380:         XEiJ.busRws (XEiJ.regPC);
  9381:       }
  9382:       XEiJ.regPC += 2;
  9383:     } else {  //Bcc.Sで通過
  9384:       XEiJ.mpuCycleCount += 8;
  9385:     }
  9386:   }  //irpBlosw
  9387: 
  9388:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  9389:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  9390:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  9391:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  9392:   //BCS.S <label>                                   |-|012346|-|----*|-----|          |0110_010_101_sss_sss
  9393:   //BLO.S <label>                                   |A|012346|-|----*|-----|          |0110_010_101_sss_sss [BCS.S <label>]
  9394:   //BNCC.S <label>                                  |A|012346|-|----*|-----|          |0110_010_101_sss_sss [BCS.S <label>]
  9395:   //BNHS.S <label>                                  |A|012346|-|----*|-----|          |0110_010_101_sss_sss [BCS.S <label>]
  9396:   //JBCS.S <label>                                  |A|012346|-|----*|-----|          |0110_010_101_sss_sss [BCS.S <label>]
  9397:   //JBLO.S <label>                                  |A|012346|-|----*|-----|          |0110_010_101_sss_sss [BCS.S <label>]
  9398:   //JBNCC.S <label>                                 |A|012346|-|----*|-----|          |0110_010_101_sss_sss [BCS.S <label>]
  9399:   //JBNHS.S <label>                                 |A|012346|-|----*|-----|          |0110_010_101_sss_sss [BCS.S <label>]
  9400:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  9401:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  9402:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  9403:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  9404:   //BCS.S <label>                                   |-|012346|-|----*|-----|          |0110_010_110_sss_sss
  9405:   //BLO.S <label>                                   |A|012346|-|----*|-----|          |0110_010_110_sss_sss [BCS.S <label>]
  9406:   //BNCC.S <label>                                  |A|012346|-|----*|-----|          |0110_010_110_sss_sss [BCS.S <label>]
  9407:   //BNHS.S <label>                                  |A|012346|-|----*|-----|          |0110_010_110_sss_sss [BCS.S <label>]
  9408:   //JBCS.S <label>                                  |A|012346|-|----*|-----|          |0110_010_110_sss_sss [BCS.S <label>]
  9409:   //JBLO.S <label>                                  |A|012346|-|----*|-----|          |0110_010_110_sss_sss [BCS.S <label>]
  9410:   //JBNCC.S <label>                                 |A|012346|-|----*|-----|          |0110_010_110_sss_sss [BCS.S <label>]
  9411:   //JBNHS.S <label>                                 |A|012346|-|----*|-----|          |0110_010_110_sss_sss [BCS.S <label>]
  9412:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  9413:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  9414:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  9415:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  9416:   //BCS.S <label>                                   |-|01----|-|----*|-----|          |0110_010_111_sss_sss
  9417:   //BLO.S <label>                                   |A|01----|-|----*|-----|          |0110_010_111_sss_sss [BCS.S <label>]
  9418:   //BNCC.S <label>                                  |A|01----|-|----*|-----|          |0110_010_111_sss_sss [BCS.S <label>]
  9419:   //BNHS.S <label>                                  |A|01----|-|----*|-----|          |0110_010_111_sss_sss [BCS.S <label>]
  9420:   //JBCS.S <label>                                  |A|01----|-|----*|-----|          |0110_010_111_sss_sss [BCS.S <label>]
  9421:   //JBLO.S <label>                                  |A|01----|-|----*|-----|          |0110_010_111_sss_sss [BCS.S <label>]
  9422:   //JBNCC.S <label>                                 |A|01----|-|----*|-----|          |0110_010_111_sss_sss [BCS.S <label>]
  9423:   //JBNHS.S <label>                                 |A|01----|-|----*|-----|          |0110_010_111_sss_sss [BCS.S <label>]
  9424:   public static void irpBlos () throws M68kException {
  9425:     if (XEiJ.MPU_CC_LO << XEiJ.regCCR < 0) {  //Bccでジャンプ
  9426:       XEiJ.mpuCycleCount += 10;
  9427:       int t = XEiJ.regPC;  //pc0+2
  9428:       int s = (byte) XEiJ.regOC;  //オフセット
  9429:       //MC68000のBRA.S/BSR.S/Bcc.Sは分岐するとき分岐しない方の直後のワードをリードする
  9430:       //  2MB搭載機で$1FFFFEに無限ループ$60FE(BRA.S (*))を書いて飛び込むと$200000でバスエラーが出る
  9431:       if (XEiJ.MPU_OMIT_EXTRA_READ) {
  9432:         //! 軽量化。リードを省略する
  9433:       } else {
  9434:         XEiJ.busRwse (t);  //pcws
  9435:       }
  9436:       irpSetPC (t + s);  //pc0+2+オフセット
  9437:     } else {  //Bcc.Sで通過
  9438:       XEiJ.mpuCycleCount += 8;
  9439:     }
  9440:   }  //irpBlos
  9441: 
  9442:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  9443:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  9444:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  9445:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  9446:   //BNE.W <label>                                   |-|012346|-|--*--|-----|          |0110_011_000_000_000-{offset}
  9447:   //BNEQ.W <label>                                  |A|012346|-|--*--|-----|          |0110_011_000_000_000-{offset}        [BNE.W <label>]
  9448:   //BNZ.W <label>                                   |A|012346|-|--*--|-----|          |0110_011_000_000_000-{offset}        [BNE.W <label>]
  9449:   //BNZE.W <label>                                  |A|012346|-|--*--|-----|          |0110_011_000_000_000-{offset}        [BNE.W <label>]
  9450:   //JBNE.W <label>                                  |A|012346|-|--*--|-----|          |0110_011_000_000_000-{offset}        [BNE.W <label>]
  9451:   //JBNEQ.W <label>                                 |A|012346|-|--*--|-----|          |0110_011_000_000_000-{offset}        [BNE.W <label>]
  9452:   //JBNZ.W <label>                                  |A|012346|-|--*--|-----|          |0110_011_000_000_000-{offset}        [BNE.W <label>]
  9453:   //JBNZE.W <label>                                 |A|012346|-|--*--|-----|          |0110_011_000_000_000-{offset}        [BNE.W <label>]
  9454:   //BNE.S <label>                                   |-|012346|-|--*--|-----|          |0110_011_000_sss_sss (s is not equal to 0)
  9455:   //BNEQ.S <label>                                  |A|012346|-|--*--|-----|          |0110_011_000_sss_sss (s is not equal to 0)   [BNE.S <label>]
  9456:   //BNZ.S <label>                                   |A|012346|-|--*--|-----|          |0110_011_000_sss_sss (s is not equal to 0)   [BNE.S <label>]
  9457:   //BNZE.S <label>                                  |A|012346|-|--*--|-----|          |0110_011_000_sss_sss (s is not equal to 0)   [BNE.S <label>]
  9458:   //JBNE.S <label>                                  |A|012346|-|--*--|-----|          |0110_011_000_sss_sss (s is not equal to 0)   [BNE.S <label>]
  9459:   //JBNEQ.S <label>                                 |A|012346|-|--*--|-----|          |0110_011_000_sss_sss (s is not equal to 0)   [BNE.S <label>]
  9460:   //JBNZ.S <label>                                  |A|012346|-|--*--|-----|          |0110_011_000_sss_sss (s is not equal to 0)   [BNE.S <label>]
  9461:   //JBNZE.S <label>                                 |A|012346|-|--*--|-----|          |0110_011_000_sss_sss (s is not equal to 0)   [BNE.S <label>]
  9462:   //JBEQ.L <label>                                  |A|012346|-|--*--|-----|          |0110_011_000_000_110-0100111011111001-{address}      [BNE.S (*)+8;JMP <label>]
  9463:   //JBNEQ.L <label>                                 |A|012346|-|--*--|-----|          |0110_011_000_000_110-0100111011111001-{address}      [BNE.S (*)+8;JMP <label>]
  9464:   //JBNNE.L <label>                                 |A|012346|-|--*--|-----|          |0110_011_000_000_110-0100111011111001-{address}      [BNE.S (*)+8;JMP <label>]
  9465:   //JBNNZ.L <label>                                 |A|012346|-|--*--|-----|          |0110_011_000_000_110-0100111011111001-{address}      [BNE.S (*)+8;JMP <label>]
  9466:   //JBNZ.L <label>                                  |A|012346|-|--*--|-----|          |0110_011_000_000_110-0100111011111001-{address}      [BNE.S (*)+8;JMP <label>]
  9467:   //JBNZE.L <label>                                 |A|012346|-|--*--|-----|          |0110_011_000_000_110-0100111011111001-{address}      [BNE.S (*)+8;JMP <label>]
  9468:   //JBZE.L <label>                                  |A|012346|-|--*--|-----|          |0110_011_000_000_110-0100111011111001-{address}      [BNE.S (*)+8;JMP <label>]
  9469:   public static void irpBnesw () throws M68kException {
  9470:     if (XEiJ.MPU_CC_NE << XEiJ.regCCR < 0) {  //Bccでジャンプ
  9471:       XEiJ.mpuCycleCount += 10;
  9472:       int t = XEiJ.regPC;  //pc0+2
  9473:       int s = (byte) XEiJ.regOC;  //オフセット
  9474:       if (s == 0) {  //Bcc.Wでジャンプ
  9475:         XEiJ.regPC = t + 2;
  9476:         s = XEiJ.busRwse (t);  //pcws
  9477:       } else {  //Bcc.Sでジャンプ
  9478:         //MC68000のBRA.S/BSR.S/Bcc.Sは分岐するとき分岐しない方の直後のワードをリードする
  9479:         //  2MB搭載機で$1FFFFEに無限ループ$60FE(BRA.S (*))を書いて飛び込むと$200000でバスエラーが出る
  9480:         if (XEiJ.MPU_OMIT_EXTRA_READ) {
  9481:           //! 軽量化。リードを省略する
  9482:         } else {
  9483:           XEiJ.busRwse (t);  //pcws
  9484:         }
  9485:       }
  9486:       irpSetPC (t + s);  //pc0+2+オフセット
  9487:     } else if (XEiJ.regOC == 0x6600) {  //Bcc.Wで通過
  9488:       XEiJ.mpuCycleCount += 12;
  9489:       if (XEiJ.MPU_OMIT_OFFSET_READ) {
  9490:         //リードを省略する
  9491:       } else {
  9492:         XEiJ.busRws (XEiJ.regPC);
  9493:       }
  9494:       XEiJ.regPC += 2;
  9495:     } else {  //Bcc.Sで通過
  9496:       XEiJ.mpuCycleCount += 8;
  9497:     }
  9498:   }  //irpBnesw
  9499: 
  9500:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  9501:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  9502:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  9503:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  9504:   //BNE.S <label>                                   |-|012346|-|--*--|-----|          |0110_011_001_sss_sss
  9505:   //BNEQ.S <label>                                  |A|012346|-|--*--|-----|          |0110_011_001_sss_sss [BNE.S <label>]
  9506:   //BNZ.S <label>                                   |A|012346|-|--*--|-----|          |0110_011_001_sss_sss [BNE.S <label>]
  9507:   //BNZE.S <label>                                  |A|012346|-|--*--|-----|          |0110_011_001_sss_sss [BNE.S <label>]
  9508:   //JBNE.S <label>                                  |A|012346|-|--*--|-----|          |0110_011_001_sss_sss [BNE.S <label>]
  9509:   //JBNEQ.S <label>                                 |A|012346|-|--*--|-----|          |0110_011_001_sss_sss [BNE.S <label>]
  9510:   //JBNZ.S <label>                                  |A|012346|-|--*--|-----|          |0110_011_001_sss_sss [BNE.S <label>]
  9511:   //JBNZE.S <label>                                 |A|012346|-|--*--|-----|          |0110_011_001_sss_sss [BNE.S <label>]
  9512:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  9513:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  9514:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  9515:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  9516:   //BNE.S <label>                                   |-|012346|-|--*--|-----|          |0110_011_010_sss_sss
  9517:   //BNEQ.S <label>                                  |A|012346|-|--*--|-----|          |0110_011_010_sss_sss [BNE.S <label>]
  9518:   //BNZ.S <label>                                   |A|012346|-|--*--|-----|          |0110_011_010_sss_sss [BNE.S <label>]
  9519:   //BNZE.S <label>                                  |A|012346|-|--*--|-----|          |0110_011_010_sss_sss [BNE.S <label>]
  9520:   //JBNE.S <label>                                  |A|012346|-|--*--|-----|          |0110_011_010_sss_sss [BNE.S <label>]
  9521:   //JBNEQ.S <label>                                 |A|012346|-|--*--|-----|          |0110_011_010_sss_sss [BNE.S <label>]
  9522:   //JBNZ.S <label>                                  |A|012346|-|--*--|-----|          |0110_011_010_sss_sss [BNE.S <label>]
  9523:   //JBNZE.S <label>                                 |A|012346|-|--*--|-----|          |0110_011_010_sss_sss [BNE.S <label>]
  9524:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  9525:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  9526:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  9527:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  9528:   //BNE.S <label>                                   |-|01----|-|--*--|-----|          |0110_011_011_sss_sss
  9529:   //BNEQ.S <label>                                  |A|01----|-|--*--|-----|          |0110_011_011_sss_sss [BNE.S <label>]
  9530:   //BNZ.S <label>                                   |A|01----|-|--*--|-----|          |0110_011_011_sss_sss [BNE.S <label>]
  9531:   //BNZE.S <label>                                  |A|01----|-|--*--|-----|          |0110_011_011_sss_sss [BNE.S <label>]
  9532:   //JBNE.S <label>                                  |A|01----|-|--*--|-----|          |0110_011_011_sss_sss [BNE.S <label>]
  9533:   //JBNEQ.S <label>                                 |A|01----|-|--*--|-----|          |0110_011_011_sss_sss [BNE.S <label>]
  9534:   //JBNZ.S <label>                                  |A|01----|-|--*--|-----|          |0110_011_011_sss_sss [BNE.S <label>]
  9535:   //JBNZE.S <label>                                 |A|01----|-|--*--|-----|          |0110_011_011_sss_sss [BNE.S <label>]
  9536:   public static void irpBnes () throws M68kException {
  9537:     if (XEiJ.MPU_CC_NE << XEiJ.regCCR < 0) {  //Bccでジャンプ
  9538:       XEiJ.mpuCycleCount += 10;
  9539:       int t = XEiJ.regPC;  //pc0+2
  9540:       int s = (byte) XEiJ.regOC;  //オフセット
  9541:       //MC68000のBRA.S/BSR.S/Bcc.Sは分岐するとき分岐しない方の直後のワードをリードする
  9542:       //  2MB搭載機で$1FFFFEに無限ループ$60FE(BRA.S (*))を書いて飛び込むと$200000でバスエラーが出る
  9543:       if (XEiJ.MPU_OMIT_EXTRA_READ) {
  9544:         //! 軽量化。リードを省略する
  9545:       } else {
  9546:         XEiJ.busRwse (t);  //pcws
  9547:       }
  9548:       irpSetPC (t + s);  //pc0+2+オフセット
  9549:     } else {  //Bcc.Sで通過
  9550:       XEiJ.mpuCycleCount += 8;
  9551:     }
  9552:   }  //irpBnes
  9553: 
  9554:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  9555:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  9556:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  9557:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  9558:   //BEQ.W <label>                                   |-|012346|-|--*--|-----|          |0110_011_100_000_000-{offset}
  9559:   //BNNE.W <label>                                  |A|012346|-|--*--|-----|          |0110_011_100_000_000-{offset}        [BEQ.W <label>]
  9560:   //BNNZ.W <label>                                  |A|012346|-|--*--|-----|          |0110_011_100_000_000-{offset}        [BEQ.W <label>]
  9561:   //BZE.W <label>                                   |A|012346|-|--*--|-----|          |0110_011_100_000_000-{offset}        [BEQ.W <label>]
  9562:   //JBEQ.W <label>                                  |A|012346|-|--*--|-----|          |0110_011_100_000_000-{offset}        [BEQ.W <label>]
  9563:   //JBNNE.W <label>                                 |A|012346|-|--*--|-----|          |0110_011_100_000_000-{offset}        [BEQ.W <label>]
  9564:   //JBNNZ.W <label>                                 |A|012346|-|--*--|-----|          |0110_011_100_000_000-{offset}        [BEQ.W <label>]
  9565:   //JBZE.W <label>                                  |A|012346|-|--*--|-----|          |0110_011_100_000_000-{offset}        [BEQ.W <label>]
  9566:   //BEQ.S <label>                                   |-|012346|-|--*--|-----|          |0110_011_100_sss_sss (s is not equal to 0)
  9567:   //BNNE.S <label>                                  |A|012346|-|--*--|-----|          |0110_011_100_sss_sss (s is not equal to 0)   [BEQ.S <label>]
  9568:   //BNNZ.S <label>                                  |A|012346|-|--*--|-----|          |0110_011_100_sss_sss (s is not equal to 0)   [BEQ.S <label>]
  9569:   //BZE.S <label>                                   |A|012346|-|--*--|-----|          |0110_011_100_sss_sss (s is not equal to 0)   [BEQ.S <label>]
  9570:   //JBEQ.S <label>                                  |A|012346|-|--*--|-----|          |0110_011_100_sss_sss (s is not equal to 0)   [BEQ.S <label>]
  9571:   //JBNNE.S <label>                                 |A|012346|-|--*--|-----|          |0110_011_100_sss_sss (s is not equal to 0)   [BEQ.S <label>]
  9572:   //JBNNZ.S <label>                                 |A|012346|-|--*--|-----|          |0110_011_100_sss_sss (s is not equal to 0)   [BEQ.S <label>]
  9573:   //JBZE.S <label>                                  |A|012346|-|--*--|-----|          |0110_011_100_sss_sss (s is not equal to 0)   [BEQ.S <label>]
  9574:   //JBNE.L <label>                                  |A|012346|-|--*--|-----|          |0110_011_100_000_110-0100111011111001-{address}      [BEQ.S (*)+8;JMP <label>]
  9575:   public static void irpBeqsw () throws M68kException {
  9576:     if (XEiJ.MPU_CC_EQ << XEiJ.regCCR < 0) {  //Bccでジャンプ
  9577:       XEiJ.mpuCycleCount += 10;
  9578:       int t = XEiJ.regPC;  //pc0+2
  9579:       int s = (byte) XEiJ.regOC;  //オフセット
  9580:       if (s == 0) {  //Bcc.Wでジャンプ
  9581:         XEiJ.regPC = t + 2;
  9582:         s = XEiJ.busRwse (t);  //pcws
  9583:       } else {  //Bcc.Sでジャンプ
  9584:         //MC68000のBRA.S/BSR.S/Bcc.Sは分岐するとき分岐しない方の直後のワードをリードする
  9585:         //  2MB搭載機で$1FFFFEに無限ループ$60FE(BRA.S (*))を書いて飛び込むと$200000でバスエラーが出る
  9586:         if (XEiJ.MPU_OMIT_EXTRA_READ) {
  9587:           //! 軽量化。リードを省略する
  9588:         } else {
  9589:           XEiJ.busRwse (t);  //pcws
  9590:         }
  9591:       }
  9592:       irpSetPC (t + s);  //pc0+2+オフセット
  9593:     } else if (XEiJ.regOC == 0x6700) {  //Bcc.Wで通過
  9594:       XEiJ.mpuCycleCount += 12;
  9595:       if (XEiJ.MPU_OMIT_OFFSET_READ) {
  9596:         //リードを省略する
  9597:       } else {
  9598:         XEiJ.busRws (XEiJ.regPC);
  9599:       }
  9600:       XEiJ.regPC += 2;
  9601:     } else {  //Bcc.Sで通過
  9602:       XEiJ.mpuCycleCount += 8;
  9603:     }
  9604:   }  //irpBeqsw
  9605: 
  9606:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  9607:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  9608:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  9609:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  9610:   //BEQ.S <label>                                   |-|012346|-|--*--|-----|          |0110_011_101_sss_sss
  9611:   //BNNE.S <label>                                  |A|012346|-|--*--|-----|          |0110_011_101_sss_sss [BEQ.S <label>]
  9612:   //BNNZ.S <label>                                  |A|012346|-|--*--|-----|          |0110_011_101_sss_sss [BEQ.S <label>]
  9613:   //BZE.S <label>                                   |A|012346|-|--*--|-----|          |0110_011_101_sss_sss [BEQ.S <label>]
  9614:   //JBEQ.S <label>                                  |A|012346|-|--*--|-----|          |0110_011_101_sss_sss [BEQ.S <label>]
  9615:   //JBNNE.S <label>                                 |A|012346|-|--*--|-----|          |0110_011_101_sss_sss [BEQ.S <label>]
  9616:   //JBNNZ.S <label>                                 |A|012346|-|--*--|-----|          |0110_011_101_sss_sss [BEQ.S <label>]
  9617:   //JBZE.S <label>                                  |A|012346|-|--*--|-----|          |0110_011_101_sss_sss [BEQ.S <label>]
  9618:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  9619:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  9620:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  9621:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  9622:   //BEQ.S <label>                                   |-|012346|-|--*--|-----|          |0110_011_110_sss_sss
  9623:   //BNNE.S <label>                                  |A|012346|-|--*--|-----|          |0110_011_110_sss_sss [BEQ.S <label>]
  9624:   //BNNZ.S <label>                                  |A|012346|-|--*--|-----|          |0110_011_110_sss_sss [BEQ.S <label>]
  9625:   //BZE.S <label>                                   |A|012346|-|--*--|-----|          |0110_011_110_sss_sss [BEQ.S <label>]
  9626:   //JBEQ.S <label>                                  |A|012346|-|--*--|-----|          |0110_011_110_sss_sss [BEQ.S <label>]
  9627:   //JBNNE.S <label>                                 |A|012346|-|--*--|-----|          |0110_011_110_sss_sss [BEQ.S <label>]
  9628:   //JBNNZ.S <label>                                 |A|012346|-|--*--|-----|          |0110_011_110_sss_sss [BEQ.S <label>]
  9629:   //JBZE.S <label>                                  |A|012346|-|--*--|-----|          |0110_011_110_sss_sss [BEQ.S <label>]
  9630:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  9631:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  9632:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  9633:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  9634:   //BEQ.S <label>                                   |-|01----|-|--*--|-----|          |0110_011_111_sss_sss
  9635:   //BNNE.S <label>                                  |A|01----|-|--*--|-----|          |0110_011_111_sss_sss [BEQ.S <label>]
  9636:   //BNNZ.S <label>                                  |A|01----|-|--*--|-----|          |0110_011_111_sss_sss [BEQ.S <label>]
  9637:   //BZE.S <label>                                   |A|01----|-|--*--|-----|          |0110_011_111_sss_sss [BEQ.S <label>]
  9638:   //JBEQ.S <label>                                  |A|01----|-|--*--|-----|          |0110_011_111_sss_sss [BEQ.S <label>]
  9639:   //JBNNE.S <label>                                 |A|01----|-|--*--|-----|          |0110_011_111_sss_sss [BEQ.S <label>]
  9640:   //JBNNZ.S <label>                                 |A|01----|-|--*--|-----|          |0110_011_111_sss_sss [BEQ.S <label>]
  9641:   //JBZE.S <label>                                  |A|01----|-|--*--|-----|          |0110_011_111_sss_sss [BEQ.S <label>]
  9642:   public static void irpBeqs () throws M68kException {
  9643:     if (XEiJ.MPU_CC_EQ << XEiJ.regCCR < 0) {  //Bccでジャンプ
  9644:       XEiJ.mpuCycleCount += 10;
  9645:       int t = XEiJ.regPC;  //pc0+2
  9646:       int s = (byte) XEiJ.regOC;  //オフセット
  9647:       //MC68000のBRA.S/BSR.S/Bcc.Sは分岐するとき分岐しない方の直後のワードをリードする
  9648:       //  2MB搭載機で$1FFFFEに無限ループ$60FE(BRA.S (*))を書いて飛び込むと$200000でバスエラーが出る
  9649:       if (XEiJ.MPU_OMIT_EXTRA_READ) {
  9650:         //! 軽量化。リードを省略する
  9651:       } else {
  9652:         XEiJ.busRwse (t);  //pcws
  9653:       }
  9654:       irpSetPC (t + s);  //pc0+2+オフセット
  9655:     } else {  //Bcc.Sで通過
  9656:       XEiJ.mpuCycleCount += 8;
  9657:     }
  9658:   }  //irpBeqs
  9659: 
  9660:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  9661:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  9662:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  9663:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  9664:   //BVC.W <label>                                   |-|012346|-|---*-|-----|          |0110_100_000_000_000-{offset}
  9665:   //BNVS.W <label>                                  |A|012346|-|---*-|-----|          |0110_100_000_000_000-{offset}        [BVC.W <label>]
  9666:   //JBNVS.W <label>                                 |A|012346|-|---*-|-----|          |0110_100_000_000_000-{offset}        [BVC.W <label>]
  9667:   //JBVC.W <label>                                  |A|012346|-|---*-|-----|          |0110_100_000_000_000-{offset}        [BVC.W <label>]
  9668:   //BVC.S <label>                                   |-|012346|-|---*-|-----|          |0110_100_000_sss_sss (s is not equal to 0)
  9669:   //BNVS.S <label>                                  |A|012346|-|---*-|-----|          |0110_100_000_sss_sss (s is not equal to 0)   [BVC.S <label>]
  9670:   //JBNVS.S <label>                                 |A|012346|-|---*-|-----|          |0110_100_000_sss_sss (s is not equal to 0)   [BVC.S <label>]
  9671:   //JBVC.S <label>                                  |A|012346|-|---*-|-----|          |0110_100_000_sss_sss (s is not equal to 0)   [BVC.S <label>]
  9672:   //JBNVC.L <label>                                 |A|012346|-|---*-|-----|          |0110_100_000_000_110-0100111011111001-{address}      [BVC.S (*)+8;JMP <label>]
  9673:   //JBVS.L <label>                                  |A|012346|-|---*-|-----|          |0110_100_000_000_110-0100111011111001-{address}      [BVC.S (*)+8;JMP <label>]
  9674:   public static void irpBvcsw () throws M68kException {
  9675:     if (XEiJ.MPU_CC_VC << XEiJ.regCCR < 0) {  //Bccでジャンプ
  9676:       XEiJ.mpuCycleCount += 10;
  9677:       int t = XEiJ.regPC;  //pc0+2
  9678:       int s = (byte) XEiJ.regOC;  //オフセット
  9679:       if (s == 0) {  //Bcc.Wでジャンプ
  9680:         XEiJ.regPC = t + 2;
  9681:         s = XEiJ.busRwse (t);  //pcws
  9682:       } else {  //Bcc.Sでジャンプ
  9683:         //MC68000のBRA.S/BSR.S/Bcc.Sは分岐するとき分岐しない方の直後のワードをリードする
  9684:         //  2MB搭載機で$1FFFFEに無限ループ$60FE(BRA.S (*))を書いて飛び込むと$200000でバスエラーが出る
  9685:         if (XEiJ.MPU_OMIT_EXTRA_READ) {
  9686:           //! 軽量化。リードを省略する
  9687:         } else {
  9688:           XEiJ.busRwse (t);  //pcws
  9689:         }
  9690:       }
  9691:       irpSetPC (t + s);  //pc0+2+オフセット
  9692:     } else if (XEiJ.regOC == 0x6800) {  //Bcc.Wで通過
  9693:       XEiJ.mpuCycleCount += 12;
  9694:       if (XEiJ.MPU_OMIT_OFFSET_READ) {
  9695:         //リードを省略する
  9696:       } else {
  9697:         XEiJ.busRws (XEiJ.regPC);
  9698:       }
  9699:       XEiJ.regPC += 2;
  9700:     } else {  //Bcc.Sで通過
  9701:       XEiJ.mpuCycleCount += 8;
  9702:     }
  9703:   }  //irpBvcsw
  9704: 
  9705:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  9706:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  9707:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  9708:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  9709:   //BVC.S <label>                                   |-|012346|-|---*-|-----|          |0110_100_001_sss_sss
  9710:   //BNVS.S <label>                                  |A|012346|-|---*-|-----|          |0110_100_001_sss_sss [BVC.S <label>]
  9711:   //JBNVS.S <label>                                 |A|012346|-|---*-|-----|          |0110_100_001_sss_sss [BVC.S <label>]
  9712:   //JBVC.S <label>                                  |A|012346|-|---*-|-----|          |0110_100_001_sss_sss [BVC.S <label>]
  9713:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  9714:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  9715:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  9716:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  9717:   //BVC.S <label>                                   |-|012346|-|---*-|-----|          |0110_100_010_sss_sss
  9718:   //BNVS.S <label>                                  |A|012346|-|---*-|-----|          |0110_100_010_sss_sss [BVC.S <label>]
  9719:   //JBNVS.S <label>                                 |A|012346|-|---*-|-----|          |0110_100_010_sss_sss [BVC.S <label>]
  9720:   //JBVC.S <label>                                  |A|012346|-|---*-|-----|          |0110_100_010_sss_sss [BVC.S <label>]
  9721:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  9722:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  9723:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  9724:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  9725:   //BVC.S <label>                                   |-|01----|-|---*-|-----|          |0110_100_011_sss_sss
  9726:   //BNVS.S <label>                                  |A|01----|-|---*-|-----|          |0110_100_011_sss_sss [BVC.S <label>]
  9727:   //JBNVS.S <label>                                 |A|01----|-|---*-|-----|          |0110_100_011_sss_sss [BVC.S <label>]
  9728:   //JBVC.S <label>                                  |A|01----|-|---*-|-----|          |0110_100_011_sss_sss [BVC.S <label>]
  9729:   public static void irpBvcs () throws M68kException {
  9730:     if (XEiJ.MPU_CC_VC << XEiJ.regCCR < 0) {  //Bccでジャンプ
  9731:       XEiJ.mpuCycleCount += 10;
  9732:       int t = XEiJ.regPC;  //pc0+2
  9733:       int s = (byte) XEiJ.regOC;  //オフセット
  9734:       //MC68000のBRA.S/BSR.S/Bcc.Sは分岐するとき分岐しない方の直後のワードをリードする
  9735:       //  2MB搭載機で$1FFFFEに無限ループ$60FE(BRA.S (*))を書いて飛び込むと$200000でバスエラーが出る
  9736:       if (XEiJ.MPU_OMIT_EXTRA_READ) {
  9737:         //! 軽量化。リードを省略する
  9738:       } else {
  9739:         XEiJ.busRwse (t);  //pcws
  9740:       }
  9741:       irpSetPC (t + s);  //pc0+2+オフセット
  9742:     } else {  //Bcc.Sで通過
  9743:       XEiJ.mpuCycleCount += 8;
  9744:     }
  9745:   }  //irpBvcs
  9746: 
  9747:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  9748:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  9749:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  9750:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  9751:   //BVS.W <label>                                   |-|012346|-|---*-|-----|          |0110_100_100_000_000-{offset}
  9752:   //BNVC.W <label>                                  |A|012346|-|---*-|-----|          |0110_100_100_000_000-{offset}        [BVS.W <label>]
  9753:   //JBNVC.W <label>                                 |A|012346|-|---*-|-----|          |0110_100_100_000_000-{offset}        [BVS.W <label>]
  9754:   //JBVS.W <label>                                  |A|012346|-|---*-|-----|          |0110_100_100_000_000-{offset}        [BVS.W <label>]
  9755:   //BVS.S <label>                                   |-|012346|-|---*-|-----|          |0110_100_100_sss_sss (s is not equal to 0)
  9756:   //BNVC.S <label>                                  |A|012346|-|---*-|-----|          |0110_100_100_sss_sss (s is not equal to 0)   [BVS.S <label>]
  9757:   //JBNVC.S <label>                                 |A|012346|-|---*-|-----|          |0110_100_100_sss_sss (s is not equal to 0)   [BVS.S <label>]
  9758:   //JBVS.S <label>                                  |A|012346|-|---*-|-----|          |0110_100_100_sss_sss (s is not equal to 0)   [BVS.S <label>]
  9759:   //JBNVS.L <label>                                 |A|012346|-|---*-|-----|          |0110_100_100_000_110-0100111011111001-{address}      [BVS.S (*)+8;JMP <label>]
  9760:   //JBVC.L <label>                                  |A|012346|-|---*-|-----|          |0110_100_100_000_110-0100111011111001-{address}      [BVS.S (*)+8;JMP <label>]
  9761:   public static void irpBvssw () throws M68kException {
  9762:     if (XEiJ.MPU_CC_VS << XEiJ.regCCR < 0) {  //Bccでジャンプ
  9763:       XEiJ.mpuCycleCount += 10;
  9764:       int t = XEiJ.regPC;  //pc0+2
  9765:       int s = (byte) XEiJ.regOC;  //オフセット
  9766:       if (s == 0) {  //Bcc.Wでジャンプ
  9767:         XEiJ.regPC = t + 2;
  9768:         s = XEiJ.busRwse (t);  //pcws
  9769:       } else {  //Bcc.Sでジャンプ
  9770:         //MC68000のBRA.S/BSR.S/Bcc.Sは分岐するとき分岐しない方の直後のワードをリードする
  9771:         //  2MB搭載機で$1FFFFEに無限ループ$60FE(BRA.S (*))を書いて飛び込むと$200000でバスエラーが出る
  9772:         if (XEiJ.MPU_OMIT_EXTRA_READ) {
  9773:           //! 軽量化。リードを省略する
  9774:         } else {
  9775:           XEiJ.busRwse (t);  //pcws
  9776:         }
  9777:       }
  9778:       irpSetPC (t + s);  //pc0+2+オフセット
  9779:     } else if (XEiJ.regOC == 0x6900) {  //Bcc.Wで通過
  9780:       XEiJ.mpuCycleCount += 12;
  9781:       if (XEiJ.MPU_OMIT_OFFSET_READ) {
  9782:         //リードを省略する
  9783:       } else {
  9784:         XEiJ.busRws (XEiJ.regPC);
  9785:       }
  9786:       XEiJ.regPC += 2;
  9787:     } else {  //Bcc.Sで通過
  9788:       XEiJ.mpuCycleCount += 8;
  9789:     }
  9790:   }  //irpBvssw
  9791: 
  9792:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  9793:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  9794:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  9795:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  9796:   //BVS.S <label>                                   |-|012346|-|---*-|-----|          |0110_100_101_sss_sss
  9797:   //BNVC.S <label>                                  |A|012346|-|---*-|-----|          |0110_100_101_sss_sss [BVS.S <label>]
  9798:   //JBNVC.S <label>                                 |A|012346|-|---*-|-----|          |0110_100_101_sss_sss [BVS.S <label>]
  9799:   //JBVS.S <label>                                  |A|012346|-|---*-|-----|          |0110_100_101_sss_sss [BVS.S <label>]
  9800:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  9801:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  9802:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  9803:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  9804:   //BVS.S <label>                                   |-|012346|-|---*-|-----|          |0110_100_110_sss_sss
  9805:   //BNVC.S <label>                                  |A|012346|-|---*-|-----|          |0110_100_110_sss_sss [BVS.S <label>]
  9806:   //JBNVC.S <label>                                 |A|012346|-|---*-|-----|          |0110_100_110_sss_sss [BVS.S <label>]
  9807:   //JBVS.S <label>                                  |A|012346|-|---*-|-----|          |0110_100_110_sss_sss [BVS.S <label>]
  9808:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  9809:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  9810:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  9811:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  9812:   //BVS.S <label>                                   |-|01----|-|---*-|-----|          |0110_100_111_sss_sss
  9813:   //BNVC.S <label>                                  |A|01----|-|---*-|-----|          |0110_100_111_sss_sss [BVS.S <label>]
  9814:   //JBNVC.S <label>                                 |A|01----|-|---*-|-----|          |0110_100_111_sss_sss [BVS.S <label>]
  9815:   //JBVS.S <label>                                  |A|01----|-|---*-|-----|          |0110_100_111_sss_sss [BVS.S <label>]
  9816:   public static void irpBvss () throws M68kException {
  9817:     if (XEiJ.MPU_CC_VS << XEiJ.regCCR < 0) {  //Bccでジャンプ
  9818:       XEiJ.mpuCycleCount += 10;
  9819:       int t = XEiJ.regPC;  //pc0+2
  9820:       int s = (byte) XEiJ.regOC;  //オフセット
  9821:       //MC68000のBRA.S/BSR.S/Bcc.Sは分岐するとき分岐しない方の直後のワードをリードする
  9822:       //  2MB搭載機で$1FFFFEに無限ループ$60FE(BRA.S (*))を書いて飛び込むと$200000でバスエラーが出る
  9823:       if (XEiJ.MPU_OMIT_EXTRA_READ) {
  9824:         //! 軽量化。リードを省略する
  9825:       } else {
  9826:         XEiJ.busRwse (t);  //pcws
  9827:       }
  9828:       irpSetPC (t + s);  //pc0+2+オフセット
  9829:     } else {  //Bcc.Sで通過
  9830:       XEiJ.mpuCycleCount += 8;
  9831:     }
  9832:   }  //irpBvss
  9833: 
  9834:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  9835:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  9836:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  9837:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  9838:   //BPL.W <label>                                   |-|012346|-|-*---|-----|          |0110_101_000_000_000-{offset}
  9839:   //BNMI.W <label>                                  |A|012346|-|-*---|-----|          |0110_101_000_000_000-{offset}        [BPL.W <label>]
  9840:   //JBNMI.W <label>                                 |A|012346|-|-*---|-----|          |0110_101_000_000_000-{offset}        [BPL.W <label>]
  9841:   //JBPL.W <label>                                  |A|012346|-|-*---|-----|          |0110_101_000_000_000-{offset}        [BPL.W <label>]
  9842:   //BPL.S <label>                                   |-|012346|-|-*---|-----|          |0110_101_000_sss_sss (s is not equal to 0)
  9843:   //BNMI.S <label>                                  |A|012346|-|-*---|-----|          |0110_101_000_sss_sss (s is not equal to 0)   [BPL.S <label>]
  9844:   //JBNMI.S <label>                                 |A|012346|-|-*---|-----|          |0110_101_000_sss_sss (s is not equal to 0)   [BPL.S <label>]
  9845:   //JBPL.S <label>                                  |A|012346|-|-*---|-----|          |0110_101_000_sss_sss (s is not equal to 0)   [BPL.S <label>]
  9846:   //JBMI.L <label>                                  |A|012346|-|-*---|-----|          |0110_101_000_000_110-0100111011111001-{address}      [BPL.S (*)+8;JMP <label>]
  9847:   //JBNPL.L <label>                                 |A|012346|-|-*---|-----|          |0110_101_000_000_110-0100111011111001-{address}      [BPL.S (*)+8;JMP <label>]
  9848:   public static void irpBplsw () throws M68kException {
  9849:     if (XEiJ.MPU_CC_PL << XEiJ.regCCR < 0) {  //Bccでジャンプ
  9850:       XEiJ.mpuCycleCount += 10;
  9851:       int t = XEiJ.regPC;  //pc0+2
  9852:       int s = (byte) XEiJ.regOC;  //オフセット
  9853:       if (s == 0) {  //Bcc.Wでジャンプ
  9854:         XEiJ.regPC = t + 2;
  9855:         s = XEiJ.busRwse (t);  //pcws
  9856:       } else {  //Bcc.Sでジャンプ
  9857:         //MC68000のBRA.S/BSR.S/Bcc.Sは分岐するとき分岐しない方の直後のワードをリードする
  9858:         //  2MB搭載機で$1FFFFEに無限ループ$60FE(BRA.S (*))を書いて飛び込むと$200000でバスエラーが出る
  9859:         if (XEiJ.MPU_OMIT_EXTRA_READ) {
  9860:           //! 軽量化。リードを省略する
  9861:         } else {
  9862:           XEiJ.busRwse (t);  //pcws
  9863:         }
  9864:       }
  9865:       irpSetPC (t + s);  //pc0+2+オフセット
  9866:     } else if (XEiJ.regOC == 0x6a00) {  //Bcc.Wで通過
  9867:       XEiJ.mpuCycleCount += 12;
  9868:       if (XEiJ.MPU_OMIT_OFFSET_READ) {
  9869:         //リードを省略する
  9870:       } else {
  9871:         XEiJ.busRws (XEiJ.regPC);
  9872:       }
  9873:       XEiJ.regPC += 2;
  9874:     } else {  //Bcc.Sで通過
  9875:       XEiJ.mpuCycleCount += 8;
  9876:     }
  9877:   }  //irpBplsw
  9878: 
  9879:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  9880:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  9881:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  9882:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  9883:   //BPL.S <label>                                   |-|012346|-|-*---|-----|          |0110_101_001_sss_sss
  9884:   //BNMI.S <label>                                  |A|012346|-|-*---|-----|          |0110_101_001_sss_sss [BPL.S <label>]
  9885:   //JBNMI.S <label>                                 |A|012346|-|-*---|-----|          |0110_101_001_sss_sss [BPL.S <label>]
  9886:   //JBPL.S <label>                                  |A|012346|-|-*---|-----|          |0110_101_001_sss_sss [BPL.S <label>]
  9887:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  9888:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  9889:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  9890:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  9891:   //BPL.S <label>                                   |-|012346|-|-*---|-----|          |0110_101_010_sss_sss
  9892:   //BNMI.S <label>                                  |A|012346|-|-*---|-----|          |0110_101_010_sss_sss [BPL.S <label>]
  9893:   //JBNMI.S <label>                                 |A|012346|-|-*---|-----|          |0110_101_010_sss_sss [BPL.S <label>]
  9894:   //JBPL.S <label>                                  |A|012346|-|-*---|-----|          |0110_101_010_sss_sss [BPL.S <label>]
  9895:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  9896:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  9897:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  9898:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  9899:   //BPL.S <label>                                   |-|01----|-|-*---|-----|          |0110_101_011_sss_sss
  9900:   //BNMI.S <label>                                  |A|01----|-|-*---|-----|          |0110_101_011_sss_sss [BPL.S <label>]
  9901:   //JBNMI.S <label>                                 |A|01----|-|-*---|-----|          |0110_101_011_sss_sss [BPL.S <label>]
  9902:   //JBPL.S <label>                                  |A|01----|-|-*---|-----|          |0110_101_011_sss_sss [BPL.S <label>]
  9903:   public static void irpBpls () throws M68kException {
  9904:     if (XEiJ.MPU_CC_PL << XEiJ.regCCR < 0) {  //Bccでジャンプ
  9905:       XEiJ.mpuCycleCount += 10;
  9906:       int t = XEiJ.regPC;  //pc0+2
  9907:       int s = (byte) XEiJ.regOC;  //オフセット
  9908:       //MC68000のBRA.S/BSR.S/Bcc.Sは分岐するとき分岐しない方の直後のワードをリードする
  9909:       //  2MB搭載機で$1FFFFEに無限ループ$60FE(BRA.S (*))を書いて飛び込むと$200000でバスエラーが出る
  9910:       if (XEiJ.MPU_OMIT_EXTRA_READ) {
  9911:         //! 軽量化。リードを省略する
  9912:       } else {
  9913:         XEiJ.busRwse (t);  //pcws
  9914:       }
  9915:       irpSetPC (t + s);  //pc0+2+オフセット
  9916:     } else {  //Bcc.Sで通過
  9917:       XEiJ.mpuCycleCount += 8;
  9918:     }
  9919:   }  //irpBpls
  9920: 
  9921:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  9922:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  9923:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  9924:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  9925:   //BMI.W <label>                                   |-|012346|-|-*---|-----|          |0110_101_100_000_000-{offset}
  9926:   //BNPL.W <label>                                  |A|012346|-|-*---|-----|          |0110_101_100_000_000-{offset}        [BMI.W <label>]
  9927:   //JBMI.W <label>                                  |A|012346|-|-*---|-----|          |0110_101_100_000_000-{offset}        [BMI.W <label>]
  9928:   //JBNPL.W <label>                                 |A|012346|-|-*---|-----|          |0110_101_100_000_000-{offset}        [BMI.W <label>]
  9929:   //BMI.S <label>                                   |-|012346|-|-*---|-----|          |0110_101_100_sss_sss (s is not equal to 0)
  9930:   //BNPL.S <label>                                  |A|012346|-|-*---|-----|          |0110_101_100_sss_sss (s is not equal to 0)   [BMI.S <label>]
  9931:   //JBMI.S <label>                                  |A|012346|-|-*---|-----|          |0110_101_100_sss_sss (s is not equal to 0)   [BMI.S <label>]
  9932:   //JBNPL.S <label>                                 |A|012346|-|-*---|-----|          |0110_101_100_sss_sss (s is not equal to 0)   [BMI.S <label>]
  9933:   //JBNMI.L <label>                                 |A|012346|-|-*---|-----|          |0110_101_100_000_110-0100111011111001-{address}      [BMI.S (*)+8;JMP <label>]
  9934:   //JBPL.L <label>                                  |A|012346|-|-*---|-----|          |0110_101_100_000_110-0100111011111001-{address}      [BMI.S (*)+8;JMP <label>]
  9935:   public static void irpBmisw () throws M68kException {
  9936:     if (XEiJ.MPU_CC_MI << XEiJ.regCCR < 0) {  //Bccでジャンプ
  9937:       XEiJ.mpuCycleCount += 10;
  9938:       int t = XEiJ.regPC;  //pc0+2
  9939:       int s = (byte) XEiJ.regOC;  //オフセット
  9940:       if (s == 0) {  //Bcc.Wでジャンプ
  9941:         XEiJ.regPC = t + 2;
  9942:         s = XEiJ.busRwse (t);  //pcws
  9943:       } else {  //Bcc.Sでジャンプ
  9944:         //MC68000のBRA.S/BSR.S/Bcc.Sは分岐するとき分岐しない方の直後のワードをリードする
  9945:         //  2MB搭載機で$1FFFFEに無限ループ$60FE(BRA.S (*))を書いて飛び込むと$200000でバスエラーが出る
  9946:         if (XEiJ.MPU_OMIT_EXTRA_READ) {
  9947:           //! 軽量化。リードを省略する
  9948:         } else {
  9949:           XEiJ.busRwse (t);  //pcws
  9950:         }
  9951:       }
  9952:       irpSetPC (t + s);  //pc0+2+オフセット
  9953:     } else if (XEiJ.regOC == 0x6b00) {  //Bcc.Wで通過
  9954:       XEiJ.mpuCycleCount += 12;
  9955:       if (XEiJ.MPU_OMIT_OFFSET_READ) {
  9956:         //リードを省略する
  9957:       } else {
  9958:         XEiJ.busRws (XEiJ.regPC);
  9959:       }
  9960:       XEiJ.regPC += 2;
  9961:     } else {  //Bcc.Sで通過
  9962:       XEiJ.mpuCycleCount += 8;
  9963:     }
  9964:   }  //irpBmisw
  9965: 
  9966:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  9967:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  9968:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  9969:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  9970:   //BMI.S <label>                                   |-|012346|-|-*---|-----|          |0110_101_101_sss_sss
  9971:   //BNPL.S <label>                                  |A|012346|-|-*---|-----|          |0110_101_101_sss_sss [BMI.S <label>]
  9972:   //JBMI.S <label>                                  |A|012346|-|-*---|-----|          |0110_101_101_sss_sss [BMI.S <label>]
  9973:   //JBNPL.S <label>                                 |A|012346|-|-*---|-----|          |0110_101_101_sss_sss [BMI.S <label>]
  9974:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  9975:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  9976:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  9977:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  9978:   //BMI.S <label>                                   |-|012346|-|-*---|-----|          |0110_101_110_sss_sss
  9979:   //BNPL.S <label>                                  |A|012346|-|-*---|-----|          |0110_101_110_sss_sss [BMI.S <label>]
  9980:   //JBMI.S <label>                                  |A|012346|-|-*---|-----|          |0110_101_110_sss_sss [BMI.S <label>]
  9981:   //JBNPL.S <label>                                 |A|012346|-|-*---|-----|          |0110_101_110_sss_sss [BMI.S <label>]
  9982:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  9983:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
  9984:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
  9985:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
  9986:   //BMI.S <label>                                   |-|01----|-|-*---|-----|          |0110_101_111_sss_sss
  9987:   //BNPL.S <label>                                  |A|01----|-|-*---|-----|          |0110_101_111_sss_sss [BMI.S <label>]
  9988:   //JBMI.S <label>                                  |A|01----|-|-*---|-----|          |0110_101_111_sss_sss [BMI.S <label>]
  9989:   //JBNPL.S <label>                                 |A|01----|-|-*---|-----|          |0110_101_111_sss_sss [BMI.S <label>]
  9990:   public static void irpBmis () throws M68kException {
  9991:     if (XEiJ.MPU_CC_MI << XEiJ.regCCR < 0) {  //Bccでジャンプ
  9992:       XEiJ.mpuCycleCount += 10;
  9993:       int t = XEiJ.regPC;  //pc0+2
  9994:       int s = (byte) XEiJ.regOC;  //オフセット
  9995:       //MC68000のBRA.S/BSR.S/Bcc.Sは分岐するとき分岐しない方の直後のワードをリードする
  9996:       //  2MB搭載機で$1FFFFEに無限ループ$60FE(BRA.S (*))を書いて飛び込むと$200000でバスエラーが出る
  9997:       if (XEiJ.MPU_OMIT_EXTRA_READ) {
  9998:         //! 軽量化。リードを省略する
  9999:       } else {
 10000:         XEiJ.busRwse (t);  //pcws
 10001:       }
 10002:       irpSetPC (t + s);  //pc0+2+オフセット
 10003:     } else {  //Bcc.Sで通過
 10004:       XEiJ.mpuCycleCount += 8;
 10005:     }
 10006:   }  //irpBmis
 10007: 
 10008:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10009:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 10010:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 10011:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10012:   //BGE.W <label>                                   |-|012346|-|-*-*-|-----|          |0110_110_000_000_000-{offset}
 10013:   //BNLT.W <label>                                  |A|012346|-|-*-*-|-----|          |0110_110_000_000_000-{offset}        [BGE.W <label>]
 10014:   //JBGE.W <label>                                  |A|012346|-|-*-*-|-----|          |0110_110_000_000_000-{offset}        [BGE.W <label>]
 10015:   //JBNLT.W <label>                                 |A|012346|-|-*-*-|-----|          |0110_110_000_000_000-{offset}        [BGE.W <label>]
 10016:   //BGE.S <label>                                   |-|012346|-|-*-*-|-----|          |0110_110_000_sss_sss (s is not equal to 0)
 10017:   //BNLT.S <label>                                  |A|012346|-|-*-*-|-----|          |0110_110_000_sss_sss (s is not equal to 0)   [BGE.S <label>]
 10018:   //JBGE.S <label>                                  |A|012346|-|-*-*-|-----|          |0110_110_000_sss_sss (s is not equal to 0)   [BGE.S <label>]
 10019:   //JBNLT.S <label>                                 |A|012346|-|-*-*-|-----|          |0110_110_000_sss_sss (s is not equal to 0)   [BGE.S <label>]
 10020:   //JBLT.L <label>                                  |A|012346|-|-*-*-|-----|          |0110_110_000_000_110-0100111011111001-{address}      [BGE.S (*)+8;JMP <label>]
 10021:   //JBNGE.L <label>                                 |A|012346|-|-*-*-|-----|          |0110_110_000_000_110-0100111011111001-{address}      [BGE.S (*)+8;JMP <label>]
 10022:   public static void irpBgesw () throws M68kException {
 10023:     if (XEiJ.MPU_CC_GE << XEiJ.regCCR < 0) {  //Bccでジャンプ
 10024:       XEiJ.mpuCycleCount += 10;
 10025:       int t = XEiJ.regPC;  //pc0+2
 10026:       int s = (byte) XEiJ.regOC;  //オフセット
 10027:       if (s == 0) {  //Bcc.Wでジャンプ
 10028:         XEiJ.regPC = t + 2;
 10029:         s = XEiJ.busRwse (t);  //pcws
 10030:       } else {  //Bcc.Sでジャンプ
 10031:         //MC68000のBRA.S/BSR.S/Bcc.Sは分岐するとき分岐しない方の直後のワードをリードする
 10032:         //  2MB搭載機で$1FFFFEに無限ループ$60FE(BRA.S (*))を書いて飛び込むと$200000でバスエラーが出る
 10033:         if (XEiJ.MPU_OMIT_EXTRA_READ) {
 10034:           //! 軽量化。リードを省略する
 10035:         } else {
 10036:           XEiJ.busRwse (t);  //pcws
 10037:         }
 10038:       }
 10039:       irpSetPC (t + s);  //pc0+2+オフセット
 10040:     } else if (XEiJ.regOC == 0x6c00) {  //Bcc.Wで通過
 10041:       XEiJ.mpuCycleCount += 12;
 10042:       if (XEiJ.MPU_OMIT_OFFSET_READ) {
 10043:         //リードを省略する
 10044:       } else {
 10045:         XEiJ.busRws (XEiJ.regPC);
 10046:       }
 10047:       XEiJ.regPC += 2;
 10048:     } else {  //Bcc.Sで通過
 10049:       XEiJ.mpuCycleCount += 8;
 10050:     }
 10051:   }  //irpBgesw
 10052: 
 10053:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10054:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 10055:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 10056:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10057:   //BGE.S <label>                                   |-|012346|-|-*-*-|-----|          |0110_110_001_sss_sss
 10058:   //BNLT.S <label>                                  |A|012346|-|-*-*-|-----|          |0110_110_001_sss_sss [BGE.S <label>]
 10059:   //JBGE.S <label>                                  |A|012346|-|-*-*-|-----|          |0110_110_001_sss_sss [BGE.S <label>]
 10060:   //JBNLT.S <label>                                 |A|012346|-|-*-*-|-----|          |0110_110_001_sss_sss [BGE.S <label>]
 10061:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10062:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 10063:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 10064:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10065:   //BGE.S <label>                                   |-|012346|-|-*-*-|-----|          |0110_110_010_sss_sss
 10066:   //BNLT.S <label>                                  |A|012346|-|-*-*-|-----|          |0110_110_010_sss_sss [BGE.S <label>]
 10067:   //JBGE.S <label>                                  |A|012346|-|-*-*-|-----|          |0110_110_010_sss_sss [BGE.S <label>]
 10068:   //JBNLT.S <label>                                 |A|012346|-|-*-*-|-----|          |0110_110_010_sss_sss [BGE.S <label>]
 10069:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10070:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 10071:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 10072:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10073:   //BGE.S <label>                                   |-|01----|-|-*-*-|-----|          |0110_110_011_sss_sss
 10074:   //BNLT.S <label>                                  |A|01----|-|-*-*-|-----|          |0110_110_011_sss_sss [BGE.S <label>]
 10075:   //JBGE.S <label>                                  |A|01----|-|-*-*-|-----|          |0110_110_011_sss_sss [BGE.S <label>]
 10076:   //JBNLT.S <label>                                 |A|01----|-|-*-*-|-----|          |0110_110_011_sss_sss [BGE.S <label>]
 10077:   public static void irpBges () throws M68kException {
 10078:     if (XEiJ.MPU_CC_GE << XEiJ.regCCR < 0) {  //Bccでジャンプ
 10079:       XEiJ.mpuCycleCount += 10;
 10080:       int t = XEiJ.regPC;  //pc0+2
 10081:       int s = (byte) XEiJ.regOC;  //オフセット
 10082:       //MC68000のBRA.S/BSR.S/Bcc.Sは分岐するとき分岐しない方の直後のワードをリードする
 10083:       //  2MB搭載機で$1FFFFEに無限ループ$60FE(BRA.S (*))を書いて飛び込むと$200000でバスエラーが出る
 10084:       if (XEiJ.MPU_OMIT_EXTRA_READ) {
 10085:         //! 軽量化。リードを省略する
 10086:       } else {
 10087:         XEiJ.busRwse (t);  //pcws
 10088:       }
 10089:       irpSetPC (t + s);  //pc0+2+オフセット
 10090:     } else {  //Bcc.Sで通過
 10091:       XEiJ.mpuCycleCount += 8;
 10092:     }
 10093:   }  //irpBges
 10094: 
 10095:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10096:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 10097:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 10098:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10099:   //BLT.W <label>                                   |-|012346|-|-*-*-|-----|          |0110_110_100_000_000-{offset}
 10100:   //BNGE.W <label>                                  |A|012346|-|-*-*-|-----|          |0110_110_100_000_000-{offset}        [BLT.W <label>]
 10101:   //JBLT.W <label>                                  |A|012346|-|-*-*-|-----|          |0110_110_100_000_000-{offset}        [BLT.W <label>]
 10102:   //JBNGE.W <label>                                 |A|012346|-|-*-*-|-----|          |0110_110_100_000_000-{offset}        [BLT.W <label>]
 10103:   //BLT.S <label>                                   |-|012346|-|-*-*-|-----|          |0110_110_100_sss_sss (s is not equal to 0)
 10104:   //BNGE.S <label>                                  |A|012346|-|-*-*-|-----|          |0110_110_100_sss_sss (s is not equal to 0)   [BLT.S <label>]
 10105:   //JBLT.S <label>                                  |A|012346|-|-*-*-|-----|          |0110_110_100_sss_sss (s is not equal to 0)   [BLT.S <label>]
 10106:   //JBNGE.S <label>                                 |A|012346|-|-*-*-|-----|          |0110_110_100_sss_sss (s is not equal to 0)   [BLT.S <label>]
 10107:   //JBGE.L <label>                                  |A|012346|-|-*-*-|-----|          |0110_110_100_000_110-0100111011111001-{address}      [BLT.S (*)+8;JMP <label>]
 10108:   //JBNLT.L <label>                                 |A|012346|-|-*-*-|-----|          |0110_110_100_000_110-0100111011111001-{address}      [BLT.S (*)+8;JMP <label>]
 10109:   public static void irpBltsw () throws M68kException {
 10110:     if (XEiJ.MPU_CC_LT << XEiJ.regCCR < 0) {  //Bccでジャンプ
 10111:       XEiJ.mpuCycleCount += 10;
 10112:       int t = XEiJ.regPC;  //pc0+2
 10113:       int s = (byte) XEiJ.regOC;  //オフセット
 10114:       if (s == 0) {  //Bcc.Wでジャンプ
 10115:         XEiJ.regPC = t + 2;
 10116:         s = XEiJ.busRwse (t);  //pcws
 10117:       } else {  //Bcc.Sでジャンプ
 10118:         //MC68000のBRA.S/BSR.S/Bcc.Sは分岐するとき分岐しない方の直後のワードをリードする
 10119:         //  2MB搭載機で$1FFFFEに無限ループ$60FE(BRA.S (*))を書いて飛び込むと$200000でバスエラーが出る
 10120:         if (XEiJ.MPU_OMIT_EXTRA_READ) {
 10121:           //! 軽量化。リードを省略する
 10122:         } else {
 10123:           XEiJ.busRwse (t);  //pcws
 10124:         }
 10125:       }
 10126:       irpSetPC (t + s);  //pc0+2+オフセット
 10127:     } else if (XEiJ.regOC == 0x6d00) {  //Bcc.Wで通過
 10128:       XEiJ.mpuCycleCount += 12;
 10129:       if (XEiJ.MPU_OMIT_OFFSET_READ) {
 10130:         //リードを省略する
 10131:       } else {
 10132:         XEiJ.busRws (XEiJ.regPC);
 10133:       }
 10134:       XEiJ.regPC += 2;
 10135:     } else {  //Bcc.Sで通過
 10136:       XEiJ.mpuCycleCount += 8;
 10137:     }
 10138:   }  //irpBltsw
 10139: 
 10140:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10141:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 10142:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 10143:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10144:   //BLT.S <label>                                   |-|012346|-|-*-*-|-----|          |0110_110_101_sss_sss
 10145:   //BNGE.S <label>                                  |A|012346|-|-*-*-|-----|          |0110_110_101_sss_sss [BLT.S <label>]
 10146:   //JBLT.S <label>                                  |A|012346|-|-*-*-|-----|          |0110_110_101_sss_sss [BLT.S <label>]
 10147:   //JBNGE.S <label>                                 |A|012346|-|-*-*-|-----|          |0110_110_101_sss_sss [BLT.S <label>]
 10148:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10149:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 10150:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 10151:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10152:   //BLT.S <label>                                   |-|012346|-|-*-*-|-----|          |0110_110_110_sss_sss
 10153:   //BNGE.S <label>                                  |A|012346|-|-*-*-|-----|          |0110_110_110_sss_sss [BLT.S <label>]
 10154:   //JBLT.S <label>                                  |A|012346|-|-*-*-|-----|          |0110_110_110_sss_sss [BLT.S <label>]
 10155:   //JBNGE.S <label>                                 |A|012346|-|-*-*-|-----|          |0110_110_110_sss_sss [BLT.S <label>]
 10156:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10157:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 10158:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 10159:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10160:   //BLT.S <label>                                   |-|01----|-|-*-*-|-----|          |0110_110_111_sss_sss
 10161:   //BNGE.S <label>                                  |A|01----|-|-*-*-|-----|          |0110_110_111_sss_sss [BLT.S <label>]
 10162:   //JBLT.S <label>                                  |A|01----|-|-*-*-|-----|          |0110_110_111_sss_sss [BLT.S <label>]
 10163:   //JBNGE.S <label>                                 |A|01----|-|-*-*-|-----|          |0110_110_111_sss_sss [BLT.S <label>]
 10164:   public static void irpBlts () throws M68kException {
 10165:     if (XEiJ.MPU_CC_LT << XEiJ.regCCR < 0) {  //Bccでジャンプ
 10166:       XEiJ.mpuCycleCount += 10;
 10167:       int t = XEiJ.regPC;  //pc0+2
 10168:       int s = (byte) XEiJ.regOC;  //オフセット
 10169:       //MC68000のBRA.S/BSR.S/Bcc.Sは分岐するとき分岐しない方の直後のワードをリードする
 10170:       //  2MB搭載機で$1FFFFEに無限ループ$60FE(BRA.S (*))を書いて飛び込むと$200000でバスエラーが出る
 10171:       if (XEiJ.MPU_OMIT_EXTRA_READ) {
 10172:         //! 軽量化。リードを省略する
 10173:       } else {
 10174:         XEiJ.busRwse (t);  //pcws
 10175:       }
 10176:       irpSetPC (t + s);  //pc0+2+オフセット
 10177:     } else {  //Bcc.Sで通過
 10178:       XEiJ.mpuCycleCount += 8;
 10179:     }
 10180:   }  //irpBlts
 10181: 
 10182:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10183:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 10184:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 10185:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10186:   //BGT.W <label>                                   |-|012346|-|-***-|-----|          |0110_111_000_000_000-{offset}
 10187:   //BNLE.W <label>                                  |A|012346|-|-***-|-----|          |0110_111_000_000_000-{offset}        [BGT.W <label>]
 10188:   //JBGT.W <label>                                  |A|012346|-|-***-|-----|          |0110_111_000_000_000-{offset}        [BGT.W <label>]
 10189:   //JBNLE.W <label>                                 |A|012346|-|-***-|-----|          |0110_111_000_000_000-{offset}        [BGT.W <label>]
 10190:   //BGT.S <label>                                   |-|012346|-|-***-|-----|          |0110_111_000_sss_sss (s is not equal to 0)
 10191:   //BNLE.S <label>                                  |A|012346|-|-***-|-----|          |0110_111_000_sss_sss (s is not equal to 0)   [BGT.S <label>]
 10192:   //JBGT.S <label>                                  |A|012346|-|-***-|-----|          |0110_111_000_sss_sss (s is not equal to 0)   [BGT.S <label>]
 10193:   //JBNLE.S <label>                                 |A|012346|-|-***-|-----|          |0110_111_000_sss_sss (s is not equal to 0)   [BGT.S <label>]
 10194:   //JBLE.L <label>                                  |A|012346|-|-***-|-----|          |0110_111_000_000_110-0100111011111001-{address}      [BGT.S (*)+8;JMP <label>]
 10195:   //JBNGT.L <label>                                 |A|012346|-|-***-|-----|          |0110_111_000_000_110-0100111011111001-{address}      [BGT.S (*)+8;JMP <label>]
 10196:   public static void irpBgtsw () throws M68kException {
 10197:     if (XEiJ.MPU_CC_GT << XEiJ.regCCR < 0) {  //Bccでジャンプ
 10198:       XEiJ.mpuCycleCount += 10;
 10199:       int t = XEiJ.regPC;  //pc0+2
 10200:       int s = (byte) XEiJ.regOC;  //オフセット
 10201:       if (s == 0) {  //Bcc.Wでジャンプ
 10202:         XEiJ.regPC = t + 2;
 10203:         s = XEiJ.busRwse (t);  //pcws
 10204:       } else {  //Bcc.Sでジャンプ
 10205:         //MC68000のBRA.S/BSR.S/Bcc.Sは分岐するとき分岐しない方の直後のワードをリードする
 10206:         //  2MB搭載機で$1FFFFEに無限ループ$60FE(BRA.S (*))を書いて飛び込むと$200000でバスエラーが出る
 10207:         if (XEiJ.MPU_OMIT_EXTRA_READ) {
 10208:           //! 軽量化。リードを省略する
 10209:         } else {
 10210:           XEiJ.busRwse (t);  //pcws
 10211:         }
 10212:       }
 10213:       irpSetPC (t + s);  //pc0+2+オフセット
 10214:     } else if (XEiJ.regOC == 0x6e00) {  //Bcc.Wで通過
 10215:       XEiJ.mpuCycleCount += 12;
 10216:       if (XEiJ.MPU_OMIT_OFFSET_READ) {
 10217:         //リードを省略する
 10218:       } else {
 10219:         XEiJ.busRws (XEiJ.regPC);
 10220:       }
 10221:       XEiJ.regPC += 2;
 10222:     } else {  //Bcc.Sで通過
 10223:       XEiJ.mpuCycleCount += 8;
 10224:     }
 10225:   }  //irpBgtsw
 10226: 
 10227:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10228:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 10229:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 10230:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10231:   //BGT.S <label>                                   |-|012346|-|-***-|-----|          |0110_111_001_sss_sss
 10232:   //BNLE.S <label>                                  |A|012346|-|-***-|-----|          |0110_111_001_sss_sss [BGT.S <label>]
 10233:   //JBGT.S <label>                                  |A|012346|-|-***-|-----|          |0110_111_001_sss_sss [BGT.S <label>]
 10234:   //JBNLE.S <label>                                 |A|012346|-|-***-|-----|          |0110_111_001_sss_sss [BGT.S <label>]
 10235:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10236:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 10237:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 10238:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10239:   //BGT.S <label>                                   |-|012346|-|-***-|-----|          |0110_111_010_sss_sss
 10240:   //BNLE.S <label>                                  |A|012346|-|-***-|-----|          |0110_111_010_sss_sss [BGT.S <label>]
 10241:   //JBGT.S <label>                                  |A|012346|-|-***-|-----|          |0110_111_010_sss_sss [BGT.S <label>]
 10242:   //JBNLE.S <label>                                 |A|012346|-|-***-|-----|          |0110_111_010_sss_sss [BGT.S <label>]
 10243:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10244:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 10245:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 10246:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10247:   //BGT.S <label>                                   |-|01----|-|-***-|-----|          |0110_111_011_sss_sss
 10248:   //BNLE.S <label>                                  |A|01----|-|-***-|-----|          |0110_111_011_sss_sss [BGT.S <label>]
 10249:   //JBGT.S <label>                                  |A|01----|-|-***-|-----|          |0110_111_011_sss_sss [BGT.S <label>]
 10250:   //JBNLE.S <label>                                 |A|01----|-|-***-|-----|          |0110_111_011_sss_sss [BGT.S <label>]
 10251:   public static void irpBgts () throws M68kException {
 10252:     if (XEiJ.MPU_CC_GT << XEiJ.regCCR < 0) {  //Bccでジャンプ
 10253:       XEiJ.mpuCycleCount += 10;
 10254:       int t = XEiJ.regPC;  //pc0+2
 10255:       int s = (byte) XEiJ.regOC;  //オフセット
 10256:       //MC68000のBRA.S/BSR.S/Bcc.Sは分岐するとき分岐しない方の直後のワードをリードする
 10257:       //  2MB搭載機で$1FFFFEに無限ループ$60FE(BRA.S (*))を書いて飛び込むと$200000でバスエラーが出る
 10258:       if (XEiJ.MPU_OMIT_EXTRA_READ) {
 10259:         //! 軽量化。リードを省略する
 10260:       } else {
 10261:         XEiJ.busRwse (t);  //pcws
 10262:       }
 10263:       irpSetPC (t + s);  //pc0+2+オフセット
 10264:     } else {  //Bcc.Sで通過
 10265:       XEiJ.mpuCycleCount += 8;
 10266:     }
 10267:   }  //irpBgts
 10268: 
 10269:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10270:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 10271:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 10272:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10273:   //BLE.W <label>                                   |-|012346|-|-***-|-----|          |0110_111_100_000_000-{offset}
 10274:   //BNGT.W <label>                                  |A|012346|-|-***-|-----|          |0110_111_100_000_000-{offset}        [BLE.W <label>]
 10275:   //JBLE.W <label>                                  |A|012346|-|-***-|-----|          |0110_111_100_000_000-{offset}        [BLE.W <label>]
 10276:   //JBNGT.W <label>                                 |A|012346|-|-***-|-----|          |0110_111_100_000_000-{offset}        [BLE.W <label>]
 10277:   //BLE.S <label>                                   |-|012346|-|-***-|-----|          |0110_111_100_sss_sss (s is not equal to 0)
 10278:   //BNGT.S <label>                                  |A|012346|-|-***-|-----|          |0110_111_100_sss_sss (s is not equal to 0)   [BLE.S <label>]
 10279:   //JBLE.S <label>                                  |A|012346|-|-***-|-----|          |0110_111_100_sss_sss (s is not equal to 0)   [BLE.S <label>]
 10280:   //JBNGT.S <label>                                 |A|012346|-|-***-|-----|          |0110_111_100_sss_sss (s is not equal to 0)   [BLE.S <label>]
 10281:   //JBGT.L <label>                                  |A|012346|-|-***-|-----|          |0110_111_100_000_110-0100111011111001-{address}      [BLE.S (*)+8;JMP <label>]
 10282:   //JBNLE.L <label>                                 |A|012346|-|-***-|-----|          |0110_111_100_000_110-0100111011111001-{address}      [BLE.S (*)+8;JMP <label>]
 10283:   public static void irpBlesw () throws M68kException {
 10284:     if (XEiJ.MPU_CC_LE << XEiJ.regCCR < 0) {  //Bccでジャンプ
 10285:       XEiJ.mpuCycleCount += 10;
 10286:       int t = XEiJ.regPC;  //pc0+2
 10287:       int s = (byte) XEiJ.regOC;  //オフセット
 10288:       if (s == 0) {  //Bcc.Wでジャンプ
 10289:         XEiJ.regPC = t + 2;
 10290:         s = XEiJ.busRwse (t);  //pcws
 10291:       } else {  //Bcc.Sでジャンプ
 10292:         //MC68000のBRA.S/BSR.S/Bcc.Sは分岐するとき分岐しない方の直後のワードをリードする
 10293:         //  2MB搭載機で$1FFFFEに無限ループ$60FE(BRA.S (*))を書いて飛び込むと$200000でバスエラーが出る
 10294:         if (XEiJ.MPU_OMIT_EXTRA_READ) {
 10295:           //! 軽量化。リードを省略する
 10296:         } else {
 10297:           XEiJ.busRwse (t);  //pcws
 10298:         }
 10299:       }
 10300:       irpSetPC (t + s);  //pc0+2+オフセット
 10301:     } else if (XEiJ.regOC == 0x6f00) {  //Bcc.Wで通過
 10302:       XEiJ.mpuCycleCount += 12;
 10303:       if (XEiJ.MPU_OMIT_OFFSET_READ) {
 10304:         //リードを省略する
 10305:       } else {
 10306:         XEiJ.busRws (XEiJ.regPC);
 10307:       }
 10308:       XEiJ.regPC += 2;
 10309:     } else {  //Bcc.Sで通過
 10310:       XEiJ.mpuCycleCount += 8;
 10311:     }
 10312:   }  //irpBlesw
 10313: 
 10314:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10315:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 10316:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 10317:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10318:   //BLE.S <label>                                   |-|012346|-|-***-|-----|          |0110_111_101_sss_sss
 10319:   //BNGT.S <label>                                  |A|012346|-|-***-|-----|          |0110_111_101_sss_sss [BLE.S <label>]
 10320:   //JBLE.S <label>                                  |A|012346|-|-***-|-----|          |0110_111_101_sss_sss [BLE.S <label>]
 10321:   //JBNGT.S <label>                                 |A|012346|-|-***-|-----|          |0110_111_101_sss_sss [BLE.S <label>]
 10322:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10323:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 10324:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 10325:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10326:   //BLE.S <label>                                   |-|012346|-|-***-|-----|          |0110_111_110_sss_sss
 10327:   //BNGT.S <label>                                  |A|012346|-|-***-|-----|          |0110_111_110_sss_sss [BLE.S <label>]
 10328:   //JBLE.S <label>                                  |A|012346|-|-***-|-----|          |0110_111_110_sss_sss [BLE.S <label>]
 10329:   //JBNGT.S <label>                                 |A|012346|-|-***-|-----|          |0110_111_110_sss_sss [BLE.S <label>]
 10330:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10331:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 10332:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 10333:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10334:   //BLE.S <label>                                   |-|01----|-|-***-|-----|          |0110_111_111_sss_sss
 10335:   //BNGT.S <label>                                  |A|01----|-|-***-|-----|          |0110_111_111_sss_sss [BLE.S <label>]
 10336:   //JBLE.S <label>                                  |A|01----|-|-***-|-----|          |0110_111_111_sss_sss [BLE.S <label>]
 10337:   //JBNGT.S <label>                                 |A|01----|-|-***-|-----|          |0110_111_111_sss_sss [BLE.S <label>]
 10338:   public static void irpBles () throws M68kException {
 10339:     if (XEiJ.MPU_CC_LE << XEiJ.regCCR < 0) {  //Bccでジャンプ
 10340:       XEiJ.mpuCycleCount += 10;
 10341:       int t = XEiJ.regPC;  //pc0+2
 10342:       int s = (byte) XEiJ.regOC;  //オフセット
 10343:       //MC68000のBRA.S/BSR.S/Bcc.Sは分岐するとき分岐しない方の直後のワードをリードする
 10344:       //  2MB搭載機で$1FFFFEに無限ループ$60FE(BRA.S (*))を書いて飛び込むと$200000でバスエラーが出る
 10345:       if (XEiJ.MPU_OMIT_EXTRA_READ) {
 10346:         //! 軽量化。リードを省略する
 10347:       } else {
 10348:         XEiJ.busRwse (t);  //pcws
 10349:       }
 10350:       irpSetPC (t + s);  //pc0+2+オフセット
 10351:     } else {  //Bcc.Sで通過
 10352:       XEiJ.mpuCycleCount += 8;
 10353:     }
 10354:   }  //irpBles
 10355: 
 10356:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10357:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 10358:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 10359:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10360:   //IOCS <name>                                     |A|012346|-|UUUUU|UUUUU|          |0111_000_0dd_ddd_ddd-0100111001001111        [MOVEQ.L #<data>,D0;TRAP #15]
 10361:   //MOVEQ.L #<data>,Dq                              |-|012346|-|-UUUU|-**00|          |0111_qqq_0dd_ddd_ddd
 10362:   public static void irpMoveq () throws M68kException {
 10363:     XEiJ.mpuCycleCount += 4;
 10364:     int z;
 10365:     XEiJ.regRn[XEiJ.regOC >> 9 & 7] = z = (byte) XEiJ.regOC;
 10366:     XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X);  //ccr_tst
 10367:   }  //irpMoveq
 10368: 
 10369:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10370:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 10371:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 10372:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10373:   //MVS.B <ea>,Dq                                   |-|------|-|-UUUU|-**00|D M+-WXZPI|0111_qqq_100_mmm_rrr (ISA_B)
 10374:   //
 10375:   //MVS.B <ea>,Dq
 10376:   //  バイトデータをロングに符号拡張してDqの全体を更新する
 10377:   public static void irpMvsByte () throws M68kException {
 10378:     XEiJ.mpuCycleCount += 4;
 10379:     int ea = XEiJ.regOC & 63;
 10380:     int z;
 10381:     XEiJ.regRn[XEiJ.regOC >> 9 & 7] = z = ea < XEiJ.EA_AR ? (byte) XEiJ.regRn[ea] : XEiJ.busRbs (efaAnyByte (ea));
 10382:     XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X);  //ccr_tst
 10383:   }  //irpMvsByte
 10384: 
 10385:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10386:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 10387:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 10388:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10389:   //MVS.W <ea>,Dq                                   |-|------|-|-UUUU|-**00|D M+-WXZPI|0111_qqq_101_mmm_rrr (ISA_B)
 10390:   //
 10391:   //MVS.W <ea>,Dq
 10392:   //  ワードデータをロングに符号拡張してDqの全体を更新する
 10393:   public static void irpMvsWord () throws M68kException {
 10394:     XEiJ.mpuCycleCount += 4;
 10395:     int ea = XEiJ.regOC & 63;
 10396:     int z;
 10397:     XEiJ.regRn[XEiJ.regOC >> 9 & 7] = z = ea < XEiJ.EA_AR ? (short) XEiJ.regRn[ea] : XEiJ.busRws (efaAnyWord (ea));
 10398:     XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X);  //ccr_tst
 10399:   }  //irpMvsWord
 10400: 
 10401:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10402:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 10403:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 10404:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10405:   //MVZ.B <ea>,Dq                                   |-|------|-|-UUUU|-0*00|D M+-WXZPI|0111_qqq_110_mmm_rrr (ISA_B)
 10406:   //
 10407:   //MVZ.B <ea>,Dq
 10408:   //  バイトデータをロングにゼロ拡張してDqの全体を更新する
 10409:   public static void irpMvzByte () throws M68kException {
 10410:     XEiJ.mpuCycleCount += 4;
 10411:     int ea = XEiJ.regOC & 63;
 10412:     int z;
 10413:     XEiJ.regRn[XEiJ.regOC >> 9 & 7] = z = ea < XEiJ.EA_AR ? 0xff & XEiJ.regRn[ea] : XEiJ.busRbz (efaAnyByte (ea));
 10414:     XEiJ.regCCR = XEiJ.REG_CCR_X & XEiJ.regCCR | (z == 0 ? XEiJ.REG_CCR_Z : 0);
 10415:   }  //irpMvzByte
 10416: 
 10417:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10418:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 10419:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 10420:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10421:   //MVZ.W <ea>,Dq                                   |-|------|-|-UUUU|-0*00|D M+-WXZPI|0111_qqq_111_mmm_rrr (ISA_B)
 10422:   //
 10423:   //MVZ.W <ea>,Dq
 10424:   //  ワードデータをロングにゼロ拡張してDqの全体を更新する
 10425:   public static void irpMvzWord () throws M68kException {
 10426:     XEiJ.mpuCycleCount += 4;
 10427:     int ea = XEiJ.regOC & 63;
 10428:     int z;
 10429:     XEiJ.regRn[XEiJ.regOC >> 9 & 7] = z = ea < XEiJ.EA_AR ? (char) XEiJ.regRn[ea] : XEiJ.busRwz (efaAnyWord (ea));
 10430:     XEiJ.regCCR = XEiJ.REG_CCR_X & XEiJ.regCCR | (z == 0 ? XEiJ.REG_CCR_Z : 0);
 10431:   }  //irpMvzWord
 10432: 
 10433:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10434:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 10435:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 10436:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10437:   //OR.B <ea>,Dq                                    |-|012346|-|-UUUU|-**00|D M+-WXZPI|1000_qqq_000_mmm_rrr
 10438:   public static void irpOrToRegByte () throws M68kException {
 10439:     XEiJ.mpuCycleCount += 4;
 10440:     int ea = XEiJ.regOC & 63;
 10441:     XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & (XEiJ.regRn[XEiJ.regOC >> 9 & 7] |= 255 & (ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : XEiJ.busRbs (efaAnyByte (ea))))];  //ccr_tst_byte。0拡張してからOR
 10442:   }  //irpOrToRegByte
 10443: 
 10444:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10445:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 10446:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 10447:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10448:   //OR.W <ea>,Dq                                    |-|012346|-|-UUUU|-**00|D M+-WXZPI|1000_qqq_001_mmm_rrr
 10449:   public static void irpOrToRegWord () throws M68kException {
 10450:     XEiJ.mpuCycleCount += 4;
 10451:     int ea = XEiJ.regOC & 63;
 10452:     int z = (short) (XEiJ.regRn[XEiJ.regOC >> 9 & 7] |= ea < XEiJ.EA_AR ? (char) XEiJ.regRn[ea] : XEiJ.busRwz (efaAnyWord (ea)));  //0拡張してからOR
 10453:     XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X);  //ccr_tst
 10454:   }  //irpOrToRegWord
 10455: 
 10456:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10457:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 10458:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 10459:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10460:   //OR.L <ea>,Dq                                    |-|012346|-|-UUUU|-**00|D M+-WXZPI|1000_qqq_010_mmm_rrr
 10461:   public static void irpOrToRegLong () throws M68kException {
 10462:     int ea = XEiJ.regOC & 63;
 10463:     int qqq = XEiJ.regOC >> 9 & 7;
 10464:     int z;
 10465:     if (ea < XEiJ.EA_AR) {  //OR.L Dr,Dq
 10466:       XEiJ.mpuCycleCount += 8;
 10467:       XEiJ.regRn[qqq] = z = XEiJ.regRn[qqq] | XEiJ.regRn[ea];
 10468:     } else {  //OR.L <mem>,Dq
 10469:       XEiJ.mpuCycleCount += ea == XEiJ.EA_IM ? 8 : 6;  //ソースが#<data>のとき2増やす
 10470:       XEiJ.regRn[qqq] = z = XEiJ.regRn[qqq] | XEiJ.busRls (efaAnyLong (ea));
 10471:     }
 10472:     XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X);  //ccr_tst
 10473:   }  //irpOrToRegLong
 10474: 
 10475:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10476:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 10477:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 10478:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10479:   //DIVU.W <ea>,Dq                                  |-|012346|-|-UUUU|-***0|D M+-WXZPI|1000_qqq_011_mmm_rrr
 10480:   //
 10481:   //DIVU.W <ea>,Dq
 10482:   //  M68000PRMでDIVU.Wのオーバーフローの条件が16bit符号あり整数と書かれているのは16bit符号なし整数の間違い
 10483:   public static void irpDivuWord () throws M68kException {
 10484:     //  X  変化しない
 10485:     //  N  ゼロ除算またはオーバーフローのとき不定。商が負のときセット。それ以外はクリア
 10486:     //  Z  ゼロ除算またはオーバーフローのとき不定。商が0のときセット。それ以外はクリア
 10487:     //  V  ゼロ除算のとき不定。オーバーフローのときセット。それ以外はクリア
 10488:     //  C  常にクリア
 10489:     int ea = XEiJ.regOC & 63;
 10490:     int qqq = XEiJ.regOC >> 9 & 7;
 10491:     int y = ea < XEiJ.EA_AR ? (char) XEiJ.regRn[ea] : XEiJ.busRwz (efaAnyWord (ea));  //除数
 10492:     int x = XEiJ.regRn[qqq];  //被除数
 10493:     XEiJ.mpuCycleCount += irpDivuCyclesModified (x, y);
 10494:     if (y == 0) {  //ゼロ除算
 10495:       //Dqは変化しない
 10496:       XEiJ.regCCR = (XEiJ.regCCR & XEiJ.REG_CCR_X |  //Xは変化しない
 10497:                      (x < 0 ? XEiJ.REG_CCR_N : 0) |  //Nは被除数が負のときセット、さもなくばクリア
 10498:                      (x >> 16 == 0 ? XEiJ.REG_CCR_Z : 0) |  //Zは被除数が$0000xxxxのときセット、さもなくばクリア
 10499:                      XEiJ.REG_CCR_V  //Vは常にセット
 10500:                      );  //Cは常にクリア
 10501:       M68kException.m6eNumber = M68kException.M6E_DIVIDE_BY_ZERO;
 10502:       throw M68kException.m6eSignal;
 10503:     }
 10504:     //無理にintで符号なし除算をやろうとするよりもdoubleにキャストしてから割ったほうが速い
 10505:     //  intの除算をdoubleの除算器で行うプロセッサならばなおさら
 10506:     //被除数を符号なし32ビットとみなすためlongを経由してdoubleに変換する
 10507:     //doubleからlongやintへのキャストは小数点以下が切り捨てられ、オーバーフローは表現できる絶対値最大の値になる
 10508:     //doubleから直接intに戻しているので0xffffffff/0x0001=0xffffffffが絶対値最大の0x7fffffffになってしまうが、
 10509:     //DIVU.Wではオーバーフローになることに変わりはないのでよいことにする
 10510:     //  符号なし32ビットの0xffffffffにしたいときは戻すときもlongを経由すればよい
 10511:     int z = (int) ((double) ((long) x & 0xffffffffL) / (double) y);  //商
 10512:     if (z >>> 16 != 0) {  //オーバーフローあり
 10513:       //Dqは変化しない
 10514:       XEiJ.regCCR = (XEiJ.regCCR & XEiJ.REG_CCR_X |  //Xは変化しない
 10515:                      (x < 0 ? XEiJ.REG_CCR_N : 0) |  //Nは被除数が負のときセット、さもなくばクリア
 10516:                      //Zは常にクリア
 10517:                      XEiJ.REG_CCR_V  //Vは常にセット
 10518:                      );  //Cは常にクリア
 10519:     } else {  //オーバーフローなし
 10520:       XEiJ.regRn[qqq] = x - y * z << 16 | z;  //余り<<16|商
 10521:       z = (short) z;
 10522:       XEiJ.regCCR = (XEiJ.regCCR & XEiJ.REG_CCR_X |  //Xは変化しない
 10523:                      (z < 0 ? XEiJ.REG_CCR_N : 0) |  //Nは商が負のときセット、さもなくばクリア
 10524:                      (z == 0 ? XEiJ.REG_CCR_Z : 0)  //Zは商が0のときセット、さもなくばクリア
 10525:                      //Vは常にクリア
 10526:                      );  //Cは常にクリア
 10527:     }  //if オーバーフローあり/オーバーフローなし
 10528:   }  //irpDivuWord
 10529: 
 10530:   //DIVUの実行時間
 10531:   //  以下に実効アドレスの時間を加える
 10532:   //    ゼロ除算のとき38
 10533:   //    オーバーフローのとき10
 10534:   //    正常終了のとき76+
 10535:   //      商のビット15~1について
 10536:   //        被除数のビット16が1で商が1のとき0
 10537:   //        被除数のビット16が0で商が1のとき2
 10538:   //        被除数のビット16が0で商が0のとき4
 10539:   //  補足
 10540:   //    商のビット0を計算に含めると最大140になりマニュアルと一致する
 10541:   //  参考
 10542:   //    https://www.atari-forum.com/viewtopic.php?t=6484
 10543:   public static int irpDivuCyclesModified (int x, int y) {
 10544:     y &= 0xffff;  //ゼロ拡張
 10545:     if (y == 0) {  //ゼロ除算
 10546:       return 38;
 10547:     }
 10548:     int r = x >>> 16;  //余り。符号なし右シフト
 10549:     if (y <= r) {  //オーバーフロー
 10550:       return 10;
 10551:     }
 10552:     int c = 76;
 10553:     for (int i = 15; 0 < i; i--) {  //ビット0を含まない
 10554:       r = r << 1 | ((x >> i) & 1);
 10555:       if (0x10000 <= r) {  //被除数のビット16が1で商が1
 10556:         r -= y;
 10557:       } else if (y <= r) {  //被除数のビット16が0で商が1
 10558:         r -= y;
 10559:         c += 2;
 10560:       } else {  //被除数のビット16が0で商が0
 10561:         c += 4;
 10562:       }
 10563:     }
 10564:     return c;
 10565:   }
 10566: 
 10567:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10568:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 10569:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 10570:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10571:   //SBCD.B Dr,Dq                                    |-|012346|-|UUUUU|*U*U*|          |1000_qqq_100_000_rrr
 10572:   //SBCD.B -(Ar),-(Aq)                              |-|012346|-|UUUUU|*U*U*|          |1000_qqq_100_001_rrr
 10573:   //OR.B Dq,<ea>                                    |-|012346|-|-UUUU|-**00|  M+-WXZ  |1000_qqq_100_mmm_rrr
 10574:   public static void irpOrToMemByte () throws M68kException {
 10575:     int ea = XEiJ.regOC & 63;
 10576:     if (ea >= XEiJ.EA_MM) {  //OR.B Dq,<ea>
 10577:       XEiJ.mpuCycleCount += 8;
 10578:       int a = efaMltByte (ea);
 10579:       int z = XEiJ.regRn[XEiJ.regOC >> 9 & 7] | XEiJ.busRbs (a);
 10580:       XEiJ.busWb (a, z);
 10581:       XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & z];  //ccr_tst_byte
 10582:     } else if (ea < XEiJ.EA_AR) {  //SBCD.B Dr,Dq
 10583:       int qqq = XEiJ.regOC >> 9 & 7;
 10584:       XEiJ.mpuCycleCount += 6;
 10585:       int x;
 10586:       XEiJ.regRn[qqq] = ~0xff & (x = XEiJ.regRn[qqq]) | irpSbcd (x, XEiJ.regRn[ea]);
 10587:     } else {  //SBCD.B -(Ar),-(Aq)
 10588:       XEiJ.mpuCycleCount += 18;
 10589:       int y = XEiJ.busRbz (--XEiJ.regRn[ea]);  //このr[ea]はアドレスレジスタ
 10590:       int a = --XEiJ.regRn[(XEiJ.regOC >> 9) - (64 - 8)];
 10591:       XEiJ.busWb (a, irpSbcd (XEiJ.busRbz (a), y));
 10592:     }
 10593:   }  //irpOrToMemByte
 10594: 
 10595:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10596:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 10597:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 10598:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10599:   //OR.W Dq,<ea>                                    |-|012346|-|-UUUU|-**00|  M+-WXZ  |1000_qqq_101_mmm_rrr
 10600:   public static void irpOrToMemWord () throws M68kException {
 10601:     XEiJ.mpuCycleCount += 8;
 10602:     int ea = XEiJ.regOC & 63;
 10603:     int a = efaMltWord (ea);
 10604:     int z = XEiJ.regRn[XEiJ.regOC >> 9 & 7] | XEiJ.busRws (a);
 10605:     XEiJ.busWw (a, z);
 10606:     XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (char) z - 1 >> 31 & XEiJ.REG_CCR_Z | ((short) z < 0 ? XEiJ.REG_CCR_N : 0);  //ccr_tst_word
 10607:   }  //irpOrToMemWord
 10608: 
 10609:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10610:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 10611:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 10612:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10613:   //OR.L Dq,<ea>                                    |-|012346|-|-UUUU|-**00|  M+-WXZ  |1000_qqq_110_mmm_rrr
 10614:   public static void irpOrToMemLong () throws M68kException {
 10615:     XEiJ.mpuCycleCount += 12;
 10616:     int ea = XEiJ.regOC & 63;
 10617:     int a = efaMltLong (ea);
 10618:     int z;
 10619:     XEiJ.busWl (a, z = XEiJ.regRn[XEiJ.regOC >> 9 & 7] | XEiJ.busRls (a));
 10620:     XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X);  //ccr_tst
 10621:   }  //irpOrToMemLong
 10622: 
 10623:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10624:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 10625:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 10626:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10627:   //DIVS.W <ea>,Dq                                  |-|012346|-|-UUUU|-***0|D M+-WXZPI|1000_qqq_111_mmm_rrr
 10628:   //
 10629:   //DIVS.W <ea>,Dq
 10630:   //  DIVSの余りの符号は被除数と一致
 10631:   //  M68000PRMでDIVS.Wのアドレッシングモードがデータ可変と書かれているのはデータの間違い
 10632:   public static void irpDivsWord () throws M68kException {
 10633:     //  X  変化しない
 10634:     //  N  ゼロ除算またはオーバーフローのとき不定。商が負のときセット。それ以外はクリア
 10635:     //  Z  ゼロ除算またはオーバーフローのとき不定。商が0のときセット。それ以外はクリア
 10636:     //  V  ゼロ除算のとき不定。オーバーフローのときセット。それ以外はクリア
 10637:     //  C  常にクリア
 10638:     //divsの余りの符号は被除数と一致
 10639:     //Javaの除算演算子の挙動
 10640:     //   10 /  3 ==  3   10 %  3 ==  1   10 =  3 *  3 +  1
 10641:     //   10 / -3 == -3   10 % -3 ==  1   10 = -3 * -3 +  1
 10642:     //  -10 /  3 == -3  -10 %  3 == -1  -10 =  3 * -3 + -1
 10643:     //  -10 / -3 ==  3  -10 % -3 == -1  -10 = -3 *  3 + -1
 10644:     int ea = XEiJ.regOC & 63;
 10645:     int qqq = XEiJ.regOC >> 9 & 7;
 10646:     int y = ea < XEiJ.EA_AR ? (short) XEiJ.regRn[ea] : XEiJ.busRws (efaAnyWord (ea));  //除数
 10647:     int x = XEiJ.regRn[qqq];  //被除数
 10648:     XEiJ.mpuCycleCount += irpDivsCycles (x, y);
 10649:     if (y == 0) {  //ゼロ除算
 10650:       //Dqは変化しない
 10651:       //!!! MC68030はゼロ除算のときオペランド以外の要因でZとVが変化する。その要因がわからないとZとVを正確に再現することができない
 10652:       XEiJ.regCCR = (XEiJ.regCCR & XEiJ.REG_CCR_X |  //Xは変化しない
 10653:                      //Nは常にクリア
 10654:                      XEiJ.REG_CCR_Z |  //Zは常にセット
 10655:                      (x == 0x00008000 ? ~XEiJ.regCCR & XEiJ.REG_CCR_V : (0 <= x && x != 0x7fffffff) || x == 0x80000000 ? XEiJ.REG_CCR_V : XEiJ.regCCR & XEiJ.REG_CCR_V)  //Vは被除数が$00008000のとき反転、被除数が$7fffffffを除く正または$80000000のときセット、さもなくば変化しない
 10656:                      );  //Cは常にクリア
 10657:       M68kException.m6eNumber = M68kException.M6E_DIVIDE_BY_ZERO;
 10658:       throw M68kException.m6eSignal;
 10659:     }
 10660:     int z = x / y;  //商
 10661:     if ((short) z != z) {  //オーバーフローあり
 10662:       //Dqは変化しない
 10663:       XEiJ.regCCR = (XEiJ.regCCR & XEiJ.REG_CCR_X |  //Xは変化しない
 10664:                      (x == 0x80000000 || (z & 0xffff0080) == 0x00000080 || (z & 0xffff0080) == 0xffff0080 ? XEiJ.REG_CCR_N : 0) |  //Nは被除数が$80000000または商が$0000xxyyまたは$ffffxxyyでyyが負のときセット、さもなくばクリア
 10665:                      (z == 0x00008000 || (((z & 0xffff00ff) == 0x00000000 || (z & 0xffff00ff) == 0xffff0000) && (z & 0x0000ff00) != 0) ? XEiJ.REG_CCR_Z : 0) |  //Zは商が$00008000または商が$0000xxyyまたは$ffffxxyyでxxが0でなくてyyが0のときセット、さもなくばクリア
 10666:                      XEiJ.REG_CCR_V  //Vは常にセット
 10667:                      );  //Cは常にクリア
 10668:     } else {  //オーバーフローなし
 10669:       XEiJ.regRn[qqq] = x - y * z << 16 | (char) z;  //Dqは余り<<16|商&$ffff
 10670:       XEiJ.regCCR = (XEiJ.regCCR & XEiJ.REG_CCR_X |  //Xは変化しない
 10671:                      (z < 0 ? XEiJ.REG_CCR_N : 0) |  //Nは商が負のときセット、さもなくばクリア
 10672:                      (z == 0 ? XEiJ.REG_CCR_Z : 0)  //Zは商が0のときセット、さもなくばクリア
 10673:                      //Vは常にクリア
 10674:                      );  //Cは常にクリア
 10675:     }  //if オーバーフローあり/オーバーフローなし
 10676:   }  //irpDivsWord
 10677: 
 10678:   //DIVSの実行時間
 10679:   //  以下に実効アドレスの時間を加える
 10680:   //    ゼロ除算のとき38
 10681:   //    符号なしオーバーフローのとき
 10682:   //      被除数が正のとき16
 10683:   //      被除数が負のとき18
 10684:   //    正常終了または符号ありオーバーフローのとき
 10685:   //      被除数が正で除数が正のとき120+
 10686:   //      被除数が正で除数が負のとき122+
 10687:   //      被除数が負で除数が正のとき126+
 10688:   //      被除数が負で除数が負のとき124+
 10689:   //        符号なし商のビット15~1について
 10690:   //          符号なし商が1のとき0
 10691:   //          符号なし商が0のとき2
 10692:   //  補足
 10693:   //    符号なし商のビット0を計算に含めると最大158になりマニュアルと一致する
 10694:   //  参考
 10695:   //    https://www.atari-forum.com/viewtopic.php?t=6484
 10696:   public static int irpDivsCycles (int x, int y) {
 10697:     y = (short) y;  //符号拡張
 10698:     if (y == 0) {  //ゼロ除算
 10699:       return 38;
 10700:     }
 10701:     //符号あり除算だと0x80000000/0xffffffffが0x00000000になる環境があるので
 10702:     //符号なし除算を用いる。JavaはInteger.divideUnsigned
 10703:     //符号なし商に0x80000000が含まれることに注意
 10704:     int q = Integer.divideUnsigned ((x < 0 ? -x : x), (y < 0 ? -y : y));
 10705:     if ((q & 0xffff0000) != 0) {  //符号なしオーバーフロー。0xffff<qは不可
 10706:       return x < 0 ? 18 : 16;
 10707:     }
 10708:     int t = ~q;
 10709:     t = (t & 0x5554) + ((t >> 1) & 0x5555);  //0x5554に注意。ビット0を含まない
 10710:     t = (t & 0x3333) + ((t >> 2) & 0x3333);
 10711:     t = (t & 0x0F0F) + ((t >> 4) & 0x0F0F);
 10712:     t = (t & 0x00FF) + ((t >> 8) & 0x00FF);
 10713:     return (x < 0 ? y < 0 ? 124 : 126 : y < 0 ? 122 : 120) + (t << 1);
 10714:   }
 10715: 
 10716:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10717:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 10718:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 10719:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10720:   //SUB.B <ea>,Dq                                   |-|012346|-|UUUUU|*****|D M+-WXZPI|1001_qqq_000_mmm_rrr
 10721:   public static void irpSubToRegByte () throws M68kException {
 10722:     XEiJ.mpuCycleCount += 4;
 10723:     int ea = XEiJ.regOC & 63;
 10724:     int qqq = XEiJ.regOC >> 9 & 7;
 10725:     int x, y, z;
 10726:     y = ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : XEiJ.busRbs (efaAnyByte (ea));
 10727:     x = XEiJ.regRn[qqq];
 10728:     z = x - y;
 10729:     XEiJ.regRn[qqq] = ~255 & x | 255 & z;
 10730:     XEiJ.regCCR = (XEiJ.MPU_TSTB_TABLE[255 & z] |
 10731:            ((x ^ y) & (x ^ z)) >> 6 & XEiJ.REG_CCR_V |
 10732:            (byte) (x & (y ^ z) ^ (y | z)) >> 7 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C));  //ccr_sub_byte
 10733:   }  //irpSubToRegByte
 10734: 
 10735:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10736:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 10737:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 10738:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10739:   //SUB.W <ea>,Dq                                   |-|012346|-|UUUUU|*****|DAM+-WXZPI|1001_qqq_001_mmm_rrr
 10740:   public static void irpSubToRegWord () throws M68kException {
 10741:     XEiJ.mpuCycleCount += 4;
 10742:     int ea = XEiJ.regOC & 63;
 10743:     int qqq = XEiJ.regOC >> 9 & 7;
 10744:     int x, y, z;
 10745:     y = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : XEiJ.busRws (efaAnyWord (ea));  //このr[ea]はデータレジスタまたはアドレスレジスタ
 10746:     x = XEiJ.regRn[qqq];
 10747:     z = x - y;
 10748:     XEiJ.regRn[qqq] = ~65535 & x | (char) z;
 10749:     XEiJ.regCCR = (z >> 12 & XEiJ.REG_CCR_N | (char) z - 1 >> 14 & XEiJ.REG_CCR_Z |
 10750:            ((x ^ y) & (x ^ z)) >> 14 & XEiJ.REG_CCR_V |
 10751:            (short) (x & (y ^ z) ^ (y | z)) >> 15 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C));  //ccr_sub_word
 10752:   }  //irpSubToRegWord
 10753: 
 10754:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10755:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 10756:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 10757:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10758:   //SUB.L <ea>,Dq                                   |-|012346|-|UUUUU|*****|DAM+-WXZPI|1001_qqq_010_mmm_rrr
 10759:   public static void irpSubToRegLong () throws M68kException {
 10760:     int ea = XEiJ.regOC & 63;
 10761:     int qqq = XEiJ.regOC >> 9 & 7;
 10762:     XEiJ.mpuCycleCount += ea < XEiJ.EA_MM || ea == XEiJ.EA_IM ? 8 : 6;  //ソースが#<data>のとき2増やす
 10763:     int x, y, z;
 10764:     y = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : XEiJ.busRls (efaAnyLong (ea));  //このr[ea]はデータレジスタまたはアドレスレジスタ
 10765:     x = XEiJ.regRn[qqq];
 10766:     z = x - y;
 10767:     XEiJ.regRn[qqq] = z;
 10768:     XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) |
 10769:            ((x ^ y) & (x ^ z)) >> 30 & XEiJ.REG_CCR_V |
 10770:            (x & (y ^ z) ^ (y | z)) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C));  //ccr_sub
 10771:   }  //irpSubToRegLong
 10772: 
 10773:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10774:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 10775:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 10776:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10777:   //SUBA.W <ea>,Aq                                  |-|012346|-|-----|-----|DAM+-WXZPI|1001_qqq_011_mmm_rrr
 10778:   //SUB.W <ea>,Aq                                   |A|012346|-|-----|-----|DAM+-WXZPI|1001_qqq_011_mmm_rrr [SUBA.W <ea>,Aq]
 10779:   //CLR.W Ar                                        |A|012346|-|-----|-----| A        |1001_rrr_011_001_rrr [SUBA.W Ar,Ar]
 10780:   //
 10781:   //SUBA.W <ea>,Aq
 10782:   //  ソースを符号拡張してロングで減算する
 10783:   public static void irpSubaWord () throws M68kException {
 10784:     XEiJ.mpuCycleCount += 8;
 10785:     int ea = XEiJ.regOC & 63;
 10786:     int z = ea < XEiJ.EA_MM ? (short) XEiJ.regRn[ea] : XEiJ.busRws (efaAnyWord (ea));  //このr[ea]はデータレジスタまたはアドレスレジスタ。ここでAqが変化する可能性があることに注意
 10787:     XEiJ.regRn[XEiJ.regOC >> 9 & 15] -= z;  //r[op >> 9 & 15] -= ea < XEiJ.EA_MM ? (short) r[ea] : rws (efaAnyWord (ea));は不可
 10788:     //ccrは変化しない
 10789:   }  //irpSubaWord
 10790: 
 10791:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10792:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 10793:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 10794:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10795:   //SUBX.B Dr,Dq                                    |-|012346|-|*UUUU|*****|          |1001_qqq_100_000_rrr
 10796:   //SUBX.B -(Ar),-(Aq)                              |-|012346|-|*UUUU|*****|          |1001_qqq_100_001_rrr
 10797:   //SUB.B Dq,<ea>                                   |-|012346|-|UUUUU|*****|  M+-WXZ  |1001_qqq_100_mmm_rrr
 10798:   public static void irpSubToMemByte () throws M68kException {
 10799:     int ea = XEiJ.regOC & 63;
 10800:     int a, x, y, z;
 10801:     if (ea < XEiJ.EA_MM) {
 10802:       if (ea < XEiJ.EA_AR) {  //SUBX.B Dr,Dq
 10803:         int qqq = XEiJ.regOC >> 9 & 7;
 10804:         XEiJ.mpuCycleCount += 4;
 10805:         y = XEiJ.regRn[ea];
 10806:         x = XEiJ.regRn[qqq];
 10807:         z = x - y - (XEiJ.regCCR >> 4);  //Xの左側はすべて0なのでCCR_X&を省略
 10808:         XEiJ.regRn[qqq] = ~255 & x | 255 & z;
 10809:       } else {  //SUBX.B -(Ar),-(Aq)
 10810:         XEiJ.mpuCycleCount += 18;
 10811:         y = XEiJ.busRbs (--XEiJ.regRn[ea]);  //このr[ea]はアドレスレジスタ
 10812:         a = --XEiJ.regRn[XEiJ.regOC >> 9 & 15];  //1qqq=aqq
 10813:         x = XEiJ.busRbs (a);
 10814:         z = x - y - (XEiJ.regCCR >> 4);  //Xの左側はすべて0なのでCCR_X&を省略
 10815:         XEiJ.busWb (a, z);
 10816:       }
 10817:       XEiJ.regCCR = (z >> 4 & XEiJ.REG_CCR_N | (255 & z) - 1 >> 6 & XEiJ.regCCR & XEiJ.REG_CCR_Z |  //SUBXはZをクリアすることはあるがセットすることはない
 10818:              ((x ^ y) & (x ^ z)) >> 6 & XEiJ.REG_CCR_V |
 10819:              (byte) (x & (y ^ z) ^ (y | z)) >> 7 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C));  //ccr_subx_byte
 10820:     } else {  //SUB.B Dq,<ea>
 10821:       XEiJ.mpuCycleCount += 8;
 10822:       y = XEiJ.regRn[XEiJ.regOC >> 9 & 7];
 10823:       a = efaMltByte (ea);
 10824:       x = XEiJ.busRbs (a);
 10825:       z = x - y;
 10826:       XEiJ.busWb (a, z);
 10827:       XEiJ.regCCR = (XEiJ.MPU_TSTB_TABLE[255 & z] |
 10828:              ((x ^ y) & (x ^ z)) >> 6 & XEiJ.REG_CCR_V |
 10829:              (byte) (x & (y ^ z) ^ (y | z)) >> 7 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C));  //ccr_sub_byte
 10830:     }
 10831:   }  //irpSubToMemByte
 10832: 
 10833:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10834:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 10835:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 10836:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10837:   //SUBX.W Dr,Dq                                    |-|012346|-|*UUUU|*****|          |1001_qqq_101_000_rrr
 10838:   //SUBX.W -(Ar),-(Aq)                              |-|012346|-|*UUUU|*****|          |1001_qqq_101_001_rrr
 10839:   //SUB.W Dq,<ea>                                   |-|012346|-|UUUUU|*****|  M+-WXZ  |1001_qqq_101_mmm_rrr
 10840:   public static void irpSubToMemWord () throws M68kException {
 10841:     int ea = XEiJ.regOC & 63;
 10842:     int a, x, y, z;
 10843:     if (ea < XEiJ.EA_MM) {
 10844:       if (ea < XEiJ.EA_AR) {  //SUBX.W Dr,Dq
 10845:         int qqq = XEiJ.regOC >> 9 & 7;
 10846:         XEiJ.mpuCycleCount += 4;
 10847:         y = XEiJ.regRn[ea];
 10848:         x = XEiJ.regRn[qqq];
 10849:         z = x - y - (XEiJ.regCCR >> 4);  //Xの左側はすべて0なのでCCR_X&を省略
 10850:         XEiJ.regRn[qqq] = ~65535 & x | (char) z;
 10851:       } else {  //SUBX.W -(Ar),-(Aq)
 10852:         XEiJ.mpuCycleCount += 18;
 10853:         y = XEiJ.busRws (XEiJ.regRn[ea] -= 2);  //このr[ea]はアドレスレジスタ
 10854:         a = XEiJ.regRn[XEiJ.regOC >> 9 & 15] -= 2;
 10855:         x = XEiJ.busRws (a);
 10856:         z = x - y - (XEiJ.regCCR >> 4);  //Xの左側はすべて0なのでCCR_X&を省略
 10857:         XEiJ.busWw (a, z);
 10858:       }
 10859:       XEiJ.regCCR = (z >> 12 & XEiJ.REG_CCR_N | (char) z - 1 >> 14 & XEiJ.regCCR & XEiJ.REG_CCR_Z |  //ADDXはZをクリアすることはあるがセットすることはない
 10860:              ((x ^ y) & (x ^ z)) >> 14 & XEiJ.REG_CCR_V |
 10861:              (short) (x & (y ^ z) ^ (y | z)) >> 15 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C));  //ccr_subx_word
 10862:     } else {  //SUB.W Dq,<ea>
 10863:       XEiJ.mpuCycleCount += 8;
 10864:       y = (short) XEiJ.regRn[XEiJ.regOC >> 9 & 7];
 10865:       a = efaMltWord (ea);
 10866:       x = XEiJ.busRws (a);
 10867:       z = x - y;
 10868:       XEiJ.busWw (a, z);
 10869:       XEiJ.regCCR = (z >> 12 & XEiJ.REG_CCR_N | (char) z - 1 >> 14 & XEiJ.REG_CCR_Z |
 10870:              ((x ^ y) & (x ^ z)) >> 14 & XEiJ.REG_CCR_V |
 10871:              (short) (x & (y ^ z) ^ (y | z)) >> 15 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C));  //ccr_sub_word
 10872:     }
 10873:   }  //irpSubToMemWord
 10874: 
 10875:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10876:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 10877:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 10878:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10879:   //SUBX.L Dr,Dq                                    |-|012346|-|*UUUU|*****|          |1001_qqq_110_000_rrr
 10880:   //SUBX.L -(Ar),-(Aq)                              |-|012346|-|*UUUU|*****|          |1001_qqq_110_001_rrr
 10881:   //SUB.L Dq,<ea>                                   |-|012346|-|UUUUU|*****|  M+-WXZ  |1001_qqq_110_mmm_rrr
 10882:   public static void irpSubToMemLong () throws M68kException {
 10883:     int ea = XEiJ.regOC & 63;
 10884:     if (ea < XEiJ.EA_MM) {
 10885:       int x;
 10886:       int y;
 10887:       int z;
 10888:       if (ea < XEiJ.EA_AR) {  //SUBX.L Dr,Dq
 10889:         int qqq = XEiJ.regOC >> 9 & 7;
 10890:         XEiJ.mpuCycleCount += 8;
 10891:         XEiJ.regRn[qqq] = z = (x = XEiJ.regRn[qqq]) - (y = XEiJ.regRn[ea]) - (XEiJ.regCCR >> 4);  //Xの左側はすべて0なのでCCR_X&を省略
 10892:       } else {  //SUBX.L -(Ar),-(Aq)
 10893:         XEiJ.mpuCycleCount += 30;
 10894:         y = XEiJ.busRls (XEiJ.regRn[ea] -= 4);  //このr[ea]はアドレスレジスタ
 10895:         int a = XEiJ.regRn[XEiJ.regOC >> 9 & 15] -= 4;
 10896:         XEiJ.busWl (a, z = (x = XEiJ.busRls (a)) - y - (XEiJ.regCCR >> 4));  //Xの左側はすべて0なのでCCR_X&を省略
 10897:       }
 10898:       XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_Z : 0) |
 10899:              ((x ^ y) & (x ^ z)) >>> 31 << 1 |
 10900:              (x & (y ^ z) ^ (y | z)) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C));  //ccr_subx
 10901:     } else {  //SUB.L Dq,<ea>
 10902:       XEiJ.mpuCycleCount += 12;
 10903:       int a = efaMltLong (ea);
 10904:       int x;
 10905:       int y;
 10906:       int z;
 10907:       XEiJ.busWl (a, z = (x = XEiJ.busRls (a)) - (y = XEiJ.regRn[XEiJ.regOC >> 9 & 7]));
 10908:       XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) |
 10909:              ((x ^ y) & (x ^ z)) >>> 31 << 1 |
 10910:              (x & (y ^ z) ^ (y | z)) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C));  //ccr_sub
 10911:     }
 10912:   }  //irpSubToMemLong
 10913: 
 10914:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10915:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 10916:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 10917:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10918:   //SUBA.L <ea>,Aq                                  |-|012346|-|-----|-----|DAM+-WXZPI|1001_qqq_111_mmm_rrr
 10919:   //SUB.L <ea>,Aq                                   |A|012346|-|-----|-----|DAM+-WXZPI|1001_qqq_111_mmm_rrr [SUBA.L <ea>,Aq]
 10920:   //CLR.L Ar                                        |A|012346|-|-----|-----| A        |1001_rrr_111_001_rrr [SUBA.L Ar,Ar]
 10921:   public static void irpSubaLong () throws M68kException {
 10922:     int ea = XEiJ.regOC & 63;
 10923:     XEiJ.mpuCycleCount += ea < XEiJ.EA_MM || ea == XEiJ.EA_IM ? 8 : 6;  //Dr/Ar/#<data>のとき8+、それ以外は6+
 10924:     int z = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : XEiJ.busRls (efaAnyLong (ea));  //このr[ea]はデータレジスタまたはアドレスレジスタ。ここでAqが変化する可能性があることに注意
 10925:     XEiJ.regRn[XEiJ.regOC >> 9 & 15] -= z;  //r[op >> 9 & 15] -= ea < XEiJ.EA_MM ? r[ea] : rls (efaAnyLong (ea));は不可
 10926:     //ccrは変化しない
 10927:   }  //irpSubaLong
 10928: 
 10929:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10930:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 10931:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 10932:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10933:   //SXCALL <name>                                   |A|012346|-|UUUUU|*****|          |1010_0dd_ddd_ddd_ddd [ALINE #<data>]
 10934:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10935:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 10936:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 10937:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10938:   //ALINE #<data>                                   |-|012346|-|UUUUU|*****|          |1010_ddd_ddd_ddd_ddd (line 1010 emulator)
 10939:   public static void irpAline () throws M68kException {
 10940:     XEiJ.mpuCycleCount += 34;
 10941:     if (XEiJ.MPU_INLINE_EXCEPTION) {
 10942:       int save_sr = XEiJ.regSRT1 | XEiJ.regSRS | XEiJ.regSRI | XEiJ.regCCR;
 10943:       int sp = XEiJ.regRn[15];
 10944:       XEiJ.regSRT1 = XEiJ.mpuTraceFlag = 0;  //srのTビットを消す
 10945:       if (XEiJ.regSRS == 0) {  //ユーザモードのとき
 10946:         XEiJ.regSRS = XEiJ.REG_SR_S;  //スーパーバイザモードへ移行する
 10947:         XEiJ.mpuUSP = sp;  //USPを保存
 10948:         sp = XEiJ.mpuISP;  //SSPを復元
 10949:         if (DataBreakPoint.DBP_ON) {
 10950:           DataBreakPoint.dbpMemoryMap = DataBreakPoint.dbpSuperMap;  //スーパーバイザメモリマップに切り替える
 10951:         } else {
 10952:           XEiJ.busMemoryMap = XEiJ.busSuperMap;  //スーパーバイザメモリマップに切り替える
 10953:         }
 10954:         if (InstructionBreakPoint.IBP_ON) {
 10955:           InstructionBreakPoint.ibpOp1MemoryMap = InstructionBreakPoint.ibpOp1SuperMap;
 10956:         }
 10957:       }
 10958:       XEiJ.regRn[15] = sp -= 6;
 10959:       XEiJ.busWl (sp + 2, XEiJ.regPC0);  //pushl。pcをプッシュする
 10960:       XEiJ.busWw (sp, save_sr);  //pushw。srをプッシュする
 10961:       irpSetPC (XEiJ.busRlsf (M68kException.M6E_LINE_1010_EMULATOR << 2));  //例外ベクタを取り出してジャンプする
 10962:     } else {
 10963:       irpException (M68kException.M6E_LINE_1010_EMULATOR, XEiJ.regPC0, XEiJ.regSRT1 | XEiJ.regSRS | XEiJ.regSRI | XEiJ.regCCR);  //pcは命令の先頭
 10964:     }
 10965:   }  //irpAline
 10966: 
 10967:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10968:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 10969:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 10970:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10971:   //CMP.B <ea>,Dq                                   |-|012346|-|-UUUU|-****|D M+-WXZPI|1011_qqq_000_mmm_rrr
 10972:   public static void irpCmpByte () throws M68kException {
 10973:     XEiJ.mpuCycleCount += 4;
 10974:     int ea = XEiJ.regOC & 63;
 10975:     int x;
 10976:     int y;
 10977:     int z = (byte) ((x = (byte) XEiJ.regRn[XEiJ.regOC >> 9 & 7]) - (y = ea < XEiJ.EA_AR ? (byte) XEiJ.regRn[ea] : XEiJ.busRbs (efaAnyByte (ea))));
 10978:     XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) |
 10979:            ((x ^ y) & (x ^ z)) >>> 31 << 1 |
 10980:            (x & (y ^ z) ^ (y | z)) >>> 31);  //ccr_cmp
 10981:   }  //irpCmpByte
 10982: 
 10983:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10984:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 10985:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 10986:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 10987:   //CMP.W <ea>,Dq                                   |-|012346|-|-UUUU|-****|DAM+-WXZPI|1011_qqq_001_mmm_rrr
 10988:   public static void irpCmpWord () throws M68kException {
 10989:     XEiJ.mpuCycleCount += 4;
 10990:     int ea = XEiJ.regOC & 63;
 10991:     int x;
 10992:     int y;
 10993:     int z = (short) ((x = (short) XEiJ.regRn[XEiJ.regOC >> 9 & 7]) - (y = ea < XEiJ.EA_MM ? (short) XEiJ.regRn[ea] : XEiJ.busRws (efaAnyWord (ea))));  //このr[ea]はデータレジスタまたはアドレスレジスタ
 10994:     XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) |
 10995:            ((x ^ y) & (x ^ z)) >>> 31 << 1 |
 10996:            (x & (y ^ z) ^ (y | z)) >>> 31);  //ccr_cmp
 10997:   }  //irpCmpWord
 10998: 
 10999:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11000:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 11001:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 11002:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11003:   //CMP.L <ea>,Dq                                   |-|012346|-|-UUUU|-****|DAM+-WXZPI|1011_qqq_010_mmm_rrr
 11004:   public static void irpCmpLong () throws M68kException {
 11005:     XEiJ.mpuCycleCount += 6;
 11006:     int ea = XEiJ.regOC & 63;
 11007:     int x;
 11008:     int y;
 11009:     int z = (x = XEiJ.regRn[XEiJ.regOC >> 9 & 7]) - (y = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : XEiJ.busRls (efaAnyLong (ea)));  //このr[ea]はデータレジスタまたはアドレスレジスタ
 11010:     XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) |
 11011:            ((x ^ y) & (x ^ z)) >>> 31 << 1 |
 11012:            (x & (y ^ z) ^ (y | z)) >>> 31);  //ccr_cmp
 11013:   }  //irpCmpLong
 11014: 
 11015:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11016:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 11017:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 11018:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11019:   //CMPA.W <ea>,Aq                                  |-|012346|-|-UUUU|-****|DAM+-WXZPI|1011_qqq_011_mmm_rrr
 11020:   //CMP.W <ea>,Aq                                   |A|012346|-|-UUUU|-****|DAM+-WXZPI|1011_qqq_011_mmm_rrr [CMPA.W <ea>,Aq]
 11021:   //
 11022:   //CMPA.W <ea>,Aq
 11023:   //  ソースを符号拡張してロングで比較する
 11024:   public static void irpCmpaWord () throws M68kException {
 11025:     XEiJ.mpuCycleCount += 6;
 11026:     int ea = XEiJ.regOC & 63;
 11027:     //ソースを符号拡張してからロングで比較する
 11028:     int y = ea < XEiJ.EA_MM ? (short) XEiJ.regRn[ea] : XEiJ.busRws (efaAnyWord (ea));  //このr[ea]はデータレジスタまたはアドレスレジスタ。ここでAqが変化する可能性があることに注意
 11029:     int x;
 11030:     int z = (x = XEiJ.regRn[XEiJ.regOC >> 9 & 15]) - y;
 11031:     XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) |
 11032:            ((x ^ y) & (x ^ z)) >>> 31 << 1 |
 11033:            (x & (y ^ z) ^ (y | z)) >>> 31);  //ccr_cmp
 11034:   }  //irpCmpaWord
 11035: 
 11036:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11037:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 11038:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 11039:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11040:   //EOR.B Dq,<ea>                                   |-|012346|-|-UUUU|-**00|D M+-WXZ  |1011_qqq_100_mmm_rrr
 11041:   //CMPM.B (Ar)+,(Aq)+                              |-|012346|-|-UUUU|-****|          |1011_qqq_100_001_rrr
 11042:   public static void irpEorByte () throws M68kException {
 11043:     int ea = XEiJ.regOC & 63;
 11044:     if (ea >> 3 == XEiJ.MMM_AR) {  //CMPM.B (Ar)+,(Aq)+
 11045:       XEiJ.mpuCycleCount += 12;
 11046:       int y = XEiJ.busRbs (XEiJ.regRn[ea]++);  //このr[ea]はアドレスレジスタ
 11047:       int x;
 11048:       int z = (byte) ((x = XEiJ.busRbs (XEiJ.regRn[XEiJ.regOC >> 9 & 15]++)) - y);
 11049:       XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) |
 11050:              ((x ^ y) & (x ^ z)) >>> 31 << 1 |
 11051:              (x & (y ^ z) ^ (y | z)) >>> 31);  //ccr_cmp
 11052:     } else {
 11053:       int qqq = XEiJ.regOC >> 9 & 7;
 11054:       int z;
 11055:       if (ea < XEiJ.EA_AR) {  //EOR.B Dq,Dr
 11056:         XEiJ.mpuCycleCount += 4;
 11057:         z = XEiJ.regRn[ea] ^= 255 & XEiJ.regRn[qqq];  //0拡張してからEOR
 11058:       } else {  //EOR.B Dq,<mem>
 11059:         XEiJ.mpuCycleCount += 8;
 11060:         int a = efaMltByte (ea);
 11061:         XEiJ.busWb (a, z = XEiJ.regRn[qqq] ^ XEiJ.busRbs (a));
 11062:       }
 11063:       XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & z];  //ccr_tst_byte
 11064:     }
 11065:   }  //irpEorByte
 11066: 
 11067:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11068:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 11069:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 11070:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11071:   //EOR.W Dq,<ea>                                   |-|012346|-|-UUUU|-**00|D M+-WXZ  |1011_qqq_101_mmm_rrr
 11072:   //CMPM.W (Ar)+,(Aq)+                              |-|012346|-|-UUUU|-****|          |1011_qqq_101_001_rrr
 11073:   public static void irpEorWord () throws M68kException {
 11074:     int ea = XEiJ.regOC & 63;
 11075:     int rrr = XEiJ.regOC & 7;
 11076:     int mmm = ea >> 3;
 11077:     if (mmm == XEiJ.MMM_AR) {  //CMPM.W (Ar)+,(Aq)+
 11078:       XEiJ.mpuCycleCount += 12;
 11079:       int y = XEiJ.busRws ((XEiJ.regRn[ea] += 2) - 2);  //このr[ea]はアドレスレジスタ
 11080:       int x;
 11081:       int z = (short) ((x = XEiJ.busRws ((XEiJ.regRn[XEiJ.regOC >> 9 & 15] += 2) - 2)) - y);
 11082:       XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) |
 11083:              ((x ^ y) & (x ^ z)) >>> 31 << 1 |
 11084:              (x & (y ^ z) ^ (y | z)) >>> 31);  //ccr_cmp
 11085:     } else {
 11086:       int qqq = XEiJ.regOC >> 9 & 7;
 11087:       int z;
 11088:       if (ea < XEiJ.EA_AR) {  //EOR.W Dq,Dr
 11089:         XEiJ.mpuCycleCount += 4;
 11090:         z = XEiJ.regRn[rrr] ^= (char) XEiJ.regRn[qqq];  //0拡張してからEOR
 11091:       } else {  //EOR.W Dq,<mem>
 11092:         XEiJ.mpuCycleCount += 8;
 11093:         int a = efaMltWord (ea);
 11094:         XEiJ.busWw (a, z = XEiJ.regRn[qqq] ^ XEiJ.busRws (a));
 11095:       }
 11096:       XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (char) z - 1 >> 31 & XEiJ.REG_CCR_Z | ((short) z < 0 ? XEiJ.REG_CCR_N : 0);  //ccr_tst_word
 11097:     }
 11098:   }  //irpEorWord
 11099: 
 11100:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11101:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 11102:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 11103:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11104:   //EOR.L Dq,<ea>                                   |-|012346|-|-UUUU|-**00|D M+-WXZ  |1011_qqq_110_mmm_rrr
 11105:   //CMPM.L (Ar)+,(Aq)+                              |-|012346|-|-UUUU|-****|          |1011_qqq_110_001_rrr
 11106:   public static void irpEorLong () throws M68kException {
 11107:     int ea = XEiJ.regOC & 63;
 11108:     if (ea >> 3 == XEiJ.MMM_AR) {  //CMPM.L (Ar)+,(Aq)+
 11109:       XEiJ.mpuCycleCount += 20;
 11110:       int y = XEiJ.busRls ((XEiJ.regRn[ea] += 4) - 4);  //このr[ea]はアドレスレジスタ
 11111:       int x;
 11112:       int z = (x = XEiJ.busRls ((XEiJ.regRn[XEiJ.regOC >> 9 & 15] += 4) - 4)) - y;
 11113:       XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) |
 11114:              ((x ^ y) & (x ^ z)) >>> 31 << 1 |
 11115:              (x & (y ^ z) ^ (y | z)) >>> 31);  //ccr_cmp
 11116:     } else {
 11117:       int qqq = XEiJ.regOC >> 9 & 7;
 11118:       int z;
 11119:       if (ea < XEiJ.EA_AR) {  //EOR.L Dq,Dr
 11120:         XEiJ.mpuCycleCount += 8;
 11121:         XEiJ.regRn[ea] = z = XEiJ.regRn[ea] ^ XEiJ.regRn[qqq];
 11122:       } else {  //EOR.L Dq,<mem>
 11123:         XEiJ.mpuCycleCount += 12;
 11124:         int a = efaMltLong (ea);
 11125:         XEiJ.busWl (a, z = XEiJ.busRls (a) ^ XEiJ.regRn[qqq]);
 11126:       }
 11127:       XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X);  //ccr_tst
 11128:     }
 11129:   }  //irpEorLong
 11130: 
 11131:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11132:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 11133:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 11134:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11135:   //CMPA.L <ea>,Aq                                  |-|012346|-|-UUUU|-****|DAM+-WXZPI|1011_qqq_111_mmm_rrr
 11136:   //CMP.L <ea>,Aq                                   |A|012346|-|-UUUU|-****|DAM+-WXZPI|1011_qqq_111_mmm_rrr [CMPA.L <ea>,Aq]
 11137:   public static void irpCmpaLong () throws M68kException {
 11138:     XEiJ.mpuCycleCount += 6;
 11139:     int ea = XEiJ.regOC & 63;
 11140:     int y = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : XEiJ.busRls (efaAnyLong (ea));  //このr[ea]はデータレジスタまたはアドレスレジスタ。ここでAqが変化する可能性があることに注意
 11141:     int x;
 11142:     int z = (x = XEiJ.regRn[XEiJ.regOC >> 9 & 15]) - y;
 11143:     XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) |
 11144:            ((x ^ y) & (x ^ z)) >>> 31 << 1 |
 11145:            (x & (y ^ z) ^ (y | z)) >>> 31);  //ccr_cmp
 11146:   }  //irpCmpaLong
 11147: 
 11148:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11149:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 11150:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 11151:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11152:   //AND.B <ea>,Dq                                   |-|012346|-|-UUUU|-**00|D M+-WXZPI|1100_qqq_000_mmm_rrr
 11153:   public static void irpAndToRegByte () throws M68kException {
 11154:     XEiJ.mpuCycleCount += 4;
 11155:     int ea = XEiJ.regOC & 63;
 11156:     XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & (XEiJ.regRn[XEiJ.regOC >> 9 & 7] &= ~255 | (ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : XEiJ.busRbs (efaAnyByte (ea))))];  //ccr_tst_byte。1拡張してからAND
 11157:   }  //irpAndToRegByte
 11158: 
 11159:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11160:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 11161:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 11162:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11163:   //AND.W <ea>,Dq                                   |-|012346|-|-UUUU|-**00|D M+-WXZPI|1100_qqq_001_mmm_rrr
 11164:   public static void irpAndToRegWord () throws M68kException {
 11165:     XEiJ.mpuCycleCount += 4;
 11166:     int ea = XEiJ.regOC & 63;
 11167:     int z = XEiJ.regRn[XEiJ.regOC >> 9 & 7] &= ~65535 | (ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : XEiJ.busRws (efaAnyWord (ea)));  //1拡張してからAND
 11168:     XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (char) z - 1 >> 31 & XEiJ.REG_CCR_Z | ((short) z < 0 ? XEiJ.REG_CCR_N : 0);  //ccr_tst_word
 11169:   }  //irpAndToRegWord
 11170: 
 11171:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11172:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 11173:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 11174:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11175:   //AND.L <ea>,Dq                                   |-|012346|-|-UUUU|-**00|D M+-WXZPI|1100_qqq_010_mmm_rrr
 11176:   public static void irpAndToRegLong () throws M68kException {
 11177:     int ea = XEiJ.regOC & 63;
 11178:     int qqq = XEiJ.regOC >> 9 & 7;
 11179:     int z;
 11180:     if (ea < XEiJ.EA_AR) {  //AND.L Dr,Dq
 11181:       XEiJ.mpuCycleCount += 8;
 11182:       z = XEiJ.regRn[qqq] &= XEiJ.regRn[ea];
 11183:     } else {  //AND.L <mem>,Dq
 11184:       XEiJ.mpuCycleCount += ea == XEiJ.EA_IM ? 8 : 6;  //ソースが#<data>のとき2増やす
 11185:       z = XEiJ.regRn[qqq] &= XEiJ.busRls (efaAnyLong (ea));
 11186:     }
 11187:     XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X);  //ccr_tst
 11188:   }  //irpAndToRegLong
 11189: 
 11190:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11191:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 11192:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 11193:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11194:   //MULU.W <ea>,Dq                                  |-|012346|-|-UUUU|-***0|D M+-WXZPI|1100_qqq_011_mmm_rrr
 11195:   public static void irpMuluWord () throws M68kException {
 11196:     int ea = XEiJ.regOC & 63;
 11197:     int qqq = XEiJ.regOC >> 9 & 7;
 11198:     int y = ea < XEiJ.EA_AR ? (char) XEiJ.regRn[ea] : XEiJ.busRwz (efaAnyWord (ea));
 11199:     //muluの所要サイクル数は38+2n
 11200:     //nはソースに含まれる1の数
 11201:     int s = y & 0x5555;
 11202:     s += y - s >> 1;
 11203:     int t = s & 0x3333;
 11204:     t += s - t >> 2;
 11205:     t += t >> 4;
 11206:     XEiJ.mpuCycleCount += 38 + (((t & 15) + (t >> 8 & 15)) << 1);  //38+2n
 11207:     //XEiJ.mpuCycleCount += 38 + (Integer.bitCount (y) << 1);  //少し遅くなる
 11208:     int z;
 11209:     XEiJ.regRn[qqq] = z = (char) XEiJ.regRn[qqq] * y;  //積の下位32ビット。オーバーフローは無視
 11210:     XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X);  //ccr_tst
 11211:   }  //irpMuluWord
 11212: 
 11213:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11214:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 11215:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 11216:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11217:   //ABCD.B Dr,Dq                                    |-|012346|-|UUUUU|*U*U*|          |1100_qqq_100_000_rrr
 11218:   //ABCD.B -(Ar),-(Aq)                              |-|012346|-|UUUUU|*U*U*|          |1100_qqq_100_001_rrr
 11219:   //AND.B Dq,<ea>                                   |-|012346|-|-UUUU|-**00|  M+-WXZ  |1100_qqq_100_mmm_rrr
 11220:   public static void irpAndToMemByte () throws M68kException {
 11221:     int ea = XEiJ.regOC & 63;
 11222:     if (ea >= XEiJ.EA_MM) {  //AND.B Dq,<ea>
 11223:       XEiJ.mpuCycleCount += 8;
 11224:       int a = efaMltByte (ea);
 11225:       int z = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & XEiJ.busRbs (a);
 11226:       XEiJ.busWb (a, z);
 11227:       XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & z];  //ccr_tst_byte
 11228:     } else if (ea < XEiJ.EA_AR) {  //ABCD.B Dr,Dq
 11229:       int qqq = XEiJ.regOC >> 9 & 7;
 11230:       XEiJ.mpuCycleCount += 6;
 11231:       XEiJ.regRn[qqq] = ~0xff & XEiJ.regRn[qqq] | irpAbcd (XEiJ.regRn[qqq], XEiJ.regRn[ea]);
 11232:     } else {  //ABCD.B -(Ar),-(Aq)
 11233:       XEiJ.mpuCycleCount += 18;
 11234:       int y = XEiJ.busRbz (--XEiJ.regRn[ea]);  //このr[ea]はアドレスレジスタ
 11235:       int a = --XEiJ.regRn[(XEiJ.regOC >> 9) - (96 - 8)];
 11236:       XEiJ.busWb (a, irpAbcd (XEiJ.busRbz (a), y));
 11237:     }
 11238:   }  //irpAndToMemByte
 11239: 
 11240:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11241:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 11242:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 11243:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11244:   //EXG.L Dq,Dr                                     |-|012346|-|-----|-----|          |1100_qqq_101_000_rrr
 11245:   //EXG.L Aq,Ar                                     |-|012346|-|-----|-----|          |1100_qqq_101_001_rrr
 11246:   //AND.W Dq,<ea>                                   |-|012346|-|-UUUU|-**00|  M+-WXZ  |1100_qqq_101_mmm_rrr
 11247:   public static void irpAndToMemWord () throws M68kException {
 11248:     int ea = XEiJ.regOC & 63;
 11249:     if (ea < XEiJ.EA_MM) {  //EXG
 11250:       XEiJ.mpuCycleCount += 6;
 11251:       if (ea < XEiJ.EA_AR) {  //EXG.L Dq,Dr
 11252:         int qqq = XEiJ.regOC >> 9 & 7;
 11253:         int t = XEiJ.regRn[qqq];
 11254:         XEiJ.regRn[qqq] = XEiJ.regRn[ea];
 11255:         XEiJ.regRn[ea] = t;
 11256:       } else {  //EXG.L Aq,Ar
 11257:         int aqq = (XEiJ.regOC >> 9) - (96 - 8);
 11258:         int t = XEiJ.regRn[aqq];
 11259:         XEiJ.regRn[aqq] = XEiJ.regRn[ea];  //このr[ea]アドレスレジスタ
 11260:         XEiJ.regRn[ea] = t;  //このr[ea]はアドレスレジスタ
 11261:       }
 11262:     } else {  //AND.W Dq,<ea>
 11263:       XEiJ.mpuCycleCount += 8;
 11264:       int a = efaMltWord (ea);
 11265:       int z = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & XEiJ.busRws (a);
 11266:       XEiJ.busWw (a, z);
 11267:       XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (char) z - 1 >> 31 & XEiJ.REG_CCR_Z | ((short) z < 0 ? XEiJ.REG_CCR_N : 0);  //ccr_tst_word
 11268:     }
 11269:   }  //irpAndToMemWord
 11270: 
 11271:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11272:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 11273:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 11274:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11275:   //EXG.L Dq,Ar                                     |-|012346|-|-----|-----|          |1100_qqq_110_001_rrr
 11276:   //AND.L Dq,<ea>                                   |-|012346|-|-UUUU|-**00|  M+-WXZ  |1100_qqq_110_mmm_rrr
 11277:   public static void irpAndToMemLong () throws M68kException {
 11278:     int ea = XEiJ.regOC & 63;
 11279:     int qqq = XEiJ.regOC >> 9 & 7;
 11280:     if (ea >> 3 == XEiJ.MMM_AR) {  //EXG.L Dq,Ar
 11281:       XEiJ.mpuCycleCount += 6;
 11282:       int t = XEiJ.regRn[qqq];
 11283:       XEiJ.regRn[qqq] = XEiJ.regRn[ea];  //このr[ea]はアドレスレジスタ
 11284:       XEiJ.regRn[ea] = t;  //このr[ea]はアドレスレジスタ
 11285:     } else {  //AND.L Dq,<ea>
 11286:       XEiJ.mpuCycleCount += 12;
 11287:       int a = efaMltLong (ea);
 11288:       int z;
 11289:       XEiJ.busWl (a, z = XEiJ.busRls (a) & XEiJ.regRn[qqq]);
 11290:       XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X);  //ccr_tst
 11291:     }
 11292:   }  //irpAndToMemLong
 11293: 
 11294:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11295:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 11296:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 11297:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11298:   //MULS.W <ea>,Dq                                  |-|012346|-|-UUUU|-***0|D M+-WXZPI|1100_qqq_111_mmm_rrr
 11299:   public static void irpMulsWord () throws M68kException {
 11300:     int ea = XEiJ.regOC & 63;
 11301:     int qqq = XEiJ.regOC >> 9 & 7;
 11302:     int y = ea < XEiJ.EA_AR ? (short) XEiJ.regRn[ea] : XEiJ.busRws (efaAnyWord (ea));
 11303:     int t = y << 1 ^ y;  //右側が1である0と右側が0または末尾である1は1、それ以外は0。ソースは符号拡張されているので上位16ビットはすべて0
 11304:     //mulsの所要サイクル数は38+2n
 11305:     //nはソースの末尾に0を付け加えた17ビットに含まれる10または01の数
 11306:     int s = t & 0x5555;
 11307:     s += t - s >> 1;
 11308:     t = s & 0x3333;
 11309:     t += s - t >> 2;
 11310:     t += t >> 4;
 11311:     XEiJ.mpuCycleCount += 38 + (((t & 15) + (t >> 8 & 15)) << 1);  //38+2n
 11312:     int z;
 11313:     XEiJ.regRn[qqq] = z = (short) XEiJ.regRn[qqq] * y;  //積の下位32ビット。オーバーフローは無視
 11314:     XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X);  //ccr_tst
 11315:   }  //irpMulsWord
 11316: 
 11317:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11318:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 11319:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 11320:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11321:   //ADD.B <ea>,Dq                                   |-|012346|-|UUUUU|*****|D M+-WXZPI|1101_qqq_000_mmm_rrr
 11322:   public static void irpAddToRegByte () throws M68kException {
 11323:     XEiJ.mpuCycleCount += 4;
 11324:     int ea = XEiJ.regOC & 63;
 11325:     int qqq = XEiJ.regOC >> 9 & 7;
 11326:     int x, y, z;
 11327:     y = ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : XEiJ.busRbs (efaAnyByte (ea));
 11328:     x = XEiJ.regRn[qqq];
 11329:     z = x + y;
 11330:     XEiJ.regRn[qqq] = ~255 & x | 255 & z;
 11331:     XEiJ.regCCR = (XEiJ.MPU_TSTB_TABLE[255 & z] |
 11332:            ((x ^ z) & (y ^ z)) >> 6 & XEiJ.REG_CCR_V |
 11333:            (byte) ((x | y) ^ (x ^ y) & z) >> 7 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C));  //ccr_add_byte
 11334:   }  //irpAddToRegByte
 11335: 
 11336:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11337:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 11338:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 11339:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11340:   //ADD.W <ea>,Dq                                   |-|012346|-|UUUUU|*****|DAM+-WXZPI|1101_qqq_001_mmm_rrr
 11341:   public static void irpAddToRegWord () throws M68kException {
 11342:     XEiJ.mpuCycleCount += 4;
 11343:     int ea = XEiJ.regOC & 63;
 11344:     int qqq = XEiJ.regOC >> 9 & 7;
 11345:     int x, y, z;
 11346:     y = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : XEiJ.busRws (efaAnyWord (ea));  //このr[ea]はデータレジスタまたはアドレスレジスタ
 11347:     x = XEiJ.regRn[qqq];
 11348:     z = x + y;
 11349:     XEiJ.regRn[qqq] = ~65535 & x | (char) z;
 11350:     XEiJ.regCCR = (z >> 12 & XEiJ.REG_CCR_N | (char) z - 1 >> 14 & XEiJ.REG_CCR_Z |
 11351:            ((x ^ z) & (y ^ z)) >> 14 & XEiJ.REG_CCR_V |
 11352:            (short) ((x | y) ^ (x ^ y) & z) >> 15 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C));  //ccr_add_word
 11353:   }  //irpAddToRegWord
 11354: 
 11355:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11356:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 11357:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 11358:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11359:   //ADD.L <ea>,Dq                                   |-|012346|-|UUUUU|*****|DAM+-WXZPI|1101_qqq_010_mmm_rrr
 11360:   public static void irpAddToRegLong () throws M68kException {
 11361:     int ea = XEiJ.regOC & 63;
 11362:     int qqq = XEiJ.regOC >> 9 & 7;
 11363:     XEiJ.mpuCycleCount += ea < XEiJ.EA_MM || ea == XEiJ.EA_IM ? 8 : 6;  //ソースが#<data>のとき2増やす
 11364:     int x, y, z;
 11365:     y = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : XEiJ.busRls (efaAnyLong (ea));  //このr[ea]はデータレジスタまたはアドレスレジスタ
 11366:     x = XEiJ.regRn[qqq];
 11367:     z = x + y;
 11368:     XEiJ.regRn[qqq] = z;
 11369:     XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) |
 11370:            ((x ^ z) & (y ^ z)) >> 30 & XEiJ.REG_CCR_V |
 11371:            ((x | y) ^ (x ^ y) & z) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C));  //ccr_add
 11372:   }  //irpAddToRegLong
 11373: 
 11374:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11375:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 11376:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 11377:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11378:   //ADDA.W <ea>,Aq                                  |-|012346|-|-----|-----|DAM+-WXZPI|1101_qqq_011_mmm_rrr
 11379:   //ADD.W <ea>,Aq                                   |A|012346|-|-----|-----|DAM+-WXZPI|1101_qqq_011_mmm_rrr [ADDA.W <ea>,Aq]
 11380:   //
 11381:   //ADDA.W <ea>,Aq
 11382:   //  ソースを符号拡張してロングで加算する
 11383:   public static void irpAddaWord () throws M68kException {
 11384:     XEiJ.mpuCycleCount += 8;
 11385:     int ea = XEiJ.regOC & 63;
 11386:     int z = ea < XEiJ.EA_MM ? (short) XEiJ.regRn[ea] : XEiJ.busRws (efaAnyWord (ea));  //このr[ea]はデータレジスタまたはアドレスレジスタ。ここでAqが変化する可能性があることに注意
 11387:     XEiJ.regRn[XEiJ.regOC >> 9 & 15] += z;  //r[op >> 9 & 15] += ea < XEiJ.EA_MM ? (short) r[ea] : rws (efaAnyWord (ea));は不可
 11388:     //ccrは変化しない
 11389:   }  //irpAddaWord
 11390: 
 11391:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11392:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 11393:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 11394:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11395:   //ADDX.B Dr,Dq                                    |-|012346|-|*UUUU|*****|          |1101_qqq_100_000_rrr
 11396:   //ADDX.B -(Ar),-(Aq)                              |-|012346|-|*UUUU|*****|          |1101_qqq_100_001_rrr
 11397:   //ADD.B Dq,<ea>                                   |-|012346|-|UUUUU|*****|  M+-WXZ  |1101_qqq_100_mmm_rrr
 11398:   public static void irpAddToMemByte () throws M68kException {
 11399:     int ea = XEiJ.regOC & 63;
 11400:     int a, x, y, z;
 11401:     if (ea < XEiJ.EA_MM) {
 11402:       if (ea < XEiJ.EA_AR) {  //ADDX.B Dr,Dq
 11403:         int qqq = XEiJ.regOC >> 9 & 7;
 11404:         XEiJ.mpuCycleCount += 4;
 11405:         y = XEiJ.regRn[ea];
 11406:         x = XEiJ.regRn[qqq];
 11407:         z = x + y + (XEiJ.regCCR >> 4);  //Xの左側はすべて0なのでCCR_X&を省略
 11408:         XEiJ.regRn[qqq] = ~255 & x | 255 & z;
 11409:       } else {  //ADDX.B -(Ar),-(Aq)
 11410:         XEiJ.mpuCycleCount += 18;
 11411:         y = XEiJ.busRbs (--XEiJ.regRn[ea]);  //このr[ea]はアドレスレジスタ
 11412:         a = --XEiJ.regRn[XEiJ.regOC >> 9 & 15];  //1qqq=aqq
 11413:         x = XEiJ.busRbs (a);
 11414:         z = x + y + (XEiJ.regCCR >> 4);  //Xの左側はすべて0なのでCCR_X&を省略
 11415:         XEiJ.busWb (a, z);
 11416:       }
 11417:       XEiJ.regCCR = (z >> 4 & XEiJ.REG_CCR_N | (255 & z) - 1 >> 6 & XEiJ.regCCR & XEiJ.REG_CCR_Z |  //ADDXはZをクリアすることはあるがセットすることはない
 11418:              ((x ^ z) & (y ^ z)) >> 6 & XEiJ.REG_CCR_V |
 11419:              (byte) ((x | y) ^ (x ^ y) & z) >> 7 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C));  //ccr_addx_byte
 11420:     } else {  //ADD.B Dq,<ea>
 11421:       XEiJ.mpuCycleCount += 8;
 11422:       y = XEiJ.regRn[XEiJ.regOC >> 9 & 7];
 11423:       a = efaMltByte (ea);
 11424:       x = XEiJ.busRbs (a);
 11425:       z = x + y;
 11426:       XEiJ.busWb (a, z);
 11427:       XEiJ.regCCR = (XEiJ.MPU_TSTB_TABLE[255 & z] |
 11428:              ((x ^ z) & (y ^ z)) >> 6 & XEiJ.REG_CCR_V |
 11429:              (byte) ((x | y) ^ (x ^ y) & z) >> 7 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C));  //ccr_add_byte
 11430:     }
 11431:   }  //irpAddToMemByte
 11432: 
 11433:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11434:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 11435:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 11436:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11437:   //ADDX.W Dr,Dq                                    |-|012346|-|*UUUU|*****|          |1101_qqq_101_000_rrr
 11438:   //ADDX.W -(Ar),-(Aq)                              |-|012346|-|*UUUU|*****|          |1101_qqq_101_001_rrr
 11439:   //ADD.W Dq,<ea>                                   |-|012346|-|UUUUU|*****|  M+-WXZ  |1101_qqq_101_mmm_rrr
 11440:   public static void irpAddToMemWord () throws M68kException {
 11441:     int ea = XEiJ.regOC & 63;
 11442:     int a, x, y, z;
 11443:     if (ea < XEiJ.EA_MM) {
 11444:       if (ea < XEiJ.EA_AR) {  //ADDX.W Dr,Dq
 11445:         int qqq = XEiJ.regOC >> 9 & 7;
 11446:         XEiJ.mpuCycleCount += 4;
 11447:         y = XEiJ.regRn[ea];
 11448:         x = XEiJ.regRn[qqq];
 11449:         z = x + y + (XEiJ.regCCR >> 4);  //Xの左側はすべて0なのでCCR_X&を省略
 11450:         XEiJ.regRn[qqq] = ~65535 & x | (char) z;
 11451:       } else {  //ADDX.W -(Ar),-(Aq)
 11452:         XEiJ.mpuCycleCount += 18;
 11453:         y = XEiJ.busRws (XEiJ.regRn[ea] -= 2);  //このr[ea]はアドレスレジスタ
 11454:         a = XEiJ.regRn[XEiJ.regOC >> 9 & 15] -= 2;
 11455:         x = XEiJ.busRws (a);
 11456:         z = x + y + (XEiJ.regCCR >> 4);  //Xの左側はすべて0なのでCCR_X&を省略
 11457:         XEiJ.busWw (a, z);
 11458:       }
 11459:       XEiJ.regCCR = (z >> 12 & XEiJ.REG_CCR_N | (char) z - 1 >> 14 & XEiJ.regCCR & XEiJ.REG_CCR_Z |  //ADDXはZをクリアすることはあるがセットすることはない
 11460:              ((x ^ z) & (y ^ z)) >> 14 & XEiJ.REG_CCR_V |
 11461:              (short) ((x | y) ^ (x ^ y) & z) >> 15 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C));  //ccr_addx_word
 11462:     } else {  //ADD.W Dq,<ea>
 11463:       XEiJ.mpuCycleCount += 8;
 11464:       a = efaMltWord (ea);
 11465:       y = XEiJ.regRn[XEiJ.regOC >> 9 & 7];
 11466:       x = XEiJ.busRws (a);
 11467:       z = x + y;
 11468:       XEiJ.busWw (a, z);
 11469:       XEiJ.regCCR = (z >> 12 & XEiJ.REG_CCR_N | (char) z - 1 >> 14 & XEiJ.REG_CCR_Z |
 11470:              ((x ^ z) & (y ^ z)) >> 14 & XEiJ.REG_CCR_V |
 11471:              (short) ((x | y) ^ (x ^ y) & z) >> 15 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C));  //ccr_add_word
 11472:     }
 11473:   }  //irpAddToMemWord
 11474: 
 11475:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11476:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 11477:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 11478:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11479:   //ADDX.L Dr,Dq                                    |-|012346|-|*UUUU|*****|          |1101_qqq_110_000_rrr
 11480:   //ADDX.L -(Ar),-(Aq)                              |-|012346|-|*UUUU|*****|          |1101_qqq_110_001_rrr
 11481:   //ADD.L Dq,<ea>                                   |-|012346|-|UUUUU|*****|  M+-WXZ  |1101_qqq_110_mmm_rrr
 11482:   public static void irpAddToMemLong () throws M68kException {
 11483:     int ea = XEiJ.regOC & 63;
 11484:     if (ea < XEiJ.EA_MM) {
 11485:       int x;
 11486:       int y;
 11487:       int z;
 11488:       if (ea < XEiJ.EA_AR) {  //ADDX.L Dr,Dq
 11489:         int qqq = XEiJ.regOC >> 9 & 7;
 11490:         XEiJ.mpuCycleCount += 8;
 11491:         XEiJ.regRn[qqq] = z = (x = XEiJ.regRn[qqq]) + (y = XEiJ.regRn[ea]) + (XEiJ.regCCR >> 4);  //Xの左側はすべて0なのでCCR_X&を省略
 11492:       } else {  //ADDX.L -(Ar),-(Aq)
 11493:         XEiJ.mpuCycleCount += 30;
 11494:         y = XEiJ.busRls (XEiJ.regRn[ea] -= 4);  //このr[ea]はアドレスレジスタ
 11495:         int a = XEiJ.regRn[XEiJ.regOC >> 9 & 15] -= 4;
 11496:         XEiJ.busWl (a, z = (x = XEiJ.busRls (a)) + y + (XEiJ.regCCR >> 4));  //Xの左側はすべて0なのでCCR_X&を省略
 11497:       }
 11498:       XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_Z : 0) |
 11499:              ((x ^ z) & (y ^ z)) >>> 31 << 1 |
 11500:              ((x | y) ^ (x ^ y) & z) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C));  //ccr_addx
 11501:     } else {  //ADD.L Dq,<ea>
 11502:       XEiJ.mpuCycleCount += 12;
 11503:       int a = efaMltLong (ea);
 11504:       int x;
 11505:       int y;
 11506:       int z;
 11507:       XEiJ.busWl (a, z = (x = XEiJ.busRls (a)) + (y = XEiJ.regRn[XEiJ.regOC >> 9 & 7]));
 11508:       XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) |
 11509:              ((x ^ z) & (y ^ z)) >>> 31 << 1 |
 11510:              ((x | y) ^ (x ^ y) & z) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C));  //ccr_add
 11511:     }
 11512:   }  //irpAddToMemLong
 11513: 
 11514:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11515:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 11516:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 11517:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11518:   //ADDA.L <ea>,Aq                                  |-|012346|-|-----|-----|DAM+-WXZPI|1101_qqq_111_mmm_rrr
 11519:   //ADD.L <ea>,Aq                                   |A|012346|-|-----|-----|DAM+-WXZPI|1101_qqq_111_mmm_rrr [ADDA.L <ea>,Aq]
 11520:   public static void irpAddaLong () throws M68kException {
 11521:     int ea = XEiJ.regOC & 63;
 11522:     XEiJ.mpuCycleCount += ea < XEiJ.EA_MM || ea == XEiJ.EA_IM ? 8 : 6;  //Dr/Ar/#<data>のとき8+、それ以外は6+
 11523:     int z = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : XEiJ.busRls (efaAnyLong (ea));  //このr[ea]はデータレジスタまたはアドレスレジスタ。ここでAqが変化する可能性があることに注意
 11524:     XEiJ.regRn[XEiJ.regOC >> 9 & 15] += z;  //r[op >> 9 & 15] += ea < XEiJ.EA_MM ? r[ea] : rls (efaAnyLong (ea));は不可
 11525:     //ccrは変化しない
 11526:   }  //irpAddaLong
 11527: 
 11528:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11529:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 11530:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 11531:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11532:   //ASR.B #<data>,Dr                                |-|012346|-|UUUUU|***0*|          |1110_qqq_000_000_rrr
 11533:   //LSR.B #<data>,Dr                                |-|012346|-|UUUUU|***0*|          |1110_qqq_000_001_rrr
 11534:   //ROXR.B #<data>,Dr                               |-|012346|-|*UUUU|***0*|          |1110_qqq_000_010_rrr
 11535:   //ROR.B #<data>,Dr                                |-|012346|-|-UUUU|-**0*|          |1110_qqq_000_011_rrr
 11536:   //ASR.B Dq,Dr                                     |-|012346|-|UUUUU|***0*|          |1110_qqq_000_100_rrr
 11537:   //LSR.B Dq,Dr                                     |-|012346|-|UUUUU|***0*|          |1110_qqq_000_101_rrr
 11538:   //ROXR.B Dq,Dr                                    |-|012346|-|*UUUU|***0*|          |1110_qqq_000_110_rrr
 11539:   //ROR.B Dq,Dr                                     |-|012346|-|-UUUU|-**0*|          |1110_qqq_000_111_rrr
 11540:   //ASR.B Dr                                        |A|012346|-|UUUUU|***0*|          |1110_001_000_000_rrr [ASR.B #1,Dr]
 11541:   //LSR.B Dr                                        |A|012346|-|UUUUU|***0*|          |1110_001_000_001_rrr [LSR.B #1,Dr]
 11542:   //ROXR.B Dr                                       |A|012346|-|*UUUU|***0*|          |1110_001_000_010_rrr [ROXR.B #1,Dr]
 11543:   //ROR.B Dr                                        |A|012346|-|-UUUU|-**0*|          |1110_001_000_011_rrr [ROR.B #1,Dr]
 11544:   //
 11545:   //ASR.B #<data>,Dr
 11546:   //ASR.B Dq,Dr
 11547:   //  算術右シフトバイト
 11548:   //       ........................アイウエオカキク XNZVC
 11549:   //     0 ........................アイウエオカキク Xア*00 Z=アイウエオカキク==0
 11550:   //     1 ........................アアイウエオカキ クア*0ク Z=アイウエオカキ==0
 11551:   //     2 ........................アアアイウエオカ キア*0キ Z=アイウエオカ==0
 11552:   //     3 ........................アアアアイウエオ カア*0カ Z=アイウエオ==0
 11553:   //     4 ........................アアアアアイウエ オア*0オ Z=アイウエ==0
 11554:   //     5 ........................アアアアアアイウ エア*0エ Z=アイウ==0
 11555:   //     6 ........................アアアアアアアイ ウア*0ウ Z=アイ==0
 11556:   //     7 ........................アアアアアアアア イア*0イ Z=ア==0
 11557:   //     8 ........................アアアアアアアア アア*0ア Z=ア==0
 11558:   //  CCR
 11559:   //    X  countが0のとき変化しない。他は最後に押し出されたビット
 11560:   //    N  結果の最上位ビット
 11561:   //    Z  結果が0のときセット。他はクリア
 11562:   //    V  常にクリア
 11563:   //    C  countが0のときクリア。他は最後に押し出されたビット
 11564:   //
 11565:   //LSR.B #<data>,Dr
 11566:   //LSR.B Dq,Dr
 11567:   //  論理右シフトバイト
 11568:   //       ........................アイウエオカキク XNZVC
 11569:   //     0 ........................アイウエオカキク Xア*00 Z=アイウエオカキク==0
 11570:   //     1 ........................0アイウエオカキ ク0*0ク Z=アイウエオカキ==0
 11571:   //     2 ........................00アイウエオカ キ0*0キ Z=アイウエオカ==0
 11572:   //     3 ........................000アイウエオ カ0*0カ Z=アイウエオ==0
 11573:   //     4 ........................0000アイウエ オ0*0オ Z=アイウエ==0
 11574:   //     5 ........................00000アイウ エ0*0エ Z=アイウ==0
 11575:   //     6 ........................000000アイ ウ0*0ウ Z=アイ==0
 11576:   //     7 ........................0000000ア イ0*0イ Z=ア==0
 11577:   //     8 ........................00000000 ア010ア
 11578:   //     9 ........................00000000 00100
 11579:   //  CCR
 11580:   //    X  countが0のとき変化しない。他は最後に押し出されたビット
 11581:   //    N  結果の最上位ビット
 11582:   //    Z  結果が0のときセット。他はクリア
 11583:   //    V  常にクリア
 11584:   //    C  countが0のときクリア。他は最後に押し出されたビット
 11585:   //
 11586:   //ROR.B #<data>,Dr
 11587:   //ROR.B Dq,Dr
 11588:   //  右ローテートバイト
 11589:   //       ........................アイウエオカキク XNZVC
 11590:   //     0 ........................アイウエオカキク Xア*00 Z=アイウエオカキク==0
 11591:   //     1 ........................クアイウエオカキ Xク*0ク Z=アイウエオカキク==0
 11592:   //     :
 11593:   //     7 ........................イウエオカキクア Xイ*0イ Z=アイウエオカキク==0
 11594:   //     8 ........................アイウエオカキク Xア*0ア Z=アイウエオカキク==0
 11595:   //  CCR
 11596:   //    X  常に変化しない
 11597:   //    N  結果の最上位ビット
 11598:   //    Z  結果が0のときセット。他はクリア
 11599:   //    V  常にクリア
 11600:   //    C  countが0のときクリア。他は結果の最上位ビット
 11601:   //
 11602:   //ROXR.B #<data>,Dr
 11603:   //ROXR.B Dq,Dr
 11604:   //  拡張右ローテートバイト
 11605:   //       ........................アイウエオカキク XNZVC
 11606:   //     0 ........................アイウエオカキク Xア*0X Z=アイウエオカキク==0
 11607:   //     1 ........................Xアイウエオカキ クX*0ク Z=アイウエオカキX==0
 11608:   //     2 ........................クXアイウエオカ キク*0キ Z=アイウエオカクX==0
 11609:   //     3 ........................キクXアイウエオ カキ*0カ Z=アイウエオキクX==0
 11610:   //     4 ........................カキクXアイウエ オカ*0オ Z=アイウエカキクX==0
 11611:   //     5 ........................オカキクXアイウ エオ*0エ Z=アイウオカキクX==0
 11612:   //     6 ........................エオカキクXアイ ウエ*0ウ Z=アイエオカキクX==0
 11613:   //     7 ........................ウエオカキクXア イウ*0イ Z=アウエオカキクX==0
 11614:   //     8 ........................イウエオカキクX アイ*0ア Z=イウエオカキクX==0
 11615:   //     9 ........................アイウエオカキク Xア*0X Z=アイウエオカキク==0
 11616:   //  CCR
 11617:   //    X  countが0のとき変化しない。他は最後に押し出されたビット
 11618:   //    N  結果の最上位ビット
 11619:   //    Z  結果が0のときセット。他はクリア
 11620:   //    V  常にクリア
 11621:   //    C  countが0のときXのコピー。他は最後に押し出されたビット
 11622:   public static void irpXxrToRegByte () throws M68kException {
 11623:     int rrr;
 11624:     int x = XEiJ.regRn[rrr = XEiJ.regOC & 7];
 11625:     int y;
 11626:     int z;
 11627:     int t;
 11628:     switch (XEiJ.regOC >> 3 & 0b111_000 >> 3) {
 11629:     case 0b000_000 >> 3:  //ASR.B #<data>,Dr
 11630:       XEiJ.mpuCycleCount += 6 + 2 + ((y = (XEiJ.regOC >> 9) - 1 & 7) << 1);  //y=data-1=1-1~8-1
 11631:       XEiJ.regRn[rrr] = ~0xff & x | 0xff & (z = (t = (byte) x >> y) >> 1);
 11632:       XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | -(t & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C);  //XとCは最後に押し出されたビット
 11633:       break;
 11634:     case 0b001_000 >> 3:  //LSR.B #<data>,Dr
 11635:       XEiJ.mpuCycleCount += 6 + 2 + ((y = (XEiJ.regOC >> 9) - 1 & 7) << 1);  //y=data-1=1-1~8-1
 11636:       XEiJ.regRn[rrr] = ~0xff & x | (z = (t = (0xff & x) >>> y) >>> 1);
 11637:       XEiJ.regCCR = (z == 0 ? XEiJ.REG_CCR_Z : 0) | -(t & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C);  //XとCは最後に押し出されたビット
 11638:       break;
 11639:     case 0b010_000 >> 3:  //ROXR.B #<data>,Dr
 11640:       XEiJ.mpuCycleCount += 6 + 2 + ((y = (XEiJ.regOC >> 9) - 1 & 7) << 1);  //y=data-1=1-1~8-1
 11641:       z = (XEiJ.regCCR & XEiJ.REG_CCR_X) << 7 - 4 | (0xff & x) >>> 1;
 11642:       if (y == 1 - 1) {  //y=data-1=1-1
 11643:         t = x;
 11644:       } else {  //y=data-1=2-1~8-1
 11645:         z = x << 9 - 1 - y | (t = z >>> y - (2 - 1)) >>> 1;
 11646:       }
 11647:       XEiJ.regRn[rrr] = ~0xff & x | 0xff & (z = (byte) z);
 11648:       XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | -(t & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C);  //XとCは最後に押し出されたビット
 11649:       break;
 11650:     case 0b011_000 >> 3:  //ROR.B #<data>,Dr
 11651:       XEiJ.mpuCycleCount += 6 + 2 + ((y = (XEiJ.regOC >> 9) - 1 & 7) << 1);  //y=data-1=1-1~8-1
 11652:       XEiJ.regRn[rrr] = ~0xff & x | 0xff & (z = (byte) (x << 7 - y | (0xff & x) >>> y + 1));
 11653:       XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | z >>> 7 & 1;  //Xは変化しない。Cは結果の最上位ビット
 11654:       break;
 11655:     case 0b100_000 >> 3:  //ASR.B Dq,Dr
 11656:       y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63;  //y=0~63。Javaのシフト演算子は5ビットでマスクされることに注意
 11657:       XEiJ.mpuCycleCount += 6 + (y << 1);
 11658:       if (y == 0) {  //y=data=0
 11659:         z = (byte) x;
 11660:         t = XEiJ.regCCR & XEiJ.REG_CCR_X;  //Xは変化しない。Cはクリア
 11661:       } else {  //y=data=1~63
 11662:         XEiJ.regRn[rrr] = ~0xff & x | 0xff & (z = (t = (byte) x >> (y <= 8 ? y - 1 : 7)) >> 1);
 11663:         t = -(t & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C);  //XとCは最後に押し出されたビット
 11664:       }
 11665:       XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | t;
 11666:       break;
 11667:     case 0b101_000 >> 3:  //LSR.B Dq,Dr
 11668:       y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63;  //y=0~63。Javaのシフト演算子は5ビットでマスクされることに注意
 11669:       XEiJ.mpuCycleCount += 6 + (y << 1);
 11670:       if (y == 0) {  //y=data=0
 11671:         z = (byte) x;
 11672:         XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (z < 0 ? XEiJ.REG_CCR_N : z == 0 ? XEiJ.REG_CCR_Z : 0);  //Xは変化しない。Cはクリア
 11673:       } else {  //y=data=1~63
 11674:         XEiJ.regRn[rrr] = ~0xff & x | (z = (t = y <= 8 ? (0xff & x) >>> y - 1 : 0) >>> 1);
 11675:         XEiJ.regCCR = (z == 0 ? XEiJ.REG_CCR_Z : 0) | -(t & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C);  //XとCは最後に押し出されたビット
 11676:       }
 11677:       break;
 11678:     case 0b110_000 >> 3:  //ROXR.B Dq,Dr
 11679:       y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63;  //y=0~63。Javaのシフト演算子は5ビットでマスクされることに注意
 11680:       XEiJ.mpuCycleCount += 6 + (y << 1);
 11681:       //y %= 9;
 11682:       y = (y & 7) - (y >> 3);  //y=data=-7~7
 11683:       y += y >> 3 & 9;  //y=data=0~8
 11684:       if (y == 0) {  //y=data=0
 11685:         z = (byte) x;
 11686:         t = -(XEiJ.regCCR >> 4 & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C);  //Xは変化しない。CはXのコピー
 11687:       } else {  //y=data=1~8
 11688:         z = (XEiJ.regCCR & XEiJ.REG_CCR_X) << 7 - 4 | (0xff & x) >>> 1;
 11689:         if (y == 1) {  //y=data=1
 11690:           t = x;  //Cは最後に押し出されたビット
 11691:         } else {  //y=data=2~8
 11692:           z = x << 9 - y | (t = z >>> y - 2) >>> 1;
 11693:         }
 11694:         XEiJ.regRn[rrr] = ~0xff & x | 0xff & (z = (byte) z);
 11695:         t = -(t & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C);  //XとCは最後に押し出されたビット
 11696:       }
 11697:       XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | t;
 11698:       break;
 11699:     case 0b111_000 >> 3:  //ROR.B Dq,Dr
 11700:     default:
 11701:       y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63;  //y=0~63。Javaのシフト演算子は5ビットでマスクされることに注意
 11702:       XEiJ.mpuCycleCount += 6 + (y << 1);
 11703:       if (y == 0) {
 11704:         z = (byte) x;
 11705:         t = 0;  //Cはクリア
 11706:       } else {
 11707:         y &= 7;  //y=data=0~7
 11708:         XEiJ.regRn[rrr] = ~0xff & x | 0xff & (z = (byte) (x << 8 - y | (0xff & x) >>> y));
 11709:         t = z >>> 7 & 1;  //Cは結果の最上位ビット
 11710:       }
 11711:       XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | t;  //Xは変化しない
 11712:     }
 11713:   }  //irpXxrToRegByte
 11714: 
 11715:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11716:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 11717:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 11718:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11719:   //ASR.W #<data>,Dr                                |-|012346|-|UUUUU|***0*|          |1110_qqq_001_000_rrr
 11720:   //LSR.W #<data>,Dr                                |-|012346|-|UUUUU|***0*|          |1110_qqq_001_001_rrr
 11721:   //ROXR.W #<data>,Dr                               |-|012346|-|*UUUU|***0*|          |1110_qqq_001_010_rrr
 11722:   //ROR.W #<data>,Dr                                |-|012346|-|-UUUU|-**0*|          |1110_qqq_001_011_rrr
 11723:   //ASR.W Dq,Dr                                     |-|012346|-|UUUUU|***0*|          |1110_qqq_001_100_rrr
 11724:   //LSR.W Dq,Dr                                     |-|012346|-|UUUUU|***0*|          |1110_qqq_001_101_rrr
 11725:   //ROXR.W Dq,Dr                                    |-|012346|-|*UUUU|***0*|          |1110_qqq_001_110_rrr
 11726:   //ROR.W Dq,Dr                                     |-|012346|-|-UUUU|-**0*|          |1110_qqq_001_111_rrr
 11727:   //ASR.W Dr                                        |A|012346|-|UUUUU|***0*|          |1110_001_001_000_rrr [ASR.W #1,Dr]
 11728:   //LSR.W Dr                                        |A|012346|-|UUUUU|***0*|          |1110_001_001_001_rrr [LSR.W #1,Dr]
 11729:   //ROXR.W Dr                                       |A|012346|-|*UUUU|***0*|          |1110_001_001_010_rrr [ROXR.W #1,Dr]
 11730:   //ROR.W Dr                                        |A|012346|-|-UUUU|-**0*|          |1110_001_001_011_rrr [ROR.W #1,Dr]
 11731:   //
 11732:   //ASR.W #<data>,Dr
 11733:   //ASR.W Dq,Dr
 11734:   //ASR.W <ea>
 11735:   //  算術右シフトワード
 11736:   //       ................アイウエオカキクケコサシスセソタ XNZVC
 11737:   //     0 ................アイウエオカキクケコサシスセソタ Xア*00 Z=アイウエオカキクケコサシスセソタ==0
 11738:   //     1 ................アアイウエオカキクケコサシスセソ タア*0タ Z=アイウエオカキクケコサシスセソ==0
 11739:   //     :
 11740:   //    15 ................アアアアアアアアアアアアアアアア イア*0イ Z=ア==0
 11741:   //    16 ................アアアアアアアアアアアアアアアア アア*0ア Z=ア==0
 11742:   //  CCR
 11743:   //    X  countが0のとき変化しない。他は最後に押し出されたビット
 11744:   //    N  結果の最上位ビット
 11745:   //    Z  結果が0のときセット。他はクリア
 11746:   //    V  常にクリア
 11747:   //    C  countが0のときクリア。他は最後に押し出されたビット
 11748:   //
 11749:   //LSR.W #<data>,Dr
 11750:   //LSR.W Dq,Dr
 11751:   //LSR.W <ea>
 11752:   //  論理右シフトワード
 11753:   //       ................アイウエオカキクケコサシスセソタ XNZVC
 11754:   //     0 ................アイウエオカキクケコサシスセソタ Xア*00 Z=アイウエオカキクケコサシスセソタ==0
 11755:   //     1 ................0アイウエオカキクケコサシスセソ タ0*0タ Z=アイウエオカキクケコサシスセソ==0
 11756:   //     :
 11757:   //    15 ................000000000000000ア イ0*0イ Z=ア==0
 11758:   //    16 ................0000000000000000 ア010ア
 11759:   //    17 ................0000000000000000 00100
 11760:   //  CCR
 11761:   //    X  countが0のとき変化しない。他は最後に押し出されたビット
 11762:   //    N  結果の最上位ビット
 11763:   //    Z  結果が0のときセット。他はクリア
 11764:   //    V  常にクリア
 11765:   //    C  countが0のときクリア。他は最後に押し出されたビット
 11766:   //
 11767:   //ROR.W #<data>,Dr
 11768:   //ROR.W Dq,Dr
 11769:   //ROR.W <ea>
 11770:   //  右ローテートワード
 11771:   //       ................アイウエオカキクケコサシスセソタ XNZVC
 11772:   //     0 ................アイウエオカキクケコサシスセソタ Xア*00 Z=アイウエオカキクケコサシスセソタ==0
 11773:   //     1 ................タアイウエオカキクケコサシスセソ Xタ*0タ Z=アイウエオカキクケコサシスセソタ==0
 11774:   //     :
 11775:   //    15 ................イウエオカキクケコサシスセソタア Xイ*0イ Z=アイウエオカキクケコサシスセソタ==0
 11776:   //    16 ................アイウエオカキクケコサシスセソタ Xア*0ア Z=アイウエオカキクケコサシスセソタ==0
 11777:   //  CCR
 11778:   //    X  常に変化しない
 11779:   //    N  結果の最上位ビット
 11780:   //    Z  結果が0のときセット。他はクリア
 11781:   //    V  常にクリア
 11782:   //    C  countが0のときクリア。他は結果の最上位ビット
 11783:   //
 11784:   //ROXR.W #<data>,Dr
 11785:   //ROXR.W Dq,Dr
 11786:   //ROXR.W <ea>
 11787:   //  拡張右ローテートワード
 11788:   //       ................アイウエオカキクケコサシスセソタ XNZVC
 11789:   //     0 ................アイウエオカキクケコサシスセソタ Xア*0X Z=アイウエオカキクケコサシスセソタ==0
 11790:   //     1 ................Xアイウエオカキクケコサシスセソ タX*0タ Z=アイウエオカキクケコサシスセソX==0
 11791:   //     2 ................タXアイウエオカキクケコサシスセ ソタ*0ソ Z=アイウエオカキクケコサシスセタX==0
 11792:   //     :
 11793:   //    15 ................ウエオカキクケコサシスセソタXア イウ*0イ Z=アウエオカキクケコサシスセソタX==0
 11794:   //    16 ................イウエオカキクケコサシスセソタX アイ*0ア Z=イウエオカキクケコサシスセソタX==0
 11795:   //    17 ................アイウエオカキクケコサシスセソタ Xア*0X Z=アイウエオカキクケコサシスセソタ==0
 11796:   //  CCR
 11797:   //    X  countが0のとき変化しない。他は最後に押し出されたビット
 11798:   //    N  結果の最上位ビット
 11799:   //    Z  結果が0のときセット。他はクリア
 11800:   //    V  常にクリア
 11801:   //    C  countが0のときXのコピー。他は最後に押し出されたビット
 11802:   public static void irpXxrToRegWord () throws M68kException {
 11803:     int rrr;
 11804:     int x = XEiJ.regRn[rrr = XEiJ.regOC & 7];
 11805:     int y;
 11806:     int z;
 11807:     int t;
 11808:     switch (XEiJ.regOC >> 3 & 0b111_000 >> 3) {
 11809:     case 0b000_000 >> 3:  //ASR.W #<data>,Dr
 11810:       XEiJ.mpuCycleCount += 6 + 2 + ((y = (XEiJ.regOC >> 9) - 1 & 7) << 1);  //y=data-1=1-1~8-1
 11811:       XEiJ.regRn[rrr] = ~0xffff & x | (char) (z = (t = (short) x >> y) >> 1);
 11812:       XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | -(t & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C);  //XとCは最後に押し出されたビット
 11813:       break;
 11814:     case 0b001_000 >> 3:  //LSR.W #<data>,Dr
 11815:       XEiJ.mpuCycleCount += 6 + 2 + ((y = (XEiJ.regOC >> 9) - 1 & 7) << 1);  //y=data-1=1-1~8-1
 11816:       XEiJ.regRn[rrr] = ~0xffff & x | (z = (t = (char) x >>> y) >>> 1);
 11817:       XEiJ.regCCR = (z == 0 ? XEiJ.REG_CCR_Z : 0) | -(t & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C);  //XとCは最後に押し出されたビット
 11818:       break;
 11819:     case 0b010_000 >> 3:  //ROXR.W #<data>,Dr
 11820:       XEiJ.mpuCycleCount += 6 + 2 + ((y = (XEiJ.regOC >> 9) - 1 & 7) << 1);  //y=data-1=1-1~8-1
 11821:       z = (XEiJ.regCCR & XEiJ.REG_CCR_X) << 15 - 4 | (char) x >>> 1;
 11822:       if (y == 1 - 1) {  //y=data-1=1-1
 11823:         t = x;
 11824:       } else {  //y=data-1=2-1~8-1
 11825:         z = x << 17 - 1 - y | (t = z >>> y - (2 - 1)) >>> 1;
 11826:       }
 11827:       XEiJ.regRn[rrr] = ~0xffff & x | (char) (z = (short) z);
 11828:       XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | -(t & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C);  //XとCは最後に押し出されたビット
 11829:       break;
 11830:     case 0b011_000 >> 3:  //ROR.W #<data>,Dr
 11831:       XEiJ.mpuCycleCount += 6 + 2 + ((y = (XEiJ.regOC >> 9) - 1 & 7) << 1);  //y=data-1=1-1~8-1
 11832:       XEiJ.regRn[rrr] = ~0xffff & x | (char) (z = (short) (x << 16 - 1 - y | (char) x >>> y + 1));
 11833:       XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | z >>> 15 & 1;  //Xは変化しない。Cは結果の最上位ビット
 11834:       break;
 11835:     case 0b100_000 >> 3:  //ASR.W Dq,Dr
 11836:       y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63;  //y=0~63。Javaのシフト演算子は5ビットでマスクされることに注意
 11837:       XEiJ.mpuCycleCount += 6 + (y << 1);
 11838:       if (y == 0) {  //y=data=0
 11839:         z = (short) x;
 11840:         t = XEiJ.regCCR & XEiJ.REG_CCR_X;  //Xは変化しない。Cはクリア
 11841:       } else {  //y=data=1~63
 11842:         XEiJ.regRn[rrr] = ~0xffff & x | (char) (z = (t = (short) x >> (y <= 16 ? y - 1 : 15)) >> 1);
 11843:         t = -(t & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C);  //XとCは最後に押し出されたビット
 11844:       }
 11845:       XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | t;
 11846:       break;
 11847:     case 0b101_000 >> 3:  //LSR.W Dq,Dr
 11848:       y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63;  //y=0~63。Javaのシフト演算子は5ビットでマスクされることに注意
 11849:       XEiJ.mpuCycleCount += 6 + (y << 1);
 11850:       if (y == 0) {  //y=data=0
 11851:         z = (short) x;
 11852:         XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (z < 0 ? XEiJ.REG_CCR_N : z == 0 ? XEiJ.REG_CCR_Z : 0);  //Xは変化しない。Cはクリア
 11853:       } else {  //y=data=1~63
 11854:         XEiJ.regRn[rrr] = ~0xffff & x | (z = (t = y <= 16 ? (char) x >>> y - 1 : 0) >>> 1);
 11855:         XEiJ.regCCR = (z == 0 ? XEiJ.REG_CCR_Z : 0) | -(t & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C);  //XとCは最後に押し出されたビット
 11856:       }
 11857:       break;
 11858:     case 0b110_000 >> 3:  //ROXR.W Dq,Dr
 11859:       y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63;  //y=0~63。Javaのシフト演算子は5ビットでマスクされることに注意
 11860:       XEiJ.mpuCycleCount += 6 + (y << 1);
 11861:       //y %= 17;
 11862:       y = (y & 15) - (y >> 4);  //y=data=-3~15
 11863:       y += y >> 4 & 17;  //y=data=0~16
 11864:       if (y == 0) {  //y=data=0
 11865:         z = (short) x;
 11866:         t = -(XEiJ.regCCR >> 4 & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C);  //Xは変化しない。CはXのコピー
 11867:       } else {  //y=data=1~16
 11868:         z = (XEiJ.regCCR & XEiJ.REG_CCR_X) << 15 - 4 | (char) x >>> 1;
 11869:         if (y == 1) {  //y=data=1
 11870:           t = x;  //Cは最後に押し出されたビット
 11871:         } else {  //y=data=2~16
 11872:           z = x << 17 - y | (t = z >>> y - 2) >>> 1;
 11873:         }
 11874:         XEiJ.regRn[rrr] = ~0xffff & x | (char) (z = (short) z);
 11875:         t = -(t & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C);  //XとCは最後に押し出されたビット
 11876:       }
 11877:       XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | t;
 11878:       break;
 11879:     case 0b111_000 >> 3:  //ROR.W Dq,Dr
 11880:     default:
 11881:       y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63;  //y=0~63。Javaのシフト演算子は5ビットでマスクされることに注意
 11882:       XEiJ.mpuCycleCount += 6 + (y << 1);
 11883:       if (y == 0) {
 11884:         z = (short) x;
 11885:         t = 0;  //Cはクリア
 11886:       } else {
 11887:         y &= 15;  //y=data=0~15
 11888:         XEiJ.regRn[rrr] = ~0xffff & x | (char) (z = (short) (x << 16 - y | (char) x >>> y));
 11889:         t = z >>> 15 & 1;  //Cは結果の最上位ビット
 11890:       }
 11891:       XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | t;  //Xは変化しない
 11892:     }
 11893:   }  //irpXxrToRegWord
 11894: 
 11895:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11896:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 11897:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 11898:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 11899:   //ASR.L #<data>,Dr                                |-|012346|-|UUUUU|***0*|          |1110_qqq_010_000_rrr
 11900:   //LSR.L #<data>,Dr                                |-|012346|-|UUUUU|***0*|          |1110_qqq_010_001_rrr
 11901:   //ROXR.L #<data>,Dr                               |-|012346|-|*UUUU|***0*|          |1110_qqq_010_010_rrr
 11902:   //ROR.L #<data>,Dr                                |-|012346|-|-UUUU|-**0*|          |1110_qqq_010_011_rrr
 11903:   //ASR.L Dq,Dr                                     |-|012346|-|UUUUU|***0*|          |1110_qqq_010_100_rrr
 11904:   //LSR.L Dq,Dr                                     |-|012346|-|UUUUU|***0*|          |1110_qqq_010_101_rrr
 11905:   //ROXR.L Dq,Dr                                    |-|012346|-|*UUUU|***0*|          |1110_qqq_010_110_rrr
 11906:   //ROR.L Dq,Dr                                     |-|012346|-|-UUUU|-**0*|          |1110_qqq_010_111_rrr
 11907:   //ASR.L Dr                                        |A|012346|-|UUUUU|***0*|          |1110_001_010_000_rrr [ASR.L #1,Dr]
 11908:   //LSR.L Dr                                        |A|012346|-|UUUUU|***0*|          |1110_001_010_001_rrr [LSR.L #1,Dr]
 11909:   //ROXR.L Dr                                       |A|012346|-|*UUUU|***0*|          |1110_001_010_010_rrr [ROXR.L #1,Dr]
 11910:   //ROR.L Dr                                        |A|012346|-|-UUUU|-**0*|          |1110_001_010_011_rrr [ROR.L #1,Dr]
 11911:   //
 11912:   //ASR.L #<data>,Dr
 11913:   //ASR.L Dq,Dr
 11914:   //  算術右シフトロング
 11915:   //       アイウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマミ XNZVC
 11916:   //     0 アイウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマミ Xア*00 Z=アイウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマミ==0
 11917:   //     1 アアイウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマ ミア*0ミ Z=アイウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマ==0
 11918:   //     :
 11919:   //    31 アアアアアアアアアアアアアアアアアアアアアアアアアアアアアアアア イア*0イ Z=ア==0
 11920:   //    32 アアアアアアアアアアアアアアアアアアアアアアアアアアアアアアアア アア*0ア Z=ア==0
 11921:   //  CCR
 11922:   //    X  countが0のとき変化しない。他は最後に押し出されたビット
 11923:   //    N  結果の最上位ビット
 11924:   //    Z  結果が0のときセット。他はクリア
 11925:   //    V  常にクリア
 11926:   //    C  countが0のときクリア。他は最後に押し出されたビット
 11927:   //
 11928:   //LSR.L #<data>,Dr
 11929:   //LSR.L Dq,Dr
 11930:   //  論理右シフトロング
 11931:   //       アイウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマミ XNZVC
 11932:   //     0 アイウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマミ Xア*00 Z=アイウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマミ==0
 11933:   //     1 0アイウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマ ミ0*0ミ Z=アイウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマ==0
 11934:   //     :
 11935:   //    31 0000000000000000000000000000000ア イ0*0イ Z=ア==0
 11936:   //    32 00000000000000000000000000000000 ア010ア
 11937:   //    33 00000000000000000000000000000000 00100
 11938:   //  CCR
 11939:   //    X  countが0のとき変化しない。他は最後に押し出されたビット
 11940:   //    N  結果の最上位ビット
 11941:   //    Z  結果が0のときセット。他はクリア
 11942:   //    V  常にクリア
 11943:   //    C  countが0のときクリア。他は最後に押し出されたビット
 11944:   //
 11945:   //ROR.L #<data>,Dr
 11946:   //ROR.L Dq,Dr
 11947:   //  右ローテートロング
 11948:   //       アイウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマミ XNZVC
 11949:   //     0 アイウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマミ Xア*00 Z=アイウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマミ==0
 11950:   //     1 ミアイウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマ Xミ*0ミ Z=アイウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマミ==0
 11951:   //     :
 11952:   //    31 イウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマミア Xイ*0イ Z=アイウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマミ==0
 11953:   //    32 アイウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマミ Xア*0ア Z=アイウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマミ==0
 11954:   //  CCR
 11955:   //    X  常に変化しない
 11956:   //    N  結果の最上位ビット
 11957:   //    Z  結果が0のときセット。他はクリア
 11958:   //    V  常にクリア
 11959:   //    C  countが0のときクリア。他は結果の最上位ビット
 11960:   //
 11961:   //ROXR.L #<data>,Dr
 11962:   //ROXR.L Dq,Dr
 11963:   //  拡張右ローテートロング
 11964:   //       アイウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマミ XNZVC
 11965:   //     0 アイウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマミ Xア*0X Z=アイウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマミ==0
 11966:   //     1 Xアイウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマ ミX*0ミ Z=アイウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマX==0
 11967:   //     2 ミXアイウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホ マミ*0マ Z=アイウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホミX==0
 11968:   //     :
 11969:   //    31 ウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマミXア イウ*0イ Z=アウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマミX==0
 11970:   //    32 イウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマミX アイ*0ア Z=イウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマミX==0
 11971:   //    33 アイウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマミ Xア*0X Z=アイウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマミ==0
 11972:   //  CCR
 11973:   //    X  countが0のとき変化しない。他は最後に押し出されたビット
 11974:   //    N  結果の最上位ビット
 11975:   //    Z  結果が0のときセット。他はクリア
 11976:   //    V  常にクリア
 11977:   //    C  countが0のときXのコピー。他は最後に押し出されたビット
 11978:   public static void irpXxrToRegLong () throws M68kException {
 11979:     int rrr;
 11980:     int x = XEiJ.regRn[rrr = XEiJ.regOC & 7];
 11981:     int y;
 11982:     int z;
 11983:     int t;
 11984:     switch (XEiJ.regOC >> 3 & 0b111_000 >> 3) {
 11985:     case 0b000_000 >> 3:  //ASR.L #<data>,Dr
 11986:       XEiJ.mpuCycleCount += 8 + 2 + ((y = (XEiJ.regOC >> 9) - 1 & 7) << 1);  //y=data-1=1-1~8-1
 11987:       XEiJ.regRn[rrr] = z = (t = x >> y) >> 1;
 11988:       XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | -(t & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C);  //XとCは最後に押し出されたビット
 11989:       break;
 11990:     case 0b001_000 >> 3:  //LSR.L #<data>,Dr
 11991:       XEiJ.mpuCycleCount += 8 + 2 + ((y = (XEiJ.regOC >> 9) - 1 & 7) << 1);  //y=data-1=1-1~8-1
 11992:       XEiJ.regRn[rrr] = z = (t = x >>> y) >>> 1;
 11993:       XEiJ.regCCR = (z == 0 ? XEiJ.REG_CCR_Z : 0) | -(t & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C);  //XとCは最後に押し出されたビット
 11994:       break;
 11995:     case 0b010_000 >> 3:  //ROXR.L #<data>,Dr
 11996:       XEiJ.mpuCycleCount += 8 + 2 + ((y = (XEiJ.regOC >> 9) - 1 & 7) << 1);  //y=data-1=1-1~8-1
 11997:       z = (XEiJ.regCCR & XEiJ.REG_CCR_X) << 31 - 4 | x >>> 1;
 11998:       if (y == 1 - 1) {  //y=data-1=1-1
 11999:         t = x;
 12000:       } else {  //y=data-1=2-1~8-1
 12001:         z = x << -y | (t = z >>> y - (2 - 1)) >>> 1;  //Javaのシフト演算子は5ビットでマスクされるので33-1-yを-yに省略
 12002:       }
 12003:       XEiJ.regRn[rrr] = z;
 12004:       XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | -(t & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C);  //XとCは最後に押し出されたビット
 12005:       break;
 12006:     case 0b011_000 >> 3:  //ROR.L #<data>,Dr
 12007:       XEiJ.mpuCycleCount += 8 + 2 + ((y = (XEiJ.regOC >> 9) - 1 & 7) << 1);  //y=data-1=1-1~8-1
 12008:       XEiJ.regRn[rrr] = z = x << ~y | x >>> y + 1;  //Javaのシフト演算子は5ビットでマスクされるので32-1-yを~yに省略
 12009:       XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | z >>> 31;  //Xは変化しない。Cは結果の最上位ビット
 12010:       break;
 12011:     case 0b100_000 >> 3:  //ASR.L Dq,Dr
 12012:       y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63;  //y=0~63。Javaのシフト演算子は5ビットでマスクされることに注意
 12013:       XEiJ.mpuCycleCount += 8 + (y << 1);
 12014:       if (y == 0) {  //y=data=0
 12015:         z = x;
 12016:         t = XEiJ.regCCR & XEiJ.REG_CCR_X;  //Xは変化しない。Cはクリア
 12017:       } else {  //y=data=1~63
 12018:         XEiJ.regRn[rrr] = z = (t = x >> (y <= 32 ? y - 1 : 31)) >> 1;
 12019:         t = -(t & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C);  //XとCは最後に押し出されたビット
 12020:       }
 12021:       XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | t;
 12022:       break;
 12023:     case 0b101_000 >> 3:  //LSR.L Dq,Dr
 12024:       y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63;  //y=0~63。Javaのシフト演算子は5ビットでマスクされることに注意
 12025:       XEiJ.mpuCycleCount += 8 + (y << 1);
 12026:       if (y == 0) {  //y=data=0
 12027:         z = x;
 12028:         XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (z < 0 ? XEiJ.REG_CCR_N : z == 0 ? XEiJ.REG_CCR_Z : 0);  //Xは変化しない。Cはクリア
 12029:       } else {  //y=data=1~63
 12030:         XEiJ.regRn[rrr] = z = (t = y <= 32 ? x >>> y - 1 : 0) >>> 1;
 12031:         XEiJ.regCCR = (z == 0 ? XEiJ.REG_CCR_Z : 0) | -(t & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C);  //XとCは最後に押し出されたビット
 12032:       }
 12033:       break;
 12034:     case 0b110_000 >> 3:  //ROXR.L Dq,Dr
 12035:       y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63;  //y=0~63。Javaのシフト演算子は5ビットでマスクされることに注意
 12036:       XEiJ.mpuCycleCount += 8 + (y << 1);
 12037:       //y %= 33;
 12038:       y -= 32 - y >> 6 & 33;  //y=data=0~32
 12039:       if (y == 0) {  //y=data=0
 12040:         z = x;
 12041:         t = -(XEiJ.regCCR >> 4 & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C);  //Xは変化しない。CはXのコピー
 12042:       } else {  //y=data=1~32
 12043:         z = (XEiJ.regCCR & XEiJ.REG_CCR_X) << 31 - 4 | x >>> 1;
 12044:         if (y == 1) {  //y=data=1
 12045:           t = x;  //Cは最後に押し出されたビット
 12046:         } else {  //y=data=2~32
 12047:           z = x << 33 - y | (t = z >>> y - 2) >>> 1;
 12048:         }
 12049:         XEiJ.regRn[rrr] = z;
 12050:         t = -(t & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C);  //XとCは最後に押し出されたビット
 12051:       }
 12052:       XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | t;
 12053:       break;
 12054:     case 0b111_000 >> 3:  //ROR.L Dq,Dr
 12055:     default:
 12056:       y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63;  //y=0~63。Javaのシフト演算子は5ビットでマスクされることに注意
 12057:       XEiJ.mpuCycleCount += 8 + (y << 1);
 12058:       if (y == 0) {
 12059:         z = x;
 12060:         t = 0;  //Cはクリア
 12061:       } else {
 12062:         y &= 31;  //y=data=0~31
 12063:         XEiJ.regRn[rrr] = z = x << -y | x >>> y;  //Javaのシフト演算子は5ビットでマスクされるので32-yを-yに省略。y=32のときx|xになるが問題ない
 12064:         t = z >>> 31;  //Cは結果の最上位ビット
 12065:       }
 12066:       XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | t;  //Xは変化しない
 12067:     }
 12068:   }  //irpXxrToRegLong
 12069: 
 12070:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12071:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 12072:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 12073:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12074:   //ASR.W <ea>                                      |-|012346|-|UUUUU|***0*|  M+-WXZ  |1110_000_011_mmm_rrr
 12075:   //
 12076:   //ASR.W #<data>,Dr
 12077:   //ASR.W Dq,Dr
 12078:   //ASR.W <ea>
 12079:   //  算術右シフトワード
 12080:   //       ................アイウエオカキクケコサシスセソタ XNZVC
 12081:   //     0 ................アイウエオカキクケコサシスセソタ Xア*00 Z=アイウエオカキクケコサシスセソタ==0
 12082:   //     1 ................アアイウエオカキクケコサシスセソ タア*0タ Z=アイウエオカキクケコサシスセソ==0
 12083:   //     :
 12084:   //    15 ................アアアアアアアアアアアアアアアア イア*0イ Z=ア==0
 12085:   //    16 ................アアアアアアアアアアアアアアアア アア*0ア Z=ア==0
 12086:   //  CCR
 12087:   //    X  countが0のとき変化しない。他は最後に押し出されたビット
 12088:   //    N  結果の最上位ビット
 12089:   //    Z  結果が0のときセット。他はクリア
 12090:   //    V  常にクリア
 12091:   //    C  countが0のときクリア。他は最後に押し出されたビット
 12092:   public static void irpAsrToMem () throws M68kException {
 12093:     XEiJ.mpuCycleCount += 8;
 12094:     int ea = XEiJ.regOC & 63;
 12095:     int a = efaMltWord (ea);
 12096:     int x = XEiJ.busRws (a);
 12097:     int z = x >> 1;
 12098:     XEiJ.busWw (a, z);
 12099:     XEiJ.regCCR = ((z < 0 ? XEiJ.REG_CCR_N : 0) |
 12100:                    (z == 0 ? XEiJ.REG_CCR_Z : 0) |
 12101:                    -(x & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C));  //XとCは最後に押し出されたビット
 12102:   }  //irpAsrToMem
 12103: 
 12104:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12105:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 12106:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 12107:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12108:   //ASL.B #<data>,Dr                                |-|012346|-|UUUUU|*****|          |1110_qqq_100_000_rrr
 12109:   //LSL.B #<data>,Dr                                |-|012346|-|UUUUU|***0*|          |1110_qqq_100_001_rrr
 12110:   //ROXL.B #<data>,Dr                               |-|012346|-|*UUUU|***0*|          |1110_qqq_100_010_rrr
 12111:   //ROL.B #<data>,Dr                                |-|012346|-|-UUUU|-**0*|          |1110_qqq_100_011_rrr
 12112:   //ASL.B Dq,Dr                                     |-|012346|-|UUUUU|*****|          |1110_qqq_100_100_rrr
 12113:   //LSL.B Dq,Dr                                     |-|012346|-|UUUUU|***0*|          |1110_qqq_100_101_rrr
 12114:   //ROXL.B Dq,Dr                                    |-|012346|-|*UUUU|***0*|          |1110_qqq_100_110_rrr
 12115:   //ROL.B Dq,Dr                                     |-|012346|-|-UUUU|-**0*|          |1110_qqq_100_111_rrr
 12116:   //ASL.B Dr                                        |A|012346|-|UUUUU|*****|          |1110_001_100_000_rrr [ASL.B #1,Dr]
 12117:   //LSL.B Dr                                        |A|012346|-|UUUUU|***0*|          |1110_001_100_001_rrr [LSL.B #1,Dr]
 12118:   //ROXL.B Dr                                       |A|012346|-|*UUUU|***0*|          |1110_001_100_010_rrr [ROXL.B #1,Dr]
 12119:   //ROL.B Dr                                        |A|012346|-|-UUUU|-**0*|          |1110_001_100_011_rrr [ROL.B #1,Dr]
 12120:   //
 12121:   //ASL.B #<data>,Dr
 12122:   //ASL.B Dq,Dr
 12123:   //  算術左シフトバイト
 12124:   //       ........................アイウエオカキク XNZVC
 12125:   //     0 ........................アイウエオカキク Xア*00 Z=アイウエオカキク==0
 12126:   //     1 ........................イウエオカキク0 アイ**ア Z=イウエオカキク==0,V=アイ!=0/-1
 12127:   //     :
 12128:   //     7 ........................ク0000000 キク**キ Z=ク==0,V=アイウエオカキク!=0/-1
 12129:   //     8 ........................00000000 ク01*ク V=アイウエオカキク!=0
 12130:   //     9 ........................00000000 001*0 V=アイウエオカキク!=0
 12131:   //  CCR
 12132:   //    X  countが0のとき変化しない。他は最後に押し出されたビット
 12133:   //    N  結果の最上位ビット
 12134:   //    Z  結果が0のときセット。他はクリア
 12135:   //    V  ASRで元に戻せないときセット。他はクリア
 12136:   //    C  countが0のときクリア。他は最後に押し出されたビット
 12137:   //
 12138:   //LSL.B #<data>,Dr
 12139:   //LSL.B Dq,Dr
 12140:   //  論理左シフトバイト
 12141:   //       ........................アイウエオカキク XNZVC
 12142:   //     0 ........................アイウエオカキク Xア*00 Z=アイウエオカキク==0
 12143:   //     1 ........................イウエオカキク0 アイ*0ア Z=イウエオカキク==0
 12144:   //     :
 12145:   //     7 ........................ク0000000 キク*0キ Z=ク==0
 12146:   //     8 ........................00000000 ク010ク
 12147:   //     9 ........................00000000 00100
 12148:   //  CCR
 12149:   //    X  countが0のとき変化しない。他は最後に押し出されたビット
 12150:   //    N  結果の最上位ビット
 12151:   //    Z  結果が0のときセット。他はクリア
 12152:   //    V  常にクリア
 12153:   //    C  countが0のときクリア。他は最後に押し出されたビット
 12154:   //
 12155:   //ROL.B #<data>,Dr
 12156:   //ROL.B Dq,Dr
 12157:   //  左ローテートバイト
 12158:   //       ........................アイウエオカキク XNZVC
 12159:   //     0 ........................アイウエオカキク Xア*00 Z=アイウエオカキク==0
 12160:   //     1 ........................イウエオカキクア Xイ*0ア Z=アイウエオカキク==0
 12161:   //     :
 12162:   //     7 ........................クアイウエオカキ Xク*0キ Z=アイウエオカキク==0
 12163:   //     8 ........................アイウエオカキク Xア*0ク Z=アイウエオカキク==0
 12164:   //  CCR
 12165:   //    X  常に変化しない
 12166:   //    N  結果の最上位ビット
 12167:   //    Z  結果が0のときセット。他はクリア
 12168:   //    V  常にクリア
 12169:   //    C  countが0のときクリア。他は結果の最下位ビット
 12170:   //
 12171:   //ROXL.B #<data>,Dr
 12172:   //ROXL.B Dq,Dr
 12173:   //  拡張左ローテートバイト
 12174:   //       ........................アイウエオカキク XNZVC
 12175:   //     0 ........................アイウエオカキク Xア*0X Z=アイウエオカキク==0
 12176:   //     1 ........................イウエオカキクX アイ*0ア Z=イウエオカキクX==0
 12177:   //     2 ........................ウエオカキクXア イウ*0イ Z=アウエオカキクX==0
 12178:   //     :
 12179:   //     7 ........................クXアイウエオカ キク*0キ Z=アイウエオカクX==0
 12180:   //     8 ........................Xアイウエオカキ クX*0ク Z=アイウエオカキX==0
 12181:   //     9 ........................アイウエオカキク Xア*0X Z=アイウエオカキク==0
 12182:   //  CCR
 12183:   //    X  countが0のとき変化しない。他は最後に押し出されたビット
 12184:   //    N  結果の最上位ビット
 12185:   //    Z  結果が0のときセット。他はクリア
 12186:   //    V  常にクリア
 12187:   //    C  countが0のときXのコピー。他は最後に押し出されたビット
 12188:   public static void irpXxlToRegByte () throws M68kException {
 12189:     int rrr;
 12190:     int x = XEiJ.regRn[rrr = XEiJ.regOC & 7];
 12191:     int y;
 12192:     int z;
 12193:     int t;
 12194:     switch (XEiJ.regOC >> 3 & 0b111_000 >> 3) {
 12195:     case 0b000_000 >> 3:  //ASL.B #<data>,Dr
 12196:       XEiJ.mpuCycleCount += 6 + 2 + ((y = (XEiJ.regOC >> 9) - 1 & 7) << 1);  //y=data-1=1-1~8-1
 12197:       XEiJ.regRn[rrr] = ~0xff & x | 0xff & (z = (byte) ((t = x << y) << 1));
 12198:       XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | (z >> y + 1 != (byte) x ? XEiJ.REG_CCR_V : 0) | (byte) t >> 7 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C);  //VはASRで元に戻せないときセット。XとCは最後に押し出されたビット
 12199:       break;
 12200:     case 0b001_000 >> 3:  //LSL.B #<data>,Dr
 12201:       XEiJ.mpuCycleCount += 6 + 2 + ((y = (XEiJ.regOC >> 9) - 1 & 7) << 1);  //y=data-1=1-1~8-1
 12202:       XEiJ.regRn[rrr] = ~0xff & x | 0xff & (z = (byte) ((t = x << y) << 1));
 12203:       XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | (byte) t >> 7 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C);  //XとCは最後に押し出されたビット
 12204:       break;
 12205:     case 0b010_000 >> 3:  //ROXL.B #<data>,Dr
 12206:       XEiJ.mpuCycleCount += 6 + 2 + ((y = (XEiJ.regOC >> 9) - 1 & 7) << 1);  //y=data-1=1-1~8-1
 12207:       z = x << 1 | XEiJ.regCCR >> 4 & 1;
 12208:       if (y == 1 - 1) {  //y=data-1=1-1
 12209:         t = x;
 12210:       } else {  //y=data-1=2-1~8-1
 12211:         z = (t = z << y - (2 - 1)) << 1 | (0xff & x) >>> 9 - 1 - y;
 12212:       }
 12213:       XEiJ.regRn[rrr] = ~0xff & x | 0xff & (z = (byte) z);
 12214:       XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | (byte) t >> 7 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C);  //XとCは最後に押し出されたビット
 12215:       break;
 12216:     case 0b011_000 >> 3:  //ROL.B #<data>,Dr
 12217:       XEiJ.mpuCycleCount += 6 + 2 + ((y = (XEiJ.regOC >> 9) - 1 & 7) << 1);  //y=data-1=1-1~8-1
 12218:       XEiJ.regRn[rrr] = ~0xff & x | 0xff & (z = (byte) (x << y + 1 | (0xff & x) >>> 7 - y));
 12219:       XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | z & 1;  //Xは変化しない。Cは結果の最下位ビット
 12220:       break;
 12221:     case 0b100_000 >> 3:  //ASL.B Dq,Dr
 12222:       y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63;  //y=0~63。Javaのシフト演算子は5ビットでマスクされることに注意
 12223:       XEiJ.mpuCycleCount += 6 + (y << 1);
 12224:       if (y <= 7) {  //y=data=0~7
 12225:         if (y == 0) {  //y=data=0
 12226:           z = (byte) x;
 12227:           t = XEiJ.regCCR & XEiJ.REG_CCR_X;  //Xは変化しない。VとCはクリア
 12228:         } else {  //y=data=1~7
 12229:           XEiJ.regRn[rrr] = ~0xff & x | 0xff & (z = (byte) ((t = x << y - 1) << 1));
 12230:           t = (z >> y != (byte) x ? XEiJ.REG_CCR_V : 0) | (byte) t >> 7 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C);  //VはASRで元に戻せないときセット。XとCは最後に押し出されたビット
 12231:         }
 12232:         XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | t;
 12233:       } else {  //y=data=8~63
 12234:         XEiJ.regRn[rrr] = ~0xff & x;
 12235:         XEiJ.regCCR = XEiJ.REG_CCR_Z | ((byte) x != 0 ? XEiJ.REG_CCR_V : 0) | (y == 8 ? -(x & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C) : 0);
 12236:       }
 12237:       break;
 12238:     case 0b101_000 >> 3:  //LSL.B Dq,Dr
 12239:       y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63;  //y=0~63。Javaのシフト演算子は5ビットでマスクされることに注意
 12240:       XEiJ.mpuCycleCount += 6 + (y << 1);
 12241:       if (y == 0) {  //y=data=0
 12242:         z = (byte) x;
 12243:         t = XEiJ.regCCR & XEiJ.REG_CCR_X;  //Xは変化しない。Cはクリア
 12244:       } else {  //y=data=1~63
 12245:         XEiJ.regRn[rrr] = ~0xff & x | 0xff & (z = (byte) ((t = y <= 8 ? x << y - 1 : 0) << 1));
 12246:         t = (byte) t >> 7 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C);  //XとCは最後に押し出されたビット
 12247:       }
 12248:       XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | t;
 12249:       break;
 12250:     case 0b110_000 >> 3:  //ROXL.B Dq,Dr
 12251:       y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63;  //y=0~63。Javaのシフト演算子は5ビットでマスクされることに注意
 12252:       XEiJ.mpuCycleCount += 6 + (y << 1);
 12253:       //y %= 9;
 12254:       y = (y & 7) - (y >> 3);  //y=data=-7~7
 12255:       y += y >> 3 & 9;  //y=data=0~8
 12256:       if (y == 0) {  //y=data=0
 12257:         z = (byte) x;
 12258:         t = -(XEiJ.regCCR >> 4 & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C);  //Xは変化しない。CはXのコピー
 12259:       } else {  //y=data=1~8
 12260:         z = x << 1 | XEiJ.regCCR >> 4 & 1;
 12261:         if (y == 1) {  //y=data=1
 12262:           t = x;  //Cは最後に押し出されたビット
 12263:         } else {  //y=data=2~8
 12264:           z = (t = z << y - 2) << 1 | (0xff & x) >>> 9 - y;
 12265:         }
 12266:         XEiJ.regRn[rrr] = ~0xff & x | 0xff & (z = (byte) z);
 12267:         t = (byte) t >> 7 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C);  //XとCは最後に押し出されたビット
 12268:       }
 12269:       XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | t;
 12270:       break;
 12271:     case 0b111_000 >> 3:  //ROL.B Dq,Dr
 12272:     default:
 12273:       y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63;  //y=0~63。Javaのシフト演算子は5ビットでマスクされることに注意
 12274:       XEiJ.mpuCycleCount += 6 + (y << 1);
 12275:       if (y == 0) {
 12276:         z = (byte) x;
 12277:         t = 0;  //Cはクリア
 12278:       } else {
 12279:         y &= 7;  //y=data=0~7
 12280:         XEiJ.regRn[rrr] = ~0xff & x | 0xff & (z = (byte) (x << y | (0xff & x) >>> 8 - y));
 12281:         t = z & 1;  //Cは結果の最下位ビット
 12282:       }
 12283:       XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | t;  //Xは変化しない
 12284:     }
 12285:   }  //irpXxlToRegByte
 12286: 
 12287:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12288:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 12289:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 12290:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12291:   //ASL.W #<data>,Dr                                |-|012346|-|UUUUU|*****|          |1110_qqq_101_000_rrr
 12292:   //LSL.W #<data>,Dr                                |-|012346|-|UUUUU|***0*|          |1110_qqq_101_001_rrr
 12293:   //ROXL.W #<data>,Dr                               |-|012346|-|*UUUU|***0*|          |1110_qqq_101_010_rrr
 12294:   //ROL.W #<data>,Dr                                |-|012346|-|-UUUU|-**0*|          |1110_qqq_101_011_rrr
 12295:   //ASL.W Dq,Dr                                     |-|012346|-|UUUUU|*****|          |1110_qqq_101_100_rrr
 12296:   //LSL.W Dq,Dr                                     |-|012346|-|UUUUU|***0*|          |1110_qqq_101_101_rrr
 12297:   //ROXL.W Dq,Dr                                    |-|012346|-|*UUUU|***0*|          |1110_qqq_101_110_rrr
 12298:   //ROL.W Dq,Dr                                     |-|012346|-|-UUUU|-**0*|          |1110_qqq_101_111_rrr
 12299:   //ASL.W Dr                                        |A|012346|-|UUUUU|*****|          |1110_001_101_000_rrr [ASL.W #1,Dr]
 12300:   //LSL.W Dr                                        |A|012346|-|UUUUU|***0*|          |1110_001_101_001_rrr [LSL.W #1,Dr]
 12301:   //ROXL.W Dr                                       |A|012346|-|*UUUU|***0*|          |1110_001_101_010_rrr [ROXL.W #1,Dr]
 12302:   //ROL.W Dr                                        |A|012346|-|-UUUU|-**0*|          |1110_001_101_011_rrr [ROL.W #1,Dr]
 12303:   //
 12304:   //ASL.W #<data>,Dr
 12305:   //ASL.W Dq,Dr
 12306:   //ASL.W <ea>
 12307:   //  算術左シフトワード
 12308:   //       ................アイウエオカキクケコサシスセソタ XNZVC
 12309:   //     0 ................アイウエオカキクケコサシスセソタ Xア*00 Z=アイウエオカキクケコサシスセソタ==0
 12310:   //     1 ................イウエオカキクケコサシスセソタ0 アイ**ア Z=イウエオカキクケコサシスセソタ==0,V=アイ!=0/-1
 12311:   //     :
 12312:   //    15 ................タ000000000000000 ソタ**ソ Z=タ==0,V=アイウエオカキクケコサシスセソタ!=0/-1
 12313:   //    16 ................0000000000000000 タ01*タ V=アイウエオカキクケコサシスセソタ!=0
 12314:   //    17 ................0000000000000000 001*0 V=アイウエオカキクケコサシスセソタ!=0
 12315:   //  CCR
 12316:   //    X  countが0のとき変化しない。他は最後に押し出されたビット
 12317:   //    N  結果の最上位ビット
 12318:   //    Z  結果が0のときセット。他はクリア
 12319:   //    V  ASRで元に戻せないときセット。他はクリア
 12320:   //    C  countが0のときクリア。他は最後に押し出されたビット
 12321:   //
 12322:   //LSL.W #<data>,Dr
 12323:   //LSL.W Dq,Dr
 12324:   //LSL.W <ea>
 12325:   //  論理左シフトワード
 12326:   //       ................アイウエオカキクケコサシスセソタ XNZVC
 12327:   //     0 ................アイウエオカキクケコサシスセソタ Xア*00 Z=アイウエオカキクケコサシスセソタ==0
 12328:   //     1 ................イウエオカキクケコサシスセソタ0 アイ*0ア Z=イウエオカキクケコサシスセソタ==0
 12329:   //     :
 12330:   //    15 ................タ000000000000000 ソタ*0ソ Z=タ==0
 12331:   //    16 ................0000000000000000 タ010タ
 12332:   //    17 ................0000000000000000 00100
 12333:   //  CCR
 12334:   //    X  countが0のとき変化しない。他は最後に押し出されたビット
 12335:   //    N  結果の最上位ビット
 12336:   //    Z  結果が0のときセット。他はクリア
 12337:   //    V  常にクリア
 12338:   //    C  countが0のときクリア。他は最後に押し出されたビット
 12339:   //
 12340:   //ROL.W #<data>,Dr
 12341:   //ROL.W Dq,Dr
 12342:   //ROL.W <ea>
 12343:   //  左ローテートワード
 12344:   //       ................アイウエオカキクケコサシスセソタ XNZVC
 12345:   //     0 ................アイウエオカキクケコサシスセソタ Xア*00 Z=アイウエオカキクケコサシスセソタ==0
 12346:   //     1 ................イウエオカキクケコサシスセソタア Xイ*0ア Z=アイウエオカキクケコサシスセソタ==0
 12347:   //     :
 12348:   //    15 ................タアイウエオカキクケコサシスセソ Xタ*0ソ Z=アイウエオカキクケコサシスセソタ==0
 12349:   //    16 ................アイウエオカキクケコサシスセソタ Xア*0タ Z=アイウエオカキクケコサシスセソタ==0
 12350:   //  CCR
 12351:   //    X  常に変化しない
 12352:   //    N  結果の最上位ビット
 12353:   //    Z  結果が0のときセット。他はクリア
 12354:   //    V  常にクリア
 12355:   //    C  countが0のときクリア。他は結果の最下位ビット
 12356:   //
 12357:   //ROXL.W #<data>,Dr
 12358:   //ROXL.W Dq,Dr
 12359:   //ROXL.W <ea>
 12360:   //  拡張左ローテートワード
 12361:   //       ................アイウエオカキクケコサシスセソタ XNZVC
 12362:   //     0 ................アイウエオカキクケコサシスセソタ Xア*0X Z=アイウエオカキクケコサシスセソタ==0
 12363:   //     1 ................イウエオカキクケコサシスセソタX アイ*0ア Z=イウエオカキクケコサシスセソタX==0
 12364:   //     2 ................ウエオカキクケコサシスセソタXア イウ*0イ Z=アウエオカキクケコサシスセソタX==0
 12365:   //     :
 12366:   //    15 ................タXアイウエオカキクケコサシスセ ソタ*0ソ Z=アイウエオカキクケコサシスセタX==0
 12367:   //    16 ................Xアイウエオカキクケコサシスセソ タX*0タ Z=アイウエオカキクケコサシスセソX==0
 12368:   //    17 ................アイウエオカキクケコサシスセソタ Xア*0X Z=アイウエオカキクケコサシスセソタ==0
 12369:   //  CCR
 12370:   //    X  countが0のとき変化しない。他は最後に押し出されたビット
 12371:   //    N  結果の最上位ビット
 12372:   //    Z  結果が0のときセット。他はクリア
 12373:   //    V  常にクリア
 12374:   //    C  countが0のときXのコピー。他は最後に押し出されたビット
 12375:   public static void irpXxlToRegWord () throws M68kException {
 12376:     int rrr;
 12377:     int x = XEiJ.regRn[rrr = XEiJ.regOC & 7];
 12378:     int y;
 12379:     int z;
 12380:     int t;
 12381:     switch (XEiJ.regOC >> 3 & 0b111_000 >> 3) {
 12382:     case 0b000_000 >> 3:  //ASL.W #<data>,Dr
 12383:       XEiJ.mpuCycleCount += 6 + 2 + ((y = (XEiJ.regOC >> 9) - 1 & 7) << 1);  //y=data-1=1-1~8-1
 12384:       XEiJ.regRn[rrr] = ~0xffff & x | (char) (z = (short) ((t = x << y) << 1));
 12385:       XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | (z >> y + 1 != (short) x ? XEiJ.REG_CCR_V : 0) | (short) t >> 15 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C);  //VはASRで元に戻せないときセット。XとCは最後に押し出されたビット
 12386:       break;
 12387:     case 0b001_000 >> 3:  //LSL.W #<data>,Dr
 12388:       XEiJ.mpuCycleCount += 6 + 2 + ((y = (XEiJ.regOC >> 9) - 1 & 7) << 1);  //y=data-1=1-1~8-1
 12389:       XEiJ.regRn[rrr] = ~0xffff & x | (char) (z = (short) ((t = x << y) << 1));
 12390:       XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | (short) t >> 15 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C);  //XとCは最後に押し出されたビット
 12391:       break;
 12392:     case 0b010_000 >> 3:  //ROXL.W #<data>,Dr
 12393:       XEiJ.mpuCycleCount += 6 + 2 + ((y = (XEiJ.regOC >> 9) - 1 & 7) << 1);  //y=data-1=1-1~8-1
 12394:       z = x << 1 | XEiJ.regCCR >> 4 & 1;
 12395:       if (y == 1 - 1) {  //y=data-1=1-1
 12396:         t = x;
 12397:       } else {  //y=data-1=2-1~8-1
 12398:         z = (t = z << y - (2 - 1)) << 1 | (char) x >>> 17 - 1 - y;
 12399:       }
 12400:       XEiJ.regRn[rrr] = ~0xffff & x | (char) (z = (short) z);
 12401:       XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | (short) t >> 15 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C);  //XとCは最後に押し出されたビット
 12402:       break;
 12403:     case 0b011_000 >> 3:  //ROL.W #<data>,Dr
 12404:       XEiJ.mpuCycleCount += 6 + 2 + ((y = (XEiJ.regOC >> 9) - 1 & 7) << 1);  //y=data-1=1-1~8-1
 12405:       XEiJ.regRn[rrr] = ~0xffff & x | (char) (z = (short) (x << y + 1 | (char) x >>> 16 - 1 - y));
 12406:       XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | z & 1;  //Xは変化しない。Cは結果の最下位ビット
 12407:       break;
 12408:     case 0b100_000 >> 3:  //ASL.W Dq,Dr
 12409:       y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63;  //y=0~63。Javaのシフト演算子は5ビットでマスクされることに注意
 12410:       XEiJ.mpuCycleCount += 6 + (y << 1);
 12411:       if (y <= 15) {  //y=data=0~15
 12412:         if (y == 0) {  //y=data=0
 12413:           z = (short) x;
 12414:           t = XEiJ.regCCR & XEiJ.REG_CCR_X;  //Xは変化しない。VとCはクリア
 12415:         } else {  //y=data=1~15
 12416:           XEiJ.regRn[rrr] = ~0xffff & x | (char) (z = (short) ((t = x << y - 1) << 1));
 12417:           t = (z >> y != (short) x ? XEiJ.REG_CCR_V : 0) | (short) t >> 15 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C);  //VはASRで元に戻せないときセット。XとCは最後に押し出されたビット
 12418:         }
 12419:         XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | t;
 12420:       } else {  //y=data=16~63
 12421:         XEiJ.regRn[rrr] = ~0xffff & x;
 12422:         XEiJ.regCCR = XEiJ.REG_CCR_Z | ((short) x != 0 ? XEiJ.REG_CCR_V : 0) | (y == 16 ? -(x & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C) : 0);
 12423:       }
 12424:       break;
 12425:     case 0b101_000 >> 3:  //LSL.W Dq,Dr
 12426:       y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63;  //y=0~63。Javaのシフト演算子は5ビットでマスクされることに注意
 12427:       XEiJ.mpuCycleCount += 6 + (y << 1);
 12428:       if (y == 0) {  //y=data=0
 12429:         z = (short) x;
 12430:         t = XEiJ.regCCR & XEiJ.REG_CCR_X;  //Xは変化しない。Cはクリア
 12431:       } else {  //y=data=1~63
 12432:         XEiJ.regRn[rrr] = ~0xffff & x | (char) (z = (short) ((t = y <= 16 ? x << y - 1 : 0) << 1));
 12433:         t = (short) t >> 15 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C);  //XとCは最後に押し出されたビット
 12434:       }
 12435:       XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | t;
 12436:       break;
 12437:     case 0b110_000 >> 3:  //ROXL.W Dq,Dr
 12438:       y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63;  //y=0~63。Javaのシフト演算子は5ビットでマスクされることに注意
 12439:       XEiJ.mpuCycleCount += 6 + (y << 1);
 12440:       //y %= 17;
 12441:       y = (y & 15) - (y >> 4);  //y=data=-3~15
 12442:       y += y >> 4 & 17;  //y=data=0~16
 12443:       if (y == 0) {  //y=data=0
 12444:         z = (short) x;
 12445:         t = -(XEiJ.regCCR >> 4 & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C);  //Xは変化しない。CはXのコピー
 12446:       } else {  //y=data=1~16
 12447:         z = x << 1 | XEiJ.regCCR >> 4 & 1;
 12448:         if (y == 1) {  //y=data=1
 12449:           t = x;  //Cは最後に押し出されたビット
 12450:         } else {  //y=data=2~16
 12451:           z = (t = z << y - 2) << 1 | (char) x >>> 17 - y;
 12452:         }
 12453:         XEiJ.regRn[rrr] = ~0xffff & x | (char) (z = (short) z);
 12454:         t = (short) t >> 15 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C);  //XとCは最後に押し出されたビット
 12455:       }
 12456:       XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | t;
 12457:       break;
 12458:     case 0b111_000 >> 3:  //ROL.W Dq,Dr
 12459:     default:
 12460:       y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63;  //y=0~63。Javaのシフト演算子は5ビットでマスクされることに注意
 12461:       XEiJ.mpuCycleCount += 6 + (y << 1);
 12462:       if (y == 0) {
 12463:         z = (short) x;
 12464:         t = 0;  //Cはクリア
 12465:       } else {
 12466:         y &= 15;  //y=data=0~15
 12467:         XEiJ.regRn[rrr] = ~0xffff & x | (char) (z = (short) (x << y | (char) x >>> 16 - y));
 12468:         t = z & 1;  //Cは結果の最下位ビット
 12469:       }
 12470:       XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | t;  //Xは変化しない
 12471:     }
 12472:   }  //irpXxlToRegWord
 12473: 
 12474:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12475:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 12476:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 12477:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12478:   //ASL.L #<data>,Dr                                |-|012346|-|UUUUU|*****|          |1110_qqq_110_000_rrr
 12479:   //LSL.L #<data>,Dr                                |-|012346|-|UUUUU|***0*|          |1110_qqq_110_001_rrr
 12480:   //ROXL.L #<data>,Dr                               |-|012346|-|*UUUU|***0*|          |1110_qqq_110_010_rrr
 12481:   //ROL.L #<data>,Dr                                |-|012346|-|-UUUU|-**0*|          |1110_qqq_110_011_rrr
 12482:   //ASL.L Dq,Dr                                     |-|012346|-|UUUUU|*****|          |1110_qqq_110_100_rrr
 12483:   //LSL.L Dq,Dr                                     |-|012346|-|UUUUU|***0*|          |1110_qqq_110_101_rrr
 12484:   //ROXL.L Dq,Dr                                    |-|012346|-|*UUUU|***0*|          |1110_qqq_110_110_rrr
 12485:   //ROL.L Dq,Dr                                     |-|012346|-|-UUUU|-**0*|          |1110_qqq_110_111_rrr
 12486:   //ASL.L Dr                                        |A|012346|-|UUUUU|*****|          |1110_001_110_000_rrr [ASL.L #1,Dr]
 12487:   //LSL.L Dr                                        |A|012346|-|UUUUU|***0*|          |1110_001_110_001_rrr [LSL.L #1,Dr]
 12488:   //ROXL.L Dr                                       |A|012346|-|*UUUU|***0*|          |1110_001_110_010_rrr [ROXL.L #1,Dr]
 12489:   //ROL.L Dr                                        |A|012346|-|-UUUU|-**0*|          |1110_001_110_011_rrr [ROL.L #1,Dr]
 12490:   //
 12491:   //ASL.L #<data>,Dr
 12492:   //ASL.L Dq,Dr
 12493:   //  算術左シフトロング
 12494:   //       アイウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマミ XNZVC
 12495:   //     0 アイウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマミ Xア**0 Z=アイウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマミ==0
 12496:   //     1 イウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマミ0 アイ**ア Z=イウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマミ==0,V=アイ!=0/-1
 12497:   //     :
 12498:   //    31 ミ0000000000000000000000000000000 マミ**マ Z=ミ==0,V=アイウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマミ!=0/-1
 12499:   //    32 00000000000000000000000000000000 ミ01*ミ V=アイウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマミ!=0
 12500:   //    33 00000000000000000000000000000000 001*0 V=アイウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマミ!=0
 12501:   //  CCR
 12502:   //    X  countが0のとき変化しない。他は最後に押し出されたビット
 12503:   //    N  結果の最上位ビット
 12504:   //    Z  結果が0のときセット。他はクリア
 12505:   //    V  ASRで元に戻せないときセット。他はクリア
 12506:   //    C  countが0のときクリア。他は最後に押し出されたビット
 12507:   //
 12508:   //LSL.L #<data>,Dr
 12509:   //LSL.L Dq,Dr
 12510:   //  論理左シフトロング
 12511:   //       アイウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマミ XNZVC
 12512:   //     0 アイウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマミ Xア*00 Z=アイウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマミ==0
 12513:   //     1 イウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマミ0 アイ*0ア Z=イウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマミ==0
 12514:   //     :
 12515:   //    31 ミ0000000000000000000000000000000 マミ*0マ Z=ミ==0
 12516:   //    32 00000000000000000000000000000000 ミ010ミ
 12517:   //    33 00000000000000000000000000000000 00100
 12518:   //  CCR
 12519:   //    X  countが0のとき変化しない。他は最後に押し出されたビット
 12520:   //    N  結果の最上位ビット
 12521:   //    Z  結果が0のときセット。他はクリア
 12522:   //    V  常にクリア
 12523:   //    C  countが0のときクリア。他は最後に押し出されたビット
 12524:   //
 12525:   //ROL.L #<data>,Dr
 12526:   //ROL.L Dq,Dr
 12527:   //  左ローテートロング
 12528:   //       アイウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマミ XNZVC
 12529:   //     0 アイウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマミ Xア*00 Z=アイウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマミ==0
 12530:   //     1 イウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマミア Xイ*0ア Z=アイウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマミ==0
 12531:   //     :
 12532:   //    31 ミアイウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマ Xミ*0マ Z=アイウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマミ==0
 12533:   //    32 アイウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマミ Xア*0ミ Z=アイウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマミ==0
 12534:   //  CCR
 12535:   //    X  常に変化しない
 12536:   //    N  結果の最上位ビット
 12537:   //    Z  結果が0のときセット。他はクリア
 12538:   //    V  常にクリア
 12539:   //    C  countが0のときクリア。他は結果の最下位ビット
 12540:   //
 12541:   //ROXL.L #<data>,Dr
 12542:   //ROXL.L Dq,Dr
 12543:   //  拡張左ローテートロング
 12544:   //       アイウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマミ XNZVC
 12545:   //     0 アイウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマミ Xア*0X Z=アイウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマミ==0
 12546:   //     1 イウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマミX アイ*0ア Z=イウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマミX==0
 12547:   //     2 ウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマミXア イウ*0イ Z=アウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマミX==0
 12548:   //     :
 12549:   //    31 ミXアイウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホ マミ*0マ Z=アイウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホミX==0
 12550:   //    32 Xアイウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマ ミX*0ミ Z=アイウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマX==0
 12551:   //    33 アイウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマミ Xア*0X Z=アイウエオカキクケコサシスセソタチツテトナニヌネノハヒフヘホマミ==0
 12552:   //  CCR
 12553:   //    X  countが0のとき変化しない。他は最後に押し出されたビット
 12554:   //    N  結果の最上位ビット
 12555:   //    Z  結果が0のときセット。他はクリア
 12556:   //    V  常にクリア
 12557:   //    C  countが0のときXのコピー。他は最後に押し出されたビット
 12558:   public static void irpXxlToRegLong () throws M68kException {
 12559:     int rrr;
 12560:     int x = XEiJ.regRn[rrr = XEiJ.regOC & 7];
 12561:     int y;
 12562:     int z;
 12563:     int t;
 12564:     switch (XEiJ.regOC >> 3 & 0b111_000 >> 3) {
 12565:     case 0b000_000 >> 3:  //ASL.L #<data>,Dr
 12566:       XEiJ.mpuCycleCount += 8 + 2 + ((y = (XEiJ.regOC >> 9) - 1 & 7) << 1);  //y=data-1=1-1~8-1
 12567:       XEiJ.regRn[rrr] = z = (t = x << y) << 1;
 12568:       XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | (z >> y + 1 != x ? XEiJ.REG_CCR_V : 0) | t >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C);  //VはASRで元に戻せないときセット。XとCは最後に押し出されたビット
 12569:       break;
 12570:     case 0b001_000 >> 3:  //LSL.L #<data>,Dr
 12571:       XEiJ.mpuCycleCount += 8 + 2 + ((y = (XEiJ.regOC >> 9) - 1 & 7) << 1);  //y=data-1=1-1~8-1
 12572:       XEiJ.regRn[rrr] = z = (t = x << y) << 1;
 12573:       XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | t >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C);  //XとCは最後に押し出されたビット
 12574:       break;
 12575:     case 0b010_000 >> 3:  //ROXL.L #<data>,Dr
 12576:       XEiJ.mpuCycleCount += 8 + 2 + ((y = (XEiJ.regOC >> 9) - 1 & 7) << 1);  //y=data-1=1-1~8-1
 12577:       z = x << 1 | XEiJ.regCCR >> 4 & 1;
 12578:       if (y == 1 - 1) {  //y=data-1=1-1
 12579:         t = x;
 12580:       } else {  //y=data-1=2-1~8-1
 12581:         z = (t = z << y - (2 - 1)) << 1 | x >>> -y;  //Javaのシフト演算子は5ビットでマスクされるので33-1-yを-yに省略
 12582:       }
 12583:       XEiJ.regRn[rrr] = z;
 12584:       XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | t >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C);  //XとCは最後に押し出されたビット
 12585:       break;
 12586:     case 0b011_000 >> 3:  //ROL.L #<data>,Dr
 12587:       XEiJ.mpuCycleCount += 8 + 2 + ((y = (XEiJ.regOC >> 9) - 1 & 7) << 1);  //y=data-1=1-1~8-1
 12588:       XEiJ.regRn[rrr] = z = x << y + 1 | x >>> ~y;  //Javaのシフト演算子は5ビットでマスクされるので32-1-yを~yに省略
 12589:       XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | z & 1;  //Xは変化しない。Cは結果の最下位ビット
 12590:       break;
 12591:     case 0b100_000 >> 3:  //ASL.L Dq,Dr
 12592:       y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63;  //y=0~63。Javaのシフト演算子は5ビットでマスクされることに注意
 12593:       XEiJ.mpuCycleCount += 8 + (y << 1);
 12594:       if (y <= 31) {  //y=data=0~31
 12595:         if (y == 0) {  //y=data=0
 12596:           z = x;
 12597:           t = XEiJ.regCCR & XEiJ.REG_CCR_X;  //Xは変化しない。VとCはクリア
 12598:         } else {  //y=data=1~31
 12599:           XEiJ.regRn[rrr] = z = (t = x << y - 1) << 1;
 12600:           t = (z >> y != x ? XEiJ.REG_CCR_V : 0) | t >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C);  //VはASRで元に戻せないときセット。XとCは最後に押し出されたビット
 12601:         }
 12602:         XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | t;
 12603:       } else {  //y=data=32~63
 12604:         XEiJ.regRn[rrr] = 0;
 12605:         XEiJ.regCCR = XEiJ.REG_CCR_Z | (x != 0 ? XEiJ.REG_CCR_V : 0) | (y == 32 ? -(x & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C) : 0);
 12606:       }
 12607:       break;
 12608:     case 0b101_000 >> 3:  //LSL.L Dq,Dr
 12609:       y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63;  //y=0~63。Javaのシフト演算子は5ビットでマスクされることに注意
 12610:       XEiJ.mpuCycleCount += 8 + (y << 1);
 12611:       if (y == 0) {  //y=data=0
 12612:         z = x;
 12613:         t = XEiJ.regCCR & XEiJ.REG_CCR_X;  //Xは変化しない。Cはクリア
 12614:       } else {  //y=data=1~63
 12615:         XEiJ.regRn[rrr] = z = (t = y <= 32 ? x << y - 1 : 0) << 1;
 12616:         t = t >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C);  //XとCは最後に押し出されたビット
 12617:       }
 12618:       XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | t;
 12619:       break;
 12620:     case 0b110_000 >> 3:  //ROXL.L Dq,Dr
 12621:       y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63;  //y=0~63。Javaのシフト演算子は5ビットでマスクされることに注意
 12622:       XEiJ.mpuCycleCount += 8 + (y << 1);
 12623:       //y %= 33;
 12624:       y -= 32 - y >> 6 & 33;  //y=data=0~32
 12625:       if (y == 0) {  //y=data=0
 12626:         z = x;
 12627:         t = -(XEiJ.regCCR >> 4 & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C);  //Xは変化しない。CはXのコピー
 12628:       } else {  //y=data=1~32
 12629:         z = x << 1 | XEiJ.regCCR >> 4 & 1;
 12630:         if (y == 1) {  //y=data=1
 12631:           t = x;  //Cは最後に押し出されたビット
 12632:         } else {  //y=data=2~32
 12633:           z = (t = z << y - 2) << 1 | x >>> 33 - y;
 12634:         }
 12635:         XEiJ.regRn[rrr] = z;
 12636:         t = t >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C);  //XとCは最後に押し出されたビット
 12637:       }
 12638:       XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | t;
 12639:       break;
 12640:     case 0b111_000 >> 3:  //ROL.L Dq,Dr
 12641:     default:
 12642:       y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63;  //y=0~63。Javaのシフト演算子は5ビットでマスクされることに注意
 12643:       XEiJ.mpuCycleCount += 8 + (y << 1);
 12644:       if (y == 0) {
 12645:         z = x;
 12646:         t = 0;  //Cはクリア
 12647:       } else {
 12648:         XEiJ.regRn[rrr] = z = x << y | x >>> -y;  //Javaのシフト演算子は5ビットでマスクされるのでy&31をyに、32-(y&31)を-yに省略。y=32のときx|xになるが問題ない
 12649:         t = z & 1;
 12650:       }
 12651:       XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | t;  //Xは変化しない
 12652:     }
 12653:   }  //irpXxlToRegLong
 12654: 
 12655:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12656:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 12657:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 12658:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12659:   //ASL.W <ea>                                      |-|012346|-|UUUUU|*****|  M+-WXZ  |1110_000_111_mmm_rrr
 12660:   //
 12661:   //ASL.W #<data>,Dr
 12662:   //ASL.W Dq,Dr
 12663:   //ASL.W <ea>
 12664:   //  算術左シフトワード
 12665:   //       ................アイウエオカキクケコサシスセソタ XNZVC
 12666:   //     0 ................アイウエオカキクケコサシスセソタ Xア*00 Z=アイウエオカキクケコサシスセソタ==0
 12667:   //     1 ................イウエオカキクケコサシスセソタ0 アイ**ア Z=イウエオカキクケコサシスセソタ==0,V=アイ!=0/-1
 12668:   //     :
 12669:   //    15 ................タ000000000000000 ソタ**ソ Z=タ==0,V=アイウエオカキクケコサシスセソタ!=0/-1
 12670:   //    16 ................0000000000000000 タ01*タ V=アイウエオカキクケコサシスセソタ!=0
 12671:   //    17 ................0000000000000000 001*0 V=アイウエオカキクケコサシスセソタ!=0
 12672:   //  CCR
 12673:   //    X  countが0のとき変化しない。他は最後に押し出されたビット
 12674:   //    N  結果の最上位ビット
 12675:   //    Z  結果が0のときセット。他はクリア
 12676:   //    V  ASRで元に戻せないときセット。他はクリア
 12677:   //    C  countが0のときクリア。他は最後に押し出されたビット
 12678:   public static void irpAslToMem () throws M68kException {
 12679:     XEiJ.mpuCycleCount += 8;
 12680:     int ea = XEiJ.regOC & 63;
 12681:     int a = efaMltWord (ea);
 12682:     int x = XEiJ.busRws (a);
 12683:     int z = (short) (x << 1);
 12684:     XEiJ.busWw (a, z);
 12685:     XEiJ.regCCR = ((z < 0 ? XEiJ.REG_CCR_N : 0) |
 12686:                    (z == 0 ? XEiJ.REG_CCR_Z : 0) |
 12687:                    (x ^ z) >>> 31 << 1 |  //Vは最上位ビットが変化したときセット
 12688:                    x >> 15 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C));  //XとCは最後に押し出されたビット
 12689:   }  //irpAslToMem
 12690: 
 12691:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12692:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 12693:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 12694:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12695:   //LSR.W <ea>                                      |-|012346|-|UUUUU|*0*0*|  M+-WXZ  |1110_001_011_mmm_rrr
 12696:   //
 12697:   //LSR.W #<data>,Dr
 12698:   //LSR.W Dq,Dr
 12699:   //LSR.W <ea>
 12700:   //  論理右シフトワード
 12701:   //       ................アイウエオカキクケコサシスセソタ XNZVC
 12702:   //     0 ................アイウエオカキクケコサシスセソタ Xア*00 Z=アイウエオカキクケコサシスセソタ==0
 12703:   //     1 ................0アイウエオカキクケコサシスセソ タ0*0タ Z=アイウエオカキクケコサシスセソ==0
 12704:   //     :
 12705:   //    15 ................000000000000000ア イ0*0イ Z=ア==0
 12706:   //    16 ................0000000000000000 ア010ア
 12707:   //    17 ................0000000000000000 00100
 12708:   //  CCR
 12709:   //    X  countが0のとき変化しない。他は最後に押し出されたビット
 12710:   //    N  結果の最上位ビット
 12711:   //    Z  結果が0のときセット。他はクリア
 12712:   //    V  常にクリア
 12713:   //    C  countが0のときクリア。他は最後に押し出されたビット
 12714:   public static void irpLsrToMem () throws M68kException {
 12715:     XEiJ.mpuCycleCount += 8;
 12716:     int ea = XEiJ.regOC & 63;
 12717:     int a = efaMltWord (ea);
 12718:     int x = XEiJ.busRwz (a);
 12719:     int z = x >>> 1;
 12720:     XEiJ.busWw (a, z);
 12721:     XEiJ.regCCR = ((z == 0 ? XEiJ.REG_CCR_Z : 0) |
 12722:                    -(x & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C));  //XとCは最後に押し出されたビット
 12723:   }  //irpLsrToMem
 12724: 
 12725:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12726:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 12727:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 12728:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12729:   //LSL.W <ea>                                      |-|012346|-|UUUUU|***0*|  M+-WXZ  |1110_001_111_mmm_rrr
 12730:   //
 12731:   //LSL.W #<data>,Dr
 12732:   //LSL.W Dq,Dr
 12733:   //LSL.W <ea>
 12734:   //  論理左シフトワード
 12735:   //       ................アイウエオカキクケコサシスセソタ XNZVC
 12736:   //     0 ................アイウエオカキクケコサシスセソタ Xア*00 Z=アイウエオカキクケコサシスセソタ==0
 12737:   //     1 ................イウエオカキクケコサシスセソタ0 アイ*0ア Z=イウエオカキクケコサシスセソタ==0
 12738:   //     :
 12739:   //    15 ................タ000000000000000 ソタ*0ソ Z=タ==0
 12740:   //    16 ................0000000000000000 タ010タ
 12741:   //    17 ................0000000000000000 00100
 12742:   //  CCR
 12743:   //    X  countが0のとき変化しない。他は最後に押し出されたビット
 12744:   //    N  結果の最上位ビット
 12745:   //    Z  結果が0のときセット。他はクリア
 12746:   //    V  常にクリア
 12747:   //    C  countが0のときクリア。他は最後に押し出されたビット
 12748:   public static void irpLslToMem () throws M68kException {
 12749:     XEiJ.mpuCycleCount += 8;
 12750:     int ea = XEiJ.regOC & 63;
 12751:     int a = efaMltWord (ea);
 12752:     int x = XEiJ.busRws (a);
 12753:     int z = (short) (x << 1);
 12754:     XEiJ.busWw (a, z);
 12755:     XEiJ.regCCR = ((z < 0 ? XEiJ.REG_CCR_N : 0) |
 12756:                    (z == 0 ? XEiJ.REG_CCR_Z : 0) |
 12757:                    x >> 15 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C));  //XとCは最後に押し出されたビット
 12758:   }  //irpLslToMem
 12759: 
 12760:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12761:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 12762:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 12763:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12764:   //ROXR.W <ea>                                     |-|012346|-|*UUUU|***0*|  M+-WXZ  |1110_010_011_mmm_rrr
 12765:   //
 12766:   //ROXR.W #<data>,Dr
 12767:   //ROXR.W Dq,Dr
 12768:   //ROXR.W <ea>
 12769:   //  拡張右ローテートワード
 12770:   //       ................アイウエオカキクケコサシスセソタ XNZVC
 12771:   //     0 ................アイウエオカキクケコサシスセソタ Xア*0X Z=アイウエオカキクケコサシスセソタ==0
 12772:   //     1 ................Xアイウエオカキクケコサシスセソ タX*0タ Z=アイウエオカキクケコサシスセソX==0
 12773:   //     2 ................タXアイウエオカキクケコサシスセ ソタ*0ソ Z=アイウエオカキクケコサシスセタX==0
 12774:   //     :
 12775:   //    15 ................ウエオカキクケコサシスセソタXア イウ*0イ Z=アウエオカキクケコサシスセソタX==0
 12776:   //    16 ................イウエオカキクケコサシスセソタX アイ*0ア Z=イウエオカキクケコサシスセソタX==0
 12777:   //    17 ................アイウエオカキクケコサシスセソタ Xア*0X Z=アイウエオカキクケコサシスセソタ==0
 12778:   //  CCR
 12779:   //    X  countが0のとき変化しない。他は最後に押し出されたビット
 12780:   //    N  結果の最上位ビット
 12781:   //    Z  結果が0のときセット。他はクリア
 12782:   //    V  常にクリア
 12783:   //    C  countが0のときXのコピー。他は最後に押し出されたビット
 12784:   public static void irpRoxrToMem () throws M68kException {
 12785:     XEiJ.mpuCycleCount += 8;
 12786:     int ea = XEiJ.regOC & 63;
 12787:     int a = efaMltWord (ea);
 12788:     int x = XEiJ.busRwz (a);
 12789:     int z = -(XEiJ.regCCR & XEiJ.REG_CCR_X) << 15 - 4 | x >>> 1;
 12790:     XEiJ.busWw (a, z);
 12791:     XEiJ.regCCR = ((z < 0 ? XEiJ.REG_CCR_N : 0) |
 12792:                    (z == 0 ? XEiJ.REG_CCR_Z : 0) |
 12793:                    -(x & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C));  //XとCは最後に押し出されたビット
 12794:   }  //irpRoxrToMem
 12795: 
 12796:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12797:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 12798:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 12799:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12800:   //ROXL.W <ea>                                     |-|012346|-|*UUUU|***0*|  M+-WXZ  |1110_010_111_mmm_rrr
 12801:   //
 12802:   //ROXL.W #<data>,Dr
 12803:   //ROXL.W Dq,Dr
 12804:   //ROXL.W <ea>
 12805:   //  拡張左ローテートワード
 12806:   //       ................アイウエオカキクケコサシスセソタ XNZVC
 12807:   //     0 ................アイウエオカキクケコサシスセソタ Xア*0X Z=アイウエオカキクケコサシスセソタ==0
 12808:   //     1 ................イウエオカキクケコサシスセソタX アイ*0ア Z=イウエオカキクケコサシスセソタX==0
 12809:   //     2 ................ウエオカキクケコサシスセソタXア イウ*0イ Z=アウエオカキクケコサシスセソタX==0
 12810:   //     :
 12811:   //    15 ................タXアイウエオカキクケコサシスセ ソタ*0ソ Z=アイウエオカキクケコサシスセタX==0
 12812:   //    16 ................Xアイウエオカキクケコサシスセソ タX*0タ Z=アイウエオカキクケコサシスセソX==0
 12813:   //    17 ................アイウエオカキクケコサシスセソタ Xア*0X Z=アイウエオカキクケコサシスセソタ==0
 12814:   //  CCR
 12815:   //    X  countが0のとき変化しない。他は最後に押し出されたビット
 12816:   //    N  結果の最上位ビット
 12817:   //    Z  結果が0のときセット。他はクリア
 12818:   //    V  常にクリア
 12819:   //    C  countが0のときXのコピー。他は最後に押し出されたビット
 12820:   public static void irpRoxlToMem () throws M68kException {
 12821:     XEiJ.mpuCycleCount += 8;
 12822:     int ea = XEiJ.regOC & 63;
 12823:     int a = efaMltWord (ea);
 12824:     int x = XEiJ.busRws (a);
 12825:     int z = (short) (x << 1 | XEiJ.regCCR >> 4 & 1);
 12826:     XEiJ.busWw (a, z);
 12827:     XEiJ.regCCR = ((z < 0 ? XEiJ.REG_CCR_N : 0) |
 12828:                    (z == 0 ? XEiJ.REG_CCR_Z : 0) |
 12829:                    x >> 15 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C));  //XとCは最後に押し出されたビット
 12830:   }  //irpRoxlToMem
 12831: 
 12832:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12833:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 12834:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 12835:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12836:   //ROR.W <ea>                                      |-|012346|-|-UUUU|-**0*|  M+-WXZ  |1110_011_011_mmm_rrr
 12837:   //
 12838:   //ROR.W #<data>,Dr
 12839:   //ROR.W Dq,Dr
 12840:   //ROR.W <ea>
 12841:   //  右ローテートワード
 12842:   //       ................アイウエオカキクケコサシスセソタ XNZVC
 12843:   //     0 ................アイウエオカキクケコサシスセソタ Xア*00 Z=アイウエオカキクケコサシスセソタ==0
 12844:   //     1 ................タアイウエオカキクケコサシスセソ Xタ*0タ Z=アイウエオカキクケコサシスセソタ==0
 12845:   //     :
 12846:   //    15 ................イウエオカキクケコサシスセソタア Xイ*0イ Z=アイウエオカキクケコサシスセソタ==0
 12847:   //    16 ................アイウエオカキクケコサシスセソタ Xア*0ア Z=アイウエオカキクケコサシスセソタ==0
 12848:   //  CCR
 12849:   //    X  常に変化しない
 12850:   //    N  結果の最上位ビット
 12851:   //    Z  結果が0のときセット。他はクリア
 12852:   //    V  常にクリア
 12853:   //    C  countが0のときクリア。他は結果の最上位ビット
 12854:   public static void irpRorToMem () throws M68kException {
 12855:     XEiJ.mpuCycleCount += 8;
 12856:     int ea = XEiJ.regOC & 63;
 12857:     int a = efaMltWord (ea);
 12858:     int x = XEiJ.busRwz (a);
 12859:     int z = (short) (x << 15 | x >>> 1);
 12860:     XEiJ.busWw (a, z);
 12861:     XEiJ.regCCR = (XEiJ.regCCR & XEiJ.REG_CCR_X |  //Xは変化しない
 12862:                    (z < 0 ? XEiJ.REG_CCR_N : 0) |
 12863:                    (z == 0 ? XEiJ.REG_CCR_Z : 0) |
 12864:                    z >>> 31);  //Cは結果の最上位ビット
 12865:   }  //irpRorToMem
 12866: 
 12867:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12868:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 12869:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 12870:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12871:   //ROL.W <ea>                                      |-|012346|-|-UUUU|-**0*|  M+-WXZ  |1110_011_111_mmm_rrr
 12872:   //
 12873:   //ROL.W #<data>,Dr
 12874:   //ROL.W Dq,Dr
 12875:   //ROL.W <ea>
 12876:   //  左ローテートワード
 12877:   //       ................アイウエオカキクケコサシスセソタ XNZVC
 12878:   //     0 ................アイウエオカキクケコサシスセソタ Xア*00 Z=アイウエオカキクケコサシスセソタ==0
 12879:   //     1 ................イウエオカキクケコサシスセソタア Xイ*0ア Z=アイウエオカキクケコサシスセソタ==0
 12880:   //     :
 12881:   //    15 ................タアイウエオカキクケコサシスセソ Xタ*0ソ Z=アイウエオカキクケコサシスセソタ==0
 12882:   //    16 ................アイウエオカキクケコサシスセソタ Xア*0タ Z=アイウエオカキクケコサシスセソタ==0
 12883:   //  CCR
 12884:   //    X  常に変化しない
 12885:   //    N  結果の最上位ビット
 12886:   //    Z  結果が0のときセット。他はクリア
 12887:   //    V  常にクリア
 12888:   //    C  countが0のときクリア。他は結果の最下位ビット
 12889:   public static void irpRolToMem () throws M68kException {
 12890:     XEiJ.mpuCycleCount += 8;
 12891:     int ea = XEiJ.regOC & 63;
 12892:     int a = efaMltWord (ea);
 12893:     int x = XEiJ.busRwz (a);
 12894:     int z = (short) (x << 1 | x >>> 15);
 12895:     XEiJ.busWw (a, z);
 12896:     XEiJ.regCCR = (XEiJ.regCCR & XEiJ.REG_CCR_X |  //Xは変化しない
 12897:                    (z < 0 ? XEiJ.REG_CCR_N : 0) |
 12898:                    (z == 0 ? XEiJ.REG_CCR_Z : 0) |
 12899:                    z & 1);  //Cは結果の最下位ビット
 12900:   }  //irpRolToMem
 12901: 
 12902:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12903:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 12904:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 12905:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 12906:   //FPACK <data>                                    |A|012346|-|UUUUU|*****|          |1111_111_0dd_ddd_ddd [FLINE #<data>]
 12907:   public static void irpFpack () throws M68kException {
 12908:     if (!MainMemory.mmrFEfuncActivated) {
 12909:       irpFline ();
 12910:       return;
 12911:     }
 12912:     StringBuilder sb;
 12913:     int a0;
 12914:     if (FEFunction.FPK_DEBUG_TRACE) {
 12915:       sb = new StringBuilder ();
 12916:       String name = Disassembler.DIS_FPACK_NAME[XEiJ.regOC & 255];
 12917:       if (name.length () == 0) {
 12918:         XEiJ.fmtHex4 (sb.append ('$'), XEiJ.regOC);
 12919:       } else {
 12920:         sb.append (name);
 12921:       }
 12922:       sb.append ('\n');
 12923:       XEiJ.fmtHex8 (XEiJ.fmtHex8 (XEiJ.fmtHex8 (XEiJ.fmtHex8 (sb.append ("  D0="), XEiJ.regRn[0]).append (" D1="), XEiJ.regRn[1]).append (" D2="), XEiJ.regRn[2]).append (" D3="), XEiJ.regRn[3]);
 12924:       a0 = XEiJ.regRn[8];
 12925:       MainMemory.mmrRstr (sb.append (" (A0)=\""), a0, MainMemory.mmrStrlen (a0, 20)).append ("\"\n");
 12926:     }
 12927:     XEiJ.mpuCycleCount += FEFunction.FPK_CLOCK;  //一律にFEFunction.FPK_CLOCKサイクルかかることにする
 12928:     switch (XEiJ.regOC & 255) {
 12929:     case 0x00: FEFunction.fpkLMUL (); break;
 12930:     case 0x01: FEFunction.fpkLDIV (); break;
 12931:     case 0x02: FEFunction.fpkLMOD (); break;
 12932:       //case 0x03: break;
 12933:     case 0x04: FEFunction.fpkUMUL (); break;
 12934:     case 0x05: FEFunction.fpkUDIV (); break;
 12935:     case 0x06: FEFunction.fpkUMOD (); break;
 12936:       //case 0x07: break;
 12937:     case 0x08: FEFunction.fpkIMUL (); break;
 12938:     case 0x09: FEFunction.fpkIDIV (); break;
 12939:       //case 0x0a: break;
 12940:       //case 0x0b: break;
 12941:     case 0x0c: FEFunction.fpkRANDOMIZE (); break;
 12942:     case 0x0d: FEFunction.fpkSRAND (); break;
 12943:     case 0x0e: FEFunction.fpkRAND (); break;
 12944:       //case 0x0f: break;
 12945:     case 0x10: FEFunction.fpkSTOL (); break;
 12946:     case 0x11: FEFunction.fpkLTOS (); break;
 12947:     case 0x12: FEFunction.fpkSTOH (); break;
 12948:     case 0x13: FEFunction.fpkHTOS (); break;
 12949:     case 0x14: FEFunction.fpkSTOO (); break;
 12950:     case 0x15: FEFunction.fpkOTOS (); break;
 12951:     case 0x16: FEFunction.fpkSTOB (); break;
 12952:     case 0x17: FEFunction.fpkBTOS (); break;
 12953:     case 0x18: FEFunction.fpkIUSING (); break;
 12954:       //case 0x19: break;
 12955:     case 0x1a: FEFunction.fpkLTOD (); break;
 12956:     case 0x1b: FEFunction.fpkDTOL (); break;
 12957:     case 0x1c: FEFunction.fpkLTOF (); break;
 12958:     case 0x1d: FEFunction.fpkFTOL (); break;
 12959:     case 0x1e: FEFunction.fpkFTOD (); break;
 12960:     case 0x1f: FEFunction.fpkDTOF (); break;
 12961:     case 0x20: FEFunction.fpkVAL (); break;
 12962:     case 0x21: FEFunction.fpkUSING (); break;
 12963:     case 0x22: FEFunction.fpkSTOD (); break;
 12964:     case 0x23: FEFunction.fpkDTOS (); break;
 12965:     case 0x24: FEFunction.fpkECVT (); break;
 12966:     case 0x25: FEFunction.fpkFCVT (); break;
 12967:     case 0x26: FEFunction.fpkGCVT (); break;
 12968:       //case 0x27: break;
 12969:     case 0x28: FEFunction.fpkDTST (); break;
 12970:     case 0x29: FEFunction.fpkDCMP (); break;
 12971:     case 0x2a: FEFunction.fpkDNEG (); break;
 12972:     case 0x2b: FEFunction.fpkDADD (); break;
 12973:     case 0x2c: FEFunction.fpkDSUB (); break;
 12974:     case 0x2d: FEFunction.fpkDMUL (); break;
 12975:     case 0x2e: FEFunction.fpkDDIV (); break;
 12976:     case 0x2f: FEFunction.fpkDMOD (); break;
 12977:     case 0x30: FEFunction.fpkDABS (); break;
 12978:     case 0x31: FEFunction.fpkDCEIL (); break;
 12979:     case 0x32: FEFunction.fpkDFIX (); break;
 12980:     case 0x33: FEFunction.fpkDFLOOR (); break;
 12981:     case 0x34: FEFunction.fpkDFRAC (); break;
 12982:     case 0x35: FEFunction.fpkDSGN (); break;
 12983:     case 0x36: FEFunction.fpkSIN (); break;
 12984:     case 0x37: FEFunction.fpkCOS (); break;
 12985:     case 0x38: FEFunction.fpkTAN (); break;
 12986:     case 0x39: FEFunction.fpkATAN (); break;
 12987:     case 0x3a: FEFunction.fpkLOG (); break;
 12988:     case 0x3b: FEFunction.fpkEXP (); break;
 12989:     case 0x3c: FEFunction.fpkSQR (); break;
 12990:     case 0x3d: FEFunction.fpkPI (); break;
 12991:     case 0x3e: FEFunction.fpkNPI (); break;
 12992:     case 0x3f: FEFunction.fpkPOWER (); break;
 12993:     case 0x40: FEFunction.fpkRND (); break;
 12994:     case 0x41: FEFunction.fpkSINH (); break;
 12995:     case 0x42: FEFunction.fpkCOSH (); break;
 12996:     case 0x43: FEFunction.fpkTANH (); break;
 12997:     case 0x44: FEFunction.fpkATANH (); break;
 12998:     case 0x45: FEFunction.fpkASIN (); break;
 12999:     case 0x46: FEFunction.fpkACOS (); break;
 13000:     case 0x47: FEFunction.fpkLOG10 (); break;
 13001:     case 0x48: FEFunction.fpkLOG2 (); break;
 13002:     case 0x49: FEFunction.fpkDFREXP (); break;
 13003:     case 0x4a: FEFunction.fpkDLDEXP (); break;
 13004:     case 0x4b: FEFunction.fpkDADDONE (); break;
 13005:     case 0x4c: FEFunction.fpkDSUBONE (); break;
 13006:     case 0x4d: FEFunction.fpkDDIVTWO (); break;
 13007:     case 0x4e: FEFunction.fpkDIEECNV (); break;
 13008:     case 0x4f: FEFunction.fpkIEEDCNV (); break;
 13009:     case 0x50: FEFunction.fpkFVAL (); break;
 13010:     case 0x51: FEFunction.fpkFUSING (); break;
 13011:     case 0x52: FEFunction.fpkSTOF (); break;
 13012:     case 0x53: FEFunction.fpkFTOS (); break;
 13013:     case 0x54: FEFunction.fpkFECVT (); break;
 13014:     case 0x55: FEFunction.fpkFFCVT (); break;
 13015:     case 0x56: FEFunction.fpkFGCVT (); break;
 13016:       //case 0x57: break;
 13017:     case 0x58: FEFunction.fpkFTST (); break;
 13018:     case 0x59: FEFunction.fpkFCMP (); break;
 13019:     case 0x5a: FEFunction.fpkFNEG (); break;
 13020:     case 0x5b: FEFunction.fpkFADD (); break;
 13021:     case 0x5c: FEFunction.fpkFSUB (); break;
 13022:     case 0x5d: FEFunction.fpkFMUL (); break;
 13023:     case 0x5e: FEFunction.fpkFDIV (); break;
 13024:     case 0x5f: FEFunction.fpkFMOD (); break;
 13025:     case 0x60: FEFunction.fpkFABS (); break;
 13026:     case 0x61: FEFunction.fpkFCEIL (); break;
 13027:     case 0x62: FEFunction.fpkFFIX (); break;
 13028:     case 0x63: FEFunction.fpkFFLOOR (); break;
 13029:     case 0x64: FEFunction.fpkFFRAC (); break;
 13030:     case 0x65: FEFunction.fpkFSGN (); break;
 13031:     case 0x66: FEFunction.fpkFSIN (); break;
 13032:     case 0x67: FEFunction.fpkFCOS (); break;
 13033:     case 0x68: FEFunction.fpkFTAN (); break;
 13034:     case 0x69: FEFunction.fpkFATAN (); break;
 13035:     case 0x6a: FEFunction.fpkFLOG (); break;
 13036:     case 0x6b: FEFunction.fpkFEXP (); break;
 13037:     case 0x6c: FEFunction.fpkFSQR (); break;
 13038:     case 0x6d: FEFunction.fpkFPI (); break;
 13039:     case 0x6e: FEFunction.fpkFNPI (); break;
 13040:     case 0x6f: FEFunction.fpkFPOWER (); break;
 13041:     case 0x70: FEFunction.fpkFRND (); break;
 13042:     case 0x71: FEFunction.fpkFSINH (); break;
 13043:     case 0x72: FEFunction.fpkFCOSH (); break;
 13044:     case 0x73: FEFunction.fpkFTANH (); break;
 13045:     case 0x74: FEFunction.fpkFATANH (); break;
 13046:     case 0x75: FEFunction.fpkFASIN (); break;
 13047:     case 0x76: FEFunction.fpkFACOS (); break;
 13048:     case 0x77: FEFunction.fpkFLOG10 (); break;
 13049:     case 0x78: FEFunction.fpkFLOG2 (); break;
 13050:     case 0x79: FEFunction.fpkFFREXP (); break;
 13051:     case 0x7a: FEFunction.fpkFLDEXP (); break;
 13052:     case 0x7b: FEFunction.fpkFADDONE (); break;
 13053:     case 0x7c: FEFunction.fpkFSUBONE (); break;
 13054:     case 0x7d: FEFunction.fpkFDIVTWO (); break;
 13055:     case 0x7e: FEFunction.fpkFIEECNV (); break;
 13056:     case 0x7f: FEFunction.fpkIEEFCNV (); break;
 13057:       //case 0x80: break;
 13058:       //case 0x81: break;
 13059:       //case 0x82: break;
 13060:       //case 0x83: break;
 13061:       //case 0x84: break;
 13062:       //case 0x85: break;
 13063:       //case 0x86: break;
 13064:       //case 0x87: break;
 13065:       //case 0x88: break;
 13066:       //case 0x89: break;
 13067:       //case 0x8a: break;
 13068:       //case 0x8b: break;
 13069:       //case 0x8c: break;
 13070:       //case 0x8d: break;
 13071:       //case 0x8e: break;
 13072:       //case 0x8f: break;
 13073:       //case 0x90: break;
 13074:       //case 0x91: break;
 13075:       //case 0x92: break;
 13076:       //case 0x93: break;
 13077:       //case 0x94: break;
 13078:       //case 0x95: break;
 13079:       //case 0x96: break;
 13080:       //case 0x97: break;
 13081:       //case 0x98: break;
 13082:       //case 0x99: break;
 13083:       //case 0x9a: break;
 13084:       //case 0x9b: break;
 13085:       //case 0x9c: break;
 13086:       //case 0x9d: break;
 13087:       //case 0x9e: break;
 13088:       //case 0x9f: break;
 13089:       //case 0xa0: break;
 13090:       //case 0xa1: break;
 13091:       //case 0xa2: break;
 13092:       //case 0xa3: break;
 13093:       //case 0xa4: break;
 13094:       //case 0xa5: break;
 13095:       //case 0xa6: break;
 13096:       //case 0xa7: break;
 13097:       //case 0xa8: break;
 13098:       //case 0xa9: break;
 13099:       //case 0xaa: break;
 13100:       //case 0xab: break;
 13101:       //case 0xac: break;
 13102:       //case 0xad: break;
 13103:       //case 0xae: break;
 13104:       //case 0xaf: break;
 13105:       //case 0xb0: break;
 13106:       //case 0xb1: break;
 13107:       //case 0xb2: break;
 13108:       //case 0xb3: break;
 13109:       //case 0xb4: break;
 13110:       //case 0xb5: break;
 13111:       //case 0xb6: break;
 13112:       //case 0xb7: break;
 13113:       //case 0xb8: break;
 13114:       //case 0xb9: break;
 13115:       //case 0xba: break;
 13116:       //case 0xbb: break;
 13117:       //case 0xbc: break;
 13118:       //case 0xbd: break;
 13119:       //case 0xbe: break;
 13120:       //case 0xbf: break;
 13121:       //case 0xc0: break;
 13122:       //case 0xc1: break;
 13123:       //case 0xc2: break;
 13124:       //case 0xc3: break;
 13125:       //case 0xc4: break;
 13126:       //case 0xc5: break;
 13127:       //case 0xc6: break;
 13128:       //case 0xc7: break;
 13129:       //case 0xc8: break;
 13130:       //case 0xc9: break;
 13131:       //case 0xca: break;
 13132:       //case 0xcb: break;
 13133:       //case 0xcc: break;
 13134:       //case 0xcd: break;
 13135:       //case 0xce: break;
 13136:       //case 0xcf: break;
 13137:       //case 0xd0: break;
 13138:       //case 0xd1: break;
 13139:       //case 0xd2: break;
 13140:       //case 0xd3: break;
 13141:       //case 0xd4: break;
 13142:       //case 0xd5: break;
 13143:       //case 0xd6: break;
 13144:       //case 0xd7: break;
 13145:       //case 0xd8: break;
 13146:       //case 0xd9: break;
 13147:       //case 0xda: break;
 13148:       //case 0xdb: break;
 13149:       //case 0xdc: break;
 13150:       //case 0xdd: break;
 13151:       //case 0xde: break;
 13152:       //case 0xdf: break;
 13153:     case 0xe0: FEFunction.fpkCLMUL (); break;
 13154:     case 0xe1: FEFunction.fpkCLDIV (); break;
 13155:     case 0xe2: FEFunction.fpkCLMOD (); break;
 13156:     case 0xe3: FEFunction.fpkCUMUL (); break;
 13157:     case 0xe4: FEFunction.fpkCUDIV (); break;
 13158:     case 0xe5: FEFunction.fpkCUMOD (); break;
 13159:     case 0xe6: FEFunction.fpkCLTOD (); break;
 13160:     case 0xe7: FEFunction.fpkCDTOL (); break;
 13161:     case 0xe8: FEFunction.fpkCLTOF (); break;
 13162:     case 0xe9: FEFunction.fpkCFTOL (); break;
 13163:     case 0xea: FEFunction.fpkCFTOD (); break;
 13164:     case 0xeb: FEFunction.fpkCDTOF (); break;
 13165:     case 0xec: FEFunction.fpkCDCMP (); break;
 13166:     case 0xed: FEFunction.fpkCDADD (); break;
 13167:     case 0xee: FEFunction.fpkCDSUB (); break;
 13168:     case 0xef: FEFunction.fpkCDMUL (); break;
 13169:     case 0xf0: FEFunction.fpkCDDIV (); break;
 13170:     case 0xf1: FEFunction.fpkCDMOD (); break;
 13171:     case 0xf2: FEFunction.fpkCFCMP (); break;
 13172:     case 0xf3: FEFunction.fpkCFADD (); break;
 13173:     case 0xf4: FEFunction.fpkCFSUB (); break;
 13174:     case 0xf5: FEFunction.fpkCFMUL (); break;
 13175:     case 0xf6: FEFunction.fpkCFDIV (); break;
 13176:     case 0xf7: FEFunction.fpkCFMOD (); break;
 13177:     case 0xf8: FEFunction.fpkCDTST (); break;
 13178:     case 0xf9: FEFunction.fpkCFTST (); break;
 13179:     case 0xfa: FEFunction.fpkCDINC (); break;
 13180:     case 0xfb: FEFunction.fpkCFINC (); break;
 13181:     case 0xfc: FEFunction.fpkCDDEC (); break;
 13182:     case 0xfd: FEFunction.fpkCFDEC (); break;
 13183:     case 0xfe: FEFunction.fpkFEVARG (); break;
 13184:     //case 0xff: FEFunction.fpkFEVECS (); break;  //FLOATn.Xに処理させる
 13185:     default:
 13186:       XEiJ.mpuCycleCount -= FEFunction.FPK_CLOCK;  //戻す
 13187:       irpFline ();
 13188:     }
 13189:     if (FEFunction.FPK_DEBUG_TRACE) {
 13190:       int i = sb.length ();
 13191:       XEiJ.fmtHex8 (XEiJ.fmtHex8 (XEiJ.fmtHex8 (XEiJ.fmtHex8 (sb.append ("  D0="), XEiJ.regRn[0]).append (" D1="), XEiJ.regRn[1]).append (" D2="), XEiJ.regRn[2]).append (" D3="), XEiJ.regRn[3]);
 13192:       int l = MainMemory.mmrStrlen (a0, 20);
 13193:       sb.append (" (A0)=\"");
 13194:       i = sb.length () - i;
 13195:       MainMemory.mmrRstr (sb, a0, l).append ("\"\n");
 13196:       if (a0 <= XEiJ.regRn[8] && XEiJ.regRn[8] <= a0 + l) {
 13197:         for (i += sb.length () + XEiJ.regRn[8] - a0; sb.length () < i; ) {
 13198:           sb.append (' ');
 13199:         }
 13200:         sb.append ('^');
 13201:       }
 13202:       System.out.println (sb.toString ());
 13203:     }
 13204:   }  //irpFpack
 13205: 
 13206:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 13207:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 13208:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 13209:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 13210:   //DOS <data>                                      |A|012346|-|UUUUU|UUUUU|          |1111_111_1dd_ddd_ddd [FLINE #<data>]
 13211:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 13212:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 13213:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 13214:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 13215:   //FLINE #<data>                                   |-|012346|-|UUUUU|UUUUU|          |1111_ddd_ddd_ddd_ddd (line 1111 emulator)
 13216:   public static void irpFline () throws M68kException {
 13217:     XEiJ.mpuCycleCount += 34;
 13218:     if (XEiJ.MPU_INLINE_EXCEPTION) {
 13219:       int save_sr = XEiJ.regSRT1 | XEiJ.regSRS | XEiJ.regSRI | XEiJ.regCCR;
 13220:       int sp = XEiJ.regRn[15];
 13221:       XEiJ.regSRT1 = XEiJ.mpuTraceFlag = 0;  //srのTビットを消す
 13222:       if (XEiJ.regSRS == 0) {  //ユーザモードのとき
 13223:         XEiJ.regSRS = XEiJ.REG_SR_S;  //スーパーバイザモードへ移行する
 13224:         XEiJ.mpuUSP = sp;  //USPを保存
 13225:         sp = XEiJ.mpuISP;  //SSPを復元
 13226:         if (DataBreakPoint.DBP_ON) {
 13227:           DataBreakPoint.dbpMemoryMap = DataBreakPoint.dbpSuperMap;  //スーパーバイザメモリマップに切り替える
 13228:         } else {
 13229:           XEiJ.busMemoryMap = XEiJ.busSuperMap;  //スーパーバイザメモリマップに切り替える
 13230:         }
 13231:         if (InstructionBreakPoint.IBP_ON) {
 13232:           InstructionBreakPoint.ibpOp1MemoryMap = InstructionBreakPoint.ibpOp1SuperMap;
 13233:         }
 13234:       }
 13235:       XEiJ.regRn[15] = sp -= 6;
 13236:       XEiJ.busWl (sp + 2, XEiJ.regPC0);  //pushl。pcをプッシュする
 13237:       XEiJ.busWw (sp, save_sr);  //pushw。srをプッシュする
 13238:       irpSetPC (XEiJ.busRlsf (M68kException.M6E_LINE_1111_EMULATOR << 2));  //例外ベクタを取り出してジャンプする
 13239:     } else {
 13240:       irpException (M68kException.M6E_LINE_1111_EMULATOR, XEiJ.regPC0, XEiJ.regSRT1 | XEiJ.regSRS | XEiJ.regSRI | XEiJ.regCCR);  //pcは命令の先頭
 13241:     }
 13242:   }  //irpFline
 13243: 
 13244:   //irpIllegal ()
 13245:   //  オペコードの上位10bitで分類されなかった未実装命令
 13246:   //  0x4afcのILLEGAL命令はここには来ない
 13247:   public static void irpIllegal () throws M68kException {
 13248:     if (true) {
 13249:       XEiJ.mpuCycleCount += 34;
 13250:       M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION;
 13251:       throw M68kException.m6eSignal;
 13252:     }
 13253:   }  //irpIllegal
 13254: 
 13255:   //z = irpAbcd (x, y)
 13256:   //  ABCD
 13257:   public static int irpAbcd (int x, int y) {
 13258:     int c = XEiJ.regCCR >> 4;
 13259:     int t = (x & 0xff) + (y & 0xff) + c;  //仮の結果
 13260:     int z = t;  //結果
 13261:     if (0x0a <= (x & 0x0f) + (y & 0x0f) + c) {  //ハーフキャリー
 13262:       z += 0x10 - 0x0a;
 13263:     }
 13264:     //XとCはキャリーがあるときセット、さもなくばクリア
 13265:     if (0xa0 <= z) {  //キャリー
 13266:       z += 0x100 - 0xa0;
 13267:       XEiJ.regCCR |= XEiJ.REG_CCR_X | XEiJ.REG_CCR_C;
 13268:     } else {
 13269:       XEiJ.regCCR &= ~(XEiJ.REG_CCR_X | XEiJ.REG_CCR_C);
 13270:     }
 13271:     //Zは結果が0でないときクリア、さもなくば変化しない
 13272:     z &= 0xff;
 13273:     if (z != 0x00) {
 13274:       XEiJ.regCCR &= ~XEiJ.REG_CCR_Z;
 13275:     }
 13276:     if (true) {
 13277:       //000/030のときNは結果の最上位ビット
 13278:       if ((z & 0x80) != 0) {
 13279:         XEiJ.regCCR |= XEiJ.REG_CCR_N;
 13280:       } else {
 13281:         XEiJ.regCCR &= ~XEiJ.REG_CCR_N;
 13282:       }
 13283:       //000のときVは補正値の加算でオーバーフローしたときセット、さもなくばクリア
 13284:       int a = z - t;  //補正値
 13285:       if ((((t ^ z) & (a ^ z)) & 0x80) != 0) {
 13286:         XEiJ.regCCR |= XEiJ.REG_CCR_V;
 13287:       } else {
 13288:         XEiJ.regCCR &= ~XEiJ.REG_CCR_V;
 13289:       }
 13290:     } else if (false) {
 13291:       //000/030のときNは結果の最上位ビット
 13292:       if ((z & 0x80) != 0) {
 13293:         XEiJ.regCCR |= XEiJ.REG_CCR_N;
 13294:       } else {
 13295:         XEiJ.regCCR &= ~XEiJ.REG_CCR_N;
 13296:       }
 13297:       //030のときVはクリア
 13298:       XEiJ.regCCR &= ~XEiJ.REG_CCR_V;
 13299:     } else {
 13300:       //060のときNとVは変化しない
 13301:     }
 13302:     return z;
 13303:   }  //irpAbcd
 13304: 
 13305:   //z = irpSbcd (x, y)
 13306:   //  SBCD
 13307:   public static int irpSbcd (int x, int y) {
 13308:     int b = XEiJ.regCCR >> 4;
 13309:     int t = (x & 0xff) - (y & 0xff) - b;  //仮の結果
 13310:     int z = t;  //結果
 13311:     if ((x & 0x0f) - (y & 0x0f) - b < 0) {  //ハーフボロー
 13312:       z -= 0x10 - 0x0a;
 13313:     }
 13314:     //XとCはボローがあるときセット、さもなくばクリア
 13315:     if (z < 0) {  //ボロー
 13316:       if (t < 0) {
 13317:         z -= 0x100 - 0xa0;
 13318:       }
 13319:       XEiJ.regCCR |= XEiJ.REG_CCR_X | XEiJ.REG_CCR_C;
 13320:     } else {
 13321:       XEiJ.regCCR &= ~(XEiJ.REG_CCR_X | XEiJ.REG_CCR_C);
 13322:     }
 13323:     //Zは結果が0でないときクリア、さもなくば変化しない
 13324:     z &= 0xff;
 13325:     if (z != 0x00) {
 13326:       XEiJ.regCCR &= ~XEiJ.REG_CCR_Z;
 13327:     }
 13328:     if (true) {
 13329:       //000/030のときNは結果の最上位ビット
 13330:       if ((z & 0x80) != 0) {
 13331:         XEiJ.regCCR |= XEiJ.REG_CCR_N;
 13332:       } else {
 13333:         XEiJ.regCCR &= ~XEiJ.REG_CCR_N;
 13334:       }
 13335:       //000のときVは補正値の加算でオーバーフローしたときセット、さもなくばクリア
 13336:       int a = z - t;  //補正値
 13337:       if ((((t ^ z) & (a ^ z)) & 0x80) != 0) {
 13338:         XEiJ.regCCR |= XEiJ.REG_CCR_V;
 13339:       } else {
 13340:         XEiJ.regCCR &= ~XEiJ.REG_CCR_V;
 13341:       }
 13342:     } else if (false) {
 13343:       //000/030のときNは結果の最上位ビット
 13344:       if ((z & 0x80) != 0) {
 13345:         XEiJ.regCCR |= XEiJ.REG_CCR_N;
 13346:       } else {
 13347:         XEiJ.regCCR &= ~XEiJ.REG_CCR_N;
 13348:       }
 13349:       //030のときVはクリア
 13350:       XEiJ.regCCR &= ~XEiJ.REG_CCR_V;
 13351:     } else {
 13352:       //060のときNとVは変化しない
 13353:     }
 13354:     return z;
 13355:   }  //irpSbcd
 13356: 
 13357: 
 13358: 
 13359:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 13360:   //                                                | |  MPU | |CCin |CCout|addressing|     1st opcode         2nd opcode
 13361:   //                           A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb
 13362:   //------------------------------------------------+-+------+-+-----+-----+----------+-------------------------------------
 13363:   //HFSBOOT                                         |-|012346|-|-----|-----|          |0100_111_000_000_000
 13364:   //HFSINST                                         |-|012346|-|-----|-----|          |0100_111_000_000_001
 13365:   //HFSSTR                                          |-|012346|-|-----|-----|          |0100_111_000_000_010
 13366:   //HFSINT                                          |-|012346|-|-----|-----|          |0100_111_000_000_011
 13367:   //EMXNOP                                          |-|012346|-|-----|-----|          |0100_111_000_000_100
 13368:   //  エミュレータ拡張命令
 13369:   public static void irpEmx () throws M68kException {
 13370:     switch (XEiJ.regOC & 63) {
 13371:     case XEiJ.EMX_OPCODE_HFSBOOT & 63:
 13372:       XEiJ.mpuCycleCount += 40;
 13373:       if (HFS.hfsIPLBoot ()) {
 13374:         //JMP $6800.W
 13375:         irpSetPC (0x00006800);
 13376:       }
 13377:       break;
 13378:     case XEiJ.EMX_OPCODE_HFSINST & 63:
 13379:       XEiJ.mpuCycleCount += 40;
 13380:       HFS.hfsInstall ();
 13381:       break;
 13382:     case XEiJ.EMX_OPCODE_HFSSTR & 63:
 13383:       XEiJ.mpuCycleCount += 40;
 13384:       HFS.hfsStrategy ();
 13385:       break;
 13386:     case XEiJ.EMX_OPCODE_HFSINT & 63:
 13387:       XEiJ.mpuCycleCount += 40;
 13388:       //XEiJ.mpuClockTime += (int) (TMR_FREQ / 100000L);  //0.01ms
 13389:       if (HFS.hfsInterrupt ()) {
 13390:         //WAIT
 13391:         XEiJ.mpuTraceFlag = 0;  //トレース例外を発生させない
 13392:         XEiJ.regPC = XEiJ.regPC0;  //ループ
 13393:         XEiJ.mpuClockTime += XEiJ.TMR_FREQ * 4 / 1000000;  //4us。10MHzのとき40サイクル
 13394:         XEiJ.mpuLastNano += 4000L;
 13395:       }
 13396:       break;
 13397:     case XEiJ.EMX_OPCODE_EMXNOP & 63:
 13398:       XEiJ.mpuCycleCount += 40;
 13399:       XEiJ.emxNop ();
 13400:       break;
 13401:     case XEiJ.EMX_OPCODE_EMXWAIT & 63:
 13402:       WaitInstruction.execute ();  //待機命令を実行する
 13403:       break;
 13404:     default:
 13405:       XEiJ.mpuCycleCount += 34;
 13406:       M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION;
 13407:       throw M68kException.m6eSignal;
 13408:     }
 13409:   }  //irpEmx
 13410: 
 13411: 
 13412: 
 13413:   //irpSetPC (a)
 13414:   //  pcへデータを書き込む
 13415:   //  奇数のときはアドレスエラーが発生する
 13416:   public static void irpSetPC (int a) throws M68kException {
 13417:     if (XEiJ.TEST_BIT_0_SHIFT ? a << 31 - 0 < 0 : (a & 1) != 0) {
 13418:       M68kException.m6eNumber = M68kException.M6E_ADDRESS_ERROR;
 13419:       M68kException.m6eAddress = a;
 13420:       M68kException.m6eDirection = XEiJ.MPU_WR_READ;
 13421:       M68kException.m6eSize = XEiJ.MPU_SS_LONG;
 13422:       throw M68kException.m6eSignal;
 13423:     }
 13424:     if (BranchLog.BLG_ON) {
 13425:       BranchLog.blgJump (a);  //分岐ログに分岐レコードを追加する
 13426:     } else {
 13427:       XEiJ.regPC = a;
 13428:     }
 13429:   }  //irpSetPC
 13430: 
 13431:   //irpSetSR (newSr)
 13432:   //  srへデータを書き込む
 13433:   //  ori to sr/andi to sr/eori to sr/move to sr/stop/rteで使用される
 13434:   //  スーパーバイザモードになっていることを確認してから呼び出すこと
 13435:   //  rteではr[15]が指すアドレスからsrとpcを取り出してr[15]を更新してから呼び出すこと
 13436:   //  スーパーバイザモード→ユーザモードのときは移行のための処理を行う
 13437:   //  新しい割り込みマスクレベルよりも高い割り込み処理の終了をデバイスに通知する
 13438:   public static void irpSetSR (int newSr) {
 13439:     XEiJ.regSRT1 = XEiJ.REG_SR_T1 & newSr;
 13440:     if ((XEiJ.regSRS = XEiJ.REG_SR_S & newSr) == 0) {  //スーパーバイザモード→ユーザモード
 13441:       XEiJ.mpuISP = XEiJ.regRn[15];  //XEiJ.mpuISPを保存
 13442:       XEiJ.regRn[15] = XEiJ.mpuUSP;  //XEiJ.mpuUSPを復元
 13443:       if (DataBreakPoint.DBP_ON) {
 13444:         DataBreakPoint.dbpMemoryMap = DataBreakPoint.dbpUserMap;  //ユーザメモリマップに切り替える
 13445:       } else {
 13446:         XEiJ.busMemoryMap = XEiJ.busUserMap;  //ユーザメモリマップに切り替える
 13447:       }
 13448:       if (InstructionBreakPoint.IBP_ON) {
 13449:         InstructionBreakPoint.ibpOp1MemoryMap = InstructionBreakPoint.ibpOp1UserMap;
 13450:       }
 13451:     }
 13452:     int t = (XEiJ.mpuIMR = 0x7f >> ((XEiJ.regSRI = XEiJ.REG_SR_I & newSr) >> 8)) & XEiJ.mpuISR;  //XEiJ.mpuISRで1→0とするビット
 13453:     if (t != 0) {  //終了する割り込みがあるとき
 13454:       XEiJ.mpuISR ^= t;
 13455:       //デバイスに割り込み処理の終了を通知する
 13456:       if (t == XEiJ.MPU_MFP_INTERRUPT_MASK) {  //MFPのみ
 13457:         MC68901.mfpDone ();
 13458:       } else if (t == XEiJ.MPU_DMA_INTERRUPT_MASK) {  //DMAのみ
 13459:         HD63450.dmaDone ();
 13460:       } else if (t == XEiJ.MPU_SCC_INTERRUPT_MASK) {  //SCCのみ
 13461:         Z8530.sccDone ();
 13462:       } else if (t == XEiJ.MPU_IOI_INTERRUPT_MASK) {  //IOIのみ
 13463:         IOInterrupt.ioiDone ();
 13464:       } else if (t == XEiJ.MPU_EB2_INTERRUPT_MASK) {  //EB2のみ
 13465:         XEiJ.eb2Done ();
 13466:       } else {  //SYSのみまたは複数
 13467:         if (XEiJ.TEST_BIT_1_SHIFT ? t << 24 + XEiJ.MPU_MFP_INTERRUPT_LEVEL < 0 : (t & XEiJ.MPU_MFP_INTERRUPT_MASK) != 0) {
 13468:           MC68901.mfpDone ();
 13469:         }
 13470:         if (t << 24 + XEiJ.MPU_DMA_INTERRUPT_LEVEL < 0) {  //(t & XEiJ.MPU_DMA_INTERRUPT_MASK) != 0
 13471:           HD63450.dmaDone ();
 13472:         }
 13473:         if (XEiJ.TEST_BIT_2_SHIFT ? t << 24 + XEiJ.MPU_SCC_INTERRUPT_LEVEL < 0 : (t & XEiJ.MPU_SCC_INTERRUPT_MASK) != 0) {
 13474:           Z8530.sccDone ();
 13475:         }
 13476:         if (t << 24 + XEiJ.MPU_IOI_INTERRUPT_LEVEL < 0) {  //(t & XEiJ.MPU_IOI_INTERRUPT_MASK) != 0
 13477:           IOInterrupt.ioiDone ();
 13478:         }
 13479:         if (t << 24 + XEiJ.MPU_EB2_INTERRUPT_LEVEL < 0) {  //(t & XEiJ.MPU_EB2_INTERRUPT_MASK) != 0
 13480:           XEiJ.eb2Done ();
 13481:         }
 13482:         if (XEiJ.TEST_BIT_0_SHIFT ? t << 24 + XEiJ.MPU_SYS_INTERRUPT_LEVEL < 0 : (t & XEiJ.MPU_SYS_INTERRUPT_MASK) != 0) {
 13483:           XEiJ.sysDone ();
 13484:         }
 13485:       }
 13486:     }
 13487:     XEiJ.mpuIMR |= ~XEiJ.mpuISR & XEiJ.MPU_SYS_INTERRUPT_MASK;  //割り込みマスクレベルが7のときレベル7割り込みの処理中でなければレベル7割り込みを許可する
 13488:     XEiJ.regCCR = XEiJ.REG_CCR_MASK & newSr;
 13489:   }  //irpSetSR
 13490: 
 13491:   //irpInterrupt (vectorNumber, level)
 13492:   //  割り込み処理を開始する
 13493:   public static void irpInterrupt (int vectorNumber, int level) throws M68kException {
 13494:     if (XEiJ.regOC == 0b0100_111_001_110_010) {  //最後に実行した命令はSTOP命令
 13495:       XEiJ.regPC = XEiJ.regPC0 + 4;  //次の命令に進む
 13496:     }
 13497:     XEiJ.mpuClockTime += XEiJ.mpuModifiedUnit * 44;
 13498:     int save_sr = XEiJ.regSRT1 | XEiJ.regSRS | XEiJ.regSRI | XEiJ.regCCR;
 13499:     XEiJ.regSRI = level << 8;  //割り込みマスクを要求されたレベルに変更する
 13500:     XEiJ.mpuIMR = 0x7f >> level;
 13501:     XEiJ.mpuISR |= 0x80 >> level;
 13502:     int sp = XEiJ.regRn[15];
 13503:     XEiJ.regSRT1 = 0;  //srのTビットを消す
 13504:     if (XEiJ.regSRS == 0) {  //ユーザモードのとき
 13505:       XEiJ.regSRS = XEiJ.REG_SR_S;  //スーパーバイザモードへ移行する
 13506:       XEiJ.mpuUSP = sp;  //USPを保存
 13507:       sp = XEiJ.mpuISP;  //SSPを復元
 13508:       if (DataBreakPoint.DBP_ON) {
 13509:         DataBreakPoint.dbpMemoryMap = DataBreakPoint.dbpSuperMap;  //スーパーバイザメモリマップに切り替える
 13510:       } else {
 13511:         XEiJ.busMemoryMap = XEiJ.busSuperMap;  //スーパーバイザメモリマップに切り替える
 13512:       }
 13513:       if (InstructionBreakPoint.IBP_ON) {
 13514:         InstructionBreakPoint.ibpOp1MemoryMap = InstructionBreakPoint.ibpOp1SuperMap;
 13515:       }
 13516:     }
 13517:     XEiJ.regRn[15] = sp -= 6;
 13518:     XEiJ.busWl (sp + 2, XEiJ.regPC);  //pushl。pcをプッシュする
 13519:     XEiJ.busWw (sp, save_sr);  //pushw。srをプッシュする
 13520:     if (BranchLog.BLG_ON) {
 13521:       XEiJ.regPC0 = XEiJ.regPC;  //rteによる割り込み終了と同時に次の割り込みを受け付けたとき間でpc0を更新しないと2番目の分岐レコードの終了アドレスが1番目と同じになっておかしな分岐レコードができてしまう
 13522:     }
 13523:     irpSetPC (XEiJ.busRlsf (vectorNumber << 2));  //例外ベクタを取り出してジャンプする
 13524:   }  //irpInterrupt
 13525: 
 13526:   //irpException (vectorNumber, save_pc, save_sr)
 13527:   //  例外処理を開始する
 13528:   //  スタックへのプッシュ、ベクタの取り出し、ジャンプのいずれかでバスエラーまたはアドレスエラーが発生する場合がある
 13529:   public static void irpException (int vectorNumber, int save_pc, int save_sr) throws M68kException {
 13530:     int sp = XEiJ.regRn[15];
 13531:     XEiJ.regSRT1 = XEiJ.mpuTraceFlag = 0;  //srのTビットを消す
 13532:     if (XEiJ.regSRS == 0) {  //ユーザモードのとき
 13533:       XEiJ.regSRS = XEiJ.REG_SR_S;  //スーパーバイザモードへ移行する
 13534:       XEiJ.mpuUSP = sp;  //USPを保存
 13535:       sp = XEiJ.mpuISP;  //SSPを復元
 13536:       if (DataBreakPoint.DBP_ON) {
 13537:         DataBreakPoint.dbpMemoryMap = DataBreakPoint.dbpSuperMap;  //スーパーバイザメモリマップに切り替える
 13538:       } else {
 13539:         XEiJ.busMemoryMap = XEiJ.busSuperMap;  //スーパーバイザメモリマップに切り替える
 13540:       }
 13541:       if (InstructionBreakPoint.IBP_ON) {
 13542:         InstructionBreakPoint.ibpOp1MemoryMap = InstructionBreakPoint.ibpOp1SuperMap;
 13543:       }
 13544:     }
 13545:     XEiJ.regRn[15] = sp -= 6;
 13546:     XEiJ.busWl (sp + 2, save_pc);  //pushl。pcをプッシュする
 13547:     XEiJ.busWw (sp, save_sr);  //pushw。srをプッシュする
 13548:     irpSetPC (XEiJ.busRlsf (vectorNumber << 2));  //例外ベクタを取り出してジャンプする
 13549:   }  //irpException
 13550: 
 13551: 
 13552: 
 13553:   //a = efaAnyByte (ea)  //|  M+-WXZPI|
 13554:   //  任意のモードのバイトオペランドの実効アドレスを求める
 13555:   //  (A7)+と-(A7)はA7を奇偶に関わらず2変化させ、跨いだワードの上位バイト(アドレスの小さい方)を参照する
 13556:   //  #<data>はオペコードに続くワードの下位バイトを参照する。上位バイトは不定なので参照してはならない
 13557:   @SuppressWarnings ("fallthrough") public static int efaAnyByte (int ea) throws M68kException {
 13558:     int t, w;
 13559:     switch (ea) {
 13560:     case 0b010_000:  //(A0)
 13561:       if (XEiJ.EFA_SEPARATE_AR) {
 13562:         XEiJ.mpuCycleCount += 4;
 13563:         return XEiJ.regRn[ 8];
 13564:       }
 13565:       //fallthrough
 13566:     case 0b010_001:  //(A1)
 13567:       if (XEiJ.EFA_SEPARATE_AR) {
 13568:         XEiJ.mpuCycleCount += 4;
 13569:         return XEiJ.regRn[ 9];
 13570:       }
 13571:       //fallthrough
 13572:     case 0b010_010:  //(A2)
 13573:       if (XEiJ.EFA_SEPARATE_AR) {
 13574:         XEiJ.mpuCycleCount += 4;
 13575:         return XEiJ.regRn[10];
 13576:       }
 13577:       //fallthrough
 13578:     case 0b010_011:  //(A3)
 13579:       if (XEiJ.EFA_SEPARATE_AR) {
 13580:         XEiJ.mpuCycleCount += 4;
 13581:         return XEiJ.regRn[11];
 13582:       }
 13583:       //fallthrough
 13584:     case 0b010_100:  //(A4)
 13585:       if (XEiJ.EFA_SEPARATE_AR) {
 13586:         XEiJ.mpuCycleCount += 4;
 13587:         return XEiJ.regRn[12];
 13588:       }
 13589:       //fallthrough
 13590:     case 0b010_101:  //(A5)
 13591:       if (XEiJ.EFA_SEPARATE_AR) {
 13592:         XEiJ.mpuCycleCount += 4;
 13593:         return XEiJ.regRn[13];
 13594:       }
 13595:       //fallthrough
 13596:     case 0b010_110:  //(A6)
 13597:       if (XEiJ.EFA_SEPARATE_AR) {
 13598:         XEiJ.mpuCycleCount += 4;
 13599:         return XEiJ.regRn[14];
 13600:       }
 13601:       //fallthrough
 13602:     case 0b010_111:  //(A7)
 13603:       if (XEiJ.EFA_SEPARATE_AR) {
 13604:         XEiJ.mpuCycleCount += 4;
 13605:         return XEiJ.regRn[15];
 13606:       } else {
 13607:         XEiJ.mpuCycleCount += 4;
 13608:         return XEiJ.regRn[ea - (0b010_000 - 8)];
 13609:       }
 13610:     case 0b011_000:  //(A0)+
 13611:       if (XEiJ.EFA_SEPARATE_AR) {
 13612:         XEiJ.mpuCycleCount += 4;
 13613:         return XEiJ.regRn[ 8]++;
 13614:       }
 13615:       //fallthrough
 13616:     case 0b011_001:  //(A1)+
 13617:       if (XEiJ.EFA_SEPARATE_AR) {
 13618:         XEiJ.mpuCycleCount += 4;
 13619:         return XEiJ.regRn[ 9]++;
 13620:       }
 13621:       //fallthrough
 13622:     case 0b011_010:  //(A2)+
 13623:       if (XEiJ.EFA_SEPARATE_AR) {
 13624:         XEiJ.mpuCycleCount += 4;
 13625:         return XEiJ.regRn[10]++;
 13626:       }
 13627:       //fallthrough
 13628:     case 0b011_011:  //(A3)+
 13629:       if (XEiJ.EFA_SEPARATE_AR) {
 13630:         XEiJ.mpuCycleCount += 4;
 13631:         return XEiJ.regRn[11]++;
 13632:       }
 13633:       //fallthrough
 13634:     case 0b011_100:  //(A4)+
 13635:       if (XEiJ.EFA_SEPARATE_AR) {
 13636:         XEiJ.mpuCycleCount += 4;
 13637:         return XEiJ.regRn[12]++;
 13638:       }
 13639:       //fallthrough
 13640:     case 0b011_101:  //(A5)+
 13641:       if (XEiJ.EFA_SEPARATE_AR) {
 13642:         XEiJ.mpuCycleCount += 4;
 13643:         return XEiJ.regRn[13]++;
 13644:       }
 13645:       //fallthrough
 13646:     case 0b011_110:  //(A6)+
 13647:       if (XEiJ.EFA_SEPARATE_AR) {
 13648:         XEiJ.mpuCycleCount += 4;
 13649:         return XEiJ.regRn[14]++;
 13650:       } else {
 13651:         XEiJ.mpuCycleCount += 4;
 13652:         return XEiJ.regRn[ea - (0b011_000 - 8)]++;
 13653:       }
 13654:     case 0b011_111:  //(A7)+
 13655:       XEiJ.mpuCycleCount += 4;
 13656:       return (XEiJ.regRn[15] += 2) - 2;
 13657:     case 0b100_000:  //-(A0)
 13658:       if (XEiJ.EFA_SEPARATE_AR) {
 13659:         XEiJ.mpuCycleCount += 6;
 13660:         return --XEiJ.regRn[ 8];
 13661:       }
 13662:       //fallthrough
 13663:     case 0b100_001:  //-(A1)
 13664:       if (XEiJ.EFA_SEPARATE_AR) {
 13665:         XEiJ.mpuCycleCount += 6;
 13666:         return --XEiJ.regRn[ 9];
 13667:       }
 13668:       //fallthrough
 13669:     case 0b100_010:  //-(A2)
 13670:       if (XEiJ.EFA_SEPARATE_AR) {
 13671:         XEiJ.mpuCycleCount += 6;
 13672:         return --XEiJ.regRn[10];
 13673:       }
 13674:       //fallthrough
 13675:     case 0b100_011:  //-(A3)
 13676:       if (XEiJ.EFA_SEPARATE_AR) {
 13677:         XEiJ.mpuCycleCount += 6;
 13678:         return --XEiJ.regRn[11];
 13679:       }
 13680:       //fallthrough
 13681:     case 0b100_100:  //-(A4)
 13682:       if (XEiJ.EFA_SEPARATE_AR) {
 13683:         XEiJ.mpuCycleCount += 6;
 13684:         return --XEiJ.regRn[12];
 13685:       }
 13686:       //fallthrough
 13687:     case 0b100_101:  //-(A5)
 13688:       if (XEiJ.EFA_SEPARATE_AR) {
 13689:         XEiJ.mpuCycleCount += 6;
 13690:         return --XEiJ.regRn[13];
 13691:       }
 13692:       //fallthrough
 13693:     case 0b100_110:  //-(A6)
 13694:       if (XEiJ.EFA_SEPARATE_AR) {
 13695:         XEiJ.mpuCycleCount += 6;
 13696:         return --XEiJ.regRn[14];
 13697:       } else {
 13698:         XEiJ.mpuCycleCount += 6;
 13699:         return --XEiJ.regRn[ea - (0b100_000 - 8)];
 13700:       }
 13701:     case 0b100_111:  //-(A7)
 13702:       XEiJ.mpuCycleCount += 6;
 13703:       return XEiJ.regRn[15] -= 2;
 13704:     case 0b101_000:  //(d16,A0)
 13705:     case 0b101_001:  //(d16,A1)
 13706:     case 0b101_010:  //(d16,A2)
 13707:     case 0b101_011:  //(d16,A3)
 13708:     case 0b101_100:  //(d16,A4)
 13709:     case 0b101_101:  //(d16,A5)
 13710:     case 0b101_110:  //(d16,A6)
 13711:     case 0b101_111:  //(d16,A7)
 13712:       XEiJ.mpuCycleCount += 8;
 13713:       if (XEiJ.MPU_COMPOUND_POSTINCREMENT) {
 13714:         return (XEiJ.regRn[ea - (0b101_000 - 8)]  //ベースレジスタ
 13715:                 + XEiJ.busRwse ((XEiJ.regPC += 2) - 2));  //pcws。ワードディスプレースメント
 13716:       } else {
 13717:         t = XEiJ.regPC;
 13718:         XEiJ.regPC = t + 2;
 13719:         return (XEiJ.regRn[ea - (0b101_000 - 8)]  //ベースレジスタ
 13720:                 + XEiJ.busRwse (t));  //pcws。ワードディスプレースメント
 13721:       }
 13722:     case 0b110_000:  //(d8,A0,Rn.wl)
 13723:     case 0b110_001:  //(d8,A1,Rn.wl)
 13724:     case 0b110_010:  //(d8,A2,Rn.wl)
 13725:     case 0b110_011:  //(d8,A3,Rn.wl)
 13726:     case 0b110_100:  //(d8,A4,Rn.wl)
 13727:     case 0b110_101:  //(d8,A5,Rn.wl)
 13728:     case 0b110_110:  //(d8,A6,Rn.wl)
 13729:     case 0b110_111:  //(d8,A7,Rn.wl)
 13730:       XEiJ.mpuCycleCount += 10;
 13731:       if (XEiJ.MPU_COMPOUND_POSTINCREMENT) {
 13732:         w = XEiJ.busRwze ((XEiJ.regPC += 2) - 2);  //pcwz。拡張ワード
 13733:       } else {
 13734:         w = XEiJ.regPC;
 13735:         XEiJ.regPC = w + 2;
 13736:         w = XEiJ.busRwze (w);  //pcwz。拡張ワード
 13737:       }
 13738:       return (XEiJ.regRn[ea - (0b110_000 - 8)]  //ベースレジスタ
 13739:               + (byte) w  //バイトディスプレースメント
 13740:               + (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] :  //ワードインデックス
 13741:                  XEiJ.regRn[w >> 12]));  //ロングインデックス
 13742:     case 0b111_000:  //(xxx).W
 13743:       XEiJ.mpuCycleCount += 8;
 13744:       return XEiJ.busRwse ((XEiJ.regPC += 2) - 2);  //pcws
 13745:     case 0b111_001:  //(xxx).L
 13746:       XEiJ.mpuCycleCount += 12;
 13747:       return XEiJ.busRlse ((XEiJ.regPC += 4) - 4);  //pcls
 13748:     case 0b111_010:  //(d16,PC)
 13749:       XEiJ.mpuCycleCount += 8;
 13750:       t = XEiJ.regPC;
 13751:       XEiJ.regPC = t + 2;
 13752:       return (t  //ベースレジスタ
 13753:               + XEiJ.busRwse (t));  //pcws。ワードディスプレースメント
 13754:     case 0b111_011:  //(d8,PC,Rn.wl)
 13755:       XEiJ.mpuCycleCount += 10;
 13756:       t = XEiJ.regPC;
 13757:       XEiJ.regPC = t + 2;
 13758:       w = XEiJ.busRwze (t);  //pcwz。拡張ワード
 13759:       return (t  //ベースレジスタ
 13760:               + (byte) w  //バイトディスプレースメント
 13761:               + (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] :  //ワードインデックス
 13762:                  XEiJ.regRn[w >> 12]));  //ロングインデックス
 13763:     case 0b111_100:  //#<data>
 13764:       XEiJ.mpuCycleCount += 4;
 13765:       if (XEiJ.MPU_COMPOUND_POSTINCREMENT) {
 13766:         return (XEiJ.regPC += 2) - 1;  //下位バイト
 13767:       } else {
 13768:         t = XEiJ.regPC;
 13769:         XEiJ.regPC = t + 2;
 13770:         return t + 1;  //下位バイト
 13771:       }
 13772:     }  //switch
 13773:     XEiJ.mpuCycleCount += 34;
 13774:     M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION;
 13775:     throw M68kException.m6eSignal;
 13776:   }  //efaAnyByte
 13777: 
 13778:   //a = efaMemByte (ea)  //|  M+-WXZP |
 13779:   //  メモリモードのバイトオペランドの実効アドレスを求める
 13780:   //  efaAnyByteとの違いは#<data>がないこと
 13781:   @SuppressWarnings ("fallthrough") public static int efaMemByte (int ea) throws M68kException {
 13782:     int t, w;
 13783:     switch (ea) {
 13784:     case 0b010_000:  //(A0)
 13785:       if (XEiJ.EFA_SEPARATE_AR) {
 13786:         XEiJ.mpuCycleCount += 4;
 13787:         return XEiJ.regRn[ 8];
 13788:       }
 13789:       //fallthrough
 13790:     case 0b010_001:  //(A1)
 13791:       if (XEiJ.EFA_SEPARATE_AR) {
 13792:         XEiJ.mpuCycleCount += 4;
 13793:         return XEiJ.regRn[ 9];
 13794:       }
 13795:       //fallthrough
 13796:     case 0b010_010:  //(A2)
 13797:       if (XEiJ.EFA_SEPARATE_AR) {
 13798:         XEiJ.mpuCycleCount += 4;
 13799:         return XEiJ.regRn[10];
 13800:       }
 13801:       //fallthrough
 13802:     case 0b010_011:  //(A3)
 13803:       if (XEiJ.EFA_SEPARATE_AR) {
 13804:         XEiJ.mpuCycleCount += 4;
 13805:         return XEiJ.regRn[11];
 13806:       }
 13807:       //fallthrough
 13808:     case 0b010_100:  //(A4)
 13809:       if (XEiJ.EFA_SEPARATE_AR) {
 13810:         XEiJ.mpuCycleCount += 4;
 13811:         return XEiJ.regRn[12];
 13812:       }
 13813:       //fallthrough
 13814:     case 0b010_101:  //(A5)
 13815:       if (XEiJ.EFA_SEPARATE_AR) {
 13816:         XEiJ.mpuCycleCount += 4;
 13817:         return XEiJ.regRn[13];
 13818:       }
 13819:       //fallthrough
 13820:     case 0b010_110:  //(A6)
 13821:       if (XEiJ.EFA_SEPARATE_AR) {
 13822:         XEiJ.mpuCycleCount += 4;
 13823:         return XEiJ.regRn[14];
 13824:       }
 13825:       //fallthrough
 13826:     case 0b010_111:  //(A7)
 13827:       if (XEiJ.EFA_SEPARATE_AR) {
 13828:         XEiJ.mpuCycleCount += 4;
 13829:         return XEiJ.regRn[15];
 13830:       } else {
 13831:         XEiJ.mpuCycleCount += 4;
 13832:         return XEiJ.regRn[ea - (0b010_000 - 8)];
 13833:       }
 13834:     case 0b011_000:  //(A0)+
 13835:       if (XEiJ.EFA_SEPARATE_AR) {
 13836:         XEiJ.mpuCycleCount += 4;
 13837:         return XEiJ.regRn[ 8]++;
 13838:       }
 13839:       //fallthrough
 13840:     case 0b011_001:  //(A1)+
 13841:       if (XEiJ.EFA_SEPARATE_AR) {
 13842:         XEiJ.mpuCycleCount += 4;
 13843:         return XEiJ.regRn[ 9]++;
 13844:       }
 13845:       //fallthrough
 13846:     case 0b011_010:  //(A2)+
 13847:       if (XEiJ.EFA_SEPARATE_AR) {
 13848:         XEiJ.mpuCycleCount += 4;
 13849:         return XEiJ.regRn[10]++;
 13850:       }
 13851:       //fallthrough
 13852:     case 0b011_011:  //(A3)+
 13853:       if (XEiJ.EFA_SEPARATE_AR) {
 13854:         XEiJ.mpuCycleCount += 4;
 13855:         return XEiJ.regRn[11]++;
 13856:       }
 13857:       //fallthrough
 13858:     case 0b011_100:  //(A4)+
 13859:       if (XEiJ.EFA_SEPARATE_AR) {
 13860:         XEiJ.mpuCycleCount += 4;
 13861:         return XEiJ.regRn[12]++;
 13862:       }
 13863:       //fallthrough
 13864:     case 0b011_101:  //(A5)+
 13865:       if (XEiJ.EFA_SEPARATE_AR) {
 13866:         XEiJ.mpuCycleCount += 4;
 13867:         return XEiJ.regRn[13]++;
 13868:       }
 13869:       //fallthrough
 13870:     case 0b011_110:  //(A6)+
 13871:       if (XEiJ.EFA_SEPARATE_AR) {
 13872:         XEiJ.mpuCycleCount += 4;
 13873:         return XEiJ.regRn[14]++;
 13874:       } else {
 13875:         XEiJ.mpuCycleCount += 4;
 13876:         return XEiJ.regRn[ea - (0b011_000 - 8)]++;
 13877:       }
 13878:     case 0b011_111:  //(A7)+
 13879:       XEiJ.mpuCycleCount += 4;
 13880:       return (XEiJ.regRn[15] += 2) - 2;
 13881:     case 0b100_000:  //-(A0)
 13882:       if (XEiJ.EFA_SEPARATE_AR) {
 13883:         XEiJ.mpuCycleCount += 6;
 13884:         return --XEiJ.regRn[ 8];
 13885:       }
 13886:       //fallthrough
 13887:     case 0b100_001:  //-(A1)
 13888:       if (XEiJ.EFA_SEPARATE_AR) {
 13889:         XEiJ.mpuCycleCount += 6;
 13890:         return --XEiJ.regRn[ 9];
 13891:       }
 13892:       //fallthrough
 13893:     case 0b100_010:  //-(A2)
 13894:       if (XEiJ.EFA_SEPARATE_AR) {
 13895:         XEiJ.mpuCycleCount += 6;
 13896:         return --XEiJ.regRn[10];
 13897:       }
 13898:       //fallthrough
 13899:     case 0b100_011:  //-(A3)
 13900:       if (XEiJ.EFA_SEPARATE_AR) {
 13901:         XEiJ.mpuCycleCount += 6;
 13902:         return --XEiJ.regRn[11];
 13903:       }
 13904:       //fallthrough
 13905:     case 0b100_100:  //-(A4)
 13906:       if (XEiJ.EFA_SEPARATE_AR) {
 13907:         XEiJ.mpuCycleCount += 6;
 13908:         return --XEiJ.regRn[12];
 13909:       }
 13910:       //fallthrough
 13911:     case 0b100_101:  //-(A5)
 13912:       if (XEiJ.EFA_SEPARATE_AR) {
 13913:         XEiJ.mpuCycleCount += 6;
 13914:         return --XEiJ.regRn[13];
 13915:       }
 13916:       //fallthrough
 13917:     case 0b100_110:  //-(A6)
 13918:       if (XEiJ.EFA_SEPARATE_AR) {
 13919:         XEiJ.mpuCycleCount += 6;
 13920:         return --XEiJ.regRn[14];
 13921:       } else {
 13922:         XEiJ.mpuCycleCount += 6;
 13923:         return --XEiJ.regRn[ea - (0b100_000 - 8)];
 13924:       }
 13925:     case 0b100_111:  //-(A7)
 13926:       XEiJ.mpuCycleCount += 6;
 13927:       return XEiJ.regRn[15] -= 2;
 13928:     case 0b101_000:  //(d16,A0)
 13929:     case 0b101_001:  //(d16,A1)
 13930:     case 0b101_010:  //(d16,A2)
 13931:     case 0b101_011:  //(d16,A3)
 13932:     case 0b101_100:  //(d16,A4)
 13933:     case 0b101_101:  //(d16,A5)
 13934:     case 0b101_110:  //(d16,A6)
 13935:     case 0b101_111:  //(d16,A7)
 13936:       XEiJ.mpuCycleCount += 8;
 13937:       if (XEiJ.MPU_COMPOUND_POSTINCREMENT) {
 13938:         return (XEiJ.regRn[ea - (0b101_000 - 8)]  //ベースレジスタ
 13939:                 + XEiJ.busRwse ((XEiJ.regPC += 2) - 2));  //pcws。ワードディスプレースメント
 13940:       } else {
 13941:         t = XEiJ.regPC;
 13942:         XEiJ.regPC = t + 2;
 13943:         return (XEiJ.regRn[ea - (0b101_000 - 8)]  //ベースレジスタ
 13944:                 + XEiJ.busRwse (t));  //pcws。ワードディスプレースメント
 13945:       }
 13946:     case 0b110_000:  //(d8,A0,Rn.wl)
 13947:     case 0b110_001:  //(d8,A1,Rn.wl)
 13948:     case 0b110_010:  //(d8,A2,Rn.wl)
 13949:     case 0b110_011:  //(d8,A3,Rn.wl)
 13950:     case 0b110_100:  //(d8,A4,Rn.wl)
 13951:     case 0b110_101:  //(d8,A5,Rn.wl)
 13952:     case 0b110_110:  //(d8,A6,Rn.wl)
 13953:     case 0b110_111:  //(d8,A7,Rn.wl)
 13954:       XEiJ.mpuCycleCount += 10;
 13955:       if (XEiJ.MPU_COMPOUND_POSTINCREMENT) {
 13956:         w = XEiJ.busRwze ((XEiJ.regPC += 2) - 2);  //pcwz。拡張ワード
 13957:       } else {
 13958:         w = XEiJ.regPC;
 13959:         XEiJ.regPC = w + 2;
 13960:         w = XEiJ.busRwze (w);  //pcwz。拡張ワード
 13961:       }
 13962:       return (XEiJ.regRn[ea - (0b110_000 - 8)]  //ベースレジスタ
 13963:               + (byte) w  //バイトディスプレースメント
 13964:               + (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] :  //ワードインデックス
 13965:                  XEiJ.regRn[w >> 12]));  //ロングインデックス
 13966:     case 0b111_000:  //(xxx).W
 13967:       XEiJ.mpuCycleCount += 8;
 13968:       return XEiJ.busRwse ((XEiJ.regPC += 2) - 2);  //pcws
 13969:     case 0b111_001:  //(xxx).L
 13970:       XEiJ.mpuCycleCount += 12;
 13971:       return XEiJ.busRlse ((XEiJ.regPC += 4) - 4);  //pcls
 13972:     case 0b111_010:  //(d16,PC)
 13973:       XEiJ.mpuCycleCount += 8;
 13974:       t = XEiJ.regPC;
 13975:       XEiJ.regPC = t + 2;
 13976:       return (t  //ベースレジスタ
 13977:               + XEiJ.busRwse (t));  //pcws。ワードディスプレースメント
 13978:     case 0b111_011:  //(d8,PC,Rn.wl)
 13979:       XEiJ.mpuCycleCount += 10;
 13980:       t = XEiJ.regPC;
 13981:       XEiJ.regPC = t + 2;
 13982:       w = XEiJ.busRwze (t);  //pcwz。拡張ワード
 13983:       return (t  //ベースレジスタ
 13984:               + (byte) w  //バイトディスプレースメント
 13985:               + (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] :  //ワードインデックス
 13986:                  XEiJ.regRn[w >> 12]));  //ロングインデックス
 13987:     }  //switch
 13988:     XEiJ.mpuCycleCount += 34;
 13989:     M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION;
 13990:     throw M68kException.m6eSignal;
 13991:   }  //efaMemByte
 13992: 
 13993:   //a = efaMltByte (ea)  //|  M+-WXZ  |
 13994:   //  メモリ可変モードのバイトオペランドの実効アドレスを求める
 13995:   //  efaMemByteとの違いは(d16,PC)と(d8,PC,Rn.wl)がないこと
 13996:   @SuppressWarnings ("fallthrough") public static int efaMltByte (int ea) throws M68kException {
 13997:     int t, w;
 13998:     switch (ea) {
 13999:     case 0b010_000:  //(A0)
 14000:       if (XEiJ.EFA_SEPARATE_AR) {
 14001:         XEiJ.mpuCycleCount += 4;
 14002:         return XEiJ.regRn[ 8];
 14003:       }
 14004:       //fallthrough
 14005:     case 0b010_001:  //(A1)
 14006:       if (XEiJ.EFA_SEPARATE_AR) {
 14007:         XEiJ.mpuCycleCount += 4;
 14008:         return XEiJ.regRn[ 9];
 14009:       }
 14010:       //fallthrough
 14011:     case 0b010_010:  //(A2)
 14012:       if (XEiJ.EFA_SEPARATE_AR) {
 14013:         XEiJ.mpuCycleCount += 4;
 14014:         return XEiJ.regRn[10];
 14015:       }
 14016:       //fallthrough
 14017:     case 0b010_011:  //(A3)
 14018:       if (XEiJ.EFA_SEPARATE_AR) {
 14019:         XEiJ.mpuCycleCount += 4;
 14020:         return XEiJ.regRn[11];
 14021:       }
 14022:       //fallthrough
 14023:     case 0b010_100:  //(A4)
 14024:       if (XEiJ.EFA_SEPARATE_AR) {
 14025:         XEiJ.mpuCycleCount += 4;
 14026:         return XEiJ.regRn[12];
 14027:       }
 14028:       //fallthrough
 14029:     case 0b010_101:  //(A5)
 14030:       if (XEiJ.EFA_SEPARATE_AR) {
 14031:         XEiJ.mpuCycleCount += 4;
 14032:         return XEiJ.regRn[13];
 14033:       }
 14034:       //fallthrough
 14035:     case 0b010_110:  //(A6)
 14036:       if (XEiJ.EFA_SEPARATE_AR) {
 14037:         XEiJ.mpuCycleCount += 4;
 14038:         return XEiJ.regRn[14];
 14039:       }
 14040:       //fallthrough
 14041:     case 0b010_111:  //(A7)
 14042:       if (XEiJ.EFA_SEPARATE_AR) {
 14043:         XEiJ.mpuCycleCount += 4;
 14044:         return XEiJ.regRn[15];
 14045:       } else {
 14046:         XEiJ.mpuCycleCount += 4;
 14047:         return XEiJ.regRn[ea - (0b010_000 - 8)];
 14048:       }
 14049:     case 0b011_000:  //(A0)+
 14050:       if (XEiJ.EFA_SEPARATE_AR) {
 14051:         XEiJ.mpuCycleCount += 4;
 14052:         return XEiJ.regRn[ 8]++;
 14053:       }
 14054:       //fallthrough
 14055:     case 0b011_001:  //(A1)+
 14056:       if (XEiJ.EFA_SEPARATE_AR) {
 14057:         XEiJ.mpuCycleCount += 4;
 14058:         return XEiJ.regRn[ 9]++;
 14059:       }
 14060:       //fallthrough
 14061:     case 0b011_010:  //(A2)+
 14062:       if (XEiJ.EFA_SEPARATE_AR) {
 14063:         XEiJ.mpuCycleCount += 4;
 14064:         return XEiJ.regRn[10]++;
 14065:       }
 14066:       //fallthrough
 14067:     case 0b011_011:  //(A3)+
 14068:       if (XEiJ.EFA_SEPARATE_AR) {
 14069:         XEiJ.mpuCycleCount += 4;
 14070:         return XEiJ.regRn[11]++;
 14071:       }
 14072:       //fallthrough
 14073:     case 0b011_100:  //(A4)+
 14074:       if (XEiJ.EFA_SEPARATE_AR) {
 14075:         XEiJ.mpuCycleCount += 4;
 14076:         return XEiJ.regRn[12]++;
 14077:       }
 14078:       //fallthrough
 14079:     case 0b011_101:  //(A5)+
 14080:       if (XEiJ.EFA_SEPARATE_AR) {
 14081:         XEiJ.mpuCycleCount += 4;
 14082:         return XEiJ.regRn[13]++;
 14083:       }
 14084:       //fallthrough
 14085:     case 0b011_110:  //(A6)+
 14086:       if (XEiJ.EFA_SEPARATE_AR) {
 14087:         XEiJ.mpuCycleCount += 4;
 14088:         return XEiJ.regRn[14]++;
 14089:       } else {
 14090:         XEiJ.mpuCycleCount += 4;
 14091:         return XEiJ.regRn[ea - (0b011_000 - 8)]++;
 14092:       }
 14093:     case 0b011_111:  //(A7)+
 14094:       XEiJ.mpuCycleCount += 4;
 14095:       return (XEiJ.regRn[15] += 2) - 2;
 14096:     case 0b100_000:  //-(A0)
 14097:       if (XEiJ.EFA_SEPARATE_AR) {
 14098:         XEiJ.mpuCycleCount += 6;
 14099:         return --XEiJ.regRn[ 8];
 14100:       }
 14101:       //fallthrough
 14102:     case 0b100_001:  //-(A1)
 14103:       if (XEiJ.EFA_SEPARATE_AR) {
 14104:         XEiJ.mpuCycleCount += 6;
 14105:         return --XEiJ.regRn[ 9];
 14106:       }
 14107:       //fallthrough
 14108:     case 0b100_010:  //-(A2)
 14109:       if (XEiJ.EFA_SEPARATE_AR) {
 14110:         XEiJ.mpuCycleCount += 6;
 14111:         return --XEiJ.regRn[10];
 14112:       }
 14113:       //fallthrough
 14114:     case 0b100_011:  //-(A3)
 14115:       if (XEiJ.EFA_SEPARATE_AR) {
 14116:         XEiJ.mpuCycleCount += 6;
 14117:         return --XEiJ.regRn[11];
 14118:       }
 14119:       //fallthrough
 14120:     case 0b100_100:  //-(A4)
 14121:       if (XEiJ.EFA_SEPARATE_AR) {
 14122:         XEiJ.mpuCycleCount += 6;
 14123:         return --XEiJ.regRn[12];
 14124:       }
 14125:       //fallthrough
 14126:     case 0b100_101:  //-(A5)
 14127:       if (XEiJ.EFA_SEPARATE_AR) {
 14128:         XEiJ.mpuCycleCount += 6;
 14129:         return --XEiJ.regRn[13];
 14130:       }
 14131:       //fallthrough
 14132:     case 0b100_110:  //-(A6)
 14133:       if (XEiJ.EFA_SEPARATE_AR) {
 14134:         XEiJ.mpuCycleCount += 6;
 14135:         return --XEiJ.regRn[14];
 14136:       } else {
 14137:         XEiJ.mpuCycleCount += 6;
 14138:         return --XEiJ.regRn[ea - (0b100_000 - 8)];
 14139:       }
 14140:     case 0b100_111:  //-(A7)
 14141:       XEiJ.mpuCycleCount += 6;
 14142:       return XEiJ.regRn[15] -= 2;
 14143:     case 0b101_000:  //(d16,A0)
 14144:     case 0b101_001:  //(d16,A1)
 14145:     case 0b101_010:  //(d16,A2)
 14146:     case 0b101_011:  //(d16,A3)
 14147:     case 0b101_100:  //(d16,A4)
 14148:     case 0b101_101:  //(d16,A5)
 14149:     case 0b101_110:  //(d16,A6)
 14150:     case 0b101_111:  //(d16,A7)
 14151:       XEiJ.mpuCycleCount += 8;
 14152:       if (XEiJ.MPU_COMPOUND_POSTINCREMENT) {
 14153:         return (XEiJ.regRn[ea - (0b101_000 - 8)]  //ベースレジスタ
 14154:                 + XEiJ.busRwse ((XEiJ.regPC += 2) - 2));  //pcws。ワードディスプレースメント
 14155:       } else {
 14156:         t = XEiJ.regPC;
 14157:         XEiJ.regPC = t + 2;
 14158:         return (XEiJ.regRn[ea - (0b101_000 - 8)]  //ベースレジスタ
 14159:                 + XEiJ.busRwse (t));  //pcws。ワードディスプレースメント
 14160:       }
 14161:     case 0b110_000:  //(d8,A0,Rn.wl)
 14162:     case 0b110_001:  //(d8,A1,Rn.wl)
 14163:     case 0b110_010:  //(d8,A2,Rn.wl)
 14164:     case 0b110_011:  //(d8,A3,Rn.wl)
 14165:     case 0b110_100:  //(d8,A4,Rn.wl)
 14166:     case 0b110_101:  //(d8,A5,Rn.wl)
 14167:     case 0b110_110:  //(d8,A6,Rn.wl)
 14168:     case 0b110_111:  //(d8,A7,Rn.wl)
 14169:       XEiJ.mpuCycleCount += 10;
 14170:       if (XEiJ.MPU_COMPOUND_POSTINCREMENT) {
 14171:         w = XEiJ.busRwze ((XEiJ.regPC += 2) - 2);  //pcwz。拡張ワード
 14172:       } else {
 14173:         w = XEiJ.regPC;
 14174:         XEiJ.regPC = w + 2;
 14175:         w = XEiJ.busRwze (w);  //pcwz。拡張ワード
 14176:       }
 14177:       return (XEiJ.regRn[ea - (0b110_000 - 8)]  //ベースレジスタ
 14178:               + (byte) w  //バイトディスプレースメント
 14179:               + (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] :  //ワードインデックス
 14180:                  XEiJ.regRn[w >> 12]));  //ロングインデックス
 14181:     case 0b111_000:  //(xxx).W
 14182:       XEiJ.mpuCycleCount += 8;
 14183:       return XEiJ.busRwse ((XEiJ.regPC += 2) - 2);  //pcws
 14184:     case 0b111_001:  //(xxx).L
 14185:       XEiJ.mpuCycleCount += 12;
 14186:       return XEiJ.busRlse ((XEiJ.regPC += 4) - 4);  //pcls
 14187:     }  //switch
 14188:     XEiJ.mpuCycleCount += 34;
 14189:     M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION;
 14190:     throw M68kException.m6eSignal;
 14191:   }  //efaMltByte
 14192: 
 14193:   //a = efaCntByte (ea)  //|  M  WXZP |
 14194:   //  制御モードのロングオペランドの実効アドレスを求める
 14195:   //  efaMemByteとの違いは(Ar)+と-(Ar)がないこと
 14196:   @SuppressWarnings ("fallthrough") public static int efaCntByte (int ea) throws M68kException {
 14197:     int t, w;
 14198:     switch (ea) {
 14199:     case 0b010_000:  //(A0)
 14200:       if (XEiJ.EFA_SEPARATE_AR) {
 14201:         XEiJ.mpuCycleCount += 4;
 14202:         return XEiJ.regRn[ 8];
 14203:       }
 14204:       //fallthrough
 14205:     case 0b010_001:  //(A1)
 14206:       if (XEiJ.EFA_SEPARATE_AR) {
 14207:         XEiJ.mpuCycleCount += 4;
 14208:         return XEiJ.regRn[ 9];
 14209:       }
 14210:       //fallthrough
 14211:     case 0b010_010:  //(A2)
 14212:       if (XEiJ.EFA_SEPARATE_AR) {
 14213:         XEiJ.mpuCycleCount += 4;
 14214:         return XEiJ.regRn[10];
 14215:       }
 14216:       //fallthrough
 14217:     case 0b010_011:  //(A3)
 14218:       if (XEiJ.EFA_SEPARATE_AR) {
 14219:         XEiJ.mpuCycleCount += 4;
 14220:         return XEiJ.regRn[11];
 14221:       }
 14222:       //fallthrough
 14223:     case 0b010_100:  //(A4)
 14224:       if (XEiJ.EFA_SEPARATE_AR) {
 14225:         XEiJ.mpuCycleCount += 4;
 14226:         return XEiJ.regRn[12];
 14227:       }
 14228:       //fallthrough
 14229:     case 0b010_101:  //(A5)
 14230:       if (XEiJ.EFA_SEPARATE_AR) {
 14231:         XEiJ.mpuCycleCount += 4;
 14232:         return XEiJ.regRn[13];
 14233:       }
 14234:       //fallthrough
 14235:     case 0b010_110:  //(A6)
 14236:       if (XEiJ.EFA_SEPARATE_AR) {
 14237:         XEiJ.mpuCycleCount += 4;
 14238:         return XEiJ.regRn[14];
 14239:       }
 14240:       //fallthrough
 14241:     case 0b010_111:  //(A7)
 14242:       if (XEiJ.EFA_SEPARATE_AR) {
 14243:         XEiJ.mpuCycleCount += 4;
 14244:         return XEiJ.regRn[15];
 14245:       } else {
 14246:         XEiJ.mpuCycleCount += 4;
 14247:         return XEiJ.regRn[ea - (0b010_000 - 8)];
 14248:       }
 14249:     case 0b101_000:  //(d16,A0)
 14250:     case 0b101_001:  //(d16,A1)
 14251:     case 0b101_010:  //(d16,A2)
 14252:     case 0b101_011:  //(d16,A3)
 14253:     case 0b101_100:  //(d16,A4)
 14254:     case 0b101_101:  //(d16,A5)
 14255:     case 0b101_110:  //(d16,A6)
 14256:     case 0b101_111:  //(d16,A7)
 14257:       XEiJ.mpuCycleCount += 8;
 14258:       if (XEiJ.MPU_COMPOUND_POSTINCREMENT) {
 14259:         return (XEiJ.regRn[ea - (0b101_000 - 8)]  //ベースレジスタ
 14260:                 + XEiJ.busRwse ((XEiJ.regPC += 2) - 2));  //pcws。ワードディスプレースメント
 14261:       } else {
 14262:         t = XEiJ.regPC;
 14263:         XEiJ.regPC = t + 2;
 14264:         return (XEiJ.regRn[ea - (0b101_000 - 8)]  //ベースレジスタ
 14265:                 + XEiJ.busRwse (t));  //pcws。ワードディスプレースメント
 14266:       }
 14267:     case 0b110_000:  //(d8,A0,Rn.wl)
 14268:     case 0b110_001:  //(d8,A1,Rn.wl)
 14269:     case 0b110_010:  //(d8,A2,Rn.wl)
 14270:     case 0b110_011:  //(d8,A3,Rn.wl)
 14271:     case 0b110_100:  //(d8,A4,Rn.wl)
 14272:     case 0b110_101:  //(d8,A5,Rn.wl)
 14273:     case 0b110_110:  //(d8,A6,Rn.wl)
 14274:     case 0b110_111:  //(d8,A7,Rn.wl)
 14275:       XEiJ.mpuCycleCount += 10;
 14276:       if (XEiJ.MPU_COMPOUND_POSTINCREMENT) {
 14277:         w = XEiJ.busRwze ((XEiJ.regPC += 2) - 2);  //pcwz。拡張ワード
 14278:       } else {
 14279:         w = XEiJ.regPC;
 14280:         XEiJ.regPC = w + 2;
 14281:         w = XEiJ.busRwze (w);  //pcwz。拡張ワード
 14282:       }
 14283:       return (XEiJ.regRn[ea - (0b110_000 - 8)]  //ベースレジスタ
 14284:               + (byte) w  //バイトディスプレースメント
 14285:               + (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] :  //ワードインデックス
 14286:                  XEiJ.regRn[w >> 12]));  //ロングインデックス
 14287:     case 0b111_000:  //(xxx).W
 14288:       XEiJ.mpuCycleCount += 8;
 14289:       return XEiJ.busRwse ((XEiJ.regPC += 2) - 2);  //pcws
 14290:     case 0b111_001:  //(xxx).L
 14291:       XEiJ.mpuCycleCount += 12;
 14292:       return XEiJ.busRlse ((XEiJ.regPC += 4) - 4);  //pcls
 14293:     case 0b111_010:  //(d16,PC)
 14294:       XEiJ.mpuCycleCount += 8;
 14295:       t = XEiJ.regPC;
 14296:       XEiJ.regPC = t + 2;
 14297:       return (t  //ベースレジスタ
 14298:               + XEiJ.busRwse (t));  //pcws。ワードディスプレースメント
 14299:     case 0b111_011:  //(d8,PC,Rn.wl)
 14300:       XEiJ.mpuCycleCount += 10;
 14301:       t = XEiJ.regPC;
 14302:       XEiJ.regPC = t + 2;
 14303:       w = XEiJ.busRwze (t);  //pcwz。拡張ワード
 14304:       return (t  //ベースレジスタ
 14305:               + (byte) w  //バイトディスプレースメント
 14306:               + (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] :  //ワードインデックス
 14307:                  XEiJ.regRn[w >> 12]));  //ロングインデックス
 14308:     }  //switch
 14309:     XEiJ.mpuCycleCount += 34;
 14310:     M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION;
 14311:     throw M68kException.m6eSignal;
 14312:   }  //efaCntByte
 14313: 
 14314:   //a = efaAnyWord (ea)  //|  M+-WXZPI|
 14315:   //  任意のモードのワードオペランドの実効アドレスを求める
 14316:   //  efaAnyByteとの違いは(Ar)+と-(Ar)がArを2変化させることと、(A7)+と-(A7)と#<data>の特別な動作がないこと
 14317:   @SuppressWarnings ("fallthrough") public static int efaAnyWord (int ea) throws M68kException {
 14318:     int t, w;
 14319:     switch (ea) {
 14320:     case 0b010_000:  //(A0)
 14321:       if (XEiJ.EFA_SEPARATE_AR) {
 14322:         XEiJ.mpuCycleCount += 4;
 14323:         return XEiJ.regRn[ 8];
 14324:       }
 14325:       //fallthrough
 14326:     case 0b010_001:  //(A1)
 14327:       if (XEiJ.EFA_SEPARATE_AR) {
 14328:         XEiJ.mpuCycleCount += 4;
 14329:         return XEiJ.regRn[ 9];
 14330:       }
 14331:       //fallthrough
 14332:     case 0b010_010:  //(A2)
 14333:       if (XEiJ.EFA_SEPARATE_AR) {
 14334:         XEiJ.mpuCycleCount += 4;
 14335:         return XEiJ.regRn[10];
 14336:       }
 14337:       //fallthrough
 14338:     case 0b010_011:  //(A3)
 14339:       if (XEiJ.EFA_SEPARATE_AR) {
 14340:         XEiJ.mpuCycleCount += 4;
 14341:         return XEiJ.regRn[11];
 14342:       }
 14343:       //fallthrough
 14344:     case 0b010_100:  //(A4)
 14345:       if (XEiJ.EFA_SEPARATE_AR) {
 14346:         XEiJ.mpuCycleCount += 4;
 14347:         return XEiJ.regRn[12];
 14348:       }
 14349:       //fallthrough
 14350:     case 0b010_101:  //(A5)
 14351:       if (XEiJ.EFA_SEPARATE_AR) {
 14352:         XEiJ.mpuCycleCount += 4;
 14353:         return XEiJ.regRn[13];
 14354:       }
 14355:       //fallthrough
 14356:     case 0b010_110:  //(A6)
 14357:       if (XEiJ.EFA_SEPARATE_AR) {
 14358:         XEiJ.mpuCycleCount += 4;
 14359:         return XEiJ.regRn[14];
 14360:       }
 14361:       //fallthrough
 14362:     case 0b010_111:  //(A7)
 14363:       if (XEiJ.EFA_SEPARATE_AR) {
 14364:         XEiJ.mpuCycleCount += 4;
 14365:         return XEiJ.regRn[15];
 14366:       } else {
 14367:         XEiJ.mpuCycleCount += 4;
 14368:         return XEiJ.regRn[ea - (0b010_000 - 8)];
 14369:       }
 14370:     case 0b011_000:  //(A0)+
 14371:       if (XEiJ.EFA_SEPARATE_AR) {
 14372:         XEiJ.mpuCycleCount += 4;
 14373:         return (XEiJ.regRn[ 8] += 2) - 2;
 14374:       }
 14375:       //fallthrough
 14376:     case 0b011_001:  //(A1)+
 14377:       if (XEiJ.EFA_SEPARATE_AR) {
 14378:         XEiJ.mpuCycleCount += 4;
 14379:         return (XEiJ.regRn[ 9] += 2) - 2;
 14380:       }
 14381:       //fallthrough
 14382:     case 0b011_010:  //(A2)+
 14383:       if (XEiJ.EFA_SEPARATE_AR) {
 14384:         XEiJ.mpuCycleCount += 4;
 14385:         return (XEiJ.regRn[10] += 2) - 2;
 14386:       }
 14387:       //fallthrough
 14388:     case 0b011_011:  //(A3)+
 14389:       if (XEiJ.EFA_SEPARATE_AR) {
 14390:         XEiJ.mpuCycleCount += 4;
 14391:         return (XEiJ.regRn[11] += 2) - 2;
 14392:       }
 14393:       //fallthrough
 14394:     case 0b011_100:  //(A4)+
 14395:       if (XEiJ.EFA_SEPARATE_AR) {
 14396:         XEiJ.mpuCycleCount += 4;
 14397:         return (XEiJ.regRn[12] += 2) - 2;
 14398:       }
 14399:       //fallthrough
 14400:     case 0b011_101:  //(A5)+
 14401:       if (XEiJ.EFA_SEPARATE_AR) {
 14402:         XEiJ.mpuCycleCount += 4;
 14403:         return (XEiJ.regRn[13] += 2) - 2;
 14404:       }
 14405:       //fallthrough
 14406:     case 0b011_110:  //(A6)+
 14407:       if (XEiJ.EFA_SEPARATE_AR) {
 14408:         XEiJ.mpuCycleCount += 4;
 14409:         return (XEiJ.regRn[14] += 2) - 2;
 14410:       }
 14411:       //fallthrough
 14412:     case 0b011_111:  //(A7)+
 14413:       if (XEiJ.EFA_SEPARATE_AR) {
 14414:         XEiJ.mpuCycleCount += 4;
 14415:         return (XEiJ.regRn[15] += 2) - 2;
 14416:       } else {
 14417:         XEiJ.mpuCycleCount += 4;
 14418:         return (XEiJ.regRn[ea - (0b011_000 - 8)] += 2) - 2;
 14419:       }
 14420:     case 0b100_000:  //-(A0)
 14421:       if (XEiJ.EFA_SEPARATE_AR) {
 14422:         XEiJ.mpuCycleCount += 6;
 14423:         return XEiJ.regRn[ 8] -= 2;
 14424:       }
 14425:       //fallthrough
 14426:     case 0b100_001:  //-(A1)
 14427:       if (XEiJ.EFA_SEPARATE_AR) {
 14428:         XEiJ.mpuCycleCount += 6;
 14429:         return XEiJ.regRn[ 9] -= 2;
 14430:       }
 14431:       //fallthrough
 14432:     case 0b100_010:  //-(A2)
 14433:       if (XEiJ.EFA_SEPARATE_AR) {
 14434:         XEiJ.mpuCycleCount += 6;
 14435:         return XEiJ.regRn[10] -= 2;
 14436:       }
 14437:       //fallthrough
 14438:     case 0b100_011:  //-(A3)
 14439:       if (XEiJ.EFA_SEPARATE_AR) {
 14440:         XEiJ.mpuCycleCount += 6;
 14441:         return XEiJ.regRn[11] -= 2;
 14442:       }
 14443:       //fallthrough
 14444:     case 0b100_100:  //-(A4)
 14445:       if (XEiJ.EFA_SEPARATE_AR) {
 14446:         XEiJ.mpuCycleCount += 6;
 14447:         return XEiJ.regRn[12] -= 2;
 14448:       }
 14449:       //fallthrough
 14450:     case 0b100_101:  //-(A5)
 14451:       if (XEiJ.EFA_SEPARATE_AR) {
 14452:         XEiJ.mpuCycleCount += 6;
 14453:         return XEiJ.regRn[13] -= 2;
 14454:       }
 14455:       //fallthrough
 14456:     case 0b100_110:  //-(A6)
 14457:       if (XEiJ.EFA_SEPARATE_AR) {
 14458:         XEiJ.mpuCycleCount += 6;
 14459:         return XEiJ.regRn[14] -= 2;
 14460:       }
 14461:       //fallthrough
 14462:     case 0b100_111:  //-(A7)
 14463:       if (XEiJ.EFA_SEPARATE_AR) {
 14464:         XEiJ.mpuCycleCount += 6;
 14465:         return XEiJ.regRn[15] -= 2;
 14466:       } else {
 14467:         XEiJ.mpuCycleCount += 6;
 14468:         return XEiJ.regRn[ea - (0b100_000 - 8)] -= 2;
 14469:       }
 14470:     case 0b101_000:  //(d16,A0)
 14471:     case 0b101_001:  //(d16,A1)
 14472:     case 0b101_010:  //(d16,A2)
 14473:     case 0b101_011:  //(d16,A3)
 14474:     case 0b101_100:  //(d16,A4)
 14475:     case 0b101_101:  //(d16,A5)
 14476:     case 0b101_110:  //(d16,A6)
 14477:     case 0b101_111:  //(d16,A7)
 14478:       XEiJ.mpuCycleCount += 8;
 14479:       if (XEiJ.MPU_COMPOUND_POSTINCREMENT) {
 14480:         return (XEiJ.regRn[ea - (0b101_000 - 8)]  //ベースレジスタ
 14481:                 + XEiJ.busRwse ((XEiJ.regPC += 2) - 2));  //pcws。ワードディスプレースメント
 14482:       } else {
 14483:         t = XEiJ.regPC;
 14484:         XEiJ.regPC = t + 2;
 14485:         return (XEiJ.regRn[ea - (0b101_000 - 8)]  //ベースレジスタ
 14486:                 + XEiJ.busRwse (t));  //pcws。ワードディスプレースメント
 14487:       }
 14488:     case 0b110_000:  //(d8,A0,Rn.wl)
 14489:     case 0b110_001:  //(d8,A1,Rn.wl)
 14490:     case 0b110_010:  //(d8,A2,Rn.wl)
 14491:     case 0b110_011:  //(d8,A3,Rn.wl)
 14492:     case 0b110_100:  //(d8,A4,Rn.wl)
 14493:     case 0b110_101:  //(d8,A5,Rn.wl)
 14494:     case 0b110_110:  //(d8,A6,Rn.wl)
 14495:     case 0b110_111:  //(d8,A7,Rn.wl)
 14496:       XEiJ.mpuCycleCount += 10;
 14497:       if (XEiJ.MPU_COMPOUND_POSTINCREMENT) {
 14498:         w = XEiJ.busRwze ((XEiJ.regPC += 2) - 2);  //pcwz。拡張ワード
 14499:       } else {
 14500:         w = XEiJ.regPC;
 14501:         XEiJ.regPC = w + 2;
 14502:         w = XEiJ.busRwze (w);  //pcwz。拡張ワード
 14503:       }
 14504:       return (XEiJ.regRn[ea - (0b110_000 - 8)]  //ベースレジスタ
 14505:               + (byte) w  //バイトディスプレースメント
 14506:               + (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] :  //ワードインデックス
 14507:                  XEiJ.regRn[w >> 12]));  //ロングインデックス
 14508:     case 0b111_000:  //(xxx).W
 14509:       XEiJ.mpuCycleCount += 8;
 14510:       return XEiJ.busRwse ((XEiJ.regPC += 2) - 2);  //pcws
 14511:     case 0b111_001:  //(xxx).L
 14512:       XEiJ.mpuCycleCount += 12;
 14513:       return XEiJ.busRlse ((XEiJ.regPC += 4) - 4);  //pcls
 14514:     case 0b111_010:  //(d16,PC)
 14515:       XEiJ.mpuCycleCount += 8;
 14516:       t = XEiJ.regPC;
 14517:       XEiJ.regPC = t + 2;
 14518:       return (t  //ベースレジスタ
 14519:               + XEiJ.busRwse (t));  //pcws。ワードディスプレースメント
 14520:     case 0b111_011:  //(d8,PC,Rn.wl)
 14521:       XEiJ.mpuCycleCount += 10;
 14522:       t = XEiJ.regPC;
 14523:       XEiJ.regPC = t + 2;
 14524:       w = XEiJ.busRwze (t);  //pcwz。拡張ワード
 14525:       return (t  //ベースレジスタ
 14526:               + (byte) w  //バイトディスプレースメント
 14527:               + (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] :  //ワードインデックス
 14528:                  XEiJ.regRn[w >> 12]));  //ロングインデックス
 14529:     case 0b111_100:  //#<data>
 14530:       XEiJ.mpuCycleCount += 4;
 14531:       if (XEiJ.MPU_COMPOUND_POSTINCREMENT) {
 14532:         return (XEiJ.regPC += 2) - 2;
 14533:       } else {
 14534:         t = XEiJ.regPC;
 14535:         XEiJ.regPC = t + 2;
 14536:         return t;
 14537:       }
 14538:     }  //switch
 14539:     XEiJ.mpuCycleCount += 34;
 14540:     M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION;
 14541:     throw M68kException.m6eSignal;
 14542:   }  //efaAnyWord
 14543: 
 14544:   //a = efaMemWord (ea)  //|  M+-WXZP |
 14545:   //  メモリモードのワードオペランドの実効アドレスを求める
 14546:   //  efaAnyWordとの違いは#<data>がないこと
 14547:   @SuppressWarnings ("fallthrough") public static int efaMemWord (int ea) throws M68kException {
 14548:     int t, w;
 14549:     switch (ea) {
 14550:     case 0b010_000:  //(A0)
 14551:       if (XEiJ.EFA_SEPARATE_AR) {
 14552:         XEiJ.mpuCycleCount += 4;
 14553:         return XEiJ.regRn[ 8];
 14554:       }
 14555:       //fallthrough
 14556:     case 0b010_001:  //(A1)
 14557:       if (XEiJ.EFA_SEPARATE_AR) {
 14558:         XEiJ.mpuCycleCount += 4;
 14559:         return XEiJ.regRn[ 9];
 14560:       }
 14561:       //fallthrough
 14562:     case 0b010_010:  //(A2)
 14563:       if (XEiJ.EFA_SEPARATE_AR) {
 14564:         XEiJ.mpuCycleCount += 4;
 14565:         return XEiJ.regRn[10];
 14566:       }
 14567:       //fallthrough
 14568:     case 0b010_011:  //(A3)
 14569:       if (XEiJ.EFA_SEPARATE_AR) {
 14570:         XEiJ.mpuCycleCount += 4;
 14571:         return XEiJ.regRn[11];
 14572:       }
 14573:       //fallthrough
 14574:     case 0b010_100:  //(A4)
 14575:       if (XEiJ.EFA_SEPARATE_AR) {
 14576:         XEiJ.mpuCycleCount += 4;
 14577:         return XEiJ.regRn[12];
 14578:       }
 14579:       //fallthrough
 14580:     case 0b010_101:  //(A5)
 14581:       if (XEiJ.EFA_SEPARATE_AR) {
 14582:         XEiJ.mpuCycleCount += 4;
 14583:         return XEiJ.regRn[13];
 14584:       }
 14585:       //fallthrough
 14586:     case 0b010_110:  //(A6)
 14587:       if (XEiJ.EFA_SEPARATE_AR) {
 14588:         XEiJ.mpuCycleCount += 4;
 14589:         return XEiJ.regRn[14];
 14590:       }
 14591:       //fallthrough
 14592:     case 0b010_111:  //(A7)
 14593:       if (XEiJ.EFA_SEPARATE_AR) {
 14594:         XEiJ.mpuCycleCount += 4;
 14595:         return XEiJ.regRn[15];
 14596:       } else {
 14597:         XEiJ.mpuCycleCount += 4;
 14598:         return XEiJ.regRn[ea - (0b010_000 - 8)];
 14599:       }
 14600:     case 0b011_000:  //(A0)+
 14601:       if (XEiJ.EFA_SEPARATE_AR) {
 14602:         XEiJ.mpuCycleCount += 4;
 14603:         return (XEiJ.regRn[ 8] += 2) - 2;
 14604:       }
 14605:       //fallthrough
 14606:     case 0b011_001:  //(A1)+
 14607:       if (XEiJ.EFA_SEPARATE_AR) {
 14608:         XEiJ.mpuCycleCount += 4;
 14609:         return (XEiJ.regRn[ 9] += 2) - 2;
 14610:       }
 14611:       //fallthrough
 14612:     case 0b011_010:  //(A2)+
 14613:       if (XEiJ.EFA_SEPARATE_AR) {
 14614:         XEiJ.mpuCycleCount += 4;
 14615:         return (XEiJ.regRn[10] += 2) - 2;
 14616:       }
 14617:       //fallthrough
 14618:     case 0b011_011:  //(A3)+
 14619:       if (XEiJ.EFA_SEPARATE_AR) {
 14620:         XEiJ.mpuCycleCount += 4;
 14621:         return (XEiJ.regRn[11] += 2) - 2;
 14622:       }
 14623:       //fallthrough
 14624:     case 0b011_100:  //(A4)+
 14625:       if (XEiJ.EFA_SEPARATE_AR) {
 14626:         XEiJ.mpuCycleCount += 4;
 14627:         return (XEiJ.regRn[12] += 2) - 2;
 14628:       }
 14629:       //fallthrough
 14630:     case 0b011_101:  //(A5)+
 14631:       if (XEiJ.EFA_SEPARATE_AR) {
 14632:         XEiJ.mpuCycleCount += 4;
 14633:         return (XEiJ.regRn[13] += 2) - 2;
 14634:       }
 14635:       //fallthrough
 14636:     case 0b011_110:  //(A6)+
 14637:       if (XEiJ.EFA_SEPARATE_AR) {
 14638:         XEiJ.mpuCycleCount += 4;
 14639:         return (XEiJ.regRn[14] += 2) - 2;
 14640:       }
 14641:       //fallthrough
 14642:     case 0b011_111:  //(A7)+
 14643:       if (XEiJ.EFA_SEPARATE_AR) {
 14644:         XEiJ.mpuCycleCount += 4;
 14645:         return (XEiJ.regRn[15] += 2) - 2;
 14646:       } else {
 14647:         XEiJ.mpuCycleCount += 4;
 14648:         return (XEiJ.regRn[ea - (0b011_000 - 8)] += 2) - 2;
 14649:       }
 14650:     case 0b100_000:  //-(A0)
 14651:       if (XEiJ.EFA_SEPARATE_AR) {
 14652:         XEiJ.mpuCycleCount += 6;
 14653:         return XEiJ.regRn[ 8] -= 2;
 14654:       }
 14655:       //fallthrough
 14656:     case 0b100_001:  //-(A1)
 14657:       if (XEiJ.EFA_SEPARATE_AR) {
 14658:         XEiJ.mpuCycleCount += 6;
 14659:         return XEiJ.regRn[ 9] -= 2;
 14660:       }
 14661:       //fallthrough
 14662:     case 0b100_010:  //-(A2)
 14663:       if (XEiJ.EFA_SEPARATE_AR) {
 14664:         XEiJ.mpuCycleCount += 6;
 14665:         return XEiJ.regRn[10] -= 2;
 14666:       }
 14667:       //fallthrough
 14668:     case 0b100_011:  //-(A3)
 14669:       if (XEiJ.EFA_SEPARATE_AR) {
 14670:         XEiJ.mpuCycleCount += 6;
 14671:         return XEiJ.regRn[11] -= 2;
 14672:       }
 14673:       //fallthrough
 14674:     case 0b100_100:  //-(A4)
 14675:       if (XEiJ.EFA_SEPARATE_AR) {
 14676:         XEiJ.mpuCycleCount += 6;
 14677:         return XEiJ.regRn[12] -= 2;
 14678:       }
 14679:       //fallthrough
 14680:     case 0b100_101:  //-(A5)
 14681:       if (XEiJ.EFA_SEPARATE_AR) {
 14682:         XEiJ.mpuCycleCount += 6;
 14683:         return XEiJ.regRn[13] -= 2;
 14684:       }
 14685:       //fallthrough
 14686:     case 0b100_110:  //-(A6)
 14687:       if (XEiJ.EFA_SEPARATE_AR) {
 14688:         XEiJ.mpuCycleCount += 6;
 14689:         return XEiJ.regRn[14] -= 2;
 14690:       }
 14691:       //fallthrough
 14692:     case 0b100_111:  //-(A7)
 14693:       if (XEiJ.EFA_SEPARATE_AR) {
 14694:         XEiJ.mpuCycleCount += 6;
 14695:         return XEiJ.regRn[15] -= 2;
 14696:       } else {
 14697:         XEiJ.mpuCycleCount += 6;
 14698:         return XEiJ.regRn[ea - (0b100_000 - 8)] -= 2;
 14699:       }
 14700:     case 0b101_000:  //(d16,A0)
 14701:     case 0b101_001:  //(d16,A1)
 14702:     case 0b101_010:  //(d16,A2)
 14703:     case 0b101_011:  //(d16,A3)
 14704:     case 0b101_100:  //(d16,A4)
 14705:     case 0b101_101:  //(d16,A5)
 14706:     case 0b101_110:  //(d16,A6)
 14707:     case 0b101_111:  //(d16,A7)
 14708:       XEiJ.mpuCycleCount += 8;
 14709:       if (XEiJ.MPU_COMPOUND_POSTINCREMENT) {
 14710:         return (XEiJ.regRn[ea - (0b101_000 - 8)]  //ベースレジスタ
 14711:                 + XEiJ.busRwse ((XEiJ.regPC += 2) - 2));  //pcws。ワードディスプレースメント
 14712:       } else {
 14713:         t = XEiJ.regPC;
 14714:         XEiJ.regPC = t + 2;
 14715:         return (XEiJ.regRn[ea - (0b101_000 - 8)]  //ベースレジスタ
 14716:                 + XEiJ.busRwse (t));  //pcws。ワードディスプレースメント
 14717:       }
 14718:     case 0b110_000:  //(d8,A0,Rn.wl)
 14719:     case 0b110_001:  //(d8,A1,Rn.wl)
 14720:     case 0b110_010:  //(d8,A2,Rn.wl)
 14721:     case 0b110_011:  //(d8,A3,Rn.wl)
 14722:     case 0b110_100:  //(d8,A4,Rn.wl)
 14723:     case 0b110_101:  //(d8,A5,Rn.wl)
 14724:     case 0b110_110:  //(d8,A6,Rn.wl)
 14725:     case 0b110_111:  //(d8,A7,Rn.wl)
 14726:       XEiJ.mpuCycleCount += 10;
 14727:       if (XEiJ.MPU_COMPOUND_POSTINCREMENT) {
 14728:         w = XEiJ.busRwze ((XEiJ.regPC += 2) - 2);  //pcwz。拡張ワード
 14729:       } else {
 14730:         w = XEiJ.regPC;
 14731:         XEiJ.regPC = w + 2;
 14732:         w = XEiJ.busRwze (w);  //pcwz。拡張ワード
 14733:       }
 14734:       return (XEiJ.regRn[ea - (0b110_000 - 8)]  //ベースレジスタ
 14735:               + (byte) w  //バイトディスプレースメント
 14736:               + (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] :  //ワードインデックス
 14737:                  XEiJ.regRn[w >> 12]));  //ロングインデックス
 14738:     case 0b111_000:  //(xxx).W
 14739:       XEiJ.mpuCycleCount += 8;
 14740:       return XEiJ.busRwse ((XEiJ.regPC += 2) - 2);  //pcws
 14741:     case 0b111_001:  //(xxx).L
 14742:       XEiJ.mpuCycleCount += 12;
 14743:       return XEiJ.busRlse ((XEiJ.regPC += 4) - 4);  //pcls
 14744:     case 0b111_010:  //(d16,PC)
 14745:       XEiJ.mpuCycleCount += 8;
 14746:       t = XEiJ.regPC;
 14747:       XEiJ.regPC = t + 2;
 14748:       return (t  //ベースレジスタ
 14749:               + XEiJ.busRwse (t));  //pcws。ワードディスプレースメント
 14750:     case 0b111_011:  //(d8,PC,Rn.wl)
 14751:       XEiJ.mpuCycleCount += 10;
 14752:       t = XEiJ.regPC;
 14753:       XEiJ.regPC = t + 2;
 14754:       w = XEiJ.busRwze (t);  //pcwz。拡張ワード
 14755:       return (t  //ベースレジスタ
 14756:               + (byte) w  //バイトディスプレースメント
 14757:               + (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] :  //ワードインデックス
 14758:                  XEiJ.regRn[w >> 12]));  //ロングインデックス
 14759:     }  //switch
 14760:     XEiJ.mpuCycleCount += 34;
 14761:     M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION;
 14762:     throw M68kException.m6eSignal;
 14763:   }  //efaMemWord
 14764: 
 14765:   //a = efaMltWord (ea)  //|  M+-WXZ  |
 14766:   //  メモリ可変モードのワードオペランドの実効アドレスを求める
 14767:   //  efaMemWordとの違いは(d16,PC)と(d8,PC,Rn.wl)がないこと
 14768:   @SuppressWarnings ("fallthrough") public static int efaMltWord (int ea) throws M68kException {
 14769:     int t, w;
 14770:     switch (ea) {
 14771:     case 0b010_000:  //(A0)
 14772:       if (XEiJ.EFA_SEPARATE_AR) {
 14773:         XEiJ.mpuCycleCount += 4;
 14774:         return XEiJ.regRn[ 8];
 14775:       }
 14776:       //fallthrough
 14777:     case 0b010_001:  //(A1)
 14778:       if (XEiJ.EFA_SEPARATE_AR) {
 14779:         XEiJ.mpuCycleCount += 4;
 14780:         return XEiJ.regRn[ 9];
 14781:       }
 14782:       //fallthrough
 14783:     case 0b010_010:  //(A2)
 14784:       if (XEiJ.EFA_SEPARATE_AR) {
 14785:         XEiJ.mpuCycleCount += 4;
 14786:         return XEiJ.regRn[10];
 14787:       }
 14788:       //fallthrough
 14789:     case 0b010_011:  //(A3)
 14790:       if (XEiJ.EFA_SEPARATE_AR) {
 14791:         XEiJ.mpuCycleCount += 4;
 14792:         return XEiJ.regRn[11];
 14793:       }
 14794:       //fallthrough
 14795:     case 0b010_100:  //(A4)
 14796:       if (XEiJ.EFA_SEPARATE_AR) {
 14797:         XEiJ.mpuCycleCount += 4;
 14798:         return XEiJ.regRn[12];
 14799:       }
 14800:       //fallthrough
 14801:     case 0b010_101:  //(A5)
 14802:       if (XEiJ.EFA_SEPARATE_AR) {
 14803:         XEiJ.mpuCycleCount += 4;
 14804:         return XEiJ.regRn[13];
 14805:       }
 14806:       //fallthrough
 14807:     case 0b010_110:  //(A6)
 14808:       if (XEiJ.EFA_SEPARATE_AR) {
 14809:         XEiJ.mpuCycleCount += 4;
 14810:         return XEiJ.regRn[14];
 14811:       }
 14812:       //fallthrough
 14813:     case 0b010_111:  //(A7)
 14814:       if (XEiJ.EFA_SEPARATE_AR) {
 14815:         XEiJ.mpuCycleCount += 4;
 14816:         return XEiJ.regRn[15];
 14817:       } else {
 14818:         XEiJ.mpuCycleCount += 4;
 14819:         return XEiJ.regRn[ea - (0b010_000 - 8)];
 14820:       }
 14821:     case 0b011_000:  //(A0)+
 14822:       if (XEiJ.EFA_SEPARATE_AR) {
 14823:         XEiJ.mpuCycleCount += 4;
 14824:         return (XEiJ.regRn[ 8] += 2) - 2;
 14825:       }
 14826:       //fallthrough
 14827:     case 0b011_001:  //(A1)+
 14828:       if (XEiJ.EFA_SEPARATE_AR) {
 14829:         XEiJ.mpuCycleCount += 4;
 14830:         return (XEiJ.regRn[ 9] += 2) - 2;
 14831:       }
 14832:       //fallthrough
 14833:     case 0b011_010:  //(A2)+
 14834:       if (XEiJ.EFA_SEPARATE_AR) {
 14835:         XEiJ.mpuCycleCount += 4;
 14836:         return (XEiJ.regRn[10] += 2) - 2;
 14837:       }
 14838:       //fallthrough
 14839:     case 0b011_011:  //(A3)+
 14840:       if (XEiJ.EFA_SEPARATE_AR) {
 14841:         XEiJ.mpuCycleCount += 4;
 14842:         return (XEiJ.regRn[11] += 2) - 2;
 14843:       }
 14844:       //fallthrough
 14845:     case 0b011_100:  //(A4)+
 14846:       if (XEiJ.EFA_SEPARATE_AR) {
 14847:         XEiJ.mpuCycleCount += 4;
 14848:         return (XEiJ.regRn[12] += 2) - 2;
 14849:       }
 14850:       //fallthrough
 14851:     case 0b011_101:  //(A5)+
 14852:       if (XEiJ.EFA_SEPARATE_AR) {
 14853:         XEiJ.mpuCycleCount += 4;
 14854:         return (XEiJ.regRn[13] += 2) - 2;
 14855:       }
 14856:       //fallthrough
 14857:     case 0b011_110:  //(A6)+
 14858:       if (XEiJ.EFA_SEPARATE_AR) {
 14859:         XEiJ.mpuCycleCount += 4;
 14860:         return (XEiJ.regRn[14] += 2) - 2;
 14861:       }
 14862:       //fallthrough
 14863:     case 0b011_111:  //(A7)+
 14864:       if (XEiJ.EFA_SEPARATE_AR) {
 14865:         XEiJ.mpuCycleCount += 4;
 14866:         return (XEiJ.regRn[15] += 2) - 2;
 14867:       } else {
 14868:         XEiJ.mpuCycleCount += 4;
 14869:         return (XEiJ.regRn[ea - (0b011_000 - 8)] += 2) - 2;
 14870:       }
 14871:     case 0b100_000:  //-(A0)
 14872:       if (XEiJ.EFA_SEPARATE_AR) {
 14873:         XEiJ.mpuCycleCount += 6;
 14874:         return XEiJ.regRn[ 8] -= 2;
 14875:       }
 14876:       //fallthrough
 14877:     case 0b100_001:  //-(A1)
 14878:       if (XEiJ.EFA_SEPARATE_AR) {
 14879:         XEiJ.mpuCycleCount += 6;
 14880:         return XEiJ.regRn[ 9] -= 2;
 14881:       }
 14882:       //fallthrough
 14883:     case 0b100_010:  //-(A2)
 14884:       if (XEiJ.EFA_SEPARATE_AR) {
 14885:         XEiJ.mpuCycleCount += 6;
 14886:         return XEiJ.regRn[10] -= 2;
 14887:       }
 14888:       //fallthrough
 14889:     case 0b100_011:  //-(A3)
 14890:       if (XEiJ.EFA_SEPARATE_AR) {
 14891:         XEiJ.mpuCycleCount += 6;
 14892:         return XEiJ.regRn[11] -= 2;
 14893:       }
 14894:       //fallthrough
 14895:     case 0b100_100:  //-(A4)
 14896:       if (XEiJ.EFA_SEPARATE_AR) {
 14897:         XEiJ.mpuCycleCount += 6;
 14898:         return XEiJ.regRn[12] -= 2;
 14899:       }
 14900:       //fallthrough
 14901:     case 0b100_101:  //-(A5)
 14902:       if (XEiJ.EFA_SEPARATE_AR) {
 14903:         XEiJ.mpuCycleCount += 6;
 14904:         return XEiJ.regRn[13] -= 2;
 14905:       }
 14906:       //fallthrough
 14907:     case 0b100_110:  //-(A6)
 14908:       if (XEiJ.EFA_SEPARATE_AR) {
 14909:         XEiJ.mpuCycleCount += 6;
 14910:         return XEiJ.regRn[14] -= 2;
 14911:       }
 14912:       //fallthrough
 14913:     case 0b100_111:  //-(A7)
 14914:       if (XEiJ.EFA_SEPARATE_AR) {
 14915:         XEiJ.mpuCycleCount += 6;
 14916:         return XEiJ.regRn[15] -= 2;
 14917:       } else {
 14918:         XEiJ.mpuCycleCount += 6;
 14919:         return XEiJ.regRn[ea - (0b100_000 - 8)] -= 2;
 14920:       }
 14921:     case 0b101_000:  //(d16,A0)
 14922:     case 0b101_001:  //(d16,A1)
 14923:     case 0b101_010:  //(d16,A2)
 14924:     case 0b101_011:  //(d16,A3)
 14925:     case 0b101_100:  //(d16,A4)
 14926:     case 0b101_101:  //(d16,A5)
 14927:     case 0b101_110:  //(d16,A6)
 14928:     case 0b101_111:  //(d16,A7)
 14929:       XEiJ.mpuCycleCount += 8;
 14930:       if (XEiJ.MPU_COMPOUND_POSTINCREMENT) {
 14931:         return (XEiJ.regRn[ea - (0b101_000 - 8)]  //ベースレジスタ
 14932:                 + XEiJ.busRwse ((XEiJ.regPC += 2) - 2));  //pcws。ワードディスプレースメント
 14933:       } else {
 14934:         t = XEiJ.regPC;
 14935:         XEiJ.regPC = t + 2;
 14936:         return (XEiJ.regRn[ea - (0b101_000 - 8)]  //ベースレジスタ
 14937:                 + XEiJ.busRwse (t));  //pcws。ワードディスプレースメント
 14938:       }
 14939:     case 0b110_000:  //(d8,A0,Rn.wl)
 14940:     case 0b110_001:  //(d8,A1,Rn.wl)
 14941:     case 0b110_010:  //(d8,A2,Rn.wl)
 14942:     case 0b110_011:  //(d8,A3,Rn.wl)
 14943:     case 0b110_100:  //(d8,A4,Rn.wl)
 14944:     case 0b110_101:  //(d8,A5,Rn.wl)
 14945:     case 0b110_110:  //(d8,A6,Rn.wl)
 14946:     case 0b110_111:  //(d8,A7,Rn.wl)
 14947:       XEiJ.mpuCycleCount += 10;
 14948:       if (XEiJ.MPU_COMPOUND_POSTINCREMENT) {
 14949:         w = XEiJ.busRwze ((XEiJ.regPC += 2) - 2);  //pcwz。拡張ワード
 14950:       } else {
 14951:         w = XEiJ.regPC;
 14952:         XEiJ.regPC = w + 2;
 14953:         w = XEiJ.busRwze (w);  //pcwz。拡張ワード
 14954:       }
 14955:       return (XEiJ.regRn[ea - (0b110_000 - 8)]  //ベースレジスタ
 14956:               + (byte) w  //バイトディスプレースメント
 14957:               + (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] :  //ワードインデックス
 14958:                  XEiJ.regRn[w >> 12]));  //ロングインデックス
 14959:     case 0b111_000:  //(xxx).W
 14960:       XEiJ.mpuCycleCount += 8;
 14961:       return XEiJ.busRwse ((XEiJ.regPC += 2) - 2);  //pcws
 14962:     case 0b111_001:  //(xxx).L
 14963:       XEiJ.mpuCycleCount += 12;
 14964:       return XEiJ.busRlse ((XEiJ.regPC += 4) - 4);  //pcls
 14965:     }  //switch
 14966:     XEiJ.mpuCycleCount += 34;
 14967:     M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION;
 14968:     throw M68kException.m6eSignal;
 14969:   }  //efaMltWord
 14970: 
 14971:   //a = efaCntWord (ea)  //|  M  WXZP |
 14972:   //  制御モードのワードオペランドの実効アドレスを求める
 14973:   //  efaMemWordとの違いは(Ar)+と-(Ar)がないこと
 14974:   @SuppressWarnings ("fallthrough") public static int efaCntWord (int ea) throws M68kException {
 14975:     int t, w;
 14976:     switch (ea) {
 14977:     case 0b010_000:  //(A0)
 14978:       if (XEiJ.EFA_SEPARATE_AR) {
 14979:         XEiJ.mpuCycleCount += 4;
 14980:         return XEiJ.regRn[ 8];
 14981:       }
 14982:       //fallthrough
 14983:     case 0b010_001:  //(A1)
 14984:       if (XEiJ.EFA_SEPARATE_AR) {
 14985:         XEiJ.mpuCycleCount += 4;
 14986:         return XEiJ.regRn[ 9];
 14987:       }
 14988:       //fallthrough
 14989:     case 0b010_010:  //(A2)
 14990:       if (XEiJ.EFA_SEPARATE_AR) {
 14991:         XEiJ.mpuCycleCount += 4;
 14992:         return XEiJ.regRn[10];
 14993:       }
 14994:       //fallthrough
 14995:     case 0b010_011:  //(A3)
 14996:       if (XEiJ.EFA_SEPARATE_AR) {
 14997:         XEiJ.mpuCycleCount += 4;
 14998:         return XEiJ.regRn[11];
 14999:       }
 15000:       //fallthrough
 15001:     case 0b010_100:  //(A4)
 15002:       if (XEiJ.EFA_SEPARATE_AR) {
 15003:         XEiJ.mpuCycleCount += 4;
 15004:         return XEiJ.regRn[12];
 15005:       }
 15006:       //fallthrough
 15007:     case 0b010_101:  //(A5)
 15008:       if (XEiJ.EFA_SEPARATE_AR) {
 15009:         XEiJ.mpuCycleCount += 4;
 15010:         return XEiJ.regRn[13];
 15011:       }
 15012:       //fallthrough
 15013:     case 0b010_110:  //(A6)
 15014:       if (XEiJ.EFA_SEPARATE_AR) {
 15015:         XEiJ.mpuCycleCount += 4;
 15016:         return XEiJ.regRn[14];
 15017:       }
 15018:       //fallthrough
 15019:     case 0b010_111:  //(A7)
 15020:       if (XEiJ.EFA_SEPARATE_AR) {
 15021:         XEiJ.mpuCycleCount += 4;
 15022:         return XEiJ.regRn[15];
 15023:       } else {
 15024:         XEiJ.mpuCycleCount += 4;
 15025:         return XEiJ.regRn[ea - (0b010_000 - 8)];
 15026:       }
 15027:     case 0b101_000:  //(d16,A0)
 15028:     case 0b101_001:  //(d16,A1)
 15029:     case 0b101_010:  //(d16,A2)
 15030:     case 0b101_011:  //(d16,A3)
 15031:     case 0b101_100:  //(d16,A4)
 15032:     case 0b101_101:  //(d16,A5)
 15033:     case 0b101_110:  //(d16,A6)
 15034:     case 0b101_111:  //(d16,A7)
 15035:       XEiJ.mpuCycleCount += 8;
 15036:       if (XEiJ.MPU_COMPOUND_POSTINCREMENT) {
 15037:         return (XEiJ.regRn[ea - (0b101_000 - 8)]  //ベースレジスタ
 15038:                 + XEiJ.busRwse ((XEiJ.regPC += 2) - 2));  //pcws。ワードディスプレースメント
 15039:       } else {
 15040:         t = XEiJ.regPC;
 15041:         XEiJ.regPC = t + 2;
 15042:         return (XEiJ.regRn[ea - (0b101_000 - 8)]  //ベースレジスタ
 15043:                 + XEiJ.busRwse (t));  //pcws。ワードディスプレースメント
 15044:       }
 15045:     case 0b110_000:  //(d8,A0,Rn.wl)
 15046:     case 0b110_001:  //(d8,A1,Rn.wl)
 15047:     case 0b110_010:  //(d8,A2,Rn.wl)
 15048:     case 0b110_011:  //(d8,A3,Rn.wl)
 15049:     case 0b110_100:  //(d8,A4,Rn.wl)
 15050:     case 0b110_101:  //(d8,A5,Rn.wl)
 15051:     case 0b110_110:  //(d8,A6,Rn.wl)
 15052:     case 0b110_111:  //(d8,A7,Rn.wl)
 15053:       XEiJ.mpuCycleCount += 10;
 15054:       if (XEiJ.MPU_COMPOUND_POSTINCREMENT) {
 15055:         w = XEiJ.busRwze ((XEiJ.regPC += 2) - 2);  //pcwz。拡張ワード
 15056:       } else {
 15057:         w = XEiJ.regPC;
 15058:         XEiJ.regPC = w + 2;
 15059:         w = XEiJ.busRwze (w);  //pcwz。拡張ワード
 15060:       }
 15061:       return (XEiJ.regRn[ea - (0b110_000 - 8)]  //ベースレジスタ
 15062:               + (byte) w  //バイトディスプレースメント
 15063:               + (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] :  //ワードインデックス
 15064:                  XEiJ.regRn[w >> 12]));  //ロングインデックス
 15065:     case 0b111_000:  //(xxx).W
 15066:       XEiJ.mpuCycleCount += 8;
 15067:       return XEiJ.busRwse ((XEiJ.regPC += 2) - 2);  //pcws
 15068:     case 0b111_001:  //(xxx).L
 15069:       XEiJ.mpuCycleCount += 12;
 15070:       return XEiJ.busRlse ((XEiJ.regPC += 4) - 4);  //pcls
 15071:     case 0b111_010:  //(d16,PC)
 15072:       XEiJ.mpuCycleCount += 8;
 15073:       t = XEiJ.regPC;
 15074:       XEiJ.regPC = t + 2;
 15075:       return (t  //ベースレジスタ
 15076:               + XEiJ.busRwse (t));  //pcws。ワードディスプレースメント
 15077:     case 0b111_011:  //(d8,PC,Rn.wl)
 15078:       XEiJ.mpuCycleCount += 10;
 15079:       t = XEiJ.regPC;
 15080:       XEiJ.regPC = t + 2;
 15081:       w = XEiJ.busRwze (t);  //pcwz。拡張ワード
 15082:       return (t  //ベースレジスタ
 15083:               + (byte) w  //バイトディスプレースメント
 15084:               + (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] :  //ワードインデックス
 15085:                  XEiJ.regRn[w >> 12]));  //ロングインデックス
 15086:     }  //switch
 15087:     XEiJ.mpuCycleCount += 34;
 15088:     M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION;
 15089:     throw M68kException.m6eSignal;
 15090:   }  //efaCntWord
 15091: 
 15092:   //a = efaCltWord (ea)  //|  M  WXZ  |
 15093:   //  制御可変モードのワードオペランドの実効アドレスを求める
 15094:   //  efaCntWordとの違いは(d16,PC)と(d8,PC,Rn.wl)がないこと
 15095:   @SuppressWarnings ("fallthrough") public static int efaCltWord (int ea) throws M68kException {
 15096:     int t, w;
 15097:     switch (ea) {
 15098:     case 0b010_000:  //(A0)
 15099:       if (XEiJ.EFA_SEPARATE_AR) {
 15100:         XEiJ.mpuCycleCount += 4;
 15101:         return XEiJ.regRn[ 8];
 15102:       }
 15103:       //fallthrough
 15104:     case 0b010_001:  //(A1)
 15105:       if (XEiJ.EFA_SEPARATE_AR) {
 15106:         XEiJ.mpuCycleCount += 4;
 15107:         return XEiJ.regRn[ 9];
 15108:       }
 15109:       //fallthrough
 15110:     case 0b010_010:  //(A2)
 15111:       if (XEiJ.EFA_SEPARATE_AR) {
 15112:         XEiJ.mpuCycleCount += 4;
 15113:         return XEiJ.regRn[10];
 15114:       }
 15115:       //fallthrough
 15116:     case 0b010_011:  //(A3)
 15117:       if (XEiJ.EFA_SEPARATE_AR) {
 15118:         XEiJ.mpuCycleCount += 4;
 15119:         return XEiJ.regRn[11];
 15120:       }
 15121:       //fallthrough
 15122:     case 0b010_100:  //(A4)
 15123:       if (XEiJ.EFA_SEPARATE_AR) {
 15124:         XEiJ.mpuCycleCount += 4;
 15125:         return XEiJ.regRn[12];
 15126:       }
 15127:       //fallthrough
 15128:     case 0b010_101:  //(A5)
 15129:       if (XEiJ.EFA_SEPARATE_AR) {
 15130:         XEiJ.mpuCycleCount += 4;
 15131:         return XEiJ.regRn[13];
 15132:       }
 15133:       //fallthrough
 15134:     case 0b010_110:  //(A6)
 15135:       if (XEiJ.EFA_SEPARATE_AR) {
 15136:         XEiJ.mpuCycleCount += 4;
 15137:         return XEiJ.regRn[14];
 15138:       }
 15139:       //fallthrough
 15140:     case 0b010_111:  //(A7)
 15141:       if (XEiJ.EFA_SEPARATE_AR) {
 15142:         XEiJ.mpuCycleCount += 4;
 15143:         return XEiJ.regRn[15];
 15144:       } else {
 15145:         XEiJ.mpuCycleCount += 4;
 15146:         return XEiJ.regRn[ea - (0b010_000 - 8)];
 15147:       }
 15148:     case 0b101_000:  //(d16,A0)
 15149:     case 0b101_001:  //(d16,A1)
 15150:     case 0b101_010:  //(d16,A2)
 15151:     case 0b101_011:  //(d16,A3)
 15152:     case 0b101_100:  //(d16,A4)
 15153:     case 0b101_101:  //(d16,A5)
 15154:     case 0b101_110:  //(d16,A6)
 15155:     case 0b101_111:  //(d16,A7)
 15156:       XEiJ.mpuCycleCount += 8;
 15157:       if (XEiJ.MPU_COMPOUND_POSTINCREMENT) {
 15158:         return (XEiJ.regRn[ea - (0b101_000 - 8)]  //ベースレジスタ
 15159:                 + XEiJ.busRwse ((XEiJ.regPC += 2) - 2));  //pcws。ワードディスプレースメント
 15160:       } else {
 15161:         t = XEiJ.regPC;
 15162:         XEiJ.regPC = t + 2;
 15163:         return (XEiJ.regRn[ea - (0b101_000 - 8)]  //ベースレジスタ
 15164:                 + XEiJ.busRwse (t));  //pcws。ワードディスプレースメント
 15165:       }
 15166:     case 0b110_000:  //(d8,A0,Rn.wl)
 15167:     case 0b110_001:  //(d8,A1,Rn.wl)
 15168:     case 0b110_010:  //(d8,A2,Rn.wl)
 15169:     case 0b110_011:  //(d8,A3,Rn.wl)
 15170:     case 0b110_100:  //(d8,A4,Rn.wl)
 15171:     case 0b110_101:  //(d8,A5,Rn.wl)
 15172:     case 0b110_110:  //(d8,A6,Rn.wl)
 15173:     case 0b110_111:  //(d8,A7,Rn.wl)
 15174:       XEiJ.mpuCycleCount += 10;
 15175:       if (XEiJ.MPU_COMPOUND_POSTINCREMENT) {
 15176:         w = XEiJ.busRwze ((XEiJ.regPC += 2) - 2);  //pcwz。拡張ワード
 15177:       } else {
 15178:         w = XEiJ.regPC;
 15179:         XEiJ.regPC = w + 2;
 15180:         w = XEiJ.busRwze (w);  //pcwz。拡張ワード
 15181:       }
 15182:       return (XEiJ.regRn[ea - (0b110_000 - 8)]  //ベースレジスタ
 15183:               + (byte) w  //バイトディスプレースメント
 15184:               + (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] :  //ワードインデックス
 15185:                  XEiJ.regRn[w >> 12]));  //ロングインデックス
 15186:     case 0b111_000:  //(xxx).W
 15187:       XEiJ.mpuCycleCount += 8;
 15188:       return XEiJ.busRwse ((XEiJ.regPC += 2) - 2);  //pcws
 15189:     case 0b111_001:  //(xxx).L
 15190:       XEiJ.mpuCycleCount += 12;
 15191:       return XEiJ.busRlse ((XEiJ.regPC += 4) - 4);  //pcls
 15192:     }  //switch
 15193:     XEiJ.mpuCycleCount += 34;
 15194:     M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION;
 15195:     throw M68kException.m6eSignal;
 15196:   }  //efaCltWord
 15197: 
 15198:   //a = efaAnyLong (ea)  //|  M+-WXZPI|
 15199:   //  任意のモードのロングオペランドの実効アドレスを求める
 15200:   //  efaAnyWordとの違いは(Ar)+と-(Ar)がArを4変化させることと、#<data>がPCを4変化させることと、
 15201:   //  オペランドのアクセスが1ワード増える分の4サイクルが追加されていること
 15202:   @SuppressWarnings ("fallthrough") public static int efaAnyLong (int ea) throws M68kException {
 15203:     int t, w;
 15204:     switch (ea) {
 15205:     case 0b010_000:  //(A0)
 15206:       if (XEiJ.EFA_SEPARATE_AR) {
 15207:         XEiJ.mpuCycleCount += 8;
 15208:         return XEiJ.regRn[ 8];
 15209:       }
 15210:       //fallthrough
 15211:     case 0b010_001:  //(A1)
 15212:       if (XEiJ.EFA_SEPARATE_AR) {
 15213:         XEiJ.mpuCycleCount += 8;
 15214:         return XEiJ.regRn[ 9];
 15215:       }
 15216:       //fallthrough
 15217:     case 0b010_010:  //(A2)
 15218:       if (XEiJ.EFA_SEPARATE_AR) {
 15219:         XEiJ.mpuCycleCount += 8;
 15220:         return XEiJ.regRn[10];
 15221:       }
 15222:       //fallthrough
 15223:     case 0b010_011:  //(A3)
 15224:       if (XEiJ.EFA_SEPARATE_AR) {
 15225:         XEiJ.mpuCycleCount += 8;
 15226:         return XEiJ.regRn[11];
 15227:       }
 15228:       //fallthrough
 15229:     case 0b010_100:  //(A4)
 15230:       if (XEiJ.EFA_SEPARATE_AR) {
 15231:         XEiJ.mpuCycleCount += 8;
 15232:         return XEiJ.regRn[12];
 15233:       }
 15234:       //fallthrough
 15235:     case 0b010_101:  //(A5)
 15236:       if (XEiJ.EFA_SEPARATE_AR) {
 15237:         XEiJ.mpuCycleCount += 8;
 15238:         return XEiJ.regRn[13];
 15239:       }
 15240:       //fallthrough
 15241:     case 0b010_110:  //(A6)
 15242:       if (XEiJ.EFA_SEPARATE_AR) {
 15243:         XEiJ.mpuCycleCount += 8;
 15244:         return XEiJ.regRn[14];
 15245:       }
 15246:       //fallthrough
 15247:     case 0b010_111:  //(A7)
 15248:       if (XEiJ.EFA_SEPARATE_AR) {
 15249:         XEiJ.mpuCycleCount += 8;
 15250:         return XEiJ.regRn[15];
 15251:       } else {
 15252:         XEiJ.mpuCycleCount += 8;
 15253:         return XEiJ.regRn[ea - (0b010_000 - 8)];
 15254:       }
 15255:     case 0b011_000:  //(A0)+
 15256:       if (XEiJ.EFA_SEPARATE_AR) {
 15257:         XEiJ.mpuCycleCount += 8;
 15258:         return (XEiJ.regRn[ 8] += 4) - 4;
 15259:       }
 15260:       //fallthrough
 15261:     case 0b011_001:  //(A1)+
 15262:       if (XEiJ.EFA_SEPARATE_AR) {
 15263:         XEiJ.mpuCycleCount += 8;
 15264:         return (XEiJ.regRn[ 9] += 4) - 4;
 15265:       }
 15266:       //fallthrough
 15267:     case 0b011_010:  //(A2)+
 15268:       if (XEiJ.EFA_SEPARATE_AR) {
 15269:         XEiJ.mpuCycleCount += 8;
 15270:         return (XEiJ.regRn[10] += 4) - 4;
 15271:       }
 15272:       //fallthrough
 15273:     case 0b011_011:  //(A3)+
 15274:       if (XEiJ.EFA_SEPARATE_AR) {
 15275:         XEiJ.mpuCycleCount += 8;
 15276:         return (XEiJ.regRn[11] += 4) - 4;
 15277:       }
 15278:       //fallthrough
 15279:     case 0b011_100:  //(A4)+
 15280:       if (XEiJ.EFA_SEPARATE_AR) {
 15281:         XEiJ.mpuCycleCount += 8;
 15282:         return (XEiJ.regRn[12] += 4) - 4;
 15283:       }
 15284:       //fallthrough
 15285:     case 0b011_101:  //(A5)+
 15286:       if (XEiJ.EFA_SEPARATE_AR) {
 15287:         XEiJ.mpuCycleCount += 8;
 15288:         return (XEiJ.regRn[13] += 4) - 4;
 15289:       }
 15290:       //fallthrough
 15291:     case 0b011_110:  //(A6)+
 15292:       if (XEiJ.EFA_SEPARATE_AR) {
 15293:         XEiJ.mpuCycleCount += 8;
 15294:         return (XEiJ.regRn[14] += 4) - 4;
 15295:       }
 15296:       //fallthrough
 15297:     case 0b011_111:  //(A7)+
 15298:       if (XEiJ.EFA_SEPARATE_AR) {
 15299:         XEiJ.mpuCycleCount += 8;
 15300:         return (XEiJ.regRn[15] += 4) - 4;
 15301:       } else {
 15302:         XEiJ.mpuCycleCount += 8;
 15303:         return (XEiJ.regRn[ea - (0b011_000 - 8)] += 4) - 4;
 15304:       }
 15305:     case 0b100_000:  //-(A0)
 15306:       if (XEiJ.EFA_SEPARATE_AR) {
 15307:         XEiJ.mpuCycleCount += 10;
 15308:         return XEiJ.regRn[ 8] -= 4;
 15309:       }
 15310:       //fallthrough
 15311:     case 0b100_001:  //-(A1)
 15312:       if (XEiJ.EFA_SEPARATE_AR) {
 15313:         XEiJ.mpuCycleCount += 10;
 15314:         return XEiJ.regRn[ 9] -= 4;
 15315:       }
 15316:       //fallthrough
 15317:     case 0b100_010:  //-(A2)
 15318:       if (XEiJ.EFA_SEPARATE_AR) {
 15319:         XEiJ.mpuCycleCount += 10;
 15320:         return XEiJ.regRn[10] -= 4;
 15321:       }
 15322:       //fallthrough
 15323:     case 0b100_011:  //-(A3)
 15324:       if (XEiJ.EFA_SEPARATE_AR) {
 15325:         XEiJ.mpuCycleCount += 10;
 15326:         return XEiJ.regRn[11] -= 4;
 15327:       }
 15328:       //fallthrough
 15329:     case 0b100_100:  //-(A4)
 15330:       if (XEiJ.EFA_SEPARATE_AR) {
 15331:         XEiJ.mpuCycleCount += 10;
 15332:         return XEiJ.regRn[12] -= 4;
 15333:       }
 15334:       //fallthrough
 15335:     case 0b100_101:  //-(A5)
 15336:       if (XEiJ.EFA_SEPARATE_AR) {
 15337:         XEiJ.mpuCycleCount += 10;
 15338:         return XEiJ.regRn[13] -= 4;
 15339:       }
 15340:       //fallthrough
 15341:     case 0b100_110:  //-(A6)
 15342:       if (XEiJ.EFA_SEPARATE_AR) {
 15343:         XEiJ.mpuCycleCount += 10;
 15344:         return XEiJ.regRn[14] -= 4;
 15345:       }
 15346:       //fallthrough
 15347:     case 0b100_111:  //-(A7)
 15348:       if (XEiJ.EFA_SEPARATE_AR) {
 15349:         XEiJ.mpuCycleCount += 10;
 15350:         return XEiJ.regRn[15] -= 4;
 15351:       } else {
 15352:         XEiJ.mpuCycleCount += 10;
 15353:         return XEiJ.regRn[ea - (0b100_000 - 8)] -= 4;
 15354:       }
 15355:     case 0b101_000:  //(d16,A0)
 15356:     case 0b101_001:  //(d16,A1)
 15357:     case 0b101_010:  //(d16,A2)
 15358:     case 0b101_011:  //(d16,A3)
 15359:     case 0b101_100:  //(d16,A4)
 15360:     case 0b101_101:  //(d16,A5)
 15361:     case 0b101_110:  //(d16,A6)
 15362:     case 0b101_111:  //(d16,A7)
 15363:       XEiJ.mpuCycleCount += 12;
 15364:       if (XEiJ.MPU_COMPOUND_POSTINCREMENT) {
 15365:         return (XEiJ.regRn[ea - (0b101_000 - 8)]  //ベースレジスタ
 15366:                 + XEiJ.busRwse ((XEiJ.regPC += 2) - 2));  //pcws。ワードディスプレースメント
 15367:       } else {
 15368:         t = XEiJ.regPC;
 15369:         XEiJ.regPC = t + 2;
 15370:         return (XEiJ.regRn[ea - (0b101_000 - 8)]  //ベースレジスタ
 15371:                 + XEiJ.busRwse (t));  //pcws。ワードディスプレースメント
 15372:       }
 15373:     case 0b110_000:  //(d8,A0,Rn.wl)
 15374:     case 0b110_001:  //(d8,A1,Rn.wl)
 15375:     case 0b110_010:  //(d8,A2,Rn.wl)
 15376:     case 0b110_011:  //(d8,A3,Rn.wl)
 15377:     case 0b110_100:  //(d8,A4,Rn.wl)
 15378:     case 0b110_101:  //(d8,A5,Rn.wl)
 15379:     case 0b110_110:  //(d8,A6,Rn.wl)
 15380:     case 0b110_111:  //(d8,A7,Rn.wl)
 15381:       XEiJ.mpuCycleCount += 14;
 15382:       if (XEiJ.MPU_COMPOUND_POSTINCREMENT) {
 15383:         w = XEiJ.busRwze ((XEiJ.regPC += 2) - 2);  //pcwz。拡張ワード
 15384:       } else {
 15385:         w = XEiJ.regPC;
 15386:         XEiJ.regPC = w + 2;
 15387:         w = XEiJ.busRwze (w);  //pcwz。拡張ワード
 15388:       }
 15389:       return (XEiJ.regRn[ea - (0b110_000 - 8)]  //ベースレジスタ
 15390:               + (byte) w  //バイトディスプレースメント
 15391:               + (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] :  //ワードインデックス
 15392:                  XEiJ.regRn[w >> 12]));  //ロングインデックス
 15393:     case 0b111_000:  //(xxx).W
 15394:       XEiJ.mpuCycleCount += 12;
 15395:       return XEiJ.busRwse ((XEiJ.regPC += 2) - 2);  //pcws
 15396:     case 0b111_001:  //(xxx).L
 15397:       XEiJ.mpuCycleCount += 16;
 15398:       return XEiJ.busRlse ((XEiJ.regPC += 4) - 4);  //pcls
 15399:     case 0b111_010:  //(d16,PC)
 15400:       XEiJ.mpuCycleCount += 12;
 15401:       t = XEiJ.regPC;
 15402:       XEiJ.regPC = t + 2;
 15403:       return (t  //ベースレジスタ
 15404:               + XEiJ.busRwse (t));  //pcws。ワードディスプレースメント
 15405:     case 0b111_011:  //(d8,PC,Rn.wl)
 15406:       XEiJ.mpuCycleCount += 14;
 15407:       t = XEiJ.regPC;
 15408:       XEiJ.regPC = t + 2;
 15409:       w = XEiJ.busRwze (t);  //pcwz。拡張ワード
 15410:       return (t  //ベースレジスタ
 15411:               + (byte) w  //バイトディスプレースメント
 15412:               + (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] :  //ワードインデックス
 15413:                  XEiJ.regRn[w >> 12]));  //ロングインデックス
 15414:     case 0b111_100:  //#<data>
 15415:       XEiJ.mpuCycleCount += 8;
 15416:       if (XEiJ.MPU_COMPOUND_POSTINCREMENT) {
 15417:         return (XEiJ.regPC += 4) - 4;
 15418:       } else {
 15419:         t = XEiJ.regPC;
 15420:         XEiJ.regPC = t + 4;
 15421:         return t;
 15422:       }
 15423:     }  //switch
 15424:     XEiJ.mpuCycleCount += 34;
 15425:     M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION;
 15426:     throw M68kException.m6eSignal;
 15427:   }  //efaAnyLong
 15428: 
 15429:   //a = efaMemLong (ea)  //|  M+-WXZP |
 15430:   //  メモリモードのロングオペランドの実効アドレスを求める
 15431:   //  efaAnyLongとの違いは#<data>がないこと
 15432:   @SuppressWarnings ("fallthrough") public static int efaMemLong (int ea) throws M68kException {
 15433:     int t, w;
 15434:     switch (ea) {
 15435:     case 0b010_000:  //(A0)
 15436:       if (XEiJ.EFA_SEPARATE_AR) {
 15437:         XEiJ.mpuCycleCount += 8;
 15438:         return XEiJ.regRn[ 8];
 15439:       }
 15440:       //fallthrough
 15441:     case 0b010_001:  //(A1)
 15442:       if (XEiJ.EFA_SEPARATE_AR) {
 15443:         XEiJ.mpuCycleCount += 8;
 15444:         return XEiJ.regRn[ 9];
 15445:       }
 15446:       //fallthrough
 15447:     case 0b010_010:  //(A2)
 15448:       if (XEiJ.EFA_SEPARATE_AR) {
 15449:         XEiJ.mpuCycleCount += 8;
 15450:         return XEiJ.regRn[10];
 15451:       }
 15452:       //fallthrough
 15453:     case 0b010_011:  //(A3)
 15454:       if (XEiJ.EFA_SEPARATE_AR) {
 15455:         XEiJ.mpuCycleCount += 8;
 15456:         return XEiJ.regRn[11];
 15457:       }
 15458:       //fallthrough
 15459:     case 0b010_100:  //(A4)
 15460:       if (XEiJ.EFA_SEPARATE_AR) {
 15461:         XEiJ.mpuCycleCount += 8;
 15462:         return XEiJ.regRn[12];
 15463:       }
 15464:       //fallthrough
 15465:     case 0b010_101:  //(A5)
 15466:       if (XEiJ.EFA_SEPARATE_AR) {
 15467:         XEiJ.mpuCycleCount += 8;
 15468:         return XEiJ.regRn[13];
 15469:       }
 15470:       //fallthrough
 15471:     case 0b010_110:  //(A6)
 15472:       if (XEiJ.EFA_SEPARATE_AR) {
 15473:         XEiJ.mpuCycleCount += 8;
 15474:         return XEiJ.regRn[14];
 15475:       }
 15476:       //fallthrough
 15477:     case 0b010_111:  //(A7)
 15478:       if (XEiJ.EFA_SEPARATE_AR) {
 15479:         XEiJ.mpuCycleCount += 8;
 15480:         return XEiJ.regRn[15];
 15481:       } else {
 15482:         XEiJ.mpuCycleCount += 8;
 15483:         return XEiJ.regRn[ea - (0b010_000 - 8)];
 15484:       }
 15485:     case 0b011_000:  //(A0)+
 15486:       if (XEiJ.EFA_SEPARATE_AR) {
 15487:         XEiJ.mpuCycleCount += 8;
 15488:         return (XEiJ.regRn[ 8] += 4) - 4;
 15489:       }
 15490:       //fallthrough
 15491:     case 0b011_001:  //(A1)+
 15492:       if (XEiJ.EFA_SEPARATE_AR) {
 15493:         XEiJ.mpuCycleCount += 8;
 15494:         return (XEiJ.regRn[ 9] += 4) - 4;
 15495:       }
 15496:       //fallthrough
 15497:     case 0b011_010:  //(A2)+
 15498:       if (XEiJ.EFA_SEPARATE_AR) {
 15499:         XEiJ.mpuCycleCount += 8;
 15500:         return (XEiJ.regRn[10] += 4) - 4;
 15501:       }
 15502:       //fallthrough
 15503:     case 0b011_011:  //(A3)+
 15504:       if (XEiJ.EFA_SEPARATE_AR) {
 15505:         XEiJ.mpuCycleCount += 8;
 15506:         return (XEiJ.regRn[11] += 4) - 4;
 15507:       }
 15508:       //fallthrough
 15509:     case 0b011_100:  //(A4)+
 15510:       if (XEiJ.EFA_SEPARATE_AR) {
 15511:         XEiJ.mpuCycleCount += 8;
 15512:         return (XEiJ.regRn[12] += 4) - 4;
 15513:       }
 15514:       //fallthrough
 15515:     case 0b011_101:  //(A5)+
 15516:       if (XEiJ.EFA_SEPARATE_AR) {
 15517:         XEiJ.mpuCycleCount += 8;
 15518:         return (XEiJ.regRn[13] += 4) - 4;
 15519:       }
 15520:       //fallthrough
 15521:     case 0b011_110:  //(A6)+
 15522:       if (XEiJ.EFA_SEPARATE_AR) {
 15523:         XEiJ.mpuCycleCount += 8;
 15524:         return (XEiJ.regRn[14] += 4) - 4;
 15525:       }
 15526:       //fallthrough
 15527:     case 0b011_111:  //(A7)+
 15528:       if (XEiJ.EFA_SEPARATE_AR) {
 15529:         XEiJ.mpuCycleCount += 8;
 15530:         return (XEiJ.regRn[15] += 4) - 4;
 15531:       } else {
 15532:         XEiJ.mpuCycleCount += 8;
 15533:         return (XEiJ.regRn[ea - (0b011_000 - 8)] += 4) - 4;
 15534:       }
 15535:     case 0b100_000:  //-(A0)
 15536:       if (XEiJ.EFA_SEPARATE_AR) {
 15537:         XEiJ.mpuCycleCount += 10;
 15538:         return XEiJ.regRn[ 8] -= 4;
 15539:       }
 15540:       //fallthrough
 15541:     case 0b100_001:  //-(A1)
 15542:       if (XEiJ.EFA_SEPARATE_AR) {
 15543:         XEiJ.mpuCycleCount += 10;
 15544:         return XEiJ.regRn[ 9] -= 4;
 15545:       }
 15546:       //fallthrough
 15547:     case 0b100_010:  //-(A2)
 15548:       if (XEiJ.EFA_SEPARATE_AR) {
 15549:         XEiJ.mpuCycleCount += 10;
 15550:         return XEiJ.regRn[10] -= 4;
 15551:       }
 15552:       //fallthrough
 15553:     case 0b100_011:  //-(A3)
 15554:       if (XEiJ.EFA_SEPARATE_AR) {
 15555:         XEiJ.mpuCycleCount += 10;
 15556:         return XEiJ.regRn[11] -= 4;
 15557:       }
 15558:       //fallthrough
 15559:     case 0b100_100:  //-(A4)
 15560:       if (XEiJ.EFA_SEPARATE_AR) {
 15561:         XEiJ.mpuCycleCount += 10;
 15562:         return XEiJ.regRn[12] -= 4;
 15563:       }
 15564:       //fallthrough
 15565:     case 0b100_101:  //-(A5)
 15566:       if (XEiJ.EFA_SEPARATE_AR) {
 15567:         XEiJ.mpuCycleCount += 10;
 15568:         return XEiJ.regRn[13] -= 4;
 15569:       }
 15570:       //fallthrough
 15571:     case 0b100_110:  //-(A6)
 15572:       if (XEiJ.EFA_SEPARATE_AR) {
 15573:         XEiJ.mpuCycleCount += 10;
 15574:         return XEiJ.regRn[14] -= 4;
 15575:       }
 15576:       //fallthrough
 15577:     case 0b100_111:  //-(A7)
 15578:       if (XEiJ.EFA_SEPARATE_AR) {
 15579:         XEiJ.mpuCycleCount += 10;
 15580:         return XEiJ.regRn[15] -= 4;
 15581:       } else {
 15582:         XEiJ.mpuCycleCount += 10;
 15583:         return XEiJ.regRn[ea - (0b100_000 - 8)] -= 4;
 15584:       }
 15585:     case 0b101_000:  //(d16,A0)
 15586:     case 0b101_001:  //(d16,A1)
 15587:     case 0b101_010:  //(d16,A2)
 15588:     case 0b101_011:  //(d16,A3)
 15589:     case 0b101_100:  //(d16,A4)
 15590:     case 0b101_101:  //(d16,A5)
 15591:     case 0b101_110:  //(d16,A6)
 15592:     case 0b101_111:  //(d16,A7)
 15593:       XEiJ.mpuCycleCount += 12;
 15594:       if (XEiJ.MPU_COMPOUND_POSTINCREMENT) {
 15595:         return (XEiJ.regRn[ea - (0b101_000 - 8)]  //ベースレジスタ
 15596:                 + XEiJ.busRwse ((XEiJ.regPC += 2) - 2));  //pcws。ワードディスプレースメント
 15597:       } else {
 15598:         t = XEiJ.regPC;
 15599:         XEiJ.regPC = t + 2;
 15600:         return (XEiJ.regRn[ea - (0b101_000 - 8)]  //ベースレジスタ
 15601:                 + XEiJ.busRwse (t));  //pcws。ワードディスプレースメント
 15602:       }
 15603:     case 0b110_000:  //(d8,A0,Rn.wl)
 15604:     case 0b110_001:  //(d8,A1,Rn.wl)
 15605:     case 0b110_010:  //(d8,A2,Rn.wl)
 15606:     case 0b110_011:  //(d8,A3,Rn.wl)
 15607:     case 0b110_100:  //(d8,A4,Rn.wl)
 15608:     case 0b110_101:  //(d8,A5,Rn.wl)
 15609:     case 0b110_110:  //(d8,A6,Rn.wl)
 15610:     case 0b110_111:  //(d8,A7,Rn.wl)
 15611:       XEiJ.mpuCycleCount += 14;
 15612:       if (XEiJ.MPU_COMPOUND_POSTINCREMENT) {
 15613:         w = XEiJ.busRwze ((XEiJ.regPC += 2) - 2);  //pcwz。拡張ワード
 15614:       } else {
 15615:         w = XEiJ.regPC;
 15616:         XEiJ.regPC = w + 2;
 15617:         w = XEiJ.busRwze (w);  //pcwz。拡張ワード
 15618:       }
 15619:       return (XEiJ.regRn[ea - (0b110_000 - 8)]  //ベースレジスタ
 15620:               + (byte) w  //バイトディスプレースメント
 15621:               + (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] :  //ワードインデックス
 15622:                  XEiJ.regRn[w >> 12]));  //ロングインデックス
 15623:     case 0b111_000:  //(xxx).W
 15624:       XEiJ.mpuCycleCount += 12;
 15625:       return XEiJ.busRwse ((XEiJ.regPC += 2) - 2);  //pcws
 15626:     case 0b111_001:  //(xxx).L
 15627:       XEiJ.mpuCycleCount += 16;
 15628:       return XEiJ.busRlse ((XEiJ.regPC += 4) - 4);  //pcls
 15629:     case 0b111_010:  //(d16,PC)
 15630:       XEiJ.mpuCycleCount += 12;
 15631:       t = XEiJ.regPC;
 15632:       XEiJ.regPC = t + 2;
 15633:       return (t  //ベースレジスタ
 15634:               + XEiJ.busRwse (t));  //pcws。ワードディスプレースメント
 15635:     case 0b111_011:  //(d8,PC,Rn.wl)
 15636:       XEiJ.mpuCycleCount += 14;
 15637:       t = XEiJ.regPC;
 15638:       XEiJ.regPC = t + 2;
 15639:       w = XEiJ.busRwze (t);  //pcwz。拡張ワード
 15640:       return (t  //ベースレジスタ
 15641:               + (byte) w  //バイトディスプレースメント
 15642:               + (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] :  //ワードインデックス
 15643:                  XEiJ.regRn[w >> 12]));  //ロングインデックス
 15644:     }  //switch
 15645:     XEiJ.mpuCycleCount += 34;
 15646:     M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION;
 15647:     throw M68kException.m6eSignal;
 15648:   }  //efaMemLong
 15649: 
 15650:   //a = efaMltLong (ea)  //|  M+-WXZ  |
 15651:   //  メモリ可変モードのロングオペランドの実効アドレスを求める
 15652:   //  efaMemLongとの違いは(d16,PC)と(d8,PC,Rn.wl)がないこと
 15653:   @SuppressWarnings ("fallthrough") public static int efaMltLong (int ea) throws M68kException {
 15654:     int t, w;
 15655:     switch (ea) {
 15656:     case 0b010_000:  //(A0)
 15657:       if (XEiJ.EFA_SEPARATE_AR) {
 15658:         XEiJ.mpuCycleCount += 8;
 15659:         return XEiJ.regRn[ 8];
 15660:       }
 15661:       //fallthrough
 15662:     case 0b010_001:  //(A1)
 15663:       if (XEiJ.EFA_SEPARATE_AR) {
 15664:         XEiJ.mpuCycleCount += 8;
 15665:         return XEiJ.regRn[ 9];
 15666:       }
 15667:       //fallthrough
 15668:     case 0b010_010:  //(A2)
 15669:       if (XEiJ.EFA_SEPARATE_AR) {
 15670:         XEiJ.mpuCycleCount += 8;
 15671:         return XEiJ.regRn[10];
 15672:       }
 15673:       //fallthrough
 15674:     case 0b010_011:  //(A3)
 15675:       if (XEiJ.EFA_SEPARATE_AR) {
 15676:         XEiJ.mpuCycleCount += 8;
 15677:         return XEiJ.regRn[11];
 15678:       }
 15679:       //fallthrough
 15680:     case 0b010_100:  //(A4)
 15681:       if (XEiJ.EFA_SEPARATE_AR) {
 15682:         XEiJ.mpuCycleCount += 8;
 15683:         return XEiJ.regRn[12];
 15684:       }
 15685:       //fallthrough
 15686:     case 0b010_101:  //(A5)
 15687:       if (XEiJ.EFA_SEPARATE_AR) {
 15688:         XEiJ.mpuCycleCount += 8;
 15689:         return XEiJ.regRn[13];
 15690:       }
 15691:       //fallthrough
 15692:     case 0b010_110:  //(A6)
 15693:       if (XEiJ.EFA_SEPARATE_AR) {
 15694:         XEiJ.mpuCycleCount += 8;
 15695:         return XEiJ.regRn[14];
 15696:       }
 15697:       //fallthrough
 15698:     case 0b010_111:  //(A7)
 15699:       if (XEiJ.EFA_SEPARATE_AR) {
 15700:         XEiJ.mpuCycleCount += 8;
 15701:         return XEiJ.regRn[15];
 15702:       } else {
 15703:         XEiJ.mpuCycleCount += 8;
 15704:         return XEiJ.regRn[ea - (0b010_000 - 8)];
 15705:       }
 15706:     case 0b011_000:  //(A0)+
 15707:       if (XEiJ.EFA_SEPARATE_AR) {
 15708:         XEiJ.mpuCycleCount += 8;
 15709:         return (XEiJ.regRn[ 8] += 4) - 4;
 15710:       }
 15711:       //fallthrough
 15712:     case 0b011_001:  //(A1)+
 15713:       if (XEiJ.EFA_SEPARATE_AR) {
 15714:         XEiJ.mpuCycleCount += 8;
 15715:         return (XEiJ.regRn[ 9] += 4) - 4;
 15716:       }
 15717:       //fallthrough
 15718:     case 0b011_010:  //(A2)+
 15719:       if (XEiJ.EFA_SEPARATE_AR) {
 15720:         XEiJ.mpuCycleCount += 8;
 15721:         return (XEiJ.regRn[10] += 4) - 4;
 15722:       }
 15723:       //fallthrough
 15724:     case 0b011_011:  //(A3)+
 15725:       if (XEiJ.EFA_SEPARATE_AR) {
 15726:         XEiJ.mpuCycleCount += 8;
 15727:         return (XEiJ.regRn[11] += 4) - 4;
 15728:       }
 15729:       //fallthrough
 15730:     case 0b011_100:  //(A4)+
 15731:       if (XEiJ.EFA_SEPARATE_AR) {
 15732:         XEiJ.mpuCycleCount += 8;
 15733:         return (XEiJ.regRn[12] += 4) - 4;
 15734:       }
 15735:       //fallthrough
 15736:     case 0b011_101:  //(A5)+
 15737:       if (XEiJ.EFA_SEPARATE_AR) {
 15738:         XEiJ.mpuCycleCount += 8;
 15739:         return (XEiJ.regRn[13] += 4) - 4;
 15740:       }
 15741:       //fallthrough
 15742:     case 0b011_110:  //(A6)+
 15743:       if (XEiJ.EFA_SEPARATE_AR) {
 15744:         XEiJ.mpuCycleCount += 8;
 15745:         return (XEiJ.regRn[14] += 4) - 4;
 15746:       }
 15747:       //fallthrough
 15748:     case 0b011_111:  //(A7)+
 15749:       if (XEiJ.EFA_SEPARATE_AR) {
 15750:         XEiJ.mpuCycleCount += 8;
 15751:         return (XEiJ.regRn[15] += 4) - 4;
 15752:       } else {
 15753:         XEiJ.mpuCycleCount += 8;
 15754:         return (XEiJ.regRn[ea - (0b011_000 - 8)] += 4) - 4;
 15755:       }
 15756:     case 0b100_000:  //-(A0)
 15757:       if (XEiJ.EFA_SEPARATE_AR) {
 15758:         XEiJ.mpuCycleCount += 10;
 15759:         return XEiJ.regRn[ 8] -= 4;
 15760:       }
 15761:       //fallthrough
 15762:     case 0b100_001:  //-(A1)
 15763:       if (XEiJ.EFA_SEPARATE_AR) {
 15764:         XEiJ.mpuCycleCount += 10;
 15765:         return XEiJ.regRn[ 9] -= 4;
 15766:       }
 15767:       //fallthrough
 15768:     case 0b100_010:  //-(A2)
 15769:       if (XEiJ.EFA_SEPARATE_AR) {
 15770:         XEiJ.mpuCycleCount += 10;
 15771:         return XEiJ.regRn[10] -= 4;
 15772:       }
 15773:       //fallthrough
 15774:     case 0b100_011:  //-(A3)
 15775:       if (XEiJ.EFA_SEPARATE_AR) {
 15776:         XEiJ.mpuCycleCount += 10;
 15777:         return XEiJ.regRn[11] -= 4;
 15778:       }
 15779:       //fallthrough
 15780:     case 0b100_100:  //-(A4)
 15781:       if (XEiJ.EFA_SEPARATE_AR) {
 15782:         XEiJ.mpuCycleCount += 10;
 15783:         return XEiJ.regRn[12] -= 4;
 15784:       }
 15785:       //fallthrough
 15786:     case 0b100_101:  //-(A5)
 15787:       if (XEiJ.EFA_SEPARATE_AR) {
 15788:         XEiJ.mpuCycleCount += 10;
 15789:         return XEiJ.regRn[13] -= 4;
 15790:       }
 15791:       //fallthrough
 15792:     case 0b100_110:  //-(A6)
 15793:       if (XEiJ.EFA_SEPARATE_AR) {
 15794:         XEiJ.mpuCycleCount += 10;
 15795:         return XEiJ.regRn[14] -= 4;
 15796:       }
 15797:       //fallthrough
 15798:     case 0b100_111:  //-(A7)
 15799:       if (XEiJ.EFA_SEPARATE_AR) {
 15800:         XEiJ.mpuCycleCount += 10;
 15801:         return XEiJ.regRn[15] -= 4;
 15802:       } else {
 15803:         XEiJ.mpuCycleCount += 10;
 15804:         return XEiJ.regRn[ea - (0b100_000 - 8)] -= 4;
 15805:       }
 15806:     case 0b101_000:  //(d16,A0)
 15807:     case 0b101_001:  //(d16,A1)
 15808:     case 0b101_010:  //(d16,A2)
 15809:     case 0b101_011:  //(d16,A3)
 15810:     case 0b101_100:  //(d16,A4)
 15811:     case 0b101_101:  //(d16,A5)
 15812:     case 0b101_110:  //(d16,A6)
 15813:     case 0b101_111:  //(d16,A7)
 15814:       XEiJ.mpuCycleCount += 12;
 15815:       if (XEiJ.MPU_COMPOUND_POSTINCREMENT) {
 15816:         return (XEiJ.regRn[ea - (0b101_000 - 8)]  //ベースレジスタ
 15817:                 + XEiJ.busRwse ((XEiJ.regPC += 2) - 2));  //pcws。ワードディスプレースメント
 15818:       } else {
 15819:         t = XEiJ.regPC;
 15820:         XEiJ.regPC = t + 2;
 15821:         return (XEiJ.regRn[ea - (0b101_000 - 8)]  //ベースレジスタ
 15822:                 + XEiJ.busRwse (t));  //pcws。ワードディスプレースメント
 15823:       }
 15824:     case 0b110_000:  //(d8,A0,Rn.wl)
 15825:     case 0b110_001:  //(d8,A1,Rn.wl)
 15826:     case 0b110_010:  //(d8,A2,Rn.wl)
 15827:     case 0b110_011:  //(d8,A3,Rn.wl)
 15828:     case 0b110_100:  //(d8,A4,Rn.wl)
 15829:     case 0b110_101:  //(d8,A5,Rn.wl)
 15830:     case 0b110_110:  //(d8,A6,Rn.wl)
 15831:     case 0b110_111:  //(d8,A7,Rn.wl)
 15832:       XEiJ.mpuCycleCount += 14;
 15833:       if (XEiJ.MPU_COMPOUND_POSTINCREMENT) {
 15834:         w = XEiJ.busRwze ((XEiJ.regPC += 2) - 2);  //pcwz。拡張ワード
 15835:       } else {
 15836:         w = XEiJ.regPC;
 15837:         XEiJ.regPC = w + 2;
 15838:         w = XEiJ.busRwze (w);  //pcwz。拡張ワード
 15839:       }
 15840:       return (XEiJ.regRn[ea - (0b110_000 - 8)]  //ベースレジスタ
 15841:               + (byte) w  //バイトディスプレースメント
 15842:               + (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] :  //ワードインデックス
 15843:                  XEiJ.regRn[w >> 12]));  //ロングインデックス
 15844:     case 0b111_000:  //(xxx).W
 15845:       XEiJ.mpuCycleCount += 12;
 15846:       return XEiJ.busRwse ((XEiJ.regPC += 2) - 2);  //pcws
 15847:     case 0b111_001:  //(xxx).L
 15848:       XEiJ.mpuCycleCount += 16;
 15849:       return XEiJ.busRlse ((XEiJ.regPC += 4) - 4);  //pcls
 15850:     }  //switch
 15851:     XEiJ.mpuCycleCount += 34;
 15852:     M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION;
 15853:     throw M68kException.m6eSignal;
 15854:   }  //efaMltLong
 15855: 
 15856:   //a = efaCntLong (ea)  //|  M  WXZP |
 15857:   //  制御モードのロングオペランドの実効アドレスを求める
 15858:   //  efaMemLongとの違いは(Ar)+と-(Ar)がないこと
 15859:   @SuppressWarnings ("fallthrough") public static int efaCntLong (int ea) throws M68kException {
 15860:     int t, w;
 15861:     switch (ea) {
 15862:     case 0b010_000:  //(A0)
 15863:       if (XEiJ.EFA_SEPARATE_AR) {
 15864:         XEiJ.mpuCycleCount += 8;
 15865:         return XEiJ.regRn[ 8];
 15866:       }
 15867:       //fallthrough
 15868:     case 0b010_001:  //(A1)
 15869:       if (XEiJ.EFA_SEPARATE_AR) {
 15870:         XEiJ.mpuCycleCount += 8;
 15871:         return XEiJ.regRn[ 9];
 15872:       }
 15873:       //fallthrough
 15874:     case 0b010_010:  //(A2)
 15875:       if (XEiJ.EFA_SEPARATE_AR) {
 15876:         XEiJ.mpuCycleCount += 8;
 15877:         return XEiJ.regRn[10];
 15878:       }
 15879:       //fallthrough
 15880:     case 0b010_011:  //(A3)
 15881:       if (XEiJ.EFA_SEPARATE_AR) {
 15882:         XEiJ.mpuCycleCount += 8;
 15883:         return XEiJ.regRn[11];
 15884:       }
 15885:       //fallthrough
 15886:     case 0b010_100:  //(A4)
 15887:       if (XEiJ.EFA_SEPARATE_AR) {
 15888:         XEiJ.mpuCycleCount += 8;
 15889:         return XEiJ.regRn[12];
 15890:       }
 15891:       //fallthrough
 15892:     case 0b010_101:  //(A5)
 15893:       if (XEiJ.EFA_SEPARATE_AR) {
 15894:         XEiJ.mpuCycleCount += 8;
 15895:         return XEiJ.regRn[13];
 15896:       }
 15897:       //fallthrough
 15898:     case 0b010_110:  //(A6)
 15899:       if (XEiJ.EFA_SEPARATE_AR) {
 15900:         XEiJ.mpuCycleCount += 8;
 15901:         return XEiJ.regRn[14];
 15902:       }
 15903:       //fallthrough
 15904:     case 0b010_111:  //(A7)
 15905:       if (XEiJ.EFA_SEPARATE_AR) {
 15906:         XEiJ.mpuCycleCount += 8;
 15907:         return XEiJ.regRn[15];
 15908:       } else {
 15909:         XEiJ.mpuCycleCount += 8;
 15910:         return XEiJ.regRn[ea - (0b010_000 - 8)];
 15911:       }
 15912:     case 0b101_000:  //(d16,A0)
 15913:     case 0b101_001:  //(d16,A1)
 15914:     case 0b101_010:  //(d16,A2)
 15915:     case 0b101_011:  //(d16,A3)
 15916:     case 0b101_100:  //(d16,A4)
 15917:     case 0b101_101:  //(d16,A5)
 15918:     case 0b101_110:  //(d16,A6)
 15919:     case 0b101_111:  //(d16,A7)
 15920:       XEiJ.mpuCycleCount += 12;
 15921:       if (XEiJ.MPU_COMPOUND_POSTINCREMENT) {
 15922:         return (XEiJ.regRn[ea - (0b101_000 - 8)]  //ベースレジスタ
 15923:                 + XEiJ.busRwse ((XEiJ.regPC += 2) - 2));  //pcws。ワードディスプレースメント
 15924:       } else {
 15925:         t = XEiJ.regPC;
 15926:         XEiJ.regPC = t + 2;
 15927:         return (XEiJ.regRn[ea - (0b101_000 - 8)]  //ベースレジスタ
 15928:                 + XEiJ.busRwse (t));  //pcws。ワードディスプレースメント
 15929:       }
 15930:     case 0b110_000:  //(d8,A0,Rn.wl)
 15931:     case 0b110_001:  //(d8,A1,Rn.wl)
 15932:     case 0b110_010:  //(d8,A2,Rn.wl)
 15933:     case 0b110_011:  //(d8,A3,Rn.wl)
 15934:     case 0b110_100:  //(d8,A4,Rn.wl)
 15935:     case 0b110_101:  //(d8,A5,Rn.wl)
 15936:     case 0b110_110:  //(d8,A6,Rn.wl)
 15937:     case 0b110_111:  //(d8,A7,Rn.wl)
 15938:       XEiJ.mpuCycleCount += 14;
 15939:       if (XEiJ.MPU_COMPOUND_POSTINCREMENT) {
 15940:         w = XEiJ.busRwze ((XEiJ.regPC += 2) - 2);  //pcwz。拡張ワード
 15941:       } else {
 15942:         w = XEiJ.regPC;
 15943:         XEiJ.regPC = w + 2;
 15944:         w = XEiJ.busRwze (w);  //pcwz。拡張ワード
 15945:       }
 15946:       return (XEiJ.regRn[ea - (0b110_000 - 8)]  //ベースレジスタ
 15947:               + (byte) w  //バイトディスプレースメント
 15948:               + (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] :  //ワードインデックス
 15949:                  XEiJ.regRn[w >> 12]));  //ロングインデックス
 15950:     case 0b111_000:  //(xxx).W
 15951:       XEiJ.mpuCycleCount += 12;
 15952:       return XEiJ.busRwse ((XEiJ.regPC += 2) - 2);  //pcws
 15953:     case 0b111_001:  //(xxx).L
 15954:       XEiJ.mpuCycleCount += 16;
 15955:       return XEiJ.busRlse ((XEiJ.regPC += 4) - 4);  //pcls
 15956:     case 0b111_010:  //(d16,PC)
 15957:       XEiJ.mpuCycleCount += 12;
 15958:       t = XEiJ.regPC;
 15959:       XEiJ.regPC = t + 2;
 15960:       return (t  //ベースレジスタ
 15961:               + XEiJ.busRwse (t));  //pcws。ワードディスプレースメント
 15962:     case 0b111_011:  //(d8,PC,Rn.wl)
 15963:       XEiJ.mpuCycleCount += 14;
 15964:       t = XEiJ.regPC;
 15965:       XEiJ.regPC = t + 2;
 15966:       w = XEiJ.busRwze (t);  //pcwz。拡張ワード
 15967:       return (t  //ベースレジスタ
 15968:               + (byte) w  //バイトディスプレースメント
 15969:               + (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] :  //ワードインデックス
 15970:                  XEiJ.regRn[w >> 12]));  //ロングインデックス
 15971:     }  //switch
 15972:     XEiJ.mpuCycleCount += 34;
 15973:     M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION;
 15974:     throw M68kException.m6eSignal;
 15975:   }  //efaCntLong
 15976: 
 15977:   //a = efaCltLong (ea)  //|  M  WXZ  |
 15978:   //  制御可変モードのワードオペランドの実効アドレスを求める
 15979:   //  efaCntLongとの違いは(d16,PC)と(d8,PC,Rn.wl)がないこと
 15980:   @SuppressWarnings ("fallthrough") public static int efaCltLong (int ea) throws M68kException {
 15981:     int t, w;
 15982:     switch (ea) {
 15983:     case 0b010_000:  //(A0)
 15984:       if (XEiJ.EFA_SEPARATE_AR) {
 15985:         XEiJ.mpuCycleCount += 8;
 15986:         return XEiJ.regRn[ 8];
 15987:       }
 15988:       //fallthrough
 15989:     case 0b010_001:  //(A1)
 15990:       if (XEiJ.EFA_SEPARATE_AR) {
 15991:         XEiJ.mpuCycleCount += 8;
 15992:         return XEiJ.regRn[ 9];
 15993:       }
 15994:       //fallthrough
 15995:     case 0b010_010:  //(A2)
 15996:       if (XEiJ.EFA_SEPARATE_AR) {
 15997:         XEiJ.mpuCycleCount += 8;
 15998:         return XEiJ.regRn[10];
 15999:       }
 16000:       //fallthrough
 16001:     case 0b010_011:  //(A3)
 16002:       if (XEiJ.EFA_SEPARATE_AR) {
 16003:         XEiJ.mpuCycleCount += 8;
 16004:         return XEiJ.regRn[11];
 16005:       }
 16006:       //fallthrough
 16007:     case 0b010_100:  //(A4)
 16008:       if (XEiJ.EFA_SEPARATE_AR) {
 16009:         XEiJ.mpuCycleCount += 8;
 16010:         return XEiJ.regRn[12];
 16011:       }
 16012:       //fallthrough
 16013:     case 0b010_101:  //(A5)
 16014:       if (XEiJ.EFA_SEPARATE_AR) {
 16015:         XEiJ.mpuCycleCount += 8;
 16016:         return XEiJ.regRn[13];
 16017:       }
 16018:       //fallthrough
 16019:     case 0b010_110:  //(A6)
 16020:       if (XEiJ.EFA_SEPARATE_AR) {
 16021:         XEiJ.mpuCycleCount += 8;
 16022:         return XEiJ.regRn[14];
 16023:       }
 16024:       //fallthrough
 16025:     case 0b010_111:  //(A7)
 16026:       if (XEiJ.EFA_SEPARATE_AR) {
 16027:         XEiJ.mpuCycleCount += 8;
 16028:         return XEiJ.regRn[15];
 16029:       } else {
 16030:         XEiJ.mpuCycleCount += 8;
 16031:         return XEiJ.regRn[ea - (0b010_000 - 8)];
 16032:       }
 16033:     case 0b101_000:  //(d16,A0)
 16034:     case 0b101_001:  //(d16,A1)
 16035:     case 0b101_010:  //(d16,A2)
 16036:     case 0b101_011:  //(d16,A3)
 16037:     case 0b101_100:  //(d16,A4)
 16038:     case 0b101_101:  //(d16,A5)
 16039:     case 0b101_110:  //(d16,A6)
 16040:     case 0b101_111:  //(d16,A7)
 16041:       XEiJ.mpuCycleCount += 12;
 16042:       if (XEiJ.MPU_COMPOUND_POSTINCREMENT) {
 16043:         return (XEiJ.regRn[ea - (0b101_000 - 8)]  //ベースレジスタ
 16044:                 + XEiJ.busRwse ((XEiJ.regPC += 2) - 2));  //pcws。ワードディスプレースメント
 16045:       } else {
 16046:         t = XEiJ.regPC;
 16047:         XEiJ.regPC = t + 2;
 16048:         return (XEiJ.regRn[ea - (0b101_000 - 8)]  //ベースレジスタ
 16049:                 + XEiJ.busRwse (t));  //pcws。ワードディスプレースメント
 16050:       }
 16051:     case 0b110_000:  //(d8,A0,Rn.wl)
 16052:     case 0b110_001:  //(d8,A1,Rn.wl)
 16053:     case 0b110_010:  //(d8,A2,Rn.wl)
 16054:     case 0b110_011:  //(d8,A3,Rn.wl)
 16055:     case 0b110_100:  //(d8,A4,Rn.wl)
 16056:     case 0b110_101:  //(d8,A5,Rn.wl)
 16057:     case 0b110_110:  //(d8,A6,Rn.wl)
 16058:     case 0b110_111:  //(d8,A7,Rn.wl)
 16059:       XEiJ.mpuCycleCount += 14;
 16060:       if (XEiJ.MPU_COMPOUND_POSTINCREMENT) {
 16061:         w = XEiJ.busRwze ((XEiJ.regPC += 2) - 2);  //pcwz。拡張ワード
 16062:       } else {
 16063:         w = XEiJ.regPC;
 16064:         XEiJ.regPC = w + 2;
 16065:         w = XEiJ.busRwze (w);  //pcwz。拡張ワード
 16066:       }
 16067:       return (XEiJ.regRn[ea - (0b110_000 - 8)]  //ベースレジスタ
 16068:               + (byte) w  //バイトディスプレースメント
 16069:               + (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] :  //ワードインデックス
 16070:                  XEiJ.regRn[w >> 12]));  //ロングインデックス
 16071:     case 0b111_000:  //(xxx).W
 16072:       XEiJ.mpuCycleCount += 12;
 16073:       return XEiJ.busRwse ((XEiJ.regPC += 2) - 2);  //pcws
 16074:     case 0b111_001:  //(xxx).L
 16075:       XEiJ.mpuCycleCount += 16;
 16076:       return XEiJ.busRlse ((XEiJ.regPC += 4) - 4);  //pcls
 16077:     }  //switch
 16078:     XEiJ.mpuCycleCount += 34;
 16079:     M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION;
 16080:     throw M68kException.m6eSignal;
 16081:   }  //efaCltLong
 16082: 
 16083:   //a = efaAnyQuad (ea)  //|  M+-WXZPI|
 16084:   //  任意のモードのクワッドオペランドの実効アドレスを求める
 16085:   //  efaAnyLongとの違いは(Ar)+と-(Ar)がArを8変化させることと、#<data>がPCを8変化させることと、
 16086:   //  オペランドのアクセスが2ワード増える分の8サイクルが追加されていること
 16087:   @SuppressWarnings ("fallthrough") public static int efaAnyQuad (int ea) throws M68kException {
 16088:     int t, w;
 16089:     switch (ea) {
 16090:     case 0b010_000:  //(A0)
 16091:       if (XEiJ.EFA_SEPARATE_AR) {
 16092:         XEiJ.mpuCycleCount += 16;
 16093:         return XEiJ.regRn[ 8];
 16094:       }
 16095:       //fallthrough
 16096:     case 0b010_001:  //(A1)
 16097:       if (XEiJ.EFA_SEPARATE_AR) {
 16098:         XEiJ.mpuCycleCount += 16;
 16099:         return XEiJ.regRn[ 9];
 16100:       }
 16101:       //fallthrough
 16102:     case 0b010_010:  //(A2)
 16103:       if (XEiJ.EFA_SEPARATE_AR) {
 16104:         XEiJ.mpuCycleCount += 16;
 16105:         return XEiJ.regRn[10];
 16106:       }
 16107:       //fallthrough
 16108:     case 0b010_011:  //(A3)
 16109:       if (XEiJ.EFA_SEPARATE_AR) {
 16110:         XEiJ.mpuCycleCount += 16;
 16111:         return XEiJ.regRn[11];
 16112:       }
 16113:       //fallthrough
 16114:     case 0b010_100:  //(A4)
 16115:       if (XEiJ.EFA_SEPARATE_AR) {
 16116:         XEiJ.mpuCycleCount += 16;
 16117:         return XEiJ.regRn[12];
 16118:       }
 16119:       //fallthrough
 16120:     case 0b010_101:  //(A5)
 16121:       if (XEiJ.EFA_SEPARATE_AR) {
 16122:         XEiJ.mpuCycleCount += 16;
 16123:         return XEiJ.regRn[13];
 16124:       }
 16125:       //fallthrough
 16126:     case 0b010_110:  //(A6)
 16127:       if (XEiJ.EFA_SEPARATE_AR) {
 16128:         XEiJ.mpuCycleCount += 16;
 16129:         return XEiJ.regRn[14];
 16130:       }
 16131:       //fallthrough
 16132:     case 0b010_111:  //(A7)
 16133:       if (XEiJ.EFA_SEPARATE_AR) {
 16134:         XEiJ.mpuCycleCount += 16;
 16135:         return XEiJ.regRn[15];
 16136:       } else {
 16137:         XEiJ.mpuCycleCount += 16;
 16138:         return XEiJ.regRn[ea - (0b010_000 - 8)];
 16139:       }
 16140:     case 0b011_000:  //(A0)+
 16141:       if (XEiJ.EFA_SEPARATE_AR) {
 16142:         XEiJ.mpuCycleCount += 16;
 16143:         return (XEiJ.regRn[ 8] += 8) - 8;
 16144:       }
 16145:       //fallthrough
 16146:     case 0b011_001:  //(A1)+
 16147:       if (XEiJ.EFA_SEPARATE_AR) {
 16148:         XEiJ.mpuCycleCount += 16;
 16149:         return (XEiJ.regRn[ 9] += 8) - 8;
 16150:       }
 16151:       //fallthrough
 16152:     case 0b011_010:  //(A2)+
 16153:       if (XEiJ.EFA_SEPARATE_AR) {
 16154:         XEiJ.mpuCycleCount += 16;
 16155:         return (XEiJ.regRn[10] += 8) - 8;
 16156:       }
 16157:       //fallthrough
 16158:     case 0b011_011:  //(A3)+
 16159:       if (XEiJ.EFA_SEPARATE_AR) {
 16160:         XEiJ.mpuCycleCount += 16;
 16161:         return (XEiJ.regRn[11] += 8) - 8;
 16162:       }
 16163:       //fallthrough
 16164:     case 0b011_100:  //(A4)+
 16165:       if (XEiJ.EFA_SEPARATE_AR) {
 16166:         XEiJ.mpuCycleCount += 16;
 16167:         return (XEiJ.regRn[12] += 8) - 8;
 16168:       }
 16169:       //fallthrough
 16170:     case 0b011_101:  //(A5)+
 16171:       if (XEiJ.EFA_SEPARATE_AR) {
 16172:         XEiJ.mpuCycleCount += 16;
 16173:         return (XEiJ.regRn[13] += 8) - 8;
 16174:       }
 16175:       //fallthrough
 16176:     case 0b011_110:  //(A6)+
 16177:       if (XEiJ.EFA_SEPARATE_AR) {
 16178:         XEiJ.mpuCycleCount += 16;
 16179:         return (XEiJ.regRn[14] += 8) - 8;
 16180:       }
 16181:       //fallthrough
 16182:     case 0b011_111:  //(A7)+
 16183:       if (XEiJ.EFA_SEPARATE_AR) {
 16184:         XEiJ.mpuCycleCount += 16;
 16185:         return (XEiJ.regRn[15] += 8) - 8;
 16186:       } else {
 16187:         XEiJ.mpuCycleCount += 16;
 16188:         return (XEiJ.regRn[ea - (0b011_000 - 8)] += 8) - 8;
 16189:       }
 16190:     case 0b100_000:  //-(A0)
 16191:       if (XEiJ.EFA_SEPARATE_AR) {
 16192:         XEiJ.mpuCycleCount += 18;
 16193:         return XEiJ.regRn[ 8] -= 8;
 16194:       }
 16195:       //fallthrough
 16196:     case 0b100_001:  //-(A1)
 16197:       if (XEiJ.EFA_SEPARATE_AR) {
 16198:         XEiJ.mpuCycleCount += 18;
 16199:         return XEiJ.regRn[ 9] -= 8;
 16200:       }
 16201:       //fallthrough
 16202:     case 0b100_010:  //-(A2)
 16203:       if (XEiJ.EFA_SEPARATE_AR) {
 16204:         XEiJ.mpuCycleCount += 18;
 16205:         return XEiJ.regRn[10] -= 8;
 16206:       }
 16207:       //fallthrough
 16208:     case 0b100_011:  //-(A3)
 16209:       if (XEiJ.EFA_SEPARATE_AR) {
 16210:         XEiJ.mpuCycleCount += 18;
 16211:         return XEiJ.regRn[11] -= 8;
 16212:       }
 16213:       //fallthrough
 16214:     case 0b100_100:  //-(A4)
 16215:       if (XEiJ.EFA_SEPARATE_AR) {
 16216:         XEiJ.mpuCycleCount += 18;
 16217:         return XEiJ.regRn[12] -= 8;
 16218:       }
 16219:       //fallthrough
 16220:     case 0b100_101:  //-(A5)
 16221:       if (XEiJ.EFA_SEPARATE_AR) {
 16222:         XEiJ.mpuCycleCount += 18;
 16223:         return XEiJ.regRn[13] -= 8;
 16224:       }
 16225:       //fallthrough
 16226:     case 0b100_110:  //-(A6)
 16227:       if (XEiJ.EFA_SEPARATE_AR) {
 16228:         XEiJ.mpuCycleCount += 18;
 16229:         return XEiJ.regRn[14] -= 8;
 16230:       }
 16231:       //fallthrough
 16232:     case 0b100_111:  //-(A7)
 16233:       if (XEiJ.EFA_SEPARATE_AR) {
 16234:         XEiJ.mpuCycleCount += 18;
 16235:         return XEiJ.regRn[15] -= 8;
 16236:       } else {
 16237:         XEiJ.mpuCycleCount += 18;
 16238:         return XEiJ.regRn[ea - (0b100_000 - 8)] -= 8;
 16239:       }
 16240:     case 0b101_000:  //(d16,A0)
 16241:     case 0b101_001:  //(d16,A1)
 16242:     case 0b101_010:  //(d16,A2)
 16243:     case 0b101_011:  //(d16,A3)
 16244:     case 0b101_100:  //(d16,A4)
 16245:     case 0b101_101:  //(d16,A5)
 16246:     case 0b101_110:  //(d16,A6)
 16247:     case 0b101_111:  //(d16,A7)
 16248:       XEiJ.mpuCycleCount += 20;
 16249:       if (XEiJ.MPU_COMPOUND_POSTINCREMENT) {
 16250:         return (XEiJ.regRn[ea - (0b101_000 - 8)]  //ベースレジスタ
 16251:                 + XEiJ.busRwse ((XEiJ.regPC += 2) - 2));  //pcws。ワードディスプレースメント
 16252:       } else {
 16253:         t = XEiJ.regPC;
 16254:         XEiJ.regPC = t + 2;
 16255:         return (XEiJ.regRn[ea - (0b101_000 - 8)]  //ベースレジスタ
 16256:                 + XEiJ.busRwse (t));  //pcws。ワードディスプレースメント
 16257:       }
 16258:     case 0b110_000:  //(d8,A0,Rn.wl)
 16259:     case 0b110_001:  //(d8,A1,Rn.wl)
 16260:     case 0b110_010:  //(d8,A2,Rn.wl)
 16261:     case 0b110_011:  //(d8,A3,Rn.wl)
 16262:     case 0b110_100:  //(d8,A4,Rn.wl)
 16263:     case 0b110_101:  //(d8,A5,Rn.wl)
 16264:     case 0b110_110:  //(d8,A6,Rn.wl)
 16265:     case 0b110_111:  //(d8,A7,Rn.wl)
 16266:       XEiJ.mpuCycleCount += 22;
 16267:       if (XEiJ.MPU_COMPOUND_POSTINCREMENT) {
 16268:         w = XEiJ.busRwze ((XEiJ.regPC += 2) - 2);  //pcwz。拡張ワード
 16269:       } else {
 16270:         w = XEiJ.regPC;
 16271:         XEiJ.regPC = w + 2;
 16272:         w = XEiJ.busRwze (w);  //pcwz。拡張ワード
 16273:       }
 16274:       return (XEiJ.regRn[ea - (0b110_000 - 8)]  //ベースレジスタ
 16275:               + (byte) w  //バイトディスプレースメント
 16276:               + (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] :  //ワードインデックス
 16277:                  XEiJ.regRn[w >> 12]));  //ロングインデックス
 16278:     case 0b111_000:  //(xxx).W
 16279:       XEiJ.mpuCycleCount += 20;
 16280:       return XEiJ.busRwse ((XEiJ.regPC += 2) - 2);  //pcws
 16281:     case 0b111_001:  //(xxx).L
 16282:       XEiJ.mpuCycleCount += 24;
 16283:       return XEiJ.busRlse ((XEiJ.regPC += 4) - 4);  //pcls
 16284:     case 0b111_010:  //(d16,PC)
 16285:       XEiJ.mpuCycleCount += 20;
 16286:       t = XEiJ.regPC;
 16287:       XEiJ.regPC = t + 2;
 16288:       return (t  //ベースレジスタ
 16289:               + XEiJ.busRwse (t));  //pcws。ワードディスプレースメント
 16290:     case 0b111_011:  //(d8,PC,Rn.wl)
 16291:       XEiJ.mpuCycleCount += 22;
 16292:       t = XEiJ.regPC;
 16293:       XEiJ.regPC = t + 2;
 16294:       w = XEiJ.busRwze (t);  //pcwz。拡張ワード
 16295:       return (t  //ベースレジスタ
 16296:               + (byte) w  //バイトディスプレースメント
 16297:               + (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] :  //ワードインデックス
 16298:                  XEiJ.regRn[w >> 12]));  //ロングインデックス
 16299:     case 0b111_100:  //#<data>
 16300:       XEiJ.mpuCycleCount += 16;
 16301:       if (XEiJ.MPU_COMPOUND_POSTINCREMENT) {
 16302:         return (XEiJ.regPC += 8) - 8;
 16303:       } else {
 16304:         t = XEiJ.regPC;
 16305:         XEiJ.regPC = t + 8;
 16306:         return t;
 16307:       }
 16308:     }  //switch
 16309:     XEiJ.mpuCycleCount += 34;
 16310:     M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION;
 16311:     throw M68kException.m6eSignal;
 16312:   }  //efaAnyQuad
 16313: 
 16314:   //a = efaMltQuad (ea)  //|  M+-WXZ  |
 16315:   //  メモリ可変モードのクワッドオペランドの実効アドレスを求める
 16316:   //  efaMltLongとの違いは(Ar)+と-(Ar)がArを8変化させることと、#<data>がPCを8変化させることと、
 16317:   //  オペランドのアクセスが2ワード増える分の8サイクルが追加されていること
 16318:   @SuppressWarnings ("fallthrough") public static int efaMltQuad (int ea) throws M68kException {
 16319:     int t, w;
 16320:     switch (ea) {
 16321:     case 0b010_000:  //(A0)
 16322:       if (XEiJ.EFA_SEPARATE_AR) {
 16323:         XEiJ.mpuCycleCount += 16;
 16324:         return XEiJ.regRn[ 8];
 16325:       }
 16326:       //fallthrough
 16327:     case 0b010_001:  //(A1)
 16328:       if (XEiJ.EFA_SEPARATE_AR) {
 16329:         XEiJ.mpuCycleCount += 16;
 16330:         return XEiJ.regRn[ 9];
 16331:       }
 16332:       //fallthrough
 16333:     case 0b010_010:  //(A2)
 16334:       if (XEiJ.EFA_SEPARATE_AR) {
 16335:         XEiJ.mpuCycleCount += 16;
 16336:         return XEiJ.regRn[10];
 16337:       }
 16338:       //fallthrough
 16339:     case 0b010_011:  //(A3)
 16340:       if (XEiJ.EFA_SEPARATE_AR) {
 16341:         XEiJ.mpuCycleCount += 16;
 16342:         return XEiJ.regRn[11];
 16343:       }
 16344:       //fallthrough
 16345:     case 0b010_100:  //(A4)
 16346:       if (XEiJ.EFA_SEPARATE_AR) {
 16347:         XEiJ.mpuCycleCount += 16;
 16348:         return XEiJ.regRn[12];
 16349:       }
 16350:       //fallthrough
 16351:     case 0b010_101:  //(A5)
 16352:       if (XEiJ.EFA_SEPARATE_AR) {
 16353:         XEiJ.mpuCycleCount += 16;
 16354:         return XEiJ.regRn[13];
 16355:       }
 16356:       //fallthrough
 16357:     case 0b010_110:  //(A6)
 16358:       if (XEiJ.EFA_SEPARATE_AR) {
 16359:         XEiJ.mpuCycleCount += 16;
 16360:         return XEiJ.regRn[14];
 16361:       }
 16362:       //fallthrough
 16363:     case 0b010_111:  //(A7)
 16364:       if (XEiJ.EFA_SEPARATE_AR) {
 16365:         XEiJ.mpuCycleCount += 16;
 16366:         return XEiJ.regRn[15];
 16367:       } else {
 16368:         XEiJ.mpuCycleCount += 16;
 16369:         return XEiJ.regRn[ea - (0b010_000 - 8)];
 16370:       }
 16371:     case 0b011_000:  //(A0)+
 16372:       if (XEiJ.EFA_SEPARATE_AR) {
 16373:         XEiJ.mpuCycleCount += 16;
 16374:         return (XEiJ.regRn[ 8] += 8) - 8;
 16375:       }
 16376:       //fallthrough
 16377:     case 0b011_001:  //(A1)+
 16378:       if (XEiJ.EFA_SEPARATE_AR) {
 16379:         XEiJ.mpuCycleCount += 16;
 16380:         return (XEiJ.regRn[ 9] += 8) - 8;
 16381:       }
 16382:       //fallthrough
 16383:     case 0b011_010:  //(A2)+
 16384:       if (XEiJ.EFA_SEPARATE_AR) {
 16385:         XEiJ.mpuCycleCount += 16;
 16386:         return (XEiJ.regRn[10] += 8) - 8;
 16387:       }
 16388:       //fallthrough
 16389:     case 0b011_011:  //(A3)+
 16390:       if (XEiJ.EFA_SEPARATE_AR) {
 16391:         XEiJ.mpuCycleCount += 16;
 16392:         return (XEiJ.regRn[11] += 8) - 8;
 16393:       }
 16394:       //fallthrough
 16395:     case 0b011_100:  //(A4)+
 16396:       if (XEiJ.EFA_SEPARATE_AR) {
 16397:         XEiJ.mpuCycleCount += 16;
 16398:         return (XEiJ.regRn[12] += 8) - 8;
 16399:       }
 16400:       //fallthrough
 16401:     case 0b011_101:  //(A5)+
 16402:       if (XEiJ.EFA_SEPARATE_AR) {
 16403:         XEiJ.mpuCycleCount += 16;
 16404:         return (XEiJ.regRn[13] += 8) - 8;
 16405:       }
 16406:       //fallthrough
 16407:     case 0b011_110:  //(A6)+
 16408:       if (XEiJ.EFA_SEPARATE_AR) {
 16409:         XEiJ.mpuCycleCount += 16;
 16410:         return (XEiJ.regRn[14] += 8) - 8;
 16411:       }
 16412:       //fallthrough
 16413:     case 0b011_111:  //(A7)+
 16414:       if (XEiJ.EFA_SEPARATE_AR) {
 16415:         XEiJ.mpuCycleCount += 16;
 16416:         return (XEiJ.regRn[15] += 8) - 8;
 16417:       } else {
 16418:         XEiJ.mpuCycleCount += 16;
 16419:         return (XEiJ.regRn[ea - (0b011_000 - 8)] += 8) - 8;
 16420:       }
 16421:     case 0b100_000:  //-(A0)
 16422:       if (XEiJ.EFA_SEPARATE_AR) {
 16423:         XEiJ.mpuCycleCount += 18;
 16424:         return XEiJ.regRn[ 8] -= 8;
 16425:       }
 16426:       //fallthrough
 16427:     case 0b100_001:  //-(A1)
 16428:       if (XEiJ.EFA_SEPARATE_AR) {
 16429:         XEiJ.mpuCycleCount += 18;
 16430:         return XEiJ.regRn[ 9] -= 8;
 16431:       }
 16432:       //fallthrough
 16433:     case 0b100_010:  //-(A2)
 16434:       if (XEiJ.EFA_SEPARATE_AR) {
 16435:         XEiJ.mpuCycleCount += 18;
 16436:         return XEiJ.regRn[10] -= 8;
 16437:       }
 16438:       //fallthrough
 16439:     case 0b100_011:  //-(A3)
 16440:       if (XEiJ.EFA_SEPARATE_AR) {
 16441:         XEiJ.mpuCycleCount += 18;
 16442:         return XEiJ.regRn[11] -= 8;
 16443:       }
 16444:       //fallthrough
 16445:     case 0b100_100:  //-(A4)
 16446:       if (XEiJ.EFA_SEPARATE_AR) {
 16447:         XEiJ.mpuCycleCount += 18;
 16448:         return XEiJ.regRn[12] -= 8;
 16449:       }
 16450:       //fallthrough
 16451:     case 0b100_101:  //-(A5)
 16452:       if (XEiJ.EFA_SEPARATE_AR) {
 16453:         XEiJ.mpuCycleCount += 18;
 16454:         return XEiJ.regRn[13] -= 8;
 16455:       }
 16456:       //fallthrough
 16457:     case 0b100_110:  //-(A6)
 16458:       if (XEiJ.EFA_SEPARATE_AR) {
 16459:         XEiJ.mpuCycleCount += 18;
 16460:         return XEiJ.regRn[14] -= 8;
 16461:       }
 16462:       //fallthrough
 16463:     case 0b100_111:  //-(A7)
 16464:       if (XEiJ.EFA_SEPARATE_AR) {
 16465:         XEiJ.mpuCycleCount += 18;
 16466:         return XEiJ.regRn[15] -= 8;
 16467:       } else {
 16468:         XEiJ.mpuCycleCount += 18;
 16469:         return XEiJ.regRn[ea - (0b100_000 - 8)] -= 8;
 16470:       }
 16471:     case 0b101_000:  //(d16,A0)
 16472:     case 0b101_001:  //(d16,A1)
 16473:     case 0b101_010:  //(d16,A2)
 16474:     case 0b101_011:  //(d16,A3)
 16475:     case 0b101_100:  //(d16,A4)
 16476:     case 0b101_101:  //(d16,A5)
 16477:     case 0b101_110:  //(d16,A6)
 16478:     case 0b101_111:  //(d16,A7)
 16479:       XEiJ.mpuCycleCount += 20;
 16480:       if (XEiJ.MPU_COMPOUND_POSTINCREMENT) {
 16481:         return (XEiJ.regRn[ea - (0b101_000 - 8)]  //ベースレジスタ
 16482:                 + XEiJ.busRwse ((XEiJ.regPC += 2) - 2));  //pcws。ワードディスプレースメント
 16483:       } else {
 16484:         t = XEiJ.regPC;
 16485:         XEiJ.regPC = t + 2;
 16486:         return (XEiJ.regRn[ea - (0b101_000 - 8)]  //ベースレジスタ
 16487:                 + XEiJ.busRwse (t));  //pcws。ワードディスプレースメント
 16488:       }
 16489:     case 0b110_000:  //(d8,A0,Rn.wl)
 16490:     case 0b110_001:  //(d8,A1,Rn.wl)
 16491:     case 0b110_010:  //(d8,A2,Rn.wl)
 16492:     case 0b110_011:  //(d8,A3,Rn.wl)
 16493:     case 0b110_100:  //(d8,A4,Rn.wl)
 16494:     case 0b110_101:  //(d8,A5,Rn.wl)
 16495:     case 0b110_110:  //(d8,A6,Rn.wl)
 16496:     case 0b110_111:  //(d8,A7,Rn.wl)
 16497:       XEiJ.mpuCycleCount += 22;
 16498:       if (XEiJ.MPU_COMPOUND_POSTINCREMENT) {
 16499:         w = XEiJ.busRwze ((XEiJ.regPC += 2) - 2);  //pcwz。拡張ワード
 16500:       } else {
 16501:         w = XEiJ.regPC;
 16502:         XEiJ.regPC = w + 2;
 16503:         w = XEiJ.busRwze (w);  //pcwz。拡張ワード
 16504:       }
 16505:       return (XEiJ.regRn[ea - (0b110_000 - 8)]  //ベースレジスタ
 16506:               + (byte) w  //バイトディスプレースメント
 16507:               + (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] :  //ワードインデックス
 16508:                  XEiJ.regRn[w >> 12]));  //ロングインデックス
 16509:     case 0b111_000:  //(xxx).W
 16510:       XEiJ.mpuCycleCount += 20;
 16511:       return XEiJ.busRwse ((XEiJ.regPC += 2) - 2);  //pcws
 16512:     case 0b111_001:  //(xxx).L
 16513:       XEiJ.mpuCycleCount += 24;
 16514:       return XEiJ.busRlse ((XEiJ.regPC += 4) - 4);  //pcls
 16515:     }  //switch
 16516:     XEiJ.mpuCycleCount += 34;
 16517:     M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION;
 16518:     throw M68kException.m6eSignal;
 16519:   }  //efaMltQuad
 16520: 
 16521:   //a = efaAnyExtd (ea)  //|  M+-WXZPI|
 16522:   //  任意のモードのエクステンデッドオペランドの実効アドレスを求める
 16523:   //  efaAnyQuadとの違いは(Ar)+と-(Ar)がArを12変化させることと、#<data>がPCを12変化させることと、
 16524:   //  オペランドのアクセスが2ワード増える分の8サイクルが追加されていること
 16525:   @SuppressWarnings ("fallthrough") public static int efaAnyExtd (int ea) throws M68kException {
 16526:     int t, w;
 16527:     switch (ea) {
 16528:     case 0b010_000:  //(A0)
 16529:       if (XEiJ.EFA_SEPARATE_AR) {
 16530:         XEiJ.mpuCycleCount += 24;
 16531:         return XEiJ.regRn[ 8];
 16532:       }
 16533:       //fallthrough
 16534:     case 0b010_001:  //(A1)
 16535:       if (XEiJ.EFA_SEPARATE_AR) {
 16536:         XEiJ.mpuCycleCount += 24;
 16537:         return XEiJ.regRn[ 9];
 16538:       }
 16539:       //fallthrough
 16540:     case 0b010_010:  //(A2)
 16541:       if (XEiJ.EFA_SEPARATE_AR) {
 16542:         XEiJ.mpuCycleCount += 24;
 16543:         return XEiJ.regRn[10];
 16544:       }
 16545:       //fallthrough
 16546:     case 0b010_011:  //(A3)
 16547:       if (XEiJ.EFA_SEPARATE_AR) {
 16548:         XEiJ.mpuCycleCount += 24;
 16549:         return XEiJ.regRn[11];
 16550:       }
 16551:       //fallthrough
 16552:     case 0b010_100:  //(A4)
 16553:       if (XEiJ.EFA_SEPARATE_AR) {
 16554:         XEiJ.mpuCycleCount += 24;
 16555:         return XEiJ.regRn[12];
 16556:       }
 16557:       //fallthrough
 16558:     case 0b010_101:  //(A5)
 16559:       if (XEiJ.EFA_SEPARATE_AR) {
 16560:         XEiJ.mpuCycleCount += 24;
 16561:         return XEiJ.regRn[13];
 16562:       }
 16563:       //fallthrough
 16564:     case 0b010_110:  //(A6)
 16565:       if (XEiJ.EFA_SEPARATE_AR) {
 16566:         XEiJ.mpuCycleCount += 24;
 16567:         return XEiJ.regRn[14];
 16568:       }
 16569:       //fallthrough
 16570:     case 0b010_111:  //(A7)
 16571:       if (XEiJ.EFA_SEPARATE_AR) {
 16572:         XEiJ.mpuCycleCount += 24;
 16573:         return XEiJ.regRn[15];
 16574:       } else {
 16575:         XEiJ.mpuCycleCount += 24;
 16576:         return XEiJ.regRn[ea - (0b010_000 - 8)];
 16577:       }
 16578:     case 0b011_000:  //(A0)+
 16579:       if (XEiJ.EFA_SEPARATE_AR) {
 16580:         XEiJ.mpuCycleCount += 24;
 16581:         return (XEiJ.regRn[ 8] += 12) - 12;
 16582:       }
 16583:       //fallthrough
 16584:     case 0b011_001:  //(A1)+
 16585:       if (XEiJ.EFA_SEPARATE_AR) {
 16586:         XEiJ.mpuCycleCount += 24;
 16587:         return (XEiJ.regRn[ 9] += 12) - 12;
 16588:       }
 16589:       //fallthrough
 16590:     case 0b011_010:  //(A2)+
 16591:       if (XEiJ.EFA_SEPARATE_AR) {
 16592:         XEiJ.mpuCycleCount += 24;
 16593:         return (XEiJ.regRn[10] += 12) - 12;
 16594:       }
 16595:       //fallthrough
 16596:     case 0b011_011:  //(A3)+
 16597:       if (XEiJ.EFA_SEPARATE_AR) {
 16598:         XEiJ.mpuCycleCount += 24;
 16599:         return (XEiJ.regRn[11] += 12) - 12;
 16600:       }
 16601:       //fallthrough
 16602:     case 0b011_100:  //(A4)+
 16603:       if (XEiJ.EFA_SEPARATE_AR) {
 16604:         XEiJ.mpuCycleCount += 24;
 16605:         return (XEiJ.regRn[12] += 12) - 12;
 16606:       }
 16607:       //fallthrough
 16608:     case 0b011_101:  //(A5)+
 16609:       if (XEiJ.EFA_SEPARATE_AR) {
 16610:         XEiJ.mpuCycleCount += 24;
 16611:         return (XEiJ.regRn[13] += 12) - 12;
 16612:       }
 16613:       //fallthrough
 16614:     case 0b011_110:  //(A6)+
 16615:       if (XEiJ.EFA_SEPARATE_AR) {
 16616:         XEiJ.mpuCycleCount += 24;
 16617:         return (XEiJ.regRn[14] += 12) - 12;
 16618:       }
 16619:       //fallthrough
 16620:     case 0b011_111:  //(A7)+
 16621:       if (XEiJ.EFA_SEPARATE_AR) {
 16622:         XEiJ.mpuCycleCount += 24;
 16623:         return (XEiJ.regRn[15] += 12) - 12;
 16624:       } else {
 16625:         XEiJ.mpuCycleCount += 24;
 16626:         return (XEiJ.regRn[ea - (0b011_000 - 8)] += 12) - 12;
 16627:       }
 16628:     case 0b100_000:  //-(A0)
 16629:       if (XEiJ.EFA_SEPARATE_AR) {
 16630:         XEiJ.mpuCycleCount += 26;
 16631:         return XEiJ.regRn[ 8] -= 12;
 16632:       }
 16633:       //fallthrough
 16634:     case 0b100_001:  //-(A1)
 16635:       if (XEiJ.EFA_SEPARATE_AR) {
 16636:         XEiJ.mpuCycleCount += 26;
 16637:         return XEiJ.regRn[ 9] -= 12;
 16638:       }
 16639:       //fallthrough
 16640:     case 0b100_010:  //-(A2)
 16641:       if (XEiJ.EFA_SEPARATE_AR) {
 16642:         XEiJ.mpuCycleCount += 26;
 16643:         return XEiJ.regRn[10] -= 12;
 16644:       }
 16645:       //fallthrough
 16646:     case 0b100_011:  //-(A3)
 16647:       if (XEiJ.EFA_SEPARATE_AR) {
 16648:         XEiJ.mpuCycleCount += 26;
 16649:         return XEiJ.regRn[11] -= 12;
 16650:       }
 16651:       //fallthrough
 16652:     case 0b100_100:  //-(A4)
 16653:       if (XEiJ.EFA_SEPARATE_AR) {
 16654:         XEiJ.mpuCycleCount += 26;
 16655:         return XEiJ.regRn[12] -= 12;
 16656:       }
 16657:       //fallthrough
 16658:     case 0b100_101:  //-(A5)
 16659:       if (XEiJ.EFA_SEPARATE_AR) {
 16660:         XEiJ.mpuCycleCount += 26;
 16661:         return XEiJ.regRn[13] -= 12;
 16662:       }
 16663:       //fallthrough
 16664:     case 0b100_110:  //-(A6)
 16665:       if (XEiJ.EFA_SEPARATE_AR) {
 16666:         XEiJ.mpuCycleCount += 26;
 16667:         return XEiJ.regRn[14] -= 12;
 16668:       }
 16669:       //fallthrough
 16670:     case 0b100_111:  //-(A7)
 16671:       if (XEiJ.EFA_SEPARATE_AR) {
 16672:         XEiJ.mpuCycleCount += 26;
 16673:         return XEiJ.regRn[15] -= 12;
 16674:       } else {
 16675:         XEiJ.mpuCycleCount += 26;
 16676:         return XEiJ.regRn[ea - (0b100_000 - 8)] -= 12;
 16677:       }
 16678:     case 0b101_000:  //(d16,A0)
 16679:     case 0b101_001:  //(d16,A1)
 16680:     case 0b101_010:  //(d16,A2)
 16681:     case 0b101_011:  //(d16,A3)
 16682:     case 0b101_100:  //(d16,A4)
 16683:     case 0b101_101:  //(d16,A5)
 16684:     case 0b101_110:  //(d16,A6)
 16685:     case 0b101_111:  //(d16,A7)
 16686:       XEiJ.mpuCycleCount += 28;
 16687:       if (XEiJ.MPU_COMPOUND_POSTINCREMENT) {
 16688:         return (XEiJ.regRn[ea - (0b101_000 - 8)]  //ベースレジスタ
 16689:                 + XEiJ.busRwse ((XEiJ.regPC += 2) - 2));  //pcws。ワードディスプレースメント
 16690:       } else {
 16691:         t = XEiJ.regPC;
 16692:         XEiJ.regPC = t + 2;
 16693:         return (XEiJ.regRn[ea - (0b101_000 - 8)]  //ベースレジスタ
 16694:                 + XEiJ.busRwse (t));  //pcws。ワードディスプレースメント
 16695:       }
 16696:     case 0b110_000:  //(d8,A0,Rn.wl)
 16697:     case 0b110_001:  //(d8,A1,Rn.wl)
 16698:     case 0b110_010:  //(d8,A2,Rn.wl)
 16699:     case 0b110_011:  //(d8,A3,Rn.wl)
 16700:     case 0b110_100:  //(d8,A4,Rn.wl)
 16701:     case 0b110_101:  //(d8,A5,Rn.wl)
 16702:     case 0b110_110:  //(d8,A6,Rn.wl)
 16703:     case 0b110_111:  //(d8,A7,Rn.wl)
 16704:       XEiJ.mpuCycleCount += 30;
 16705:       if (XEiJ.MPU_COMPOUND_POSTINCREMENT) {
 16706:         w = XEiJ.busRwze ((XEiJ.regPC += 2) - 2);  //pcwz。拡張ワード
 16707:       } else {
 16708:         w = XEiJ.regPC;
 16709:         XEiJ.regPC = w + 2;
 16710:         w = XEiJ.busRwze (w);  //pcwz。拡張ワード
 16711:       }
 16712:       return (XEiJ.regRn[ea - (0b110_000 - 8)]  //ベースレジスタ
 16713:               + (byte) w  //バイトディスプレースメント
 16714:               + (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] :  //ワードインデックス
 16715:                  XEiJ.regRn[w >> 12]));  //ロングインデックス
 16716:     case 0b111_000:  //(xxx).W
 16717:       XEiJ.mpuCycleCount += 28;
 16718:       return XEiJ.busRwse ((XEiJ.regPC += 2) - 2);  //pcws
 16719:     case 0b111_001:  //(xxx).L
 16720:       XEiJ.mpuCycleCount += 32;
 16721:       return XEiJ.busRlse ((XEiJ.regPC += 4) - 4);  //pcls
 16722:     case 0b111_010:  //(d16,PC)
 16723:       XEiJ.mpuCycleCount += 28;
 16724:       t = XEiJ.regPC;
 16725:       XEiJ.regPC = t + 2;
 16726:       return (t  //ベースレジスタ
 16727:               + XEiJ.busRwse (t));  //pcws。ワードディスプレースメント
 16728:     case 0b111_011:  //(d8,PC,Rn.wl)
 16729:       XEiJ.mpuCycleCount += 30;
 16730:       t = XEiJ.regPC;
 16731:       XEiJ.regPC = t + 2;
 16732:       w = XEiJ.busRwze (t);  //pcwz。拡張ワード
 16733:       return (t  //ベースレジスタ
 16734:               + (byte) w  //バイトディスプレースメント
 16735:               + (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] :  //ワードインデックス
 16736:                  XEiJ.regRn[w >> 12]));  //ロングインデックス
 16737:     case 0b111_100:  //#<data>
 16738:       XEiJ.mpuCycleCount += 24;
 16739:       if (XEiJ.MPU_COMPOUND_POSTINCREMENT) {
 16740:         return (XEiJ.regPC += 12) - 12;
 16741:       } else {
 16742:         t = XEiJ.regPC;
 16743:         XEiJ.regPC = t + 12;
 16744:         return t;
 16745:       }
 16746:     }  //switch
 16747:     XEiJ.mpuCycleCount += 34;
 16748:     M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION;
 16749:     throw M68kException.m6eSignal;
 16750:   }  //efaAnyExtd
 16751: 
 16752:   //a = efaMltExtd (ea)  //|  M+-WXZ  |
 16753:   //  メモリ可変モードのエクステンデッドオペランドの実効アドレスを求める
 16754:   //  efaMltQuadとの違いは(Ar)+と-(Ar)がArを12変化させることと、#<data>がPCを12変化させることと、
 16755:   //  オペランドのアクセスが2ワード増える分の8サイクルが追加されていること
 16756:   @SuppressWarnings ("fallthrough") public static int efaMltExtd (int ea) throws M68kException {
 16757:     int t, w;
 16758:     switch (ea) {
 16759:     case 0b010_000:  //(A0)
 16760:       if (XEiJ.EFA_SEPARATE_AR) {
 16761:         XEiJ.mpuCycleCount += 24;
 16762:         return XEiJ.regRn[ 8];
 16763:       }
 16764:       //fallthrough
 16765:     case 0b010_001:  //(A1)
 16766:       if (XEiJ.EFA_SEPARATE_AR) {
 16767:         XEiJ.mpuCycleCount += 24;
 16768:         return XEiJ.regRn[ 9];
 16769:       }
 16770:       //fallthrough
 16771:     case 0b010_010:  //(A2)
 16772:       if (XEiJ.EFA_SEPARATE_AR) {
 16773:         XEiJ.mpuCycleCount += 24;
 16774:         return XEiJ.regRn[10];
 16775:       }
 16776:       //fallthrough
 16777:     case 0b010_011:  //(A3)
 16778:       if (XEiJ.EFA_SEPARATE_AR) {
 16779:         XEiJ.mpuCycleCount += 24;
 16780:         return XEiJ.regRn[11];
 16781:       }
 16782:       //fallthrough
 16783:     case 0b010_100:  //(A4)
 16784:       if (XEiJ.EFA_SEPARATE_AR) {
 16785:         XEiJ.mpuCycleCount += 24;
 16786:         return XEiJ.regRn[12];
 16787:       }
 16788:       //fallthrough
 16789:     case 0b010_101:  //(A5)
 16790:       if (XEiJ.EFA_SEPARATE_AR) {
 16791:         XEiJ.mpuCycleCount += 24;
 16792:         return XEiJ.regRn[13];
 16793:       }
 16794:       //fallthrough
 16795:     case 0b010_110:  //(A6)
 16796:       if (XEiJ.EFA_SEPARATE_AR) {
 16797:         XEiJ.mpuCycleCount += 24;
 16798:         return XEiJ.regRn[14];
 16799:       }
 16800:       //fallthrough
 16801:     case 0b010_111:  //(A7)
 16802:       if (XEiJ.EFA_SEPARATE_AR) {
 16803:         XEiJ.mpuCycleCount += 24;
 16804:         return XEiJ.regRn[15];
 16805:       } else {
 16806:         XEiJ.mpuCycleCount += 24;
 16807:         return XEiJ.regRn[ea - (0b010_000 - 8)];
 16808:       }
 16809:     case 0b011_000:  //(A0)+
 16810:       if (XEiJ.EFA_SEPARATE_AR) {
 16811:         XEiJ.mpuCycleCount += 24;
 16812:         return (XEiJ.regRn[ 8] += 12) - 12;
 16813:       }
 16814:       //fallthrough
 16815:     case 0b011_001:  //(A1)+
 16816:       if (XEiJ.EFA_SEPARATE_AR) {
 16817:         XEiJ.mpuCycleCount += 24;
 16818:         return (XEiJ.regRn[ 9] += 12) - 12;
 16819:       }
 16820:       //fallthrough
 16821:     case 0b011_010:  //(A2)+
 16822:       if (XEiJ.EFA_SEPARATE_AR) {
 16823:         XEiJ.mpuCycleCount += 24;
 16824:         return (XEiJ.regRn[10] += 12) - 12;
 16825:       }
 16826:       //fallthrough
 16827:     case 0b011_011:  //(A3)+
 16828:       if (XEiJ.EFA_SEPARATE_AR) {
 16829:         XEiJ.mpuCycleCount += 24;
 16830:         return (XEiJ.regRn[11] += 12) - 12;
 16831:       }
 16832:       //fallthrough
 16833:     case 0b011_100:  //(A4)+
 16834:       if (XEiJ.EFA_SEPARATE_AR) {
 16835:         XEiJ.mpuCycleCount += 24;
 16836:         return (XEiJ.regRn[12] += 12) - 12;
 16837:       }
 16838:       //fallthrough
 16839:     case 0b011_101:  //(A5)+
 16840:       if (XEiJ.EFA_SEPARATE_AR) {
 16841:         XEiJ.mpuCycleCount += 24;
 16842:         return (XEiJ.regRn[13] += 12) - 12;
 16843:       }
 16844:       //fallthrough
 16845:     case 0b011_110:  //(A6)+
 16846:       if (XEiJ.EFA_SEPARATE_AR) {
 16847:         XEiJ.mpuCycleCount += 24;
 16848:         return (XEiJ.regRn[14] += 12) - 12;
 16849:       }
 16850:       //fallthrough
 16851:     case 0b011_111:  //(A7)+
 16852:       if (XEiJ.EFA_SEPARATE_AR) {
 16853:         XEiJ.mpuCycleCount += 24;
 16854:         return (XEiJ.regRn[15] += 12) - 12;
 16855:       } else {
 16856:         XEiJ.mpuCycleCount += 24;
 16857:         return (XEiJ.regRn[ea - (0b011_000 - 8)] += 12) - 12;
 16858:       }
 16859:     case 0b100_000:  //-(A0)
 16860:     case 0b100_001:  //-(A1)
 16861:     case 0b100_010:  //-(A2)
 16862:     case 0b100_011:  //-(A3)
 16863:     case 0b100_100:  //-(A4)
 16864:     case 0b100_101:  //-(A5)
 16865:     case 0b100_110:  //-(A6)
 16866:     case 0b100_111:  //-(A7)
 16867:       XEiJ.mpuCycleCount += 26;
 16868:       return XEiJ.regRn[ea - (0b100_000 - 8)] -= 12;
 16869:     case 0b101_000:  //(d16,A0)
 16870:     case 0b101_001:  //(d16,A1)
 16871:     case 0b101_010:  //(d16,A2)
 16872:     case 0b101_011:  //(d16,A3)
 16873:     case 0b101_100:  //(d16,A4)
 16874:     case 0b101_101:  //(d16,A5)
 16875:     case 0b101_110:  //(d16,A6)
 16876:     case 0b101_111:  //(d16,A7)
 16877:       XEiJ.mpuCycleCount += 28;
 16878:       if (XEiJ.MPU_COMPOUND_POSTINCREMENT) {
 16879:         return (XEiJ.regRn[ea - (0b101_000 - 8)]  //ベースレジスタ
 16880:                 + XEiJ.busRwse ((XEiJ.regPC += 2) - 2));  //pcws。ワードディスプレースメント
 16881:       } else {
 16882:         t = XEiJ.regPC;
 16883:         XEiJ.regPC = t + 2;
 16884:         return (XEiJ.regRn[ea - (0b101_000 - 8)]  //ベースレジスタ
 16885:                 + XEiJ.busRwse (t));  //pcws。ワードディスプレースメント
 16886:       }
 16887:     case 0b110_000:  //(d8,A0,Rn.wl)
 16888:     case 0b110_001:  //(d8,A1,Rn.wl)
 16889:     case 0b110_010:  //(d8,A2,Rn.wl)
 16890:     case 0b110_011:  //(d8,A3,Rn.wl)
 16891:     case 0b110_100:  //(d8,A4,Rn.wl)
 16892:     case 0b110_101:  //(d8,A5,Rn.wl)
 16893:     case 0b110_110:  //(d8,A6,Rn.wl)
 16894:     case 0b110_111:  //(d8,A7,Rn.wl)
 16895:       XEiJ.mpuCycleCount += 30;
 16896:       if (XEiJ.MPU_COMPOUND_POSTINCREMENT) {
 16897:         w = XEiJ.busRwze ((XEiJ.regPC += 2) - 2);  //pcwz。拡張ワード
 16898:       } else {
 16899:         w = XEiJ.regPC;
 16900:         XEiJ.regPC = w + 2;
 16901:         w = XEiJ.busRwze (w);  //pcwz。拡張ワード
 16902:       }
 16903:       return (XEiJ.regRn[ea - (0b110_000 - 8)]  //ベースレジスタ
 16904:               + (byte) w  //バイトディスプレースメント
 16905:               + (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] :  //ワードインデックス
 16906:                  XEiJ.regRn[w >> 12]));  //ロングインデックス
 16907:     case 0b111_000:  //(xxx).W
 16908:       XEiJ.mpuCycleCount += 28;
 16909:       return XEiJ.busRwse ((XEiJ.regPC += 2) - 2);  //pcws
 16910:     case 0b111_001:  //(xxx).L
 16911:       XEiJ.mpuCycleCount += 32;
 16912:       return XEiJ.busRlse ((XEiJ.regPC += 4) - 4);  //pcls
 16913:     }  //switch
 16914:     XEiJ.mpuCycleCount += 34;
 16915:     M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION;
 16916:     throw M68kException.m6eSignal;
 16917:   }  //efaMltExtd
 16918: 
 16919:   //a = efaLeaPea (ea)  //|  M  WXZP |
 16920:   //  LEA命令とPEA命令のオペランドの実効アドレスを求める
 16921:   //  efaCntWordとの違いはサイクル数のみ
 16922:   //  LEA命令のベースサイクル数4を含んでいるのでLEA命令ではベースサイクル数を加えなくてよい
 16923:   //  PEA命令のベースサイクル数は12-4=8
 16924:   @SuppressWarnings ("fallthrough") public static int efaLeaPea (int ea) throws M68kException {
 16925:     int t, w;
 16926:     switch (ea) {
 16927:     case 0b010_000:  //(A0)
 16928:       if (XEiJ.EFA_SEPARATE_AR) {
 16929:         XEiJ.mpuCycleCount += 4;
 16930:         return XEiJ.regRn[ 8];
 16931:       }
 16932:       //fallthrough
 16933:     case 0b010_001:  //(A1)
 16934:       if (XEiJ.EFA_SEPARATE_AR) {
 16935:         XEiJ.mpuCycleCount += 4;
 16936:         return XEiJ.regRn[ 9];
 16937:       }
 16938:       //fallthrough
 16939:     case 0b010_010:  //(A2)
 16940:       if (XEiJ.EFA_SEPARATE_AR) {
 16941:         XEiJ.mpuCycleCount += 4;
 16942:         return XEiJ.regRn[10];
 16943:       }
 16944:       //fallthrough
 16945:     case 0b010_011:  //(A3)
 16946:       if (XEiJ.EFA_SEPARATE_AR) {
 16947:         XEiJ.mpuCycleCount += 4;
 16948:         return XEiJ.regRn[11];
 16949:       }
 16950:       //fallthrough
 16951:     case 0b010_100:  //(A4)
 16952:       if (XEiJ.EFA_SEPARATE_AR) {
 16953:         XEiJ.mpuCycleCount += 4;
 16954:         return XEiJ.regRn[12];
 16955:       }
 16956:       //fallthrough
 16957:     case 0b010_101:  //(A5)
 16958:       if (XEiJ.EFA_SEPARATE_AR) {
 16959:         XEiJ.mpuCycleCount += 4;
 16960:         return XEiJ.regRn[13];
 16961:       }
 16962:       //fallthrough
 16963:     case 0b010_110:  //(A6)
 16964:       if (XEiJ.EFA_SEPARATE_AR) {
 16965:         XEiJ.mpuCycleCount += 4;
 16966:         return XEiJ.regRn[14];
 16967:       }
 16968:       //fallthrough
 16969:     case 0b010_111:  //(A7)
 16970:       if (XEiJ.EFA_SEPARATE_AR) {
 16971:         XEiJ.mpuCycleCount += 4;
 16972:         return XEiJ.regRn[15];
 16973:       } else {
 16974:         XEiJ.mpuCycleCount += 4;
 16975:         return XEiJ.regRn[ea - (0b010_000 - 8)];
 16976:       }
 16977:     case 0b101_000:  //(d16,A0)
 16978:     case 0b101_001:  //(d16,A1)
 16979:     case 0b101_010:  //(d16,A2)
 16980:     case 0b101_011:  //(d16,A3)
 16981:     case 0b101_100:  //(d16,A4)
 16982:     case 0b101_101:  //(d16,A5)
 16983:     case 0b101_110:  //(d16,A6)
 16984:     case 0b101_111:  //(d16,A7)
 16985:       XEiJ.mpuCycleCount += 8;
 16986:       if (XEiJ.MPU_COMPOUND_POSTINCREMENT) {
 16987:         return (XEiJ.regRn[ea - (0b101_000 - 8)]  //ベースレジスタ
 16988:                 + XEiJ.busRwse ((XEiJ.regPC += 2) - 2));  //pcws。ワードディスプレースメント
 16989:       } else {
 16990:         t = XEiJ.regPC;
 16991:         XEiJ.regPC = t + 2;
 16992:         return (XEiJ.regRn[ea - (0b101_000 - 8)]  //ベースレジスタ
 16993:                 + XEiJ.busRwse (t));  //pcws。ワードディスプレースメント
 16994:       }
 16995:     case 0b110_000:  //(d8,A0,Rn.wl)
 16996:     case 0b110_001:  //(d8,A1,Rn.wl)
 16997:     case 0b110_010:  //(d8,A2,Rn.wl)
 16998:     case 0b110_011:  //(d8,A3,Rn.wl)
 16999:     case 0b110_100:  //(d8,A4,Rn.wl)
 17000:     case 0b110_101:  //(d8,A5,Rn.wl)
 17001:     case 0b110_110:  //(d8,A6,Rn.wl)
 17002:     case 0b110_111:  //(d8,A7,Rn.wl)
 17003:       XEiJ.mpuCycleCount += 12;
 17004:       if (XEiJ.MPU_COMPOUND_POSTINCREMENT) {
 17005:         w = XEiJ.busRwze ((XEiJ.regPC += 2) - 2);  //pcwz。拡張ワード
 17006:       } else {
 17007:         w = XEiJ.regPC;
 17008:         XEiJ.regPC = w + 2;
 17009:         w = XEiJ.busRwze (w);  //pcwz。拡張ワード
 17010:       }
 17011:       return (XEiJ.regRn[ea - (0b110_000 - 8)]  //ベースレジスタ
 17012:               + (byte) w  //バイトディスプレースメント
 17013:               + (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] :  //ワードインデックス
 17014:                  XEiJ.regRn[w >> 12]));  //ロングインデックス
 17015:     case 0b111_000:  //(xxx).W
 17016:       XEiJ.mpuCycleCount += 8;
 17017:       return XEiJ.busRwse ((XEiJ.regPC += 2) - 2);  //pcws
 17018:     case 0b111_001:  //(xxx).L
 17019:       XEiJ.mpuCycleCount += 12;
 17020:       return XEiJ.busRlse ((XEiJ.regPC += 4) - 4);  //pcls
 17021:     case 0b111_010:  //(d16,PC)
 17022:       XEiJ.mpuCycleCount += 8;
 17023:       t = XEiJ.regPC;
 17024:       XEiJ.regPC = t + 2;
 17025:       return (t  //ベースレジスタ
 17026:               + XEiJ.busRwse (t));  //pcws。ワードディスプレースメント
 17027:     case 0b111_011:  //(d8,PC,Rn.wl)
 17028:       XEiJ.mpuCycleCount += 12;
 17029:       t = XEiJ.regPC;
 17030:       XEiJ.regPC = t + 2;
 17031:       w = XEiJ.busRwze (t);  //pcwz。拡張ワード
 17032:       return (t  //ベースレジスタ
 17033:               + (byte) w  //バイトディスプレースメント
 17034:               + (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] :  //ワードインデックス
 17035:                  XEiJ.regRn[w >> 12]));  //ロングインデックス
 17036:     }  //switch
 17037:     XEiJ.mpuCycleCount += 34;
 17038:     M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION;
 17039:     throw M68kException.m6eSignal;
 17040:   }  //efaLeaPea
 17041: 
 17042:   //a = efaJmpJsr (ea)  //|  M  WXZP |
 17043:   //  JMP命令とJSR命令のオペランドの実効アドレスを求める
 17044:   //  efaCntWordとの違いはサイクル数のみ
 17045:   //  JMP命令のベースサイクル数8を含んでいるのでJMP命令ではベースサイクル数を加えなくてよい
 17046:   //  JSR命令のベースサイクル数は16-8=8
 17047:   @SuppressWarnings ("fallthrough") public static int efaJmpJsr (int ea) throws M68kException {
 17048:     int t, w;
 17049:     switch (ea) {
 17050:     case 0b010_000:  //(A0)
 17051:       if (XEiJ.EFA_SEPARATE_AR) {
 17052:         XEiJ.mpuCycleCount += 8;
 17053:         return XEiJ.regRn[ 8];
 17054:       }
 17055:       //fallthrough
 17056:     case 0b010_001:  //(A1)
 17057:       if (XEiJ.EFA_SEPARATE_AR) {
 17058:         XEiJ.mpuCycleCount += 8;
 17059:         return XEiJ.regRn[ 9];
 17060:       }
 17061:       //fallthrough
 17062:     case 0b010_010:  //(A2)
 17063:       if (XEiJ.EFA_SEPARATE_AR) {
 17064:         XEiJ.mpuCycleCount += 8;
 17065:         return XEiJ.regRn[10];
 17066:       }
 17067:       //fallthrough
 17068:     case 0b010_011:  //(A3)
 17069:       if (XEiJ.EFA_SEPARATE_AR) {
 17070:         XEiJ.mpuCycleCount += 8;
 17071:         return XEiJ.regRn[11];
 17072:       }
 17073:       //fallthrough
 17074:     case 0b010_100:  //(A4)
 17075:       if (XEiJ.EFA_SEPARATE_AR) {
 17076:         XEiJ.mpuCycleCount += 8;
 17077:         return XEiJ.regRn[12];
 17078:       }
 17079:       //fallthrough
 17080:     case 0b010_101:  //(A5)
 17081:       if (XEiJ.EFA_SEPARATE_AR) {
 17082:         XEiJ.mpuCycleCount += 8;
 17083:         return XEiJ.regRn[13];
 17084:       }
 17085:       //fallthrough
 17086:     case 0b010_110:  //(A6)
 17087:       if (XEiJ.EFA_SEPARATE_AR) {
 17088:         XEiJ.mpuCycleCount += 8;
 17089:         return XEiJ.regRn[14];
 17090:       }
 17091:       //fallthrough
 17092:     case 0b010_111:  //(A7)
 17093:       if (XEiJ.EFA_SEPARATE_AR) {
 17094:         XEiJ.mpuCycleCount += 8;
 17095:         return XEiJ.regRn[15];
 17096:       } else {
 17097:         XEiJ.mpuCycleCount += 8;
 17098:         return XEiJ.regRn[ea - (0b010_000 - 8)];
 17099:       }
 17100:     case 0b101_000:  //(d16,A0)
 17101:     case 0b101_001:  //(d16,A1)
 17102:     case 0b101_010:  //(d16,A2)
 17103:     case 0b101_011:  //(d16,A3)
 17104:     case 0b101_100:  //(d16,A4)
 17105:     case 0b101_101:  //(d16,A5)
 17106:     case 0b101_110:  //(d16,A6)
 17107:     case 0b101_111:  //(d16,A7)
 17108:       XEiJ.mpuCycleCount += 10;
 17109:       if (XEiJ.MPU_COMPOUND_POSTINCREMENT) {
 17110:         return (XEiJ.regRn[ea - (0b101_000 - 8)]  //ベースレジスタ
 17111:                 + XEiJ.busRwse ((XEiJ.regPC += 2) - 2));  //pcws。ワードディスプレースメント
 17112:       } else {
 17113:         t = XEiJ.regPC;
 17114:         XEiJ.regPC = t + 2;
 17115:         return (XEiJ.regRn[ea - (0b101_000 - 8)]  //ベースレジスタ
 17116:                 + XEiJ.busRwse (t));  //pcws。ワードディスプレースメント
 17117:       }
 17118:     case 0b110_000:  //(d8,A0,Rn.wl)
 17119:     case 0b110_001:  //(d8,A1,Rn.wl)
 17120:     case 0b110_010:  //(d8,A2,Rn.wl)
 17121:     case 0b110_011:  //(d8,A3,Rn.wl)
 17122:     case 0b110_100:  //(d8,A4,Rn.wl)
 17123:     case 0b110_101:  //(d8,A5,Rn.wl)
 17124:     case 0b110_110:  //(d8,A6,Rn.wl)
 17125:     case 0b110_111:  //(d8,A7,Rn.wl)
 17126:       XEiJ.mpuCycleCount += 14;
 17127:       if (XEiJ.MPU_COMPOUND_POSTINCREMENT) {
 17128:         w = XEiJ.busRwze ((XEiJ.regPC += 2) - 2);  //pcwz。拡張ワード
 17129:       } else {
 17130:         w = XEiJ.regPC;
 17131:         XEiJ.regPC = w + 2;
 17132:         w = XEiJ.busRwze (w);  //pcwz。拡張ワード
 17133:       }
 17134:       return (XEiJ.regRn[ea - (0b110_000 - 8)]  //ベースレジスタ
 17135:               + (byte) w  //バイトディスプレースメント
 17136:               + (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] :  //ワードインデックス
 17137:                  XEiJ.regRn[w >> 12]));  //ロングインデックス
 17138:     case 0b111_000:  //(xxx).W
 17139:       XEiJ.mpuCycleCount += 10;
 17140:       return XEiJ.busRwse ((XEiJ.regPC += 2) - 2);  //pcws
 17141:     case 0b111_001:  //(xxx).L
 17142:       XEiJ.mpuCycleCount += 12;
 17143:       return XEiJ.busRlse ((XEiJ.regPC += 4) - 4);  //pcls
 17144:     case 0b111_010:  //(d16,PC)
 17145:       XEiJ.mpuCycleCount += 10;
 17146:       t = XEiJ.regPC;
 17147:       XEiJ.regPC = t + 2;
 17148:       return (t  //ベースレジスタ
 17149:               + XEiJ.busRwse (t));  //pcws。ワードディスプレースメント
 17150:     case 0b111_011:  //(d8,PC,Rn.wl)
 17151:       XEiJ.mpuCycleCount += 14;
 17152:       t = XEiJ.regPC;
 17153:       XEiJ.regPC = t + 2;
 17154:       w = XEiJ.busRwze (t);  //pcwz。拡張ワード
 17155:       return (t  //ベースレジスタ
 17156:               + (byte) w  //バイトディスプレースメント
 17157:               + (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] :  //ワードインデックス
 17158:                  XEiJ.regRn[w >> 12]));  //ロングインデックス
 17159:     }  //switch
 17160:     XEiJ.mpuCycleCount += 34;
 17161:     M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION;
 17162:     throw M68kException.m6eSignal;
 17163:   }  //efaJmpJsr
 17164: 
 17165: 
 17166: 
 17167: }  //class MC68000
 17168: 
 17169: 
 17170: